From xen-devel-bounces@lists.xenproject.org Tue Apr 01 00:48:26 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 00:48:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.933269.1335256 (Exim 4.92) (envelope-from ) id 1tzPnZ-0006Hv-J5; Tue, 01 Apr 2025 00:48:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 933269.1335256; Tue, 01 Apr 2025 00:48:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzPnZ-0006Ho-Fs; Tue, 01 Apr 2025 00:48:13 +0000 Received: by outflank-mailman (input) for mailman id 933269; Tue, 01 Apr 2025 00:48:13 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzPnZ-0006Hi-0y for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 00:48:13 +0000 Received: from tor.source.kernel.org (tor.source.kernel.org [172.105.4.254]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id fae08de2-0e92-11f0-9ffb-bf95429c2676; Tue, 01 Apr 2025 02:48:09 +0200 (CEST) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 4BBD961161; Tue, 1 Apr 2025 00:48:01 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 60843C4CEE3; Tue, 1 Apr 2025 00:48:06 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: fae08de2-0e92-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743468487; bh=NZ82hI+qO7plWorq+dxS86hxfYMJlAP+dDEZh6tc7vk=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=qbVRXzRimWfuwn0ZBCOKKlJ7HlXYL4h3IO5VBnu5BVqU27vrcpC7zm3zBjGCS8Gzu p95rcU/dSqQgKT8GNXnIXQNYATHTWXHSXwCBKkWjmYRGe5aLsu8u97Y2Oioo2zwCN9 z+UG0+O9g61qQFSU0mwEfUpOSNwHtGawYS8mKxJaMQ6D4A6jVhv/kK/ODD5mwDl8iT ARN4j4Z8wuVLKXQuxZ9N1o3ERUIMd6Wun7+p5SBWlgO2VM8qH1epUlt9TS8CWiTTX1 wzvezPjhj9s6HKsVR1usiK5xDLQzdWnyivsMlmUOeVXdwh2F0GtObubx1WGcpHFPyr 7K2IZM/rqOMVw== Date: Mon, 31 Mar 2025 17:48:03 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Stefano Stabellini cc: Jan Beulich , Stefano Stabellini , andrew.cooper3@citrix.com, roger.pau@citrix.com, julien@xen.org, michal.orzel@amd.com, bertrand.marquis@arm.com, xen-devel@lists.xenproject.org Subject: Re: [PATCH v3] xen: simplify bitmap_to_xenctl_bitmap for little endian In-Reply-To: Message-ID: References: <20250327233419.1119763-1-stefano.stabellini@amd.com> <217ed304-ca5d-4422-a187-da5493cecb5e@suse.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Mon, 31 Mar 2025, Stefano Stabellini wrote: > On Mon, 31 Mar 2025, Jan Beulich wrote: > > On 28.03.2025 00:34, Stefano Stabellini wrote: > > > --- a/xen/common/bitmap.c > > > +++ b/xen/common/bitmap.c > > > @@ -52,7 +52,7 @@ static void clamp_last_byte(uint8_t *bp, unsigned int nbits) > > > unsigned int remainder = nbits % 8; > > > > > > if (remainder) > > > - bp[nbits/8] &= (1U << remainder) - 1; > > > + *bp &= (1U << remainder) - 1; > > > } > > > > Technically there's nothing wrong with dropping the if(), I think. Even more > > so then than now, ... We need to keep the if because otherwise we end up zeroing the last 8-bit-aligned byte > > > @@ -338,7 +338,6 @@ static void bitmap_long_to_byte(uint8_t *bp, const unsigned long *lp, > > > nbits -= 8; > > > } > > > } > > > - clamp_last_byte(bp, nbits); > > > } > > > > > > static void bitmap_byte_to_long(unsigned long *lp, const uint8_t *bp, > > > @@ -363,7 +362,6 @@ static void bitmap_long_to_byte(uint8_t *bp, const unsigned long *lp, > > > unsigned int nbits) > > > { > > > memcpy(bp, lp, DIV_ROUND_UP(nbits, BITS_PER_BYTE)); > > > - clamp_last_byte(bp, nbits); > > > } > > > > ... with the two prior call sites now shrunk to ... > > > > > @@ -384,21 +382,41 @@ int bitmap_to_xenctl_bitmap(struct xenctl_bitmap *xenctl_bitmap, > > > uint8_t zero = 0; > > > int err = 0; > > > unsigned int xen_bytes = DIV_ROUND_UP(nbits, BITS_PER_BYTE); > > > - uint8_t *bytemap = xmalloc_array(uint8_t, xen_bytes); > > > - > > > - if ( !bytemap ) > > > - return -ENOMEM; > > > + uint8_t last; > > > > > > guest_bytes = DIV_ROUND_UP(xenctl_bitmap->nr_bits, BITS_PER_BYTE); > > > copy_bytes = min(guest_bytes, xen_bytes); > > > > > > - bitmap_long_to_byte(bytemap, bitmap, nbits); > > > + if ( IS_ENABLED(__BIG_ENDIAN) ) > > > + { > > > + uint8_t *bytemap = xmalloc_array(uint8_t, xen_bytes); > > > > > > - if ( copy_bytes && > > > - copy_to_guest(xenctl_bitmap->bitmap, bytemap, copy_bytes) ) > > > - err = -EFAULT; > > > + if ( !bytemap ) > > > + return -ENOMEM; > > > > > > - xfree(bytemap); > > > + bitmap_long_to_byte(bytemap, bitmap, nbits); > > > + last = bytemap[nbits / 8]; > > > + > > > + if ( copy_bytes > 1 && > > > + copy_to_guest(xenctl_bitmap->bitmap, bytemap, copy_bytes - 1) ) > > > + err = -EFAULT; > > > + > > > + xfree(bytemap); > > > + } > > > + else > > > + { > > > + const uint8_t *bytemap = (const uint8_t *)bitmap; > > > + last = bytemap[nbits / 8]; > > > + > > > + if ( copy_bytes > 1 && > > > + copy_to_guest(xenctl_bitmap->bitmap, bytemap, copy_bytes - 1) ) > > > + err = -EFAULT; > > > + } > > > + > > > + clamp_last_byte(&last, nbits); > > > > ... just one, I wonder if that being a separate function is actually still > > necessary. > > > > As indicated before, I think it would be nice if the two identical copy-out > > operations could also be folded. > > Please see: https://marc.info/?l=xen-devel&m=174319650100975 > > Other than that, I addressed all the other points Sorry, that's not true, one comment above From xen-devel-bounces@lists.xenproject.org Tue Apr 01 00:50:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 00:50:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.933280.1335265 (Exim 4.92) (envelope-from ) id 1tzPpc-0007iQ-Tl; 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pr=C From: Stefano Stabellini To: CC: , , , , , , , Stefano Stabellini Subject: [PATCH v4] xen: simplify bitmap_to_xenctl_bitmap for little endian Date: Mon, 31 Mar 2025 17:50:08 -0700 Message-ID: <20250401005008.2787764-1-stefano.stabellini@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Received-SPF: None (SATLEXMB04.amd.com: stefano.stabellini@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF00020E64:EE_|IA0PR12MB8226:EE_ X-MS-Office365-Filtering-Correlation-Id: 64a27bf4-b9a0-488d-cdcd-08dd70b727eb X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|376014|36860700013|34020700016|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?J/qzyqmhbATRFLj3AxHwRHBjzvxUlVgOPM8iSaeVlOvOyDZQmrJy1IMUNeoy?= =?us-ascii?Q?jP50VWp8ZkRmXeKOi8eNI09vHGe+282OE3Y8ri2wLbAZTJqsuz45eLyJvWqz?= =?us-ascii?Q?clhZyPcKj98a06uz8AhBg1vnn0bQ4HKx2eK5wI6ATFD4RzvaiOI7I9QUcKsx?= =?us-ascii?Q?tn9PsRoWxU+hMCFMYKJ+sEUYxgOKda5j6e8xDpcpxziLUN0dBT4caHnFmEXb?= =?us-ascii?Q?8YAabZ7mWhY7PLxQhUQfur+8N9SKQIgMEWRUGl05xJsFqMiPJ3lVOuXls7X4?= =?us-ascii?Q?IaWdtTtG1yB67x/+r1kLVcw7q7wJDZXnB7tl5Q01SKRu525COkIYgs8tlsWS?= =?us-ascii?Q?mdsN6uO3cLX+gUDsoX3Q+v4eVL1EuwsxHCcOv4wEAzcGvH9YiOGEOjb0FlMg?= =?us-ascii?Q?N5CcdyhSLxYN4jcL96MI7XPf9uKyztbMFjF6l4vvYfKDmtR4yS3ZC4MAR3VV?= =?us-ascii?Q?OqBTlb4+k85EwO5uKDW4Twtdem1sfuRDTw/Os8gjw1NS8KAtIS7NEGdisqGw?= =?us-ascii?Q?mWVVQFcIap2Mj5SkoMIE9OV5aEiEUsQQTDrTh1HvNHVPoxFpHcY1zrGb7rlW?= =?us-ascii?Q?tulLCuqe3Hs/YJMYVXYhOuJb4Izel8PYncCIDJ77JhoAytnx3ygDiPl+nh5A?= =?us-ascii?Q?X9DS2U0gvY3N4ASkKLSI7duM9W7nYd+jETi6dq57eZbf7U11rDDFyMKdObju?= =?us-ascii?Q?kLM8MVrU76RaWLgDP6E/HG8ivuC/yP6woqjfUUTDhKC+znBfWytijUYZhtxu?= =?us-ascii?Q?XWBf8V3NCY5MmG3uql0xC1faUgGZIBcc3/G7a+1ZBT0xzh5EUhcr3rXOlkzl?= =?us-ascii?Q?7aQ42VyShYn340+HDhHjhQSRUKwhnoPq1MqUFTR+raYXBFMP1J4Iki/60daQ?= =?us-ascii?Q?A/IUqcefOqNwFtK0uTjPfNM7T8YKqhUnNYE/C7VyiCMjephaqYUrxJtdidGx?= =?us-ascii?Q?JIP99kdNH+muECvN13naUDOcioze4qSfgNMXSDfXLKUT0HAfdhT9c2aPNsqM?= =?us-ascii?Q?5GzVTeWlFMgbaKiLW9Vgv6Y9OZBf0B0wV4HH3DzU3ksDCyH+HddUVFll3nVj?= =?us-ascii?Q?Mz1S3jboKHivsiUGpJiNY+sbx9QK8VlZOemuaXrquZsYelCavlwqeTdzUSsD?= =?us-ascii?Q?6nnrhnCIhSpMD/z03NP8Bw1EGX61D2n0Qkd8MPz9sr364fUv6p9qQTNWNnGE?= =?us-ascii?Q?bewBF9WPIcfufO9dl4bFnmo7oW888yeZVssSPFW0BiGE+2O0fpiUX0Aq8pI1?= =?us-ascii?Q?aPh74bQtoZtjsy9IQPQfhonpsjjO6IaXyoL107TyjYF66rBwIDSvsYf9xcpg?= =?us-ascii?Q?s64NyUjwUDlUdrVLH6F1y/3pu8Rrh/9B3065JjUR44BdqLFIJ2B3V21xsz3g?= =?us-ascii?Q?DtYXnzjEy/CCgYTBwHJTFatPcV8Zrhg7d42eu1ESc8NVDyzP1UBfIu37gGW3?= =?us-ascii?Q?zLG+Q7euvbfFScIrA/gZYu89zAQ/QdsBydRmzAgVggk8t6O82YPasgh9VGxL?= =?us-ascii?Q?terTuSjfFrCrvms=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(376014)(36860700013)(34020700016)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Apr 2025 00:50:10.7100 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 64a27bf4-b9a0-488d-cdcd-08dd70b727eb X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00020E64.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB8226 The little endian implementation of bitmap_to_xenctl_bitmap leads to unnecessary xmallocs and xfrees. Given that Xen only supports little endian architectures, it is worth optimizing. This patch removes the need for the xmalloc on little endian architectures. Remove clamp_last_byte as it is only called once and only needs to modify one byte. Inline it. Signed-off-by: Stefano Stabellini --- Changes in v4: - improve commit message - remove clamp_last_byte --- xen/common/bitmap.c | 64 +++++++++++++++++++++++++++------------------ 1 file changed, 38 insertions(+), 26 deletions(-) diff --git a/xen/common/bitmap.c b/xen/common/bitmap.c index 3da63a32a6..10d19f4c0d 100644 --- a/xen/common/bitmap.c +++ b/xen/common/bitmap.c @@ -40,21 +40,6 @@ * for the best explanations of this ordering. */ -/* - * If a bitmap has a number of bits which is not a multiple of 8 then - * the last few bits of the last byte of the bitmap can be - * unexpectedly set which can confuse consumers (e.g. in the tools) - * who also round up their loops to 8 bits. Ensure we clear those left - * over bits so as to prevent surprises. - */ -static void clamp_last_byte(uint8_t *bp, unsigned int nbits) -{ - unsigned int remainder = nbits % 8; - - if (remainder) - bp[nbits/8] &= (1U << remainder) - 1; -} - int __bitmap_empty(const unsigned long *bitmap, unsigned int bits) { int k, lim = bits/BITS_PER_LONG; @@ -338,7 +323,6 @@ static void bitmap_long_to_byte(uint8_t *bp, const unsigned long *lp, nbits -= 8; } } - clamp_last_byte(bp, nbits); } static void bitmap_byte_to_long(unsigned long *lp, const uint8_t *bp, @@ -363,7 +347,6 @@ static void bitmap_long_to_byte(uint8_t *bp, const unsigned long *lp, unsigned int nbits) { memcpy(bp, lp, DIV_ROUND_UP(nbits, BITS_PER_BYTE)); - clamp_last_byte(bp, nbits); } static void bitmap_byte_to_long(unsigned long *lp, const uint8_t *bp, @@ -377,6 +360,13 @@ static void bitmap_byte_to_long(unsigned long *lp, const uint8_t *bp, #endif +/* + * If a bitmap has a number of bits which is not a multiple of 8 then + * the last few bits of the last byte of the bitmap can be + * unexpectedly set which can confuse consumers (e.g. in the tools) + * who also round up their loops to 8 bits. Ensure we clear those left + * over bits so as to prevent surprises. + */ int bitmap_to_xenctl_bitmap(struct xenctl_bitmap *xenctl_bitmap, const unsigned long *bitmap, unsigned int nbits) { @@ -384,21 +374,43 @@ int bitmap_to_xenctl_bitmap(struct xenctl_bitmap *xenctl_bitmap, uint8_t zero = 0; int err = 0; unsigned int xen_bytes = DIV_ROUND_UP(nbits, BITS_PER_BYTE); - uint8_t *bytemap = xmalloc_array(uint8_t, xen_bytes); - - if ( !bytemap ) - return -ENOMEM; + uint8_t last; guest_bytes = DIV_ROUND_UP(xenctl_bitmap->nr_bits, BITS_PER_BYTE); copy_bytes = min(guest_bytes, xen_bytes); - bitmap_long_to_byte(bytemap, bitmap, nbits); + if ( IS_ENABLED(__BIG_ENDIAN) ) + { + uint8_t *bytemap = xmalloc_array(uint8_t, xen_bytes); - if ( copy_bytes && - copy_to_guest(xenctl_bitmap->bitmap, bytemap, copy_bytes) ) - err = -EFAULT; + if ( !bytemap ) + return -ENOMEM; - xfree(bytemap); + bitmap_long_to_byte(bytemap, bitmap, nbits); + last = bytemap[nbits / 8]; + + if ( copy_bytes > 1 && + copy_to_guest(xenctl_bitmap->bitmap, bytemap, copy_bytes - 1) ) + err = -EFAULT; + + xfree(bytemap); + } + else + { + const uint8_t *bytemap = (const uint8_t *)bitmap; + last = bytemap[nbits / 8]; + + if ( copy_bytes > 1 && + copy_to_guest(xenctl_bitmap->bitmap, bytemap, copy_bytes - 1) ) + err = -EFAULT; + } + + if ( nbits % 8 ) + last &= (1U << (nbits % 8)) - 1; + + if ( copy_bytes > 0 && + copy_to_guest_offset(xenctl_bitmap->bitmap, copy_bytes - 1, &last, 1) ) + err = -EFAULT; for ( i = copy_bytes; !err && i < guest_bytes; i++ ) if ( copy_to_guest_offset(xenctl_bitmap->bitmap, i, &zero, 1) ) -- 2.25.1 From xen-devel-bounces@lists.xenproject.org Tue Apr 01 00:52:48 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 00:52:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.933295.1335275 (Exim 4.92) (envelope-from ) id 1tzPrz-00012s-CB; Tue, 01 Apr 2025 00:52:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 933295.1335275; Tue, 01 Apr 2025 00:52:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzPrz-00012l-99; Tue, 01 Apr 2025 00:52:47 +0000 Received: by outflank-mailman (input) for mailman id 933295; Tue, 01 Apr 2025 00:52:45 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzPrw-00012a-GM for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 00:52:45 +0000 Received: from mail-10628.protonmail.ch (mail-10628.protonmail.ch [79.135.106.28]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 9d7e3286-0e93-11f0-9ffb-bf95429c2676; Tue, 01 Apr 2025 02:52:41 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 9d7e3286-0e93-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=proton.me; s=protonmail; t=1743468760; x=1743727960; bh=GFqthro3iq6tf+JDFaLzzXcjIdmu4fT0hxT+wTrVwBk=; h=Date:To:From:Cc:Subject:Message-ID:Feedback-ID:From:To:Cc:Date: Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector: List-Unsubscribe:List-Unsubscribe-Post; b=QFhMeFhIKw4VC9zjG3iF8PSy/PFNYiNAVIGDcC+het2nmyYd6qAfeJLPWD4C3aP0H 2B9yrrvCDG1iKVKmtOhtIEAgiHdQ8gPg1tBX7QnzMDpHTteZaF+pVObR1mzCSMkh4m UNEJH8F1PSbFp71G8ckpYTTtX3JsQ3bn3JNotqxBpc1GlrcWLc688uOXH6FKLaVd9p Sdw+5hIOfjyJR5w3f6MFLIhbbqBiqy7LScOF0/YYWEoa8pG8BZYAwX8sgWAzzO30H0 /mvJyjm2J4DrofsIZ/tG18ZQPVu784vmrPhsoWhknyyALSwybwSpLpQggEUMITOXZT 5jHXXg3IG+upA== Date: Tue, 01 Apr 2025 00:52:33 +0000 To: xen-devel@lists.xenproject.org From: dmkhn@proton.me Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com Subject: [PATCH v1 0/3] xen/domain: updates to hardware emulation flags Message-ID: <20250401005224.461325-1-dmukhin@ford.com> Feedback-ID: 123220910:user:proton X-Pm-Message-ID: 744bf75cc58d419b653e38a1aaca5637be21d919 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable The patch series introduces use of d->arch.emulation_flags for non-x86 platforms (patch 1) and hooks emulation_flags to 'q' keyhandler for debugging. emulation_flags on non-x86 systems will be used in the follow on virtual UARTs clean up series. Also, series adds helper macros (patch 2) which are used in re-write of emulation_flags_ok() on x86 (patch 3, depends on patch 2). Originally, the code was part of [1], part of NS16550 emulator v3 series. [1] https://lore.kernel.org/xen-devel/20250103-vuart-ns8250-v3-v1-6-c5d36b3= 1d66c@ford.com/ [2] Link to CI run: https://gitlab.com/xen-project/people/dmukhin/xen/-/pip= elines/1745622772 Denis Mukhin (3): xen/domain: introduce non-x86 hardware emulation flags x86/domain: add helpers to simplify emulation flags management xen/domain: rewrite emulation_flags_ok() tools/python/xen/lowlevel/xc/xc.c | 4 +--- xen/arch/arm/include/asm/domain.h | 2 ++ xen/arch/ppc/include/asm/domain.h | 2 ++ xen/arch/riscv/include/asm/domain.h | 2 ++ xen/arch/x86/domain.c | 29 +++++++++++------------------ xen/arch/x86/include/asm/domain.h | 2 +- xen/common/keyhandler.c | 1 + xen/include/public/arch-x86/xen.h | 7 +++++++ 8 files changed, 27 insertions(+), 22 deletions(-) --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue Apr 01 00:52:48 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 00:52:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.933296.1335281 (Exim 4.92) (envelope-from ) id 1tzPrz-00016E-M6; Tue, 01 Apr 2025 00:52:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 933296.1335281; Tue, 01 Apr 2025 00:52:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzPrz-00015V-HQ; Tue, 01 Apr 2025 00:52:47 +0000 Received: by outflank-mailman (input) for mailman id 933296; Tue, 01 Apr 2025 00:52:46 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzPry-00012a-4g for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 00:52:46 +0000 Received: from mail-10630.protonmail.ch (mail-10630.protonmail.ch [79.135.106.30]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 9f4d30db-0e93-11f0-9ffb-bf95429c2676; Tue, 01 Apr 2025 02:52:44 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 9f4d30db-0e93-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=proton.me; s=protonmail; t=1743468763; x=1743727963; bh=VbGdRQcIdJuxOnTDcd1yoix3INOLV2Z0Txcr2KwDyRY=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector:List-Unsubscribe:List-Unsubscribe-Post; b=BrRU3CUwzP0YzrmSowanjdjabarJvCg4qgtATyyKwb/5lPSYRatEF4D+XolhR2xlj tRu2seO2BrG0Jo2rmzBcDtl7xo/cwHrFZdRLUweGq7p3FDtVbuohaQ0Lr4RKsEwHjY WG+nS/byz1ps5lDL3mbD4VUsSrJtpCz7QXq6I2oOMWMiknWNyeYpU21gfJyO5c9GhJ ADTrkUdPbSa2rdE7QaRmS+AVOSGf8TzR045NVY11WPlkG+Bwh/GRWUj4cJx3KezORg 6rjE1hivbAw8LWNHwO7d3Mxb0THqXvMskcZHKI+fZZGTPcXy2M/v4hbu0Q99mTWKpd QKD6bOvzWYXjg== Date: Tue, 01 Apr 2025 00:52:38 +0000 To: xen-devel@lists.xenproject.org From: dmkhn@proton.me Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com Subject: [PATCH v1 1/3] xen/domain: introduce non-x86 hardware emulation flags Message-ID: <20250401005224.461325-2-dmukhin@ford.com> In-Reply-To: <20250401005224.461325-1-dmukhin@ford.com> References: <20250401005224.461325-1-dmukhin@ford.com> Feedback-ID: 123220910:user:proton X-Pm-Message-ID: 18d18a5caa72342da17d3b5f5ef42323c57fea6b MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable From: Denis Mukhin Define per-architecture emulation_flags for configuring in-hypervisor emulators. Print d->arch.emulation_flags from 'q' keyhandler for better traceability while debugging in-hypervisor hardware emulators. Simplify the x86's emulation_flags description and make it consistent with newly introduced non-x86 descriptions. Signed-off-by: Denis Mukhin --- xen/arch/arm/include/asm/domain.h | 2 ++ xen/arch/ppc/include/asm/domain.h | 2 ++ xen/arch/riscv/include/asm/domain.h | 2 ++ xen/arch/x86/include/asm/domain.h | 2 +- xen/common/keyhandler.c | 1 + 5 files changed, 8 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/asm/d= omain.h index 50b6a4b009..279ff64fe0 100644 --- a/xen/arch/arm/include/asm/domain.h +++ b/xen/arch/arm/include/asm/domain.h @@ -119,6 +119,8 @@ struct arch_domain void *tee; #endif =20 + /* Hardware emulation flags. */ + uint32_t emulation_flags; } __cacheline_aligned; =20 struct arch_vcpu diff --git a/xen/arch/ppc/include/asm/domain.h b/xen/arch/ppc/include/asm/d= omain.h index 3a447272c6..8aa7b4a6ac 100644 --- a/xen/arch/ppc/include/asm/domain.h +++ b/xen/arch/ppc/include/asm/domain.h @@ -21,6 +21,8 @@ struct arch_vcpu { =20 struct arch_domain { struct hvm_domain hvm; + /* Hardware emulation flags. */ + uint32_t emulation_flags; }; =20 #include diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/a= sm/domain.h index c3d965a559..b561e6f4f8 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -18,6 +18,8 @@ struct arch_vcpu { =20 struct arch_domain { struct hvm_domain hvm; + /* Hardware emulation flags. */ + uint32_t emulation_flags; }; =20 #include diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm/d= omain.h index 5fc1d1e5d0..6b877e33a1 100644 --- a/xen/arch/x86/include/asm/domain.h +++ b/xen/arch/x86/include/asm/domain.h @@ -456,7 +456,7 @@ struct arch_domain /* Don't unconditionally inject #GP for unhandled MSRs. */ bool msr_relaxed; =20 - /* Emulated devices enabled bitmap. */ + /* Hardware emulation flags. */ uint32_t emulation_flags; } __cacheline_aligned; =20 diff --git a/xen/common/keyhandler.c b/xen/common/keyhandler.c index 0bb842ec00..73f5134b68 100644 --- a/xen/common/keyhandler.c +++ b/xen/common/keyhandler.c @@ -306,6 +306,7 @@ static void cf_check dump_domains(unsigned char key) if ( test_bit(i, &d->watchdog_inuse_map) ) printk(" watchdog %d expires in %d seconds\n", i, (u32)((d->watchdog_timer[i].expires - NOW()) >> = 30)); + printk(" emulation_flags %#x\n", d->arch.emulation_flags); =20 arch_dump_domain_info(d); =20 --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue Apr 01 00:52:52 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 00:52:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.933297.1335297 (Exim 4.92) (envelope-from ) id 1tzPs4-0001XU-0R; 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charset=utf-8 Content-Transfer-Encoding: quoted-printable From: Denis Mukhin Introduce XEN_X86_EMU_BASELINE and XEN_X86_EMU_OPTIONAL to simplify d->arch.emulation_flags management in the code. Signed-off-by: Denis Mukhin --- tools/python/xen/lowlevel/xc/xc.c | 4 +--- xen/include/public/arch-x86/xen.h | 7 +++++++ 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/tools/python/xen/lowlevel/xc/xc.c b/tools/python/xen/lowlevel/= xc/xc.c index 9feb12ae2b..2c01d47575 100644 --- a/tools/python/xen/lowlevel/xc/xc.c +++ b/tools/python/xen/lowlevel/xc/xc.c @@ -159,9 +159,7 @@ static PyObject *pyxc_domain_create(XcObject *self, =20 #if defined (__i386) || defined(__x86_64__) if ( config.flags & XEN_DOMCTL_CDF_hvm ) - config.arch.emulation_flags =3D XEN_X86_EMU_ALL & - ~(XEN_X86_EMU_VPCI | - XEN_X86_EMU_USE_PIRQ); + config.arch.emulation_flags =3D XEN_X86_EMU_BASELINE; #elif defined (__arm__) || defined(__aarch64__) config.arch.gic_version =3D XEN_DOMCTL_CONFIG_GIC_NATIVE; #else diff --git a/xen/include/public/arch-x86/xen.h b/xen/include/public/arch-x8= 6/xen.h index fc24879866..55802720f8 100644 --- a/xen/include/public/arch-x86/xen.h +++ b/xen/include/public/arch-x86/xen.h @@ -290,6 +290,13 @@ struct xen_arch_domainconfig { XEN_X86_EMU_VGA | XEN_X86_EMU_IOMMU |= \ XEN_X86_EMU_PIT | XEN_X86_EMU_USE_PIR= Q |\ XEN_X86_EMU_VPCI) + +#define XEN_X86_EMU_OPTIONAL (XEN_X86_EMU_VPCI | \ + XEN_X86_EMU_USE_PIRQ) + +#define XEN_X86_EMU_BASELINE (XEN_X86_EMU_ALL & ~XEN_X86_EMU_OPTION= AL) + + /* Hardware emulation flags. */ uint32_t emulation_flags; =20 /* --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue Apr 01 00:52:53 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 00:52:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.933299.1335306 (Exim 4.92) (envelope-from ) id 1tzPs5-0001ma-5x; Tue, 01 Apr 2025 00:52:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 933299.1335306; Tue, 01 Apr 2025 00:52:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzPs5-0001mO-2V; Tue, 01 Apr 2025 00:52:53 +0000 Received: by outflank-mailman (input) for mailman id 933299; Tue, 01 Apr 2025 00:52:52 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzPs4-0001Vj-0o for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 00:52:52 +0000 Received: from mail-10630.protonmail.ch (mail-10630.protonmail.ch [79.135.106.30]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id a379d6bf-0e93-11f0-9ea7-5ba50f476ded; Tue, 01 Apr 2025 02:52:51 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: a379d6bf-0e93-11f0-9ea7-5ba50f476ded DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=proton.me; s=protonmail; t=1743468770; x=1743727970; bh=B+nW3wpkgRHCfK9/oUXAoU8jQvHaLOWMAP0n+f15LaY=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector:List-Unsubscribe:List-Unsubscribe-Post; b=TA1rQmaHsgnCSk9bWlamhagyRoq/7zM0ah9oNGDruOiCQzpvt0xAq+lav9GnU23hq WpGxu3+TIyNOZ7G56HdBRZLKrU2YSeBc8qysNMuBlE5m7EBhbzt8/ktEnp0uxCufkI LA8R0lMwb3sy1n08vYdEu7IkGZrqDoNYr3zovDgJsQZ3KeoijX5zwPa58HiKgkwUxV vbwghoQAwJvb5+pqdHx3inwHP34igIIyM2+ciogKI7oe0zlol/7yg3c67jBeS9h265 c4wKHez1wuEh/yP4APKKiuvn2GT8f/LjvNaBP08nPD4olDnQWce41EWiOXl6OC9cSE /db/kQoU7MBng== Date: Tue, 01 Apr 2025 00:52:46 +0000 To: xen-devel@lists.xenproject.org From: dmkhn@proton.me Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com Subject: [PATCH v1 3/3] xen/domain: rewrite emulation_flags_ok() Message-ID: <20250401005224.461325-4-dmukhin@ford.com> In-Reply-To: <20250401005224.461325-1-dmukhin@ford.com> References: <20250401005224.461325-1-dmukhin@ford.com> Feedback-ID: 123220910:user:proton X-Pm-Message-ID: bee36f03c1d6eac652f496a7ccdb1508ba725863 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable From: Denis Mukhin Rewrite emulation_flags_ok() using XEN_X86_EMU_{OPTIONAL,BASELINE} to simplify future modifications. Signed-off-by: Denis Mukhin --- Came in the context of NS16550 emulator v3 series: https://lore.kernel.org/xen-devel/20250103-vuart-ns8250-v3-v1-0-c5d36b31d= 66c@ford.com/ After modifying emulation_flags_ok() with a new NS16550 vUART configuration switch passed from the toolstack for the HVM case, I decided to look into how to improve emulation_flags_ok(). --- xen/arch/x86/domain.c | 29 +++++++++++------------------ 1 file changed, 11 insertions(+), 18 deletions(-) diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index 15c5e2a652..23051bb176 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -750,25 +750,18 @@ static bool emulation_flags_ok(const struct domain *d= , uint32_t emflags) BUILD_BUG_ON(X86_EMU_ALL !=3D XEN_X86_EMU_ALL); #endif =20 - if ( is_hvm_domain(d) ) - { - if ( is_hardware_domain(d) && - emflags !=3D (X86_EMU_VPCI | X86_EMU_LAPIC | X86_EMU_IOAPIC) = ) - return false; - if ( !is_hardware_domain(d) && - /* HVM PIRQ feature is user-selectable. */ - (emflags & ~X86_EMU_USE_PIRQ) !=3D - (X86_EMU_ALL & ~(X86_EMU_VPCI | X86_EMU_USE_PIRQ)) && - emflags !=3D X86_EMU_LAPIC ) - return false; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: GV1PR03MB10456.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 399a3fc3-8d76-4b02-68f6-08dd70bb064b X-MS-Exchange-CrossTenant-originalarrivaltime: 01 Apr 2025 01:17:51.9544 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: T7+UJ9blVH+nnhdI5iEPRDZCA9vRPblO5Gjod5i2A8fMYI+rg4NXqSNdfswlmS21fV/GDNtAmorupBKIBoq5eeymKCeRZ/g5kca8iKM4zFA= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PA4PR03MB6703 Condition coverage, also known as MC/DC (modified condition/decision coverage) is a coverage metric that tracks separate outcomes in boolean expressions. This patch adds CONFIG_CONDITION_COVERAGE option to enable MC/DC for GCC. Clang is not supported right now. Signed-off-by: Volodymyr Babchuk --- Changes in v3: - Introduced CC_HAS_MCDC that checks if compiler supports required feature Changes in v2: - Move gcc version check from .c file to Rules.mk (I can't find an easy way to check GCC version at Kconfig level) - Check for gcc 14, not gcc 14.1 --- xen/Kconfig | 5 +++++ xen/Kconfig.debug | 9 +++++++++ xen/Rules.mk | 3 +++ 3 files changed, 17 insertions(+) diff --git a/xen/Kconfig b/xen/Kconfig index 2128f0ccfc..2bdebfc808 100644 --- a/xen/Kconfig +++ b/xen/Kconfig @@ -41,6 +41,11 @@ config CC_SPLIT_SECTIONS config CC_HAS_UBSAN def_bool $(cc-option,-fsanitize=3Dundefined) =20 +# Compiler supports -fcondition-coverage aka MC/DC +config CC_HAS_MCDC + def_bool $(cc-option,-fcondition-coverage) + + # Set code alignment. # # Allow setting on a boolean basis, and then convert such selection to an diff --git a/xen/Kconfig.debug b/xen/Kconfig.debug index f7cc5ffaab..f89cbd823b 100644 --- a/xen/Kconfig.debug +++ b/xen/Kconfig.debug @@ -44,6 +44,15 @@ config COVERAGE =20 If unsure, say N here. =20 +config CONDITION_COVERAGE + bool "Condition coverage support" + depends on COVERAGE && CC_HAS_MCDC + help + Enable condition coverage support. Used for collecting MC/DC + (Modified Condition/Decision Coverage) metrics. + + If unsure, say N here. + config DEBUG_LOCK_PROFILE bool "Lock Profiling" select DEBUG_LOCKS diff --git a/xen/Rules.mk b/xen/Rules.mk index d759cccee3..0a2933cffa 100644 --- a/xen/Rules.mk +++ b/xen/Rules.mk @@ -138,6 +138,9 @@ ifeq ($(CONFIG_CC_IS_CLANG),y) COV_FLAGS :=3D -fprofile-instr-generate -fcoverage-mapping else COV_FLAGS :=3D -fprofile-arcs -ftest-coverage +ifeq ($(CONFIG_CONDITION_COVERAGE),y) + COV_FLAGS +=3D -fcondition-coverage +endif endif =20 # Reset COV_FLAGS in cases where an objects has another one as prerequisit= e --=20 2.48.1 From xen-devel-bounces@lists.xenproject.org Tue Apr 01 01:18:01 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 01:18:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.933347.1335322 (Exim 4.92) (envelope-from ) id 1tzQGL-0006qk-7l; Tue, 01 Apr 2025 01:17:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 933347.1335322; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: GV1PR03MB10456.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 20e60f01-19eb-45c7-a7ff-08dd70bb05fb X-MS-Exchange-CrossTenant-originalarrivaltime: 01 Apr 2025 01:17:51.3584 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: gG6QQC3pAHoXU74YI2PAH+aXxp7SoU478Ny1RiL4L+4ww0mvZiTuwQ81UqivtU1ZaWQ4TapRktT2FULl2PbHsvgq0/lIQs2oQmix0+dz11c= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PA4PR03MB6703 gcc 14 (with patch "Add condition coverage (MC/DC)") introduced 9th gcov counter. Also this version can call new merge function __gcov_merge_ior(), so we need a new stub for it. Signed-off-by: Volodymyr Babchuk Reviewed-by: Jan Beulich --- Changes in v3: - Added Jan's R-b tag Changes is v2: - Check for gcc 14, not gcc 14.1 --- xen/common/coverage/gcc_4_7.c | 4 +++- xen/common/coverage/gcov_base.c | 5 +++++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/xen/common/coverage/gcc_4_7.c b/xen/common/coverage/gcc_4_7.c index 1c20e35ee5..f4c1802303 100644 --- a/xen/common/coverage/gcc_4_7.c +++ b/xen/common/coverage/gcc_4_7.c @@ -28,8 +28,10 @@ #define GCOV_COUNTERS 10 #elif GCC_VERSION < 100000 #define GCOV_COUNTERS 9 -#else +#elif GCC_VERSION < 140000 #define GCOV_COUNTERS 8 +#else +#define GCOV_COUNTERS 9 #endif =20 #define GCOV_TAG_FUNCTION_LENGTH 3 diff --git a/xen/common/coverage/gcov_base.c b/xen/common/coverage/gcov_bas= e.c index d0c6d0a3f9..742034e039 100644 --- a/xen/common/coverage/gcov_base.c +++ b/xen/common/coverage/gcov_base.c @@ -56,6 +56,11 @@ void __gcov_merge_delta(gcov_type *counters, unsigned in= t n_counters) /* Unused. */ } =20 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Peter Anvin" To: Andrew Cooper , "Xin Li (Intel)" , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-edac@vger.kernel.org, kvm@vger.kernel.org, xen-devel@lists.xenproject.org, linux-ide@vger.kernel.org, linux-pm@vger.kernel.org, bpf@vger.kernel.org, llvm@lists.linux.dev CC: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, jgross@suse.com, peterz@infradead.org, acme@kernel.org, namhyung@kernel.org, mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org, irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com, wei.liu@kernel.org, ajay.kaher@broadcom.com, alexey.amakhalov@broadcom.com, bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com, pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com, luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com, haiyangz@microsoft.com, decui@microsoft.com Subject: =?US-ASCII?Q?Re=3A_=5BRFC_PATCH_v1_01/15=5D_x86/msr=3A_Re?= =?US-ASCII?Q?place_=5F=5Fwrmsr=28=29_with_native=5Fwrmsrl=28=29?= User-Agent: K-9 Mail for Android In-Reply-To: <0da43a86-81b0-4388-b47b-3a76b15f2a4c@citrix.com> References: <20250331082251.3171276-1-xin@zytor.com> <20250331082251.3171276-2-xin@zytor.com> <0da43a86-81b0-4388-b47b-3a76b15f2a4c@citrix.com> Message-ID: <03874E9B-FAEB-4ACA-B13D-0BED7D54F443@zytor.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On March 31, 2025 2:45:43 PM PDT, Andrew Cooper wrote: >On 31/03/2025 9:22 am, Xin Li (Intel) wrote: >> __wrmsr() is the lowest level primitive MSR write API, and its direct >> use is NOT preferred=2E Use its wrapper function native_wrmsrl() inste= ad=2E >> >> No functional change intended=2E >> >> Signed-off-by: Xin Li (Intel) > >The critical piece of information you're missing from the commit message >is that the MSR_IMM instructions take a single u64=2E > >Therefore to use them, you've got to arrange for all callers to provide >a single u64, rather than a split u32 pair=2E > >~Andrew That being said, there is nothing wrong with having a two-word convenience= wrapper=2E From xen-devel-bounces@lists.xenproject.org Tue Apr 01 05:30:11 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 05:30:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.933427.1335375 (Exim 4.92) (envelope-from ) id 1tzUCM-0004O4-Bi; Tue, 01 Apr 2025 05:30:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 933427.1335375; Tue, 01 Apr 2025 05:30:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzUCM-0004Nw-80; Tue, 01 Apr 2025 05:30:06 +0000 Received: by outflank-mailman (input) for mailman id 933427; Tue, 01 Apr 2025 05:30:05 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzUCK-00049U-Ud for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 05:30:04 +0000 Received: from mail.zytor.com (unknown [2607:7c80:54:3::138]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 5bbbcdcc-0eba-11f0-9ea7-5ba50f476ded; Tue, 01 Apr 2025 07:30:03 +0200 (CEST) Received: from [192.168.7.202] ([71.202.166.45]) (authenticated bits=0) by mail.zytor.com (8.18.1/8.17.1) with ESMTPSA id 5315TLRJ3578162 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NO); Mon, 31 Mar 2025 22:29:22 -0700 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 5bbbcdcc-0eba-11f0-9ea7-5ba50f476ded DKIM-Filter: OpenDKIM Filter v2.11.0 mail.zytor.com 5315TLRJ3578162 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=zytor.com; s=2025032001; t=1743485364; bh=tuYUVWHXKKCOA8JUjduDbXOfJ32573HPzEBPhF28G1U=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=PuNRo8V6ftJc3Js38Xt4+TPl7kcUwg2H/x5pUpEyYzi5yh4DDLkLlfTh1+cPv15Ju dWziFt2BjmW6G8CLCEsUhjN9zmSFpxd5hIVv9cdXt52fpANXDQAF4mQigMq0+0E0CE 7/6oUfZw2t3Ler+zOXMQ8swzm01cbejNDrBEd8Q2Z5fBJmEFZL9uYdaS0txe/IvZ/i e5OGXzLYWtkOw6AtYS5H4IMxdvILUBb9AFccmBXaVWsdDmNMkIr7xMXEIHaglNHoxU yMzPh3IKZ+Ue5Am3ilhBA2dMtkCPTsFDGLanh6aCEHH/0mNg/Lm28JEuiML1/KzRw6 RrhgzdOxIVCTw== Message-ID: <0084e9a9-8247-456f-b1a5-c5cd7bb62710@zytor.com> Date: Mon, 31 Mar 2025 22:29:21 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH v1 01/15] x86/msr: Replace __wrmsr() with native_wrmsrl() To: "H. Peter Anvin" , Andrew Cooper , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-edac@vger.kernel.org, kvm@vger.kernel.org, xen-devel@lists.xenproject.org, linux-ide@vger.kernel.org, linux-pm@vger.kernel.org, bpf@vger.kernel.org, llvm@lists.linux.dev Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, jgross@suse.com, peterz@infradead.org, acme@kernel.org, namhyung@kernel.org, mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org, irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com, wei.liu@kernel.org, ajay.kaher@broadcom.com, alexey.amakhalov@broadcom.com, bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com, pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com, luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com, haiyangz@microsoft.com, decui@microsoft.com References: <20250331082251.3171276-1-xin@zytor.com> <20250331082251.3171276-2-xin@zytor.com> <0da43a86-81b0-4388-b47b-3a76b15f2a4c@citrix.com> <03874E9B-FAEB-4ACA-B13D-0BED7D54F443@zytor.com> Content-Language: en-US From: Xin Li Autocrypt: addr=xin@zytor.com; keydata= xsDNBGUPz1cBDACS/9yOJGojBFPxFt0OfTWuMl0uSgpwk37uRrFPTTLw4BaxhlFL0bjs6q+0 2OfG34R+a0ZCuj5c9vggUMoOLdDyA7yPVAJU0OX6lqpg6z/kyQg3t4jvajG6aCgwSDx5Kzg5 Rj3AXl8k2wb0jdqRB4RvaOPFiHNGgXCs5Pkux/qr0laeFIpzMKMootGa4kfURgPhRzUaM1vy bsMsL8vpJtGUmitrSqe5dVNBH00whLtPFM7IbzKURPUOkRRiusFAsw0a1ztCgoFczq6VfAVu raTye0L/VXwZd+aGi401V2tLsAHxxckRi9p3mc0jExPc60joK+aZPy6amwSCy5kAJ/AboYtY VmKIGKx1yx8POy6m+1lZ8C0q9b8eJ8kWPAR78PgT37FQWKYS1uAroG2wLdK7FiIEpPhCD+zH wlslo2ETbdKjrLIPNehQCOWrT32k8vFNEMLP5G/mmjfNj5sEf3IOKgMTMVl9AFjsINLHcxEQ 6T8nGbX/n3msP6A36FDfdSEAEQEAAc0WWGluIExpIDx4aW5Aenl0b3IuY29tPsLBDQQTAQgA NxYhBIUq/WFSDTiOvUIqv2u9DlcdrjdRBQJlD89XBQkFo5qAAhsDBAsJCAcFFQgJCgsFFgID AQAACgkQa70OVx2uN1HUpgv/cM2fsFCQodLArMTX5nt9yqAWgA5t1srri6EgS8W3F+3Kitge tYTBKu6j5BXuXaX3vyfCm+zajDJN77JHuYnpcKKr13VcZi1Swv6Jx1u0II8DOmoDYLb1Q2ZW v83W55fOWJ2g72x/UjVJBQ0sVjAngazU3ckc0TeNQlkcpSVGa/qBIHLfZraWtdrNAQT4A1fa sWGuJrChBFhtKbYXbUCu9AoYmmbQnsx2EWoJy3h7OjtfFapJbPZql+no5AJ3Mk9eE5oWyLH+ QWqtOeJM7kKvn/dBudokFSNhDUw06e7EoVPSJyUIMbYtUO7g2+Atu44G/EPP0yV0J4lRO6EA wYRXff7+I1jIWEHpj5EFVYO6SmBg7zF2illHEW31JAPtdDLDHYcZDfS41caEKOQIPsdzQkaQ oW2hchcjcMPAfyhhRzUpVHLPxLCetP8vrVhTvnaZUo0xaVYb3+wjP+D5j/3+hwblu2agPsaE vgVbZ8Fx3TUxUPCAdr/p73DGg57oHjgezsDNBGUPz1gBDAD4Mg7hMFRQqlzotcNSxatlAQNL MadLfUTFz8wUUa21LPLrHBkUwm8RujehJrzcVbPYwPXIO0uyL/F///CogMNx7Iwo6by43KOy g89wVFhyy237EY76j1lVfLzcMYmjBoTH95fJC/lVb5Whxil6KjSN/R/y3jfG1dPXfwAuZ/4N cMoOslWkfZKJeEut5aZTRepKKF54T5r49H9F7OFLyxrC/uI9UDttWqMxcWyCkHh0v1Di8176 jjYRNTrGEfYfGxSp+3jYL3PoNceIMkqM9haXjjGl0W1B4BidK1LVYBNov0rTEzyr0a1riUrp Qk+6z/LHxCM9lFFXnqH7KWeToTOPQebD2B/Ah5CZlft41i8L6LOF/LCuDBuYlu/fI2nuCc8d m4wwtkou1Y/kIwbEsE/6RQwRXUZhzO6llfoN96Fczr/RwvPIK5SVMixqWq4QGFAyK0m/1ap4 bhIRrdCLVQcgU4glo17vqfEaRcTW5SgX+pGs4KIPPBE5J/ABD6pBnUUAEQEAAcLA/AQYAQgA JhYhBIUq/WFSDTiOvUIqv2u9DlcdrjdRBQJlD89ZBQkFo5qAAhsMAAoJEGu9DlcdrjdR4C0L /RcjolEjoZW8VsyxWtXazQPnaRvzZ4vhmGOsCPr2BPtMlSwDzTlri8BBG1/3t/DNK4JLuwEj OAIE3fkkm+UG4Kjud6aNeraDI52DRVCSx6xff3bjmJsJJMb12mWglN6LjdF6K+PE+OTJUh2F dOhslN5C2kgl0dvUuevwMgQF3IljLmi/6APKYJHjkJpu1E6luZec/lRbetHuNFtbh3xgFIJx 2RpgVDP4xB3f8r0I+y6ua+p7fgOjDLyoFjubRGed0Be45JJQEn7A3CSb6Xu7NYobnxfkwAGZ Q81a2XtvNS7Aj6NWVoOQB5KbM4yosO5+Me1V1SkX2jlnn26JPEvbV3KRFcwV5RnDxm4OQTSk PYbAkjBbm+tuJ/Sm+5Yp5T/BnKz21FoCS8uvTiziHj2H7Cuekn6F8EYhegONm+RVg3vikOpn gao85i4HwQTK9/D1wgJIQkdwWXVMZ6q/OALaBp82vQ2U9sjTyFXgDjglgh00VRAHP7u1Rcu4 l75w1xInsg== In-Reply-To: <03874E9B-FAEB-4ACA-B13D-0BED7D54F443@zytor.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 3/31/2025 10:13 PM, H. Peter Anvin wrote: > On March 31, 2025 2:45:43 PM PDT, Andrew Cooper wrote: >> On 31/03/2025 9:22 am, Xin Li (Intel) wrote: >>> __wrmsr() is the lowest level primitive MSR write API, and its direct >>> use is NOT preferred. Use its wrapper function native_wrmsrl() instead. >>> >>> No functional change intended. >>> >>> Signed-off-by: Xin Li (Intel) >> >> The critical piece of information you're missing from the commit message >> is that the MSR_IMM instructions take a single u64. >> >> Therefore to use them, you've got to arrange for all callers to provide >> a single u64, rather than a split u32 pair. >> >> ~Andrew > > That being said, there is nothing wrong with having a two-word convenience wrapper. > Yes, I ended up keeping the two-word convenience wrapper in this patch set, and the wrapper calls a lower level API that takes a u64 argument. And yes, as Ingo said, some of the conversion is NOT an improvement. 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list Sender: "Xen-devel" X-Inumbo-ID: 6fd08b3b-0ebc-11f0-9ffb-bf95429c2676 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=SzZcgZwzVmInpqVGQSCuANdfzOdjWftqICybpD0mURxvsr8N9Lm0QWz0KPrDC1rjU8DSZLEQdv7ubVPtN2LGWufxSKIOGKagYJn15oTpwGmLvv1vZIHi60UJR7ZTSiTgSW0vwVq5gkJul/Ll+LCxgSt1K5u6v6S0EPtm7sKZZ+cexSqlK2eekAHuqtY34r/OdQ+p0X84jfv93BHiJbtgepQix4lqGXsmo+BmRsUKJCt14WtDD8IhqCxqT4syKcZRDc9eP/j6xtUi4qix4nS51/enA5uGGBIE22efSj166GzZBU3eGuigASeLr6nh/v2ncXj/wP2FuTF+NANWM0me9A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=6n4B6Jc20zwFIFzFziY1e68w/DqumTRMr2U5rS0iJ1I=; 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Michal" , Julien Grall , =?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= , Stefano Stabellini , "xen-devel@lists.xenproject.org" Subject: RE: [PATCH v3 03/15] xen/cpufreq: refactor cmdline "cpufreq=xxx" Thread-Topic: [PATCH v3 03/15] xen/cpufreq: refactor cmdline "cpufreq=xxx" Thread-Index: AQHbjnNpEkvZJyYnHka7avkYmH1MUrOCfisAgAKWJuCAAEZ9gIAJF6sQ Date: Tue, 1 Apr 2025 05:44:50 +0000 Message-ID: References: <20250306083949.1503385-1-Penny.Zheng@amd.com> <20250306083949.1503385-4-Penny.Zheng@amd.com> <80963bfa-a19e-49a7-8de2-0d8508af450f@suse.com> <94160460-357a-4852-b56d-3d89febd0e68@suse.com> In-Reply-To: <94160460-357a-4852-b56d-3d89febd0e68@suse.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: msip_labels: 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Subject: Re: [RFC PATCH v1 01/15] x86/msr: Replace __wrmsr() with native_wrmsrl() To: "H. Peter Anvin" , Ingo Molnar Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-edac@vger.kernel.org, kvm@vger.kernel.org, xen-devel@lists.xenproject.org, linux-ide@vger.kernel.org, linux-pm@vger.kernel.org, bpf@vger.kernel.org, llvm@lists.linux.dev, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com, peterz@infradead.org, acme@kernel.org, namhyung@kernel.org, mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org, irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com, wei.liu@kernel.org, ajay.kaher@broadcom.com, alexey.amakhalov@broadcom.com, bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com, pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com, luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com, haiyangz@microsoft.com, decui@microsoft.com References: <20250331082251.3171276-1-xin@zytor.com> <20250331082251.3171276-2-xin@zytor.com> <9D15DE81-2E68-4FCD-A133-4963602E18C9@zytor.com> Content-Language: en-US From: Xin Li Autocrypt: addr=xin@zytor.com; keydata= xsDNBGUPz1cBDACS/9yOJGojBFPxFt0OfTWuMl0uSgpwk37uRrFPTTLw4BaxhlFL0bjs6q+0 2OfG34R+a0ZCuj5c9vggUMoOLdDyA7yPVAJU0OX6lqpg6z/kyQg3t4jvajG6aCgwSDx5Kzg5 Rj3AXl8k2wb0jdqRB4RvaOPFiHNGgXCs5Pkux/qr0laeFIpzMKMootGa4kfURgPhRzUaM1vy bsMsL8vpJtGUmitrSqe5dVNBH00whLtPFM7IbzKURPUOkRRiusFAsw0a1ztCgoFczq6VfAVu raTye0L/VXwZd+aGi401V2tLsAHxxckRi9p3mc0jExPc60joK+aZPy6amwSCy5kAJ/AboYtY VmKIGKx1yx8POy6m+1lZ8C0q9b8eJ8kWPAR78PgT37FQWKYS1uAroG2wLdK7FiIEpPhCD+zH wlslo2ETbdKjrLIPNehQCOWrT32k8vFNEMLP5G/mmjfNj5sEf3IOKgMTMVl9AFjsINLHcxEQ 6T8nGbX/n3msP6A36FDfdSEAEQEAAc0WWGluIExpIDx4aW5Aenl0b3IuY29tPsLBDQQTAQgA NxYhBIUq/WFSDTiOvUIqv2u9DlcdrjdRBQJlD89XBQkFo5qAAhsDBAsJCAcFFQgJCgsFFgID AQAACgkQa70OVx2uN1HUpgv/cM2fsFCQodLArMTX5nt9yqAWgA5t1srri6EgS8W3F+3Kitge tYTBKu6j5BXuXaX3vyfCm+zajDJN77JHuYnpcKKr13VcZi1Swv6Jx1u0II8DOmoDYLb1Q2ZW v83W55fOWJ2g72x/UjVJBQ0sVjAngazU3ckc0TeNQlkcpSVGa/qBIHLfZraWtdrNAQT4A1fa sWGuJrChBFhtKbYXbUCu9AoYmmbQnsx2EWoJy3h7OjtfFapJbPZql+no5AJ3Mk9eE5oWyLH+ QWqtOeJM7kKvn/dBudokFSNhDUw06e7EoVPSJyUIMbYtUO7g2+Atu44G/EPP0yV0J4lRO6EA wYRXff7+I1jIWEHpj5EFVYO6SmBg7zF2illHEW31JAPtdDLDHYcZDfS41caEKOQIPsdzQkaQ oW2hchcjcMPAfyhhRzUpVHLPxLCetP8vrVhTvnaZUo0xaVYb3+wjP+D5j/3+hwblu2agPsaE vgVbZ8Fx3TUxUPCAdr/p73DGg57oHjgezsDNBGUPz1gBDAD4Mg7hMFRQqlzotcNSxatlAQNL MadLfUTFz8wUUa21LPLrHBkUwm8RujehJrzcVbPYwPXIO0uyL/F///CogMNx7Iwo6by43KOy g89wVFhyy237EY76j1lVfLzcMYmjBoTH95fJC/lVb5Whxil6KjSN/R/y3jfG1dPXfwAuZ/4N cMoOslWkfZKJeEut5aZTRepKKF54T5r49H9F7OFLyxrC/uI9UDttWqMxcWyCkHh0v1Di8176 jjYRNTrGEfYfGxSp+3jYL3PoNceIMkqM9haXjjGl0W1B4BidK1LVYBNov0rTEzyr0a1riUrp Qk+6z/LHxCM9lFFXnqH7KWeToTOPQebD2B/Ah5CZlft41i8L6LOF/LCuDBuYlu/fI2nuCc8d m4wwtkou1Y/kIwbEsE/6RQwRXUZhzO6llfoN96Fczr/RwvPIK5SVMixqWq4QGFAyK0m/1ap4 bhIRrdCLVQcgU4glo17vqfEaRcTW5SgX+pGs4KIPPBE5J/ABD6pBnUUAEQEAAcLA/AQYAQgA JhYhBIUq/WFSDTiOvUIqv2u9DlcdrjdRBQJlD89ZBQkFo5qAAhsMAAoJEGu9DlcdrjdR4C0L /RcjolEjoZW8VsyxWtXazQPnaRvzZ4vhmGOsCPr2BPtMlSwDzTlri8BBG1/3t/DNK4JLuwEj OAIE3fkkm+UG4Kjud6aNeraDI52DRVCSx6xff3bjmJsJJMb12mWglN6LjdF6K+PE+OTJUh2F dOhslN5C2kgl0dvUuevwMgQF3IljLmi/6APKYJHjkJpu1E6luZec/lRbetHuNFtbh3xgFIJx 2RpgVDP4xB3f8r0I+y6ua+p7fgOjDLyoFjubRGed0Be45JJQEn7A3CSb6Xu7NYobnxfkwAGZ Q81a2XtvNS7Aj6NWVoOQB5KbM4yosO5+Me1V1SkX2jlnn26JPEvbV3KRFcwV5RnDxm4OQTSk PYbAkjBbm+tuJ/Sm+5Yp5T/BnKz21FoCS8uvTiziHj2H7Cuekn6F8EYhegONm+RVg3vikOpn gao85i4HwQTK9/D1wgJIQkdwWXVMZ6q/OALaBp82vQ2U9sjTyFXgDjglgh00VRAHP7u1Rcu4 l75w1xInsg== In-Reply-To: <9D15DE81-2E68-4FCD-A133-4963602E18C9@zytor.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 3/31/2025 1:32 PM, H. Peter Anvin wrote: > On March 31, 2025 3:17:30 AM PDT, Ingo Molnar wrote: >> >> * Xin Li (Intel) wrote: >> >>> - __wrmsr (MSR_AMD_DBG_EXTN_CFG, val | 3ULL << 3, val >> 32); >>> + native_wrmsrl(MSR_AMD_DBG_EXTN_CFG, val | 3ULL << 3); >> >> This is an improvement. >> >>> - __wrmsr (MSR_IA32_PQR_ASSOC, rmid_p, plr->closid); >>> + native_wrmsrl(MSR_IA32_PQR_ASSOC, (u64)plr->closid << 32 | rmid_p); >> >>> - __wrmsr (MSR_IA32_PQR_ASSOC, rmid_p, closid_p); >>> + native_wrmsrl(MSR_IA32_PQR_ASSOC, (u64)closid_p << 32 | rmid_p); >> >> This is not an improvement. >> >> Please provide a native_wrmsrl() API variant where natural [rmid_p, closid_p] >> high/lo parameters can be used, without the shift-uglification... >> >> Thanks, >> >> Ingo > > Directing this question primarily to Ingo, who is more than anyone else the namespace consistency guardian: > > On the subject of msr function naming ... *msrl() has always been misleading. The -l suffix usually means 32 bits; sometimes it means the C type "long" (which in the kernel is used instead of size_t/uintptr_t, which might end up being "fun" when 128-bit architectures appear some time this century), but for a fixed 64-but type we normally use -q. > > Should we rename the *msrl() functions to *msrq() as part of this overhaul? > Per "struct msr" defined in arch/x86/include/asm/shared/msr.h: struct msr { union { struct { u32 l; u32 h; }; u64 q; }; }; Probably *msrq() is what we want? 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To avoid re-ordering of items in the source file, simply put the few small items in sub-section 1, for them to end up after the page tables, followed (in the final binary) by non- page-aligned items from other CUs. Signed-off-by: Jan Beulich --- a/xen/arch/x86/boot/head.S +++ b/xen/arch/x86/boot/head.S @@ -136,6 +136,7 @@ multiboot2_header: .Lno_nx_msg: .asciz "ERR: Not an NX-capable CPU!" .section .init.data, "aw", @progbits + .subsection 1 /* Put data here after the page tables (in x86_64.S). */ .align 4 .word 0 From xen-devel-bounces@lists.xenproject.org Tue Apr 01 06:25:16 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 06:25:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.933477.1335416 (Exim 4.92) (envelope-from ) id 1tzV3T-0002aQ-Rp; Tue, 01 Apr 2025 06:24:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 933477.1335416; Tue, 01 Apr 2025 06:24:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzV3T-0002aJ-Oq; Tue, 01 Apr 2025 06:24:59 +0000 Received: by outflank-mailman (input) for mailman id 933477; Tue, 01 Apr 2025 06:24:58 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzV3S-0002aD-B5 for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 06:24:58 +0000 Received: from mail-wr1-x42c.google.com (mail-wr1-x42c.google.com [2a00:1450:4864:20::42c]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 07e41c1a-0ec2-11f0-9ea7-5ba50f476ded; Tue, 01 Apr 2025 08:24:57 +0200 (CEST) Received: by mail-wr1-x42c.google.com with SMTP id ffacd0b85a97d-391342fc1f6so4558447f8f.1 for ; Mon, 31 Mar 2025 23:24:56 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 31 Mar 2025 23:24:56 -0700 (PDT) Message-ID: Date: Tue, 1 Apr 2025 08:24:54 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1] xen/riscv: Increase XEN_VIRT_SIZE To: Julien Grall Cc: Alistair Francis , Bob Eshleman , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org, Oleksii Kurochko References: <54ebdcb7-071f-411f-803a-930dc330a497@suse.com> <6f0efa9a-876e-4ae1-9367-ccd89f51bab0@xen.org> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <6f0efa9a-876e-4ae1-9367-ccd89f51bab0@xen.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 31.03.2025 18:17, Julien Grall wrote: > On 31/03/2025 17:14, Jan Beulich wrote: >> On 31.03.2025 17:20, Oleksii Kurochko wrote: >>> A randconfig job failed with the following issue: >>> riscv64-linux-gnu-ld: Xen too large for early-boot assumptions >>> >>> The reason is that enabling the UBSAN config increased the size of >>> the Xen binary. >>> >>> Increase XEN_VIRT_SIZE to reserve enough space, allowing both UBSAN >>> and GCOV to be enabled together, with some slack for future growth. >> >> At some point you may want to use 2M mappings for .text (rx), .rodata >> (r), and .data (rw). > > OOI, why would we want to switch to 2MB? At least on Arm, Xen is tiny > enough that it can fit in less than a couple of MB. I would expect the > same for RISC-V. For TLB efficiency reasons for example. On x86 we switched to using 2Mb pages quite some time back, just to find that (at least) one of the bootloaders choked on the then larger binary. Hence we ended up with the XEN_ALIGN_2M Kconfig symbol plus the unconditional use of 2Mb mappings for xen.efi. For the original change see cf393624eec3 ("x86: use 2M superpages for text/data/bss mappings"). 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Mon, 31 Mar 2025 23:27:49 -0700 (PDT) Message-ID: Date: Tue, 1 Apr 2025 08:27:48 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 1/3] xen: gcov: add support for gcc 14 To: Volodymyr Babchuk Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , "xen-devel@lists.xenproject.org" References: <20250401011744.2267367-1-volodymyr_babchuk@epam.com> <20250401011744.2267367-2-volodymyr_babchuk@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20250401011744.2267367-2-volodymyr_babchuk@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 01.04.2025 03:17, Volodymyr Babchuk wrote: > gcc 14 (with patch "Add condition coverage (MC/DC)") introduced 9th > gcov counter. Also this version can call new merge function > __gcov_merge_ior(), so we need a new stub for it. > > Signed-off-by: Volodymyr Babchuk > Reviewed-by: Jan Beulich Any reason this got re-posted, when it was committed already? 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Mon, 31 Mar 2025 23:33:37 -0700 (PDT) Message-ID: Date: Tue, 1 Apr 2025 08:33:35 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 2/3] xen: x86: irq: use do-while loop in create_irq() To: Volodymyr Babchuk Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , "xen-devel@lists.xenproject.org" References: <20250401011744.2267367-1-volodymyr_babchuk@epam.com> <20250401011744.2267367-3-volodymyr_babchuk@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20250401011744.2267367-3-volodymyr_babchuk@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 01.04.2025 03:17, Volodymyr Babchuk wrote: > Changes in v3: > - Correct code style ("do {") > - Add comment describing why we need do { } while loop. > I prefer to leave do {} while because Nicola Vetrini > said that this approach might help with MISRA Rule 9.1 > without needing an explicit initializer. Just to mention it here as well - I still prefer the v1 form of the fix. Plus, for my taste, ... > --- a/xen/arch/x86/irq.c > +++ b/xen/arch/x86/irq.c > @@ -264,15 +264,24 @@ void __init clear_irq_vector(int irq) > > int create_irq(nodeid_t node, bool grant_access) > { > - int irq, ret; > + int ret; > + int irq = nr_irqs_gsi; > struct irq_desc *desc; > > - for (irq = nr_irqs_gsi; irq < nr_irqs; irq++) > - { > + if ( irq >= nr_irqs ) > + return -ENOSPC; > + > + /* > + * do { } while loop is used here to convince gcc14 that 'desc' is > + * really assigned. Otherwise with -Og or -fcondition-coverage it > + * may throw an false error stating that 'desc' may be used before > + * initialization. > + */ > + do { > desc = irq_to_desc(irq); > if (cmpxchg(&desc->arch.used, IRQ_UNUSED, IRQ_RESERVED) == IRQ_UNUSED) > break; > - } > + } while ( ++irq < nr_irqs ); ... the comment is now to verbose. See what I suggested as a comment for the v1 change, as a very rough example. Furthermore the question towards reporting the issue upstream still wasn't answered. There really would want to be a reference to the bug report in the description (or even the code comment) here. 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Mon, 31 Mar 2025 23:38:18 -0700 (PDT) Message-ID: <3cd17873-5905-4d2f-86cb-9875edd8025f@suse.com> Date: Tue, 1 Apr 2025 08:38:17 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 03/15] xen/cpufreq: refactor cmdline "cpufreq=xxx" To: "Penny, Zheng" Cc: "Huang, Ray" , Andrew Cooper , Anthony PERARD , "Orzel, Michal" , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , "xen-devel@lists.xenproject.org" References: <20250306083949.1503385-1-Penny.Zheng@amd.com> <20250306083949.1503385-4-Penny.Zheng@amd.com> <80963bfa-a19e-49a7-8de2-0d8508af450f@suse.com> <94160460-357a-4852-b56d-3d89febd0e68@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 01.04.2025 07:44, Penny, Zheng wrote: > [Public] > > Hi > >> -----Original Message----- >> From: Jan Beulich >> Sent: Wednesday, March 26, 2025 6:43 PM >> To: Penny, Zheng >> Cc: Huang, Ray ; Andrew Cooper >> ; Anthony PERARD ; >> Orzel, Michal ; Julien Grall ; Roger >> Pau Monné ; Stefano Stabellini ; >> xen-devel@lists.xenproject.org >> Subject: Re: [PATCH v3 03/15] xen/cpufreq: refactor cmdline "cpufreq=xxx" >> >> On 26.03.2025 08:20, Penny, Zheng wrote: >>>> -----Original Message----- >>>> From: Jan Beulich >>>> Sent: Monday, March 24, 2025 11:01 PM >>>> >>>> On 06.03.2025 09:39, Penny Zheng wrote: >>> Maybe I mis-understood the previous comment you said ``` >>> > else if ( IS_ENABLED(CONFIG_INTEL) && choice < 0 && >>> > ``` >>> >>> For the rest of this, I guess I'd prefer to see this in context. Also with >>> regard to the helper function's name. >>> ``` >>> I thought you suggested to introduce helper function to wrap the conditional >> codes... >>> Or may you were suggesting something like: >>> ``` >>> #ifdef CONFIG_INTEL >>> else if ( choice < 0 && !cmdline_strcmp(str, "hwp") ) { >>> xen_processor_pmbits |= XEN_PROCES >>> ... >>> } >>> #endif >>> ``` >> >> Was this reply of yours misplaced? It doesn't fit with the part of my reply in context >> above. Or maybe I'm not understanding what you mean to say. >> >>>> In the end I'm also not entirely convinced that we need these two >>>> almost identical helpers (with a 3rd likely appearing in a later patch). >> >> Instead it feels as if this response of yours was to this part of my comment. >> Indeed iirc I was suggesting to introduce a helper function. Note, however, the >> singular here as well as in your response above. >> > > Correct if I understood wrongly, you are suggesting that we shall use one single helper > function here to cover all scenarios, maybe as follows: > ``` > +static int __init handle_cpufreq_cmdline(const char *arg, const char *end, > + enum cpufreq_xen_opt option) > +{ > + int ret; > + > + if ( cpufreq_opts_contain(option) ) > + { > + const char *cpufreq_opts_str[] = { "CPUFREQ_xen", "CPUFREQ_hwp" }; > + > + printk(XENLOG_WARNING > + "Duplicate cpufreq driver option: %s", > + cpufreq_opts_str[option - 1]); > + return 0; > + } > + > + xen_processor_pmbits |= XEN_PROCESSOR_PM_PX; > + cpufreq_controller = FREQCTL_xen; > + cpufreq_xen_opts[cpufreq_xen_cnt++] = option; > + switch ( option ) > + { > + case CPUFREQ_hwp: > + if ( arg[0] && arg[1] ) > + ret = hwp_cmdline_parse(arg + 1, end); > + case CPUFREQ_xen: > + if ( arg[0] && arg[1] ) > + ret = cpufreq_cmdline_parse(arg + 1, end); > + default: > + ret = -EINVAL; > + } Apart from the switch() missing all break statements, the helper I was thinking of would end right before the switch(). The _cmdline_parse() calls would remain at the call sites of the helper. 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dmkhn@proton.me Cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, sstabellini@kernel.org, dmukhin@ford.com Subject: Re: [PATCH v1] x86/domain: revisit logging in arch_domain_create() Message-ID: References: <20250331213406.422725-1-dmukhin@ford.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20250331213406.422725-1-dmukhin@ford.com> On Mon, Mar 31, 2025 at 09:34:24PM +0000, dmkhn@proton.me wrote: > From: Denis Mukhin > > Use %pd in all logs issued from arch_domain_create(). > > Also, expand error message in arch_domain_create() under > !emulation_flags_ok() case to help debugging. > > Signed-off-by: Denis Mukhin > --- > The origin of the patch is: > https://lore.kernel.org/xen-devel/20250103-vuart-ns8250-v3-v1-6-c5d36b31d66c@ford.com/ > --- > xen/arch/x86/domain.c | 18 ++++++++++-------- > 1 file changed, 10 insertions(+), 8 deletions(-) > > diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c > index a42fa54805..15c5e2a652 100644 > --- a/xen/arch/x86/domain.c > +++ b/xen/arch/x86/domain.c > @@ -798,13 +798,12 @@ int arch_domain_create(struct domain *d, > { > if ( !opt_allow_unsafe ) > { > - printk(XENLOG_G_ERR "Xen does not allow DomU creation on this CPU" > - " for security reasons.\n"); > + printk(XENLOG_G_ERR "%pd: Xen does not allow DomU creation on this CPU" > + " for security reasons.\n", d); Since you are already touching this, I would switch to gprintk, and avoid splitting the lines: gprintk(XENLOG_ERR, "%pd: Xen does not allow DomU creation on this CPU for security reasons.\n", d); Same for the other messages below. > return -EPERM; > } > printk(XENLOG_G_WARNING > - "Dom%d may compromise security on this CPU.\n", > - d->domain_id); > + "%pd: domain may compromise security on this CPU.\n", d); > } > > emflags = config->arch.emulation_flags; > @@ -814,16 +813,19 @@ int arch_domain_create(struct domain *d, > > if ( emflags & ~XEN_X86_EMU_ALL ) > { > - printk(XENLOG_G_ERR "d%d: Invalid emulation bitmap: %#x\n", > - d->domain_id, emflags); > + printk(XENLOG_G_ERR "%pd: Invalid emulation bitmap: %#x\n", > + d, emflags); > return -EINVAL; > } > > if ( !emulation_flags_ok(d, emflags) ) > { > - printk(XENLOG_G_ERR "d%d: Xen does not allow %s domain creation " > + printk(XENLOG_G_ERR "%pd: Xen does not allow %s %sdomain creation " > "with the current selection of emulators: %#x\n", > - d->domain_id, is_hvm_domain(d) ? "HVM" : "PV", emflags); > + d, > + is_hvm_domain(d) ? "HVM" : "PV", > + is_hardware_domain(d) ? "(hardware) " : "", I wouldn't use parentheses around hardware, but that's just my taste. Thanks, Roger. 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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Apr 2025 07:46:03.9569 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 398599fd-4020-42ec-7ca2-08dd70f14139 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DB5PEPF00014B9C.eurprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU0PR08MB7461 Hi Julien, > On 30 Mar 2025, at 23:26, Julien Grall wrote: >=20 > Hi Bertrand, >=20 > On 27/03/2025 08:25, Bertrand Marquis wrote: >>> On 27 Mar 2025, at 00:14, Julien Grall wrote: >>>> +static int32_t ffa_get_sp_partinfo(uint32_t *uuid, uint32_t *sp_count= , >>>> + void *dst_buf, void *end_buf, >>>> + uint32_t dst_size) >>>> { >>>> int32_t ret; >>>> + uint32_t src_size, real_sp_count; >>>> + void *src_buf =3D ffa_rx; >>>> + uint32_t count =3D 0; >>>> + >>>> + /* Do we have a RX buffer with the SPMC */ >>>> + if ( !ffa_rx ) >>>> + return FFA_RET_DENIED; >>>> + >>>> + /* We need to use the RX buffer to receive the list */ >>>> + spin_lock(&ffa_rx_buffer_lock); >>>> + >>>> + ret =3D ffa_partition_info_get(uuid, 0, &real_sp_count, &src_size= ); >>>> + if ( ret ) >>>> + goto out; >>>> + >>>> + /* We now own the RX buffer */ >>>> + >>>> + /* We only support a 1.1 firmware version */ >>>> + if ( src_size < sizeof(struct ffa_partition_info_1_0) ) >>>> + { >>>> + ret =3D FFA_RET_NOT_SUPPORTED; >>>> + goto out_release; >>>> + } >>>> + >>>> + for ( uint32_t sp_num =3D 0; sp_num < real_sp_count; sp_num++ ) >>>=20 >>> What's the upper limit of real_sp_count? Asking just in case we need to= handle preemption. >> In theory that would be 32k but in practice the number of entries we can= receive is >> limited by the size of the exchange area we have with the secure world. >> This area is currently defined to be one page and each entry is 8 byte i= n the >> case where firmware is 1.0 (24 bytes otherwise). >> This is an upper limit of 500 entries. >> Now I do think this is completely unrealistic to imagine a secure world = with 500 SPs >> so If you are ok I would rather define an upper limit in Xen (I would sa= y 64 SPs) that >> can be changed in the code (through a define). >> This call currently does not support preemption in the FF-A spec (and th= at is something >> i will check for future versions) so I would have no solution to "contin= ue" it. >=20 >> Would the "define" solution be acceptable for now ? >=20 > I think the define solution is acceptable for now and possibly longer. It= is an easy way to avoid dealing with preemption. I will do something with a default value of 64 which should fit for now (an= d maybe longer). >=20 > [...] >=20 >=20 >>>> +static uint32_t ffa_get_vm_count(void) >>>=20 >>> Is this meant to be called often? If so, can we instead have a counter = that will be incremented when the vTEE is first initialized and then decrem= ented when the VM is destroyed? >> As of now we could have a global counter that we increase or decrease >> when a domain version is negociated and when a domain is destroyed. >> We could also have some kind of global save of the result to be returned >> to a guest. >> But I did not do that because: >> - cpu time required to update the list would be taken out an FF-A call >> for FFA_VERSION of a VM which would require a global lock to protect >> the data >=20 > I would have thought an atomic counter would be sufficient. Is there anyt= hing you had in mind? Very good idea. I only need to increase it when an FFA_VERSION has been negociated and decrease on VM destruction. I will do that. >=20 >> - when we will have filtering the data will be per VM (which would make >> the initial update more complex) >> - incoming we have a notion of UUID and filtering depending on the >> requested UUID which will make the global value only useable in a >> limited number of cases. >> I have 2 pending series on top of this one which would have to remove >> such optimisations. >> At the end this is definitely not something supposed to call often (linu= x >> driver is calling it once during init). >=20 > I think it was a mistake for me to asked whether this is called often or = not. When it comes to security, what matter is whether a malicious guest co= uld indirectly call ffa_get_vm_count() and delay any work on the pCPU (Xen = is not preemptible). >=20 > We don't have to resolve this now. But this will need to be addressed bef= ore we can we consider FFA security supported. So we should at least add it= in the list of issue at the top of the file. No this is really useful and I will fix it and also the partition info part= because: - all information is read only and known when the VM is created (VM ID, max= vcpus and 64bit or not) - I do not need anything else than that to build the result - If we can prevent to take a lock this will make the code better. So I will: - add an atomic to count the number of VMs with FF-A - create a chain list of VM FF-A contexts - add a context to the chain when a version is negociated - put the infos i need in the ffa ctx structure - just go through the list to build the partinfo result >=20 >>>=20 >>>> +{ >>>> + struct domain *d =3D current->domain; >>>> + struct domain *dom; >>>=20 >>> NIT: "d" and "dom" are a bit too close. Could we rename "d" with "curr_= d"? >> i will go with curr_d dest_d to make this clearer. >>>=20 >>>> + uint32_t vm_count =3D 0; >>>> + >>>> + /* Count the number of VM with FF-A support */ >>>=20 >>> This comment implies this is including the current VM. But ... >>>=20 >>>> + rcu_read_lock(&domlist_read_lock); >>>> + for_each_domain( dom ) >>>> + { >>>> + struct ffa_ctx *vm =3D dom->arch.tee; >>>> + >>>> + if ( dom !=3D d && vm !=3D NULL && vm->guest_vers !=3D 0 ) >>>=20 >>> ... here you are excluding it. Also, it sounds like this is support by = the OS rather than the VM itself. Is that correct? >> I have a comment to explain that one in a different serie that i will pu= t here. > > > Basically before 1.2, the spec was a bit blurry on if or not the resu= lt should include the >> calling VM and in fact Linux driver (before 1.2) was ending with an erro= r if its own data >> was included in the result hence this filter. >=20 > Thanks for the clarification. Just to clarify... >=20 >> I will add a comment for that. >=20 > ... will the comment be added in this patch? Yes i will add the comment in the next version of the patch. >=20 >>>=20 >>>> + vm_count++;> + } >>>> + rcu_read_unlock(&domlist_read_lock); >>>> +> + return vm_count; >>>=20 >>> OOI, I guess this value is just used as an hint? Asking because the num= ber of domains can change at any point. >> Definitely yes. The data is what it is when called but anything could ch= ange after. >> This is mostly used as hint by callers. >=20 > Does this mean we would always return a fixed number? Asking because this= would solve nicely the preemption problem in ffa_get_vm_count(). Well the number is changing when VMs are created or destroyed but as explai= n earlier i will modify the design to prevent the lock using an atomic and a chain list. Now the problem of the potential high number of VMs still stand so I will a= dd a todo for that and discuss with others to check if this could be solved= in the FF-A spec in the feature. Thanks a lot for the comments. I will work on v4 for when you get back :-) Cheers Bertrand From xen-devel-bounces@lists.xenproject.org Tue Apr 01 07:50:19 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 07:50:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.933573.1335487 (Exim 4.92) (envelope-from ) id 1tzWO2-0000Bb-Al; Tue, 01 Apr 2025 07:50:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 933573.1335487; Tue, 01 Apr 2025 07:50:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzWO2-0000BU-6N; Tue, 01 Apr 2025 07:50:18 +0000 Received: by outflank-mailman (input) for mailman id 933573; Tue, 01 Apr 2025 07:50:16 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzWO0-0000BO-JY for xen-devel@lists.xenproject.org; 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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Apr 2025 07:50:07.9683 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c9ac3e2e-78de-49dd-ab39-08dd70f1d2aa X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM4PEPF00027A5D.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: GV1PR08MB8380 Hi Julien, > On 30 Mar 2025, at 23:38, Julien Grall wrote: >=20 > Hi Bertrand, >=20 > On 27/03/2025 08:37, Bertrand Marquis wrote: >>> On 27 Mar 2025, at 00:41, Julien Grall wrote: >>>=20 >>> Hi Bertrand, >>>=20 >>> On 24/03/2025 13:53, Bertrand Marquis wrote: >>>> When VM to VM support is activated and there is no suitable FF-A suppo= rt >>>> in the firmware, enable FF-A support for VMs to allow using it for VM = to >>>> VM communications. >>>=20 >>> tee/ and the callbacks associated are meant to be used for mediatiors. = My current interpretation ist this is only meant to interpose between a gue= st and physical resources. Here you are extending the meaning to "virtual T= EE". I am sort of ok with that but ... >> I see what you mean but FF-A will not only be used to communicate with T= EE (even if the primary use case right now is this one, including have it i= n a VM instead of the secure world). > > >> >>>> If there is OP-TEE running in the secure world and using the non FF-A >>>> communication system, having CONFIG_FFA_VM_TO_VM could be non function= al >>>> (if optee is probed first) or OP-TEE could be non functional (if FF-A = is >>>> probed first) so it is not recommended to activate the configuration >>>> option for such systems. >>>=20 >>> ... this part is concerning me. You should be able to build with CONFIG= _FFA_VM_TO_VM and still boot when OP-TEE is present on the system. This is = not too critical now as this is tech preview but this is definitely a block= er for making FFA supported. Can this be mentioned at the top of the ffa.c = file (which already contains existing blocker)? >> OP-TEE supports FF-A and in fact should be switched to using it by defau= lt as it allows it to run in parallel of other TEEs in the secure world or = have FF-A compliant SPs running on top of OP-TEE. >> More and more you will see FF-A popping up as a recommended (or required= ) part of the firmware features. >> So the only reason to use OP-TEE without FF-A is if you have an old OP-T= EE in which case your firmware will not support FF-A and using it between V= Ms is probably not required. >=20 > Thanks for the clarification. I know we only support OP-TEE in Xen today,= but do you know what will happen for the other TEEs? Will they adopt FF-A? On Arm the idea is to make them adopt FF-A yes and it will be part of Syste= m Ready recommendations in the future. >=20 >>>=20 >>> Also, given this would expose a fully virtual TEE, we should be able to= have a system where you have some VMs talking FFA and some using the physi= cal OPTEE (or another TEE). Whether we want to support it is a different qu= estion but this design would prevent it. Is this intended? >> Right now i would say this is definitely not something we need as part o= f the tech preview as anybody using this feature in Xen would use an OP-TEE= with FF-A support. >> But from Xen point of view, we should (if we can) support running on old= systems with an existing OP-TEE but still use FF-A between VMs. >> This has some consequences on how the tee mediator and FF-A support is d= esigned and I will definitely give it some thoughts (primary idea would be = to decouple FF-A with secure as mediator to FF-A between VMs somehow). >=20 > I am not sure we need to decouple anything. Today, we can already specify= the type of the TEE used by a given VM (see tee_type). But we are enforcin= g the TEE type match the one of the current mediator. Yes for VMs this has to be specified explicitly, this was the idea behind t= he command line parameter for Xen to. >=20 > So what if we allow multiple mediator to run and when the domain is initi= alized we select the correct medatior/ops for the VM? Right now a VM gets the mediator selected by configuration if it is availab= le. I do not think we should make it automatic as there might be good reasons t= o not allow to access a TEE from some VMs. >=20 > For simplification, we could even hardocode FF-A as the second mediator. That could be a long term solution yes but we definitely need to solve the = access rights first. As long as VMs can use FF-A to communicate with any other VMs or TEEs, the = current approach is the most secure one. >=20 >> For the review side of things, am I right to understand from your commen= ts that this ok for now as tech-preview ? >=20 > Yes I am happy with the approach for now. Great thanks. Cheers Bertrand >=20 > Cheers, >=20 > --=20 > Julien Grall >=20 From xen-devel-bounces@lists.xenproject.org Tue Apr 01 07:52:04 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 07:52:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.933587.1335496 (Exim 4.92) (envelope-from ) id 1tzWPe-0001vd-Qa; Tue, 01 Apr 2025 07:51:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 933587.1335496; Tue, 01 Apr 2025 07:51:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzWPe-0001vW-NG; Tue, 01 Apr 2025 07:51:58 +0000 Received: by outflank-mailman (input) for mailman id 933587; Tue, 01 Apr 2025 07:51:57 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzWPd-0001vO-AI for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 07:51:57 +0000 Received: from mail-wm1-x32d.google.com (mail-wm1-x32d.google.com [2a00:1450:4864:20::32d]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 2e52d6e9-0ece-11f0-9ffb-bf95429c2676; Tue, 01 Apr 2025 09:51:55 +0200 (CEST) Received: by mail-wm1-x32d.google.com with SMTP id 5b1f17b1804b1-43ea40a6e98so10653235e9.1 for ; Tue, 01 Apr 2025 00:51:55 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 01 Apr 2025 00:51:54 -0700 (PDT) Message-ID: Date: Tue, 1 Apr 2025 09:51:53 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1] x86/domain: revisit logging in arch_domain_create() To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , dmkhn@proton.me Cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, sstabellini@kernel.org, dmukhin@ford.com References: <20250331213406.422725-1-dmukhin@ford.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 01.04.2025 08:59, Roger Pau Monné wrote: > On Mon, Mar 31, 2025 at 09:34:24PM +0000, dmkhn@proton.me wrote: >> --- a/xen/arch/x86/domain.c >> +++ b/xen/arch/x86/domain.c >> @@ -798,13 +798,12 @@ int arch_domain_create(struct domain *d, >> { >> if ( !opt_allow_unsafe ) >> { >> - printk(XENLOG_G_ERR "Xen does not allow DomU creation on this CPU" >> - " for security reasons.\n"); >> + printk(XENLOG_G_ERR "%pd: Xen does not allow DomU creation on this CPU" >> + " for security reasons.\n", d); > > Since you are already touching this, I would switch to gprintk, and > avoid splitting the lines: > > gprintk(XENLOG_ERR, > "%pd: Xen does not allow DomU creation on this CPU for security reasons.\n", > d); > > Same for the other messages below. IOW you see value in also logging current->domain? What I'd like to ask for when touching these log messages is to get rid of the full stops. >> return -EPERM; >> } >> printk(XENLOG_G_WARNING >> - "Dom%d may compromise security on this CPU.\n", >> - d->domain_id); >> + "%pd: domain may compromise security on this CPU.\n", d); >> } >> >> emflags = config->arch.emulation_flags; >> @@ -814,16 +813,19 @@ int arch_domain_create(struct domain *d, >> >> if ( emflags & ~XEN_X86_EMU_ALL ) >> { >> - printk(XENLOG_G_ERR "d%d: Invalid emulation bitmap: %#x\n", >> - d->domain_id, emflags); >> + printk(XENLOG_G_ERR "%pd: Invalid emulation bitmap: %#x\n", >> + d, emflags); >> return -EINVAL; >> } >> >> if ( !emulation_flags_ok(d, emflags) ) >> { >> - printk(XENLOG_G_ERR "d%d: Xen does not allow %s domain creation " >> + printk(XENLOG_G_ERR "%pd: Xen does not allow %s %sdomain creation " >> "with the current selection of emulators: %#x\n", >> - d->domain_id, is_hvm_domain(d) ? "HVM" : "PV", emflags); >> + d, >> + is_hvm_domain(d) ? "HVM" : "PV", >> + is_hardware_domain(d) ? "(hardware) " : "", > > I wouldn't use parentheses around hardware, but that's just my taste. +1 (provided we really need this extra property logged here) Jan From xen-devel-bounces@lists.xenproject.org Tue Apr 01 07:53:12 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 07:53:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.933599.1335505 (Exim 4.92) (envelope-from ) id 1tzWQp-0002Tu-31; Tue, 01 Apr 2025 07:53:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 933599.1335505; Tue, 01 Apr 2025 07:53:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzWQp-0002Tn-0J; Tue, 01 Apr 2025 07:53:11 +0000 Received: by outflank-mailman (input) for mailman id 933599; Tue, 01 Apr 2025 07:53:09 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzWQn-0002Th-Ju for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 07:53:09 +0000 Received: from sea.source.kernel.org (sea.source.kernel.org [2600:3c0a:e001:78e:0:1991:8:25]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 585f120b-0ece-11f0-9ffb-bf95429c2676; Tue, 01 Apr 2025 09:53:07 +0200 (CEST) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id 4FD3543BA6; Tue, 1 Apr 2025 07:53:04 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8963EC4CEE4; Tue, 1 Apr 2025 07:52:55 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 585f120b-0ece-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743493984; bh=85J+UQqrPmkLGjgTDn4/gMvG0FvRmMphb7RZrr3I10Q=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=Z8qHtNByIm8E5p7AbYs018QH17/ls1OzKBt8dHzcgbJ67+A1/wTK+6rA4JlB/4Ps/ WHwSgnuRMBluhXVJsMV2uImUjVoCl7ZOUajOXz8Hy2N7kW37JJREgvN1MLwtK8P16B 30z2+YLa787+Wp3jqgsF4EZ1g26n27iQ91Ma0VqyTWbEZNW+g4X5Pr7B5VytBQpKSn gU5tO4JDdcbGvmbLt948CbvNiXSCFGtMI8xYuqH8g75jwnqDwYAt1tbX3G/fZ2xGxQ vbNOC92UT5Zbj1+851IKPt/uEZp+yF68D+7pSayPTk33ws4MtrWg9ytAxtDP4ARZWZ 93xpSccuufhrg== Date: Tue, 1 Apr 2025 09:52:52 +0200 From: Ingo Molnar To: "H. Peter Anvin" Cc: "Xin Li (Intel)" , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-edac@vger.kernel.org, kvm@vger.kernel.org, xen-devel@lists.xenproject.org, linux-ide@vger.kernel.org, linux-pm@vger.kernel.org, bpf@vger.kernel.org, llvm@lists.linux.dev, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com, peterz@infradead.org, acme@kernel.org, namhyung@kernel.org, mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org, irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com, wei.liu@kernel.org, ajay.kaher@broadcom.com, alexey.amakhalov@broadcom.com, bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com, pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com, luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com, haiyangz@microsoft.com, decui@microsoft.com, Linus Torvalds Subject: Re: [RFC PATCH v1 01/15] x86/msr: Replace __wrmsr() with native_wrmsrl() Message-ID: References: <20250331082251.3171276-1-xin@zytor.com> <20250331082251.3171276-2-xin@zytor.com> <9D15DE81-2E68-4FCD-A133-4963602E18C9@zytor.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <9D15DE81-2E68-4FCD-A133-4963602E18C9@zytor.com> * H. Peter Anvin wrote: > On March 31, 2025 3:17:30 AM PDT, Ingo Molnar wrote: > > > >* Xin Li (Intel) wrote: > > > >> - __wrmsr (MSR_AMD_DBG_EXTN_CFG, val | 3ULL << 3, val >> 32); > >> + native_wrmsrl(MSR_AMD_DBG_EXTN_CFG, val | 3ULL << 3); > > > >This is an improvement. > > > >> - __wrmsr (MSR_IA32_PQR_ASSOC, rmid_p, plr->closid); > >> + native_wrmsrl(MSR_IA32_PQR_ASSOC, (u64)plr->closid << 32 | rmid_p); > > > >> - __wrmsr (MSR_IA32_PQR_ASSOC, rmid_p, closid_p); > >> + native_wrmsrl(MSR_IA32_PQR_ASSOC, (u64)closid_p << 32 | rmid_p); > > > >This is not an improvement. > > > >Please provide a native_wrmsrl() API variant where natural [rmid_p, closid_p] > >high/lo parameters can be used, without the shift-uglification... > > > >Thanks, > > > > Ingo > > Directing this question primarily to Ingo, who is more than anyone > else the namespace consistency guardian: > > On the subject of msr function naming ... *msrl() has always been > misleading. The -l suffix usually means 32 bits; sometimes it means > the C type "long" (which in the kernel is used instead of > size_t/uintptr_t, which might end up being "fun" when 128-bit > architectures appear some time this century), but for a fixed 64-but > type we normally use -q. Yeah, agreed - that's been bothering me for a while too. :-) > Should we rename the *msrl() functions to *msrq() as part of this > overhaul? Yeah, that's a good idea, and because talk is cheap I just implemented this in the tip:WIP.x86/msr branch with a couple of other cleanups in this area (see the shortlog & diffstat below), but the churn is high: 144 files changed, 1034 insertions(+), 1034 deletions(-) So this can only be done if regenerated and sent to Linus right before an -rc1 I think: git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip WIP.x86/msr Thanks, Ingo =======================> Ingo Molnar (18): x86/msr: Standardize on u64 in x86/msr: Standardize on u64 in x86/msr: Use u64 in rdmsrl_amd_safe() and wrmsrl_amd_safe() x86/msr: Use u64 in rdmsrl_safe() and paravirt_read_pmc() x86/msr: Rename 'rdmsrl()' to 'rdmsrq()' x86/msr: Rename 'wrmsrl()' to 'wrmsrq()' x86/msr: Rename 'rdmsrl_safe()' to 'rdmsrq_safe()' x86/msr: Rename 'wrmsrl_safe()' to 'wrmsrq_safe()' x86/msr: Rename 'rdmsrl_safe_on_cpu()' to 'rdmsrq_safe_on_cpu()' x86/msr: Rename 'wrmsrl_safe_on_cpu()' to 'wrmsrq_safe_on_cpu()' x86/msr: Rename 'rdmsrl_on_cpu()' to 'rdmsrq_on_cpu()' x86/msr: Rename 'wrmsrl_on_cpu()' to 'wrmsrq_on_cpu()' x86/msr: Rename 'mce_rdmsrl()' to 'mce_rdmsrq()' x86/msr: Rename 'mce_wrmsrl()' to 'mce_wrmsrq()' x86/msr: Rename 'rdmsrl_amd_safe()' to 'rdmsrq_amd_safe()' x86/msr: Rename 'wrmsrl_amd_safe()' to 'wrmsrq_amd_safe()' x86/msr: Rename 'native_wrmsrl()' to 'native_wrmsrq()' x86/msr: Rename 'wrmsrl_cstar()' to 'wrmsrq_cstar()' arch/x86/coco/sev/core.c | 2 +- arch/x86/events/amd/brs.c | 8 +- arch/x86/events/amd/core.c | 12 +-- arch/x86/events/amd/ibs.c | 26 ++--- arch/x86/events/amd/lbr.c | 20 ++-- arch/x86/events/amd/power.c | 10 +- arch/x86/events/amd/uncore.c | 12 +-- arch/x86/events/core.c | 42 ++++---- arch/x86/events/intel/core.c | 66 ++++++------- arch/x86/events/intel/cstate.c | 2 +- arch/x86/events/intel/ds.c | 10 +- arch/x86/events/intel/knc.c | 16 +-- arch/x86/events/intel/lbr.c | 44 ++++----- arch/x86/events/intel/p4.c | 24 ++--- arch/x86/events/intel/p6.c | 12 +-- arch/x86/events/intel/pt.c | 32 +++--- arch/x86/events/intel/uncore.c | 2 +- arch/x86/events/intel/uncore_discovery.c | 10 +- arch/x86/events/intel/uncore_nhmex.c | 70 ++++++------- arch/x86/events/intel/uncore_snb.c | 42 ++++---- arch/x86/events/intel/uncore_snbep.c | 50 +++++----- arch/x86/events/msr.c | 2 +- arch/x86/events/perf_event.h | 26 ++--- arch/x86/events/probe.c | 2 +- arch/x86/events/rapl.c | 8 +- arch/x86/events/zhaoxin/core.c | 16 +-- arch/x86/hyperv/hv_apic.c | 4 +- arch/x86/hyperv/hv_init.c | 66 ++++++------- arch/x86/hyperv/hv_spinlock.c | 6 +- arch/x86/hyperv/ivm.c | 2 +- arch/x86/include/asm/apic.h | 8 +- arch/x86/include/asm/debugreg.h | 4 +- arch/x86/include/asm/fsgsbase.h | 4 +- arch/x86/include/asm/kvm_host.h | 2 +- arch/x86/include/asm/microcode.h | 2 +- arch/x86/include/asm/msr-index.h | 12 +-- arch/x86/include/asm/msr.h | 50 +++++----- arch/x86/include/asm/paravirt.h | 8 +- arch/x86/include/asm/spec-ctrl.h | 2 +- arch/x86/kernel/acpi/cppc.c | 8 +- arch/x86/kernel/amd_nb.c | 2 +- arch/x86/kernel/apic/apic.c | 16 +-- arch/x86/kernel/apic/apic_numachip.c | 6 +- arch/x86/kernel/cet.c | 2 +- arch/x86/kernel/cpu/amd.c | 28 +++--- arch/x86/kernel/cpu/aperfmperf.c | 28 +++--- arch/x86/kernel/cpu/bugs.c | 24 ++--- arch/x86/kernel/cpu/bus_lock.c | 18 ++-- arch/x86/kernel/cpu/common.c | 68 ++++++------- arch/x86/kernel/cpu/feat_ctl.c | 4 +- arch/x86/kernel/cpu/hygon.c | 6 +- arch/x86/kernel/cpu/intel.c | 10 +- arch/x86/kernel/cpu/intel_epb.c | 12 +-- arch/x86/kernel/cpu/mce/amd.c | 22 ++--- arch/x86/kernel/cpu/mce/core.c | 58 +++++------ arch/x86/kernel/cpu/mce/inject.c | 32 +++--- arch/x86/kernel/cpu/mce/intel.c | 32 +++--- arch/x86/kernel/cpu/mce/internal.h | 2 +- arch/x86/kernel/cpu/microcode/amd.c | 2 +- arch/x86/kernel/cpu/microcode/intel.c | 2 +- arch/x86/kernel/cpu/mshyperv.c | 12 +-- arch/x86/kernel/cpu/resctrl/core.c | 10 +- arch/x86/kernel/cpu/resctrl/monitor.c | 2 +- arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 2 +- arch/x86/kernel/cpu/resctrl/rdtgroup.c | 6 +- arch/x86/kernel/cpu/sgx/main.c | 2 +- arch/x86/kernel/cpu/topology.c | 2 +- arch/x86/kernel/cpu/topology_amd.c | 4 +- arch/x86/kernel/cpu/tsx.c | 20 ++-- arch/x86/kernel/cpu/umwait.c | 2 +- arch/x86/kernel/fpu/core.c | 2 +- arch/x86/kernel/fpu/xstate.c | 10 +- arch/x86/kernel/fpu/xstate.h | 2 +- arch/x86/kernel/fred.c | 20 ++-- arch/x86/kernel/hpet.c | 2 +- arch/x86/kernel/kvm.c | 28 +++--- arch/x86/kernel/kvmclock.c | 4 +- arch/x86/kernel/mmconf-fam10h_64.c | 8 +- arch/x86/kernel/process.c | 16 +-- arch/x86/kernel/process_64.c | 20 ++-- arch/x86/kernel/reboot_fixups_32.c | 2 +- arch/x86/kernel/shstk.c | 18 ++-- arch/x86/kernel/traps.c | 10 +- arch/x86/kernel/tsc.c | 2 +- arch/x86/kernel/tsc_sync.c | 14 +-- arch/x86/kvm/svm/avic.c | 2 +- arch/x86/kvm/svm/sev.c | 2 +- arch/x86/kvm/svm/svm.c | 16 +-- arch/x86/kvm/vmx/nested.c | 4 +- arch/x86/kvm/vmx/pmu_intel.c | 4 +- arch/x86/kvm/vmx/sgx.c | 8 +- arch/x86/kvm/vmx/vmx.c | 66 ++++++------- arch/x86/kvm/x86.c | 38 ++++---- arch/x86/lib/insn-eval.c | 6 +- arch/x86/lib/msr-smp.c | 16 +-- arch/x86/lib/msr.c | 4 +- arch/x86/mm/pat/memtype.c | 4 +- arch/x86/mm/tlb.c | 2 +- arch/x86/pci/amd_bus.c | 10 +- arch/x86/platform/olpc/olpc-xo1-rtc.c | 6 +- arch/x86/platform/olpc/olpc-xo1-sci.c | 2 +- arch/x86/power/cpu.c | 26 ++--- arch/x86/realmode/init.c | 2 +- arch/x86/virt/svm/sev.c | 20 ++-- arch/x86/xen/suspend.c | 6 +- drivers/acpi/acpi_extlog.c | 2 +- drivers/acpi/acpi_lpit.c | 2 +- drivers/cpufreq/acpi-cpufreq.c | 8 +- drivers/cpufreq/amd-pstate-ut.c | 6 +- drivers/cpufreq/amd-pstate.c | 22 ++--- drivers/cpufreq/amd_freq_sensitivity.c | 2 +- drivers/cpufreq/e_powersaver.c | 6 +- drivers/cpufreq/intel_pstate.c | 108 ++++++++++----------- drivers/cpufreq/longhaul.c | 24 ++--- drivers/cpufreq/powernow-k7.c | 14 +-- drivers/crypto/ccp/sev-dev.c | 2 +- drivers/edac/amd64_edac.c | 6 +- drivers/gpu/drm/i915/selftests/librapl.c | 4 +- drivers/hwmon/fam15h_power.c | 6 +- drivers/idle/intel_idle.c | 34 +++---- drivers/mtd/nand/raw/cs553x_nand.c | 6 +- drivers/platform/x86/intel/ifs/core.c | 4 +- drivers/platform/x86/intel/ifs/load.c | 20 ++-- drivers/platform/x86/intel/ifs/runtest.c | 16 +-- drivers/platform/x86/intel/pmc/cnp.c | 6 +- drivers/platform/x86/intel/pmc/core.c | 8 +- .../x86/intel/speed_select_if/isst_if_common.c | 18 ++-- .../x86/intel/speed_select_if/isst_if_mbox_msr.c | 14 +-- .../x86/intel/speed_select_if/isst_tpmi_core.c | 2 +- drivers/platform/x86/intel/tpmi_power_domains.c | 4 +- drivers/platform/x86/intel/turbo_max_3.c | 4 +- .../x86/intel/uncore-frequency/uncore-frequency.c | 10 +- drivers/platform/x86/intel_ips.c | 36 +++---- drivers/powercap/intel_rapl_msr.c | 6 +- .../int340x_thermal/processor_thermal_device.c | 2 +- drivers/thermal/intel/intel_hfi.c | 14 +-- drivers/thermal/intel/intel_powerclamp.c | 4 +- drivers/thermal/intel/intel_tcc_cooling.c | 4 +- drivers/thermal/intel/therm_throt.c | 10 +- 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[37.24.206.209]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43d82efeacasm191461405e9.23.2025.04.01.01.07.57 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 01 Apr 2025 01:07:57 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 6c65f250-0ed0-11f0-9ea7-5ba50f476ded DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=google; t=1743494878; x=1744099678; darn=lists.xenproject.org; h=content-transfer-encoding:in-reply-to:autocrypt:from:cc :content-language:references:to:subject:user-agent:mime-version:date :message-id:from:to:cc:subject:date:message-id:reply-to; bh=9bovgRmlu21D+Vno2OUk1sYiIkjhw0RBe5xo/egaiZs=; b=NpB8e48VXwd1zim59WJ5ywPZVpyfAn61DnsHiLoDveakU94xmTsy8bjbnM6vvErdn1 9CXmgO3/wiim++K6p162MSk8RURYuc03dChGJCJIbXWMs7pO/jqz6be+CaUVzfUAaNsq JqQAzytbbX3LdyJYWIxlwLd5Fo9b+eihw93zv4AxOFb1o2WTUQP2ey8WCPdzECHNLCiJ Aq1AloN9Gfx6m4Re3LnCjSubam1SifvZXYZ2jHtmJN8A3C5s0ScbrwcAp3y3jBoQ92fo 8siiuZYjSi6ja6ULhk4rmuC6GN/kCh/93+Q/U4NG9E/0/2zvGvouE61gkgrH+ZGxCFPe ORDA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743494878; x=1744099678; h=content-transfer-encoding:in-reply-to:autocrypt:from:cc :content-language:references:to:subject:user-agent:mime-version:date :message-id:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=9bovgRmlu21D+Vno2OUk1sYiIkjhw0RBe5xo/egaiZs=; b=HRc63DDqx0fGgeNILpLhNkVKSb6ZzlIskHS1Z6bmcVkWmRuyxueCsRcwa+fcUImVF9 mvTaPOGPHkhSp+WZpYEfn4uq4m3cbjwKv2sGAlUOI/ASsLjwxIhdQ/dvlw8xGxN+17GU YmWT/tKlHzRu27OC2H2HUSizB35y4bxH3FoKkmJ9ApSpxwPYTWGMd28lzntMdYuCvrxX 0LGIwLmzipvgdThxWYyMmKwsfZrhozqNUz87mipxGE3cKmh3BLwlp9l1kXoCl+gfFz7c U4D3/52UWmQd1CSMg+w+LlX96ypEnHCE99qUJxtcGM5kx5x6FxqJexfzFYsCNURrqWSG mxXw== X-Gm-Message-State: AOJu0YxTIOZrw51RcxpiBYtEPeQ2pkOa4jfOv/j1U6248wMFMKXI40VI LHJEfwDVlpO89/PCnU/7G0Tv4AEhD2OzDMtFVwtWA03YoJBJ1xNI3+mP8B006IXtPYUmz1gNl2c = X-Gm-Gg: ASbGncvgzn/zPM/G4ZKG1QvF38k2YilKFoCAnrYkx6ecaK3a6gee+Wabc5UOm3jhmgx pQb4HXAfw97IscbLKa/8V+YV6pklyxnyZnkXGaYAJJIXj22jw+B0Z+rV/bv+WsW17A+h0r5uoov NwsmPqXCRota2lXeAb1huZRgwjOG8yLbvi/xbHWYthrrF73cCrAsTx9R87Lrugjwp2aG7Po1eGw gLAAc1szz6u9CpgsU7zvZaMdAqGqO5ZHNpfvZk3KzBTHnkqBQR+nOuSy1Cl7MkfnelHS0Rnr/46 OkhW4QMGj7jaupqyuwnDsoYbh6rh8w1JghIgYXWH4Hma69rP6ZoSM/e3bTUtuNID7N1qSjH3Qtz 5OsJ70zhV3ZGrKx9vRpFtF3cSDHNRoA== X-Google-Smtp-Source: AGHT+IH0rv3a5YpQckKPKHlRaLMLEdQM+0krR5o68S2MEJpGHPxhfIOkBBC+liNZvHDX239H8OIxWg== X-Received: by 2002:a05:600c:1382:b0:43c:e7ae:4bc9 with SMTP id 5b1f17b1804b1-43db61e0348mr88094395e9.1.1743494877808; Tue, 01 Apr 2025 01:07:57 -0700 (PDT) Message-ID: Date: Tue, 1 Apr 2025 10:07:56 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: Domain IDs and Capabilities To: Jason Andryuk References: <0dd25ebd-34f2-4391-aa08-3d873ec72347@amd.com> Content-Language: en-US Cc: Xen-devel From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <0dd25ebd-34f2-4391-aa08-3d873ec72347@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 31.03.2025 23:46, Jason Andryuk wrote: > It is useful for a domain to know its own domid. Xenstored has command > line flags to set --master-domid (the local domid) and --priv-domid, but > it would be better to autodetect those. Also, domids are necessary to > set xenstore permissions - DOMID_SELF is not supported today. Setting permissions for oneself? > Juergen already implemented a get_domid() function for Mini-OS for a > xenstore stubdom to query its own domid indirectly through event channel > games. That can be re-imlemented in Linux userspace, but it needs the > unstable xenctrl library to query event channel status. > > x86 HVM exposes the domid through a CPUID leaf, so it isn't actually hidden. > > Should I add a hypercall to query a domid? An alternative, for ARM at > least, is to expose the domid and capabilities in the domain's DT in > /hypervisor/domid and /hypervisor/caps. I've tried this out as just > dumping the domid and caps as uint32_ts. > > Reviewing > https://lore.kernel.org/xen-devel/20231110113435.22609-1-jgross@suse.com/ > it seems like both a hypercall and an arch specific means might be possible. > > XENFEAT could be extended to exposed finer grain capabilities: > XENFEAT_{control,hwdom,xenstore}. This is easy. Seems a little bit > like a mis-use of XENFEAT to me, but it works. > > If generally exposing domids is not desirable, they could be exposed > only to domains with capabilities since those are not migratable, AFAICT. Since guests have ways to figure out their IDs, there's probably nothing wrong with having a dedicated means for them to obtain them. It just needs to be made very clear that the ID can (and, at least for now, typically will) change across migration. As to the mechanism thereof, I stand by my views voiced in that earlier thread you point at. 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=?utf-8?B?Yk9JdEl6RDF6bXUwOTFXQ1FHS3ZYNUZINUgvdjNQZEZCRkJjUVA2VTM0cW5y?= =?utf-8?B?a3Z0dkw4dkVrY0VHZThmbTgzcGMyVVh2dktGYTlPdmxCYjY0Ynl6OUNVcGw0?= =?utf-8?B?Nmx1R1J5c2pBRnNnYUd2SWZ0VGh2MXV4cCtJOVdtQjYyYjFSVUxUWW41bGF4?= =?utf-8?B?T0FZWjdXakdqVWNJbWFWN3B1eUhTcG8rQXB5UWpaMEN6amNGK1MxR0sydDJp?= =?utf-8?B?a1lRZ1B6U0NnUkxzOVFKOVVRNVRHdFlIZllEMFVDMmR4bkpKNmkrSFJUaDVZ?= =?utf-8?B?U1ZaSXR0RUFqV3EzN3VqaUxFazkvUmdiRnF4MDlBcmI4OEF1aW1qTE1zdUVn?= =?utf-8?B?aG5pNVpTVWdUV0NlOVlwd2ZRejRFdWxONVQ5SnRWa1FjVGdJekNqTzc1OHY3?= =?utf-8?Q?blEokWceQy8wbgTEBy+BJWQ7h?= X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: a065b101-8c64-443d-5922-08dd70f9eb84 X-MS-Exchange-CrossTenant-AuthSource: BN9PR12MB5273.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Apr 2025 08:48:05.8836 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: +pNbrtYnhVqnqA3XTBY+zSYUWv9pxUwJAshs/9O647oSWB4JGtZFPb8r7z58dsbM X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB7609 On 31/03/2025 23:43, Jason Andryuk wrote: > When creating a hardware domain, have the dom0less code call > construct_hwdom() which is shared with the dom0 code. The hardware > domain requires building that best matches the dom0 build path. Re-use > it to keep them in sync. > > The device tree node of the dom0less config is now passed into > construct_hwdom(). dom0 uses /chosen for process_shm while a hwdom will > use the value from its dom0less device tree node. > > Signed-off-by: Jason Andryuk > --- > xen/arch/arm/dom0less-build.c | 57 ++++++++++++++----------- > xen/arch/arm/domain_build.c | 10 +++-- > xen/arch/arm/include/asm/domain_build.h | 3 +- > 3 files changed, 42 insertions(+), 28 deletions(-) > > diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c > index 573b0d25ae..e25d7bd468 100644 > --- a/xen/arch/arm/dom0less-build.c > +++ b/xen/arch/arm/dom0less-build.c > @@ -911,36 +911,45 @@ static int __init construct_domU(struct domain *d, > /* type must be set before allocate memory */ > d->arch.type = kinfo.type; > #endif > - if ( !dt_find_property(node, "xen,static-mem", NULL) ) > - allocate_memory(d, &kinfo); > - else if ( !is_domain_direct_mapped(d) ) > - allocate_static_memory(d, &kinfo, node); > - else > - assign_static_memory_11(d, &kinfo, node); > - > - rc = process_shm(d, &kinfo, node); > - if ( rc < 0 ) > - return rc; > - > - /* > - * Base address and irq number are needed when creating vpl011 device > - * tree node in prepare_dtb_domU, so initialization on related variables > - * shall be done first. > - */ > - if ( kinfo.vpl011 ) > + if ( is_hardware_domain(d) ) > { > - rc = domain_vpl011_init(d, NULL); > + rc = construct_hwdom(&kinfo, node); > if ( rc < 0 ) > return rc; > } > + else > + { > + if ( !dt_find_property(node, "xen,static-mem", NULL) ) > + allocate_memory(d, &kinfo); > + else if ( !is_domain_direct_mapped(d) ) > + allocate_static_memory(d, &kinfo, node); > + else > + assign_static_memory_11(d, &kinfo, node); > > - rc = prepare_dtb_domU(d, &kinfo); > - if ( rc < 0 ) > - return rc; > + rc = process_shm(d, &kinfo, node); > + if ( rc < 0 ) > + return rc; > > - rc = construct_domain(d, &kinfo); > - if ( rc < 0 ) > - return rc; > + /* > + * Base address and irq number are needed when creating vpl011 device > + * tree node in prepare_dtb_domU, so initialization on related variables > + * shall be done first. > + */ > + if ( kinfo.vpl011 ) > + { > + rc = domain_vpl011_init(d, NULL); > + if ( rc < 0 ) > + return rc; > + } > + > + rc = prepare_dtb_domU(d, &kinfo); > + if ( rc < 0 ) > + return rc; > + > + rc = construct_domain(d, &kinfo); > + if ( rc < 0 ) > + return rc; > + } > > domain_vcpu_affinity(d, node); > > diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c > index 051c48329a..b3a396c2fc 100644 > --- a/xen/arch/arm/domain_build.c > +++ b/xen/arch/arm/domain_build.c > @@ -2305,10 +2305,11 @@ static int __init construct_dom0(struct domain *d) > if ( rc < 0 ) > return rc; > > - return construct_hwdom(&kinfo); > + return construct_hwdom(&kinfo, NULL); > } > > -int __init construct_hwdom(struct kernel_info *kinfo) > +int __init construct_hwdom(struct kernel_info *kinfo, > + const struct dt_device_node *node) > { > struct domain *d = kinfo->d; > int rc; > @@ -2325,7 +2326,10 @@ int __init construct_hwdom(struct kernel_info *kinfo) > else > allocate_memory(d, kinfo); > > - rc = process_shm_chosen(d, kinfo); > + if ( node ) > + rc = process_shm(d, kinfo, node); > + else > + rc = process_shm_chosen(d, kinfo); I think we can avoid this if/else. I see no reason to keep process_shm_chosen. We could check in process_shm, whether node is NULL and then grab /chosen node. I'll try to send a patch shortly. Rest LGTM. ~Michal From xen-devel-bounces@lists.xenproject.org Tue Apr 01 08:59:15 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 08:59:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.933678.1335570 (Exim 4.92) (envelope-from ) id 1tzXSk-0002uF-Fq; Tue, 01 Apr 2025 08:59:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 933678.1335570; Tue, 01 Apr 2025 08:59:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzXSk-0002tN-Bb; Tue, 01 Apr 2025 08:59:14 +0000 Received: by outflank-mailman (input) for mailman id 933678; Tue, 01 Apr 2025 08:59:13 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzXSj-0002OX-Mo for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 08:59:13 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 94c1d5fb-0ed7-11f0-9ea7-5ba50f476ded; Tue, 01 Apr 2025 10:59:12 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 96AD219F0; Tue, 1 Apr 2025 01:59:15 -0700 (PDT) Received: from e125770.cambridge.arm.com (e125770.arm.com [10.1.199.43]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 1B1073F694; Tue, 1 Apr 2025 01:59:10 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 94c1d5fb-0ed7-11f0-9ea7-5ba50f476ded From: Luca Fancellu To: xen-devel@lists.xenproject.org Cc: Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Subject: [PATCH v4 3/7] xen/arm: Introduce frame_table and virt_to_page Date: Tue, 1 Apr 2025 09:58:54 +0100 Message-Id: <20250401085858.2228991-4-luca.fancellu@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250401085858.2228991-1-luca.fancellu@arm.com> References: <20250401085858.2228991-1-luca.fancellu@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Introduce frame_table in order to provide the implementation of virt_to_page for MPU system, move the MMU variant in mmu/mm.h. Introduce FRAMETABLE_NR that is required for 'pdx_group_valid' in pdx.c, but leave the initialisation of the frame table to a later stage. Define FRAMETABLE_SIZE for MPU to support up to 1TB of ram at this stage, as the only current implementation of armv8-r aarch64, which is cortex R82, can support 1TB or 256TB (r82 TRM r3p1 ID_AA64MMFR0_EL1.PARange). Take the occasion to sort alphabetically the headers following the Xen code style and add the emacs footer in mpu/mm.c. Signed-off-by: Luca Fancellu Reviewed-by: Michal Orzel --- v4 changes: - no changes v3 changes: - Simplified MPU virt_to_page conversions (Michal suggested) - Mentioned r82 TRM source for frame table size (Michal) - Add Michal R-by v2 changes: - sorted headers in mm.c - modified commit message - moved virt_to_page to MMU and MPU - removed frametable_pdx_end, used mfn_valid --- xen/arch/arm/include/asm/mm.h | 14 -------------- xen/arch/arm/include/asm/mmu/mm.h | 14 ++++++++++++++ xen/arch/arm/include/asm/mpu/layout.h | 3 +++ xen/arch/arm/include/asm/mpu/mm.h | 14 ++++++++++++++ xen/arch/arm/mpu/mm.c | 14 +++++++++++++- 5 files changed, 44 insertions(+), 15 deletions(-) diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h index 444fd03823ec..fbffaccef49b 100644 --- a/xen/arch/arm/include/asm/mm.h +++ b/xen/arch/arm/include/asm/mm.h @@ -294,20 +294,6 @@ static inline uint64_t gvirt_to_maddr(vaddr_t va, paddr_t *pa, #error "Unknown memory management layout" #endif -/* Convert between Xen-heap virtual addresses and page-info structures. */ -static inline struct page_info *virt_to_page(const void *v) -{ - unsigned long va = (unsigned long)v; - unsigned long pdx; - - ASSERT(va >= XENHEAP_VIRT_START); - ASSERT(va < directmap_virt_end); - - pdx = (va - XENHEAP_VIRT_START) >> PAGE_SHIFT; - pdx += mfn_to_pdx(directmap_mfn_start); - return frame_table + pdx - frametable_base_pdx; -} - static inline void *page_to_virt(const struct page_info *pg) { return mfn_to_virt(mfn_x(page_to_mfn(pg))); diff --git a/xen/arch/arm/include/asm/mmu/mm.h b/xen/arch/arm/include/asm/mmu/mm.h index 6737c3ede783..caba987edc85 100644 --- a/xen/arch/arm/include/asm/mmu/mm.h +++ b/xen/arch/arm/include/asm/mmu/mm.h @@ -70,6 +70,20 @@ static inline void *maddr_to_virt(paddr_t ma) } #endif +/* Convert between Xen-heap virtual addresses and page-info structures. */ +static inline struct page_info *virt_to_page(const void *v) +{ + unsigned long va = (unsigned long)v; + unsigned long pdx; + + ASSERT(va >= XENHEAP_VIRT_START); + ASSERT(va < directmap_virt_end); + + pdx = (va - XENHEAP_VIRT_START) >> PAGE_SHIFT; + pdx += mfn_to_pdx(directmap_mfn_start); + return frame_table + pdx - frametable_base_pdx; +} + /* * Print a walk of a page table or p2m * diff --git a/xen/arch/arm/include/asm/mpu/layout.h b/xen/arch/arm/include/asm/mpu/layout.h index 248e55f8882d..c331d1feaa84 100644 --- a/xen/arch/arm/include/asm/mpu/layout.h +++ b/xen/arch/arm/include/asm/mpu/layout.h @@ -3,6 +3,9 @@ #ifndef __ARM_MPU_LAYOUT_H__ #define __ARM_MPU_LAYOUT_H__ +#define FRAMETABLE_SIZE GB(16) +#define FRAMETABLE_NR (FRAMETABLE_SIZE / sizeof(*frame_table)) + #define XEN_START_ADDRESS CONFIG_XEN_START_ADDRESS /* diff --git a/xen/arch/arm/include/asm/mpu/mm.h b/xen/arch/arm/include/asm/mpu/mm.h index 6cfd0f5cd2c2..86f33d9836b7 100644 --- a/xen/arch/arm/include/asm/mpu/mm.h +++ b/xen/arch/arm/include/asm/mpu/mm.h @@ -3,9 +3,13 @@ #ifndef __ARM_MPU_MM_H__ #define __ARM_MPU_MM_H__ +#include #include #include #include +#include + +extern struct page_info *frame_table; #define virt_to_maddr(va) ((paddr_t)((vaddr_t)(va) & PADDR_MASK)) @@ -15,6 +19,16 @@ static inline void *maddr_to_virt(paddr_t ma) return _p(ma); } +/* Convert between virtual address to page-info structure. */ +static inline struct page_info *virt_to_page(const void *v) +{ + mfn_t mfn = _mfn(virt_to_mfn(v)); + + ASSERT(mfn_valid(mfn)); + + return mfn_to_page(mfn); +} + #endif /* __ARM_MPU_MM_H__ */ /* diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c index 0b8748e57598..3632011c1013 100644 --- a/xen/arch/arm/mpu/mm.c +++ b/xen/arch/arm/mpu/mm.c @@ -1,9 +1,12 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include #include +#include +#include #include +struct page_info *frame_table; + static void __init __maybe_unused build_assertions(void) { /* @@ -13,3 +16,12 @@ static void __init __maybe_unused build_assertions(void) */ BUILD_BUG_ON(PAGE_SIZE != SZ_4K); } + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue Apr 01 08:59:15 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 08:59:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.933677.1335566 (Exim 4.92) (envelope-from ) id 1tzXSk-0002qo-6i; Tue, 01 Apr 2025 08:59:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 933677.1335566; Tue, 01 Apr 2025 08:59:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzXSk-0002qh-39; Tue, 01 Apr 2025 08:59:14 +0000 Received: by outflank-mailman (input) for mailman id 933677; Tue, 01 Apr 2025 08:59:12 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzXSi-0002OX-Kq for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 08:59:12 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 93ee04b7-0ed7-11f0-9ea7-5ba50f476ded; Tue, 01 Apr 2025 10:59:11 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3A4CB14BF; Tue, 1 Apr 2025 01:59:14 -0700 (PDT) Received: from e125770.cambridge.arm.com (e125770.arm.com [10.1.199.43]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 4D3B53F694; Tue, 1 Apr 2025 01:59:09 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 93ee04b7-0ed7-11f0-9ea7-5ba50f476ded From: Luca Fancellu To: xen-devel@lists.xenproject.org Cc: Penny Zheng , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Penny Zheng , Wei Chen Subject: [PATCH v4 2/7] xen/arm: Implement virt/maddr conversion in MPU system Date: Tue, 1 Apr 2025 09:58:53 +0100 Message-Id: <20250401085858.2228991-3-luca.fancellu@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250401085858.2228991-1-luca.fancellu@arm.com> References: <20250401085858.2228991-1-luca.fancellu@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Penny Zheng virt_to_maddr and maddr_to_virt are used widely in Xen code. So even there is no VMSA in MPU system, we keep the interface in MPU to to avoid changing the existing common code. In order to do that, move the virt_to_maddr() and maddr_to_virt() definitions to mmu/mm.h, move the include of memory management subsystems (MMU/MPU) on a different place because the mentioned helpers needs visibility of some macro in asm/mm.h. Finally implement virt_to_maddr() and maddr_to_virt() for MPU systems under mpu/mm.h, the MPU version of virt/maddr conversion is simple since VA==PA. Signed-off-by: Penny Zheng Signed-off-by: Wei Chen Signed-off-by: Luca Fancellu Reviewed-by: Michal Orzel --- v4 changes: - no changes v3 changes: - Add Michal R-by v2 changes: - add missing headers, fix header protection macro name convention - take into account PADDR_MASK in virt_to_maddr - fixed typo in commit message - moved also maddr_to_virt to mmu/mm.h and moved include of mmu/mpu. - moved introduction of mm.c footer on commit that touches that file. --- xen/arch/arm/include/asm/mm.h | 64 +++++-------------------------- xen/arch/arm/include/asm/mmu/mm.h | 56 +++++++++++++++++++++++++++ xen/arch/arm/include/asm/mpu/mm.h | 27 +++++++++++++ 3 files changed, 92 insertions(+), 55 deletions(-) create mode 100644 xen/arch/arm/include/asm/mpu/mm.h diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h index a0d8e5afe977..444fd03823ec 100644 --- a/xen/arch/arm/include/asm/mm.h +++ b/xen/arch/arm/include/asm/mm.h @@ -14,12 +14,6 @@ # error "unknown ARM variant" #endif -#if defined(CONFIG_MMU) -# include -#elif !defined(CONFIG_MPU) -# error "Unknown memory management layout" -#endif - /* Align Xen to a 2 MiB boundary. */ #define XEN_PADDR_ALIGN (1 << 21) @@ -261,55 +255,6 @@ static inline void __iomem *ioremap_wc(paddr_t start, size_t len) /* Page-align address and convert to frame number format */ #define paddr_to_pfn_aligned(paddr) paddr_to_pfn(PAGE_ALIGN(paddr)) -#define virt_to_maddr(va) ({ \ - vaddr_t va_ = (vaddr_t)(va); \ - (paddr_t)((va_to_par(va_) & PADDR_MASK & PAGE_MASK) | (va_ & ~PAGE_MASK)); \ -}) - -#ifdef CONFIG_ARM_32 -/** - * Find the virtual address corresponding to a machine address - * - * Only memory backing the XENHEAP has a corresponding virtual address to - * be found. This is so we can save precious virtual space, as it's in - * short supply on arm32. This mapping is not subject to PDX compression - * because XENHEAP is known to be physically contiguous and can't hence - * jump over the PDX hole. This means we can avoid the roundtrips - * converting to/from pdx. - * - * @param ma Machine address - * @return Virtual address mapped to `ma` - */ -static inline void *maddr_to_virt(paddr_t ma) -{ - ASSERT(is_xen_heap_mfn(maddr_to_mfn(ma))); - ma -= mfn_to_maddr(directmap_mfn_start); - return (void *)(unsigned long) ma + XENHEAP_VIRT_START; -} -#else -/** - * Find the virtual address corresponding to a machine address - * - * The directmap covers all conventional memory accesible by the - * hypervisor. This means it's subject to PDX compression. - * - * Note there's an extra offset applied (directmap_base_pdx) on top of the - * regular PDX compression logic. Its purpose is to skip over the initial - * range of non-existing memory, should there be one. - * - * @param ma Machine address - * @return Virtual address mapped to `ma` - */ -static inline void *maddr_to_virt(paddr_t ma) -{ - ASSERT((mfn_to_pdx(maddr_to_mfn(ma)) - directmap_base_pdx) < - (DIRECTMAP_SIZE >> PAGE_SHIFT)); - return (void *)(XENHEAP_VIRT_START - - (directmap_base_pdx << PAGE_SHIFT) + - maddr_to_directmapoff(ma)); -} -#endif - /* * Translate a guest virtual address to a machine address. * Return the fault information if the translation has failed else 0. @@ -340,6 +285,15 @@ static inline uint64_t gvirt_to_maddr(vaddr_t va, paddr_t *pa, #define virt_to_mfn(va) __virt_to_mfn(va) #define mfn_to_virt(mfn) __mfn_to_virt(mfn) +/* Memory management subsystem header placed here to see the above macros */ +#if defined(CONFIG_MMU) +# include +#elif defined(CONFIG_MPU) +# include +#else +#error "Unknown memory management layout" +#endif + /* Convert between Xen-heap virtual addresses and page-info structures. */ static inline struct page_info *virt_to_page(const void *v) { diff --git a/xen/arch/arm/include/asm/mmu/mm.h b/xen/arch/arm/include/asm/mmu/mm.h index f5a00558c47b..6737c3ede783 100644 --- a/xen/arch/arm/include/asm/mmu/mm.h +++ b/xen/arch/arm/include/asm/mmu/mm.h @@ -2,6 +2,13 @@ #ifndef __ARM_MMU_MM_H__ #define __ARM_MMU_MM_H__ +#include +#include +#include +#include +#include +#include + /* Non-boot CPUs use this to find the correct pagetables. */ extern uint64_t init_ttbr; @@ -14,6 +21,55 @@ extern unsigned long directmap_base_pdx; #define frame_table ((struct page_info *)FRAMETABLE_VIRT_START) +#define virt_to_maddr(va) ({ \ + vaddr_t va_ = (vaddr_t)(va); \ + (paddr_t)((va_to_par(va_) & PADDR_MASK & PAGE_MASK) | (va_ & ~PAGE_MASK)); \ +}) + +#ifdef CONFIG_ARM_32 +/** + * Find the virtual address corresponding to a machine address + * + * Only memory backing the XENHEAP has a corresponding virtual address to + * be found. This is so we can save precious virtual space, as it's in + * short supply on arm32. This mapping is not subject to PDX compression + * because XENHEAP is known to be physically contiguous and can't hence + * jump over the PDX hole. This means we can avoid the roundtrips + * converting to/from pdx. + * + * @param ma Machine address + * @return Virtual address mapped to `ma` + */ +static inline void *maddr_to_virt(paddr_t ma) +{ + ASSERT(is_xen_heap_mfn(maddr_to_mfn(ma))); + ma -= mfn_to_maddr(directmap_mfn_start); + return (void *)(unsigned long) ma + XENHEAP_VIRT_START; +} +#else +/** + * Find the virtual address corresponding to a machine address + * + * The directmap covers all conventional memory accesible by the + * hypervisor. This means it's subject to PDX compression. + * + * Note there's an extra offset applied (directmap_base_pdx) on top of the + * regular PDX compression logic. Its purpose is to skip over the initial + * range of non-existing memory, should there be one. + * + * @param ma Machine address + * @return Virtual address mapped to `ma` + */ +static inline void *maddr_to_virt(paddr_t ma) +{ + ASSERT((mfn_to_pdx(maddr_to_mfn(ma)) - directmap_base_pdx) < + (DIRECTMAP_SIZE >> PAGE_SHIFT)); + return (void *)(XENHEAP_VIRT_START - + (directmap_base_pdx << PAGE_SHIFT) + + maddr_to_directmapoff(ma)); +} +#endif + /* * Print a walk of a page table or p2m * diff --git a/xen/arch/arm/include/asm/mpu/mm.h b/xen/arch/arm/include/asm/mpu/mm.h new file mode 100644 index 000000000000..6cfd0f5cd2c2 --- /dev/null +++ b/xen/arch/arm/include/asm/mpu/mm.h @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __ARM_MPU_MM_H__ +#define __ARM_MPU_MM_H__ + +#include +#include +#include + +#define virt_to_maddr(va) ((paddr_t)((vaddr_t)(va) & PADDR_MASK)) + +/* On MPU systems there is no translation, ma == va. */ +static inline void *maddr_to_virt(paddr_t ma) +{ + return _p(ma); +} + +#endif /* __ARM_MPU_MM_H__ */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue Apr 01 08:59:15 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 08:59:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.933675.1335545 (Exim 4.92) (envelope-from ) id 1tzXSh-0002Op-NQ; Tue, 01 Apr 2025 08:59:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 933675.1335545; Tue, 01 Apr 2025 08:59:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzXSh-0002Oi-KV; Tue, 01 Apr 2025 08:59:11 +0000 Received: by outflank-mailman (input) for mailman id 933675; Tue, 01 Apr 2025 08:59:10 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzXSg-0002OX-0K for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 08:59:10 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 92103686-0ed7-11f0-9ea7-5ba50f476ded; Tue, 01 Apr 2025 10:59:08 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0D3D314BF; Tue, 1 Apr 2025 01:59:11 -0700 (PDT) Received: from e125770.cambridge.arm.com (e125770.arm.com [10.1.199.43]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6C8923F694; Tue, 1 Apr 2025 01:59:05 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 92103686-0ed7-11f0-9ea7-5ba50f476ded From: Luca Fancellu To: xen-devel@lists.xenproject.org Cc: Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Alistair Francis , Bob Eshleman , Connor Davis , Oleksii Kurochko Subject: [PATCH v4 0/7] MPU mm subsystem skeleton Date: Tue, 1 Apr 2025 09:58:51 +0100 Message-Id: <20250401085858.2228991-1-luca.fancellu@arm.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Hi all, this serie implements the skeleton for the MPU memory management subsystem, at the end of the serie it will be possible to compile the Arm64 arch using MPU. The minimum Arm Kconfig configuration is this one: CONFIG_UNSUPPORTED=y CONFIG_MPU=y CONFIG_XEN_START_ADDRESS=0x0 Luca Fancellu (5): arm/mpu: Add HYPERVISOR_VIRT_START and avoid a check in xen.lds.S xen/arm: Introduce frame_table and virt_to_page arm/mpu: Kconfig symbols for MPU build arm/mpu: Implement stubs for ioremap_attr on MPU arm/mpu: Create the skeleton for MPU compilation Penny Zheng (2): xen/arm: Implement virt/maddr conversion in MPU system xen: introduce Kconfig ARCH_PAGING_MEMPOOL xen/arch/arm/Kconfig | 4 +- xen/arch/arm/arm64/mpu/Makefile | 2 + xen/arch/arm/arm64/mpu/p2m.c | 19 ++++++ xen/arch/arm/arm64/mpu/smpboot.c | 26 +++++++++ xen/arch/arm/dom0less-build.c | 70 +++++++++++++--------- xen/arch/arm/include/asm/domain.h | 2 + xen/arch/arm/include/asm/mm.h | 76 +++--------------------- xen/arch/arm/include/asm/mmu/mm.h | 70 ++++++++++++++++++++++ xen/arch/arm/include/asm/mpu/layout.h | 5 ++ xen/arch/arm/include/asm/mpu/mm.h | 41 +++++++++++++ xen/arch/arm/include/asm/mpu/p2m.h | 21 +++++++ xen/arch/arm/include/asm/p2m.h | 2 +- xen/arch/arm/mm.c | 5 ++ xen/arch/arm/mmu/pt.c | 5 -- xen/arch/arm/mpu/Makefile | 3 + xen/arch/arm/mpu/mm.c | 45 +++++++++++++- xen/arch/arm/mpu/p2m.c | 84 +++++++++++++++++++++++++++ xen/arch/arm/mpu/setup.c | 40 +++++++++++++ xen/arch/arm/mpu/vmap.c | 26 +++++++++ xen/arch/arm/xen.lds.S | 2 + xen/arch/riscv/stubs.c | 11 ---- xen/arch/x86/Kconfig | 1 + xen/common/Kconfig | 3 + xen/include/xen/domain.h | 17 ++++++ 24 files changed, 467 insertions(+), 113 deletions(-) create mode 100644 xen/arch/arm/arm64/mpu/p2m.c create mode 100644 xen/arch/arm/arm64/mpu/smpboot.c create mode 100644 xen/arch/arm/include/asm/mpu/mm.h create mode 100644 xen/arch/arm/include/asm/mpu/p2m.h create mode 100644 xen/arch/arm/mpu/p2m.c create mode 100644 xen/arch/arm/mpu/setup.c create mode 100644 xen/arch/arm/mpu/vmap.c -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue Apr 01 08:59:15 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 08:59:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.933676.1335552 (Exim 4.92) (envelope-from ) id 1tzXSi-0002S1-0V; Tue, 01 Apr 2025 08:59:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 933676.1335552; Tue, 01 Apr 2025 08:59:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzXSh-0002Qy-R4; Tue, 01 Apr 2025 08:59:11 +0000 Received: by outflank-mailman (input) for mailman id 933676; Tue, 01 Apr 2025 08:59:10 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzXSg-0002OX-Kr for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 08:59:10 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 92d9b3a6-0ed7-11f0-9ea7-5ba50f476ded; Tue, 01 Apr 2025 10:59:09 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 696D7150C; Tue, 1 Apr 2025 01:59:12 -0700 (PDT) Received: from e125770.cambridge.arm.com (e125770.arm.com [10.1.199.43]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E17953F694; Tue, 1 Apr 2025 01:59:07 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 92d9b3a6-0ed7-11f0-9ea7-5ba50f476ded From: Luca Fancellu To: xen-devel@lists.xenproject.org Cc: Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Subject: [PATCH v4 1/7] arm/mpu: Add HYPERVISOR_VIRT_START and avoid a check in xen.lds.S Date: Tue, 1 Apr 2025 09:58:52 +0100 Message-Id: <20250401085858.2228991-2-luca.fancellu@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250401085858.2228991-1-luca.fancellu@arm.com> References: <20250401085858.2228991-1-luca.fancellu@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The define HYPERVISOR_VIRT_START is required by the common code, even if MPU system doesn't use virtual memory, define it in mpu/layout.h in order to reuse existing code. Disable a check in the linker script for arm for !MMU systems. Signed-off-by: Luca Fancellu Reviewed-by: Michal Orzel --- v4 changes: - no changes v3 changes: - no changes v2 changes: - Add Michal R-by --- xen/arch/arm/include/asm/mpu/layout.h | 2 ++ xen/arch/arm/xen.lds.S | 2 ++ 2 files changed, 4 insertions(+) diff --git a/xen/arch/arm/include/asm/mpu/layout.h b/xen/arch/arm/include/asm/mpu/layout.h index d6d397f4c2ac..248e55f8882d 100644 --- a/xen/arch/arm/include/asm/mpu/layout.h +++ b/xen/arch/arm/include/asm/mpu/layout.h @@ -22,6 +22,8 @@ */ #define XEN_VIRT_START _AT(paddr_t, XEN_START_ADDRESS) +#define HYPERVISOR_VIRT_START XEN_VIRT_START + #endif /* __ARM_MPU_LAYOUT_H__ */ /* * Local variables: diff --git a/xen/arch/arm/xen.lds.S b/xen/arch/arm/xen.lds.S index bbccff1a0350..4342e54422a7 100644 --- a/xen/arch/arm/xen.lds.S +++ b/xen/arch/arm/xen.lds.S @@ -239,4 +239,6 @@ ASSERT(IS_ALIGNED(__bss_start, POINTER_ALIGN), "__bss_start is misaligned") ASSERT(IS_ALIGNED(__bss_end, POINTER_ALIGN), "__bss_end is misaligned") /* To simplify the logic in head.S, we want to _end to be page aligned */ ASSERT(IS_ALIGNED(_end, PAGE_SIZE), "_end is not page aligned") +#ifdef CONFIG_MMU ASSERT((_end - _start) <= XEN_VIRT_SIZE, "Xen is too big") +#endif -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue Apr 01 08:59:15 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 08:59:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.933679.1335586 (Exim 4.92) (envelope-from ) id 1tzXSl-0003KA-Oy; Tue, 01 Apr 2025 08:59:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 933679.1335586; Tue, 01 Apr 2025 08:59:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzXSl-0003JI-LU; Tue, 01 Apr 2025 08:59:15 +0000 Received: by outflank-mailman (input) for mailman id 933679; Tue, 01 Apr 2025 08:59:14 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzXSk-0002OX-Nc for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 08:59:14 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 9592794f-0ed7-11f0-9ea7-5ba50f476ded; Tue, 01 Apr 2025 10:59:14 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id F3179150C; Tue, 1 Apr 2025 01:59:16 -0700 (PDT) Received: from e125770.cambridge.arm.com (e125770.arm.com [10.1.199.43]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 779473F694; Tue, 1 Apr 2025 01:59:12 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 9592794f-0ed7-11f0-9ea7-5ba50f476ded From: Luca Fancellu To: xen-devel@lists.xenproject.org Cc: Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Subject: [PATCH v4 4/7] arm/mpu: Kconfig symbols for MPU build Date: Tue, 1 Apr 2025 09:58:55 +0100 Message-Id: <20250401085858.2228991-5-luca.fancellu@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250401085858.2228991-1-luca.fancellu@arm.com> References: <20250401085858.2228991-1-luca.fancellu@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The MPU system requires static memory to work, select that when building this memory management subsystem. While there, provide a restriction for the ARM_EFI Kconfig parameter to be built only when !MPU, the EFI stub is not used as there are no implementation of UEFI services for armv8-r. Signed-off-by: Luca Fancellu Reviewed-by: Michal Orzel --- v4 changes: - no changes v3 changes: - No changes v2 changes: - clarified commit message about static memory - Add R-by Michal --- xen/arch/arm/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig index 466b7db63cfd..7a7658812d0e 100644 --- a/xen/arch/arm/Kconfig +++ b/xen/arch/arm/Kconfig @@ -85,6 +85,7 @@ config MMU config MPU bool "MPU" if UNSUPPORTED + select STATIC_MEMORY help Memory Protection Unit (MPU). Select if you plan to run Xen on ARMv8-R systems supporting EL2. (UNSUPPORTED) @@ -102,7 +103,7 @@ config ACPI config ARM_EFI bool "UEFI boot service support" - depends on ARM_64 + depends on ARM_64 && !MPU default y help This option provides support for boot services through -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue Apr 01 08:59:19 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 08:59:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.933680.1335596 (Exim 4.92) (envelope-from ) id 1tzXSp-0003eK-0u; Tue, 01 Apr 2025 08:59:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 933680.1335596; Tue, 01 Apr 2025 08:59:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzXSo-0003eB-TF; Tue, 01 Apr 2025 08:59:18 +0000 Received: by outflank-mailman (input) for mailman id 933680; Tue, 01 Apr 2025 08:59:17 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzXSn-0003bM-H7 for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 08:59:17 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 9663f51c-0ed7-11f0-9ffb-bf95429c2676; Tue, 01 Apr 2025 10:59:15 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5CE9814BF; Tue, 1 Apr 2025 01:59:18 -0700 (PDT) Received: from e125770.cambridge.arm.com (e125770.arm.com [10.1.199.43]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D59763F694; Tue, 1 Apr 2025 01:59:13 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 9663f51c-0ed7-11f0-9ffb-bf95429c2676 From: Luca Fancellu To: xen-devel@lists.xenproject.org Cc: Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Subject: [PATCH v4 5/7] arm/mpu: Implement stubs for ioremap_attr on MPU Date: Tue, 1 Apr 2025 09:58:56 +0100 Message-Id: <20250401085858.2228991-6-luca.fancellu@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250401085858.2228991-1-luca.fancellu@arm.com> References: <20250401085858.2228991-1-luca.fancellu@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Implement ioremap_attr() stub for MPU system; the implementation of ioremap() is the same between MMU and MPU system, and it relies on ioremap_attr(), so move the definition from mmu/pt.c to arm/mm.c. Signed-off-by: Luca Fancellu Reviewed-by: Michal Orzel --- v4 changes: - no changes v3 changes: - No changes v2 changes: - Add R-by Michal --- xen/arch/arm/mm.c | 5 +++++ xen/arch/arm/mmu/pt.c | 5 ----- xen/arch/arm/mpu/mm.c | 6 ++++++ 3 files changed, 11 insertions(+), 5 deletions(-) diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c index a56e20ba2bdc..5a52f0c623e5 100644 --- a/xen/arch/arm/mm.c +++ b/xen/arch/arm/mm.c @@ -395,6 +395,11 @@ unsigned long get_upper_mfn_bound(void) return max_page - 1; } +void *ioremap(paddr_t pa, size_t len) +{ + return ioremap_attr(pa, len, PAGE_HYPERVISOR_NOCACHE); +} + /* * Local variables: * mode: C diff --git a/xen/arch/arm/mmu/pt.c b/xen/arch/arm/mmu/pt.c index da28d669e796..11cb1c66dac8 100644 --- a/xen/arch/arm/mmu/pt.c +++ b/xen/arch/arm/mmu/pt.c @@ -223,11 +223,6 @@ void *ioremap_attr(paddr_t start, size_t len, unsigned int attributes) return ptr + offs; } -void *ioremap(paddr_t pa, size_t len) -{ - return ioremap_attr(pa, len, PAGE_HYPERVISOR_NOCACHE); -} - static int create_xen_table(lpae_t *entry) { mfn_t mfn; diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c index 3632011c1013..4e9a2405d8c5 100644 --- a/xen/arch/arm/mpu/mm.c +++ b/xen/arch/arm/mpu/mm.c @@ -17,6 +17,12 @@ static void __init __maybe_unused build_assertions(void) BUILD_BUG_ON(PAGE_SIZE != SZ_4K); } +void __iomem *ioremap_attr(paddr_t start, size_t len, unsigned int flags) +{ + BUG_ON("unimplemented"); + return NULL; +} + /* * Local variables: * mode: C -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue Apr 01 08:59:21 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 08:59:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.933684.1335606 (Exim 4.92) (envelope-from ) id 1tzXSr-0003yx-FT; Tue, 01 Apr 2025 08:59:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 933684.1335606; Tue, 01 Apr 2025 08:59:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzXSr-0003ya-BW; Tue, 01 Apr 2025 08:59:21 +0000 Received: by outflank-mailman (input) for mailman id 933684; Tue, 01 Apr 2025 08:59:20 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzXSq-0002OX-0D for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 08:59:20 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-sth1.inumbo.com (Halon) with ESMTP id 983424ac-0ed7-11f0-9ea7-5ba50f476ded; Tue, 01 Apr 2025 10:59:18 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 64E2F14BF; Tue, 1 Apr 2025 01:59:21 -0700 (PDT) Received: from e125770.cambridge.arm.com (e125770.arm.com [10.1.199.43]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 400733F694; Tue, 1 Apr 2025 01:59:15 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 983424ac-0ed7-11f0-9ea7-5ba50f476ded From: Luca Fancellu To: xen-devel@lists.xenproject.org Cc: Penny Zheng , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Alistair Francis , Bob Eshleman , Connor Davis , Oleksii Kurochko , Penny Zheng , Wei Chen Subject: [PATCH v4 6/7] xen: introduce Kconfig ARCH_PAGING_MEMPOOL Date: Tue, 1 Apr 2025 09:58:57 +0100 Message-Id: <20250401085858.2228991-7-luca.fancellu@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250401085858.2228991-1-luca.fancellu@arm.com> References: <20250401085858.2228991-1-luca.fancellu@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Penny Zheng ARM MPU system doesn't need to use paging memory pool, as MPU memory mapping table at most takes only one 4KB page, which is enough to manage the maximum 255 MPU memory regions, for all EL2 stage 1 translation and EL1 stage 2 translation. Introduce ARCH_PAGING_MEMPOOL Kconfig common symbol, selected for Arm MMU systems and x86. Removed stubs from RISC-V now that the common code provide them and the functions are not gonna be used. Wrap the code inside 'construct_domU' that deal with p2m paging allocation in a new function 'domain_p2m_set_allocation', protected by ARCH_PAGING_MEMPOOL, this is done in this way to prevent polluting the former function with #ifdefs and improve readability Introduce arch_{get,set}_paging_mempool_size stubs for architecture with !ARCH_PAGING_MEMPOOL. Remove 'struct paging_domain' from Arm 'struct arch_domain' when the field is not required. Signed-off-by: Penny Zheng Signed-off-by: Wei Chen Signed-off-by: Luca Fancellu Reviewed-by: Michal Orzel # arm Reviewed-by: Oleksii Kurochko # riscv --- v4 changes: - removed arch_{get,set}_paging_mempool_size from RISC-V since they are not gonna be used (confirmed by Oleksii) - Removed blank lines around #ifdef/#else/#endif - Add Michal R-by #arm - Add Oleksii R-by #riscv v3 changes: - Introduced ARCH_PAGING_MEMPOOL instead of HAS_PAGING_MEMPOOL v2 changes: - make Kconfig HAS_PAGING_MEMPOOL common - protect also "xen,domain-p2m-mem-mb" reading with HAS_PAGING_MEMPOOL - do not define p2m_teardown{_allocation} in this patch - change commit message --- xen/arch/arm/Kconfig | 1 + xen/arch/arm/dom0less-build.c | 70 +++++++++++++++++++------------ xen/arch/arm/include/asm/domain.h | 2 + xen/arch/riscv/stubs.c | 11 ----- xen/arch/x86/Kconfig | 1 + xen/common/Kconfig | 3 ++ xen/include/xen/domain.h | 17 ++++++++ 7 files changed, 68 insertions(+), 37 deletions(-) diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig index 7a7658812d0e..565f28833118 100644 --- a/xen/arch/arm/Kconfig +++ b/xen/arch/arm/Kconfig @@ -75,6 +75,7 @@ choice config MMU bool "MMU" + select ARCH_PAGING_MEMPOOL select HAS_LLC_COLORING if !NUMA && ARM_64 select HAS_PMAP select HAS_VMAP diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c index 573b0d25ae41..bd15563750e8 100644 --- a/xen/arch/arm/dom0less-build.c +++ b/xen/arch/arm/dom0less-build.c @@ -673,21 +673,6 @@ static int __init prepare_dtb_domU(struct domain *d, struct kernel_info *kinfo) return -EINVAL; } -static unsigned long __init domain_p2m_pages(unsigned long maxmem_kb, - unsigned int smp_cpus) -{ - /* - * Keep in sync with libxl__get_required_paging_memory(). - * 256 pages (1MB) per vcpu, plus 1 page per MiB of RAM for the P2M map, - * plus 128 pages to cover extended regions. - */ - unsigned long memkb = 4 * (256 * smp_cpus + (maxmem_kb / 1024) + 128); - - BUILD_BUG_ON(PAGE_SIZE != SZ_4K); - - return DIV_ROUND_UP(memkb, 1024) << (20 - PAGE_SHIFT); -} - static int __init alloc_xenstore_evtchn(struct domain *d) { evtchn_alloc_unbound_t alloc; @@ -841,6 +826,49 @@ static void __init domain_vcpu_affinity(struct domain *d, } } +#ifdef CONFIG_ARCH_PAGING_MEMPOOL +static unsigned long __init domain_p2m_pages(unsigned long maxmem_kb, + unsigned int smp_cpus) +{ + /* + * Keep in sync with libxl__get_required_paging_memory(). + * 256 pages (1MB) per vcpu, plus 1 page per MiB of RAM for the P2M map, + * plus 128 pages to cover extended regions. + */ + unsigned long memkb = 4 * (256 * smp_cpus + (maxmem_kb / 1024) + 128); + + BUILD_BUG_ON(PAGE_SIZE != SZ_4K); + + return DIV_ROUND_UP(memkb, 1024) << (20 - PAGE_SHIFT); +} + +static int __init domain_p2m_set_allocation(struct domain *d, uint64_t mem, + const struct dt_device_node *node) +{ + unsigned long p2m_pages; + uint32_t p2m_mem_mb; + int rc; + + rc = dt_property_read_u32(node, "xen,domain-p2m-mem-mb", &p2m_mem_mb); + /* If xen,domain-p2m-mem-mb is not specified, use the default value. */ + p2m_pages = rc ? + p2m_mem_mb << (20 - PAGE_SHIFT) : + domain_p2m_pages(mem, d->max_vcpus); + + spin_lock(&d->arch.paging.lock); + rc = p2m_set_allocation(d, p2m_pages, NULL); + spin_unlock(&d->arch.paging.lock); + + return rc; +} +#else /* !CONFIG_ARCH_PAGING_MEMPOOL */ +static inline int domain_p2m_set_allocation(struct domain *d, uint64_t mem, + const struct dt_device_node *node) +{ + return 0; +} +#endif /* CONFIG_ARCH_PAGING_MEMPOOL */ + static int __init construct_domU(struct domain *d, const struct dt_device_node *node) { @@ -848,8 +876,6 @@ static int __init construct_domU(struct domain *d, const char *dom0less_enhanced; int rc; u64 mem; - u32 p2m_mem_mb; - unsigned long p2m_pages; rc = dt_property_read_u64(node, "memory", &mem); if ( !rc ) @@ -859,15 +885,7 @@ static int __init construct_domU(struct domain *d, } kinfo.unassigned_mem = (paddr_t)mem * SZ_1K; - rc = dt_property_read_u32(node, "xen,domain-p2m-mem-mb", &p2m_mem_mb); - /* If xen,domain-p2m-mem-mb is not specified, use the default value. */ - p2m_pages = rc ? - p2m_mem_mb << (20 - PAGE_SHIFT) : - domain_p2m_pages(mem, d->max_vcpus); - - spin_lock(&d->arch.paging.lock); - rc = p2m_set_allocation(d, p2m_pages, NULL); - spin_unlock(&d->arch.paging.lock); + rc = domain_p2m_set_allocation(d, mem, node); if ( rc != 0 ) return rc; diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/asm/domain.h index 50b6a4b00982..a3487ca71303 100644 --- a/xen/arch/arm/include/asm/domain.h +++ b/xen/arch/arm/include/asm/domain.h @@ -75,7 +75,9 @@ struct arch_domain struct hvm_domain hvm; +#ifdef CONFIG_ARCH_PAGING_MEMPOOL struct paging_domain paging; +#endif struct vmmio vmmio; diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c index 5951b0ce91ed..cd594eb6b849 100644 --- a/xen/arch/riscv/stubs.c +++ b/xen/arch/riscv/stubs.c @@ -335,11 +335,6 @@ void arch_do_physinfo(struct xen_sysctl_physinfo *pi) /* p2m.c */ -int arch_set_paging_mempool_size(struct domain *d, uint64_t size) -{ - BUG_ON("unimplemented"); -} - int unmap_mmio_regions(struct domain *d, gfn_t start_gfn, unsigned long nr, @@ -362,12 +357,6 @@ int set_foreign_p2m_entry(struct domain *d, const struct domain *fd, BUG_ON("unimplemented"); } -/* Return the size of the pool, in bytes. */ -int arch_get_paging_mempool_size(struct domain *d, uint64_t *size) -{ - BUG_ON("unimplemented"); -} - int guest_physmap_remove_page(struct domain *d, gfn_t gfn, mfn_t mfn, unsigned int page_order) { diff --git a/xen/arch/x86/Kconfig b/xen/arch/x86/Kconfig index 18efdb2e3130..de2fa37f088d 100644 --- a/xen/arch/x86/Kconfig +++ b/xen/arch/x86/Kconfig @@ -9,6 +9,7 @@ config X86 select ACPI_NUMA select ALTERNATIVE_CALL select ARCH_MAP_DOMAIN_PAGE + select ARCH_PAGING_MEMPOOL select ARCH_SUPPORTS_INT128 imply CORE_PARKING select FUNCTION_ALIGNMENT_16B diff --git a/xen/common/Kconfig b/xen/common/Kconfig index a6aa2c5c1456..218357d593b7 100644 --- a/xen/common/Kconfig +++ b/xen/common/Kconfig @@ -44,6 +44,9 @@ config ALTERNATIVE_CALL config ARCH_MAP_DOMAIN_PAGE bool +config ARCH_PAGING_MEMPOOL + bool + config GENERIC_BUG_FRAME bool diff --git a/xen/include/xen/domain.h b/xen/include/xen/domain.h index 83069de50118..a34daa7d10ab 100644 --- a/xen/include/xen/domain.h +++ b/xen/include/xen/domain.h @@ -2,6 +2,7 @@ #ifndef __XEN_DOMAIN_H__ #define __XEN_DOMAIN_H__ +#include #include #include @@ -114,9 +115,25 @@ void arch_get_info_guest(struct vcpu *v, vcpu_guest_context_u c); int arch_initialise_vcpu(struct vcpu *v, XEN_GUEST_HANDLE_PARAM(void) arg); int default_initialise_vcpu(struct vcpu *v, XEN_GUEST_HANDLE_PARAM(void) arg); +#ifdef CONFIG_ARCH_PAGING_MEMPOOL + int arch_get_paging_mempool_size(struct domain *d, uint64_t *size /* bytes */); int arch_set_paging_mempool_size(struct domain *d, uint64_t size /* bytes */); +#else /* !CONFIG_ARCH_PAGING_MEMPOOL */ + +static inline int arch_get_paging_mempool_size(struct domain *d, uint64_t *size) +{ + return -EOPNOTSUPP; +} + +static inline int arch_set_paging_mempool_size(struct domain *d, uint64_t size) +{ + return -EOPNOTSUPP; +} + +#endif /* CONFIG_ARCH_PAGING_MEMPOOL */ + bool update_runstate_area(struct vcpu *v); int domain_relinquish_resources(struct domain *d); -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue Apr 01 08:59:22 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 08:59:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.933687.1335615 (Exim 4.92) (envelope-from ) id 1tzXSs-0004FD-R2; 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Tue, 1 Apr 2025 01:59:22 -0700 (PDT) Received: from e125770.cambridge.arm.com (e125770.arm.com [10.1.199.43]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 4582E3F694; Tue, 1 Apr 2025 01:59:18 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 990b0e36-0ed7-11f0-9ffb-bf95429c2676 From: Luca Fancellu To: xen-devel@lists.xenproject.org Cc: Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Subject: [PATCH v4 7/7] arm/mpu: Create the skeleton for MPU compilation Date: Tue, 1 Apr 2025 09:58:58 +0100 Message-Id: <20250401085858.2228991-8-luca.fancellu@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250401085858.2228991-1-luca.fancellu@arm.com> References: <20250401085858.2228991-1-luca.fancellu@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This commit introduces the skeleton for the MPU memory management subsystem that allows the compilation on Arm64. Signed-off-by: Luca Fancellu Reviewed-by: Michal Orzel --- The implementation of setup_virt_paging() is under arm64/mpu because it will have a different implementation from arm32. v4 changes: - Add Michal R-by v3 changes: - rebase changes v2 changes: - p2m_teardown{_allocation} stubs are now part of this patch - included missing headers - rename vmap-mpu.c to vmap.c - remove comment "Not used on MPU system" on implemented stubs --- --- xen/arch/arm/arm64/mpu/Makefile | 2 + xen/arch/arm/arm64/mpu/p2m.c | 19 +++++++ xen/arch/arm/arm64/mpu/smpboot.c | 26 +++++++++ xen/arch/arm/include/asm/mpu/p2m.h | 21 ++++++++ xen/arch/arm/include/asm/p2m.h | 2 +- xen/arch/arm/mpu/Makefile | 3 ++ xen/arch/arm/mpu/mm.c | 25 +++++++++ xen/arch/arm/mpu/p2m.c | 84 ++++++++++++++++++++++++++++++ xen/arch/arm/mpu/setup.c | 40 ++++++++++++++ xen/arch/arm/mpu/vmap.c | 26 +++++++++ 10 files changed, 247 insertions(+), 1 deletion(-) create mode 100644 xen/arch/arm/arm64/mpu/p2m.c create mode 100644 xen/arch/arm/arm64/mpu/smpboot.c create mode 100644 xen/arch/arm/include/asm/mpu/p2m.h create mode 100644 xen/arch/arm/mpu/p2m.c create mode 100644 xen/arch/arm/mpu/setup.c create mode 100644 xen/arch/arm/mpu/vmap.c diff --git a/xen/arch/arm/arm64/mpu/Makefile b/xen/arch/arm/arm64/mpu/Makefile index 3340058c08c6..cf0540aecc84 100644 --- a/xen/arch/arm/arm64/mpu/Makefile +++ b/xen/arch/arm/arm64/mpu/Makefile @@ -1 +1,3 @@ obj-y += head.o +obj-y += p2m.o +obj-y += smpboot.o diff --git a/xen/arch/arm/arm64/mpu/p2m.c b/xen/arch/arm/arm64/mpu/p2m.c new file mode 100644 index 000000000000..b6d8b2777b58 --- /dev/null +++ b/xen/arch/arm/arm64/mpu/p2m.c @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include + +void __init setup_virt_paging(void) +{ + BUG_ON("unimplemented"); +} + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/arch/arm/arm64/mpu/smpboot.c b/xen/arch/arm/arm64/mpu/smpboot.c new file mode 100644 index 000000000000..5090f443f577 --- /dev/null +++ b/xen/arch/arm/arm64/mpu/smpboot.c @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include + +int prepare_secondary_mm(int cpu) +{ + BUG_ON("unimplemented"); + return -EINVAL; +} + +void update_boot_mapping(bool enable) +{ + BUG_ON("unimplemented"); +} + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/arch/arm/include/asm/mpu/p2m.h b/xen/arch/arm/include/asm/mpu/p2m.h new file mode 100644 index 000000000000..e46d9e757a1d --- /dev/null +++ b/xen/arch/arm/include/asm/mpu/p2m.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __ARM_MPU_P2M_H__ +#define __ARM_MPU_P2M_H__ + +struct p2m_domain; + +static inline void p2m_clear_root_pages(struct p2m_domain *p2m) {} + +static inline void p2m_tlb_flush_sync(struct p2m_domain *p2m) {} + +#endif /* __ARM_MPU_P2M_H__ */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/arch/arm/include/asm/p2m.h b/xen/arch/arm/include/asm/p2m.h index 594dc4004138..2d53bf9b6177 100644 --- a/xen/arch/arm/include/asm/p2m.h +++ b/xen/arch/arm/include/asm/p2m.h @@ -168,7 +168,7 @@ typedef enum { #if defined(CONFIG_MMU) # include #else -# error "Unknown memory management layout" +# include #endif static inline bool arch_acquire_resource_check(struct domain *d) diff --git a/xen/arch/arm/mpu/Makefile b/xen/arch/arm/mpu/Makefile index b18cec483671..21bbc517b51a 100644 --- a/xen/arch/arm/mpu/Makefile +++ b/xen/arch/arm/mpu/Makefile @@ -1 +1,4 @@ obj-y += mm.o +obj-y += p2m.o +obj-y += setup.init.o +obj-y += vmap.o diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c index 4e9a2405d8c5..07c8959f4ee9 100644 --- a/xen/arch/arm/mpu/mm.c +++ b/xen/arch/arm/mpu/mm.c @@ -1,9 +1,12 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include +#include #include #include #include #include +#include struct page_info *frame_table; @@ -17,6 +20,28 @@ static void __init __maybe_unused build_assertions(void) BUILD_BUG_ON(PAGE_SIZE != SZ_4K); } +void __init setup_mm(void) +{ + BUG_ON("unimplemented"); +} + +int modify_xen_mappings(unsigned long s, unsigned long e, unsigned int nf) +{ + BUG_ON("unimplemented"); + return -EINVAL; +} + +void dump_hyp_walk(vaddr_t addr) +{ + BUG_ON("unimplemented"); +} + +/* Release all __init and __initdata ranges to be reused */ +void free_init_memory(void) +{ + BUG_ON("unimplemented"); +} + void __iomem *ioremap_attr(paddr_t start, size_t len, unsigned int flags) { BUG_ON("unimplemented"); diff --git a/xen/arch/arm/mpu/p2m.c b/xen/arch/arm/mpu/p2m.c new file mode 100644 index 000000000000..f7fb58ab6aa8 --- /dev/null +++ b/xen/arch/arm/mpu/p2m.c @@ -0,0 +1,84 @@ + +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include +#include +#include +#include + +int p2m_set_entry(struct p2m_domain *p2m, gfn_t sgfn, unsigned long nr, + mfn_t smfn, p2m_type_t t, p2m_access_t a) +{ + BUG_ON("unimplemented"); + return -EINVAL; +} + +mfn_t p2m_get_entry(struct p2m_domain *p2m, gfn_t gfn, p2m_type_t *t, + p2m_access_t *a, unsigned int *page_order, bool *valid) +{ + BUG_ON("unimplemented"); + return INVALID_MFN; +} + +void p2m_dump_info(struct domain *d) +{ + BUG_ON("unimplemented"); +} + +int p2m_init(struct domain *d) +{ + BUG_ON("unimplemented"); + return -EINVAL; +} + +void p2m_save_state(struct vcpu *p) +{ + BUG_ON("unimplemented"); +} + +void p2m_restore_state(struct vcpu *n) +{ + BUG_ON("unimplemented"); +} + +void p2m_final_teardown(struct domain *d) +{ + BUG_ON("unimplemented"); +} + +bool p2m_resolve_translation_fault(struct domain *d, gfn_t gfn) +{ + BUG_ON("unimplemented"); + return false; +} + +void p2m_flush_vm(struct vcpu *v) {} + +int relinquish_p2m_mapping(struct domain *d) +{ + return 0; +} + +void p2m_domain_creation_finished(struct domain *d) {} + +int p2m_teardown(struct domain *d) +{ + return 0; +} + +int p2m_teardown_allocation(struct domain *d) +{ + return 0; +} + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/arch/arm/mpu/setup.c b/xen/arch/arm/mpu/setup.c new file mode 100644 index 000000000000..b4da77003f47 --- /dev/null +++ b/xen/arch/arm/mpu/setup.c @@ -0,0 +1,40 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include +#include + +void __init setup_pagetables(void) {} + +void * __init early_fdt_map(paddr_t fdt_paddr) +{ + BUG_ON("unimplemented"); + return NULL; +} + +/* + * copy_from_paddr - copy data from a physical address + * @dst: destination virtual address + * @paddr: source physical address + * @len: length to copy + */ +void __init copy_from_paddr(void *dst, paddr_t paddr, unsigned long len) +{ + BUG_ON("unimplemented"); +} + +void __init remove_early_mappings(void) +{ + BUG_ON("unimplemented"); +} + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/arch/arm/mpu/vmap.c b/xen/arch/arm/mpu/vmap.c new file mode 100644 index 000000000000..f977b79cd436 --- /dev/null +++ b/xen/arch/arm/mpu/vmap.c @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include + +void *vmap_contig(mfn_t mfn, unsigned int nr) +{ + BUG_ON("unimplemented"); + return NULL; +} + +void vunmap(const void *va) +{ + BUG_ON("unimplemented"); +} + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue Apr 01 09:02:05 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 09:02:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.933775.1335625 (Exim 4.92) (envelope-from ) id 1tzXVU-0000Tm-98; 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Tue, 01 Apr 2025 02:01:59 -0700 (PDT) Message-ID: Date: Tue, 1 Apr 2025 11:01:57 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 01/19] xen/x86: remove "depends on !PV_SHIM_EXCLUSIVE" To: "Penny, Zheng" Cc: "xen-devel@lists.xenproject.org" , "Huang, Ray" , Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , "Orzel, Michal" , Julien Grall , Stefano Stabellini References: <20250326055053.3313146-1-Penny.Zheng@amd.com> <20250326055053.3313146-2-Penny.Zheng@amd.com> <6b3c3baa-331c-44fa-9085-9b0bf72c62a1@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 01.04.2025 10:41, Penny, Zheng wrote: >> -----Original Message----- >> From: Jan Beulich >> Sent: Monday, March 31, 2025 2:30 PM >> >> On 29.03.2025 00:56, Stefano Stabellini wrote: >>> On Wed, 26 Mar 2025, Penny Zheng wrote: >>>> We intend to remove all "depends on !PV_SHIM_EXCLUSIVE" (also the >>>> functionally equivalent "if !...") in Kconfig file, since negative >>>> dependancy will badly affect allyesconfig. >>>> This commit is based on "x86: provide an inverted Kconfig control for >>>> shim-exclusive mode"[1] >>>> >>>> [1] >>>> https://lists.xen.org/archives/html/xen-devel/2023-03/msg00040.html >>>> >>>> Signed-off-by: Jan Beulich >> >> Where's this coming from, if I may ask? > > I said in the commit message, this commit is based on your commit "x86: provide an inverted Kconfig control for > shim-exclusive mode"[1]. I don't think this belongs there. Also recall what I said elsewhere about "This commit ..." and alike not being appropriate wording for commit messages. > So I think I shall add-in the original author, if it is not the rule, I'll remove it. Please remove it. You necessarily touch a few of the same places, but that's about it. I accept this route being taken, but I don't agree with it. I don't want to be viewed as a co-author in such a case. However, you having gone from that patch (which had an entirely different intention), has lead to the patch here being incomplete. At least my understanding of Andrew's original request was to not only prune Kconfig-s of the dependency, but also e.g. various Makefile-s. Possibly even .c and .h ones. That clearly wasn't necessary with the approach I had taken. Please consult with Andrew to confirm. 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Apr 2025 09:09:40.5519 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3143e36a-62bf-4e12-069d-08dd70fcef56 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B069.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS4PR12MB9684 There's no benefit in having process_shm_chosen() next to process_shm(). The former is just a helper to pass "/chosen" node to the latter for hwdom case. Drop process_shm_chosen() and instead use process_shm() passing NULL as node parameter, which will result in searching for and using /chosen to find shm node (the DT full path search is done in process_shm() to avoid expensive lookup if !CONFIG_STATIC_SHM). This will simplify future handling of hw/control domain separation. Signed-off-by: Michal Orzel --- xen/arch/arm/domain_build.c | 2 +- xen/arch/arm/include/asm/static-shmem.h | 14 -------------- xen/arch/arm/static-shmem.c | 4 ++++ 3 files changed, 5 insertions(+), 15 deletions(-) diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index 2b5b4331834f..7f9e17e1de4d 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -2325,7 +2325,7 @@ int __init construct_hwdom(struct kernel_info *kinfo) else allocate_memory(d, kinfo); - rc = process_shm_chosen(d, kinfo); + rc = process_shm(d, kinfo, NULL); if ( rc < 0 ) return rc; diff --git a/xen/arch/arm/include/asm/static-shmem.h b/xen/arch/arm/include/asm/static-shmem.h index fd0867c4f26b..94eaa9d500f9 100644 --- a/xen/arch/arm/include/asm/static-shmem.h +++ b/xen/arch/arm/include/asm/static-shmem.h @@ -18,14 +18,6 @@ int make_resv_memory_node(const struct kernel_info *kinfo, int addrcells, int process_shm(struct domain *d, struct kernel_info *kinfo, const struct dt_device_node *node); -static inline int process_shm_chosen(struct domain *d, - struct kernel_info *kinfo) -{ - const struct dt_device_node *node = dt_find_node_by_path("/chosen"); - - return process_shm(d, kinfo, node); -} - int process_shm_node(const void *fdt, int node, uint32_t address_cells, uint32_t size_cells); @@ -74,12 +66,6 @@ static inline int process_shm(struct domain *d, struct kernel_info *kinfo, return 0; } -static inline int process_shm_chosen(struct domain *d, - struct kernel_info *kinfo) -{ - return 0; -} - static inline void init_sharedmem_pages(void) {}; static inline int remove_shm_from_rangeset(const struct kernel_info *kinfo, diff --git a/xen/arch/arm/static-shmem.c b/xen/arch/arm/static-shmem.c index c74fa13d4847..cda90105923d 100644 --- a/xen/arch/arm/static-shmem.c +++ b/xen/arch/arm/static-shmem.c @@ -297,6 +297,10 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo, { struct dt_device_node *shm_node; + /* Hwdom case - shm node under /chosen */ + if ( !node ) + node = dt_find_node_by_path("/chosen"); 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Tue, 01 Apr 2025 03:09:09 -0700 (PDT) Message-ID: <694eac75-e872-4ba0-80ed-95c14cd11f5e@suse.com> Date: Tue, 1 Apr 2025 12:09:08 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH v5] xen: simplify bitmap_to_xenctl_bitmap for little endian To: Stefano Stabellini , xen-devel@lists.xenproject.org Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20250401005008.2787764-1-stefano.stabellini@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20250401005008.2787764-1-stefano.stabellini@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit From: Stefano Stabellini The little endian implementation of bitmap_to_xenctl_bitmap leads to unnecessary xmallocs and xfrees. Given that Xen only supports little endian architectures, it is worth optimizing. This patch removes the need for the xmalloc on little endian architectures. Remove clamp_last_byte as it is only called once and only needs to modify one byte. Inline it. Signed-off-by: Stefano Stabellini Signed-off-by: Jan Beulich --- v5: Fix IS_ENABLED() use. Keep more code common. Move comment. Convert LE bitmap_long_to_byte() to just a declaration. --- a/xen/common/bitmap.c +++ b/xen/common/bitmap.c @@ -40,21 +40,6 @@ * for the best explanations of this ordering. */ -/* - * If a bitmap has a number of bits which is not a multiple of 8 then - * the last few bits of the last byte of the bitmap can be - * unexpectedly set which can confuse consumers (e.g. in the tools) - * who also round up their loops to 8 bits. Ensure we clear those left - * over bits so as to prevent surprises. - */ -static void clamp_last_byte(uint8_t *bp, unsigned int nbits) -{ - unsigned int remainder = nbits % 8; - - if (remainder) - bp[nbits/8] &= (1U << remainder) - 1; -} - int __bitmap_empty(const unsigned long *bitmap, unsigned int bits) { int k, lim = bits/BITS_PER_LONG; @@ -338,7 +323,6 @@ static void bitmap_long_to_byte(uint8_t nbits -= 8; } } - clamp_last_byte(bp, nbits); } static void bitmap_byte_to_long(unsigned long *lp, const uint8_t *bp, @@ -359,12 +343,11 @@ static void bitmap_byte_to_long(unsigned #elif defined(__LITTLE_ENDIAN) -static void bitmap_long_to_byte(uint8_t *bp, const unsigned long *lp, - unsigned int nbits) -{ - memcpy(bp, lp, DIV_ROUND_UP(nbits, BITS_PER_BYTE)); - clamp_last_byte(bp, nbits); -} +#define LITTLE_ENDIAN 1 /* For IS_ENABLED(). */ + +/* Unused function, but a declaration is needed. */ +void bitmap_long_to_byte(uint8_t *bp, const unsigned long *lp, + unsigned int nbits); static void bitmap_byte_to_long(unsigned long *lp, const uint8_t *bp, unsigned int nbits) @@ -384,22 +367,46 @@ int bitmap_to_xenctl_bitmap(struct xenct uint8_t zero = 0; int err = 0; unsigned int xen_bytes = DIV_ROUND_UP(nbits, BITS_PER_BYTE); - uint8_t *bytemap = xmalloc_array(uint8_t, xen_bytes); + const uint8_t *bytemap; + uint8_t last, *buf = NULL; - if ( !bytemap ) - return -ENOMEM; + if ( !IS_ENABLED(LITTLE_ENDIAN) ) + { + buf = xmalloc_array(uint8_t, xen_bytes); + if ( !buf ) + return -ENOMEM; + + bitmap_long_to_byte(buf, bitmap, nbits); + + bytemap = buf; + } + else + bytemap = (const uint8_t *)bitmap; guest_bytes = DIV_ROUND_UP(xenctl_bitmap->nr_bits, BITS_PER_BYTE); copy_bytes = min(guest_bytes, xen_bytes); - bitmap_long_to_byte(bytemap, bitmap, nbits); + if ( copy_bytes > 1 && + copy_to_guest(xenctl_bitmap->bitmap, bytemap, copy_bytes - 1) ) + err = -EFAULT; + + /* + * If a bitmap has a number of bits which is not a multiple of 8 then the + * last few bits of the last byte of the bitmap can be unexpectedly set, + * which can confuse consumers (e.g. in the tools), who also may round up + * their loops to 8 bits. Ensure we clear those left over bits so as to + * prevent surprises. + */ + last = bytemap[nbits / 8]; + if ( nbits % 8 ) + last &= (1U << (nbits % 8)) - 1; + + xfree(buf); if ( copy_bytes && - copy_to_guest(xenctl_bitmap->bitmap, bytemap, copy_bytes) ) + copy_to_guest_offset(xenctl_bitmap->bitmap, copy_bytes - 1, &last, 1) ) err = -EFAULT; - xfree(bytemap); - for ( i = copy_bytes; !err && i < guest_bytes; i++ ) if ( copy_to_guest_offset(xenctl_bitmap->bitmap, i, &zero, 1) ) err = -EFAULT; From xen-devel-bounces@lists.xenproject.org Tue Apr 01 10:34:27 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 10:34:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.933853.1335676 (Exim 4.92) (envelope-from ) id 1tzYwn-00077q-Qy; Tue, 01 Apr 2025 10:34:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 933853.1335676; Tue, 01 Apr 2025 10:34:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzYwn-00077j-Nt; Tue, 01 Apr 2025 10:34:21 +0000 Received: by outflank-mailman (input) for mailman id 933853; Tue, 01 Apr 2025 10:34:20 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzYwm-00077d-C9 for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 10:34:20 +0000 Received: from mail-wr1-x42a.google.com (mail-wr1-x42a.google.com [2a00:1450:4864:20::42a]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id de0f55f6-0ee4-11f0-9ea7-5ba50f476ded; Tue, 01 Apr 2025 12:34:19 +0200 (CEST) Received: by mail-wr1-x42a.google.com with SMTP id ffacd0b85a97d-3913958ebf2so4111428f8f.3 for ; Tue, 01 Apr 2025 03:34:19 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 01 Apr 2025 03:34:18 -0700 (PDT) Message-ID: Date: Tue, 1 Apr 2025 12:34:16 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 1/4] xen/riscv: introduce preinit_xen_time() To: Oleksii Kurochko Cc: Alistair Francis , Bob Eshleman , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <4ddde60347edf6740fbc69b5739d099616f5b5ff.1743165791.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <4ddde60347edf6740fbc69b5739d099616f5b5ff.1743165791.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 28.03.2025 17:58, Oleksii Kurochko wrote: > preinit_xen_time() does two things: > 1. Parse timebase-frequency properpy of /cpus node to initialize cpu_khz > variable. > 2. Initialize boot_clock_cycles with the current time counter value to > have starting point for Xen. > > timebase-frequency is read as a uint32_t because it is unlikely that the > timer will run at more than 4 GHz. If timebase-frequency exceeds 4 GHz, > a panic() is triggered, since dt_property_read_u32() will return 0 if > the size of the timebase-frequency property is greater than the size of > the output variable. > > Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich However, ... > --- a/xen/arch/riscv/include/asm/time.h > +++ b/xen/arch/riscv/include/asm/time.h > @@ -3,8 +3,12 @@ > #define ASM__RISCV__TIME_H > > #include > +#include > #include > > +/* Clock cycles count at Xen startup */ > +extern uint64_t boot_clock_cycles; ... this should use cycles_t, just that for this cycles_t first needs changing. Hence why this wants to be another separate change imo. I.e. I'll put this one in as is. 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Tue, 01 Apr 2025 03:58:37 -0700 (PDT) Message-ID: Date: Tue, 1 Apr 2025 12:58:35 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Bertrand Marquis , Volodymyr Babchuk , Oleksii Kurochko , Shawn Anastasio From: Jan Beulich Subject: [PATCH v9] common: honor CONFIG_CC_SPLIT_SECTIONS also for assembly functions Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Leverage the new infrastructure in xen/linkage.h to also switch to per- function sections (when configured), deriving the specific name from the "base" section in use at the time FUNC() is invoked. Signed-off-by: Jan Beulich Tested-by: Luca Fancellu # arm --- TBD: Since we use .subsection in UNLIKELY_START(), a perhaps not really wanted side effect of this change is that respective out-of-line code now moves much closer to its original (invoking) code. TBD: Of course something with the same overall effect, but less impactful might do in Config.mk. E.g. $(filter-out -D%,$(3)) instead of $(firstword (3)). In fact Roger wants the detection to be in Kconfig, for LIVEPATCH to depend on it. Yet the whole underlying discussion there imo would first need settling (and therefore reviving). Note that we'd need to split DATA() in order to separate r/w, r/o, and BSS contributions. Further splitting might be needed to also support more advanced attributes (e.g. merge), hence why this isn't done right here. Sadly while a new section's name can be derived from the presently in use, its attributes cannot be. Perhaps the only thing we can do is give DATA() a 2nd mandatory parameter. Then again I guess most data definitions could be moved to C anyway. --- v9: Move Arm32 SYM_PUSH_SECTION() overrides here. v7: Override SYM_PUSH_SECTION() in arch/x86/indirect-thunk.S. Re-base, notably to deal with fallout from fba250ae604e ("xen/arm64: head: Add missing code symbol annotations"). v6: Deal with x86'es entry_PF() and entry_int82() falling through to the next "function". Re-base. v5: Re-base over changes earlier in the series. v4: Re-base. v2: Make detection properly fail on old gas (by adjusting cc-option-add-closure). --- a/Config.mk +++ b/Config.mk @@ -102,7 +102,7 @@ cc-option = $(shell if $(1) $(2:-Wno-%=- # Usage: $(call cc-option-add CFLAGS,CC,-march=winchip-c6) cc-option-add = $(eval $(call cc-option-add-closure,$(1),$(2),$(3))) define cc-option-add-closure - ifneq ($$(call cc-option,$$($(2)),$(3),n),n) + ifneq ($$(call cc-option,$$($(2)),$(firstword $(3)),n),n) $(1) += $(3) endif endef --- a/xen/Makefile +++ b/xen/Makefile @@ -415,6 +415,9 @@ AFLAGS += -D__ASSEMBLY__ $(call cc-option-add,AFLAGS,CC,-Wa$$(comma)--noexecstack) +# Check to see whether the assembler supports the --sectname-subst option. +$(call cc-option-add,AFLAGS,CC,-Wa$$(comma)--sectname-subst -DHAVE_AS_SECTNAME_SUBST) + LDFLAGS-$(call ld-option,--warn-rwx-segments) += --no-warn-rwx-segments CFLAGS += $(CFLAGS-y) --- a/xen/arch/arm/arm32/head.S +++ b/xen/arch/arm/arm32/head.S @@ -48,6 +48,13 @@ .section .text.header, "ax", %progbits .arm +/* + * Code below wants to all live in the section established above. Annotations + * from xen/linkage.h therefore may not switch sections (honoring + * CONFIG_CC_SPLIT_SECTIONS). Override the respective macro. + */ +#undef SYM_PUSH_SECTION +#define SYM_PUSH_SECTION(name, attr) /* * This must be the very first address in the loaded image. --- a/xen/arch/arm/arm32/mmu/head.S +++ b/xen/arch/arm/arm32/mmu/head.S @@ -160,6 +160,13 @@ .endm .section .text.idmap, "ax", %progbits +/* + * Code below wants to all live in the section established above. Annotations + * from xen/linkage.h therefore may not switch sections (honoring + * CONFIG_CC_SPLIT_SECTIONS). Override the respective macro. + */ +#undef SYM_PUSH_SECTION +#define SYM_PUSH_SECTION(name, attr) /* * Rebuild the boot pagetable's first-level entries. The structure --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -28,6 +28,14 @@ #include #endif +/* + * Code here is, at least in part, ordering sensitive. Annotations + * from xen/linkage.h therefore may not switch sections (honoring + * CONFIG_CC_SPLIT_SECTIONS). Override the respective macro. + */ +#undef SYM_PUSH_SECTION +#define SYM_PUSH_SECTION(name, attr) + #define __HEAD_FLAG_PAGE_SIZE ((PAGE_SHIFT - 10) / 2) #define __HEAD_FLAG_PHYS_BASE 1 --- a/xen/arch/arm/xen.lds.S +++ b/xen/arch/arm/xen.lds.S @@ -140,6 +140,9 @@ SECTIONS .init.text : { _sinittext = .; *(.init.text) +#ifdef CONFIG_CC_SPLIT_SECTIONS + *(.init.text.*) +#endif _einittext = .; . = ALIGN(PAGE_SIZE); /* Avoid mapping alt insns executable */ *(.altinstr_replacement) --- a/xen/arch/ppc/xen.lds.S +++ b/xen/arch/ppc/xen.lds.S @@ -103,6 +103,9 @@ SECTIONS DECL_SECTION(.init.text) { _sinittext = .; *(.init.text) +#ifdef CONFIG_CC_SPLIT_SECTIONS + *(.init.text.*) +#endif _einittext = .; . = ALIGN(PAGE_SIZE); /* Avoid mapping alt insns executable */ } :text --- a/xen/arch/riscv/xen.lds.S +++ b/xen/arch/riscv/xen.lds.S @@ -98,6 +98,9 @@ SECTIONS .init.text : { _sinittext = .; *(.init.text) +#ifdef CONFIG_CC_SPLIT_SECTIONS + *(.init.text.*) +#endif _einittext = .; . = ALIGN(PAGE_SIZE); /* Avoid mapping alt insns executable */ } :text --- a/xen/arch/x86/indirect-thunk.S +++ b/xen/arch/x86/indirect-thunk.S @@ -11,6 +11,10 @@ #include +/* Section placement is done explicitly here; override the respective macro. */ +#undef SYM_PUSH_SECTION +#define SYM_PUSH_SECTION(name, attr) + .macro IND_THUNK_RETPOLINE reg:req call 1f int3 --- a/xen/arch/x86/x86_64/compat/entry.S +++ b/xen/arch/x86/x86_64/compat/entry.S @@ -31,6 +31,9 @@ FUNC(entry_int82) mov %rsp, %rdi call do_entry_int82 +#ifdef CONFIG_CC_SPLIT_SECTIONS + jmp compat_test_all_events +#endif END(entry_int82) /* %rbx: struct vcpu */ --- a/xen/arch/x86/x86_64/entry.S +++ b/xen/arch/x86/x86_64/entry.S @@ -771,6 +771,9 @@ END(common_interrupt) FUNC(entry_PF) ENDBR64 movb $X86_EXC_PF, EFRAME_entry_vector(%rsp) +#ifdef CONFIG_CC_SPLIT_SECTIONS + jmp handle_exception +#endif END(entry_PF) /* No special register assumptions. */ FUNC(handle_exception, 0) @@ -1084,8 +1087,11 @@ FUNC(entry_NMI) ENDBR64 pushq $0 movb $X86_EXC_NMI, EFRAME_entry_vector(%rsp) +#ifdef CONFIG_CC_SPLIT_SECTIONS + jmp handle_ist_exception +#endif END(entry_NMI) - +/* No special register assumptions. */ FUNC(handle_ist_exception) ALTERNATIVE "", clac, X86_FEATURE_XEN_SMAP SAVE_ALL --- a/xen/arch/x86/xen.lds.S +++ b/xen/arch/x86/xen.lds.S @@ -85,6 +85,9 @@ SECTIONS . = ALIGN(PAGE_SIZE); _stextentry = .; *(.text.entry) +#ifdef CONFIG_CC_SPLIT_SECTIONS + *(.text.entry.*) +#endif . = ALIGN(PAGE_SIZE); _etextentry = .; @@ -204,6 +207,9 @@ SECTIONS #endif _sinittext = .; *(.init.text) +#ifdef CONFIG_CC_SPLIT_SECTIONS + *(.init.text.*) +#endif *(.text.startup) _einittext = .; /* --- a/xen/include/xen/linkage.h +++ b/xen/include/xen/linkage.h @@ -18,6 +18,14 @@ #define SYM_ALIGN(align...) .balign align +#if defined(HAVE_AS_SECTNAME_SUBST) && defined(CONFIG_CC_SPLIT_SECTIONS) +# define SYM_PUSH_SECTION(name, attr) \ + .pushsection %S.name, attr, %progbits; \ + .equ .Lsplit_section, 1 +#else +# define SYM_PUSH_SECTION(name, attr) +#endif + #define SYM_L_GLOBAL(name) .globl name; .hidden name #define SYM_L_WEAK(name) .weak name #define SYM_L_LOCAL(name) /* nothing */ @@ -32,7 +40,14 @@ SYM_ALIGN(align); \ name: -#define END(name) .size name, . - name +#define END(name) \ + .size name, . - name; \ + .ifdef .Lsplit_section; \ + .if .Lsplit_section; \ + .popsection; \ + .equ .Lsplit_section, 0; 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Tue, 01 Apr 2025 04:55:59 -0700 (PDT) Message-ID: <690122f5-5e11-4d3f-a5a1-55c6c4f2051d@suse.com> Date: Tue, 1 Apr 2025 13:55:58 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 6/7] xen: introduce Kconfig ARCH_PAGING_MEMPOOL To: Luca Fancellu Cc: Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Alistair Francis , Bob Eshleman , Connor Davis , Oleksii Kurochko , Wei Chen , xen-devel@lists.xenproject.org, Penny Zheng References: <20250401085858.2228991-1-luca.fancellu@arm.com> <20250401085858.2228991-7-luca.fancellu@arm.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20250401085858.2228991-7-luca.fancellu@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 01.04.2025 10:58, Luca Fancellu wrote: > From: Penny Zheng > > ARM MPU system doesn't need to use paging memory pool, as MPU memory > mapping table at most takes only one 4KB page, which is enough to > manage the maximum 255 MPU memory regions, for all EL2 stage 1 > translation and EL1 stage 2 translation. > > Introduce ARCH_PAGING_MEMPOOL Kconfig common symbol, selected for Arm > MMU systems and x86. Removed stubs from RISC-V now that the common code > provide them and the functions are not gonna be used. > > Wrap the code inside 'construct_domU' that deal with p2m paging > allocation in a new function 'domain_p2m_set_allocation', protected > by ARCH_PAGING_MEMPOOL, this is done in this way to prevent polluting > the former function with #ifdefs and improve readability > > Introduce arch_{get,set}_paging_mempool_size stubs for architecture > with !ARCH_PAGING_MEMPOOL. > > Remove 'struct paging_domain' from Arm 'struct arch_domain' when the > field is not required. > > Signed-off-by: Penny Zheng > Signed-off-by: Wei Chen > Signed-off-by: Luca Fancellu > Reviewed-by: Michal Orzel # arm > Reviewed-by: Oleksii Kurochko # riscv Acked-by: Jan Beulich > @@ -114,9 +115,25 @@ void arch_get_info_guest(struct vcpu *v, vcpu_guest_context_u c); > int arch_initialise_vcpu(struct vcpu *v, XEN_GUEST_HANDLE_PARAM(void) arg); > int default_initialise_vcpu(struct vcpu *v, XEN_GUEST_HANDLE_PARAM(void) arg); > > +#ifdef CONFIG_ARCH_PAGING_MEMPOOL > + > int arch_get_paging_mempool_size(struct domain *d, uint64_t *size /* bytes */); > int arch_set_paging_mempool_size(struct domain *d, uint64_t size /* bytes */); > > +#else /* !CONFIG_ARCH_PAGING_MEMPOOL */ > + > +static inline int arch_get_paging_mempool_size(struct domain *d, uint64_t *size) > +{ > + return -EOPNOTSUPP; > +} > + > +static inline int arch_set_paging_mempool_size(struct domain *d, uint64_t size) > +{ > + return -EOPNOTSUPP; > +} Arguably while "set" will of course need to fail (perhaps unless size was zero), "get" may be fine to uniformly succeed, reporting back a size of 0. But we can switch to that alternative model whenever a need arises, I guess. Jan From xen-devel-bounces@lists.xenproject.org Tue Apr 01 11:59:46 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 11:59:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.933906.1335742 (Exim 4.92) (envelope-from ) id 1tzaHI-0001Vu-O5; Tue, 01 Apr 2025 11:59:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 933906.1335742; Tue, 01 Apr 2025 11:59:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzaHI-0001Vn-LH; Tue, 01 Apr 2025 11:59:36 +0000 Received: by outflank-mailman (input) for mailman id 933906; Tue, 01 Apr 2025 11:59:34 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzaHG-0001Vh-PK for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 11:59:34 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1tzaHA-005Q8Q-0F; Tue, 01 Apr 2025 11:59:28 +0000 Received: from [2a02:8012:3a1:0:31b1:5de8:95ef:d60f] by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.96) (envelope-from ) id 1tzaH9-00G2er-2g; Tue, 01 Apr 2025 11:59:27 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:Content-Type:In-Reply-To:From: References:Cc:To:Subject:MIME-Version:Date:Message-ID; bh=FUyksunoxaosTWI6TbzQrWg+usM93yjXi/2kA70+rmM=; b=S9zqNLfPIJyNzoJt9obWQRJmaw Gqj2ODlDigW127LK0GHhhRoohR7VFhDc1EoOHhZVqiKXJ8XPBTz7wRK9Wq2/SoWac+gwb1fGMJ5iA aMbFScBzjzh0vFjLb1hPU7kLZ7ryDdLDbUO40T3ooFdeVNIJZoZFwN9SXO00xqTmdLBY=; Message-ID: <33786f0b-eefa-4f1f-ac57-7f1b2c74715e@xen.org> Date: Tue, 1 Apr 2025 12:59:25 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1] xen/riscv: Increase XEN_VIRT_SIZE Content-Language: en-GB To: Jan Beulich Cc: Alistair Francis , Bob Eshleman , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org, Oleksii Kurochko References: <54ebdcb7-071f-411f-803a-930dc330a497@suse.com> <6f0efa9a-876e-4ae1-9367-ccd89f51bab0@xen.org> From: Julien Grall In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 01/04/2025 07:24, Jan Beulich wrote: > On 31.03.2025 18:17, Julien Grall wrote: >> On 31/03/2025 17:14, Jan Beulich wrote: >>> On 31.03.2025 17:20, Oleksii Kurochko wrote: >>>> A randconfig job failed with the following issue: >>>> riscv64-linux-gnu-ld: Xen too large for early-boot assumptions >>>> >>>> The reason is that enabling the UBSAN config increased the size of >>>> the Xen binary. >>>> >>>> Increase XEN_VIRT_SIZE to reserve enough space, allowing both UBSAN >>>> and GCOV to be enabled together, with some slack for future growth. >>> >>> At some point you may want to use 2M mappings for .text (rx), .rodata >>> (r), and .data (rw). >> >> OOI, why would we want to switch to 2MB? At least on Arm, Xen is tiny >> enough that it can fit in less than a couple of MB. I would expect the >> same for RISC-V. > > For TLB efficiency reasons for example. On x86 we switched to using 2Mb > pages quite some time back, just to find that (at least) one of the > bootloaders choked on the then larger binary. Hence we ended up with > the XEN_ALIGN_2M Kconfig symbol plus the unconditional use of 2Mb > mappings for xen.efi. For the original change see cf393624eec3 ("x86: > use 2M superpages for text/data/bss mappings"). For Arm, we can using the contiguous bit (it allows to combine a few entries into one TLB on some CPUs) to reduce the TLB usage. Not sure if RISC-V has a similar feature. Cheers, -- Julien Grall From xen-devel-bounces@lists.xenproject.org Tue Apr 01 12:00:48 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 12:00:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.933923.1335754 (Exim 4.92) (envelope-from ) id 1tzaIR-0004E7-85; Tue, 01 Apr 2025 12:00:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 933923.1335754; Tue, 01 Apr 2025 12:00:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzaIR-0004E0-5U; Tue, 01 Apr 2025 12:00:47 +0000 Received: by outflank-mailman (input) for mailman id 933923; Tue, 01 Apr 2025 12:00:46 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzaIQ-0001md-OQ for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 12:00:46 +0000 Received: from mail-wr1-x434.google.com (mail-wr1-x434.google.com [2a00:1450:4864:20::434]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id f1c8fd8f-0ef0-11f0-9ea7-5ba50f476ded; Tue, 01 Apr 2025 14:00:46 +0200 (CEST) Received: by mail-wr1-x434.google.com with SMTP id ffacd0b85a97d-391342fc1f6so4859179f8f.1 for ; Tue, 01 Apr 2025 05:00:46 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Smith" , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , xen-devel@lists.xenproject.org References: <20250331214321.205331-1-jason.andryuk@amd.com> <20250331214321.205331-2-jason.andryuk@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20250331214321.205331-2-jason.andryuk@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 31.03.2025 23:43, Jason Andryuk wrote: > --- a/xen/common/domain.c > +++ b/xen/common/domain.c > @@ -820,11 +820,15 @@ struct domain *domain_create(domid_t domid, > d->is_privileged = flags & CDF_privileged; > > /* Sort out our idea of is_hardware_domain(). */ > - if ( domid == 0 || domid == hardware_domid ) > + if ( (flags & CDF_hardware) || domid == hardware_domid ) Since it's || here ... > { > if ( hardware_domid < 0 || hardware_domid >= DOMID_FIRST_RESERVED ) > panic("The value of hardware_dom must be a valid domain ID\n"); > > + /* late_hwdom is only allowed for dom0. */ > + if ( hardware_domain && hardware_domain->domain_id ) > + return ERR_PTR(-EINVAL); > + > old_hwdom = hardware_domain; > hardware_domain = d; > } ... doesn't this code then also need to set CDF_hardware if it's unset in the function argument? Then: Reviewed-by: Jan Beulich Jan From xen-devel-bounces@lists.xenproject.org Tue Apr 01 12:16:42 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 12:16:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.933944.1335770 (Exim 4.92) (envelope-from ) id 1tzaXk-0007MN-Lj; Tue, 01 Apr 2025 12:16:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 933944.1335770; Tue, 01 Apr 2025 12:16:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzaXk-0007MG-IS; Tue, 01 Apr 2025 12:16:36 +0000 Received: by outflank-mailman (input) for mailman id 933944; Tue, 01 Apr 2025 12:16:35 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzaXj-0007MA-De for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 12:16:35 +0000 Received: from mail-wr1-x42e.google.com (mail-wr1-x42e.google.com [2a00:1450:4864:20::42e]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 26c9ecee-0ef3-11f0-9ea7-5ba50f476ded; Tue, 01 Apr 2025 14:16:34 +0200 (CEST) Received: by mail-wr1-x42e.google.com with SMTP id ffacd0b85a97d-39ac9aea656so4514043f8f.3 for ; Tue, 01 Apr 2025 05:16:34 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 01 Apr 2025 05:16:33 -0700 (PDT) Message-ID: <6765d129-66dc-48d9-aaac-2b973edfda80@suse.com> Date: Tue, 1 Apr 2025 14:16:31 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 4/6] xen/arm: dom0less seed xenstore grant table entry To: Jason Andryuk Cc: Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , xen-devel@lists.xenproject.org References: <20250331214321.205331-1-jason.andryuk@amd.com> <20250331214321.205331-5-jason.andryuk@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20250331214321.205331-5-jason.andryuk@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 31.03.2025 23:43, Jason Andryuk wrote: > xenstored maps other domains' xenstore pages. Currently this relies on > init-dom0less or xl to seed the grants from Dom0. With split > hardware/control/xenstore domains, this is problematic since we don't > want the hardware domain to be able to map other domains' resources > without their permission. Instead have the hypervisor seed the grant > table entry for every dom0less domain. The grant is then accessible as > normal. Yet aiui the original idea was to specifically not do this in the hypervisor. I agree it shouldn't be the hardware domain, but what's wrong with having the control domain do that? It is what is responsible for creating new domains as well. The question of where to do that when there's no control domain must also have been solved already (without me knowing the answer), as that's where init-dom0less must be running. > This works with C xenstored. OCaml xenstored does not use grants and > would fail to foreign map the page. >From the sentence it's not clear whether this is unchanged behavior or a deliberate regression. > --- a/xen/arch/arm/dom0less-build.c > +++ b/xen/arch/arm/dom0less-build.c > @@ -865,6 +865,10 @@ static void __init initialize_domU_xenstore(void) > rc = alloc_xenstore_evtchn(d); > if ( rc < 0 ) > panic("%pd: Failed to allocate xenstore_evtchn\n", d); > + > + if ( gfn != ~0ULL ) Is this an odd open-coding of INVALID_GFN? And even if not - why ULL when "gfn" is unsigned long? The way you have it the condition will always be false on Arm32, if I'm not mistaken. > --- a/xen/common/grant_table.c > +++ b/xen/common/grant_table.c > @@ -4346,6 +4346,21 @@ static void gnttab_usage_print(struct domain *rd) > printk("no active grant table entries\n"); > } > > +#ifdef CONFIG_DOM0LESS_BOOT > +void __init gnttab_seed_entry(const struct domain *d, unsigned int idx, > + domid_t be_domid, uint64_t frame, > + unsigned int flags) > +{ > + const struct grant_table *gt = d->grant_table; > + > + ASSERT(!d->creation_finished); While I don't mind the assertion, it's a little funny to see such in an __init function. > + ASSERT(gt->gt_version == 1); > + shared_entry_v1(gt, idx).flags = flags; Does this really need to be a function parameter? The sole caller passes a constant (GTF_permit_access). > --- a/xen/include/xen/grant_table.h > +++ b/xen/include/xen/grant_table.h > @@ -45,6 +45,11 @@ void grant_table_destroy( > struct domain *d); > void grant_table_init_vcpu(struct vcpu *v); > > +/* Seed a gnttab entry for Hyperlaunch/dom0less. */ > +void __init gnttab_seed_entry(const struct domain *d, unsigned int idx, No __init on declarations please. They have no effect (as long as the definition properly has the attribute) and hence are only at risk of going stale. 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Smith" , xen-devel@lists.xenproject.org References: <20250326055053.3313146-1-Penny.Zheng@amd.com> <20250326055053.3313146-5-Penny.Zheng@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20250326055053.3313146-5-Penny.Zheng@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 26.03.2025 06:50, Penny Zheng wrote: > --- a/xen/common/sysctl.c > +++ b/xen/common/sysctl.c > @@ -58,6 +58,7 @@ long do_sysctl(XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl) > > switch ( op->cmd ) > { > +#ifdef CONFIG_SYSCTL > case XEN_SYSCTL_readconsole: > ret = xsm_readconsole(XSM_HOOK, op->u.readconsole.clear); > if ( ret ) > @@ -66,6 +67,7 @@ long do_sysctl(XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl) > ret = read_console_ring(&op->u.readconsole); > break; > > +#endif /* CONFIG_SYSCTL */ > case XEN_SYSCTL_tbuf_op: Nit: Can the #endif please live ahead of the blank line? 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Tue, 01 Apr 2025 05:27:22 -0700 (PDT) Message-ID: Date: Tue, 1 Apr 2025 14:27:21 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 06/19] xen/sysctl: wrap around XEN_SYSCTL_sched_id To: Penny Zheng Cc: ray.huang@amd.com, Dario Faggioli , Juergen Gross , George Dunlap , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20250326055053.3313146-1-Penny.Zheng@amd.com> <20250326055053.3313146-7-Penny.Zheng@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20250326055053.3313146-7-Penny.Zheng@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 26.03.2025 06:50, Penny Zheng wrote: > --- a/xen/common/sysctl.c > +++ b/xen/common/sysctl.c > @@ -72,10 +72,12 @@ long do_sysctl(XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl) > ret = tb_control(&op->u.tbuf_op); > break; > > +#ifdef CONFIG_SYSCTL > case XEN_SYSCTL_sched_id: > op->u.sched_id.sched_id = scheduler_id(); > break; > > +#endif /* CONFIG_SYSCTL */ > case XEN_SYSCTL_getdomaininfolist: Same as in the earlier patch (and I may not repeat this if later in the series this re-occurs): #endif ahead of the blank line please. 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Tue, 01 Apr 2025 05:36:35 -0700 (PDT) Message-ID: Date: Tue, 1 Apr 2025 14:36:34 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 08/19] xen/sysctl: wrap around XEN_SYSCTL_lockprof_op To: Penny Zheng Cc: ray.huang@amd.com, Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20250326055053.3313146-1-Penny.Zheng@amd.com> <20250326055053.3313146-9-Penny.Zheng@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20250326055053.3313146-9-Penny.Zheng@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 26.03.2025 06:50, Penny Zheng wrote: > --- a/xen/common/sysctl.c > +++ b/xen/common/sysctl.c > @@ -123,13 +123,13 @@ long do_sysctl(XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl) > ret = perfc_control(&op->u.perfc_op); > break; > #endif > -#endif /* CONFIG_SYSCTL */ > > #ifdef CONFIG_DEBUG_LOCK_PROFILE > case XEN_SYSCTL_lockprof_op: > ret = spinlock_profile_control(&op->u.lockprof_op); > break; > #endif > +#endif /* CONFIG_SYSCTL */ > case XEN_SYSCTL_debug_keys: In such a situation please take the opportunity and add the blank line that was missing ahead of the subsequent case label. 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pr=C Message-ID: Date: Tue, 1 Apr 2025 08:39:29 -0400 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/6] xen: introduce hardware domain create flag To: Jan Beulich CC: "Daniel P. Smith" , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , "Volodymyr Babchuk" , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , References: <20250331214321.205331-1-jason.andryuk@amd.com> <20250331214321.205331-2-jason.andryuk@amd.com> <049a2acc-09a9-43b8-9937-960ce2b99fda@suse.com> Content-Language: en-US From: Jason Andryuk In-Reply-To: <049a2acc-09a9-43b8-9937-960ce2b99fda@suse.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: None (SATLEXMB05.amd.com: jason.andryuk@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS3PEPF0000C37D:EE_|DS7PR12MB8274:EE_ X-MS-Office365-Filtering-Correlation-Id: 659fa37e-5f70-49c4-6b5b-08dd711a3eee X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|7416014|36860700013|82310400026|7053199007; X-Microsoft-Antispam-Message-Info: =?utf-8?B?bTJXWmZMcEFTNGF2OEhHZ0JmYlUyWVdJMU5WTzAwVzdrbmh2WG1qZXlmRUc5?= =?utf-8?B?RGcxSlc4YVVPaW5ScHVjQ1NwZDBKMFB6aWM0ak5PYjVlYlFwY3ZwQlB6aWd3?= =?utf-8?B?dlhxbUJocDliajlXMXpobW8wQ0hsWVdFbWFkeG5qMHhkWXQzaHR4YjZ6SjFG?= =?utf-8?B?NWxjdWRhdkFKK2d3MWo2NHptSThSWC83ZGRLNmFWaytMQ3diQUI4SnA2WkZu?= =?utf-8?B?L3dxUjFtV3d4em5mcUc3bkpJQmZIQmg3dU51K29IWkE1LzFvS2RQZk4xZzha?= =?utf-8?B?SElLUWJub29kcVRqUFE4eTVRZkVrR3NzTDdLMnNHZFBMZGJjb0xNc1FFQ09m?= =?utf-8?B?aWM1NGI0RFNMY0lUQy9EOFdCZXViWTVRZS9ValBvN3BOc0VGWSt6bzZvNFpz?= =?utf-8?B?R0c2NitUWXBvTnk3MStZem9qTm0vZFhDQlJXcHpoQ3hnWVhicW9VWXJiWnZk?= =?utf-8?B?ZVdUYnBPMk5qY0NxYWFxelZpa1pZNWFqRWFIK0NNQlVtdnNSRXZWQkVJWC8w?= =?utf-8?B?NlZlS3ZWT0xNMVovQWN1YnBFbEdGU2gxZS9jbjVlei9PeUVDV3JBY1drQVhm?= =?utf-8?B?YWh4eWI0Y1Y3cDB5TDBvc1NTTExiemp2WGtpVThQUEhnSnpmOHNkYm1pdWZa?= =?utf-8?B?emM1UkcvMjJVNEQ2SWJXOVJzV09BZFpYZkJEWnF5S3lRSVF0YUtOUFV5aG1V?= =?utf-8?B?VDRHdnBPMUF5Z2NTS2hkWTJhSkJTTkNQS1V2UWRMSlkvYVk4Yy9vVFJRL3pC?= =?utf-8?B?VytyVnp0WDlPQ2dOVXB5WEEwaGRWZnpOcEVjYmZkRGpud0ZwZDhBeXBZWjVv?= =?utf-8?B?cVpxWWNlMmFXdnI3N29wdWp0RU01RjVrblZhVlJUelZQSXBDYWpDcFdlWG1z?= =?utf-8?B?emhXQkFsWDRzenhuRGs5dVZSUldmYnpGS2tjT00yWWFyUGVKblh3eUZHU0pC?= =?utf-8?B?bmtPcHlDak93VFBLN3NDOVNyc2pnZUphV2RNVnVzWndOKytkdjVqOWJ6LzN6?= =?utf-8?B?RExEQlJ4aktlRWZXblJLaWVXMURvaHRzUmZsdjlDaWEwR3diVXI0cTZSbDVY?= =?utf-8?B?TysxVjlUeWVCUW1RcDJFTUtWeFdkeVVqbFFPdG9IZ0doQnJoM204THZHV0d5?= =?utf-8?B?eldwM1Z2U1RzRmM3Zkk3eE5KMkJ6SUhzOVdLVTlUZmNqUG1FdHpIUHdDMG9v?= =?utf-8?B?RTNubTJEVUpXQXVEaHc2U3JsSGhhK1hkWlNocDBpUnBJMDh6blZ0cHhQSkEz?= =?utf-8?B?MVovL0ZSM3MvQ3FPRytyUGh3dlJBNWY4UTdvbHlwTm84Uks3YVJzWGd4Q0ZG?= =?utf-8?B?dks1bm9ISVFCZVdsMW5nYmxNQXRnQkJyWXlXTTAza05lM2w0dVNpSlNoZjkw?= =?utf-8?B?aWtkeDAyTGErVXZENmdLbVRNc1NIdmpCdDdEUy90ZHlMOC9jNFE2WDFGcC9R?= =?utf-8?B?ajY0QzBkdmhFejRXQ2MySTJRQmZYQ1RlZ2VQcnY2NktMOWJ3Y0FhK08yMDBF?= =?utf-8?B?UmFwUU5CMlMwWVVQNGV0eXBJcGZPVFdwL1E2OTBzM09RS2M3eDUxR1h6NnhB?= =?utf-8?B?dmZXQ0tpYU9ucXg2dkhkK08wZnEzYkFwZXpHTmtlcERLcVhoUm83YkR3OFJo?= =?utf-8?B?Y0VkSURlclZuT3daR2xMa3REaTVEL3pLRkhxajBmUUpZMU5FYnhpQldoYi9x?= =?utf-8?B?MWFwWEhORStzTXRKaG55ZjI2YUxEYk9BRzF1M25VM3hBUFlsRFA2ak5WT1hp?= =?utf-8?B?V0NCUE9SNjgxZ1o1ZUtnOTg3WHlnREFzWmdXMFhYNW9QU1FDSHBKM1NHVzh4?= =?utf-8?B?elhmeXdWY0pJYXEyN2lVdmJSaFdhSFBhaE4wVnBxYUVNU1pWbDhpVWs5NnUy?= =?utf-8?B?ZTdBV3NoK2Z0VlJid0M2OXZOcmdsS054eW1NM1JhMHU1YjVtZXZLeHNvb2Rq?= =?utf-8?B?VTJVcVVhZzhFd1c0SlFVL1pJaVN3Ukl1RHk4dVR3YW1QdHl6TjVVNGZ4U1JC?= =?utf-8?Q?3EK3pyFyHfXvee11bNcpcMSIj1JbfA=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(1800799024)(7416014)(36860700013)(82310400026)(7053199007);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Apr 2025 12:39:29.4285 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 659fa37e-5f70-49c4-6b5b-08dd711a3eee X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF0000C37D.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB8274 On 2025-04-01 08:00, Jan Beulich wrote: > On 31.03.2025 23:43, Jason Andryuk wrote: >> --- a/xen/common/domain.c >> +++ b/xen/common/domain.c >> @@ -820,11 +820,15 @@ struct domain *domain_create(domid_t domid, >> d->is_privileged = flags & CDF_privileged; >> >> /* Sort out our idea of is_hardware_domain(). */ >> - if ( domid == 0 || domid == hardware_domid ) >> + if ( (flags & CDF_hardware) || domid == hardware_domid ) > > Since it's || here ... > >> { >> if ( hardware_domid < 0 || hardware_domid >= DOMID_FIRST_RESERVED ) >> panic("The value of hardware_dom must be a valid domain ID\n"); >> >> + /* late_hwdom is only allowed for dom0. */ >> + if ( hardware_domain && hardware_domain->domain_id ) >> + return ERR_PTR(-EINVAL); >> + >> old_hwdom = hardware_domain; >> hardware_domain = d; >> } > > ... doesn't this code then also need to set CDF_hardware if it's unset > in the function argument? I don't think it matters today - later construction depends on the value of hardware_domain. Which is also used for the check underlying is_hardware_domain(). But I agree that it makes sense to set it here in case the use of CDF_hardware expands in the future. > Then: > Reviewed-by: Jan Beulich Thanks, Jason From xen-devel-bounces@lists.xenproject.org Tue Apr 01 12:41:16 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 12:41:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934014.1335855 (Exim 4.92) (envelope-from ) id 1tzava-00007j-P2; Tue, 01 Apr 2025 12:41:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 934014.1335855; Tue, 01 Apr 2025 12:41:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzava-00006j-MF; Tue, 01 Apr 2025 12:41:14 +0000 Received: by outflank-mailman (input) for mailman id 934014; Tue, 01 Apr 2025 12:41:13 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzavZ-0008PM-6q for xen-devel@lists.xenproject.org; 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Tue, 01 Apr 2025 05:55:17 -0700 (PDT) Message-ID: <2383a0ba-0c6b-47a4-8bbb-896c98edf51a@suse.com> Date: Tue, 1 Apr 2025 14:55:16 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 09/19] xen/pmstat: clean up pmstat.c To: Penny Zheng Cc: ray.huang@amd.com, xen-devel@lists.xenproject.org References: <20250326055053.3313146-1-Penny.Zheng@amd.com> <20250326055053.3313146-10-Penny.Zheng@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20250326055053.3313146-10-Penny.Zheng@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 26.03.2025 06:50, Penny Zheng wrote: > We intend to move the following functions into drivers/acpi/pmstat.c, as they > are all designed for performance statistic: "We intend to ..." describes future plans. Yet this is what you're doing in this very patch. > - cpufreq_residency_update > - cpufreq_statistic_reset > - cpufreq_statistic_update > - cpufreq_statistic_init > - cpufreq_statistic_exit > and moving out acpi_set_pdc_bits(), as it is the handler for sub-hypercall > XEN_PM_PDC, and shall stay with the other handlers together in > drivers/cpufreq/cpufreq.c. > This commit also applies various style corrections while moving these > functions Nit - I'd like to remind you of how to (not) word commit messages. As to what the sentence says - you staying vague leaves unclear which style violations may have been left in place, for perhaps a good reason. For example I observe u32 in code being moved. > Signed-off-by: Penny Zheng > --- > v1 -> v2: > - new commit > --- > xen/drivers/acpi/pmstat.c | 199 ++++++++++++++++++---- > xen/drivers/cpufreq/cpufreq.c | 31 ++++ > xen/drivers/cpufreq/utility.c | 162 ------------------ > xen/include/acpi/cpufreq/processor_perf.h | 2 - > 4 files changed, 199 insertions(+), 195 deletions(-) Nit: Considering that code is being moved _into_ pmstat.c, "clean up" in the subject is somewhat misleading. Maybe "consolidate code into pmstat.c"? > --- a/xen/drivers/acpi/pmstat.c > +++ b/xen/drivers/acpi/pmstat.c > @@ -43,6 +43,174 @@ > > DEFINE_PER_CPU_READ_MOSTLY(struct pm_px *, cpufreq_statistic_data); > > +DEFINE_PER_CPU(spinlock_t, cpufreq_statistic_lock); If you really move everything that's statistics-related, then both of the above items ought to be possible to become static now. > +/********************************************************************* > + * Px STATISTIC INFO * > + *********************************************************************/ > + > +static void cpufreq_residency_update(unsigned int cpu, uint8_t state) > +{ > + uint64_t now, total_idle_ns; > + int64_t delta; > + struct pm_px *pxpt = per_cpu(cpufreq_statistic_data, cpu); > + > + total_idle_ns = get_cpu_idle_time(cpu); > + now = NOW(); > + > + delta = (now - pxpt->prev_state_wall) - > + (total_idle_ns - pxpt->prev_idle_wall); > + > + if ( likely(delta >= 0) ) > + pxpt->u.pt[state].residency += delta; > + > + pxpt->prev_state_wall = now; > + pxpt->prev_idle_wall = total_idle_ns; > +} > + > +void cpufreq_statistic_update(unsigned int cpu, uint8_t from, uint8_t to) > +{ > + struct pm_px *pxpt; > + const struct processor_pminfo *pmpt = processor_pminfo[cpu]; > + spinlock_t *cpufreq_statistic_lock = > + &per_cpu(cpufreq_statistic_lock, cpu); > + > + spin_lock(cpufreq_statistic_lock); > + > + pxpt = per_cpu(cpufreq_statistic_data, cpu); > + if ( !pxpt || !pmpt ) { Hmm, you said style corrections are being made, yet the brace here is misplaced. > + spin_unlock(cpufreq_statistic_lock); > + return; > + } > + > + pxpt->u.last = from; > + pxpt->u.cur = to; > + pxpt->u.pt[to].count++; > + > + cpufreq_residency_update(cpu, from); > + > + (*(pxpt->u.trans_pt + from * pmpt->perf.state_count + to))++; I came across this line the other day, iirc when reviewing you other series. I find it expremely odd that this doesn't use array notation: pxpt->u.trans_pt[from * pmpt->perf.state_count + to]++; Could you please switch to that, unless of course you see an issue with it? > + spin_unlock(cpufreq_statistic_lock); > +} > + > +int cpufreq_statistic_init(unsigned int cpu) > +{ > + uint32_t i, count; Here any elsewhere - converting to unsigned int would also fall under style corrections. > +static void cpufreq_statistic_reset(unsigned int cpu) > +{ > + uint32_t i, j, count; > + struct pm_px *pxpt; > + const struct processor_pminfo *pmpt = processor_pminfo[cpu]; > + spinlock_t *cpufreq_statistic_lock = &per_cpu(cpufreq_statistic_lock, cpu); > + > + spin_lock(cpufreq_statistic_lock); > + > + pxpt = per_cpu(cpufreq_statistic_data, cpu); > + if ( !pmpt || !pxpt || !pxpt->u.pt || !pxpt->u.trans_pt ) > + { > + spin_unlock(cpufreq_statistic_lock); > + return; > + } > + > + count = pmpt->perf.state_count; > + > + for ( i = 0; i < count; i++ ) > + { > + pxpt->u.pt[i].residency = 0; > + pxpt->u.pt[i].count = 0; > + > + for ( j = 0; j < count; j++ ) > + *(pxpt->u.trans_pt + i * count + j) = 0; Preferrably array notation again, please. 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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Apr 2025 12:57:27.2419 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3ff1b743-b85f-46e0-006b-08dd711cc14b X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DU2PEPF00028D09.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU4PR08MB11008 Hi Michal, > On 1 Apr 2025, at 11:09, Michal Orzel wrote: >=20 > There's no benefit in having process_shm_chosen() next to process_shm(). > The former is just a helper to pass "/chosen" node to the latter for > hwdom case. Drop process_shm_chosen() and instead use process_shm() > passing NULL as node parameter, which will result in searching for and > using /chosen to find shm node (the DT full path search is done in > process_shm() to avoid expensive lookup if !CONFIG_STATIC_SHM). This > will simplify future handling of hw/control domain separation. >=20 > Signed-off-by: Michal Orzel > --- > xen/arch/arm/domain_build.c | 2 +- > xen/arch/arm/include/asm/static-shmem.h | 14 -------------- > xen/arch/arm/static-shmem.c | 4 ++++ > 3 files changed, 5 insertions(+), 15 deletions(-) >=20 > diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c > index 2b5b4331834f..7f9e17e1de4d 100644 > --- a/xen/arch/arm/domain_build.c > +++ b/xen/arch/arm/domain_build.c > @@ -2325,7 +2325,7 @@ int __init construct_hwdom(struct kernel_info *kinf= o) > else > allocate_memory(d, kinfo); >=20 > - rc =3D process_shm_chosen(d, kinfo); > + rc =3D process_shm(d, kinfo, NULL); > if ( rc < 0 ) > return rc; >=20 > diff --git a/xen/arch/arm/include/asm/static-shmem.h b/xen/arch/arm/inclu= de/asm/static-shmem.h > index fd0867c4f26b..94eaa9d500f9 100644 > --- a/xen/arch/arm/include/asm/static-shmem.h > +++ b/xen/arch/arm/include/asm/static-shmem.h > @@ -18,14 +18,6 @@ int make_resv_memory_node(const struct kernel_info *ki= nfo, int addrcells, > int process_shm(struct domain *d, struct kernel_info *kinfo, > const struct dt_device_node *node); >=20 > -static inline int process_shm_chosen(struct domain *d, > - struct kernel_info *kinfo) > -{ > - const struct dt_device_node *node =3D dt_find_node_by_path("/chosen"= ); > - > - return process_shm(d, kinfo, node); > -} > - > int process_shm_node(const void *fdt, int node, uint32_t address_cells, > uint32_t size_cells); >=20 > @@ -74,12 +66,6 @@ static inline int process_shm(struct domain *d, struct= kernel_info *kinfo, > return 0; > } >=20 > -static inline int process_shm_chosen(struct domain *d, > - struct kernel_info *kinfo) > -{ > - return 0; > -} > - > static inline void init_sharedmem_pages(void) {}; >=20 > static inline int remove_shm_from_rangeset(const struct kernel_info *kinf= o, > diff --git a/xen/arch/arm/static-shmem.c b/xen/arch/arm/static-shmem.c > index c74fa13d4847..cda90105923d 100644 > --- a/xen/arch/arm/static-shmem.c > +++ b/xen/arch/arm/static-shmem.c > @@ -297,6 +297,10 @@ int __init process_shm(struct domain *d, struct kern= el_info *kinfo, > { > struct dt_device_node *shm_node; >=20 > + /* Hwdom case - shm node under /chosen */ > + if ( !node ) > + node =3D dt_find_node_by_path("/chosen"); > + I would have 2 questions here: - what if a NULL pointer is passed, wouldn't you wrongly look in the main d= evice tree ? - isn't there a NULL case to be handled if dt_find_node_by_path does not fi= nd a result ? Couldn't the condition also check for the domain to be the hwdom ? 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Smith" , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , xen-devel@lists.xenproject.org References: <20250331214321.205331-1-jason.andryuk@amd.com> <20250331214321.205331-2-jason.andryuk@amd.com> <049a2acc-09a9-43b8-9937-960ce2b99fda@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 01.04.2025 14:39, Jason Andryuk wrote: > On 2025-04-01 08:00, Jan Beulich wrote: >> On 31.03.2025 23:43, Jason Andryuk wrote: >>> --- a/xen/common/domain.c >>> +++ b/xen/common/domain.c >>> @@ -820,11 +820,15 @@ struct domain *domain_create(domid_t domid, >>> d->is_privileged = flags & CDF_privileged; >>> >>> /* Sort out our idea of is_hardware_domain(). */ >>> - if ( domid == 0 || domid == hardware_domid ) >>> + if ( (flags & CDF_hardware) || domid == hardware_domid ) >> >> Since it's || here ... >> >>> { >>> if ( hardware_domid < 0 || hardware_domid >= DOMID_FIRST_RESERVED ) >>> panic("The value of hardware_dom must be a valid domain ID\n"); >>> >>> + /* late_hwdom is only allowed for dom0. */ >>> + if ( hardware_domain && hardware_domain->domain_id ) >>> + return ERR_PTR(-EINVAL); >>> + >>> old_hwdom = hardware_domain; >>> hardware_domain = d; >>> } >> >> ... doesn't this code then also need to set CDF_hardware if it's unset >> in the function argument? > > I don't think it matters today - later construction depends on the value > of hardware_domain. Which is also used for the check underlying > is_hardware_domain(). > > But I agree that it makes sense to set it here in case the use of > CDF_hardware expands in the future. If we don't do this now, it'll be quite likely that it'll be forgotten later. Hardly anyone actually tests late-hwdom these days, afaict. It may also matter if someone looks at e.g. a dump of Xen after a crash. Jan From xen-devel-bounces@lists.xenproject.org Tue Apr 01 13:08:57 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 13:08:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934106.1335897 (Exim 4.92) (envelope-from ) id 1tzbMG-0008Km-SY; Tue, 01 Apr 2025 13:08:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 934106.1335897; Tue, 01 Apr 2025 13:08:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzbMG-0008Kf-Md; Tue, 01 Apr 2025 13:08:48 +0000 Received: by outflank-mailman (input) for mailman id 934106; Tue, 01 Apr 2025 13:08:47 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzbMF-0008KU-8r for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 13:08:47 +0000 Received: from mail-ed1-x52c.google.com (mail-ed1-x52c.google.com [2a00:1450:4864:20::52c]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 71ae02da-0efa-11f0-9ea7-5ba50f476ded; Tue, 01 Apr 2025 15:08:46 +0200 (CEST) Received: by mail-ed1-x52c.google.com with SMTP id 4fb4d7f45d1cf-5e5e0caa151so10451351a12.0 for ; Tue, 01 Apr 2025 06:08:46 -0700 (PDT) Received: from localhost ([84.78.159.3]) by smtp.gmail.com with UTF8SMTPSA id 4fb4d7f45d1cf-5edfaacd006sm5569248a12.79.2025.04.01.06.08.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Apr 2025 06:08:44 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 71ae02da-0efa-11f0-9ea7-5ba50f476ded DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1743512925; x=1744117725; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=i+k/6xoif6G18S7LhhZwjPIf1Qq+MJLqrDCjFM/tlQQ=; b=KG7jlfx2h3clYX3yZjWwy6VoyhJ2aSZzl2hzNdfIMKt33n7tqPxdYOLo5wAb3s/wGc dL3t4vvzaiA4KxImfS5gfZdYqb0r+RUuPPvIxb5QX/4atHBpipiR685i09/uDGGs7DWF 2AhUiTpitdHzEg/nEevOj+dK/ayLLT7lQ9A30= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743512925; x=1744117725; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=i+k/6xoif6G18S7LhhZwjPIf1Qq+MJLqrDCjFM/tlQQ=; b=Kldm8DOy7ctGkOumSsFeJYTN/1ODI/goL4BGKXgKZyU1cww1QDbgJf8LSa3EChsM4M 98NFXNfwVWmoCtSiTzA25/0tZxJwaqfeJ+ztOR6h3JzVwCD6S02aD8TBDWyF4kK6pUqC S33hlAOL47MN0zhL7X3+p7jzfHpEu6H0rlD7RKGNlDVWrcHhsTw38wOs29y0Q8JfaEnA As/ZaEvZ1W2Sr8OtXTzOlbQeQgBh/TjFGWO2YH7kjCcPMheqIqURB9mmLxX2hk4G2STg WRYZPm13zLJw71qZRsaxiYC7PKdnstQTtEP72N+FmQ8IxwfUvMA2/oQU04t6uBue0llr f5Ow== X-Gm-Message-State: AOJu0YxWjSUbar1603Ce7xOnNM9wuZbJd/qm7wirGmEMVJnQdTqE4XxT YmiUOeLUVDDIeV+zkGvbK26mYy8zeUgGEwDIKuPN7xsQY/fs83srod6zBJlsj5TbLBIbWqojuGo 5 X-Gm-Gg: ASbGnctpCsupgem9f6PQ1tCjY4aKiiE8oeaFZ1B5uOhsrbiQo/iaZEb7QToo4NPccfq 9ZOLiB+WmQ2vU6pMaaxzNtPqbVikkSdIEU8byYGaDaIgIuKNVccL/VP0p5bqqdoJV1ylgQnRhSo th+553sHiTxT6nSpslZ2e6xApwrF6O/3dEOFLAjl122j2SPi545KzU8/kddIIh3+NRzZfQqYcEA gyX+jysCTJxEW1PinK7CuOnIImuh8+I7eg0Kr1PiaCOTQ60/eCdbqxuyuM91YmTaPHG58Yx/CmW Qq0bJaH2dfuBXsNRymf4u1MUH4WgBgMbM/cuu5euuGq5h+7l2g== X-Google-Smtp-Source: AGHT+IEuEIE9Um3D9BJs1q1bWJlf4SLyF9szb3Oq6jabVbWM/EGS4SqMEm9R6Rb1xVrprqgO28w0PA== X-Received: by 2002:a05:6402:3229:b0:5ee:486:ea33 with SMTP id 4fb4d7f45d1cf-5ee0486eb5amr11074834a12.33.1743512925295; Tue, 01 Apr 2025 06:08:45 -0700 (PDT) From: Roger Pau Monne To: xen-devel@lists.xenproject.org Cc: Roger Pau Monne , Doug Goldstein , Stefano Stabellini , "Daniel P. Smith" , =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= , Jan Beulich , Andrew Cooper , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Shawn Anastasio , Alistair Francis , Bob Eshleman , Connor Davis , Oleksii Kurochko Subject: [PATCH v2 00/11] x86/EFI: prevent write-execute sections Date: Tue, 1 Apr 2025 15:08:29 +0200 Message-ID: <20250401130840.72119-1-roger.pau@citrix.com> X-Mailer: git-send-email 2.48.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Hello, The following series aim to remove the presence of any write and execute section in the PE Xen image. This is required to support the NX compatible flag in the PE header. By the end of the series the resulting PE image has no relocations that apply to text sections, as text sections are strictly mapped read-execute only. Xen itself attempting to apply relocations to text would result in page-faults. A smoke test is added to Gitlab to ensure the PE NX support doesn't regress. Only patches 5 and 10 are carried over from v1, the rest are new. Thanks, Roger. Roger Pau Monne (11): automation/dockers: add to README how to rebuild all containers x86/mkreloc: fix obtaining PE image base address x86/mkreloc: use the string table to get names x86/mkreloc: print the linear address of relocations to read-only sections xen: remove -N from the linker command line x86/efi: discard .text.header for PE binary x86/efi: discard multiboot related entry code for PE binary x86/boot: place trampoline code in a non-execute section x86/efi: avoid a relocation in efi_arch_post_exit_boot() x86/efi: do not merge all .init sections automation/x86: add a xen.efi test with a strict NX OVMF build automation/build/README.md | 7 ++ automation/build/fedora/41-x86_64.dockerfile | 5 ++ automation/gitlab-ci/test.yaml | 9 +++ automation/scripts/qemu-smoke-x86-64-efi.sh | 22 +++++- xen/arch/arm/Makefile | 6 +- xen/arch/ppc/Makefile | 6 +- xen/arch/riscv/Makefile | 6 +- xen/arch/x86/Makefile | 12 +-- xen/arch/x86/boot/head.S | 3 +- xen/arch/x86/efi/efi-boot.h | 7 +- xen/arch/x86/efi/mkreloc.c | 77 +++++++++++++++++--- xen/arch/x86/xen.lds.S | 20 +++-- 12 files changed, 138 insertions(+), 42 deletions(-) -- 2.48.1 From xen-devel-bounces@lists.xenproject.org Tue Apr 01 13:08:57 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 13:08:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934107.1335907 (Exim 4.92) (envelope-from ) id 1tzbMI-00006x-1z; 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Tue, 01 Apr 2025 06:08:46 -0700 (PDT) From: Roger Pau Monne To: xen-devel@lists.xenproject.org Cc: Roger Pau Monne , Doug Goldstein , Stefano Stabellini Subject: [PATCH v2 01/11] automation/dockers: add to README how to rebuild all containers Date: Tue, 1 Apr 2025 15:08:30 +0200 Message-ID: <20250401130840.72119-2-roger.pau@citrix.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250401130840.72119-1-roger.pau@citrix.com> References: <20250401130840.72119-1-roger.pau@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Document in the README how to rebuild all containers. This is helpful when populating a local docker registry for testing purposes. Signed-off-by: Roger Pau Monné --- automation/build/README.md | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/automation/build/README.md b/automation/build/README.md index ecc898680c91..6c647b1b2a68 100644 --- a/automation/build/README.md +++ b/automation/build/README.md @@ -108,6 +108,13 @@ env CONTAINER_NO_PULL=1 \ make -C automation/build opensuse/tumbleweed-x86_64 PUSH=1 ``` +To rebuild all containers the `all` make target can be used, with or without +the `PUSH` environment variable: + +``` +make -C automation/build all PUSH=1 +``` + [BuildKit]: https://docs.docker.com/build/buildkit/ [registry]: https://gitlab.com/xen-project/xen/container_registry [registry help]: https://docs.gitlab.com/ee/user/packages/container_registry/ -- 2.48.1 From xen-devel-bounces@lists.xenproject.org Tue Apr 01 13:08:58 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 13:08:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934110.1335916 (Exim 4.92) (envelope-from ) id 1tzbMQ-0000QL-8m; Tue, 01 Apr 2025 13:08:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 934110.1335916; Tue, 01 Apr 2025 13:08:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzbMQ-0000QC-5G; Tue, 01 Apr 2025 13:08:58 +0000 Received: by outflank-mailman (input) for mailman id 934110; Tue, 01 Apr 2025 13:08:57 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzbMP-0000Od-8u for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 13:08:57 +0000 Received: from mail-ed1-x532.google.com (mail-ed1-x532.google.com [2a00:1450:4864:20::532]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 76ee7198-0efa-11f0-9ffb-bf95429c2676; Tue, 01 Apr 2025 15:08:55 +0200 (CEST) Received: by mail-ed1-x532.google.com with SMTP id 4fb4d7f45d1cf-5e6f4b3ebe5so10105035a12.0 for ; Tue, 01 Apr 2025 06:08:55 -0700 (PDT) Received: from localhost ([84.78.159.3]) by smtp.gmail.com with UTF8SMTPSA id a640c23a62f3a-ac719278d40sm758430666b.43.2025.04.01.06.08.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Apr 2025 06:08:47 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 76ee7198-0efa-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1743512934; x=1744117734; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=NsEpEdsMppdQXfKAAy8KJLkcIZ3dN80EvB2RdrH7vDo=; b=TvDoznc4sPuIsNPC+8tzsVYHSzRFgVmjwpFGZMTiRg2vleHRbsvNuKel5vgbh+pTwj 8RKxRZj1C90M75lrlYxnfDyoMY8boKCWhHWegcwHq18xxN3XWPx3qfb1YNYshENmR4RW az5w8NAcBOlUlyvIdk4RunMQp2WEopyeTNOg0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743512934; x=1744117734; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=NsEpEdsMppdQXfKAAy8KJLkcIZ3dN80EvB2RdrH7vDo=; b=N5Byvf8iw3Ii90N6h6ZPFTKZh5HxiYnehH1QmtG4f35OCIE/fayRbqnWByRqGIvmrx QpgPug7CL6tu+ygUqa+RToXCR178XAmunHlfoqloJtx+qE5j6deE56D7hJ4yjsHJp8IU npl8dLsldp5rVg7gHgGqTJxhPzVFqcnWuNEiED59rU39ZsmpkleTahlzYp9iPosUiqK5 DVVcZZhwlafLg/6xPBrq6Mhn5cE6MxNsp3S9caWaYtlnpDCBXPDVV5dULGWsQnj4gXzm aAWcv8G122BM//DDv8O37sapFkpy3jdYQ+R/Ivf2eC6U1yWPIV/tsRVuqo8Sv5I/X3al 1L3A== X-Gm-Message-State: AOJu0YySjyILldvr9ItkD/aF0KvW/q38K/J4YGzcwgpkLsfNjlKiEigT 3nhP019VA8LAKdi+xBi8g/rg0whpgiESJQR6JBcQkOK/G2KJVV69Mr2ZyGjcwT6/VrDtfGHUarp c X-Gm-Gg: ASbGnct/WyIoYzuwqza8cVoaHzLkjXhlqVqVuToQyJEndshQJTiSCLn1wXNaducuECB jcQSAbu00h8+bk+yQiUoVDU2F/mJiADLZxlxYMrVaHk8OCgkwCP6KElLaMXMKj3HrT7DG7bOKea /smZlmz+9dGb4R7kp1/+uTYmYRdgj/hEk3dje2DNR+guwKGZLWnJjFHuh03Sffw38/8vHqUk2yv tLRioINJfBn4E9nLdVI2dIBQSaRTnd6w/aSxZU6qE96TQbSs8Pn3EddqjJNJTsvrl+hx2EwK7lu JBJoDEPFUnGlIRYTOMd0/PReNzLi/EEwUwEXu21ZzDj0STDGAA== X-Google-Smtp-Source: AGHT+IEjNM0hl1ZuDEUz8kinw6uldqxQXFDuinCrTlRAbXXd1L6CBSNezmpIgEeTcYwhFpI/avEATA== X-Received: by 2002:a17:907:3e1d:b0:ac3:3f11:2955 with SMTP id a640c23a62f3a-ac738bae5ffmr1213282666b.39.1743512928140; Tue, 01 Apr 2025 06:08:48 -0700 (PDT) From: Roger Pau Monne To: xen-devel@lists.xenproject.org Cc: Roger Pau Monne , "Daniel P. Smith" , =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= , Jan Beulich , Andrew Cooper Subject: [PATCH v2 02/11] x86/mkreloc: fix obtaining PE image base address Date: Tue, 1 Apr 2025 15:08:31 +0200 Message-ID: <20250401130840.72119-3-roger.pau@citrix.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250401130840.72119-1-roger.pau@citrix.com> References: <20250401130840.72119-1-roger.pau@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The base address is in the pe32_opt_hdr, not after it. Previous to commit f7f42accbbbb the base was read standalone (as the first field of pe32_opt_hdr). However with the addition of reading the full contents of pe32_opt_hdr, such read will also fetch the base. The current attempt to read the base after pe32_opt_hdr is bogus, and could only work if the file cursor is repositioned using lseek(), but there's no need for that as the data is already fetched in pe32_opt_hdr. Fixes: f7f42accbbbb ('x86/efi: Use generic PE/COFF structures') Signed-off-by: Roger Pau Monné --- xen/arch/x86/efi/mkreloc.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/xen/arch/x86/efi/mkreloc.c b/xen/arch/x86/efi/mkreloc.c index 375cb79d6959..1a6cfc845cba 100644 --- a/xen/arch/x86/efi/mkreloc.c +++ b/xen/arch/x86/efi/mkreloc.c @@ -35,7 +35,6 @@ static unsigned int load(const char *name, int *handle, struct mz_hdr mz_hdr; struct pe_hdr pe_hdr; struct pe32_opt_hdr pe32_opt_hdr; - uint32_t base; if ( in < 0 || read(in, &mz_hdr, sizeof(mz_hdr)) != sizeof(mz_hdr) ) @@ -55,7 +54,6 @@ static unsigned int load(const char *name, int *handle, if ( lseek(in, mz_hdr.peaddr, SEEK_SET) < 0 || read(in, &pe_hdr, sizeof(pe_hdr)) != sizeof(pe_hdr) || read(in, &pe32_opt_hdr, sizeof(pe32_opt_hdr)) != sizeof(pe32_opt_hdr) || - read(in, &base, sizeof(base)) != sizeof(base) || /* * Luckily the image size field lives at the * same offset for both formats. @@ -73,11 +71,12 @@ static unsigned int load(const char *name, int *handle, { case PE_OPT_MAGIC_PE32: *width = 32; - *image_base = base; + *image_base = pe32_opt_hdr.image_base; break; case PE_OPT_MAGIC_PE32PLUS: *width = 64; - *image_base = ((uint64_t)base << 32) | pe32_opt_hdr.data_base; + *image_base = ((uint64_t)pe32_opt_hdr.image_base << 32) | + pe32_opt_hdr.data_base; break; default: fprintf(stderr, "%s: Wrong PE file format\n", name); -- 2.48.1 From xen-devel-bounces@lists.xenproject.org Tue Apr 01 13:08:59 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 13:08:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934111.1335925 (Exim 4.92) (envelope-from ) id 1tzbMR-0000fo-HP; Tue, 01 Apr 2025 13:08:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 934111.1335925; Tue, 01 Apr 2025 13:08:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzbMR-0000fg-DY; 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Tue, 01 Apr 2025 06:08:55 -0700 (PDT) From: Roger Pau Monne To: xen-devel@lists.xenproject.org Cc: Roger Pau Monne , "Daniel P. Smith" , =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= , Jan Beulich , Andrew Cooper Subject: [PATCH v2 03/11] x86/mkreloc: use the string table to get names Date: Tue, 1 Apr 2025 15:08:32 +0200 Message-ID: <20250401130840.72119-4-roger.pau@citrix.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250401130840.72119-1-roger.pau@citrix.com> References: <20250401130840.72119-1-roger.pau@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When using PE format names greater than 8 characters are placed in the string table, and a reference using the '/' format is placed in the name field. Read the string table if present, and decode names as required. No functional change intended, but the name references printed in error messages are now human readable: Warning: relocation to r/o section /4:00042d43 Becomes: Warning: relocation to r/o section .init.text:000446c3 Note the introduced helper to print names relies on a static internal buffer to make sure the returned string are always null terminated. This is enough for the current use-case, but if the returned value is to stay valid between calls the current static buffer won't work as expected. Signed-off-by: Roger Pau Monné --- xen/arch/x86/efi/mkreloc.c | 69 +++++++++++++++++++++++++++++++++----- 1 file changed, 61 insertions(+), 8 deletions(-) diff --git a/xen/arch/x86/efi/mkreloc.c b/xen/arch/x86/efi/mkreloc.c index 1a6cfc845cba..cc106bd875ba 100644 --- a/xen/arch/x86/efi/mkreloc.c +++ b/xen/arch/x86/efi/mkreloc.c @@ -17,6 +17,12 @@ #define PE_BASE_RELOC_HIGHLOW 3 #define PE_BASE_RELOC_DIR64 10 +/* The size of a symbol table entry is always 18 bytes. */ +#define SYM_SIZE 18 + +const char *string_table; +unsigned int string_table_size; + static void usage(const char *cmd, int rc) { fprintf(rc ? stderr : stdout, @@ -25,6 +31,28 @@ static void usage(const char *cmd, int rc) exit(rc); } +const char *get_name(const char *name) +{ + static char buffer[sizeof(((struct section_header *)NULL)->name) + 1] = {}; + unsigned long offset; + + if ( name[0] != '/' ) + { + /* + * Use a temporary buffer in case the name is 8 characters long, as + * then there's no terminating null character in the input string. + */ + strncpy(buffer, name, sizeof(buffer) - 1); + return buffer; + } + + offset = strtoul(&name[1], NULL, 10); + if ( !string_table || offset < 4 || offset >= string_table_size ) + return name; + + return &string_table[offset - 4]; +} + static unsigned int load(const char *name, int *handle, struct section_header **sections, uint_fast64_t *image_base, @@ -83,6 +111,31 @@ static unsigned int load(const char *name, int *handle, exit(3); } + if ( !string_table && pe_hdr.symbol_table ) + { + char *strings; + + if ( lseek(in, pe_hdr.symbol_table + pe_hdr.symbols * SYM_SIZE, + SEEK_SET) < 0 || + read(in, &string_table_size, sizeof(string_table_size)) != + sizeof(string_table_size) ) + { + perror(name); + exit(3); + } + + string_table_size -= sizeof(string_table_size); + strings = malloc(string_table_size); + + if ( read(in, strings, string_table_size) != string_table_size ) + { + perror(name); + exit(3); + } + + string_table = strings; + } + *sections = malloc(pe_hdr.sections * sizeof(**sections)); if ( !*sections ) { @@ -173,8 +226,8 @@ static void diff_sections(const unsigned char *ptr1, const unsigned char *ptr2, if ( i < disp || i + width - disp > sec->raw_data_size ) { fprintf(stderr, - "Bogus difference at %.8s:%08" PRIxFAST32 "\n", - sec->name, i); + "Bogus difference at %s:%08" PRIxFAST32 "\n", + get_name(sec->name), i); exit(3); } @@ -184,9 +237,9 @@ static void diff_sections(const unsigned char *ptr1, const unsigned char *ptr2, if ( delta != diff ) { fprintf(stderr, - "Difference at %.8s:%08" PRIxFAST32 " is %#" PRIxFAST64 + "Difference at %s:%08" PRIxFAST32 " is %#" PRIxFAST64 " (expected %#" PRIxFAST64 ")\n", - sec->name, i - disp, delta, diff); + get_name(sec->name), i - disp, delta, diff); continue; } if ( width == 8 && (val1.u64 < base || val1.u64 > end) ) @@ -210,15 +263,15 @@ static void diff_sections(const unsigned char *ptr1, const unsigned char *ptr2, else if ( rva != cur_rva ) { fprintf(stderr, - "Cannot handle decreasing RVA (at %.8s:%08" PRIxFAST32 ")\n", - sec->name, i - disp); + "Cannot handle decreasing RVA (at %s:%08" PRIxFAST32 ")\n", + get_name(sec->name), i - disp); exit(3); } if ( !(sec->flags & IMAGE_SCN_MEM_WRITE) ) fprintf(stderr, - "Warning: relocation to r/o section %.8s:%08" PRIxFAST32 "\n", - sec->name, i - disp); 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Tue, 01 Apr 2025 06:08:57 -0700 (PDT) From: Roger Pau Monne To: xen-devel@lists.xenproject.org Cc: Roger Pau Monne , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Shawn Anastasio , Alistair Francis , Bob Eshleman , Connor Davis , Oleksii Kurochko , Jan Beulich , Andrew Cooper Subject: [PATCH v2 05/11] xen: remove -N from the linker command line Date: Tue, 1 Apr 2025 15:08:34 +0200 Message-ID: <20250401130840.72119-6-roger.pau@citrix.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250401130840.72119-1-roger.pau@citrix.com> References: <20250401130840.72119-1-roger.pau@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit It's unclear why -N is being used in the first place. It was added by commit 4676bbf96dc8 back in 2002 without any justification. When building a PE image it's actually detrimental to forcefully set the .text section as writable. The GNU LD man page contains the following warning regarding the -N option: > Note: Although a writable text section is allowed for PE-COFF targets, it > does not conform to the format specification published by Microsoft. Remove the usage of -N uniformly on all architectures, assuming that the addition was simply done as a copy and paste of the original x86 linking rune. Signed-off-by: Roger Pau Monné Reviewed-by: Andrew Cooper Reviewed-by: Oleksii Kurochko --- xen/arch/arm/Makefile | 6 +++--- xen/arch/ppc/Makefile | 6 +++--- xen/arch/riscv/Makefile | 6 +++--- xen/arch/x86/Makefile | 12 ++++++------ 4 files changed, 15 insertions(+), 15 deletions(-) diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile index 4837ad467a06..129a109d6ec5 100644 --- a/xen/arch/arm/Makefile +++ b/xen/arch/arm/Makefile @@ -97,19 +97,19 @@ ifeq ($(CONFIG_ARM_64),y) endif $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds - $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds -N $< \ + $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \ $(objtree)/common/symbols-dummy.o -o $(dot-target).0 $(NM) -pa --format=sysv $(dot-target).0 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > $(dot-target).0.S $(MAKE) $(build)=$(@D) $(dot-target).0.o - $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds -N $< \ + $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \ $(dot-target).0.o -o $(dot-target).1 $(NM) -pa --format=sysv $(dot-target).1 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > $(dot-target).1.S $(MAKE) $(build)=$(@D) $(dot-target).1.o - $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds -N $< $(build_id_linker) \ + $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ $(dot-target).1.o -o $@ $(NM) -pa --format=sysv $@ \ | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ diff --git a/xen/arch/ppc/Makefile b/xen/arch/ppc/Makefile index 655d212f6687..cf27bcebb25a 100644 --- a/xen/arch/ppc/Makefile +++ b/xen/arch/ppc/Makefile @@ -12,19 +12,19 @@ $(TARGET): $(TARGET)-syms cp -f $< $@ $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds - $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds -N $< \ + $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \ $(objtree)/common/symbols-dummy.o -o $(dot-target).0 $(NM) -pa --format=sysv $(dot-target).0 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > $(dot-target).0.S $(MAKE) $(build)=$(@D) $(dot-target).0.o - $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds -N $< \ + $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \ $(dot-target).0.o -o $(dot-target).1 $(NM) -pa --format=sysv $(dot-target).1 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > $(dot-target).1.S $(MAKE) $(build)=$(@D) $(dot-target).1.o - $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds -N $< $(build_id_linker) \ + $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ $(dot-target).1.o -o $@ $(NM) -pa --format=sysv $@ \ | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index b0c8270a9947..516f5d505ca8 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -16,19 +16,19 @@ $(TARGET): $(TARGET)-syms $(OBJCOPY) -O binary -S $< $@ $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds - $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds -N $< \ + $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \ $(objtree)/common/symbols-dummy.o -o $(dot-target).0 $(NM) -pa --format=sysv $(dot-target).0 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > $(dot-target).0.S $(MAKE) $(build)=$(@D) $(dot-target).0.o - $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds -N $< \ + $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \ $(dot-target).0.o -o $(dot-target).1 $(NM) -pa --format=sysv $(dot-target).1 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > $(dot-target).1.S $(MAKE) $(build)=$(@D) $(dot-target).1.o - $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds -N $< $(build_id_linker) \ + $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ $(dot-target).1.o -o $@ $(NM) -pa --format=sysv $@ \ | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile index f59c9665fdd0..c2f1dcf301d6 100644 --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -139,19 +139,19 @@ $(TARGET): $(TARGET)-syms $(efi-y) $(obj)/boot/mkelf32 CFLAGS-$(XEN_BUILD_EFI) += -DXEN_BUILD_EFI $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds - $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds -N $< $(build_id_linker) \ + $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ $(objtree)/common/symbols-dummy.o -o $(dot-target).0 $(NM) -pa --format=sysv $(dot-target).0 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > $(dot-target).0.S $(MAKE) $(build)=$(@D) $(dot-target).0.o - $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds -N $< $(build_id_linker) \ + $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ $(dot-target).0.o -o $(dot-target).1 $(NM) -pa --format=sysv $(dot-target).1 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort $(syms-warn-dup-y) \ > $(dot-target).1.S $(MAKE) $(build)=$(@D) $(dot-target).1.o - $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds -N $< $(build_id_linker) \ + $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ $(orphan-handling-y) $(dot-target).1.o -o $@ $(NM) -pa --format=sysv $@ \ | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ @@ -212,7 +212,7 @@ ifeq ($(CONFIG_DEBUG_INFO),y) $(if $(filter --strip-debug,$(EFI_LDFLAGS)),echo,:) "Will strip debug info from $(@F)" endif $(foreach base, $(VIRT_BASE) $(ALT_BASE), \ - $(LD) $(call EFI_LDFLAGS,$(base)) -T $(obj)/efi.lds -N $< $(relocs-dummy) \ + $(LD) $(call EFI_LDFLAGS,$(base)) -T $(obj)/efi.lds $< $(relocs-dummy) \ $(objtree)/common/symbols-dummy.o $(note_file_option) \ -o $(dot-target).$(base).0 &&) : $(MKRELOC) $(foreach base,$(VIRT_BASE) $(ALT_BASE),$(dot-target).$(base).0) \ @@ -222,7 +222,7 @@ endif > $(dot-target).0s.S $(MAKE) $(build)=$(@D) .$(@F).0r.o .$(@F).0s.o $(foreach base, $(VIRT_BASE) $(ALT_BASE), \ - $(LD) $(call EFI_LDFLAGS,$(base)) -T $(obj)/efi.lds -N $< \ + $(LD) $(call EFI_LDFLAGS,$(base)) -T $(obj)/efi.lds $< \ $(dot-target).0r.o $(dot-target).0s.o $(note_file_option) \ -o $(dot-target).$(base).1 &&) : $(MKRELOC) $(foreach base,$(VIRT_BASE) $(ALT_BASE),$(dot-target).$(base).1) \ @@ -231,7 +231,7 @@ endif | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > $(dot-target).1s.S $(MAKE) $(build)=$(@D) .$(@F).1r.o .$(@F).1s.o - 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Smith" , =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= , Jan Beulich , Andrew Cooper Subject: [PATCH v2 04/11] x86/mkreloc: print the linear address of relocations to read-only sections Date: Tue, 1 Apr 2025 15:08:33 +0200 Message-ID: <20250401130840.72119-5-roger.pau@citrix.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250401130840.72119-1-roger.pau@citrix.com> References: <20250401130840.72119-1-roger.pau@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Expand the warning message about relocations generated against read-only sections, so it also contains the linear address of the offending relocation, like: Warning: relocation to r/o section .text:00000048 @ 0xffff82d040200048 Signed-off-by: Roger Pau Monné --- xen/arch/x86/efi/mkreloc.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/efi/mkreloc.c b/xen/arch/x86/efi/mkreloc.c index cc106bd875ba..fa50314ae945 100644 --- a/xen/arch/x86/efi/mkreloc.c +++ b/xen/arch/x86/efi/mkreloc.c @@ -270,8 +270,9 @@ static void diff_sections(const unsigned char *ptr1, const unsigned char *ptr2, if ( !(sec->flags & IMAGE_SCN_MEM_WRITE) ) fprintf(stderr, - "Warning: relocation to r/o section %s:%08" PRIxFAST32 "\n", - get_name(sec->name), i - disp); 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Tue, 01 Apr 2025 06:08:59 -0700 (PDT) From: Roger Pau Monne To: xen-devel@lists.xenproject.org Cc: Roger Pau Monne , Jan Beulich , Andrew Cooper Subject: [PATCH v2 07/11] x86/efi: discard multiboot related entry code for PE binary Date: Tue, 1 Apr 2025 15:08:36 +0200 Message-ID: <20250401130840.72119-8-roger.pau@citrix.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250401130840.72119-1-roger.pau@citrix.com> References: <20250401130840.72119-1-roger.pau@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The multiboot and PVH entry points are not used in the PE binary, hence discard them in the linker script when doing a PE build. That removes some relocations that otherwise appear due to the entry point code in head.S not being position independent. No functional change intended. Signed-off-by: Roger Pau Monné --- We could also place the entry points in it's own isolated section and skip such section for relocations generation in mkreloc, but it seems best to just remove the code if it's unused. --- xen/arch/x86/boot/head.S | 3 ++- xen/arch/x86/xen.lds.S | 2 ++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/boot/head.S b/xen/arch/x86/boot/head.S index 81473578fe84..774894954e44 100644 --- a/xen/arch/x86/boot/head.S +++ b/xen/arch/x86/boot/head.S @@ -151,7 +151,7 @@ vga_text_buffer: efi_platform: .byte 0 - .section .init.text, "ax", @progbits + .section .init.multiboot, "ax", @progbits early_error: /* Here to improve the disassembly. */ @@ -709,6 +709,7 @@ trampoline_setup: /* Jump into the relocated trampoline. */ lret + .section .init.text, "ax", @progbits ENTRY(trampoline_start) #include "trampoline.S" ENTRY(trampoline_end) diff --git a/xen/arch/x86/xen.lds.S b/xen/arch/x86/xen.lds.S index ad908539f38a..1191bf4e2ddd 100644 --- a/xen/arch/x86/xen.lds.S +++ b/xen/arch/x86/xen.lds.S @@ -63,6 +63,7 @@ SECTIONS . = __image_base__; /DISCARD/ : { *(.text.header) + *(.init.multiboot) } #endif @@ -208,6 +209,7 @@ SECTIONS _sinittext = .; *(.init.text) *(.text.startup) + *(.init.multiboot) _einittext = .; /* * Here are the replacement instructions. The linker sticks them -- 2.48.1 From xen-devel-bounces@lists.xenproject.org Tue Apr 01 13:09:03 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 13:09:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934116.1335965 (Exim 4.92) (envelope-from ) id 1tzbMV-0001e0-4j; Tue, 01 Apr 2025 13:09:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 934116.1335965; Tue, 01 Apr 2025 13:09:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzbMU-0001be-VP; Tue, 01 Apr 2025 13:09:02 +0000 Received: by outflank-mailman (input) for mailman id 934116; Tue, 01 Apr 2025 13:09:01 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzbMT-0000Od-9s for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 13:09:01 +0000 Received: from mail-ej1-x62f.google.com (mail-ej1-x62f.google.com [2a00:1450:4864:20::62f]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 79a8e624-0efa-11f0-9ffb-bf95429c2676; Tue, 01 Apr 2025 15:08:59 +0200 (CEST) Received: by mail-ej1-x62f.google.com with SMTP id a640c23a62f3a-ac339f53df9so982517566b.1 for ; Tue, 01 Apr 2025 06:08:59 -0700 (PDT) Received: from localhost ([84.78.159.3]) by smtp.gmail.com with UTF8SMTPSA id a640c23a62f3a-ac71961f0e9sm766309366b.101.2025.04.01.06.08.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Apr 2025 06:08:58 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 79a8e624-0efa-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1743512939; x=1744117739; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Eaji7nWfNm9j69tZV5bRL2oO0fL1lVBczAnwU7AW6j8=; b=Ty5wJy1ey/X8Hh+lhVbhCdO2jqlU4i2iinCjw0NVNgGwLDPJ02YNG/afzjuJFNbJ28 Cv9ab+fkbKA7/iV4S6Vvo2XwYZLszMwl++KBwZjp3zq+j56sFi1g7w+VnaXgfWql0HiE dcW2Ft5h2T6vPSnQ8eZCiYlRGc02yhKSWQebI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743512939; x=1744117739; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Eaji7nWfNm9j69tZV5bRL2oO0fL1lVBczAnwU7AW6j8=; b=J7far2vTxLEKL/4GujufO6JGwl9b97RE7XHaYmQBgZVs5ZFeXNuT72xfaEHcDnajz3 QXHMX2L3n+/tXo+LsENF1+U5yVs/AHQnz39xMz6/fMD78kgxHAalxm8VMYrH4t36CrC6 gy7+MX6JPMK0MzTxrsTaqxrG2MEm0pVLj9LORdMwymEA5aoTLKsOxnAW2wH9REnCmXTg n4PfaqGA6oe2GecBoNd9vKGREU71tL7/j+5J4Dmux+5uKa8fu02pf5hd+GYpC/0KVuG5 qD/Ijr9gMRGDFVu1pYZK+VHRm8mQbAxPV03EubBjKCvfRsknxKbd75AkRRN5ktTt+JaO t+og== X-Gm-Message-State: AOJu0YyYn4bTnUu6+WfVMTL6QWoF7AZmWG3MdOYfzR+tcuXB3CqWIhUX IbM/FScS4/Jut3W4OiWTZHRdROxWQArTMkK/LkNSZ25U9cf6FJSmnAhXhRlEOLsbPCY08tL8UCz 8 X-Gm-Gg: ASbGncuCPFIo1HwtLjgL/X/ifS2kuW/TujW6cE5zvVAtydX54Sp1GFBg4QYT+ArdLGH FJlnNxjX992BMoCaiVlikhI2nJTLsZE1eDQxJ7OLj8RNdU/tZNQ9o0vILFdrfIpJe3dOd7LfGgy M2Usc1W0jySuiJtnRuxXC8ATy5xwrqHq4o+vIHhb/JMoPy5kNp0flEoTX9tDnXuArBfKN/lKd3M KF776EGeQFJNVusYyWX6C6JH0vw74X8y3VLUYvUEryr52Z3a+5oB33elQGgPpMBgIisz3NEKHdT 7ZJhTdVasAI14136NAacj6n0q3eOeV5iVCA+l9uis2HI5KEGVTmWcRFlc+M9 X-Google-Smtp-Source: AGHT+IFEAYGnrYThDPAMGzjbZHMr1I7RawUz/d9U/DPxyEPsI8rXQHzi8rJZZziXUhur4LUgDCyORg== X-Received: by 2002:a17:907:3f09:b0:ac3:ec70:18ae with SMTP id a640c23a62f3a-ac73897605dmr1150923666b.3.1743512938462; Tue, 01 Apr 2025 06:08:58 -0700 (PDT) From: Roger Pau Monne To: xen-devel@lists.xenproject.org Cc: Roger Pau Monne , Jan Beulich , Andrew Cooper Subject: [PATCH v2 06/11] x86/efi: discard .text.header for PE binary Date: Tue, 1 Apr 2025 15:08:35 +0200 Message-ID: <20250401130840.72119-7-roger.pau@citrix.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250401130840.72119-1-roger.pau@citrix.com> References: <20250401130840.72119-1-roger.pau@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The multiboot headers are not consumed in the PE binary, hence discard them in the linker script when doing a PE build. That removes some relocations that otherwise appear due to the usage of the start and __efi64_mb2_start symbols in the multiboot2 header. No functional change intended. Signed-off-by: Roger Pau Monné --- We could also place the multiboot header in it's own isolated section and skip such section for relocations generation in mkreloc, but it seems best to just remove the code if it's unused. --- xen/arch/x86/xen.lds.S | 3 +++ 1 file changed, 3 insertions(+) diff --git a/xen/arch/x86/xen.lds.S b/xen/arch/x86/xen.lds.S index d4dd6434c466..ad908539f38a 100644 --- a/xen/arch/x86/xen.lds.S +++ b/xen/arch/x86/xen.lds.S @@ -61,6 +61,9 @@ SECTIONS __image_base__ = .; #else . = __image_base__; + /DISCARD/ : { + *(.text.header) + } #endif #if 0 -- 2.48.1 From xen-devel-bounces@lists.xenproject.org Tue Apr 01 13:12:02 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 13:12:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934184.1335981 (Exim 4.92) (envelope-from ) id 1tzbPM-0006Uc-Qx; Tue, 01 Apr 2025 13:12:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 934184.1335981; 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Tue, 01 Apr 2025 06:09:07 -0700 (PDT) From: Roger Pau Monne To: xen-devel@lists.xenproject.org Cc: Roger Pau Monne , Jan Beulich , Andrew Cooper Subject: [PATCH v2 10/11] x86/efi: do not merge all .init sections Date: Tue, 1 Apr 2025 15:08:39 +0200 Message-ID: <20250401130840.72119-11-roger.pau@citrix.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250401130840.72119-1-roger.pau@citrix.com> References: <20250401130840.72119-1-roger.pau@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit As a result of having no relocations against text sections, there's no need for a single .init section that's read-write-execute, as .init.text is no longer modified. Remove the bodge and fallback to the layout used by ELF images with an .init.text and .init.data section. The resulting PE sections are: Sections: Idx Name Size VMA LMA File off Algn 0 .text 00193f6b ffff82d040200000 ffff82d040200000 00000480 2**4 CONTENTS, ALLOC, LOAD, READONLY, CODE 1 .rodata 0008a010 ffff82d040400000 ffff82d040400000 00194400 2**2 CONTENTS, ALLOC, LOAD, DATA 2 .buildid 00000035 ffff82d04048a010 ffff82d04048a010 0021e420 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .init.text 00049e70 ffff82d040600000 ffff82d040600000 0021e460 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE 4 .init.data 000560a8 ffff82d040800000 ffff82d040800000 002682e0 2**2 CONTENTS, ALLOC, LOAD, DATA [...] Signed-off-by: Roger Pau Monné --- Changes since v1: - Align .init.text. - Clarify commit message. --- xen/arch/x86/xen.lds.S | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/xen/arch/x86/xen.lds.S b/xen/arch/x86/xen.lds.S index 1191bf4e2ddd..852aa135a76c 100644 --- a/xen/arch/x86/xen.lds.S +++ b/xen/arch/x86/xen.lds.S @@ -201,11 +201,7 @@ SECTIONS __2M_init_start = .; /* Start of 2M superpages, mapped RWX (boot only). */ . = ALIGN(PAGE_SIZE); /* Init code and data */ __init_begin = .; -#ifdef EFI /* EFI wants to merge all of .init.* ELF doesn't. */ - DECL_SECTION(.init) { -#else DECL_SECTION(.init.text) { -#endif _sinittext = .; *(.init.text) *(.text.startup) @@ -218,12 +214,15 @@ SECTIONS */ *(.altinstr_replacement) -#ifdef EFI /* EFI wants to merge all of .init.* ELF doesn't. */ - . = ALIGN(SMP_CACHE_BYTES); -#else } PHDR(text) - DECL_SECTION(.init.data) { +#ifdef EFI + /* + * Align to prevent the data section from re-using the tail of an RX mapping + * from the previous text section. + */ + . = ALIGN(SECTION_ALIGN); #endif + DECL_SECTION(.init.data) { *(.init.bss.stack_aligned) . = ALIGN(POINTER_ALIGN); -- 2.48.1 From xen-devel-bounces@lists.xenproject.org Tue Apr 01 13:12:03 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 13:12:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934178.1335976 (Exim 4.92) (envelope-from ) id 1tzbPM-0006Rf-JS; Tue, 01 Apr 2025 13:12:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 934178.1335976; Tue, 01 Apr 2025 13:12:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzbPM-0006RY-Eg; Tue, 01 Apr 2025 13:12:00 +0000 Received: by outflank-mailman (input) for mailman id 934178; Tue, 01 Apr 2025 13:11:58 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzbNP-0000Od-Pu for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 13:09:59 +0000 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [2a00:1450:4864:20::42b]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 9c2e7e94-0efa-11f0-9ffb-bf95429c2676; Tue, 01 Apr 2025 15:09:57 +0200 (CEST) Received: by mail-wr1-x42b.google.com with SMTP id ffacd0b85a97d-3996af42857so4372495f8f.0 for ; Tue, 01 Apr 2025 06:09:57 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 01 Apr 2025 06:09:56 -0700 (PDT) Message-ID: Date: Tue, 1 Apr 2025 15:09:55 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 10/19] xen/sysctl: introduce CONFIG_PM_STATS To: Penny Zheng Cc: ray.huang@amd.com, Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20250326055053.3313146-1-Penny.Zheng@amd.com> <20250326055053.3313146-11-Penny.Zheng@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20250326055053.3313146-11-Penny.Zheng@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 26.03.2025 06:50, Penny Zheng wrote: > We intend to introduce CONFIG_PM_STATS for wrapping all operations > regarding performance management statistics. > The major codes reside in xen/drivers/acpi/pmstat.c, including two main > pm-related sysctl op: do_get_pm_info() and do_pm_op(). > So This commit also makes CONFIG_PM_STATS depend on CONFIG_SYSCTL > > Signed-off-by: Penny Zheng > --- > v1 -> v2: > - rename to CONFIG_PM_STATS > - fix indention and stray semicolon > - make code movements into a new commit > - No need to wrap inline functions and declarations > --- > xen/arch/x86/acpi/cpu_idle.c | 2 ++ > xen/arch/x86/acpi/cpufreq/hwp.c | 6 ++++++ > xen/arch/x86/acpi/cpufreq/powernow.c | 4 ++++ > xen/common/Kconfig | 5 +++++ > xen/common/sysctl.c | 4 ++-- > xen/drivers/acpi/Makefile | 2 +- > xen/drivers/cpufreq/cpufreq_misc_governors.c | 2 ++ > xen/drivers/cpufreq/cpufreq_ondemand.c | 2 ++ > xen/include/acpi/cpufreq/processor_perf.h | 14 ++++++++++++++ > 9 files changed, 38 insertions(+), 3 deletions(-) > > diff --git a/xen/arch/x86/acpi/cpu_idle.c b/xen/arch/x86/acpi/cpu_idle.c > index 420198406d..b537ac4cd6 100644 > --- a/xen/arch/x86/acpi/cpu_idle.c > +++ b/xen/arch/x86/acpi/cpu_idle.c > @@ -1487,6 +1487,7 @@ static void amd_cpuidle_init(struct acpi_processor_power *power) > vendor_override = -1; > } > > +#ifdef CONFIG_PM_STATS > uint32_t pmstat_get_cx_nr(unsigned int cpu) > { > return processor_powers[cpu] ? processor_powers[cpu]->count : 0; > @@ -1606,6 +1607,7 @@ int pmstat_reset_cx_stat(unsigned int cpu) > { > return 0; > } > +#endif /* CONFIG_PM_STATS */ > > void cpuidle_disable_deep_cstate(void) > { > diff --git a/xen/arch/x86/acpi/cpufreq/hwp.c b/xen/arch/x86/acpi/cpufreq/hwp.c > index d5fa3d47ca..98e9d46890 100644 > --- a/xen/arch/x86/acpi/cpufreq/hwp.c > +++ b/xen/arch/x86/acpi/cpufreq/hwp.c > @@ -466,6 +466,7 @@ static int cf_check hwp_cpufreq_cpu_exit(struct cpufreq_policy *policy) > return 0; > } > > +#ifdef CONFIG_PM_STATS > /* > * The SDM reads like turbo should be disabled with MSR_IA32_PERF_CTL and > * PERF_CTL_TURBO_DISENGAGE, but that does not seem to actually work, at least > @@ -508,6 +509,7 @@ static int cf_check hwp_cpufreq_update(unsigned int cpu, struct cpufreq_policy * > > return per_cpu(hwp_drv_data, cpu)->ret; > } > +#endif /* CONFIG_PM_STATS */ > > static const struct cpufreq_driver __initconst_cf_clobber > hwp_cpufreq_driver = { > @@ -516,9 +518,12 @@ hwp_cpufreq_driver = { > .target = hwp_cpufreq_target, > .init = hwp_cpufreq_cpu_init, > .exit = hwp_cpufreq_cpu_exit, > +#ifdef CONFIG_PM_STATS > .update = hwp_cpufreq_update, > +#endif > }; Something's wrong here: The .update hook is actually making changes, so is definitely not (only) about statistics. Same for the powernow driver. > +#ifdef CONFIG_PM_STATS > int get_hwp_para(unsigned int cpu, > struct xen_cppc_para *cppc_para) > { > @@ -639,6 +644,7 @@ int set_hwp_para(struct cpufreq_policy *policy, > > return hwp_cpufreq_target(policy, 0, 0); > } > +#endif /* CONFIG_PM_STATS */ This also isn't about statistics, but about getting / setting parameters. > --- a/xen/common/Kconfig > +++ b/xen/common/Kconfig > @@ -557,4 +557,9 @@ config SYSCTL > to reduce Xen footprint. > endmenu > > +config PM_STATS > + bool "Enable Performance Management Statistics" > + depends on ACPI && HAS_CPUFREQ && SYSCTL > + default y As per above - either name, prompt and the description that Stefano suggested are wrong, or it is too much that is being covered by this new control. > --- a/xen/drivers/cpufreq/cpufreq_misc_governors.c > +++ b/xen/drivers/cpufreq/cpufreq_misc_governors.c > @@ -64,6 +64,7 @@ static int cf_check cpufreq_governor_userspace( > return ret; > } > > +#ifdef CONFIG_PM_STATS > int write_userspace_scaling_setspeed(unsigned int cpu, unsigned int freq) > { > struct cpufreq_policy *policy; > @@ -80,6 +81,7 @@ int write_userspace_scaling_setspeed(unsigned int cpu, unsigned int freq) > > return __cpufreq_driver_target(policy, freq, CPUFREQ_RELATION_L); > } > +#endif /* CONFIG_PM_STATS */ Here the name of the function also makes pretty clear that it isn't about statistics. > --- a/xen/drivers/cpufreq/cpufreq_ondemand.c > +++ b/xen/drivers/cpufreq/cpufreq_ondemand.c > @@ -57,6 +57,7 @@ static struct dbs_tuners { > > static DEFINE_PER_CPU(struct timer, dbs_timer); > > +#ifdef CONFIG_PM_STATS > int write_ondemand_sampling_rate(unsigned int sampling_rate) > { > if ( (sampling_rate > MAX_SAMPLING_RATE / MICROSECS(1)) || > @@ -93,6 +94,7 @@ int get_cpufreq_ondemand_para(uint32_t *sampling_rate_max, > > return 0; > } > +#endif /* CONFIG_PM_STATS */ Same for the ones here. > --- a/xen/include/acpi/cpufreq/processor_perf.h > +++ b/xen/include/acpi/cpufreq/processor_perf.h > @@ -9,9 +9,23 @@ > > unsigned int powernow_register_driver(void); > unsigned int get_measured_perf(unsigned int cpu, unsigned int flag); > +#ifdef CONFIG_PM_STATS > void cpufreq_statistic_update(unsigned int cpu, uint8_t from, uint8_t to); > int cpufreq_statistic_init(unsigned int cpu); > void cpufreq_statistic_exit(unsigned int cpu); > +#else > +static inline void cpufreq_statistic_update(unsigned int cpu, uint8_t from, > + uint8_t to) > +{ > +} This could do with both braces moved to the line with the closing parenthesis. > +static inline int cpufreq_statistic_init(unsigned int cpu) > +{ > + return 0; > +} > +static inline void cpufreq_statistic_exit(unsigned int cpu) > +{ > +} Same here. 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Strict NX build is only available in the Fedora edk2-experimental package, so add the required dependencies to run a QEMU EFI job on the Fedora 41 container and use it for the test. Signed-off-by: Roger Pau Monné --- automation/build/fedora/41-x86_64.dockerfile | 5 +++++ automation/gitlab-ci/test.yaml | 9 ++++++++ automation/scripts/qemu-smoke-x86-64-efi.sh | 22 ++++++++++++++++---- 3 files changed, 32 insertions(+), 4 deletions(-) diff --git a/automation/build/fedora/41-x86_64.dockerfile b/automation/build/fedora/41-x86_64.dockerfile index 8032a2098632..84f366ac0643 100644 --- a/automation/build/fedora/41-x86_64.dockerfile +++ b/automation/build/fedora/41-x86_64.dockerfile @@ -65,6 +65,11 @@ RUN <&1 | tee ${LOGFILE} + needs: + - debian-12-x86_64-gcc-debug + qemu-smoke-riscv64-gcc: extends: .qemu-riscv64 script: diff --git a/automation/scripts/qemu-smoke-x86-64-efi.sh b/automation/scripts/qemu-smoke-x86-64-efi.sh index 7572722be6e5..fbb662f1a756 100755 --- a/automation/scripts/qemu-smoke-x86-64-efi.sh +++ b/automation/scripts/qemu-smoke-x86-64-efi.sh @@ -4,6 +4,7 @@ set -ex -o pipefail # variant should be either pv or pvh variant=$1 +mode=$2 # Clone and build XTF git clone https://xenbits.xen.org/git-http/xtf.git @@ -14,6 +15,19 @@ case $variant in *) k=test-pv64-example extra= ;; esac +case $mode in + strict) + ovmf_code=/usr/share/edk2/experimental/OVMF_CODE_4M.secboot.strictnx.qcow2 + ovmf_vars=/usr/share/edk2/ovmf/OVMF_VARS_4M.qcow2 + ovmf_format=qcow2 + ;; + *) + ovmf_code=/usr/share/OVMF/OVMF_CODE.fd + ovmf_vars=/usr/share/OVMF/OVMF_VARS.fd + ovmf_format=raw + ;; +esac + mkdir -p boot-esp/EFI/BOOT cp binaries/xen.efi boot-esp/EFI/BOOT/BOOTX64.EFI cp xtf/tests/example/$k boot-esp/EFI/BOOT/kernel @@ -27,13 +41,13 @@ options=loglvl=all console=com1 noreboot console_timestamps=boot $extra kernel=kernel EOF -cp /usr/share/OVMF/OVMF_CODE.fd OVMF_CODE.fd -cp /usr/share/OVMF/OVMF_VARS.fd OVMF_VARS.fd +cp $ovmf_code OVMF_CODE.fd +cp $ovmf_vars OVMF_VARS.fd rm -f smoke.serial export TEST_CMD="qemu-system-x86_64 -nographic -M q35,kernel-irqchip=split \ - -drive if=pflash,format=raw,readonly=on,file=OVMF_CODE.fd \ - -drive if=pflash,format=raw,file=OVMF_VARS.fd \ + -drive if=pflash,format=${ovmf_format},readonly=on,file=OVMF_CODE.fd \ + -drive if=pflash,format=${ovmf_format},file=OVMF_VARS.fd \ -drive file=fat:rw:boot-esp,media=disk,index=0,format=raw \ -m 512 -monitor none -serial stdio" -- 2.48.1 From xen-devel-bounces@lists.xenproject.org Tue Apr 01 13:12:15 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 13:12:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934201.1336007 (Exim 4.92) (envelope-from ) id 1tzbPb-0007h5-Fu; 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Tue, 01 Apr 2025 06:09:00 -0700 (PDT) From: Roger Pau Monne To: xen-devel@lists.xenproject.org Cc: Roger Pau Monne , Jan Beulich , Andrew Cooper Subject: [PATCH v2 08/11] x86/boot: place trampoline code in a non-execute section Date: Tue, 1 Apr 2025 15:08:37 +0200 Message-ID: <20250401130840.72119-9-roger.pau@citrix.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250401130840.72119-1-roger.pau@citrix.com> References: <20250401130840.72119-1-roger.pau@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The trampoline code is never executed in the position placed by the loader. It's first copied to the low 1MB, and always executed from there. Move the trampoline code from being in .init.text section into .init.data, so it's not in an executable section. This allows applying the relocations safely against a non-executable (and thus non-read only) section, and then copy the relocated trampoline to the low 1MB. Note that the trampoline code is placed on an .init section, so zapped after boot has finished. No functional change intended. Signed-off-by: Roger Pau Monné --- An alternative approach is to apply the relocations after having copied the trampoline to the low 1MB, but that still generates relocations in mkreloc, which is not helpful for the goal of having no relocations applied to read-execute code sections. This approach however places code in a data section, which might cause issues when debugging it. --- xen/arch/x86/boot/head.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/boot/head.S b/xen/arch/x86/boot/head.S index 774894954e44..f5a2d08d0d0e 100644 --- a/xen/arch/x86/boot/head.S +++ b/xen/arch/x86/boot/head.S @@ -709,7 +709,7 @@ trampoline_setup: /* Jump into the relocated trampoline. */ lret - .section .init.text, "ax", @progbits + .section .init.data, "aw", @progbits ENTRY(trampoline_start) #include "trampoline.S" ENTRY(trampoline_end) -- 2.48.1 From xen-devel-bounces@lists.xenproject.org Tue Apr 01 13:12:17 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 13:12:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934208.1336016 (Exim 4.92) (envelope-from ) id 1tzbPd-00084R-Ny; Tue, 01 Apr 2025 13:12:17 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 934208.1336016; Tue, 01 Apr 2025 13:12:17 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzbPd-000847-JP; Tue, 01 Apr 2025 13:12:17 +0000 Received: by outflank-mailman (input) for mailman id 934208; Tue, 01 Apr 2025 13:12:16 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzbMb-0000Od-JU for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 13:09:09 +0000 Received: from mail-ed1-x52c.google.com (mail-ed1-x52c.google.com [2a00:1450:4864:20::52c]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 7e3f2c1c-0efa-11f0-9ffb-bf95429c2676; Tue, 01 Apr 2025 15:09:07 +0200 (CEST) Received: by mail-ed1-x52c.google.com with SMTP id 4fb4d7f45d1cf-5e5c7d6b96fso10198523a12.3 for ; Tue, 01 Apr 2025 06:09:07 -0700 (PDT) Received: from localhost ([84.78.159.3]) by smtp.gmail.com with UTF8SMTPSA id a640c23a62f3a-ac71927b013sm774356166b.63.2025.04.01.06.09.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Apr 2025 06:09:06 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 7e3f2c1c-0efa-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1743512946; x=1744117746; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3Qwa4790XsBU40/HS4XW3tzOpxssCxzWLfWfhM2utiU=; b=BkvfiEE7gG+1K3C9XyJGMTrQg+FNHyl+MsDTN9zPCawRnuBV232J4lrMwk6eVzh4rS H+7kv35lKaHOCyl/b63ZMZznKXyQijbnk0Y+XMc90HWb47EcZfTpgx4DVcVKIgPDEhVv jN1ucFGRGeubeXmKUw5U8JulmsF5Y4Q6GPtkM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743512946; x=1744117746; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3Qwa4790XsBU40/HS4XW3tzOpxssCxzWLfWfhM2utiU=; b=JkLcV2X9wXb9WiDFg2cyJVwZdRcyyz43HQf8y6e4V3Z2U/i+vfsQoZZ4MgLYevCtxH wt+kSU00GI0e8ZsmCcwEazc7n4YswklEkK8j8+XSAwpdrF54mjlqu7iC4St8dKOGw0Bo oXXtipEdmjGaCWZ5mzVFz4o9M/Q1AIBajFZ1jRAZnU+XAOrbKDC0WtPFB1/SkenmmD+P A7ZuI1k7XP+x7y9aXwmJ3UHzcFRF5UEe9t/Og/S3h7lE5wnKKhevQtBsfpnncL1z+o0P VFwDXB1kf8pi8tzpbz2HaOPfsBlZhFGExPvF93M4k9h4A5zGzfRG86k1Xp7yesKbrVzL hcag== X-Gm-Message-State: AOJu0YwVg+sqoMl+t4bKwXrhwuhOtg75iNyx36VLZj6jaF7usj8IgGP+ phgve2XoA0dkQDwPRFQ5gNMUzUeVDlfTk9ViGcDMoFTk/FFB3iLBidL8mZacviV3+rrybMugqE9 R X-Gm-Gg: ASbGnct5LwZGfHkos4lixRAPMLV6dgb7RkvdwO+DL8B3IfLph9GX4IFcgQQ1w7+27v+ cV6kQ8SPaH10Z2B7AmRUFyyMVjaxWr7IREu8ehHshhYWQ0Ig8nqUxw9EM5AzVpvo1VSbcKH6TdY JymXxySlBO9T4e0RY4tUt3eMvpgO1uvvirQilWQ3XN/5ArRyrg7xSH1WXtYzwIX3j9TjlcSJWBs ZbJK8VwK/Er3+O4of2/Jhc+eezj4dNdWI9JB2juoFV/E9cKMwiEg3uGIVR78yxxzhoUcqnsoJ98 sK6j19PiMK65i7Apj3OrA2chAW5NXKpxiKpjVjMwisO0wyFDbiH+BPsyAftT X-Google-Smtp-Source: AGHT+IGaTL4+DNncckQbpL2w1mfIC0PN54mgxJ8UCHZmW+A0RvqhvxCvguiv22/squAYZqlGE4+Jag== X-Received: by 2002:a17:906:d551:b0:ac3:26ff:11a0 with SMTP id a640c23a62f3a-ac738bac990mr1068582266b.38.1743512946332; Tue, 01 Apr 2025 06:09:06 -0700 (PDT) From: Roger Pau Monne To: xen-devel@lists.xenproject.org Cc: Roger Pau Monne , "Daniel P. Smith" , =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= , Jan Beulich , Andrew Cooper Subject: [PATCH v2 09/11] x86/efi: avoid a relocation in efi_arch_post_exit_boot() Date: Tue, 1 Apr 2025 15:08:38 +0200 Message-ID: <20250401130840.72119-10-roger.pau@citrix.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250401130840.72119-1-roger.pau@citrix.com> References: <20250401130840.72119-1-roger.pau@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Instead of using the absolute __start_xen address, calculate it as an offset from the current instruction pointer. The relocation would be problematic if the loader has acknowledged the Xen image section attributes, and mapped .init.text with just read and execute permissions. No functional change intended. Signed-off-by: Roger Pau Monné --- xen/arch/x86/efi/efi-boot.h | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/efi/efi-boot.h b/xen/arch/x86/efi/efi-boot.h index 1d8902a9a724..c5cbf56cc0c4 100644 --- a/xen/arch/x86/efi/efi-boot.h +++ b/xen/arch/x86/efi/efi-boot.h @@ -266,7 +266,9 @@ static void __init noreturn efi_arch_post_exit_boot(void) /* Jump to higher mappings. */ "mov stack_start(%%rip), %%rsp\n\t" - "movabs $__start_xen, %[rip]\n\t" + "lea __start_xen(%%rip), %[rip]\n\t" + "add %[offset], %[rip]\n\t" + "push %[cs]\n\t" "push %[rip]\n\t" "lretq" @@ -274,7 +276,8 @@ static void __init noreturn efi_arch_post_exit_boot(void) [cr4] "+&r" (cr4) : [cr3] "r" (idle_pg_table), [cs] "i" (__HYPERVISOR_CS), - [ds] "r" (__HYPERVISOR_DS) + [ds] "r" (__HYPERVISOR_DS), + [offset] "r" (__XEN_VIRT_START - xen_phys_start) : "memory" ); unreachable(); } -- 2.48.1 From xen-devel-bounces@lists.xenproject.org Tue Apr 01 13:14:04 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 13:14:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934262.1336026 (Exim 4.92) (envelope-from ) id 1tzbRH-0001Eg-4g; Tue, 01 Apr 2025 13:13:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 934262.1336026; Tue, 01 Apr 2025 13:13:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzbRH-0001ES-0p; Tue, 01 Apr 2025 13:13:59 +0000 Received: by outflank-mailman (input) for mailman id 934262; Tue, 01 Apr 2025 13:13:57 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzbRF-0001ED-N0 for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 13:13:57 +0000 Received: from mail-wm1-x331.google.com (mail-wm1-x331.google.com [2a00:1450:4864:20::331]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 295648e5-0efb-11f0-9ffb-bf95429c2676; Tue, 01 Apr 2025 15:13:54 +0200 (CEST) Received: by mail-wm1-x331.google.com with SMTP id 5b1f17b1804b1-43cf05f0c3eso37073875e9.0 for ; Tue, 01 Apr 2025 06:13:54 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Smith" , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , Andrew Cooper , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Shawn Anastasio , Alistair Francis , Bob Eshleman , Connor Davis , Oleksii Kurochko , xen-devel@lists.xenproject.org References: <20250401130840.72119-1-roger.pau@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20250401130840.72119-1-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 01.04.2025 15:08, Roger Pau Monne wrote: > Hello, > > The following series aim to remove the presence of any write and execute > section in the PE Xen image. This is required to support the NX > compatible flag in the PE header. By the end of the series the > resulting PE image has no relocations that apply to text sections, as > text sections are strictly mapped read-execute only. Xen itself > attempting to apply relocations to text would result in page-faults. > > A smoke test is added to Gitlab to ensure the PE NX support doesn't > regress. > > Only patches 5 and 10 are carried over from v1, the rest are new. > > Thanks, Roger. > > Roger Pau Monne (11): > automation/dockers: add to README how to rebuild all containers > x86/mkreloc: fix obtaining PE image base address > x86/mkreloc: use the string table to get names > x86/mkreloc: print the linear address of relocations to read-only > sections > xen: remove -N from the linker command line > x86/efi: discard .text.header for PE binary > x86/efi: discard multiboot related entry code for PE binary > x86/boot: place trampoline code in a non-execute section > x86/efi: avoid a relocation in efi_arch_post_exit_boot() > x86/efi: do not merge all .init sections > automation/x86: add a xen.efi test with a strict NX OVMF build > > automation/build/README.md | 7 ++ > automation/build/fedora/41-x86_64.dockerfile | 5 ++ > automation/gitlab-ci/test.yaml | 9 +++ > automation/scripts/qemu-smoke-x86-64-efi.sh | 22 +++++- > xen/arch/arm/Makefile | 6 +- > xen/arch/ppc/Makefile | 6 +- > xen/arch/riscv/Makefile | 6 +- > xen/arch/x86/Makefile | 12 +-- > xen/arch/x86/boot/head.S | 3 +- > xen/arch/x86/efi/efi-boot.h | 7 +- > xen/arch/x86/efi/mkreloc.c | 77 +++++++++++++++++--- > xen/arch/x86/xen.lds.S | 20 +++-- > 12 files changed, 138 insertions(+), 42 deletions(-) >From titles and diffstat (all Makefile changes being covered by patch 05) it looks like you still don't add passing --nxcompat to the linker. Is that intentionally left out here? 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Tue, 01 Apr 2025 06:18:58 -0700 (PDT) Message-ID: <9fb343fe-8bbf-4af9-a204-46eef4bd2aac@suse.com> Date: Tue, 1 Apr 2025 15:18:57 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 06/11] x86/efi: discard .text.header for PE binary To: Roger Pau Monne Cc: Andrew Cooper , xen-devel@lists.xenproject.org References: <20250401130840.72119-1-roger.pau@citrix.com> <20250401130840.72119-7-roger.pau@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20250401130840.72119-7-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 01.04.2025 15:08, Roger Pau Monne wrote: > The multiboot headers are not consumed in the PE binary, hence discard them > in the linker script when doing a PE build. > > That removes some relocations that otherwise appear due to the usage of the > start and __efi64_mb2_start symbols in the multiboot2 header. > > No functional change intended. > > Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich > --- > We could also place the multiboot header in it's own isolated section and > skip such section for relocations generation in mkreloc, but it seems best > to just remove the code if it's unused. I agree. I'd like to mention that I recall people intending to try to make xen.efi usable with an MB loader. Nothing ever came of that, so if anyone still wanted to pursue that route, they'd need to undo / redo what you're doing here. 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Tue, 01 Apr 2025 06:22:31 -0700 (PDT) Message-ID: Date: Tue, 1 Apr 2025 14:22:30 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 06/11] x86/efi: discard .text.header for PE binary To: Jan Beulich , Roger Pau Monne Cc: xen-devel@lists.xenproject.org References: <20250401130840.72119-1-roger.pau@citrix.com> <20250401130840.72119-7-roger.pau@citrix.com> <9fb343fe-8bbf-4af9-a204-46eef4bd2aac@suse.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <9fb343fe-8bbf-4af9-a204-46eef4bd2aac@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 01/04/2025 2:18 pm, Jan Beulich wrote: > On 01.04.2025 15:08, Roger Pau Monne wrote: >> The multiboot headers are not consumed in the PE binary, hence discard them >> in the linker script when doing a PE build. >> >> That removes some relocations that otherwise appear due to the usage of the >> start and __efi64_mb2_start symbols in the multiboot2 header. >> >> No functional change intended. >> >> Signed-off-by: Roger Pau Monné > Reviewed-by: Jan Beulich > >> --- >> We could also place the multiboot header in it's own isolated section and >> skip such section for relocations generation in mkreloc, but it seems best >> to just remove the code if it's unused. > I agree. I'd like to mention that I recall people intending to try to make > xen.efi usable with an MB loader. Nothing ever came of that, so if anyone > still wanted to pursue that route, they'd need to undo / redo what you're > doing here. It was Frediano, and for this same task (Host UEFI SecureBoot). ~Andrew From xen-devel-bounces@lists.xenproject.org Tue Apr 01 13:25:30 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 13:25:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934331.1336058 (Exim 4.92) (envelope-from ) id 1tzbcL-00068v-Kt; Tue, 01 Apr 2025 13:25:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 934331.1336058; Tue, 01 Apr 2025 13:25:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzbcL-00068o-I9; Tue, 01 Apr 2025 13:25:25 +0000 Received: by outflank-mailman (input) for mailman id 934331; Tue, 01 Apr 2025 13:25:24 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzbcK-00068i-7F for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 13:25:24 +0000 Received: from mail-wr1-x433.google.com (mail-wr1-x433.google.com [2a00:1450:4864:20::433]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id c368a62e-0efc-11f0-9ffb-bf95429c2676; Tue, 01 Apr 2025 15:25:22 +0200 (CEST) Received: by mail-wr1-x433.google.com with SMTP id ffacd0b85a97d-391342fc1f6so4936511f8f.1 for ; Tue, 01 Apr 2025 06:25:22 -0700 (PDT) Received: from [192.168.1.183] (host-92-26-98-202.as13285.net. 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Tue, 01 Apr 2025 06:25:21 -0700 (PDT) Message-ID: <2ad947f4-3a04-4461-a6ec-203ec350de4b@citrix.com> Date: Tue, 1 Apr 2025 14:25:20 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 01/11] automation/dockers: add to README how to rebuild all containers To: Roger Pau Monne , xen-devel@lists.xenproject.org Cc: Doug Goldstein , Stefano Stabellini References: <20250401130840.72119-1-roger.pau@citrix.com> <20250401130840.72119-2-roger.pau@citrix.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <20250401130840.72119-2-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 01/04/2025 2:08 pm, Roger Pau Monne wrote: > Document in the README how to rebuild all containers. This is helpful when > populating a local docker registry for testing purposes. > > Signed-off-by: Roger Pau Monné Acked-by: Andrew Cooper I'm working on extending Anthony's container-rebuild pipeline to do this too, but that's not quite ready yet. ~Andrew From xen-devel-bounces@lists.xenproject.org Tue Apr 01 13:27:09 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 13:27:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934342.1336069 (Exim 4.92) (envelope-from ) id 1tzbdz-0006eP-Vq; Tue, 01 Apr 2025 13:27:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 934342.1336069; Tue, 01 Apr 2025 13:27:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzbdz-0006eI-Sp; Tue, 01 Apr 2025 13:27:07 +0000 Received: by outflank-mailman (input) for mailman id 934342; Tue, 01 Apr 2025 13:27:06 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzbdy-0006e9-QZ for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 13:27:06 +0000 Received: from mail-pj1-x102f.google.com (mail-pj1-x102f.google.com [2607:f8b0:4864:20::102f]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 0027a2ed-0efd-11f0-9ffb-bf95429c2676; Tue, 01 Apr 2025 15:27:05 +0200 (CEST) Received: by mail-pj1-x102f.google.com with SMTP id 98e67ed59e1d1-301d6cbbd5bso8893384a91.3 for ; Tue, 01 Apr 2025 06:27:04 -0700 (PDT) Received: from localhost ([84.78.159.3]) by smtp.gmail.com with UTF8SMTPSA id d9443c01a7336-2291eee0bfdsm88335955ad.72.2025.04.01.06.27.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Apr 2025 06:27:02 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 0027a2ed-0efd-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1743514023; x=1744118823; darn=lists.xenproject.org; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:from:to:cc:subject:date:message-id:reply-to; bh=u/P6zE2mL8Ng1bH7wNcqBTKLcot4sfQX+ZxLrcuajBU=; b=UgFMmLt9ZrrBd+wIXoWd6BDCAZr+yN+uIFum3BUhmoIkj9Cuyco2ZJnBbHDwli8Nab rCRyvANUMZ81yoCK0mf7BjdzPxHu88w5JC6x0AoX//fHZ49QAZ39gS8qdVh/LT9aPteD 0CGf9YhtzT6akvIcz/GVg/apC1fH1rBOAy+1E= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743514023; x=1744118823; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=u/P6zE2mL8Ng1bH7wNcqBTKLcot4sfQX+ZxLrcuajBU=; b=ut4p6Lju/Im92r/RarZoiPT9s/3cP0zMKrbhkR9kIZn1rvfsrMMiheH5q1KSleVIIM oSk3ig9bk4xUo2dexLtnNyX/uvh3HeCeWZq2/mXSu9Zngzn/7ywUheExjygdZ2yi9Vji BV6V65Lb5DcNMBeKbs881PP34ZuYBqKxp45EM+QBa1F6wBwe0FpEsv9q3z/r/k2P1lhT Xv8MSfvPAADsPmH/tL1Ie5dLXBRooOb0JtiT1RGfMJOFoX9qW1NPRK0aEPR27YhLMyN3 RN0dHF8QXikpbftjBEQ2g+BbTE/8rEbjxnJbnwSNVfpzLHLmizVaEHMb74s3EDyE1Nwy Q3Uw== X-Forwarded-Encrypted: i=1; AJvYcCWOr7RnbY52CwTRrqPo80RZL84BvxVa0rAzTldFn4EeEOZ8xVvyI+LCx5TDHn1dTCrtBqzYQVa5A0o=@lists.xenproject.org X-Gm-Message-State: AOJu0Yyj5j1vOD2A8aomkf0J9HVVC6N/Y0hlIUtdHGqM0yowk68nKBoM zXadbyTbcidys8JdjalxdKmu0FFXPrmBzXtdeuHW31lPlz0cv66e2euRCulcnBE= X-Gm-Gg: ASbGncuvYNUlKTg6OB4be/cfeKIn5LRU7l5te+mOYQCC2qirUzgjSO8+O/3TCVJucv7 v984CET+LPcIZ0iwlhg8DdkYhnwXMgUP2NaYnZpAOGvEpfsPpNmErYT4GSA2psmPIoPOWuBvn51 9xWlGJSOrk84ghfq4dPAusOmcXBbebFtfcKvwlpl6f+s+S2VVjgx+/3VtkUAZtg17koV/3Kpw5p ZYRP6FezCwqUursz8x1FjK6iO5DErQmqIcE+LuGvjFAlOpfbDGOCV0uM41jU4Cr4N9lQ/JxUvpP ZLvGekE5xfsgRIdzG+asUV05RVJo9WXDLd1X2cccgQGTxGwPgw== X-Google-Smtp-Source: AGHT+IFz0phDLuDwLdRjon3b8HeLoAsC6aO+gfIyHRul27N+fvrvbn040xWYs3no5Q4Yrq/vOmgzJQ== X-Received: by 2002:a17:90b:1f8b:b0:2ff:6608:78cd with SMTP id 98e67ed59e1d1-30531f928cdmr21437266a91.9.1743514023425; Tue, 01 Apr 2025 06:27:03 -0700 (PDT) Date: Tue, 1 Apr 2025 15:26:58 +0200 From: Roger Pau =?utf-8?B?TW9ubsOp?= To: Jan Beulich Cc: Doug Goldstein , Stefano Stabellini , "Daniel P. Smith" , Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= , Andrew Cooper , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Shawn Anastasio , Alistair Francis , Bob Eshleman , Connor Davis , Oleksii Kurochko , xen-devel@lists.xenproject.org Subject: Re: [PATCH v2 00/11] x86/EFI: prevent write-execute sections Message-ID: References: <20250401130840.72119-1-roger.pau@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: On Tue, Apr 01, 2025 at 03:13:52PM +0200, Jan Beulich wrote: > On 01.04.2025 15:08, Roger Pau Monne wrote: > > Hello, > > > > The following series aim to remove the presence of any write and execute > > section in the PE Xen image. This is required to support the NX > > compatible flag in the PE header. By the end of the series the > > resulting PE image has no relocations that apply to text sections, as > > text sections are strictly mapped read-execute only. Xen itself > > attempting to apply relocations to text would result in page-faults. > > > > A smoke test is added to Gitlab to ensure the PE NX support doesn't > > regress. > > > > Only patches 5 and 10 are carried over from v1, the rest are new. > > > > Thanks, Roger. > > > > Roger Pau Monne (11): > > automation/dockers: add to README how to rebuild all containers > > x86/mkreloc: fix obtaining PE image base address > > x86/mkreloc: use the string table to get names > > x86/mkreloc: print the linear address of relocations to read-only > > sections > > xen: remove -N from the linker command line > > x86/efi: discard .text.header for PE binary > > x86/efi: discard multiboot related entry code for PE binary > > x86/boot: place trampoline code in a non-execute section > > x86/efi: avoid a relocation in efi_arch_post_exit_boot() > > x86/efi: do not merge all .init sections > > automation/x86: add a xen.efi test with a strict NX OVMF build > > > > automation/build/README.md | 7 ++ > > automation/build/fedora/41-x86_64.dockerfile | 5 ++ > > automation/gitlab-ci/test.yaml | 9 +++ > > automation/scripts/qemu-smoke-x86-64-efi.sh | 22 +++++- > > xen/arch/arm/Makefile | 6 +- > > xen/arch/ppc/Makefile | 6 +- > > xen/arch/riscv/Makefile | 6 +- > > xen/arch/x86/Makefile | 12 +-- > > xen/arch/x86/boot/head.S | 3 +- > > xen/arch/x86/efi/efi-boot.h | 7 +- > > xen/arch/x86/efi/mkreloc.c | 77 +++++++++++++++++--- > > xen/arch/x86/xen.lds.S | 20 +++-- > > 12 files changed, 138 insertions(+), 42 deletions(-) > > From titles and diffstat (all Makefile changes being covered by patch 05) > it looks like you still don't add passing --nxcompat to the linker. Is > that intentionally left out here? Hm, and I see I also failed to add (the already RB patch) "xen/build: warn about RWX load segments". nxcompat should be enabled by default I think? I can of course make it explicit by adding to the PE link command line. Thanks, Roger. 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bh=vLMzIdnhM/XKumo1BdHqwMW0a8QccBItyEYyTYz+sQk=; b=luoiqQ5D7iIqIGqcwBXtpODWlNbkVN25qL5YwzlNOHCdS7zo/WcJRafZf/dd6HGy/q8H8Bld61MsxDxNj4q3gM+h3ZdlpXpJeM0ooTO1xLUk4uI3Tm3GezVirlPqhOXnJbvz63diHAD5gWBx4QoSyUjH7aur4gz8mRsQ+p3gm88= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Message-ID: <1f685c7c-0b63-4051-ad6c-003b262c4315@amd.com> Date: Tue, 1 Apr 2025 09:29:29 -0400 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 4/6] xen/arm: dom0less seed xenstore grant table entry To: Jan Beulich CC: Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , , Juergen Gross References: <20250331214321.205331-1-jason.andryuk@amd.com> <20250331214321.205331-5-jason.andryuk@amd.com> <6765d129-66dc-48d9-aaac-2b973edfda80@suse.com> Content-Language: en-US From: Jason Andryuk In-Reply-To: <6765d129-66dc-48d9-aaac-2b973edfda80@suse.com> Content-Type: text/plain; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Apr 2025 13:29:34.4244 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a3a4a5ca-6f17-4dc4-dcff-08dd71213e02 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF0001AB72.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH1PPF4C9628624 On 2025-04-01 08:16, Jan Beulich wrote: > On 31.03.2025 23:43, Jason Andryuk wrote: >> xenstored maps other domains' xenstore pages. Currently this relies on >> init-dom0less or xl to seed the grants from Dom0. With split >> hardware/control/xenstore domains, this is problematic since we don't >> want the hardware domain to be able to map other domains' resources >> without their permission. Instead have the hypervisor seed the grant >> table entry for every dom0less domain. The grant is then accessible as >> normal. > > Yet aiui the original idea was to specifically not do this in the hypervisor. > I agree it shouldn't be the hardware domain, but what's wrong with having the > control domain do that? It is what is responsible for creating new domains as > well. The question of where to do that when there's no control domain must > also have been solved already (without me knowing the answer), as that's > where init-dom0less must be running. dom0less does not allow configuring a domU to have xenstore without using dom0 today. This series changes the dependency to the xenstore domain. I want to move away from relying on the control domain to set up xenstore connections. Domain boot can achieve more parallelism if xenstore domain can independently configure its connections. If xenstore connections need to wait until dom0/control userspace runs, that is a measurable delay. From the permission side, with a preseeded grant, and the event channel places in the xenstore_domain_interface page, a xenstore domain can connect and introduce existing domains when it starts up without needing additional permissions. Generally, I'm looking at making xenstored perform more configuration on its own. It doesn't matter for dom0, but it will help for dom0less/Hyperlaunch. Seeding grants from the hypervisor is a small change, but it helps remove dependencies for xenstore. >> This works with C xenstored. OCaml xenstored does not use grants and >> would fail to foreign map the page. > > From the sentence it's not clear whether this is unchanged behavior or > a deliberate regression. I was trying to highlight existing compatibility. xenstored uses grants, so it can take advantage of the pre-seeded grant and therefore does not need privilege to map foreign pages. OCaml does not use grants, so this seeding is irrelevant. With a combined hardware|xenstore domain, C xenstored using grants works, but Ocaml does not. >> --- a/xen/arch/arm/dom0less-build.c >> +++ b/xen/arch/arm/dom0less-build.c >> @@ -865,6 +865,10 @@ static void __init initialize_domU_xenstore(void) >> rc = alloc_xenstore_evtchn(d); >> if ( rc < 0 ) >> panic("%pd: Failed to allocate xenstore_evtchn\n", d); >> + >> + if ( gfn != ~0ULL ) > > Is this an odd open-coding of INVALID_GFN? And even if not - why ULL when > "gfn" is unsigned long? The way you have it the condition will always be > false on Arm32, if I'm not mistaken. I'll have to double check that. Thanks. >> --- a/xen/common/grant_table.c >> +++ b/xen/common/grant_table.c >> @@ -4346,6 +4346,21 @@ static void gnttab_usage_print(struct domain *rd) >> printk("no active grant table entries\n"); >> } >> >> +#ifdef CONFIG_DOM0LESS_BOOT >> +void __init gnttab_seed_entry(const struct domain *d, unsigned int idx, >> + domid_t be_domid, uint64_t frame, >> + unsigned int flags) >> +{ >> + const struct grant_table *gt = d->grant_table; >> + >> + ASSERT(!d->creation_finished); > > While I don't mind the assertion, it's a little funny to see such in an > __init function. This check was added in response to v1 comment. Yes, I too considered just relying on __init, but the ASSERT explicitly checks the desired property holds. >> + ASSERT(gt->gt_version == 1); >> + shared_entry_v1(gt, idx).flags = flags; > > Does this really need to be a function parameter? The sole caller passes > a constant (GTF_permit_access). I suppose it could be dropped. The toolstack side passes flags, which I mirrored when writing this. >> --- a/xen/include/xen/grant_table.h >> +++ b/xen/include/xen/grant_table.h >> @@ -45,6 +45,11 @@ void grant_table_destroy( >> struct domain *d); >> void grant_table_init_vcpu(struct vcpu *v); >> >> +/* Seed a gnttab entry for Hyperlaunch/dom0less. */ >> +void __init gnttab_seed_entry(const struct domain *d, unsigned int idx, > > No __init on declarations please. They have no effect (as long as the definition > properly has the attribute) and hence are only at risk of going stale. Oh, okay. I thought they were necessary, but clear I am wrong. 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charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Tue, Apr 01, 2025 at 09:51:53AM +0200, Jan Beulich wrote: > On 01.04.2025 08:59, Roger Pau Monné wrote: > > On Mon, Mar 31, 2025 at 09:34:24PM +0000, dmkhn@proton.me wrote: > >> --- a/xen/arch/x86/domain.c > >> +++ b/xen/arch/x86/domain.c > >> @@ -798,13 +798,12 @@ int arch_domain_create(struct domain *d, > >> { > >> if ( !opt_allow_unsafe ) > >> { > >> - printk(XENLOG_G_ERR "Xen does not allow DomU creation on this CPU" > >> - " for security reasons.\n"); > >> + printk(XENLOG_G_ERR "%pd: Xen does not allow DomU creation on this CPU" > >> + " for security reasons.\n", d); > > > > Since you are already touching this, I would switch to gprintk, and > > avoid splitting the lines: > > > > gprintk(XENLOG_ERR, > > "%pd: Xen does not allow DomU creation on this CPU for security reasons.\n", > > d); > > > > Same for the other messages below. > > IOW you see value in also logging current->domain? I always forget that gprintk also logs current->domain, my suggestion was so that XENLOG_ERR instead of XENLOG_G_ERR was used, as it's more compact. I think I withdraw my suggestion, there's likely very little help from printing current->domain in this context. It's either the IDLE domain for initial domain build, or the control domain otherwise. Thanks, Roger. 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Tue, 01 Apr 2025 06:49:32 -0700 (PDT) Message-ID: <3fd56964-918a-49f7-a0fe-a1c6b8633af6@citrix.com> Date: Tue, 1 Apr 2025 14:49:30 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 08/11] x86/boot: place trampoline code in a non-execute section To: Roger Pau Monne , xen-devel@lists.xenproject.org Cc: Jan Beulich References: <20250401130840.72119-1-roger.pau@citrix.com> <20250401130840.72119-9-roger.pau@citrix.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <20250401130840.72119-9-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 01/04/2025 2:08 pm, Roger Pau Monne wrote: > The trampoline code is never executed in the position placed by the > loader. It's first copied to the low 1MB, and always executed from > there. > > Move the trampoline code from being in .init.text section into > .init.data, so it's not in an executable section. This allows applying > the relocations safely against a non-executable (and thus non-read only) > section, and then copy the relocated trampoline to the low 1MB. Note > that the trampoline code is placed on an .init section, so zapped after > boot has finished. > > No functional change intended. > > Signed-off-by: Roger Pau Monné > --- > An alternative approach is to apply the relocations after having copied the > trampoline to the low 1MB, but that still generates relocations in mkreloc, > which is not helpful for the goal of having no relocations applied to > read-execute code sections. This approach however places code in a data > section, which might cause issues when debugging it. I, probably most of all, spend a reasonable amount of time disassembling the trampoline. I really would prefer to keep it in an executable section. What are the options with relocations?  Can't we simply drop any in the trampoline region? ~Andrew From xen-devel-bounces@lists.xenproject.org Tue Apr 01 13:58:29 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 13:58:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934403.1336108 (Exim 4.92) (envelope-from ) id 1tzc8H-00014x-VT; Tue, 01 Apr 2025 13:58:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 934403.1336108; Tue, 01 Apr 2025 13:58:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzc8H-00014q-Sy; Tue, 01 Apr 2025 13:58:25 +0000 Received: by outflank-mailman (input) for mailman id 934403; Tue, 01 Apr 2025 13:58:24 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzc8G-00014k-Pg for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 13:58:24 +0000 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [2a00:1450:4864:20::336]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 6023f332-0f01-11f0-9ea7-5ba50f476ded; Tue, 01 Apr 2025 15:58:23 +0200 (CEST) Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-4394036c0efso37831505e9.2 for ; Tue, 01 Apr 2025 06:58:23 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Smith" , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , Andrew Cooper , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Shawn Anastasio , Alistair Francis , Bob Eshleman , Connor Davis , Oleksii Kurochko , xen-devel@lists.xenproject.org References: <20250401130840.72119-1-roger.pau@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 01.04.2025 15:26, Roger Pau Monné wrote: > On Tue, Apr 01, 2025 at 03:13:52PM +0200, Jan Beulich wrote: >> On 01.04.2025 15:08, Roger Pau Monne wrote: >>> Hello, >>> >>> The following series aim to remove the presence of any write and execute >>> section in the PE Xen image. This is required to support the NX >>> compatible flag in the PE header. By the end of the series the >>> resulting PE image has no relocations that apply to text sections, as >>> text sections are strictly mapped read-execute only. Xen itself >>> attempting to apply relocations to text would result in page-faults. >>> >>> A smoke test is added to Gitlab to ensure the PE NX support doesn't >>> regress. >>> >>> Only patches 5 and 10 are carried over from v1, the rest are new. >>> >>> Thanks, Roger. >>> >>> Roger Pau Monne (11): >>> automation/dockers: add to README how to rebuild all containers >>> x86/mkreloc: fix obtaining PE image base address >>> x86/mkreloc: use the string table to get names >>> x86/mkreloc: print the linear address of relocations to read-only >>> sections >>> xen: remove -N from the linker command line >>> x86/efi: discard .text.header for PE binary >>> x86/efi: discard multiboot related entry code for PE binary >>> x86/boot: place trampoline code in a non-execute section >>> x86/efi: avoid a relocation in efi_arch_post_exit_boot() >>> x86/efi: do not merge all .init sections >>> automation/x86: add a xen.efi test with a strict NX OVMF build >>> >>> automation/build/README.md | 7 ++ >>> automation/build/fedora/41-x86_64.dockerfile | 5 ++ >>> automation/gitlab-ci/test.yaml | 9 +++ >>> automation/scripts/qemu-smoke-x86-64-efi.sh | 22 +++++- >>> xen/arch/arm/Makefile | 6 +- >>> xen/arch/ppc/Makefile | 6 +- >>> xen/arch/riscv/Makefile | 6 +- >>> xen/arch/x86/Makefile | 12 +-- >>> xen/arch/x86/boot/head.S | 3 +- >>> xen/arch/x86/efi/efi-boot.h | 7 +- >>> xen/arch/x86/efi/mkreloc.c | 77 +++++++++++++++++--- >>> xen/arch/x86/xen.lds.S | 20 +++-- >>> 12 files changed, 138 insertions(+), 42 deletions(-) >> >> From titles and diffstat (all Makefile changes being covered by patch 05) >> it looks like you still don't add passing --nxcompat to the linker. Is >> that intentionally left out here? > > Hm, and I see I also failed to add (the already RB patch) "xen/build: > warn about RWX load segments". > > nxcompat should be enabled by default I think? I can of course make > it explicit by adding to the PE link command line. It's not always the default for GNU ld: #define DEFAULT_DLL_CHARACTERISTICS (${cygwin_behavior} ? 0 : \ IMAGE_DLL_CHARACTERISTICS_DYNAMIC_BASE \ | IMAGE_DLL_CHARACTERISTICS_HIGH_ENTROPY_VA \ | IMAGE_DLL_CHARACTERISTICS_NX_COMPAT) And even that I'm not sure is entirely right. I think it goes from the assumption that everything that isn't Cygwin is MinGW. EFI, however, is yet something else. I'm further unconvinced that for any environment the linker may reasonably set this bit without the programmer's consent. But of course that's also a matter of how things are documented - there's a command line option after all to turn off the flag. Plus there's yet another concern I have. Historical knowledge (i.e. may no longer be true) of mine is that the DLL characteristics field is applicable only for binaries which have the IMAGE_FILE_DLL flag set in the respective header field. EFI binaries aren't libraries, though. Otoh GNU ld, judging from source code, apparently doesn't set the flag even for DLLs (or I'm simply failing to spot the respective use of IMAGE_FILE_DLL). Whereas going from observations I find the bit is set in DLLs of the Cygwin installation I have sitting around somewhere. (IOW - I'm confused.) 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Smith" , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , Jan Beulich References: <20250401130840.72119-1-roger.pau@citrix.com> <20250401130840.72119-3-roger.pau@citrix.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <20250401130840.72119-3-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 01/04/2025 2:08 pm, Roger Pau Monne wrote: > The base address is in the pe32_opt_hdr, not after it. > > Previous to commit f7f42accbbbb the base was read standalone (as the first This is slightly awkward grammar. "Prior to commit" is the more normal phrasing. > field of pe32_opt_hdr). However with the addition of reading the full > contents of pe32_opt_hdr, such read will also fetch the base. The current > attempt to read the base after pe32_opt_hdr is bogus, and could only work > if the file cursor is repositioned using lseek(), but there's no need for > that as the data is already fetched in pe32_opt_hdr. > > Fixes: f7f42accbbbb ('x86/efi: Use generic PE/COFF structures') > Signed-off-by: Roger Pau Monné Reviewed-by: Andrew Cooper From xen-devel-bounces@lists.xenproject.org Tue Apr 01 14:05:41 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 14:05:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934430.1336128 (Exim 4.92) (envelope-from ) id 1tzcFF-0004ys-0b; Tue, 01 Apr 2025 14:05:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 934430.1336128; Tue, 01 Apr 2025 14:05:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzcFE-0004yl-Ty; Tue, 01 Apr 2025 14:05:36 +0000 Received: by outflank-mailman (input) for mailman id 934430; Tue, 01 Apr 2025 14:05:35 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzcFD-0004yf-SZ for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 14:05:35 +0000 Received: from mail-wr1-x430.google.com (mail-wr1-x430.google.com [2a00:1450:4864:20::430]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 5f8a5e47-0f02-11f0-9ffb-bf95429c2676; Tue, 01 Apr 2025 16:05:31 +0200 (CEST) Received: by mail-wr1-x430.google.com with SMTP id ffacd0b85a97d-39c0e0bc733so2979200f8f.1 for ; Tue, 01 Apr 2025 07:05:31 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 01 Apr 2025 07:05:31 -0700 (PDT) Message-ID: <921df02b-2a6f-4823-b118-d2683eaadb7d@suse.com> Date: Tue, 1 Apr 2025 16:05:29 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 4/6] xen/arm: dom0less seed xenstore grant table entry To: Jason Andryuk Cc: Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , xen-devel@lists.xenproject.org, Juergen Gross References: <20250331214321.205331-1-jason.andryuk@amd.com> <20250331214321.205331-5-jason.andryuk@amd.com> <6765d129-66dc-48d9-aaac-2b973edfda80@suse.com> <1f685c7c-0b63-4051-ad6c-003b262c4315@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <1f685c7c-0b63-4051-ad6c-003b262c4315@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 01.04.2025 15:29, Jason Andryuk wrote: > On 2025-04-01 08:16, Jan Beulich wrote: >> On 31.03.2025 23:43, Jason Andryuk wrote: >>> This works with C xenstored. OCaml xenstored does not use grants and >>> would fail to foreign map the page. >> >> From the sentence it's not clear whether this is unchanged behavior or >> a deliberate regression. > > I was trying to highlight existing compatibility. xenstored uses > grants, so it can take advantage of the pre-seeded grant and therefore > does not need privilege to map foreign pages. OCaml does not use > grants, so this seeding is irrelevant. With a combined > hardware|xenstore domain, C xenstored using grants works, but Ocaml does > not. IOW oxenstored works in all-mighty Dom0 only now, and that doesn't change? This would be fine. Re-wording the sentence to become unambiguous (towards possibly admitting to deliberately introduce a regression) would seem desirable though. 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Smith" , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , Andrew Cooper , xen-devel@lists.xenproject.org References: <20250401130840.72119-1-roger.pau@citrix.com> <20250401130840.72119-3-roger.pau@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20250401130840.72119-3-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 01.04.2025 15:08, Roger Pau Monne wrote: > The base address is in the pe32_opt_hdr, not after it. > > Previous to commit f7f42accbbbb the base was read standalone (as the first > field of pe32_opt_hdr). However with the addition of reading the full > contents of pe32_opt_hdr, such read will also fetch the base. The current > attempt to read the base after pe32_opt_hdr is bogus, and could only work > if the file cursor is repositioned using lseek(), but there's no need for > that as the data is already fetched in pe32_opt_hdr. Yes, but: How did things work at all then with this bug? Plus ... > --- a/xen/arch/x86/efi/mkreloc.c > +++ b/xen/arch/x86/efi/mkreloc.c > @@ -35,7 +35,6 @@ static unsigned int load(const char *name, int *handle, > struct mz_hdr mz_hdr; > struct pe_hdr pe_hdr; > struct pe32_opt_hdr pe32_opt_hdr; > - uint32_t base; > > if ( in < 0 || > read(in, &mz_hdr, sizeof(mz_hdr)) != sizeof(mz_hdr) ) > @@ -55,7 +54,6 @@ static unsigned int load(const char *name, int *handle, > if ( lseek(in, mz_hdr.peaddr, SEEK_SET) < 0 || > read(in, &pe_hdr, sizeof(pe_hdr)) != sizeof(pe_hdr) || > read(in, &pe32_opt_hdr, sizeof(pe32_opt_hdr)) != sizeof(pe32_opt_hdr) || > - read(in, &base, sizeof(base)) != sizeof(base) || > /* > * Luckily the image size field lives at the > * same offset for both formats. ... the code right below here has the same issue then, hasn't it? It's a SEEK_CUR that's being done, which I'm sure isn't going to land us at the image size field (which again we did read already). Using the full structure also renders questionable why it's (only) pe32_opt_hdr that we use here, and not (also) pe32plus_opt_hdr. I think this is a pretty clear indication that said earlier change better wouldn't have gone in without a proper R-b. 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Drop process_shm_chosen() and instead use process_shm() >> passing NULL as node parameter, which will result in searching for and >> using /chosen to find shm node (the DT full path search is done in >> process_shm() to avoid expensive lookup if !CONFIG_STATIC_SHM). This >> will simplify future handling of hw/control domain separation. >> >> Signed-off-by: Michal Orzel >> --- >> xen/arch/arm/domain_build.c | 2 +- >> xen/arch/arm/include/asm/static-shmem.h | 14 -------------- >> xen/arch/arm/static-shmem.c | 4 ++++ >> 3 files changed, 5 insertions(+), 15 deletions(-) >> >> diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c >> index 2b5b4331834f..7f9e17e1de4d 100644 >> --- a/xen/arch/arm/domain_build.c >> +++ b/xen/arch/arm/domain_build.c >> @@ -2325,7 +2325,7 @@ int __init construct_hwdom(struct kernel_info *kinfo) >> else >> allocate_memory(d, kinfo); >> >> - rc = process_shm_chosen(d, kinfo); >> + rc = process_shm(d, kinfo, NULL); >> if ( rc < 0 ) >> return rc; >> >> diff --git a/xen/arch/arm/include/asm/static-shmem.h b/xen/arch/arm/include/asm/static-shmem.h >> index fd0867c4f26b..94eaa9d500f9 100644 >> --- a/xen/arch/arm/include/asm/static-shmem.h >> +++ b/xen/arch/arm/include/asm/static-shmem.h >> @@ -18,14 +18,6 @@ int make_resv_memory_node(const struct kernel_info *kinfo, int addrcells, >> int process_shm(struct domain *d, struct kernel_info *kinfo, >> const struct dt_device_node *node); >> >> -static inline int process_shm_chosen(struct domain *d, >> - struct kernel_info *kinfo) >> -{ >> - const struct dt_device_node *node = dt_find_node_by_path("/chosen"); >> - >> - return process_shm(d, kinfo, node); >> -} >> - >> int process_shm_node(const void *fdt, int node, uint32_t address_cells, >> uint32_t size_cells); >> >> @@ -74,12 +66,6 @@ static inline int process_shm(struct domain *d, struct kernel_info *kinfo, >> return 0; >> } >> >> -static inline int process_shm_chosen(struct domain *d, >> - struct kernel_info *kinfo) >> -{ >> - return 0; >> -} >> - >> static inline void init_sharedmem_pages(void) {}; >> >> static inline int remove_shm_from_rangeset(const struct kernel_info *kinfo, >> diff --git a/xen/arch/arm/static-shmem.c b/xen/arch/arm/static-shmem.c >> index c74fa13d4847..cda90105923d 100644 >> --- a/xen/arch/arm/static-shmem.c >> +++ b/xen/arch/arm/static-shmem.c >> @@ -297,6 +297,10 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo, >> { >> struct dt_device_node *shm_node; >> >> + /* Hwdom case - shm node under /chosen */ >> + if ( !node ) >> + node = dt_find_node_by_path("/chosen"); >> + > > I would have 2 questions here: > - what if a NULL pointer is passed, wouldn't you wrongly look in the main device tree ? Do you mean from hwdom or domU path? In the former it is expected. In the latter it would be a bug given that there are several dozens of things that operate on this node being a /chosen/domU@X node before we pass node to process_shm(). > - isn't there a NULL case to be handled if dt_find_node_by_path does not find a result ? It wasn't validated before this change. It would be catched in early boot code so no worries. > > Couldn't the condition also check for the domain to be the hwdom ? I could although we have so many /chosen and hwdom asserts in the tree in the dom0 creation that I find it not necessary. ~Michal From xen-devel-bounces@lists.xenproject.org Tue Apr 01 14:23:50 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 14:23:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934469.1336158 (Exim 4.92) (envelope-from ) id 1tzcWr-0003Gx-Vf; Tue, 01 Apr 2025 14:23:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 934469.1336158; Tue, 01 Apr 2025 14:23:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzcWr-0003Gq-SI; Tue, 01 Apr 2025 14:23:49 +0000 Received: by outflank-mailman (input) for mailman id 934469; Tue, 01 Apr 2025 14:23:48 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzcWp-0002j6-VO for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 14:23:47 +0000 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [2a00:1450:4864:20::42b]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id ebd877f9-0f04-11f0-9ffb-bf95429c2676; Tue, 01 Apr 2025 16:23:46 +0200 (CEST) Received: by mail-wr1-x42b.google.com with SMTP id ffacd0b85a97d-3914bc3e01aso3173348f8f.2 for ; Tue, 01 Apr 2025 07:23:46 -0700 (PDT) Received: from [192.168.1.183] (host-92-26-98-202.as13285.net. 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Tue, 01 Apr 2025 07:23:45 -0700 (PDT) Message-ID: <993b1ca7-6ae7-4e10-974b-4c726306a88a@citrix.com> Date: Tue, 1 Apr 2025 15:23:44 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 11/11] automation/x86: add a xen.efi test with a strict NX OVMF build To: Roger Pau Monne , xen-devel@lists.xenproject.org Cc: Doug Goldstein , Stefano Stabellini References: <20250401130840.72119-1-roger.pau@citrix.com> <20250401130840.72119-12-roger.pau@citrix.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <20250401130840.72119-12-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 01/04/2025 2:08 pm, Roger Pau Monne wrote: > Such OVMF build does honor the PE sections attributes, and will not blindly > create all section mappings with read-write-execute permissions. > > Strict NX build is only available in the Fedora edk2-experimental > package, so add the required dependencies to run a QEMU EFI job on the > Fedora 41 container and use it for the test. > > Signed-off-by: Roger Pau Monné I guess this always has to go last? It will need a bit of careful gymnastics to deploy the new container prior to committing this patch, but it shouldn't be difficult. Alternatively, you can submit hunk 1 in a separate patch and we can get the new container deployed independently of the rest of the series. > diff --git a/automation/build/fedora/41-x86_64.dockerfile b/automation/build/fedora/41-x86_64.dockerfile > index 8032a2098632..84f366ac0643 100644 > --- a/automation/build/fedora/41-x86_64.dockerfile > +++ b/automation/build/fedora/41-x86_64.dockerfile > @@ -65,6 +65,11 @@ RUN < glib2-devel > pixman-devel > ninja-build > + > + # EFI Strict NX test > + qemu-system-x86 > + edk2-experimental > + expect Please could this follow the pattern in debian. # for test phase, qemu-smoke-* jobs expect qemu-system-x86 # for *-efi-strictnx edk2-experimental > diff --git a/automation/scripts/qemu-smoke-x86-64-efi.sh b/automation/scripts/qemu-smoke-x86-64-efi.sh > index 7572722be6e5..fbb662f1a756 100755 > --- a/automation/scripts/qemu-smoke-x86-64-efi.sh > +++ b/automation/scripts/qemu-smoke-x86-64-efi.sh > @@ -4,6 +4,7 @@ set -ex -o pipefail > > # variant should be either pv or pvh > variant=$1 # mode should be nothing, or strict Also, I'd suggest using mode=strictnx here as it matches both the test name and the OVMF file name. Assuming you're ok with these changes, Reviewed-by: Andrew Cooper (however you end up splitting). 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Tue, 01 Apr 2025 07:29:14 -0700 (PDT) Message-ID: <3b858ed2-7d89-4208-a4c1-e71600897c1d@suse.com> Date: Tue, 1 Apr 2025 16:29:13 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 15/19] xen/sysctl: wrap around XEN_SYSCTL_physinfo To: Penny Zheng Cc: xen-devel@lists.xenproject.org, ray.huang@amd.com, Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Alistair Francis , Bob Eshleman , Connor Davis , Oleksii Kurochko , Stefano Stabellini References: <20250326055053.3313146-1-Penny.Zheng@amd.com> <20250326055053.3313146-16-Penny.Zheng@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 29.03.2025 01:13, Stefano Stabellini wrote: > On Wed, 26 Mar 2025, Penny Zheng wrote: >> The following functions are only used to deal with XEN_SYSCTL_physinfo, >> then they shall be wrapped: >> - arch_do_physinfo >> - get_outstanding_claims >> >> Signed-off-by: Penny Zheng > > Reviewed-by: Stefano Stabellini With earlier, series-wide nit taken care of here: Acked-by: Jan Beulich Jan From xen-devel-bounces@lists.xenproject.org Tue Apr 01 14:46:46 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 14:46:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934497.1336179 (Exim 4.92) (envelope-from ) id 1tzcsy-0000zm-Vr; Tue, 01 Apr 2025 14:46:40 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 934497.1336179; Tue, 01 Apr 2025 14:46:40 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzcsy-0000zf-Sn; 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Tue, 01 Apr 2025 07:46:38 -0700 (PDT) Message-ID: <33b166be-21db-473e-a59a-3779436c0494@suse.com> Date: Tue, 1 Apr 2025 16:46:36 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 18/19] xen/sysctl: wrap around arch-specific arch_do_sysctl To: Penny Zheng Cc: ray.huang@amd.com, Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Alistair Francis , Bob Eshleman , Connor Davis , Oleksii Kurochko , Stefano Stabellini , Sergiy Kibrik , xen-devel@lists.xenproject.org References: <20250326055053.3313146-1-Penny.Zheng@amd.com> <20250326055053.3313146-19-Penny.Zheng@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20250326055053.3313146-19-Penny.Zheng@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 26.03.2025 06:50, Penny Zheng wrote: > Function arch_do_sysctl is to perform arch-specific sysctl op. > Some functions, like psr_get_info for x86, DTB overlay support for arm, > are solely available through sysctl op, then they all shall be wrapped > with CONFIG_SYSCTL > Also, remove all #ifdef CONFIG_SYSCTL-s in arch-specific sysctl.c, as > we put the guardian in Makefile for the whole file. > > Signed-off-by: Stefano Stabellini > Signed-off-by: Sergiy Kibrik > Signed-off-by: Penny Zheng > --- > - use "depends on" for config OVERLAY_DTB > - no need to wrap declaration > - add transient #ifdef in sysctl.c for correct compilation > --- > xen/arch/arm/Kconfig | 1 + > xen/arch/arm/Makefile | 2 +- > xen/arch/arm/sysctl.c | 2 -- > xen/arch/riscv/stubs.c | 2 +- > xen/arch/x86/Makefile | 2 +- > xen/arch/x86/psr.c | 18 ++++++++++++++++++ > xen/arch/x86/sysctl.c | 2 -- > xen/common/sysctl.c | 2 ++ > 8 files changed, 24 insertions(+), 7 deletions(-) > > diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig > index ffdff1f0a3..aa1b4a6e6b 100644 > --- a/xen/arch/arm/Kconfig > +++ b/xen/arch/arm/Kconfig > @@ -141,6 +141,7 @@ config HAS_ITS > > config OVERLAY_DTB > bool "DTB overlay support (UNSUPPORTED)" if UNSUPPORTED > + depends on SYSCTL > help > Dynamic addition/removal of Xen device tree nodes using a dtbo. > > diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile > index 4837ad467a..7c6015b84d 100644 > --- a/xen/arch/arm/Makefile > +++ b/xen/arch/arm/Makefile > @@ -54,7 +54,7 @@ obj-y += smpboot.o > obj-$(CONFIG_STATIC_EVTCHN) += static-evtchn.init.o > obj-$(CONFIG_STATIC_MEMORY) += static-memory.init.o > obj-$(CONFIG_STATIC_SHM) += static-shmem.init.o > -obj-y += sysctl.o > +obj-$(CONFIG_SYSCTL) += sysctl.o > obj-y += time.o > obj-y += traps.o > obj-y += vcpreg.o > diff --git a/xen/arch/arm/sysctl.c b/xen/arch/arm/sysctl.c > index 2d350b700a..32cab4feff 100644 > --- a/xen/arch/arm/sysctl.c > +++ b/xen/arch/arm/sysctl.c > @@ -15,7 +15,6 @@ > #include > #include > > -#ifdef CONFIG_SYSCTL > void arch_do_physinfo(struct xen_sysctl_physinfo *pi) > { > pi->capabilities |= XEN_SYSCTL_PHYSCAP_hvm | XEN_SYSCTL_PHYSCAP_hap; > @@ -23,7 +22,6 @@ void arch_do_physinfo(struct xen_sysctl_physinfo *pi) > pi->arch_capabilities |= MASK_INSR(sve_encode_vl(get_sys_vl_len()), > XEN_SYSCTL_PHYSCAP_ARM_SVE_MASK); > } > -#endif > > long arch_do_sysctl(struct xen_sysctl *sysctl, > XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl) > diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c > index 7b3f748886..ae865e1972 100644 > --- a/xen/arch/riscv/stubs.c > +++ b/xen/arch/riscv/stubs.c > @@ -322,13 +322,13 @@ unsigned long raw_copy_from_guest(void *to, const void __user *from, > > /* sysctl.c */ > > +#ifdef CONFIG_SYSCTL > long arch_do_sysctl(struct xen_sysctl *sysctl, > XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl) > { > BUG_ON("unimplemented"); > } > > -#ifdef CONFIG_SYSCTL > void arch_do_physinfo(struct xen_sysctl_physinfo *pi) > { > BUG_ON("unimplemented"); > diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile > index f59c9665fd..837eafcbc0 100644 > --- a/xen/arch/x86/Makefile > +++ b/xen/arch/x86/Makefile > @@ -79,7 +79,7 @@ ifneq ($(CONFIG_PV_SHIM_EXCLUSIVE),y) > obj-y += domctl.o > obj-y += platform_hypercall.o > obj-$(CONFIG_COMPAT) += x86_64/platform_hypercall.o > -obj-y += sysctl.o > +obj-$(CONFIG_SYSCTL) += sysctl.o > endif I think I had indicated before that this shouldn't stay inside the conditional, but move back up. Whether that is to happen here or while addressing my respective comment on patch 01 I can't easily tell. > --- a/xen/common/sysctl.c > +++ b/xen/common/sysctl.c > @@ -490,8 +490,10 @@ long do_sysctl(XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl) > break; > > default: > +#ifdef CONFIG_SYSCTL > ret = arch_do_sysctl(op, u_sysctl); > copyback = 0; > +#endif > break; > } This isn't enough. "ret" is 0 when reaching the default: label, but may not stay 0 for the return from the function. I understand (expect) this is going to be dropped again in the next patch, but even if only transiently needed this should be kept correct imo. Things might be different if patch 02 introduced the option without a prompt, i.e. always enabled. Then all the #ifdef-ary added up to here would be merely syntactic sugar. In fact in that case you could omit all the transient #ifdef that the last patch is going to remove again. Please consider going that route. Otherwise I think the #endif also needs moving up, for copyback to still be cleared here. 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[92.26.98.202]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c0b66a96dsm14091348f8f.44.2025.04.01.07.47.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Apr 2025 07:47:05 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 2eaf8b27-0f08-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1743518826; x=1744123626; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=x1ng98cg6r0EpaZ0hRdZSynFb1XZuzv1vYF46lpGdfU=; b=wFtIsmytnUIbr+D4iM406rxPBUtra3qRwjbGQ1A0wQkWKvkA2HIN/fNxRnBGsVPgWi fBc5hojjIHO9lbuICyO+5x1q5mm9GFi61nFT8NzgMq2vn3XKqnSVOSl62/DOLrDNU5No h0v/99CRAXTW4gAxe+RFNREQKlaRapTOKCjUw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743518826; x=1744123626; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=x1ng98cg6r0EpaZ0hRdZSynFb1XZuzv1vYF46lpGdfU=; b=wQU77hKnrOlu0r6BBsNpnGrFIf+gISY25Dmnk2zCNA35XjvUohVUAnsWh08Vpr6zHV ZIZMDmeKVlMEApwfb5HsdO67oiVS8j6owXQtMVIV0NCK6Y5r0zjqYl0oCcVj4uxqTF2u iY7amC3QHnAT15tXP9exbHi9pZ0TMMIuNcXJlxjcoymdC2MhxlCOb1J2MjxWJb7DA3Mn MGlHWZhx9EPL3SMijIWZF4AfqnQHtMZIN+gQjUzrUX9YgbLVuAOVwXgMYgMxwgcuR+lU 6WXy2vaoOCMScm98CTO58KJfWC6KzEQuQy6XZ9ATUgM8w7aM1Xsd2TmAdNWtNuGxieqM ZK0g== X-Gm-Message-State: AOJu0Yxhl4nhHGLGWPacd60LuP/RE4TgKHI0EGmnf2FNlgzHfRsfyR4F RcB5kKU28sKaIKZWC6mkk8cD3eJhD/ZYnf2QF6tjf17zVkvxcoQIw8RMM2sS9xje6Se2OpO6GL+ WvXw= X-Gm-Gg: ASbGncs5E23/Rre6dYxxyZD6iwq4R+1yjPGpI8+zpRI3XvMZSiXII0tqC6zvEhFArFT 4qQ6Jt6bYRCDP7Boq/DkucBFp+LzclWNI2EjvA+12eJYXcaB8vAfKJrp1kMUvw4Ln58gChlFUdb nMTgWZTtQeAr2uuBTY3OY5i/EOF2Fg77f9LvCuVv+4AlvY3nGwSLf0NjSqYe+0uL7E/NLE+6rYG FL00uNPPHyYhowKtUlsfu4/XR94KQk9oH5a/y7rxKev1UMm+mnv9H+0ajoQIHMIlKOaSogcY02f NkiLphX6gMpjKggYOrjHaWMCWi8OAHl4/Dj7XpLxhV+qjqILtDMYvcuLRPhmWdVzo1/6YYnkrRl y5JY28f8BojVjVqjXuw== X-Google-Smtp-Source: AGHT+IFpPFkWRyeQp3pd7RYDaNWk6Aj7tRtunrZmPS+65o57D8DsP9c6hEky4TvxrottFPKWuuq01Q== X-Received: by 2002:a5d:47c1:0:b0:391:2995:5ef2 with SMTP id ffacd0b85a97d-39c12114e24mr10673851f8f.37.1743518825863; Tue, 01 Apr 2025 07:47:05 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Volodymyr Babchuk , Bertrand Marquis , Shawn Anastasio , Oleksii Kurochko Subject: [PATCH] xen/arch: Simplify $(TARGET)-syms rule Date: Tue, 1 Apr 2025 15:47:03 +0100 Message-Id: <20250401144703.961836-1-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit In all cases, "-T $(obj)/xen.lds" can be factored out by appending to XEN_LDFLAGS. This takes the $(LD) commands from multi-line to single-line. x86 uses $(build_id_linker) for all links, so factor that out too. No functional change. Signed-off-by: Andrew Cooper --- CC: Anthony PERARD CC: Michal Orzel CC: Jan Beulich CC: Julien Grall CC: Roger Pau Monné CC: Stefano Stabellini CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Shawn Anastasio CC: Oleksii Kurochko This is based on top of Roger's "xen: remove -N from the linker command line". x86 might want to follow ARM's lead and only use $(build_id_linker) on the final link. It also wants extending to PPC/RISC-V $(orphan-handling-y) needs making common and using ouside of x86 too. --- xen/arch/arm/Makefile | 10 ++++------ xen/arch/ppc/Makefile | 10 ++++------ xen/arch/riscv/Makefile | 10 ++++------ xen/arch/x86/Makefile | 10 ++++------ 4 files changed, 16 insertions(+), 24 deletions(-) diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile index 129a109d6ec5..811adf3567c4 100644 --- a/xen/arch/arm/Makefile +++ b/xen/arch/arm/Makefile @@ -96,21 +96,19 @@ ifeq ($(CONFIG_ARM_64),y) ln -sf $(@F) $@.efi endif +$(TARGET)-syms: XEN_LDFLAGS += -T $(obj)/xen.lds $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds - $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \ - $(objtree)/common/symbols-dummy.o -o $(dot-target).0 + $(LD) $(XEN_LDFLAGS) $< $(objtree)/common/symbols-dummy.o -o $(dot-target).0 $(NM) -pa --format=sysv $(dot-target).0 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > $(dot-target).0.S $(MAKE) $(build)=$(@D) $(dot-target).0.o - $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \ - $(dot-target).0.o -o $(dot-target).1 + $(LD) $(XEN_LDFLAGS) $< $(dot-target).0.o -o $(dot-target).1 $(NM) -pa --format=sysv $(dot-target).1 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > $(dot-target).1.S $(MAKE) $(build)=$(@D) $(dot-target).1.o - $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ - $(dot-target).1.o -o $@ + $(LD) $(XEN_LDFLAGS) $< $(build_id_linker) $(dot-target).1.o -o $@ $(NM) -pa --format=sysv $@ \ | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ > $@.map diff --git a/xen/arch/ppc/Makefile b/xen/arch/ppc/Makefile index cf27bcebb25a..9ba23ecfff7e 100644 --- a/xen/arch/ppc/Makefile +++ b/xen/arch/ppc/Makefile @@ -11,21 +11,19 @@ obj-y += tlb-radix.o $(TARGET): $(TARGET)-syms cp -f $< $@ +$(TARGET)-syms: XEN_LDFLAGS += -T $(obj)/xen.lds $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds - $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \ - $(objtree)/common/symbols-dummy.o -o $(dot-target).0 + $(LD) $(XEN_LDFLAGS) $< $(objtree)/common/symbols-dummy.o -o $(dot-target).0 $(NM) -pa --format=sysv $(dot-target).0 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > $(dot-target).0.S $(MAKE) $(build)=$(@D) $(dot-target).0.o - $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \ - $(dot-target).0.o -o $(dot-target).1 + $(LD) $(XEN_LDFLAGS) $< $(dot-target).0.o -o $(dot-target).1 $(NM) -pa --format=sysv $(dot-target).1 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > $(dot-target).1.S $(MAKE) $(build)=$(@D) $(dot-target).1.o - $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ - $(dot-target).1.o -o $@ + $(LD) $(XEN_LDFLAGS) $< $(build_id_linker) $(dot-target).1.o -o $@ $(NM) -pa --format=sysv $@ \ | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ > $@.map diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index 516f5d505ca8..92e084db91a2 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -15,21 +15,19 @@ obj-y += vm_event.o $(TARGET): $(TARGET)-syms $(OBJCOPY) -O binary -S $< $@ +$(TARGET)-syms: XEN_LDFLAGS += -T $(obj)/xen.lds $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds - $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \ - $(objtree)/common/symbols-dummy.o -o $(dot-target).0 + $(LD) $(XEN_LDFLAGS) $< $(objtree)/common/symbols-dummy.o -o $(dot-target).0 $(NM) -pa --format=sysv $(dot-target).0 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > $(dot-target).0.S $(MAKE) $(build)=$(@D) $(dot-target).0.o - $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \ - $(dot-target).0.o -o $(dot-target).1 + $(LD) $(XEN_LDFLAGS) $< $(dot-target).0.o -o $(dot-target).1 $(NM) -pa --format=sysv $(dot-target).1 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > $(dot-target).1.S $(MAKE) $(build)=$(@D) $(dot-target).1.o - $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ - $(dot-target).1.o -o $@ + $(LD) $(XEN_LDFLAGS) $< $(build_id_linker) $(dot-target).1.o -o $@ $(NM) -pa --format=sysv $@ \ | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ > $@.map diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile index c2f1dcf301d6..b5227aeabb81 100644 --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -138,21 +138,19 @@ $(TARGET): $(TARGET)-syms $(efi-y) $(obj)/boot/mkelf32 CFLAGS-$(XEN_BUILD_EFI) += -DXEN_BUILD_EFI +$(TARGET)-syms: XEN_LDFLAGS += -T $(obj)/xen.lds $(build_id_linker) $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds - $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ - $(objtree)/common/symbols-dummy.o -o $(dot-target).0 + $(LD) $(XEN_LDFLAGS) $< $(objtree)/common/symbols-dummy.o -o $(dot-target).0 $(NM) -pa --format=sysv $(dot-target).0 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > $(dot-target).0.S $(MAKE) $(build)=$(@D) $(dot-target).0.o - $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ - $(dot-target).0.o -o $(dot-target).1 + $(LD) $(XEN_LDFLAGS) $< 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X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR08MB9888 Hi, > On 1 Apr 2025, at 16:22, Orzel, Michal wrote: >=20 >=20 >=20 > On 01/04/2025 14:57, Bertrand Marquis wrote: >>=20 >>=20 >> Hi Michal, >>=20 >>> On 1 Apr 2025, at 11:09, Michal Orzel wrote: >>>=20 >>> There's no benefit in having process_shm_chosen() next to process_shm()= . >>> The former is just a helper to pass "/chosen" node to the latter for >>> hwdom case. Drop process_shm_chosen() and instead use process_shm() >>> passing NULL as node parameter, which will result in searching for and >>> using /chosen to find shm node (the DT full path search is done in >>> process_shm() to avoid expensive lookup if !CONFIG_STATIC_SHM). This >>> will simplify future handling of hw/control domain separation. >>>=20 >>> Signed-off-by: Michal Orzel >>> --- >>> xen/arch/arm/domain_build.c | 2 +- >>> xen/arch/arm/include/asm/static-shmem.h | 14 -------------- >>> xen/arch/arm/static-shmem.c | 4 ++++ >>> 3 files changed, 5 insertions(+), 15 deletions(-) >>>=20 >>> diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c >>> index 2b5b4331834f..7f9e17e1de4d 100644 >>> --- a/xen/arch/arm/domain_build.c >>> +++ b/xen/arch/arm/domain_build.c >>> @@ -2325,7 +2325,7 @@ int __init construct_hwdom(struct kernel_info *ki= nfo) >>> else >>> allocate_memory(d, kinfo); >>>=20 >>> - rc =3D process_shm_chosen(d, kinfo); >>> + rc =3D process_shm(d, kinfo, NULL); >>> if ( rc < 0 ) >>> return rc; >>>=20 >>> diff --git a/xen/arch/arm/include/asm/static-shmem.h b/xen/arch/arm/inc= lude/asm/static-shmem.h >>> index fd0867c4f26b..94eaa9d500f9 100644 >>> --- a/xen/arch/arm/include/asm/static-shmem.h >>> +++ b/xen/arch/arm/include/asm/static-shmem.h >>> @@ -18,14 +18,6 @@ int make_resv_memory_node(const struct kernel_info *= kinfo, int addrcells, >>> int process_shm(struct domain *d, struct kernel_info *kinfo, >>> const struct dt_device_node *node); >>>=20 >>> -static inline int process_shm_chosen(struct domain *d, >>> - struct kernel_info *kinfo) >>> -{ >>> - const struct dt_device_node *node =3D dt_find_node_by_path("/chose= n"); >>> - >>> - return process_shm(d, kinfo, node); >>> -} >>> - >>> int process_shm_node(const void *fdt, int node, uint32_t address_cells, >>> uint32_t size_cells); >>>=20 >>> @@ -74,12 +66,6 @@ static inline int process_shm(struct domain *d, stru= ct kernel_info *kinfo, >>> return 0; >>> } >>>=20 >>> -static inline int process_shm_chosen(struct domain *d, >>> - struct kernel_info *kinfo) >>> -{ >>> - return 0; >>> -} >>> - >>> static inline void init_sharedmem_pages(void) {}; >>>=20 >>> static inline int remove_shm_from_rangeset(const struct kernel_info *ki= nfo, >>> diff --git a/xen/arch/arm/static-shmem.c b/xen/arch/arm/static-shmem.c >>> index c74fa13d4847..cda90105923d 100644 >>> --- a/xen/arch/arm/static-shmem.c >>> +++ b/xen/arch/arm/static-shmem.c >>> @@ -297,6 +297,10 @@ int __init process_shm(struct domain *d, struct ke= rnel_info *kinfo, >>> { >>> struct dt_device_node *shm_node; >>>=20 >>> + /* Hwdom case - shm node under /chosen */ >>> + if ( !node ) >>> + node =3D dt_find_node_by_path("/chosen"); >>> + >>=20 >> I would have 2 questions here: >> - what if a NULL pointer is passed, wouldn't you wrongly look in the mai= n device tree ? > Do you mean from hwdom or domU path? In the former it is expected. In the= latter > it would be a bug given that there are several dozens of things that oper= ate on > this node being a /chosen/domU@X node before we pass node to process_shm(= ). >=20 >> - isn't there a NULL case to be handled if dt_find_node_by_path does not= find a result ? > It wasn't validated before this change. It would be catched in early boot= code > so no worries. Then an ASSERT on NULL would be good. >=20 >>=20 >> Couldn't the condition also check for the domain to be the hwdom ? > I could although we have so many /chosen and hwdom asserts in the tree in= the > dom0 creation that I find it not necessary. There are never to many asserts but ok :-) With an ASSERT added for the NULL case you can add my R-b. Cheers Bertrand >=20 > ~Michal From xen-devel-bounces@lists.xenproject.org Tue Apr 01 14:49:55 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 14:49:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934533.1336208 (Exim 4.92) (envelope-from ) id 1tzcw6-0002bA-UO; Tue, 01 Apr 2025 14:49:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 934533.1336208; Tue, 01 Apr 2025 14:49:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzcw6-0002b3-RZ; Tue, 01 Apr 2025 14:49:54 +0000 Received: by outflank-mailman (input) for mailman id 934533; Tue, 01 Apr 2025 14:49:53 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzcw5-00028a-KZ for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 14:49:53 +0000 Received: from mail-wm1-x331.google.com (mail-wm1-x331.google.com [2a00:1450:4864:20::331]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 90ee4f11-0f08-11f0-9ffb-bf95429c2676; Tue, 01 Apr 2025 16:49:51 +0200 (CEST) Received: by mail-wm1-x331.google.com with SMTP id 5b1f17b1804b1-4393dc02b78so36888225e9.3 for ; Tue, 01 Apr 2025 07:49:51 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 01 Apr 2025 07:49:51 -0700 (PDT) Message-ID: <8a1bc63a-125f-424b-87bd-acd608fdab73@suse.com> Date: Tue, 1 Apr 2025 16:49:49 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 19/19] xen/sysctl: wrap around sysctl hypercall To: Penny Zheng Cc: ray.huang@amd.com, Stefano Stabellini , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Sergiy Kibrik , xen-devel@lists.xenproject.org References: <20250326055053.3313146-1-Penny.Zheng@amd.com> <20250326055053.3313146-20-Penny.Zheng@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20250326055053.3313146-20-Penny.Zheng@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 26.03.2025 06:50, Penny Zheng wrote: > --- a/xen/common/Makefile > +++ b/xen/common/Makefile > @@ -69,7 +69,7 @@ obj-$(CONFIG_COMPAT) += $(addprefix compat/,domain.o memory.o multicall.o xlat.o > ifneq ($(CONFIG_PV_SHIM_EXCLUSIVE),y) > obj-y += domctl.o > obj-$(CONFIG_VM_EVENT) += monitor.o > -obj-y += sysctl.o > +obj-$(CONFIG_SYSCTL) += sysctl.o > endif Same as for the respective x86 change: Imo this needs to move out of the conditional again, back into the normal list of objects. > --- a/xen/include/hypercall-defs.c > +++ b/xen/include/hypercall-defs.c > @@ -195,10 +195,12 @@ kexec_op(unsigned long op, void *uarg) > dm_op(domid_t domid, unsigned int nr_bufs, xen_dm_op_buf_t *bufs) > #endif > #ifndef CONFIG_PV_SHIM_EXCLUSIVE > -sysctl(xen_sysctl_t *u_sysctl) > domctl(xen_domctl_t *u_domctl) > paging_domctl_cont(xen_domctl_t *u_domctl) > platform_op(xen_platform_op_t *u_xenpf_op) > +#ifdef CONFIG_SYSCTL > +sysctl(xen_sysctl_t *u_sysctl) > +#endif > #endif If you don't move this out of the enclosing #ifdef, I don't see why you move it at all. > @@ -274,8 +276,10 @@ physdev_op compat do hvm hvm do_arm > hvm_op do do do do do > #endif > #ifndef CONFIG_PV_SHIM_EXCLUSIVE > -sysctl do do do do do > domctl do do do do do > +#ifdef CONFIG_SYSCTL > +sysctl do do do do do > +#endif > #endif Same here. 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Tue, 01 Apr 2025 07:58:14 -0700 (PDT) Message-ID: <5a314d13-fad7-4448-b629-bd7d614a09a8@suse.com> Date: Tue, 1 Apr 2025 16:58:13 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen/arch: Simplify $(TARGET)-syms rule To: Andrew Cooper Cc: Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Volodymyr Babchuk , Bertrand Marquis , Shawn Anastasio , Oleksii Kurochko , Xen-devel References: <20250401144703.961836-1-andrew.cooper3@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20250401144703.961836-1-andrew.cooper3@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 01.04.2025 16:47, Andrew Cooper wrote: > In all cases, "-T $(obj)/xen.lds" can be factored out by appending to > XEN_LDFLAGS. This takes the $(LD) commands from multi-line to single-line. > > x86 uses $(build_id_linker) for all links, so factor that out too. > > No functional change. > > Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich However, ... > --- a/xen/arch/arm/Makefile > --- a/xen/arch/x86/Makefile > +++ b/xen/arch/x86/Makefile > @@ -138,21 +138,19 @@ $(TARGET): $(TARGET)-syms $(efi-y) $(obj)/boot/mkelf32 > > CFLAGS-$(XEN_BUILD_EFI) += -DXEN_BUILD_EFI > > +$(TARGET)-syms: XEN_LDFLAGS += -T $(obj)/xen.lds $(build_id_linker) > $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds > - $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ > - $(objtree)/common/symbols-dummy.o -o $(dot-target).0 > + $(LD) $(XEN_LDFLAGS) $< $(objtree)/common/symbols-dummy.o -o $(dot-target).0 > $(NM) -pa --format=sysv $(dot-target).0 \ > | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > > $(dot-target).0.S > $(MAKE) $(build)=$(@D) $(dot-target).0.o > - $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ > - $(dot-target).0.o -o $(dot-target).1 > + $(LD) $(XEN_LDFLAGS) $< $(dot-target).0.o -o $(dot-target).1 > $(NM) -pa --format=sysv $(dot-target).1 \ > | $(objtree)/tools/symbols $(all_symbols) --sysv --sort $(syms-warn-dup-y) \ > > $(dot-target).1.S > $(MAKE) $(build)=$(@D) $(dot-target).1.o > - $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ > - $(orphan-handling-y) $(dot-target).1.o -o $@ > + $(LD) $(XEN_LDFLAGS) $< $(orphan-handling-y) $(dot-target).1.o -o $@ > $(NM) -pa --format=sysv $@ \ > | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ > > $@.map ... any reason not to do the same for xen.efi's EFI_LDFLAGS and its -T $(obj)/efi.lds? I'd really like to keep the two rules as closely in sync as possible, to make it a little easier to eventually split them into a chain of smaller rules. Jan From xen-devel-bounces@lists.xenproject.org Tue Apr 01 15:21:48 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 15:21:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934568.1336230 (Exim 4.92) (envelope-from ) id 1tzdQl-0005Mh-LS; Tue, 01 Apr 2025 15:21:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 934568.1336230; Tue, 01 Apr 2025 15:21:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzdQl-0005Ma-Gy; Tue, 01 Apr 2025 15:21:35 +0000 Received: by outflank-mailman (input) for mailman id 934568; Tue, 01 Apr 2025 15:21:34 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzdQk-0005MU-0W for xen-devel@lists.xenproject.org; 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Drop process_shm_chosen() and instead use process_shm() >>>> passing NULL as node parameter, which will result in searching for and >>>> using /chosen to find shm node (the DT full path search is done in >>>> process_shm() to avoid expensive lookup if !CONFIG_STATIC_SHM). This >>>> will simplify future handling of hw/control domain separation. >>>> >>>> Signed-off-by: Michal Orzel >>>> --- >>>> xen/arch/arm/domain_build.c | 2 +- >>>> xen/arch/arm/include/asm/static-shmem.h | 14 -------------- >>>> xen/arch/arm/static-shmem.c | 4 ++++ >>>> 3 files changed, 5 insertions(+), 15 deletions(-) >>>> >>>> diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c >>>> index 2b5b4331834f..7f9e17e1de4d 100644 >>>> --- a/xen/arch/arm/domain_build.c >>>> +++ b/xen/arch/arm/domain_build.c >>>> @@ -2325,7 +2325,7 @@ int __init construct_hwdom(struct kernel_info *kinfo) >>>> else >>>> allocate_memory(d, kinfo); >>>> >>>> - rc = process_shm_chosen(d, kinfo); >>>> + rc = process_shm(d, kinfo, NULL); >>>> if ( rc < 0 ) >>>> return rc; >>>> >>>> diff --git a/xen/arch/arm/include/asm/static-shmem.h b/xen/arch/arm/include/asm/static-shmem.h >>>> index fd0867c4f26b..94eaa9d500f9 100644 >>>> --- a/xen/arch/arm/include/asm/static-shmem.h >>>> +++ b/xen/arch/arm/include/asm/static-shmem.h >>>> @@ -18,14 +18,6 @@ int make_resv_memory_node(const struct kernel_info *kinfo, int addrcells, >>>> int process_shm(struct domain *d, struct kernel_info *kinfo, >>>> const struct dt_device_node *node); >>>> >>>> -static inline int process_shm_chosen(struct domain *d, >>>> - struct kernel_info *kinfo) >>>> -{ >>>> - const struct dt_device_node *node = dt_find_node_by_path("/chosen"); >>>> - >>>> - return process_shm(d, kinfo, node); >>>> -} >>>> - >>>> int process_shm_node(const void *fdt, int node, uint32_t address_cells, >>>> uint32_t size_cells); >>>> >>>> @@ -74,12 +66,6 @@ static inline int process_shm(struct domain *d, struct kernel_info *kinfo, >>>> return 0; >>>> } >>>> >>>> -static inline int process_shm_chosen(struct domain *d, >>>> - struct kernel_info *kinfo) >>>> -{ >>>> - return 0; >>>> -} >>>> - >>>> static inline void init_sharedmem_pages(void) {}; >>>> >>>> static inline int remove_shm_from_rangeset(const struct kernel_info *kinfo, >>>> diff --git a/xen/arch/arm/static-shmem.c b/xen/arch/arm/static-shmem.c >>>> index c74fa13d4847..cda90105923d 100644 >>>> --- a/xen/arch/arm/static-shmem.c >>>> +++ b/xen/arch/arm/static-shmem.c >>>> @@ -297,6 +297,10 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo, >>>> { >>>> struct dt_device_node *shm_node; >>>> >>>> + /* Hwdom case - shm node under /chosen */ >>>> + if ( !node ) >>>> + node = dt_find_node_by_path("/chosen"); >>>> + >>> >>> I would have 2 questions here: >>> - what if a NULL pointer is passed, wouldn't you wrongly look in the main device tree ? >> Do you mean from hwdom or domU path? In the former it is expected. In the latter >> it would be a bug given that there are several dozens of things that operate on >> this node being a /chosen/domU@X node before we pass node to process_shm(). >> >>> - isn't there a NULL case to be handled if dt_find_node_by_path does not find a result ? >> It wasn't validated before this change. It would be catched in early boot code >> so no worries. > > Then an ASSERT on NULL would be good. See below. > >> >>> >>> Couldn't the condition also check for the domain to be the hwdom ? >> I could although we have so many /chosen and hwdom asserts in the tree in the >> dom0 creation that I find it not necessary. > > There are never to many asserts but ok :-) > > With an ASSERT added for the NULL case you can add my R-b. :( So you still want to put ASSERT for a case where host DT does not have /chosen node. I'd like to talk you to drop this idea. Normally I'm in favor of using ASSERTs but not for so obvious violations like missing /chosen. /chosen node is so crucial for Xen on Arm functioning that a lot of things would simply fail a lot earlier than a point where we call process_shm() at the end (almost) of hwdom creation. There would be no modules, so the first example that comes to my head is panic due to no kernel which happens way before process_shm(). ~Michal From xen-devel-bounces@lists.xenproject.org Tue Apr 01 15:35:12 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 15:35:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934580.1336239 (Exim 4.92) (envelope-from ) id 1tzddq-0008GK-O9; Tue, 01 Apr 2025 15:35:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 934580.1336239; Tue, 01 Apr 2025 15:35:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzddq-0008GD-Ka; Tue, 01 Apr 2025 15:35:06 +0000 Received: by outflank-mailman (input) for mailman id 934580; Tue, 01 Apr 2025 15:35:05 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzddp-0008G7-0x for xen-devel@lists.xenproject.org; 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pr=C Message-ID: <3d800459-7762-427e-8765-044adbb6459e@amd.com> Date: Tue, 1 Apr 2025 11:34:56 -0400 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 4/6] xen/arm: dom0less seed xenstore grant table entry To: Jan Beulich CC: Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , References: <20250331214321.205331-1-jason.andryuk@amd.com> <20250331214321.205331-5-jason.andryuk@amd.com> <6765d129-66dc-48d9-aaac-2b973edfda80@suse.com> Content-Language: en-US From: Jason Andryuk In-Reply-To: <6765d129-66dc-48d9-aaac-2b973edfda80@suse.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF00020E5F:EE_|DS7PR12MB8252:EE_ X-MS-Office365-Filtering-Correlation-Id: 961627ba-0daf-4a5f-1961-08dd7132c1a2 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|82310400026|1800799024|36860700013; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Apr 2025 15:34:56.7095 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 961627ba-0daf-4a5f-1961-08dd7132c1a2 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00020E5F.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB8252 On 2025-04-01 08:16, Jan Beulich wrote: > On 31.03.2025 23:43, Jason Andryuk wrote: >> --- a/xen/arch/arm/dom0less-build.c >> +++ b/xen/arch/arm/dom0less-build.c >> @@ -865,6 +865,10 @@ static void __init initialize_domU_xenstore(void) >> rc = alloc_xenstore_evtchn(d); >> if ( rc < 0 ) >> panic("%pd: Failed to allocate xenstore_evtchn\n", d); >> + >> + if ( gfn != ~0ULL ) > > Is this an odd open-coding of INVALID_GFN? And even if not - why ULL when > "gfn" is unsigned long? The way you have it the condition will always be > false on Arm32, if I'm not mistaken. The gfn is pulled out of the HVM_PARAMS, which is a uint64_t. It is set like: d->arch.hvm.params[HVM_PARAM_STORE_PFN] = ~0ULL; But pulled out by: unsigned long gfn = d->arch.hvm.params[HVM_PARAM_STORE_PFN]; So your comment highlights that unsigned long is incorrect for ARM32. While I realize fixed types are discouraged, I'd prefer to use uint64_t for the replacement. That is the type of HVM_PARAMS, and uint64_t is used on the init-dom0less side as well. Using unsigned long long to get a 64bit value on ARM32 seems less clear to me. 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At least on Arm, Xen is tiny >>> enough that it can fit in less than a couple of MB. I would expect the >>> same for RISC-V. >> >> For TLB efficiency reasons for example. On x86 we switched to using 2Mb >> pages quite some time back, just to find that (at least) one of the >> bootloaders choked on the then larger binary. Hence we ended up with >> the XEN_ALIGN_2M Kconfig symbol plus the unconditional use of 2Mb >> mappings for xen.efi. For the original change see cf393624eec3 ("x86: >> use 2M superpages for text/data/bss mappings"). > > For Arm, we can using the contiguous bit (it allows to combine a few > entries into one TLB on some CPUs) to reduce the TLB usage. Not sure > if RISC-V has a similar feature. Unfortunately, RISC-V doesn't have such option. ~ Oleksii --------------UOzkySSbTXraRu17i4Ezn956 Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: 8bit


On 4/1/25 1:59 PM, Julien Grall wrote:


On 01/04/2025 07:24, Jan Beulich wrote:
On 31.03.2025 18:17, Julien Grall wrote:
On 31/03/2025 17:14, Jan Beulich wrote:
On 31.03.2025 17:20, Oleksii Kurochko wrote:
A randconfig job failed with the following issue:
    riscv64-linux-gnu-ld: Xen too large for early-boot assumptions

The reason is that enabling the UBSAN config increased the size of
the Xen binary.

Increase XEN_VIRT_SIZE to reserve enough space, allowing both UBSAN
and GCOV to be enabled together, with some slack for future growth.

At some point you may want to use 2M mappings for .text (rx), .rodata
(r), and .data (rw).

OOI, why would we want to switch to 2MB? At least on Arm, Xen is tiny
enough that it can fit in less than a couple of MB. I would expect the
same for RISC-V.

For TLB efficiency reasons for example. On x86 we switched to using 2Mb
pages quite some time back, just to find that (at least) one of the
bootloaders choked on the then larger binary. Hence we ended up with
the XEN_ALIGN_2M Kconfig symbol plus the unconditional use of 2Mb
mappings for xen.efi. For the original change see cf393624eec3 ("x86:
use 2M superpages for text/data/bss mappings").

For Arm, we can using the contiguous bit (it allows to combine a few entries into one TLB on some CPUs) to reduce the TLB usage. Not sure if RISC-V has a similar feature. 
Unfortunately, RISC-V doesn't have such option.

~ Oleksii
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Smith" , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , Andrew Cooper , xen-devel@lists.xenproject.org References: <20250401130840.72119-1-roger.pau@citrix.com> <20250401130840.72119-4-roger.pau@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20250401130840.72119-4-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 01.04.2025 15:08, Roger Pau Monne wrote: > --- a/xen/arch/x86/efi/mkreloc.c > +++ b/xen/arch/x86/efi/mkreloc.c > @@ -17,6 +17,12 @@ > #define PE_BASE_RELOC_HIGHLOW 3 > #define PE_BASE_RELOC_DIR64 10 > > +/* The size of a symbol table entry is always 18 bytes. */ > +#define SYM_SIZE 18 > + > +const char *string_table; > +unsigned int string_table_size; The way you use it, imo this wants to be uint32_t. Both probably want to be static. > @@ -25,6 +31,28 @@ static void usage(const char *cmd, int rc) > exit(rc); > } > > +const char *get_name(const char *name) > +{ > + static char buffer[sizeof(((struct section_header *)NULL)->name) + 1] = {}; As this makes things section specific, may I suggest to name the function e.g. get_section_name()? Also better to be static again. > + unsigned long offset; > + > + if ( name[0] != '/' ) > + { > + /* > + * Use a temporary buffer in case the name is 8 characters long, as > + * then there's no terminating null character in the input string. > + */ > + strncpy(buffer, name, sizeof(buffer) - 1); > + return buffer; > + } > + > + offset = strtoul(&name[1], NULL, 10); Don't you need to nul-terminate the string here, too, to play safe? (Yes, we don't expect this big a string table.) > + if ( !string_table || offset < 4 || offset >= string_table_size ) Considering how you reduce string_table_size after having read it from the image, don't you mean "offset - 4 >= string_table_size" here? Also below you use sizeof(string_table_size) instead of a literal 4. > + return name; > + > + return &string_table[offset - 4]; Here as well. > @@ -83,6 +111,31 @@ static unsigned int load(const char *name, int *handle, > exit(3); > } > > + if ( !string_table && pe_hdr.symbol_table ) > + { > + char *strings; > + > + if ( lseek(in, pe_hdr.symbol_table + pe_hdr.symbols * SYM_SIZE, > + SEEK_SET) < 0 || > + read(in, &string_table_size, sizeof(string_table_size)) != > + sizeof(string_table_size) ) > + { > + perror(name); > + exit(3); > + } > + > + string_table_size -= sizeof(string_table_size); You're careful of underflow above; better be careful here, too? > + strings = malloc(string_table_size); You check for all other errors, just not here? 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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Apr 2025 15:53:08.3848 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: df75397e-7fbe-4ead-25bf-08dd71354c50 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DB5PEPF00014B99.eurprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR08MB6179 Hi Michal, > On 1 Apr 2025, at 17:21, Orzel, Michal wrote: >=20 >=20 >=20 > On 01/04/2025 16:49, Bertrand Marquis wrote: >>=20 >>=20 >> Hi, >>=20 >>> On 1 Apr 2025, at 16:22, Orzel, Michal wrote: >>>=20 >>>=20 >>>=20 >>> On 01/04/2025 14:57, Bertrand Marquis wrote: >>>>=20 >>>>=20 >>>> Hi Michal, >>>>=20 >>>>> On 1 Apr 2025, at 11:09, Michal Orzel wrote: >>>>>=20 >>>>> There's no benefit in having process_shm_chosen() next to process_shm= (). >>>>> The former is just a helper to pass "/chosen" node to the latter for >>>>> hwdom case. Drop process_shm_chosen() and instead use process_shm() >>>>> passing NULL as node parameter, which will result in searching for an= d >>>>> using /chosen to find shm node (the DT full path search is done in >>>>> process_shm() to avoid expensive lookup if !CONFIG_STATIC_SHM). This >>>>> will simplify future handling of hw/control domain separation. >>>>>=20 >>>>> Signed-off-by: Michal Orzel >>>>> --- >>>>> xen/arch/arm/domain_build.c | 2 +- >>>>> xen/arch/arm/include/asm/static-shmem.h | 14 -------------- >>>>> xen/arch/arm/static-shmem.c | 4 ++++ >>>>> 3 files changed, 5 insertions(+), 15 deletions(-) >>>>>=20 >>>>> diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.= c >>>>> index 2b5b4331834f..7f9e17e1de4d 100644 >>>>> --- a/xen/arch/arm/domain_build.c >>>>> +++ b/xen/arch/arm/domain_build.c >>>>> @@ -2325,7 +2325,7 @@ int __init construct_hwdom(struct kernel_info *= kinfo) >>>>> else >>>>> allocate_memory(d, kinfo); >>>>>=20 >>>>> - rc =3D process_shm_chosen(d, kinfo); >>>>> + rc =3D process_shm(d, kinfo, NULL); >>>>> if ( rc < 0 ) >>>>> return rc; >>>>>=20 >>>>> diff --git a/xen/arch/arm/include/asm/static-shmem.h b/xen/arch/arm/i= nclude/asm/static-shmem.h >>>>> index fd0867c4f26b..94eaa9d500f9 100644 >>>>> --- a/xen/arch/arm/include/asm/static-shmem.h >>>>> +++ b/xen/arch/arm/include/asm/static-shmem.h >>>>> @@ -18,14 +18,6 @@ int make_resv_memory_node(const struct kernel_info= *kinfo, int addrcells, >>>>> int process_shm(struct domain *d, struct kernel_info *kinfo, >>>>> const struct dt_device_node *node); >>>>>=20 >>>>> -static inline int process_shm_chosen(struct domain *d, >>>>> - struct kernel_info *kinfo) >>>>> -{ >>>>> - const struct dt_device_node *node =3D dt_find_node_by_path("/cho= sen"); >>>>> - >>>>> - return process_shm(d, kinfo, node); >>>>> -} >>>>> - >>>>> int process_shm_node(const void *fdt, int node, uint32_t address_cell= s, >>>>> uint32_t size_cells); >>>>>=20 >>>>> @@ -74,12 +66,6 @@ static inline int process_shm(struct domain *d, st= ruct kernel_info *kinfo, >>>>> return 0; >>>>> } >>>>>=20 >>>>> -static inline int process_shm_chosen(struct domain *d, >>>>> - struct kernel_info *kinfo) >>>>> -{ >>>>> - return 0; >>>>> -} >>>>> - >>>>> static inline void init_sharedmem_pages(void) {}; >>>>>=20 >>>>> static inline int remove_shm_from_rangeset(const struct kernel_info *= kinfo, >>>>> diff --git a/xen/arch/arm/static-shmem.c b/xen/arch/arm/static-shmem.= c >>>>> index c74fa13d4847..cda90105923d 100644 >>>>> --- a/xen/arch/arm/static-shmem.c >>>>> +++ b/xen/arch/arm/static-shmem.c >>>>> @@ -297,6 +297,10 @@ int __init process_shm(struct domain *d, struct = kernel_info *kinfo, >>>>> { >>>>> struct dt_device_node *shm_node; >>>>>=20 >>>>> + /* Hwdom case - shm node under /chosen */ >>>>> + if ( !node ) >>>>> + node =3D dt_find_node_by_path("/chosen"); >>>>> + >>>>=20 >>>> I would have 2 questions here: >>>> - what if a NULL pointer is passed, wouldn't you wrongly look in the m= ain device tree ? >>> Do you mean from hwdom or domU path? In the former it is expected. In t= he latter >>> it would be a bug given that there are several dozens of things that op= erate on >>> this node being a /chosen/domU@X node before we pass node to process_sh= m(). >>>=20 >>>> - isn't there a NULL case to be handled if dt_find_node_by_path does n= ot find a result ? >>> It wasn't validated before this change. It would be catched in early bo= ot code >>> so no worries. >>=20 >> Then an ASSERT on NULL would be good. > See below. >=20 >>=20 >>>=20 >>>>=20 >>>> Couldn't the condition also check for the domain to be the hwdom ? >>> I could although we have so many /chosen and hwdom asserts in the tree = in the >>> dom0 creation that I find it not necessary. >>=20 >> There are never to many asserts but ok :-) >>=20 >> With an ASSERT added for the NULL case you can add my R-b. > :( > So you still want to put ASSERT for a case where host DT does not have /c= hosen > node. I'd like to talk you to drop this idea. Normally I'm in favor of us= ing > ASSERTs but not for so obvious violations like missing /chosen. I am not quite sure why you do not want an assert here. Reading the code the first that comes to mind is "what if this is still NUL= L after" which would be clearly something no expected if someone sees an assert. Seeing the place where it is, that would not impact performance in any way. So why not adding it ? >=20 > /chosen node is so crucial for Xen on Arm functioning that a lot of thing= s would > simply fail a lot earlier than a point where we call process_shm() at th= e end > (almost) of hwdom creation. There would be no modules, so the first examp= le that > comes to my head is panic due to no kernel which happens way before proce= ss_shm(). >=20 Sure you might be right, what if something bypass this due to efi boot or a= cpi boot and the code comes down here ? Even it might be true now, this would make sure that no change in the code = is changing this. Anyway i will not argue on that for to long as it is kind of a matter of ta= ste. So feel free to put my acked-by without the assert. Cheers Bertrand > ~Michal From xen-devel-bounces@lists.xenproject.org Tue Apr 01 15:55:59 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 15:55:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934632.1336278 (Exim 4.92) (envelope-from ) id 1tzdy2-0006ce-4j; Tue, 01 Apr 2025 15:55:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 934632.1336278; Tue, 01 Apr 2025 15:55:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzdy2-0006cX-1S; Tue, 01 Apr 2025 15:55:58 +0000 Received: by outflank-mailman (input) for mailman id 934632; Tue, 01 Apr 2025 15:55:56 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzdy0-0006cP-UA for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 15:55:56 +0000 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [2a00:1450:4864:20::32c]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id cbdb6ebb-0f11-11f0-9ea7-5ba50f476ded; Tue, 01 Apr 2025 17:55:55 +0200 (CEST) Received: by mail-wm1-x32c.google.com with SMTP id 5b1f17b1804b1-43d0359b1fcso37928455e9.0 for ; Tue, 01 Apr 2025 08:55:55 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Smith" , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , Andrew Cooper , xen-devel@lists.xenproject.org References: <20250401130840.72119-1-roger.pau@citrix.com> <20250401130840.72119-5-roger.pau@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20250401130840.72119-5-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 01.04.2025 15:08, Roger Pau Monne wrote: > --- a/xen/arch/x86/efi/mkreloc.c > +++ b/xen/arch/x86/efi/mkreloc.c > @@ -270,8 +270,9 @@ static void diff_sections(const unsigned char *ptr1, const unsigned char *ptr2, > > if ( !(sec->flags & IMAGE_SCN_MEM_WRITE) ) > fprintf(stderr, > - "Warning: relocation to r/o section %s:%08" PRIxFAST32 "\n", > - get_name(sec->name), i - disp); > + "Warning: relocation to r/o section %s:%08" PRIxFAST32 " @ %p\n", > + get_name(sec->name), i - disp, > + (void *)(base + sec->rva + i - disp)); This being a build tool, it may be built/run as 32-bit code. I fear the conversion to a pointer will not be liked by the compiler then, for (in this case) really losing half of the bits. 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Together with .init that would then completely > fill those 8Mb afaict. Hence you may want to go a little further right > away, e.g. to 16Mb. It makes sense to me. I'll update to 16 Mb then right now. >> + _AC(XEN_VIRT_START, UL) >> vpn1_shift; >> + const unsigned long xen_virt_end_vpn = >> + xen_virt_starn_vpn + ((XEN_VIRT_SIZE >> vpn1_shift) - 1); >> + >> if ((va >= DIRECTMAP_VIRT_START) && >> (va <= DIRECTMAP_VIRT_END)) >> return directmapoff_to_maddr(va - directmap_virt_start); >> >> - BUILD_BUG_ON(XEN_VIRT_SIZE != MB(2)); >> - ASSERT((va >> (PAGETABLE_ORDER + PAGE_SHIFT)) == >> - (_AC(XEN_VIRT_START, UL) >> (PAGETABLE_ORDER + PAGE_SHIFT))); >> + BUILD_BUG_ON(XEN_VIRT_SIZE != MB(8)); > Is it necessary to be != ? Won't > suffice? It could be just > MB(2). Or perphaps >=. > >> + ASSERT((va_vpn >= xen_virt_starn_vpn) && (va_vpn <= xen_virt_end_vpn)); > Are you sure about <= on the rhs of the && ? I am using -1 [ ((XEN_VIRT_SIZE >> vpn1_shift) - 1) ] when calculating the xen_virt_end_vpn to make the range inclusive. So it should be fine. > >> --- a/xen/arch/riscv/mm.c >> +++ b/xen/arch/riscv/mm.c >> @@ -31,20 +31,21 @@ unsigned long __ro_after_init phys_offset; /* = load_start - XEN_VIRT_START */ >> #define LOAD_TO_LINK(addr) ((unsigned long)(addr) - phys_offset) >> >> /* >> - * It is expected that Xen won't be more then 2 MB. >> + * It is expected that Xen won't be more then 8 MB. >> * The check in xen.lds.S guarantees that. >> - * At least 3 page tables (in case of Sv39 ) are needed to cover 2 MB. >> + * At least 6 page tables (in case of Sv39) are needed to cover 8 MB. >> * One for each page level table with PAGE_SIZE = 4 Kb. >> * >> - * One L0 page table can cover 2 MB(512 entries of one page table * PAGE_SIZE). >> + * Four L0 page table can cover 8 MB(512 entries of >> + * one page table * PAGE_SIZE). >> * >> * It might be needed one more page table in case when Xen load address >> * isn't 2 MB aligned. >> * >> - * CONFIG_PAGING_LEVELS page tables are needed for the identity mapping, >> + * (CONFIG_PAGING_LEVELS + 2) page tables are needed for the identity mapping, >> * except that the root page table is shared with the initial mapping >> */ >> -#define PGTBL_INITIAL_COUNT ((CONFIG_PAGING_LEVELS - 1) * 2 + 1) >> +#define PGTBL_INITIAL_COUNT ((CONFIG_PAGING_LEVELS + 2) * 2 + 1) > I'm in trouble fitting the comment updates with the update of the #define. Why > would more tables be needed for the identity mapping? Agree, it isn't needed more tables for the identity mapping. > Why does XEN_VIRT_SIZE > not appear anywhere here? I just used 8 Mb explicitly in the comment but I think you really asked me about definition of PGTBL_INITIAL_COUNT where I just explicitly take into account 3 extra pages for L0. I will update it with using of XEN_VIRT_SIZE to have more generic definition of PGTBL_INITIAL_COUNT. Thanks ~ Oleksii --------------sSxrmNcgtobUfYa6NOQKX0v9 Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: 7bit


On 3/31/25 6:14 PM, Jan Beulich wrote:
On 31.03.2025 17:20, Oleksii Kurochko wrote:

A randconfig job failed with the following issue:
  riscv64-linux-gnu-ld: Xen too large for early-boot assumptions

The reason is that enabling the UBSAN config increased the size of
the Xen binary.

Increase XEN_VIRT_SIZE to reserve enough space, allowing both UBSAN
and GCOV to be enabled together, with some slack for future growth.

At some point you may want to use 2M mappings for .text (rx), .rodata
(r), and .data (rw). Together with .init that would then completely
fill those 8Mb afaict. Hence you may want to go a little further right
away, e.g. to 16Mb.
It makes sense to me. I'll update to 16 Mb then right now.


+        _AC(XEN_VIRT_START, UL) >> vpn1_shift;
+    const unsigned long xen_virt_end_vpn =
+        xen_virt_starn_vpn + ((XEN_VIRT_SIZE >> vpn1_shift) - 1);
+
     if ((va >= DIRECTMAP_VIRT_START) &&
         (va <= DIRECTMAP_VIRT_END))
         return directmapoff_to_maddr(va - directmap_virt_start);
 
-    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(2));
-    ASSERT((va >> (PAGETABLE_ORDER + PAGE_SHIFT)) ==
-           (_AC(XEN_VIRT_START, UL) >> (PAGETABLE_ORDER + PAGE_SHIFT)));
+    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(8));

Is it necessary to be != ? Won't > suffice?
It could be just > MB(2). Or perphaps >=.




+    ASSERT((va_vpn >= xen_virt_starn_vpn) && (va_vpn <= xen_virt_end_vpn));

Are you sure about <= on the rhs of the && ?
I am using -1 [ ((XEN_VIRT_SIZE >> vpn1_shift) - 1) ] when calculating the xen_virt_end_vpn to make the range inclusive.
So it should be fine.




--- a/xen/arch/riscv/mm.c
+++ b/xen/arch/riscv/mm.c
@@ -31,20 +31,21 @@ unsigned long __ro_after_init phys_offset; /* = load_start - XEN_VIRT_START */
 #define LOAD_TO_LINK(addr) ((unsigned long)(addr) - phys_offset)
 
 /*
- * It is expected that Xen won't be more then 2 MB.
+ * It is expected that Xen won't be more then 8 MB.
  * The check in xen.lds.S guarantees that.
- * At least 3 page tables (in case of Sv39 ) are needed to cover 2 MB.
+ * At least 6 page tables (in case of Sv39) are needed to cover 8 MB.
  * One for each page level table with PAGE_SIZE = 4 Kb.
  *
- * One L0 page table can cover 2 MB(512 entries of one page table * PAGE_SIZE).
+ * Four L0 page table can cover 8 MB(512 entries of
+ * one page table * PAGE_SIZE).
  *
  * It might be needed one more page table in case when Xen load address
  * isn't 2 MB aligned.
  *
- * CONFIG_PAGING_LEVELS page tables are needed for the identity mapping,
+ * (CONFIG_PAGING_LEVELS + 2) page tables are needed for the identity mapping,
  * except that the root page table is shared with the initial mapping
  */
-#define PGTBL_INITIAL_COUNT ((CONFIG_PAGING_LEVELS - 1) * 2 + 1)
+#define PGTBL_INITIAL_COUNT ((CONFIG_PAGING_LEVELS + 2) * 2 + 1)

I'm in trouble fitting the comment updates with the update of the #define. Why
would more tables be needed for the identity mapping?
Agree, it isn't needed more tables for the identity mapping.


 Why does XEN_VIRT_SIZE
not appear anywhere here?
I just used 8 Mb explicitly in the comment but I think you really asked me about definition
of PGTBL_INITIAL_COUNT where I just explicitly take into account 3 extra pages for L0.
I will update it with using of XEN_VIRT_SIZE to have more generic definition of PGTBL_INITIAL_COUNT.

Thanks

~ Oleksii
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Tue, 01 Apr 2025 09:02:39 -0700 (PDT) Message-ID: Date: Tue, 1 Apr 2025 18:02:37 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 07/11] x86/efi: discard multiboot related entry code for PE binary To: Roger Pau Monne Cc: Andrew Cooper , xen-devel@lists.xenproject.org References: <20250401130840.72119-1-roger.pau@citrix.com> <20250401130840.72119-8-roger.pau@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20250401130840.72119-8-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 01.04.2025 15:08, Roger Pau Monne wrote: > --- a/xen/arch/x86/xen.lds.S > +++ b/xen/arch/x86/xen.lds.S > @@ -63,6 +63,7 @@ SECTIONS > . = __image_base__; > /DISCARD/ : { > *(.text.header) > + *(.init.multiboot) > } > #endif > > @@ -208,6 +209,7 @@ SECTIONS > _sinittext = .; > *(.init.text) > *(.text.startup) > + *(.init.multiboot) > _einittext = .; Better keep stuff that was early in .init.text early, by putting .init.multiboot first here? Then in principle: Reviewed-by: Jan Beulich However, there are then-orphan contributions to .init.rodata (maybe also to .init.data), which is at least a little odd. If they're to stay that way at least for the moment, maybe at least mention the aspect as known in the commit message? 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Tue, 01 Apr 2025 09:04:56 -0700 (PDT) Message-ID: <9d7e1553-3af8-4fc3-a400-8714d9b68411@suse.com> Date: Tue, 1 Apr 2025 18:04:55 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1] xen/riscv: Increase XEN_VIRT_SIZE To: Oleksii Kurochko Cc: Alistair Francis , Bob Eshleman , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <54ebdcb7-071f-411f-803a-930dc330a497@suse.com> <32264ccb-e566-41e0-973f-5bc7d874f970@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <32264ccb-e566-41e0-973f-5bc7d874f970@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 01.04.2025 17:58, Oleksii Kurochko wrote: > On 3/31/25 6:14 PM, Jan Beulich wrote: >> On 31.03.2025 17:20, Oleksii Kurochko wrote: >>> + _AC(XEN_VIRT_START, UL) >> vpn1_shift; >>> + const unsigned long xen_virt_end_vpn = >>> + xen_virt_starn_vpn + ((XEN_VIRT_SIZE >> vpn1_shift) - 1); >>> + >>> if ((va >= DIRECTMAP_VIRT_START) && >>> (va <= DIRECTMAP_VIRT_END)) >>> return directmapoff_to_maddr(va - directmap_virt_start); >>> >>> - BUILD_BUG_ON(XEN_VIRT_SIZE != MB(2)); >>> - ASSERT((va >> (PAGETABLE_ORDER + PAGE_SHIFT)) == >>> - (_AC(XEN_VIRT_START, UL) >> (PAGETABLE_ORDER + PAGE_SHIFT))); >>> + BUILD_BUG_ON(XEN_VIRT_SIZE != MB(8)); >> Is it necessary to be != ? Won't > suffice? > > It could be just > MB(2). Or perphaps >=. >= would make the build fail, wouldn't it? >>> + ASSERT((va_vpn >= xen_virt_starn_vpn) && (va_vpn <= xen_virt_end_vpn)); >> Are you sure about <= on the rhs of the && ? > > I am using -1 [ ((XEN_VIRT_SIZE >> vpn1_shift) - 1) ] when calculating the xen_virt_end_vpn to make the range inclusive. Oh, indeed, I didn't look there closely enough. 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Drop process_shm_chosen() and instead use process_shm() >>>>>> passing NULL as node parameter, which will result in searching for and >>>>>> using /chosen to find shm node (the DT full path search is done in >>>>>> process_shm() to avoid expensive lookup if !CONFIG_STATIC_SHM). This >>>>>> will simplify future handling of hw/control domain separation. >>>>>> >>>>>> Signed-off-by: Michal Orzel >>>>>> --- >>>>>> xen/arch/arm/domain_build.c | 2 +- >>>>>> xen/arch/arm/include/asm/static-shmem.h | 14 -------------- >>>>>> xen/arch/arm/static-shmem.c | 4 ++++ >>>>>> 3 files changed, 5 insertions(+), 15 deletions(-) >>>>>> >>>>>> diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c >>>>>> index 2b5b4331834f..7f9e17e1de4d 100644 >>>>>> --- a/xen/arch/arm/domain_build.c >>>>>> +++ b/xen/arch/arm/domain_build.c >>>>>> @@ -2325,7 +2325,7 @@ int __init construct_hwdom(struct kernel_info *kinfo) >>>>>> else >>>>>> allocate_memory(d, kinfo); >>>>>> >>>>>> - rc = process_shm_chosen(d, kinfo); >>>>>> + rc = process_shm(d, kinfo, NULL); >>>>>> if ( rc < 0 ) >>>>>> return rc; >>>>>> >>>>>> diff --git a/xen/arch/arm/include/asm/static-shmem.h b/xen/arch/arm/include/asm/static-shmem.h >>>>>> index fd0867c4f26b..94eaa9d500f9 100644 >>>>>> --- a/xen/arch/arm/include/asm/static-shmem.h >>>>>> +++ b/xen/arch/arm/include/asm/static-shmem.h >>>>>> @@ -18,14 +18,6 @@ int make_resv_memory_node(const struct kernel_info *kinfo, int addrcells, >>>>>> int process_shm(struct domain *d, struct kernel_info *kinfo, >>>>>> const struct dt_device_node *node); >>>>>> >>>>>> -static inline int process_shm_chosen(struct domain *d, >>>>>> - struct kernel_info *kinfo) >>>>>> -{ >>>>>> - const struct dt_device_node *node = dt_find_node_by_path("/chosen"); >>>>>> - >>>>>> - return process_shm(d, kinfo, node); >>>>>> -} >>>>>> - >>>>>> int process_shm_node(const void *fdt, int node, uint32_t address_cells, >>>>>> uint32_t size_cells); >>>>>> >>>>>> @@ -74,12 +66,6 @@ static inline int process_shm(struct domain *d, struct kernel_info *kinfo, >>>>>> return 0; >>>>>> } >>>>>> >>>>>> -static inline int process_shm_chosen(struct domain *d, >>>>>> - struct kernel_info *kinfo) >>>>>> -{ >>>>>> - return 0; >>>>>> -} >>>>>> - >>>>>> static inline void init_sharedmem_pages(void) {}; >>>>>> >>>>>> static inline int remove_shm_from_rangeset(const struct kernel_info *kinfo, >>>>>> diff --git a/xen/arch/arm/static-shmem.c b/xen/arch/arm/static-shmem.c >>>>>> index c74fa13d4847..cda90105923d 100644 >>>>>> --- a/xen/arch/arm/static-shmem.c >>>>>> +++ b/xen/arch/arm/static-shmem.c >>>>>> @@ -297,6 +297,10 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo, >>>>>> { >>>>>> struct dt_device_node *shm_node; >>>>>> >>>>>> + /* Hwdom case - shm node under /chosen */ >>>>>> + if ( !node ) >>>>>> + node = dt_find_node_by_path("/chosen"); >>>>>> + >>>>> >>>>> I would have 2 questions here: >>>>> - what if a NULL pointer is passed, wouldn't you wrongly look in the main device tree ? >>>> Do you mean from hwdom or domU path? In the former it is expected. In the latter >>>> it would be a bug given that there are several dozens of things that operate on >>>> this node being a /chosen/domU@X node before we pass node to process_shm(). >>>> >>>>> - isn't there a NULL case to be handled if dt_find_node_by_path does not find a result ? >>>> It wasn't validated before this change. It would be catched in early boot code >>>> so no worries. >>> >>> Then an ASSERT on NULL would be good. >> See below. >> >>> >>>> >>>>> >>>>> Couldn't the condition also check for the domain to be the hwdom ? >>>> I could although we have so many /chosen and hwdom asserts in the tree in the >>>> dom0 creation that I find it not necessary. >>> >>> There are never to many asserts but ok :-) >>> >>> With an ASSERT added for the NULL case you can add my R-b. >> :( >> So you still want to put ASSERT for a case where host DT does not have /chosen >> node. I'd like to talk you to drop this idea. Normally I'm in favor of using >> ASSERTs but not for so obvious violations like missing /chosen. > > I am not quite sure why you do not want an assert here. > Reading the code the first that comes to mind is "what if this is still NULL after" > which would be clearly something no expected if someone sees an assert. > > Seeing the place where it is, that would not impact performance in any way. > So why not adding it ? > >> >> /chosen node is so crucial for Xen on Arm functioning that a lot of things would >> simply fail a lot earlier than a point where we call process_shm() at the end >> (almost) of hwdom creation. There would be no modules, so the first example that >> comes to my head is panic due to no kernel which happens way before process_shm(). >> > > Sure you might be right, what if something bypass this due to efi boot or acpi boot and the > code comes down here ? > > Even it might be true now, this would make sure that no change in the code is changing this. > > Anyway i will not argue on that for to long as it is kind of a matter of taste. > > So feel free to put my acked-by without the assert. You gave me a reason to scan the code and I realized that in ACPI case, if STATIC_SHM is enabled, it triggers a bug in process_shm_chosen. So, you were right and we found a latent bug that is not related to this series. But maybe it would want to be handled as separate fix before the process_shm_chosen drop? ~Michal From xen-devel-bounces@lists.xenproject.org Tue Apr 01 17:19:36 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 17:19:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934706.1336329 (Exim 4.92) (envelope-from ) id 1tzfGt-0004E8-4v; Tue, 01 Apr 2025 17:19:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 934706.1336329; Tue, 01 Apr 2025 17:19:31 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzfGt-0004E1-1r; Tue, 01 Apr 2025 17:19:31 +0000 Received: by outflank-mailman (input) for mailman id 934706; Tue, 01 Apr 2025 17:19:29 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzfGq-0004Dt-Tw for xen-devel@lists.xenproject.org; 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Hi, One of the aspects of safety certifying a software is that we need to produce a coverage report (statement, branch, function and MCDC) and document the coverage gap (justifying why there is a gap). Is there a tool which could ingest the coverage output generated by Gcov, parse it to find instances of coverage gap and enable the developer to document the reasons for the various coverage gaps ? The attached screenshot shows a snippet of the coverage report generated in HITML. If I  were to justify the gaps, I would need to manually document the functions ( call_psci_cpu_off(), call_psci_system_off()) in a separate document and explain why there is a gap. I am wondering if there is a tool which will generate a single report for coverage and justification, so that the end user sees full coverage. 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X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(36860700013)(376014)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Apr 2025 17:32:10.8698 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a6912451-a4a6-4838-c708-08dd71432251 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A0F9.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ1PR12MB6050 On 2025-04-01 04:07, Jan Beulich wrote: > On 31.03.2025 23:46, Jason Andryuk wrote: >> It is useful for a domain to know its own domid. Xenstored has command >> line flags to set --master-domid (the local domid) and --priv-domid, but >> it would be better to autodetect those. Also, domids are necessary to >> set xenstore permissions - DOMID_SELF is not supported today. > > Setting permissions for oneself? Any call to xs_set_permissions(), AIUI. Say you have two domUs, dom1 & dom2. dom1 wants to create a shared xenstore node with full permissions for itself, but read-only permission for dom2. dom1 needs to know its own domid to set the permissions: * struct xs_permissions perms[2]; * * perms[0].id = domid1; * perms[0].perms = XS_PERM_NONE; * perms[1].id = domid2; * perms[1].perms = XS_PERM_READ; perms[].id doesn't handle DOMID_SELF > Since guests have ways to figure out their IDs, there's probably nothing > wrong with having a dedicated means for them to obtain them. It just needs > to be made very clear that the ID can (and, at least for now, typically > will) change across migration. As to the mechanism thereof, I stand by my > views voiced in that earlier thread you point at. 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pr=C Message-ID: <847a0afa-05bd-4f33-b07c-d9d69b9198ae@amd.com> Date: Tue, 1 Apr 2025 14:01:50 -0400 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Jason Andryuk Subject: Re: [PATCH v2 06/15] x86/hyperlaunch: introduce the domain builder To: Jan Beulich , "Daniel P. Smith" CC: , , "Andrew Cooper" , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , , References: <20241226165740.29812-1-dpsmith@apertussolutions.com> <20241226165740.29812-7-dpsmith@apertussolutions.com> <004b066a-b26f-44bd-994f-5c573f6511e6@suse.com> Content-Language: en-US In-Reply-To: <004b066a-b26f-44bd-994f-5c573f6511e6@suse.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: None (SATLEXMB05.amd.com: jason.andryuk@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF0001709D:EE_|BL4PR12MB9477:EE_ X-MS-Office365-Filtering-Correlation-Id: e97c8388-4dfd-4d09-064b-08dd7147469c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|82310400026|1800799024|376014; X-Microsoft-Antispam-Message-Info: =?utf-8?B?NXZySU9uWUtaNHl5M3NWbE5JT2tKNktWWFViRWZCazlzN3ltWXJpLzNRVDhG?= =?utf-8?B?RUJ3bXlCTjlVUS9JaVdUTkxuMjh2RUcrMXNyd0VhV3VDSE5BMmliQ2R5V0Y5?= =?utf-8?B?Zjg1cXpoM0hRZi9FT0NSMFV3RUdmWFdnemkzUXFrRmNucUZLTGw0QzJHbEUx?= =?utf-8?B?QjhScnQrSnhDc0ZDd2xQS3o1ZUFGdjNVSFlYRUQ4SUR1aGgyejg0Vm5JS0Zp?= =?utf-8?B?aWZUdkorZmdkVTBrc1hSR09UWUJIcjdwNUVsTkxsaXhSdGozM0RheFZSeStr?= =?utf-8?B?cUV3VEk5akZNVnlaa2kycC9mMURWSzZFMCtjTU5xOFhHYWUvOTNCU0d5blk5?= =?utf-8?B?am5ETEpQTTBpRWFVVzREV1B5R28xTzZkREZlemJjMnAzYjhNQisxb1gwcUdS?= =?utf-8?B?ZHZQQTYyVW9hL3Z1Y2xuL2ZPUVc3aXAxcVR6clVDa2wva21IeGRaZUhkQllP?= =?utf-8?B?dHZHckhxcGM2WVVCWFZOc0s4ZDdCVUZsZE5VOHN1WGxNMUgyeU5GZFlGMkRs?= =?utf-8?B?S2RxbEhKU1JHQWpyRGQwOStnWnpkRHQydTNkcythbTIxdFplcEZTWmh0MVBX?= =?utf-8?B?QUROaVBmTGU0ZDRPWk9YWXdtSXhvNFpMYTRXL3BEYkNjWDR6am5BbDl2am1u?= =?utf-8?B?UjNvV0RRd2U0b2dyTkt1Y2hRSlNVblcvOWtncHFkTHRqOGhubDNOdERMZTdH?= =?utf-8?B?OWVaeS9BOTliTHVIVnp2akhqTzlvOW9manhEUlRCM0hmalFCa1FlTy9IYTBV?= =?utf-8?B?Zys0ZkNtRVJGc0hpbE5URllCejFEM3Joc256VHh6bHpZWUdCdWtleFNGalBD?= =?utf-8?B?MWRGeWV1alA5TzR6WHZyYXpva3ZGNmp5T0VuSy81UEFDV0NnaG1ZS3JTbnRq?= =?utf-8?B?ZHJ6ZXlrc2tKeHJWd21RalZOYU5hcWVHQ0xlWUQybmxpYXlIeGRsVTBFMVZq?= =?utf-8?B?ZkZjRkx3UUVDdnJTc2t5bWNIazRsMkFXRjF5S0NXSGlZRDZpT28zN24rT3BO?= =?utf-8?B?THc3M0htQXl4WDZWZkxhM3lrNnlMN3BtRXR3cmI1ZUxHc1kvdVY1M0ticDJQ?= =?utf-8?B?T3plSzE5U2dmSElPOGdKOU5sM2ZlS0dWTmJ6MlNNeURDNEVHYWVZckhNOU1z?= =?utf-8?B?eEQ0YUl1ZnFtYTZONkJBM2c5YU5rWm9KZW1kaCtnL1RuZkZkQW5kR0lyVHRQ?= =?utf-8?B?YytJOUFtVEI0UXExTUN5U2NyZHVZYittWjI3RmRmbGlTdmx5QXNHdDdheHBw?= =?utf-8?B?LzRabHVzbEJJT2tCUWJZeEgzRi9qSlFQMGExOCtIVENLak96dzNCaDBENWZF?= =?utf-8?B?TlVCZ0txQWxRRlY0YkJsbzVGK3NsYk4rbU8xTUl2WTRqNTU4WFExNmgvVlo2?= =?utf-8?B?SUhXQzJtcGo3dXpVeFE4WnpLMTEveWljaisydWp6aGNCRUJyOXAvV2JyM2dn?= =?utf-8?B?cWZJRmZmeGN3QnhsTUZuMUtaUXp3NG9rYTdJQ0txcmtQN3k2N1Z1bllrMVly?= =?utf-8?B?Mm8vRjR5ZGg2ZTdSa3YzU3lSazI3T2FHSEhQQThOaXVlUmdYNWFvWE9UUVZa?= =?utf-8?B?czBubkVqRkJBR3dmcU9wMjhwa25mQUJqZGpZdkt1TVBwa1RTSmdBNkxxeW5R?= =?utf-8?B?QmJDU1hJVnJyQm9RNnc1LzZpbEFSUS9BNDgyNFhIMEZ5WFFhc0w4WnVYWUZl?= =?utf-8?B?T1dCUDF1ODNEYmQ4dHRkYWFYU1Y5OHQxQlN2OWtQRWxTSEx0Nnk3WWlsQ2hY?= =?utf-8?B?UnFIUGRTOFB3NUEvZVlrZUorRi9kdWx3NmJYaDVndXRZdU05ZlhnSWdudHJO?= =?utf-8?B?U0x6OGxNNCtJdVg2RGo5MUdMNE80MzNxS2EvNnlzQlg2V2cxT1p2MjU3Mlh2?= =?utf-8?B?Sk5MME8xR0RiR1VhUHFXK2Q0a3U2Qk9RUjhjNlR4WVZuUTg5eVJnUms0aU5I?= =?utf-8?B?aWpmUzRqWWQzcDRTWUNJcFRrRnZPZ2tONzJhNGo5YktvR3NScE82UEo2d0Fq?= =?utf-8?Q?ZwoG9ERCuf0bvVW3aBJ5GlsdEbPaPA=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(82310400026)(1800799024)(376014);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Apr 2025 18:01:49.6788 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e97c8388-4dfd-4d09-064b-08dd7147469c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF0001709D.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL4PR12MB9477 On 2025-01-30 09:52, Jan Beulich wrote: > On 26.12.2024 17:57, Daniel P. Smith wrote: >> --- a/xen/arch/x86/Makefile >> +++ b/xen/arch/x86/Makefile >> @@ -81,6 +81,8 @@ obj-$(CONFIG_COMPAT) += x86_64/platform_hypercall.o >> obj-y += sysctl.o >> endif >> >> +obj-y += domain-builder/ > > The set of subdirs needed in $(obj-y) is specified at the top of the file. > Also shouldn't this be obj-$(CONFIG_DOMAIN_BUILDER)? Later, all boot-time domain building is handled by domain-builder/core.c. So some of domain-builder/ is always built, and Kconfig disables multidomain support. >> --- /dev/null >> +++ b/xen/arch/x86/domain-builder/core.c >> @@ -0,0 +1,57 @@ >> +/* SPDX-License-Identifier: GPL-2.0-only */ >> +/* >> + * Copyright (C) 2024, Apertus Solutions, LLC >> + */ >> +#include >> +#include >> +#include >> +#include >> + >> +#include >> + >> +#include "fdt.h" >> + >> +void __init builder_init(struct boot_info *bi) >> +{ >> + if ( IS_ENABLED(CONFIG_DOMAIN_BUILDER) ) >> + { >> + int ret; >> + >> + switch ( ret = has_hyperlaunch_fdt(bi) ) >> + { >> + case 0: >> + printk("Hyperlaunch device tree detected\n"); >> + bi->hyperlaunch_enabled = true; >> + bi->mods[0].type = BOOTMOD_FDT; >> + break; >> + >> + case -EINVAL: >> + printk("Hyperlaunch device tree was not detected\n"); >> + bi->hyperlaunch_enabled = false; >> + break; >> + >> + case -ENOENT: >> + case -ENODATA: >> + printk("Device tree found, but not hyperlaunch (%d)\n", ret); >> + bi->hyperlaunch_enabled = false; >> + bi->mods[0].type = BOOTMOD_FDT; >> + break; >> + >> + default: >> + printk("Unknown error (%d) occured checking for hyperlaunch device tree\n", >> + ret); >> + bi->hyperlaunch_enabled = false; >> + break; >> + } >> + } >> +} > > What is it that's x86-specific in here? Would you prefer xen/common/domain-builder ? >> --- /dev/null >> +++ b/xen/arch/x86/domain-builder/fdt.c >> +{ >> + int ret = 0; >> + const void *fdt = bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_IDX]); >> + >> + if ( fdt_check_header(fdt) < 0 ) >> + ret = -EINVAL; >> + >> + bootstrap_unmap(); >> + >> + return ret; >> +} > > Is this function intended to later be extended? Aiui anything fitting > the hyperlaunch-agnostic fdt_check_header() will do here, despite the > name of the function. Eventually, there will be some checking to ensure that the DT actually contains hyperlaunch device nodes. > And again - what is it that's x86-specific in here? >> --- /dev/null >> +++ b/xen/arch/x86/include/asm/domainbuilder.h >> @@ -0,0 +1,8 @@ >> +#ifndef __XEN_X86_DOMBUILDER_H__ >> +#define __XEN_X86_DOMBUILDER_H__ >> + >> +#include > > ... here, is it? Forward decls of struct boot_info are going to do. Generally, if you only need a type, just use a forward decl? Use an include when you need function prototypes? >> @@ -1285,9 +1286,12 @@ void asmlinkage __init noreturn __start_xen(void) >> bi->nr_modules); >> } >> >> - /* Dom0 kernel is always first */ >> - bi->mods[0].type = BOOTMOD_KERNEL; >> - bi->domains[0].kernel = &bi->mods[0]; >> + builder_init(bi); >> + >> + /* Find first unknown boot module to use as Dom0 kernel */ >> + i = first_boot_module_index(bi, BOOTMOD_UNKNOWN); >> + bi->mods[i].type = BOOTMOD_KERNEL; >> + bi->domains[0].kernel = &bi->mods[i]; > > This is going to change again later? Or else what about there already > being a module marked BOOTMOD_KERNEL? Yes, it will change. There will be two paths, and this is part of the non-Hyperlaunch path which needs to implicitly select kernel and initrd from the module order, the same as today. For hyperlaunch, the device tree explicitly assigns kernel and initrd. Regards, Jason From xen-devel-bounces@lists.xenproject.org Tue Apr 01 18:12:18 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 18:12:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934746.1336358 (Exim 4.92) (envelope-from ) id 1tzg5s-0002Kg-C4; Tue, 01 Apr 2025 18:12:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 934746.1336358; Tue, 01 Apr 2025 18:12:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzg5s-0002KZ-9B; Tue, 01 Apr 2025 18:12:12 +0000 Received: by outflank-mailman (input) for mailman id 934746; Tue, 01 Apr 2025 18:12:10 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzg5q-0002KT-TJ for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 18:12:10 +0000 Received: from nyc.source.kernel.org (nyc.source.kernel.org [147.75.193.91]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id d2d87f46-0f24-11f0-9ffb-bf95429c2676; Tue, 01 Apr 2025 20:12:08 +0200 (CEST) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by nyc.source.kernel.org (Postfix) with ESMTP id 851F8A4056E; Tue, 1 Apr 2025 18:06:38 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8C8E0C4CEE4; Tue, 1 Apr 2025 18:12:04 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: d2d87f46-0f24-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743531127; bh=AMxKMdc6JaXGoDULpx2LsHyyK+9guJAeFHlb18Ysfys=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=RZj2dFPq9CTYBxL2ojDtgvUsvNyjuQ/khq0dVSld02s3uJRixI6q+XQq1UIuEY4l0 GWgtEzhuIvYaGpDgDrggEoO14uv2OFxfPDRBoCjl/jkHU4qEzM4k6n9A4LWZ5r9Vrv UM6EgVkgubAlZTaVD1ccHnaF4IeRHWDejy9pk7e72ZMj93He1g8Nb/ecxbH6ajQyYQ qIWzipxQ1HqPHTeWQo+7Kp2tTp/VKU+nKPAddKsbk/Vdva8kXA641iUyfCY0bFEdB9 uMAvDgqrlSV485Sjwq8YzjzAqhfpKJ4O+5izxRcngML+meYkeqq2DmJuWvfEOKaQSN Ega5cn/gKzE9A== Date: Tue, 1 Apr 2025 11:12:03 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Luca Fancellu cc: xen-devel@lists.xenproject.org, Penny Zheng , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Alistair Francis , Bob Eshleman , Connor Davis , Oleksii Kurochko , Penny Zheng , Wei Chen Subject: Re: [PATCH v4 6/7] xen: introduce Kconfig ARCH_PAGING_MEMPOOL In-Reply-To: <20250401085858.2228991-7-luca.fancellu@arm.com> Message-ID: References: <20250401085858.2228991-1-luca.fancellu@arm.com> <20250401085858.2228991-7-luca.fancellu@arm.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Tue, 1 Apr 2025, Luca Fancellu wrote: > From: Penny Zheng > > ARM MPU system doesn't need to use paging memory pool, as MPU memory > mapping table at most takes only one 4KB page, which is enough to > manage the maximum 255 MPU memory regions, for all EL2 stage 1 > translation and EL1 stage 2 translation. > > Introduce ARCH_PAGING_MEMPOOL Kconfig common symbol, selected for Arm > MMU systems and x86. Removed stubs from RISC-V now that the common code > provide them and the functions are not gonna be used. > > Wrap the code inside 'construct_domU' that deal with p2m paging > allocation in a new function 'domain_p2m_set_allocation', protected > by ARCH_PAGING_MEMPOOL, this is done in this way to prevent polluting > the former function with #ifdefs and improve readability > > Introduce arch_{get,set}_paging_mempool_size stubs for architecture > with !ARCH_PAGING_MEMPOOL. > > Remove 'struct paging_domain' from Arm 'struct arch_domain' when the > field is not required. > > Signed-off-by: Penny Zheng > Signed-off-by: Wei Chen > Signed-off-by: Luca Fancellu > Reviewed-by: Michal Orzel # arm > Reviewed-by: Oleksii Kurochko # riscv Reviewed-by: Stefano Stabellini From xen-devel-bounces@lists.xenproject.org Tue Apr 01 19:51:08 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 19:51:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934778.1336372 (Exim 4.92) (envelope-from ) id 1tzhdQ-00082x-AD; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Apr 2025 19:50:46.6012 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2f57c787-3fd0-4db7-12e5-08dd71567ee4 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF000044A8.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4135 On 3/30/25 18:08, Julien Grall wrote: > Hi Steward, > > On 25/03/2025 17:27, Stewart Hildebrand wrote: >> We expect mmio read handlers to leave the bits above the access size >> zeroed. Add an ASSERT to check this aspect of read handler behavior. >> >> Suggested-by: Roger Pau Monné >> Signed-off-by: Stewart Hildebrand > > With one question below: > > Acked-by: Julien Grall Thanks! >> --- >> v17->v18: >> * no change >> >> v16->v17: >> * new patch >> >> See https://lore.kernel.org/xen-devel/bc6660ef-59f1-4514-9792-067d987e3fbc@xen.org/ >> >> Also see 7db7bd0f319f ("arm/vpci: honor access size when returning an error") >> >> Also see xen/arch/arm/ioreq.c:handle_ioserv() >> --- >>   xen/arch/arm/io.c | 2 ++ >>   1 file changed, 2 insertions(+) >> >> diff --git a/xen/arch/arm/io.c b/xen/arch/arm/io.c >> index 653428e16c1f..68b5dca70026 100644 >> --- a/xen/arch/arm/io.c >> +++ b/xen/arch/arm/io.c >> @@ -37,6 +37,8 @@ static enum io_state handle_read(const struct mmio_handler *handler, >>       if ( !handler->ops->read(v, info, &r, handler->priv) ) >>           return IO_ABORT; >>   +    ASSERT((r & ~GENMASK_ULL((1U << info->dabt.size) * 8 - 1, 0)) == 0); > > OOI, I was expecing GENMASK to be sufficient because "r" is effectively an "unsigned long". So any reason to use GENMASK_ULL? Only reason was that I took inspiration from Roger's suggestion at [1]. However, I agree that GENMASK is indeed sufficient. Feel free to fix up on commit. Lastly, this is OK to commit out of order as there is no dependency on the first patch. [1] https://lore.kernel.org/xen-devel/Zk72jPtd9iXhChbc@macbook/ From xen-devel-bounces@lists.xenproject.org Tue Apr 01 21:10:53 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 21:10:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934805.1336385 (Exim 4.92) (envelope-from ) id 1tzisa-0000kq-5Q; Tue, 01 Apr 2025 21:10:40 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 934805.1336385; Tue, 01 Apr 2025 21:10:40 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzisa-0000kj-15; Tue, 01 Apr 2025 21:10:40 +0000 Received: by outflank-mailman (input) for mailman id 934805; Tue, 01 Apr 2025 21:10:38 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzisX-0000aB-IB for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 21:10:38 +0000 Received: from mail-4316.protonmail.ch (mail-4316.protonmail.ch [185.70.43.16]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id c094f2ba-0f3d-11f0-9ffb-bf95429c2676; Tue, 01 Apr 2025 23:10:35 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: c094f2ba-0f3d-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=proton.me; s=protonmail; t=1743541834; x=1743801034; bh=hj9Bk2XsZOw0d0IurV4cLOQhgFhNNpF0lbwQuOaOKLU=; h=Date:To:From:Cc:Subject:Message-ID:Feedback-ID:From:To:Cc:Date: Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector: List-Unsubscribe:List-Unsubscribe-Post; b=UpLZTEri+Db4cOhxxAp6AIgWz/HyOmNK3HnxiesffMy59SRKx3urscPzf4eP83g2Q ScD4jYaMBOgVZto2E7bq0v35c1wmo4ysVljv1tW5gL4PVXHLNQTspwCkWR4Fnume0x Bk9KnwPiIhivaoDoC3mH8NiZERMNZpsgZG96koNppIs9zlYRPWwiaOZoTW4wu/0q92 eZiRc8rM3VuQe/tJly6wQBrESW9CHkVituigpJMKW7rgIKGqvKdUi+HDx1Fb8mEOuD 4BDZQEZkxYHWbQ90CkXptr7udWG8N/V0haiHV6XmY/FpszLnIeMAjQsvLufpF4kH8r PKvnWfVeFUXqA== Date: Tue, 01 Apr 2025 21:10:28 +0000 To: xen-devel@lists.xenproject.org From: dmkhn@proton.me Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com Subject: [PATCH v2] x86/domain: revisit logging in arch_domain_create() Message-ID: <20250401211018.75814-1-dmukhin@ford.com> Feedback-ID: 123220910:user:proton X-Pm-Message-ID: 839b4d7e9735c64dc9d6a9a104cfc1749e5d14dd MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable From: Denis Mukhin Use %pd in all logs issued from arch_domain_create(). Also, expand error message in arch_domain_create() under !emulation_flags_ok() case to help debugging. Signed-off-by: Denis Mukhin --- Changes since v1: - dropped parentheses around "hardware" in the log message --- xen/arch/x86/domain.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index 4989600627..bd887b4d44 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -791,13 +791,12 @@ int arch_domain_create(struct domain *d, { if ( !opt_allow_unsafe ) { - printk(XENLOG_G_ERR "Xen does not allow DomU creation on this = CPU" - " for security reasons.\n"); + printk(XENLOG_G_ERR "%pd: Xen does not allow DomU creation on = this CPU" + " for security reasons.\n", d); return -EPERM; } printk(XENLOG_G_WARNING - "Dom%d may compromise security on this CPU.\n", - d->domain_id); + "%pd: domain may compromise security on this CPU.\n", d); } =20 emflags =3D config->arch.emulation_flags; @@ -807,16 +806,19 @@ int arch_domain_create(struct domain *d, =20 if ( emflags & ~XEN_X86_EMU_ALL ) { - printk(XENLOG_G_ERR "d%d: Invalid emulation bitmap: %#x\n", - d->domain_id, emflags); + printk(XENLOG_G_ERR "%pd: Invalid emulation bitmap: %#x\n", + d, emflags); return -EINVAL; } =20 if ( !emulation_flags_ok(d, emflags) ) { - printk(XENLOG_G_ERR "d%d: Xen does not allow %s domain creation " + printk(XENLOG_G_ERR "%pd: Xen does not allow %s %sdomain creation = " "with the current selection of emulators: %#x\n", - d->domain_id, is_hvm_domain(d) ? "HVM" : "PV", emflags); + d, + is_hvm_domain(d) ? "HVM" : "PV", + is_hardware_domain(d) ? "hardware " : "", + emflags); return -EOPNOTSUPP; } d->arch.emulation_flags =3D emflags; --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue Apr 01 22:21:37 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 22:21:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934828.1336405 (Exim 4.92) (envelope-from ) id 1tzjzA-0008Gf-7u; Tue, 01 Apr 2025 22:21:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 934828.1336405; Tue, 01 Apr 2025 22:21:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzjzA-0008GW-4v; Tue, 01 Apr 2025 22:21:32 +0000 Received: by outflank-mailman (input) for mailman id 934828; Tue, 01 Apr 2025 22:21:31 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzjz8-00080l-WE for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 22:21:31 +0000 Received: from mail-24417.protonmail.ch (mail-24417.protonmail.ch [109.224.244.17]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id a8fbe079-0f47-11f0-9ea7-5ba50f476ded; Wed, 02 Apr 2025 00:21:30 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: a8fbe079-0f47-11f0-9ea7-5ba50f476ded DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=proton.me; s=protonmail; t=1743546089; x=1743805289; bh=jgn0pg/G4Jnk8NK6PjgRLwbiLA6Q/DQnSJBc+iI7+6w=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector:List-Unsubscribe:List-Unsubscribe-Post; b=Kj4GfBplEZBgaOzQLjYljiB8dTx12lkeNHPHrWY80W8Z3UwfIBKUlxwnVd6+cFEla 76eLuoZRr+NXhjxs9P01u4N+unraBRSmalODrnPb4syAebK/IYCv36ujLmaN5DwV2k zjhvn2qLL1siRIXmq9o+ez9wcgeX0KxDLK0cA9ZnG+gnmX/SfKcBkw6DXZyRjPbm3E 6VGJ2eL0P2XZTtxIuiDWtjsrFNe/zVPgCoPBVgAHShYz1kgsyeCVV1PkMDSffdj6cm d72f3KMDfh97t0RY4fB+s8biiKSdl48VaFvFF/JPLMyu/HGRAsqrGv+Vqq0xnVIsBi /Fm2BQVGb2pOg== Date: Tue, 01 Apr 2025 22:21:26 +0000 To: xen-devel@lists.xenproject.org From: dmkhn@proton.me Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com Subject: [PATCH v1 2/5] x86/vmx: remove HAVE_AS_EPT Message-ID: <20250401222105.79309-3-dmukhin@ford.com> In-Reply-To: <20250401222105.79309-1-dmukhin@ford.com> References: <20250401222105.79309-1-dmukhin@ford.com> Feedback-ID: 123220910:user:proton X-Pm-Message-ID: 3d61b9bcd8c35dfb3a62007efbaea7de840bbdce MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable From: Denis Mukhin Remove the workaround under HAVE_AS_EPT for older compilers, as the minimally required GCC 5.1 / Binutils 2.25, and Clang 11 natively support the VMX instructions used in the hypervisor code. Signed-off-by: Denis Mukhin --- xen/arch/x86/arch.mk | 1 - xen/arch/x86/include/asm/hvm/vmx/vmx.h | 16 ---------------- 2 files changed, 17 deletions(-) diff --git a/xen/arch/x86/arch.mk b/xen/arch/x86/arch.mk index 6e23d3c27c..42c3aa73da 100644 --- a/xen/arch/x86/arch.mk +++ b/xen/arch/x86/arch.mk @@ -11,7 +11,6 @@ CFLAGS +=3D -msoft-float $(call cc-options-add,CFLAGS,CC,$(EMBEDDED_EXTRA_CFLAGS)) $(call cc-option-add,CFLAGS,CC,-Wnested-externs) $(call as-option-add,CFLAGS,CC,"crc32 %eax$(comma)%eax",-DHAVE_AS_SSE4_2) -$(call as-option-add,CFLAGS,CC,"invept (%rax)$(comma)%rax",-DHAVE_AS_EPT) $(call as-option-add,CFLAGS,CC,"rdrand %eax",-DHAVE_AS_RDRAND) $(call as-option-add,CFLAGS,CC,"rdfsbase %rax",-DHAVE_AS_FSGSBASE) $(call as-option-add,CFLAGS,CC,"xsaveopt (%rax)",-DHAVE_AS_XSAVEOPT) diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmx.h b/xen/arch/x86/include/= asm/hvm/vmx/vmx.h index cfa04aa5a4..ce3c067a88 100644 --- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h +++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h @@ -429,21 +429,13 @@ static always_inline void __invept(unsigned long type= , uint64_t eptp) type =3D INVEPT_ALL_CONTEXT; =20 asm volatile ( -#ifdef HAVE_AS_EPT "invept %0, %1\n" -#else - INVEPT_OPCODE MODRM_EAX_08 -#endif /* CF=3D=3D1 or ZF=3D=3D1 --> BUG() */ UNLIKELY_START(be, invept) _ASM_BUGFRAME_TEXT(0) UNLIKELY_END_SECTION : -#ifdef HAVE_AS_EPT : "m" (operand), "r" (type), -#else - : "a" (&operand), "c" (type), -#endif _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, = 0) : "memory" ); } @@ -458,11 +450,7 @@ static always_inline void __invvpid(unsigned long type= , u16 vpid, u64 gva) =20 /* Fix up #UD exceptions which occur when TLBs are flushed before VMXO= N. */ asm volatile ( "1: " -#ifdef HAVE_AS_EPT "invvpid %0, %1\n" -#else - INVVPID_OPCODE MODRM_EAX_08 -#endif /* CF=3D=3D1 or ZF=3D=3D1 --> BUG() */ UNLIKELY_START(be, invvpid) _ASM_BUGFRAME_TEXT(0) @@ -470,11 +458,7 @@ static always_inline void __invvpid(unsigned long type= , u16 vpid, u64 gva) "2:" _ASM_EXTABLE(1b, 2b) : -#ifdef HAVE_AS_EPT : "m" (operand), "r" (type), -#else - : "a" (&operand), "c" (type), -#endif _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, = 0) : "memory" ); } --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue Apr 01 22:21:37 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 22:21:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934829.1336415 (Exim 4.92) (envelope-from ) id 1tzjzB-0008V8-Gh; Tue, 01 Apr 2025 22:21:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 934829.1336415; Tue, 01 Apr 2025 22:21:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzjzB-0008V1-CC; Tue, 01 Apr 2025 22:21:33 +0000 Received: by outflank-mailman (input) for mailman id 934829; Tue, 01 Apr 2025 22:21:31 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzjz9-0008FS-QA for xen-devel@lists.xenproject.org; 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charset=utf-8 Content-Transfer-Encoding: quoted-printable From: Denis Mukhin Remove the workaround under HAVE_AS_VMX for older compilers, as the minimally required GCC 5.1 / Binutils 2.25, and Clang 11 natively support the VMX instructions used in the hypervisor code. Signed-off-by: Denis Mukhin --- xen/arch/x86/arch.mk | 3 +-- xen/arch/x86/include/asm/hvm/vmx/vmx.h | 37 -------------------------- 2 files changed, 1 insertion(+), 39 deletions(-) diff --git a/xen/arch/x86/arch.mk b/xen/arch/x86/arch.mk index cb47d72991..6e23d3c27c 100644 --- a/xen/arch/x86/arch.mk +++ b/xen/arch/x86/arch.mk @@ -10,7 +10,6 @@ CFLAGS +=3D -msoft-float =20 $(call cc-options-add,CFLAGS,CC,$(EMBEDDED_EXTRA_CFLAGS)) $(call cc-option-add,CFLAGS,CC,-Wnested-externs) -$(call as-option-add,CFLAGS,CC,"vmcall",-DHAVE_AS_VMX) $(call as-option-add,CFLAGS,CC,"crc32 %eax$(comma)%eax",-DHAVE_AS_SSE4_2) $(call as-option-add,CFLAGS,CC,"invept (%rax)$(comma)%rax",-DHAVE_AS_EPT) $(call as-option-add,CFLAGS,CC,"rdrand %eax",-DHAVE_AS_RDRAND) @@ -24,7 +23,7 @@ $(call as-option-add,CFLAGS,CC,"invpcid (%rax)$(comma)%ra= x",-DHAVE_AS_INVPCID) $(call as-option-add,CFLAGS,CC,"movdiri %rax$(comma)(%rax)",-DHAVE_AS_MOVD= IR) $(call as-option-add,CFLAGS,CC,"enqcmd (%rax)$(comma)%rax",-DHAVE_AS_ENQCM= D) =20 -# Check to see whether the assmbler supports the .nop directive. +# Check to see whether the assembler supports the .nop directive. $(call as-option-add,CFLAGS,CC,\ ".L1: .L2: .nops (.L2 - .L1)$(comma)9",-DHAVE_AS_NOPS_DIRECTIVE) =20 diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmx.h b/xen/arch/x86/include/= asm/hvm/vmx/vmx.h index 843f8591b9..cfa04aa5a4 100644 --- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h +++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h @@ -310,30 +310,18 @@ extern uint8_t posted_intr_vector; #define INVVPID_ALL_CONTEXT 2 #define INVVPID_SINGLE_CONTEXT_RETAINING_GLOBAL 3 =20 -#ifdef HAVE_AS_VMX # define GAS_VMX_OP(yes, no) yes -#else -# define GAS_VMX_OP(yes, no) no -#endif =20 static always_inline void __vmptrld(u64 addr) { asm volatile ( -#ifdef HAVE_AS_VMX "vmptrld %0\n" -#else - VMPTRLD_OPCODE MODRM_EAX_06 -#endif /* CF=3D=3D1 or ZF=3D=3D1 --> BUG() */ UNLIKELY_START(be, vmptrld) _ASM_BUGFRAME_TEXT(0) UNLIKELY_END_SECTION : -#ifdef HAVE_AS_VMX : "m" (addr), -#else - : "a" (&addr), -#endif _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, = 0) : "memory"); } @@ -341,21 +329,13 @@ static always_inline void __vmptrld(u64 addr) static always_inline void __vmpclear(u64 addr) { asm volatile ( -#ifdef HAVE_AS_VMX "vmclear %0\n" -#else - VMCLEAR_OPCODE MODRM_EAX_06 -#endif /* CF=3D=3D1 or ZF=3D=3D1 --> BUG() */ UNLIKELY_START(be, vmclear) _ASM_BUGFRAME_TEXT(0) UNLIKELY_END_SECTION : -#ifdef HAVE_AS_VMX : "m" (addr), -#else - : "a" (&addr), -#endif _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, = 0) : "memory"); } @@ -363,22 +343,13 @@ static always_inline void __vmpclear(u64 addr) static always_inline void __vmread(unsigned long field, unsigned long *val= ue) { asm volatile ( -#ifdef HAVE_AS_VMX "vmread %1, %0\n\t" -#else - VMREAD_OPCODE MODRM_EAX_ECX -#endif /* CF=3D=3D1 or ZF=3D=3D1 --> BUG() */ UNLIKELY_START(be, vmread) _ASM_BUGFRAME_TEXT(0) UNLIKELY_END_SECTION -#ifdef HAVE_AS_VMX : "=3Drm" (*value) : "r" (field), -#else - : "=3Dc" (*value) - : "a" (field), -#endif _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, = 0) ); } @@ -386,21 +357,13 @@ static always_inline void __vmread(unsigned long fiel= d, unsigned long *value) static always_inline void __vmwrite(unsigned long field, unsigned long val= ue) { asm volatile ( -#ifdef HAVE_AS_VMX "vmwrite %1, %0\n" -#else - VMWRITE_OPCODE MODRM_EAX_ECX -#endif /* CF=3D=3D1 or ZF=3D=3D1 --> BUG() */ UNLIKELY_START(be, vmwrite) _ASM_BUGFRAME_TEXT(0) UNLIKELY_END_SECTION : -#ifdef HAVE_AS_VMX : "r" (field) , "rm" (value), -#else - : "a" (field) , "c" (value), -#endif _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, = 0) ); } --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue Apr 01 22:21:37 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 22:21:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934827.1336394 (Exim 4.92) (envelope-from ) id 1tzjz2-00081J-0r; Tue, 01 Apr 2025 22:21:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 934827.1336394; Tue, 01 Apr 2025 22:21:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzjz1-00081C-UH; Tue, 01 Apr 2025 22:21:23 +0000 Received: by outflank-mailman (input) for mailman id 934827; Tue, 01 Apr 2025 22:21:23 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzjz0-00080l-1U for xen-devel@lists.xenproject.org; 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charset=utf-8 Content-Transfer-Encoding: quoted-printable Patches 1-4 remove various compiler workarounds in the hypervisor code for Intel's VMX instructions. Patch 5 removes compiler workaround for missing clac/stac instructions. CI: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines/174739487= 5 Denis Mukhin (5): x86/vmx: remove HAVE_AS_VMX x86/vmx: remove HAVE_AS_EPT x86/vmx: remove GAS_VMX_OP() x86/vmx: remove *_OPCODE x86/asm: remove HAVE_AS_CLAC_STAC xen/arch/x86/arch.mk | 5 +- xen/arch/x86/include/asm/asm-defns.h | 10 --- xen/arch/x86/include/asm/hvm/vmx/vmx.h | 103 ++++--------------------- 3 files changed, 15 insertions(+), 103 deletions(-) --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue Apr 01 22:21:37 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 22:21:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934830.1336425 (Exim 4.92) (envelope-from ) id 1tzjzF-0000Mf-PW; Tue, 01 Apr 2025 22:21:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 934830.1336425; Tue, 01 Apr 2025 22:21:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzjzF-0000MY-Kt; Tue, 01 Apr 2025 22:21:37 +0000 Received: by outflank-mailman (input) for mailman id 934830; Tue, 01 Apr 2025 22:21:37 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzjzE-00080l-W8 for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 22:21:37 +0000 Received: from mail-4322.protonmail.ch (mail-4322.protonmail.ch [185.70.43.22]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id aca3420c-0f47-11f0-9ea7-5ba50f476ded; Wed, 02 Apr 2025 00:21:36 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: aca3420c-0f47-11f0-9ea7-5ba50f476ded DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=proton.me; s=protonmail; t=1743546095; x=1743805295; bh=N/Gegk4Sj66N/FlyNAXDC53HkooQoIGeUm3rbRAPDd0=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector:List-Unsubscribe:List-Unsubscribe-Post; b=TWrWiogpGw6G6z4iMaY3LJEJ4HO+DMLO0IVvcadrquh764VMRSj3LiI3UkiBRRSbS 7i2+DlfLprIP4770aaDvkLEnBVmJacbyQA1fEtxoEZUsUpUPW1QVPTIWxKnPSYKhZs gFkWs/EdrAPxRqs0nFxc/GGsnLzyL8G7heLmL9JWaHPcYsNpmn35fueoNqt95BQNcC gT2vkPUCKHeuMGdtO7N3KliEovOZm+OxaQJFq9Kb168EjFu2mPOMOOJPYWPtu6YTU5 nNrxZdPm1nTdyx4UJ8SGyIZexauF5lSFlXUhfNVEZBlSj2QOxD4K8De+eQu7lA9X21 6N3j5+4rQ+eUA== Date: Tue, 01 Apr 2025 22:21:29 +0000 To: xen-devel@lists.xenproject.org From: dmkhn@proton.me Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com Subject: [PATCH v1 3/5] x86/vmx: remove GAS_VMX_OP() Message-ID: <20250401222105.79309-4-dmukhin@ford.com> In-Reply-To: <20250401222105.79309-1-dmukhin@ford.com> References: <20250401222105.79309-1-dmukhin@ford.com> Feedback-ID: 123220910:user:proton X-Pm-Message-ID: 93b235a7f48c66273ddf9670081b1e765a1b9a5e MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable From: Denis Mukhin Remove unneeded GAS_VMX_OP() macro, now that all used VMX instuctions are natively supported by the baseline compiler. Signed-off-by: Denis Mukhin --- xen/arch/x86/include/asm/hvm/vmx/vmx.h | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmx.h b/xen/arch/x86/include/= asm/hvm/vmx/vmx.h index ce3c067a88..10c0619108 100644 --- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h +++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h @@ -310,8 +310,6 @@ extern uint8_t posted_intr_vector; #define INVVPID_ALL_CONTEXT 2 #define INVVPID_SINGLE_CONTEXT_RETAINING_GLOBAL 3 =20 -# define GAS_VMX_OP(yes, no) yes - static always_inline void __vmptrld(u64 addr) { asm volatile ( @@ -374,14 +372,13 @@ static inline enum vmx_insn_errno vmread_safe(unsigne= d long field, unsigned long ret =3D VMX_INSN_SUCCEED; bool fail_invalid, fail_valid; =20 - asm volatile ( GAS_VMX_OP("vmread %[field], %[value]\n\t", - VMREAD_OPCODE MODRM_EAX_ECX) + asm volatile ( "vmread %[field], %[value]\n\t" ASM_FLAG_OUT(, "setc %[invalid]\n\t") ASM_FLAG_OUT(, "setz %[valid]\n\t") : ASM_FLAG_OUT("=3D@ccc", [invalid] "=3Drm") (fail_inva= lid), ASM_FLAG_OUT("=3D@ccz", [valid] "=3Drm") (fail_valid)= , - [value] GAS_VMX_OP("=3Drm", "=3Dc") (*value) - : [field] GAS_VMX_OP("r", "a") (field)); + [value] "=3Drm" (*value) + : [field] "r" (field)); =20 if ( unlikely(fail_invalid) ) ret =3D VMX_INSN_FAIL_INVALID; @@ -397,14 +394,13 @@ static inline enum vmx_insn_errno vmwrite_safe(unsign= ed long field, unsigned long ret =3D VMX_INSN_SUCCEED; bool fail_invalid, fail_valid; =20 - asm volatile ( GAS_VMX_OP("vmwrite %[value], %[field]\n\t", - VMWRITE_OPCODE MODRM_EAX_ECX) + asm volatile ( "vmwrite %[value], %[field]\n\t" ASM_FLAG_OUT(, "setc %[invalid]\n\t") ASM_FLAG_OUT(, "setz %[valid]\n\t") : ASM_FLAG_OUT("=3D@ccc", [invalid] "=3Drm") (fail_inva= lid), ASM_FLAG_OUT("=3D@ccz", [valid] "=3Drm") (fail_valid) - : [field] GAS_VMX_OP("r", "a") (field), - [value] GAS_VMX_OP("rm", "c") (value)); + : [field] "r" (field), + [value] "rm" (value)); =20 if ( unlikely(fail_invalid) ) ret =3D VMX_INSN_FAIL_INVALID; --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue Apr 01 22:21:43 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 22:21:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934832.1336435 (Exim 4.92) (envelope-from ) id 1tzjzL-0000kA-0e; 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charset=utf-8 Content-Transfer-Encoding: quoted-printable From: Denis Mukhin Remove all *_OPCODE definitions from vmx.h now that all used VMX instructions are natively supported by the baseline compiler. Use vmxon and vmxoff instructions directly. Update __vmxon() to account for vmxon use. Resolves: https://gitlab.com/xen-project/xen/-/work_items/202 Signed-off-by: Denis Mukhin --- xen/arch/x86/include/asm/hvm/vmx/vmx.h | 34 ++++++-------------------- 1 file changed, 8 insertions(+), 26 deletions(-) diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmx.h b/xen/arch/x86/include/= asm/hvm/vmx/vmx.h index 10c0619108..1d63e49288 100644 --- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h +++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h @@ -257,24 +257,6 @@ typedef union cr_access_qual { #define X86_SEG_AR_GRANULARITY (1u << 15) /* 15, granularity */ #define X86_SEG_AR_SEG_UNUSABLE (1u << 16) /* 16, segment unusable */ =20 -#define VMCALL_OPCODE ".byte 0x0f,0x01,0xc1\n" -#define VMCLEAR_OPCODE ".byte 0x66,0x0f,0xc7\n" /* reg/opcode: /6 = */ -#define VMLAUNCH_OPCODE ".byte 0x0f,0x01,0xc2\n" -#define VMPTRLD_OPCODE ".byte 0x0f,0xc7\n" /* reg/opcode: /6 = */ -#define VMPTRST_OPCODE ".byte 0x0f,0xc7\n" /* reg/opcode: /7 = */ -#define VMREAD_OPCODE ".byte 0x0f,0x78\n" -#define VMRESUME_OPCODE ".byte 0x0f,0x01,0xc3\n" -#define VMWRITE_OPCODE ".byte 0x0f,0x79\n" -#define INVEPT_OPCODE ".byte 0x66,0x0f,0x38,0x80\n" /* m128,r64/32 */ -#define INVVPID_OPCODE ".byte 0x66,0x0f,0x38,0x81\n" /* m128,r64/32 */ -#define VMXOFF_OPCODE ".byte 0x0f,0x01,0xc4\n" -#define VMXON_OPCODE ".byte 0xf3,0x0f,0xc7\n" - -#define MODRM_EAX_08 ".byte 0x08\n" /* ECX, [EAX] */ -#define MODRM_EAX_06 ".byte 0x30\n" /* [EAX], with reg/opcode: /6 */ -#define MODRM_EAX_07 ".byte 0x38\n" /* [EAX], with reg/opcode: /7 */ -#define MODRM_EAX_ECX ".byte 0xc1\n" /* EAX, ECX */ - extern uint8_t posted_intr_vector; =20 #define cpu_has_vmx_ept_exec_only_supported \ @@ -497,9 +479,7 @@ static inline void vpid_sync_all(void) =20 static inline void __vmxoff(void) { - asm volatile ( - VMXOFF_OPCODE - : : : "memory" ); + asm volatile ("vmxoff" : : : "memory"); } =20 static inline int __vmxon(u64 addr) @@ -507,15 +487,17 @@ static inline int __vmxon(u64 addr) int rc; =20 asm volatile (=20 - "1: " VMXON_OPCODE MODRM_EAX_06 "\n" - " setna %b0 ; neg %0\n" /* CF=3D=3D1 or ZF=3D=3D1 --> rc =3D -1 = */ + "1: vmxon (%[addr])\n" + " setna %b[rc]\n" + " neg %[rc]\n" /* CF=3D=3D1 or ZF=3D=3D1 --> rc =3D -1 = */ "2:\n" ".section .fixup,\"ax\"\n" - "3: sub $2,%0 ; jmp 2b\n" /* #UD or #GP --> rc =3D -2 */ + "3: mov $-2, %[rc]\n" + " jmp 2b\n" /* #UD or #GP --> rc =3D -2 */ ".previous\n" _ASM_EXTABLE(1b, 3b) - : "=3Dq" (rc) - : "0" (0), "a" (&addr) + : [rc] "=3Dq" (rc) + : "0" (0), [addr] "r" (&addr) : "memory"); =20 return rc; --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue Apr 01 22:21:45 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 22:21:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934837.1336444 (Exim 4.92) (envelope-from ) id 1tzjzN-00015B-DX; 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charset=utf-8 Content-Transfer-Encoding: quoted-printable From: Denis Mukhin The new toolchain baseline knows the STAC/CLAC instructions, no need to carry the workaround in the code. Resolves: https://gitlab.com/xen-project/xen/-/work_items/203 Signed-off-by: Denis Mukhin --- xen/arch/x86/arch.mk | 1 - xen/arch/x86/include/asm/asm-defns.h | 10 ---------- 2 files changed, 11 deletions(-) diff --git a/xen/arch/x86/arch.mk b/xen/arch/x86/arch.mk index 42c3aa73da..e9fa1c92d7 100644 --- a/xen/arch/x86/arch.mk +++ b/xen/arch/x86/arch.mk @@ -15,7 +15,6 @@ $(call as-option-add,CFLAGS,CC,"rdrand %eax",-DHAVE_AS_RD= RAND) $(call as-option-add,CFLAGS,CC,"rdfsbase %rax",-DHAVE_AS_FSGSBASE) $(call as-option-add,CFLAGS,CC,"xsaveopt (%rax)",-DHAVE_AS_XSAVEOPT) $(call as-option-add,CFLAGS,CC,"rdseed %eax",-DHAVE_AS_RDSEED) -$(call as-option-add,CFLAGS,CC,"clac",-DHAVE_AS_CLAC_STAC) $(call as-option-add,CFLAGS,CC,"clwb (%rax)",-DHAVE_AS_CLWB) $(call as-option-add,CFLAGS,CC,".equ \"x\"$(comma)1",-DHAVE_AS_QUOTED_SYM) $(call as-option-add,CFLAGS,CC,"invpcid (%rax)$(comma)%rax",-DHAVE_AS_INVP= CID) diff --git a/xen/arch/x86/include/asm/asm-defns.h b/xen/arch/x86/include/as= m/asm-defns.h index 32d6b44910..ab653f3218 100644 --- a/xen/arch/x86/include/asm/asm-defns.h +++ b/xen/arch/x86/include/asm/asm-defns.h @@ -1,15 +1,5 @@ #include =20 -#ifndef HAVE_AS_CLAC_STAC -.macro clac - .byte 0x0f, 0x01, 0xca -.endm - -.macro stac - .byte 0x0f, 0x01, 0xcb -.endm -#endif - .macro vmrun .byte 0x0f, 0x01, 0xd8 .endm --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue Apr 01 22:28:56 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 22:28:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934866.1336455 (Exim 4.92) (envelope-from ) id 1tzk6G-0002r6-23; Tue, 01 Apr 2025 22:28:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 934866.1336455; Tue, 01 Apr 2025 22:28:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzk6F-0002qz-VV; Tue, 01 Apr 2025 22:28:51 +0000 Received: by outflank-mailman (input) for mailman id 934866; Tue, 01 Apr 2025 22:28:50 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzk6E-0002qt-4A for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 22:28:50 +0000 Received: from mail-wr1-x42f.google.com (mail-wr1-x42f.google.com [2a00:1450:4864:20::42f]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id adca464e-0f48-11f0-9ffb-bf95429c2676; Wed, 02 Apr 2025 00:28:47 +0200 (CEST) Received: by mail-wr1-x42f.google.com with SMTP id ffacd0b85a97d-39149bccb69so5360014f8f.2 for ; Tue, 01 Apr 2025 15:28:47 -0700 (PDT) Received: from [192.168.1.183] (host-92-26-98-202.as13285.net. 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Tue, 01 Apr 2025 15:28:47 -0700 (PDT) Message-ID: <86249b96-ae02-41c9-9aa9-08958b26b87a@citrix.com> Date: Tue, 1 Apr 2025 23:28:45 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 5/5] x86/asm: remove HAVE_AS_CLAC_STAC To: dmkhn@proton.me, xen-devel@lists.xenproject.org Cc: anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com References: <20250401222105.79309-1-dmukhin@ford.com> <20250401222105.79309-6-dmukhin@ford.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <20250401222105.79309-6-dmukhin@ford.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 01/04/2025 11:21 pm, dmkhn@proton.me wrote: > From: Denis Mukhin > > The new toolchain baseline knows the STAC/CLAC instructions, > no need to carry the workaround in the code. > > Resolves: https://gitlab.com/xen-project/xen/-/work_items/203 > Signed-off-by: Denis Mukhin Reviewed-by: Andrew Cooper From xen-devel-bounces@lists.xenproject.org Tue Apr 01 22:47:15 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 22:47:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934915.1336465 (Exim 4.92) (envelope-from ) id 1tzkNx-0007oR-EL; Tue, 01 Apr 2025 22:47:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 934915.1336465; Tue, 01 Apr 2025 22:47:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzkNx-0007oK-Bd; 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Tue, 01 Apr 2025 15:47:05 -0700 (PDT) Message-ID: Date: Tue, 1 Apr 2025 23:47:04 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 4/5] x86/vmx: remove *_OPCODE To: dmkhn@proton.me, xen-devel@lists.xenproject.org Cc: anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com References: <20250401222105.79309-1-dmukhin@ford.com> <20250401222105.79309-5-dmukhin@ford.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <20250401222105.79309-5-dmukhin@ford.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 01/04/2025 11:21 pm, dmkhn@proton.me wrote: > diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmx.h b/xen/arch/x86/include/asm/hvm/vmx/vmx.h > index 10c0619108..1d63e49288 100644 > --- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h > +++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h > @@ -507,15 +487,17 @@ static inline int __vmxon(u64 addr) > int rc; > > asm volatile ( > - "1: " VMXON_OPCODE MODRM_EAX_06 "\n" > - " setna %b0 ; neg %0\n" /* CF==1 or ZF==1 --> rc = -1 */ > + "1: vmxon (%[addr])\n" > + " setna %b[rc]\n" > + " neg %[rc]\n" /* CF==1 or ZF==1 --> rc = -1 */ > "2:\n" > ".section .fixup,\"ax\"\n" > - "3: sub $2,%0 ; jmp 2b\n" /* #UD or #GP --> rc = -2 */ > + "3: mov $-2, %[rc]\n" > + " jmp 2b\n" /* #UD or #GP --> rc = -2 */ > ".previous\n" > _ASM_EXTABLE(1b, 3b) > - : "=q" (rc) > - : "0" (0), "a" (&addr) > + : [rc] "=q" (rc) > + : "0" (0), [addr] "r" (&addr) > : "memory"); > > return rc; A variant of this patch (improvements to __vmxon() helper, or whatever) probably wants pulling out and doing earlier. For the function parameter, u64 addr wants to become paddr_t addr. Use "int rc = 0;" and [rc] "+q" (rc).  That takes away the "0" (0) that is otherwise unconnected. Next, "vmxon %[addr]" and [addr] "m" (addr).   The VMXON instruction strictly takes an m64 operand, and it doesn't need bouncing through another register. Finally, __vmx{on,off}() have single callers only in vmcs.c, and really shouldn't be in vmx.h which is included ~everywhere.  You can move them into vmcs.c (probably after parse_ept_param_runtime()) to limit their scope. ~Andrew From xen-devel-bounces@lists.xenproject.org Tue Apr 01 22:48:53 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 22:48:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934926.1336476 (Exim 4.92) (envelope-from ) id 1tzkPc-0008NE-Qh; Tue, 01 Apr 2025 22:48:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 934926.1336476; Tue, 01 Apr 2025 22:48:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzkPc-0008N7-LO; Tue, 01 Apr 2025 22:48:52 +0000 Received: by outflank-mailman (input) for mailman id 934926; Tue, 01 Apr 2025 22:48:51 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzkPb-0008Mz-9B for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 22:48:51 +0000 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [2a00:1450:4864:20::32a]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 7aa76cd7-0f4b-11f0-9ea7-5ba50f476ded; Wed, 02 Apr 2025 00:48:50 +0200 (CEST) Received: by mail-wm1-x32a.google.com with SMTP id 5b1f17b1804b1-43d04dc73b7so66663135e9.3 for ; Tue, 01 Apr 2025 15:48:50 -0700 (PDT) Received: from [192.168.1.183] (host-92-26-98-202.as13285.net. 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Tue, 01 Apr 2025 15:48:49 -0700 (PDT) Message-ID: Date: Tue, 1 Apr 2025 23:48:48 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 0/5] x86/asm: cleanups after toolchain baseline upgrade To: dmkhn@proton.me, xen-devel@lists.xenproject.org Cc: anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com References: <20250401222105.79309-1-dmukhin@ford.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <20250401222105.79309-1-dmukhin@ford.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 01/04/2025 11:21 pm, dmkhn@proton.me wrote: > Patches 1-4 remove various compiler workarounds in the hypervisor code > for Intel's VMX instructions. > > Patch 5 removes compiler workaround for missing clac/stac instructions. > > CI: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines/1747394875 > > Denis Mukhin (5): > x86/vmx: remove HAVE_AS_VMX > x86/vmx: remove HAVE_AS_EPT > x86/vmx: remove GAS_VMX_OP() > x86/vmx: remove *_OPCODE These are fine, but probably ought to be merged because they're all really one thing. When you've pulled the __vmx{on,off}() cleanup into a separate patch, the remains of patch 4 becomes straight deletion, which also means that Resolves: https://gitlab.com/xen-project/xen/-/work_items/202 is the commit with almost all of the work in it. ~Andrew From xen-devel-bounces@lists.xenproject.org Tue Apr 01 23:08:43 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 23:08:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934942.1336485 (Exim 4.92) (envelope-from ) id 1tzkij-00059n-CJ; Tue, 01 Apr 2025 23:08:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 934942.1336485; Tue, 01 Apr 2025 23:08:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzkij-00059g-8n; Tue, 01 Apr 2025 23:08:37 +0000 Received: by outflank-mailman (input) for mailman id 934942; Tue, 01 Apr 2025 23:08:36 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzkii-00059a-4J for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 23:08:36 +0000 Received: from tor.source.kernel.org (tor.source.kernel.org [2600:3c04:e001:324:0:1991:8:25]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 3b85154b-0f4e-11f0-9ffb-bf95429c2676; Wed, 02 Apr 2025 01:08:33 +0200 (CEST) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 864C261126; Tue, 1 Apr 2025 23:08:25 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 60808C4CEE8; Tue, 1 Apr 2025 23:08:31 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 3b85154b-0f4e-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743548911; bh=O0DqrMi9IZgLWlhMTuVoVpTy+cO5VFLimM8+bVoSttc=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=PYD4jZaDt5gNCIoCaDRpTqwCGtzoclfH3/trtwSzLQZADUsKDrENGVSrUua2TMJz/ achF67uVWDFmZU9PLIeZK+kT2yEbtQi27llQO8BkgqnS04RydKoH4TcgVYpvt5ucA5 X61p4IlTc8UNHeHU5zd7c0XnC4BasNAavL/8PcglTUld6Fl/LMkTPXfPWTB/0gr+uR 0yrDHhaVGOsC81H9Yv1e4020c9XjdtguAH8GlCG6Lx+nVzlWtzgGcvIKyGtD9Ac7ea 4OKEgwbxQFvxZjkCuGslm2hgXXAB016fzGnxDaznlaooDHi10hRBEb1MLVvu3IwU7C a74bSrs6K1iyQ== Date: Tue, 1 Apr 2025 16:08:29 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Roger Pau Monne cc: xen-devel@lists.xenproject.org, Doug Goldstein , Stefano Stabellini Subject: Re: [PATCH v2 01/11] automation/dockers: add to README how to rebuild all containers In-Reply-To: <20250401130840.72119-2-roger.pau@citrix.com> Message-ID: References: <20250401130840.72119-1-roger.pau@citrix.com> <20250401130840.72119-2-roger.pau@citrix.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="8323329-1052309063-1743548911=:3098208" This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323329-1052309063-1743548911=:3098208 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT On Tue, 1 Apr 2025, Roger Pau Monne wrote: > Document in the README how to rebuild all containers. This is helpful when > populating a local docker registry for testing purposes. > > Signed-off-by: Roger Pau Monné Reviewed-by: Stefano Stabellini > --- > automation/build/README.md | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/automation/build/README.md b/automation/build/README.md > index ecc898680c91..6c647b1b2a68 100644 > --- a/automation/build/README.md > +++ b/automation/build/README.md > @@ -108,6 +108,13 @@ env CONTAINER_NO_PULL=1 \ > make -C automation/build opensuse/tumbleweed-x86_64 PUSH=1 > ``` > > +To rebuild all containers the `all` make target can be used, with or without > +the `PUSH` environment variable: > + > +``` > +make -C automation/build all PUSH=1 > +``` > + > [BuildKit]: https://docs.docker.com/build/buildkit/ > [registry]: https://gitlab.com/xen-project/xen/container_registry > [registry help]: https://docs.gitlab.com/ee/user/packages/container_registry/ > -- > 2.48.1 > --8323329-1052309063-1743548911=:3098208-- From xen-devel-bounces@lists.xenproject.org Tue Apr 01 23:35:05 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 23:35:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934955.1336495 (Exim 4.92) (envelope-from ) id 1tzl89-00042h-BM; Tue, 01 Apr 2025 23:34:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 934955.1336495; Tue, 01 Apr 2025 23:34:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzl89-00042a-8V; Tue, 01 Apr 2025 23:34:53 +0000 Received: by outflank-mailman (input) for mailman id 934955; Tue, 01 Apr 2025 23:34:51 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzl87-00042U-Sj for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 23:34:51 +0000 Received: from mail-wr1-x432.google.com (mail-wr1-x432.google.com [2a00:1450:4864:20::432]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id e672c5e4-0f51-11f0-9ffb-bf95429c2676; Wed, 02 Apr 2025 01:34:48 +0200 (CEST) Received: by mail-wr1-x432.google.com with SMTP id ffacd0b85a97d-38f2f391864so3663270f8f.3 for ; Tue, 01 Apr 2025 16:34:48 -0700 (PDT) Received: from localhost.localdomain (host-92-26-98-202.as13285.net. [92.26.98.202]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c0b7a420bsm15112429f8f.82.2025.04.01.16.34.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Apr 2025 16:34:47 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: e672c5e4-0f51-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1743550487; x=1744155287; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=11+pzo1svboxI/YVj1ud4vGVrzsTT62DWsIKE6oIun8=; b=ar1Ve6vvFzijaqXpz68ICoek1masWhEIM4dDyofoAKu10AkSWuPquppDIyAeqbiajj RT7EC/Z0MjAlZlLw4+4L4ey0oUCpRpShBvI3UItVlqKHzgjrEagUZZanhkYAr7uoopAj HUiKKXEK9PrPs+EAz/0CKVeJhAEBWB2AqefnY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743550487; x=1744155287; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=11+pzo1svboxI/YVj1ud4vGVrzsTT62DWsIKE6oIun8=; b=vAKeCu93TLCfrUyqEnq5ue+BI6wbD7Lk/v3/To5re4TrZ4npUT5FlHjFGEqnBCN9hX MOF7MvJCCae9IOOseo8mxu/j5VlWBPC/3lWWYcBJJC+1IK/TQY1kJdpndsmihEyi0Wcf NY8wuAOJsA2W+Dd6hpLn52lWbC393sfl1yunAgFwBzgtKVjzWumH+Hcp7eQhJoX+QJQt KY8adm66jC1D2RJ2T6HEZnPM/kI28xb6cEyTpMnGAyl9xwy/1OkLQmJMxZCVqoESW22i iLuC9q322obsu/iooWNYi7pBL2VDq9G8d03VhjzAH9qxSJIph4jsDUdGSgWZ4v9lS1DE yBRg== X-Gm-Message-State: AOJu0Ywhv6lpOSFOaxw5fMdAOO68JmNkKOnrqTcpkyO5dM0PAebfZEzl /ES/22HhtkUHPALarapWVlaiSiI60jvh86CCvVgIlEZ7jLJcuhThduaNxkW8EtXJE3BDyM7dWoJ dPFY= X-Gm-Gg: ASbGncv0BMjWLdjphy1SLyZ4rdL2roUx2XPIDeJXcFzZfqwus7/luDyffoF2vPRrUuI z239l89uWcY0XVgDQGZ+bockwsqMvr6Oc6Ue3QkmqFhtvh5bEzhhc6H4ZpPF9zut+m49ApWZN0f 3M8eUlAMw70AIzpGxRw9MwJj7F8JSdIwBlsg/U1rF16hgH7DQwsj7dxyvOITmI4cv+K6ndhSjWS t5Do1k82NVFZrGqebXXrOehwglJJk1NUUIog24rhgnpBV/Qj/CmFmPToaRgrGNjqgguCqDM41SM yg21otwlMMQb0qalwBohoKbrwjeEBJMck80QuuT+gArt0yRcR7LIwSqAXZ2R4U8EPlkCOZJphby 0K7moUtKvDoNcVcazyg== X-Google-Smtp-Source: AGHT+IE9KXUXpXN32iC3blhVw9ysb6pqdH1yGnKrh++3/JIxyC04X2Q0pWjHmEQebhtOqwSQmruzJw== X-Received: by 2002:a5d:6d8e:0:b0:391:3aab:a7d0 with SMTP id ffacd0b85a97d-39c120dd0e0mr10964903f8f.19.1743550487525; Tue, 01 Apr 2025 16:34:47 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , dmkhn@proton.me Subject: [PATCH RFC] x86/vmx: Use asm goto() in _vmx_cpu_up() Date: Wed, 2 Apr 2025 00:34:44 +0100 Message-Id: <20250401233444.1181076-1-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit With the new toolchain baseline, we can make use of asm goto() in certain places, and the VMXON invocation is one example. This removes the logic to set up rc (including a fixup section where bactraces have no connection to the invoking function), the logic to decode it, and the default case which was dead but in a way the compiler couldn't prove previously. No functional change. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné CC: dmkhn@proton.me RFC. To be rebased over Denis' general cleanup. In principle, we can split fail into fail_valid and fail_invalid, allowing us to spot the VMfail("VMXON executed in VMX root operation") case from the pseduocode. However, getting that involves a VMREAD of VM_INSTRUCTION_ERROR, and error handling in case there isn't a loaded VMCS, so I think the complexity is unwarranted in this case. Bloat-o-meter: add/remove: 0/0 grow/shrink: 1/1 up/down: 13/-32 (-19) Function old new delta _vmx_cpu_up.cold 2460 2473 +13 _vmx_cpu_up 1803 1771 -32 The if ( 0 ) isn't terribly nice, but it's the least bad option I could come up with. It does allow the structure of the switch() to remain largely intact. --- xen/arch/x86/hvm/vmx/vmcs.c | 21 ++++++++++++--------- xen/arch/x86/include/asm/hvm/vmx/vmx.h | 19 ------------------- 2 files changed, 12 insertions(+), 28 deletions(-) diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c index 0ba65becec1e..98f56b636fb3 100644 --- a/xen/arch/x86/hvm/vmx/vmcs.c +++ b/xen/arch/x86/hvm/vmx/vmcs.c @@ -749,9 +749,16 @@ static int _vmx_cpu_up(bool bsp) if ( bsp && (rc = vmx_cpu_up_prepare(cpu)) != 0 ) return rc; - switch ( __vmxon(this_cpu(vmxon_region)) ) + asm goto ( "1: vmxon %[addr]\n\t" + "jbe %l[fail]\n\t" + _ASM_EXTABLE(1b, %l[fault]) + : + : [addr] "m" (this_cpu(vmxon_region)) + : + : fail, fault ); + if ( 0 ) /* asm goto error paths */ { - case -2: /* #UD or #GP */ + fault: if ( bios_locked && test_bit(X86_FEATURE_SMX, &boot_cpu_data.x86_capability) && (!(eax & IA32_FEATURE_CONTROL_ENABLE_VMXON_OUTSIDE_SMX) || @@ -763,17 +770,13 @@ static int _vmx_cpu_up(bool bsp) "bootloader.\n"); return -EINVAL; } - /* fall through */ - case -1: /* CF==1 or ZF==1 */ + fail: printk("CPU%d: unexpected VMXON failure\n", cpu); return -EINVAL; - case 0: /* success */ - this_cpu(vmxon) = 1; - break; - default: - BUG(); } + this_cpu(vmxon) = 1; + hvm_asid_init(cpu_has_vmx_vpid ? (1u << VMCS_VPID_WIDTH) : 0); if ( cpu_has_vmx_ept ) diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmx.h b/xen/arch/x86/include/asm/hvm/vmx/vmx.h index 843f8591b9cf..7c6ba7340744 100644 --- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h +++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h @@ -559,25 +559,6 @@ static inline void __vmxoff(void) : : : "memory" ); } -static inline int __vmxon(u64 addr) -{ - int rc; - - asm volatile ( - "1: " VMXON_OPCODE MODRM_EAX_06 "\n" - " setna %b0 ; neg %0\n" /* CF==1 or ZF==1 --> rc = -1 */ - "2:\n" - ".section .fixup,\"ax\"\n" - "3: sub $2,%0 ; jmp 2b\n" /* #UD or #GP --> rc = -2 */ - ".previous\n" - _ASM_EXTABLE(1b, 3b) - : "=q" (rc) - : "0" (0), "a" (&addr) - : "memory"); - - return rc; -} - int cf_check vmx_guest_x86_mode(struct vcpu *v); unsigned int vmx_get_cpl(void); base-commit: cff389bca78885447c8cfa381e058c6fb983df9c -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Tue Apr 01 23:45:28 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 23:45:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934967.1336505 (Exim 4.92) (envelope-from ) id 1tzlIJ-0006sU-AM; Tue, 01 Apr 2025 23:45:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 934967.1336505; Tue, 01 Apr 2025 23:45:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzlIJ-0006sN-61; Tue, 01 Apr 2025 23:45:23 +0000 Received: by outflank-mailman (input) for mailman id 934967; Tue, 01 Apr 2025 23:45:22 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzlII-0006sF-Jn for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 23:45:22 +0000 Received: from nyc.source.kernel.org (nyc.source.kernel.org [147.75.193.91]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 5e93d484-0f53-11f0-9ea7-5ba50f476ded; Wed, 02 Apr 2025 01:45:20 +0200 (CEST) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by nyc.source.kernel.org (Postfix) with ESMTP id E5340A407DB; Tue, 1 Apr 2025 23:39:49 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 57B59C4CEE4; Tue, 1 Apr 2025 23:45:17 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 5e93d484-0f53-11f0-9ea7-5ba50f476ded DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743551118; bh=bx2xmAHe99qpI7vjn3RgzY1hVk9yZPYcw4BBFjrMsIs=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=o4hkc5I1P2TXhQqXPHrVam8kemtOXNr+sTpvMavU2xUy/m6RoJ/2uiPpD108KRfnw wZBkMpi5DJa5tGq7GKbEePsugv2eUia1kYhA/ZxXijOsUAghjdgzDYpu11d466TVpm K+hBXaxudOGt04sTTEkL4C95CL3ahgBiTW2E2ii5DXaoU8E13hz40MwVOBFFZE6+AR KkQ3rbV+ZlgoNQugKddKBXHtNW0lVy0R7RbM5CsePhYLquRzDDK7fEFFduwTaiRTly NC1g60w5nF3NWd72zOLJsnfiMFluHPhF9WciBV8b/KBv87Hh1SalhPys1BCo/I9o5H aYEQ2mSMz2Dkg== Date: Tue, 1 Apr 2025 16:45:15 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jason Andryuk cc: xen-devel@lists.xenproject.org, Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Subject: Re: [PATCH v2 3/6] xen/arm: dom0less delay xenstore initialization In-Reply-To: <20250331214321.205331-4-jason.andryuk@amd.com> Message-ID: References: <20250331214321.205331-1-jason.andryuk@amd.com> <20250331214321.205331-4-jason.andryuk@amd.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Mon, 31 Mar 2025, Jason Andryuk wrote: > To allocate the xenstore event channel and initialize the grant table > entry, the xenstore domid is neeed. A dom0 is created before the domUs, > so it is normally available through hardware_domain. With capabilities > and dom0less, the xenstore domain may not be created first. > > Keep the population of the page and HVM_PARAM_STORE_PFN in the normal > domain construction, but delay event channel creation and grant seeding > to after all domUs are created. HVM_PARAM_STORE_PFN now serves as > indication to setup xenstore since the device tree is no longer > immediately available. 0 means no xenstore. ~0ULL means legacy so only > the event channel needs setup, and any other value means to seed the > page. > > dom0 needs to set xs_domid when it is serving as the xenstore domain. > > The domain running xenstored needs to be the handler for VIRQ_DOM_EXC, > so set that as well - it otherwise defaults to hardware domain. > > Signed-off-by: Jason Andryuk > --- > v2: > Re-order ahead of seeding. > Fix created type in commit message > Change set_xs_domid to set_xs_domain > Set xenstore domain as VIRQ_DOM_EXC handler > > Signed-off-by: Jason Andryuk > --- > xen/arch/arm/dom0less-build.c | 67 +++++++++++++++++------ > xen/arch/arm/domain_build.c | 2 + > xen/arch/arm/include/asm/dom0less-build.h | 2 + > 3 files changed, 53 insertions(+), 18 deletions(-) > > diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c > index e25d7bd468..a46f292c1f 100644 > --- a/xen/arch/arm/dom0less-build.c > +++ b/xen/arch/arm/dom0less-build.c > @@ -20,6 +20,15 @@ > #include > #include > > +static domid_t __initdata xs_domid = DOMID_INVALID; > +static bool __initdata need_xenstore; > + > +void __init set_xs_domain(struct domain *d) > +{ > + xs_domid = d->domain_id; > + set_global_virq_handler(d, VIRQ_DOM_EXC); > +} > + > bool __init is_dom0less_mode(void) > { > struct bootmodules *mods = &bootinfo.modules; > @@ -694,7 +703,7 @@ static int __init alloc_xenstore_evtchn(struct domain *d) > int rc; > > alloc.dom = d->domain_id; > - alloc.remote_dom = hardware_domain->domain_id; > + alloc.remote_dom = xs_domid; > rc = evtchn_alloc_unbound(&alloc, 0); > if ( rc ) > { > @@ -760,16 +769,10 @@ static int __init alloc_xenstore_params(struct kernel_info *kinfo) > struct domain *d = kinfo->d; > int rc = 0; > > - if ( kinfo->dom0less_feature & (DOM0LESS_XENSTORE | DOM0LESS_XS_LEGACY) ) > - { > - ASSERT(hardware_domain); > - rc = alloc_xenstore_evtchn(d); > - if ( rc < 0 ) > - return rc; > + if ( (kinfo->dom0less_feature & (DOM0LESS_XENSTORE | DOM0LESS_XS_LEGACY)) > + == (DOM0LESS_XENSTORE | DOM0LESS_XS_LEGACY) ) > d->arch.hvm.params[HVM_PARAM_STORE_PFN] = ~0ULL; > - } > - > - if ( kinfo->dom0less_feature & DOM0LESS_XENSTORE ) > + else if ( kinfo->dom0less_feature & DOM0LESS_XENSTORE ) > { > rc = alloc_xenstore_page(d); > if ( rc < 0 ) > @@ -841,6 +844,30 @@ static void __init domain_vcpu_affinity(struct domain *d, > } > } > > +static void __init initialize_domU_xenstore(void) > +{ > + struct domain *d; > + > + if ( xs_domid == DOMID_INVALID ) > + return; > + > + for_each_domain( d ) > + { > + unsigned long gfn = d->arch.hvm.params[HVM_PARAM_STORE_PFN]; This should be uint64_t. With that change: Reviewed-by: Stefano Stabellini > + int rc; > + > + if ( gfn == 0 ) > + continue; > + > + if ( is_xenstore_domain(d) ) > + continue; > + > + rc = alloc_xenstore_evtchn(d); > + if ( rc < 0 ) > + panic("%pd: Failed to allocate xenstore_evtchn\n", d); > + } > +} > + > static int __init construct_domU(struct domain *d, > const struct dt_device_node *node) > { From xen-devel-bounces@lists.xenproject.org Tue Apr 01 23:51:09 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 01 Apr 2025 23:51:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.934979.1336514 (Exim 4.92) (envelope-from ) id 1tzlNn-0000TC-Rs; Tue, 01 Apr 2025 23:51:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 934979.1336514; Tue, 01 Apr 2025 23:51:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzlNn-0000T5-PK; Tue, 01 Apr 2025 23:51:03 +0000 Received: by outflank-mailman (input) for mailman id 934979; Tue, 01 Apr 2025 23:51:02 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzlNm-0000QM-Cs for xen-devel@lists.xenproject.org; Tue, 01 Apr 2025 23:51:02 +0000 Received: from nyc.source.kernel.org (nyc.source.kernel.org [147.75.193.91]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 2992d128-0f54-11f0-9ffb-bf95429c2676; Wed, 02 Apr 2025 01:51:00 +0200 (CEST) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by nyc.source.kernel.org (Postfix) with ESMTP id 74B87A41712; Tue, 1 Apr 2025 23:45:30 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 80B8FC4CEE4; Tue, 1 Apr 2025 23:50:57 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 2992d128-0f54-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743551459; bh=MyoYIGMJ4pQJ4sDHjS7J1+l6z+LyNDtoYmiWxCj1zac=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=SD/rmbGdSArZlsrwYPEFe+gAbJvLX0Ht2Zzn+P+mLF3zI3xt1JLaFfEiRYUto8pDd jeicG10QeeT9+GOO2kUpLukJPPSFwTh/gZbj3fvWdRmDANLrHBl66qLQ+8hYfLPJoB uu9dTwyjHiAzQ7NGiFTxSI8W2NAqPQTwSH8xHwub4qChOwIPDTXnDf+LgFC7j+Jm3I DFWqkUANWu8/RtQ6ZCq9pGNiezt9iSSSROfl7cmgT792CiJV1uDO8hD4qptFA7G17c TnogyGjJ54W05Au1nTa5L8p1PyYExBwfFYAFqr/qw3LbGyjhvdezsMYtmd3RmMPdFG z6QfWY6rJBPTQ== Date: Tue, 1 Apr 2025 16:50:55 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jason Andryuk cc: Jan Beulich , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , xen-devel@lists.xenproject.org Subject: Re: [PATCH v2 4/6] xen/arm: dom0less seed xenstore grant table entry In-Reply-To: <3d800459-7762-427e-8765-044adbb6459e@amd.com> Message-ID: References: <20250331214321.205331-1-jason.andryuk@amd.com> <20250331214321.205331-5-jason.andryuk@amd.com> <6765d129-66dc-48d9-aaac-2b973edfda80@suse.com> <3d800459-7762-427e-8765-044adbb6459e@amd.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Tue, 1 Apr 2025, Jason Andryuk wrote: > On 2025-04-01 08:16, Jan Beulich wrote: > > On 31.03.2025 23:43, Jason Andryuk wrote: > > > > --- a/xen/arch/arm/dom0less-build.c > > > +++ b/xen/arch/arm/dom0less-build.c > > > @@ -865,6 +865,10 @@ static void __init initialize_domU_xenstore(void) > > > rc = alloc_xenstore_evtchn(d); > > > if ( rc < 0 ) > > > panic("%pd: Failed to allocate xenstore_evtchn\n", d); > > > + > > > + if ( gfn != ~0ULL ) > > > > Is this an odd open-coding of INVALID_GFN? And even if not - why ULL when > > "gfn" is unsigned long? The way you have it the condition will always be > > false on Arm32, if I'm not mistaken. > > The gfn is pulled out of the HVM_PARAMS, which is a uint64_t. It is set like: > > d->arch.hvm.params[HVM_PARAM_STORE_PFN] = ~0ULL; > > But pulled out by: > > unsigned long gfn = d->arch.hvm.params[HVM_PARAM_STORE_PFN]; > > So your comment highlights that unsigned long is incorrect for ARM32. > > While I realize fixed types are discouraged, I'd prefer to use uint64_t for > the replacement. That is the type of HVM_PARAMS, and uint64_t is used on the > init-dom0less side as well. Using unsigned long long to get a 64bit value on > ARM32 seems less clear to me. The types that correspond to hypercall struct field types should match the hypercall struct field types. I think gfn should be uint64_t to match the definition of params. Similarly among the arguments of gnttab_seed_entry, flags should be uint16_t and I think frame should be uint32_t. This last one I am confused why you defined it as uint64_t, maybe I am missing something. From xen-devel-bounces@lists.xenproject.org Wed Apr 02 00:04:04 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 00:04:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935000.1336524 (Exim 4.92) (envelope-from ) id 1tzlaI-0004oW-UR; Wed, 02 Apr 2025 00:03:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935000.1336524; Wed, 02 Apr 2025 00:03:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzlaI-0004oP-Rm; Wed, 02 Apr 2025 00:03:58 +0000 Received: by outflank-mailman (input) for mailman id 935000; Wed, 02 Apr 2025 00:03:56 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzlaG-0004oJ-Pj for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 00:03:56 +0000 Received: from tor.source.kernel.org (tor.source.kernel.org [172.105.4.254]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id f6ddef03-0f55-11f0-9ffb-bf95429c2676; Wed, 02 Apr 2025 02:03:54 +0200 (CEST) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 4040B61129; Wed, 2 Apr 2025 00:03:46 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E3B01C4CEE4; Wed, 2 Apr 2025 00:03:50 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: f6ddef03-0f55-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743552232; bh=jT/+pCeWK8jt5gV1YwLnACokaY0EoUF0vSAd9cxvZwU=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=FtsBGhVSz406sBEBKBZGM5p0RkhZAcUxtosbc3I6r03khjN3jEyWNj87i24Qv5hR7 DClGoubpnRnCachofzK+cv5KPRtGQMwL/83zLm+w18qZ6o+hZKHFmTtmFS9g8PcWDC CqzY8MV0vSQHDrGmr06STz3S0zHr+AwomrCVFpTaPLOqgBS/K5VUr0e3Wq9Fl8T8SZ rkKdqvTChQ23Atch+FQPbTxb16zGg44OTnCIyzWxZF5LYrEMvBeym5VqJH0fSHmBmy x/XaXmDTIZBfTxfP8lGesNC8FB5PvWosnzfMuR9XfxJQPX5NWvv0Lqv7eiTKU1geD+ ZPiSUZ3aOT1Qw== Date: Tue, 1 Apr 2025 17:03:49 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jason Andryuk cc: xen-devel@lists.xenproject.org, Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Subject: Re: [PATCH v2 6/6] xen/arm: Add capabilities to dom0less In-Reply-To: <20250331214321.205331-7-jason.andryuk@amd.com> Message-ID: References: <20250331214321.205331-1-jason.andryuk@amd.com> <20250331214321.205331-7-jason.andryuk@amd.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Mon, 31 Mar 2025, Jason Andryuk wrote: > Add capabilities property to dom0less to allow building a > disaggregated system. Only a single hardware domain and single xenstore > domain can be specified. Multiple control domains are possible. > > Introduce bootfdt.h to contain these constants. > > When using the hardware or xenstore capabilities, adjust the grant and > event channel limits similar to dom0. > > For a hardware domain, require an IOMMU and disallow specifying a vpl011 > console or nr_spis. > > Signed-off-by: Jason Andryuk > --- > v2: > Fix comment style > Make DOMAIN_CAPS_* unsigned > Remove forced directmap & iommu > Require iommu with use of hardware domain > Limit to a single xenstore domain > > There is overlap with hyperlaunch. The numeric values are the same. > Hyperlaunch doesn't expose the values in a public header as done here. > Is this to be expected for dom0less? It seems most of dom0less isn't in > a header, but just in docs. > > Hyperlaunch uses BUILD_CAPS_, but I chose DOMAIN_CAPS_ since there are > domain-level capabilities. > > Only a single xenstore and hardware domain make sense. Hardware domain > receiving all hardware can only have a single domain. > > For Xenstore, the logic latches the single xs_domid and uses that for > all domains. Also, only a single domain can register for VIRQ_DOM_EXC. > --- > docs/misc/arm/device-tree/booting.txt | 11 ++++++++ > xen/arch/arm/dom0less-build.c | 39 +++++++++++++++++++++++++++ > xen/arch/arm/domain.c | 3 ++- > xen/include/public/bootfdt.h | 31 +++++++++++++++++++++ > 4 files changed, 83 insertions(+), 1 deletion(-) > create mode 100644 xen/include/public/bootfdt.h > > diff --git a/docs/misc/arm/device-tree/booting.txt b/docs/misc/arm/device-tree/booting.txt > index ac781c9cc8..490c792ddf 100644 > --- a/docs/misc/arm/device-tree/booting.txt > +++ b/docs/misc/arm/device-tree/booting.txt > @@ -167,6 +167,17 @@ with the following properties: > Refer to docs/misc/cache_coloring.rst for syntax. This option is applicable > only to Arm64 guests. > > +- capabilities > + Optional. A bit field of domain capabilities for a disaggregated Please reword as: Optional. A 32-bit integer representing a bit field... That is because there is no native bit field type in device tree. > + system. A traditional dom0 has all all of these capabilities, and a > + domU has none of them. > + > + 0x1 DOMAIN_CAPS_CONTROL - A privileged, control domain > + 0x2 DOMAIN_CAPS_HARDWARE - The hardware domain - there can be only 1 > + 0x4 DOMAIN_CAPS_XENSTORE - The xenstore domain - there can be only 1 > + > + The default is no capabilities. > + > - vpl011 > > An empty property to enable/disable a virtual pl011 for the guest to > diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c > index fc515c9852..1cb6c170a7 100644 > --- a/xen/arch/arm/dom0less-build.c > +++ b/xen/arch/arm/dom0less-build.c > @@ -12,6 +12,7 @@ > #include > #include > > +#include > #include > > #include > @@ -906,6 +907,8 @@ static int __init construct_domU(struct domain *d, > d->max_vcpus, mem); > > kinfo.vpl011 = dt_property_read_bool(node, "vpl011"); > + if ( kinfo.vpl011 && is_hardware_domain(d) ) > + panic("hardware domain cannot specify vpl011\n"); > > rc = dt_property_read_string(node, "xen,enhanced", &dom0less_enhanced); > if ( rc == -EILSEQ || > @@ -1020,6 +1023,40 @@ void __init create_domUs(void) > if ( (max_init_domid + 1) >= DOMID_FIRST_RESERVED ) > panic("No more domain IDs available\n"); > > + if ( dt_property_read_u32(node, "capabilities", &val) ) > + { > + if ( val & ~DOMAIN_CAPS_MASK ) > + panic("Invalid capabilities (%"PRIx32")\n", val); > + > + if ( val & DOMAIN_CAPS_CONTROL ) > + flags |= CDF_privileged; > + > + if ( val & DOMAIN_CAPS_HARDWARE ) > + { > + if ( hardware_domain ) > + panic("Only 1 hardware domain can be specified! (%pd)\n", > + hardware_domain); > + > + if ( !iommu_enabled ) > + panic("iommu required for dom0less hardware domain\n"); The panic is OK if "direct-map" is not specified. We need to check for direct-map before panic'ing. Other than these two comments it looks good to me. > + > + d_cfg.max_grant_frames = gnttab_dom0_frames(); > + d_cfg.max_evtchn_port = -1; > + flags |= CDF_hardware; > + iommu = true; > + } > + > + if ( val & DOMAIN_CAPS_XENSTORE ) > + { > + if ( xs_domid != DOMID_INVALID ) > + panic("Only 1 xenstore domain can be specified! (%u)\n", > + xs_domid); > + > + d_cfg.flags |= XEN_DOMCTL_CDF_xs_domain; > + d_cfg.max_evtchn_port = -1; > + } > + } > + > if ( dt_find_property(node, "xen,static-mem", NULL) ) > { > if ( llc_coloring_enabled ) > @@ -1082,6 +1119,8 @@ void __init create_domUs(void) > d_cfg.arch.nr_spis = MAX(d_cfg.arch.nr_spis, > vpl011_virq - 32 + 1); > } > + else if ( flags & CDF_hardware ) > + panic("nr_spis cannot be specified for hardware domain\n"); > > /* Get the optional property domain-cpupool */ > cpupool_node = dt_parse_phandle(node, "domain-cpupool", 0); > diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c > index 3ba959f866..dc4b4e84c1 100644 > --- a/xen/arch/arm/domain.c > +++ b/xen/arch/arm/domain.c > @@ -608,7 +608,8 @@ int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) > { > unsigned int max_vcpus; > unsigned int flags_required = (XEN_DOMCTL_CDF_hvm | XEN_DOMCTL_CDF_hap); > - unsigned int flags_optional = (XEN_DOMCTL_CDF_iommu | XEN_DOMCTL_CDF_vpmu); > + unsigned int flags_optional = (XEN_DOMCTL_CDF_iommu | XEN_DOMCTL_CDF_vpmu | > + XEN_DOMCTL_CDF_xs_domain ); > unsigned int sve_vl_bits = sve_decode_vl(config->arch.sve_vl); > > if ( (config->flags & ~flags_optional) != flags_required ) > diff --git a/xen/include/public/bootfdt.h b/xen/include/public/bootfdt.h > new file mode 100644 > index 0000000000..86c46b42a9 > --- /dev/null > +++ b/xen/include/public/bootfdt.h > @@ -0,0 +1,31 @@ > +/* SPDX-License-Identifier: MIT */ > +/* > + * Xen Device Tree boot information > + * > + * Information for configuring Xen domains created at boot time. > + */ > + > +#ifndef __XEN_PUBLIC_BOOTFDT_H__ > +#define __XEN_PUBLIC_BOOTFDT_H__ > + > +/* > + * Domain Capabilities specified in the "capabilities" property. Use of > + * this property allows splitting up the monolithic dom0 into separate, > + * less privileged components. A regular domU has no capabilities > + * (which is the default if nothing is specified). A traditional dom0 > + * has all three capabilities. > + */ > + > +/* Control/Privileged domain capable of affecting other domains. */ > +#define DOMAIN_CAPS_CONTROL (1U << 0) > +/* > + * Hardware domain controlling physical hardware. Typically providing > + * backends to other domains. > + */ > +#define DOMAIN_CAPS_HARDWARE (1U << 1) > +/* Xenstore domain. */ > +#define DOMAIN_CAPS_XENSTORE (1U << 2) > +#define DOMAIN_CAPS_MASK (DOMAIN_CAPS_CONTROL | DOMAIN_CAPS_HARDWARE | \ > + DOMAIN_CAPS_XENSTORE) > + > +#endif /* __XEN_PUBLIC_BOOTFDT_H__ */ > -- > 2.49.0 > From xen-devel-bounces@lists.xenproject.org Wed Apr 02 00:15:01 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 00:15:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935015.1336535 (Exim 4.92) (envelope-from ) id 1tzlku-0007hn-Vd; Wed, 02 Apr 2025 00:14:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935015.1336535; Wed, 02 Apr 2025 00:14:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzlku-0007hg-Sl; Wed, 02 Apr 2025 00:14:56 +0000 Received: by outflank-mailman (input) for mailman id 935015; Wed, 02 Apr 2025 00:14:56 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzlku-0007ha-3p for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 00:14:56 +0000 Received: from tor.source.kernel.org (tor.source.kernel.org [172.105.4.254]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 7fe0d3c5-0f57-11f0-9ea7-5ba50f476ded; Wed, 02 Apr 2025 02:14:53 +0200 (CEST) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 726BC61126; Wed, 2 Apr 2025 00:14:46 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id A414DC4CEE4; Wed, 2 Apr 2025 00:14:51 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 7fe0d3c5-0f57-11f0-9ea7-5ba50f476ded DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743552892; bh=DjDOHjuoBfe85suHnJ0PpFAtcPwgZSsYPZVgklI6qJQ=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=aK7KfTTjYWFE52BBT83ruvsz835oHUowybkIh+WEQgiyKyb5jtaMPJiVxen1pMwWJ hOv6Aw64EdHEyJB02lmjpiU976W6F/hLaGuX5nbVPlM3OVqTCgZLNzB0d3snZ1jMwb fOq60FH3YHGLt44DPcdH18NSo2MB/9TawRkh2mRcz7N1QBilQ2lDaZPa9WV9/67NSU xXhn48WO9MoktFYng5PbM0LmmxshXQMqh1E2MfhwF3DAa52PDmYDFBOdSjx7pVkLlH XXX4C9AdouVtnb5JOT3FQNaB5gXR16CUhLPFrwL+sjQq4wtLEgNI3IKXIRcROxmwdR S5Tb07tuNPJ/A== Date: Tue, 1 Apr 2025 17:14:49 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jan Beulich cc: Stefano Stabellini , xen-devel@lists.xenproject.org, Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Subject: Re: [PATCH v5] xen: simplify bitmap_to_xenctl_bitmap for little endian In-Reply-To: <694eac75-e872-4ba0-80ed-95c14cd11f5e@suse.com> Message-ID: References: <20250401005008.2787764-1-stefano.stabellini@amd.com> <694eac75-e872-4ba0-80ed-95c14cd11f5e@suse.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Tue, 1 Apr 2025, Jan Beulich wrote: > From: Stefano Stabellini > > The little endian implementation of bitmap_to_xenctl_bitmap leads to > unnecessary xmallocs and xfrees. Given that Xen only supports little > endian architectures, it is worth optimizing. > > This patch removes the need for the xmalloc on little endian > architectures. > > Remove clamp_last_byte as it is only called once and only needs to > modify one byte. Inline it. > > Signed-off-by: Stefano Stabellini > Signed-off-by: Jan Beulich > --- > v5: Fix IS_ENABLED() use. Keep more code common. Move comment. > Convert LE bitmap_long_to_byte() to just a declaration. Thanks Jan, I looked at your version carefully and it looks correct to me. I could give my reviewed-by but it looks weird given that I am also the first author. Reviewed-by: Stefano Stabellini > --- a/xen/common/bitmap.c > +++ b/xen/common/bitmap.c > @@ -40,21 +40,6 @@ > * for the best explanations of this ordering. > */ > > -/* > - * If a bitmap has a number of bits which is not a multiple of 8 then > - * the last few bits of the last byte of the bitmap can be > - * unexpectedly set which can confuse consumers (e.g. in the tools) > - * who also round up their loops to 8 bits. Ensure we clear those left > - * over bits so as to prevent surprises. > - */ > -static void clamp_last_byte(uint8_t *bp, unsigned int nbits) > -{ > - unsigned int remainder = nbits % 8; > - > - if (remainder) > - bp[nbits/8] &= (1U << remainder) - 1; > -} > - > int __bitmap_empty(const unsigned long *bitmap, unsigned int bits) > { > int k, lim = bits/BITS_PER_LONG; > @@ -338,7 +323,6 @@ static void bitmap_long_to_byte(uint8_t > nbits -= 8; > } > } > - clamp_last_byte(bp, nbits); > } > > static void bitmap_byte_to_long(unsigned long *lp, const uint8_t *bp, > @@ -359,12 +343,11 @@ static void bitmap_byte_to_long(unsigned > > #elif defined(__LITTLE_ENDIAN) > > -static void bitmap_long_to_byte(uint8_t *bp, const unsigned long *lp, > - unsigned int nbits) > -{ > - memcpy(bp, lp, DIV_ROUND_UP(nbits, BITS_PER_BYTE)); > - clamp_last_byte(bp, nbits); > -} > +#define LITTLE_ENDIAN 1 /* For IS_ENABLED(). */ > + > +/* Unused function, but a declaration is needed. */ > +void bitmap_long_to_byte(uint8_t *bp, const unsigned long *lp, > + unsigned int nbits); > > static void bitmap_byte_to_long(unsigned long *lp, const uint8_t *bp, > unsigned int nbits) > @@ -384,22 +367,46 @@ int bitmap_to_xenctl_bitmap(struct xenct > uint8_t zero = 0; > int err = 0; > unsigned int xen_bytes = DIV_ROUND_UP(nbits, BITS_PER_BYTE); > - uint8_t *bytemap = xmalloc_array(uint8_t, xen_bytes); > + const uint8_t *bytemap; > + uint8_t last, *buf = NULL; > > - if ( !bytemap ) > - return -ENOMEM; > + if ( !IS_ENABLED(LITTLE_ENDIAN) ) > + { > + buf = xmalloc_array(uint8_t, xen_bytes); > + if ( !buf ) > + return -ENOMEM; > + > + bitmap_long_to_byte(buf, bitmap, nbits); > + > + bytemap = buf; > + } > + else > + bytemap = (const uint8_t *)bitmap; > > guest_bytes = DIV_ROUND_UP(xenctl_bitmap->nr_bits, BITS_PER_BYTE); > copy_bytes = min(guest_bytes, xen_bytes); > > - bitmap_long_to_byte(bytemap, bitmap, nbits); > + if ( copy_bytes > 1 && > + copy_to_guest(xenctl_bitmap->bitmap, bytemap, copy_bytes - 1) ) > + err = -EFAULT; > + > + /* > + * If a bitmap has a number of bits which is not a multiple of 8 then the > + * last few bits of the last byte of the bitmap can be unexpectedly set, > + * which can confuse consumers (e.g. in the tools), who also may round up > + * their loops to 8 bits. Ensure we clear those left over bits so as to > + * prevent surprises. > + */ > + last = bytemap[nbits / 8]; > + if ( nbits % 8 ) > + last &= (1U << (nbits % 8)) - 1; > + > + xfree(buf); > > if ( copy_bytes && > - copy_to_guest(xenctl_bitmap->bitmap, bytemap, copy_bytes) ) > + copy_to_guest_offset(xenctl_bitmap->bitmap, copy_bytes - 1, &last, 1) ) > err = -EFAULT; > > - xfree(bytemap); > - > for ( i = copy_bytes; !err && i < guest_bytes; i++ ) > if ( copy_to_guest_offset(xenctl_bitmap->bitmap, i, &zero, 1) ) > err = -EFAULT; > From xen-devel-bounces@lists.xenproject.org Wed Apr 02 00:19:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 00:19:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935027.1336545 (Exim 4.92) (envelope-from ) id 1tzlpC-0008HR-Fx; Wed, 02 Apr 2025 00:19:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935027.1336545; Wed, 02 Apr 2025 00:19:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzlpC-0008HK-C5; Wed, 02 Apr 2025 00:19:22 +0000 Received: by outflank-mailman (input) for mailman id 935027; Wed, 02 Apr 2025 00:19:21 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzlpB-0008HE-6u for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 00:19:21 +0000 Received: from sea.source.kernel.org (sea.source.kernel.org [172.234.252.31]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 1dd265da-0f58-11f0-9ffb-bf95429c2676; Wed, 02 Apr 2025 02:19:19 +0200 (CEST) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id BB560435B3; Wed, 2 Apr 2025 00:19:16 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8A36AC4CEE4; Wed, 2 Apr 2025 00:19:16 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 1dd265da-0f58-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743553157; bh=BXQOTDyKHPbRJToz6v568FkioxG5VeYLC1ubRR2EFVo=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=LSZdCIV7Et1tD4JNKKgJNLQMNpog6sIaimzfMsteYP/PztqHxsvxkwWrVThw7bXgM zCukqgE2PLGTGNUKCo/XGKihndLgGk+xcb68bicpz1psIXHfE2bO5H27V+xPgkYed7 01fn89Bq7yOCgMOHP1xVhUDVVHo2joooKCg591/od2r1N1XeEQM8aeExq+BWWgCEfL lllvluOeCp577lub1mfWiz3M9cnjb5F6WNZG4gLY+oFrDFYZxR8S7T0JmqazEPvBdg DqD90RjD+mLOfTFl9CqWbjByB0kCHEWSCs4Sz3Oxdd1Ms0R4cd7YUbwN473zBDUMMr NxbqTbAyL2z3A== Date: Tue, 1 Apr 2025 17:19:14 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= cc: xen-devel@lists.xenproject.org, Doug Goldstein , Stefano Stabellini Subject: Re: [PATCH 1/2] ci: create boot.ipxe for legacy boot In-Reply-To: Message-ID: References: User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="8323329-619240473-1743553156=:3098208" This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323329-619240473-1743553156=:3098208 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT On Tue, 1 Apr 2025, Marek Marczykowski-Górecki wrote: > Hardware runners that use legacy boot use iPXE instead of grub2. Create > boot.ipxe for those too - with exact same options. > > Signed-off-by: Marek Marczykowski-Górecki Reviewed-by: Stefano Stabellini > --- > Right now this applies to KBL (hw3) runner. And not many more, as newer > systems support UEFI network boot. > --- > automation/scripts/qubes-x86-64.sh | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh > index 7c80e0c23318..f27296445901 100755 > --- a/automation/scripts/qubes-x86-64.sh > +++ b/automation/scripts/qubes-x86-64.sh > @@ -251,6 +251,14 @@ module2 (http)/gitlab-ci/vmlinuz console=hvc0 root=/dev/ram0 earlyprintk=xen > module2 (http)/gitlab-ci/initrd-dom0 > " > $TFTP/grub.cfg > > +echo "#!ipxe > + > +kernel /gitlab-ci/xen $CONSOLE_OPTS loglvl=all guest_loglvl=all dom0_mem=4G console_timestamps=boot $extra_xen_opts || reboot > +module /gitlab-ci/vmlinuz console=hvc0 root=/dev/ram0 earlyprintk=xen || reboot > +module /gitlab-ci/initrd-dom0 || reboot > +boot > +" > $TFTP/boot.ipxe > + > cp -f binaries/xen $TFTP/xen > cp -f binaries/bzImage $TFTP/vmlinuz > cp -f binaries/dom0-rootfs.cpio.gz $TFTP/initrd-dom0 > -- > git-series 0.9.1 > --8323329-619240473-1743553156=:3098208-- From xen-devel-bounces@lists.xenproject.org Wed Apr 02 00:22:33 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 00:22:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935039.1336555 (Exim 4.92) (envelope-from ) id 1tzlsD-0002dk-SX; Wed, 02 Apr 2025 00:22:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935039.1336555; Wed, 02 Apr 2025 00:22:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzlsD-0002dd-Po; Wed, 02 Apr 2025 00:22:29 +0000 Received: by outflank-mailman (input) for mailman id 935039; Wed, 02 Apr 2025 00:22:28 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzlsC-0002dW-Rb for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 00:22:28 +0000 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 8da23f9c-0f58-11f0-9ffb-bf95429c2676; Wed, 02 Apr 2025 02:22:26 +0200 (CEST) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id D280B5C3FCC; Wed, 2 Apr 2025 00:20:07 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id BA06AC4CEE4; Wed, 2 Apr 2025 00:22:23 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 8da23f9c-0f58-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743553344; bh=GW+JcUjsAPrxTRCOzqIxwLPCy4cz/rmvfzwYSx+avoY=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=O5ZSeYpuvCHEgKl18yq81EehsbiMSbk7a5bQj2jqx63yskcbVOxXJ+uLjaHt5CejJ 01Fat4316/ZlOHFMeYozsa0jyiHGa6q37QDW/PezjcXPZmXPGQEJKQ7zai1xpSalzW x6z0P/1PmYpETGnMzIL4GKb0GsygEOfsJkpzamTifHq4FuGl2GFJaleNb5LhYiZsVk 5iRP0NRmvI1902FxZNU54VhO/ja3FBUULRL2QrLlhWFR495SpO8A4b89YKCCsLGkuH g4f4GYQvy0Pdhqu+UYGYau3T9MG116S14+gyybssb4RNIu1p2KJbrhBg6SL4Soag+8 7CRcQg0l+6yaw== Date: Tue, 1 Apr 2025 17:22:22 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= cc: xen-devel@lists.xenproject.org, Jan Beulich , Andrew Cooper , Doug Goldstein , Stefano Stabellini Subject: Re: [PATCH 2/2] ci: add Intel KabyLake HW runner In-Reply-To: Message-ID: References: User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="8323329-305143249-1743553344=:3098208" This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323329-305143249-1743553344=:3098208 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT On Tue, 1 Apr 2025, Marek Marczykowski-Górecki wrote: > This is Intel i7-7567U in NUC 7i7BNH. This one is an older one, with no > firmware updates (last update from 2023) and no microcode udpates > either. While this firmware supports UEFI, network boot works only in > legacy mode - thus legacy is used here (via iPXE, instead of grub2.efi). > Testing legacy boot path may be a useful thing on its own. > > Add the same set of tests as on ADL runner. > > Signed-off-by: Marek Marczykowski-Górecki Reviewed-by: Stefano Stabellini > --- > Cc: Jan Beulich > Cc: Andrew Cooper > > Not sure if duplicating pvshim test makes sense? Others do look like may > have hardware-sensitive parts. The more the merrier > --- > automation/gitlab-ci/test.yaml | 89 +++++++++++++++++++++++++++++++++++- > 1 file changed, 89 insertions(+) > > diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml > index 225eb4399807..d05b9a98afa6 100644 > --- a/automation/gitlab-ci/test.yaml > +++ b/automation/gitlab-ci/test.yaml > @@ -155,6 +155,17 @@ > tags: > - qubes-hw2 > > +.kbl-x86-64: > + # it's really similar to the ADL one > + extends: .adl-x86-64 > + variables: > + PCIDEV: "00:1f.6" > + PCIDEV_INTR: "MSI" > + CONSOLE_OPTS: "console=com1 com1=115200,8n1,pci,msi" > + SUT_ADDR: test-3.testnet > + tags: > + - qubes-hw3 > + > .zen2-x86-64: > # it's really similar to the above > extends: .adl-x86-64 > @@ -312,6 +323,84 @@ adl-tools-tests-pvh-x86-64-gcc-debug: > - *x86-64-test-needs > - alpine-3.18-gcc-debug > > +kbl-smoke-x86-64-gcc-debug: > + extends: .kbl-x86-64 > + script: > + - ./automation/scripts/qubes-x86-64.sh 2>&1 | tee ${LOGFILE} > + needs: > + - *x86-64-test-needs > + - alpine-3.18-gcc-debug > + > +kbl-smoke-x86-64-dom0pvh-gcc-debug: > + extends: .kbl-x86-64 > + script: > + - ./automation/scripts/qubes-x86-64.sh dom0pvh 2>&1 | tee ${LOGFILE} > + needs: > + - *x86-64-test-needs > + - alpine-3.18-gcc-debug > + > +kbl-smoke-x86-64-dom0pvh-hvm-gcc-debug: > + extends: .kbl-x86-64 > + script: > + - ./automation/scripts/qubes-x86-64.sh dom0pvh-hvm 2>&1 | tee ${LOGFILE} > + needs: > + - *x86-64-test-needs > + - alpine-3.18-gcc-debug > + > +kbl-suspend-x86-64-gcc-debug: > + extends: .kbl-x86-64 > + script: > + - ./automation/scripts/qubes-x86-64.sh s3 2>&1 | tee ${LOGFILE} > + needs: > + - *x86-64-test-needs > + - alpine-3.18-gcc-debug > + > +kbl-pci-pv-x86-64-gcc-debug: > + extends: .kbl-x86-64 > + script: > + - ./automation/scripts/qubes-x86-64.sh pci-pv 2>&1 | tee ${LOGFILE} > + needs: > + - *x86-64-test-needs > + - alpine-3.18-gcc-debug > + > +kbl-pci-hvm-x86-64-gcc-debug: > + extends: .kbl-x86-64 > + script: > + - ./automation/scripts/qubes-x86-64.sh pci-hvm 2>&1 | tee ${LOGFILE} > + needs: > + - *x86-64-test-needs > + - alpine-3.18-gcc-debug > + > +kbl-pvshim-x86-64-gcc-debug: > + extends: .kbl-x86-64 > + script: > + - ./automation/scripts/qubes-x86-64.sh pvshim 2>&1 | tee ${LOGFILE} > + needs: > + - *x86-64-test-needs > + - alpine-3.18-gcc-debug > + > +kbl-tools-tests-pv-x86-64-gcc-debug: > + extends: .kbl-x86-64 > + script: > + - ./automation/scripts/qubes-x86-64.sh tools-tests-pv 2>&1 | tee ${LOGFILE} > + artifacts: > + reports: > + junit: tests-junit.xml > + needs: > + - *x86-64-test-needs > + - alpine-3.18-gcc-debug > + > +kbl-tools-tests-pvh-x86-64-gcc-debug: > + extends: .kbl-x86-64 > + script: > + - ./automation/scripts/qubes-x86-64.sh tools-tests-pvh 2>&1 | tee ${LOGFILE} > + artifacts: > + reports: > + junit: tests-junit.xml > + needs: > + - *x86-64-test-needs > + - alpine-3.18-gcc-debug > + > zen2-smoke-x86-64-gcc-debug: > extends: .zen2-x86-64 > script: > -- > git-series 0.9.1 > --8323329-305143249-1743553344=:3098208-- From xen-devel-bounces@lists.xenproject.org Wed Apr 02 03:46:45 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 03:46:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935083.1336565 (Exim 4.92) (envelope-from ) id 1tzp3h-00076s-Gp; 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Tue, 1 Apr 2025 20:45:34 -0700 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 0dbe14ca-0f75-11f0-9ea7-5ba50f476ded DKIM-Filter: OpenDKIM Filter v2.11.0 mail.zytor.com 5323jYCp4052768 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=zytor.com; s=2025032001; t=1743565538; bh=B/0Ul12154gIBLTRQGmDrSHkQipxSmmaRYkawQNhljs=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=d7YoxvOk9CIKebUmypsUBsbIGJDe0uIJODZYK5DJptXRC7jV6F3X1iHgsxaJq7z/U nBC47DHx45CFSikk6yorSJmHvn/RCUzlkE0NIfP5y7UNWDRWBv91w7rT+GXmQbAe6z HCcFPhy4gq4eFfyUGP1oJ31ejuLGzPZzPtgaEGzAY4WeayjxRzdkiEm1K913UJ2qFb o2q11OGn9+Uc+NNdgOH1HNABy4p6gq8usi/RT27lr00ZcWFGEXHyfLPucBEl+bhIGt HaLheaydO5A8cmC7yD4/mcLHEGK1M9ACDi53Kn4fWVEbhWUVQAm5iuaES3HqoGE7N5 7tT7gwjoWNc5Q== Message-ID: <7a503d55-db41-42da-8133-4a3dbbd36c7e@zytor.com> Date: Tue, 1 Apr 2025 20:45:33 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH v1 01/15] x86/msr: Replace __wrmsr() with native_wrmsrl() To: Ingo Molnar , "H. Peter Anvin" Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-edac@vger.kernel.org, kvm@vger.kernel.org, xen-devel@lists.xenproject.org, linux-ide@vger.kernel.org, linux-pm@vger.kernel.org, bpf@vger.kernel.org, llvm@lists.linux.dev, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com, peterz@infradead.org, acme@kernel.org, namhyung@kernel.org, mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org, irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com, wei.liu@kernel.org, ajay.kaher@broadcom.com, alexey.amakhalov@broadcom.com, bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com, pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com, luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com, haiyangz@microsoft.com, decui@microsoft.com, Linus Torvalds References: <20250331082251.3171276-1-xin@zytor.com> <20250331082251.3171276-2-xin@zytor.com> <9D15DE81-2E68-4FCD-A133-4963602E18C9@zytor.com> Content-Language: en-US From: Xin Li Autocrypt: addr=xin@zytor.com; keydata= xsDNBGUPz1cBDACS/9yOJGojBFPxFt0OfTWuMl0uSgpwk37uRrFPTTLw4BaxhlFL0bjs6q+0 2OfG34R+a0ZCuj5c9vggUMoOLdDyA7yPVAJU0OX6lqpg6z/kyQg3t4jvajG6aCgwSDx5Kzg5 Rj3AXl8k2wb0jdqRB4RvaOPFiHNGgXCs5Pkux/qr0laeFIpzMKMootGa4kfURgPhRzUaM1vy bsMsL8vpJtGUmitrSqe5dVNBH00whLtPFM7IbzKURPUOkRRiusFAsw0a1ztCgoFczq6VfAVu raTye0L/VXwZd+aGi401V2tLsAHxxckRi9p3mc0jExPc60joK+aZPy6amwSCy5kAJ/AboYtY VmKIGKx1yx8POy6m+1lZ8C0q9b8eJ8kWPAR78PgT37FQWKYS1uAroG2wLdK7FiIEpPhCD+zH wlslo2ETbdKjrLIPNehQCOWrT32k8vFNEMLP5G/mmjfNj5sEf3IOKgMTMVl9AFjsINLHcxEQ 6T8nGbX/n3msP6A36FDfdSEAEQEAAc0WWGluIExpIDx4aW5Aenl0b3IuY29tPsLBDQQTAQgA NxYhBIUq/WFSDTiOvUIqv2u9DlcdrjdRBQJlD89XBQkFo5qAAhsDBAsJCAcFFQgJCgsFFgID AQAACgkQa70OVx2uN1HUpgv/cM2fsFCQodLArMTX5nt9yqAWgA5t1srri6EgS8W3F+3Kitge tYTBKu6j5BXuXaX3vyfCm+zajDJN77JHuYnpcKKr13VcZi1Swv6Jx1u0II8DOmoDYLb1Q2ZW v83W55fOWJ2g72x/UjVJBQ0sVjAngazU3ckc0TeNQlkcpSVGa/qBIHLfZraWtdrNAQT4A1fa sWGuJrChBFhtKbYXbUCu9AoYmmbQnsx2EWoJy3h7OjtfFapJbPZql+no5AJ3Mk9eE5oWyLH+ QWqtOeJM7kKvn/dBudokFSNhDUw06e7EoVPSJyUIMbYtUO7g2+Atu44G/EPP0yV0J4lRO6EA wYRXff7+I1jIWEHpj5EFVYO6SmBg7zF2illHEW31JAPtdDLDHYcZDfS41caEKOQIPsdzQkaQ oW2hchcjcMPAfyhhRzUpVHLPxLCetP8vrVhTvnaZUo0xaVYb3+wjP+D5j/3+hwblu2agPsaE vgVbZ8Fx3TUxUPCAdr/p73DGg57oHjgezsDNBGUPz1gBDAD4Mg7hMFRQqlzotcNSxatlAQNL MadLfUTFz8wUUa21LPLrHBkUwm8RujehJrzcVbPYwPXIO0uyL/F///CogMNx7Iwo6by43KOy g89wVFhyy237EY76j1lVfLzcMYmjBoTH95fJC/lVb5Whxil6KjSN/R/y3jfG1dPXfwAuZ/4N cMoOslWkfZKJeEut5aZTRepKKF54T5r49H9F7OFLyxrC/uI9UDttWqMxcWyCkHh0v1Di8176 jjYRNTrGEfYfGxSp+3jYL3PoNceIMkqM9haXjjGl0W1B4BidK1LVYBNov0rTEzyr0a1riUrp Qk+6z/LHxCM9lFFXnqH7KWeToTOPQebD2B/Ah5CZlft41i8L6LOF/LCuDBuYlu/fI2nuCc8d m4wwtkou1Y/kIwbEsE/6RQwRXUZhzO6llfoN96Fczr/RwvPIK5SVMixqWq4QGFAyK0m/1ap4 bhIRrdCLVQcgU4glo17vqfEaRcTW5SgX+pGs4KIPPBE5J/ABD6pBnUUAEQEAAcLA/AQYAQgA JhYhBIUq/WFSDTiOvUIqv2u9DlcdrjdRBQJlD89ZBQkFo5qAAhsMAAoJEGu9DlcdrjdR4C0L /RcjolEjoZW8VsyxWtXazQPnaRvzZ4vhmGOsCPr2BPtMlSwDzTlri8BBG1/3t/DNK4JLuwEj OAIE3fkkm+UG4Kjud6aNeraDI52DRVCSx6xff3bjmJsJJMb12mWglN6LjdF6K+PE+OTJUh2F dOhslN5C2kgl0dvUuevwMgQF3IljLmi/6APKYJHjkJpu1E6luZec/lRbetHuNFtbh3xgFIJx 2RpgVDP4xB3f8r0I+y6ua+p7fgOjDLyoFjubRGed0Be45JJQEn7A3CSb6Xu7NYobnxfkwAGZ Q81a2XtvNS7Aj6NWVoOQB5KbM4yosO5+Me1V1SkX2jlnn26JPEvbV3KRFcwV5RnDxm4OQTSk PYbAkjBbm+tuJ/Sm+5Yp5T/BnKz21FoCS8uvTiziHj2H7Cuekn6F8EYhegONm+RVg3vikOpn gao85i4HwQTK9/D1wgJIQkdwWXVMZ6q/OALaBp82vQ2U9sjTyFXgDjglgh00VRAHP7u1Rcu4 l75w1xInsg== In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 4/1/2025 12:52 AM, Ingo Molnar wrote: > > * H. Peter Anvin wrote: > >> On March 31, 2025 3:17:30 AM PDT, Ingo Molnar wrote: >>> >>> * Xin Li (Intel) wrote: >>> >>>> - __wrmsr (MSR_AMD_DBG_EXTN_CFG, val | 3ULL << 3, val >> 32); >>>> + native_wrmsrl(MSR_AMD_DBG_EXTN_CFG, val | 3ULL << 3); >>> >>> This is an improvement. >>> >>>> - __wrmsr (MSR_IA32_PQR_ASSOC, rmid_p, plr->closid); >>>> + native_wrmsrl(MSR_IA32_PQR_ASSOC, (u64)plr->closid << 32 | rmid_p); >>> >>>> - __wrmsr (MSR_IA32_PQR_ASSOC, rmid_p, closid_p); >>>> + native_wrmsrl(MSR_IA32_PQR_ASSOC, (u64)closid_p << 32 | rmid_p); >>> >>> This is not an improvement. >>> >>> Please provide a native_wrmsrl() API variant where natural [rmid_p, closid_p] >>> high/lo parameters can be used, without the shift-uglification... >>> >>> Thanks, >>> >>> Ingo >> >> Directing this question primarily to Ingo, who is more than anyone >> else the namespace consistency guardian: >> >> On the subject of msr function naming ... *msrl() has always been >> misleading. The -l suffix usually means 32 bits; sometimes it means >> the C type "long" (which in the kernel is used instead of >> size_t/uintptr_t, which might end up being "fun" when 128-bit >> architectures appear some time this century), but for a fixed 64-but >> type we normally use -q. > > Yeah, agreed - that's been bothering me for a while too. :-) > >> Should we rename the *msrl() functions to *msrq() as part of this >> overhaul? > > Yeah, that's a good idea, and because talk is cheap I just implemented > this in the tip:WIP.x86/msr branch with a couple of other cleanups in > this area (see the shortlog & diffstat below), but the churn is high: > > 144 files changed, 1034 insertions(+), 1034 deletions(-) > > So this can only be done if regenerated and sent to Linus right before > an -rc1 I think: > > git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip WIP.x86/msr Hi Ingo, Is this branch public? I wanted to rebase on it and then incooperate your review comments, but couldn't find the branch. Thanks! Xin > > Thanks, > > Ingo > > =======================> > Ingo Molnar (18): > x86/msr: Standardize on u64 in > x86/msr: Standardize on u64 in > x86/msr: Use u64 in rdmsrl_amd_safe() and wrmsrl_amd_safe() > x86/msr: Use u64 in rdmsrl_safe() and paravirt_read_pmc() > x86/msr: Rename 'rdmsrl()' to 'rdmsrq()' > x86/msr: Rename 'wrmsrl()' to 'wrmsrq()' > x86/msr: Rename 'rdmsrl_safe()' to 'rdmsrq_safe()' > x86/msr: Rename 'wrmsrl_safe()' to 'wrmsrq_safe()' > x86/msr: Rename 'rdmsrl_safe_on_cpu()' to 'rdmsrq_safe_on_cpu()' > x86/msr: Rename 'wrmsrl_safe_on_cpu()' to 'wrmsrq_safe_on_cpu()' > x86/msr: Rename 'rdmsrl_on_cpu()' to 'rdmsrq_on_cpu()' > x86/msr: Rename 'wrmsrl_on_cpu()' to 'wrmsrq_on_cpu()' > x86/msr: Rename 'mce_rdmsrl()' to 'mce_rdmsrq()' > x86/msr: Rename 'mce_wrmsrl()' to 'mce_wrmsrq()' > x86/msr: Rename 'rdmsrl_amd_safe()' to 'rdmsrq_amd_safe()' > x86/msr: Rename 'wrmsrl_amd_safe()' to 'wrmsrq_amd_safe()' > x86/msr: Rename 'native_wrmsrl()' to 'native_wrmsrq()' > x86/msr: Rename 'wrmsrl_cstar()' to 'wrmsrq_cstar()' > > arch/x86/coco/sev/core.c | 2 +- > arch/x86/events/amd/brs.c | 8 +- > arch/x86/events/amd/core.c | 12 +-- > arch/x86/events/amd/ibs.c | 26 ++--- > arch/x86/events/amd/lbr.c | 20 ++-- > arch/x86/events/amd/power.c | 10 +- > arch/x86/events/amd/uncore.c | 12 +-- > arch/x86/events/core.c | 42 ++++---- > arch/x86/events/intel/core.c | 66 ++++++------- > arch/x86/events/intel/cstate.c | 2 +- > arch/x86/events/intel/ds.c | 10 +- > arch/x86/events/intel/knc.c | 16 +-- > arch/x86/events/intel/lbr.c | 44 ++++----- > arch/x86/events/intel/p4.c | 24 ++--- > arch/x86/events/intel/p6.c | 12 +-- > arch/x86/events/intel/pt.c | 32 +++--- > arch/x86/events/intel/uncore.c | 2 +- > arch/x86/events/intel/uncore_discovery.c | 10 +- > arch/x86/events/intel/uncore_nhmex.c | 70 ++++++------- > arch/x86/events/intel/uncore_snb.c | 42 ++++---- > arch/x86/events/intel/uncore_snbep.c | 50 +++++----- > arch/x86/events/msr.c | 2 +- > arch/x86/events/perf_event.h | 26 ++--- > arch/x86/events/probe.c | 2 +- > arch/x86/events/rapl.c | 8 +- > arch/x86/events/zhaoxin/core.c | 16 +-- > arch/x86/hyperv/hv_apic.c | 4 +- > arch/x86/hyperv/hv_init.c | 66 ++++++------- > arch/x86/hyperv/hv_spinlock.c | 6 +- > arch/x86/hyperv/ivm.c | 2 +- > arch/x86/include/asm/apic.h | 8 +- > arch/x86/include/asm/debugreg.h | 4 +- > arch/x86/include/asm/fsgsbase.h | 4 +- > arch/x86/include/asm/kvm_host.h | 2 +- > arch/x86/include/asm/microcode.h | 2 +- > arch/x86/include/asm/msr-index.h | 12 +-- > arch/x86/include/asm/msr.h | 50 +++++----- > arch/x86/include/asm/paravirt.h | 8 +- > arch/x86/include/asm/spec-ctrl.h | 2 +- > arch/x86/kernel/acpi/cppc.c | 8 +- > arch/x86/kernel/amd_nb.c | 2 +- > arch/x86/kernel/apic/apic.c | 16 +-- > arch/x86/kernel/apic/apic_numachip.c | 6 +- > arch/x86/kernel/cet.c | 2 +- > arch/x86/kernel/cpu/amd.c | 28 +++--- > arch/x86/kernel/cpu/aperfmperf.c | 28 +++--- > arch/x86/kernel/cpu/bugs.c | 24 ++--- > arch/x86/kernel/cpu/bus_lock.c | 18 ++-- > arch/x86/kernel/cpu/common.c | 68 ++++++------- > arch/x86/kernel/cpu/feat_ctl.c | 4 +- > arch/x86/kernel/cpu/hygon.c | 6 +- > arch/x86/kernel/cpu/intel.c | 10 +- > arch/x86/kernel/cpu/intel_epb.c | 12 +-- > arch/x86/kernel/cpu/mce/amd.c | 22 ++--- > arch/x86/kernel/cpu/mce/core.c | 58 +++++------ > arch/x86/kernel/cpu/mce/inject.c | 32 +++--- > arch/x86/kernel/cpu/mce/intel.c | 32 +++--- > arch/x86/kernel/cpu/mce/internal.h | 2 +- > arch/x86/kernel/cpu/microcode/amd.c | 2 +- > arch/x86/kernel/cpu/microcode/intel.c | 2 +- > arch/x86/kernel/cpu/mshyperv.c | 12 +-- > arch/x86/kernel/cpu/resctrl/core.c | 10 +- > arch/x86/kernel/cpu/resctrl/monitor.c | 2 +- > arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 2 +- > arch/x86/kernel/cpu/resctrl/rdtgroup.c | 6 +- > arch/x86/kernel/cpu/sgx/main.c | 2 +- > arch/x86/kernel/cpu/topology.c | 2 +- > arch/x86/kernel/cpu/topology_amd.c | 4 +- > arch/x86/kernel/cpu/tsx.c | 20 ++-- > arch/x86/kernel/cpu/umwait.c | 2 +- > arch/x86/kernel/fpu/core.c | 2 +- > arch/x86/kernel/fpu/xstate.c | 10 +- > arch/x86/kernel/fpu/xstate.h | 2 +- > arch/x86/kernel/fred.c | 20 ++-- > arch/x86/kernel/hpet.c | 2 +- > arch/x86/kernel/kvm.c | 28 +++--- > arch/x86/kernel/kvmclock.c | 4 +- > arch/x86/kernel/mmconf-fam10h_64.c | 8 +- > arch/x86/kernel/process.c | 16 +-- > arch/x86/kernel/process_64.c | 20 ++-- > arch/x86/kernel/reboot_fixups_32.c | 2 +- > arch/x86/kernel/shstk.c | 18 ++-- > arch/x86/kernel/traps.c | 10 +- > arch/x86/kernel/tsc.c | 2 +- > arch/x86/kernel/tsc_sync.c | 14 +-- > arch/x86/kvm/svm/avic.c | 2 +- > arch/x86/kvm/svm/sev.c | 2 +- > arch/x86/kvm/svm/svm.c | 16 +-- > arch/x86/kvm/vmx/nested.c | 4 +- > arch/x86/kvm/vmx/pmu_intel.c | 4 +- > arch/x86/kvm/vmx/sgx.c | 8 +- > arch/x86/kvm/vmx/vmx.c | 66 ++++++------- > arch/x86/kvm/x86.c | 38 ++++---- > arch/x86/lib/insn-eval.c | 6 +- > arch/x86/lib/msr-smp.c | 16 +-- > arch/x86/lib/msr.c | 4 +- > arch/x86/mm/pat/memtype.c | 4 +- > arch/x86/mm/tlb.c | 2 +- > arch/x86/pci/amd_bus.c | 10 +- > arch/x86/platform/olpc/olpc-xo1-rtc.c | 6 +- > arch/x86/platform/olpc/olpc-xo1-sci.c | 2 +- > arch/x86/power/cpu.c | 26 ++--- > arch/x86/realmode/init.c | 2 +- > arch/x86/virt/svm/sev.c | 20 ++-- > arch/x86/xen/suspend.c | 6 +- > drivers/acpi/acpi_extlog.c | 2 +- > drivers/acpi/acpi_lpit.c | 2 +- > drivers/cpufreq/acpi-cpufreq.c | 8 +- > drivers/cpufreq/amd-pstate-ut.c | 6 +- > drivers/cpufreq/amd-pstate.c | 22 ++--- > drivers/cpufreq/amd_freq_sensitivity.c | 2 +- > drivers/cpufreq/e_powersaver.c | 6 +- > drivers/cpufreq/intel_pstate.c | 108 ++++++++++----------- > drivers/cpufreq/longhaul.c | 24 ++--- > drivers/cpufreq/powernow-k7.c | 14 +-- > drivers/crypto/ccp/sev-dev.c | 2 +- > drivers/edac/amd64_edac.c | 6 +- > drivers/gpu/drm/i915/selftests/librapl.c | 4 +- > drivers/hwmon/fam15h_power.c | 6 +- > drivers/idle/intel_idle.c | 34 +++---- > drivers/mtd/nand/raw/cs553x_nand.c | 6 +- > drivers/platform/x86/intel/ifs/core.c | 4 +- > drivers/platform/x86/intel/ifs/load.c | 20 ++-- > drivers/platform/x86/intel/ifs/runtest.c | 16 +-- > drivers/platform/x86/intel/pmc/cnp.c | 6 +- > drivers/platform/x86/intel/pmc/core.c | 8 +- > .../x86/intel/speed_select_if/isst_if_common.c | 18 ++-- > .../x86/intel/speed_select_if/isst_if_mbox_msr.c | 14 +-- > .../x86/intel/speed_select_if/isst_tpmi_core.c | 2 +- > drivers/platform/x86/intel/tpmi_power_domains.c | 4 +- > drivers/platform/x86/intel/turbo_max_3.c | 4 +- > .../x86/intel/uncore-frequency/uncore-frequency.c | 10 +- > drivers/platform/x86/intel_ips.c | 36 +++---- > drivers/powercap/intel_rapl_msr.c | 6 +- > .../int340x_thermal/processor_thermal_device.c | 2 +- > drivers/thermal/intel/intel_hfi.c | 14 +-- > drivers/thermal/intel/intel_powerclamp.c | 4 +- > drivers/thermal/intel/intel_tcc_cooling.c | 4 +- > drivers/thermal/intel/therm_throt.c | 10 +- > drivers/video/fbdev/geode/gxfb_core.c | 2 +- > drivers/video/fbdev/geode/lxfb_ops.c | 22 ++--- > drivers/video/fbdev/geode/suspend_gx.c | 10 +- > drivers/video/fbdev/geode/video_gx.c | 16 +-- > include/hyperv/hvgdk_mini.h | 2 +- > 144 files changed, 1034 insertions(+), 1034 deletions(-) From xen-devel-bounces@lists.xenproject.org Wed Apr 02 04:10:34 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 04:10:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935098.1336575 (Exim 4.92) (envelope-from ) id 1tzpQr-0004uv-Fg; Wed, 02 Apr 2025 04:10:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935098.1336575; Wed, 02 Apr 2025 04:10:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzpQr-0004uo-C3; Wed, 02 Apr 2025 04:10:29 +0000 Received: by outflank-mailman (input) for mailman id 935098; Wed, 02 Apr 2025 04:10:28 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzpQq-0004ui-CH for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 04:10:28 +0000 Received: from tor.source.kernel.org (tor.source.kernel.org [172.105.4.254]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 6765d36e-0f78-11f0-9ffb-bf95429c2676; Wed, 02 Apr 2025 06:10:26 +0200 (CEST) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id DEDAD61130; Wed, 2 Apr 2025 04:10:17 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3BD29C4CEE9; Wed, 2 Apr 2025 04:10:15 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 6765d36e-0f78-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743567024; bh=I0s5Gv1mQHqnKIzWxsoxCEERoVHvYzeckwE8nOas3VU=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=TnGYyG5PegnZexH78EkVEZhjl67pWL7sXIuankw0lLUoS6l525yDJb1k2Y991Swzi Y/BQdn5EKeOPY4iCMiCsl/wcs58dUo6w4xmkNpQPl13ChnxQG34bUHyTmZ9oI5i9zj GXNesFcifbImdVA7Krak7NrblCx3xnxnf0NZrjadpmZUOlSF3sDsu4Wqsh/OKamc5N +/zpZVi9YHfAGYahd4Ce8z4sLXldFsNZWZ5Nqw2T1fjxJ8DAvB6m9Rtz/uEQMlDmh/ IRy6AIGMdjxGih5ykPwxvU4bKYE7f4SM5B+pULQxCAmH41LRub4Yb6OVvdI2LbooM3 g8DLjexGSgPew== Date: Wed, 2 Apr 2025 06:10:12 +0200 From: Ingo Molnar To: Xin Li Cc: "H. Peter Anvin" , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-edac@vger.kernel.org, kvm@vger.kernel.org, xen-devel@lists.xenproject.org, linux-ide@vger.kernel.org, linux-pm@vger.kernel.org, bpf@vger.kernel.org, llvm@lists.linux.dev, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com, peterz@infradead.org, acme@kernel.org, namhyung@kernel.org, mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org, irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com, wei.liu@kernel.org, ajay.kaher@broadcom.com, alexey.amakhalov@broadcom.com, bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com, pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com, luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com, haiyangz@microsoft.com, decui@microsoft.com, Linus Torvalds Subject: Re: [RFC PATCH v1 01/15] x86/msr: Replace __wrmsr() with native_wrmsrl() Message-ID: References: <20250331082251.3171276-1-xin@zytor.com> <20250331082251.3171276-2-xin@zytor.com> <9D15DE81-2E68-4FCD-A133-4963602E18C9@zytor.com> <7a503d55-db41-42da-8133-4a3dbbd36c7e@zytor.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <7a503d55-db41-42da-8133-4a3dbbd36c7e@zytor.com> * Xin Li wrote: > Hi Ingo, > > Is this branch public? > > I wanted to rebase on it and then incooperate your review comments, but > couldn't find the branch. Yeah, I moved it over to: git://git.kernel.org/pub/scm/linux/kernel/git/mingo/tip.git WIP.x86/msr Thanks, Ingo From xen-devel-bounces@lists.xenproject.org Wed Apr 02 04:58:33 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 04:58:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935111.1336585 (Exim 4.92) (envelope-from ) id 1tzqB9-0007C2-SZ; Wed, 02 Apr 2025 04:58:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935111.1336585; Wed, 02 Apr 2025 04:58:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzqB9-0007Bv-OZ; Wed, 02 Apr 2025 04:58:19 +0000 Received: by outflank-mailman (input) for mailman id 935111; Wed, 02 Apr 2025 04:58:19 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzqB8-0007Bn-Nz for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 04:58:19 +0000 Received: from mail.zytor.com (unknown [2607:7c80:54:3::138]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 14a6789f-0f7f-11f0-9ffb-bf95429c2676; Wed, 02 Apr 2025 06:58:15 +0200 (CEST) Received: from [192.168.7.202] ([71.202.166.45]) (authenticated bits=0) by mail.zytor.com (8.18.1/8.17.1) with ESMTPSA id 5324vV334074560 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NO); Tue, 1 Apr 2025 21:57:32 -0700 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 14a6789f-0f7f-11f0-9ffb-bf95429c2676 DKIM-Filter: OpenDKIM Filter v2.11.0 mail.zytor.com 5324vV334074560 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=zytor.com; s=2025032001; t=1743569855; bh=dP9zemrGBwQsO7PTwDde7OdOBV5enCnih/h0UjXSaBY=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=KgWEvIDk0ptJ+2Le7Mljabnd1tBAvTAd/OvynSGx3lkb8s5fLKNxnDaj/u6UOdm7W +vrd3NNd0O6rV4BrlX3+iTxEb+jQH1rTuOJUcJicRl6Z5aajvTac/lcdNUGieGqjjX JSlO+qiJtqShYTz1ktaVl5/AEupYKCdX1Vrjn9eBhZPMm+kj1KbCioask+G0OE5dak XkwL1uVpPyRsdjk5rXoZkjb1lPz4F5EDEJvOXCJXyv6CyddNA3AKO8tKk5NZ4l3PNj cc4XoBuOZEJzMmYpZNWg/T2fgE69DPZZ1BoWAegBH6U0jZ4x2DVCYEdvlHUn9gNB5t CzEyh2X4dfeiA== Message-ID: <7f76e23e-45a9-4e9d-b792-02da9e6deee5@zytor.com> Date: Tue, 1 Apr 2025 21:57:31 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH v1 01/15] x86/msr: Replace __wrmsr() with native_wrmsrl() To: Ingo Molnar Cc: "H. Peter Anvin" , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-edac@vger.kernel.org, kvm@vger.kernel.org, xen-devel@lists.xenproject.org, linux-ide@vger.kernel.org, linux-pm@vger.kernel.org, bpf@vger.kernel.org, llvm@lists.linux.dev, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com, peterz@infradead.org, acme@kernel.org, namhyung@kernel.org, mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org, irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com, wei.liu@kernel.org, ajay.kaher@broadcom.com, alexey.amakhalov@broadcom.com, bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com, pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com, luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com, haiyangz@microsoft.com, decui@microsoft.com, Linus Torvalds References: <20250331082251.3171276-1-xin@zytor.com> <20250331082251.3171276-2-xin@zytor.com> <9D15DE81-2E68-4FCD-A133-4963602E18C9@zytor.com> <7a503d55-db41-42da-8133-4a3dbbd36c7e@zytor.com> Content-Language: en-US From: Xin Li Autocrypt: addr=xin@zytor.com; keydata= xsDNBGUPz1cBDACS/9yOJGojBFPxFt0OfTWuMl0uSgpwk37uRrFPTTLw4BaxhlFL0bjs6q+0 2OfG34R+a0ZCuj5c9vggUMoOLdDyA7yPVAJU0OX6lqpg6z/kyQg3t4jvajG6aCgwSDx5Kzg5 Rj3AXl8k2wb0jdqRB4RvaOPFiHNGgXCs5Pkux/qr0laeFIpzMKMootGa4kfURgPhRzUaM1vy bsMsL8vpJtGUmitrSqe5dVNBH00whLtPFM7IbzKURPUOkRRiusFAsw0a1ztCgoFczq6VfAVu raTye0L/VXwZd+aGi401V2tLsAHxxckRi9p3mc0jExPc60joK+aZPy6amwSCy5kAJ/AboYtY VmKIGKx1yx8POy6m+1lZ8C0q9b8eJ8kWPAR78PgT37FQWKYS1uAroG2wLdK7FiIEpPhCD+zH wlslo2ETbdKjrLIPNehQCOWrT32k8vFNEMLP5G/mmjfNj5sEf3IOKgMTMVl9AFjsINLHcxEQ 6T8nGbX/n3msP6A36FDfdSEAEQEAAc0WWGluIExpIDx4aW5Aenl0b3IuY29tPsLBDQQTAQgA NxYhBIUq/WFSDTiOvUIqv2u9DlcdrjdRBQJlD89XBQkFo5qAAhsDBAsJCAcFFQgJCgsFFgID AQAACgkQa70OVx2uN1HUpgv/cM2fsFCQodLArMTX5nt9yqAWgA5t1srri6EgS8W3F+3Kitge tYTBKu6j5BXuXaX3vyfCm+zajDJN77JHuYnpcKKr13VcZi1Swv6Jx1u0II8DOmoDYLb1Q2ZW v83W55fOWJ2g72x/UjVJBQ0sVjAngazU3ckc0TeNQlkcpSVGa/qBIHLfZraWtdrNAQT4A1fa sWGuJrChBFhtKbYXbUCu9AoYmmbQnsx2EWoJy3h7OjtfFapJbPZql+no5AJ3Mk9eE5oWyLH+ QWqtOeJM7kKvn/dBudokFSNhDUw06e7EoVPSJyUIMbYtUO7g2+Atu44G/EPP0yV0J4lRO6EA wYRXff7+I1jIWEHpj5EFVYO6SmBg7zF2illHEW31JAPtdDLDHYcZDfS41caEKOQIPsdzQkaQ oW2hchcjcMPAfyhhRzUpVHLPxLCetP8vrVhTvnaZUo0xaVYb3+wjP+D5j/3+hwblu2agPsaE vgVbZ8Fx3TUxUPCAdr/p73DGg57oHjgezsDNBGUPz1gBDAD4Mg7hMFRQqlzotcNSxatlAQNL MadLfUTFz8wUUa21LPLrHBkUwm8RujehJrzcVbPYwPXIO0uyL/F///CogMNx7Iwo6by43KOy g89wVFhyy237EY76j1lVfLzcMYmjBoTH95fJC/lVb5Whxil6KjSN/R/y3jfG1dPXfwAuZ/4N cMoOslWkfZKJeEut5aZTRepKKF54T5r49H9F7OFLyxrC/uI9UDttWqMxcWyCkHh0v1Di8176 jjYRNTrGEfYfGxSp+3jYL3PoNceIMkqM9haXjjGl0W1B4BidK1LVYBNov0rTEzyr0a1riUrp Qk+6z/LHxCM9lFFXnqH7KWeToTOPQebD2B/Ah5CZlft41i8L6LOF/LCuDBuYlu/fI2nuCc8d m4wwtkou1Y/kIwbEsE/6RQwRXUZhzO6llfoN96Fczr/RwvPIK5SVMixqWq4QGFAyK0m/1ap4 bhIRrdCLVQcgU4glo17vqfEaRcTW5SgX+pGs4KIPPBE5J/ABD6pBnUUAEQEAAcLA/AQYAQgA JhYhBIUq/WFSDTiOvUIqv2u9DlcdrjdRBQJlD89ZBQkFo5qAAhsMAAoJEGu9DlcdrjdR4C0L /RcjolEjoZW8VsyxWtXazQPnaRvzZ4vhmGOsCPr2BPtMlSwDzTlri8BBG1/3t/DNK4JLuwEj OAIE3fkkm+UG4Kjud6aNeraDI52DRVCSx6xff3bjmJsJJMb12mWglN6LjdF6K+PE+OTJUh2F dOhslN5C2kgl0dvUuevwMgQF3IljLmi/6APKYJHjkJpu1E6luZec/lRbetHuNFtbh3xgFIJx 2RpgVDP4xB3f8r0I+y6ua+p7fgOjDLyoFjubRGed0Be45JJQEn7A3CSb6Xu7NYobnxfkwAGZ Q81a2XtvNS7Aj6NWVoOQB5KbM4yosO5+Me1V1SkX2jlnn26JPEvbV3KRFcwV5RnDxm4OQTSk PYbAkjBbm+tuJ/Sm+5Yp5T/BnKz21FoCS8uvTiziHj2H7Cuekn6F8EYhegONm+RVg3vikOpn gao85i4HwQTK9/D1wgJIQkdwWXVMZ6q/OALaBp82vQ2U9sjTyFXgDjglgh00VRAHP7u1Rcu4 l75w1xInsg== In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 4/1/2025 9:10 PM, Ingo Molnar wrote: > Yeah, I moved it over to: > > git://git.kernel.org/pub/scm/linux/kernel/git/mingo/tip.git WIP.x86/msr On it now. Thanks! Xin From xen-devel-bounces@lists.xenproject.org Wed Apr 02 06:18:42 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 06:18:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935129.1336595 (Exim 4.92) (envelope-from ) id 1tzrQi-0000MO-DP; Wed, 02 Apr 2025 06:18:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935129.1336595; Wed, 02 Apr 2025 06:18:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzrQi-0000MH-A8; Wed, 02 Apr 2025 06:18:28 +0000 Received: by outflank-mailman (input) for mailman id 935129; Wed, 02 Apr 2025 06:18:27 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzrQh-0000MB-6Q for xen-devel@lists.xenproject.org; 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bh=d9u1UHOwt3q+7T/calpbkRmllY4sydNWRR7pbH0F1sQ=; b=LeJQWIMZbF4Jl39qFj1FOgqfY+TgNorhqZ7Wgcrp9paSQ9+EOG9dGMi9L7ggjaFjTIAVfRbB47LaCANGgNbfYI3HcEaJbkXn7g+gYf/wXjtBrb+Ij1sqyxspTOMg9bHTMWxjSL2qNQPcWVXsWWOh3qOkBtVx0Zy94dVEWM2IugsA2T8vk121SgXfy4SZ4fXxWpy3qNmHdQbGuJQxDGOeUSSNjL2H2uq4jX1U8kSfSfeFshC+nZWju2yXU78Bg/5uob0WTPHdy1qgrj2218Gh6ZYeCpla7ac2n+8NzTJvR5IfsP81k4jEaZIopNL6S+VvqMYY0K8IOnsl3mGFRVDglw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=arm.com; dmarc=pass action=none header.from=arm.com; dkim=pass header.d=arm.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=arm.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=d9u1UHOwt3q+7T/calpbkRmllY4sydNWRR7pbH0F1sQ=; b=Rkg9rS1i01vcewIRg/zmcsgztDQnZeuggBHCrf4ZNpvWipORkZe53SB0W+gsjbRArPtL5/iUIARLpdneVu3b+jKq18BWZrjK9+45n6bqOF9aije6oFgCpOzepA8jvGSU4lwZD8uyrhyu0TykXSS2p/SwayVnw8PKfeMUcaM/KEI= From: Bertrand Marquis To: "Orzel, Michal" CC: "xen-devel@lists.xenproject.org" , Stefano Stabellini , Julien Grall , Volodymyr Babchuk Subject: Re: [PATCH] xen/arm: Drop process_shm_chosen() Thread-Topic: [PATCH] xen/arm: Drop process_shm_chosen() Thread-Index: AQHbouXQNh7nKprt5k2iUHPtnXy/N7OOxVgAgAAX+QCAAAdEAIAACRaAgAAIxYCAAA3XgIAA496A Date: Wed, 2 Apr 2025 06:18:05 +0000 Message-ID: <12D5AACF-7A89-43A7-A729-0F0D7AE501EB@arm.com> References: <20250401090937.105187-1-michal.orzel@amd.com> <3D313BC0-75C9-4208-9067-C1F6153B3859@arm.com> <237153F4-56B2-40AD-A2D4-824B621D3477@arm.com> <25e30373-139f-4827-91e7-a2dd6e85c433@amd.com> <16D32474-F78A-4E50-AA96-BE96D76D95FE@arm.com> In-Reply-To: Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: Apple Mail (2.3826.400.131.1.6) Authentication-Results-Original: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=arm.com; 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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Apr 2025 06:18:18.0070 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 52b22c23-223e-47f5-8423-08dd71ae28d9 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DU2PEPF00028D0B.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBBPR08MB5978 Hi Michal, > On 1 Apr 2025, at 18:42, Orzel, Michal wrote: >=20 >=20 >=20 > On 01/04/2025 17:53, Bertrand Marquis wrote: >>=20 >>=20 >> Hi Michal, >>=20 >>> On 1 Apr 2025, at 17:21, Orzel, Michal wrote: >>>=20 >>>=20 >>>=20 >>> On 01/04/2025 16:49, Bertrand Marquis wrote: >>>>=20 >>>>=20 >>>> Hi, >>>>=20 >>>>> On 1 Apr 2025, at 16:22, Orzel, Michal wrote: >>>>>=20 >>>>>=20 >>>>>=20 >>>>> On 01/04/2025 14:57, Bertrand Marquis wrote: >>>>>>=20 >>>>>>=20 >>>>>> Hi Michal, >>>>>>=20 >>>>>>> On 1 Apr 2025, at 11:09, Michal Orzel wrote: >>>>>>>=20 >>>>>>> There's no benefit in having process_shm_chosen() next to process_s= hm(). >>>>>>> The former is just a helper to pass "/chosen" node to the latter fo= r >>>>>>> hwdom case. Drop process_shm_chosen() and instead use process_shm() >>>>>>> passing NULL as node parameter, which will result in searching for = and >>>>>>> using /chosen to find shm node (the DT full path search is done in >>>>>>> process_shm() to avoid expensive lookup if !CONFIG_STATIC_SHM). Thi= s >>>>>>> will simplify future handling of hw/control domain separation. >>>>>>>=20 >>>>>>> Signed-off-by: Michal Orzel >>>>>>> --- >>>>>>> xen/arch/arm/domain_build.c | 2 +- >>>>>>> xen/arch/arm/include/asm/static-shmem.h | 14 -------------- >>>>>>> xen/arch/arm/static-shmem.c | 4 ++++ >>>>>>> 3 files changed, 5 insertions(+), 15 deletions(-) >>>>>>>=20 >>>>>>> diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_buil= d.c >>>>>>> index 2b5b4331834f..7f9e17e1de4d 100644 >>>>>>> --- a/xen/arch/arm/domain_build.c >>>>>>> +++ b/xen/arch/arm/domain_build.c >>>>>>> @@ -2325,7 +2325,7 @@ int __init construct_hwdom(struct kernel_info= *kinfo) >>>>>>> else >>>>>>> allocate_memory(d, kinfo); >>>>>>>=20 >>>>>>> - rc =3D process_shm_chosen(d, kinfo); >>>>>>> + rc =3D process_shm(d, kinfo, NULL); >>>>>>> if ( rc < 0 ) >>>>>>> return rc; >>>>>>>=20 >>>>>>> diff --git a/xen/arch/arm/include/asm/static-shmem.h b/xen/arch/arm= /include/asm/static-shmem.h >>>>>>> index fd0867c4f26b..94eaa9d500f9 100644 >>>>>>> --- a/xen/arch/arm/include/asm/static-shmem.h >>>>>>> +++ b/xen/arch/arm/include/asm/static-shmem.h >>>>>>> @@ -18,14 +18,6 @@ int make_resv_memory_node(const struct kernel_in= fo *kinfo, int addrcells, >>>>>>> int process_shm(struct domain *d, struct kernel_info *kinfo, >>>>>>> const struct dt_device_node *node); >>>>>>>=20 >>>>>>> -static inline int process_shm_chosen(struct domain *d, >>>>>>> - struct kernel_info *kinfo) >>>>>>> -{ >>>>>>> - const struct dt_device_node *node =3D dt_find_node_by_path("/c= hosen"); >>>>>>> - >>>>>>> - return process_shm(d, kinfo, node); >>>>>>> -} >>>>>>> - >>>>>>> int process_shm_node(const void *fdt, int node, uint32_t address_ce= lls, >>>>>>> uint32_t size_cells); >>>>>>>=20 >>>>>>> @@ -74,12 +66,6 @@ static inline int process_shm(struct domain *d, = struct kernel_info *kinfo, >>>>>>> return 0; >>>>>>> } >>>>>>>=20 >>>>>>> -static inline int process_shm_chosen(struct domain *d, >>>>>>> - struct kernel_info *kinfo) >>>>>>> -{ >>>>>>> - return 0; >>>>>>> -} >>>>>>> - >>>>>>> static inline void init_sharedmem_pages(void) {}; >>>>>>>=20 >>>>>>> static inline int remove_shm_from_rangeset(const struct kernel_info= *kinfo, >>>>>>> diff --git a/xen/arch/arm/static-shmem.c b/xen/arch/arm/static-shme= m.c >>>>>>> index c74fa13d4847..cda90105923d 100644 >>>>>>> --- a/xen/arch/arm/static-shmem.c >>>>>>> +++ b/xen/arch/arm/static-shmem.c >>>>>>> @@ -297,6 +297,10 @@ int __init process_shm(struct domain *d, struc= t kernel_info *kinfo, >>>>>>> { >>>>>>> struct dt_device_node *shm_node; >>>>>>>=20 >>>>>>> + /* Hwdom case - shm node under /chosen */ >>>>>>> + if ( !node ) >>>>>>> + node =3D dt_find_node_by_path("/chosen"); >>>>>>> + >>>>>>=20 >>>>>> I would have 2 questions here: >>>>>> - what if a NULL pointer is passed, wouldn't you wrongly look in the= main device tree ? >>>>> Do you mean from hwdom or domU path? In the former it is expected. In= the latter >>>>> it would be a bug given that there are several dozens of things that = operate on >>>>> this node being a /chosen/domU@X node before we pass node to process_= shm(). >>>>>=20 >>>>>> - isn't there a NULL case to be handled if dt_find_node_by_path does= not find a result ? >>>>> It wasn't validated before this change. It would be catched in early = boot code >>>>> so no worries. >>>>=20 >>>> Then an ASSERT on NULL would be good. >>> See below. >>>=20 >>>>=20 >>>>>=20 >>>>>>=20 >>>>>> Couldn't the condition also check for the domain to be the hwdom ? >>>>> I could although we have so many /chosen and hwdom asserts in the tre= e in the >>>>> dom0 creation that I find it not necessary. >>>>=20 >>>> There are never to many asserts but ok :-) >>>>=20 >>>> With an ASSERT added for the NULL case you can add my R-b. >>> :( >>> So you still want to put ASSERT for a case where host DT does not have = /chosen >>> node. I'd like to talk you to drop this idea. Normally I'm in favor of = using >>> ASSERTs but not for so obvious violations like missing /chosen. >>=20 >> I am not quite sure why you do not want an assert here. >> Reading the code the first that comes to mind is "what if this is still = NULL after" >> which would be clearly something no expected if someone sees an assert. >>=20 >> Seeing the place where it is, that would not impact performance in any w= ay. >> So why not adding it ? >>=20 >>>=20 >>> /chosen node is so crucial for Xen on Arm functioning that a lot of thi= ngs would >>> simply fail a lot earlier than a point where we call process_shm() at = the end >>> (almost) of hwdom creation. There would be no modules, so the first exa= mple that >>> comes to my head is panic due to no kernel which happens way before pro= cess_shm(). >>>=20 >>=20 >> Sure you might be right, what if something bypass this due to efi boot o= r acpi boot and the >> code comes down here ? >>=20 >> Even it might be true now, this would make sure that no change in the co= de is changing this. >>=20 >> Anyway i will not argue on that for to long as it is kind of a matter of= taste. >>=20 >> So feel free to put my acked-by without the assert. > You gave me a reason to scan the code and I realized that in ACPI case, i= f > STATIC_SHM is enabled, it triggers a bug in process_shm_chosen. So, you w= ere > right and we found a latent bug that is not related to this series. But m= aybe it > would want to be handled as separate fix before the process_shm_chosen dr= op? Nice at least this was useful, and it also means that there are never to mu= ch asserts :-) I would suggest to resubmit this patch on top of an other one fixing the la= tent issue to make sure everything is merged in the right order but it is up to you as yo= u will probably=20 be the one commiting both patches anyway. Cheers Bertrand >=20 > ~Michal From xen-devel-bounces@lists.xenproject.org Wed Apr 02 07:38:25 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 07:38:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935151.1336604 (Exim 4.92) (envelope-from ) id 1tzsfu-0001PH-3y; Wed, 02 Apr 2025 07:38:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935151.1336604; Wed, 02 Apr 2025 07:38:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzsfu-0001PA-1A; Wed, 02 Apr 2025 07:38:14 +0000 Received: by outflank-mailman (input) for mailman id 935151; Wed, 02 Apr 2025 07:38:11 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzsfr-0001P2-Jo for xen-devel@lists.xenproject.org; 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Drop process_shm_chosen() and instead use process_shm() >>>>>>>> passing NULL as node parameter, which will result in searching for and >>>>>>>> using /chosen to find shm node (the DT full path search is done in >>>>>>>> process_shm() to avoid expensive lookup if !CONFIG_STATIC_SHM). This >>>>>>>> will simplify future handling of hw/control domain separation. >>>>>>>> >>>>>>>> Signed-off-by: Michal Orzel >>>>>>>> --- >>>>>>>> xen/arch/arm/domain_build.c | 2 +- >>>>>>>> xen/arch/arm/include/asm/static-shmem.h | 14 -------------- >>>>>>>> xen/arch/arm/static-shmem.c | 4 ++++ >>>>>>>> 3 files changed, 5 insertions(+), 15 deletions(-) >>>>>>>> >>>>>>>> diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c >>>>>>>> index 2b5b4331834f..7f9e17e1de4d 100644 >>>>>>>> --- a/xen/arch/arm/domain_build.c >>>>>>>> +++ b/xen/arch/arm/domain_build.c >>>>>>>> @@ -2325,7 +2325,7 @@ int __init construct_hwdom(struct kernel_info *kinfo) >>>>>>>> else >>>>>>>> allocate_memory(d, kinfo); >>>>>>>> >>>>>>>> - rc = process_shm_chosen(d, kinfo); >>>>>>>> + rc = process_shm(d, kinfo, NULL); >>>>>>>> if ( rc < 0 ) >>>>>>>> return rc; >>>>>>>> >>>>>>>> diff --git a/xen/arch/arm/include/asm/static-shmem.h b/xen/arch/arm/include/asm/static-shmem.h >>>>>>>> index fd0867c4f26b..94eaa9d500f9 100644 >>>>>>>> --- a/xen/arch/arm/include/asm/static-shmem.h >>>>>>>> +++ b/xen/arch/arm/include/asm/static-shmem.h >>>>>>>> @@ -18,14 +18,6 @@ int make_resv_memory_node(const struct kernel_info *kinfo, int addrcells, >>>>>>>> int process_shm(struct domain *d, struct kernel_info *kinfo, >>>>>>>> const struct dt_device_node *node); >>>>>>>> >>>>>>>> -static inline int process_shm_chosen(struct domain *d, >>>>>>>> - struct kernel_info *kinfo) >>>>>>>> -{ >>>>>>>> - const struct dt_device_node *node = dt_find_node_by_path("/chosen"); >>>>>>>> - >>>>>>>> - return process_shm(d, kinfo, node); >>>>>>>> -} >>>>>>>> - >>>>>>>> int process_shm_node(const void *fdt, int node, uint32_t address_cells, >>>>>>>> uint32_t size_cells); >>>>>>>> >>>>>>>> @@ -74,12 +66,6 @@ static inline int process_shm(struct domain *d, struct kernel_info *kinfo, >>>>>>>> return 0; >>>>>>>> } >>>>>>>> >>>>>>>> -static inline int process_shm_chosen(struct domain *d, >>>>>>>> - struct kernel_info *kinfo) >>>>>>>> -{ >>>>>>>> - return 0; >>>>>>>> -} >>>>>>>> - >>>>>>>> static inline void init_sharedmem_pages(void) {}; >>>>>>>> >>>>>>>> static inline int remove_shm_from_rangeset(const struct kernel_info *kinfo, >>>>>>>> diff --git a/xen/arch/arm/static-shmem.c b/xen/arch/arm/static-shmem.c >>>>>>>> index c74fa13d4847..cda90105923d 100644 >>>>>>>> --- a/xen/arch/arm/static-shmem.c >>>>>>>> +++ b/xen/arch/arm/static-shmem.c >>>>>>>> @@ -297,6 +297,10 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo, >>>>>>>> { >>>>>>>> struct dt_device_node *shm_node; >>>>>>>> >>>>>>>> + /* Hwdom case - shm node under /chosen */ >>>>>>>> + if ( !node ) >>>>>>>> + node = dt_find_node_by_path("/chosen"); >>>>>>>> + >>>>>>> >>>>>>> I would have 2 questions here: >>>>>>> - what if a NULL pointer is passed, wouldn't you wrongly look in the main device tree ? >>>>>> Do you mean from hwdom or domU path? In the former it is expected. In the latter >>>>>> it would be a bug given that there are several dozens of things that operate on >>>>>> this node being a /chosen/domU@X node before we pass node to process_shm(). >>>>>> >>>>>>> - isn't there a NULL case to be handled if dt_find_node_by_path does not find a result ? >>>>>> It wasn't validated before this change. It would be catched in early boot code >>>>>> so no worries. >>>>> >>>>> Then an ASSERT on NULL would be good. >>>> See below. >>>> >>>>> >>>>>> >>>>>>> >>>>>>> Couldn't the condition also check for the domain to be the hwdom ? >>>>>> I could although we have so many /chosen and hwdom asserts in the tree in the >>>>>> dom0 creation that I find it not necessary. >>>>> >>>>> There are never to many asserts but ok :-) >>>>> >>>>> With an ASSERT added for the NULL case you can add my R-b. >>>> :( >>>> So you still want to put ASSERT for a case where host DT does not have /chosen >>>> node. I'd like to talk you to drop this idea. Normally I'm in favor of using >>>> ASSERTs but not for so obvious violations like missing /chosen. >>> >>> I am not quite sure why you do not want an assert here. >>> Reading the code the first that comes to mind is "what if this is still NULL after" >>> which would be clearly something no expected if someone sees an assert. >>> >>> Seeing the place where it is, that would not impact performance in any way. >>> So why not adding it ? >>> >>>> >>>> /chosen node is so crucial for Xen on Arm functioning that a lot of things would >>>> simply fail a lot earlier than a point where we call process_shm() at the end >>>> (almost) of hwdom creation. There would be no modules, so the first example that >>>> comes to my head is panic due to no kernel which happens way before process_shm(). >>>> >>> >>> Sure you might be right, what if something bypass this due to efi boot or acpi boot and the >>> code comes down here ? >>> >>> Even it might be true now, this would make sure that no change in the code is changing this. >>> >>> Anyway i will not argue on that for to long as it is kind of a matter of taste. >>> >>> So feel free to put my acked-by without the assert. >> You gave me a reason to scan the code and I realized that in ACPI case, if >> STATIC_SHM is enabled, it triggers a bug in process_shm_chosen. So, you were >> right and we found a latent bug that is not related to this series. But maybe it >> would want to be handled as separate fix before the process_shm_chosen drop? > > Nice at least this was useful, and it also means that there are never to much asserts :-) > > I would suggest to resubmit this patch on top of an other one fixing the latent issue to > make sure everything is merged in the right order but it is up to you as you will probably > be the one commiting both patches anyway. Actually, I was a little bit imprecise. We don't need any ASSERT and my above reasoning holds true. The problem I found is that when booting with ACPI we don't protect call to process_shm_chosen with acpi_enabled like we do for cases relying on DT. With ACPI enabled, we don't unflatten the host dt and host_dt is always NULL, so it does not matter whether the host DT has or does not have /chosen node. So we need the following fix I plan to submit separately later on today: - rc = process_shm_chosen(d, kinfo); - if ( rc < 0 ) - return rc; + if ( acpi_disabled ) + { + rc = process_shm_chosen(d, kinfo); + if ( rc < 0 ) + return rc; + } ~Michal From xen-devel-bounces@lists.xenproject.org Wed Apr 02 07:42:56 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 07:42:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935163.1336614 (Exim 4.92) (envelope-from ) id 1tzskR-00044n-KH; Wed, 02 Apr 2025 07:42:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935163.1336614; Wed, 02 Apr 2025 07:42:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzskR-00044g-HY; Wed, 02 Apr 2025 07:42:55 +0000 Received: by outflank-mailman (input) for mailman id 935163; Wed, 02 Apr 2025 07:42:55 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzskR-00044a-0g for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 07:42:55 +0000 Received: from mail-wm1-x335.google.com (mail-wm1-x335.google.com [2a00:1450:4864:20::335]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 15c144e5-0f96-11f0-9ea7-5ba50f476ded; Wed, 02 Apr 2025 09:42:53 +0200 (CEST) Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-43cf58eea0fso30963715e9.0 for ; Wed, 02 Apr 2025 00:42:53 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Smith" , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , Andrew Cooper , xen-devel@lists.xenproject.org References: <20250401130840.72119-1-roger.pau@citrix.com> <20250401130840.72119-4-roger.pau@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20250401130840.72119-4-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 01.04.2025 15:08, Roger Pau Monne wrote: > @@ -83,6 +111,31 @@ static unsigned int load(const char *name, int *handle, > exit(3); > } > > + if ( !string_table && pe_hdr.symbol_table ) > + { > + char *strings; > + > + if ( lseek(in, pe_hdr.symbol_table + pe_hdr.symbols * SYM_SIZE, > + SEEK_SET) < 0 || > + read(in, &string_table_size, sizeof(string_table_size)) != > + sizeof(string_table_size) ) > + { > + perror(name); > + exit(3); > + } > + > + string_table_size -= sizeof(string_table_size); > + strings = malloc(string_table_size); One more thing: Perhaps better to allocate an extra byte here, ... > + if ( read(in, strings, string_table_size) != string_table_size ) > + { > + perror(name); > + exit(3); > + } > + > + string_table = strings; > + } ... and then put a nul terminator at the end, just in case. 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Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit On 2025-03-28 07:43, Kwon, Gihwan wrote: > Dear Xen Community, > > I hope this message finds you well. > > I have heard that there exists a minimal Xen configuration optimized > for > safety-critical products, particularly in automotive applications, with > the > code size reduced to approximately 50k SLOC. > > Could anyone provide guidance or point me to relevant resources > regarding > this minimal Xen configuration? Any insights or references would be > greatly > appreciated. > > Thank you in advance for your assistance. > > Best regards, > Gihwan Kwon Hello, I am part of the team that provides static analysis for Xen, mainly towards the objective to make Xen compliant with MISRA C guidelines. As part of that effort, a minimal Xen configuration has been defined (for Arm and x86_64) at [1], which is the one currently analyzed for static analysis for each commit [2]. It starts from the default configuration for the architecture (i.e., make defconfig) and then turns on or off various Kconfig options, as specified by EXTRA_XEN_CONFIG. @Stefano Stabellini (Cc'ed) is the main driving force behind the Xen certification effort for automotive, therefore he's probably the best person to approach to get more information on this matter. Hope this was helpful as a starting point. Best Regards, Nicola Vetrini [1] https://gitlab.com/xen-project/xen/-/blob/staging/automation/gitlab-ci/analyze.yaml?ref_type=heads [2] https://gitlab.com/xen-project/hardware/xen/-/pipelines -- Nicola Vetrini, B.Sc. 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Smith" , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , Andrew Cooper , xen-devel@lists.xenproject.org References: <20250401130840.72119-1-roger.pau@citrix.com> <20250401130840.72119-3-roger.pau@citrix.com> <6c37ad18-a830-453e-a7ff-fb4978e3f0df@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <6c37ad18-a830-453e-a7ff-fb4978e3f0df@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 01.04.2025 16:17, Jan Beulich wrote: > On 01.04.2025 15:08, Roger Pau Monne wrote: >> The base address is in the pe32_opt_hdr, not after it. Which is a result of pe.h munging both the optional and the NT header into a single structure. >> Previous to commit f7f42accbbbb the base was read standalone (as the first >> field of pe32_opt_hdr). However with the addition of reading the full >> contents of pe32_opt_hdr, such read will also fetch the base. The current >> attempt to read the base after pe32_opt_hdr is bogus, and could only work >> if the file cursor is repositioned using lseek(), but there's no need for >> that as the data is already fetched in pe32_opt_hdr. > > Yes, but: How did things work at all then with this bug? It simply didn't. We got away only because apparently no-one tried a build with a linker old enough for this tool to come into play. I'd like to suggest the replacement patch below, though. Jan x86/EFI: correct mkreloc header (field) reading With us now reading the full combined optional and NT headers, the subsequent reading of (and seeking to) NT header fields is wrong. Since PE32 and PE32+ NT headers are different anyway (beyond the image base oddity extending across both headers), switch to using a union. This allows to fetch the image base more directly then. Additionally add checking to map_section(), which would have caught at least the wrong (zero) image size that we previously used. Fixes: f7f42accbbbb ("x86/efi: Use generic PE/COFF structures") Reported-by: Roger Pau Monné Signed-off-by: Jan Beulich --- Of the two checks added to map_section(), the 1st ends up being largely redundant with the 2nd one. Should we use just the latter? Also sanity checking the image base would be possible, but more cumbersome if we wanted to check moret than just "is in high half of address space). Therefore I've left out doing so. --- a/xen/arch/x86/efi/mkreloc.c +++ b/xen/arch/x86/efi/mkreloc.c @@ -28,14 +28,16 @@ static void usage(const char *cmd, int r static unsigned int load(const char *name, int *handle, struct section_header **sections, uint_fast64_t *image_base, - uint32_t *image_size, + uint_fast32_t *image_size, unsigned int *width) { int in = open(name, O_RDONLY); struct mz_hdr mz_hdr; struct pe_hdr pe_hdr; - struct pe32_opt_hdr pe32_opt_hdr; - uint32_t base; + union { + struct pe32_opt_hdr pe; + struct pe32plus_opt_hdr pep; + } pe32_opt_hdr; if ( in < 0 || read(in, &mz_hdr, sizeof(mz_hdr)) != sizeof(mz_hdr) ) @@ -54,31 +56,40 @@ static unsigned int load(const char *nam if ( lseek(in, mz_hdr.peaddr, SEEK_SET) < 0 || read(in, &pe_hdr, sizeof(pe_hdr)) != sizeof(pe_hdr) || - read(in, &pe32_opt_hdr, sizeof(pe32_opt_hdr)) != sizeof(pe32_opt_hdr) || - read(in, &base, sizeof(base)) != sizeof(base) || - /* - * Luckily the image size field lives at the - * same offset for both formats. - */ - lseek(in, 24, SEEK_CUR) < 0 || - read(in, image_size, sizeof(*image_size)) != sizeof(*image_size) ) + (read(in, &pe32_opt_hdr.pe, sizeof(pe32_opt_hdr.pe)) != + sizeof(pe32_opt_hdr.pe)) ) { perror(name); exit(3); } switch ( (pe_hdr.magic == PE_MAGIC && - pe_hdr.opt_hdr_size > sizeof(pe32_opt_hdr)) * - pe32_opt_hdr.magic ) + pe_hdr.opt_hdr_size > sizeof(pe32_opt_hdr.pe)) * + pe32_opt_hdr.pe.magic ) { case PE_OPT_MAGIC_PE32: *width = 32; - *image_base = base; + *image_base = pe32_opt_hdr.pe.image_base; + *image_size = pe32_opt_hdr.pe.image_size; break; case PE_OPT_MAGIC_PE32PLUS: - *width = 64; - *image_base = ((uint64_t)base << 32) | pe32_opt_hdr.data_base; - break; + if ( pe_hdr.opt_hdr_size > sizeof(pe32_opt_hdr.pep) ) + { + if ( read(in, + &pe32_opt_hdr.pe + 1, + sizeof(pe32_opt_hdr.pep) - sizeof(pe32_opt_hdr.pe)) != + sizeof(pe32_opt_hdr.pep) - sizeof(pe32_opt_hdr.pe) ) + { + perror(name); + exit(3); + } + + *width = 64; + *image_base = pe32_opt_hdr.pep.image_base; + *image_size = pe32_opt_hdr.pep.image_size; + break; + } + /* Fall through. */ default: fprintf(stderr, "%s: Wrong PE file format\n", name); exit(3); @@ -108,11 +119,28 @@ static unsigned int load(const char *nam static long page_size; static const void *map_section(const struct section_header *sec, int in, - const char *name) + const char *name, uint_fast32_t image_size) { const char *ptr; unsigned long offs; + if ( sec->rva > image_size ) + { + fprintf(stderr, + "%s: section %.8s @ %08"PRIx32" beyond image size %08"PRIxFAST32"\n", + name, sec->name, sec->rva, image_size); + exit(6); + } + + if ( (uint_fast64_t)sec->rva + sec->virtual_size > image_size ) + { + fprintf(stderr, + "%s: section %.8s @ [%09"PRIx32",%09"PRIxFAST64") extends beyond image size %09"PRIxFAST32"\n", + name, sec->name, sec->rva, + (uint_fast64_t)sec->rva + sec->virtual_size, image_size); + exit(6); + } + if ( !page_size ) page_size = sysconf(_SC_PAGESIZE); offs = sec->data_addr & (page_size - 1); @@ -233,7 +261,7 @@ int main(int argc, char *argv[]) int in1, in2; unsigned int i, nsec, width1, width2; uint_fast64_t base1, base2; - uint32_t size1, size2; + uint_fast32_t size1, size2; struct section_header *sec1, *sec2; if ( argc == 1 || @@ -308,8 +336,8 @@ int main(int argc, char *argv[]) sec1[i].raw_data_size = sec1[i].virtual_size; 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pr=C From: Michal Orzel To: CC: Michal Orzel , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk Subject: [PATCH v2] xen/arm: Drop process_shm_chosen() Date: Wed, 2 Apr 2025 10:42:33 +0200 Message-ID: <20250402084233.114604-2-michal.orzel@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250402084233.114604-1-michal.orzel@amd.com> References: <20250402084233.114604-1-michal.orzel@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Received-SPF: None (SATLEXMB04.amd.com: michal.orzel@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF000023D8:EE_|DS5PPF5FAA0E762:EE_ X-MS-Office365-Filtering-Correlation-Id: 393196b1-f36a-4e87-0dca-08dd71c2557b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|376014|36860700013|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?fMzgybBru1xBuIywczwfWY6RCmhyxWywk0EczLBVthWs0QE0SYpEErM+kmZC?= =?us-ascii?Q?+tsc8tHeYxQ0V6r9+eC43mYp70Q8lu8KWFHONFzxsejJKS8wfkJzfrGRR7tN?= =?us-ascii?Q?mm5Oorcy1HVKteq3jtIDR3XYbm2D8ID7GTuyVHCGEvKm4Zj6SzvypkbvLUcn?= =?us-ascii?Q?AvfA7J03XBP4SAA8in8l0bjrCTEpv1SuVFZqARV7RoF06gkXbUSaPsQjKF0n?= =?us-ascii?Q?8AH85SJTEa7SkQnROIPC9PywkCDqoFbxZeTkkUzHtQeC5HItKPurPGQ/SmrV?= =?us-ascii?Q?JCXqpToglt2qKOmhS5s/MIJJAThSHQDY46H3brtW3QzrujZLgEn2tqACWKMj?= =?us-ascii?Q?mC0oRmIBJ5YqLMZRHzap/EcW3+QoOg3zP0C7FFKj3MaGi4Ww3X0b8c1N0ucv?= =?us-ascii?Q?teJjAMY7CcdynfhTTpZot9+5QHmMnvL5rsyQXwbWUOcE5kI68Z7eOR2w3skG?= =?us-ascii?Q?tRwJ01j1MWQUzIj6v7nV9jjjrezbYT2N5HaAi0j+HdRdTl7pI8ArGALrm4PK?= =?us-ascii?Q?gro/o1lnwcQ8q5PUiLy36U/IYgnnkZQUvZiQfWVLcEiO82yCa5jB1To9ZdaZ?= =?us-ascii?Q?xkAJjLJwDBS2OJMKUtXk4x22yHU+LCw2eAWqIFc1By7pgqDkbXTNitoyaNhd?= =?us-ascii?Q?HewIz6SDQMhCbDyRuXyg8q+35ATlwOwdxXeRdQrOX0Y8TElPFd6/lxqKiAf7?= =?us-ascii?Q?NZv8uwkSGBx2zpIegzXBPVOon9ruOIS5ef5ZR+R3R9HCyAkwNYkRqR9WyL/F?= =?us-ascii?Q?wzH+zIOkwjJmKq6mjzKQqxNQml7mXzMzaV+51hk1i3/PorVtga1mub0UM6Tq?= =?us-ascii?Q?+bcRly2WHy6wBBpkXUHGj5Vh0MFjzArdIy4bHniMFaVJ7rujJbNlvs6+8jBR?= =?us-ascii?Q?QQZ/pj/OyJMu95X658UdRyCt7dyY2BOaiS878zNYkzw7Noz0HbDj+LGKNGK/?= =?us-ascii?Q?nRyctsGPMXHwXnNJtdsGRJxhTCvjlfLlu00P2BdYhZzAVzs9cFRPIJMUQIbF?= =?us-ascii?Q?SBMwM937suyYSCthIW5w0Qo4nhkRp/Jkz+DbU8sWPRqU+Xmdg3c+oRBTCQD3?= =?us-ascii?Q?WOUPTtuBrRSind5/ltil0v33qhrKQ7QtebhKed1godBFOKjy2lUAJFyoFVIn?= =?us-ascii?Q?S6pkMlWWAy60BSW3Nr/l0sb1j4HEsl9vSEZWIEZDSke6+Lkv+qnnH4XSuKbh?= =?us-ascii?Q?+wbPx113lZ8u1dgMGdVBbg0lMMEwy3Obgip/eD+cGG5eKvhh1tIW2jUiLkvP?= =?us-ascii?Q?rMAKIqVxBFjoaeXdPvitLSfnK0JyIHxw1Pumr4X4b330nLFLaY04oirGk/Br?= =?us-ascii?Q?sMZQxTCXkC392/XrfnLEDSaqXjBo2U5JHenUIr/Y0dbqCbW+vkYvUUf1Fr60?= =?us-ascii?Q?4TxRafl9Y46YsJhb7Nv+sCNma7O0IY0VwDC4Trq5PHc+ySeLf1muD9/iRZRC?= =?us-ascii?Q?hp1Y4wqrbvvPewyBnLp9hfkb1LFZjDLnDTc8NJw3FsLR/SQSkgRv0C6+kyaW?= =?us-ascii?Q?P9A4UllIP/Mc+Z4=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(376014)(36860700013)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Apr 2025 08:42:42.6865 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 393196b1-f36a-4e87-0dca-08dd71c2557b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF000023D8.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS5PPF5FAA0E762 There's no benefit in having process_shm_chosen() next to process_shm(). The former is just a helper to pass "/chosen" node to the latter for hwdom case. Drop process_shm_chosen() and instead use process_shm() passing NULL as node parameter, which will result in searching for and using /chosen to find shm node (the DT full path search is done in process_shm() to avoid expensive lookup if !CONFIG_STATIC_SHM). This will simplify future handling of hw/control domain separation. Signed-off-by: Michal Orzel --- Changes in v2: - rebase on ACPI fix - add BUG_ON for !/chosen --- xen/arch/arm/domain_build.c | 2 +- xen/arch/arm/include/asm/static-shmem.h | 14 -------------- xen/arch/arm/static-shmem.c | 7 +++++++ 3 files changed, 8 insertions(+), 15 deletions(-) diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index 85f423214a44..634333cddef3 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -2327,7 +2327,7 @@ int __init construct_hwdom(struct kernel_info *kinfo) if ( acpi_disabled ) { - rc = process_shm_chosen(d, kinfo); + rc = process_shm(d, kinfo, NULL); if ( rc < 0 ) return rc; } diff --git a/xen/arch/arm/include/asm/static-shmem.h b/xen/arch/arm/include/asm/static-shmem.h index fd0867c4f26b..94eaa9d500f9 100644 --- a/xen/arch/arm/include/asm/static-shmem.h +++ b/xen/arch/arm/include/asm/static-shmem.h @@ -18,14 +18,6 @@ int make_resv_memory_node(const struct kernel_info *kinfo, int addrcells, int process_shm(struct domain *d, struct kernel_info *kinfo, const struct dt_device_node *node); -static inline int process_shm_chosen(struct domain *d, - struct kernel_info *kinfo) -{ - const struct dt_device_node *node = dt_find_node_by_path("/chosen"); - - return process_shm(d, kinfo, node); -} - int process_shm_node(const void *fdt, int node, uint32_t address_cells, uint32_t size_cells); @@ -74,12 +66,6 @@ static inline int process_shm(struct domain *d, struct kernel_info *kinfo, return 0; } -static inline int process_shm_chosen(struct domain *d, - struct kernel_info *kinfo) -{ - return 0; -} - static inline void init_sharedmem_pages(void) {}; static inline int remove_shm_from_rangeset(const struct kernel_info *kinfo, diff --git a/xen/arch/arm/static-shmem.c b/xen/arch/arm/static-shmem.c index c74fa13d4847..e8d4ca3ba3ff 100644 --- a/xen/arch/arm/static-shmem.c +++ b/xen/arch/arm/static-shmem.c @@ -297,6 +297,13 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo, { struct dt_device_node *shm_node; + /* Hwdom case - shm node under /chosen */ + if ( !node ) + { + node = dt_find_node_by_path("/chosen"); + BUG_ON(!node); + } + dt_for_each_child_node(node, shm_node) { const struct membank *boot_shm_bank; -- 2.25.1 From xen-devel-bounces@lists.xenproject.org Wed Apr 02 08:43:00 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 08:43:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935212.1336651 (Exim 4.92) (envelope-from ) id 1tztgR-00034Y-KB; Wed, 02 Apr 2025 08:42:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935212.1336651; Wed, 02 Apr 2025 08:42:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tztgR-00034R-Gn; Wed, 02 Apr 2025 08:42:51 +0000 Received: by outflank-mailman (input) for mailman id 935212; Wed, 02 Apr 2025 08:42:50 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tztgQ-00033V-3N for xen-devel@lists.xenproject.org; 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h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=qt9owdaK4rx3uvVkne5yzswFleGRsEogC1xMHaEwPi0=; b=xZTdyLxiozEQwzgVzmfDpfvk9j0QjaGCbDZLA8eH2+vTnqzy3QpaWxVvNokZ/ekGmz4CEu3b7xHCylOZ1ou9MN7oolfmQyb7BJByWIxc2fEq2XFwreDN+t1swK7C0iGhMEkHMu3CJ5JuGxcbI1HCqwhgOY2IvkiVvS3vmr8fLA0= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C From: Michal Orzel To: CC: Michal Orzel , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk Subject: [PATCH] xen/arm: Don't call process_shm_chosen() during ACPI boot Date: Wed, 2 Apr 2025 10:42:32 +0200 Message-ID: <20250402084233.114604-1-michal.orzel@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Received-SPF: None (SATLEXMB04.amd.com: michal.orzel@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF000023D8:EE_|DM4PR12MB6010:EE_ X-MS-Office365-Filtering-Correlation-Id: d251b543-caa8-4c42-04b1-08dd71c25496 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|82310400026|1800799024|376014; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Apr 2025 08:42:41.1866 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d251b543-caa8-4c42-04b1-08dd71c25496 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF000023D8.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6010 Static shared memory requires device-tree boot. At the moment, booting with ACPI enabled and CONFIG_STATIC_SHM=y results in a data abort when dereferencing node in process_shm() because dt_host is always NULL. Fixes: 09c0a8976acf ("xen/arm: enable statically shared memory on Dom0") Signed-off-by: Michal Orzel --- xen/arch/arm/domain_build.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index 2b5b4331834f..85f423214a44 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -2325,9 +2325,12 @@ int __init construct_hwdom(struct kernel_info *kinfo) else allocate_memory(d, kinfo); - rc = process_shm_chosen(d, kinfo); - if ( rc < 0 ) - return rc; + if ( acpi_disabled ) + { + rc = process_shm_chosen(d, kinfo); + if ( rc < 0 ) + return rc; + } /* Map extra GIC MMIO, irqs and other hw stuffs to dom0. */ rc = gic_map_hwdom_extra_mappings(d); -- 2.25.1 From xen-devel-bounces@lists.xenproject.org Wed Apr 02 08:51:56 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 08:51:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935240.1336670 (Exim 4.92) (envelope-from ) id 1tztpA-0006Qm-Te; Wed, 02 Apr 2025 08:51:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935240.1336670; Wed, 02 Apr 2025 08:51:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tztpA-0006Qf-R5; Wed, 02 Apr 2025 08:51:52 +0000 Received: by outflank-mailman (input) for mailman id 935240; Wed, 02 Apr 2025 08:51:51 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tztp9-0006QX-JI for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 08:51:51 +0000 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [2a00:1450:4864:20::42b]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id b707f2d7-0f9f-11f0-9ffb-bf95429c2676; Wed, 02 Apr 2025 10:51:49 +0200 (CEST) Received: by mail-wr1-x42b.google.com with SMTP id ffacd0b85a97d-39141ffa9fcso6264834f8f.0 for ; Wed, 02 Apr 2025 01:51:49 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Therefore to yield functionally identical binaries independent of whether mkreloc needs to come into play, add --dynamicbase as well. GNU ld further defaults to --high-entropy-va (along with --dynamicbase and --nxcompat) unless "Cygwin-like". This seems wrong to me; that default should be dependent upon "MinGW-like" instead; for the purpose of building EFI binaries with a PE32+-capable ELF linker neither "Cygwin-like" nor "MinGW-like" ought to be true. We certainly don't mean to have this bit set in the DLL characteristics, so suppress its setting. Sadly while --high-entropy-va is supported by GNU ld 2.25, --disable-high-entropy-va was introduced only in 2.36. Luckily the defaulting to --high-entropy-va was also only introduced in 2.36. Plus --disable-reloc-section was introduced precisely there, too. Hence leverage the probing we do as to base relocation generation, to also determine whether to pass --disable-high-entropy-va. Signed-off-by: Jan Beulich --- I remain uncertain about the applicability of DLL characteristics to non-DLLs, i.e. images without IMAGE_FILE_DLL set; current MS doc says nothing either way. Yet producing consistent binaries still seems desirable, even if the field wasn't to be used by loaders. --- a/xen/arch/x86/arch.mk +++ b/xen/arch/x86/arch.mk @@ -113,6 +113,7 @@ efi-nr-fixups := $(shell LC_ALL=C $(OBJD ifeq ($(efi-nr-fixups),2) MKRELOC := : +EFI_LDFLAGS += --disable-high-entropy-va else MKRELOC := arch/x86/efi/mkreloc # If the linker produced fixups but not precisely two of them, we need to @@ -123,6 +124,8 @@ EFI_LDFLAGS += --disable-reloc-section endif endif +EFI_LDFLAGS += --dynamicbase + endif # $(XEN_BUILD_PE) export XEN_BUILD_EFI XEN_BUILD_PE From xen-devel-bounces@lists.xenproject.org Wed Apr 02 08:59:20 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 08:59:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935252.1336681 (Exim 4.92) (envelope-from ) id 1tztwI-00073v-L2; Wed, 02 Apr 2025 08:59:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935252.1336681; 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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Apr 2025 08:59:05.6503 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d260ce14-6a26-439b-987e-08dd71c49f54 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM4PEPF00027A66.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS4PR08MB8166 Hi Michal, > On 2 Apr 2025, at 10:42, Michal Orzel wrote: >=20 > Static shared memory requires device-tree boot. At the moment, booting > with ACPI enabled and CONFIG_STATIC_SHM=3Dy results in a data abort when > dereferencing node in process_shm() because dt_host is always NULL. >=20 > Fixes: 09c0a8976acf ("xen/arm: enable statically shared memory on Dom0") > Signed-off-by: Michal Orzel Reviewed-by: Bertrand Marquis Cheers Bertrand > --- > xen/arch/arm/domain_build.c | 9 ++++++--- > 1 file changed, 6 insertions(+), 3 deletions(-) >=20 > diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c > index 2b5b4331834f..85f423214a44 100644 > --- a/xen/arch/arm/domain_build.c > +++ b/xen/arch/arm/domain_build.c > @@ -2325,9 +2325,12 @@ int __init construct_hwdom(struct kernel_info *kin= fo) > else > allocate_memory(d, kinfo); >=20 > - rc =3D process_shm_chosen(d, kinfo); > - if ( rc < 0 ) > - return rc; > + if ( acpi_disabled ) > + { > + rc =3D process_shm_chosen(d, kinfo); > + if ( rc < 0 ) > + return rc; > + } >=20 > /* Map extra GIC MMIO, irqs and other hw stuffs to dom0. */ > rc =3D gic_map_hwdom_extra_mappings(d); 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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Apr 2025 08:59:47.1032 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f3aef3b9-48b5-4f97-93b1-08dd71c4b80e X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AMS1EPF00000042.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR08MB5957 Hi Michal, > On 2 Apr 2025, at 10:42, Michal Orzel wrote: >=20 > There's no benefit in having process_shm_chosen() next to process_shm(). > The former is just a helper to pass "/chosen" node to the latter for > hwdom case. Drop process_shm_chosen() and instead use process_shm() > passing NULL as node parameter, which will result in searching for and > using /chosen to find shm node (the DT full path search is done in > process_shm() to avoid expensive lookup if !CONFIG_STATIC_SHM). This > will simplify future handling of hw/control domain separation. >=20 > Signed-off-by: Michal Orzel Thanks for the BUG_ON :-) Reviewed-by: Bertrand Marquis Cheers Bertrand > --- > Changes in v2: > - rebase on ACPI fix > - add BUG_ON for !/chosen > --- > xen/arch/arm/domain_build.c | 2 +- > xen/arch/arm/include/asm/static-shmem.h | 14 -------------- > xen/arch/arm/static-shmem.c | 7 +++++++ > 3 files changed, 8 insertions(+), 15 deletions(-) >=20 > diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c > index 85f423214a44..634333cddef3 100644 > --- a/xen/arch/arm/domain_build.c > +++ b/xen/arch/arm/domain_build.c > @@ -2327,7 +2327,7 @@ int __init construct_hwdom(struct kernel_info *kinf= o) >=20 > if ( acpi_disabled ) > { > - rc =3D process_shm_chosen(d, kinfo); > + rc =3D process_shm(d, kinfo, NULL); > if ( rc < 0 ) > return rc; > } > diff --git a/xen/arch/arm/include/asm/static-shmem.h b/xen/arch/arm/inclu= de/asm/static-shmem.h > index fd0867c4f26b..94eaa9d500f9 100644 > --- a/xen/arch/arm/include/asm/static-shmem.h > +++ b/xen/arch/arm/include/asm/static-shmem.h > @@ -18,14 +18,6 @@ int make_resv_memory_node(const struct kernel_info *ki= nfo, int addrcells, > int process_shm(struct domain *d, struct kernel_info *kinfo, > const struct dt_device_node *node); >=20 > -static inline int process_shm_chosen(struct domain *d, > - struct kernel_info *kinfo) > -{ > - const struct dt_device_node *node =3D dt_find_node_by_path("/chosen"= ); > - > - return process_shm(d, kinfo, node); > -} > - > int process_shm_node(const void *fdt, int node, uint32_t address_cells, > uint32_t size_cells); >=20 > @@ -74,12 +66,6 @@ static inline int process_shm(struct domain *d, struct= kernel_info *kinfo, > return 0; > } >=20 > -static inline int process_shm_chosen(struct domain *d, > - struct kernel_info *kinfo) > -{ > - return 0; > -} > - > static inline void init_sharedmem_pages(void) {}; >=20 > static inline int remove_shm_from_rangeset(const struct kernel_info *kinf= o, > diff --git a/xen/arch/arm/static-shmem.c b/xen/arch/arm/static-shmem.c > index c74fa13d4847..e8d4ca3ba3ff 100644 > --- a/xen/arch/arm/static-shmem.c > +++ b/xen/arch/arm/static-shmem.c > @@ -297,6 +297,13 @@ int __init process_shm(struct domain *d, struct kern= el_info *kinfo, > { > struct dt_device_node *shm_node; >=20 > + /* Hwdom case - shm node under /chosen */ > + if ( !node ) > + { > + node =3D dt_find_node_by_path("/chosen"); > + BUG_ON(!node); > + } > + > dt_for_each_child_node(node, shm_node) > { > const struct membank *boot_shm_bank; > --=20 > 2.25.1 >=20 From xen-devel-bounces@lists.xenproject.org Wed Apr 02 09:02:44 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 09:02:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935280.1336702 (Exim 4.92) (envelope-from ) id 1tztzf-000271-IN; Wed, 02 Apr 2025 09:02:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935280.1336702; Wed, 02 Apr 2025 09:02:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tztzf-00026u-E1; Wed, 02 Apr 2025 09:02:43 +0000 Received: by outflank-mailman (input) for mailman id 935280; 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pr=C From: Michal Orzel To: CC: Michal Orzel , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Jan Beulich Subject: [PATCH] xen/arm: mpu: Use new-style annotations Date: Wed, 2 Apr 2025 11:02:29 +0200 Message-ID: <20250402090229.161177-1-michal.orzel@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000F0E5:EE_|BY5PR12MB4242:EE_ X-MS-Office365-Filtering-Correlation-Id: 72572f61-0b24-41c4-bece-08dd71c51b33 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|376014|36860700013|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?GPh94eDxuYUUQBusF8F6zWU8+bEOD3d2rtgz4Re2CsJkK6x5OrP1hRkFK5WR?= =?us-ascii?Q?/396xLbXcIGgzXmRtPEscbotSNWDdUlLB10Hz32CuR8RJG8HC8SLzTEQD6sw?= =?us-ascii?Q?uJbHRAZGH2sMh8cJUcbR6Nj5/qURQG9fdhV91ZgFj23G7iAzNX7epj9/w28K?= =?us-ascii?Q?IsksM6fJrNisEPY4KYiKgIZcns1tk9TiE8oMsE3naP6VLXWJkl3JIlosZs1h?= =?us-ascii?Q?bLDZzOP9w8cNJO7Hw+8QcFpUJBi9RBoji1vRaoiITkj39jOjI/zS7ymjvRhA?= =?us-ascii?Q?vODb+HtJ2TE8uLxNBtLQf0K10dWVybhz8nbvcG4z0guHyYzizfHyGo67Z6se?= =?us-ascii?Q?Am46Xke6wo9SFnJOJq30pVQHoYUYrWo7NWtIFK+CgR1HfWAUGuNu3cyhtjeC?= =?us-ascii?Q?b9Fc8ue77zs0vAWW7dPr0cUuw4xexWjpo24Ew27+xHeytLzxv4tTqXsIefSb?= =?us-ascii?Q?yBnX+iyEbZhkG6UtA7UxlS5ZGnHf1K4z/pFwRlYtrVaOtqubg16Nxv6abEGV?= =?us-ascii?Q?QxggWxzVPM0X83y8oqYOrYCl6ssfyZf9f8/BOIYC4jdKmm9221EPcSrNbckG?= =?us-ascii?Q?bUdcYZm7Q0CQmTWvx/FVfC0yJliF1JiNLJMZ5MLd5xo7YmK+x1rGArhJcDBV?= =?us-ascii?Q?p2v10x+Z+gEXyt0BDR83rx6ObPCeOqhrIAe9bmkF1BSPZSKjZtDBSf0nFe6Z?= =?us-ascii?Q?/blvUef/Nqkl3iSUl/xIq0R7qUqMG1uJNy6ulbRWhE2WLqSEM1KG3iUHsj/q?= =?us-ascii?Q?txuU5/rOCPnJQ5MsMEQW/XDr6X0X6vExLoZUtOhONTAUWu5XUBpl5SpYPVOC?= =?us-ascii?Q?ShVMsqLOdNPetWse82w/x7QTP+UGx99iR7tpeaVFD5jgKx078bKUF401OYVk?= =?us-ascii?Q?Ap7I/IF2dzf2J2KY8pDInNKl1WcWFm+rnOkOpAk0kyWaddOJ/AIsJtbAEQWi?= =?us-ascii?Q?WSJh+XZSIb1f1+3rbN2W9+mHa8pmh/D9XP4PJgLOkOXVEmT34WJ7IUueOW70?= =?us-ascii?Q?zBnrZI7jvaLdQMWJkgglQqC4GyZtMYGBsrofidOkLSEn2RUZMjaWCB5RzMqK?= =?us-ascii?Q?vxFWHAWeb1ZSftVbPLxoSJfHIBuZa+bAm5vWTtTpy2Zd0qS9LUhwsoib6Rnf?= =?us-ascii?Q?sHtoMUH5lWRQc64AByupvEqfJWq/pBE1svE//1WSTjfjjxE2AwVeDNjxA0me?= =?us-ascii?Q?oBch+XFA7tA0A0z00Z02N6GA1O5CJC352bLSqqfJtN+TueYZOCGck9O6aM+D?= =?us-ascii?Q?YQV1JjRJ7BW7m8Lz4menUeIdD1zu0l40u5J7t9mJP//S+EgbXSCAw0PBkaQL?= =?us-ascii?Q?DxSHal7whLwcuHcS2Xrlp5tgxnPZpGJISywD4yRsWhcmSvX9pb6/SJtduYkn?= =?us-ascii?Q?e/soM5IwD4AEH1UCqAyUFZVpasyJ9FXGm3nqBrKauPzOBk02fUKnWiYn6MMG?= =?us-ascii?Q?YPsoiGfqjcT9RK8RHbbOYGaON19pKdJ90GFEMShyU27QSRGrhVZdSXIUiRhP?= =?us-ascii?Q?odJ4bCerYFTacf4=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(376014)(36860700013)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Apr 2025 09:02:33.5037 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 72572f61-0b24-41c4-bece-08dd71c51b33 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000F0E5.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4242 When purging old-style annotations, MPU code was left unmodified. Fix it. Fixes: 221c66f4f2a4 ("Arm: purge ENTRY(), ENDPROC(), and ALIGN") Signed-off-by: Michal Orzel --- I found the issue when applying Luca series to be commited enabling MPU on Arm64 build. This patch is a prerequisite for it. --- xen/arch/arm/arm64/mpu/head.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/arm64/mpu/head.S b/xen/arch/arm/arm64/mpu/head.S index 4d00de4869af..ed01993d8556 100644 --- a/xen/arch/arm/arm64/mpu/head.S +++ b/xen/arch/arm/arm64/mpu/head.S @@ -158,11 +158,11 @@ END(enable_boot_cpu_mm) * We don't yet support secondary CPUs bring-up. Implement a dummy helper to * please the common code. */ -ENTRY(enable_secondary_cpu_mm) +FUNC(enable_secondary_cpu_mm) PRINT("- SMP not enabled yet -\r\n") 1: wfe b 1b -ENDPROC(enable_secondary_cpu_mm) +END(enable_secondary_cpu_mm) /* * Local variables: -- 2.25.1 From xen-devel-bounces@lists.xenproject.org Wed Apr 02 09:04:21 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 09:04:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935291.1336711 (Exim 4.92) (envelope-from ) id 1tzu1B-0002eh-SD; Wed, 02 Apr 2025 09:04:17 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935291.1336711; Wed, 02 Apr 2025 09:04:17 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzu1B-0002ea-OK; Wed, 02 Apr 2025 09:04:17 +0000 Received: by outflank-mailman (input) for mailman id 935291; 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the older interface is > lightweight and sufficient. Also, event_fifo causes runtime anonymous > memory allocations, which are undesirable. Additionally, it exposes an > extra interface to the guest, which is also undesirable unless > necessary. > > Make it possible to disable evtchn fifo. > > Signed-off-by: Stefano Stabellini Acked-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Wed Apr 02 09:10:10 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 09:10:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935303.1336721 (Exim 4.92) (envelope-from ) id 1tzu6n-00043t-Ex; Wed, 02 Apr 2025 09:10:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935303.1336721; Wed, 02 Apr 2025 09:10:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzu6n-00043T-Bj; Wed, 02 Apr 2025 09:10:05 +0000 Received: by outflank-mailman (input) for mailman id 935303; Wed, 02 Apr 2025 09:10:04 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzu6m-0003la-7o for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 09:10:04 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1tzu6l-007QTq-2C; Wed, 02 Apr 2025 09:10:03 +0000 Received: from [2a02:8012:3a1:0:9928:c7aa:a3ed:1d45] by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.96) (envelope-from ) id 1tzu6l-003UYx-1e; Wed, 02 Apr 2025 09:10:03 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:Content-Type:In-Reply-To:From: References:Cc:To:Subject:MIME-Version:Date:Message-ID; bh=IiUYA9wWEk3RqA3ZFseM7mr4K627FllFl5yqmwTYLzQ=; b=KbUZWghIMEx8AEU4hziQkHv1pV r0PyC6RmyH7R6Br9eEwINGgS05yXZjVG9V4PoQDCIEx/b8CNtNuG2TJmSB812i3jVHmXvJyGP4dgI /oATLex4DuX+Fg8xvrjsBwOjnDPw4t38kSN1grsZPJtk6HA7Z2PR5HNVX2i3Z89ZuUY4=; Message-ID: Date: Wed, 2 Apr 2025 10:10:01 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen/arm: mpu: Use new-style annotations Content-Language: en-GB To: Michal Orzel , xen-devel@lists.xenproject.org Cc: Stefano Stabellini , Bertrand Marquis , Volodymyr Babchuk , Jan Beulich References: <20250402090229.161177-1-michal.orzel@amd.com> From: Julien Grall In-Reply-To: <20250402090229.161177-1-michal.orzel@amd.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi Michal, On 02/04/2025 10:02, Michal Orzel wrote: > When purging old-style annotations, MPU code was left unmodified. Fix > it. > > Fixes: 221c66f4f2a4 ("Arm: purge ENTRY(), ENDPROC(), and ALIGN") > Signed-off-by: Michal Orzel Acked-by: Julien Grall Cheers, -- Julien Grall From xen-devel-bounces@lists.xenproject.org Wed Apr 02 09:13:16 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 09:13:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935316.1336730 (Exim 4.92) (envelope-from ) id 1tzu9q-0006Dd-RL; Wed, 02 Apr 2025 09:13:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935316.1336730; Wed, 02 Apr 2025 09:13:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzu9q-0006DW-Or; Wed, 02 Apr 2025 09:13:14 +0000 Received: by outflank-mailman (input) for mailman id 935316; Wed, 02 Apr 2025 09:13:13 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzu9p-0006DM-B5 for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 09:13:13 +0000 Received: from mail-wr1-x429.google.com (mail-wr1-x429.google.com [2a00:1450:4864:20::429]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id b3a117ee-0fa2-11f0-9ea8-5ba50f476ded; Wed, 02 Apr 2025 11:13:12 +0200 (CEST) Received: by mail-wr1-x429.google.com with SMTP id ffacd0b85a97d-3912d2c89ecso5697939f8f.2 for ; Wed, 02 Apr 2025 02:13:12 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 02 Apr 2025 02:13:11 -0700 (PDT) Message-ID: <4ec15a0b-7fb9-4722-8ac4-ace83eee74c8@suse.com> Date: Wed, 2 Apr 2025 11:13:10 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen/arm: mpu: Use new-style annotations To: Michal Orzel Cc: Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , xen-devel@lists.xenproject.org References: <20250402090229.161177-1-michal.orzel@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20250402090229.161177-1-michal.orzel@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 02.04.2025 11:02, Michal Orzel wrote: > When purging old-style annotations, MPU code was left unmodified. Fix > it. > > Fixes: 221c66f4f2a4 ("Arm: purge ENTRY(), ENDPROC(), and ALIGN") > Signed-off-by: Michal Orzel Reviewed-by: Jan Beulich I'm sorry for the oversight. I had meant to do a last-minute grep before committing that patch, but then forgot. A tiny bit to my excuse: The introduction of MPU post-dates the common-ized assembly annotations by quite a bit. It should have used new-style annotations from the very beginning imo. Jan From xen-devel-bounces@lists.xenproject.org Wed Apr 02 09:18:15 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 09:18:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935332.1336741 (Exim 4.92) (envelope-from ) id 1tzuEd-0006ro-Ik; Wed, 02 Apr 2025 09:18:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935332.1336741; Wed, 02 Apr 2025 09:18:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzuEd-0006rh-Ey; Wed, 02 Apr 2025 09:18:11 +0000 Received: by outflank-mailman (input) for mailman id 935332; Wed, 02 Apr 2025 09:18:10 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzuEc-0006rZ-7Y for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 09:18:10 +0000 Received: from mail-wm1-x32b.google.com (mail-wm1-x32b.google.com [2a00:1450:4864:20::32b]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 64624342-0fa3-11f0-9ea8-5ba50f476ded; Wed, 02 Apr 2025 11:18:08 +0200 (CEST) Received: by mail-wm1-x32b.google.com with SMTP id 5b1f17b1804b1-43cfe574976so44836105e9.1 for ; Wed, 02 Apr 2025 02:18:08 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 02 Apr 2025 02:18:08 -0700 (PDT) Message-ID: Date: Wed, 2 Apr 2025 11:18:04 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5] xen: simplify bitmap_to_xenctl_bitmap for little endian To: Stefano Stabellini Cc: Stefano Stabellini , xen-devel@lists.xenproject.org, Andrew Cooper , Julien Grall , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20250401005008.2787764-1-stefano.stabellini@amd.com> <694eac75-e872-4ba0-80ed-95c14cd11f5e@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 02.04.2025 02:14, Stefano Stabellini wrote: > On Tue, 1 Apr 2025, Jan Beulich wrote: >> From: Stefano Stabellini >> >> The little endian implementation of bitmap_to_xenctl_bitmap leads to >> unnecessary xmallocs and xfrees. Given that Xen only supports little >> endian architectures, it is worth optimizing. >> >> This patch removes the need for the xmalloc on little endian >> architectures. >> >> Remove clamp_last_byte as it is only called once and only needs to >> modify one byte. Inline it. >> >> Signed-off-by: Stefano Stabellini >> Signed-off-by: Jan Beulich >> --- >> v5: Fix IS_ENABLED() use. Keep more code common. Move comment. >> Convert LE bitmap_long_to_byte() to just a declaration. > > Thanks Jan, I looked at your version carefully and it looks correct to > me. I could give my reviewed-by but it looks weird given that I am also > the first author. ./MAINTAINERS has a section specifically on this situation, starting with "In the case where two people collaborate on a patch, ..." > Reviewed-by: Stefano Stabellini Thanks. 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Wed, 02 Apr 2025 02:21:53 -0700 (PDT) Message-ID: <87f8fc5f-ed82-4930-bc04-50106cc5acff@citrix.com> Date: Wed, 2 Apr 2025 10:21:52 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5] xen: simplify bitmap_to_xenctl_bitmap for little endian To: Jan Beulich , Stefano Stabellini , xen-devel@lists.xenproject.org Cc: Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20250401005008.2787764-1-stefano.stabellini@amd.com> <694eac75-e872-4ba0-80ed-95c14cd11f5e@suse.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <694eac75-e872-4ba0-80ed-95c14cd11f5e@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 01/04/2025 11:09 am, Jan Beulich wrote: > --- a/xen/common/bitmap.c > +++ b/xen/common/bitmap.c > @@ -359,12 +343,11 @@ static void bitmap_byte_to_long(unsigned > > #elif defined(__LITTLE_ENDIAN) > > -static void bitmap_long_to_byte(uint8_t *bp, const unsigned long *lp, > - unsigned int nbits) > -{ > - memcpy(bp, lp, DIV_ROUND_UP(nbits, BITS_PER_BYTE)); > - clamp_last_byte(bp, nbits); > -} > +#define LITTLE_ENDIAN 1 /* For IS_ENABLED(). */ I guess I can fix this in my bswap series by giving __LITTLE_ENDIAN the value of 1 when it is defined ? Otherwise, Reviewed-by: Andrew Cooper This is very very long overdue. ~Andrew From xen-devel-bounces@lists.xenproject.org Wed Apr 02 09:25:33 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 09:25:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935370.1336792 (Exim 4.92) (envelope-from ) id 1tzuLg-0002IT-RR; Wed, 02 Apr 2025 09:25:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935370.1336792; Wed, 02 Apr 2025 09:25:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzuLg-0002IM-Ot; Wed, 02 Apr 2025 09:25:28 +0000 Received: by outflank-mailman (input) for mailman id 935370; Wed, 02 Apr 2025 09:25:27 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzuLf-0002IG-7J for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 09:25:27 +0000 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [2a00:1450:4864:20::32c]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 686cc44c-0fa4-11f0-9ffb-bf95429c2676; Wed, 02 Apr 2025 11:25:25 +0200 (CEST) Received: by mail-wm1-x32c.google.com with SMTP id 5b1f17b1804b1-43cec5cd73bso42953195e9.3 for ; Wed, 02 Apr 2025 02:25:25 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Smith" References: <20241226165740.29812-1-dpsmith@apertussolutions.com> <20241226165740.29812-7-dpsmith@apertussolutions.com> <004b066a-b26f-44bd-994f-5c573f6511e6@suse.com> <847a0afa-05bd-4f33-b07c-d9d69b9198ae@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <847a0afa-05bd-4f33-b07c-d9d69b9198ae@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 01.04.2025 20:01, Jason Andryuk wrote: > On 2025-01-30 09:52, Jan Beulich wrote: >> On 26.12.2024 17:57, Daniel P. Smith wrote: >>> --- a/xen/arch/x86/Makefile >>> +++ b/xen/arch/x86/Makefile >>> @@ -81,6 +81,8 @@ obj-$(CONFIG_COMPAT) += x86_64/platform_hypercall.o >>> obj-y += sysctl.o >>> endif >>> >>> +obj-y += domain-builder/ >> >> The set of subdirs needed in $(obj-y) is specified at the top of the file. >> Also shouldn't this be obj-$(CONFIG_DOMAIN_BUILDER)? > > Later, all boot-time domain building is handled by > domain-builder/core.c. So some of domain-builder/ is always built, and > Kconfig disables multidomain support. Then CONFIG_DOMAIN_BUILDER is a misnomer? >>> --- /dev/null >>> +++ b/xen/arch/x86/domain-builder/core.c >>> @@ -0,0 +1,57 @@ >>> +/* SPDX-License-Identifier: GPL-2.0-only */ >>> +/* >>> + * Copyright (C) 2024, Apertus Solutions, LLC >>> + */ >>> +#include >>> +#include >>> +#include >>> +#include >>> + >>> +#include >>> + >>> +#include "fdt.h" >>> + >>> +void __init builder_init(struct boot_info *bi) >>> +{ >>> + if ( IS_ENABLED(CONFIG_DOMAIN_BUILDER) ) >>> + { >>> + int ret; >>> + >>> + switch ( ret = has_hyperlaunch_fdt(bi) ) >>> + { >>> + case 0: >>> + printk("Hyperlaunch device tree detected\n"); >>> + bi->hyperlaunch_enabled = true; >>> + bi->mods[0].type = BOOTMOD_FDT; >>> + break; >>> + >>> + case -EINVAL: >>> + printk("Hyperlaunch device tree was not detected\n"); >>> + bi->hyperlaunch_enabled = false; >>> + break; >>> + >>> + case -ENOENT: >>> + case -ENODATA: >>> + printk("Device tree found, but not hyperlaunch (%d)\n", ret); >>> + bi->hyperlaunch_enabled = false; >>> + bi->mods[0].type = BOOTMOD_FDT; >>> + break; >>> + >>> + default: >>> + printk("Unknown error (%d) occured checking for hyperlaunch device tree\n", >>> + ret); >>> + bi->hyperlaunch_enabled = false; >>> + break; >>> + } >>> + } >>> +} >> >> What is it that's x86-specific in here? > > Would you prefer xen/common/domain-builder ? Whatever isn't arch-specific would better live somewhere under xen/common/, yes. >>> --- /dev/null >>> +++ b/xen/arch/x86/include/asm/domainbuilder.h >>> @@ -0,0 +1,8 @@ >>> +#ifndef __XEN_X86_DOMBUILDER_H__ >>> +#define __XEN_X86_DOMBUILDER_H__ >>> + >>> +#include >> >> ... here, is it? Forward decls of struct boot_info are going to do. > > Generally, if you only need a type, just use a forward decl? Use an > include when you need function prototypes? Yes. The latter also when you need struct/union fields or sizes. >>> @@ -1285,9 +1286,12 @@ void asmlinkage __init noreturn __start_xen(void) >>> bi->nr_modules); >>> } >>> >>> - /* Dom0 kernel is always first */ >>> - bi->mods[0].type = BOOTMOD_KERNEL; >>> - bi->domains[0].kernel = &bi->mods[0]; >>> + builder_init(bi); >>> + >>> + /* Find first unknown boot module to use as Dom0 kernel */ >>> + i = first_boot_module_index(bi, BOOTMOD_UNKNOWN); >>> + bi->mods[i].type = BOOTMOD_KERNEL; >>> + bi->domains[0].kernel = &bi->mods[i]; >> >> This is going to change again later? Or else what about there already >> being a module marked BOOTMOD_KERNEL? > > Yes, it will change. There will be two paths, and this is part of the > non-Hyperlaunch path which needs to implicitly select kernel and initrd > from the module order, the same as today. For hyperlaunch, the device > tree explicitly assigns kernel and initrd. Here and elsewhere, for things that aren't quite right yet, mentioning such aspects specially in the description (or in certain cases even in FIXME comments) would help avoid questions like the one I had raised. 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Wed, 02 Apr 2025 02:30:23 -0700 (PDT) Message-ID: <52ae7bed-ba15-4842-b5d8-4fcb61df28b2@suse.com> Date: Wed, 2 Apr 2025 11:30:22 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5] xen: simplify bitmap_to_xenctl_bitmap for little endian To: Andrew Cooper Cc: Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20250401005008.2787764-1-stefano.stabellini@amd.com> <694eac75-e872-4ba0-80ed-95c14cd11f5e@suse.com> <87f8fc5f-ed82-4930-bc04-50106cc5acff@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <87f8fc5f-ed82-4930-bc04-50106cc5acff@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 02.04.2025 11:21, Andrew Cooper wrote: > On 01/04/2025 11:09 am, Jan Beulich wrote: >> --- a/xen/common/bitmap.c >> +++ b/xen/common/bitmap.c >> @@ -359,12 +343,11 @@ static void bitmap_byte_to_long(unsigned >> >> #elif defined(__LITTLE_ENDIAN) >> >> -static void bitmap_long_to_byte(uint8_t *bp, const unsigned long *lp, >> - unsigned int nbits) >> -{ >> - memcpy(bp, lp, DIV_ROUND_UP(nbits, BITS_PER_BYTE)); >> - clamp_last_byte(bp, nbits); >> -} >> +#define LITTLE_ENDIAN 1 /* For IS_ENABLED(). */ > > I guess I can fix this in my bswap series by giving __LITTLE_ENDIAN the > value of 1 when it is defined ? Hmm, that's an option, yes. Yet then I didn't pay close enough attention to that part of the respective patch in that series, as I was blindly assuming it to instead be #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ # define __LITTLE_ENDIAN __ORDER_LITTLE_ENDIAN__ #elif __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ # define __BIG_ENDIAN __ORDER_BIG_ENDIAN__ #endif to keep the values of the symbols unaltered. > Otherwise, Reviewed-by: Andrew Cooper Thanks. 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Xenstored has command >>> line flags to set --master-domid (the local domid) and --priv-domid, but >>> it would be better to autodetect those. Also, domids are necessary to >>> set xenstore permissions - DOMID_SELF is not supported today. >> >> Setting permissions for oneself? > > Any call to xs_set_permissions(), AIUI. Say you have two domUs, dom1 & > dom2. dom1 wants to create a shared xenstore node with full permissions > for itself, but read-only permission for dom2. dom1 needs to know its > own domid to set the permissions: > > * struct xs_permissions perms[2]; > * > * perms[0].id = domid1; > * perms[0].perms = XS_PERM_NONE; > * perms[1].id = domid2; > * perms[1].perms = XS_PERM_READ; > > perms[].id doesn't handle DOMID_SELF That is, XS_SET_PERMS only ever fully replaces existing permissions, rather than allowing incremental permit/revoke? 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Wed, 02 Apr 2025 02:37:00 -0700 (PDT) Message-ID: Date: Wed, 2 Apr 2025 10:36:59 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5] xen: simplify bitmap_to_xenctl_bitmap for little endian To: Jan Beulich Cc: Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20250401005008.2787764-1-stefano.stabellini@amd.com> <694eac75-e872-4ba0-80ed-95c14cd11f5e@suse.com> <87f8fc5f-ed82-4930-bc04-50106cc5acff@citrix.com> <52ae7bed-ba15-4842-b5d8-4fcb61df28b2@suse.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <52ae7bed-ba15-4842-b5d8-4fcb61df28b2@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 02/04/2025 10:30 am, Jan Beulich wrote: > On 02.04.2025 11:21, Andrew Cooper wrote: >> On 01/04/2025 11:09 am, Jan Beulich wrote: >>> --- a/xen/common/bitmap.c >>> +++ b/xen/common/bitmap.c >>> @@ -359,12 +343,11 @@ static void bitmap_byte_to_long(unsigned >>> >>> #elif defined(__LITTLE_ENDIAN) >>> >>> -static void bitmap_long_to_byte(uint8_t *bp, const unsigned long *lp, >>> - unsigned int nbits) >>> -{ >>> - memcpy(bp, lp, DIV_ROUND_UP(nbits, BITS_PER_BYTE)); >>> - clamp_last_byte(bp, nbits); >>> -} >>> +#define LITTLE_ENDIAN 1 /* For IS_ENABLED(). */ >> I guess I can fix this in my bswap series by giving __LITTLE_ENDIAN the >> value of 1 when it is defined ? > Hmm, that's an option, yes. Yet then I didn't pay close enough attention > to that part of the respective patch in that series, as I was blindly > assuming it to instead be > > #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ > # define __LITTLE_ENDIAN __ORDER_LITTLE_ENDIAN__ > #elif __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ > # define __BIG_ENDIAN __ORDER_BIG_ENDIAN__ > #endif > > to keep the values of the symbols unaltered. I saw no value doing that, after auditing that it was only ever used in an #ifdef kind of way.  IS_ENABLED() is an extension of the same concept, but requiring a 1 to work. ~Andrew From xen-devel-bounces@lists.xenproject.org Wed Apr 02 09:40:32 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 09:40:32 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935420.1336833 (Exim 4.92) (envelope-from ) id 1tzuaC-00082a-PW; Wed, 02 Apr 2025 09:40:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935420.1336833; Wed, 02 Apr 2025 09:40:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzuaC-00082T-Lx; Wed, 02 Apr 2025 09:40:28 +0000 Received: by outflank-mailman (input) for mailman id 935420; Wed, 02 Apr 2025 09:40:27 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzuaB-00082N-Hr for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 09:40:27 +0000 Received: from mail-wm1-x334.google.com (mail-wm1-x334.google.com [2a00:1450:4864:20::334]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 81c03788-0fa6-11f0-9ea8-5ba50f476ded; Wed, 02 Apr 2025 11:40:26 +0200 (CEST) Received: by mail-wm1-x334.google.com with SMTP id 5b1f17b1804b1-43d04dc73b7so70667645e9.3 for ; Wed, 02 Apr 2025 02:40:26 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 02 Apr 2025 02:40:25 -0700 (PDT) Message-ID: Date: Wed, 2 Apr 2025 11:40:24 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH RFC] x86/vmx: Use asm goto() in _vmx_cpu_up() To: Andrew Cooper Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , dmkhn@proton.me, Xen-devel References: <20250401233444.1181076-1-andrew.cooper3@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20250401233444.1181076-1-andrew.cooper3@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 02.04.2025 01:34, Andrew Cooper wrote: > With the new toolchain baseline, we can make use of asm goto() in certain > places, and the VMXON invocation is one example. > > This removes the logic to set up rc (including a fixup section where bactraces > have no connection to the invoking function), the logic to decode it, and the > default case which was dead but in a way the compiler couldn't prove > previously. > > No functional change. > > Signed-off-by: Andrew Cooper > --- > CC: Jan Beulich > CC: Roger Pau Monné > CC: dmkhn@proton.me > > RFC. To be rebased over Denis' general cleanup. LGTM. Can't this actually replace some of his cleanup? Judging from base-commit: at the bottom this isn't based on his work. In which case: Reviewed-by: Jan Beulich > In principle, we can split fail into fail_valid and fail_invalid, allowing us > to spot the VMfail("VMXON executed in VMX root operation") case from the > pseduocode. However, getting that involves a VMREAD of VM_INSTRUCTION_ERROR, > and error handling in case there isn't a loaded VMCS, so I think the > complexity is unwarranted in this case. +1 > Bloat-o-meter: > add/remove: 0/0 grow/shrink: 1/1 up/down: 13/-32 (-19) > Function old new delta > _vmx_cpu_up.cold 2460 2473 +13 > _vmx_cpu_up 1803 1771 -32 > > The if ( 0 ) isn't terribly nice, but it's the least bad option I could come > up with. It does allow the structure of the switch() to remain largely > intact. For the purpose of the diff here I agree. In a subsequent change we could then still move the whole blob to the end of the function. Especially if some of the static analysis tools didn't like the "if ( 0 )". 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name="OpenPGP_signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="OpenPGP_signature.asc" -----BEGIN PGP SIGNATURE----- wsB5BAABCAAjFiEEhRJncuj2BJSl0Jf3sN6d1ii/Ey8FAmftBiQFAwAAAAAACgkQsN6d1ii/Ey/L KAgAh3jr2llxqEqsGIPAjcpqWnwlhVAu3vP6v2VGIPRTx+pdbGQFUgI9un0rF5sZFTwXlJyZjUSn EfH4lafEOTCW08WUVJlotlt3kN6l4i8BIRF1PMaqeqpljQTSa8s9j4hwR1LM/Wh3TwXwXTnPxchC 29wgRCwRYyi4VW3b12AFuLy4WYjam2X9P3edcYmKVXP0YhyPlXaF08Wr1n4AJj3DlYiL/9gcASfx HpaAf8T12lT89WCg/ojshjH7Bx6jyYvyOFw8GeFD2Bb54c1R00KQ4C1cWXSacNd96kBgK+QkZaLo dM/eDlkTzS4Sh0iKgoD8Snh3vPvUH8iA7Zdc5T63NQ== =gmo6 -----END PGP SIGNATURE----- --------------EwKeWyZu3XJTh4PXFzZWD8oz-- From xen-devel-bounces@lists.xenproject.org Wed Apr 02 09:42:19 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 09:42:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935445.1336852 (Exim 4.92) (envelope-from ) id 1tzuby-0002II-GE; Wed, 02 Apr 2025 09:42:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935445.1336852; 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Wed, 02 Apr 2025 02:42:16 -0700 (PDT) Message-ID: <5e9f85f2-8ac8-40de-9e17-1a070b3ff180@suse.com> Date: Wed, 2 Apr 2025 11:42:15 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5] xen: simplify bitmap_to_xenctl_bitmap for little endian To: Andrew Cooper Cc: Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20250401005008.2787764-1-stefano.stabellini@amd.com> <694eac75-e872-4ba0-80ed-95c14cd11f5e@suse.com> <87f8fc5f-ed82-4930-bc04-50106cc5acff@citrix.com> <52ae7bed-ba15-4842-b5d8-4fcb61df28b2@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 02.04.2025 11:36, Andrew Cooper wrote: > On 02/04/2025 10:30 am, Jan Beulich wrote: >> On 02.04.2025 11:21, Andrew Cooper wrote: >>> On 01/04/2025 11:09 am, Jan Beulich wrote: >>>> --- a/xen/common/bitmap.c >>>> +++ b/xen/common/bitmap.c >>>> @@ -359,12 +343,11 @@ static void bitmap_byte_to_long(unsigned >>>> >>>> #elif defined(__LITTLE_ENDIAN) >>>> >>>> -static void bitmap_long_to_byte(uint8_t *bp, const unsigned long *lp, >>>> - unsigned int nbits) >>>> -{ >>>> - memcpy(bp, lp, DIV_ROUND_UP(nbits, BITS_PER_BYTE)); >>>> - clamp_last_byte(bp, nbits); >>>> -} >>>> +#define LITTLE_ENDIAN 1 /* For IS_ENABLED(). */ >>> I guess I can fix this in my bswap series by giving __LITTLE_ENDIAN the >>> value of 1 when it is defined ? >> Hmm, that's an option, yes. Yet then I didn't pay close enough attention >> to that part of the respective patch in that series, as I was blindly >> assuming it to instead be >> >> #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ >> # define __LITTLE_ENDIAN __ORDER_LITTLE_ENDIAN__ >> #elif __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ >> # define __BIG_ENDIAN __ORDER_BIG_ENDIAN__ >> #endif >> >> to keep the values of the symbols unaltered. > > I saw no value doing that, after auditing that it was only ever used in > an #ifdef kind of way.  IS_ENABLED() is an extension of the same > concept, but requiring a 1 to work. Fair enough then, and a (tiny) simplification here. I'll see about getting the change here in, so you can re-base over it. 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Wed, 02 Apr 2025 02:47:29 -0700 (PDT) Message-ID: <9de3107f-d6e2-49d8-bf9b-32ce75868514@suse.com> Date: Wed, 2 Apr 2025 11:47:28 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 08/11] x86/boot: place trampoline code in a non-execute section To: Andrew Cooper References: <20250401130840.72119-1-roger.pau@citrix.com> <20250401130840.72119-9-roger.pau@citrix.com> <3fd56964-918a-49f7-a0fe-a1c6b8633af6@citrix.com> Content-Language: en-US Cc: Roger Pau Monne , xen-devel@lists.xenproject.org From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <3fd56964-918a-49f7-a0fe-a1c6b8633af6@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 01.04.2025 15:49, Andrew Cooper wrote: > On 01/04/2025 2:08 pm, Roger Pau Monne wrote: >> The trampoline code is never executed in the position placed by the >> loader. It's first copied to the low 1MB, and always executed from >> there. >> >> Move the trampoline code from being in .init.text section into >> .init.data, so it's not in an executable section. This allows applying >> the relocations safely against a non-executable (and thus non-read only) >> section, and then copy the relocated trampoline to the low 1MB. Note >> that the trampoline code is placed on an .init section, so zapped after >> boot has finished. >> >> No functional change intended. >> >> Signed-off-by: Roger Pau Monné >> --- >> An alternative approach is to apply the relocations after having copied the >> trampoline to the low 1MB, but that still generates relocations in mkreloc, >> which is not helpful for the goal of having no relocations applied to >> read-execute code sections. This approach however places code in a data >> section, which might cause issues when debugging it. > > I, probably most of all, spend a reasonable amount of time disassembling > the trampoline. I really would prefer to keep it in an executable section. > > What are the options with relocations?  Can't we simply drop any in the > trampoline region? That's perhaps an option with mkreloc, but would require zapping them after linking if we have the linker produce relocations. Doable, but likely not to end up being pretty. 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Wed, 02 Apr 2025 02:52:18 -0700 (PDT) Message-ID: <0fe8cbc5-cb34-4446-881c-f7ef20d36ce5@suse.com> Date: Wed, 2 Apr 2025 11:52:17 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 4/5] x86/vmx: remove *_OPCODE To: dmkhn@proton.me Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com, xen-devel@lists.xenproject.org References: <20250401222105.79309-1-dmukhin@ford.com> <20250401222105.79309-5-dmukhin@ford.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20250401222105.79309-5-dmukhin@ford.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 02.04.2025 00:21, dmkhn@proton.me wrote: > @@ -497,9 +479,7 @@ static inline void vpid_sync_all(void) > > static inline void __vmxoff(void) > { > - asm volatile ( > - VMXOFF_OPCODE > - : : : "memory" ); > + asm volatile ("vmxoff" : : : "memory"); Nit (style): Blanks immediately inside parentheses please. Ideally ... > @@ -507,15 +487,17 @@ static inline int __vmxon(u64 addr) > int rc; > > asm volatile ( > - "1: " VMXON_OPCODE MODRM_EAX_06 "\n" > - " setna %b0 ; neg %0\n" /* CF==1 or ZF==1 --> rc = -1 */ > + "1: vmxon (%[addr])\n" > + " setna %b[rc]\n" > + " neg %[rc]\n" /* CF==1 or ZF==1 --> rc = -1 */ > "2:\n" > ".section .fixup,\"ax\"\n" > - "3: sub $2,%0 ; jmp 2b\n" /* #UD or #GP --> rc = -2 */ > + "3: mov $-2, %[rc]\n" > + " jmp 2b\n" /* #UD or #GP --> rc = -2 */ > ".previous\n" > _ASM_EXTABLE(1b, 3b) > - : "=q" (rc) > - : "0" (0), "a" (&addr) > + : [rc] "=q" (rc) > + : "0" (0), [addr] "r" (&addr) > : "memory"); ... you'd also take the opportunity to add the missing one here. Then again Andrew eliminates this altogether anyway. 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Wed, 02 Apr 2025 02:52:56 -0700 (PDT) Message-ID: <093d7c80-b013-4f33-8fb5-29d6133f85c3@citrix.com> Date: Wed, 2 Apr 2025 10:52:55 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH RFC] x86/vmx: Use asm goto() in _vmx_cpu_up() To: Jan Beulich Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , dmkhn@proton.me, Xen-devel References: <20250401233444.1181076-1-andrew.cooper3@citrix.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 02/04/2025 10:40 am, Jan Beulich wrote: > On 02.04.2025 01:34, Andrew Cooper wrote: >> With the new toolchain baseline, we can make use of asm goto() in certain >> places, and the VMXON invocation is one example. >> >> This removes the logic to set up rc (including a fixup section where bactraces >> have no connection to the invoking function), the logic to decode it, and the >> default case which was dead but in a way the compiler couldn't prove >> previously. >> >> No functional change. >> >> Signed-off-by: Andrew Cooper >> --- >> CC: Jan Beulich >> CC: Roger Pau Monné >> CC: dmkhn@proton.me >> >> RFC. To be rebased over Denis' general cleanup. > LGTM. Can't this actually replace some of his cleanup? Judging from > base-commit: at the bottom this isn't based on his work. In which case: > Reviewed-by: Jan Beulich Oh.  I was expecting there to be far more debate on this. In which case I expect it will be easiest for this patch to go in first, and supersede Denis' cleanup to __vmxon(), so as not to rework it twice in quick succession.  (Sorry.) > >> In principle, we can split fail into fail_valid and fail_invalid, allowing us >> to spot the VMfail("VMXON executed in VMX root operation") case from the >> pseduocode. However, getting that involves a VMREAD of VM_INSTRUCTION_ERROR, >> and error handling in case there isn't a loaded VMCS, so I think the >> complexity is unwarranted in this case. > +1 > >> Bloat-o-meter: >> add/remove: 0/0 grow/shrink: 1/1 up/down: 13/-32 (-19) >> Function old new delta >> _vmx_cpu_up.cold 2460 2473 +13 >> _vmx_cpu_up 1803 1771 -32 >> >> The if ( 0 ) isn't terribly nice, but it's the least bad option I could come >> up with. It does allow the structure of the switch() to remain largely >> intact. > For the purpose of the diff here I agree. In a subsequent change we could then > still move the whole blob to the end of the function. Especially if some of > the static analysis tools didn't like the "if ( 0 )". Actually, doing that is still a nice diff to read.  I think I'll take this approach.  I'll send out a v2 in just a moment. ~Andrew From xen-devel-bounces@lists.xenproject.org Wed Apr 02 09:56:29 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 09:56:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935504.1336893 (Exim 4.92) (envelope-from ) id 1tzupf-0007Ee-Eu; Wed, 02 Apr 2025 09:56:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935504.1336893; Wed, 02 Apr 2025 09:56:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzupf-0007EX-BF; Wed, 02 Apr 2025 09:56:27 +0000 Received: by outflank-mailman (input) for mailman id 935504; Wed, 02 Apr 2025 09:56:25 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzupd-0007ER-S9 for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 09:56:25 +0000 Received: from mail-wm1-x332.google.com (mail-wm1-x332.google.com [2a00:1450:4864:20::332]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id bc762b73-0fa8-11f0-9ffb-bf95429c2676; Wed, 02 Apr 2025 11:56:24 +0200 (CEST) Received: by mail-wm1-x332.google.com with SMTP id 5b1f17b1804b1-4394a823036so60762905e9.0 for ; Wed, 02 Apr 2025 02:56:24 -0700 (PDT) Received: from localhost.localdomain (host-92-26-98-202.as13285.net. [92.26.98.202]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43eb5fc1ab6sm15500745e9.1.2025.04.02.02.56.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Apr 2025 02:56:22 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: bc762b73-0fa8-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1743587783; x=1744192583; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=P2WgklV4aS+vL81IQKhOiZwM+XpHySTiTqu70gWfUIk=; b=eJHWsUuiaELBw/2f41nff6t//yOxacguNIKfgmAunG77Y5da5JxKefCa3dn5oKcBGO VlydRk9La1ZqzSzkUG04T1fT6+IZCZLHI3nQIkI24uqqOW/Qf4psMP+JFQnADoW0hST1 MKkSKNEWmssAFTtIxNY63fIe1mYlXt+Pp6VVA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743587783; x=1744192583; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=P2WgklV4aS+vL81IQKhOiZwM+XpHySTiTqu70gWfUIk=; b=GW7I5CvL8CERMEoWS9v/EuF+eojcd8vPVFza8DjalnZkSsL4GjK/ZcBRdg1KBo9cWL gX5la3Kwh6GOKUm3nSGpQTjS7VgVZUP/gyaUyJT9ZlbHD04yCp8tpcTkEb3NVY5S1e0r X4q16oue8IJL5dieWZaWpLBqv6KyV3bNiJBcoK+2Bw9H9Tbxebctpa8P8D7rhpayex9l 3YGbiBH8e+xA3N/P7Ss7EER3HGEWqYgef1/jIMv7jNSJp1jN4JI4P2aKF97ik6WE8SgS cSQw+QnCZOhDZ5qGug299gpzf8hEKSec1orvcUkbYXtf4a0kOQCxnrkVb3v3kl75Zz0i 4P2Q== X-Gm-Message-State: AOJu0YxA+qojDhTIgWRV3V9piMK4cEatidrEcvl4QEnCYepzzIac9CzT smY0GUUUnS44q8kjwXXgrPikf5EQe6odah3l3Sm4mqYuDYuQ+QPo3qvaksPjEpva1lHowv2ej5D hejo= X-Gm-Gg: ASbGncsayM3Aqar1i48ye/YXEoghWJ238QAwMUynFRZXxh1Y/42M1bHeciqZr3to6DM DSG3B2wIqPcIWbkoFWRCjSTobG3B5gLvOvWqq+qx7u8qYj397YMO1a7QD0xkYEtMu5T0sPtTqbi uXpV6VEV4QhucyG5zVCyApgH3TFhsc9uyCfSAAYH7q8PWX30/iAaBCXSX//ufM1vSHTa/4H6Qad NqsLBxq8FPV/GwzGKvo1EgLPn4poxeHL3W9uu4bXzdcpTM1KP0OYsWUm3OMQeETp7xnhv4EgjPU WOTZ1yOLTQUbaWbZ4/b8qEXznXDAci7HBtgwX7o9fUcBz+YXIb056UUgQwztJhoY0vn1w7/Jo2J Me69+dD4VJNOpLNXpjA== X-Google-Smtp-Source: AGHT+IGSvV3p1yGdksYG8oWda9MkUImUK0jSBNaWq/jhqUjSd36YhX7uVI4mFRebNCGs0cnPXnNuxw== X-Received: by 2002:a05:600c:470f:b0:43c:e305:6d50 with SMTP id 5b1f17b1804b1-43eb5c95bf9mr13879465e9.24.1743587783146; Wed, 02 Apr 2025 02:56:23 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , dmkhn@proton.me Subject: [PATCH v2] x86/vmx: Use asm goto() in _vmx_cpu_up() Date: Wed, 2 Apr 2025 10:56:21 +0100 Message-Id: <20250402095621.1278093-1-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250401233444.1181076-1-andrew.cooper3@citrix.com> References: <20250401233444.1181076-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit With the new toolchain baseline, we can make use of asm goto() in certain places, and the VMXON invocation is one example. This removes the logic to set up rc (including a fixup section where bactraces have no connection to the invoking function), the logic to decode it, and the default case which was dead but in a way the compiler couldn't prove previously. No functional change. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné CC: dmkhn@proton.me v2: * Move error block to the end of the function. Bloat-o-meter: add/remove: 0/0 grow/shrink: 1/1 up/down: 13/-32 (-19) Function old new delta _vmx_cpu_up.cold 2460 2473 +13 _vmx_cpu_up 1803 1771 -32 --- xen/arch/x86/hvm/vmx/vmcs.c | 50 +++++++++++++------------- xen/arch/x86/include/asm/hvm/vmx/vmx.h | 19 ---------- 2 files changed, 26 insertions(+), 43 deletions(-) diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c index 0ba65becec1e..8e99e6f73062 100644 --- a/xen/arch/x86/hvm/vmx/vmcs.c +++ b/xen/arch/x86/hvm/vmx/vmcs.c @@ -749,30 +749,15 @@ static int _vmx_cpu_up(bool bsp) if ( bsp && (rc = vmx_cpu_up_prepare(cpu)) != 0 ) return rc; - switch ( __vmxon(this_cpu(vmxon_region)) ) - { - case -2: /* #UD or #GP */ - if ( bios_locked && - test_bit(X86_FEATURE_SMX, &boot_cpu_data.x86_capability) && - (!(eax & IA32_FEATURE_CONTROL_ENABLE_VMXON_OUTSIDE_SMX) || - !(eax & IA32_FEATURE_CONTROL_ENABLE_VMXON_INSIDE_SMX)) ) - { - printk("CPU%d: VMXON failed: perhaps because of TXT settings " - "in your BIOS configuration?\n", cpu); - printk(" --> Disable TXT in your BIOS unless using a secure " - "bootloader.\n"); - return -EINVAL; - } - /* fall through */ - case -1: /* CF==1 or ZF==1 */ - printk("CPU%d: unexpected VMXON failure\n", cpu); - return -EINVAL; - case 0: /* success */ - this_cpu(vmxon) = 1; - break; - default: - BUG(); - } + asm goto ( "1: vmxon %[addr]\n\t" + "jbe %l[vmxon_fail]\n\t" + _ASM_EXTABLE(1b, %l[vmxon_fault]) + : + : [addr] "m" (this_cpu(vmxon_region)) + : + : vmxon_fail, vmxon_fault ); + + this_cpu(vmxon) = 1; hvm_asid_init(cpu_has_vmx_vpid ? (1u << VMCS_VPID_WIDTH) : 0); @@ -785,6 +770,23 @@ static int _vmx_cpu_up(bool bsp) vmx_pi_per_cpu_init(cpu); return 0; + + vmxon_fault: + if ( bios_locked && + test_bit(X86_FEATURE_SMX, &boot_cpu_data.x86_capability) && + (!(eax & IA32_FEATURE_CONTROL_ENABLE_VMXON_OUTSIDE_SMX) || + !(eax & IA32_FEATURE_CONTROL_ENABLE_VMXON_INSIDE_SMX)) ) + { + printk("CPU%d: VMXON failed: perhaps because of TXT settings " + "in your BIOS configuration?\n", cpu); + printk(" --> Disable TXT in your BIOS unless using a secure " + "bootloader.\n"); + return -EINVAL; + } + + vmxon_fail: + printk("CPU%d: unexpected VMXON failure\n", cpu); + return -EINVAL; } int cf_check vmx_cpu_up(void) diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmx.h b/xen/arch/x86/include/asm/hvm/vmx/vmx.h index 843f8591b9cf..7c6ba7340744 100644 --- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h +++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h @@ -559,25 +559,6 @@ static inline void __vmxoff(void) : : : "memory" ); } -static inline int __vmxon(u64 addr) -{ - int rc; - - asm volatile ( - "1: " VMXON_OPCODE MODRM_EAX_06 "\n" - " setna %b0 ; neg %0\n" /* CF==1 or ZF==1 --> rc = -1 */ - "2:\n" - ".section .fixup,\"ax\"\n" - "3: sub $2,%0 ; jmp 2b\n" /* #UD or #GP --> rc = -2 */ - ".previous\n" - _ASM_EXTABLE(1b, 3b) - : "=q" (rc) - : "0" (0), "a" (&addr) - : "memory"); - - return rc; -} - int cf_check vmx_guest_x86_mode(struct vcpu *v); unsigned int vmx_get_cpl(void); -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Wed Apr 02 09:58:16 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 09:58:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935515.1336903 (Exim 4.92) (envelope-from ) id 1tzur9-0007nX-O7; Wed, 02 Apr 2025 09:57:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935515.1336903; Wed, 02 Apr 2025 09:57:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzur9-0007nQ-LR; Wed, 02 Apr 2025 09:57:59 +0000 Received: by outflank-mailman (input) for mailman id 935515; Wed, 02 Apr 2025 09:57:59 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzur9-0007kq-AC for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 09:57:59 +0000 Received: from mail-wm1-x332.google.com (mail-wm1-x332.google.com [2a00:1450:4864:20::332]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id f4ec942f-0fa8-11f0-9ea8-5ba50f476ded; Wed, 02 Apr 2025 11:57:58 +0200 (CEST) Received: by mail-wm1-x332.google.com with SMTP id 5b1f17b1804b1-43cfa7e7f54so3953605e9.1 for ; Wed, 02 Apr 2025 02:57:58 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 02 Apr 2025 02:57:58 -0700 (PDT) Message-ID: Date: Wed, 2 Apr 2025 11:57:57 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH RFC] x86/vmx: Use asm goto() in _vmx_cpu_up() To: Andrew Cooper Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , dmkhn@proton.me, Xen-devel References: <20250401233444.1181076-1-andrew.cooper3@citrix.com> <093d7c80-b013-4f33-8fb5-29d6133f85c3@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <093d7c80-b013-4f33-8fb5-29d6133f85c3@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 02.04.2025 11:52, Andrew Cooper wrote: > On 02/04/2025 10:40 am, Jan Beulich wrote: >> On 02.04.2025 01:34, Andrew Cooper wrote: >>> With the new toolchain baseline, we can make use of asm goto() in certain >>> places, and the VMXON invocation is one example. >>> >>> This removes the logic to set up rc (including a fixup section where bactraces >>> have no connection to the invoking function), the logic to decode it, and the >>> default case which was dead but in a way the compiler couldn't prove >>> previously. >>> >>> No functional change. >>> >>> Signed-off-by: Andrew Cooper >>> --- >>> CC: Jan Beulich >>> CC: Roger Pau Monné >>> CC: dmkhn@proton.me >>> >>> RFC. To be rebased over Denis' general cleanup. >> LGTM. Can't this actually replace some of his cleanup? Judging from >> base-commit: at the bottom this isn't based on his work. In which case: >> Reviewed-by: Jan Beulich > > Oh.  I was expecting there to be far more debate on this. You had indicated many times that you want to make use of asm goto(), and for situation like the one here I'm actually in trouble seeing any objections you might have been expecting. Were you maybe expecting me to object just for the purpose of objecting ;-) ? Jan From xen-devel-bounces@lists.xenproject.org Wed Apr 02 10:03:50 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 10:03:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935530.1336912 (Exim 4.92) (envelope-from ) id 1tzuwk-0002et-A8; Wed, 02 Apr 2025 10:03:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935530.1336912; Wed, 02 Apr 2025 10:03:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzuwk-0002em-7a; Wed, 02 Apr 2025 10:03:46 +0000 Received: by outflank-mailman (input) for mailman id 935530; Wed, 02 Apr 2025 10:03:45 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzuwj-0002eg-NL for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 10:03:45 +0000 Received: from mail-wr1-x42c.google.com (mail-wr1-x42c.google.com [2a00:1450:4864:20::42c]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id c2f2cff4-0fa9-11f0-9ea8-5ba50f476ded; Wed, 02 Apr 2025 12:03:44 +0200 (CEST) Received: by mail-wr1-x42c.google.com with SMTP id ffacd0b85a97d-39ac9aea656so5329592f8f.3 for ; Wed, 02 Apr 2025 03:03:44 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 02 Apr 2025 03:03:43 -0700 (PDT) Message-ID: <1d73f823-aab3-4648-a5b9-4d0eedc33fc2@suse.com> Date: Wed, 2 Apr 2025 12:03:42 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] x86/vmx: Use asm goto() in _vmx_cpu_up() To: Andrew Cooper Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , dmkhn@proton.me, Xen-devel References: <20250401233444.1181076-1-andrew.cooper3@citrix.com> <20250402095621.1278093-1-andrew.cooper3@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20250402095621.1278093-1-andrew.cooper3@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 02.04.2025 11:56, Andrew Cooper wrote: > --- a/xen/arch/x86/hvm/vmx/vmcs.c > +++ b/xen/arch/x86/hvm/vmx/vmcs.c > @@ -749,30 +749,15 @@ static int _vmx_cpu_up(bool bsp) > if ( bsp && (rc = vmx_cpu_up_prepare(cpu)) != 0 ) > return rc; > > - switch ( __vmxon(this_cpu(vmxon_region)) ) > - { > - case -2: /* #UD or #GP */ > - if ( bios_locked && > - test_bit(X86_FEATURE_SMX, &boot_cpu_data.x86_capability) && > - (!(eax & IA32_FEATURE_CONTROL_ENABLE_VMXON_OUTSIDE_SMX) || > - !(eax & IA32_FEATURE_CONTROL_ENABLE_VMXON_INSIDE_SMX)) ) > - { > - printk("CPU%d: VMXON failed: perhaps because of TXT settings " > - "in your BIOS configuration?\n", cpu); > - printk(" --> Disable TXT in your BIOS unless using a secure " > - "bootloader.\n"); > - return -EINVAL; > - } > - /* fall through */ > - case -1: /* CF==1 or ZF==1 */ > - printk("CPU%d: unexpected VMXON failure\n", cpu); > - return -EINVAL; > - case 0: /* success */ > - this_cpu(vmxon) = 1; > - break; > - default: > - BUG(); > - } > + asm goto ( "1: vmxon %[addr]\n\t" > + "jbe %l[vmxon_fail]\n\t" > + _ASM_EXTABLE(1b, %l[vmxon_fault]) > + : > + : [addr] "m" (this_cpu(vmxon_region)) > + : > + : vmxon_fail, vmxon_fault ); I must have overlooked this in the RFC - you're losing ... > --- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h > +++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h > @@ -559,25 +559,6 @@ static inline void __vmxoff(void) > : : : "memory" ); > } > > -static inline int __vmxon(u64 addr) > -{ > - int rc; > - > - asm volatile ( > - "1: " VMXON_OPCODE MODRM_EAX_06 "\n" > - " setna %b0 ; neg %0\n" /* CF==1 or ZF==1 --> rc = -1 */ > - "2:\n" > - ".section .fixup,\"ax\"\n" > - "3: sub $2,%0 ; jmp 2b\n" /* #UD or #GP --> rc = -2 */ > - ".previous\n" > - _ASM_EXTABLE(1b, 3b) > - : "=q" (rc) > - : "0" (0), "a" (&addr) > - : "memory"); ... the memory barrier here. I will admit I'm not sure I see why it's there, but if the removal was deliberate, then a sentence wants saying about this in the description. With that or with it re-added: Reviewed-by: Jan Beulich Now that you move the printk()s, I also wouldn't mind if you pruned them some: Un-wrap the format strings and perhaps purge the full stop. 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Wed, 02 Apr 2025 03:05:10 -0700 (PDT) Message-ID: <32e8c022-1564-478b-833f-75f56f4afd45@citrix.com> Date: Wed, 2 Apr 2025 11:05:09 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] x86/vmx: Use asm goto() in _vmx_cpu_up() To: Xen-devel Cc: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , dmkhn@proton.me References: <20250401233444.1181076-1-andrew.cooper3@citrix.com> <20250402095621.1278093-1-andrew.cooper3@citrix.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <20250402095621.1278093-1-andrew.cooper3@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 02/04/2025 10:56 am, Andrew Cooper wrote: > diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c > index 0ba65becec1e..8e99e6f73062 100644 > --- a/xen/arch/x86/hvm/vmx/vmcs.c > +++ b/xen/arch/x86/hvm/vmx/vmcs.c > @@ -785,6 +770,23 @@ static int _vmx_cpu_up(bool bsp) > vmx_pi_per_cpu_init(cpu); > > return 0; > + > + vmxon_fault: > + if ( bios_locked && > + test_bit(X86_FEATURE_SMX, &boot_cpu_data.x86_capability) && > + (!(eax & IA32_FEATURE_CONTROL_ENABLE_VMXON_OUTSIDE_SMX) || > + !(eax & IA32_FEATURE_CONTROL_ENABLE_VMXON_INSIDE_SMX)) ) > + { > + printk("CPU%d: VMXON failed: perhaps because of TXT settings " > + "in your BIOS configuration?\n", cpu); > + printk(" --> Disable TXT in your BIOS unless using a secure " > + "bootloader.\n"); Oh, I should remove the line splits, and put in some XENLOG_*. ~Andrew From xen-devel-bounces@lists.xenproject.org Wed Apr 02 10:10:33 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 10:10:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935556.1336933 (Exim 4.92) (envelope-from ) id 1tzv3E-0004kO-CU; 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This is not the case for ioremap(). Fixes: 2cd02c27d327 ("arm/mpu: Implement stubs for ioremap_attr on MPU") Signed-off-by: Michal Orzel --- https://gitlab.com/xen-project/hardware/xen/-/jobs/9599092510 as part of the most recent pipeline on staging: https://gitlab.com/xen-project/hardware/xen/-/pipelines/1748174980 --- xen/arch/arm/mm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c index 5a52f0c623e5..0613c1916936 100644 --- a/xen/arch/arm/mm.c +++ b/xen/arch/arm/mm.c @@ -12,6 +12,7 @@ #include #include #include +#include #include -- 2.25.1 From xen-devel-bounces@lists.xenproject.org Wed Apr 02 10:19:05 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 10:19:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935568.1336942 (Exim 4.92) (envelope-from ) id 1tzvBW-0007B1-4A; Wed, 02 Apr 2025 10:19:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935568.1336942; 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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Apr 2025 10:18:53.1084 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9c19ef7a-3058-4525-574e-08dd71cfc4de X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DB1PEPF000509EE.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR08MB10247 Hi Michal, > On 2 Apr 2025, at 12:10, Michal Orzel wrote: >=20 > As reported by ECLAIR scan, MISRA requires declaration to be visible > (R8.4). This is not the case for ioremap(). >=20 > Fixes: 2cd02c27d327 ("arm/mpu: Implement stubs for ioremap_attr on MPU") > Signed-off-by: Michal Orzel Reviewed-by: Bertrand Marquis Cheers Bertrand > --- > https://gitlab.com/xen-project/hardware/xen/-/jobs/9599092510 > as part of the most recent pipeline on staging: > https://gitlab.com/xen-project/hardware/xen/-/pipelines/1748174980 > --- > xen/arch/arm/mm.c | 1 + > 1 file changed, 1 insertion(+) >=20 > diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c > index 5a52f0c623e5..0613c1916936 100644 > --- a/xen/arch/arm/mm.c > +++ b/xen/arch/arm/mm.c > @@ -12,6 +12,7 @@ > #include > #include > #include > +#include >=20 > #include >=20 > --=20 > 2.25.1 >=20 From xen-devel-bounces@lists.xenproject.org Wed Apr 02 10:19:35 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 10:19:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935578.1336954 (Exim 4.92) (envelope-from ) id 1tzvC3-0007dK-F8; Wed, 02 Apr 2025 10:19:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935578.1336954; Wed, 02 Apr 2025 10:19:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzvC3-0007dD-AU; Wed, 02 Apr 2025 10:19:35 +0000 Received: by outflank-mailman (input) for mailman id 935578; Wed, 02 Apr 2025 10:19:34 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzvC2-0007Ao-RH for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 10:19:34 +0000 Received: from mail-wm1-x334.google.com (mail-wm1-x334.google.com [2a00:1450:4864:20::334]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id f891cef5-0fab-11f0-9ffb-bf95429c2676; Wed, 02 Apr 2025 12:19:33 +0200 (CEST) Received: by mail-wm1-x334.google.com with SMTP id 5b1f17b1804b1-43ce71582e9so47666665e9.1 for ; Wed, 02 Apr 2025 03:19:33 -0700 (PDT) Received: from [192.168.1.183] (host-92-26-98-202.as13285.net. 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Wed, 02 Apr 2025 03:19:32 -0700 (PDT) Message-ID: <89f85f1a-3e09-42cb-babb-b8faff687a73@citrix.com> Date: Wed, 2 Apr 2025 11:19:31 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen/arm: Include xen/vmap.h in mm.c To: Michal Orzel , xen-devel@lists.xenproject.org Cc: Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk References: <20250402101013.220310-1-michal.orzel@amd.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <20250402101013.220310-1-michal.orzel@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 02/04/2025 11:10 am, Michal Orzel wrote: > As reported by ECLAIR scan, MISRA requires declaration to be visible > (R8.4). This is not the case for ioremap(). > > Fixes: 2cd02c27d327 ("arm/mpu: Implement stubs for ioremap_attr on MPU") > Signed-off-by: Michal Orzel Acked-by: Andrew Cooper From xen-devel-bounces@lists.xenproject.org Wed Apr 02 10:24:01 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 10:24:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935596.1336967 (Exim 4.92) (envelope-from ) id 1tzvGJ-0002bt-2m; Wed, 02 Apr 2025 10:23:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935596.1336967; Wed, 02 Apr 2025 10:23:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzvGI-0002bm-W1; Wed, 02 Apr 2025 10:23:58 +0000 Received: by outflank-mailman (input) for mailman id 935596; Wed, 02 Apr 2025 10:23:58 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzvGI-0002bg-4X for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 10:23:58 +0000 Received: from mail-wm1-x334.google.com (mail-wm1-x334.google.com [2a00:1450:4864:20::334]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 95a91886-0fac-11f0-9ea8-5ba50f476ded; Wed, 02 Apr 2025 12:23:56 +0200 (CEST) Received: by mail-wm1-x334.google.com with SMTP id 5b1f17b1804b1-43cf680d351so3732945e9.0 for ; Wed, 02 Apr 2025 03:23:56 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Smith" , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , Andrew Cooper , xen-devel@lists.xenproject.org References: <20250401130840.72119-1-roger.pau@citrix.com> <20250401130840.72119-10-roger.pau@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20250401130840.72119-10-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 01.04.2025 15:08, Roger Pau Monne wrote: > Instead of using the absolute __start_xen address, calculate it as an > offset from the current instruction pointer. The relocation would be > problematic if the loader has acknowledged the Xen image section > attributes, and mapped .init.text with just read and execute permissions. Fine in principle, but ... > --- a/xen/arch/x86/efi/efi-boot.h > +++ b/xen/arch/x86/efi/efi-boot.h > @@ -266,7 +266,9 @@ static void __init noreturn efi_arch_post_exit_boot(void) > > /* Jump to higher mappings. */ > "mov stack_start(%%rip), %%rsp\n\t" > - "movabs $__start_xen, %[rip]\n\t" > + "lea __start_xen(%%rip), %[rip]\n\t" > + "add %[offset], %[rip]\n\t" > + > "push %[cs]\n\t" > "push %[rip]\n\t" > "lretq" > @@ -274,7 +276,8 @@ static void __init noreturn efi_arch_post_exit_boot(void) > [cr4] "+&r" (cr4) > : [cr3] "r" (idle_pg_table), > [cs] "i" (__HYPERVISOR_CS), > - [ds] "r" (__HYPERVISOR_DS) > + [ds] "r" (__HYPERVISOR_DS), > + [offset] "r" (__XEN_VIRT_START - xen_phys_start) > : "memory" ); > unreachable(); > } ... imo ought to come with a brief comment, to keep people from trying to undo ("simplify") that again. [offset]'s constraint could in principle be "rme", I think, as [rip] is "&r" already. Just that the compiler (at least gcc) won't synthesize a memory operand, and the value can't be expressed by an immediate. IOW - probably all fine with just "r". Of course if/when we add further operands here, we need to pay attention to the number of registers needed. Jan From xen-devel-bounces@lists.xenproject.org Wed Apr 02 10:28:30 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 10:28:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935608.1336977 (Exim 4.92) (envelope-from ) id 1tzvKc-0003C6-I7; Wed, 02 Apr 2025 10:28:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935608.1336977; Wed, 02 Apr 2025 10:28:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzvKc-0003Bz-FU; Wed, 02 Apr 2025 10:28:26 +0000 Received: by outflank-mailman (input) for mailman id 935608; Wed, 02 Apr 2025 10:28:24 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzvKa-0003Bt-QJ for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 10:28:24 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1tzvKZ-007SMz-36; Wed, 02 Apr 2025 10:28:23 +0000 Received: from [2a02:8012:3a1:0:9928:c7aa:a3ed:1d45] by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.96) (envelope-from ) id 1tzvKZ-003gIi-2H; Wed, 02 Apr 2025 10:28:23 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:Content-Type:In-Reply-To:From: References:Cc:To:Subject:MIME-Version:Date:Message-ID; bh=PKowBXBcB7HtZS8R1FiKtj/7DXSJMRMUvRrU/YRv5SY=; b=U1IM/xGY2hoCliET9G9uGEgQyY vy5vYN0d1z47aBTO9p8s4vT5F3jfv4Zm0Y+BbP+M6jOZQCccahCDe4NZ/W71D3rL/AkwFQ7SGaOxQ Gxgp+tWQ3wT7JGbwsFKZ44WzDVghYGDTfheiPnNyFaMN9LOT8P307hYjwiXp5hExyx10=; Message-ID: <72c9c91a-d536-42e1-9b7b-37375c2fb3e1@xen.org> Date: Wed, 2 Apr 2025 11:28:21 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 05/11] xen: remove -N from the linker command line Content-Language: en-GB To: Roger Pau Monne , xen-devel@lists.xenproject.org Cc: Stefano Stabellini , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Shawn Anastasio , Alistair Francis , Bob Eshleman , Connor Davis , Oleksii Kurochko , Jan Beulich , Andrew Cooper References: <20250401130840.72119-1-roger.pau@citrix.com> <20250401130840.72119-6-roger.pau@citrix.com> From: Julien Grall In-Reply-To: <20250401130840.72119-6-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Hi Roger, On 01/04/2025 14:08, Roger Pau Monne wrote: > It's unclear why -N is being used in the first place. It was added by > commit 4676bbf96dc8 back in 2002 without any justification. > > When building a PE image it's actually detrimental to forcefully set the > .text section as writable. The GNU LD man page contains the following > warning regarding the -N option: > >> Note: Although a writable text section is allowed for PE-COFF targets, it >> does not conform to the format specification published by Microsoft. > > Remove the usage of -N uniformly on all architectures, assuming that the > addition was simply done as a copy and paste of the original x86 linking > rune. > > Signed-off-by: Roger Pau Monné > Reviewed-by: Andrew Cooper > Reviewed-by: Oleksii Kurochko Acked-by: Julien Grall Cheers, -- Julien Grall From xen-devel-bounces@lists.xenproject.org Wed Apr 02 10:28:30 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 10:28:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935609.1336987 (Exim 4.92) (envelope-from ) id 1tzvKe-0003QA-PI; Wed, 02 Apr 2025 10:28:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935609.1336987; Wed, 02 Apr 2025 10:28:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzvKe-0003Q1-MU; Wed, 02 Apr 2025 10:28:28 +0000 Received: by outflank-mailman (input) for mailman id 935609; Wed, 02 Apr 2025 10:28:27 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzvKd-0003L4-BR for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 10:28:27 +0000 Received: from mail-wm1-x334.google.com (mail-wm1-x334.google.com [2a00:1450:4864:20::334]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 365aef39-0fad-11f0-9ea8-5ba50f476ded; Wed, 02 Apr 2025 12:28:26 +0200 (CEST) Received: by mail-wm1-x334.google.com with SMTP id 5b1f17b1804b1-43cf05f0c3eso43103965e9.0 for ; Wed, 02 Apr 2025 03:28:26 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 02 Apr 2025 03:28:26 -0700 (PDT) Message-ID: <47b6e49c-6692-46c8-88a8-5e2c2a08f805@suse.com> Date: Wed, 2 Apr 2025 12:28:24 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 10/11] x86/efi: do not merge all .init sections To: Roger Pau Monne Cc: Andrew Cooper , xen-devel@lists.xenproject.org References: <20250401130840.72119-1-roger.pau@citrix.com> <20250401130840.72119-11-roger.pau@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20250401130840.72119-11-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 01.04.2025 15:08, Roger Pau Monne wrote: > @@ -218,12 +214,15 @@ SECTIONS > */ > *(.altinstr_replacement) > > -#ifdef EFI /* EFI wants to merge all of .init.* ELF doesn't. */ > - . = ALIGN(SMP_CACHE_BYTES); > -#else > } PHDR(text) > - DECL_SECTION(.init.data) { > +#ifdef EFI > + /* > + * Align to prevent the data section from re-using the tail of an RX mapping > + * from the previous text section. > + */ > + . = ALIGN(SECTION_ALIGN); Does this need to be SECTION_ALIGN, growing image size by perhaps more than 1Mb (at least that's what I expect as an effect)? Wouldn't PAGE_SIZE suffice for our purposes? Jan > #endif > + DECL_SECTION(.init.data) { > *(.init.bss.stack_aligned) > > . = ALIGN(POINTER_ALIGN); From xen-devel-bounces@lists.xenproject.org Wed Apr 02 10:56:58 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 10:56:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935634.1337000 (Exim 4.92) (envelope-from ) id 1tzvlz-0003pD-SL; Wed, 02 Apr 2025 10:56:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935634.1337000; Wed, 02 Apr 2025 10:56:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzvlz-0003p6-Pn; Wed, 02 Apr 2025 10:56:43 +0000 Received: by outflank-mailman (input) for mailman id 935634; Wed, 02 Apr 2025 10:56:43 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzvlz-0003oy-3J for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 10:56:43 +0000 Received: from mail-wm1-x32d.google.com (mail-wm1-x32d.google.com [2a00:1450:4864:20::32d]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 273714d0-0fb1-11f0-9ffb-bf95429c2676; Wed, 02 Apr 2025 12:56:39 +0200 (CEST) Received: by mail-wm1-x32d.google.com with SMTP id 5b1f17b1804b1-4394a823036so61313205e9.0 for ; Wed, 02 Apr 2025 03:56:39 -0700 (PDT) Received: from [192.168.1.183] (host-92-26-98-202.as13285.net. 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Wed, 02 Apr 2025 03:56:38 -0700 (PDT) Message-ID: Date: Wed, 2 Apr 2025 11:56:37 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] x86/vmx: Use asm goto() in _vmx_cpu_up() To: Jan Beulich Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , dmkhn@proton.me, Xen-devel References: <20250401233444.1181076-1-andrew.cooper3@citrix.com> <20250402095621.1278093-1-andrew.cooper3@citrix.com> <1d73f823-aab3-4648-a5b9-4d0eedc33fc2@suse.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <1d73f823-aab3-4648-a5b9-4d0eedc33fc2@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 02/04/2025 11:03 am, Jan Beulich wrote: > On 02.04.2025 11:56, Andrew Cooper wrote: >> --- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h >> +++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h >> @@ -559,25 +559,6 @@ static inline void __vmxoff(void) >> : : : "memory" ); >> } >> >> -static inline int __vmxon(u64 addr) >> -{ >> - int rc; >> - >> - asm volatile ( >> - "1: " VMXON_OPCODE MODRM_EAX_06 "\n" >> - " setna %b0 ; neg %0\n" /* CF==1 or ZF==1 --> rc = -1 */ >> - "2:\n" >> - ".section .fixup,\"ax\"\n" >> - "3: sub $2,%0 ; jmp 2b\n" /* #UD or #GP --> rc = -2 */ >> - ".previous\n" >> - _ASM_EXTABLE(1b, 3b) >> - : "=q" (rc) >> - : "0" (0), "a" (&addr) >> - : "memory"); > ... the memory barrier here. I will admit I'm not sure I see why it's > there, but if the removal was deliberate, then a sentence wants saying > about this in the description. Hmm.  (Honestly, I wrote the asm goto from scratch, rather than copying it). The VMXON instruction itself will modify the 4k vmxon_region.  It's an opaque region, and it might (implementation specific) become non-coherent with main memory. However, we don't have a 4k object we could pass as a faux memory operand, nor can we use asm goto with outputs (That requires a newer toolchain, and some compiler errata workarounds, but we can do it conditionally I think). Lets put the memory clobber back in. > With that or with it re-added: > Reviewed-by: Jan Beulich Thanks. ~Andrew From xen-devel-bounces@lists.xenproject.org Wed Apr 02 11:37:24 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 11:37:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935649.1337010 (Exim 4.92) (envelope-from ) id 1tzwPF-0005XY-PS; Wed, 02 Apr 2025 11:37:17 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935649.1337010; Wed, 02 Apr 2025 11:37:17 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzwPF-0005XR-Mv; Wed, 02 Apr 2025 11:37:17 +0000 Received: by outflank-mailman (input) for mailman id 935649; Wed, 02 Apr 2025 11:37:16 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzwPE-0005XL-6A for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 11:37:16 +0000 Received: from mail-pf1-x42a.google.com (mail-pf1-x42a.google.com [2607:f8b0:4864:20::42a]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id d2be7ca8-0fb6-11f0-9ea9-5ba50f476ded; Wed, 02 Apr 2025 13:37:15 +0200 (CEST) Received: by mail-pf1-x42a.google.com with SMTP id d2e1a72fcca58-73712952e1cso16587b3a.1 for ; Wed, 02 Apr 2025 04:37:15 -0700 (PDT) Received: from localhost ([84.78.159.3]) by smtp.gmail.com with UTF8SMTPSA id 41be03b00d2f7-af93b6d6f77sm8173978a12.36.2025.04.02.04.37.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Apr 2025 04:37:13 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: d2be7ca8-0fb6-11f0-9ea9-5ba50f476ded DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1743593833; x=1744198633; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=ixU0oqK5jbY2nPR4JZGgt/nTg2jny4RurPx7i/XkUWw=; b=WG8hewpDW6y228cGhbVjjVcfXTyo1BBHpwNf/fjvSwRIpBM/BNuEkZ6zMesQllMqzP /aSQCf3X+4kJg+/bOprOEyLBApMpneu97dTtPlDmoOn9hXv1KLwsxkXS9SJjdVIyS9d4 OiMSCN+1OIsuPp3T79NtQsxOIskIpDk3islfc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743593833; x=1744198633; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=ixU0oqK5jbY2nPR4JZGgt/nTg2jny4RurPx7i/XkUWw=; b=DTslPGrW8C5A6xT3GRhXYARf8RgSZZwCsvLhAZfHYhnLAbkA1oUzegb/xv4KOAdAOO +IqXvrHcLffDgT3IEJitxRf2llPDiF0DNIgPO/HzxjOGN8ITuJzk5/XmM6rzRqdjs4sg BGHAlWeSVEc5WJ0vFuVcZLXmAG0BALWjYfs7dwAsBsDIC+mL1FzL8fciN/Q9PLuWNcc3 uxRl8mlwdPTX00/bOT1gnZ8rLd2KaQ/zwIcdqxlLzifZvRSEGXe+qdNe3BqvdqABjiLB pizVxCMKpACyVKFUrp49C335tTTR8a5/U1UPGTr0tokUC7sPMIbZiWGhdxsiCENR6msg 1dhw== X-Forwarded-Encrypted: i=1; AJvYcCX/cpY81/eULmPj+DRrGEH+37k2OOPCx9hhyvIpH8ULNribnGX4A06D4IjAP5VfoRK1skAJNYLxk2g=@lists.xenproject.org X-Gm-Message-State: AOJu0YzzU22X+keO7v4ec3Qk2hFFXbJ0E7MBHPstKNtUriUkIzlNlWyS 4D0bAAaBjJmYyixEvDuj38mUvSZ8XlyIO7rotnYSCKQj7stNz0aHD599zSazFKg= X-Gm-Gg: ASbGncvd25X/M/br3ZYz3LcfRvoYsjHCunvUApSLRBY9slKOY4mRQfbHPpjICRyBhip a6FKxUthCFpFQzzinLc46ZlPecR4YZ83DqYHi3hPggU40jTr7dShghP7ubycQdI+bOgu3qj+WXM rbvyV3e6GsZsUdgJ09MpgRpu493G22og4jL5ThldkzNTFtA9r091UCStns5AekdWhk03KW8LIk/ 9PoydIB6Zd38hIXKzf80nega0NCO58KStTowpvPKln5Ulo6V40SddqSlPwT1rCqQF2RrAHX3qdk ciSXUENuleBY+u7S+NEsTJ73Q6Fx+5splCmD1bF7z22ndczGyINsPRYYRXYS X-Google-Smtp-Source: AGHT+IGIDNqLOf2aBjmE23vtRj3zY193A54lzODujE/OYAP6rZ4Xy3aIyLk/gK9APCDfp4CLMHy1Ow== X-Received: by 2002:a05:6a20:9f99:b0:1f0:e42e:fb1d with SMTP id adf61e73a8af0-2009f79c23amr28543288637.36.1743593833636; Wed, 02 Apr 2025 04:37:13 -0700 (PDT) From: Roger Pau Monne To: Juergen Gross , Roger Pau Monne , xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org Cc: Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Stefano Stabellini , Oleksandr Tyshchenko Subject: [PATCH] x86/xen: fix balloon target initialization for PVH dom0 Date: Wed, 2 Apr 2025 13:36:55 +0200 Message-ID: <20250402113656.84673-1-roger.pau@citrix.com> X-Mailer: git-send-email 2.48.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit PVH dom0 re-uses logic from PV dom0, in which RAM ranges not assigned to dom0 are re-used as scratch memory to map foreign and grant pages. Such logic relies on reporting those unpopulated ranges as RAM to Linux, and mark them as reserved. This way Linux creates the underlying page structures required for metadata management. Such approach works fine on PV because the initial balloon target is calculated using specific Xen data, that doesn't take into account the memory type changes described above. However on HVM and PVH the initial balloon target is calculated using get_num_physpages(), and that function does take into account the unpopulated RAM regions used as scratch space for remote domain mappings. This leads to PVH dom0 having an incorrect initial balloon target, which causes malfunction (excessive memory freeing) of the balloon driver if the dom0 memory target is later adjusted from the toolstack. Fix this by using xen_released_pages to account for any pages that are part of the memory map, but are already unpopulated when the balloon driver is initialized. This accounts for any regions used for scratch remote mappings. Take the opportunity to unify PV with PVH/HVM guests regarding the usage of get_num_physpages(), as that avoids having to add different logic for PV vs PVH in both balloon_add_regions() and arch_xen_unpopulated_init(). Much like a6aa4eb994ee, the code in this changeset should have been part of 38620fc4e893. Fixes: a6aa4eb994ee ('xen/x86: add extra pages to unpopulated-alloc if available') Signed-off-by: Roger Pau Monné --- I think it's easier to unify the PV and PVH/HVM paths here regarding the usage of get_num_physpages(), as otherwise the fix needs to add further PV vs HVM divergences in both balloon_add_regions() and arch_xen_unpopulated_init(), but it also has a higher risk of breaking PV in subtle ways. --- arch/x86/xen/enlighten.c | 7 +++++++ drivers/xen/balloon.c | 19 +++++++++++-------- 2 files changed, 18 insertions(+), 8 deletions(-) diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c index 43dcd8c7badc..651bb206434c 100644 --- a/arch/x86/xen/enlighten.c +++ b/arch/x86/xen/enlighten.c @@ -466,6 +466,13 @@ int __init arch_xen_unpopulated_init(struct resource **res) xen_free_unpopulated_pages(1, &pg); } + /* + * Account for the region being in the physmap but unpopulated. + * The value in xen_released_pages is used by the balloon + * driver to know how much of the physmap is unpopulated and + * set an accurate initial memory target. + */ + xen_released_pages += xen_extra_mem[i].n_pfns; /* Zero so region is not also added to the balloon driver. */ xen_extra_mem[i].n_pfns = 0; } diff --git a/drivers/xen/balloon.c b/drivers/xen/balloon.c index 163f7f1d70f1..085d418ee6da 100644 --- a/drivers/xen/balloon.c +++ b/drivers/xen/balloon.c @@ -698,7 +698,15 @@ static void __init balloon_add_regions(void) for (pfn = start_pfn; pfn < extra_pfn_end; pfn++) balloon_append(pfn_to_page(pfn)); - balloon_stats.total_pages += extra_pfn_end - start_pfn; + /* + * Extra regions are accounted for in the physmap, but need + * decreasing from current_pages to balloon down the initial + * allocation, because they are already accounted for in + * total_pages. + */ + BUG_ON(extra_pfn_end - start_pfn >= + balloon_stats.current_pages); + balloon_stats.current_pages -= extra_pfn_end - start_pfn; } } @@ -711,13 +719,8 @@ static int __init balloon_init(void) pr_info("Initialising balloon driver\n"); -#ifdef CONFIG_XEN_PV - balloon_stats.current_pages = xen_pv_domain() - ? min(xen_start_info->nr_pages - xen_released_pages, max_pfn) - : get_num_physpages(); -#else - balloon_stats.current_pages = get_num_physpages(); -#endif + BUG_ON(xen_released_pages >= get_num_physpages()); + balloon_stats.current_pages = get_num_physpages() - xen_released_pages; balloon_stats.target_pages = balloon_stats.current_pages; balloon_stats.balloon_low = 0; balloon_stats.balloon_high = 0; -- 2.48.1 From xen-devel-bounces@lists.xenproject.org Wed Apr 02 13:51:01 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 13:51:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935716.1337112 (Exim 4.92) (envelope-from ) id 1tzyUU-0004cj-4T; Wed, 02 Apr 2025 13:50:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935716.1337112; Wed, 02 Apr 2025 13:50:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzyUU-0004cc-1f; Wed, 02 Apr 2025 13:50:50 +0000 Received: by outflank-mailman (input) for mailman id 935716; Wed, 02 Apr 2025 13:50:49 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzyUS-0004cW-WF for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 13:50:49 +0000 Received: from mail-wm1-x332.google.com (mail-wm1-x332.google.com [2a00:1450:4864:20::332]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 7a678662-0fc9-11f0-9ffb-bf95429c2676; Wed, 02 Apr 2025 15:50:46 +0200 (CEST) Received: by mail-wm1-x332.google.com with SMTP id 5b1f17b1804b1-43cef035a3bso49437785e9.1 for ; Wed, 02 Apr 2025 06:50:46 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 02 Apr 2025 06:50:46 -0700 (PDT) Message-ID: <3f51a217-8f23-4c83-b431-17ae83ed395b@suse.com> Date: Wed, 2 Apr 2025 15:50:44 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/apic: Fix function typechecking in TSC Deadline errata check From: Jan Beulich To: Andrew Cooper Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Xen-devel References: <20220321141207.18422-1-andrew.cooper3@citrix.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 21.03.2022 15:26, Jan Beulich wrote: > On 21.03.2022 15:12, Andrew Cooper wrote: >> --- a/xen/arch/x86/apic.c >> +++ b/xen/arch/x86/apic.c >> @@ -1092,12 +1092,17 @@ static void setup_APIC_timer(void) >> local_irq_restore(flags); >> } >> >> +#define DEADLINE_MODEL_FUNCT(m, fn) \ >> + { .vendor = X86_VENDOR_INTEL, .family = 6, .model = (m), \ >> + .feature = X86_FEATURE_TSC_DEADLINE, \ >> + .driver_data = fn + (0 * sizeof(fn == ((unsigned int (*)(void))NULL))) } > > Are you sure all compiler versions we support are happy about + > of a function pointer and a constant? Even if that constant is zero, > this is not legal as per the plain C spec. Thanks for the pointer to https://gcc.gnu.org/onlinedocs/gcc/Pointer-Arith.html - this is indeed fine then, with the assumption that this is also only meaningful with the non-upstream -fcf-check-attribute= patch in place. Hence with ... > Also strictly speaking you would want to parenthesize both uses of > fn. ... this taken care of (also to please Misra) Reviewed-by: Jan Beulich IOW ... >> #define DEADLINE_MODEL_MATCH(m, fr) \ >> { .vendor = X86_VENDOR_INTEL, .family = 6, .model = (m), \ >> .feature = X86_FEATURE_TSC_DEADLINE, \ >> .driver_data = (void *)(unsigned long)(fr) } > > As long as we leave this in place, there's a (small) risk of the > wrong macro being used again if another hook would need adding here. > We might be safer if driver_data became "unsigned long" and the > void * cast was dropped from here (with an "unsigned long" cast > added in the new macro, which at the same time would address my > other concern above). ... while I continue to be concerned here, we can as well deal with that if and when a new such hook appeared. Jan From xen-devel-bounces@lists.xenproject.org Wed Apr 02 13:56:07 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 13:56:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935732.1337122 (Exim 4.92) (envelope-from ) id 1tzyZY-0005Di-LF; Wed, 02 Apr 2025 13:56:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935732.1337122; Wed, 02 Apr 2025 13:56:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzyZY-0005Db-IK; Wed, 02 Apr 2025 13:56:04 +0000 Received: by outflank-mailman (input) for mailman id 935732; Wed, 02 Apr 2025 13:56:03 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzyZX-0005DV-Cb for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 13:56:03 +0000 Received: from mail-wr1-x431.google.com (mail-wr1-x431.google.com [2a00:1450:4864:20::431]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 368bc8b4-0fca-11f0-9ea9-5ba50f476ded; Wed, 02 Apr 2025 15:56:02 +0200 (CEST) Received: by mail-wr1-x431.google.com with SMTP id ffacd0b85a97d-39c1ef4acf2so1790784f8f.0 for ; Wed, 02 Apr 2025 06:56:02 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 02 Apr 2025 06:56:01 -0700 (PDT) Message-ID: Date: Wed, 2 Apr 2025 15:56:00 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Jan Beulich Subject: [PATCH v2 0/5] symbols: assorted adjustments To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit The main goal was what patch 3 does, but on the way there various other things became noticeable, and some preparation was necessary, too. 1: add minimal self-test 2: split symbols_num_syms 3: arrange to know where functions end 4: centralize and re-arrange $(all_symbols) calculation 5: prefer symbols which have a type Jan From xen-devel-bounces@lists.xenproject.org Wed Apr 02 13:58:02 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 13:58:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935742.1337133 (Exim 4.92) (envelope-from ) id 1tzybS-0005la-01; Wed, 02 Apr 2025 13:58:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935742.1337133; Wed, 02 Apr 2025 13:58:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzybR-0005lT-T2; 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Signed-off-by: Jan Beulich --- While Andrew validly suggests cf_check isn't a requirement for selecting which function(s) to use (with the non-upstream gcc patch that we're using in CI), that's only because of how the non-upstream patch works. Going function-pointer -> unsigned long -> function-pointer without it being diagnosed that the cf_check is missing is a shortcoming there, and might conceivably be fixed at some point. (Imo any address-taking on a function should require it to be cf_check.) Hence I'd like to stick to using cf_check functions only for passing to test_lookup(). With this FAST_SYMBOL_LOOKUP may make sense to permit enabling even when LIVEPATCH=n. Thoughts? (In this case "symbols: centralize and re- arrange $(all_symbols) calculation" would want pulling ahead.) --- a/xen/common/symbols.c +++ b/xen/common/symbols.c @@ -260,6 +260,41 @@ unsigned long symbols_lookup_by_name(con return 0; } +#ifdef CONFIG_SELF_TESTS + +static void __init test_lookup(unsigned long addr, const char *expected) +{ + char buf[KSYM_NAME_LEN + 1]; + const char *name, *symname; + unsigned long size, offs; + + name = symbols_lookup(addr, &size, &offs, buf); + if ( !name ) + panic("%s: address not found\n", expected); + if ( offs ) + panic("%s: non-zero offset (%#lx) unexpected\n", expected, offs); + + /* Cope with static symbols, where varying file names/paths may be used. */ + symname = strchr(name, '#'); + symname = symname ? symname + 1 : name; + if ( strcmp(symname, expected) ) + panic("%s: unexpected symbol name: '%s'\n", expected, symname); + + offs = symbols_lookup_by_name(name); + if ( offs != addr ) + panic("%s: address %#lx unexpected; wanted %#lx\n", + expected, offs, addr); +} + +static void __init __constructor test_symbols(void) +{ + /* Be sure to only try this for cf_check functions. */ + test_lookup((unsigned long)dump_execstate, "dump_execstate"); + test_lookup((unsigned long)test_symbols, __func__); +} + +#endif /* CONFIG_SELF_TESTS */ + /* * Local variables: * mode: C From xen-devel-bounces@lists.xenproject.org Wed Apr 02 13:58:21 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 13:58:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935747.1337143 (Exim 4.92) (envelope-from ) id 1tzybl-00068M-6y; Wed, 02 Apr 2025 13:58:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935747.1337143; Wed, 02 Apr 2025 13:58:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzybl-000682-3X; Wed, 02 Apr 2025 13:58:21 +0000 Received: by outflank-mailman (input) for mailman id 935747; Wed, 02 Apr 2025 13:58:19 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzybj-0005kV-Qk for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 13:58:19 +0000 Received: from mail-wr1-x42a.google.com (mail-wr1-x42a.google.com [2a00:1450:4864:20::42a]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 879344c6-0fca-11f0-9ea9-5ba50f476ded; Wed, 02 Apr 2025 15:58:19 +0200 (CEST) Received: by mail-wr1-x42a.google.com with SMTP id ffacd0b85a97d-399749152b4so3295683f8f.3 for ; Wed, 02 Apr 2025 06:58:19 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 02 Apr 2025 06:58:17 -0700 (PDT) Message-ID: <5015ce6d-a961-491b-9fe7-f6628329f3f0@suse.com> Date: Wed, 2 Apr 2025 15:58:16 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH v2 2/5] symbols: split symbols_num_syms From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit In preparation for inserting address entries into symbols_addresses[] / symbols_offsets[] without enlarging symbols_sorted_offsets[], split symbols_num_syms into symbols_num_addrs (counting entries in the former plus symbols_names[] as well as, less directly, symbols_markers[]) and symbols_num_names (counting entries in the latter). While doing the adjustment move declarations to a new private symbols.h, to be used by both symbols.c and symbols-dummy.c. Replace u8/u16 while doing so. Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- a/xen/common/symbols.c +++ b/xen/common/symbols.c @@ -10,7 +10,6 @@ * compression (see tools/symbols.c for a more complete description) */ -#include #include #include #include @@ -21,22 +20,7 @@ #include #include -#ifdef SYMBOLS_ORIGIN -extern const unsigned int symbols_offsets[]; -#define symbols_address(n) (SYMBOLS_ORIGIN + symbols_offsets[n]) -#else -extern const unsigned long symbols_addresses[]; -#define symbols_address(n) symbols_addresses[n] -#endif -extern const unsigned int symbols_num_syms; -extern const u8 symbols_names[]; - -extern const struct symbol_offset symbols_sorted_offsets[]; - -extern const u8 symbols_token_table[]; -extern const u16 symbols_token_index[]; - -extern const unsigned int symbols_markers[]; +#include "symbols.h" /* expand a compressed symbol data into the resulting uncompressed string, given the offset to where the symbol is in the compressed stream */ @@ -124,7 +108,7 @@ const char *symbols_lookup(unsigned long /* do a binary search on the sorted symbols_addresses array */ low = 0; - high = symbols_num_syms; + high = symbols_num_addrs; while (high-low > 1) { mid = (low + high) / 2; @@ -141,7 +125,7 @@ const char *symbols_lookup(unsigned long symbols_expand_symbol(get_symbol_offset(low), namebuf); /* Search for next non-aliased symbol */ - for (i = low + 1; i < symbols_num_syms; i++) { + for (i = low + 1; i < symbols_num_addrs; i++) { if (symbols_address(i) > symbols_address(low)) { symbol_end = symbols_address(i); break; @@ -182,9 +166,9 @@ int xensyms_read(uint32_t *symnum, char static unsigned int next_symbol, next_offset; static DEFINE_SPINLOCK(symbols_mutex); - if ( *symnum > symbols_num_syms ) + if ( *symnum > symbols_num_addrs ) return -ERANGE; - if ( *symnum == symbols_num_syms ) + if ( *symnum == symbols_num_addrs ) { /* No more symbols */ name[0] = '\0'; @@ -227,7 +211,7 @@ unsigned long symbols_lookup_by_name(con #ifdef CONFIG_FAST_SYMBOL_LOOKUP low = 0; - high = symbols_num_syms; + high = symbols_num_names; while ( low < high ) { unsigned long mid = low + ((high - low) / 2); --- /dev/null +++ b/xen/common/symbols.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#include +#include + +#ifdef SYMBOLS_ORIGIN +extern const unsigned int symbols_offsets[]; +#define symbols_address(n) (SYMBOLS_ORIGIN + symbols_offsets[n]) +#else +extern const unsigned long symbols_addresses[]; +#define symbols_address(n) symbols_addresses[n] +#endif +extern const unsigned int symbols_num_addrs; +extern const unsigned char symbols_names[]; + +extern const unsigned int symbols_num_names; +extern const struct symbol_offset symbols_sorted_offsets[]; + +extern const uint8_t symbols_token_table[]; +extern const uint16_t symbols_token_index[]; + +extern const unsigned int symbols_markers[]; + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ --- a/xen/common/symbols-dummy.c +++ b/xen/common/symbols-dummy.c @@ -3,22 +3,22 @@ * link of the hypervisor image. */ -#include -#include +#include "symbols.h" #ifdef SYMBOLS_ORIGIN const unsigned int symbols_offsets[1]; #else const unsigned long symbols_addresses[1]; #endif -const unsigned int symbols_num_syms; -const u8 symbols_names[1]; +const unsigned int symbols_num_addrs; +const unsigned char symbols_names[1]; #ifdef CONFIG_FAST_SYMBOL_LOOKUP +const unsigned int symbols_num_names; const struct symbol_offset symbols_sorted_offsets[1]; #endif -const u8 symbols_token_table[1]; -const u16 symbols_token_index[1]; +const uint8_t symbols_token_table[1]; +const uint16_t symbols_token_index[1]; const unsigned int symbols_markers[1]; --- a/xen/tools/symbols.c +++ b/xen/tools/symbols.c @@ -323,7 +323,7 @@ static void write_src(void) } printf("\n"); - output_label("symbols_num_syms"); + output_label("symbols_num_addrs"); printf("\t.long\t%d\n", table_cnt); printf("\n"); @@ -373,6 +373,10 @@ static void write_src(void) return; } + output_label("symbols_num_names"); + printf("\t.long\t%d\n", table_cnt); + printf("\n"); + /* Sorted by original symbol names and type. */ qsort(table, table_cnt, sizeof(*table), compare_name_orig); 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Using global vs local is undesirable in certain situations, e.g. when a "real" symbol is local and at the same address as a section start/end one (which are all global). Note that for xen.efi the checking for "Function" is only forward- looking at this point: The function-ness of symbols (much like their size) is lost when linking PE/COFF binaries from ELF objects with GNU ld up to at least 2.44. Signed-off-by: Jan Beulich --- I didn't see much reason to also check for "Pointer" and "Array" or any of the basic types. While nm reports pointers and arrays (but not the basic types) for PE/COFF, making those up when linker input is ELF would be impossible without further auxiliary (and non-standard) data in the ELF symbol table. Transforming STT_FUNC, otoh, is in principle possible. Implicit from the above: Until GNU ld properly transforms STT_FUNC, symbol conflicts will be resolved differently for functions. Symbol conflicts will always be resolved differently for data. xen.efi stack traces may therefore be less informative than xen-syms ones. --- v2: New. --- a/xen/tools/symbols.c +++ b/xen/tools/symbols.c @@ -45,6 +45,7 @@ struct sym_entry { unsigned int addr_idx; unsigned int stream_offset; unsigned char type; + bool typed; }; #define SYMBOL_NAME(s) ((char *)(s)->sym + 1) @@ -180,6 +181,9 @@ static int read_symbol(FILE *in, struct s->type = stype; /* As s->sym[0] ends mangled. */ } s->sym[0] = stype; + s->typed = strcmp(type, "FUNC") == 0 || + strcmp(type, "OBJECT") == 0 || + strcmp(type, "Function") == 0; rc = 0; skip_tail: @@ -613,6 +617,13 @@ static int compare_value(const void *p1, return -1; if (sym1->addr > sym2->addr) return +1; + + /* Prefer symbols which have a type. */ + if (sym1->typed && !sym2->typed) + return -1; + if (sym2->typed && !sym1->typed) + return +1; + /* Prefer global symbols. */ if (isupper(*sym1->sym)) return -1; From xen-devel-bounces@lists.xenproject.org Wed Apr 02 14:01:15 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 14:01:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935777.1337163 (Exim 4.92) (envelope-from ) id 1tzyeU-0000Zr-Uk; Wed, 02 Apr 2025 14:01:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935777.1337163; Wed, 02 Apr 2025 14:01:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzyeU-0000Zk-SA; Wed, 02 Apr 2025 14:01:10 +0000 Received: by outflank-mailman (input) for mailman id 935777; Wed, 02 Apr 2025 14:01:09 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzyc1-0005kV-IU for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 13:58:37 +0000 Received: from mail-wr1-x42c.google.com (mail-wr1-x42c.google.com [2a00:1450:4864:20::42c]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 92a3c56e-0fca-11f0-9ea9-5ba50f476ded; Wed, 02 Apr 2025 15:58:36 +0200 (CEST) Received: by mail-wr1-x42c.google.com with SMTP id ffacd0b85a97d-39ac8e7688aso5226141f8f.2 for ; Wed, 02 Apr 2025 06:58:36 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 02 Apr 2025 06:58:36 -0700 (PDT) Message-ID: <10e116c5-5a62-4abc-a52a-e2ca12118cfe@suse.com> Date: Wed, 2 Apr 2025 15:58:34 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH v2 3/5] symbols: arrange to know where functions end From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit When determining the symbol for a given address (e.g. for the %pS logging format specifier), so far the size of a symbol (function) was assumed to be everything until the next symbol. There may be gaps though, which would better be recognizable in output (often suggesting something odd is going on). Insert "fake" end symbols in the address table, accompanied by zero- length type/name entries (to keep lookup reasonably close to how it was). Note however that this, with present GNU binutils, won't work for xen.efi: The linker loses function sizes (they're not part of a normal symbol table entry), and hence nm has no way of reporting them. The address table growth is quite significant on x86 release builds (due to functions being aligned to 16-byte boundaries), though: Its size almost doubles. Requested-by: Andrew Cooper Signed-off-by: Jan Beulich --- Note: Style-wise this is a horrible mix. I'm trying to match styles with what's used in the respective functions. Older GNU ld retains section symbols, which nm then also lists. Should we perhaps strip those as we read in nm's output? They don't provide any useful extra information, as our linker scripts add section start symbols anyway. (For the purposes here, luckily such section symbols are at least emitted without size.) Even for section start symbols there is the question of whether they really need retaining (except perhaps when producing a map file). The main question here likely is whether livepatch may have a need to look them up by name. (Section end symbols may actually be slightly more useful to keep, but that may also want considering more closely.) --- v2: Deal with multiple symbols at the same address, but only some having a size specified. --- a/xen/common/symbols.c +++ b/xen/common/symbols.c @@ -116,6 +116,13 @@ const char *symbols_lookup(unsigned long else high = mid; } + /* If we hit an END symbol, move to the previous (real) one. */ + if (!symbols_names[get_symbol_offset(low)]) { + ASSERT(low); + symbol_end = symbols_address(low); + --low; + } + /* search for the first aliased symbol. Aliased symbols are symbols with the same address */ while (low && symbols_address(low - 1) == symbols_address(low)) @@ -124,11 +131,13 @@ const char *symbols_lookup(unsigned long /* Grab name */ symbols_expand_symbol(get_symbol_offset(low), namebuf); - /* Search for next non-aliased symbol */ - for (i = low + 1; i < symbols_num_addrs; i++) { - if (symbols_address(i) > symbols_address(low)) { - symbol_end = symbols_address(i); - break; + if (!symbol_end) { + /* Search for next non-aliased symbol */ + for (i = low + 1; i < symbols_num_addrs; i++) { + if (symbols_address(i) > symbols_address(low)) { + symbol_end = symbols_address(i); + break; + } } } @@ -170,6 +179,7 @@ int xensyms_read(uint32_t *symnum, char return -ERANGE; if ( *symnum == symbols_num_addrs ) { + no_symbol: /* No more symbols */ name[0] = '\0'; return 0; @@ -183,10 +193,31 @@ int xensyms_read(uint32_t *symnum, char /* Non-sequential access */ next_offset = get_symbol_offset(*symnum); + /* + * If we're at an END symbol, skip to the next (real) one. This can + * happen if the caller ignores the *symnum output from an earlier + * iteration (Linux'es /proc/xen/xensyms handling does as of 6.14-rc). + */ + if ( !symbols_names[next_offset] ) + { + ++next_offset; + if ( ++*symnum == symbols_num_addrs ) + goto no_symbol; + } + *type = symbols_get_symbol_type(next_offset); next_offset = symbols_expand_symbol(next_offset, name); *address = symbols_address(*symnum); + /* If next one is an END symbol, skip it. */ + if ( !symbols_names[next_offset] ) + { + ++next_offset; + /* Make sure not to increment past symbols_num_addrs below. */ + if ( *symnum + 1 < symbols_num_addrs ) + ++*symnum; + } + next_symbol = ++*symnum; spin_unlock(&symbols_mutex); --- a/xen/tools/symbols.c +++ b/xen/tools/symbols.c @@ -38,6 +38,7 @@ struct sym_entry { unsigned long long addr; + unsigned long size; unsigned int len; unsigned char *sym; char *orig_symbol; @@ -87,6 +88,8 @@ static int read_symbol(FILE *in, struct static char *filename; int rc = -1; + s->size = 0; + switch (input_format) { case fmt_bsd: rc = fscanf(in, "%llx %c %499s\n", &s->addr, &stype, str); @@ -96,8 +99,12 @@ static int read_symbol(FILE *in, struct /* nothing */; rc = fscanf(in, "%499[^ |] |%llx | %c |", str, &s->addr, &stype); - if (rc == 3 && fscanf(in, " %19[^ |] |", type) != 1) - *type = '\0'; + if (rc == 3) { + if(fscanf(in, " %19[^ |] |", type) != 1) + *type = '\0'; + else if(fscanf(in, "%lx |", &s->size) != 1) + s->size = 0; + } break; } if (rc != 3) { @@ -287,9 +294,18 @@ static int compare_name_orig(const void return rc; } +/* Determine whether the symbol at address table @idx wants a fake END + * symbol (address only) emitted as well. */ +static bool want_symbol_end(unsigned int idx) +{ + return table[idx].size && + (idx + 1 == table_cnt || + table[idx].addr + table[idx].size < table[idx + 1].addr); +} + static void write_src(void) { - unsigned int i, k, off; + unsigned int i, k, off, ends; unsigned int best_idx[256]; unsigned int *markers; char buf[KSYM_NAME_LEN+1]; @@ -318,24 +334,42 @@ static void write_src(void) printf("#else\n"); output_label("symbols_offsets"); printf("#endif\n"); - for (i = 0; i < table_cnt; i++) { + for (i = 0, ends = 0; i < table_cnt; i++) { printf("\tPTR\t%#llx - SYMBOLS_ORIGIN\n", table[i].addr); + + table[i].addr_idx = i + ends; + + if (!want_symbol_end(i)) { + /* If there's another symbol at the same address, + * propagate this symbol's size if the next one has + * no size, or if the next one's size is larger. */ + if (table[i].size && + i + 1 < table_cnt && + table[i + 1].addr == table[i].addr && + (!table[i + 1].size || + table[i + 1].size > table[i].size)) + table[i + 1].size = table[i].size; + continue; + } + + ++ends; + printf("\tPTR\t%#llx - SYMBOLS_ORIGIN\n", + table[i].addr + table[i].size); } printf("\n"); output_label("symbols_num_addrs"); - printf("\t.long\t%d\n", table_cnt); + printf("\t.long\t%d\n", table_cnt + ends); printf("\n"); /* table of offset markers, that give the offset in the compressed stream * every 256 symbols */ - markers = (unsigned int *) malloc(sizeof(unsigned int) * ((table_cnt + 255) / 256)); + markers = malloc(sizeof(*markers) * ((table_cnt + ends + 255) >> 8)); output_label("symbols_names"); - off = 0; - for (i = 0; i < table_cnt; i++) { - if ((i & 0xFF) == 0) - markers[i >> 8] = off; + for (i = 0, off = 0, ends = 0; i < table_cnt; i++) { + if (((i + ends) & 0xFF) == 0) + markers[(i + ends) >> 8] = off; printf("\t.byte 0x%02x", table[i].len); for (k = 0; k < table[i].len; k++) @@ -344,11 +378,22 @@ static void write_src(void) table[i].stream_offset = off; off += table[i].len + 1; + + if (!want_symbol_end(i)) + continue; + + /* END symbols have no name or type. */ + ++ends; + if (((i + ends) & 0xFF) == 0) + markers[(i + ends) >> 8] = off; + + printf("\t.byte 0\n"); + ++off; } printf("\n"); output_label("symbols_markers"); - for (i = 0; i < ((table_cnt + 255) >> 8); i++) + for (i = 0; i < ((table_cnt + ends + 255) >> 8); i++) printf("\t.long\t%d\n", markers[i]); printf("\n"); @@ -450,7 +495,6 @@ static void compress_symbols(unsigned ch len = table[i].len; p1 = table[i].sym; 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Move to the root Makefile, also to calculate just once. And then re-arrange to permit FAST_SYMBOL_LOOKUP to be independent of LIVEPATCH, which may be useful in (at least) debugging. Signed-off-by: Jan Beulich --- Likely syms-warn-dup-y wants to follow suit; it doesn't even have an Arm counterpart right now. --- a/xen/Makefile +++ b/xen/Makefile @@ -460,6 +460,10 @@ ALL_OBJS-$(CONFIG_CRYPTO) += crypto/buil ALL_LIBS-y := lib/lib.a +all-symbols-y := +all-symbols-$(CONFIG_LIVEPATCH) += --all-symbols +all-symbols-$(CONFIG_FAST_SYMBOL_LOOKUP) += --sort-by-name + include $(srctree)/arch/$(SRCARCH)/arch.mk # define new variables to avoid the ones defined in Config.mk @@ -612,7 +616,8 @@ $(TARGET): outputmakefile asm-generic FO $(Q)$(MAKE) $(build)=include all $(Q)$(MAKE) $(build)=arch/$(SRCARCH) include $(Q)$(MAKE) $(build)=. arch/$(SRCARCH)/include/asm/asm-offsets.h - $(Q)$(MAKE) $(build)=. MKRELOC=$(MKRELOC) 'ALL_OBJS=$(ALL_OBJS-y)' 'ALL_LIBS=$(ALL_LIBS-y)' $@ + $(Q)$(MAKE) $(build)=. MKRELOC=$(MKRELOC) 'ALL_OBJS=$(ALL_OBJS-y)' \ + 'ALL_LIBS=$(ALL_LIBS-y)' 'all_symbols=$(all-symbols-y)' $@ SUBDIRS = xsm arch common crypto drivers lib test define all_sources --- a/xen/arch/arm/Makefile +++ b/xen/arch/arm/Makefile @@ -81,15 +81,6 @@ ifneq ($(CONFIG_DTB_FILE),"") obj-y += dtb.o endif -ifdef CONFIG_LIVEPATCH -all_symbols = --all-symbols -ifdef CONFIG_FAST_SYMBOL_LOOKUP -all_symbols = --all-symbols --sort-by-name -endif -else -all_symbols = -endif - $(TARGET): $(TARGET)-syms $(OBJCOPY) -O binary -S $< $@ ifeq ($(CONFIG_ARM_64),y) --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -111,15 +111,6 @@ notes_phdrs = --notes endif endif -ifdef CONFIG_LIVEPATCH -all_symbols = --all-symbols -ifdef CONFIG_FAST_SYMBOL_LOOKUP -all_symbols = --all-symbols --sort-by-name -endif -else -all_symbols = -endif - syms-warn-dup-y := --warn-dup syms-warn-dup-$(CONFIG_SUPPRESS_DUPLICATE_SYMBOL_WARNINGS) := syms-warn-dup-$(CONFIG_ENFORCE_UNIQUE_SYMBOLS) := --error-dup From xen-devel-bounces@lists.xenproject.org Wed Apr 02 14:05:42 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 14:05:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935806.1337183 (Exim 4.92) (envelope-from ) id 1tzyir-0002ca-PH; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Apr 2025 14:05:33.0483 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c5e191d0-7354-41d9-2d38-08dd71ef6f21 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000042AB.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ1PR12MB6289 On 2025-04-01 19:50, Stefano Stabellini wrote: > On Tue, 1 Apr 2025, Jason Andryuk wrote: >> On 2025-04-01 08:16, Jan Beulich wrote: >>> On 31.03.2025 23:43, Jason Andryuk wrote: >> >>>> --- a/xen/arch/arm/dom0less-build.c >>>> +++ b/xen/arch/arm/dom0less-build.c >>>> @@ -865,6 +865,10 @@ static void __init initialize_domU_xenstore(void) >>>> rc = alloc_xenstore_evtchn(d); >>>> if ( rc < 0 ) >>>> panic("%pd: Failed to allocate xenstore_evtchn\n", d); >>>> + >>>> + if ( gfn != ~0ULL ) >>> >>> Is this an odd open-coding of INVALID_GFN? And even if not - why ULL when >>> "gfn" is unsigned long? The way you have it the condition will always be >>> false on Arm32, if I'm not mistaken. >> >> The gfn is pulled out of the HVM_PARAMS, which is a uint64_t. It is set like: >> >> d->arch.hvm.params[HVM_PARAM_STORE_PFN] = ~0ULL; >> >> But pulled out by: >> >> unsigned long gfn = d->arch.hvm.params[HVM_PARAM_STORE_PFN]; >> >> So your comment highlights that unsigned long is incorrect for ARM32. >> >> While I realize fixed types are discouraged, I'd prefer to use uint64_t for >> the replacement. That is the type of HVM_PARAMS, and uint64_t is used on the >> init-dom0less side as well. Using unsigned long long to get a 64bit value on >> ARM32 seems less clear to me. > > The types that correspond to hypercall struct field types should match > the hypercall struct field types. > > I think gfn should be uint64_t to match the definition of params. > > Similarly among the arguments of gnttab_seed_entry, flags should be > uint16_t and I think frame should be uint32_t. This last one I am > confused why you defined it as uint64_t, maybe I am missing something. With Jan's suggestion, I am dropping flags. Yes, frame should be uin32_t since it is filling in a grant table v1 entry, and that is limited to 32bit frame numbers. If the frame number is >32bits, then the grant can't be seeded. I guess I'll put a check in the caller to ensure that. Looking at the supported guest memory maximums, 32bit gfns should be enough to cover all the limits. > 16TiB would be needed to exceed a 32bit frame number. Regards, Jason From xen-devel-bounces@lists.xenproject.org Wed Apr 02 14:08:55 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 14:08:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935817.1337192 (Exim 4.92) (envelope-from ) id 1tzylv-0003C6-5x; Wed, 02 Apr 2025 14:08:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935817.1337192; Wed, 02 Apr 2025 14:08:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzylv-0003Bz-2q; Wed, 02 Apr 2025 14:08:51 +0000 Received: by outflank-mailman (input) for mailman id 935817; Wed, 02 Apr 2025 14:08:49 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzylt-0003Br-RA for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 14:08:49 +0000 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [2a00:1450:4864:20::32a]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id ff4f69fb-0fcb-11f0-9ea9-5ba50f476ded; Wed, 02 Apr 2025 16:08:48 +0200 (CEST) Received: by mail-wm1-x32a.google.com with SMTP id 5b1f17b1804b1-43d0c18e84eso31681775e9.3 for ; Wed, 02 Apr 2025 07:08:48 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 02 Apr 2025 07:08:48 -0700 (PDT) Message-ID: Date: Wed, 2 Apr 2025 16:08:46 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 3/5] symbols: arrange to know where functions end From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <10e116c5-5a62-4abc-a52a-e2ca12118cfe@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <10e116c5-5a62-4abc-a52a-e2ca12118cfe@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 02.04.2025 15:58, Jan Beulich wrote: > When determining the symbol for a given address (e.g. for the %pS > logging format specifier), so far the size of a symbol (function) was > assumed to be everything until the next symbol. There may be gaps > though, which would better be recognizable in output (often suggesting > something odd is going on). > > Insert "fake" end symbols in the address table, accompanied by zero- > length type/name entries (to keep lookup reasonably close to how it > was). > > Note however that this, with present GNU binutils, won't work for > xen.efi: The linker loses function sizes (they're not part of a normal > symbol table entry), and hence nm has no way of reporting them. And, just for reference: https://sourceware.org/pipermail/binutils/2025-March/140252.html Jan From xen-devel-bounces@lists.xenproject.org Wed Apr 02 14:19:56 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 14:19:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935833.1337202 (Exim 4.92) (envelope-from ) id 1tzywZ-0006SH-4Z; Wed, 02 Apr 2025 14:19:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935833.1337202; Wed, 02 Apr 2025 14:19:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzywZ-0006SA-21; Wed, 02 Apr 2025 14:19:51 +0000 Received: by outflank-mailman (input) for mailman id 935833; Wed, 02 Apr 2025 14:19:50 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzywY-0006S4-2g for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 14:19:50 +0000 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [2a00:1450:4864:20::336]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 86dfcb21-0fcd-11f0-9ffb-bf95429c2676; Wed, 02 Apr 2025 16:19:45 +0200 (CEST) Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-43d2d952eb1so47909855e9.1 for ; Wed, 02 Apr 2025 07:19:45 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 02 Apr 2025 07:19:44 -0700 (PDT) Message-ID: Date: Wed, 2 Apr 2025 16:19:43 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: New Defects reported by Coverity Scan for XenProject To: "xen-devel@lists.xenproject.org" References: <67ed34047fd3c_1209992cc92a0f99a0989e0@prd-scan-dashboard-0.mail> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <67ed34047fd3c_1209992cc92a0f99a0989e0@prd-scan-dashboard-0.mail> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 02.04.2025 14:56, scan-admin@coverity.com wrote: > ** CID 1645573: Null pointer dereferences (FORWARD_NULL) > > > ________________________________________________________________________________________________________ > *** CID 1645573: Null pointer dereferences (FORWARD_NULL) > /xen/arch/x86/mm/p2m.c: 346 in get_page_from_mfn_and_type() > 340 > 341 if ( p2m_is_ram(t) ) > 342 { > 343 if ( p2m_is_shared(t) ) > 344 d = dom_cow; > 345 >>>> CID 1645573: Null pointer dereferences (FORWARD_NULL) >>>> Passing null pointer "d" to "get_page", which dereferences it. > 346 if ( get_page(page, d) ) > 347 return page; > 348 } I wonder how the tool concludes d is NULL. The only vague guess I could come up with is that it checks a MEM_SHARING=n build, where dom_cow is always NULL. Yet in such a build p2m_shared() is also always false. Should we perhaps help it by forcing P2M_SHARED_TYPES (maybe also P2M_SHARABLE_TYPES) to 0 when MEM_SHARING=n? We do such already for MEM_PAGING=n ... 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Peter Anvin" , Stefano Stabellini , Oleksandr Tyshchenko References: <20250402113656.84673-1-roger.pau@citrix.com> Content-Language: en-US From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: <20250402113656.84673-1-roger.pau@citrix.com> Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------JxCZvdLcOPVULmrk5v0xs8hy" This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------JxCZvdLcOPVULmrk5v0xs8hy Content-Type: multipart/mixed; boundary="------------4IlyO0e06YQKSOcYRDsspWPU"; protected-headers="v1" From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= To: Roger Pau Monne , xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org Cc: Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Stefano Stabellini , Oleksandr Tyshchenko Message-ID: <05974e77-ae3c-4e62-a2c2-c764ab4a6d48@suse.com> Subject: Re: [PATCH] x86/xen: fix balloon target initialization for PVH dom0 References: <20250402113656.84673-1-roger.pau@citrix.com> In-Reply-To: <20250402113656.84673-1-roger.pau@citrix.com> --------------4IlyO0e06YQKSOcYRDsspWPU Content-Type: multipart/mixed; boundary="------------8SKrxIyjysNDcLV0IxPx3de1" --------------8SKrxIyjysNDcLV0IxPx3de1 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: base64 T24gMDIuMDQuMjUgMTM6MzYsIFJvZ2VyIFBhdSBNb25uZSB3cm90ZToNCj4gUFZIIGRvbTAg cmUtdXNlcyBsb2dpYyBmcm9tIFBWIGRvbTAsIGluIHdoaWNoIFJBTSByYW5nZXMgbm90IGFz c2lnbmVkIHRvDQo+IGRvbTAgYXJlIHJlLXVzZWQgYXMgc2NyYXRjaCBtZW1vcnkgdG8gbWFw IGZvcmVpZ24gYW5kIGdyYW50IHBhZ2VzLiAgU3VjaA0KPiBsb2dpYyByZWxpZXMgb24gcmVw b3J0aW5nIHRob3NlIHVucG9wdWxhdGVkIHJhbmdlcyBhcyBSQU0gdG8gTGludXgsIGFuZA0K PiBtYXJrIHRoZW0gYXMgcmVzZXJ2ZWQuICBUaGlzIHdheSBMaW51eCBjcmVhdGVzIHRoZSB1 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Wed, 02 Apr 2025 07:24:31 -0700 (PDT) Message-ID: Date: Wed, 2 Apr 2025 16:24:30 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen: Change xen-acpi-processor dom0 dependency To: Jason Andryuk , Stefano Stabellini , Oleksandr Tyshchenko Cc: Penny Zheng , Jan Beulich , xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org References: <20250331172913.51240-1-jason.andryuk@amd.com> Content-Language: en-US From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: <20250331172913.51240-1-jason.andryuk@amd.com> Content-Type: multipart/signed; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Apr 2025 14:34:38.6195 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7664e9cd-bc4b-41f7-31e1-08dd71f37f92 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000989E8.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB7761 On 2025-04-02 10:24, Jürgen Groß wrote: > On 31.03.25 19:29, Jason Andryuk wrote: >> xen-acpi-processor functions under a PVH dom0 with only a >> xen_initial_domain() runtime check.  Change the Kconfig dependency from >> PV dom0 to generic dom0 to reflect that. >> >> Suggested-by: Jan Beulich >> Signed-off-by: Jason Andryuk >> --- >>   drivers/xen/Kconfig | 2 +- >>   1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/drivers/xen/Kconfig b/drivers/xen/Kconfig >> index f7d6f47971fd..24f485827e03 100644 >> --- a/drivers/xen/Kconfig >> +++ b/drivers/xen/Kconfig >> @@ -278,7 +278,7 @@ config XEN_PRIVCMD_EVENTFD >>   config XEN_ACPI_PROCESSOR >>       tristate "Xen ACPI processor" >> -    depends on XEN && XEN_PV_DOM0 && X86 && ACPI_PROCESSOR && CPU_FREQ >> +    depends on XEN && XEN_DOM0 && X86 && ACPI_PROCESSOR && CPU_FREQ >>       default m >>       help >>         This ACPI processor uploads Power Management information to >> the Xen > > Assuming that all needed hypercalls are fine for PVH dom0: It's platform_op XENPF_set_processor_pminfo and XENPF_get_cpuinfo. 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Merritt" To: xen-devel@lists.xenproject.org Cc: "Alexander M. Merritt" , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [XEN PATCH 1/1] xen/x86: drop wrappers of SVM instructions Date: Wed, 2 Apr 2025 14:54:10 +0000 Message-ID: <034a5518e8dfde9ac707b494f5d863d78efec84e.1743601241.git.alexander@edera.dev> X-Mailer: git-send-email 2.45.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The new toolchain baseline knows the SVM instructions. Resolves: xen-project/xen#204 Signed-off-by: Alexander M. Merritt --- xen/arch/x86/hvm/svm/svm.h | 14 +++----------- xen/arch/x86/include/asm/asm-defns.h | 12 ------------ 2 files changed, 3 insertions(+), 23 deletions(-) diff --git a/xen/arch/x86/hvm/svm/svm.h b/xen/arch/x86/hvm/svm/svm.h index beeaaab4f7..5c5e91a1ac 100644 --- a/xen/arch/x86/hvm/svm/svm.h +++ b/xen/arch/x86/hvm/svm/svm.h @@ -23,25 +23,17 @@ void __update_guest_eip(struct cpu_user_regs *regs, unsigned int inst_len); static inline void svm_vmload_pa(paddr_t vmcb) { - asm volatile ( - ".byte 0x0f,0x01,0xda" /* vmload */ - : : "a" (vmcb) : "memory" ); + asm volatile ( "vmload" : : "a" (vmcb) : "memory" ); } static inline void svm_vmsave_pa(paddr_t vmcb) { - asm volatile ( - ".byte 0x0f,0x01,0xdb" /* vmsave */ - : : "a" (vmcb) : "memory" ); + asm volatile ( "vmsave" : : "a" (vmcb) : "memory" ); } static inline void svm_invlpga(unsigned long linear, uint32_t asid) { - asm volatile ( - ".byte 0x0f,0x01,0xdf" - : /* output */ - : /* input */ - "a" (linear), "c" (asid) ); + asm volatile ( "invlpga" : /* output */ : /* input */ "a" (linear), "c" (asid) ); } /* diff --git a/xen/arch/x86/include/asm/asm-defns.h b/xen/arch/x86/include/asm/asm-defns.h index 32d6b44910..5a64b42495 100644 --- a/xen/arch/x86/include/asm/asm-defns.h +++ b/xen/arch/x86/include/asm/asm-defns.h @@ -10,18 +10,6 @@ .endm #endif -.macro vmrun - .byte 0x0f, 0x01, 0xd8 -.endm - -.macro stgi - .byte 0x0f, 0x01, 0xdc -.endm - -.macro clgi - .byte 0x0f, 0x01, 0xdd -.endm - /* * Call a noreturn function. This could be JMP, but CALL results in a more * helpful backtrace. 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Merritt" To: xen-devel@lists.xenproject.org Cc: "Alexander M. Merritt" , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH 0/1] drop wrappers of SVM instructions Date: Wed, 2 Apr 2025 14:54:09 +0000 Message-ID: X-Mailer: git-send-email 2.45.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Part of cleanup following toolchain baseline upgrade. As the new toolchain baseline knows the SVM instructions, this series drops macros with SVM instructions, and updates SVM wrappers to use real instructions rather than bytecode. Resolves: xen-project/xen#204 Alexander M. Merritt (1): xen/x86: drop wrappers of SVM instructions xen/arch/x86/hvm/svm/svm.h | 14 +++----------- xen/arch/x86/include/asm/asm-defns.h | 12 ------------ 2 files changed, 3 insertions(+), 23 deletions(-) -- 2.45.2 From xen-devel-bounces@lists.xenproject.org Wed Apr 02 14:56:52 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 14:56:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935915.1337279 (Exim 4.92) (envelope-from ) id 1tzzWN-0003dN-7s; Wed, 02 Apr 2025 14:56:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935915.1337279; Wed, 02 Apr 2025 14:56:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzzWN-0003dG-4w; Wed, 02 Apr 2025 14:56:51 +0000 Received: by outflank-mailman (input) for mailman id 935915; Wed, 02 Apr 2025 14:56:49 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzzWL-0003d5-4S for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 14:56:49 +0000 Received: from mail-wr1-x431.google.com (mail-wr1-x431.google.com [2a00:1450:4864:20::431]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id b3bd7b34-0fd2-11f0-9ea9-5ba50f476ded; Wed, 02 Apr 2025 16:56:48 +0200 (CEST) Received: by mail-wr1-x431.google.com with SMTP id ffacd0b85a97d-391342fc1f6so6019294f8f.1 for ; Wed, 02 Apr 2025 07:56:48 -0700 (PDT) Received: from [192.168.1.183] (host-92-26-98-202.as13285.net. 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Merritt" , xen-devel@lists.xenproject.org Cc: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <034a5518e8dfde9ac707b494f5d863d78efec84e.1743601241.git.alexander@edera.dev> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <034a5518e8dfde9ac707b494f5d863d78efec84e.1743601241.git.alexander@edera.dev> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 02/04/2025 3:54 pm, Alexander M. Merritt wrote: > The new toolchain baseline knows the SVM instructions. > > Resolves: xen-project/xen#204 > > Signed-off-by: Alexander M. Merritt Reviewed-by: Andrew Cooper , with a couple of notes. > --- > xen/arch/x86/hvm/svm/svm.h | 14 +++----------- > xen/arch/x86/include/asm/asm-defns.h | 12 ------------ > 2 files changed, 3 insertions(+), 23 deletions(-) > > diff --git a/xen/arch/x86/hvm/svm/svm.h b/xen/arch/x86/hvm/svm/svm.h > index beeaaab4f7..5c5e91a1ac 100644 > --- a/xen/arch/x86/hvm/svm/svm.h > +++ b/xen/arch/x86/hvm/svm/svm.h > @@ -23,25 +23,17 @@ void __update_guest_eip(struct cpu_user_regs *regs, unsigned int inst_len); > > static inline void svm_vmload_pa(paddr_t vmcb) > { > - asm volatile ( > - ".byte 0x0f,0x01,0xda" /* vmload */ > - : : "a" (vmcb) : "memory" ); > + asm volatile ( "vmload" : : "a" (vmcb) : "memory" ); We tend to prefer :: for empty sections. > } > > static inline void svm_vmsave_pa(paddr_t vmcb) > { > - asm volatile ( > - ".byte 0x0f,0x01,0xdb" /* vmsave */ > - : : "a" (vmcb) : "memory" ); > + asm volatile ( "vmsave" : : "a" (vmcb) : "memory" ); > } > > static inline void svm_invlpga(unsigned long linear, uint32_t asid) > { > - asm volatile ( > - ".byte 0x0f,0x01,0xdf" > - : /* output */ > - : /* input */ > - "a" (linear), "c" (asid) ); > + asm volatile ( "invlpga" : /* output */ : /* input */ "a" (linear), "c" (asid) ); And here, the output/input comments are useless and can be dropped. I can fix both on commit if you're happy? ~Andrew From xen-devel-bounces@lists.xenproject.org Wed Apr 02 15:04:41 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 15:04:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935929.1337289 (Exim 4.92) (envelope-from ) id 1tzzdq-0006lw-Vl; Wed, 02 Apr 2025 15:04:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935929.1337289; Wed, 02 Apr 2025 15:04:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzzdq-0006lp-T4; Wed, 02 Apr 2025 15:04:34 +0000 Received: by outflank-mailman (input) for mailman id 935929; Wed, 02 Apr 2025 15:04:34 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1tzzdp-0006lT-Rw for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 15:04:33 +0000 Received: from mail-qk1-x72d.google.com (mail-qk1-x72d.google.com [2607:f8b0:4864:20::72d]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id c7a9bdcf-0fd3-11f0-9ffb-bf95429c2676; Wed, 02 Apr 2025 17:04:31 +0200 (CEST) Received: by mail-qk1-x72d.google.com with SMTP id af79cd13be357-7c56a3def84so672510985a.0 for ; Wed, 02 Apr 2025 08:04:31 -0700 (PDT) Received: from localhost ([64.201.234.99]) by smtp.gmail.com with ESMTPSA id af79cd13be357-7c5f77650desm798848385a.79.2025.04.02.08.04.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Apr 2025 08:04:30 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: c7a9bdcf-0fd3-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=edera.dev; s=google; t=1743606270; x=1744211070; darn=lists.xenproject.org; h=content-transfer-encoding:organization:message-id:references :in-reply-to:subject:cc:to:from:date:mime-version:from:to:cc:subject :date:message-id:reply-to; bh=S9XoP9pFh+bHUVre2EMojdhOPftzHzM1XqMVPhqiZ7g=; b=ew7k4VixXUNMynvCKYZYETd2jnclqh3BwT+5xL3yVtUh0K/ufIB4z682/HKY+66NRg 394I+2gKe9QdBuPqXHpIhw42yaPlDqCEhrxFoxbvDNH90s4H4OaL6jLm6y1AdePxy4My QrClAX4Q/0CFXcs2OmdbTEZR4c9KerTSazpIqwMm8ERFBWz26qxtfkH3vkJFn1HFfmuo eR1EvljBPUEX1GIUPEiW8YqYkpi+plF7LnD3YRA57+B1zLCl7Q6eguwCRaX6WGj1fl5S oVQo4LNWN16OejLCNa6B98yDpYtybt1+hcU+/e7jbz3iERSoT9C5hNgEZO6hbyjNRZKx 06Og== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743606270; x=1744211070; h=content-transfer-encoding:organization:message-id:references :in-reply-to:subject:cc:to:from:date:mime-version:x-gm-message-state :from:to:cc:subject:date:message-id:reply-to; bh=S9XoP9pFh+bHUVre2EMojdhOPftzHzM1XqMVPhqiZ7g=; b=LbWfJks22wd0MMok93Te4JxPGKWV5rXXxyS64vPV+IeDgfrwhfjGc5eCpgUCoUq+cT 5XirOYrsP2WcCgEclBr7GEEajjPfpq1RjpeD8YisHlH9GXpbCiMBaEieml05ui1uB4Lo tpTL8pebfCVJlG73KO6rcwLDoPm9/6gi3iAHzwvoxEksVl9YgCnXBD4bq9MHuiVWODdF eCR87+C0tyCTdXt447Nb7atBSRNYHNcoFFZUcxXOUAwYkBtZ42yJqVctBqdD30iFSsXV QAc2GfaFI+EN22jYwLjIPY00nKjun9uXhVL9CJcvNcak5ufS9qpIkRxJK4oNiRH8SdL3 z8Wg== X-Gm-Message-State: AOJu0Yw9CFEufI06JgJuMGQRcps5lbJ8clCcpY9BdAhuInGOZmqtTbWZ EbglbqqfYcAG55KmUhhQFaX9AO77XLPIvmZ1k0gfd+7hkmUG2X9kZ4sdoG1Oul0= X-Gm-Gg: ASbGnctybgEEzYHk+To0bVZ9RoSd+UFkVOVHQncnVApv+dbrXb2bAoluqBqgKewUOHG ieLyG3pKcgbr/lcGtFKOiGKLBqvWv7nOJOkkFi0jXpq1oV3FliGqBC3Ha3NQgUIAyawCg2qbcnp bZdD9hq9BgEYDjvQ0tUBK+oKkg+WpmjSrttr3ZIjixvX3YnvU8znVplWiGMxsASce+XGoVfKrVF iXyj+YHviknjLVgiYE4P5My0jtpjSJkWB8TzqK+t9Tth7D7QEuh9+3Y3rqoBMus6OiB2w053AQI xMrIBncfNnCBi7p5QRZeoA/X+kDyeKdcIm/5wkqS3uh6ItzncsI= X-Google-Smtp-Source: AGHT+IFAFQA3tjy5BAduDPmdO5IlBp7dX054sr8O25yIC3amtZPTDyKqSezRYHnrvyAcm0lXWASlzA== X-Received: by 2002:a05:620a:430f:b0:7c5:57b2:2cb9 with SMTP id af79cd13be357-7c766455557mr365882985a.26.1743606270560; Wed, 02 Apr 2025 08:04:30 -0700 (PDT) MIME-Version: 1.0 Date: Wed, 02 Apr 2025 11:04:28 -0400 From: Alexander Merritt To: Andrew Cooper Cc: xen-devel@lists.xenproject.org, Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Subject: Re: [XEN PATCH 1/1] xen/x86: drop wrappers of SVM instructions In-Reply-To: <70d8d88d-63e1-4622-8b30-09ff2f0eff87@citrix.com> References: <034a5518e8dfde9ac707b494f5d863d78efec84e.1743601241.git.alexander@edera.dev> <70d8d88d-63e1-4622-8b30-09ff2f0eff87@citrix.com> Message-ID: <6e4cddefb40c953a684b7c4f343da225@edera.dev> X-Sender: alexander@edera.dev Organization: Edera Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit On 2025-04-02 10:56, Andrew Cooper wrote: > On 02/04/2025 3:54 pm, Alexander M. Merritt wrote: > I can fix both on commit if you're happy? > > ~Andrew Noted for future updates. Yes please go ahead. -Alex From xen-devel-bounces@lists.xenproject.org Wed Apr 02 15:35:47 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 15:35:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935947.1337302 (Exim 4.92) (envelope-from ) id 1u007w-0006B1-Ah; Wed, 02 Apr 2025 15:35:40 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935947.1337302; Wed, 02 Apr 2025 15:35:40 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u007w-0006Au-88; Wed, 02 Apr 2025 15:35:40 +0000 Received: by outflank-mailman (input) for mailman id 935947; Wed, 02 Apr 2025 15:35:38 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u007u-0006Ao-NE for xen-devel@lists.xenproject.org; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Apr 2025 15:35:31.1110 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 254c8433-8121-441c-7e01-08dd71fc008f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B071.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB7429 On 2025-04-01 20:03, Stefano Stabellini wrote: > On Mon, 31 Mar 2025, Jason Andryuk wrote: >> Add capabilities property to dom0less to allow building a >> disaggregated system. Only a single hardware domain and single xenstore >> domain can be specified. Multiple control domains are possible. >> >> Introduce bootfdt.h to contain these constants. >> >> When using the hardware or xenstore capabilities, adjust the grant and >> event channel limits similar to dom0. >> >> For a hardware domain, require an IOMMU and disallow specifying a vpl011 >> console or nr_spis. >> >> Signed-off-by: Jason Andryuk >> --- >> v2: >> Fix comment style >> Make DOMAIN_CAPS_* unsigned >> Remove forced directmap & iommu >> Require iommu with use of hardware domain >> Limit to a single xenstore domain >> >> There is overlap with hyperlaunch. The numeric values are the same. >> Hyperlaunch doesn't expose the values in a public header as done here. >> Is this to be expected for dom0less? It seems most of dom0less isn't in >> a header, but just in docs. >> >> Hyperlaunch uses BUILD_CAPS_, but I chose DOMAIN_CAPS_ since there are >> domain-level capabilities. >> >> Only a single xenstore and hardware domain make sense. Hardware domain >> receiving all hardware can only have a single domain. >> >> For Xenstore, the logic latches the single xs_domid and uses that for >> all domains. Also, only a single domain can register for VIRQ_DOM_EXC. >> --- >> @@ -1020,6 +1023,40 @@ void __init create_domUs(void) >> if ( (max_init_domid + 1) >= DOMID_FIRST_RESERVED ) >> panic("No more domain IDs available\n"); >> >> + if ( dt_property_read_u32(node, "capabilities", &val) ) >> + { >> + if ( val & ~DOMAIN_CAPS_MASK ) >> + panic("Invalid capabilities (%"PRIx32")\n", val); >> + >> + if ( val & DOMAIN_CAPS_CONTROL ) >> + flags |= CDF_privileged; >> + >> + if ( val & DOMAIN_CAPS_HARDWARE ) >> + { >> + if ( hardware_domain ) >> + panic("Only 1 hardware domain can be specified! (%pd)\n", >> + hardware_domain); >> + >> + if ( !iommu_enabled ) >> + panic("iommu required for dom0less hardware domain\n"); > > The panic is OK if "direct-map" is not specified. We need to check for > direct-map before panic'ing. Ok, I guess I misunderstood Julien's comment - I thought he wanted to require an iommu. I can re-work it. !direct-map && !iommu will panic. Any other combination of direct-map and iommu will be allowed. Hmmm, "passthrough" and "multiboot,device-tree" are essentially ignored for hwdom right now. I'll require them to be unset for hwdom. Regards, Jason From xen-devel-bounces@lists.xenproject.org Wed Apr 02 15:41:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 15:41:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935962.1337313 (Exim 4.92) (envelope-from ) id 1u00DO-00080U-1u; Wed, 02 Apr 2025 15:41:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935962.1337313; Wed, 02 Apr 2025 15:41:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u00DN-00080N-UR; Wed, 02 Apr 2025 15:41:17 +0000 Received: by outflank-mailman (input) for mailman id 935962; Wed, 02 Apr 2025 15:41:16 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u00DM-00080H-Ap for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 15:41:16 +0000 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id e7be4100-0fd8-11f0-9ea9-5ba50f476ded; Wed, 02 Apr 2025 17:41:14 +0200 (CEST) Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Apr 2025 08:41:11 -0700 Received: from johunt-mobl9.ger.corp.intel.com (HELO [10.124.222.41]) ([10.124.222.41]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Apr 2025 08:41:08 -0700 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: e7be4100-0fd8-11f0-9ea9-5ba50f476ded DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1743608474; x=1775144474; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=Y/O2DK5Lf6ey6Pfej1vFZZLi5jn02o1oRvHXFQ36iCQ=; b=DCWsLztWWH6mMAe3YyF6daSqgIXAHmar5AHhc64uXXhxpfPtwNSv1hnh W+lVZCj7MWMv/eWaNHVdYmImqRV1sLhEibuFvY2N38U5pJcT5JkV00k7D y44wZ95c5QPIg9dpcUFpiSJ07QVP8aeQJPfa937fLmxCGz57QfV+DPVrG 4/i5JFMBmpYlD4/lodJIhQXfC3fJmKmlhlYLgqhFRsBU39s1nXuZtjo12 XpwiQ2wB6HZU7BmJptqKNHUjCbQI6OrTn4WQpZKEh8jrogGshAqyDy9+E MHIcLti/7ovRRth5KVzQ9QzatKUXgM5hnHBD2PHcTNiiHE10oQd0yUWzG A==; X-CSE-ConnectionGUID: nr5s/BUfRBC/UwoQbmFGOA== X-CSE-MsgGUID: Sm1NmKgNTs67vbv2HMNuFA== X-IronPort-AV: E=McAfee;i="6700,10204,11392"; a="45106894" X-IronPort-AV: E=Sophos;i="6.15,182,1739865600"; d="scan'208";a="45106894" X-CSE-ConnectionGUID: zHDjNtvDTouroy5OyapFag== X-CSE-MsgGUID: S3MiKWOZRGuvNqyyZyUeaQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,182,1739865600"; d="scan'208";a="131603092" Message-ID: Date: Wed, 2 Apr 2025 08:41:07 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH v1 01/15] x86/msr: Replace __wrmsr() with native_wrmsrl() To: Xin Li , "H. Peter Anvin" , Ingo Molnar Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-edac@vger.kernel.org, kvm@vger.kernel.org, xen-devel@lists.xenproject.org, linux-ide@vger.kernel.org, linux-pm@vger.kernel.org, bpf@vger.kernel.org, llvm@lists.linux.dev, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com, peterz@infradead.org, acme@kernel.org, namhyung@kernel.org, mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org, irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com, wei.liu@kernel.org, ajay.kaher@broadcom.com, alexey.amakhalov@broadcom.com, bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com, pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com, luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com, haiyangz@microsoft.com, decui@microsoft.com References: <20250331082251.3171276-1-xin@zytor.com> <20250331082251.3171276-2-xin@zytor.com> <9D15DE81-2E68-4FCD-A133-4963602E18C9@zytor.com> From: Dave Hansen Content-Language: en-US Autocrypt: addr=dave.hansen@intel.com; keydata= xsFNBE6HMP0BEADIMA3XYkQfF3dwHlj58Yjsc4E5y5G67cfbt8dvaUq2fx1lR0K9h1bOI6fC oAiUXvGAOxPDsB/P6UEOISPpLl5IuYsSwAeZGkdQ5g6m1xq7AlDJQZddhr/1DC/nMVa/2BoY 2UnKuZuSBu7lgOE193+7Uks3416N2hTkyKUSNkduyoZ9F5twiBhxPJwPtn/wnch6n5RsoXsb ygOEDxLEsSk/7eyFycjE+btUtAWZtx+HseyaGfqkZK0Z9bT1lsaHecmB203xShwCPT49Blxz VOab8668QpaEOdLGhtvrVYVK7x4skyT3nGWcgDCl5/Vp3TWA4K+IofwvXzX2ON/Mj7aQwf5W iC+3nWC7q0uxKwwsddJ0Nu+dpA/UORQWa1NiAftEoSpk5+nUUi0WE+5DRm0H+TXKBWMGNCFn c6+EKg5zQaa8KqymHcOrSXNPmzJuXvDQ8uj2J8XuzCZfK4uy1+YdIr0yyEMI7mdh4KX50LO1 pmowEqDh7dLShTOif/7UtQYrzYq9cPnjU2ZW4qd5Qz2joSGTG9eCXLz5PRe5SqHxv6ljk8mb ApNuY7bOXO/A7T2j5RwXIlcmssqIjBcxsRRoIbpCwWWGjkYjzYCjgsNFL6rt4OL11OUF37wL QcTl7fbCGv53KfKPdYD5hcbguLKi/aCccJK18ZwNjFhqr4MliQARAQABzUVEYXZpZCBDaHJp c3RvcGhlciBIYW5zZW4gKEludGVsIFdvcmsgQWRkcmVzcykgPGRhdmUuaGFuc2VuQGludGVs LmNvbT7CwXgEEwECACIFAlQ+9J0CGwMGCwkIBwMCBhUIAgkKCwQWAgMBAh4BAheAAAoJEGg1 lTBwyZKwLZUP/0dnbhDc229u2u6WtK1s1cSd9WsflGXGagkR6liJ4um3XCfYWDHvIdkHYC1t MNcVHFBwmQkawxsYvgO8kXT3SaFZe4ISfB4K4CL2qp4JO+nJdlFUbZI7cz/Td9z8nHjMcWYF IQuTsWOLs/LBMTs+ANumibtw6UkiGVD3dfHJAOPNApjVr+M0P/lVmTeP8w0uVcd2syiaU5jB aht9CYATn+ytFGWZnBEEQFnqcibIaOrmoBLu2b3fKJEd8Jp7NHDSIdrvrMjYynmc6sZKUqH2 I1qOevaa8jUg7wlLJAWGfIqnu85kkqrVOkbNbk4TPub7VOqA6qG5GCNEIv6ZY7HLYd/vAkVY E8Plzq/NwLAuOWxvGrOl7OPuwVeR4hBDfcrNb990MFPpjGgACzAZyjdmYoMu8j3/MAEW4P0z F5+EYJAOZ+z212y1pchNNauehORXgjrNKsZwxwKpPY9qb84E3O9KYpwfATsqOoQ6tTgr+1BR CCwP712H+E9U5HJ0iibN/CDZFVPL1bRerHziuwuQuvE0qWg0+0SChFe9oq0KAwEkVs6ZDMB2 P16MieEEQ6StQRlvy2YBv80L1TMl3T90Bo1UUn6ARXEpcbFE0/aORH/jEXcRteb+vuik5UGY 5TsyLYdPur3TXm7XDBdmmyQVJjnJKYK9AQxj95KlXLVO38lczsFNBFRjzmoBEACyAxbvUEhd GDGNg0JhDdezyTdN8C9BFsdxyTLnSH31NRiyp1QtuxvcqGZjb2trDVuCbIzRrgMZLVgo3upr MIOx1CXEgmn23Zhh0EpdVHM8IKx9Z7V0r+rrpRWFE8/wQZngKYVi49PGoZj50ZEifEJ5qn/H Nsp2+Y+bTUjDdgWMATg9DiFMyv8fvoqgNsNyrrZTnSgoLzdxr89FGHZCoSoAK8gfgFHuO54B lI8QOfPDG9WDPJ66HCodjTlBEr/Cwq6GruxS5i2Y33YVqxvFvDa1tUtl+iJ2SWKS9kCai2DR 3BwVONJEYSDQaven/EHMlY1q8Vln3lGPsS11vSUK3QcNJjmrgYxH5KsVsf6PNRj9mp8Z1kIG qjRx08+nnyStWC0gZH6NrYyS9rpqH3j+hA2WcI7De51L4Rv9pFwzp161mvtc6eC/GxaiUGuH BNAVP0PY0fqvIC68p3rLIAW3f97uv4ce2RSQ7LbsPsimOeCo/5vgS6YQsj83E+AipPr09Caj 0hloj+hFoqiticNpmsxdWKoOsV0PftcQvBCCYuhKbZV9s5hjt9qn8CE86A5g5KqDf83Fxqm/ vXKgHNFHE5zgXGZnrmaf6resQzbvJHO0Fb0CcIohzrpPaL3YepcLDoCCgElGMGQjdCcSQ+Ci FCRl0Bvyj1YZUql+ZkptgGjikQARAQABwsFfBBgBAgAJBQJUY85qAhsMAAoJEGg1lTBwyZKw l4IQAIKHs/9po4spZDFyfDjunimEhVHqlUt7ggR1Hsl/tkvTSze8pI1P6dGp2XW6AnH1iayn yRcoyT0ZJ+Zmm4xAH1zqKjWplzqdb/dO28qk0bPso8+1oPO8oDhLm1+tY+cOvufXkBTm+whm +AyNTjaCRt6aSMnA/QHVGSJ8grrTJCoACVNhnXg/R0g90g8iV8Q+IBZyDkG0tBThaDdw1B2l asInUTeb9EiVfL/Zjdg5VWiF9LL7iS+9hTeVdR09vThQ/DhVbCNxVk+DtyBHsjOKifrVsYep WpRGBIAu3bK8eXtyvrw1igWTNs2wazJ71+0z2jMzbclKAyRHKU9JdN6Hkkgr2nPb561yjcB8 sIq1pFXKyO+nKy6SZYxOvHxCcjk2fkw6UmPU6/j/nQlj2lfOAgNVKuDLothIxzi8pndB8Jju KktE5HJqUUMXePkAYIxEQ0mMc8Po7tuXdejgPMwgP7x65xtfEqI0RuzbUioFltsp1jUaRwQZ MTsCeQDdjpgHsj+P2ZDeEKCbma4m6Ez/YWs4+zDm1X8uZDkZcfQlD9NldbKDJEXLIjYWo1PH hYepSffIWPyvBMBTW2W5FRjJ4vLRrJSUoEfJuPQ3vW9Y73foyo/qFoURHO48AinGPZ7PC7TF vUaNOTjKedrqHkaOcqB185ahG2had0xnFsDPlx5y In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 3/31/25 22:53, Xin Li wrote: > Per "struct msr" defined in arch/x86/include/asm/shared/msr.h: > > struct msr { >         union { >                 struct { >                         u32 l; >                         u32 h; >                 }; >                 u64 q; >         }; > }; > > Probably *msrq() is what we want? What would folks think about "wrmsr64()"? It's writing a 64-bit value to an MSR and there are a lot of functions in the kernel that are named with the argument width in bits. From xen-devel-bounces@lists.xenproject.org Wed Apr 02 15:57:54 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 15:57:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935980.1337322 (Exim 4.92) (envelope-from ) id 1u00TG-0003Zr-Bm; Wed, 02 Apr 2025 15:57:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935980.1337322; Wed, 02 Apr 2025 15:57:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u00TG-0003Zk-9J; Wed, 02 Apr 2025 15:57:42 +0000 Received: by outflank-mailman (input) for mailman id 935980; Wed, 02 Apr 2025 15:57:40 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u00TD-0003Ze-VL for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 15:57:40 +0000 Received: from mail.zytor.com (unknown [2607:7c80:54:3::138]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 31b612d0-0fdb-11f0-9ffb-bf95429c2676; Wed, 02 Apr 2025 17:57:36 +0200 (CEST) Received: from [127.0.0.1] ([76.133.66.138]) (authenticated bits=0) by mail.zytor.com (8.18.1/8.17.1) with ESMTPSA id 532FutGe095148 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NO); Wed, 2 Apr 2025 08:56:56 -0700 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 31b612d0-0fdb-11f0-9ffb-bf95429c2676 DKIM-Filter: OpenDKIM Filter v2.11.0 mail.zytor.com 532FutGe095148 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=zytor.com; s=2025032001; t=1743609418; bh=Xa25b++XKImzKTw5z/38OkUO4BtW0ZFRs8vcKJg4Ci0=; h=Date:From:To:CC:Subject:In-Reply-To:References:From; b=PKY9pYPRwrzTz3T2wfMHzO5CxQTclyrXpopuE633CLIfZy/ukPrGJisoGqNXqtKGR Kwz413hdEtK5pBXselQWUxDFcZNypXyGZdI8G30/DwRJXDsP4zWDSJB/AE9/Rxd+2y UpqxkHxOPXPWmGYI+FJgvcCaL46+fNbgfHJ0c/b1wjVyQCE2qT0M/ZA7JLtTSrk+kH ZmVpsuIPE4MYWvvrXrlGIXqvQJY0mfJeR5VLbutwJ29pIU+n402Afr0HUdg174buI6 LnlSkpy+WJQiHzFkU9vzRc2V7DoFNa6OrQ/gdWEEYK97M+97vAsoAKJUgXaK8+OFNg pTT1Aq8YFeE0Q== Date: Wed, 02 Apr 2025 08:56:55 -0700 From: "H. Peter Anvin" To: Dave Hansen , Xin Li , Ingo Molnar CC: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-edac@vger.kernel.org, kvm@vger.kernel.org, xen-devel@lists.xenproject.org, linux-ide@vger.kernel.org, linux-pm@vger.kernel.org, bpf@vger.kernel.org, llvm@lists.linux.dev, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com, peterz@infradead.org, acme@kernel.org, namhyung@kernel.org, mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org, irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com, wei.liu@kernel.org, ajay.kaher@broadcom.com, alexey.amakhalov@broadcom.com, bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com, pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com, luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com, haiyangz@microsoft.com, decui@microsoft.com Subject: =?US-ASCII?Q?Re=3A_=5BRFC_PATCH_v1_01/15=5D_x86/msr=3A_Re?= =?US-ASCII?Q?place_=5F=5Fwrmsr=28=29_with_native=5Fwrmsrl=28=29?= User-Agent: K-9 Mail for Android In-Reply-To: References: <20250331082251.3171276-1-xin@zytor.com> <20250331082251.3171276-2-xin@zytor.com> <9D15DE81-2E68-4FCD-A133-4963602E18C9@zytor.com> Message-ID: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On April 2, 2025 8:41:07 AM PDT, Dave Hansen wr= ote: >On 3/31/25 22:53, Xin Li wrote: >> Per "struct msr" defined in arch/x86/include/asm/shared/msr=2Eh: >>=20 >> struct msr { >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 union { >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0 struct { >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 u32 l= ; >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 u32 h= ; >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0 }; >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0 u64 q; >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 }; >> }; >>=20 >> Probably *msrq() is what we want? > >What would folks think about "wrmsr64()"? It's writing a 64-bit value to >an MSR and there are a lot of functions in the kernel that are named >with the argument width in bits=2E Personally, I hate the extra verbosity, mostly visual, since numerals are = nearly as prominent as capital letters they tend to attract the eye=2E Ther= e is a reason why they aren't used this way in assembly languages=2E From xen-devel-bounces@lists.xenproject.org Wed Apr 02 16:01:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 16:01:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.935990.1337332 (Exim 4.92) (envelope-from ) id 1u00We-00062O-QV; Wed, 02 Apr 2025 16:01:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 935990.1337332; Wed, 02 Apr 2025 16:01:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u00We-00062H-Nk; Wed, 02 Apr 2025 16:01:12 +0000 Received: by outflank-mailman (input) for mailman id 935990; Wed, 02 Apr 2025 16:01:10 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u00Wc-00062B-R7 for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 16:01:10 +0000 Received: from mail-wr1-x436.google.com (mail-wr1-x436.google.com [2a00:1450:4864:20::436]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id b0a8cca5-0fdb-11f0-9ffb-bf95429c2676; Wed, 02 Apr 2025 18:01:08 +0200 (CEST) Received: by mail-wr1-x436.google.com with SMTP id ffacd0b85a97d-39ac9aea656so5664705f8f.3 for ; Wed, 02 Apr 2025 09:01:08 -0700 (PDT) Received: from [192.168.1.183] (host-92-26-98-202.as13285.net. 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Wed, 02 Apr 2025 09:01:07 -0700 (PDT) Message-ID: <98c3fe8e-9965-45a0-85e7-f6064f16c575@citrix.com> Date: Wed, 2 Apr 2025 17:01:06 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: New Defects reported by Coverity Scan for XenProject To: Jan Beulich , "xen-devel@lists.xenproject.org" References: <67ed34047fd3c_1209992cc92a0f99a0989e0@prd-scan-dashboard-0.mail> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 02/04/2025 3:19 pm, Jan Beulich wrote: > On 02.04.2025 14:56, scan-admin@coverity.com wrote: >> ** CID 1645573: Null pointer dereferences (FORWARD_NULL) >> >> >> ________________________________________________________________________________________________________ >> *** CID 1645573: Null pointer dereferences (FORWARD_NULL) >> /xen/arch/x86/mm/p2m.c: 346 in get_page_from_mfn_and_type() >> 340 >> 341 if ( p2m_is_ram(t) ) >> 342 { >> 343 if ( p2m_is_shared(t) ) >> 344 d = dom_cow; >> 345 >>>>> CID 1645573: Null pointer dereferences (FORWARD_NULL) >>>>> Passing null pointer "d" to "get_page", which dereferences it. >> 346 if ( get_page(page, d) ) >> 347 return page; >> 348 } > I wonder how the tool concludes d is NULL. The only vague guess I could come > up with is that it checks a MEM_SHARING=n build, where dom_cow is always > NULL. Yet in such a build p2m_shared() is also always false. Should we perhaps > help it by forcing P2M_SHARED_TYPES (maybe also P2M_SHARABLE_TYPES) to 0 when > MEM_SHARING=n? We do such already for MEM_PAGING=n ... What's in the web UI but missing from the email is: 343        if ( p2m_is_shared(t) )       4. assign_zero: Assigning: d = NULL. 344            d = dom_cow; 345       CID 1645573: (#1 of 1): Explicit null dereferenced (FORWARD_NULL) 5. var_deref_model: Passing null pointer d to get_page, which dereferences it.[show details] 346        if ( get_page(page, d) ) 347            return page; So it's definitely running a CONFIG_MEM_SHARING=n build, with some logic that doesn't DCE properly. I think we'd have a better time if dom_cow remained a dangling extern, but I expect it's NULL because it doesn't DCE properly. ~Andrew From xen-devel-bounces@lists.xenproject.org Wed Apr 02 19:45:20 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 19:45:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936032.1337375 (Exim 4.92) (envelope-from ) id 1u041I-0006rq-HF; Wed, 02 Apr 2025 19:45:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936032.1337375; Wed, 02 Apr 2025 19:45:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u041I-0006rg-CF; Wed, 02 Apr 2025 19:45:04 +0000 Received: by outflank-mailman (input) for mailman id 936032; Wed, 02 Apr 2025 19:45:03 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u041H-0006rI-F8 for xen-devel@lists.xenproject.org; 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Smith" References: <20241226165740.29812-1-dpsmith@apertussolutions.com> <20241226165740.29812-7-dpsmith@apertussolutions.com> <004b066a-b26f-44bd-994f-5c573f6511e6@suse.com> <847a0afa-05bd-4f33-b07c-d9d69b9198ae@amd.com> <9e3f962a-a45b-4dba-b204-b9f6acae30ec@suse.com> Content-Language: en-US From: Jason Andryuk In-Reply-To: <9e3f962a-a45b-4dba-b204-b9f6acae30ec@suse.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: None (SATLEXMB03.amd.com: jason.andryuk@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF00003F64:EE_|CH2PR12MB4216:EE_ X-MS-Office365-Filtering-Correlation-Id: 7971bac2-a61e-4f6f-7b97-08dd721ed703 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|376014|36860700013; X-Microsoft-Antispam-Message-Info: =?utf-8?B?YVlHVVFaVVF2bDVac2tjOERXSjMwbWpOaU84QUV0dEJyTmtoOFBUdzVETWds?= =?utf-8?B?em5zd3FUMlpBYXRQeC9MYnQxRWJjcmZVRi9HVVJkQ29yczFhQTltVGN3bWs4?= =?utf-8?B?NzlwTUU1T2Q1dWQ3T3ZtbjRRWTV3Tm1hWDJwSzdCYldXTFBBTzdpWVI5QW1u?= =?utf-8?B?bXFHV0MxWVUzWlZoWGxRTjU3bzRjcVpOM3lDNUZiWENpemR0RWV6dWUzV1NK?= =?utf-8?B?WUJGbGtLT2VxQTBNT1VSRDRCTThMNlU3cXFwekpUamhGeCtZRkI1MTdndnYr?= =?utf-8?B?bDEwVHhqNGg2VXB5dndzNHJvTWtFUzArdE9yOFU5TmtCQ0F1S0hQVGVnbFRP?= =?utf-8?B?YkNWTENFZ0l4blBuQWhHUEVyK1JKMGhkMnNrL0tNR0dZNWJkSXlCMFZyV1pY?= =?utf-8?B?QUZnbzRkK0hSaGhZUVJQMFp0R2ZBNTl0bmNzZVpwNUNmK1MzdGI3blBCaCsw?= =?utf-8?B?RGtNbXJTcWp2Y29uZHhERk96YnNwaStacllFVVI1TjN1RnhONHR0Y2hYaDIv?= =?utf-8?B?V0NnV0orZTA2cCttT3N6a0syUXphTGpWemFBZ0FscUZERnZaa2EyaHR0cU9E?= =?utf-8?B?K3BSS2NOLzhUTjB4NzRBbEt5cyt0bG41cnpCRjM5eklaaUZYZXIyQmFpTHpy?= =?utf-8?B?UlkyOWM2R0hNWmlSV3BVUkV0M0UwbzZsOWZtRytVWWl2QzNWTVFKeEhFQ1dM?= =?utf-8?B?T1pkaVZ6OWg0YzJRODZQeUJicExqaUxiMjZkSVpuTThDQk15UU94ZmlKTGJj?= =?utf-8?B?VFpacHJPY3VoajJUR3IrZU1OT1BLYXUxT2VFTXJzRTZCQWQ5SVpZdzZKNDEz?= =?utf-8?B?UGpsQ041UW5mcDZjYjdMalRzOFY5QXpycWZZUlBOdmdkSUFIVTVoRE5FeXFj?= =?utf-8?B?REVnVVFGcGhoNmUveG9UbjlGTk1jbUdVaXl0VzVlZVlKWFZkb1IwSFAvS2wr?= =?utf-8?B?V1RlZ1FyUFhGc00yUmc3VFZ4RXF3Y1dXQ1ZtUG5idzhrcG1EN2J4a1UyVHBD?= =?utf-8?B?S2YxMUZaM0sya3hJdi9EeUNoMHQ3N2hRalRPdjAzUmVXQTZuaXlPSEdkUmpw?= =?utf-8?B?VHk1eS82YXFlOEx3dlBGdWZPUDdrRWRNZmw2RHZLZjZmdlJCRWF5eTh1TW01?= =?utf-8?B?cjZraTRralA5K3JwdW5TbnBXMGpxYmZ6bXlhVGZqMlF0Q0lIWjNMMzQ3QnRI?= =?utf-8?B?VEhlNUpVWklkZmJtdzVLK25QZ1M5bGU1b09oYUxENzF0ZEFweWdZdk4xQ0VE?= =?utf-8?B?aVcxK2JVZ1ZFdjRlUXN0by9JT3lEY2I2NUpyNHVkaWQ0VFZpTlBXdVZ4VW9a?= =?utf-8?B?L0ovNHE1OEJ3b1dKRkUvTEQ0Ynljd00yYm1HbzJ6dTlzZ29FaVY1aTVGbnVN?= =?utf-8?B?V1hIQXVhU1hQQlNDS0J6V3NpZEU2aWZFQVdDcW1LKzNhcUMyalloYnlGR2Fs?= =?utf-8?B?MHllNUJzVFd2dlF3NFdFVnpPbFc3dlljRW4wKzVWbDl2a0lrVmpWNEp2cnV5?= =?utf-8?B?T0F2cUppQnp0RXJIM0lkL1Q1enFJRmtTbEpUekNBUExEam5EakZWYjVzZHFq?= =?utf-8?B?OFM0ajR5M3J1a0ZOY0dLdE1KTUFxWlFaTXNrSmhqdHNvRlpoZnoxT2pyeDhK?= =?utf-8?B?SGNjSTZaemJqUVNGdXpOUFdJb29ycUhPMVNPMFRCWWxNcjNCd3pXMUxvUEo4?= =?utf-8?B?anhldWJYNzJlV2dEM3pVcDU1RWpzN3MyemhjUnpqV0gya0JNamVhYjhoekhl?= =?utf-8?B?Mnp3eXNzeCtmeXJ3dnpVYktNQ1FxVDhlKzNLODNXTi90SGY3M1dxRXFLUkll?= =?utf-8?B?cVFjQXVmejZQVitXeVVQdUVNMjR1RXFub1Q4SDhJeGtjSGtTa2I1QUZEUHBp?= =?utf-8?B?cVJ5a25kZW1CdWEwdTJoc2pYa1RTRFJxc0FDMGhEYmZrYVUvMkxLdEJnT3Vp?= =?utf-8?B?NW01ZWlkRmkrMzl4UXJxL3oyVlZrYUtPaS9sZ0RnODBhUERFV082MXlKTis0?= =?utf-8?Q?VLLRlsSdt9YcbQMIoYdrUsRKfMRA1o=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(376014)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Apr 2025 19:44:53.7768 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7971bac2-a61e-4f6f-7b97-08dd721ed703 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00003F64.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4216 On 2025-04-02 05:25, Jan Beulich wrote: > On 01.04.2025 20:01, Jason Andryuk wrote: >> On 2025-01-30 09:52, Jan Beulich wrote: >>> On 26.12.2024 17:57, Daniel P. Smith wrote: >>>> --- a/xen/arch/x86/Makefile >>>> +++ b/xen/arch/x86/Makefile >>>> @@ -81,6 +81,8 @@ obj-$(CONFIG_COMPAT) += x86_64/platform_hypercall.o >>>> obj-y += sysctl.o >>>> endif >>>> >>>> +obj-y += domain-builder/ >>> >>> The set of subdirs needed in $(obj-y) is specified at the top of the file. >>> Also shouldn't this be obj-$(CONFIG_DOMAIN_BUILDER)? >> >> Later, all boot-time domain building is handled by >> domain-builder/core.c. So some of domain-builder/ is always built, and >> Kconfig disables multidomain support. > > Then CONFIG_DOMAIN_BUILDER is a misnomer? Dan also adds CONFIG_MULTIDOMAIN_BUILDER later... which is used only for: - BUG_ON(!pv_shim && d->domain_id != 0); + if ( ! IS_ENABLED(CONFIG_MULTIDOMAIN_BUILDER) ) + BUG_ON(!pv_shim && d->domain_id != 0); :( I thought it at least restricted the size of the boot domains array. -Jason From xen-devel-bounces@lists.xenproject.org Wed Apr 02 21:09:42 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 21:09:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936066.1337384 (Exim 4.92) (envelope-from ) id 1u05Kz-0000Dv-Ap; Wed, 02 Apr 2025 21:09:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936066.1337384; Wed, 02 Apr 2025 21:09:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u05Kz-0000Do-6j; Wed, 02 Apr 2025 21:09:29 +0000 Received: by outflank-mailman (input) for mailman id 936066; Wed, 02 Apr 2025 21:09:27 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u05Kx-0000Di-8d for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 21:09:27 +0000 Received: from sea.source.kernel.org (sea.source.kernel.org [2600:3c0a:e001:78e:0:1991:8:25]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id c1132ec0-1006-11f0-9eaa-5ba50f476ded; Wed, 02 Apr 2025 23:09:25 +0200 (CEST) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id E94A5443FF; Wed, 2 Apr 2025 21:09:22 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id A165DC4CEDD; Wed, 2 Apr 2025 21:09:22 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: c1132ec0-1006-11f0-9eaa-5ba50f476ded DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743628163; bh=LeuFIcu9sOgRcgqhLY+HpJHhnhovo3qkAvw7E1i2XAk=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=WjSSlkJZfxjQ03ROkOAtZD5h+C/AQA1TI/41929IRrcNEzpSpy2tsMn5tYQU7WM4G G2kzLbRUO2Ho98kSbPpmwjtleCA5hARLJlM2v6ppBKySfr5Prir3sAhKdfTwj4oKG6 2YTUQni92cXYerAZUSuI8bX56K1Nb2l12Z6f9Bo9XaFASe1Wwb8oidAGwcwX9GlTQQ GVusvqdwp/FEM6pR3H2E6iL6RxWD6DcG9csCKBwoKLI7lr6fCKyJ554VKiV3X+Adct FuuMOc5mBsp1FnwrhWw46cTKV5RhP3u7dwPf/X3CDthntmmaDuOi50JQImCAJZVTHz AZKJos4oQBoBg== Date: Wed, 2 Apr 2025 14:09:21 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Nicola Vetrini cc: "Kwon, Gihwan" , xen-devel@lists.xenproject.org, Stefano Stabellini , stewart.hildebrand@amd.com Subject: Re: [QUESTION] Minimal Xen Configuration In-Reply-To: Message-ID: References: User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Wed, 2 Apr 2025, Nicola Vetrini wrote: > On 2025-03-28 07:43, Kwon, Gihwan wrote: > > Dear Xen Community, > > > > I hope this message finds you well. > > > > I have heard that there exists a minimal Xen configuration optimized for > > safety-critical products, particularly in automotive applications, with the > > code size reduced to approximately 50k SLOC. > > > > Could anyone provide guidance or point me to relevant resources regarding > > this minimal Xen configuration? Any insights or references would be greatly > > appreciated. > > > > Thank you in advance for your assistance. > > > > Best regards, > > Gihwan Kwon > > Hello, > > I am part of the team that provides static analysis for Xen, mainly towards > the objective to make Xen compliant with MISRA C guidelines. As part of that > effort, a minimal Xen configuration has been defined (for Arm and x86_64) at > [1], which is the one currently analyzed for static analysis for each commit > [2]. It starts from the default configuration for the architecture (i.e., make > defconfig) and then turns on or off various Kconfig options, as specified by > EXTRA_XEN_CONFIG. > > @Stefano Stabellini (Cc'ed) is the main driving force behind the Xen > certification effort for automotive, therefore he's probably the best person > to approach to get more information on this matter. Thanks Nicola. In addition to what Nicola wrote, there is an outstanding activity to further reduce the code size by adding more kconfig options. There are a couple of patch series on the list right now to that effect. https://marc.info/?l=xen-devel&m=173745442831026 Last year we ran some experiments and for ARM we should be able to go below 35K LOC. The tools measuring LOC are very imprecise as they do not account for #ifdefs and kconfig options. So we switched to text binary size for measurements as it is more accurate. do not account for kconfig options and #ifdefs. Hence, we switch to using text size as size measurement for Xen. One of the figure was XXX. From xen-devel-bounces@lists.xenproject.org Wed Apr 02 21:44:31 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 21:44:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936078.1337393 (Exim 4.92) (envelope-from ) id 1u05sm-0001KC-Pj; Wed, 02 Apr 2025 21:44:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936078.1337393; Wed, 02 Apr 2025 21:44:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u05sm-0001K5-Mw; Wed, 02 Apr 2025 21:44:24 +0000 Received: by outflank-mailman (input) for mailman id 936078; Wed, 02 Apr 2025 21:44:23 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u05sk-0001Jz-PN for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 21:44:23 +0000 Received: from mail-10628.protonmail.ch (mail-10628.protonmail.ch [79.135.106.28]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id a29c0901-100b-11f0-9eaa-5ba50f476ded; Wed, 02 Apr 2025 23:44:20 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: a29c0901-100b-11f0-9eaa-5ba50f476ded DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=proton.me; s=s3n67ongsnhqzjj3s2c2zfm2xi.protonmail; t=1743630259; x=1743889459; bh=TmNqU07uPQxkM/ghHUkY6N16icK4s+P0Dzt381klIEE=; h=Date:To:From:Cc:Subject:Message-ID:Feedback-ID:From:To:Cc:Date: Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector: List-Unsubscribe:List-Unsubscribe-Post; b=DF35QvxR8Ta+vpy+n5bFioraPiC9X4x0qiBbh2gZflxNRapBHC3gdc9cdv6KLboC+ xdKa7U/tKTGph20AlVUXysBg+TTFGZYK83/QWkOGF2b6PVKEXBwAPur2C2fwNq8Ivk XOAD4zNbZBVnu108lEJWsur+I4gvpZUYoNiqnznvpStR3BJ1Duxs/sfbgLfHzLsFRE SA1FzAnP+Gep4eG7BuqcMLMks8i5tz+iLO7HSBXhAFmcqDeRHEvETyAZRwnpbmYs6/ eEcBBxZGgmnGo9WNSQrP3HSevC65KTCPa3pm1VwUlIvQzeQpIs+AFpN5oi8+GjGWdB qy1QeuXdRIKdw== Date: Wed, 02 Apr 2025 21:44:15 +0000 To: xen-devel@lists.xenproject.org From: dmkhn@proton.me Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com Subject: [PATCH v3] x86/domain: revisit logging in arch_domain_create() Message-ID: <20250402214406.115578-1-dmukhin@ford.com> Feedback-ID: 123220910:user:proton X-Pm-Message-ID: f26cd1a4b7aed4d217898d2b7dc24fa33d658f8c MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable From: Denis Mukhin Use %pd in all logs issued from arch_domain_create(). Also, expand error message in arch_domain_create() under !emulation_flags_ok() case to help debugging. Signed-off-by: Denis Mukhin --- Changes since v2: - dropped full stops in the updated log messages --- xen/arch/x86/domain.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index 4989600627..4ae1344cf5 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -791,13 +791,12 @@ int arch_domain_create(struct domain *d, { if ( !opt_allow_unsafe ) { - printk(XENLOG_G_ERR "Xen does not allow DomU creation on this = CPU" - " for security reasons.\n"); + printk(XENLOG_G_ERR "%pd: Xen does not allow DomU creation on = this CPU" + " for security reasons\n", d); return -EPERM; } printk(XENLOG_G_WARNING - "Dom%d may compromise security on this CPU.\n", - d->domain_id); + "%pd: domain may compromise security on this CPU\n", d); } =20 emflags =3D config->arch.emulation_flags; @@ -807,16 +806,19 @@ int arch_domain_create(struct domain *d, =20 if ( emflags & ~XEN_X86_EMU_ALL ) { - printk(XENLOG_G_ERR "d%d: Invalid emulation bitmap: %#x\n", - d->domain_id, emflags); + printk(XENLOG_G_ERR "%pd: Invalid emulation bitmap: %#x\n", + d, emflags); return -EINVAL; } =20 if ( !emulation_flags_ok(d, emflags) ) { - printk(XENLOG_G_ERR "d%d: Xen does not allow %s domain creation " + printk(XENLOG_G_ERR "%pd: Xen does not allow %s %sdomain creation = " "with the current selection of emulators: %#x\n", - d->domain_id, is_hvm_domain(d) ? "HVM" : "PV", emflags); + d, + is_hvm_domain(d) ? "HVM" : "PV", + is_hardware_domain(d) ? "hardware " : "", + emflags); return -EOPNOTSUPP; } d->arch.emulation_flags =3D emflags; --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Wed Apr 02 21:46:04 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 21:46:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936089.1337403 (Exim 4.92) (envelope-from ) id 1u05uN-0001q2-3a; Wed, 02 Apr 2025 21:46:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936089.1337403; Wed, 02 Apr 2025 21:46:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u05uN-0001pv-0J; Wed, 02 Apr 2025 21:46:03 +0000 Received: by outflank-mailman (input) for mailman id 936089; Wed, 02 Apr 2025 21:46:02 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u05uM-0001ph-Hy for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 21:46:02 +0000 Received: from mail-4316.protonmail.ch (mail-4316.protonmail.ch [185.70.43.16]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id dea41218-100b-11f0-9eaa-5ba50f476ded; Wed, 02 Apr 2025 23:46:01 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: dea41218-100b-11f0-9eaa-5ba50f476ded DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=proton.me; s=protonmail; t=1743630360; x=1743889560; bh=2O1kGMLaTlLl5JHSdR5zf6l3ThcyTHn9xa2ox9FZA50=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector:List-Unsubscribe:List-Unsubscribe-Post; b=SkNShEUeG3iQS9fKVhudWpT2j0pY4umPzcNfyDOuWZFi9McMmLe/3qrbfP9dzF/0q QuwMCkSG3WdLHEazhCMfIGFQATekCEmuvZft7AQoky7vAqUeoabNsWERwgqit7BVs3 fWA95QHSm2wViukilhKqQsC2T7s0mqvKToA28En6mSe1BaSD9vXOFshUOoGYiF3GLh W9NQ1fehI70yhiSSL7pg+G+KaN/t8CMT/Z/fYoItAmXJwvPUU2D5gdjSdhpGw7s9iO HyTrT1HVYBvmIyE2CFknBxZNdME1nhVlNn85HjXURvmiIewBu+Gzf648oCC7XAdDud UVvh6ooU6Q/PA== Date: Wed, 02 Apr 2025 21:45:56 +0000 To: xen-devel@lists.xenproject.org From: Denis Mukhin Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com Subject: Re: [PATCH v2] x86/domain: revisit logging in arch_domain_create() Message-ID: In-Reply-To: <20250401211018.75814-1-dmukhin@ford.com> References: <20250401211018.75814-1-dmukhin@ford.com> Feedback-ID: 123220910:user:proton X-Pm-Message-ID: 7e16880c56190518ec26e337f7ad9041e2850b27 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On Tuesday, April 1st, 2025 at 2:10 PM, dmkhn@proton.me w= rote: >=20 >=20 > From: Denis Mukhin dmukhin@ford.com >=20 >=20 > Use %pd in all logs issued from arch_domain_create(). >=20 > Also, expand error message in arch_domain_create() under > !emulation_flags_ok() case to help debugging. >=20 > Signed-off-by: Denis Mukhin dmukhin@ford.com >=20 > --- > Changes since v1: > - dropped parentheses around "hardware" in the log message > --- > xen/arch/x86/domain.c | 18 ++++++++++-------- > 1 file changed, 10 insertions(+), 8 deletions(-) >=20 > diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c > index 4989600627..bd887b4d44 100644 > --- a/xen/arch/x86/domain.c > +++ b/xen/arch/x86/domain.c > @@ -791,13 +791,12 @@ int arch_domain_create(struct domain *d, > { > if ( !opt_allow_unsafe ) > { > - printk(XENLOG_G_ERR "Xen does not allow DomU creation on this CPU" > - " for security reasons.\n"); > + printk(XENLOG_G_ERR "%pd: Xen does not allow DomU creation on this CPU" > + " for security reasons.\n", d); Forgot to remove full stops in the messages. Sent v3: https://lore.kernel.org/xen-devel/20250402214406.115578-1-dmukhin@ford.co= m/ > return -EPERM; > } > printk(XENLOG_G_WARNING > - "Dom%d may compromise security on this CPU.\n", > - d->domain_id); >=20 > + "%pd: domain may compromise security on this CPU.\n", d); > } >=20 > emflags =3D config->arch.emulation_flags; >=20 > @@ -807,16 +806,19 @@ int arch_domain_create(struct domain *d, >=20 > if ( emflags & ~XEN_X86_EMU_ALL ) > { > - printk(XENLOG_G_ERR "d%d: Invalid emulation bitmap: %#x\n", > - d->domain_id, emflags); >=20 > + printk(XENLOG_G_ERR "%pd: Invalid emulation bitmap: %#x\n", > + d, emflags); > return -EINVAL; > } >=20 > if ( !emulation_flags_ok(d, emflags) ) > { > - printk(XENLOG_G_ERR "d%d: Xen does not allow %s domain creation " > + printk(XENLOG_G_ERR "%pd: Xen does not allow %s %sdomain creation " > "with the current selection of emulators: %#x\n", > - d->domain_id, is_hvm_domain(d) ? "HVM" : "PV", emflags); >=20 > + d, > + is_hvm_domain(d) ? "HVM" : "PV", > + is_hardware_domain(d) ? "hardware " : "", > + emflags); > return -EOPNOTSUPP; > } > d->arch.emulation_flags =3D emflags; >=20 > -- > 2.34.1 From xen-devel-bounces@lists.xenproject.org Wed Apr 02 21:49:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 21:49:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936102.1337413 (Exim 4.92) (envelope-from ) id 1u05xa-0002Qd-IA; Wed, 02 Apr 2025 21:49:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936102.1337413; Wed, 02 Apr 2025 21:49:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u05xa-0002QW-Fg; Wed, 02 Apr 2025 21:49:22 +0000 Received: by outflank-mailman (input) for mailman id 936102; Wed, 02 Apr 2025 21:49:21 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u05xZ-0002QQ-CX for xen-devel@lists.xenproject.org; Wed, 02 Apr 2025 21:49:21 +0000 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 545b55ab-100c-11f0-9eaa-5ba50f476ded; Wed, 02 Apr 2025 23:49:20 +0200 (CEST) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id E4E485C689D; Wed, 2 Apr 2025 21:47:00 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id DE808C4CEDD; Wed, 2 Apr 2025 21:49:15 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 545b55ab-100c-11f0-9eaa-5ba50f476ded DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743630557; bh=ecnnbyPtWEqCBgoLWsWF93nY7KLOkv/2yxHzkcCVAOI=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=bgeGGNqE4NEi3SMx+onifC4Eebo2I0zctFzuQB7RbC8zPHmCHMP+SrnN9Tz5RwpKA 7S4hmVJAOpd9km7zJbWRfAzvQzZ2i7pEdZNobvrg+7o9BmtcdVR6flyi0KBzV9JBP1 CCkpoH6Q7xkOtDlTV3BUl1pdyN4nCmYqUBbKhRB1Q57j7XnWk7N+o1sUW5GqEMDCaP eSBd2PE1b2Q581iBKsO2wSRXutQL7FLMv+RyWhj6KfYQnVkyp+ma3+KPfBZSad5GWf JM4RPIrp7r4kdxNahG2wTK2Y0CASa9pi8Aj0rRtLqPxbrLaVC9oafK1NAMOBRdsPfy iyWSMPrYEbVYA== Date: Wed, 2 Apr 2025 14:49:14 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jason Andryuk cc: Stefano Stabellini , xen-devel@lists.xenproject.org, Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Subject: Re: [PATCH v2 6/6] xen/arm: Add capabilities to dom0less In-Reply-To: <0d36750a-34d2-460b-a021-5afb7c2e7039@amd.com> Message-ID: References: <20250331214321.205331-1-jason.andryuk@amd.com> <20250331214321.205331-7-jason.andryuk@amd.com> <0d36750a-34d2-460b-a021-5afb7c2e7039@amd.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Wed, 2 Apr 2025, Jason Andryuk wrote: > On 2025-04-01 20:03, Stefano Stabellini wrote: > > On Mon, 31 Mar 2025, Jason Andryuk wrote: > > > Add capabilities property to dom0less to allow building a > > > disaggregated system. Only a single hardware domain and single xenstore > > > domain can be specified. Multiple control domains are possible. > > > > > > Introduce bootfdt.h to contain these constants. > > > > > > When using the hardware or xenstore capabilities, adjust the grant and > > > event channel limits similar to dom0. > > > > > > For a hardware domain, require an IOMMU and disallow specifying a vpl011 > > > console or nr_spis. > > > > > > Signed-off-by: Jason Andryuk > > > --- > > > v2: > > > Fix comment style > > > Make DOMAIN_CAPS_* unsigned > > > Remove forced directmap & iommu > > > Require iommu with use of hardware domain > > > Limit to a single xenstore domain > > > > > > There is overlap with hyperlaunch. The numeric values are the same. > > > Hyperlaunch doesn't expose the values in a public header as done here. > > > Is this to be expected for dom0less? It seems most of dom0less isn't in > > > a header, but just in docs. > > > > > > Hyperlaunch uses BUILD_CAPS_, but I chose DOMAIN_CAPS_ since there are > > > domain-level capabilities. > > > > > > Only a single xenstore and hardware domain make sense. Hardware domain > > > receiving all hardware can only have a single domain. > > > > > > For Xenstore, the logic latches the single xs_domid and uses that for > > > all domains. Also, only a single domain can register for VIRQ_DOM_EXC. > > > --- > > > > @@ -1020,6 +1023,40 @@ void __init create_domUs(void) > > > if ( (max_init_domid + 1) >= DOMID_FIRST_RESERVED ) > > > panic("No more domain IDs available\n"); > > > + if ( dt_property_read_u32(node, "capabilities", &val) ) > > > + { > > > + if ( val & ~DOMAIN_CAPS_MASK ) > > > + panic("Invalid capabilities (%"PRIx32")\n", val); > > > + > > > + if ( val & DOMAIN_CAPS_CONTROL ) > > > + flags |= CDF_privileged; > > > + > > > + if ( val & DOMAIN_CAPS_HARDWARE ) > > > + { > > > + if ( hardware_domain ) > > > + panic("Only 1 hardware domain can be specified! > > > (%pd)\n", > > > + hardware_domain); > > > + > > > + if ( !iommu_enabled ) > > > + panic("iommu required for dom0less hardware > > > domain\n"); > > > > The panic is OK if "direct-map" is not specified. We need to check for > > direct-map before panic'ing. > > Ok, I guess I misunderstood Julien's comment - I thought he wanted to require > an iommu. I can re-work it. There are some subtleties here that it is best to clarify. Julien asked for the hardware domain not to imply 1:1 memory mapping. If the hardware domain has memory not mapped 1:1, then the IOMMU is required. However, a user could still explicitly request the hardware domain to be 1:1 mapped with the direct-map property, in that case the IOMMU is optional. > !direct-map && !iommu will panic. Any other combination of direct-map and > iommu will be allowed. I think that's correct > Hmmm, "passthrough" and "multiboot,device-tree" are essentially ignored for > hwdom right now. I'll require them to be unset for hwdom. Good idea From xen-devel-bounces@lists.xenproject.org Wed Apr 02 21:55:40 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 02 Apr 2025 21:55:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936114.1337425 (Exim 4.92) (envelope-from ) id 1u063b-0005AI-83; Wed, 02 Apr 2025 21:55:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936114.1337425; Wed, 02 Apr 2025 21:55:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u063b-0005AB-3Q; Wed, 02 Apr 2025 21:55:35 +0000 Received: by outflank-mailman (input) for mailman id 936114; Wed, 02 Apr 2025 21:55:33 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u063Z-0005A5-Oa for xen-devel@lists.xenproject.org; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Apr 2025 21:55:21.4764 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c4f88e95-fa74-4890-2fa2-08dd723110b9 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF000023D0.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB7213 On 2025-04-01 01:56, Jan Beulich wrote: > Putting a few bytes ahead of page tables isn't very efficient; there's > a gap almost worth a full page. To avoid re-ordering of items in the > source file, simply put the few small items in sub-section 1, for them > to end up after the page tables, followed (in the final binary) by non- > page-aligned items from other CUs. > > Signed-off-by: Jan Beulich Reviewed-by: Jason Andryuk Seems a little fragile, but I don't have a better suggestion. Regards, Jason From xen-devel-bounces@lists.xenproject.org Thu Apr 03 00:06:38 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 00:06:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936146.1337446 (Exim 4.92) (envelope-from ) id 1u086G-0001pS-Nn; Thu, 03 Apr 2025 00:06:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936146.1337446; Thu, 03 Apr 2025 00:06:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u086G-0001pL-Kx; Thu, 03 Apr 2025 00:06:28 +0000 Received: by outflank-mailman (input) for mailman id 936146; Thu, 03 Apr 2025 00:06:27 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u086E-0001pF-KV for xen-devel@lists.xenproject.org; Thu, 03 Apr 2025 00:06:27 +0000 Received: from mail-24416.protonmail.ch (mail-24416.protonmail.ch [109.224.244.16]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 7aaea449-101f-11f0-9eaa-5ba50f476ded; Thu, 03 Apr 2025 02:06:24 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 7aaea449-101f-11f0-9eaa-5ba50f476ded DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=proton.me; s=protonmail; t=1743638782; x=1743897982; bh=zScPCgDT4Rb2CxmAcwTQX1VAw0rGhJQd5Vd3GI95vFs=; h=Date:To:From:Cc:Subject:Message-ID:Feedback-ID:From:To:Cc:Date: Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector: List-Unsubscribe:List-Unsubscribe-Post; b=nQ6H9rS4xOh9K8hq4mLIdT3yLizr5ao/wQ6y70zrRT4V2PQpcXQOWOgGRHvTDCFWH uUl5S13Cclm+ihbFvGyqis9F8p82r/fLnx/r5R+KnE0KYReS8maExKmLLkyMlN3Edg zS9MQ2d3JVyLhcQYWOP77/n6xqehPfpQRufF35ko0yWzkd5NgVojJgwibYhZHG0GTg ckNxokDQEFO8zjPN/hMCQGwzzTTrYN/NSlKH1QjoezFOJ3j7pxKEvsOUMjRxyrPTqQ rpm5gBk599HSpAt3q3x5tscQtcXOUGqQsJSiS8lf6pWJu0bWsEexQ4P/p0udDPY2qL IZJ3+kHtAsCIw== Date: Thu, 03 Apr 2025 00:06:17 +0000 To: xen-devel@lists.xenproject.org From: dmkhn@proton.me Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com Subject: [PATCH v1 0/3] xen/console: few cleanups in console driver Message-ID: <20250403000604.169619-1-dmukhin@ford.com> Feedback-ID: 123220910:user:proton X-Pm-Message-ID: b5d0944d21a12ab39365ae4c2243e62852d793a7 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable The patch series introduces a few cleanups aimed at reducing code duplicati= on in the console driver. Originally, patches 2 and 3 were part of NS16550 emulator v3 series [1]. Patch 1 removes some code duplication for logging via conring facility. Patch 2 (see [2]) removes code duplication between __putstr() and the rest = of the driver. It also introduces private flags to select console devices for printout which simplifies some code paths. Patch 3 (see [3]) adds conring_flush() to send contents of conring to all currently available console devices. [1] https://lore.kernel.org/xen-devel/20250103-vuart-ns8250-v3-v1-0-c5d36b3= 1d66c@ford.com/ [2] https://lore.kernel.org/xen-devel/20250103-vuart-ns8250-v3-v1-16-c5d36b= 31d66c@ford.com/ [3] https://lore.kernel.org/xen-devel/20250103-vuart-ns8250-v3-v1-17-c5d36b= 31d66c@ford.com/ [4] CI link: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines/= 1749584524 Denis Mukhin (3): xen/console: cleanup conring management xen/console: introduce console_puts() xen/console: introduce conring_flush() xen/drivers/char/console.c | 175 ++++++++++++++++++++++--------------- 1 file changed, 104 insertions(+), 71 deletions(-) --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Thu Apr 03 00:06:38 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 00:06:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936147.1337457 (Exim 4.92) (envelope-from ) id 1u086J-00023P-VY; Thu, 03 Apr 2025 00:06:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936147.1337457; Thu, 03 Apr 2025 00:06:31 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u086J-00023I-R2; Thu, 03 Apr 2025 00:06:31 +0000 Received: by outflank-mailman (input) for mailman id 936147; Thu, 03 Apr 2025 00:06:30 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u086I-000234-P9 for xen-devel@lists.xenproject.org; Thu, 03 Apr 2025 00:06:30 +0000 Received: from mail-4316.protonmail.ch (mail-4316.protonmail.ch [185.70.43.16]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 7dba8132-101f-11f0-9ffb-bf95429c2676; Thu, 03 Apr 2025 02:06:29 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 7dba8132-101f-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=proton.me; s=loyd6buz5vf63b67ydln5ulsbm.protonmail; t=1743638788; x=1743897988; bh=TBQLnMlSerAh3mR7qO98G0AbutCfSkHB8vVcz9TwNvY=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector:List-Unsubscribe:List-Unsubscribe-Post; b=PppSoZd4UgwV5D/68YhO2Lbx4eJjbIX9gzEMQ4qIb3yfQbGmFCTRKFH8chjItIRmq vGitz+iz9RUM6bPLc/wKjR4P7ISo/NFy9MPefeEi59jkr8J5eiJ/sjAXvR9DLHYvcv qpwHE4Rv3fydF6uWc82lzJPmV7UV3UpY+8ogDuqpl99pKlUYOEy1s2tBbxaUkgOxtP LEHM6riRiQxR/4XPeoRo3Tyd71eoY3Pn6i9dXaYGtehUD32vaju6nKQwIsoq6xm4LP Lmh0X1Lg/YsBwSriH+YDfUVyrZrzqkmqwUb/HiS3I0/WLYJ5LQx3709CQzgjGa2yEh f95i2zubfAUwA== Date: Thu, 03 Apr 2025 00:06:22 +0000 To: xen-devel@lists.xenproject.org From: dmkhn@proton.me Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com Subject: [PATCH v1 1/3] xen/console: cleanup conring management Message-ID: <20250403000604.169619-2-dmukhin@ford.com> In-Reply-To: <20250403000604.169619-1-dmukhin@ford.com> References: <20250403000604.169619-1-dmukhin@ford.com> Feedback-ID: 123220910:user:proton X-Pm-Message-ID: 4c3ff2d98affcb365872036c446a394a36e85caa MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable From: Denis Mukhin Move console_locks_busted handling inside conring_puts() to remove tasklet code duplication. Signed-off-by: Denis Mukhin --- xen/drivers/char/console.c | 29 ++++++++++++++--------------- 1 file changed, 14 insertions(+), 15 deletions(-) diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index c3150fbdb7..aaa97088aa 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -325,6 +325,17 @@ static void cf_check do_dec_thresh(unsigned char key, = bool unused) * ******************************************************** */ =20 +static void cf_check notify_dom0_con_ring(void *unused) +{ + send_global_virq(VIRQ_CON_RING); +} + +static DECLARE_SOFTIRQ_TASKLET(notify_dom0_con_ring_tasklet, + notify_dom0_con_ring, + NULL); + +static bool console_locks_busted; + static void conring_puts(const char *str, size_t len) { ASSERT(rspin_is_locked(&console_lock)); @@ -334,6 +345,9 @@ static void conring_puts(const char *str, size_t len) =20 if ( conringp - conringc > conring_size ) conringc =3D conringp - conring_size; + + if ( !console_locks_busted ) + tasklet_schedule(¬ify_dom0_con_ring_tasklet); } =20 long read_console_ring(struct xen_sysctl_readconsole *op) @@ -594,13 +608,6 @@ static void cf_check serial_rx(char c) __serial_rx(c); } =20 -static void cf_check notify_dom0_con_ring(void *unused) -{ - send_global_virq(VIRQ_CON_RING); -} -static DECLARE_SOFTIRQ_TASKLET(notify_dom0_con_ring_tasklet, - notify_dom0_con_ring, NULL); - #ifdef CONFIG_X86 static inline void xen_console_write_debug_port(const char *buf, size_t le= n) { @@ -648,10 +655,7 @@ static long guest_console_write(XEN_GUEST_HANDLE_PARAM= (char) buffer, #endif =20 if ( opt_console_to_ring ) - { conring_puts(kbuf, kcount); - tasklet_schedule(¬ify_dom0_con_ring_tasklet); - } =20 nrspin_unlock_irq(&console_lock); } @@ -753,8 +757,6 @@ long do_console_io( * ***************************************************** */ =20 -static bool console_locks_busted; - static void __putstr(const char *str) { size_t len =3D strlen(str); @@ -775,9 +777,6 @@ static void __putstr(const char *str) #endif =20 conring_puts(str, len); - - if ( !console_locks_busted ) - tasklet_schedule(¬ify_dom0_con_ring_tasklet); } =20 static int printk_prefix_check(char *p, char **pp) --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Thu Apr 03 00:06:38 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 00:06:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936148.1337465 (Exim 4.92) (envelope-from ) id 1u086N-0002IY-4Z; Thu, 03 Apr 2025 00:06:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936148.1337465; Thu, 03 Apr 2025 00:06:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u086N-0002IR-1W; Thu, 03 Apr 2025 00:06:35 +0000 Received: by outflank-mailman (input) for mailman id 936148; Thu, 03 Apr 2025 00:06:34 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u086M-0001pF-4S for xen-devel@lists.xenproject.org; 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charset=utf-8 Content-Transfer-Encoding: quoted-printable From: Denis Mukhin guest_console_write() duplicates the code from __putstr(), eliminate code duplication. Introduce console_puts() for writing a buffer to console devices. Also, introduce internal console flags to control which console devices should be used. Signed-off-by: Denis Mukhin --- xen/drivers/char/console.c | 112 ++++++++++++++++++++++--------------- 1 file changed, 66 insertions(+), 46 deletions(-) diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index aaa97088aa..2618c2e47d 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -41,6 +41,20 @@ #include #endif =20 +/* Internal console flags. */ +enum { + CONSOLE_SERIAL =3D BIT(0, U), /* Use serial device. */ + CONSOLE_PV =3D BIT(1, U), /* Use PV console. */ + CONSOLE_VIDEO =3D BIT(2, U), /* Use video device. */ + CONSOLE_DEBUG =3D BIT(3, U), /* Use debug device. */ + CONSOLE_RING =3D BIT(4, U), /* Use console ring. */ + CONSOLE_DEFAULT =3D CONSOLE_SERIAL | CONSOLE_PV | CONSOLE_VIDEO | + CONSOLE_DEBUG, + CONSOLE_ALL =3D CONSOLE_DEFAULT | CONSOLE_RING, +}; + +static void console_puts(const char *str, size_t len, unsigned int flags); + /* console: comma-separated list of console outputs. */ static char __initdata opt_console[30] =3D OPT_CONSOLE_STR; string_param("console", opt_console); @@ -338,8 +352,6 @@ static bool console_locks_busted; =20 static void conring_puts(const char *str, size_t len) { - ASSERT(rspin_is_locked(&console_lock)); - while ( len-- ) conring[CONRING_IDX_MASK(conringp++)] =3D *str++; =20 @@ -432,9 +444,6 @@ void console_serial_puts(const char *s, size_t nr) serial_steal_fn(s, nr); else serial_puts(sercon_handle, s, nr); - - /* Copy all serial output into PV console */ - pv_console_puts(s, nr); } =20 static void cf_check dump_console_ring_key(unsigned char key) @@ -468,8 +477,7 @@ static void cf_check dump_console_ring_key(unsigned cha= r key) c +=3D len; } =20 - console_serial_puts(buf, sofar); - video_puts(buf, sofar); + console_puts(buf, sofar, CONSOLE_SERIAL | CONSOLE_VIDEO | CONSOLE_PV); =20 free_xenheap_pages(buf, order); } @@ -618,11 +626,61 @@ static inline void xen_console_write_debug_port(const= char *buf, size_t len) } #endif =20 +static inline void console_debug_puts(const char *str, size_t len) +{ +#ifdef CONFIG_X86 + if ( opt_console_xen ) + { + if ( xen_guest ) + xen_hypercall_console_write(str, len); + else + xen_console_write_debug_port(str, len); + } +#endif +} + +/* + * Write buffer to all enabled console devices. + * + * That will handle all possible scenarios working w/ console + * - physical console (serial console, VGA console (x86 only)); + * - PV console; + * - debug console (x86 only): debug I/O port or __HYPERVISOR_console_io + * hypercall; + * - console ring. + */ +static void console_puts(const char *str, size_t len, unsigned int flags) +{ + ASSERT(rspin_is_locked(&console_lock)); + + if ( flags & CONSOLE_SERIAL ) + console_serial_puts(str, len); + + if ( flags & CONSOLE_PV ) + pv_console_puts(str, len); + + if ( flags & CONSOLE_VIDEO ) + video_puts(str, len); + + if ( flags & CONSOLE_DEBUG ) + console_debug_puts(str, len); + + if ( flags & CONSOLE_RING ) + conring_puts(str, len); +} + +static inline void __putstr(const char *str) +{ + console_puts(str, strlen(str), CONSOLE_ALL); +} + static long guest_console_write(XEN_GUEST_HANDLE_PARAM(char) buffer, unsigned int count) { char kbuf[128]; unsigned int kcount =3D 0; + unsigned int flags =3D opt_console_to_ring + ? CONSOLE_ALL : CONSOLE_DEFAULT; struct domain *cd =3D current->domain; =20 while ( count > 0 ) @@ -640,23 +698,7 @@ static long guest_console_write(XEN_GUEST_HANDLE_PARAM= (char) buffer, { /* Use direct console output as it could be interactive */ nrspin_lock_irq(&console_lock); - - console_serial_puts(kbuf, kcount); - video_puts(kbuf, kcount); - -#ifdef CONFIG_X86 - if ( opt_console_xen ) - { - if ( xen_guest ) - xen_hypercall_console_write(kbuf, kcount); - else - xen_console_write_debug_port(kbuf, kcount); - } -#endif - - if ( opt_console_to_ring ) - conring_puts(kbuf, kcount); - + console_puts(kbuf, kcount, flags); nrspin_unlock_irq(&console_lock); } else @@ -757,28 +799,6 @@ long do_console_io( * ***************************************************** */ =20 -static void __putstr(const char *str) -{ - size_t len =3D strlen(str); - - ASSERT(rspin_is_locked(&console_lock)); - - console_serial_puts(str, len); - video_puts(str, len); - -#ifdef CONFIG_X86 - if ( opt_console_xen ) - { - if ( xen_guest ) - xen_hypercall_console_write(str, len); - else - xen_console_write_debug_port(str, len); - } -#endif - - conring_puts(str, len); -} - static int printk_prefix_check(char *p, char **pp) { int loglvl =3D -1; --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Thu Apr 03 00:06:40 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 00:06:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936150.1337476 (Exim 4.92) (envelope-from ) id 1u086S-0002aq-De; Thu, 03 Apr 2025 00:06:40 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936150.1337476; Thu, 03 Apr 2025 00:06:40 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u086S-0002aj-8e; Thu, 03 Apr 2025 00:06:40 +0000 Received: by outflank-mailman (input) for mailman id 936150; Thu, 03 Apr 2025 00:06:39 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u086R-000234-AB for xen-devel@lists.xenproject.org; Thu, 03 Apr 2025 00:06:39 +0000 Received: from mail-4316.protonmail.ch (mail-4316.protonmail.ch [185.70.43.16]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 830b6832-101f-11f0-9ffb-bf95429c2676; Thu, 03 Apr 2025 02:06:37 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 830b6832-101f-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=proton.me; s=lluhb2firrddhpi264e3pc4bsy.protonmail; t=1743638797; x=1743897997; bh=GYrF79Lky+t8pJBLpkLDqHS5mjT9sR3p7CaY+cQEX88=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector:List-Unsubscribe:List-Unsubscribe-Post; b=GjjTpaza1P+1T0MBPu3LhQ4JPYAc/JiUfL5MOerA+xFcmNwv6vGJit7Ht90Kshu/I K3EWULEH/Pz8AaYQAjS3CbXlzavFt5Tbs7ZMFz8aQ7hPSuBcLzyPmo34WFPUxeOZCi Txoy3EEzjK5fGMlwGyc7gTSOSBsj8hwcNJ1nIMueHRWq8OYycYlspL8xCAg6yQMrAV gnp5mtxlebkEZ+/sElzxhJW+TsKkFMlfB1umiEiNlr6hgBGg+VMOhCqdlsv2PMLC7D dc3hguy/FuQ4XnkFitHEOwOrTf7RO0lnHK3MO1wYLIJN4NqoXkPpMIVOj6x6aaa+Ab T8OQvn3y1i2JA== Date: Thu, 03 Apr 2025 00:06:32 +0000 To: xen-devel@lists.xenproject.org From: dmkhn@proton.me Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com Subject: [PATCH v1 3/3] xen/console: introduce conring_flush() Message-ID: <20250403000604.169619-4-dmukhin@ford.com> In-Reply-To: <20250403000604.169619-1-dmukhin@ford.com> References: <20250403000604.169619-1-dmukhin@ford.com> Feedback-ID: 123220910:user:proton X-Pm-Message-ID: 9f9887882ae5bbc02fc76b68206c9230209cbb57 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable From: Denis Mukhin Introduce conring_flush() to ensure all messages kept in the internal console ring are sent to all physical consoles (serial, VGA (x86)) after their initialization is completed. Resolves: https://gitlab.com/xen-project/xen/-/issues/184 Signed-off-by: Denis Mukhin --- The patch conflicts with https://lore.kernel.org/xen-devel/20250331230508.440198-7-dmukhin@ford.co= m/ in console_init_preirq() --- xen/drivers/char/console.c | 34 ++++++++++++++++++++++++---------- 1 file changed, 24 insertions(+), 10 deletions(-) diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index 2618c2e47d..18eb66df89 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -446,24 +446,22 @@ void console_serial_puts(const char *s, size_t nr) serial_puts(sercon_handle, s, nr); } =20 -static void cf_check dump_console_ring_key(unsigned char key) +/* + * Flush contents of the conring to the physical console devices. + */ +static int conring_flush(void) { uint32_t idx, len, sofar, c; unsigned int order; char *buf; + unsigned long flags; =20 - printk("'%c' pressed -> dumping console ring buffer (dmesg)\n", key); - - /* create a buffer in which we'll copy the ring in the correct - order and NUL terminate */ order =3D get_order_from_bytes(conring_size + 1); buf =3D alloc_xenheap_pages(order, 0); if ( buf =3D=3D NULL ) - { - printk("unable to allocate memory!\n"); - return; - } + return -ENOMEM; =20 + flags =3D console_lock_recursive_irqsave(); c =3D conringc; sofar =3D 0; while ( (c !=3D conringp) ) @@ -478,8 +476,21 @@ static void cf_check dump_console_ring_key(unsigned ch= ar key) } =20 console_puts(buf, sofar, CONSOLE_SERIAL | CONSOLE_VIDEO | CONSOLE_PV); + console_unlock_recursive_irqrestore(flags); =20 free_xenheap_pages(buf, order); + + return 0; +} + +static void cf_check conring_dump_keyhandler(unsigned char key) +{ + int rc; + + printk("'%c' pressed -> dumping console ring buffer (dmesg)\n", key); + rc =3D conring_flush(); + if ( rc ) + printk("failed to dump console ring buffer: %d\n", rc); } =20 /* @@ -1044,6 +1055,9 @@ void __init console_init_preirq(void) serial_set_rx_handler(sercon_handle, serial_rx); pv_console_set_rx_handler(serial_rx); =20 + /* NB: send conring contents to all enabled physical consoles, if any = */ + conring_flush(); + /* HELLO WORLD --- start-of-day banner text. */ nrspin_lock(&console_lock); __putstr(xen_banner()); @@ -1134,7 +1148,7 @@ void __init console_endboot(void) if ( opt_conswitch[1] =3D=3D 'x' ) console_rx =3D max_console_rx; =20 - register_keyhandler('w', dump_console_ring_key, + register_keyhandler('w', conring_dump_keyhandler, "synchronously dump console ring buffer (dmesg)", = 0); register_irq_keyhandler('+', &do_inc_thresh, "increase log level threshold", 0); --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Thu Apr 03 05:10:36 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 05:10:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936208.1337486 (Exim 4.92) (envelope-from ) id 1u0CqK-00044K-P3; Thu, 03 Apr 2025 05:10:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936208.1337486; Thu, 03 Apr 2025 05:10:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0CqK-00044C-JH; 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Peter Anvin" Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-edac@vger.kernel.org, kvm@vger.kernel.org, xen-devel@lists.xenproject.org, linux-ide@vger.kernel.org, linux-pm@vger.kernel.org, bpf@vger.kernel.org, llvm@lists.linux.dev, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com, peterz@infradead.org, acme@kernel.org, namhyung@kernel.org, mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org, irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com, wei.liu@kernel.org, ajay.kaher@broadcom.com, bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com, pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com, luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com, haiyangz@microsoft.com, decui@microsoft.com, Linus Torvalds References: <20250331082251.3171276-1-xin@zytor.com> <20250331082251.3171276-2-xin@zytor.com> <9D15DE81-2E68-4FCD-A133-4963602E18C9@zytor.com> Content-Language: en-US From: Xin Li Autocrypt: addr=xin@zytor.com; keydata= xsDNBGUPz1cBDACS/9yOJGojBFPxFt0OfTWuMl0uSgpwk37uRrFPTTLw4BaxhlFL0bjs6q+0 2OfG34R+a0ZCuj5c9vggUMoOLdDyA7yPVAJU0OX6lqpg6z/kyQg3t4jvajG6aCgwSDx5Kzg5 Rj3AXl8k2wb0jdqRB4RvaOPFiHNGgXCs5Pkux/qr0laeFIpzMKMootGa4kfURgPhRzUaM1vy bsMsL8vpJtGUmitrSqe5dVNBH00whLtPFM7IbzKURPUOkRRiusFAsw0a1ztCgoFczq6VfAVu raTye0L/VXwZd+aGi401V2tLsAHxxckRi9p3mc0jExPc60joK+aZPy6amwSCy5kAJ/AboYtY VmKIGKx1yx8POy6m+1lZ8C0q9b8eJ8kWPAR78PgT37FQWKYS1uAroG2wLdK7FiIEpPhCD+zH wlslo2ETbdKjrLIPNehQCOWrT32k8vFNEMLP5G/mmjfNj5sEf3IOKgMTMVl9AFjsINLHcxEQ 6T8nGbX/n3msP6A36FDfdSEAEQEAAc0WWGluIExpIDx4aW5Aenl0b3IuY29tPsLBDQQTAQgA NxYhBIUq/WFSDTiOvUIqv2u9DlcdrjdRBQJlD89XBQkFo5qAAhsDBAsJCAcFFQgJCgsFFgID AQAACgkQa70OVx2uN1HUpgv/cM2fsFCQodLArMTX5nt9yqAWgA5t1srri6EgS8W3F+3Kitge tYTBKu6j5BXuXaX3vyfCm+zajDJN77JHuYnpcKKr13VcZi1Swv6Jx1u0II8DOmoDYLb1Q2ZW v83W55fOWJ2g72x/UjVJBQ0sVjAngazU3ckc0TeNQlkcpSVGa/qBIHLfZraWtdrNAQT4A1fa sWGuJrChBFhtKbYXbUCu9AoYmmbQnsx2EWoJy3h7OjtfFapJbPZql+no5AJ3Mk9eE5oWyLH+ QWqtOeJM7kKvn/dBudokFSNhDUw06e7EoVPSJyUIMbYtUO7g2+Atu44G/EPP0yV0J4lRO6EA wYRXff7+I1jIWEHpj5EFVYO6SmBg7zF2illHEW31JAPtdDLDHYcZDfS41caEKOQIPsdzQkaQ oW2hchcjcMPAfyhhRzUpVHLPxLCetP8vrVhTvnaZUo0xaVYb3+wjP+D5j/3+hwblu2agPsaE vgVbZ8Fx3TUxUPCAdr/p73DGg57oHjgezsDNBGUPz1gBDAD4Mg7hMFRQqlzotcNSxatlAQNL MadLfUTFz8wUUa21LPLrHBkUwm8RujehJrzcVbPYwPXIO0uyL/F///CogMNx7Iwo6by43KOy g89wVFhyy237EY76j1lVfLzcMYmjBoTH95fJC/lVb5Whxil6KjSN/R/y3jfG1dPXfwAuZ/4N cMoOslWkfZKJeEut5aZTRepKKF54T5r49H9F7OFLyxrC/uI9UDttWqMxcWyCkHh0v1Di8176 jjYRNTrGEfYfGxSp+3jYL3PoNceIMkqM9haXjjGl0W1B4BidK1LVYBNov0rTEzyr0a1riUrp Qk+6z/LHxCM9lFFXnqH7KWeToTOPQebD2B/Ah5CZlft41i8L6LOF/LCuDBuYlu/fI2nuCc8d m4wwtkou1Y/kIwbEsE/6RQwRXUZhzO6llfoN96Fczr/RwvPIK5SVMixqWq4QGFAyK0m/1ap4 bhIRrdCLVQcgU4glo17vqfEaRcTW5SgX+pGs4KIPPBE5J/ABD6pBnUUAEQEAAcLA/AQYAQgA JhYhBIUq/WFSDTiOvUIqv2u9DlcdrjdRBQJlD89ZBQkFo5qAAhsMAAoJEGu9DlcdrjdR4C0L /RcjolEjoZW8VsyxWtXazQPnaRvzZ4vhmGOsCPr2BPtMlSwDzTlri8BBG1/3t/DNK4JLuwEj OAIE3fkkm+UG4Kjud6aNeraDI52DRVCSx6xff3bjmJsJJMb12mWglN6LjdF6K+PE+OTJUh2F dOhslN5C2kgl0dvUuevwMgQF3IljLmi/6APKYJHjkJpu1E6luZec/lRbetHuNFtbh3xgFIJx 2RpgVDP4xB3f8r0I+y6ua+p7fgOjDLyoFjubRGed0Be45JJQEn7A3CSb6Xu7NYobnxfkwAGZ Q81a2XtvNS7Aj6NWVoOQB5KbM4yosO5+Me1V1SkX2jlnn26JPEvbV3KRFcwV5RnDxm4OQTSk PYbAkjBbm+tuJ/Sm+5Yp5T/BnKz21FoCS8uvTiziHj2H7Cuekn6F8EYhegONm+RVg3vikOpn gao85i4HwQTK9/D1wgJIQkdwWXVMZ6q/OALaBp82vQ2U9sjTyFXgDjglgh00VRAHP7u1Rcu4 l75w1xInsg== In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 4/1/2025 12:52 AM, Ingo Molnar wrote: >> Should we rename the *msrl() functions to *msrq() as part of this >> overhaul? > Yeah, that's a good idea, and because talk is cheap I just implemented > this in the tip:WIP.x86/msr branch with a couple of other cleanups in > this area (see the shortlog & diffstat below), but the churn is high: > > 144 files changed, 1034 insertions(+), 1034 deletions(-) Hi Ingo, I noticed that you keep the type of MSR index in these patches as "unsigned int". I'm thinking would it be better to standardize it as "u32"? Because: 1) MSR index is placed in ECX to execute MSR instructions, and the high-order 32 bits of RCX are ignored on 64-bit. 2) MSR index is encoded as a 32-bit immediate in the new immediate form MSR instructions. Thanks! Xin From xen-devel-bounces@lists.xenproject.org Thu Apr 03 06:02:19 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 06:02:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936222.1337501 (Exim 4.92) (envelope-from ) id 1u0DeZ-0000FQ-AE; Thu, 03 Apr 2025 06:02:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936222.1337501; Thu, 03 Apr 2025 06:02:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0DeZ-0000FJ-4Z; Thu, 03 Apr 2025 06:02:15 +0000 Received: by outflank-mailman (input) for mailman id 936222; Thu, 03 Apr 2025 06:02:14 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0DeY-0000FC-28 for xen-devel@lists.xenproject.org; Thu, 03 Apr 2025 06:02:14 +0000 Received: from mail.zytor.com (unknown [2607:7c80:54:3::138]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 2e5faa72-1051-11f0-9ffb-bf95429c2676; Thu, 03 Apr 2025 08:02:11 +0200 (CEST) Received: from [127.0.0.1] ([76.133.66.138]) (authenticated bits=0) by mail.zytor.com (8.18.1/8.17.1) with ESMTPSA id 53361TVl369646 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NO); Wed, 2 Apr 2025 23:01:30 -0700 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 2e5faa72-1051-11f0-9ffb-bf95429c2676 DKIM-Filter: OpenDKIM Filter v2.11.0 mail.zytor.com 53361TVl369646 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=zytor.com; s=2025032001; t=1743660093; bh=dlct/QjME2ZRc2GbrZa4+YEUwLyiwmon1oWoqtApkXY=; h=Date:From:To:CC:Subject:In-Reply-To:References:From; b=WPP0bDZK1lApqNXdOtF12S5ARISaib9mLKSdGhnx3gf+KvTavErQMB5tHsDboEZaM dLsgA/Wr4k2VPAKvg4Q/jtE0gFB4ojRvE+oKmyqXmPeIVyoZtruCTjMkDVanwskwS+ jiuGUYw2dmNjKOKZNCiNGXO9zxp8lWX1y5seDxftNeQHvt8RBeGECAiOxqTKUMgh1b zD9Kyl+NSFQ59y87oScNqVpMXyezROjMwevUzZS+FRy/CxOc3SftPfgsBUCB4x+623 2LcVsu0VnYA1sp4yMqo6TRQHgTa6YRFjMp5wTke1MjTH1hw4LpEw+MZO87TrcY7Ja6 ziwf36ftnA50g== Date: Wed, 02 Apr 2025 23:01:27 -0700 From: "H. Peter Anvin" To: Xin Li , Ingo Molnar CC: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-edac@vger.kernel.org, kvm@vger.kernel.org, xen-devel@lists.xenproject.org, linux-ide@vger.kernel.org, linux-pm@vger.kernel.org, bpf@vger.kernel.org, llvm@lists.linux.dev, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com, peterz@infradead.org, acme@kernel.org, namhyung@kernel.org, mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org, irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com, wei.liu@kernel.org, ajay.kaher@broadcom.com, bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com, pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com, luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com, haiyangz@microsoft.com, decui@microsoft.com, Linus Torvalds Subject: =?US-ASCII?Q?Re=3A_=5BRFC_PATCH_v1_01/15=5D_x86/msr=3A_Re?= =?US-ASCII?Q?place_=5F=5Fwrmsr=28=29_with_native=5Fwrmsrl=28=29?= User-Agent: K-9 Mail for Android In-Reply-To: References: <20250331082251.3171276-1-xin@zytor.com> <20250331082251.3171276-2-xin@zytor.com> <9D15DE81-2E68-4FCD-A133-4963602E18C9@zytor.com> Message-ID: <580DD4EE-8694-4525-AA73-A6823126FF9F@zytor.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On April 2, 2025 10:09:21 PM PDT, Xin Li wrote: >On 4/1/2025 12:52 AM, Ingo Molnar wrote: >>> Should we rename the *msrl() functions to *msrq() as part of this >>> overhaul? >> Yeah, that's a good idea, and because talk is cheap I just implemented >> this in the tip:WIP=2Ex86/msr branch with a couple of other cleanups in >> this area (see the shortlog & diffstat below), but the churn is high: >>=20 >> 144 files changed, 1034 insertions(+), 1034 deletions(-) > >Hi Ingo, > >I noticed that you keep the type of MSR index in these patches as >"unsigned int"=2E > >I'm thinking would it be better to standardize it as "u32"? > >Because: >1) MSR index is placed in ECX to execute MSR instructions, and the > high-order 32 bits of RCX are ignored on 64-bit=2E >2) MSR index is encoded as a 32-bit immediate in the new immediate form > MSR instructions=2E > >Thanks! > Xin "unsigned int" and "u32" are synonymous, but the latter is more explicit a= nd would be better=2E From xen-devel-bounces@lists.xenproject.org Thu Apr 03 07:08:32 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 07:08:32 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936247.1337537 (Exim 4.92) (envelope-from ) id 1u0EgX-0006Sm-4P; Thu, 03 Apr 2025 07:08:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936247.1337537; Thu, 03 Apr 2025 07:08:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0EgX-0006Sf-1r; Thu, 03 Apr 2025 07:08:21 +0000 Received: by outflank-mailman (input) for mailman id 936247; Thu, 03 Apr 2025 07:08:19 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0EgV-0006SX-Nv for xen-devel@lists.xenproject.org; Thu, 03 Apr 2025 07:08:19 +0000 Received: from mail-wr1-x435.google.com (mail-wr1-x435.google.com [2a00:1450:4864:20::435]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 68ef78ed-105a-11f0-9ffb-bf95429c2676; Thu, 03 Apr 2025 09:08:14 +0200 (CEST) Received: by mail-wr1-x435.google.com with SMTP id ffacd0b85a97d-3914aba1ce4so474760f8f.2 for ; Thu, 03 Apr 2025 00:08:14 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 03 Apr 2025 00:08:13 -0700 (PDT) Message-ID: <53a596b9-7755-4064-a65c-fb3db1e4550e@suse.com> Date: Thu, 3 Apr 2025 09:08:12 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen: Change xen-acpi-processor dom0 dependency To: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= Cc: Penny Zheng , xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org, Jason Andryuk , Stefano Stabellini , Oleksandr Tyshchenko References: <20250331172913.51240-1-jason.andryuk@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 02.04.2025 16:24, Jürgen Groß wrote: > On 31.03.25 19:29, Jason Andryuk wrote: >> xen-acpi-processor functions under a PVH dom0 with only a >> xen_initial_domain() runtime check. Change the Kconfig dependency from >> PV dom0 to generic dom0 to reflect that. >> >> Suggested-by: Jan Beulich >> Signed-off-by: Jason Andryuk >> --- >> drivers/xen/Kconfig | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/drivers/xen/Kconfig b/drivers/xen/Kconfig >> index f7d6f47971fd..24f485827e03 100644 >> --- a/drivers/xen/Kconfig >> +++ b/drivers/xen/Kconfig >> @@ -278,7 +278,7 @@ config XEN_PRIVCMD_EVENTFD >> >> config XEN_ACPI_PROCESSOR >> tristate "Xen ACPI processor" >> - depends on XEN && XEN_PV_DOM0 && X86 && ACPI_PROCESSOR && CPU_FREQ >> + depends on XEN && XEN_DOM0 && X86 && ACPI_PROCESSOR && CPU_FREQ >> default m >> help >> This ACPI processor uploads Power Management information to the Xen > > Assuming that all needed hypercalls are fine for PVH dom0: If you want to feel further ascertained, you could also add Tested-by: Jan Beulich even if that was only in the context of "xen/acpi: upload power and performance related data from a PVH dom0", where I noticed this issue. Jan From xen-devel-bounces@lists.xenproject.org Thu Apr 03 07:14:29 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 07:14:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936259.1337548 (Exim 4.92) (envelope-from ) id 1u0EmP-0000r7-O6; Thu, 03 Apr 2025 07:14:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936259.1337548; Thu, 03 Apr 2025 07:14:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0EmP-0000r0-L3; Thu, 03 Apr 2025 07:14:25 +0000 Received: by outflank-mailman (input) for mailman id 936259; Thu, 03 Apr 2025 07:14:24 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0EmN-0000qu-Q7 for xen-devel@lists.xenproject.org; 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keydata= xsDNBGUPz1cBDACS/9yOJGojBFPxFt0OfTWuMl0uSgpwk37uRrFPTTLw4BaxhlFL0bjs6q+0 2OfG34R+a0ZCuj5c9vggUMoOLdDyA7yPVAJU0OX6lqpg6z/kyQg3t4jvajG6aCgwSDx5Kzg5 Rj3AXl8k2wb0jdqRB4RvaOPFiHNGgXCs5Pkux/qr0laeFIpzMKMootGa4kfURgPhRzUaM1vy bsMsL8vpJtGUmitrSqe5dVNBH00whLtPFM7IbzKURPUOkRRiusFAsw0a1ztCgoFczq6VfAVu raTye0L/VXwZd+aGi401V2tLsAHxxckRi9p3mc0jExPc60joK+aZPy6amwSCy5kAJ/AboYtY VmKIGKx1yx8POy6m+1lZ8C0q9b8eJ8kWPAR78PgT37FQWKYS1uAroG2wLdK7FiIEpPhCD+zH wlslo2ETbdKjrLIPNehQCOWrT32k8vFNEMLP5G/mmjfNj5sEf3IOKgMTMVl9AFjsINLHcxEQ 6T8nGbX/n3msP6A36FDfdSEAEQEAAc0WWGluIExpIDx4aW5Aenl0b3IuY29tPsLBDQQTAQgA NxYhBIUq/WFSDTiOvUIqv2u9DlcdrjdRBQJlD89XBQkFo5qAAhsDBAsJCAcFFQgJCgsFFgID AQAACgkQa70OVx2uN1HUpgv/cM2fsFCQodLArMTX5nt9yqAWgA5t1srri6EgS8W3F+3Kitge tYTBKu6j5BXuXaX3vyfCm+zajDJN77JHuYnpcKKr13VcZi1Swv6Jx1u0II8DOmoDYLb1Q2ZW v83W55fOWJ2g72x/UjVJBQ0sVjAngazU3ckc0TeNQlkcpSVGa/qBIHLfZraWtdrNAQT4A1fa sWGuJrChBFhtKbYXbUCu9AoYmmbQnsx2EWoJy3h7OjtfFapJbPZql+no5AJ3Mk9eE5oWyLH+ QWqtOeJM7kKvn/dBudokFSNhDUw06e7EoVPSJyUIMbYtUO7g2+Atu44G/EPP0yV0J4lRO6EA wYRXff7+I1jIWEHpj5EFVYO6SmBg7zF2illHEW31JAPtdDLDHYcZDfS41caEKOQIPsdzQkaQ oW2hchcjcMPAfyhhRzUpVHLPxLCetP8vrVhTvnaZUo0xaVYb3+wjP+D5j/3+hwblu2agPsaE vgVbZ8Fx3TUxUPCAdr/p73DGg57oHjgezsDNBGUPz1gBDAD4Mg7hMFRQqlzotcNSxatlAQNL MadLfUTFz8wUUa21LPLrHBkUwm8RujehJrzcVbPYwPXIO0uyL/F///CogMNx7Iwo6by43KOy g89wVFhyy237EY76j1lVfLzcMYmjBoTH95fJC/lVb5Whxil6KjSN/R/y3jfG1dPXfwAuZ/4N cMoOslWkfZKJeEut5aZTRepKKF54T5r49H9F7OFLyxrC/uI9UDttWqMxcWyCkHh0v1Di8176 jjYRNTrGEfYfGxSp+3jYL3PoNceIMkqM9haXjjGl0W1B4BidK1LVYBNov0rTEzyr0a1riUrp Qk+6z/LHxCM9lFFXnqH7KWeToTOPQebD2B/Ah5CZlft41i8L6LOF/LCuDBuYlu/fI2nuCc8d m4wwtkou1Y/kIwbEsE/6RQwRXUZhzO6llfoN96Fczr/RwvPIK5SVMixqWq4QGFAyK0m/1ap4 bhIRrdCLVQcgU4glo17vqfEaRcTW5SgX+pGs4KIPPBE5J/ABD6pBnUUAEQEAAcLA/AQYAQgA JhYhBIUq/WFSDTiOvUIqv2u9DlcdrjdRBQJlD89ZBQkFo5qAAhsMAAoJEGu9DlcdrjdR4C0L /RcjolEjoZW8VsyxWtXazQPnaRvzZ4vhmGOsCPr2BPtMlSwDzTlri8BBG1/3t/DNK4JLuwEj OAIE3fkkm+UG4Kjud6aNeraDI52DRVCSx6xff3bjmJsJJMb12mWglN6LjdF6K+PE+OTJUh2F dOhslN5C2kgl0dvUuevwMgQF3IljLmi/6APKYJHjkJpu1E6luZec/lRbetHuNFtbh3xgFIJx 2RpgVDP4xB3f8r0I+y6ua+p7fgOjDLyoFjubRGed0Be45JJQEn7A3CSb6Xu7NYobnxfkwAGZ Q81a2XtvNS7Aj6NWVoOQB5KbM4yosO5+Me1V1SkX2jlnn26JPEvbV3KRFcwV5RnDxm4OQTSk PYbAkjBbm+tuJ/Sm+5Yp5T/BnKz21FoCS8uvTiziHj2H7Cuekn6F8EYhegONm+RVg3vikOpn gao85i4HwQTK9/D1wgJIQkdwWXVMZ6q/OALaBp82vQ2U9sjTyFXgDjglgh00VRAHP7u1Rcu4 l75w1xInsg== In-Reply-To: <0da43a86-81b0-4388-b47b-3a76b15f2a4c@citrix.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 3/31/2025 2:45 PM, Andrew Cooper wrote: > On 31/03/2025 9:22 am, Xin Li (Intel) wrote: >> __wrmsr() is the lowest level primitive MSR write API, and its direct >> use is NOT preferred. Use its wrapper function native_wrmsrl() instead. >> >> No functional change intended. >> >> Signed-off-by: Xin Li (Intel) > > The critical piece of information you're missing from the commit message > is that the MSR_IMM instructions take a single u64. > > Therefore to use them, you've got to arrange for all callers to provide > a single u64, rather than a split u32 pair. You definitely caught me on how I was thinking it ;) Sometimes it is nice to see a change log with a thinking process. Thanks! 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Thu, 03 Apr 2025 00:30:22 -0700 (PDT) Message-ID: <7281b7d8-ba7b-4658-82f1-a63d66c1baff@suse.com> Date: Thu, 3 Apr 2025 09:30:21 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 3/3] xen: debug: gcov: add condition coverage support To: Volodymyr Babchuk Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , "xen-devel@lists.xenproject.org" References: <20250401011744.2267367-1-volodymyr_babchuk@epam.com> <20250401011744.2267367-4-volodymyr_babchuk@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20250401011744.2267367-4-volodymyr_babchuk@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 01.04.2025 03:17, Volodymyr Babchuk wrote: > --- a/xen/Kconfig > +++ b/xen/Kconfig > @@ -41,6 +41,11 @@ config CC_SPLIT_SECTIONS > config CC_HAS_UBSAN > def_bool $(cc-option,-fsanitize=undefined) > > +# Compiler supports -fcondition-coverage aka MC/DC > +config CC_HAS_MCDC > + def_bool $(cc-option,-fcondition-coverage) > + > + Nit: No double blank lines please. Also, just to clarify - until the use of Kconfig (alone) for things like this is properly resolved one way or another, I'm not going to approve such changes (but I'm also not going to veto them). My proposal [1] is still pending with no resolution, nor any counter-proposals. > --- a/xen/Rules.mk > +++ b/xen/Rules.mk > @@ -138,6 +138,9 @@ ifeq ($(CONFIG_CC_IS_CLANG),y) > COV_FLAGS := -fprofile-instr-generate -fcoverage-mapping > else > COV_FLAGS := -fprofile-arcs -ftest-coverage > +ifeq ($(CONFIG_CONDITION_COVERAGE),y) > + COV_FLAGS += -fcondition-coverage > +endif > endif Personally I find ifeq() uses like this unhelpful, and would prefer COV_FLAGS-$(CONFIG_CONDITION_COVERAGE) += -fcondition-coverage together with an eventual COV_FLAGS += $(COV_FLAGS-y) (if we don't already have one). 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Thu, 03 Apr 2025 00:54:56 -0700 (PDT) Message-ID: <38efe2ef-a87e-4558-8532-01be16626787@suse.com> Date: Thu, 3 Apr 2025 09:54:54 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 09/15] xen/x86: introduce a new amd cppc driver for cpufreq scaling To: "Penny, Zheng" Cc: "Huang, Ray" , Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , "xen-devel@lists.xenproject.org" , Jason Andryuk References: <20250306083949.1503385-1-Penny.Zheng@amd.com> <20250306083949.1503385-10-Penny.Zheng@amd.com> <4fe44e49-f55d-4d2a-ac02-538038e9128c@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 03.04.2025 09:40, Penny, Zheng wrote: >> -----Original Message----- >> From: Jan Beulich >> Sent: Tuesday, March 25, 2025 5:58 PM >> >>> +#define amd_get_freq(name) \ >> >> The macro parameter is used just ... >> >>> + static int amd_get_##name##_freq(const struct amd_cppc_drv_data >>> + *data, \ >> >> ... here, ... >> >>> + unsigned int *freq) \ >>> + { \ >>> + const struct xen_processor_cppc *cppc_data = data->cppc_data; \ >>> + uint64_t mul, div, res; \ >>> + \ >>> + if ( cppc_data->name##_mhz ) \ >>> + { \ >>> + /* Switch to khz */ \ >>> + *freq = cppc_data->name##_mhz * 1000; \ >> >> ... twice here forthe MHz value, and ... >> >>> + return 0; \ >>> + } \ >>> + \ >>> + /* Read Processor Max Speed(mhz) as anchor point */ \ >>> + mul = this_cpu(amd_max_freq_mhz); \ >>> + if ( !mul ) \ >>> + return -EINVAL; \ >>> + div = data->caps.highest_perf; \ >>> + res = (mul * data->caps.name##_perf * 1000) / div; \ >> >> ... here for the respective perf indicator. Why does it take ... >> >>> + if ( res > UINT_MAX ) \ >>> + { \ >>> + printk(XENLOG_ERR \ >>> + "Frequeny exceeds maximum value UINT_MAX: %lu\n", res); \ >>> + return -EINVAL; \ >>> + } \ >>> + *freq = (unsigned int)res; \ >>> + \ >>> + return 0; \ >>> + } \ >>> + >>> +amd_get_freq(lowest); >>> +amd_get_freq(nominal); >> >> ... two almost identical functions, when one (with two extra input parameters) would >> suffice? >> > > I had a draft fix here, If it doesn't what you hope for, plz let me know > ``` > static int amd_get_lowest_and_nominal_freq(const struct amd_cppc_drv_data *data, > unsigned int *lowest_freq, > unsigned int *nominal_freq) Why two outputs now when there was just one in the macro-ized form? I was rather expecting new inputs to appear, to account for the prior uses of the macro parameter. (As a result the function is now also quite a bit more complex than it was before. In particular there was no ... > { > const struct xen_processor_cppc *cppc_data = data->cppc_data; > uint64_t mul, div, res; > uint8_t perf; > > if ( !lowest_freq && !nominal_freq ) > return -EINVAL; > > if ( lowest_freq && cppc_data->cpc.lowest_mhz ) > /* Switch to khz */ > *lowest_freq = cppc_data->cpc.lowest_mhz * 1000; > > if ( nominal_freq && cppc_data->cpc.nominal_mhz ) > /* Switch to khz */ > *nominal_freq = cppc_data->cpc.nominal_mhz * 1000; > > /* Still have unresolved frequency */ > if ( (lowest_freq && !(*lowest_freq)) || > (nominal_freq && !(*nominal_freq)) ) > { > do { > /* Calculate lowest frequency firstly if need */ > if ( lowest_freq && !(*lowest_freq) ) > perf = data->caps.lowest_perf; > else > perf = data->caps.nominal_perf; > > /* Read Processor Max Speed(MHz) as anchor point */ > mul = this_cpu(amd_max_pxfreq_mhz); > if ( mul == INVAL_FREQ_MHZ || !mul ) > { > printk(XENLOG_ERR > "Failed to read valid processor max frequency as anchor point: %lu\n", > mul); > return -EINVAL; > } > div = data->caps.highest_perf; > res = (mul * perf * 1000) / div; > > if ( res > UINT_MAX || !res ) > { > printk(XENLOG_ERR > "Frequeny exceeds maximum value UINT_MAX or being zero value: %lu\n", > res); > return -EINVAL; > } > > if ( lowest_freq && !(*lowest_freq) ) > *lowest_freq = (unsigned int)res; > else > *nominal_freq = (unsigned int)res; > } while ( nominal_freq && !(*nominal_freq) ); ... loop there.) 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Apr 2025 08:19:24.5943 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b85a2a70-7b51-4359-a72e-08dd72883e83 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF00005FFF.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4201 Just like for RISCV and PPC, the earlier we enable the CI build the better. Signed-off-by: Michal Orzel --- automation/gitlab-ci/build.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml index 2513908b059b..8cb770d6ff27 100644 --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -476,6 +476,16 @@ alpine-3.18-gcc-debug-arm64-earlyprintk: CONFIG_EARLY_UART_CHOICE_PL011=y CONFIG_EARLY_UART_BASE_ADDRESS=0x9000000 +alpine-3.18-gcc-debug-arm64-mpu: + extends: .gcc-arm64-build-debug + variables: + CONTAINER: alpine:3.18-arm64v8 + HYPERVISOR_ONLY: y + EXTRA_XEN_CONFIG: | + CONFIG_XEN_START_ADDRESS=0x0 + CONFIG_MPU=y + CONFIG_UNSUPPORTED=y + # Yocto test jobs yocto-qemuarm64: extends: .yocto-test-arm64 -- 2.25.1 From xen-devel-bounces@lists.xenproject.org Thu Apr 03 08:41:49 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 08:41:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936346.1337614 (Exim 4.92) (envelope-from ) id 1u0G8t-000098-VY; Thu, 03 Apr 2025 08:41:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936346.1337614; Thu, 03 Apr 2025 08:41:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0G8t-000091-Ru; Thu, 03 Apr 2025 08:41:43 +0000 Received: by outflank-mailman (input) for mailman id 936346; Thu, 03 Apr 2025 08:41:43 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0G8t-00008v-06 for xen-devel@lists.xenproject.org; Thu, 03 Apr 2025 08:41:43 +0000 Received: from mail-wm1-x32d.google.com (mail-wm1-x32d.google.com [2a00:1450:4864:20::32d]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 75c48301-1067-11f0-9ffb-bf95429c2676; Thu, 03 Apr 2025 10:41:39 +0200 (CEST) Received: by mail-wm1-x32d.google.com with SMTP id 5b1f17b1804b1-43cfdc2c8c9so3108065e9.2 for ; Thu, 03 Apr 2025 01:41:40 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 03 Apr 2025 01:41:39 -0700 (PDT) Message-ID: <5a261173-d225-44fc-9078-4030ba11cfd8@suse.com> Date: Thu, 3 Apr 2025 10:41:38 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Tamas K Lengyel From: Jan Beulich Subject: [PATCH] x86/mem-sharing: short-circuit p2m_is_shared() when MEM_SHARING=n Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Some of the uses of dom_cow aren't easily DCE-able (without extra #ifdef-ary), and hence it being constantly NULL when MEM_SHARING=n misguides Coverity into thinking that there may be a NULL deref in if ( p2m_is_shared(t) ) d = dom_cow; if ( get_page(page, d) ) return page; (in get_page_from_mfn_and_type()). Help the situation by making p2m_is_shared() be compile-time false when MEM_SHARING=n, thus also permitting the compiler to DCE some other code. Note that p2m_is_sharable() isn't used outside of mem_sharing.c, and hence P2M_SHARABLE_TYPES can simply be left undefined when MEM_SHARING=n. Coverity ID: 1645573 Fixes: 79d91e178a1a ("dom_cow is needed for mem-sharing only") Signed-off-by: Jan Beulich --- Might be nice to also eliminate p2m_ram_shared (and for MEM_PAGING=n also the three paging types) entirely from such builds, to eliminate the risk of accidental use. Yet that would apparently also come at the price of more #ifdef-ary. Opinions? --- a/xen/arch/x86/include/asm/p2m.h +++ b/xen/arch/x86/include/asm/p2m.h @@ -136,11 +136,16 @@ typedef unsigned int p2m_query_t; #endif /* Shared types */ +#ifdef CONFIG_MEM_SHARING /* XXX: Sharable types could include p2m_ram_ro too, but we would need to * reinit the type correctly after fault */ #define P2M_SHARABLE_TYPES (p2m_to_mask(p2m_ram_rw) \ | p2m_to_mask(p2m_ram_logdirty) ) #define P2M_SHARED_TYPES (p2m_to_mask(p2m_ram_shared)) +#else +/* P2M_SHARABLE_TYPES deliberately not provided. */ +#define P2M_SHARED_TYPES 0 +#endif /* Types established/cleaned up via special accessors. */ #define P2M_SPECIAL_TYPES (P2M_GRANT_TYPES | \ From xen-devel-bounces@lists.xenproject.org Thu Apr 03 08:43:25 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 08:43:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936357.1337624 (Exim 4.92) (envelope-from ) id 1u0GAW-0000hS-AO; Thu, 03 Apr 2025 08:43:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936357.1337624; Thu, 03 Apr 2025 08:43:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0GAW-0000hL-6i; Thu, 03 Apr 2025 08:43:24 +0000 Received: by outflank-mailman (input) for mailman id 936357; Thu, 03 Apr 2025 08:43:22 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0GAU-0000hF-LW for xen-devel@lists.xenproject.org; Thu, 03 Apr 2025 08:43:22 +0000 Received: from mail-wm1-x330.google.com (mail-wm1-x330.google.com [2a00:1450:4864:20::330]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id b18190ee-1067-11f0-9ffb-bf95429c2676; Thu, 03 Apr 2025 10:43:19 +0200 (CEST) Received: by mail-wm1-x330.google.com with SMTP id 5b1f17b1804b1-43cef035a3bso3903825e9.1 for ; Thu, 03 Apr 2025 01:43:20 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 03 Apr 2025 01:43:19 -0700 (PDT) Message-ID: <20ac780b-f5ac-4531-997e-362d72adddd2@suse.com> Date: Thu, 3 Apr 2025 10:43:18 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] automation: Add Arm64 MPU build job To: Michal Orzel Cc: Doug Goldstein , Stefano Stabellini , Luca Fancellu , xen-devel@lists.xenproject.org References: <20250403081916.6834-1-michal.orzel@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20250403081916.6834-1-michal.orzel@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 03.04.2025 10:19, Michal Orzel wrote: > Just like for RISCV and PPC, the earlier we enable the CI build the > better. What about Arm32? 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Thu, 03 Apr 2025 01:58:07 -0700 (PDT) Message-ID: Date: Thu, 3 Apr 2025 10:58:06 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] automation: Add Arm64 MPU build job To: "Orzel, Michal" Cc: Doug Goldstein , Stefano Stabellini , Luca Fancellu , xen-devel@lists.xenproject.org References: <20250403081916.6834-1-michal.orzel@amd.com> <20ac780b-f5ac-4531-997e-362d72adddd2@suse.com> <2a8ab261-480f-4bfe-b2b7-7fdff4516078@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <2a8ab261-480f-4bfe-b2b7-7fdff4516078@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 03.04.2025 10:44, Orzel, Michal wrote: > On 03/04/2025 10:43, Jan Beulich wrote: >> On 03.04.2025 10:19, Michal Orzel wrote: >>> Just like for RISCV and PPC, the earlier we enable the CI build the >>> better. >> >> What about Arm32? > The series to enable compilation of Arm32 with MPU is still under review on the ML. Oh. Is MPU in Kconfig then missing a dependency on 64BIT? Jan From xen-devel-bounces@lists.xenproject.org Thu Apr 03 09:18:09 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 09:18:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936398.1337654 (Exim 4.92) (envelope-from ) id 1u0Gi3-0001LC-Cf; Thu, 03 Apr 2025 09:18:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936398.1337654; Thu, 03 Apr 2025 09:18:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0Gi3-0001L5-9i; Thu, 03 Apr 2025 09:18:03 +0000 Received: by outflank-mailman (input) for mailman id 936398; Thu, 03 Apr 2025 09:18:02 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0Gi2-0001Kz-RJ for xen-devel@lists.xenproject.org; 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Is MPU in Kconfig then missing a dependency on 64BIT? Well, yes you're right although when I think about it, it's been like that (for both 64 and 32) since the introduction of CONFIG_MPU by commit (in October last year): 0388a5979b21 ("xen/arm: mpu: Introduce choice between MMU and MPU") If you're saying that all the Kconfig combinations + targets like allyes/allno need to build successfully also for new ports (MPU on Arm is kind of like a new port), then I agree (I did not think about it and clearly others too seeing the MPU patch above) although I'd prefer to avoid sending a patch adding dependency just to be removed in 1-2 weeks. But I can do whatever you think needs to be done. ~Michal From xen-devel-bounces@lists.xenproject.org Thu Apr 03 09:28:22 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 09:28:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936411.1337663 (Exim 4.92) (envelope-from ) id 1u0Grs-0004Hc-7x; Thu, 03 Apr 2025 09:28:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936411.1337663; Thu, 03 Apr 2025 09:28:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0Grs-0004HV-5S; Thu, 03 Apr 2025 09:28:12 +0000 Received: by outflank-mailman (input) for mailman id 936411; Thu, 03 Apr 2025 09:28:11 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0Grr-0004HP-Fw for xen-devel@lists.xenproject.org; Thu, 03 Apr 2025 09:28:11 +0000 Received: from mail-wr1-x431.google.com (mail-wr1-x431.google.com [2a00:1450:4864:20::431]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id f493f1cf-106d-11f0-9ffb-bf95429c2676; Thu, 03 Apr 2025 11:28:09 +0200 (CEST) Received: by mail-wr1-x431.google.com with SMTP id ffacd0b85a97d-39ac9aea656so576972f8f.3 for ; Thu, 03 Apr 2025 02:28:09 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 03 Apr 2025 02:28:08 -0700 (PDT) Message-ID: <235cb577-b28f-49ab-b0a3-94ab35572d83@suse.com> Date: Thu, 3 Apr 2025 11:28:07 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] automation: Add Arm64 MPU build job To: "Orzel, Michal" Cc: Doug Goldstein , Stefano Stabellini , Luca Fancellu , xen-devel@lists.xenproject.org References: <20250403081916.6834-1-michal.orzel@amd.com> <20ac780b-f5ac-4531-997e-362d72adddd2@suse.com> <2a8ab261-480f-4bfe-b2b7-7fdff4516078@amd.com> <44500161-1346-4c9e-bcb3-a4301c197913@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <44500161-1346-4c9e-bcb3-a4301c197913@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 03.04.2025 11:17, Orzel, Michal wrote: > On 03/04/2025 10:58, Jan Beulich wrote: >> On 03.04.2025 10:44, Orzel, Michal wrote: >>> On 03/04/2025 10:43, Jan Beulich wrote: >>>> On 03.04.2025 10:19, Michal Orzel wrote: >>>>> Just like for RISCV and PPC, the earlier we enable the CI build the >>>>> better. >>>> >>>> What about Arm32? >>> The series to enable compilation of Arm32 with MPU is still under review on the ML. >> >> Oh. Is MPU in Kconfig then missing a dependency on 64BIT? > Well, yes you're right although when I think about it, it's been like that (for > both 64 and 32) since the introduction of CONFIG_MPU by commit (in October last > year): > 0388a5979b21 ("xen/arm: mpu: Introduce choice between MMU and MPU") > > If you're saying that all the Kconfig combinations + targets like allyes/allno > need to build successfully also for new ports (MPU on Arm is kind of like a new > port), then I agree (I did not think about it and clearly others too seeing the > MPU patch above) although I'd prefer to avoid sending a patch adding dependency > just to be removed in 1-2 weeks. But I can do whatever you think needs to be done. I'm far from insisting on a change here; you're a maintainer of that code while I am not. Yet I indeed think Kconfig needs to have the dependencies right, or else randconfig CI jobs may randomly fail. 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Is MPU in Kconfig then missing a dependency on 64BIT? >> Well, yes you're right although when I think about it, it's been like that (for >> both 64 and 32) since the introduction of CONFIG_MPU by commit (in October last >> year): >> 0388a5979b21 ("xen/arm: mpu: Introduce choice between MMU and MPU") >> >> If you're saying that all the Kconfig combinations + targets like allyes/allno >> need to build successfully also for new ports (MPU on Arm is kind of like a new >> port), then I agree (I did not think about it and clearly others too seeing the >> MPU patch above) although I'd prefer to avoid sending a patch adding dependency >> just to be removed in 1-2 weeks. But I can do whatever you think needs to be done. > > I'm far from insisting on a change here; you're a maintainer of that code while > I am not. Yet I indeed think Kconfig needs to have the dependencies right, or > else randconfig CI jobs may randomly fail. Sure, thanks for showing understanding. A different question (also to other people who knows this stuff). MPU requires to specify Xen start address using CONFIG_XEN_START_ADDRESS that is set to invalid default value to catch user attention. Provided that randconfig can select UNSUPPORTED and MPU, we should somehow set CONFIG_XEN_START_ADDRESS to e.g. 0 to be able to build successfully. Is this where we need to add EXTRA_FIXED_RANDCONFIG to existing arm64 and arm32 randconfig jobs? ~Michal From xen-devel-bounces@lists.xenproject.org Thu Apr 03 10:01:07 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 10:01:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936445.1337684 (Exim 4.92) (envelope-from ) id 1u0HNM-0005UL-UK; Thu, 03 Apr 2025 10:00:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936445.1337684; Thu, 03 Apr 2025 10:00:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0HNM-0005UE-R8; Thu, 03 Apr 2025 10:00:44 +0000 Received: by outflank-mailman (input) for mailman id 936445; Thu, 03 Apr 2025 10:00:43 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0HNL-0005U6-6i for xen-devel@lists.xenproject.org; Thu, 03 Apr 2025 10:00:43 +0000 Received: from mail-wm1-x32e.google.com (mail-wm1-x32e.google.com [2a00:1450:4864:20::32e]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 80912e29-1072-11f0-9eaa-5ba50f476ded; Thu, 03 Apr 2025 12:00:42 +0200 (CEST) Received: by mail-wm1-x32e.google.com with SMTP id 5b1f17b1804b1-43cfa7e7f54so4084215e9.1 for ; Thu, 03 Apr 2025 03:00:41 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 03 Apr 2025 03:00:41 -0700 (PDT) Message-ID: <921c6250-9485-4d66-a568-15045ecc17bb@suse.com> Date: Thu, 3 Apr 2025 12:00:39 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] automation: Add Arm64 MPU build job To: "Orzel, Michal" Cc: Doug Goldstein , Stefano Stabellini , Luca Fancellu , xen-devel@lists.xenproject.org, Andrew Cooper , Julien Grall , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20250403081916.6834-1-michal.orzel@amd.com> <20ac780b-f5ac-4531-997e-362d72adddd2@suse.com> <2a8ab261-480f-4bfe-b2b7-7fdff4516078@amd.com> <44500161-1346-4c9e-bcb3-a4301c197913@amd.com> <235cb577-b28f-49ab-b0a3-94ab35572d83@suse.com> <65d12272-0ceb-4570-bade-5a0901264e16@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <65d12272-0ceb-4570-bade-5a0901264e16@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 03.04.2025 11:35, Orzel, Michal wrote: > > > On 03/04/2025 11:28, Jan Beulich wrote: >> >> >> On 03.04.2025 11:17, Orzel, Michal wrote: >>> On 03/04/2025 10:58, Jan Beulich wrote: >>>> On 03.04.2025 10:44, Orzel, Michal wrote: >>>>> On 03/04/2025 10:43, Jan Beulich wrote: >>>>>> On 03.04.2025 10:19, Michal Orzel wrote: >>>>>>> Just like for RISCV and PPC, the earlier we enable the CI build the >>>>>>> better. >>>>>> >>>>>> What about Arm32? >>>>> The series to enable compilation of Arm32 with MPU is still under review on the ML. >>>> >>>> Oh. Is MPU in Kconfig then missing a dependency on 64BIT? >>> Well, yes you're right although when I think about it, it's been like that (for >>> both 64 and 32) since the introduction of CONFIG_MPU by commit (in October last >>> year): >>> 0388a5979b21 ("xen/arm: mpu: Introduce choice between MMU and MPU") >>> >>> If you're saying that all the Kconfig combinations + targets like allyes/allno >>> need to build successfully also for new ports (MPU on Arm is kind of like a new >>> port), then I agree (I did not think about it and clearly others too seeing the >>> MPU patch above) although I'd prefer to avoid sending a patch adding dependency >>> just to be removed in 1-2 weeks. But I can do whatever you think needs to be done. >> >> I'm far from insisting on a change here; you're a maintainer of that code while >> I am not. Yet I indeed think Kconfig needs to have the dependencies right, or >> else randconfig CI jobs may randomly fail. > Sure, thanks for showing understanding. > > A different question (also to other people who knows this stuff). > MPU requires to specify Xen start address using CONFIG_XEN_START_ADDRESS that is > set to invalid default value to catch user attention. Provided that randconfig > can select UNSUPPORTED and MPU, we should somehow set CONFIG_XEN_START_ADDRESS > to e.g. 0 to be able to build successfully. Is this where we need to add > EXTRA_FIXED_RANDCONFIG to existing arm64 and arm32 randconfig jobs? In principle some override like this will be needed, I think, yet that undermines the randomness of the build. From what I can tell the sole constraint on XEN_START_ADDRESS is that it needs to be page aligned (for whatever reason; I didn't think there was the concept of "pages" without an MMU [1]). Arbitrary values satisfying this constraint ought to be selectable by random configurations. Which would then - hopefully - also trigger the case where XEN_START_ADDRESS is e.g. so large that Xen can't fit in the remaining address space anymore. Plus perhaps any other constraints presently not enforced. How to deal with all of this, i.e. how to leave as much flexibility as possible to randconfig, I simply don't know. Extending the Cc list in the hope for someone to provide some insight. Jan [1] Perhaps PAGE_SIZE there is purely a software construct, used as allocation granularity. Yet then it's not clear why XEN_START_ADDRESS would need to be PAGE_SIZE-aligned. Maybe that's merely simplifying some code ... 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[92.26.98.202]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43ec1692ba4sm18302915e9.16.2025.04.03.04.00.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 04:00:05 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: cd660fdd-107a-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1743678006; x=1744282806; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=08NszHezCOETcMiXOyrzLaeHkX918KHLikx4QSFS/rU=; b=EogBNckk10AFC6jtUmOc+2t4ucpdPzSQfUGlQ/tmOajscxb233kpleHmb8iIySFx3e +4GMC971bjrtU1GNIhYNxXSXTrjqJcRU9Fk42eWFwwu9AdVzniOQYEQmzR45UfJMjKqx qAKgH4q7/YoFQIoKRErF124kwSaX/NunHLdew= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743678006; x=1744282806; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=08NszHezCOETcMiXOyrzLaeHkX918KHLikx4QSFS/rU=; b=UVLW1c8gh7Adk4KEQOMEyeaEm4K9NlclkO6Jlw8Ym1pCetDBNmvj4ybAP7xaOsowPY XA+bPVA3t1gH5vKzWDaLE4KK0zxV0/KGinXOca6Z8MiNe/6OcbROX/yZOcWam+BMxPBc HfPfzGO1ls4hykn1IhXklvfYs91iThmT54qlqFrZ7Ph4kgVwmV1qdu8DzQQg0H8LYRft JdCzhH16868g71EZmC0Q5oM2rzLTfQ7oiETDIOOL9eFyaPabZNtj3RTdHilocaTIFAzc 36dQGXDV1FgNSwQsZO7wc9rDSz0zAQZrG3kC8zSbdbjTa4LhccreJ3eraIftuAOnrNev 8Jog== X-Gm-Message-State: AOJu0YwbOBn6Mt8ikDjqLeDcYIAU8asq/zGPMZmW0JBzrn5xVgWCVmKd ji9WN/XPAmLWSHA833lRIPPDAoKtVnt5Iyr2NsNGw0LOiRwgt6CvhNncykw19Gkp4/NhdpVhiKm NVFg= X-Gm-Gg: ASbGncv2SU+Xh/OPIp8EZgs20JIem2R8xBp7QYkEejLa1lihmj0NvsPgEBehEzm7Cij je5GY0xfZNLHtDLtaT7v42KarAAV52hhUYs8V1l5fK5Xo/RbeCCA8R371KkWVCuq6a3b29MYl77 e8UvL+ONtJ0U0L4rmgW5GJwyoUOWrgSWW82GhlFBN53mgRp7uyWb0oj538oyfBZon1pNoWB/b99 y2HnKvu0E5m1wJTIPP97mmHLYvAdUytHd91lgPCDF6j56SMnmTWdF1Y3aEMOLEr/5MBXc9CLFVD UBSwVt78x6J0t4eLxIPXlgw4GlU9t+s3VmAOd6txgIUNAgoLEZPUiulPoFtDtBYiwBce1YYreZ7 9FmAPvVbdWXIFjD+uq72kwx2+VZGf X-Google-Smtp-Source: AGHT+IF48VQh9DG8vVnIIJIFW2/gfFQBVofNPlg6Nu2o+qvbGc42nX+p+3lzniXif1vJnYON1IhApw== X-Received: by 2002:a05:600c:314f:b0:43d:53c:1ad6 with SMTP id 5b1f17b1804b1-43ec14d8015mr19152055e9.26.1743678005954; Thu, 03 Apr 2025 04:00:05 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Volodymyr Babchuk , Bertrand Marquis , Shawn Anastasio , Oleksii Kurochko Subject: [PATCH] xen/link: Drop .fixup section from non-x86 architectures Date: Thu, 3 Apr 2025 12:00:03 +0100 Message-Id: <20250403110003.1461522-1-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The fixup section is only used by x86, and we're working to remove it there too. Logic in the fixup section is unconnected to it's origin site, and interferes with backtraces/etc. Remove the section from the architectures which don't use it. Signed-off-by: Andrew Cooper --- CC: Anthony PERARD CC: Michal Orzel CC: Jan Beulich CC: Julien Grall CC: Roger Pau Monné CC: Stefano Stabellini CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Shawn Anastasio CC: Oleksii Kurochko --- xen/arch/arm/xen.lds.S | 1 - xen/arch/ppc/xen.lds.S | 1 - xen/arch/riscv/xen.lds.S | 1 - 3 files changed, 3 deletions(-) diff --git a/xen/arch/arm/xen.lds.S b/xen/arch/arm/xen.lds.S index 86a6e311cfc5..ae1903246f69 100644 --- a/xen/arch/arm/xen.lds.S +++ b/xen/arch/arm/xen.lds.S @@ -45,7 +45,6 @@ SECTIONS *(.text.*) #endif - *(.fixup) *(.gnu.warning) _etext = .; /* End of text section */ } :text = 0x9090 diff --git a/xen/arch/ppc/xen.lds.S b/xen/arch/ppc/xen.lds.S index 3f2a7676ec96..1366e2819eed 100644 --- a/xen/arch/ppc/xen.lds.S +++ b/xen/arch/ppc/xen.lds.S @@ -38,7 +38,6 @@ SECTIONS *(.text.*) #endif - *(.fixup) *(.gnu.warning) . = ALIGN(POINTER_ALIGN); _etext = .; /* End of text section */ diff --git a/xen/arch/riscv/xen.lds.S b/xen/arch/riscv/xen.lds.S index dffc6ae11913..818aa4366949 100644 --- a/xen/arch/riscv/xen.lds.S +++ b/xen/arch/riscv/xen.lds.S @@ -33,7 +33,6 @@ SECTIONS *(.text.ident) _ident_end = .; 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charset=UTF-8 Content-Transfer-Encoding: 8bit Some of those patches are collected from my stubdomain test series, others are made while getting the new runner working. All of the cleanups can be applied independently, but most if not all are needed for the final patch adding new runner. As usual, besides the patches, somebody need to click on "hal9012" runner in the relevant projects. Marek Marczykowski-Górecki (11): ci: prevent grub unpacking initramfs ci: increase timeout for hw tests ci: enable XHCI console in Xen debug build on Alpine ci: include domU kernel messages in the console output log ci: increase verbosity of starting a domain ci: consistently use DOCKER_CMD in makefiles ci: wait for the network interface in PCI passthrough tests ci: switch test kernel from 6.1.19 to 6.12.21 ci: adjust resolving network interface into PCI device ci: add AMD Zen 4 HW runner [DO NOT MERGE] container automation/build/Makefile | 4 +- automation/gitlab-ci/build.yaml | 5 +- automation/gitlab-ci/test.yaml | 58 ++++++++++++- automation/scripts/qemu-alpine-x86_64.sh | 2 +- automation/scripts/qemu-smoke-dom0-arm32.sh | 2 +- automation/scripts/qemu-smoke-dom0-arm64.sh | 2 +- automation/scripts/qubes-x86-64.sh | 14 +-- automation/tests-artifacts/Makefile | 4 +- automation/tests-artifacts/kernel/6.1.19.dockerfile | 41 +--------- automation/tests-artifacts/kernel/6.12.21.dockerfile | 43 ++++++++++- 10 files changed, 119 insertions(+), 56 deletions(-) delete mode 100644 automation/tests-artifacts/kernel/6.1.19.dockerfile create mode 100644 automation/tests-artifacts/kernel/6.12.21.dockerfile base-commit: 35910ed65f1d188774ce90ba9898ca33f7a9fe4d -- git-series 0.9.1 From xen-devel-bounces@lists.xenproject.org Thu Apr 03 11:06:55 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 11:06:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936475.1337720 (Exim 4.92) (envelope-from ) id 1u0IPP-0005UH-CO; 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charset=UTF-8 Content-Transfer-Encoding: 8bit This build is used for hardware tests, and some runners use XHCI console Signed-off-by: Marek Marczykowski-Górecki --- automation/gitlab-ci/build.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml index 2513908b059b..169bebe3c775 100644 --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -341,6 +341,7 @@ alpine-3.18-gcc-debug: CONFIG_ARGO=y CONFIG_UBSAN=y CONFIG_UBSAN_FATAL=y + CONFIG_XHCI=y debian-12-x86_64-gcc-debug: extends: .gcc-x86-64-build-debug -- git-series 0.9.1 From xen-devel-bounces@lists.xenproject.org Thu Apr 03 11:06:55 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 11:06:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936474.1337714 (Exim 4.92) (envelope-from ) id 1u0IPP-0005SN-0r; Thu, 03 Apr 2025 11:06:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936474.1337714; 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charset=UTF-8 Content-Transfer-Encoding: 8bit It appears as sometimes it takes more time for Xen even start booting, mostly due to firmware and fetching large boot files by grub. In some jobs the current timeout is pretty close to the actual time needed, and sometimes (rarely for now) test fails due to timeout expiring in the middle of dom0 booting. This will be happening more often if the initramfs will grow (and with more complex tests). This has been observed on some dom0pvh-hvm jobs, at least on runners hw3 and hw11. Increase the timeout by yet another 60s (up to 180s now). Signed-off-by: Marek Marczykowski-Górecki --- automation/scripts/qubes-x86-64.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh index 8e78b7984e98..771c77d6618b 100755 --- a/automation/scripts/qubes-x86-64.sh +++ b/automation/scripts/qubes-x86-64.sh @@ -17,7 +17,7 @@ test_variant=$1 ### defaults extra_xen_opts= wait_and_wakeup= -timeout=120 +timeout=180 domU_type="pvh" domU_vif="'bridge=xenbr0'," domU_extra_config= -- git-series 0.9.1 From xen-devel-bounces@lists.xenproject.org Thu Apr 03 11:06:55 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 11:06:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936476.1337725 (Exim 4.92) (envelope-from ) id 1u0IPP-0005aw-L7; Thu, 03 Apr 2025 11:06:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936476.1337725; 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charset=UTF-8 Content-Transfer-Encoding: 8bit It fails on larger initramfs (~250MB one) and sometimes even smaller depending on memory size/memory map, let Linux do it. Signed-off-by: Marek Marczykowski-Górecki --- automation/scripts/qubes-x86-64.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh index f27296445901..8e78b7984e98 100755 --- a/automation/scripts/qubes-x86-64.sh +++ b/automation/scripts/qubes-x86-64.sh @@ -248,7 +248,7 @@ CONTROLLER=control@thor.testnet echo " multiboot2 (http)/gitlab-ci/xen $CONSOLE_OPTS loglvl=all guest_loglvl=all dom0_mem=4G console_timestamps=boot $extra_xen_opts module2 (http)/gitlab-ci/vmlinuz console=hvc0 root=/dev/ram0 earlyprintk=xen -module2 (http)/gitlab-ci/initrd-dom0 +module2 --nounzip (http)/gitlab-ci/initrd-dom0 " > $TFTP/grub.cfg echo "#!ipxe -- git-series 0.9.1 From xen-devel-bounces@lists.xenproject.org Thu Apr 03 11:06:56 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 11:06:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936477.1337730 (Exim 4.92) (envelope-from ) id 1u0IPQ-0005iI-1n; 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charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Marek Marczykowski-Górecki --- automation/scripts/qubes-x86-64.sh | 2 ++ 1 file changed, 2 insertions(+) diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh index 771c77d6618b..d316c17e0c9f 100755 --- a/automation/scripts/qubes-x86-64.sh +++ b/automation/scripts/qubes-x86-64.sh @@ -175,6 +175,8 @@ if [ -n "$domU_check" ]; then rm var/run echo "#!/bin/sh +echo 8 > /proc/sys/kernel/printk + ${domU_check} " > etc/local.d/xen.start chmod +x etc/local.d/xen.start -- git-series 0.9.1 From xen-devel-bounces@lists.xenproject.org Thu Apr 03 11:06:57 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 11:06:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936478.1337749 (Exim 4.92) (envelope-from ) id 1u0IPR-0006B6-B0; Thu, 03 Apr 2025 11:06:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936478.1337749; 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charset=UTF-8 Content-Transfer-Encoding: 8bit And start collecting qemu log earlier, so it isn't lost in case of a timeout during domain startup. Signed-off-by: Marek Marczykowski-Górecki --- automation/scripts/qemu-alpine-x86_64.sh | 2 +- automation/scripts/qemu-smoke-dom0-arm32.sh | 2 +- automation/scripts/qemu-smoke-dom0-arm64.sh | 2 +- automation/scripts/qubes-x86-64.sh | 4 ++-- 4 files changed, 5 insertions(+), 5 deletions(-) diff --git a/automation/scripts/qemu-alpine-x86_64.sh b/automation/scripts/qemu-alpine-x86_64.sh index 1ff689b577e3..17e2141d625e 100755 --- a/automation/scripts/qemu-alpine-x86_64.sh +++ b/automation/scripts/qemu-alpine-x86_64.sh @@ -56,7 +56,7 @@ bash /etc/init.d/xencommons start xl list -xl create -c /root/test.cfg +xl -vvv create -c /root/test.cfg " > etc/local.d/xen.start chmod +x etc/local.d/xen.start diff --git a/automation/scripts/qemu-smoke-dom0-arm32.sh b/automation/scripts/qemu-smoke-dom0-arm32.sh index e1cd83880928..0c60a66e25e3 100755 --- a/automation/scripts/qemu-smoke-dom0-arm32.sh +++ b/automation/scripts/qemu-smoke-dom0-arm32.sh @@ -21,7 +21,7 @@ echo "#!/bin/bash xl list -xl create -c /root/test.cfg +xl -vvv create -c /root/test.cfg " > ./root/xen.start echo "bash /root/xen.start" >> ./etc/init.d/xen-watchdog diff --git a/automation/scripts/qemu-smoke-dom0-arm64.sh b/automation/scripts/qemu-smoke-dom0-arm64.sh index 4d22a124df11..8774a8701232 100755 --- a/automation/scripts/qemu-smoke-dom0-arm64.sh +++ b/automation/scripts/qemu-smoke-dom0-arm64.sh @@ -52,7 +52,7 @@ bash /etc/init.d/xencommons start xl list -xl create -c /root/test.cfg +xl -vvv create -c /root/test.cfg " > etc/local.d/xen.start chmod +x etc/local.d/xen.start diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh index d316c17e0c9f..822b81d186a7 100755 --- a/automation/scripts/qubes-x86-64.sh +++ b/automation/scripts/qubes-x86-64.sh @@ -122,7 +122,6 @@ echo \"${passed}\" " dom0_check=" -tail -F /var/log/xen/qemu-dm-domU.log & until grep -q \"^domU Welcome to Alpine Linux\" /var/log/xen/console/guest-domU.log; do sleep 1 done @@ -222,7 +221,8 @@ if [ -n "$domU_check" ]; then echo " # get domU console content into test log tail -F /var/log/xen/console/guest-domU.log 2>/dev/null | sed -e \"s/^/(domU) /\" & -xl create /etc/xen/domU.cfg +tail -F /var/log/xen/qemu-dm-domU.log 2>/dev/null | sed -e \"s/^/(qemu-dm) /\" & +xl -vvv create /etc/xen/domU.cfg ${dom0_check} " >> etc/local.d/xen.start else -- git-series 0.9.1 From xen-devel-bounces@lists.xenproject.org Thu Apr 03 11:06:59 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 11:06:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936479.1337763 (Exim 4.92) (envelope-from ) id 1u0IPS-0006fP-Vr; Thu, 03 Apr 2025 11:06:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936479.1337763; Thu, 03 Apr 2025 11:06:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0IPS-0006ei-Pu; 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charset=UTF-8 Content-Transfer-Encoding: 8bit The network driver initializes asynchronously, and it may not be ready yet by the time the startup script is called. This is especially the case for USB network adapter (where the PCI device is the USB controller) in the upcoming runner. Don't bother about separate timeout - test timeout will cover this part too. Signed-off-by: Marek Marczykowski-Górecki --- automation/scripts/qubes-x86-64.sh | 1 + 1 file changed, 1 insertion(+) diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh index 822b81d186a7..6d2c170d1ee1 100755 --- a/automation/scripts/qubes-x86-64.sh +++ b/automation/scripts/qubes-x86-64.sh @@ -104,6 +104,7 @@ on_reboot = "destroy" domU_check=" set -x -e interface=eth0 +while ! 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charset=UTF-8 Content-Transfer-Encoding: 8bit This allows rebuilding containers using podman too. Signed-off-by: Marek Marczykowski-Górecki --- automation/build/Makefile | 4 ++-- automation/tests-artifacts/Makefile | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/automation/build/Makefile b/automation/build/Makefile index 4df43b040777..fedf7524dacd 100644 --- a/automation/build/Makefile +++ b/automation/build/Makefile @@ -31,8 +31,8 @@ clean: define CLEAN_RULE .PHONY: clean-$(1) clean-$(1): - if [ -n "$$$$(docker image ls -q $(REGISTRY)/$(subst /,:,$(1)))" ]; then \ - docker image rm $(REGISTRY)/$(subst /,:,$(1)); \ + if [ -n "$$$$($(DOCKER_CMD) image ls -q $(REGISTRY)/$(subst /,:,$(1)))" ]; then \ + $(DOCKER_CMD) image rm $(REGISTRY)/$(subst /,:,$(1)); \ fi endef diff --git a/automation/tests-artifacts/Makefile b/automation/tests-artifacts/Makefile index d055cd696bed..80a60a94f3f7 100644 --- a/automation/tests-artifacts/Makefile +++ b/automation/tests-artifacts/Makefile @@ -10,9 +10,9 @@ help: @echo "To push container builds, set the env var PUSH" %: %.dockerfile ## Builds containers - docker build --pull -t $(REGISTRY)/$(@D):$(@F) -f $< $( Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 11:07:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936484.1337784 (Exim 4.92) (envelope-from ) id 1u0IPV-0007Hx-Ny; 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charset=UTF-8 Content-Transfer-Encoding: 8bit Change how PCI device lookup is done to handle also USB devices, in which case get the USB controller. Instead of taking basename of the 'device' symlink, resolve the full path (example: /sys/devices/pci0000:00/0000:00:09.0/usb4/4-7/4-7:1.0) and take the first part after pci0000:00. Theoretically it could be a bridge, but VM has flat PCI topology. Signed-off-by: Marek Marczykowski-Górecki --- automation/scripts/qubes-x86-64.sh | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh index 6d2c170d1ee1..dc8013750f5f 100755 --- a/automation/scripts/qubes-x86-64.sh +++ b/automation/scripts/qubes-x86-64.sh @@ -110,7 +110,8 @@ timeout 30s udhcpc -i \"\$interface\" pingip=\$(ip -o -4 r show default|cut -f 3 -d ' ') ping -c 10 \"\$pingip\" echo domU started -pcidevice=\$(basename \$(readlink /sys/class/net/\$interface/device)) +pcidevice=\$(realpath /sys/class/net/\$interface/device | + sed 's#.*pci0000:00/\\([^/]*\\).*#\\1#') lspci -vs \$pcidevice " if [ -n "$PCIDEV_INTR" ]; then -- git-series 0.9.1 From xen-devel-bounces@lists.xenproject.org Thu Apr 03 11:07:03 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 11:07:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936488.1337793 (Exim 4.92) (envelope-from ) id 1u0IPX-0007ZH-4p; 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charset=UTF-8 Content-Transfer-Encoding: 8bit This is AMD Ryzen 5 7640U in Framework Laptop AMD. It has several things different than the other runners. First of all, the console is using XHCI debug capability. And then, this system doesn't have normal wired ethernet. But is has one on USB, and this one is used for booting. For this, enable CONFIG_USB_RTL8152 in the Linux build. Include some basic tests, plus PCI passthrough. This machine doesn't support S3. S0ix pretends to be working with Qubes's dom0 (kernel + userspace), but it hangs on suspend with Alpine used in test. But even when it doesn't hang, it doesn't really reach deep sleep, so skip this test for now here. Signed-off-by: Marek Marczykowski-Górecki --- Requires containers rebuild, especially tests-artifacts/kernel/6.12.21. Do not apply yet, until issues found by those tests are fixed. That would be at least third issue found using this system, so lets have it in CI. --- automation/gitlab-ci/test.yaml | 56 +++++++++++++- automation/tests-artifacts/kernel/6.12.21.dockerfile | 2 +- 2 files changed, 58 insertions(+) diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml index a13dd040bd26..feb2dd10ab30 100644 --- a/automation/gitlab-ci/test.yaml +++ b/automation/gitlab-ci/test.yaml @@ -188,6 +188,16 @@ tags: - qubes-hw11 +.zen4-x86-64: + extends: .adl-x86-64 + variables: + PCIDEV: "c3:00.4" + PCIDEV_INTR: "MSI-X" + CONSOLE_OPTS: "console=xhci dbgp=xhci@pcic1:00.3,share=yes" + SUT_ADDR: test-12.testnet + tags: + - qubes-hw12 + # Test jobs build-each-commit-gcc: extends: .test-jobs-common @@ -479,6 +489,52 @@ zen3p-tools-tests-pvh-x86-64-gcc-debug: - *x86-64-test-needs - alpine-3.18-gcc-debug +zen4-smoke-x86-64-gcc-debug: + extends: .zen4-x86-64 + script: + - ./automation/scripts/qubes-x86-64.sh 2>&1 | tee ${LOGFILE} + needs: + - *x86-64-test-needs + - alpine-3.18-gcc-debug + +zen4-smoke-x86-64-dom0pvh gcc-debug: + extends: .zen4-x86-64 + script: + - ./automation/scripts/qubes-x86-64.sh dom0pvh 2>&1 | tee ${LOGFILE} + needs: + - *x86-64-test-needs + - alpine-3.18-gcc-debug + +zen4-pci-hvm-x86-64-gcc-debug: + extends: .zen4-x86-64 + script: + - ./automation/scripts/qubes-x86-64.sh pci-hvm 2>&1 | tee ${LOGFILE} + needs: + - *x86-64-test-needs + - alpine-3.18-gcc-debug + +zen4-tools-tests-pv-x86-64-gcc-debug: + extends: .zen4-x86-64 + script: + - ./automation/scripts/qubes-x86-64.sh tools-tests-pv 2>&1 | tee ${LOGFILE} + artifacts: + reports: + junit: tests-junit.xml + needs: + - *x86-64-test-needs + - alpine-3.18-gcc-debug + +zen4-tools-tests-pvh-x86-64-gcc-debug: + extends: .zen4-x86-64 + script: + - ./automation/scripts/qubes-x86-64.sh tools-tests-pvh 2>&1 | tee ${LOGFILE} + artifacts: + reports: + junit: tests-junit.xml + needs: + - *x86-64-test-needs + - alpine-3.18-gcc-debug + qemu-smoke-dom0-arm64-gcc: extends: .qemu-arm64 script: diff --git a/automation/tests-artifacts/kernel/6.12.21.dockerfile b/automation/tests-artifacts/kernel/6.12.21.dockerfile index d7d34031cab5..4e0a68ec61eb 100644 --- a/automation/tests-artifacts/kernel/6.12.21.dockerfile +++ b/automation/tests-artifacts/kernel/6.12.21.dockerfile @@ -19,6 +19,7 @@ RUN apt-get update && \ flex \ bison \ libelf-dev \ + libssl-dev \ && \ apt-get autoremove -y && \ apt-get clean && \ @@ -33,6 +34,7 @@ RUN curl -fsSLO https://cdn.kernel.org/pub/linux/kernel/v6.x/linux-"$LINUX_VERSI scripts/config --enable BRIDGE && \ scripts/config --enable IGC && \ scripts/config --enable TUN && \ + scripts/config --enable USB_RTL8152 && \ cp .config .config.orig && \ cat .config.orig | grep XEN | grep =m |sed 's/=m/=y/g' >> .config && \ make -j$(nproc) bzImage && \ -- git-series 0.9.1 From xen-devel-bounces@lists.xenproject.org Thu Apr 03 11:10:45 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 11:10:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936555.1337805 (Exim 4.92) (envelope-from ) id 1u0IT5-0003u9-W9; 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Signed-off-by: Jan Beulich --- unstable.orig/xen/include/xen/time.h 2024-11-21 21:12:47.000000000 +0100 +++ unstable/xen/include/xen/time.h 2025-04-03 13:17:59.784804154 +0200 @@ -53,7 +53,7 @@ struct tm gmtime(unsigned long t); struct tm wallclock_time(uint64_t *ns); #define SYSTEM_TIME_HZ 1000000000ULL -#define NOW() ((s_time_t)get_s_time()) +#define NOW() get_s_time() #define DAYS(_d) SECONDS((_d) * 86400ULL) #define SECONDS(_s) ((s_time_t)((_s) * 1000000000ULL)) #define MILLISECS(_ms) ((s_time_t)((_ms) * 1000000ULL)) From xen-devel-bounces@lists.xenproject.org Thu Apr 03 11:26:11 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 11:26:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936635.1337823 (Exim 4.92) (envelope-from ) id 1u0Ii3-0000cP-FO; Thu, 03 Apr 2025 11:26:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936635.1337823; Thu, 03 Apr 2025 11:26:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0Ii3-0000cI-C6; Thu, 03 Apr 2025 11:26:11 +0000 Received: by outflank-mailman (input) for mailman id 936635; Thu, 03 Apr 2025 11:26:11 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0Ii3-0000cB-0U for xen-devel@lists.xenproject.org; Thu, 03 Apr 2025 11:26:11 +0000 Received: from mail-wm1-x334.google.com (mail-wm1-x334.google.com [2a00:1450:4864:20::334]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 71512916-107e-11f0-9eaa-5ba50f476ded; Thu, 03 Apr 2025 13:26:10 +0200 (CEST) Received: by mail-wm1-x334.google.com with SMTP id 5b1f17b1804b1-43cec5cd73bso4093925e9.3 for ; Thu, 03 Apr 2025 04:26:10 -0700 (PDT) Received: from [192.168.1.183] (host-92-26-98-202.as13285.net. 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Thu, 03 Apr 2025 04:26:09 -0700 (PDT) Message-ID: Date: Thu, 3 Apr 2025 12:26:07 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] time: drop cast from NOW() To: Jan Beulich , "xen-devel@lists.xenproject.org" Cc: Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 03/04/2025 12:25 pm, Jan Beulich wrote: > It gives the wrong impression of there being a type change, when > get_s_time() really returns s_time_t itself (kind of naturally given its > name). > > Signed-off-by: Jan Beulich Acked-by: Andrew Cooper From xen-devel-bounces@lists.xenproject.org Thu Apr 03 11:29:23 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 11:29:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936646.1337834 (Exim 4.92) (envelope-from ) id 1u0Il6-0001D5-Sj; Thu, 03 Apr 2025 11:29:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936646.1337834; Thu, 03 Apr 2025 11:29:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0Il6-0001Cy-Pi; Thu, 03 Apr 2025 11:29:20 +0000 Received: by outflank-mailman (input) for mailman id 936646; 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Thu, 03 Apr 2025 04:29:18 -0700 (PDT) Message-ID: Date: Thu, 3 Apr 2025 13:29:16 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 01/11] ci: prevent grub unpacking initramfs To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= Cc: Andrew Cooper , Doug Goldstein , Stefano Stabellini , xen-devel@lists.xenproject.org References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 03.04.2025 13:04, Marek Marczykowski-Górecki wrote: > It fails on larger initramfs (~250MB one) and sometimes even smaller > depending on memory size/memory map, let Linux do it. Iirc grub only unpacks gzip-ed modules, so wouldn't a yet better approach be to use a better compressing algorithm, which simply as a side effect would keep grub from decompressing it, while at the same time moving farther away from any critical boundaries? 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Thu, 03 Apr 2025 04:32:40 -0700 (PDT) Message-ID: <9e4660fc-b78f-4323-8a1b-aca3d410edd3@suse.com> Date: Thu, 3 Apr 2025 13:32:38 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 02/11] ci: increase timeout for hw tests To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= Cc: Andrew Cooper , Doug Goldstein , Stefano Stabellini , xen-devel@lists.xenproject.org References: <7578489af5c7df525d4c82231b68bbb7d955d2b4.1743678257.git-series.marmarek@invisiblethingslab.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <7578489af5c7df525d4c82231b68bbb7d955d2b4.1743678257.git-series.marmarek@invisiblethingslab.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 03.04.2025 13:04, Marek Marczykowski-Górecki wrote: > It appears as sometimes it takes more time for Xen even start booting, > mostly due to firmware and fetching large boot files by grub. In some > jobs the current timeout is pretty close to the actual time needed, and > sometimes (rarely for now) test fails due to timeout expiring in the > middle of dom0 booting. This will be happening more often if the > initramfs will grow (and with more complex tests). With that, ... > This has been observed on some dom0pvh-hvm jobs, at least on runners hw3 > and hw11. > > Increase the timeout by yet another 60s (up to 180s now). ... is this little a bump going to be sufficient? How about moving straight to 5min? As to observed failing jobs - the PV Dom0 boot failure seen today looks to also be due to too short a timeout. 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="Z/3W7kebW6kr+ooI" Content-Disposition: inline In-Reply-To: --Z/3W7kebW6kr+ooI Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Thu, 3 Apr 2025 13:36:53 +0200 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: Jan Beulich Cc: Andrew Cooper , Doug Goldstein , Stefano Stabellini , xen-devel@lists.xenproject.org Subject: Re: [PATCH v1 01/11] ci: prevent grub unpacking initramfs On Thu, Apr 03, 2025 at 01:29:16PM +0200, Jan Beulich wrote: > On 03.04.2025 13:04, Marek Marczykowski-G=C3=B3recki wrote: > > It fails on larger initramfs (~250MB one) and sometimes even smaller > > depending on memory size/memory map, let Linux do it. >=20 > Iirc grub only unpacks gzip-ed modules, so wouldn't a yet better approach > be to use a better compressing algorithm, which simply as a side effect > would keep grub from decompressing it, while at the same time moving > farther away from any critical boundaries? That should also make the test faster (if it's a significant difference). OTOH likely we wouldn't have found the issue with map_pages_to_xen(). --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --Z/3W7kebW6kr+ooI Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmfuctYACgkQ24/THMrX 1yzaHgf+M7bxiY0Y8Cod7GFvsKzYODdbuM5w6tf29WZ6mdFYTWF8pQd546ZLhr1R ccyJV7ABkD9t03ufZn4i81dlsLQaLn+FcMgYw06uDoEbIidW0EJImGFMQnDzHgMN R8kj0JCEZTYr7Ia8EavYuD9mtZ0Pxu2ehbLVtDfPhxVJ6RmEAW7+UdDnbUO7wmrA x5I8TxzJ4DxhKaLE0cx+Y5Di23Qc5PAxbsfYUF7CLEZ8P4tzNj90Cw45nIcQ5L2a kUrv3H4MlmD5ERjGVXaB4qFa/ASuQCePiyFZOP2SnIrjd8LXXTDMozhv/ODVYWfi TZeD78E9HFqC/YrsXZqAE2nPqBF2cA== =ddMy -----END PGP SIGNATURE----- --Z/3W7kebW6kr+ooI-- From xen-devel-bounces@lists.xenproject.org Thu Apr 03 11:39:20 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 11:39:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936683.1337865 (Exim 4.92) (envelope-from ) id 1u0Iui-0005p6-By; Thu, 03 Apr 2025 11:39:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936683.1337865; Thu, 03 Apr 2025 11:39:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0Iui-0005oz-7g; Thu, 03 Apr 2025 11:39:16 +0000 Received: by outflank-mailman (input) for mailman id 936683; Thu, 03 Apr 2025 11:39:14 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0Iug-0005ot-QV for xen-devel@lists.xenproject.org; Thu, 03 Apr 2025 11:39:14 +0000 Received: from mail-wm1-x335.google.com (mail-wm1-x335.google.com [2a00:1450:4864:20::335]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 43be9055-1080-11f0-9ffb-bf95429c2676; Thu, 03 Apr 2025 13:39:12 +0200 (CEST) Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-43cef035a3bso5219465e9.1 for ; Thu, 03 Apr 2025 04:39:12 -0700 (PDT) Received: from [192.168.1.183] (host-92-26-98-202.as13285.net. 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Thu, 03 Apr 2025 04:39:12 -0700 (PDT) Message-ID: Date: Thu, 3 Apr 2025 12:39:11 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 01/11] ci: prevent grub unpacking initramfs To: Jan Beulich , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= Cc: Doug Goldstein , Stefano Stabellini , xen-devel@lists.xenproject.org References: Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 03/04/2025 12:29 pm, Jan Beulich wrote: > On 03.04.2025 13:04, Marek Marczykowski-Górecki wrote: >> It fails on larger initramfs (~250MB one) and sometimes even smaller >> depending on memory size/memory map, let Linux do it. > Iirc grub only unpacks gzip-ed modules, so wouldn't a yet better approach > be to use a better compressing algorithm, which simply as a side effect > would keep grub from decompressing it, while at the same time moving > farther away from any critical boundaries? Yes and no. This is going to change anyway when I (or a delgee) moves initrd generation from the test step itself into the test artefacts repo. Switching to a slower algorithm will impact every test step right now. Real systems doesn't see this in general, because it there's an uncompressed microcode container at the front, and it's not identified as being compressed at all. I'd prefer to stick with Marek's patch in the short term. ~Andrew From xen-devel-bounces@lists.xenproject.org Thu Apr 03 11:45:41 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 11:45:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936700.1337890 (Exim 4.92) (envelope-from ) id 1u0J0r-00014u-51; Thu, 03 Apr 2025 11:45:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936700.1337890; Thu, 03 Apr 2025 11:45:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0J0r-00014n-0x; Thu, 03 Apr 2025 11:45:37 +0000 Received: by outflank-mailman (input) for mailman id 936700; Thu, 03 Apr 2025 11:45:36 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) 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RECEIVED_SPAMHAUS_BLOCKED_OPENRESOLVER(0.00)[2a07:de40:b281:106:10:150:64:167:received]; RCPT_COUNT_SEVEN(0.00)[8]; ASN(0.00)[asn:25478, ipnet:::/0, country:RU]; RCVD_VIA_SMTP_AUTH(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:rdns,imap1.dmz-prg2.suse.org:helo,suse.com:dkim,suse.com:mid,suse.com:email] X-Rspamd-Server: rspamd1.dmz-prg2.suse.org X-Spam-Flag: NO X-Spam-Level: This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------cl6kC0jq2bdYm3uyaXj5pKAw Content-Type: multipart/mixed; boundary="------------IRID20eYKf0SCuMtDB0racen"; protected-headers="v1" From: Juergen Gross To: xen-devel@lists.xenproject.org, Julien Grall Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini Message-ID: Subject: Re: [PATCH v9 1/3] docs: update xenstore migration stream definition References: <20250314121835.1879-1-jgross@suse.com> <20250314121835.1879-2-jgross@suse.com> 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Thu, 03 Apr 2025 05:02:25 -0700 (PDT) Message-ID: Date: Thu, 3 Apr 2025 13:02:24 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/boot: re-order .init.data contributions To: Jan Beulich , "xen-devel@lists.xenproject.org" Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 01/04/2025 6:56 am, Jan Beulich wrote: > Putting a few bytes ahead of page tables isn't very efficient; there's > a gap almost worth a full page. To avoid re-ordering of items in the > source file, simply put the few small items in sub-section 1, for them > to end up after the page tables, followed (in the final binary) by non- > page-aligned items from other CUs. > > Signed-off-by: Jan Beulich > > --- a/xen/arch/x86/boot/head.S > +++ b/xen/arch/x86/boot/head.S > @@ -136,6 +136,7 @@ multiboot2_header: > .Lno_nx_msg: .asciz "ERR: Not an NX-capable CPU!" > > .section .init.data, "aw", @progbits > + .subsection 1 /* Put data here after the page tables (in x86_64.S). */ > .align 4 > > .word 0 Just as a note, this depends on the toolchain baseline bump, so can't be backported. Clang-11 does now like subsection, so we can remove the !__clang__ specialisation for UNLIKELY_{START,END}_SECTION. ~Andrew From xen-devel-bounces@lists.xenproject.org Thu Apr 03 12:03:38 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 12:03:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936737.1337910 (Exim 4.92) (envelope-from ) id 1u0JIH-0006lO-SM; Thu, 03 Apr 2025 12:03:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936737.1337910; Thu, 03 Apr 2025 12:03:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0JIH-0006lH-Pi; Thu, 03 Apr 2025 12:03:37 +0000 Received: by outflank-mailman (input) for mailman id 936737; Thu, 03 Apr 2025 12:03:36 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0JIG-0006Gl-P1 for xen-devel@lists.xenproject.org; Thu, 03 Apr 2025 12:03:36 +0000 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [2a00:1450:4864:20::336]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id abd57c05-1083-11f0-9eaa-5ba50f476ded; Thu, 03 Apr 2025 14:03:36 +0200 (CEST) Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-4394345e4d5so5048805e9.0 for ; Thu, 03 Apr 2025 05:03:35 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 03 Apr 2025 05:03:35 -0700 (PDT) Message-ID: Date: Thu, 3 Apr 2025 14:03:33 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 01/11] ci: prevent grub unpacking initramfs To: Andrew Cooper Cc: Doug Goldstein , Stefano Stabellini , xen-devel@lists.xenproject.org, =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 03.04.2025 13:39, Andrew Cooper wrote: > On 03/04/2025 12:29 pm, Jan Beulich wrote: >> On 03.04.2025 13:04, Marek Marczykowski-Górecki wrote: >>> It fails on larger initramfs (~250MB one) and sometimes even smaller >>> depending on memory size/memory map, let Linux do it. >> Iirc grub only unpacks gzip-ed modules, so wouldn't a yet better approach >> be to use a better compressing algorithm, which simply as a side effect >> would keep grub from decompressing it, while at the same time moving >> farther away from any critical boundaries? > > Yes and no. > > This is going to change anyway when I (or a delgee) moves initrd > generation from the test step itself into the test artefacts repo. > > Switching to a slower algorithm will impact every test step right now. > > Real systems doesn't see this in general, because it there's an > uncompressed microcode container at the front, and it's not identified > as being compressed at all. > > I'd prefer to stick with Marek's patch in the short term. Fair enough. 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Thu, 03 Apr 2025 05:06:58 -0700 (PDT) Message-ID: <3928bdd8-56d8-489a-ba6a-42ca3d93964b@suse.com> Date: Thu, 3 Apr 2025 14:06:56 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/boot: re-order .init.data contributions To: Andrew Cooper Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , "xen-devel@lists.xenproject.org" References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 03.04.2025 14:02, Andrew Cooper wrote: > On 01/04/2025 6:56 am, Jan Beulich wrote: >> Putting a few bytes ahead of page tables isn't very efficient; there's >> a gap almost worth a full page. To avoid re-ordering of items in the >> source file, simply put the few small items in sub-section 1, for them >> to end up after the page tables, followed (in the final binary) by non- >> page-aligned items from other CUs. >> >> Signed-off-by: Jan Beulich >> >> --- a/xen/arch/x86/boot/head.S >> +++ b/xen/arch/x86/boot/head.S >> @@ -136,6 +136,7 @@ multiboot2_header: >> .Lno_nx_msg: .asciz "ERR: Not an NX-capable CPU!" >> >> .section .init.data, "aw", @progbits >> + .subsection 1 /* Put data here after the page tables (in x86_64.S). */ >> .align 4 >> >> .word 0 > > Just as a note, this depends on the toolchain baseline bump, so can't be > backported. > > Clang-11 does now like subsection, so we can remove the !__clang__ > specialisation for UNLIKELY_{START,END}_SECTION. Funny you should mention that: I did check before even making the change, and in assembly code we used .subsection already before. We just needed to be careful about inline assembly. See UNLIKELY_START() vs the two forms of UNLIKELY_START_SECTION. Irrespective of that: I had no intention to backport this. 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="HpxtcURhaqsRspkz" Content-Disposition: inline In-Reply-To: <9e4660fc-b78f-4323-8a1b-aca3d410edd3@suse.com> --HpxtcURhaqsRspkz Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Thu, 3 Apr 2025 14:25:32 +0200 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: Jan Beulich Cc: Andrew Cooper , Doug Goldstein , Stefano Stabellini , xen-devel@lists.xenproject.org Subject: Re: [PATCH v1 02/11] ci: increase timeout for hw tests On Thu, Apr 03, 2025 at 01:32:38PM +0200, Jan Beulich wrote: > On 03.04.2025 13:04, Marek Marczykowski-G=C3=B3recki wrote: > > It appears as sometimes it takes more time for Xen even start booting, > > mostly due to firmware and fetching large boot files by grub. In some > > jobs the current timeout is pretty close to the actual time needed, and > > sometimes (rarely for now) test fails due to timeout expiring in the > > middle of dom0 booting. This will be happening more often if the > > initramfs will grow (and with more complex tests). >=20 > With that, ... >=20 > > This has been observed on some dom0pvh-hvm jobs, at least on runners hw3 > > and hw11. > >=20 > > Increase the timeout by yet another 60s (up to 180s now). >=20 > ... is this little a bump going to be sufficient? How about moving straig= ht > to 5min? I don't like this, as many (most) actual failures are visible as timeout (for example panic that prevents reaching Alpine prompt). One improvement I can see is splitting this into two separate timeouts: one before seeing the first line from Xen and then the second one for reaching Alpine login prompt. The first one can be longer as its mostly about firmware+fetching boot files and shouldn't hit on crashes (unless a crash happen before printing anything on the console - but those are rare). > As to observed failing jobs - the PV Dom0 boot failure seen today looks to > also be due to too short a timeout. As responded on Matrix, I'm not so sure, there is over 1m wait after "Built 1 zonelists, mobility grouping on. Total pages: 8228487" line =66rom dom0 (or a bit later, due to buffering by sed), while in successful test next lines follow instantaneously. --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --HpxtcURhaqsRspkz Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmfufjwACgkQ24/THMrX 1yxQfwf7B3erNxfwdP8M6xErtOisjCkENZOPtm63gUzStPJakX2qEqycfCGncf7D 4rfprv321vgK9+zO+/jl6QlwW3rpIKLlpt7koBSwDF1cvd761uZl7nCwcHXSI+t4 voHSxHB7PEWG8K4yDFwo0KyWc6ijQ3FWzoAzTnFECQXHc03W1GCHg/ewh8AycLM0 5gii3JUBFb4DAku+JyoirZY7VsfLG8yr2bbfW2BaukkpU0Vlj7+N37E1Gw6GZ9WO FLv1cQKaJaTeWgk3TFhG8asmvOOplf0ocAdZimi8RjJtM4478OpYcEUw73otbuYh NK7121JFR5L4FK7xLQEeBgIAsOMHaA== =CnYR -----END PGP SIGNATURE----- --HpxtcURhaqsRspkz-- From xen-devel-bounces@lists.xenproject.org Thu Apr 03 12:44:50 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 12:44:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936782.1337940 (Exim 4.92) (envelope-from ) id 1u0Jw4-0003GC-An; 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charset=utf-8 Content-Transfer-Encoding: 7bit AMD Translation Cache Extension is a flag that can be enabled in the EFER MSR to optimize some TLB flushes. Enable this flag if supported by hardware. AMD Architecture Developer Manual describe this feature as follow > Setting this bit to 1 changes how the INVLPG, INVLPGB, and INVPCID instructions operate > on TLB entries. When this bit is 0, these instructions remove the target PTE from the > TLB as well as all upper-level table entries that are cached in the TLB, whether or not > they are associated with the target PTE. When this bit is set, these instructions will > remove the target PTE and only those upper-level entries that lead to the target PTE in > the page table hierarchy, leaving unrelated upper-level entries intact. This may provide > a performance benefit. Signed-off-by: Teddy Astie --- RFC: - is this change actually safe ? - should we add a tce/no-tce option to opt-in/out this feature ? - is this flag enabled at the right moment during boot ? --- xen/arch/x86/include/asm/cpufeature.h | 1 + xen/arch/x86/include/asm/msr-index.h | 1 + xen/arch/x86/setup.c | 7 +++++++ xen/arch/x86/smpboot.c | 3 +++ xen/include/public/arch-x86/cpufeatureset.h | 1 + 5 files changed, 13 insertions(+) diff --git a/xen/arch/x86/include/asm/cpufeature.h b/xen/arch/x86/include/asm/cpufeature.h index 05399fb9c9..ab6d07b767 100644 --- a/xen/arch/x86/include/asm/cpufeature.h +++ b/xen/arch/x86/include/asm/cpufeature.h @@ -114,6 +114,7 @@ static inline bool boot_cpu_has(unsigned int feat) #define cpu_has_xop boot_cpu_has(X86_FEATURE_XOP) #define cpu_has_skinit boot_cpu_has(X86_FEATURE_SKINIT) #define cpu_has_fma4 boot_cpu_has(X86_FEATURE_FMA4) +#define cpu_has_tce boot_cpu_has(X86_FEATURE_TCE) #define cpu_has_tbm boot_cpu_has(X86_FEATURE_TBM) /* CPUID level 0x0000000D:1.eax */ diff --git a/xen/arch/x86/include/asm/msr-index.h b/xen/arch/x86/include/asm/msr-index.h index 22d9e76e55..d7b3a4bc40 100644 --- a/xen/arch/x86/include/asm/msr-index.h +++ b/xen/arch/x86/include/asm/msr-index.h @@ -200,6 +200,7 @@ #define EFER_NXE (_AC(1, ULL) << 11) /* No Execute Enable */ #define EFER_SVME (_AC(1, ULL) << 12) /* Secure Virtual Machine Enable */ #define EFER_FFXSE (_AC(1, ULL) << 14) /* Fast FXSAVE/FXRSTOR */ +#define EFER_TCE (_AC(1, ULL) << 15) /* Translation Cache Extensions */ #define EFER_AIBRSE (_AC(1, ULL) << 21) /* Automatic IBRS Enable */ #define EFER_KNOWN_MASK \ diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index d70abb7e0c..96f200f853 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -2008,6 +2008,13 @@ void asmlinkage __init noreturn __start_xen(void) if ( cpu_has_pku ) set_in_cr4(X86_CR4_PKE); + if ( boot_cpu_has(X86_FEATURE_TCE) ) + { + printk("Enabling AMD TCE\n"); + + write_efer(read_efer() | EFER_TCE); + } + if ( opt_invpcid && cpu_has_invpcid ) use_invpcid = true; diff --git a/xen/arch/x86/smpboot.c b/xen/arch/x86/smpboot.c index 54207e6d88..fbd1710720 100644 --- a/xen/arch/x86/smpboot.c +++ b/xen/arch/x86/smpboot.c @@ -372,6 +372,9 @@ void asmlinkage start_secondary(void *unused) microcode_update_one(); + if ( boot_cpu_has(X86_FEATURE_TCE) ) + write_efer(read_efer() | EFER_TCE); + /* * If any speculative control MSRs are available, apply Xen's default * settings. Note: These MSRs may only become available after loading diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index cc6e984a88..a0c8d561fb 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -170,6 +170,7 @@ XEN_CPUFEATURE(SKINIT, 3*32+12) /* SKINIT/STGI instructions */ XEN_CPUFEATURE(WDT, 3*32+13) /* Watchdog timer */ XEN_CPUFEATURE(LWP, 3*32+15) /* Light Weight Profiling */ XEN_CPUFEATURE(FMA4, 3*32+16) /*A 4 operands MAC instructions */ +XEN_CPUFEATURE(TCE, 3*32+17) /* Translation Cache Extension support */ XEN_CPUFEATURE(NODEID_MSR, 3*32+19) /* NodeId MSR */ XEN_CPUFEATURE(TBM, 3*32+21) /*A trailing bit manipulations */ XEN_CPUFEATURE(TOPOEXT, 3*32+22) /* topology extensions CPUID leafs */ -- 2.47.2 Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Thu Apr 03 12:59:08 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 12:59:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936796.1337949 (Exim 4.92) (envelope-from ) id 1u0K9v-0006Gl-FH; Thu, 03 Apr 2025 12:59:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936796.1337949; Thu, 03 Apr 2025 12:59:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0K9v-0006Ge-Cn; Thu, 03 Apr 2025 12:59:03 +0000 Received: by outflank-mailman (input) for mailman id 936796; Thu, 03 Apr 2025 12:59:01 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0K9t-0006GY-P8 for xen-devel@lists.xenproject.org; Thu, 03 Apr 2025 12:59:01 +0000 Received: from mail-wr1-x42f.google.com (mail-wr1-x42f.google.com [2a00:1450:4864:20::42f]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 68c3b882-108b-11f0-9ffb-bf95429c2676; Thu, 03 Apr 2025 14:58:59 +0200 (CEST) Received: by mail-wr1-x42f.google.com with SMTP id ffacd0b85a97d-39ac56756f6so727014f8f.2 for ; Thu, 03 Apr 2025 05:58:59 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 03 Apr 2025 05:58:58 -0700 (PDT) Message-ID: <73b1dd32-c15e-46c4-982c-9b7a33c8785b@suse.com> Date: Thu, 3 Apr 2025 14:58:57 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH] x86/amd: Add support for AMD TCE To: Teddy Astie Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , xen-devel@lists.xenproject.org References: <6b751a400df49217defc89a19b3ac2ca33ab7690.1743683787.git.teddy.astie@vates.tech> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <6b751a400df49217defc89a19b3ac2ca33ab7690.1743683787.git.teddy.astie@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 03.04.2025 14:44, Teddy Astie wrote: > AMD Translation Cache Extension is a flag that can be enabled in the EFER MSR to optimize > some TLB flushes. Enable this flag if supported by hardware. > > AMD Architecture Developer Manual describe this feature as follow >> Setting this bit to 1 changes how the INVLPG, INVLPGB, and INVPCID instructions operate >> on TLB entries. When this bit is 0, these instructions remove the target PTE from the >> TLB as well as all upper-level table entries that are cached in the TLB, whether or not >> they are associated with the target PTE. When this bit is set, these instructions will >> remove the target PTE and only those upper-level entries that lead to the target PTE in >> the page table hierarchy, leaving unrelated upper-level entries intact. This may provide >> a performance benefit. > > Signed-off-by: Teddy Astie > --- > RFC: > - is this change actually safe ? Well, before getting here with reading I was already about to ask this very question. It's really you who needs to prove it. > - should we add a tce/no-tce option to opt-in/out this feature ? Unless we're entirely certain we got this right and didn't overlook any corner case, perhaps better to do so. > - is this flag enabled at the right moment during boot ? If (as you appear to take as a base assumption) our code is safe towards this behavioral change, then it would be largely irrelevant when you set the bit. So to answer this question the first point above needs sorting. > --- a/xen/arch/x86/include/asm/cpufeature.h > +++ b/xen/arch/x86/include/asm/cpufeature.h > @@ -114,6 +114,7 @@ static inline bool boot_cpu_has(unsigned int feat) > #define cpu_has_xop boot_cpu_has(X86_FEATURE_XOP) > #define cpu_has_skinit boot_cpu_has(X86_FEATURE_SKINIT) > #define cpu_has_fma4 boot_cpu_has(X86_FEATURE_FMA4) > +#define cpu_has_tce boot_cpu_has(X86_FEATURE_TCE) If you add this, ... > --- a/xen/arch/x86/setup.c > +++ b/xen/arch/x86/setup.c > @@ -2008,6 +2008,13 @@ void asmlinkage __init noreturn __start_xen(void) > if ( cpu_has_pku ) > set_in_cr4(X86_CR4_PKE); > > + if ( boot_cpu_has(X86_FEATURE_TCE) ) ... the please also use it. > --- a/xen/arch/x86/smpboot.c > +++ b/xen/arch/x86/smpboot.c > @@ -372,6 +372,9 @@ void asmlinkage start_secondary(void *unused) > > microcode_update_one(); > > + if ( boot_cpu_has(X86_FEATURE_TCE) ) > + write_efer(read_efer() | EFER_TCE); Same here. But I wonder if you couldn't set the bit in trampoline_efer. Jan From xen-devel-bounces@lists.xenproject.org Thu Apr 03 13:00:37 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 13:00:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936807.1337960 (Exim 4.92) (envelope-from ) id 1u0KBP-0007rZ-R7; Thu, 03 Apr 2025 13:00:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936807.1337960; Thu, 03 Apr 2025 13:00:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0KBP-0007rS-N5; Thu, 03 Apr 2025 13:00:35 +0000 Received: by outflank-mailman (input) for mailman id 936807; Thu, 03 Apr 2025 13:00:34 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0KBO-0007rM-AH for xen-devel@lists.xenproject.org; Thu, 03 Apr 2025 13:00:34 +0000 Received: from mail180-44.suw31.mandrillapp.com (mail180-44.suw31.mandrillapp.com [198.2.180.44]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 9ff7d80d-108b-11f0-9eaa-5ba50f476ded; Thu, 03 Apr 2025 15:00:32 +0200 (CEST) Received: from pmta11.mandrill.prod.suw01.rsglab.com (localhost [127.0.0.1]) by mail180-44.suw31.mandrillapp.com (Mailchimp) with ESMTP id 4ZT20H0W9Vz705bZH for ; Thu, 3 Apr 2025 13:00:31 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id 1f748e6c7f4c4a6c8618dfa17ce7b8a8; Thu, 03 Apr 2025 13:00:31 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 9ff7d80d-108b-11f0-9eaa-5ba50f476ded DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1743685231; x=1743955231; bh=PtWh1hVlkS5h3kJsg3a8eQ616S5HQJRll+KdsJj75oE=; h=From:Subject:To:Cc:Message-Id:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=AqSV5kMjyzO63F04rzzSsMIVZQPGdqbeGk6m7JHh3HBUXyASlzgQh4niSGbp3+zed SUFt4KtIvOC5yl5cs469gotkdIq9CFIgzQBoiXFjTiMtFJp1VwCfKrQU+MqpTQWyFQ yYx1rJbEEmH33jEZttVndMQ8MYKeJwKyRArrUJv1nT7MTE88x6svx1T69Q9nO1uIzh MCQzbtpn5hOlkFJYM4QCjsLYvbdg5dZ+2PAuKKDFLdFAmYs0EMb3apiRRRjEkkbtL4 5w3mmTnHzGYsCcj6mUE01sDM84k8HPN6zZxVI2rh1K4nZs3bbI1sB2xE5Grukb7tNv VZ+7M3BXrM6oA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1743685231; x=1743945731; i=anthony.perard@vates.tech; bh=PtWh1hVlkS5h3kJsg3a8eQ616S5HQJRll+KdsJj75oE=; h=From:Subject:To:Cc:Message-Id:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=jcl4unUa/oe2vYQkJ30Iwe4nQLfX6BOTEwq7v5XyE817lJwOLpypSD7civAq05Q4J tb9WYJKuHjSPMB9wXb10NzvByte3E32D7PeDu+86esy+NAyw2PQ7yKnM1cQentsr7N yGSIdGw7JaRy8nf7AHGootXkd7aLtrjF9+8jhht/6w5s2to+k7IFRVqGBjqPM1+p31 DOiE0nAcpKWEQMjRfUe1aivqKoVjCNYFkD0mjYPGxuBctOF4nNVjkoxXl0/hfhx0WJ H093QEsqELs4P9+GW1j5P+VeGos/f4AC+8Qu/B6w3ZLuxj4hJ4MVq1hwQw9FLGxwV1 K9dLRTkGmvEhQ== From: "Anthony PERARD" Subject: =?utf-8?Q?Re:=20[PATCH]=20x86emul:=20replace=20=5FBYTES=5FPER=5FLONG?= X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1743685229930 To: "Jan Beulich" Cc: xen-devel@lists.xenproject.org, "Andrew Cooper" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" Message-Id: References: <09082f8f-5c1a-43c9-9b84-19d832e0849d@suse.com> In-Reply-To: <09082f8f-5c1a-43c9-9b84-19d832e0849d@suse.com> X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.1f748e6c7f4c4a6c8618dfa17ce7b8a8?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20250403:md Date: Thu, 03 Apr 2025 13:00:31 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit On Mon, Mar 31, 2025 at 05:52:27PM +0200, Jan Beulich wrote: > We can now easily use __SIZEOF_LONG__ instead. For this to also work in > the test harness, move hvmloader's STR() to common-macros.h. > > Signed-off-by: Jan Beulich Acked-by: Anthony PERARD > Quite likely libxl{,u}_internal.h's STRINGIFY() could then also be > replaced. Sounds good. It seems the different between STR() and TOSTRING() is that a comma can be use as well with STR, so not really a useful difference. Thanks, -- Anthony Perard | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Thu Apr 03 13:16:12 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 13:16:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936822.1337970 (Exim 4.92) (envelope-from ) id 1u0KQJ-0003jB-2c; Thu, 03 Apr 2025 13:15:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936822.1337970; Thu, 03 Apr 2025 13:15:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0KQI-0003j4-VT; Thu, 03 Apr 2025 13:15:58 +0000 Received: by outflank-mailman (input) for mailman id 936822; Thu, 03 Apr 2025 13:15:57 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0KQG-0003iy-Qg for xen-devel@lists.xenproject.org; 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charset=utf-8 Content-Transfer-Encoding: 7bit On Thu, Apr 03, 2025 at 09:30:21AM +0200, Jan Beulich wrote: > On 01.04.2025 03:17, Volodymyr Babchuk wrote: > > --- a/xen/Rules.mk > > +++ b/xen/Rules.mk > > @@ -138,6 +138,9 @@ ifeq ($(CONFIG_CC_IS_CLANG),y) > > COV_FLAGS := -fprofile-instr-generate -fcoverage-mapping > > else > > COV_FLAGS := -fprofile-arcs -ftest-coverage > > +ifeq ($(CONFIG_CONDITION_COVERAGE),y) > > + COV_FLAGS += -fcondition-coverage > > +endif > > endif > > Personally I find ifeq() uses like this unhelpful, and would prefer > > COV_FLAGS-$(CONFIG_CONDITION_COVERAGE) += -fcondition-coverage > together with an eventual > > COV_FLAGS += $(COV_FLAGS-y) > > (if we don't already have one). Not we don't. About renaming $(COV_FLAGS) to $(cov-flags-y) instead? It is simpler as we stay with a single variable for coverage flags. -- Anthony Perard | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Thu Apr 03 13:50:58 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 13:50:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936834.1337979 (Exim 4.92) (envelope-from ) id 1u0Ky4-00055W-Cn; Thu, 03 Apr 2025 13:50:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936834.1337979; Thu, 03 Apr 2025 13:50:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0Ky4-00055P-A9; Thu, 03 Apr 2025 13:50:52 +0000 Received: by outflank-mailman (input) for mailman id 936834; Thu, 03 Apr 2025 13:50:51 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0Ky2-00050L-Up for xen-devel@lists.xenproject.org; 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charset=utf-8 Content-Transfer-Encoding: 7bit On Thu, Apr 03, 2025 at 12:00:39PM +0200, Jan Beulich wrote: > On 03.04.2025 11:35, Orzel, Michal wrote: > > A different question (also to other people who knows this stuff). > > MPU requires to specify Xen start address using CONFIG_XEN_START_ADDRESS that is > > set to invalid default value to catch user attention. Provided that randconfig > > can select UNSUPPORTED and MPU, we should somehow set CONFIG_XEN_START_ADDRESS > > to e.g. 0 to be able to build successfully. Is this where we need to add > > EXTRA_FIXED_RANDCONFIG to existing arm64 and arm32 randconfig jobs? > > In principle some override like this will be needed, I think, yet that undermines > the randomness of the build. From what I can tell the sole constraint on > XEN_START_ADDRESS is that it needs to be page aligned (for whatever reason; I > didn't think there was the concept of "pages" without an MMU [1]). Arbitrary > values satisfying this constraint ought to be selectable by random configurations. > Which would then - hopefully - also trigger the case where XEN_START_ADDRESS is > e.g. so large that Xen can't fit in the remaining address space anymore. Plus > perhaps any other constraints presently not enforced. > > How to deal with all of this, i.e. how to leave as much flexibility as possible > to randconfig, I simply don't know. Extending the Cc list in the hope for someone > to provide some insight. It doesn't looks like kconfig have support for randomizing hex values. So you'll have to provide a value for XEN_START_ADDRESS that actually respect the contrain written in prose, since the default doesn't. Ah, the prompt of that config value is way to long and contain explanation that ought to be in the help message instead. So I guess the default value is the choose default value option, so probably fine for randconfig. Cheers, -- Anthony Perard | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Thu Apr 03 14:07:54 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 14:07:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936855.1337989 (Exim 4.92) (envelope-from ) id 1u0LES-0008Bm-Pi; Thu, 03 Apr 2025 14:07:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936855.1337989; Thu, 03 Apr 2025 14:07:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0LES-0008Bf-Mu; Thu, 03 Apr 2025 14:07:48 +0000 Received: by outflank-mailman (input) for mailman id 936855; Thu, 03 Apr 2025 14:07:47 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0LEQ-0008BZ-Ox for xen-devel@lists.xenproject.org; Thu, 03 Apr 2025 14:07:46 +0000 Received: from mail180-44.suw31.mandrillapp.com (mail180-44.suw31.mandrillapp.com [198.2.180.44]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 02d48c1b-1095-11f0-9eaa-5ba50f476ded; Thu, 03 Apr 2025 16:07:44 +0200 (CEST) Received: from pmta11.mandrill.prod.suw01.rsglab.com (localhost [127.0.0.1]) by mail180-44.suw31.mandrillapp.com (Mailchimp) with ESMTP id 4ZT3Tp3k9yz705bPd for ; Thu, 3 Apr 2025 14:07:42 +0000 (GMT) Received: from [37.26.189.201] by mandrillapp.com id 593e12f073a34b31910b4c080aa294d0; Thu, 03 Apr 2025 14:07:42 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 02d48c1b-1095-11f0-9eaa-5ba50f476ded DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mandrillapp.com; s=mte1; t=1743689262; x=1743959262; bh=dnyqZmyapdPA7XEuGH6HxDM6nIlOwjs8gSceVqZ4MgI=; h=From:Subject:To:Cc:Message-Id:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=Szdtc6/+z54mk+sVh7iE8m7KJuC3c9FHMA49OT0mjFDrsASmmAd92KAJ0Dafe/COv 6JA9c4IxegNUZqhED3vm1qynVDRqbULiKeO+ODOjAAABxWH2kiopVGq2B3InGRBRPI 9Em+JP+rNCUGR4q4pHjtJSJzb0lMx4fFBtX4606diLvpOCXFLVdb1xcjvJoknpFKiw 29Y6FraSnZiz5HVwyjt9lDTMBCZxpBF/COmEto+Ntos+afnEs8Xnl5ewv25XGw4aup LRF5u+JVqJg4pkKGvww+MIUwyQuaOpVHtLduDgT1AADfGzCqbIdwF2jzDVJVVsv5Fz 5t7mSX+E2g1Pw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; s=mte1; t=1743689262; x=1743949762; i=anthony.perard@vates.tech; bh=dnyqZmyapdPA7XEuGH6HxDM6nIlOwjs8gSceVqZ4MgI=; h=From:Subject:To:Cc:Message-Id:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=M4oNS69eZDdqx1OOjRRKlMdsPa2XD/GMlBpsheJ71lnzi6xEMRV82MGsJrjH6TqlA uNuJbns0PYCjDcNxUNBmb5u9oNftF8yZ6rDCMU8sP8oXVbXsfcNAj0FKRxBm8z89qN 5ljWCtPsdj+8AUI4YrxHA4oSKNXymzsxcqL77l05aRK6k0fkOuNyqwZ4o6YO4h4vpJ Jg+f6AOh8wIxoNcJc7jtTYpdaqGYJYdxcSj3Xor9Q45LLqW1XGU/QBAaLufQC0+aY/ yq2mOu5hjsCH5bvXqCUGzomIdNjEtHZzM0Qh3CZ3FUkS/Ulcbsg7n9caZjWawutIxu p9QEbv7N4SGrQ== From: "Anthony PERARD" Subject: =?utf-8?Q?Re:=20[PATCH]=20xen/arch:=20Simplify=20$(TARGET)-syms=20rule?= X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1743689260286 To: "Andrew Cooper" Cc: Xen-devel , "Michal Orzel" , "Jan Beulich" , "Julien Grall" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Stefano Stabellini" , "Volodymyr Babchuk" , "Bertrand Marquis" , "Shawn Anastasio" , "Oleksii Kurochko" Message-Id: References: <20250401144703.961836-1-andrew.cooper3@citrix.com> In-Reply-To: <20250401144703.961836-1-andrew.cooper3@citrix.com> X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.593e12f073a34b31910b4c080aa294d0?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20250403:md Date: Thu, 03 Apr 2025 14:07:42 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit On Tue, Apr 01, 2025 at 03:47:03PM +0100, Andrew Cooper wrote: > diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile > index 129a109d6ec5..811adf3567c4 100644 > --- a/xen/arch/arm/Makefile > +++ b/xen/arch/arm/Makefile > @@ -96,21 +96,19 @@ ifeq ($(CONFIG_ARM_64),y) > ln -sf $(@F) $@.efi > endif > > +$(TARGET)-syms: XEN_LDFLAGS += -T $(obj)/xen.lds I would advise againts this change. Target-specific variables values tend to apply to prerequist as well, so XEN_LDFLAGS will also be modified when building prelink.o and xen.lds. It's might be ok in this case because xen.lds doesn't use it, and prelink.o happen to be linked in a different Makefile, but that's kind of setting a trap for someone to fall into. There's a keyword to keep the variable change strictly to $(TARGET)-syms but that requires a more recent version of GNU make. That would be "private" if we could use it. Looks like we need GNU make 3.82 to use "private": "GNU make 3.82 is now available" https://lists.gnu.org/archive/html/info-gnu/2010-07/msg00023.html > $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds > - $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< \ > - $(objtree)/common/symbols-dummy.o -o $(dot-target).0 > + $(LD) $(XEN_LDFLAGS) $< $(objtree)/common/symbols-dummy.o -o $(dot-target).0 Cheers, -- Anthony Perard | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Thu Apr 03 14:08:36 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 14:08:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936865.1338000 (Exim 4.92) (envelope-from ) id 1u0LFE-0000Ex-20; Thu, 03 Apr 2025 14:08:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936865.1338000; Thu, 03 Apr 2025 14:08:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0LFD-0000Eq-VT; Thu, 03 Apr 2025 14:08:35 +0000 Received: by outflank-mailman (input) for mailman id 936865; Thu, 03 Apr 2025 14:08:34 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0LFC-0008BZ-Qc for xen-devel@lists.xenproject.org; Thu, 03 Apr 2025 14:08:34 +0000 Received: from mail-wr1-x430.google.com (mail-wr1-x430.google.com [2a00:1450:4864:20::430]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 210fd271-1095-11f0-9eaa-5ba50f476ded; Thu, 03 Apr 2025 16:08:34 +0200 (CEST) Received: by mail-wr1-x430.google.com with SMTP id ffacd0b85a97d-39149bccb69so827276f8f.2 for ; Thu, 03 Apr 2025 07:08:34 -0700 (PDT) Received: from [192.168.1.183] (host-92-26-98-202.as13285.net. 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Thu, 03 Apr 2025 07:08:33 -0700 (PDT) Message-ID: <463eca2f-9e2a-474c-ae5a-4ed6cfe01ff8@citrix.com> Date: Thu, 3 Apr 2025 15:08:32 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH] x86/amd: Add support for AMD TCE To: Jan Beulich , Teddy Astie Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , xen-devel@lists.xenproject.org References: <6b751a400df49217defc89a19b3ac2ca33ab7690.1743683787.git.teddy.astie@vates.tech> <73b1dd32-c15e-46c4-982c-9b7a33c8785b@suse.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <73b1dd32-c15e-46c4-982c-9b7a33c8785b@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 03/04/2025 1:58 pm, Jan Beulich wrote: > On 03.04.2025 14:44, Teddy Astie wrote: >> Signed-off-by: Teddy Astie >> --- >> RFC: >> - is this change actually safe ? > Well, before getting here with reading I was already about to ask this very > question. It's really you who needs to prove it. > >> - should we add a tce/no-tce option to opt-in/out this feature ? > Unless we're entirely certain we got this right and didn't overlook any > corner case, perhaps better to do so. To bring across a quote of mine from Mattermost: "I'm reasonably sure our TLB handling algorithm is safe for it, following the PCID work we did for Meltdown" But, proving this is hard. Some history: INVLPG flushing the entire paging structure cache (non-leaf mappings) was a last-minute "fix" to keep Windows working on the Pentium(?), where it had started using INVLPG from the 486(?) but with a logical error. AMD's TCE feature is "that's a hefty hit to keep around, so here's an option for the behaviour one would more reasonably expect from INVLPG". Anyway.  I have a suspicion that Intel's INVPCID no longer followed the INVLPG behaviour anyway, and that we were forced to account for that.  However, I'm struggling to find confirmation one way or another in the SDM. Another mitigating factor is that, because we use recursive pagetables, we have to upgrade an INVLPG into a full flush anyway if we edited non-leaf entries. As to a cmdline option, there's cpuid=no-tce if we really really need it, but I don't think we want a dedicated TCE option. >> --- a/xen/arch/x86/smpboot.c >> +++ b/xen/arch/x86/smpboot.c >> @@ -372,6 +372,9 @@ void asmlinkage start_secondary(void *unused) >> >> microcode_update_one(); >> >> + if ( boot_cpu_has(X86_FEATURE_TCE) ) >> + write_efer(read_efer() | EFER_TCE); > Same here. But I wonder if you couldn't set the bit in trampoline_efer. Yes, do set it in trampoline_efer, and drop this hunk. ~Andrew From xen-devel-bounces@lists.xenproject.org Thu Apr 03 14:18:25 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 14:18:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936880.1338010 (Exim 4.92) (envelope-from ) id 1u0LOZ-0003Hb-TL; Thu, 03 Apr 2025 14:18:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936880.1338010; Thu, 03 Apr 2025 14:18:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0LOZ-0003HR-QH; Thu, 03 Apr 2025 14:18:15 +0000 Received: by outflank-mailman (input) for mailman id 936880; Thu, 03 Apr 2025 14:18:14 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0LOY-0003HJ-Tm for xen-devel@lists.xenproject.org; Thu, 03 Apr 2025 14:18:14 +0000 Received: from mail-wm1-x333.google.com (mail-wm1-x333.google.com [2a00:1450:4864:20::333]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 7802c1d4-1096-11f0-9ffb-bf95429c2676; Thu, 03 Apr 2025 16:18:09 +0200 (CEST) Received: by mail-wm1-x333.google.com with SMTP id 5b1f17b1804b1-43cec5cd73bso5563795e9.3 for ; Thu, 03 Apr 2025 07:18:11 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 03 Apr 2025 07:18:11 -0700 (PDT) Message-ID: <3e330a8b-1b90-4d3d-beca-a3786f3532ec@suse.com> Date: Thu, 3 Apr 2025 16:18:09 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 3/3] xen: debug: gcov: add condition coverage support To: Anthony PERARD Cc: Volodymyr Babchuk , Andrew Cooper , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <20250401011744.2267367-1-volodymyr_babchuk@epam.com> <20250401011744.2267367-4-volodymyr_babchuk@epam.com> <7281b7d8-ba7b-4658-82f1-a63d66c1baff@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 03.04.2025 15:15, Anthony PERARD wrote: > On Thu, Apr 03, 2025 at 09:30:21AM +0200, Jan Beulich wrote: >> On 01.04.2025 03:17, Volodymyr Babchuk wrote: >>> --- a/xen/Rules.mk >>> +++ b/xen/Rules.mk >>> @@ -138,6 +138,9 @@ ifeq ($(CONFIG_CC_IS_CLANG),y) >>> COV_FLAGS := -fprofile-instr-generate -fcoverage-mapping >>> else >>> COV_FLAGS := -fprofile-arcs -ftest-coverage >>> +ifeq ($(CONFIG_CONDITION_COVERAGE),y) >>> + COV_FLAGS += -fcondition-coverage >>> +endif >>> endif >> >> Personally I find ifeq() uses like this unhelpful, and would prefer >> >> COV_FLAGS-$(CONFIG_CONDITION_COVERAGE) += -fcondition-coverage >> together with an eventual >> >> COV_FLAGS += $(COV_FLAGS-y) >> >> (if we don't already have one). > > Not we don't. About renaming $(COV_FLAGS) to $(cov-flags-y) instead? It > is simpler as we stay with a single variable for coverage flags. I'd be all for doing that. Jan From xen-devel-bounces@lists.xenproject.org Thu Apr 03 16:03:18 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 16:03:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936916.1338035 (Exim 4.92) (envelope-from ) id 1u0N23-0004ki-5r; Thu, 03 Apr 2025 16:03:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 936916.1338035; Thu, 03 Apr 2025 16:03:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0N23-0004kb-3E; Thu, 03 Apr 2025 16:03:07 +0000 Received: by outflank-mailman (input) for mailman id 936916; Thu, 03 Apr 2025 16:03:06 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0N21-0004kV-S4 for xen-devel@lists.xenproject.org; Thu, 03 Apr 2025 16:03:05 +0000 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [2a00:1450:4864:20::42b]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 1dd54551-10a5-11f0-9ffb-bf95429c2676; Thu, 03 Apr 2025 18:03:00 +0200 (CEST) Received: by mail-wr1-x42b.google.com with SMTP id ffacd0b85a97d-39c1efc457bso686953f8f.2 for ; Thu, 03 Apr 2025 09:03:00 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 03 Apr 2025 09:02:59 -0700 (PDT) Message-ID: Date: Thu, 3 Apr 2025 18:02:57 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3] x86/domain: revisit logging in arch_domain_create() To: dmkhn@proton.me Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com, xen-devel@lists.xenproject.org References: <20250402214406.115578-1-dmukhin@ford.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20250402214406.115578-1-dmukhin@ford.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 02.04.2025 23:44, dmkhn@proton.me wrote: > From: Denis Mukhin > > Use %pd in all logs issued from arch_domain_create(). > > Also, expand error message in arch_domain_create() under > !emulation_flags_ok() case to help debugging. > > Signed-off-by: Denis Mukhin A few nits: > --- a/xen/arch/x86/domain.c > +++ b/xen/arch/x86/domain.c > @@ -791,13 +791,12 @@ int arch_domain_create(struct domain *d, > { > if ( !opt_allow_unsafe ) > { > - printk(XENLOG_G_ERR "Xen does not allow DomU creation on this CPU" > - " for security reasons.\n"); > + printk(XENLOG_G_ERR "%pd: Xen does not allow DomU creation on this CPU" > + " for security reasons\n", d); If this is touched, I think it would better become printk(XENLOG_G_ERR "%pd: Xen does not allow DomU creation on this CPU for security reasons\n" d); to follow our "don't wrap format strings" principle. > return -EPERM; > } > printk(XENLOG_G_WARNING > - "Dom%d may compromise security on this CPU.\n", > - d->domain_id); > + "%pd: domain may compromise security on this CPU\n", d); Personally I don't think the word "domain" needs adding here. > @@ -807,16 +806,19 @@ int arch_domain_create(struct domain *d, > > if ( emflags & ~XEN_X86_EMU_ALL ) > { > - printk(XENLOG_G_ERR "d%d: Invalid emulation bitmap: %#x\n", > - d->domain_id, emflags); > + printk(XENLOG_G_ERR "%pd: Invalid emulation bitmap: %#x\n", Please switch to using a lower case 'i' on "invalid". > + d, emflags); > return -EINVAL; > } > > if ( !emulation_flags_ok(d, emflags) ) > { > - printk(XENLOG_G_ERR "d%d: Xen does not allow %s domain creation " > + printk(XENLOG_G_ERR "%pd: Xen does not allow %s %sdomain creation " > "with the current selection of emulators: %#x\n", Here wrapping of the format string would also be nice to avoid. That may call for an attempt to shorten the text a little. Maybe "with this set of emulators:" would already help some. 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Won't > suffice? >> It could be just > MB(2). Or perphaps >=. >> = would make the build fail, wouldn't it? I just realized that BUILD_BUG_ON() condition is compared to zero so actually everything what will make the condition true will cause a build fail as inside it used !(condition). So it seems like we have to check for XEN_VIRT_SIZE != MB(16) and change each time when XEN_VIRT_SIZE is increased. ~ Oleksii --------------UokBImlYq4ZEzn8WCJSlYpx7 Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: 7bit


On 4/1/25 6:04 PM, Jan Beulich wrote:
On 01.04.2025 17:58, Oleksii Kurochko wrote:

On 3/31/25 6:14 PM, Jan Beulich wrote:

On 31.03.2025 17:20, Oleksii Kurochko wrote:

+        _AC(XEN_VIRT_START, UL) >> vpn1_shift;
+    const unsigned long xen_virt_end_vpn =
+        xen_virt_starn_vpn + ((XEN_VIRT_SIZE >> vpn1_shift) - 1);
+
      if ((va >= DIRECTMAP_VIRT_START) &&
          (va <= DIRECTMAP_VIRT_END))
          return directmapoff_to_maddr(va - directmap_virt_start);
  
-    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(2));
-    ASSERT((va >> (PAGETABLE_ORDER + PAGE_SHIFT)) ==
-           (_AC(XEN_VIRT_START, UL) >> (PAGETABLE_ORDER + PAGE_SHIFT)));
+    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(8));

Is it necessary to be != ? Won't > suffice?

It could be just > MB(2). Or perphaps >=.

= would make the build fail, wouldn't it?
I just realized that BUILD_BUG_ON() condition is compared to zero so actually everything what
will make the condition true will cause a build fail as inside it used !(condition).

So it seems like we have to check for XEN_VIRT_SIZE != MB(16) and change each time when XEN_VIRT_SIZE
is increased.

~ Oleksii
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mx.microsoft.com 1; spf=pass smtp.mailfrom=amd.com; dmarc=pass action=none header.from=amd.com; dkim=pass header.d=amd.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Uy7LR9fkeIAeXu7lv8mieQJ2L4ADsBCvEmqKqAxV68A=; b=NIYtCl22SoVEuBX/1fl/+/u/FBE53nwZZkPdhokDYb2ntvMIKAwhHyfhsHRPfLdMj+pwGvS0tnE1+hOLVzx1bVd5OHGSE3IcOyeHNRhExukGFI1d4H0jdXm9PjiQq2fxSE5Mgd+L3hekmE2jtzjSJO4IuGsPUqKXHEon78xS3pA= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=amd.com; Message-ID: <96d1a959-95ab-4db0-8afb-baa0c614ac8b@amd.com> Date: Thu, 3 Apr 2025 17:35:46 +0100 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 5/5] xen/arm32: mpu: Stubs to build MPU for arm32 Content-Language: en-GB To: Julien Grall , Ayan Kumar Halder , xen-devel@lists.xenproject.org Cc: Stefano Stabellini , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk References: <20250330180308.2551195-1-ayan.kumar.halder@amd.com> <20250330180308.2551195-6-ayan.kumar.halder@amd.com> <6a767fe1-2d77-4cd4-9726-498fbb27ce87@xen.org> From: Ayan Kumar Halder In-Reply-To: <6a767fe1-2d77-4cd4-9726-498fbb27ce87@xen.org> Content-Type: text/plain; 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New patch introduced in v3. >> 2. Should be applied on top of >> https://patchwork.kernel.org/project/xen-devel/cover/20250316192445.2376484-1-luca.fancellu@arm.com/ >> >> >>   xen/arch/arm/Kconfig             |  2 +- >>   xen/arch/arm/arm32/mpu/Makefile  |  2 ++ >>   xen/arch/arm/arm32/mpu/p2m.c     | 18 ++++++++++++++++++ >>   xen/arch/arm/arm32/mpu/smpboot.c | 23 +++++++++++++++++++++++ >>   xen/arch/arm/include/asm/mm.h    |  5 +++++ >>   5 files changed, 49 insertions(+), 1 deletion(-) >>   create mode 100644 xen/arch/arm/arm32/mpu/p2m.c >>   create mode 100644 xen/arch/arm/arm32/mpu/smpboot.c >> >> diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig >> index 565f288331..a1dd942091 100644 >> --- a/xen/arch/arm/Kconfig >> +++ b/xen/arch/arm/Kconfig >> @@ -1,7 +1,7 @@ >>   config ARM_32 >>       def_bool y >>       depends on "$(ARCH)" = "arm32" >> -    select ARCH_MAP_DOMAIN_PAGE >> +    select ARCH_MAP_DOMAIN_PAGE if MMU > > If ARCH_MAP_DOMAIN_PAGE is not present, then the assumption is Xen > will be able to access all the memory. Is this what we want long term? > > If not, then I would consider providing stubs rather than disable > ARCH_MAP_DOMAIN_PAGE. I will provide the stubs. > >>     config ARM_64 >>       def_bool y >> diff --git a/xen/arch/arm/arm32/mpu/Makefile >> b/xen/arch/arm/arm32/mpu/Makefile >> index 3340058c08..38797f28af 100644 >> --- a/xen/arch/arm/arm32/mpu/Makefile >> +++ b/xen/arch/arm/arm32/mpu/Makefile >> @@ -1 +1,3 @@ >>   obj-y += head.o >> +obj-y += smpboot.o >> +obj-y += p2m.o >> diff --git a/xen/arch/arm/arm32/mpu/p2m.c b/xen/arch/arm/arm32/mpu/p2m.c >> new file mode 100644 >> index 0000000000..df8de5c7d8 >> --- /dev/null >> +++ b/xen/arch/arm/arm32/mpu/p2m.c >> @@ -0,0 +1,18 @@ >> +/* SPDX-License-Identifier: GPL-2.0-only */ >> + >> +#include >> +#include >> + >> +void __init setup_virt_paging(void) >> +{ >> +    BUG_ON("unimplemented"); >> +} >> + >> +/* >> + * Local variables: >> + * mode: C >> + * c-file-style: "BSD" >> + * c-basic-offset: 4 >> + * indent-tabs-mode: nil >> + * End: >> + */ >> diff --git a/xen/arch/arm/arm32/mpu/smpboot.c >> b/xen/arch/arm/arm32/mpu/smpboot.c >> new file mode 100644 >> index 0000000000..3f3e54294e >> --- /dev/null >> +++ b/xen/arch/arm/arm32/mpu/smpboot.c >> @@ -0,0 +1,23 @@ >> +/* SPDX-License-Identifier: GPL-2.0-only */ >> + >> +#include >> + >> +int prepare_secondary_mm(int cpu) >> +{ >> +    BUG_ON("unimplemented"); >> +    return -EINVAL; >> +} >> + >> +void update_boot_mapping(bool enable) >> +{ >> +    BUG_ON("unimplemented"); >> +} >> + >> +/* >> + * Local variables: >> + * mode: C >> + * c-file-style: "BSD" >> + * c-basic-offset: 4 >> + * indent-tabs-mode: nil >> + * End: >> + */ >> diff --git a/xen/arch/arm/include/asm/mm.h >> b/xen/arch/arm/include/asm/mm.h >> index fbffaccef4..a894e28ac9 100644 >> --- a/xen/arch/arm/include/asm/mm.h >> +++ b/xen/arch/arm/include/asm/mm.h >> @@ -171,12 +171,17 @@ struct page_info >>   #define PGC_need_scrub    PGC_allocated >>     #ifdef CONFIG_ARM_32 >> +#ifdef CONFIG_MPU >> +#define is_xen_heap_page(page) false >> +#define is_xen_heap_mfn(mfn) false > > Can you clarify whether this is the intended implementation? If not > then we can be use BUG_ON("unimplemented")? yes, we will use BUG_ON("unimplemented"). > > Also... > >> +#else >>   #define is_xen_heap_page(page) is_xen_heap_mfn(page_to_mfn(page)) >>   #define is_xen_heap_mfn(mfn) ({                                 \ >>       unsigned long mfn_ = mfn_x(mfn);                            \ >>       (mfn_ >= mfn_x(directmap_mfn_start) &&                      \ >>        mfn_ < mfn_x(directmap_mfn_end));                          \ >>   }) >> +#endif > > ... is the implementation will be similar to is_xen_heap_page() for MMU? > >>   #else >>   #define is_xen_heap_page(page) ((page)->count_info & PGC_xen_heap) >>   #define is_xen_heap_mfn(mfn) \ > - Ayan > Cheers, > From xen-devel-bounces@lists.xenproject.org Thu Apr 03 17:13:11 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 17:13:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936974.1338065 (Exim 4.92) (envelope-from ) id 1u0O7h-0005tm-DQ; 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pr=C From: Ayan Kumar Halder To: CC: Ayan Kumar Halder , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , "Volodymyr Babchuk" Subject: [PATCH v4 0/3] Enable early bootup of Armv8-R AArch32 systems Date: Thu, 3 Apr 2025 18:12:38 +0100 Message-ID: <20250403171241.975377-1-ayan.kumar.halder@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Received-SPF: None (SATLEXMB04.amd.com: ayan.kumar.halder@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044EF:EE_|MW4PR12MB6999:EE_ X-MS-Office365-Filtering-Correlation-Id: 7920e019-4a58-49e3-1d6b-08dd72d2c4d6 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|376014|36860700013|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?SAHv5uQ363TBXgigGEjCKqvfU8N70sGEpssv/9IvAZUFs10m4Yefw/3rJh59?= =?us-ascii?Q?pLHq+fng+T23CkLqJLAkNax0Zsk3IDhUJqgt3gRAqgyWnT5gg1okFMMc4a4w?= =?us-ascii?Q?wmm/Ku78thBxYsPzKZuGVKnTlL/X+FrCL04EuddHW4iD0OZ+lrnFn4aqRCnv?= =?us-ascii?Q?YiXxkL+/GU4QEeJE/VDydE5ckexyK66m78XQOTaFnqN4HMvJDYCkekzqcJFh?= =?us-ascii?Q?Me+gK/c2sErKU/UWjpMp107G79wvuva2mJrA5qdKBuGy+NdLC3AJ5AIFQOWO?= =?us-ascii?Q?6+fkwIEPpia+7mPIZlel8OW/SeIpctAXL8ft3/6frLp5Wi/rqjZDkGKHWiVx?= =?us-ascii?Q?XfJXfITkI12mfqF9/wjVreU0ArucIXgCMWc7KxGleAfci7pRHZYVwOZuq9+X?= =?us-ascii?Q?hQ6+emanSooj/M/alAb18xrbbfcKCsb5CuTpNzWQl7QMQuUoHasUPQ7uPpGC?= =?us-ascii?Q?iy7byNDwxk/FSlbUKMENZubTTn9csCyvv0JW5YOo9NHjFxL2aQH94IoaGx1y?= =?us-ascii?Q?8CPJOiIjHw5xycF79EnDIc2m1FTZ+GmJR3xhS1SlzwqCnh/KcEnvSATmleae?= =?us-ascii?Q?e6FluR5RLdkDtsBETrJbRwlPruV8T7saHGRr1IxdL/wQkxq9E42YVxRJiWDc?= =?us-ascii?Q?TnrTq1xZ11YhunXGvtoQBMGxuIM7skoWfRVThoPq9OxpuHnY9ASgZRD+wfeN?= =?us-ascii?Q?YVvOR2tID7ltHwEE3axTmDt5fpu+yvCW9gyjwKsNy4WLv2q7i0R+W7rlHt7V?= =?us-ascii?Q?vvgpi4cZol4fSgiI4yMWa06Lw+UhqUXDwiMOmAC2aarR3iduTvFLkenkloD+?= =?us-ascii?Q?VNTgj9mlvNI55eF3un4BzNaPiJvOfj24Vn35yMaPGCZdcIisPn5Vg6D7fKZ8?= =?us-ascii?Q?mtHg4ccy7IzcVqrJE3Kyfxb+/BqAs7szKJZQZFe9R7aLlWLkzf3yCG+0DdNA?= =?us-ascii?Q?FdCZaFKZw3I9dTL8wTNdcHjEjXUgrG4vO1VzVUh4004nviS+YJ7kYZeTJ28j?= =?us-ascii?Q?1EIfWhZ2nFNPo0wLZUzgkxHPR2s14tcVz7N2MvXajqP0Paiu+Sj8Mbf6D9lu?= =?us-ascii?Q?AmrBQM9nU9jbdFoSqajjEKuwi6fFimKzNDF71P4mBTVmAomXbF0wPjCpqK/I?= =?us-ascii?Q?kZhe+d8QOaZ2fRMnw3wkwLQMJCxujWOCBDLVDGXAPfldQy2b6R0m+WUue62I?= =?us-ascii?Q?tidSQ3w2GFmGDF6zhBpnY7xh01wIyRK0vU8jqlYoOGFckktrCAftrer2k5RP?= =?us-ascii?Q?19OK//cjZAx1vKOI/5asW50MfOENkGmsAGlhoZG7lP8IRpaLy0pt0yrIRthZ?= =?us-ascii?Q?y9bRozGf07Kw/dYloWA+tw/XIMVwN53PxlGSei/rdlN/vTIVNKimGk4HbrGz?= =?us-ascii?Q?B1FB8ijsQ82X/q4xr/nv2OqtczS+MyrCM6At7lXj6ynT1S5i8SO6kfHlbjAt?= =?us-ascii?Q?VodwlMI37chQkb8+5zm5AOfKeRIxQXglicArXWZVCvvnR33Rbq9x+g9/gLfY?= =?us-ascii?Q?5Xv6XNDzah/Zerg=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(376014)(36860700013)(1800799024);DIR:OUT;SFP:1101; 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Ayan Kumar Halder (3): xen/arm: Move some of the functions to common file xen/arm32: Create the same boot-time MPU regions as arm64 xen/arm32: mpu: Stubs to build MPU for arm32 xen/arch/arm/arm32/Makefile | 1 + xen/arch/arm/arm32/mpu/Makefile | 3 + xen/arch/arm/arm32/mpu/head.S | 91 +++++++++++++++++++ xen/arch/arm/arm32/mpu/p2m.c | 18 ++++ xen/arch/arm/arm32/mpu/smpboot.c | 23 +++++ xen/arch/arm/arm64/mpu/head.S | 88 +----------------- xen/arch/arm/include/asm/arm64/sysregs.h | 11 +++ xen/arch/arm/include/asm/cpregs.h | 4 + xen/arch/arm/include/asm/mm.h | 5 + xen/arch/arm/include/asm/mpu/cpregs.h | 30 ++++++ .../include/asm/mpu/prepare_xen_region.inc | 89 ++++++++++++++++++ xen/arch/arm/mpu/Makefile | 1 + xen/arch/arm/mpu/domain_page.c | 40 ++++++++ 13 files changed, 317 insertions(+), 87 deletions(-) create mode 100644 xen/arch/arm/arm32/mpu/Makefile create mode 100644 xen/arch/arm/arm32/mpu/head.S create mode 100644 xen/arch/arm/arm32/mpu/p2m.c create mode 100644 xen/arch/arm/arm32/mpu/smpboot.c create mode 100644 xen/arch/arm/include/asm/mpu/cpregs.h create mode 100644 xen/arch/arm/include/asm/mpu/prepare_xen_region.inc create mode 100644 xen/arch/arm/mpu/domain_page.c -- 2.25.1 From xen-devel-bounces@lists.xenproject.org Thu Apr 03 17:13:11 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 17:13:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936975.1338076 (Exim 4.92) (envelope-from ) id 1u0O7n-00068m-P1; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Apr 2025 17:12:59.4107 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 26cfe95f-cc09-42c2-3fc9-08dd72d2c8e3 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044F0.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB9003 We have created the same boot-time MPU protection regions as Armv8-R AArch64. Also, we have defined *_PRBAR macros for arm32. The only difference from arm64 is that XN is 1-bit for arm32. The macros have been defined in mpu/cpregs.h. Also defined WRITE_SYSREG_ASM() to write to system registers in assembly. Signed-off-by: Ayan Kumar Halder --- Changes from v1 - 1. enable_mpu() now sets HMAIR{0,1} registers. This is similar to what is being done in enable_mmu(). All the mm related configurations happen in this function. 2. Fixed some typos. v2 - 1. Include the common prepare_xen_region.inc in head.S. 2. Define LOAD_SYSREG()/STORE_SYSREG() for arm32. v3 - 1. Rename STORE_SYSREG() as WRITE_SYSREG_ASM() 2. enable_boot_cpu_mm() is defined in head.S xen/arch/arm/arm32/Makefile | 1 + xen/arch/arm/arm32/mpu/Makefile | 1 + xen/arch/arm/arm32/mpu/head.S | 91 +++++++++++++++++++++++++++ xen/arch/arm/include/asm/cpregs.h | 4 ++ xen/arch/arm/include/asm/mpu/cpregs.h | 30 +++++++++ 5 files changed, 127 insertions(+) create mode 100644 xen/arch/arm/arm32/mpu/Makefile create mode 100644 xen/arch/arm/arm32/mpu/head.S create mode 100644 xen/arch/arm/include/asm/mpu/cpregs.h diff --git a/xen/arch/arm/arm32/Makefile b/xen/arch/arm/arm32/Makefile index 40a2b4803f..537969d753 100644 --- a/xen/arch/arm/arm32/Makefile +++ b/xen/arch/arm/arm32/Makefile @@ -1,5 +1,6 @@ obj-y += lib/ obj-$(CONFIG_MMU) += mmu/ +obj-$(CONFIG_MPU) += mpu/ obj-$(CONFIG_EARLY_PRINTK) += debug.o obj-y += domctl.o diff --git a/xen/arch/arm/arm32/mpu/Makefile b/xen/arch/arm/arm32/mpu/Makefile new file mode 100644 index 0000000000..3340058c08 --- /dev/null +++ b/xen/arch/arm/arm32/mpu/Makefile @@ -0,0 +1 @@ +obj-y += head.o diff --git a/xen/arch/arm/arm32/mpu/head.S b/xen/arch/arm/arm32/mpu/head.S new file mode 100644 index 0000000000..719ae3624e --- /dev/null +++ b/xen/arch/arm/arm32/mpu/head.S @@ -0,0 +1,91 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Start-of-day code for an Armv8-R MPU system. + */ + +#include +#include +#include + +/* + * Set up the memory attribute type tables and enable EL2 MPU and data cache. + * If the Background region is enabled, then the MPU uses the default memory + * map as the Background region for generating the memory + * attributes when MPU is disabled. + * Since the default memory map of the Armv8-R AArch32 architecture is + * IMPLEMENTATION DEFINED, we intend to turn off the Background region here. + * + * Clobbers r0 - r1 + */ +FUNC_LOCAL(enable_mpu) + /* Set up memory attribute type tables */ + mov_w r0, MAIR0VAL + mov_w r1, MAIR1VAL + mcr CP32(r0, HMAIR0) + mcr CP32(r1, HMAIR1) + + mrc CP32(r0, HSCTLR) + bic r0, r0, #SCTLR_ELx_BR /* Disable Background region */ + orr r0, r0, #SCTLR_Axx_ELx_M /* Enable MPU */ + orr r0, r0, #SCTLR_Axx_ELx_C /* Enable D-cache */ + mcr CP32(r0, HSCTLR) + isb + + ret +END(enable_mpu) + +/* + * Maps the various sections of Xen (described in xen.lds.S) as different MPU + * regions. + * + * Clobbers r0 - r5 + * + */ +FUNC(enable_boot_cpu_mm) + /* Get the number of regions specified in MPUIR_EL2 */ + mrc CP32(r5, MPUIR_EL2) + and r5, r5, #NUM_MPU_REGIONS_MASK + + /* x0: region sel */ + mov r0, #0 + /* Xen text section. */ + mov_w r1, _stext + mov_w r2, _etext + prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_TEXT_PRBAR + + /* Xen read-only data section. */ + mov_w r1, _srodata + mov_w r2, _erodata + prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_RO_PRBAR + + /* Xen read-only after init and data section. (RW data) */ + mov_w r1, __ro_after_init_start + mov_w r2, __init_begin + prepare_xen_region r0, r1, r2, r3, r4, r5 + + /* Xen code section. */ + mov_w r1, __init_begin + mov_w r2, __init_data_begin + prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_TEXT_PRBAR + + /* Xen data and BSS section. */ + mov_w r1, __init_data_begin + mov_w r2, __bss_end + prepare_xen_region r0, r1, r2, r3, r4, r5 + +#ifdef CONFIG_EARLY_PRINTK + /* Xen early UART section. */ + mov_w r1, CONFIG_EARLY_UART_BASE_ADDRESS + mov_w r2, (CONFIG_EARLY_UART_BASE_ADDRESS + CONFIG_EARLY_UART_SIZE) + prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_DEVICE_PRBAR, attr_prlar=REGION_DEVICE_PRLAR +#endif + + b enable_mpu +END(enable_boot_cpu_mm) + +/* + * Local variables: + * mode: ASM + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/arch/arm/include/asm/cpregs.h b/xen/arch/arm/include/asm/cpregs.h index aec9e8f329..6019a2cbdd 100644 --- a/xen/arch/arm/include/asm/cpregs.h +++ b/xen/arch/arm/include/asm/cpregs.h @@ -1,6 +1,10 @@ #ifndef __ASM_ARM_CPREGS_H #define __ASM_ARM_CPREGS_H +#ifdef CONFIG_MPU +#include +#endif + /* * AArch32 Co-processor registers. * diff --git a/xen/arch/arm/include/asm/mpu/cpregs.h b/xen/arch/arm/include/asm/mpu/cpregs.h new file mode 100644 index 0000000000..66871379a5 --- /dev/null +++ b/xen/arch/arm/include/asm/mpu/cpregs.h @@ -0,0 +1,30 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __ASM_ARM_MPU_CPREGS_H +#define __ASM_ARM_MPU_CPREGS_H + +#define REGION_TEXT_PRBAR 0x18 /* SH=11 AP=10 XN=0 */ +#define REGION_RO_PRBAR 0x1D /* SH=11 AP=10 XN=1 */ +#define REGION_DATA_PRBAR 0x19 /* SH=11 AP=00 XN=1 */ +#define REGION_DEVICE_PRBAR 0x11 /* SH=10 AP=00 XN=1 */ + +#define HMPUIR p15,4,c0,c0,4 + +/* CP15 CR6: MPU Protection Region Base/Limit/Select Address Register */ +#define HPRSELR p15,4,c6,c2,1 +#define PRBAR_EL2 p15,4,c6,c3,0 +#define PRLAR_EL2 p15,4,c6,c8,1 + +#define MPUIR_EL2 HMPUIR +#define PRSELR_EL2 HPRSELR + +#define WRITE_SYSREG_ASM(v, name) mcr CP32(v, name) + +#endif /* __ASM_ARM_MPU_CPREGS_H */ + +/* + * Local variables: + * mode: ASM + * indent-tabs-mode: nil + * End: + */ -- 2.25.1 From xen-devel-bounces@lists.xenproject.org Thu Apr 03 17:13:11 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 17:13:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.936978.1338093 (Exim 4.92) (envelope-from ) id 1u0O7p-0006Ua-GY; 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pr=C From: Ayan Kumar Halder To: CC: Ayan Kumar Halder , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , "Volodymyr Babchuk" Subject: [PATCH v4 3/3] xen/arm32: mpu: Stubs to build MPU for arm32 Date: Thu, 3 Apr 2025 18:12:41 +0100 Message-ID: <20250403171241.975377-4-ayan.kumar.halder@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250403171241.975377-1-ayan.kumar.halder@amd.com> References: <20250403171241.975377-1-ayan.kumar.halder@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Received-SPF: None (SATLEXMB04.amd.com: ayan.kumar.halder@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044F0:EE_|CYXPR12MB9425:EE_ X-MS-Office365-Filtering-Correlation-Id: 862b974f-9f7a-4d42-5303-08dd72d2ca9c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|36860700013|376014; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Apr 2025 17:13:02.3013 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 862b974f-9f7a-4d42-5303-08dd72d2ca9c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044F0.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CYXPR12MB9425 Add stubs to enable compilation Signed-off-by: Ayan Kumar Halder --- Changes from :- v1, v2 - 1. New patch introduced in v3. 2. Should be applied on top of https://patchwork.kernel.org/project/xen-devel/cover/20250316192445.2376484-1-luca.fancellu@arm.com/ v3 - 1. Add stubs for map_domain_page() and similar functions. 2. 'BUG_ON("unimplemented")' is kept in all the stubs. xen/arch/arm/arm32/mpu/Makefile | 2 ++ xen/arch/arm/arm32/mpu/p2m.c | 18 ++++++++++++++ xen/arch/arm/arm32/mpu/smpboot.c | 23 ++++++++++++++++++ xen/arch/arm/include/asm/mm.h | 5 ++++ xen/arch/arm/mpu/Makefile | 1 + xen/arch/arm/mpu/domain_page.c | 40 ++++++++++++++++++++++++++++++++ 6 files changed, 89 insertions(+) create mode 100644 xen/arch/arm/arm32/mpu/p2m.c create mode 100644 xen/arch/arm/arm32/mpu/smpboot.c create mode 100644 xen/arch/arm/mpu/domain_page.c diff --git a/xen/arch/arm/arm32/mpu/Makefile b/xen/arch/arm/arm32/mpu/Makefile index 3340058c08..38797f28af 100644 --- a/xen/arch/arm/arm32/mpu/Makefile +++ b/xen/arch/arm/arm32/mpu/Makefile @@ -1 +1,3 @@ obj-y += head.o +obj-y += smpboot.o +obj-y += p2m.o diff --git a/xen/arch/arm/arm32/mpu/p2m.c b/xen/arch/arm/arm32/mpu/p2m.c new file mode 100644 index 0000000000..df8de5c7d8 --- /dev/null +++ b/xen/arch/arm/arm32/mpu/p2m.c @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include + +void __init setup_virt_paging(void) +{ + BUG_ON("unimplemented"); +} + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/arch/arm/arm32/mpu/smpboot.c b/xen/arch/arm/arm32/mpu/smpboot.c new file mode 100644 index 0000000000..3f3e54294e --- /dev/null +++ b/xen/arch/arm/arm32/mpu/smpboot.c @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include + +int prepare_secondary_mm(int cpu) +{ + BUG_ON("unimplemented"); + return -EINVAL; +} + +void update_boot_mapping(bool enable) +{ + BUG_ON("unimplemented"); +} + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h index fbffaccef4..2a52cf530f 100644 --- a/xen/arch/arm/include/asm/mm.h +++ b/xen/arch/arm/include/asm/mm.h @@ -171,12 +171,17 @@ struct page_info #define PGC_need_scrub PGC_allocated #ifdef CONFIG_ARM_32 +#ifdef CONFIG_MPU +#define is_xen_heap_page(page) ({ BUG_ON("unimplemented"); false; }) +#define is_xen_heap_mfn(mfn) ({ BUG_ON("unimplemented"); false; }) +#else /* !CONFIG_MPU */ #define is_xen_heap_page(page) is_xen_heap_mfn(page_to_mfn(page)) #define is_xen_heap_mfn(mfn) ({ \ unsigned long mfn_ = mfn_x(mfn); \ (mfn_ >= mfn_x(directmap_mfn_start) && \ mfn_ < mfn_x(directmap_mfn_end)); \ }) +#endif /* !CONFIG_MPU */ #else #define is_xen_heap_page(page) ((page)->count_info & PGC_xen_heap) #define is_xen_heap_mfn(mfn) \ diff --git a/xen/arch/arm/mpu/Makefile b/xen/arch/arm/mpu/Makefile index 21bbc517b5..ff221011d5 100644 --- a/xen/arch/arm/mpu/Makefile +++ b/xen/arch/arm/mpu/Makefile @@ -2,3 +2,4 @@ obj-y += mm.o obj-y += p2m.o obj-y += setup.init.o obj-y += vmap.o +obj-$(CONFIG_ARM_32) += domain_page.o diff --git a/xen/arch/arm/mpu/domain_page.c b/xen/arch/arm/mpu/domain_page.c new file mode 100644 index 0000000000..b9ebb03d67 --- /dev/null +++ b/xen/arch/arm/mpu/domain_page.c @@ -0,0 +1,40 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#include + +void *map_domain_page_global(mfn_t mfn) +{ + BUG_ON("unimplemented"); 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bh=LQlVndv6IFyQsh/aclgDelcrFq42ln2cN7OA9k6EGpQ=; b=Vry9FLJDemX7W1a0n1yZ+5kb4Q0QlSBdJz+d+kkvzHeIxth3UGJLHAOGmF+1A9f+0FX9+2+s1xtDMjt+dMWIXsXnZenRXTc3sJJrhGFxtoigw9qAo9mbT/njnejkPFmBCXzY8s5UTocyHLQ2yXGdR509d2IxkkKO4FTrPY+lkUQ= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C From: Ayan Kumar Halder To: CC: Ayan Kumar Halder , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , "Volodymyr Babchuk" Subject: [PATCH v4 1/3] xen/arm: Move some of the functions to common file Date: Thu, 3 Apr 2025 18:12:39 +0100 Message-ID: <20250403171241.975377-2-ayan.kumar.halder@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250403171241.975377-1-ayan.kumar.halder@amd.com> References: <20250403171241.975377-1-ayan.kumar.halder@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Received-SPF: None (SATLEXMB05.amd.com: ayan.kumar.halder@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EDD6:EE_|IA1PR12MB6356:EE_ X-MS-Office365-Filtering-Correlation-Id: bbc10902-0735-4d6b-f89f-08dd72d2c811 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|36860700013|376014|82310400026; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Apr 2025 17:12:58.0235 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bbc10902-0735-4d6b-f89f-08dd72d2c811 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EDD6.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6356 Added a new file prepare_xen_region.inc to hold the common earlyboot MPU regions configurations across arm64 and arm32. prepare_xen_region, fail_insufficient_regions() will be used by both arm32 and arm64. Thus, they have been moved to prepare_xen_region.inc. enable_secondary_cpu_mm() is a stub which is moved to prepare_xen_region.inc as SMP is currently not supported for MPU. *_PRBAR are moved to arm64/sysregs.h. *_PRLAR are moved to prepare_xen_region.inc as they are common between arm32 and arm64. Introduce WRITE_SYSREG_ASM to write to the system registers from the common asm file. Signed-off-by: Ayan Kumar Halder --- Changes from v1 - 1. enable_mpu() now sets HMAIR{0,1} registers. This is similar to what is being done in enable_mmu(). All the mm related configurations happen in this function. 2. Fixed some typos. v2 - 1. Extracted the arm64 head.S functions/macros in a common file. v3 - 1. Moved *_PRLAR are moved to prepare_xen_region.inc 2. enable_boot_cpu_mm() is preserved in mpu/head.S. 3. STORE_SYSREG is renamed as WRITE_SYSREG_ASM() 4. LOAD_SYSREG is removed. 5. No need to save/restore lr in enable_boot_cpu_mm(). IOW, keep it as it was in the original code. xen/arch/arm/arm64/mpu/head.S | 88 +----------------- xen/arch/arm/include/asm/arm64/sysregs.h | 11 +++ .../include/asm/mpu/prepare_xen_region.inc | 89 +++++++++++++++++++ 3 files changed, 101 insertions(+), 87 deletions(-) create mode 100644 xen/arch/arm/include/asm/mpu/prepare_xen_region.inc diff --git a/xen/arch/arm/arm64/mpu/head.S b/xen/arch/arm/arm64/mpu/head.S index ed01993d85..8cd8107a13 100644 --- a/xen/arch/arm/arm64/mpu/head.S +++ b/xen/arch/arm/arm64/mpu/head.S @@ -3,83 +3,7 @@ * Start-of-day code for an Armv8-R MPU system. */ -#include -#include - -/* Backgroud region enable/disable */ -#define SCTLR_ELx_BR BIT(17, UL) - -#define REGION_TEXT_PRBAR 0x38 /* SH=11 AP=10 XN=00 */ -#define REGION_RO_PRBAR 0x3A /* SH=11 AP=10 XN=10 */ -#define REGION_DATA_PRBAR 0x32 /* SH=11 AP=00 XN=10 */ -#define REGION_DEVICE_PRBAR 0x22 /* SH=10 AP=00 XN=10 */ - -#define REGION_NORMAL_PRLAR 0x0f /* NS=0 ATTR=111 EN=1 */ -#define REGION_DEVICE_PRLAR 0x09 /* NS=0 ATTR=100 EN=1 */ - -/* - * Macro to prepare and set a EL2 MPU memory region. - * We will also create an according MPU memory region entry, which - * is a structure of pr_t, in table \prmap. - * - * sel: region selector - * base: reg storing base address - * limit: reg storing limit address - * prbar: store computed PRBAR_EL2 value - * prlar: store computed PRLAR_EL2 value - * maxcount: maximum number of EL2 regions supported - * attr_prbar: PRBAR_EL2-related memory attributes. If not specified it will be - * REGION_DATA_PRBAR - * attr_prlar: PRLAR_EL2-related memory attributes. If not specified it will be - * REGION_NORMAL_PRLAR - * - * Preserves \maxcount - * Output: - * \sel: Next available region selector index. - * Clobbers \base, \limit, \prbar, \prlar - * - * Note that all parameters using registers should be distinct. - */ -.macro prepare_xen_region, sel, base, limit, prbar, prlar, maxcount, attr_prbar=REGION_DATA_PRBAR, attr_prlar=REGION_NORMAL_PRLAR - /* Check if the region is empty */ - cmp \base, \limit - beq 1f - - /* Check if the number of regions exceeded the count specified in MPUIR_EL2 */ - cmp \sel, \maxcount - bge fail_insufficient_regions - - /* Prepare value for PRBAR_EL2 reg and preserve it in \prbar.*/ - and \base, \base, #MPU_REGION_MASK - mov \prbar, #\attr_prbar - orr \prbar, \prbar, \base - - /* Limit address should be inclusive */ - sub \limit, \limit, #1 - and \limit, \limit, #MPU_REGION_MASK - mov \prlar, #\attr_prlar - orr \prlar, \prlar, \limit - - msr PRSELR_EL2, \sel - isb - msr PRBAR_EL2, \prbar - msr PRLAR_EL2, \prlar - dsb sy - isb - - add \sel, \sel, #1 - -1: -.endm - -/* - * Failure caused due to insufficient MPU regions. - */ -FUNC_LOCAL(fail_insufficient_regions) - PRINT("- Selected MPU region is above the implemented number in MPUIR_EL2 -\r\n") -1: wfe - b 1b -END(fail_insufficient_regions) +#include /* * Enable EL2 MPU and data cache @@ -154,16 +78,6 @@ FUNC(enable_boot_cpu_mm) ret END(enable_boot_cpu_mm) -/* - * We don't yet support secondary CPUs bring-up. Implement a dummy helper to - * please the common code. - */ -FUNC(enable_secondary_cpu_mm) - PRINT("- SMP not enabled yet -\r\n") -1: wfe - b 1b -END(enable_secondary_cpu_mm) - /* * Local variables: * mode: ASM diff --git a/xen/arch/arm/include/asm/arm64/sysregs.h b/xen/arch/arm/include/asm/arm64/sysregs.h index b593e4028b..3ee3715430 100644 --- a/xen/arch/arm/include/asm/arm64/sysregs.h +++ b/xen/arch/arm/include/asm/arm64/sysregs.h @@ -462,6 +462,15 @@ #define ZCR_ELx_LEN_SIZE 9 #define ZCR_ELx_LEN_MASK 0x1ff +#define REGION_TEXT_PRBAR 0x38 /* SH=11 AP=10 XN=00 */ +#define REGION_RO_PRBAR 0x3A /* SH=11 AP=10 XN=10 */ +#define REGION_DATA_PRBAR 0x32 /* SH=11 AP=00 XN=10 */ +#define REGION_DEVICE_PRBAR 0x22 /* SH=10 AP=00 XN=10 */ + +#define WRITE_SYSREG_ASM(v, name) "msr " __stringify(name,) #v; + +#ifndef __ASSEMBLY__ + /* Access to system registers */ #define WRITE_SYSREG64(v, name) do { \ @@ -481,6 +490,8 @@ #define WRITE_SYSREG_LR(v, index) WRITE_SYSREG(v, ICH_LR_REG(index)) #define READ_SYSREG_LR(index) READ_SYSREG(ICH_LR_REG(index)) +#endif /* __ASSEMBLY__ */ + #endif /* _ASM_ARM_ARM64_SYSREGS_H */ /* diff --git a/xen/arch/arm/include/asm/mpu/prepare_xen_region.inc b/xen/arch/arm/include/asm/mpu/prepare_xen_region.inc new file mode 100644 index 0000000000..8af44d5669 --- /dev/null +++ b/xen/arch/arm/include/asm/mpu/prepare_xen_region.inc @@ -0,0 +1,89 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include + +/* Backgroud region enable/disable */ +#define SCTLR_ELx_BR BIT(17, UL) + +#define REGION_NORMAL_PRLAR 0x0f /* NS=0 ATTR=111 EN=1 */ +#define REGION_DEVICE_PRLAR 0x09 /* NS=0 ATTR=100 EN=1 */ + +/* + * Macro to prepare and set a EL2 MPU memory region. + * We will also create an according MPU memory region entry, which + * is a structure of pr_t, in table \prmap. + * + * sel: region selector + * base: reg storing base address + * limit: reg storing limit address + * prbar: store computed PRBAR_EL2 value + * prlar: store computed PRLAR_EL2 value + * maxcount: maximum number of EL2 regions supported + * attr_prbar: PRBAR_EL2-related memory attributes. If not specified it will be + * REGION_DATA_PRBAR + * attr_prlar: PRLAR_EL2-related memory attributes. If not specified it will be + * REGION_NORMAL_PRLAR + * + * Preserves maxcount + * Output: + * sel: Next available region selector index. + * Clobbers base, limit, prbar, prlar + * + * Note that all parameters using registers should be distinct. + */ +.macro prepare_xen_region, sel, base, limit, prbar, prlar, maxcount, attr_prbar=REGION_DATA_PRBAR, attr_prlar=REGION_NORMAL_PRLAR + /* Check if the region is empty */ + cmp \base, \limit + beq 1f + + /* Check if the number of regions exceeded the count specified in MPUIR_EL2 */ + cmp \sel, \maxcount + bge fail_insufficient_regions + + /* Prepare value for PRBAR_EL2 reg and preserve it in \prbar.*/ + and \base, \base, #MPU_REGION_MASK + mov \prbar, #\attr_prbar + orr \prbar, \prbar, \base + + /* Limit address should be inclusive */ + sub \limit, \limit, #1 + and \limit, \limit, #MPU_REGION_MASK + mov \prlar, #\attr_prlar + orr \prlar, \prlar, \limit + + WRITE_SYSREG_ASM(\sel, PRSELR_EL2) + isb + WRITE_SYSREG_ASM(\prbar, PRBAR_EL2) + WRITE_SYSREG_ASM(\prlar, PRLAR_EL2) + dsb sy + isb + + add \sel, \sel, #1 + +1: +.endm + +/* Failure caused due to insufficient MPU regions. */ +FUNC_LOCAL(fail_insufficient_regions) + PRINT("- Selected MPU region is above the implemented number in MPUIR_EL2 -\r\n") +1: wfe + b 1b +END(fail_insufficient_regions) + +/* + * We don't yet support secondary CPUs bring-up. Implement a dummy helper to + * please the common code. + */ +FUNC(enable_secondary_cpu_mm) + PRINT("- SMP not enabled yet -\r\n") +1: wfe + b 1b +END(enable_secondary_cpu_mm) + +/* + * Local variables: + * mode: ASM + * indent-tabs-mode: nil + * End: + */ -- 2.25.1 From xen-devel-bounces@lists.xenproject.org Thu Apr 03 17:58:01 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 17:58:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937030.1338105 (Exim 4.92) (envelope-from ) id 1u0Op8-0001Tl-HX; Thu, 03 Apr 2025 17:57:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937030.1338105; Thu, 03 Apr 2025 17:57:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0Op8-0001Te-F1; Thu, 03 Apr 2025 17:57:54 +0000 Received: by outflank-mailman (input) for mailman id 937030; Thu, 03 Apr 2025 17:57:53 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0Op7-0001TY-Q0 for xen-devel@lists.xenproject.org; Thu, 03 Apr 2025 17:57:53 +0000 Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com [2a00:1450:4864:20::329]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 274ae536-10b5-11f0-9ffb-bf95429c2676; Thu, 03 Apr 2025 19:57:48 +0200 (CEST) Received: by mail-wm1-x329.google.com with SMTP id 5b1f17b1804b1-43cfe574976so8308105e9.1 for ; Thu, 03 Apr 2025 10:57:48 -0700 (PDT) Received: from localhost.localdomain (host-92-26-98-202.as13285.net. [92.26.98.202]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43ec16a3aefsm28059365e9.21.2025.04.03.10.57.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 10:57:46 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 274ae536-10b5-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1743703067; x=1744307867; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=QMLfFfEVVO6Pdzym9UcJtEbdmrCa6bNJDvfvnZ9B4rs=; b=jYDdcba7n6rKBREApevDsBg4hGk89e6bYmNHE35tiWq5T2QPkB4d0rhSD3uDBakRB5 Izb6oyjDnsPVaNJoc+uEFvbV1Ky9V6c6lUffcBLaJS/521Dh/4nmjCSfAxoZmun7S4wo FiDGADVaMuccBBJN41Q1d1PTThUpIJ2L4alrY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743703067; x=1744307867; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=QMLfFfEVVO6Pdzym9UcJtEbdmrCa6bNJDvfvnZ9B4rs=; b=SdTIu/wNliK4BBp45Lk+/l1EwITn8bu6llY4Y7+EQ2FTRyhyZtorhn3g2YOo5oCBU1 Ixxe95z6S7JU9MRaOMEhsA9IuACRfmIf3HClYMXMvjVUq7FmRCieS9YBvPaL3cXPD0XI Hnp6BMRQbUU4oUrOqmz3njFfU7osnlgSTnVVR6RxsQ2UWmSDQAwpTVUmCvDj20UTa7Jm qHKgp8JCYNNWdtZGeFuk0CQ6SW/o0XXlsXiFhFQ38WpQZVEpiPfKjme9wh8Y31rMAHje YGsDcGwQqtLRJ0VR3PB8hFF+6RedoHOnut8/OJMtWLe1dBU0naoW9iUOPvRsS+ns7Ykd corg== X-Gm-Message-State: AOJu0YzZVAqMTFtX3MiBn7guaUcmrxRDI6gV6QxHL/fpShNJNDrH9jnM N0upu0sBdNHRAG664p6kjahbyz5OpWgErqE84P90FgoBU2cpgM9k1D2s6snlB7IoWXTMFlLDqw/ s7gg= X-Gm-Gg: ASbGncuk14rruRzT8EHaizpUeo+cQjJW27xzrwQFTnU6xpuRCbEnG7rgr7cCcYjsLZa dVitqWqCf0GJvEjZLtjgqf+0mbv6zgXNJTZBNjEqrCMgJJFbrZNYBKQLaauRqNEIoDOQS/J6Ro3 Es8VbvJP3ljZT0uqzmjYYOYC7+0XrADfC4AaqJsWAdTgJPKoPXA3FNGF7kZZvC0hWya6EsdQlS5 PafxIE5tTKuffa9iikZOnHb1LX0Xt71PgaMy49qzZPsTUZFB1UpzzK8GxGYw5h+Zda7R3oGRnOP ZS3D0jLUEfCMSKnHzC+TjaT/qf/B/DbdQC0IfWRJmeM21DWcNyXhA24i97oQk6/6YoF8VsVXCVU 5UQ1QuTX2JwNkvsZPQw== X-Google-Smtp-Source: AGHT+IGfwMp+56Qs1OEYK4UnorKSjvuglUgtfooOg4rsz6ozzUVwuSjlcQgNtunhGdOYmxeFSyNEdw== X-Received: by 2002:a05:600c:348b:b0:43b:b756:f0a9 with SMTP id 5b1f17b1804b1-43ecf85dd6bmr663715e9.11.1743703067501; Thu, 03 Apr 2025 10:57:47 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH] x86/amd: Convert wrmsr_amd_safe() to use asm goto() Date: Thu, 3 Apr 2025 18:57:44 +0100 Message-Id: <20250403175744.1538469-1-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Bloat-o-meter reports: add/remove: 0/0 grow/shrink: 0/2 up/down: 0/-29 (-29) Function old new delta _probe_mask_msr 99 94 -5 init_amd 2418 2394 -24 but that's because .fixup doesn't contain sized/typed symbols. This also drops two "mov -EFAULT, %reg; jmp ...;" sequences too. The net saving is -50. wrmsr_amd_safe()'s return value is only checked against 0 (if at all), and because of this, the compiler can now avoid manifesting 0/-EFAULT entirely, and the %[fault] label simply lands on the right basic block. Convert to Xen style while rewriting. No functional change. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné Slightly RFC. We use -EIO elsewhere for this purpose, and nothing in this logic cares. I was pleasently surprised by the manifestation of -EFAULT going away entirely. I expect converting wrmsr_safe() is going to be far greater win. Converting rdmsr_amd_safe() (and friends) is going to be much harder, because they have outputs, which GCCs before this year cannot do safely (there was a serious bug, found and backported). I think I'm going to port Linux's CC_HAS_ASM_GOTO_OUTPUT infrastructure, so we can at least provide a better wrapper on new-enough toolchains. --- xen/arch/x86/cpu/amd.c | 22 ++++++++++------------ 1 file changed, 10 insertions(+), 12 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index 597b0f073d55..ce4e1df71064 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -74,21 +74,19 @@ static inline int rdmsr_amd_safe(unsigned int msr, unsigned int *lo, } static inline int wrmsr_amd_safe(unsigned int msr, unsigned int lo, - unsigned int hi) + unsigned int hi) { - int err; + asm goto ( "1: wrmsr\n\t" + _ASM_EXTABLE(1b, %l[fault]) + : + : "c" (msr), "a" (lo), "d" (hi), "D" (0x9c5a203a) + : + : fault ); - asm volatile("1: wrmsr\n2:\n" - ".section .fixup,\"ax\"\n" - "3: movl %6,%0\n" - " jmp 2b\n" - ".previous\n" - _ASM_EXTABLE(1b, 3b) - : "=r" (err) - : "c" (msr), "a" (lo), "d" (hi), "D" (0x9c5a203a), - "0" (0), "i" (-EFAULT)); + return 0; - return err; + fault: + return -EFAULT; } static void wrmsr_amd(unsigned int msr, uint64_t val) -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Thu Apr 03 18:23:21 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 18:23:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937045.1338116 (Exim 4.92) (envelope-from ) id 1u0PDZ-0000gN-F4; Thu, 03 Apr 2025 18:23:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937045.1338116; Thu, 03 Apr 2025 18:23:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0PDZ-0000fz-Bk; Thu, 03 Apr 2025 18:23:09 +0000 Received: by outflank-mailman (input) for mailman id 937045; Thu, 03 Apr 2025 18:23:08 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0PDW-0000KX-Ux for xen-devel@lists.xenproject.org; Thu, 03 Apr 2025 18:23:07 +0000 Received: from mail-10630.protonmail.ch (mail-10630.protonmail.ch [79.135.106.30]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id af87bf9a-10b8-11f0-9eaa-5ba50f476ded; Thu, 03 Apr 2025 20:23:05 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: af87bf9a-10b8-11f0-9eaa-5ba50f476ded DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=proton.me; s=protonmail; t=1743704583; x=1743963783; bh=4s46GxMWhgvHm0rgQ170PYzaHXK6NdimNxre7vDtwbA=; h=Date:To:From:Cc:Subject:Message-ID:Feedback-ID:From:To:Cc:Date: Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector: List-Unsubscribe:List-Unsubscribe-Post; b=hcCkmAN0K7QWL9/QTiLfzme/Vp8SxO3wPugckz1mCAGoW3KcGvCvN2ztCX3i+nlhe RZipxVpoicJ+BuwT+53cgzpH9U72hTfbJa5qEchfsTsEcZsxlINGG37QN3KNUHJ9jC XKklu2Qytvsp2/dJT3FzURU+IUw4umejq90h1rdM6wl4oVoQzl6moaPbUk+d93ppcW Pj+TRJIjrmGND5h6DitUU8WdHhkkArc/cbn0nOsmLegCLsVjf6EbC97x3Yh+olkH/f 8R9g7i9eXSy8xPP36xUyq+0IekYgJwsYcMZ/BNkNXTYc1ECvm0ioVBu/cK/U8dDBcy eo27uCGGaApRA== Date: Thu, 03 Apr 2025 18:22:58 +0000 To: xen-devel@lists.xenproject.org From: dmkhn@proton.me Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com Subject: [PATCH v2 0/6] x86/asm: cleanups after toolchain baseline upgrade Message-ID: <20250403182250.3329498-1-dmukhin@ford.com> Feedback-ID: 123220910:user:proton X-Pm-Message-ID: d9d3b846cb5f0f8ce1df0778aed580181b1fd1d9 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Patches 1-5 remove various workarounds under HAVE_AS_XXX for older compiler= s, as the minimally required GCC 5.1 / Binutils 2.25, and Clang 11 natively support instructions worked around in the hypervisor code. Patch 6 cleans up error handling in VMX asm wrappers using `asm goto`. [1] Link to v1: https://lore.kernel.org/xen-devel/20250401222105.79309-1-dm= ukhin@ford.com/ [2] CI: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines/17510= 06178=20 Denis Mukhin (6): x86/vmx: remove HAVE_AS_{EPT,VMX}, GAS_VMX_OP() and *_OPCODE x86/msr: remove HAVE_AS_FSGSBASE x86/asm: remove HAVE_AS_INVPCID x86/emulate: remove HAVE_AS_SSE4_2 x86/emulate: remove HAVE_AS_RDRAND and HAVE_AS_RDSEED x86/vmx: rework VMX wrappers to use `asm goto()` xen/arch/x86/arch.mk | 9 +- xen/arch/x86/hvm/vmx/vmcs.c | 2 +- xen/arch/x86/include/asm/hvm/vmx/vmx.h | 236 ++++++++----------------- xen/arch/x86/include/asm/invpcid.h | 12 +- xen/arch/x86/include/asm/msr.h | 22 --- xen/arch/x86/x86_emulate/0fc7.c | 15 +- xen/arch/x86/x86_emulate/x86_emulate.c | 7 +- 7 files changed, 87 insertions(+), 216 deletions(-) --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Thu Apr 03 18:23:21 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 18:23:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937046.1338125 (Exim 4.92) (envelope-from ) id 1u0PDb-00014N-LK; Thu, 03 Apr 2025 18:23:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937046.1338125; Thu, 03 Apr 2025 18:23:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0PDb-00014G-Hq; Thu, 03 Apr 2025 18:23:11 +0000 Received: by outflank-mailman (input) for mailman id 937046; Thu, 03 Apr 2025 18:23:09 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0PDZ-0000KX-O6 for xen-devel@lists.xenproject.org; Thu, 03 Apr 2025 18:23:09 +0000 Received: from mail-24417.protonmail.ch (mail-24417.protonmail.ch [109.224.244.17]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id b1bb9101-10b8-11f0-9eaa-5ba50f476ded; Thu, 03 Apr 2025 20:23:09 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: b1bb9101-10b8-11f0-9eaa-5ba50f476ded DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=proton.me; s=protonmail; t=1743704587; x=1743963787; bh=qhdb/UMVIzJBSclTVMNrOhHVQ8qtT+hHFmjvP6GsCPc=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector:List-Unsubscribe:List-Unsubscribe-Post; b=XprKrZdJwozJ7RtPPi0NFr+5IjEy7TCwNSUl7Jq43C65XZess6+LStMze0I2lX3Vf fRr6Avgu/WF+GxGQFxy7tVdjS5xaG+hd8cG4uE735FGHLIAHoBrBFW9EEBlC7Ht0DX u3uHfKp/RHeyYhfVznI/vFqw6qBZb3bOM/9Woqr57vIjako+ye1lvYESGI/2/oWFh9 yeDO4ZPFH003yHDd4rMFaPY5LzACzB04Lsq3GQA7yuUgakuL7xjPrjBE6UT368VPiS jG3Z1tacs8ti8uzLGFv7kuSXd/cyqGADneoG/9zii+NM0js3ayTIIi3JGEJX3RZgiE lfouKZYwkSoYQ== Date: Thu, 03 Apr 2025 18:23:04 +0000 To: xen-devel@lists.xenproject.org From: dmkhn@proton.me Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com Subject: [PATCH v2 1/6] x86/vmx: remove HAVE_AS_{EPT,VMX}, GAS_VMX_OP() and *_OPCODE Message-ID: <20250403182250.3329498-2-dmukhin@ford.com> In-Reply-To: <20250403182250.3329498-1-dmukhin@ford.com> References: <20250403182250.3329498-1-dmukhin@ford.com> Feedback-ID: 123220910:user:proton X-Pm-Message-ID: 88bc866978d8a58d1e80d42e66ec5b77779ee0e0 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable From: Denis Mukhin The new toolchain baseline knows the VMX instructions, no need to carry the workaround in the code. Move asm for vmxoff directly on the only callsite in vmcs.c Updated formatting for all __xxx() calls to be consistent. Resolves: https://gitlab.com/xen-project/xen/-/work_items/202 Signed-off-by: Denis Mukhin --- xen/arch/x86/arch.mk | 4 +- xen/arch/x86/hvm/vmx/vmcs.c | 2 +- xen/arch/x86/include/asm/hvm/vmx/vmx.h | 119 ++++--------------------- 3 files changed, 17 insertions(+), 108 deletions(-) diff --git a/xen/arch/x86/arch.mk b/xen/arch/x86/arch.mk index 258e459bec..e9fa1c92d7 100644 --- a/xen/arch/x86/arch.mk +++ b/xen/arch/x86/arch.mk @@ -10,9 +10,7 @@ CFLAGS +=3D -msoft-float =20 $(call cc-options-add,CFLAGS,CC,$(EMBEDDED_EXTRA_CFLAGS)) $(call cc-option-add,CFLAGS,CC,-Wnested-externs) -$(call as-option-add,CFLAGS,CC,"vmcall",-DHAVE_AS_VMX) $(call as-option-add,CFLAGS,CC,"crc32 %eax$(comma)%eax",-DHAVE_AS_SSE4_2) -$(call as-option-add,CFLAGS,CC,"invept (%rax)$(comma)%rax",-DHAVE_AS_EPT) $(call as-option-add,CFLAGS,CC,"rdrand %eax",-DHAVE_AS_RDRAND) $(call as-option-add,CFLAGS,CC,"rdfsbase %rax",-DHAVE_AS_FSGSBASE) $(call as-option-add,CFLAGS,CC,"xsaveopt (%rax)",-DHAVE_AS_XSAVEOPT) @@ -23,7 +21,7 @@ $(call as-option-add,CFLAGS,CC,"invpcid (%rax)$(comma)%ra= x",-DHAVE_AS_INVPCID) $(call as-option-add,CFLAGS,CC,"movdiri %rax$(comma)(%rax)",-DHAVE_AS_MOVD= IR) $(call as-option-add,CFLAGS,CC,"enqcmd (%rax)$(comma)%rax",-DHAVE_AS_ENQCM= D) =20 -# Check to see whether the assmbler supports the .nop directive. +# Check to see whether the assembler supports the .nop directive. $(call as-option-add,CFLAGS,CC,\ ".L1: .L2: .nops (.L2 - .L1)$(comma)9",-DHAVE_AS_NOPS_DIRECTIVE) =20 diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c index 1d427100ce..aef746a293 100644 --- a/xen/arch/x86/hvm/vmx/vmcs.c +++ b/xen/arch/x86/hvm/vmx/vmcs.c @@ -811,7 +811,7 @@ void cf_check vmx_cpu_down(void) =20 BUG_ON(!(read_cr4() & X86_CR4_VMXE)); this_cpu(vmxon) =3D 0; - __vmxoff(); + asm volatile ("vmxoff" : : : "memory"); =20 local_irq_restore(flags); } diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmx.h b/xen/arch/x86/include/= asm/hvm/vmx/vmx.h index 7c6ba73407..ed6a6986b9 100644 --- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h +++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h @@ -257,24 +257,6 @@ typedef union cr_access_qual { #define X86_SEG_AR_GRANULARITY (1u << 15) /* 15, granularity */ #define X86_SEG_AR_SEG_UNUSABLE (1u << 16) /* 16, segment unusable */ =20 -#define VMCALL_OPCODE ".byte 0x0f,0x01,0xc1\n" -#define VMCLEAR_OPCODE ".byte 0x66,0x0f,0xc7\n" /* reg/opcode: /6 = */ -#define VMLAUNCH_OPCODE ".byte 0x0f,0x01,0xc2\n" -#define VMPTRLD_OPCODE ".byte 0x0f,0xc7\n" /* reg/opcode: /6 = */ -#define VMPTRST_OPCODE ".byte 0x0f,0xc7\n" /* reg/opcode: /7 = */ -#define VMREAD_OPCODE ".byte 0x0f,0x78\n" -#define VMRESUME_OPCODE ".byte 0x0f,0x01,0xc3\n" -#define VMWRITE_OPCODE ".byte 0x0f,0x79\n" -#define INVEPT_OPCODE ".byte 0x66,0x0f,0x38,0x80\n" /* m128,r64/32 */ -#define INVVPID_OPCODE ".byte 0x66,0x0f,0x38,0x81\n" /* m128,r64/32 */ -#define VMXOFF_OPCODE ".byte 0x0f,0x01,0xc4\n" -#define VMXON_OPCODE ".byte 0xf3,0x0f,0xc7\n" - -#define MODRM_EAX_08 ".byte 0x08\n" /* ECX, [EAX] */ -#define MODRM_EAX_06 ".byte 0x30\n" /* [EAX], with reg/opcode: /6 */ -#define MODRM_EAX_07 ".byte 0x38\n" /* [EAX], with reg/opcode: /7 */ -#define MODRM_EAX_ECX ".byte 0xc1\n" /* EAX, ECX */ - extern uint8_t posted_intr_vector; =20 #define cpu_has_vmx_ept_exec_only_supported \ @@ -310,97 +292,54 @@ extern uint8_t posted_intr_vector; #define INVVPID_ALL_CONTEXT 2 #define INVVPID_SINGLE_CONTEXT_RETAINING_GLOBAL 3 =20 -#ifdef HAVE_AS_VMX -# define GAS_VMX_OP(yes, no) yes -#else -# define GAS_VMX_OP(yes, no) no -#endif - static always_inline void __vmptrld(u64 addr) { - asm volatile ( -#ifdef HAVE_AS_VMX - "vmptrld %0\n" -#else - VMPTRLD_OPCODE MODRM_EAX_06 -#endif + asm volatile ( "vmptrld %0\n" /* CF=3D=3D1 or ZF=3D=3D1 --> BUG() */ UNLIKELY_START(be, vmptrld) _ASM_BUGFRAME_TEXT(0) UNLIKELY_END_SECTION : -#ifdef HAVE_AS_VMX : "m" (addr), -#else - : "a" (&addr), -#endif _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, = 0) - : "memory"); + : "memory" ); } =20 static always_inline void __vmpclear(u64 addr) { - asm volatile ( -#ifdef HAVE_AS_VMX - "vmclear %0\n" -#else - VMCLEAR_OPCODE MODRM_EAX_06 -#endif + asm volatile ( "vmclear %0\n" /* CF=3D=3D1 or ZF=3D=3D1 --> BUG() */ UNLIKELY_START(be, vmclear) _ASM_BUGFRAME_TEXT(0) UNLIKELY_END_SECTION : -#ifdef HAVE_AS_VMX : "m" (addr), -#else - : "a" (&addr), -#endif _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, = 0) - : "memory"); + : "memory" ); } =20 static always_inline void __vmread(unsigned long field, unsigned long *val= ue) { - asm volatile ( -#ifdef HAVE_AS_VMX - "vmread %1, %0\n\t" -#else - VMREAD_OPCODE MODRM_EAX_ECX -#endif + asm volatile ( "vmread %1, %0\n\t" /* CF=3D=3D1 or ZF=3D=3D1 --> BUG() */ UNLIKELY_START(be, vmread) _ASM_BUGFRAME_TEXT(0) UNLIKELY_END_SECTION -#ifdef HAVE_AS_VMX : "=3Drm" (*value) : "r" (field), -#else - : "=3Dc" (*value) - : "a" (field), -#endif _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, = 0) ); } =20 static always_inline void __vmwrite(unsigned long field, unsigned long val= ue) { - asm volatile ( -#ifdef HAVE_AS_VMX - "vmwrite %1, %0\n" -#else - VMWRITE_OPCODE MODRM_EAX_ECX -#endif + asm volatile ( "vmwrite %1, %0\n" /* CF=3D=3D1 or ZF=3D=3D1 --> BUG() */ UNLIKELY_START(be, vmwrite) _ASM_BUGFRAME_TEXT(0) UNLIKELY_END_SECTION : -#ifdef HAVE_AS_VMX : "r" (field) , "rm" (value), -#else - : "a" (field) , "c" (value), -#endif _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, = 0) ); } @@ -411,14 +350,13 @@ static inline enum vmx_insn_errno vmread_safe(unsigne= d long field, unsigned long ret =3D VMX_INSN_SUCCEED; bool fail_invalid, fail_valid; =20 - asm volatile ( GAS_VMX_OP("vmread %[field], %[value]\n\t", - VMREAD_OPCODE MODRM_EAX_ECX) + asm volatile ( "vmread %[field], %[value]\n\t" ASM_FLAG_OUT(, "setc %[invalid]\n\t") ASM_FLAG_OUT(, "setz %[valid]\n\t") : ASM_FLAG_OUT("=3D@ccc", [invalid] "=3Drm") (fail_inva= lid), ASM_FLAG_OUT("=3D@ccz", [valid] "=3Drm") (fail_valid)= , - [value] GAS_VMX_OP("=3Drm", "=3Dc") (*value) - : [field] GAS_VMX_OP("r", "a") (field)); + [value] "=3Drm" (*value) + : [field] "r" (field) ); =20 if ( unlikely(fail_invalid) ) ret =3D VMX_INSN_FAIL_INVALID; @@ -434,14 +372,13 @@ static inline enum vmx_insn_errno vmwrite_safe(unsign= ed long field, unsigned long ret =3D VMX_INSN_SUCCEED; bool fail_invalid, fail_valid; =20 - asm volatile ( GAS_VMX_OP("vmwrite %[value], %[field]\n\t", - VMWRITE_OPCODE MODRM_EAX_ECX) + asm volatile ( "vmwrite %[value], %[field]\n\t" ASM_FLAG_OUT(, "setc %[invalid]\n\t") ASM_FLAG_OUT(, "setz %[valid]\n\t") : ASM_FLAG_OUT("=3D@ccc", [invalid] "=3Drm") (fail_inva= lid), ASM_FLAG_OUT("=3D@ccz", [valid] "=3Drm") (fail_valid) - : [field] GAS_VMX_OP("r", "a") (field), - [value] GAS_VMX_OP("rm", "c") (value)); + : [field] "r" (field), + [value] "rm" (value) ); =20 if ( unlikely(fail_invalid) ) ret =3D VMX_INSN_FAIL_INVALID; @@ -465,22 +402,13 @@ static always_inline void __invept(unsigned long type= , uint64_t eptp) !cpu_has_vmx_ept_invept_single_context ) type =3D INVEPT_ALL_CONTEXT; =20 - asm volatile ( -#ifdef HAVE_AS_EPT - "invept %0, %1\n" -#else - INVEPT_OPCODE MODRM_EAX_08 -#endif + asm volatile ( "invept %0, %1\n" /* CF=3D=3D1 or ZF=3D=3D1 --> BUG() */ UNLIKELY_START(be, invept) _ASM_BUGFRAME_TEXT(0) UNLIKELY_END_SECTION : -#ifdef HAVE_AS_EPT : "m" (operand), "r" (type), -#else - : "a" (&operand), "c" (type), -#endif _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, = 0) : "memory" ); } @@ -494,24 +422,14 @@ static always_inline void __invvpid(unsigned long typ= e, u16 vpid, u64 gva) } operand =3D {vpid, 0, gva}; =20 /* Fix up #UD exceptions which occur when TLBs are flushed before VMXO= N. */ - asm volatile ( "1: " -#ifdef HAVE_AS_EPT - "invvpid %0, %1\n" -#else - INVVPID_OPCODE MODRM_EAX_08 -#endif + asm volatile ( "1: invvpid %0, %1\n" /* CF=3D=3D1 or ZF=3D=3D1 --> BUG() */ UNLIKELY_START(be, invvpid) _ASM_BUGFRAME_TEXT(0) UNLIKELY_END_SECTION "\n" - "2:" - _ASM_EXTABLE(1b, 2b) + "2:" _ASM_EXTABLE(1b, 2b) : -#ifdef HAVE_AS_EPT : "m" (operand), "r" (type), -#else - : "a" (&operand), "c" (type), -#endif _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, = 0) : "memory" ); } @@ -552,13 +470,6 @@ static inline void vpid_sync_all(void) __invvpid(INVVPID_ALL_CONTEXT, 0, 0); } =20 -static inline void __vmxoff(void) -{ - asm volatile ( - VMXOFF_OPCODE - : : : "memory" ); -} - int cf_check vmx_guest_x86_mode(struct vcpu *v); unsigned int vmx_get_cpl(void); =20 --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Thu Apr 03 18:23:22 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 18:23:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937052.1338135 (Exim 4.92) (envelope-from ) id 1u0PDm-0001QL-08; Thu, 03 Apr 2025 18:23:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937052.1338135; Thu, 03 Apr 2025 18:23:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0PDl-0001QB-TI; Thu, 03 Apr 2025 18:23:21 +0000 Received: by outflank-mailman (input) for mailman id 937052; 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b=Ht7/I1mJ/Y7K0M92SngQbabwHstOiBsqvjCe57WBxgMmdCKeNE6BfGqVyHeOVfAcK 5XruK6qxcqnEwUtVT1xp759lPbE/m7y3TYxp6U/m9annLLuNvulyUTLOdLOU1Z0NUW f5dYdnoCkFX5Ch8HDdvU12NEyTD7WzyBRv4OeeR2Fz8VnO4xzwRNj6jOLfv4U8V7Kk iY4zALiVDHmkPhiwAcXmtb/ThtSFmu61wUna7WW/sDZT7JlPdlHD1yD0GGChDuzNE3 Qixfkv+/26+TFS4lp6j8j2yKxlOa13xtNSUM3CJAN+3nGWfyTWL9B11v2z9ek7fsag sS4OGBBnFuxEA== Date: Thu, 03 Apr 2025 18:23:09 +0000 To: xen-devel@lists.xenproject.org From: dmkhn@proton.me Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com Subject: [PATCH v2 2/6] x86/msr: remove HAVE_AS_FSGSBASE Message-ID: <20250403182250.3329498-3-dmukhin@ford.com> In-Reply-To: <20250403182250.3329498-1-dmukhin@ford.com> References: <20250403182250.3329498-1-dmukhin@ford.com> Feedback-ID: 123220910:user:proton X-Pm-Message-ID: f6e30f0fc17d05541119b496f78e8cadb4330eed MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable From: Denis Mukhin The new toolchain baseline knows the {rd,wr}{f,g}sbase instructions, no need to carry the workaround in the code. Resolves: https://gitlab.com/xen-project/xen/-/work_items/207 Signed-off-by: Denis Mukhin --- xen/arch/x86/arch.mk | 1 - xen/arch/x86/include/asm/msr.h | 22 ---------------------- 2 files changed, 23 deletions(-) diff --git a/xen/arch/x86/arch.mk b/xen/arch/x86/arch.mk index e9fa1c92d7..6d2876b1a8 100644 --- a/xen/arch/x86/arch.mk +++ b/xen/arch/x86/arch.mk @@ -12,7 +12,6 @@ $(call cc-options-add,CFLAGS,CC,$(EMBEDDED_EXTRA_CFLAGS)) $(call cc-option-add,CFLAGS,CC,-Wnested-externs) $(call as-option-add,CFLAGS,CC,"crc32 %eax$(comma)%eax",-DHAVE_AS_SSE4_2) $(call as-option-add,CFLAGS,CC,"rdrand %eax",-DHAVE_AS_RDRAND) -$(call as-option-add,CFLAGS,CC,"rdfsbase %rax",-DHAVE_AS_FSGSBASE) $(call as-option-add,CFLAGS,CC,"xsaveopt (%rax)",-DHAVE_AS_XSAVEOPT) $(call as-option-add,CFLAGS,CC,"rdseed %eax",-DHAVE_AS_RDSEED) $(call as-option-add,CFLAGS,CC,"clwb (%rax)",-DHAVE_AS_CLWB) diff --git a/xen/arch/x86/include/asm/msr.h b/xen/arch/x86/include/asm/msr.= h index 549d40b404..0d3b1d6374 100644 --- a/xen/arch/x86/include/asm/msr.h +++ b/xen/arch/x86/include/asm/msr.h @@ -152,11 +152,7 @@ static inline unsigned long __rdfsbase(void) { unsigned long base; =20 -#ifdef HAVE_AS_FSGSBASE asm volatile ( "rdfsbase %0" : "=3Dr" (base) ); -#else - asm volatile ( ".byte 0xf3, 0x48, 0x0f, 0xae, 0xc0" : "=3Da" (base) ); -#endif =20 return base; } @@ -165,31 +161,19 @@ static inline unsigned long __rdgsbase(void) { unsigned long base; =20 -#ifdef HAVE_AS_FSGSBASE asm volatile ( "rdgsbase %0" : "=3Dr" (base) ); -#else - asm volatile ( ".byte 0xf3, 0x48, 0x0f, 0xae, 0xc8" : "=3Da" (base) ); -#endif =20 return base; } =20 static inline void __wrfsbase(unsigned long base) { -#ifdef HAVE_AS_FSGSBASE asm volatile ( "wrfsbase %0" :: "r" (base) ); -#else - asm volatile ( ".byte 0xf3, 0x48, 0x0f, 0xae, 0xd0" :: "a" (base) ); -#endif } =20 static inline void __wrgsbase(unsigned long base) { -#ifdef HAVE_AS_FSGSBASE asm volatile ( "wrgsbase %0" :: "r" (base) ); -#else - asm volatile ( ".byte 0xf3, 0x48, 0x0f, 0xae, 0xd8" :: "a" (base) ); -#endif } =20 static inline unsigned long read_fs_base(void) @@ -253,15 +237,9 @@ static inline void write_gs_shadow(unsigned long base) if ( read_cr4() & X86_CR4_FSGSBASE ) { asm volatile ( "swapgs\n\t" -#ifdef HAVE_AS_FSGSBASE "wrgsbase %0\n\t" "swapgs" :: "r" (base) ); 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charset=utf-8 Content-Transfer-Encoding: quoted-printable From: Denis Mukhin The new toolchain baseline knows the invpcid instruction, no need to carry the workaround in the code. Resolves: https://gitlab.com/xen-project/xen/-/work_items/209 Signed-off-by: Denis Mukhin --- xen/arch/x86/arch.mk | 1 - xen/arch/x86/include/asm/invpcid.h | 12 +----------- 2 files changed, 1 insertion(+), 12 deletions(-) diff --git a/xen/arch/x86/arch.mk b/xen/arch/x86/arch.mk index 6d2876b1a8..dcc8c3c330 100644 --- a/xen/arch/x86/arch.mk +++ b/xen/arch/x86/arch.mk @@ -16,7 +16,6 @@ $(call as-option-add,CFLAGS,CC,"xsaveopt (%rax)",-DHAVE_A= S_XSAVEOPT) $(call as-option-add,CFLAGS,CC,"rdseed %eax",-DHAVE_AS_RDSEED) $(call as-option-add,CFLAGS,CC,"clwb (%rax)",-DHAVE_AS_CLWB) $(call as-option-add,CFLAGS,CC,".equ \"x\"$(comma)1",-DHAVE_AS_QUOTED_SYM) -$(call as-option-add,CFLAGS,CC,"invpcid (%rax)$(comma)%rax",-DHAVE_AS_INVP= CID) $(call as-option-add,CFLAGS,CC,"movdiri %rax$(comma)(%rax)",-DHAVE_AS_MOVD= IR) $(call as-option-add,CFLAGS,CC,"enqcmd (%rax)$(comma)%rax",-DHAVE_AS_ENQCM= D) =20 diff --git a/xen/arch/x86/include/asm/invpcid.h b/xen/arch/x86/include/asm/= invpcid.h index bf5c30313a..e116a34a6c 100644 --- a/xen/arch/x86/include/asm/invpcid.h +++ b/xen/arch/x86/include/asm/invpcid.h @@ -5,9 +5,6 @@ =20 extern bool use_invpcid; =20 -#define INVPCID_OPCODE ".byte 0x66, 0x0f, 0x38, 0x82\n" -#define MODRM_ECX_01 ".byte 0x01\n" - static inline void invpcid(unsigned int pcid, unsigned long addr, unsigned int type) { @@ -17,16 +14,9 @@ static inline void invpcid(unsigned int pcid, unsigned l= ong addr, uint64_t addr; } desc =3D { .pcid =3D pcid, .addr =3D addr }; =20 - asm volatile ( -#ifdef HAVE_AS_INVPCID - "invpcid %[desc], %q[type]" + asm volatile ( "invpcid %[desc], %q[type]" : /* No output */ : [desc] "m" (desc), [type] "r" (type) -#else - INVPCID_OPCODE MODRM_ECX_01 - : /* No output */ - : "a" (type), "c" (&desc) -#endif : "memory" ); } =20 --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Thu Apr 03 18:23:29 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 18:23:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937061.1338156 (Exim 4.92) (envelope-from ) id 1u0PDt-00027S-G6; Thu, 03 Apr 2025 18:23:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937061.1338156; Thu, 03 Apr 2025 18:23:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0PDt-00027L-D3; Thu, 03 Apr 2025 18:23:29 +0000 Received: by outflank-mailman (input) for mailman id 937061; Thu, 03 Apr 2025 18:23:28 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0PDs-0001N1-17 for xen-devel@lists.xenproject.org; Thu, 03 Apr 2025 18:23:28 +0000 Received: from mail-10629.protonmail.ch (mail-10629.protonmail.ch [79.135.106.29]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id bc1f0e2c-10b8-11f0-9ffb-bf95429c2676; Thu, 03 Apr 2025 20:23:26 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: bc1f0e2c-10b8-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=proton.me; s=protonmail; t=1743704605; x=1743963805; bh=0+5RP23zmphaABoW946e9TRg+3ezkXum7FCtTXRbuRo=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector:List-Unsubscribe:List-Unsubscribe-Post; b=QEy3QHwFJ8D2CudLyCwp8udZXZNunfSRFnD3L5hlC6A0CHwawHqnMmFsIpoH3F1OQ XsLCUhXr7HE+xarwPhDDCwKHqzVX255L/UpyOGXh6sNrqtjWBJV7OAiIMcOeYgYRy/ YKJMfUebL07ejDcE3lf22xRET20jM+Kas1UNbAXfuNiCRKJnmZJcbnIwb3BLfnaSSx XZPHMo7LXhquFlVRtmxNtW3QocbTvj4iHHlqVoKNmvQJB0S69mT2b3M1JiZy0ai/Ij DjAAYwIv5ThL/+6bxXHBsR33w/bXI5+S4Rh5o4xvh5ZZhiQPl/ZusGDAGUDIvzztHa L0gJW2G/M51rg== Date: Thu, 03 Apr 2025 18:23:19 +0000 To: xen-devel@lists.xenproject.org From: dmkhn@proton.me Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com Subject: [PATCH v2 4/6] x86/emulate: remove HAVE_AS_SSE4_2 Message-ID: <20250403182250.3329498-5-dmukhin@ford.com> In-Reply-To: <20250403182250.3329498-1-dmukhin@ford.com> References: <20250403182250.3329498-1-dmukhin@ford.com> Feedback-ID: 123220910:user:proton X-Pm-Message-ID: 5284202ec3cab84c8f2b5e48a374d5a8cfe45ec7 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable From: Denis Mukhin The new toolchain baseline knows the crc32 instructions, no need to carry the workaround in the code. Resolves: https://gitlab.com/xen-project/xen/-/work_items/206 Signed-off-by: Denis Mukhin --- xen/arch/x86/arch.mk | 1 - xen/arch/x86/x86_emulate/x86_emulate.c | 7 +++---- 2 files changed, 3 insertions(+), 5 deletions(-) diff --git a/xen/arch/x86/arch.mk b/xen/arch/x86/arch.mk index dcc8c3c330..3bbaee2a44 100644 --- a/xen/arch/x86/arch.mk +++ b/xen/arch/x86/arch.mk @@ -10,7 +10,6 @@ CFLAGS +=3D -msoft-float =20 $(call cc-options-add,CFLAGS,CC,$(EMBEDDED_EXTRA_CFLAGS)) $(call cc-option-add,CFLAGS,CC,-Wnested-externs) -$(call as-option-add,CFLAGS,CC,"crc32 %eax$(comma)%eax",-DHAVE_AS_SSE4_2) $(call as-option-add,CFLAGS,CC,"rdrand %eax",-DHAVE_AS_RDRAND) $(call as-option-add,CFLAGS,CC,"xsaveopt (%rax)",-DHAVE_AS_XSAVEOPT) $(call as-option-add,CFLAGS,CC,"rdseed %eax",-DHAVE_AS_RDSEED) diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emul= ate/x86_emulate.c index 535d803588..55d36b9a26 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -6882,7 +6882,7 @@ x86_emulate( goto unhandleable; } break; -#ifdef HAVE_AS_SSE4_2 + case X86EMUL_OPC_F2(0x0f38, 0xf0): /* crc32 r/m8, r{32,64} */ case X86EMUL_OPC_F2(0x0f38, 0xf1): /* crc32 r/m{16,32,64}, r{32,64} */ host_and_vcpu_must_have(sse4_2); @@ -6901,17 +6901,16 @@ x86_emulate( asm ( "crc32l %1,%k0" : "+r" (dst.val) : "rm" (*(uint32_t *)&src.val) ); break; -# ifdef __x86_64__ +#ifdef __x86_64__ case 8: asm ( "crc32q %1,%0" : "+r" (dst.val) : "rm" (src.val) ); break; -# endif +#endif default: ASSERT_UNREACHABLE(); goto unhandleable; } break; -#endif =20 case X86EMUL_OPC_VEX(0x0f38, 0xf2): /* andn r/m,r,r */ case X86EMUL_OPC_VEX(0x0f38, 0xf5): /* bzhi r,r/m,r */ --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Thu Apr 03 18:23:33 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 18:23:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937064.1338166 (Exim 4.92) (envelope-from ) id 1u0PDx-0002Va-P9; Thu, 03 Apr 2025 18:23:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937064.1338166; Thu, 03 Apr 2025 18:23:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0PDx-0002VT-M0; Thu, 03 Apr 2025 18:23:33 +0000 Received: by outflank-mailman (input) for mailman id 937064; Thu, 03 Apr 2025 18:23:32 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0PDw-0001N1-Mo for xen-devel@lists.xenproject.org; Thu, 03 Apr 2025 18:23:32 +0000 Received: from mail-24417.protonmail.ch (mail-24417.protonmail.ch [109.224.244.17]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id bec5eddf-10b8-11f0-9ffb-bf95429c2676; Thu, 03 Apr 2025 20:23:31 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: bec5eddf-10b8-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=proton.me; s=protonmail; t=1743704610; x=1743963810; bh=GQ/7FVabQDdWQQqA2ckOWpneHtYQWqdMr/r/gKDzsXM=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector:List-Unsubscribe:List-Unsubscribe-Post; b=FdEBnhhYepTdHVUzupYP2bMsW8MZKaFZoa8hR6sBqIZQM1f3tH0wrZvfE3SVTsCVA wpXf4hp6GVGyoRnLJ7GpGjL+aB1HP4gDwQJ2zAg0GTr7fwJ1wNgCrxc5BqSf7ikgBh 2HIlhN3ryC3V4q22iAgf2TXWDFCEUJhz61bAyg37TbFTjZeQazc46biHas9apQXjPV /RyU3+/2k96ShaxvW/O4tmwkzjVXsshKMXxbSpzqFOVTdyVllDTNS0+OJe0PIsE77H LboVB6CqUWTLcRE0FHTDMwTkQODqlV33GeejjXJWP9fQAlWVebyWGEr3cJlsjp/2hm BnNgdskJi7xLA== Date: Thu, 03 Apr 2025 18:23:26 +0000 To: xen-devel@lists.xenproject.org From: dmkhn@proton.me Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com Subject: [PATCH v2 5/6] x86/emulate: remove HAVE_AS_RDRAND and HAVE_AS_RDSEED Message-ID: <20250403182250.3329498-6-dmukhin@ford.com> In-Reply-To: <20250403182250.3329498-1-dmukhin@ford.com> References: <20250403182250.3329498-1-dmukhin@ford.com> Feedback-ID: 123220910:user:proton X-Pm-Message-ID: 8dd76c2aceb6a141989cabe4dc4ca563e968872c MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable From: Denis Mukhin The new toolchain baseline knows the rdrand/rdseed instructions, no need to carry the workaround in the code. Resolves: https://gitlab.com/xen-project/xen/-/work_items/208 Signed-off-by: Denis Mukhin --- xen/arch/x86/arch.mk | 2 -- xen/arch/x86/x86_emulate/0fc7.c | 15 +++++---------- 2 files changed, 5 insertions(+), 12 deletions(-) diff --git a/xen/arch/x86/arch.mk b/xen/arch/x86/arch.mk index 3bbaee2a44..5577bf6241 100644 --- a/xen/arch/x86/arch.mk +++ b/xen/arch/x86/arch.mk @@ -10,9 +10,7 @@ CFLAGS +=3D -msoft-float =20 $(call cc-options-add,CFLAGS,CC,$(EMBEDDED_EXTRA_CFLAGS)) $(call cc-option-add,CFLAGS,CC,-Wnested-externs) -$(call as-option-add,CFLAGS,CC,"rdrand %eax",-DHAVE_AS_RDRAND) $(call as-option-add,CFLAGS,CC,"xsaveopt (%rax)",-DHAVE_AS_XSAVEOPT) -$(call as-option-add,CFLAGS,CC,"rdseed %eax",-DHAVE_AS_RDSEED) $(call as-option-add,CFLAGS,CC,"clwb (%rax)",-DHAVE_AS_CLWB) $(call as-option-add,CFLAGS,CC,".equ \"x\"$(comma)1",-DHAVE_AS_QUOTED_SYM) $(call as-option-add,CFLAGS,CC,"movdiri %rax$(comma)(%rax)",-DHAVE_AS_MOVD= IR) diff --git a/xen/arch/x86/x86_emulate/0fc7.c b/xen/arch/x86/x86_emulate/0fc= 7.c index 5268d5cafd..58c8f79501 100644 --- a/xen/arch/x86/x86_emulate/0fc7.c +++ b/xen/arch/x86/x86_emulate/0fc7.c @@ -32,7 +32,6 @@ int x86emul_0fc7(struct x86_emulate_state *s, return X86EMUL_UNRECOGNIZED; =20 case 6: /* rdrand */ -#ifdef HAVE_AS_RDRAND generate_exception_if(s->vex.pfx >=3D vex_f3, X86_EXC_UD); host_and_vcpu_must_have(rdrand); *dst =3D s->ea; @@ -43,12 +42,12 @@ int x86emul_0fc7(struct x86_emulate_state *s, : "=3Dr" (dst->val), ASM_FLAG_OUT("=3D@ccc", "=3Dqm"= ) (carry) ); break; default: -# ifdef __x86_64__ +#ifdef __x86_64__ asm ( "rdrand %k0" ASM_FLAG_OUT(, "; setc %1") : "=3Dr" (dst->val), ASM_FLAG_OUT("=3D@ccc", "=3Dqm"= ) (carry) ); break; case 8: -# endif +#endif asm ( "rdrand %0" ASM_FLAG_OUT(, "; setc %1") : "=3Dr" (dst->val), ASM_FLAG_OUT("=3D@ccc", "=3Dqm"= ) (carry) ); break; @@ -57,9 +56,6 @@ int x86emul_0fc7(struct x86_emulate_state *s, if ( carry ) regs->eflags |=3D X86_EFLAGS_CF; break; -#else - return X86EMUL_UNIMPLEMENTED; -#endif =20 case 7: /* rdseed / rdpid */ if ( s->vex.pfx =3D=3D vex_f3 ) /* rdpid */ @@ -77,7 +73,7 @@ int x86emul_0fc7(struct x86_emulate_state *s, dst->bytes =3D 4; break; } -#ifdef HAVE_AS_RDSEED + generate_exception_if(s->vex.pfx >=3D vex_f3, X86_EXC_UD); host_and_vcpu_must_have(rdseed); *dst =3D s->ea; @@ -88,12 +84,12 @@ int x86emul_0fc7(struct x86_emulate_state *s, : "=3Dr" (dst->val), ASM_FLAG_OUT("=3D@ccc", "=3Dqm"= ) (carry) ); break; default: -# ifdef __x86_64__ +#ifdef __x86_64__ asm ( "rdseed %k0" ASM_FLAG_OUT(, "; setc %1") : "=3Dr" (dst->val), ASM_FLAG_OUT("=3D@ccc", "=3Dqm"= ) (carry) ); break; case 8: -# endif +#endif asm ( "rdseed %0" ASM_FLAG_OUT(, "; setc %1") : "=3Dr" (dst->val), ASM_FLAG_OUT("=3D@ccc", "=3Dqm"= ) (carry) ); break; @@ -102,7 +98,6 @@ int x86emul_0fc7(struct x86_emulate_state *s, if ( carry ) regs->eflags |=3D X86_EFLAGS_CF; break; -#endif } } else --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Thu Apr 03 18:31:22 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 18:31:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937117.1338177 (Exim 4.92) (envelope-from ) id 1u0PLS-0006LS-Hp; Thu, 03 Apr 2025 18:31:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937117.1338177; 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a=rsa-sha256; c=relaxed/relaxed; d=proton.me; s=protonmail; t=1743704617; x=1743963817; bh=D9HZ36OBMZA9sIUaGxeMjO+UOWm/VDTojn44aNu2MRk=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector:List-Unsubscribe:List-Unsubscribe-Post; b=e4hZb91LzXNCKy1yuTR+9aIzDdgYcKNqmytcq179tyDuwTc6KaVHptwjKxt6rDOgS 6vexmk8eVMhjjV0Td+ch6AhW8DOyblH44eyR2hJZC8qmdd2b6H9EaTUR8nH8mtkpEU ed6TvuMgm5/IwluVrFFYtocZlJv2KpFxPsjfqNCLISF6s3nDuXE3EOGgDkIiE8NoVF mF7b5Um7ycacVTAuisSbwzKuC71tO7/B+1RzPAF+L0Q4zsQdYswrlF8cn6PVQqn2p5 shI2XF0GDLp2n625HN5zWIewNVOKHlJ4d4wKc7n1EpWT3g1UDQU93zxyiqwRfo+Ufh qPO69uGACudmg== Date: Thu, 03 Apr 2025 18:23:32 +0000 To: xen-devel@lists.xenproject.org From: dmkhn@proton.me Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com Subject: [PATCH v2 6/6] x86/vmx: rework VMX wrappers to use `asm goto()` Message-ID: <20250403182250.3329498-7-dmukhin@ford.com> In-Reply-To: <20250403182250.3329498-1-dmukhin@ford.com> References: <20250403182250.3329498-1-dmukhin@ford.com> Feedback-ID: 123220910:user:proton X-Pm-Message-ID: a796a4a4237e8e45901dcb32a84db62739145c57 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable From: Denis Mukhin Improve error handling in VMX wrappers by switching to `asm goto()` where possible. vmread_safe() kept as is because the minimally required baseline GCC does not support output operands in `asm goto`. Resolves: https://gitlab.com/xen-project/xen/-/work_items/210 Signed-off-by: Denis Mukhin --- xen/arch/x86/include/asm/hvm/vmx/vmx.h | 141 +++++++++++++------------ 1 file changed, 73 insertions(+), 68 deletions(-) diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmx.h b/xen/arch/x86/include/= asm/hvm/vmx/vmx.h index ed6a6986b9..19d41f7b90 100644 --- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h +++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h @@ -294,54 +294,57 @@ extern uint8_t posted_intr_vector; =20 static always_inline void __vmptrld(u64 addr) { - asm volatile ( "vmptrld %0\n" - /* CF=3D=3D1 or ZF=3D=3D1 --> BUG() */ - UNLIKELY_START(be, vmptrld) - _ASM_BUGFRAME_TEXT(0) - UNLIKELY_END_SECTION - : - : "m" (addr), - _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, = 0) - : "memory" ); + asm goto ( "vmptrld %[addr]\n" + "jbe %l[vmfail]\n\t" + : + : [addr] "m" (addr) + : "memory" + : vmfail ); + return; + + vmfail: + BUG(); } =20 static always_inline void __vmpclear(u64 addr) { - asm volatile ( "vmclear %0\n" - /* CF=3D=3D1 or ZF=3D=3D1 --> BUG() */ - UNLIKELY_START(be, vmclear) - _ASM_BUGFRAME_TEXT(0) - UNLIKELY_END_SECTION - : - : "m" (addr), - _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, = 0) - : "memory" ); + asm goto ( "vmclear %[addr]\n" + "jbe %l[vmfail]\n\t" + : + : [addr] "m" (addr) + : "memory" + : vmfail ); + return; + + vmfail: + BUG(); } =20 static always_inline void __vmread(unsigned long field, unsigned long *val= ue) { - asm volatile ( "vmread %1, %0\n\t" - /* CF=3D=3D1 or ZF=3D=3D1 --> BUG() */ - UNLIKELY_START(be, vmread) - _ASM_BUGFRAME_TEXT(0) - UNLIKELY_END_SECTION - : "=3Drm" (*value) - : "r" (field), - _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, = 0) - ); + bool vmfail; + + asm volatile ( "vmread %[field], %[value]\n\t" + "setbe %[vmfail]\n\t" + : [value] "=3Drm" (*value), [vmfail] "=3Drm" (vmfail) + : [field] "r" (field) + : "cc" ); + if ( vmfail ) + BUG(); } =20 static always_inline void __vmwrite(unsigned long field, unsigned long val= ue) { - asm volatile ( "vmwrite %1, %0\n" - /* CF=3D=3D1 or ZF=3D=3D1 --> BUG() */ - UNLIKELY_START(be, vmwrite) - _ASM_BUGFRAME_TEXT(0) - UNLIKELY_END_SECTION - : - : "r" (field) , "rm" (value), - _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, = 0) - ); + asm goto ( "vmwrite %[value], %[field]\n\t" + "jbe %l[vmfail]\n\t" + : + : [field] "r" (field), [value] "rm" (value) + : + : vmfail ); + return; + + vmfail: + BUG(); } =20 static inline enum vmx_insn_errno vmread_safe(unsigned long field, @@ -369,22 +372,22 @@ static inline enum vmx_insn_errno vmread_safe(unsigne= d long field, static inline enum vmx_insn_errno vmwrite_safe(unsigned long field, unsigned long value) { - unsigned long ret =3D VMX_INSN_SUCCEED; - bool fail_invalid, fail_valid; + unsigned long ret; =20 - asm volatile ( "vmwrite %[value], %[field]\n\t" - ASM_FLAG_OUT(, "setc %[invalid]\n\t") - ASM_FLAG_OUT(, "setz %[valid]\n\t") - : ASM_FLAG_OUT("=3D@ccc", [invalid] "=3Drm") (fail_inva= lid), - ASM_FLAG_OUT("=3D@ccz", [valid] "=3Drm") (fail_valid) - : [field] "r" (field), - [value] "rm" (value) ); + asm goto ( "vmwrite %[value], %[field]\n\t" + "jc %l[vmfail_invalid]\n\t" + "jz %l[vmfail_error]\n\t" + : + : [field] "r" (field), [value] "rm" (value) + : + : vmfail_invalid, vmfail_error ); + return VMX_INSN_SUCCEED; =20 - if ( unlikely(fail_invalid) ) - ret =3D VMX_INSN_FAIL_INVALID; - else if ( unlikely(fail_valid) ) - __vmread(VM_INSTRUCTION_ERROR, &ret); + vmfail_invalid: + return VMX_INSN_FAIL_INVALID; =20 + vmfail_error: + __vmread(VM_INSTRUCTION_ERROR, &ret); return ret; } =20 @@ -402,15 +405,16 @@ static always_inline void __invept(unsigned long type= , uint64_t eptp) !cpu_has_vmx_ept_invept_single_context ) type =3D INVEPT_ALL_CONTEXT; =20 - asm volatile ( "invept %0, %1\n" - /* CF=3D=3D1 or ZF=3D=3D1 --> BUG() */ - UNLIKELY_START(be, invept) - _ASM_BUGFRAME_TEXT(0) - UNLIKELY_END_SECTION - : - : "m" (operand), "r" (type), - _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, = 0) - : "memory" ); + asm goto ( "invept %[operand], %[type]\n" + "jbe %l[vmfail]\n\t" + : + : [operand] "m" (operand), [type] "r" (type) + : "memory" + : vmfail ); + return; + + vmfail: + BUG(); } =20 static always_inline void __invvpid(unsigned long type, u16 vpid, u64 gva) @@ -422,16 +426,17 @@ static always_inline void __invvpid(unsigned long typ= e, u16 vpid, u64 gva) } operand =3D {vpid, 0, gva}; =20 /* Fix up #UD exceptions which occur when TLBs are flushed before VMXO= N. */ - asm volatile ( "1: invvpid %0, %1\n" - /* CF=3D=3D1 or ZF=3D=3D1 --> BUG() */ - UNLIKELY_START(be, invvpid) - _ASM_BUGFRAME_TEXT(0) - UNLIKELY_END_SECTION "\n" - "2:" _ASM_EXTABLE(1b, 2b) - : - : "m" (operand), "r" (type), - _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, = 0) - : "memory" ); + asm goto ( "1: invvpid %[operand], %[type]\n" + " jbe %l[vmfail]\n\t" + "2:" _ASM_EXTABLE(1b, 2b) + : + : [operand] "m" (operand), [type] "r" (type) + : "memory" + : vmfail ); + return; + + vmfail: + BUG(); } =20 static inline void ept_sync_all(void) --=20 2.34.1 From xen-devel-bounces@lists.xenproject.org Thu Apr 03 18:36:50 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 18:36:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937138.1338186 (Exim 4.92) (envelope-from ) id 1u0PQj-00070Y-7O; Thu, 03 Apr 2025 18:36:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937138.1338186; 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c=relaxed/relaxed; d=vates.tech; s=mte1; t=1743705401; x=1743965901; i=teddy.astie@vates.tech; bh=yWMYqlLvIOZSn4k0C3wkSffWXKkjeYNkjrLUrF7ag8k=; h=From:Subject:Message-Id:To:Cc:References:In-Reply-To:Feedback-ID: Date:MIME-Version:Content-Type:Content-Transfer-Encoding:CC:Date: Subject:From; b=YfpN+pDacS5NX1P1zCfM9r9VL//u866qLOHbax8+QplxTfDFLsxx+P/iHFafMuYKX HbKIsSlxMgUTClQJ41MtB1wwpmlPU+2C+pn4KtXBIRafNbBHaNmmJQrZgkTg3A/+Bf +4fr9FlTFgZ0C0yn2XWoE7qs//hjiMn5fefMjKTqRVZ6GrcIvDrPqlBnxAkYfXp8w5 wDm8qH7BBwKBxsoBVnYwDIPt1YM9rfskjgTVrZJOZdn5jwYjzGp9wLDbIs7XIqaAtw meo76g0lz9LMbScTNTLrXPgCPj8wlRQl1L5Ajt/yAkYW+S2nxrae0/j7yjaM4of9m5 yGsoWionVvKbg== From: "Teddy Astie" Subject: =?utf-8?Q?Re:=20[RFC=20PATCH]=20x86/amd:=20Add=20support=20for=20AMD=20TCE?= X-Bm-Disclaimer: Yes X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1743705399780 Message-Id: <7056c584-a95e-401b-bb35-e5d0e4171878@vates.tech> To: "Andrew Cooper" , "Jan Beulich" Cc: "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , xen-devel@lists.xenproject.org References: <6b751a400df49217defc89a19b3ac2ca33ab7690.1743683787.git.teddy.astie@vates.tech> <73b1dd32-c15e-46c4-982c-9b7a33c8785b@suse.com> <463eca2f-9e2a-474c-ae5a-4ed6cfe01ff8@citrix.com> In-Reply-To: <463eca2f-9e2a-474c-ae5a-4ed6cfe01ff8@citrix.com> X-Native-Encoded: 1 X-Report-Abuse: =?UTF-8?Q?Please=20forward=20a=20copy=20of=20this=20message,=20including=20all=20headers,=20to=20abuse@mandrill.com.=20You=20can=20also=20report=20abuse=20here:=20https://mandrillapp.com/contact/abuse=3Fid=3D30504962.206295418c54479ba96f1ecc4f4fa54f?= X-Mandrill-User: md_30504962 Feedback-ID: 30504962:30504962.20250403:md Date: Thu, 03 Apr 2025 18:36:41 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Le 03/04/2025 =C3=A0 16:08, Andrew Cooper a =C3=A9crit=C2=A0: > On 03/04/2025 1:58 pm, Jan Beulich wrote: >> On 03.04.2025 14:44, Teddy Astie wrote: >>> Signed-off-by: Teddy Astie >>> --- >>> RFC: >>> - is this change actually safe ? >> Well, before getting here with reading I was already about to ask this v= ery >> question. It's really you who needs to prove it. >> >>> - should we add a tce/no-tce option to opt-in/out this feature ? >> Unless we're entirely certain we got this right and didn't overlook any >> corner case, perhaps better to do so. > > To bring across a quote of mine from Mattermost: > > "I'm reasonably sure our TLB handling algorithm is safe for it, > following the PCID work we did for Meltdown" > > But, proving this is hard. > > Some history: INVLPG flushing the entire paging structure cache > (non-leaf mappings) was a last-minute "fix" to keep Windows working on > the Pentium(?), where it had started using INVLPG from the 486(?) but > with a logical error. > > AMD's TCE feature is "that's a hefty hit to keep around, so here's an > option for the behaviour one would more reasonably expect from INVLPG". > > Anyway.=C2=A0 I have a suspicion that Intel's INVPCID no longer followed = the > INVLPG behaviour anyway, and that we were forced to account for that. > However, I'm struggling to find confirmation one way or another in the SD= M. > > Another mitigating factor is that, because we use recursive pagetables, > we have to upgrade an INVLPG into a full flush anyway if we edited > non-leaf entries. > Yes, while proving it on the hypervisor side may be doable, I am quite unsure about PV guests. Some calls to HYPERVISOR_mmuext_op incidentally call invlpg and alike which could be affected with this change, as the guest can "assume" some behavior aspects of invlpg. > > As to a cmdline option, there's cpuid=3Dno-tce if we really really need > it, but I don't think we want a dedicated TCE option. > > >>> --- a/xen/arch/x86/smpboot.c >>> +++ b/xen/arch/x86/smpboot.c >>> @@ -372,6 +372,9 @@ void asmlinkage start_secondary(void *unused) >>> >>> microcode_update_one(); >>> >>> + if ( boot_cpu_has(X86_FEATURE_TCE) ) >>> + write_efer(read_efer() | EFER_TCE); >> Same here. But I wonder if you couldn't set the bit in trampoline_efer. > > Yes, do set it in trampoline_efer, and drop this hunk. > Will do. > > If you add this, ... > >> --- a/xen/arch/x86/setup.c >> +++ b/xen/arch/x86/setup.c >> @@ -2008,6 +2008,13 @@ void asmlinkage __init noreturn __start_xen(void) >> if ( cpu_has_pku ) >> set_in_cr4(X86_CR4_PKE); >> >> + if ( boot_cpu_has(X86_FEATURE_TCE) ) > > ... the please also use it. > Yes, I forgot to change it. --- Aside enabling this flag for Xen/PV guests, it can be useful to expose it to the guests. While it's currently not going to change anything as most of the related instructions are trapped and managed by the hypervisor, it does affect the behavior of inside-guest INVLPGB if enabled in the VMCB. > ~Andrew Teddy Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Thu Apr 03 19:10:38 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 19:10:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937157.1338196 (Exim 4.92) (envelope-from ) id 1u0PxR-0007DZ-Ow; Thu, 03 Apr 2025 19:10:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937157.1338196; Thu, 03 Apr 2025 19:10:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0PxR-0007D3-KT; Thu, 03 Apr 2025 19:10:33 +0000 Received: by outflank-mailman (input) for mailman id 937157; Thu, 03 Apr 2025 19:10:32 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0PxQ-0007BV-B5 for xen-devel@lists.xenproject.org; Thu, 03 Apr 2025 19:10:32 +0000 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [2a00:1450:4864:20::336]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 4fca58ba-10bf-11f0-9eaa-5ba50f476ded; Thu, 03 Apr 2025 21:10:31 +0200 (CEST) Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-43d0618746bso9147355e9.2 for ; Thu, 03 Apr 2025 12:10:31 -0700 (PDT) Received: from [192.168.1.183] (host-92-26-98-202.as13285.net. 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Thu, 03 Apr 2025 12:10:30 -0700 (PDT) Message-ID: <9079e1dd-3c2c-43e3-8afb-bf92fd13d3ee@citrix.com> Date: Thu, 3 Apr 2025 20:10:29 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/6] x86/vmx: remove HAVE_AS_{EPT,VMX}, GAS_VMX_OP() and *_OPCODE To: dmkhn@proton.me, xen-devel@lists.xenproject.org Cc: anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com References: <20250403182250.3329498-1-dmukhin@ford.com> <20250403182250.3329498-2-dmukhin@ford.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <20250403182250.3329498-2-dmukhin@ford.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 03/04/2025 7:23 pm, dmkhn@proton.me wrote: > From: Denis Mukhin > > The new toolchain baseline knows the VMX instructions, > no need to carry the workaround in the code. > > Move asm for vmxoff directly on the only callsite in vmcs.c Ideally VMXOFF in capitals as it's an instruction name.  But, this type of thing is more commonly phrased as "Inline __vmxoff() into it's single caller", or so. > > Updated formatting for all __xxx() calls to be consistent. I'd suggest "for the other wrappers to be". > > Resolves: https://gitlab.com/xen-project/xen/-/work_items/202 > Signed-off-by: Denis Mukhin > --- > xen/arch/x86/arch.mk | 4 +- > xen/arch/x86/hvm/vmx/vmcs.c | 2 +- > xen/arch/x86/include/asm/hvm/vmx/vmx.h | 119 ++++--------------------- Just as a note, you're CC-ing The Rest, but this is an x86-only change, so should really only be CCing myself, Jan and Roger. > diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c > index 1d427100ce..aef746a293 100644 > --- a/xen/arch/x86/hvm/vmx/vmcs.c > +++ b/xen/arch/x86/hvm/vmx/vmcs.c > @@ -811,7 +811,7 @@ void cf_check vmx_cpu_down(void) > > BUG_ON(!(read_cr4() & X86_CR4_VMXE)); > this_cpu(vmxon) = 0; > - __vmxoff(); > + asm volatile ("vmxoff" : : : "memory"); asm volatile ( "vmxoff" ::: "memory" ); > > local_irq_restore(flags); > } > diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmx.h b/xen/arch/x86/include/asm/hvm/vmx/vmx.h > index 7c6ba73407..ed6a6986b9 100644 > --- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h > +++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h > @@ -310,97 +292,54 @@ extern uint8_t posted_intr_vector; > #define INVVPID_ALL_CONTEXT 2 > #define INVVPID_SINGLE_CONTEXT_RETAINING_GLOBAL 3 > > -#ifdef HAVE_AS_VMX > -# define GAS_VMX_OP(yes, no) yes > -#else > -# define GAS_VMX_OP(yes, no) no > -#endif > - > static always_inline void __vmptrld(u64 addr) > { > - asm volatile ( > -#ifdef HAVE_AS_VMX > - "vmptrld %0\n" > -#else > - VMPTRLD_OPCODE MODRM_EAX_06 > -#endif > + asm volatile ( "vmptrld %0\n" As you're changing the line anyway, this ought to be \n\t.  It's cosmetic, but comes in handy if you need to read the intermediate assembly. > /* CF==1 or ZF==1 --> BUG() */ > UNLIKELY_START(be, vmptrld) > _ASM_BUGFRAME_TEXT(0) > UNLIKELY_END_SECTION > : > -#ifdef HAVE_AS_VMX > : "m" (addr), > -#else > - : "a" (&addr), > -#endif > _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, 0) > - : "memory"); > + : "memory" ); > } > > static always_inline void __vmpclear(u64 addr) > { > - asm volatile ( > -#ifdef HAVE_AS_VMX > - "vmclear %0\n" > -#else > - VMCLEAR_OPCODE MODRM_EAX_06 > -#endif > + asm volatile ( "vmclear %0\n" > /* CF==1 or ZF==1 --> BUG() */ > UNLIKELY_START(be, vmclear) > _ASM_BUGFRAME_TEXT(0) > UNLIKELY_END_SECTION > : > -#ifdef HAVE_AS_VMX > : "m" (addr), > -#else > - : "a" (&addr), > -#endif > _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, 0) > - : "memory"); > + : "memory" ); > } > > static always_inline void __vmread(unsigned long field, unsigned long *value) > { > - asm volatile ( > -#ifdef HAVE_AS_VMX > - "vmread %1, %0\n\t" > -#else > - VMREAD_OPCODE MODRM_EAX_ECX > -#endif > + asm volatile ( "vmread %1, %0\n\t" > /* CF==1 or ZF==1 --> BUG() */ > UNLIKELY_START(be, vmread) > _ASM_BUGFRAME_TEXT(0) > UNLIKELY_END_SECTION > -#ifdef HAVE_AS_VMX > : "=rm" (*value) > : "r" (field), > -#else > - : "=c" (*value) > - : "a" (field), > -#endif > _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, 0) > ); Fold this onto the previous line, as you're fixing up all the other closing brackets. > @@ -494,24 +422,14 @@ static always_inline void __invvpid(unsigned long type, u16 vpid, u64 gva) > } operand = {vpid, 0, gva}; > > /* Fix up #UD exceptions which occur when TLBs are flushed before VMXON. */ I find this comment deeply troubling, but lets not go changing that right now. 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Thu, 03 Apr 2025 12:16:33 -0700 (PDT) Message-ID: <539dde2f-8b48-430a-9534-76a58b4c1b4f@citrix.com> Date: Thu, 3 Apr 2025 20:16:32 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/6] x86/msr: remove HAVE_AS_FSGSBASE To: dmkhn@proton.me, xen-devel@lists.xenproject.org Cc: anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com References: <20250403182250.3329498-1-dmukhin@ford.com> <20250403182250.3329498-3-dmukhin@ford.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <20250403182250.3329498-3-dmukhin@ford.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 03/04/2025 7:23 pm, dmkhn@proton.me wrote: > From: Denis Mukhin > > The new toolchain baseline knows the {rd,wr}{f,g}sbase instructions, > no need to carry the workaround in the code. > > Resolves: https://gitlab.com/xen-project/xen/-/work_items/207 > Signed-off-by: Denis Mukhin Reviewed-by: Andrew Cooper From xen-devel-bounces@lists.xenproject.org Thu Apr 03 19:17:32 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 19:17:32 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937200.1338215 (Exim 4.92) (envelope-from ) id 1u0Q4C-00019f-Ih; Thu, 03 Apr 2025 19:17:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937200.1338215; Thu, 03 Apr 2025 19:17:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0Q4C-00019Y-G9; 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Thu, 03 Apr 2025 12:17:29 -0700 (PDT) Message-ID: Date: Thu, 3 Apr 2025 20:17:28 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 3/6] x86/asm: remove HAVE_AS_INVPCID To: dmkhn@proton.me, xen-devel@lists.xenproject.org Cc: anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com References: <20250403182250.3329498-1-dmukhin@ford.com> <20250403182250.3329498-4-dmukhin@ford.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <20250403182250.3329498-4-dmukhin@ford.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 03/04/2025 7:23 pm, dmkhn@proton.me wrote: > From: Denis Mukhin > > The new toolchain baseline knows the invpcid instruction, > no need to carry the workaround in the code. > > Resolves: https://gitlab.com/xen-project/xen/-/work_items/209 > Signed-off-by: Denis Mukhin Reviewed-by: Andrew Cooper From xen-devel-bounces@lists.xenproject.org Thu Apr 03 19:18:07 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 19:18:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937212.1338225 (Exim 4.92) (envelope-from ) id 1u0Q4j-0001iZ-UU; Thu, 03 Apr 2025 19:18:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937212.1338225; Thu, 03 Apr 2025 19:18:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0Q4j-0001iS-RR; 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Thu, 03 Apr 2025 12:18:02 -0700 (PDT) Message-ID: <4b127cf0-b12c-4988-b030-d775bc3d6700@citrix.com> Date: Thu, 3 Apr 2025 20:18:01 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 4/6] x86/emulate: remove HAVE_AS_SSE4_2 To: dmkhn@proton.me, xen-devel@lists.xenproject.org Cc: anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com References: <20250403182250.3329498-1-dmukhin@ford.com> <20250403182250.3329498-5-dmukhin@ford.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <20250403182250.3329498-5-dmukhin@ford.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 03/04/2025 7:23 pm, dmkhn@proton.me wrote: > From: Denis Mukhin > > The new toolchain baseline knows the crc32 instructions, > no need to carry the workaround in the code. > > Resolves: https://gitlab.com/xen-project/xen/-/work_items/206 > Signed-off-by: Denis Mukhin Reviewed-by: Andrew Cooper From xen-devel-bounces@lists.xenproject.org Thu Apr 03 19:22:06 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 19:22:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937226.1338235 (Exim 4.92) (envelope-from ) id 1u0Q8Y-0004iH-ED; Thu, 03 Apr 2025 19:22:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937226.1338235; Thu, 03 Apr 2025 19:22:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0Q8Y-0004iA-BC; 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Thu, 03 Apr 2025 12:21:59 -0700 (PDT) Message-ID: Date: Thu, 3 Apr 2025 20:21:58 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 5/6] x86/emulate: remove HAVE_AS_RDRAND and HAVE_AS_RDSEED To: dmkhn@proton.me, xen-devel@lists.xenproject.org Cc: anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com References: <20250403182250.3329498-1-dmukhin@ford.com> <20250403182250.3329498-6-dmukhin@ford.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <20250403182250.3329498-6-dmukhin@ford.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 03/04/2025 7:23 pm, dmkhn@proton.me wrote: > From: Denis Mukhin > > The new toolchain baseline knows the rdrand/rdseed instructions, > no need to carry the workaround in the code. > > Resolves: https://gitlab.com/xen-project/xen/-/work_items/208 > Signed-off-by: Denis Mukhin > --- > xen/arch/x86/arch.mk | 2 -- > xen/arch/x86/x86_emulate/0fc7.c | 15 +++++---------- Huh... I was expecting a hunk in xen/arch/x86/include/asm/random.h but lookin at it, I see that didn't even get the HAVE_AS_RDRAND treatment in the first place.  Also, the + constraint, rather than =, looks suspicious. Could I ask you to clean those up too please?  The rest of this patch looks fine. ~Andrew From xen-devel-bounces@lists.xenproject.org Thu Apr 03 19:40:35 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 19:40:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937240.1338245 (Exim 4.92) (envelope-from ) id 1u0QQK-0000Pn-Qn; Thu, 03 Apr 2025 19:40:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937240.1338245; Thu, 03 Apr 2025 19:40:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0QQK-0000Pg-OI; Thu, 03 Apr 2025 19:40:24 +0000 Received: by outflank-mailman (input) for mailman id 937240; Thu, 03 Apr 2025 19:40:23 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0QQI-0000PT-I4 for xen-devel@lists.xenproject.org; Thu, 03 Apr 2025 19:40:23 +0000 Received: from mail-24416.protonmail.ch (mail-24416.protonmail.ch [109.224.244.16]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 79b59dea-10c3-11f0-9ffb-bf95429c2676; Thu, 03 Apr 2025 21:40:19 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 79b59dea-10c3-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=proton.me; s=protonmail; t=1743709218; x=1743968418; bh=sc2yFQNXp/F39+/llOCqL2Y7wDs73l+1zvPiHn2ms7I=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector:List-Unsubscribe:List-Unsubscribe-Post; b=TbF3gnOWmFmsGdhckT9iBd7hkzEBFEwWMsMxKDTWQOuloWJcW58C3lWdBmcHStlgI Uerl35GbQe6LQgp87phHxjBKj+cwk3hiOqvvswC+Jnl3KsZ1vN5LUy2+0beBmSwH/s pkCdVnUsiCGlrHTxVPcNRQpgaabyvId4NH+VguDo12nSxWS09hXqbpDIiqIw2wPlpF PjIYK1TgIL/DAvPnNTZtMJXHQZlYOTKDLDbpaUJmeD1yNzPm7vJKWlbOHWFitEWup4 TWk4wBw1g43xlgdh8sqcv0Jhu8ZQBfoKCd6BI1bBcvfCWRIpaMtdbzVabsbM2ZHS6r /bIe2sSjzA0Kg== Date: Thu, 03 Apr 2025 19:40:12 +0000 To: Andrew Cooper From: Denis Mukhin Cc: xen-devel@lists.xenproject.org, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com Subject: Re: [PATCH v2 1/6] x86/vmx: remove HAVE_AS_{EPT,VMX}, GAS_VMX_OP() and *_OPCODE Message-ID: <60W8YcOEaCr_48cvay1GkakH2dwi1KXBfxmzepNh6axJibw3xbS0h-_64B7IRCCcdTP7LQm-sXLWtVPMuG-IhUFukdBHDscuNcVQRnLa91s=@proton.me> In-Reply-To: <9079e1dd-3c2c-43e3-8afb-bf92fd13d3ee@citrix.com> References: <20250403182250.3329498-1-dmukhin@ford.com> <20250403182250.3329498-2-dmukhin@ford.com> <9079e1dd-3c2c-43e3-8afb-bf92fd13d3ee@citrix.com> Feedback-ID: 123220910:user:proton X-Pm-Message-ID: e0f3a1a5839dd01c92875cf655365e6eac06da46 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On Thursday, April 3rd, 2025 at 12:10 PM, Andrew Cooper wrote: >=20 >=20 > On 03/04/2025 7:23 pm, dmkhn@proton.me wrote: >=20 > > From: Denis Mukhin dmukhin@ford.com > >=20 > > The new toolchain baseline knows the VMX instructions, > > no need to carry the workaround in the code. > >=20 > > Move asm for vmxoff directly on the only callsite in vmcs.c >=20 >=20 > Ideally VMXOFF in capitals as it's an instruction name. But, this type > of thing is more commonly phrased as "Inline __vmxoff() into it's single > caller", or so. >=20 > > Updated formatting for all __xxx() calls to be consistent. >=20 >=20 > I'd suggest "for the other wrappers to be". >=20 > > Resolves: https://gitlab.com/xen-project/xen/-/work_items/202 > > Signed-off-by: Denis Mukhin dmukhin@ford.com > > --- > > xen/arch/x86/arch.mk | 4 +- > > xen/arch/x86/hvm/vmx/vmcs.c | 2 +- > > xen/arch/x86/include/asm/hvm/vmx/vmx.h | 119 ++++--------------------- >=20 >=20 > Just as a note, you're CC-ing The Rest, but this is an x86-only change, > so should really only be CCing myself, Jan and Roger. Whoops, I need to improve my tooling. >=20 > > diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c > > index 1d427100ce..aef746a293 100644 > > --- a/xen/arch/x86/hvm/vmx/vmcs.c > > +++ b/xen/arch/x86/hvm/vmx/vmcs.c > > @@ -811,7 +811,7 @@ void cf_check vmx_cpu_down(void) > >=20 > > BUG_ON(!(read_cr4() & X86_CR4_VMXE)); > > this_cpu(vmxon) =3D 0; > > - __vmxoff(); > > + asm volatile ("vmxoff" : : : "memory"); >=20 >=20 > asm volatile ( "vmxoff" ::: "memory" ); >=20 > > local_irq_restore(flags); > > } > > diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmx.h b/xen/arch/x86/incl= ude/asm/hvm/vmx/vmx.h > > index 7c6ba73407..ed6a6986b9 100644 > > --- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h > > +++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h > > @@ -310,97 +292,54 @@ extern uint8_t posted_intr_vector; > > #define INVVPID_ALL_CONTEXT 2 > > #define INVVPID_SINGLE_CONTEXT_RETAINING_GLOBAL 3 > >=20 > > -#ifdef HAVE_AS_VMX > > -# define GAS_VMX_OP(yes, no) yes > > -#else > > -# define GAS_VMX_OP(yes, no) no > > -#endif > > - > > static always_inline void __vmptrld(u64 addr) > > { > > - asm volatile ( > > -#ifdef HAVE_AS_VMX > > - "vmptrld %0\n" > > -#else > > - VMPTRLD_OPCODE MODRM_EAX_06 > > -#endif > > + asm volatile ( "vmptrld %0\n" >=20 >=20 > As you're changing the line anyway, this ought to be \n\t. It's > cosmetic, but comes in handy if you need to read the intermediate assembl= y. >=20 > > /* CF=3D=3D1 or ZF=3D=3D1 --> BUG() */ > > UNLIKELY_START(be, vmptrld) > > _ASM_BUGFRAME_TEXT(0) > > UNLIKELY_END_SECTION > > : > > -#ifdef HAVE_AS_VMX > > : "m" (addr), > > -#else > > - : "a" (&addr), > > -#endif > > _ASM_BUGFRAME_INFO(BUGFRAME_bug, LINE, FILE, 0) > > - : "memory"); > > + : "memory" ); > > } > >=20 > > static always_inline void __vmpclear(u64 addr) > > { > > - asm volatile ( > > -#ifdef HAVE_AS_VMX > > - "vmclear %0\n" > > -#else > > - VMCLEAR_OPCODE MODRM_EAX_06 > > -#endif > > + asm volatile ( "vmclear %0\n" > > /* CF=3D=3D1 or ZF=3D=3D1 --> BUG() */ > > UNLIKELY_START(be, vmclear) > > _ASM_BUGFRAME_TEXT(0) > > UNLIKELY_END_SECTION > > : > > -#ifdef HAVE_AS_VMX > > : "m" (addr), > > -#else > > - : "a" (&addr), > > -#endif > > _ASM_BUGFRAME_INFO(BUGFRAME_bug, LINE, FILE, 0) > > - : "memory"); > > + : "memory" ); > > } > >=20 > > static always_inline void __vmread(unsigned long field, unsigned long v= alue) > > { > > - asm volatile ( > > -#ifdef HAVE_AS_VMX > > - "vmread %1, %0\n\t" > > -#else > > - VMREAD_OPCODE MODRM_EAX_ECX > > -#endif > > + asm volatile ( "vmread %1, %0\n\t" > > / CF=3D=3D1 or ZF=3D=3D1 --> BUG() */ > > UNLIKELY_START(be, vmread) > > _ASM_BUGFRAME_TEXT(0) > > UNLIKELY_END_SECTION > > -#ifdef HAVE_AS_VMX > > : "=3Drm" (*value) > > : "r" (field), > > -#else > > - : "=3Dc" (*value) > > - : "a" (field), > > -#endif > > _ASM_BUGFRAME_INFO(BUGFRAME_bug, LINE, FILE, 0) > > ); >=20 >=20 > Fold this onto the previous line, as you're fixing up all the other > closing brackets. >=20 > > @@ -494,24 +422,14 @@ static always_inline void __invvpid(unsigned long= type, u16 vpid, u64 gva) > > } operand =3D {vpid, 0, gva}; > >=20 > > /* Fix up #UD exceptions which occur when TLBs are flushed before VMXON= . */ >=20 >=20 > I find this comment deeply troubling, but lets not go changing that > right now. >=20 > I'm happy to fix this all on commit. I will appreciate help with that! Thanks! >=20 > ~Andrew From xen-devel-bounces@lists.xenproject.org Thu Apr 03 20:10:24 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 20:10:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937253.1338256 (Exim 4.92) (envelope-from ) id 1u0QtG-0008SQ-2R; Thu, 03 Apr 2025 20:10:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937253.1338256; Thu, 03 Apr 2025 20:10:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0QtF-0008SJ-VJ; Thu, 03 Apr 2025 20:10:17 +0000 Received: by outflank-mailman (input) for mailman id 937253; Thu, 03 Apr 2025 20:10:16 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0QtE-0008SD-Ls for xen-devel@lists.xenproject.org; Thu, 03 Apr 2025 20:10:16 +0000 Received: from mail-wr1-x435.google.com (mail-wr1-x435.google.com [2a00:1450:4864:20::435]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id a836953b-10c7-11f0-9eaa-5ba50f476ded; Thu, 03 Apr 2025 22:10:15 +0200 (CEST) Received: by mail-wr1-x435.google.com with SMTP id ffacd0b85a97d-38f2f391864so735140f8f.3 for ; Thu, 03 Apr 2025 13:10:15 -0700 (PDT) Received: from [192.168.1.183] (host-92-26-98-202.as13285.net. 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Thu, 03 Apr 2025 13:10:14 -0700 (PDT) Message-ID: Date: Thu, 3 Apr 2025 21:10:12 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 6/6] x86/vmx: rework VMX wrappers to use `asm goto()` To: dmkhn@proton.me, xen-devel@lists.xenproject.org Cc: anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com References: <20250403182250.3329498-1-dmukhin@ford.com> <20250403182250.3329498-7-dmukhin@ford.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <20250403182250.3329498-7-dmukhin@ford.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 03/04/2025 7:23 pm, dmkhn@proton.me wrote: > From: Denis Mukhin > > Improve error handling in VMX wrappers by switching to `asm goto()` where > possible. > > vmread_safe() kept as is because the minimally required baseline GCC does > not support output operands in `asm goto`. > > Resolves: https://gitlab.com/xen-project/xen/-/work_items/210 > Signed-off-by: Denis Mukhin I'd suggest limiting this patch to the asm-goto transformations only. > --- > xen/arch/x86/include/asm/hvm/vmx/vmx.h | 141 +++++++++++++------------ > 1 file changed, 73 insertions(+), 68 deletions(-) > > diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmx.h b/xen/arch/x86/include/asm/hvm/vmx/vmx.h > index ed6a6986b9..19d41f7b90 100644 > --- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h > +++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h > @@ -294,54 +294,57 @@ extern uint8_t posted_intr_vector; > > static always_inline void __vmptrld(u64 addr) > { > - asm volatile ( "vmptrld %0\n" > - /* CF==1 or ZF==1 --> BUG() */ > - UNLIKELY_START(be, vmptrld) > - _ASM_BUGFRAME_TEXT(0) > - UNLIKELY_END_SECTION > - : > - : "m" (addr), > - _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, 0) > - : "memory" ); > + asm goto ( "vmptrld %[addr]\n" > + "jbe %l[vmfail]\n\t" Also cosmetic, but the very final line in the asm block ideally doesn't want the \n\t.  Except, this tends to be hard to spot because of the way we use macros such as UNLIKELY_START() or _ASM_EXTABLE() which do just expand to more strings under the hood. > + : > + : [addr] "m" (addr) > + : "memory" > + : vmfail ); > + return; > + > + vmfail: > + BUG(); > } > > static always_inline void __vmpclear(u64 addr) > { > - asm volatile ( "vmclear %0\n" > - /* CF==1 or ZF==1 --> BUG() */ > - UNLIKELY_START(be, vmclear) > - _ASM_BUGFRAME_TEXT(0) > - UNLIKELY_END_SECTION > - : > - : "m" (addr), > - _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, 0) > - : "memory" ); > + asm goto ( "vmclear %[addr]\n" > + "jbe %l[vmfail]\n\t" > + : > + : [addr] "m" (addr) > + : "memory" > + : vmfail ); > + return; > + > + vmfail: > + BUG(); > } > > static always_inline void __vmread(unsigned long field, unsigned long *value) > { > - asm volatile ( "vmread %1, %0\n\t" > - /* CF==1 or ZF==1 --> BUG() */ > - UNLIKELY_START(be, vmread) > - _ASM_BUGFRAME_TEXT(0) > - UNLIKELY_END_SECTION > - : "=rm" (*value) > - : "r" (field), > - _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, 0) > - ); > + bool vmfail; > + > + asm volatile ( "vmread %[field], %[value]\n\t" > + "setbe %[vmfail]\n\t" > + : [value] "=rm" (*value), [vmfail] "=rm" (vmfail) > + : [field] "r" (field) > + : "cc" ); > + if ( vmfail ) > + BUG(); This is almost certainly not an improvement in generated code.  You now need register to hold the boolean, where previously there was a jbe to a ud2 and no extra state required. Here's an example https://godbolt.org/z/GG4r1c7bK showing the difference.   (It also shows up the Clang "rm" constraint bug.  Change vmfail from "=rm" to "=r" to get sane(er) code generation.) Also, you've added a "cc" clobber.  This is one thing you don't need on x86; it's simply assumed, given how many instructions update flags naturally. > @@ -369,22 +372,22 @@ static inline enum vmx_insn_errno vmread_safe(unsigned long field, > static inline enum vmx_insn_errno vmwrite_safe(unsigned long field, > unsigned long value) > { > - unsigned long ret = VMX_INSN_SUCCEED; > - bool fail_invalid, fail_valid; > + unsigned long ret; > > - asm volatile ( "vmwrite %[value], %[field]\n\t" > - ASM_FLAG_OUT(, "setc %[invalid]\n\t") > - ASM_FLAG_OUT(, "setz %[valid]\n\t") > - : ASM_FLAG_OUT("=@ccc", [invalid] "=rm") (fail_invalid), > - ASM_FLAG_OUT("=@ccz", [valid] "=rm") (fail_valid) > - : [field] "r" (field), > - [value] "rm" (value) ); > + asm goto ( "vmwrite %[value], %[field]\n\t" > + "jc %l[vmfail_invalid]\n\t" > + "jz %l[vmfail_error]\n\t" > + : > + : [field] "r" (field), [value] "rm" (value) > + : > + : vmfail_invalid, vmfail_error ); > + return VMX_INSN_SUCCEED; > > - if ( unlikely(fail_invalid) ) > - ret = VMX_INSN_FAIL_INVALID; > - else if ( unlikely(fail_valid) ) > - __vmread(VM_INSTRUCTION_ERROR, &ret); > + vmfail_invalid: > + return VMX_INSN_FAIL_INVALID; > > + vmfail_error: > + __vmread(VM_INSTRUCTION_ERROR, &ret); Something not technically toolchain cleanup, but is in desperate need of doing. __vmread() being void and producing an output by pointer is insane, and leads to ugly code such as this, even if the compiler can usually fix up behind the scenes. It would be lovely to have: unsigned long vmread(unsigned int field) which can be wrapped by __vmread() with "*value = vmread(field);" or so.  (Don't go converting all users; that's a huge task). Then, this vmfail_error can be simply "return vmread(VM_INSTRUCTION_ERROR);" and you can drop the ret variable. ~Andrew From xen-devel-bounces@lists.xenproject.org Thu Apr 03 20:43:21 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 20:43:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937274.1338281 (Exim 4.92) (envelope-from ) id 1u0RP3-0000kr-P0; Thu, 03 Apr 2025 20:43:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937274.1338281; Thu, 03 Apr 2025 20:43:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0RP3-0000kk-MP; Thu, 03 Apr 2025 20:43:09 +0000 Received: by outflank-mailman (input) for mailman id 937274; Thu, 03 Apr 2025 20:43:08 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0RP2-0000ke-Fd for xen-devel@lists.xenproject.org; Thu, 03 Apr 2025 20:43:08 +0000 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [2a00:1450:4864:20::32a]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 3e09fbb3-10cc-11f0-9ffb-bf95429c2676; Thu, 03 Apr 2025 22:43:05 +0200 (CEST) Received: by mail-wm1-x32a.google.com with SMTP id 5b1f17b1804b1-43cf0d787eeso12978455e9.3 for ; Thu, 03 Apr 2025 13:43:05 -0700 (PDT) Received: from localhost.localdomain (host-92-26-98-202.as13285.net. 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No functional change. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: Nicola Vetrini CC: consulting@bugseng.com --- xen/arch/arm/gic-v2.c | 2 +- xen/include/xen/init.h | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c index 02043c0d4b1f..b23e72a3d05d 100644 --- a/xen/arch/arm/gic-v2.c +++ b/xen/arch/arm/gic-v2.c @@ -1311,7 +1311,7 @@ static void gicv2_do_LPI(unsigned int lpi) BUG(); } -const static struct gic_hw_operations gicv2_ops = { +static const struct gic_hw_operations gicv2_ops = { .info = &gicv2_info, .init = gicv2_init, .secondary_init = gicv2_secondary_cpu_init, diff --git a/xen/include/xen/init.h b/xen/include/xen/init.h index 0a4223833755..abf275f0eb72 100644 --- a/xen/include/xen/init.h +++ b/xen/include/xen/init.h @@ -63,9 +63,9 @@ typedef int (*initcall_t)(void); typedef void (*exitcall_t)(void); #define presmp_initcall(fn) \ - const static initcall_t __initcall_##fn __init_call("presmp") = (fn) + static const initcall_t __initcall_##fn __init_call("presmp") = (fn) #define __initcall(fn) \ - const static initcall_t __initcall_##fn __init_call("1") = (fn) + static const initcall_t __initcall_##fn __init_call("1") = (fn) #define __exitcall(fn) \ static exitcall_t __exitcall_##fn __exit_call = fn base-commit: befc384d21784affa3daf2abc85b02500e4dc545 -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Thu Apr 03 21:04:24 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 21:04:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937286.1338291 (Exim 4.92) (envelope-from ) id 1u0RjW-000608-DZ; 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Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 2025-04-03 22:43, Andrew Cooper wrote: > MISRA C:2012 Ammendment 3 (which is under consideration, but not used > by Xen ^ typo > yet) is more particular about the order of keywords. > > No functional change. > > Signed-off-by: Andrew Cooper Any specific reason not to give [1] and [2] the same treatment? Other than that, looks good to me. [1] https://saas.eclairit.com:3787/fs/var/local/eclair/xen-project.ecdf/xen-project/people/bugseng/xen/ECLAIR_normal/MISRA_C_AMD3/X86_64/9616508934/PROJECT.ecd;/sources/xen/arch/x86/genapic/x2apic.c.html#R4145_1 [2] https://saas.eclairit.com:3787/fs/var/local/eclair/xen-project.ecdf/xen-project/people/bugseng/xen/ECLAIR_normal/MISRA_C_AMD3/X86_64/9616508934/PROJECT.ecd;/sources/xen/arch/x86/hvm/dom0_build.c.html#R13937_1 > --- > CC: Jan Beulich > CC: Roger Pau Monné > CC: Stefano Stabellini > CC: Julien Grall > CC: Volodymyr Babchuk > CC: Bertrand Marquis > CC: Michal Orzel > CC: Nicola Vetrini > CC: consulting@bugseng.com > --- > xen/arch/arm/gic-v2.c | 2 +- > xen/include/xen/init.h | 4 ++-- > 2 files changed, 3 insertions(+), 3 deletions(-) > > diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c > index 02043c0d4b1f..b23e72a3d05d 100644 > --- a/xen/arch/arm/gic-v2.c > +++ b/xen/arch/arm/gic-v2.c > @@ -1311,7 +1311,7 @@ static void gicv2_do_LPI(unsigned int lpi) > BUG(); > } > > -const static struct gic_hw_operations gicv2_ops = { > +static const struct gic_hw_operations gicv2_ops = { > .info = &gicv2_info, > .init = gicv2_init, > .secondary_init = gicv2_secondary_cpu_init, > diff --git a/xen/include/xen/init.h b/xen/include/xen/init.h > index 0a4223833755..abf275f0eb72 100644 > --- a/xen/include/xen/init.h > +++ b/xen/include/xen/init.h > @@ -63,9 +63,9 @@ typedef int (*initcall_t)(void); > typedef void (*exitcall_t)(void); > > #define presmp_initcall(fn) \ > - const static initcall_t __initcall_##fn __init_call("presmp") = > (fn) > + static const initcall_t __initcall_##fn __init_call("presmp") = > (fn) > #define __initcall(fn) \ > - const static initcall_t __initcall_##fn __init_call("1") = (fn) > + static const initcall_t __initcall_##fn __init_call("1") = (fn) > #define __exitcall(fn) \ > static exitcall_t __exitcall_##fn __exit_call = fn > > > base-commit: befc384d21784affa3daf2abc85b02500e4dc545 -- Nicola Vetrini, B.Sc. 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Thu, 03 Apr 2025 14:10:12 -0700 (PDT) Message-ID: <99c9bfee-cf7a-4a38-a3bd-2475197ba3f7@citrix.com> Date: Thu, 3 Apr 2025 22:10:10 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen: Swap 'const static' for 'static const' To: Nicola Vetrini Cc: Xen-devel , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , consulting@bugseng.com References: <20250403204301.1658436-1-andrew.cooper3@citrix.com> <5e92df092cc323b061716004fdd41c33@bugseng.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <5e92df092cc323b061716004fdd41c33@bugseng.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 03/04/2025 10:04 pm, Nicola Vetrini wrote: > On 2025-04-03 22:43, Andrew Cooper wrote: >> MISRA C:2012 Ammendment 3 (which is under consideration, but not used >> by Xen >                ^ typo >> yet) is more particular about the order of keywords. >> >> No functional change. >> >> Signed-off-by: Andrew Cooper > > Any specific reason not to give [1] and [2] the same treatment? Other > than that, looks good to me. > > [1] > https://saas.eclairit.com:3787/fs/var/local/eclair/xen-project.ecdf/xen-project/people/bugseng/xen/ECLAIR_normal/MISRA_C_AMD3/X86_64/9616508934/PROJECT.ecd;/sources/xen/arch/x86/genapic/x2apic.c.html#R4145_1 > [2] > https://saas.eclairit.com:3787/fs/var/local/eclair/xen-project.ecdf/xen-project/people/bugseng/xen/ECLAIR_normal/MISRA_C_AMD3/X86_64/9616508934/PROJECT.ecd;/sources/xen/arch/x86/hvm/dom0_build.c.html#R13937_1 Oh, inattention to detail with my `git grep`. I'll update to include these.  Thanks. ~Andrew From xen-devel-bounces@lists.xenproject.org Thu Apr 03 21:41:54 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 21:41:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937318.1338312 (Exim 4.92) (envelope-from ) id 1u0SJm-0007xh-BY; Thu, 03 Apr 2025 21:41:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937318.1338312; Thu, 03 Apr 2025 21:41:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0SJm-0007xa-8Z; Thu, 03 Apr 2025 21:41:46 +0000 Received: by outflank-mailman (input) for mailman id 937318; Thu, 03 Apr 2025 21:41:44 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0SJk-0007xU-Oz for xen-devel@lists.xenproject.org; Thu, 03 Apr 2025 21:41:44 +0000 Received: from mail-wm1-x332.google.com (mail-wm1-x332.google.com [2a00:1450:4864:20::332]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 6f082bbb-10d4-11f0-9eaa-5ba50f476ded; Thu, 03 Apr 2025 23:41:43 +0200 (CEST) Received: by mail-wm1-x332.google.com with SMTP id 5b1f17b1804b1-43d07ca6a80so7190435e9.1 for ; Thu, 03 Apr 2025 14:41:43 -0700 (PDT) Received: from localhost.localdomain (host-92-26-98-202.as13285.net. [92.26.98.202]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c301b760bsm2794473f8f.55.2025.04.03.14.41.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Apr 2025 14:41:41 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 6f082bbb-10d4-11f0-9eaa-5ba50f476ded DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1743716502; x=1744321302; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=rUR1hjnfI2SJbwOWct6yvBmR39QiKHrxlQlFmPq5U4c=; b=UaDMjHcdK2uIkNoYlmX9okudcetL4EZux2YHhL+AMqiXxuNMe1sUZWiJ0Fe29mWjw7 ZaajsDrJma2w7Q97KV0lwWVbUoqV9UesZWs+fVs4ay7lD2kisis28eOMavRPF8lAMO8z 1311ade2q41nf/Iq40HRR9x3ZvQSaPrjScr3E= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1743716502; x=1744321302; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=rUR1hjnfI2SJbwOWct6yvBmR39QiKHrxlQlFmPq5U4c=; b=PIMTe09t9j2y9TOVJFiC2TjqIIZTLWj8IBV4f2maJv/avVzHgrFOn8ZsdjtIK8X2CQ E2CYrML+Vdyx46tE7Smwp8O2XJ7CodJyKBVz3NRfmgVOI5oFxSAXLPdJC76NgTp4uUW/ 2JI/s2lKcTchXhyIbWf1aYGWumy8w701Cj8InqdJgy2ZG+uH8Elx6gm/rvgG+7MxISIs Is7VO2Q5+4/OE/jbloH9fbm7U5RYajH5H6kKsh9qIGGw3KpTPOKSTTkVfqzdK9bkut/W NXAEqDHn3mZOxePRJMD7qRivkMY1+6fJhliASWh/bw8nIY6FskfT6YlcFiR/Vq2nL0+C of1w== X-Gm-Message-State: AOJu0YzlowtpoNsb+zCQYnSqw8QBmjf+8QVur3bI/6URq0joiJnV6Kq6 2gKSCqlUADlVEgKWvDdCeiRlu2OgwG8la1AsSYtAebNa5zxAfrUafGX60KYDLZPGWwOX+KUa9j5 2xz0= X-Gm-Gg: ASbGncuAXglXoUZuM016WfutRpO0c5ISzmhMuks7fuPudBppunLuzi5pU2yrzebBbck k+0qlWEhzQpJ7DEAiuYbL0rc8MFgaC8bGjKkaI+lWqZkHM5ll9axUUuSTPKZy7Jf3Bp/7xRgfE8 vtEQuly2RSlgiui/UIWin+2/bTNFiAQESdqHCb4H0ySMbkTaacb6U9/79QK//kivDtRvwPIStBN MG1y+28o/rm24dpDhEn6V5Aqx1wk0YXRQQ5nIPv4NgFW2gfjyjU97EQOIM8744u9SKvw9FclG4U vvrY6PKSWwjXmHj19pzEwx/scjkPyiV+ewBd3lLbd8eZkMld3aRLEYSbqnJ7JJud6CGVaNQypkg aF/zcm8rN0XFfPPY/4w== X-Google-Smtp-Source: AGHT+IHCykEcsylS6NMJv4p0nnIz6MtOy71k6bWh5aUT36LJcHYC3kIWfLkf2yOV9wJp9csmkaHTgw== X-Received: by 2002:a5d:64c3:0:b0:390:f9d0:5e4 with SMTP id ffacd0b85a97d-39cb3595eb1mr604540f8f.21.1743716502629; Thu, 03 Apr 2025 14:41:42 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , Nicola Vetrini , consulting@bugseng.com Subject: [PATCH v2] xen: Consistently use 'static' first Date: Thu, 3 Apr 2025 22:41:39 +0100 Message-Id: <20250403214139.1671954-1-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250403204301.1658436-1-andrew.cooper3@citrix.com> References: <20250403204301.1658436-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit MISRA C:2012 Amendment 3 (which is under consideration, but not used by Xen yet) is more particular about having the storage class specifier first. No functional change. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné CC: Stefano Stabellini CC: Julien Grall CC: Volodymyr Babchuk CC: Bertrand Marquis CC: Michal Orzel CC: Nicola Vetrini CC: consulting@bugseng.com v2: * Fix x2apic_mode and orders[] too. --- xen/arch/arm/gic-v2.c | 2 +- xen/arch/x86/genapic/x2apic.c | 4 ++-- xen/arch/x86/hvm/dom0_build.c | 4 ++-- xen/include/xen/init.h | 4 ++-- 4 files changed, 7 insertions(+), 7 deletions(-) diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c index 02043c0d4b1f..b23e72a3d05d 100644 --- a/xen/arch/arm/gic-v2.c +++ b/xen/arch/arm/gic-v2.c @@ -1311,7 +1311,7 @@ static void gicv2_do_LPI(unsigned int lpi) BUG(); } -const static struct gic_hw_operations gicv2_ops = { +static const struct gic_hw_operations gicv2_ops = { .info = &gicv2_info, .init = gicv2_init, .secondary_init = gicv2_secondary_cpu_init, diff --git a/xen/arch/x86/genapic/x2apic.c b/xen/arch/x86/genapic/x2apic.c index 74a6d808ac30..1d55eb6b8a41 100644 --- a/xen/arch/x86/genapic/x2apic.c +++ b/xen/arch/x86/genapic/x2apic.c @@ -216,9 +216,9 @@ static struct notifier_block x2apic_cpu_nfb = { static int8_t __initdata x2apic_phys = -1; boolean_param("x2apic_phys", x2apic_phys); -enum { +static enum { unset, physical, mixed -} static __initdata x2apic_mode = unset; +} x2apic_mode __initdata = unset; static int __init cf_check parse_x2apic_mode(const char *s) { diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build.c index daf1b6f88b14..9fd68df7b936 100644 --- a/xen/arch/x86/hvm/dom0_build.c +++ b/xen/arch/x86/hvm/dom0_build.c @@ -91,10 +91,10 @@ static int __init pvh_populate_memory_range(struct domain *d, unsigned long start, unsigned long nr_pages) { - struct { + static const struct { unsigned long align; unsigned int order; - } static const __initconst orders[] = { + } orders[] __initconst = { /* NB: must be sorted by decreasing size. */ { .align = PFN_DOWN(GB(1)), .order = PAGE_ORDER_1G }, { .align = PFN_DOWN(MB(2)), .order = PAGE_ORDER_2M }, diff --git a/xen/include/xen/init.h b/xen/include/xen/init.h index 0a4223833755..abf275f0eb72 100644 --- a/xen/include/xen/init.h +++ b/xen/include/xen/init.h @@ -63,9 +63,9 @@ typedef int (*initcall_t)(void); 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pr=C From: Jason Andryuk To: CC: Jason Andryuk , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , "Volodymyr Babchuk" , Andrew Cooper , Anthony PERARD , "Jan Beulich" , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v3 0/7] ARM split hardware and control domains Date: Thu, 3 Apr 2025 17:46:01 -0400 Message-ID: <20250403214608.152954-1-jason.andryuk@amd.com> X-Mailer: git-send-email 2.49.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Received-SPF: None (SATLEXMB04.amd.com: jason.andryuk@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN1PEPF0000468D:EE_|IA0PR12MB8304:EE_ X-MS-Office365-Filtering-Correlation-Id: 70a9255c-b9e1-4e20-6e9f-08dd72f8f1f8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|82310400026|36860700013|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?82VW6m3CMHC2x7/ulmZf+tinh0XKSfWMV8C1Kl9bl+V4J2aab3h6+J9IDkiw?= =?us-ascii?Q?r1Xkk0vY+si9xuAJB2Un6YM0WNFnnmCtZqE8PUBgSqSfBK7e63R65cqFYurL?= =?us-ascii?Q?GeqXkVG0pywFylPYUy18kINLUqx+J+h57rAJLyF8wq6nJ9mRO7k5McPY14r+?= =?us-ascii?Q?/fUUCnT2hCiQ+M2x1IkWeFxmCKzUdJ0QSe2konIadi+QHwrHMmSiPkknaI1O?= =?us-ascii?Q?/76olfqgzmTZhjOJVFrChBBAP3ad9nhRSnxQEWphthRoXZS39gPfIF43fH8K?= =?us-ascii?Q?faOrsV6268vFTg5lPliWYu9aQIPXtt+aUZJAyWzrbLe54Wgi1rRIkZOnsjQK?= =?us-ascii?Q?nBunSGYfq4GXt51OPf+4tYvXxGpr2lh6w3CWvhBAiVuaCwyrqF8YbnLnr4T9?= =?us-ascii?Q?gLbosFDuogsVvpLuC9I/Y+WX1H7zRpM0VAhLwO5Dn6qdf0eJI4rjwH+JU6su?= =?us-ascii?Q?iWYx4aTIv189vXxGpBR00vggKgxGmwpS108DYyinXjshfuhZJhgOHJY3dWuG?= =?us-ascii?Q?0mROJYPCk5OXl6UMA7kzxJUS6uGQa+fZVG0dezBMy2jjdIQ8Lxr/FKoy/rl1?= =?us-ascii?Q?9KjVtgn0A5/42r5Zke5fuw3F2HHJT9RsUof2vxen1dzsWObGTQ2TpeOmQ7KI?= =?us-ascii?Q?sVgvFB2bLPg3nEwdDfA0Iwdmw9XwxSk8SLxFxdCLl5Yn6mDeIL4N1Rgr2FiF?= =?us-ascii?Q?3ndlFZmTktDIp1gcLYUO3wM6M03Jq7Zd7ZD/3pmuEFe2PvCxt5cqU0TDnL4b?= =?us-ascii?Q?KFSO84o134FdEgNH1TeYIYL71wz6kI9j6PUM3tvQ4wcssliKvnF7pG+F+afC?= =?us-ascii?Q?W7z1r0snjVSCX1YRtYBAYHO6IgB0uk+fCKPgWMV+BfTb9U/q2fQ7s2/yR+Qi?= =?us-ascii?Q?6Qkr+KaFppJ3oMMdF8D7KT1za9NMZGvWFb2P7vPbfbO13HuHwNfoz6CR+xy7?= =?us-ascii?Q?BV5oFaRornpZa1bZIyrWu5fdDX/rQfTrc2R+7WhvTy00Jin3qCZ3lI2YziAj?= =?us-ascii?Q?fk8AaiXKIxdLF9fx5NwWcqhwe+d3RHtnS/cvUs2zgz94nzWrSU0Kt7B7V+fG?= =?us-ascii?Q?IZpEyDQukdmqkGePw1oYaN7adj/kpiJaWlpZubv++ZYxjcKbqREY69QLaWKA?= =?us-ascii?Q?UQr5t43ijXtUoL9uQWM/HhaMt8sctlWRIOFeKZxZjBg2o+tx2BjgxgyLLghd?= =?us-ascii?Q?Mm2GORUoQLOhqf5FQDpMGQBfKAHbn03fk6USqkwVsVxsR4LHACdp1RmWi1/+?= =?us-ascii?Q?6yqd5dJmf5/PHw+zcBrzu/krobBhVXD9fSi+3tME1qdVLjF/bkW+CQrLBAng?= =?us-ascii?Q?D2IOWiuYPd4iUi94Y7cHb4Qkkx19u3+gM3x2CLsoUEPwjCLoWEgc7s/Pzr2V?= =?us-ascii?Q?AdTCJzMV/hIpkJiWjotmtxiFCyyKKFYxOR9MOvxcde/P9ocqlnRyyQNSGQGp?= =?us-ascii?Q?KDZ+Ayix9WWejeZfCVst0dLBxc9j5w7iGlqFLtu/tSYKG3TteP5NMEp8FsQW?= =?us-ascii?Q?fo1RyaLUgvOm+Uk=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(82310400026)(36860700013)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Apr 2025 21:46:09.3101 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 70a9255c-b9e1-4e20-6e9f-08dd72f8f1f8 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF0000468D.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB8304 This series implements separation of dom0 into separate hardware and control domains. It uses the capabilities idea from Hyperlaunch - hardware, control, and xenstore. It's been tested with dom1 as control, dom2 as a domU, and dom3 as hardware and xenstore. To keep things more managable, this v3 is only the ARM hypervisor changes, and one associated init-dom0less change. The series is slightly re-ordered to move xenstore changes ahead of adding the capabilities. "xen/arm: dom0less use has_dtb local variable" is a new patch to slightly simplify "xen/arm: Add capabilities to dom0less". Setting hardware domain as domid 0 is removed. I've been unable to run a combined control/xenstore. Linux console output stops shortly after the domain determines it should be XS_LOCAL. I have not investigated further. Daniel P. Smith (1): xen: introduce hardware domain create flag Jason Andryuk (6): xen/arm: dom0less hwdom construction xen/arm: dom0less delay xenstore initialization xen/arm: dom0less seed xenstore grant table entry tools/init-dom0less: Only seed legacy xenstore grants xen/arm: dom0less use has_dtb local variable xen/arm: Add capabilities to dom0less docs/misc/arm/device-tree/booting.txt | 11 ++ tools/helpers/init-dom0less.c | 10 +- xen/arch/arm/dom0less-build.c | 195 ++++++++++++++++------ xen/arch/arm/domain.c | 3 +- xen/arch/arm/domain_build.c | 11 +- xen/arch/arm/include/asm/dom0less-build.h | 2 + xen/arch/arm/include/asm/domain_build.h | 3 +- xen/arch/x86/setup.c | 3 +- xen/common/domain.c | 7 +- xen/common/grant_table.c | 14 ++ xen/include/public/bootfdt.h | 31 ++++ xen/include/xen/domain.h | 2 + xen/include/xen/grant_table.h | 7 + 13 files changed, 238 insertions(+), 61 deletions(-) create mode 100644 xen/include/public/bootfdt.h -- 2.49.0 From xen-devel-bounces@lists.xenproject.org Thu Apr 03 21:46:25 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 21:46:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937340.1338349 (Exim 4.92) (envelope-from ) id 1u0SOE-0000ZO-G5; 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pr=C From: Jason Andryuk To: CC: Jason Andryuk , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , "Volodymyr Babchuk" Subject: [PATCH v3 2/7] xen/arm: dom0less hwdom construction Date: Thu, 3 Apr 2025 17:46:03 -0400 Message-ID: <20250403214608.152954-3-jason.andryuk@amd.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250403214608.152954-1-jason.andryuk@amd.com> References: <20250403214608.152954-1-jason.andryuk@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Received-SPF: None (SATLEXMB04.amd.com: jason.andryuk@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN1PEPF0000468D:EE_|MW4PR12MB6973:EE_ X-MS-Office365-Filtering-Correlation-Id: c20e8eec-c082-4e90-fdda-08dd72f8f412 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|36860700013|82310400026; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?BM6H8rdaJOKpirfc6hC/bkhW0EONp+w6sUlPhjOo4+2ujs1ZS/uU79IfhE9Q?= =?us-ascii?Q?jwpo8w+2iIRnndLgqzl+ia+dyCk6YaUCNCuE6td8nvxWAQPrL1zpNNgiE7zX?= =?us-ascii?Q?knHJpC+lNXw/EpNFtE0/Q0kYlQ3uvAxzCPZjNwCQyZMfNkWOPcX6HBK0xnb2?= =?us-ascii?Q?gFz4Boij6uPetIB84XRNTO42L0vov5k+b0rTxk8WX4Ifvwc7Lyt4nivWXaNk?= =?us-ascii?Q?uZ9xlEY73Fuikd85+CsTWhyYA+G8aHLCzBHZxNDGGNGnuBO0ALI1iYl8Ws/6?= =?us-ascii?Q?Gf3o2U4M02Z0G/cxzUBS7x6ZqEU5yt7jHMHbfJHEdaCdB199G7aifmJBmAyi?= =?us-ascii?Q?8/V3EvqiwAbZVw1yx4z2hB14f4O/DdQzXs+wMTF1tET8o71yHE86ga+kHqOb?= =?us-ascii?Q?EtJX2k4VnE3Spj0Tec9Rtnkokn+fh8Z+YA9dPkWNbXFP6GA4lpVIs/ZaaFtJ?= =?us-ascii?Q?CcRcUCiN26cuSQYoes6HbO43SRda8HEHDuyY0XBXXbsBaKLlK6NTfEV1XeU6?= =?us-ascii?Q?OpJjiEXSUcZ/WqaQg6D+0tlgZP8rHCTAKtCX3G12ev+gU4SM33jaz2M84JxM?= =?us-ascii?Q?gTUuKnmZR7bWYwa0DD3o3wDw5QcxRI8Rc6FVVvgNQKaqL6PUlZgWNVK4lZiS?= =?us-ascii?Q?9rYivHEG+B7UOyuu99oaTs9em8ADt3SBM5ijVtBVLpI2s5SCsL48ejQvAt61?= =?us-ascii?Q?14FePsgTpRfT+2CtrTiLC5y8vTRwKzlgY6jHc37Jrx8H06rfOp4HI7dqb7Ly?= =?us-ascii?Q?ZCI2dA1yZN4i1+covuYYR32Qq8jSHsrFfoaeb5/ebyDwkgIQHc8adOi1VwFE?= =?us-ascii?Q?N3lIVFwrsQk8jB5M4aXhgPm2YZWsGZGvwZlWI0Tzi7ZIdh3s4s8yqsp1R3r8?= =?us-ascii?Q?knZZUr+1mDCZnEMPXW/c3EKAIbss9v3us6Bki5kq3zFUEATS+BYgONKn/U6M?= =?us-ascii?Q?npWEaV7hWFaZ5aKBFrChEisb9s/4+D76K7z/aLXE4fnfJZQ8WsUvKC+9zbcR?= =?us-ascii?Q?+dC3O4y2C5PPTQavr+EZDGaYsqDNrJJ18WTeHzEZDJf3zOJ4ec3L3+11+TkH?= =?us-ascii?Q?K4kRmJJaWgNKmUey8zKV6n81Ud+OmegIVo1UF7VFKMnZ44KbBYOkkebFQ9FV?= =?us-ascii?Q?ScC3KCey118YS39pByXsGv6RvLWajWXwuU/Rh/YydJyTu6q59hZPsAjXUTe1?= =?us-ascii?Q?F4zBznQUjJJ5zHmdx89XTbcvkUqBmZv77S2MTm6C5pA/EGnZzZkkK70Ii9O/?= =?us-ascii?Q?Kf2tHgabaHv6j84yhfaZCZAgruasm1QGFeYSvjop92PfpVD7VIJoMWpBpTpi?= =?us-ascii?Q?+jL9Nqm9II5V0SvujRLS4S0l/kfFOsVKZZ8gNnD1jovQYg14sv33ew2u503+?= =?us-ascii?Q?DWkvoUuBeLJvVy5aC4kDA83LJ7RALfxR34iMQGEDRn4mxKJsmKF4yJcADIaw?= =?us-ascii?Q?mCOlvdwpm0bF535XB/1wzKaqbdN6vctNzha2O+vW1tZp1MzJ2hRMzJTnwQ98?= =?us-ascii?Q?84MFyycDjYxwiow=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(376014)(36860700013)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Apr 2025 21:46:12.8390 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c20e8eec-c082-4e90-fdda-08dd72f8f412 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF0000468D.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB6973 When creating a hardware domain, have the dom0less code call construct_hwdom() which is shared with the dom0 code. The hardware domain requires building that best matches the dom0 build path. Re-use it to keep them in sync. The device tree node of the dom0less config is now passed into construct_hwdom(). dom0 uses /chosen for process_shm while a hwdom will use the value from its dom0less device tree node. Signed-off-by: Jason Andryuk --- v3: Rebase on process_shm_chosen() removal --- xen/arch/arm/dom0less-build.c | 57 ++++++++++++++----------- xen/arch/arm/domain_build.c | 7 +-- xen/arch/arm/include/asm/domain_build.h | 3 +- 3 files changed, 39 insertions(+), 28 deletions(-) diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c index bd15563750..7bc6a6c4d7 100644 --- a/xen/arch/arm/dom0less-build.c +++ b/xen/arch/arm/dom0less-build.c @@ -929,36 +929,45 @@ static int __init construct_domU(struct domain *d, /* type must be set before allocate memory */ d->arch.type = kinfo.type; #endif - if ( !dt_find_property(node, "xen,static-mem", NULL) ) - allocate_memory(d, &kinfo); - else if ( !is_domain_direct_mapped(d) ) - allocate_static_memory(d, &kinfo, node); - else - assign_static_memory_11(d, &kinfo, node); - - rc = process_shm(d, &kinfo, node); - if ( rc < 0 ) - return rc; - - /* - * Base address and irq number are needed when creating vpl011 device - * tree node in prepare_dtb_domU, so initialization on related variables - * shall be done first. - */ - if ( kinfo.vpl011 ) + if ( is_hardware_domain(d) ) { - rc = domain_vpl011_init(d, NULL); + rc = construct_hwdom(&kinfo, node); if ( rc < 0 ) return rc; } + else + { + if ( !dt_find_property(node, "xen,static-mem", NULL) ) + allocate_memory(d, &kinfo); + else if ( !is_domain_direct_mapped(d) ) + allocate_static_memory(d, &kinfo, node); + else + assign_static_memory_11(d, &kinfo, node); - rc = prepare_dtb_domU(d, &kinfo); - if ( rc < 0 ) - return rc; + rc = process_shm(d, &kinfo, node); + if ( rc < 0 ) + return rc; - rc = construct_domain(d, &kinfo); - if ( rc < 0 ) - return rc; + /* + * Base address and irq number are needed when creating vpl011 device + * tree node in prepare_dtb_domU, so initialization on related variables + * shall be done first. + */ + if ( kinfo.vpl011 ) + { + rc = domain_vpl011_init(d, NULL); + if ( rc < 0 ) + return rc; + } + + rc = prepare_dtb_domU(d, &kinfo); + if ( rc < 0 ) + return rc; + + rc = construct_domain(d, &kinfo); + if ( rc < 0 ) + return rc; + } domain_vcpu_affinity(d, node); diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index b8f282ff10..0a329f9f5e 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -2305,10 +2305,11 @@ static int __init construct_dom0(struct domain *d) if ( rc < 0 ) return rc; - return construct_hwdom(&kinfo); + return construct_hwdom(&kinfo, NULL); } -int __init construct_hwdom(struct kernel_info *kinfo) +int __init construct_hwdom(struct kernel_info *kinfo, + const struct dt_device_node *node) { struct domain *d = kinfo->d; int rc; @@ -2327,7 +2328,7 @@ int __init construct_hwdom(struct kernel_info *kinfo) if ( acpi_disabled ) { - rc = process_shm(d, kinfo, NULL); + rc = process_shm(d, kinfo, node); if ( rc < 0 ) return rc; } diff --git a/xen/arch/arm/include/asm/domain_build.h b/xen/arch/arm/include/asm/domain_build.h index 134290853c..17619c875d 100644 --- a/xen/arch/arm/include/asm/domain_build.h +++ b/xen/arch/arm/include/asm/domain_build.h @@ -13,7 +13,8 @@ bool allocate_bank_memory(struct kernel_info *kinfo, gfn_t sgfn, paddr_t tot_size); void allocate_memory(struct domain *d, struct kernel_info *kinfo); int construct_domain(struct domain *d, struct kernel_info *kinfo); -int construct_hwdom(struct kernel_info *kinfo); +int construct_hwdom(struct kernel_info *kinfo, + const struct dt_device_node *node); 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pr=C From: Jason Andryuk To: CC: Jason Andryuk , Anthony PERARD Subject: [PATCH v3 5/7] tools/init-dom0less: Only seed legacy xenstore grants Date: Thu, 3 Apr 2025 17:46:06 -0400 Message-ID: <20250403214608.152954-6-jason.andryuk@amd.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250403214608.152954-1-jason.andryuk@amd.com> References: <20250403214608.152954-1-jason.andryuk@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN1PEPF0000468A:EE_|MN0PR12MB5883:EE_ X-MS-Office365-Filtering-Correlation-Id: 743ec4a8-fe24-4f99-d049-08dd72f8f632 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|376014|36860700013; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?7LUODd+DJM4ySzKY+o7Habc7/hKMUNDAdGfoOiqeZAtji4ldFpdruLuA9GDB?= =?us-ascii?Q?i9TX5t/kT7C8Ql78Od8WLrD0ycRru1OLmYUdJBEFRMM6pi5WoMYNNMfoQ/bY?= =?us-ascii?Q?F33bMzk1sOND5f3HlWspV/c9mQrgyyVuX7kym+kt9jxEpyFOMfTpvQQfU1va?= =?us-ascii?Q?Iwz89nDWIYOB+z3aB5SHyiYq4p1vTlPke3nUw2LfwWy+iGeC8EUCHMOoq8WH?= =?us-ascii?Q?F2qZXMc+T3FWHMkqtvZvXxJgSzEUIBwvqGw5RHjaAMlX9TpvwuT/Ma0DoRae?= =?us-ascii?Q?JL/Qjrq/0Cdhk2HAyF5aaoNLpOB9otZTyC5LjTB9ae5+6zWV6HmJQHyuUREf?= =?us-ascii?Q?UM8pRhM9VHs1kYNPV1LN1pajuMIxh4+CHGLPn/VVu67ZZ5thB/lvIwajth8I?= =?us-ascii?Q?sIS3czOLae9MXxle2j7XpkcqvEs5TmcpK58ivpKhz531Pzxb30AGBz5JOreN?= =?us-ascii?Q?so2aDjG1wpqPcFqtUC/wMk211Odmm436E/v6b49GBWuiTMLti2vJJlB7dlEw?= =?us-ascii?Q?d+OT8RQO2xbsGGiqeGfK+xykYN6oxKzAUxDXRGBybtaZD0wFWTyB1tHiisj3?= =?us-ascii?Q?Yy2Tk9HLElFYUAZ2DfmBRQ25Fc3G1jZafWP9Rs9nzt9wHZpTNfpbhBrlOLtk?= =?us-ascii?Q?3DM42CXPLLTF8gPST0R2MBYfqBu7eVUaoj4yGXNEPdpjnMT3j8dDKHRn79ZF?= =?us-ascii?Q?xBVT/K03CSW/mNDrkRp/A4UVPGT0gXCum5iBn/p6a97z/qGYF3JGmIHtI7ED?= =?us-ascii?Q?OY/p2mSrhlgcQH6nr+GaAKMHiFjdlOYERPQPl1JBYEeXXjK9HQ0JMMe0Au/N?= =?us-ascii?Q?/zcBtkgErKGiQ9frDv9Axzq1nHxfIh5pt5HRacbiwJBMmrqpsJKB7j/8xqvd?= =?us-ascii?Q?sLqTGWyiCpzdFffj1j4jev8ArHn0fnsGTxs5Mf85Fbb6CrjBqracHdWuxGXy?= =?us-ascii?Q?jQatnidlAPNUmhF0FOMox98chxRU2aPAmtGS/Q5ciwO0KF0j3mU9jn6Nl3Qs?= =?us-ascii?Q?G6U/JLl+wV41N5AbMOQ/F+eifupkkKveryDItYCzPdNs30Gd8qC1z+VqWWod?= =?us-ascii?Q?DAE707M2CWpgpYn1zGFpFV8+wpwVoxY1yqqSt1/S4Du96yWKdNXgS5Z0HiRt?= =?us-ascii?Q?uuY+qoAFpwUozyloFmGrON8UvjuvJDGiGkOxeL8CpzbEMrnqsdHbg1xWhrYf?= =?us-ascii?Q?4TVsplsVTpLFF0xs6U6wo/w7a1RkrS9yv7xOvwQ/3dPmtx3DvrXrN8sB9cpi?= =?us-ascii?Q?liyVIQz08ncV9i0/wTE5qIzZqfL3nviWxT2byISzkszfxaWUHoXLlB8YIy/5?= =?us-ascii?Q?neW8r+9bgFc0vDss3LGWf+nTKbE+G16bz9FsGTmQHsNj/qK3fiTg0DPTfVRR?= =?us-ascii?Q?RJyu/MT3eRCO9Jd5gO9QMTWAKWUidxoF8rlumzEg9eYPJcOAIpdNJE1hPG+S?= =?us-ascii?Q?ll9V7zkEq6NCR9WPdiJ+JPpMIeGyvbc9wkHeWSK2WpX0Z+50YysWTq8EFXmR?= =?us-ascii?Q?qlq0RXSHNg0vwJ4=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(376014)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Apr 2025 21:46:16.4035 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 743ec4a8-fe24-4f99-d049-08dd72f8f632 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF0000468A.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB5883 The hardware domain is unable to seed a control domain, but we want the control domain to use xenstore. Rely on the hypervisor to seed dom0less grant table entries for Xenstore, so this seeding is unnecessary. However, that only works for the new xenstore late init. The legacy protocol which uses init-dom0less to populate the page still needs to seed the grant. Signed-off-by: Jason Andryuk --- tools/helpers/init-dom0less.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/tools/helpers/init-dom0less.c b/tools/helpers/init-dom0less.c index 17579fe2e8..91edf17b6c 100644 --- a/tools/helpers/init-dom0less.c +++ b/tools/helpers/init-dom0less.c @@ -286,12 +286,12 @@ static int init_domain(struct xs_handle *xsh, xenstore_pfn); if (rc < 0) return rc; - } - rc = xc_dom_gnttab_seed(xch, info->domid, true, - (xen_pfn_t)-1, xenstore_pfn, 0, 0); - if (rc) - err(1, "xc_dom_gnttab_seed"); + rc = xc_dom_gnttab_seed(xch, info->domid, true, + (xen_pfn_t)-1, xenstore_pfn, 0, 0); + if (rc) + err(1, "xc_dom_gnttab_seed"); + } libxl_uuid_generate(&uuid); xc_domain_sethandle(xch, info->domid, libxl_uuid_bytearray(&uuid)); -- 2.49.0 From xen-devel-bounces@lists.xenproject.org Thu Apr 03 21:46:25 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 21:46:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937343.1338378 (Exim 4.92) (envelope-from ) id 1u0SOH-0001Hr-C4; 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pr=C From: Jason Andryuk To: CC: Jason Andryuk , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , "Volodymyr Babchuk" Subject: [PATCH v3 3/7] xen/arm: dom0less delay xenstore initialization Date: Thu, 3 Apr 2025 17:46:04 -0400 Message-ID: <20250403214608.152954-4-jason.andryuk@amd.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250403214608.152954-1-jason.andryuk@amd.com> References: <20250403214608.152954-1-jason.andryuk@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Received-SPF: None (SATLEXMB04.amd.com: jason.andryuk@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN1PEPF0000468D:EE_|SJ0PR12MB7036:EE_ X-MS-Office365-Filtering-Correlation-Id: abf76064-2bf0-4408-088a-08dd72f8f52e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|82310400026|36860700013; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?20doH1yBm+i64k+YI78my7UtMG0QjhfHpkamU0LVuwdyw+IHy1JItNuoFygm?= =?us-ascii?Q?ZKjDAhOI3yZpxHqh/50zWFsXINXOEWiLJIwvgsmd1pJeRhWuZlr95PRf4nP4?= =?us-ascii?Q?Uz5JKQht/Zw6yRtusrbHFUCy67QdII595LItQ8L8hJ2EqtFpE3wGO4ryuCca?= =?us-ascii?Q?uM/ZM2IsTKitdfHViHKY7zCM1rrL3Je3d2eo42tXBnYctMZZFnHMSqFwlhYO?= =?us-ascii?Q?JFUZOdHN2Hk/scMj+OMhA4CYN+YOatHgkdzdtMjJQCa0R9ch2l5lb3Mj/VYk?= =?us-ascii?Q?/ZOU5e5B5VvzOjaOuMLPTs6qzat4FrFp96eO2IyZ2vjiyl8433IWCN2ejEqT?= =?us-ascii?Q?S18vecQ8a8Yv0EK1HZCeGUsUPzQ4yWIKbsUycfBCWV6HEBC5sYckVmuLvBFf?= =?us-ascii?Q?QPVmsjsDySb2DNIBrhC+N7s4QCaMSCyOa1HifNqYRgKuLP3alfwPA6NwSDmu?= =?us-ascii?Q?rKojrDxbimuymcN1BGRoR4YnW3nEbGNkLjaBBdZCVxR/FWaGawWKFnKsMwMa?= =?us-ascii?Q?actP8R2eGF7ZL7ABIpJY2aqAqfb4GMhIY2erfk6d2/fWBiBlAtl2skQ2K1UL?= =?us-ascii?Q?tE7zGMRpMkgEZvu88z29uO5KxlQ64Tjn08YUiumH2eWnfaufmrghu7R7JZ1W?= =?us-ascii?Q?K0WDu8KXWNk9vJbcFCpf9Xy3n027aam7qQaGdLQvQxuwop8Cz+jRdTsobqBn?= =?us-ascii?Q?NtZJsw76lq9WH/RL9ItuQYU02m4LnT2S1ZnYJi/E8xpCRfNSSOtEWYaqedHU?= =?us-ascii?Q?rDQl9n+WuhejKYF6CZYGZRv8ThpyxXoI41yqBwNp1zmfZTBcBQPazUzo+tll?= =?us-ascii?Q?BDfp1oVQyiTfl64WiUgkjZGFSqBXVnKavOPXlRr99c6KGb1MH3LV8I4OuX29?= =?us-ascii?Q?M7VmfzTAsEvJ9AfBRvitctvgWYUp2IW93mMRwn+toYq4x5OBB2K0DI/SEhb9?= =?us-ascii?Q?NAHlWq6ACbQoYg4nRRmksMkHoHLrX2Gha0O8heDCzA5whWiXu2ggpHoEypDn?= =?us-ascii?Q?nvtdP5e4lh+G3023qtf5EPxriXh5J9+qTu/IKxY1vnbej969t10VQwbLnGfC?= =?us-ascii?Q?tsbu/JWaKW87+HQbPsCt3eiwPDkAE305GNcRSfr9znVgCAI76JSkF8B0S7z0?= =?us-ascii?Q?RXRpFIbbsGHq6devSD5ecwaHICnIGrV6VtaGgKwwVHlmUEI/VCq2cgcLxIft?= =?us-ascii?Q?8ZlXVfA6zlK9DKd9w1ynenFscyL7SLmXT31M1MWQe0M93V86OWa+jGewboYM?= =?us-ascii?Q?/AoU96iGNYJNJhBihHrWnuS2e6ks5goWBVPxvZ7rA03QwWL955IcD88ZK6Ml?= =?us-ascii?Q?I0JqYRPpqm7MwarPw4gMviYpPwyHKE3knIfep5VZ2Wua0AOVC/x/vMga8cY/?= =?us-ascii?Q?YntPDdQ2SNgH9oo/E1nzuSZiy+nA2f9QABGyG8KVlfFloXnnPcaCSkCxqMey?= =?us-ascii?Q?+bnSkJpPJRixWgPKWKBVifYnjjqjvxrVjL2+nFge6zS3xwHN1h/eBcJrXkrA?= =?us-ascii?Q?6N41WKD0bWa9J/8=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(376014)(82310400026)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Apr 2025 21:46:14.6937 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: abf76064-2bf0-4408-088a-08dd72f8f52e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF0000468D.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB7036 To allocate the xenstore event channel and initialize the grant table entry, the xenstore domid is neeed. A dom0 is created before the domUs, so it is normally available through hardware_domain. With capabilities and dom0less, the xenstore domain may not be created first. Keep the population of the page and HVM_PARAM_STORE_PFN in the normal domain construction, but delay event channel creation and grant seeding to after all domUs are created. HVM_PARAM_STORE_PFN now serves as indication to setup xenstore since the device tree is no longer immediately available. 0 means no xenstore. ~0ULL means legacy so only the event channel needs setup, and any other value means to seed the page. dom0 needs to set xs_domid when it is serving as the xenstore domain. The domain running xenstored needs to be the handler for VIRQ_DOM_EXC, so set that as well - it otherwise defaults to hardware domain. Signed-off-by: Jason Andryuk --- v3: Use uint64_t to check for xenstore pfn read from HVM_PARAM Rebase after mem paging changes v2: Re-order ahead of seeding. Fix created type in commit message Change set_xs_domid to set_xs_domain Set xenstore domain as VIRQ_DOM_EXC handler --- xen/arch/arm/dom0less-build.c | 67 +++++++++++++++++------ xen/arch/arm/domain_build.c | 2 + xen/arch/arm/include/asm/dom0less-build.h | 2 + 3 files changed, 53 insertions(+), 18 deletions(-) diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c index 7bc6a6c4d7..bb8cc3be43 100644 --- a/xen/arch/arm/dom0less-build.c +++ b/xen/arch/arm/dom0less-build.c @@ -20,6 +20,15 @@ #include #include +static domid_t __initdata xs_domid = DOMID_INVALID; +static bool __initdata need_xenstore; + +void __init set_xs_domain(struct domain *d) +{ + xs_domid = d->domain_id; + set_global_virq_handler(d, VIRQ_DOM_EXC); +} + bool __init is_dom0less_mode(void) { struct bootmodules *mods = &bootinfo.modules; @@ -679,7 +688,7 @@ static int __init alloc_xenstore_evtchn(struct domain *d) int rc; alloc.dom = d->domain_id; - alloc.remote_dom = hardware_domain->domain_id; + alloc.remote_dom = xs_domid; rc = evtchn_alloc_unbound(&alloc, 0); if ( rc ) { @@ -745,16 +754,10 @@ static int __init alloc_xenstore_params(struct kernel_info *kinfo) struct domain *d = kinfo->d; int rc = 0; - if ( kinfo->dom0less_feature & (DOM0LESS_XENSTORE | DOM0LESS_XS_LEGACY) ) - { - ASSERT(hardware_domain); - rc = alloc_xenstore_evtchn(d); - if ( rc < 0 ) - return rc; + if ( (kinfo->dom0less_feature & (DOM0LESS_XENSTORE | DOM0LESS_XS_LEGACY)) + == (DOM0LESS_XENSTORE | DOM0LESS_XS_LEGACY) ) d->arch.hvm.params[HVM_PARAM_STORE_PFN] = ~0ULL; - } - - if ( kinfo->dom0less_feature & DOM0LESS_XENSTORE ) + else if ( kinfo->dom0less_feature & DOM0LESS_XENSTORE ) { rc = alloc_xenstore_page(d); if ( rc < 0 ) @@ -764,6 +767,30 @@ static int __init alloc_xenstore_params(struct kernel_info *kinfo) return rc; } +static void __init initialize_domU_xenstore(void) +{ + struct domain *d; + + if ( xs_domid == DOMID_INVALID ) + return; + + for_each_domain( d ) + { + uint64_t gfn = d->arch.hvm.params[HVM_PARAM_STORE_PFN]; + int rc; + + if ( gfn == 0 ) + continue; + + if ( is_xenstore_domain(d) ) + continue; + + rc = alloc_xenstore_evtchn(d); + if ( rc < 0 ) + panic("%pd: Failed to allocate xenstore_evtchn\n", d); + } +} + static void __init domain_vcpu_affinity(struct domain *d, const struct dt_device_node *node) { @@ -899,17 +926,13 @@ static int __init construct_domU(struct domain *d, rc == -ENODATA || (rc == 0 && !strcmp(dom0less_enhanced, "enabled")) ) { - if ( hardware_domain ) - kinfo.dom0less_feature = DOM0LESS_ENHANCED; - else - panic("At the moment, Xenstore support requires dom0 to be present\n"); + need_xenstore = true; + kinfo.dom0less_feature = DOM0LESS_ENHANCED; } else if ( rc == 0 && !strcmp(dom0less_enhanced, "legacy") ) { - if ( hardware_domain ) - kinfo.dom0less_feature = DOM0LESS_ENHANCED_LEGACY; - else - panic("At the moment, Xenstore support requires dom0 to be present\n"); + need_xenstore = true; + kinfo.dom0less_feature = DOM0LESS_ENHANCED_LEGACY; } else if ( rc == 0 && !strcmp(dom0less_enhanced, "no-xenstore") ) kinfo.dom0less_feature = DOM0LESS_ENHANCED_NO_XS; @@ -1156,7 +1179,15 @@ void __init create_domUs(void) if ( rc ) panic("Could not set up domain %s (rc = %d)\n", dt_node_name(node), rc); + + if ( d_cfg.flags & XEN_DOMCTL_CDF_xs_domain ) + set_xs_domain(d); } + + if ( need_xenstore && xs_domid == DOMID_INVALID ) + panic("xenstore requested, but xenstore domain not present\n"); + + initialize_domU_xenstore(); } /* diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index 0a329f9f5e..270a6b97e4 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -2408,6 +2408,8 @@ void __init create_dom0(void) rc = construct_dom0(dom0); if ( rc ) panic("Could not set up DOM0 guest OS (rc = %d)\n", rc); + + set_xs_domain(dom0); } /* diff --git a/xen/arch/arm/include/asm/dom0less-build.h b/xen/arch/arm/include/asm/dom0less-build.h index 5864944bda..b0e41a1954 100644 --- a/xen/arch/arm/include/asm/dom0less-build.h +++ b/xen/arch/arm/include/asm/dom0less-build.h @@ -9,6 +9,7 @@ void create_domUs(void); bool is_dom0less_mode(void); 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pr=C From: Jason Andryuk To: CC: Jason Andryuk , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , "Volodymyr Babchuk" , Andrew Cooper , Anthony PERARD , "Jan Beulich" , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v3 4/7] xen/arm: dom0less seed xenstore grant table entry Date: Thu, 3 Apr 2025 17:46:05 -0400 Message-ID: <20250403214608.152954-5-jason.andryuk@amd.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250403214608.152954-1-jason.andryuk@amd.com> References: <20250403214608.152954-1-jason.andryuk@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EE33:EE_|MN2PR12MB4317:EE_ X-MS-Office365-Filtering-Correlation-Id: 6f45ce8e-6443-4fbb-6f18-08dd72f8f67d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|82310400026|1800799024|36860700013; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?+QVFhIc8y6KHLo9MkDExt5onxisWyr5FiSgy9P1rB7fmD6lHNeFMNjKKVnxc?= =?us-ascii?Q?eUY0OhmG/slu3Niz1stgCmufBmUALHDli8vT6W/JH4nUguhwoLPvTn3Z0inX?= =?us-ascii?Q?RJtLLVqjAAUDX1DDTFFnGlo9IlFPvFkTW9mzhyD08Z2QtufjdE8SdTyKxIzs?= =?us-ascii?Q?369Le7lBTtSY39iJX+2XOkU8eQcs3VhA+P+Xv+ycw/p6tPcS2B3eLkCwEo+b?= =?us-ascii?Q?+47u6Xil3PQCG4S7sKQXLcDyTkIyOjk3dk3uExiYvkkikXiRRoSzFwczuQNE?= =?us-ascii?Q?kaeIXiy5Kn5FscTz+wYl6BvNpmLsdbSP9//A+ny5LktxeiP83J1tc2nMSxD4?= =?us-ascii?Q?A9FXvEikleu5Kr60BG13btgUXDahwMG0ZihvvQaHuKz6DxXlhKwTEA9w5V+Z?= =?us-ascii?Q?cmwePP0lcHtp7uBuqLNVwUEldZCP/o5TTAAw/lGNp2CxXvaKEP8y7smBwLHv?= =?us-ascii?Q?topAs9W8WE2qu5V1eienBIrVQJWeduHdsYYIThRBPAqecDvUh4ER76OVwFeY?= =?us-ascii?Q?pKZY9Y85831ZLtPPEnuKozVGB5bFKQzPqVdINaBRWzsRDiCXMlrQU4lGvbKx?= =?us-ascii?Q?pu/40Snfx6K1FlwQx0DAdaom06dQyj6u0hoiZvVROMzDV/Ne98IDHasZXDjl?= =?us-ascii?Q?xGHBos40TOgaGU3XtEEXgVQsorXYvuqBJqknldxbRVMTS1jAqnHtXYy4fsVW?= =?us-ascii?Q?/zL77lJ3Lu4CCimY8f0IVDC6dSDfAPjiWCWgmAThFuGahegLyPYAgU4YrSvb?= =?us-ascii?Q?c93O8i8NlTb5zFE2MliCdAuNOxbLxlVBlqU/0EMHm/xQjXKKu2BpKYvAdA5P?= =?us-ascii?Q?d2lbgn4fDX/i1RG0NZfbnHwNSLSOOvDt7uHeMDSkpzVau8GrdHJzAt4hKQ30?= =?us-ascii?Q?+KFNRaSu/dFQ6mENeryojYbigi0eehjXlCyyz6S9YmudRdTTXaiWeiqnytG3?= =?us-ascii?Q?hdAfj1QI1LDJjAIE11D4tyyt6XY0mcD5UXHYa2Kk+/4/qs5nbLN4ZDHQkpB/?= =?us-ascii?Q?Z1XNgn008hD4x6qR9ES3rcXU7iZ+0qO7hYMb4romjaqFabwVr5sGLiX2y6MG?= =?us-ascii?Q?mT2dLiFnIWyvyr5dcy1N1hSfZkuqd5h+2HSyd6xOX+QH2YQxJAKWUncSjTkI?= =?us-ascii?Q?q0pIoKf7nj6JJcbIcvVHZnqC2bwJYunNkYxTKCvPlNL02KC9zYESxV6Upqoq?= =?us-ascii?Q?lMsijYZxe29FgTATbI0e0z3EdR41e74QoHDHktSpq0/Mr9ca1zlfJU+TMQJC?= =?us-ascii?Q?GWEePRv/Auwz7ZBNi1/QfZr90R6z85Wp2ZqVmOOKLoFv/8V3s6hL+85GPxkY?= =?us-ascii?Q?WkE69ZEa+SQIits4uqJKxy4wmLU53Cj/4L1WIBeEfepIDCJh5fYCUdcu+irM?= =?us-ascii?Q?r/xPBuQhQBOZLglMqa96mt6J0OcX2LXuZKxAFaOBa9YG8d+U8oayqylN3pTr?= =?us-ascii?Q?GJjwNeANLRmRJKu8O22MgM9kGmTOu+1TdWZ/npeDGcwa2OaJ2VoTbokgYo+S?= =?us-ascii?Q?Omk3GaHwbEnJzI4=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(82310400026)(1800799024)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Apr 2025 21:46:16.7631 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6f45ce8e-6443-4fbb-6f18-08dd72f8f67d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE33.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4317 xenstored maps other domains' xenstore pages. Currently this relies on init-dom0less or xl to seed the grants from Dom0. With split hardware/control/xenstore domains, this is problematic since we don't want the hardware domain to be able to map other domains' resources without their permission. Instead have the hypervisor seed the grant table entry for every dom0less domain. The grant is then accessible as normal. C xenstored uses grants, so it can map the xenstore pages from a non-dom0 xenstore domain. OCaml xenstored uses foreign mappings, so it can only run from a privileged domain (dom0). Signed-off-by: Jason Andryuk --- v3: Expand commit message about C vs. OCaml xenstored. Remove __init and flags from gnttab_seed_entry() Change frame to uint32_t ASSERT gfn fits in a uint32_t Rebase on mem paging changes v2: Tweak commit message Mark gnttab_seed_entry() __init and put inside CONFIG_DOM0LESS_BOOT Add ASSERT(!d->creation_finished) and ASSERT(gt->gt_version == 1); const struct domain & struct grant_table --- xen/arch/arm/dom0less-build.c | 6 ++++++ xen/common/grant_table.c | 14 ++++++++++++++ xen/include/xen/grant_table.h | 7 +++++++ 3 files changed, 27 insertions(+) diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c index bb8cc3be43..284190d54f 100644 --- a/xen/arch/arm/dom0less-build.c +++ b/xen/arch/arm/dom0less-build.c @@ -788,6 +788,12 @@ static void __init initialize_domU_xenstore(void) rc = alloc_xenstore_evtchn(d); if ( rc < 0 ) panic("%pd: Failed to allocate xenstore_evtchn\n", d); + + if ( gfn != ~0ULL ) + { + ASSERT(gfn <= UINT_MAX); + gnttab_seed_entry(d, GNTTAB_RESERVED_XENSTORE, xs_domid, gfn); + } } } diff --git a/xen/common/grant_table.c b/xen/common/grant_table.c index 6c77867f8c..e75ff98aff 100644 --- a/xen/common/grant_table.c +++ b/xen/common/grant_table.c @@ -4346,6 +4346,20 @@ static void gnttab_usage_print(struct domain *rd) printk("no active grant table entries\n"); } +#ifdef CONFIG_DOM0LESS_BOOT +void __init gnttab_seed_entry(const struct domain *d, unsigned int idx, + domid_t be_domid, uint32_t frame) +{ + const struct grant_table *gt = d->grant_table; + + ASSERT(!d->creation_finished); + ASSERT(gt->gt_version == 1); + shared_entry_v1(gt, idx).flags = GTF_permit_access; + shared_entry_v1(gt, idx).domid = be_domid; + shared_entry_v1(gt, idx).frame = frame; +} +#endif + static void cf_check gnttab_usage_print_all(unsigned char key) { struct domain *d; diff --git a/xen/include/xen/grant_table.h b/xen/include/xen/grant_table.h index 50edfecfb6..936a52ff10 100644 --- a/xen/include/xen/grant_table.h +++ b/xen/include/xen/grant_table.h @@ -45,6 +45,10 @@ void grant_table_destroy( struct domain *d); void grant_table_init_vcpu(struct vcpu *v); +/* Seed a gnttab entry for Hyperlaunch/dom0less. */ +void gnttab_seed_entry(const struct domain *d, unsigned int idx, + domid_t be_domid, uint32_t frame); + /* * Check if domain has active grants and log first 10 of them. */ @@ -85,6 +89,9 @@ static inline void grant_table_destroy(struct domain *d) {} static inline void grant_table_init_vcpu(struct vcpu *v) {} +static inline void gnttab_seed_entry(struct domain *d, int idx, + domid_t be_domid, uint32_t frame) {} + static inline void grant_table_warn_active_grants(struct domain *d) {} static inline int gnttab_release_mappings(struct domain *d) { return 0; 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Smith" Add and use a new internal create domain flag to specify the hardware domain. This removes the hardcoding of domid 0 as the hardware domain. This allows more flexibility with domain creation. Signed-off-by: Daniel P. Smith Signed-off-by: Jason Andryuk Reviewed-by: Jan Beulich --- v3: Or-in CDF_hardware for late hwdom case Add Jan's R-b v2: () around binary & Only allow late_hwdom for dom0 --- xen/arch/arm/domain_build.c | 2 +- xen/arch/x86/setup.c | 3 ++- xen/common/domain.c | 7 ++++++- xen/include/xen/domain.h | 2 ++ 4 files changed, 11 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index 634333cdde..b8f282ff10 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -2369,7 +2369,7 @@ void __init create_dom0(void) .max_maptrack_frames = -1, .grant_opts = XEN_DOMCTL_GRANT_version(opt_gnttab_max_version), }; - unsigned int flags = CDF_privileged; + unsigned int flags = CDF_privileged | CDF_hardware; int rc; /* The vGIC for DOM0 is exactly emulating the hardware GIC */ diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index d70abb7e0c..67d399c469 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -1018,7 +1018,8 @@ static struct domain *__init create_dom0(struct boot_info *bi) /* Create initial domain. Not d0 for pvshim. */ domid = get_initial_domain_id(); - d = domain_create(domid, &dom0_cfg, pv_shim ? 0 : CDF_privileged); + d = domain_create(domid, &dom0_cfg, + pv_shim ? 0 : CDF_privileged | CDF_hardware); if ( IS_ERR(d) ) panic("Error creating d%u: %ld\n", domid, PTR_ERR(d)); diff --git a/xen/common/domain.c b/xen/common/domain.c index 585fd726a9..da74f815f4 100644 --- a/xen/common/domain.c +++ b/xen/common/domain.c @@ -820,13 +820,18 @@ struct domain *domain_create(domid_t domid, d->is_privileged = flags & CDF_privileged; /* Sort out our idea of is_hardware_domain(). */ - if ( domid == 0 || domid == hardware_domid ) + if ( (flags & CDF_hardware) || domid == hardware_domid ) { if ( hardware_domid < 0 || hardware_domid >= DOMID_FIRST_RESERVED ) panic("The value of hardware_dom must be a valid domain ID\n"); + /* late_hwdom is only allowed for dom0. */ + if ( hardware_domain && hardware_domain->domain_id ) + return ERR_PTR(-EINVAL); + old_hwdom = hardware_domain; hardware_domain = d; + flags |= CDF_hardware; } TRACE_TIME(TRC_DOM0_DOM_ADD, d->domain_id); diff --git a/xen/include/xen/domain.h b/xen/include/xen/domain.h index a34daa7d10..e10baf2615 100644 --- a/xen/include/xen/domain.h +++ b/xen/include/xen/domain.h @@ -53,6 +53,8 @@ domid_t get_initial_domain_id(void); #else #define CDF_staticmem 0 #endif +/* This is the hardware domain. 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h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=WdsPqj84Hib8NMMJalt8pI/N2yD+bj+m4mgWcFIdJM4=; b=FY7SBnF0Dytfvluu/DD/PO+NOXr0lsMbt16g6nYevHtbuYW+DyoRyt3ERnwf8zCbLr+w93j0DfM1B3D9STz84rLZD8l4SlyPLyMr6SXhEa2kb5lyx1ET4onbUn6YjxaoVGrnGEN+zaSp8uQUEXgl/S+K3kajO35cbyZUq5os62M= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C From: Jason Andryuk To: CC: Jason Andryuk , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , "Volodymyr Babchuk" Subject: [PATCH v3 6/7] xen/arm: dom0less use has_dtb local variable Date: Thu, 3 Apr 2025 17:46:07 -0400 Message-ID: <20250403214608.152954-7-jason.andryuk@amd.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250403214608.152954-1-jason.andryuk@amd.com> References: <20250403214608.152954-1-jason.andryuk@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Received-SPF: None (SATLEXMB03.amd.com: jason.andryuk@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EE33:EE_|IA0PPF8FC6E1236:EE_ X-MS-Office365-Filtering-Correlation-Id: 43a04bde-3635-4d8a-0e00-08dd72f8f821 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|36860700013|376014|82310400026; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Apr 2025 21:46:19.5443 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 43a04bde-3635-4d8a-0e00-08dd72f8f821 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE33.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PPF8FC6E1236 Store the result of finding a "multiboot,device-tree" node. This will simplity adding hardware domain checks. Signed-off-by: Jason Andryuk --- v3: New Could be squashed into the next patch, but this helps make the next one cleaner. --- xen/arch/arm/dom0less-build.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c index 284190d54f..a72961dfb4 100644 --- a/xen/arch/arm/dom0less-build.c +++ b/xen/arch/arm/dom0less-build.c @@ -1031,6 +1031,7 @@ void __init create_domUs(void) .grant_opts = XEN_DOMCTL_GRANT_version(opt_gnttab_max_version), }; unsigned int flags = 0U; + bool has_dtb = false; uint32_t val; int rc; @@ -1065,9 +1066,10 @@ void __init create_domUs(void) !strcmp(dom0less_iommu, "enabled") ) iommu = true; - if ( iommu_enabled && - (iommu || dt_find_compatible_node(node, NULL, - "multiboot,device-tree")) ) + if ( dt_find_compatible_node(node, NULL, "multiboot,device-tree") ) + has_dtb = true; + + if ( iommu_enabled && (iommu || has_dtb) ) d_cfg.flags |= XEN_DOMCTL_CDF_iommu; if ( !dt_property_read_u32(node, "nr_spis", &d_cfg.arch.nr_spis) ) -- 2.49.0 From xen-devel-bounces@lists.xenproject.org Thu Apr 03 21:48:53 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 21:48:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937373.1338408 (Exim 4.92) (envelope-from ) id 1u0SQZ-00042h-KZ; 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pr=C From: Stewart Hildebrand To: CC: Stewart Hildebrand , Dario Faggioli , Juergen Gross , George Dunlap Subject: [PATCH] sched/null: avoid another crash after failed domU creation Date: Thu, 3 Apr 2025 17:48:19 -0400 Message-ID: <20250403214829.128294-1-stewart.hildebrand@amd.com> X-Mailer: git-send-email 2.49.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Received-SPF: None (SATLEXMB03.amd.com: stewart.hildebrand@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF00022574:EE_|SJ0PR12MB6992:EE_ X-MS-Office365-Filtering-Correlation-Id: 769195ac-9595-4434-b8f7-08dd72f949ad X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|36860700013|82310400026; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?mcaGAWjjs7fn/M5jmYK1F48PjHBotXB6+y47Nut/NvotRM4mrDwYMqw5PhWj?= =?us-ascii?Q?N9spcYf/TiDKyNLqWpZ376eXvICUfFBSUBi4Zfs8MSZM+boDv5XmX9UkWtH4?= =?us-ascii?Q?waFjns03Ox4iW95123NWWyLmcAMcxcGCS4q8z5cvvhquvUeqWNgFZT9PrBNb?= =?us-ascii?Q?c97gFrd0rVRRds2WCYDKk9QY9l9u97qUExmLvOQ2MjaYEJTkVt9hLiaqYiBD?= =?us-ascii?Q?/fs23qRBfxOW5xq1NC6gqgAKdN0evdIvti7a/PZWH8xrwtQR39E0pvMHrDPo?= =?us-ascii?Q?kglGFDYolXWkdhL9pDy0GJekTchGI5RxqPZXtkIks9oRzo10SfpcPHX/g4E6?= =?us-ascii?Q?033p6MuOVhhXOaU4u3SSv0AF8OgGV93LB3Vdd+C/VtGeZPApoS2pVizc341F?= =?us-ascii?Q?UYmI/KCOa7qIIh3GL9Tr2Lu15LOPsNcdQZ+d3f3E+zcLDYvd4wl2dEfTtULW?= =?us-ascii?Q?6/qz961AGNJQVKAvXakW4LNh8YbfoBv+z1zTjQN1L35mtZPC1aS7QWr+MOEe?= =?us-ascii?Q?t0UPvHdzCVegEZoF/HIgphyOlRScan0X1JuwJZ7k5l34JP2trjG2bpF23BiL?= =?us-ascii?Q?1h7DSuL8YhRXAuzqopo0IM1DM49yVQr4Z4a9iItcWEBtNV6RuB56ukOY5IXt?= =?us-ascii?Q?/Ljhdy5aZdAeJwiTcTs0VcNBWX1TA1MjZgQhU/BsXkgYsc1P5oikmggViLn8?= =?us-ascii?Q?R0SnP+itAkPYFpjmcrhC+o5d3dNJmAVCObD1+6kJjemrk3KP1Xn6N2cdNUC2?= =?us-ascii?Q?eOEPVVkej5Lm5h31Op4F6/DwarPOnmANFAuYGUVSiFkHni3lgiu3sJdLvba7?= =?us-ascii?Q?LPJautjnP7NixZB99Rxwpk11dky3r3Y+d5cElPgwPW6ZCLKO/vFIUtC5OsfD?= =?us-ascii?Q?dgOiZnksvMgO6a12sKaEdXZsO6qUwGptAZr3EDEWGGTvqijYl5vVE9e0diPb?= =?us-ascii?Q?o7QXEaBA5PfMWWeyeHifzETin8+HVfxJ4X6FjIUO8z/UnCtxmU0yrNbX9rAC?= =?us-ascii?Q?RrRvlv4XGsHRt4g8DqixEp4rJmlzpJtLc+SGgS9SON1pqP09fOlz1yUbOusq?= =?us-ascii?Q?wvyLkkx2fp9009LQlKr8tA5e0e1WXnAMmfQoTKuElG1LC89QEzk2TPqyOo5k?= =?us-ascii?Q?7GJ4N7SN2VLcAr7ql+8sx765amDIngStnZ7MwXVA0DlM2+87JSRRsRp0OiRu?= =?us-ascii?Q?fGuqQ6ETZEMh8vRru7HWVF2MyzgZGJSsDsUXcd0rEy0lMb+68/rF9hosEoVJ?= =?us-ascii?Q?eiUCSQAoB8SCXZktR8LTfbHNez6QpVkDipzWGYs0DUuva2xEvE5k52Y5R8ET?= =?us-ascii?Q?xUn2p65MOh0tCLRad+EMJd8beZ/cDUJPQXQFdEOC9QYR9FuJaIZNRBzJzTAO?= =?us-ascii?Q?SXLIxzteDGhjFRvIIOj5/E51M7Xx18XV9t34k1VtE36jYfcA//BwrTIMf4J5?= =?us-ascii?Q?GoK/B3MR9LsNMQveHOak23e708zAbM/DP6jl5kL6trS6DF5AesMr0Fc7ffTe?= =?us-ascii?Q?cyJm+5MJm0lw+1+W7yMAIpfd4V4JJ+N7M3JD?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(1800799024)(36860700013)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Apr 2025 21:48:36.4554 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 769195ac-9595-4434-b8f7-08dd72f949ad X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00022574.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB6992 The following sequence of events may lead a debug build of Xen to crash when using the null scheduler: 1. domain creation (e.g. d1) failed due to bad configuration 2. complete_domain_destroy() was deferred 3. domain creation (e.g. d2) succeeds At this point, d2 is running, while the zombie d1 is not fully cleaned up: (XEN) Online Cpus: 0-3 (XEN) Cpupool 0: (XEN) Cpus: 0-3 (XEN) Scheduling granularity: cpu, 1 CPU per sched-resource (XEN) Scheduler: null Scheduler (null) (XEN) cpus_free = 3 (XEN) Domain info: (XEN) Domain: 0 (XEN) 1: [0.0] pcpu=0 (XEN) 2: [0.1] pcpu=1 (XEN) Domain: 1 (XEN) 3: [1.0] pcpu=2 (XEN) Domain: 2 (XEN) 4: [2.0] pcpu=2 4. complete_domain_destroy() gets called for d1 and triggers the following: (XEN) Xen call trace: (XEN) [<00000a0000322ed4>] null.c#unit_deassign+0x2d8/0xb70 (PC) (XEN) [<00000a000032457c>] null.c#null_unit_remove+0x670/0xba8 (LR) (XEN) [<00000a000032457c>] null.c#null_unit_remove+0x670/0xba8 (XEN) [<00000a0000336404>] sched_destroy_vcpu+0x354/0x8fc (XEN) [<00000a0000227324>] domain.c#complete_domain_destroy+0x11c/0x49c (XEN) [<00000a000029fbd0>] rcupdate.c#rcu_do_batch+0x94/0x3d0 (XEN) [<00000a00002a10c0>] rcupdate.c#__rcu_process_callbacks+0x160/0x5f4 (XEN) [<00000a00002a1e60>] rcupdate.c#rcu_process_callbacks+0xcc/0x1b0 (XEN) [<00000a00002a3460>] softirq.c#__do_softirq+0x1f4/0x3d8 (XEN) [<00000a00002a37c4>] do_softirq+0x14/0x1c (XEN) [<00000a0000465260>] traps.c#check_for_pcpu_work+0x30/0xb8 (XEN) [<00000a000046bb08>] leave_hypervisor_to_guest+0x28/0x198 (XEN) [<00000a0000409c84>] entry.o#guest_sync_slowpath+0xac/0xd8 (XEN) (XEN) **************************************** (XEN) Panic on CPU 0: (XEN) Assertion 'npc->unit == unit' failed at common/sched/null.c:383 (XEN) **************************************** Fix by skipping unit_deassign() when the unit to be removed does not match the pcpu's currently assigned unit. Signed-off-by: Stewart Hildebrand --- See c2eae2614c8f ("sched/null: avoid crash after failed domU creation") Another consequence of deferring complete_domain_destroy() is that eventually domains may fail to be scheduled by the null scheduler, despite domains/vcpus having previously been running on available pcpus have been destroyed. (XEN) common/sched/null.c:639: WARNING: d4v0 not assigned to any CPU! ... but that is a problem for another day. After all, I'm not sure how common of a use case dynamic domain creation & destruction really is for the null scheduler. --- xen/common/sched/null.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/common/sched/null.c b/xen/common/sched/null.c index 7e31440e5b84..c8e327e3cdd0 100644 --- a/xen/common/sched/null.c +++ b/xen/common/sched/null.c @@ -557,7 +557,7 @@ static void cf_check null_unit_remove( cpu = sched_unit_master(unit); npc = get_sched_res(cpu)->sched_priv; - if ( npc->unit ) + if ( npc->unit == unit ) unit_deassign(prv, unit); out: base-commit: befc384d21784affa3daf2abc85b02500e4dc545 -- 2.49.0 From xen-devel-bounces@lists.xenproject.org Thu Apr 03 21:50:59 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 21:50:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937434.1338418 (Exim 4.92) (envelope-from ) id 1u0SSh-0007A7-0V; Thu, 03 Apr 2025 21:50:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937434.1338418; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Apr 2025 21:46:21.2944 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3e6ad267-6b04-4910-15e2-08dd72f8f92c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE33.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB7506 Add a capabilities property to dom0less to allow building a disaggregated system. Only a single hardware domain and single xenstore domain can be specified. Multiple control domains are possible. Introduce bootfdt.h to contain these constants. When using the hardware or xenstore capabilities, adjust the grant and event channel limits similar to dom0. For a hardware domain, disallow specifying "vpl011", "nr_spis", "multiboot,device-tree" and "passthrough" nodes. Also, require an IOMMU when not direct-mapped, Signed-off-by: Jason Andryuk --- v3: Specify 32bit integer in booting.txt & s/all all/all/ Panic on !direct-map && !iommu Panic "multiboot,device-tree" or "passthrough" with hardware domain Include asm/grant_table.h for CONFIG_GRANT_TABLE=n v2: Fix comment style Make DOMAIN_CAPS_* unsigned Remove forced directmap & iommu Require iommu with use of hardware domain Limit to a single xenstore domain There is overlap with hyperlaunch. The numeric values are the same. Hyperlaunch doesn't expose the values in a public header as done here. Is this to be expected for dom0less? It seems most of dom0less isn't in a header, but just in docs. Hyperlaunch uses BUILD_CAPS_, but I chose DOMAIN_CAPS_ since there are domain-level capabilities. Only a single xenstore and hardware domain make sense. Hardware domain receiving all hardware can only have a single domain. For Xenstore, the logic latches the single xs_domid and uses that for all domains. Also, only a single domain can register for VIRQ_DOM_EXC. --- docs/misc/arm/device-tree/booting.txt | 11 ++++++ xen/arch/arm/dom0less-build.c | 57 +++++++++++++++++++++++++-- xen/arch/arm/domain.c | 3 +- xen/include/public/bootfdt.h | 31 +++++++++++++++ 4 files changed, 98 insertions(+), 4 deletions(-) create mode 100644 xen/include/public/bootfdt.h diff --git a/docs/misc/arm/device-tree/booting.txt b/docs/misc/arm/device-tree/booting.txt index ac781c9cc8..59fa96a82e 100644 --- a/docs/misc/arm/device-tree/booting.txt +++ b/docs/misc/arm/device-tree/booting.txt @@ -167,6 +167,17 @@ with the following properties: Refer to docs/misc/cache_coloring.rst for syntax. This option is applicable only to Arm64 guests. +- capabilities + Optional. A 32-bit integer representing a bit field of domain capabilities + for a disaggregated system. A traditional dom0 has all of these + capabilities, and a domU has none of them. + + 0x1 DOMAIN_CAPS_CONTROL - A privileged, control domain + 0x2 DOMAIN_CAPS_HARDWARE - The hardware domain - there can be only 1 + 0x4 DOMAIN_CAPS_XENSTORE - The xenstore domain - there can be only 1 + + The default is no capabilities. + - vpl011 An empty property to enable/disable a virtual pl011 for the guest to diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c index a72961dfb4..7363943835 100644 --- a/xen/arch/arm/dom0less-build.c +++ b/xen/arch/arm/dom0less-build.c @@ -12,11 +12,13 @@ #include #include +#include #include #include #include #include +#include #include #include @@ -926,6 +928,8 @@ static int __init construct_domU(struct domain *d, d->max_vcpus, mem); kinfo.vpl011 = dt_property_read_bool(node, "vpl011"); + if ( kinfo.vpl011 && is_hardware_domain(d) ) + panic("hardware domain cannot specify vpl011\n"); rc = dt_property_read_string(node, "xen,enhanced", &dom0less_enhanced); if ( rc == -EILSEQ || @@ -1041,6 +1045,37 @@ void __init create_domUs(void) if ( (max_init_domid + 1) >= DOMID_FIRST_RESERVED ) panic("No more domain IDs available\n"); + if ( dt_property_read_u32(node, "capabilities", &val) ) + { + if ( val & ~DOMAIN_CAPS_MASK ) + panic("Invalid capabilities (%"PRIx32")\n", val); + + if ( val & DOMAIN_CAPS_CONTROL ) + flags |= CDF_privileged; + + if ( val & DOMAIN_CAPS_HARDWARE ) + { + if ( hardware_domain ) + panic("Only 1 hardware domain can be specified! (%pd)\n", + hardware_domain); + + d_cfg.max_grant_frames = gnttab_dom0_frames(); + d_cfg.max_evtchn_port = -1; + flags |= CDF_hardware; + iommu = true; + } + + if ( val & DOMAIN_CAPS_XENSTORE ) + { + if ( xs_domid != DOMID_INVALID ) + panic("Only 1 xenstore domain can be specified! (%u)\n", + xs_domid); + + d_cfg.flags |= XEN_DOMCTL_CDF_xs_domain; + d_cfg.max_evtchn_port = -1; + } + } + if ( dt_find_property(node, "xen,static-mem", NULL) ) { if ( llc_coloring_enabled ) @@ -1062,12 +1097,26 @@ void __init create_domUs(void) panic("Missing property 'cpus' for domain %s\n", dt_node_name(node)); - if ( !dt_property_read_string(node, "passthrough", &dom0less_iommu) && - !strcmp(dom0less_iommu, "enabled") ) - iommu = true; + if ( !dt_property_read_string(node, "passthrough", &dom0less_iommu) ) + { + if ( flags & CDF_hardware ) + panic("Don't specify passthrough for hardware domain\n"); + + if ( !strcmp(dom0less_iommu, "enabled") ) + iommu = true; + } + + if ( (flags & CDF_hardware) && !(flags & CDF_directmap) && + !iommu_enabled ) + panic("non-direct mapped hardware domain requires iommu\n"); if ( dt_find_compatible_node(node, NULL, "multiboot,device-tree") ) + { + if ( flags & CDF_hardware ) + panic("\"multiboot,device-tree\" incompatible with hardware domain\n"); + has_dtb = true; + } if ( iommu_enabled && (iommu || has_dtb) ) d_cfg.flags |= XEN_DOMCTL_CDF_iommu; @@ -1104,6 +1153,8 @@ void __init create_domUs(void) d_cfg.arch.nr_spis = MAX(d_cfg.arch.nr_spis, vpl011_virq - 32 + 1); } + else if ( flags & CDF_hardware ) + panic("nr_spis cannot be specified for hardware domain\n"); /* Get the optional property domain-cpupool */ cpupool_node = dt_parse_phandle(node, "domain-cpupool", 0); diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index 3ba959f866..dc4b4e84c1 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -608,7 +608,8 @@ int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) { unsigned int max_vcpus; unsigned int flags_required = (XEN_DOMCTL_CDF_hvm | XEN_DOMCTL_CDF_hap); - unsigned int flags_optional = (XEN_DOMCTL_CDF_iommu | XEN_DOMCTL_CDF_vpmu); + unsigned int flags_optional = (XEN_DOMCTL_CDF_iommu | XEN_DOMCTL_CDF_vpmu | + XEN_DOMCTL_CDF_xs_domain ); unsigned int sve_vl_bits = sve_decode_vl(config->arch.sve_vl); if ( (config->flags & ~flags_optional) != flags_required ) diff --git a/xen/include/public/bootfdt.h b/xen/include/public/bootfdt.h new file mode 100644 index 0000000000..86c46b42a9 --- /dev/null +++ b/xen/include/public/bootfdt.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Xen Device Tree boot information + * + * Information for configuring Xen domains created at boot time. + */ + +#ifndef __XEN_PUBLIC_BOOTFDT_H__ +#define __XEN_PUBLIC_BOOTFDT_H__ + +/* + * Domain Capabilities specified in the "capabilities" property. Use of + * this property allows splitting up the monolithic dom0 into separate, + * less privileged components. A regular domU has no capabilities + * (which is the default if nothing is specified). A traditional dom0 + * has all three capabilities. + */ + +/* Control/Privileged domain capable of affecting other domains. */ +#define DOMAIN_CAPS_CONTROL (1U << 0) +/* + * Hardware domain controlling physical hardware. Typically providing + * backends to other domains. + */ +#define DOMAIN_CAPS_HARDWARE (1U << 1) +/* Xenstore domain. */ +#define DOMAIN_CAPS_XENSTORE (1U << 2) +#define DOMAIN_CAPS_MASK (DOMAIN_CAPS_CONTROL | DOMAIN_CAPS_HARDWARE | \ + DOMAIN_CAPS_XENSTORE) + +#endif /* __XEN_PUBLIC_BOOTFDT_H__ */ -- 2.49.0 From xen-devel-bounces@lists.xenproject.org Thu Apr 03 21:56:01 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 21:56:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937462.1338428 (Exim 4.92) (envelope-from ) id 1u0SXU-00081J-M8; Thu, 03 Apr 2025 21:55:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937462.1338428; Thu, 03 Apr 2025 21:55:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0SXU-00081C-J7; Thu, 03 Apr 2025 21:55:56 +0000 Received: by outflank-mailman (input) for mailman id 937462; Thu, 03 Apr 2025 21:55:54 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0SXS-00080n-Sf for xen-devel@lists.xenproject.org; Thu, 03 Apr 2025 21:55:54 +0000 Received: from mail-wr1-x42d.google.com (mail-wr1-x42d.google.com [2a00:1450:4864:20::42d]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 69f8e75a-10d6-11f0-9eaa-5ba50f476ded; Thu, 03 Apr 2025 23:55:53 +0200 (CEST) Received: by mail-wr1-x42d.google.com with SMTP id ffacd0b85a97d-39c2688619bso917429f8f.1 for ; Thu, 03 Apr 2025 14:55:54 -0700 (PDT) Received: from [192.168.1.183] (host-92-26-98-202.as13285.net. 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Thu, 03 Apr 2025 14:55:53 -0700 (PDT) Message-ID: Date: Thu, 3 Apr 2025 22:55:52 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH] x86/amd: Add support for AMD TCE To: Teddy Astie , Jan Beulich Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , xen-devel@lists.xenproject.org References: <6b751a400df49217defc89a19b3ac2ca33ab7690.1743683787.git.teddy.astie@vates.tech> <73b1dd32-c15e-46c4-982c-9b7a33c8785b@suse.com> <463eca2f-9e2a-474c-ae5a-4ed6cfe01ff8@citrix.com> <7056c584-a95e-401b-bb35-e5d0e4171878@vates.tech> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <7056c584-a95e-401b-bb35-e5d0e4171878@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 03/04/2025 7:36 pm, Teddy Astie wrote: > Yes, while proving it on the hypervisor side may be doable, I am quite > unsure about PV guests. > Some calls to HYPERVISOR_mmuext_op incidentally call invlpg and alike > which could be affected with this change, as the guest can "assume" some > behavior aspects of invlpg. I wouldn't worry about PV guests. They have to delegate TLB flushing to Xen anyway, and already don't get to choose whether Xen uses INVLPG, or INVPCID, or something else to perform the requested action. We've e.g. switched from INVLPG to INVPCID as a consequence of Meltdown, and nothing exploded[1]. > Aside enabling this flag for Xen/PV guests, it can be useful to expose > it to the guests. While it's currently not going to change anything as > most of the related instructions are trapped and managed by the > hypervisor, it does affect the behavior of inside-guest INVLPGB if > enabled in the VMCB. Good point.  Linux 6.14 does now use it when available. You should split this patch in two. First patch exposes it for guests, so use an H tag in cpufeatureset.h (available in HAP domains by default), and adjust hvm_efer_valid().  I think that's all you need to do, although remember CHANGELOG.md. Then the second patch turns it on for Xen. ~Andrew [1] Well, XSA-292 was a spectacular explosion, but we fixed that. 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Merritt" To: xen-devel@lists.xenproject.org Cc: "Alexander M. Merritt" , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH] x86: drop XSAVEOPT and CLWB build flags Date: Thu, 3 Apr 2025 23:22:19 +0000 Message-ID: <3de09e4e2a3320e0f314803e349fbe6520d04b12.1743719892.git.alexander@edera.dev> X-Mailer: git-send-email 2.45.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The new toolchain baseline knows both the XSAVEOPT and CLWB instructions. Resolves: https://gitlab.com/xen-project/xen/-/work_items/205 Signed-off-by: Alexander M. Merritt --- xen/arch/x86/arch.mk | 2 -- xen/arch/x86/flushtlb.c | 28 +--------------------------- xen/arch/x86/include/asm/system.h | 7 ------- 3 files changed, 1 insertion(+), 36 deletions(-) diff --git a/xen/arch/x86/arch.mk b/xen/arch/x86/arch.mk index 258e459bec..baa83418bc 100644 --- a/xen/arch/x86/arch.mk +++ b/xen/arch/x86/arch.mk @@ -15,9 +15,7 @@ $(call as-option-add,CFLAGS,CC,"crc32 %eax$(comma)%eax",-DHAVE_AS_SSE4_2) $(call as-option-add,CFLAGS,CC,"invept (%rax)$(comma)%rax",-DHAVE_AS_EPT) $(call as-option-add,CFLAGS,CC,"rdrand %eax",-DHAVE_AS_RDRAND) $(call as-option-add,CFLAGS,CC,"rdfsbase %rax",-DHAVE_AS_FSGSBASE) -$(call as-option-add,CFLAGS,CC,"xsaveopt (%rax)",-DHAVE_AS_XSAVEOPT) $(call as-option-add,CFLAGS,CC,"rdseed %eax",-DHAVE_AS_RDSEED) -$(call as-option-add,CFLAGS,CC,"clwb (%rax)",-DHAVE_AS_CLWB) $(call as-option-add,CFLAGS,CC,".equ \"x\"$(comma)1",-DHAVE_AS_QUOTED_SYM) $(call as-option-add,CFLAGS,CC,"invpcid (%rax)$(comma)%rax",-DHAVE_AS_INVPCID) $(call as-option-add,CFLAGS,CC,"movdiri %rax$(comma)(%rax)",-DHAVE_AS_MOVDIR) diff --git a/xen/arch/x86/flushtlb.c b/xen/arch/x86/flushtlb.c index 65be0474a8..962bb87d69 100644 --- a/xen/arch/x86/flushtlb.c +++ b/xen/arch/x86/flushtlb.c @@ -313,33 +313,7 @@ void cache_writeback(const void *addr, unsigned int size) clflush_size = current_cpu_data.x86_clflush_size ?: 16; addr -= (unsigned long)addr & (clflush_size - 1); for ( ; addr < end; addr += clflush_size ) - { -/* - * The arguments to a macro must not include preprocessor directives. Doing so - * results in undefined behavior, so we have to create some defines here in - * order to avoid it. - */ -#if defined(HAVE_AS_CLWB) -# define CLWB_ENCODING "clwb %[p]" -#elif defined(HAVE_AS_XSAVEOPT) -# define CLWB_ENCODING "data16 xsaveopt %[p]" /* clwb */ -#else -# define CLWB_ENCODING ".byte 0x66, 0x0f, 0xae, 0x30" /* clwb (%%rax) */ -#endif - -#define BASE_INPUT(addr) [p] "m" (*(const char *)(addr)) -#if defined(HAVE_AS_CLWB) || defined(HAVE_AS_XSAVEOPT) -# define INPUT BASE_INPUT -#else -# define INPUT(addr) "a" (addr), BASE_INPUT(addr) -#endif - - asm volatile (CLWB_ENCODING :: INPUT(addr)); - -#undef INPUT -#undef BASE_INPUT -#undef CLWB_ENCODING - } + asm volatile ("clwb %[p]" :: [p] "m" (*(const char *)(addr))); asm volatile ("sfence" ::: "memory"); } diff --git a/xen/arch/x86/include/asm/system.h b/xen/arch/x86/include/asm/system.h index 8ceaaf45d1..c3529f99dd 100644 --- a/xen/arch/x86/include/asm/system.h +++ b/xen/arch/x86/include/asm/system.h @@ -28,14 +28,7 @@ static inline void clflushopt(const void *p) static inline void clwb(const void *p) { -#if defined(HAVE_AS_CLWB) asm volatile ( "clwb %0" :: "m" (*(const char *)p) ); -#elif defined(HAVE_AS_XSAVEOPT) - asm volatile ( "data16 xsaveopt %0" :: "m" (*(const char *)p) ); -#else - asm volatile ( ".byte 0x66, 0x0f, 0xae, 0x32" - :: "d" (p), "m" (*(const char *)p) ); -#endif } #define xchg(ptr,v) \ -- 2.45.2 From xen-devel-bounces@lists.xenproject.org Thu Apr 03 23:28:54 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 23:28:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937495.1338448 (Exim 4.92) (envelope-from ) id 1u0TzO-0006QZ-7h; Thu, 03 Apr 2025 23:28:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937495.1338448; Thu, 03 Apr 2025 23:28:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0TzO-0006QS-3s; Thu, 03 Apr 2025 23:28:50 +0000 Received: by outflank-mailman (input) for mailman id 937495; Thu, 03 Apr 2025 23:28:48 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0TzM-0006QM-EG for xen-devel@lists.xenproject.org; Thu, 03 Apr 2025 23:28:48 +0000 Received: from mail-wm1-x331.google.com (mail-wm1-x331.google.com [2a00:1450:4864:20::331]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 6164860b-10e3-11f0-9ffb-bf95429c2676; Fri, 04 Apr 2025 01:28:43 +0200 (CEST) Received: by mail-wm1-x331.google.com with SMTP id 5b1f17b1804b1-4394345e4d5so9522205e9.0 for ; Thu, 03 Apr 2025 16:28:43 -0700 (PDT) Received: from [192.168.1.183] (host-92-26-98-202.as13285.net. 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Merritt" , xen-devel@lists.xenproject.org Cc: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <3de09e4e2a3320e0f314803e349fbe6520d04b12.1743719892.git.alexander@edera.dev> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <3de09e4e2a3320e0f314803e349fbe6520d04b12.1743719892.git.alexander@edera.dev> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 04/04/2025 12:22 am, Alexander M. Merritt wrote: > The new toolchain baseline knows both the XSAVEOPT and CLWB instructions. I know that's what I wrote on the ticket, but what I'd forgotten was that we only use XSAVEOPT for it's operand. Really what we're doing here is knowing CLWB, and also getting rid of the XSAVEOPT workaround for somewhat-more-old toolchains. > > Resolves: https://gitlab.com/xen-project/xen/-/work_items/205 > Signed-off-by: Alexander M. Merritt > --- > xen/arch/x86/arch.mk | 2 -- > xen/arch/x86/flushtlb.c | 28 +--------------------------- > xen/arch/x86/include/asm/system.h | 7 ------- > 3 files changed, 1 insertion(+), 36 deletions(-) > > diff --git a/xen/arch/x86/arch.mk b/xen/arch/x86/arch.mk > index 258e459bec..baa83418bc 100644 > --- a/xen/arch/x86/arch.mk > +++ b/xen/arch/x86/arch.mk > @@ -15,9 +15,7 @@ $(call as-option-add,CFLAGS,CC,"crc32 %eax$(comma)%eax",-DHAVE_AS_SSE4_2) > $(call as-option-add,CFLAGS,CC,"invept (%rax)$(comma)%rax",-DHAVE_AS_EPT) > $(call as-option-add,CFLAGS,CC,"rdrand %eax",-DHAVE_AS_RDRAND) > $(call as-option-add,CFLAGS,CC,"rdfsbase %rax",-DHAVE_AS_FSGSBASE) > -$(call as-option-add,CFLAGS,CC,"xsaveopt (%rax)",-DHAVE_AS_XSAVEOPT) > $(call as-option-add,CFLAGS,CC,"rdseed %eax",-DHAVE_AS_RDSEED) > -$(call as-option-add,CFLAGS,CC,"clwb (%rax)",-DHAVE_AS_CLWB) > $(call as-option-add,CFLAGS,CC,".equ \"x\"$(comma)1",-DHAVE_AS_QUOTED_SYM) > $(call as-option-add,CFLAGS,CC,"invpcid (%rax)$(comma)%rax",-DHAVE_AS_INVPCID) > $(call as-option-add,CFLAGS,CC,"movdiri %rax$(comma)(%rax)",-DHAVE_AS_MOVDIR) > diff --git a/xen/arch/x86/flushtlb.c b/xen/arch/x86/flushtlb.c > index 65be0474a8..962bb87d69 100644 > --- a/xen/arch/x86/flushtlb.c > +++ b/xen/arch/x86/flushtlb.c > @@ -313,33 +313,7 @@ void cache_writeback(const void *addr, unsigned int size) > clflush_size = current_cpu_data.x86_clflush_size ?: 16; > addr -= (unsigned long)addr & (clflush_size - 1); > for ( ; addr < end; addr += clflush_size ) > - { > -/* > - * The arguments to a macro must not include preprocessor directives. Doing so > - * results in undefined behavior, so we have to create some defines here in > - * order to avoid it. > - */ > -#if defined(HAVE_AS_CLWB) > -# define CLWB_ENCODING "clwb %[p]" > -#elif defined(HAVE_AS_XSAVEOPT) > -# define CLWB_ENCODING "data16 xsaveopt %[p]" /* clwb */ > -#else > -# define CLWB_ENCODING ".byte 0x66, 0x0f, 0xae, 0x30" /* clwb (%%rax) */ > -#endif > - > -#define BASE_INPUT(addr) [p] "m" (*(const char *)(addr)) > -#if defined(HAVE_AS_CLWB) || defined(HAVE_AS_XSAVEOPT) > -# define INPUT BASE_INPUT > -#else > -# define INPUT(addr) "a" (addr), BASE_INPUT(addr) > -#endif > - > - asm volatile (CLWB_ENCODING :: INPUT(addr)); > - > -#undef INPUT > -#undef BASE_INPUT > -#undef CLWB_ENCODING > - } > + asm volatile ("clwb %[p]" :: [p] "m" (*(const char *)(addr))); One minor note about whitespace.  We typically have spaces inside the outermost brackets on asm statements, as per the clwb() example below. Also, given the expression is so simple, I'd just use %0 and drop the [p].  It's just line-verbosity here. Can fix both on commit if you're happy. Reviewed-by: Andrew Cooper > > asm volatile ("sfence" ::: "memory"); > } > diff --git a/xen/arch/x86/include/asm/system.h b/xen/arch/x86/include/asm/system.h > index 8ceaaf45d1..c3529f99dd 100644 > --- a/xen/arch/x86/include/asm/system.h > +++ b/xen/arch/x86/include/asm/system.h > @@ -28,14 +28,7 @@ static inline void clflushopt(const void *p) > > static inline void clwb(const void *p) > { > -#if defined(HAVE_AS_CLWB) > asm volatile ( "clwb %0" :: "m" (*(const char *)p) ); > -#elif defined(HAVE_AS_XSAVEOPT) > - asm volatile ( "data16 xsaveopt %0" :: "m" (*(const char *)p) ); > -#else > - asm volatile ( ".byte 0x66, 0x0f, 0xae, 0x32" > - :: "d" (p), "m" (*(const char *)p) ); > -#endif > } > > #define xchg(ptr,v) \ From xen-devel-bounces@lists.xenproject.org Thu Apr 03 23:34:12 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 23:34:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937507.1338458 (Exim 4.92) (envelope-from ) id 1u0U4V-0000u2-Pe; Thu, 03 Apr 2025 23:34:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937507.1338458; Thu, 03 Apr 2025 23:34:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0U4V-0000tv-Ly; Thu, 03 Apr 2025 23:34:07 +0000 Received: by outflank-mailman (input) for mailman id 937507; Thu, 03 Apr 2025 23:34:06 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0U4U-0000tp-LK for xen-devel@lists.xenproject.org; Thu, 03 Apr 2025 23:34:06 +0000 Received: from mail-wm1-x32e.google.com (mail-wm1-x32e.google.com [2a00:1450:4864:20::32e]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 213080cb-10e4-11f0-9ffb-bf95429c2676; Fri, 04 Apr 2025 01:34:04 +0200 (CEST) Received: by mail-wm1-x32e.google.com with SMTP id 5b1f17b1804b1-43948021a45so13629365e9.1 for ; Thu, 03 Apr 2025 16:34:04 -0700 (PDT) Received: from [192.168.1.183] (host-92-26-98-202.as13285.net. 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Merritt" , xen-devel@lists.xenproject.org Cc: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <3de09e4e2a3320e0f314803e349fbe6520d04b12.1743719892.git.alexander@edera.dev> Content-Language: en-GB Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 04/04/2025 12:28 am, Andrew Cooper wrote: > On 04/04/2025 12:22 am, Alexander M. Merritt wrote: >> The new toolchain baseline knows both the XSAVEOPT and CLWB instructions. > I know that's what I wrote on the ticket, but what I'd forgotten was > that we only use XSAVEOPT for it's operand. > > Really what we're doing here is knowing CLWB, and also getting rid of > the XSAVEOPT workaround for somewhat-more-old toolchains. > >> Resolves: https://gitlab.com/xen-project/xen/-/work_items/205 >> Signed-off-by: Alexander M. Merritt >> --- >> xen/arch/x86/arch.mk | 2 -- >> xen/arch/x86/flushtlb.c | 28 +--------------------------- >> xen/arch/x86/include/asm/system.h | 7 ------- >> 3 files changed, 1 insertion(+), 36 deletions(-) >> >> diff --git a/xen/arch/x86/arch.mk b/xen/arch/x86/arch.mk >> index 258e459bec..baa83418bc 100644 >> --- a/xen/arch/x86/arch.mk >> +++ b/xen/arch/x86/arch.mk >> @@ -15,9 +15,7 @@ $(call as-option-add,CFLAGS,CC,"crc32 %eax$(comma)%eax",-DHAVE_AS_SSE4_2) >> $(call as-option-add,CFLAGS,CC,"invept (%rax)$(comma)%rax",-DHAVE_AS_EPT) >> $(call as-option-add,CFLAGS,CC,"rdrand %eax",-DHAVE_AS_RDRAND) >> $(call as-option-add,CFLAGS,CC,"rdfsbase %rax",-DHAVE_AS_FSGSBASE) >> -$(call as-option-add,CFLAGS,CC,"xsaveopt (%rax)",-DHAVE_AS_XSAVEOPT) >> $(call as-option-add,CFLAGS,CC,"rdseed %eax",-DHAVE_AS_RDSEED) >> -$(call as-option-add,CFLAGS,CC,"clwb (%rax)",-DHAVE_AS_CLWB) >> $(call as-option-add,CFLAGS,CC,".equ \"x\"$(comma)1",-DHAVE_AS_QUOTED_SYM) >> $(call as-option-add,CFLAGS,CC,"invpcid (%rax)$(comma)%rax",-DHAVE_AS_INVPCID) >> $(call as-option-add,CFLAGS,CC,"movdiri %rax$(comma)(%rax)",-DHAVE_AS_MOVDIR) >> diff --git a/xen/arch/x86/flushtlb.c b/xen/arch/x86/flushtlb.c >> index 65be0474a8..962bb87d69 100644 >> --- a/xen/arch/x86/flushtlb.c >> +++ b/xen/arch/x86/flushtlb.c >> @@ -313,33 +313,7 @@ void cache_writeback(const void *addr, unsigned int size) >> clflush_size = current_cpu_data.x86_clflush_size ?: 16; >> addr -= (unsigned long)addr & (clflush_size - 1); >> for ( ; addr < end; addr += clflush_size ) >> - { >> -/* >> - * The arguments to a macro must not include preprocessor directives. Doing so >> - * results in undefined behavior, so we have to create some defines here in >> - * order to avoid it. >> - */ >> -#if defined(HAVE_AS_CLWB) >> -# define CLWB_ENCODING "clwb %[p]" >> -#elif defined(HAVE_AS_XSAVEOPT) >> -# define CLWB_ENCODING "data16 xsaveopt %[p]" /* clwb */ >> -#else >> -# define CLWB_ENCODING ".byte 0x66, 0x0f, 0xae, 0x30" /* clwb (%%rax) */ >> -#endif >> - >> -#define BASE_INPUT(addr) [p] "m" (*(const char *)(addr)) >> -#if defined(HAVE_AS_CLWB) || defined(HAVE_AS_XSAVEOPT) >> -# define INPUT BASE_INPUT >> -#else >> -# define INPUT(addr) "a" (addr), BASE_INPUT(addr) >> -#endif >> - >> - asm volatile (CLWB_ENCODING :: INPUT(addr)); >> - >> -#undef INPUT >> -#undef BASE_INPUT >> -#undef CLWB_ENCODING >> - } >> + asm volatile ("clwb %[p]" :: [p] "m" (*(const char *)(addr))); > One minor note about whitespace.  We typically have spaces inside the > outermost brackets on asm statements, as per the clwb() example below. > > Also, given the expression is so simple, I'd just use %0 and drop the > [p].  It's just line-verbosity here. > > Can fix both on commit if you're happy. > > Reviewed-by: Andrew Cooper Also, I forgot to write in the ticket, clflushopt wants similar treatment, even if there isn't an outward define for it.  I think the following two hunks should do: ~Andrew diff --git a/xen/arch/x86/flushtlb.c b/xen/arch/x86/flushtlb.c index 18748b2bc805..ef30ef546336 100644 --- a/xen/arch/x86/flushtlb.c +++ b/xen/arch/x86/flushtlb.c @@ -287,7 +287,7 @@ void cache_flush(const void *addr, unsigned int size)           * of letting the alternative framework fill the gap by appending nops.           */          alternative_io("ds; clflush %[p]", -                       "data16 clflush %[p]", /* clflushopt */ +                       "clflushopt %[p]",                         X86_FEATURE_CLFLUSHOPT,                         /* no outputs */,                         [p] "m" (*(const char *)(addr))); diff --git a/xen/arch/x86/include/asm/system.h b/xen/arch/x86/include/asm/system.h index 73cb16ca68d6..6f5b6d502911 100644 --- a/xen/arch/x86/include/asm/system.h +++ b/xen/arch/x86/include/asm/system.h @@ -23,7 +23,7 @@ static inline void clflush(const void *p)    static inline void clflushopt(const void *p)  { -    asm volatile ( "data16 clflush %0" :: "m" (*(const char *)p) ); +    asm volatile ( "clflushopt %0" :: "m" (*(const char *)p) );  }    static inline void clwb(const void *p) From xen-devel-bounces@lists.xenproject.org Thu Apr 03 23:45:54 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 03 Apr 2025 23:45:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937524.1338468 (Exim 4.92) (envelope-from ) id 1u0UFo-0003vz-TQ; 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Thu, 03 Apr 2025 16:45:45 -0700 (PDT) MIME-Version: 1.0 Date: Thu, 03 Apr 2025 19:45:42 -0400 From: Alexander Merritt To: Andrew Cooper Cc: xen-devel@lists.xenproject.org, Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Subject: Re: [PATCH] x86: drop XSAVEOPT and CLWB build flags In-Reply-To: References: <3de09e4e2a3320e0f314803e349fbe6520d04b12.1743719892.git.alexander@edera.dev> Message-ID: X-Sender: alexander@edera.dev Organization: Edera Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 2025-04-03 19:28, Andrew Cooper wrote: > On 04/04/2025 12:22 am, Alexander M. Merritt wrote: >> The new toolchain baseline knows both the XSAVEOPT and CLWB >> instructions. > > I know that's what I wrote on the ticket, but what I'd forgotten was > that we only use XSAVEOPT for it's operand. > > Really what we're doing here is knowing CLWB, and also getting rid of > the XSAVEOPT workaround for somewhat-more-old toolchains. Will try to be more detailed in the commit message next time, thanks for pointing out. >> + asm volatile ("clwb %[p]" :: [p] "m" (*(const char >> *)(addr))); > > One minor note about whitespace.  We typically have spaces inside the > outermost brackets on asm statements, as per the clwb() example below. Makes sense. I had searched for existing examples of this and saw a mix with and without spaces. > Also, given the expression is so simple, I'd just use %0 and drop the > [p].  It's just line-verbosity here. Yes, agreed. > Can fix both on commit if you're happy. > > Reviewed-by: Andrew Cooper Yes please do. Thanks for the review! From xen-devel-bounces@lists.xenproject.org Fri Apr 04 00:16:25 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Apr 2025 00:16:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937539.1338478 (Exim 4.92) (envelope-from ) id 1u0UjM-00048X-Dr; Fri, 04 Apr 2025 00:16:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937539.1338478; Fri, 04 Apr 2025 00:16:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0UjM-00048Q-Ao; Fri, 04 Apr 2025 00:16:20 +0000 Received: by outflank-mailman (input) for mailman id 937539; Fri, 04 Apr 2025 00:16:19 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0UjL-00048H-L9 for xen-devel@lists.xenproject.org; Fri, 04 Apr 2025 00:16:19 +0000 Received: from tor.source.kernel.org (tor.source.kernel.org [172.105.4.254]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 03bb1613-10ea-11f0-9ffb-bf95429c2676; Fri, 04 Apr 2025 02:16:12 +0200 (CEST) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 4FA76614B8; Fri, 4 Apr 2025 00:16:04 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 405A7C4CEE3; Fri, 4 Apr 2025 00:16:10 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 03bb1613-10ea-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743725771; bh=/pk15gfjkF0nSlJqxKS7TjrMWj+J3kdNaAoKzPAc20Q=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=kdK2xHyH5mwpJ1PoFryatavEqwzF7Aswq7NLWtWd3Sn0x9dfFFVSIsNipStsMrCL5 rQHlzk5oxAJKZI6cSKGWapcuIo2mB3TJnWqNCp53ZlcGYM+Lq6TbQntCGd2nBd6lvs to8odEr3fh3LSobgRXvzXjKKGIuuN0lkQXFZ0BnOAeIJb2US+DKJNHD/30b2TjdarV lgQWRhdBOPy7r2ih86B8+mUGPZJVNrn1UlQjzxe3rfbrFGSQs9osQkRYwCRPyc7waG RPy2FaW08oeRVZcY/k5z9vM6xxnwPtVTYlnf71It+yB/xTLVLs1ktQrYoUERQWAMpw sHjIo+BYoSiFA== Date: Thu, 3 Apr 2025 17:16:09 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= cc: xen-devel@lists.xenproject.org, Andrew Cooper , Doug Goldstein , Stefano Stabellini Subject: Re: [PATCH v1 01/11] ci: prevent grub unpacking initramfs In-Reply-To: Message-ID: References: User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="8323329-2141594815-1743725771=:3529306" This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323329-2141594815-1743725771=:3529306 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT On Thu, 2 Apr 2025, Marek Marczykowski-Górecki wrote: > It fails on larger initramfs (~250MB one) and sometimes even smaller > depending on memory size/memory map, let Linux do it. > > Signed-off-by: Marek Marczykowski-Górecki I believe this is the default with U-Boot anyway, if I remember right. Reviewed-by: Stefano Stabellini > --- > automation/scripts/qubes-x86-64.sh | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh > index f27296445901..8e78b7984e98 100755 > --- a/automation/scripts/qubes-x86-64.sh > +++ b/automation/scripts/qubes-x86-64.sh > @@ -248,7 +248,7 @@ CONTROLLER=control@thor.testnet > echo " > multiboot2 (http)/gitlab-ci/xen $CONSOLE_OPTS loglvl=all guest_loglvl=all dom0_mem=4G console_timestamps=boot $extra_xen_opts > module2 (http)/gitlab-ci/vmlinuz console=hvc0 root=/dev/ram0 earlyprintk=xen > -module2 (http)/gitlab-ci/initrd-dom0 > +module2 --nounzip (http)/gitlab-ci/initrd-dom0 > " > $TFTP/grub.cfg > > echo "#!ipxe > -- > git-series 0.9.1 > --8323329-2141594815-1743725771=:3529306-- From xen-devel-bounces@lists.xenproject.org Fri Apr 04 00:22:07 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Apr 2025 00:22:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937551.1338488 (Exim 4.92) (envelope-from ) id 1u0Uot-00072d-0d; Fri, 04 Apr 2025 00:22:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937551.1338488; Fri, 04 Apr 2025 00:22:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0Uos-00072W-Tq; Fri, 04 Apr 2025 00:22:02 +0000 Received: by outflank-mailman (input) for mailman id 937551; Fri, 04 Apr 2025 00:22:02 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0Uos-00072Q-Go for xen-devel@lists.xenproject.org; Fri, 04 Apr 2025 00:22:02 +0000 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id d339fd9b-10ea-11f0-9eaa-5ba50f476ded; Fri, 04 Apr 2025 02:22:01 +0200 (CEST) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 333675C5CFC; Fri, 4 Apr 2025 00:19:42 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E9B1EC4CEE3; Fri, 4 Apr 2025 00:21:57 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: d339fd9b-10ea-11f0-9eaa-5ba50f476ded DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743726118; bh=8GnSjRAbFf4cvHjo/KmuGkTgpbxBCQuAgjrsz8zq2g4=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=mqk4w3gWUgBOkVHJ9Axc4lIow2J/33k2LU7Fw70nEHqvLKNOF+wdoOmpfzTfjd0FA yJC8x1cIoB2m9F2InJ+Fx9avZuDp32439JO60aGp2dBuLVtlzCaj1vnRHzTa+RkbjA km51qRZsN/z2ZiGqc2TaaQcrmG5K3TOhHcq0zTadjMSQC69M3p5j8hBkpO+zKw0YrB VnWvIJIkLysbSMf3gsis+JKgeaEzPXlkZTG6VdQd5COudoAHXgvEydPH5NNuwwrZnm XXpHZVwOlsbPkLyyCtsnlkujUOPu6NwSCYcByBE8Bijnth/O/wSuvhvl0SvG5Fz7Yv bD8wciHFG2dpA== Date: Thu, 3 Apr 2025 17:21:56 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= cc: Jan Beulich , Andrew Cooper , Doug Goldstein , Stefano Stabellini , xen-devel@lists.xenproject.org Subject: Re: [PATCH v1 02/11] ci: increase timeout for hw tests In-Reply-To: Message-ID: References: <7578489af5c7df525d4c82231b68bbb7d955d2b4.1743678257.git-series.marmarek@invisiblethingslab.com> <9e4660fc-b78f-4323-8a1b-aca3d410edd3@suse.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="8323329-1575154196-1743726118=:3529306" This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323329-1575154196-1743726118=:3529306 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT On Thu, 3 Apr 2025, Marek Marczykowski-Górecki wrote: > On Thu, Apr 03, 2025 at 01:32:38PM +0200, Jan Beulich wrote: > > On 03.04.2025 13:04, Marek Marczykowski-Górecki wrote: > > > It appears as sometimes it takes more time for Xen even start booting, > > > mostly due to firmware and fetching large boot files by grub. In some > > > jobs the current timeout is pretty close to the actual time needed, and > > > sometimes (rarely for now) test fails due to timeout expiring in the > > > middle of dom0 booting. This will be happening more often if the > > > initramfs will grow (and with more complex tests). > > > > With that, ... > > > > > This has been observed on some dom0pvh-hvm jobs, at least on runners hw3 > > > and hw11. > > > > > > Increase the timeout by yet another 60s (up to 180s now). > > > > ... is this little a bump going to be sufficient? How about moving straight > > to 5min? Hi Marek, would you be up for moving your script to use "expect"? Something like ./automation/scripts/console.exp? That way, we would immediately complete the job no matter the timeout value. It is also nicer :-) > I don't like this, as many (most) actual failures are visible as timeout > (for example panic that prevents reaching Alpine prompt). One > improvement I can see is splitting this into two separate timeouts: one > before seeing the first line from Xen and then the second one for > reaching Alpine login prompt. The first one can be longer as its mostly > about firmware+fetching boot files and shouldn't hit on crashes (unless > a crash happen before printing anything on the console - but those are > rare). This is also something you can very specifically tweak with expect. --8323329-1575154196-1743726118=:3529306-- From xen-devel-bounces@lists.xenproject.org Fri Apr 04 00:22:48 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Apr 2025 00:22:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937562.1338498 (Exim 4.92) (envelope-from ) id 1u0UpW-0007WQ-Au; Fri, 04 Apr 2025 00:22:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937562.1338498; Fri, 04 Apr 2025 00:22:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0UpW-0007WJ-6m; Fri, 04 Apr 2025 00:22:42 +0000 Received: by outflank-mailman (input) for mailman id 937562; Fri, 04 Apr 2025 00:22:41 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0UpV-0007I9-Gc for xen-devel@lists.xenproject.org; Fri, 04 Apr 2025 00:22:41 +0000 Received: from tor.source.kernel.org (tor.source.kernel.org [172.105.4.254]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id eaa8f1d2-10ea-11f0-9ffb-bf95429c2676; Fri, 04 Apr 2025 02:22:40 +0200 (CEST) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id D940E614BC; Fri, 4 Apr 2025 00:22:31 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id DE210C4CEE3; Fri, 4 Apr 2025 00:22:37 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: eaa8f1d2-10ea-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743726158; bh=vDBmCE+e4wqjLrFEny/6Nh5iNP3s44Po2JhFiH294+E=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=ZH9Mi6ygr8Ga6Q11jAV4DCwFw6c0AIdmJ44hzMrITkeotrr3GYpmUpuiBshFxYpOF P4NP09+yQYW3IRnDAZIDYdBjWjItG6KLeBLN5MZfChLQ2T/03ulgflVmt4AC8M/OBq M6b6ToAY9fDIAJnBbv9D25JZepb+7UF9af6TtT2NeWYG5GTG+pObqZE/9AGllAmYoj 6dWva/V3I/EEft22v+OixeUv7kvV8f5XEH1sCtkPzPW3ql8dyaHEqZreJ2M1PJkSSz L5EbMq2g65kYj7im1Wwc+dd0Yqwf8N0ji7MicxE6vjoi00UXgXRB8yfgYtAgalgKBc acDawfgjLI22w== Date: Thu, 3 Apr 2025 17:22:36 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= cc: xen-devel@lists.xenproject.org, Andrew Cooper , Doug Goldstein , Stefano Stabellini Subject: Re: [PATCH v1 03/11] ci: enable XHCI console in Xen debug build on Alpine In-Reply-To: <8994039fbd8694a984d234b30b1ce727b16844f3.1743678257.git-series.marmarek@invisiblethingslab.com> Message-ID: References: <8994039fbd8694a984d234b30b1ce727b16844f3.1743678257.git-series.marmarek@invisiblethingslab.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="8323329-1273410683-1743726158=:3529306" This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323329-1273410683-1743726158=:3529306 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT On Thu, 3 Apr 2025, Marek Marczykowski-Górecki wrote: > This build is used for hardware tests, and some runners use XHCI console > > Signed-off-by: Marek Marczykowski-Górecki Acked-by: Stefano Stabellini > --- > automation/gitlab-ci/build.yaml | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml > index 2513908b059b..169bebe3c775 100644 > --- a/automation/gitlab-ci/build.yaml > +++ b/automation/gitlab-ci/build.yaml > @@ -341,6 +341,7 @@ alpine-3.18-gcc-debug: > CONFIG_ARGO=y > CONFIG_UBSAN=y > CONFIG_UBSAN_FATAL=y > + CONFIG_XHCI=y > > debian-12-x86_64-gcc-debug: > extends: .gcc-x86-64-build-debug > -- > git-series 0.9.1 > --8323329-1273410683-1743726158=:3529306-- From xen-devel-bounces@lists.xenproject.org Fri Apr 04 00:23:28 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Apr 2025 00:23:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937570.1338508 (Exim 4.92) (envelope-from ) id 1u0UqF-000826-Iu; Fri, 04 Apr 2025 00:23:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937570.1338508; Fri, 04 Apr 2025 00:23:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0UqF-00081z-Fe; Fri, 04 Apr 2025 00:23:27 +0000 Received: by outflank-mailman (input) for mailman id 937570; Fri, 04 Apr 2025 00:23:26 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0UqE-00072Q-KD for xen-devel@lists.xenproject.org; Fri, 04 Apr 2025 00:23:26 +0000 Received: from sea.source.kernel.org (sea.source.kernel.org [172.234.252.31]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 052b917c-10eb-11f0-9eaa-5ba50f476ded; Fri, 04 Apr 2025 02:23:25 +0200 (CEST) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id 99CD544E87; Fri, 4 Apr 2025 00:23:22 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 43056C4CEE3; Fri, 4 Apr 2025 00:23:22 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 052b917c-10eb-11f0-9eaa-5ba50f476ded DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743726203; bh=qYNCUC3NHYRX5l+9p/SQ+oxNGEpoxSbOC+lW8qY+vaY=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=l/FzCLSEUP9fDpRA3GillwjJIKrgJ2vfbl438TB763BCU6LgOhg3akQGTUBWwKea6 YhecnlmeydKxYlNI9+iOKaAkTO8wYkA6lbtmbAqBugq/GTy9je4YBoWT/vDrClohg8 Ilai/LJEayEynfeTe1tuPLe8OpuM2kK5Cn1zkXW87AbzWtyDF2FADCcoLk2Tpm3Vvu DSTo833bi6WVK5n61iu2bMfdhuaM1YWeFlKcHL6PQtOl2mlnYo3xBPMvQr2C2mEBr+ M/DOiST5ZO8oPnaE07PK6kxrpF3yCLL8qNKmvMpZJvrPcXisvJs1Gpc99yMwJ1S9ln vll0vJ5yIfk/A== Date: Thu, 3 Apr 2025 17:23:20 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= cc: xen-devel@lists.xenproject.org, Andrew Cooper , Doug Goldstein , Stefano Stabellini Subject: Re: [PATCH v1 04/11] ci: include domU kernel messages in the console output log In-Reply-To: <8902a1274707600b1fe38d41d11ac28627f386b7.1743678257.git-series.marmarek@invisiblethingslab.com> Message-ID: References: <8902a1274707600b1fe38d41d11ac28627f386b7.1743678257.git-series.marmarek@invisiblethingslab.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="8323329-752167660-1743726203=:3529306" This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323329-752167660-1743726203=:3529306 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT On Thu, 3 Apr 2025, Marek Marczykowski-Górecki wrote: > Signed-off-by: Marek Marczykowski-Górecki Acked-by: Stefano Stabellini > --- > automation/scripts/qubes-x86-64.sh | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh > index 771c77d6618b..d316c17e0c9f 100755 > --- a/automation/scripts/qubes-x86-64.sh > +++ b/automation/scripts/qubes-x86-64.sh > @@ -175,6 +175,8 @@ if [ -n "$domU_check" ]; then > rm var/run > echo "#!/bin/sh > > +echo 8 > /proc/sys/kernel/printk > + > ${domU_check} > " > etc/local.d/xen.start > chmod +x etc/local.d/xen.start > -- > git-series 0.9.1 > --8323329-752167660-1743726203=:3529306-- From xen-devel-bounces@lists.xenproject.org Fri Apr 04 00:33:31 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Apr 2025 00:33:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937588.1338517 (Exim 4.92) (envelope-from ) id 1u0Uzu-0002jV-Dp; Fri, 04 Apr 2025 00:33:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937588.1338517; Fri, 04 Apr 2025 00:33:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0Uzu-0002jO-AZ; Fri, 04 Apr 2025 00:33:26 +0000 Received: by outflank-mailman (input) for mailman id 937588; Fri, 04 Apr 2025 00:33:25 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0Uzt-0002jI-3N for xen-devel@lists.xenproject.org; Fri, 04 Apr 2025 00:33:25 +0000 Received: from nyc.source.kernel.org (nyc.source.kernel.org [147.75.193.91]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 67abc5e4-10ec-11f0-9ffb-bf95429c2676; Fri, 04 Apr 2025 02:33:19 +0200 (CEST) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by nyc.source.kernel.org (Postfix) with ESMTP id 265A4A45A44; Fri, 4 Apr 2025 00:27:49 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 86F4DC4CEE3; Fri, 4 Apr 2025 00:33:16 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 67abc5e4-10ec-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743726797; bh=TkxRwZQ+thdOaCKvNHQdXlojvPVGsxy8M1omF3sUV7o=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=uj9GXk0AE6TSmtEb1s0uqm8UDkf3E8RekJEHXtH1A5ytIqJqKcn8ktt9S7BDtobcW KCbK0Vj9BHOd22jysxDHWNHWK1By/VaotsO491OF413KIOA/2wrIzfhE8WAiYwadZA okLjGLWYR+MeTzbwA7KWH+6Gv4viN/Z357aD+6cm52Hoip+xRk41FO5q2zEFaAoZgK x7UnJnYiee1ZjN3L9uzkms3iCZGaGqsHG2iIGwYUK7UJtvmfDkqui2DK1n9w4kmLkT Ln2LuOuB/pv2qet05WMdCbM6QkqbQEgMpaajH8kwnNAvnbK9yhmiRxhdnd6K/p1l64 U7HicKRY1NLTQ== Date: Thu, 3 Apr 2025 17:33:15 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= cc: xen-devel@lists.xenproject.org, Andrew Cooper , Doug Goldstein , Stefano Stabellini Subject: Re: [PATCH v1 05/11] ci: increase verbosity of starting a domain In-Reply-To: <12d51df19d6111c2f61910e9851595aecceb752b.1743678257.git-series.marmarek@invisiblethingslab.com> Message-ID: References: <12d51df19d6111c2f61910e9851595aecceb752b.1743678257.git-series.marmarek@invisiblethingslab.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="8323329-402144187-1743726797=:3529306" This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323329-402144187-1743726797=:3529306 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT On Thu, 3 Apr 2025, Marek Marczykowski-Górecki wrote: > And start collecting qemu log earlier, so it isn't lost in case of a > timeout during domain startup. > > Signed-off-by: Marek Marczykowski-Górecki As we are doing this across the board please also do the same for xilinx-smoke-dom0-x86_64.sh > --- > automation/scripts/qemu-alpine-x86_64.sh | 2 +- > automation/scripts/qemu-smoke-dom0-arm32.sh | 2 +- > automation/scripts/qemu-smoke-dom0-arm64.sh | 2 +- > automation/scripts/qubes-x86-64.sh | 4 ++-- > 4 files changed, 5 insertions(+), 5 deletions(-) > > diff --git a/automation/scripts/qemu-alpine-x86_64.sh b/automation/scripts/qemu-alpine-x86_64.sh > index 1ff689b577e3..17e2141d625e 100755 > --- a/automation/scripts/qemu-alpine-x86_64.sh > +++ b/automation/scripts/qemu-alpine-x86_64.sh > @@ -56,7 +56,7 @@ bash /etc/init.d/xencommons start > > xl list > > -xl create -c /root/test.cfg > +xl -vvv create -c /root/test.cfg > > " > etc/local.d/xen.start > chmod +x etc/local.d/xen.start > diff --git a/automation/scripts/qemu-smoke-dom0-arm32.sh b/automation/scripts/qemu-smoke-dom0-arm32.sh > index e1cd83880928..0c60a66e25e3 100755 > --- a/automation/scripts/qemu-smoke-dom0-arm32.sh > +++ b/automation/scripts/qemu-smoke-dom0-arm32.sh > @@ -21,7 +21,7 @@ echo "#!/bin/bash > > xl list > > -xl create -c /root/test.cfg > +xl -vvv create -c /root/test.cfg > > " > ./root/xen.start > echo "bash /root/xen.start" >> ./etc/init.d/xen-watchdog > diff --git a/automation/scripts/qemu-smoke-dom0-arm64.sh b/automation/scripts/qemu-smoke-dom0-arm64.sh > index 4d22a124df11..8774a8701232 100755 > --- a/automation/scripts/qemu-smoke-dom0-arm64.sh > +++ b/automation/scripts/qemu-smoke-dom0-arm64.sh > @@ -52,7 +52,7 @@ bash /etc/init.d/xencommons start > > xl list > > -xl create -c /root/test.cfg > +xl -vvv create -c /root/test.cfg > > " > etc/local.d/xen.start > chmod +x etc/local.d/xen.start > diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh > index d316c17e0c9f..822b81d186a7 100755 > --- a/automation/scripts/qubes-x86-64.sh > +++ b/automation/scripts/qubes-x86-64.sh > @@ -122,7 +122,6 @@ echo \"${passed}\" > " > > dom0_check=" > -tail -F /var/log/xen/qemu-dm-domU.log & > until grep -q \"^domU Welcome to Alpine Linux\" /var/log/xen/console/guest-domU.log; do > sleep 1 > done > @@ -222,7 +221,8 @@ if [ -n "$domU_check" ]; then > echo " > # get domU console content into test log > tail -F /var/log/xen/console/guest-domU.log 2>/dev/null | sed -e \"s/^/(domU) /\" & > -xl create /etc/xen/domU.cfg > +tail -F /var/log/xen/qemu-dm-domU.log 2>/dev/null | sed -e \"s/^/(qemu-dm) /\" & > +xl -vvv create /etc/xen/domU.cfg > ${dom0_check} > " >> etc/local.d/xen.start > else > -- > git-series 0.9.1 > --8323329-402144187-1743726797=:3529306-- From xen-devel-bounces@lists.xenproject.org Fri Apr 04 00:35:25 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Apr 2025 00:35:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937602.1338529 (Exim 4.92) (envelope-from ) id 1u0V1n-0003Kl-Uu; Fri, 04 Apr 2025 00:35:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937602.1338529; Fri, 04 Apr 2025 00:35:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0V1n-0003Ke-QO; Fri, 04 Apr 2025 00:35:23 +0000 Received: by outflank-mailman (input) for mailman id 937602; Fri, 04 Apr 2025 00:35:23 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0V1n-0003KW-0H for xen-devel@lists.xenproject.org; Fri, 04 Apr 2025 00:35:23 +0000 Received: from nyc.source.kernel.org (nyc.source.kernel.org [147.75.193.91]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id b0a128f1-10ec-11f0-9eaa-5ba50f476ded; Fri, 04 Apr 2025 02:35:21 +0200 (CEST) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by nyc.source.kernel.org (Postfix) with ESMTP id F3900A46A5D; Fri, 4 Apr 2025 00:29:51 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 403BCC4CEE7; Fri, 4 Apr 2025 00:35:19 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: b0a128f1-10ec-11f0-9eaa-5ba50f476ded DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743726920; bh=Zmm0hfoMOjXje/OJG2o2XJH5/y5Rl9dbKPCDg+75bOI=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=Du+Hqn07eV+eZivyxw19vD51pEWmdtk1S6pQD648uCznI9d+8RmRCArJ1P96SRPWZ aWsNeUcwNHHceTkpOdXAZl0WWeFXMscMmDx3dka9/9b0tnuNGmSMZHT1/wf2nB++IN bmqjfl8o7yU9EsJMOQky0Ui9Mg7rEIq7q4YBId5d4kC2Z9KtUzi4V7rVQFfLJBUL4M Z0j0/3FcmGZwvK1Uqhbdk+GEl0fmyFm3pdVZEOCgZIc+J/PqpH39EpSoVqu2ef1v3h noB6JFAK4r0lMgwxFXhqwraIlid+AFQTROaV/otycs1uvrmpIrqKK+hSTitMYyBc1v diqi0ThpIlKQw== Date: Thu, 3 Apr 2025 17:35:17 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= cc: xen-devel@lists.xenproject.org, Andrew Cooper , Doug Goldstein , Stefano Stabellini Subject: Re: [PATCH v1 06/11] ci: consistently use DOCKER_CMD in makefiles In-Reply-To: <72551291927c75a97657890df15138579f1543ac.1743678257.git-series.marmarek@invisiblethingslab.com> Message-ID: References: <72551291927c75a97657890df15138579f1543ac.1743678257.git-series.marmarek@invisiblethingslab.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="8323329-148214441-1743726920=:3529306" This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323329-148214441-1743726920=:3529306 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT On Thu, 3 Apr 2025, Marek Marczykowski-Górecki wrote: > This allows rebuilding containers using podman too. > > Signed-off-by: Marek Marczykowski-Górecki Reviewed-by: Stefano Stabellini > --- > automation/build/Makefile | 4 ++-- > automation/tests-artifacts/Makefile | 4 ++-- > 2 files changed, 4 insertions(+), 4 deletions(-) > > diff --git a/automation/build/Makefile b/automation/build/Makefile > index 4df43b040777..fedf7524dacd 100644 > --- a/automation/build/Makefile > +++ b/automation/build/Makefile > @@ -31,8 +31,8 @@ clean: > define CLEAN_RULE > .PHONY: clean-$(1) > clean-$(1): > - if [ -n "$$$$(docker image ls -q $(REGISTRY)/$(subst /,:,$(1)))" ]; then \ > - docker image rm $(REGISTRY)/$(subst /,:,$(1)); \ > + if [ -n "$$$$($(DOCKER_CMD) image ls -q $(REGISTRY)/$(subst /,:,$(1)))" ]; then \ > + $(DOCKER_CMD) image rm $(REGISTRY)/$(subst /,:,$(1)); \ > fi > > endef > diff --git a/automation/tests-artifacts/Makefile b/automation/tests-artifacts/Makefile > index d055cd696bed..80a60a94f3f7 100644 > --- a/automation/tests-artifacts/Makefile > +++ b/automation/tests-artifacts/Makefile > @@ -10,9 +10,9 @@ help: > @echo "To push container builds, set the env var PUSH" > > %: %.dockerfile ## Builds containers > - docker build --pull -t $(REGISTRY)/$(@D):$(@F) -f $< $( + $(DOCKER_CMD) build --pull -t $(REGISTRY)/$(@D):$(@F) -f $< $( @if [ ! -z $${PUSH+x} ]; then \ > - docker push $(REGISTRY)/$(@D):$(@F); \ > + $(DOCKER_CMD) push $(REGISTRY)/$(@D):$(@F); \ > fi > > .PHONY: all > -- > git-series 0.9.1 > --8323329-148214441-1743726920=:3529306-- From xen-devel-bounces@lists.xenproject.org Fri Apr 04 00:35:37 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Apr 2025 00:35:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937606.1338538 (Exim 4.92) (envelope-from ) id 1u0V21-0003ex-3u; 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="Ka585L6JABnbgr+x" Content-Disposition: inline In-Reply-To: --Ka585L6JABnbgr+x Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Fri, 4 Apr 2025 02:35:28 +0200 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: Stefano Stabellini Cc: Jan Beulich , Andrew Cooper , Doug Goldstein , xen-devel@lists.xenproject.org Subject: Re: [PATCH v1 02/11] ci: increase timeout for hw tests On Thu, Apr 03, 2025 at 05:21:56PM -0700, Stefano Stabellini wrote: > Hi Marek, would you be up for moving your script to use "expect"? > Something like ./automation/scripts/console.exp? >=20 > That way, we would immediately complete the job no matter the timeout > value. It is also nicer :-) Oh, this is excellent idea, I'll see how it fits there. It seems I'll need at least add support for wakeup for the suspend tests, but that shouldn't be a problem. --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --Ka585L6JABnbgr+x Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmfvKVAACgkQ24/THMrX 1yw6ogf7BUAgFFrNp+wXn7sEwD4v+Aoj5ELhQNW5GIjMn0aFP3wnXxC87iy4ux6Q eAhnDxtmbVSphWnciNttf54VBVPks/Jru5AIlgMMBiYJgyB8PXMfrdEPefpjQFim 37N2mlSnGrT5XD+ELPAc7zK4PAJwrW3RJ4TkB+U8zAmKbJp0KWtuBe5Hd7Ycf025 DjVZS08g9KnP10pb/N33UDNk7xbXgAtwR53YTynwdU/77Ad+LaTG5DJLbv3uC6+s xtDX/trdrvjh6Dc3R3nFcPENOtXdzUFj+vxa0u8TBxh082US5wwa89A4mKfFgIxc zY4bhUjd4oQkXewc6x+umgC5ijUfmQ== =y+9A -----END PGP SIGNATURE----- --Ka585L6JABnbgr+x-- From xen-devel-bounces@lists.xenproject.org Fri Apr 04 00:36:52 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Apr 2025 00:36:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937624.1338547 (Exim 4.92) (envelope-from ) id 1u0V3D-0004Mx-D3; Fri, 04 Apr 2025 00:36:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937624.1338547; Fri, 04 Apr 2025 00:36:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0V3D-0004Mq-9x; Fri, 04 Apr 2025 00:36:51 +0000 Received: by outflank-mailman (input) for mailman id 937624; Fri, 04 Apr 2025 00:36:50 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0V3C-0004Mi-EL for xen-devel@lists.xenproject.org; Fri, 04 Apr 2025 00:36:50 +0000 Received: from sea.source.kernel.org (sea.source.kernel.org [172.234.252.31]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id e43c511c-10ec-11f0-9eaa-5ba50f476ded; Fri, 04 Apr 2025 02:36:49 +0200 (CEST) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id 5F9BC44EE7; Fri, 4 Apr 2025 00:36:46 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0946EC4CEE3; Fri, 4 Apr 2025 00:36:45 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: e43c511c-10ec-11f0-9eaa-5ba50f476ded DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743727006; bh=Bx6sfO8cbMwYsif5iGWvTvtGjsvy41KYctTvvmh068Q=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=bjufjrLvAwrhjiEM99jVX568G2xTy9V9num6L7dCJoZZWxs4gBbzrNDFpwgTeG1ad eCXOqs2ACW30HZk5ndQScRDN77TTZpB2hRHW4cU2/I2Ykg8+iE9pS70FrcepPxrObv MYMy3pgNJj6sqP0yJGgd2Qi/mc4/4g4jrLNHPaPQ2oBgZqOCBWchtOBITWyKC7LUtH 5a/AHyi/gtTutPStQsHKfmX1ZpFXLF+mZrXfFwWsDkid8CxwhsgtBD5AppkE3ckJPj IspTd4p8rSrlxxn4zS0+BR97PvRLl80NjQ9KnyST9DXLTiXru3w/emIZkXCwbDX9Jt utvPXDKWyMR4g== Date: Thu, 3 Apr 2025 17:36:44 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= cc: xen-devel@lists.xenproject.org, Andrew Cooper , Doug Goldstein , Stefano Stabellini Subject: Re: [PATCH v1 07/11] ci: wait for the network interface in PCI passthrough tests In-Reply-To: <726b40daa70f376f928c559b061e002c8cc2005f.1743678257.git-series.marmarek@invisiblethingslab.com> Message-ID: References: <726b40daa70f376f928c559b061e002c8cc2005f.1743678257.git-series.marmarek@invisiblethingslab.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="8323329-2133017963-1743727006=:3529306" This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323329-2133017963-1743727006=:3529306 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT On Thu, 3 Apr 2025, Marek Marczykowski-Górecki wrote: > The network driver initializes asynchronously, and it may not be ready > yet by the time the startup script is called. This is especially the > case for USB network adapter (where the PCI device is the USB > controller) in the upcoming runner. > > Don't bother about separate timeout - test timeout will cover this part > too. > > Signed-off-by: Marek Marczykowski-Górecki Reviewed-by: Stefano Stabellini > --- > automation/scripts/qubes-x86-64.sh | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh > index 822b81d186a7..6d2c170d1ee1 100755 > --- a/automation/scripts/qubes-x86-64.sh > +++ b/automation/scripts/qubes-x86-64.sh > @@ -104,6 +104,7 @@ on_reboot = "destroy" > domU_check=" > set -x -e > interface=eth0 > +while ! [ -e \"/sys/class/net/\$interface\" ]; do sleep 1; done > ip link set \"\$interface\" up > timeout 30s udhcpc -i \"\$interface\" > pingip=\$(ip -o -4 r show default|cut -f 3 -d ' ') > -- > git-series 0.9.1 > --8323329-2133017963-1743727006=:3529306-- From xen-devel-bounces@lists.xenproject.org Fri Apr 04 00:45:45 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Apr 2025 00:45:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937638.1338558 (Exim 4.92) (envelope-from ) id 1u0VBl-0007a3-3t; Fri, 04 Apr 2025 00:45:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937638.1338558; Fri, 04 Apr 2025 00:45:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0VBl-0007Zw-0n; Fri, 04 Apr 2025 00:45:41 +0000 Received: by outflank-mailman (input) for mailman id 937638; Fri, 04 Apr 2025 00:45:40 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0VBk-0007Zq-1J for xen-devel@lists.xenproject.org; Fri, 04 Apr 2025 00:45:40 +0000 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 1dcd7a16-10ee-11f0-9ffb-bf95429c2676; Fri, 04 Apr 2025 02:45:34 +0200 (CEST) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id E0D6F5C57B1; Fri, 4 Apr 2025 00:43:15 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id BDFD5C4CEE3; Fri, 4 Apr 2025 00:45:31 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 1dcd7a16-10ee-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743727532; bh=CzvNuLaMakSNbkeq1+5HHu4L1F3dHXmAw4MfHZ+kYyc=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=TONTfmSZ0QYfSejq/q4Tb79DTny1cQ/zTGmn7EZ/x87PhA3UnVA4cF19urBZ8XPw3 jr+/g2UCKi/x5Em3li2hPaH7dSRPNVHQ2MtABQsMi0e7Kl9zM8y7lHI7OiFgT59sUB TjPz1XSYYTMXCBBrzPox8R6rUdbM5hlvIjrSrwuP2elPnhHYBFG6O0OTeJAPL1mAzy PvagfDBO2SJV+dgN/n67uo2KBJx61FO/Qhn8rLnUFkDFDYh/B2HY6aqyQe5DubTW/K IPAGka8EAM2yRGgIfYtFD7tXeUmNhGoXjPrBYqgvQL3dWUxcSm6jD800DBYW/d+bwC BROTGakIkpwAA== Date: Thu, 3 Apr 2025 17:45:30 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= cc: xen-devel@lists.xenproject.org, Andrew Cooper , Doug Goldstein , Stefano Stabellini Subject: Re: [PATCH v1 09/11] ci: adjust resolving network interface into PCI device In-Reply-To: Message-ID: References: User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="8323329-2010084662-1743727532=:3529306" This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323329-2010084662-1743727532=:3529306 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT On Thu, 3 Apr 2025, Marek Marczykowski-Górecki wrote: > Change how PCI device lookup is done to handle also USB devices, in > which case get the USB controller. Instead of taking basename of the > 'device' symlink, resolve the full path (example: > /sys/devices/pci0000:00/0000:00:09.0/usb4/4-7/4-7:1.0) and take the > first part after pci0000:00. Theoretically it could be a bridge, but VM > has flat PCI topology. > > Signed-off-by: Marek Marczykowski-Górecki > --- > automation/scripts/qubes-x86-64.sh | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh > index 6d2c170d1ee1..dc8013750f5f 100755 > --- a/automation/scripts/qubes-x86-64.sh > +++ b/automation/scripts/qubes-x86-64.sh > @@ -110,7 +110,8 @@ timeout 30s udhcpc -i \"\$interface\" > pingip=\$(ip -o -4 r show default|cut -f 3 -d ' ') > ping -c 10 \"\$pingip\" > echo domU started > -pcidevice=\$(basename \$(readlink /sys/class/net/\$interface/device)) > +pcidevice=\$(realpath /sys/class/net/\$interface/device | > + sed 's#.*pci0000:00/\\([^/]*\\).*#\\1#') This is still a bit fragile but better than before Reviewed-by: Stefano Stabellini > lspci -vs \$pcidevice > " > if [ -n "$PCIDEV_INTR" ]; then > -- > git-series 0.9.1 > --8323329-2010084662-1743727532=:3529306-- From xen-devel-bounces@lists.xenproject.org Fri Apr 04 00:47:06 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Apr 2025 00:47:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937649.1338568 (Exim 4.92) (envelope-from ) id 1u0VD7-000863-EL; Fri, 04 Apr 2025 00:47:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937649.1338568; Fri, 04 Apr 2025 00:47:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0VD7-00085w-BN; Fri, 04 Apr 2025 00:47:05 +0000 Received: by outflank-mailman (input) for mailman id 937649; Fri, 04 Apr 2025 00:47:04 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0VD5-00085o-VB for xen-devel@lists.xenproject.org; Fri, 04 Apr 2025 00:47:03 +0000 Received: from tor.source.kernel.org (tor.source.kernel.org [172.105.4.254]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 528182d1-10ee-11f0-9eaa-5ba50f476ded; Fri, 04 Apr 2025 02:47:02 +0200 (CEST) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 7FD0B614B8; Fri, 4 Apr 2025 00:46:54 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 74A17C4CEE9; Fri, 4 Apr 2025 00:47:00 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 528182d1-10ee-11f0-9eaa-5ba50f476ded DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743727621; bh=MsdkSfDvJ/AGNv5LUApFtHfsK8sANXruFfeCJTaq56A=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=V0YxrgA4/4d5iCwHBztGdKKLCwUk8eaGYA9wqD3imKROY9jrCMyIEW1rhwbXLP7jq bTlZTVAwScGAsLHzeI2I+J1h9tul0Qeuc1Fzx882pv0Lw/AXWmueSbb/oiJHzxcVn9 9HyPaYJN6uaH75nlYKMNhSyaU2et7DTHt38GeQS0KVoK/QdO74ojZ8jFqMq5ChepbS ESCvvbms2pT5Ll78S2yfxPZF5BwNsrmGULHz7VDtBOmHyL34rbrkKUYoxd3pXsEbdn WodWLL06jHZUt8x0m/giRGrPWsHZnpiSm52gt8yhB3xj9dfu/fbLf4aE12uVPmJiiN 6RfDx4sywnFgQ== Date: Thu, 3 Apr 2025 17:46:59 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= cc: xen-devel@lists.xenproject.org, Andrew Cooper , Doug Goldstein , Stefano Stabellini Subject: Re: [PATCH v1 10/11] ci: add AMD Zen 4 HW runner In-Reply-To: <5d80b0abf5979f5238781099a22a418b744e3315.1743678257.git-series.marmarek@invisiblethingslab.com> Message-ID: References: <5d80b0abf5979f5238781099a22a418b744e3315.1743678257.git-series.marmarek@invisiblethingslab.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="8323329-512275910-1743727621=:3529306" This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323329-512275910-1743727621=:3529306 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT On Thu, 3 Apr 2025, Marek Marczykowski-Górecki wrote: > This is AMD Ryzen 5 7640U in Framework Laptop AMD. > It has several things different than the other runners. > First of all, the console is using XHCI debug capability. > And then, this system doesn't have normal wired ethernet. But is has one > on USB, and this one is used for booting. For this, enable > CONFIG_USB_RTL8152 in the Linux build. > > Include some basic tests, plus PCI passthrough. > > This machine doesn't support S3. S0ix pretends to be working with > Qubes's dom0 (kernel + userspace), but it hangs on suspend with Alpine > used in test. But even when it doesn't hang, it doesn't really reach > deep sleep, so skip this test for now here. > > Signed-off-by: Marek Marczykowski-Górecki > --- > Requires containers rebuild, especially tests-artifacts/kernel/6.12.21. > > Do not apply yet, until issues found by those tests are fixed. That > would be at least third issue found using this system, so lets have it > in CI. I'd prefer to wait 1 week before committing. In the meantime: Reviewed-by: Stefano Stabellini > --- > automation/gitlab-ci/test.yaml | 56 +++++++++++++- > automation/tests-artifacts/kernel/6.12.21.dockerfile | 2 +- > 2 files changed, 58 insertions(+) > > diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml > index a13dd040bd26..feb2dd10ab30 100644 > --- a/automation/gitlab-ci/test.yaml > +++ b/automation/gitlab-ci/test.yaml > @@ -188,6 +188,16 @@ > tags: > - qubes-hw11 > > +.zen4-x86-64: > + extends: .adl-x86-64 > + variables: > + PCIDEV: "c3:00.4" > + PCIDEV_INTR: "MSI-X" > + CONSOLE_OPTS: "console=xhci dbgp=xhci@pcic1:00.3,share=yes" > + SUT_ADDR: test-12.testnet > + tags: > + - qubes-hw12 > + > # Test jobs > build-each-commit-gcc: > extends: .test-jobs-common > @@ -479,6 +489,52 @@ zen3p-tools-tests-pvh-x86-64-gcc-debug: > - *x86-64-test-needs > - alpine-3.18-gcc-debug > > +zen4-smoke-x86-64-gcc-debug: > + extends: .zen4-x86-64 > + script: > + - ./automation/scripts/qubes-x86-64.sh 2>&1 | tee ${LOGFILE} > + needs: > + - *x86-64-test-needs > + - alpine-3.18-gcc-debug > + > +zen4-smoke-x86-64-dom0pvh gcc-debug: > + extends: .zen4-x86-64 > + script: > + - ./automation/scripts/qubes-x86-64.sh dom0pvh 2>&1 | tee ${LOGFILE} > + needs: > + - *x86-64-test-needs > + - alpine-3.18-gcc-debug > + > +zen4-pci-hvm-x86-64-gcc-debug: > + extends: .zen4-x86-64 > + script: > + - ./automation/scripts/qubes-x86-64.sh pci-hvm 2>&1 | tee ${LOGFILE} > + needs: > + - *x86-64-test-needs > + - alpine-3.18-gcc-debug > + > +zen4-tools-tests-pv-x86-64-gcc-debug: > + extends: .zen4-x86-64 > + script: > + - ./automation/scripts/qubes-x86-64.sh tools-tests-pv 2>&1 | tee ${LOGFILE} > + artifacts: > + reports: > + junit: tests-junit.xml > + needs: > + - *x86-64-test-needs > + - alpine-3.18-gcc-debug > + > +zen4-tools-tests-pvh-x86-64-gcc-debug: > + extends: .zen4-x86-64 > + script: > + - ./automation/scripts/qubes-x86-64.sh tools-tests-pvh 2>&1 | tee ${LOGFILE} > + artifacts: > + reports: > + junit: tests-junit.xml > + needs: > + - *x86-64-test-needs > + - alpine-3.18-gcc-debug > + > qemu-smoke-dom0-arm64-gcc: > extends: .qemu-arm64 > script: > diff --git a/automation/tests-artifacts/kernel/6.12.21.dockerfile b/automation/tests-artifacts/kernel/6.12.21.dockerfile > index d7d34031cab5..4e0a68ec61eb 100644 > --- a/automation/tests-artifacts/kernel/6.12.21.dockerfile > +++ b/automation/tests-artifacts/kernel/6.12.21.dockerfile > @@ -19,6 +19,7 @@ RUN apt-get update && \ > flex \ > bison \ > libelf-dev \ > + libssl-dev \ > && \ > apt-get autoremove -y && \ > apt-get clean && \ > @@ -33,6 +34,7 @@ RUN curl -fsSLO https://cdn.kernel.org/pub/linux/kernel/v6.x/linux-"$LINUX_VERSI > scripts/config --enable BRIDGE && \ > scripts/config --enable IGC && \ > scripts/config --enable TUN && \ > + scripts/config --enable USB_RTL8152 && \ > cp .config .config.orig && \ > cat .config.orig | grep XEN | grep =m |sed 's/=m/=y/g' >> .config && \ > make -j$(nproc) bzImage && \ > -- > git-series 0.9.1 > --8323329-512275910-1743727621=:3529306-- From xen-devel-bounces@lists.xenproject.org Fri Apr 04 01:02:01 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Apr 2025 01:02:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937663.1338578 (Exim 4.92) (envelope-from ) id 1u0VRT-0004qH-KV; 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Fri, 4 Apr 2025 01:01:38 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id A6606C4CEE7; Fri, 4 Apr 2025 01:01:43 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 613692dd-10f0-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743728504; bh=uqchqLTe2Q2WYfzxGfV01BUVnahYzYUq5UwZGo46i6I=; h=Date:From:To:cc:Subject:From; b=tnodfuHVpgbJlkt2BPdz2Xy0aiM+heAiqHxvsgb23FR2zp7q5R1KJcoKogafvvEC0 HKibBXiPCzVF0NNQDuHddgxHG+0+CekIqXSprGGLCdqbkV9Ij9/BsYlA89cnrTYyVF 9DbgWFIKTAw1xBIjDV7Hba7lQugCJcDhfiwizKW9Ad8irEt/0r1awGU0jzvAE/28CP AOW701jOP21PrvAYIF2mdC85jNHV3LrcUwfLVeVRKA9DElQXBisfNQ9041Dw2MAXVc WnyYI/FKshYJV2jM05Jgjkyr6aRRFnfa+z536fai/2vEbpxAALnEtrpW7sN0SkIEXD uld83FLrVHHPw== Date: Thu, 3 Apr 2025 18:01:42 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: xen-devel@lists.xenproject.org cc: sstabellini@kernel.org, Andrew Cooper , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , jason.andryuk@amd.com, Xenia.Ragiadakou@amd.com, Alejandro.GarciaVallejo@amd.com Subject: [RFC] xen/x86: allow overlaps with non-RAM regions Message-ID: User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On one Sapphire AMD x86 board, I see this: (XEN) [0000003943ca6ff2] [00000000f0000000, 00000000f7ffffff] (reserved) (XEN) [00000039460886d9] [00000000fd000000, 00000000ffffffff] (reserved) [...] (XEN) [ 4.612235] 0000:02:00.0: not mapping BAR [fea00, fea03] invalid position Linux boots fine on this platform but Linux as Dom0 on Xen does not. This is because the pci_check_bar->is_memory_hole check fails due to the MMIO region overlapping with the EFI reserved region. While I think ideally this should not happen, as you can imagine users are never happy when Linux baremetal boots fine, and Linux on Xen does not. This patch fixes the boot issue by relaxing the is_memory_hole check. Signed-off-by: Stefano Stabellini diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c index b294497a14..afb54d6f0f 100644 --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.c @@ -797,6 +797,9 @@ bool is_memory_hole(mfn_t start, mfn_t end) if ( !entry->size ) continue; + if ( entry->type > 1 ) + continue; + /* Do not allow overlaps with any memory range. */ if ( s <= PFN_DOWN(entry->addr + entry->size - 1) && PFN_DOWN(entry->addr) <= e ) From xen-devel-bounces@lists.xenproject.org Fri Apr 04 01:03:49 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Apr 2025 01:03:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937677.1338589 (Exim 4.92) (envelope-from ) id 1u0VTI-0005RU-50; Fri, 04 Apr 2025 01:03:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937677.1338589; Fri, 04 Apr 2025 01:03:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0VTI-0005RN-00; Fri, 04 Apr 2025 01:03:48 +0000 Received: by outflank-mailman (input) for mailman id 937677; Fri, 04 Apr 2025 01:03:47 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0VTH-0005RF-Ax for xen-devel@lists.xenproject.org; Fri, 04 Apr 2025 01:03:47 +0000 Received: from sea.source.kernel.org (sea.source.kernel.org [2600:3c0a:e001:78e:0:1991:8:25]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id a7698795-10f0-11f0-9ffb-bf95429c2676; Fri, 04 Apr 2025 03:03:44 +0200 (CEST) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id 3346544EF5; Fri, 4 Apr 2025 01:03:42 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id EB68BC4CEE7; Fri, 4 Apr 2025 01:03:40 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: a7698795-10f0-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743728622; bh=uvT5lNwICIHPRBHCKd7L5EoQdJl1nI1jEp+f1HmtzII=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=Fa9+W9aUza05pY82cFOHghXb07tBEOYLun7kcFutNgg6fluqOvvJry9qO+h7eBOj+ 93oAgKkKEx70CHxwbnH1YfySknjzZnTOlEN0xMuXyDUJTMyQKXtn5hO6OT3sKa28uA qofvB+H4t7qSoTtUT3quO/QNm+evQ7ztFBJTHzlMujachbwolR7vBZR2jAbZaRviDy mHYJ3u8+CXCbABFvi9aBbo2dN54aFlmhO9nqzJDfjwb1sZs5MFyxqlfKU31GHx7UG8 jG2DtO/Zrbm2+Wj0ndfDLKwrkyswzFIzbcBGZ1PM8Ux1UtjGO4Uz6MNBAWT8kMMdhi 9lXc5wFuqmLOw== Date: Thu, 3 Apr 2025 18:03:39 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jason Andryuk cc: xen-devel@lists.xenproject.org, "Daniel P. Smith" , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Subject: Re: [PATCH v3 1/7] xen: introduce hardware domain create flag In-Reply-To: <20250403214608.152954-2-jason.andryuk@amd.com> Message-ID: References: <20250403214608.152954-1-jason.andryuk@amd.com> <20250403214608.152954-2-jason.andryuk@amd.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Thu, 3 Apr 2025, Jason Andryuk wrote: > From: "Daniel P. Smith" > > Add and use a new internal create domain flag to specify the hardware > domain. This removes the hardcoding of domid 0 as the hardware domain. > > This allows more flexibility with domain creation. > > Signed-off-by: Daniel P. Smith > Signed-off-by: Jason Andryuk > Reviewed-by: Jan Beulich ARM: Reviewed-by: Stefano Stabellini > --- > v3: > Or-in CDF_hardware for late hwdom case > Add Jan's R-b > > v2: > () around binary & > Only allow late_hwdom for dom0 > --- > xen/arch/arm/domain_build.c | 2 +- > xen/arch/x86/setup.c | 3 ++- > xen/common/domain.c | 7 ++++++- > xen/include/xen/domain.h | 2 ++ > 4 files changed, 11 insertions(+), 3 deletions(-) > > diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c > index 634333cdde..b8f282ff10 100644 > --- a/xen/arch/arm/domain_build.c > +++ b/xen/arch/arm/domain_build.c > @@ -2369,7 +2369,7 @@ void __init create_dom0(void) > .max_maptrack_frames = -1, > .grant_opts = XEN_DOMCTL_GRANT_version(opt_gnttab_max_version), > }; > - unsigned int flags = CDF_privileged; > + unsigned int flags = CDF_privileged | CDF_hardware; > int rc; > > /* The vGIC for DOM0 is exactly emulating the hardware GIC */ > diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c > index d70abb7e0c..67d399c469 100644 > --- a/xen/arch/x86/setup.c > +++ b/xen/arch/x86/setup.c > @@ -1018,7 +1018,8 @@ static struct domain *__init create_dom0(struct boot_info *bi) > > /* Create initial domain. Not d0 for pvshim. */ > domid = get_initial_domain_id(); > - d = domain_create(domid, &dom0_cfg, pv_shim ? 0 : CDF_privileged); > + d = domain_create(domid, &dom0_cfg, > + pv_shim ? 0 : CDF_privileged | CDF_hardware); > if ( IS_ERR(d) ) > panic("Error creating d%u: %ld\n", domid, PTR_ERR(d)); > > diff --git a/xen/common/domain.c b/xen/common/domain.c > index 585fd726a9..da74f815f4 100644 > --- a/xen/common/domain.c > +++ b/xen/common/domain.c > @@ -820,13 +820,18 @@ struct domain *domain_create(domid_t domid, > d->is_privileged = flags & CDF_privileged; > > /* Sort out our idea of is_hardware_domain(). */ > - if ( domid == 0 || domid == hardware_domid ) > + if ( (flags & CDF_hardware) || domid == hardware_domid ) > { > if ( hardware_domid < 0 || hardware_domid >= DOMID_FIRST_RESERVED ) > panic("The value of hardware_dom must be a valid domain ID\n"); > > + /* late_hwdom is only allowed for dom0. */ > + if ( hardware_domain && hardware_domain->domain_id ) > + return ERR_PTR(-EINVAL); > + > old_hwdom = hardware_domain; > hardware_domain = d; > + flags |= CDF_hardware; > } > > TRACE_TIME(TRC_DOM0_DOM_ADD, d->domain_id); > diff --git a/xen/include/xen/domain.h b/xen/include/xen/domain.h > index a34daa7d10..e10baf2615 100644 > --- a/xen/include/xen/domain.h > +++ b/xen/include/xen/domain.h > @@ -53,6 +53,8 @@ domid_t get_initial_domain_id(void); > #else > #define CDF_staticmem 0 > #endif > +/* This is the hardware domain. Only 1 allowed. */ > +#define CDF_hardware (1U << 3) > > #define is_domain_direct_mapped(d) ((d)->cdf & CDF_directmap) > #define is_domain_using_staticmem(d) ((d)->cdf & CDF_staticmem) > -- > 2.49.0 > From xen-devel-bounces@lists.xenproject.org Fri Apr 04 01:06:21 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Apr 2025 01:06:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937689.1338597 (Exim 4.92) (envelope-from ) id 1u0VVk-00062i-F9; Fri, 04 Apr 2025 01:06:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937689.1338597; Fri, 04 Apr 2025 01:06:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0VVk-00062b-C2; Fri, 04 Apr 2025 01:06:20 +0000 Received: by outflank-mailman (input) for mailman id 937689; Fri, 04 Apr 2025 01:06:19 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0VVj-00062S-1y for xen-devel@lists.xenproject.org; Fri, 04 Apr 2025 01:06:19 +0000 Received: from sea.source.kernel.org (sea.source.kernel.org [172.234.252.31]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 0207d9d0-10f1-11f0-9ffb-bf95429c2676; Fri, 04 Apr 2025 03:06:16 +0200 (CEST) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id AB8DE43865; Fri, 4 Apr 2025 01:06:14 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E153AC4CEE3; Fri, 4 Apr 2025 01:06:13 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 0207d9d0-10f1-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743728775; bh=CQO5AbCBKC7SyzKVQAtya/dBPRgDBcmM2XCkbuhfkZM=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=ArRZ8ZrwmKbgy/DLdp1N0akSsE1hA13j2nRVNPEZcqSm7CCHtekyEjWC0Pct5TJ+W 2JsXkiDBEiSoh2kZBKHigPJIIrCREG5fM9QbLNrdYb9l1O1N7DHZhh1BiZCiIRXGqm Hov3i6f5UtXILqNo9yXqSkRZS66ZiHNCIZhEudveA781Qk1bnGZ9KB3YuwUsxoTI51 AS3zAo4bnRgit8vdmpWLNIYygJBsCsqDYPGpHEFyfOQRWRpFbDf+xnUFfILBjAPxc7 J35Q5hIORwsLG6kthTiPVzwb56H8jPwnE9IQUcMD7Za+OUvZIt9tLN9PNeRGJN5ffO 5CeW3rqnIgq0Q== Date: Thu, 3 Apr 2025 18:06:12 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jason Andryuk cc: xen-devel@lists.xenproject.org, Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Subject: Re: [PATCH v3 3/7] xen/arm: dom0less delay xenstore initialization In-Reply-To: <20250403214608.152954-4-jason.andryuk@amd.com> Message-ID: References: <20250403214608.152954-1-jason.andryuk@amd.com> <20250403214608.152954-4-jason.andryuk@amd.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Thu, 3 Apr 2025, Jason Andryuk wrote: > To allocate the xenstore event channel and initialize the grant table > entry, the xenstore domid is neeed. A dom0 is created before the domUs, > so it is normally available through hardware_domain. With capabilities > and dom0less, the xenstore domain may not be created first. > > Keep the population of the page and HVM_PARAM_STORE_PFN in the normal > domain construction, but delay event channel creation and grant seeding > to after all domUs are created. HVM_PARAM_STORE_PFN now serves as > indication to setup xenstore since the device tree is no longer > immediately available. 0 means no xenstore. ~0ULL means legacy so only > the event channel needs setup, and any other value means to seed the > page. > > dom0 needs to set xs_domid when it is serving as the xenstore domain. > > The domain running xenstored needs to be the handler for VIRQ_DOM_EXC, > so set that as well - it otherwise defaults to hardware domain. > > Signed-off-by: Jason Andryuk Reviewed-by: Stefano Stabellini From xen-devel-bounces@lists.xenproject.org Fri Apr 04 01:09:39 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Apr 2025 01:09:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937702.1338607 (Exim 4.92) (envelope-from ) id 1u0VYt-0006c6-Rb; Fri, 04 Apr 2025 01:09:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937702.1338607; Fri, 04 Apr 2025 01:09:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0VYt-0006bz-Oy; Fri, 04 Apr 2025 01:09:35 +0000 Received: by outflank-mailman (input) for mailman id 937702; Fri, 04 Apr 2025 01:09:34 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0VYs-0006bt-HR for xen-devel@lists.xenproject.org; Fri, 04 Apr 2025 01:09:34 +0000 Received: from tor.source.kernel.org (tor.source.kernel.org [2600:3c04:e001:324:0:1991:8:25]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 775c36b5-10f1-11f0-9eaa-5ba50f476ded; Fri, 04 Apr 2025 03:09:33 +0200 (CEST) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id C0DF86113B; Fri, 4 Apr 2025 01:09:24 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 07FA1C4CEE3; Fri, 4 Apr 2025 01:09:29 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 775c36b5-10f1-11f0-9eaa-5ba50f476ded DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743728971; bh=f3IUdbus24FfNz8uOfqVdlG/NWA4NVaQvT2LwoGluzQ=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=aXwZzZxgMInjuOsAUvwDxwGP6ojyH7GvkUEOh69mFqDHdlux2jIqljiFyC4dCT+PH 6fFhRlxNsSiBzDvFS3Ti97tZ8MR1PEFKqxGUAOkHZMR+F8hvKTbGdHuA31XAKl/NWt 9FC59pUlzfyvvFZ0WiLtmgzOaTxu1LNTi/OpKZD0ene5rO7ZQU1EZoPAEr5F87gg5l sIqe09QRMyCrVFafrcsdqOpA0Ngej71GFkH8XjE4895QrZW9uqt72A6PUKHrkmORTG TGL5GAT5w9t/fw4ZzjvcjsSW9P8IyAGVh+bIkQQsbCmJsA/W1faPb+IBtWgXQ76j32 LAlQLK8wPhkvA== Date: Thu, 3 Apr 2025 18:09:28 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jason Andryuk cc: xen-devel@lists.xenproject.org, Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Subject: Re: [PATCH v3 4/7] xen/arm: dom0less seed xenstore grant table entry In-Reply-To: <20250403214608.152954-5-jason.andryuk@amd.com> Message-ID: References: <20250403214608.152954-1-jason.andryuk@amd.com> <20250403214608.152954-5-jason.andryuk@amd.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Thu, 3 Apr 2025, Jason Andryuk wrote: > xenstored maps other domains' xenstore pages. Currently this relies on > init-dom0less or xl to seed the grants from Dom0. With split > hardware/control/xenstore domains, this is problematic since we don't > want the hardware domain to be able to map other domains' resources > without their permission. Instead have the hypervisor seed the grant > table entry for every dom0less domain. The grant is then accessible as > normal. > > C xenstored uses grants, so it can map the xenstore pages from a > non-dom0 xenstore domain. OCaml xenstored uses foreign mappings, so it > can only run from a privileged domain (dom0). > > Signed-off-by: Jason Andryuk Reviewed-by: Stefano Stabellini > --- > v3: > Expand commit message about C vs. OCaml xenstored. > Remove __init and flags from gnttab_seed_entry() > Change frame to uint32_t > ASSERT gfn fits in a uint32_t > Rebase on mem paging changes > > v2: > Tweak commit message > Mark gnttab_seed_entry() __init and put inside CONFIG_DOM0LESS_BOOT > Add ASSERT(!d->creation_finished) and ASSERT(gt->gt_version == 1); > const struct domain & struct grant_table > --- > xen/arch/arm/dom0less-build.c | 6 ++++++ > xen/common/grant_table.c | 14 ++++++++++++++ > xen/include/xen/grant_table.h | 7 +++++++ > 3 files changed, 27 insertions(+) > > diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c > index bb8cc3be43..284190d54f 100644 > --- a/xen/arch/arm/dom0less-build.c > +++ b/xen/arch/arm/dom0less-build.c > @@ -788,6 +788,12 @@ static void __init initialize_domU_xenstore(void) > rc = alloc_xenstore_evtchn(d); > if ( rc < 0 ) > panic("%pd: Failed to allocate xenstore_evtchn\n", d); > + > + if ( gfn != ~0ULL ) > + { > + ASSERT(gfn <= UINT_MAX); > + gnttab_seed_entry(d, GNTTAB_RESERVED_XENSTORE, xs_domid, gfn); > + } > } > } > > diff --git a/xen/common/grant_table.c b/xen/common/grant_table.c > index 6c77867f8c..e75ff98aff 100644 > --- a/xen/common/grant_table.c > +++ b/xen/common/grant_table.c > @@ -4346,6 +4346,20 @@ static void gnttab_usage_print(struct domain *rd) > printk("no active grant table entries\n"); > } > > +#ifdef CONFIG_DOM0LESS_BOOT > +void __init gnttab_seed_entry(const struct domain *d, unsigned int idx, > + domid_t be_domid, uint32_t frame) > +{ > + const struct grant_table *gt = d->grant_table; > + > + ASSERT(!d->creation_finished); > + ASSERT(gt->gt_version == 1); > + shared_entry_v1(gt, idx).flags = GTF_permit_access; > + shared_entry_v1(gt, idx).domid = be_domid; > + shared_entry_v1(gt, idx).frame = frame; > +} > +#endif > + > static void cf_check gnttab_usage_print_all(unsigned char key) > { > struct domain *d; > diff --git a/xen/include/xen/grant_table.h b/xen/include/xen/grant_table.h > index 50edfecfb6..936a52ff10 100644 > --- a/xen/include/xen/grant_table.h > +++ b/xen/include/xen/grant_table.h > @@ -45,6 +45,10 @@ void grant_table_destroy( > struct domain *d); > void grant_table_init_vcpu(struct vcpu *v); > > +/* Seed a gnttab entry for Hyperlaunch/dom0less. */ > +void gnttab_seed_entry(const struct domain *d, unsigned int idx, > + domid_t be_domid, uint32_t frame); > + > /* > * Check if domain has active grants and log first 10 of them. > */ > @@ -85,6 +89,9 @@ static inline void grant_table_destroy(struct domain *d) {} > > static inline void grant_table_init_vcpu(struct vcpu *v) {} > > +static inline void gnttab_seed_entry(struct domain *d, int idx, > + domid_t be_domid, uint32_t frame) {} > + > static inline void grant_table_warn_active_grants(struct domain *d) {} > > static inline int gnttab_release_mappings(struct domain *d) { return 0; } > -- > 2.49.0 > From xen-devel-bounces@lists.xenproject.org Fri Apr 04 01:12:59 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Apr 2025 01:12:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937714.1338618 (Exim 4.92) (envelope-from ) id 1u0Vc9-0001L5-9t; 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Fri, 4 Apr 2025 01:07:21 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4DFEAC4CEE3; Fri, 4 Apr 2025 01:12:49 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: edac53ff-10f1-11f0-9eaa-5ba50f476ded DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743729170; bh=jwnXwt4wQtNBkUetU0ySAwwrAE6n7F/J5GjR4hoY78o=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=KHzsYAD7Kfnb9CYtrnYOKnt/SDm8m2PXlWb37kX8z5zSDJI1mvHLEmN/gv+edE5+4 Pyp2jSE34vgofslmELN01uEnfoT1kWrfWsVmSDeoyAEU7b129pJh/VVVWUv6VbNzMB KPiCeK4Ghe4RkuIkd526Zu7j46IrfKYZ5x52GDj6M/IsqxlNzZReEC4jU8WqmiDxAM i8Ba+WtU/zEe3l3kY1B5qFscLCMgXooXqUbM+SYZZiv4xKkcF+MSUrThPE/o1YTkHC MdfFGsBjUKZuDxyuDo6cFzPwZjX8TnkFYv/w8ahOiC6UN89pRJM0EO4EZIdfNqFvEe mfizUmQYHwPvw== Date: Thu, 3 Apr 2025 18:12:48 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jason Andryuk cc: xen-devel@lists.xenproject.org, Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Subject: Re: [PATCH v3 6/7] xen/arm: dom0less use has_dtb local variable In-Reply-To: <20250403214608.152954-7-jason.andryuk@amd.com> Message-ID: References: <20250403214608.152954-1-jason.andryuk@amd.com> <20250403214608.152954-7-jason.andryuk@amd.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Thu, 3 Apr 2025, Jason Andryuk wrote: > Store the result of finding a "multiboot,device-tree" node. This will > simplity adding hardware domain checks. > > Signed-off-by: Jason Andryuk Reviewed-by: Stefano Stabellini > --- > v3: > New > > Could be squashed into the next patch, but this helps make the next one > cleaner. > --- > xen/arch/arm/dom0less-build.c | 8 +++++--- > 1 file changed, 5 insertions(+), 3 deletions(-) > > diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c > index 284190d54f..a72961dfb4 100644 > --- a/xen/arch/arm/dom0less-build.c > +++ b/xen/arch/arm/dom0less-build.c > @@ -1031,6 +1031,7 @@ void __init create_domUs(void) > .grant_opts = XEN_DOMCTL_GRANT_version(opt_gnttab_max_version), > }; > unsigned int flags = 0U; > + bool has_dtb = false; > uint32_t val; > int rc; > > @@ -1065,9 +1066,10 @@ void __init create_domUs(void) > !strcmp(dom0less_iommu, "enabled") ) > iommu = true; > > - if ( iommu_enabled && > - (iommu || dt_find_compatible_node(node, NULL, > - "multiboot,device-tree")) ) > + if ( dt_find_compatible_node(node, NULL, "multiboot,device-tree") ) > + has_dtb = true; > + > + if ( iommu_enabled && (iommu || has_dtb) ) > d_cfg.flags |= XEN_DOMCTL_CDF_iommu; > > if ( !dt_property_read_u32(node, "nr_spis", &d_cfg.arch.nr_spis) ) > -- > 2.49.0 > From xen-devel-bounces@lists.xenproject.org Fri Apr 04 01:15:30 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Apr 2025 01:15:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937725.1338629 (Exim 4.92) (envelope-from ) id 1u0VeW-0001tr-MQ; Fri, 04 Apr 2025 01:15:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937725.1338629; Fri, 04 Apr 2025 01:15:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0VeW-0001tk-Hk; Fri, 04 Apr 2025 01:15:24 +0000 Received: by outflank-mailman (input) for mailman id 937725; Fri, 04 Apr 2025 01:15:22 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0VeU-0001te-Pw for xen-devel@lists.xenproject.org; Fri, 04 Apr 2025 01:15:22 +0000 Received: from nyc.source.kernel.org (nyc.source.kernel.org [147.75.193.91]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 47567873-10f2-11f0-9eaa-5ba50f476ded; Fri, 04 Apr 2025 03:15:21 +0200 (CEST) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by nyc.source.kernel.org (Postfix) with ESMTP id 46233A46B00; Fri, 4 Apr 2025 01:09:52 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 39FB9C4CEE3; Fri, 4 Apr 2025 01:15:19 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 47567873-10f2-11f0-9eaa-5ba50f476ded DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743729320; bh=FbBa4aH3GdEj0Z9j43PW5UAv5HSqCDZ39OYJX5bd9co=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=inzbANL0MFG6zeL8roIMzitIEXCBIpfNgcxnIVZxKz9sX1F4PNL8T/ETq7PA7kcZR 7yqk3OnU/WtWgNcTQR7qj8lczYTgmVnQQzA56f6qsdeaQS77GNwu+w5f3/N+PccTao J7ge6f+HQthPCuDdmAFSEX3hfz+r3gLubCrg2TeWZcZ22CMYLboucyErU0jNZKjK4p 2aMjKHLARbpVaMt/sev6zmSs4Y3d5H8hPKKSu4XDWRhKGauV3rvtEb0h5m+XhjVoH2 yC5si7NauWvp0fY9Joc02/SD9pGFxYJNJw/t6Qg1RYkyetx3jDlaqTyA9/Fm+KpCqZ 2g8/n2Su+BNEg== Date: Thu, 3 Apr 2025 18:15:18 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jason Andryuk cc: xen-devel@lists.xenproject.org, Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Subject: Re: [PATCH v3 7/7] xen/arm: Add capabilities to dom0less In-Reply-To: <20250403214608.152954-8-jason.andryuk@amd.com> Message-ID: References: <20250403214608.152954-1-jason.andryuk@amd.com> <20250403214608.152954-8-jason.andryuk@amd.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Thu, 3 Apr 2025, Jason Andryuk wrote: > Add a capabilities property to dom0less to allow building a > disaggregated system. Only a single hardware domain and single xenstore > domain can be specified. Multiple control domains are possible. > > Introduce bootfdt.h to contain these constants. > > When using the hardware or xenstore capabilities, adjust the grant and > event channel limits similar to dom0. > > For a hardware domain, disallow specifying "vpl011", "nr_spis", > "multiboot,device-tree" and "passthrough" nodes. Also, require an IOMMU > when not direct-mapped, > > Signed-off-by: Jason Andryuk Reviewed-by: Stefano Stabellini From xen-devel-bounces@lists.xenproject.org Fri Apr 04 01:23:20 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Apr 2025 01:23:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937738.1338639 (Exim 4.92) (envelope-from ) id 1u0Vm1-0005AZ-Cu; Fri, 04 Apr 2025 01:23:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937738.1338639; Fri, 04 Apr 2025 01:23:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0Vm1-0005AS-8O; Fri, 04 Apr 2025 01:23:09 +0000 Received: by outflank-mailman (input) for mailman id 937738; Fri, 04 Apr 2025 01:23:07 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0Vlz-0005AM-NE for xen-devel@lists.xenproject.org; Fri, 04 Apr 2025 01:23:07 +0000 Received: from nyc.source.kernel.org (nyc.source.kernel.org [147.75.193.91]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 58c903a1-10f3-11f0-9ffb-bf95429c2676; Fri, 04 Apr 2025 03:23:00 +0200 (CEST) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by nyc.source.kernel.org (Postfix) with ESMTP id B955EA46AB0; Fri, 4 Apr 2025 01:17:30 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id AA467C4CEE3; Fri, 4 Apr 2025 01:22:58 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 58c903a1-10f3-11f0-9ffb-bf95429c2676 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1743729779; bh=IYeIRCjN8ZjnQ+Gdx6fT4/vM2ILYoUAr+TTz97347uU=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=twto0d/CrnVAO/pFj2I2ZrHoZMBzWNEhXnVVmUH9j5aDf+lUMjaOGTt1fctvlDNuq +APFhotr+w57+b6Z2MOnXxLV92/gtb5VlOjYGz9BkcVM/DgWf//b9FrwYCzxNXFAgL idTKyI67F1zMjDikeD/ns/0KXY/Pwv0o7WYato+YiVQ877p2dHKd91zD8le9EV6M+f Qnj9aZnMGpBrGeaR46WnZXNiNcESP4NgHu815ospG+UeHUnHQKRTc8OpFbkjKWz+Tn XbQ/HK5CIXbs9qDnh0NFNYVoqh46KbDlxVIjNsUzEYaYxzgs5pvoarOdLcZTqsZCiF abKxrfTyXeRQw== Date: Thu, 3 Apr 2025 18:22:57 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jason Andryuk cc: xen-devel@lists.xenproject.org, Anthony PERARD Subject: Re: [PATCH v3 5/7] tools/init-dom0less: Only seed legacy xenstore grants In-Reply-To: <20250403214608.152954-6-jason.andryuk@amd.com> Message-ID: References: <20250403214608.152954-1-jason.andryuk@amd.com> <20250403214608.152954-6-jason.andryuk@amd.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII On Thu, 3 Apr 2025, Jason Andryuk wrote: > The hardware domain is unable to seed a control domain, but we want the > control domain to use xenstore. Rely on the hypervisor to seed dom0less > grant table entries for Xenstore, so this seeding is unnecessary. > > However, that only works for the new xenstore late init. The legacy > protocol which uses init-dom0less to populate the page still needs to > seed the grant. > > Signed-off-by: Jason Andryuk I was thinking whether it is an issue that we change behavior of init-dom0less for the new protocol. I convinced myself it is not an issue because init-dom0less is supposed to be a matched set with the Xen hypervisor version. I also thought whether we could check if the call to xc_dom_gnttab_seed is needed and only do it if it is, so that init-dom0less.c could be less depedent on the specific Xen behavior. Overall I thought it is not worth it, so: Reviewed-by: Stefano Stabellini > --- > tools/helpers/init-dom0less.c | 10 +++++----- > 1 file changed, 5 insertions(+), 5 deletions(-) > > diff --git a/tools/helpers/init-dom0less.c b/tools/helpers/init-dom0less.c > index 17579fe2e8..91edf17b6c 100644 > --- a/tools/helpers/init-dom0less.c > +++ b/tools/helpers/init-dom0less.c > @@ -286,12 +286,12 @@ static int init_domain(struct xs_handle *xsh, > xenstore_pfn); > if (rc < 0) > return rc; > - } > > - rc = xc_dom_gnttab_seed(xch, info->domid, true, > - (xen_pfn_t)-1, xenstore_pfn, 0, 0); > - if (rc) > - err(1, "xc_dom_gnttab_seed"); > + rc = xc_dom_gnttab_seed(xch, info->domid, true, > + (xen_pfn_t)-1, xenstore_pfn, 0, 0); > + if (rc) > + err(1, "xc_dom_gnttab_seed"); > + } > > libxl_uuid_generate(&uuid); > xc_domain_sethandle(xch, info->domid, libxl_uuid_bytearray(&uuid)); > -- > 2.49.0 > > From xen-devel-bounces@lists.xenproject.org Fri Apr 04 06:57:13 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Apr 2025 06:57:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937759.1338648 (Exim 4.92) (envelope-from ) id 1u0az5-000060-OF; Fri, 04 Apr 2025 06:56:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937759.1338648; Fri, 04 Apr 2025 06:56:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0az5-00005p-Ik; Fri, 04 Apr 2025 06:56:59 +0000 Received: by outflank-mailman (input) for mailman id 937759; Fri, 04 Apr 2025 06:56:57 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0az3-00005h-Nt for xen-devel@lists.xenproject.org; Fri, 04 Apr 2025 06:56:57 +0000 Received: from mail-wr1-x436.google.com (mail-wr1-x436.google.com [2a00:1450:4864:20::436]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id fb818744-1121-11f0-9ffb-bf95429c2676; Fri, 04 Apr 2025 08:56:50 +0200 (CEST) Received: by mail-wr1-x436.google.com with SMTP id ffacd0b85a97d-39c2688619bso1076777f8f.1 for ; Thu, 03 Apr 2025 23:56:50 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 03 Apr 2025 23:56:49 -0700 (PDT) Message-ID: <3c2127ec-63fb-457b-8229-fc8a2b9fbf00@suse.com> Date: Fri, 4 Apr 2025 08:56:47 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1] xen/riscv: Increase XEN_VIRT_SIZE To: Oleksii Kurochko Cc: Alistair Francis , Bob Eshleman , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <54ebdcb7-071f-411f-803a-930dc330a497@suse.com> <32264ccb-e566-41e0-973f-5bc7d874f970@gmail.com> <9d7e1553-3af8-4fc3-a400-8714d9b68411@suse.com> <30d8e316-aff5-498a-b2bd-448e0b2518ae@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <30d8e316-aff5-498a-b2bd-448e0b2518ae@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 03.04.2025 18:20, Oleksii Kurochko wrote: > > On 4/1/25 6:04 PM, Jan Beulich wrote: >> On 01.04.2025 17:58, Oleksii Kurochko wrote: >>> On 3/31/25 6:14 PM, Jan Beulich wrote: >>>> On 31.03.2025 17:20, Oleksii Kurochko wrote: >>>>> + _AC(XEN_VIRT_START, UL) >> vpn1_shift; >>>>> + const unsigned long xen_virt_end_vpn = >>>>> + xen_virt_starn_vpn + ((XEN_VIRT_SIZE >> vpn1_shift) - 1); >>>>> + >>>>> if ((va >= DIRECTMAP_VIRT_START) && >>>>> (va <= DIRECTMAP_VIRT_END)) >>>>> return directmapoff_to_maddr(va - directmap_virt_start); >>>>> >>>>> - BUILD_BUG_ON(XEN_VIRT_SIZE != MB(2)); >>>>> - ASSERT((va >> (PAGETABLE_ORDER + PAGE_SHIFT)) == >>>>> - (_AC(XEN_VIRT_START, UL) >> (PAGETABLE_ORDER + PAGE_SHIFT))); >>>>> + BUILD_BUG_ON(XEN_VIRT_SIZE != MB(8)); >>>> Is it necessary to be != ? Won't > suffice? >>> It could be just > MB(2). Or perphaps >=. >>> = would make the build fail, wouldn't it? > > I just realized that BUILD_BUG_ON() condition is compared to zero so actually everything what > will make the condition true will cause a build fail as inside it used !(condition). ??? > So it seems like we have to check for XEN_VIRT_SIZE != MB(16) and change each time when XEN_VIRT_SIZE > is increased. I don't think so, but I need to first understand the point you make above. Jan From xen-devel-bounces@lists.xenproject.org Fri Apr 04 07:11:51 2025 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 04 Apr 2025 07:11:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.937771.1338658 (Exim 4.92) (envelope-from ) id 1u0bDP-0005Ks-Rs; Fri, 04 Apr 2025 07:11:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 937771.1338658; Fri, 04 Apr 2025 07:11:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0bDP-0005Kl-O9; Fri, 04 Apr 2025 07:11:47 +0000 Received: by outflank-mailman (input) for mailman id 937771; Fri, 04 Apr 2025 07:11:46 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1u0bDO-0005Kf-IV for xen-devel@lists.xenproject.org; Fri, 04 Apr 2025 07:11:46 +0000 Received: from mail-wm1-x335.google.com (mail-wm1-x335.google.com [2a00:1450:4864:20::335]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 1088a8af-1124-11f0-9ffb-bf95429c2676; Fri, 04 Apr 2025 09:11:44 +0200 (CEST) Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-43cfecdd8b2so13085985e9.2 for ; Fri, 04 Apr 2025 00:11:44 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Fri, 04 Apr 2025 00:11:43 -0700 (PDT) Message-ID: <733e19a7-189c-4f98-af1d-e2f880d999be@suse.com> Date: Fri, 4 Apr 2025 09:11:40 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 5/6] x86/emulate: remove HAVE_AS_RDRAND and HAVE_AS_RDSEED To: Andrew Cooper Cc: anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com, dmkhn@proton.me, xen-devel@lists.xenproject.org References: <20250403182250.3329498-1-dmukhin@ford.com> <20250403182250.3329498-6-dmukhin@ford.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 03.04.2025 21:21, Andrew Cooper wrote: > On 03/04/2025 7:23 pm, dmkhn@proton.me wrote: >> From: Denis Mukhin >> >> The new toolchain baseline knows the rdrand/rdseed instructions, >> no need to carry the workaround in the code. >> >> Resolves: https://gitlab.com/xen-project/xen/-/work_items/208 >> Signed-off-by: Denis Mukhin >> --- >> xen/arch/x86/arch.mk | 2 -- >> xen/arch/x86/x86_emulate/0fc7.c | 15 +++++---------- > > Huh... > > I was expecting a hunk in xen/arch/x86/include/asm/random.h but lookin > at it, I see that didn't even get the HAVE_AS_RDRAND treatment in the > first place.  Also, the + constraint, rather than =, looks suspicious. Might that have been for a similar reason as the one you recently added a XOR ahead of POPCNT for? IOW us wanting the clearing of the output to happen irrespective of whether the if() condition is true? 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Fri, 04 Apr 2025 00:14:59 -0700 (PDT) Message-ID: <05063353-93c6-4ca6-8155-bf42bd23bacd@suse.com> Date: Fri, 4 Apr 2025 09:14:58 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 6/6] x86/vmx: rework VMX wrappers to use `asm goto()` To: dmkhn@proton.me Cc: anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com, Andrew Cooper , xen-devel@lists.xenproject.org References: <20250403182250.3329498-1-dmukhin@ford.com> <20250403182250.3329498-7-dmukhin@ford.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 03.04.2025 22:10, Andrew Cooper wrote: > On 03/04/2025 7:23 pm, dmkhn@proton.me wrote: >> --- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h >> +++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h >> @@ -294,54 +294,57 @@ extern uint8_t posted_intr_vector; >> >> static always_inline void __vmptrld(u64 addr) >> { >> - asm volatile ( "vmptrld %0\n" >> - /* CF==1 or ZF==1 --> BUG() */ >> - UNLIKELY_START(be, vmptrld) >> - _ASM_BUGFRAME_TEXT(0) >> - UNLIKELY_END_SECTION >> - : >> - : "m" (addr), >> - _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, 0) >> - : "memory" ); >> + asm goto ( "vmptrld %[addr]\n" >> + "jbe %l[vmfail]\n\t" > > Also cosmetic, but the very final line in the asm block ideally doesn't > want the \n\t. And to clarify (Andrew gave a similar comment elsewhere) the \t instead wants to appear on the first of these two lines. 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Merritt" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , xen-devel@lists.xenproject.org References: <3de09e4e2a3320e0f314803e349fbe6520d04b12.1743719892.git.alexander@edera.dev> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <3de09e4e2a3320e0f314803e349fbe6520d04b12.1743719892.git.alexander@edera.dev> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 04.04.2025 01:22, Alexander M. Merritt wrote: > The new toolchain baseline knows both the XSAVEOPT and CLWB instructions. > > Resolves: https://gitlab.com/xen-project/xen/-/work_items/205 > Signed-off-by: Alexander M. Merritt > --- > xen/arch/x86/arch.mk | 2 -- > xen/arch/x86/flushtlb.c | 28 +--------------------------- > xen/arch/x86/include/asm/system.h | 7 ------- > 3 files changed, 1 insertion(+), 36 deletions(-) For XSAVEOPT there's more work to do, even if not connected via HAVE_AS_XSAVEOPT. Look for "xsaveopt" (case-insensitively) in xstate.c. Imo (just like was asked for for the RDRAND counterpart patch) this wants doing all in one go. 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Fri, 04 Apr 2025 00:24:33 -0700 (PDT) Message-ID: <2b8e33f7-7e51-4ab5-ba1e-9d30d14be3bb@suse.com> Date: Fri, 4 Apr 2025 09:24:31 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] sched/null: avoid another crash after failed domU creation To: Stewart Hildebrand Cc: Dario Faggioli , Juergen Gross , George Dunlap , xen-devel@lists.xenproject.org References: <20250403214829.128294-1-stewart.hildebrand@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20250403214829.128294-1-stewart.hildebrand@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 03.04.2025 23:48, Stewart Hildebrand wrote: > The following sequence of events may lead a debug build of Xen to crash > when using the null scheduler: > > 1. domain creation (e.g. d1) failed due to bad configuration > 2. complete_domain_destroy() was deferred > 3. domain creation (e.g. d2) succeeds > > At this point, d2 is running, while the zombie d1 is not fully cleaned > up: > > (XEN) Online Cpus: 0-3 > (XEN) Cpupool 0: > (XEN) Cpus: 0-3 > (XEN) Scheduling granularity: cpu, 1 CPU per sched-resource > (XEN) Scheduler: null Scheduler (null) > (XEN) cpus_free = 3 > (XEN) Domain info: > (XEN) Domain: 0 > (XEN) 1: [0.0] pcpu=0 > (XEN) 2: [0.1] pcpu=1 > (XEN) Domain: 1 > (XEN) 3: [1.0] pcpu=2 > (XEN) Domain: 2 > (XEN) 4: [2.0] pcpu=2 > > 4. complete_domain_destroy() gets called for d1 and triggers the > following: > > (XEN) Xen call trace: > (XEN) [<00000a0000322ed4>] null.c#unit_deassign+0x2d8/0xb70 (PC) > (XEN) [<00000a000032457c>] null.c#null_unit_remove+0x670/0xba8 (LR) > (XEN) [<00000a000032457c>] null.c#null_unit_remove+0x670/0xba8 > (XEN) [<00000a0000336404>] sched_destroy_vcpu+0x354/0x8fc > (XEN) [<00000a0000227324>] domain.c#complete_domain_destroy+0x11c/0x49c > (XEN) [<00000a000029fbd0>] rcupdate.c#rcu_do_batch+0x94/0x3d0 > (XEN) [<00000a00002a10c0>] rcupdate.c#__rcu_process_callbacks+0x160/0x5f4 > (XEN) [<00000a00002a1e60>] rcupdate.c#rcu_process_callbacks+0xcc/0x1b0 > (XEN) [<00000a00002a3460>] softirq.c#__do_softirq+0x1f4/0x3d8 > (XEN) [<00000a00002a37c4>] do_softirq+0x14/0x1c > (XEN) [<00000a0000465260>] traps.c#check_for_pcpu_work+0x30/0xb8 > (XEN) [<00000a000046bb08>] leave_hypervisor_to_guest+0x28/0x198 > (XEN) [<00000a0000409c84>] entry.o#guest_sync_slowpath+0xac/0xd8 > (XEN) > (XEN) **************************************** > (XEN) Panic on CPU 0: > (XEN) Assertion 'npc->unit == unit' failed at common/sched/null.c:383 > (XEN) **************************************** > > Fix by skipping unit_deassign() when the unit to be removed does not > match the pcpu's currently assigned unit. > > Signed-off-by: Stewart Hildebrand Just one remark here: This almost certainly wants a Fixes: tag. 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Won't > suffice? >>>> It could be just > MB(2). Or perphaps >=. >>>> = would make the build fail, wouldn't it? >> I just realized that BUILD_BUG_ON() condition is compared to zero so actually everything what >> will make the condition true will cause a build fail as inside it used !(condition). > ??? |BUILD_BUG_ON()| forces a compilation error if the given condition is true. Therefore, if the condition |XEN_VIRT_SIZE != MB(2)| is changed to|XEN_VIRT_SIZE > MB(2)|, the condition will always evaluate to true (assuming|XEN_VIRT_SIZE| is greater than 2 MB), which will result in a compilation error. ~ Oleksii > >> So it seems like we have to check for XEN_VIRT_SIZE != MB(16) and change each time when XEN_VIRT_SIZE >> is increased. > I don't think so, but I need to first understand the point you make above. --------------SMRczfIP04OYxOzm0S6CJdGW Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: 7bit


On 4/4/25 8:56 AM, Jan Beulich wrote:
On 03.04.2025 18:20, Oleksii Kurochko wrote:

On 4/1/25 6:04 PM, Jan Beulich wrote:

On 01.04.2025 17:58, Oleksii Kurochko wrote:

On 3/31/25 6:14 PM, Jan Beulich wrote:

On 31.03.2025 17:20, Oleksii Kurochko wrote:

+        _AC(XEN_VIRT_START, UL) >> vpn1_shift;
+    const unsigned long xen_virt_end_vpn =
+        xen_virt_starn_vpn + ((XEN_VIRT_SIZE >> vpn1_shift) - 1);
+
       if ((va >= DIRECTMAP_VIRT_START) &&
           (va <= DIRECTMAP_VIRT_END))
           return directmapoff_to_maddr(va - directmap_virt_start);
   
-    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(2));
-    ASSERT((va >> (PAGETABLE_ORDER + PAGE_SHIFT)) ==
-           (_AC(XEN_VIRT_START, UL) >> (PAGETABLE_ORDER + PAGE_SHIFT)));
+    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(8));

Is it necessary to be != ? Won't > suffice?

It could be just > MB(2). Or perphaps >=.
= would make the build fail, wouldn't it?

I just realized that BUILD_BUG_ON() condition is compared to zero so actually everything what
will make the condition true will cause a build fail as inside it used !(condition).

???
BUILD_BUG_ON() forces a compilation error if the given condition is true. Therefore, if the condition
XEN_VIRT_SIZE != MB(2) is changed to XEN_VIRT_SIZE > MB(2), the condition will always evaluate to true
(assuming XEN_VIRT_SIZE is greater than 2 MB), which will result in a compilation error.

~ Oleksii



So it seems like we have to check for XEN_VIRT_SIZE != MB(16) and change each time when XEN_VIRT_SIZE
is increased.

I don't think so, but I need to first understand the point you make above.

  


--------------SMRczfIP04OYxOzm0S6CJdGW--


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Date: Fri, 4 Apr 2025 09:34:48 +0200
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Subject: Re: [PATCH v3 4/7] xen/arm: dom0less seed xenstore grant table entry
To: Jason Andryuk 
Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Andrew Cooper ,
 Anthony PERARD ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 03.04.2025 23:46, Jason Andryuk wrote:
> xenstored maps other domains' xenstore pages.  Currently this relies on
> init-dom0less or xl to seed the grants from Dom0.  With split
> hardware/control/xenstore domains, this is problematic since we don't
> want the hardware domain to be able to map other domains' resources
> without their permission.  Instead have the hypervisor seed the grant
> table entry for every dom0less domain.  The grant is then accessible as
> normal.
> 
> C xenstored uses grants, so it can map the xenstore pages from a
> non-dom0 xenstore domain.  OCaml xenstored uses foreign mappings, so it
> can only run from a privileged domain (dom0).
> 
> Signed-off-by: Jason Andryuk 
> ---
> v3:
> Expand commit message about C vs. OCaml xenstored.
> Remove __init and flags from gnttab_seed_entry()
> Change frame to uint32_t
> ASSERT gfn fits in a uint32_t

Ehem. For this you need to use ...

> --- a/xen/arch/arm/dom0less-build.c
> +++ b/xen/arch/arm/dom0less-build.c
> @@ -788,6 +788,12 @@ static void __init initialize_domU_xenstore(void)
>          rc = alloc_xenstore_evtchn(d);
>          if ( rc < 0 )
>              panic("%pd: Failed to allocate xenstore_evtchn\n", d);
> +
> +        if ( gfn != ~0ULL )
> +        {
> +            ASSERT(gfn <= UINT_MAX);

... UINT32_MAX here. Furthermore may I remind you that INVALID_GFN ==
UINT32_MAX in 32-bit environments.

The ~0ULL may also better be UINT64_MAX.

> @@ -85,6 +89,9 @@ static inline void grant_table_destroy(struct domain *d) {}
>  
>  static inline void grant_table_init_vcpu(struct vcpu *v) {}
>  
> +static inline void gnttab_seed_entry(struct domain *d, int idx,
> +                                     domid_t be_domid, uint32_t frame) {}

Hmm. While generally I prefer using such wrappers, I wonder if in this
case it wouldn't end up more clear if a conditional was added in
initialize_domU_xenstore(). Ideally using IS_ENABLED(), which - aiui -
would require moving the declaration of the function.

Jan


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From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= 
To: Jan Beulich ,
 Stewart Hildebrand 
Cc: Dario Faggioli , George Dunlap ,
 xen-devel@lists.xenproject.org
Message-ID: 
Subject: Re: [PATCH] sched/null: avoid another crash after failed domU
 creation
References: <20250403214829.128294-1-stewart.hildebrand@amd.com>
 <2b8e33f7-7e51-4ab5-ba1e-9d30d14be3bb@suse.com>
In-Reply-To: <2b8e33f7-7e51-4ab5-ba1e-9d30d14be3bb@suse.com>
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Subject: Re: [PATCH v3 1/7] xen: introduce hardware domain create flag
To: Jason Andryuk 
Cc: "Daniel P. Smith" ,
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On 03.04.2025 23:46, Jason Andryuk wrote:
> From: "Daniel P. Smith" 
> 
> Add and use a new internal create domain flag to specify the hardware
> domain.  This removes the hardcoding of domid 0 as the hardware domain.
> 
> This allows more flexibility with domain creation.
> 
> Signed-off-by: Daniel P. Smith 
> Signed-off-by: Jason Andryuk 
> Reviewed-by: Jan Beulich 
> ---
> v3:
> Or-in CDF_hardware for late hwdom case

Except that ...

> --- a/xen/common/domain.c
> +++ b/xen/common/domain.c
> @@ -820,13 +820,18 @@ struct domain *domain_create(domid_t domid,
>      d->is_privileged = flags & CDF_privileged;
>  
>      /* Sort out our idea of is_hardware_domain(). */
> -    if ( domid == 0 || domid == hardware_domid )
> +    if ( (flags & CDF_hardware) || domid == hardware_domid )
>      {
>          if ( hardware_domid < 0 || hardware_domid >= DOMID_FIRST_RESERVED )
>              panic("The value of hardware_dom must be a valid domain ID\n");
>  
> +        /* late_hwdom is only allowed for dom0. */
> +        if ( hardware_domain && hardware_domain->domain_id )
> +            return ERR_PTR(-EINVAL);
> +
>          old_hwdom = hardware_domain;
>          hardware_domain = d;
> +        flags |= CDF_hardware;
>      }

... this isn't quite enough. You're only modifying what will go out of scope
when returning from the function. What's at least equally important to OR into
is d->cdf.

Jan


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On 03.04.2025 23:41, Andrew Cooper wrote:
> MISRA C:2012 Amendment 3 (which is under consideration, but not used by Xen
> yet) is more particular about having the storage class specifier first.
> 
> No functional change.
> 
> Signed-off-by: Andrew Cooper 

Reviewed-by: Jan Beulich 




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On 03.04.2025 19:57, Andrew Cooper wrote:
> Bloat-o-meter reports:
> 
>   add/remove: 0/0 grow/shrink: 0/2 up/down: 0/-29 (-29)
>   Function                                     old     new   delta
>   _probe_mask_msr                               99      94      -5
>   init_amd                                    2418    2394     -24
> 
> but that's because .fixup doesn't contain sized/typed symbols.  This also
> drops two "mov -EFAULT, %reg; jmp ...;" sequences too.  The net saving is -50.
> 
> wrmsr_amd_safe()'s return value is only checked against 0 (if at all), and
> because of this, the compiler can now avoid manifesting 0/-EFAULT entirely,
> and the %[fault] label simply lands on the right basic block.
> 
> Convert to Xen style while rewriting.
> 
> No functional change.
> 
> Signed-off-by: Andrew Cooper 
> ---
> CC: Jan Beulich 
> CC: Roger Pau Monné 
> 
> Slightly RFC.  We use -EIO elsewhere for this purpose, and nothing in this
> logic cares.

{rd,wr}msr_safe() both use -EFAULT. What's "elsewhere" here?

> I was pleasently surprised by the manifestation of -EFAULT going away
> entirely.

I fear I don't understand this, given the -EFAULT is still there in the
new code.

Irrespective of these remarks:
Reviewed-by: Jan Beulich 

Jan


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From: Jan Beulich 
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On 04.04.2025 09:31, Oleksii Kurochko wrote:
> 
> On 4/4/25 8:56 AM, Jan Beulich wrote:
>> On 03.04.2025 18:20, Oleksii Kurochko wrote:
>>> On 4/1/25 6:04 PM, Jan Beulich wrote:
>>>> On 01.04.2025 17:58, Oleksii Kurochko wrote:
>>>>> On 3/31/25 6:14 PM, Jan Beulich wrote:
>>>>>> On 31.03.2025 17:20, Oleksii Kurochko wrote:
>>>>>>> +        _AC(XEN_VIRT_START, UL) >> vpn1_shift;
>>>>>>> +    const unsigned long xen_virt_end_vpn =
>>>>>>> +        xen_virt_starn_vpn + ((XEN_VIRT_SIZE >> vpn1_shift) - 1);
>>>>>>> +
>>>>>>>         if ((va >= DIRECTMAP_VIRT_START) &&
>>>>>>>             (va <= DIRECTMAP_VIRT_END))
>>>>>>>             return directmapoff_to_maddr(va - directmap_virt_start);
>>>>>>>     
>>>>>>> -    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(2));
>>>>>>> -    ASSERT((va >> (PAGETABLE_ORDER + PAGE_SHIFT)) ==
>>>>>>> -           (_AC(XEN_VIRT_START, UL) >> (PAGETABLE_ORDER + PAGE_SHIFT)));
>>>>>>> +    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(8));
>>>>>> Is it necessary to be != ? Won't > suffice?
>>>>> It could be just > MB(2). Or perphaps >=.
>>>>> = would make the build fail, wouldn't it?
>>> I just realized that BUILD_BUG_ON() condition is compared to zero so actually everything what
>>> will make the condition true will cause a build fail as inside it used !(condition).
>> ???
> 
> |BUILD_BUG_ON()| forces a compilation error if the given condition is true. Therefore, if the condition
> |XEN_VIRT_SIZE != MB(2)| is changed to|XEN_VIRT_SIZE > MB(2)|, the condition will always evaluate to true
> (assuming|XEN_VIRT_SIZE| is greater than 2 MB), which will result in a compilation error.

Well, it was you who used MB(2) in a reply, when previously talk was of MB(8),
and that to grow to MB(16). The BUILD_BUG_ON() is - aiui - about you having set
aside enough page table space. Quite possibly the need for this BUILD_BUG_ON()
then disappears altogether when XEN_VIRT_SIZE is properly taken into account
for the number-of-page-tables calculation. In no event do I see why the MB(2)
boundary would be relevant for anything going forward.

Jan


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Date: Fri, 4 Apr 2025 10:07:00 +0200
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Subject: Re: [RFC] xen/x86: allow overlaps with non-RAM regions
To: Stefano Stabellini 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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References: 
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From: Jan Beulich 
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On 04.04.2025 03:01, Stefano Stabellini wrote:
> On one Sapphire AMD x86 board, I see this:
> 
> 
> (XEN) [0000003943ca6ff2]  [00000000f0000000, 00000000f7ffffff] (reserved)
> (XEN) [00000039460886d9]  [00000000fd000000, 00000000ffffffff] (reserved)
> [...]
> (XEN) [    4.612235] 0000:02:00.0: not mapping BAR [fea00, fea03] invalid position

I, too, see something like this on an SPR system. That's a firmware issue,
which hence first of all should be dealt with at the firmware side.

> Linux boots fine on this platform but Linux as Dom0 on Xen does not.
> This is because the pci_check_bar->is_memory_hole check fails due to the
> MMIO region overlapping with the EFI reserved region.

And then what's the actual, observable problem? On my system I haven't
noticed anything going wrong yet, albeit the affected device is also left
without a driver.

Also aiui you strictly mean PVH Dom0 here?

> --- a/xen/arch/x86/mm.c
> +++ b/xen/arch/x86/mm.c
> @@ -797,6 +797,9 @@ bool is_memory_hole(mfn_t start, mfn_t end)
>          if ( !entry->size )
>              continue;
>  
> +        if ( entry->type > 1 )
> +            continue;

I'm sorry to ask, but what's a literal 1 here? I'm pretty convinced we
would want to still object to overlaps with unusable ranges, for example.
Yet by open-coding what E820_RAM expands to you completely hide what this
check is about. Yes, this is an RFC, but even there such context is
important.

Furthermore my general take here is: We shouldn't simply silence issues
arising from firmware doing odd things. My take here is still the same
as the position I took when I still was maintainer of the EFI code in
Xen: We shouldn't by default work around such issues, when doing so may
negatively affect systems not exposing such odd behavior.

Finally a Misra-related observation while looking at this: Isn't
is_memory_hole() unreachable code in a !HVM configuration?

Jan


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Date: Fri, 4 Apr 2025 10:43:02 +0200
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User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v1] xen/riscv: Increase XEN_VIRT_SIZE
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: 
 <54ebdcb7-071f-411f-803a-930dc330a497@suse.com>
 <32264ccb-e566-41e0-973f-5bc7d874f970@gmail.com>
 <9d7e1553-3af8-4fc3-a400-8714d9b68411@suse.com>
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 <14ac3e72-d21d-4b45-a434-d123152c0113@suse.com>
Content-Language: en-US
From: Oleksii Kurochko 
In-Reply-To: <14ac3e72-d21d-4b45-a434-d123152c0113@suse.com>

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On 4/4/25 9:52 AM, Jan Beulich wrote:
> On 04.04.2025 09:31, Oleksii Kurochko wrote:
>> On 4/4/25 8:56 AM, Jan Beulich wrote:
>>> On 03.04.2025 18:20, Oleksii Kurochko wrote:
>>>> On 4/1/25 6:04 PM, Jan Beulich wrote:
>>>>> On 01.04.2025 17:58, Oleksii Kurochko wrote:
>>>>>> On 3/31/25 6:14 PM, Jan Beulich wrote:
>>>>>>> On 31.03.2025 17:20, Oleksii Kurochko wrote:
>>>>>>>> +        _AC(XEN_VIRT_START, UL) >> vpn1_shift;
>>>>>>>> +    const unsigned long xen_virt_end_vpn =
>>>>>>>> +        xen_virt_starn_vpn + ((XEN_VIRT_SIZE >> vpn1_shift) - 1);
>>>>>>>> +
>>>>>>>>          if ((va >= DIRECTMAP_VIRT_START) &&
>>>>>>>>              (va <= DIRECTMAP_VIRT_END))
>>>>>>>>              return directmapoff_to_maddr(va - directmap_virt_start);
>>>>>>>>      
>>>>>>>> -    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(2));
>>>>>>>> -    ASSERT((va >> (PAGETABLE_ORDER + PAGE_SHIFT)) ==
>>>>>>>> -           (_AC(XEN_VIRT_START, UL) >> (PAGETABLE_ORDER + PAGE_SHIFT)));
>>>>>>>> +    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(8));
>>>>>>> Is it necessary to be != ? Won't > suffice?
>>>>>> It could be just > MB(2). Or perphaps >=.
>>>>>> = would make the build fail, wouldn't it?
>>>> I just realized that BUILD_BUG_ON() condition is compared to zero so actually everything what
>>>> will make the condition true will cause a build fail as inside it used !(condition).
>>> ???
>> |BUILD_BUG_ON()| forces a compilation error if the given condition is true. Therefore, if the condition
>> |XEN_VIRT_SIZE != MB(2)| is changed to|XEN_VIRT_SIZE > MB(2)|, the condition will always evaluate to true
>> (assuming|XEN_VIRT_SIZE| is greater than 2 MB), which will result in a compilation error.
> Well, it was you who used MB(2) in a reply, when previously talk was of MB(8),
> and that to grow to MB(16). The BUILD_BUG_ON() is - aiui - about you having set
> aside enough page table space. Quite possibly the need for this BUILD_BUG_ON()
> then disappears altogether when XEN_VIRT_SIZE is properly taken into account
> for the number-of-page-tables calculation. In no event do I see why the MB(2)
> boundary would be relevant for anything going forward.

Also, doesn’t|BUILD_BUG_ON()| affect how the|ASSERT()| that follows it is written?

The changes, at the moment, look like:
+    const unsigned int vpn1_shift = PAGETABLE_ORDER + PAGE_SHIFT;
+    const unsigned long va_vpn = va >> vpn1_shift;
+    const unsigned long xen_virt_start_vpn =
+        _AC(XEN_VIRT_START, UL) >> vpn1_shift;
+    const unsigned long xen_virt_end_vpn =
+        xen_virt_start_vpn + ((XEN_VIRT_SIZE >> vpn1_shift) - 1);
+
      if ((va >= DIRECTMAP_VIRT_START) &&
          (va <= DIRECTMAP_VIRT_END))
          return directmapoff_to_maddr(va - directmap_virt_start);
  
-    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(2));
-    ASSERT((va >> (PAGETABLE_ORDER + PAGE_SHIFT)) ==
-           (_AC(XEN_VIRT_START, UL) >> (PAGETABLE_ORDER + PAGE_SHIFT)));
+    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(16));
+    ASSERT((va_vpn >= xen_virt_start_vpn) && (va_vpn <= xen_virt_end_vpn));


If|XEN_VIRT_SIZE| is greater than|GB(1)|, then|xen_virt_end_vpn| may be calculated
incorrectly.

For example, if|XEN_VIRT_START| is|0xFFFFFFFF80000000| and|XEN_VIRT_SIZE| is|0x40200000|,
then|(XEN_VIRT_SIZE >> vpn1_shift)| equals 513, whereas|va_vpn| is always in the range [0, 511],
but xen_virt_end_vpn will be greater then 511.

So shouldn't it  be checked before ASSERT() that XEN_VIRT_SIZE is <= GB(1):
   BUILD_BUG_ON(XEN_VIRT_SIZE <= GB(1))?

~ Oleksii


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On 4/4/25 9:52 AM, Jan Beulich wrote:

    

    

      
On 04.04.2025 09:31, Oleksii Kurochko wrote:


      

        
On 4/4/25 8:56 AM, Jan Beulich wrote:


        

          
On 03.04.2025 18:20, Oleksii Kurochko wrote:


          

            
On 4/1/25 6:04 PM, Jan Beulich wrote:


            

              
On 01.04.2025 17:58, Oleksii Kurochko wrote:


              

                
On 3/31/25 6:14 PM, Jan Beulich wrote:


                

                  
On 31.03.2025 17:20, Oleksii Kurochko wrote:


                  

                    
+        _AC(XEN_VIRT_START, UL) >> vpn1_shift;
+    const unsigned long xen_virt_end_vpn =
+        xen_virt_starn_vpn + ((XEN_VIRT_SIZE >> vpn1_shift) - 1);
+
        if ((va >= DIRECTMAP_VIRT_START) &&
            (va <= DIRECTMAP_VIRT_END))
            return directmapoff_to_maddr(va - directmap_virt_start);
    
-    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(2));
-    ASSERT((va >> (PAGETABLE_ORDER + PAGE_SHIFT)) ==
-           (_AC(XEN_VIRT_START, UL) >> (PAGETABLE_ORDER + PAGE_SHIFT)));
+    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(8));


                  

                  
Is it necessary to be != ? Won't > suffice?


                

                
It could be just > MB(2). Or perphaps >=.
= would make the build fail, wouldn't it?


              

            

            
I just realized that BUILD_BUG_ON() condition is compared to zero so actually everything what
will make the condition true will cause a build fail as inside it used !(condition).


          

          
???


        

        
|BUILD_BUG_ON()| forces a compilation error if the given condition is true. Therefore, if the condition
|XEN_VIRT_SIZE != MB(2)| is changed to|XEN_VIRT_SIZE > MB(2)|, the condition will always evaluate to true
(assuming|XEN_VIRT_SIZE| is greater than 2 MB), which will result in a compilation error.


      

      
Well, it was you who used MB(2) in a reply, when previously talk was of MB(8),
and that to grow to MB(16). The BUILD_BUG_ON() is - aiui - about you having set
aside enough page table space. Quite possibly the need for this BUILD_BUG_ON()
then disappears altogether when XEN_VIRT_SIZE is properly taken into account
for the number-of-page-tables calculation. In no event do I see why the MB(2)
boundary would be relevant for anything going forward.

    

    
Also, doesn’t BUILD_BUG_ON() affect how the ASSERT() that follows it is written?

The changes, at the moment, look like:
+    const unsigned int vpn1_shift = PAGETABLE_ORDER + PAGE_SHIFT;
+    const unsigned long va_vpn = va >> vpn1_shift;
+    const unsigned long xen_virt_start_vpn =
+        _AC(XEN_VIRT_START, UL) >> vpn1_shift;
+    const unsigned long xen_virt_end_vpn =
+        xen_virt_start_vpn + ((XEN_VIRT_SIZE >> vpn1_shift) - 1);
+
     if ((va >= DIRECTMAP_VIRT_START) &&
         (va <= DIRECTMAP_VIRT_END))
         return directmapoff_to_maddr(va - directmap_virt_start);
 
-    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(2));
-    ASSERT((va >> (PAGETABLE_ORDER + PAGE_SHIFT)) ==
-           (_AC(XEN_VIRT_START, UL) >> (PAGETABLE_ORDER + PAGE_SHIFT)));
+    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(16));
+    ASSERT((va_vpn >= xen_virt_start_vpn) && (va_vpn <= xen_virt_end_vpn));


If XEN_VIRT_SIZE is greater than GB(1), then xen_virt_end_vpn may be calculated
incorrectly.

For example, if XEN_VIRT_START is 0xFFFFFFFF80000000 and XEN_VIRT_SIZE is 0x40200000,
then (XEN_VIRT_SIZE >> vpn1_shift) equals 513, whereas va_vpn is always in the range [0, 511],
but xen_virt_end_vpn will be greater then 511.

So shouldn't it  be checked before ASSERT() that XEN_VIRT_SIZE is <= GB(1):
  BUILD_BUG_ON(XEN_VIRT_SIZE <= GB(1))?

~ Oleksii




  


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 Stabellini , Julien Grall , Bertrand
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	Volodymyr Babchuk 
Subject: Re: [PATCH v4 0/3] Enable early bootup of Armv8-R AArch32 systems
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From: Luca Fancellu 
To: Ayan Kumar Halder 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Michal Orzel ,
	Volodymyr Babchuk 
Subject: Re: [PATCH v4 1/3] xen/arm: Move some of the functions to common file
Thread-Topic: [PATCH v4 1/3] xen/arm: Move some of the functions to common
 file
Thread-Index: AQHbpLu5pa88e8EeQkugLRqmrl+P07OTN/eA
Date: Fri, 4 Apr 2025 09:06:01 +0000
Message-ID: 
References: <20250403171241.975377-1-ayan.kumar.halder@amd.com>
 <20250403171241.975377-2-ayan.kumar.halder@amd.com>
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From: Luca Fancellu 
To: Ayan Kumar Halder 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Michal Orzel ,
	Volodymyr Babchuk 
Subject: Re: [PATCH v4 3/3] xen/arm32: mpu: Stubs to build MPU for arm32
Thread-Topic: [PATCH v4 3/3] xen/arm32: mpu: Stubs to build MPU for arm32
Thread-Index: AQHbpLu+qDQrebRIZEGOW3V0WpA7GrOTOWAA
Date: Fri, 4 Apr 2025 09:11:04 +0000
Message-ID: 
References: <20250403171241.975377-1-ayan.kumar.halder@amd.com>
 <20250403171241.975377-4-ayan.kumar.halder@amd.com>
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From: "Teddy Astie" 
Subject: =?utf-8?Q?[PATCH=20v2=201/2]=20x86/amd:=20Add=20guest=20support=20for=20AMD=20TCE?=
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AMD Translation Cache Extension is a flag that can be enabled in the EFER MSR to optimize
some TLB flushes. Expose this flag to guest if supported by hardware.

AMD Architecture Developer Manual describe this feature as follow
> Setting this bit to 1 changes how the INVLPG, INVLPGB, and INVPCID instructions operate
> on TLB entries. When this bit is 0, these instructions remove the target PTE from the
> TLB as well as all upper-level table entries that are cached in the TLB, whether or not
> they are associated with the target PTE. When this bit is set, these instructions will
> remove the target PTE and only those upper-level entries that lead to the target PTE in
> the page table hierarchy, leaving unrelated upper-level entries intact. This may provide
> a performance benefit.

Signed-off-by: Teddy Astie 
---
 CHANGELOG.md                                | 1 +
 xen/arch/x86/hvm/hvm.c                      | 3 +++
 xen/arch/x86/include/asm/msr-index.h        | 3 ++-
 xen/include/public/arch-x86/cpufeatureset.h | 1 +
 4 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index 8f6afa5c85..dbfecefbd4 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -18,6 +18,7 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/)
    - Support PCI passthrough for HVM domUs when dom0 is PVH (note SR-IOV
      capability usage is not yet supported on PVH dom0).
    - Smoke tests for the FreeBSD Xen builds in Cirrus CI.
+   - Guest support for AMD Translation Cache Extension feature.
 
 ### Removed
 
diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index 5950f3160f..184357b042 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -959,6 +959,9 @@ const char *hvm_efer_valid(const struct vcpu *v, uint64_t value,
     if ( (value & EFER_FFXSE) && !p->extd.ffxsr )
         return "FFXSE without feature";
 
+    if ( (value & EFER_TCE) && !p->extd.tce )
+        return "TCE without feature";
+
     if ( (value & EFER_AIBRSE) && !p->extd.auto_ibrs )
         return "AutoIBRS without feature";
 
diff --git a/xen/arch/x86/include/asm/msr-index.h b/xen/arch/x86/include/asm/msr-index.h
index 22d9e76e55..d8576aec1c 100644
--- a/xen/arch/x86/include/asm/msr-index.h
+++ b/xen/arch/x86/include/asm/msr-index.h
@@ -200,11 +200,12 @@
 #define  EFER_NXE                           (_AC(1, ULL) << 11) /* No Execute Enable */
 #define  EFER_SVME                          (_AC(1, ULL) << 12) /* Secure Virtual Machine Enable */
 #define  EFER_FFXSE                         (_AC(1, ULL) << 14) /* Fast FXSAVE/FXRSTOR */
+#define  EFER_TCE                           (_AC(1, ULL) << 15) /* Translation Cache Extensions */
 #define  EFER_AIBRSE                        (_AC(1, ULL) << 21) /* Automatic IBRS Enable */
 
 #define EFER_KNOWN_MASK \
     (EFER_SCE | EFER_LME | EFER_LMA | EFER_NXE | EFER_SVME | EFER_FFXSE | \
-     EFER_AIBRSE)
+     EFER_TCE | EFER_AIBRSE)
 
 #define MSR_STAR                            _AC(0xc0000081, U) /* legacy mode SYSCALL target */
 #define MSR_LSTAR                           _AC(0xc0000082, U) /* long mode SYSCALL target */
diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h
index cc6e984a88..8182d2dbed 100644
--- a/xen/include/public/arch-x86/cpufeatureset.h
+++ b/xen/include/public/arch-x86/cpufeatureset.h
@@ -170,6 +170,7 @@ XEN_CPUFEATURE(SKINIT,        3*32+12) /*   SKINIT/STGI instructions */
 XEN_CPUFEATURE(WDT,           3*32+13) /*   Watchdog timer */
 XEN_CPUFEATURE(LWP,           3*32+15) /*   Light Weight Profiling */
 XEN_CPUFEATURE(FMA4,          3*32+16) /*A  4 operands MAC instructions */
+XEN_CPUFEATURE(TCE,           3*32+17) /*H  Translation Cache Extension support */
 XEN_CPUFEATURE(NODEID_MSR,    3*32+19) /*   NodeId MSR */
 XEN_CPUFEATURE(TBM,           3*32+21) /*A  trailing bit manipulations */
 XEN_CPUFEATURE(TOPOEXT,       3*32+22) /*   topology extensions CPUID leafs */
-- 
2.47.2



 | Vates

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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Subject: =?utf-8?Q?[PATCH=20v2=202/2]=20x86/amd:=20Enable=20TCE=20in=20Xen?=
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Aside exposing this flag to guests, Xen can also make use of it
to reduce the cost of some TLB flushes. Enable this flag if supported
by hardware.

Signed-off-by: Teddy Astie 
---
v2:
 - Add changelog entry
 - use trampoline_efer
 - use cpu_has_tce instead of opencoded boot_cpu_has(X86_FEATURE_TCE)
---
 CHANGELOG.md                          | 2 +-
 xen/arch/x86/include/asm/cpufeature.h | 1 +
 xen/arch/x86/setup.c                  | 8 ++++++++
 3 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index dbfecefbd4..375905e68a 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -18,7 +18,7 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/)
    - Support PCI passthrough for HVM domUs when dom0 is PVH (note SR-IOV
      capability usage is not yet supported on PVH dom0).
    - Smoke tests for the FreeBSD Xen builds in Cirrus CI.
-   - Guest support for AMD Translation Cache Extension feature.
+   - Guest and Xen support for AMD Translation Cache Extension feature.
 
 ### Removed
 
diff --git a/xen/arch/x86/include/asm/cpufeature.h b/xen/arch/x86/include/asm/cpufeature.h
index 05399fb9c9..ab6d07b767 100644
--- a/xen/arch/x86/include/asm/cpufeature.h
+++ b/xen/arch/x86/include/asm/cpufeature.h
@@ -114,6 +114,7 @@ static inline bool boot_cpu_has(unsigned int feat)
 #define cpu_has_xop             boot_cpu_has(X86_FEATURE_XOP)
 #define cpu_has_skinit          boot_cpu_has(X86_FEATURE_SKINIT)
 #define cpu_has_fma4            boot_cpu_has(X86_FEATURE_FMA4)
+#define cpu_has_tce             boot_cpu_has(X86_FEATURE_TCE)
 #define cpu_has_tbm             boot_cpu_has(X86_FEATURE_TBM)
 
 /* CPUID level 0x0000000D:1.eax */
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index d70abb7e0c..0e2e7d012f 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -2008,6 +2008,14 @@ void asmlinkage __init noreturn __start_xen(void)
     if ( cpu_has_pku )
         set_in_cr4(X86_CR4_PKE);
 
+    if ( cpu_has_tce )
+    {
+        printk("Enabling AMD TCE\n");
+
+        write_efer(read_efer() | EFER_TCE);
+        trampoline_efer |= EFER_TCE;
+    }
+
     if ( opt_invpcid && cpu_has_invpcid )
         use_invpcid = true;
 
-- 
2.47.2



Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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Date: Fri, 4 Apr 2025 12:00:41 +0200
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Subject: Re: [PATCH v1] xen/riscv: Increase XEN_VIRT_SIZE
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
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From: Jan Beulich 
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On 04.04.2025 10:43, Oleksii Kurochko wrote:
> 
> On 4/4/25 9:52 AM, Jan Beulich wrote:
>> On 04.04.2025 09:31, Oleksii Kurochko wrote:
>>> On 4/4/25 8:56 AM, Jan Beulich wrote:
>>>> On 03.04.2025 18:20, Oleksii Kurochko wrote:
>>>>> On 4/1/25 6:04 PM, Jan Beulich wrote:
>>>>>> On 01.04.2025 17:58, Oleksii Kurochko wrote:
>>>>>>> On 3/31/25 6:14 PM, Jan Beulich wrote:
>>>>>>>> On 31.03.2025 17:20, Oleksii Kurochko wrote:
>>>>>>>>> +        _AC(XEN_VIRT_START, UL) >> vpn1_shift;
>>>>>>>>> +    const unsigned long xen_virt_end_vpn =
>>>>>>>>> +        xen_virt_starn_vpn + ((XEN_VIRT_SIZE >> vpn1_shift) - 1);
>>>>>>>>> +
>>>>>>>>>          if ((va >= DIRECTMAP_VIRT_START) &&
>>>>>>>>>              (va <= DIRECTMAP_VIRT_END))
>>>>>>>>>              return directmapoff_to_maddr(va - directmap_virt_start);
>>>>>>>>>      
>>>>>>>>> -    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(2));
>>>>>>>>> -    ASSERT((va >> (PAGETABLE_ORDER + PAGE_SHIFT)) ==
>>>>>>>>> -           (_AC(XEN_VIRT_START, UL) >> (PAGETABLE_ORDER + PAGE_SHIFT)));
>>>>>>>>> +    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(8));
>>>>>>>> Is it necessary to be != ? Won't > suffice?
>>>>>>> It could be just > MB(2). Or perphaps >=.
>>>>>>> = would make the build fail, wouldn't it?
>>>>> I just realized that BUILD_BUG_ON() condition is compared to zero so actually everything what
>>>>> will make the condition true will cause a build fail as inside it used !(condition).
>>>> ???
>>> |BUILD_BUG_ON()| forces a compilation error if the given condition is true. Therefore, if the condition
>>> |XEN_VIRT_SIZE != MB(2)| is changed to|XEN_VIRT_SIZE > MB(2)|, the condition will always evaluate to true
>>> (assuming|XEN_VIRT_SIZE| is greater than 2 MB), which will result in a compilation error.
>> Well, it was you who used MB(2) in a reply, when previously talk was of MB(8),
>> and that to grow to MB(16). The BUILD_BUG_ON() is - aiui - about you having set
>> aside enough page table space. Quite possibly the need for this BUILD_BUG_ON()
>> then disappears altogether when XEN_VIRT_SIZE is properly taken into account
>> for the number-of-page-tables calculation. In no event do I see why the MB(2)
>> boundary would be relevant for anything going forward.
> 
> Also, doesn’t|BUILD_BUG_ON()| affect how the|ASSERT()| that follows it is written?
> 
> The changes, at the moment, look like:
> +    const unsigned int vpn1_shift = PAGETABLE_ORDER + PAGE_SHIFT;
> +    const unsigned long va_vpn = va >> vpn1_shift;
> +    const unsigned long xen_virt_start_vpn =
> +        _AC(XEN_VIRT_START, UL) >> vpn1_shift;
> +    const unsigned long xen_virt_end_vpn =
> +        xen_virt_start_vpn + ((XEN_VIRT_SIZE >> vpn1_shift) - 1);
> +
>       if ((va >= DIRECTMAP_VIRT_START) &&
>           (va <= DIRECTMAP_VIRT_END))
>           return directmapoff_to_maddr(va - directmap_virt_start);
>   
> -    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(2));
> -    ASSERT((va >> (PAGETABLE_ORDER + PAGE_SHIFT)) ==
> -           (_AC(XEN_VIRT_START, UL) >> (PAGETABLE_ORDER + PAGE_SHIFT)));
> +    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(16));
> +    ASSERT((va_vpn >= xen_virt_start_vpn) && (va_vpn <= xen_virt_end_vpn));
> 
> 
> If|XEN_VIRT_SIZE| is greater than|GB(1)|, then|xen_virt_end_vpn| may be calculated
> incorrectly.
> 
> For example, if|XEN_VIRT_START| is|0xFFFFFFFF80000000| and|XEN_VIRT_SIZE| is|0x40200000|,
> then|(XEN_VIRT_SIZE >> vpn1_shift)| equals 513, whereas|va_vpn| is always in the range [0, 511],
> but xen_virt_end_vpn will be greater then 511.
> 
> So shouldn't it  be checked before ASSERT() that XEN_VIRT_SIZE is <= GB(1):
>    BUILD_BUG_ON(XEN_VIRT_SIZE <= GB(1))?

Yes, that would make sense.

Jan


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Subject: Re: [PATCH v2 6/6] x86/vmx: rework VMX wrappers to use `asm goto()`
To: Jan Beulich , dmkhn@proton.me
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On 04/04/2025 8:14 am, Jan Beulich wrote:
> On 03.04.2025 22:10, Andrew Cooper wrote:
>> On 03/04/2025 7:23 pm, dmkhn@proton.me wrote:
>>> --- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h
>>> +++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h
>>> @@ -294,54 +294,57 @@ extern uint8_t posted_intr_vector;
>>>  
>>>  static always_inline void __vmptrld(u64 addr)
>>>  {
>>> -    asm volatile ( "vmptrld %0\n"
>>> -                   /* CF==1 or ZF==1 --> BUG() */
>>> -                   UNLIKELY_START(be, vmptrld)
>>> -                   _ASM_BUGFRAME_TEXT(0)
>>> -                   UNLIKELY_END_SECTION
>>> -                   :
>>> -                   : "m" (addr),
>>> -                     _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, 0)
>>> -                   : "memory" );
>>> +    asm goto ( "vmptrld %[addr]\n"
>>> +               "jbe %l[vmfail]\n\t"
>> Also cosmetic, but the very final line in the asm block ideally doesn't
>> want the \n\t.
> And to clarify (Andrew gave a similar comment elsewhere) the \t instead
> wants to appear on the first of these two lines.

Indeed.  This particular example got adjusted in patch 1, where I made
said observation.

~Andrew


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Date: Fri, 4 Apr 2025 11:13:29 +0100
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Subject: Re: [PATCH] x86: drop XSAVEOPT and CLWB build flags
To: Jan Beulich ,
 "Alexander M. Merritt" 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 xen-devel@lists.xenproject.org
References: <3de09e4e2a3320e0f314803e349fbe6520d04b12.1743719892.git.alexander@edera.dev>
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On 04/04/2025 8:21 am, Jan Beulich wrote:
> On 04.04.2025 01:22, Alexander M. Merritt wrote:
>> The new toolchain baseline knows both the XSAVEOPT and CLWB instructions.
>>
>> Resolves: https://gitlab.com/xen-project/xen/-/work_items/205
>> Signed-off-by: Alexander M. Merritt 
>> ---
>>  xen/arch/x86/arch.mk              |  2 --
>>  xen/arch/x86/flushtlb.c           | 28 +---------------------------
>>  xen/arch/x86/include/asm/system.h |  7 -------
>>  3 files changed, 1 insertion(+), 36 deletions(-)
> For XSAVEOPT there's more work to do, even if not connected via HAVE_AS_XSAVEOPT.
> Look for "xsaveopt" (case-insensitively) in xstate.c. Imo (just like was asked
> for for the RDRAND counterpart patch) this wants doing all in one go.

I've got a different task pending for xsave.  It's a bit more involved
than simply dropping the -D's.

We'll get to it.

~Andrew


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Subject: Re: [PATCH] x86/amd: Convert wrmsr_amd_safe() to use asm goto()
To: Jan Beulich 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Xen-devel 
References: <20250403175744.1538469-1-andrew.cooper3@citrix.com>
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On 04/04/2025 8:48 am, Jan Beulich wrote:
> On 03.04.2025 19:57, Andrew Cooper wrote:
>> Bloat-o-meter reports:
>>
>>   add/remove: 0/0 grow/shrink: 0/2 up/down: 0/-29 (-29)
>>   Function                                     old     new   delta
>>   _probe_mask_msr                               99      94      -5
>>   init_amd                                    2418    2394     -24
>>
>> but that's because .fixup doesn't contain sized/typed symbols.  This also
>> drops two "mov -EFAULT, %reg; jmp ...;" sequences too.  The net saving is -50.
>>
>> wrmsr_amd_safe()'s return value is only checked against 0 (if at all), and
>> because of this, the compiler can now avoid manifesting 0/-EFAULT entirely,
>> and the %[fault] label simply lands on the right basic block.
>>
>> Convert to Xen style while rewriting.
>>
>> No functional change.
>>
>> Signed-off-by: Andrew Cooper 
>> ---
>> CC: Jan Beulich 
>> CC: Roger Pau Monné 
>>
>> Slightly RFC.  We use -EIO elsewhere for this purpose, and nothing in this
>> logic cares.
> {rd,wr}msr_safe() both use -EFAULT. What's "elsewhere" here?

Oh, that would be Linux.  Sorry, too much time spent staring at the same
logic in different codebases.

>
>> I was pleasently surprised by the manifestation of -EFAULT going away
>> entirely.
> I fear I don't understand this, given the -EFAULT is still there in the
> new code.

I meant about what the optimiser can do.  It hadn't occurred to me that
that was a valid transformation.

>
> Irrespective of these remarks:
> Reviewed-by: Jan Beulich 

Thanks.

~Andrew


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Date: Fri, 4 Apr 2025 12:28:33 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Stefano Stabellini 
Cc: xen-devel@lists.xenproject.org,
	Andrew Cooper ,
	Jan Beulich , jason.andryuk@amd.com,
	Xenia.Ragiadakou@amd.com, Alejandro.GarciaVallejo@amd.com
Subject: Re: [RFC] xen/x86: allow overlaps with non-RAM regions
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On Thu, Apr 03, 2025 at 06:01:42PM -0700, Stefano Stabellini wrote:
> On one Sapphire AMD x86 board, I see this:
> 
> 
> (XEN) [0000003943ca6ff2]  [00000000f0000000, 00000000f7ffffff] (reserved)
> (XEN) [00000039460886d9]  [00000000fd000000, 00000000ffffffff] (reserved)
> [...]
> (XEN) [    4.612235] 0000:02:00.0: not mapping BAR [fea00, fea03] invalid position
> 
> 
> Linux boots fine on this platform but Linux as Dom0 on Xen does not.
> This is because the pci_check_bar->is_memory_hole check fails due to the
> MMIO region overlapping with the EFI reserved region.

That's weird.  (Partially) the reason to not attempt to map such BAR
is that it should already be mapped, because at dom0 creation time all
reserved regions are added to the p2m (see arch_iommu_hwdom_init()).
If that's not the case we should figure out why this reserved region
is not added to dom0 p2m as part of arch_iommu_hwdom_init().

Can you paste the dom0 build output when booted with `iommu=verbose
dom0=pvh,verbose`?  Does using `dom0=pvh,verbose,pf-fixup` solve the
boot issue? (and can you paste the output if it does)

The issue with allowing BARs to modify p2m reserved regions is that if
memory decoding is disabled for the PCI device, the BAR will be
unmapped from the p2m, thus creating a hole in the p2m for a reserved
region, which would be undesirable IMO.

Thanks, Roger.


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Date: Fri, 4 Apr 2025 11:31:58 +0100
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Subject: Re: [PATCH v2 1/2] x86/amd: Add guest support for AMD TCE
To: Teddy Astie , xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
 Community Manager ,
 Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 
References: 
 <885867a86eb41fd78df24b6599312b54be8e20ca.1743756934.git.teddy.astie@vates.tech>
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From: Andrew Cooper 
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In-Reply-To: <885867a86eb41fd78df24b6599312b54be8e20ca.1743756934.git.teddy.astie@vates.tech>
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On 04/04/2025 10:49 am, Teddy Astie wrote:
> AMD Translation Cache Extension is a flag that can be enabled in the EFER MSR to optimize
> some TLB flushes. Expose this flag to guest if supported by hardware.
>
> AMD Architecture Developer Manual describe this feature as follow
>> Setting this bit to 1 changes how the INVLPG, INVLPGB, and INVPCID instructions operate
>> on TLB entries. When this bit is 0, these instructions remove the target PTE from the
>> TLB as well as all upper-level table entries that are cached in the TLB, whether or not
>> they are associated with the target PTE. When this bit is set, these instructions will
>> remove the target PTE and only those upper-level entries that lead to the target PTE in
>> the page table hierarchy, leaving unrelated upper-level entries intact. This may provide
>> a performance benefit.
> Signed-off-by: Teddy Astie 

You probably want to note that Linux 6.14(?) now uses this feature.

You definitely need to discuss that it's only in HAP VMs.  i.e. no PV,
and no Shadow.

Personally, I'd drop the quote from the APM.  You've already said "to
optimise some TLB flushes".  Anyone wanting to know details about the
feature needs to read the APM anyway.


> ---
>  CHANGELOG.md                                | 1 +
>  xen/arch/x86/hvm/hvm.c                      | 3 +++
>  xen/arch/x86/include/asm/msr-index.h        | 3 ++-
>  xen/include/public/arch-x86/cpufeatureset.h | 1 +
>  4 files changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/CHANGELOG.md b/CHANGELOG.md
> index 8f6afa5c85..dbfecefbd4 100644
> --- a/CHANGELOG.md
> +++ b/CHANGELOG.md
> @@ -18,6 +18,7 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/)
>     - Support PCI passthrough for HVM domUs when dom0 is PVH (note SR-IOV
>       capability usage is not yet supported on PVH dom0).
>     - Smoke tests for the FreeBSD Xen builds in Cirrus CI.
> +   - Guest support for AMD Translation Cache Extension feature.
>  
>  ### Removed
>  
> diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
> index 5950f3160f..184357b042 100644
> --- a/xen/arch/x86/hvm/hvm.c
> +++ b/xen/arch/x86/hvm/hvm.c
> @@ -959,6 +959,9 @@ const char *hvm_efer_valid(const struct vcpu *v, uint64_t value,
>      if ( (value & EFER_FFXSE) && !p->extd.ffxsr )
>          return "FFXSE without feature";
>  
> +    if ( (value & EFER_TCE) && !p->extd.tce )
> +        return "TCE without feature";
> +
>      if ( (value & EFER_AIBRSE) && !p->extd.auto_ibrs )
>          return "AutoIBRS without feature";
>  

Not for this patch, but it's probably time we made hvm_efer_valid() work
more like hvm_cr4_guest_valid_bits().

The only interesting bit is the specific diagnostic for LMA/LME/CR0
mismatch, and I don't think the complexity is worth it for just that.

> diff --git a/xen/arch/x86/include/asm/msr-index.h b/xen/arch/x86/include/asm/msr-index.h
> index 22d9e76e55..d8576aec1c 100644
> --- a/xen/arch/x86/include/asm/msr-index.h
> +++ b/xen/arch/x86/include/asm/msr-index.h
> @@ -200,11 +200,12 @@
>  #define  EFER_NXE                           (_AC(1, ULL) << 11) /* No Execute Enable */
>  #define  EFER_SVME                          (_AC(1, ULL) << 12) /* Secure Virtual Machine Enable */
>  #define  EFER_FFXSE                         (_AC(1, ULL) << 14) /* Fast FXSAVE/FXRSTOR */
> +#define  EFER_TCE                           (_AC(1, ULL) << 15) /* Translation Cache Extensions */
>  #define  EFER_AIBRSE                        (_AC(1, ULL) << 21) /* Automatic IBRS Enable */
>  
>  #define EFER_KNOWN_MASK \
>      (EFER_SCE | EFER_LME | EFER_LMA | EFER_NXE | EFER_SVME | EFER_FFXSE | \
> -     EFER_AIBRSE)
> +     EFER_TCE | EFER_AIBRSE)

Sorry, missed one aspect.  You need to filter TSE out in guest_efer()
for PV guests.

>  
>  #define MSR_STAR                            _AC(0xc0000081, U) /* legacy mode SYSCALL target */
>  #define MSR_LSTAR                           _AC(0xc0000082, U) /* long mode SYSCALL target */
> diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h
> index cc6e984a88..8182d2dbed 100644
> --- a/xen/include/public/arch-x86/cpufeatureset.h
> +++ b/xen/include/public/arch-x86/cpufeatureset.h
> @@ -170,6 +170,7 @@ XEN_CPUFEATURE(SKINIT,        3*32+12) /*   SKINIT/STGI instructions */
>  XEN_CPUFEATURE(WDT,           3*32+13) /*   Watchdog timer */
>  XEN_CPUFEATURE(LWP,           3*32+15) /*   Light Weight Profiling */
>  XEN_CPUFEATURE(FMA4,          3*32+16) /*A  4 operands MAC instructions */
> +XEN_CPUFEATURE(TCE,           3*32+17) /*H  Translation Cache Extension support */

I'd suggest dropping the "support".  It doesn't add anything here.

~Andrew


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Date: Fri, 4 Apr 2025 13:13:16 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Stefano Stabellini 
Cc: xen-devel@lists.xenproject.org,
	Andrew Cooper ,
	Doug Goldstein 
Subject: Re: [PATCH v1 08/11] ci: switch test kernel from 6.1.19 to 6.12.21
Message-ID: 
References: 
 <612750de76202364b749bda6cdd30c1daa81f79d.1743678257.git-series.marmarek@invisiblethingslab.com>
 
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Date: Fri, 4 Apr 2025 13:13:16 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Stefano Stabellini 
Cc: xen-devel@lists.xenproject.org,
	Andrew Cooper ,
	Doug Goldstein 
Subject: Re: [PATCH v1 08/11] ci: switch test kernel from 6.1.19 to 6.12.21

On Thu, Apr 03, 2025 at 05:40:07PM -0700, Stefano Stabellini wrote:
> On Thu, 3 Apr 2025, Marek Marczykowski-G=C3=B3recki wrote:
> > The jump is pretty big, but should be enough for a longer time. The
> > change right now is motivated adding new runner with AMD Zen4.
> >=20
> > Signed-off-by: Marek Marczykowski-G=C3=B3recki 
>=20
> As long as all the tests (including QEMU and xilinx-x86) pass:

I tested all I can (and it works), but I don't have access to the xilinx ru=
nner.

> Reviewed-by: Stefano Stabellini 

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Date: Fri, 4 Apr 2025 12:22:04 +0100
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Subject: Re: [PATCH v2 2/2] x86/amd: Enable TCE in Xen
To: Teddy Astie , xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
 Community Manager ,
 Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 
References: 
 <460c58c78e956ca62cc80356536dbdb45fa73779.1743756934.git.teddy.astie@vates.tech>
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From: Andrew Cooper 
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On 04/04/2025 10:49 am, Teddy Astie wrote:
> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
> index d70abb7e0c..0e2e7d012f 100644
> --- a/xen/arch/x86/setup.c
> +++ b/xen/arch/x86/setup.c
> @@ -2008,6 +2008,14 @@ void asmlinkage __init noreturn __start_xen(void)
>      if ( cpu_has_pku )
>          set_in_cr4(X86_CR4_PKE);
>  
> +    if ( cpu_has_tce )
> +    {
> +        printk("Enabling AMD TCE\n");
> +
> +        write_efer(read_efer() | EFER_TCE);
> +        trampoline_efer |= EFER_TCE;

This doesn't do what you think it does. (it writes into the copy of the
trampoline in .init, not the one placed in low memory).

You need to use bootsym() to get to the real trampoline.

I'm also not sure the prinkt() is useful.  It's about universal on AMD
systems.

~Andrew


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From: Roger Pau Monne 
To: Juergen Gross ,
	Roger Pau Monne ,
	xen-devel@lists.xenproject.org,
	linux-kernel@vger.kernel.org
Cc: Boris Ostrovsky ,
	Thomas Gleixner ,
	Ingo Molnar ,
	Borislav Petkov ,
	Dave Hansen ,
	x86@kernel.org,
	"H. Peter Anvin" ,
	Stefano Stabellini ,
	Oleksandr Tyshchenko 
Subject: [PATCH v2] x86/xen: fix balloon target initialization for PVH dom0
Date: Fri,  4 Apr 2025 15:34:58 +0200
Message-ID: <20250404133459.16125-1-roger.pau@citrix.com>
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PVH dom0 re-uses logic from PV dom0, in which RAM ranges not assigned to
dom0 are re-used as scratch memory to map foreign and grant pages.  Such
logic relies on reporting those unpopulated ranges as RAM to Linux, and
mark them as reserved.  This way Linux creates the underlying page
structures required for metadata management.

Such approach works fine on PV because the initial balloon target is
calculated using specific Xen data, that doesn't take into account the
memory type changes described above.  However on HVM and PVH the initial
balloon target is calculated using get_num_physpages(), and that function
does take into account the unpopulated RAM regions used as scratch space
for remote domain mappings.

This leads to PVH dom0 having an incorrect initial balloon target, which
causes malfunction (excessive memory freeing) of the balloon driver if the
dom0 memory target is later adjusted from the toolstack.

Fix this by using xen_released_pages to account for any pages that are part
of the memory map, but are already unpopulated when the balloon driver is
initialized.  This accounts for any regions used for scratch remote
mappings.

Take the opportunity to unify PV with PVH/HVM guests regarding the usage of
get_num_physpages(), as that avoids having to add different logic for PV vs
PVH in both balloon_add_regions() and arch_xen_unpopulated_init().

Much like a6aa4eb994ee, the code in this changeset should have been part of
38620fc4e893.

Fixes: a6aa4eb994ee ('xen/x86: add extra pages to unpopulated-alloc if available')
Signed-off-by: Roger Pau Monné 
---
Changes since v1:
 - Replace BUG_ON() with a WARN and failure to initialize the balloon
   driver.
---
 arch/x86/xen/enlighten.c |  7 +++++++
 drivers/xen/balloon.c    | 34 ++++++++++++++++++++++++----------
 2 files changed, 31 insertions(+), 10 deletions(-)

diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index 43dcd8c7badc..651bb206434c 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -466,6 +466,13 @@ int __init arch_xen_unpopulated_init(struct resource **res)
 			xen_free_unpopulated_pages(1, &pg);
 		}
 
+		/*
+		 * Account for the region being in the physmap but unpopulated.
+		 * The value in xen_released_pages is used by the balloon
+		 * driver to know how much of the physmap is unpopulated and
+		 * set an accurate initial memory target.
+		 */
+		xen_released_pages += xen_extra_mem[i].n_pfns;
 		/* Zero so region is not also added to the balloon driver. */
 		xen_extra_mem[i].n_pfns = 0;
 	}
diff --git a/drivers/xen/balloon.c b/drivers/xen/balloon.c
index 163f7f1d70f1..ee165f4f7fe6 100644
--- a/drivers/xen/balloon.c
+++ b/drivers/xen/balloon.c
@@ -675,7 +675,7 @@ void xen_free_ballooned_pages(unsigned int nr_pages, struct page **pages)
 }
 EXPORT_SYMBOL(xen_free_ballooned_pages);
 
-static void __init balloon_add_regions(void)
+static int __init balloon_add_regions(void)
 {
 	unsigned long start_pfn, pages;
 	unsigned long pfn, extra_pfn_end;
@@ -698,26 +698,38 @@ static void __init balloon_add_regions(void)
 		for (pfn = start_pfn; pfn < extra_pfn_end; pfn++)
 			balloon_append(pfn_to_page(pfn));
 
-		balloon_stats.total_pages += extra_pfn_end - start_pfn;
+		/*
+		 * Extra regions are accounted for in the physmap, but need
+		 * decreasing from current_pages to balloon down the initial
+		 * allocation, because they are already accounted for in
+		 * total_pages.
+		 */
+		if (extra_pfn_end - start_pfn >= balloon_stats.current_pages) {
+			WARN(1, "Extra pages underflow current target");
+			return -ERANGE;
+		}
+		balloon_stats.current_pages -= extra_pfn_end - start_pfn;
 	}
+
+	return 0;
 }
 
 static int __init balloon_init(void)
 {
 	struct task_struct *task;
+	int rc;
 
 	if (!xen_domain())
 		return -ENODEV;
 
 	pr_info("Initialising balloon driver\n");
 
-#ifdef CONFIG_XEN_PV
-	balloon_stats.current_pages = xen_pv_domain()
-		? min(xen_start_info->nr_pages - xen_released_pages, max_pfn)
-		: get_num_physpages();
-#else
-	balloon_stats.current_pages = get_num_physpages();
-#endif
+	if (xen_released_pages >= get_num_physpages()) {
+		WARN(1, "Released pages underflow current target");
+		return -ERANGE;
+	}
+
+	balloon_stats.current_pages = get_num_physpages() - xen_released_pages;
 	balloon_stats.target_pages  = balloon_stats.current_pages;
 	balloon_stats.balloon_low   = 0;
 	balloon_stats.balloon_high  = 0;
@@ -734,7 +746,9 @@ static int __init balloon_init(void)
 	register_sysctl_init("xen/balloon", balloon_table);
 #endif
 
-	balloon_add_regions();
+	rc = balloon_add_regions();
+	if (rc)
+		return rc;
 
 	task = kthread_run(balloon_thread, NULL, "xen-balloon");
 	if (IS_ERR(task)) {
-- 
2.48.1



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Date: Fri, 04 Apr 2025 09:39:30 -0400
From: Alexander Merritt 
To: Andrew Cooper 
Cc: xen-devel@lists.xenproject.org, Jan Beulich ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
Subject: Re: [PATCH] x86: drop XSAVEOPT and CLWB build flags
In-Reply-To: <9870999d-3a45-4c2b-a37b-2651e4d53c3b@citrix.com>
References: <3de09e4e2a3320e0f314803e349fbe6520d04b12.1743719892.git.alexander@edera.dev>
 
 <9870999d-3a45-4c2b-a37b-2651e4d53c3b@citrix.com>
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On 2025-04-03 19:34, Andrew Cooper wrote:
> On 04/04/2025 12:28 am, Andrew Cooper wrote:
> Also, I forgot to write in the ticket, clflushopt wants similar
> treatment, even if there isn't an outward define for it.  I think the
> following two hunks should do:
> 
> ~Andrew
> 
> diff --git a/xen/arch/x86/flushtlb.c b/xen/arch/x86/flushtlb.c
> index 18748b2bc805..ef30ef546336 100644
> --- a/xen/arch/x86/flushtlb.c
> +++ b/xen/arch/x86/flushtlb.c
> @@ -287,7 +287,7 @@ void cache_flush(const void *addr, unsigned int 
> size)
>           * of letting the alternative framework fill the gap by
> appending nops.
>           */
>          alternative_io("ds; clflush %[p]",
> -                       "data16 clflush %[p]", /* clflushopt */
> +                       "clflushopt %[p]",

Agree on these changes. However, I see branch staging uses 
alternative_input and the below /* no outputs */ does not exist.

>                         X86_FEATURE_CLFLUSHOPT,
>                         /* no outputs */,
>                         [p] "m" (*(const char *)(addr)));
> diff --git a/xen/arch/x86/include/asm/system.h
> b/xen/arch/x86/include/asm/system.h
> index 73cb16ca68d6..6f5b6d502911 100644
> --- a/xen/arch/x86/include/asm/system.h
> +++ b/xen/arch/x86/include/asm/system.h
> @@ -23,7 +23,7 @@ static inline void clflush(const void *p)
>  
>  static inline void clflushopt(const void *p)
>  {
> -    asm volatile ( "data16 clflush %0" :: "m" (*(const char *)p) );
> +    asm volatile ( "clflushopt %0" :: "m" (*(const char *)p) );
>  }
>  
>  static inline void clwb(const void *p)


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Date: Fri, 4 Apr 2025 15:43:25 +0200
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Subject: Re: [PATCH v2] x86/xen: fix balloon target initialization for PVH
 dom0
To: Roger Pau Monne , xen-devel@lists.xenproject.org,
 linux-kernel@vger.kernel.org
Cc: Boris Ostrovsky ,
 Thomas Gleixner , Ingo Molnar ,
 Borislav Petkov , Dave Hansen ,
 x86@kernel.org, "H. Peter Anvin" ,
 Stefano Stabellini ,
 Oleksandr Tyshchenko 
References: <20250404133459.16125-1-roger.pau@citrix.com>
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From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= 
To: Roger Pau Monne , xen-devel@lists.xenproject.org,
 linux-kernel@vger.kernel.org
Cc: Boris Ostrovsky ,
 Thomas Gleixner , Ingo Molnar ,
 Borislav Petkov , Dave Hansen ,
 x86@kernel.org, "H. Peter Anvin" ,
 Stefano Stabellini ,
 Oleksandr Tyshchenko 
Message-ID: <64e63ce5-7af1-466e-aa62-7dba89519891@suse.com>
Subject: Re: [PATCH v2] x86/xen: fix balloon target initialization for PVH
 dom0
References: <20250404133459.16125-1-roger.pau@citrix.com>
In-Reply-To: <20250404133459.16125-1-roger.pau@citrix.com>

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From: "Anthony PERARD" 
Subject: =?utf-8?Q?Re:=20[XEN=20PATCH=20v2=201/1]=20tools/libxl:=20search=20PATH=20for=20QEMU=20if=20`QEMU=5FXEN=5FPATH`=20is=20not=20absolute?=
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To: Hongbo 
Cc: xen-devel@lists.xenproject.org, "Juergen Gross" 
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On Mon, Mar 31, 2025 at 12:03:04AM +0800, Hongbo wrote:
> `QEMU_XEN_PATH` will be configured as `qemu-system-i386` with no clue where, if
> `--with-system-qemu` is set without giving a path (as matched in the case `yes`
> but not `*`). However, the existence of the executable is checked by `access()`,
> that will not look for anywhere in $PATH but the current directory. And since it
> is possible for `qemu-system-i386` (or any other configured values) to be
> executed from PATH later, we'd better find that in PATH and return the full path
> for the caller to check against.
> 
> Signed-off-by: Hongbo 
> ---
> v2:
>  - Identify absolute/relative paths with their first char (being `/` or not).
>  - Put the case inside a block `{}` to address `clang` warnings about the new
>    variable.
>  - Avoid unnecessary string duplications.
>  - Parity of using `{}` block on both sides of `if` statements.
>  - Use `libxl__abs_path()` to get absolute paths.

Reviewed-by: Anthony PERARD 

Thanks,

-- 

 | Vates

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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From: "Teddy Astie" 
Subject: =?utf-8?Q?[PATCH=20v3=202/2]=20x86/amd:=20Enable=20TCE=20in=20Xen?=
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Aside exposing this flag to guests, Xen can also make use of it
to reduce the cost of some TLB flushes. Enable this flag if supported
by hardware.

Signed-off-by: Teddy Astie 
---
v2:
 - Add changelog entry
 - use trampoline_efer
 - use cpu_has_tce instead of opencoded boot_cpu_has(X86_FEATURE_TCE)
v3:
 - drop message
 - use bootsym for modifying trampoline_efer
---
 CHANGELOG.md                          | 2 +-
 xen/arch/x86/include/asm/cpufeature.h | 1 +
 xen/arch/x86/setup.c                  | 6 ++++++
 3 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index dbfecefbd4..375905e68a 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -18,7 +18,7 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/)
    - Support PCI passthrough for HVM domUs when dom0 is PVH (note SR-IOV
      capability usage is not yet supported on PVH dom0).
    - Smoke tests for the FreeBSD Xen builds in Cirrus CI.
-   - Guest support for AMD Translation Cache Extension feature.
+   - Guest and Xen support for AMD Translation Cache Extension feature.
 
 ### Removed
 
diff --git a/xen/arch/x86/include/asm/cpufeature.h b/xen/arch/x86/include/asm/cpufeature.h
index 05399fb9c9..ab6d07b767 100644
--- a/xen/arch/x86/include/asm/cpufeature.h
+++ b/xen/arch/x86/include/asm/cpufeature.h
@@ -114,6 +114,7 @@ static inline bool boot_cpu_has(unsigned int feat)
 #define cpu_has_xop             boot_cpu_has(X86_FEATURE_XOP)
 #define cpu_has_skinit          boot_cpu_has(X86_FEATURE_SKINIT)
 #define cpu_has_fma4            boot_cpu_has(X86_FEATURE_FMA4)
+#define cpu_has_tce             boot_cpu_has(X86_FEATURE_TCE)
 #define cpu_has_tbm             boot_cpu_has(X86_FEATURE_TBM)
 
 /* CPUID level 0x0000000D:1.eax */
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index d70abb7e0c..9b1924ad05 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -2008,6 +2008,12 @@ void asmlinkage __init noreturn __start_xen(void)
     if ( cpu_has_pku )
         set_in_cr4(X86_CR4_PKE);
 
+    if ( cpu_has_tce )
+    {
+        write_efer(read_efer() | EFER_TCE);
+        bootsym(trampoline_efer) |= EFER_TCE;
+    }
+
     if ( opt_invpcid && cpu_has_invpcid )
         use_invpcid = true;
 
-- 
2.47.2



Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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From: "Teddy Astie" 
Subject: =?utf-8?Q?[PATCH=20v3=201/2]=20x86/amd:=20Add=20guest=20support=20for=20AMD=20TCE?=
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AMD Translation Cache Extension is a flag that can be enabled in the EFER MSR to optimize
some TLB flushes. Expose this flag to guest if supported by hardware.

Only expose this feature to HAP-enabled guests. Guests with shadow paging guests have
their TLB flush operations intercepted and handled separately, without taking account
to this flag. PV guest follows Xen TLB flush behavior.

Signed-off-by: Teddy Astie 
---
v3:
 - hide from PV guests
 - review commit description
---
 CHANGELOG.md                                | 1 +
 xen/arch/x86/hvm/hvm.c                      | 3 +++
 xen/arch/x86/include/asm/msr-index.h        | 3 ++-
 xen/arch/x86/pv/emul-priv-op.c              | 4 ++--
 xen/include/public/arch-x86/cpufeatureset.h | 1 +
 5 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index 8f6afa5c85..dbfecefbd4 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -18,6 +18,7 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/)
    - Support PCI passthrough for HVM domUs when dom0 is PVH (note SR-IOV
      capability usage is not yet supported on PVH dom0).
    - Smoke tests for the FreeBSD Xen builds in Cirrus CI.
+   - Guest support for AMD Translation Cache Extension feature.
 
 ### Removed
 
diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index 5950f3160f..184357b042 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -959,6 +959,9 @@ const char *hvm_efer_valid(const struct vcpu *v, uint64_t value,
     if ( (value & EFER_FFXSE) && !p->extd.ffxsr )
         return "FFXSE without feature";
 
+    if ( (value & EFER_TCE) && !p->extd.tce )
+        return "TCE without feature";
+
     if ( (value & EFER_AIBRSE) && !p->extd.auto_ibrs )
         return "AutoIBRS without feature";
 
diff --git a/xen/arch/x86/include/asm/msr-index.h b/xen/arch/x86/include/asm/msr-index.h
index 22d9e76e55..d8576aec1c 100644
--- a/xen/arch/x86/include/asm/msr-index.h
+++ b/xen/arch/x86/include/asm/msr-index.h
@@ -200,11 +200,12 @@
 #define  EFER_NXE                           (_AC(1, ULL) << 11) /* No Execute Enable */
 #define  EFER_SVME                          (_AC(1, ULL) << 12) /* Secure Virtual Machine Enable */
 #define  EFER_FFXSE                         (_AC(1, ULL) << 14) /* Fast FXSAVE/FXRSTOR */
+#define  EFER_TCE                           (_AC(1, ULL) << 15) /* Translation Cache Extensions */
 #define  EFER_AIBRSE                        (_AC(1, ULL) << 21) /* Automatic IBRS Enable */
 
 #define EFER_KNOWN_MASK \
     (EFER_SCE | EFER_LME | EFER_LMA | EFER_NXE | EFER_SVME | EFER_FFXSE | \
-     EFER_AIBRSE)
+     EFER_TCE | EFER_AIBRSE)
 
 #define MSR_STAR                            _AC(0xc0000081, U) /* legacy mode SYSCALL target */
 #define MSR_LSTAR                           _AC(0xc0000082, U) /* long mode SYSCALL target */
diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c
index 70150c2722..531228b2da 100644
--- a/xen/arch/x86/pv/emul-priv-op.c
+++ b/xen/arch/x86/pv/emul-priv-op.c
@@ -857,8 +857,8 @@ static uint64_t guest_efer(const struct domain *d)
 {
     uint64_t val;
 
-    /* Hide unknown bits, and unconditionally hide SVME and AIBRSE from guests. */
-    val = read_efer() & EFER_KNOWN_MASK & ~(EFER_SVME | EFER_AIBRSE);
+    /* Hide unknown bits, and unconditionally hide SVME, TCE and AIBRSE from guests. */
+    val = read_efer() & EFER_KNOWN_MASK & ~(EFER_SVME | EFER_TCE | EFER_AIBRSE);
     /*
      * Hide the 64-bit features from 32-bit guests.  SCE has
      * vendor-dependent behaviour.
diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h
index cc6e984a88..8182d2dbed 100644
--- a/xen/include/public/arch-x86/cpufeatureset.h
+++ b/xen/include/public/arch-x86/cpufeatureset.h
@@ -170,6 +170,7 @@ XEN_CPUFEATURE(SKINIT,        3*32+12) /*   SKINIT/STGI instructions */
 XEN_CPUFEATURE(WDT,           3*32+13) /*   Watchdog timer */
 XEN_CPUFEATURE(LWP,           3*32+15) /*   Light Weight Profiling */
 XEN_CPUFEATURE(FMA4,          3*32+16) /*A  4 operands MAC instructions */
+XEN_CPUFEATURE(TCE,           3*32+17) /*H  Translation Cache Extension support */
 XEN_CPUFEATURE(NODEID_MSR,    3*32+19) /*   NodeId MSR */
 XEN_CPUFEATURE(TBM,           3*32+21) /*A  trailing bit manipulations */
 XEN_CPUFEATURE(TOPOEXT,       3*32+22) /*   topology extensions CPUID leafs */
-- 
2.47.2



Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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From: "Teddy Astie" 
Subject: =?utf-8?Q?Re:=20[PATCH=20v3=201/2]=20x86/amd:=20Add=20guest=20support=20for=20AMD=20TCE?=
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Sorry I forgot to run add_maintainers on this patch series, so this 
serie got only sent to xen-devel@lists.xenproject.org without the proper CC.

Teddy


Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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On Thu, Mar 27, 2025 at 03:59:16PM -0700, Stefano Stabellini wrote:
> I was suggesting to create a file under /tmp instead to keep the source
> directory cleaner,

There's an easy way to keep the source directory *extra clean* when
doing hypervisor build, like we are doing here for randoconfig, that is:
out-of-tree build!

> and also because I don't think it is an issue to add
> files to /tmp and not clean them because they get removed when the
> container exits. Isn't it the case? Locally it looks like each
> containers gets its own /tmp that is cleaned after exit.

Sorry, I tend to think that those script could be use outside of the CI
or containers, and /tmp can have a lot of different configuration, so
it's better to clean after oneself when possible.

As for running containers locally, maybe it's faster to reuse a
container instead of creating a new one from an image, which mean /tmp
is probably not cleaned on exit. But I guess people usuasly do `docker
run --rm` or use `containerize` which does the same.

> So my preference is to use mktemp and *not* clean the tmp file on exit.
> 
> If you think we have to clean the tmp file on exit, then let's go with
> your xen/allrandom.config.tmp approach as I would prefer to avoid the
> "trap" command to keep the sources simpler.

So, is that an Ack on my original patch?

Cheers,

-- 

Anthony Perard | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v2] xen/riscv: Increase XEN_VIRT_SIZE
Date: Fri,  4 Apr 2025 18:04:00 +0200
Message-ID: <808d1b346bc90dde38fd19a6b92ab78d78e42936.1743766932.git.oleksii.kurochko@gmail.com>
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A randconfig job failed with the following issue:
  riscv64-linux-gnu-ld: Xen too large for early-boot assumptions

The reason is that enabling the UBSAN config increased the size of
the Xen binary.

Increase XEN_VIRT_SIZE to reserve enough space, allowing both UBSAN
and GCOV to be enabled together, with some slack for future growth.

Reported-by: Andrew Cooper 
Signed-off-by: Oleksii Kurochko 
---
Changes in v2:
 - Incerease XEN_VIRT_SIZE to 16 Mb to cover also the case if 2M mappings will
   be used for .text (rx), .rodata(r), and .data (rw).
 - Update layout table in config.h.
 - s/xen_virt_starn_vpn/xen_virt_start_vpn
 - Update BUILD_BUG_ON(... != MB(8)) check to "... > GB(1)".
 - Update definition of PGTBL_INITIAL_COUNT and the comment above.
---
 xen/arch/riscv/include/asm/config.h |  8 ++++----
 xen/arch/riscv/include/asm/mm.h     | 12 +++++++++---
 xen/arch/riscv/mm.c                 | 25 ++++++++++++++++---------
 3 files changed, 29 insertions(+), 16 deletions(-)

diff --git a/xen/arch/riscv/include/asm/config.h b/xen/arch/riscv/include/asm/config.h
index 7141bd9e46..41b8410d10 100644
--- a/xen/arch/riscv/include/asm/config.h
+++ b/xen/arch/riscv/include/asm/config.h
@@ -41,11 +41,11 @@
  * Start addr          | End addr         | Slot       | area description
  * ============================================================================
  *                   .....                 L2 511          Unused
- *  0xffffffffc0a00000  0xffffffffc0bfffff L2 511          Fixmap
+ *  0xffffffffc1800000  0xffffffffc1afffff L2 511          Fixmap
  *                   ..... ( 2 MB gap )
- *  0xffffffffc0400000  0xffffffffc07fffff L2 511          FDT
+ *  0xffffffffc1200000  0xffffffffc15fffff L2 511          FDT
  *                   ..... ( 2 MB gap )
- *  0xffffffffc0000000  0xffffffffc01fffff L2 511          Xen
+ *  0xffffffffc0000000  0xffffffffc0ffffff L2 511          Xen
  *                   .....                 L2 510          Unused
  *  0x3200000000        0x7f7fffffff       L2 200-509      Direct map
  *                   .....                 L2 199          Unused
@@ -78,7 +78,7 @@
 
 #define GAP_SIZE                MB(2)
 
-#define XEN_VIRT_SIZE           MB(2)
+#define XEN_VIRT_SIZE           MB(16)
 
 #define BOOT_FDT_VIRT_START     (XEN_VIRT_START + XEN_VIRT_SIZE + GAP_SIZE)
 #define BOOT_FDT_VIRT_SIZE      MB(4)
diff --git a/xen/arch/riscv/include/asm/mm.h b/xen/arch/riscv/include/asm/mm.h
index 4035cd400a..511e75c6d4 100644
--- a/xen/arch/riscv/include/asm/mm.h
+++ b/xen/arch/riscv/include/asm/mm.h
@@ -43,13 +43,19 @@ static inline void *maddr_to_virt(paddr_t ma)
  */
 static inline unsigned long virt_to_maddr(unsigned long va)
 {
+    const unsigned int vpn1_shift = PAGETABLE_ORDER + PAGE_SHIFT;
+    const unsigned long va_vpn = va >> vpn1_shift;
+    const unsigned long xen_virt_start_vpn =
+        _AC(XEN_VIRT_START, UL) >> vpn1_shift;
+    const unsigned long xen_virt_end_vpn =
+        xen_virt_start_vpn + ((XEN_VIRT_SIZE >> vpn1_shift) - 1);
+
     if ((va >= DIRECTMAP_VIRT_START) &&
         (va <= DIRECTMAP_VIRT_END))
         return directmapoff_to_maddr(va - directmap_virt_start);
 
-    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(2));
-    ASSERT((va >> (PAGETABLE_ORDER + PAGE_SHIFT)) ==
-           (_AC(XEN_VIRT_START, UL) >> (PAGETABLE_ORDER + PAGE_SHIFT)));
+    BUILD_BUG_ON(XEN_VIRT_SIZE > GB(1));
+    ASSERT((va_vpn >= xen_virt_start_vpn) && (va_vpn <= xen_virt_end_vpn));
 
     /* phys_offset = load_start - XEN_VIRT_START */
     return phys_offset + va;
diff --git a/xen/arch/riscv/mm.c b/xen/arch/riscv/mm.c
index f2bf279bac..256afdaaa3 100644
--- a/xen/arch/riscv/mm.c
+++ b/xen/arch/riscv/mm.c
@@ -31,20 +31,27 @@ unsigned long __ro_after_init phys_offset; /* = load_start - XEN_VIRT_START */
 #define LOAD_TO_LINK(addr) ((unsigned long)(addr) - phys_offset)
 
 /*
- * It is expected that Xen won't be more then 2 MB.
+ * It is expected that Xen won't be more then XEN_VIRT_SIZE MB.
  * The check in xen.lds.S guarantees that.
- * At least 3 page tables (in case of Sv39 ) are needed to cover 2 MB.
- * One for each page level table with PAGE_SIZE = 4 Kb.
  *
- * One L0 page table can cover 2 MB(512 entries of one page table * PAGE_SIZE).
+ * Root page table is shared with the initial mapping and is declared
+ * separetely. (look at stage1_pgtbl_root)
  *
- * It might be needed one more page table in case when Xen load address
- * isn't 2 MB aligned.
+ * An amount of page tables between root page table and L0 page table
+ * (in the case of Sv39 it covers L1 table):
+ *   (CONFIG_PAGING_LEVELS - 2) are needed for an identity mapping and
+ *   the same amount are needed for Xen.
  *
- * CONFIG_PAGING_LEVELS page tables are needed for the identity mapping,
- * except that the root page table is shared with the initial mapping
+ * An amount of L0 page tables:
+ *   (512 entries of one L0 page table covers 2MB == 1<> XEN_PT_LEVEL_SHIFT(1) are needed for Xen and
+ *   one L0 is needed for indenity mapping.
+ *
+ *   It might be needed one more page table in case when Xen load
+ *   address isn't 2 MB aligned.
  */
-#define PGTBL_INITIAL_COUNT ((CONFIG_PAGING_LEVELS - 1) * 2 + 1)
+#define PGTBL_INITIAL_COUNT ((CONFIG_PAGING_LEVELS - 2) * 2 + \
+                             (XEN_VIRT_SIZE >> XEN_PT_LEVEL_SHIFT(1)) + 2)
 
 pte_t __section(".bss.page_aligned") __aligned(PAGE_SIZE)
 stage1_pgtbl_root[PAGETABLE_ENTRIES];
-- 
2.49.0



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Subject: Re: [PATCH v2] x86/xen: fix balloon target initialization for PVH
 dom0
To: Roger Pau Monne , Juergen Gross ,
 xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org
Cc: Boris Ostrovsky ,
 Thomas Gleixner , Ingo Molnar ,
 Borislav Petkov , Dave Hansen ,
 x86@kernel.org, "H. Peter Anvin" ,
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 Oleksandr Tyshchenko 
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On 4/4/25 06:34, Roger Pau Monne wrote:
> Much like a6aa4eb994ee, the code in this changeset should have been part of
> 38620fc4e893.
> 
> Fixes: a6aa4eb994ee ('xen/x86: add extra pages to unpopulated-alloc if available')
> Signed-off-by: Roger Pau Monné 

I don't see a cc:stable@ on there. Was there a reason for that or did
you just leave it off by accident?


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Date: Fri, 4 Apr 2025 20:26:37 +0200
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Subject: Re: [PATCH v2] x86/xen: fix balloon target initialization for PVH
 dom0
To: Dave Hansen ,
 Roger Pau Monne , xen-devel@lists.xenproject.org,
 linux-kernel@vger.kernel.org
Cc: Boris Ostrovsky ,
 Thomas Gleixner , Ingo Molnar ,
 Borislav Petkov , Dave Hansen ,
 x86@kernel.org, "H. Peter Anvin" ,
 Stefano Stabellini ,
 Oleksandr Tyshchenko 
References: <20250404133459.16125-1-roger.pau@citrix.com>
 
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From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= 
To: Dave Hansen ,
 Roger Pau Monne , xen-devel@lists.xenproject.org,
 linux-kernel@vger.kernel.org
Cc: Boris Ostrovsky ,
 Thomas Gleixner , Ingo Molnar ,
 Borislav Petkov , Dave Hansen ,
 x86@kernel.org, "H. Peter Anvin" ,
 Stefano Stabellini ,
 Oleksandr Tyshchenko 
Message-ID: <42a55a38-ad95-465b-b557-95c99e12377f@suse.com>
Subject: Re: [PATCH v2] x86/xen: fix balloon target initialization for PVH
 dom0
References: <20250404133459.16125-1-roger.pau@citrix.com>
 
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Date: Fri, 04 Apr 2025 23:21:51 +0000
To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com
Subject: [PATCH v4] x86/domain: revisit logging in arch_domain_create()
Message-ID: <20250404232145.1252544-1-dmukhin@ford.com>
Feedback-ID: 123220910:user:proton
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From: Denis Mukhin 

Use %pd in all logs issued from arch_domain_create() and reword some of the
messages.

Also, expand error message in arch_domain_create() under !emulation_flags_o=
k()
case to help debugging.

Signed-off-by: Denis Mukhin 
---
Changes since v3:
- re-formatted log messages
- shortened message text where possible
---
 xen/arch/x86/domain.c | 23 ++++++++++++++---------
 1 file changed, 14 insertions(+), 9 deletions(-)

diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
index 4989600627..0db0567877 100644
--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -791,13 +791,14 @@ int arch_domain_create(struct domain *d,
     {
         if ( !opt_allow_unsafe )
         {
-            printk(XENLOG_G_ERR "Xen does not allow DomU creation on this =
CPU"
-                   " for security reasons.\n");
+            printk(XENLOG_G_ERR
+                   "%pd: cannot create domain on this CPU due to security =
reasons\n",
+                   d);
             return -EPERM;
         }
         printk(XENLOG_G_WARNING
-               "Dom%d may compromise security on this CPU.\n",
-               d->domain_id);
+               "%pd: may compromise security on this CPU\n",
+               d);
     }
=20
     emflags =3D config->arch.emulation_flags;
@@ -807,16 +808,20 @@ int arch_domain_create(struct domain *d,
=20
     if ( emflags & ~XEN_X86_EMU_ALL )
     {
-        printk(XENLOG_G_ERR "d%d: Invalid emulation bitmap: %#x\n",
-               d->domain_id, emflags);
+        printk(XENLOG_G_ERR
+               "%pd: invalid emulation bitmap: %#x\n",
+               d, emflags);
         return -EINVAL;
     }
=20
     if ( !emulation_flags_ok(d, emflags) )
     {
-        printk(XENLOG_G_ERR "d%d: Xen does not allow %s domain creation "
-               "with the current selection of emulators: %#x\n",
-               d->domain_id, is_hvm_domain(d) ? "HVM" : "PV", emflags);
+        printk(XENLOG_G_ERR
+               "%pd: cannot create %s %sdomain with emulators: %#x\n",
+               d,
+               is_hvm_domain(d) ? "HVM" : "PV",
+               is_hardware_domain(d) ? "hardware " : "",
+               emflags);
         return -EOPNOTSUPP;
     }
     d->arch.emulation_flags =3D emflags;
--=20
2.34.1




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Subject: Re: [PATCH v2 01/15] x86/boot: introduce boot domain
To: Jan Beulich 
Cc: jason.andryuk@amd.com, christopher.w.clark@gmail.com,
 stefano.stabellini@amd.com, Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 xen-devel@lists.xenproject.org
References: <20241226165740.29812-1-dpsmith@apertussolutions.com>
 <20241226165740.29812-2-dpsmith@apertussolutions.com>
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On 1/30/25 08:45, Jan Beulich wrote:
> On 26.12.2024 17:57, Daniel P. Smith wrote:
>> @@ -596,9 +597,10 @@ int __init dom0_setup_permissions(struct domain *d)
>>       return rc;
>>   }
>>   
>> -int __init construct_dom0(struct boot_info *bi, struct domain *d)
>> +int __init construct_dom0(struct boot_domain *bd)
> 
> Pointer-to-const? Domain construction should only be consuming data
> supplied, I expect.
> 
>> --- /dev/null
>> +++ b/xen/arch/x86/include/asm/bootdomain.h
> 
> Maybe boot-domain.h? Or was that suggested before and discarded for
> whatever reason?
> 
>> @@ -0,0 +1,28 @@
>> +/* SPDX-License-Identifier: GPL-2.0-or-later */
>> +/*
>> + * Copyright (c) 2024 Apertus Solutions, LLC
>> + * Author: Daniel P. Smith 
>> + * Copyright (c) 2024 Christopher Clark 
>> + */
>> +
>> +#ifndef __XEN_X86_BOOTDOMAIN_H__
>> +#define __XEN_X86_BOOTDOMAIN_H__
>> +
>> +struct boot_domain {
>> +    struct boot_module *kernel;
>> +    struct boot_module *ramdisk;
> 
> "ramdisk" is Linux-centric, I think. Can we name this more generically?
> "module" perhaps, despite it then being the same name as we use for the
> modules Xen is passed?

Ramdisk is not a linux-centric, take OpenBSD for example [1]. Calling 
the field "module" is a recipe for confusion. Especially considering 
that we are more or less providing a lightweight version of the 
toolstack interface which use the name ramdisk.

[1] https://openbsd.fandom.com/wiki/Creating_a_custom_OpenBSD_RAM_disk

> Also, are consumers of this struct supposed to be able to modify what
> the pointers point to? I'd expect they aren't, in which case const will
> want adding here, too.
> 
> Jan



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Feedback-ID: i1568416f:Fastmail
Date: Sat, 5 Apr 2025 02:28:19 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Jan Beulich , Doug Goldstein ,
	Stefano Stabellini ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH v1 01/11] ci: prevent grub unpacking initramfs
Message-ID: 
References: 
 
 
 
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--Z9yLbrtw/D6qN8wq
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Date: Sat, 5 Apr 2025 02:28:19 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Jan Beulich , Doug Goldstein ,
	Stefano Stabellini ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH v1 01/11] ci: prevent grub unpacking initramfs

On Thu, Apr 03, 2025 at 12:39:11PM +0100, Andrew Cooper wrote:
> On 03/04/2025 12:29 pm, Jan Beulich wrote:
> > On 03.04.2025 13:04, Marek Marczykowski-G=C3=B3recki wrote:
> >> It fails on larger initramfs (~250MB one) and sometimes even smaller
> >> depending on memory size/memory map, let Linux do it.
> > Iirc grub only unpacks gzip-ed modules, so wouldn't a yet better approa=
ch
> > be to use a better compressing algorithm, which simply as a side effect
> > would keep grub from decompressing it, while at the same time moving
> > farther away from any critical boundaries?
>=20
> Yes and no.
>=20
> This is going to change anyway when I (or a delgee) moves initrd
> generation from the test step itself into the test artefacts repo.

Out of curiosity, I tried this:
https://gitlab.com/xen-project/people/marmarek/xen/-/commit/51b5fde81680620=
6e6e0c72ec0146c5ab3da4351
pipeline:
https://gitlab.com/xen-project/people/marmarek/xen/-/pipelines/1753304751

It avoids repacking base alpine initrd, but it still needs to pack
per-job stuff (test script, but also toolstack). The gains are not
great, that step still takes over a minute. The overall job time went
down by just 40-50s (for example from 6m50s to 6m03s). This isn't very
surprising, because the base initrd.cpio.gz is 60MB and the final one is
over 200MB, so the part that was needlessly re-compressed is about 30%.
The numbers checks out, as the (debug) build artifacts zip is about
150MB.

One further idea would be to produce cpio.gz archive as part of the
build artifact, to avoid zip (used by gitlab for artifacts) -> cpio.gz
recompression. But that either makes build artifacts bigger for every
job, or need setting a variable for jobs that are used later for tests.
Unless we decide to store toolstack _only_ as cpio.gz in artifacts?

I tried the latter idea here:
https://gitlab.com/xen-project/people/marmarek/xen/-/commit/a4774213d83ca05=
c0b0b0fff80e49cf3aa32b67b
pipeline:
https://gitlab.com/xen-project/people/marmarek/xen/-/pipelines/1753312631

This helped quite a bit more. The 1m of compressing initrd is gone now.
Compressing remaining test-specific files and concatenating it all
together takes 2-3s. Now that 6m50s job is down to 3m40s. I'm not
exactly sure where that extra minute went (maybe related to number of
files in the build artifact? Fetching/extracting artifacts seems to be
faster a bit), but those times are not very consistent anyway, so it
could be also just random fluctuation.=20

Looking further at the test log, some time is used for fetching
artifacts. I've looked into gitlab docs if those can be cached on the
runner, but I haven't found a solution that would really help (you can
cache arbitrary paths, including artifacts, but it doesn't prevent
re-downloading them and unpacking over the cached version...).
So, I'll stop here, polish the above patches and submit them in v2 of
this series.

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Date: Sat, 05 Apr 2025 01:25:07 +0000
To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, jbeulich@suse.com, roger.pau@citrix.com, dmukhin@ford.com
Subject: [PATCH v3] x86/emulate: Remove HAVE_AS_RDRAND and HAVE_AS_RDSEED
Message-ID: <20250405012417.3108759-1-dmukhin@ford.com>
Feedback-ID: 123220910:user:proton
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From: Denis Mukhin 

The new toolchain baseline knows the rdrand/rdseed instructions,
no need to carry the workaround in the code.

Resolves: https://gitlab.com/xen-project/xen/-/work_items/208
Signed-off-by: Denis Mukhin 
---
Changes since v2:
- updated arch_get_random()
- Link to v2: https://lore.kernel.org/xen-devel/20250403182250.3329498-6-dm=
ukhin@ford.com/
---
 xen/arch/x86/arch.mk              |  2 --
 xen/arch/x86/include/asm/random.h |  2 +-
 xen/arch/x86/x86_emulate/0fc7.c   | 15 +++++----------
 3 files changed, 6 insertions(+), 13 deletions(-)

diff --git a/xen/arch/x86/arch.mk b/xen/arch/x86/arch.mk
index 3bbaee2a44..5577bf6241 100644
--- a/xen/arch/x86/arch.mk
+++ b/xen/arch/x86/arch.mk
@@ -10,9 +10,7 @@ CFLAGS +=3D -msoft-float
=20
 $(call cc-options-add,CFLAGS,CC,$(EMBEDDED_EXTRA_CFLAGS))
 $(call cc-option-add,CFLAGS,CC,-Wnested-externs)
-$(call as-option-add,CFLAGS,CC,"rdrand %eax",-DHAVE_AS_RDRAND)
 $(call as-option-add,CFLAGS,CC,"xsaveopt (%rax)",-DHAVE_AS_XSAVEOPT)
-$(call as-option-add,CFLAGS,CC,"rdseed %eax",-DHAVE_AS_RDSEED)
 $(call as-option-add,CFLAGS,CC,"clwb (%rax)",-DHAVE_AS_CLWB)
 $(call as-option-add,CFLAGS,CC,".equ \"x\"$(comma)1",-DHAVE_AS_QUOTED_SYM)
 $(call as-option-add,CFLAGS,CC,"movdiri %rax$(comma)(%rax)",-DHAVE_AS_MOVD=
IR)
diff --git a/xen/arch/x86/include/asm/random.h b/xen/arch/x86/include/asm/r=
andom.h
index 9e1fe0bc1d..e1c1c765e1 100644
--- a/xen/arch/x86/include/asm/random.h
+++ b/xen/arch/x86/include/asm/random.h
@@ -8,7 +8,7 @@ static inline unsigned int arch_get_random(void)
     unsigned int val =3D 0;
=20
     if ( cpu_has(¤t_cpu_data, X86_FEATURE_RDRAND) )
-        asm volatile ( ".byte 0x0f,0xc7,0xf0" : "+a" (val) );
+        asm volatile ( "rdrand %0" : "=3Da" (val) );
=20
     return val;
 }
diff --git a/xen/arch/x86/x86_emulate/0fc7.c b/xen/arch/x86/x86_emulate/0fc=
7.c
index 5268d5cafd..58c8f79501 100644
--- a/xen/arch/x86/x86_emulate/0fc7.c
+++ b/xen/arch/x86/x86_emulate/0fc7.c
@@ -32,7 +32,6 @@ int x86emul_0fc7(struct x86_emulate_state *s,
             return X86EMUL_UNRECOGNIZED;
=20
         case 6: /* rdrand */
-#ifdef HAVE_AS_RDRAND
             generate_exception_if(s->vex.pfx >=3D vex_f3, X86_EXC_UD);
             host_and_vcpu_must_have(rdrand);
             *dst =3D s->ea;
@@ -43,12 +42,12 @@ int x86emul_0fc7(struct x86_emulate_state *s,
                       : "=3Dr" (dst->val), ASM_FLAG_OUT("=3D@ccc", "=3Dqm"=
) (carry) );
                 break;
             default:
-# ifdef __x86_64__
+#ifdef __x86_64__
                 asm ( "rdrand %k0" ASM_FLAG_OUT(, "; setc %1")
                       : "=3Dr" (dst->val), ASM_FLAG_OUT("=3D@ccc", "=3Dqm"=
) (carry) );
                 break;
             case 8:
-# endif
+#endif
                 asm ( "rdrand %0" ASM_FLAG_OUT(, "; setc %1")
                       : "=3Dr" (dst->val), ASM_FLAG_OUT("=3D@ccc", "=3Dqm"=
) (carry) );
                 break;
@@ -57,9 +56,6 @@ int x86emul_0fc7(struct x86_emulate_state *s,
             if ( carry )
                 regs->eflags |=3D X86_EFLAGS_CF;
             break;
-#else
-            return X86EMUL_UNIMPLEMENTED;
-#endif
=20
         case 7: /* rdseed / rdpid */
             if ( s->vex.pfx =3D=3D vex_f3 ) /* rdpid */
@@ -77,7 +73,7 @@ int x86emul_0fc7(struct x86_emulate_state *s,
                 dst->bytes =3D 4;
                 break;
             }
-#ifdef HAVE_AS_RDSEED
+
             generate_exception_if(s->vex.pfx >=3D vex_f3, X86_EXC_UD);
             host_and_vcpu_must_have(rdseed);
             *dst =3D s->ea;
@@ -88,12 +84,12 @@ int x86emul_0fc7(struct x86_emulate_state *s,
                       : "=3Dr" (dst->val), ASM_FLAG_OUT("=3D@ccc", "=3Dqm"=
) (carry) );
                 break;
             default:
-# ifdef __x86_64__
+#ifdef __x86_64__
                 asm ( "rdseed %k0" ASM_FLAG_OUT(, "; setc %1")
                       : "=3Dr" (dst->val), ASM_FLAG_OUT("=3D@ccc", "=3Dqm"=
) (carry) );
                 break;
             case 8:
-# endif
+#endif
                 asm ( "rdseed %0" ASM_FLAG_OUT(, "; setc %1")
                       : "=3Dr" (dst->val), ASM_FLAG_OUT("=3D@ccc", "=3Dqm"=
) (carry) );
                 break;
@@ -102,7 +98,6 @@ int x86emul_0fc7(struct x86_emulate_state *s,
             if ( carry )
                 regs->eflags |=3D X86_EFLAGS_CF;
             break;
-#endif
         }
     }
     else
--=20
2.34.1




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Date: Sat, 05 Apr 2025 01:27:57 +0000
To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, jbeulich@suse.com, roger.pau@citrix.com, dmukhin@ford.com
Subject: [PATCH v3] x86/vmx: Rework VMX wrappers using `asm goto()`
Message-ID: <20250405012729.3109108-1-dmukhin@ford.com>
Feedback-ID: 123220910:user:proton
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From: Denis Mukhin 

Improve error handling in VMX wrappers by switching to `asm goto()` where
possible.

Resolves: https://gitlab.com/xen-project/xen/-/work_items/210
Signed-off-by: Denis Mukhin 
---
Changes since v2:
- dropped vmread changes
- checked \n\t formatting
- Link to v2: https://lore.kernel.org/xen-devel/20250403182250.3329498-7-dm=
ukhin@ford.com/
---
 xen/arch/x86/include/asm/hvm/vmx/vmx.h | 122 +++++++++++++------------
 1 file changed, 64 insertions(+), 58 deletions(-)

diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmx.h b/xen/arch/x86/include/=
asm/hvm/vmx/vmx.h
index affb3a8bd6..6aa6e1f212 100644
--- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h
+++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h
@@ -294,28 +294,30 @@ extern uint8_t posted_intr_vector;
=20
 static always_inline void __vmptrld(u64 addr)
 {
-    asm volatile ( "vmptrld %0\n\t"
-                   /* CF=3D=3D1 or ZF=3D=3D1 --> BUG() */
-                   UNLIKELY_START(be, vmptrld)
-                   _ASM_BUGFRAME_TEXT(0)
-                   UNLIKELY_END_SECTION
-                   :
-                   : "m" (addr),
-                     _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, =
0)
-                   : "memory" );
+    asm goto ( "vmptrld %[addr]\n\t"
+               "jbe %l[vmfail]\n"
+               :
+               : [addr] "m" (addr)
+               : "memory"
+               : vmfail );
+    return;
+
+ vmfail:
+    BUG();
 }
=20
 static always_inline void __vmpclear(u64 addr)
 {
-    asm volatile ( "vmclear %0\n\t"
-                   /* CF=3D=3D1 or ZF=3D=3D1 --> BUG() */
-                   UNLIKELY_START(be, vmclear)
-                   _ASM_BUGFRAME_TEXT(0)
-                   UNLIKELY_END_SECTION
-                   :
-                   : "m" (addr),
-                     _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, =
0)
-                   : "memory" );
+    asm goto ( "vmclear %[addr]\n\t"
+               "jbe %l[vmfail]\n"
+               :
+               : [addr] "m" (addr)
+               : "memory"
+               : vmfail );
+    return;
+
+ vmfail:
+    BUG();
 }
=20
 static always_inline void __vmread(unsigned long field, unsigned long *val=
ue)
@@ -332,14 +334,16 @@ static always_inline void __vmread(unsigned long fiel=
d, unsigned long *value)
=20
 static always_inline void __vmwrite(unsigned long field, unsigned long val=
ue)
 {
-    asm volatile ( "vmwrite %1, %0\n"
-                   /* CF=3D=3D1 or ZF=3D=3D1 --> BUG() */
-                   UNLIKELY_START(be, vmwrite)
-                   _ASM_BUGFRAME_TEXT(0)
-                   UNLIKELY_END_SECTION
-                   :
-                   : "r" (field) , "rm" (value),
-                     _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, =
0) );
+    asm goto ( "vmwrite %[value], %[field]\n\t"
+               "jbe %l[vmfail]\n"
+               :
+               : [field] "r" (field), [value] "rm" (value)
+               :
+               : vmfail );
+    return;
+
+ vmfail:
+    BUG();
 }
=20
 static inline enum vmx_insn_errno vmread_safe(unsigned long field,
@@ -367,22 +371,22 @@ static inline enum vmx_insn_errno vmread_safe(unsigne=
d long field,
 static inline enum vmx_insn_errno vmwrite_safe(unsigned long field,
                                                unsigned long value)
 {
-    unsigned long ret =3D VMX_INSN_SUCCEED;
-    bool fail_invalid, fail_valid;
+    unsigned long ret;
=20
-    asm volatile ( "vmwrite %[value], %[field]\n\t"
-                   ASM_FLAG_OUT(, "setc %[invalid]\n\t")
-                   ASM_FLAG_OUT(, "setz %[valid]\n\t")
-                   : ASM_FLAG_OUT("=3D@ccc", [invalid] "=3Drm") (fail_inva=
lid),
-                     ASM_FLAG_OUT("=3D@ccz", [valid] "=3Drm") (fail_valid)
-                   : [field] "r" (field),
-                     [value] "rm" (value) );
+    asm goto ( "vmwrite %[value], %[field]\n\t"
+               "jc %l[vmfail_invalid]\n\t"
+               "jz %l[vmfail_error]\n"
+               :
+               : [field] "r" (field), [value] "rm" (value)
+               :
+               : vmfail_invalid, vmfail_error );
+    return VMX_INSN_SUCCEED;
=20
-    if ( unlikely(fail_invalid) )
-        ret =3D VMX_INSN_FAIL_INVALID;
-    else if ( unlikely(fail_valid) )
-        __vmread(VM_INSTRUCTION_ERROR, &ret);
+ vmfail_invalid:
+    return VMX_INSN_FAIL_INVALID;
=20
+ vmfail_error:
+    __vmread(VM_INSTRUCTION_ERROR, &ret);
     return ret;
 }
=20
@@ -400,15 +404,16 @@ static always_inline void __invept(unsigned long type=
, uint64_t eptp)
          !cpu_has_vmx_ept_invept_single_context )
         type =3D INVEPT_ALL_CONTEXT;
=20
-    asm volatile ( "invept %0, %1\n\t"
-                   /* CF=3D=3D1 or ZF=3D=3D1 --> BUG() */
-                   UNLIKELY_START(be, invept)
-                   _ASM_BUGFRAME_TEXT(0)
-                   UNLIKELY_END_SECTION
-                   :
-                   : "m" (operand), "r" (type),
-                     _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, =
0)
-                   : "memory" );
+    asm goto ( "invept %[operand], %[type]\n\t"
+               "jbe %l[vmfail]\n"
+               :
+               : [operand] "m" (operand), [type] "r" (type)
+               : "memory"
+               : vmfail );
+    return;
+
+ vmfail:
+    BUG();
 }
=20
 static always_inline void __invvpid(unsigned long type, u16 vpid, u64 gva)
@@ -420,16 +425,17 @@ static always_inline void __invvpid(unsigned long typ=
e, u16 vpid, u64 gva)
     }  operand =3D {vpid, 0, gva};
=20
     /* Fix up #UD exceptions which occur when TLBs are flushed before VMXO=
N. */
-    asm volatile ( "1: invvpid %0, %1\n\t"
-                   /* CF=3D=3D1 or ZF=3D=3D1 --> BUG() */
-                   UNLIKELY_START(be, invvpid)
-                   _ASM_BUGFRAME_TEXT(0)
-                   UNLIKELY_END_SECTION "\n"
-                   "2:" _ASM_EXTABLE(1b, 2b)
-                   :
-                   : "m" (operand), "r" (type),
-                     _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, =
0)
-                   : "memory" );
+    asm goto ( "1: invvpid %[operand], %[type]\n\t"
+               "   jbe %l[vmfail]\n"
+               "2:" _ASM_EXTABLE(1b, 2b)
+               :
+               : [operand] "m" (operand), [type] "r" (type)
+               : "memory"
+               : vmfail );
+    return;
+
+ vmfail:
+    BUG();
 }
=20
 static inline void ept_sync_all(void)
--=20
2.34.1




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From: Volodymyr Babchuk 
To: Jan Beulich 
CC: Andrew Cooper , Anthony PERARD
	, Michal Orzel , Julien
 Grall , =?iso-8859-1?Q?Roger_Pau_Monn=E9?=
	, Stefano Stabellini ,
	"xen-devel@lists.xenproject.org" 
Subject: Re: [PATCH v3 3/3] xen: debug: gcov: add condition coverage support
Thread-Topic: [PATCH v3 3/3] xen: debug: gcov: add condition coverage support
Thread-Index: AQHboqPjQYlXeZrAE0u+zEMqLR0ZhQ==
Date: Sat, 5 Apr 2025 03:30:49 +0000
Message-ID: <87mscvffo8.fsf@epam.com>
References: <20250401011744.2267367-1-volodymyr_babchuk@epam.com>
	<20250401011744.2267367-4-volodymyr_babchuk@epam.com>
	<7281b7d8-ba7b-4658-82f1-a63d66c1baff@suse.com>
In-Reply-To: <7281b7d8-ba7b-4658-82f1-a63d66c1baff@suse.com> (Jan Beulich's
	message of "Thu, 3 Apr 2025 09:30:21 +0200")
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Hi Jan,

Jan Beulich  writes:

> On 01.04.2025 03:17, Volodymyr Babchuk wrote:
>> --- a/xen/Kconfig
>> +++ b/xen/Kconfig
>> @@ -41,6 +41,11 @@ config CC_SPLIT_SECTIONS
>>  config CC_HAS_UBSAN
>>  	def_bool $(cc-option,-fsanitize=3Dundefined)
>> =20
>> +# Compiler supports -fcondition-coverage aka MC/DC
>> +config CC_HAS_MCDC
>> +	def_bool $(cc-option,-fcondition-coverage)
>> +
>> +
>
> Nit: No double blank lines please.
>
> Also, just to clarify - until the use of Kconfig (alone) for things like
> this is properly resolved one way or another, I'm not going to approve
> such changes (but I'm also not going to veto them). My proposal [1] is
> still pending with no resolution, nor any counter-proposals.

I checked your proposal, but I am not sure how it maps for this
particular use case. In your example

> config XEN_SHSTK
>        bool "Supervisor Shadow Stacks"
>        default HAS_AS_CET_SS

The default value will be "y" which is desired, but in case
of CONDITION_COVERAGE, the default value should be "n". Are you
suggesting to put

ifeq ($(CONFIG_CONDITION_COVERAGE)x$(CONFIG_CC_HAS_MCDC), yx)
   $(warning Your compiler does not support condition coverage)
endif

somewhere in Rules.mk ?


>> --- a/xen/Rules.mk
>> +++ b/xen/Rules.mk
>> @@ -138,6 +138,9 @@ ifeq ($(CONFIG_CC_IS_CLANG),y)
>>      COV_FLAGS :=3D -fprofile-instr-generate -fcoverage-mapping
>>  else
>>      COV_FLAGS :=3D -fprofile-arcs -ftest-coverage
>> +ifeq ($(CONFIG_CONDITION_COVERAGE),y)
>> +    COV_FLAGS +=3D -fcondition-coverage
>> +endif
>>  endif
>
> Personally I find ifeq() uses like this unhelpful, and would prefer
>
> COV_FLAGS-$(CONFIG_CONDITION_COVERAGE) +=3D -fcondition-coverage
> together with an eventual
>
> COV_FLAGS +=3D $(COV_FLAGS-y)
>
> (if we don't already have one).

I did in this way:

--- a/xen/Rules.mk
+++ b/xen/Rules.mk
@@ -133,18 +133,19 @@ $(filter %.init.o,$(obj-y) $(obj-bin-y) $(extra-y)): =
CFLAGS-y +=3D -DINIT_SECTIONS
=20
 non-init-objects =3D $(filter-out %.init.o, $(obj-y) $(obj-bin-y) $(extra-=
y))
=20
-ifeq ($(CONFIG_COVERAGE),y)
 ifeq ($(CONFIG_CC_IS_CLANG),y)
-    COV_FLAGS :=3D -fprofile-instr-generate -fcoverage-mapping
+    cov-flags-$(CONFIG_COVERAGE) :=3D -fprofile-instr-generate -fcoverage-=
mapping
 else
-    COV_FLAGS :=3D -fprofile-arcs -ftest-coverage
+    cov-flags-$(CONFIG_COVERAGE) :=3D -fprofile-arcs -ftest-coverage
+    cov-flags-$(CONFIG_CONDITION_COVERAGE) +=3D -fcondition-coverage
 endif
=20
-# Reset COV_FLAGS in cases where an objects has another one as prerequisit=
e
+# Reset cov-flags-y in cases where an objects has another one as prerequis=
ite
 $(nocov-y) $(filter %.init.o, $(obj-y) $(obj-bin-y) $(extra-y)): \
-    COV_FLAGS :=3D
+    cov-flags-y :=3D
=20
-$(non-init-objects): _c_flags +=3D $(COV_FLAGS)
+$(non-init-objects): _c_flags +=3D $(cov-flags-y)
 endif
=20

I hope you don't mind having both changes (COV_FLAGS -> cov_flags-y and
introduction of CONFIG_CONDITION_COVERAGE) in the same patch. With
correct commit message, of course.

--=20
WBR, Volodymyr=


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Cc: Hongbo ,
	Anthony PERARD ,
	Juergen Gross 
Subject: [XEN PATCH v2 RESEND 1/1] tools/libxl: search PATH for QEMU if `QEMU_XEN_PATH` is not absolute
Date: Sat,  5 Apr 2025 19:10:55 +0800
Message-Id: <20250405111055.98611-1-hehongbo@mail.com>
X-Mailer: git-send-email 2.39.5 (Apple Git-154)
In-Reply-To: <20241223031753.13709-1-hehongbo@mail.com>
References: <20241223031753.13709-1-hehongbo@mail.com>
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 jmWO0ys47BJ/OQMfirr7QVmP2a60=

`QEMU_XEN_PATH` will be configured as `qemu-system-i386` with no clue wher=
e, if
`--with-system-qemu` is set without giving a path (as matched in the case =
`yes`
but not `*`). However, the existence of the executable is checked by `acce=
ss()`,
that will not look for anywhere in $PATH but the current directory. And si=
nce it
is possible for `qemu-system-i386` (or any other configured values) to be
executed from PATH later, we'd better find that in PATH and return the ful=
l path
for the caller to check against.

Signed-off-by: Hongbo 
Reviewed-by: Anthony PERARD 
=2D--
No changes since v2. Resending to add `Reviewed-by` from Anthony PERARD.

Best regards,
Hongbo
=2D--
CC: Anthony PERARD 
CC: Juergen Gross 
=2D--
 tools/libs/light/libxl_dm.c | 38 +++++++++++++++++++++++++++++++++++--
 1 file changed, 36 insertions(+), 2 deletions(-)

diff --git a/tools/libs/light/libxl_dm.c b/tools/libs/light/libxl_dm.c
index b193a5dc37..8f0bbd5d64 100644
=2D-- a/tools/libs/light/libxl_dm.c
+++ b/tools/libs/light/libxl_dm.c
@@ -331,9 +331,43 @@ const char *libxl__domain_device_model(libxl__gc *gc,
         case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL:
             dm =3D libxl__abs_path(gc, "qemu-dm", libxl__private_bindir_p=
ath());
             break;
-        case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
-            dm =3D qemu_xen_path(gc);
+        case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN: {
+            const char *configured_dm =3D qemu_xen_path(gc);
+            if (configured_dm[0] =3D=3D '/')
+            {
+                dm =3D configured_dm;
+            }
+            else
+            {
+                const char *path_env =3D getenv("PATH");
+                if (!path_env)
+                {
+                    dm =3D configured_dm;
+                }
+                else
+                {
+                    char *path_dup =3D libxl__strdup(gc, path_env);
+                    char *saveptr;
+
+                    char *path =3D strtok_r(path_dup, ":", &saveptr);
+                    dm =3D NULL;
+                    while (path)
+                    {
+                        char *candidate =3D libxl__abs_path(gc, configure=
d_dm, path);
+                        if (access(candidate, X_OK) =3D=3D 0)
+                        {
+                            dm =3D candidate;
+                            break;
+                        }
+                        path =3D strtok_r(NULL, ":", &saveptr);
+                    }
+
+                    if (!dm)
+                        dm =3D configured_dm;
+                }
+            }
             break;
+        }
         default:
             LOG(ERROR, "invalid device model version %d",
                 info->device_model_version);
=2D-
2.39.5 (Apple Git-154)



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Date: Sat, 5 Apr 2025 20:45:30 +0800
From: kernel test robot 
To: Roger Pau Monne , Juergen Gross ,
	xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org
Cc: oe-kbuild-all@lists.linux.dev,
	Boris Ostrovsky ,
	Thomas Gleixner ,
	Ingo Molnar , Borislav Petkov ,
	Dave Hansen , x86@kernel.org,
	"H. Peter Anvin" ,
	Stefano Stabellini ,
	Oleksandr Tyshchenko 
Subject: Re: [PATCH v2] x86/xen: fix balloon target initialization for PVH
 dom0
Message-ID: <202504052022.avvx45LI-lkp@intel.com>
References: <20250404133459.16125-1-roger.pau@citrix.com>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
In-Reply-To: <20250404133459.16125-1-roger.pau@citrix.com>

Hi Roger,

kernel test robot noticed the following build errors:

[auto build test ERROR on xen-tip/linux-next]
[also build test ERROR on tip/x86/core linus/master v6.14 next-20250404]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Roger-Pau-Monne/x86-xen-fix-balloon-target-initialization-for-PVH-dom0/20250404-214218
base:   https://git.kernel.org/pub/scm/linux/kernel/git/xen/tip.git linux-next
patch link:    https://lore.kernel.org/r/20250404133459.16125-1-roger.pau%40citrix.com
patch subject: [PATCH v2] x86/xen: fix balloon target initialization for PVH dom0
config: x86_64-buildonly-randconfig-001-20250405 (https://download.01.org/0day-ci/archive/20250405/202504052022.avvx45LI-lkp@intel.com/config)
compiler: gcc-12 (Debian 12.2.0-14) 12.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250405/202504052022.avvx45LI-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot 
| Closes: https://lore.kernel.org/oe-kbuild-all/202504052022.avvx45LI-lkp@intel.com/

All errors (new ones prefixed by >>):

   ld: drivers/xen/balloon.o: in function `balloon_init':
>> drivers/xen/balloon.c:727: undefined reference to `xen_released_pages'


vim +727 drivers/xen/balloon.c

   716	
   717	static int __init balloon_init(void)
   718	{
   719		struct task_struct *task;
   720		int rc;
   721	
   722		if (!xen_domain())
   723			return -ENODEV;
   724	
   725		pr_info("Initialising balloon driver\n");
   726	
 > 727		if (xen_released_pages >= get_num_physpages()) {
   728			WARN(1, "Released pages underflow current target");
   729			return -ERANGE;
   730		}
   731	
   732		balloon_stats.current_pages = get_num_physpages() - xen_released_pages;
   733		balloon_stats.target_pages  = balloon_stats.current_pages;
   734		balloon_stats.balloon_low   = 0;
   735		balloon_stats.balloon_high  = 0;
   736		balloon_stats.total_pages   = balloon_stats.current_pages;
   737	
   738		balloon_stats.schedule_delay = 1;
   739		balloon_stats.max_schedule_delay = 32;
   740		balloon_stats.retry_count = 1;
   741		balloon_stats.max_retry_count = 4;
   742	

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki


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Date: Sat, 5 Apr 2025 23:55:56 +0800
From: kernel test robot 
To: Roger Pau Monne , Juergen Gross ,
	xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org
Cc: llvm@lists.linux.dev, oe-kbuild-all@lists.linux.dev,
	Boris Ostrovsky ,
	Thomas Gleixner ,
	Ingo Molnar , Borislav Petkov ,
	Dave Hansen , x86@kernel.org,
	"H. Peter Anvin" ,
	Stefano Stabellini ,
	Oleksandr Tyshchenko 
Subject: Re: [PATCH v2] x86/xen: fix balloon target initialization for PVH
 dom0
Message-ID: <202504052301.dMtJILzp-lkp@intel.com>
References: <20250404133459.16125-1-roger.pau@citrix.com>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
In-Reply-To: <20250404133459.16125-1-roger.pau@citrix.com>

Hi Roger,

kernel test robot noticed the following build errors:

[auto build test ERROR on xen-tip/linux-next]
[also build test ERROR on tip/x86/core linus/master v6.14 next-20250404]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Roger-Pau-Monne/x86-xen-fix-balloon-target-initialization-for-PVH-dom0/20250404-214218
base:   https://git.kernel.org/pub/scm/linux/kernel/git/xen/tip.git linux-next
patch link:    https://lore.kernel.org/r/20250404133459.16125-1-roger.pau%40citrix.com
patch subject: [PATCH v2] x86/xen: fix balloon target initialization for PVH dom0
config: x86_64-buildonly-randconfig-003-20250405 (https://download.01.org/0day-ci/archive/20250405/202504052301.dMtJILzp-lkp@intel.com/config)
compiler: clang version 20.1.2 (https://github.com/llvm/llvm-project 58df0ef89dd64126512e4ee27b4ac3fd8ddf6247)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250405/202504052301.dMtJILzp-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot 
| Closes: https://lore.kernel.org/oe-kbuild-all/202504052301.dMtJILzp-lkp@intel.com/

All errors (new ones prefixed by >>):

>> ld.lld: error: undefined symbol: xen_released_pages
   >>> referenced by balloon.c
   >>>               drivers/xen/balloon.o:(balloon_init) in archive vmlinux.a
   >>> referenced by balloon.c
   >>>               drivers/xen/balloon.o:(balloon_init) in archive vmlinux.a

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki


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From: =?UTF-8?q?Petr=20Van=C4=9Bk?= 
To: linux-kernel@vger.kernel.org
Cc: Thomas Gleixner ,
	x86@kernel.org,
	xen-devel@lists.xenproject.org,
	=?UTF-8?q?Petr=20Van=C4=9Bk?= ,
	stable@vger.kernel.org
Subject: [PATCH 1/1] x86/cpu/topology: Don't limit CPUs to 1 for Xen PV guests due to disabled APIC
Date: Sat,  5 Apr 2025 20:16:50 +0200
Message-ID: <20250405181650.22827-2-arkamar@atlas.cz>
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In-Reply-To: <20250405181650.22827-1-arkamar@atlas.cz>
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Xen PV guests in DomU have APIC disabled by design, which causes
topology_apply_cmdline_limits_early() to limit the number of possible
CPUs to 1, regardless of the configured number of vCPUs.

This is a regression introduced in version 6.9 in commit 7c0edad3643f
("x86/cpu/topology: Rework possible CPU management") which added an
early check that limits CPUs if apic_is_disabled, without accounting for
the fact that Xen PV guests always disable APIC even when SMP is
supported.

This patch fixes the issue by skipping the apic_is_disabled check for
Xen PV guests, allowing them to boot with the full set of configured vCPUs.

Fixes: 7c0edad3643f ("x86/cpu/topology: Rework possible CPU management")
Cc: Thomas Gleixner 
Cc: x86@kernel.org
Cc: xen-devel@lists.xenproject.org
Cc: stable@vger.kernel.org # 6.9+
Signed-off-by: Petr Vaněk 
---
 arch/x86/kernel/cpu/topology.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/cpu/topology.c b/arch/x86/kernel/cpu/topology.c
index 01456236a6dd..10aa7f471ec9 100644
--- a/arch/x86/kernel/cpu/topology.c
+++ b/arch/x86/kernel/cpu/topology.c
@@ -428,8 +428,13 @@ void __init topology_apply_cmdline_limits_early(void)
 {
 	unsigned int possible = nr_cpu_ids;
 
-	/* 'maxcpus=0' 'nosmp' 'nolapic' */
-	if (!setup_max_cpus || apic_is_disabled)
+	/* 'maxcpus=0' 'nosmp' 'nolapic'
+	 *
+	 * The apic_is_disabled check is ignored for Xen PV domains because Xen
+	 * disables ACPI in unprivileged PV DomU guests, which would otherwise limit
+	 * CPUs to 1, even if multiple vCPUs were configured.
+	 */
+	if (!setup_max_cpus || (!xen_pv_domain() && apic_is_disabled))
 		possible = 1;
 
 	/* 'possible_cpus=N' */
-- 
2.48.1



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From: =?UTF-8?q?Petr=20Van=C4=9Bk?= 
To: linux-kernel@vger.kernel.org
Cc: Thomas Gleixner ,
	x86@kernel.org,
	xen-devel@lists.xenproject.org,
	=?UTF-8?q?Petr=20Van=C4=9Bk?= 
Subject: [PATCH 0/1] x86/topology: Fix regression limiting Xen PV DomU CPUs to 1
Date: Sat,  5 Apr 2025 20:16:49 +0200
Message-ID: <20250405181650.22827-1-arkamar@atlas.cz>
X-Mailer: git-send-email 2.48.1
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Hi,

I have discovered a regression in recent kernels that causes Xen PV DomU
guests to be limited to a single vCPU, despite multiple vCPUs being
configured. This issue does no occur in version 6.6.

After bisecting, I identified the regression was introduce in kernel 6.9
in a commit that limits the number of possible CPUs to 1 when APIC is
disabled [1]. However, Xen PV guests always disable APIC, leading to
incorrect CPU limitation.

Following patch resolves this issue by skipping apic_is_disabled check
for Xen PV guests.

I believe it makes sense to backport this fix to stable versions, so I'm
Ccing stable@vger.kernel.org (as per [2]). Note that there is a minor
conflict in both applicable versions (6.12 and 6.13). Please, let me
know if a different approach would be preferred.

[1] https://lore.kernel.org/r/20240213210252.290098853@linutronix.de
[2] https://docs.kernel.org/process/stable-kernel-rules.html#option-1

Thanks,
Petr

Petr Vaněk (1):
  x86/cpu/topology: Don't limit CPUs to 1 for Xen PV guests due to
    disabled APIC

 arch/x86/kernel/cpu/topology.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

-- 
2.48.1



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To: Petr =?utf-8?Q?Van=C4=9Bk?= ,
 linux-kernel@vger.kernel.org
Cc: x86@kernel.org, xen-devel@lists.xenproject.org, Petr =?utf-8?Q?Van?=
 =?utf-8?Q?=C4=9Bk?=
 , stable@vger.kernel.org, Juergen Gross
 , Andrew Cooper 
Subject: Re: [PATCH 1/1] x86/cpu/topology: Don't limit CPUs to 1 for Xen PV
 guests due to disabled APIC
In-Reply-To: <20250405181650.22827-2-arkamar@atlas.cz>
References: <20250405181650.22827-1-arkamar@atlas.cz>
 <20250405181650.22827-2-arkamar@atlas.cz>
Date: Sun, 06 Apr 2025 12:08:29 +0200
Message-ID: <87ecy5wqjm.ffs@tglx>
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On Sat, Apr 05 2025 at 20:16, Petr Van=C4=9Bk wrote:

> Xen PV guests in DomU have APIC disabled by design, which causes
> topology_apply_cmdline_limits_early() to limit the number of possible
> CPUs to 1, regardless of the configured number of vCPUs.

PV guests have a APIC emulation and there is no code which actually
disables the APIC by design unconditionally. There is one way though,
which disables the APIC indirectly.

xen_arch_setup() disables ACPI, which in turn causes acpi_mps_check() to
return 1, which disables the APIC. This only happens when the kernel
configuration has:

     CONFIG_X86_MPPARSE=3Dn
     CONFIG_ACPI=3Dy

If you enable MPPARSE the problem goes away, no?

> +	/* 'maxcpus=3D0' 'nosmp' 'nolapic'
> +	 *
> +	 * The apic_is_disabled check is ignored for Xen PV domains because Xen
> +	 * disables ACPI in unprivileged PV DomU guests, which would otherwise =
limit
> +	 * CPUs to 1, even if multiple vCPUs were configured.

This is the wrong place as it invalidates the effect of 'nolapic' on the
kernel command line for XEN PV.

You actually explain in the comment that XEN disables ACPI, so why are
you slapping this xen check into this code instead of doing the obvious
and prevent acpi_mps_check() to cause havoc?

Thanks,

        tglx


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Subject: Re: [QUESTION] Minimal Xen Configuration
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Stefano, Nicola

> On Wed, 2 Apr 2025, Nicola Vetrini wrote:
>> On 2025-03-28 07:43, Kwon, Gihwan wrote:
>>> Dear Xen Community,
>>>=20
>>> I hope this message finds you well.
>>>=20
>>> I have heard that there exists a minimal Xen configuration optimized
>>> for safety-critical products, particularly in automotive applications,
>>> with the code size reduced to approximately 50k SLOC.
>>>=20
>>> Could anyone provide guidance or point me to relevant resources
>>> regarding this minimal Xen configuration? Any insights or references
>>> would be greatly appreciated.
>>>=20
>>> Thank you in advance for your assistance.
>>>=20
>>> Best regards,
>>> Gihwan Kwon
>>=20
>> Hello,
>>=20
>> I am part of the team that provides static analysis for Xen, mainly
>> towards the objective to make Xen compliant with MISRA C guidelines. As
>> part of that effort, a minimal Xen configuration has been defined (for
>> Arm and x86_64) at [1], which is the one currently analyzed for static
>> analysis for each commit [2]. It starts from the default configuration
>> for the architecture (i.e., make defconfig) and then turns on or off
>> various Kconfig options, as specified by EXTRA_XEN_CONFIG.
>>=20
>> @Stefano Stabellini (Cc'ed) is the main driving force behind the Xen
>> certification effort for automotive, therefore he's probably the best
>> person to approach to get more information on this matter.
>=20
> Thanks Nicola. In addition to what Nicola wrote, there is an outstanding
> activity to further reduce the code size by adding more kconfig options.
> There are a couple of patch series on the list right now to that effect.
>=20
> https://marc.info/?l=3Dxen-devel&m=3D173745442831026
>=20
> Last year we ran some experiments and for ARM we should be able to go
> below 35K LOC. The tools measuring LOC are very imprecise as they do not
> account for #ifdefs and kconfig options. So we switched to text binary
> size for measurements as it is more accurate. do not account for kconfig
> options and #ifdefs. Hence, we switch to using text size as size
> measurement for Xen. One of the figure was XXX.

Thank you for sharing information regarding the current minimal config
and additional activities. I have reviewed the configuration applied to the
 CI and have a question.
=20
Currently, `CONFIG_SCHED_RTDS` is enabled instead of `CONFIG_SCHED_CREDIT2`
and `CONFIG_SCHED_CREDIT`. Is this because ARINC653 scheduler cannot be
used as default scheduler, as well as, rt scheduler is smaller than=20
credit2 or credit scheduler?

- Gihwan




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Date: Mon, 7 Apr 2025 08:40:55 +0200
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From: Jan Beulich 
Subject: Xen 4.19.2 released
To: xen-announce@lists.xenproject.org
Cc: "xen-devel@lists.xenproject.org" 
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All,

we're pleased to announce the release of another bug fixing Xen version.

Xen 4.19.2 is available from its git repository
http://xenbits.xen.org/gitweb/?p=xen.git;a=shortlog;h=refs/heads/stable-4.19
(tag RELEASE-4.19.2) or (eventually) from the XenProject download page
https://xenproject.org/resources/downloads/.

We recommend all users of the 4.19 stable series to update to this latest
point release.

Regards, Jan


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From: Harshvardhan Jha 
To: jgross@suse.com, sstabellini@kernel.org, boris.ostrovsky@oracle.com
Cc: harshvardhan.j.jha@oracle.com, xen-devel@lists.xenproject.org,
        iommu@lists.linux-foundation.org, iommu@lists.linux.dev,
        stable@vger.kernel.org
Subject: [PATCH 5.15.y 0/1] Manual Backport of 099606a7b2d5 to 5.15
Date: Mon,  7 Apr 2025 00:02:34 -0700
Message-ID: <20250407070235.121187-1-harshvardhan.j.jha@oracle.com>
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The patch 099606a7b2d5 didn't cleanly apply to 5.15 due to the
significant difference in codebases.

I've tried to manually bring it back to 5.15 via some minor conflict
resolution but also invoking the newly introduced API using inverted
logic as the conditional statements present in 5.15 are the opposite of
those in 6.1 xen/swiotlib.

Harshvardhan Jha (1):
  xen/swiotlb: relax alignment requirements

 drivers/xen/swiotlb-xen.c | 18 +++++++++++-------
 1 file changed, 11 insertions(+), 7 deletions(-)

-- 
2.47.1



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From: Harshvardhan Jha 
To: jgross@suse.com, sstabellini@kernel.org, boris.ostrovsky@oracle.com
Cc: harshvardhan.j.jha@oracle.com, xen-devel@lists.xenproject.org,
        iommu@lists.linux-foundation.org, iommu@lists.linux.dev,
        stable@vger.kernel.org
Subject: [PATCH 5.15.y 1/1] xen/swiotlb: relax alignment requirements
Date: Mon,  7 Apr 2025 00:02:35 -0700
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[ Upstream commit 099606a7b2d53e99ce31af42894c1fc9d77c6db9]

When mapping a buffer for DMA via .map_page or .map_sg DMA operations,
there is no need to check the machine frames to be aligned according
to the mapped areas size. All what is needed in these cases is that the
buffer is contiguous at machine level.

So carve out the alignment check from range_straddles_page_boundary()
and move it to a helper called by xen_swiotlb_alloc_coherent() and
xen_swiotlb_free_coherent() directly.

Fixes: 9f40ec84a797 ("xen/swiotlb: add alignment check for dma buffers")
Signed-off-by: Harshvardhan Jha 
---
 drivers/xen/swiotlb-xen.c | 18 +++++++++++-------
 1 file changed, 11 insertions(+), 7 deletions(-)

diff --git a/drivers/xen/swiotlb-xen.c b/drivers/xen/swiotlb-xen.c
index 0392841a822fa..65da97be06285 100644
--- a/drivers/xen/swiotlb-xen.c
+++ b/drivers/xen/swiotlb-xen.c
@@ -75,19 +75,21 @@ static inline phys_addr_t xen_dma_to_phys(struct device *dev,
 	return xen_bus_to_phys(dev, dma_to_phys(dev, dma_addr));
 }
 
+static inline bool range_requires_alignment(phys_addr_t p, size_t size)
+{
+	phys_addr_t algn = 1ULL << (get_order(size) + PAGE_SHIFT);
+	phys_addr_t bus_addr = pfn_to_bfn(XEN_PFN_DOWN(p)) << XEN_PAGE_SHIFT;
+
+	return IS_ALIGNED(p, algn) && !IS_ALIGNED(bus_addr, algn);
+}
+
 static inline int range_straddles_page_boundary(phys_addr_t p, size_t size)
 {
 	unsigned long next_bfn, xen_pfn = XEN_PFN_DOWN(p);
 	unsigned int i, nr_pages = XEN_PFN_UP(xen_offset_in_page(p) + size);
-	phys_addr_t algn = 1ULL << (get_order(size) + PAGE_SHIFT);
 
 	next_bfn = pfn_to_bfn(xen_pfn);
 
-	/* If buffer is physically aligned, ensure DMA alignment. */
-	if (IS_ALIGNED(p, algn) &&
-	    !IS_ALIGNED((phys_addr_t)next_bfn << XEN_PAGE_SHIFT, algn))
-		return 1;
-
 	for (i = 1; i < nr_pages; i++)
 		if (pfn_to_bfn(++xen_pfn) != ++next_bfn)
 			return 1;
@@ -306,7 +308,8 @@ xen_swiotlb_alloc_coherent(struct device *hwdev, size_t size,
 	phys = dma_to_phys(hwdev, *dma_handle);
 	dev_addr = xen_phys_to_dma(hwdev, phys);
 	if (((dev_addr + size - 1 <= dma_mask)) &&
-	    !range_straddles_page_boundary(phys, size))
+	    !range_straddles_page_boundary(phys, size) &&
+	    !range_requires_alignment(phys, size))
 		*dma_handle = dev_addr;
 	else {
 		if (xen_create_contiguous_region(phys, order,
@@ -347,6 +350,7 @@ xen_swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
 
 	if (!WARN_ON((dev_addr + size - 1 > dma_mask) ||
 		     range_straddles_page_boundary(phys, size)) &&
+	    !range_requires_alignment(phys, size) &&
 	    TestClearPageXenRemapped(page))
 		xen_destroy_contiguous_region(phys, order);
 
-- 
2.47.1



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In-Reply-To: <4aa999f4-48d3-400c-9dc4-21d3f31f3d78@apertussolutions.com>
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On 05.04.2025 02:04, Daniel P. Smith wrote:
> On 1/30/25 08:45, Jan Beulich wrote:
>> On 26.12.2024 17:57, Daniel P. Smith wrote:
>>> @@ -596,9 +597,10 @@ int __init dom0_setup_permissions(struct domain *d)
>>>       return rc;
>>>   }
>>>   
>>> -int __init construct_dom0(struct boot_info *bi, struct domain *d)
>>> +int __init construct_dom0(struct boot_domain *bd)
>>
>> Pointer-to-const? Domain construction should only be consuming data
>> supplied, I expect.
>>
>>> --- /dev/null
>>> +++ b/xen/arch/x86/include/asm/bootdomain.h
>>
>> Maybe boot-domain.h? Or was that suggested before and discarded for
>> whatever reason?
>>
>>> @@ -0,0 +1,28 @@
>>> +/* SPDX-License-Identifier: GPL-2.0-or-later */
>>> +/*
>>> + * Copyright (c) 2024 Apertus Solutions, LLC
>>> + * Author: Daniel P. Smith 
>>> + * Copyright (c) 2024 Christopher Clark 
>>> + */
>>> +
>>> +#ifndef __XEN_X86_BOOTDOMAIN_H__
>>> +#define __XEN_X86_BOOTDOMAIN_H__
>>> +
>>> +struct boot_domain {
>>> +    struct boot_module *kernel;
>>> +    struct boot_module *ramdisk;
>>
>> "ramdisk" is Linux-centric, I think. Can we name this more generically?
>> "module" perhaps, despite it then being the same name as we use for the
>> modules Xen is passed?
> 
> Ramdisk is not a linux-centric, take OpenBSD for example [1]. Calling 
> the field "module" is a recipe for confusion. Especially considering 
> that we are more or less providing a lightweight version of the 
> toolstack interface which use the name ramdisk.
> 
> [1] https://openbsd.fandom.com/wiki/Creating_a_custom_OpenBSD_RAM_disk

Just one other OS also using such a concept doesn't mean much. In fact, "ramdisk"
isn't quite appropriate a term for Linux nowadays anymore anyway. An initrd can
consist of multiple pieces now, not all of which end up taken as "ramdisk". I
wouldn't insist on "module" as a name, but I continue to think "ramdisk" is
inappropriate. The fact that the toolstack uses the term has historical reasons;
it doesn't mean new code in Xen needs to continue to use that term.

Jan


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Date: Mon, 7 Apr 2025 09:14:59 +0200
From: Greg KH 
To: Harshvardhan Jha 
Cc: jgross@suse.com, sstabellini@kernel.org, boris.ostrovsky@oracle.com,
	xen-devel@lists.xenproject.org, iommu@lists.linux-foundation.org,
	iommu@lists.linux.dev, stable@vger.kernel.org
Subject: Re: [PATCH 5.15.y 1/1] xen/swiotlb: relax alignment requirements
Message-ID: <2025040751-oversleep-sevenfold-b429@gregkh>
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On Mon, Apr 07, 2025 at 12:02:35AM -0700, Harshvardhan Jha wrote:
> [ Upstream commit 099606a7b2d53e99ce31af42894c1fc9d77c6db9]

Wrong git id :(


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Subject: Re: [PATCH v3 3/3] xen: debug: gcov: add condition coverage support
To: Volodymyr Babchuk 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 "xen-devel@lists.xenproject.org" 
References: <20250401011744.2267367-1-volodymyr_babchuk@epam.com>
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On 05.04.2025 05:30, Volodymyr Babchuk wrote:
> Jan Beulich  writes:
> 
>> On 01.04.2025 03:17, Volodymyr Babchuk wrote:
>>> --- a/xen/Kconfig
>>> +++ b/xen/Kconfig
>>> @@ -41,6 +41,11 @@ config CC_SPLIT_SECTIONS
>>>  config CC_HAS_UBSAN
>>>  	def_bool $(cc-option,-fsanitize=undefined)
>>>  
>>> +# Compiler supports -fcondition-coverage aka MC/DC
>>> +config CC_HAS_MCDC
>>> +	def_bool $(cc-option,-fcondition-coverage)
>>> +
>>> +
>>
>> Nit: No double blank lines please.
>>
>> Also, just to clarify - until the use of Kconfig (alone) for things like
>> this is properly resolved one way or another, I'm not going to approve
>> such changes (but I'm also not going to veto them). My proposal [1] is
>> still pending with no resolution, nor any counter-proposals.
> 
> I checked your proposal, but I am not sure how it maps for this
> particular use case. In your example
> 
>> config XEN_SHSTK
>>        bool "Supervisor Shadow Stacks"
>>        default HAS_AS_CET_SS
> 
> The default value will be "y" which is desired, but in case
> of CONDITION_COVERAGE, the default value should be "n". Are you
> suggesting to put
> 
> ifeq ($(CONFIG_CONDITION_COVERAGE)x$(CONFIG_CC_HAS_MCDC), yx)
>    $(warning Your compiler does not support condition coverage)
> endif
> 
> somewhere in Rules.mk ?

Perhaps. Ideally abstracted by a suitable, easy to use construct.

FTAOD - if you meant to include something like this in the next version of
the patch, you'll probably face resistance by Andrew (and/or maybe others).
We really need to decide on what model to use. I simply got tired of
reminding people that this discussion needs to happen (without pre-
determined outcome), for the matter to then be settled, and for the mix of
approaches presently taken to then be straightened.

>>> --- a/xen/Rules.mk
>>> +++ b/xen/Rules.mk
>>> @@ -138,6 +138,9 @@ ifeq ($(CONFIG_CC_IS_CLANG),y)
>>>      COV_FLAGS := -fprofile-instr-generate -fcoverage-mapping
>>>  else
>>>      COV_FLAGS := -fprofile-arcs -ftest-coverage
>>> +ifeq ($(CONFIG_CONDITION_COVERAGE),y)
>>> +    COV_FLAGS += -fcondition-coverage
>>> +endif
>>>  endif
>>
>> Personally I find ifeq() uses like this unhelpful, and would prefer
>>
>> COV_FLAGS-$(CONFIG_CONDITION_COVERAGE) += -fcondition-coverage
>> together with an eventual
>>
>> COV_FLAGS += $(COV_FLAGS-y)
>>
>> (if we don't already have one).
> 
> I did in this way:
> 
> --- a/xen/Rules.mk
> +++ b/xen/Rules.mk
> @@ -133,18 +133,19 @@ $(filter %.init.o,$(obj-y) $(obj-bin-y) $(extra-y)): CFLAGS-y += -DINIT_SECTIONS
>  
>  non-init-objects = $(filter-out %.init.o, $(obj-y) $(obj-bin-y) $(extra-y))
>  
> -ifeq ($(CONFIG_COVERAGE),y)
>  ifeq ($(CONFIG_CC_IS_CLANG),y)
> -    COV_FLAGS := -fprofile-instr-generate -fcoverage-mapping
> +    cov-flags-$(CONFIG_COVERAGE) := -fprofile-instr-generate -fcoverage-mapping
>  else
> -    COV_FLAGS := -fprofile-arcs -ftest-coverage
> +    cov-flags-$(CONFIG_COVERAGE) := -fprofile-arcs -ftest-coverage
> +    cov-flags-$(CONFIG_CONDITION_COVERAGE) += -fcondition-coverage
>  endif
>  
> -# Reset COV_FLAGS in cases where an objects has another one as prerequisite
> +# Reset cov-flags-y in cases where an objects has another one as prerequisite
>  $(nocov-y) $(filter %.init.o, $(obj-y) $(obj-bin-y) $(extra-y)): \
> -    COV_FLAGS :=
> +    cov-flags-y :=
>  
> -$(non-init-objects): _c_flags += $(COV_FLAGS)
> +$(non-init-objects): _c_flags += $(cov-flags-y)
>  endif
>  
> 
> I hope you don't mind having both changes (COV_FLAGS -> cov_flags-y and
> introduction of CONFIG_CONDITION_COVERAGE) in the same patch. With
> correct commit message, of course.

If that doesn't entail too many changes elsewhere, it's probably going to be
okay.

Jan


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Subject: Re: New Defects reported by Coverity Scan for XenProject
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On 06.04.2025 13:36, scan-admin@coverity.com wrote:
> Hi,
> 
> Please find the latest report on new defect(s) introduced to XenProject found with Coverity Scan.
> 
> 1 new defect(s) introduced to XenProject found with Coverity Scan.
> 
> 
> New defect(s) Reported-by: Coverity Scan
> Showing 1 of 1 defect(s)
> 
> 
> ** CID 1645644:  Control flow issues  (UNREACHABLE)
> /xen/arch/x86/hvm/vmx/vmcs.c: 774 in _vmx_cpu_up()
> 
> 
> ________________________________________________________________________________________________________
> *** CID 1645644:  Control flow issues  (UNREACHABLE)
> /xen/arch/x86/hvm/vmx/vmcs.c: 774 in _vmx_cpu_up()
> 768             vpid_sync_all();
> 769     
> 770         vmx_pi_per_cpu_init(cpu);
> 771     
> 772         return 0;
> 773     
>>>>     CID 1645644:  Control flow issues  (UNREACHABLE)
>>>>     This code cannot be reached: "vmxon_fault:
> if (bios_locke...".
> 774      vmxon_fault:
> 775         if ( bios_locked &&
> 776              test_bit(X86_FEATURE_SMX, &boot_cpu_data.x86_capability) &&
> 777              (!(eax & IA32_FEATURE_CONTROL_ENABLE_VMXON_OUTSIDE_SMX) ||
> 778               !(eax & IA32_FEATURE_CONTROL_ENABLE_VMXON_INSIDE_SMX)) )
> 779         {

Is this perhaps an indication that Coverity doesn't understand asm goto()?

Jan


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On 07/04/2025 8:26 am, Jan Beulich wrote:
> On 06.04.2025 13:36, scan-admin@coverity.com wrote:
>> Hi,
>>
>> Please find the latest report on new defect(s) introduced to XenProject found with Coverity Scan.
>>
>> 1 new defect(s) introduced to XenProject found with Coverity Scan.
>>
>>
>> New defect(s) Reported-by: Coverity Scan
>> Showing 1 of 1 defect(s)
>>
>>
>> ** CID 1645644:  Control flow issues  (UNREACHABLE)
>> /xen/arch/x86/hvm/vmx/vmcs.c: 774 in _vmx_cpu_up()
>>
>>
>> ________________________________________________________________________________________________________
>> *** CID 1645644:  Control flow issues  (UNREACHABLE)
>> /xen/arch/x86/hvm/vmx/vmcs.c: 774 in _vmx_cpu_up()
>> 768             vpid_sync_all();
>> 769     
>> 770         vmx_pi_per_cpu_init(cpu);
>> 771     
>> 772         return 0;
>> 773     
>>>>>     CID 1645644:  Control flow issues  (UNREACHABLE)
>>>>>     This code cannot be reached: "vmxon_fault:
>> if (bios_locke...".
>> 774      vmxon_fault:
>> 775         if ( bios_locked &&
>> 776              test_bit(X86_FEATURE_SMX, &boot_cpu_data.x86_capability) &&
>> 777              (!(eax & IA32_FEATURE_CONTROL_ENABLE_VMXON_OUTSIDE_SMX) ||
>> 778               !(eax & IA32_FEATURE_CONTROL_ENABLE_VMXON_INSIDE_SMX)) )
>> 779         {
> Is this perhaps an indication that Coverity doesn't understand asm goto()?

Yes.  That's a false positive.

~Andrew


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From: Roger Pau Monne 
To: Juergen Gross ,
	Roger Pau Monne ,
	xen-devel@lists.xenproject.org,
	linux-kernel@vger.kernel.org
Cc: stable@vger.kernel.org,
	Boris Ostrovsky ,
	Thomas Gleixner ,
	Ingo Molnar ,
	Borislav Petkov ,
	Dave Hansen ,
	x86@kernel.org,
	"H. Peter Anvin" ,
	Stefano Stabellini ,
	Oleksandr Tyshchenko 
Subject: [PATCH v3] x86/xen: fix balloon target initialization for PVH dom0
Date: Mon,  7 Apr 2025 10:28:37 +0200
Message-ID: <20250407082838.65495-1-roger.pau@citrix.com>
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PVH dom0 re-uses logic from PV dom0, in which RAM ranges not assigned to
dom0 are re-used as scratch memory to map foreign and grant pages.  Such
logic relies on reporting those unpopulated ranges as RAM to Linux, and
mark them as reserved.  This way Linux creates the underlying page
structures required for metadata management.

Such approach works fine on PV because the initial balloon target is
calculated using specific Xen data, that doesn't take into account the
memory type changes described above.  However on HVM and PVH the initial
balloon target is calculated using get_num_physpages(), and that function
does take into account the unpopulated RAM regions used as scratch space
for remote domain mappings.

This leads to PVH dom0 having an incorrect initial balloon target, which
causes malfunction (excessive memory freeing) of the balloon driver if the
dom0 memory target is later adjusted from the toolstack.

Fix this by using xen_released_pages to account for any pages that are part
of the memory map, but are already unpopulated when the balloon driver is
initialized.  This accounts for any regions used for scratch remote
mappings.  Note on x86 xen_released_pages definition is moved to
enlighten.c so it's uniformly available for all Xen-enabled builds.

Take the opportunity to unify PV with PVH/HVM guests regarding the usage of
get_num_physpages(), as that avoids having to add different logic for PV vs
PVH in both balloon_add_regions() and arch_xen_unpopulated_init().

Much like a6aa4eb994ee, the code in this changeset should have been part of
38620fc4e893.

Fixes: a6aa4eb994ee ('xen/x86: add extra pages to unpopulated-alloc if available')
Signed-off-by: Roger Pau Monné 
Reviewed-by: Juergen Gross 
Cc: stable@vger.kernel.org
---
Changes since v2:
 - For x86: Move xen_released_pages definition from setup.c (PV specific)
   to enlighten.c (shared between all guest modes).

Changes since v1:
 - Replace BUG_ON() with a WARN and failure to initialize the balloon
   driver.
---
 arch/x86/xen/enlighten.c | 10 ++++++++++
 arch/x86/xen/setup.c     |  3 ---
 drivers/xen/balloon.c    | 34 ++++++++++++++++++++++++----------
 3 files changed, 34 insertions(+), 13 deletions(-)

diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index 43dcd8c7badc..1b7710bd0d05 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -70,6 +70,9 @@ EXPORT_SYMBOL(xen_start_flags);
  */
 struct shared_info *HYPERVISOR_shared_info = &xen_dummy_shared_info;
 
+/* Number of pages released from the initial allocation. */
+unsigned long xen_released_pages;
+
 static __ref void xen_get_vendor(void)
 {
 	init_cpu_devs();
@@ -466,6 +469,13 @@ int __init arch_xen_unpopulated_init(struct resource **res)
 			xen_free_unpopulated_pages(1, &pg);
 		}
 
+		/*
+		 * Account for the region being in the physmap but unpopulated.
+		 * The value in xen_released_pages is used by the balloon
+		 * driver to know how much of the physmap is unpopulated and
+		 * set an accurate initial memory target.
+		 */
+		xen_released_pages += xen_extra_mem[i].n_pfns;
 		/* Zero so region is not also added to the balloon driver. */
 		xen_extra_mem[i].n_pfns = 0;
 	}
diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c
index c3db71d96c43..3823e52aef52 100644
--- a/arch/x86/xen/setup.c
+++ b/arch/x86/xen/setup.c
@@ -37,9 +37,6 @@
 
 #define GB(x) ((uint64_t)(x) * 1024 * 1024 * 1024)
 
-/* Number of pages released from the initial allocation. */
-unsigned long xen_released_pages;
-
 /* Memory map would allow PCI passthrough. */
 bool xen_pv_pci_possible;
 
diff --git a/drivers/xen/balloon.c b/drivers/xen/balloon.c
index 163f7f1d70f1..ee165f4f7fe6 100644
--- a/drivers/xen/balloon.c
+++ b/drivers/xen/balloon.c
@@ -675,7 +675,7 @@ void xen_free_ballooned_pages(unsigned int nr_pages, struct page **pages)
 }
 EXPORT_SYMBOL(xen_free_ballooned_pages);
 
-static void __init balloon_add_regions(void)
+static int __init balloon_add_regions(void)
 {
 	unsigned long start_pfn, pages;
 	unsigned long pfn, extra_pfn_end;
@@ -698,26 +698,38 @@ static void __init balloon_add_regions(void)
 		for (pfn = start_pfn; pfn < extra_pfn_end; pfn++)
 			balloon_append(pfn_to_page(pfn));
 
-		balloon_stats.total_pages += extra_pfn_end - start_pfn;
+		/*
+		 * Extra regions are accounted for in the physmap, but need
+		 * decreasing from current_pages to balloon down the initial
+		 * allocation, because they are already accounted for in
+		 * total_pages.
+		 */
+		if (extra_pfn_end - start_pfn >= balloon_stats.current_pages) {
+			WARN(1, "Extra pages underflow current target");
+			return -ERANGE;
+		}
+		balloon_stats.current_pages -= extra_pfn_end - start_pfn;
 	}
+
+	return 0;
 }
 
 static int __init balloon_init(void)
 {
 	struct task_struct *task;
+	int rc;
 
 	if (!xen_domain())
 		return -ENODEV;
 
 	pr_info("Initialising balloon driver\n");
 
-#ifdef CONFIG_XEN_PV
-	balloon_stats.current_pages = xen_pv_domain()
-		? min(xen_start_info->nr_pages - xen_released_pages, max_pfn)
-		: get_num_physpages();
-#else
-	balloon_stats.current_pages = get_num_physpages();
-#endif
+	if (xen_released_pages >= get_num_physpages()) {
+		WARN(1, "Released pages underflow current target");
+		return -ERANGE;
+	}
+
+	balloon_stats.current_pages = get_num_physpages() - xen_released_pages;
 	balloon_stats.target_pages  = balloon_stats.current_pages;
 	balloon_stats.balloon_low   = 0;
 	balloon_stats.balloon_high  = 0;
@@ -734,7 +746,9 @@ static int __init balloon_init(void)
 	register_sysctl_init("xen/balloon", balloon_table);
 #endif
 
-	balloon_add_regions();
+	rc = balloon_add_regions();
+	if (rc)
+		return rc;
 
 	task = kthread_run(balloon_thread, NULL, "xen-balloon");
 	if (IS_ERR(task)) {
-- 
2.48.1



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Message-ID: <45d47205-409c-492a-9841-3b162c05ec09@amd.com>
Date: Mon, 7 Apr 2025 11:04:22 +0200
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v4 1/3] xen/arm: Move some of the functions to common file
To: Ayan Kumar Halder ,
 xen-devel@lists.xenproject.org
Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
 Volodymyr Babchuk 
References: <20250403171241.975377-1-ayan.kumar.halder@amd.com>
 <20250403171241.975377-2-ayan.kumar.halder@amd.com>
From: "Orzel, Michal" 
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On 03/04/2025 19:12, Ayan Kumar Halder wrote:
> Added a new file prepare_xen_region.inc to hold the common earlyboot MPU regions
> configurations across arm64 and arm32.
> 
> prepare_xen_region, fail_insufficient_regions() will be used by both arm32 and
> arm64. Thus, they have been moved to prepare_xen_region.inc.
> 
> enable_secondary_cpu_mm() is a stub which is moved to prepare_xen_region.inc as
> SMP is currently not supported for MPU.
This does not sound right. If you want a place to keep some common MPU stuff
between Arm64 and Arm32, you need to come up with better name for a file. SMP
has nothing to do here with preparing regions so it feels odd to have
enable_secondary_cpu_mm stub there.

Also, new files should use dashes '-' and not underscores '_'.

~Michal



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From: "Teddy Astie" 
Subject: =?utf-8?Q?[PATCH=20v3.1=201/2]=20x86/amd:=20Add=20guest=20support=20for=20AMD=20TCE?=
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AMD Translation Cache Extension is a flag that can be enabled in the EFER MSR to optimize
some TLB flushes. Expose this flag to guest if supported by hardware. This flag can be
used by Linux since version 6.14.

Only expose this feature to HAP-enabled guests. Guests with shadow paging guests have
their TLB flush operations intercepted and handled separately, without taking account
to this flag. PV guest follows Xen TLB flush behavior.

Signed-off-by: Teddy Astie 
---
v3:
 - hide from PV guests
 - review commit description
v3.1:
 - added Linux support note
---
 CHANGELOG.md                                | 1 +
 xen/arch/x86/hvm/hvm.c                      | 3 +++
 xen/arch/x86/include/asm/msr-index.h        | 3 ++-
 xen/arch/x86/pv/emul-priv-op.c              | 4 ++--
 xen/include/public/arch-x86/cpufeatureset.h | 1 +
 5 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index 8f6afa5c85..dbfecefbd4 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -18,6 +18,7 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/)
    - Support PCI passthrough for HVM domUs when dom0 is PVH (note SR-IOV
      capability usage is not yet supported on PVH dom0).
    - Smoke tests for the FreeBSD Xen builds in Cirrus CI.
+   - Guest support for AMD Translation Cache Extension feature.
 
 ### Removed
 
diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index 5950f3160f..184357b042 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -959,6 +959,9 @@ const char *hvm_efer_valid(const struct vcpu *v, uint64_t value,
     if ( (value & EFER_FFXSE) && !p->extd.ffxsr )
         return "FFXSE without feature";
 
+    if ( (value & EFER_TCE) && !p->extd.tce )
+        return "TCE without feature";
+
     if ( (value & EFER_AIBRSE) && !p->extd.auto_ibrs )
         return "AutoIBRS without feature";
 
diff --git a/xen/arch/x86/include/asm/msr-index.h b/xen/arch/x86/include/asm/msr-index.h
index 22d9e76e55..d8576aec1c 100644
--- a/xen/arch/x86/include/asm/msr-index.h
+++ b/xen/arch/x86/include/asm/msr-index.h
@@ -200,11 +200,12 @@
 #define  EFER_NXE                           (_AC(1, ULL) << 11) /* No Execute Enable */
 #define  EFER_SVME                          (_AC(1, ULL) << 12) /* Secure Virtual Machine Enable */
 #define  EFER_FFXSE                         (_AC(1, ULL) << 14) /* Fast FXSAVE/FXRSTOR */
+#define  EFER_TCE                           (_AC(1, ULL) << 15) /* Translation Cache Extensions */
 #define  EFER_AIBRSE                        (_AC(1, ULL) << 21) /* Automatic IBRS Enable */
 
 #define EFER_KNOWN_MASK \
     (EFER_SCE | EFER_LME | EFER_LMA | EFER_NXE | EFER_SVME | EFER_FFXSE | \
-     EFER_AIBRSE)
+     EFER_TCE | EFER_AIBRSE)
 
 #define MSR_STAR                            _AC(0xc0000081, U) /* legacy mode SYSCALL target */
 #define MSR_LSTAR                           _AC(0xc0000082, U) /* long mode SYSCALL target */
diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c
index 70150c2722..531228b2da 100644
--- a/xen/arch/x86/pv/emul-priv-op.c
+++ b/xen/arch/x86/pv/emul-priv-op.c
@@ -857,8 +857,8 @@ static uint64_t guest_efer(const struct domain *d)
 {
     uint64_t val;
 
-    /* Hide unknown bits, and unconditionally hide SVME and AIBRSE from guests. */
-    val = read_efer() & EFER_KNOWN_MASK & ~(EFER_SVME | EFER_AIBRSE);
+    /* Hide unknown bits, and unconditionally hide SVME, TCE and AIBRSE from guests. */
+    val = read_efer() & EFER_KNOWN_MASK & ~(EFER_SVME | EFER_TCE | EFER_AIBRSE);
     /*
      * Hide the 64-bit features from 32-bit guests.  SCE has
      * vendor-dependent behaviour.
diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h
index cc6e984a88..8182d2dbed 100644
--- a/xen/include/public/arch-x86/cpufeatureset.h
+++ b/xen/include/public/arch-x86/cpufeatureset.h
@@ -170,6 +170,7 @@ XEN_CPUFEATURE(SKINIT,        3*32+12) /*   SKINIT/STGI instructions */
 XEN_CPUFEATURE(WDT,           3*32+13) /*   Watchdog timer */
 XEN_CPUFEATURE(LWP,           3*32+15) /*   Light Weight Profiling */
 XEN_CPUFEATURE(FMA4,          3*32+16) /*A  4 operands MAC instructions */
+XEN_CPUFEATURE(TCE,           3*32+17) /*H  Translation Cache Extension support */
 XEN_CPUFEATURE(NODEID_MSR,    3*32+19) /*   NodeId MSR */
 XEN_CPUFEATURE(TBM,           3*32+21) /*A  trailing bit manipulations */
 XEN_CPUFEATURE(TOPOEXT,       3*32+22) /*   topology extensions CPUID leafs */
-- 
2.47.2



Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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From: "Teddy Astie" 
Subject: =?utf-8?Q?[PATCH=20v3.1=202/2]=20x86/amd:=20Enable=20TCE=20in=20Xen?=
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Aside exposing this flag to guests, Xen can also make use of it to reduce the cost of
some TLB flushes. Enable this flag if supported by hardware.

Signed-off-by: Teddy Astie 
---
v2:
 - Add changelog entry
 - use trampoline_efer
 - use cpu_has_tce instead of opencoded boot_cpu_has(X86_FEATURE_TCE)
v3:
 - drop message
 - use bootsym for modifying trampoline_efer
---
 CHANGELOG.md                          | 2 +-
 xen/arch/x86/include/asm/cpufeature.h | 1 +
 xen/arch/x86/setup.c                  | 6 ++++++
 3 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index dbfecefbd4..375905e68a 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -18,7 +18,7 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/)
    - Support PCI passthrough for HVM domUs when dom0 is PVH (note SR-IOV
      capability usage is not yet supported on PVH dom0).
    - Smoke tests for the FreeBSD Xen builds in Cirrus CI.
-   - Guest support for AMD Translation Cache Extension feature.
+   - Guest and Xen support for AMD Translation Cache Extension feature.
 
 ### Removed
 
diff --git a/xen/arch/x86/include/asm/cpufeature.h b/xen/arch/x86/include/asm/cpufeature.h
index 05399fb9c9..ab6d07b767 100644
--- a/xen/arch/x86/include/asm/cpufeature.h
+++ b/xen/arch/x86/include/asm/cpufeature.h
@@ -114,6 +114,7 @@ static inline bool boot_cpu_has(unsigned int feat)
 #define cpu_has_xop             boot_cpu_has(X86_FEATURE_XOP)
 #define cpu_has_skinit          boot_cpu_has(X86_FEATURE_SKINIT)
 #define cpu_has_fma4            boot_cpu_has(X86_FEATURE_FMA4)
+#define cpu_has_tce             boot_cpu_has(X86_FEATURE_TCE)
 #define cpu_has_tbm             boot_cpu_has(X86_FEATURE_TBM)
 
 /* CPUID level 0x0000000D:1.eax */
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index d70abb7e0c..9b1924ad05 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -2008,6 +2008,12 @@ void asmlinkage __init noreturn __start_xen(void)
     if ( cpu_has_pku )
         set_in_cr4(X86_CR4_PKE);
 
+    if ( cpu_has_tce )
+    {
+        write_efer(read_efer() | EFER_TCE);
+        bootsym(trampoline_efer) |= EFER_TCE;
+    }
+
     if ( opt_invpcid && cpu_has_invpcid )
         use_invpcid = true;
 
-- 
2.47.2



Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



From xen-devel-bounces@lists.xenproject.org Mon Apr 07 09:14:44 2025
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	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk 
Subject: [PATCH v2 0/7] First chunk for Arm R82 and MPU support
Date: Mon,  7 Apr 2025 10:14:23 +0100
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Hi all,

This is the first chunk of work to support MPU and R82 on Xen, this serie
reaches the early boot stages until setup_pagetables() which is not used for MPU
but it is just to give an idea about which stage of the boot is reached.

v2 changes for this serie:
 - rebased serie on the MPU skeleton that allow compilation
 - removed some patches already merged in the MPU skeleton

Luca Fancellu (6):
  arm/mpu: Provide access to the MPU region from the C code
  arm/mpu: Introduce utility functions for the pr_t type
  arm/mpu: Provide a constructor for pr_t type
  arm/mpu: Introduce MPU memory mapping flags
  arm/mpu: Implement early_fdt_map support in MPU systems
  arm/mpu: Implement setup_mpu for MPU system

Penny Zheng (1):
  arm/mpu: Introduce MPU memory region map structure

 xen/arch/arm/include/asm/arm64/mpu.h |  57 ++++++
 xen/arch/arm/include/asm/mpu.h       |  50 ++++++
 xen/arch/arm/include/asm/mpu/mm.h    |  27 +++
 xen/arch/arm/include/asm/page.h      |  25 +++
 xen/arch/arm/mpu/mm.c                | 253 ++++++++++++++++++++++++++-
 xen/arch/arm/mpu/setup.c             |  54 +++++-
 6 files changed, 463 insertions(+), 3 deletions(-)
 create mode 100644 xen/arch/arm/include/asm/arm64/mpu.h

-- 
2.34.1



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To: xen-devel@lists.xenproject.org
Cc: Penny Zheng ,
	Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk ,
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	Wei Chen 
Subject: [PATCH v2 1/7] arm/mpu: Introduce MPU memory region map structure
Date: Mon,  7 Apr 2025 10:14:24 +0100
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From: Penny Zheng 

Introduce pr_t typedef which is a structure having the prbar
and prlar members, each being structured as the registers of
the aarch64 armv8-r architecture.

Introduce the array 'xen_mpumap' that will store a view of
the content of the MPU regions.

Introduce MAX_MPU_REGIONS macro that uses the value of
NUM_MPU_REGIONS_MASK just for clarity, because using the
latter as number of elements of the xen_mpumap array might
be misleading.

Signed-off-by: Penny Zheng 
Signed-off-by: Wei Chen 
Signed-off-by: Luca Fancellu 
---
 xen/arch/arm/include/asm/arm64/mpu.h | 44 ++++++++++++++++++++++++++++
 xen/arch/arm/include/asm/mpu.h       |  5 ++++
 xen/arch/arm/mpu/mm.c                |  4 +++
 3 files changed, 53 insertions(+)
 create mode 100644 xen/arch/arm/include/asm/arm64/mpu.h

diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/asm/arm64/mpu.h
new file mode 100644
index 000000000000..4d2bd7d7877f
--- /dev/null
+++ b/xen/arch/arm/include/asm/arm64/mpu.h
@@ -0,0 +1,44 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * mpu.h: Arm Memory Protection Unit definitions for aarch64.
+ */
+
+#ifndef __ARM_ARM64_MPU_H__
+#define __ARM_ARM64_MPU_H__
+
+#ifndef __ASSEMBLY__
+
+/* Protection Region Base Address Register */
+typedef union {
+    struct __packed {
+        unsigned long xn:2;       /* Execute-Never */
+        unsigned long ap:2;       /* Acess Permission */
+        unsigned long sh:2;       /* Sharebility */
+        unsigned long base:46;    /* Base Address */
+        unsigned long pad:12;
+    } reg;
+    uint64_t bits;
+} prbar_t;
+
+/* Protection Region Limit Address Register */
+typedef union {
+    struct __packed {
+        unsigned long en:1;     /* Region enable */
+        unsigned long ai:3;     /* Memory Attribute Index */
+        unsigned long ns:1;     /* Not-Secure */
+        unsigned long res:1;    /* Reserved 0 by hardware */
+        unsigned long limit:46; /* Limit Address */
+        unsigned long pad:12;
+    } reg;
+    uint64_t bits;
+} prlar_t;
+
+/* MPU Protection Region */
+typedef struct {
+    prbar_t prbar;
+    prlar_t prlar;
+} pr_t;
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __ARM_ARM64_MPU_H__ */
\ No newline at end of file
diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h
index d4ec4248b62b..e148c705b82c 100644
--- a/xen/arch/arm/include/asm/mpu.h
+++ b/xen/arch/arm/include/asm/mpu.h
@@ -6,6 +6,10 @@
 #ifndef __ARM_MPU_H__
 #define __ARM_MPU_H__
 
+#if defined(CONFIG_ARM_64)
+# include 
+#endif
+
 #define MPU_REGION_SHIFT  6
 #define MPU_REGION_ALIGN  (_AC(1, UL) << MPU_REGION_SHIFT)
 #define MPU_REGION_MASK   (~(MPU_REGION_ALIGN - 1))
@@ -13,6 +17,7 @@
 #define NUM_MPU_REGIONS_SHIFT   8
 #define NUM_MPU_REGIONS         (_AC(1, UL) << NUM_MPU_REGIONS_SHIFT)
 #define NUM_MPU_REGIONS_MASK    (NUM_MPU_REGIONS - 1)
+#define MAX_MPU_REGIONS         NUM_MPU_REGIONS_MASK
 
 #endif /* __ARM_MPU_H__ */
 
diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c
index 07c8959f4ee9..f83ce04fef8a 100644
--- a/xen/arch/arm/mpu/mm.c
+++ b/xen/arch/arm/mpu/mm.c
@@ -7,9 +7,13 @@
 #include 
 #include 
 #include 
+#include 
 
 struct page_info *frame_table;
 
+/* EL2 Xen MPU memory region mapping table. */
+pr_t xen_mpumap[MAX_MPU_REGIONS];
+
 static void __init __maybe_unused build_assertions(void)
 {
     /*
-- 
2.34.1



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From: Luca Fancellu 
To: xen-devel@lists.xenproject.org
Cc: Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk 
Subject: [PATCH v2 2/7] arm/mpu: Provide access to the MPU region from the C code
Date: Mon,  7 Apr 2025 10:14:25 +0100
Message-Id: <20250407091430.2342709-3-luca.fancellu@arm.com>
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Implement some utility function in order to access the MPU regions
from the C world.

Signed-off-by: Luca Fancellu 
---
 xen/arch/arm/include/asm/mpu.h    |   1 +
 xen/arch/arm/include/asm/mpu/mm.h |  24 ++++++
 xen/arch/arm/mpu/mm.c             | 127 ++++++++++++++++++++++++++++++
 3 files changed, 152 insertions(+)

diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h
index e148c705b82c..59ff22c804c1 100644
--- a/xen/arch/arm/include/asm/mpu.h
+++ b/xen/arch/arm/include/asm/mpu.h
@@ -13,6 +13,7 @@
 #define MPU_REGION_SHIFT  6
 #define MPU_REGION_ALIGN  (_AC(1, UL) << MPU_REGION_SHIFT)
 #define MPU_REGION_MASK   (~(MPU_REGION_ALIGN - 1))
+#define MPU_REGION_RES0   (0xFFFULL << 52)
 
 #define NUM_MPU_REGIONS_SHIFT   8
 #define NUM_MPU_REGIONS         (_AC(1, UL) << NUM_MPU_REGIONS_SHIFT)
diff --git a/xen/arch/arm/include/asm/mpu/mm.h b/xen/arch/arm/include/asm/mpu/mm.h
index 86f33d9836b7..5cabe9d111ce 100644
--- a/xen/arch/arm/include/asm/mpu/mm.h
+++ b/xen/arch/arm/include/asm/mpu/mm.h
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 
 extern struct page_info *frame_table;
 
@@ -29,6 +30,29 @@ static inline struct page_info *virt_to_page(const void *v)
     return mfn_to_page(mfn);
 }
 
+/* Utility function to be used whenever MPU regions are modified */
+static inline void context_sync_mpu(void)
+{
+    /*
+     * ARM DDI 0600B.a, C1.7.1
+     * Writes to MPU registers are only guaranteed to be visible following a
+     * Context synchronization event and DSB operation.
+     */
+    dsb(sy);
+    isb();
+}
+
+/*
+ * The following API require context_sync_mpu() after being used to modifiy MPU
+ * regions:
+ *  - write_protection_region
+ */
+
+/* Reads the MPU region with index 'sel' from the HW */
+extern void read_protection_region(pr_t *pr_read, uint8_t sel);
+/* Writes the MPU region with index 'sel' to the HW */
+extern void write_protection_region(const pr_t *pr_write, uint8_t sel);
+
 #endif /* __ARM_MPU_MM_H__ */
 
 /*
diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c
index f83ce04fef8a..bf281f67fb6b 100644
--- a/xen/arch/arm/mpu/mm.c
+++ b/xen/arch/arm/mpu/mm.c
@@ -8,12 +8,34 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 struct page_info *frame_table;
 
 /* EL2 Xen MPU memory region mapping table. */
 pr_t xen_mpumap[MAX_MPU_REGIONS];
 
+/* The following are needed for the case generator with num==0 */
+#define PRBAR0_EL2 PRBAR_EL2
+#define PRLAR0_EL2 PRLAR_EL2
+
+#define GENERATE_WRITE_PR_REG_CASE(num, pr)                                 \
+    case num:                                                               \
+    {                                                                       \
+        WRITE_SYSREG(pr->prbar.bits & ~MPU_REGION_RES0, PRBAR##num##_EL2);  \
+        WRITE_SYSREG(pr->prlar.bits & ~MPU_REGION_RES0, PRLAR##num##_EL2);  \
+        break;                                                              \
+    }
+
+#define GENERATE_READ_PR_REG_CASE(num, pr)                      \
+    case num:                                                   \
+    {                                                           \
+        pr->prbar.bits = READ_SYSREG(PRBAR##num##_EL2);         \
+        pr->prlar.bits = READ_SYSREG(PRLAR##num##_EL2);         \
+        break;                                                  \
+    }
+
 static void __init __maybe_unused build_assertions(void)
 {
     /*
@@ -24,6 +46,111 @@ static void __init __maybe_unused build_assertions(void)
     BUILD_BUG_ON(PAGE_SIZE != SZ_4K);
 }
 
+static void prepare_selector(uint8_t sel)
+{
+    /*
+     * {read,write}_protection_region works using the direct access to the 0..15
+     * regions, so in order to save the isb() overhead, change the PRSELR_EL2
+     * only when needed, so when the upper 4 bits of the selector will change.
+     */
+    sel &= 0xF0U;
+    if ( READ_SYSREG(PRSELR_EL2) != sel )
+    {
+        WRITE_SYSREG(sel, PRSELR_EL2);
+        isb();
+    }
+}
+
+/*
+ * Armv8-R AArch64 at most supports 255 MPU protection regions.
+ * See section G1.3.18 of the reference manual for Armv8-R AArch64,
+ * PRBAR_EL2 and PRLAR_EL2 provide access to the EL2 MPU region
+ * determined by the value of 'n' and PRSELR_EL2.REGION as
+ * PRSELR_EL2.REGION<7:4>:n(n = 0, 1, 2, ... , 15)
+ * For example to access regions from 16 to 31 (0b10000 to 0b11111):
+ * - Set PRSELR_EL2 to 0b1xxxx
+ * - Region 16 configuration is accessible through PRBAR_EL2 and PRLAR_EL2
+ * - Region 17 configuration is accessible through PRBAR1_EL2 and PRLAR1_EL2
+ * - Region 18 configuration is accessible through PRBAR2_EL2 and PRLAR2_EL2
+ * - ...
+ * - Region 31 configuration is accessible through PRBAR15_EL2 and PRLAR15_EL2
+ */
+/*
+ * Read EL2 MPU Protection Region.
+ *
+ * @pr_read: mpu protection region returned by read op.
+ * @sel: mpu protection region selector
+ */
+void read_protection_region(pr_t *pr_read, uint8_t sel)
+{
+    /*
+     * Before accessing EL2 MPU region register PRBAR_EL2/PRLAR_EL2,
+     * make sure PRSELR_EL2 is set, as it determines which MPU region
+     * is selected.
+     */
+    prepare_selector(sel);
+
+    switch ( sel & 0xFU )
+    {
+        GENERATE_READ_PR_REG_CASE(0, pr_read);
+        GENERATE_READ_PR_REG_CASE(1, pr_read);
+        GENERATE_READ_PR_REG_CASE(2, pr_read);
+        GENERATE_READ_PR_REG_CASE(3, pr_read);
+        GENERATE_READ_PR_REG_CASE(4, pr_read);
+        GENERATE_READ_PR_REG_CASE(5, pr_read);
+        GENERATE_READ_PR_REG_CASE(6, pr_read);
+        GENERATE_READ_PR_REG_CASE(7, pr_read);
+        GENERATE_READ_PR_REG_CASE(8, pr_read);
+        GENERATE_READ_PR_REG_CASE(9, pr_read);
+        GENERATE_READ_PR_REG_CASE(10, pr_read);
+        GENERATE_READ_PR_REG_CASE(11, pr_read);
+        GENERATE_READ_PR_REG_CASE(12, pr_read);
+        GENERATE_READ_PR_REG_CASE(13, pr_read);
+        GENERATE_READ_PR_REG_CASE(14, pr_read);
+        GENERATE_READ_PR_REG_CASE(15, pr_read);
+    default:
+        BUG(); /* Can't happen */
+    }
+}
+
+/*
+ * Write EL2 MPU Protection Region.
+ *
+ * @pr_write: const mpu protection region passed through write op.
+ * @sel: mpu protection region selector
+ */
+void write_protection_region(const pr_t *pr_write, uint8_t sel)
+{
+    /*
+     * Before accessing EL2 MPU region register PRBAR_EL2/PRLAR_EL2,
+     * make sure PRSELR_EL2 is set, as it determines which MPU region
+     * is selected.
+     */
+    prepare_selector(sel);
+
+    switch ( sel & 0xFU )
+    {
+        GENERATE_WRITE_PR_REG_CASE(0, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(1, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(2, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(3, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(4, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(5, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(6, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(7, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(8, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(9, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(10, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(11, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(12, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(13, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(14, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(15, pr_write);
+    default:
+        BUG(); /* Can't happen */
+    }
+}
+
 void __init setup_mm(void)
 {
     BUG_ON("unimplemented");
-- 
2.34.1



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Cc: Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk 
Subject: [PATCH v2 3/7] arm/mpu: Introduce utility functions for the pr_t type
Date: Mon,  7 Apr 2025 10:14:26 +0100
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Introduce few utility function to manipulate and handle the
pr_t type.

Signed-off-by: Luca Fancellu 
---
 xen/arch/arm/include/asm/mpu.h | 40 ++++++++++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h
index 59ff22c804c1..6971507457fb 100644
--- a/xen/arch/arm/include/asm/mpu.h
+++ b/xen/arch/arm/include/asm/mpu.h
@@ -20,6 +20,46 @@
 #define NUM_MPU_REGIONS_MASK    (NUM_MPU_REGIONS - 1)
 #define MAX_MPU_REGIONS         NUM_MPU_REGIONS_MASK
 
+#ifndef __ASSEMBLY__
+
+/* Set base address of MPU protection region(pr_t). */
+static inline void pr_set_base(pr_t *pr, paddr_t base)
+{
+    pr->prbar.reg.base = (base >> MPU_REGION_SHIFT);
+}
+
+/* Set limit address of MPU protection region(pr_t). */
+static inline void pr_set_limit(pr_t *pr, paddr_t limit)
+{
+    pr->prlar.reg.limit = ((limit - 1) >> MPU_REGION_SHIFT);
+}
+
+/*
+ * Access to get base address of MPU protection region(pr_t).
+ * The base address shall be zero extended.
+ */
+static inline paddr_t pr_get_base(pr_t *pr)
+{
+    return (paddr_t)(pr->prbar.reg.base << MPU_REGION_SHIFT);
+}
+
+/*
+ * Access to get limit address of MPU protection region(pr_t).
+ * The limit address shall be concatenated with 0x3f.
+ */
+static inline paddr_t pr_get_limit(pr_t *pr)
+{
+    return (paddr_t)((pr->prlar.reg.limit << MPU_REGION_SHIFT)
+                     | ~MPU_REGION_MASK);
+}
+
+static inline bool region_is_valid(pr_t *pr)
+{
+    return pr->prlar.reg.en;
+}
+
+#endif /* __ASSEMBLY__ */
+
 #endif /* __ARM_MPU_H__ */
 
 /*
-- 
2.34.1



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	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk 
Subject: [PATCH v2 4/7] arm/mpu: Provide a constructor for pr_t type
Date: Mon,  7 Apr 2025 10:14:27 +0100
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Provide a function that creates a pr_t object from a memory
range and some attributes.

Signed-off-by: Luca Fancellu 
---
 xen/arch/arm/include/asm/arm64/mpu.h | 11 +++++
 xen/arch/arm/include/asm/mpu.h       |  4 ++
 xen/arch/arm/include/asm/mpu/mm.h    |  3 ++
 xen/arch/arm/mpu/mm.c                | 73 ++++++++++++++++++++++++++++
 4 files changed, 91 insertions(+)

diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/asm/arm64/mpu.h
index 4d2bd7d7877f..7cf8d355a1af 100644
--- a/xen/arch/arm/include/asm/arm64/mpu.h
+++ b/xen/arch/arm/include/asm/arm64/mpu.h
@@ -6,6 +6,17 @@
 #ifndef __ARM_ARM64_MPU_H__
 #define __ARM_ARM64_MPU_H__
 
+/*
+ * Excute never.
+ * Stage 1 EL2 translation regime.
+ * XN[1] determines whether execution of the instruction fetched from the MPU
+ * memory region is permitted.
+ * Stage 2 EL1/EL0 translation regime.
+ * XN[0] determines whether execution of the instruction fetched from the MPU
+ * memory region is permitted.
+ */
+#define XN_EL2_ENABLED  0x2
+
 #ifndef __ASSEMBLY__
 
 /* Protection Region Base Address Register */
diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h
index 6971507457fb..eba5086cde97 100644
--- a/xen/arch/arm/include/asm/mpu.h
+++ b/xen/arch/arm/include/asm/mpu.h
@@ -20,6 +20,10 @@
 #define NUM_MPU_REGIONS_MASK    (NUM_MPU_REGIONS - 1)
 #define MAX_MPU_REGIONS         NUM_MPU_REGIONS_MASK
 
+/* Access permission attributes. */
+/* Read/Write at EL2, No Access at EL1/EL0. */
+#define AP_RW_EL2 0x0
+
 #ifndef __ASSEMBLY__
 
 /* Set base address of MPU protection region(pr_t). */
diff --git a/xen/arch/arm/include/asm/mpu/mm.h b/xen/arch/arm/include/asm/mpu/mm.h
index 5cabe9d111ce..9c7a01d6bd58 100644
--- a/xen/arch/arm/include/asm/mpu/mm.h
+++ b/xen/arch/arm/include/asm/mpu/mm.h
@@ -53,6 +53,9 @@ extern void read_protection_region(pr_t *pr_read, uint8_t sel);
 /* Writes the MPU region with index 'sel' to the HW */
 extern void write_protection_region(const pr_t *pr_write, uint8_t sel);
 
+/* Creates a pr_t entry for the MPU data structure */
+extern pr_t pr_of_xenaddr(paddr_t base, paddr_t limit, unsigned attr);
+
 #endif /* __ARM_MPU_MM_H__ */
 
 /*
diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c
index bf281f67fb6b..2c5820a44f13 100644
--- a/xen/arch/arm/mpu/mm.c
+++ b/xen/arch/arm/mpu/mm.c
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 struct page_info *frame_table;
@@ -151,6 +152,78 @@ void write_protection_region(const pr_t *pr_write, uint8_t sel)
     }
 }
 
+/*
+ * Standard entry for building up the structure of MPU memory region(pr_t).
+ * It is equivalent to mfn_to_xen_entry in MMU system.
+ * Base and limit refer to exclusive range [start, limit].
+ */
+pr_t pr_of_xenaddr(paddr_t base, paddr_t limit, unsigned attr)
+{
+    prbar_t prbar;
+    prlar_t prlar;
+    pr_t region;
+
+    /* Build up value for PRBAR_EL2. */
+    prbar = (prbar_t) {
+        .reg = {
+            .ap = AP_RW_EL2,      /* Read/Write at EL2, no access at EL1/EL0. */
+            .xn = XN_EL2_ENABLED, /* No need to execute outside .text */
+        }};
+
+    switch ( attr )
+    {
+    case MT_NORMAL_NC:
+        /*
+         * ARM ARM: Overlaying the shareability attribute (DDI
+         * 0406C.b B3-1376 to 1377)
+         *
+         * A memory region with a resultant memory type attribute of normal,
+         * and a resultant cacheability attribute of Inner non-cacheable,
+         * outer non-cacheable, must have a resultant shareability attribute
+         * of outer shareable, otherwise shareability is UNPREDICTABLE.
+         *
+         * On ARMv8 sharability is ignored and explicitly treated as outer
+         * shareable for normal inner non-cacheable, outer non-cacheable.
+         */
+        prbar.reg.sh = LPAE_SH_OUTER;
+        break;
+    case MT_DEVICE_nGnRnE:
+    case MT_DEVICE_nGnRE:
+        /*
+         * Shareability is ignored for non-normal memory, Outer is as
+         * good as anything.
+         *
+         * On ARMv8 sharability is ignored and explicitly treated as outer
+         * shareable for any device memory type.
+         */
+        prbar.reg.sh = LPAE_SH_OUTER;
+        break;
+    default:
+        /* Xen mappings are SMP coherent */
+        prbar.reg.sh = LPAE_SH_INNER;
+    }
+
+    /* Build up value for PRLAR_EL2. */
+    prlar = (prlar_t) {
+        .reg = {
+            .ns = 0,        /* Hyp mode is in secure world */
+            .ai = attr,
+            .en = 1,        /* Region enabled */
+        }};
+
+    /* Build up MPU memory region. */
+    region = (pr_t) {
+        .prbar = prbar,
+        .prlar = prlar,
+    };
+
+    /* Set base address and limit address. */
+    pr_set_base(®ion, base);
+    pr_set_limit(®ion, limit);
+
+    return region;
+}
+
 void __init setup_mm(void)
 {
     BUG_ON("unimplemented");
-- 
2.34.1



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	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk 
Subject: [PATCH v2 5/7] arm/mpu: Introduce MPU memory mapping flags
Date: Mon,  7 Apr 2025 10:14:28 +0100
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Introduce the MPU memory mapping flags in asm/page.h.

Signed-off-by: Luca Fancellu 
---
 xen/arch/arm/include/asm/page.h | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/xen/arch/arm/include/asm/page.h b/xen/arch/arm/include/asm/page.h
index 69f817d1e68a..22f7d2c6cb30 100644
--- a/xen/arch/arm/include/asm/page.h
+++ b/xen/arch/arm/include/asm/page.h
@@ -62,6 +62,7 @@
 
 #define MAIRVAL (MAIR1VAL << 32 | MAIR0VAL)
 
+#ifdef CONFIG_MMU
 /*
  * Layout of the flags used for updating the hypervisor page tables
  *
@@ -90,6 +91,30 @@
 #define _PAGE_CONTIG_BIT    8
 #define _PAGE_CONTIG        (1U << _PAGE_CONTIG_BIT)
 
+#else /* !CONFIG_MMU */
+
+/*
+ * Layout of the flags used for updating MPU memory region attributes
+ * [0:2] Memory attribute Index
+ * [3:4] Execute Never
+ * [5:6] Access Permission
+ * [7]   Region Present
+ */
+#define _PAGE_AI_BIT            0
+#define _PAGE_XN_BIT            3
+#define _PAGE_AP_BIT            5
+#define _PAGE_PRESENT_BIT       7
+#define _PAGE_AI                (7U << _PAGE_AI_BIT)
+#define _PAGE_XN                (2U << _PAGE_XN_BIT)
+#define _PAGE_RO                (2U << _PAGE_AP_BIT)
+#define _PAGE_PRESENT           (1U << _PAGE_PRESENT_BIT)
+#define PAGE_AI_MASK(x)         (((x) >> _PAGE_AI_BIT) & 0x7U)
+#define PAGE_XN_MASK(x)         (((x) >> _PAGE_XN_BIT) & 0x3U)
+#define PAGE_AP_MASK(x)         (((x) >> _PAGE_AP_BIT) & 0x3U)
+#define PAGE_RO_MASK(x)         (((x) >> _PAGE_AP_BIT) & 0x2U)
+
+#endif /* CONFIG_MMU */
+
 /*
  * _PAGE_DEVICE and _PAGE_NORMAL are convenience defines. They are not
  * meant to be used outside of this header.
-- 
2.34.1



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	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk 
Subject: [PATCH v2 6/7] arm/mpu: Implement early_fdt_map support in MPU systems
Date: Mon,  7 Apr 2025 10:14:29 +0100
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Implement early_fdt_map() function, that is responsible to map the
device tree blob in the early stages of the boot process, since at
this stage the MPU C data structure are not yet initialised, it is
using low level APIs to write into the MPU registers at a fixed
MPU region number.

The MPU memory management is designed to work on pages of PAGE_SIZE
in order to reuse helpers and macros already available on the Xen
memory management system.

Signed-off-by: Luca Fancellu 
---
 xen/arch/arm/mpu/setup.c | 54 ++++++++++++++++++++++++++++++++++++++--
 1 file changed, 52 insertions(+), 2 deletions(-)

diff --git a/xen/arch/arm/mpu/setup.c b/xen/arch/arm/mpu/setup.c
index b4da77003f47..5969065250d4 100644
--- a/xen/arch/arm/mpu/setup.c
+++ b/xen/arch/arm/mpu/setup.c
@@ -1,17 +1,67 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#include 
 #include 
 #include 
+#include 
 #include 
+#include 
 #include 
+#include 
+#include 
 #include 
 
+/* Needs to be kept in sync with the regions programmed in arm64/mpu/head.S */
+#define EARLY_FDT_MAP_REGION_NUMBER 6
+
 void __init setup_pagetables(void) {}
 
 void * __init early_fdt_map(paddr_t fdt_paddr)
 {
-    BUG_ON("unimplemented");
-    return NULL;
+    /* Map at least a page containing the DTB address, exclusive range */
+    paddr_t base_paddr = round_pgdown(fdt_paddr);
+    paddr_t end_paddr = round_pgup(fdt_paddr + sizeof(struct fdt_header));
+    unsigned int flags = PAGE_HYPERVISOR_RO;
+    void *fdt_virt = (void *)fdt_paddr; /* virt == paddr for MPU */
+    pr_t fdt_region;
+
+    /*
+     * Check whether the physical FDT address is set and meets the minimum
+     * alignment requirement. Since we are relying on MIN_FDT_ALIGN to be at
+     * least 8 bytes so that we always access the magic and size fields
+     * of the FDT header after mapping the first chunk, double check if
+     * that is indeed the case.
+     */
+    BUILD_BUG_ON(MIN_FDT_ALIGN < 8);
+    if ( !fdt_paddr || fdt_paddr % MIN_FDT_ALIGN )
+        return NULL;
+
+    /* Map the device tree blob header  */
+    fdt_region = pr_of_xenaddr(base_paddr, end_paddr, PAGE_AI_MASK(flags));
+    fdt_region.prbar.reg.ap = PAGE_AP_MASK(flags);
+    fdt_region.prbar.reg.xn = PAGE_XN_MASK(flags);
+
+    write_protection_region(&fdt_region, EARLY_FDT_MAP_REGION_NUMBER);
+    context_sync_mpu();
+
+    if ( fdt_magic(fdt_virt) != FDT_MAGIC )
+        return NULL;
+
+    end_paddr = round_pgup(fdt_paddr + fdt_totalsize(fdt_virt));
+
+    /*
+     * If the mapped range is not enough, map the rest of the DTB, pr_get_limit
+     * returns an inclusive address of the range, hence the increment.
+     */
+    if ( end_paddr > (pr_get_limit(&fdt_region) + 1) )
+    {
+        pr_set_limit(&fdt_region, end_paddr);
+
+        write_protection_region(&fdt_region, EARLY_FDT_MAP_REGION_NUMBER);
+        context_sync_mpu();
+    }
+
+    return fdt_virt;
 }
 
 /*
-- 
2.34.1



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Subject: [PATCH v2 7/7] arm/mpu: Implement setup_mpu for MPU system
Date: Mon,  7 Apr 2025 10:14:30 +0100
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Implement the function setup_mpu that will logically track the MPU
regions defined by hardware registers, start introducing data
structures and functions to track the status from the C world.

The xen_mpumap_mask bitmap is used to track which MPU region are
enabled at runtime.

This function is called from setup_mm() which full implementation
will be provided in a later stage.

Signed-off-by: Luca Fancellu 
---
 xen/arch/arm/include/asm/arm64/mpu.h |  2 ++
 xen/arch/arm/mpu/mm.c                | 49 +++++++++++++++++++++++++++-
 2 files changed, 50 insertions(+), 1 deletion(-)

diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/asm/arm64/mpu.h
index 7cf8d355a1af..ff5a957bf085 100644
--- a/xen/arch/arm/include/asm/arm64/mpu.h
+++ b/xen/arch/arm/include/asm/arm64/mpu.h
@@ -6,6 +6,8 @@
 #ifndef __ARM_ARM64_MPU_H__
 #define __ARM_ARM64_MPU_H__
 
+#define PRENR_MASK  GENMASK(31, 0)
+
 /*
  * Excute never.
  * Stage 1 EL2 translation regime.
diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c
index 2c5820a44f13..fe05c8097155 100644
--- a/xen/arch/arm/mpu/mm.c
+++ b/xen/arch/arm/mpu/mm.c
@@ -14,6 +14,17 @@
 
 struct page_info *frame_table;
 
+/* Maximum number of supported MPU memory regions by the EL2 MPU. */
+uint8_t __ro_after_init max_xen_mpumap;
+
+/*
+ * Bitmap xen_mpumap_mask is to record the usage of EL2 MPU memory regions.
+ * Bit 0 represents MPU memory region 0, bit 1 represents MPU memory
+ * region 1, ..., and so on.
+ * If a MPU memory region gets enabled, set the according bit to 1.
+ */
+DECLARE_BITMAP(xen_mpumap_mask, MAX_MPU_REGIONS);
+
 /* EL2 Xen MPU memory region mapping table. */
 pr_t xen_mpumap[MAX_MPU_REGIONS];
 
@@ -224,9 +235,45 @@ pr_t pr_of_xenaddr(paddr_t base, paddr_t limit, unsigned attr)
     return region;
 }
 
+/*
+ * The code in this function needs to track the regions programmed in
+ * arm64/mpu/head.S
+ */
+static void __init setup_mpu(void)
+{
+    register_t prenr;
+    unsigned int i = 0;
+
+    /*
+     * MPUIR_EL2.Region[0:7] identifies the number of regions supported by
+     * the EL2 MPU.
+     */
+    max_xen_mpumap = (uint8_t)(READ_SYSREG(MPUIR_EL2) & NUM_MPU_REGIONS_MASK);
+
+    /* PRENR_EL2 has the N bit set if the N region is enabled, N < 32 */
+    prenr = (READ_SYSREG(PRENR_EL2) & PRENR_MASK);
+
+    /*
+     * Set the bitfield for regions enabled in assembly boot-time.
+     * This code works under the assumption that the code in head.S has
+     * allocated and enabled regions below 32 (N < 32).
+     */
+    while ( prenr > 0 )
+    {
+        if (prenr & 0x1)
+        {
+            set_bit(i, xen_mpumap_mask);
+            read_protection_region(&xen_mpumap[i], i);
+        }
+
+        prenr >>= 1;
+        i++;
+    }
+}
+
 void __init setup_mm(void)
 {
-    BUG_ON("unimplemented");
+    setup_mpu();
 }
 
 int modify_xen_mappings(unsigned long s, unsigned long e, unsigned int nf)
-- 
2.34.1



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Subject: Re: [PATCH v3] x86/emulate: Remove HAVE_AS_RDRAND and HAVE_AS_RDSEED
To: dmkhn@proton.me, xen-devel@lists.xenproject.org
Cc: jbeulich@suse.com, roger.pau@citrix.com, dmukhin@ford.com
References: <20250405012417.3108759-1-dmukhin@ford.com>
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From: Andrew Cooper 
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On 05/04/2025 2:25 am, dmkhn@proton.me wrote:
> From: Denis Mukhin 
>
> The new toolchain baseline knows the rdrand/rdseed instructions,
> no need to carry the workaround in the code.

A few minor notes.  Instructions in CAPITALS please to make them easier
to parse in context.  The comma ought to be a semi-colon.

You should note that arch_get_random() is adjusted too.

Also, it's useful to state "No functional change." to help reviewers. 
(Or to help archaeologies figure out the intent of the patch if they
subsequently find a bug in it.)

> diff --git a/xen/arch/x86/include/asm/random.h b/xen/arch/x86/include/asm/random.h
> index 9e1fe0bc1d..e1c1c765e1 100644
> --- a/xen/arch/x86/include/asm/random.h
> +++ b/xen/arch/x86/include/asm/random.h
> @@ -8,7 +8,7 @@ static inline unsigned int arch_get_random(void)
>      unsigned int val = 0;
>  
>      if ( cpu_has(¤t_cpu_data, X86_FEATURE_RDRAND) )
> -        asm volatile ( ".byte 0x0f,0xc7,0xf0" : "+a" (val) );
> +        asm volatile ( "rdrand %0" : "=a" (val) );

This was only tied to "a" because 0xf0 is the ModRM byte.  Now that we
can use the mnemonic, it can become "=r".

I've fixed all on commit.

~Andrew


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Subject: Re: [PATCH 5.15.y 1/1] xen/swiotlb: relax alignment requirements
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On 07/04/25 12:44 PM, Greg KH wrote:
> On Mon, Apr 07, 2025 at 12:02:35AM -0700, Harshvardhan Jha wrote:
>> [ Upstream commit 099606a7b2d53e99ce31af42894c1fc9d77c6db9]
> Wrong git id :(

Ah my bad is it 85fcb57c983f423180ba6ec5d0034242da05cc54 instead?

Harshvardhan



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Subject: Re: [PATCH v3] x86/vmx: Rework VMX wrappers using `asm goto()`
To: dmkhn@proton.me, xen-devel@lists.xenproject.org
Cc: jbeulich@suse.com, roger.pau@citrix.com, dmukhin@ford.com
References: <20250405012729.3109108-1-dmukhin@ford.com>
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From: Andrew Cooper 
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On 05/04/2025 2:27 am, dmkhn@proton.me wrote:
> diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmx.h b/xen/arch/x86/include/asm/hvm/vmx/vmx.h
> index affb3a8bd6..6aa6e1f212 100644
> --- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h
> +++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h
> @@ -294,28 +294,30 @@ extern uint8_t posted_intr_vector;
>  
>  static always_inline void __vmptrld(u64 addr)
>  {
> -    asm volatile ( "vmptrld %0\n\t"
> -                   /* CF==1 or ZF==1 --> BUG() */
> -                   UNLIKELY_START(be, vmptrld)
> -                   _ASM_BUGFRAME_TEXT(0)
> -                   UNLIKELY_END_SECTION
> -                   :
> -                   : "m" (addr),
> -                     _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, 0)
> -                   : "memory" );
> +    asm goto ( "vmptrld %[addr]\n\t"
> +               "jbe %l[vmfail]\n"

This should be without \n too, as it's the last line of assembly.

I've fixed on commit.

~Andrew


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From: "Anthony PERARD" 
Subject: =?utf-8?Q?Re:=20[PATCH=20v3=203/3]=20xen:=20debug:=20gcov:=20add=20condition=20coverage=20support?=
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To: "Volodymyr Babchuk" 
Cc: "Jan Beulich" , "Andrew Cooper" , "Michal Orzel" , "Julien Grall" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Stefano Stabellini" , xen-devel@lists.xenproject.org
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References: <20250401011744.2267367-1-volodymyr_babchuk@epam.com> <20250401011744.2267367-4-volodymyr_babchuk@epam.com> <7281b7d8-ba7b-4658-82f1-a63d66c1baff@suse.com> <87mscvffo8.fsf@epam.com>
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On Sat, Apr 05, 2025 at 03:30:49AM +0000, Volodymyr Babchuk wrote:
> --- a/xen/Rules.mk
> +++ b/xen/Rules.mk
> @@ -133,18 +133,19 @@ $(filter %.init.o,$(obj-y) $(obj-bin-y) $(extra-y)): CFLAGS-y += -DINIT_SECTIONS
>  
>  non-init-objects = $(filter-out %.init.o, $(obj-y) $(obj-bin-y) $(extra-y))
>  
> -ifeq ($(CONFIG_COVERAGE),y)

This removes an "ifeq ()", so you probably need to remove and "endif"
somewhere else, which doesn't appear in this snippet.

>  ifeq ($(CONFIG_CC_IS_CLANG),y)
> -    COV_FLAGS := -fprofile-instr-generate -fcoverage-mapping
> +    cov-flags-$(CONFIG_COVERAGE) := -fprofile-instr-generate -fcoverage-mapping

If you do this assignment like that, it would be better to make sure
$(cov-flags-y) is initialised properly, that is have a:

  cov-flags-y :=

before the first conditional assignment, then have all conditional
assignment be +=.

>  else
> -    COV_FLAGS := -fprofile-arcs -ftest-coverage
> +    cov-flags-$(CONFIG_COVERAGE) := -fprofile-arcs -ftest-coverage
> +    cov-flags-$(CONFIG_CONDITION_COVERAGE) += -fcondition-coverage

What happen if CONFIG_CONDITION_COVERAGE=y but CONFIG_COVERAGE=n ?

>  endif
>  
> -# Reset COV_FLAGS in cases where an objects has another one as prerequisite
> +# Reset cov-flags-y in cases where an objects has another one as prerequisite
>  $(nocov-y) $(filter %.init.o, $(obj-y) $(obj-bin-y) $(extra-y)): \
> -    COV_FLAGS :=
> +    cov-flags-y :=
>  
> -$(non-init-objects): _c_flags += $(COV_FLAGS)
> +$(non-init-objects): _c_flags += $(cov-flags-y)
>  endif

Cheers,

-- 

Anthony Perard | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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Date: Mon, 7 Apr 2025 12:09:42 +0200
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Subject: Re: [PATCH v2] xen/riscv: Increase XEN_VIRT_SIZE
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <808d1b346bc90dde38fd19a6b92ab78d78e42936.1743766932.git.oleksii.kurochko@gmail.com>
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From: Jan Beulich 
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On 04.04.2025 18:04, Oleksii Kurochko wrote:
> --- a/xen/arch/riscv/include/asm/config.h
> +++ b/xen/arch/riscv/include/asm/config.h
> @@ -41,11 +41,11 @@
>   * Start addr          | End addr         | Slot       | area description
>   * ============================================================================
>   *                   .....                 L2 511          Unused
> - *  0xffffffffc0a00000  0xffffffffc0bfffff L2 511          Fixmap
> + *  0xffffffffc1800000  0xffffffffc1afffff L2 511          Fixmap

Isn't the upper bound 0xffffffffc19fffff now?

> --- a/xen/arch/riscv/include/asm/mm.h
> +++ b/xen/arch/riscv/include/asm/mm.h
> @@ -43,13 +43,19 @@ static inline void *maddr_to_virt(paddr_t ma)
>   */
>  static inline unsigned long virt_to_maddr(unsigned long va)
>  {
> +    const unsigned int vpn1_shift = PAGETABLE_ORDER + PAGE_SHIFT;
> +    const unsigned long va_vpn = va >> vpn1_shift;
> +    const unsigned long xen_virt_start_vpn =
> +        _AC(XEN_VIRT_START, UL) >> vpn1_shift;
> +    const unsigned long xen_virt_end_vpn =
> +        xen_virt_start_vpn + ((XEN_VIRT_SIZE >> vpn1_shift) - 1);
> +
>      if ((va >= DIRECTMAP_VIRT_START) &&
>          (va <= DIRECTMAP_VIRT_END))
>          return directmapoff_to_maddr(va - directmap_virt_start);
>  
> -    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(2));
> -    ASSERT((va >> (PAGETABLE_ORDER + PAGE_SHIFT)) ==
> -           (_AC(XEN_VIRT_START, UL) >> (PAGETABLE_ORDER + PAGE_SHIFT)));
> +    BUILD_BUG_ON(XEN_VIRT_SIZE > GB(1));
> +    ASSERT((va_vpn >= xen_virt_start_vpn) && (va_vpn <= xen_virt_end_vpn));

Not all of the range is backed by memory, and for the excess space the
translation is therefore (likely) wrong. Which better would be caught by
the assertion?

> --- a/xen/arch/riscv/mm.c
> +++ b/xen/arch/riscv/mm.c
> @@ -31,20 +31,27 @@ unsigned long __ro_after_init phys_offset; /* = load_start - XEN_VIRT_START */
>  #define LOAD_TO_LINK(addr) ((unsigned long)(addr) - phys_offset)
>  
>  /*
> - * It is expected that Xen won't be more then 2 MB.
> + * It is expected that Xen won't be more then XEN_VIRT_SIZE MB.
>   * The check in xen.lds.S guarantees that.
> - * At least 3 page tables (in case of Sv39 ) are needed to cover 2 MB.
> - * One for each page level table with PAGE_SIZE = 4 Kb.
>   *
> - * One L0 page table can cover 2 MB(512 entries of one page table * PAGE_SIZE).
> + * Root page table is shared with the initial mapping and is declared
> + * separetely. (look at stage1_pgtbl_root)
>   *
> - * It might be needed one more page table in case when Xen load address
> - * isn't 2 MB aligned.
> + * An amount of page tables between root page table and L0 page table
> + * (in the case of Sv39 it covers L1 table):
> + *   (CONFIG_PAGING_LEVELS - 2) are needed for an identity mapping and
> + *   the same amount are needed for Xen.
>   *
> - * CONFIG_PAGING_LEVELS page tables are needed for the identity mapping,
> - * except that the root page table is shared with the initial mapping
> + * An amount of L0 page tables:
> + *   (512 entries of one L0 page table covers 2MB == 1< + *   XEN_VIRT_SIZE >> XEN_PT_LEVEL_SHIFT(1) are needed for Xen and
> + *   one L0 is needed for indenity mapping.
> + *
> + *   It might be needed one more page table in case when Xen load
> + *   address isn't 2 MB aligned.

Shouldn't we guarantee that? What may require an extra page table is when Xen
crosses a 1Gb boundary (unless we also guaranteed that it won't).

Jan


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Subject: Re: [PATCH] sched/null: avoid another crash after failed domU
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To: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= ,
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Cc: Dario Faggioli , George Dunlap ,
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On 04.04.2025 09:38, Jürgen Groß wrote:
> On 04.04.25 09:24, Jan Beulich wrote:
>> On 03.04.2025 23:48, Stewart Hildebrand wrote:
>>> The following sequence of events may lead a debug build of Xen to crash
>>> when using the null scheduler:
>>>
>>> 1. domain creation (e.g. d1) failed due to bad configuration
>>> 2. complete_domain_destroy() was deferred
>>> 3. domain creation (e.g. d2) succeeds
>>>
>>> At this point, d2 is running, while the zombie d1 is not fully cleaned
>>> up:
>>>
>>> (XEN) Online Cpus: 0-3
>>> (XEN) Cpupool 0:
>>> (XEN) Cpus: 0-3
>>> (XEN) Scheduling granularity: cpu, 1 CPU per sched-resource
>>> (XEN) Scheduler: null Scheduler (null)
>>> (XEN)   cpus_free = 3
>>> (XEN) Domain info:
>>> (XEN)   Domain: 0
>>> (XEN)     1: [0.0] pcpu=0
>>> (XEN)     2: [0.1] pcpu=1
>>> (XEN)   Domain: 1
>>> (XEN)     3: [1.0] pcpu=2
>>> (XEN)   Domain: 2
>>> (XEN)     4: [2.0] pcpu=2
>>>
>>> 4. complete_domain_destroy() gets called for d1 and triggers the
>>> following:
>>>
>>> (XEN) Xen call trace:
>>> (XEN)    [<00000a0000322ed4>] null.c#unit_deassign+0x2d8/0xb70 (PC)
>>> (XEN)    [<00000a000032457c>] null.c#null_unit_remove+0x670/0xba8 (LR)
>>> (XEN)    [<00000a000032457c>] null.c#null_unit_remove+0x670/0xba8
>>> (XEN)    [<00000a0000336404>] sched_destroy_vcpu+0x354/0x8fc
>>> (XEN)    [<00000a0000227324>] domain.c#complete_domain_destroy+0x11c/0x49c
>>> (XEN)    [<00000a000029fbd0>] rcupdate.c#rcu_do_batch+0x94/0x3d0
>>> (XEN)    [<00000a00002a10c0>] rcupdate.c#__rcu_process_callbacks+0x160/0x5f4
>>> (XEN)    [<00000a00002a1e60>] rcupdate.c#rcu_process_callbacks+0xcc/0x1b0
>>> (XEN)    [<00000a00002a3460>] softirq.c#__do_softirq+0x1f4/0x3d8
>>> (XEN)    [<00000a00002a37c4>] do_softirq+0x14/0x1c
>>> (XEN)    [<00000a0000465260>] traps.c#check_for_pcpu_work+0x30/0xb8
>>> (XEN)    [<00000a000046bb08>] leave_hypervisor_to_guest+0x28/0x198
>>> (XEN)    [<00000a0000409c84>] entry.o#guest_sync_slowpath+0xac/0xd8
>>> (XEN)
>>> (XEN) ****************************************
>>> (XEN) Panic on CPU 0:
>>> (XEN) Assertion 'npc->unit == unit' failed at common/sched/null.c:383
>>> (XEN) ****************************************
>>>
>>> Fix by skipping unit_deassign() when the unit to be removed does not
>>> match the pcpu's currently assigned unit.
>>>
>>> Signed-off-by: Stewart Hildebrand 
>>
>> Just one remark here: This almost certainly wants a Fixes: tag.
> 
> This will probably be d671da3be3ca (the initial NULL scheduler commit).

The code in question was added by c2eae2614c8f ("sched/null: avoid crash
after failed domU creation").

Jan


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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org,
	linux-kernel@vger.kernel.org
Cc: Stefano Stabellini ,
	jason.andryuk@amd.com,
	Xenia.Ragiadakou@amd.com,
	Alejandro.GarciaVallejo@amd.com,
	Roger Pau Monne ,
	Juergen Gross ,
	Boris Ostrovsky ,
	Thomas Gleixner ,
	Ingo Molnar ,
	Borislav Petkov ,
	Dave Hansen ,
	x86@kernel.org,
	"H. Peter Anvin" 
Subject: [PATCH] x86/xen: disable CPU idle and frequency drivers for PVH dom0
Date: Mon,  7 Apr 2025 12:18:41 +0200
Message-ID: <20250407101842.67228-1-roger.pau@citrix.com>
X-Mailer: git-send-email 2.48.1
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When running as a PVH dom0 the ACPI tables exposed to Linux are (mostly)
the native ones, thus exposing the C and P states, that can lead to
attachment of CPU idle and frequency drivers.  However the entity in
control of the CPU C and P states is Xen, as dom0 doesn't have a full view
of the system load, neither has all CPUs assigned and identity pinned.

Like it's done for classic PV guests, prevent Linux from using idle or
frequency state drivers when running as a PVH dom0.

On an AMD EPYC 7543P system without this fix a Linux PVH dom0 will keep the
host CPUs spinning at 100% even when dom0 is completely idle, as it's
attempting to use the acpi_idle driver.

Signed-off-by: Roger Pau Monné 
---
 arch/x86/xen/enlighten_pvh.c | 19 ++++++++++++++++++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/arch/x86/xen/enlighten_pvh.c b/arch/x86/xen/enlighten_pvh.c
index 0e3d930bcb89..9d25d9373945 100644
--- a/arch/x86/xen/enlighten_pvh.c
+++ b/arch/x86/xen/enlighten_pvh.c
@@ -1,5 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0
 #include 
+#include 
+#include 
 #include 
 #include 
 
@@ -123,8 +125,23 @@ static void __init pvh_arch_setup(void)
 {
 	pvh_reserve_extra_memory();
 
-	if (xen_initial_domain())
+	if (xen_initial_domain()) {
 		xen_add_preferred_consoles();
+
+		/*
+		 * Disable usage of CPU idle and frequency drivers: when
+		 * running as hardware domain the exposed native ACPI tables
+		 * causes idle and/or frequency drivers to attach and
+		 * malfunction.  It's Xen the entity that controls the idle and
+		 * frequency states.
+		 *
+		 * For unprivileged domains the exposed ACPI tables are
+		 * fabricated and don't contain such data.
+		 */
+		disable_cpuidle();
+		disable_cpufreq();
+		WARN_ON(xen_set_default_idle());
+	}
 }
 
 void __init xen_pvh_init(struct boot_params *boot_params)
-- 
2.48.1



From xen-devel-bounces@lists.xenproject.org Mon Apr 07 10:37:18 2025
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From: Volodymyr Babchuk 
To: Anthony PERARD 
CC: Jan Beulich , Andrew Cooper
	, Michal Orzel , Julien
 Grall , =?iso-8859-1?Q?Roger_Pau_Monn=E9?=
	, Stefano Stabellini ,
	"xen-devel@lists.xenproject.org" 
Subject: Re: [PATCH v3 3/3] xen: debug: gcov: add condition coverage support
Thread-Topic: [PATCH v3 3/3] xen: debug: gcov: add condition coverage support
Thread-Index: AQHboqPjQYlXeZrAE0u+zEMqLR0ZhQ==
Date: Mon, 7 Apr 2025 10:37:02 +0000
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References: <20250401011744.2267367-1-volodymyr_babchuk@epam.com>
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	<7281b7d8-ba7b-4658-82f1-a63d66c1baff@suse.com>	<87mscvffo8.fsf@epam.com>
 
In-Reply-To:  (Anthony PERARD's message of "Mon, 07 Apr
	2025 09:57:00 +0000")
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Hi Anthony,

"Anthony PERARD"  writes:

> On Sat, Apr 05, 2025 at 03:30:49AM +0000, Volodymyr Babchuk wrote:
>> --- a/xen/Rules.mk
>> +++ b/xen/Rules.mk
>> @@ -133,18 +133,19 @@ $(filter %.init.o,$(obj-y) $(obj-bin-y) $(extra-y)=
): CFLAGS-y +=3D -DINIT_SECTIONS
>> =20
>>  non-init-objects =3D $(filter-out %.init.o, $(obj-y) $(obj-bin-y) $(ext=
ra-y))
>> =20
>> -ifeq ($(CONFIG_COVERAGE),y)
>
> This removes an "ifeq ()", so you probably need to remove and "endif"
> somewhere else, which doesn't appear in this snippet.

Yes, I'm sorry, it just didn't got into the snippet. I wanted to discuss
approach only, so this is not the final version.

>>  ifeq ($(CONFIG_CC_IS_CLANG),y)
>> -    COV_FLAGS :=3D -fprofile-instr-generate -fcoverage-mapping
>> +    cov-flags-$(CONFIG_COVERAGE) :=3D -fprofile-instr-generate -fcovera=
ge-mapping
>
> If you do this assignment like that, it would be better to make sure
> $(cov-flags-y) is initialised properly, that is have a:
>
>   cov-flags-y :=3D
>
> before the first conditional assignment, then have all conditional
> assignment be +=3D.

Sure.

>
>>  else
>> -    COV_FLAGS :=3D -fprofile-arcs -ftest-coverage
>> +    cov-flags-$(CONFIG_COVERAGE) :=3D -fprofile-arcs -ftest-coverage
>> +    cov-flags-$(CONFIG_CONDITION_COVERAGE) +=3D -fcondition-coverage
>
> What happen if CONFIG_CONDITION_COVERAGE=3Dy but CONFIG_COVERAGE=3Dn ?

Kconfig ensures that this is impossible:

config CONDITION_COVERAGE
	bool "Condition coverage support"
	depends on COVERAGE && CC_HAS_MCDC

I believe, this is enough, and we don't need a separate check on
Makefile level.

--=20
WBR, Volodymyr=


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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH] x86/vmx: Drop memory clobbers on VMX instruction wrappers
Date: Mon,  7 Apr 2025 11:45:44 +0100
Message-Id: <20250407104544.1823150-1-andrew.cooper3@citrix.com>
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The use, or not, of memory clobbers on the VMX instructions is complicated.

There are two separate aspects to consider:

1. Originally, the VMX instructions used hardcoded bytes, including memory
   encodings.  Therefore, the compiler couldn't see the correct relationship
   between parameters.  The memory clobber for this purpose should have been
   dropped when switching to mnemonics.

   This covers INVEPT and INVVPID, each of which has no change in memory, nor
   in fact the current address space in use.

2. Most of these instructions operate on a VMCS region.  This is a (mostly)
   opaque data structure, operated on by physical address.  Again, this hides
   the relationship between the instructions and the VMCS from the compiler.

   The processor might use internal state to cache the VMCS (writing it back
   to memory on VMCLEAR), or it might operate on memory directly.

   Because the VMCS is opaque (so the compiler has nothing interesting to know
   about it), and because VMREAD/VMWRITE have chosen not to use a memory
   clobber (to tell the compiler that something changed), none of the other
   VMX instructions should use a memory clobber either.

   This covers VMXON, VMXOFF, VMPTRLD and VMPTCLEAR.

Make the use of memory clobbers consistent for all VMX instructions.

Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
CC: Roger Pau Monné 

Based on top of the posted cleanup.
---
 xen/arch/x86/hvm/vmx/vmcs.c            | 4 ++--
 xen/arch/x86/include/asm/hvm/vmx/vmx.h | 8 ++++----
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c
index a44475ae15bd..6daaeaa656a8 100644
--- a/xen/arch/x86/hvm/vmx/vmcs.c
+++ b/xen/arch/x86/hvm/vmx/vmcs.c
@@ -754,7 +754,7 @@ static int _vmx_cpu_up(bool bsp)
                _ASM_EXTABLE(1b, %l[vmxon_fault])
                :
                : [addr] "m" (this_cpu(vmxon_region))
-               : "memory"
+               :
                : vmxon_fail, vmxon_fault );
 
     this_cpu(vmxon) = 1;
@@ -811,7 +811,7 @@ void cf_check vmx_cpu_down(void)
 
     BUG_ON(!(read_cr4() & X86_CR4_VMXE));
     this_cpu(vmxon) = 0;
-    asm volatile ( "vmxoff" ::: "memory" );
+    asm volatile ( "vmxoff" );
 
     local_irq_restore(flags);
 }
diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmx.h b/xen/arch/x86/include/asm/hvm/vmx/vmx.h
index 33d3d43a3851..86349d4a5431 100644
--- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h
+++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h
@@ -298,7 +298,7 @@ static always_inline void __vmptrld(u64 addr)
                "jbe %l[vmfail]"
                :
                : [addr] "m" (addr)
-               : "memory"
+               :
                : vmfail );
     return;
 
@@ -312,7 +312,7 @@ static always_inline void __vmpclear(u64 addr)
                "jbe %l[vmfail]"
                :
                : [addr] "m" (addr)
-               : "memory"
+               :
                : vmfail );
     return;
 
@@ -408,7 +408,7 @@ static always_inline void __invept(unsigned long type, uint64_t eptp)
                "jbe %l[vmfail]"
                :
                : [operand] "m" (operand), [type] "r" (type)
-               : "memory"
+               :
                : vmfail );
     return;
 
@@ -430,7 +430,7 @@ static always_inline void __invvpid(unsigned long type, u16 vpid, u64 gva)
                "2:" _ASM_EXTABLE(1b, 2b)
                :
                : [operand] "m" (operand), [type] "r" (type)
-               : "memory"
+               :
                : vmfail );
     return;
 

base-commit: befc384d21784affa3daf2abc85b02500e4dc545
prerequisite-patch-id: 727f158a737c65bca1e4210a6bc132302037f55c
prerequisite-patch-id: 3f88b36cbba121e9893b4c8b52df9aea4f58e8ad
prerequisite-patch-id: c0b199b9ceb1ddd659e27ec8571741bd78ae6265
-- 
2.39.5



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Anthony PERARD ,
	Juergen Gross ,
	Andrew Cooper 
Subject: [PATCH] tools/libxl: do not use `-c -E` compiler options together
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It makes no sense to request for preprocessor only output and also request
object file generation.  Fix the _libxl.api-for-check target to only use
-E (preprocessor output).

Also Clang 20.0 reports an error if both options are used.

Reported-by: Andrew Cooper 
Fixes: 2862bf5b6c81 ('libxl: enforce prohibitions of internal callers')
Signed-off-by: Roger Pau Monné 
---
 tools/libs/light/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/libs/light/Makefile b/tools/libs/light/Makefile
index 37e4d1670986..b690d921593d 100644
--- a/tools/libs/light/Makefile
+++ b/tools/libs/light/Makefile
@@ -195,7 +195,7 @@ libxl.api-ok: check-libxl-api-rules _libxl.api-for-check
 	touch $@
 
 _libxl.api-for-check: $(XEN_INCLUDE)/libxl.h
-	$(CC) $(CPPFLAGS) $(CFLAGS) -c -E $< $(APPEND_CFLAGS) \
+	$(CC) $(CPPFLAGS) $(CFLAGS) -E $< $(APPEND_CFLAGS) \
 		-DLIBXL_EXTERNAL_CALLERS_ONLY=LIBXL_EXTERNAL_CALLERS_ONLY \
 		>$@.new
 	mv -f $@.new $@
-- 
2.48.1



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Subject: Re: [PATCH] tools/libxl: do not use `-c -E` compiler options together
To: Roger Pau Monne , xen-devel@lists.xenproject.org
Cc: Anthony PERARD ,
 Juergen Gross , Jan Beulich 
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On 07/04/2025 12:09 pm, Roger Pau Monne wrote:
> It makes no sense to request for preprocessor only output and also request
> object file generation.  Fix the _libxl.api-for-check target to only use
> -E (preprocessor output).
>
> Also Clang 20.0 reports an error if both options are used.
>
> Reported-by: Andrew Cooper 
> Fixes: 2862bf5b6c81 ('libxl: enforce prohibitions of internal callers')
> Signed-off-by: Roger Pau Monné 

Acked-by: Andrew Cooper 

As this is impacting GitlabCI, it wants backporting (ideally everywhere,
although I'm still accumulating other CI fixes on 4.18 and earlier).

~Andrew


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Subject: [PATCH] x86/MTRR: make hold_mtrr_updates_on_aps static and bool
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It's not used outside of the CU defining it, and it is clearly of
boolean nature.

Signed-off-by: Jan Beulich 

--- a/xen/arch/x86/cpu/mtrr/main.c
+++ b/xen/arch/x86/cpu/mtrr/main.c
@@ -118,7 +118,7 @@ struct set_mtrr_data {
  * After all the cpus have came up, then mtrr_aps_sync_end() synchronizes all 
  * the cpus and updates mtrrs on all of them. Then this flag is turned off.
  */
-int hold_mtrr_updates_on_aps;
+static bool hold_mtrr_updates_on_aps;
 
 static void cf_check ipi_handler(void *info)
 /*  [SUMMARY] Synchronisation handler. Executed by "other" CPUs.
@@ -600,14 +600,14 @@ void mtrr_save_state(void)
 
 void mtrr_aps_sync_begin(void)
 {
-	hold_mtrr_updates_on_aps = 1;
+	hold_mtrr_updates_on_aps = true;
 }
 
 void mtrr_aps_sync_end(void)
 {
 	if (mtrr_if)
 		set_mtrr(~0U, 0, 0, 0);
-	hold_mtrr_updates_on_aps = 0;
+	hold_mtrr_updates_on_aps = false;
 }
 
 void asmlinkage mtrr_bp_restore(void)
--- a/xen/arch/x86/include/asm/mtrr.h
+++ b/xen/arch/x86/include/asm/mtrr.h
@@ -63,7 +63,6 @@ extern uint32_t get_pat_flags(struct vcp
                               paddr_t gpaddr, paddr_t spaddr,
                               uint8_t gmtrr_mtype);
 extern uint8_t pat_type_2_pte_flags(uint8_t pat_type);
-extern int hold_mtrr_updates_on_aps;
 extern void mtrr_aps_sync_begin(void);
 extern void mtrr_aps_sync_end(void);
 


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To: "xen-devel@lists.xenproject.org" 
Cc: Anthony PERARD ,
 Juergen Gross 
From: Jan Beulich 
Subject: [PATCH] libxl{,u}: replace TOSTRING()
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Now that common-macros.h has STR() available, which is even slightly
more flexible, use that and drop the custom macros.

No difference in generated code (except for line numbers, of course,
where embedded in code/data).

Signed-off-by: Jan Beulich 

--- a/tools/libs/light/libxl_disk.c
+++ b/tools/libs/light/libxl_disk.c
@@ -53,7 +53,7 @@ static void disk_eject_xswatch_callback(
     }
 
     sscanf(backend,
-            "/local/domain/%d/backend/%" TOSTRING(BACKEND_STRING_SIZE)
+           "/local/domain/%d/backend/%" STR(BACKEND_STRING_SIZE)
            "[a-z]/%*d/%*d",
            &disk->backend_domid, backend_type);
     if (!strcmp(backend_type, "tap") ||
--- a/tools/libs/light/libxl_internal.h
+++ b/tools/libs/light/libxl_internal.h
@@ -2093,9 +2093,6 @@ _hidden int libxl__init_recursive_mutex(
 
 _hidden int libxl__gettimeofday(libxl__gc *gc, struct timeval *now_r);
 
-#define STRINGIFY(x) #x
-#define TOSTRING(x) STRINGIFY(x)
-
 /* from libxl_qmp */
 typedef struct libxl__qmp_handler libxl__qmp_handler;
 
--- a/tools/libs/util/libxlu_disk_l.c
+++ b/tools/libs/util/libxlu_disk_l.c
@@ -1152,7 +1152,7 @@ void xlu__disk_yyset_column(int  column_
 #define DSET(dpc,member,enumname,str,valname) do{			\
 	if (dpc->disk->member != LIBXL_DISK_##enumname##_UNKNOWN &&	\
 	    dpc->disk->member != LIBXL_DISK_##enumname##_##valname) {	\
-	    xlu__disk_err(dpc, str, TOSTRING(member) " respecified");	\
+	    xlu__disk_err(dpc, str, STR(member) " respecified");	\
 	} else {							\
 	    dpc->disk->member = LIBXL_DISK_##enumname##_##valname;	\
 	}								\
--- a/tools/libs/util/libxlu_disk_l.l
+++ b/tools/libs/util/libxlu_disk_l.l
@@ -64,7 +64,7 @@ void xlu__disk_yyset_column(int  column_
 #define DSET(dpc,member,enumname,str,valname) do{			\
 	if (dpc->disk->member != LIBXL_DISK_##enumname##_UNKNOWN &&	\
 	    dpc->disk->member != LIBXL_DISK_##enumname##_##valname) {	\
-	    xlu__disk_err(dpc, str, TOSTRING(member) " respecified");	\
+	    xlu__disk_err(dpc, str, STR(member) " respecified");	\
 	} else {							\
 	    dpc->disk->member = LIBXL_DISK_##enumname##_##valname;	\
 	}								\
--- a/tools/libs/util/libxlu_internal.h
+++ b/tools/libs/util/libxlu_internal.h
@@ -25,6 +25,8 @@
 
 #include "libxlutil.h"
 
+#include 
+
 struct XLU_ConfigList {
     int avalues; /* available slots */
     int nvalues; /* actual occupied slots */
@@ -69,10 +71,6 @@ typedef struct {
     void *scanner;
 } CfgParseContext;
 
-
-#define STRINGIFY(x) #x
-#define TOSTRING(x) STRINGIFY(x)
-
 #endif /*LIBXLU_INTERNAL_H*/
 
 /*


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Subject: Ping: [PATCH] libxc/PM: correct (not just) error handling in
 xc_get_cpufreq_para()
From: Jan Beulich 
To: Anthony Perard 
Cc: Juergen Gross ,
 "xen-devel@lists.xenproject.org" 
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On 27.03.2025 14:32, Jan Beulich wrote:
> From their introduction all xc_hypercall_bounce_pre() uses, when they
> failed, would properly cause exit from the function including cleanup,
> yet without informing the caller of the failure. Purge the unlock_1
> label for being both pointless and mis-named.
> 
> An earlier attempt to switch to the usual split between return value and
> errno wasn't quite complete.
> 
> HWP work made the cleanup of the "available governors" array
> conditional, neglecting the fact that the condition used may not be the
> condition that was used to allocate the buffer (as the structure field
> is updated upon getting back EAGAIN). Throughout the function, use the
> local variable being introduced to address that.
> 
> Fixes: 4513025a8790 ("libxc: convert sysctl interfaces over to hypercall buffers")
> Amends: 73367cf3b4b4 ("libxc: Fix xc_pm API calls to return negative error and stash error in errno")
> Fixes: 31e264c672bc ("pmstat&xenpm: Re-arrage for cpufreq union")
> Signed-off-by: Jan Beulich 

May I ask for an ack or comments towards what needs changing?

Thanks, Jan

> --- a/tools/libs/ctrl/xc_pm.c
> +++ b/tools/libs/ctrl/xc_pm.c
> @@ -212,31 +212,32 @@ int xc_get_cpufreq_para(xc_interface *xc
>      DECLARE_NAMED_HYPERCALL_BOUNCE(scaling_available_governors,
>  			 user_para->scaling_available_governors,
>  			 user_para->gov_num * CPUFREQ_NAME_LEN * sizeof(char), XC_HYPERCALL_BUFFER_BOUNCE_BOTH);
> -
> -    bool has_num = user_para->cpu_num &&
> -                     user_para->freq_num &&
> -                     user_para->gov_num;
> +    unsigned int in_gov_num = user_para->gov_num;
> +    bool has_num = user_para->cpu_num && user_para->freq_num;
>  
>      if ( has_num )
>      {
>          if ( (!user_para->affected_cpus)                    ||
>               (!user_para->scaling_available_frequencies)    ||
> -             (user_para->gov_num && !user_para->scaling_available_governors) )
> +             (in_gov_num && !user_para->scaling_available_governors) )
>          {
>              errno = EINVAL;
>              return -1;
>          }
> -        if ( xc_hypercall_bounce_pre(xch, affected_cpus) )
> -            goto unlock_1;
> -        if ( xc_hypercall_bounce_pre(xch, scaling_available_frequencies) )
> +        ret = xc_hypercall_bounce_pre(xch, affected_cpus);
> +        if ( ret )
> +            return ret;
> +        ret = xc_hypercall_bounce_pre(xch, scaling_available_frequencies);
> +        if ( ret )
>              goto unlock_2;
> -        if ( user_para->gov_num &&
> -             xc_hypercall_bounce_pre(xch, scaling_available_governors) )
> +        if ( in_gov_num )
> +            ret = xc_hypercall_bounce_pre(xch, scaling_available_governors);
> +        if ( ret )
>              goto unlock_3;
>  
>          set_xen_guest_handle(sys_para->affected_cpus, affected_cpus);
>          set_xen_guest_handle(sys_para->scaling_available_frequencies, scaling_available_frequencies);
> -        if ( user_para->gov_num )
> +        if ( in_gov_num )
>              set_xen_guest_handle(sys_para->scaling_available_governors,
>                                   scaling_available_governors);
>      }
> @@ -246,7 +247,7 @@ int xc_get_cpufreq_para(xc_interface *xc
>      sysctl.u.pm_op.cpuid = cpuid;
>      sys_para->cpu_num  = user_para->cpu_num;
>      sys_para->freq_num = user_para->freq_num;
> -    sys_para->gov_num  = user_para->gov_num;
> +    sys_para->gov_num  = in_gov_num;
>  
>      ret = xc_sysctl(xch, &sysctl);
>      if ( ret )
> @@ -256,12 +257,11 @@ int xc_get_cpufreq_para(xc_interface *xc
>              user_para->cpu_num  = sys_para->cpu_num;
>              user_para->freq_num = sys_para->freq_num;
>              user_para->gov_num  = sys_para->gov_num;
> -            ret = -errno;
>          }
>  
>          if ( has_num )
>              goto unlock_4;
> -        goto unlock_1;
> +        return ret;
>      }
>      else
>      {
> @@ -298,13 +298,13 @@ int xc_get_cpufreq_para(xc_interface *xc
>      }
>  
>  unlock_4:
> -    if ( user_para->gov_num )
> +    if ( in_gov_num )
>          xc_hypercall_bounce_post(xch, scaling_available_governors);
>  unlock_3:
>      xc_hypercall_bounce_post(xch, scaling_available_frequencies);
>  unlock_2:
>      xc_hypercall_bounce_post(xch, affected_cpus);
> -unlock_1:
> +
>      return ret;
>  }
>  



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From: "Anthony PERARD" 
Subject: =?utf-8?Q?Re:=20[PATCH]=20tools/libxl:=20do=20not=20use=20`-c=20-E`=20compiler=20options=20together?=
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To: "Roger Pau Monne" 
Cc: xen-devel@lists.xenproject.org, "Juergen Gross" , "Andrew Cooper" 
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On Mon, Apr 07, 2025 at 01:09:38PM +0200, Roger Pau Monne wrote:
> It makes no sense to request for preprocessor only output and also reques=
t
> object file generation.  Fix the _libxl.api-for-check target to only use
> -E (preprocessor output).
> 
> Also Clang 20.0 reports an error if both options are used.
> 
> Reported-by: Andrew Cooper 
> Fixes: 2862bf5b6c81 ('libxl: enforce prohibitions of internal callers')
> Signed-off-by: Roger Pau Monn=C3=A9 

Acked-by: Anthony PERARD 

Thanks,

-- 

Anthony Perard | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech





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Subject: Re: [PATCH] x86/MTRR: make hold_mtrr_updates_on_aps static and bool
To: Jan Beulich ,
 "xen-devel@lists.xenproject.org" 
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On 07/04/2025 12:28 pm, Jan Beulich wrote:
> It's not used outside of the CU defining it, and it is clearly of
> boolean nature.
>
> Signed-off-by: Jan Beulich 

Acked-by: Andrew Cooper 


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Date: Mon, 7 Apr 2025 14:00:32 +0200
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Subject: Re: [PATCH] x86/vmx: Drop memory clobbers on VMX instruction wrappers
To: Andrew Cooper 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 07.04.2025 12:45, Andrew Cooper wrote:
> The use, or not, of memory clobbers on the VMX instructions is complicated.
> 
> There are two separate aspects to consider:
> 
> 1. Originally, the VMX instructions used hardcoded bytes, including memory
>    encodings.  Therefore, the compiler couldn't see the correct relationship
>    between parameters.  The memory clobber for this purpose should have been
>    dropped when switching to mnemonics.
> 
>    This covers INVEPT and INVVPID, each of which has no change in memory, nor
>    in fact the current address space in use.

Yet then they need to come after respective table modifications.

> 2. Most of these instructions operate on a VMCS region.  This is a (mostly)
>    opaque data structure, operated on by physical address.  Again, this hides
>    the relationship between the instructions and the VMCS from the compiler.
> 
>    The processor might use internal state to cache the VMCS (writing it back
>    to memory on VMCLEAR), or it might operate on memory directly.
> 
>    Because the VMCS is opaque (so the compiler has nothing interesting to know
>    about it), and because VMREAD/VMWRITE have chosen not to use a memory
>    clobber (to tell the compiler that something changed), none of the other
>    VMX instructions should use a memory clobber either.

For this, there's actually a good example below, with everything needed in
context.

>    This covers VMXON, VMXOFF, VMPTRLD and VMPTCLEAR.

Nit: The last insn is VMCLEAR.

> --- a/xen/arch/x86/hvm/vmx/vmcs.c
> +++ b/xen/arch/x86/hvm/vmx/vmcs.c
> @@ -754,7 +754,7 @@ static int _vmx_cpu_up(bool bsp)
>                 _ASM_EXTABLE(1b, %l[vmxon_fault])
>                 :
>                 : [addr] "m" (this_cpu(vmxon_region))
> -               : "memory"
> +               :
>                 : vmxon_fail, vmxon_fault );
>  
>      this_cpu(vmxon) = 1;
> @@ -811,7 +811,7 @@ void cf_check vmx_cpu_down(void)
>  
>      BUG_ON(!(read_cr4() & X86_CR4_VMXE));
>      this_cpu(vmxon) = 0;
> -    asm volatile ( "vmxoff" ::: "memory" );
> +    asm volatile ( "vmxoff" );

With the clobber dropped, the compiler is free to re-order the prior store
with the asm(), despite the "volatile", isn't it? [1] This may then be
applicable elsewhere as well.

Jan

[1] Quote: "Note that the compiler can move even volatile asm instructions
            relative to other code, including across jump instructions."


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From: "Anthony PERARD" 
Subject: =?utf-8?Q?Re:=20[PATCH]=20libxl{,u}:=20replace=20TOSTRING()?=
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On Mon, Apr 07, 2025 at 01:29:29PM +0200, Jan Beulich wrote:
> Now that common-macros.h has STR() available, which is even slightly
> more flexible, use that and drop the custom macros.
> 
> No difference in generated code (except for line numbers, of course,
> where embedded in code/data).
> 
> Signed-off-by: Jan Beulich 

Reviewed-by: Anthony PERARD 

Thanks,

-- 

Anthony Perard | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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Feedback-ID: i1568416f:Fastmail
From: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
To: xen-devel@lists.xenproject.org
Cc: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Stefano Stabellini ,
	Doug Goldstein 
Subject: [PATCH v2 01/12] CI: prevent grub unpacking initramfs
Date: Mon,  7 Apr 2025 14:31:01 +0200
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It fails on larger initramfs (~250MB one) and sometimes even smaller
depending on memory size/memory map, let Linux do it.

Signed-off-by: Marek Marczykowski-Górecki 
Reviewed-by: Stefano Stabellini 
---
 automation/scripts/qubes-x86-64.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh
index f27296445901..8e78b7984e98 100755
--- a/automation/scripts/qubes-x86-64.sh
+++ b/automation/scripts/qubes-x86-64.sh
@@ -248,7 +248,7 @@ CONTROLLER=control@thor.testnet
 echo "
 multiboot2 (http)/gitlab-ci/xen $CONSOLE_OPTS loglvl=all guest_loglvl=all dom0_mem=4G console_timestamps=boot $extra_xen_opts
 module2 (http)/gitlab-ci/vmlinuz console=hvc0 root=/dev/ram0 earlyprintk=xen
-module2 (http)/gitlab-ci/initrd-dom0
+module2 --nounzip (http)/gitlab-ci/initrd-dom0
 " > $TFTP/grub.cfg
 
 echo "#!ipxe
-- 
git-series 0.9.1


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From: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
To: xen-devel@lists.xenproject.org
Cc: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Stefano Stabellini ,
	Andrew Cooper 
Subject: [PATCH v2 00/12] Several CI cleanups and improvements, plus yet another new runner
Date: Mon,  7 Apr 2025 14:31:00 +0200
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Some of those patches are collected from my stubdomain test series, others are
made while getting the new runner working. All of the cleanups can be applied
independently, but most if not all are needed for the "CI: add AMD Zen 4 HW
runner" patch adding new runner.

Last two/four patches (including test-artifacts patches) are
optimizations that cut time of some jobs almost by half.

As usual, besides the patches, somebody need to click on "hal9012" runner in
the relevant projects.

Marek Marczykowski-Górecki (12):
  CI: prevent grub unpacking initramfs
  CI: switch qubes runners to use console.exp
  CI: enable XHCI console in Xen debug build on Alpine
  CI: include domU kernel messages in the console output log
  CI: increase verbosity of starting a domain
  CI: consistently use DOCKER_CMD in makefiles
  CI: wait for the network interface in PCI passthrough tests
  CI: switch test kernel from 6.1.19 to 6.12.21
  CI: adjust resolving network interface into PCI device
  CI: add AMD Zen 4 HW runner
  CI: avoid repacking initrd as part of the test job
  CI: save toolstack artifact as cpio.gz

 automation/build/Makefile                                 |  4 +-
 automation/build/alpine/3.18-arm64v8.dockerfile           |  1 +-
 automation/gitlab-ci/build.yaml                           | 10 +-
 automation/gitlab-ci/test.yaml                            | 58 ++++-
 automation/scripts/build                                  |  2 +-
 automation/scripts/console.exp                            | 23 +-
 automation/scripts/qemu-alpine-x86_64.sh                  | 15 +-
 automation/scripts/qemu-smoke-dom0-arm32.sh               |  2 +-
 automation/scripts/qemu-smoke-dom0-arm64.sh               | 15 +-
 automation/scripts/qemu-smoke-dom0less-arm64.sh           |  9 +-
 automation/scripts/qubes-x86-64.sh                        | 97 +++-----
 automation/scripts/xilinx-smoke-dom0-x86_64.sh            | 29 +-
 automation/scripts/xilinx-smoke-dom0less-arm64.sh         | 16 +-
 automation/tests-artifacts/Makefile                       |  4 +-
 automation/tests-artifacts/alpine/3.18-arm64v8.dockerfile |  5 +-
 automation/tests-artifacts/alpine/3.18.dockerfile         |  1 +-
 automation/tests-artifacts/kernel/6.1.19.dockerfile       | 41 +---
 automation/tests-artifacts/kernel/6.12.21.dockerfile      | 43 ++++-
 18 files changed, 216 insertions(+), 159 deletions(-)
 delete mode 100644 automation/tests-artifacts/kernel/6.1.19.dockerfile
 create mode 100644 automation/tests-artifacts/kernel/6.12.21.dockerfile

base-commit: a235f856e4bbd270b085590e1f5fc9599234dcdf
-- 
git-series 0.9.1


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Feedback-ID: i1568416f:Fastmail
From: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
To: xen-devel@lists.xenproject.org
Cc: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Doug Goldstein ,
	Stefano Stabellini 
Subject: [PATCH v2 02/12] CI: switch qubes runners to use console.exp
Date: Mon,  7 Apr 2025 14:31:02 +0200
Message-ID: <33fe66669f6ca9fb7573d69d9f9fefeb653fe503.1744028549.git-series.marmarek@invisiblethingslab.com>
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It appears as sometimes it takes more time for Xen even start booting,
mostly due to firmware and fetching large boot files by grub. In some
jobs the current timeout is pretty close to the actual time needed, and
sometimes (rarely for now) test fails due to timeout expiring in the
middle of dom0 booting. This will be happening more often if the
initramfs will grow (and with more complex tests).
This has been observed on some dom0pvh-hvm jobs, at least on runners hw3
and hw11.

Switch to using expect (console.exp) for more robust test output
handling. This allows waiting separately for Xen starting to boot and
then for the test to complete. For now, set both of those to 120s, which
pessimistically bumps timeout for the whole test to 240s (from 120s).

Some messages use regex, use 'expect -re' for all of them for
consistency, even though not all strictly need that (yet).

Signed-off-by: Marek Marczykowski-Górecki 
---
Changes in v2:
- replace previous "ci: increase timeout for hw tests" with changing how
  console is interacted with

This needs a containers rebuild.
---
 automation/build/alpine/3.18-arm64v8.dockerfile |  1 +-
 automation/scripts/console.exp                  | 23 ++++++--
 automation/scripts/qubes-x86-64.sh              | 52 ++++--------------
 3 files changed, 32 insertions(+), 44 deletions(-)

diff --git a/automation/build/alpine/3.18-arm64v8.dockerfile b/automation/build/alpine/3.18-arm64v8.dockerfile
index 19fe46f8418f..b8482d5bf43f 100644
--- a/automation/build/alpine/3.18-arm64v8.dockerfile
+++ b/automation/build/alpine/3.18-arm64v8.dockerfile
@@ -48,3 +48,4 @@ RUN apk --no-cache add \
   # qubes test deps
   openssh-client \
   fakeroot \
+  expect \
diff --git a/automation/scripts/console.exp b/automation/scripts/console.exp
index 31ce97b91b63..d1689fa5bf7f 100755
--- a/automation/scripts/console.exp
+++ b/automation/scripts/console.exp
@@ -28,21 +28,34 @@ if {[info exists env(UBOOT_CMD)]} {
     send "$env(UBOOT_CMD)\r"
 }
 
+if {[info exists env(BOOT_MSG)]} {
+    expect -re "$env(BOOT_MSG)"
+}
+
+if {[info exists env(WAKEUP_CMD)]} {
+    expect -re "$env(SUSPEND_MSG)"
+
+    # keep it suspended a bit, then wakeup
+    sleep 30
+
+    system "$env(WAKEUP_CMD)"
+}
+
 if {[info exists env(LOG_MSG)]} {
     expect {
-        "$env(PASSED)" {
-            expect "$env(LOG_MSG)"
+        -re "$env(PASSED)" {
+            expect -re "$env(LOG_MSG)"
             exit 0
         }
-        "$env(LOG_MSG)" {
-            expect "$env(PASSED)"
+        -re "$env(LOG_MSG)" {
+            expect -re "$env(PASSED)"
             exit 0
         }
     }
 }
 
 expect {
-    "$env(PASSED)" {
+    -re "$env(PASSED)" {
         exit 0
     }
 }
diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh
index 8e78b7984e98..0eac410f4168 100755
--- a/automation/scripts/qubes-x86-64.sh
+++ b/automation/scripts/qubes-x86-64.sh
@@ -1,6 +1,6 @@
 #!/bin/sh
 
-set -ex
+set -ex -o pipefail
 
 # One of:
 #  - ""             PV dom0,  PVH domU
@@ -263,52 +263,26 @@ cp -f binaries/xen $TFTP/xen
 cp -f binaries/bzImage $TFTP/vmlinuz
 cp -f binaries/dom0-rootfs.cpio.gz $TFTP/initrd-dom0
 
-# start logging the serial; this gives interactive console, don't close its
-# stdin to not close it; the 'cat' is important, plain redirection would hang
-# until somebody opens the pipe; opening and closing the pipe is used to close
-# the console
-mkfifo /tmp/console-stdin
-cat /tmp/console-stdin |\
-ssh $CONTROLLER console | tee smoke.serial | sed 's/\r//' &
-
 # start the system pointing at gitlab-ci predefined config
 ssh $CONTROLLER gitlabci poweron
-trap "ssh $CONTROLLER poweroff; : > /tmp/console-stdin" EXIT
+trap "ssh $CONTROLLER poweroff" EXIT
 
 if [ -n "$wait_and_wakeup" ]; then
-    # wait for suspend or a timeout
-    until grep "$wait_and_wakeup" smoke.serial || [ $timeout -le 0 ]; do
-        sleep 1;
-        : $((--timeout))
-    done
-    if [ $timeout -le 0 ]; then
-        echo "ERROR: suspend timeout, aborting"
-        exit 1
-    fi
-    # keep it suspended a bit, then wakeup
-    sleep 30
-    ssh $CONTROLLER wake
+    export SUSPEND_MSG="$wait_and_wakeup"
+    export WAKEUP_CMD="ssh $CONTROLLER wake"
 fi
 
-set +x
-until grep "^Welcome to Alpine Linux" smoke.serial || [ $timeout -le 0 ]; do
-    sleep 1;
-    : $((--timeout))
-done
-set -x
-
-tail -n 100 smoke.serial
-
-if [ $timeout -le 0 ]; then
-    echo "ERROR: test timeout, aborting"
-    exit 1
-fi
+export PASSED="${passed}"
+export BOOT_MSG="Latest ChangeSet: "
+export LOG_MSG="\nWelcome to Alpine Linux"
+export TEST_CMD="ssh $CONTROLLER console"
+export TEST_LOG="smoke.serial"
+export TEST_TIMEOUT="$timeout"
+./automation/scripts/console.exp | sed 's/\r\+$//'
+TEST_RESULT=$?
 
 if [ -n "$retrieve_xml" ]; then
     nc -w 10 "$SUT_ADDR" 8080 > tests-junit.xml 
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Feedback-ID: i1568416f:Fastmail
From: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
To: xen-devel@lists.xenproject.org
Cc: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Stefano Stabellini ,
	Doug Goldstein 
Subject: [PATCH v2 04/12] CI: include domU kernel messages in the console output log
Date: Mon,  7 Apr 2025 14:31:04 +0200
Message-ID: <256c0e93b0500454815f28a370dd208261fa17b6.1744028549.git-series.marmarek@invisiblethingslab.com>
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Signed-off-by: Marek Marczykowski-Górecki 
Acked-by: Stefano Stabellini 
---
 automation/scripts/qubes-x86-64.sh | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh
index 0eac410f4168..7bf42d2e3d31 100755
--- a/automation/scripts/qubes-x86-64.sh
+++ b/automation/scripts/qubes-x86-64.sh
@@ -175,6 +175,8 @@ if [ -n "$domU_check" ]; then
     rm var/run
     echo "#!/bin/sh
 
+echo 8 > /proc/sys/kernel/printk
+
 ${domU_check}
 " > etc/local.d/xen.start
     chmod +x etc/local.d/xen.start
-- 
git-series 0.9.1


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Feedback-ID: i1568416f:Fastmail
From: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
To: xen-devel@lists.xenproject.org
Cc: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Stefano Stabellini ,
	Doug Goldstein 
Subject: [PATCH v2 03/12] CI: enable XHCI console in Xen debug build on Alpine
Date: Mon,  7 Apr 2025 14:31:03 +0200
Message-ID: <318a25de10a4ec992d5e42b1f920354b720988ba.1744028549.git-series.marmarek@invisiblethingslab.com>
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This build is used for hardware tests, and some runners use XHCI console

Signed-off-by: Marek Marczykowski-Górecki 
Acked-by: Stefano Stabellini 
---
 automation/gitlab-ci/build.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml
index 2513908b059b..169bebe3c775 100644
--- a/automation/gitlab-ci/build.yaml
+++ b/automation/gitlab-ci/build.yaml
@@ -341,6 +341,7 @@ alpine-3.18-gcc-debug:
       CONFIG_ARGO=y
       CONFIG_UBSAN=y
       CONFIG_UBSAN_FATAL=y
+      CONFIG_XHCI=y
 
 debian-12-x86_64-gcc-debug:
   extends: .gcc-x86-64-build-debug
-- 
git-series 0.9.1


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Feedback-ID: i1568416f:Fastmail
From: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
To: xen-devel@lists.xenproject.org
Cc: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Doug Goldstein ,
	Stefano Stabellini 
Subject: [PATCH v2 05/12] CI: increase verbosity of starting a domain
Date: Mon,  7 Apr 2025 14:31:05 +0200
Message-ID: 
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And start collecting qemu log earlier, so it isn't lost in case of a
timeout during domain startup.

Signed-off-by: Marek Marczykowski-Górecki 
---
Changes in v2:
- adjust xilinx-smoke-dom0-x86_64.sh too
---
 automation/scripts/qemu-alpine-x86_64.sh       | 2 +-
 automation/scripts/qemu-smoke-dom0-arm32.sh    | 2 +-
 automation/scripts/qemu-smoke-dom0-arm64.sh    | 2 +-
 automation/scripts/qubes-x86-64.sh             | 4 ++--
 automation/scripts/xilinx-smoke-dom0-x86_64.sh | 4 ++--
 5 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/automation/scripts/qemu-alpine-x86_64.sh b/automation/scripts/qemu-alpine-x86_64.sh
index 1ff689b577e3..17e2141d625e 100755
--- a/automation/scripts/qemu-alpine-x86_64.sh
+++ b/automation/scripts/qemu-alpine-x86_64.sh
@@ -56,7 +56,7 @@ bash /etc/init.d/xencommons start
 
 xl list
 
-xl create -c /root/test.cfg
+xl -vvv create -c /root/test.cfg
 
 " > etc/local.d/xen.start
 chmod +x etc/local.d/xen.start
diff --git a/automation/scripts/qemu-smoke-dom0-arm32.sh b/automation/scripts/qemu-smoke-dom0-arm32.sh
index e1cd83880928..0c60a66e25e3 100755
--- a/automation/scripts/qemu-smoke-dom0-arm32.sh
+++ b/automation/scripts/qemu-smoke-dom0-arm32.sh
@@ -21,7 +21,7 @@ echo "#!/bin/bash
 
 xl list
 
-xl create -c /root/test.cfg
+xl -vvv create -c /root/test.cfg
 
 " > ./root/xen.start
 echo "bash /root/xen.start" >> ./etc/init.d/xen-watchdog
diff --git a/automation/scripts/qemu-smoke-dom0-arm64.sh b/automation/scripts/qemu-smoke-dom0-arm64.sh
index 4d22a124df11..8774a8701232 100755
--- a/automation/scripts/qemu-smoke-dom0-arm64.sh
+++ b/automation/scripts/qemu-smoke-dom0-arm64.sh
@@ -52,7 +52,7 @@ bash /etc/init.d/xencommons start
 
 xl list
 
-xl create -c /root/test.cfg
+xl -vvv create -c /root/test.cfg
 
 " > etc/local.d/xen.start
 chmod +x etc/local.d/xen.start
diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh
index 7bf42d2e3d31..17fcbd8fa7db 100755
--- a/automation/scripts/qubes-x86-64.sh
+++ b/automation/scripts/qubes-x86-64.sh
@@ -122,7 +122,6 @@ echo \"${passed}\"
 "
 
         dom0_check="
-tail -F /var/log/xen/qemu-dm-domU.log &
 until grep -q \"^domU Welcome to Alpine Linux\" /var/log/xen/console/guest-domU.log; do
     sleep 1
 done
@@ -222,7 +221,8 @@ if [ -n "$domU_check" ]; then
     echo "
 # get domU console content into test log
 tail -F /var/log/xen/console/guest-domU.log 2>/dev/null | sed -e \"s/^/(domU) /\" &
-xl create /etc/xen/domU.cfg
+tail -F /var/log/xen/qemu-dm-domU.log 2>/dev/null | sed -e \"s/^/(qemu-dm) /\" &
+xl -vvv create /etc/xen/domU.cfg
 ${dom0_check}
 " >> etc/local.d/xen.start
 else
diff --git a/automation/scripts/xilinx-smoke-dom0-x86_64.sh b/automation/scripts/xilinx-smoke-dom0-x86_64.sh
index f70cfdc1552a..7834ffbe0593 100755
--- a/automation/scripts/xilinx-smoke-dom0-x86_64.sh
+++ b/automation/scripts/xilinx-smoke-dom0-x86_64.sh
@@ -49,7 +49,7 @@ ifconfig xenbr0 up
 ifconfig xenbr0 192.168.0.1
 # get domU console content into test log
 tail -F /var/log/xen/console/guest-domU.log 2>/dev/null | sed -e \"s/^/(domU) /\" &
-xl create /etc/xen/domU.cfg
+xl -vvv create /etc/xen/domU.cfg
 set +x
 until grep -q \"${DOMU_MSG}\" /var/log/xen/console/guest-domU.log; do
     sleep 1
@@ -75,7 +75,7 @@ done | argo-exec -p 28333 -d 0 -- /bin/echo
 "
     DOM0_CMD="
 insmod /root/xen-argo.ko
-xl create /etc/xen/domU.cfg
+xl -vvv create /etc/xen/domU.cfg
 argo-exec -l -p 28333 -- /bin/echo
 "
 copy_dom0_files ()
-- 
git-series 0.9.1


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Feedback-ID: i1568416f:Fastmail
From: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
To: xen-devel@lists.xenproject.org
Cc: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Stefano Stabellini ,
	Doug Goldstein 
Subject: [PATCH v2 06/12] CI: consistently use DOCKER_CMD in makefiles
Date: Mon,  7 Apr 2025 14:31:06 +0200
Message-ID: <3e28c1267125641ed3212c0366678474692913b2.1744028549.git-series.marmarek@invisiblethingslab.com>
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This allows rebuilding containers using podman too.

Signed-off-by: Marek Marczykowski-Górecki 
Reviewed-by: Stefano Stabellini 
---
 automation/build/Makefile           | 4 ++--
 automation/tests-artifacts/Makefile | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/automation/build/Makefile b/automation/build/Makefile
index 4df43b040777..fedf7524dacd 100644
--- a/automation/build/Makefile
+++ b/automation/build/Makefile
@@ -31,8 +31,8 @@ clean:
 define CLEAN_RULE
 .PHONY: clean-$(1)
 clean-$(1):
-	if [ -n "$$$$(docker image ls -q $(REGISTRY)/$(subst /,:,$(1)))" ]; then \
-		docker image rm $(REGISTRY)/$(subst /,:,$(1)); \
+	if [ -n "$$$$($(DOCKER_CMD) image ls -q $(REGISTRY)/$(subst /,:,$(1)))" ]; then \
+		$(DOCKER_CMD) image rm $(REGISTRY)/$(subst /,:,$(1)); \
 	fi
 
 endef
diff --git a/automation/tests-artifacts/Makefile b/automation/tests-artifacts/Makefile
index d055cd696bed..80a60a94f3f7 100644
--- a/automation/tests-artifacts/Makefile
+++ b/automation/tests-artifacts/Makefile
@@ -10,9 +10,9 @@ help:
 	@echo "To push container builds, set the env var PUSH"
 
 %: %.dockerfile ## Builds containers
-	docker build --pull -t $(REGISTRY)/$(@D):$(@F) -f $< $(
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Feedback-ID: i1568416f:Fastmail
From: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
To: xen-devel@lists.xenproject.org
Cc: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Stefano Stabellini ,
	Doug Goldstein 
Subject: [PATCH v2 07/12] CI: wait for the network interface in PCI passthrough tests
Date: Mon,  7 Apr 2025 14:31:07 +0200
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The network driver initializes asynchronously, and it may not be ready
yet by the time the startup script is called. This is especially the
case for USB network adapter (where the PCI device is the USB
controller) in the upcoming runner.

Don't bother about separate timeout - test timeout will cover this part
too.

Signed-off-by: Marek Marczykowski-Górecki 
Reviewed-by: Stefano Stabellini 
---
 automation/scripts/qubes-x86-64.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh
index 17fcbd8fa7db..9359e8914fb2 100755
--- a/automation/scripts/qubes-x86-64.sh
+++ b/automation/scripts/qubes-x86-64.sh
@@ -104,6 +104,7 @@ on_reboot = "destroy"
         domU_check="
 set -x -e
 interface=eth0
+while ! [ -e \"/sys/class/net/\$interface\" ]; do sleep 1; done
 ip link set \"\$interface\" up
 timeout 30s udhcpc -i \"\$interface\"
 pingip=\$(ip -o -4 r show default|cut -f 3 -d ' ')
-- 
git-series 0.9.1


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Feedback-ID: i1568416f:Fastmail
From: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
To: xen-devel@lists.xenproject.org
Cc: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Stefano Stabellini ,
	Doug Goldstein 
Subject: [PATCH v2 09/12] CI: adjust resolving network interface into PCI device
Date: Mon,  7 Apr 2025 14:31:09 +0200
Message-ID: <691ab03ad2b1a327a8b2559facec668ab4ce6986.1744028549.git-series.marmarek@invisiblethingslab.com>
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Change how PCI device lookup is done to handle also USB devices, in
which case get the USB controller. Instead of taking basename of the
'device' symlink, resolve the full path (example:
/sys/devices/pci0000:00/0000:00:09.0/usb4/4-7/4-7:1.0) and take the
first part after pci0000:00. Theoretically it could be a bridge, but VM
has flat PCI topology.

Signed-off-by: Marek Marczykowski-Górecki 
Reviewed-by: Stefano Stabellini 
---
 automation/scripts/qubes-x86-64.sh | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh
index 9359e8914fb2..861e302d845b 100755
--- a/automation/scripts/qubes-x86-64.sh
+++ b/automation/scripts/qubes-x86-64.sh
@@ -110,7 +110,8 @@ timeout 30s udhcpc -i \"\$interface\"
 pingip=\$(ip -o -4 r show default|cut -f 3 -d ' ')
 ping -c 10 \"\$pingip\"
 echo domU started
-pcidevice=\$(basename \$(readlink /sys/class/net/\$interface/device))
+pcidevice=\$(realpath /sys/class/net/\$interface/device |
+             sed 's#.*pci0000:00/\\([^/]*\\).*#\\1#')
 lspci -vs \$pcidevice
 "
         if [ -n "$PCIDEV_INTR" ]; then
-- 
git-series 0.9.1


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Feedback-ID: i1568416f:Fastmail
From: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
To: xen-devel@lists.xenproject.org
Cc: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Doug Goldstein ,
	Stefano Stabellini 
Subject: [PATCH v2 12/12] CI: save toolstack artifact as cpio.gz
Date: Mon,  7 Apr 2025 14:31:12 +0200
Message-ID: 
X-Mailer: git-send-email 2.48.1
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This avoids the need to re-compress it in every test job.

Signed-off-by: Marek Marczykowski-Górecki 
---
New in v2
---
 automation/scripts/build                          | 2 +-
 automation/scripts/qemu-alpine-x86_64.sh          | 2 +-
 automation/scripts/qemu-smoke-dom0-arm64.sh       | 2 +-
 automation/scripts/qemu-smoke-dom0less-arm64.sh   | 2 +-
 automation/scripts/qubes-x86-64.sh                | 4 +++-
 automation/scripts/xilinx-smoke-dom0-x86_64.sh    | 4 ++--
 automation/scripts/xilinx-smoke-dom0less-arm64.sh | 2 +-
 7 files changed, 10 insertions(+), 8 deletions(-)

diff --git a/automation/scripts/build b/automation/scripts/build
index 522efe774ef3..365534895047 100755
--- a/automation/scripts/build
+++ b/automation/scripts/build
@@ -108,7 +108,7 @@ else
     # Note: Some smoke tests depending on finding binaries/xen on a full build
     # even though dist/ contains everything, while some containers don't even
     # build Xen
-    cp -r dist binaries/
+    (cd dist/install; find | cpio -o -H newc | gzip) > binaries/toolstack.cpio.gz
     cp -r tools/tests binaries/
     collect_xen_artefacts
 fi
diff --git a/automation/scripts/qemu-alpine-x86_64.sh b/automation/scripts/qemu-alpine-x86_64.sh
index 9b47b662c3f2..81e8ff24327a 100755
--- a/automation/scripts/qemu-alpine-x86_64.sh
+++ b/automation/scripts/qemu-alpine-x86_64.sh
@@ -35,7 +35,6 @@ mkdir proc
 mkdir run
 mkdir srv
 mkdir sys
-cp -ar ../dist/install/* .
 mkdir -p root etc/local.d
 mv ../initrd-domU.cpio.gz ./root/initrd.cpio.gz
 cp ../bzImage ./root
@@ -61,6 +60,7 @@ xl -vvv create -c /root/test.cfg
 chmod +x etc/local.d/xen.start
 # rebuild Dom0 rootfs
 cp ../initrd.cpio.gz ../xen-rootfs.cpio.gz
+cat ../toolstack.cpio.gz >> ../xen-rootfs.cpio.gz
 find . |cpio -H newc -o|gzip >> ../xen-rootfs.cpio.gz
 cd ../..
 
diff --git a/automation/scripts/qemu-smoke-dom0-arm64.sh b/automation/scripts/qemu-smoke-dom0-arm64.sh
index 533b286528f1..2e5246f2c9b6 100755
--- a/automation/scripts/qemu-smoke-dom0-arm64.sh
+++ b/automation/scripts/qemu-smoke-dom0-arm64.sh
@@ -33,7 +33,6 @@ mkdir proc
 mkdir run
 mkdir srv
 mkdir sys
-cp -ar ../dist/install/* .
 mkdir -p etc/local.d root
 mv ../initrd-domU.cpio.gz ./root/initrd.cpio.gz
 cp ../Image ./root
@@ -56,6 +55,7 @@ xl -vvv create -c /root/test.cfg
 " > etc/local.d/xen.start
 chmod +x etc/local.d/xen.start
 cp ../initrd.cpio.gz ../xen-rootfs.cpio.gz
+cat ../toolstack.cpio.gz >> ../xen-rootfs.cpio.gz
 find . |cpio -H newc -o|gzip >> ../xen-rootfs.cpio.gz
 cd ../..
 
diff --git a/automation/scripts/qemu-smoke-dom0less-arm64.sh b/automation/scripts/qemu-smoke-dom0less-arm64.sh
index 70085e26c139..93f4fb410690 100755
--- a/automation/scripts/qemu-smoke-dom0less-arm64.sh
+++ b/automation/scripts/qemu-smoke-dom0less-arm64.sh
@@ -121,7 +121,6 @@ mkdir proc
 mkdir run
 mkdir srv
 mkdir sys
-cp -ar ../binaries/dist/install/* .
 mkdir -p etc/local.d
 
 echo "#!/bin/bash
@@ -142,6 +141,7 @@ ${dom0_check}
 " > etc/local.d/xen.start
 chmod +x etc/local.d/xen.start
 cp ../binaries/initrd.cpio.gz ../binaries/dom0-rootfs.cpio.gz
+cat ../binaries/toolstack.cpio.gz >> ../binaries/dom0-rootfs.cpio.gz
 find . | cpio -H newc -o | gzip >> ../binaries/dom0-rootfs.cpio.gz
 cd ..
 
diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh
index 399d72e0600d..4fe59fce8999 100755
--- a/automation/scripts/qubes-x86-64.sh
+++ b/automation/scripts/qubes-x86-64.sh
@@ -195,7 +195,6 @@ mkdir proc
 mkdir run
 mkdir sys
 mkdir -p etc/local.d
-cp -ar ../binaries/dist/install/* .
 cp -ar ../binaries/tests .
 cp -a ../automation/scripts/run-tools-tests tests/
 
@@ -231,8 +230,10 @@ else
 fi
 
 chmod +x etc/local.d/xen.start
+mkdir -p etc/xen
 echo "$domU_config" > etc/xen/domU.cfg
 
+mkdir -p etc/default
 echo "XENCONSOLED_TRACE=all" >> etc/default/xencommons
 echo "QEMU_XEN=/bin/false" >> etc/default/xencommons
 mkdir -p var/log/xen/console
@@ -242,6 +243,7 @@ if [ -n "$domU_check" ]; then
 fi
 # take base initrd and append test-specific files
 cp ../binaries/initrd.cpio.gz ../binaries/dom0-rootfs.cpio.gz
+cat ../binaries/toolstack.cpio.gz >> ../binaries/dom0-rootfs.cpio.gz
 find . | cpio -H newc -o | gzip >> ../binaries/dom0-rootfs.cpio.gz
 cd ..
 
diff --git a/automation/scripts/xilinx-smoke-dom0-x86_64.sh b/automation/scripts/xilinx-smoke-dom0-x86_64.sh
index 6b9f0e4a8dc7..ea0f952975c7 100755
--- a/automation/scripts/xilinx-smoke-dom0-x86_64.sh
+++ b/automation/scripts/xilinx-smoke-dom0-x86_64.sh
@@ -115,8 +115,7 @@ rm -rf rootfs
 mkdir -p rootfs
 cd rootfs
 mkdir boot proc run srv sys
-cp -ar ../binaries/dist/install/* .
-mkdir -p etc/local.d
+mkdir -p etc/local.d etc/xen etc/default
 echo "#!/bin/bash
 set -x
 export LD_LIBRARY_PATH=/usr/local/lib
@@ -134,6 +133,7 @@ cp ../binaries/bzImage boot/vmlinuz
 cp ../binaries/domU-rootfs-overlay.cpio.gz boot/initrd-domU-overlay
 copy_dom0_files
 cp ../binaries/initrd.cpio.gz ../binaries/dom0-rootfs.cpio.gz
+cat ../binaries/toolstack.cpio.gz >> ../binaries/dom0-rootfs.cpio.gz
 find . | cpio -H newc -o | gzip >> ../binaries/dom0-rootfs.cpio.gz
 cd ..
 
diff --git a/automation/scripts/xilinx-smoke-dom0less-arm64.sh b/automation/scripts/xilinx-smoke-dom0less-arm64.sh
index 81be60e2026e..dbb955df0478 100755
--- a/automation/scripts/xilinx-smoke-dom0less-arm64.sh
+++ b/automation/scripts/xilinx-smoke-dom0less-arm64.sh
@@ -63,7 +63,6 @@ mkdir proc
 mkdir run
 mkdir srv
 mkdir sys
-cp -ar ../binaries/dist/install/* .
 
 mkdir -p etc/local.d
 echo "#!/bin/bash
@@ -77,6 +76,7 @@ ${dom0_check}
 " > etc/local.d/xen.start
 chmod +x etc/local.d/xen.start
 cp ../binaries/initrd.cpio.gz ../binaries/dom0-rootfs.cpio.gz
+cat ../binaries/toolstack.cpio.gz >> ../binaries/dom0-rootfs.cpio.gz
 find . | cpio -H newc -o | gzip >> ../binaries/dom0-rootfs.cpio.gz
 cd ..
 
-- 
git-series 0.9.1


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Feedback-ID: i1568416f:Fastmail
From: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
To: xen-devel@lists.xenproject.org
Cc: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Stefano Stabellini ,
	Doug Goldstein 
Subject: [PATCH v2 10/12] CI: add AMD Zen 4 HW runner
Date: Mon,  7 Apr 2025 14:31:10 +0200
Message-ID: <3f825b4bc78916fc537d8bde4a5e49931106bffc.1744028549.git-series.marmarek@invisiblethingslab.com>
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This is AMD Ryzen 5 7640U in Framework Laptop AMD.
It has several things different than the other runners.
First of all, the console is using XHCI debug capability.
And then, this system doesn't have normal wired ethernet. But is has one
on USB, and this one is used for booting. For this, enable
CONFIG_USB_RTL8152 in the Linux build.

Include some basic tests, plus PCI passthrough.

This machine doesn't support S3. S0ix pretends to be working with
Qubes's dom0 (kernel + userspace), but it hangs on suspend with Alpine
used in test. But even when it doesn't hang, it doesn't really reach
deep sleep, so skip this test for now here.

Signed-off-by: Marek Marczykowski-Górecki 
Reviewed-by: Stefano Stabellini 
---
Requires containers rebuild, especially tests-artifacts/kernel/6.12.21.

Do not apply yet, until issues found by those tests are fixed. That
would be at least third issue found using this system, so lets have it
in CI.
---
 automation/gitlab-ci/test.yaml                       | 56 +++++++++++++-
 automation/tests-artifacts/kernel/6.12.21.dockerfile |  2 +-
 2 files changed, 58 insertions(+)

diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml
index a13dd040bd26..feb2dd10ab30 100644
--- a/automation/gitlab-ci/test.yaml
+++ b/automation/gitlab-ci/test.yaml
@@ -188,6 +188,16 @@
   tags:
     - qubes-hw11
 
+.zen4-x86-64:
+  extends: .adl-x86-64
+  variables:
+    PCIDEV: "c3:00.4"
+    PCIDEV_INTR: "MSI-X"
+    CONSOLE_OPTS: "console=xhci dbgp=xhci@pcic1:00.3,share=yes"
+    SUT_ADDR: test-12.testnet
+  tags:
+    - qubes-hw12
+
 # Test jobs
 build-each-commit-gcc:
   extends: .test-jobs-common
@@ -479,6 +489,52 @@ zen3p-tools-tests-pvh-x86-64-gcc-debug:
     - *x86-64-test-needs
     - alpine-3.18-gcc-debug
 
+zen4-smoke-x86-64-gcc-debug:
+  extends: .zen4-x86-64
+  script:
+    - ./automation/scripts/qubes-x86-64.sh 2>&1 | tee ${LOGFILE}
+  needs:
+    - *x86-64-test-needs
+    - alpine-3.18-gcc-debug
+
+zen4-smoke-x86-64-dom0pvh gcc-debug:
+  extends: .zen4-x86-64
+  script:
+    - ./automation/scripts/qubes-x86-64.sh dom0pvh 2>&1 | tee ${LOGFILE}
+  needs:
+    - *x86-64-test-needs
+    - alpine-3.18-gcc-debug
+
+zen4-pci-hvm-x86-64-gcc-debug:
+  extends: .zen4-x86-64
+  script:
+    - ./automation/scripts/qubes-x86-64.sh pci-hvm 2>&1 | tee ${LOGFILE}
+  needs:
+    - *x86-64-test-needs
+    - alpine-3.18-gcc-debug
+
+zen4-tools-tests-pv-x86-64-gcc-debug:
+  extends: .zen4-x86-64
+  script:
+    - ./automation/scripts/qubes-x86-64.sh tools-tests-pv 2>&1 | tee ${LOGFILE}
+  artifacts:
+    reports:
+      junit: tests-junit.xml
+  needs:
+    - *x86-64-test-needs
+    - alpine-3.18-gcc-debug
+
+zen4-tools-tests-pvh-x86-64-gcc-debug:
+  extends: .zen4-x86-64
+  script:
+    - ./automation/scripts/qubes-x86-64.sh tools-tests-pvh 2>&1 | tee ${LOGFILE}
+  artifacts:
+    reports:
+      junit: tests-junit.xml
+  needs:
+    - *x86-64-test-needs
+    - alpine-3.18-gcc-debug
+
 qemu-smoke-dom0-arm64-gcc:
   extends: .qemu-arm64
   script:
diff --git a/automation/tests-artifacts/kernel/6.12.21.dockerfile b/automation/tests-artifacts/kernel/6.12.21.dockerfile
index d7d34031cab5..4e0a68ec61eb 100644
--- a/automation/tests-artifacts/kernel/6.12.21.dockerfile
+++ b/automation/tests-artifacts/kernel/6.12.21.dockerfile
@@ -19,6 +19,7 @@ RUN apt-get update && \
         flex \
         bison \
         libelf-dev \
+        libssl-dev \
         && \
     apt-get autoremove -y && \
     apt-get clean && \
@@ -33,6 +34,7 @@ RUN curl -fsSLO https://cdn.kernel.org/pub/linux/kernel/v6.x/linux-"$LINUX_VERSI
     scripts/config --enable BRIDGE && \
     scripts/config --enable IGC && \
     scripts/config --enable TUN && \
+    scripts/config --enable USB_RTL8152 && \
     cp .config .config.orig && \
     cat .config.orig | grep XEN | grep =m |sed 's/=m/=y/g' >> .config && \
     make -j$(nproc) bzImage && \
-- 
git-series 0.9.1


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Feedback-ID: i1568416f:Fastmail
From: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
To: xen-devel@lists.xenproject.org
Cc: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Doug Goldstein ,
	Stefano Stabellini 
Subject: [PATCH v2 11/12] CI: avoid repacking initrd as part of the test job
Date: Mon,  7 Apr 2025 14:31:11 +0200
Message-ID: <18391a01aef89e928d04fd746fb6e5e5943df439.1744028549.git-series.marmarek@invisiblethingslab.com>
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The prerequisite for this is building initrd.cpio.gz, not only
initrd.tar.gz. That's a change in the test-artifacts repository.

Having that, do not repack the whole initrd, but only pack modified
files and rely on Linux handling of concatenated archives.
This allows packing just test-related files (which includes the whole
toolstack), instead of the whole initrd.

DomU initrd handling is a bit more complicated thing. It's sent to the
target host as part of the dom0 initrd. But to modify/extend it, the
"overlay" need to be applied already on the target system (otherwise
controller host would need to repack it anyway). So, make the
initrd.cpio.gz in test-artifacts include boot/initrd-domU already, and
add test-specific files as boot/initrd-domU-overlay that is concatenated
by dom0 boot script.

Since full initrd is not unpacked now when preparing domU (and dom0)
rootfs, a couple of minor changes are needed to how they are prepared.
This includes creating whole etc/issue file, instead of modifying
existing one, and a need to create a couple directories.

And since there is now initrd.cpio.gz artifact, rename temporary domU
initrd to initrd-domU.cpio.gz

Finally, move adding "rc_verbose=yes" to /etc/rc.conf to initrd
building.

Signed-off-by: Marek Marczykowski-Górecki 
---
New in v2

In fact, alpine/3.18.dockerfile in this repository is not what
is used to build initrd.cpio.gz for test here, but add it anyway in case
there are some other tests using it that I missed. If it's really
unused, it probably should be removed, but that's a separate patch.

Jobs xilinx-* are untested, as I don't have necessary access.
---
 automation/gitlab-ci/build.yaml                           |  5 +-
 automation/scripts/qemu-alpine-x86_64.sh                  | 11 +--
 automation/scripts/qemu-smoke-dom0-arm64.sh               | 11 +--
 automation/scripts/qemu-smoke-dom0less-arm64.sh           |  7 +--
 automation/scripts/qubes-x86-64.sh                        | 29 +++-----
 automation/scripts/xilinx-smoke-dom0-x86_64.sh            | 23 +++---
 automation/scripts/xilinx-smoke-dom0less-arm64.sh         | 14 +---
 automation/tests-artifacts/alpine/3.18-arm64v8.dockerfile |  5 +-
 automation/tests-artifacts/alpine/3.18.dockerfile         |  1 +-
 9 files changed, 55 insertions(+), 51 deletions(-)

diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml
index d41f27fc94bf..8e1ff0178469 100644
--- a/automation/gitlab-ci/build.yaml
+++ b/automation/gitlab-ci/build.yaml
@@ -268,10 +268,13 @@ alpine-3.18-arm64-rootfs-export:
   extends: .test-jobs-artifact-common
   image: registry.gitlab.com/xen-project/xen/tests-artifacts/alpine:3.18-arm64v8
   script:
-    - mkdir binaries && cp /initrd.tar.gz binaries/initrd.tar.gz
+    - mkdir binaries
+    - cp /initrd.tar.gz binaries/initrd.tar.gz
+    - cp /initrd.cpio.gz binaries/initrd.cpio.gz
   artifacts:
     paths:
       - binaries/initrd.tar.gz
+      - binaries/initrd.cpio.gz
   tags:
     - arm64
 
diff --git a/automation/scripts/qemu-alpine-x86_64.sh b/automation/scripts/qemu-alpine-x86_64.sh
index 17e2141d625e..9b47b662c3f2 100755
--- a/automation/scripts/qemu-alpine-x86_64.sh
+++ b/automation/scripts/qemu-alpine-x86_64.sh
@@ -25,20 +25,19 @@ mount -t devtmpfs devtmpfs /dev
 chmod +x initrd/init
 # DomU rootfs
 cd initrd
-find . | cpio --create --format='newc' | gzip > ../initrd.cpio.gz
+find . | cpio --create --format='newc' | gzip > ../initrd-domU.cpio.gz
 cd ..
 
 # initrd.tar.gz is Dom0 rootfs
 mkdir -p rootfs
 cd rootfs
-tar xvzf ../initrd.tar.gz
 mkdir proc
 mkdir run
 mkdir srv
 mkdir sys
-rm var/run
 cp -ar ../dist/install/* .
-mv ../initrd.cpio.gz ./root
+mkdir -p root etc/local.d
+mv ../initrd-domU.cpio.gz ./root/initrd.cpio.gz
 cp ../bzImage ./root
 echo "name=\"test\"
 memory=512
@@ -60,9 +59,9 @@ xl -vvv create -c /root/test.cfg
 
 " > etc/local.d/xen.start
 chmod +x etc/local.d/xen.start
-echo "rc_verbose=yes" >> etc/rc.conf
 # rebuild Dom0 rootfs
-find . |cpio -H newc -o|gzip > ../xen-rootfs.cpio.gz
+cp ../initrd.cpio.gz ../xen-rootfs.cpio.gz
+find . |cpio -H newc -o|gzip >> ../xen-rootfs.cpio.gz
 cd ../..
 
 cat >> binaries/pxelinux.0 << EOF
diff --git a/automation/scripts/qemu-smoke-dom0-arm64.sh b/automation/scripts/qemu-smoke-dom0-arm64.sh
index 8774a8701232..533b286528f1 100755
--- a/automation/scripts/qemu-smoke-dom0-arm64.sh
+++ b/automation/scripts/qemu-smoke-dom0-arm64.sh
@@ -24,19 +24,18 @@ mount -t devtmpfs devtmpfs /dev
 /bin/sh" > initrd/init
 chmod +x initrd/init
 cd initrd
-find . | cpio --create --format='newc' | gzip > ../initrd.cpio.gz
+find . | cpio --create --format='newc' | gzip > ../initrd-domU.cpio.gz
 cd ..
 
 mkdir -p rootfs
 cd rootfs
-tar xvzf ../initrd.tar.gz
 mkdir proc
 mkdir run
 mkdir srv
 mkdir sys
-rm var/run
 cp -ar ../dist/install/* .
-mv ../initrd.cpio.gz ./root
+mkdir -p etc/local.d root
+mv ../initrd-domU.cpio.gz ./root/initrd.cpio.gz
 cp ../Image ./root
 echo "name=\"test\"
 memory=512
@@ -56,8 +55,8 @@ xl -vvv create -c /root/test.cfg
 
 " > etc/local.d/xen.start
 chmod +x etc/local.d/xen.start
-echo "rc_verbose=yes" >> etc/rc.conf
-find . |cpio -H newc -o|gzip > ../xen-rootfs.cpio.gz
+cp ../initrd.cpio.gz ../xen-rootfs.cpio.gz
+find . |cpio -H newc -o|gzip >> ../xen-rootfs.cpio.gz
 cd ../..
 
 # XXX QEMU looks for "efi-virtio.rom" even if it is unneeded
diff --git a/automation/scripts/qemu-smoke-dom0less-arm64.sh b/automation/scripts/qemu-smoke-dom0less-arm64.sh
index f72d20936181..70085e26c139 100755
--- a/automation/scripts/qemu-smoke-dom0less-arm64.sh
+++ b/automation/scripts/qemu-smoke-dom0less-arm64.sh
@@ -117,13 +117,12 @@ cd ..
 # DOM0 rootfs
 mkdir -p rootfs
 cd rootfs
-tar xzf ../binaries/initrd.tar.gz
 mkdir proc
 mkdir run
 mkdir srv
 mkdir sys
-rm var/run
 cp -ar ../binaries/dist/install/* .
+mkdir -p etc/local.d
 
 echo "#!/bin/bash
 
@@ -142,8 +141,8 @@ xl network-attach 1 type=vif
 ${dom0_check}
 " > etc/local.d/xen.start
 chmod +x etc/local.d/xen.start
-echo "rc_verbose=yes" >> etc/rc.conf
-find . | cpio -H newc -o | gzip > ../binaries/dom0-rootfs.cpio.gz
+cp ../binaries/initrd.cpio.gz ../binaries/dom0-rootfs.cpio.gz
+find . | cpio -H newc -o | gzip >> ../binaries/dom0-rootfs.cpio.gz
 cd ..
 
 # ImageBuilder
diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh
index 861e302d845b..399d72e0600d 100755
--- a/automation/scripts/qubes-x86-64.sh
+++ b/automation/scripts/qubes-x86-64.sh
@@ -167,13 +167,10 @@ if [ -n "$domU_check" ]; then
     # DomU
     mkdir -p rootfs
     cd rootfs
-    # fakeroot is needed to preserve device nodes in rootless podman container
-    fakeroot -s ../fakeroot-save tar xzf ../binaries/initrd.tar.gz
     mkdir proc
     mkdir run
-    mkdir srv
     mkdir sys
-    rm var/run
+    mkdir -p etc/local.d
     echo "#!/bin/sh
 
 echo 8 > /proc/sys/kernel/printk
@@ -181,23 +178,23 @@ echo 8 > /proc/sys/kernel/printk
 ${domU_check}
 " > etc/local.d/xen.start
     chmod +x etc/local.d/xen.start
-    echo "rc_verbose=yes" >> etc/rc.conf
-    sed -i -e 's/^Welcome/domU \0/' etc/issue
-    find . | fakeroot -i ../fakeroot-save cpio -H newc -o | gzip > ../binaries/domU-rootfs.cpio.gz
+    echo "domU Welcome to Alpine Linux 3.18
+Kernel \r on an \m (\l)
+
+" > etc/issue
+    find . | cpio -H newc -o | gzip > ../binaries/domU-rootfs-overlay.cpio.gz
     cd ..
     rm -rf rootfs
 fi
 
-# DOM0 rootfs
+# DOM0 rootfs - this will be an overlay over alpine's initrd
 mkdir -p rootfs
 cd rootfs
-fakeroot -s ../fakeroot-save tar xzf ../binaries/initrd.tar.gz
 mkdir boot
 mkdir proc
 mkdir run
-mkdir srv
 mkdir sys
-rm var/run
+mkdir -p etc/local.d
 cp -ar ../binaries/dist/install/* .
 cp -ar ../binaries/tests .
 cp -a ../automation/scripts/run-tools-tests tests/
@@ -221,6 +218,8 @@ fi
 
 if [ -n "$domU_check" ]; then
     echo "
+# append test-specific files to domU initrd
+cat /boot/initrd-domU-overlay >> boot/initrd-domU
 # get domU console content into test log
 tail -F /var/log/xen/console/guest-domU.log 2>/dev/null | sed -e \"s/^/(domU) /\" &
 tail -F /var/log/xen/qemu-dm-domU.log 2>/dev/null | sed -e \"s/^/(qemu-dm) /\" &
@@ -234,18 +233,18 @@ fi
 chmod +x etc/local.d/xen.start
 echo "$domU_config" > etc/xen/domU.cfg
 
-echo "rc_verbose=yes" >> etc/rc.conf
 echo "XENCONSOLED_TRACE=all" >> etc/default/xencommons
 echo "QEMU_XEN=/bin/false" >> etc/default/xencommons
 mkdir -p var/log/xen/console
 cp ../binaries/bzImage boot/vmlinuz
 if [ -n "$domU_check" ]; then
-    cp ../binaries/domU-rootfs.cpio.gz boot/initrd-domU
+    cp ../binaries/domU-rootfs-overlay.cpio.gz boot/initrd-domU-overlay
 fi
-find . | fakeroot -i ../fakeroot-save cpio -H newc -o | gzip > ../binaries/dom0-rootfs.cpio.gz
+# take base initrd and append test-specific files
+cp ../binaries/initrd.cpio.gz ../binaries/dom0-rootfs.cpio.gz
+find . | cpio -H newc -o | gzip >> ../binaries/dom0-rootfs.cpio.gz
 cd ..
 
-
 TFTP=/scratch/gitlab-runner/tftp
 CONTROLLER=control@thor.testnet
 
diff --git a/automation/scripts/xilinx-smoke-dom0-x86_64.sh b/automation/scripts/xilinx-smoke-dom0-x86_64.sh
index 7834ffbe0593..6b9f0e4a8dc7 100755
--- a/automation/scripts/xilinx-smoke-dom0-x86_64.sh
+++ b/automation/scripts/xilinx-smoke-dom0-x86_64.sh
@@ -80,6 +80,7 @@ argo-exec -l -p 28333 -- /bin/echo
 "
 copy_dom0_files ()
 {
+    mkdir -p root usr/local/lib
     cp "${WORKDIR}/binaries/xen-argo.ko" "root/"
     cp -ar "${WORKDIR}/binaries/lib/"* "usr/local/lib/"
     cp "${WORKDIR}/binaries/argo-exec" "usr/local/bin/"
@@ -92,9 +93,8 @@ fi
 # Set up domU rootfs.
 mkdir -p rootfs
 cd rootfs
-tar xzf ../binaries/initrd.tar.gz
 mkdir proc run srv sys
-rm var/run
+mkdir -p etc/local.d
 echo "#!/bin/sh
 set -x
 export LD_LIBRARY_PATH=/usr/local/lib
@@ -102,36 +102,39 @@ PATH=/usr/local/bin:/usr/local/sbin:\$PATH
 ${DOMU_CMD}
 " > etc/local.d/xen.start
 chmod +x etc/local.d/xen.start
-echo "rc_verbose=yes" >> etc/rc.conf
-sed -i -e 's/^Welcome/domU \0/' etc/issue
+echo "domU Welcome to Alpine Linux 3.18
+Kernel \r on an \m (\l)
+
+" > etc/issue
 copy_domU_files
-find . | cpio -H newc -o | gzip > ../binaries/domU-rootfs.cpio.gz
+find . | cpio -H newc -o | gzip > ../binaries/domU-rootfs-overlay.cpio.gz
 cd ..
 rm -rf rootfs
 
 # Set up dom0 rootfs.
 mkdir -p rootfs
 cd rootfs
-tar xzf ../binaries/initrd.tar.gz
 mkdir boot proc run srv sys
-rm var/run
 cp -ar ../binaries/dist/install/* .
+mkdir -p etc/local.d
 echo "#!/bin/bash
 set -x
 export LD_LIBRARY_PATH=/usr/local/lib
 bash /etc/init.d/xencommons start
+# append test-specific files to domU initrd
+cat /boot/initrd-domU-overlay >> boot/initrd-domU
 ${DOM0_CMD}
 " > etc/local.d/xen.start
 chmod +x etc/local.d/xen.start
 echo "${DOMU_CFG}${DOMU_CFG_EXTRA}" > etc/xen/domU.cfg
-echo "rc_verbose=yes" >> etc/rc.conf
 echo "XENCONSOLED_TRACE=all" >> etc/default/xencommons
 echo "QEMU_XEN=/bin/false" >> etc/default/xencommons
 mkdir -p var/log/xen/console
 cp ../binaries/bzImage boot/vmlinuz
-cp ../binaries/domU-rootfs.cpio.gz boot/initrd-domU
+cp ../binaries/domU-rootfs-overlay.cpio.gz boot/initrd-domU-overlay
 copy_dom0_files
-find . | cpio -H newc -o | gzip > ../binaries/dom0-rootfs.cpio.gz
+cp ../binaries/initrd.cpio.gz ../binaries/dom0-rootfs.cpio.gz
+find . | cpio -H newc -o | gzip >> ../binaries/dom0-rootfs.cpio.gz
 cd ..
 
 # Load software into TFTP server directory.
diff --git a/automation/scripts/xilinx-smoke-dom0less-arm64.sh b/automation/scripts/xilinx-smoke-dom0less-arm64.sh
index b24ad11b8cac..81be60e2026e 100755
--- a/automation/scripts/xilinx-smoke-dom0less-arm64.sh
+++ b/automation/scripts/xilinx-smoke-dom0less-arm64.sh
@@ -41,33 +41,31 @@ fi
 # DomU
 mkdir -p rootfs
 cd rootfs
-tar xzf ../binaries/initrd.tar.gz
 mkdir proc
 mkdir run
 mkdir srv
 mkdir sys
-rm var/run
+mkdir -p etc/local.d
 echo "#!/bin/sh
 
 ${domU_check}
 /bin/sh" > etc/local.d/xen.start
 chmod +x etc/local.d/xen.start
-echo "rc_verbose=yes" >> etc/rc.conf
-find . | cpio -H newc -o | gzip > ../binaries/domU-rootfs.cpio.gz
+cp ../binaries/initrd.cpio.gz ../binaries/domU-rootfs.cpio.gz
+find . | cpio -H newc -o | gzip >> ../binaries/domU-rootfs.cpio.gz
 cd ..
 rm -rf rootfs
 
 # DOM0 rootfs
 mkdir -p rootfs
 cd rootfs
-tar xzf ../binaries/initrd.tar.gz
 mkdir proc
 mkdir run
 mkdir srv
 mkdir sys
-rm var/run
 cp -ar ../binaries/dist/install/* .
 
+mkdir -p etc/local.d
 echo "#!/bin/bash
 
 export LD_LIBRARY_PATH=/usr/local/lib
@@ -78,8 +76,8 @@ bash /etc/init.d/xencommons start
 ${dom0_check}
 " > etc/local.d/xen.start
 chmod +x etc/local.d/xen.start
-echo "rc_verbose=yes" >> etc/rc.conf
-find . | cpio -H newc -o | gzip > ../binaries/dom0-rootfs.cpio.gz
+cp ../binaries/initrd.cpio.gz ../binaries/dom0-rootfs.cpio.gz
+find . | cpio -H newc -o | gzip >> ../binaries/dom0-rootfs.cpio.gz
 cd ..
 
 
diff --git a/automation/tests-artifacts/alpine/3.18-arm64v8.dockerfile b/automation/tests-artifacts/alpine/3.18-arm64v8.dockerfile
index a4542f703997..78d465dc6a39 100644
--- a/automation/tests-artifacts/alpine/3.18-arm64v8.dockerfile
+++ b/automation/tests-artifacts/alpine/3.18-arm64v8.dockerfile
@@ -60,7 +60,10 @@ RUN \
   echo "ttyS0::respawn:/sbin/getty -L ttyS0 115200 vt100" >> /etc/inittab && \
   echo "hvc0::respawn:/sbin/getty -L hvc0 115200 vt100" >> /etc/inittab && \
   passwd -d "root" root && \
+  echo "rc_verbose=yes" >> /etc/rc.conf && \
   \
   # Create rootfs
   cd / && \
-  tar cvzf /initrd.tar.gz bin dev etc home init lib mnt opt root sbin usr var
+  tar cvzf /initrd.tar.gz bin dev etc home init lib mnt opt root sbin usr var && \
+  find bin dev etc home init lib mnt opt root sbin usr var |\
+    cpio -o -H newc | gzip > /initrd.cpio.gz
diff --git a/automation/tests-artifacts/alpine/3.18.dockerfile b/automation/tests-artifacts/alpine/3.18.dockerfile
index 311a92889b87..ff124fef49a8 100644
--- a/automation/tests-artifacts/alpine/3.18.dockerfile
+++ b/automation/tests-artifacts/alpine/3.18.dockerfile
@@ -61,6 +61,7 @@ RUN \
   echo "hvc0::respawn:/sbin/getty -L hvc0 115200 vt100" >> /etc/inittab && \
   echo > /etc/modules && \
   passwd -d "root" root && \
+  echo "rc_verbose=yes" >> /etc/rc.conf && \
   \
   # Create rootfs
   cd / && \
-- 
git-series 0.9.1


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From: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
To: xen-devel@lists.xenproject.org
Cc: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Stefano Stabellini ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH test-artifacts v2 14/12] scripts: build initrd cpio
Date: Mon,  7 Apr 2025 14:31:14 +0200
Message-ID: <20250407123448.1520451-2-marmarek@invisiblethingslab.com>
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Build initrd format directly digestable by the kernel. Additionally,
include it itself inside as boot/initrd-domU file, for domU booting in
tests.
This should avoid the need to repack tar -> cpio as part of the test
job.

Keep generating initrd.tar.gz as that's still used by older branches.

Signed-off-by: Marek Marczykowski-Górecki 
---
 scripts/x86_64-rootfs-alpine.sh | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/scripts/x86_64-rootfs-alpine.sh b/scripts/x86_64-rootfs-alpine.sh
index b70b3a5..13e85fa 100755
--- a/scripts/x86_64-rootfs-alpine.sh
+++ b/scripts/x86_64-rootfs-alpine.sh
@@ -58,3 +58,8 @@ passwd -d "root" root
 cd /
 tar cvzf "${WORKDIR}/binaries/initrd.tar.gz" \
     bin dev etc home init lib mnt opt root sbin usr var
+mkdir boot
+find bin dev etc home init lib mnt opt root sbin usr var |\
+    cpio -o -H newc | gzip > boot/initrd-domU
+find bin boot dev etc home init lib mnt opt root sbin usr var |\
+    cpio -o -H newc | gzip > "${WORKDIR}/binaries/initrd.cpio.gz" \
-- 
2.48.1



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Feedback-ID: i1568416f:Fastmail
From: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
To: xen-devel@lists.xenproject.org
Cc: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Stefano Stabellini ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH test-artifacts v2 13/12] scripts: add rc_verbose=yes to /etc/rc.conf
Date: Mon,  7 Apr 2025 14:31:13 +0200
Message-ID: <20250407123448.1520451-1-marmarek@invisiblethingslab.com>
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This is done in every single test job, so do it at the initrd build
time.

Signed-off-by: Marek Marczykowski-Górecki 
---
 scripts/x86_64-rootfs-alpine.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/scripts/x86_64-rootfs-alpine.sh b/scripts/x86_64-rootfs-alpine.sh
index f8b04c5..b70b3a5 100755
--- a/scripts/x86_64-rootfs-alpine.sh
+++ b/scripts/x86_64-rootfs-alpine.sh
@@ -50,6 +50,7 @@ echo "ttyS0" >> /etc/securetty
 echo "hvc0" >> /etc/securetty
 echo "ttyS0::respawn:/sbin/getty -L ttyS0 115200 vt100" >> /etc/inittab
 echo "hvc0::respawn:/sbin/getty -L hvc0 115200 vt100" >> /etc/inittab
+echo "rc_verbose=yes" >> /etc/rc.conf
 echo > /etc/modules
 passwd -d "root" root
 
-- 
2.48.1



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From: "Anthony PERARD" 
Subject: =?utf-8?Q?Re:=20Ping:=20[PATCH]=20libxc/PM:=20correct=20(not=20just)=20error=20handling=20in=20xc=5Fget=5Fcpufreq=5Fpara()?=
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To: "Jan Beulich" 
Cc: "Juergen Gross" , xen-devel@lists.xenproject.org
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On Mon, Apr 07, 2025 at 01:38:24PM +0200, Jan Beulich wrote:
> On 27.03.2025 14:32, Jan Beulich wrote:
> > From their introduction all xc_hypercall_bounce_pre() uses, when they
> > failed, would properly cause exit from the function including cleanup,
> > yet without informing the caller of the failure. Purge the unlock_1
> > label for being both pointless and mis-named.
> > 
> > An earlier attempt to switch to the usual split between return value and
> > errno wasn't quite complete.
> > 
> > HWP work made the cleanup of the "available governors" array
> > conditional, neglecting the fact that the condition used may not be the
> > condition that was used to allocate the buffer (as the structure field
> > is updated upon getting back EAGAIN). Throughout the function, use the
> > local variable being introduced to address that.
> > 
> > Fixes: 4513025a8790 ("libxc: convert sysctl interfaces over to hypercall buffers")
> > Amends: 73367cf3b4b4 ("libxc: Fix xc_pm API calls to return negative error and stash error in errno")
> > Fixes: 31e264c672bc ("pmstat&xenpm: Re-arrage for cpufreq union")
> > Signed-off-by: Jan Beulich 
> 
> May I ask for an ack or comments towards what needs changing?

Calling xc_get_cpufreq_para with:

    user_para = {
        .cpu_num = 0,
        .freq_num = 0,
        .gov_num = 9,
    };

seems broken. It's looks like the `scaling_available_governors` bounce
buffer is going to be used without been allocated properly handled, with
this patch.

Cheers,

-- 

Anthony Perard | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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Hi Michal,

On 07/04/2025 10:04, Orzel, Michal wrote:
>
> On 03/04/2025 19:12, Ayan Kumar Halder wrote:
>> Added a new file prepare_xen_region.inc to hold the common earlyboot MPU regions
>> configurations across arm64 and arm32.
>>
>> prepare_xen_region, fail_insufficient_regions() will be used by both arm32 and
>> arm64. Thus, they have been moved to prepare_xen_region.inc.
>>
>> enable_secondary_cpu_mm() is a stub which is moved to prepare_xen_region.inc as
>> SMP is currently not supported for MPU.
> This does not sound right. If you want a place to keep some common MPU stuff
> between Arm64 and Arm32, you need to come up with better name for a file. SMP
> has nothing to do here with preparing regions so it feels odd to have
> enable_secondary_cpu_mm stub there.

Can I rename prepare-xen-region.inc to mpu.inc ?

Julien/Luca - any thoughts ?

>
> Also, new files should use dashes '-' and not underscores '_'.

Ack

- Ayan

>
> ~Michal
>


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Subject: Re: Ping: [PATCH] libxc/PM: correct (not just) error handling in
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On 07.04.2025 14:45, Anthony PERARD wrote:
> On Mon, Apr 07, 2025 at 01:38:24PM +0200, Jan Beulich wrote:
>> On 27.03.2025 14:32, Jan Beulich wrote:
>>> From their introduction all xc_hypercall_bounce_pre() uses, when they
>>> failed, would properly cause exit from the function including cleanup,
>>> yet without informing the caller of the failure. Purge the unlock_1
>>> label for being both pointless and mis-named.
>>>
>>> An earlier attempt to switch to the usual split between return value and
>>> errno wasn't quite complete.
>>>
>>> HWP work made the cleanup of the "available governors" array
>>> conditional, neglecting the fact that the condition used may not be the
>>> condition that was used to allocate the buffer (as the structure field
>>> is updated upon getting back EAGAIN). Throughout the function, use the
>>> local variable being introduced to address that.
>>>
>>> Fixes: 4513025a8790 ("libxc: convert sysctl interfaces over to hypercall buffers")
>>> Amends: 73367cf3b4b4 ("libxc: Fix xc_pm API calls to return negative error and stash error in errno")
>>> Fixes: 31e264c672bc ("pmstat&xenpm: Re-arrage for cpufreq union")
>>> Signed-off-by: Jan Beulich 
>>
>> May I ask for an ack or comments towards what needs changing?
> 
> Calling xc_get_cpufreq_para with:
> 
>     user_para = {
>         .cpu_num = 0,
>         .freq_num = 0,
>         .gov_num = 9,
>     };
> 
> seems broken. It's looks like the `scaling_available_governors` bounce
> buffer is going to be used without been allocated properly handled, with
> this patch.

The local variable "in_gov_num" controls its allocation and use, together with
has_num. "Use" as in passing to set_xen_guest_handle(). The only further use
of that bounce buffer is on the exit path, i.e. it being passed to
xc_hypercall_bounce_post(). The backing function xc__hypercall_bounce_post()
is dealing fine with the buffer being NULL. And that's what it would be left
at from DECLARE_NAMED_HYPERCALL_BOUNCE() if buffer allocation is skipped.

Jan


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From: =?UTF-8?q?Petr=20Van=C4=9Bk?= 
To: Thomas Gleixner 
Cc: Andrew Cooper ,
	arkamar@atlas.cz,
	Juergen Gross ,
	linux-kernel@vger.kernel.org,
	stable@vger.kernel.org,
	x86@kernel.org,
	xen-devel@lists.xenproject.org,
	linux-acpi@vger.kernel.org
Subject: [PATCH v2 1/1] x86/acpi: Don't limit CPUs to 1 for Xen PV guests due to disabled ACPI
Date: Mon,  7 Apr 2025 15:24:27 +0200
Message-ID: <20250407132445.6732-2-arkamar@atlas.cz>
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 <20250407132445.6732-1-arkamar@atlas.cz>
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Xen disables ACPI for PV guests in DomU, which causes acpi_mps_check()
to return 1 when CONFIG_X86_MPPARSE is not set. As a result, APIC is
disabled and the guest is later limited to a single vCPU, despite being
configured with more.

This regression was introduced in version 6.9 in commit 7c0edad3643f
("x86/cpu/topology: Rework possible CPU management"), which added an
early check that limits CPUs to 1 if apic_is_disabled.

This patch updates acpi_mps_check() logic to return 0 early when running
as a Xen PV guest in DomU, preventing APIC from being disabled in this
specific case and restoring correct multi-vCPU behaviour.

Fixes: 7c0edad3643f ("x86/cpu/topology: Rework possible CPU management")
Cc: Thomas Gleixner 
Cc: x86@kernel.org
Cc: xen-devel@lists.xenproject.org
Cc: stable@vger.kernel.org # 6.9+
Signed-off-by: Petr Vaněk 
---
 arch/x86/kernel/acpi/boot.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index dae6a73be40e..9fa321a95eb3 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -23,6 +23,8 @@
 #include 
 #include 
 
+#include 
+
 #include 
 #include 
 #include 
@@ -1729,6 +1731,15 @@ int __init acpi_mps_check(void)
 {
 #if defined(CONFIG_X86_LOCAL_APIC) && !defined(CONFIG_X86_MPPARSE)
 /* mptable code is not built-in*/
+
+	/*
+	 * Xen disables ACPI in PV DomU guests but it still emulates APIC and
+	 * supports SMP. Returning early here ensures that APIC is not disabled
+	 * unnecessarily and the guest is not limited to a single vCPU.
+	 */
+	if (xen_pv_domain() && !xen_initial_domain())
+		return 0;
+
 	if (acpi_disabled || acpi_noirq) {
 		pr_warn("MPS support code is not built-in, using acpi=off or acpi=noirq or pci=noacpi may have problem\n");
 		return 1;
-- 
2.48.1



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From: =?UTF-8?q?Petr=20Van=C4=9Bk?= 
To: Thomas Gleixner 
Cc: Andrew Cooper ,
	arkamar@atlas.cz,
	Juergen Gross ,
	linux-kernel@vger.kernel.org,
	stable@vger.kernel.org,
	x86@kernel.org,
	xen-devel@lists.xenproject.org,
	linux-acpi@vger.kernel.org
Subject: Re: [PATCH 1/1] x86/cpu/topology: Don't limit CPUs to 1 for Xen PV guests due to disabled APIC
Date: Mon,  7 Apr 2025 15:24:26 +0200
Message-ID: <20250407132445.6732-1-arkamar@atlas.cz>
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On Sun, Apr 06, 2025 at 12:08:29PM +0200, Thomas Gleixner wrote:
> On Sat, Apr 05 2025 at 20:16, Petr Vaněk wrote:
> 
> > Xen PV guests in DomU have APIC disabled by design, which causes
> > topology_apply_cmdline_limits_early() to limit the number of possible
> > CPUs to 1, regardless of the configured number of vCPUs.
> 
> PV guests have a APIC emulation and there is no code which actually
> disables the APIC by design unconditionally. There is one way though,
> which disables the APIC indirectly.

It seems I have got a bit lost in APIC/ACPI abbreviations. Sorry.

> xen_arch_setup() disables ACPI, which in turn causes acpi_mps_check() to
> return 1, which disables the APIC. This only happens when the kernel
> configuration has:
> 
>      CONFIG_X86_MPPARSE=n
>      CONFIG_ACPI=y
> 
> If you enable MPPARSE the problem goes away, no?

Yes, it goes away.

> > +	/* 'maxcpus=0' 'nosmp' 'nolapic'
> > +	 *
> > +	 * The apic_is_disabled check is ignored for Xen PV domains because Xen
> > +	 * disables ACPI in unprivileged PV DomU guests, which would otherwise limit
> > +	 * CPUs to 1, even if multiple vCPUs were configured.
> 
> This is the wrong place as it invalidates the effect of 'nolapic' on the
> kernel command line for XEN PV.
> 
> You actually explain in the comment that XEN disables ACPI, so why are
> you slapping this xen check into this code instead of doing the obvious
> and prevent acpi_mps_check() to cause havoc?

Thank you for your explanation and suggestion. I will correct acpi_mps_check()
in following patch.

Thanks,
Petr


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Subject: Re: [PATCH] x86/cpu: Validate CPUID leaf 0x2 EDX output
To: Jan Beulich ,
 "xen-devel@lists.xenproject.org" 
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On 19/03/2025 11:24 am, Jan Beulich wrote:
> From: Ahmed S. Darwish 
>
> CPUID leaf 0x2 emits one-byte descriptors in its four output registers
> EAX, EBX, ECX, and EDX.  For these descriptors to be valid, the most
> significant bit (MSB) of each register must be clear.
>
> Leaf 0x2 parsing at intel.c only validated the MSBs of EAX, EBX, and
> ECX, but left EDX unchecked.
>
> Validate EDX's most-significant bit as well.
>
> Fixes: 1aa6feb63bfd ("Port CPU setup code from Linux 2.6")
> Signed-off-by: Ahmed S. Darwish 
> Signed-off-by: Ingo Molnar 
> Link: https://lore.kernel.org/r/20250304085152.51092-3-darwi@linutronix.de
>
> Use ARRAY_SIZE() though.
>
> Origin: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 1881148215c6
> Signed-off-by: Jan Beulich 

Acked-by: Andrew Cooper 

> ---
> I wasn't really convinced that we strictly need f6bdaab79ee4 ("x86/cpu:
> Properly parse CPUID leaf 0x2 TLB descriptor 0x63") as well. Thoughts?

I don't think we need it either.


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From: Luca Fancellu 
To: Ayan Kumar Halder 
CC: "Orzel, Michal" , Ayan Kumar Halder
	, "xen-devel@lists.xenproject.org"
	, Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Volodymyr Babchuk 
Subject: Re: [PATCH v4 1/3] xen/arm: Move some of the functions to common file
Thread-Topic: [PATCH v4 1/3] xen/arm: Move some of the functions to common
 file
Thread-Index: AQHbpLu5pa88e8EeQkugLRqmrl+P07OX7qMAgABHGwCAAAOFAA==
Date: Mon, 7 Apr 2025 13:31:58 +0000
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Hi Ayan,

> On 7 Apr 2025, at 14:18, Ayan Kumar Halder  wrote:
>=20
> Hi Michal,
>=20
> On 07/04/2025 10:04, Orzel, Michal wrote:
>>=20
>> On 03/04/2025 19:12, Ayan Kumar Halder wrote:
>>> Added a new file prepare_xen_region.inc to hold the common earlyboot MP=
U regions
>>> configurations across arm64 and arm32.
>>>=20
>>> prepare_xen_region, fail_insufficient_regions() will be used by both ar=
m32 and
>>> arm64. Thus, they have been moved to prepare_xen_region.inc.
>>>=20
>>> enable_secondary_cpu_mm() is a stub which is moved to prepare_xen_regio=
n.inc as
>>> SMP is currently not supported for MPU.
>> This does not sound right. If you want a place to keep some common MPU s=
tuff
>> between Arm64 and Arm32, you need to come up with better name for a file=
. SMP
>> has nothing to do here with preparing regions so it feels odd to have
>> enable_secondary_cpu_mm stub there.
>=20
> Can I rename prepare-xen-region.inc to mpu.inc ?
>=20
> Julien/Luca - any thoughts ?

I would say we leave the SMP stuff out from the common file, at some point =
we could start working on the
SMP support and maybe there would be difference between arm64 and arm32.

what about common-cpu.inc?

>=20
>>=20
>> Also, new files should use dashes '-' and not underscores '_'.
>=20
> Ack
>=20
> - Ayan
>=20
>>=20
>> ~Michal
>>=20
>=20

Cheers,
Luca



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On 01.04.2025 15:26, Roger Pau Monné wrote:
> nxcompat should be enabled by default I think?  I can of course make
> it explicit by adding to the PE link command line.

--nxcompat wasn't the default originally, then was made the default for MinGW
(and by mistake for everything else as well), then it being the default was
undone for Cygwin. I've meanwhile submitted a patch to undo it for everything
that isn't MinGW [1]. I simply don't think the linker is in the position to
declare that every binary is NX-compatible. It's the programmers who have to
determine that. With the flag not being honored everywhere one also can't
simply test an EFI binary on a couple of hosts, at least as long as the EFI
implementation there is a black box.

So yes, we will need to pass --nxcompat explicitly in any event.

Jan

[1] https://sourceware.org/pipermail/binutils/2025-April/140422.html


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On 07/04/2025 14:31, Luca Fancellu wrote:
> Hi Ayan,
Hi,
>
>> On 7 Apr 2025, at 14:18, Ayan Kumar Halder  wrote:
>>
>> Hi Michal,
>>
>> On 07/04/2025 10:04, Orzel, Michal wrote:
>>> On 03/04/2025 19:12, Ayan Kumar Halder wrote:
>>>> Added a new file prepare_xen_region.inc to hold the common earlyboot MPU regions
>>>> configurations across arm64 and arm32.
>>>>
>>>> prepare_xen_region, fail_insufficient_regions() will be used by both arm32 and
>>>> arm64. Thus, they have been moved to prepare_xen_region.inc.
>>>>
>>>> enable_secondary_cpu_mm() is a stub which is moved to prepare_xen_region.inc as
>>>> SMP is currently not supported for MPU.
>>> This does not sound right. If you want a place to keep some common MPU stuff
>>> between Arm64 and Arm32, you need to come up with better name for a file. SMP
>>> has nothing to do here with preparing regions so it feels odd to have
>>> enable_secondary_cpu_mm stub there.
>> Can I rename prepare-xen-region.inc to mpu.inc ?
>>
>> Julien/Luca - any thoughts ?
> I would say we leave the SMP stuff out from the common file, at some point we could start working on the
> SMP support and maybe there would be difference between arm64 and arm32.
Do you want to duplicate enable_secondary_cpu_mm() in arm32 and arm64 ? 
I am fine with that.
>
> what about common-cpu.inc?

Sounds ok.

Michal or Julien should comment as well.

- Ayan

>
>>> Also, new files should use dashes '-' and not underscores '_'.
>> Ack
>>
>> - Ayan
>>
>>> ~Michal
>>>
> Cheers,
> Luca
>


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Subject: Re: [PATCH] x86/xen: disable CPU idle and frequency drivers for PVH
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To: Roger Pau Monne , ,
	
CC: Stefano Stabellini , ,
	, Juergen Gross , "Boris
 Ostrovsky" , Thomas Gleixner
	, Ingo Molnar , Borislav Petkov
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On 2025-04-07 06:18, Roger Pau Monne wrote:
> When running as a PVH dom0 the ACPI tables exposed to Linux are (mostly)
> the native ones, thus exposing the C and P states, that can lead to
> attachment of CPU idle and frequency drivers.  However the entity in
> control of the CPU C and P states is Xen, as dom0 doesn't have a full view
> of the system load, neither has all CPUs assigned and identity pinned.
> 
> Like it's done for classic PV guests, prevent Linux from using idle or
> frequency state drivers when running as a PVH dom0.
> 
> On an AMD EPYC 7543P system without this fix a Linux PVH dom0 will keep the
> host CPUs spinning at 100% even when dom0 is completely idle, as it's
> attempting to use the acpi_idle driver.
> 
> Signed-off-by: Roger Pau Monné 

Reviewed-by: Jason Andryuk 

Thanks,
Jason


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Date: Mon, 7 Apr 2025 16:21:29 +0200
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Subject: Re: [PATCH v4] x86/domain: revisit logging in arch_domain_create()
To: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org,
 michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org,
 dmukhin@ford.com, xen-devel@lists.xenproject.org
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On 05.04.2025 01:21, dmkhn@proton.me wrote:
> --- a/xen/arch/x86/domain.c
> +++ b/xen/arch/x86/domain.c
> @@ -791,13 +791,14 @@ int arch_domain_create(struct domain *d,
>      {
>          if ( !opt_allow_unsafe )
>          {
> -            printk(XENLOG_G_ERR "Xen does not allow DomU creation on this CPU"
> -                   " for security reasons.\n");
> +            printk(XENLOG_G_ERR
> +                   "%pd: cannot create domain on this CPU due to security reasons\n",
> +                   d);
>              return -EPERM;

I was about to give an ack, but here and ...

> @@ -807,16 +808,20 @@ int arch_domain_create(struct domain *d,
>  
>      if ( emflags & ~XEN_X86_EMU_ALL )
>      {
> -        printk(XENLOG_G_ERR "d%d: Invalid emulation bitmap: %#x\n",
> -               d->domain_id, emflags);
> +        printk(XENLOG_G_ERR
> +               "%pd: invalid emulation bitmap: %#x\n",
> +               d, emflags);
>          return -EINVAL;
>      }
>  
>      if ( !emulation_flags_ok(d, emflags) )
>      {
> -        printk(XENLOG_G_ERR "d%d: Xen does not allow %s domain creation "
> -               "with the current selection of emulators: %#x\n",
> -               d->domain_id, is_hvm_domain(d) ? "HVM" : "PV", emflags);
> +        printk(XENLOG_G_ERR
> +               "%pd: cannot create %s %sdomain with emulators: %#x\n",
> +               d,
> +               is_hvm_domain(d) ? "HVM" : "PV",
> +               is_hardware_domain(d) ? "hardware " : "",
> +               emflags);
>          return -EOPNOTSUPP;
>      }

... here I question the re-wording: Xen could very well create domains in
these cases. It merely refuses to for one reason or another. In the
latter case the re-wording may be kind of okay, because code elsewhere may
need updating. In the former case, however, the situation is a pretty
clear cut. It doesn't need to be the original wording, but minimally in
what you suggest it needs to be "s/cannot/will not/" or some such.

Plus a nit: In the revision log you say "shortened message text where
possible", yet then you swapped in "due to" for the prior "for" in the
former of the two cases discussed here. That's clearly longer, without
(imo) gaining us anything. Similarly it's unclear why you replaced "DomU".

Jan


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Date: Mon, 7 Apr 2025 15:29:42 +0100
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Subject: Re: [PATCH v4 1/3] xen/arm: Move some of the functions to common file
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To: Luca Fancellu ,
 Ayan Kumar Halder 
Cc: "xen-devel@lists.xenproject.org" ,
 Stefano Stabellini , Julien Grall ,
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 Volodymyr Babchuk 
References: <20250403171241.975377-1-ayan.kumar.halder@amd.com>
 <20250403171241.975377-2-ayan.kumar.halder@amd.com>
 
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Hi Luca,

On 04/04/2025 10:06, Luca Fancellu wrote:
> Hi Ayan,
>
>> On 3 Apr 2025, at 18:12, Ayan Kumar Halder  wrote:
>>
>> Added a new file prepare_xen_region.inc to hold the common earlyboot MPU regions
>> configurations across arm64 and arm32.
>>
>> prepare_xen_region, fail_insufficient_regions() will be used by both arm32 and
>> arm64. Thus, they have been moved to prepare_xen_region.inc.
>>
>> enable_secondary_cpu_mm() is a stub which is moved to prepare_xen_region.inc as
>> SMP is currently not supported for MPU.
>>
>> *_PRBAR are moved to arm64/sysregs.h.
>> *_PRLAR are moved to prepare_xen_region.inc as they are common between arm32
>> and arm64.
>>
>> Introduce WRITE_SYSREG_ASM to write to the system registers from the common asm
>> file.
>>
>> Signed-off-by: Ayan Kumar Halder 
>> ---
> The split for the common code seems ok to me, but this patch is introducing an issue for the arm64 compilation,
Sorry, I moved something at the last moment without testing. :(
> I’ve done an experiment and with these changes I’m able to compile both, but feel free to ignore if it’s no what you
> had in mind.
The change looks good. However, ...
>
> diff --git a/xen/arch/arm/include/asm/arm32/sysregs.h b/xen/arch/arm/include/asm/arm32/sysregs.h
> index 22871999afb3..a90d1610a155 100644
> --- a/xen/arch/arm/include/asm/arm32/sysregs.h
> +++ b/xen/arch/arm/include/asm/arm32/sysregs.h
> @@ -20,6 +20,13 @@
>    * uses r0 as a placeholder register. */
>   #define CMD_CP32(name...)      "mcr " __stringify(CP32(r0, name)) ";"
>   
> +#define REGION_TEXT_PRBAR       0x18    /* SH=11 AP=10 XN=0 */
> +#define REGION_RO_PRBAR         0x1D    /* SH=11 AP=10 XN=1 */
> +#define REGION_DATA_PRBAR       0x19    /* SH=11 AP=00 XN=1 */
> +#define REGION_DEVICE_PRBAR     0x11    /* SH=10 AP=00 XN=1 */
> +
> +#define WRITE_SYSREG_ASM(v, name) mcr CP32(v, name)
> +
>   #ifndef __ASSEMBLY__
>   
>   /* C wrappers */
> diff --git a/xen/arch/arm/include/asm/cpregs.h b/xen/arch/arm/include/asm/cpregs.h
> index 6019a2cbdd89..b909adc102a5 100644
> --- a/xen/arch/arm/include/asm/cpregs.h
> +++ b/xen/arch/arm/include/asm/cpregs.h
> @@ -1,10 +1,6 @@
>   #ifndef __ASM_ARM_CPREGS_H
>   #define __ASM_ARM_CPREGS_H
>   
> -#ifdef CONFIG_MPU
> -#include 
> -#endif
> -
>   /*
>    * AArch32 Co-processor registers.
>    *
> @@ -502,6 +498,12 @@
>   #define MVFR0_EL1               MVFR0
>   #define MVFR1_EL1               MVFR1
>   #define MVFR2_EL1               MVFR2
> +#define HMPUIR                  p15,4,c0,c0,4
> +#define HPRSELR                 p15,4,c6,c2,1
> +#define PRBAR_EL2               p15,4,c6,c3,0
> +#define PRLAR_EL2               p15,4,c6,c8,1
> +#define MPUIR_EL2               HMPUIR
> +#define PRSELR_EL2              HPRSELR

Considering that there will be lots of arm32 MPU specific registers, do 
you want to move them to mpu/cpregs.h ?

That would be my style preference.

This issue does not occur with arm64 as compiler provides most of them.


Michal or Julien - thoughts ?

Rest look ok.

- Ayan

>   #endif
>   
>   #endif
> diff --git a/xen/arch/arm/include/asm/mpu/cpregs.h b/xen/arch/arm/include/asm/mpu/cpregs.h
> deleted file mode 100644
> index 66871379a53b..000000000000
> --- a/xen/arch/arm/include/asm/mpu/cpregs.h
> +++ /dev/null
> @@ -1,30 +0,0 @@
> -/* SPDX-License-Identifier: GPL-2.0-only */
> -
> -#ifndef __ASM_ARM_MPU_CPREGS_H
> -#define __ASM_ARM_MPU_CPREGS_H
> -
> -#define REGION_TEXT_PRBAR       0x18    /* SH=11 AP=10 XN=0 */
> -#define REGION_RO_PRBAR         0x1D    /* SH=11 AP=10 XN=1 */
> -#define REGION_DATA_PRBAR       0x19    /* SH=11 AP=00 XN=1 */
> -#define REGION_DEVICE_PRBAR     0x11    /* SH=10 AP=00 XN=1 */
> -
> -#define HMPUIR          p15,4,c0,c0,4
> -
> -/* CP15 CR6: MPU Protection Region Base/Limit/Select Address Register */
> -#define HPRSELR         p15,4,c6,c2,1
> -#define PRBAR_EL2       p15,4,c6,c3,0
> -#define PRLAR_EL2       p15,4,c6,c8,1
> -
> -#define MPUIR_EL2       HMPUIR
> -#define PRSELR_EL2      HPRSELR
> -
> -#define WRITE_SYSREG_ASM(v, name) mcr CP32(v, name)
> -
> -#endif /* __ASM_ARM_MPU_CPREGS_H */
> -
> -/*
> - * Local variables:
> - * mode: ASM
> - * indent-tabs-mode: nil
> - * End:
> - */
>
>
>


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From: Luca Fancellu 
To: Ayan Kumar Halder 
CC: Ayan Kumar Halder ,
	"xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Michal Orzel ,
	Volodymyr Babchuk 
Subject: Re: [PATCH v4 1/3] xen/arm: Move some of the functions to common file
Thread-Topic: [PATCH v4 1/3] xen/arm: Move some of the functions to common
 file
Thread-Index: AQHbpLu5pa88e8EeQkugLRqmrl+P07OTN/eAgAURkgCAAAEbAA==
Date: Mon, 7 Apr 2025 14:34:11 +0000
Message-ID: 
References: <20250403171241.975377-1-ayan.kumar.halder@amd.com>
 <20250403171241.975377-2-ayan.kumar.halder@amd.com>
 
 
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Date: Mon, 7 Apr 2025 15:50:14 +0100
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Subject: Re: [PATCH] x86/mem-sharing: short-circuit p2m_is_shared() when
 MEM_SHARING=n
To: Jan Beulich ,
 "xen-devel@lists.xenproject.org" 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Tamas K Lengyel 
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On 03/04/2025 9:41 am, Jan Beulich wrote:
> Some of the uses of dom_cow aren't easily DCE-able (without extra
> #ifdef-ary), and hence it being constantly NULL when MEM_SHARING=n
> misguides Coverity into thinking that there may be a NULL deref in
>
>         if ( p2m_is_shared(t) )
>             d = dom_cow;
>
>         if ( get_page(page, d) )
>             return page;
>
> (in get_page_from_mfn_and_type()). Help the situation by making
> p2m_is_shared() be compile-time false when MEM_SHARING=n, thus also
> permitting the compiler to DCE some other code.
>
> Note that p2m_is_sharable() isn't used outside of mem_sharing.c, and
> hence P2M_SHARABLE_TYPES can simply be left undefined when
> MEM_SHARING=n.
>
> Coverity ID: 1645573
> Fixes: 79d91e178a1a ("dom_cow is needed for mem-sharing only")
> Signed-off-by: Jan Beulich 

We'll be swapping this for a different issue, but least "logical and
with 0" is easier to filter.

> ---
> Might be nice to also eliminate p2m_ram_shared (and for MEM_PAGING=n
> also the three paging types) entirely from such builds, to eliminate the
> risk of accidental use. Yet that would apparently also come at the price
> of more #ifdef-ary. Opinions?

Hard to say without seeing how it looks.  I wouldn't worry for now.

>
> --- a/xen/arch/x86/include/asm/p2m.h
> +++ b/xen/arch/x86/include/asm/p2m.h
> @@ -136,11 +136,16 @@ typedef unsigned int p2m_query_t;
>  #endif
>  
>  /* Shared types */
> +#ifdef CONFIG_MEM_SHARING
>  /* XXX: Sharable types could include p2m_ram_ro too, but we would need to
>   * reinit the type correctly after fault */
>  #define P2M_SHARABLE_TYPES (p2m_to_mask(p2m_ram_rw) \
>                              | p2m_to_mask(p2m_ram_logdirty) )
>  #define P2M_SHARED_TYPES   (p2m_to_mask(p2m_ram_shared))
> +#else
> +/* P2M_SHARABLE_TYPES deliberately not provided. */
> +#define P2M_SHARED_TYPES 0

You need P2M_SHARABLE_TYPES too, or p2m_is_sharable() will start
becoming a syntax error.

~Andrew


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Date: Mon, 7 Apr 2025 16:55:01 +0200
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Subject: Re: [PATCH v4 1/3] xen/arm: Move some of the functions to common file
To: Ayan Kumar Halder ,
 Luca Fancellu 
Cc: Ayan Kumar Halder ,
 "xen-devel@lists.xenproject.org" ,
 Stefano Stabellini , Julien Grall ,
 Bertrand Marquis ,
 Volodymyr Babchuk 
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From: "Orzel, Michal" 
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On 07/04/2025 16:07, Ayan Kumar Halder wrote:
> 
> On 07/04/2025 14:31, Luca Fancellu wrote:
>> Hi Ayan,
> Hi,
>>
>>> On 7 Apr 2025, at 14:18, Ayan Kumar Halder  wrote:
>>>
>>> Hi Michal,
>>>
>>> On 07/04/2025 10:04, Orzel, Michal wrote:
>>>> On 03/04/2025 19:12, Ayan Kumar Halder wrote:
>>>>> Added a new file prepare_xen_region.inc to hold the common earlyboot MPU regions
>>>>> configurations across arm64 and arm32.
>>>>>
>>>>> prepare_xen_region, fail_insufficient_regions() will be used by both arm32 and
>>>>> arm64. Thus, they have been moved to prepare_xen_region.inc.
>>>>>
>>>>> enable_secondary_cpu_mm() is a stub which is moved to prepare_xen_region.inc as
>>>>> SMP is currently not supported for MPU.
>>>> This does not sound right. If you want a place to keep some common MPU stuff
>>>> between Arm64 and Arm32, you need to come up with better name for a file. SMP
>>>> has nothing to do here with preparing regions so it feels odd to have
>>>> enable_secondary_cpu_mm stub there.
>>> Can I rename prepare-xen-region.inc to mpu.inc ?
>>>
>>> Julien/Luca - any thoughts ?
>> I would say we leave the SMP stuff out from the common file, at some point we could start working on the
>> SMP support and maybe there would be difference between arm64 and arm32.
> Do you want to duplicate enable_secondary_cpu_mm() in arm32 and arm64 ? 
> I am fine with that.
+1

>>
>> what about common-cpu.inc?
> 
> Sounds ok.
common.inc should suffice. Let's not split hairs.

~Michal



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Subject: Re: [PATCH] x86/vmx: Drop memory clobbers on VMX instruction wrappers
To: Jan Beulich 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Xen-devel 
References: <20250407104544.1823150-1-andrew.cooper3@citrix.com>
 
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From: Andrew Cooper 
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On 07/04/2025 1:00 pm, Jan Beulich wrote:
> On 07.04.2025 12:45, Andrew Cooper wrote:
>> The use, or not, of memory clobbers on the VMX instructions is complicated.
>>
>> There are two separate aspects to consider:
>>
>> 1. Originally, the VMX instructions used hardcoded bytes, including memory
>>    encodings.  Therefore, the compiler couldn't see the correct relationship
>>    between parameters.  The memory clobber for this purpose should have been
>>    dropped when switching to mnemonics.
>>
>>    This covers INVEPT and INVVPID, each of which has no change in memory, nor
>>    in fact the current address space in use.
> Yet then they need to come after respective table modifications.

They don't AFAICT, but the reasoning is complicated.  I'll expand on it
in v2.

>
>> 2. Most of these instructions operate on a VMCS region.  This is a (mostly)
>>    opaque data structure, operated on by physical address.  Again, this hides
>>    the relationship between the instructions and the VMCS from the compiler.
>>
>>    The processor might use internal state to cache the VMCS (writing it back
>>    to memory on VMCLEAR), or it might operate on memory directly.
>>
>>    Because the VMCS is opaque (so the compiler has nothing interesting to know
>>    about it), and because VMREAD/VMWRITE have chosen not to use a memory
>>    clobber (to tell the compiler that something changed), none of the other
>>    VMX instructions should use a memory clobber either.
> For this, there's actually a good example below, with everything needed in
> context.
>
>>    This covers VMXON, VMXOFF, VMPTRLD and VMPTCLEAR.
> Nit: The last insn is VMCLEAR.

Oh, so it is, and we've got an incorrectly named wrapper.

>
>> --- a/xen/arch/x86/hvm/vmx/vmcs.c
>> +++ b/xen/arch/x86/hvm/vmx/vmcs.c
>> @@ -754,7 +754,7 @@ static int _vmx_cpu_up(bool bsp)
>>                 _ASM_EXTABLE(1b, %l[vmxon_fault])
>>                 :
>>                 : [addr] "m" (this_cpu(vmxon_region))
>> -               : "memory"
>> +               :
>>                 : vmxon_fail, vmxon_fault );
>>  
>>      this_cpu(vmxon) = 1;
>> @@ -811,7 +811,7 @@ void cf_check vmx_cpu_down(void)
>>  
>>      BUG_ON(!(read_cr4() & X86_CR4_VMXE));
>>      this_cpu(vmxon) = 0;
>> -    asm volatile ( "vmxoff" ::: "memory" );
>> +    asm volatile ( "vmxoff" );
> With the clobber dropped, the compiler is free to re-order the prior store
> with the asm(), despite the "volatile", isn't it? [1] This may then be
> applicable elsewhere as well.

Yeah, these might better stay as they are.

~Andrew


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Date: Mon, 7 Apr 2025 16:57:57 +0200
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Subject: Re: [PATCH v4 1/3] xen/arm: Move some of the functions to common file
To: Luca Fancellu ,
 Ayan Kumar Halder 
Cc: Ayan Kumar Halder ,
 "xen-devel@lists.xenproject.org" ,
 Stefano Stabellini , Julien Grall ,
 Bertrand Marquis ,
 Volodymyr Babchuk 
References: <20250403171241.975377-1-ayan.kumar.halder@amd.com>
 <20250403171241.975377-2-ayan.kumar.halder@amd.com>
 
 
 
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On 07/04/2025 16:34, Luca Fancellu wrote:
> 
> 
> Hi Ayan,
> 
> 
>> On 7 Apr 2025, at 15:29, Ayan Kumar Halder  wrote:
>>
>> Hi Luca,
>>
>> On 04/04/2025 10:06, Luca Fancellu wrote:
>>> Hi Ayan,
>>>
>>>> On 3 Apr 2025, at 18:12, Ayan Kumar Halder  wrote:
>>>>
>>>> Added a new file prepare_xen_region.inc to hold the common earlyboot MPU regions
>>>> configurations across arm64 and arm32.
>>>>
>>>> prepare_xen_region, fail_insufficient_regions() will be used by both arm32 and
>>>> arm64. Thus, they have been moved to prepare_xen_region.inc.
>>>>
>>>> enable_secondary_cpu_mm() is a stub which is moved to prepare_xen_region.inc as
>>>> SMP is currently not supported for MPU.
>>>>
>>>> *_PRBAR are moved to arm64/sysregs.h.
>>>> *_PRLAR are moved to prepare_xen_region.inc as they are common between arm32
>>>> and arm64.
>>>>
>>>> Introduce WRITE_SYSREG_ASM to write to the system registers from the common asm
>>>> file.
>>>>
>>>> Signed-off-by: Ayan Kumar Halder 
>>>> ---
>>> The split for the common code seems ok to me, but this patch is introducing an issue for the arm64 compilation,
>> Sorry, I moved something at the last moment without testing. :(
>>> I’ve done an experiment and with these changes I’m able to compile both, but feel free to ignore if it’s no what you
>>> had in mind.
>> The change looks good. However, ...
>>>
>>> diff --git a/xen/arch/arm/include/asm/arm32/sysregs.h b/xen/arch/arm/include/asm/arm32/sysregs.h
>>> index 22871999afb3..a90d1610a155 100644
>>> --- a/xen/arch/arm/include/asm/arm32/sysregs.h
>>> +++ b/xen/arch/arm/include/asm/arm32/sysregs.h
>>> @@ -20,6 +20,13 @@
>>>   * uses r0 as a placeholder register. */
>>>  #define CMD_CP32(name...)      "mcr " __stringify(CP32(r0, name)) ";"
>>>  +#define REGION_TEXT_PRBAR       0x18    /* SH=11 AP=10 XN=0 */
>>> +#define REGION_RO_PRBAR         0x1D    /* SH=11 AP=10 XN=1 */
>>> +#define REGION_DATA_PRBAR       0x19    /* SH=11 AP=00 XN=1 */
>>> +#define REGION_DEVICE_PRBAR     0x11    /* SH=10 AP=00 XN=1 */
>>> +
>>> +#define WRITE_SYSREG_ASM(v, name) mcr CP32(v, name)
>>> +
>>>  #ifndef __ASSEMBLY__
>>>    /* C wrappers */
>>> diff --git a/xen/arch/arm/include/asm/cpregs.h b/xen/arch/arm/include/asm/cpregs.h
>>> index 6019a2cbdd89..b909adc102a5 100644
>>> --- a/xen/arch/arm/include/asm/cpregs.h
>>> +++ b/xen/arch/arm/include/asm/cpregs.h
>>> @@ -1,10 +1,6 @@
>>>  #ifndef __ASM_ARM_CPREGS_H
>>>  #define __ASM_ARM_CPREGS_H
>>>  -#ifdef CONFIG_MPU
>>> -#include 
>>> -#endif
>>> -
>>>  /*
>>>   * AArch32 Co-processor registers.
>>>   *
>>> @@ -502,6 +498,12 @@
>>>  #define MVFR0_EL1               MVFR0
>>>  #define MVFR1_EL1               MVFR1
>>>  #define MVFR2_EL1               MVFR2
>>> +#define HMPUIR                  p15,4,c0,c0,4
>>> +#define HPRSELR                 p15,4,c6,c2,1
>>> +#define PRBAR_EL2               p15,4,c6,c3,0
>>> +#define PRLAR_EL2               p15,4,c6,c8,1
>>> +#define MPUIR_EL2               HMPUIR
>>> +#define PRSELR_EL2              HPRSELR
>>
>> Considering that there will be lots of arm32 MPU specific registers, do you want to move them to mpu/cpregs.h ?
>>
>> That would be my style preference.
> 
> I don’t have any strong opinion so it’s fine if you want them in cpregs.h.
If there are really a lot of new additions and the movement improves
readability, I'm ok with them being stored in mpu/cpregs.h

~Michal



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From: Alexander Gordeev 
To: Andrew Morton ,
        Andrey Ryabinin 
Cc: Hugh Dickins , Nicholas Piggin ,
        Guenter Roeck , Juergen Gross ,
        Jeremy Fitzhardinge , linux-kernel@vger.kernel.org,
        linux-mm@kvack.org, kasan-dev@googlegroups.com,
        sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org,
        linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org
Subject: [PATCH v1 4/4] mm: Allow detection of wrong arch_enter_lazy_mmu_mode() context
Date: Mon,  7 Apr 2025 17:11:30 +0200
Message-ID: <5204eaec309f454efcb5a799c9e0ed9da1dff971.1744037648.git.agordeev@linux.ibm.com>
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The lazy MMU batching may be only be entered and left under the
protection of the page table locks for all page tables which may
be modified. Yet, there were cases arch_enter_lazy_mmu_mode()
was called without the locks taken, e.g. commit b9ef323ea168
("powerpc/64s: Disable preemption in hash lazy mmu mode").

Make default arch_enter|leave|flush_lazy_mmu_mode() callbacks
complain at least in case the preemption is enabled to detect
wrong contexts.

Most platforms do not implement the callbacks, so to aovid a
performance impact allow the complaint when CONFIG_DEBUG_VM
option is enabled only.

Signed-off-by: Alexander Gordeev 
---
 include/linux/pgtable.h | 15 ++++++++++++---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h
index e2b705c14945..959590bb66da 100644
--- a/include/linux/pgtable.h
+++ b/include/linux/pgtable.h
@@ -232,9 +232,18 @@ static inline int pmd_dirty(pmd_t pmd)
  * and the mode cannot be used in interrupt context.
  */
 #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE
-#define arch_enter_lazy_mmu_mode()	do {} while (0)
-#define arch_leave_lazy_mmu_mode()	do {} while (0)
-#define arch_flush_lazy_mmu_mode()	do {} while (0)
+static inline void arch_enter_lazy_mmu_mode(void)
+{
+	VM_WARN_ON(preemptible());
+}
+static inline void arch_leave_lazy_mmu_mode(void)
+{
+	VM_WARN_ON(preemptible());
+}
+static inline void arch_flush_lazy_mmu_mode(void)
+{
+	VM_WARN_ON(preemptible());
+}
 #endif
 
 #ifndef pte_batch_hint
-- 
2.45.2



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From: Alexander Gordeev 
To: Andrew Morton ,
        Andrey Ryabinin 
Cc: Hugh Dickins , Nicholas Piggin ,
        Guenter Roeck , Juergen Gross ,
        Jeremy Fitzhardinge , linux-kernel@vger.kernel.org,
        linux-mm@kvack.org, kasan-dev@googlegroups.com,
        sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org,
        linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org
Subject: [PATCH v1 3/4] mm: Protect kernel pgtables in apply_to_pte_range()
Date: Mon,  7 Apr 2025 17:11:29 +0200
Message-ID: <11dbe3ac88130dbd2b8554f9369cd93fe138c655.1744037648.git.agordeev@linux.ibm.com>
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The lazy MMU mode can only be entered and left under the protection
of the page table locks for all page tables which may be modified.
Yet, when it comes to kernel mappings apply_to_pte_range() does not
take any locks. That does not conform arch_enter|leave_lazy_mmu_mode()
semantics and could potentially lead to re-schedulling a process while
in lazy MMU mode or racing on a kernel page table updates.

Signed-off-by: Alexander Gordeev 
---
 mm/kasan/shadow.c | 7 ++-----
 mm/memory.c       | 5 ++++-
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/mm/kasan/shadow.c b/mm/kasan/shadow.c
index edfa77959474..6531a7aa8562 100644
--- a/mm/kasan/shadow.c
+++ b/mm/kasan/shadow.c
@@ -308,14 +308,14 @@ static int kasan_populate_vmalloc_pte(pte_t *ptep, unsigned long addr,
 	__memset((void *)page, KASAN_VMALLOC_INVALID, PAGE_SIZE);
 	pte = pfn_pte(PFN_DOWN(__pa(page)), PAGE_KERNEL);
 
-	spin_lock(&init_mm.page_table_lock);
 	if (likely(pte_none(ptep_get(ptep)))) {
 		set_pte_at(&init_mm, addr, ptep, pte);
 		page = 0;
 	}
-	spin_unlock(&init_mm.page_table_lock);
+
 	if (page)
 		free_page(page);
+
 	return 0;
 }
 
@@ -401,13 +401,10 @@ static int kasan_depopulate_vmalloc_pte(pte_t *ptep, unsigned long addr,
 
 	page = (unsigned long)__va(pte_pfn(ptep_get(ptep)) << PAGE_SHIFT);
 
-	spin_lock(&init_mm.page_table_lock);
-
 	if (likely(!pte_none(ptep_get(ptep)))) {
 		pte_clear(&init_mm, addr, ptep);
 		free_page(page);
 	}
-	spin_unlock(&init_mm.page_table_lock);
 
 	return 0;
 }
diff --git a/mm/memory.c b/mm/memory.c
index f0201c8ec1ce..1f3727104e99 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -2926,6 +2926,7 @@ static int apply_to_pte_range(struct mm_struct *mm, pmd_t *pmd,
 			pte = pte_offset_kernel(pmd, addr);
 		if (!pte)
 			return err;
+		spin_lock(&init_mm.page_table_lock);
 	} else {
 		if (create)
 			pte = pte_alloc_map_lock(mm, pmd, addr, &ptl);
@@ -2951,7 +2952,9 @@ static int apply_to_pte_range(struct mm_struct *mm, pmd_t *pmd,
 
 	arch_leave_lazy_mmu_mode();
 
-	if (mm != &init_mm)
+	if (mm == &init_mm)
+		spin_unlock(&init_mm.page_table_lock);
+	else
 		pte_unmap_unlock(mapped_pte, ptl);
 
 	*mask |= PGTBL_PTE_MODIFIED;
-- 
2.45.2



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From: Alexander Gordeev 
To: Andrew Morton ,
        Andrey Ryabinin 
Cc: Hugh Dickins , Nicholas Piggin ,
        Guenter Roeck , Juergen Gross ,
        Jeremy Fitzhardinge , linux-kernel@vger.kernel.org,
        linux-mm@kvack.org, kasan-dev@googlegroups.com,
        sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org,
        linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org
Subject: [PATCH v1 1/4] kasan: Avoid sleepable page allocation from atomic context
Date: Mon,  7 Apr 2025 17:11:27 +0200
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apply_to_page_range() enters lazy MMU mode and then invokes
kasan_populate_vmalloc_pte() callback on each page table walk
iteration. The lazy MMU mode may only be entered only under
protection of the page table lock. However, the callback can
go into sleep when trying to allocate a single page.

Change __get_free_page() allocation mode from GFP_KERNEL to
GFP_ATOMIC to avoid scheduling out while in atomic context.

Signed-off-by: Alexander Gordeev 
---
 mm/kasan/shadow.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/mm/kasan/shadow.c b/mm/kasan/shadow.c
index 88d1c9dcb507..edfa77959474 100644
--- a/mm/kasan/shadow.c
+++ b/mm/kasan/shadow.c
@@ -301,7 +301,7 @@ static int kasan_populate_vmalloc_pte(pte_t *ptep, unsigned long addr,
 	if (likely(!pte_none(ptep_get(ptep))))
 		return 0;
 
-	page = __get_free_page(GFP_KERNEL);
+	page = __get_free_page(GFP_ATOMIC);
 	if (!page)
 		return -ENOMEM;
 
-- 
2.45.2



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From: Alexander Gordeev 
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        Andrey Ryabinin 
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        Guenter Roeck , Juergen Gross ,
        Jeremy Fitzhardinge , linux-kernel@vger.kernel.org,
        linux-mm@kvack.org, kasan-dev@googlegroups.com,
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        linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org
Subject: [PATCH v1 0/4] mm: Fix apply_to_pte_range() vs lazy MMU mode
Date: Mon,  7 Apr 2025 17:11:26 +0200
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Hi All,

This series is an attempt to fix the violation of lazy MMU mode context
requirement as described for arch_enter_lazy_mmu_mode():

    This mode can only be entered and left under the protection of
    the page table locks for all page tables which may be modified.

On s390 if I make arch_enter_lazy_mmu_mode() -> preempt_enable() and
arch_leave_lazy_mmu_mode() -> preempt_disable() I am getting this:

    [  553.332108] preempt_count: 1, expected: 0
    [  553.332117] no locks held by multipathd/2116.
    [  553.332128] CPU: 24 PID: 2116 Comm: multipathd Kdump: loaded Tainted:
    [  553.332139] Hardware name: IBM 3931 A01 701 (LPAR)
    [  553.332146] Call Trace:
    [  553.332152]  [<00000000158de23a>] dump_stack_lvl+0xfa/0x150
    [  553.332167]  [<0000000013e10d12>] __might_resched+0x57a/0x5e8
    [  553.332178]  [<00000000144eb6c2>] __alloc_pages+0x2ba/0x7c0
    [  553.332189]  [<00000000144d5cdc>] __get_free_pages+0x2c/0x88
    [  553.332198]  [<00000000145663f6>] kasan_populate_vmalloc_pte+0x4e/0x110
    [  553.332207]  [<000000001447625c>] apply_to_pte_range+0x164/0x3c8
    [  553.332218]  [<000000001448125a>] apply_to_pmd_range+0xda/0x318
    [  553.332226]  [<000000001448181c>] __apply_to_page_range+0x384/0x768
    [  553.332233]  [<0000000014481c28>] apply_to_page_range+0x28/0x38
    [  553.332241]  [<00000000145665da>] kasan_populate_vmalloc+0x82/0x98
    [  553.332249]  [<00000000144c88d0>] alloc_vmap_area+0x590/0x1c90
    [  553.332257]  [<00000000144ca108>] __get_vm_area_node.constprop.0+0x138/0x260
    [  553.332265]  [<00000000144d17fc>] __vmalloc_node_range+0x134/0x360
    [  553.332274]  [<0000000013d5dbf2>] alloc_thread_stack_node+0x112/0x378
    [  553.332284]  [<0000000013d62726>] dup_task_struct+0x66/0x430
    [  553.332293]  [<0000000013d63962>] copy_process+0x432/0x4b80
    [  553.332302]  [<0000000013d68300>] kernel_clone+0xf0/0x7d0
    [  553.332311]  [<0000000013d68bd6>] __do_sys_clone+0xae/0xc8
    [  553.332400]  [<0000000013d68dee>] __s390x_sys_clone+0xd6/0x118
    [  553.332410]  [<0000000013c9d34c>] do_syscall+0x22c/0x328
    [  553.332419]  [<00000000158e7366>] __do_syscall+0xce/0xf0
    [  553.332428]  [<0000000015913260>] system_call+0x70/0x98

This exposes a KASAN issue fixed with patch 1 and apply_to_pte_range()
issue fixed with patches 2-3. Patch 4 is a debug improvement on top,
that could have helped to notice the issue.

Commit b9ef323ea168 ("powerpc/64s: Disable preemption in hash lazy mmu
mode") looks like powerpc-only fix, yet not entirely conforming to the
above provided requirement (page tables itself are still not protected).
If I am not mistaken, xen and sparc are alike.

Thanks!

Alexander Gordeev (4):
  kasan: Avoid sleepable page allocation from atomic context
  mm: Cleanup apply_to_pte_range() routine
  mm: Protect kernel pgtables in apply_to_pte_range()
  mm: Allow detection of wrong arch_enter_lazy_mmu_mode() context

 include/linux/pgtable.h | 15 ++++++++++++---
 mm/kasan/shadow.c       |  9 +++------
 mm/memory.c             | 33 +++++++++++++++++++++------------
 3 files changed, 36 insertions(+), 21 deletions(-)

-- 
2.45.2



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From: Alexander Gordeev 
To: Andrew Morton ,
        Andrey Ryabinin 
Cc: Hugh Dickins , Nicholas Piggin ,
        Guenter Roeck , Juergen Gross ,
        Jeremy Fitzhardinge , linux-kernel@vger.kernel.org,
        linux-mm@kvack.org, kasan-dev@googlegroups.com,
        sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org,
        linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org
Subject: [PATCH v1 2/4] mm: Cleanup apply_to_pte_range() routine
Date: Mon,  7 Apr 2025 17:11:28 +0200
Message-ID: <93102722541b1daf541fce9fb316a1a2614d8c86.1744037648.git.agordeev@linux.ibm.com>
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Reverse 'create' vs 'mm == &init_mm' conditions and move
page table mask modification out of the atomic context.

Signed-off-by: Alexander Gordeev 
---
 mm/memory.c | 28 +++++++++++++++++-----------
 1 file changed, 17 insertions(+), 11 deletions(-)

diff --git a/mm/memory.c b/mm/memory.c
index 2d8c265fc7d6..f0201c8ec1ce 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -2915,24 +2915,28 @@ static int apply_to_pte_range(struct mm_struct *mm, pmd_t *pmd,
 				     pte_fn_t fn, void *data, bool create,
 				     pgtbl_mod_mask *mask)
 {
+	int err = create ? -ENOMEM : -EINVAL;
 	pte_t *pte, *mapped_pte;
-	int err = 0;
 	spinlock_t *ptl;
 
-	if (create) {
-		mapped_pte = pte = (mm == &init_mm) ?
-			pte_alloc_kernel_track(pmd, addr, mask) :
-			pte_alloc_map_lock(mm, pmd, addr, &ptl);
+	if (mm == &init_mm) {
+		if (create)
+			pte = pte_alloc_kernel_track(pmd, addr, mask);
+		else
+			pte = pte_offset_kernel(pmd, addr);
 		if (!pte)
-			return -ENOMEM;
+			return err;
 	} else {
-		mapped_pte = pte = (mm == &init_mm) ?
-			pte_offset_kernel(pmd, addr) :
-			pte_offset_map_lock(mm, pmd, addr, &ptl);
+		if (create)
+			pte = pte_alloc_map_lock(mm, pmd, addr, &ptl);
+		else
+			pte = pte_offset_map_lock(mm, pmd, addr, &ptl);
 		if (!pte)
-			return -EINVAL;
+			return err;
+		mapped_pte = pte;
 	}
 
+	err = 0;
 	arch_enter_lazy_mmu_mode();
 
 	if (fn) {
@@ -2944,12 +2948,14 @@ static int apply_to_pte_range(struct mm_struct *mm, pmd_t *pmd,
 			}
 		} while (addr += PAGE_SIZE, addr != end);
 	}
-	*mask |= PGTBL_PTE_MODIFIED;
 
 	arch_leave_lazy_mmu_mode();
 
 	if (mm != &init_mm)
 		pte_unmap_unlock(mapped_pte, ptl);
+
+	*mask |= PGTBL_PTE_MODIFIED;
+
 	return err;
 }
 
-- 
2.45.2



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On 03/04/2025 13:00, Andrew Cooper wrote:
> 
> 
> The fixup section is only used by x86, and we're working to remove it there
> too.  Logic in the fixup section is unconnected to it's origin site, and
> interferes with backtraces/etc.
> 
> Remove the section from the architectures which don't use it.
> 
> Signed-off-by: Andrew Cooper 
Reviewed-by: Michal Orzel  #Arm

~Michal



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Subject: Re: [PATCH] x86/mem-sharing: short-circuit p2m_is_shared() when
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To: Andrew Cooper 
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On 07.04.2025 16:50, Andrew Cooper wrote:
> On 03/04/2025 9:41 am, Jan Beulich wrote:
>> Some of the uses of dom_cow aren't easily DCE-able (without extra
>> #ifdef-ary), and hence it being constantly NULL when MEM_SHARING=n
>> misguides Coverity into thinking that there may be a NULL deref in
>>
>>         if ( p2m_is_shared(t) )
>>             d = dom_cow;
>>
>>         if ( get_page(page, d) )
>>             return page;
>>
>> (in get_page_from_mfn_and_type()). Help the situation by making
>> p2m_is_shared() be compile-time false when MEM_SHARING=n, thus also
>> permitting the compiler to DCE some other code.
>>
>> Note that p2m_is_sharable() isn't used outside of mem_sharing.c, and
>> hence P2M_SHARABLE_TYPES can simply be left undefined when
>> MEM_SHARING=n.

Note this for ...

>> --- a/xen/arch/x86/include/asm/p2m.h
>> +++ b/xen/arch/x86/include/asm/p2m.h
>> @@ -136,11 +136,16 @@ typedef unsigned int p2m_query_t;
>>  #endif
>>  
>>  /* Shared types */
>> +#ifdef CONFIG_MEM_SHARING
>>  /* XXX: Sharable types could include p2m_ram_ro too, but we would need to
>>   * reinit the type correctly after fault */
>>  #define P2M_SHARABLE_TYPES (p2m_to_mask(p2m_ram_rw) \
>>                              | p2m_to_mask(p2m_ram_logdirty) )
>>  #define P2M_SHARED_TYPES   (p2m_to_mask(p2m_ram_shared))
>> +#else
>> +/* P2M_SHARABLE_TYPES deliberately not provided. */
>> +#define P2M_SHARED_TYPES 0
> 
> You need P2M_SHARABLE_TYPES too, or p2m_is_sharable() will start
> becoming a syntax error.

... what you're saying here. If you did take that into consideration, then
please be more specific about the concern(s) you have.

Jan


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From: "Anthony PERARD" 
Subject: =?utf-8?Q?Re:=20Ping:=20[PATCH]=20libxc/PM:=20correct=20(not=20just)=20error=20handling=20in=20xc=5Fget=5Fcpufreq=5Fpara()?=
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On Mon, Apr 07, 2025 at 03:23:48PM +0200, Jan Beulich wrote:
> On 07.04.2025 14:45, Anthony PERARD wrote:
> > On Mon, Apr 07, 2025 at 01:38:24PM +0200, Jan Beulich wrote:
> >> On 27.03.2025 14:32, Jan Beulich wrote:
> >>> From their introduction all xc_hypercall_bounce_pre() uses, when they
> >>> failed, would properly cause exit from the function including cleanup,
> >>> yet without informing the caller of the failure. Purge the unlock_1
> >>> label for being both pointless and mis-named.
> >>>
> >>> An earlier attempt to switch to the usual split between return value and
> >>> errno wasn't quite complete.
> >>>
> >>> HWP work made the cleanup of the "available governors" array
> >>> conditional, neglecting the fact that the condition used may not be the
> >>> condition that was used to allocate the buffer (as the structure field
> >>> is updated upon getting back EAGAIN). Throughout the function, use the
> >>> local variable being introduced to address that.
> >>>
> >>> Fixes: 4513025a8790 ("libxc: convert sysctl interfaces over to hypercall buffers")
> >>> Amends: 73367cf3b4b4 ("libxc: Fix xc_pm API calls to return negative error and stash error in errno")
> >>> Fixes: 31e264c672bc ("pmstat&xenpm: Re-arrage for cpufreq union")
> >>> Signed-off-by: Jan Beulich 
> >>
> >> May I ask for an ack or comments towards what needs changing?
> > 
> > Calling xc_get_cpufreq_para with:
> > 
> >     user_para = {
> >         .cpu_num = 0,
> >         .freq_num = 0,
> >         .gov_num = 9,
> >     };
> > 
> > seems broken. It's looks like the `scaling_available_governors` bounce
> > buffer is going to be used without been allocated properly handled, with
> > this patch.
> 
> The local variable "in_gov_num" controls its allocation and use, together with
> has_num. "Use" as in passing to set_xen_guest_handle(). The only further use

When has_num == 0, `in_gov_num` is only used to set `sys_para->gov_num`.
It also make a conditional call to xc_hypercall_bounce_post() but
there's nothing to do.

Why user_para.gov_num seems to control the size of a buffer, but then
that buffer is just discarded under some condition with this patch?

Is the proposed parameter (where only gov_num is set) a valid input? If
not, why is it not rejected before making the hypercall? (with this
patch)

> of that bounce buffer is on the exit path, i.e. it being passed to
> xc_hypercall_bounce_post(). The backing function xc__hypercall_bounce_post()
> is dealing fine with the buffer being NULL. And that's what it would be left
> at from DECLARE_NAMED_HYPERCALL_BOUNCE() if buffer allocation is skipped.

-- 

Anthony Perard | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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On 03/04/2025 23:41, Andrew Cooper wrote:
> 
> 
> MISRA C:2012 Amendment 3 (which is under consideration, but not used by Xen
> yet) is more particular about having the storage class specifier first.
> 
> No functional change.
> 
> Signed-off-by: Andrew Cooper 
Reviewed-by: Michal Orzel  #Arm

~Michal



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH] x86/AMD: Convert rdmsr_amd_safe() to use asm goto()
Date: Mon,  7 Apr 2025 16:35:10 +0100
Message-Id: <20250407153510.1863243-1-andrew.cooper3@citrix.com>
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Unlike the WRMSR side, we can't use asm goto() unconditionally, because our
toolchain baseline doesn't support asm goto with outputs.

Detect support, and use asm goto() when available.

Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
CC: Roger Pau Monné 

Condensing these two to a single Kconfig symbol is prohibitively difficult.

Also, there's a different errata workaround we'll need if we want to use asm
goto() with "+" constraints:

config CC_HAS_ASM_GOTO_TIED_OUTPUT
	depends on CC_HAS_ASM_GOTO_OUTPUT
	# Detect buggy gcc and clang, fixed in gcc-11 clang-14.
	def_bool $(success,echo 'int foo(int *x) { asm goto (".long (%l[bar]) - .": "+m"(*x) ::: bar); return *x; bar: return 0; }' | $CC -x c - -c -o /dev/null)

I'm tempted to put it in straight away, lest we forget about it.
---
 xen/Kconfig            | 14 ++++++++++++++
 xen/arch/x86/cpu/amd.c | 13 +++++++++++++
 2 files changed, 27 insertions(+)

diff --git a/xen/Kconfig b/xen/Kconfig
index 2128f0ccfc0b..a367337cafa5 100644
--- a/xen/Kconfig
+++ b/xen/Kconfig
@@ -41,6 +41,20 @@ config CC_SPLIT_SECTIONS
 config CC_HAS_UBSAN
 	def_bool $(cc-option,-fsanitize=undefined)
 
+# Fixed in GCC 14, 13.3, 12.4 and 11.5
+# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113921
+config GCC_ASM_GOTO_OUTPUT_BROKEN
+	bool
+	depends on CC_IS_GCC
+	default y if GCC_VERSION < 110500
+	default y if GCC_VERSION >= 120000 && GCC_VERSION < 120400
+	default y if GCC_VERSION >= 130000 && GCC_VERSION < 130300
+
+config CC_HAS_ASM_GOTO_OUTPUT
+	def_bool y
+	depends on !GCC_ASM_GOTO_OUTPUT_BROKEN
+	depends on $(success,echo 'int foo(int x) { asm goto ("": "=r"(x) ::: bar); return x; bar: return 0; }' | $(CC) -x c - -c -o /dev/null)
+
 # Set code alignment.
 #
 # Allow setting on a boolean basis, and then convert such selection to an
diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c
index ce4e1df71064..37d67dd15c89 100644
--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -59,6 +59,18 @@ static bool __read_mostly fam17_c6_disabled;
 static inline int rdmsr_amd_safe(unsigned int msr, unsigned int *lo,
 				 unsigned int *hi)
 {
+#ifdef CONFIG_CC_HAS_ASM_GOTO_OUTPUT
+    asm goto ( "1: rdmsr\n\t"
+               _ASM_EXTABLE(1b, %l[fault])
+               : "=a" (*lo), "=d" (*hi)
+               : "c" (msr), "D" (0x9c5a203a)
+               :
+               : fault );
+    return 0;
+
+ fault:
+    return -EFAULT;
+#else
 	int err;
 
 	asm volatile("1: rdmsr\n2:\n"
@@ -71,6 +83,7 @@ static inline int rdmsr_amd_safe(unsigned int msr, unsigned int *lo,
 		     : "c" (msr), "D" (0x9c5a203a), "2" (0), "i" (-EFAULT));
 
 	return err;
+#endif
 }
 
 static inline int wrmsr_amd_safe(unsigned int msr, unsigned int lo,

base-commit: a235f856e4bbd270b085590e1f5fc9599234dcdf
prerequisite-patch-id: 2874d23382cbbc2ec8eaad596b6f49f14b990b8a
prerequisite-patch-id: fdc7cdec843e4d24fc64006c977fa83a55d98910
-- 
2.39.5



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Subject: Re: Ping: [PATCH] libxc/PM: correct (not just) error handling in
 xc_get_cpufreq_para()
To: Anthony PERARD 
Cc: Juergen Gross , xen-devel@lists.xenproject.org
References: 
  
 <75d288ba-1006-46f4-8f51-6d49c5e8449d@suse.com> 
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On 07.04.2025 17:23, Anthony PERARD wrote:
> On Mon, Apr 07, 2025 at 03:23:48PM +0200, Jan Beulich wrote:
>> On 07.04.2025 14:45, Anthony PERARD wrote:
>>> On Mon, Apr 07, 2025 at 01:38:24PM +0200, Jan Beulich wrote:
>>>> On 27.03.2025 14:32, Jan Beulich wrote:
>>>>> From their introduction all xc_hypercall_bounce_pre() uses, when they
>>>>> failed, would properly cause exit from the function including cleanup,
>>>>> yet without informing the caller of the failure. Purge the unlock_1
>>>>> label for being both pointless and mis-named.
>>>>>
>>>>> An earlier attempt to switch to the usual split between return value and
>>>>> errno wasn't quite complete.
>>>>>
>>>>> HWP work made the cleanup of the "available governors" array
>>>>> conditional, neglecting the fact that the condition used may not be the
>>>>> condition that was used to allocate the buffer (as the structure field
>>>>> is updated upon getting back EAGAIN). Throughout the function, use the
>>>>> local variable being introduced to address that.
>>>>>
>>>>> Fixes: 4513025a8790 ("libxc: convert sysctl interfaces over to hypercall buffers")
>>>>> Amends: 73367cf3b4b4 ("libxc: Fix xc_pm API calls to return negative error and stash error in errno")
>>>>> Fixes: 31e264c672bc ("pmstat&xenpm: Re-arrage for cpufreq union")
>>>>> Signed-off-by: Jan Beulich 
>>>>
>>>> May I ask for an ack or comments towards what needs changing?
>>>
>>> Calling xc_get_cpufreq_para with:
>>>
>>>     user_para = {
>>>         .cpu_num = 0,
>>>         .freq_num = 0,
>>>         .gov_num = 9,
>>>     };
>>>
>>> seems broken. It's looks like the `scaling_available_governors` bounce
>>> buffer is going to be used without been allocated properly handled, with
>>> this patch.
>>
>> The local variable "in_gov_num" controls its allocation and use, together with
>> has_num. "Use" as in passing to set_xen_guest_handle(). The only further use
> 
> When has_num == 0, `in_gov_num` is only used to set `sys_para->gov_num`.
> It also make a conditional call to xc_hypercall_bounce_post() but
> there's nothing to do.
> 
> Why user_para.gov_num seems to control the size of a buffer, but then
> that buffer is just discarded under some condition with this patch?

That's nothing this patch changes. Previously has_num would also have been
false in the example you give.

> Is the proposed parameter (where only gov_num is set) a valid input? If
> not, why is it not rejected before making the hypercall? (with this
> patch)

Prior to the change adding the user_para->gov_num conditionals the interface
was all or nothing: You got actual data back only if you asked for all three
pieces. Said change then made obtaining the governors optional, yet only
quite. Once obtaining frequencies also becomes optional, I think we will be
in a better position to sanitize this function. Right now I'm only trying to
get some of the basic flaws sorted. The three modes we want/need to support
right now are
- caller wants just counts, but not actual data (would pass in all three
  *_num as zero),
- caller wants all data (would pass in all three *_num as non-zero),
- the HWP special case of wanting CPU and frequency data, but not the
  (meaningless there) governors.

Jan


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Subject: Re: [PATCH] x86/AMD: Convert rdmsr_amd_safe() to use asm goto()
To: Andrew Cooper 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Xen-devel 
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On 07.04.2025 17:35, Andrew Cooper wrote:
> Unlike the WRMSR side, we can't use asm goto() unconditionally, because our
> toolchain baseline doesn't support asm goto with outputs.

Is there actually a benefit we gain from now needing to maintain two different
pieces of logic fulfilling the same purpose?

> Also, there's a different errata workaround we'll need if we want to use asm
> goto() with "+" constraints:
> 
> config CC_HAS_ASM_GOTO_TIED_OUTPUT
> 	depends on CC_HAS_ASM_GOTO_OUTPUT
> 	# Detect buggy gcc and clang, fixed in gcc-11 clang-14.
> 	def_bool $(success,echo 'int foo(int *x) { asm goto (".long (%l[bar]) - .": "+m"(*x) ::: bar); return *x; bar: return 0; }' | $CC -x c - -c -o /dev/null)
> 
> I'm tempted to put it in straight away, lest we forget about it.

Perhaps best if we really want to go this route. Yet then - why "TIED"? Isn't
"tied" the term they use when referring to an earlier operand by using a
digit (or the operand's name in square brackets)?

> --- a/xen/Kconfig
> +++ b/xen/Kconfig
> @@ -41,6 +41,20 @@ config CC_SPLIT_SECTIONS
>  config CC_HAS_UBSAN
>  	def_bool $(cc-option,-fsanitize=undefined)
>  
> +# Fixed in GCC 14, 13.3, 12.4 and 11.5
> +# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113921
> +config GCC_ASM_GOTO_OUTPUT_BROKEN
> +	bool
> +	depends on CC_IS_GCC
> +	default y if GCC_VERSION < 110500
> +	default y if GCC_VERSION >= 120000 && GCC_VERSION < 120400
> +	default y if GCC_VERSION >= 130000 && GCC_VERSION < 130300

Unlike for pre-release versions (x.0.y) I view this as problematic. Distros
are likely to have backported the fix before the minor releases took place.
Or they may have backported without ever meaning to follow later minor
releases. We'd needlessly exclude them here. Imo ...

> +config CC_HAS_ASM_GOTO_OUTPUT
> +	def_bool y
> +	depends on !GCC_ASM_GOTO_OUTPUT_BROKEN
> +	depends on $(success,echo 'int foo(int x) { asm goto ("": "=r"(x) ::: bar); return x; bar: return 0; }' | $(CC) -x c - -c -o /dev/null)

... the only option is to actually probe for support as well as the (non-)
buggy-ness.

Jan


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Date: Mon, 7 Apr 2025 17:55:52 +0200
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User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH] xen/link: Drop .fixup section from non-x86 architectures
To: Andrew Cooper ,
 Xen-devel 
Cc: Anthony PERARD ,
 Michal Orzel , Jan Beulich ,
 Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Stefano Stabellini ,
 Volodymyr Babchuk ,
 Bertrand Marquis ,
 Shawn Anastasio 
References: <20250403110003.1461522-1-andrew.cooper3@citrix.com>
Content-Language: en-US
From: Oleksii Kurochko 
In-Reply-To: <20250403110003.1461522-1-andrew.cooper3@citrix.com>

This is a multi-part message in MIME format.
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On 4/3/25 1:00 PM, Andrew Cooper wrote:
> The fixup section is only used by x86, and we're working to remove it there
> too.  Logic in the fixup section is unconnected to it's origin site, and
> interferes with backtraces/etc.
>
> Remove the section from the architectures which don't use it.
>
> Signed-off-by: Andrew Cooper
> ---
> CC: Anthony PERARD
> CC: Michal Orzel
> CC: Jan Beulich
> CC: Julien Grall
> CC: Roger Pau Monné
> CC: Stefano Stabellini
> CC: Volodymyr Babchuk
> CC: Bertrand Marquis
> CC: Shawn Anastasio
> CC: Oleksii Kurochko
> ---
>   xen/arch/arm/xen.lds.S   | 1 -
>   xen/arch/ppc/xen.lds.S   | 1 -
>   xen/arch/riscv/xen.lds.S | 1 -
>   3 files changed, 3 deletions(-)
>
> diff --git a/xen/arch/arm/xen.lds.S b/xen/arch/arm/xen.lds.S
> index 86a6e311cfc5..ae1903246f69 100644
> --- a/xen/arch/arm/xen.lds.S
> +++ b/xen/arch/arm/xen.lds.S
> @@ -45,7 +45,6 @@ SECTIONS
>          *(.text.*)
>   #endif
>   
> -       *(.fixup)
>          *(.gnu.warning)
>          _etext = .;             /* End of text section */
>     } :text = 0x9090
> diff --git a/xen/arch/ppc/xen.lds.S b/xen/arch/ppc/xen.lds.S
> index 3f2a7676ec96..1366e2819eed 100644
> --- a/xen/arch/ppc/xen.lds.S
> +++ b/xen/arch/ppc/xen.lds.S
> @@ -38,7 +38,6 @@ SECTIONS
>           *(.text.*)
>   #endif
>   
> -        *(.fixup)
>           *(.gnu.warning)
>           . = ALIGN(POINTER_ALIGN);
>           _etext = .;             /* End of text section */
> diff --git a/xen/arch/riscv/xen.lds.S b/xen/arch/riscv/xen.lds.S
> index dffc6ae11913..818aa4366949 100644
> --- a/xen/arch/riscv/xen.lds.S
> +++ b/xen/arch/riscv/xen.lds.S
> @@ -33,7 +33,6 @@ SECTIONS
>           *(.text.ident)
>           _ident_end = .;
>   
> -        *(.fixup)
>           *(.gnu.warning)
>           . = ALIGN(POINTER_ALIGN);
>           _etext = .;             /* End of text section */

Reviewed-by: Oleksii Kurochko
  #riscv

~ Oleksii

>
> base-commit: ae5fd39be98c6219a302045aec7c25bdafa81781
--------------vBgtPMZpJw7ySNy8kWzRdND6
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On 4/3/25 1:00 PM, Andrew Cooper wrote:

    

    

      
The fixup section is only used by x86, and we're working to remove it there
too.  Logic in the fixup section is unconnected to it's origin site, and
interferes with backtraces/etc.

Remove the section from the architectures which don't use it.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
CC: Anthony PERARD <anthony.perard@vates.tech>
CC: Michal Orzel <michal.orzel@amd.com>
CC: Jan Beulich <jbeulich@suse.com>
CC: Julien Grall <julien@xen.org>
CC: Roger Pau Monné <roger.pau@citrix.com>
CC: Stefano Stabellini <sstabellini@kernel.org>
CC: Volodymyr Babchuk <Volodymyr_Babchuk@epam.com>
CC: Bertrand Marquis <bertrand.marquis@arm.com>
CC: Shawn Anastasio <sanastasio@raptorengineering.com>
CC: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/arm/xen.lds.S   | 1 -
 xen/arch/ppc/xen.lds.S   | 1 -
 xen/arch/riscv/xen.lds.S | 1 -
 3 files changed, 3 deletions(-)

diff --git a/xen/arch/arm/xen.lds.S b/xen/arch/arm/xen.lds.S
index 86a6e311cfc5..ae1903246f69 100644
--- a/xen/arch/arm/xen.lds.S
+++ b/xen/arch/arm/xen.lds.S
@@ -45,7 +45,6 @@ SECTIONS
        *(.text.*)
 #endif
 
-       *(.fixup)
        *(.gnu.warning)
        _etext = .;             /* End of text section */
   } :text = 0x9090
diff --git a/xen/arch/ppc/xen.lds.S b/xen/arch/ppc/xen.lds.S
index 3f2a7676ec96..1366e2819eed 100644
--- a/xen/arch/ppc/xen.lds.S
+++ b/xen/arch/ppc/xen.lds.S
@@ -38,7 +38,6 @@ SECTIONS
         *(.text.*)
 #endif
 
-        *(.fixup)
         *(.gnu.warning)
         . = ALIGN(POINTER_ALIGN);
         _etext = .;             /* End of text section */
diff --git a/xen/arch/riscv/xen.lds.S b/xen/arch/riscv/xen.lds.S
index dffc6ae11913..818aa4366949 100644
--- a/xen/arch/riscv/xen.lds.S
+++ b/xen/arch/riscv/xen.lds.S
@@ -33,7 +33,6 @@ SECTIONS
         *(.text.ident)
         _ident_end = .;
 
-        *(.fixup)
         *(.gnu.warning)
         . = ALIGN(POINTER_ALIGN);
         _etext = .;             /* End of text section */

    

    
Reviewed-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
 #riscv

~ Oleksii


    

      

base-commit: ae5fd39be98c6219a302045aec7c25bdafa81781


    

  


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From: "Anthony PERARD" 
Subject: =?utf-8?Q?Re:=20[PATCH=20v9=201/3]=20docs:=20update=20xenstore=20migration=20stream=20definition?=
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On Thu, Apr 03, 2025 at 01:45:32PM +0200, Juergen Gross wrote:
> On 25.03.25 10:17, Juergen Gross wrote:
> > On 14.03.25 13:18, Juergen Gross wrote:
> > > In order to close a race window for Xenstore live update when using
> > > the new unique_id of domains, the migration stream needs to contain
> > > this unique_id for each domain known by Xenstore.
> > > 
> > > Signed-off-by: Juergen Gross 
> > 
> > This patch is still missing an Ack.
> 
> PING?

Julien's concern looked to be addressed. And the patch looks fine to me,
so:

Acked-by: Anthony PERARD 

Thanks,

-- 

Anthony Perard | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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Subject: Re: [PATCH test-artifacts v2 13/12] scripts: add rc_verbose=yes to
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To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 , xen-devel@lists.xenproject.org
Cc: Stefano Stabellini ,
 Anthony PERARD ,
 Michal Orzel , Jan Beulich ,
 Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 
References: 
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On 07/04/2025 1:31 pm, Marek Marczykowski-Górecki wrote:
> This is done in every single test job, so do it at the initrd build
> time.
>
> Signed-off-by: Marek Marczykowski-Górecki 

Reviewed-by: Andrew Cooper 


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Subject: Re: [PATCH test-artifacts v2 14/12] scripts: build initrd cpio
To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 , xen-devel@lists.xenproject.org
Cc: Stefano Stabellini ,
 Anthony PERARD ,
 Michal Orzel , Jan Beulich ,
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On 07/04/2025 1:31 pm, Marek Marczykowski-Górecki wrote:
> Build initrd format directly digestable by the kernel. Additionally,
> include it itself inside as boot/initrd-domU file, for domU booting in
> tests.
> This should avoid the need to repack tar -> cpio as part of the test
> job.
>
> Keep generating initrd.tar.gz as that's still used by older branches.
>
> Signed-off-by: Marek Marczykowski-Górecki 

Reviewed-by: Andrew Cooper 

> ---
>  scripts/x86_64-rootfs-alpine.sh | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/scripts/x86_64-rootfs-alpine.sh b/scripts/x86_64-rootfs-alpine.sh
> index b70b3a5..13e85fa 100755
> --- a/scripts/x86_64-rootfs-alpine.sh
> +++ b/scripts/x86_64-rootfs-alpine.sh
> @@ -58,3 +58,8 @@ passwd -d "root" root
>  cd /
>  tar cvzf "${WORKDIR}/binaries/initrd.tar.gz" \
>      bin dev etc home init lib mnt opt root sbin usr var

What's required to drop the tar version?  Presumably merging the rest of
your series?

> +mkdir boot
> +find bin dev etc home init lib mnt opt root sbin usr var |\
> +    cpio -o -H newc | gzip > boot/initrd-domU
> +find bin boot dev etc home init lib mnt opt root sbin usr var |\
> +    cpio -o -H newc | gzip > "${WORKDIR}/binaries/initrd.cpio.gz" \



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Date: Mon, 7 Apr 2025 17:22:05 +0100
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Subject: Re: [PATCH test-artifacts v2 14/12] scripts: build initrd cpio
From: Andrew Cooper 
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Cc: Stefano Stabellini ,
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On 07/04/2025 5:17 pm, Andrew Cooper wrote:
> On 07/04/2025 1:31 pm, Marek Marczykowski-Górecki wrote:
>> Build initrd format directly digestable by the kernel. Additionally,
>> include it itself inside as boot/initrd-domU file, for domU booting in
>> tests.
>> This should avoid the need to repack tar -> cpio as part of the test
>> job.
>>
>> Keep generating initrd.tar.gz as that's still used by older branches.
>>
>> Signed-off-by: Marek Marczykowski-Górecki 
> Reviewed-by: Andrew Cooper 
>
>> ---
>>  scripts/x86_64-rootfs-alpine.sh | 5 +++++
>>  1 file changed, 5 insertions(+)
>>
>> diff --git a/scripts/x86_64-rootfs-alpine.sh b/scripts/x86_64-rootfs-alpine.sh
>> index b70b3a5..13e85fa 100755
>> --- a/scripts/x86_64-rootfs-alpine.sh
>> +++ b/scripts/x86_64-rootfs-alpine.sh
>> @@ -58,3 +58,8 @@ passwd -d "root" root
>>  cd /
>>  tar cvzf "${WORKDIR}/binaries/initrd.tar.gz" \
>>      bin dev etc home init lib mnt opt root sbin usr var
> What's required to drop the tar version?  Presumably merging the rest of
> your series?

NVM, I can't read.  I'm tempted to fold in:

#TODO, drop .tar.gz when Xen 4.20 drops out of testing

That said, I expect we'll be backporting these changes.

~Andrew


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Feedback-ID: i1568416f:Fastmail
Date: Mon, 7 Apr 2025 18:31:06 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: xen-devel@lists.xenproject.org,
	Stefano Stabellini ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich , Julien Grall ,
	Roger Pau =?utf-8?B?TW9ubsOp?= 
Subject: Re: [PATCH test-artifacts v2 14/12] scripts: build initrd cpio
Message-ID: 
References: 
 <20250407123448.1520451-2-marmarek@invisiblethingslab.com>
 
 <04ae4edc-8ea6-489d-8485-6e45aa750607@citrix.com>
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Date: Mon, 7 Apr 2025 18:31:06 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: xen-devel@lists.xenproject.org,
	Stefano Stabellini ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich , Julien Grall ,
	Roger Pau =?utf-8?B?TW9ubsOp?= 
Subject: Re: [PATCH test-artifacts v2 14/12] scripts: build initrd cpio

On Mon, Apr 07, 2025 at 05:22:05PM +0100, Andrew Cooper wrote:
> On 07/04/2025 5:17 pm, Andrew Cooper wrote:
> > On 07/04/2025 1:31 pm, Marek Marczykowski-G=C3=B3recki wrote:
> >> Build initrd format directly digestable by the kernel. Additionally,
> >> include it itself inside as boot/initrd-domU file, for domU booting in
> >> tests.
> >> This should avoid the need to repack tar -> cpio as part of the test
> >> job.
> >>
> >> Keep generating initrd.tar.gz as that's still used by older branches.
> >>
> >> Signed-off-by: Marek Marczykowski-G=C3=B3recki 
> > Reviewed-by: Andrew Cooper 
> >
> >> ---
> >>  scripts/x86_64-rootfs-alpine.sh | 5 +++++
> >>  1 file changed, 5 insertions(+)
> >>
> >> diff --git a/scripts/x86_64-rootfs-alpine.sh b/scripts/x86_64-rootfs-a=
lpine.sh
> >> index b70b3a5..13e85fa 100755
> >> --- a/scripts/x86_64-rootfs-alpine.sh
> >> +++ b/scripts/x86_64-rootfs-alpine.sh
> >> @@ -58,3 +58,8 @@ passwd -d "root" root
> >>  cd /
> >>  tar cvzf "${WORKDIR}/binaries/initrd.tar.gz" \
> >>      bin dev etc home init lib mnt opt root sbin usr var
> > What's required to drop the tar version?=C2=A0 Presumably merging the r=
est of
> > your series?
>=20
> NVM, I can't read.=C2=A0 I'm tempted to fold in:
>=20
> #TODO, drop .tar.gz when Xen 4.20 drops out of testing
>=20
> That said, I expect we'll be backporting these changes.


There is one more difference: the cpio.gz contains the whole thing
twice. Once as rootfs for dom0 and then another as boot/initrd-domU.
Dropping .tar.gz is probably a good idea at some point, so I'm okay with
such comment added. But I imagine some future tests may benefit from
just one layer, which may want introducing another cpio.gz without
boot/initrd-domU included. In fact, even right now that might be useful
- for example dom0less arm64 test uses just busybox for domU rootfs, not
the whole archive (so with my changes dom0 rootfs has unused
boot/initrd-domU included).

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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CC: Volodymyr Babchuk , Jan Beulich
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Subject: [PATCH v4 1/2] xen: x86: irq: initialize irq desc in create_irq()
Thread-Topic: [PATCH v4 1/2] xen: x86: irq: initialize irq desc in
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From: Volodymyr Babchuk 
To: "xen-devel@lists.xenproject.org" 
CC: Volodymyr Babchuk , Andrew Cooper
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	, Stefano Stabellini 
Subject: [PATCH v4 2/2] xen: debug: gcov: add condition coverage support
Thread-Topic: [PATCH v4 2/2] xen: debug: gcov: add condition coverage support
Thread-Index: AQHbp9yW2b5GBLlgDka417bnQFIpfQ==
Date: Mon, 7 Apr 2025 16:46:19 +0000
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Condition coverage, also known as MC/DC (modified condition/decision
coverage) is a coverage metric that tracks separate outcomes in
boolean expressions.

This patch adds CONFIG_CONDITION_COVERAGE option to enable MC/DC for
GCC. Clang is not supported right now.

Also, use the opportunity to convert COV_FLAGS to cov_flags-y, which
reduces amount of ifeqs in Rules.mk. Otherwise this patch had to add
another nesting level with "ifeq ($(CONFIG_CONDITION_COVERAGE),y)".

Signed-off-by: Volodymyr Babchuk 

---

Changes in v4:
 - Slight formatting fixes
 - COV_FLAGS  -> cov_flags-y

Changes in v3:
 - Introduced CC_HAS_MCDC that checks if compiler supports
   required feature

Changes in v2:
 - Move gcc version check from .c file to Rules.mk (I can't find
   an easy way to check GCC version at Kconfig level)
 - Check for gcc 14, not gcc 14.1
---
 xen/Kconfig       |  4 ++++
 xen/Kconfig.debug |  9 +++++++++
 xen/Rules.mk      | 14 +++++++-------
 3 files changed, 20 insertions(+), 7 deletions(-)

diff --git a/xen/Kconfig b/xen/Kconfig
index 2128f0ccfc..3a723db8ea 100644
--- a/xen/Kconfig
+++ b/xen/Kconfig
@@ -41,6 +41,10 @@ config CC_SPLIT_SECTIONS
 config CC_HAS_UBSAN
 	def_bool $(cc-option,-fsanitize=3Dundefined)
=20
+# Compiler supports -fcondition-coverage aka MC/DC
+config CC_HAS_MCDC
+	def_bool $(cc-option,-fcondition-coverage)
+
 # Set code alignment.
 #
 # Allow setting on a boolean basis, and then convert such selection to an
diff --git a/xen/Kconfig.debug b/xen/Kconfig.debug
index f7cc5ffaab..f89cbd823b 100644
--- a/xen/Kconfig.debug
+++ b/xen/Kconfig.debug
@@ -44,6 +44,15 @@ config COVERAGE
=20
 	  If unsure, say N here.
=20
+config CONDITION_COVERAGE
+	bool "Condition coverage support"
+	depends on COVERAGE && CC_HAS_MCDC
+	help
+	  Enable condition coverage support. Used for collecting MC/DC
+	  (Modified Condition/Decision Coverage) metrics.
+
+	  If unsure, say N here.
+
 config DEBUG_LOCK_PROFILE
 	bool "Lock Profiling"
 	select DEBUG_LOCKS
diff --git a/xen/Rules.mk b/xen/Rules.mk
index d759cccee3..e9e049368f 100644
--- a/xen/Rules.mk
+++ b/xen/Rules.mk
@@ -31,6 +31,7 @@ CFLAGS-y :=3D
 AFLAGS-y :=3D
 nocov-y :=3D
 noubsan-y :=3D
+cov-flags-y :=3D
=20
 SPECIAL_DATA_SECTIONS :=3D rodata $(foreach a,1 2 4 8 16, \
                                             $(foreach w,1 2 4, \
@@ -133,19 +134,18 @@ $(filter %.init.o,$(obj-y) $(obj-bin-y) $(extra-y)): =
CFLAGS-y +=3D -DINIT_SECTIONS
=20
 non-init-objects =3D $(filter-out %.init.o, $(obj-y) $(obj-bin-y) $(extra-=
y))
=20
-ifeq ($(CONFIG_COVERAGE),y)
 ifeq ($(CONFIG_CC_IS_CLANG),y)
-    COV_FLAGS :=3D -fprofile-instr-generate -fcoverage-mapping
+    cov-flags-$(CONFIG_COVERAGE) :=3D -fprofile-instr-generate -fcoverage-=
mapping
 else
-    COV_FLAGS :=3D -fprofile-arcs -ftest-coverage
+    cov-flags-$(CONFIG_COVERAGE) :=3D -fprofile-arcs -ftest-coverage
+    cov-flags-$(CONFIG_CONDITION_COVERAGE) +=3D -fcondition-coverage
 endif
=20
-# Reset COV_FLAGS in cases where an objects has another one as prerequisit=
e
+# Reset cov-flags-y in cases where an objects has another one as prerequis=
ite
 $(nocov-y) $(filter %.init.o, $(obj-y) $(obj-bin-y) $(extra-y)): \
-    COV_FLAGS :=3D
+    cov-flags-y :=3D
=20
-$(non-init-objects): _c_flags +=3D $(COV_FLAGS)
-endif
+$(non-init-objects): _c_flags +=3D $(cov-flags-y)
=20
 ifeq ($(CONFIG_UBSAN),y)
 # Any -fno-sanitize=3D options need to come after any -fsanitize=3D option=
s
--=20
2.48.1


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From: Volodymyr Babchuk 
To: "xen-devel@lists.xenproject.org" 
CC: Volodymyr Babchuk , Jan Beulich
	, Andrew Cooper ,
	=?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= , Anthony PERARD
	, Michal Orzel , Julien
 Grall , Stefano Stabellini 
Subject: [PATCH v4 0/2] Enable MC/DC support for GCC/GCOV
Thread-Topic: [PATCH v4 0/2] Enable MC/DC support for GCC/GCOV
Thread-Index: AQHbp9yWGdOlaD6DSkiV7Tp26KtCBA==
Date: Mon, 7 Apr 2025 16:46:19 +0000
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Subject: Re: [PATCH] xen/link: Drop .fixup section from non-x86 architectures
To: Andrew Cooper ,
 Xen-devel 
Cc: Anthony PERARD ,
 Michal Orzel , Jan Beulich ,
 Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Stefano Stabellini ,
 Volodymyr Babchuk ,
 Bertrand Marquis ,
 Oleksii Kurochko 
References: <20250403110003.1461522-1-andrew.cooper3@citrix.com>
Content-Language: en-US
From: Shawn Anastasio 
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Hi Andrew,

On 4/3/25 6:00 AM, Andrew Cooper wrote:
> The fixup section is only used by x86, and we're working to remove it there
> too.  Logic in the fixup section is unconnected to it's origin site, and
> interferes with backtraces/etc.
> 
> Remove the section from the architectures which don't use it.
> 
> Signed-off-by: Andrew Cooper 

Acked-by: Shawn Anastasio 

Thanks,
Shawn


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To: Julien Grall , 
CC: Oleksandr Andrushchenko ,
	=?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD
	, Stefano Stabellini ,
	Bertrand Marquis , Michal Orzel
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On 3/30/25 17:59, Julien Grall wrote:
> Hi Stewart,
> 
> I realize this series is at v18, but there are a few bits security-wise
> that concerns me. They don't have to be handled now because vPCI is
> still in tech preview. But we probably want to keep track of any issues
> if this hasn't yet been done in the code.

No worries, we want to get this right. Thank you for taking a look.

> On 25/03/2025 17:27, Stewart Hildebrand wrote:
>> diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c
>> index 1e6aa5d799b9..49c9444195d7 100644
>> --- a/xen/drivers/vpci/vpci.c
>> +++ b/xen/drivers/vpci/vpci.c
>> @@ -81,6 +81,32 @@ static int assign_virtual_sbdf(struct pci_dev *pdev)
>>       return 0;
>>   }
>>   +/*
>> + * Find the physical device which is mapped to the virtual device
>> + * and translate virtual SBDF to the physical one.
>> + */
>> +bool vpci_translate_virtual_device(struct domain *d, pci_sbdf_t *sbdf)
>> +{
>> +    const struct pci_dev *pdev;
>> +
>> +    ASSERT(!is_hardware_domain(d));
>> +    read_lock(&d->pci_lock);
>> +
>> +    for_each_pdev ( d, pdev )
> 
> I can't remember whether this was discussed before (there is no
> indication in the commit message). What's the maximum number of PCI
> devices supported? Do we limit it?
> 
> Asking because iterating through the list could end up to be quite
> expensive.

32. See xen/include/xen/vpci.h:
#define VPCI_MAX_VIRT_DEV       (PCI_SLOT(~0) + 1)

> Also, not a change for this patch, but it seems vcpi_{read,write} will
> also do another lookup. This is quite innefficient. We should consider
> return a pdev and use it for vcpi_{read,write}.

Hm. Right. Indeed, a future consideration.

>> +    {
>> +        if ( pdev->vpci && (pdev->vpci->guest_sbdf.sbdf == sbdf->sbdf) )
>> +        {
>> +            /* Replace guest SBDF with the physical one. */
>> +            *sbdf = pdev->sbdf;
>> +            read_unlock(&d->pci_lock);
>> +            return true;
>> +        }
>> +    }
>> +
>> +    read_unlock(&d->pci_lock);
> 
> At the point this is unlocked, what prevent the sbdf to be detached from
> the domain?

Nothing.

> If nothing, would this mean the domain can access something it should
> not?

Yep. I have a patch in the works to acquire the lock in the I/O
handlers. I would prefer doing this in a pre-patch so that we don't
temporarily introduce the race condition.

>> +    return false;> +}
>> +
>>   #endif /* CONFIG_HAS_VPCI_GUEST_SUPPORT */
>>     void vpci_deassign_device(struct pci_dev *pdev)
>> diff --git a/xen/include/xen/vpci.h b/xen/include/xen/vpci.h
>> index 807401b2eaa2..e355329913ef 100644
>> --- a/xen/include/xen/vpci.h
>> +++ b/xen/include/xen/vpci.h
>> @@ -311,6 +311,18 @@ static inline int __must_check vpci_reset_device(struct pci_dev *pdev)
>>       return vpci_assign_device(pdev);
>>   }
>>   +#ifdef CONFIG_HAS_VPCI_GUEST_SUPPORT
>> +bool vpci_translate_virtual_device(struct domain *d, pci_sbdf_t *sbdf);
>> +#else
>> +static inline bool vpci_translate_virtual_device(struct domain *d,
>> +                                                 pci_sbdf_t *sbdf)
>> +{
>> +    ASSERT_UNREACHABLE();
>> +
>> +    return false;
>> +}
>> +#endif
>> +
>>   #endif
>>     /*



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Cc: Stefano Stabellini ,
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In-Reply-To: <20250407123448.1520451-2-marmarek@invisiblethingslab.com>
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On 07/04/2025 1:31 pm, Marek Marczykowski-Górecki wrote:
> Build initrd format directly digestable by the kernel. Additionally,
> include it itself inside as boot/initrd-domU file, for domU booting in
> tests.
> This should avoid the need to repack tar -> cpio as part of the test
> job.
>
> Keep generating initrd.tar.gz as that's still used by older branches.
>
> Signed-off-by: Marek Marczykowski-Górecki 
> ---
>  scripts/x86_64-rootfs-alpine.sh | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/scripts/x86_64-rootfs-alpine.sh b/scripts/x86_64-rootfs-alpine.sh
> index b70b3a5..13e85fa 100755
> --- a/scripts/x86_64-rootfs-alpine.sh
> +++ b/scripts/x86_64-rootfs-alpine.sh
> @@ -58,3 +58,8 @@ passwd -d "root" root
>  cd /
>  tar cvzf "${WORKDIR}/binaries/initrd.tar.gz" \
>      bin dev etc home init lib mnt opt root sbin usr var
> +mkdir boot
> +find bin dev etc home init lib mnt opt root sbin usr var |\
> +    cpio -o -H newc | gzip > boot/initrd-domU
> +find bin boot dev etc home init lib mnt opt root sbin usr var |\
> +    cpio -o -H newc | gzip > "${WORKDIR}/binaries/initrd.cpio.gz" \

So, after looking at this a bit more, a few notes.

Trailing \ needs dropping.

initrd-domU probably ought to be named initrd-domU-base.cpio.gz so it's
clear what it is.  These are easy to fix up.

Looking through the current initrd.tar.gz, we've got:

$ ls -lah ./var/cache/apk/
total 1.9M
drwxr-xr-x 2 andrew andrew 4.0K Nov  8 15:12 .
drwxr-xr-x 4 andrew andrew 4.0K Sep  6  2024 ..
-rw-r--r-- 1 andrew andrew 425K Nov  8 15:12 APKINDEX.73fc500b.tar.gz
-rw-r--r-- 1 andrew andrew 1.4M Nov  8 15:12 APKINDEX.eb46142e.tar.gz

which (alone) is 5% of the size of the initrd.  I'll submit a patch
separately to drop this.

But doesn't this result in initrd.tar.gz being included in initrd-domU,
and then (doubly) in initrd.cpio.gz ?

~Andrew


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Date: Mon, 7 Apr 2025 18:14:54 +0100
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Subject: Re: [PATCH test-artifacts v2 14/12] scripts: build initrd cpio
From: Andrew Cooper 
To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 , xen-devel@lists.xenproject.org
Cc: Stefano Stabellini ,
 Anthony PERARD ,
 Michal Orzel , Jan Beulich ,
 Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 
References: 
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 <16f91d01-ea1c-43ec-a5d8-a55bb84fe94b@citrix.com>
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On 07/04/2025 6:11 pm, Andrew Cooper wrote:
> On 07/04/2025 1:31 pm, Marek Marczykowski-Górecki wrote:
>> Build initrd format directly digestable by the kernel. Additionally,
>> include it itself inside as boot/initrd-domU file, for domU booting in
>> tests.
>> This should avoid the need to repack tar -> cpio as part of the test
>> job.
>>
>> Keep generating initrd.tar.gz as that's still used by older branches.
>>
>> Signed-off-by: Marek Marczykowski-Górecki 
>> ---
>>  scripts/x86_64-rootfs-alpine.sh | 5 +++++
>>  1 file changed, 5 insertions(+)
>>
>> diff --git a/scripts/x86_64-rootfs-alpine.sh b/scripts/x86_64-rootfs-alpine.sh
>> index b70b3a5..13e85fa 100755
>> --- a/scripts/x86_64-rootfs-alpine.sh
>> +++ b/scripts/x86_64-rootfs-alpine.sh
>> @@ -58,3 +58,8 @@ passwd -d "root" root
>>  cd /
>>  tar cvzf "${WORKDIR}/binaries/initrd.tar.gz" \
>>      bin dev etc home init lib mnt opt root sbin usr var
>> +mkdir boot
>> +find bin dev etc home init lib mnt opt root sbin usr var |\
>> +    cpio -o -H newc | gzip > boot/initrd-domU
>> +find bin boot dev etc home init lib mnt opt root sbin usr var |\
>> +    cpio -o -H newc | gzip > "${WORKDIR}/binaries/initrd.cpio.gz" \
> So, after looking at this a bit more, a few notes.
>
> Trailing \ needs dropping.
>
> initrd-domU probably ought to be named initrd-domU-base.cpio.gz so it's
> clear what it is.  These are easy to fix up.
>
> Looking through the current initrd.tar.gz, we've got:
>
> $ ls -lah ./var/cache/apk/
> total 1.9M
> drwxr-xr-x 2 andrew andrew 4.0K Nov  8 15:12 .
> drwxr-xr-x 4 andrew andrew 4.0K Sep  6  2024 ..
> -rw-r--r-- 1 andrew andrew 425K Nov  8 15:12 APKINDEX.73fc500b.tar.gz
> -rw-r--r-- 1 andrew andrew 1.4M Nov  8 15:12 APKINDEX.eb46142e.tar.gz
>
> which (alone) is 5% of the size of the initrd.  I'll submit a patch
> separately to drop this.
>
> But doesn't this result in initrd.tar.gz being included in initrd-domU,
> and then (doubly) in initrd.cpio.gz ?

No, because $WORKDIR is nothing, and we put it in /binaries at the top
level which is excluded.

~Andrew


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Feedback-ID: i1568416f:Fastmail
Date: Mon, 7 Apr 2025 19:15:31 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: xen-devel@lists.xenproject.org,
	Stefano Stabellini ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich , Julien Grall ,
	Roger Pau =?utf-8?B?TW9ubsOp?= 
Subject: Re: [PATCH test-artifacts v2 14/12] scripts: build initrd cpio
Message-ID: 
References: 
 <20250407123448.1520451-2-marmarek@invisiblethingslab.com>
 <16f91d01-ea1c-43ec-a5d8-a55bb84fe94b@citrix.com>
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Date: Mon, 7 Apr 2025 19:15:31 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: xen-devel@lists.xenproject.org,
	Stefano Stabellini ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich , Julien Grall ,
	Roger Pau =?utf-8?B?TW9ubsOp?= 
Subject: Re: [PATCH test-artifacts v2 14/12] scripts: build initrd cpio

On Mon, Apr 07, 2025 at 06:11:29PM +0100, Andrew Cooper wrote:
> On 07/04/2025 1:31 pm, Marek Marczykowski-G=C3=B3recki wrote:
> > Build initrd format directly digestable by the kernel. Additionally,
> > include it itself inside as boot/initrd-domU file, for domU booting in
> > tests.
> > This should avoid the need to repack tar -> cpio as part of the test
> > job.
> >
> > Keep generating initrd.tar.gz as that's still used by older branches.
> >
> > Signed-off-by: Marek Marczykowski-G=C3=B3recki 
> > ---
> >  scripts/x86_64-rootfs-alpine.sh | 5 +++++
> >  1 file changed, 5 insertions(+)
> >
> > diff --git a/scripts/x86_64-rootfs-alpine.sh b/scripts/x86_64-rootfs-al=
pine.sh
> > index b70b3a5..13e85fa 100755
> > --- a/scripts/x86_64-rootfs-alpine.sh
> > +++ b/scripts/x86_64-rootfs-alpine.sh
> > @@ -58,3 +58,8 @@ passwd -d "root" root
> >  cd /
> >  tar cvzf "${WORKDIR}/binaries/initrd.tar.gz" \
> >      bin dev etc home init lib mnt opt root sbin usr var
> > +mkdir boot
> > +find bin dev etc home init lib mnt opt root sbin usr var |\
> > +    cpio -o -H newc | gzip > boot/initrd-domU
> > +find bin boot dev etc home init lib mnt opt root sbin usr var |\
> > +    cpio -o -H newc | gzip > "${WORKDIR}/binaries/initrd.cpio.gz" \
>=20
> So, after looking at this a bit more, a few notes.
>=20
> Trailing \ needs dropping.
>=20
> initrd-domU probably ought to be named initrd-domU-base.cpio.gz so it's
> clear what it is.=C2=A0 These are easy to fix up.

Technically, it's useful as is already if you just want to check if domU
starts.

> Looking through the current initrd.tar.gz, we've got:
>=20
> $ ls -lah ./var/cache/apk/
> total 1.9M
> drwxr-xr-x 2 andrew andrew 4.0K Nov=C2=A0 8 15:12 .
> drwxr-xr-x 4 andrew andrew 4.0K Sep=C2=A0 6=C2=A0 2024 ..
> -rw-r--r-- 1 andrew andrew 425K Nov=C2=A0 8 15:12 APKINDEX.73fc500b.tar.gz
> -rw-r--r-- 1 andrew andrew 1.4M Nov=C2=A0 8 15:12 APKINDEX.eb46142e.tar.gz
>=20
> which (alone) is 5% of the size of the initrd.=C2=A0 I'll submit a patch
> separately to drop this.

Makes sense.

> But doesn't this result in initrd.tar.gz being included in initrd-domU,
> and then (doubly) in initrd.cpio.gz ?

No, find (same as tar earlier) has explicit list of dirs to look at,
which don't include initrd.* nor "binaries".

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Michal Orzel ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
Subject: [PATCH] CI: Drop stale test-artifacts/alpine/3.18.dockerfile
Date: Mon,  7 Apr 2025 18:19:49 +0100
Message-Id: <20250407171949.1865294-1-andrew.cooper3@citrix.com>
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This should have been dropped too, as the authoritative copy lives in another
repo now.

Fixes: babe11b46c1a ("CI: Drop alpine-3.18-rootfs-export and use test-artefacts")
Signed-off-by: Andrew Cooper 
---
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Marek Marczykowski-Górecki 
---
 .../tests-artifacts/alpine/3.18.dockerfile    | 67 -------------------
 1 file changed, 67 deletions(-)
 delete mode 100644 automation/tests-artifacts/alpine/3.18.dockerfile

diff --git a/automation/tests-artifacts/alpine/3.18.dockerfile b/automation/tests-artifacts/alpine/3.18.dockerfile
deleted file mode 100644
index 311a92889b87..000000000000
--- a/automation/tests-artifacts/alpine/3.18.dockerfile
+++ /dev/null
@@ -1,67 +0,0 @@
-# syntax=docker/dockerfile:1
-FROM --platform=linux/amd64 alpine:3.18
-LABEL maintainer.name="The Xen Project" \
-      maintainer.email="xen-devel@lists.xenproject.org"
-
-ENV USER root
-
-RUN mkdir /build
-WORKDIR /build
-
-RUN \
-  # apk
-  apk update && \
-  \
-  # xen runtime deps
-  apk add musl && \
-  apk add libgcc && \
-  apk add openrc && \
-  apk add busybox && \
-  apk add sudo && \
-  apk add dbus && \
-  apk add bash && \
-  apk add python3 && \
-  apk add zlib && \
-  apk add ncurses && \
-  apk add yajl && \
-  apk add libaio && \
-  apk add xz && \
-  apk add util-linux && \
-  apk add argp-standalone && \
-  apk add libfdt && \
-  apk add glib && \
-  apk add pixman && \
-  apk add curl && \
-  apk add udev && \
-  apk add pciutils && \
-  apk add libelf && \
-  \
-  # Xen
-  cd / && \
-  # Minimal ramdisk environment in case of cpio output
-  rc-update add udev && \
-  rc-update add udev-trigger && \
-  rc-update add udev-settle && \
-  rc-update add loopback sysinit && \
-  rc-update add bootmisc boot && \
-  rc-update add devfs sysinit && \
-  rc-update add dmesg sysinit && \
-  rc-update add hostname boot && \
-  rc-update add hwclock boot && \
-  rc-update add hwdrivers sysinit && \
-  rc-update add modules boot && \
-  rc-update add killprocs shutdown && \
-  rc-update add mount-ro shutdown && \
-  rc-update add savecache shutdown && \
-  rc-update add local default && \
-  cp -a /sbin/init /init && \
-  echo "ttyS0" >> /etc/securetty && \
-  echo "hvc0" >> /etc/securetty && \
-  echo "ttyS0::respawn:/sbin/getty -L ttyS0 115200 vt100" >> /etc/inittab && \
-  echo "hvc0::respawn:/sbin/getty -L hvc0 115200 vt100" >> /etc/inittab && \
-  echo > /etc/modules && \
-  passwd -d "root" root && \
-  \
-  # Create rootfs
-  cd / && \
-  tar cvzf /initrd.tar.gz bin dev etc home init lib mnt opt root sbin usr var

base-commit: a235f856e4bbd270b085590e1f5fc9599234dcdf
-- 
2.39.5



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Subject: Re: [PATCH v2 06/12] CI: consistently use DOCKER_CMD in makefiles
To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 , xen-devel@lists.xenproject.org
Cc: Stefano Stabellini ,
 Doug Goldstein 
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 <3e28c1267125641ed3212c0366678474692913b2.1744028549.git-series.marmarek@invisiblethingslab.com>
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In-Reply-To: <3e28c1267125641ed3212c0366678474692913b2.1744028549.git-series.marmarek@invisiblethingslab.com>
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On 07/04/2025 1:31 pm, Marek Marczykowski-Górecki wrote:
> This allows rebuilding containers using podman too.
>
> Signed-off-by: Marek Marczykowski-Górecki 
> Reviewed-by: Stefano Stabellini 
> ---
>  automation/build/Makefile           | 4 ++--
>  automation/tests-artifacts/Makefile | 4 ++--
>  2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/automation/build/Makefile b/automation/build/Makefile
> index 4df43b040777..fedf7524dacd 100644
> --- a/automation/build/Makefile
> +++ b/automation/build/Makefile
> @@ -31,8 +31,8 @@ clean:
>  define CLEAN_RULE
>  .PHONY: clean-$(1)
>  clean-$(1):
> -	if [ -n "$$$$(docker image ls -q $(REGISTRY)/$(subst /,:,$(1)))" ]; then \
> -		docker image rm $(REGISTRY)/$(subst /,:,$(1)); \
> +	if [ -n "$$$$($(DOCKER_CMD) image ls -q $(REGISTRY)/$(subst /,:,$(1)))" ]; then \
> +		$(DOCKER_CMD) image rm $(REGISTRY)/$(subst /,:,$(1)); \
>  	fi
>  
>  endef
> diff --git a/automation/tests-artifacts/Makefile b/automation/tests-artifacts/Makefile
> index d055cd696bed..80a60a94f3f7 100644
> --- a/automation/tests-artifacts/Makefile
> +++ b/automation/tests-artifacts/Makefile
> @@ -10,9 +10,9 @@ help:
>  	@echo "To push container builds, set the env var PUSH"
>  
>  %: %.dockerfile ## Builds containers
> -	docker build --pull -t $(REGISTRY)/$(@D):$(@F) -f $< $( +	$(DOCKER_CMD) build --pull -t $(REGISTRY)/$(@D):$(@F) -f $< $(  	@if [ ! -z $${PUSH+x} ]; then \
> -		docker push $(REGISTRY)/$(@D):$(@F); \
> +		$(DOCKER_CMD) push $(REGISTRY)/$(@D):$(@F); \
>  	fi
>  
>  .PHONY: all

I'm going to apply this commit to the test artefacts repo too, as it's
got a copy of this Makefile in need of the same change.


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Subject: Re: [PATCH v2 08/12] CI: switch test kernel from 6.1.19 to 6.12.21
To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 , xen-devel@lists.xenproject.org
Cc: Doug Goldstein ,
 Stefano Stabellini 
References: 
 
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Content-Type: text/plain; charset=UTF-8
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On 07/04/2025 1:31 pm, Marek Marczykowski-Górecki wrote:
> The jump is pretty big, but should be enough for a longer time. The
> change right now is motivated adding new runner with AMD Zen4.
>
> Signed-off-by: Marek Marczykowski-Górecki 
> ---
>  automation/gitlab-ci/build.yaml                      |  4 +-
>  automation/gitlab-ci/test.yaml                       |  2 +-
>  automation/tests-artifacts/kernel/6.1.19.dockerfile  | 41 +-------------
>  automation/tests-artifacts/kernel/6.12.21.dockerfile | 41 +++++++++++++-
>  4 files changed, 44 insertions(+), 44 deletions(-)
>  delete mode 100644 automation/tests-artifacts/kernel/6.1.19.dockerfile
>  create mode 100644 automation/tests-artifacts/kernel/6.12.21.dockerfile

I'd really prefer not to continue extending the *-export mess, but that
in turn needs fixes in the test-artefacts repo first.  It should
simplify later parts of this series.

~Andrew


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Date: Mon, 07 Apr 2025 18:03:26 +0000
To: Andrew Cooper 
From: Denis Mukhin 
Cc: xen-devel@lists.xenproject.org, jbeulich@suse.com, roger.pau@citrix.com, dmukhin@ford.com
Subject: Re: [PATCH v3] x86/emulate: Remove HAVE_AS_RDRAND and HAVE_AS_RDSEED
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References: <20250405012417.3108759-1-dmukhin@ford.com> 
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On Monday, April 7th, 2025 at 2:17 AM, Andrew Cooper  wrote:

>=20
>=20
> On 05/04/2025 2:25 am, dmkhn@proton.me wrote:
>=20
> > From: Denis Mukhin dmukhin@ford.com
> >=20
> > The new toolchain baseline knows the rdrand/rdseed instructions,
> > no need to carry the workaround in the code.
>=20
>=20
> A few minor notes. Instructions in CAPITALS please to make them easier
> to parse in context. The comma ought to be a semi-colon.
>=20
> You should note that arch_get_random() is adjusted too.
>=20
> Also, it's useful to state "No functional change." to help reviewers.
> (Or to help archaeologies figure out the intent of the patch if they
> subsequently find a bug in it.)

Noted, thanks for the feedback

>=20
> > diff --git a/xen/arch/x86/include/asm/random.h b/xen/arch/x86/include/a=
sm/random.h
> > index 9e1fe0bc1d..e1c1c765e1 100644
> > --- a/xen/arch/x86/include/asm/random.h
> > +++ b/xen/arch/x86/include/asm/random.h
> > @@ -8,7 +8,7 @@ static inline unsigned int arch_get_random(void)
> > unsigned int val =3D 0;
> >=20
> > if ( cpu_has(¤t_cpu_data, X86_FEATURE_RDRAND) )
> > - asm volatile ( ".byte 0x0f,0xc7,0xf0" : "+a" (val) );
> > + asm volatile ( "rdrand %0" : "=3Da" (val) );
>=20
>=20
> This was only tied to "a" because 0xf0 is the ModRM byte. Now that we
> can use the mnemonic, it can become "=3Dr".
>=20
> I've fixed all on commit.

Thank you!

>=20
> ~Andrew


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Date: Mon, 07 Apr 2025 18:03:58 +0000
To: Andrew Cooper 
From: Denis Mukhin 
Cc: xen-devel@lists.xenproject.org, jbeulich@suse.com, roger.pau@citrix.com, dmukhin@ford.com
Subject: Re: [PATCH v3] x86/vmx: Rework VMX wrappers using `asm goto()`
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On Monday, April 7th, 2025 at 2:46 AM, Andrew Cooper  wrote:

>=20
>=20
> On 05/04/2025 2:27 am, dmkhn@proton.me wrote:
>=20
> > diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmx.h b/xen/arch/x86/incl=
ude/asm/hvm/vmx/vmx.h
> > index affb3a8bd6..6aa6e1f212 100644
> > --- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h
> > +++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h
> > @@ -294,28 +294,30 @@ extern uint8_t posted_intr_vector;
> >=20
> > static always_inline void __vmptrld(u64 addr)
> > {
> > - asm volatile ( "vmptrld %0\n\t"
> > - /* CF=3D=3D1 or ZF=3D=3D1 --> BUG() */
> > - UNLIKELY_START(be, vmptrld)
> > - _ASM_BUGFRAME_TEXT(0)
> > - UNLIKELY_END_SECTION
> > - :
> > - : "m" (addr),
> > - _ASM_BUGFRAME_INFO(BUGFRAME_bug, LINE, FILE, 0)
> > - : "memory" );
> > + asm goto ( "vmptrld %[addr]\n\t"
> > + "jbe %l[vmfail]\n"
>=20
>=20
> This should be without \n too, as it's the last line of assembly.
>=20
> I've fixed on commit.

Thanks!

>=20
> ~Andrew


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Date: Mon, 7 Apr 2025 19:07:39 +0100
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Subject: Re: [PATCH v2 02/12] CI: switch qubes runners to use console.exp
To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 , xen-devel@lists.xenproject.org
Cc: Doug Goldstein ,
 Stefano Stabellini 
References: 
 <33fe66669f6ca9fb7573d69d9f9fefeb653fe503.1744028549.git-series.marmarek@invisiblethingslab.com>
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In-Reply-To: <33fe66669f6ca9fb7573d69d9f9fefeb653fe503.1744028549.git-series.marmarek@invisiblethingslab.com>
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On 07/04/2025 1:31 pm, Marek Marczykowski-Górecki wrote:
> diff --git a/automation/scripts/console.exp b/automation/scripts/console.exp
> index 31ce97b91b63..d1689fa5bf7f 100755
> --- a/automation/scripts/console.exp
> +++ b/automation/scripts/console.exp
> @@ -28,21 +28,34 @@ if {[info exists env(UBOOT_CMD)]} {
>      send "$env(UBOOT_CMD)\r"
>  }
>  
> +if {[info exists env(BOOT_MSG)]} {
> +    expect -re "$env(BOOT_MSG)"
> +}

We're gaining an increasingly complex set of environment variables to
control this script.  In particular, this is more a signs-of-life
message than a completion.

I think this patch wants splitting into two.  First doing the -re
changes, and adding BOOT_MSG, and some comments explaining how each part
is supposed to be used.  I expect the xilinx- jobs want to use BOOT_MSG
too, whereas I expect we don't want the qemu/cirrus smoke tests to use
it, seeing as they're all direct-boot in qemu.

The, the second patch is converting qubes-x86-64.sh to use it, adding
WAKEUP_CMD/SYSPEND_MSG as they're pretty specific.

~Andrew


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On 2025-04-04 03:38, Jan Beulich wrote:
> On 03.04.2025 23:46, Jason Andryuk wrote:
>> From: "Daniel P. Smith" 
>>
>> Add and use a new internal create domain flag to specify the hardware
>> domain.  This removes the hardcoding of domid 0 as the hardware domain.
>>
>> This allows more flexibility with domain creation.
>>
>> Signed-off-by: Daniel P. Smith 
>> Signed-off-by: Jason Andryuk 
>> Reviewed-by: Jan Beulich 
>> ---
>> v3:
>> Or-in CDF_hardware for late hwdom case
> 
> Except that ...
> 
>> --- a/xen/common/domain.c
>> +++ b/xen/common/domain.c
>> @@ -820,13 +820,18 @@ struct domain *domain_create(domid_t domid,
>>       d->is_privileged = flags & CDF_privileged;
>>   
>>       /* Sort out our idea of is_hardware_domain(). */
>> -    if ( domid == 0 || domid == hardware_domid )
>> +    if ( (flags & CDF_hardware) || domid == hardware_domid )
>>       {
>>           if ( hardware_domid < 0 || hardware_domid >= DOMID_FIRST_RESERVED )
>>               panic("The value of hardware_dom must be a valid domain ID\n");
>>   
>> +        /* late_hwdom is only allowed for dom0. */
>> +        if ( hardware_domain && hardware_domain->domain_id )
>> +            return ERR_PTR(-EINVAL);
>> +
>>           old_hwdom = hardware_domain;
>>           hardware_domain = d;
>> +        flags |= CDF_hardware;
>>       }
> 
> ... this isn't quite enough. You're only modifying what will go out of scope
> when returning from the function. What's at least equally important to OR into
> is d->cdf.

Yes, thanks for catching that.

I'll move d->cdf assignment to after here instead of or-ing in a second 
time.

With that, it seems like it should also be removed from old_hwdom?

old_hwdom->cdf &= ~CDF_hardware

Regards,
Jason


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Subject: Re: [PATCH v3 4/7] xen/arm: dom0less seed xenstore grant table entry
To: Jan Beulich 
CC: Stefano Stabellini , Julien Grall
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	, Volodymyr Babchuk ,
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On 2025-04-04 03:34, Jan Beulich wrote:
> On 03.04.2025 23:46, Jason Andryuk wrote:
>> xenstored maps other domains' xenstore pages.  Currently this relies on
>> init-dom0less or xl to seed the grants from Dom0.  With split
>> hardware/control/xenstore domains, this is problematic since we don't
>> want the hardware domain to be able to map other domains' resources
>> without their permission.  Instead have the hypervisor seed the grant
>> table entry for every dom0less domain.  The grant is then accessible as
>> normal.
>>
>> C xenstored uses grants, so it can map the xenstore pages from a
>> non-dom0 xenstore domain.  OCaml xenstored uses foreign mappings, so it
>> can only run from a privileged domain (dom0).
>>
>> Signed-off-by: Jason Andryuk 
>> ---
>> v3:
>> Expand commit message about C vs. OCaml xenstored.
>> Remove __init and flags from gnttab_seed_entry()
>> Change frame to uint32_t
>> ASSERT gfn fits in a uint32_t
> 
> Ehem. For this you need to use ...
> 
>> --- a/xen/arch/arm/dom0less-build.c
>> +++ b/xen/arch/arm/dom0less-build.c
>> @@ -788,6 +788,12 @@ static void __init initialize_domU_xenstore(void)
>>           rc = alloc_xenstore_evtchn(d);
>>           if ( rc < 0 )
>>               panic("%pd: Failed to allocate xenstore_evtchn\n", d);
>> +
>> +        if ( gfn != ~0ULL )
>> +        {
>> +            ASSERT(gfn <= UINT_MAX);
> 
> ... UINT32_MAX here. Furthermore may I remind you that INVALID_GFN ==
> UINT32_MAX in 32-bit environments.

Yes, thanks.

> The ~0ULL may also better be UINT64_MAX.

I'll also add

#define XENSTORE_PFN_LATE_ALLOC UINT64_MAX

>> @@ -85,6 +89,9 @@ static inline void grant_table_destroy(struct domain *d) {}
>>   
>>   static inline void grant_table_init_vcpu(struct vcpu *v) {}
>>   
>> +static inline void gnttab_seed_entry(struct domain *d, int idx,
>> +                                     domid_t be_domid, uint32_t frame) {}
> 
> Hmm. While generally I prefer using such wrappers, I wonder if in this
> case it wouldn't end up more clear if a conditional was added in
> initialize_domU_xenstore(). Ideally using IS_ENABLED(), which - aiui -
> would require moving the declaration of the function.

Ok.

Thanks,
Jason


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Message-ID: 
Date: Mon, 7 Apr 2025 19:29:57 +0100
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v4 3/3] xen/arm32: mpu: Stubs to build MPU for arm32
Content-Language: en-GB
To: Luca Fancellu ,
 Ayan Kumar Halder 
Cc: "xen-devel@lists.xenproject.org" ,
 Stefano Stabellini , Julien Grall ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk 
References: <20250403171241.975377-1-ayan.kumar.halder@amd.com>
 <20250403171241.975377-4-ayan.kumar.halder@amd.com>
 
From: Ayan Kumar Halder 
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On 04/04/2025 10:11, Luca Fancellu wrote:
> Hi Ayan,
Hi Luca,
>
>> On 3 Apr 2025, at 18:12, Ayan Kumar Halder  wrote:
>>
>> Add stubs to enable compilation
>>
>> Signed-off-by: Ayan Kumar Halder 
>> ---
>>
>> Changes from :-
>>
>> v1, v2 -
>> 1. New patch introduced in v3.
>> 2. Should be applied on top of
>> https://patchwork.kernel.org/project/xen-devel/cover/20250316192445.2376484-1-luca.fancellu@arm.com/
>>
>> v3 -
>> 1. Add stubs for map_domain_page() and similar functions.
>>
>> 2. 'BUG_ON("unimplemented")' is kept in all the stubs.
>>
>> xen/arch/arm/arm32/mpu/Makefile  |  2 ++
>> xen/arch/arm/arm32/mpu/p2m.c     | 18 ++++++++++++++
>> xen/arch/arm/arm32/mpu/smpboot.c | 23 ++++++++++++++++++
>> xen/arch/arm/include/asm/mm.h    |  5 ++++
>> xen/arch/arm/mpu/Makefile        |  1 +
>> xen/arch/arm/mpu/domain_page.c   | 40 ++++++++++++++++++++++++++++++++
>> 6 files changed, 89 insertions(+)
>> create mode 100644 xen/arch/arm/arm32/mpu/p2m.c
>> create mode 100644 xen/arch/arm/arm32/mpu/smpboot.c
>> create mode 100644 xen/arch/arm/mpu/domain_page.c
>>
>>
>> diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h
>> index fbffaccef4..2a52cf530f 100644
>> --- a/xen/arch/arm/include/asm/mm.h
>> +++ b/xen/arch/arm/include/asm/mm.h
>> @@ -171,12 +171,17 @@ struct page_info
>> #define PGC_need_scrub    PGC_allocated
>>
>> #ifdef CONFIG_ARM_32
>> +#ifdef CONFIG_MPU
>> +#define is_xen_heap_page(page) ({ BUG_ON("unimplemented"); false; })
>> +#define is_xen_heap_mfn(mfn) ({ BUG_ON("unimplemented"); false; })
>> +#else /* !CONFIG_MPU */
>> #define is_xen_heap_page(page) is_xen_heap_mfn(page_to_mfn(page))
>> #define is_xen_heap_mfn(mfn) ({                                 \
>>      unsigned long mfn_ = mfn_x(mfn);                            \
>>      (mfn_ >= mfn_x(directmap_mfn_start) &&                      \
>>       mfn_ < mfn_x(directmap_mfn_end));                          \
>> })
>> +#endif /* !CONFIG_MPU */
>> #else
>> #define is_xen_heap_page(page) ((page)->count_info & PGC_xen_heap)
>> #define is_xen_heap_mfn(mfn) \
> I’ve had a look on this, if we want to get rid of some #ifdef we could do this:
>
> diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h
> index 2a52cf530f25..5b67c0f8bb1c 100644
> --- a/xen/arch/arm/include/asm/mm.h
> +++ b/xen/arch/arm/include/asm/mm.h
> @@ -170,19 +170,7 @@ struct page_info
>   #define _PGC_need_scrub   _PGC_allocated
>   #define PGC_need_scrub    PGC_allocated
>   
> -#ifdef CONFIG_ARM_32
> -#ifdef CONFIG_MPU
> -#define is_xen_heap_page(page) ({ BUG_ON("unimplemented"); false; })
> -#define is_xen_heap_mfn(mfn) ({ BUG_ON("unimplemented"); false; })
> -#else /* !CONFIG_MPU */
> -#define is_xen_heap_page(page) is_xen_heap_mfn(page_to_mfn(page))
> -#define is_xen_heap_mfn(mfn) ({                                 \
> -    unsigned long mfn_ = mfn_x(mfn);                            \
> -    (mfn_ >= mfn_x(directmap_mfn_start) &&                      \
> -     mfn_ < mfn_x(directmap_mfn_end));                          \
> -})
> -#endif /* !CONFIG_MPU */
> -#else
> +#ifdef CONFIG_ARM_64
>   #define is_xen_heap_page(page) ((page)->count_info & PGC_xen_heap)
>   #define is_xen_heap_mfn(mfn) \
>       (mfn_valid(mfn) && is_xen_heap_page(mfn_to_page(mfn)))
> diff --git a/xen/arch/arm/include/asm/mmu/mm.h b/xen/arch/arm/include/asm/mmu/mm.h
> index caba987edc85..9b98d12b076b 100644
> --- a/xen/arch/arm/include/asm/mmu/mm.h
> +++ b/xen/arch/arm/include/asm/mmu/mm.h
> @@ -21,6 +21,15 @@ extern unsigned long directmap_base_pdx;
>   
>   #define frame_table ((struct page_info *)FRAMETABLE_VIRT_START)
>   
> +#ifdef CONFIG_ARM_32
> +#define is_xen_heap_page(page) is_xen_heap_mfn(page_to_mfn(page))
> +#define is_xen_heap_mfn(mfn) ({                                 \
> +    unsigned long mfn_ = mfn_x(mfn);                            \
> +    (mfn_ >= mfn_x(directmap_mfn_start) &&                      \
> +     mfn_ < mfn_x(directmap_mfn_end));                          \
> +})
> +#endif
> +
>   #define virt_to_maddr(va) ({                                                   \
>       vaddr_t va_ = (vaddr_t)(va);                                               \
>       (paddr_t)((va_to_par(va_) & PADDR_MASK & PAGE_MASK) | (va_ & ~PAGE_MASK)); \
> diff --git a/xen/arch/arm/include/asm/mpu/mm.h b/xen/arch/arm/include/asm/mpu/mm.h
> index 86f33d9836b7..bfd840fa5d31 100644
> --- a/xen/arch/arm/include/asm/mpu/mm.h
> +++ b/xen/arch/arm/include/asm/mpu/mm.h
> @@ -13,6 +13,11 @@ extern struct page_info *frame_table;
>   
>   #define virt_to_maddr(va) ((paddr_t)((vaddr_t)(va) & PADDR_MASK))
>   
> +#ifdef CONFIG_ARM_32
> +#define is_xen_heap_page(page) ({ BUG_ON("unimplemented"); false; })
> +#define is_xen_heap_mfn(mfn) ({ BUG_ON("unimplemented"); false; })
> +#endif
> +
>   /* On MPU systems there is no translation, ma == va. */
>   static inline void *maddr_to_virt(paddr_t ma)
>   {
>
> But feel free to ignore if it’s not desirable.
Actually, makes sense. I have included this in my v5.
>
>
>> diff --git a/xen/arch/arm/mpu/Makefile b/xen/arch/arm/mpu/Makefile
>> index 21bbc517b5..ff221011d5 100644
>> --- a/xen/arch/arm/mpu/Makefile
>> +++ b/xen/arch/arm/mpu/Makefile
>> @@ -2,3 +2,4 @@ obj-y += mm.o
>> obj-y += p2m.o
>> obj-y += setup.init.o
>> obj-y += vmap.o
>> +obj-$(CONFIG_ARM_32) += domain_page.o
>> diff --git a/xen/arch/arm/mpu/domain_page.c b/xen/arch/arm/mpu/domain_page.c
>> new file mode 100644
>> index 0000000000..b9ebb03d67
>> --- /dev/null
>> +++ b/xen/arch/arm/mpu/domain_page.c
>> @@ -0,0 +1,40 @@
>> +/* SPDX-License-Identifier: GPL-2.0-or-later */
>> +#include 
>> +
>> +void *map_domain_page_global(mfn_t mfn)
>> +{
>> +    BUG_ON("unimplemented");
>> +    return (void*)0;
> return NULL? here and below
>
>> +}
>> +
>> +/* Map a page of domheap memory */
>> +void *map_domain_page(mfn_t mfn)
>> +{
>> +    BUG_ON("unimplemented");
>> +    return (void*)0;
>> +}
>> +
>> +/* Release a mapping taken with map_domain_page() */
>> +void unmap_domain_page(const void *ptr)
>> +{
>> +    BUG_ON("unimplemented");
>> +}
>> +
>> +mfn_t domain_page_map_to_mfn(const void *ptr)
>> +{
>> +    BUG_ON("unimplemented");
> Not really necessary, but if you want: return INVALID_MFN;

The function is still technically unimplemented, so I will keep that and 
add return INVALID_MFN;

The rest of your suggestions are perfect. :)

I have incorporated them in v5.

- Ayan

>
>> +}
>> +
>> +void unmap_domain_page_global(const void *va)
>> +{
>> +    BUG_ON("unimplemented");
>> +}
>> +
>> +/*
>> + * Local variables:
>> + * mode: C
>> + * c-file-style: "BSD"
>> + * c-basic-offset: 4
>> + * indent-tabs-mode: nil
>> + * End:
>> + */
>> -- 
>> 2.25.1
>>
>>


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Date: Mon, 7 Apr 2025 11:35:43 -0700
From: Andrew Morton 
To: Alexander Gordeev 
Cc: Andrey Ryabinin , Hugh Dickins
 , Nicholas Piggin , Guenter Roeck
 , Juergen Gross , Jeremy Fitzhardinge
 , linux-kernel@vger.kernel.org, linux-mm@kvack.org,
 kasan-dev@googlegroups.com, sparclinux@vger.kernel.org,
 xen-devel@lists.xenproject.org, linuxppc-dev@lists.ozlabs.org,
 linux-s390@vger.kernel.org
Subject: Re: [PATCH v1 0/4] mm: Fix apply_to_pte_range() vs lazy MMU mode
Message-Id: <20250407113543.6a43461e397d58471e407323@linux-foundation.org>
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On Mon,  7 Apr 2025 17:11:26 +0200 Alexander Gordeev  wrote:

> This series is an attempt to fix the violation of lazy MMU mode context
> requirement as described for arch_enter_lazy_mmu_mode():
> 
>     This mode can only be entered and left under the protection of
>     the page table locks for all page tables which may be modified.
> 
> On s390 if I make arch_enter_lazy_mmu_mode() -> preempt_enable() and
> arch_leave_lazy_mmu_mode() -> preempt_disable() I am getting this:
>
> ...
>

Could you please reorganize this into two series?  One series which
should be fast-tracked into 6.15-rcX and one series for 6.16-rc1?

And in the first series, please suggest whether its patches should be
backported into -stable and see if we can come up with suitable Fixes:
targets?

Thanks.


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From: Ayan Kumar Halder 
To: 
CC: Ayan Kumar Halder , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" 
Subject: [PATCH v5 0/3] Enable early bootup of Armv8-R AArch32 systems
Date: Mon, 7 Apr 2025 19:44:40 +0100
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Enable early booting of Armv8-R AArch32 based systems.

Ayan Kumar Halder (3):
  xen/arm: Move some of the functions to common file
  xen/arm32: Create the same boot-time MPU regions as arm64
  xen/arm32: mpu: Stubs to build MPU for arm32

 xen/arch/arm/arm32/Makefile              |   1 +
 xen/arch/arm/arm32/mpu/Makefile          |   3 +
 xen/arch/arm/arm32/mpu/head.S            | 101 +++++++++++++++++++++++
 xen/arch/arm/arm32/mpu/p2m.c             |  18 ++++
 xen/arch/arm/arm32/mpu/smpboot.c         |  23 ++++++
 xen/arch/arm/arm64/mpu/head.S            |  78 +----------------
 xen/arch/arm/include/asm/arm32/sysregs.h |   7 ++
 xen/arch/arm/include/asm/arm64/sysregs.h |  11 +++
 xen/arch/arm/include/asm/cpregs.h        |   4 +
 xen/arch/arm/include/asm/mm.h            |   9 +-
 xen/arch/arm/include/asm/mmu/mm.h        |   9 ++
 xen/arch/arm/include/asm/mpu/common.inc  |  79 ++++++++++++++++++
 xen/arch/arm/include/asm/mpu/cpregs.h    |  24 ++++++
 xen/arch/arm/include/asm/mpu/mm.h        |   5 ++
 xen/arch/arm/mpu/Makefile                |   1 +
 xen/arch/arm/mpu/domain_page.c           |  41 +++++++++
 16 files changed, 329 insertions(+), 85 deletions(-)
 create mode 100644 xen/arch/arm/arm32/mpu/Makefile
 create mode 100644 xen/arch/arm/arm32/mpu/head.S
 create mode 100644 xen/arch/arm/arm32/mpu/p2m.c
 create mode 100644 xen/arch/arm/arm32/mpu/smpboot.c
 create mode 100644 xen/arch/arm/include/asm/mpu/common.inc
 create mode 100644 xen/arch/arm/include/asm/mpu/cpregs.h
 create mode 100644 xen/arch/arm/mpu/domain_page.c

-- 
2.25.1



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From: Ayan Kumar Halder 
To: 
CC: Ayan Kumar Halder , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" 
Subject: [PATCH v5 2/3] xen/arm32: Create the same boot-time MPU regions as arm64
Date: Mon, 7 Apr 2025 19:44:42 +0100
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We have created the same boot-time MPU protection regions as Armv8-R AArch64.
Also, we have defined *_PRBAR macros for arm32. The only difference from
arm64 is that XN is 1-bit for arm32.
The macros have been defined in mpu/cpregs.h.

Also defined WRITE_SYSREG_ASM() to write to system registers in assembly.

Signed-off-by: Ayan Kumar Halder 
---
Changes from

v1 -

1. enable_mpu() now sets HMAIR{0,1} registers. This is similar to what is
being done in enable_mmu(). All the mm related configurations happen in this
function.

2. Fixed some typos. 

v2 -
1. Include the common prepare_xen_region.inc in head.S.

2. Define LOAD_SYSREG()/STORE_SYSREG() for arm32.

v3 -
1. Rename STORE_SYSREG() as WRITE_SYSREG_ASM()

2. enable_boot_cpu_mm() is defined in head.S

v4 -
1. *_PRBAR is moved to arm32/sysregs.h.

2. MPU specific CP15 system registers are defined in mpu/cpregs.h. 

 xen/arch/arm/arm32/Makefile              |   1 +
 xen/arch/arm/arm32/mpu/Makefile          |   1 +
 xen/arch/arm/arm32/mpu/head.S            | 101 +++++++++++++++++++++++
 xen/arch/arm/include/asm/arm32/sysregs.h |   7 ++
 xen/arch/arm/include/asm/cpregs.h        |   4 +
 xen/arch/arm/include/asm/mpu/cpregs.h    |  24 ++++++
 6 files changed, 138 insertions(+)
 create mode 100644 xen/arch/arm/arm32/mpu/Makefile
 create mode 100644 xen/arch/arm/arm32/mpu/head.S
 create mode 100644 xen/arch/arm/include/asm/mpu/cpregs.h

diff --git a/xen/arch/arm/arm32/Makefile b/xen/arch/arm/arm32/Makefile
index 40a2b4803f..537969d753 100644
--- a/xen/arch/arm/arm32/Makefile
+++ b/xen/arch/arm/arm32/Makefile
@@ -1,5 +1,6 @@
 obj-y += lib/
 obj-$(CONFIG_MMU) += mmu/
+obj-$(CONFIG_MPU) += mpu/
 
 obj-$(CONFIG_EARLY_PRINTK) += debug.o
 obj-y += domctl.o
diff --git a/xen/arch/arm/arm32/mpu/Makefile b/xen/arch/arm/arm32/mpu/Makefile
new file mode 100644
index 0000000000..3340058c08
--- /dev/null
+++ b/xen/arch/arm/arm32/mpu/Makefile
@@ -0,0 +1 @@
+obj-y += head.o
diff --git a/xen/arch/arm/arm32/mpu/head.S b/xen/arch/arm/arm32/mpu/head.S
new file mode 100644
index 0000000000..84e9f1f8ec
--- /dev/null
+++ b/xen/arch/arm/arm32/mpu/head.S
@@ -0,0 +1,101 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Start-of-day code for an Armv8-R MPU system.
+ */
+
+#include 
+#include 
+#include 
+
+/*
+ * Set up the memory attribute type tables and enable EL2 MPU and data cache.
+ * If the Background region is enabled, then the MPU uses the default memory
+ * map as the Background region for generating the memory
+ * attributes when MPU is disabled.
+ * Since the default memory map of the Armv8-R AArch32 architecture is
+ * IMPLEMENTATION DEFINED, we intend to turn off the Background region here.
+ *
+ * Clobbers r0 - r1
+ */
+FUNC_LOCAL(enable_mpu)
+    /* Set up memory attribute type tables */
+    mov_w r0, MAIR0VAL
+    mov_w r1, MAIR1VAL
+    mcr   CP32(r0, HMAIR0)
+    mcr   CP32(r1, HMAIR1)
+
+    mrc   CP32(r0, HSCTLR)
+    bic   r0, r0, #SCTLR_ELx_BR       /* Disable Background region */
+    orr   r0, r0, #SCTLR_Axx_ELx_M    /* Enable MPU */
+    orr   r0, r0, #SCTLR_Axx_ELx_C    /* Enable D-cache */
+    mcr   CP32(r0, HSCTLR)
+    isb
+
+    ret
+END(enable_mpu)
+
+/*
+ * Maps the various sections of Xen (described in xen.lds.S) as different MPU
+ * regions.
+ *
+ * Clobbers r0 - r5
+ *
+ */
+FUNC(enable_boot_cpu_mm)
+    /* Get the number of regions specified in MPUIR_EL2 */
+    mrc   CP32(r5, MPUIR_EL2)
+    and   r5, r5, #NUM_MPU_REGIONS_MASK
+
+    /* x0: region sel */
+    mov   r0, #0
+    /* Xen text section. */
+    mov_w   r1, _stext
+    mov_w   r2, _etext
+    prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_TEXT_PRBAR
+
+    /* Xen read-only data section. */
+    mov_w   r1, _srodata
+    mov_w   r2, _erodata
+    prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_RO_PRBAR
+
+    /* Xen read-only after init and data section. (RW data) */
+    mov_w   r1, __ro_after_init_start
+    mov_w   r2, __init_begin
+    prepare_xen_region r0, r1, r2, r3, r4, r5
+
+    /* Xen code section. */
+    mov_w   r1, __init_begin
+    mov_w   r2, __init_data_begin
+    prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_TEXT_PRBAR
+
+    /* Xen data and BSS section. */
+    mov_w   r1, __init_data_begin
+    mov_w   r2, __bss_end
+    prepare_xen_region r0, r1, r2, r3, r4, r5
+
+#ifdef CONFIG_EARLY_PRINTK
+    /* Xen early UART section. */
+    mov_w   r1, CONFIG_EARLY_UART_BASE_ADDRESS
+    mov_w   r2, (CONFIG_EARLY_UART_BASE_ADDRESS + CONFIG_EARLY_UART_SIZE)
+    prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_DEVICE_PRBAR, attr_prlar=REGION_DEVICE_PRLAR
+#endif
+
+    b    enable_mpu
+END(enable_boot_cpu_mm)
+
+/*
+ * We don't yet support secondary CPUs bring-up. Implement a dummy helper to
+ * please the common code.
+ */
+FUNC(enable_secondary_cpu_mm)
+    PRINT("- SMP not enabled yet -\r\n")
+1:  wfe
+    b 1b
+END(enable_secondary_cpu_mm)
+
+/*
+ * Local variables:
+ * mode: ASM
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/arch/arm/include/asm/arm32/sysregs.h b/xen/arch/arm/include/asm/arm32/sysregs.h
index 22871999af..a90d1610a1 100644
--- a/xen/arch/arm/include/asm/arm32/sysregs.h
+++ b/xen/arch/arm/include/asm/arm32/sysregs.h
@@ -20,6 +20,13 @@
  * uses r0 as a placeholder register. */
 #define CMD_CP32(name...)      "mcr " __stringify(CP32(r0, name)) ";"
 
+#define REGION_TEXT_PRBAR       0x18    /* SH=11 AP=10 XN=0 */
+#define REGION_RO_PRBAR         0x1D    /* SH=11 AP=10 XN=1 */
+#define REGION_DATA_PRBAR       0x19    /* SH=11 AP=00 XN=1 */
+#define REGION_DEVICE_PRBAR     0x11    /* SH=10 AP=00 XN=1 */
+
+#define WRITE_SYSREG_ASM(v, name) mcr CP32(v, name)
+
 #ifndef __ASSEMBLY__
 
 /* C wrappers */
diff --git a/xen/arch/arm/include/asm/cpregs.h b/xen/arch/arm/include/asm/cpregs.h
index aec9e8f329..6019a2cbdd 100644
--- a/xen/arch/arm/include/asm/cpregs.h
+++ b/xen/arch/arm/include/asm/cpregs.h
@@ -1,6 +1,10 @@
 #ifndef __ASM_ARM_CPREGS_H
 #define __ASM_ARM_CPREGS_H
 
+#ifdef CONFIG_MPU
+#include 
+#endif
+
 /*
  * AArch32 Co-processor registers.
  *
diff --git a/xen/arch/arm/include/asm/mpu/cpregs.h b/xen/arch/arm/include/asm/mpu/cpregs.h
new file mode 100644
index 0000000000..6b20c7ceae
--- /dev/null
+++ b/xen/arch/arm/include/asm/mpu/cpregs.h
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef __ASM_ARM_MPU_CPREGS_H
+#define __ASM_ARM_MPU_CPREGS_H
+
+/* CP15 CR0: MPU Type Register */
+#define HMPUIR          p15,4,c0,c0,4
+
+/* CP15 CR6: MPU Protection Region Base/Limit/Select Address Register */
+#define HPRSELR         p15,4,c6,c2,1
+#define PRBAR_EL2       p15,4,c6,c3,0
+#define PRLAR_EL2       p15,4,c6,c8,1
+
+#define MPUIR_EL2       HMPUIR
+#define PRSELR_EL2      HPRSELR
+
+#endif /* __ASM_ARM_MPU_CPREGS_H */
+
+/*
+ * Local variables:
+ * mode: ASM
+ * indent-tabs-mode: nil
+ * End:
+ */
-- 
2.25.1



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From: Ayan Kumar Halder 
To: 
CC: Ayan Kumar Halder , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" 
Subject: [PATCH v5 1/3] xen/arm: Move some of the functions to common file
Date: Mon, 7 Apr 2025 19:44:41 +0100
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Added a new file common.inc to hold the common earlyboot MPU regions
configurations across arm64 and arm32.

prepare_xen_region, fail_insufficient_regions() will be used by both arm32 and
arm64. Thus, they have been moved to common.inc.

*_PRBAR are moved to arm64/sysregs.h.
*_PRLAR are moved to common.inc as they are common between arm32 and arm64.

Introduce WRITE_SYSREG_ASM to write to the system registers from the common asm
file.

Signed-off-by: Ayan Kumar Halder 
---

Changes from

v1 -

1. enable_mpu() now sets HMAIR{0,1} registers. This is similar to what is
being done in enable_mmu(). All the mm related configurations happen in this
function.

2. Fixed some typos.

v2 -
1. Extracted the arm64 head.S functions/macros in a common file.

v3 -
1. Moved *_PRLAR are moved to prepare_xen_region.inc

2. enable_boot_cpu_mm() is preserved in mpu/head.S.

3. STORE_SYSREG is renamed as WRITE_SYSREG_ASM()

4. LOAD_SYSREG is removed.

5. No need to save/restore lr in enable_boot_cpu_mm(). IOW, keep it as it was
in the original code.

v4 - 
1. Rename prepare_xen_region.inc to common.inc

2. enable_secondary_cpu_mm() is moved back to mpu/head.S. 

 xen/arch/arm/arm64/mpu/head.S            | 78 +----------------------
 xen/arch/arm/include/asm/arm64/sysregs.h | 11 ++++
 xen/arch/arm/include/asm/mpu/common.inc  | 79 ++++++++++++++++++++++++
 3 files changed, 91 insertions(+), 77 deletions(-)
 create mode 100644 xen/arch/arm/include/asm/mpu/common.inc

diff --git a/xen/arch/arm/arm64/mpu/head.S b/xen/arch/arm/arm64/mpu/head.S
index ed01993d85..4d76a3166e 100644
--- a/xen/arch/arm/arm64/mpu/head.S
+++ b/xen/arch/arm/arm64/mpu/head.S
@@ -3,83 +3,7 @@
  * Start-of-day code for an Armv8-R MPU system.
  */
 
-#include 
-#include 
-
-/* Backgroud region enable/disable */
-#define SCTLR_ELx_BR    BIT(17, UL)
-
-#define REGION_TEXT_PRBAR       0x38    /* SH=11 AP=10 XN=00 */
-#define REGION_RO_PRBAR         0x3A    /* SH=11 AP=10 XN=10 */
-#define REGION_DATA_PRBAR       0x32    /* SH=11 AP=00 XN=10 */
-#define REGION_DEVICE_PRBAR     0x22    /* SH=10 AP=00 XN=10 */
-
-#define REGION_NORMAL_PRLAR     0x0f    /* NS=0 ATTR=111 EN=1 */
-#define REGION_DEVICE_PRLAR     0x09    /* NS=0 ATTR=100 EN=1 */
-
-/*
- * Macro to prepare and set a EL2 MPU memory region.
- * We will also create an according MPU memory region entry, which
- * is a structure of pr_t,  in table \prmap.
- *
- * sel:         region selector
- * base:        reg storing base address
- * limit:       reg storing limit address
- * prbar:       store computed PRBAR_EL2 value
- * prlar:       store computed PRLAR_EL2 value
- * maxcount:    maximum number of EL2 regions supported
- * attr_prbar:  PRBAR_EL2-related memory attributes. If not specified it will be
- *              REGION_DATA_PRBAR
- * attr_prlar:  PRLAR_EL2-related memory attributes. If not specified it will be
- *              REGION_NORMAL_PRLAR
- *
- * Preserves \maxcount
- * Output:
- *  \sel: Next available region selector index.
- * Clobbers \base, \limit, \prbar, \prlar
- *
- * Note that all parameters using registers should be distinct.
- */
-.macro prepare_xen_region, sel, base, limit, prbar, prlar, maxcount, attr_prbar=REGION_DATA_PRBAR, attr_prlar=REGION_NORMAL_PRLAR
-    /* Check if the region is empty */
-    cmp   \base, \limit
-    beq   1f
-
-    /* Check if the number of regions exceeded the count specified in MPUIR_EL2 */
-    cmp   \sel, \maxcount
-    bge   fail_insufficient_regions
-
-    /* Prepare value for PRBAR_EL2 reg and preserve it in \prbar.*/
-    and   \base, \base, #MPU_REGION_MASK
-    mov   \prbar, #\attr_prbar
-    orr   \prbar, \prbar, \base
-
-    /* Limit address should be inclusive */
-    sub   \limit, \limit, #1
-    and   \limit, \limit, #MPU_REGION_MASK
-    mov   \prlar, #\attr_prlar
-    orr   \prlar, \prlar, \limit
-
-    msr   PRSELR_EL2, \sel
-    isb
-    msr   PRBAR_EL2, \prbar
-    msr   PRLAR_EL2, \prlar
-    dsb   sy
-    isb
-
-    add   \sel, \sel, #1
-
-1:
-.endm
-
-/*
- * Failure caused due to insufficient MPU regions.
- */
-FUNC_LOCAL(fail_insufficient_regions)
-    PRINT("- Selected MPU region is above the implemented number in MPUIR_EL2 -\r\n")
-1:  wfe
-    b   1b
-END(fail_insufficient_regions)
+#include 
 
 /*
  * Enable EL2 MPU and data cache
diff --git a/xen/arch/arm/include/asm/arm64/sysregs.h b/xen/arch/arm/include/asm/arm64/sysregs.h
index b593e4028b..3ee3715430 100644
--- a/xen/arch/arm/include/asm/arm64/sysregs.h
+++ b/xen/arch/arm/include/asm/arm64/sysregs.h
@@ -462,6 +462,15 @@
 #define ZCR_ELx_LEN_SIZE             9
 #define ZCR_ELx_LEN_MASK             0x1ff
 
+#define REGION_TEXT_PRBAR       0x38    /* SH=11 AP=10 XN=00 */
+#define REGION_RO_PRBAR         0x3A    /* SH=11 AP=10 XN=10 */
+#define REGION_DATA_PRBAR       0x32    /* SH=11 AP=00 XN=10 */
+#define REGION_DEVICE_PRBAR     0x22    /* SH=10 AP=00 XN=10 */
+
+#define WRITE_SYSREG_ASM(v, name) "msr " __stringify(name,) #v;
+
+#ifndef __ASSEMBLY__
+
 /* Access to system registers */
 
 #define WRITE_SYSREG64(v, name) do {                    \
@@ -481,6 +490,8 @@
 #define WRITE_SYSREG_LR(v, index)  WRITE_SYSREG(v, ICH_LR_REG(index))
 #define READ_SYSREG_LR(index)      READ_SYSREG(ICH_LR_REG(index))
 
+#endif /* __ASSEMBLY__ */
+
 #endif /* _ASM_ARM_ARM64_SYSREGS_H */
 
 /*
diff --git a/xen/arch/arm/include/asm/mpu/common.inc b/xen/arch/arm/include/asm/mpu/common.inc
new file mode 100644
index 0000000000..47868a1526
--- /dev/null
+++ b/xen/arch/arm/include/asm/mpu/common.inc
@@ -0,0 +1,79 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include 
+#include 
+
+/* Backgroud region enable/disable */
+#define SCTLR_ELx_BR    BIT(17, UL)
+
+#define REGION_NORMAL_PRLAR     0x0f    /* NS=0 ATTR=111 EN=1 */
+#define REGION_DEVICE_PRLAR     0x09    /* NS=0 ATTR=100 EN=1 */
+
+/*
+ * Macro to prepare and set a EL2 MPU memory region.
+ * We will also create an according MPU memory region entry, which
+ * is a structure of pr_t,  in table \prmap.
+ *
+ * sel:         region selector
+ * base:        reg storing base address
+ * limit:       reg storing limit address
+ * prbar:       store computed PRBAR_EL2 value
+ * prlar:       store computed PRLAR_EL2 value
+ * maxcount:    maximum number of EL2 regions supported
+ * attr_prbar:  PRBAR_EL2-related memory attributes. If not specified it will be
+ *              REGION_DATA_PRBAR
+ * attr_prlar:  PRLAR_EL2-related memory attributes. If not specified it will be
+ *              REGION_NORMAL_PRLAR
+ *
+ * Preserves maxcount
+ * Output:
+ *  sel: Next available region selector index.
+ * Clobbers base, limit, prbar, prlar
+ *
+ * Note that all parameters using registers should be distinct.
+ */
+.macro prepare_xen_region, sel, base, limit, prbar, prlar, maxcount, attr_prbar=REGION_DATA_PRBAR, attr_prlar=REGION_NORMAL_PRLAR
+    /* Check if the region is empty */
+    cmp   \base, \limit
+    beq   1f
+
+    /* Check if the number of regions exceeded the count specified in MPUIR_EL2 */
+    cmp   \sel, \maxcount
+    bge   fail_insufficient_regions
+
+    /* Prepare value for PRBAR_EL2 reg and preserve it in \prbar.*/
+    and   \base, \base, #MPU_REGION_MASK
+    mov   \prbar, #\attr_prbar
+    orr   \prbar, \prbar, \base
+
+    /* Limit address should be inclusive */
+    sub   \limit, \limit, #1
+    and   \limit, \limit, #MPU_REGION_MASK
+    mov   \prlar, #\attr_prlar
+    orr   \prlar, \prlar, \limit
+
+    WRITE_SYSREG_ASM(\sel, PRSELR_EL2)
+    isb
+    WRITE_SYSREG_ASM(\prbar, PRBAR_EL2)
+    WRITE_SYSREG_ASM(\prlar, PRLAR_EL2)
+    dsb   sy
+    isb
+
+    add   \sel, \sel, #1
+
+1:
+.endm
+
+/* Failure caused due to insufficient MPU regions. */
+FUNC_LOCAL(fail_insufficient_regions)
+    PRINT("- Selected MPU region is above the implemented number in MPUIR_EL2 -\r\n")
+1:  wfe
+    b   1b
+END(fail_insufficient_regions)
+
+/*
+ * Local variables:
+ * mode: ASM
+ * indent-tabs-mode: nil
+ * End:
+ */
-- 
2.25.1



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From: Ayan Kumar Halder 
To: 
CC: Ayan Kumar Halder , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" 
Subject: [PATCH v5 3/3] xen/arm32: mpu: Stubs to build MPU for arm32
Date: Mon, 7 Apr 2025 19:44:43 +0100
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Add stubs to enable compilation

Signed-off-by: Ayan Kumar Halder 
---
Changes from :-

v1, v2 -
1. New patch introduced in v3.
2. Should be applied on top of
https://patchwork.kernel.org/project/xen-devel/cover/20250316192445.2376484-1-luca.fancellu@arm.com/

v3 -
1. Add stubs for map_domain_page() and similar functions.

2. 'BUG_ON("unimplemented")' is kept in all the stubs.

v4 - 
1. is_xen_heap_mfn() macros are defined across mpu/mm.h (ARM32 specific)
, mmu/mm.h (ARM32 specific) and asm/mm.h (ARM64 specific)

2. s/(void*)0/NULL

 xen/arch/arm/arm32/mpu/Makefile   |  2 ++
 xen/arch/arm/arm32/mpu/p2m.c      | 18 ++++++++++++++
 xen/arch/arm/arm32/mpu/smpboot.c  | 23 +++++++++++++++++
 xen/arch/arm/include/asm/mm.h     |  9 +------
 xen/arch/arm/include/asm/mmu/mm.h |  9 +++++++
 xen/arch/arm/include/asm/mpu/mm.h |  5 ++++
 xen/arch/arm/mpu/Makefile         |  1 +
 xen/arch/arm/mpu/domain_page.c    | 41 +++++++++++++++++++++++++++++++
 8 files changed, 100 insertions(+), 8 deletions(-)
 create mode 100644 xen/arch/arm/arm32/mpu/p2m.c
 create mode 100644 xen/arch/arm/arm32/mpu/smpboot.c
 create mode 100644 xen/arch/arm/mpu/domain_page.c

diff --git a/xen/arch/arm/arm32/mpu/Makefile b/xen/arch/arm/arm32/mpu/Makefile
index 3340058c08..38797f28af 100644
--- a/xen/arch/arm/arm32/mpu/Makefile
+++ b/xen/arch/arm/arm32/mpu/Makefile
@@ -1 +1,3 @@
 obj-y += head.o
+obj-y += smpboot.o
+obj-y += p2m.o
diff --git a/xen/arch/arm/arm32/mpu/p2m.c b/xen/arch/arm/arm32/mpu/p2m.c
new file mode 100644
index 0000000000..df8de5c7d8
--- /dev/null
+++ b/xen/arch/arm/arm32/mpu/p2m.c
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include 
+#include 
+
+void __init setup_virt_paging(void)
+{
+    BUG_ON("unimplemented");
+}
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/arch/arm/arm32/mpu/smpboot.c b/xen/arch/arm/arm32/mpu/smpboot.c
new file mode 100644
index 0000000000..3f3e54294e
--- /dev/null
+++ b/xen/arch/arm/arm32/mpu/smpboot.c
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include 
+
+int prepare_secondary_mm(int cpu)
+{
+    BUG_ON("unimplemented");
+    return -EINVAL;
+}
+
+void update_boot_mapping(bool enable)
+{
+    BUG_ON("unimplemented");
+}
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h
index fbffaccef4..5b67c0f8bb 100644
--- a/xen/arch/arm/include/asm/mm.h
+++ b/xen/arch/arm/include/asm/mm.h
@@ -170,14 +170,7 @@ struct page_info
 #define _PGC_need_scrub   _PGC_allocated
 #define PGC_need_scrub    PGC_allocated
 
-#ifdef CONFIG_ARM_32
-#define is_xen_heap_page(page) is_xen_heap_mfn(page_to_mfn(page))
-#define is_xen_heap_mfn(mfn) ({                                 \
-    unsigned long mfn_ = mfn_x(mfn);                            \
-    (mfn_ >= mfn_x(directmap_mfn_start) &&                      \
-     mfn_ < mfn_x(directmap_mfn_end));                          \
-})
-#else
+#ifdef CONFIG_ARM_64
 #define is_xen_heap_page(page) ((page)->count_info & PGC_xen_heap)
 #define is_xen_heap_mfn(mfn) \
     (mfn_valid(mfn) && is_xen_heap_page(mfn_to_page(mfn)))
diff --git a/xen/arch/arm/include/asm/mmu/mm.h b/xen/arch/arm/include/asm/mmu/mm.h
index caba987edc..9b98d12b07 100644
--- a/xen/arch/arm/include/asm/mmu/mm.h
+++ b/xen/arch/arm/include/asm/mmu/mm.h
@@ -21,6 +21,15 @@ extern unsigned long directmap_base_pdx;
 
 #define frame_table ((struct page_info *)FRAMETABLE_VIRT_START)
 
+#ifdef CONFIG_ARM_32
+#define is_xen_heap_page(page) is_xen_heap_mfn(page_to_mfn(page))
+#define is_xen_heap_mfn(mfn) ({                                 \
+    unsigned long mfn_ = mfn_x(mfn);                            \
+    (mfn_ >= mfn_x(directmap_mfn_start) &&                      \
+     mfn_ < mfn_x(directmap_mfn_end));                          \
+})
+#endif
+
 #define virt_to_maddr(va) ({                                                   \
     vaddr_t va_ = (vaddr_t)(va);                                               \
     (paddr_t)((va_to_par(va_) & PADDR_MASK & PAGE_MASK) | (va_ & ~PAGE_MASK)); \
diff --git a/xen/arch/arm/include/asm/mpu/mm.h b/xen/arch/arm/include/asm/mpu/mm.h
index 86f33d9836..bfd840fa5d 100644
--- a/xen/arch/arm/include/asm/mpu/mm.h
+++ b/xen/arch/arm/include/asm/mpu/mm.h
@@ -13,6 +13,11 @@ extern struct page_info *frame_table;
 
 #define virt_to_maddr(va) ((paddr_t)((vaddr_t)(va) & PADDR_MASK))
 
+#ifdef CONFIG_ARM_32
+#define is_xen_heap_page(page) ({ BUG_ON("unimplemented"); false; })
+#define is_xen_heap_mfn(mfn) ({ BUG_ON("unimplemented"); false; })
+#endif
+
 /* On MPU systems there is no translation, ma == va. */
 static inline void *maddr_to_virt(paddr_t ma)
 {
diff --git a/xen/arch/arm/mpu/Makefile b/xen/arch/arm/mpu/Makefile
index 21bbc517b5..ff221011d5 100644
--- a/xen/arch/arm/mpu/Makefile
+++ b/xen/arch/arm/mpu/Makefile
@@ -2,3 +2,4 @@ obj-y += mm.o
 obj-y += p2m.o
 obj-y += setup.init.o
 obj-y += vmap.o
+obj-$(CONFIG_ARM_32) += domain_page.o
diff --git a/xen/arch/arm/mpu/domain_page.c b/xen/arch/arm/mpu/domain_page.c
new file mode 100644
index 0000000000..8859b24e04
--- /dev/null
+++ b/xen/arch/arm/mpu/domain_page.c
@@ -0,0 +1,41 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+#include 
+
+void *map_domain_page_global(mfn_t mfn)
+{
+    BUG_ON("unimplemented");
+    return NULL;
+}
+
+/* Map a page of domheap memory */
+void *map_domain_page(mfn_t mfn)
+{
+    BUG_ON("unimplemented");
+    return NULL;
+}
+
+/* Release a mapping taken with map_domain_page() */
+void unmap_domain_page(const void *ptr)
+{
+    BUG_ON("unimplemented");
+}
+
+mfn_t domain_page_map_to_mfn(const void *ptr)
+{
+    BUG_ON("unimplemented");
+    return INVALID_MFN;
+}
+
+void unmap_domain_page_global(const void *va)
+{
+    BUG_ON("unimplemented");
+}
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
-- 
2.25.1



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	,
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 Kozlowski ,
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Subject: [PATCH v5 0/5] Switch more ARM plats to sys-off handler API
Date: Mon, 7 Apr 2025 13:56:45 -0500
Message-ID: <20250407185650.411887-1-afd@ti.com>
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Hello all,

Continuing the quest to remove the legacy pm_power_off() global
function handler. Remove uses from arch/arm/ using the helper
register_platform_power_off().

These have been sent for several cycles without feedback, not
sure if there are anymore active platform maintainers who
can take these individually, maybe these remaining could
go in directly though the arm-soc tree?

Thanks,
Andrew

Changes for v5:
 - Rebase on v6.15-rc1

Changes for v4:
 - Drop already taken patches
 - Rebase on latest master

Changes for v3:
 - Rebase on v6.12-rc1

Changes for v2:
 - Collect Reviewed/Acked-bys
 - Rebase on v6.11-rc1

Andrew Davis (5):
  ARM: highbank: Switch to new sys-off handler API
  ARM: pxa: Switch to new sys-off handler API
  ARM: sa1100: Switch to new sys-off handler API
  ARM: vt8500: Switch to new sys-off handler API
  arm/xen: Switch to new sys-off handler API

 arch/arm/mach-highbank/highbank.c | 2 +-
 arch/arm/mach-pxa/spitz.c         | 2 +-
 arch/arm/mach-sa1100/generic.c    | 2 +-
 arch/arm/mach-vt8500/vt8500.c     | 2 +-
 arch/arm/xen/enlighten.c          | 2 +-
 5 files changed, 5 insertions(+), 5 deletions(-)

-- 
2.39.2



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From: Andrew Davis 
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        Robert Jarzmik
	,
        Alexey Charkov ,
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 Kozlowski ,
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CC: , ,
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Subject: [PATCH v5 1/5] ARM: highbank: Switch to new sys-off handler API
Date: Mon, 7 Apr 2025 13:56:46 -0500
Message-ID: <20250407185650.411887-2-afd@ti.com>
X-Mailer: git-send-email 2.39.2
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Kernel now supports chained power-off handlers. Use
register_platform_power_off() that registers a platform level power-off
handler. Legacy pm_power_off() will be removed once all drivers and archs
are converted to the new sys-off API.

Signed-off-by: Andrew Davis 
Reviewed-by: Andre Przywara 
---
 arch/arm/mach-highbank/highbank.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index 5d4f977ac7d2a..47335c7dadf8d 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -143,7 +143,7 @@ static void __init highbank_init(void)
 	sregs_base = of_iomap(np, 0);
 	WARN_ON(!sregs_base);
 
-	pm_power_off = highbank_power_off;
+	register_platform_power_off(highbank_power_off);
 	highbank_pm_init();
 
 	bus_register_notifier(&platform_bus_type, &highbank_platform_nb);
-- 
2.39.2



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 Kozlowski ,
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CC: , ,
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Subject: [PATCH v5 2/5] ARM: pxa: Switch to new sys-off handler API
Date: Mon, 7 Apr 2025 13:56:47 -0500
Message-ID: <20250407185650.411887-3-afd@ti.com>
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Kernel now supports chained power-off handlers. Use
register_platform_power_off() that registers a platform level power-off
handler. Legacy pm_power_off() will be removed once all drivers and archs
are converted to the new sys-off API.

Signed-off-by: Andrew Davis 
---
 arch/arm/mach-pxa/spitz.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 33533e35720f8..c0b1f7e6be874 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -1096,7 +1096,7 @@ static void __init spitz_init(void)
 		software_node_register(&spitz_scoop_2_gpiochip_node);
 
 	init_gpio_reset(SPITZ_GPIO_ON_RESET, 1, 0);
-	pm_power_off = spitz_poweroff;
+	register_platform_power_off(spitz_poweroff);
 
 	PMCR = 0x00;
 
-- 
2.39.2



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From: Andrew Davis 
To: Arnd Bergmann , Andre Przywara ,
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        Haojian Zhuang ,
        Robert Jarzmik
	,
        Alexey Charkov ,
        Krzysztof
 Kozlowski ,
        Stefano Stabellini 
CC: , ,
        , Andrew Davis 
Subject: [PATCH v5 3/5] ARM: sa1100: Switch to new sys-off handler API
Date: Mon, 7 Apr 2025 13:56:48 -0500
Message-ID: <20250407185650.411887-4-afd@ti.com>
X-Mailer: git-send-email 2.39.2
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Kernel now supports chained power-off handlers. Use
register_platform_power_off() that registers a platform level power-off
handler. Legacy pm_power_off() will be removed once all drivers and archs
are converted to the new sys-off API.

Signed-off-by: Andrew Davis 
---
 arch/arm/mach-sa1100/generic.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index 0c586047d130f..5383a26f51169 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -298,7 +298,7 @@ static struct platform_device *sa11x0_devices[] __initdata = {
 static int __init sa1100_init(void)
 {
 	struct resource wdt_res = DEFINE_RES_MEM(0x90000000, 0x20);
-	pm_power_off = sa1100_power_off;
+	register_platform_power_off(sa1100_power_off);
 
 	regulator_has_full_constraints();
 
-- 
2.39.2



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        Russell King , Daniel Mack ,
        Haojian Zhuang ,
        Robert Jarzmik
	,
        Alexey Charkov ,
        Krzysztof
 Kozlowski ,
        Stefano Stabellini 
CC: , ,
        , Andrew Davis 
Subject: [PATCH v5 4/5] ARM: vt8500: Switch to new sys-off handler API
Date: Mon, 7 Apr 2025 13:56:49 -0500
Message-ID: <20250407185650.411887-5-afd@ti.com>
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Kernel now supports chained power-off handlers. Use
register_platform_power_off() that registers a platform level power-off
handler. Legacy pm_power_off() will be removed once all drivers and archs
are converted to the new sys-off API.

Signed-off-by: Andrew Davis 
Acked-by: Alexey Charkov 
---
 arch/arm/mach-vt8500/vt8500.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-vt8500/vt8500.c b/arch/arm/mach-vt8500/vt8500.c
index 0ab40087ae1cc..1d294255d7083 100644
--- a/arch/arm/mach-vt8500/vt8500.c
+++ b/arch/arm/mach-vt8500/vt8500.c
@@ -141,7 +141,7 @@ static void __init vt8500_init(void)
 			pr_err("%s:ioremap(power_off) failed\n", __func__);
 	}
 	if (pmc_base)
-		pm_power_off = &vt8500_power_off;
+		register_platform_power_off(vt8500_power_off);
 	else
 		pr_err("%s: PMC Hibernation register could not be remapped, not enabling power off!\n", __func__);
 }
-- 
2.39.2



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 Kozlowski ,
        Stefano Stabellini 
CC: , ,
        , Andrew Davis 
Subject: [PATCH v5 5/5] arm/xen: Switch to new sys-off handler API
Date: Mon, 7 Apr 2025 13:56:50 -0500
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Kernel now supports chained power-off handlers. Use
register_platform_power_off() that registers a platform level power-off
handler. Legacy pm_power_off() will be removed once all drivers and archs
are converted to the new sys-off API.

Signed-off-by: Andrew Davis 
---
 arch/arm/xen/enlighten.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/xen/enlighten.c b/arch/arm/xen/enlighten.c
index a395b6c0aae2a..8655bc3d36347 100644
--- a/arch/arm/xen/enlighten.c
+++ b/arch/arm/xen/enlighten.c
@@ -541,7 +541,7 @@ static int __init xen_late_init(void)
 	if (!xen_domain())
 		return -ENODEV;
 
-	pm_power_off = xen_power_off;
+	register_platform_power_off(xen_power_off);
 	register_restart_handler(&xen_restart_nb);
 	if (!xen_initial_domain()) {
 		struct timespec64 ts;
-- 
2.39.2



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Date: Mon, 07 Apr 2025 21:02:15 +0200
From: "Arnd Bergmann" 
To: "Andrew Davis" , "Andre Przywara" ,
 "Russell King" , "Daniel Mack" ,
 "Haojian Zhuang" ,
 "Robert Jarzmik" ,
 "Alexey Charkov" ,
 "Krzysztof Kozlowski" ,
 "Stefano Stabellini" 
Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
 xen-devel@lists.xenproject.org
Message-Id: 
In-Reply-To: <20250407185650.411887-1-afd@ti.com>
References: <20250407185650.411887-1-afd@ti.com>
Subject: Re: [PATCH v5 0/5] Switch more ARM plats to sys-off handler API
Content-Type: text/plain
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On Mon, Apr 7, 2025, at 20:56, Andrew Davis wrote:
> Hello all,
>
> Continuing the quest to remove the legacy pm_power_off() global
> function handler. Remove uses from arch/arm/ using the helper
> register_platform_power_off().
>
> These have been sent for several cycles without feedback, not
> sure if there are anymore active platform maintainers who
> can take these individually, maybe these remaining could
> go in directly though the arm-soc tree?

Sure, can you send them to soc@lists.linux.dev in a few
days, with any final Acks you may get? That way it ends up
in patchwork and I can trivially pick them up.

Since it's only a few one-line changes that all do the
same thing, you can also combine them into a single patch.

     Arnd


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	, Jason Andryuk ,
	Anthony PERARD , Juergen Gross 
Subject: [PATCH] tools/libxl: Skip invalid IRQs
Date: Mon, 7 Apr 2025 15:26:41 -0400
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A PCI device's irq field is an 8-bit number.  A value of 0xff indicates
that the device is not connected.  Additionally, the Linux ACPI code can
convert these 0xff values to IRQ_NOTCONNECTED(0x80000000) because
"0x80000000 is guaranteed to be outside the available range of
interrupts and easy to distinguish from other possible incorrect
values."  When the hypercall to assign that IRQ fails, device
passthrough as a whole fails.

Add checking for a valid IRQ and skip the IRQ handling for PCI devices
outside that range.  This allows for passthrough of devices without
legacy IRQs.

Signed-off-by: Jason Andryuk 
---
 tools/libs/light/libxl_pci.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/tools/libs/light/libxl_pci.c b/tools/libs/light/libxl_pci.c
index 1647fd6f47..e0c8866792 100644
--- a/tools/libs/light/libxl_pci.c
+++ b/tools/libs/light/libxl_pci.c
@@ -26,6 +26,9 @@
 #define PCI_BDF_XSPATH         "%04x-%02x-%02x-%01x"
 #define PCI_PT_QDEV_ID         "pci-pt-%02x_%02x.%01x"
 
+/* PCI Interrupt Line is an 8-bit value, 0xff means disconnected. */
+#define PCI_IRQ_LINE_LIMIT     0xff
+
 static unsigned int pci_encode_bdf(libxl_device_pci *pci)
 {
     unsigned int value;
@@ -1495,7 +1498,8 @@ static void pci_add_dm_done(libxl__egc *egc,
             LOGED(ERROR, domainid, "Couldn't open %s", sysfs_path);
             goto out_no_irq;
         }
-        if ((fscanf(f, "%u", &irq) == 1) && irq) {
+        if ((fscanf(f, "%u", &irq) == 1) &&
+            irq > 0 && irq < PCI_IRQ_LINE_LIMIT) {
             r = xc_physdev_map_pirq(ctx->xch, domid, irq, &irq);
             if (r < 0) {
                 LOGED(ERROR, domainid, "xc_physdev_map_pirq irq=%d (error=%d)",
@@ -2257,7 +2261,8 @@ skip_bar:
             goto skip_legacy_irq;
         }
 
-        if ((fscanf(f, "%u", &irq) == 1) && irq) {
+        if ((fscanf(f, "%u", &irq) == 1) &&
+            irq > 0 && irq < PCI_IRQ_LINE_LIMIT) {
             rc = xc_physdev_unmap_pirq(ctx->xch, domid, irq);
             if (rc < 0) {
                 /*
-- 
2.49.0



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From: Jason Andryuk 
To: 
CC: "Daniel P. Smith" , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" , Andrew Cooper
	, Anthony PERARD , "Jan
 Beulich" , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Jason Andryuk 
Subject: [PATCH v4 1/7] xen: introduce hardware domain create flag
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From: "Daniel P. Smith" 

Add and use a new internal create domain flag to specify the hardware
domain.  This removes the hardcoding of domid 0 as the hardware domain.

This allows more flexibility with domain creation.

The assignment of d->cdf is moved later so CDF_hardware is added for the
late_hwdom case.  Also old_hwdom has the flag removed to reflect the
change.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Jason Andryuk 
---
v4:
Move d->cdf assignment later
Remove Jan's R-b

v3:
Or-in CDF_hardware for late hwdom case
Add Jan's R-b

v2:
() around binary &
Only allow late_hwdom for dom0
---
 xen/arch/arm/domain_build.c |  2 +-
 xen/arch/x86/setup.c        |  3 ++-
 xen/common/domain.c         | 15 +++++++++++----
 xen/include/xen/domain.h    |  2 ++
 4 files changed, 16 insertions(+), 6 deletions(-)

diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
index 634333cdde..b8f282ff10 100644
--- a/xen/arch/arm/domain_build.c
+++ b/xen/arch/arm/domain_build.c
@@ -2369,7 +2369,7 @@ void __init create_dom0(void)
         .max_maptrack_frames = -1,
         .grant_opts = XEN_DOMCTL_GRANT_version(opt_gnttab_max_version),
     };
-    unsigned int flags = CDF_privileged;
+    unsigned int flags = CDF_privileged | CDF_hardware;
     int rc;
 
     /* The vGIC for DOM0 is exactly emulating the hardware GIC */
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index d70abb7e0c..67d399c469 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -1018,7 +1018,8 @@ static struct domain *__init create_dom0(struct boot_info *bi)
 
     /* Create initial domain.  Not d0 for pvshim. */
     domid = get_initial_domain_id();
-    d = domain_create(domid, &dom0_cfg, pv_shim ? 0 : CDF_privileged);
+    d = domain_create(domid, &dom0_cfg,
+                      pv_shim ? 0 : CDF_privileged | CDF_hardware);
     if ( IS_ERR(d) )
         panic("Error creating d%u: %ld\n", domid, PTR_ERR(d));
 
diff --git a/xen/common/domain.c b/xen/common/domain.c
index 585fd726a9..116ac183cd 100644
--- a/xen/common/domain.c
+++ b/xen/common/domain.c
@@ -804,9 +804,6 @@ struct domain *domain_create(domid_t domid,
     d->domain_id = domid;
     d->unique_id = get_unique_id();
 
-    /* Holding CDF_* internal flags. */
-    d->cdf = flags;
-
     /* Debug sanity. */
     ASSERT(is_system_domain(d) ? config == NULL : config != NULL);
 
@@ -820,15 +817,25 @@ struct domain *domain_create(domid_t domid,
     d->is_privileged = flags & CDF_privileged;
 
     /* Sort out our idea of is_hardware_domain(). */
-    if ( domid == 0 || domid == hardware_domid )
+    if ( (flags & CDF_hardware) || domid == hardware_domid )
     {
         if ( hardware_domid < 0 || hardware_domid >= DOMID_FIRST_RESERVED )
             panic("The value of hardware_dom must be a valid domain ID\n");
 
+        /* late_hwdom is only allowed for dom0. */
+        if ( hardware_domain && hardware_domain->domain_id )
+            return ERR_PTR(-EINVAL);
+
         old_hwdom = hardware_domain;
         hardware_domain = d;
+        flags |= CDF_hardware;
+        if ( old_hwdom )
+            old_hwdom->cdf &= ~CDF_hardware;
     }
 
+    /* Holding CDF_* internal flags. */
+    d->cdf = flags;
+
     TRACE_TIME(TRC_DOM0_DOM_ADD, d->domain_id);
 
     lock_profile_register_struct(LOCKPROF_TYPE_PERDOM, d, domid);
diff --git a/xen/include/xen/domain.h b/xen/include/xen/domain.h
index a34daa7d10..e10baf2615 100644
--- a/xen/include/xen/domain.h
+++ b/xen/include/xen/domain.h
@@ -53,6 +53,8 @@ domid_t get_initial_domain_id(void);
 #else
 #define CDF_staticmem            0
 #endif
+/* This is the hardware domain.  Only 1 allowed. */
+#define CDF_hardware             (1U << 3)
 
 #define is_domain_direct_mapped(d) ((d)->cdf & CDF_directmap)
 #define is_domain_using_staticmem(d) ((d)->cdf & CDF_staticmem)
-- 
2.49.0



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From: Jason Andryuk 
To: 
CC: Jason Andryuk , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" , Andrew Cooper
	, Anthony PERARD , "Jan
 Beulich" , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	
Subject: [PATCH v4 0/7] ARM split hardware and control domains
Date: Mon, 7 Apr 2025 15:40:31 -0400
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This series implements separation of dom0 into separate hardware and
control domains.  It uses the capabilities idea from Hyperlaunch -
hardware, control, and xenstore.  It's been tested with dom1 as
control, dom2 as a domU, and dom3 as hardware and xenstore.

To keep things more managable, this v4 is only the ARM hypervisor changes,
and one associated init-dom0less change.  The series is slightly
re-ordered to move xenstore changes ahead of adding the capabilities.

"xen/arm: dom0less use has_dtb local variable" is a new patch to
slightly simplify "xen/arm: Add capabilities to dom0less".

Setting hardware domain as domid 0 is removed.

I've been unable to run a combined control/xenstore.  Linux console
output stops shortly after the domain determines it should be XS_LOCAL.
I have not investigated further.

Daniel P. Smith (1):
  xen: introduce hardware domain create flag

Jason Andryuk (6):
  xen/arm: dom0less hwdom construction
  xen/arm: dom0less delay xenstore initialization
  xen/arm: dom0less seed xenstore grant table entry
  tools/init-dom0less: Only seed legacy xenstore grants
  xen/arm: dom0less use has_dtb local variable
  xen/arm: Add capabilities to dom0less

 docs/misc/arm/device-tree/booting.txt     |  11 ++
 tools/helpers/init-dom0less.c             |  10 +-
 xen/arch/arm/dom0less-build.c             | 197 ++++++++++++++++------
 xen/arch/arm/domain.c                     |   3 +-
 xen/arch/arm/domain_build.c               |  11 +-
 xen/arch/arm/include/asm/dom0less-build.h |   2 +
 xen/arch/arm/include/asm/domain_build.h   |   3 +-
 xen/arch/x86/setup.c                      |   3 +-
 xen/common/domain.c                       |  15 +-
 xen/common/grant_table.c                  |  14 ++
 xen/include/public/bootfdt.h              |  31 ++++
 xen/include/xen/domain.h                  |   2 +
 xen/include/xen/grant_table.h             |   4 +
 xen/include/xen/types.h                   |   1 +
 14 files changed, 243 insertions(+), 64 deletions(-)
 create mode 100644 xen/include/public/bootfdt.h

-- 
2.49.0



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From: Jason Andryuk 
To: 
CC: Jason Andryuk , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" 
Subject: [PATCH v4 2/7] xen/arm: dom0less hwdom construction
Date: Mon, 7 Apr 2025 15:40:33 -0400
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When creating a hardware domain, have the dom0less code call
construct_hwdom() which is shared with the dom0 code.  The hardware
domain requires building that best matches the dom0 build path.  Re-use
it to keep them in sync.

The device tree node of the dom0less config is now passed into
construct_hwdom().  dom0 uses /chosen for process_shm while a hwdom will
use the value from its dom0less device tree node.

Signed-off-by: Jason Andryuk 
---
v3:
Rebase on process_shm_chosen() removal
---
 xen/arch/arm/dom0less-build.c           | 57 ++++++++++++++-----------
 xen/arch/arm/domain_build.c             |  7 +--
 xen/arch/arm/include/asm/domain_build.h |  3 +-
 3 files changed, 39 insertions(+), 28 deletions(-)

diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c
index bd15563750..7bc6a6c4d7 100644
--- a/xen/arch/arm/dom0less-build.c
+++ b/xen/arch/arm/dom0less-build.c
@@ -929,36 +929,45 @@ static int __init construct_domU(struct domain *d,
     /* type must be set before allocate memory */
     d->arch.type = kinfo.type;
 #endif
-    if ( !dt_find_property(node, "xen,static-mem", NULL) )
-        allocate_memory(d, &kinfo);
-    else if ( !is_domain_direct_mapped(d) )
-        allocate_static_memory(d, &kinfo, node);
-    else
-        assign_static_memory_11(d, &kinfo, node);
-
-    rc = process_shm(d, &kinfo, node);
-    if ( rc < 0 )
-        return rc;
-
-    /*
-     * Base address and irq number are needed when creating vpl011 device
-     * tree node in prepare_dtb_domU, so initialization on related variables
-     * shall be done first.
-     */
-    if ( kinfo.vpl011 )
+    if ( is_hardware_domain(d) )
     {
-        rc = domain_vpl011_init(d, NULL);
+        rc = construct_hwdom(&kinfo, node);
         if ( rc < 0 )
             return rc;
     }
+    else
+    {
+        if ( !dt_find_property(node, "xen,static-mem", NULL) )
+            allocate_memory(d, &kinfo);
+        else if ( !is_domain_direct_mapped(d) )
+            allocate_static_memory(d, &kinfo, node);
+        else
+            assign_static_memory_11(d, &kinfo, node);
 
-    rc = prepare_dtb_domU(d, &kinfo);
-    if ( rc < 0 )
-        return rc;
+        rc = process_shm(d, &kinfo, node);
+        if ( rc < 0 )
+            return rc;
 
-    rc = construct_domain(d, &kinfo);
-    if ( rc < 0 )
-        return rc;
+        /*
+         * Base address and irq number are needed when creating vpl011 device
+         * tree node in prepare_dtb_domU, so initialization on related variables
+         * shall be done first.
+         */
+        if ( kinfo.vpl011 )
+        {
+            rc = domain_vpl011_init(d, NULL);
+            if ( rc < 0 )
+                return rc;
+        }
+
+        rc = prepare_dtb_domU(d, &kinfo);
+        if ( rc < 0 )
+            return rc;
+
+        rc = construct_domain(d, &kinfo);
+        if ( rc < 0 )
+            return rc;
+    }
 
     domain_vcpu_affinity(d, node);
 
diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
index b8f282ff10..0a329f9f5e 100644
--- a/xen/arch/arm/domain_build.c
+++ b/xen/arch/arm/domain_build.c
@@ -2305,10 +2305,11 @@ static int __init construct_dom0(struct domain *d)
     if ( rc < 0 )
         return rc;
 
-    return construct_hwdom(&kinfo);
+    return construct_hwdom(&kinfo, NULL);
 }
 
-int __init construct_hwdom(struct kernel_info *kinfo)
+int __init construct_hwdom(struct kernel_info *kinfo,
+                           const struct dt_device_node *node)
 {
     struct domain *d = kinfo->d;
     int rc;
@@ -2327,7 +2328,7 @@ int __init construct_hwdom(struct kernel_info *kinfo)
 
     if ( acpi_disabled )
     {
-        rc = process_shm(d, kinfo, NULL);
+        rc = process_shm(d, kinfo, node);
         if ( rc < 0 )
             return rc;
     }
diff --git a/xen/arch/arm/include/asm/domain_build.h b/xen/arch/arm/include/asm/domain_build.h
index 134290853c..17619c875d 100644
--- a/xen/arch/arm/include/asm/domain_build.h
+++ b/xen/arch/arm/include/asm/domain_build.h
@@ -13,7 +13,8 @@ bool allocate_bank_memory(struct kernel_info *kinfo, gfn_t sgfn,
                           paddr_t tot_size);
 void allocate_memory(struct domain *d, struct kernel_info *kinfo);
 int construct_domain(struct domain *d, struct kernel_info *kinfo);
-int construct_hwdom(struct kernel_info *kinfo);
+int construct_hwdom(struct kernel_info *kinfo,
+                    const struct dt_device_node *node);
 int domain_fdt_begin_node(void *fdt, const char *name, uint64_t unit);
 int make_chosen_node(const struct kernel_info *kinfo);
 int make_cpus_node(const struct domain *d, void *fdt);
-- 
2.49.0



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From: Jason Andryuk 
To: 
CC: Jason Andryuk , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" 
Subject: [PATCH v4 3/7] xen/arm: dom0less delay xenstore initialization
Date: Mon, 7 Apr 2025 15:40:34 -0400
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To allocate the xenstore event channel and initialize the grant table
entry, the xenstore domid is neeed.  A dom0 is created before the domUs,
so it is normally available through hardware_domain.  With capabilities
and dom0less, the xenstore domain may not be created first.

Keep the population of the page and HVM_PARAM_STORE_PFN in the normal
domain construction, but delay event channel creation and grant seeding
to after all domUs are created.  HVM_PARAM_STORE_PFN now serves as
indication to setup xenstore since the device tree is no longer
immediately available.  0 means no xenstore.  ~0ULL means legacy so only
the event channel needs setup, and any other value means to seed the
page.

dom0 needs to set xs_domid when it is serving as the xenstore domain.

The domain running xenstored needs to be the handler for VIRQ_DOM_EXC,
so set that as well - it otherwise defaults to hardware domain.

Signed-off-by: Jason Andryuk 
Reviewed-by: Stefano Stabellini 
---
v4:
Add Stefano R-b

v3:
Use uint64_t to check for xenstore pfn read from HVM_PARAM
Rebase after mem paging changes

v2:
Re-order ahead of seeding.
Fix created type in commit message
Change set_xs_domid to set_xs_domain
Set xenstore domain as VIRQ_DOM_EXC handler
---
 xen/arch/arm/dom0less-build.c             | 67 +++++++++++++++++------
 xen/arch/arm/domain_build.c               |  2 +
 xen/arch/arm/include/asm/dom0less-build.h |  2 +
 3 files changed, 53 insertions(+), 18 deletions(-)

diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c
index 7bc6a6c4d7..bb8cc3be43 100644
--- a/xen/arch/arm/dom0less-build.c
+++ b/xen/arch/arm/dom0less-build.c
@@ -20,6 +20,15 @@
 #include 
 #include 
 
+static domid_t __initdata xs_domid = DOMID_INVALID;
+static bool __initdata need_xenstore;
+
+void __init set_xs_domain(struct domain *d)
+{
+    xs_domid = d->domain_id;
+    set_global_virq_handler(d, VIRQ_DOM_EXC);
+}
+
 bool __init is_dom0less_mode(void)
 {
     struct bootmodules *mods = &bootinfo.modules;
@@ -679,7 +688,7 @@ static int __init alloc_xenstore_evtchn(struct domain *d)
     int rc;
 
     alloc.dom = d->domain_id;
-    alloc.remote_dom = hardware_domain->domain_id;
+    alloc.remote_dom = xs_domid;
     rc = evtchn_alloc_unbound(&alloc, 0);
     if ( rc )
     {
@@ -745,16 +754,10 @@ static int __init alloc_xenstore_params(struct kernel_info *kinfo)
     struct domain *d = kinfo->d;
     int rc = 0;
 
-    if ( kinfo->dom0less_feature & (DOM0LESS_XENSTORE | DOM0LESS_XS_LEGACY) )
-    {
-        ASSERT(hardware_domain);
-        rc = alloc_xenstore_evtchn(d);
-        if ( rc < 0 )
-            return rc;
+    if ( (kinfo->dom0less_feature & (DOM0LESS_XENSTORE | DOM0LESS_XS_LEGACY))
+                                 == (DOM0LESS_XENSTORE | DOM0LESS_XS_LEGACY) )
         d->arch.hvm.params[HVM_PARAM_STORE_PFN] = ~0ULL;
-    }
-
-    if ( kinfo->dom0less_feature & DOM0LESS_XENSTORE )
+    else if ( kinfo->dom0less_feature & DOM0LESS_XENSTORE )
     {
         rc = alloc_xenstore_page(d);
         if ( rc < 0 )
@@ -764,6 +767,30 @@ static int __init alloc_xenstore_params(struct kernel_info *kinfo)
     return rc;
 }
 
+static void __init initialize_domU_xenstore(void)
+{
+    struct domain *d;
+
+    if ( xs_domid == DOMID_INVALID )
+        return;
+
+    for_each_domain( d )
+    {
+        uint64_t gfn = d->arch.hvm.params[HVM_PARAM_STORE_PFN];
+        int rc;
+
+        if ( gfn == 0 )
+            continue;
+
+        if ( is_xenstore_domain(d) )
+            continue;
+
+        rc = alloc_xenstore_evtchn(d);
+        if ( rc < 0 )
+            panic("%pd: Failed to allocate xenstore_evtchn\n", d);
+    }
+}
+
 static void __init domain_vcpu_affinity(struct domain *d,
                                         const struct dt_device_node *node)
 {
@@ -899,17 +926,13 @@ static int __init construct_domU(struct domain *d,
          rc == -ENODATA ||
          (rc == 0 && !strcmp(dom0less_enhanced, "enabled")) )
     {
-        if ( hardware_domain )
-            kinfo.dom0less_feature = DOM0LESS_ENHANCED;
-        else
-            panic("At the moment, Xenstore support requires dom0 to be present\n");
+        need_xenstore = true;
+        kinfo.dom0less_feature = DOM0LESS_ENHANCED;
     }
     else if ( rc == 0 && !strcmp(dom0less_enhanced, "legacy") )
     {
-        if ( hardware_domain )
-            kinfo.dom0less_feature = DOM0LESS_ENHANCED_LEGACY;
-        else
-            panic("At the moment, Xenstore support requires dom0 to be present\n");
+        need_xenstore = true;
+        kinfo.dom0less_feature = DOM0LESS_ENHANCED_LEGACY;
     }
     else if ( rc == 0 && !strcmp(dom0less_enhanced, "no-xenstore") )
         kinfo.dom0less_feature = DOM0LESS_ENHANCED_NO_XS;
@@ -1156,7 +1179,15 @@ void __init create_domUs(void)
         if ( rc )
             panic("Could not set up domain %s (rc = %d)\n",
                   dt_node_name(node), rc);
+
+        if ( d_cfg.flags & XEN_DOMCTL_CDF_xs_domain )
+            set_xs_domain(d);
     }
+
+    if ( need_xenstore && xs_domid == DOMID_INVALID )
+        panic("xenstore requested, but xenstore domain not present\n");
+
+    initialize_domU_xenstore();
 }
 
 /*
diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
index 0a329f9f5e..270a6b97e4 100644
--- a/xen/arch/arm/domain_build.c
+++ b/xen/arch/arm/domain_build.c
@@ -2408,6 +2408,8 @@ void __init create_dom0(void)
     rc = construct_dom0(dom0);
     if ( rc )
         panic("Could not set up DOM0 guest OS (rc = %d)\n", rc);
+
+    set_xs_domain(dom0);
 }
 
 /*
diff --git a/xen/arch/arm/include/asm/dom0less-build.h b/xen/arch/arm/include/asm/dom0less-build.h
index 5864944bda..b0e41a1954 100644
--- a/xen/arch/arm/include/asm/dom0less-build.h
+++ b/xen/arch/arm/include/asm/dom0less-build.h
@@ -9,6 +9,7 @@
 
 void create_domUs(void);
 bool is_dom0less_mode(void);
+void set_xs_domain(struct domain *d);
 
 #else /* !CONFIG_DOM0LESS_BOOT */
 
@@ -17,6 +18,7 @@ static inline bool is_dom0less_mode(void)
 {
     return false;
 }
+static inline void set_xs_domain(struct domain *d) {}
 
 #endif /* CONFIG_DOM0LESS_BOOT */
 
-- 
2.49.0



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From: Jason Andryuk 
To: 
CC: Jason Andryuk , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" , Andrew Cooper
	, Anthony PERARD , "Jan
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Subject: [PATCH v4 4/7] xen/arm: dom0less seed xenstore grant table entry
Date: Mon, 7 Apr 2025 15:40:35 -0400
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xenstored maps other domains' xenstore pages.  Currently this relies on
init-dom0less or xl to seed the grants from Dom0.  With split
hardware/control/xenstore domains, this is problematic since we don't
want the hardware domain to be able to map other domains' resources
without their permission.  Instead have the hypervisor seed the grant
table entry for every dom0less domain.  The grant is then accessible as
normal.

C xenstored uses grants, so it can map the xenstore pages from a
non-dom0 xenstore domain.  OCaml xenstored uses foreign mappings, so it
can only run from a privileged domain (dom0).

Add a define to indicate the late alloc xsentore PFN, to better indicate
what is being checked.  Use UINT64_MAX instead of ~0ULL as the HVM_PARAM
field is a uint64_t.  UINT64_MAX is not defined, so add it.

Signed-off-by: Jason Andryuk 
---
v4:
ASSERT gfn against UINT32_MAX and use < to avoid INVALID_GFN on 32bit
builds
Stefano gave R-b, but holding off addition because of changes
Use IS_ENABLED(CONFIG_GRANT_TABLE) instead of wrapper
Add XENSTORE_PFN_LATE_ALLOC
Add UINT64_MAX

v3:
Expand commit message about C vs. OCaml xenstored.
Remove __init and flags from gnttab_seed_entry()
Change frame to uint32_t
ASSERT gfn fits in a uint32_t
Rebase on mem paging changes

v2:
Tweak commit message
Mark gnttab_seed_entry() __init and put inside CONFIG_DOM0LESS_BOOT
Add ASSERT(!d->creation_finished) and ASSERT(gt->gt_version == 1);
const struct domain & struct grant_table
---
 xen/arch/arm/dom0less-build.c | 10 +++++++++-
 xen/common/grant_table.c      | 14 ++++++++++++++
 xen/include/xen/grant_table.h |  4 ++++
 xen/include/xen/types.h       |  1 +
 4 files changed, 28 insertions(+), 1 deletion(-)

diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c
index bb8cc3be43..188ef40b52 100644
--- a/xen/arch/arm/dom0less-build.c
+++ b/xen/arch/arm/dom0less-build.c
@@ -20,6 +20,8 @@
 #include 
 #include 
 
+#define XENSTORE_PFN_LATE_ALLOC UINT64_MAX
+
 static domid_t __initdata xs_domid = DOMID_INVALID;
 static bool __initdata need_xenstore;
 
@@ -756,7 +758,7 @@ static int __init alloc_xenstore_params(struct kernel_info *kinfo)
 
     if ( (kinfo->dom0less_feature & (DOM0LESS_XENSTORE | DOM0LESS_XS_LEGACY))
                                  == (DOM0LESS_XENSTORE | DOM0LESS_XS_LEGACY) )
-        d->arch.hvm.params[HVM_PARAM_STORE_PFN] = ~0ULL;
+        d->arch.hvm.params[HVM_PARAM_STORE_PFN] = XENSTORE_PFN_LATE_ALLOC;
     else if ( kinfo->dom0less_feature & DOM0LESS_XENSTORE )
     {
         rc = alloc_xenstore_page(d);
@@ -788,6 +790,12 @@ static void __init initialize_domU_xenstore(void)
         rc = alloc_xenstore_evtchn(d);
         if ( rc < 0 )
             panic("%pd: Failed to allocate xenstore_evtchn\n", d);
+
+        if ( gfn != XENSTORE_PFN_LATE_ALLOC && IS_ENABLED(CONFIG_GRANT_TABLE) )
+        {
+            ASSERT(gfn < UINT32_MAX);
+            gnttab_seed_entry(d, GNTTAB_RESERVED_XENSTORE, xs_domid, gfn);
+        }
     }
 }
 
diff --git a/xen/common/grant_table.c b/xen/common/grant_table.c
index 6c77867f8c..e75ff98aff 100644
--- a/xen/common/grant_table.c
+++ b/xen/common/grant_table.c
@@ -4346,6 +4346,20 @@ static void gnttab_usage_print(struct domain *rd)
         printk("no active grant table entries\n");
 }
 
+#ifdef CONFIG_DOM0LESS_BOOT
+void __init gnttab_seed_entry(const struct domain *d, unsigned int idx,
+                              domid_t be_domid, uint32_t frame)
+{
+    const struct grant_table *gt = d->grant_table;
+
+    ASSERT(!d->creation_finished);
+    ASSERT(gt->gt_version == 1);
+    shared_entry_v1(gt, idx).flags = GTF_permit_access;
+    shared_entry_v1(gt, idx).domid = be_domid;
+    shared_entry_v1(gt, idx).frame = frame;
+}
+#endif
+
 static void cf_check gnttab_usage_print_all(unsigned char key)
 {
     struct domain *d;
diff --git a/xen/include/xen/grant_table.h b/xen/include/xen/grant_table.h
index 50edfecfb6..297d7669e9 100644
--- a/xen/include/xen/grant_table.h
+++ b/xen/include/xen/grant_table.h
@@ -33,6 +33,10 @@
 
 struct grant_table;
 
+/* Seed a gnttab entry for Hyperlaunch/dom0less. */
+void gnttab_seed_entry(const struct domain *d, unsigned int idx,
+                       domid_t be_domid, uint32_t frame);
+
 #ifdef CONFIG_GRANT_TABLE
 
 extern unsigned int opt_gnttab_max_version;
diff --git a/xen/include/xen/types.h b/xen/include/xen/types.h
index e8d419b954..73ddccbbd5 100644
--- a/xen/include/xen/types.h
+++ b/xen/include/xen/types.h
@@ -44,6 +44,7 @@ typedef __UINTPTR_TYPE__ uintptr_t;
 #define UINT8_MAX       (255)
 #define UINT16_MAX      (65535)
 #define UINT32_MAX      (4294967295U)
+#define UINT64_MAX      (18446744073709551615ULL)
 
 #define INT_MAX         ((int)(~0U>>1))
 #define INT_MIN         (-INT_MAX - 1)
-- 
2.49.0



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From: Jason Andryuk 
To: 
CC: Jason Andryuk , Anthony PERARD
	, Stefano Stabellini 
Subject: [PATCH v4 5/7] tools/init-dom0less: Only seed legacy xenstore grants
Date: Mon, 7 Apr 2025 15:40:36 -0400
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The hardware domain is unable to seed a control domain, but we want the
control domain to use xenstore.  Rely on the hypervisor to seed dom0less
grant table entries for Xenstore, so this seeding is unnecessary.

However, that only works for the new xenstore late init.  The legacy
protocol which uses init-dom0less to populate the page still needs to
seed the grant.

Signed-off-by: Jason Andryuk 
Reviewed-by: Stefano Stabellini 
---
v4:
Add Stefano R-b
---
 tools/helpers/init-dom0less.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/tools/helpers/init-dom0less.c b/tools/helpers/init-dom0less.c
index 17579fe2e8..91edf17b6c 100644
--- a/tools/helpers/init-dom0less.c
+++ b/tools/helpers/init-dom0less.c
@@ -286,12 +286,12 @@ static int init_domain(struct xs_handle *xsh,
                 xenstore_pfn);
         if (rc < 0)
             return rc;
-    }
 
-    rc = xc_dom_gnttab_seed(xch, info->domid, true,
-                            (xen_pfn_t)-1, xenstore_pfn, 0, 0);
-    if (rc)
-        err(1, "xc_dom_gnttab_seed");
+        rc = xc_dom_gnttab_seed(xch, info->domid, true,
+                                (xen_pfn_t)-1, xenstore_pfn, 0, 0);
+        if (rc)
+               err(1, "xc_dom_gnttab_seed");
+    }
 
     libxl_uuid_generate(&uuid);
     xc_domain_sethandle(xch, info->domid, libxl_uuid_bytearray(&uuid));
-- 
2.49.0



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From: Jason Andryuk 
To: 
CC: Jason Andryuk , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" 
Subject: [PATCH v4 6/7] xen/arm: dom0less use has_dtb local variable
Date: Mon, 7 Apr 2025 15:40:37 -0400
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Store the result of finding a "multiboot,device-tree" node.  This will
simplity adding hardware domain checks.

Signed-off-by: Jason Andryuk 
Reviewed-by: Stefano Stabellini 
---
v4:
Add Stefano R-b

v3:
New

Could be squashed into the next patch, but this helps make the next one
cleaner.
---
 xen/arch/arm/dom0less-build.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c
index 188ef40b52..50d2d3e4e4 100644
--- a/xen/arch/arm/dom0less-build.c
+++ b/xen/arch/arm/dom0less-build.c
@@ -1033,6 +1033,7 @@ void __init create_domUs(void)
             .grant_opts = XEN_DOMCTL_GRANT_version(opt_gnttab_max_version),
         };
         unsigned int flags = 0U;
+        bool has_dtb = false;
         uint32_t val;
         int rc;
 
@@ -1067,9 +1068,10 @@ void __init create_domUs(void)
              !strcmp(dom0less_iommu, "enabled") )
             iommu = true;
 
-        if ( iommu_enabled &&
-             (iommu || dt_find_compatible_node(node, NULL,
-                                               "multiboot,device-tree")) )
+        if ( dt_find_compatible_node(node, NULL, "multiboot,device-tree") )
+            has_dtb = true;
+
+        if ( iommu_enabled && (iommu || has_dtb) )
             d_cfg.flags |= XEN_DOMCTL_CDF_iommu;
 
         if ( !dt_property_read_u32(node, "nr_spis", &d_cfg.arch.nr_spis) )
-- 
2.49.0



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From: Jason Andryuk 
To: 
CC: Jason Andryuk , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" , Andrew Cooper
	, Anthony PERARD , "Jan
 Beulich" , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	
Subject: [PATCH v4 7/7] xen/arm: Add capabilities to dom0less
Date: Mon, 7 Apr 2025 15:40:38 -0400
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Add a capabilities property to dom0less to allow building a
disaggregated system.  Only a single hardware domain and single xenstore
domain can be specified.  Multiple control domains are possible.

Introduce bootfdt.h to contain these constants.

When using the hardware or xenstore capabilities, adjust the grant and
event channel limits similar to dom0.

For a hardware domain, disallow specifying "vpl011", "nr_spis",
"multiboot,device-tree" and "passthrough" nodes.  Also, require an IOMMU
when not direct-mapped,

Signed-off-by: Jason Andryuk 
Reviewed-by: Stefano Stabellini 
---
v4:
Add Stefano R-b

v3:
Specify 32bit integer in booting.txt & s/all all/all/
Panic on !direct-map && !iommu
Panic "multiboot,device-tree" or "passthrough" with hardware domain
Include asm/grant_table.h for CONFIG_GRANT_TABLE=n

v2:
Fix comment style
Make DOMAIN_CAPS_* unsigned
Remove forced directmap & iommu
Require iommu with use of hardware domain
Limit to a single xenstore domain

There is overlap with hyperlaunch.  The numeric values are the same.
Hyperlaunch doesn't expose the values in a public header as done here.
Is this to be expected for dom0less?  It seems most of dom0less isn't in
a header, but just in docs.

Hyperlaunch uses BUILD_CAPS_, but I chose DOMAIN_CAPS_ since there are
domain-level capabilities.

Only a single xenstore and hardware domain make sense.  Hardware domain
receiving all hardware can only have a single domain.

For Xenstore, the logic latches the single xs_domid and uses that for
all domains.  Also, only a single domain can register for VIRQ_DOM_EXC.
---
 docs/misc/arm/device-tree/booting.txt | 11 ++++++
 xen/arch/arm/dom0less-build.c         | 57 +++++++++++++++++++++++++--
 xen/arch/arm/domain.c                 |  3 +-
 xen/include/public/bootfdt.h          | 31 +++++++++++++++
 4 files changed, 98 insertions(+), 4 deletions(-)
 create mode 100644 xen/include/public/bootfdt.h

diff --git a/docs/misc/arm/device-tree/booting.txt b/docs/misc/arm/device-tree/booting.txt
index ac781c9cc8..59fa96a82e 100644
--- a/docs/misc/arm/device-tree/booting.txt
+++ b/docs/misc/arm/device-tree/booting.txt
@@ -167,6 +167,17 @@ with the following properties:
     Refer to docs/misc/cache_coloring.rst for syntax. This option is applicable
     only to Arm64 guests.
 
+- capabilities
+    Optional.  A 32-bit integer representing a bit field of domain capabilities
+    for a disaggregated system.  A traditional dom0 has all of these
+    capabilities, and a domU has none of them.
+
+    0x1 DOMAIN_CAPS_CONTROL  - A privileged, control domain
+    0x2 DOMAIN_CAPS_HARDWARE - The hardware domain - there can be only 1
+    0x4 DOMAIN_CAPS_XENSTORE - The xenstore domain - there can be only 1
+
+    The default is no capabilities.
+
 - vpl011
 
     An empty property to enable/disable a virtual pl011 for the guest to
diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c
index 50d2d3e4e4..a356fc94fc 100644
--- a/xen/arch/arm/dom0less-build.c
+++ b/xen/arch/arm/dom0less-build.c
@@ -12,11 +12,13 @@
 #include 
 #include 
 
+#include 
 #include 
 
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -928,6 +930,8 @@ static int __init construct_domU(struct domain *d,
            d->max_vcpus, mem);
 
     kinfo.vpl011 = dt_property_read_bool(node, "vpl011");
+    if ( kinfo.vpl011 && is_hardware_domain(d) )
+        panic("hardware domain cannot specify vpl011\n");
 
     rc = dt_property_read_string(node, "xen,enhanced", &dom0less_enhanced);
     if ( rc == -EILSEQ ||
@@ -1043,6 +1047,37 @@ void __init create_domUs(void)
         if ( (max_init_domid + 1) >= DOMID_FIRST_RESERVED )
             panic("No more domain IDs available\n");
 
+        if ( dt_property_read_u32(node, "capabilities", &val) )
+        {
+            if ( val & ~DOMAIN_CAPS_MASK )
+                panic("Invalid capabilities (%"PRIx32")\n", val);
+
+            if ( val & DOMAIN_CAPS_CONTROL )
+                flags |= CDF_privileged;
+
+            if ( val & DOMAIN_CAPS_HARDWARE )
+            {
+                if ( hardware_domain )
+                    panic("Only 1 hardware domain can be specified! (%pd)\n",
+                           hardware_domain);
+
+                d_cfg.max_grant_frames = gnttab_dom0_frames();
+                d_cfg.max_evtchn_port = -1;
+                flags |= CDF_hardware;
+                iommu = true;
+            }
+
+            if ( val & DOMAIN_CAPS_XENSTORE )
+            {
+                if ( xs_domid != DOMID_INVALID )
+                    panic("Only 1 xenstore domain can be specified! (%u)\n",
+                          xs_domid);
+
+                d_cfg.flags |= XEN_DOMCTL_CDF_xs_domain;
+                d_cfg.max_evtchn_port = -1;
+            }
+        }
+
         if ( dt_find_property(node, "xen,static-mem", NULL) )
         {
             if ( llc_coloring_enabled )
@@ -1064,12 +1099,26 @@ void __init create_domUs(void)
             panic("Missing property 'cpus' for domain %s\n",
                   dt_node_name(node));
 
-        if ( !dt_property_read_string(node, "passthrough", &dom0less_iommu) &&
-             !strcmp(dom0less_iommu, "enabled") )
-            iommu = true;
+        if ( !dt_property_read_string(node, "passthrough", &dom0less_iommu) )
+        {
+            if ( flags & CDF_hardware )
+                panic("Don't specify passthrough for hardware domain\n");
+
+            if ( !strcmp(dom0less_iommu, "enabled") )
+                iommu = true;
+        }
+
+        if ( (flags & CDF_hardware) && !(flags & CDF_directmap) &&
+             !iommu_enabled )
+            panic("non-direct mapped hardware domain requires iommu\n");
 
         if ( dt_find_compatible_node(node, NULL, "multiboot,device-tree") )
+        {
+            if ( flags & CDF_hardware )
+                panic("\"multiboot,device-tree\" incompatible with hardware domain\n");
+
             has_dtb = true;
+        }
 
         if ( iommu_enabled && (iommu || has_dtb) )
             d_cfg.flags |= XEN_DOMCTL_CDF_iommu;
@@ -1106,6 +1155,8 @@ void __init create_domUs(void)
                 d_cfg.arch.nr_spis = MAX(d_cfg.arch.nr_spis,
                                          vpl011_virq - 32 + 1);
         }
+        else if ( flags & CDF_hardware )
+            panic("nr_spis cannot be specified for hardware domain\n");
 
         /* Get the optional property domain-cpupool */
         cpupool_node = dt_parse_phandle(node, "domain-cpupool", 0);
diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
index 3ba959f866..dc4b4e84c1 100644
--- a/xen/arch/arm/domain.c
+++ b/xen/arch/arm/domain.c
@@ -608,7 +608,8 @@ int arch_sanitise_domain_config(struct xen_domctl_createdomain *config)
 {
     unsigned int max_vcpus;
     unsigned int flags_required = (XEN_DOMCTL_CDF_hvm | XEN_DOMCTL_CDF_hap);
-    unsigned int flags_optional = (XEN_DOMCTL_CDF_iommu | XEN_DOMCTL_CDF_vpmu);
+    unsigned int flags_optional = (XEN_DOMCTL_CDF_iommu | XEN_DOMCTL_CDF_vpmu |
+                                   XEN_DOMCTL_CDF_xs_domain );
     unsigned int sve_vl_bits = sve_decode_vl(config->arch.sve_vl);
 
     if ( (config->flags & ~flags_optional) != flags_required )
diff --git a/xen/include/public/bootfdt.h b/xen/include/public/bootfdt.h
new file mode 100644
index 0000000000..86c46b42a9
--- /dev/null
+++ b/xen/include/public/bootfdt.h
@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Xen Device Tree boot information
+ *
+ * Information for configuring Xen domains created at boot time.
+ */
+
+#ifndef __XEN_PUBLIC_BOOTFDT_H__
+#define __XEN_PUBLIC_BOOTFDT_H__
+
+/*
+ * Domain Capabilities specified in the "capabilities" property.  Use of
+ * this property allows splitting up the monolithic dom0 into separate,
+ * less privileged components.  A regular domU has no capabilities
+ * (which is the default if nothing is specified).  A traditional dom0
+ * has all three capabilities.
+ */
+
+/* Control/Privileged domain capable of affecting other domains. */
+#define DOMAIN_CAPS_CONTROL  (1U << 0)
+/*
+ * Hardware domain controlling physical hardware.  Typically providing
+ * backends to other domains.
+ */
+#define DOMAIN_CAPS_HARDWARE (1U << 1)
+/* Xenstore domain. */
+#define DOMAIN_CAPS_XENSTORE (1U << 2)
+#define DOMAIN_CAPS_MASK     (DOMAIN_CAPS_CONTROL | DOMAIN_CAPS_HARDWARE | \
+                              DOMAIN_CAPS_XENSTORE)
+
+#endif /* __XEN_PUBLIC_BOOTFDT_H__ */
-- 
2.49.0



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Subject: Re: [PATCH] libxc/PM: correct (not just) error handling in
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To: Jan Beulich , "xen-devel@lists.xenproject.org"
	
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On 2025-03-27 09:32, Jan Beulich wrote:
>  From their introduction all xc_hypercall_bounce_pre() uses, when they
> failed, would properly cause exit from the function including cleanup,
> yet without informing the caller of the failure. Purge the unlock_1
> label for being both pointless and mis-named.
> 
> An earlier attempt to switch to the usual split between return value and
> errno wasn't quite complete.
> 
> HWP work made the cleanup of the "available governors" array
> conditional, neglecting the fact that the condition used may not be the
> condition that was used to allocate the buffer (as the structure field
> is updated upon getting back EAGAIN). Throughout the function, use the
> local variable being introduced to address that.
> 
> Fixes: 4513025a8790 ("libxc: convert sysctl interfaces over to hypercall buffers")
> Amends: 73367cf3b4b4 ("libxc: Fix xc_pm API calls to return negative error and stash error in errno")
> Fixes: 31e264c672bc ("pmstat&xenpm: Re-arrage for cpufreq union")
> Signed-off-by: Jan Beulich 

Reviewed-by: Jason Andryuk 

This fixes the currently broken logic with has_num, so I think it's a 
good change.

I think the gov_num==0 no longer happens with HWP because it registers a 
governor:

     return cpufreq_register_governor(&cpufreq_gov_hwp);

Unfortunately, I no longer have an HWP-capable system to verify.

Regards,
Jason


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From: Volodymyr Babchuk 
To: "xen-devel@lists.xenproject.org" 
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	, Oleksii Kurochko ,
	Community Manager 
Subject: [PATCH v8 0/3] Add/enable stack protector
Thread-Topic: [PATCH v8 0/3] Add/enable stack protector
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Both GCC and Clang support -fstack-protector feature, which add stack
canaries to functions where stack corruption is possible. This series
makes possible to use this feature in Xen. I tested this on ARM64 and
it is working as intended. Tested both with GCC and Clang. Also tested
with "-fstack-protector-all" compilation option to ensure that
initialization code works as expected.

It is hard to enable this feature on x86, as GCC stores stack canary
in %fs:40 by default, but Xen can't use %fs for various reasons. It is
possibly to change stack canary location new newer GCC versions, but
attempt to do this uncovered a whole host problems with GNU ld.
So, this series focus mostly on ARM.

Changes in v8:
 - Added MISRA deviation for __stack_chk_fail()

Changes in v7:
 - Patch "common: remove -fno-stack-protector from EMBEDDED_EXTRA_CFLAGS"
   is taken into mainline
 - Updated CHANGELOG for v4.21
 - Updated stack-protector.h as per Jan's comments

Changes in v6:

 - Moved stack guard initialization code to the header file
 - Expanded commit message for "[PATCH v6 3/4] xen: arm:
   enable stack protector feature"
 - Dropped couple of R-b tags
 - Added comment to "PATCH v6 4/4] CHANGELOG.md: Mention
   stack-protector feature", mentioning that it should be reworked
   if (almost certainly) it will not get into 4.20.
 - Tested with "-fstack-protector-all"


Changes in v5:

 - ARM code calls boot_stack_chk_guard_setup() from early C code
 - Bringed back stack-protector.h because C code needs to call
   boot_stack_chk_guard_setup()
 - Fixed formatting
 - Added Andrew's R-b tag

Changes in v4:

 - Added patch to CHANGELOG.md
 - Removed stack-protector.h because we dropped support for
   Xen's built-in RNG code and rely only on own implementation
 - Changes in individual patches are covered in their respect commit
 messages

Changes in v3:

 - Removed patch for riscv
 - Changes in individual patches are covered in their respect commit
 messages

Changes in v2:

 - Patch "xen: common: add ability to enable stack protector" was
   divided into two patches.
 - Rebase onto Andrew's patch that removes -fno-stack-protector-all
 - Tested on RISC-V thanks to Oleksii Kurochko
 - Changes in individual patches covered in their respect commit
 messages


Volodymyr Babchuk (3):
  xen: common: add ability to enable stack protector
  xen: arm: enable stack protector feature
  CHANGELOG.md: Mention stack-protector feature

 CHANGELOG.md                      |  3 +++
 docs/misra/safe.json              |  8 +++++++
 xen/Makefile                      |  4 ++++
 xen/arch/arm/Kconfig              |  1 +
 xen/arch/arm/setup.c              |  3 +++
 xen/common/Kconfig                | 15 ++++++++++++
 xen/common/Makefile               |  1 +
 xen/common/stack-protector.c      | 22 +++++++++++++++++
 xen/include/xen/stack-protector.h | 39 +++++++++++++++++++++++++++++++
 9 files changed, 96 insertions(+)
 create mode 100644 xen/common/stack-protector.c
 create mode 100644 xen/include/xen/stack-protector.h

--=20
2.48.1


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From: Volodymyr Babchuk 
To: "xen-devel@lists.xenproject.org" 
CC: Volodymyr Babchuk , Andrew Cooper
	, Anthony PERARD ,
	Michal Orzel , Jan Beulich , Julien
 Grall , =?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?=
	, Stefano Stabellini , Nicola
 Vetrini 
Subject: [PATCH v8 1/3] xen: common: add ability to enable stack protector
Thread-Topic: [PATCH v8 1/3] xen: common: add ability to enable stack
 protector
Thread-Index: AQHbqA4Pj76hGRdg9ESZqA2thQqQLA==
Date: Mon, 7 Apr 2025 22:40:27 +0000
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From: Volodymyr Babchuk 
To: "xen-devel@lists.xenproject.org" 
CC: Volodymyr Babchuk , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , Volodymyr
 Babchuk , Julien Grall 
Subject: [PATCH v8 2/3] xen: arm: enable stack protector feature
Thread-Topic: [PATCH v8 2/3] xen: arm: enable stack protector feature
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Date: Mon, 7 Apr 2025 22:40:27 +0000
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Enable previously added CONFIG_STACK_PROTECTOR feature for ARM
platform. Initialize stack protector magic value very early, at the
very beginning of start_xen() function.

We want to do this early because prior to that
boot_stack_chk_guard_setup() call, default stack protector guard value
is used. While it is fine for general development and testing, it does
not provide highest security level, because potential attacker will
know the default value and can alter a payload, so correct stack
guard value will be placed in the correct position.

Apart from that argument, boot_stack_chk_guard_setup() should be
called prior to enabling secondary CPUs to avoid race with them.

Signed-off-by: Volodymyr Babchuk 
Acked-by: Julien Grall 

---

Changes in v6:

 - Expanded the commit message
 - Added Julien's A-b tag

Changes in v5:

 - Call boot_stack_chk_guard_setup() from start_xen()
   instead of early ASM
---
 xen/arch/arm/Kconfig | 1 +
 xen/arch/arm/setup.c | 3 +++
 2 files changed, 4 insertions(+)

diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig
index 565f288331..da8a406f5a 100644
--- a/xen/arch/arm/Kconfig
+++ b/xen/arch/arm/Kconfig
@@ -15,6 +15,7 @@ config ARM
 	select GENERIC_UART_INIT
 	select HAS_ALTERNATIVE if HAS_VMAP
 	select HAS_DEVICE_TREE
+	select HAS_STACK_PROTECTOR
 	select HAS_UBSAN
=20
 config ARCH_DEFCONFIG
diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c
index bf39d41e9b..07703a15e1 100644
--- a/xen/arch/arm/setup.c
+++ b/xen/arch/arm/setup.c
@@ -30,6 +30,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -306,6 +307,8 @@ void asmlinkage __init start_xen(unsigned long fdt_padd=
r)
     struct domain *d;
     int rc, i;
=20
+    boot_stack_chk_guard_setup();
+
     dcache_line_bytes =3D read_dcache_line_bytes();
=20
     percpu_init_areas();
--=20
2.48.1


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From: Volodymyr Babchuk 
To: "xen-devel@lists.xenproject.org" 
CC: Volodymyr Babchuk , Oleksii Kurochko
	, Community Manager
	
Subject: [PATCH v8 3/3] CHANGELOG.md: Mention stack-protector feature
Thread-Topic: [PATCH v8 3/3] CHANGELOG.md: Mention stack-protector feature
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Stack protector is meant to be enabled on all architectures, but
currently it is tested (and enabled) only on ARM, so mention it in ARM
section.

Signed-off-by: Volodymyr Babchuk 
Acked-by: Oleksii Kurochko 

---

Changes in v7:
 - Moved the change to v4.21
 - Added Oleksii's acked-by tag

Changes in v6:
 - Dropped Andrew's R-b tag because there is little chance that this
 series will be included in 4.20, so this patch should be reworked for
 4.21
---
 CHANGELOG.md | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index 8f6afa5c85..d3dd31dea2 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -19,6 +19,9 @@ The format is based on [Keep a Changelog](https://keepach=
angelog.com/en/1.0.0/)
      capability usage is not yet supported on PVH dom0).
    - Smoke tests for the FreeBSD Xen builds in Cirrus CI.
=20
+ - On Arm:
+    - Ability to enable stack protector
+
 ### Removed
=20
 ## [4.20.0](https://xenbits.xenproject.org/gitweb/?p=3Dxen.git;a=3Dshortlo=
g;h=3DRELEASE-4.20.0) - 2025-03-05
--=20
2.48.1


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References: <20250318003943.1191439-1-volodymyr_babchuk@epam.com>
In-Reply-To: <20250318003943.1191439-1-volodymyr_babchuk@epam.com>
From: Tamas K Lengyel 
Date: Mon, 7 Apr 2025 18:55:56 -0400
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Message-ID: 
Subject: Re: [PATCH v2] xen: vm_event: do not do vm_event_op for an invalid domain
To: Volodymyr Babchuk 
Cc: "xen-devel@lists.xenproject.org" , 
	Alexandru Isaila , Petre Pircalabu , 
	Andrew Cooper 
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On Mon, Mar 17, 2025 at 8:40=E2=80=AFPM Volodymyr Babchuk
 wrote:
>
> A privileged domain can issue XEN_DOMCTL_vm_event_op with
> op->domain =3D=3D DOMID_INVALID. In this case vm_event_domctl()
> function will get NULL as the first parameter and this will
> cause hypervisor panic, as it tries to derefer this pointer.
>
> Fix the issue by checking if valid domain is passed in.
>
> Fixes: 48b84249459f ("xen/vm-event: Drop unused u_domctl parameter from v=
m_event_domctl()")
> Signed-off-by: Volodymyr Babchuk 

Acked-by: Tamas K Lengyel 


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Date: Tue, 08 Apr 2025 01:15:02 +0000
To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, jbeulich@suse.com, roger.pau@citrix.com, dmukhin@ford.com
Subject: [PATCH v1] x86/vmx: Rework __vmread()/vmread_safe()/vmr()
Message-ID: <20250408011454.2274613-1-dmukhin@ford.com>
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From: Denis Mukhin 

Use `asm goto()` in vmread_safe() to simplify the error handling logic.

Update __vmread() to return `unsigned long` as per suggestion in [1].
Rename __vmread() to vmread_unsafe() to match the behavior.
Update all call sites everywhere. Drop `UNLIKELY_*()`.

Group all vmread*() calls close to each other in vmx.h

Rename internal vmr*() to vmread*().

[1] https://lore.kernel.org/xen-devel/c452a1d7-4a57-4c5f-8a83-36a74ff228ec@=
citrix.com/

Signed-off-by: Denis Mukhin 
---
Link to CI: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines/1=
756781092
---
 xen/arch/x86/cpu/vpmu_intel.c          |   3 +-
 xen/arch/x86/hvm/vmx/intr.c            |  26 +--
 xen/arch/x86/hvm/vmx/realmode.c        |   2 +-
 xen/arch/x86/hvm/vmx/vmcs.c            | 160 ++++++++++---------
 xen/arch/x86/hvm/vmx/vmx.c             | 209 +++++++++++--------------
 xen/arch/x86/hvm/vmx/vvmx.c            |  43 +++--
 xen/arch/x86/include/asm/domain.h      |   2 +-
 xen/arch/x86/include/asm/hvm/vmx/vmx.h |  69 ++++----
 8 files changed, 235 insertions(+), 279 deletions(-)

diff --git a/xen/arch/x86/cpu/vpmu_intel.c b/xen/arch/x86/cpu/vpmu_intel.c
index 7ce98ee42e..9c93d1f28c 100644
--- a/xen/arch/x86/cpu/vpmu_intel.c
+++ b/xen/arch/x86/cpu/vpmu_intel.c
@@ -796,8 +796,7 @@ static int cf_check core2_vpmu_do_interrupt(void)
     else
     {
         /* No PMC overflow but perhaps a Trace Message interrupt. */
-        __vmread(GUEST_IA32_DEBUGCTL, &msr_content);
-        if ( !(msr_content & IA32_DEBUGCTLMSR_TR) )
+        if ( !(vmread_unsafe(GUEST_IA32_DEBUGCTL) & IA32_DEBUGCTLMSR_TR) )
             return 0;
     }
=20
diff --git a/xen/arch/x86/hvm/vmx/intr.c b/xen/arch/x86/hvm/vmx/intr.c
index 91b407e6bc..63330615cd 100644
--- a/xen/arch/x86/hvm/vmx/intr.c
+++ b/xen/arch/x86/hvm/vmx/intr.c
@@ -63,9 +63,8 @@ static void vmx_enable_intr_window(struct vcpu *v, struct=
 hvm_intack intack)
=20
     if ( unlikely(tb_init_done) )
     {
-        unsigned long intr;
+        unsigned long intr =3D vmread_unsafe(VM_ENTRY_INTR_INFO);
=20
-        __vmread(VM_ENTRY_INTR_INFO, &intr);
         TRACE(TRC_HVM_INTR_WINDOW, intack.vector, intack.source,
               (intr & INTR_INFO_VALID_MASK) ? intr & 0xff : -1);
     }
@@ -81,9 +80,8 @@ static void vmx_enable_intr_window(struct vcpu *v, struct=
 hvm_intack intack)
          * we may immediately vmexit and hance make no progress!
          * (see SDM 3B 21.3, "Other Causes of VM Exits").
          */
-        unsigned long intr_shadow;
+        unsigned long intr_shadow =3D vmread_unsafe(GUEST_INTERRUPTIBILITY=
_INFO);
=20
-        __vmread(GUEST_INTERRUPTIBILITY_INFO, &intr_shadow);
         if ( intr_shadow & VMX_INTR_SHADOW_STI )
         {
             /* Having both STI-blocking and MOV-SS-blocking fails vmentry.=
 */
@@ -144,14 +142,8 @@ enum hvm_intblk cf_check nvmx_intr_blocked(struct vcpu=
 *v)
         if ( nvcpu->nv_vmexit_pending ||
              nvcpu->nv_vmswitch_in_progress )
             r =3D hvm_intblk_rflags_ie;
-        else
-        {
-            unsigned long intr_info;
-
-            __vmread(VM_ENTRY_INTR_INFO, &intr_info);
-            if ( intr_info & INTR_INFO_VALID_MASK )
-                r =3D hvm_intblk_rflags_ie;
-        }
+        else if ( vmread_unsafe(VM_ENTRY_INTR_INFO) & INTR_INFO_VALID_MASK=
 )
+            r =3D hvm_intblk_rflags_ie;
     }
     else if ( nvcpu->nv_vmentry_pending )
         r =3D hvm_intblk_rflags_ie;
@@ -253,8 +245,6 @@ void asmlinkage vmx_intr_assist(void)
     pt_vector =3D pt_update_irq(v);
=20
     do {
-        unsigned long intr_info;
-
         intack =3D hvm_vcpu_has_pending_irq(v);
         if ( likely(intack.source =3D=3D hvm_intsrc_none) )
             goto out;
@@ -275,8 +265,7 @@ void asmlinkage vmx_intr_assist(void)
                 goto out;
             }
=20
-            __vmread(VM_ENTRY_INTR_INFO, &intr_info);
-            if ( intr_info & INTR_INFO_VALID_MASK )
+            if ( vmread_unsafe(VM_ENTRY_INTR_INFO) & INTR_INFO_VALID_MASK =
)
             {
                 if ( (intack.source =3D=3D hvm_intsrc_pic) ||
                      (intack.source =3D=3D hvm_intsrc_nmi) ||
@@ -299,8 +288,7 @@ void asmlinkage vmx_intr_assist(void)
         }
         else
         {
-            __vmread(VM_ENTRY_INTR_INFO, &intr_info);
-            if ( intr_info & INTR_INFO_VALID_MASK )
+            if ( vmread_unsafe(VM_ENTRY_INTR_INFO) & INTR_INFO_VALID_MASK =
)
             {
                 vmx_enable_intr_window(v, intack);
                 goto out;
@@ -377,7 +365,7 @@ void asmlinkage vmx_intr_assist(void)
         }
=20
         /* we need update the RVI field */
-        __vmread(GUEST_INTR_STATUS, &status);
+        status =3D vmread_unsafe(GUEST_INTR_STATUS);
         status &=3D ~VMX_GUEST_INTR_STATUS_SUBFIELD_BITMASK;
         status |=3D VMX_GUEST_INTR_STATUS_SUBFIELD_BITMASK &
                     intack.vector;
diff --git a/xen/arch/x86/hvm/vmx/realmode.c b/xen/arch/x86/hvm/vmx/realmod=
e.c
index ff44ddcfa6..e8eb9773ee 100644
--- a/xen/arch/x86/hvm/vmx/realmode.c
+++ b/xen/arch/x86/hvm/vmx/realmode.c
@@ -159,7 +159,7 @@ void vmx_realmode(struct cpu_user_regs *regs)
     unsigned int emulations =3D 0;
=20
     /* Get-and-clear VM_ENTRY_INTR_INFO. */
-    __vmread(VM_ENTRY_INTR_INFO, &intr_info);
+    intr_info =3D vmread_unsafe(VM_ENTRY_INTR_INFO);
     if ( intr_info & INTR_INFO_VALID_MASK )
         __vmwrite(VM_ENTRY_INTR_INFO, 0);
=20
diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c
index a44475ae15..3bfe48ff96 100644
--- a/xen/arch/x86/hvm/vmx/vmcs.c
+++ b/xen/arch/x86/hvm/vmx/vmcs.c
@@ -1031,7 +1031,7 @@ u64 virtual_vmcs_vmread(const struct vcpu *v, u32 vmc=
s_encoding)
     u64 res;
=20
     virtual_vmcs_enter(v);
-    __vmread(vmcs_encoding, &res);
+    res =3D vmread_unsafe(vmcs_encoding);
     virtual_vmcs_exit(v);
=20
     return res;
@@ -1691,7 +1691,7 @@ void vmx_vcpu_flush_pml_buffer(struct vcpu *v)
=20
     vmx_vmcs_enter(v);
=20
-    __vmread(GUEST_PML_INDEX, &pml_idx);
+    pml_idx =3D vmread_unsafe(GUEST_PML_INDEX);
=20
     /* Do nothing if PML buffer is empty. */
     if ( pml_idx =3D=3D (NR_PML_ENTRIES - 1) )
@@ -1874,9 +1874,8 @@ void vmx_destroy_vmcs(struct vcpu *v)
 void vmx_vmentry_failure(void)
 {
     struct vcpu *curr =3D current;
-    unsigned long error;
+    unsigned long error =3D vmread_unsafe(VM_INSTRUCTION_ERROR);
=20
-    __vmread(VM_INSTRUCTION_ERROR, &error);
     gprintk(XENLOG_ERR, "VM%s error: %#lx\n",
             curr->arch.hvm.vmx.launched ? "RESUME" : "LAUNCH", error);
=20
@@ -1905,7 +1904,6 @@ void cf_check vmx_do_resume(void)
 {
     struct vcpu *v =3D current;
     bool debug_state;
-    unsigned long host_cr4;
=20
     if ( v->arch.hvm.vmx.active_cpu =3D=3D smp_processor_id() )
         vmx_vmcs_reload(v);
@@ -1957,38 +1955,44 @@ void cf_check vmx_do_resume(void)
     hvm_do_resume(v);
=20
     /* Sync host CR4 in case its value has changed. */
-    __vmread(HOST_CR4, &host_cr4);
-    if ( host_cr4 !=3D read_cr4() )
+    if ( vmread_unsafe(HOST_CR4) !=3D read_cr4() )
         __vmwrite(HOST_CR4, read_cr4());
=20
     reset_stack_and_jump(vmx_asm_do_vmentry);
 }
=20
-static inline unsigned long vmr(unsigned long field)
+static inline unsigned long vmread(unsigned long field)
 {
-    unsigned long val;
+    unsigned long value =3D 0;
=20
-    return vmread_safe(field, &val) ? 0 : val;
+    asm goto ( "vmread %[field], %[value]\n\t"
+               "jmp %l[out]"
+               :
+               : [field] "r" (field), [value] "m" (value)
+               :
+               : out );
+out:
+    return value;
 }
=20
-#define vmr16(fld) ({             \
+#define vmread16(fld) ({          \
     BUILD_BUG_ON((fld) & 0x6001); \
-    (uint16_t)vmr(fld);           \
+    (uint16_t)vmread(fld);        \
 })
=20
-#define vmr32(fld) ({                         \
+#define vmread32(fld) ({                      \
     BUILD_BUG_ON(((fld) & 0x6001) !=3D 0x4000); \
-    (uint32_t)vmr(fld);                       \
+    (uint32_t)vmread(fld);                    \
 })
=20
 static void vmx_dump_sel(const char *name, uint32_t selector)
 {
     uint32_t sel, attr, limit;
     uint64_t base;
-    sel =3D vmr(selector);
-    attr =3D vmr(selector + (GUEST_ES_AR_BYTES - GUEST_ES_SELECTOR));
-    limit =3D vmr(selector + (GUEST_ES_LIMIT - GUEST_ES_SELECTOR));
-    base =3D vmr(selector + (GUEST_ES_BASE - GUEST_ES_SELECTOR));
+    sel =3D vmread(selector);
+    attr =3D vmread(selector + (GUEST_ES_AR_BYTES - GUEST_ES_SELECTOR));
+    limit =3D vmread(selector + (GUEST_ES_LIMIT - GUEST_ES_SELECTOR));
+    base =3D vmread(selector + (GUEST_ES_BASE - GUEST_ES_SELECTOR));
     printk("%s: %04x %05x %08x %016"PRIx64"\n", name, sel, attr, limit, ba=
se);
 }
=20
@@ -1996,8 +2000,8 @@ static void vmx_dump_sel2(const char *name, uint32_t =
lim)
 {
     uint32_t limit;
     uint64_t base;
-    limit =3D vmr(lim);
-    base =3D vmr(lim + (GUEST_GDTR_BASE - GUEST_GDTR_LIMIT));
+    limit =3D vmread(lim);
+    base =3D vmread(lim + (GUEST_GDTR_BASE - GUEST_GDTR_LIMIT));
     printk("%s:            %08x %016"PRIx64"\n", name, limit, base);
 }
=20
@@ -2014,9 +2018,9 @@ void vmcs_dump_vcpu(struct vcpu *v)
=20
     vmx_vmcs_enter(v);
=20
-    vmentry_ctl =3D vmr32(VM_ENTRY_CONTROLS),
-    vmexit_ctl =3D vmr32(VM_EXIT_CONTROLS);
-    cr4 =3D vmr(GUEST_CR4);
+    vmentry_ctl =3D vmread32(VM_ENTRY_CONTROLS),
+    vmexit_ctl =3D vmread32(VM_EXIT_CONTROLS);
+    cr4 =3D vmread(GUEST_CR4);
=20
     /*
      * The guests EFER setting comes from the GUEST_EFER VMCS field whenev=
er
@@ -2025,34 +2029,34 @@ void vmcs_dump_vcpu(struct vcpu *v)
      * setting.
      */
     if ( cpu_has_vmx_efer )
-        efer =3D vmr(GUEST_EFER);
+        efer =3D vmread(GUEST_EFER);
     else if ( vmx_read_guest_loadonly_msr(v, MSR_EFER, &efer) )
         efer =3D read_efer();
=20
     printk("*** Guest State ***\n");
     printk("CR0: actual=3D0x%016lx, shadow=3D0x%016lx, gh_mask=3D%016lx\n"=
,
-           vmr(GUEST_CR0), vmr(CR0_READ_SHADOW), vmr(CR0_GUEST_HOST_MASK))=
;
+           vmread(GUEST_CR0), vmread(CR0_READ_SHADOW), vmread(CR0_GUEST_HO=
ST_MASK));
     printk("CR4: actual=3D0x%016lx, shadow=3D0x%016lx, gh_mask=3D%016lx\n"=
,
-           cr4, vmr(CR4_READ_SHADOW), vmr(CR4_GUEST_HOST_MASK));
-    printk("CR3 =3D 0x%016lx\n", vmr(GUEST_CR3));
+           cr4, vmread(CR4_READ_SHADOW), vmread(CR4_GUEST_HOST_MASK));
+    printk("CR3 =3D 0x%016lx\n", vmread(GUEST_CR3));
     if ( (v->arch.hvm.vmx.secondary_exec_control &
           SECONDARY_EXEC_ENABLE_EPT) &&
          (cr4 & X86_CR4_PAE) && !(vmentry_ctl & VM_ENTRY_IA32E_MODE) )
     {
         printk("PDPTE0 =3D 0x%016lx  PDPTE1 =3D 0x%016lx\n",
-               vmr(GUEST_PDPTE(0)), vmr(GUEST_PDPTE(1)));
+               vmread(GUEST_PDPTE(0)), vmread(GUEST_PDPTE(1)));
         printk("PDPTE2 =3D 0x%016lx  PDPTE3 =3D 0x%016lx\n",
-               vmr(GUEST_PDPTE(2)), vmr(GUEST_PDPTE(3)));
+               vmread(GUEST_PDPTE(2)), vmread(GUEST_PDPTE(3)));
     }
     printk("RSP =3D 0x%016lx (0x%016lx)  RIP =3D 0x%016lx (0x%016lx)\n",
-           vmr(GUEST_RSP), regs->rsp,
-           vmr(GUEST_RIP), regs->rip);
+           vmread(GUEST_RSP), regs->rsp,
+           vmread(GUEST_RIP), regs->rip);
     printk("RFLAGS=3D0x%08lx (0x%08lx)  DR7 =3D 0x%016lx\n",
-           vmr(GUEST_RFLAGS), regs->rflags,
-           vmr(GUEST_DR7));
+           vmread(GUEST_RFLAGS), regs->rflags,
+           vmread(GUEST_DR7));
     printk("Sysenter RSP=3D%016lx CS:RIP=3D%04x:%016lx\n",
-           vmr(GUEST_SYSENTER_ESP),
-           vmr32(GUEST_SYSENTER_CS), vmr(GUEST_SYSENTER_EIP));
+           vmread(GUEST_SYSENTER_ESP),
+           vmread32(GUEST_SYSENTER_CS), vmread(GUEST_SYSENTER_EIP));
     printk("       sel  attr  limit   base\n");
     vmx_dump_sel("  CS", GUEST_CS_SELECTOR);
     vmx_dump_sel("  DS", GUEST_DS_SELECTOR);
@@ -2065,95 +2069,95 @@ void vmcs_dump_vcpu(struct vcpu *v)
     vmx_dump_sel2("IDTR", GUEST_IDTR_LIMIT);
     vmx_dump_sel("  TR", GUEST_TR_SELECTOR);
     printk("EFER(%s) =3D 0x%016lx  PAT =3D 0x%016lx\n",
-           cpu_has_vmx_efer ? "VMCS" : "MSR LL", efer, vmr(GUEST_PAT));
+           cpu_has_vmx_efer ? "VMCS" : "MSR LL", efer, vmread(GUEST_PAT));
     printk("PreemptionTimer =3D 0x%08x  SM Base =3D 0x%08x\n",
-           vmr32(GUEST_PREEMPTION_TIMER), vmr32(GUEST_SMBASE));
+           vmread32(GUEST_PREEMPTION_TIMER), vmread32(GUEST_SMBASE));
     printk("DebugCtl =3D 0x%016lx  DebugExceptions =3D 0x%016lx\n",
-           vmr(GUEST_IA32_DEBUGCTL), vmr(GUEST_PENDING_DBG_EXCEPTIONS));
+           vmread(GUEST_IA32_DEBUGCTL), vmread(GUEST_PENDING_DBG_EXCEPTION=
S));
     if ( vmentry_ctl & (VM_ENTRY_LOAD_PERF_GLOBAL_CTRL | VM_ENTRY_LOAD_BND=
CFGS) )
         printk("PerfGlobCtl =3D 0x%016lx  BndCfgS =3D 0x%016lx\n",
-               vmr(GUEST_PERF_GLOBAL_CTRL), vmr(GUEST_BNDCFGS));
+               vmread(GUEST_PERF_GLOBAL_CTRL), vmread(GUEST_BNDCFGS));
     printk("Interruptibility =3D %08x  ActivityState =3D %08x\n",
-           vmr32(GUEST_INTERRUPTIBILITY_INFO), vmr32(GUEST_ACTIVITY_STATE)=
);
+           vmread32(GUEST_INTERRUPTIBILITY_INFO), vmread32(GUEST_ACTIVITY_=
STATE));
     if ( v->arch.hvm.vmx.secondary_exec_control &
          SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY )
-        printk("InterruptStatus =3D %04x\n", vmr16(GUEST_INTR_STATUS));
+        printk("InterruptStatus =3D %04x\n", vmread16(GUEST_INTR_STATUS));
     if ( cpu_has_vmx_virt_spec_ctrl )
         printk("SPEC_CTRL mask =3D 0x%016lx  shadow =3D 0x%016lx\n",
-               vmr(SPEC_CTRL_MASK), vmr(SPEC_CTRL_SHADOW));
+               vmread(SPEC_CTRL_MASK), vmread(SPEC_CTRL_SHADOW));
=20
     printk("*** Host State ***\n");
     printk("RIP =3D 0x%016lx (%ps)  RSP =3D 0x%016lx\n",
-           vmr(HOST_RIP), (void *)vmr(HOST_RIP), vmr(HOST_RSP));
+           vmread(HOST_RIP), (void *)vmread(HOST_RIP), vmread(HOST_RSP));
     printk("CS=3D%04x SS=3D%04x DS=3D%04x ES=3D%04x FS=3D%04x GS=3D%04x TR=
=3D%04x\n",
-           vmr16(HOST_CS_SELECTOR), vmr16(HOST_SS_SELECTOR),
-           vmr16(HOST_DS_SELECTOR), vmr16(HOST_ES_SELECTOR),
-           vmr16(HOST_FS_SELECTOR), vmr16(HOST_GS_SELECTOR),
-           vmr16(HOST_TR_SELECTOR));
+           vmread16(HOST_CS_SELECTOR), vmread16(HOST_SS_SELECTOR),
+           vmread16(HOST_DS_SELECTOR), vmread16(HOST_ES_SELECTOR),
+           vmread16(HOST_FS_SELECTOR), vmread16(HOST_GS_SELECTOR),
+           vmread16(HOST_TR_SELECTOR));
     printk("FSBase=3D%016lx GSBase=3D%016lx TRBase=3D%016lx\n",
-           vmr(HOST_FS_BASE), vmr(HOST_GS_BASE), vmr(HOST_TR_BASE));
+           vmread(HOST_FS_BASE), vmread(HOST_GS_BASE), vmread(HOST_TR_BASE=
));
     printk("GDTBase=3D%016lx IDTBase=3D%016lx\n",
-           vmr(HOST_GDTR_BASE), vmr(HOST_IDTR_BASE));
+           vmread(HOST_GDTR_BASE), vmread(HOST_IDTR_BASE));
     printk("CR0=3D%016lx CR3=3D%016lx CR4=3D%016lx\n",
-           vmr(HOST_CR0), vmr(HOST_CR3), vmr(HOST_CR4));
+           vmread(HOST_CR0), vmread(HOST_CR3), vmread(HOST_CR4));
     printk("Sysenter RSP=3D%016lx CS:RIP=3D%04x:%016lx\n",
-           vmr(HOST_SYSENTER_ESP),
-           vmr32(HOST_SYSENTER_CS), vmr(HOST_SYSENTER_EIP));
+           vmread(HOST_SYSENTER_ESP),
+           vmread32(HOST_SYSENTER_CS), vmread(HOST_SYSENTER_EIP));
     if ( vmexit_ctl & (VM_EXIT_LOAD_HOST_PAT | VM_EXIT_LOAD_HOST_EFER) )
-        printk("EFER =3D 0x%016lx  PAT =3D 0x%016lx\n", vmr(HOST_EFER), vm=
r(HOST_PAT));
+        printk("EFER =3D 0x%016lx  PAT =3D 0x%016lx\n", vmread(HOST_EFER),=
 vmread(HOST_PAT));
     if ( vmexit_ctl & VM_EXIT_LOAD_PERF_GLOBAL_CTRL )
         printk("PerfGlobCtl =3D 0x%016lx\n",
-               vmr(HOST_PERF_GLOBAL_CTRL));
+               vmread(HOST_PERF_GLOBAL_CTRL));
=20
     printk("*** Control State ***\n");
     printk("PinBased=3D%08x CPUBased=3D%08x\n",
-           vmr32(PIN_BASED_VM_EXEC_CONTROL),
-           vmr32(CPU_BASED_VM_EXEC_CONTROL));
+           vmread32(PIN_BASED_VM_EXEC_CONTROL),
+           vmread32(CPU_BASED_VM_EXEC_CONTROL));
     printk("SecondaryExec=3D%08x TertiaryExec=3D%016lx\n",
-           vmr32(SECONDARY_VM_EXEC_CONTROL),
-           vmr(TERTIARY_VM_EXEC_CONTROL));
+           vmread32(SECONDARY_VM_EXEC_CONTROL),
+           vmread(TERTIARY_VM_EXEC_CONTROL));
     printk("EntryControls=3D%08x ExitControls=3D%08x\n", vmentry_ctl, vmex=
it_ctl);
     printk("ExceptionBitmap=3D%08x PFECmask=3D%08x PFECmatch=3D%08x\n",
-           vmr32(EXCEPTION_BITMAP),
-           vmr32(PAGE_FAULT_ERROR_CODE_MASK),
-           vmr32(PAGE_FAULT_ERROR_CODE_MATCH));
+           vmread32(EXCEPTION_BITMAP),
+           vmread32(PAGE_FAULT_ERROR_CODE_MASK),
+           vmread32(PAGE_FAULT_ERROR_CODE_MATCH));
     printk("VMEntry: intr_info=3D%08x errcode=3D%08x ilen=3D%08x\n",
-           vmr32(VM_ENTRY_INTR_INFO),
-           vmr32(VM_ENTRY_EXCEPTION_ERROR_CODE),
-           vmr32(VM_ENTRY_INSTRUCTION_LEN));
+           vmread32(VM_ENTRY_INTR_INFO),
+           vmread32(VM_ENTRY_EXCEPTION_ERROR_CODE),
+           vmread32(VM_ENTRY_INSTRUCTION_LEN));
     printk("VMExit: intr_info=3D%08x errcode=3D%08x ilen=3D%08x\n",
-           vmr32(VM_EXIT_INTR_INFO),
-           vmr32(VM_EXIT_INTR_ERROR_CODE),
-           vmr32(VM_EXIT_INSTRUCTION_LEN));
+           vmread32(VM_EXIT_INTR_INFO),
+           vmread32(VM_EXIT_INTR_ERROR_CODE),
+           vmread32(VM_EXIT_INSTRUCTION_LEN));
     printk("        reason=3D%08x qualification=3D%016lx\n",
-           vmr32(VM_EXIT_REASON), vmr(EXIT_QUALIFICATION));
+           vmread32(VM_EXIT_REASON), vmread(EXIT_QUALIFICATION));
     printk("IDTVectoring: info=3D%08x errcode=3D%08x\n",
-           vmr32(IDT_VECTORING_INFO), vmr32(IDT_VECTORING_ERROR_CODE));
+           vmread32(IDT_VECTORING_INFO), vmread32(IDT_VECTORING_ERROR_CODE=
));
     printk("TSC Offset =3D 0x%016lx  TSC Multiplier =3D 0x%016lx\n",
-           vmr(TSC_OFFSET), vmr(TSC_MULTIPLIER));
+           vmread(TSC_OFFSET), vmread(TSC_MULTIPLIER));
     if ( (v->arch.hvm.vmx.exec_control & CPU_BASED_TPR_SHADOW) ||
          (vmx_caps.pin_based_exec_control & PIN_BASED_POSTED_INTERRUPT) )
         printk("TPR Threshold =3D 0x%02x  PostedIntrVec =3D 0x%02x\n",
-               vmr32(TPR_THRESHOLD), vmr16(POSTED_INTR_NOTIFICATION_VECTOR=
));
+               vmread32(TPR_THRESHOLD), vmread16(POSTED_INTR_NOTIFICATION_=
VECTOR));
     if ( (v->arch.hvm.vmx.secondary_exec_control &
           SECONDARY_EXEC_ENABLE_EPT) )
         printk("EPT pointer =3D 0x%016lx  EPTP index =3D 0x%04x\n",
-               vmr(EPT_POINTER), vmr16(EPTP_INDEX));
-    n =3D vmr32(CR3_TARGET_COUNT);
+               vmread(EPT_POINTER), vmread16(EPTP_INDEX));
+    n =3D vmread32(CR3_TARGET_COUNT);
     for ( i =3D 0; i + 1 < n; i +=3D 2 )
         printk("CR3 target%u=3D%016lx target%u=3D%016lx\n",
-               i, vmr(CR3_TARGET_VALUE(i)),
-               i + 1, vmr(CR3_TARGET_VALUE(i + 1)));
+               i, vmread(CR3_TARGET_VALUE(i)),
+               i + 1, vmread(CR3_TARGET_VALUE(i + 1)));
     if ( i < n )
-        printk("CR3 target%u=3D%016lx\n", i, vmr(CR3_TARGET_VALUE(i)));
+        printk("CR3 target%u=3D%016lx\n", i, vmread(CR3_TARGET_VALUE(i)));
     if ( v->arch.hvm.vmx.secondary_exec_control &
          SECONDARY_EXEC_PAUSE_LOOP_EXITING )
         printk("PLE Gap=3D%08x Window=3D%08x\n",
-               vmr32(PLE_GAP), vmr32(PLE_WINDOW));
+               vmread32(PLE_GAP), vmread32(PLE_WINDOW));
     if ( v->arch.hvm.vmx.secondary_exec_control &
          (SECONDARY_EXEC_ENABLE_VPID | SECONDARY_EXEC_ENABLE_VM_FUNCTIONS)=
 )
         printk("Virtual processor ID =3D 0x%04x VMfunc controls =3D %016lx=
\n",
-               vmr16(VIRTUAL_PROCESSOR_ID), vmr(VM_FUNCTION_CONTROL));
+               vmread16(VIRTUAL_PROCESSOR_ID), vmread(VM_FUNCTION_CONTROL)=
);
=20
     vmx_vmcs_exit(v);
 }
diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c
index 4883bd823d..8a3f5a28ad 100644
--- a/xen/arch/x86/hvm/vmx/vmx.c
+++ b/xen/arch/x86/hvm/vmx/vmx.c
@@ -902,7 +902,7 @@ int cf_check vmx_guest_x86_mode(struct vcpu *v)
         return X86_MODE_REAL;
     if ( unlikely(guest_cpu_user_regs()->eflags & X86_EFLAGS_VM) )
         return X86_MODE_VM86;
-    __vmread(GUEST_CS_AR_BYTES, &cs_ar_bytes);
+    cs_ar_bytes =3D vmread_unsafe(GUEST_CS_AR_BYTES);
     if ( hvm_long_mode_active(v) &&
          likely(cs_ar_bytes & X86_SEG_AR_CS_LM_ACTIVE) )
         return X86_MODE_64BIT;
@@ -926,7 +926,7 @@ static void vmx_save_dr(struct vcpu *v)
     v->arch.dr[3] =3D read_debugreg(3);
     v->arch.dr6   =3D read_debugreg(6);
     /* DR7 must be saved as it is used by vmx_restore_dr(). */
-    __vmread(GUEST_DR7, &v->arch.dr7);
+    v->arch.dr7 =3D vmread_unsafe(GUEST_DR7);
 }
=20
 static void __restore_debug_registers(struct vcpu *v)
@@ -952,7 +952,7 @@ static void __restore_debug_registers(struct vcpu *v)
  */
 static void vmx_restore_dr(struct vcpu *v)
 {
-    /* NB. __vmread() is not usable here, so we cannot read from the VMCS.=
 */
+    /* NB. vmread_unsafe() is not usable here, so we cannot read from the =
VMCS. */
     if ( unlikely(v->arch.dr7 & DR7_ACTIVE_MASK) )
         __restore_debug_registers(v);
 }
@@ -963,17 +963,17 @@ static void vmx_vmcs_save(struct vcpu *v, struct hvm_=
hw_cpu *c)
=20
     vmx_vmcs_enter(v);
=20
-    __vmread(GUEST_SYSENTER_CS, &c->sysenter_cs);
-    __vmread(GUEST_SYSENTER_ESP, &c->sysenter_esp);
-    __vmread(GUEST_SYSENTER_EIP, &c->sysenter_eip);
+    c->sysenter_cs =3D vmread_unsafe(GUEST_SYSENTER_CS);
+    c->sysenter_esp =3D vmread_unsafe(GUEST_SYSENTER_ESP);
+    c->sysenter_eip =3D vmread_unsafe(GUEST_SYSENTER_EIP);
=20
-    __vmread(VM_ENTRY_INTR_INFO, &ev);
+    ev =3D vmread_unsafe(VM_ENTRY_INTR_INFO);
     if ( (ev & INTR_INFO_VALID_MASK) &&
          hvm_event_needs_reinjection(MASK_EXTR(ev, INTR_INFO_INTR_TYPE_MAS=
K),
                                      ev & INTR_INFO_VECTOR_MASK) )
     {
         c->pending_event =3D ev;
-        __vmread(VM_ENTRY_EXCEPTION_ERROR_CODE, &ev);
+        ev =3D vmread_unsafe(VM_ENTRY_EXCEPTION_ERROR_CODE);
         c->error_code =3D ev;
     }
=20
@@ -1197,11 +1197,7 @@ static void cf_check vmx_ctxt_switch_to(struct vcpu =
*v)
=20
 unsigned int vmx_get_cpl(void)
 {
-    unsigned long attr;
-
-    __vmread(GUEST_SS_AR_BYTES, &attr);
-
-    return MASK_EXTR(attr, X86_SEG_AR_DPL);
+    return MASK_EXTR(vmread_unsafe(GUEST_SS_AR_BYTES), X86_SEG_AR_DPL);
 }
=20
 static unsigned int cf_check _vmx_get_cpl(struct vcpu *v)
@@ -1271,14 +1267,14 @@ static void cf_check vmx_get_segment_register(
         fallthrough;
=20
     case x86_seg_es ... x86_seg_gs:
-        __vmread(GUEST_SEG_SELECTOR(tmp_seg), &sel);
-        __vmread(GUEST_SEG_AR_BYTES(tmp_seg), &attr);
+        sel =3D vmread_unsafe(GUEST_SEG_SELECTOR(tmp_seg));
+        attr =3D vmread_unsafe(GUEST_SEG_AR_BYTES(tmp_seg));
         fallthrough;
=20
     case x86_seg_gdtr:
     case x86_seg_idtr:
-        __vmread(GUEST_SEG_LIMIT(tmp_seg),    &limit);
-        __vmread(GUEST_SEG_BASE(tmp_seg),     ®->base);
+        limit =3D vmread_unsafe(GUEST_SEG_LIMIT(tmp_seg));
+        reg->base =3D vmread_unsafe(GUEST_SEG_BASE(tmp_seg));
         break;
=20
     default:
@@ -1436,7 +1432,7 @@ static int cf_check vmx_get_guest_pat(struct vcpu *v,=
 u64 *gpat)
         return 0;
=20
     vmx_vmcs_enter(v);
-    __vmread(GUEST_PAT, gpat);
+    *gpat =3D vmread_unsafe(GUEST_PAT);
     vmx_vmcs_exit(v);
     return 1;
 }
@@ -1555,11 +1551,7 @@ static void cf_check vmx_init_hypercall_page(void *p=
)
=20
 static unsigned int cf_check vmx_get_interrupt_shadow(struct vcpu *v)
 {
-    unsigned long intr_shadow;
-
-    __vmread(GUEST_INTERRUPTIBILITY_INFO, &intr_shadow);
-
-    return intr_shadow;
+    return vmread_unsafe(GUEST_INTERRUPTIBILITY_INFO);
 }
=20
 static void cf_check vmx_set_interrupt_shadow(
@@ -1573,12 +1565,12 @@ static void cf_check vmx_get_nonreg_state(struct vc=
pu *v,
 {
     vmx_vmcs_enter(v);
=20
-    __vmread(GUEST_ACTIVITY_STATE, &nrs->vmx.activity_state);
-    __vmread(GUEST_INTERRUPTIBILITY_INFO, &nrs->vmx.interruptibility_info)=
;
-    __vmread(GUEST_PENDING_DBG_EXCEPTIONS, &nrs->vmx.pending_dbg);
+    nrs->vmx.activity_state =3D vmread_unsafe(GUEST_ACTIVITY_STATE);
+    nrs->vmx.interruptibility_info =3D vmread_unsafe(GUEST_INTERRUPTIBILIT=
Y_INFO);
+    nrs->vmx.pending_dbg =3D vmread_unsafe(GUEST_PENDING_DBG_EXCEPTIONS);
=20
     if ( cpu_has_vmx_virtual_intr_delivery )
-        __vmread(GUEST_INTR_STATUS, &nrs->vmx.interrupt_status);
+        nrs->vmx.interrupt_status =3D vmread_unsafe(GUEST_INTR_STATUS);
=20
     vmx_vmcs_exit(v);
 }
@@ -1896,7 +1888,7 @@ static void cf_check vmx_update_guest_efer(struct vcp=
u *v)
      * The intended guest running mode is derived from VM_ENTRY_IA32E_MODE=
,
      * which (architecturally) is the guest's LMA setting.
      */
-    __vmread(VM_ENTRY_CONTROLS, &entry_ctls);
+    entry_ctls =3D vmread_unsafe(VM_ENTRY_CONTROLS);
=20
     entry_ctls &=3D ~VM_ENTRY_IA32E_MODE;
     if ( guest_efer & EFER_LMA )
@@ -2063,9 +2055,10 @@ static void cf_check vmx_inject_event(const struct x=
86_event *event)
         {
             unsigned long val;
=20
-            __vmread(GUEST_DR7, &val);
+            val =3D vmread_unsafe(GUEST_DR7);
             __vmwrite(GUEST_DR7, val & ~DR_GENERAL_DETECT);
-            __vmread(GUEST_IA32_DEBUGCTL, &val);
+
+            val =3D vmread_unsafe(GUEST_IA32_DEBUGCTL);
             __vmwrite(GUEST_IA32_DEBUGCTL, val & ~IA32_DEBUGCTLMSR_LBR);
         }
         if ( cpu_has_monitor_trap_flag )
@@ -2089,7 +2082,7 @@ static void cf_check vmx_inject_event(const struct x8=
6_event *event)
     if ( nestedhvm_vcpu_in_guestmode(curr) )
         intr_info =3D vcpu_2_nvmx(curr).intr.intr_info;
     else
-        __vmread(VM_ENTRY_INTR_INFO, &intr_info);
+        intr_info =3D vmread_unsafe(VM_ENTRY_INTR_INFO);
=20
     if ( unlikely(intr_info & INTR_INFO_VALID_MASK) &&
          (MASK_EXTR(intr_info, INTR_INFO_INTR_TYPE_MASK) =3D=3D X86_ET_HW_=
EXC) )
@@ -2125,12 +2118,9 @@ static void cf_check vmx_inject_event(const struct x=
86_event *event)
=20
 static bool cf_check vmx_event_pending(const struct vcpu *v)
 {
-    unsigned long intr_info;
-
     ASSERT(v =3D=3D current);
-    __vmread(VM_ENTRY_INTR_INFO, &intr_info);
=20
-    return intr_info & INTR_INFO_VALID_MASK;
+    return vmread_unsafe(VM_ENTRY_INTR_INFO) & INTR_INFO_VALID_MASK;
 }
=20
 static void cf_check vmx_set_info_guest(struct vcpu *v)
@@ -2149,7 +2139,7 @@ static void cf_check vmx_set_info_guest(struct vcpu *=
v)
      * to set the GUEST_PENDING_DBG_EXCEPTIONS.BS here incurs
      * immediately vmexit and hence make no progress.
      */
-    __vmread(GUEST_INTERRUPTIBILITY_INFO, &intr_shadow);
+    intr_shadow =3D vmread_unsafe(GUEST_INTERRUPTIBILITY_INFO);
     if ( v->domain->debugger_attached &&
          (v->arch.user_regs.eflags & X86_EFLAGS_TF) &&
          (intr_shadow & VMX_INTR_SHADOW_STI) )
@@ -2178,7 +2168,7 @@ static u8 set_svi(int isr)
     if ( isr < 0 )
         isr =3D 0;
=20
-    __vmread(GUEST_INTR_STATUS, &status);
+    status =3D vmread_unsafe(GUEST_INTR_STATUS);
     old =3D status >> VMX_GUEST_INTR_STATUS_SVI_OFFSET;
     if ( isr !=3D old )
     {
@@ -2518,9 +2508,9 @@ static bool cf_check vmx_vcpu_emulate_ve(struct vcpu =
*v)
     veinfo->eptp_index =3D vcpu_altp2m(v).p2midx;
=20
     vmx_vmcs_enter(v);
-    __vmread(EXIT_QUALIFICATION, &veinfo->exit_qualification);
-    __vmread(GUEST_LINEAR_ADDRESS, &veinfo->gla);
-    __vmread(GUEST_PHYSICAL_ADDRESS, &veinfo->gpa);
+    veinfo->exit_qualification =3D vmread_unsafe(EXIT_QUALIFICATION);
+    veinfo->gla =3D vmread_unsafe(GUEST_LINEAR_ADDRESS);
+    veinfo->gpa =3D vmread_unsafe(GUEST_PHYSICAL_ADDRESS);
     vmx_vmcs_exit(v);
=20
     hvm_inject_hw_exception(X86_EXC_VE,
@@ -2541,8 +2531,8 @@ static bool cf_check vmx_get_pending_event(
     unsigned long intr_info, error_code;
=20
     vmx_vmcs_enter(v);
-    __vmread(VM_ENTRY_INTR_INFO, &intr_info);
-    __vmread(VM_ENTRY_EXCEPTION_ERROR_CODE, &error_code);
+    intr_info =3D vmread_unsafe(VM_ENTRY_INTR_INFO);
+    error_code =3D vmread_unsafe(VM_ENTRY_EXCEPTION_ERROR_CODE);
     vmx_vmcs_exit(v);
=20
     if ( !(intr_info & INTR_INFO_VALID_MASK) )
@@ -2739,11 +2729,11 @@ static uint64_t cf_check vmx_get_reg(struct vcpu *v=
, unsigned int reg)
     {
     case MSR_SPEC_CTRL:
         ASSERT(cpu_has_vmx_virt_spec_ctrl);
-        __vmread(SPEC_CTRL_SHADOW, &val);
+        val =3D vmread_unsafe(SPEC_CTRL_SHADOW);
         break;
=20
     case MSR_IA32_BNDCFGS:
-        __vmread(GUEST_BNDCFGS, &val);
+        val =3D vmread_unsafe(GUEST_BNDCFGS);
         break;
=20
     default:
@@ -3161,9 +3151,8 @@ void __init vmx_fill_funcs(void)
  */
 static int get_instruction_length(void)
 {
-    unsigned long len;
+    unsigned long len =3D vmread_unsafe(VM_EXIT_INSTRUCTION_LEN); /* Safe:=
 callers audited */
=20
-    __vmread(VM_EXIT_INSTRUCTION_LEN, &len); /* Safe: callers audited */
     BUG_ON((len < 1) || (len > MAX_INST_LEN));
     return len;
 }
@@ -3176,7 +3165,7 @@ void update_guest_eip(void)
     regs->rip +=3D get_instruction_length(); /* Safe: callers audited */
     regs->eflags &=3D ~X86_EFLAGS_RF;
=20
-    __vmread(GUEST_INTERRUPTIBILITY_INFO, &x);
+    x =3D vmread_unsafe(GUEST_INTERRUPTIBILITY_INFO);
     if ( x & (VMX_INTR_SHADOW_STI | VMX_INTR_SHADOW_MOV_SS) )
     {
         x &=3D ~(VMX_INTR_SHADOW_STI | VMX_INTR_SHADOW_MOV_SS);
@@ -3424,21 +3413,21 @@ static int cf_check vmx_msr_read_intercept(
     switch ( msr )
     {
     case MSR_IA32_SYSENTER_CS:
-        __vmread(GUEST_SYSENTER_CS, msr_content);
+        *msr_content =3D vmread_unsafe(GUEST_SYSENTER_CS);
         break;
     case MSR_IA32_SYSENTER_ESP:
-        __vmread(GUEST_SYSENTER_ESP, msr_content);
+        *msr_content =3D vmread_unsafe(GUEST_SYSENTER_ESP);
         break;
     case MSR_IA32_SYSENTER_EIP:
-        __vmread(GUEST_SYSENTER_EIP, msr_content);
+        *msr_content =3D vmread_unsafe(GUEST_SYSENTER_EIP);
         break;
=20
     case MSR_FS_BASE:
-        __vmread(GUEST_FS_BASE, msr_content);
+        *msr_content =3D vmread_unsafe(GUEST_FS_BASE);
         break;
=20
     case MSR_GS_BASE:
-        __vmread(GUEST_GS_BASE, msr_content);
+        *msr_content =3D vmread_unsafe(GUEST_GS_BASE);
         break;
=20
     case MSR_SHADOW_GS_BASE:
@@ -3462,7 +3451,7 @@ static int cf_check vmx_msr_read_intercept(
         break;
=20
     case MSR_IA32_DEBUGCTLMSR:
-        __vmread(GUEST_IA32_DEBUGCTL, msr_content);
+        *msr_content =3D vmread_unsafe(GUEST_IA32_DEBUGCTL);
         break;
=20
     case MSR_IA32_VMX_BASIC...MSR_IA32_VMX_VMFUNC:
@@ -3828,7 +3817,7 @@ static void vmx_do_extint(struct cpu_user_regs *regs)
 {
     unsigned long vector;
=20
-    __vmread(VM_EXIT_INTR_INFO, &vector);
+    vector =3D vmread_unsafe(VM_EXIT_INTR_INFO);
     BUG_ON(!(vector & INTR_INFO_VALID_MASK));
=20
     vector &=3D INTR_INFO_VECTOR_MASK;
@@ -3893,7 +3882,7 @@ static void ept_handle_violation(ept_qual_t q, paddr_=
t gpa)
=20
     if ( q.gla_valid )
     {
-        __vmread(GUEST_LINEAR_ADDRESS, &gla);
+        gla =3D vmread_unsafe(GUEST_LINEAR_ADDRESS);
         npfec.gla_valid =3D 1;
         if( q.gla_fault )
             npfec.kind =3D npfec_kind_with_gla;
@@ -3944,7 +3933,7 @@ static void vmx_failed_vmentry(unsigned int exit_reas=
on,
     struct vcpu *curr =3D current;
=20
     printk("%pv vmentry failure (reason %#x): ", curr, exit_reason);
-    __vmread(EXIT_QUALIFICATION, &exit_qualification);
+    exit_qualification =3D vmread_unsafe(EXIT_QUALIFICATION);
     switch ( failed_vmentry_reason )
     {
     case EXIT_REASON_INVALID_GUEST_STATE:
@@ -4001,13 +3990,12 @@ void vmx_enter_realmode(struct cpu_user_regs *regs)
=20
 static int vmx_handle_eoi_write(void)
 {
-    unsigned long exit_qualification;
+    unsigned long exit_qualification =3D vmread_unsafe(EXIT_QUALIFICATION)=
;
=20
     /*
      * 1. Must be a linear access data write.
      * 2. Data write must be to the EOI register.
      */
-    __vmread(EXIT_QUALIFICATION, &exit_qualification);
     if ( (((exit_qualification >> 12) & 0xf) =3D=3D 1) &&
          ((exit_qualification & 0xfff) =3D=3D APIC_EOI) )
     {
@@ -4033,21 +4021,14 @@ static void vmx_propagate_intr(unsigned long intr)
         .vector =3D MASK_EXTR(intr, INTR_INFO_VECTOR_MASK),
         .type =3D MASK_EXTR(intr, INTR_INFO_INTR_TYPE_MASK),
     };
-    unsigned long tmp;
=20
     if ( intr & INTR_INFO_DELIVER_CODE_MASK )
-    {
-        __vmread(VM_EXIT_INTR_ERROR_CODE, &tmp);
-        event.error_code =3D tmp;
-    }
+        event.error_code =3D vmread_unsafe(VM_EXIT_INTR_ERROR_CODE);
     else
         event.error_code =3D X86_EVENT_NO_EC;
=20
     if ( event.type >=3D X86_ET_SW_INT )
-    {
-        __vmread(VM_EXIT_INSTRUCTION_LEN, &tmp);
-        event.insn_len =3D tmp;
-    }
+        event.insn_len =3D vmread_unsafe(VM_EXIT_INSTRUCTION_LEN);
     else
         event.insn_len =3D 0;
=20
@@ -4071,7 +4052,7 @@ static void vmx_idtv_reinject(unsigned long idtv_info=
)
             {
                 unsigned long ec;
=20
-                __vmread(IDT_VECTORING_ERROR_CODE, &ec);
+                ec =3D vmread_unsafe(IDT_VECTORING_ERROR_CODE);
                 __vmwrite(VM_ENTRY_EXCEPTION_ERROR_CODE, ec);
             }
         }
@@ -4086,7 +4067,7 @@ static void vmx_idtv_reinject(unsigned long idtv_info=
)
         {
             unsigned long intr_info;
=20
-            __vmread(GUEST_INTERRUPTIBILITY_INFO, &intr_info);
+            intr_info =3D vmread_unsafe(GUEST_INTERRUPTIBILITY_INFO);
             __vmwrite(GUEST_INTERRUPTIBILITY_INFO,
                       intr_info & ~VMX_INTR_SHADOW_NMI);
         }
@@ -4111,8 +4092,8 @@ static void vmx_handle_descriptor_access(uint32_t exi=
t_reason)
     uint64_t exit_qualification;
     unsigned int desc;
=20
-    __vmread(EXIT_QUALIFICATION, &exit_qualification);
-    __vmread(VMX_INSTRUCTION_INFO, &instr_info);
+    exit_qualification =3D vmread_unsafe(EXIT_QUALIFICATION);
+    instr_info =3D vmread_unsafe(VMX_INSTRUCTION_INFO);
=20
     if ( exit_reason =3D=3D EXIT_REASON_ACCESS_GDTR_OR_IDTR )
     {
@@ -4137,7 +4118,7 @@ static int vmx_handle_apic_write(void)
     unsigned long exit_qualification;
=20
     ASSERT(cpu_has_vmx_apic_reg_virt);
-    __vmread(EXIT_QUALIFICATION, &exit_qualification);
+    exit_qualification =3D vmread_unsafe(EXIT_QUALIFICATION);
=20
     return vlapic_apicv_write(current, exit_qualification & 0xfff);
 }
@@ -4146,7 +4127,7 @@ static void undo_nmis_unblocked_by_iret(void)
 {
     unsigned long guest_info;
=20
-    __vmread(GUEST_INTERRUPTIBILITY_INFO, &guest_info);
+    guest_info =3D vmread_unsafe(GUEST_INTERRUPTIBILITY_INFO);
     __vmwrite(GUEST_INTERRUPTIBILITY_INFO,
               guest_info | VMX_INTR_SHADOW_NMI);
 }
@@ -4159,12 +4140,12 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_=
regs *regs)
     struct vcpu *v =3D current;
     struct domain *currd =3D v->domain;
=20
-    __vmread(GUEST_RIP,    ®s->rip);
-    __vmread(GUEST_RSP,    ®s->rsp);
-    __vmread(GUEST_RFLAGS, ®s->rflags);
+    regs->rip =3D vmread_unsafe(GUEST_RIP);
+    regs->rsp =3D vmread_unsafe(GUEST_RSP);
+    regs->rflags =3D vmread_unsafe(GUEST_RFLAGS);
=20
     if ( hvm_long_mode_active(v) )
-        __vmread(GUEST_CS_AR_BYTES, &cs_ar_bytes);
+        cs_ar_bytes =3D vmread_unsafe(GUEST_CS_AR_BYTES);
=20
     hvm_sanitize_regs_fields(regs, !(cs_ar_bytes & X86_SEG_AR_CS_LM_ACTIVE=
));
=20
@@ -4174,17 +4155,17 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_=
regs *regs)
          * Xen allows the guest to modify some CR4 bits directly, update c=
ached
          * values to match.
          */
-        __vmread(GUEST_CR4, &v->arch.hvm.hw_cr[4]);
+        v->arch.hvm.hw_cr[4] =3D vmread_unsafe(GUEST_CR4);
         v->arch.hvm.guest_cr[4] &=3D v->arch.hvm.vmx.cr4_host_mask;
         v->arch.hvm.guest_cr[4] |=3D (v->arch.hvm.hw_cr[4] &
                                     ~v->arch.hvm.vmx.cr4_host_mask);
=20
-        __vmread(GUEST_CR3, &v->arch.hvm.hw_cr[3]);
+        v->arch.hvm.hw_cr[3] =3D vmread_unsafe(GUEST_CR3);
         if ( vmx_unrestricted_guest(v) || hvm_paging_enabled(v) )
             v->arch.hvm.guest_cr[3] =3D v->arch.hvm.hw_cr[3];
     }
=20
-    __vmread(VM_EXIT_REASON, &exit_reason);
+    exit_reason =3D vmread_unsafe(VM_EXIT_REASON);
=20
     if ( hvm_long_mode_active(v) )
         TRACE_TIME(TRC_HVM_VMX_EXIT64, exit_reason, regs->rip, regs->rip >=
> 32);
@@ -4200,7 +4181,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
         vmx_do_extint(regs);
         break;
     case EXIT_REASON_EXCEPTION_NMI:
-        __vmread(VM_EXIT_INTR_INFO, &intr_info);
+        intr_info =3D vmread_unsafe(VM_EXIT_INTR_INFO);
         BUG_ON(!(intr_info & INTR_INFO_VALID_MASK));
         vector =3D intr_info & INTR_INFO_VECTOR_MASK;
         if ( vector =3D=3D X86_EXC_MC )
@@ -4237,12 +4218,12 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_=
regs *regs)
=20
         if ( v->arch.hvm.vmx.secondary_exec_control &
             SECONDARY_EXEC_ENABLE_VIRT_EXCEPTIONS )
-            __vmread(EPTP_INDEX, &idx);
+        {
+            idx =3D vmread_unsafe(EPTP_INDEX);
+        }
         else
         {
-            unsigned long eptp;
-
-            __vmread(EPT_POINTER, &eptp);
+            unsigned long eptp =3D vmread_unsafe(EPT_POINTER);
=20
             if ( (idx =3D p2m_find_altp2m_by_eptp(v->domain, eptp)) =3D=3D
                  INVALID_ALTP2M )
@@ -4259,10 +4240,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_r=
egs *regs)
=20
     if ( unlikely(currd->arch.monitor.vmexit_enabled) )
     {
-        int rc;
-
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
-        rc =3D hvm_monitor_vmexit(exit_reason, exit_qualification);
+        int rc =3D hvm_monitor_vmexit(exit_reason, vmread_unsafe(EXIT_QUAL=
IFICATION));
         if ( rc < 0 )
             goto exit_and_crash;
         if ( rc )
@@ -4327,7 +4305,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
=20
     hvm_maybe_deassert_evtchn_irq();
=20
-    __vmread(IDT_VECTORING_INFO, &idtv_info);
+    idtv_info =3D vmread_unsafe(IDT_VECTORING_INFO);
     if ( exit_reason !=3D EXIT_REASON_TASK_SWITCH )
         vmx_idtv_reinject(idtv_info);
=20
@@ -4362,7 +4340,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
              * Updates DR6 where debugger can peek (See 3B 23.2.1,
              * Table 23-1, "Exit Qualification for Debug Exceptions").
              */
-            __vmread(EXIT_QUALIFICATION, &exit_qualification);
+            exit_qualification =3D vmread_unsafe(EXIT_QUALIFICATION);
             TRACE(TRC_HVM_TRAP_DEBUG, exit_qualification);
             __restore_debug_registers(v);
             write_debugreg(6, exit_qualification | DR_STATUS_RESERVED_ONE)=
;
@@ -4388,29 +4366,25 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_=
regs *regs)
              */
             if ( unlikely(regs->eflags & X86_EFLAGS_TF) )
             {
-                unsigned long int_info;
-
-                __vmread(GUEST_INTERRUPTIBILITY_INFO, &int_info);
+                unsigned long int_info =3D vmread_unsafe(GUEST_INTERRUPTIB=
ILITY_INFO);
=20
                 if ( int_info & (VMX_INTR_SHADOW_STI | VMX_INTR_SHADOW_MOV=
_SS) )
                 {
-                    unsigned long pending_dbg;
+                    unsigned long exc =3D vmread_unsafe(GUEST_PENDING_DBG_=
EXCEPTIONS);
=20
-                    __vmread(GUEST_PENDING_DBG_EXCEPTIONS, &pending_dbg);
-                    __vmwrite(GUEST_PENDING_DBG_EXCEPTIONS,
-                              pending_dbg | DR_STEP);
+                    __vmwrite(GUEST_PENDING_DBG_EXCEPTIONS, exc | DR_STEP)=
;
                 }
             }
=20
             if ( !v->domain->debugger_attached )
             {
                 unsigned long insn_len =3D 0;
-                int rc;
                 unsigned long trap_type =3D MASK_EXTR(intr_info,
                                                     INTR_INFO_INTR_TYPE_MA=
SK);
+                int rc;
=20
                 if ( trap_type >=3D X86_ET_SW_INT )
-                    __vmread(VM_EXIT_INSTRUCTION_LEN, &insn_len);
+                    insn_len =3D vmread_unsafe(VM_EXIT_INSTRUCTION_LEN);
=20
                 rc =3D hvm_monitor_debug(regs->rip,
                                        HVM_MONITOR_DEBUG_EXCEPTION,
@@ -4428,10 +4402,9 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_r=
egs *regs)
             TRACE(TRC_HVM_TRAP, vector);
             if ( !v->domain->debugger_attached )
             {
-                unsigned long insn_len;
+                unsigned long insn_len =3D vmread_unsafe(VM_EXIT_INSTRUCTI=
ON_LEN);
                 int rc;
=20
-                __vmread(VM_EXIT_INSTRUCTION_LEN, &insn_len);
                 rc =3D hvm_monitor_debug(regs->rip,
                                        HVM_MONITOR_SOFTWARE_BREAKPOINT,
                                        X86_ET_SW_EXC,
@@ -4454,8 +4427,8 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
             vmx_fpu_dirty_intercept();
             break;
         case X86_EXC_PF:
-            __vmread(EXIT_QUALIFICATION, &exit_qualification);
-            __vmread(VM_EXIT_INTR_ERROR_CODE, &ecode);
+            exit_qualification =3D vmread_unsafe(EXIT_QUALIFICATION);
+            ecode =3D vmread_unsafe(VM_EXIT_INTR_ERROR_CODE);
             regs->error_code =3D ecode;
=20
             HVM_DBG_LOG(DBG_LEVEL_VMMU,
@@ -4522,7 +4495,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
         };
         unsigned int inst_len, source;
=20
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        exit_qualification =3D vmread_unsafe(EXIT_QUALIFICATION);
         source =3D (exit_qualification >> 30) & 3;
         /* Vectored event should fill in interrupt information. */
         WARN_ON((source =3D=3D 3) && !(idtv_info & INTR_INFO_VALID_MASK));
@@ -4536,9 +4509,9 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
                      > 3)) /* IntrType > 3? */
             ? get_instruction_length() /* Safe: SDM 3B 23.2.4 */ : 0;
         if ( (source =3D=3D 3) && (idtv_info & INTR_INFO_DELIVER_CODE_MASK=
) )
-            __vmread(IDT_VECTORING_ERROR_CODE, &ecode);
+            ecode =3D vmread_unsafe(IDT_VECTORING_ERROR_CODE);
         else
-             ecode =3D -1;
+            ecode =3D -1;
=20
         hvm_task_switch(exit_qualification, reasons[source], ecode, inst_l=
en,
                         0 /* EFLAGS.RF already updated. */);
@@ -4565,7 +4538,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
         break;
     case EXIT_REASON_INVLPG:
         update_guest_eip(); /* Safe: INVLPG */
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        exit_qualification =3D vmread_unsafe(EXIT_QUALIFICATION);
         vmx_invlpg_intercept(exit_qualification);
         break;
     case EXIT_REASON_RDTSCP:
@@ -4591,13 +4564,13 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_=
regs *regs)
=20
     case EXIT_REASON_CR_ACCESS:
     {
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        exit_qualification =3D vmread_unsafe(EXIT_QUALIFICATION);
         if ( vmx_cr_access(exit_qualification) =3D=3D X86EMUL_OKAY )
             update_guest_eip(); /* Safe: MOV Cn, LMSW, CLTS */
         break;
     }
     case EXIT_REASON_DR_ACCESS:
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        exit_qualification =3D vmread_unsafe(EXIT_QUALIFICATION);
         vmx_dr_access(exit_qualification, regs);
         break;
     case EXIT_REASON_MSR_READ:
@@ -4671,7 +4644,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
         break;
=20
     case EXIT_REASON_EOI_INDUCED:
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        exit_qualification =3D vmread_unsafe(EXIT_QUALIFICATION);
=20
         ASSERT(cpu_has_vmx_virtual_intr_delivery);
=20
@@ -4695,7 +4668,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
         unsigned int bytes;
         int rc;
=20
-        __vmread(EXIT_QUALIFICATION, &io_qual.raw);
+        io_qual.raw =3D vmread_unsafe(EXIT_QUALIFICATION);
         bytes =3D io_qual.size + 1;
=20
         rc =3D hvm_monitor_io(io_qual.port, bytes, io_qual.in, io_qual.str=
);
@@ -4728,10 +4701,9 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_r=
egs *regs)
=20
     case EXIT_REASON_EPT_VIOLATION:
     {
-        paddr_t gpa;
+        paddr_t gpa =3D vmread_unsafe(GUEST_PHYSICAL_ADDRESS);
=20
-        __vmread(GUEST_PHYSICAL_ADDRESS, &gpa);
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        exit_qualification =3D vmread_unsafe(EXIT_QUALIFICATION);
=20
         if ( unlikely(exit_qualification & INTR_INFO_NMI_UNBLOCKED_BY_IRET=
) &&
              !(idtv_info & INTR_INFO_VALID_MASK) )
@@ -4743,9 +4715,8 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
=20
     case EXIT_REASON_EPT_MISCONFIG:
     {
-        paddr_t gpa;
+        paddr_t gpa =3D vmread_unsafe(GUEST_PHYSICAL_ADDRESS);
=20
-        __vmread(GUEST_PHYSICAL_ADDRESS, &gpa);
         if ( !ept_handle_misconfig(gpa) )
             goto exit_and_crash;
         break;
@@ -4781,7 +4752,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
         break;
=20
     case EXIT_REASON_PML_FULL:
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        exit_qualification =3D vmread_unsafe(EXIT_QUALIFICATION);
=20
         if ( unlikely(exit_qualification & INTR_INFO_NMI_UNBLOCKED_BY_IRET=
) &&
              !(idtv_info & INTR_INFO_VALID_MASK) )
@@ -4804,7 +4775,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
         break;
=20
     case EXIT_REASON_NOTIFY:
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        exit_qualification =3D vmread_unsafe(EXIT_QUALIFICATION);
=20
         if ( unlikely(exit_qualification & NOTIFY_VM_CONTEXT_INVALID) )
         {
diff --git a/xen/arch/x86/hvm/vmx/vvmx.c b/xen/arch/x86/hvm/vmx/vvmx.c
index ceb5e5a322..3ae65683ee 100644
--- a/xen/arch/x86/hvm/vmx/vvmx.c
+++ b/xen/arch/x86/hvm/vmx/vvmx.c
@@ -400,8 +400,7 @@ static int decode_vmx_inst(struct cpu_user_regs *regs,
     unsigned long base, index, seg_base, disp, offset;
     int scale, size;
=20
-    __vmread(VMX_INSTRUCTION_INFO, &offset);
-    info.word =3D offset;
+    info.word =3D vmread_unsafe(VMX_INSTRUCTION_INFO);
=20
     if ( info.fields.memreg ) {
         decode->type =3D VMX_INST_MEMREG_TYPE_REG;
@@ -428,7 +427,7 @@ static int decode_vmx_inst(struct cpu_user_regs *regs,
=20
         scale =3D 1 << info.fields.scaling;
=20
-        __vmread(EXIT_QUALIFICATION, &disp);
+        disp =3D vmread_unsafe(EXIT_QUALIFICATION);
=20
         size =3D 1 << (info.fields.addr_size + 1);
=20
@@ -997,7 +996,7 @@ static void vvmcs_to_shadow_bulk(struct vcpu *v, unsign=
ed int n,
=20
     virtual_vmcs_enter(v);
     for ( i =3D 0; i < n; i++ )
-        __vmread(field[i], &value[i]);
+        value[i] =3D vmread_unsafe(field[i]);
     virtual_vmcs_exit(v);
=20
     for ( i =3D 0; i < n; i++ )
@@ -1012,7 +1011,7 @@ fallback:
=20
 static inline void shadow_to_vvmcs(const struct vcpu *v, unsigned int fiel=
d)
 {
-    unsigned long value;
+    unsigned long value =3D 0;
=20
     if ( vmread_safe(field, &value) =3D=3D 0 )
         set_vvmcs(v, field, value);
@@ -1036,7 +1035,7 @@ static void shadow_to_vvmcs_bulk(struct vcpu *v, unsi=
gned int n,
     }
=20
     for ( i =3D 0; i < n; i++ )
-        __vmread(field[i], &value[i]);
+        value[i] =3D vmread_unsafe(field[i]);
=20
     virtual_vmcs_enter(v);
     for ( i =3D 0; i < n; i++ )
@@ -1405,7 +1404,7 @@ static void nvmx_update_apicv(struct vcpu *v)
     }
     else
        /* Keep previous SVI if there's any. */
-       __vmread(GUEST_INTR_STATUS, &status);
+       status =3D vmread_unsafe(GUEST_INTR_STATUS);
=20
     rvi =3D vlapic_has_pending_irq(v);
     if ( rvi !=3D -1 )
@@ -1687,7 +1686,6 @@ static int nvmx_handle_vmresume(struct cpu_user_regs =
*regs)
     bool launched;
     struct vcpu *v =3D current;
     struct nestedvmx *nvmx =3D &vcpu_2_nvmx(v);
-    unsigned long intr_shadow;
     int rc;
=20
     if ( !vvmcx_valid(v) )
@@ -1696,8 +1694,7 @@ static int nvmx_handle_vmresume(struct cpu_user_regs =
*regs)
         return X86EMUL_OKAY;       =20
     }
=20
-    __vmread(GUEST_INTERRUPTIBILITY_INFO, &intr_shadow);
-    if ( intr_shadow & VMX_INTR_SHADOW_MOV_SS )
+    if ( vmread_unsafe(GUEST_INTERRUPTIBILITY_INFO) & VMX_INTR_SHADOW_MOV_=
SS )
     {
         vmfail_valid(regs, VMX_INSN_VMENTRY_BLOCKED_BY_MOV_SS);
         return X86EMUL_OKAY;
@@ -1723,7 +1720,6 @@ static int nvmx_handle_vmlaunch(struct cpu_user_regs =
*regs)
     bool launched;
     struct vcpu *v =3D current;
     struct nestedvmx *nvmx =3D &vcpu_2_nvmx(v);
-    unsigned long intr_shadow;
     int rc;
=20
     if ( !vvmcx_valid(v) )
@@ -1732,8 +1728,7 @@ static int nvmx_handle_vmlaunch(struct cpu_user_regs =
*regs)
         return X86EMUL_OKAY;
     }
=20
-    __vmread(GUEST_INTERRUPTIBILITY_INFO, &intr_shadow);
-    if ( intr_shadow & VMX_INTR_SHADOW_MOV_SS )
+    if ( vmread_unsafe(GUEST_INTERRUPTIBILITY_INFO) & VMX_INTR_SHADOW_MOV_=
SS )
     {
         vmfail_valid(regs, VMX_INSN_VMENTRY_BLOCKED_BY_MOV_SS);
         return X86EMUL_OKAY;
@@ -2355,7 +2350,7 @@ int cf_check nvmx_hap_walk_L1_p2m(
=20
     vmx_vmcs_enter(v);
=20
-    __vmread(EXIT_QUALIFICATION, &exit_qual);
+    exit_qual =3D vmread_unsafe(EXIT_QUALIFICATION);
     rc =3D nept_translate_l2ga(v, L2_gpa, page_order, rwx_rights, &gfn, p2=
m_acc,
                              &exit_qual, &exit_reason);
     switch ( rc )
@@ -2391,7 +2386,7 @@ void nvmx_idtv_handling(void)
     struct nestedvcpu *nvcpu =3D &vcpu_nestedhvm(v);
     unsigned long idtv_info, reason;
=20
-    __vmread(IDT_VECTORING_INFO, &idtv_info);
+    idtv_info =3D vmread_unsafe(IDT_VECTORING_INFO);
     if ( likely(!(idtv_info & INTR_INFO_VALID_MASK)) )
         return;
=20
@@ -2399,7 +2394,7 @@ void nvmx_idtv_handling(void)
      * If L0 can solve the fault that causes idt vectoring, it should
      * be reinjected, otherwise, pass to L1.
      */
-    __vmread(VM_EXIT_REASON, &reason);
+    reason =3D vmread_unsafe(VM_EXIT_REASON);
     if ( (uint16_t)reason !=3D EXIT_REASON_EPT_VIOLATION ?
          !(nvmx->intr.intr_info & INTR_INFO_VALID_MASK) :
          !nvcpu->nv_vmexit_pending )
@@ -2407,7 +2402,7 @@ void nvmx_idtv_handling(void)
         __vmwrite(VM_ENTRY_INTR_INFO, idtv_info & ~INTR_INFO_RESVD_BITS_MA=
SK);
         if ( idtv_info & INTR_INFO_DELIVER_CODE_MASK )
         {
-            __vmread(IDT_VECTORING_ERROR_CODE, &reason);
+            reason =3D vmread_unsafe(IDT_VECTORING_ERROR_CODE);
             __vmwrite(VM_ENTRY_EXCEPTION_ERROR_CODE, reason);
         }
         /*
@@ -2418,7 +2413,7 @@ void nvmx_idtv_handling(void)
          * This means EXIT_INSTRUCTION_LEN is always valid here, for
          * software interrupts both injected by L1, and generated in L2.
          */
-        __vmread(VM_EXIT_INSTRUCTION_LEN, &reason);
+        reason =3D vmread_unsafe(VM_EXIT_INSTRUCTION_LEN);
         __vmwrite(VM_ENTRY_INSTRUCTION_LEN, reason);
    }
 }
@@ -2452,7 +2447,7 @@ int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs=
,
         u64 exec_bitmap;
         int vector;
=20
-        __vmread(VM_EXIT_INTR_INFO, &intr_info);
+        intr_info =3D vmread_unsafe(VM_EXIT_INTR_INFO);
         vector =3D intr_info & INTR_INFO_VECTOR_MASK;
         /*
          * decided by L0 and L1 exception bitmap, if the vetor is set by
@@ -2531,7 +2526,7 @@ int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs=
,
             unsigned long qual;
             u16 port, size;
=20
-            __vmread(EXIT_QUALIFICATION, &qual);
+            qual =3D vmread_unsafe(EXIT_QUALIFICATION);
             port =3D qual >> 16;
             size =3D (qual & 7) + 1;
             do {
@@ -2638,7 +2633,7 @@ int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs=
,
         cr_access_qual_t qual;
         u32 mask =3D 0;
=20
-        __vmread(EXIT_QUALIFICATION, &qual.raw);
+        qual.raw =3D vmread_unsafe(EXIT_QUALIFICATION);
         /* also according to guest exec_control */
         ctrl =3D __n2_exec_control(v);
=20
@@ -2680,7 +2675,7 @@ int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs=
,
                 {
                     u64 cr0_gh_mask =3D get_vvmcs(v, CR0_GUEST_HOST_MASK);
=20
-                    __vmread(CR0_READ_SHADOW, &old_val);
+                    old_val =3D vmread_unsafe(CR0_READ_SHADOW);
                     changed_bits =3D old_val ^ val;
                     if ( changed_bits & cr0_gh_mask )
                         nvcpu->nv_vmexit_pending =3D 1;
@@ -2696,7 +2691,7 @@ int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs=
,
                 {
                     u64 cr4_gh_mask =3D get_vvmcs(v, CR4_GUEST_HOST_MASK);
=20
-                    __vmread(CR4_READ_SHADOW, &old_val);
+                    old_val =3D vmread_unsafe(CR4_READ_SHADOW);
                     changed_bits =3D old_val ^ val;
                     if ( changed_bits & cr4_gh_mask )
                         nvcpu->nv_vmexit_pending =3D 1;
@@ -2732,7 +2727,7 @@ int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs=
,
             {
                 u64 cr0_gh_mask =3D get_vvmcs(v, CR0_GUEST_HOST_MASK);
=20
-                __vmread(CR0_READ_SHADOW, &old_val);
+                old_val =3D vmread_unsafe(CR0_READ_SHADOW);
                 old_val &=3D X86_CR0_PE|X86_CR0_MP|X86_CR0_EM|X86_CR0_TS;
                 val =3D qual.lmsw_data &
                       (X86_CR0_PE|X86_CR0_MP|X86_CR0_EM|X86_CR0_TS);
diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm/d=
omain.h
index 6b877e33a1..ffe9acd75d 100644
--- a/xen/arch/x86/include/asm/domain.h
+++ b/xen/arch/x86/include/asm/domain.h
@@ -595,7 +595,7 @@ struct arch_vcpu
=20
     /* Debug registers. */
     unsigned long dr[4];
-    unsigned long dr7; /* Ideally int, but __vmread() needs long. */
+    unsigned long dr7; /* Ideally int, but vmread_unsafe() needs unsigned =
long. */
     unsigned int dr6;
=20
     /* other state */
diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmx.h b/xen/arch/x86/include/=
asm/hvm/vmx/vmx.h
index 33d3d43a38..c96e9f4711 100644
--- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h
+++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h
@@ -320,16 +320,40 @@ static always_inline void __vmpclear(u64 addr)
     BUG();
 }
=20
-static always_inline void __vmread(unsigned long field, unsigned long *val=
ue)
+static always_inline unsigned long vmread_unsafe(unsigned long field)
 {
-    asm volatile ( "vmread %1, %0\n\t"
-                   /* CF=3D=3D1 or ZF=3D=3D1 --> BUG() */
-                   UNLIKELY_START(be, vmread)
-                   _ASM_BUGFRAME_TEXT(0)
-                   UNLIKELY_END_SECTION
-                   : "=3Drm" (*value)
-                   : "r" (field),
-                     _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, =
0) );
+    unsigned long value;
+
+    asm volatile ( "vmread %[field], %[value]\n\t"
+                   "jc 1f\n\t"
+                   "jz 1f\n\t"
+                   "jmp 2f\n\t"
+                   "1:\n\t"
+                   "    ud2\n\t"
+                   "2:"
+                   : [value] "=3Drm" (value)
+                   : [field] "r" (field) );
+
+    return value;
+}
+
+static inline enum vmx_insn_errno vmread_safe(unsigned long field,
+                                              unsigned long *value)
+{
+    asm goto ( "vmread %[field], %[value]\n\t"
+               "jc %l[vmfail_invalid]\n\t"
+               "jz %l[vmfail_error]"
+               :
+               : [field] "r" (field), [value] "m" (*value)
+               :
+               : vmfail_invalid, vmfail_error );
+    return VMX_INSN_SUCCEED;
+
+ vmfail_invalid:
+    return VMX_INSN_FAIL_INVALID;
+
+ vmfail_error:
+    return vmread_unsafe(VM_INSTRUCTION_ERROR);
 }
=20
 static always_inline void __vmwrite(unsigned long field, unsigned long val=
ue)
@@ -346,33 +370,9 @@ static always_inline void __vmwrite(unsigned long fiel=
d, unsigned long value)
     BUG();
 }
=20
-static inline enum vmx_insn_errno vmread_safe(unsigned long field,
-                                              unsigned long *value)
-{
-    unsigned long ret =3D VMX_INSN_SUCCEED;
-    bool fail_invalid, fail_valid;
-
-    asm volatile ( "vmread %[field], %[value]\n\t"
-                   ASM_FLAG_OUT(, "setc %[invalid]\n\t")
-                   ASM_FLAG_OUT(, "setz %[valid]\n\t")
-                   : ASM_FLAG_OUT("=3D@ccc", [invalid] "=3Drm") (fail_inva=
lid),
-                     ASM_FLAG_OUT("=3D@ccz", [valid] "=3Drm") (fail_valid)=
,
-                     [value] "=3Drm" (*value)
-                   : [field] "r" (field) );
-
-    if ( unlikely(fail_invalid) )
-        ret =3D VMX_INSN_FAIL_INVALID;
-    else if ( unlikely(fail_valid) )
-        __vmread(VM_INSTRUCTION_ERROR, &ret);
-
-    return ret;
-}
-
 static inline enum vmx_insn_errno vmwrite_safe(unsigned long field,
                                                unsigned long value)
 {
-    unsigned long ret;
-
     asm goto ( "vmwrite %[value], %[field]\n\t"
                "jc %l[vmfail_invalid]\n\t"
                "jz %l[vmfail_error]"
@@ -386,8 +386,7 @@ static inline enum vmx_insn_errno vmwrite_safe(unsigned=
 long field,
     return VMX_INSN_FAIL_INVALID;
=20
  vmfail_error:
-    __vmread(VM_INSTRUCTION_ERROR, &ret);
-    return ret;
+    return vmread_unsafe(VM_INSTRUCTION_ERROR);
 }
=20
 static always_inline void __invept(unsigned long type, uint64_t eptp)
--=20
2.34.1




From xen-devel-bounces@lists.xenproject.org Tue Apr 08 01:58:31 2025
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Date: Tue, 8 Apr 2025 11:58:13 +1000
From: Stephen Rothwell 
To: Juergen Gross , Konrad Rzeszutek Wilk
 , Stefano Stabellini ,
 Boris Ostrovsky , Andrew Morton
 
Cc: Arnd Bergmann , Xen Devel
 , Linux Kernel Mailing List
 , Linux Next Mailing List
 
Subject: linux-next: manual merge of the xen-tip tree with the mm-hotfixes
 tree
Message-ID: <20250408115813.0a5365ef@canb.auug.org.au>
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Hi all,

Today's linux-next merge of the xen-tip tree got a conflict in:

  drivers/xen/xenbus/xenbus_probe_frontend.c

between commit:

  5be5772b1f96 ("xenbus: add module description")

from the mm-hotfixes tree and commit:

  b40c54648158 ("xenbus: add module description")

from the xen-tip tree.

I fixed it up (I just used the latter version) and can carry the fix as
necessary. This is now fixed as far as linux-next is concerned, but any
non trivial conflicts should be mentioned to your upstream maintainer
when your tree is submitted for merging.  You may also want to consider
cooperating with the maintainer of the conflicting tree to minimise any
particularly complex conflicts.

--=20
Cheers,
Stephen Rothwell

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From: Mykola Kvach 
To: xen-devel@lists.xenproject.org
Cc: Mykola Kvach ,
	Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk 
Subject: [PATCH] arm/irq: Reduce size of irq_desc array to exclude local IRQs
Date: Tue,  8 Apr 2025 06:42:19 +0300
Message-ID: 
X-Mailer: git-send-email 2.43.0
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit

From: Mykola Kvach 

SGI and PPI descriptors are banked and stored in the per-CPU local_irq_desc
array, so not all elements of the global irq_desc array are used. This is
already accounted for in the descriptor lookup logic inside __irq_to_desc:
    return &irq_desc[irq - NR_LOCAL_IRQS];

Therefore, the size of the irq_desc array can be reduced by NR_LOCAL_IRQS,
saving (NR_LOCAL_IRQS * L1_CACHE_BYTES) bytes of memory.

Signed-off-by: Mykola Kvach 
---
 xen/arch/arm/irq.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c
index b9757d7ad3..03fbb90c6c 100644
--- a/xen/arch/arm/irq.c
+++ b/xen/arch/arm/irq.c
@@ -45,7 +45,7 @@ void irq_end_none(struct irq_desc *irq)
     gic_hw_ops->gic_host_irq_type->end(irq);
 }
 
-static irq_desc_t irq_desc[NR_IRQS];
+static irq_desc_t irq_desc[NR_IRQS - NR_LOCAL_IRQS];
 static DEFINE_PER_CPU(irq_desc_t[NR_LOCAL_IRQS], local_irq_desc);
 
 struct irq_desc *__irq_to_desc(unsigned int irq)
-- 
2.43.0



From xen-devel-bounces@lists.xenproject.org Tue Apr 08 05:50:28 2025
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Date: Tue, 8 Apr 2025 07:49:56 +0200
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Subject: Re: [PATCH v5 0/5] Switch more ARM plats to sys-off handler API
To: Andrew Davis , Arnd Bergmann ,
 Andre Przywara , Russell King
 , Daniel Mack ,
 Haojian Zhuang ,
 Robert Jarzmik , Alexey Charkov ,
 Stefano Stabellini 
Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
 xen-devel@lists.xenproject.org
References: <20250407185650.411887-1-afd@ti.com>
From: Krzysztof Kozlowski 
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On 07/04/2025 20:56, Andrew Davis wrote:
> Hello all,
> 
> Continuing the quest to remove the legacy pm_power_off() global
> function handler. Remove uses from arch/arm/ using the helper
> register_platform_power_off().
> 
> These have been sent for several cycles without feedback, not
> sure if there are anymore active platform maintainers who
> can take these individually, maybe these remaining could
> go in directly though the arm-soc tree?
I was waiting for explaining the dependencies, to know if I can or
cannot pick up. I don't see much changed here.

Best regards,
Krzysztof


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Subject: Re: [PATCH v3 1/7] xen: introduce hardware domain create flag
To: Jason Andryuk 
Cc: "Daniel P. Smith" ,
 Stefano Stabellini , Julien Grall ,
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 Anthony PERARD ,
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On 07.04.2025 20:16, Jason Andryuk wrote:
> On 2025-04-04 03:38, Jan Beulich wrote:
>> On 03.04.2025 23:46, Jason Andryuk wrote:
>>> From: "Daniel P. Smith" 
>>>
>>> Add and use a new internal create domain flag to specify the hardware
>>> domain.  This removes the hardcoding of domid 0 as the hardware domain.
>>>
>>> This allows more flexibility with domain creation.
>>>
>>> Signed-off-by: Daniel P. Smith 
>>> Signed-off-by: Jason Andryuk 
>>> Reviewed-by: Jan Beulich 
>>> ---
>>> v3:
>>> Or-in CDF_hardware for late hwdom case
>>
>> Except that ...
>>
>>> --- a/xen/common/domain.c
>>> +++ b/xen/common/domain.c
>>> @@ -820,13 +820,18 @@ struct domain *domain_create(domid_t domid,
>>>       d->is_privileged = flags & CDF_privileged;
>>>   
>>>       /* Sort out our idea of is_hardware_domain(). */
>>> -    if ( domid == 0 || domid == hardware_domid )
>>> +    if ( (flags & CDF_hardware) || domid == hardware_domid )
>>>       {
>>>           if ( hardware_domid < 0 || hardware_domid >= DOMID_FIRST_RESERVED )
>>>               panic("The value of hardware_dom must be a valid domain ID\n");
>>>   
>>> +        /* late_hwdom is only allowed for dom0. */
>>> +        if ( hardware_domain && hardware_domain->domain_id )
>>> +            return ERR_PTR(-EINVAL);
>>> +
>>>           old_hwdom = hardware_domain;
>>>           hardware_domain = d;
>>> +        flags |= CDF_hardware;
>>>       }
>>
>> ... this isn't quite enough. You're only modifying what will go out of scope
>> when returning from the function. What's at least equally important to OR into
>> is d->cdf.
> 
> Yes, thanks for catching that.
> 
> I'll move d->cdf assignment to after here instead of or-ing in a second 
> time.

Not sure that'll be good to do - intermediate code (in particular passing
d to other functions) may need to have that set already. And even if not
now, then maybe going forward.

> With that, it seems like it should also be removed from old_hwdom?
> 
> old_hwdom->cdf &= ~CDF_hardware

Oh, indeed. Thanks in turn for catching this further aspect.

Jan


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Date: Tue, 8 Apr 2025 08:24:33 +0200
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Subject: Re: [PATCH] tools/libxl: Skip invalid IRQs
To: Jason Andryuk 
Cc: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
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On 07.04.2025 21:26, Jason Andryuk wrote:
> A PCI device's irq field is an 8-bit number.  A value of 0xff indicates
> that the device is not connected.

Nit: "... that the device IRQ is not ..."

>  Additionally, the Linux ACPI code can
> convert these 0xff values to IRQ_NOTCONNECTED(0x80000000) because
> "0x80000000 is guaranteed to be outside the available range of
> interrupts and easy to distinguish from other possible incorrect
> values."  When the hypercall to assign that IRQ fails, device
> passthrough as a whole fails.
> 
> Add checking for a valid IRQ and skip the IRQ handling for PCI devices
> outside that range.  This allows for passthrough of devices without
> legacy IRQs.

Which makes the code here even more Linux-centric, I guess.

A couple of related notes, yet most not directly affecting this patch:

> --- a/tools/libs/light/libxl_pci.c
> +++ b/tools/libs/light/libxl_pci.c
> @@ -26,6 +26,9 @@
>  #define PCI_BDF_XSPATH         "%04x-%02x-%02x-%01x"
>  #define PCI_PT_QDEV_ID         "pci-pt-%02x_%02x.%01x"
>  
> +/* PCI Interrupt Line is an 8-bit value, 0xff means disconnected. */
> +#define PCI_IRQ_LINE_LIMIT     0xff
> +
>  static unsigned int pci_encode_bdf(libxl_device_pci *pci)
>  {
>      unsigned int value;
> @@ -1495,7 +1498,8 @@ static void pci_add_dm_done(libxl__egc *egc,
>              LOGED(ERROR, domainid, "Couldn't open %s", sysfs_path);
>              goto out_no_irq;
>          }
> -        if ((fscanf(f, "%u", &irq) == 1) && irq) {
> +        if ((fscanf(f, "%u", &irq) == 1) &&

For this, "irq" ought to be unsigned int. Same below.

> +            irq > 0 && irq < PCI_IRQ_LINE_LIMIT) {

Not sure about this in libxl's style, but it feels inconsistent to have
parentheses around one relational expression but then not around the
others. Personally I'd drop them all, but the alternative clearly is to
add missing ones.

>              r = xc_physdev_map_pirq(ctx->xch, domid, irq, &irq);
>              if (r < 0) {
>                  LOGED(ERROR, domainid, "xc_physdev_map_pirq irq=%d (error=%d)",
> @@ -2257,7 +2261,8 @@ skip_bar:
>              goto skip_legacy_irq;
>          }
>  
> -        if ((fscanf(f, "%u", &irq) == 1) && irq) {
> +        if ((fscanf(f, "%u", &irq) == 1) &&
> +            irq > 0 && irq < PCI_IRQ_LINE_LIMIT) {
>              rc = xc_physdev_unmap_pirq(ctx->xch, domid, irq);
>              if (rc < 0) {
>                  /*

This is doing things in sensible order: unmap, then remove permissions.
The map side though adds permissions only after mapping. That's kind of
necessary because the value to pass into xc_domain_irq_permission() is
an output of xc_physdev_map_pirq(). Yet then the latter should have
failed for lack of permissions, unless permissions were granted another
way? In which case what's the point of granting permissions here?

Jan


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From: "Kwon, Gihwan" 
To: Stefano Stabellini ,
        Nicola Vetrini
	
CC: "xen-devel@lists.xenproject.org" ,
        "stewart.hildebrand@amd.com" 
Subject: RE: [QUESTION] Minimal Xen Configuration
Thread-Topic: [QUESTION] Minimal Xen Configuration
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Date: Tue, 8 Apr 2025 06:25:20 +0000
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X-TM-AS-GCONF: 00

Stefano and Nicola,

> Stefano, Nicola
>=20
>> On Wed, 2 Apr 2025, Nicola Vetrini wrote:
>>> On 2025-03-28 07:43, Kwon, Gihwan wrote:
>>>> Dear Xen Community,
>>>>=20
>>>> I hope this message finds you well.
>>>>=20
>>>> I have heard that there exists a minimal Xen configuration optimized
>>>> for safety-critical products, particularly in automotive applications,
>>>> with the code size reduced to approximately 50k SLOC.
>>>>=20
>>>> Could anyone provide guidance or point me to relevant resources
>>>> regarding this minimal Xen configuration? Any insights or references
>>>> would be greatly appreciated.
>>>>=20
>>>> Thank you in advance for your assistance.
>>>>=20
>>>> Best regards,
>>>> Gihwan Kwon
>>>=20
>>> Hello,
>>>=20
>>> I am part of the team that provides static analysis for Xen, mainly
>>> towards the objective to make Xen compliant with MISRA C guidelines.
>>> As part of that effort, a minimal Xen configuration has been defined
>>> (for Arm and x86_64) at [1], which is the one currently analyzed for
>>> static analysis for each commit [2]. It starts from the default
>>> configuration for the architecture (i.e., make defconfig) and then
>>> turns on or off various Kconfig options, as specified by
>>> EXTRA_XEN_CONFIG.
>>>=20
>>> @Stefano Stabellini (Cc'ed) is the main driving force behind the Xen
>>> certification effort for automotive, therefore he's probably the best
>>> person to approach to get more information on this matter.
>>=20
>> Thanks Nicola. In addition to what Nicola wrote, there is an outstanding
>> activity to further reduce the code size by adding more kconfig options.
>> There are a couple of patch series on the list right now to that effect.
>>=20
>> https://marc.info/?l=3Dxen-devel&m=3D173745442831026
>>=20
>> Last year we ran some experiments and for ARM we should be able to go
>> below 35K LOC. The tools measuring LOC are very imprecise as they do
>> not account for #ifdefs and kconfig options. So we switched to text
>> binary size for measurements as it is more accurate. do not account for
>> kconfig options and #ifdefs. Hence, we switch to using text size as
>> size measurement for Xen. One of the figure was XXX.
>=20
> Thank you for sharing information regarding the current minimal config
> and additional activities. I have reviewed the configuration applied to t=
he
>  CI and have a question.
> Currently, `CONFIG_SCHED_RTDS` is enabled instead of
> `CONFIG_SCHED_CREDIT2` and `CONFIG_SCHED_CREDIT`. Is this because
> ARINC653 scheduler cannot be used as default scheduler, as well as, rt
> scheduler is smaller than credit2 or credit scheduler?

Please disregard my previous message. I have double checked that=20
mentioned configurations are set 'n'. Therefore,  `CONFIG_SCHED_NULL`=20
and  `CONFIG_SCHED_CREDIT2` is being set and used in the minimal xen=20
configuration.

>=20
> - Gihwan
>=20
>

- Gihwan




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Subject: Re: [PATCH v4 1/2] xen: x86: irq: initialize irq desc in create_irq()
To: Volodymyr Babchuk 
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On 07.04.2025 18:46, Volodymyr Babchuk wrote:
> While building xen with GCC 14.2.1 with "-fcondition-coverage" option
> or with "-Og", the compiler produces a false positive warning:
> 
>   arch/x86/irq.c: In function ‘create_irq’:
>   arch/x86/irq.c:281:11: error: ‘desc’ may be used uninitialized [-Werror=maybe-uninitialized]
>     281 |     ret = init_one_irq_desc(desc);
>         |           ^~~~~~~~~~~~~~~~~~~~~~~
>   arch/x86/irq.c:269:22: note: ‘desc’ was declared here
>     269 |     struct irq_desc *desc;
>         |                      ^~~~
>   cc1: all warnings being treated as errors
>   make[2]: *** [Rules.mk:252: arch/x86/irq.o] Error 1
> 
> While we have signed/unsigned comparison both in "for" loop and in
> "if" statement, this still can't lead to use of uninitialized "desc",
> as either loop will be executed at least once, or the function will
> return early. So this is a clearly false positive warning due to a
> bug [1] in GCC.
> 
> Initialize "desc" with NULL to make GCC happy.
> 
> [1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119665
> 
> Signed-off-by: Volodymyr Babchuk 

Reviewed-by: Jan Beulich 




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Subject: Re: [PATCH v4 2/2] xen: debug: gcov: add condition coverage support
To: Volodymyr Babchuk 
Cc: Andrew Cooper ,
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 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 07.04.2025 18:46, Volodymyr Babchuk wrote:
> --- a/xen/Rules.mk
> +++ b/xen/Rules.mk
> @@ -31,6 +31,7 @@ CFLAGS-y :=
>  AFLAGS-y :=
>  nocov-y :=
>  noubsan-y :=
> +cov-flags-y :=

Personally I would have put this slightly higher up, at least ahead of the two
no*-y. Thinking of it only now (sorry), also maybe cov-cflags-y might be
slightly better a name?

> @@ -133,19 +134,18 @@ $(filter %.init.o,$(obj-y) $(obj-bin-y) $(extra-y)): CFLAGS-y += -DINIT_SECTIONS
>  
>  non-init-objects = $(filter-out %.init.o, $(obj-y) $(obj-bin-y) $(extra-y))
>  
> -ifeq ($(CONFIG_COVERAGE),y)
>  ifeq ($(CONFIG_CC_IS_CLANG),y)
> -    COV_FLAGS := -fprofile-instr-generate -fcoverage-mapping
> +    cov-flags-$(CONFIG_COVERAGE) := -fprofile-instr-generate -fcoverage-mapping
>  else
> -    COV_FLAGS := -fprofile-arcs -ftest-coverage
> +    cov-flags-$(CONFIG_COVERAGE) := -fprofile-arcs -ftest-coverage
> +    cov-flags-$(CONFIG_CONDITION_COVERAGE) += -fcondition-coverage

Why's this inside the remaining ifeq(,)? Surely there's at least a chance for
Clang to also support the option at some point?

Jan


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Subject: Re: [PATCH v4 1/7] xen: introduce hardware domain create flag
To: Jason Andryuk 
Cc: "Daniel P. Smith" ,
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On 07.04.2025 21:40, Jason Andryuk wrote:
> From: "Daniel P. Smith" 
> 
> Add and use a new internal create domain flag to specify the hardware
> domain.  This removes the hardcoding of domid 0 as the hardware domain.
> 
> This allows more flexibility with domain creation.
> 
> The assignment of d->cdf is moved later so CDF_hardware is added for the
> late_hwdom case.  Also old_hwdom has the flag removed to reflect the
> change.
> 
> Signed-off-by: Daniel P. Smith 
> Signed-off-by: Jason Andryuk 

Reviewed-by: Jan Beulich 
i.e. ...


> ---
> v4:
> Move d->cdf assignment later

... despite my earlier concern this movement looks fine to me.

Jan


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Subject: Re: [PATCH v8 1/3] xen: common: add ability to enable stack protector
To: Volodymyr Babchuk 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Nicola Vetrini ,
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On 08.04.2025 00:40, Volodymyr Babchuk wrote:
> Both GCC and Clang support -fstack-protector feature, which add stack
> canaries to functions where stack corruption is possible. This patch
> makes general preparations to enable this feature on different
> supported architectures:
> 
>  - Added CONFIG_HAS_STACK_PROTECTOR option so each architecture
>    can enable this feature individually
>  - Added user-selectable CONFIG_STACK_PROTECTOR option
>  - Implemented code that sets up random stack canary and a basic
>    handler for stack protector failures
> 
> Stack guard value is initialized in two phases:
> 
> 1. Pre-defined randomly-selected value.
> 
> 2. Own implementation of linear congruent random number generator. It
> relies on get_cycles() being available very early. If get_cycles()
> returns zero, it would leave pre-defined value from the previous step.
> 
> boot_stack_chk_guard_setup() is declared as always_inline to ensure
> that it will not trigger stack protector by itself. And of course,
> caller should ensure that stack protection code will not be reached
> later. It is possible to call the same function from an ASM code by
> introducing simple trampoline in stack-protector.c, but right now
> there is no use case for such trampoline.
> 
> As __stack_chk_fail() is not called by Xen source code directly, and
> only called by compiler-generated code, it does not needed to be
> declared separately. So we need separate MISRA deviation for it.
> 
> Signed-off-by: Volodymyr Babchuk 
> 
> ---
> 
> Changes in v8:
>  - Code formatting fixes
>  - Added an explicit MISRA deviation for __stack_chk_fail()
>  - Marked __stack_chk_fail() as noreturn
> 
> Changes in v7:
>  - declared boot_stack_chk_guard_setup as always_inline
>  - moved `#ifdef CONFIG_STACK_PROTECTOR` inside the function
> 
> Changes in v6:
>  - boot_stack_chk_guard_setup() moved to stack-protector.h
>  - Removed Andrew's r-b tag
> 
> Changes in v5:
>  - Fixed indentation
>  - Added stack-protector.h
> ---
>  docs/misra/safe.json              |  8 +++++++
>  xen/Makefile                      |  4 ++++
>  xen/common/Kconfig                | 15 ++++++++++++
>  xen/common/Makefile               |  1 +
>  xen/common/stack-protector.c      | 22 +++++++++++++++++
>  xen/include/xen/stack-protector.h | 39 +++++++++++++++++++++++++++++++
>  6 files changed, 89 insertions(+)
>  create mode 100644 xen/common/stack-protector.c
>  create mode 100644 xen/include/xen/stack-protector.h
> 
> diff --git a/docs/misra/safe.json b/docs/misra/safe.json
> index 3d68b59169..e249bcbf81 100644
> --- a/docs/misra/safe.json
> +++ b/docs/misra/safe.json
> @@ -108,6 +108,14 @@
>          },
>          {
>              "id": "SAF-13-safe",
> +            "analyser": {
> +                "eclair": "MC3A2.R8.4"
> +            },
> +            "name": "Rule 8.4: compiler-called function",
> +            "text": "A function, for which compiler generates calls to do not need to have a visible declaration prior to its definition."

Nit: s/ do / does /. Not being a native speaker, I'm still uncertain of the need for
the comma in the place you put it - it reads odd this way to me (at least without a
2nd comma). I'm anyway inclined to word this differently, to be more precise
(otherwise the deviation here would equally apply to the data item
"__stack_chk_guard"):

"A function, all invocations of which are compiler generated, does not need ..."

With this suitably sorted (can be adjusted on commit to whatever the final outcome
is going to be):
Reviewed-by: Jan Beulich 

Jan


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Subject: Re: [PATCH v1] x86/vmx: Rework __vmread()/vmread_safe()/vmr()
To: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, roger.pau@citrix.com, dmukhin@ford.com,
 xen-devel@lists.xenproject.org
References: <20250408011454.2274613-1-dmukhin@ford.com>
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From: Jan Beulich 
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On 08.04.2025 03:15, dmkhn@proton.me wrote:
> From: Denis Mukhin 
> 
> Use `asm goto()` in vmread_safe() to simplify the error handling logic.

This can't be quite right, considering we need to avoid outputs there.

> Update __vmread() to return `unsigned long` as per suggestion in [1].
> Rename __vmread() to vmread_unsafe() to match the behavior.

I disagree with this renaming: See e.g. rdmsr() and rdmsr_safe() that we have.
The common case function wants to not have unnecessary verbosity in its name.
And there's nothing unsafe about it in the general case. Plus if there was
anything unsafe, many of the call sites would require some form of error
handling.

> @@ -1957,38 +1955,44 @@ void cf_check vmx_do_resume(void)
>      hvm_do_resume(v);
>  
>      /* Sync host CR4 in case its value has changed. */
> -    __vmread(HOST_CR4, &host_cr4);
> -    if ( host_cr4 != read_cr4() )
> +    if ( vmread_unsafe(HOST_CR4) != read_cr4() )
>          __vmwrite(HOST_CR4, read_cr4());
>  
>      reset_stack_and_jump(vmx_asm_do_vmentry);
>  }
>  
> -static inline unsigned long vmr(unsigned long field)
> +static inline unsigned long vmread(unsigned long field)
>  {
> -    unsigned long val;
> +    unsigned long value = 0;
>  
> -    return vmread_safe(field, &val) ? 0 : val;
> +    asm goto ( "vmread %[field], %[value]\n\t"
> +               "jmp %l[out]"

Why's the JMP needed here? With it dropped, why's open-coding of vmread_unsafe()
necessary here? And why's the "safe" variant being replaced by the "unsafe" one?

> +               :
> +               : [field] "r" (field), [value] "m" (value)

"value" is an output and hence cannot be just "m" (and hence be an input").
The only option to make such work correctly would be to ...

> +               :

... add a "memory" clobber here. Which may have other unwanted side effects.

> +               : out );
> +out:

Nit (here and elsewhere): Labels indented by at least one blank please. See
./CODING_STYLE.

> +    return value;
>  }
>  
> -#define vmr16(fld) ({             \
> +#define vmread16(fld) ({          \
>      BUILD_BUG_ON((fld) & 0x6001); \
> -    (uint16_t)vmr(fld);           \
> +    (uint16_t)vmread(fld);        \
>  })
>  
> -#define vmr32(fld) ({                         \
> +#define vmread32(fld) ({                      \
>      BUILD_BUG_ON(((fld) & 0x6001) != 0x4000); \
> -    (uint32_t)vmr(fld);                       \
> +    (uint32_t)vmread(fld);                    \
>  })
>  
>  static void vmx_dump_sel(const char *name, uint32_t selector)
>  {
>      uint32_t sel, attr, limit;
>      uint64_t base;
> -    sel = vmr(selector);
> -    attr = vmr(selector + (GUEST_ES_AR_BYTES - GUEST_ES_SELECTOR));
> -    limit = vmr(selector + (GUEST_ES_LIMIT - GUEST_ES_SELECTOR));
> -    base = vmr(selector + (GUEST_ES_BASE - GUEST_ES_SELECTOR));
> +    sel = vmread(selector);
> +    attr = vmread(selector + (GUEST_ES_AR_BYTES - GUEST_ES_SELECTOR));
> +    limit = vmread(selector + (GUEST_ES_LIMIT - GUEST_ES_SELECTOR));
> +    base = vmread(selector + (GUEST_ES_BASE - GUEST_ES_SELECTOR));

The renaming causes entirely unnecessary extra churn here (and of course
elsewhere). The patch is already big enough without this.

> --- a/xen/arch/x86/include/asm/domain.h
> +++ b/xen/arch/x86/include/asm/domain.h
> @@ -595,7 +595,7 @@ struct arch_vcpu
>  
>      /* Debug registers. */
>      unsigned long dr[4];
> -    unsigned long dr7; /* Ideally int, but __vmread() needs long. */
> +    unsigned long dr7; /* Ideally int, but vmread_unsafe() needs unsigned long. */
>      unsigned int dr6;

If you left this comment alone, all would be (largely) fine - this particular
aspect could then be tidied in a follow-on path. But vmread_unsafe() specifically
does not need "unsigned long" anymore. The issue was with __vmread() taking a
pointer argument.

> --- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h
> +++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h
> @@ -320,16 +320,40 @@ static always_inline void __vmpclear(u64 addr)
>      BUG();
>  }
>  
> -static always_inline void __vmread(unsigned long field, unsigned long *value)
> +static always_inline unsigned long vmread_unsafe(unsigned long field)
>  {
> -    asm volatile ( "vmread %1, %0\n\t"
> -                   /* CF==1 or ZF==1 --> BUG() */
> -                   UNLIKELY_START(be, vmread)
> -                   _ASM_BUGFRAME_TEXT(0)
> -                   UNLIKELY_END_SECTION
> -                   : "=rm" (*value)
> -                   : "r" (field),
> -                     _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, 0) );
> +    unsigned long value;
> +
> +    asm volatile ( "vmread %[field], %[value]\n\t"
> +                   "jc 1f\n\t"
> +                   "jz 1f\n\t"

Why not JBE as it was before?

> +                   "jmp 2f\n\t"
> +                   "1:\n\t"
> +                   "    ud2\n\t"
> +                   "2:"

This is specifically why we used UNLIKELY_*() before. There's no justification
whatsoever in the description for the dropping of its use here.

Plus - where did _ASM_BUGFRAME_TEXT(0) go? A bare UD2 isn't acceptable, as it
won't be possible to associate it back with the respective source line.

> +                   : [value] "=rm" (value)
> +                   : [field] "r" (field) );
> +
> +    return value;
> +}
> +
> +static inline enum vmx_insn_errno vmread_safe(unsigned long field,
> +                                              unsigned long *value)
> +{
> +    asm goto ( "vmread %[field], %[value]\n\t"
> +               "jc %l[vmfail_invalid]\n\t"
> +               "jz %l[vmfail_error]"
> +               :
> +               : [field] "r" (field), [value] "m" (*value)

See comments on the vmr() adjustments you're making.

Jan


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Subject: Re: [PATCH v1] x86/vmx: Rework __vmread()/vmread_safe()/vmr()
From: Jan Beulich 
To: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, roger.pau@citrix.com, dmukhin@ford.com,
 xen-devel@lists.xenproject.org
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On 08.04.2025 09:12, Jan Beulich wrote:
> On 08.04.2025 03:15, dmkhn@proton.me wrote:
>> +static inline enum vmx_insn_errno vmread_safe(unsigned long field,
>> +                                              unsigned long *value)
>> +{
>> +    asm goto ( "vmread %[field], %[value]\n\t"
>> +               "jc %l[vmfail_invalid]\n\t"
>> +               "jz %l[vmfail_error]"
>> +               :
>> +               : [field] "r" (field), [value] "m" (*value)
> 
> See comments on the vmr() adjustments you're making.

Oh, and - why is "+rm" lost here and there? We shouldn't be taking away from
the compiler the option of not going through memory here. Aiui that's solely
because you figured that you can't use "rm" (i.e. an input). But then you
drew the wrong conclusion.

Jan


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Date: Tue, 8 Apr 2025 09:33:24 +0200
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Subject: Re: [PATCH v5 1/3] xen/arm: Move some of the functions to common file
To: Ayan Kumar Halder ,
 xen-devel@lists.xenproject.org
Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
 Volodymyr Babchuk 
References: <20250407184443.1790995-1-ayan.kumar.halder@amd.com>
 <20250407184443.1790995-2-ayan.kumar.halder@amd.com>
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On 07/04/2025 20:44, Ayan Kumar Halder wrote:
> Added a new file common.inc to hold the common earlyboot MPU regions
NIT: Describe your changes in imperative mood

Also, my understanding was that this file will contain common constructs not
only regions related. If this is just for regions, then it's better to name it
regions.inc.

> configurations across arm64 and arm32.
> 
> prepare_xen_region, fail_insufficient_regions() will be used by both arm32 and
> arm64. Thus, they have been moved to common.inc.
> 
> *_PRBAR are moved to arm64/sysregs.h.
> *_PRLAR are moved to common.inc as they are common between arm32 and arm64.
> 
> Introduce WRITE_SYSREG_ASM to write to the system registers from the common asm
> file.
> 
> Signed-off-by: Ayan Kumar Halder 
> ---
> 
> Changes from
> 
> v1 -
> 
> 1. enable_mpu() now sets HMAIR{0,1} registers. This is similar to what is
> being done in enable_mmu(). All the mm related configurations happen in this
> function.
> 
> 2. Fixed some typos.
> 
> v2 -
> 1. Extracted the arm64 head.S functions/macros in a common file.
> 
> v3 -
> 1. Moved *_PRLAR are moved to prepare_xen_region.inc
> 
> 2. enable_boot_cpu_mm() is preserved in mpu/head.S.
> 
> 3. STORE_SYSREG is renamed as WRITE_SYSREG_ASM()
> 
> 4. LOAD_SYSREG is removed.
> 
> 5. No need to save/restore lr in enable_boot_cpu_mm(). IOW, keep it as it was
> in the original code.
> 
> v4 - 
> 1. Rename prepare_xen_region.inc to common.inc
> 
> 2. enable_secondary_cpu_mm() is moved back to mpu/head.S. 
> 
>  xen/arch/arm/arm64/mpu/head.S            | 78 +----------------------
>  xen/arch/arm/include/asm/arm64/sysregs.h | 11 ++++
>  xen/arch/arm/include/asm/mpu/common.inc  | 79 ++++++++++++++++++++++++
>  3 files changed, 91 insertions(+), 77 deletions(-)
>  create mode 100644 xen/arch/arm/include/asm/mpu/common.inc
> 
> diff --git a/xen/arch/arm/arm64/mpu/head.S b/xen/arch/arm/arm64/mpu/head.S
> index ed01993d85..4d76a3166e 100644
> --- a/xen/arch/arm/arm64/mpu/head.S
> +++ b/xen/arch/arm/arm64/mpu/head.S
> @@ -3,83 +3,7 @@
>   * Start-of-day code for an Armv8-R MPU system.
>   */
>  
> -#include 
> -#include 
> -
> -/* Backgroud region enable/disable */
> -#define SCTLR_ELx_BR    BIT(17, UL)
> -
> -#define REGION_TEXT_PRBAR       0x38    /* SH=11 AP=10 XN=00 */
> -#define REGION_RO_PRBAR         0x3A    /* SH=11 AP=10 XN=10 */
> -#define REGION_DATA_PRBAR       0x32    /* SH=11 AP=00 XN=10 */
> -#define REGION_DEVICE_PRBAR     0x22    /* SH=10 AP=00 XN=10 */
> -
> -#define REGION_NORMAL_PRLAR     0x0f    /* NS=0 ATTR=111 EN=1 */
> -#define REGION_DEVICE_PRLAR     0x09    /* NS=0 ATTR=100 EN=1 */
> -
> -/*
> - * Macro to prepare and set a EL2 MPU memory region.
> - * We will also create an according MPU memory region entry, which
> - * is a structure of pr_t,  in table \prmap.
> - *
> - * sel:         region selector
> - * base:        reg storing base address
> - * limit:       reg storing limit address
> - * prbar:       store computed PRBAR_EL2 value
> - * prlar:       store computed PRLAR_EL2 value
> - * maxcount:    maximum number of EL2 regions supported
> - * attr_prbar:  PRBAR_EL2-related memory attributes. If not specified it will be
> - *              REGION_DATA_PRBAR
> - * attr_prlar:  PRLAR_EL2-related memory attributes. If not specified it will be
> - *              REGION_NORMAL_PRLAR
> - *
> - * Preserves \maxcount
> - * Output:
> - *  \sel: Next available region selector index.
> - * Clobbers \base, \limit, \prbar, \prlar
> - *
> - * Note that all parameters using registers should be distinct.
> - */
> -.macro prepare_xen_region, sel, base, limit, prbar, prlar, maxcount, attr_prbar=REGION_DATA_PRBAR, attr_prlar=REGION_NORMAL_PRLAR
> -    /* Check if the region is empty */
> -    cmp   \base, \limit
> -    beq   1f
> -
> -    /* Check if the number of regions exceeded the count specified in MPUIR_EL2 */
> -    cmp   \sel, \maxcount
> -    bge   fail_insufficient_regions
> -
> -    /* Prepare value for PRBAR_EL2 reg and preserve it in \prbar.*/
> -    and   \base, \base, #MPU_REGION_MASK
> -    mov   \prbar, #\attr_prbar
> -    orr   \prbar, \prbar, \base
> -
> -    /* Limit address should be inclusive */
> -    sub   \limit, \limit, #1
> -    and   \limit, \limit, #MPU_REGION_MASK
> -    mov   \prlar, #\attr_prlar
> -    orr   \prlar, \prlar, \limit
> -
> -    msr   PRSELR_EL2, \sel
> -    isb
> -    msr   PRBAR_EL2, \prbar
> -    msr   PRLAR_EL2, \prlar
> -    dsb   sy
> -    isb
> -
> -    add   \sel, \sel, #1
> -
> -1:
> -.endm
> -
> -/*
> - * Failure caused due to insufficient MPU regions.
> - */
> -FUNC_LOCAL(fail_insufficient_regions)
> -    PRINT("- Selected MPU region is above the implemented number in MPUIR_EL2 -\r\n")
> -1:  wfe
> -    b   1b
> -END(fail_insufficient_regions)
> +#include 
>  
>  /*
>   * Enable EL2 MPU and data cache
> diff --git a/xen/arch/arm/include/asm/arm64/sysregs.h b/xen/arch/arm/include/asm/arm64/sysregs.h
> index b593e4028b..3ee3715430 100644
> --- a/xen/arch/arm/include/asm/arm64/sysregs.h
> +++ b/xen/arch/arm/include/asm/arm64/sysregs.h
> @@ -462,6 +462,15 @@
>  #define ZCR_ELx_LEN_SIZE             9
>  #define ZCR_ELx_LEN_MASK             0x1ff
>  
> +#define REGION_TEXT_PRBAR       0x38    /* SH=11 AP=10 XN=00 */
> +#define REGION_RO_PRBAR         0x3A    /* SH=11 AP=10 XN=10 */
> +#define REGION_DATA_PRBAR       0x32    /* SH=11 AP=00 XN=10 */
> +#define REGION_DEVICE_PRBAR     0x22    /* SH=10 AP=00 XN=10 */
> +
> +#define WRITE_SYSREG_ASM(v, name) "msr " __stringify(name,) #v;
1) This macro is ASM only and you don't protect it like the C macros below. Why?
2) Semicolon not needed at the end

~Michal



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Date: Tue, 8 Apr 2025 09:56:11 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: Doug Goldstein ,
	Stefano Stabellini ,
	"Daniel P. Smith" ,
	Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= ,
	Andrew Cooper ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk ,
	Shawn Anastasio ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Oleksii Kurochko ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH v2 00/11] x86/EFI: prevent write-execute sections
Message-ID: 
References: <20250401130840.72119-1-roger.pau@citrix.com>
 
 
 
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On Mon, Apr 07, 2025 at 04:04:18PM +0200, Jan Beulich wrote:
> On 01.04.2025 15:26, Roger Pau Monné wrote:
> > nxcompat should be enabled by default I think?  I can of course make
> > it explicit by adding to the PE link command line.
> 
> --nxcompat wasn't the default originally, then was made the default for MinGW
> (and by mistake for everything else as well), then it being the default was
> undone for Cygwin. I've meanwhile submitted a patch to undo it for everything
> that isn't MinGW [1]. I simply don't think the linker is in the position to
> declare that every binary is NX-compatible. It's the programmers who have to
> determine that. With the flag not being honored everywhere one also can't
> simply test an EFI binary on a couple of hosts, at least as long as the EFI
> implementation there is a black box.

I think I looked at this reference:

https://sourceware.org/binutils/docs/ld/Options.html

When saying that nxcompat was enabled by default:

--nxcompat
--disable-nxcompat The image is compatible with the Data Execution
Prevention. This feature was introduced with MS Windows XP SP2 for
i386 PE targets. The option is enabled by default.

I guess the intent was to only enable it by default for Windows PE
images?  Anyway, as said earlier, I don't mind adding it.  FWIW, (I
think I commented with Andrew) I did saw this flag was already present
in our PE builds, even in it's current form, so that explains it.

Thanks, Roger.


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Subject: Re: [PATCH v4 1/2] xen: x86: irq: initialize irq desc in create_irq()
To: Volodymyr Babchuk 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 "xen-devel@lists.xenproject.org" 
References: <20250407164608.2558071-1-volodymyr_babchuk@epam.com>
 <20250407164608.2558071-2-volodymyr_babchuk@epam.com>
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On 07.04.2025 18:46, Volodymyr Babchuk wrote:
> While building xen with GCC 14.2.1 with "-fcondition-coverage" option
> or with "-Og", the compiler produces a false positive warning:
> 
>   arch/x86/irq.c: In function ‘create_irq’:
>   arch/x86/irq.c:281:11: error: ‘desc’ may be used uninitialized [-Werror=maybe-uninitialized]
>     281 |     ret = init_one_irq_desc(desc);
>         |           ^~~~~~~~~~~~~~~~~~~~~~~
>   arch/x86/irq.c:269:22: note: ‘desc’ was declared here
>     269 |     struct irq_desc *desc;
>         |                      ^~~~
>   cc1: all warnings being treated as errors
>   make[2]: *** [Rules.mk:252: arch/x86/irq.o] Error 1
> 
> While we have signed/unsigned comparison both in "for" loop and in
> "if" statement, this still can't lead to use of uninitialized "desc",
> as either loop will be executed at least once, or the function will
> return early. So this is a clearly false positive warning due to a
> bug [1] in GCC.
> 
> Initialize "desc" with NULL to make GCC happy.
> 
> [1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119665
> 
> Signed-off-by: Volodymyr Babchuk 

Just one other remark here: Personally I dislike the use of multiple or otherwise
excessive patch subject prefixes. xen/x86/irq: or even x86/irq: would have been
better here, imo.

Jan


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On 08.04.2025 09:56, Roger Pau Monné wrote:
> On Mon, Apr 07, 2025 at 04:04:18PM +0200, Jan Beulich wrote:
>> On 01.04.2025 15:26, Roger Pau Monné wrote:
>>> nxcompat should be enabled by default I think?  I can of course make
>>> it explicit by adding to the PE link command line.
>>
>> --nxcompat wasn't the default originally, then was made the default for MinGW
>> (and by mistake for everything else as well), then it being the default was
>> undone for Cygwin. I've meanwhile submitted a patch to undo it for everything
>> that isn't MinGW [1]. I simply don't think the linker is in the position to
>> declare that every binary is NX-compatible. It's the programmers who have to
>> determine that. With the flag not being honored everywhere one also can't
>> simply test an EFI binary on a couple of hosts, at least as long as the EFI
>> implementation there is a black box.
> 
> I think I looked at this reference:
> 
> https://sourceware.org/binutils/docs/ld/Options.html
> 
> When saying that nxcompat was enabled by default:
> 
> --nxcompat
> --disable-nxcompat The image is compatible with the Data Execution
> Prevention. This feature was introduced with MS Windows XP SP2 for
> i386 PE targets. The option is enabled by default.

Oh, I shall correct that, too, then. Thanks for pointing out.

Jan


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From: Luca Fancellu 
To: Ayan Kumar Halder 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Michal Orzel ,
	Volodymyr Babchuk 
Subject: Re: [PATCH v5 0/3] Enable early bootup of Armv8-R AArch32 systems
Thread-Topic: [PATCH v5 0/3] Enable early bootup of Armv8-R AArch32 systems
Thread-Index: AQHbp+05ANvpnp6IH0WRbtuqNwkbyrOZdeYA
Date: Tue, 8 Apr 2025 08:48:07 +0000
Message-ID: 
References: <20250407184443.1790995-1-ayan.kumar.halder@amd.com>
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From: Luca Fancellu 
To: Ayan Kumar Halder 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Michal Orzel ,
	Volodymyr Babchuk 
Subject: Re: [PATCH v5 1/3] xen/arm: Move some of the functions to common file
Thread-Topic: [PATCH v5 1/3] xen/arm: Move some of the functions to common
 file
Thread-Index: AQHbp+1Intz3ipmah0uCxwQ9Q6LVGbOZdvUA
Date: Tue, 8 Apr 2025 08:51:54 +0000
Message-ID: 
References: <20250407184443.1790995-1-ayan.kumar.halder@amd.com>
 <20250407184443.1790995-2-ayan.kumar.halder@amd.com>
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From: Luca Fancellu 
To: Ayan Kumar Halder 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Michal Orzel ,
	Volodymyr Babchuk 
Subject: Re: [PATCH v5 2/3] xen/arm32: Create the same boot-time MPU regions
 as arm64
Thread-Topic: [PATCH v5 2/3] xen/arm32: Create the same boot-time MPU regions
 as arm64
Thread-Index: AQHbp+1A9+alQyM7NUm0i9guCUDbS7OZeyCA
Date: Tue, 8 Apr 2025 09:06:50 +0000
Message-ID: <8E041BA0-2C36-4185-A2A3-B92CFDAE11FE@arm.com>
References: <20250407184443.1790995-1-ayan.kumar.halder@amd.com>
 <20250407184443.1790995-3-ayan.kumar.halder@amd.com>
In-Reply-To: <20250407184443.1790995-3-ayan.kumar.halder@amd.com>
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On 07/04/2025 20:44, Ayan Kumar Halder wrote:
> We have created the same boot-time MPU protection regions as Armv8-R AArch64.
> Also, we have defined *_PRBAR macros for arm32. The only difference from
> arm64 is that XN is 1-bit for arm32.
> The macros have been defined in mpu/cpregs.h.
NIT: Describe your changes in imperative mood

> 
> Also defined WRITE_SYSREG_ASM() to write to system registers in assembly.
> 
> Signed-off-by: Ayan Kumar Halder 
> ---
> Changes from
> 
> v1 -
> 
> 1. enable_mpu() now sets HMAIR{0,1} registers. This is similar to what is
> being done in enable_mmu(). All the mm related configurations happen in this
> function.
> 
> 2. Fixed some typos. 
> 
> v2 -
> 1. Include the common prepare_xen_region.inc in head.S.
> 
> 2. Define LOAD_SYSREG()/STORE_SYSREG() for arm32.
> 
> v3 -
> 1. Rename STORE_SYSREG() as WRITE_SYSREG_ASM()
> 
> 2. enable_boot_cpu_mm() is defined in head.S
> 
> v4 -
> 1. *_PRBAR is moved to arm32/sysregs.h.
> 
> 2. MPU specific CP15 system registers are defined in mpu/cpregs.h. 
> 
>  xen/arch/arm/arm32/Makefile              |   1 +
>  xen/arch/arm/arm32/mpu/Makefile          |   1 +
>  xen/arch/arm/arm32/mpu/head.S            | 101 +++++++++++++++++++++++
>  xen/arch/arm/include/asm/arm32/sysregs.h |   7 ++
>  xen/arch/arm/include/asm/cpregs.h        |   4 +
>  xen/arch/arm/include/asm/mpu/cpregs.h    |  24 ++++++
>  6 files changed, 138 insertions(+)
>  create mode 100644 xen/arch/arm/arm32/mpu/Makefile
>  create mode 100644 xen/arch/arm/arm32/mpu/head.S
>  create mode 100644 xen/arch/arm/include/asm/mpu/cpregs.h
> 
> diff --git a/xen/arch/arm/arm32/Makefile b/xen/arch/arm/arm32/Makefile
> index 40a2b4803f..537969d753 100644
> --- a/xen/arch/arm/arm32/Makefile
> +++ b/xen/arch/arm/arm32/Makefile
> @@ -1,5 +1,6 @@
>  obj-y += lib/
>  obj-$(CONFIG_MMU) += mmu/
> +obj-$(CONFIG_MPU) += mpu/
>  
>  obj-$(CONFIG_EARLY_PRINTK) += debug.o
>  obj-y += domctl.o
> diff --git a/xen/arch/arm/arm32/mpu/Makefile b/xen/arch/arm/arm32/mpu/Makefile
> new file mode 100644
> index 0000000000..3340058c08
> --- /dev/null
> +++ b/xen/arch/arm/arm32/mpu/Makefile
> @@ -0,0 +1 @@
> +obj-y += head.o
> diff --git a/xen/arch/arm/arm32/mpu/head.S b/xen/arch/arm/arm32/mpu/head.S
> new file mode 100644
> index 0000000000..84e9f1f8ec
> --- /dev/null
> +++ b/xen/arch/arm/arm32/mpu/head.S
> @@ -0,0 +1,101 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Start-of-day code for an Armv8-R MPU system.
That's exactly the same text as for Aarch64. At least write Armv8A-R-AArch32.

> + */
> +
> +#include 
> +#include 
> +#include 
> +
> +/*
> + * Set up the memory attribute type tables and enable EL2 MPU and data cache.
> + * If the Background region is enabled, then the MPU uses the default memory
> + * map as the Background region for generating the memory
> + * attributes when MPU is disabled.
> + * Since the default memory map of the Armv8-R AArch32 architecture is
> + * IMPLEMENTATION DEFINED, we intend to turn off the Background region here.
> + *
> + * Clobbers r0 - r1
> + */
> +FUNC_LOCAL(enable_mpu)
> +    /* Set up memory attribute type tables */
> +    mov_w r0, MAIR0VAL
> +    mov_w r1, MAIR1VAL
> +    mcr   CP32(r0, HMAIR0)
> +    mcr   CP32(r1, HMAIR1)
Is there really a need to do these 2 writes one after another?
Why can't we use only r0 and save one clobbered reg?
mov_w r0, MAIR0VAL
mcr   CP32(r0, HMAIR0)
mov_w r0, MAIR1VAL
mcr   CP32(r0, HMAIR1)

> +
> +    mrc   CP32(r0, HSCTLR)
> +    bic   r0, r0, #SCTLR_ELx_BR       /* Disable Background region */
> +    orr   r0, r0, #SCTLR_Axx_ELx_M    /* Enable MPU */
> +    orr   r0, r0, #SCTLR_Axx_ELx_C    /* Enable D-cache */
> +    mcr   CP32(r0, HSCTLR)
> +    isb
> +
> +    ret
> +END(enable_mpu)
> +
> +/*
> + * Maps the various sections of Xen (described in xen.lds.S) as different MPU
> + * regions.
> + *
> + * Clobbers r0 - r5
> + *
> + */
> +FUNC(enable_boot_cpu_mm)
> +    /* Get the number of regions specified in MPUIR_EL2 */
> +    mrc   CP32(r5, MPUIR_EL2)
> +    and   r5, r5, #NUM_MPU_REGIONS_MASK
> +
> +    /* x0: region sel */
> +    mov   r0, #0
> +    /* Xen text section. */
> +    mov_w   r1, _stext
> +    mov_w   r2, _etext
> +    prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_TEXT_PRBAR
> +
> +    /* Xen read-only data section. */
> +    mov_w   r1, _srodata
> +    mov_w   r2, _erodata
> +    prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_RO_PRBAR
> +
> +    /* Xen read-only after init and data section. (RW data) */
> +    mov_w   r1, __ro_after_init_start
> +    mov_w   r2, __init_begin
> +    prepare_xen_region r0, r1, r2, r3, r4, r5
> +
> +    /* Xen code section. */
> +    mov_w   r1, __init_begin
> +    mov_w   r2, __init_data_begin
> +    prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_TEXT_PRBAR
> +
> +    /* Xen data and BSS section. */
> +    mov_w   r1, __init_data_begin
> +    mov_w   r2, __bss_end
> +    prepare_xen_region r0, r1, r2, r3, r4, r5
> +
> +#ifdef CONFIG_EARLY_PRINTK
> +    /* Xen early UART section. */
> +    mov_w   r1, CONFIG_EARLY_UART_BASE_ADDRESS
> +    mov_w   r2, (CONFIG_EARLY_UART_BASE_ADDRESS + CONFIG_EARLY_UART_SIZE)
> +    prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_DEVICE_PRBAR, attr_prlar=REGION_DEVICE_PRLAR
> +#endif
> +
> +    b    enable_mpu
> +END(enable_boot_cpu_mm)
> +
> +/*
> + * We don't yet support secondary CPUs bring-up. Implement a dummy helper to
> + * please the common code.
> + */
> +FUNC(enable_secondary_cpu_mm)
> +    PRINT("- SMP not enabled yet -\r\n")
> +1:  wfe
> +    b 1b
> +END(enable_secondary_cpu_mm)
> +
> +/*
> + * Local variables:
> + * mode: ASM
> + * indent-tabs-mode: nil
> + * End:
> + */
> diff --git a/xen/arch/arm/include/asm/arm32/sysregs.h b/xen/arch/arm/include/asm/arm32/sysregs.h
> index 22871999af..a90d1610a1 100644
> --- a/xen/arch/arm/include/asm/arm32/sysregs.h
> +++ b/xen/arch/arm/include/asm/arm32/sysregs.h
> @@ -20,6 +20,13 @@
>   * uses r0 as a placeholder register. */
>  #define CMD_CP32(name...)      "mcr " __stringify(CP32(r0, name)) ";"
>  
> +#define REGION_TEXT_PRBAR       0x18    /* SH=11 AP=10 XN=0 */
> +#define REGION_RO_PRBAR         0x1D    /* SH=11 AP=10 XN=1 */
> +#define REGION_DATA_PRBAR       0x19    /* SH=11 AP=00 XN=1 */
> +#define REGION_DEVICE_PRBAR     0x11    /* SH=10 AP=00 XN=1 */
> +
> +#define WRITE_SYSREG_ASM(v, name) mcr CP32(v, name)
Same comment as for previous patch.

> +
>  #ifndef __ASSEMBLY__
>  
>  /* C wrappers */
> diff --git a/xen/arch/arm/include/asm/cpregs.h b/xen/arch/arm/include/asm/cpregs.h
> index aec9e8f329..6019a2cbdd 100644
> --- a/xen/arch/arm/include/asm/cpregs.h
> +++ b/xen/arch/arm/include/asm/cpregs.h
> @@ -1,6 +1,10 @@
>  #ifndef __ASM_ARM_CPREGS_H
>  #define __ASM_ARM_CPREGS_H
>  
> +#ifdef CONFIG_MPU
NIT: Do we really need to protect this include? I thought we do the ifdefery if
we need to include either mmu or mpu. Here we don't have a choice and afaict
there's nothing problematic in mpu/cpregs.h

> +#include 
> +#endif
> +
>  /*
>   * AArch32 Co-processor registers.
>   *
> diff --git a/xen/arch/arm/include/asm/mpu/cpregs.h b/xen/arch/arm/include/asm/mpu/cpregs.h
> new file mode 100644
> index 0000000000..6b20c7ceae
> --- /dev/null
> +++ b/xen/arch/arm/include/asm/mpu/cpregs.h
> @@ -0,0 +1,24 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +
> +#ifndef __ASM_ARM_MPU_CPREGS_H
> +#define __ASM_ARM_MPU_CPREGS_H
> +
> +/* CP15 CR0: MPU Type Register */
> +#define HMPUIR          p15,4,c0,c0,4
> +
> +/* CP15 CR6: MPU Protection Region Base/Limit/Select Address Register */
> +#define HPRSELR         p15,4,c6,c2,1
> +#define PRBAR_EL2       p15,4,c6,c3,0
> +#define PRLAR_EL2       p15,4,c6,c8,1
> +
> +#define MPUIR_EL2       HMPUIR
> +#define PRSELR_EL2      HPRSELR
AFAIK, these macros are there to use AArch64 sysreg names in common code when
compiling Arm32. This would mean they should be protected with #ifdef CONFIG_ARM_32.

~Michal



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From: Luca Fancellu 
To: Ayan Kumar Halder 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Michal Orzel ,
	Volodymyr Babchuk 
Subject: Re: [PATCH v5 3/3] xen/arm32: mpu: Stubs to build MPU for arm32
Thread-Topic: [PATCH v5 3/3] xen/arm32: mpu: Stubs to build MPU for arm32
Thread-Index: AQHbp+07/vC6GU4Tpk2NnzEwwALGgrOZf8AA
Date: Tue, 8 Apr 2025 09:23:22 +0000
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 <20250407184443.1790995-4-ayan.kumar.halder@amd.com>
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Hi Ayan,

> On 7 Apr 2025, at 19:44, Ayan Kumar Halder  wr=
ote:
>=20
> Add stubs to enable compilation
>=20
> Signed-off-by: Ayan Kumar Halder 
> ---
> Changes from :-
>=20
> v1, v2 -
> 1. New patch introduced in v3.
> 2. Should be applied on top of
> https://patchwork.kernel.org/project/xen-devel/cover/20250316192445.23764=
84-1-luca.fancellu@arm.com/
>=20
> v3 -
> 1. Add stubs for map_domain_page() and similar functions.
>=20
> 2. 'BUG_ON("unimplemented")' is kept in all the stubs.
>=20
> v4 -=20
> 1. is_xen_heap_mfn() macros are defined across mpu/mm.h (ARM32 specific)
> , mmu/mm.h (ARM32 specific) and asm/mm.h (ARM64 specific)
>=20
> 2. s/(void*)0/NULL
>=20
> xen/arch/arm/arm32/mpu/Makefile   |  2 ++
> xen/arch/arm/arm32/mpu/p2m.c      | 18 ++++++++++++++
> xen/arch/arm/arm32/mpu/smpboot.c  | 23 +++++++++++++++++
> xen/arch/arm/include/asm/mm.h     |  9 +------
> xen/arch/arm/include/asm/mmu/mm.h |  9 +++++++
> xen/arch/arm/include/asm/mpu/mm.h |  5 ++++
> xen/arch/arm/mpu/Makefile         |  1 +
> xen/arch/arm/mpu/domain_page.c    | 41 +++++++++++++++++++++++++++++++
> 8 files changed, 100 insertions(+), 8 deletions(-)
> create mode 100644 xen/arch/arm/arm32/mpu/p2m.c
> create mode 100644 xen/arch/arm/arm32/mpu/smpboot.c
> create mode 100644 xen/arch/arm/mpu/domain_page.c
>=20
> diff --git a/xen/arch/arm/arm32/mpu/Makefile b/xen/arch/arm/arm32/mpu/Mak=
efile
> index 3340058c08..38797f28af 100644
> --- a/xen/arch/arm/arm32/mpu/Makefile
> +++ b/xen/arch/arm/arm32/mpu/Makefile
> @@ -1 +1,3 @@
> obj-y +=3D head.o
> +obj-y +=3D smpboot.o
> +obj-y +=3D p2m.o
> diff --git a/xen/arch/arm/arm32/mpu/p2m.c b/xen/arch/arm/arm32/mpu/p2m.c
> new file mode 100644
> index 0000000000..df8de5c7d8
> --- /dev/null
> +++ b/xen/arch/arm/arm32/mpu/p2m.c
> @@ -0,0 +1,18 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +

I would add:
#include 
for BUG()

> +#include 
> +#include 
> +
> +void __init setup_virt_paging(void)
> +{
> +    BUG_ON("unimplemented");
> +}
> +
> +/*
> + * Local variables:
> + * mode: C
> + * c-file-style: "BSD"
> + * c-basic-offset: 4
> + * indent-tabs-mode: nil
> + * End:
> + */
> diff --git a/xen/arch/arm/arm32/mpu/smpboot.c b/xen/arch/arm/arm32/mpu/sm=
pboot.c
> new file mode 100644
> index 0000000000..3f3e54294e
> --- /dev/null
> +++ b/xen/arch/arm/arm32/mpu/smpboot.c
> @@ -0,0 +1,23 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +

I would add:
#include 
for BUG()

#include 
for EINVAL

#include 
for bool

> +#include 
> +
> +int prepare_secondary_mm(int cpu)
> +{
> +    BUG_ON("unimplemented");
> +    return -EINVAL;
> +}
> +
> +void update_boot_mapping(bool enable)
> +{
> +    BUG_ON("unimplemented");
> +}
> +
> +/*
> + * Local variables:
> + * mode: C
> + * c-file-style: "BSD"
> + * c-basic-offset: 4
> + * indent-tabs-mode: nil
> + * End:
> + */
> diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.=
h
> index fbffaccef4..5b67c0f8bb 100644
> --- a/xen/arch/arm/include/asm/mm.h
> +++ b/xen/arch/arm/include/asm/mm.h
> @@ -170,14 +170,7 @@ struct page_info
> #define _PGC_need_scrub   _PGC_allocated
> #define PGC_need_scrub    PGC_allocated
>=20
> -#ifdef CONFIG_ARM_32
> -#define is_xen_heap_page(page) is_xen_heap_mfn(page_to_mfn(page))
> -#define is_xen_heap_mfn(mfn) ({                                 \
> -    unsigned long mfn_ =3D mfn_x(mfn);                            \
> -    (mfn_ >=3D mfn_x(directmap_mfn_start) &&                      \
> -     mfn_ < mfn_x(directmap_mfn_end));                          \
> -})
> -#else
> +#ifdef CONFIG_ARM_64
> #define is_xen_heap_page(page) ((page)->count_info & PGC_xen_heap)
> #define is_xen_heap_mfn(mfn) \
>     (mfn_valid(mfn) && is_xen_heap_page(mfn_to_page(mfn)))
> diff --git a/xen/arch/arm/include/asm/mmu/mm.h b/xen/arch/arm/include/asm=
/mmu/mm.h
> index caba987edc..9b98d12b07 100644
> --- a/xen/arch/arm/include/asm/mmu/mm.h
> +++ b/xen/arch/arm/include/asm/mmu/mm.h
> @@ -21,6 +21,15 @@ extern unsigned long directmap_base_pdx;
>=20
> #define frame_table ((struct page_info *)FRAMETABLE_VIRT_START)
>=20
> +#ifdef CONFIG_ARM_32
> +#define is_xen_heap_page(page) is_xen_heap_mfn(page_to_mfn(page))
> +#define is_xen_heap_mfn(mfn) ({                                 \
> +    unsigned long mfn_ =3D mfn_x(mfn);                            \
> +    (mfn_ >=3D mfn_x(directmap_mfn_start) &&                      \
> +     mfn_ < mfn_x(directmap_mfn_end));                          \
> +})
> +#endif
> +
> #define virt_to_maddr(va) ({                                             =
      \
>     vaddr_t va_ =3D (vaddr_t)(va);                                       =
        \
>     (paddr_t)((va_to_par(va_) & PADDR_MASK & PAGE_MASK) | (va_ & ~PAGE_MA=
SK)); \
> diff --git a/xen/arch/arm/include/asm/mpu/mm.h b/xen/arch/arm/include/asm=
/mpu/mm.h
> index 86f33d9836..bfd840fa5d 100644
> --- a/xen/arch/arm/include/asm/mpu/mm.h
> +++ b/xen/arch/arm/include/asm/mpu/mm.h
> @@ -13,6 +13,11 @@ extern struct page_info *frame_table;
>=20
> #define virt_to_maddr(va) ((paddr_t)((vaddr_t)(va) & PADDR_MASK))
>=20
> +#ifdef CONFIG_ARM_32
> +#define is_xen_heap_page(page) ({ BUG_ON("unimplemented"); false; })
> +#define is_xen_heap_mfn(mfn) ({ BUG_ON("unimplemented"); false; })
> +#endif
> +
> /* On MPU systems there is no translation, ma =3D=3D va. */
> static inline void *maddr_to_virt(paddr_t ma)
> {
> diff --git a/xen/arch/arm/mpu/Makefile b/xen/arch/arm/mpu/Makefile
> index 21bbc517b5..ff221011d5 100644
> --- a/xen/arch/arm/mpu/Makefile
> +++ b/xen/arch/arm/mpu/Makefile
> @@ -2,3 +2,4 @@ obj-y +=3D mm.o
> obj-y +=3D p2m.o
> obj-y +=3D setup.init.o
> obj-y +=3D vmap.o
> +obj-$(CONFIG_ARM_32) +=3D domain_page.o
> diff --git a/xen/arch/arm/mpu/domain_page.c b/xen/arch/arm/mpu/domain_pag=
e.c
> new file mode 100644
> index 0000000000..8859b24e04
> --- /dev/null
> +++ b/xen/arch/arm/mpu/domain_page.c
> @@ -0,0 +1,41 @@
> +/* SPDX-License-Identifier: GPL-2.0-or-later */
> +#include 

I would add:

#include 
for BUG()

#include 
for mfn_t and INVALID_MFN

#include 
for NULL


> +
> +void *map_domain_page_global(mfn_t mfn)
> +{
> +    BUG_ON("unimplemented");
> +    return NULL;
> +}
> +
> +/* Map a page of domheap memory */
> +void *map_domain_page(mfn_t mfn)
> +{
> +    BUG_ON("unimplemented");
> +    return NULL;
> +}
> +
> +/* Release a mapping taken with map_domain_page() */
> +void unmap_domain_page(const void *ptr)
> +{
> +    BUG_ON("unimplemented");
> +}
> +
> +mfn_t domain_page_map_to_mfn(const void *ptr)
> +{
> +    BUG_ON("unimplemented");
> +    return INVALID_MFN;
> +}
> +
> +void unmap_domain_page_global(const void *va)
> +{
> +    BUG_ON("unimplemented");
> +}
> +
> +/*
> + * Local variables:
> + * mode: C
> + * c-file-style: "BSD"
> + * c-basic-offset: 4
> + * indent-tabs-mode: nil
> + * End:
> + */
> --=20
> 2.25.1

with the above addressed, at least for me it looks good!

Reviewed-by: Luca Fancellu 

Cheers,
Luca



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper 
Subject: [PATCH 0/2] x86/hvm: fixes for RO MMIO emulation
Date: Tue,  8 Apr 2025 11:31:54 +0200
Message-ID: <20250408093156.83277-1-roger.pau@citrix.com>
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Hello,

Two small fixes for RO MMIO emulation for HVM guests. First one removes
unreachable code from the HVM path, second fixes an issue in the
mmio_ro_emulated_write() handler when used in HVM guests context.

Thanks, Roger.

Roger Pau Monne (2):
  x86/hvm: remove unreachable MMCFG write emulation
  x86/hvm: fix write emulation of RO ranges

 xen/arch/x86/hvm/emulate.c      | 22 +++++++------------
 xen/arch/x86/include/asm/mm.h   |  3 ---
 xen/arch/x86/mm.c               | 38 ++++++---------------------------
 xen/arch/x86/pv/ro-page-fault.c | 31 +++++++++++++++++++++++++++
 4 files changed, 45 insertions(+), 49 deletions(-)

-- 
2.48.1



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper 
Subject: [PATCH 2/2] x86/hvm: fix write emulation of RO ranges
Date: Tue,  8 Apr 2025 11:31:56 +0200
Message-ID: <20250408093156.83277-3-roger.pau@citrix.com>
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When running on AMD hardware in HVM mode the guest linear address (GLA)
will not be provided to hvm_emulate_one_mmio(), and instead is
unconditionally set of ~0.  As a consequence mmio_ro_emulated_write() will
always report an error, as the fault GLA generated by the emulation of the
access won't be ~0.

Fix this by only checking for the fault GLA in mmio_ro_emulated_write()
when the guest is PV.

Fixes: 33c19df9a5a0 ('x86/PCI: intercept accesses to RO MMIO from dom0s in HVM containers')
Signed-off-by: Roger Pau Monné 
---
 xen/arch/x86/mm.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 4fecd37aeca0..79836705c51e 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -5187,7 +5187,12 @@ int cf_check mmio_ro_emulated_write(
 
     /* Only allow naturally-aligned stores at the original %cr2 address. */
     if ( ((bytes | offset) & (bytes - 1)) || !bytes ||
-         offset != mmio_ro_ctxt->cr2 )
+         /*
+          * HVM domains might not have a valid fault GLA in the context, as AMD
+          * NPT faults don't report the faulting GLA.  It's also possible for
+          * the fault to happen in non-paging modes.
+          */
+         (is_pv_domain(current->domain) && offset != mmio_ro_ctxt->cr2) )
     {
         gdprintk(XENLOG_WARNING, "bad access (cr2=%lx, addr=%lx, bytes=%u)\n",
                 mmio_ro_ctxt->cr2, offset, bytes);
-- 
2.48.1



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper 
Subject: [PATCH 1/2] x86/hvm: remove unreachable MMCFG write emulation
Date: Tue,  8 Apr 2025 11:31:55 +0200
Message-ID: <20250408093156.83277-2-roger.pau@citrix.com>
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The current implementation of PVH dom0 relies on vPCI to trap and handle
accesses to the MMCFG area.  Previous implementation of PVH dom0 (v1)
didn't have vPCI, and as a classic PV dom0, relied on the MMCFG range being
RO.  As such hvm_emulate_one_mmio() had to special case write accesses to
the MMCFG area.

With PVH dom0 using vPCI, and the MMCFG accesses being fully handled there,
hvm_emulate_one_mmio() should never handle accesses to MMCFG, making the
code effectively unreachable.

Remove it and leave an ASSERT to make sure MMCFG accesses never get into
hvm_emulate_one_mmio().  As a result of the removal of one of the users of
mmcfg_intercept_write(), the function can now be moved into the same
translation unit where it's solely used, allowing it to be made static and
effectively built only when PV support is enabled.

Signed-off-by: Roger Pau Monné 
---
 xen/arch/x86/hvm/emulate.c      | 22 ++++++++--------------
 xen/arch/x86/include/asm/mm.h   |  3 ---
 xen/arch/x86/mm.c               | 31 -------------------------------
 xen/arch/x86/pv/ro-page-fault.c | 31 +++++++++++++++++++++++++++++++
 4 files changed, 39 insertions(+), 48 deletions(-)

diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c
index 04d07ccaf6a4..2c9fbacce7fb 100644
--- a/xen/arch/x86/hvm/emulate.c
+++ b/xen/arch/x86/hvm/emulate.c
@@ -2858,12 +2858,6 @@ int hvm_emulate_one(
 
 int hvm_emulate_one_mmio(unsigned long mfn, unsigned long gla)
 {
-    static const struct x86_emulate_ops hvm_intercept_ops_mmcfg = {
-        .read       = x86emul_unhandleable_rw,
-        .insn_fetch = hvmemul_insn_fetch,
-        .write      = mmcfg_intercept_write,
-        .validate   = hvmemul_validate,
-    };
     static const struct x86_emulate_ops hvm_ro_emulate_ops_mmio = {
         .read       = x86emul_unhandleable_rw,
         .insn_fetch = hvmemul_insn_fetch,
@@ -2872,28 +2866,28 @@ int hvm_emulate_one_mmio(unsigned long mfn, unsigned long gla)
     };
     struct mmio_ro_emulate_ctxt mmio_ro_ctxt = { .cr2 = gla, .mfn = _mfn(mfn) };
     struct hvm_emulate_ctxt ctxt;
-    const struct x86_emulate_ops *ops;
     unsigned int seg, bdf;
     int rc;
 
     if ( pci_ro_mmcfg_decode(mfn, &seg, &bdf) )
     {
-        mmio_ro_ctxt.seg = seg;
-        mmio_ro_ctxt.bdf = bdf;
-        ops = &hvm_intercept_ops_mmcfg;
+        /* Should be always handled by vPCI for PVH dom0. */
+        gdprintk(XENLOG_ERR, "unhandled MMCFG access for %pp\n",
+                 &PCI_SBDF(seg, bdf));
+        ASSERT_UNREACHABLE();
+        return X86EMUL_UNHANDLEABLE;
     }
-    else
-        ops = &hvm_ro_emulate_ops_mmio;
 
     hvm_emulate_init_once(&ctxt, x86_insn_is_mem_write,
                           guest_cpu_user_regs());
     ctxt.ctxt.data = &mmio_ro_ctxt;
 
-    switch ( rc = _hvm_emulate_one(&ctxt, ops, VIO_no_completion) )
+    switch ( rc = _hvm_emulate_one(&ctxt, &hvm_ro_emulate_ops_mmio,
+                                   VIO_no_completion) )
     {
     case X86EMUL_UNHANDLEABLE:
     case X86EMUL_UNIMPLEMENTED:
-        hvm_dump_emulation_state(XENLOG_G_WARNING, "MMCFG", &ctxt, rc);
+        hvm_dump_emulation_state(XENLOG_G_WARNING, "RO MMIO", &ctxt, rc);
         break;
     case X86EMUL_EXCEPTION:
         hvm_inject_event(&ctxt.ctxt.event);
diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h
index 6c7e66ee21ab..a1bc8cc27451 100644
--- a/xen/arch/x86/include/asm/mm.h
+++ b/xen/arch/x86/include/asm/mm.h
@@ -553,9 +553,6 @@ struct mmio_ro_emulate_ctxt {
 int cf_check mmio_ro_emulated_write(
     enum x86_segment seg, unsigned long offset, void *p_data,
     unsigned int bytes, struct x86_emulate_ctxt *ctxt);
-int cf_check mmcfg_intercept_write(
-    enum x86_segment seg, unsigned long offset, void *p_data,
-    unsigned int bytes, struct x86_emulate_ctxt *ctxt);
 
 int audit_adjust_pgtables(struct domain *d, int dir, int noisy);
 
diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index b294497a140d..4fecd37aeca0 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -5200,37 +5200,6 @@ int cf_check mmio_ro_emulated_write(
     return X86EMUL_OKAY;
 }
 
-int cf_check mmcfg_intercept_write(
-    enum x86_segment seg,
-    unsigned long offset,
-    void *p_data,
-    unsigned int bytes,
-    struct x86_emulate_ctxt *ctxt)
-{
-    struct mmio_ro_emulate_ctxt *mmio_ctxt = ctxt->data;
-
-    /*
-     * Only allow naturally-aligned stores no wider than 4 bytes to the
-     * original %cr2 address.
-     */
-    if ( ((bytes | offset) & (bytes - 1)) || bytes > 4 || !bytes ||
-         offset != mmio_ctxt->cr2 )
-    {
-        gdprintk(XENLOG_WARNING, "bad write (cr2=%lx, addr=%lx, bytes=%u)\n",
-                mmio_ctxt->cr2, offset, bytes);
-        return X86EMUL_UNHANDLEABLE;
-    }
-
-    offset &= 0xfff;
-    if ( pci_conf_write_intercept(mmio_ctxt->seg, mmio_ctxt->bdf,
-                                  offset, bytes, p_data) >= 0 )
-        pci_mmcfg_write(mmio_ctxt->seg, PCI_BUS(mmio_ctxt->bdf),
-                        PCI_DEVFN(mmio_ctxt->bdf), offset, bytes,
-                        *(uint32_t *)p_data);
-
-    return X86EMUL_OKAY;
-}
-
 /*
  * For these PTE APIs, the caller must follow the alloc-map-unmap-free
  * lifecycle, which means explicitly mapping the PTE pages before accessing
diff --git a/xen/arch/x86/pv/ro-page-fault.c b/xen/arch/x86/pv/ro-page-fault.c
index 372187e9a096..11b01c479e43 100644
--- a/xen/arch/x86/pv/ro-page-fault.c
+++ b/xen/arch/x86/pv/ro-page-fault.c
@@ -298,6 +298,37 @@ static int ptwr_do_page_fault(struct x86_emulate_ctxt *ctxt,
  * fault handling for read-only MMIO pages
  */
 
+static int cf_check mmcfg_intercept_write(
+    enum x86_segment seg,
+    unsigned long offset,
+    void *p_data,
+    unsigned int bytes,
+    struct x86_emulate_ctxt *ctxt)
+{
+    struct mmio_ro_emulate_ctxt *mmio_ctxt = ctxt->data;
+
+    /*
+     * Only allow naturally-aligned stores no wider than 4 bytes to the
+     * original %cr2 address.
+     */
+    if ( ((bytes | offset) & (bytes - 1)) || bytes > 4 || !bytes ||
+         offset != mmio_ctxt->cr2 )
+    {
+        gdprintk(XENLOG_WARNING, "bad write (cr2=%lx, addr=%lx, bytes=%u)\n",
+                mmio_ctxt->cr2, offset, bytes);
+        return X86EMUL_UNHANDLEABLE;
+    }
+
+    offset &= 0xfff;
+    if ( pci_conf_write_intercept(mmio_ctxt->seg, mmio_ctxt->bdf,
+                                  offset, bytes, p_data) >= 0 )
+        pci_mmcfg_write(mmio_ctxt->seg, PCI_BUS(mmio_ctxt->bdf),
+                        PCI_DEVFN(mmio_ctxt->bdf), offset, bytes,
+                        *(uint32_t *)p_data);
+
+    return X86EMUL_OKAY;
+}
+
 static const struct x86_emulate_ops mmio_ro_emulate_ops = {
     .read       = x86emul_unhandleable_rw,
     .insn_fetch = ptwr_emulated_insn_fetch,
-- 
2.48.1



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Subject: Re: [PATCH v5 3/3] xen/arm32: mpu: Stubs to build MPU for arm32
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On 07/04/2025 20:44, Ayan Kumar Halder wrote:
> Add stubs to enable compilation
NIT: missing dot at the end of sentence.

> 
> Signed-off-by: Ayan Kumar Halder 
> ---
> Changes from :-
> 
> v1, v2 -
> 1. New patch introduced in v3.
> 2. Should be applied on top of
> https://patchwork.kernel.org/project/xen-devel/cover/20250316192445.2376484-1-luca.fancellu@arm.com/
> 
> v3 -
> 1. Add stubs for map_domain_page() and similar functions.
> 
> 2. 'BUG_ON("unimplemented")' is kept in all the stubs.
> 
> v4 - 
> 1. is_xen_heap_mfn() macros are defined across mpu/mm.h (ARM32 specific)
> , mmu/mm.h (ARM32 specific) and asm/mm.h (ARM64 specific)
> 
> 2. s/(void*)0/NULL
> 
>  xen/arch/arm/arm32/mpu/Makefile   |  2 ++
>  xen/arch/arm/arm32/mpu/p2m.c      | 18 ++++++++++++++
>  xen/arch/arm/arm32/mpu/smpboot.c  | 23 +++++++++++++++++
>  xen/arch/arm/include/asm/mm.h     |  9 +------
>  xen/arch/arm/include/asm/mmu/mm.h |  9 +++++++
>  xen/arch/arm/include/asm/mpu/mm.h |  5 ++++
>  xen/arch/arm/mpu/Makefile         |  1 +
>  xen/arch/arm/mpu/domain_page.c    | 41 +++++++++++++++++++++++++++++++
>  8 files changed, 100 insertions(+), 8 deletions(-)
>  create mode 100644 xen/arch/arm/arm32/mpu/p2m.c
>  create mode 100644 xen/arch/arm/arm32/mpu/smpboot.c
>  create mode 100644 xen/arch/arm/mpu/domain_page.c
> 
> diff --git a/xen/arch/arm/arm32/mpu/Makefile b/xen/arch/arm/arm32/mpu/Makefile
> index 3340058c08..38797f28af 100644
> --- a/xen/arch/arm/arm32/mpu/Makefile
> +++ b/xen/arch/arm/arm32/mpu/Makefile
> @@ -1 +1,3 @@
>  obj-y += head.o
> +obj-y += smpboot.o
> +obj-y += p2m.o
Sort alphabetically. Always.

> diff --git a/xen/arch/arm/arm32/mpu/p2m.c b/xen/arch/arm/arm32/mpu/p2m.c
> new file mode 100644
> index 0000000000..df8de5c7d8
> --- /dev/null
> +++ b/xen/arch/arm/arm32/mpu/p2m.c
> @@ -0,0 +1,18 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +
> +#include 
> +#include 
> +
> +void __init setup_virt_paging(void)
> +{
> +    BUG_ON("unimplemented");
> +}
> +
> +/*
> + * Local variables:
> + * mode: C
> + * c-file-style: "BSD"
> + * c-basic-offset: 4
> + * indent-tabs-mode: nil
> + * End:
> + */
> diff --git a/xen/arch/arm/arm32/mpu/smpboot.c b/xen/arch/arm/arm32/mpu/smpboot.c
> new file mode 100644
> index 0000000000..3f3e54294e
> --- /dev/null
> +++ b/xen/arch/arm/arm32/mpu/smpboot.c
> @@ -0,0 +1,23 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +
> +#include 
> +
> +int prepare_secondary_mm(int cpu)
> +{
> +    BUG_ON("unimplemented");
> +    return -EINVAL;
> +}
> +
> +void update_boot_mapping(bool enable)
> +{
> +    BUG_ON("unimplemented");
> +}
> +
> +/*
> + * Local variables:
> + * mode: C
> + * c-file-style: "BSD"
> + * c-basic-offset: 4
> + * indent-tabs-mode: nil
> + * End:
> + */
> diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h
> index fbffaccef4..5b67c0f8bb 100644
> --- a/xen/arch/arm/include/asm/mm.h
> +++ b/xen/arch/arm/include/asm/mm.h
> @@ -170,14 +170,7 @@ struct page_info
>  #define _PGC_need_scrub   _PGC_allocated
>  #define PGC_need_scrub    PGC_allocated
>  
> -#ifdef CONFIG_ARM_32
> -#define is_xen_heap_page(page) is_xen_heap_mfn(page_to_mfn(page))
> -#define is_xen_heap_mfn(mfn) ({                                 \
> -    unsigned long mfn_ = mfn_x(mfn);                            \
> -    (mfn_ >= mfn_x(directmap_mfn_start) &&                      \
> -     mfn_ < mfn_x(directmap_mfn_end));                          \
> -})
> -#else
At first sight, it's not clear why we diverge here and move Arm32 but not Arm64.
At least I'd expect some reasoning for this change in commit msg.

> +#ifdef CONFIG_ARM_64
>  #define is_xen_heap_page(page) ((page)->count_info & PGC_xen_heap)
>  #define is_xen_heap_mfn(mfn) \
>      (mfn_valid(mfn) && is_xen_heap_page(mfn_to_page(mfn)))
> diff --git a/xen/arch/arm/include/asm/mmu/mm.h b/xen/arch/arm/include/asm/mmu/mm.h
> index caba987edc..9b98d12b07 100644
> --- a/xen/arch/arm/include/asm/mmu/mm.h
> +++ b/xen/arch/arm/include/asm/mmu/mm.h
> @@ -21,6 +21,15 @@ extern unsigned long directmap_base_pdx;
>  
>  #define frame_table ((struct page_info *)FRAMETABLE_VIRT_START)
>  
> +#ifdef CONFIG_ARM_32
Why another #ifdef if there is one a few lines below in this file (below
virt_to_maddr)?

> +#define is_xen_heap_page(page) is_xen_heap_mfn(page_to_mfn(page))
> +#define is_xen_heap_mfn(mfn) ({                                 \
> +    unsigned long mfn_ = mfn_x(mfn);                            \
> +    (mfn_ >= mfn_x(directmap_mfn_start) &&                      \
> +     mfn_ < mfn_x(directmap_mfn_end));                          \
> +})
> +#endif
> +
>  #define virt_to_maddr(va) ({                                                   \
>      vaddr_t va_ = (vaddr_t)(va);                                               \
>      (paddr_t)((va_to_par(va_) & PADDR_MASK & PAGE_MASK) | (va_ & ~PAGE_MASK)); \
> diff --git a/xen/arch/arm/include/asm/mpu/mm.h b/xen/arch/arm/include/asm/mpu/mm.h
> index 86f33d9836..bfd840fa5d 100644
> --- a/xen/arch/arm/include/asm/mpu/mm.h
> +++ b/xen/arch/arm/include/asm/mpu/mm.h
> @@ -13,6 +13,11 @@ extern struct page_info *frame_table;
>  
>  #define virt_to_maddr(va) ((paddr_t)((vaddr_t)(va) & PADDR_MASK))
>  
> +#ifdef CONFIG_ARM_32
> +#define is_xen_heap_page(page) ({ BUG_ON("unimplemented"); false; })
> +#define is_xen_heap_mfn(mfn) ({ BUG_ON("unimplemented"); false; })
> +#endif
> +
>  /* On MPU systems there is no translation, ma == va. */
>  static inline void *maddr_to_virt(paddr_t ma)
>  {
> diff --git a/xen/arch/arm/mpu/Makefile b/xen/arch/arm/mpu/Makefile
> index 21bbc517b5..ff221011d5 100644
> --- a/xen/arch/arm/mpu/Makefile
> +++ b/xen/arch/arm/mpu/Makefile
> @@ -2,3 +2,4 @@ obj-y += mm.o
>  obj-y += p2m.o
>  obj-y += setup.init.o
>  obj-y += vmap.o
> +obj-$(CONFIG_ARM_32) += domain_page.o
Again, sort alphabetically.

> diff --git a/xen/arch/arm/mpu/domain_page.c b/xen/arch/arm/mpu/domain_page.c
> new file mode 100644
> index 0000000000..8859b24e04
> --- /dev/null
> +++ b/xen/arch/arm/mpu/domain_page.c
> @@ -0,0 +1,41 @@
> +/* SPDX-License-Identifier: GPL-2.0-or-later */
empty line here

> +#include 
> +
> +void *map_domain_page_global(mfn_t mfn)
> +{
> +    BUG_ON("unimplemented");
> +    return NULL;
> +}
> +
> +/* Map a page of domheap memory */
> +void *map_domain_page(mfn_t mfn)
> +{
> +    BUG_ON("unimplemented");
> +    return NULL;
> +}
> +
> +/* Release a mapping taken with map_domain_page() */
> +void unmap_domain_page(const void *ptr)
> +{
> +    BUG_ON("unimplemented");
> +}
> +
> +mfn_t domain_page_map_to_mfn(const void *ptr)
> +{
> +    BUG_ON("unimplemented");
> +    return INVALID_MFN;
> +}
> +
> +void unmap_domain_page_global(const void *va)
> +{
> +    BUG_ON("unimplemented");
> +}
> +
> +/*
> + * Local variables:
> + * mode: C
> + * c-file-style: "BSD"
> + * c-basic-offset: 4
> + * indent-tabs-mode: nil
> + * End:
> + */

Additionally, take into account Luca remarks regarding headers.

~Michal




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From: "Anthony PERARD" 
Subject: =?utf-8?Q?Re:=20Ping:=20[PATCH]=20libxc/PM:=20correct=20(not=20just)=20error=20handling=20in=20xc=5Fget=5Fcpufreq=5Fpara()?=
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On Mon, Apr 07, 2025 at 05:38:57PM +0200, Jan Beulich wrote:
> On 07.04.2025 17:23, Anthony PERARD wrote:
> > On Mon, Apr 07, 2025 at 03:23:48PM +0200, Jan Beulich wrote:
> >> On 07.04.2025 14:45, Anthony PERARD wrote:
> >>> Calling xc_get_cpufreq_para with:
> >>>
> >>>     user_para = {
> >>>         .cpu_num = 0,
> >>>         .freq_num = 0,
> >>>         .gov_num = 9,
> >>>     };
> >>>
> >>> seems broken. It's looks like the `scaling_available_governors` bounce
> >>> buffer is going to be used without been allocated properly handled, with
> >>> this patch.
> >>
> >> The local variable "in_gov_num" controls its allocation and use, together with
> >> has_num. "Use" as in passing to set_xen_guest_handle(). The only further use
> > 
> > When has_num == 0, `in_gov_num` is only used to set `sys_para->gov_num`.
> > It also make a conditional call to xc_hypercall_bounce_post() but
> > there's nothing to do.
> > 
> > Why user_para.gov_num seems to control the size of a buffer, but then
> > that buffer is just discarded under some condition with this patch?
> 
> That's nothing this patch changes. Previously has_num would also have been
> false in the example you give.

Right, sorry. I was persuaded that `has_num` meant "any" of the buffers
are allocated, instead of the written "all" of them are allocated in C.
The logic in this function is really hard to follow because it doesn't
make sense, especially the conditional on `has_num`.

Your patch does make requesting governors actually optional now (and now
that I realise the calculation of `has_num` doesn't really reflect the
name). The introduced `in_gov_num` local variable isn't very useful as
the only real need is in the cleaning path (and we discussed earlier
that cleaning can be done unconditionally). So the patch is fine:

Reviewed-by: Anthony PERARD 


Oh, one more thing, it's funny that a lot of faff is done toward making
the cleaning optional, with all the "unlock_*" label, but then cleaning
code path can be executed when e.g. cpu_num=0,freq_num=4 (unless the
hypercall return an error in such case, but the code shouldn't rely on
that...).

Thanks,

-- 

Anthony Perard | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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From: "Penny, Zheng" 
To: Jan Beulich 
CC: "Huang, Ray" , Andrew Cooper
	, Anthony PERARD ,
	"Orzel, Michal" , Julien Grall ,
	=?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= , Stefano
 Stabellini , "xen-devel@lists.xenproject.org"
	
Subject: RE: [PATCH v3 12/15] xen/x86: implement EPP support for the amd-cppc
 driver in active mode
Thread-Topic: [PATCH v3 12/15] xen/x86: implement EPP support for the amd-cppc
 driver in active mode
Thread-Index: AQHbjnN37UHiYLzXuU6NGNUDEkiF17ODyhuAgAMeFYCAAV4OAIARekvw
Date: Tue, 8 Apr 2025 10:32:27 +0000
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References: <20250306083949.1503385-1-Penny.Zheng@amd.com>
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Date: Tue, 8 Apr 2025 12:38:16 +0200
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Subject: Re: [XEN PATCH v2 1/1] tools/libxl: search PATH for QEMU if
 `QEMU_XEN_PATH` is not absolute
To: Hongbo 
Cc: Anthony PERARD ,
 Juergen Gross , xen-devel@lists.xenproject.org
References: <20241223031753.13709-1-hehongbo@mail.com>
 <20250330160304.20899-1-hehongbo@mail.com>
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In-Reply-To: <20250330160304.20899-1-hehongbo@mail.com>
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On 30.03.2025 18:03, Hongbo wrote:
> --- a/tools/libs/light/libxl_dm.c
> +++ b/tools/libs/light/libxl_dm.c
> @@ -331,9 +331,43 @@ const char *libxl__domain_device_model(libxl__gc *gc,
>          case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL:
>              dm = libxl__abs_path(gc, "qemu-dm", libxl__private_bindir_path());
>              break;
> -        case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
> -            dm = qemu_xen_path(gc);
> +        case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN: {
> +            const char *configured_dm = qemu_xen_path(gc);

What about this returning a filename with a path, just not an absolute one? $PATH
shouldn't be searched in such a case, should it?

> +            if (configured_dm[0] == '/')
> +            {
> +                dm = configured_dm;
> +            }

Why is this and ...

> +            else
> +            {
> +                const char *path_env = getenv("PATH");
> +                if (!path_env)
> +                {
> +                    dm = configured_dm;
> +                }

... this needed, when at the bottom dm is defaulted to dm_configured anyway?
You could set dm to dm_configured uniformly up front. Furthermore there's
then no real need for dm_configured then.

> +                else
> +                {
> +                    char *path_dup = libxl__strdup(gc, path_env);
> +                    char *saveptr;
> +
> +                    char *path = strtok_r(path_dup, ":", &saveptr);

Main reason I'm replying here is this one though, where CI found gcc to
object:

libxl_dm.c: In function 'libxl__domain_device_model':
libxl_dm.c:356:31: error: 'saveptr' may be used uninitialized in this function [-Werror=maybe-uninitialized]
                         char *candidate = libxl__abs_path(gc, configured_dm, path);
                               ^
cc1: all warnings being treated as errors

The compiler can't know that path_dup is guaranteed non-NULL. Hence, if it
can see (part of) the implementation of strtok_r(), it would observe that
it's possible that the continuation-invocation path is taken, where
saveptr necessarily is consumed.

Taking together all the issues I think I'll revert this, for you to make
another attempt. It may have been a mistake to commit such a change anyway;
I might better have left that to Anthony.

Jan


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Date: Tue, 8 Apr 2025 12:47:58 +0200
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Subject: Re: Ping: [PATCH] libxc/PM: correct (not just) error handling in
 xc_get_cpufreq_para()
To: Anthony PERARD 
Cc: Juergen Gross , xen-devel@lists.xenproject.org
References: 
  
 <75d288ba-1006-46f4-8f51-6d49c5e8449d@suse.com> 
 <8f29b0b3-dc57-417c-937a-50f5aac6f6f8@suse.com> 
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On 08.04.2025 11:59, Anthony PERARD wrote:
> On Mon, Apr 07, 2025 at 05:38:57PM +0200, Jan Beulich wrote:
>> On 07.04.2025 17:23, Anthony PERARD wrote:
>>> On Mon, Apr 07, 2025 at 03:23:48PM +0200, Jan Beulich wrote:
>>>> On 07.04.2025 14:45, Anthony PERARD wrote:
>>>>> Calling xc_get_cpufreq_para with:
>>>>>
>>>>>     user_para = {
>>>>>         .cpu_num = 0,
>>>>>         .freq_num = 0,
>>>>>         .gov_num = 9,
>>>>>     };
>>>>>
>>>>> seems broken. It's looks like the `scaling_available_governors` bounce
>>>>> buffer is going to be used without been allocated properly handled, with
>>>>> this patch.
>>>>
>>>> The local variable "in_gov_num" controls its allocation and use, together with
>>>> has_num. "Use" as in passing to set_xen_guest_handle(). The only further use
>>>
>>> When has_num == 0, `in_gov_num` is only used to set `sys_para->gov_num`.
>>> It also make a conditional call to xc_hypercall_bounce_post() but
>>> there's nothing to do.
>>>
>>> Why user_para.gov_num seems to control the size of a buffer, but then
>>> that buffer is just discarded under some condition with this patch?
>>
>> That's nothing this patch changes. Previously has_num would also have been
>> false in the example you give.
> 
> Right, sorry. I was persuaded that `has_num` meant "any" of the buffers
> are allocated, instead of the written "all" of them are allocated in C.
> The logic in this function is really hard to follow because it doesn't
> make sense, especially the conditional on `has_num`.
> 
> Your patch does make requesting governors actually optional now (and now
> that I realise the calculation of `has_num` doesn't really reflect the
> name). The introduced `in_gov_num` local variable isn't very useful as
> the only real need is in the cleaning path (and we discussed earlier
> that cleaning can be done unconditionally).

Hmm, yes. See below.

> So the patch is fine:
> 
> Reviewed-by: Anthony PERARD 

Thanks.

> Oh, one more thing, it's funny that a lot of faff is done toward making
> the cleaning optional, with all the "unlock_*" label, but then cleaning
> code path can be executed when e.g. cpu_num=0,freq_num=4 (unless the
> hypercall return an error in such case, but the code shouldn't rely on
> that...).

Yeah, perhaps I could have dropped the conditional there, rather than updating
it. Are you happy for me to do so, dropping in_gov_num again (adjusting the
description some, of course)?

Jan


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Date: Tue, 8 Apr 2025 13:21:19 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: "Daniel P. Smith" ,
	Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= ,
	Andrew Cooper ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH v2 02/11] x86/mkreloc: fix obtaining PE image base address
Message-ID: 
References: <20250401130840.72119-1-roger.pau@citrix.com>
 <20250401130840.72119-3-roger.pau@citrix.com>
 <6c37ad18-a830-453e-a7ff-fb4978e3f0df@suse.com>
 
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In-Reply-To: 

On Wed, Apr 02, 2025 at 09:46:53AM +0200, Jan Beulich wrote:
> On 01.04.2025 16:17, Jan Beulich wrote:
> > On 01.04.2025 15:08, Roger Pau Monne wrote:
> >> The base address is in the pe32_opt_hdr, not after it.
> 
> Which is a result of pe.h munging both the optional and the NT header into
> a single structure.
> 
> >> Previous to commit f7f42accbbbb the base was read standalone (as the first
> >> field of pe32_opt_hdr).  However with the addition of reading the full
> >> contents of pe32_opt_hdr, such read will also fetch the base.  The current
> >> attempt to read the base after pe32_opt_hdr is bogus, and could only work
> >> if the file cursor is repositioned using lseek(), but there's no need for
> >> that as the data is already fetched in pe32_opt_hdr.
> > 
> > Yes, but: How did things work at all then with this bug?
> 
> It simply didn't. We got away only because apparently no-one tried a build
> with a linker old enough for this tool to come into play.
> 
> I'd like to suggest the replacement patch below, though.
> 
> Jan
> 
> x86/EFI: correct mkreloc header (field) reading
> 
> With us now reading the full combined optional and NT headers, the
> subsequent reading of (and seeking to) NT header fields is wrong. Since
> PE32 and PE32+ NT headers are different anyway (beyond the image base
> oddity extending across both headers), switch to using a union. This
> allows to fetch the image base more directly then.
> 
> Additionally add checking to map_section(), which would have caught at
> least the wrong (zero) image size that we previously used.
> 
> Fixes: f7f42accbbbb ("x86/efi: Use generic PE/COFF structures")
> Reported-by: Roger Pau Monné 
> Signed-off-by: Jan Beulich 
> ---
> Of the two checks added to map_section(), the 1st ends up being largely
> redundant with the 2nd one. Should we use just the latter?
> 
> Also sanity checking the image base would be possible, but more
> cumbersome if we wanted to check moret than just "is in high half of
> address space). Therefore I've left out doing so.

We could likely check that image_base >= XEN_VIRT_START?  However I'm
not sure how easy it is to make XEN_VIRT_START available to mkreloc.

> --- a/xen/arch/x86/efi/mkreloc.c
> +++ b/xen/arch/x86/efi/mkreloc.c
> @@ -28,14 +28,16 @@ static void usage(const char *cmd, int r
>  static unsigned int load(const char *name, int *handle,
>                           struct section_header **sections,
>                           uint_fast64_t *image_base,
> -                         uint32_t *image_size,
> +                         uint_fast32_t *image_size,
>                           unsigned int *width)
>  {
>      int in = open(name, O_RDONLY);
>      struct mz_hdr mz_hdr;
>      struct pe_hdr pe_hdr;
> -    struct pe32_opt_hdr pe32_opt_hdr;
> -    uint32_t base;
> +    union {
> +        struct pe32_opt_hdr pe;
> +        struct pe32plus_opt_hdr pep;
> +    } pe32_opt_hdr;
>  
>      if ( in < 0 ||
>           read(in, &mz_hdr, sizeof(mz_hdr)) != sizeof(mz_hdr) )
> @@ -54,31 +56,40 @@ static unsigned int load(const char *nam
>  
>      if ( lseek(in, mz_hdr.peaddr, SEEK_SET) < 0 ||
>           read(in, &pe_hdr, sizeof(pe_hdr)) != sizeof(pe_hdr) ||
> -         read(in, &pe32_opt_hdr, sizeof(pe32_opt_hdr)) != sizeof(pe32_opt_hdr) ||
> -         read(in, &base, sizeof(base)) != sizeof(base) ||
> -         /*
> -          * Luckily the image size field lives at the
> -          * same offset for both formats.
> -          */
> -         lseek(in, 24, SEEK_CUR) < 0 ||
> -         read(in, image_size, sizeof(*image_size)) != sizeof(*image_size) )
> +         (read(in, &pe32_opt_hdr.pe, sizeof(pe32_opt_hdr.pe)) !=
> +          sizeof(pe32_opt_hdr.pe)) )
>      {
>          perror(name);
>          exit(3);
>      }
>  
>      switch ( (pe_hdr.magic == PE_MAGIC &&
> -              pe_hdr.opt_hdr_size > sizeof(pe32_opt_hdr)) *
> -              pe32_opt_hdr.magic )
> +              pe_hdr.opt_hdr_size > sizeof(pe32_opt_hdr.pe)) *
> +              pe32_opt_hdr.pe.magic )
>      {
>      case PE_OPT_MAGIC_PE32:
>          *width = 32;
> -        *image_base = base;
> +        *image_base = pe32_opt_hdr.pe.image_base;
> +        *image_size = pe32_opt_hdr.pe.image_size;
>          break;
>      case PE_OPT_MAGIC_PE32PLUS:
> -        *width = 64;
> -        *image_base = ((uint64_t)base << 32) | pe32_opt_hdr.data_base;
> -        break;
> +        if ( pe_hdr.opt_hdr_size > sizeof(pe32_opt_hdr.pep) )
> +        {
> +            if ( read(in,
> +                      &pe32_opt_hdr.pe + 1,
> +                      sizeof(pe32_opt_hdr.pep) - sizeof(pe32_opt_hdr.pe)) !=
> +                 sizeof(pe32_opt_hdr.pep) - sizeof(pe32_opt_hdr.pe) )
> +            {
> +                perror(name);
> +                exit(3);
> +            }
> +
> +            *width = 64;
> +            *image_base = pe32_opt_hdr.pep.image_base;
> +            *image_size = pe32_opt_hdr.pep.image_size;
> +            break;
> +        }

Since you are already refactoring much of this code, won't it be
clearer to fetch the header inside of the switch cases.  So that
there's a single read call for each header type?

> +        /* Fall through. */
>      default:
>          fprintf(stderr, "%s: Wrong PE file format\n", name);
>          exit(3);
> @@ -108,11 +119,28 @@ static unsigned int load(const char *nam
>  static long page_size;
>  
>  static const void *map_section(const struct section_header *sec, int in,
> -                               const char *name)
> +                               const char *name, uint_fast32_t image_size)
>  {
>      const char *ptr;
>      unsigned long offs;
>  
> +    if ( sec->rva > image_size )

Strictly, should this be >=, as rva is a position, and image_size is a
size, so the last allowed bit would be image_size - 1?

Thanks, Roger.


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From: "Anthony PERARD" 
Subject: =?utf-8?Q?Re:=20Ping:=20[PATCH]=20libxc/PM:=20correct=20(not=20just)=20error=20handling=20in=20xc=5Fget=5Fcpufreq=5Fpara()?=
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On Tue, Apr 08, 2025 at 12:47:58PM +0200, Jan Beulich wrote:
> On 08.04.2025 11:59, Anthony PERARD wrote:
> > On Mon, Apr 07, 2025 at 05:38:57PM +0200, Jan Beulich wrote:
> >> On 07.04.2025 17:23, Anthony PERARD wrote:
> >>> On Mon, Apr 07, 2025 at 03:23:48PM +0200, Jan Beulich wrote:
> >>>> On 07.04.2025 14:45, Anthony PERARD wrote:
> >>>>> Calling xc_get_cpufreq_para with:
> >>>>>
> >>>>>     user_para = {
> >>>>>         .cpu_num = 0,
> >>>>>         .freq_num = 0,
> >>>>>         .gov_num = 9,
> >>>>>     };
> >>>>>
> >>>>> seems broken. It's looks like the `scaling_available_governors` bounce
> >>>>> buffer is going to be used without been allocated properly handled, with
> >>>>> this patch.
> >>>>
> >>>> The local variable "in_gov_num" controls its allocation and use, together with
> >>>> has_num. "Use" as in passing to set_xen_guest_handle(). The only further use
> >>>
> >>> When has_num == 0, `in_gov_num` is only used to set `sys_para->gov_num`.
> >>> It also make a conditional call to xc_hypercall_bounce_post() but
> >>> there's nothing to do.
> >>>
> >>> Why user_para.gov_num seems to control the size of a buffer, but then
> >>> that buffer is just discarded under some condition with this patch?
> >>
> >> That's nothing this patch changes. Previously has_num would also have been
> >> false in the example you give.
> > 
> > Right, sorry. I was persuaded that `has_num` meant "any" of the buffers
> > are allocated, instead of the written "all" of them are allocated in C.
> > The logic in this function is really hard to follow because it doesn't
> > make sense, especially the conditional on `has_num`.
> > 
> > Your patch does make requesting governors actually optional now (and now
> > that I realise the calculation of `has_num` doesn't really reflect the
> > name). The introduced `in_gov_num` local variable isn't very useful as
> > the only real need is in the cleaning path (and we discussed earlier
> > that cleaning can be done unconditionally).
> 
> Hmm, yes. See below.
> 
> > So the patch is fine:
> > 
> > Reviewed-by: Anthony PERARD 
> 
> Thanks.
> 
> > Oh, one more thing, it's funny that a lot of faff is done toward making
> > the cleaning optional, with all the "unlock_*" label, but then cleaning
> > code path can be executed when e.g. cpu_num=0,freq_num=4 (unless the
> > hypercall return an error in such case, but the code shouldn't rely on
> > that...).
> 
> Yeah, perhaps I could have dropped the conditional there, rather than updating
> it. Are you happy for me to do so, dropping in_gov_num again (adjusting the
> description some, of course)?

Yes, sounds good, thanks.

-- 

Anthony Perard | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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Date: Tue, 8 Apr 2025 13:51:58 +0200
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Subject: Re: [PATCH v2] xen/riscv: Increase XEN_VIRT_SIZE
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <808d1b346bc90dde38fd19a6b92ab78d78e42936.1743766932.git.oleksii.kurochko@gmail.com>
 
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On 4/7/25 12:09 PM, Jan Beulich wrote:
> On 04.04.2025 18:04, Oleksii Kurochko wrote:
>> --- a/xen/arch/riscv/include/asm/config.h
>> +++ b/xen/arch/riscv/include/asm/config.h
>> @@ -41,11 +41,11 @@
>>    * Start addr          | End addr         | Slot       | area description
>>    * ============================================================================
>>    *                   .....                 L2 511          Unused
>> - *  0xffffffffc0a00000  0xffffffffc0bfffff L2 511          Fixmap
>> + *  0xffffffffc1800000  0xffffffffc1afffff L2 511          Fixmap
> Isn't the upper bound 0xffffffffc19fffff now?

Yes, it should be updated to 0xffffffffc19fffff.

>
>> --- a/xen/arch/riscv/include/asm/mm.h
>> +++ b/xen/arch/riscv/include/asm/mm.h
>> @@ -43,13 +43,19 @@ static inline void *maddr_to_virt(paddr_t ma)
>>    */
>>   static inline unsigned long virt_to_maddr(unsigned long va)
>>   {
>> +    const unsigned int vpn1_shift = PAGETABLE_ORDER + PAGE_SHIFT;
>> +    const unsigned long va_vpn = va >> vpn1_shift;
>> +    const unsigned long xen_virt_start_vpn =
>> +        _AC(XEN_VIRT_START, UL) >> vpn1_shift;
>> +    const unsigned long xen_virt_end_vpn =
>> +        xen_virt_start_vpn + ((XEN_VIRT_SIZE >> vpn1_shift) - 1);
>> +
>>       if ((va >= DIRECTMAP_VIRT_START) &&
>>           (va <= DIRECTMAP_VIRT_END))
>>           return directmapoff_to_maddr(va - directmap_virt_start);
>>   
>> -    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(2));
>> -    ASSERT((va >> (PAGETABLE_ORDER + PAGE_SHIFT)) ==
>> -           (_AC(XEN_VIRT_START, UL) >> (PAGETABLE_ORDER + PAGE_SHIFT)));
>> +    BUILD_BUG_ON(XEN_VIRT_SIZE > GB(1));
>> +    ASSERT((va_vpn >= xen_virt_start_vpn) && (va_vpn <= xen_virt_end_vpn));
> Not all of the range is backed by memory, and for the excess space the
> translation is therefore (likely) wrong. Which better would be caught by
> the assertion?

Backed here means that the memory is actually mapped?

IIUC it is needed to check only for the range [XEN_VIRT_START, XEN_VIRT_START+xen_phys_size]
where xen_phys_size=(unsigned long)_end - (unsigned long)_start.

Did I understand you correctly?

>
>> --- a/xen/arch/riscv/mm.c
>> +++ b/xen/arch/riscv/mm.c
>> @@ -31,20 +31,27 @@ unsigned long __ro_after_init phys_offset; /* = load_start - XEN_VIRT_START */
>>   #define LOAD_TO_LINK(addr) ((unsigned long)(addr) - phys_offset)
>>   
>>   /*
>> - * It is expected that Xen won't be more then 2 MB.
>> + * It is expected that Xen won't be more then XEN_VIRT_SIZE MB.
>>    * The check in xen.lds.S guarantees that.
>> - * At least 3 page tables (in case of Sv39 ) are needed to cover 2 MB.
>> - * One for each page level table with PAGE_SIZE = 4 Kb.
>>    *
>> - * One L0 page table can cover 2 MB(512 entries of one page table * PAGE_SIZE).
>> + * Root page table is shared with the initial mapping and is declared
>> + * separetely. (look at stage1_pgtbl_root)
>>    *
>> - * It might be needed one more page table in case when Xen load address
>> - * isn't 2 MB aligned.
>> + * An amount of page tables between root page table and L0 page table
>> + * (in the case of Sv39 it covers L1 table):
>> + *   (CONFIG_PAGING_LEVELS - 2) are needed for an identity mapping and
>> + *   the same amount are needed for Xen.
>>    *
>> - * CONFIG_PAGING_LEVELS page tables are needed for the identity mapping,
>> - * except that the root page table is shared with the initial mapping
>> + * An amount of L0 page tables:
>> + *   (512 entries of one L0 page table covers 2MB == 1<> + *   XEN_VIRT_SIZE >> XEN_PT_LEVEL_SHIFT(1) are needed for Xen and
>> + *   one L0 is needed for indenity mapping.
>> + *
>> + *   It might be needed one more page table in case when Xen load
>> + *   address isn't 2 MB aligned.
> Shouldn't we guarantee that?

I think it's sufficient to guarantee 4KB alignment.

The only real benefit I see in enforcing larger alignment is that it likely enables
the use of superpages for mapping, which would reduce TLB pressure.
But perhaps I'm missing something?

Or did you mean that if 2MB alignment isn't guaranteed, then we might need two extra
page tables—one if the start address isn't 2MB aligned, and the Xen size is larger than 2MB?
Then yes one more page table should be added to PGTBL_INITIAL_COUNT.

> What may require an extra page table is when Xen
> crosses a 1Gb boundary (unless we also guaranteed that it won't).

You're right—I also need to add an extra page table if Xen crosses a 1GB boundary.

Thanks!

~ Oleksii

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On 4/7/25 12:09 PM, Jan Beulich wrote:

    

    

      
On 04.04.2025 18:04, Oleksii Kurochko wrote:


      

        
--- a/xen/arch/riscv/include/asm/config.h
+++ b/xen/arch/riscv/include/asm/config.h
@@ -41,11 +41,11 @@
  * Start addr          | End addr         | Slot       | area description
  * ============================================================================
  *                   .....                 L2 511          Unused
- *  0xffffffffc0a00000  0xffffffffc0bfffff L2 511          Fixmap
+ *  0xffffffffc1800000  0xffffffffc1afffff L2 511          Fixmap


      

      
Isn't the upper bound 0xffffffffc19fffff now?

    

    
Yes, it should be updated to 0xffffffffc19fffff.


    

      



      

        
--- a/xen/arch/riscv/include/asm/mm.h
+++ b/xen/arch/riscv/include/asm/mm.h
@@ -43,13 +43,19 @@ static inline void *maddr_to_virt(paddr_t ma)
  */
 static inline unsigned long virt_to_maddr(unsigned long va)
 {
+    const unsigned int vpn1_shift = PAGETABLE_ORDER + PAGE_SHIFT;
+    const unsigned long va_vpn = va >> vpn1_shift;
+    const unsigned long xen_virt_start_vpn =
+        _AC(XEN_VIRT_START, UL) >> vpn1_shift;
+    const unsigned long xen_virt_end_vpn =
+        xen_virt_start_vpn + ((XEN_VIRT_SIZE >> vpn1_shift) - 1);
+
     if ((va >= DIRECTMAP_VIRT_START) &&
         (va <= DIRECTMAP_VIRT_END))
         return directmapoff_to_maddr(va - directmap_virt_start);
 
-    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(2));
-    ASSERT((va >> (PAGETABLE_ORDER + PAGE_SHIFT)) ==
-           (_AC(XEN_VIRT_START, UL) >> (PAGETABLE_ORDER + PAGE_SHIFT)));
+    BUILD_BUG_ON(XEN_VIRT_SIZE > GB(1));
+    ASSERT((va_vpn >= xen_virt_start_vpn) && (va_vpn <= xen_virt_end_vpn));


      

      
Not all of the range is backed by memory, and for the excess space the
translation is therefore (likely) wrong. Which better would be caught by
the assertion?

    

    
Backed here means that the memory is actually mapped?

IIUC it is needed to check only for the range [XEN_VIRT_START, XEN_VIRT_START+xen_phys_size]
where xen_phys_size=(unsigned long)_end - (unsigned long)_start.

Did I understand you correctly?

    

      



      

        
--- a/xen/arch/riscv/mm.c
+++ b/xen/arch/riscv/mm.c
@@ -31,20 +31,27 @@ unsigned long __ro_after_init phys_offset; /* = load_start - XEN_VIRT_START */
 #define LOAD_TO_LINK(addr) ((unsigned long)(addr) - phys_offset)
 
 /*
- * It is expected that Xen won't be more then 2 MB.
+ * It is expected that Xen won't be more then XEN_VIRT_SIZE MB.
  * The check in xen.lds.S guarantees that.
- * At least 3 page tables (in case of Sv39 ) are needed to cover 2 MB.
- * One for each page level table with PAGE_SIZE = 4 Kb.
  *
- * One L0 page table can cover 2 MB(512 entries of one page table * PAGE_SIZE).
+ * Root page table is shared with the initial mapping and is declared
+ * separetely. (look at stage1_pgtbl_root)
  *
- * It might be needed one more page table in case when Xen load address
- * isn't 2 MB aligned.
+ * An amount of page tables between root page table and L0 page table
+ * (in the case of Sv39 it covers L1 table):
+ *   (CONFIG_PAGING_LEVELS - 2) are needed for an identity mapping and
+ *   the same amount are needed for Xen.
  *
- * CONFIG_PAGING_LEVELS page tables are needed for the identity mapping,
- * except that the root page table is shared with the initial mapping
+ * An amount of L0 page tables:
+ *   (512 entries of one L0 page table covers 2MB == 1<<XEN_PT_LEVEL_SHIFT(1))
+ *   XEN_VIRT_SIZE >> XEN_PT_LEVEL_SHIFT(1) are needed for Xen and
+ *   one L0 is needed for indenity mapping.
+ *
+ *   It might be needed one more page table in case when Xen load
+ *   address isn't 2 MB aligned.


      

      
Shouldn't we guarantee that? 


    

    
I think it's sufficient to guarantee 4KB alignment.

    
The only real benefit I see in enforcing larger alignment is that it likely enables
the use of superpages for mapping, which would reduce TLB pressure.
But perhaps I'm missing something?

    
Or did you mean that if 2MB alignment isn't guaranteed, then we might need two extra
page tables—one if the start address isn't 2MB aligned, and the Xen size is larger than 2MB?
Then yes one more page table should be added to PGTBL_INITIAL_COUNT.

    

    

    

      
What may require an extra page table is when Xen
crosses a 1Gb boundary (unless we also guaranteed that it won't).


    

    
You're right—I also need to add an extra page table if Xen crosses a 1GB boundary.

Thanks!

~ Oleksii


  


--------------bAMtNFY87y0kSSAMPceiNG8a--


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Subject: Re: [PATCH v2] xen/riscv: Increase XEN_VIRT_SIZE
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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References: <808d1b346bc90dde38fd19a6b92ab78d78e42936.1743766932.git.oleksii.kurochko@gmail.com>
 
 
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On 08.04.2025 13:51, Oleksii Kurochko wrote:
> On 4/7/25 12:09 PM, Jan Beulich wrote:
>> On 04.04.2025 18:04, Oleksii Kurochko wrote:
>>> --- a/xen/arch/riscv/include/asm/mm.h
>>> +++ b/xen/arch/riscv/include/asm/mm.h
>>> @@ -43,13 +43,19 @@ static inline void *maddr_to_virt(paddr_t ma)
>>>    */
>>>   static inline unsigned long virt_to_maddr(unsigned long va)
>>>   {
>>> +    const unsigned int vpn1_shift = PAGETABLE_ORDER + PAGE_SHIFT;
>>> +    const unsigned long va_vpn = va >> vpn1_shift;
>>> +    const unsigned long xen_virt_start_vpn =
>>> +        _AC(XEN_VIRT_START, UL) >> vpn1_shift;
>>> +    const unsigned long xen_virt_end_vpn =
>>> +        xen_virt_start_vpn + ((XEN_VIRT_SIZE >> vpn1_shift) - 1);
>>> +
>>>       if ((va >= DIRECTMAP_VIRT_START) &&
>>>           (va <= DIRECTMAP_VIRT_END))
>>>           return directmapoff_to_maddr(va - directmap_virt_start);
>>>   
>>> -    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(2));
>>> -    ASSERT((va >> (PAGETABLE_ORDER + PAGE_SHIFT)) ==
>>> -           (_AC(XEN_VIRT_START, UL) >> (PAGETABLE_ORDER + PAGE_SHIFT)));
>>> +    BUILD_BUG_ON(XEN_VIRT_SIZE > GB(1));
>>> +    ASSERT((va_vpn >= xen_virt_start_vpn) && (va_vpn <= xen_virt_end_vpn));
>> Not all of the range is backed by memory, and for the excess space the
>> translation is therefore (likely) wrong. Which better would be caught by
>> the assertion?
> 
> Backed here means that the memory is actually mapped?
> 
> IIUC it is needed to check only for the range [XEN_VIRT_START, XEN_VIRT_START+xen_phys_size]
> where xen_phys_size=(unsigned long)_end - (unsigned long)_start.
> 
> Did I understand you correctly?

I think so, yes. Depending on what you (intend to) do to .init.* at the
end of boot, that range may later also want excluding.

>>> --- a/xen/arch/riscv/mm.c
>>> +++ b/xen/arch/riscv/mm.c
>>> @@ -31,20 +31,27 @@ unsigned long __ro_after_init phys_offset; /* = load_start - XEN_VIRT_START */
>>>   #define LOAD_TO_LINK(addr) ((unsigned long)(addr) - phys_offset)
>>>   
>>>   /*
>>> - * It is expected that Xen won't be more then 2 MB.
>>> + * It is expected that Xen won't be more then XEN_VIRT_SIZE MB.
>>>    * The check in xen.lds.S guarantees that.
>>> - * At least 3 page tables (in case of Sv39 ) are needed to cover 2 MB.
>>> - * One for each page level table with PAGE_SIZE = 4 Kb.
>>>    *
>>> - * One L0 page table can cover 2 MB(512 entries of one page table * PAGE_SIZE).
>>> + * Root page table is shared with the initial mapping and is declared
>>> + * separetely. (look at stage1_pgtbl_root)
>>>    *
>>> - * It might be needed one more page table in case when Xen load address
>>> - * isn't 2 MB aligned.
>>> + * An amount of page tables between root page table and L0 page table
>>> + * (in the case of Sv39 it covers L1 table):
>>> + *   (CONFIG_PAGING_LEVELS - 2) are needed for an identity mapping and
>>> + *   the same amount are needed for Xen.
>>>    *
>>> - * CONFIG_PAGING_LEVELS page tables are needed for the identity mapping,
>>> - * except that the root page table is shared with the initial mapping
>>> + * An amount of L0 page tables:
>>> + *   (512 entries of one L0 page table covers 2MB == 1<>> + *   XEN_VIRT_SIZE >> XEN_PT_LEVEL_SHIFT(1) are needed for Xen and
>>> + *   one L0 is needed for indenity mapping.
>>> + *
>>> + *   It might be needed one more page table in case when Xen load
>>> + *   address isn't 2 MB aligned.
>> Shouldn't we guarantee that?
> 
> I think it's sufficient to guarantee 4KB alignment.
> 
> The only real benefit I see in enforcing larger alignment is that it likely enables
> the use of superpages for mapping, which would reduce TLB pressure.
> But perhaps I'm missing something?

No, it's indeed mainly that.

> Or did you mean that if 2MB alignment isn't guaranteed, then we might need two extra
> page tables—one if the start address isn't 2MB aligned, and the Xen size is larger than 2MB?
> Then yes one more page table should be added to PGTBL_INITIAL_COUNT.

Well, of course - if alignment isn't guaranteed, crossing whatever boundaries
of course needs accounting for.

Jan


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From: "Anthony PERARD" 
Subject: =?utf-8?Q?Re:=20[PATCH=20test-artifacts=20v2=2014/12]=20scripts:=20build=20initrd=20cpio?=
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On Mon, Apr 07, 2025 at 06:31:06PM +0200, Marek Marczykowski-G=C3=B3recki w=
rote:
> There is one more difference: the cpio.gz contains the whole thing
> twice. Once as rootfs for dom0 and then another as boot/initrd-domU.
> Dropping .tar.gz is probably a good idea at some point, so I'm okay with
> such comment added. But I imagine some future tests may benefit from
> just one layer, which may want introducing another cpio.gz without
> boot/initrd-domU included. In fact, even right now that might be useful
> - for example dom0less arm64 test uses just busybox for domU rootfs, not
> the whole archive (so with my changes dom0 rootfs has unused
> boot/initrd-domU included).

In such case, would it make sense to prepare several initrd.cpio.gz? A
common one, then having overlays of files we want to add or replace to
the initrd of spefic test. I think osstest used to do something like
that, with command that would be:
    cat common.cpio.gz overlay.cpio.gz > initrd.cpio.gz

If it matter, is seem that the "file.cpio" used to be made with
`cpio -Hnewc -o`

Cheers,

-- 

Anthony Perard | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech





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 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
From: Jan Beulich 
Subject: [PATCH] x86emul/test: drop check for AVX512-4FMAPS
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Use of Xeon Phi features was dropped earlier on; this one was overlooked.

Fixes: 85191cf32180 ("x86: drop Xeon Phi support")
Signed-off-by: Jan Beulich 
---
In principle it looks as if we could now drop all of this checking, as
gcc5 supports all of the features we check for. AVX512-4FMAPS is an
example though where checking helps, as this and other Xeon Phi features
were supported by an intermediate range of gcc versions.

--- a/tools/tests/x86_emulator/Makefile
+++ b/tools/tests/x86_emulator/Makefile
@@ -105,7 +105,7 @@ TARGET-$(shell echo 'int i;' | $(CC) -x
 endef
 
 ISA := bmi bmi2 tbm sse4.1 sse4.2 sse4a avx avx2 f16c
-ISA += $(addprefix avx512,f bw dq 4fmaps)
+ISA += $(addprefix avx512,f bw dq)
 $(foreach isa,$(ISA),$(eval $(call isa-check-cc,$(isa))))
 
 # Also explicitly check for {evex} pseudo-prefix support, which got introduced


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Date: Tue, 8 Apr 2025 14:28:39 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Anthony PERARD 
Cc: Andrew Cooper ,
	xen-devel@lists.xenproject.org,
	Stefano Stabellini ,
	Michal Orzel ,
	Jan Beulich , Julien Grall ,
	Roger Pau =?utf-8?B?TW9ubsOp?= 
Subject: Re: [PATCH test-artifacts v2 14/12] scripts: build initrd cpio
Message-ID: 
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Date: Tue, 8 Apr 2025 14:28:39 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Anthony PERARD 
Cc: Andrew Cooper ,
	xen-devel@lists.xenproject.org,
	Stefano Stabellini ,
	Michal Orzel ,
	Jan Beulich , Julien Grall ,
	Roger Pau =?utf-8?B?TW9ubsOp?= 
Subject: Re: [PATCH test-artifacts v2 14/12] scripts: build initrd cpio

On Tue, Apr 08, 2025 at 12:06:51PM +0000, Anthony PERARD wrote:
> On Mon, Apr 07, 2025 at 06:31:06PM +0200, Marek Marczykowski-G=C3=B3recki=
 wrote:
> > There is one more difference: the cpio.gz contains the whole thing
> > twice. Once as rootfs for dom0 and then another as boot/initrd-domU.
> > Dropping .tar.gz is probably a good idea at some point, so I'm okay with
> > such comment added. But I imagine some future tests may benefit from
> > just one layer, which may want introducing another cpio.gz without
> > boot/initrd-domU included. In fact, even right now that might be useful
> > - for example dom0less arm64 test uses just busybox for domU rootfs, not
> > the whole archive (so with my changes dom0 rootfs has unused
> > boot/initrd-domU included).
>=20
> In such case, would it make sense to prepare several initrd.cpio.gz? A
> common one, then having overlays of files we want to add or replace to
> the initrd of spefic test. I think osstest used to do something like
> that, with command that would be:
>     cat common.cpio.gz overlay.cpio.gz > initrd.cpio.gz
>=20
> If it matter, is seem that the "file.cpio" used to be made with
> `cpio -Hnewc -o`

This is already how final initrd is constructed with my changes.
Having said that, maybe test-artifacts should not include
boot/initrd-domU in initrd.cpio.gz initially, but have a separate cpio
that has just boot/initrd-domU there. Most tests do use this domU
initrd, but since they need to concatenate something anyway, maybe
starting with two files instead of one doesn't make much difference?

So, it would be:
- initrd.cpio.gz - plain rootfs, for dom0 (or domU in dom0less tests)
- initrd-in-boot.cpio.gz - the above initrd.cpio.gz packed again as
  boot/initrd-domU

What do you think?

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Date: Tue, 8 Apr 2025 14:34:48 +0200
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Subject: Re: [PATCH v2 02/11] x86/mkreloc: fix obtaining PE image base address
To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
Cc: "Daniel P. Smith" ,
 =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 , Andrew Cooper
 , xen-devel@lists.xenproject.org
References: <20250401130840.72119-1-roger.pau@citrix.com>
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On 08.04.2025 13:21, Roger Pau Monné wrote:
> On Wed, Apr 02, 2025 at 09:46:53AM +0200, Jan Beulich wrote:
>> x86/EFI: correct mkreloc header (field) reading
>>
>> With us now reading the full combined optional and NT headers, the
>> subsequent reading of (and seeking to) NT header fields is wrong. Since
>> PE32 and PE32+ NT headers are different anyway (beyond the image base
>> oddity extending across both headers), switch to using a union. This
>> allows to fetch the image base more directly then.
>>
>> Additionally add checking to map_section(), which would have caught at
>> least the wrong (zero) image size that we previously used.
>>
>> Fixes: f7f42accbbbb ("x86/efi: Use generic PE/COFF structures")
>> Reported-by: Roger Pau Monné 
>> Signed-off-by: Jan Beulich 
>> ---
>> Of the two checks added to map_section(), the 1st ends up being largely
>> redundant with the 2nd one. Should we use just the latter?
>>
>> Also sanity checking the image base would be possible, but more
>> cumbersome if we wanted to check moret than just "is in high half of
>> address space). Therefore I've left out doing so.
> 
> We could likely check that image_base >= XEN_VIRT_START?  However I'm
> not sure how easy it is to make XEN_VIRT_START available to mkreloc.

This is precisely why I said "more cumbersome".

>> @@ -54,31 +56,40 @@ static unsigned int load(const char *nam
>>  
>>      if ( lseek(in, mz_hdr.peaddr, SEEK_SET) < 0 ||
>>           read(in, &pe_hdr, sizeof(pe_hdr)) != sizeof(pe_hdr) ||
>> -         read(in, &pe32_opt_hdr, sizeof(pe32_opt_hdr)) != sizeof(pe32_opt_hdr) ||
>> -         read(in, &base, sizeof(base)) != sizeof(base) ||
>> -         /*
>> -          * Luckily the image size field lives at the
>> -          * same offset for both formats.
>> -          */
>> -         lseek(in, 24, SEEK_CUR) < 0 ||
>> -         read(in, image_size, sizeof(*image_size)) != sizeof(*image_size) )
>> +         (read(in, &pe32_opt_hdr.pe, sizeof(pe32_opt_hdr.pe)) !=
>> +          sizeof(pe32_opt_hdr.pe)) )
>>      {
>>          perror(name);
>>          exit(3);
>>      }
>>  
>>      switch ( (pe_hdr.magic == PE_MAGIC &&
>> -              pe_hdr.opt_hdr_size > sizeof(pe32_opt_hdr)) *
>> -              pe32_opt_hdr.magic )
>> +              pe_hdr.opt_hdr_size > sizeof(pe32_opt_hdr.pe)) *
>> +              pe32_opt_hdr.pe.magic )
>>      {
>>      case PE_OPT_MAGIC_PE32:
>>          *width = 32;
>> -        *image_base = base;
>> +        *image_base = pe32_opt_hdr.pe.image_base;
>> +        *image_size = pe32_opt_hdr.pe.image_size;
>>          break;
>>      case PE_OPT_MAGIC_PE32PLUS:
>> -        *width = 64;
>> -        *image_base = ((uint64_t)base << 32) | pe32_opt_hdr.data_base;
>> -        break;
>> +        if ( pe_hdr.opt_hdr_size > sizeof(pe32_opt_hdr.pep) )
>> +        {
>> +            if ( read(in,
>> +                      &pe32_opt_hdr.pe + 1,
>> +                      sizeof(pe32_opt_hdr.pep) - sizeof(pe32_opt_hdr.pe)) !=
>> +                 sizeof(pe32_opt_hdr.pep) - sizeof(pe32_opt_hdr.pe) )
>> +            {
>> +                perror(name);
>> +                exit(3);
>> +            }
>> +
>> +            *width = 64;
>> +            *image_base = pe32_opt_hdr.pep.image_base;
>> +            *image_size = pe32_opt_hdr.pep.image_size;
>> +            break;
>> +        }
> 
> Since you are already refactoring much of this code, won't it be
> clearer to fetch the header inside of the switch cases.  So that
> there's a single read call for each header type?

Except that the switch() itself uses not only pe_hdr, but also
pe32_opt_hdr. That could be re-arranged, but I'm a little reluctant to
do so.

>> @@ -108,11 +119,28 @@ static unsigned int load(const char *nam
>>  static long page_size;
>>  
>>  static const void *map_section(const struct section_header *sec, int in,
>> -                               const char *name)
>> +                               const char *name, uint_fast32_t image_size)
>>  {
>>      const char *ptr;
>>      unsigned long offs;
>>  
>> +    if ( sec->rva > image_size )
> 
> Strictly, should this be >=, as rva is a position, and image_size is a
> size, so the last allowed bit would be image_size - 1?

Yes and no. No in so far as this would be wrong for zero-size sections.
Yet see also the first of the two post-commit-message remarks.

Jan


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	+iB77sW4QIXih99koBrrIrhdUSF1Mlg=
From: Juergen Gross 
To: xen-devel@lists.xenproject.org
Cc: Juergen Gross ,
	Oleksii Kurochko ,
	Community Manager ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Nick Rosbrook ,
	George Dunlap ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Samuel Thibault 
Subject: [PATCH v2 0/6] remove qemu-traditional
Date: Tue,  8 Apr 2025 14:35:18 +0200
Message-ID: <20250408123526.14613-1-jgross@suse.com>
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Remove the qemu-traditional support. This includes the Mini-OS
based ioemu-stubdom.

Don't remove ROMBIOS for now, as it can be used with qemu (XenServer
is doing that).

After adding the series a run of autoconf should be done.

Changes in V2:
- addressed comments

Juergen Gross (6):
  SUPPORT.md: make Linux based stubdom fully supported
  docs: remove qemu-traditional support from documentation
  tools: remove support for running a guest with qemu-traditional
  tools: remove qemu-traditional
  stubdom: remove ancient stubdom-dm script
  build: don't require full tools build for building stubdoms

 .gitignore                                    |   3 -
 CHANGELOG.md                                  |   2 +
 Config.mk                                     |  24 --
 INSTALL                                       |  12 -
 MAINTAINERS                                   |   4 -
 Makefile                                      |   2 +-
 README                                        |   2 +-
 SUPPORT.md                                    |  21 +-
 config/Tools.mk.in                            |   1 -
 docs/man/xl-pci-configuration.5.pod           |   4 +-
 docs/man/xl.cfg.5.pod.in                      |  46 +--
 docs/misc/stubdom.txt                         |  52 ---
 docs/misc/xenstore-paths.pandoc               |   3 +-
 docs/process/branching-checklist.txt          |   4 -
 docs/process/release-technician-checklist.txt |   3 -
 docs/process/xen-release-management.pandoc    |   2 +-
 stubdom/Makefile                              |  84 +----
 stubdom/configure                             |  89 -----
 stubdom/configure.ac                          |  15 -
 stubdom/ioemu-minios.cfg                      |   6 -
 stubdom/stubdom-dm                            | 182 ----------
 tools/Makefile                                |  58 ----
 tools/Rules.mk                                |   3 -
 tools/config.h.in                             |   3 -
 tools/configure                               |  42 +--
 tools/configure.ac                            |  21 +-
 tools/firmware/hvmloader/pci.c                |  19 +-
 tools/firmware/hvmloader/util.c               |   9 +-
 tools/golang/xenlight/types.gen.go            |   1 -
 tools/libacpi/mk_dsdt.c                       | 177 ++--------
 tools/libs/light/libxl_create.c               |  60 +---
 tools/libs/light/libxl_disk.c                 |   7 -
 tools/libs/light/libxl_dm.c                   | 320 +-----------------
 tools/libs/light/libxl_dom.c                  |  10 -
 tools/libs/light/libxl_dom_save.c             | 140 --------
 tools/libs/light/libxl_dom_suspend.c          |  65 ----
 tools/libs/light/libxl_domain.c               |  15 -
 tools/libs/light/libxl_internal.c             |   6 +-
 tools/libs/light/libxl_internal.h             |   5 +-
 tools/libs/light/libxl_pci.c                  | 183 ----------
 tools/libs/light/libxl_stream_write.c         |   4 -
 tools/libs/light/libxl_types.idl              |   1 -
 tools/python/xen/migration/libxl.py           |   2 -
 tools/xl/xl_parse.c                           |   5 +-
 44 files changed, 81 insertions(+), 1636 deletions(-)
 delete mode 100644 stubdom/ioemu-minios.cfg
 delete mode 100644 stubdom/stubdom-dm

-- 
2.43.0



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From: Juergen Gross 
To: xen-devel@lists.xenproject.org
Cc: Juergen Gross ,
	Oleksii Kurochko ,
	Community Manager ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v2 1/6] SUPPORT.md: make Linux based stubdom fully supported
Date: Tue,  8 Apr 2025 14:35:19 +0200
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All patches needed for running with a Linux stubdom device model are
in the tree and QubesOS is using and testing Linux stubdoms nowadays.

Switch support from "Tech Preview" to "Supported, with caveats".

Signed-off-by: Juergen Gross 
---
V2:
- switch to "Supported, with caveats" (security team)
---
 CHANGELOG.md | 1 +
 SUPPORT.md   | 5 ++++-
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index 8f6afa5c85..ce4fcf2feb 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -10,6 +10,7 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/)
  - The minimum toolchain requirements have increased for some architectures:
    - For x86, GCC 5.1 and Binutils 2.25, or Clang/LLVM 11
    - For ARM32 and ARM64, GCC 5.1 and Binutils 2.25
+ - Linux based device model stubdomains are now fully supported.
 
 ### Added
  - On x86:
diff --git a/SUPPORT.md b/SUPPORT.md
index 91cb6f8ed2..e8fd0c251e 100644
--- a/SUPPORT.md
+++ b/SUPPORT.md
@@ -260,7 +260,10 @@ Go (golang) bindings for libxl
 
 Support for running qemu-xen device model in a linux stubdomain.
 
-    Status: Tech Preview
+    Status: Supported, with caveats
+
+Any issue in the stubdomain affecting only the guest it is servicing
+or itself will not be regarded a security issue.
 
 ## Xenstore
 
-- 
2.43.0



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From: Juergen Gross 
To: xen-devel@lists.xenproject.org
Cc: Juergen Gross ,
	Anthony PERARD ,
	Andrew Cooper ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v2 2/6] docs: remove qemu-traditional support from documentation
Date: Tue,  8 Apr 2025 14:35:20 +0200
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In preparation to no longer support qemu-traditional (including
qemu-stubdom), remove it from documentation.

Signed-off-by: Juergen Gross 
---
V2:
- mention "qemu_xen_traditional" in xenstore-paths.pandoc as a removed
  device model variant (Andrew Cooper)
- don't drop Config.mk related documentation for QEMU_TRADITIONAL_REVISION
  (Jan Beulich)
---
 docs/man/xl-pci-configuration.5.pod           |  4 +-
 docs/man/xl.cfg.5.pod.in                      | 46 +++-------------
 docs/misc/stubdom.txt                         | 52 -------------------
 docs/misc/xenstore-paths.pandoc               |  3 +-
 docs/process/branching-checklist.txt          |  3 --
 docs/process/release-technician-checklist.txt |  2 -
 docs/process/xen-release-management.pandoc    |  2 +-
 7 files changed, 13 insertions(+), 99 deletions(-)

diff --git a/docs/man/xl-pci-configuration.5.pod b/docs/man/xl-pci-configuration.5.pod
index ec76f590b7..0691f06ad3 100644
--- a/docs/man/xl-pci-configuration.5.pod
+++ b/docs/man/xl-pci-configuration.5.pod
@@ -111,8 +111,8 @@ if this parameter is not specified.
 =item Description
 
 By default pciback only allows PV guests to write "known safe" values
-into PCI configuration space, likewise QEMU (both qemu-xen and
-qemu-xen-traditional) imposes the same constraint on HVM guests.
+into PCI configuration space, likewise QEMU imposes the same constraint
+on HVM guests.
 However, many devices require writes to other areas of the configuration space
 in order to operate properly.  This option tells the backend (pciback or QEMU)
 to allow all writes to the PCI configuration space of this device by this
diff --git a/docs/man/xl.cfg.5.pod.in b/docs/man/xl.cfg.5.pod.in
index 7339c44efd..ccf0c58895 100644
--- a/docs/man/xl.cfg.5.pod.in
+++ b/docs/man/xl.cfg.5.pod.in
@@ -895,12 +895,6 @@ is used.
 Specifies the path to the X authority file that should be used to
 connect to the X server when the B option is used.
 
-=item B
-
-Enable OpenGL acceleration of the SDL display. Only effects machines
-using B and only if the
-device-model was compiled with OpenGL support. The default is 0 (disabled).
-
 =item B
 
 Configure the keymap to use for the keyboard associated with this
@@ -1215,17 +1209,14 @@ working graphics passthrough. See the XenVGAPassthroughTestedAdapters
 L wiki page
 for graphics cards currently supported by B.
 
-B is currently supported both with the qemu-xen-traditional
-device-model and upstream qemu-xen device-model.
+B is currently supported with the upstream qemu-xen device-model.
 
 When given as a boolean the B option either disables graphics
 card passthrough or enables autodetection.
 
 When given as a string the B option describes the type
 of device to enable. Note that this behavior is only supported with the
-upstream qemu-xen device-model. With qemu-xen-traditional IGD (Intel Graphics
-Device) is always assumed and options other than autodetect or explicit IGD
-will result in an error.
+upstream qemu-xen device-model.
 
 Currently, valid values for the option are:
 
@@ -1903,10 +1894,7 @@ it may be useful to request a different one, like UEFI.
 
 =item B
 
-Loads ROMBIOS, a 16-bit x86 compatible BIOS. This is used by default
-when B. This is the only BIOS
-option supported when B. This is
-the BIOS used by all previous Xen versions.
+Loads ROMBIOS, a 16-bit x86 compatible BIOS.
 
 =item B
 
@@ -1926,8 +1914,7 @@ Override the path to the blob to be used as BIOS. The blob provided here MUST
 be consistent with the B which you have specified. You should not
 normally need to specify this option.
 
-This option does not have any effect if using B or
-B.
+This option does not have any effect if using B.
 
 =item B
 
@@ -2516,15 +2503,10 @@ Sets the amount of RAM which the emulated video card will contain,
 which in turn limits the resolutions and bit depths which will be
 available.
 
-When using the qemu-xen-traditional device-model, the default as well as
-minimum amount of video RAM for stdvga is 8 MB, which is sufficient for e.g.
-1600x1200 at 32bpp. For the upstream qemu-xen device-model, the default and
-minimum is 16 MB.
+When using stdvga, the default and minimum is 16 MB.
 
-When using the emulated Cirrus graphics card (B) and the
-qemu-xen-traditional device-model, the amount of video RAM is fixed at 4 MB,
-which is sufficient for 1024x768 at 32 bpp. For the upstream qemu-xen
-device-model, the default and minimum is 8 MB.
+When using the emulated Cirrus graphics card (B), the
+default and minimum is 8 MB.
 
 For QXL vga, both the default and minimal are 128MB.
 If B is set less than 128MB, an error will be triggered.
@@ -2590,12 +2572,6 @@ B manpage. The default is B.
 Specifies that the display should be presented via an X window (using
 Simple DirectMedia Layer). The default is (0) not enabled.
 
-=item B
-
-Enable OpenGL acceleration of the SDL display. Only effects machines
-using B and only if the
-device-model was compiled with OpenGL support. Default is (0) false.
-
 =item B
 
 Enable or disable the virtual graphics device.  The default is to
@@ -2925,11 +2901,6 @@ Valid values are:
 Use the device-model merged into the upstream QEMU project.
 This device-model is the default for Linux dom0.
 
-=item B
-
-Use the device-model based upon the historical Xen fork of QEMU.
-This device-model is still the default for NetBSD dom0.
-
 =back
 
 It is recommended to accept the default value for new guests.  If
@@ -2949,8 +2920,7 @@ to specify this option.
 Override the path to the kernel image used as device-model stubdomain.
 The binary provided here MUST be consistent with the
 B which you have specified.
-In case of B it is expected to be MiniOS-based stubdomain
-image, in case of B it is expected to be Linux-based stubdomain
+In case of B it is expected to be Linux-based stubdomain
 kernel.
 
 =item B
diff --git a/docs/misc/stubdom.txt b/docs/misc/stubdom.txt
index 64c220db20..cfcba4ba96 100644
--- a/docs/misc/stubdom.txt
+++ b/docs/misc/stubdom.txt
@@ -23,58 +23,6 @@ and https://wiki.xen.org/wiki/Device_Model_Stub_Domains for more
 information on device model stub domains
 
 
-Toolstack to MiniOS ioemu stubdomain protocol
----------------------------------------------
-
-This section describe communication protocol between toolstack and
-qemu-traditional running in MiniOS stubdomain. The protocol include
-expectations of both qemu and stubdomain itself.
-
-Setup (done by toolstack, expected by stubdomain):
- - Block devices for target domain are connected as PV disks to stubdomain,
-   according to configuration order, starting with xvda
- - Network devices for target domain are connected as PV nics to stubdomain,
-   according to configuration order, starting with 0
- - if graphics output is expected, VFB and VKB devices are set for stubdomain
-   (its backend is responsible for exposing them using appropriate protocol
-   like VNC or Spice)
- - other target domain's devices are not connected at this point to stubdomain
-   (may be hot-plugged later)
- - QEMU command line (space separated arguments) is stored in
-   /vm//image/dmargs xenstore path
- - target domain id is stored in /local/domain//target xenstore path
-?? - bios type is stored in /local/domain//hvmloader/bios
- - stubdomain's console 0 is connected to qemu log file
- - stubdomain's console 1 is connected to qemu save file (for saving state)
- - stubdomain's console 2 is connected to qemu save file (for restoring state)
- - next consoles are connected according to target guest's serial console configuration
-
-Startup:
-1. PV stubdomain is started with ioemu-stubdom.gz kernel and no initrd
-2. stubdomain initialize relevant devices
-3. stubdomain signal readiness by writing "running" to /local/domain//device-model//state xenstore path
-4. now stubdomain is considered running
-
-Runtime control (hotplug etc):
-Toolstack can issue command through xenstore. The sequence is (from toolstack POV):
-1. Write parameter to /local/domain//device-model//parameter.
-2. Write command to /local/domain//device-model//command.
-3. Wait for command result in /local/domain//device-model//state (command specific value).
-4. Write "running" back to /local/domain//device-model//state.
-
-Defined commands:
- - "pci-ins" - PCI hot plug, results:
-   - "pci-inserted" - success
-   - "pci-insert-failed" - failure
- - "pci-rem" - PCI hot remove, results:
-   - "pci-removed" - success
-   - ??
- - "save" - save domain state to console 1, results:
-   - "paused" - success
- - "continue" - resume domain execution, after loading state from console 2 (require -loadvm command argument), results:
-   - "running" - success
-
-
 Toolstack to Linux ioemu stubdomain protocol
 --------------------------------------------
 
diff --git a/docs/misc/xenstore-paths.pandoc b/docs/misc/xenstore-paths.pandoc
index a604f6b1c6..01a340fafc 100644
--- a/docs/misc/xenstore-paths.pandoc
+++ b/docs/misc/xenstore-paths.pandoc
@@ -636,7 +636,8 @@ Trustworthy copy of /local/domain/$DOMID/backend/$KIND/$DEVID/$NODE.
 
 #### /libxl/$DOMID/dm-version ("qemu_xen"|"qemu_xen_traditional") = [n,INTERNAL]
 
-The device model version for a domain.
+The device model version for a domain. Note that "qemu_xen_traditional" is
+a device model variant which has been removed from Xen.
 
 #### /libxl/$DOMID/remus/netbuf/$DEVID/ifb = STRING [n,INTERNAL]
 
diff --git a/docs/process/branching-checklist.txt b/docs/process/branching-checklist.txt
index 3dfa8ec257..aa7a27eed5 100644
--- a/docs/process/branching-checklist.txt
+++ b/docs/process/branching-checklist.txt
@@ -14,8 +14,6 @@ ov=4.0
     cd ~/git/qemu-xen.git
     git branch staging-$v staging
     git branch stable-$v master
-    cd ~/git/qemu-xen-traditional.git
-    git branch stable-$v master
 
 # make branch in libvirt
     ssh xen@xenbits.xen.org
@@ -63,7 +61,6 @@ ov=4.0
     cp xen--staging.patchbot-reported-heads xen--staging-$v.patchbot-reported-heads
     cp qemu-xen--master.patchbot-reported-heads  qemu-xen--stable-$v.patchbot-reported-heads
     cp qemu-xen--staging.patchbot-reported-heads  qemu-xen--staging-$v.patchbot-reported-heads
-    cp qemu-xen-traditional--master.patchbot-reported-heads qemu-xen-traditional--stable-$v.patchbot-reported-heads
 
     #emacs versions
     perl -i~ -pe 'next unless m/\b\Q'$ov'\E\b/; $x=$_; $x=~ s/\b\Q'$ov'\E\b/'$v'/g; print $x;' versions
diff --git a/docs/process/release-technician-checklist.txt b/docs/process/release-technician-checklist.txt
index 7bbe7c1489..829e8ec47b 100644
--- a/docs/process/release-technician-checklist.txt
+++ b/docs/process/release-technician-checklist.txt
@@ -32,8 +32,6 @@ t=RELEASE-$r
   git show # should show appropriate intended commit
   git-tag -u 'Xen.org Xen tree code signing' -m "Xen $v" xen-$v
 
-  git-push xenbits.xen.org:/home/xen/git/qemu-xen-traditional.git $s:stable-$x xen-$v
-
 # consider making tag in minios, and updating xen.git Config.mk
   git checkout SOMETHING
   git show # should show appropriate intended commit
diff --git a/docs/process/xen-release-management.pandoc b/docs/process/xen-release-management.pandoc
index 7826419dad..5da18f6da1 100644
--- a/docs/process/xen-release-management.pandoc
+++ b/docs/process/xen-release-management.pandoc
@@ -193,7 +193,7 @@ from the last RC:
 
 1. Send out commit moratorium emails to committers@.
 
-2. Check all the trees (mini-os, qemu-trad, qemu-xen, seabios, ovmf etc).
+2. Check all the trees (mini-os, qemu-xen, seabios, ovmf etc).
 They have the correct commits and all security patches applied. There will be
 tools provided.
 
-- 
2.43.0



From xen-devel-bounces@lists.xenproject.org Tue Apr 08 12:41:23 2025
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From: Juergen Gross 
To: xen-devel@lists.xenproject.org
Cc: Juergen Gross ,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Anthony PERARD ,
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	George Dunlap ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
Subject: [PATCH v2 3/6] tools: remove support for running a guest with qemu-traditional
Date: Tue,  8 Apr 2025 14:35:21 +0200
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Remove the code in tools for running a guest with qemu-traditional.
This covers xl, libxl, libacpi, hvmloader and the related python and
go bindings.

Signed-off-by: Juergen Gross 
---
V2:
- Keep most of the removed comment in hvmloader, while removing parts
  of another one (Jan Beulich)
---
 tools/firmware/hvmloader/pci.c        |  19 +-
 tools/firmware/hvmloader/util.c       |   9 +-
 tools/golang/xenlight/types.gen.go    |   1 -
 tools/libacpi/mk_dsdt.c               | 177 +++-----------
 tools/libs/light/libxl_create.c       |  60 +----
 tools/libs/light/libxl_disk.c         |   7 -
 tools/libs/light/libxl_dm.c           | 320 +-------------------------
 tools/libs/light/libxl_dom.c          |  10 -
 tools/libs/light/libxl_dom_save.c     | 140 -----------
 tools/libs/light/libxl_dom_suspend.c  |  65 ------
 tools/libs/light/libxl_domain.c       |  15 --
 tools/libs/light/libxl_internal.c     |   6 +-
 tools/libs/light/libxl_internal.h     |   5 +-
 tools/libs/light/libxl_pci.c          | 183 ---------------
 tools/libs/light/libxl_stream_write.c |   4 -
 tools/libs/light/libxl_types.idl      |   1 -
 tools/python/xen/migration/libxl.py   |   2 -
 tools/xl/xl_parse.c                   |   5 +-
 18 files changed, 52 insertions(+), 977 deletions(-)

diff --git a/tools/firmware/hvmloader/pci.c b/tools/firmware/hvmloader/pci.c
index c3c61ca060..a00acdd45b 100644
--- a/tools/firmware/hvmloader/pci.c
+++ b/tools/firmware/hvmloader/pci.c
@@ -113,19 +113,9 @@ void pci_setup(void)
      * increase the size of the lowmem MMIO hole?  Defaulting to 1
      * here will mean that non-libxl toolstacks (including xend and
      * home-grown ones) means that those using qemu-xen will still
-     * experience the memory relocation bug described below; but it
-     * also means that those using qemu-traditional will *not*
-     * experience any change; and it also means that there is a
-     * work-around for those using qemu-xen, namely switching to
-     * qemu-traditional.
-     *
-     * If we defaulted to 0, and failing to resize the hole caused any
-     * problems with qemu-traditional, then there is no work-around.
-     *
-     * Since xend can only use qemu-traditional, I think this is the
-     * option that will have the least impact.
+     * experience the memory relocation bug described below.
      */
-    bool allow_memory_relocate = 1;
+    bool allow_memory_relocate = 0;
 
     BUILD_BUG_ON((typeof(*pci_devfn_decode_type))PCI_COMMAND_IO !=
                  PCI_COMMAND_IO);
@@ -347,10 +337,7 @@ void pci_setup(void)
     {
         /*
          * At the moment qemu-xen can't deal with relocated memory regions.
-         * It's too close to the release to make a proper fix; for now,
-         * only allow the MMIO hole to grow large enough to move guest memory
-         * if we're running qemu-traditional.  Items that don't fit will be
-         * relocated into the 64-bit address space.
+         * It's too close to the release to make a proper fix.
          *
          * This loop now does the following:
          * - If allow_memory_relocate, increase the MMIO hole until it's
diff --git a/tools/firmware/hvmloader/util.c b/tools/firmware/hvmloader/util.c
index 2d07ce1290..79c0e6bd4a 100644
--- a/tools/firmware/hvmloader/util.c
+++ b/tools/firmware/hvmloader/util.c
@@ -843,14 +843,7 @@ void hvmloader_acpi_build_tables(struct acpi_config *config,
 
     /* If the device model is specified switch to the corresponding tables */
     s = xenstore_read("platform/device-model", "");
-    if ( !strncmp(s, "qemu_xen_traditional", 21) )
-    {
-        config->dsdt_anycpu = dsdt_anycpu;
-        config->dsdt_anycpu_len = dsdt_anycpu_len;
-        config->dsdt_15cpu = dsdt_15cpu;
-        config->dsdt_15cpu_len = dsdt_15cpu_len;
-    }
-    else if ( !strncmp(s, "qemu_xen", 9) )
+    if ( !strncmp(s, "qemu_xen", 9) )
     {
         config->dsdt_anycpu = dsdt_anycpu_qemu_xen;
         config->dsdt_anycpu_len = dsdt_anycpu_qemu_xen_len;
diff --git a/tools/golang/xenlight/types.gen.go b/tools/golang/xenlight/types.gen.go
index e7667f1ce3..02c4d8d123 100644
--- a/tools/golang/xenlight/types.gen.go
+++ b/tools/golang/xenlight/types.gen.go
@@ -70,7 +70,6 @@ ChannelConnectionSocket ChannelConnection = 2
 type DeviceModelVersion int
 const(
 DeviceModelVersionUnknown DeviceModelVersion = 0
-DeviceModelVersionQemuXenTraditional DeviceModelVersion = 1
 DeviceModelVersionQemuXen DeviceModelVersion = 2
 )
 
diff --git a/tools/libacpi/mk_dsdt.c b/tools/libacpi/mk_dsdt.c
index 34f6753f61..396e3e01e2 100644
--- a/tools/libacpi/mk_dsdt.c
+++ b/tools/libacpi/mk_dsdt.c
@@ -19,7 +19,6 @@ static bool debug = false;
 
 typedef enum dm_version {
     QEMU_NONE,
-    QEMU_XEN_TRADITIONAL,
     QEMU_XEN,
 } dm_version;
 
@@ -68,30 +67,6 @@ static void pop_block(void)
     printf("}\n");
 }
 
-#ifdef CONFIG_X86
-static void pci_hotplug_notify(unsigned int slt)
-{
-    stmt("Notify", "\\_SB.PCI0.S%02X, EVT", slt);
-}
-
-static void decision_tree(
-    unsigned int s, unsigned int e, char *var, void (*leaf)(unsigned int))
-{
-    if ( s == (e-1) )
-    {
-        (*leaf)(s);
-        return;
-    }
-
-    push_block("If", "And(%s, 0x%02x)", var, (e-s)/2);
-    decision_tree((s+e)/2, e, var, leaf);
-    pop_block();
-    push_block("Else", NULL);
-    decision_tree(s, (s+e)/2, var, leaf);
-    pop_block();
-}
-#endif
-
 static struct option options[] = {
     { "maxcpu", 1, 0, 'c' },
 #ifdef CONFIG_X86
@@ -105,7 +80,7 @@ int main(int argc, char **argv)
 {
     unsigned int cpu, max_cpus;
 #if defined(CONFIG_X86)
-    dm_version dm_version = QEMU_XEN_TRADITIONAL;
+    dm_version dm_version = QEMU_XEN;
     unsigned int slot, dev, intx, link;
 
     max_cpus = HVM_MAX_VCPUS;
@@ -141,8 +116,6 @@ int main(int argc, char **argv)
         case 'q':
             if (strcmp(optarg, "qemu-xen") == 0) {
                 dm_version = QEMU_XEN;
-            } else if (strcmp(optarg, "qemu-xen-traditional") == 0) {
-                dm_version = QEMU_XEN_TRADITIONAL;
             } else if (strcmp(optarg, "none") == 0) {
                 dm_version = QEMU_NONE;
             } else {
@@ -278,9 +251,7 @@ int main(int argc, char **argv)
 
     /* Define GPE control method. */
     push_block("Scope", "\\_GPE");
-    push_block("Method",
-               dm_version == QEMU_XEN_TRADITIONAL ? "_L%02d" : "_E%02d",
-               XEN_ACPI_GPE0_CPUHP_BIT);
+    push_block("Method", "_E%02d", XEN_ACPI_GPE0_CPUHP_BIT);
     stmt("\\_SB.PRSC ()", NULL);
     pop_block();
     pop_block();
@@ -302,17 +273,10 @@ int main(int argc, char **argv)
      */
     push_block("Device", "HP0"); {
         stmt("Name", "_HID, EISAID(\"PNP0C02\")");
-        if (dm_version == QEMU_XEN_TRADITIONAL) {
-            stmt("Name", "_CRS, ResourceTemplate() {"
-                 "  IO (Decode16, 0x10c0, 0x10c0, 0x00, 0x82)"
-                 "  IO (Decode16, 0xb044, 0xb044, 0x00, 0x04)"
-                 "}");
-        } else {
-            stmt("Name", "_CRS, ResourceTemplate() {"
-                 "  IO (Decode16, 0xae00, 0xae00, 0x00, 0x10)"
-                 "  IO (Decode16, 0xb044, 0xb044, 0x00, 0x04)"
-                 "}");
-        }
+        stmt("Name", "_CRS, ResourceTemplate() {"
+             "  IO (Decode16, 0xae00, 0xae00, 0x00, 0x10)"
+             "  IO (Decode16, 0xb044, 0xb044, 0x00, 0x04)"
+             "}");
     } pop_block();
 
     /*** PCI-ISA link definitions ***/
@@ -397,60 +361,27 @@ int main(int argc, char **argv)
      * QEMU provides a simple hotplug controller with some I/O to handle
      * the hotplug action and status, which is beyond the ACPI scope.
      */
-    if (dm_version == QEMU_XEN_TRADITIONAL) {
-        for ( slot = 0; slot < 0x100; slot++ )
-        {
-            push_block("Device", "S%02X", slot);
-            /* _ADR == dev:fn (16:16) */
-            stmt("Name", "_ADR, 0x%08x", ((slot & ~7) << 13) | (slot & 7));
-            /* _SUN == dev */
-            stmt("Name", "_SUN, 0x%08x", slot >> 3);
-            push_block("Method", "_EJ0, 1");
-            if (debug)
-            {
-                stmt("Store", "0x%02x, \\_GPE.DPT1", slot);
-                stmt("Store", "0x88, \\_GPE.DPT2");
-            }
-            stmt("Store", "0x%02x, \\_GPE.PH%02X", /* eject */
-                 (slot & 1) ? 0x10 : 0x01, slot & ~1);
-            pop_block();
-            push_block("Method", "_STA, 0");
-            if (debug)
-            {
-                stmt("Store", "0x%02x, \\_GPE.DPT1", slot);
-                stmt("Store", "0x89, \\_GPE.DPT2");
-            }
-            if ( slot & 1 )
-                stmt("ShiftRight", "\\_GPE.PH%02X, 0x04, Local1", slot & ~1);
-            else
-                stmt("And", "\\_GPE.PH%02X, 0x0f, Local1", slot & ~1);
-            stmt("Return", "Local1"); /* IN status as the _STA */
-            pop_block();
-            pop_block();
-        }
-    } else {
-        stmt("OperationRegion", "SEJ, SystemIO, 0xae08, 0x08");
-        push_block("Field", "SEJ, DWordAcc, NoLock, WriteAsZeros");
-        indent(); printf("B0EJ, 32,\n");
-        indent(); printf("B0RM, 32,\n");
-        pop_block();
+    stmt("OperationRegion", "SEJ, SystemIO, 0xae08, 0x08");
+    push_block("Field", "SEJ, DWordAcc, NoLock, WriteAsZeros");
+    indent(); printf("B0EJ, 32,\n");
+    indent(); printf("B0RM, 32,\n");
+    pop_block();
 
-        /* hotplug_slot */
-        for (slot = 1; slot <= 31; slot++) {
-            push_block("Device", "S%i", slot); {
-                stmt("Name", "_ADR, %#06x0000", slot);
-                push_block("Method", "_EJ0,1"); {
-                    stmt("Store", "%#010x, B0EJ", 1 << slot);
-                } pop_block();
-                stmt("Name", "_SUN, %i", slot);
-                push_block("Method", "_STA, 0"); {
-                    push_block("If", "And(B0RM, ShiftLeft(1, %i))", slot);
-                    stmt("Return", "0xF");
-                    pop_block();
-                    stmt("Return", "0x0");
-                } pop_block();
+    /* hotplug_slot */
+    for (slot = 1; slot <= 31; slot++) {
+        push_block("Device", "S%i", slot); {
+            stmt("Name", "_ADR, %#06x0000", slot);
+            push_block("Method", "_EJ0,1"); {
+                stmt("Store", "%#010x, B0EJ", 1 << slot);
             } pop_block();
-        }
+            stmt("Name", "_SUN, %i", slot);
+            push_block("Method", "_STA, 0"); {
+                push_block("If", "And(B0RM, ShiftLeft(1, %i))", slot);
+                stmt("Return", "0xF");
+                pop_block();
+                stmt("Return", "0x0");
+            } pop_block();
+        } pop_block();
     }
 
     pop_block();
@@ -460,26 +391,11 @@ int main(int argc, char **argv)
     /**** GPE start ****/
     push_block("Scope", "\\_GPE");
 
-    if (dm_version == QEMU_XEN_TRADITIONAL) {
-        stmt("OperationRegion", "PHP, SystemIO, 0x10c0, 0x82");
-
-        push_block("Field", "PHP, ByteAcc, NoLock, Preserve");
-        indent(); printf("PSTA, 8,\n"); /* hotplug controller event reg */
-        indent(); printf("PSTB, 8,\n"); /* hotplug controller slot reg */
-        for ( slot = 0; slot < 0x100; slot += 2 )
-        {
-            indent();
-            /* Each hotplug control register manages a pair of pci functions. */
-            printf("PH%02X, 8,\n", slot);
-        }
-        pop_block();
-    } else {
-        stmt("OperationRegion", "PCST, SystemIO, 0xae00, 0x08");
-        push_block("Field", "PCST, DWordAcc, NoLock, WriteAsZeros");
-        indent(); printf("PCIU, 32,\n");
-        indent(); printf("PCID, 32,\n");
-        pop_block();
-    }
+    stmt("OperationRegion", "PCST, SystemIO, 0xae00, 0x08");
+    push_block("Field", "PCST, DWordAcc, NoLock, WriteAsZeros");
+    indent(); printf("PCIU, 32,\n");
+    indent(); printf("PCID, 32,\n");
+    pop_block();
 
     stmt("OperationRegion", "DG1, SystemIO, 0xb044, 0x04");
 
@@ -487,35 +403,16 @@ int main(int argc, char **argv)
     indent(); printf("DPT1, 8, DPT2, 8\n");
     pop_block();
 
-    if (dm_version == QEMU_XEN_TRADITIONAL) {
-        push_block("Method", "_L03, 0, Serialized");
-        /* Detect slot and event (remove/add). */
-        stmt("Name", "SLT, 0x0");
-        stmt("Name", "EVT, 0x0");
-        stmt("Store", "PSTA, Local1");
-        stmt("And", "Local1, 0xf, EVT");
-        stmt("Store", "PSTB, Local1"); /* XXX: Store (PSTB, SLT) ? */
-        stmt("And", "Local1, 0xff, SLT");
-        if (debug)
-        {
-            stmt("Store", "SLT, DPT1");
-            stmt("Store", "EVT, DPT2");
-        }
-        /* Decision tree */
-        decision_tree(0x00, 0x100, "SLT", pci_hotplug_notify);
+    push_block("Method", "_E01");
+    for (slot = 1; slot <= 31; slot++) {
+        push_block("If", "And(PCIU, ShiftLeft(1, %i))", slot);
+        stmt("Notify", "\\_SB.PCI0.S%i, 1", slot);
         pop_block();
-    } else {
-        push_block("Method", "_E01");
-        for (slot = 1; slot <= 31; slot++) {
-            push_block("If", "And(PCIU, ShiftLeft(1, %i))", slot);
-            stmt("Notify", "\\_SB.PCI0.S%i, 1", slot);
-            pop_block();
-            push_block("If", "And(PCID, ShiftLeft(1, %i))", slot);
-            stmt("Notify", "\\_SB.PCI0.S%i, 3", slot);
-            pop_block();
-        }
+        push_block("If", "And(PCID, ShiftLeft(1, %i))", slot);
+        stmt("Notify", "\\_SB.PCI0.S%i, 3", slot);
         pop_block();
     }
+    pop_block();
 
     pop_block();
     /**** GPE end ****/
diff --git a/tools/libs/light/libxl_create.c b/tools/libs/light/libxl_create.c
index e03599ea99..9c56c4c9e5 100644
--- a/tools/libs/light/libxl_create.c
+++ b/tools/libs/light/libxl_create.c
@@ -100,12 +100,7 @@ int libxl__domain_build_info_setdefault(libxl__gc *gc,
 
     if (!b_info->device_model_version) {
         if (b_info->type == LIBXL_DOMAIN_TYPE_HVM) {
-            if (libxl_defbool_val(b_info->device_model_stubdomain)) {
-                b_info->device_model_version =
-                    LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL;
-            } else {
-                b_info->device_model_version = LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN;
-            }
+            b_info->device_model_version = LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN;
         } else {
             b_info->device_model_version =
                 LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN;
@@ -117,16 +112,8 @@ int libxl__domain_build_info_setdefault(libxl__gc *gc,
             dm = libxl__domain_device_model(gc, b_info);
             rc = access(dm, X_OK);
             if (rc < 0) {
-                /* qemu-xen unavailable, use qemu-xen-traditional */
-                if (errno == ENOENT) {
-                    LOGE(INFO, "qemu-xen is unavailable"
-                         ", using qemu-xen-traditional instead");
-                    b_info->device_model_version =
-                        LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL;
-                } else {
-                    LOGE(ERROR, "qemu-xen access error");
-                    return ERROR_FAIL;
-                }
+                LOGE(ERROR, "qemu-xen access error");
+                return ERROR_FAIL;
             }
         }
     }
@@ -137,8 +124,6 @@ int libxl__domain_build_info_setdefault(libxl__gc *gc,
     if (b_info->type == LIBXL_DOMAIN_TYPE_HVM) {
         if (!b_info->u.hvm.bios)
             switch (b_info->device_model_version) {
-            case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL:
-                b_info->u.hvm.bios = LIBXL_BIOS_TYPE_ROMBIOS; break;
             case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
                 b_info->u.hvm.bios = LIBXL_BIOS_TYPE_SEABIOS; break;
             default:
@@ -148,12 +133,6 @@ int libxl__domain_build_info_setdefault(libxl__gc *gc,
 
         /* Enforce BIOS<->Device Model version relationship */
         switch (b_info->device_model_version) {
-        case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL:
-            if (b_info->u.hvm.bios != LIBXL_BIOS_TYPE_ROMBIOS) {
-                LOG(ERROR, "qemu-xen-traditional requires bios=rombios.");
-                return ERROR_INVAL;
-            }
-            break;
         case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
             if (b_info->u.hvm.bios == LIBXL_BIOS_TYPE_ROMBIOS) {
                 LOG(ERROR, "qemu-xen does not support bios=rombios.");
@@ -176,10 +155,6 @@ int libxl__domain_build_info_setdefault(libxl__gc *gc,
         libxl_defbool_val(b_info->device_model_stubdomain)) {
         if (!b_info->stubdomain_kernel) {
             switch (b_info->device_model_version) {
-                case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL:
-                    b_info->stubdomain_kernel =
-                        libxl__abs_path(NOGC, "ioemu-stubdom.gz", libxl__xenfirmwaredir_path());
-                    break;
                 case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
                     b_info->stubdomain_kernel =
                         libxl__abs_path(NOGC,
@@ -192,8 +167,6 @@ int libxl__domain_build_info_setdefault(libxl__gc *gc,
         }
         if (!b_info->stubdomain_ramdisk) {
             switch (b_info->device_model_version) {
-                case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL:
-                    break;
                 case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
                     b_info->stubdomain_ramdisk =
                         libxl__abs_path(NOGC,
@@ -299,33 +272,6 @@ int libxl__domain_build_info_setdefault(libxl__gc *gc,
             b_info->u.hvm.hdtype = LIBXL_HDTYPE_IDE;
 
         switch (b_info->device_model_version) {
-        case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL:
-            switch (b_info->u.hvm.vga.kind) {
-            case LIBXL_VGA_INTERFACE_TYPE_NONE:
-                if (b_info->video_memkb == LIBXL_MEMKB_DEFAULT)
-                    b_info->video_memkb = 0;
-                break;
-            case LIBXL_VGA_INTERFACE_TYPE_QXL:
-                LOG(ERROR,"qemu upstream required for qxl vga");
-                return ERROR_INVAL;
-                break;
-            case LIBXL_VGA_INTERFACE_TYPE_STD:
-                if (b_info->video_memkb == LIBXL_MEMKB_DEFAULT)
-                    b_info->video_memkb = 8 * 1024;
-                if (b_info->video_memkb < 8 * 1024) {
-                    LOG(ERROR, "videoram must be at least 8 MB for STDVGA on QEMU_XEN_TRADITIONAL");
-                    return ERROR_INVAL;
-                }
-                break;
-            case LIBXL_VGA_INTERFACE_TYPE_CIRRUS:
-            default:
-                if (b_info->video_memkb == LIBXL_MEMKB_DEFAULT)
-                    b_info->video_memkb = 4 * 1024;
-                if (b_info->video_memkb != 4 * 1024)
-                    LOG(WARN, "ignoring videoram other than 4 MB for CIRRUS on QEMU_XEN_TRADITIONAL");
-                break;
-            }
-            break;
         case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
         default:
             switch (b_info->u.hvm.vga.kind) {
diff --git a/tools/libs/light/libxl_disk.c b/tools/libs/light/libxl_disk.c
index 6a0b6e06fe..456b5450ca 100644
--- a/tools/libs/light/libxl_disk.c
+++ b/tools/libs/light/libxl_disk.c
@@ -1007,13 +1007,6 @@ int libxl_cdrom_insert(libxl_ctx *ctx, uint32_t domid, libxl_device_disk *disk,
         disk->backend = LIBXL_DISK_BACKEND_PHY;
     }
 
-    if (cis->dm_ver == LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL &&
-        stubdomid) {
-        LOGD(ERROR, domid, "cdrom-insert doesn't work for Mini-OS stubdoms");
-        rc = ERROR_INVAL;
-        goto out;
-    }
-
     disks = libxl__device_list(gc, &libxl__disk_devtype, cis->disk_domid, &num);
     for (i = 0; i < num; i++) {
         if (disks[i].is_cdrom && !strcmp(disk->vdev, disks[i].vdev))
diff --git a/tools/libs/light/libxl_dm.c b/tools/libs/light/libxl_dm.c
index b193a5dc37..4146ee0ea1 100644
--- a/tools/libs/light/libxl_dm.c
+++ b/tools/libs/light/libxl_dm.c
@@ -328,9 +328,6 @@ const char *libxl__domain_device_model(libxl__gc *gc,
         dm = libxl__strdup(gc, info->device_model);
     } else {
         switch (info->device_model_version) {
-        case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL:
-            dm = libxl__abs_path(gc, "qemu-dm", libxl__private_bindir_path());
-            break;
         case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
             dm = qemu_xen_path(gc);
             break;
@@ -670,272 +667,6 @@ static const char *dm_keymap(const libxl_domain_config *guest_config)
         return NULL;
 }
 
-static int libxl__build_device_model_args_old(libxl__gc *gc,
-                                        const char *dm, int domid,
-                                        const libxl_domain_config *guest_config,
-                                        char ***args, char ***envs,
-                                        const libxl__domain_build_state *state)
-{
-    const libxl_domain_create_info *c_info = &guest_config->c_info;
-    const libxl_domain_build_info *b_info = &guest_config->b_info;
-    const libxl_device_nic *nics = guest_config->nics;
-    const libxl_vnc_info *vnc = libxl__dm_vnc(guest_config);
-    const libxl_sdl_info *sdl = dm_sdl(guest_config);
-    const int num_nics = guest_config->num_nics;
-    const char *keymap = dm_keymap(guest_config);
-    int i;
-    flexarray_t *dm_args, *dm_envs;
-    dm_args = flexarray_make(gc, 16, 1);
-    dm_envs = flexarray_make(gc, 16, 1);
-
-    assert(state->dm_monitor_fd == -1);
-
-    flexarray_vappend(dm_args, dm,
-                      "-d", GCSPRINTF("%d", domid), NULL);
-
-    if (c_info->name)
-        flexarray_vappend(dm_args, "-domain-name", c_info->name, NULL);
-
-    if (vnc) {
-        char *vncarg = NULL;
-
-        flexarray_append(dm_args, "-vnc");
-
-        /*
-         * If vnc->listen is present and contains a :, and
-         *  - vnc->display is 0, use vnc->listen
-         *  - vnc->display is non-zero, be confused
-         * If vnc->listen is present but doesn't, use vnc->listen:vnc->display.
-         * If vnc->listen is not present, use 127.0.0.1:vnc->display
-         * (Remembering that vnc->display already defaults to 0.)
-         */
-        if (vnc->listen) {
-            if (strchr(vnc->listen, ':') != NULL) {
-                if (vnc->display) {
-                    LOGD(ERROR, domid, "vncdisplay set, vnclisten contains display");
-                    return ERROR_INVAL;
-                }
-                vncarg = vnc->listen;
-            } else {
-                vncarg = GCSPRINTF("%s:%d", vnc->listen, vnc->display);
-            }
-        } else
-            vncarg = GCSPRINTF("127.0.0.1:%d", vnc->display);
-
-        if (vnc->passwd && vnc->passwd[0]) {
-            vncarg = GCSPRINTF("%s,password", vncarg);
-        }
-
-        flexarray_append(dm_args, vncarg);
-
-        if (libxl_defbool_val(vnc->findunused)) {
-            flexarray_append(dm_args, "-vncunused");
-        }
-    } else if (!sdl) {
-        /*
-         * VNC is not enabled by default by qemu-xen-traditional,
-         * however skipping -vnc causes SDL to be
-         * (unexpectedly) enabled by default. If undesired, disable graphics at
-         * all.
-         */
-        flexarray_append(dm_args, "-nographic");
-    }
-
-    if (sdl) {
-        flexarray_append(dm_args, "-sdl");
-        if (!libxl_defbool_val(sdl->opengl)) {
-            flexarray_append(dm_args, "-disable-opengl");
-        }
-        if (sdl->display)
-            flexarray_append_pair(dm_envs, "DISPLAY", sdl->display);
-        if (sdl->xauthority)
-            flexarray_append_pair(dm_envs, "XAUTHORITY", sdl->xauthority);
-    }
-    if (keymap) {
-        flexarray_vappend(dm_args, "-k", keymap, NULL);
-    }
-    if (b_info->type == LIBXL_DOMAIN_TYPE_HVM) {
-        int ioemu_nics = 0;
-        int nr_set_cpus = 0;
-        char *s;
-
-        flexarray_append_pair(dm_envs, "XEN_DOMAIN_ID", GCSPRINTF("%d", domid));
-
-        if (b_info->kernel) {
-            LOGD(ERROR, domid, "HVM direct kernel boot is not supported by "
-                 "qemu-xen-traditional");
-            return ERROR_INVAL;
-        }
-
-        if (b_info->u.hvm.serial || b_info->u.hvm.serial_list) {
-            if ( b_info->u.hvm.serial && b_info->u.hvm.serial_list )
-            {
-                LOGD(ERROR, domid, "Both serial and serial_list set");
-                return ERROR_INVAL;
-            }
-            if (b_info->u.hvm.serial) {
-                flexarray_vappend(dm_args,
-                                  "-serial", b_info->u.hvm.serial, NULL);
-            } else if (b_info->u.hvm.serial_list) {
-                char **p;
-                for (p = b_info->u.hvm.serial_list;
-                     *p;
-                     p++) {
-                    flexarray_vappend(dm_args,
-                                      "-serial",
-                                      *p, NULL);
-                }
-            }
-        }
-
-        if (libxl_defbool_val(b_info->u.hvm.nographic) && (!sdl && !vnc)) {
-            flexarray_append(dm_args, "-nographic");
-        }
-
-        if (b_info->video_memkb) {
-            flexarray_vappend(dm_args, "-videoram",
-                    GCSPRINTF("%d", libxl__sizekb_to_mb(b_info->video_memkb)),
-                    NULL);
-        }
-
-        switch (b_info->u.hvm.vga.kind) {
-        case LIBXL_VGA_INTERFACE_TYPE_STD:
-            flexarray_append(dm_args, "-std-vga");
-            break;
-        case LIBXL_VGA_INTERFACE_TYPE_CIRRUS:
-            break;
-        case LIBXL_VGA_INTERFACE_TYPE_NONE:
-            flexarray_append_pair(dm_args, "-vga", "none");
-            break;
-        case LIBXL_VGA_INTERFACE_TYPE_QXL:
-            break;
-        default:
-            LOGD(ERROR, domid, "Invalid emulated video card specified");
-            return ERROR_INVAL;
-        }
-
-        if (b_info->u.hvm.boot) {
-            flexarray_vappend(dm_args, "-boot", b_info->u.hvm.boot, NULL);
-        }
-        if (libxl_defbool_val(b_info->u.hvm.usb)
-            || b_info->u.hvm.usbdevice
-            || libxl_string_list_length(&b_info->u.hvm.usbdevice_list)) {
-            if (b_info->u.hvm.usbdevice
-                && libxl_string_list_length(&b_info->u.hvm.usbdevice_list)) {
-                LOGD(ERROR, domid, "Both usbdevice and usbdevice_list set");
-                return ERROR_INVAL;
-            }
-            flexarray_append(dm_args, "-usb");
-            if (b_info->u.hvm.usbdevice) {
-                flexarray_vappend(dm_args,
-                                  "-usbdevice", b_info->u.hvm.usbdevice, NULL);
-            } else if (b_info->u.hvm.usbdevice_list) {
-                char **p;
-                for (p = b_info->u.hvm.usbdevice_list;
-                     *p;
-                     p++) {
-                    flexarray_vappend(dm_args,
-                                      "-usbdevice",
-                                      *p, NULL);
-                }
-            }
-        }
-        if (b_info->u.hvm.soundhw) {
-            flexarray_vappend(dm_args, "-soundhw", b_info->u.hvm.soundhw, NULL);
-        }
-        if (libxl__acpi_defbool_val(b_info)) {
-            flexarray_append(dm_args, "-acpi");
-        }
-        if (b_info->max_vcpus > 1) {
-            flexarray_vappend(dm_args, "-vcpus",
-                              GCSPRINTF("%d", b_info->max_vcpus),
-                              NULL);
-        }
-
-        nr_set_cpus = libxl_bitmap_count_set(&b_info->avail_vcpus);
-        s = libxl_bitmap_to_hex_string(CTX, &b_info->avail_vcpus);
-        flexarray_vappend(dm_args, "-vcpu_avail",
-                              GCSPRINTF("%s", s), NULL);
-        free(s);
-
-        for (i = 0; i < num_nics; i++) {
-            if (nics[i].nictype == LIBXL_NIC_TYPE_VIF_IOEMU) {
-                char *smac = GCSPRINTF(
-                                   LIBXL_MAC_FMT, LIBXL_MAC_BYTES(nics[i].mac));
-                const char *ifname = libxl__device_nic_devname(gc,
-                                                domid, nics[i].devid,
-                                                LIBXL_NIC_TYPE_VIF_IOEMU);
-                flexarray_vappend(dm_args,
-                                  "-net",
-                                  GCSPRINTF(
-                                      "nic,vlan=%d,macaddr=%s,model=%s",
-                                      nics[i].devid, smac, nics[i].model),
-                                  "-net",
-                                  GCSPRINTF(
-                                      "tap,vlan=%d,ifname=%s,bridge=%s,"
-                                      "script=%s,downscript=%s",
-                                      nics[i].devid, ifname, nics[i].bridge,
-                                      libxl_tapif_script(gc),
-                                      libxl_tapif_script(gc)),
-                                  NULL);
-                ioemu_nics++;
-            }
-        }
-        /* If we have no emulated nics, tell qemu not to create any */
-        if ( ioemu_nics == 0 ) {
-            flexarray_vappend(dm_args, "-net", "none", NULL);
-        }
-        if (libxl_defbool_val(b_info->u.hvm.gfx_passthru)) {
-            switch (b_info->u.hvm.gfx_passthru_kind) {
-            case LIBXL_GFX_PASSTHRU_KIND_DEFAULT:
-            case LIBXL_GFX_PASSTHRU_KIND_IGD:
-                flexarray_append(dm_args, "-gfx_passthru");
-                break;
-            default:
-                LOGD(ERROR, domid, "unsupported gfx_passthru_kind.");
-                return ERROR_INVAL;
-            }
-        }
-    } else {
-        if (!sdl && !vnc)
-            flexarray_append(dm_args, "-nographic");
-    }
-
-    if (libxl_defbool_val(b_info->dm_restrict)) {
-        LOGD(ERROR, domid,
-             "dm_restrict not supported by qemu-xen-traditional");
-        return ERROR_INVAL;
-    }
-
-    if (state->saved_state) {
-        flexarray_vappend(dm_args, "-loadvm", state->saved_state, NULL);
-    }
-    for (i = 0; b_info->extra && b_info->extra[i] != NULL; i++)
-        flexarray_append(dm_args, b_info->extra[i]);
-    flexarray_append(dm_args, "-M");
-    switch (b_info->type) {
-    case LIBXL_DOMAIN_TYPE_PVH:
-    case LIBXL_DOMAIN_TYPE_PV:
-        flexarray_append(dm_args, "xenpv");
-        for (i = 0; b_info->extra_pv && b_info->extra_pv[i] != NULL; i++)
-            flexarray_append(dm_args, b_info->extra_pv[i]);
-        break;
-    case LIBXL_DOMAIN_TYPE_HVM:
-        flexarray_append(dm_args, "xenfv");
-        for (i = 0; b_info->extra_hvm && b_info->extra_hvm[i] != NULL; i++)
-            flexarray_append(dm_args, b_info->extra_hvm[i]);
-        break;
-    default:
-        abort();
-    }
-    flexarray_append(dm_args, NULL);
-    *args = (char **) flexarray_contents(dm_args);
-    flexarray_append(dm_envs, NULL);
-    if (envs)
-        *envs = (char **) flexarray_contents(dm_envs);
-    return 0;
-}
-
 static char *dm_spice_options(libxl__gc *gc,
                                     const libxl_spice_info *spice)
 {
@@ -2062,11 +1793,6 @@ static int libxl__build_device_model_args(libxl__gc *gc,
  * and therefore will be passing a filename rather than a fd. */
 {
     switch (guest_config->b_info.device_model_version) {
-    case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL:
-        return libxl__build_device_model_args_old(gc, dm,
-                                                  guest_domid, guest_config,
-                                                  args, envs,
-                                                  state);
     case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
         if (!libxl_defbool_val(guest_config->b_info.device_model_stubdomain)) {
             assert(dm_state_fd != NULL);
@@ -2429,16 +2155,11 @@ void libxl__spawn_stub_dm(libxl__egc *egc, libxl__stub_dm_spawn_state *sdss)
                         "%s",
                         libxl_bios_type_to_string(guest_config->b_info.u.hvm.bios));
     }
-    /* Disable relocating memory to make the MMIO hole larger
-     * unless we're running qemu-traditional and vNUMA is not
-     * configured. */
+    /* Disable relocating memory to make the MMIO hole larger. */
     libxl__xs_printf(gc, XBT_NULL,
                      libxl__sprintf(gc, "%s/hvmloader/allow-memory-relocate",
                                     libxl__xs_get_dompath(gc, guest_domid)),
-                     "%d",
-                     guest_config->b_info.device_model_version
-                        == LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL &&
-                     !libxl__vnuma_configured(&guest_config->b_info));
+                     "0");
     ret = xc_domain_set_target(ctx->xch, dm_domid, guest_domid);
     if (ret<0) {
         LOGED(ERROR, guest_domid, "setting target domain %d -> %d",
@@ -3122,13 +2843,9 @@ static void device_model_launch(libxl__egc *egc,
     libxl_domain_config *guest_config = dmss->guest_config;
     const libxl_domain_create_info *c_info = &guest_config->c_info;
     const libxl_domain_build_info *b_info = &guest_config->b_info;
-    const libxl_vnc_info *vnc = libxl__dm_vnc(guest_config);
     char *path;
     int logfile_w, null;
     char **args, **arg, **envs;
-    xs_transaction_t t;
-    char *vm_path;
-    char **pass_stuff;
     int dm_state_fd = -1;
 
     /* convenience aliases */
@@ -3162,26 +2879,16 @@ static void device_model_launch(libxl__egc *egc,
         libxl__xs_printf(gc, XBT_NULL,
                          GCSPRINTF("%s/hvmloader/bios", path),
                          "%s", libxl_bios_type_to_string(b_info->u.hvm.bios));
-        /* Disable relocating memory to make the MMIO hole larger
-         * unless we're running qemu-traditional and vNUMA is not
-         * configured. */
+        /* Disable relocating memory to make the MMIO hole larger. */
         libxl__xs_printf(gc, XBT_NULL,
                          GCSPRINTF("%s/hvmloader/allow-memory-relocate", path),
-                         "%d",
-                         b_info->device_model_version==LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL &&
-                         !libxl__vnuma_configured(b_info));
+                         "0");
         free(path);
     }
 
     path = DEVICE_MODEL_XS_PATH(gc, LIBXL_TOOLSTACK_DOMID, domid, "");
     xs_mkdir(ctx->xsh, XBT_NULL, path);
 
-    if (b_info->type == LIBXL_DOMAIN_TYPE_HVM &&
-        b_info->device_model_version
-        == LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL)
-        libxl__xs_printf(gc, XBT_NULL, GCSPRINTF("%s/disable_pf", path),
-                         "%d", !libxl_defbool_val(b_info->u.hvm.xen_platform_pci));
-
     logfile_w = libxl__create_qemu_logfile(gc, GCSPRINTF("qemu-dm-%s",
                                                          c_info->name));
     if (logfile_w < 0) {
@@ -3206,25 +2913,6 @@ static void device_model_launch(libxl__egc *egc,
                          GCSPRINTF("%s/image/device-model-kill-uid", dom_path),
                          "%s", state->dm_kill_uid);
 
-    if (vnc && vnc->passwd) {
-        /* This xenstore key will only be used by qemu-xen-traditionnal.
-         * The code to supply vncpasswd to qemu-xen is later. */
-retry_transaction:
-        /* Find uuid and the write the vnc password to xenstore for qemu. */
-        t = xs_transaction_start(ctx->xsh);
-        vm_path = libxl__xs_read(gc,t,GCSPRINTF("%s/vm", dom_path));
-        if (vm_path) {
-            /* Now write the vncpassword into it. */
-            pass_stuff = libxl__calloc(gc, 3, sizeof(char *));
-            pass_stuff[0] = "vncpasswd";
-            pass_stuff[1] = vnc->passwd;
-            libxl__xs_writev(gc,t,vm_path,pass_stuff);
-            if (!xs_transaction_end(ctx->xsh, t, 0))
-                if (errno == EAGAIN)
-                    goto retry_transaction;
-        }
-    }
-
     LOGD(DEBUG, domid, "Spawning device-model %s with arguments:", dm);
     for (arg = args; *arg; arg++)
         LOGD(DEBUG, domid, "  %s", *arg);
diff --git a/tools/libs/light/libxl_dom.c b/tools/libs/light/libxl_dom.c
index 94fef37401..4d67b0d282 100644
--- a/tools/libs/light/libxl_dom.c
+++ b/tools/libs/light/libxl_dom.c
@@ -881,7 +881,6 @@ static int libxl__domain_firmware(libxl__gc *gc,
             switch (info->device_model_version)
             {
             case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
-            case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL:
                 firmware = "hvmloader";
                 break;
             default:
@@ -1212,15 +1211,6 @@ out:
     return rc;
 }
 
-int libxl__qemu_traditional_cmd(libxl__gc *gc, uint32_t domid,
-                                const char *cmd)
-{
-    char *path = NULL;
-    uint32_t dm_domid = libxl_get_stubdom_id(CTX, domid);
-    path = DEVICE_MODEL_XS_PATH(gc, dm_domid, domid, "/command");
-    return libxl__xs_printf(gc, XBT_NULL, path, "%s", cmd);
-}
-
 /*==================== Miscellaneous ====================*/
 
 char *libxl__uuid2string(libxl__gc *gc, const libxl_uuid uuid)
diff --git a/tools/libs/light/libxl_dom_save.c b/tools/libs/light/libxl_dom_save.c
index 32e3cb5a13..d64fd64f2e 100644
--- a/tools/libs/light/libxl_dom_save.c
+++ b/tools/libs/light/libxl_dom_save.c
@@ -28,19 +28,6 @@ static void domain_save_done(libxl__egc *egc,
 
 /*----- complicated callback, called by xc_domain_save -----*/
 
-/*
- * We implement the other end of protocol for controlling qemu-dm's
- * logdirty.  There is no documentation for this protocol, but our
- * counterparty's implementation is in
- * qemu-xen-traditional.git:xenstore.c in the function
- * xenstore_process_logdirty_event
- */
-
-static void domain_suspend_switch_qemu_xen_traditional_logdirty
-                               (libxl__egc *egc, int domid, unsigned enable,
-                                libxl__logdirty_switch *lds);
-static void switch_logdirty_xswatch(libxl__egc *egc, libxl__ev_xswatch*,
-                            const char *watch_path, const char *event_path);
 static void domain_suspend_switch_qemu_xen_logdirty
                                (libxl__egc *egc, int domid, unsigned enable,
                                 libxl__logdirty_switch *lds);
@@ -69,10 +56,6 @@ void libxl__domain_common_switch_qemu_logdirty(libxl__egc *egc,
     STATE_AO_GC(lds->ao);
 
     switch (libxl__device_model_version_running(gc, domid)) {
-    case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL:
-        domain_suspend_switch_qemu_xen_traditional_logdirty(egc, domid, enable,
-                                                            lds);
-        break;
     case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
         domain_suspend_switch_qemu_xen_logdirty(egc, domid, enable, lds);
         break;
@@ -83,129 +66,6 @@ void libxl__domain_common_switch_qemu_logdirty(libxl__egc *egc,
     }
 }
 
-static void domain_suspend_switch_qemu_xen_traditional_logdirty
-                               (libxl__egc *egc, int domid, unsigned enable,
-                                libxl__logdirty_switch *lds)
-{
-    STATE_AO_GC(lds->ao);
-    int rc;
-    xs_transaction_t t = 0;
-    const char *got;
-
-    if (!lds->cmd_path) {
-        uint32_t dm_domid = libxl_get_stubdom_id(CTX, domid);
-        lds->cmd_path = DEVICE_MODEL_XS_PATH(gc, dm_domid, domid,
-                                             "/logdirty/cmd");
-        lds->ret_path = DEVICE_MODEL_XS_PATH(gc, dm_domid, domid,
-                                             "/logdirty/ret");
-    }
-    lds->cmd = enable ? "enable" : "disable";
-
-    rc = libxl__ev_xswatch_register(gc, &lds->watch,
-                                switch_logdirty_xswatch, lds->ret_path);
-    if (rc) goto out;
-
-    rc = libxl__ev_time_register_rel(ao, &lds->timeout,
-                                switch_logdirty_timeout, 10*1000);
-    if (rc) goto out;
-
-    for (;;) {
-        rc = libxl__xs_transaction_start(gc, &t);
-        if (rc) goto out;
-
-        rc = libxl__xs_read_checked(gc, t, lds->cmd_path, &got);
-        if (rc) goto out;
-
-        if (got) {
-            const char *got_ret;
-            rc = libxl__xs_read_checked(gc, t, lds->ret_path, &got_ret);
-            if (rc) goto out;
-
-            if (!got_ret || strcmp(got, got_ret)) {
-                LOGD(ERROR, domid, "controlling logdirty: qemu was already sent"
-                     " command `%s' (xenstore path `%s') but result is `%s'",
-                     got, lds->cmd_path, got_ret ? got_ret : "");
-                rc = ERROR_FAIL;
-                goto out;
-            }
-            rc = libxl__xs_rm_checked(gc, t, lds->cmd_path);
-            if (rc) goto out;
-        }
-
-        rc = libxl__xs_rm_checked(gc, t, lds->ret_path);
-        if (rc) goto out;
-
-        rc = libxl__xs_write_checked(gc, t, lds->cmd_path, lds->cmd);
-        if (rc) goto out;
-
-        rc = libxl__xs_transaction_commit(gc, &t);
-        if (!rc) break;
-        if (rc<0) goto out;
-    }
-
-    /* OK, wait for some callback */
-    return;
-
- out:
-    LOGD(ERROR, domid, "logdirty switch failed (rc=%d), abandoning suspend",rc);
-    libxl__xs_transaction_abort(gc, &t);
-    switch_logdirty_done(egc,lds,rc);
-}
-
-static void switch_logdirty_xswatch(libxl__egc *egc, libxl__ev_xswatch *watch,
-                            const char *watch_path, const char *event_path)
-{
-    libxl__logdirty_switch *lds = CONTAINER_OF(watch, *lds, watch);
-    STATE_AO_GC(lds->ao);
-    const char *got;
-    xs_transaction_t t = 0;
-    int rc;
-
-    for (;;) {
-        rc = libxl__xs_transaction_start(gc, &t);
-        if (rc) goto out;
-
-        rc = libxl__xs_read_checked(gc, t, lds->ret_path, &got);
-        if (rc) goto out;
-
-        if (!got) {
-            rc = +1;
-            goto out;
-        }
-
-        if (strcmp(got, lds->cmd)) {
-            LOG(ERROR,"logdirty switch: sent command `%s' but got reply `%s'"
-                " (xenstore paths `%s' / `%s')", lds->cmd, got,
-                lds->cmd_path, lds->ret_path);
-            rc = ERROR_FAIL;
-            goto out;
-        }
-
-        rc = libxl__xs_rm_checked(gc, t, lds->cmd_path);
-        if (rc) goto out;
-
-        rc = libxl__xs_rm_checked(gc, t, lds->ret_path);
-        if (rc) goto out;
-
-        rc = libxl__xs_transaction_commit(gc, &t);
-        if (!rc) break;
-        if (rc<0) goto out;
-    }
-
- out:
-    /* rc < 0: error
-     * rc == 0: ok, we are done
-     * rc == +1: need to keep waiting
-     */
-    libxl__xs_transaction_abort(gc, &t);
-
-    if (rc <= 0) {
-        if (rc < 0)
-            LOG(ERROR,"logdirty switch: failed (rc=%d)",rc);
-        switch_logdirty_done(egc,lds,rc);
-    }
-}
-
 static void domain_suspend_switch_qemu_xen_logdirty
                                (libxl__egc *egc, int domid, unsigned enable,
                                 libxl__logdirty_switch *lds)
diff --git a/tools/libs/light/libxl_dom_suspend.c b/tools/libs/light/libxl_dom_suspend.c
index 6091a5f3f6..f0a74fc82c 100644
--- a/tools/libs/light/libxl_dom_suspend.c
+++ b/tools/libs/light/libxl_dom_suspend.c
@@ -85,15 +85,8 @@ void libxl__domain_suspend_device_model(libxl__egc *egc,
     STATE_AO_GC(dsps->ao);
     int rc = 0;
     uint32_t const domid = dsps->domid;
-    const char *const filename = dsps->dm_savefile;
 
     switch (libxl__device_model_version_running(gc, domid)) {
-    case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL: {
-        LOGD(DEBUG, domid, "Saving device model state to %s", filename);
-        libxl__qemu_traditional_cmd(gc, domid, "save");
-        libxl__wait_for_device_model_deprecated(gc, domid, "paused", NULL, NULL, NULL);
-        break;
-    }
     case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
         /* calls dsps->callback_device_model_done when done */
         libxl__qmp_suspend_save(egc, dsps); /* must be last */
@@ -420,21 +413,7 @@ static void domain_suspend_callback_common_done(libxl__egc *egc,
 
 int libxl__domain_resume_device_model_deprecated(libxl__gc *gc, uint32_t domid)
 {
-    const char *path, *state;
-
     switch (libxl__device_model_version_running(gc, domid)) {
-    case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL: {
-        uint32_t dm_domid = libxl_get_stubdom_id(CTX, domid);
-
-        path = DEVICE_MODEL_XS_PATH(gc, dm_domid, domid, "/state");
-        state = libxl__xs_read(gc, XBT_NULL, path);
-        if (state != NULL && !strcmp(state, "paused")) {
-            libxl__qemu_traditional_cmd(gc, domid, "continue");
-            libxl__wait_for_device_model_deprecated(gc, domid, "running",
-                                                    NULL, NULL, NULL);
-        }
-        break;
-    }
     case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
         if (libxl__qmp_resume(gc, domid))
             return ERROR_FAIL;
@@ -493,8 +472,6 @@ static void dm_resume_dispose(libxl__gc *gc,
     libxl__ev_xswatch_deregister(gc, &dmrs->watch);
 }
 
-static void dm_resume_xswatch_cb(libxl__egc *egc,
-    libxl__ev_xswatch *, const char *watch_path, const char *);
 static void dm_resume_qmp_done(libxl__egc *egc,
     libxl__ev_qmp *qmp, const libxl__json_object *, int rc);
 static void dm_resume_timeout(libxl__egc *egc,
@@ -521,27 +498,6 @@ void libxl__dm_resume(libxl__egc *egc,
     if (rc) goto out;
 
     switch (libxl__device_model_version_running(gc, domid)) {
-    case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL: {
-        uint32_t dm_domid = libxl_get_stubdom_id(CTX, domid);
-        const char *path, *state;
-
-        path = DEVICE_MODEL_XS_PATH(gc, dm_domid, domid, "/state");
-        rc = libxl__xs_read_checked(gc, XBT_NULL, path, &state);
-        if (rc) goto out;
-        if (!state || strcmp(state, "paused")) {
-            /* already running */
-            rc = 0;
-            goto out;
-        }
-
-        rc = libxl__qemu_traditional_cmd(gc, domid, "continue");
-        if (rc) goto out;
-        rc = libxl__ev_xswatch_register(gc, &dmrs->watch,
-                                        dm_resume_xswatch_cb,
-                                        path);
-        if (rc) goto out;
-        break;
-    }
     case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
         qmp->ao = dmrs->ao;
         qmp->domid = domid;
@@ -561,27 +517,6 @@ out:
     dm_resume_done(egc, dmrs, rc);
 }
 
-static void dm_resume_xswatch_cb(libxl__egc *egc,
-                                 libxl__ev_xswatch *xsw,
-                                 const char *watch_path,
-                                 const char *event_path)
-{
-    EGC_GC;
-    libxl__dm_resume_state *dmrs = CONTAINER_OF(xsw, *dmrs, watch);
-    int rc;
-    const char *value;
-
-    rc = libxl__xs_read_checked(gc, XBT_NULL, watch_path, &value);
-    if (rc) goto out;
-
-    if (!value || strcmp(value, "running"))
-        return;
-
-    rc = 0;
-out:
-    dm_resume_done(egc, dmrs, rc);
-}
-
 static void dm_resume_qmp_done(libxl__egc *egc,
                                libxl__ev_qmp *qmp,
                                const libxl__json_object *response,
diff --git a/tools/libs/light/libxl_domain.c b/tools/libs/light/libxl_domain.c
index 6751fc785f..dd2e5e9a19 100644
--- a/tools/libs/light/libxl_domain.c
+++ b/tools/libs/light/libxl_domain.c
@@ -1877,8 +1877,6 @@ int libxl_set_vcpuonline(libxl_ctx *ctx, uint32_t domid,
     switch (libxl__domain_type(gc, domid)) {
     case LIBXL_DOMAIN_TYPE_HVM:
         switch (libxl__device_model_version_running(gc, domid)) {
-        case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL:
-            break;
         case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
             rc = libxl__ev_time_register_rel(ao, &svos->timeout,
                                              set_vcpuonline_timeout,
@@ -2116,7 +2114,6 @@ static void domain_s3_resume(libxl__ao *ao, libxl__egc *egc, int domid)
     AO_GC;
     libxl__ev_qmp *qmp;
     int rc = 0;
-    int r;
 
     GCNEW(qmp);
     libxl__ev_qmp_init(qmp);
@@ -2128,14 +2125,6 @@ static void domain_s3_resume(libxl__ao *ao, libxl__egc *egc, int domid)
     switch (libxl__domain_type(gc, domid)) {
     case LIBXL_DOMAIN_TYPE_HVM:
         switch (libxl__device_model_version_running(gc, domid)) {
-        case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL:
-            r = xc_hvm_param_set(CTX->xch, domid, HVM_PARAM_ACPI_S_STATE, 0);
-            if (r) {
-                LOGED(ERROR, domid, "Send trigger '%s' failed",
-                      libxl_trigger_to_string(LIBXL_TRIGGER_S3RESUME));
-                rc = ERROR_FAIL;
-            }
-            break;
         case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
             rc = libxl__ev_qmp_send(egc, qmp, "system_wakeup", NULL);
             if (rc) goto out;
@@ -2481,10 +2470,6 @@ static void retrieve_domain_configuration_end(libxl__egc *egc,
             case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
                 libxl_bitmap_copy(CTX, map, &rdcs->qemuu_cpus);
                 break;
-            case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL:
-                rc = libxl__update_avail_vcpus_xenstore(gc, domid,
-                                                        max_vcpus, map);
-                break;
             default:
                 abort();
             }
diff --git a/tools/libs/light/libxl_internal.c b/tools/libs/light/libxl_internal.c
index c95624933f..2941ca0bbd 100644
--- a/tools/libs/light/libxl_internal.c
+++ b/tools/libs/light/libxl_internal.c
@@ -387,11 +387,9 @@ int libxl__device_model_version_running(libxl__gc *gc, uint32_t domid)
     path = libxl__xs_libxl_path(gc, domid);
     path = GCSPRINTF("%s/dm-version", path);
     dm_version = libxl__xs_read(gc, XBT_NULL, path);
-    if (!dm_version) {
-        return LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL;
-    }
 
-    if (libxl_device_model_version_from_string(dm_version, &value) < 0) {
+    if (!dm_version ||
+        libxl_device_model_version_from_string(dm_version, &value) < 0) {
         LOGD(ERROR, domid, "fatal: %s contain a wrong value (%s)", path, dm_version);
         return -1;
     }
diff --git a/tools/libs/light/libxl_internal.h b/tools/libs/light/libxl_internal.h
index 408a771310..bcd97693d9 100644
--- a/tools/libs/light/libxl_internal.h
+++ b/tools/libs/light/libxl_internal.h
@@ -1423,8 +1423,6 @@ _hidden int libxl__build_hvm(libxl__gc *gc, uint32_t domid,
               libxl_domain_config *d_config,
               libxl__domain_build_state *state);
 
-_hidden int libxl__qemu_traditional_cmd(libxl__gc *gc, uint32_t domid,
-                                        const char *cmd);
 _hidden int libxl__domain_rename(libxl__gc *gc, uint32_t domid,
                                  const char *old_name, const char *new_name,
                                  xs_transaction_t trans);
@@ -2315,8 +2313,7 @@ _hidden char *libxl__json_object_to_json(libxl__gc *gc,
 #define JSON(o) \
     (libxl__json_object_to_json(gc, (o)) ? : "")
 
-  /* Based on /local/domain/$domid/dm-version xenstore key
-   * default is qemu xen traditional */
+  /* Based on /local/domain/$domid/dm-version xenstore key */
 _hidden int libxl__device_model_version_running(libxl__gc *gc, uint32_t domid);
 
 static inline
diff --git a/tools/libs/light/libxl_pci.c b/tools/libs/light/libxl_pci.c
index 1647fd6f47..8c5f914435 100644
--- a/tools/libs/light/libxl_pci.c
+++ b/tools/libs/light/libxl_pci.c
@@ -1020,82 +1020,6 @@ static int pci_multifunction_check(libxl__gc *gc, libxl_device_pci *pci, unsigne
     return 0;
 }
 
-static int pci_ins_check(libxl__gc *gc, uint32_t domid, const char *state, void *priv)
-{
-    char *orig_state = priv;
-
-    if ( !strcmp(state, "pci-insert-failed") )
-        return -1;
-    if ( !strcmp(state, "pci-inserted") )
-        return 0;
-    if ( !strcmp(state, orig_state) )
-        return 1;
-
-    return 1;
-}
-
-static int qemu_pci_add_xenstore(libxl__gc *gc, uint32_t domid,
-                                 libxl_device_pci *pci)
-{
-    libxl_ctx *ctx = libxl__gc_owner(gc);
-    int rc = 0;
-    char *path;
-    char *state, *vdevfn;
-    uint32_t dm_domid;
-
-    dm_domid = libxl_get_stubdom_id(CTX, domid);
-    path = DEVICE_MODEL_XS_PATH(gc, dm_domid, domid, "/state");
-    state = libxl__xs_read(gc, XBT_NULL, path);
-    path = DEVICE_MODEL_XS_PATH(gc, dm_domid, domid, "/parameter");
-    if (pci->vdevfn) {
-        libxl__xs_printf(gc, XBT_NULL, path, PCI_BDF_VDEVFN","PCI_OPTIONS,
-                         pci->domain, pci->bus, pci->dev,
-                         pci->func, pci->vdevfn, pci->msitranslate,
-                         pci->power_mgmt);
-    } else {
-        libxl__xs_printf(gc, XBT_NULL, path, PCI_BDF","PCI_OPTIONS,
-                         pci->domain,  pci->bus, pci->dev,
-                         pci->func, pci->msitranslate, pci->power_mgmt);
-    }
-
-    libxl__qemu_traditional_cmd(gc, domid, "pci-ins");
-    rc = libxl__wait_for_device_model_deprecated(gc, domid, NULL, NULL,
-                                      pci_ins_check, state);
-    path = DEVICE_MODEL_XS_PATH(gc, dm_domid, domid, "/parameter");
-    vdevfn = libxl__xs_read(gc, XBT_NULL, path);
-    path = DEVICE_MODEL_XS_PATH(gc, dm_domid, domid, "/state");
-    if ( rc < 0 )
-        LOGD(ERROR, domid, "qemu refused to add device: %s", vdevfn);
-    else if ( sscanf(vdevfn, "0x%x", &pci->vdevfn) != 1 ) {
-        LOGD(ERROR, domid, "wrong format for the vdevfn: '%s'", vdevfn);
-        rc = -1;
-    }
-    xs_write(ctx->xsh, XBT_NULL, path, state, strlen(state));
-
-    return rc;
-}
-
-static int check_qemu_running(libxl__gc *gc,
-                              libxl_domid domid,
-                              libxl__xswait_state *xswa,
-                              int rc,
-                              const char *state)
-{
-    if (rc) {
-        if (rc == ERROR_TIMEDOUT) {
-            LOGD(ERROR, domid, "%s not ready", xswa->what);
-        }
-        goto out;
-    }
-
-    if (!state || strcmp(state, "running"))
-        return ERROR_NOT_READY;
-
-out:
-    libxl__xswait_stop(gc, xswa);
-    return rc;
-}
-
 typedef struct pci_add_state {
     /* filled by user of do_pci_add */
     libxl__ao_device *aodev;
@@ -1116,8 +1040,6 @@ typedef struct pci_add_state {
     int retries;
 } pci_add_state;
 
-static void pci_add_qemu_trad_watch_state_cb(libxl__egc *egc,
-    libxl__xswait_state *xswa, int rc, const char *state);
 static void pci_add_qmp_device_add(libxl__egc *, pci_add_state *);
 static void pci_add_qmp_device_add_cb(libxl__egc *,
     libxl__ev_qmp *, const libxl__json_object *, int rc);
@@ -1153,16 +1075,6 @@ static void do_pci_add(libxl__egc *egc,
 
     if (type == LIBXL_DOMAIN_TYPE_HVM) {
         switch (libxl__device_model_version_running(gc, domid)) {
-            case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL:
-                pas->xswait.ao = ao;
-                pas->xswait.what = "Device Model";
-                pas->xswait.path = DEVICE_MODEL_XS_PATH(gc,
-                    libxl_get_stubdom_id(CTX, domid), domid, "/state");
-                pas->xswait.timeout_ms = LIBXL_DEVICE_MODEL_START_TIMEOUT * 1000;
-                pas->xswait.callback = pci_add_qemu_trad_watch_state_cb;
-                rc = libxl__xswait_start(gc, &pas->xswait);
-                if (rc) goto out;
-                return;
             case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
                 rc = libxl__ev_time_register_rel(ao, &pas->timeout,
                                                  pci_add_timeout,
@@ -1183,29 +1095,6 @@ out:
     pci_add_dm_done(egc, pas, rc); /* must be last */
 }
 
-static void pci_add_qemu_trad_watch_state_cb(libxl__egc *egc,
-                                             libxl__xswait_state *xswa,
-                                             int rc,
-                                             const char *state)
-{
-    pci_add_state *pas = CONTAINER_OF(xswa, *pas, xswait);
-    STATE_AO_GC(pas->aodev->ao);
-
-    /* Convenience aliases */
-    libxl_domid domid = pas->domid;
-    libxl_device_pci *pci = &pas->pci;
-
-    rc = check_qemu_running(gc, domid, xswa, rc, state);
-    if (rc == ERROR_NOT_READY)
-        return;
-    if (rc)
-        goto out;
-
-    rc = qemu_pci_add_xenstore(gc, domid, pci);
-out:
-    pci_add_dm_done(egc, pas, rc); /* must be last */
-}
-
 static void pci_add_qmp_device_add(libxl__egc *egc, pci_add_state *pas)
 {
     STATE_AO_GC(pas->aodev->ao);
@@ -1877,42 +1766,6 @@ static void add_pcis_done(libxl__egc *egc, libxl__multidev *multidev,
     aodev->callback(egc, aodev);
 }
 
-static int qemu_pci_remove_xenstore(libxl__gc *gc, uint32_t domid,
-                                    libxl_device_pci *pci, int force)
-{
-    libxl_ctx *ctx = libxl__gc_owner(gc);
-    char *state;
-    char *path;
-    uint32_t dm_domid;
-
-    dm_domid = libxl_get_stubdom_id(CTX, domid);
-
-    path = DEVICE_MODEL_XS_PATH(gc, dm_domid, domid, "/state");
-    state = libxl__xs_read(gc, XBT_NULL, path);
-    path = DEVICE_MODEL_XS_PATH(gc, dm_domid, domid, "/parameter");
-    libxl__xs_printf(gc, XBT_NULL, path, PCI_BDF, pci->domain,
-                     pci->bus, pci->dev, pci->func);
-
-    /* Remove all functions at once atomically by only signalling
-     * device-model for function 0 */
-    if ( !force && (pci->vdevfn & 0x7) == 0 ) {
-        libxl__qemu_traditional_cmd(gc, domid, "pci-rem");
-        if (libxl__wait_for_device_model_deprecated(gc, domid, "pci-removed",
-                                         NULL, NULL, NULL) < 0) {
-            LOGD(ERROR, domid, "Device Model didn't respond in time");
-            /* This depends on guest operating system acknowledging the
-             * SCI, if it doesn't respond in time then we may wish to
-             * force the removal.
-             */
-            return ERROR_FAIL;
-        }
-    }
-    path = DEVICE_MODEL_XS_PATH(gc, dm_domid, domid, "/state");
-    xs_write(ctx->xsh, XBT_NULL, path, state, strlen(state));
-
-    return 0;
-}
-
 typedef struct pci_remove_state {
     libxl__ao_device *aodev;
     libxl_domid domid;
@@ -1935,8 +1788,6 @@ static void libxl__device_pci_remove_common(libxl__egc *egc,
 static void device_pci_remove_common_next(libxl__egc *egc,
     pci_remove_state *prs, int rc);
 
-static void pci_remove_qemu_trad_watch_state_cb(libxl__egc *egc,
-    libxl__xswait_state *xswa, int rc, const char *state);
 static void pci_remove_qmp_device_del(libxl__egc *egc,
     pci_remove_state *prs);
 static void pci_remove_qmp_device_del_cb(libxl__egc *egc,
@@ -1982,16 +1833,6 @@ static void do_pci_remove(libxl__egc *egc, pci_remove_state *prs)
     if (type == LIBXL_DOMAIN_TYPE_HVM) {
         prs->hvm = true;
         switch (libxl__device_model_version_running(gc, domid)) {
-        case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL:
-            prs->xswait.ao = ao;
-            prs->xswait.what = "Device Model";
-            prs->xswait.path = DEVICE_MODEL_XS_PATH(gc,
-                libxl_get_stubdom_id(CTX, domid), domid, "/state");
-            prs->xswait.timeout_ms = LIBXL_DEVICE_MODEL_START_TIMEOUT * 1000;
-            prs->xswait.callback = pci_remove_qemu_trad_watch_state_cb;
-            rc = libxl__xswait_start(gc, &prs->xswait);
-            if (rc) goto out_fail;
-            return;
         case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
             pci_remove_qmp_device_del(egc, prs); /* must be last */
             return;
@@ -2005,30 +1846,6 @@ out_fail:
     pci_remove_detached(egc, prs, rc); /* must be last */
 }
 
-static void pci_remove_qemu_trad_watch_state_cb(libxl__egc *egc,
-                                                libxl__xswait_state *xswa,
-                                                int rc,
-                                                const char *state)
-{
-    pci_remove_state *prs = CONTAINER_OF(xswa, *prs, xswait);
-    STATE_AO_GC(prs->aodev->ao);
-
-    /* Convenience aliases */
-    libxl_domid domid = prs->domid;
-    libxl_device_pci *const pci = &prs->pci;
-
-    rc = check_qemu_running(gc, domid, xswa, rc, state);
-    if (rc == ERROR_NOT_READY)
-        return;
-    if (rc)
-        goto out;
-
-    rc = qemu_pci_remove_xenstore(gc, domid, pci, prs->force);
-
-out:
-    pci_remove_detached(egc, prs, rc);
-}
-
 static void pci_remove_qmp_device_del(libxl__egc *egc,
                                       pci_remove_state *prs)
 {
diff --git a/tools/libs/light/libxl_stream_write.c b/tools/libs/light/libxl_stream_write.c
index 634f3240d1..98d44597a7 100644
--- a/tools/libs/light/libxl_stream_write.c
+++ b/tools/libs/light/libxl_stream_write.c
@@ -252,10 +252,6 @@ void libxl__stream_write_start(libxl__egc *egc,
         stream->device_model_version =
             libxl__device_model_version_running(gc, dss->domid);
         switch (stream->device_model_version) {
-        case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL:
-            stream->emu_sub_hdr.id = EMULATOR_QEMU_TRADITIONAL;
-            break;
-
         case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
             stream->emu_sub_hdr.id = EMULATOR_QEMU_UPSTREAM;
             break;
diff --git a/tools/libs/light/libxl_types.idl b/tools/libs/light/libxl_types.idl
index 9bb2969931..246bb3ddd2 100644
--- a/tools/libs/light/libxl_types.idl
+++ b/tools/libs/light/libxl_types.idl
@@ -104,7 +104,6 @@ libxl_channel_connection = Enumeration("channel_connection", [
 
 libxl_device_model_version = Enumeration("device_model_version", [
     (0, "UNKNOWN"),
-    (1, "QEMU_XEN_TRADITIONAL"), # Historical qemu-xen device model (qemu-dm)
     (2, "QEMU_XEN"),             # Upstream based qemu-xen device model
     ])
 
diff --git a/tools/python/xen/migration/libxl.py b/tools/python/xen/migration/libxl.py
index 5dcb50fe02..dc5c7ac355 100644
--- a/tools/python/xen/migration/libxl.py
+++ b/tools/python/xen/migration/libxl.py
@@ -51,12 +51,10 @@ rec_type_to_str = {
 EMULATOR_HEADER_FORMAT = "II"
 
 EMULATOR_ID_unknown       = 0x00000000
-EMULATOR_ID_qemu_trad     = 0x00000001
 EMULATOR_ID_qemu_upstream = 0x00000002
 
 emulator_id_to_str = {
     EMULATOR_ID_unknown       : "Unknown",
-    EMULATOR_ID_qemu_trad     : "Qemu Traditional",
     EMULATOR_ID_qemu_upstream : "Qemu Upstream",
 }
 
diff --git a/tools/xl/xl_parse.c b/tools/xl/xl_parse.c
index 089a88935a..219e924779 100644
--- a/tools/xl/xl_parse.c
+++ b/tools/xl/xl_parse.c
@@ -2733,10 +2733,7 @@ skip_usbdev:
     xlu_cfg_replace_string (config, "device_model_override",
                             &b_info->device_model, 0);
     if (!xlu_cfg_get_string (config, "device_model_version", &buf, 0)) {
-        if (!strcmp(buf, "qemu-xen-traditional")) {
-            b_info->device_model_version
-                = LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL;
-        } else if (!strcmp(buf, "qemu-xen")) {
+        if (!strcmp(buf, "qemu-xen")) {
             b_info->device_model_version
                 = LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN;
         } else {
-- 
2.43.0



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From: Juergen Gross 
To: xen-devel@lists.xenproject.org
Cc: Juergen Gross ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v2 6/6] build: don't require full tools build for building stubdoms
Date: Tue,  8 Apr 2025 14:35:24 +0200
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With the drop of qemu-traditional "make stubdom" no longer requires
"make tools" to have finished.

It is enough to add "install-tools-public-headers" as a prereq of
"install-stubdom".

Signed-off-by: Juergen Gross 
---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index c9d80a6dc6..67b71ac3d4 100644
--- a/Makefile
+++ b/Makefile
@@ -147,7 +147,7 @@ install-tools: install-tools-public-headers
 	$(MAKE) -C tools install
 
 .PHONY: install-stubdom
-install-stubdom: mini-os-dir install-tools
+install-stubdom: mini-os-dir install-tools-public-headers
 	$(MAKE) -C stubdom install
 ifeq (x86_64,$(XEN_TARGET_ARCH))
 	XEN_TARGET_ARCH=x86_32 $(MAKE) -C stubdom install-grub-if-enabled
-- 
2.43.0



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From: Juergen Gross 
To: xen-devel@lists.xenproject.org
Cc: Juergen Gross ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Oleksii Kurochko ,
	Community Manager ,
	Samuel Thibault 
Subject: [PATCH v2 4/6] tools: remove qemu-traditional
Date: Tue,  8 Apr 2025 14:35:22 +0200
Message-ID: <20250408123526.14613-5-jgross@suse.com>
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Remove qemu traditional from the tree.

Signed-off-by: Juergen Gross 
---
 .gitignore                                    |  3 -
 CHANGELOG.md                                  |  1 +
 Config.mk                                     | 24 -----
 INSTALL                                       | 12 ---
 MAINTAINERS                                   |  4 -
 README                                        |  2 +-
 SUPPORT.md                                    | 16 ----
 config/Tools.mk.in                            |  1 -
 docs/process/branching-checklist.txt          |  1 -
 docs/process/release-technician-checklist.txt |  1 -
 stubdom/Makefile                              | 84 +----------------
 stubdom/configure                             | 89 -------------------
 stubdom/configure.ac                          | 15 ----
 stubdom/ioemu-minios.cfg                      |  6 --
 tools/Makefile                                | 58 ------------
 tools/Rules.mk                                |  3 -
 tools/config.h.in                             |  3 -
 tools/configure                               | 42 +--------
 tools/configure.ac                            | 21 +----
 19 files changed, 10 insertions(+), 376 deletions(-)
 delete mode 100644 stubdom/ioemu-minios.cfg

diff --git a/.gitignore b/.gitignore
index 53f5df0003..ccc0bebee6 100644
--- a/.gitignore
+++ b/.gitignore
@@ -255,9 +255,6 @@ LibVNCServer*
 tools/qemu-xen-dir-remote
 tools/qemu-xen-dir
 
-tools/qemu-xen-traditional-dir-remote
-tools/qemu-xen-traditional-dir
-
 tools/firmware/seabios-dir-remote
 tools/firmware/seabios-dir
 
diff --git a/CHANGELOG.md b/CHANGELOG.md
index ce4fcf2feb..d150b9fa1b 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -21,6 +21,7 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/)
    - Smoke tests for the FreeBSD Xen builds in Cirrus CI.
 
 ### Removed
+ - Support of qemu-traditional has been removed.
 
 ## [4.20.0](https://xenbits.xenproject.org/gitweb/?p=xen.git;a=shortlog;h=RELEASE-4.20.0) - 2025-03-05
 
diff --git a/Config.mk b/Config.mk
index 8be7733d9e..d61257a286 100644
--- a/Config.mk
+++ b/Config.mk
@@ -208,22 +208,12 @@ XEN_EXTFILES_URL ?= https://xenbits.xen.org/xen-extfiles
 
 # Where to look for inlined subtrees (for example, from a tarball)
 QEMU_UPSTREAM_INTREE ?= $(XEN_ROOT)/tools/qemu-xen
-QEMU_TRADITIONAL_INTREE ?= $(XEN_ROOT)/tools/qemu-xen-traditional
 
 
 # Handle legacy options
 ifneq (,$(SEABIOS_UPSTREAM_TAG))
 SEABIOS_UPSTREAM_REVISION ?= $(SEABIOS_UPSTREAM_TAG)
 endif
-ifneq (,$(QEMU_REMOTE))
-QEMU_TRADITIONAL_URL ?= $(QEMU_REMOTE)
-endif
-ifneq (,$(CONFIG_QEMU))
-QEMU_TRADITIONAL_LOC ?= $(CONFIG_QEMU)
-endif
-ifneq (,$(QEMU_TAG))
-QEMU_TRADITIONAL_REVISION ?= $(QEMU_TAG)
-endif
 
 OVMF_UPSTREAM_URL ?= https://xenbits.xen.org/git-http/ovmf.git
 OVMF_UPSTREAM_REVISION ?= ba91d0292e593df8528b66f99c1b0b14fadc8e16
@@ -239,20 +229,6 @@ SEABIOS_UPSTREAM_REVISION ?= rel-1.16.3
 
 ETHERBOOT_NICS ?= rtl8139 8086100e
 
-
-QEMU_TRADITIONAL_URL ?= https://xenbits.xen.org/git-http/qemu-xen-traditional.git
-QEMU_TRADITIONAL_REVISION ?= 3d273dd05e51e5a1ffba3d98c7437ee84e8f8764
-# Wed Jul 15 10:01:40 2020 +0100
-# qemu-trad: remove Xen path dependencies
-
-# Specify which qemu-dm to use. This may be `ioemu' to use the old
-# Mercurial in-tree version, or a local directory, or a git URL.
-# QEMU_UPSTREAM_LOC ?= `pwd`/$(XEN_ROOT)/../qemu-xen.git
-
-# Defaults for subtree locations
-QEMU_TRADITIONAL_LOC ?= $(call or,$(wildcard $(QEMU_TRADITIONAL_INTREE)),\
-                                  $(QEMU_TRADITIONAL_URL))
-
 QEMU_UPSTREAM_LOC ?= $(call or,$(wildcard $(QEMU_UPSTREAM_INTREE)),\
                                $(QEMU_UPSTREAM_URL))
 
diff --git a/INSTALL b/INSTALL
index 88c1464816..786e3da996 100644
--- a/INSTALL
+++ b/INSTALL
@@ -113,15 +113,6 @@ Build a private copy of SeaBIOS.
 Use the given SeaBIOS binary instead of compiling a private copy.
   --with-system-seabios=PATH
 
-Build the old qemu used by xm/xend. This is required if existing domUs
-should be migrated to this host, or if existing domU snapshots should be
-started with this version of the tools. Only if all domUs used the new
-upstream qemu during initial start it is safe to disable this option.
-The old qemu requires rombios, which can be disable along with
-qemu-traditional.
-  --enable-qemu-traditional
-  --enable-rombios
-
 The libxl toolstack uses the upstream qemu per default. A private copy
 will be built. If desired this private copy can be configured with
 additional options passed to its configure script.
@@ -245,7 +236,6 @@ locations.
 XEN_EXTFILES_URL=
 OVMF_UPSTREAM_URL=
 QEMU_UPSTREAM_URL=
-QEMU_TRADITIONAL_URL=
 SEABIOS_UPSTREAM_URL=
 MINIOS_UPSTREAM_URL=
 
@@ -253,7 +243,6 @@ Using additional CFLAGS to build tools which will run in dom0 is
 required when building distro packages. These variables can be used to
 pass RPM_OPT_FLAGS.
 EXTRA_CFLAGS_XEN_TOOLS=
-EXTRA_CFLAGS_QEMU_TRADITIONAL=
 EXTRA_CFLAGS_QEMU_XEN=
 
 Additional CFLAGS may be supplied to the build of the hypervisor by
@@ -340,7 +329,6 @@ sudo make install BOOT_DIR=/ood/path/boot EFI_DIR=/odd/path/efi
 export WGET=$(type -P false)
 export GIT=$(type -P false)
 export EXTRA_CFLAGS_XEN_TOOLS="$RPM_OPT_FLAGS"
-export EXTRA_CFLAGS_QEMU_TRADITIONAL="$RPM_OPT_FLAGS"
 export EXTRA_CFLAGS_QEMU_XEN="$RPM_OPT_FLAGS"
 %configure \
         --with-initddir=%{_initddir}
diff --git a/MAINTAINERS b/MAINTAINERS
index c11b82eca9..7d1b3b8641 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -466,10 +466,6 @@ M:	Marek Marczykowski-Górecki 
 S:	Supported
 F:	tools/python
 
-QEMU-DM
-S:	Supported
-T:	git https://xenbits.xenproject.org/git-http/qemu-xen-traditional.git
-
 QEMU UPSTREAM
 M:	Stefano Stabellini 
 M:	Anthony Perard 
diff --git a/README b/README
index be90be3910..6ee58f7b35 100644
--- a/README
+++ b/README
@@ -80,7 +80,7 @@ disabled at compile time:
       libnl-3-dev, etc).  Required if network buffering is desired
       when using Remus with libxl.  See docs/README.remus for detailed
       information.
-    * 16-bit x86 assembler, loader and compiler for qemu-traditional / rombios
+    * 16-bit x86 assembler, loader and compiler for rombios
       (dev86 rpm or bin86 & bcc debs)
     * Development install of liblzma for rombios
     * Development install of libbz2, liblzma, liblzo2, and libzstd for DomU
diff --git a/SUPPORT.md b/SUPPORT.md
index e8fd0c251e..5eecf1dcbc 100644
--- a/SUPPORT.md
+++ b/SUPPORT.md
@@ -998,21 +998,6 @@ See the section **Blkback** for image formats supported by QEMU.
 
     Status: Supported, not security supported
 
-### qemu-xen-traditional ###
-
-The Xen Project provides an old version of qemu with modifications
-which enable use as a device model stub domain.  The old version is
-normally selected by default only in a stub dm configuration, but it
-can be requested explicitly in other configurations, for example in
-`xl` with `device_model_version="QEMU_XEN_TRADITIONAL"`.
-
-    Status, Device Model Stub Domains: Supported, with caveats
-    Status, as host process device model: No security support, not recommended
-
-qemu-xen-traditional is security supported only for those available
-devices which are supported for mainstream QEMU (see above), with
-trusted driver domains (see Device Model Stub Domains).
-
 ## Virtual Firmware
 
 ### x86/HVM iPXE
@@ -1031,7 +1016,6 @@ as the guest itself.
 Booting a guest via guest BIOS firmware
 
     Status, SeaBIOS (qemu-xen): Supported
-    Status, ROMBIOS (qemu-xen-traditional): Supported
 
 ### x86/HVM OVMF
 
diff --git a/config/Tools.mk.in b/config/Tools.mk.in
index 37c071961e..463ab75965 100644
--- a/config/Tools.mk.in
+++ b/config/Tools.mk.in
@@ -43,7 +43,6 @@ CONFIG_OVMF         := @ovmf@
 CONFIG_ROMBIOS      := @rombios@
 CONFIG_SEABIOS      := @seabios@
 CONFIG_IPXE         := @ipxe@
-CONFIG_QEMU_TRAD    := @qemu_traditional@
 CONFIG_QEMU_XEN     := @qemu_xen@
 CONFIG_QEMUU_EXTRA_ARGS:= @EXTRA_QEMUU_CONFIGURE_ARGS@
 CONFIG_LIBNL        := @libnl@
diff --git a/docs/process/branching-checklist.txt b/docs/process/branching-checklist.txt
index aa7a27eed5..9632888a56 100644
--- a/docs/process/branching-checklist.txt
+++ b/docs/process/branching-checklist.txt
@@ -71,7 +71,6 @@ ov=4.0
 Ensure references to qemu trees and Mini-OS in xen.git's Config.mk are updated.
 The variables and there content should be:
   * QEMU_UPSTREAM_REVISION: qemu-xen-X.Y.0
-  * QEMU_TRADITIONAL_REVISION: xen-X.Y.0
   * MINIOS_UPSTREAM_REVISION: xen-RELEASE-X.Y.0
 Where X.Y is the release version (e.g. 4.17).
 
diff --git a/docs/process/release-technician-checklist.txt b/docs/process/release-technician-checklist.txt
index 829e8ec47b..64ed9fd5b2 100644
--- a/docs/process/release-technician-checklist.txt
+++ b/docs/process/release-technician-checklist.txt
@@ -56,7 +56,6 @@ t=RELEASE-$r
 
 * change xen-unstable Config.mk
 #   QEMU_UPSTREAM_REVISION,
-#   QEMU_TRADITIONAL_REVISION
 #   MINIOS_UPSTREAM_REVISION
 #     (drop any references to the specific commits, e.g. date or title)
 * change SUPPORT.md heading version number; -unstable or -rc tag
diff --git a/stubdom/Makefile b/stubdom/Makefile
index 724ce40365..82fc1e90f8 100644
--- a/stubdom/Makefile
+++ b/stubdom/Makefile
@@ -7,7 +7,6 @@ export PKG_CONFIG_DIR = $(CURDIR)/pkg-config
 
 # Remove flags which are meant for tools, e.g. "-m64"
 export EXTRA_CFLAGS_XEN_TOOLS=
-export EXTRA_CFLAGS_QEMU_TRADITIONAL=
 
 export stubdom=y
 export debug=y
@@ -267,43 +266,6 @@ cross-tpmemu: $(TPMEMU_STAMPFILE)
 .PHONY: $(CROSS_ROOT)
 $(CROSS_ROOT): cross-newlib cross-zlib cross-libpci
 
-QEMU_ROOT := $(shell if [ -d "$(QEMU_TRADITIONAL_LOC)" ]; then echo "$(QEMU_TRADITIONAL_LOC)"; else echo .; fi)
-
-ifneq ($(filter ioemu,$(STUBDOM_TARGETS)),)
-IOEMU_LINKFARM_TARGET := ioemu/linkfarm.stamp
-endif
-
-ifeq ($(QEMU_ROOT),.)
-$(XEN_ROOT)/tools/qemu-xen-traditional-dir:
-	$(MAKE) DESTDIR= -C $(XEN_ROOT)/tools qemu-xen-traditional-dir-find
-
-ioemu/linkfarm.stamp: $(XEN_ROOT)/tools/qemu-xen-traditional-dir
-	mkdir -p ioemu
-	set -e;									\
-	$(buildmakevars2shellvars);						\
-	cd ioemu;								\
-	src="$$XEN_ROOT/tools/qemu-xen-traditional-dir"; export src;		\
-	(cd $$src && find * -type d						\
-		$(addprefix ! -path , '*-softmmu*' '*-linux-user*') -print)	\
-		| xargs mkdir -p;						\
-	(cd $$src && find *	! -type l  -type f  $(addprefix ! -path ,	\
-			'*.[oda1]' 'config-*' config.mak qemu-dm qemu-img-xen	\
-			'*.html' '*.pod' '*-softmmu*' '*-linux-user*'		\
-			)) >linkfarm.stamp.tmp;				\
-	cmp -s linkfarm.stamp.tmp linkfarm.stamp &&			\
-		rm linkfarm.stamp.tmp || {				\
-		mv linkfarm.stamp.tmp linkfarm.stamp;			\
-		cat linkfarm.stamp | while read f;			\
-			do rm -f "$$f"; ln -s "$$src/$$f" "$$f"; done;	\
-	}
-else
-export QEMU_ROOT
-
-ioemu/linkfarm.stamp:
-	mkdir -p ioemu
-	touch ioemu/linkfarm.stamp
-endif
-
 #######
 # libraries under tools/libs
 #######
@@ -380,29 +342,6 @@ $(TARGETS_MINIOS): mini-os-%:
                 mkdir -p $@/$$i ; \
 	done
 
-#######
-# ioemu
-#######
-
-ioemu-minios.gen.cfg: APP_LIBS = evtchn gnttab ctrl guest
-ioemu-minios.gen.cfg: ioemu-minios.cfg Makefile
-	$(GEN_config) >$@
-
-ioemu-minios-config.mk: ioemu-minios.gen.cfg
-	MINIOS_CONFIG="$(CURDIR)/$<" CONFIG_FILE="$(CURDIR)/$@" $(MAKE) DESTDIR= -C $(MINI_OS) config
-
-.PHONY: ioemu
-ioemu: cross-zlib cross-libpci libxenguest ioemu-minios-config.mk
-	[ -f ioemu/config-host.mak ] || \
-	  ( $(buildmakevars2shellvars); \
-	    cd ioemu ; \
-	    LWIPDIR=$(CURDIR)/lwip-$(XEN_TARGET_ARCH) \
-	    TARGET_CPPFLAGS="$(TARGET_CPPFLAGS) $(shell cat ioemu-minios-config.mk)" \
-	    TARGET_CFLAGS="$(TARGET_CFLAGS)" \
-	    TARGET_LDFLAGS="$(TARGET_LDFLAGS)" \
-	    $(QEMU_ROOT)/xen-setup-stubdom )
-	$(MAKE) DESTDIR= -C ioemu -f $(QEMU_ROOT)/Makefile
-
 ###
 # C
 ###
@@ -496,11 +435,6 @@ xenstorepvh: $(CROSS_ROOT) xenstorepvh-minios-config.mk
 # minios
 ########
 
-.PHONY: ioemu-stubdom
-ioemu-stubdom: APP_OBJS=$(CURDIR)/ioemu/i386-stubdom/qemu.a $(CURDIR)/ioemu/i386-stubdom/libqemu.a $(CURDIR)/ioemu/libqemu_common.a
-ioemu-stubdom: mini-os-$(XEN_TARGET_ARCH)-ioemu lwip-$(XEN_TARGET_ARCH) libxenguest ioemu
-	DEF_CPPFLAGS="$(TARGET_CPPFLAGS)" DEF_CFLAGS="$(TARGET_CFLAGS)" DEF_LDFLAGS="$(TARGET_LDFLAGS)" MINIOS_CONFIG="$(CURDIR)/ioemu-minios.gen.cfg" $(MAKE) DESTDIR= -C $(MINI_OS) OBJ_DIR=$(CURDIR)/$< LWIPDIR=$(CURDIR)/lwip-$(XEN_TARGET_ARCH) APP_OBJS="$(APP_OBJS)"
-
 .PHONY: c-stubdom
 c-stubdom: mini-os-$(XEN_TARGET_ARCH)-c lwip-$(XEN_TARGET_ARCH) libxenguest c
 	DEF_CPPFLAGS="$(TARGET_CPPFLAGS)" DEF_CFLAGS="$(TARGET_CFLAGS)" DEF_LDFLAGS="$(TARGET_LDFLAGS)" MINIOS_CONFIG="$(CURDIR)/c/minios.cfg" $(MAKE) DESTDIR= -C $(MINI_OS) OBJ_DIR=$(CURDIR)/$< LWIPDIR=$(CURDIR)/lwip-$(XEN_TARGET_ARCH) APP_OBJS=$(CURDIR)/c/main.a
@@ -544,13 +478,6 @@ else
 install: $(STUBDOMPATH)
 endif
 
-install-ioemu: ioemu-stubdom
-	$(INSTALL_DIR) "$(DESTDIR)$(LIBEXEC_BIN)"
-	$(INSTALL_PROG) stubdom-dm "$(DESTDIR)$(LIBEXEC_BIN)"
-	$(INSTALL_DATA) stubdompath.sh "$(DESTDIR)$(LIBEXEC_BIN)"
-	$(INSTALL_DIR) "$(DESTDIR)$(XENFIRMWAREDIR)"
-	$(INSTALL_DATA) mini-os-$(XEN_TARGET_ARCH)-ioemu/mini-os.gz "$(DESTDIR)$(XENFIRMWAREDIR)/ioemu-stubdom.gz"
-
 install-grub: pv-grub
 	$(INSTALL_DIR) "$(DESTDIR)$(XENFIRMWAREDIR)"
 	$(INSTALL_DATA) mini-os-$(XEN_TARGET_ARCH)-grub/mini-os.gz "$(DESTDIR)$(XENFIRMWAREDIR)/pv-grub-$(XEN_TARGET_ARCH).gz"
@@ -593,11 +520,6 @@ else
 uninstall:
 endif
 
-uninstall-ioemu:
-	rm -f $(DESTDIR)$(LIBEXEC_BIN)/stubdom-dm
-	rm -f $(DESTDIR)$(LIBEXEC_BIN)/stubdompath.sh
-	rm -f $(DESTDIR)$(XENFIRMWAREDIR)/ioemu-stubdom.gz
-
 uninstall-grub:
 	rm -f $(DESTDIR)$(XENFIRMWAREDIR)/pv-grub-$(XEN_TARGET_ARCH).gz
 
@@ -617,11 +539,10 @@ uninstall-vtpmmgr:
 # clean
 #######
 
-# Only clean the libxc/ioemu/mini-os part
+# Only clean the libxc/mini-os part
 .PHONY: clean
 clean: $(foreach lib,$(STUB_LIBS),clean-libxen$(lib))
 clean:
-	rm -fr mini-os-$(XEN_TARGET_ARCH)-ioemu
 	rm -fr mini-os-$(XEN_TARGET_ARCH)-c
 	rm -fr mini-os-$(XEN_TARGET_ARCH)-grub
 	rm -fr mini-os-$(XEN_TARGET_ARCH)-xenstore
@@ -636,7 +557,6 @@ clean:
 	rm -f *-minios-config.mk
 	rm -f *.gen.cfg
 	rm -fr pkg-config
-	-[ ! -d ioemu ] || $(MAKE) DESTDIR= -C ioemu clean
 	-[ ! -d xenstore ] || $(MAKE) -f $(CURDIR)/xenlibs.mk -C xenstore clean
 	-[ ! -d xenstorepvh ] || $(MAKE) -f $(CURDIR)/xenlibs.mk -C xenstorepvh clean
 
@@ -647,7 +567,7 @@ crossclean: clean
 	rm -fr newlib-$(XEN_TARGET_ARCH)
 	rm -fr zlib-$(XEN_TARGET_ARCH) pciutils-$(XEN_TARGET_ARCH)
 	rm -fr libs-$(XEN_TARGET_ARCH)
-	rm -fr ioemu xenstore xenstorepvh
+	rm -fr xenstore xenstorepvh
 	rm -fr gmp-$(XEN_TARGET_ARCH)
 	rm -fr polarssl-$(XEN_TARGET_ARCH)
 	rm -fr tpm_emulator-$(XEN_TARGET_ARCH)
diff --git a/stubdom/configure b/stubdom/configure
index 08cacf764c..9dd0e7c796 100755
--- a/stubdom/configure
+++ b/stubdom/configure
@@ -622,7 +622,6 @@ STUBDOM_UNINSTALL
 STUBDOM_INSTALL
 STUBDOM_BUILD
 STUBDOM_TARGETS
-ioemu
 vtpmmgr
 vtpm
 TPMEMU_VERSION
@@ -713,14 +712,12 @@ SHELL'
 ac_subst_files=''
 ac_user_opts='
 enable_option_checking
-enable_ioemu_stubdom
 enable_c_stubdom
 enable_pv_grub
 enable_xenstore_stubdom
 enable_xenstorepvh_stubdom
 enable_vtpm_stubdom
 enable_vtpmmgr_stubdom
-enable_qemu_traditional
 enable_debug
 enable_extfiles
 '
@@ -1363,7 +1360,6 @@ Optional Features:
   --disable-option-checking  ignore unrecognized --enable/--with options
   --disable-FEATURE       do not include FEATURE (same as --enable-FEATURE=no)
   --enable-FEATURE[=ARG]  include FEATURE [ARG=yes]
-  --enable-ioemu-stubdom  Build and install ioemu-stubdom
   --enable-c-stubdom      Build and install c-stubdom (default is DISABLED)
   --enable-pv-grub        Build and install pv-grub (default is DISABLED)
   --disable-xenstore-stubdom
@@ -1375,7 +1371,6 @@ Optional Features:
   --enable-vtpm-stubdom   Build and install vtpm-stubdom
   --enable-vtpmmgr-stubdom
                           Build and install vtpmmgr-stubdom
-
   --disable-debug         Disable debug build of stubdom (default is ENABLED)
   --disable-extfiles      Use xen extfiles repository for libraries (default
                           is ENABLED)
@@ -2411,40 +2406,6 @@ case $host_os in *\ *) host_os=`echo "$host_os" | sed 's/ /-/g'`;; esac
 
 # Enable/disable stub domains
 
-# Check whether --enable-ioemu-stubdom was given.
-if test ${enable_ioemu_stubdom+y}
-then :
-  enableval=$enable_ioemu_stubdom;
-
-if test "x$enableval" = "xyes"
-then :
-
-
-ioemu=y
-STUBDOM_TARGETS="$STUBDOM_TARGETS ioemu"
-STUBDOM_BUILD="$STUBDOM_BUILD ioemu-stubdom"
-STUBDOM_INSTALL="$STUBDOM_INSTALL install-ioemu"
-STUBDOM_UNINSTALL="$STUBDOM_UNINSTALL install-ioemu"
-
-
-else $as_nop
-
-if test "x$enableval" = "xno"
-then :
-
-
-ioemu=n
-
-
-fi
-
-fi
-
-
-fi
-
-
-
 # Check whether --enable-c-stubdom was given.
 if test ${enable_c_stubdom+y}
 then :
@@ -2685,35 +2646,6 @@ fi
 
 
 
-# Check whether --enable-qemu-traditional was given.
-if test ${enable_qemu_traditional+y}
-then :
-  enableval=$enable_qemu_traditional;
-fi
-
-if test "x$enable_qemu_traditional" = "xyes"
-then :
-
-    qemu_traditional=y
-else $as_nop
-
-    qemu_traditional=n
-
-fi
-if test "x$ioemu" = "x"
-then :
-
-    ioemu=$qemu_traditional
-
-fi
-echo "x$ioemu$qemu_traditional"
-if test "x$ioemu$qemu_traditional" = "xyn"
-then :
-
-    as_fn_error $? "IOEMU stubdomain requires qemu-traditional" "$LINENO" 5
-
-fi
-
 
 # Check whether --enable-debug was given.
 if test ${enable_debug+y}
@@ -4358,27 +4290,6 @@ fi
 
 
 
-if test "x$ioemu" = "xy" || test "x$ioemu" = "x"
-then :
-
-
-ioemu=y
-STUBDOM_TARGETS="$STUBDOM_TARGETS ioemu"
-STUBDOM_BUILD="$STUBDOM_BUILD ioemu-stubdom"
-STUBDOM_INSTALL="$STUBDOM_INSTALL install-ioemu"
-STUBDOM_UNINSTALL="$STUBDOM_UNINSTALL install-ioemu"
-
-
-else $as_nop
-
-
-ioemu=n
-
-
-fi
-
-
-
 
 
 
diff --git a/stubdom/configure.ac b/stubdom/configure.ac
index fc736c0387..f07b08c5b3 100644
--- a/stubdom/configure.ac
+++ b/stubdom/configure.ac
@@ -18,7 +18,6 @@ m4_include([../m4/depends.m4])
 m4_include([../m4/fetcher.m4])
 
 # Enable/disable stub domains
-AX_STUBDOM_CONDITIONAL([ioemu-stubdom], [ioemu])
 AX_STUBDOM_DEFAULT_DISABLE([c-stubdom], [c])
 AX_STUBDOM_DEFAULT_DISABLE([pv-grub], [grub])
 AX_STUBDOM_DEFAULT_ENABLE([xenstore-stubdom], [xenstore])
@@ -26,19 +25,6 @@ AX_STUBDOM_DEFAULT_ENABLE([xenstorepvh-stubdom], [xenstorepvh])
 AX_STUBDOM_CONDITIONAL([vtpm-stubdom], [vtpm])
 AX_STUBDOM_CONDITIONAL([vtpmmgr-stubdom], [vtpmmgr])
 
-AC_ARG_ENABLE([qemu-traditional])
-AS_IF([test "x$enable_qemu_traditional" = "xyes"], [
-    qemu_traditional=y],[
-    qemu_traditional=n
-])
-AS_IF([test "x$ioemu" = "x"], [
-    ioemu=$qemu_traditional
-])
-echo "x$ioemu$qemu_traditional"
-AS_IF([test "x$ioemu$qemu_traditional" = "xyn"], [
-    AC_MSG_ERROR(IOEMU stubdomain requires qemu-traditional)
-])
-
 AX_ARG_DEFAULT_ENABLE([debug], [Disable debug build of stubdom])
 AX_ARG_DEFAULT_ENABLE([extfiles], [Use xen extfiles repository for libraries])
 
@@ -69,7 +55,6 @@ AX_STUBDOM_AUTO_DEPENDS([vtpmmgr], [vtpm])
 #Conditionally enable these stubdoms based on the presense of dependencies
 AX_STUBDOM_CONDITIONAL_FINISH([vtpm-stubdom], [vtpm])
 AX_STUBDOM_CONDITIONAL_FINISH([vtpmmgr-stubdom], [vtpmmgr])
-AX_STUBDOM_CONDITIONAL_FINISH([ioemu-stubdom], [ioemu])
 
 AX_STUBDOM_FINISH
 AC_OUTPUT()
diff --git a/stubdom/ioemu-minios.cfg b/stubdom/ioemu-minios.cfg
deleted file mode 100644
index 6153ae05f8..0000000000
--- a/stubdom/ioemu-minios.cfg
+++ /dev/null
@@ -1,6 +0,0 @@
-CONFIG_LIBC=y
-CONFIG_LWIP=y
-CONFIG_START_NETWORK=n
-CONFIG_QEMU_XS_ARGS=y
-CONFIG_PCIFRONT=y
-XEN_INTERFACE_VERSION=__XEN_LATEST_INTERFACE_VERSION__
diff --git a/tools/Makefile b/tools/Makefile
index e9e1cda305..6ecf7c0da8 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -24,7 +24,6 @@ SUBDIRS-$(CONFIG_Linux) += vchan
 
 # do not recurse in to a dir we are about to delete
 ifneq "$(MAKECMDGOALS)" "distclean"
-SUBDIRS-$(CONFIG_QEMU_TRAD) += qemu-xen-traditional-dir
 SUBDIRS-$(CONFIG_QEMU_XEN) += qemu-xen-dir
 endif
 
@@ -79,7 +78,6 @@ clean: subdirs-clean
 
 .PHONY: distclean
 distclean: subdirs-distclean clean
-	rm -rf qemu-xen-traditional-dir qemu-xen-traditional-dir-remote
 	rm -rf qemu-xen-dir qemu-xen-dir-remote qemu-xen-build
 	rm -rf ../config/Tools.mk config.h config.log config.status \
 		config.cache autom4te.cache
@@ -97,11 +95,6 @@ QEMU_UPSTREAM_RPATH := -Wl,-rpath,$(LIBEXEC_LIB)
 IOEMU_EXTRA_LDFLAGS :=
 endif
 
-QEMU_ROOT := $(shell if [ -d "$(QEMU_TRADITIONAL_LOC)" ]; then echo "$(QEMU_TRADITIONAL_LOC)"; else echo .; fi)
-ifneq ($(QEMU_ROOT),.)
-export QEMU_ROOT
-endif
-
 # Targets for external trees:
 #  ${target}-dir-find
 #    See if the directory exists and check it out if not.
@@ -136,54 +129,6 @@ endif
 #   ${TARGET}_LOC
 #     The ultimate location of the source (either a local dir or remote URL)
 
-# External target: qemu-xen-traditional
-qemu-xen-traditional-dir-find:
-	set -ex; \
-	if test -d $(QEMU_TRADITIONAL_LOC); then \
-		mkdir -p qemu-xen-traditional-dir; \
-	else \
-		export GIT=$(GIT); \
-		$(XEN_ROOT)/scripts/git-checkout.sh $(QEMU_TRADITIONAL_LOC) $(QEMU_TRADITIONAL_REVISION) qemu-xen-traditional-dir; \
-	fi
-
-.PHONY: qemu-xen-traditional-dir-force-update
-qemu-xen-traditional-dir-force-update: qemu-xen-traditional-dir-find
-	set -ex; \
-	if [ "$(QEMU_TRADITIONAL_REVISION)" ]; then \
-		cd qemu-xen-traditional-dir-remote; \
-		$(GIT) fetch origin; \
-		$(GIT) reset --hard $(QEMU_TRADITIONAL_REVISION); \
-	fi
-
-qemu-traditional-recurse = \
-	set -e; \
-		$(buildmakevars2shellvars); \
-		export CONFIG_BLKTAP1=n; \
-		export BUILDING_QEMU_TRAD=y; \
-		cd qemu-xen-traditional-dir; \
-		$(1)
-
-subdir-all-qemu-xen-traditional-dir: qemu-xen-traditional-dir-find
-	$(call qemu-traditional-recurse,\
-		$(QEMU_ROOT)/xen-setup \
-		--extra-cflags="-D__XEN_TOOLS__ $(EXTRA_CFLAGS_QEMU_TRADITIONAL)" \
-		$(IOEMU_EXTRA_LDFLAGS) \
-		--cpu=$(IOEMU_CPU_ARCH) \
-		$(IOEMU_CONFIGURE_CROSS); \
-		$(MAKE) all \
-	)
-
-subdir-install-qemu-xen-traditional-dir: subdir-all-qemu-xen-traditional-dir
-	$(call qemu-traditional-recurse,$(MAKE) install)
-
-subdir-clean-qemu-xen-traditional-dir:
-	set -e; if test -d qemu-xen-traditional-dir/.; then \
-		$(MAKE) -C qemu-xen-traditional-dir clean; \
-	fi
-subdir-uninstall-qemu-xen-traditional-dir:
-	rm -f $(D)$(bindir)/qemu-nbd*
-	rm -f $(D)$(bindir)/qemu-img*
-
 # External target: qemu-xen
 qemu-xen-dir-find:
 	if test -d $(QEMU_UPSTREAM_LOC) ; then \
@@ -276,9 +221,6 @@ subtree-force-update:
 ifeq ($(CONFIG_QEMU_XEN),y)
 	$(MAKE) qemu-xen-dir-force-update
 endif
-ifeq ($(CONFIG_QEMU_TRAD),y)
-	$(MAKE) qemu-xen-traditional-dir-force-update
-endif
 ifeq ($(CONFIG_X86),y)
 	$(MAKE) -C firmware subtree-force-update
 endif
diff --git a/tools/Rules.mk b/tools/Rules.mk
index 6bd636709f..725c3c32e9 100644
--- a/tools/Rules.mk
+++ b/tools/Rules.mk
@@ -134,12 +134,9 @@ endif
 
 CFLAGS_libxenlight += $(CFLAGS_libxenctrl)
 
-# Don't add -Werror if we are used by qemu-trad build system.
-ifndef BUILDING_QEMU_TRAD
 ifeq ($(CONFIG_WERROR),y)
 CFLAGS += -Werror
 endif
-endif
 
 ifeq ($(debug),y)
 # Use -Og if available, -O0 otherwise
diff --git a/tools/config.h.in b/tools/config.h.in
index 0bab3cb136..fe2a94cfc4 100644
--- a/tools/config.h.in
+++ b/tools/config.h.in
@@ -42,9 +42,6 @@
 /* pygrub enabled */
 #undef HAVE_PYGRUB
 
-/* Qemu traditional enabled */
-#undef HAVE_QEMU_TRADITIONAL
-
 /* ROMBIOS enabled */
 #undef HAVE_ROMBIOS
 
diff --git a/tools/configure b/tools/configure
index e1f6ea6bf5..27ae7c52fb 100755
--- a/tools/configure
+++ b/tools/configure
@@ -726,7 +726,6 @@ BCC
 LD86
 AS86
 ipxe
-qemu_traditional
 LINUX_BACKEND_MODULES
 pygrub
 golang
@@ -835,7 +834,6 @@ enable_seabios
 enable_golang
 enable_pygrub
 with_linux_backend_modules
-enable_qemu_traditional
 enable_ipxe
 with_system_ipxe
 enable_rombios
@@ -1518,13 +1516,10 @@ Optional Features:
   --disable-seabios       Disable SeaBIOS (default is ENABLED)
   --disable-golang        Disable Go tools (default is ENABLED)
   --disable-pygrub        Disable pygrub (default is ENABLED)
-  --enable-qemu-traditional
-                          Enable qemu traditional device model, (DEFAULT is
-                          off)
   --enable-ipxe           Enable in-tree IPXE, (DEFAULT is off, see also
                           --with-system-ipxe)
-  --enable-rombios        Enable ROMBIOS, (DEFAULT is on if qemu-traditional
-                          or ipxe is enabled, otherwise off)
+  --enable-rombios        Enable ROMBIOS, (DEFAULT is on if ipxe is enabled,
+                          otherwise off)
   --enable-libfsimage     Enable libfsimage, (DEFAULT is on if pygrub is
                           enabled, otherwise off)
   --enable-systemd        Enable systemd support (default is DISABLED)
@@ -4838,45 +4833,16 @@ fi
 LINUX_BACKEND_MODULES="`eval echo $LINUX_BACKEND_MODULES`"
 
 
-# Check whether --enable-qemu-traditional was given.
-if test ${enable_qemu_traditional+y}
-then :
-  enableval=$enable_qemu_traditional;
-fi
-
-if test "x$enable_qemu_traditional" = "xyes"
-then :
-
-
-printf "%s\n" "#define HAVE_QEMU_TRADITIONAL 1" >>confdefs.h
-
-    qemu_traditional=y
-else $as_nop
-
-    qemu_traditional=n
-
-fi
-
-
 # Check whether --enable-ipxe was given.
 if test ${enable_ipxe+y}
 then :
   enableval=$enable_ipxe;
-else $as_nop
-
-    if test "x$enable_qemu_traditional" = "xyes"
-then :
-
-        enable_ipxe="yes"
-
 else $as_nop
 
         enable_ipxe="no"
 
 fi
 
-fi
-
 if test "x$enable_ipxe" = "xno"
 then :
   ipxe=n
@@ -4912,7 +4878,7 @@ then :
   enableval=$enable_rombios;
 else $as_nop
 
-    if test "x$enable_qemu_traditional" = "xyes" -o "x$enable_ipxe" = "xyes"
+    if test "x$enable_ipxe" = "xyes"
 then :
 
         enable_rombios="yes"
@@ -4928,7 +4894,7 @@ fi
 if test "x$enable_rombios" = "xyes"
 then :
 
-                # Extract the first word of "as86", so it can be a program name with args.
+    # Extract the first word of "as86", so it can be a program name with args.
 set dummy as86; ac_word=$2
 { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
 printf %s "checking for $ac_word... " >&6; }
diff --git a/tools/configure.ac b/tools/configure.ac
index 0dd6d747ab..dada1c3b15 100644
--- a/tools/configure.ac
+++ b/tools/configure.ac
@@ -121,25 +121,11 @@ esac])
 LINUX_BACKEND_MODULES="`eval echo $LINUX_BACKEND_MODULES`"
 AC_SUBST(LINUX_BACKEND_MODULES)
 
-AC_ARG_ENABLE([qemu-traditional],
-    AS_HELP_STRING([--enable-qemu-traditional],
-                   [Enable qemu traditional device model, (DEFAULT is off)]))
-AS_IF([test "x$enable_qemu_traditional" = "xyes"], [
-AC_DEFINE([HAVE_QEMU_TRADITIONAL], [1], [Qemu traditional enabled])
-    qemu_traditional=y],[
-    qemu_traditional=n
-])
-AC_SUBST(qemu_traditional)
-
 AC_ARG_ENABLE([ipxe],
     AS_HELP_STRING([--enable-ipxe],
                    [Enable in-tree IPXE,
                     (DEFAULT is off, see also --with-system-ipxe)]),,[
-    AS_IF([test "x$enable_qemu_traditional" = "xyes"], [
-        enable_ipxe="yes"
-    ], [
         enable_ipxe="no"
-    ])
 ])
 AS_IF([test "x$enable_ipxe" = "xno"], [ipxe=n], [ipxe=y])
 AC_ARG_WITH([system-ipxe],
@@ -162,18 +148,15 @@ AC_SUBST(ipxe)
 
 AC_ARG_ENABLE([rombios],
     AS_HELP_STRING([--enable-rombios],
-                   [Enable ROMBIOS, (DEFAULT is on if qemu-traditional or ipxe is enabled,
+                   [Enable ROMBIOS, (DEFAULT is on if ipxe is enabled,
                     otherwise off)]),,[
-    AS_IF([test "x$enable_qemu_traditional" = "xyes" -o "x$enable_ipxe" = "xyes"], [
+    AS_IF([test "x$enable_ipxe" = "xyes"], [
         enable_rombios="yes"
     ], [
         enable_rombios="no"
     ])
 ])
 AS_IF([test "x$enable_rombios" = "xyes"], [
-    dnl as86, ld86, and bcc are only required when building rombios. They
-    dnl are only needed when the host system is x86 but that check is done
-    dnl for us above when checking if we should build with qemu-traditional.
     AX_PATH_PROG_OR_FAIL([AS86], [as86])
     AX_PATH_PROG_OR_FAIL([LD86], [ld86])
     AX_PATH_PROG_OR_FAIL([BCC], [bcc])
-- 
2.43.0



From xen-devel-bounces@lists.xenproject.org Tue Apr 08 12:42:08 2025
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From: Juergen Gross 
To: xen-devel@lists.xenproject.org
Cc: Juergen Gross ,
	Samuel Thibault 
Subject: [PATCH v2 5/6] stubdom: remove ancient stubdom-dm script
Date: Tue,  8 Apr 2025 14:35:23 +0200
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The stubdom-dm script is still using "xm" instead of "xl", so it is
probably unused since more than 10 years now.

Signed-off-by: Juergen Gross 
---
 stubdom/stubdom-dm | 182 ---------------------------------------------
 1 file changed, 182 deletions(-)
 delete mode 100644 stubdom/stubdom-dm

diff --git a/stubdom/stubdom-dm b/stubdom/stubdom-dm
deleted file mode 100644
index 05d07ac0d1..0000000000
--- a/stubdom/stubdom-dm
+++ /dev/null
@@ -1,182 +0,0 @@
-#!/bin/bash
-#
-# Copyright 2007-2008 Samuel Thibault 
-#
-# dm script around stubdomains.
-#
-
-DIR=`dirname $0`
-. "${DIR}/stubdompath.sh"
-stubdom_configdir="${XEN_CONFIG_DIR}/stubdoms"
-
-# To fit xterms nicely
-height=339
-
-# Parse arguments
-
-domid=
-domname=
-vncviewer=0
-vncpid=
-extra=
-sdl=0
-opengl=1
-vnc=0
-vncunused=0
-while [ "$#" -gt 0 ];
-do
-    if [ "$#" -ge 2 ];
-    then
-	case "$1" in
-	    -d)
-                domid=$2;
-                extra="$extra -d $domid";
-                shift
-                ;;
-	    -domain-name)
-                domname=$2;
-                shift
-                ;;
-	    -vnc)
-                vnc=1
-                op=${2%,*}
-		ip=${op%:*};
-		vnc_port=${op#*:};
-		shift
-		;;
-            -vncunused)
-                vncunused=1
-                shift
-                ;;
-            -loadvm)
-                extra="$extra -loadvm $2";
-                shift
-                ;;
-            -k)
-                keymap=$2
-                shift
-                ;;
-	    -serial)
-		serial="$2"
-		shift
-		;;
-            -monitor)
-		monitor="$2"
-		shift
-		;;
-	esac
-    fi
-    case "$1" in
-	-vncviewer) vncviewer=1 ;;
-        -sdl) sdl=1 ;;
-        -disable-opengl) opengl=0 ;;
-    esac
-    shift
-done
-
-[ -z "$domid"   ] && { echo "couldn't find domain ID" ; exit 1; }
-[ -z "$domname" ] && { echo "couldn't find domain name" ; exit 1; }
-
-# Termination handler
-
-term() {
-    [ -n "$vncpid" ] && kill -9 $vncpid
-    rm -f /tmp/domname-dm
-    rm ${stubdom_configdir}/$domname-dm
-    exit 0
-}
-
-trap term SIGHUP
-
-############
-# stubdomain
-# Wait for any previous stubdom to terminate
-while xm list | grep -w $domname-dm
-do
-	sleep 1
-done
-
-# Generate stubdom config file
-mkdir -p ${stubdom_configdir} &>/dev/null
-echo "#This file is autogenerated, edit $domname instead!" > ${stubdom_configdir}/$domname-dm
-echo "kernel = '${XENFIRMWAREDIR}/ioemu-stubdom.gz'" >> ${stubdom_configdir}/$domname-dm
-
-vfb="sdl=$sdl, opengl=$opengl"
-test "$DISPLAY" && vfb="$vfb, display=$DISPLAY"
-test "$XAUTHORITY" && vfb="$vfb, xauthority=$XAUTHORITY"
-test $vnc != 0 && vfb="$vfb, vnc=$vnc, vncdisplay=$vnc_port, vnclisten=$ip, vncunused=$vncunused"
-vncpasswd=`xenstore-read /local/domain/0/backend/vfb/$domid/0/vncpasswd 2>/dev/null`
-test "$vncpasswd" && vfb="$vfb, vncpasswd=$vncpasswd"
-test "$keymap" && vfb="$vfb, keymap=$keymap"
-test "$monitor" && vfb="$vfb, monitor=$monitor"
-test "$serial" && vfb="$vfb, serial=$serial"
-echo "vfb = ['$vfb']" >> ${stubdom_configdir}/$domname-dm
-
-echo -n "disk = [ " >> ${stubdom_configdir}/$domname-dm
-j=0
-for i in `xenstore-ls /local/domain/$domid/device/vbd | grep 'backend =' | awk '{print $3}'`
-do
-    i=${i%\"}
-    i=${i#\"}
-    vbd_mode=`xenstore-read $i/mode`
-    vbd_disk=`xenstore-read $i/params`
-    vbd_type=`xenstore-read $i/type`
-    vbd_dev=`xenstore-read $i/dev`
-    vbd_front=`xenstore-read $i/frontend`
-    vbd_devtype=`xenstore-read $vbd_front/device-type`
-    if [ $j -ne 0 ]
-    then
-        echo -n "," >> ${stubdom_configdir}/$domname-dm
-    fi
-    echo -n "'$vbd_type:$vbd_disk,$vbd_dev:$vbd_devtype,$vbd_mode'" >> ${stubdom_configdir}/$domname-dm
-    j=$(( $j + 1 ))
-done
-echo " ] " >> ${stubdom_configdir}/$domname-dm
-echo -n "vif = [ " >> ${stubdom_configdir}/$domname-dm
-j=0
-for i in `xenstore-ls /local/domain/$domid/device/vif | grep 'backend =' | awk '{print $3}'`
-do
-    i=${i%\"}
-    i=${i#\"}
-    vif_mac=`xenstore-read $i/mac`
-    vif_bridge=`xenstore-read $i/bridge`
-    if [ $j -ne 0 ]
-    then
-        echo -n "," >> ${stubdom_configdir}/$domname-dm
-    fi
-    echo -n "'mac=$vif_mac" >> ${stubdom_configdir}/$domname-dm
-    if [ "$vif_bridge" ]
-    then
-        echo -n ",bridge=$vif_bridge'" >> ${stubdom_configdir}/$domname-dm
-    else
-        echo -n "'" >> ${stubdom_configdir}/$domname-dm
-    fi
-    j=$(( $j + 1 ))
-done
-echo " ] " >> ${stubdom_configdir}/$domname-dm
-
-mkfifo /tmp/$domname-dm
-xm create -c ${stubdom_configdir}/$domname-dm target=$domid memory=32 extra="$extra" < /tmp/$domname-dm &
-exec 4>/tmp/$domname-dm
-
-
-###########
-# vncviewer
-if [ "$vncviewer" = 1 ]
-then
-    # Wait for vnc server to appear
-    while ! vnc_port=`xenstore-read /local/domain/$domid/console/vnc-port`
-    do
-        # Check that the stubdom job is still alive
-        kill -0 $consolepid || term
-	sleep 1
-    done
-
-    vncviewer $ip:$vnc_port &
-    vncpid=$!
-fi
-
-# wait for SIGHUP or stubdom termination
-wait
-
-term
-- 
2.43.0



From xen-devel-bounces@lists.xenproject.org Tue Apr 08 12:51:30 2025
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Subject: Re: [PATCH] x86emul/test: drop check for AVX512-4FMAPS
To: Jan Beulich ,
 "xen-devel@lists.xenproject.org" 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
References: <779957ca-3250-4b33-ac1d-ace1dcdaafc0@suse.com>
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From: Andrew Cooper 
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On 08/04/2025 1:28 pm, Jan Beulich wrote:
> Use of Xeon Phi features was dropped earlier on; this one was overlooked.
>
> Fixes: 85191cf32180 ("x86: drop Xeon Phi support")
> Signed-off-by: Jan Beulich 

Acked-by: Andrew Cooper 

> ---
> In principle it looks as if we could now drop all of this checking, as
> gcc5 supports all of the features we check for. AVX512-4FMAPS is an
> example though where checking helps, as this and other Xeon Phi features
> were supported by an intermediate range of gcc versions.

Whatever's easiest.  This is just a test harness.

~Andrew


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From: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
To: xen-devel@lists.xenproject.org
Cc: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Anthony PERARD ,
	Juergen Gross 
Subject: [PATCH] libxl+hvmloader: extend IGD check part 2
Date: Tue,  8 Apr 2025 15:23:13 +0200
Message-ID: <20250408132333.1524246-2-marmarek@invisiblethingslab.com>
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Consider also "Display controller" an IGD, not only "VGA compatible
controller" in few more places.

Fixes: 4191619e0893 ("libxl: extend IGD check")
Signed-off-by: Marek Marczykowski-Górecki 
---
Do you prefer this to be split into two patches (libxl, hvmloader)?

 tools/firmware/hvmloader/pci.c | 1 +
 tools/libs/light/libxl_pci.c   | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/tools/firmware/hvmloader/pci.c b/tools/firmware/hvmloader/pci.c
index c3c61ca060a6..1ee97a5b4b20 100644
--- a/tools/firmware/hvmloader/pci.c
+++ b/tools/firmware/hvmloader/pci.c
@@ -173,6 +173,7 @@ void pci_setup(void)
         switch ( class )
         {
         case 0x0300:
+        case 0x0380:
             /* If emulated VGA is found, preserve it as primary VGA. */
             if ( (vendor_id == 0x1234) && (device_id == 0x1111) )
             {
diff --git a/tools/libs/light/libxl_pci.c b/tools/libs/light/libxl_pci.c
index 1647fd6f4756..db1299832cce 100644
--- a/tools/libs/light/libxl_pci.c
+++ b/tools/libs/light/libxl_pci.c
@@ -2575,7 +2575,8 @@ int libxl__grant_vga_iomem_permission(libxl__gc *gc, const uint32_t domid,
 
         if (sysfs_dev_get_class(gc, pci, &pci_device_class))
             continue;
-        if (pci_device_class != 0x030000) /* VGA class */
+        if (pci_device_class != 0x030000 && /* VGA class */
+                pci_device_class != 0x038000) /* Display class */
             continue;
 
         stubdom_domid = libxl_get_stubdom_id(CTX, domid);
-- 
2.48.1



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Subject: Re: [PATCH] libxl+hvmloader: extend IGD check part 2
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In-Reply-To: <20250408132333.1524246-2-marmarek@invisiblethingslab.com>
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On 08/04/2025 2:23 pm, Marek Marczykowski-Górecki wrote:
> Consider also "Display controller" an IGD, not only "VGA compatible
> controller" in few more places.
>
> Fixes: 4191619e0893 ("libxl: extend IGD check")
> Signed-off-by: Marek Marczykowski-Górecki 
> ---
> Do you prefer this to be split into two patches (libxl, hvmloader)?

Probably not for something this trivial.

>
>  tools/firmware/hvmloader/pci.c | 1 +
>  tools/libs/light/libxl_pci.c   | 3 ++-
>  2 files changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/tools/firmware/hvmloader/pci.c b/tools/firmware/hvmloader/pci.c
> index c3c61ca060a6..1ee97a5b4b20 100644
> --- a/tools/firmware/hvmloader/pci.c
> +++ b/tools/firmware/hvmloader/pci.c
> @@ -173,6 +173,7 @@ void pci_setup(void)
>          switch ( class )
>          {
>          case 0x0300:
> +        case 0x0380:

Now we've got multiple, we should have /* VGA */ and /* Display */
comments like libxl has.

Can fix on commit.

Reviewed-by: Andrew Cooper 


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Hi Luca,

On 07/04/2025 10:14, Luca Fancellu wrote:
> CAUTION: This message has originated from an External Source. Please use proper judgment and caution when opening attachments, clicking links, or responding to this email.
>
>
> Implement the function setup_mpu that will logically track the MPU
> regions defined by hardware registers, start introducing data
> structures and functions to track the status from the C world.
>
> The xen_mpumap_mask bitmap is used to track which MPU region are
> enabled at runtime.
>
> This function is called from setup_mm() which full implementation
> will be provided in a later stage.
>
> Signed-off-by: Luca Fancellu 
> ---
>   xen/arch/arm/include/asm/arm64/mpu.h |  2 ++
>   xen/arch/arm/mpu/mm.c                | 49 +++++++++++++++++++++++++++-
>   2 files changed, 50 insertions(+), 1 deletion(-)
>
> diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/asm/arm64/mpu.h
> index 7cf8d355a1af..ff5a957bf085 100644
> --- a/xen/arch/arm/include/asm/arm64/mpu.h
> +++ b/xen/arch/arm/include/asm/arm64/mpu.h
> @@ -6,6 +6,8 @@
>   #ifndef __ARM_ARM64_MPU_H__
>   #define __ARM_ARM64_MPU_H__
>
> +#define PRENR_MASK  GENMASK(31, 0)
This can be moved to xen/arch/arm/include/asm/mpu.h
> +
>   /*
>    * Excute never.
>    * Stage 1 EL2 translation regime.
> diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c
> index 2c5820a44f13..fe05c8097155 100644
> --- a/xen/arch/arm/mpu/mm.c
> +++ b/xen/arch/arm/mpu/mm.c
> @@ -14,6 +14,17 @@
>
>   struct page_info *frame_table;
>
> +/* Maximum number of supported MPU memory regions by the EL2 MPU. */
> +uint8_t __ro_after_init max_xen_mpumap;
> +
> +/*
> + * Bitmap xen_mpumap_mask is to record the usage of EL2 MPU memory regions.
> + * Bit 0 represents MPU memory region 0, bit 1 represents MPU memory
> + * region 1, ..., and so on.
> + * If a MPU memory region gets enabled, set the according bit to 1.
> + */
> +DECLARE_BITMAP(xen_mpumap_mask, MAX_MPU_REGIONS);
> +
>   /* EL2 Xen MPU memory region mapping table. */
>   pr_t xen_mpumap[MAX_MPU_REGIONS];
>
> @@ -224,9 +235,45 @@ pr_t pr_of_xenaddr(paddr_t base, paddr_t limit, unsigned attr)
>       return region;
>   }
>
> +/*
> + * The code in this function needs to track the regions programmed in
> + * arm64/mpu/head.S
> + */
> +static void __init setup_mpu(void)
> +{
> +    register_t prenr;
> +    unsigned int i = 0;
> +
> +    /*
> +     * MPUIR_EL2.Region[0:7] identifies the number of regions supported by
> +     * the EL2 MPU.
> +     */
> +    max_xen_mpumap = (uint8_t)(READ_SYSREG(MPUIR_EL2) & NUM_MPU_REGIONS_MASK);
> +
> +    /* PRENR_EL2 has the N bit set if the N region is enabled, N < 32 */
> +    prenr = (READ_SYSREG(PRENR_EL2) & PRENR_MASK);
> +
> +    /*
> +     * Set the bitfield for regions enabled in assembly boot-time.
> +     * This code works under the assumption that the code in head.S has
> +     * allocated and enabled regions below 32 (N < 32).
> +     */
> +    while ( prenr > 0 )
> +    {
> +        if (prenr & 0x1)
> +        {
> +            set_bit(i, xen_mpumap_mask);
> +            read_protection_region(&xen_mpumap[i], i);
> +        }
> +
> +        prenr >>= 1;
> +        i++;
> +    }
> +}
> +
>   void __init setup_mm(void)
>   {
> -    BUG_ON("unimplemented");
> +    setup_mpu();
>   }
>
>   int modify_xen_mappings(unsigned long s, unsigned long e, unsigned int nf)
> --
> 2.34.1
- Ayan
>


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Date: Tue, 8 Apr 2025 15:34:50 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: xen-devel@lists.xenproject.org, Jan Beulich ,
	Roger Pau =?utf-8?B?TW9ubsOp?= ,
	Anthony PERARD ,
	Juergen Gross 
Subject: Re: [PATCH] libxl+hvmloader: extend IGD check part 2

On Tue, Apr 08, 2025 at 02:31:10PM +0100, Andrew Cooper wrote:
> On 08/04/2025 2:23 pm, Marek Marczykowski-G=C3=B3recki wrote:
> > Consider also "Display controller" an IGD, not only "VGA compatible
> > controller" in few more places.
> >
> > Fixes: 4191619e0893 ("libxl: extend IGD check")
> > Signed-off-by: Marek Marczykowski-G=C3=B3recki 
> > ---
> > Do you prefer this to be split into two patches (libxl, hvmloader)?
>=20
> Probably not for something this trivial.
>=20
> >
> >  tools/firmware/hvmloader/pci.c | 1 +
> >  tools/libs/light/libxl_pci.c   | 3 ++-
> >  2 files changed, 3 insertions(+), 1 deletion(-)
> >
> > diff --git a/tools/firmware/hvmloader/pci.c b/tools/firmware/hvmloader/=
pci.c
> > index c3c61ca060a6..1ee97a5b4b20 100644
> > --- a/tools/firmware/hvmloader/pci.c
> > +++ b/tools/firmware/hvmloader/pci.c
> > @@ -173,6 +173,7 @@ void pci_setup(void)
> >          switch ( class )
> >          {
> >          case 0x0300:
> > +        case 0x0380:
>=20
> Now we've got multiple, we should have /* VGA */ and /* Display */
> comments like libxl has.
>=20
> Can fix on commit.

Fine with me, thanks!

> Reviewed-by: Andrew Cooper 

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Subject: Re: [PATCH 1/2] x86/hvm: remove unreachable MMCFG write emulation
To: Roger Pau Monne 
Cc: Andrew Cooper , xen-devel@lists.xenproject.org
References: <20250408093156.83277-1-roger.pau@citrix.com>
 <20250408093156.83277-2-roger.pau@citrix.com>
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On 08.04.2025 11:31, Roger Pau Monne wrote:
> The current implementation of PVH dom0 relies on vPCI to trap and handle
> accesses to the MMCFG area.  Previous implementation of PVH dom0 (v1)
> didn't have vPCI, and as a classic PV dom0, relied on the MMCFG range being
> RO.  As such hvm_emulate_one_mmio() had to special case write accesses to
> the MMCFG area.
> 
> With PVH dom0 using vPCI, and the MMCFG accesses being fully handled there,
> hvm_emulate_one_mmio() should never handle accesses to MMCFG, making the
> code effectively unreachable.
> 
> Remove it and leave an ASSERT to make sure MMCFG accesses never get into
> hvm_emulate_one_mmio().  As a result of the removal of one of the users of
> mmcfg_intercept_write(), the function can now be moved into the same
> translation unit where it's solely used, allowing it to be made static and
> effectively built only when PV support is enabled.
> 
> Signed-off-by: Roger Pau Monné 

Reviewed-by: Jan Beulich 
with one cosmetic suggestion:

> --- a/xen/arch/x86/hvm/emulate.c
> +++ b/xen/arch/x86/hvm/emulate.c
> @@ -2858,12 +2858,6 @@ int hvm_emulate_one(
>  
>  int hvm_emulate_one_mmio(unsigned long mfn, unsigned long gla)
>  {
> -    static const struct x86_emulate_ops hvm_intercept_ops_mmcfg = {
> -        .read       = x86emul_unhandleable_rw,
> -        .insn_fetch = hvmemul_insn_fetch,
> -        .write      = mmcfg_intercept_write,
> -        .validate   = hvmemul_validate,
> -    };
>      static const struct x86_emulate_ops hvm_ro_emulate_ops_mmio = {
>          .read       = x86emul_unhandleable_rw,
>          .insn_fetch = hvmemul_insn_fetch,
> @@ -2872,28 +2866,28 @@ int hvm_emulate_one_mmio(unsigned long mfn, unsigned long gla)
>      };
>      struct mmio_ro_emulate_ctxt mmio_ro_ctxt = { .cr2 = gla, .mfn = _mfn(mfn) };
>      struct hvm_emulate_ctxt ctxt;
> -    const struct x86_emulate_ops *ops;
>      unsigned int seg, bdf;
>      int rc;
>  
>      if ( pci_ro_mmcfg_decode(mfn, &seg, &bdf) )
>      {
> -        mmio_ro_ctxt.seg = seg;
> -        mmio_ro_ctxt.bdf = bdf;
> -        ops = &hvm_intercept_ops_mmcfg;
> +        /* Should be always handled by vPCI for PVH dom0. */
> +        gdprintk(XENLOG_ERR, "unhandled MMCFG access for %pp\n",
> +                 &PCI_SBDF(seg, bdf));
> +        ASSERT_UNREACHABLE();
> +        return X86EMUL_UNHANDLEABLE;
>      }
> -    else
> -        ops = &hvm_ro_emulate_ops_mmio;
>  
>      hvm_emulate_init_once(&ctxt, x86_insn_is_mem_write,
>                            guest_cpu_user_regs());
>      ctxt.ctxt.data = &mmio_ro_ctxt;
>  
> -    switch ( rc = _hvm_emulate_one(&ctxt, ops, VIO_no_completion) )
> +    switch ( rc = _hvm_emulate_one(&ctxt, &hvm_ro_emulate_ops_mmio,
> +                                   VIO_no_completion) )
>      {
>      case X86EMUL_UNHANDLEABLE:
>      case X86EMUL_UNIMPLEMENTED:
> -        hvm_dump_emulation_state(XENLOG_G_WARNING, "MMCFG", &ctxt, rc);
> +        hvm_dump_emulation_state(XENLOG_G_WARNING, "RO MMIO", &ctxt, rc);

The string doesn't need to be all capitals (see other uses of the function).
How about "r/o MMIO"?

Jan


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Date: Tue, 8 Apr 2025 15:46:00 +0200
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Subject: Re: [PATCH v2] xen/riscv: Increase XEN_VIRT_SIZE
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <808d1b346bc90dde38fd19a6b92ab78d78e42936.1743766932.git.oleksii.kurochko@gmail.com>
 
 
 <8b2e50f2-1f89-41df-be88-afc9ef24b51a@suse.com>
Content-Language: en-US
From: Oleksii Kurochko 
In-Reply-To: <8b2e50f2-1f89-41df-be88-afc9ef24b51a@suse.com>

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--------------XvnKCZqwJdqMgXTIWtLshsvG
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On 4/8/25 2:02 PM, Jan Beulich wrote:
> On 08.04.2025 13:51, Oleksii Kurochko wrote:
>> On 4/7/25 12:09 PM, Jan Beulich wrote:
>>> On 04.04.2025 18:04, Oleksii Kurochko wrote:
>>>> --- a/xen/arch/riscv/include/asm/mm.h
>>>> +++ b/xen/arch/riscv/include/asm/mm.h
>>>> @@ -43,13 +43,19 @@ static inline void *maddr_to_virt(paddr_t ma)
>>>>     */
>>>>    static inline unsigned long virt_to_maddr(unsigned long va)
>>>>    {
>>>> +    const unsigned int vpn1_shift = PAGETABLE_ORDER + PAGE_SHIFT;
>>>> +    const unsigned long va_vpn = va >> vpn1_shift;
>>>> +    const unsigned long xen_virt_start_vpn =
>>>> +        _AC(XEN_VIRT_START, UL) >> vpn1_shift;
>>>> +    const unsigned long xen_virt_end_vpn =
>>>> +        xen_virt_start_vpn + ((XEN_VIRT_SIZE >> vpn1_shift) - 1);
>>>> +
>>>>        if ((va >= DIRECTMAP_VIRT_START) &&
>>>>            (va <= DIRECTMAP_VIRT_END))
>>>>            return directmapoff_to_maddr(va - directmap_virt_start);
>>>>    
>>>> -    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(2));
>>>> -    ASSERT((va >> (PAGETABLE_ORDER + PAGE_SHIFT)) ==
>>>> -           (_AC(XEN_VIRT_START, UL) >> (PAGETABLE_ORDER + PAGE_SHIFT)));
>>>> +    BUILD_BUG_ON(XEN_VIRT_SIZE > GB(1));
>>>> +    ASSERT((va_vpn >= xen_virt_start_vpn) && (va_vpn <= xen_virt_end_vpn));
>>> Not all of the range is backed by memory, and for the excess space the
>>> translation is therefore (likely) wrong. Which better would be caught by
>>> the assertion?
>> Backed here means that the memory is actually mapped?
>>
>> IIUC it is needed to check only for the range [XEN_VIRT_START, XEN_VIRT_START+xen_phys_size]
>> where xen_phys_size=(unsigned long)_end - (unsigned long)_start.
>>
>> Did I understand you correctly?
> I think so, yes. Depending on what you (intend to) do to .init.* at the
> end of boot, that range may later also want excluding.

I planned to release everything between __init_begin and __init_end in the following way:
   destroy_xen_mappings((unsigned long)__init_begin, (unsigned long)__init_end);

So yes, then I think I have to come up with new ASSERT, add is_init_memory_freed variable and
if is_init_memory_freed=true then also check that `va` isn't from .init.* range.

But I'm not quire sure that mapping for .got* should be destroyed after the end of boot. (now it is
part of [__init_begin,__init_end] range.

>>>> --- a/xen/arch/riscv/mm.c
>>>> +++ b/xen/arch/riscv/mm.c
>>>> @@ -31,20 +31,27 @@ unsigned long __ro_after_init phys_offset; /* = load_start - XEN_VIRT_START */
>>>>    #define LOAD_TO_LINK(addr) ((unsigned long)(addr) - phys_offset)
>>>>    
>>>>    /*
>>>> - * It is expected that Xen won't be more then 2 MB.
>>>> + * It is expected that Xen won't be more then XEN_VIRT_SIZE MB.
>>>>     * The check in xen.lds.S guarantees that.
>>>> - * At least 3 page tables (in case of Sv39 ) are needed to cover 2 MB.
>>>> - * One for each page level table with PAGE_SIZE = 4 Kb.
>>>>     *
>>>> - * One L0 page table can cover 2 MB(512 entries of one page table * PAGE_SIZE).
>>>> + * Root page table is shared with the initial mapping and is declared
>>>> + * separetely. (look at stage1_pgtbl_root)
>>>>     *
>>>> - * It might be needed one more page table in case when Xen load address
>>>> - * isn't 2 MB aligned.
>>>> + * An amount of page tables between root page table and L0 page table
>>>> + * (in the case of Sv39 it covers L1 table):
>>>> + *   (CONFIG_PAGING_LEVELS - 2) are needed for an identity mapping and
>>>> + *   the same amount are needed for Xen.
>>>>     *
>>>> - * CONFIG_PAGING_LEVELS page tables are needed for the identity mapping,
>>>> - * except that the root page table is shared with the initial mapping
>>>> + * An amount of L0 page tables:
>>>> + *   (512 entries of one L0 page table covers 2MB == 1<>>> + *   XEN_VIRT_SIZE >> XEN_PT_LEVEL_SHIFT(1) are needed for Xen and
>>>> + *   one L0 is needed for indenity mapping.
>>>> + *
>>>> + *   It might be needed one more page table in case when Xen load
>>>> + *   address isn't 2 MB aligned.
>>> Shouldn't we guarantee that?
>> I think it's sufficient to guarantee 4KB alignment.
>>
>> The only real benefit I see in enforcing larger alignment is that it likely enables
>> the use of superpages for mapping, which would reduce TLB pressure.
>> But perhaps I'm missing something?
> No, it's indeed mainly that.

But then the linker address and the load address should both be aligned to a 2MB or 1GB boundary.
This likely isn't an issue at all, but could it be a problem if we require 1GB alignment for the
load address? In that case, might it be difficult for the platform to find a suitable place in
memory to load Xen for some reason? (I don't think so but maybe I'm missing something)

These changes should probably be part of a separate patch, as currently,|setup_initial_mapping() |only works with 4KB mapping.
Perhaps it would make sense to add a comment around|setup_initial_mapping()| indicating that if
this function is modified, it may require updating|PGTBL_INITIAL_COUNT|.

~ Oleksii

>
>> Or did you mean that if 2MB alignment isn't guaranteed, then we might need two extra
>> page tables—one if the start address isn't 2MB aligned, and the Xen size is larger than 2MB?
>> Then yes one more page table should be added to PGTBL_INITIAL_COUNT.
> Well, of course - if alignment isn't guaranteed, crossing whatever boundaries
> of course needs accounting for.
>
> Jan
--------------XvnKCZqwJdqMgXTIWtLshsvG
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On 4/8/25 2:02 PM, Jan Beulich wrote:

    

    

      
On 08.04.2025 13:51, Oleksii Kurochko wrote:


      

        
On 4/7/25 12:09 PM, Jan Beulich wrote:


        

          
On 04.04.2025 18:04, Oleksii Kurochko wrote:


          

            
--- a/xen/arch/riscv/include/asm/mm.h
+++ b/xen/arch/riscv/include/asm/mm.h
@@ -43,13 +43,19 @@ static inline void *maddr_to_virt(paddr_t ma)
   */
  static inline unsigned long virt_to_maddr(unsigned long va)
  {
+    const unsigned int vpn1_shift = PAGETABLE_ORDER + PAGE_SHIFT;
+    const unsigned long va_vpn = va >> vpn1_shift;
+    const unsigned long xen_virt_start_vpn =
+        _AC(XEN_VIRT_START, UL) >> vpn1_shift;
+    const unsigned long xen_virt_end_vpn =
+        xen_virt_start_vpn + ((XEN_VIRT_SIZE >> vpn1_shift) - 1);
+
      if ((va >= DIRECTMAP_VIRT_START) &&
          (va <= DIRECTMAP_VIRT_END))
          return directmapoff_to_maddr(va - directmap_virt_start);
  
-    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(2));
-    ASSERT((va >> (PAGETABLE_ORDER + PAGE_SHIFT)) ==
-           (_AC(XEN_VIRT_START, UL) >> (PAGETABLE_ORDER + PAGE_SHIFT)));
+    BUILD_BUG_ON(XEN_VIRT_SIZE > GB(1));
+    ASSERT((va_vpn >= xen_virt_start_vpn) && (va_vpn <= xen_virt_end_vpn));


          

          
Not all of the range is backed by memory, and for the excess space the
translation is therefore (likely) wrong. Which better would be caught by
the assertion?


        

        
Backed here means that the memory is actually mapped?

IIUC it is needed to check only for the range [XEN_VIRT_START, XEN_VIRT_START+xen_phys_size]
where xen_phys_size=(unsigned long)_end - (unsigned long)_start.

Did I understand you correctly?


      

      
I think so, yes. Depending on what you (intend to) do to .init.* at the
end of boot, that range may later also want excluding.

    

    
I planned to release everything between __init_begin and __init_end in the following way:
  destroy_xen_mappings((unsigned long)__init_begin, (unsigned long)__init_end);

So yes, then I think I have to come up with new ASSERT, add is_init_memory_freed variable and
if is_init_memory_freed=true then also check that `va` isn't from .init.* range.

But I'm not quire sure that mapping for .got* should be destroyed after the end of boot. (now it is
part of [__init_begin,__init_end] range.



    

      

      

        

          

            
--- a/xen/arch/riscv/mm.c
+++ b/xen/arch/riscv/mm.c
@@ -31,20 +31,27 @@ unsigned long __ro_after_init phys_offset; /* = load_start - XEN_VIRT_START */
  #define LOAD_TO_LINK(addr) ((unsigned long)(addr) - phys_offset)
  
  /*
- * It is expected that Xen won't be more then 2 MB.
+ * It is expected that Xen won't be more then XEN_VIRT_SIZE MB.
   * The check in xen.lds.S guarantees that.
- * At least 3 page tables (in case of Sv39 ) are needed to cover 2 MB.
- * One for each page level table with PAGE_SIZE = 4 Kb.
   *
- * One L0 page table can cover 2 MB(512 entries of one page table * PAGE_SIZE).
+ * Root page table is shared with the initial mapping and is declared
+ * separetely. (look at stage1_pgtbl_root)
   *
- * It might be needed one more page table in case when Xen load address
- * isn't 2 MB aligned.
+ * An amount of page tables between root page table and L0 page table
+ * (in the case of Sv39 it covers L1 table):
+ *   (CONFIG_PAGING_LEVELS - 2) are needed for an identity mapping and
+ *   the same amount are needed for Xen.
   *
- * CONFIG_PAGING_LEVELS page tables are needed for the identity mapping,
- * except that the root page table is shared with the initial mapping
+ * An amount of L0 page tables:
+ *   (512 entries of one L0 page table covers 2MB == 1<<XEN_PT_LEVEL_SHIFT(1))
+ *   XEN_VIRT_SIZE >> XEN_PT_LEVEL_SHIFT(1) are needed for Xen and
+ *   one L0 is needed for indenity mapping.
+ *
+ *   It might be needed one more page table in case when Xen load
+ *   address isn't 2 MB aligned.


          

          
Shouldn't we guarantee that?


        

        
I think it's sufficient to guarantee 4KB alignment.

The only real benefit I see in enforcing larger alignment is that it likely enables
the use of superpages for mapping, which would reduce TLB pressure.
But perhaps I'm missing something?


      

      
No, it's indeed mainly that.

    

    
But then the linker address and the load address should both be aligned to a 2MB or 1GB boundary.
This likely isn't an issue at all, but could it be a problem if we require 1GB alignment for the
load address? In that case, might it be difficult for the platform to find a suitable place in
memory to load Xen for some reason? (I don't think so but maybe I'm missing something)

These changes should probably be part of a separate patch, as currently, setup_initial_mapping()
only works with 4KB mapping.
Perhaps it would make sense to add a comment around setup_initial_mapping() indicating that if
this function is modified, it may require updating PGTBL_INITIAL_COUNT.

    
~ Oleksii


    

      



      

        
Or did you mean that if 2MB alignment isn't guaranteed, then we might need two extra
page tables—one if the start address isn't 2MB aligned, and the Xen size is larger than 2MB?
Then yes one more page table should be added to PGTBL_INITIAL_COUNT.


      

      
Well, of course - if alignment isn't guaranteed, crossing whatever boundaries
of course needs accounting for.

Jan


    

  


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From: Luca Fancellu 
To: Ayan Kumar Halder 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Michal Orzel ,
	Volodymyr Babchuk 
Subject: Re: [PATCH v2 7/7] arm/mpu: Implement setup_mpu for MPU system
Thread-Topic: [PATCH v2 7/7] arm/mpu: Implement setup_mpu for MPU system
Thread-Index: AQHbp52TIeRvK12Zd0u5W6JGpYxUxbOZxiEAgAAFGAA=
Date: Tue, 8 Apr 2025 13:51:16 +0000
Message-ID: <7591A04F-8BEF-4FE7-A895-90E5DA0D9936@arm.com>
References: <20250407091430.2342709-1-luca.fancellu@arm.com>
 <20250407091430.2342709-8-luca.fancellu@arm.com>
 
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Date: Tue, 8 Apr 2025 09:54:39 -0400
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Subject: Re: [PATCH v4 1/7] xen: introduce hardware domain create flag
To: Jan Beulich 
CC: "Daniel P. Smith" , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" , Andrew Cooper
	, Anthony PERARD ,
	=?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
	
References: <20250407194038.83860-1-jason.andryuk@amd.com>
 <20250407194038.83860-2-jason.andryuk@amd.com>
 
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On 2025-04-08 02:37, Jan Beulich wrote:
> On 07.04.2025 21:40, Jason Andryuk wrote:
>> From: "Daniel P. Smith" 
>>
>> Add and use a new internal create domain flag to specify the hardware
>> domain.  This removes the hardcoding of domid 0 as the hardware domain.
>>
>> This allows more flexibility with domain creation.
>>
>> The assignment of d->cdf is moved later so CDF_hardware is added for the
>> late_hwdom case.  Also old_hwdom has the flag removed to reflect the
>> change.
>>
>> Signed-off-by: Daniel P. Smith 
>> Signed-off-by: Jason Andryuk 
> 
> Reviewed-by: Jan Beulich 
> i.e. ...

Thanks.

>> ---
>> v4:
>> Move d->cdf assignment later
> 
> ... despite my earlier concern this movement looks fine to me.

Double checking today, I see that in the failure case, hardware_domain 
is restored from old_hwdom.  So in that case, CDF_hardware should be 
restored:

@@ -986,7 +987,11 @@ struct domain *domain_create(domid_t domid,

      d->is_dying = DOMDYING_dead;
      if ( hardware_domain == d )
+    {
+        if ( old_hwdom )
+            old_hwdom->cdf |= CDF_hardware;
          hardware_domain = old_hwdom;
+    }
      atomic_set(&d->refcnt, DOMAIN_DESTROYED);

      sched_destroy_domain(d);

I'll see what comments I get on the rest of the series before respinning.

Regards,
Jason


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On 08.04.2025 11:31, Roger Pau Monne wrote:
> When running on AMD hardware in HVM mode the guest linear address (GLA)
> will not be provided to hvm_emulate_one_mmio(), and instead is
> unconditionally set of ~0.  As a consequence mmio_ro_emulated_write() will
> always report an error, as the fault GLA generated by the emulation of the
> access won't be ~0.

Which means subpage_mmio_write_accept() is flawed, too, on AMD (or more
generally whenever .gla_valid isn't set).

> Fix this by only checking for the fault GLA in mmio_ro_emulated_write()
> when the guest is PV.

This narrows checking too much, imo. For VT-x we could continue to do so,
provided we pass e.g. npfec down into hvm_emulate_one_mmio(), i.e. make
the gla_valid flag visible there.

> --- a/xen/arch/x86/mm.c
> +++ b/xen/arch/x86/mm.c
> @@ -5187,7 +5187,12 @@ int cf_check mmio_ro_emulated_write(
>  
>      /* Only allow naturally-aligned stores at the original %cr2 address. */
>      if ( ((bytes | offset) & (bytes - 1)) || !bytes ||
> -         offset != mmio_ro_ctxt->cr2 )
> +         /*
> +          * HVM domains might not have a valid fault GLA in the context, as AMD
> +          * NPT faults don't report the faulting GLA.  It's also possible for
> +          * the fault to happen in non-paging modes.
> +          */
> +         (is_pv_domain(current->domain) && offset != mmio_ro_ctxt->cr2) )
>      {
>          gdprintk(XENLOG_WARNING, "bad access (cr2=%lx, addr=%lx, bytes=%u)\n",
>                  mmio_ro_ctxt->cr2, offset, bytes);

Is logging the supposed CR2 value useful then for cases where the GLA
isn't valid? I fear it might be more confusing than helpful.

Jan


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Date: Tue, 8 Apr 2025 16:00:24 +0200
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Subject: Re: [PATCH v4 1/7] xen: introduce hardware domain create flag
To: Jason Andryuk 
Cc: "Daniel P. Smith" ,
 Stefano Stabellini , Julien Grall ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Andrew Cooper ,
 Anthony PERARD ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 xen-devel@lists.xenproject.org
References: <20250407194038.83860-1-jason.andryuk@amd.com>
 <20250407194038.83860-2-jason.andryuk@amd.com>
 
 <2843a46d-0b30-4fa1-b8de-b0030a98e636@amd.com>
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On 08.04.2025 15:54, Jason Andryuk wrote:
> On 2025-04-08 02:37, Jan Beulich wrote:
>> On 07.04.2025 21:40, Jason Andryuk wrote:
>>> From: "Daniel P. Smith" 
>>>
>>> Add and use a new internal create domain flag to specify the hardware
>>> domain.  This removes the hardcoding of domid 0 as the hardware domain.
>>>
>>> This allows more flexibility with domain creation.
>>>
>>> The assignment of d->cdf is moved later so CDF_hardware is added for the
>>> late_hwdom case.  Also old_hwdom has the flag removed to reflect the
>>> change.
>>>
>>> Signed-off-by: Daniel P. Smith 
>>> Signed-off-by: Jason Andryuk 
>>
>> Reviewed-by: Jan Beulich 
>> i.e. ...
> 
> Thanks.
> 
>>> ---
>>> v4:
>>> Move d->cdf assignment later
>>
>> ... despite my earlier concern this movement looks fine to me.
> 
> Double checking today, I see that in the failure case, hardware_domain 
> is restored from old_hwdom.  So in that case, CDF_hardware should be 
> restored:
> 
> @@ -986,7 +987,11 @@ struct domain *domain_create(domid_t domid,
> 
>       d->is_dying = DOMDYING_dead;
>       if ( hardware_domain == d )
> +    {
> +        if ( old_hwdom )
> +            old_hwdom->cdf |= CDF_hardware;
>           hardware_domain = old_hwdom;
> +    }
>       atomic_set(&d->refcnt, DOMAIN_DESTROYED);
> 
>       sched_destroy_domain(d);

Oh, right. Please retain my R-b with this added.

Jan


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Subject: Re: [PATCH 2/2] x86/hvm: fix write emulation of RO ranges
To: Roger Pau Monne , xen-devel@lists.xenproject.org
Cc: Jan Beulich 
References: <20250408093156.83277-1-roger.pau@citrix.com>
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On 08/04/2025 10:31 am, Roger Pau Monne wrote:
> When running on AMD hardware in HVM mode the guest linear address (GLA)
> will not be provided to hvm_emulate_one_mmio(), and instead is
> unconditionally set of ~0.  As a consequence mmio_ro_emulated_write() will
> always report an error, as the fault GLA generated by the emulation of the
> access won't be ~0.
>
> Fix this by only checking for the fault GLA in mmio_ro_emulated_write()
> when the guest is PV.
>
> Fixes: 33c19df9a5a0 ('x86/PCI: intercept accesses to RO MMIO from dom0s in HVM containers')
> Signed-off-by: Roger Pau Monné 

I think there are several bugs here.

We do get %cr2 reliably for PV and Shadow guests.

Intel EPT may or may not give us GLA.  e.g. writes for pagetable A/D
updates don't get GLA.

Defaulting to ~0 isn't ok.  We need some kind of GLA-valid signal,
except for HAP guests, it isn't even the GLA we care about, it's the GPA
which identifies the MMIO region.

We shouldn't terminate the emulation if there's no GLA to check.  In the
case that we don't have a GLA, we should translate the memory operand
and cross-check the GPA.  We'll definitely have one of the two to hand.

~Andrew


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Hi Luca,

On 07/04/2025 10:14, Luca Fancellu wrote:
> CAUTION: This message has originated from an External Source. Please use proper judgment and caution when opening attachments, clicking links, or responding to this email.
>
>
> Implement some utility function in order to access the MPU regions
> from the C world.
>
> Signed-off-by: Luca Fancellu 
> ---
>   xen/arch/arm/include/asm/mpu.h    |   1 +
>   xen/arch/arm/include/asm/mpu/mm.h |  24 ++++++
>   xen/arch/arm/mpu/mm.c             | 127 ++++++++++++++++++++++++++++++
>   3 files changed, 152 insertions(+)
>
> diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h
> index e148c705b82c..59ff22c804c1 100644
> --- a/xen/arch/arm/include/asm/mpu.h
> +++ b/xen/arch/arm/include/asm/mpu.h
> @@ -13,6 +13,7 @@
>   #define MPU_REGION_SHIFT  6
>   #define MPU_REGION_ALIGN  (_AC(1, UL) << MPU_REGION_SHIFT)
>   #define MPU_REGION_MASK   (~(MPU_REGION_ALIGN - 1))
> +#define MPU_REGION_RES0   (0xFFFULL << 52)
>
>   #define NUM_MPU_REGIONS_SHIFT   8
>   #define NUM_MPU_REGIONS         (_AC(1, UL) << NUM_MPU_REGIONS_SHIFT)
> diff --git a/xen/arch/arm/include/asm/mpu/mm.h b/xen/arch/arm/include/asm/mpu/mm.h
> index 86f33d9836b7..5cabe9d111ce 100644
> --- a/xen/arch/arm/include/asm/mpu/mm.h
> +++ b/xen/arch/arm/include/asm/mpu/mm.h
> @@ -8,6 +8,7 @@
>   #include 
>   #include 
>   #include 
> +#include 
>
>   extern struct page_info *frame_table;
>
> @@ -29,6 +30,29 @@ static inline struct page_info *virt_to_page(const void *v)
>       return mfn_to_page(mfn);
>   }
>
> +/* Utility function to be used whenever MPU regions are modified */
> +static inline void context_sync_mpu(void)
> +{
> +    /*
> +     * ARM DDI 0600B.a, C1.7.1
> +     * Writes to MPU registers are only guaranteed to be visible following a
> +     * Context synchronization event and DSB operation.
> +     */
> +    dsb(sy);
> +    isb();
> +}
> +
> +/*
> + * The following API require context_sync_mpu() after being used to modifiy MPU
> + * regions:
> + *  - write_protection_region
> + */
> +
> +/* Reads the MPU region with index 'sel' from the HW */
> +extern void read_protection_region(pr_t *pr_read, uint8_t sel);
> +/* Writes the MPU region with index 'sel' to the HW */
> +extern void write_protection_region(const pr_t *pr_write, uint8_t sel);
> +
>   #endif /* __ARM_MPU_MM_H__ */
>
>   /*
> diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c
> index f83ce04fef8a..bf281f67fb6b 100644
> --- a/xen/arch/arm/mpu/mm.c
> +++ b/xen/arch/arm/mpu/mm.c
> @@ -8,12 +8,34 @@
>   #include 
>   #include 
>   #include 
> +#include 
> +#include 
>
>   struct page_info *frame_table;
>
>   /* EL2 Xen MPU memory region mapping table. */
>   pr_t xen_mpumap[MAX_MPU_REGIONS];
>
> +/* The following are needed for the case generator with num==0 */
> +#define PRBAR0_EL2 PRBAR_EL2
> +#define PRLAR0_EL2 PRLAR_EL2
> +
> +#define GENERATE_WRITE_PR_REG_CASE(num, pr)                                 \
> +    case num:                                                               \
> +    {                                                                       \
> +        WRITE_SYSREG(pr->prbar.bits & ~MPU_REGION_RES0, PRBAR##num##_EL2);  \
> +        WRITE_SYSREG(pr->prlar.bits & ~MPU_REGION_RES0, PRLAR##num##_EL2);  \
> +        break;                                                              \
> +    }
> +
> +#define GENERATE_READ_PR_REG_CASE(num, pr)                      \
> +    case num:                                                   \
> +    {                                                           \
> +        pr->prbar.bits = READ_SYSREG(PRBAR##num##_EL2);         \
> +        pr->prlar.bits = READ_SYSREG(PRLAR##num##_EL2);         \
> +        break;                                                  \
> +    }
> +
>   static void __init __maybe_unused build_assertions(void)
>   {
>       /*
> @@ -24,6 +46,111 @@ static void __init __maybe_unused build_assertions(void)
>       BUILD_BUG_ON(PAGE_SIZE != SZ_4K);
>   }
>
> +static void prepare_selector(uint8_t sel)
> +{
> +    /*
> +     * {read,write}_protection_region works using the direct access to the 0..15
> +     * regions, so in order to save the isb() overhead, change the PRSELR_EL2
> +     * only when needed, so when the upper 4 bits of the selector will change.
> +     */
> +    sel &= 0xF0U;
> +    if ( READ_SYSREG(PRSELR_EL2) != sel )
> +    {
> +        WRITE_SYSREG(sel, PRSELR_EL2);
> +        isb();
> +    }

This needs to be arm64 specific. Refer ARM DDI 0600A.d ID120821

G1.3.19  PRBAR_EL2, /* I guess this is what you are following */

Provides access to the base address for the MPU region determined by the 
value of 'n' and
PRSELR_EL2.REGION as PRSELR_EL2.REGION<7:4>:n.


Whereas for arm32 . Refer ARM DDI 0568A.c ID110520

E2.2.3 HPRBAR,

Provides access to the base addresses for the first 32 defined EL2 MPU 
regions.

/* Here we do not need to use HPRSELR for region selection */


If you want to make the code similar between arm32 and arm64, then I can 
suggest you can use these registers.

G1.3.17 PRBAR_EL2

Provides access to the base addresses for the EL2 MPU region. 
PRSELR_EL2.REGION determines
which MPU region is selected.

E2.2.2 HPRBAR

Provides indirect access to the base address of the EL2 MPU region 
currently defined by
HPRSELR.

Let me know if it makes sense.

- Ayan

> +}
> +
> +/*
> + * Armv8-R AArch64 at most supports 255 MPU protection regions.
> + * See section G1.3.18 of the reference manual for Armv8-R AArch64,
> + * PRBAR_EL2 and PRLAR_EL2 provide access to the EL2 MPU region
> + * determined by the value of 'n' and PRSELR_EL2.REGION as
> + * PRSELR_EL2.REGION<7:4>:n(n = 0, 1, 2, ... , 15)
> + * For example to access regions from 16 to 31 (0b10000 to 0b11111):
> + * - Set PRSELR_EL2 to 0b1xxxx
> + * - Region 16 configuration is accessible through PRBAR_EL2 and PRLAR_EL2
> + * - Region 17 configuration is accessible through PRBAR1_EL2 and PRLAR1_EL2
> + * - Region 18 configuration is accessible through PRBAR2_EL2 and PRLAR2_EL2
> + * - ...
> + * - Region 31 configuration is accessible through PRBAR15_EL2 and PRLAR15_EL2
> + */
> +/*
> + * Read EL2 MPU Protection Region.
> + *
> + * @pr_read: mpu protection region returned by read op.
> + * @sel: mpu protection region selector
> + */
> +void read_protection_region(pr_t *pr_read, uint8_t sel)
> +{
> +    /*
> +     * Before accessing EL2 MPU region register PRBAR_EL2/PRLAR_EL2,
> +     * make sure PRSELR_EL2 is set, as it determines which MPU region
> +     * is selected.
> +     */
> +    prepare_selector(sel);
> +
> +    switch ( sel & 0xFU )
> +    {
> +        GENERATE_READ_PR_REG_CASE(0, pr_read);
> +        GENERATE_READ_PR_REG_CASE(1, pr_read);
> +        GENERATE_READ_PR_REG_CASE(2, pr_read);
> +        GENERATE_READ_PR_REG_CASE(3, pr_read);
> +        GENERATE_READ_PR_REG_CASE(4, pr_read);
> +        GENERATE_READ_PR_REG_CASE(5, pr_read);
> +        GENERATE_READ_PR_REG_CASE(6, pr_read);
> +        GENERATE_READ_PR_REG_CASE(7, pr_read);
> +        GENERATE_READ_PR_REG_CASE(8, pr_read);
> +        GENERATE_READ_PR_REG_CASE(9, pr_read);
> +        GENERATE_READ_PR_REG_CASE(10, pr_read);
> +        GENERATE_READ_PR_REG_CASE(11, pr_read);
> +        GENERATE_READ_PR_REG_CASE(12, pr_read);
> +        GENERATE_READ_PR_REG_CASE(13, pr_read);
> +        GENERATE_READ_PR_REG_CASE(14, pr_read);
> +        GENERATE_READ_PR_REG_CASE(15, pr_read);
> +    default:
> +        BUG(); /* Can't happen */
> +    }
> +}
> +
> +/*
> + * Write EL2 MPU Protection Region.
> + *
> + * @pr_write: const mpu protection region passed through write op.
> + * @sel: mpu protection region selector
> + */
> +void write_protection_region(const pr_t *pr_write, uint8_t sel)
> +{
> +    /*
> +     * Before accessing EL2 MPU region register PRBAR_EL2/PRLAR_EL2,
> +     * make sure PRSELR_EL2 is set, as it determines which MPU region
> +     * is selected.
> +     */
> +    prepare_selector(sel);
> +
> +    switch ( sel & 0xFU )
> +    {
> +        GENERATE_WRITE_PR_REG_CASE(0, pr_write);
> +        GENERATE_WRITE_PR_REG_CASE(1, pr_write);
> +        GENERATE_WRITE_PR_REG_CASE(2, pr_write);
> +        GENERATE_WRITE_PR_REG_CASE(3, pr_write);
> +        GENERATE_WRITE_PR_REG_CASE(4, pr_write);
> +        GENERATE_WRITE_PR_REG_CASE(5, pr_write);
> +        GENERATE_WRITE_PR_REG_CASE(6, pr_write);
> +        GENERATE_WRITE_PR_REG_CASE(7, pr_write);
> +        GENERATE_WRITE_PR_REG_CASE(8, pr_write);
> +        GENERATE_WRITE_PR_REG_CASE(9, pr_write);
> +        GENERATE_WRITE_PR_REG_CASE(10, pr_write);
> +        GENERATE_WRITE_PR_REG_CASE(11, pr_write);
> +        GENERATE_WRITE_PR_REG_CASE(12, pr_write);
> +        GENERATE_WRITE_PR_REG_CASE(13, pr_write);
> +        GENERATE_WRITE_PR_REG_CASE(14, pr_write);
> +        GENERATE_WRITE_PR_REG_CASE(15, pr_write);
> +    default:
> +        BUG(); /* Can't happen */
> +    }
> +}
> +
>   void __init setup_mm(void)
>   {
>       BUG_ON("unimplemented");
> --
> 2.34.1
>
>


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Subject: Re: [PATCH v2] xen/riscv: Increase XEN_VIRT_SIZE
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <808d1b346bc90dde38fd19a6b92ab78d78e42936.1743766932.git.oleksii.kurochko@gmail.com>
 
 
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On 08.04.2025 15:46, Oleksii Kurochko wrote:
> On 4/8/25 2:02 PM, Jan Beulich wrote:
>> On 08.04.2025 13:51, Oleksii Kurochko wrote:
>>> On 4/7/25 12:09 PM, Jan Beulich wrote:
>>>> On 04.04.2025 18:04, Oleksii Kurochko wrote:
>>>>> --- a/xen/arch/riscv/include/asm/mm.h
>>>>> +++ b/xen/arch/riscv/include/asm/mm.h
>>>>> @@ -43,13 +43,19 @@ static inline void *maddr_to_virt(paddr_t ma)
>>>>>     */
>>>>>    static inline unsigned long virt_to_maddr(unsigned long va)
>>>>>    {
>>>>> +    const unsigned int vpn1_shift = PAGETABLE_ORDER + PAGE_SHIFT;
>>>>> +    const unsigned long va_vpn = va >> vpn1_shift;
>>>>> +    const unsigned long xen_virt_start_vpn =
>>>>> +        _AC(XEN_VIRT_START, UL) >> vpn1_shift;
>>>>> +    const unsigned long xen_virt_end_vpn =
>>>>> +        xen_virt_start_vpn + ((XEN_VIRT_SIZE >> vpn1_shift) - 1);
>>>>> +
>>>>>        if ((va >= DIRECTMAP_VIRT_START) &&
>>>>>            (va <= DIRECTMAP_VIRT_END))
>>>>>            return directmapoff_to_maddr(va - directmap_virt_start);
>>>>>    
>>>>> -    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(2));
>>>>> -    ASSERT((va >> (PAGETABLE_ORDER + PAGE_SHIFT)) ==
>>>>> -           (_AC(XEN_VIRT_START, UL) >> (PAGETABLE_ORDER + PAGE_SHIFT)));
>>>>> +    BUILD_BUG_ON(XEN_VIRT_SIZE > GB(1));
>>>>> +    ASSERT((va_vpn >= xen_virt_start_vpn) && (va_vpn <= xen_virt_end_vpn));
>>>> Not all of the range is backed by memory, and for the excess space the
>>>> translation is therefore (likely) wrong. Which better would be caught by
>>>> the assertion?
>>> Backed here means that the memory is actually mapped?
>>>
>>> IIUC it is needed to check only for the range [XEN_VIRT_START, XEN_VIRT_START+xen_phys_size]
>>> where xen_phys_size=(unsigned long)_end - (unsigned long)_start.
>>>
>>> Did I understand you correctly?
>> I think so, yes. Depending on what you (intend to) do to .init.* at the
>> end of boot, that range may later also want excluding.
> 
> I planned to release everything between __init_begin and __init_end in the following way:
>    destroy_xen_mappings((unsigned long)__init_begin, (unsigned long)__init_end);
> 
> So yes, then I think I have to come up with new ASSERT, add is_init_memory_freed variable and
> if is_init_memory_freed=true then also check that `va` isn't from .init.* range.
> 
> But I'm not quire sure that mapping for .got* should be destroyed after the end of boot. (now it is
> part of [__init_begin,__init_end] range.

Isn't this a non-issue considering

ASSERT(!SIZEOF(.got),      ".got non-empty")
ASSERT(!SIZEOF(.got.plt),  ".got.plt non-empty")

near the bottom of xen.lds.S?

>>>>> --- a/xen/arch/riscv/mm.c
>>>>> +++ b/xen/arch/riscv/mm.c
>>>>> @@ -31,20 +31,27 @@ unsigned long __ro_after_init phys_offset; /* = load_start - XEN_VIRT_START */
>>>>>    #define LOAD_TO_LINK(addr) ((unsigned long)(addr) - phys_offset)
>>>>>    
>>>>>    /*
>>>>> - * It is expected that Xen won't be more then 2 MB.
>>>>> + * It is expected that Xen won't be more then XEN_VIRT_SIZE MB.
>>>>>     * The check in xen.lds.S guarantees that.
>>>>> - * At least 3 page tables (in case of Sv39 ) are needed to cover 2 MB.
>>>>> - * One for each page level table with PAGE_SIZE = 4 Kb.
>>>>>     *
>>>>> - * One L0 page table can cover 2 MB(512 entries of one page table * PAGE_SIZE).
>>>>> + * Root page table is shared with the initial mapping and is declared
>>>>> + * separetely. (look at stage1_pgtbl_root)
>>>>>     *
>>>>> - * It might be needed one more page table in case when Xen load address
>>>>> - * isn't 2 MB aligned.
>>>>> + * An amount of page tables between root page table and L0 page table
>>>>> + * (in the case of Sv39 it covers L1 table):
>>>>> + *   (CONFIG_PAGING_LEVELS - 2) are needed for an identity mapping and
>>>>> + *   the same amount are needed for Xen.
>>>>>     *
>>>>> - * CONFIG_PAGING_LEVELS page tables are needed for the identity mapping,
>>>>> - * except that the root page table is shared with the initial mapping
>>>>> + * An amount of L0 page tables:
>>>>> + *   (512 entries of one L0 page table covers 2MB == 1<>>>> + *   XEN_VIRT_SIZE >> XEN_PT_LEVEL_SHIFT(1) are needed for Xen and
>>>>> + *   one L0 is needed for indenity mapping.
>>>>> + *
>>>>> + *   It might be needed one more page table in case when Xen load
>>>>> + *   address isn't 2 MB aligned.
>>>> Shouldn't we guarantee that?
>>> I think it's sufficient to guarantee 4KB alignment.
>>>
>>> The only real benefit I see in enforcing larger alignment is that it likely enables
>>> the use of superpages for mapping, which would reduce TLB pressure.
>>> But perhaps I'm missing something?
>> No, it's indeed mainly that.
> 
> But then the linker address and the load address should both be aligned to a 2MB or 1GB boundary.
> This likely isn't an issue at all, but could it be a problem if we require 1GB alignment for the
> load address? In that case, might it be difficult for the platform to find a suitable place in
> memory to load Xen for some reason? (I don't think so but maybe I'm missing something)

Why would load address need to be 1Gb aligned? That (as well as 2Mb-)alignment
matters only once you set up paging?

> These changes should probably be part of a separate patch, as currently,|setup_initial_mapping() |only works with 4KB mapping.

That's fine; it's just that - as said - the calculation of how many page tables
you may need has to cover for the worst case.

Jan


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On 08.04.2025 15:23, Marek Marczykowski-Górecki wrote:
> --- a/tools/libs/light/libxl_pci.c
> +++ b/tools/libs/light/libxl_pci.c
> @@ -2575,7 +2575,8 @@ int libxl__grant_vga_iomem_permission(libxl__gc *gc, const uint32_t domid,
>  
>          if (sysfs_dev_get_class(gc, pci, &pci_device_class))
>              continue;
> -        if (pci_device_class != 0x030000) /* VGA class */
> +        if (pci_device_class != 0x030000 && /* VGA class */
> +                pci_device_class != 0x038000) /* Display class */

Nit: Indentation looks suspicious here (can likely also be adjusted
while committing).

Jan


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Subject: Re: [PATCH] libxl+hvmloader: extend IGD check part 2
To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Anthony PERARD , Juergen Gross ,
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On 08.04.2025 15:23, Marek Marczykowski-Górecki wrote:
> --- a/tools/firmware/hvmloader/pci.c
> +++ b/tools/firmware/hvmloader/pci.c
> @@ -173,6 +173,7 @@ void pci_setup(void)
>          switch ( class )
>          {
>          case 0x0300:
> +        case 0x0380:
>              /* If emulated VGA is found, preserve it as primary VGA. */
>              if ( (vendor_id == 0x1234) && (device_id == 0x1111) )
>              {

Unlike here, where vendor IDs are subsequently checked (and the sole question
that arises is whether any of the combinations can actually come as Display
rather than VGA), ...

> --- a/tools/libs/light/libxl_pci.c
> +++ b/tools/libs/light/libxl_pci.c
> @@ -2575,7 +2575,8 @@ int libxl__grant_vga_iomem_permission(libxl__gc *gc, const uint32_t domid,
>  
>          if (sysfs_dev_get_class(gc, pci, &pci_device_class))
>              continue;
> -        if (pci_device_class != 0x030000) /* VGA class */
> +        if (pci_device_class != 0x030000 && /* VGA class */
> +                pci_device_class != 0x038000) /* Display class */
>              continue;

... there's no such checking here, and instead very much VGA-specific things
are being done then. Is that really in line with permitting Display class
devices here as well?

Jan


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Subject: Re: [PATCH v2 2/7] xen/domain: introduce domid_alloc()
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On 01.04.2025 01:05, dmkhn@proton.me wrote:
> From: Denis Mukhin 
> 
> Move domain ID allocation during domain creation to a dedicated
> function domid_alloc().
> 
> Allocation algorithm:
> - If an explicit domain ID is provided, verify its availability and
>   use it if ID is unused;
> - Otherwise, perform an exhaustive search for the first available ID
>   within the [0..DOMID_FIRST_RESERVED) range, excluding hardware_domid.
> 
> This minimizes the use of max_init_domid in the code and, thus, is a
> prerequisite change for enabling console input rotation across domains
> with console input permission on x86 platforms (which currently is
> limited to dom0, PV shim and Xen).

By removing the updating of max_init_domid you do - afaict - break the
remaining use site(s) of the variable.

> @@ -1003,6 +1004,12 @@ static struct domain *__init create_dom0(struct boot_info *bi)
>  
>      image = &bi->mods[idx];
>  
> +    rc = domid_alloc(get_initial_domain_id());
> +    if ( rc < 0 )
> +        panic("Cannot use domain ID %d (rc = %d)\n",
> +              get_initial_domain_id(), rc);
> +    domid = rc;
> +
>      if ( opt_dom0_pvh )
>      {
>          dom0_cfg.flags |= (XEN_DOMCTL_CDF_hvm |

Why does this need to move up, ...

> @@ -1017,7 +1024,6 @@ static struct domain *__init create_dom0(struct boot_info *bi)
>          dom0_cfg.flags |= XEN_DOMCTL_CDF_iommu;
>  
>      /* Create initial domain.  Not d0 for pvshim. */
> -    domid = get_initial_domain_id();

... disconnecting the logic from the comment that is relevant there, ...

>      d = domain_create(domid, &dom0_cfg, pv_shim ? 0 : CDF_privileged);

... and not so much here?

> --- a/xen/include/xen/domain.h
> +++ b/xen/include/xen/domain.h
> @@ -37,6 +37,9 @@ void arch_get_domain_info(const struct domain *d,
>  
>  domid_t get_initial_domain_id(void);
>  
> +#define DOMID_AUTO               (-1)
> +int domid_alloc(int hint);

Imo it would be better to use e.g. DOMID_INVALID as the "give me whatever
is available" indicator, allowing the function parameter to properly be
domid_t.

But first of all - can we please take a step back and re-evaluate whether
all of this re-arrangement that you're doing (not just in the patch here)
is really needed? It seems to me that it must be possible to do whatever
you ultimately want to do without re-writing quite a few pretty central
pieces that have been serving us fine for a long time. That is, rather
than make our code fit your desires, make your plans fit within the code
base we have.

Jan


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To: Ayan Kumar Halder 
CC: "xen-devel@lists.xenproject.org" , Stefano
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Subject: Re: [PATCH v2 2/7] arm/mpu: Provide access to the MPU region from the
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On 01.04.2025 01:05, dmkhn@proton.me wrote:
> From: Denis Mukhin 
> 
> Introduce domid_top() in architecture-independent location to retrieve
> the highest non-system domain ID for use in console input switch logic.
> 
> Replace max_init_domid with domid_top(), which obsoletes max_init_domid
> in the code base.
> 
> Signed-off-by: Denis Mukhin 
> ---
> Changes since v1:
> - promote domid_top to a function which walks through the list of domains
>   to identify the highest non-system domain ID which should be considered
>   for console input rotation
> - elimitate use of max_init_domid

I still don't get how this is functionally identical to what we had so far.
In principle imo this change should come with a "No functional change"
statement. Provided of course that's true in the first place.

> --- a/xen/common/domain.c
> +++ b/xen/common/domain.c
> @@ -111,6 +111,29 @@ int domid_alloc(int hint)
>      return domid;
>  }
>  
> +/*
> + * Retrieve the highest known non-system domain ID.
> + */
> +domid_t domid_top(void)
> +{
> +    struct domain *d;

const?

> +    domid_t i = 0;

i is a pretty generic name for something of type domid_t.

> +
> +    spin_lock(&domlist_update_lock);
> +
> +    for ( d = domain_list;
> +          d && (d->domain_id < DOMID_FIRST_RESERVED);

May I ask which domains with ID >= DOMID_FIRST_RESERVED end up in this
list?

> +          d = d->next_in_list )
> +    {
> +        if ( i < d->domain_id )
> +            i = d->domain_id;

See the comment in domlist_insert() as to sorting of that list.

> --- a/xen/drivers/char/console.c
> +++ b/xen/drivers/char/console.c
> @@ -472,7 +472,7 @@ static void cf_check dump_console_ring_key(unsigned char key)
>   */
>  static unsigned int __read_mostly console_rx = 0;
>  
> -#define max_console_rx (max_init_domid + 1)
> +#define max_console_rx (domid_top() + 1)

This is becoming quite a bit more expensive now, without it becoming clear
whether it's really worth paying that price.

Jan


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Date: Tue, 8 Apr 2025 17:10:56 +0200
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Subject: Re: [PATCH v1 1/3] xen/console: cleanup conring management
To: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org,
 michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org,
 dmukhin@ford.com, xen-devel@lists.xenproject.org
References: <20250403000604.169619-1-dmukhin@ford.com>
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On 03.04.2025 02:06, dmkhn@proton.me wrote:
> From: Denis Mukhin 
> 
> Move console_locks_busted handling inside conring_puts() to remove
> tasklet code duplication.

I for one wouldn't expect tasklet scheduling to happen in a function of
this name. IOW I think the little bit of duplication is warranted here.

Jan


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Date: Tue, 8 Apr 2025 17:23:17 +0200
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Subject: Re: [PATCH v1 2/3] x86/domain: add helpers to simplify emulation
 flags management
To: dmkhn@proton.me, xen-devel@lists.xenproject.org
Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org,
 michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org,
 dmukhin@ford.com
References: <20250401005224.461325-1-dmukhin@ford.com>
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On 01.04.2025 02:52, dmkhn@proton.me wrote:
> From: Denis Mukhin 
> 
> Introduce XEN_X86_EMU_BASELINE and XEN_X86_EMU_OPTIONAL to simplify
> d->arch.emulation_flags management in the code.

If the simplification is limited to ...

> --- a/tools/python/xen/lowlevel/xc/xc.c
> +++ b/tools/python/xen/lowlevel/xc/xc.c
> @@ -159,9 +159,7 @@ static PyObject *pyxc_domain_create(XcObject *self,
>  
>  #if defined (__i386) || defined(__x86_64__)
>      if ( config.flags & XEN_DOMCTL_CDF_hvm )
> -        config.arch.emulation_flags = XEN_X86_EMU_ALL &
> -                                      ~(XEN_X86_EMU_VPCI |
> -                                        XEN_X86_EMU_USE_PIRQ);
> +        config.arch.emulation_flags = XEN_X86_EMU_BASELINE;
>  #elif defined (__arm__) || defined(__aarch64__)
>      config.arch.gic_version = XEN_DOMCTL_CONFIG_GIC_NATIVE;
>  #else

... just this, I'm not convinced that's worth introducing yet two more items
into the namespace.

> --- a/xen/include/public/arch-x86/xen.h
> +++ b/xen/include/public/arch-x86/xen.h
> @@ -290,6 +290,13 @@ struct xen_arch_domainconfig {
>                                       XEN_X86_EMU_VGA | XEN_X86_EMU_IOMMU |   \
>                                       XEN_X86_EMU_PIT | XEN_X86_EMU_USE_PIRQ |\
>                                       XEN_X86_EMU_VPCI)
> +
> +#define XEN_X86_EMU_OPTIONAL        (XEN_X86_EMU_VPCI | \
> +                                     XEN_X86_EMU_USE_PIRQ)
> +
> +#define XEN_X86_EMU_BASELINE        (XEN_X86_EMU_ALL & ~XEN_X86_EMU_OPTIONAL)
> +
> +    /* Hardware emulation flags. */
>      uint32_t emulation_flags;

The comment isn't quite accurate here (and hence perhaps also not in the
earlier patch): XEN_X86_EMU_USE_PIRQ isn't exactly about emulation of anything
hardware-ish.

Jan


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On 08/04/2025 14:51, Luca Fancellu wrote:
> Hi Ayan,
Hi Luca,
>
>> On 8 Apr 2025, at 14:32, Ayan Kumar Halder  wrote:
>>
>> Hi Luca,
>>
>> On 07/04/2025 10:14, Luca Fancellu wrote:
>>> CAUTION: This message has originated from an External Source. Please use proper judgment and caution when opening attachments, clicking links, or responding to this email.
>>>
>>>
>>> Implement the function setup_mpu that will logically track the MPU
>>> regions defined by hardware registers, start introducing data
>>> structures and functions to track the status from the C world.
>>>
>>> The xen_mpumap_mask bitmap is used to track which MPU region are
>>> enabled at runtime.
>>>
>>> This function is called from setup_mm() which full implementation
>>> will be provided in a later stage.
>>>
>>> Signed-off-by: Luca Fancellu 
>>> ---
>>>   xen/arch/arm/include/asm/arm64/mpu.h |  2 ++
>>>   xen/arch/arm/mpu/mm.c                | 49 +++++++++++++++++++++++++++-
>>>   2 files changed, 50 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/asm/arm64/mpu.h
>>> index 7cf8d355a1af..ff5a957bf085 100644
>>> --- a/xen/arch/arm/include/asm/arm64/mpu.h
>>> +++ b/xen/arch/arm/include/asm/arm64/mpu.h
>>> @@ -6,6 +6,8 @@
>>>   #ifndef __ARM_ARM64_MPU_H__
>>>   #define __ARM_ARM64_MPU_H__
>>>
>>> +#define PRENR_MASK  GENMASK(31, 0)
>> This can be moved to xen/arch/arm/include/asm/mpu.h
> I can see from the Arm® Cortex®-R52 Processor TRM, r1p1, 3.3.46 Hyp MPU Region Enable Register,
> that HPRENR can have 16/20/24 enabled bits, the rest is RAZ.

Yes, I see that. However, if you see ARM DDI 0568A.c ID110520 ArmV8-R32 
supplement

E2.2.4 HPRENR

Provides direct access to the HPRLAR.EN bits for EL2 MPU regions 0 to 31.

AFAIU, the maximum number of EL2 MPU regions will always be 32. This 
doesnot seem to be configurable.

The R52 TRM isn't clear when it says "{no,16,20,24} EL2-controlled MPU 
regions implemented" as there is no register to set/check how many EL2 
MPU regions are implemented.

So, I suggest we can keep this in the common file for now.

- Ayan

>
> Because of that I’ve put that here, maybe you should implement it in the arm32 part since you have this
> difference from Arm64.
>
> Cheers,
> Luca
>


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Subject: Re: [PATCH v1 3/3] xen/domain: rewrite emulation_flags_ok()
To: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org,
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References: <20250401005224.461325-1-dmukhin@ford.com>
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On 01.04.2025 02:52, dmkhn@proton.me wrote:
> From: Denis Mukhin 
> 
> Rewrite emulation_flags_ok() using XEN_X86_EMU_{OPTIONAL,BASELINE}
> to simplify future modifications.
> 
> Signed-off-by: Denis Mukhin 
> ---
> Came in the context of NS16550 emulator v3 series:
>   https://lore.kernel.org/xen-devel/20250103-vuart-ns8250-v3-v1-0-c5d36b31d66c@ford.com/
> 
> After modifying emulation_flags_ok() with a new NS16550 vUART
> configuration switch passed from the toolstack for the HVM
> case, I decided to look into how to improve emulation_flags_ok().
> ---
>  xen/arch/x86/domain.c | 29 +++++++++++------------------
>  1 file changed, 11 insertions(+), 18 deletions(-)

There is a readability win, yes.

> --- a/xen/arch/x86/domain.c
> +++ b/xen/arch/x86/domain.c
> @@ -750,25 +750,18 @@ static bool emulation_flags_ok(const struct domain *d, uint32_t emflags)
>      BUILD_BUG_ON(X86_EMU_ALL != XEN_X86_EMU_ALL);
>  #endif
>  
> -    if ( is_hvm_domain(d) )
> -    {
> -        if ( is_hardware_domain(d) &&
> -             emflags != (X86_EMU_VPCI | X86_EMU_LAPIC | X86_EMU_IOAPIC) )
> -            return false;
> -        if ( !is_hardware_domain(d) &&
> -             /* HVM PIRQ feature is user-selectable. */
> -             (emflags & ~X86_EMU_USE_PIRQ) !=
> -             (X86_EMU_ALL & ~(X86_EMU_VPCI | X86_EMU_USE_PIRQ)) &&
> -             emflags != X86_EMU_LAPIC )
> -            return false;
> -    }
> -    else if ( emflags != 0 && emflags != X86_EMU_PIT )
> -    {
> -        /* PV or classic PVH. */
> -        return false;
> -    }
> +    /* PV or classic PVH */
> +    if ( !is_hvm_domain(d) )
> +        return emflags == 0 || emflags == XEN_X86_EMU_PIT;

What's "classic PVH" here? This got to be PVHv1, which is dead. As you touch /
move such a comment, you want to adjust it so it's at least no longer stale.

> -    return true;
> +    /* HVM */
> +    if ( is_hardware_domain(d) )
> +        return emflags == (XEN_X86_EMU_LAPIC |
> +                           XEN_X86_EMU_IOAPIC |
> +                           XEN_X86_EMU_VPCI);
> +
> +    return (emflags & ~XEN_X86_EMU_OPTIONAL) == XEN_X86_EMU_BASELINE ||
> +            emflags == XEN_X86_EMU_LAPIC;

There was a comment about X86_EMU_USE_PIRQ being optional, which you've lost
together with (only) that (i.e. not at the same time including vPCI) optionality.

Furthermore you move from X86_EMU_* namespace to XEN_X86_EMU_* one without even
mentioning that (and the reason to do so) in the description. Aiui the function
deliberately uses the internal names, not the public interface ones.

Jan


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From: Volodymyr Babchuk 
To: Jan Beulich 
CC: Andrew Cooper , Anthony PERARD
	, Michal Orzel , Julien
 Grall , =?iso-8859-1?Q?Roger_Pau_Monn=E9?=
	, Stefano Stabellini ,
	"xen-devel@lists.xenproject.org" 
Subject: Re: [PATCH v4 2/2] xen: debug: gcov: add condition coverage support
Thread-Topic: [PATCH v4 2/2] xen: debug: gcov: add condition coverage support
Thread-Index: AQHbp9yW2b5GBLlgDka417bnQFIpfQ==
Date: Tue, 8 Apr 2025 15:38:24 +0000
Message-ID: <8734eifyts.fsf@epam.com>
References: <20250407164608.2558071-1-volodymyr_babchuk@epam.com>
	<20250407164608.2558071-3-volodymyr_babchuk@epam.com>
	
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Hi Jan,

Jan Beulich  writes:

> On 07.04.2025 18:46, Volodymyr Babchuk wrote:
>> --- a/xen/Rules.mk
>> +++ b/xen/Rules.mk
>> @@ -31,6 +31,7 @@ CFLAGS-y :=3D
>>  AFLAGS-y :=3D
>>  nocov-y :=3D
>>  noubsan-y :=3D
>> +cov-flags-y :=3D
>
> Personally I would have put this slightly higher up, at least ahead of th=
e two
> no*-y. Thinking of it only now (sorry), also maybe cov-cflags-y might be
> slightly better a name?

Okay, I'll do this in the next version.

>
>> @@ -133,19 +134,18 @@ $(filter %.init.o,$(obj-y) $(obj-bin-y) $(extra-y)=
): CFLAGS-y +=3D -DINIT_SECTIONS
>> =20
>>  non-init-objects =3D $(filter-out %.init.o, $(obj-y) $(obj-bin-y) $(ext=
ra-y))
>> =20
>> -ifeq ($(CONFIG_COVERAGE),y)
>>  ifeq ($(CONFIG_CC_IS_CLANG),y)
>> -    COV_FLAGS :=3D -fprofile-instr-generate -fcoverage-mapping
>> +    cov-flags-$(CONFIG_COVERAGE) :=3D -fprofile-instr-generate -fcovera=
ge-mapping
>>  else
>> -    COV_FLAGS :=3D -fprofile-arcs -ftest-coverage
>> +    cov-flags-$(CONFIG_COVERAGE) :=3D -fprofile-arcs -ftest-coverage
>> +    cov-flags-$(CONFIG_CONDITION_COVERAGE) +=3D -fcondition-coverage
>
> Why's this inside the remaining ifeq(,)? Surely there's at least a chance=
 for
> Clang to also support the option at some point?

Yes, but Clang uses different option: -fcoverage-mcdc. I see no sense in
adding it right now, as Xen does not support version 10 of llvm
profiling format, in which they added MC/DC support.

--=20
WBR, Volodymyr=


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Date: Tue, 8 Apr 2025 17:40:42 +0200
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Subject: Re: [RFC PATCH v2] xen: add libafl-qemu fuzzer support
To: Volodymyr Babchuk 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Bertrand Marquis ,
 Dario Faggioli , Juergen Gross ,
 George Dunlap ,
 "xen-devel@lists.xenproject.org" 
References: <20250315003544.1101488-1-volodymyr_babchuk@epam.com>
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From: Jan Beulich 
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In-Reply-To: <20250315003544.1101488-1-volodymyr_babchuk@epam.com>
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On 15.03.2025 01:36, Volodymyr Babchuk wrote:
> LibAFL, which is a part of AFL++ project is a instrument that allows
> us to perform fuzzing on beremetal code (Xen hypervisor in this case)
> using QEMU as an emulator. It employs QEMU's ability to create
> snapshots to run many tests relatively quickly: system state is saved
> right before executing a new test and restored after the test is
> finished.
> 
> This patch adds all necessary plumbing to run aarch64 build of Xen
> inside that LibAFL-QEMU fuzzer. From the Xen perspective we need to
> do following things:
> 
> 1. Able to communicate with LibAFL-QEMU fuzzer. This is done by
> executing special opcodes, that only LibAFL-QEMU can handle.
> 
> 2. Use interface from p.1 to tell the fuzzer about code Xen section,
> so fuzzer know which part of code to track and gather coverage data.
> 
> 3. Report fuzzer about crash. This is done in panic() function.
> 
> 4. Prevent test harness from shooting itself in knee.
> 
> Right now test harness is an external component, because we want to
> test external Xen interfaces, but it is possible to fuzz internal code
> if we want to.
> 
> Test harness is implemented XTF-based test-case(s). As test harness
> can issue hypercall that shuts itself down, KConfig option
> CONFIG_LIBAFL_QEMU_FUZZER_PASS_BLOCKING was added. It basically tells
> fuzzer that test was completed successfully if Dom0 tries to shut
> itself (or the whole machine) down.
> 
> Signed-off-by: Volodymyr Babchuk 
> 
> ---
> 
> I tried to fuzz the vGIC emulator and hypercall interface. While vGIC
> fuzzing didn't yield any interesting results, hypercall fuzzing found a
> way to crash the hypervisor from Dom0 on aarch64, using
> "XEN_SYSCTL_page_offline_op" with "sysctl_query_page_offline" sub-op,
> because it leads to page_is_ram_type() call which is marked
> UNREACHABLE on ARM.
> 
> In v2:
> 
>  - Moved to XTF-based test harness
>  - Severely reworked the fuzzer itself. Now it has user-friendly
>    command-line interface and is capable of running in CI, as it now
>    returns an appropriate error code if any faults were found
>  - Also I found, debugged and fixed a nasty bug in LibAFL-QEMU fork,
>    which crashed the whole fuzzer.
> 
> Right now the fuzzer is lockated at Xen Troops repo:
> 
> https://github.com/xen-troops/xen-fuzzer-rs
> 
> But I believe that it is ready to be included into
> gitlab.com/xen-project/
> 
> XTF-based harness is at
> 
> https://gitlab.com/vlad.babchuk/xtf/-/tree/mr_libafl
> 
> and there is corresponding MR for including it into
> 
> https://gitlab.com/xen-project/fusa/xtf/-/tree/xtf-arm
> 
> So, to sum up. All components are basically ready for initial
> inclusion. There will be smaller, integration-related changes
> later. For example - we will need to update URLs for various
> components after they are moved to correct places.
> ---
>  docs/hypervisor-guide/fuzzing.rst           |  90 ++++++++++++
>  xen/arch/arm/Kconfig.debug                  |  26 ++++
>  xen/arch/arm/Makefile                       |   1 +
>  xen/arch/arm/include/asm/libafl_qemu.h      |  54 +++++++
>  xen/arch/arm/include/asm/libafl_qemu_defs.h |  37 +++++
>  xen/arch/arm/libafl_qemu.c                  | 152 ++++++++++++++++++++
>  xen/arch/arm/psci.c                         |  13 ++
>  xen/common/sched/core.c                     |  17 +++
>  xen/common/shutdown.c                       |   7 +
>  xen/drivers/char/console.c                  |   8 ++
>  10 files changed, 405 insertions(+)
>  create mode 100644 docs/hypervisor-guide/fuzzing.rst
>  create mode 100644 xen/arch/arm/include/asm/libafl_qemu.h
>  create mode 100644 xen/arch/arm/include/asm/libafl_qemu_defs.h
>  create mode 100644 xen/arch/arm/libafl_qemu.c

This looks to be about Arm only, which would be nice if that was visible
right from the subject.

Also, nit: New files' names are to use dashes in favor of underscores.

> --- a/xen/common/sched/core.c
> +++ b/xen/common/sched/core.c
> @@ -47,6 +47,10 @@
>  #define pv_shim false
>  #endif
>  
> +#ifdef CONFIG_LIBAFL_QEMU_FUZZER
> +#include 
> +#endif
> +
>  /* opt_sched: scheduler - default to configured value */
>  static char __initdata opt_sched[10] = CONFIG_SCHED_DEFAULT;
>  string_param("sched", opt_sched);
> @@ -1452,6 +1456,10 @@ static long do_poll(const struct sched_poll *sched_poll)
>      if ( !guest_handle_okay(sched_poll->ports, sched_poll->nr_ports) )
>          return -EFAULT;
>  
> +#ifdef CONFIG_LIBAFL_QEMU_FUZZER_PASS_BLOCKING
> +    libafl_qemu_end(LIBAFL_QEMU_END_OK);
> +#endif
> +
>      set_bit(_VPF_blocked, &v->pause_flags);
>      v->poll_evtchn = -1;
>      set_bit(v->vcpu_id, d->poll_mask);
> @@ -1904,12 +1912,18 @@ ret_t do_sched_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
>      {
>      case SCHEDOP_yield:
>      {
> +#ifdef CONFIG_LIBAFL_QEMU_FUZZER_PASS_BLOCKING
> +        libafl_qemu_end(LIBAFL_QEMU_END_OK);
> +#endif
>          ret = vcpu_yield();
>          break;
>      }
>  
>      case SCHEDOP_block:
>      {
> +#ifdef CONFIG_LIBAFL_QEMU_FUZZER_PASS_BLOCKING
> +        libafl_qemu_end(LIBAFL_QEMU_END_OK);
> +#endif
>          vcpu_block_enable_events();
>          break;
>      }
> @@ -1924,6 +1938,9 @@ ret_t do_sched_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
>  
>          TRACE_TIME(TRC_SCHED_SHUTDOWN, current->domain->domain_id,
>                     current->vcpu_id, sched_shutdown.reason);
> +#ifdef CONFIG_LIBAFL_QEMU_FUZZER_PASS_BLOCKING
> +        libafl_qemu_end(LIBAFL_QEMU_END_OK);
> +#endif
>          ret = domain_shutdown(current->domain, (u8)sched_shutdown.reason);
>  
>          break;

If I was a scheduler maintainer, I'd likely object to this kind of #ifdef-ary.

> --- a/xen/common/shutdown.c
> +++ b/xen/common/shutdown.c
> @@ -11,6 +11,10 @@
>  #include 
>  #include 
>  
> +#ifdef CONFIG_LIBAFL_QEMU_FUZZER
> +#include 
> +#endif
> +
>  /* opt_noreboot: If true, machine will need manual reset on error. */
>  bool __ro_after_init opt_noreboot;
>  boolean_param("noreboot", opt_noreboot);
> @@ -32,6 +36,9 @@ static void noreturn reboot_or_halt(void)
>  
>  void hwdom_shutdown(unsigned char reason)
>  {
> +#ifdef CONFIG_LIBAFL_QEMU_FUZZER_PASS_BLOCKING
> +    libafl_qemu_end(LIBAFL_QEMU_END_OK);
> +#endif
>      switch ( reason )
>      {
>      case SHUTDOWN_poweroff:

It's not as bad here and ...

> --- a/xen/drivers/char/console.c
> +++ b/xen/drivers/char/console.c
> @@ -40,6 +40,9 @@
>  #ifdef CONFIG_SBSA_VUART_CONSOLE
>  #include 
>  #endif
> +#ifdef CONFIG_LIBAFL_QEMU_FUZZER
> +#include 
> +#endif
>  
>  /* console: comma-separated list of console outputs. */
>  static char __initdata opt_console[30] = OPT_CONSOLE_STR;
> @@ -1289,6 +1292,11 @@ void panic(const char *fmt, ...)
>  
>      kexec_crash(CRASHREASON_PANIC);
>  
> +    #ifdef CONFIG_LIBAFL_QEMU_FUZZER
> +    /* Tell the fuzzer that we crashed */
> +    libafl_qemu_end(LIBAFL_QEMU_END_CRASH);
> +    #endif

... here, but still.

Also, pre-processor directives want their # to live at the beginning of the
line.

Jan


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Subject: Re: [PATCH v4 2/2] xen: debug: gcov: add condition coverage support
To: Volodymyr Babchuk 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 "xen-devel@lists.xenproject.org" 
References: <20250407164608.2558071-1-volodymyr_babchuk@epam.com>
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On 08.04.2025 17:38, Volodymyr Babchuk wrote:
> Jan Beulich  writes:
>> On 07.04.2025 18:46, Volodymyr Babchuk wrote:
>>> @@ -133,19 +134,18 @@ $(filter %.init.o,$(obj-y) $(obj-bin-y) $(extra-y)): CFLAGS-y += -DINIT_SECTIONS
>>>  
>>>  non-init-objects = $(filter-out %.init.o, $(obj-y) $(obj-bin-y) $(extra-y))
>>>  
>>> -ifeq ($(CONFIG_COVERAGE),y)
>>>  ifeq ($(CONFIG_CC_IS_CLANG),y)
>>> -    COV_FLAGS := -fprofile-instr-generate -fcoverage-mapping
>>> +    cov-flags-$(CONFIG_COVERAGE) := -fprofile-instr-generate -fcoverage-mapping
>>>  else
>>> -    COV_FLAGS := -fprofile-arcs -ftest-coverage
>>> +    cov-flags-$(CONFIG_COVERAGE) := -fprofile-arcs -ftest-coverage
>>> +    cov-flags-$(CONFIG_CONDITION_COVERAGE) += -fcondition-coverage
>>
>> Why's this inside the remaining ifeq(,)? Surely there's at least a chance for
>> Clang to also support the option at some point?
> 
> Yes, but Clang uses different option: -fcoverage-mcdc. I see no sense in
> adding it right now, as Xen does not support version 10 of llvm
> profiling format, in which they added MC/DC support.

Okay, but then can you amend "Clang is not supported right now" in the description
by another half sentence clarifying why that is?

Jan


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Subject: Re: [PATCH] tools/libxl: Skip invalid IRQs
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	, Juergen Gross ,
	
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On 2025-04-08 02:24, Jan Beulich wrote:
> On 07.04.2025 21:26, Jason Andryuk wrote:
>> A PCI device's irq field is an 8-bit number.  A value of 0xff indicates
>> that the device is not connected.
> 
> Nit: "... that the device IRQ is not ..."
> 
>>   Additionally, the Linux ACPI code can
>> convert these 0xff values to IRQ_NOTCONNECTED(0x80000000) because
>> "0x80000000 is guaranteed to be outside the available range of
>> interrupts and easy to distinguish from other possible incorrect
>> values."  When the hypercall to assign that IRQ fails, device
>> passthrough as a whole fails.
>>
>> Add checking for a valid IRQ and skip the IRQ handling for PCI devices
>> outside that range.  This allows for passthrough of devices without
>> legacy IRQs.
> 
> Which makes the code here even more Linux-centric, I guess.

The actual check is limited to the 8-bit value which is not Linux-specific.

> A couple of related notes, yet most not directly affecting this patch:
> 
>> --- a/tools/libs/light/libxl_pci.c
>> +++ b/tools/libs/light/libxl_pci.c
>> @@ -26,6 +26,9 @@
>>   #define PCI_BDF_XSPATH         "%04x-%02x-%02x-%01x"
>>   #define PCI_PT_QDEV_ID         "pci-pt-%02x_%02x.%01x"
>>   
>> +/* PCI Interrupt Line is an 8-bit value, 0xff means disconnected. */
>> +#define PCI_IRQ_LINE_LIMIT     0xff
>> +
>>   static unsigned int pci_encode_bdf(libxl_device_pci *pci)
>>   {
>>       unsigned int value;
>> @@ -1495,7 +1498,8 @@ static void pci_add_dm_done(libxl__egc *egc,
>>               LOGED(ERROR, domainid, "Couldn't open %s", sysfs_path);
>>               goto out_no_irq;
>>           }
>> -        if ((fscanf(f, "%u", &irq) == 1) && irq) {
>> +        if ((fscanf(f, "%u", &irq) == 1) &&
> 
> For this, "irq" ought to be unsigned int. Same below.
> 
>> +            irq > 0 && irq < PCI_IRQ_LINE_LIMIT) {
> 
> Not sure about this in libxl's style, but it feels inconsistent to have
> parentheses around one relational expression but then not around the
> others. Personally I'd drop them all, but the alternative clearly is to
> add missing ones.

I'll drop them, and then it all fits on one line.

>>               r = xc_physdev_map_pirq(ctx->xch, domid, irq, &irq);
>>               if (r < 0) {
>>                   LOGED(ERROR, domainid, "xc_physdev_map_pirq irq=%d (error=%d)",
>> @@ -2257,7 +2261,8 @@ skip_bar:
>>               goto skip_legacy_irq;
>>           }
>>   
>> -        if ((fscanf(f, "%u", &irq) == 1) && irq) {
>> +        if ((fscanf(f, "%u", &irq) == 1) &&
>> +            irq > 0 && irq < PCI_IRQ_LINE_LIMIT) {
>>               rc = xc_physdev_unmap_pirq(ctx->xch, domid, irq);
>>               if (rc < 0) {
>>                   /*
> 
> This is doing things in sensible order: unmap, then remove permissions.
> The map side though adds permissions only after mapping. That's kind of
> necessary because the value to pass into xc_domain_irq_permission() is
> an output of xc_physdev_map_pirq(). Yet then the latter should have
> failed for lack of permissions, unless permissions were granted another
> way? In which case what's the point of granting permissions here?

Permissions are checked later when binding - XEN_DOMCTL_bind_pt_irq or 
EVTCHNOP_bind_pirq.  But I agree the ordering is a unusual.

Regards,
Jason


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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v1 03/14] xen/riscv: introduce ioremap()
Date: Tue,  8 Apr 2025 17:57:07 +0200
Message-ID: <6d91eeabe2735de93bfcf2a2420e2059a8f35e52.1744126720.git.oleksii.kurochko@gmail.com>
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Based on RISC-V unpriviliged spec ( Version 20240411 ):
```
For implementations that conform to the RISC-V Unix Platform Specification,
I/O devices and DMA operations are required to access memory coherently and
via strongly ordered I/O channels. Therefore, accesses to regular main memory
regions that are concurrently accessed by external devices can also use the
standard synchronization mechanisms. Implementations that do not conform
to the Unix Platform Specification and/or in which devices do not access
memory coherently will need to use mechanisms
(which are currently platform-specific or device-specific) to enforce
coherency.

I/O regions in the address space should be considered non-cacheable
regions in the PMAs for those regions. Such regions can be considered coherent
by the PMA if they are not cached by any agent.
```
and [1]:
```
The current riscv linux implementation requires SOC system to support
memory coherence between all I/O devices and CPUs. But some SOC systems
cannot maintain the coherence and they need support cache clean/invalid
operations to synchronize data.

Current implementation is no problem with SiFive FU540, because FU540
keeps all IO devices and DMA master devices coherence with CPU. But to a
traditional SOC vendor, it may already have a stable non-coherency SOC
system, the need is simply to replace the CPU with RV CPU and rebuild
the whole system with IO-coherency is very expensive.
```

and the fact that all known ( to me ) CPUs that support the H-extension
and that ones is going to be supported by Xen have memory coherency
between all I/O devices and CPUs, so it is currently safe to use the
PAGE_HYPERVISOR attribute.
However, in cases where a platform does not support memory coherency, it
should support CMO extensions and Svpbmt. In this scenario, updates to
ioremap will be necessary.
For now, a compilation error will be generated to ensure that the need to
update ioremap() is not overlooked.

[1] https://patchwork.kernel.org/project/linux-riscv/patch/1555947870-23014-1-git-send-email-guoren@kernel.org/

Signed-off-by: Oleksii Kurochko 
---
 xen/arch/riscv/Kconfig | 12 ++++++++++++
 xen/arch/riscv/pt.c    | 19 +++++++++++++++++++
 2 files changed, 31 insertions(+)

diff --git a/xen/arch/riscv/Kconfig b/xen/arch/riscv/Kconfig
index d882e0a059..27086cca9c 100644
--- a/xen/arch/riscv/Kconfig
+++ b/xen/arch/riscv/Kconfig
@@ -15,6 +15,18 @@ config ARCH_DEFCONFIG
 	string
 	default "arch/riscv/configs/tiny64_defconfig"
 
+config HAS_SVPBMT
+	bool
+	help
+	  This config enables usage of Svpbmt ISA-extension ( Supervisor-mode:
+	  page-based memory types).
+
+	  The memory type for a page contains a combination of attributes
+	  that indicate the cacheability, idempotency, and ordering
+	  properties for access to that page.
+
+	  The Svpbmt extension is only available on 64-bit cpus.
+
 menu "Architecture Features"
 
 source "arch/Kconfig"
diff --git a/xen/arch/riscv/pt.c b/xen/arch/riscv/pt.c
index 857619d48d..e2f49e2f97 100644
--- a/xen/arch/riscv/pt.c
+++ b/xen/arch/riscv/pt.c
@@ -7,6 +7,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -548,3 +549,21 @@ void clear_fixmap(unsigned int map)
                               FIXMAP_ADDR(map) + PAGE_SIZE) != 0 )
         BUG();
 }
+
+void *ioremap(paddr_t pa, size_t len)
+{
+    mfn_t mfn = _mfn(PFN_DOWN(pa));
+    unsigned int offs = pa & (PAGE_SIZE - 1);
+    unsigned int nr = PFN_UP(offs + len);
+
+#ifdef CONFIG_HAS_SVPBMT
+    #error "an introduction of PAGE_HYPERVISOR_IOREMAP is needed for __vmap()"
+#endif
+
+    void *ptr = __vmap(&mfn, nr, 1, 1, PAGE_HYPERVISOR, VMAP_DEFAULT);
+
+    if ( !ptr )
+        return NULL;
+
+    return ptr + offs;
+}
-- 
2.49.0



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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v1 01/14] xen/riscv: implement get_s_time()
Date: Tue,  8 Apr 2025 17:57:05 +0200
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Also tick_to_ns() is implemeted as it is used in get_s_time().

Signed-off-by: Oleksii Kurochko 
---
 xen/arch/riscv/include/asm/time.h | 6 ++++++
 xen/arch/riscv/stubs.c            | 5 -----
 xen/arch/riscv/time.c             | 7 +++++++
 3 files changed, 13 insertions(+), 5 deletions(-)

diff --git a/xen/arch/riscv/include/asm/time.h b/xen/arch/riscv/include/asm/time.h
index e8d9ffec57..0f6aa99ab1 100644
--- a/xen/arch/riscv/include/asm/time.h
+++ b/xen/arch/riscv/include/asm/time.h
@@ -3,6 +3,7 @@
 #define ASM__RISCV__TIME_H
 
 #include 
+#include 
 #include 
 #include 
 
@@ -23,6 +24,11 @@ static inline cycles_t get_cycles(void)
     return csr_read(CSR_TIME);
 }
 
+static inline s_time_t ticks_to_ns(uint64_t ticks)
+{
+    return muldiv64(ticks, SECONDS(1), 1000 * cpu_khz);
+}
+
 void preinit_xen_time(void);
 
 #endif /* ASM__RISCV__TIME_H */
diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c
index a1d64534cd..83416d3350 100644
--- a/xen/arch/riscv/stubs.c
+++ b/xen/arch/riscv/stubs.c
@@ -27,11 +27,6 @@ nodemask_t __read_mostly node_online_map = { { [0] = 1UL } };
 
 /* time.c */
 
-s_time_t get_s_time(void)
-{
-    BUG_ON("unimplemented");
-}
-
 int reprogram_timer(s_time_t timeout)
 {
     BUG_ON("unimplemented");
diff --git a/xen/arch/riscv/time.c b/xen/arch/riscv/time.c
index 905bb13eb4..81e06781f8 100644
--- a/xen/arch/riscv/time.c
+++ b/xen/arch/riscv/time.c
@@ -4,10 +4,17 @@
 #include 
 #include 
 #include 
+#include 
 
 unsigned long __ro_after_init cpu_khz; /* CPU clock frequency in kHz. */
 uint64_t __ro_after_init boot_clock_cycles;
 
+s_time_t get_s_time(void)
+{
+    uint64_t ticks = get_cycles() - boot_clock_cycles;
+    return ticks_to_ns(ticks);
+}
+
 /* Set up the timer on the boot CPU (early init function) */
 static void __init preinit_dt_xen_time(void)
 {
-- 
2.49.0



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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v1 02/14] xen/riscv: introduce smp_clear_cpu_maps()
Date: Tue,  8 Apr 2025 17:57:06 +0200
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Initialize cpu_{possible, online, present}_map by using smp_clear_cpu_maps().

Drop DEFINE_PER_CPU(unsigned int, cpu_id) from stubs.c as this variable isn't
expected to be used in RISC-V at all.

Move declaration of cpu_{possible,online,present}_map from stubs.c to smpboot.c
as now smpboot.c is now introduced.
Other defintions keep in stubs.c as they are not initialized and not needed, at
the moment.

Signed-off-by: Oleksii Kurochko 
---
 xen/arch/riscv/Makefile          |  1 +
 xen/arch/riscv/include/asm/smp.h |  2 ++
 xen/arch/riscv/setup.c           |  2 ++
 xen/arch/riscv/smpboot.c         | 15 +++++++++++++++
 xen/arch/riscv/stubs.c           |  6 ------
 5 files changed, 20 insertions(+), 6 deletions(-)
 create mode 100644 xen/arch/riscv/smpboot.c

diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile
index 0c6c4a38a3..f551bf32a2 100644
--- a/xen/arch/riscv/Makefile
+++ b/xen/arch/riscv/Makefile
@@ -10,6 +10,7 @@ obj-y += sbi.o
 obj-y += setup.o
 obj-y += shutdown.o
 obj-y += smp.o
+obj-y += smpboot.o
 obj-y += stubs.o
 obj-y += time.o
 obj-y += traps.o
diff --git a/xen/arch/riscv/include/asm/smp.h b/xen/arch/riscv/include/asm/smp.h
index 5e170b57b3..188c033718 100644
--- a/xen/arch/riscv/include/asm/smp.h
+++ b/xen/arch/riscv/include/asm/smp.h
@@ -26,6 +26,8 @@ static inline void set_cpuid_to_hartid(unsigned long cpuid,
 
 void setup_tp(unsigned int cpuid);
 
+void smp_clear_cpu_maps(void);
+
 #endif
 
 /*
diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c
index 4e416f6e44..7f68f3f5b7 100644
--- a/xen/arch/riscv/setup.c
+++ b/xen/arch/riscv/setup.c
@@ -72,6 +72,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id,
 
     remove_identity_mapping();
 
+    smp_clear_cpu_maps();
+
     set_processor_id(0);
 
     set_cpuid_to_hartid(0, bootcpu_id);
diff --git a/xen/arch/riscv/smpboot.c b/xen/arch/riscv/smpboot.c
new file mode 100644
index 0000000000..0f4dcc28e1
--- /dev/null
+++ b/xen/arch/riscv/smpboot.c
@@ -0,0 +1,15 @@
+#include 
+#include 
+
+cpumask_t cpu_online_map;
+cpumask_t cpu_present_map;
+cpumask_t cpu_possible_map;
+
+void __init smp_clear_cpu_maps(void)
+{
+    cpumask_clear(&cpu_possible_map);
+    cpumask_clear(&cpu_online_map);
+    cpumask_set_cpu(0, &cpu_possible_map);
+    cpumask_set_cpu(0, &cpu_online_map);
+    cpumask_copy(&cpu_present_map, &cpu_possible_map);
+}
diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c
index 83416d3350..fdcf91054e 100644
--- a/xen/arch/riscv/stubs.c
+++ b/xen/arch/riscv/stubs.c
@@ -11,12 +11,6 @@
 
 /* smpboot.c */
 
-cpumask_t cpu_online_map;
-cpumask_t cpu_present_map;
-cpumask_t cpu_possible_map;
-
-/* ID of the PCPU we're running on */
-DEFINE_PER_CPU(unsigned int, cpu_id);
 /* XXX these seem awfully x86ish... */
 /* representing HT siblings of each logical CPU */
 DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_sibling_mask);
-- 
2.49.0



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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v1 00/14] riscv: introduce basic UART support and interrupts for hypervisor mode
Date: Tue,  8 Apr 2025 17:57:04 +0200
Message-ID: 
X-Mailer: git-send-email 2.49.0
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The patch series introduces basic UART support (in interrupt mode) and support of
interrupts for hypervisor mode.

To implement this the following has been added:
- APLIC and IMISC initialization.
- Introduce of intc_hw_operations abstraction.
- Introduce some APLIC and IMSIC operations.
- Introduce init_IRQ(), platform_get_irq() and setup_irq() functions.
- Update do_trap() handler to handle IRQ_S_EXT.
- Introduce some other functions such as: get_s_time(), smp_clear_cpu_maps(),
  ioremap().
- Enable UART. 

Oleksii Kurochko (14):
  xen/riscv: implement get_s_time()
  xen/riscv: introduce smp_clear_cpu_maps()
  xen/riscv: introduce ioremap()
  xen/riscv: introduce init_IRQ()
  xen/riscv: introduce platform_get_irq()
  xen/riscv: riscv_of_processor_hartid() implementation
  xen/riscv: Introduce intc_hw_operations abstraction
  xen/riscv: imsic_init() implementation
  xen/riscv: aplic_init() implementation
  xen/riscv: implementation of aplic and imsic operations
  xen/riscv: add external interrupt handling for hypervisor mode
  xen/riscv: implement setup_irq()
  xen/riscv: initialize interrupt controller
  xen/riscv: add basic UART support

 xen/arch/riscv/Kconfig             |  13 +
 xen/arch/riscv/Makefile            |   3 +
 xen/arch/riscv/aplic.c             | 302 +++++++++++++++++++++++
 xen/arch/riscv/imsic.c             | 374 +++++++++++++++++++++++++++++
 xen/arch/riscv/include/asm/aplic.h |  89 +++++++
 xen/arch/riscv/include/asm/imsic.h |  88 +++++++
 xen/arch/riscv/include/asm/intc.h  |  31 +++
 xen/arch/riscv/include/asm/irq.h   |  37 ++-
 xen/arch/riscv/include/asm/smp.h   |   5 +
 xen/arch/riscv/include/asm/time.h  |   6 +
 xen/arch/riscv/intc.c              |  58 +++++
 xen/arch/riscv/irq.c               | 223 +++++++++++++++++
 xen/arch/riscv/pt.c                |  19 ++
 xen/arch/riscv/setup.c             |  23 ++
 xen/arch/riscv/smpboot.c           |  83 +++++++
 xen/arch/riscv/stubs.c             |  16 --
 xen/arch/riscv/time.c              |   7 +
 xen/arch/riscv/traps.c             |  18 ++
 xen/drivers/char/Kconfig           |   1 -
 19 files changed, 1378 insertions(+), 18 deletions(-)
 create mode 100644 xen/arch/riscv/imsic.c
 create mode 100644 xen/arch/riscv/include/asm/aplic.h
 create mode 100644 xen/arch/riscv/include/asm/imsic.h
 create mode 100644 xen/arch/riscv/irq.c
 create mode 100644 xen/arch/riscv/smpboot.c

-- 
2.49.0



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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v1 04/14] xen/riscv: introduce init_IRQ()
Date: Tue,  8 Apr 2025 17:57:08 +0200
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Implement init_IRQ() to initalize various IRQs.

Currently, this function initializes the irq_desc[] array,
which stores IRQ descriptors containing various information
about each IRQ, such as the type of hardware handling, whether
the IRQ is disabled, etc.
The initialization is basic at this point and includes setting
IRQ_TYPE_INVALID as the IRQ type, assigning the IRQ number ( which
is just a consequent index of irq_desc[] array ) to
desc->irq, and setting desc->action to NULL.

Additionally, the function init_irq_data() is introduced to
initialize the IRQ descriptors for all IRQs in the system.

Also, define IRQ_TYPE_* which are the same as the existing device
tree definitions for convenience.

Signed-off-by: Oleksii Kurochko 
---
 xen/arch/riscv/Makefile          |  1 +
 xen/arch/riscv/include/asm/irq.h | 24 +++++++++++++++++
 xen/arch/riscv/irq.c             | 44 ++++++++++++++++++++++++++++++++
 xen/arch/riscv/setup.c           |  3 +++
 xen/arch/riscv/stubs.c           |  5 ----
 5 files changed, 72 insertions(+), 5 deletions(-)
 create mode 100644 xen/arch/riscv/irq.c

diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile
index f551bf32a2..457e8e88a4 100644
--- a/xen/arch/riscv/Makefile
+++ b/xen/arch/riscv/Makefile
@@ -3,6 +3,7 @@ obj-y += cpufeature.o
 obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
 obj-y += entry.o
 obj-y += intc.o
+obj-y += irq.o
 obj-y += mm.o
 obj-y += pt.o
 obj-$(CONFIG_RISCV_64) += riscv64/
diff --git a/xen/arch/riscv/include/asm/irq.h b/xen/arch/riscv/include/asm/irq.h
index 2a48da2651..8f936b7d01 100644
--- a/xen/arch/riscv/include/asm/irq.h
+++ b/xen/arch/riscv/include/asm/irq.h
@@ -3,6 +3,28 @@
 #define ASM__RISCV__IRQ_H
 
 #include 
+#include 
+
+#define NR_IRQS 1024
+
+/*
+ * TODO: Should IRQ_TYPE_* be moved to xen/irq.h and wrapped into
+ * #ifdef CONFIG_HAS_DEVICE_TREE?
+ */
+/*
+ * These defines correspond to the Xen internal representation of the
+ * IRQ types. We choose to make them the same as the existing device
+ * tree definitions for convenience.
+ */
+#define IRQ_TYPE_NONE           DT_IRQ_TYPE_NONE
+#define IRQ_TYPE_EDGE_RISING    DT_IRQ_TYPE_EDGE_RISING
+#define IRQ_TYPE_EDGE_FALLING   DT_IRQ_TYPE_EDGE_FALLING
+#define IRQ_TYPE_EDGE_BOTH      DT_IRQ_TYPE_EDGE_BOTH
+#define IRQ_TYPE_LEVEL_HIGH     DT_IRQ_TYPE_LEVEL_HIGH
+#define IRQ_TYPE_LEVEL_LOW      DT_IRQ_TYPE_LEVEL_LOW
+#define IRQ_TYPE_LEVEL_MASK     DT_IRQ_TYPE_LEVEL_MASK
+#define IRQ_TYPE_SENSE_MASK     DT_IRQ_TYPE_SENSE_MASK
+#define IRQ_TYPE_INVALID        DT_IRQ_TYPE_INVALID
 
 /* TODO */
 #define nr_irqs 0U
@@ -25,6 +47,8 @@ static inline void arch_move_irqs(struct vcpu *v)
     BUG_ON("unimplemented");
 }
 
+void init_IRQ(void);
+
 #endif /* ASM__RISCV__IRQ_H */
 
 /*
diff --git a/xen/arch/riscv/irq.c b/xen/arch/riscv/irq.c
new file mode 100644
index 0000000000..99b8f2095e
--- /dev/null
+++ b/xen/arch/riscv/irq.c
@@ -0,0 +1,44 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+/*
+ * RISC-V Trap handlers
+ *
+ * Copyright (c) 2024 Vates
+ */
+
+#include 
+#include 
+#include 
+
+static irq_desc_t irq_desc[NR_IRQS];
+
+int arch_init_one_irq_desc(struct irq_desc *desc)
+{
+    desc->arch.type = IRQ_TYPE_INVALID;
+    return 0;
+}
+
+static int __init init_irq_data(void)
+{
+    int irq;
+
+    for ( irq = 0; irq < NR_IRQS; irq++ )
+    {
+        struct irq_desc *desc = irq_to_desc(irq);
+        int rc = init_one_irq_desc(desc);
+
+        if ( rc )
+            return rc;
+
+        desc->irq = irq;
+        desc->action  = NULL;
+    }
+
+    return 0;
+}
+
+void __init init_IRQ(void)
+{
+    if ( init_irq_data() < 0 )
+        panic("initialization of IRQ data failed\n");
+}
diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c
index 7f68f3f5b7..a3189697da 100644
--- a/xen/arch/riscv/setup.c
+++ b/xen/arch/riscv/setup.c
@@ -6,6 +6,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -127,6 +128,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id,
         panic("Booting using ACPI isn't supported\n");
     }
 
+    init_IRQ();
+
     riscv_fill_hwcap();
 
     preinit_xen_time();
diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c
index fdcf91054e..e396b67cd3 100644
--- a/xen/arch/riscv/stubs.c
+++ b/xen/arch/riscv/stubs.c
@@ -107,11 +107,6 @@ void irq_ack_none(struct irq_desc *desc)
     BUG_ON("unimplemented");
 }
 
-int arch_init_one_irq_desc(struct irq_desc *desc)
-{
-    BUG_ON("unimplemented");
-}
-
 void smp_send_state_dump(unsigned int cpu)
 {
     BUG_ON("unimplemented");
-- 
2.49.0



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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Romain Caritey 
Subject: [PATCH v1 05/14] xen/riscv: introduce platform_get_irq()
Date: Tue,  8 Apr 2025 17:57:09 +0200
Message-ID: <6c6e7482cc3b0332f5724c80bf16931fe2d793ae.1744126720.git.oleksii.kurochko@gmail.com>
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platform_get_irq() recieves information about device's irq ( type
and irq number ) from device tree node and using this information
update irq descriptor in irq_desc[] array.

Introduce dt_irq_xlate and initialize with aplic_irq_xlate() as
it is used by dt_device_get_irq() which is called by
platform_get_irq().

Co-developed-by: Romain Caritey 
Signed-off-by: Oleksii Kurochko 
---
 xen/arch/riscv/aplic.c           | 19 +++++++++++++++
 xen/arch/riscv/include/asm/irq.h |  3 +++
 xen/arch/riscv/irq.c             | 41 ++++++++++++++++++++++++++++++++
 3 files changed, 63 insertions(+)

diff --git a/xen/arch/riscv/aplic.c b/xen/arch/riscv/aplic.c
index caba8f8993..6dc040af6f 100644
--- a/xen/arch/riscv/aplic.c
+++ b/xen/arch/riscv/aplic.c
@@ -11,6 +11,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -21,6 +22,22 @@ static struct intc_info __ro_after_init aplic_info = {
     .hw_version = INTC_APLIC,
 };
 
+static int aplic_irq_xlate(const uint32_t *intspec, unsigned int intsize,
+                           unsigned int *out_hwirq,
+                           unsigned int *out_type)
+{
+    if ( intsize < 2 )
+        return -EINVAL;
+
+    /* Mapping 1:1 */
+    *out_hwirq = intspec[0];
+
+    if ( out_type )
+        *out_type = intspec[1] & IRQ_TYPE_SENSE_MASK;
+
+    return 0;
+}
+
 static int __init aplic_preinit(struct dt_device_node *node, const void *dat)
 {
     if ( aplic_info.node )
@@ -35,6 +52,8 @@ static int __init aplic_preinit(struct dt_device_node *node, const void *dat)
 
     aplic_info.node = node;
 
+    dt_irq_xlate = aplic_irq_xlate;
+
     return 0;
 }
 
diff --git a/xen/arch/riscv/include/asm/irq.h b/xen/arch/riscv/include/asm/irq.h
index 8f936b7d01..ff1c95e0be 100644
--- a/xen/arch/riscv/include/asm/irq.h
+++ b/xen/arch/riscv/include/asm/irq.h
@@ -47,6 +47,9 @@ static inline void arch_move_irqs(struct vcpu *v)
     BUG_ON("unimplemented");
 }
 
+struct dt_device_node;
+int platform_get_irq(const struct dt_device_node *device, int index);
+
 void init_IRQ(void);
 
 #endif /* ASM__RISCV__IRQ_H */
diff --git a/xen/arch/riscv/irq.c b/xen/arch/riscv/irq.c
index 99b8f2095e..c332e000c4 100644
--- a/xen/arch/riscv/irq.c
+++ b/xen/arch/riscv/irq.c
@@ -7,11 +7,52 @@
  */
 
 #include 
+#include 
+#include 
 #include 
 #include 
 
 static irq_desc_t irq_desc[NR_IRQS];
 
+static bool irq_validate_new_type(unsigned int curr, unsigned int new)
+{
+    return (curr == IRQ_TYPE_INVALID || curr == new );
+}
+
+static int irq_set_type(unsigned int irq, unsigned int type)
+{
+    unsigned long flags;
+    struct irq_desc *desc = irq_to_desc(irq);
+    int ret = -EBUSY;
+
+    spin_lock_irqsave(&desc->lock, flags);
+
+    if ( !irq_validate_new_type(desc->arch.type, type) )
+        goto err;
+
+    desc->arch.type = type;
+
+    ret = 0;
+
+err:
+    spin_unlock_irqrestore(&desc->lock, flags);
+
+    return ret;
+}
+
+int platform_get_irq(const struct dt_device_node *device, int index)
+{
+    struct dt_irq dt_irq;
+
+    if ( dt_device_get_irq(device, index, &dt_irq) )
+        return -1;
+
+    if ( irq_set_type(dt_irq.irq, dt_irq.type) )
+        return -1;
+
+    return dt_irq.irq;
+}
+
 int arch_init_one_irq_desc(struct irq_desc *desc)
 {
     desc->arch.type = IRQ_TYPE_INVALID;
-- 
2.49.0



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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v1 06/14] xen/riscv: riscv_of_processor_hartid() implementation
Date: Tue,  8 Apr 2025 17:57:10 +0200
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Implements riscv_of_processor_hartid() to get the hart ID of the given
device tree node and do some checks if CPU is available and given device
tree node has proper riscv,isa property.

As a helper function of_get_cpu_hwid() is introduced to deal specifically
with reg propery of a CPU device node.

Signed-off-by: Oleksii Kurochko 
---
 xen/arch/riscv/include/asm/smp.h |  3 ++
 xen/arch/riscv/smpboot.c         | 68 ++++++++++++++++++++++++++++++++
 2 files changed, 71 insertions(+)

diff --git a/xen/arch/riscv/include/asm/smp.h b/xen/arch/riscv/include/asm/smp.h
index 188c033718..9b68f1e27a 100644
--- a/xen/arch/riscv/include/asm/smp.h
+++ b/xen/arch/riscv/include/asm/smp.h
@@ -26,6 +26,9 @@ static inline void set_cpuid_to_hartid(unsigned long cpuid,
 
 void setup_tp(unsigned int cpuid);
 
+struct dt_device_node;
+int riscv_of_processor_hartid(struct dt_device_node *node, unsigned long *hart);
+
 void smp_clear_cpu_maps(void);
 
 #endif
diff --git a/xen/arch/riscv/smpboot.c b/xen/arch/riscv/smpboot.c
index 0f4dcc28e1..3193639f00 100644
--- a/xen/arch/riscv/smpboot.c
+++ b/xen/arch/riscv/smpboot.c
@@ -1,5 +1,8 @@
 #include 
+#include 
+#include 
 #include 
+#include 
 
 cpumask_t cpu_online_map;
 cpumask_t cpu_present_map;
@@ -13,3 +16,68 @@ void __init smp_clear_cpu_maps(void)
     cpumask_set_cpu(0, &cpu_online_map);
     cpumask_copy(&cpu_present_map, &cpu_possible_map);
 }
+
+/**
+ * of_get_cpu_hwid - Get the hardware ID from a CPU device node
+ *
+ * @cpun: CPU number(logical index) for which device node is required
+ * @thread: The local thread number to get the hardware ID for.
+ *
+ * Return: The hardware ID for the CPU node or ~0ULL if not found.
+ */
+static uint64_t of_get_cpu_hwid(struct dt_device_node *cpun, unsigned int thread)
+{
+    const __be32 *cell;
+    int ac;
+    uint32_t len;
+
+    ac = dt_n_addr_cells(cpun);
+    cell = dt_get_property(cpun, "reg", &len);
+    if ( !cell || !ac || ((sizeof(*cell) * ac * (thread + 1)) > len) )
+        return ~0ULL;
+
+    cell += ac * thread;
+    return dt_read_number(cell, ac);
+}
+
+/*
+ * Returns the hart ID of the given device tree node, or -ENODEV if the node
+ * isn't an enabled and valid RISC-V hart node.
+ */
+int riscv_of_processor_hartid(struct dt_device_node *node, unsigned long *hart)
+{
+    const char *isa;
+
+    if ( !dt_device_is_compatible(node, "riscv") )
+    {
+        printk("Found incompatible CPU\n");
+        return -ENODEV;
+    }
+
+    *hart = (unsigned long) of_get_cpu_hwid(node, 0);
+    if ( *hart == ~0UL )
+    {
+        printk("Found CPU without hart ID\n");
+        return -ENODEV;
+    }
+
+    if ( !dt_device_is_available(node))
+    {
+        printk("CPU with hartid=%lu is not available\n", *hart);
+        return -ENODEV;
+    }
+
+    if ( dt_property_read_string(node, "riscv,isa", &isa) )
+    {
+        printk("CPU with hartid=%lu has no \"riscv,isa\" property\n", *hart);
+        return -ENODEV;
+    }
+
+    if ( isa[0] != 'r' || isa[1] != 'v' )
+    {
+        printk("CPU with hartid=%lu has an invalid ISA of \"%s\"\n", *hart, isa);
+        return -ENODEV;
+    }
+
+    return 0;
+}
-- 
2.49.0



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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Romain Caritey 
Subject: [PATCH v1 07/14] wqriscv/intc: Introduce intc_hw_operations abstraction
Date: Tue,  8 Apr 2025 17:57:11 +0200
Message-ID: <7c1e0a9c36e92e993ae10d74b3cf816669282d6f.1744126665.git.oleksii.kurochko@gmail.com>
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Introduce the `intc_hw_operations` structure to encapsulate interrupt
controller-specific data and operations. This structure includes:
- A pointer to interrupt controller information (`intc_info`)
- Callbacks to initialize the controller and set IRQ type/priority
- A reference to an interupt controller descriptor (`host_irq_type`)

Also introduce generic helper functions:
- `intc_init()`: Initializes the interrupt controller
- `register_intc_ops()`: Registers the `intc_hw_operations` implementation
- `intc_route_irq_to_xen()`: Configures IRQ routing to Xen, setting handler,
  type, and priority

Most of these functions act as thin wrappers around the corresponding
callbacks in `intc_hw_operations`.

This abstraction lays the groundwork for supporting multiple interrupt
controller types (e.g., PLIC, APLIC) in extensible way.

This patch is based on the changes from [1].

[1] https://gitlab.com/xen-project/people/olkur/xen/-/commit/7cfb4bd4748ca268142497ac5c327d2766fb342d

Co-developed-by: Romain Caritey 
Signed-off-by: Oleksii Kurochko 
---
 xen/arch/riscv/include/asm/intc.h | 23 ++++++++++++++
 xen/arch/riscv/intc.c             | 51 +++++++++++++++++++++++++++++++
 2 files changed, 74 insertions(+)

diff --git a/xen/arch/riscv/include/asm/intc.h b/xen/arch/riscv/include/asm/intc.h
index 52ba196d87..0d498b10f4 100644
--- a/xen/arch/riscv/include/asm/intc.h
+++ b/xen/arch/riscv/include/asm/intc.h
@@ -17,6 +17,29 @@ struct intc_info {
     const struct dt_device_node *node;
 };
 
+struct intc_hw_operations {
+    /* Hold intc hw information */
+    const struct intc_info *info;
+    /* Initialize the intc and the boot CPU */
+    int (*init)(void);
+
+    /* hw_irq_controller to enable/disable/eoi host irq */
+    hw_irq_controller *host_irq_type;
+
+    /* Set IRQ type */
+    void (*set_irq_type)(struct irq_desc *desc, unsigned int type);
+    /* Set IRQ priority */
+    void (*set_irq_priority)(struct irq_desc *desc, unsigned int priority);
+
+};
+
 void intc_preinit(void);
 
+void intc_init(void);
+
+void register_intc_ops(const struct intc_hw_operations *ops);
+
+struct irq_desc;
+void intc_route_irq_to_xen(struct irq_desc *desc, unsigned int priority);
+
 #endif /* ASM__RISCV__INTERRUPT_CONTOLLER_H */
diff --git a/xen/arch/riscv/intc.c b/xen/arch/riscv/intc.c
index 4061a3c457..8274897d8c 100644
--- a/xen/arch/riscv/intc.c
+++ b/xen/arch/riscv/intc.c
@@ -1,9 +1,21 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include 
+#include 
 #include 
 #include 
+#include 
 #include 
+#include 
+
+#include 
+
+static const struct intc_hw_operations *intc_hw_ops;
+
+void register_intc_ops(const struct intc_hw_operations *ops)
+{
+    intc_hw_ops = ops;
+}
 
 void __init intc_preinit(void)
 {
@@ -12,3 +24,42 @@ void __init intc_preinit(void)
     else
         panic("ACPI interrupt controller preinit() isn't implemented\n");
 }
+
+void __init intc_init(void)
+{
+    ASSERT(intc_hw_ops);
+
+    if ( intc_hw_ops->init() )
+        panic("Failed to initialize the interrupt controller drivers\n");
+}
+
+/* desc->irq needs to be disabled before calling this function */
+static void intc_set_irq_type(struct irq_desc *desc, unsigned int type)
+{
+    ASSERT(test_bit(_IRQ_DISABLED, &desc->status));
+    ASSERT(spin_is_locked(&desc->lock));
+    ASSERT(type != IRQ_TYPE_INVALID);
+    ASSERT(intc_hw_ops && intc_hw_ops->set_irq_type);
+
+    intc_hw_ops->set_irq_type(desc, type);
+}
+
+static void intc_set_irq_priority(struct irq_desc *desc, unsigned int priority)
+{
+    ASSERT(intc_hw_ops && intc_hw_ops->set_irq_priority);
+
+    intc_hw_ops->set_irq_priority(desc, priority);
+}
+
+void intc_route_irq_to_xen(struct irq_desc *desc, unsigned int priority)
+{
+    ASSERT(test_bit(_IRQ_DISABLED, &desc->status));
+    ASSERT(spin_is_locked(&desc->lock));
+    /* Can't route interrupts that don't exist */
+    ASSERT(intc_hw_ops && desc->irq < intc_hw_ops->info->nr_irqs);
+
+    desc->handler = intc_hw_ops->host_irq_type;
+
+    intc_set_irq_type(desc, desc->arch.type);
+    intc_set_irq_priority(desc, priority);
+}
-- 
2.49.0



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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Romain Caritey 
Subject: [PATCH v1 07/14] xen/riscv: Introduce intc_hw_operations abstraction
Date: Tue,  8 Apr 2025 17:57:12 +0200
Message-ID: <139b37478b4ca7e2ec3a04b73f462197227f57fa.1744126720.git.oleksii.kurochko@gmail.com>
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Introduce the `intc_hw_operations` structure to encapsulate interrupt
controller-specific data and operations. This structure includes:
- A pointer to interrupt controller information (`intc_info`)
- Callbacks to initialize the controller and set IRQ type/priority
- A reference to an interupt controller descriptor (`host_irq_type`)

Also introduce generic helper functions:
- `intc_init()`: Initializes the interrupt controller
- `register_intc_ops()`: Registers the `intc_hw_operations` implementation
- `intc_route_irq_to_xen()`: Configures IRQ routing to Xen, setting handler,
  type, and priority

Most of these functions act as thin wrappers around the corresponding
callbacks in `intc_hw_operations`.

This abstraction lays the groundwork for supporting multiple interrupt
controller types (e.g., PLIC, APLIC) in extensible way.

This patch is based on the changes from [1].

[1] https://gitlab.com/xen-project/people/olkur/xen/-/commit/7cfb4bd4748ca268142497ac5c327d2766fb342d

Co-developed-by: Romain Caritey 
Signed-off-by: Oleksii Kurochko 
---
 xen/arch/riscv/include/asm/intc.h | 23 ++++++++++++++
 xen/arch/riscv/intc.c             | 51 +++++++++++++++++++++++++++++++
 2 files changed, 74 insertions(+)

diff --git a/xen/arch/riscv/include/asm/intc.h b/xen/arch/riscv/include/asm/intc.h
index 52ba196d87..0d498b10f4 100644
--- a/xen/arch/riscv/include/asm/intc.h
+++ b/xen/arch/riscv/include/asm/intc.h
@@ -17,6 +17,29 @@ struct intc_info {
     const struct dt_device_node *node;
 };
 
+struct intc_hw_operations {
+    /* Hold intc hw information */
+    const struct intc_info *info;
+    /* Initialize the intc and the boot CPU */
+    int (*init)(void);
+
+    /* hw_irq_controller to enable/disable/eoi host irq */
+    hw_irq_controller *host_irq_type;
+
+    /* Set IRQ type */
+    void (*set_irq_type)(struct irq_desc *desc, unsigned int type);
+    /* Set IRQ priority */
+    void (*set_irq_priority)(struct irq_desc *desc, unsigned int priority);
+
+};
+
 void intc_preinit(void);
 
+void intc_init(void);
+
+void register_intc_ops(const struct intc_hw_operations *ops);
+
+struct irq_desc;
+void intc_route_irq_to_xen(struct irq_desc *desc, unsigned int priority);
+
 #endif /* ASM__RISCV__INTERRUPT_CONTOLLER_H */
diff --git a/xen/arch/riscv/intc.c b/xen/arch/riscv/intc.c
index 4061a3c457..8274897d8c 100644
--- a/xen/arch/riscv/intc.c
+++ b/xen/arch/riscv/intc.c
@@ -1,9 +1,21 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include 
+#include 
 #include 
 #include 
+#include 
 #include 
+#include 
+
+#include 
+
+static const struct intc_hw_operations *intc_hw_ops;
+
+void register_intc_ops(const struct intc_hw_operations *ops)
+{
+    intc_hw_ops = ops;
+}
 
 void __init intc_preinit(void)
 {
@@ -12,3 +24,42 @@ void __init intc_preinit(void)
     else
         panic("ACPI interrupt controller preinit() isn't implemented\n");
 }
+
+void __init intc_init(void)
+{
+    ASSERT(intc_hw_ops);
+
+    if ( intc_hw_ops->init() )
+        panic("Failed to initialize the interrupt controller drivers\n");
+}
+
+/* desc->irq needs to be disabled before calling this function */
+static void intc_set_irq_type(struct irq_desc *desc, unsigned int type)
+{
+    ASSERT(test_bit(_IRQ_DISABLED, &desc->status));
+    ASSERT(spin_is_locked(&desc->lock));
+    ASSERT(type != IRQ_TYPE_INVALID);
+    ASSERT(intc_hw_ops && intc_hw_ops->set_irq_type);
+
+    intc_hw_ops->set_irq_type(desc, type);
+}
+
+static void intc_set_irq_priority(struct irq_desc *desc, unsigned int priority)
+{
+    ASSERT(intc_hw_ops && intc_hw_ops->set_irq_priority);
+
+    intc_hw_ops->set_irq_priority(desc, priority);
+}
+
+void intc_route_irq_to_xen(struct irq_desc *desc, unsigned int priority)
+{
+    ASSERT(test_bit(_IRQ_DISABLED, &desc->status));
+    ASSERT(spin_is_locked(&desc->lock));
+    /* Can't route interrupts that don't exist */
+    ASSERT(intc_hw_ops && desc->irq < intc_hw_ops->info->nr_irqs);
+
+    desc->handler = intc_hw_ops->host_irq_type;
+
+    intc_set_irq_type(desc, desc->arch.type);
+    intc_set_irq_priority(desc, priority);
+}
-- 
2.49.0



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        Tue, 08 Apr 2025 08:57:33 -0700 (PDT)
From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Romain Caritey 
Subject: [PATCH v1 08/14] xen/riscv: imsic_init() implementation
Date: Tue,  8 Apr 2025 17:57:13 +0200
Message-ID: <09e0fcd64f97062441a68102ead520b818150fe9.1744126720.git.oleksii.kurochko@gmail.com>
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imsic_init() is introduced to parse device tree node, which has the following
bindings [2], and based on the parsed information update IMSIC configuration
which is stored in imsic_cfg.

The following helpers are introduces for imsic_init() usage:
  - imsic_parse_node() parses IMSIC node from DTS
  - imsic_get_parent_hartid() returns the hart ( CPU ) ID of the given device
    tree node.

This patch is based on the code from [1].

Since Microchip originally developed imsic.{c,h}, an internal discussion with
them led to the decision to use the MIT license.

[1] https://gitlab.com/xen-project/people/olkur/xen/-/commit/0b1a94f2bc3bb1a81cd26bb75f0bf578f84cb4d4
[2] https://elixir.bootlin.com/linux/v6.12/source/Documentation/devicetree/bindings/interrupt-controller/riscv,imsics.yaml

Co-developed-by: Romain Caritey 
Signed-off-by: Oleksii Kurochko 
---
 xen/arch/riscv/Makefile            |   1 +
 xen/arch/riscv/imsic.c             | 286 +++++++++++++++++++++++++++++
 xen/arch/riscv/include/asm/imsic.h |  66 +++++++
 3 files changed, 353 insertions(+)
 create mode 100644 xen/arch/riscv/imsic.c
 create mode 100644 xen/arch/riscv/include/asm/imsic.h

diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile
index 457e8e88a4..baa499a72d 100644
--- a/xen/arch/riscv/Makefile
+++ b/xen/arch/riscv/Makefile
@@ -2,6 +2,7 @@ obj-y += aplic.o
 obj-y += cpufeature.o
 obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
 obj-y += entry.o
+obj-y += imsic.o
 obj-y += intc.o
 obj-y += irq.o
 obj-y += mm.o
diff --git a/xen/arch/riscv/imsic.c b/xen/arch/riscv/imsic.c
new file mode 100644
index 0000000000..99def9af2d
--- /dev/null
+++ b/xen/arch/riscv/imsic.c
@@ -0,0 +1,286 @@
+/* SPDX-License-Identifier: MIT */
+
+/*
+ * xen/arch/riscv/imsic.c
+ *
+ * RISC-V Incoming MSI Controller support
+ *
+ * (c) 2023 Microchip Technology Inc.
+ * (c) 2024 Vates
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+static struct imsic_config imsic_cfg;
+
+const struct imsic_config *imsic_get_config(void)
+{
+    return &imsic_cfg;
+}
+
+static int __init imsic_get_parent_hartid(struct dt_device_node *node,
+                                          unsigned int index,
+                                          unsigned long *hartid)
+{
+    int res;
+    unsigned long hart;
+    struct dt_phandle_args args;
+
+    /* Try the new-style interrupts-extended first */
+    res = dt_parse_phandle_with_args(node, "interrupts-extended",
+                                     "#interrupt-cells", index, &args);
+    if ( !res )
+    {
+        res = riscv_of_processor_hartid(args.np->parent, &hart);
+        if ( res < 0 )
+            return -EINVAL;
+
+        *hartid = hart;
+    }
+    return res;
+}
+
+
+static int imsic_parse_node(struct dt_device_node *node,
+                     unsigned int *nr_parent_irqs)
+{
+    int rc;
+    unsigned int tmp;
+    paddr_t base_addr;
+
+    /* Find number of parent interrupts */
+    *nr_parent_irqs = dt_number_of_irq(node);
+    if ( !*nr_parent_irqs )
+    {
+        printk(XENLOG_ERR "%s: no parent irqs available\n", node->name);
+        return -ENOENT;
+    }
+
+    /* Find number of guest index bits in MSI address */
+    rc = dt_property_read_u32(node, "riscv,guest-index-bits",
+                              &imsic_cfg.guest_index_bits);
+    if ( !rc )
+        imsic_cfg.guest_index_bits = 0;
+    tmp = BITS_PER_LONG - IMSIC_MMIO_PAGE_SHIFT;
+    if ( tmp < imsic_cfg.guest_index_bits )
+    {
+        printk(XENLOG_ERR "%s: guest index bits too big\n", node->name);
+        return -ENOENT;
+    }
+
+    /* Find number of HART index bits */
+    rc = dt_property_read_u32(node, "riscv,hart-index-bits",
+                              &imsic_cfg.hart_index_bits);
+    if ( !rc )
+    {
+        /* Assume default value */
+        imsic_cfg.hart_index_bits = fls(*nr_parent_irqs);
+        if ( BIT(imsic_cfg.hart_index_bits, UL) < *nr_parent_irqs )
+            imsic_cfg.hart_index_bits++;
+    }
+    tmp = BITS_PER_LONG - IMSIC_MMIO_PAGE_SHIFT -
+          imsic_cfg.guest_index_bits;
+    if ( tmp < imsic_cfg.hart_index_bits )
+    {
+        printk(XENLOG_ERR "%s: HART index bits too big\n", node->name);
+        return -ENOENT;
+    }
+
+    /* Find number of group index bits */
+    rc = dt_property_read_u32(node, "riscv,group-index-bits",
+                              &imsic_cfg.group_index_bits);
+    if ( !rc )
+        imsic_cfg.group_index_bits = 0;
+    tmp = BITS_PER_LONG - IMSIC_MMIO_PAGE_SHIFT -
+          imsic_cfg.guest_index_bits - imsic_cfg.hart_index_bits;
+    if ( tmp < imsic_cfg.group_index_bits )
+    {
+        printk(XENLOG_ERR "%s: group index bits too big\n", node->name);
+        return -ENOENT;
+    }
+
+    /* Find first bit position of group index */
+    tmp = IMSIC_MMIO_PAGE_SHIFT * 2;
+    rc = dt_property_read_u32(node, "riscv,group-index-shift",
+                              &imsic_cfg.group_index_shift);
+    if ( !rc )
+        imsic_cfg.group_index_shift = tmp;
+    if ( imsic_cfg.group_index_shift < tmp )
+    {
+        printk(XENLOG_ERR "%s: group index shift too small\n", node->name);
+        return -ENOENT;
+    }
+    tmp = imsic_cfg.group_index_bits + imsic_cfg.group_index_shift - 1;
+    if ( tmp >= BITS_PER_LONG )
+    {
+        printk(XENLOG_ERR "%s: group index shift too big\n", node->name);
+        return -EINVAL;
+    }
+
+    /* Find number of interrupt identities */
+    rc = dt_property_read_u32(node, "riscv,num-ids", &imsic_cfg.nr_ids);
+    if ( !rc )
+    {
+        printk(XENLOG_ERR "%s: number of interrupt identities not found\n",
+               node->name);
+        return -ENOENT;
+    }
+
+    if ( (imsic_cfg.nr_ids < IMSIC_MIN_ID) ||
+         (imsic_cfg.nr_ids >= IMSIC_MAX_ID) ||
+         ((imsic_cfg.nr_ids & IMSIC_MIN_ID) != IMSIC_MIN_ID) )
+    {
+        printk(XENLOG_ERR "%s: invalid number of interrupt identities\n",
+               node->name);
+        return -EINVAL;
+    }
+
+    /* Compute base address */
+    imsic_cfg.nr_mmios = 0;
+    rc = dt_device_get_address(node, imsic_cfg.nr_mmios, &base_addr, NULL);
+    if (rc)
+    {
+        printk(XENLOG_ERR "%s: first MMIO resource not found\n", node->name);
+        return -EINVAL;
+    }
+
+    imsic_cfg.base_addr = base_addr;
+    imsic_cfg.base_addr &= ~(BIT(imsic_cfg.guest_index_bits +
+                   imsic_cfg.hart_index_bits +
+                   IMSIC_MMIO_PAGE_SHIFT, UL) - 1);
+    imsic_cfg.base_addr &= ~((BIT(imsic_cfg.group_index_bits, UL) - 1) <<
+                   imsic_cfg.group_index_shift);
+
+    /* Find number of MMIO register sets */
+    imsic_cfg.nr_mmios++;
+    while ( !dt_device_get_address(node, imsic_cfg.nr_mmios, &base_addr, NULL) )
+        imsic_cfg.nr_mmios++;
+
+    return 0;
+}
+
+int __init imsic_init(struct dt_device_node *node)
+{
+    int rc;
+    unsigned long reloff, hartid;
+    uint32_t nr_parent_irqs, index, nr_handlers = 0;
+    paddr_t base_addr;
+
+    /* Parse IMSIC node */
+    rc = imsic_parse_node(node, &nr_parent_irqs);
+    if ( rc )
+        return rc;
+
+    /* Allocate MMIO resource array */
+    imsic_cfg.mmios = xzalloc_array(struct imsic_mmios, imsic_cfg.nr_mmios);
+    if ( !imsic_cfg.mmios )
+        return -ENOMEM;
+
+    /* check MMIO register sets */
+    for ( int i = 0; i < imsic_cfg.nr_mmios; i++ )
+    {
+        rc = dt_device_get_address(node, i, &imsic_cfg.mmios[i].base_addr,
+                                   &imsic_cfg.mmios[i].size);
+        if ( rc )
+        {
+            printk(XENLOG_ERR "%s:  unable to parse MMIO regset %d\n",
+                   node->name, i);
+            goto imsic_init_err;
+        }
+
+        base_addr = imsic_cfg.mmios[i].base_addr;
+        base_addr &= ~(BIT(imsic_cfg.guest_index_bits +
+                   imsic_cfg.hart_index_bits +
+                   IMSIC_MMIO_PAGE_SHIFT, UL) - 1);
+        base_addr &= ~((BIT(imsic_cfg.group_index_bits, UL) - 1) <<
+                   imsic_cfg.group_index_shift);
+        if ( base_addr != imsic_cfg.base_addr )
+        {
+            rc = -EINVAL;
+            printk(XENLOG_ERR "%s: address mismatch for regset %d\n",
+                   node->name, i);
+            goto imsic_init_err;
+        }
+    }
+
+    /* Configure handlers for target CPUs */
+    for ( int i = 0; i < nr_parent_irqs; i++ )
+    {
+        rc = imsic_get_parent_hartid(node, i, &hartid);
+        if ( rc )
+        {
+            printk(XENLOG_WARNING "%s: hart ID for parent irq%d not found\n",
+                   node->name, i);
+            continue;
+        }
+
+        if ( hartid > NR_CPUS )
+        {
+            printk(XENLOG_WARNING "%s: unsupported hart ID=%lu for parent irq%d\n",
+                   node->name, hartid, i);
+            continue;
+        }
+
+        /* Find MMIO location of MSI page */
+        index = imsic_cfg.nr_mmios;
+        reloff = i * BIT(imsic_cfg.guest_index_bits, UL) * IMSIC_MMIO_PAGE_SZ;
+        for ( int j = 0; imsic_cfg.nr_mmios; j++ )
+        {
+            if ( reloff < imsic_cfg.mmios[j].size )
+            {
+                index = j;
+                break;
+            }
+
+            /*
+             * MMIO region size may not be aligned to
+             * BIT(global->guest_index_bits) * IMSIC_MMIO_PAGE_SZ
+             * if holes are present.
+             */
+            reloff -= ROUNDUP(imsic_cfg.mmios[j].size,
+                BIT(imsic_cfg.guest_index_bits, UL) * IMSIC_MMIO_PAGE_SZ);
+        }
+
+        if ( index >= imsic_cfg.nr_mmios )
+        {
+            printk(XENLOG_WARNING "%s: MMIO not found for parent irq%d\n",
+                   node->name, i);
+            continue;
+        }
+
+        if ( !IS_ALIGNED(imsic_cfg.msi[hartid].base_addr + reloff, PAGE_SIZE) )
+        {
+            printk(XENLOG_WARNING "%s: MMIO address 0x%lx is not aligned on a page\n",
+                   node->name, imsic_cfg.msi[hartid].base_addr + reloff);
+            imsic_cfg.msi[hartid].offset = 0;
+            imsic_cfg.msi[hartid].base_addr = 0;
+            continue;
+        }
+
+        imsic_cfg.mmios[index].harts[hartid] = true;
+        imsic_cfg.msi[hartid].base_addr = imsic_cfg.mmios[index].base_addr;
+        imsic_cfg.msi[hartid].offset = reloff;
+        nr_handlers++;
+    }
+
+    if ( !nr_handlers )
+    {
+        printk(XENLOG_ERR "%s: No CPU handlers found\n", node->name);
+        rc = -ENODEV;
+        goto imsic_init_err;
+    }
+
+    return 0;
+
+imsic_init_err:
+    xfree(imsic_cfg.mmios);
+
+    return rc;
+}
diff --git a/xen/arch/riscv/include/asm/imsic.h b/xen/arch/riscv/include/asm/imsic.h
new file mode 100644
index 0000000000..126e651863
--- /dev/null
+++ b/xen/arch/riscv/include/asm/imsic.h
@@ -0,0 +1,66 @@
+/* SPDX-License-Identifier: MIT */
+
+/*
+ * xen/arch/riscv/imsic.h
+ *
+ * RISC-V Incoming MSI Controller support
+ *
+ * (c) 2023 Microchip Technology Inc.
+ */
+
+#ifndef ASM__RISCV__IMSIC_H
+#define ASM__RISCV__IMSIC_H
+
+#include 
+
+#define IMSIC_MMIO_PAGE_SHIFT   12
+#define IMSIC_MMIO_PAGE_SZ      (1UL << IMSIC_MMIO_PAGE_SHIFT)
+
+#define IMSIC_MIN_ID            63
+#define IMSIC_MAX_ID            2048
+
+struct imsic_msi {
+    paddr_t base_addr;
+    unsigned long offset;
+};
+
+struct imsic_mmios {
+    paddr_t base_addr;
+    unsigned long size;
+    bool harts[NR_CPUS];
+};
+
+struct imsic_config {
+    /* base address */
+    paddr_t base_addr;
+
+    /* Bits representing Guest index, HART index, and Group index */
+    unsigned int guest_index_bits;
+    unsigned int hart_index_bits;
+    unsigned int group_index_bits;
+    unsigned int group_index_shift;
+
+    /* imsic phandle */
+    unsigned int phandle;
+
+    /* number of parent irq */
+    unsigned int nr_parent_irqs;
+
+    /* number off interrupt identities */
+    unsigned int nr_ids;
+
+    /* mmios */
+    unsigned int nr_mmios;
+    struct imsic_mmios *mmios;
+
+    /* MSI */
+    struct imsic_msi msi[NR_CPUS];
+};
+
+struct dt_device_node;
+int imsic_init(struct dt_device_node *n);
+
+struct imsic_config;
+const struct imsic_config *imsic_get_config(void);
+
+#endif /* ASM__RISCV__IMSIC_H */
-- 
2.49.0



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        Tue, 08 Apr 2025 08:57:34 -0700 (PDT)
From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Romain Caritey 
Subject: [PATCH v1 09/14] xen/riscv: aplic_init() implementation
Date: Tue,  8 Apr 2025 17:57:14 +0200
Message-ID: <1d023045be49ae93d41d552f9c9a79972fa4e84b.1744126720.git.oleksii.kurochko@gmail.com>
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aplic_init() function does the following few things:
 - checks that IMSIC in device tree node  ( by checking msi-parent property
   in APLIC node ) is present as current one implmenetaion of AIA is
   supported only MSI method.
 - initialize IMSIC based on IMSIC device tree node
 - Read value of APLIC's paddr start/end and size.
 - Map aplic.regs
 - Setup APLIC initial state interrupts (disable all interrupts, set
   interrupt type and default priority, confgifure APLIC domaincfg) by
   calling aplic_init_hw_interrutps().

aplic_init() is based on the code from [1] and [2].

Since Microchip originally developed aplic.c, an internal discussion with
them led to the decision to use the MIT license.

[1] https://gitlab.com/xen-project/people/olkur/xen/-/commit/7cfb4bd4748ca268142497ac5c327d2766fb342d
[2] https://gitlab.com/xen-project/people/olkur/xen/-/commit/392a531bfad39bf4656ce8128e004b241b8b3f3e

Co-developed-by: Romain Caritey 
Signed-off-by: Oleksii Kurochko 
---
 xen/arch/riscv/aplic.c             | 97 ++++++++++++++++++++++++++++++
 xen/arch/riscv/include/asm/aplic.h | 77 ++++++++++++++++++++++++
 xen/arch/riscv/include/asm/intc.h  |  3 +
 xen/arch/riscv/include/asm/irq.h   |  1 -
 4 files changed, 177 insertions(+), 1 deletion(-)
 create mode 100644 xen/arch/riscv/include/asm/aplic.h

diff --git a/xen/arch/riscv/aplic.c b/xen/arch/riscv/aplic.c
index 6dc040af6f..d1aa835c3e 100644
--- a/xen/arch/riscv/aplic.c
+++ b/xen/arch/riscv/aplic.c
@@ -9,19 +9,112 @@
  * Copyright (c) 2024-2025 Vates
  */
 
+#include 
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
+#include 
 
+#include 
 #include 
+#include 
 #include 
+#include 
+
+#define APLIC_DEFAULT_PRIORITY  1
+
+static struct aplic_priv aplic;
 
 static struct intc_info __ro_after_init aplic_info = {
     .hw_version = INTC_APLIC,
 };
 
+static void __init aplic_init_hw_interrupts(void)
+{
+    int i;
+
+    /* Disable all interrupts */
+    for ( i = 0; i <= aplic_info.nr_irqs; i += 32 )
+        aplic.regs->clrie[i] = -1U;
+
+    /* Set interrupt type and default priority for all interrupts */
+    for ( i = 1; i <= aplic_info.nr_irqs; i++ )
+    {
+        aplic.regs->sourcecfg[i - 1] = 0;
+        aplic.regs->target[i - 1] = APLIC_DEFAULT_PRIORITY;
+    }
+
+    /* Clear APLIC domaincfg */
+    aplic.regs->domaincfg = APLIC_DOMAINCFG_IE | APLIC_DOMAINCFG_DM;
+}
+
+static int __init aplic_init(void)
+{
+    int rc;
+    dt_phandle imsic_phandle;
+    uint32_t irq_range[2];
+    const __be32 *prop;
+    uint64_t size, paddr;
+    struct dt_device_node *imsic_node;
+    const struct dt_device_node *node = aplic_info.node;
+
+    /* check for associated imsic node */
+    rc = dt_property_read_u32(node, "msi-parent", &imsic_phandle);
+    if ( !rc )
+        panic("%s: IDC mode not supported\n", node->full_name);
+
+    imsic_node = dt_find_node_by_phandle(imsic_phandle);
+    if ( !imsic_node )
+        panic("%s: unable to find IMSIC node\n", node->full_name);
+
+    /* check imsic mode */
+    rc = dt_property_read_u32_array(imsic_node, "interrupts-extended",
+                                    irq_range, ARRAY_SIZE(irq_range));
+    if ( rc && (rc != -EOVERFLOW) )
+        panic("%s: unable to find interrupt-extended in %s node\n",
+               node->full_name, imsic_node->full_name);
+
+    if ( irq_range[1] == IRQ_M_EXT )
+        /* machine mode imsic node, ignore this aplic node */
+        return 0;
+
+    rc = imsic_init(imsic_node);
+    if ( rc )
+        panic("%s: Failded to initialize IMSIC\n", node->full_name);
+
+    /* Find out number of interrupt sources */
+    rc = dt_property_read_u32(node, "riscv,num-sources", &aplic_info.nr_irqs);
+    if ( !rc )
+        panic("%s: failed to get number of interrupt sources\n",
+              node->full_name);
+
+    prop = dt_get_property(node, "reg", NULL);
+    dt_get_range(&prop, node, &paddr, &size);
+    if ( !paddr )
+        panic("%s: first MMIO resource not found\n", node->full_name);
+
+    aplic.paddr_start = paddr;
+    aplic.paddr_end = paddr + size;
+    aplic.size = size;
+
+    aplic.regs = ioremap(paddr, size);
+    if ( !aplic.regs )
+        panic("%s: unable to map\n", node->full_name);
+
+    /* Setup initial state APLIC interrupts */
+    aplic_init_hw_interrupts();
+
+    return 0;
+}
+
+static const struct intc_hw_operations __ro_after_init aplic_ops = {
+    .info                = &aplic_info,
+    .init                = aplic_init,
+};
+
 static int aplic_irq_xlate(const uint32_t *intspec, unsigned int intsize,
                            unsigned int *out_hwirq,
                            unsigned int *out_type)
@@ -52,8 +145,12 @@ static int __init aplic_preinit(struct dt_device_node *node, const void *dat)
 
     aplic_info.node = node;
 
+    aplic.imsic_cfg = imsic_get_config();
+
     dt_irq_xlate = aplic_irq_xlate;
 
+    register_intc_ops(&aplic_ops);
+
     return 0;
 }
 
diff --git a/xen/arch/riscv/include/asm/aplic.h b/xen/arch/riscv/include/asm/aplic.h
new file mode 100644
index 0000000000..94b3d0b616
--- /dev/null
+++ b/xen/arch/riscv/include/asm/aplic.h
@@ -0,0 +1,77 @@
+/* SPDX-License-Identifier: MIT */
+
+/*
+ * xen/arch/riscv/aplic.h
+ *
+ * RISC-V Advanced Platform-Level Interrupt Controller support
+ *
+ * Copyright (c) 2023 Microchip.
+ */
+
+#ifndef ASM__RISCV__APLIC_H
+#define ASM__RISCV__APLIC_H
+
+#include 
+
+#include 
+
+#define APLIC_DOMAINCFG_IE      BIT(8, UL)
+#define APLIC_DOMAINCFG_DM      BIT(2, UL)
+
+struct aplic_regs {
+    uint32_t domaincfg;
+    uint32_t sourcecfg[1023];
+    uint8_t _reserved1[0xBC0];
+
+    uint32_t mmsiaddrcfg;
+    uint32_t mmsiaddrcfgh;
+    uint32_t smsiaddrcfg;
+    uint32_t smsiaddrcfgh;
+    uint8_t _reserved2[0x30];
+
+    uint32_t setip[32];
+    uint8_t _reserved3[92];
+
+    uint32_t setipnum;
+    uint8_t _reserved4[0x20];
+
+    uint32_t in_clrip[32];
+    uint8_t _reserved5[92];
+
+    uint32_t clripnum;
+    uint8_t _reserved6[32];
+
+    uint32_t setie[32];
+    uint8_t _reserved7[92];
+
+    uint32_t setienum;
+    uint8_t _reserved8[32];
+
+    uint32_t clrie[32];
+    uint8_t _reserved9[92];
+
+    uint32_t clrienum;
+    uint8_t _reserved10[32];
+
+    uint32_t setipnum_le;
+    uint32_t setipnum_be;
+    uint8_t _reserved11[4088];
+
+    uint32_t genmsi;
+    uint32_t target[1023];
+};
+
+struct aplic_priv {
+    /* base physical address and size */
+    paddr_t paddr_start;
+    paddr_t paddr_end;
+    size_t  size;
+
+    /* registers */
+    volatile struct aplic_regs *regs;
+
+    /* imsic configuration */
+    const struct imsic_config *imsic_cfg;
+};
+
+#endif /* ASM__RISCV__APLIC_H */
diff --git a/xen/arch/riscv/include/asm/intc.h b/xen/arch/riscv/include/asm/intc.h
index 0d498b10f4..db53caa07b 100644
--- a/xen/arch/riscv/include/asm/intc.h
+++ b/xen/arch/riscv/include/asm/intc.h
@@ -15,6 +15,9 @@ enum intc_version {
 struct intc_info {
     enum intc_version hw_version;
     const struct dt_device_node *node;
+
+    /* number of irqs */
+    unsigned int nr_irqs;
 };
 
 struct intc_hw_operations {
diff --git a/xen/arch/riscv/include/asm/irq.h b/xen/arch/riscv/include/asm/irq.h
index ff1c95e0be..163a478d78 100644
--- a/xen/arch/riscv/include/asm/irq.h
+++ b/xen/arch/riscv/include/asm/irq.h
@@ -27,7 +27,6 @@
 #define IRQ_TYPE_INVALID        DT_IRQ_TYPE_INVALID
 
 /* TODO */
-#define nr_irqs 0U
 #define nr_static_irqs 0
 #define arch_hwdom_irqs(domid) 0U
 
-- 
2.49.0



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        Tue, 08 Apr 2025 08:57:39 -0700 (PDT)
From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v1 13/14] xen/riscv: initialize interrupt controller
Date: Tue,  8 Apr 2025 17:57:18 +0200
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Call intc_init() to do basic initialization steps for APLIC and IMISC.

Signed-off-by: Oleksii Kurochko 
---
 xen/arch/riscv/setup.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c
index a3189697da..9765bcbb08 100644
--- a/xen/arch/riscv/setup.c
+++ b/xen/arch/riscv/setup.c
@@ -136,6 +136,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id,
 
     intc_preinit();
 
+    intc_init();
+
     printk("All set up\n");
 
     machine_halt();
-- 
2.49.0



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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Romain Caritey 
Subject: [PATCH v1 10/14] xen/riscv: implementation of aplic and imsic operations
Date: Tue,  8 Apr 2025 17:57:15 +0200
Message-ID: <74a07ed7c596bbcf581010685e01bfdfa19164f5.1744126720.git.oleksii.kurochko@gmail.com>
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Introduce interrupt controller descriptor for host APLIC to describe
the low-lovel hardare. It includes implementation of the following functions:
 - aplic_irq_startup()
 - aplic_irq_shutdown()
 - aplic_irq_enable()
 - aplic_irq_disable()
 - aplic_irq_ack()
 - aplic_host_irq_end()
 - aplic_set_irq_affinity()

As APLIC is used in MSI mode it requires to enable/disable interrupts not
only for APLIC but also for IMSIC. Thereby for the purpose of
aplic_irq_{enable,disable}() it is introduced imsic_irq_{enable,disable)().

For the purpose of aplic_set_irq_affinity() aplic_get_cpu_from_mask() is
introduced to get hart id.

Also, introduce additional interrupt controller h/w operations and
host_irq_type for APLIC:
 - aplic_host_irq_type
 - aplic_set_irq_priority()
 - aplic_set_irq_type()

Patch is based on the code from [1].

[1] https://gitlab.com/xen-project/people/olkur/xen/-/commit/7390e2365828b83e27ead56b03114a56e3699dd5

Co-developed-by: Romain Caritey 
Signed-off-by: Oleksii Kurochko 
---
 xen/arch/riscv/aplic.c             | 169 ++++++++++++++++++++++++++++-
 xen/arch/riscv/imsic.c             |  63 +++++++++++
 xen/arch/riscv/include/asm/aplic.h |  12 ++
 xen/arch/riscv/include/asm/imsic.h |  15 +++
 4 files changed, 258 insertions(+), 1 deletion(-)

diff --git a/xen/arch/riscv/aplic.c b/xen/arch/riscv/aplic.c
index d1aa835c3e..4b60cb9a77 100644
--- a/xen/arch/riscv/aplic.c
+++ b/xen/arch/riscv/aplic.c
@@ -15,6 +15,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -110,9 +111,173 @@ static int __init aplic_init(void)
     return 0;
 }
 
-static const struct intc_hw_operations __ro_after_init aplic_ops = {
+static void aplic_set_irq_type(struct irq_desc *desc, unsigned int type)
+{
+    unsigned int irq = desc->irq - 1;
+
+    spin_lock(&aplic.lock);
+    switch(type) {
+        case IRQ_TYPE_EDGE_RISING:
+            aplic.regs->sourcecfg[irq] = APLIC_SOURCECFG_SM_EDGE_RISE;
+            break;
+        case IRQ_TYPE_EDGE_FALLING:
+            aplic.regs->sourcecfg[irq] = APLIC_SOURCECFG_SM_EDGE_FALL;
+            break;
+        case IRQ_TYPE_LEVEL_HIGH:
+            aplic.regs->sourcecfg[irq] = APLIC_SOURCECFG_SM_LEVEL_HIGH;
+            break;
+        case IRQ_TYPE_LEVEL_LOW:
+            aplic.regs->sourcecfg[irq] = APLIC_SOURCECFG_SM_LEVEL_LOW;
+            break;
+        default:
+            aplic.regs->sourcecfg[irq] = APLIC_SOURCECFG_SM_INACTIVE;
+            break;
+    }
+    spin_unlock(&aplic.lock);
+}
+
+static void aplic_set_irq_priority(struct irq_desc *desc,
+                                   unsigned int priority)
+{
+    /* No priority, do nothing */
+}
+
+static void aplic_irq_enable(struct irq_desc *desc)
+{
+    unsigned long flags;
+
+    /*
+     * TODO: Currently, APLIC is supported only with MSI interrupts.
+     *       If APLIC without MSI interrupts is required in the future,
+     *       this function will need to be updated accordingly.
+     */
+    ASSERT(aplic.imsic_cfg->is_used);
+
+    ASSERT(spin_is_locked(&desc->lock));
+
+    spin_lock_irqsave(&aplic.lock, flags);
+
+    clear_bit(_IRQ_DISABLED, &desc->status);
+
+    /* enable interrupt in IMSIC */
+    imsic_irq_enable(desc->irq);
+
+    /* enable interrupt in APLIC */
+    aplic.regs->setienum = desc->irq;
+
+    spin_unlock_irqrestore(&aplic.lock, flags);
+}
+
+static void aplic_irq_disable(struct irq_desc *desc)
+{
+    unsigned long flags;
+
+    /*
+     * TODO: Currently, APLIC is supported only with MSI interrupts.
+     *       If APLIC without MSI interrupts is required in the future,
+     *       this function will need to be updated accordingly.
+     */
+    ASSERT(aplic.imsic_cfg->is_used);
+
+    ASSERT(spin_is_locked(&desc->lock));
+
+    spin_lock_irqsave(&aplic.lock, flags);
+
+    set_bit(_IRQ_DISABLED, &desc->status);
+
+    /* disable interrupt in APLIC */
+    aplic.regs->clrienum = desc->irq;
+
+    /* disable interrupt in IMSIC */
+    imsic_irq_disable(desc->irq);
+
+    spin_unlock_irqrestore(&aplic.lock, flags);
+}
+
+static unsigned int aplic_irq_startup(struct irq_desc *desc)
+{
+    aplic_irq_enable(desc);
+
+    return 0;
+}
+
+static void aplic_irq_shutdown(struct irq_desc *desc)
+{
+    aplic_irq_disable(desc);
+}
+
+static void aplic_irq_ack(struct irq_desc *desc)
+{
+    /* nothing to do */
+}
+
+static void aplic_host_irq_end(struct irq_desc *desc)
+{
+    /* nothing to do */
+}
+
+static unsigned int aplic_get_cpu_from_mask(const cpumask_t *cpumask)
+{
+    unsigned int cpu;
+    cpumask_t possible_mask;
+
+    cpumask_and(&possible_mask, cpumask, &cpu_possible_map);
+    cpu = cpumask_any(&possible_mask);
+
+    return cpu;
+}
+
+static void aplic_set_irq_affinity(struct irq_desc *desc, const cpumask_t *mask)
+{
+    unsigned int cpu;
+    uint64_t group_index, base_ppn;
+    uint32_t hhxw, lhxw ,hhxs, value;
+    const struct imsic_config *imsic = aplic.imsic_cfg;
+
+    /*
+     * TODO: Currently, APLIC is supported only with MSI interrupts.
+     *       If APLIC without MSI interrupts is required in the future,
+     *       this function will need to be updated accordingly.
+     */
+    ASSERT(aplic.imsic_cfg->is_used);
+
+    ASSERT(!cpumask_empty(mask));
+
+    spin_lock(&aplic.lock);
+
+    cpu = cpuid_to_hartid(aplic_get_cpu_from_mask(mask));
+    hhxw = imsic->group_index_bits;
+    lhxw = imsic->hart_index_bits;
+    hhxs = imsic->group_index_shift - IMSIC_MMIO_PAGE_SHIFT * 2;
+    base_ppn = imsic->msi[cpu].base_addr >> IMSIC_MMIO_PAGE_SHIFT;
+
+    /* update hart and EEID in the target register */
+    group_index = (base_ppn >> (hhxs + 12)) & (BIT(hhxw, UL) - 1);
+    value = desc->irq;
+    value |= cpu << APLIC_TARGET_HART_IDX_SHIFT;
+    value |= group_index << (lhxw + APLIC_TARGET_HART_IDX_SHIFT) ;
+    aplic.regs->target[desc->irq - 1] = value;
+
+    spin_unlock(&aplic.lock);
+}
+
+static hw_irq_controller aplic_host_irq_type = {
+    .typename     = "aplic",
+    .startup      = aplic_irq_startup,
+    .shutdown     = aplic_irq_shutdown,
+    .enable       = aplic_irq_enable,
+    .disable      = aplic_irq_disable,
+    .ack          = aplic_irq_ack,
+    .end          = aplic_host_irq_end,
+    .set_affinity = aplic_set_irq_affinity,
+};
+
+static const struct intc_hw_operations aplic_ops = {
     .info                = &aplic_info,
     .init                = aplic_init,
+    .host_irq_type       = &aplic_host_irq_type,
+    .set_irq_priority    = aplic_set_irq_priority,
+    .set_irq_type        = aplic_set_irq_type,
 };
 
 static int aplic_irq_xlate(const uint32_t *intspec, unsigned int intsize,
@@ -149,6 +314,8 @@ static int __init aplic_preinit(struct dt_device_node *node, const void *dat)
 
     dt_irq_xlate = aplic_irq_xlate;
 
+    spin_lock_init(&aplic.lock);
+
     register_intc_ops(&aplic_ops);
 
     return 0;
diff --git a/xen/arch/riscv/imsic.c b/xen/arch/riscv/imsic.c
index 99def9af2d..8198d008ef 100644
--- a/xen/arch/riscv/imsic.c
+++ b/xen/arch/riscv/imsic.c
@@ -14,12 +14,68 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
 
 static struct imsic_config imsic_cfg;
 
+#define imsic_csr_set(c, v)     \
+do {                            \
+    csr_write(CSR_SISELECT, c); \
+    csr_set(CSR_SIREG, v);      \
+} while (0)
+
+#define imsic_csr_clear(c, v)   \
+do {                            \
+    csr_write(CSR_SISELECT, c); \
+    csr_clear(CSR_SIREG, v);    \
+} while (0)
+
+static void imsic_local_eix_update(unsigned long base_id, unsigned long num_id,
+                                   bool pend, bool val)
+{
+    unsigned long i, isel, ireg;
+    unsigned long id = base_id, last_id = base_id + num_id;
+
+    while ( id < last_id )
+    {
+        isel = id / __riscv_xlen;
+        isel *= __riscv_xlen / IMSIC_EIPx_BITS;
+        isel += (pend) ? IMSIC_EIP0 : IMSIC_EIE0;
+
+        ireg = 0;
+        for ( i = id & (__riscv_xlen - 1);
+              (id < last_id) && (i < __riscv_xlen);
+              i++, id++ )
+            ireg |= (1 << i);
+
+        if ( val )
+            imsic_csr_set(isel, ireg);
+        else
+            imsic_csr_clear(isel, ireg);
+    }
+}
+
+void imsic_irq_enable(unsigned int hwirq)
+{
+    unsigned long flags;
+
+    spin_lock_irqsave(&imsic_cfg.lock, flags);
+    imsic_local_eix_update(hwirq, 1, false, true);
+    spin_unlock_irqrestore(&imsic_cfg.lock, flags);
+}
+
+void imsic_irq_disable(unsigned int hwirq)
+{
+    unsigned long flags;
+
+    spin_lock_irqsave(&imsic_cfg.lock, flags);
+    imsic_local_eix_update(hwirq, 1, false, false);
+    spin_unlock_irqrestore(&imsic_cfg.lock, flags);
+}
+
 const struct imsic_config *imsic_get_config(void)
 {
     return &imsic_cfg;
@@ -277,6 +333,13 @@ int __init imsic_init(struct dt_device_node *node)
         goto imsic_init_err;
     }
 
+    spin_lock_init(&imsic_cfg.lock);
+
+    /* Enable local interrupt delivery */
+    imsic_ids_local_delivery(true);
+
+    imsic_cfg.is_used = true;
+
     return 0;
 
 imsic_init_err:
diff --git a/xen/arch/riscv/include/asm/aplic.h b/xen/arch/riscv/include/asm/aplic.h
index 94b3d0b616..ce858663a9 100644
--- a/xen/arch/riscv/include/asm/aplic.h
+++ b/xen/arch/riscv/include/asm/aplic.h
@@ -18,6 +18,15 @@
 #define APLIC_DOMAINCFG_IE      BIT(8, UL)
 #define APLIC_DOMAINCFG_DM      BIT(2, UL)
 
+#define APLIC_SOURCECFG_SM_INACTIVE     0x0
+#define APLIC_SOURCECFG_SM_DETACH       0x1
+#define APLIC_SOURCECFG_SM_EDGE_RISE    0x4
+#define APLIC_SOURCECFG_SM_EDGE_FALL    0x5
+#define APLIC_SOURCECFG_SM_LEVEL_HIGH   0x6
+#define APLIC_SOURCECFG_SM_LEVEL_LOW    0x7
+
+#define APLIC_TARGET_HART_IDX_SHIFT 18
+
 struct aplic_regs {
     uint32_t domaincfg;
     uint32_t sourcecfg[1023];
@@ -70,6 +79,9 @@ struct aplic_priv {
     /* registers */
     volatile struct aplic_regs *regs;
 
+    /* lock */
+    spinlock_t lock;
+
     /* imsic configuration */
     const struct imsic_config *imsic_cfg;
 };
diff --git a/xen/arch/riscv/include/asm/imsic.h b/xen/arch/riscv/include/asm/imsic.h
index 126e651863..d2c0178529 100644
--- a/xen/arch/riscv/include/asm/imsic.h
+++ b/xen/arch/riscv/include/asm/imsic.h
@@ -11,6 +11,7 @@
 #ifndef ASM__RISCV__IMSIC_H
 #define ASM__RISCV__IMSIC_H
 
+#include 
 #include 
 
 #define IMSIC_MMIO_PAGE_SHIFT   12
@@ -19,6 +20,11 @@
 #define IMSIC_MIN_ID            63
 #define IMSIC_MAX_ID            2048
 
+#define IMSIC_EIP0              0x80
+#define IMSIC_EIPx_BITS         32
+
+#define IMSIC_EIE0              0xC0
+
 struct imsic_msi {
     paddr_t base_addr;
     unsigned long offset;
@@ -55,6 +61,12 @@ struct imsic_config {
 
     /* MSI */
     struct imsic_msi msi[NR_CPUS];
+
+    /* a check that IMSIC is used */
+    bool is_used;
+
+    /* lock */
+    spinlock_t lock;
 };
 
 struct dt_device_node;
@@ -63,4 +75,7 @@ int imsic_init(struct dt_device_node *n);
 struct imsic_config;
 const struct imsic_config *imsic_get_config(void);
 
+void imsic_irq_enable(unsigned int hwirq);
+void imsic_irq_disable(unsigned int hwirq);
+
 #endif /* ASM__RISCV__IMSIC_H */
-- 
2.49.0



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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v1 14/14] xen/riscv: add basic UART support
Date: Tue,  8 Apr 2025 17:57:19 +0200
Message-ID: <3e96851da8751ac17cbf0cb5a649c0d86259460a.1744126720.git.oleksii.kurochko@gmail.com>
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Update Kconfig to select GENERIC_UART_INIT for basic UART init ( find a dt node
and call device specific device_init() ).

Drop `default n if RISCV` statement for config HAS_NS16550 as now ns16550 is
ready to be compiled and used by RISC-V.

Initialize a minimal amount of stuff to have UART and Xen console:
 - Initialize uart by calling uart_init().
 - Initialize Xen console by calling console_init_{pre,post}irq().
 - Initialize timer and its internal lists which are used by
   init_timer() which is called by ns16550_init_postirq(); otherwise
   "Unhandled exception: Store/AMO Page Fault" occurs.
 - Enable local interrupt to recieve an input from UART

Signed-off-by: Oleksii Kurochko 
---
 xen/arch/riscv/Kconfig   |  1 +
 xen/arch/riscv/setup.c   | 16 ++++++++++++++++
 xen/drivers/char/Kconfig |  1 -
 3 files changed, 17 insertions(+), 1 deletion(-)

diff --git a/xen/arch/riscv/Kconfig b/xen/arch/riscv/Kconfig
index 27086cca9c..f5ba7a5a78 100644
--- a/xen/arch/riscv/Kconfig
+++ b/xen/arch/riscv/Kconfig
@@ -2,6 +2,7 @@ config RISCV
 	def_bool y
 	select FUNCTION_ALIGNMENT_16B
 	select GENERIC_BUG_FRAME
+	select GENERIC_UART_INIT
 	select HAS_DEVICE_TREE
 	select HAS_PMAP
 	select HAS_UBSAN
diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c
index 9765bcbb08..b5fd660a4b 100644
--- a/xen/arch/riscv/setup.c
+++ b/xen/arch/riscv/setup.c
@@ -4,11 +4,16 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
+#include 
 #include 
+#include 
+#include 
 #include 
+#include 
 #include 
 #include 
 
@@ -73,6 +78,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id,
 
     remove_identity_mapping();
 
+    percpu_init_areas();
+
     smp_clear_cpu_maps();
 
     set_processor_id(0);
@@ -136,8 +143,17 @@ void __init noreturn start_xen(unsigned long bootcpu_id,
 
     intc_preinit();
 
+    uart_init();
+    console_init_preirq();
+
     intc_init();
 
+    timer_init();
+
+    local_irq_enable();
+
+    console_init_postirq();
+
     printk("All set up\n");
 
     machine_halt();
diff --git a/xen/drivers/char/Kconfig b/xen/drivers/char/Kconfig
index e6e12bb413..01fa31fb2b 100644
--- a/xen/drivers/char/Kconfig
+++ b/xen/drivers/char/Kconfig
@@ -3,7 +3,6 @@ config GENERIC_UART_INIT
 
 config HAS_NS16550
 	bool "NS16550 UART driver" if ARM
-	default n if RISCV
 	default y
 	help
 	  This selects the 16550-series UART support. For most systems, say Y.
-- 
2.49.0



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        Tue, 08 Apr 2025 08:57:36 -0700 (PDT)
From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Romain Caritey 
Subject: [PATCH v1 11/14] xen/riscv: add external interrupt handling for hypervisor mode
Date: Tue,  8 Apr 2025 17:57:16 +0200
Message-ID: <1685488b8c1b48149e94bd3625c7b46b78c72e8e.1744126720.git.oleksii.kurochko@gmail.com>
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Implement functions necessarry to have working external interrupts in
hypervisor mode. The following changes are done:
 - Add a common function intc_handle_external_irq() to call APLIC specific
   function to handle an interrupt.
 - Update do_trap() function to handle IRQ_S_EXT case; add the check to catch
   case when cause of trap is an interrupt.
 - Add handle_interrrupt() member to intc_hw_operations structure.
 - Enable local interrupt delivery for IMSIC by implementation and calling of
   imsic_ids_local_delivery() in imsic_init(); additionally introduce helper
   imsic_csr_write() to update IMSIC_EITHRESHOLD and IMSIC_EITHRESHOLD.
 - Enable hypervisor external interrupts.
 - Implement aplic_handler_interrupt() and use it to init ->handle_interrupt
   member of intc_hw_operations for APLIC.
 - Add implementation of do_IRQ() to dispatch the interrupt.

The current patch is based on the code from [1].

[1] https://gitlab.com/xen-project/people/olkur/xen/-/commit/7390e2365828b83e27ead56b03114a56e3699dd5

Co-developed-by: Romain Caritey 
Signed-off-by: Oleksii Kurochko 
---
 xen/arch/riscv/aplic.c             | 19 +++++++++++++
 xen/arch/riscv/imsic.c             | 25 +++++++++++++++++
 xen/arch/riscv/include/asm/imsic.h |  7 +++++
 xen/arch/riscv/include/asm/intc.h  |  5 ++++
 xen/arch/riscv/include/asm/irq.h   |  3 +++
 xen/arch/riscv/intc.c              |  7 +++++
 xen/arch/riscv/irq.c               | 43 ++++++++++++++++++++++++++++++
 xen/arch/riscv/traps.c             | 18 +++++++++++++
 8 files changed, 127 insertions(+)

diff --git a/xen/arch/riscv/aplic.c b/xen/arch/riscv/aplic.c
index 4b60cb9a77..38b57ed1ac 100644
--- a/xen/arch/riscv/aplic.c
+++ b/xen/arch/riscv/aplic.c
@@ -261,6 +261,21 @@ static void aplic_set_irq_affinity(struct irq_desc *desc, const cpumask_t *mask)
     spin_unlock(&aplic.lock);
 }
 
+static void aplic_handle_interrupt(unsigned long cause, struct cpu_user_regs *regs)
+{
+    /* disable to avoid more external interrupts */
+    csr_clear(CSR_SIE, 1UL << IRQ_S_EXT);
+
+    /* clear the pending bit */
+    csr_clear(CSR_SIP, 1UL << IRQ_S_EXT);
+
+    /* dispatch the interrupt */
+    do_IRQ(regs, csr_swap(CSR_STOPEI, 0) >> TOPI_IID_SHIFT);
+
+    /* enable external interrupts */
+    csr_set(CSR_SIE, 1UL << IRQ_S_EXT);
+}
+
 static hw_irq_controller aplic_host_irq_type = {
     .typename     = "aplic",
     .startup      = aplic_irq_startup,
@@ -278,6 +293,7 @@ static const struct intc_hw_operations aplic_ops = {
     .host_irq_type       = &aplic_host_irq_type,
     .set_irq_priority    = aplic_set_irq_priority,
     .set_irq_type        = aplic_set_irq_type,
+    .handle_interrupt    = aplic_handle_interrupt,
 };
 
 static int aplic_irq_xlate(const uint32_t *intspec, unsigned int intsize,
@@ -318,6 +334,9 @@ static int __init aplic_preinit(struct dt_device_node *node, const void *dat)
 
     register_intc_ops(&aplic_ops);
 
+    /* Enable supervisor external interrupt */
+    csr_set(CSR_SIE, 1UL << IRQ_S_EXT);
+
     return 0;
 }
 
diff --git a/xen/arch/riscv/imsic.c b/xen/arch/riscv/imsic.c
index 8198d008ef..e00f2d69df 100644
--- a/xen/arch/riscv/imsic.c
+++ b/xen/arch/riscv/imsic.c
@@ -19,8 +19,19 @@
 
 #include 
 
+#define IMSIC_DISABLE_EIDELIVERY    0
+#define IMSIC_ENABLE_EIDELIVERY     1
+#define IMSIC_DISABLE_EITHRESHOLD   1
+#define IMSIC_ENABLE_EITHRESHOLD    0
+
 static struct imsic_config imsic_cfg;
 
+#define imsic_csr_write(c, v)   \
+do {                            \
+    csr_write(CSR_SISELECT, c); \
+    csr_write(CSR_SIREG, v);    \
+} while (0)
+
 #define imsic_csr_set(c, v)     \
 do {                            \
     csr_write(CSR_SISELECT, c); \
@@ -33,6 +44,20 @@ do {                            \
     csr_clear(CSR_SIREG, v);    \
 } while (0)
 
+void imsic_ids_local_delivery(bool enable)
+{
+    if ( enable )
+    {
+        imsic_csr_write(IMSIC_EITHRESHOLD, IMSIC_ENABLE_EITHRESHOLD);
+        imsic_csr_write(IMSIC_EIDELIVERY, IMSIC_ENABLE_EIDELIVERY);
+    }
+    else
+    {
+        imsic_csr_write(IMSIC_EITHRESHOLD, IMSIC_DISABLE_EITHRESHOLD);
+        imsic_csr_write(IMSIC_EIDELIVERY, IMSIC_DISABLE_EIDELIVERY);
+    }
+}
+
 static void imsic_local_eix_update(unsigned long base_id, unsigned long num_id,
                                    bool pend, bool val)
 {
diff --git a/xen/arch/riscv/include/asm/imsic.h b/xen/arch/riscv/include/asm/imsic.h
index d2c0178529..b2c674f271 100644
--- a/xen/arch/riscv/include/asm/imsic.h
+++ b/xen/arch/riscv/include/asm/imsic.h
@@ -12,6 +12,7 @@
 #define ASM__RISCV__IMSIC_H
 
 #include 
+#include 
 #include 
 
 #define IMSIC_MMIO_PAGE_SHIFT   12
@@ -20,6 +21,10 @@
 #define IMSIC_MIN_ID            63
 #define IMSIC_MAX_ID            2048
 
+#define IMSIC_EIDELIVERY        0x70
+
+#define IMSIC_EITHRESHOLD       0x72
+
 #define IMSIC_EIP0              0x80
 #define IMSIC_EIPx_BITS         32
 
@@ -78,4 +83,6 @@ const struct imsic_config *imsic_get_config(void);
 void imsic_irq_enable(unsigned int hwirq);
 void imsic_irq_disable(unsigned int hwirq);
 
+void imsic_ids_local_delivery(bool enable);
+
 #endif /* ASM__RISCV__IMSIC_H */
diff --git a/xen/arch/riscv/include/asm/intc.h b/xen/arch/riscv/include/asm/intc.h
index db53caa07b..e4363af87d 100644
--- a/xen/arch/riscv/include/asm/intc.h
+++ b/xen/arch/riscv/include/asm/intc.h
@@ -34,6 +34,8 @@ struct intc_hw_operations {
     /* Set IRQ priority */
     void (*set_irq_priority)(struct irq_desc *desc, unsigned int priority);
 
+    /* handle external interrupt */
+    void (*handle_interrupt)(unsigned long cause, struct cpu_user_regs *regs);
 };
 
 void intc_preinit(void);
@@ -45,4 +47,7 @@ void register_intc_ops(const struct intc_hw_operations *ops);
 struct irq_desc;
 void intc_route_irq_to_xen(struct irq_desc *desc, unsigned int priority);
 
+struct cpu_user_regs;
+void intc_handle_external_irqs(unsigned long cause, struct cpu_user_regs *regs);
+
 #endif /* ASM__RISCV__INTERRUPT_CONTOLLER_H */
diff --git a/xen/arch/riscv/include/asm/irq.h b/xen/arch/riscv/include/asm/irq.h
index 163a478d78..9558d3fa61 100644
--- a/xen/arch/riscv/include/asm/irq.h
+++ b/xen/arch/riscv/include/asm/irq.h
@@ -51,6 +51,9 @@ int platform_get_irq(const struct dt_device_node *device, int index);
 
 void init_IRQ(void);
 
+struct cpu_user_regs;
+void do_IRQ(struct cpu_user_regs *regs, unsigned int irq);
+
 #endif /* ASM__RISCV__IRQ_H */
 
 /*
diff --git a/xen/arch/riscv/intc.c b/xen/arch/riscv/intc.c
index 8274897d8c..41a4310ead 100644
--- a/xen/arch/riscv/intc.c
+++ b/xen/arch/riscv/intc.c
@@ -51,6 +51,13 @@ static void intc_set_irq_priority(struct irq_desc *desc, unsigned int priority)
     intc_hw_ops->set_irq_priority(desc, priority);
 }
 
+void intc_handle_external_irqs(unsigned long cause, struct cpu_user_regs *regs)
+{
+    ASSERT(intc_hw_ops && intc_hw_ops->handle_interrupt);
+
+    intc_hw_ops->handle_interrupt(cause, regs);
+}
+
 void intc_route_irq_to_xen(struct irq_desc *desc, unsigned int priority)
 {
     ASSERT(test_bit(_IRQ_DISABLED, &desc->status));
diff --git a/xen/arch/riscv/irq.c b/xen/arch/riscv/irq.c
index c332e000c4..3c0b95220a 100644
--- a/xen/arch/riscv/irq.c
+++ b/xen/arch/riscv/irq.c
@@ -11,6 +11,10 @@
 #include 
 #include 
 #include 
+#include 
+
+#include 
+#include 
 
 static irq_desc_t irq_desc[NR_IRQS];
 
@@ -83,3 +87,42 @@ void __init init_IRQ(void)
     if ( init_irq_data() < 0 )
         panic("initialization of IRQ data failed\n");
 }
+
+/* Dispatch an interrupt */
+void do_IRQ(struct cpu_user_regs *regs, unsigned int irq)
+{
+    struct irq_desc *desc = irq_to_desc(irq);
+    struct irqaction *action;
+
+    irq_enter();
+
+    spin_lock(&desc->lock);
+    desc->handler->ack(desc);
+
+    if ( test_bit(_IRQ_DISABLED, &desc->status) )
+        goto out;
+
+    set_bit(_IRQ_INPROGRESS, &desc->status);
+
+    action = desc->action;
+
+    spin_unlock_irq(&desc->lock);
+
+#ifndef CONFIG_IRQ_HAS_MULTIPLE_ACTION
+    action->handler(irq, action->dev_id);
+#else
+    do {
+        action->handler(irq, action->dev_id);
+        action = action->next;
+    } while ( action );
+#endif /* CONFIG_IRQ_HAS_MULTIPLE_ACTION */
+
+    spin_lock_irq(&desc->lock);
+
+    clear_bit(_IRQ_INPROGRESS, &desc->status);
+
+out:
+    desc->handler->end(desc);
+    spin_unlock(&desc->lock);
+    irq_exit();
+}
diff --git a/xen/arch/riscv/traps.c b/xen/arch/riscv/traps.c
index ea3638a54f..da5813e34a 100644
--- a/xen/arch/riscv/traps.c
+++ b/xen/arch/riscv/traps.c
@@ -11,6 +11,7 @@
 #include 
 #include 
 
+#include 
 #include 
 #include 
 #include 
@@ -128,6 +129,23 @@ void do_trap(struct cpu_user_regs *cpu_regs)
         }
         fallthrough;
     default:
+        if ( cause & CAUSE_IRQ_FLAG )
+        {
+            /* Handle interrupt */
+            unsigned long icause = cause & ~CAUSE_IRQ_FLAG;
+
+            switch ( icause )
+            {
+            case IRQ_S_EXT:
+                intc_handle_external_irqs(cause, cpu_regs);
+                break;
+            default:
+                break;
+            }
+
+            break;
+        }
+
         do_unexpected_trap(cpu_regs);
         break;
     }
-- 
2.49.0



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        Tue, 08 Apr 2025 08:57:37 -0700 (PDT)
From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Romain Caritey 
Subject: [PATCH v1 12/14] xen/riscv: implement setup_irq()
Date: Tue,  8 Apr 2025 17:57:17 +0200
Message-ID: <2bc37c3996978129a5b2c888917307ea32448651.1744126720.git.oleksii.kurochko@gmail.com>
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Introduce support for IRQ setup on RISC-V by implementing `setup_irq()` and
`__setup_irq()`, adapted and extended from an initial implementation by [1].

__setup_irq() does the following:
  - Sets up an IRQ action.
  - Validates that shared IRQs have non-NULL `dev_id` and are only used when
    existing handlers allow sharing.
  - Uses `smp_mb()` to enforce memory ordering after assigning `desc->action`
    to ensure visibility before enabling the IRQ.
  - Supports multi-action setups via `CONFIG_IRQ_HAS_MULTIPLE_ACTION`.

setup_irq() does the following:
  - Converts IRQ number to descriptor and acquires its lock.
  - Rejects registration if the IRQ is already assigned to a guest domain,
    printing an error.
  - Delegates the core setup to `__setup_irq()`.
  - On first-time setup, disables the IRQ, routes it to Xen using
    `intc_route_irq_to_xen()`, sets default CPU affinity (current CPU),
    calls the handler’s startup routine, and finally enables the IRQ.

irq_set_affinity() invokes `set_affinity` callback from the IRQ handler
if present.

Defined `IRQ_NO_PRIORITY` as default priority used when routing IRQs to Xen.

[1] https://gitlab.com/xen-project/people/olkur/xen/-/commit/7390e2365828b83e27ead56b03114a56e3699dd5

Co-developed-by: Romain Caritey 
Signed-off-by: Oleksii Kurochko 
---
 xen/arch/riscv/include/asm/irq.h |  6 ++
 xen/arch/riscv/irq.c             | 95 ++++++++++++++++++++++++++++++++
 2 files changed, 101 insertions(+)

diff --git a/xen/arch/riscv/include/asm/irq.h b/xen/arch/riscv/include/asm/irq.h
index 9558d3fa61..bba3a97e3e 100644
--- a/xen/arch/riscv/include/asm/irq.h
+++ b/xen/arch/riscv/include/asm/irq.h
@@ -26,6 +26,8 @@
 #define IRQ_TYPE_SENSE_MASK     DT_IRQ_TYPE_SENSE_MASK
 #define IRQ_TYPE_INVALID        DT_IRQ_TYPE_INVALID
 
+#define IRQ_NO_PRIORITY 0
+
 /* TODO */
 #define nr_static_irqs 0
 #define arch_hwdom_irqs(domid) 0U
@@ -54,6 +56,10 @@ void init_IRQ(void);
 struct cpu_user_regs;
 void do_IRQ(struct cpu_user_regs *regs, unsigned int irq);
 
+struct irq_desc;
+struct cpumask_t;
+void irq_set_affinity(struct irq_desc *desc, const cpumask_t *cpu_mask);
+
 #endif /* ASM__RISCV__IRQ_H */
 
 /*
diff --git a/xen/arch/riscv/irq.c b/xen/arch/riscv/irq.c
index 3c0b95220a..1e937d4306 100644
--- a/xen/arch/riscv/irq.c
+++ b/xen/arch/riscv/irq.c
@@ -6,7 +6,9 @@
  * Copyright (c) 2024 Vates
  */
 
+#include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -57,6 +59,99 @@ int platform_get_irq(const struct dt_device_node *device, int index)
     return dt_irq.irq;
 }
 
+static int __setup_irq(struct irq_desc *desc, unsigned int irqflags,
+                       struct irqaction *new)
+{
+    bool shared = irqflags & IRQF_SHARED;
+
+    ASSERT(new != NULL);
+
+    /* Sanity checks:
+     *  - if the IRQ is marked as shared
+     *  - dev_id is not NULL when IRQF_SHARED is set
+     */
+    if ( desc->action != NULL && (!test_bit(_IRQF_SHARED, &desc->status)
+         || !shared) )
+        return -EINVAL;
+    if ( shared && new->dev_id == NULL )
+        return -EINVAL;
+
+    if ( shared )
+        set_bit(_IRQF_SHARED, &desc->status);
+
+#ifdef CONFIG_IRQ_HAS_MULTIPLE_ACTION
+    new->next = desc->action;
+    smp_mb();
+#endif
+
+    desc->action = new;
+    smp_mb();
+
+    return 0;
+}
+
+void irq_set_affinity(struct irq_desc *desc, const cpumask_t *cpu_mask)
+{
+    if ( desc != NULL )
+        desc->handler->set_affinity(desc, cpu_mask);
+}
+
+int setup_irq(unsigned int irq, unsigned int irqflags, struct irqaction *new)
+{
+    int rc;
+    unsigned long flags;
+    struct irq_desc *desc;
+    bool disabled;
+
+    desc = irq_to_desc(irq);
+
+    spin_lock_irqsave(&desc->lock, flags);
+
+    disabled = (desc->action == NULL);
+
+    if ( test_bit(_IRQ_GUEST, &desc->status) )
+    {
+        spin_unlock_irqrestore(&desc->lock, flags);
+        /*
+         * TODO: would be nice to have functionality to print which domain owns
+         *       an IRQ.
+         */
+        printk(XENLOG_ERR "ERROR: IRQ %u is already in use by a domain\n", irq);
+        return -EBUSY;
+    }
+
+    rc = __setup_irq(desc, irqflags, new);
+    if ( rc )
+        goto err;
+
+    /* First time the IRQ is setup */
+    if ( disabled )
+    {
+        /* disable irq by default */
+        set_bit(_IRQ_DISABLED, &desc->status);
+
+        /* route interrupt to xen */
+        intc_route_irq_to_xen(desc, IRQ_NO_PRIORITY);
+
+        /*
+         * we don't care for now which CPU will receive the
+         * interrupt
+         *
+         * TODO: Handle case where IRQ is setup on different CPU than
+         * the targeted CPU and the priority.
+         */
+        irq_set_affinity(desc, cpumask_of(smp_processor_id()));
+        desc->handler->startup(desc);
+        /* enable irq */
+        clear_bit(_IRQ_DISABLED, &desc->status);
+    }
+
+err:
+    spin_unlock_irqrestore(&desc->lock, flags);
+
+    return rc;
+}
+
 int arch_init_one_irq_desc(struct irq_desc *desc)
 {
     desc->arch.type = IRQ_TYPE_INVALID;
-- 
2.49.0



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Feedback-ID: i1568416f:Fastmail
Date: Tue, 8 Apr 2025 17:28:53 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Jan Beulich 
Cc: Andrew Cooper ,
	Roger Pau =?utf-8?B?TW9ubsOp?= ,
	Anthony PERARD ,
	Juergen Gross , xen-devel@lists.xenproject.org
Subject: Re: [PATCH] libxl+hvmloader: extend IGD check part 2
Message-ID: 
References: <20250408132333.1524246-2-marmarek@invisiblethingslab.com>
 <7c8cfe6d-6d61-44e5-b1ba-8a7795424977@suse.com>
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--3jsD0fORVQM/ufCO
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Date: Tue, 8 Apr 2025 17:28:53 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Jan Beulich 
Cc: Andrew Cooper ,
	Roger Pau =?utf-8?B?TW9ubsOp?= ,
	Anthony PERARD ,
	Juergen Gross , xen-devel@lists.xenproject.org
Subject: Re: [PATCH] libxl+hvmloader: extend IGD check part 2

On Tue, Apr 08, 2025 at 04:11:36PM +0200, Jan Beulich wrote:
> On 08.04.2025 15:23, Marek Marczykowski-G=C3=B3recki wrote:
> > --- a/tools/firmware/hvmloader/pci.c
> > +++ b/tools/firmware/hvmloader/pci.c
> > @@ -173,6 +173,7 @@ void pci_setup(void)
> >          switch ( class )
> >          {
> >          case 0x0300:
> > +        case 0x0380:
> >              /* If emulated VGA is found, preserve it as primary VGA. */
> >              if ( (vendor_id =3D=3D 0x1234) && (device_id =3D=3D 0x1111=
) )
> >              {
>=20
> Unlike here, where vendor IDs are subsequently checked (and the sole ques=
tion
> that arises is whether any of the combinations can actually come as Displ=
ay
> rather than VGA), ...
>=20
> > --- a/tools/libs/light/libxl_pci.c
> > +++ b/tools/libs/light/libxl_pci.c
> > @@ -2575,7 +2575,8 @@ int libxl__grant_vga_iomem_permission(libxl__gc *=
gc, const uint32_t domid,
> > =20
> >          if (sysfs_dev_get_class(gc, pci, &pci_device_class))
> >              continue;
> > -        if (pci_device_class !=3D 0x030000) /* VGA class */
> > +        if (pci_device_class !=3D 0x030000 && /* VGA class */
> > +                pci_device_class !=3D 0x038000) /* Display class */
> >              continue;
>=20
> ... there's no such checking here, and instead very much VGA-specific thi=
ngs
> are being done then. Is that really in line with permitting Display class
> devices here as well?

Well, it was necessary to get IGD passthrough working. But I think
upstream Xen still doesn't have all the pieces here. Specifically,
Qubes's version includes (a variant of)
https://lore.kernel.org/xen-devel/87d74a21bde95cfc7c53fad56bf8f0e47724953e.=
1592171394.git.gorbak25@gmail.com/T/#m8644141760ee36d691434dfaf550311104929=
29b
and that adds here access not only to the video memory, but also vbios,
which was needed to get it working.

Anyway, this code is reachable only if gfx_passthrou is enabled and
currently this option is specific to IGD.

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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From: Alexander Gordeev 
To: Andrew Morton ,
        Andrey Ryabinin 
Cc: Hugh Dickins , Nicholas Piggin ,
        Guenter Roeck , Juergen Gross ,
        Jeremy Fitzhardinge , linux-kernel@vger.kernel.org,
        linux-mm@kvack.org, kasan-dev@googlegroups.com,
        sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org,
        linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org,
        stable@vger.kernel.org
Subject: [PATCH v2 1/3] kasan: Avoid sleepable page allocation from atomic context
Date: Tue,  8 Apr 2025 18:07:30 +0200
Message-ID: <2d9f4ac4528701b59d511a379a60107fa608ad30.1744128123.git.agordeev@linux.ibm.com>
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apply_to_page_range() enters lazy MMU mode and then invokes
kasan_populate_vmalloc_pte() callback on each page table walk
iteration. The lazy MMU mode may only be entered only under
protection of the page table lock. However, the callback can
go into sleep when trying to allocate a single page.

Change __get_free_page() allocation mode from GFP_KERNEL to
GFP_ATOMIC to avoid scheduling out while in atomic context.

Cc: stable@vger.kernel.org
Fixes: 3c5c3cfb9ef4 ("kasan: support backing vmalloc space with real shadow memory")
Signed-off-by: Alexander Gordeev 
---
 mm/kasan/shadow.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/mm/kasan/shadow.c b/mm/kasan/shadow.c
index 88d1c9dcb507..edfa77959474 100644
--- a/mm/kasan/shadow.c
+++ b/mm/kasan/shadow.c
@@ -301,7 +301,7 @@ static int kasan_populate_vmalloc_pte(pte_t *ptep, unsigned long addr,
 	if (likely(!pte_none(ptep_get(ptep))))
 		return 0;
 
-	page = __get_free_page(GFP_KERNEL);
+	page = __get_free_page(GFP_ATOMIC);
 	if (!page)
 		return -ENOMEM;
 
-- 
2.45.2



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From: Alexander Gordeev 
To: Andrew Morton ,
        Andrey Ryabinin 
Cc: Hugh Dickins , Nicholas Piggin ,
        Guenter Roeck , Juergen Gross ,
        Jeremy Fitzhardinge , linux-kernel@vger.kernel.org,
        linux-mm@kvack.org, kasan-dev@googlegroups.com,
        sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org,
        linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org,
        stable@vger.kernel.org
Subject: [PATCH v2 2/3] mm: Cleanup apply_to_pte_range() routine
Date: Tue,  8 Apr 2025 18:07:31 +0200
Message-ID: <0c65bc334f17ff1d7d92d31c69d7065769bbce4e.1744128123.git.agordeev@linux.ibm.com>
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Reverse 'create' vs 'mm == &init_mm' conditions and move
page table mask modification out of the atomic context.
This is a prerequisite for fixing missing kernel page
tables lock.

Cc: stable@vger.kernel.org
Fixes: 38e0edb15bd0 ("mm/apply_to_range: call pte function with lazy updates")
Signed-off-by: Alexander Gordeev 
---
 mm/memory.c | 28 +++++++++++++++++-----------
 1 file changed, 17 insertions(+), 11 deletions(-)

diff --git a/mm/memory.c b/mm/memory.c
index 2d8c265fc7d6..f0201c8ec1ce 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -2915,24 +2915,28 @@ static int apply_to_pte_range(struct mm_struct *mm, pmd_t *pmd,
 				     pte_fn_t fn, void *data, bool create,
 				     pgtbl_mod_mask *mask)
 {
+	int err = create ? -ENOMEM : -EINVAL;
 	pte_t *pte, *mapped_pte;
-	int err = 0;
 	spinlock_t *ptl;
 
-	if (create) {
-		mapped_pte = pte = (mm == &init_mm) ?
-			pte_alloc_kernel_track(pmd, addr, mask) :
-			pte_alloc_map_lock(mm, pmd, addr, &ptl);
+	if (mm == &init_mm) {
+		if (create)
+			pte = pte_alloc_kernel_track(pmd, addr, mask);
+		else
+			pte = pte_offset_kernel(pmd, addr);
 		if (!pte)
-			return -ENOMEM;
+			return err;
 	} else {
-		mapped_pte = pte = (mm == &init_mm) ?
-			pte_offset_kernel(pmd, addr) :
-			pte_offset_map_lock(mm, pmd, addr, &ptl);
+		if (create)
+			pte = pte_alloc_map_lock(mm, pmd, addr, &ptl);
+		else
+			pte = pte_offset_map_lock(mm, pmd, addr, &ptl);
 		if (!pte)
-			return -EINVAL;
+			return err;
+		mapped_pte = pte;
 	}
 
+	err = 0;
 	arch_enter_lazy_mmu_mode();
 
 	if (fn) {
@@ -2944,12 +2948,14 @@ static int apply_to_pte_range(struct mm_struct *mm, pmd_t *pmd,
 			}
 		} while (addr += PAGE_SIZE, addr != end);
 	}
-	*mask |= PGTBL_PTE_MODIFIED;
 
 	arch_leave_lazy_mmu_mode();
 
 	if (mm != &init_mm)
 		pte_unmap_unlock(mapped_pte, ptl);
+
+	*mask |= PGTBL_PTE_MODIFIED;
+
 	return err;
 }
 
-- 
2.45.2



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From: Alexander Gordeev 
To: Andrew Morton ,
        Andrey Ryabinin 
Cc: Hugh Dickins , Nicholas Piggin ,
        Guenter Roeck , Juergen Gross ,
        Jeremy Fitzhardinge , linux-kernel@vger.kernel.org,
        linux-mm@kvack.org, kasan-dev@googlegroups.com,
        sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org,
        linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org,
        stable@vger.kernel.org
Subject: [PATCH v2 0/3] mm: Fix apply_to_pte_range() vs lazy MMU mode
Date: Tue,  8 Apr 2025 18:07:29 +0200
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Hi All,

Chages since v1:
- left fixes only, improvements will be posted separately;
- Fixes: and -stable tags added to patch descriptions;

This series is an attempt to fix the violation of lazy MMU mode context
requirement as described for arch_enter_lazy_mmu_mode():

    This mode can only be entered and left under the protection of
    the page table locks for all page tables which may be modified.

On s390 if I make arch_enter_lazy_mmu_mode() -> preempt_enable() and
arch_leave_lazy_mmu_mode() -> preempt_disable() I am getting this:

    [  553.332108] preempt_count: 1, expected: 0
    [  553.332117] no locks held by multipathd/2116.
    [  553.332128] CPU: 24 PID: 2116 Comm: multipathd Kdump: loaded Tainted:
    [  553.332139] Hardware name: IBM 3931 A01 701 (LPAR)
    [  553.332146] Call Trace:
    [  553.332152]  [<00000000158de23a>] dump_stack_lvl+0xfa/0x150
    [  553.332167]  [<0000000013e10d12>] __might_resched+0x57a/0x5e8
    [  553.332178]  [<00000000144eb6c2>] __alloc_pages+0x2ba/0x7c0
    [  553.332189]  [<00000000144d5cdc>] __get_free_pages+0x2c/0x88
    [  553.332198]  [<00000000145663f6>] kasan_populate_vmalloc_pte+0x4e/0x110
    [  553.332207]  [<000000001447625c>] apply_to_pte_range+0x164/0x3c8
    [  553.332218]  [<000000001448125a>] apply_to_pmd_range+0xda/0x318
    [  553.332226]  [<000000001448181c>] __apply_to_page_range+0x384/0x768
    [  553.332233]  [<0000000014481c28>] apply_to_page_range+0x28/0x38
    [  553.332241]  [<00000000145665da>] kasan_populate_vmalloc+0x82/0x98
    [  553.332249]  [<00000000144c88d0>] alloc_vmap_area+0x590/0x1c90
    [  553.332257]  [<00000000144ca108>] __get_vm_area_node.constprop.0+0x138/0x260
    [  553.332265]  [<00000000144d17fc>] __vmalloc_node_range+0x134/0x360
    [  553.332274]  [<0000000013d5dbf2>] alloc_thread_stack_node+0x112/0x378
    [  553.332284]  [<0000000013d62726>] dup_task_struct+0x66/0x430
    [  553.332293]  [<0000000013d63962>] copy_process+0x432/0x4b80
    [  553.332302]  [<0000000013d68300>] kernel_clone+0xf0/0x7d0
    [  553.332311]  [<0000000013d68bd6>] __do_sys_clone+0xae/0xc8
    [  553.332400]  [<0000000013d68dee>] __s390x_sys_clone+0xd6/0x118
    [  553.332410]  [<0000000013c9d34c>] do_syscall+0x22c/0x328
    [  553.332419]  [<00000000158e7366>] __do_syscall+0xce/0xf0
    [  553.332428]  [<0000000015913260>] system_call+0x70/0x98

This exposes a KASAN issue fixed with patch 1 and apply_to_pte_range()
issue fixed with patch 3, while patch 2 is a prerequisite.

Commit b9ef323ea168 ("powerpc/64s: Disable preemption in hash lazy mmu
mode") looks like powerpc-only fix, yet not entirely conforming to the
above provided requirement (page tables itself are still not protected).
If I am not mistaken, xen and sparc are alike.

Thanks!

Alexander Gordeev (3):
  kasan: Avoid sleepable page allocation from atomic context
  mm: Cleanup apply_to_pte_range() routine
  mm: Protect kernel pgtables in apply_to_pte_range()

 mm/kasan/shadow.c |  9 +++------
 mm/memory.c       | 33 +++++++++++++++++++++------------
 2 files changed, 24 insertions(+), 18 deletions(-)

-- 
2.45.2



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From: Alexander Gordeev 
To: Andrew Morton ,
        Andrey Ryabinin 
Cc: Hugh Dickins , Nicholas Piggin ,
        Guenter Roeck , Juergen Gross ,
        Jeremy Fitzhardinge , linux-kernel@vger.kernel.org,
        linux-mm@kvack.org, kasan-dev@googlegroups.com,
        sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org,
        linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org,
        stable@vger.kernel.org
Subject: [PATCH v2 3/3] mm: Protect kernel pgtables in apply_to_pte_range()
Date: Tue,  8 Apr 2025 18:07:32 +0200
Message-ID: 
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The lazy MMU mode can only be entered and left under the protection
of the page table locks for all page tables which may be modified.
Yet, when it comes to kernel mappings apply_to_pte_range() does not
take any locks. That does not conform arch_enter|leave_lazy_mmu_mode()
semantics and could potentially lead to re-schedulling a process while
in lazy MMU mode or racing on a kernel page table updates.

Cc: stable@vger.kernel.org
Fixes: 38e0edb15bd0 ("mm/apply_to_range: call pte function with lazy updates")
Signed-off-by: Alexander Gordeev 
---
 mm/kasan/shadow.c | 7 ++-----
 mm/memory.c       | 5 ++++-
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/mm/kasan/shadow.c b/mm/kasan/shadow.c
index edfa77959474..6531a7aa8562 100644
--- a/mm/kasan/shadow.c
+++ b/mm/kasan/shadow.c
@@ -308,14 +308,14 @@ static int kasan_populate_vmalloc_pte(pte_t *ptep, unsigned long addr,
 	__memset((void *)page, KASAN_VMALLOC_INVALID, PAGE_SIZE);
 	pte = pfn_pte(PFN_DOWN(__pa(page)), PAGE_KERNEL);
 
-	spin_lock(&init_mm.page_table_lock);
 	if (likely(pte_none(ptep_get(ptep)))) {
 		set_pte_at(&init_mm, addr, ptep, pte);
 		page = 0;
 	}
-	spin_unlock(&init_mm.page_table_lock);
+
 	if (page)
 		free_page(page);
+
 	return 0;
 }
 
@@ -401,13 +401,10 @@ static int kasan_depopulate_vmalloc_pte(pte_t *ptep, unsigned long addr,
 
 	page = (unsigned long)__va(pte_pfn(ptep_get(ptep)) << PAGE_SHIFT);
 
-	spin_lock(&init_mm.page_table_lock);
-
 	if (likely(!pte_none(ptep_get(ptep)))) {
 		pte_clear(&init_mm, addr, ptep);
 		free_page(page);
 	}
-	spin_unlock(&init_mm.page_table_lock);
 
 	return 0;
 }
diff --git a/mm/memory.c b/mm/memory.c
index f0201c8ec1ce..1f3727104e99 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -2926,6 +2926,7 @@ static int apply_to_pte_range(struct mm_struct *mm, pmd_t *pmd,
 			pte = pte_offset_kernel(pmd, addr);
 		if (!pte)
 			return err;
+		spin_lock(&init_mm.page_table_lock);
 	} else {
 		if (create)
 			pte = pte_alloc_map_lock(mm, pmd, addr, &ptl);
@@ -2951,7 +2952,9 @@ static int apply_to_pte_range(struct mm_struct *mm, pmd_t *pmd,
 
 	arch_leave_lazy_mmu_mode();
 
-	if (mm != &init_mm)
+	if (mm == &init_mm)
+		spin_unlock(&init_mm.page_table_lock);
+	else
 		pte_unmap_unlock(mapped_pte, ptl);
 
 	*mask |= PGTBL_PTE_MODIFIED;
-- 
2.45.2



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From: Alejandro Vallejo 
To: 
CC: Alejandro Vallejo , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" , Michal Orzel
	, "Jan Beulich" , Andrew Cooper
	, =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Anthony PERARD , Julien
 Grall , "Daniel P. Smith" ,
	Bertrand Marquis 
Subject: [PATCH v3 00/16] Hyperlaunch device tree for dom0
Date: Tue, 8 Apr 2025 17:07:22 +0100
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Hi,

This is an updated version of the hyperlaunch DTB series, with pending
feedback addressed. Some parts (notably the way modules are located) has
changed a little and is more generic with less duplication.

I've purposefully not added my S-by on anything I haven't touched
(besides rebasing) as most of the feedback had already been addressed by
Jason by the time I looked at it and it would be utterly nonsensical to
give myself authorship over it.

I'll be looking after the series moving forward.

v3 pipeline: https://gitlab.com/xen-project/people/agvallejo/xen/-/pipelines/1758167851

v2: https://lore.kernel.org/xen-devel/20241226165740.29812-1-dpsmith@apertussolutions.com/
v1: https://lore.kernel.org/xen-devel/20241123182044.30687-1-dpsmith@apertussolutions.com/

Cheers,
Alejandro

========= Original cover letter:

The Hyperlaunch device tree for dom0 series is the second split out for the
introduction of the Hyperlaunch domain builder logic. These changes focus on
introducing the ability to express a domain configuration that is then used to
populate the struct boot_domain structure for dom0. This ability to express a
domain configuration provides the next step towards a general domain builder.

The splitting of Hyperlaunch into a set of series are twofold, to reduce the
effort in reviewing a much larger series, and to reduce the effort in handling
the knock-on effects to the construction logic from requested review changes.

=========

Alejandro Vallejo (1):
  x86/hyperlaunch: Add helpers to locate multiboot modules

Daniel P. Smith (15):
  x86/boot: introduce boot domain
  x86/boot: introduce domid field to struct boot_domain
  x86/boot: add cmdline to struct boot_domain
  kconfig: introduce option to independently enable libfdt
  kconfig: introduce domain builder config option
  x86/hyperlaunch: introduce the domain builder
  x86/hyperlaunch: initial support for hyperlaunch device tree
  x86/hyperlaunch: locate dom0 kernel with hyperlaunch
  x86/hyperlaunch: obtain cmdline from device tree
  x86/hyperlaunch: locate dom0 initrd with hyperlaunch
  x86/hyperlaunch: add domain id parsing to domain config
  x86/hyperlaunch: specify dom0 mode with device tree
  x86/hyperlaunch: add memory parsing to domain config
  x86/hyperlaunch: add max vcpu parsing of hyperlaunch device tree
  x86/hyperlaunch: add capabilities to boot domain

 xen/arch/x86/Kconfig                      |   2 +
 xen/arch/x86/Makefile                     |   1 +
 xen/arch/x86/dom0_build.c                 |  19 +-
 xen/arch/x86/domain-builder/Kconfig       |  15 +
 xen/arch/x86/domain-builder/Makefile      |   2 +
 xen/arch/x86/domain-builder/core.c        | 112 ++++++
 xen/arch/x86/domain-builder/fdt.c         | 448 ++++++++++++++++++++++
 xen/arch/x86/domain-builder/fdt.h         |  53 +++
 xen/arch/x86/hvm/dom0_build.c             |  35 +-
 xen/arch/x86/include/asm/boot-domain.h    |  48 +++
 xen/arch/x86/include/asm/bootinfo.h       |  15 +-
 xen/arch/x86/include/asm/dom0_build.h     |   6 +-
 xen/arch/x86/include/asm/domain-builder.h |  12 +
 xen/arch/x86/include/asm/setup.h          |   4 +-
 xen/arch/x86/pv/dom0_build.c              |  28 +-
 xen/arch/x86/setup.c                      | 106 +++--
 xen/common/Kconfig                        |   4 +
 xen/common/Makefile                       |   2 +-
 xen/include/xen/libfdt/libfdt-xen.h       | 101 +++++
 19 files changed, 927 insertions(+), 86 deletions(-)
 create mode 100644 xen/arch/x86/domain-builder/Kconfig
 create mode 100644 xen/arch/x86/domain-builder/Makefile
 create mode 100644 xen/arch/x86/domain-builder/core.c
 create mode 100644 xen/arch/x86/domain-builder/fdt.c
 create mode 100644 xen/arch/x86/domain-builder/fdt.h
 create mode 100644 xen/arch/x86/include/asm/boot-domain.h
 create mode 100644 xen/arch/x86/include/asm/domain-builder.h

-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" , Michal Orzel
	, "Jan Beulich" , Andrew Cooper
	, =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, "Alejandro Vallejo" 
Subject: [PATCH v3 03/16] x86/boot: add cmdline to struct boot_domain
Date: Tue, 8 Apr 2025 17:07:25 +0100
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From: "Daniel P. Smith" 

Add a container for the "cooked" command line for a domain. This
provides for the backing memory to be directly associated with the
domain being constructed.  This is done in anticipation that the domain
construction path may need to be invoked multiple times, thus ensuring
each instance had a distinct memory allocation.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
---
No changes on ACPI cmdline handling on PVH, as it's orthogonal to the
purpose of this patch.

v3:
  * s/xfree/XFREE/ on failed construct_dom0() to avoid a dangling
cmdline ptr.
  * Re-flow hvm_copy_to_guest_phys() into a multi-line call.
  * s/bd->cmdline != NULL/b->cmdline/ (to homogenise with the previous
    cmdline pointer check)
---
 xen/arch/x86/hvm/dom0_build.c          | 12 +++----
 xen/arch/x86/include/asm/boot-domain.h |  1 +
 xen/arch/x86/pv/dom0_build.c           |  4 +--
 xen/arch/x86/setup.c                   | 50 +++++++++++++++++++-------
 4 files changed, 47 insertions(+), 20 deletions(-)

diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build.c
index 2a094b3145..ebad5a49b8 100644
--- a/xen/arch/x86/hvm/dom0_build.c
+++ b/xen/arch/x86/hvm/dom0_build.c
@@ -653,7 +653,6 @@ static int __init pvh_load_kernel(
     void *image_start = image_base + image->headroom;
     unsigned long image_len = image->size;
     unsigned long initrd_len = initrd ? initrd->size : 0;
-    const char *cmdline = image->cmdline_pa ? __va(image->cmdline_pa) : NULL;
     const char *initrd_cmdline = NULL;
     struct elf_binary elf;
     struct elf_dom_parms parms;
@@ -736,8 +735,8 @@ static int __init pvh_load_kernel(
             initrd = NULL;
     }
 
-    if ( cmdline )
-        extra_space += elf_round_up(&elf, strlen(cmdline) + 1);
+    if ( bd->cmdline )
+        extra_space += elf_round_up(&elf, strlen(bd->cmdline) + 1);
 
     last_addr = find_memory(d, &elf, extra_space);
     if ( last_addr == INVALID_PADDR )
@@ -778,9 +777,10 @@ static int __init pvh_load_kernel(
     /* Free temporary buffers. */
     free_boot_modules();
 
-    if ( cmdline != NULL )
+    if ( bd->cmdline )
     {
-        rc = hvm_copy_to_guest_phys(last_addr, cmdline, strlen(cmdline) + 1, v);
+        rc = hvm_copy_to_guest_phys(last_addr, bd->cmdline,
+                                    strlen(bd->cmdline) + 1, v);
         if ( rc )
         {
             printk("Unable to copy guest command line\n");
@@ -791,7 +791,7 @@ static int __init pvh_load_kernel(
          * Round up to 32/64 bits (depending on the guest kernel bitness) so
          * the modlist/start_info is aligned.
          */
-        last_addr += elf_round_up(&elf, strlen(cmdline) + 1);
+        last_addr += elf_round_up(&elf, strlen(bd->cmdline) + 1);
     }
     if ( initrd != NULL )
     {
diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/include/asm/boot-domain.h
index fcbedda0f0..d7c6042e25 100644
--- a/xen/arch/x86/include/asm/boot-domain.h
+++ b/xen/arch/x86/include/asm/boot-domain.h
@@ -15,6 +15,7 @@ struct boot_domain {
 
     struct boot_module *kernel;
     struct boot_module *module;
+    const char *cmdline;
 
     struct domain *d;
 };
diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c
index b485eea05f..e1b78d47c2 100644
--- a/xen/arch/x86/pv/dom0_build.c
+++ b/xen/arch/x86/pv/dom0_build.c
@@ -972,8 +972,8 @@ static int __init dom0_construct(const struct boot_domain *bd)
     }
 
     memset(si->cmd_line, 0, sizeof(si->cmd_line));
-    if ( image->cmdline_pa )
-        strlcpy((char *)si->cmd_line, __va(image->cmdline_pa), sizeof(si->cmd_line));
+    if ( bd->cmdline )
+        strlcpy((char *)si->cmd_line, bd->cmdline, sizeof(si->cmd_line));
 
 #ifdef CONFIG_VIDEO
     if ( !pv_shim && fill_console_start_info((void *)(si + 1)) )
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 585316f1ca..83cb66e309 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -978,10 +978,30 @@ static unsigned int __init copy_bios_e820(struct e820entry *map, unsigned int li
     return n;
 }
 
-static struct domain *__init create_dom0(struct boot_info *bi)
+static size_t __init domain_cmdline_size(
+    struct boot_info *bi, struct boot_domain *bd)
 {
-    static char __initdata cmdline[MAX_GUEST_CMDLINE];
+    size_t s = bi->kextra ? strlen(bi->kextra) : 0;
+
+    s += bd->kernel->cmdline_pa ? strlen(__va(bd->kernel->cmdline_pa)) : 0;
 
+    if ( s == 0 )
+        return s;
+
+    /*
+     * Certain parameters from the Xen command line may be added to the dom0
+     * command line. Add additional space for the possible cases along with one
+     * extra char to hold \0.
+     */
+    s += strlen(" noapic") + strlen(" acpi=") + sizeof(acpi_param) + 1;
+
+    return s;
+}
+
+static struct domain *__init create_dom0(struct boot_info *bi)
+{
+    char *cmdline = NULL;
+    size_t cmdline_size;
     struct xen_domctl_createdomain dom0_cfg = {
         .flags = IS_ENABLED(CONFIG_TBOOT) ? XEN_DOMCTL_CDF_s3_integrity : 0,
         .max_evtchn_port = -1,
@@ -1020,20 +1040,24 @@ static struct domain *__init create_dom0(struct boot_info *bi)
     if ( alloc_dom0_vcpu0(d) == NULL )
         panic("Error creating %pd vcpu 0\n", d);
 
-    /* Grab the DOM0 command line. */
-    if ( bd->kernel->cmdline_pa || bi->kextra )
+    cmdline_size = domain_cmdline_size(bi, bd);
+    if ( cmdline_size )
     {
+        if ( !(cmdline = xzalloc_array(char, cmdline_size)) )
+            panic("Error allocating cmdline buffer for %pd\n", d);
+
         if ( bd->kernel->cmdline_pa )
-            safe_strcpy(cmdline,
-                        cmdline_cook(__va(bd->kernel->cmdline_pa), bi->loader));
+            strlcpy(cmdline,
+                    cmdline_cook(__va(bd->kernel->cmdline_pa), bi->loader),
+                    cmdline_size);
 
         if ( bi->kextra )
             /* kextra always includes exactly one leading space. */
-            safe_strcat(cmdline, bi->kextra);
+            strlcat(cmdline, bi->kextra, cmdline_size);
 
         /* Append any extra parameters. */
         if ( skip_ioapic_setup && !strstr(cmdline, "noapic") )
-            safe_strcat(cmdline, " noapic");
+            strlcat(cmdline, " noapic", cmdline_size);
 
         if ( (strlen(acpi_param) == 0) && acpi_disabled )
         {
@@ -1043,17 +1067,19 @@ static struct domain *__init create_dom0(struct boot_info *bi)
 
         if ( (strlen(acpi_param) != 0) && !strstr(cmdline, "acpi=") )
         {
-            safe_strcat(cmdline, " acpi=");
-            safe_strcat(cmdline, acpi_param);
+            strlcat(cmdline, " acpi=", cmdline_size);
+            strlcat(cmdline, acpi_param, cmdline_size);
         }
-
-        bd->kernel->cmdline_pa = __pa(cmdline);
+        bd->kernel->cmdline_pa = 0;
+        bd->cmdline = cmdline;
     }
 
     bd->d = d;
     if ( construct_dom0(bd) != 0 )
         panic("Could not construct domain 0\n");
 
+    XFREE(cmdline);
+
     return d;
 }
 
-- 
2.43.0



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Subject: [PATCH v3 04/16] kconfig: introduce option to independently enable libfdt
Date: Tue, 8 Apr 2025 17:07:26 +0100
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From: "Daniel P. Smith" 

Currently, the inclusion of libfdt is controlled by the CONFIG_HAS_DEVICE_TREE
kconfig flag. This flag also changes behavior in a few places, such as boot
module processing for XSM. To support the ability to include libfdt without
changing these behaviors, introduce CONFIG_LIBFDT. The inclusion of
libfdt is then moved under CONFIG_LIBFDT.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Jason Andryuk 
---
v3:
    * Use CONFIG_LIBFDT instead of CONFIG_HAS_DEVICET_TREE
---
 xen/common/Kconfig  | 4 ++++
 xen/common/Makefile | 2 +-
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/xen/common/Kconfig b/xen/common/Kconfig
index 06ae9751aa..00f74b1e32 100644
--- a/xen/common/Kconfig
+++ b/xen/common/Kconfig
@@ -72,6 +72,7 @@ config HAS_COMPAT
 
 config HAS_DEVICE_TREE
 	bool
+	select LIBFDT
 
 config HAS_DIT # Data Independent Timing
 	bool
@@ -106,6 +107,9 @@ config HAS_UBSAN
 config HAS_VMAP
 	bool
 
+config LIBFDT
+	bool
+
 config MEM_ACCESS_ALWAYS_ON
 	bool
 
diff --git a/xen/common/Makefile b/xen/common/Makefile
index 9da8a7244d..5a9041b0ee 100644
--- a/xen/common/Makefile
+++ b/xen/common/Makefile
@@ -79,7 +79,7 @@ obj-y += sched/
 obj-$(CONFIG_UBSAN) += ubsan/
 
 obj-$(CONFIG_NEEDS_LIBELF) += libelf/
-obj-$(CONFIG_HAS_DEVICE_TREE) += libfdt/
+obj-$(CONFIG_LIBFDT) += libfdt/
 
 CONF_FILE := $(if $(patsubst /%,,$(KCONFIG_CONFIG)),$(objtree)/)$(KCONFIG_CONFIG)
 $(obj)/config.gz: $(CONF_FILE)
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" , Michal Orzel
	, "Jan Beulich" , Andrew Cooper
	, =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	
Subject: [PATCH v3 06/16] x86/hyperlaunch: introduce the domain builder
Date: Tue, 8 Apr 2025 17:07:28 +0100
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From: "Daniel P. Smith" 

Introduce the domain builder which is capable of consuming a device tree as the
first boot module. If it finds a device tree as the first boot module, it will
set its type to BOOTMOD_FDT. This change only detects the boot module and
continues to boot with slight change to the boot convention that the dom0
kernel is no longer first boot module but is the second.

No functional change intended.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Jason Andryuk 
---
v3:
    * Move obj-y += domain-builder/
    * Remove blank line in Makefile
    * const in has_hyperlaunch_fdt()
    * CONFIG_LIBFDT rename
    * Use boot_info forward declaration
    * Rename domainbuilder.h to domain-builder.h
    * Add fdt NULL check
---
 xen/arch/x86/Makefile                     |  1 +
 xen/arch/x86/domain-builder/Kconfig       |  2 +-
 xen/arch/x86/domain-builder/Makefile      |  2 +
 xen/arch/x86/domain-builder/core.c        | 57 +++++++++++++++++++++++
 xen/arch/x86/domain-builder/fdt.c         | 37 +++++++++++++++
 xen/arch/x86/domain-builder/fdt.h         | 21 +++++++++
 xen/arch/x86/include/asm/bootinfo.h       |  3 ++
 xen/arch/x86/include/asm/domain-builder.h |  8 ++++
 xen/arch/x86/setup.c                      | 17 ++++---
 9 files changed, 141 insertions(+), 7 deletions(-)
 create mode 100644 xen/arch/x86/domain-builder/Makefile
 create mode 100644 xen/arch/x86/domain-builder/core.c
 create mode 100644 xen/arch/x86/domain-builder/fdt.c
 create mode 100644 xen/arch/x86/domain-builder/fdt.h
 create mode 100644 xen/arch/x86/include/asm/domain-builder.h

diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
index f59c9665fd..deae31d627 100644
--- a/xen/arch/x86/Makefile
+++ b/xen/arch/x86/Makefile
@@ -1,6 +1,7 @@
 obj-y += acpi/
 obj-y += boot/
 obj-y += cpu/
+obj-y += domain-builder/
 obj-y += efi/
 obj-y += genapic/
 obj-$(CONFIG_GUEST) += guest/
diff --git a/xen/arch/x86/domain-builder/Kconfig b/xen/arch/x86/domain-builder/Kconfig
index 8ed493c3b5..51d549c20d 100644
--- a/xen/arch/x86/domain-builder/Kconfig
+++ b/xen/arch/x86/domain-builder/Kconfig
@@ -3,7 +3,7 @@ menu "Domain Builder Features"
 
 config DOMAIN_BUILDER
 	bool "Domain builder (UNSUPPORTED)" if UNSUPPORTED
-	select LIB_DEVICE_TREE
+	select LIBFDT
 	help
 	  Enables the domain builder capability to configure boot domain
 	  construction using a flattened device tree.
diff --git a/xen/arch/x86/domain-builder/Makefile b/xen/arch/x86/domain-builder/Makefile
new file mode 100644
index 0000000000..b10cd56b28
--- /dev/null
+++ b/xen/arch/x86/domain-builder/Makefile
@@ -0,0 +1,2 @@
+obj-$(CONFIG_DOMAIN_BUILDER) += fdt.init.o
+obj-y += core.init.o
diff --git a/xen/arch/x86/domain-builder/core.c b/xen/arch/x86/domain-builder/core.c
new file mode 100644
index 0000000000..d6ae94f45c
--- /dev/null
+++ b/xen/arch/x86/domain-builder/core.c
@@ -0,0 +1,57 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (C) 2024, Apertus Solutions, LLC
+ */
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "fdt.h"
+
+void __init builder_init(struct boot_info *bi)
+{
+    if ( IS_ENABLED(CONFIG_DOMAIN_BUILDER) )
+    {
+        int ret;
+
+        switch ( ret = has_hyperlaunch_fdt(bi) )
+        {
+        case 0:
+            printk("Hyperlaunch device tree detected\n");
+            bi->hyperlaunch_enabled = true;
+            bi->mods[0].type = BOOTMOD_FDT;
+            break;
+
+        case -EINVAL:
+            printk("Hyperlaunch device tree was not detected\n");
+            bi->hyperlaunch_enabled = false;
+            break;
+
+        case -ENOENT:
+        case -ENODATA:
+            printk("Device tree found, but not hyperlaunch (%d)\n", ret);
+            bi->hyperlaunch_enabled = false;
+            bi->mods[0].type = BOOTMOD_FDT;
+            break;
+
+        default:
+            printk("Unknown error (%d) occured checking for hyperlaunch device tree\n",
+                   ret);
+            bi->hyperlaunch_enabled = false;
+            break;
+        }
+    }
+}
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * tab-width: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/arch/x86/domain-builder/fdt.c b/xen/arch/x86/domain-builder/fdt.c
new file mode 100644
index 0000000000..aaf8c1cc16
--- /dev/null
+++ b/xen/arch/x86/domain-builder/fdt.c
@@ -0,0 +1,37 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (C) 2024, Apertus Solutions, LLC
+ */
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "fdt.h"
+
+int __init has_hyperlaunch_fdt(const struct boot_info *bi)
+{
+    int ret = 0;
+    const void *fdt = bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_IDX]);
+
+    if ( !fdt || fdt_check_header(fdt) < 0 )
+        ret = -EINVAL;
+
+    bootstrap_unmap();
+
+    return ret;
+}
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * tab-width: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/arch/x86/domain-builder/fdt.h b/xen/arch/x86/domain-builder/fdt.h
new file mode 100644
index 0000000000..8e62cd843e
--- /dev/null
+++ b/xen/arch/x86/domain-builder/fdt.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */
+#ifndef __XEN_X86_FDT_H__
+#define __XEN_X86_FDT_H__
+
+#include 
+
+struct boot_info;
+
+/* hyperlaunch fdt is required to be module 0 */
+#define HYPERLAUNCH_MODULE_IDX 0
+
+#ifdef CONFIG_DOMAIN_BUILDER
+int has_hyperlaunch_fdt(const struct boot_info *bi);
+#else
+static inline int __init has_hyperlaunch_fdt(const struct boot_info *bi)
+{
+    return -EINVAL;
+}
+#endif
+
+#endif /* __XEN_X86_FDT_H__ */
diff --git a/xen/arch/x86/include/asm/bootinfo.h b/xen/arch/x86/include/asm/bootinfo.h
index 3afc214c17..82c2650fcf 100644
--- a/xen/arch/x86/include/asm/bootinfo.h
+++ b/xen/arch/x86/include/asm/bootinfo.h
@@ -27,6 +27,7 @@ enum bootmod_type {
     BOOTMOD_RAMDISK,
     BOOTMOD_MICROCODE,
     BOOTMOD_XSM_POLICY,
+    BOOTMOD_FDT,
 };
 
 struct boot_module {
@@ -80,6 +81,8 @@ struct boot_info {
     paddr_t memmap_addr;
     size_t memmap_length;
 
+    bool hyperlaunch_enabled;
+
     unsigned int nr_modules;
     struct boot_module mods[MAX_NR_BOOTMODS + 1];
     struct boot_domain domains[MAX_NR_BOOTDOMS];
diff --git a/xen/arch/x86/include/asm/domain-builder.h b/xen/arch/x86/include/asm/domain-builder.h
new file mode 100644
index 0000000000..b6d9ba94de
--- /dev/null
+++ b/xen/arch/x86/include/asm/domain-builder.h
@@ -0,0 +1,8 @@
+#ifndef __XEN_X86_DOMBUILDER_H__
+#define __XEN_X86_DOMBUILDER_H__
+
+struct boot_info;
+
+void builder_init(struct boot_info *bi);
+
+#endif
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 83cb66e309..e5d78bcb48 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -36,6 +36,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -1281,9 +1282,12 @@ void asmlinkage __init noreturn __start_xen(void)
                bi->nr_modules);
     }
 
-    /* Dom0 kernel is always first */
-    bi->mods[0].type = BOOTMOD_KERNEL;
-    bi->domains[0].kernel = &bi->mods[0];
+    builder_init(bi);
+
+    /* Find first unknown boot module to use as Dom0 kernel */
+    i = first_boot_module_index(bi, BOOTMOD_UNKNOWN);
+    bi->mods[i].type = BOOTMOD_KERNEL;
+    bi->domains[0].kernel = &bi->mods[i];
 
     if ( pvh_boot )
     {
@@ -1466,8 +1470,9 @@ void asmlinkage __init noreturn __start_xen(void)
         xen->size  = __2M_rwdata_end - _stext;
     }
 
-    bi->mods[0].headroom =
-        bzimage_headroom(bootstrap_map_bm(&bi->mods[0]), bi->mods[0].size);
+    bi->domains[0].kernel->headroom =
+        bzimage_headroom(bootstrap_map_bm(bi->domains[0].kernel),
+                         bi->domains[0].kernel->size);
     bootstrap_unmap();
 
 #ifndef highmem_start
@@ -1591,7 +1596,7 @@ void asmlinkage __init noreturn __start_xen(void)
 #endif
     }
 
-    if ( bi->mods[0].headroom && !bi->mods[0].relocated )
+    if ( bi->domains[0].kernel->headroom && !bi->domains[0].kernel->relocated )
         panic("Not enough memory to relocate the dom0 kernel image\n");
     for ( i = 0; i < bi->nr_modules; ++i )
     {
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" , Michal Orzel
	, "Jan Beulich" , Andrew Cooper
	, =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Julien Grall , Bertrand Marquis
	
Subject: [PATCH v3 10/16] x86/hyperlaunch: obtain cmdline from device tree
Date: Tue, 8 Apr 2025 17:07:32 +0100
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From: "Daniel P. Smith" 

Add support to read the command line from the hyperlauunch device tree.
The device tree command line is located in the "bootargs" property of the
"multiboot,kernel" node.

A boot loader command line, e.g. a grub module string field, takes
precendence ove the device tree one since it is easier to modify.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Jason Andryuk 
---
v3:
    * Rename to fdt_get_prop_offset()
    * Remove size_t cast from builder_get_cmdline_size()
    * fdt_get_prop_offset() use strcmp()
    * fdt_get_prop_offset() return bool
---
 xen/arch/x86/domain-builder/core.c        | 28 +++++++++++++++++++++++
 xen/arch/x86/domain-builder/fdt.c         |  6 +++++
 xen/arch/x86/domain-builder/fdt.h         | 25 ++++++++++++++++++++
 xen/arch/x86/include/asm/bootinfo.h       |  6 +++--
 xen/arch/x86/include/asm/domain-builder.h |  4 ++++
 xen/arch/x86/setup.c                      | 12 +++++++---
 xen/include/xen/libfdt/libfdt-xen.h       | 23 +++++++++++++++++++
 7 files changed, 99 insertions(+), 5 deletions(-)

diff --git a/xen/arch/x86/domain-builder/core.c b/xen/arch/x86/domain-builder/core.c
index eda7fa7a8f..510a74a675 100644
--- a/xen/arch/x86/domain-builder/core.c
+++ b/xen/arch/x86/domain-builder/core.c
@@ -8,9 +8,37 @@
 #include 
 
 #include 
+#include 
 
 #include "fdt.h"
 
+size_t __init builder_get_cmdline_size(struct boot_info *bi, int offset)
+{
+#ifdef CONFIG_DOMAIN_BUILDER
+    const void *fdt = bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_IDX]);
+    int size = fdt_cmdline_prop_size(fdt, offset);
+
+    bootstrap_unmap();
+    return size < 0 ? 0 : size;
+#else
+    return 0;
+#endif
+}
+
+int __init builder_get_cmdline(
+    struct boot_info *bi, int offset, char *cmdline, size_t size)
+{
+#ifdef CONFIG_DOMAIN_BUILDER
+    const void *fdt = bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_IDX]);
+    int ret = fdt_cmdline_prop_copy(fdt, offset, cmdline, size);
+
+    bootstrap_unmap();
+    return ret;
+#else
+    return 0;
+#endif
+}
+
 void __init builder_init(struct boot_info *bi)
 {
     if ( IS_ENABLED(CONFIG_DOMAIN_BUILDER) )
diff --git a/xen/arch/x86/domain-builder/fdt.c b/xen/arch/x86/domain-builder/fdt.c
index a037c8b6cb..bc9903a9de 100644
--- a/xen/arch/x86/domain-builder/fdt.c
+++ b/xen/arch/x86/domain-builder/fdt.c
@@ -189,6 +189,12 @@ static int __init process_domain_node(
             printk("  kernel: boot module %d\n", idx);
             bi->mods[idx].type = BOOTMOD_KERNEL;
             bd->kernel = &bi->mods[idx];
+
+            /* If bootloader didn't set cmdline, see if FDT provides one. */
+            if ( bd->kernel->cmdline_pa &&
+                 !((char *)__va(bd->kernel->cmdline_pa))[0] )
+                bd->kernel->fdt_cmdline = fdt_get_prop_offset(
+                    fdt, node, "bootargs", &bd->kernel->cmdline_pa);
         }
     }
 
diff --git a/xen/arch/x86/domain-builder/fdt.h b/xen/arch/x86/domain-builder/fdt.h
index e8769dc51c..91f665c8fd 100644
--- a/xen/arch/x86/domain-builder/fdt.h
+++ b/xen/arch/x86/domain-builder/fdt.h
@@ -12,6 +12,31 @@ struct boot_info;
 #define HYPERLAUNCH_MODULE_IDX 0
 
 #ifdef CONFIG_DOMAIN_BUILDER
+
+static inline int __init fdt_cmdline_prop_size(const void *fdt, int offset)
+{
+    int ret;
+
+    fdt_get_property_by_offset(fdt, offset, &ret);
+
+    return ret;
+}
+
+static inline int __init fdt_cmdline_prop_copy(
+    const void *fdt, int offset, char *cmdline, size_t size)
+{
+    int ret;
+    const struct fdt_property *prop =
+        fdt_get_property_by_offset(fdt, offset, &ret);
+
+    if ( ret < 0 )
+        return ret;
+
+    ASSERT(size > ret);
+
+    return strlcpy(cmdline, prop->data, ret);
+}
+
 int has_hyperlaunch_fdt(const struct boot_info *bi);
 int walk_hyperlaunch_fdt(struct boot_info *bi);
 #else
diff --git a/xen/arch/x86/include/asm/bootinfo.h b/xen/arch/x86/include/asm/bootinfo.h
index 1e3d582e45..5b2c93b1ef 100644
--- a/xen/arch/x86/include/asm/bootinfo.h
+++ b/xen/arch/x86/include/asm/bootinfo.h
@@ -35,11 +35,13 @@ struct boot_module {
 
     /*
      * Module State Flags:
-     *   relocated: indicates module has been relocated in memory.
-     *   released:  indicates module's pages have been freed.
+     *   relocated:   indicates module has been relocated in memory.
+     *   released:    indicates module's pages have been freed.
+     *   fdt_cmdline: indicates module's cmdline is in the FDT.
      */
     bool relocated:1;
     bool released:1;
+    bool fdt_cmdline:1;
 
     /*
      * A boot module may need decompressing by Xen.  Headroom is an estimate of
diff --git a/xen/arch/x86/include/asm/domain-builder.h b/xen/arch/x86/include/asm/domain-builder.h
index b6d9ba94de..7518b6ddf3 100644
--- a/xen/arch/x86/include/asm/domain-builder.h
+++ b/xen/arch/x86/include/asm/domain-builder.h
@@ -3,6 +3,10 @@
 
 struct boot_info;
 
+size_t __init builder_get_cmdline_size(struct boot_info *bi, int offset);
+int __init builder_get_cmdline(
+    struct boot_info *bi, int offset, char *cmdline, size_t size);
+
 void builder_init(struct boot_info *bi);
 
 #endif
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 00e8c8a2a3..ca4415d020 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -984,7 +984,10 @@ static size_t __init domain_cmdline_size(
 {
     size_t s = bi->kextra ? strlen(bi->kextra) : 0;
 
-    s += bd->kernel->cmdline_pa ? strlen(__va(bd->kernel->cmdline_pa)) : 0;
+    if ( bd->kernel->fdt_cmdline )
+        s += builder_get_cmdline_size(bi, bd->kernel->cmdline_pa);
+    else
+        s += strlen(__va(bd->kernel->cmdline_pa));
 
     if ( s == 0 )
         return s;
@@ -1047,9 +1050,12 @@ static struct domain *__init create_dom0(struct boot_info *bi)
         if ( !(cmdline = xzalloc_array(char, cmdline_size)) )
             panic("Error allocating cmdline buffer for %pd\n", d);
 
-        if ( bd->kernel->cmdline_pa )
+        if ( bd->kernel->fdt_cmdline )
+            builder_get_cmdline(
+                bi, bd->kernel->cmdline_pa, cmdline, cmdline_size);
+        else
             strlcpy(cmdline,
-                    cmdline_cook(__va(bd->kernel->cmdline_pa), bi->loader),
+                    cmdline_cook(__va(bd->kernel->cmdline_pa),bi->loader),
                     cmdline_size);
 
         if ( bi->kextra )
diff --git a/xen/include/xen/libfdt/libfdt-xen.h b/xen/include/xen/libfdt/libfdt-xen.h
index 2259c09a6a..e473fbaf0c 100644
--- a/xen/include/xen/libfdt/libfdt-xen.h
+++ b/xen/include/xen/libfdt/libfdt-xen.h
@@ -23,6 +23,29 @@ static inline uint64_t  __init fdt_cell_as_u64(const fdt32_t *cell)
     return ((uint64_t)fdt32_to_cpu(cell[0]) << 32) | fdt32_to_cpu(cell[1]);
 }
 
+static inline bool __init fdt_get_prop_offset(
+    const void *fdt, int node, const char *name, unsigned long *offset)
+{
+    int ret, poffset;
+    const char *pname;
+
+    fdt_for_each_property_offset(poffset, fdt, node)
+    {
+        fdt_getprop_by_offset(fdt, poffset, &pname, &ret);
+
+        if ( ret < 0 )
+            continue;
+
+        if ( strcmp(pname, name) == 0 )
+        {
+            *offset = poffset;
+            return true;
+        }
+    }
+
+    return false;
+}
+
 /*
  * Property: reg
  *
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" , Michal Orzel
	, "Jan Beulich" , Andrew Cooper
	, =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	
Subject: [PATCH v3 05/16] kconfig: introduce domain builder config option
Date: Tue, 8 Apr 2025 17:07:27 +0100
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From: "Daniel P. Smith" 

Hyperlaunch domain builder will be the consolidated boot time domain
building logic framework. Introduces the config option to enable this
domain builder to eventually turn on the ability to load the domain
configuration via a flattened device tree.

Signed-off-by: Daniel P. Smith 
Reviewed-by: Jason Andryuk 
---
v3:
    * Minor s/_/-/ in the "source" line
---
 xen/arch/x86/Kconfig                |  2 ++
 xen/arch/x86/domain-builder/Kconfig | 15 +++++++++++++++
 2 files changed, 17 insertions(+)
 create mode 100644 xen/arch/x86/domain-builder/Kconfig

diff --git a/xen/arch/x86/Kconfig b/xen/arch/x86/Kconfig
index de2fa37f08..a31002324e 100644
--- a/xen/arch/x86/Kconfig
+++ b/xen/arch/x86/Kconfig
@@ -321,6 +321,8 @@ config UCODE_SCAN_DEFAULT
 	  Enable if you have a Linux-based dom0 with microcode attached to the
 	  initramfs.
 
+source "arch/x86/domain-builder/Kconfig"
+
 endmenu
 
 source "common/Kconfig"
diff --git a/xen/arch/x86/domain-builder/Kconfig b/xen/arch/x86/domain-builder/Kconfig
new file mode 100644
index 0000000000..8ed493c3b5
--- /dev/null
+++ b/xen/arch/x86/domain-builder/Kconfig
@@ -0,0 +1,15 @@
+
+menu "Domain Builder Features"
+
+config DOMAIN_BUILDER
+	bool "Domain builder (UNSUPPORTED)" if UNSUPPORTED
+	select LIB_DEVICE_TREE
+	help
+	  Enables the domain builder capability to configure boot domain
+	  construction using a flattened device tree.
+
+	  This feature is currently experimental.
+
+	  If unsure, say N.
+
+endmenu
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" , Michal Orzel
	, "Jan Beulich" , Andrew Cooper
	, =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	
Subject: [PATCH v3 15/16] x86/hyperlaunch: add max vcpu parsing of hyperlaunch device tree
Date: Tue, 8 Apr 2025 17:07:37 +0100
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From: "Daniel P. Smith" 

Introduce the `cpus` property, named as such for dom0less compatibility, that
represents the maximum number of vpcus to allocate for a domain. In the device
tree, it will be encoded as a u32 value.

Signed-off-by: Daniel P. Smith 
Reviewed-by: Jason Andryuk 
---
 xen/arch/x86/dom0_build.c              |  3 +++
 xen/arch/x86/domain-builder/fdt.c      | 11 +++++++++++
 xen/arch/x86/include/asm/boot-domain.h |  2 ++
 3 files changed, 16 insertions(+)

diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c
index 36fb090643..7b3e31a08f 100644
--- a/xen/arch/x86/dom0_build.c
+++ b/xen/arch/x86/dom0_build.c
@@ -635,6 +635,9 @@ int __init construct_dom0(const struct boot_domain *bd)
     if ( !get_memsize(&dom0_max_size, LONG_MAX) && bd->max_pages )
         dom0_size.nr_pages = bd->max_pages;
 
+    if ( opt_dom0_max_vcpus_max == UINT_MAX && bd->max_vcpus )
+        opt_dom0_max_vcpus_max = bd->max_vcpus;
+
     if ( is_hvm_domain(d) )
         rc = dom0_construct_pvh(bd);
     else if ( is_pv_domain(d) )
diff --git a/xen/arch/x86/domain-builder/fdt.c b/xen/arch/x86/domain-builder/fdt.c
index 338b4838c2..5fcb767bdd 100644
--- a/xen/arch/x86/domain-builder/fdt.c
+++ b/xen/arch/x86/domain-builder/fdt.c
@@ -246,6 +246,17 @@ static int __init process_domain_node(
             bd->max_pages = PFN_DOWN(kb * SZ_1K);
             printk("  max memory: %ld kb\n", kb);
         }
+        else if ( strncmp(prop_name, "cpus", name_len) == 0 )
+        {
+            uint32_t val = UINT_MAX;
+            if ( fdt_prop_as_u32(prop, &val) != 0 )
+            {
+                printk("  failed processing max_vcpus for domain %s\n", name);
+                return -EINVAL;
+            }
+            bd->max_vcpus = val;
+            printk("  max vcpus: %d\n", bd->max_vcpus);
+        }
     }
 
     fdt_for_each_subnode(node, fdt, dom_node)
diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/include/asm/boot-domain.h
index fa8ea1cc66..969c02a6ea 100644
--- a/xen/arch/x86/include/asm/boot-domain.h
+++ b/xen/arch/x86/include/asm/boot-domain.h
@@ -22,6 +22,8 @@ struct boot_domain {
     unsigned long min_pages;
     unsigned long max_pages;
 
+    unsigned int max_vcpus;
+
     struct boot_module *kernel;
     struct boot_module *module;
     const char *cmdline;
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" , Michal Orzel
	, "Jan Beulich" , Andrew Cooper
	, =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	
Subject: [PATCH v3 13/16] x86/hyperlaunch: specify dom0 mode with device tree
Date: Tue, 8 Apr 2025 17:07:35 +0100
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From: "Daniel P. Smith" 

Enable selecting the mode in which the domain will be built and ran. This
includes:

- whether it will be either a 32/64 bit domain
- if it will be run as a PV or HVM domain
- and if it will require a device model (not applicable for dom0)

In the device tree, this will be represented as a bit map that will be carried
through into struct boot_domain.

Signed-off-by: Daniel P. Smith 
Reviewed-by: Jason Andryuk 
---
 xen/arch/x86/domain-builder/fdt.c      | 19 +++++++++++++++++++
 xen/arch/x86/include/asm/boot-domain.h |  5 +++++
 xen/arch/x86/setup.c                   |  3 ++-
 3 files changed, 26 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/domain-builder/fdt.c b/xen/arch/x86/domain-builder/fdt.c
index 4c6aafe195..da65f6a5a0 100644
--- a/xen/arch/x86/domain-builder/fdt.c
+++ b/xen/arch/x86/domain-builder/fdt.c
@@ -193,6 +193,25 @@ static int __init process_domain_node(
             bd->domid = (domid_t)val;
             printk("  domid: %d\n", bd->domid);
         }
+        else if ( strncmp(prop_name, "mode", name_len) == 0 )
+        {
+            if ( fdt_prop_as_u32(prop, &bd->mode) != 0 )
+            {
+                printk("  failed processing mode for domain %s\n", name);
+                return -EINVAL;
+            }
+
+            printk("  mode: ");
+            if ( !(bd->mode & BUILD_MODE_PARAVIRT) )
+            {
+                if ( bd->mode & BUILD_MODE_ENABLE_DM )
+                    printk("HVM\n");
+                else
+                    printk("PVH\n");
+            }
+            else
+                printk("PV\n");
+        }
     }
 
     fdt_for_each_subnode(node, fdt, dom_node)
diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/include/asm/boot-domain.h
index d7c6042e25..e316d4bcde 100644
--- a/xen/arch/x86/include/asm/boot-domain.h
+++ b/xen/arch/x86/include/asm/boot-domain.h
@@ -13,6 +13,11 @@
 struct boot_domain {
     domid_t domid;
 
+                                          /* On     | Off    */
+#define BUILD_MODE_PARAVIRT      (1 << 0) /* PV     | PVH/HVM */
+#define BUILD_MODE_ENABLE_DM     (1 << 1) /* HVM    | PVH     */
+    uint32_t mode;
+
     struct boot_module *kernel;
     struct boot_module *module;
     const char *cmdline;
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index db7280225e..4127a0105d 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -1020,7 +1020,8 @@ static struct domain *__init create_dom0(struct boot_info *bi)
     struct boot_domain *bd = &bi->domains[0];
     struct domain *d;
 
-    if ( opt_dom0_pvh )
+    if ( opt_dom0_pvh ||
+         (bi->hyperlaunch_enabled && !(bd->mode & BUILD_MODE_PARAVIRT)) )
     {
         dom0_cfg.flags |= (XEN_DOMCTL_CDF_hvm |
                            ((hvm_hap_supported() && !opt_dom0_shadow) ?
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" , Michal Orzel
	, "Jan Beulich" , Andrew Cooper
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	, "Alejandro Vallejo" 
Subject: [PATCH v3 11/16] x86/hyperlaunch: locate dom0 initrd with hyperlaunch
Date: Tue, 8 Apr 2025 17:07:33 +0100
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From: "Daniel P. Smith" 

Look for a subnode of type `multiboot,ramdisk` within a domain node and
parse via the fdt_read_multiboot_module() helper. After a successful
helper call, the module index is returned and the module is guaranteed
to be in the module list.

Fix unused typo in adjacent comment.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
---
v3:
    * Reworded commit message to state the helper postconditions.
    * Wrapped long line
    * Fix ramdisk -> module rename
    * Move ramdisk parsing from later patch
    * Remove initrdidx indent
---
 xen/arch/x86/domain-builder/fdt.c | 29 +++++++++++++++++++++++++++++
 xen/arch/x86/setup.c              |  4 ++--
 2 files changed, 31 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/domain-builder/fdt.c b/xen/arch/x86/domain-builder/fdt.c
index bc9903a9de..0f5fd01557 100644
--- a/xen/arch/x86/domain-builder/fdt.c
+++ b/xen/arch/x86/domain-builder/fdt.c
@@ -195,6 +195,35 @@ static int __init process_domain_node(
                  !((char *)__va(bd->kernel->cmdline_pa))[0] )
                 bd->kernel->fdt_cmdline = fdt_get_prop_offset(
                     fdt, node, "bootargs", &bd->kernel->cmdline_pa);
+
+            continue;
+        }
+        else if ( fdt_node_check_compatible(fdt, node,
+                                            "multiboot,ramdisk") == 0 )
+        {
+            int idx;
+
+            if ( bd->module )
+            {
+                printk(XENLOG_ERR "Duplicate ramdisk module for domain %s)\n",
+                       name);
+                continue;
+            }
+
+            idx = fdt_read_multiboot_module(fdt, node, address_cells,
+                                            size_cells,bi);
+            if ( idx < 0 )
+            {
+                printk("  failed processing ramdisk module for domain %s\n",
+                       name);
+                return -EINVAL;
+            }
+
+            printk("  ramdisk: boot module %d\n", idx);
+            bi->mods[idx].type = BOOTMOD_RAMDISK;
+            bd->module = &bi->mods[idx];
+
+            continue;
         }
     }
 
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index ca4415d020..3dfa81b48c 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -2149,11 +2149,11 @@ void asmlinkage __init noreturn __start_xen(void)
      * At this point all capabilities that consume boot modules should have
      * claimed their boot modules. Find the first unclaimed boot module and
      * claim it as the initrd ramdisk. Do a second search to see if there are
-     * any remaining unclaimed boot modules, and report them as unusued initrd
+     * any remaining unclaimed boot modules, and report them as unused initrd
      * candidates.
      */
     initrdidx = first_boot_module_index(bi, BOOTMOD_UNKNOWN);
-    if ( initrdidx < MAX_NR_BOOTMODS )
+    if ( !bi->hyperlaunch_enabled && initrdidx < MAX_NR_BOOTMODS )
     {
         bi->mods[initrdidx].type = BOOTMOD_RAMDISK;
         bi->domains[0].module = &bi->mods[initrdidx];
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: Alejandro Vallejo , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" , Michal Orzel
	, "Jan Beulich" , Andrew Cooper
	, =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Julien Grall , Bertrand Marquis
	
Subject: [PATCH v3 08/16] x86/hyperlaunch: Add helpers to locate multiboot modules
Date: Tue, 8 Apr 2025 17:07:30 +0100
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Hyperlaunch mandates either a reg or module-index DT prop on nodes that
contain `multiboot,module" under their "compatible" prop. This patch
introduces a helper to generically find such index, appending the module
to the list of modules if it wasn't already (i.e: because it's given via
the "reg" prop).

Signed-off-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
---
v3:
    * New on v3.
    * Subsumes much of the dup code between kernel/initrd patches.
    * Changes previous behaviour in v2 to look into "reg" and
      "module-index" props, rather than just index.
    * Use addr_cells/size_cells rather than size_size
---
 xen/arch/x86/domain-builder/fdt.c   | 142 ++++++++++++++++++++++++++++
 xen/arch/x86/domain-builder/fdt.h   |   2 +
 xen/include/xen/libfdt/libfdt-xen.h |  57 +++++++++++
 3 files changed, 201 insertions(+)

diff --git a/xen/arch/x86/domain-builder/fdt.c b/xen/arch/x86/domain-builder/fdt.c
index 4c5b7747f5..9ebc8fd0e4 100644
--- a/xen/arch/x86/domain-builder/fdt.c
+++ b/xen/arch/x86/domain-builder/fdt.c
@@ -13,6 +13,148 @@
 
 #include "fdt.h"
 
+/*
+ * Unpacks a "reg" property into its address and size constituents.
+ *
+ * @param prop          Pointer to an FDT "reg" property.
+ * @param address_cells Number of 4-octet cells that make up an "address".
+ * @param size_cells    Number of 4-octet cells that make up a "size".
+ * @param p_addr[out]   Address encoded in the property.
+ * @param p_size[out]   Size encoded in the property.
+ * @returns             -EINVAL on malformed property, 0 otherwise.
+ */
+static int __init read_fdt_prop_as_reg(const struct fdt_property *prop,
+                                       int address_cells, int size_cells,
+                                       uint64_t *p_addr, uint64_t *p_size)
+{
+    const fdt32_t *cell = (const fdt32_t *)prop->data;
+    uint64_t addr, size;
+
+    if ( fdt32_to_cpu(prop->len) !=
+         (address_cells + size_cells) * sizeof(*cell) )
+    {
+        printk("  Cannot read reg %lu+%lu from prop len %u\n",
+            address_cells * sizeof(*cell), size_cells * sizeof(*cell),
+            fdt32_to_cpu(prop->len));
+        return -EINVAL;
+    }
+
+    switch ( address_cells ) {
+    case 1:
+        addr = fdt32_to_cpu(*cell);
+        break;
+    case 2:
+        addr = fdt64_to_cpu(*(const fdt64_t *)cell);
+        break;
+    default:
+        printk("  unsupported sized address_cells\n");
+        return -EINVAL;
+    }
+
+    cell += address_cells;
+    switch ( size_cells ) {
+    case 1:
+        size = fdt32_to_cpu(*cell);
+        break;
+    case 2:
+        size = fdt64_to_cpu(*(const fdt64_t *)cell);
+        break;
+    default:
+        printk("  unsupported sized size_cells\n");
+        return -EINVAL;
+    }
+
+    *p_addr = addr;
+    *p_size = size;
+
+    return 0;
+}
+
+/*
+ * Locate a multiboot module given its node offset in the FDT.
+ *
+ * The module location may be given via either FDT property:
+ *     * reg = 
+ *         * Mutates `bi` to append the module.
+ *     * module-index = 
+ *         * Leaves `bi` unchanged.
+ *
+ * @param fdt           Pointer to the full FDT.
+ * @param node          Offset for the module node.
+ * @param address_cells Number of 4-octet cells that make up an "address".
+ * @param size_cells    Number of 4-octet cells that make up a "size".
+ * @param bi[inout]     Xen's representation of the boot parameters.
+ * @return              -EINVAL on malformed nodes, otherwise
+ *                      index inside `bi->mods`
+ */
+int __init fdt_read_multiboot_module(const void *fdt, int node,
+                                     int address_cells, int size_cells,
+                                     struct boot_info *bi)
+{
+    const struct fdt_property *prop;
+    uint64_t addr, size;
+    int ret;
+    int idx;
+
+    ASSERT(!fdt_node_check_compatible(fdt, node, "multiboot,module"));
+
+    /* Location given as a `module-index` property. */
+    prop = fdt_get_property(fdt, node, "module-index", NULL);
+
+    if ( prop )
+    {
+        if ( fdt_get_property(fdt, node, "reg", NULL) )
+        {
+            printk("  Location of multiboot,module defined multiple times\n");
+            return -EINVAL;
+        }
+        return fdt_cell_as_u32((const fdt32_t *)prop->data);
+    }
+
+    /* Otherwise location given as a `reg` property. */
+    prop = fdt_get_property(fdt, node, "reg", NULL);
+
+    if ( !prop )
+    {
+        printk("  No location for multiboot,module\n");
+        return -EINVAL;
+    }
+    if ( fdt_get_property(fdt, node, "module-index", NULL) )
+    {
+        printk("  Location of multiboot,module defined multiple times\n");
+        return -EINVAL;
+    }
+
+    ret = read_fdt_prop_as_reg(prop, address_cells, size_cells, &addr, &size);
+
+    if ( ret < 0 )
+    {
+        printk("  Failed reading reg for multiboot,module\n");
+        return -EINVAL;
+    }
+
+    idx = bi->nr_modules + 1;
+    if ( idx > MAX_NR_BOOTMODS )
+    {
+        /*
+         * MAX_NR_BOOTMODS cannot exceed the max for MB1, represented by 32bits,
+         * thus the cast down to a u32 will be safe due to the prior check.
+         */
+        BUILD_BUG_ON(MAX_NR_BOOTMODS >= (uint64_t)UINT32_MAX);
+        printk("  idx %d exceeds maximum boot modules\n", idx);
+        return -EINVAL;
+    }
+
+    /* Append new module to the existing list */
+
+    bi->nr_modules = idx;
+    bi->mods[idx].start = addr;
+    bi->mods[idx].size = size;
+    printk("  module[%d]: addr %lx size %lx\n", idx, addr, size);
+
+    return idx;
+}
+
 static int __init find_hyperlaunch_node(const void *fdt)
 {
     int hv_node = fdt_path_offset(fdt, "/chosen/hypervisor");
diff --git a/xen/arch/x86/domain-builder/fdt.h b/xen/arch/x86/domain-builder/fdt.h
index 1849656571..e8769dc51c 100644
--- a/xen/arch/x86/domain-builder/fdt.h
+++ b/xen/arch/x86/domain-builder/fdt.h
@@ -3,6 +3,8 @@
 #define __XEN_X86_FDT_H__
 
 #include 
+#include 
+#include 
 
 struct boot_info;
 
diff --git a/xen/include/xen/libfdt/libfdt-xen.h b/xen/include/xen/libfdt/libfdt-xen.h
index a5340bc9f4..2259c09a6a 100644
--- a/xen/include/xen/libfdt/libfdt-xen.h
+++ b/xen/include/xen/libfdt/libfdt-xen.h
@@ -13,6 +13,63 @@
 
 #include 
 
+static inline int __init fdt_cell_as_u32(const fdt32_t *cell)
+{
+    return fdt32_to_cpu(*cell);
+}
+
+static inline uint64_t  __init fdt_cell_as_u64(const fdt32_t *cell)
+{
+    return ((uint64_t)fdt32_to_cpu(cell[0]) << 32) | fdt32_to_cpu(cell[1]);
+}
+
+/*
+ * Property: reg
+ *
+ * Defined in Section 2.3.6 of the Device Tree Specification is the "reg"
+ * standard property. The property is a prop-encoded-array that is encoded as
+ * an arbitrary number of (address, size) pairs.  We only extract a single
+ * pair since that is what is used in practice.
+ */
+static inline int __init fdt_get_reg_prop(
+    const void *fdt, int node, unsigned int addr_cells, unsigned int size_cells,
+    uint64_t *addr, uint64_t *size)
+{
+    int ret;
+    const struct fdt_property *prop;
+    fdt32_t *cell;
+
+    /* FDT spec max size is 4 (128bit int), but largest arch int size is 64 */
+    if ( size_cells > 2 || addr_cells > 2 )
+        return -EINVAL;
+
+    prop = fdt_get_property(fdt, node, "reg", &ret);
+    if ( !prop || ret < sizeof(u32) )
+        return ret < 0 ? ret : -EINVAL;
+
+    if ( fdt32_to_cpu(prop->len) !=
+	 ((size_cells + addr_cells) * sizeof(*cell)) )
+        return -EINVAL;
+
+    cell = (fdt32_t *)prop->data;
+
+    /* read address field */
+    if ( addr_cells == 1 )
+        *addr = fdt_cell_as_u32(cell);
+    else
+        *addr = fdt_cell_as_u64(cell);
+
+    cell += addr_cells;
+
+    /* read size field */
+    if ( size_cells == 1 )
+        *size = fdt_cell_as_u32(cell);
+    else
+        *size = fdt_cell_as_u64(cell);
+
+    return 0;
+}
+
 static inline int fdt_get_mem_rsv_paddr(const void *fdt, int n,
                                         paddr_t *address,
                                         paddr_t *size)
-- 
2.43.0



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Subject: [PATCH v3 16/16] x86/hyperlaunch: add capabilities to boot domain
Date: Tue, 8 Apr 2025 17:07:38 +0100
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From: "Daniel P. Smith" 

Introduce the ability to assign capabilities to a domain via its definition in
device tree. The first capability enabled to select is the control domain
capability. The capability property is a bitfield in both the device tree and
`struct boot_domain`.

Signed-off-by: Daniel P. Smith 
Reviewed-by: Jason Andryuk 
Signed-off-by: Jason Andryuk 
---
 xen/arch/x86/domain-builder/core.c     |  1 +
 xen/arch/x86/domain-builder/fdt.c      | 12 ++++++++++++
 xen/arch/x86/include/asm/boot-domain.h |  4 ++++
 xen/arch/x86/setup.c                   |  6 +++++-
 4 files changed, 22 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/domain-builder/core.c b/xen/arch/x86/domain-builder/core.c
index 510a74a675..6ab4e6fe53 100644
--- a/xen/arch/x86/domain-builder/core.c
+++ b/xen/arch/x86/domain-builder/core.c
@@ -96,6 +96,7 @@ void __init builder_init(struct boot_info *bi)
         i = first_boot_module_index(bi, BOOTMOD_UNKNOWN);
         bi->mods[i].type = BOOTMOD_KERNEL;
         bi->domains[0].kernel = &bi->mods[i];
+        bi->domains[0].capabilities |= BUILD_CAPS_CONTROL;
         bi->nr_domains = 1;
     }
 }
diff --git a/xen/arch/x86/domain-builder/fdt.c b/xen/arch/x86/domain-builder/fdt.c
index 5fcb767bdd..dbfbcffb0a 100644
--- a/xen/arch/x86/domain-builder/fdt.c
+++ b/xen/arch/x86/domain-builder/fdt.c
@@ -257,6 +257,18 @@ static int __init process_domain_node(
             bd->max_vcpus = val;
             printk("  max vcpus: %d\n", bd->max_vcpus);
         }
+        else if ( strncmp(prop_name, "capabilities", name_len) == 0 )
+        {
+            if ( fdt_prop_as_u32(prop, &bd->capabilities) != 0 )
+            {
+                printk("  failed processing domain id for domain %s\n", name);
+                return -EINVAL;
+            }
+            printk("  caps: ");
+            if ( bd->capabilities & BUILD_CAPS_CONTROL )
+                printk("c");
+            printk("\n");
+        }
     }
 
     fdt_for_each_subnode(node, fdt, dom_node)
diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/include/asm/boot-domain.h
index 969c02a6ea..29a7d806de 100644
--- a/xen/arch/x86/include/asm/boot-domain.h
+++ b/xen/arch/x86/include/asm/boot-domain.h
@@ -13,6 +13,10 @@
 struct boot_domain {
     domid_t domid;
 
+#define BUILD_CAPS_NONE          (0)
+#define BUILD_CAPS_CONTROL       (1 << 0)
+    uint32_t capabilities;
+
                                           /* On     | Off    */
 #define BUILD_MODE_PARAVIRT      (1 << 0) /* PV     | PVH/HVM */
 #define BUILD_MODE_ENABLE_DM     (1 << 1) /* HVM    | PVH     */
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 4127a0105d..7e1a26b4d2 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -1006,6 +1006,7 @@ static struct domain *__init create_dom0(struct boot_info *bi)
 {
     char *cmdline = NULL;
     size_t cmdline_size;
+    unsigned int create_flags = 0;
     struct xen_domctl_createdomain dom0_cfg = {
         .flags = IS_ENABLED(CONFIG_TBOOT) ? XEN_DOMCTL_CDF_s3_integrity : 0,
         .max_evtchn_port = -1,
@@ -1037,7 +1038,10 @@ static struct domain *__init create_dom0(struct boot_info *bi)
     if ( bd->domid == DOMID_INVALID )
         /* Create initial domain.  Not d0 for pvshim. */
         bd->domid = get_initial_domain_id();
-    d = domain_create(bd->domid, &dom0_cfg, pv_shim ? 0 : CDF_privileged);
+    if ( bd->capabilities & BUILD_CAPS_CONTROL )
+        create_flags |= CDF_privileged;
+    d = domain_create(bd->domid, &dom0_cfg,
+                      pv_shim ? 0 : create_flags);
     if ( IS_ERR(d) )
         panic("Error creating d%u: %ld\n", bd->domid, PTR_ERR(d));
 
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jason Andryuk
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	"Stefano Stabellini" , Michal Orzel
	, "Jan Beulich" , Andrew Cooper
	, =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	
Subject: [PATCH v3 01/16] x86/boot: introduce boot domain
Date: Tue, 8 Apr 2025 17:07:23 +0100
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From: "Daniel P. Smith" 

To begin moving toward allowing the hypervisor to construct more than one
domain at boot, a container is needed for a domain's build information.
Introduce a new header, , that contains the initial
struct boot_domain that encapsulate the build information for a domain.

Add a kernel and ramdisk boot module reference along with a struct domain
reference to the new struct boot_domain. This allows a struct boot_domain
reference to be the only parameter necessary to pass down through the domain
construction call chain.

Signed-off-by: Daniel P. Smith 
Reviewed-by: Jason Andryuk 
---
v3:
  * Rename bootdomain.h -> boot-domain.h
  * const-ify boot_domain parameter passed to construct_dom0()
  * Rename boot_domain.ramdisk to boot_domain.module
---
 xen/arch/x86/dom0_build.c              |  8 +++++---
 xen/arch/x86/hvm/dom0_build.c          | 23 ++++++++-------------
 xen/arch/x86/include/asm/boot-domain.h | 28 ++++++++++++++++++++++++++
 xen/arch/x86/include/asm/bootinfo.h    |  5 +++++
 xen/arch/x86/include/asm/dom0_build.h  |  6 +++---
 xen/arch/x86/include/asm/setup.h       |  4 ++--
 xen/arch/x86/pv/dom0_build.c           | 24 ++++++++--------------
 xen/arch/x86/setup.c                   | 24 +++++++++-------------
 8 files changed, 69 insertions(+), 53 deletions(-)
 create mode 100644 xen/arch/x86/include/asm/boot-domain.h

diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c
index 8191d90a22..0b467fd4a4 100644
--- a/xen/arch/x86/dom0_build.c
+++ b/xen/arch/x86/dom0_build.c
@@ -13,6 +13,7 @@
 #include 
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -614,9 +615,10 @@ int __init dom0_setup_permissions(struct domain *d)
     return rc;
 }
 
-int __init construct_dom0(struct boot_info *bi, struct domain *d)
+int __init construct_dom0(const struct boot_domain *bd)
 {
     int rc;
+    const struct domain *d = bd->d;
 
     /* Sanity! */
     BUG_ON(!pv_shim && d->domain_id != 0);
@@ -626,9 +628,9 @@ int __init construct_dom0(struct boot_info *bi, struct domain *d)
     process_pending_softirqs();
 
     if ( is_hvm_domain(d) )
-        rc = dom0_construct_pvh(bi, d);
+        rc = dom0_construct_pvh(bd);
     else if ( is_pv_domain(d) )
-        rc = dom0_construct_pv(bi, d);
+        rc = dom0_construct_pv(bd);
     else
         panic("Cannot construct Dom0. No guest interface available\n");
 
diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build.c
index 9fd68df7b9..2a094b3145 100644
--- a/xen/arch/x86/hvm/dom0_build.c
+++ b/xen/arch/x86/hvm/dom0_build.c
@@ -644,9 +644,11 @@ static bool __init check_and_adjust_load_address(
 }
 
 static int __init pvh_load_kernel(
-    struct domain *d, struct boot_module *image, struct boot_module *initrd,
-    paddr_t *entry, paddr_t *start_info_addr)
+    const struct boot_domain *bd, paddr_t *entry, paddr_t *start_info_addr)
 {
+    struct domain *d = bd->d;
+    struct boot_module *image = bd->kernel;
+    struct boot_module *initrd = bd->module;
     void *image_base = bootstrap_map_bm(image);
     void *image_start = image_base + image->headroom;
     unsigned long image_len = image->size;
@@ -1328,26 +1330,17 @@ static void __hwdom_init pvh_setup_mmcfg(struct domain *d)
     }
 }
 
-int __init dom0_construct_pvh(struct boot_info *bi, struct domain *d)
+int __init dom0_construct_pvh(const struct boot_domain *bd)
 {
     paddr_t entry, start_info;
-    struct boot_module *image;
-    struct boot_module *initrd = NULL;
-    unsigned int idx;
+    struct domain *d = bd->d;
     int rc;
 
     printk(XENLOG_INFO "*** Building a PVH Dom%d ***\n", d->domain_id);
 
-    idx = first_boot_module_index(bi, BOOTMOD_KERNEL);
-    if ( idx >= bi->nr_modules )
+    if ( bd->kernel == NULL )
         panic("Missing kernel boot module for %pd construction\n", d);
 
-    image = &bi->mods[idx];
-
-    idx = first_boot_module_index(bi, BOOTMOD_RAMDISK);
-    if ( idx < bi->nr_modules )
-        initrd = &bi->mods[idx];
-
     if ( is_hardware_domain(d) )
     {
         /*
@@ -1385,7 +1378,7 @@ int __init dom0_construct_pvh(struct boot_info *bi, struct domain *d)
         return rc;
     }
 
-    rc = pvh_load_kernel(d, image, initrd, &entry, &start_info);
+    rc = pvh_load_kernel(bd, &entry, &start_info);
     if ( rc )
     {
         printk("Failed to load Dom0 kernel\n");
diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/include/asm/boot-domain.h
new file mode 100644
index 0000000000..5e1e1a0b61
--- /dev/null
+++ b/xen/arch/x86/include/asm/boot-domain.h
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Copyright (c) 2024 Apertus Solutions, LLC
+ * Author: Daniel P. Smith 
+ * Copyright (c) 2024 Christopher Clark 
+ */
+
+#ifndef __XEN_X86_BOOTDOMAIN_H__
+#define __XEN_X86_BOOTDOMAIN_H__
+
+struct boot_domain {
+    struct boot_module *kernel;
+    struct boot_module *module;
+
+    struct domain *d;
+};
+
+#endif
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * tab-width: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/arch/x86/include/asm/bootinfo.h b/xen/arch/x86/include/asm/bootinfo.h
index f8b4229130..3afc214c17 100644
--- a/xen/arch/x86/include/asm/bootinfo.h
+++ b/xen/arch/x86/include/asm/bootinfo.h
@@ -11,10 +11,14 @@
 #include 
 #include 
 #include 
+#include 
 
 /* Max number of boot modules a bootloader can provide in addition to Xen */
 #define MAX_NR_BOOTMODS 63
 
+/* Max number of boot domains that Xen can construct */
+#define MAX_NR_BOOTDOMS 1
+
 /* Boot module binary type / purpose */
 enum bootmod_type {
     BOOTMOD_UNKNOWN,
@@ -78,6 +82,7 @@ struct boot_info {
 
     unsigned int nr_modules;
     struct boot_module mods[MAX_NR_BOOTMODS + 1];
+    struct boot_domain domains[MAX_NR_BOOTDOMS];
 };
 
 /*
diff --git a/xen/arch/x86/include/asm/dom0_build.h b/xen/arch/x86/include/asm/dom0_build.h
index 2d67b17213..ff021c24af 100644
--- a/xen/arch/x86/include/asm/dom0_build.h
+++ b/xen/arch/x86/include/asm/dom0_build.h
@@ -13,9 +13,9 @@ unsigned long dom0_compute_nr_pages(struct domain *d,
                                     unsigned long initrd_len);
 int dom0_setup_permissions(struct domain *d);
 
-struct boot_info;
-int dom0_construct_pv(struct boot_info *bi, struct domain *d);
-int dom0_construct_pvh(struct boot_info *bi, struct domain *d);
+struct boot_domain;
+int dom0_construct_pv(const struct boot_domain *bd);
+int dom0_construct_pvh(const struct boot_domain *bd);
 
 unsigned long dom0_paging_pages(const struct domain *d,
                                 unsigned long nr_pages);
diff --git a/xen/arch/x86/include/asm/setup.h b/xen/arch/x86/include/asm/setup.h
index 5c2391a868..ac34c69855 100644
--- a/xen/arch/x86/include/asm/setup.h
+++ b/xen/arch/x86/include/asm/setup.h
@@ -26,8 +26,8 @@ void subarch_init_memory(void);
 
 void init_IRQ(void);
 
-struct boot_info;
-int construct_dom0(struct boot_info *bi, struct domain *d);
+struct boot_domain;
+int construct_dom0(const struct boot_domain *bd);
 
 void setup_io_bitmap(struct domain *d);
 
diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c
index 96e28c7b6a..b485eea05f 100644
--- a/xen/arch/x86/pv/dom0_build.c
+++ b/xen/arch/x86/pv/dom0_build.c
@@ -355,7 +355,7 @@ static struct page_info * __init alloc_chunk(struct domain *d,
     return page;
 }
 
-static int __init dom0_construct(struct boot_info *bi, struct domain *d)
+static int __init dom0_construct(const struct boot_domain *bd)
 {
     unsigned int i;
     int rc, order, machine;
@@ -371,14 +371,15 @@ static int __init dom0_construct(struct boot_info *bi, struct domain *d)
     struct page_info *page = NULL;
     unsigned int flush_flags = 0;
     start_info_t *si;
+    struct domain *d = bd->d;
     struct vcpu *v = d->vcpu[0];
 
-    struct boot_module *image;
-    struct boot_module *initrd = NULL;
+    struct boot_module *image = bd->kernel;
+    struct boot_module *initrd = bd->module;
     void *image_base;
     unsigned long image_len;
     void *image_start;
-    unsigned long initrd_len = 0;
+    unsigned long initrd_len = initrd ? initrd->size : 0;
 
     l4_pgentry_t *l4tab = NULL, *l4start = NULL;
     l3_pgentry_t *l3tab = NULL, *l3start = NULL;
@@ -416,22 +417,13 @@ static int __init dom0_construct(struct boot_info *bi, struct domain *d)
 
     printk(XENLOG_INFO "*** Building a PV Dom%d ***\n", d->domain_id);
 
-    i = first_boot_module_index(bi, BOOTMOD_KERNEL);
-    if ( i >= bi->nr_modules )
+    if ( !image )
         panic("Missing kernel boot module for %pd construction\n", d);
 
-    image = &bi->mods[i];
     image_base = bootstrap_map_bm(image);
     image_len = image->size;
     image_start = image_base + image->headroom;
 
-    i = first_boot_module_index(bi, BOOTMOD_RAMDISK);
-    if ( i < bi->nr_modules )
-    {
-        initrd = &bi->mods[i];
-        initrd_len = initrd->size;
-    }
-
     d->max_pages = ~0U;
 
     if ( (rc = bzimage_parse(image_base, &image_start, &image_len)) != 0 )
@@ -1078,7 +1070,7 @@ out:
     return rc;
 }
 
-int __init dom0_construct_pv(struct boot_info *bi, struct domain *d)
+int __init dom0_construct_pv(const struct boot_domain *bd)
 {
     unsigned long cr4 = read_cr4();
     int rc;
@@ -1096,7 +1088,7 @@ int __init dom0_construct_pv(struct boot_info *bi, struct domain *d)
         write_cr4(cr4 & ~X86_CR4_SMAP);
     }
 
-    rc = dom0_construct(bi, d);
+    rc = dom0_construct(bd);
 
     if ( cr4 & X86_CR4_SMAP )
     {
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index d70abb7e0c..ddb10ea03d 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -992,16 +992,9 @@ static struct domain *__init create_dom0(struct boot_info *bi)
             .misc_flags = opt_dom0_msr_relaxed ? XEN_X86_MSR_RELAXED : 0,
         },
     };
+    struct boot_domain *bd = &bi->domains[0];
     struct domain *d;
     domid_t domid;
-    struct boot_module *image;
-    unsigned int idx;
-
-    idx = first_boot_module_index(bi, BOOTMOD_KERNEL);
-    if ( idx >= bi->nr_modules )
-        panic("Missing kernel boot module for building domain\n");
-
-    image = &bi->mods[idx];
 
     if ( opt_dom0_pvh )
     {
@@ -1028,11 +1021,11 @@ static struct domain *__init create_dom0(struct boot_info *bi)
         panic("Error creating d%uv0\n", domid);
 
     /* Grab the DOM0 command line. */
-    if ( image->cmdline_pa || bi->kextra )
+    if ( bd->kernel->cmdline_pa || bi->kextra )
     {
-        if ( image->cmdline_pa )
-            safe_strcpy(
-                cmdline, cmdline_cook(__va(image->cmdline_pa), bi->loader));
+        if ( bd->kernel->cmdline_pa )
+            safe_strcpy(cmdline,
+                        cmdline_cook(__va(bd->kernel->cmdline_pa), bi->loader));
 
         if ( bi->kextra )
             /* kextra always includes exactly one leading space. */
@@ -1054,10 +1047,11 @@ static struct domain *__init create_dom0(struct boot_info *bi)
             safe_strcat(cmdline, acpi_param);
         }
 
-        image->cmdline_pa = __pa(cmdline);
+        bd->kernel->cmdline_pa = __pa(cmdline);
     }
 
-    if ( construct_dom0(bi, d) != 0 )
+    bd->d = d;
+    if ( construct_dom0(bd) != 0 )
         panic("Could not construct domain 0\n");
 
     return d;
@@ -1263,6 +1257,7 @@ void asmlinkage __init noreturn __start_xen(void)
 
     /* Dom0 kernel is always first */
     bi->mods[0].type = BOOTMOD_KERNEL;
+    bi->domains[0].kernel = &bi->mods[0];
 
     if ( pvh_boot )
     {
@@ -2129,6 +2124,7 @@ void asmlinkage __init noreturn __start_xen(void)
     if ( initrdidx < MAX_NR_BOOTMODS )
     {
         bi->mods[initrdidx].type = BOOTMOD_RAMDISK;
+        bi->domains[0].module = &bi->mods[initrdidx];
         if ( first_boot_module_index(bi, BOOTMOD_UNKNOWN) < MAX_NR_BOOTMODS )
             printk(XENLOG_WARNING
                    "Multiple initrd candidates, picking module #%u\n",
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" , Michal Orzel
	, "Jan Beulich" , Andrew Cooper
	, =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, "Alejandro Vallejo" 
Subject: [PATCH v3 02/16] x86/boot: introduce domid field to struct boot_domain
Date: Tue, 8 Apr 2025 17:07:24 +0100
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From: "Daniel P. Smith" 

boot_domain stores the domid until it is used to create (and allocate)
struct domain. d->domain_id is not available early enough.

boot_domain domids are initialized to DOMID_INVALID. If not overridden
by device tree, domids of DOMID_INVALID are assigned a valid value. The
domid will be optionally parsed from the device tree configuration.

Signed-off-by: Daniel P. Smith 
Reviewed-by: Jason Andryuk 
Signed-off-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
---
v3:
  * Initialize all boot_info.domains domid fields
  * Re-write commit message to justify the new domid field.
  * Use "%pd vcpu 0" in error message
  * Move xen.h include (introduced in v1) inside ifdef guards
---
 xen/arch/x86/include/asm/boot-domain.h |  4 ++++
 xen/arch/x86/setup.c                   | 10 +++++-----
 2 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/include/asm/boot-domain.h
index 5e1e1a0b61..fcbedda0f0 100644
--- a/xen/arch/x86/include/asm/boot-domain.h
+++ b/xen/arch/x86/include/asm/boot-domain.h
@@ -8,7 +8,11 @@
 #ifndef __XEN_X86_BOOTDOMAIN_H__
 #define __XEN_X86_BOOTDOMAIN_H__
 
+#include 
+
 struct boot_domain {
+    domid_t domid;
+
     struct boot_module *kernel;
     struct boot_module *module;
 
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index ddb10ea03d..585316f1ca 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -295,6 +295,7 @@ static const char *cmdline_cook(const char *p, const char *loader_name);
 struct boot_info __initdata xen_boot_info = {
     .loader = "unknown",
     .cmdline = "",
+    .domains = { [0 ... MAX_NR_BOOTDOMS - 1] = { .domid = DOMID_INVALID } },
 };
 
 static struct boot_info *__init multiboot_fill_boot_info(
@@ -994,7 +995,6 @@ static struct domain *__init create_dom0(struct boot_info *bi)
     };
     struct boot_domain *bd = &bi->domains[0];
     struct domain *d;
-    domid_t domid;
 
     if ( opt_dom0_pvh )
     {
@@ -1010,15 +1010,15 @@ static struct domain *__init create_dom0(struct boot_info *bi)
         dom0_cfg.flags |= XEN_DOMCTL_CDF_iommu;
 
     /* Create initial domain.  Not d0 for pvshim. */
-    domid = get_initial_domain_id();
-    d = domain_create(domid, &dom0_cfg, pv_shim ? 0 : CDF_privileged);
+    bd->domid = get_initial_domain_id();
+    d = domain_create(bd->domid, &dom0_cfg, pv_shim ? 0 : CDF_privileged);
     if ( IS_ERR(d) )
-        panic("Error creating d%u: %ld\n", domid, PTR_ERR(d));
+        panic("Error creating d%u: %ld\n", bd->domid, PTR_ERR(d));
 
     init_dom0_cpuid_policy(d);
 
     if ( alloc_dom0_vcpu0(d) == NULL )
-        panic("Error creating d%uv0\n", domid);
+        panic("Error creating %pd vcpu 0\n", d);
 
     /* Grab the DOM0 command line. */
     if ( bd->kernel->cmdline_pa || bi->kextra )
-- 
2.43.0



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Subject: [PATCH v3 12/16] x86/hyperlaunch: add domain id parsing to domain config
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From: "Daniel P. Smith" 

Introduce the ability to specify the desired domain id for the domain
definition. The domain id will be populated in the domid property of the
domain
node in the device tree configuration.

Signed-off-by: Daniel P. Smith 
---
v3:
    * Remove ramdisk parsing
    * Add missing xen/errno.h include
---
 xen/arch/x86/domain-builder/fdt.c   | 39 ++++++++++++++++++++++++++++-
 xen/arch/x86/setup.c                |  5 ++--
 xen/include/xen/libfdt/libfdt-xen.h | 11 ++++++++
 3 files changed, 52 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/domain-builder/fdt.c b/xen/arch/x86/domain-builder/fdt.c
index 0f5fd01557..4c6aafe195 100644
--- a/xen/arch/x86/domain-builder/fdt.c
+++ b/xen/arch/x86/domain-builder/fdt.c
@@ -8,6 +8,7 @@
 #include 
 
 #include 
+#include 
 #include 
 #include 
 
@@ -158,12 +159,42 @@ int __init fdt_read_multiboot_module(const void *fdt, int node,
 static int __init process_domain_node(
     struct boot_info *bi, const void *fdt, int dom_node)
 {
-    int node;
+    int node, property;
     struct boot_domain *bd = &bi->domains[bi->nr_domains];
     const char *name = fdt_get_name(fdt, dom_node, NULL) ?: "unknown";
     int address_cells = fdt_address_cells(fdt, dom_node);
     int size_cells = fdt_size_cells(fdt, dom_node);
 
+    fdt_for_each_property_offset(property, fdt, dom_node)
+    {
+        const struct fdt_property *prop;
+        const char *prop_name;
+        int name_len;
+
+        prop = fdt_get_property_by_offset(fdt, property, NULL);
+        if ( !prop )
+            continue; /* silently skip */
+
+        prop_name = fdt_get_string(fdt, fdt32_to_cpu(prop->nameoff), &name_len);
+
+        if ( strncmp(prop_name, "domid", name_len) == 0 )
+        {
+            uint32_t val = DOMID_INVALID;
+            if ( fdt_prop_as_u32(prop, &val) != 0 )
+            {
+                printk("  failed processing domain id for domain %s\n", name);
+                return -EINVAL;
+            }
+            if ( val >= DOMID_FIRST_RESERVED )
+            {
+                printk("  invalid domain id for domain %s\n", name);
+                return -EINVAL;
+            }
+            bd->domid = (domid_t)val;
+            printk("  domid: %d\n", bd->domid);
+        }
+    }
+
     fdt_for_each_subnode(node, fdt, dom_node)
     {
         if ( fdt_node_check_compatible(fdt, node, "multiboot,kernel") == 0 )
@@ -233,6 +264,12 @@ static int __init process_domain_node(
         return -ENODATA;
     }
 
+    if ( bd->domid == DOMID_INVALID )
+        bd->domid = get_initial_domain_id();
+    else if ( bd->domid != get_initial_domain_id() )
+        printk(XENLOG_WARNING
+               "WARN: Booting without initial domid not supported.\n");
+
     return 0;
 }
 
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 3dfa81b48c..db7280225e 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -1033,8 +1033,9 @@ static struct domain *__init create_dom0(struct boot_info *bi)
     if ( iommu_enabled )
         dom0_cfg.flags |= XEN_DOMCTL_CDF_iommu;
 
-    /* Create initial domain.  Not d0 for pvshim. */
-    bd->domid = get_initial_domain_id();
+    if ( bd->domid == DOMID_INVALID )
+        /* Create initial domain.  Not d0 for pvshim. */
+        bd->domid = get_initial_domain_id();
     d = domain_create(bd->domid, &dom0_cfg, pv_shim ? 0 : CDF_privileged);
     if ( IS_ERR(d) )
         panic("Error creating d%u: %ld\n", bd->domid, PTR_ERR(d));
diff --git a/xen/include/xen/libfdt/libfdt-xen.h b/xen/include/xen/libfdt/libfdt-xen.h
index e473fbaf0c..3031bec90e 100644
--- a/xen/include/xen/libfdt/libfdt-xen.h
+++ b/xen/include/xen/libfdt/libfdt-xen.h
@@ -12,6 +12,7 @@
 #define LIBFDT_XEN_H
 
 #include 
+#include 
 
 static inline int __init fdt_cell_as_u32(const fdt32_t *cell)
 {
@@ -23,6 +24,16 @@ static inline uint64_t  __init fdt_cell_as_u64(const fdt32_t *cell)
     return ((uint64_t)fdt32_to_cpu(cell[0]) << 32) | fdt32_to_cpu(cell[1]);
 }
 
+static inline int __init fdt_prop_as_u32(
+    const struct fdt_property *prop, uint32_t *val)
+{
+    if ( !prop || fdt32_to_cpu(prop->len) < sizeof(u32) )
+        return -EINVAL;
+
+    *val = fdt_cell_as_u32((fdt32_t *)prop->data);
+    return 0;
+}
+
 static inline bool __init fdt_get_prop_offset(
     const void *fdt, int node, const char *name, unsigned long *offset)
 {
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" , Michal Orzel
	, "Jan Beulich" , Andrew Cooper
	, =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, "Alejandro Vallejo" 
Subject: [PATCH v3 09/16] x86/hyperlaunch: locate dom0 kernel with hyperlaunch
Date: Tue, 8 Apr 2025 17:07:31 +0100
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From: "Daniel P. Smith" 

Look for a subnode of type `multiboot,kernel` within a domain node. If
found, locate it using the multiboot module helper to generically ensure
it lives in the module list. If the bootargs property is present and
there was not an MB1 string, then use the command line from the device
tree definition.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
---
v3:
    * Add const to fdt
    * Remove idx == NULL checks
    * Add BUILD_BUG_ON for MAX_NR_BOOTMODS fitting in a uint32_t
    * Remove trailing ) from printks
    * Return ENODATA for missing kernel
    * Re-work "max domains" warning and print limit
    * fdt_cell_as_u32/directly return values
    * Remove "pairs" looping from fdt_get_reg_prop() and only grab 1.
    * Use addr_cells and size_cells
---
 xen/arch/x86/domain-builder/core.c | 11 ++++++
 xen/arch/x86/domain-builder/fdt.c  | 57 ++++++++++++++++++++++++++++++
 xen/arch/x86/setup.c               |  5 ---
 3 files changed, 68 insertions(+), 5 deletions(-)

diff --git a/xen/arch/x86/domain-builder/core.c b/xen/arch/x86/domain-builder/core.c
index c50eff34fb..eda7fa7a8f 100644
--- a/xen/arch/x86/domain-builder/core.c
+++ b/xen/arch/x86/domain-builder/core.c
@@ -59,6 +59,17 @@ void __init builder_init(struct boot_info *bi)
 
         printk(XENLOG_INFO "  Number of domains: %d\n", bi->nr_domains);
     }
+    else
+    {
+        unsigned int i;
+
+        /* Find first unknown boot module to use as Dom0 kernel */
+        printk("Falling back to using first boot module as dom0\n");
+        i = first_boot_module_index(bi, BOOTMOD_UNKNOWN);
+        bi->mods[i].type = BOOTMOD_KERNEL;
+        bi->domains[0].kernel = &bi->mods[i];
+        bi->nr_domains = 1;
+    }
 }
 
 /*
diff --git a/xen/arch/x86/domain-builder/fdt.c b/xen/arch/x86/domain-builder/fdt.c
index 9ebc8fd0e4..a037c8b6cb 100644
--- a/xen/arch/x86/domain-builder/fdt.c
+++ b/xen/arch/x86/domain-builder/fdt.c
@@ -155,6 +155,52 @@ int __init fdt_read_multiboot_module(const void *fdt, int node,
     return idx;
 }
 
+static int __init process_domain_node(
+    struct boot_info *bi, const void *fdt, int dom_node)
+{
+    int node;
+    struct boot_domain *bd = &bi->domains[bi->nr_domains];
+    const char *name = fdt_get_name(fdt, dom_node, NULL) ?: "unknown";
+    int address_cells = fdt_address_cells(fdt, dom_node);
+    int size_cells = fdt_size_cells(fdt, dom_node);
+
+    fdt_for_each_subnode(node, fdt, dom_node)
+    {
+        if ( fdt_node_check_compatible(fdt, node, "multiboot,kernel") == 0 )
+        {
+            int idx;
+
+            if ( bd->kernel )
+            {
+                printk(XENLOG_ERR "Duplicate kernel module for domain %s\n",
+                       name);
+                continue;
+            }
+
+            idx = fdt_read_multiboot_module(fdt, node, address_cells,
+                                            size_cells, bi);
+            if ( idx < 0 )
+            {
+                printk("  failed processing kernel module for domain %s\n",
+                       name);
+                return idx;
+            }
+
+            printk("  kernel: boot module %d\n", idx);
+            bi->mods[idx].type = BOOTMOD_KERNEL;
+            bd->kernel = &bi->mods[idx];
+        }
+    }
+
+    if ( !bd->kernel )
+    {
+        printk(XENLOG_ERR "ERR: no kernel assigned to domain\n");
+        return -ENODATA;
+    }
+
+    return 0;
+}
+
 static int __init find_hyperlaunch_node(const void *fdt)
 {
     int hv_node = fdt_path_offset(fdt, "/chosen/hypervisor");
@@ -217,9 +263,20 @@ int __init walk_hyperlaunch_fdt(struct boot_info *bi)
 
     fdt_for_each_subnode(node, fdt, hv_node)
     {
+        if ( bi->nr_domains >= MAX_NR_BOOTDOMS )
+        {
+            printk(XENLOG_WARNING
+                   "WARN: only creating first %u domains\n", MAX_NR_BOOTDOMS);
+            break;
+        }
+
         ret = fdt_node_check_compatible(fdt, node, "xen,domain");
         if ( ret == 0 )
+        {
+            if ( (ret = process_domain_node(bi, fdt, node)) < 0 )
+                break;
             bi->nr_domains++;
+        }
     }
 
     /* Until multi-domain construction is added, throw an error */
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index e5d78bcb48..00e8c8a2a3 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -1284,11 +1284,6 @@ void asmlinkage __init noreturn __start_xen(void)
 
     builder_init(bi);
 
-    /* Find first unknown boot module to use as Dom0 kernel */
-    i = first_boot_module_index(bi, BOOTMOD_UNKNOWN);
-    bi->mods[i].type = BOOTMOD_KERNEL;
-    bi->domains[0].kernel = &bi->mods[i];
-
     if ( pvh_boot )
     {
         /* pvh_init() already filled in e820_raw */
-- 
2.43.0



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Subject: [PATCH v3 07/16] x86/hyperlaunch: initial support for hyperlaunch device tree
Date: Tue, 8 Apr 2025 17:07:29 +0100
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From: "Daniel P. Smith" 

Add the ability to detect both a formal hyperlaunch device tree or a dom0less
device tree. If the hyperlaunch device tree is found, then count the number of
domain entries, reporting an error if more than one is found.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Jason Andryuk 
---
const not added to walk_hyperlaunch_fdt bi since it is updated while
walking the device tree.

v3:
    * Add a blank between declaration and statement
    * Add const to void *fdt
---
 xen/arch/x86/domain-builder/core.c  | 15 +++++++
 xen/arch/x86/domain-builder/fdt.c   | 64 +++++++++++++++++++++++++++++
 xen/arch/x86/domain-builder/fdt.h   |  5 +++
 xen/arch/x86/include/asm/bootinfo.h |  1 +
 4 files changed, 85 insertions(+)

diff --git a/xen/arch/x86/domain-builder/core.c b/xen/arch/x86/domain-builder/core.c
index d6ae94f45c..c50eff34fb 100644
--- a/xen/arch/x86/domain-builder/core.c
+++ b/xen/arch/x86/domain-builder/core.c
@@ -44,6 +44,21 @@ void __init builder_init(struct boot_info *bi)
             break;
         }
     }
+
+    if ( bi->hyperlaunch_enabled )
+    {
+        int ret;
+
+        printk(XENLOG_INFO "Hyperlaunch configuration:\n");
+        if ( (ret = walk_hyperlaunch_fdt(bi)) < 0 )
+        {
+            printk(XENLOG_INFO "  walk of device tree failed (%d)\n", ret);
+            bi->hyperlaunch_enabled = false;
+            return;
+        }
+
+        printk(XENLOG_INFO "  Number of domains: %d\n", bi->nr_domains);
+    }
 }
 
 /*
diff --git a/xen/arch/x86/domain-builder/fdt.c b/xen/arch/x86/domain-builder/fdt.c
index aaf8c1cc16..4c5b7747f5 100644
--- a/xen/arch/x86/domain-builder/fdt.c
+++ b/xen/arch/x86/domain-builder/fdt.c
@@ -13,6 +13,36 @@
 
 #include "fdt.h"
 
+static int __init find_hyperlaunch_node(const void *fdt)
+{
+    int hv_node = fdt_path_offset(fdt, "/chosen/hypervisor");
+
+    if ( hv_node >= 0 )
+    {
+        /* Anything other than zero indicates no match */
+        if ( fdt_node_check_compatible(fdt, hv_node, "hypervisor,xen") )
+            return -ENODATA;
+        else
+            return hv_node;
+    }
+    else
+    {
+        /* Look for dom0less config */
+        int node, chosen_node = fdt_path_offset(fdt, "/chosen");
+
+        if ( chosen_node < 0 )
+            return -ENOENT;
+
+        fdt_for_each_subnode(node, fdt, chosen_node)
+        {
+            if ( fdt_node_check_compatible(fdt, node, "xen,domain") == 0 )
+                return chosen_node;
+        }
+    }
+
+    return -ENODATA;
+}
+
 int __init has_hyperlaunch_fdt(const struct boot_info *bi)
 {
     int ret = 0;
@@ -20,7 +50,41 @@ int __init has_hyperlaunch_fdt(const struct boot_info *bi)
 
     if ( !fdt || fdt_check_header(fdt) < 0 )
         ret = -EINVAL;
+    else
+        ret = find_hyperlaunch_node(fdt);
+
+    bootstrap_unmap();
+
+    return ret < 0 ? ret : 0;
+}
+
+int __init walk_hyperlaunch_fdt(struct boot_info *bi)
+{
+    int ret = 0, hv_node, node;
+    const void *fdt = bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_IDX]);
+
+    if ( unlikely(!fdt) )
+        return -EINVAL;
+
+    hv_node = find_hyperlaunch_node(fdt);
+    if ( hv_node < 0 )
+    {
+        ret = hv_node;
+        goto err_out;
+    }
+
+    fdt_for_each_subnode(node, fdt, hv_node)
+    {
+        ret = fdt_node_check_compatible(fdt, node, "xen,domain");
+        if ( ret == 0 )
+            bi->nr_domains++;
+    }
+
+    /* Until multi-domain construction is added, throw an error */
+    if ( !bi->nr_domains || bi->nr_domains > 1 )
+        printk(XENLOG_ERR "Hyperlaunch only supports dom0 construction\n");
 
+ err_out:
     bootstrap_unmap();
 
     return ret;
diff --git a/xen/arch/x86/domain-builder/fdt.h b/xen/arch/x86/domain-builder/fdt.h
index 8e62cd843e..1849656571 100644
--- a/xen/arch/x86/domain-builder/fdt.h
+++ b/xen/arch/x86/domain-builder/fdt.h
@@ -11,11 +11,16 @@ struct boot_info;
 
 #ifdef CONFIG_DOMAIN_BUILDER
 int has_hyperlaunch_fdt(const struct boot_info *bi);
+int walk_hyperlaunch_fdt(struct boot_info *bi);
 #else
 static inline int __init has_hyperlaunch_fdt(const struct boot_info *bi)
 {
     return -EINVAL;
 }
+static inline int __init walk_hyperlaunch_fdt(struct boot_info *bi)
+{
+    return -EINVAL;
+}
 #endif
 
 #endif /* __XEN_X86_FDT_H__ */
diff --git a/xen/arch/x86/include/asm/bootinfo.h b/xen/arch/x86/include/asm/bootinfo.h
index 82c2650fcf..1e3d582e45 100644
--- a/xen/arch/x86/include/asm/bootinfo.h
+++ b/xen/arch/x86/include/asm/bootinfo.h
@@ -84,6 +84,7 @@ struct boot_info {
     bool hyperlaunch_enabled;
 
     unsigned int nr_modules;
+    unsigned int nr_domains;
     struct boot_module mods[MAX_NR_BOOTMODS + 1];
     struct boot_domain domains[MAX_NR_BOOTDOMS];
 };
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" , Michal Orzel
	, "Jan Beulich" , Andrew Cooper
	, =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Julien Grall , Bertrand Marquis
	
Subject: [PATCH v3 14/16] x86/hyperlaunch: add memory parsing to domain config
Date: Tue, 8 Apr 2025 17:07:36 +0100
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From: "Daniel P. Smith" 

Add three properties, memory, mem-min, and mem-max, to the domain node device
tree parsing to define the memory allocation for a domain. All three fields are
expressed in kb and written as a u64 in the device tree entries.

Signed-off-by: Daniel P. Smith 
Reviewed-by: Jason Andryuk 
---
 xen/arch/x86/dom0_build.c              |  8 ++++++
 xen/arch/x86/domain-builder/fdt.c      | 34 ++++++++++++++++++++++++++
 xen/arch/x86/include/asm/boot-domain.h |  4 +++
 xen/include/xen/libfdt/libfdt-xen.h    | 10 ++++++++
 4 files changed, 56 insertions(+)

diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c
index 0b467fd4a4..36fb090643 100644
--- a/xen/arch/x86/dom0_build.c
+++ b/xen/arch/x86/dom0_build.c
@@ -627,6 +627,14 @@ int __init construct_dom0(const struct boot_domain *bd)
 
     process_pending_softirqs();
 
+    /* If param dom0_size was not set and HL config provided memory size */
+    if ( !get_memsize(&dom0_size, LONG_MAX) && bd->mem_pages )
+        dom0_size.nr_pages = bd->mem_pages;
+    if ( !get_memsize(&dom0_min_size, LONG_MAX) && bd->min_pages )
+        dom0_size.nr_pages = bd->min_pages;
+    if ( !get_memsize(&dom0_max_size, LONG_MAX) && bd->max_pages )
+        dom0_size.nr_pages = bd->max_pages;
+
     if ( is_hvm_domain(d) )
         rc = dom0_construct_pvh(bd);
     else if ( is_pv_domain(d) )
diff --git a/xen/arch/x86/domain-builder/fdt.c b/xen/arch/x86/domain-builder/fdt.c
index da65f6a5a0..338b4838c2 100644
--- a/xen/arch/x86/domain-builder/fdt.c
+++ b/xen/arch/x86/domain-builder/fdt.c
@@ -6,6 +6,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -212,6 +213,39 @@ static int __init process_domain_node(
             else
                 printk("PV\n");
         }
+        else if ( strncmp(prop_name, "memory", name_len) == 0 )
+        {
+            uint64_t kb;
+            if ( fdt_prop_as_u64(prop, &kb) != 0 )
+            {
+                printk("  failed processing memory for domain %s\n", name);
+                return -EINVAL;
+            }
+            bd->mem_pages = PFN_DOWN(kb * SZ_1K);
+            printk("  memory: %ld kb\n", kb);
+        }
+        else if ( strncmp(prop_name, "mem-min", name_len) == 0 )
+        {
+            uint64_t kb;
+            if ( fdt_prop_as_u64(prop, &kb) != 0 )
+            {
+                printk("  failed processing memory for domain %s\n", name);
+                return -EINVAL;
+            }
+            bd->min_pages = PFN_DOWN(kb * SZ_1K);
+            printk("  min memory: %ld kb\n", kb);
+        }
+        else if ( strncmp(prop_name, "mem-max", name_len) == 0 )
+        {
+            uint64_t kb;
+            if ( fdt_prop_as_u64(prop, &kb) != 0 )
+            {
+                printk("  failed processing memory for domain %s\n", name);
+                return -EINVAL;
+            }
+            bd->max_pages = PFN_DOWN(kb * SZ_1K);
+            printk("  max memory: %ld kb\n", kb);
+        }
     }
 
     fdt_for_each_subnode(node, fdt, dom_node)
diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/include/asm/boot-domain.h
index e316d4bcde..fa8ea1cc66 100644
--- a/xen/arch/x86/include/asm/boot-domain.h
+++ b/xen/arch/x86/include/asm/boot-domain.h
@@ -18,6 +18,10 @@ struct boot_domain {
 #define BUILD_MODE_ENABLE_DM     (1 << 1) /* HVM    | PVH     */
     uint32_t mode;
 
+    unsigned long mem_pages;
+    unsigned long min_pages;
+    unsigned long max_pages;
+
     struct boot_module *kernel;
     struct boot_module *module;
     const char *cmdline;
diff --git a/xen/include/xen/libfdt/libfdt-xen.h b/xen/include/xen/libfdt/libfdt-xen.h
index 3031bec90e..da43e12e38 100644
--- a/xen/include/xen/libfdt/libfdt-xen.h
+++ b/xen/include/xen/libfdt/libfdt-xen.h
@@ -34,6 +34,16 @@ static inline int __init fdt_prop_as_u32(
     return 0;
 }
 
+static inline int __init fdt_prop_as_u64(
+    const struct fdt_property *prop, uint64_t *val)
+{
+    if ( !prop || fdt32_to_cpu(prop->len) < sizeof(u64) )
+        return -EINVAL;
+
+    *val = fdt_cell_as_u64((fdt32_t *)prop->data);
+    return 0;
+}
+
 static inline bool __init fdt_get_prop_offset(
     const void *fdt, int node, const char *name, unsigned long *offset)
 {
-- 
2.43.0



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On 08/04/2025 15:29, Luca Fancellu wrote:
> Hi Ayan,
Hi Luca,
>
>> On 8 Apr 2025, at 15:02, Ayan Kumar Halder  wrote:
>>
>> Hi Luca,
>>
>>> +static void prepare_selector(uint8_t sel)
>>> +{
>>> +    /*
>>> +     * {read,write}_protection_region works using the direct access to the 0..15
>>> +     * regions, so in order to save the isb() overhead, change the PRSELR_EL2
>>> +     * only when needed, so when the upper 4 bits of the selector will change.
>>> +     */
>>> +    sel &= 0xF0U;
>>> +    if ( READ_SYSREG(PRSELR_EL2) != sel )
>>> +    {
>>> +        WRITE_SYSREG(sel, PRSELR_EL2);
>>> +        isb();
>>> +    }
>> This needs to be arm64 specific. Refer ARM DDI 0600A.d ID120821
>>
>> G1.3.19  PRBAR_EL2, /* I guess this is what you are following */
>>
>> Provides access to the base address for the MPU region determined by the value of 'n' and
>> PRSELR_EL2.REGION as PRSELR_EL2.REGION<7:4>:n.
>>
>>
>> Whereas for arm32 . Refer ARM DDI 0568A.c ID110520
>>
>> E2.2.3 HPRBAR,
>>
>> Provides access to the base addresses for the first 32 defined EL2 MPU regions.
>>
>> /* Here we do not need to use HPRSELR for region selection */
>>
>>
>> If you want to make the code similar between arm32 and arm64, then I can suggest you can use these registers.
>>
>> G1.3.17 PRBAR_EL2
>>
>> Provides access to the base addresses for the EL2 MPU region. PRSELR_EL2.REGION determines
>> which MPU region is selected.
>>
>> E2.2.2 HPRBAR
>>
>> Provides indirect access to the base address of the EL2 MPU region currently defined by
>> HPRSELR.
>>
>> Let me know if it makes sense.
>>
>> - Ayan
> Ok I didin’t get that before, what do you think if I modify the code as in this diff (not tested):
>
> diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c
> index fe05c8097155..1bc6d7a77296 100644
> --- a/xen/arch/arm/mpu/mm.c
> +++ b/xen/arch/arm/mpu/mm.c
> @@ -58,19 +58,21 @@ static void __init __maybe_unused build_assertions(void)
>       BUILD_BUG_ON(PAGE_SIZE != SZ_4K);
>   }
>   
> -static void prepare_selector(uint8_t sel)
> +static void prepare_selector(uint8_t *sel)
>   {
> +    uint8_t cur_sel = *sel;
>       /*
>        * {read,write}_protection_region works using the direct access to the 0..15
>        * regions, so in order to save the isb() overhead, change the PRSELR_EL2
>        * only when needed, so when the upper 4 bits of the selector will change.
>        */
> -    sel &= 0xF0U;
> -    if ( READ_SYSREG(PRSELR_EL2) != sel )
> +    cur_sel &= 0xF0U;
> +    if ( READ_SYSREG(PRSELR_EL2) != cur_sel )
>       {
> -        WRITE_SYSREG(sel, PRSELR_EL2);
> +        WRITE_SYSREG(cur_sel, PRSELR_EL2);
>           isb();
>       }
> +    *sel = *sel & 0xFU;
>   }
>   
>   /*
> @@ -102,7 +104,7 @@ void read_protection_region(pr_t *pr_read, uint8_t sel)
>        */
>       prepare_selector(sel);
>   
> -    switch ( sel & 0xFU )
> +    switch ( sel )
>       {
>           GENERATE_READ_PR_REG_CASE(0, pr_read);
>           GENERATE_READ_PR_REG_CASE(1, pr_read);
> @@ -140,7 +142,7 @@ void write_protection_region(const pr_t *pr_write, uint8_t sel)
>        */
>       prepare_selector(sel);
>   
> -    switch ( sel & 0xFU )
> +    switch ( sel )
>       {
>           GENERATE_WRITE_PR_REG_CASE(0, pr_write);
>           GENERATE_WRITE_PR_REG_CASE(1, pr_write);
>
> And later you will use some #ifdef CONFIG_ARM_32 inside prepare_selector() to check
> that the code is passing up to the max supported region or panic.
> And in {read,write}_protection_region() you could add some #ifdef CONFIG_ARM_32 to add
> the case generators for regions from 16 to 23 since R52 can address them directly.
>
> What do you think?

I got this diff working as it is for R82. This looks much lesser code

diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c
index fe05c80971..63627c85dc 100644
--- a/xen/arch/arm/mpu/mm.c
+++ b/xen/arch/arm/mpu/mm.c
@@ -28,23 +28,19 @@ DECLARE_BITMAP(xen_mpumap_mask, MAX_MPU_REGIONS);
  /* EL2 Xen MPU memory region mapping table. */
  pr_t xen_mpumap[MAX_MPU_REGIONS];

-/* The following are needed for the case generator with num==0 */
-#define PRBAR0_EL2 PRBAR_EL2
-#define PRLAR0_EL2 PRLAR_EL2
-
  #define GENERATE_WRITE_PR_REG_CASE(num, 
pr)                                 \
      case num: \
{ \
-        WRITE_SYSREG(pr->prbar.bits & ~MPU_REGION_RES0, 
PRBAR##num##_EL2);  \
-        WRITE_SYSREG(pr->prlar.bits & ~MPU_REGION_RES0, 
PRLAR##num##_EL2);  \
+        WRITE_SYSREG(pr->prbar.bits & ~MPU_REGION_RES0, PRBAR_EL2);  \
+        WRITE_SYSREG(pr->prlar.bits & ~MPU_REGION_RES0, PRLAR_EL2);  \
break; \
      }

  #define GENERATE_READ_PR_REG_CASE(num, pr)                      \
      case num:                                                   \
      {                                                           \
-        pr->prbar.bits = READ_SYSREG(PRBAR##num##_EL2);         \
-        pr->prlar.bits = READ_SYSREG(PRLAR##num##_EL2);         \
+        pr->prbar.bits = READ_SYSREG(PRBAR_EL2);         \
+        pr->prlar.bits = READ_SYSREG(PRLAR_EL2);         \
          break;                                                  \
      }

@@ -65,7 +61,6 @@ static void prepare_selector(uint8_t sel)
       * regions, so in order to save the isb() overhead, change the 
PRSELR_EL2
       * only when needed, so when the upper 4 bits of the selector will 
change.
       */
-    sel &= 0xF0U;
      if ( READ_SYSREG(PRSELR_EL2) != sel )
      {
          WRITE_SYSREG(sel, PRSELR_EL2);

Please give it a try to see if it works at your end.


And then, the code can be reduced further as

void read_protection_region(pr_t *pr_read, uint8_t sel)
{
     /*
      * Before accessing EL2 MPU region register PRBAR_EL2/PRLAR_EL2,
      * make sure PRSELR_EL2 is set, as it determines which MPU region
      * is selected.
      */
     prepare_selector(sel);

     pr_read->prbar.bits = READ_SYSREG(PRBAR_EL2);

     pr_read->prlar.bits = READ_SYSREG(PRLAR_EL2);

}

The same can be done for write_protection_region(...)

- Ayan

>
> Cheers,
> Luca
>
>
>
>


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From: Luca Fancellu 
To: Ayan Kumar Halder 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Michal Orzel ,
	Volodymyr Babchuk 
Subject: Re: [PATCH v2 2/7] arm/mpu: Provide access to the MPU region from the
 C code
Thread-Topic: [PATCH v2 2/7] arm/mpu: Provide access to the MPU region from
 the C code
Thread-Index: AQHbp52Ro+Yg+pQClU+WnJSxei+hH7OZzl8AgAAHm4CAACKVAIAABC6A
Date: Tue, 8 Apr 2025 16:48:10 +0000
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Hi,

On 08/04/2025 17:48, Luca Fancellu wrote:
>
>> On 8 Apr 2025, at 17:33, Ayan Kumar Halder  wrote:
>>
>>
>> On 08/04/2025 15:29, Luca Fancellu wrote:
>>> Hi Ayan,
>> Hi Luca,
>>>> On 8 Apr 2025, at 15:02, Ayan Kumar Halder  wrote:
>>>>
>>>> Hi Luca,
>>>>
>>>>> +static void prepare_selector(uint8_t sel)
>>>>> +{
>>>>> +    /*
>>>>> +     * {read,write}_protection_region works using the direct access to the 0..15
>>>>> +     * regions, so in order to save the isb() overhead, change the PRSELR_EL2
>>>>> +     * only when needed, so when the upper 4 bits of the selector will change.
>>>>> +     */
>>>>> +    sel &= 0xF0U;
>>>>> +    if ( READ_SYSREG(PRSELR_EL2) != sel )
>>>>> +    {
>>>>> +        WRITE_SYSREG(sel, PRSELR_EL2);
>>>>> +        isb();
>>>>> +    }
>>>> This needs to be arm64 specific. Refer ARM DDI 0600A.d ID120821
>>>>
>>>> G1.3.19  PRBAR_EL2, /* I guess this is what you are following */
>>>>
>>>> Provides access to the base address for the MPU region determined by the value of 'n' and
>>>> PRSELR_EL2.REGION as PRSELR_EL2.REGION<7:4>:n.
>>>>
>>>>
>>>> Whereas for arm32 . Refer ARM DDI 0568A.c ID110520
>>>>
>>>> E2.2.3 HPRBAR,
>>>>
>>>> Provides access to the base addresses for the first 32 defined EL2 MPU regions.
>>>>
>>>> /* Here we do not need to use HPRSELR for region selection */
>>>>
>>>>
>>>> If you want to make the code similar between arm32 and arm64, then I can suggest you can use these registers.
>>>>
>>>> G1.3.17 PRBAR_EL2
>>>>
>>>> Provides access to the base addresses for the EL2 MPU region. PRSELR_EL2.REGION determines
>>>> which MPU region is selected.
>>>>
>>>> E2.2.2 HPRBAR
>>>>
>>>> Provides indirect access to the base address of the EL2 MPU region currently defined by
>>>> HPRSELR.
>>>>
>>>> Let me know if it makes sense.
>>>>
>>>> - Ayan
>>> Ok I didin’t get that before, what do you think if I modify the code as in this diff (not tested):
>>>
>>> diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c
>>> index fe05c8097155..1bc6d7a77296 100644
>>> --- a/xen/arch/arm/mpu/mm.c
>>> +++ b/xen/arch/arm/mpu/mm.c
>>> @@ -58,19 +58,21 @@ static void __init __maybe_unused build_assertions(void)
>>>       BUILD_BUG_ON(PAGE_SIZE != SZ_4K);
>>>   }
>>>   -static void prepare_selector(uint8_t sel)
>>> +static void prepare_selector(uint8_t *sel)
>>>   {
>>> +    uint8_t cur_sel = *sel;
>>>       /*
>>>        * {read,write}_protection_region works using the direct access to the 0..15
>>>        * regions, so in order to save the isb() overhead, change the PRSELR_EL2
>>>        * only when needed, so when the upper 4 bits of the selector will change.
>>>        */
>>> -    sel &= 0xF0U;
>>> -    if ( READ_SYSREG(PRSELR_EL2) != sel )
>>> +    cur_sel &= 0xF0U;
>>> +    if ( READ_SYSREG(PRSELR_EL2) != cur_sel )
>>>       {
>>> -        WRITE_SYSREG(sel, PRSELR_EL2);
>>> +        WRITE_SYSREG(cur_sel, PRSELR_EL2);
>>>           isb();
>>>       }
>>> +    *sel = *sel & 0xFU;
>>>   }
>>>     /*
>>> @@ -102,7 +104,7 @@ void read_protection_region(pr_t *pr_read, uint8_t sel)
>>>        */
>>>       prepare_selector(sel);
>>>   -    switch ( sel & 0xFU )
>>> +    switch ( sel )
>>>       {
>>>           GENERATE_READ_PR_REG_CASE(0, pr_read);
>>>           GENERATE_READ_PR_REG_CASE(1, pr_read);
>>> @@ -140,7 +142,7 @@ void write_protection_region(const pr_t *pr_write, uint8_t sel)
>>>        */
>>>       prepare_selector(sel);
>>>   -    switch ( sel & 0xFU )
>>> +    switch ( sel )
>>>       {
>>>           GENERATE_WRITE_PR_REG_CASE(0, pr_write);
>>>           GENERATE_WRITE_PR_REG_CASE(1, pr_write);
>>>
>>> And later you will use some #ifdef CONFIG_ARM_32 inside prepare_selector() to check
>>> that the code is passing up to the max supported region or panic.
>>> And in {read,write}_protection_region() you could add some #ifdef CONFIG_ARM_32 to add
>>> the case generators for regions from 16 to 23 since R52 can address them directly.
>>>
>>> What do you think?
>> I got this diff working as it is for R82. This looks much lesser code
>>
>> diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c
>> index fe05c80971..63627c85dc 100644
>> --- a/xen/arch/arm/mpu/mm.c
>> +++ b/xen/arch/arm/mpu/mm.c
>> @@ -28,23 +28,19 @@ DECLARE_BITMAP(xen_mpumap_mask, MAX_MPU_REGIONS);
>>   /* EL2 Xen MPU memory region mapping table. */
>>   pr_t xen_mpumap[MAX_MPU_REGIONS];
>>
>> -/* The following are needed for the case generator with num==0 */
>> -#define PRBAR0_EL2 PRBAR_EL2
>> -#define PRLAR0_EL2 PRLAR_EL2
>> -
>>   #define GENERATE_WRITE_PR_REG_CASE(num, pr)                                 \
>>       case num: \
>> { \
>> -        WRITE_SYSREG(pr->prbar.bits & ~MPU_REGION_RES0, PRBAR##num##_EL2);  \
>> -        WRITE_SYSREG(pr->prlar.bits & ~MPU_REGION_RES0, PRLAR##num##_EL2);  \
>> +        WRITE_SYSREG(pr->prbar.bits & ~MPU_REGION_RES0, PRBAR_EL2);  \
>> +        WRITE_SYSREG(pr->prlar.bits & ~MPU_REGION_RES0, PRLAR_EL2);  \
>> break; \
>>       }
>>
>>   #define GENERATE_READ_PR_REG_CASE(num, pr)                      \
>>       case num:                                                   \
>>       {                                                           \
>> -        pr->prbar.bits = READ_SYSREG(PRBAR##num##_EL2);         \
>> -        pr->prlar.bits = READ_SYSREG(PRLAR##num##_EL2);         \
>> +        pr->prbar.bits = READ_SYSREG(PRBAR_EL2);         \
>> +        pr->prlar.bits = READ_SYSREG(PRLAR_EL2);         \
>>           break;                                                  \
>>       }
>>
>> @@ -65,7 +61,6 @@ static void prepare_selector(uint8_t sel)
>>        * regions, so in order to save the isb() overhead, change the PRSELR_EL2
>>        * only when needed, so when the upper 4 bits of the selector will change.
>>        */
>> -    sel &= 0xF0U;
>>       if ( READ_SYSREG(PRSELR_EL2) != sel )
>>       {
>>           WRITE_SYSREG(sel, PRSELR_EL2);
>>
>> Please give it a try to see if it works at your end.
>>
>>
>> And then, the code can be reduced further as
>>
>> void read_protection_region(pr_t *pr_read, uint8_t sel)
>> {
>>      /*
>>       * Before accessing EL2 MPU region register PRBAR_EL2/PRLAR_EL2,
>>       * make sure PRSELR_EL2 is set, as it determines which MPU region
>>       * is selected.
>>       */
>>      prepare_selector(sel);
>>
>>      pr_read->prbar.bits = READ_SYSREG(PRBAR_EL2);
>>
>>      pr_read->prlar.bits = READ_SYSREG(PRLAR_EL2);
>>
>> }
>>
>> The same can be done for write_protection_region(...)
>>
>> - Ayan
> The point of the code was to don’t issue an isb() every time we change the selector,
> of course the code would be easier otherwise, but do we want to do that?

Not sure if it is beneficial as you would need to use isb() from 
region16 onwards.

If you are going to keep the code as it is, then the following needs to 
be moved to arm64 specific header as well

#define PRBAR0_EL2 PRBAR_EL2
#define PRLAR0_EL2 PRLAR_EL2

In arm32 , they have different definitions.

I could not follow your earlier snippet, can you test it and send it as 
a patch ?

- Ayan

>
>
>>> Cheers,
>>> Luca
>>>
>>>
>>>
>>>


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On 4/1/2025 9:10 PM, Ingo Molnar wrote:
> Yeah, I moved it over to:
> 
>    git://git.kernel.org/pub/scm/linux/kernel/git/mingo/tip.git WIP.x86/msr
> 

Hi Ingo,

Are you going to merge it into tip in this development cycle for the
v6.16 merge window?

Thanks!
     Xin


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Date: Tue, 08 Apr 2025 22:40:24 +0000
To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, jbeulich@suse.com, roger.pau@citrix.com, dmukhin@ford.com
Subject: [PATCH v5] x86/domain: revisit logging in arch_domain_create()
Message-ID: <20250408224021.1579818-1-dmukhin@ford.com>
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From: Denis Mukhin 

Use %pd in all logs issued from arch_domain_create() and reword some of the
messages.

Also, expand error message in arch_domain_create() under !emulation_flags_o=
k()
case to help debugging.

Signed-off-by: Denis Mukhin 
---
Changes since v4:
- updated wording in the messages as per v4 review
---
 xen/arch/x86/domain.c | 23 ++++++++++++++---------
 1 file changed, 14 insertions(+), 9 deletions(-)

diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c
index 4989600627..60d85a9b3e 100644
--- a/xen/arch/x86/domain.c
+++ b/xen/arch/x86/domain.c
@@ -791,13 +791,14 @@ int arch_domain_create(struct domain *d,
     {
         if ( !opt_allow_unsafe )
         {
-            printk(XENLOG_G_ERR "Xen does not allow DomU creation on this =
CPU"
-                   " for security reasons.\n");
+            printk(XENLOG_G_ERR
+                   "%pd: will not create domU on this CPU for security rea=
sons\n",
+                   d);
             return -EPERM;
         }
         printk(XENLOG_G_WARNING
-               "Dom%d may compromise security on this CPU.\n",
-               d->domain_id);
+               "%pd: may compromise security on this CPU\n",
+               d);
     }
=20
     emflags =3D config->arch.emulation_flags;
@@ -807,16 +808,20 @@ int arch_domain_create(struct domain *d,
=20
     if ( emflags & ~XEN_X86_EMU_ALL )
     {
-        printk(XENLOG_G_ERR "d%d: Invalid emulation bitmap: %#x\n",
-               d->domain_id, emflags);
+        printk(XENLOG_G_ERR
+               "%pd: invalid emulation bitmap: %#x\n",
+               d, emflags);
         return -EINVAL;
     }
=20
     if ( !emulation_flags_ok(d, emflags) )
     {
-        printk(XENLOG_G_ERR "d%d: Xen does not allow %s domain creation "
-               "with the current selection of emulators: %#x\n",
-               d->domain_id, is_hvm_domain(d) ? "HVM" : "PV", emflags);
+        printk(XENLOG_G_ERR
+               "%pd: will not create %s %sdomain with emulators: %#x\n",
+               d,
+               is_hvm_domain(d) ? "HVM" : "PV",
+               is_hardware_domain(d) ? "hardware " : "",
+               emflags);
         return -EOPNOTSUPP;
     }
     d->arch.emulation_flags =3D emflags;
--=20
2.34.1




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Date: Tue, 08 Apr 2025 22:41:31 +0000
To: Jan Beulich 
From: Denis Mukhin 
Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com, xen-devel@lists.xenproject.org
Subject: Re: [PATCH v4] x86/domain: revisit logging in arch_domain_create()
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On Monday, April 7th, 2025 at 7:21 AM, Jan Beulich  wrot=
e:

>
>
> On 05.04.2025 01:21, dmkhn@proton.me wrote:
>
> > --- a/xen/arch/x86/domain.c
> > +++ b/xen/arch/x86/domain.c
> > @@ -791,13 +791,14 @@ int arch_domain_create(struct domain *d,
> > {
> > if ( !opt_allow_unsafe )
> > {
> > - printk(XENLOG_G_ERR "Xen does not allow DomU creation on this CPU"
> > - " for security reasons.\n");
> > + printk(XENLOG_G_ERR
> > + "%pd: cannot create domain on this CPU due to security reasons\n",
> > + d);
> > return -EPERM;
>
>
> I was about to give an ack, but here and ...
>
> > @@ -807,16 +808,20 @@ int arch_domain_create(struct domain *d,
> >
> > if ( emflags & ~XEN_X86_EMU_ALL )
> > {
> > - printk(XENLOG_G_ERR "d%d: Invalid emulation bitmap: %#x\n",
> > - d->domain_id, emflags);
> > + printk(XENLOG_G_ERR
> > + "%pd: invalid emulation bitmap: %#x\n",
> > + d, emflags);
> > return -EINVAL;
> > }
> >
> > if ( !emulation_flags_ok(d, emflags) )
> > {
> > - printk(XENLOG_G_ERR "d%d: Xen does not allow %s domain creation "
> > - "with the current selection of emulators: %#x\n",
> > - d->domain_id, is_hvm_domain(d) ? "HVM" : "PV", emflags);
> > + printk(XENLOG_G_ERR
> > + "%pd: cannot create %s %sdomain with emulators: %#x\n",
> > + d,
> > + is_hvm_domain(d) ? "HVM" : "PV",
> > + is_hardware_domain(d) ? "hardware " : "",
> > + emflags);
> > return -EOPNOTSUPP;
> > }
>
>
> ... here I question the re-wording: Xen could very well create domains in
> these cases. It merely refuses to for one reason or another. In the
> latter case the re-wording may be kind of okay, because code elsewhere ma=
y
> need updating. In the former case, however, the situation is a pretty
> clear cut. It doesn't need to be the original wording, but minimally in
> what you suggest it needs to be "s/cannot/will not/" or some such.

I see, that makes sense. Fixed.

>
> Plus a nit: In the revision log you say "shortened message text where
> possible", yet then you swapped in "due to" for the prior "for" in the
> former of the two cases discussed here. That's clearly longer, without
> (imo) gaining us anything. Similarly it's unclear why you replaced "DomU"=
.

re: message rewording: kept "for".

re: domU: I removed it because my understanding is that w/ eventual
introduction of a split between control domain and hardware domain
there might be another change here.

Kept "domU".

>
> Jan


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Date: Wed, 09 Apr 2025 01:44:23 +0000
To: Jan Beulich 
From: Denis Mukhin 
Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com, xen-devel@lists.xenproject.org
Subject: Re: [PATCH v2 2/7] xen/domain: introduce domid_alloc()
Message-ID: 
In-Reply-To: <32a01662-3f34-4670-b38f-7d660acd3d2c@suse.com>
References: <20250331230508.440198-1-dmukhin@ford.com> <20250331230508.440198-3-dmukhin@ford.com> <32a01662-3f34-4670-b38f-7d660acd3d2c@suse.com>
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On Tuesday, April 8th, 2025 at 7:26 AM, Jan Beulich  wro=
te:

>=20
>=20
> On 01.04.2025 01:05, dmkhn@proton.me wrote:
>=20
> > From: Denis Mukhin dmukhin@ford.com
> >=20
> > Move domain ID allocation during domain creation to a dedicated
> > function domid_alloc().
> >=20
> > Allocation algorithm:
> > - If an explicit domain ID is provided, verify its availability and
> > use it if ID is unused;
> > - Otherwise, perform an exhaustive search for the first available ID
> > within the [0..DOMID_FIRST_RESERVED) range, excluding hardware_domid.
> >=20
> > This minimizes the use of max_init_domid in the code and, thus, is a
> > prerequisite change for enabling console input rotation across domains
> > with console input permission on x86 platforms (which currently is
> > limited to dom0, PV shim and Xen).
>=20
>=20
> By removing the updating of max_init_domid you do - afaict - break the
> remaining use site(s) of the variable.

Unfortunately, this patch should go together with the next patch in
this series:
  xen/domain: introduce domid_top()

I mentioned dependency in the cover letter.

>=20
> > @@ -1003,6 +1004,12 @@ static struct domain *__init create_dom0(struct =
boot_info *bi)
> >=20
> > image =3D &bi->mods[idx];
> >=20
> > + rc =3D domid_alloc(get_initial_domain_id());
> > + if ( rc < 0 )
> > + panic("Cannot use domain ID %d (rc =3D %d)\n",
> > + get_initial_domain_id(), rc);
> > + domid =3D rc;
> > +
> > if ( opt_dom0_pvh )
> > {
> > dom0_cfg.flags |=3D (XEN_DOMCTL_CDF_hvm |
>=20
>=20
> Why does this need to move up, ...
>=20
> > @@ -1017,7 +1024,6 @@ static struct domain *__init create_dom0(struct b=
oot_info *bi)
> > dom0_cfg.flags |=3D XEN_DOMCTL_CDF_iommu;
> >=20
> > /* Create initial domain. Not d0 for pvshim. */
> > - domid =3D get_initial_domain_id();
>=20
>=20
> ... disconnecting the logic from the comment that is relevant there, ...
>=20
> > d =3D domain_create(domid, &dom0_cfg, pv_shim ? 0 : CDF_privileged);
>=20
>=20
> ... and not so much here?

So that in case domid_alloc() fails, create_dom0() will reach error state
quickly. I will re-group it as suggested.

>=20
> > --- a/xen/include/xen/domain.h
> > +++ b/xen/include/xen/domain.h
> > @@ -37,6 +37,9 @@ void arch_get_domain_info(const struct domain *d,
> >=20
> > domid_t get_initial_domain_id(void);
> >=20
> > +#define DOMID_AUTO (-1)
> > +int domid_alloc(int hint);
>=20
>=20
> Imo it would be better to use e.g. DOMID_INVALID as the "give me whatever
> is available" indicator, allowing the function parameter to properly be
> domid_t.

Ack.

>=20
> But first of all - can we please take a step back and re-evaluate whether
> all of this re-arrangement that you're doing (not just in the patch here)
> is really needed? It seems to me that it must be possible to do whatever
> you ultimately want to do without re-writing quite a few pretty central
> pieces that have been serving us fine for a long time. That is, rather
> than make our code fit your desires, make your plans fit within the code
> base we have.

Thanks for the review and feedback!

My plan is to deliver the NS16550 emulator for x86 because that saves some
time during bring up of an embedded system.

Current xen console driver allows physical input pass-through to the domain=
.

This is implemented differently between arm and x86. Currently, the logic
of switching input depends on the global variable `max_init_domid`, which i=
s
advanced on arm only (and never decreased, which makes sense for embedded
designs).

One of the planned emulator features is allowing guest OS to accept
physical input over the emulated UART. On x86, that includes dom0,
PV shim and, with emulator in place, also includes all domains with
NS16550 emulator enabled.

So I need to solve the problem of switching console input to another domain
on x86.

I see there are two ways to solve it:

  (a) iterate through the list of known domains and check "UART emulator
      present" property. AFAIU, that will require maintaining "current cons=
ole
      domain" pointer for a domain list walk.

  (b) calculate the max known domain ID and then check whether domain ID
      corresponds to a domain with "UART emulator present" property by iter=
ating
      through the range of domain IDs. This is current approach in the code=
.

So, this patch series solves problem of switching console input to another =
domain
on x86 using (b); as looked as less changes to me comparing to maintaining =
a
domain pointer.

re: code re-arrangements: while working on the emulator, getting more feedb=
ack,
this and other console-related cleanup series appeared and I think the code=
 which
served fine for a long time, got a bit cleaner, easier to follow and, I hop=
e,
a bit easier to maintain.

>=20
> Jan

Thanks,
Denis


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Date: Wed, 09 Apr 2025 02:38:05 +0000
To: Jan Beulich 
From: Denis Mukhin 
Cc: andrew.cooper3@citrix.com, roger.pau@citrix.com, dmukhin@ford.com, xen-devel@lists.xenproject.org
Subject: Re: [PATCH v1] x86/vmx: Rework __vmread()/vmread_safe()/vmr()
Message-ID: 
In-Reply-To: 
References: <20250408011454.2274613-1-dmukhin@ford.com> 
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On Tuesday, April 8th, 2025 at 12:12 AM, Jan Beulich  wr=
ote:

>
>
> On 08.04.2025 03:15, dmkhn@proton.me wrote:
>
> > From: Denis Mukhin dmukhin@ford.com
> >
> > Use `asm goto()` in vmread_safe() to simplify the error handling logic.
>
>
> This can't be quite right, considering we need to avoid outputs there.

I should have experiment a bit more :-/

Thanks for reviewing this.

>
> > Update __vmread() to return `unsigned long` as per suggestion in [1].
> > Rename __vmread() to vmread_unsafe() to match the behavior.
>
>
> I disagree with this renaming: See e.g. rdmsr() and rdmsr_safe() that we =
have.
> The common case function wants to not have unnecessary verbosity in its n=
ame.
> And there's nothing unsafe about it in the general case. Plus if there wa=
s
> anything unsafe, many of the call sites would require some form of error
> handling.

I will revert all the naming changes and limit the scope only to __vmread()
signature change.

>
> > @@ -1957,38 +1955,44 @@ void cf_check vmx_do_resume(void)
> > hvm_do_resume(v);
> >
> > /* Sync host CR4 in case its value has changed. */
> > - __vmread(HOST_CR4, &host_cr4);
> > - if ( host_cr4 !=3D read_cr4() )
> > + if ( vmread_unsafe(HOST_CR4) !=3D read_cr4() )
> > __vmwrite(HOST_CR4, read_cr4());
> >
> > reset_stack_and_jump(vmx_asm_do_vmentry);
> > }
> >
> > -static inline unsigned long vmr(unsigned long field)
> > +static inline unsigned long vmread(unsigned long field)
> > {
> > - unsigned long val;
> > + unsigned long value =3D 0;
> >
> > - return vmread_safe(field, &val) ? 0 : val;
> > + asm goto ( "vmread %[field], %[value]\n\t"
> > + "jmp %l[out]"
>
>
> Why's the JMP needed here? With it dropped, why's open-coding of vmread_u=
nsafe()
> necessary here? And why's the "safe" variant being replaced by the "unsaf=
e" one?
>
> > + :
> > + : [field] "r" (field), [value] "m" (value)
>
>
> "value" is an output and hence cannot be just "m" (and hence be an input"=
).
> The only option to make such work correctly would be to ...
>
> > + :
>
>
> ... add a "memory" clobber here. Which may have other unwanted side effec=
ts.
>
> > + : out );
> > +out:
>
>
> Nit (here and elsewhere): Labels indented by at least one blank please. S=
ee
> ./CODING_STYLE.

Overlooked formatting change.

>
> > + return value;
> > }
> >
> > -#define vmr16(fld) ({ \
> > +#define vmread16(fld) ({ \
> > BUILD_BUG_ON((fld) & 0x6001); \
> > - (uint16_t)vmr(fld); \
> > + (uint16_t)vmread(fld); \
> > })
> >
> > -#define vmr32(fld) ({ \
> > +#define vmread32(fld) ({ \
> > BUILD_BUG_ON(((fld) & 0x6001) !=3D 0x4000); \
> > - (uint32_t)vmr(fld); \
> > + (uint32_t)vmread(fld); \
> > })
> >
> > static void vmx_dump_sel(const char *name, uint32_t selector)
> > {
> > uint32_t sel, attr, limit;
> > uint64_t base;
> > - sel =3D vmr(selector);
> > - attr =3D vmr(selector + (GUEST_ES_AR_BYTES - GUEST_ES_SELECTOR));
> > - limit =3D vmr(selector + (GUEST_ES_LIMIT - GUEST_ES_SELECTOR));
> > - base =3D vmr(selector + (GUEST_ES_BASE - GUEST_ES_SELECTOR));
> > + sel =3D vmread(selector);
> > + attr =3D vmread(selector + (GUEST_ES_AR_BYTES - GUEST_ES_SELECTOR));
> > + limit =3D vmread(selector + (GUEST_ES_LIMIT - GUEST_ES_SELECTOR));
> > + base =3D vmread(selector + (GUEST_ES_BASE - GUEST_ES_SELECTOR));
>
>
> The renaming causes entirely unnecessary extra churn here (and of course
> elsewhere). The patch is already big enough without this.
>
> > --- a/xen/arch/x86/include/asm/domain.h
> > +++ b/xen/arch/x86/include/asm/domain.h
> > @@ -595,7 +595,7 @@ struct arch_vcpu
> >
> > /* Debug registers. /
> > unsigned long dr[4];
> > - unsigned long dr7; / Ideally int, but __vmread() needs long. /
> > + unsigned long dr7; / Ideally int, but vmread_unsafe() needs unsigned =
long. */
> > unsigned int dr6;
>
>
> If you left this comment alone, all would be (largely) fine - this partic=
ular
> aspect could then be tidied in a follow-on path. But vmread_unsafe() spec=
ifically
> does not need "unsigned long" anymore. The issue was with __vmread() taki=
ng a
> pointer argument.
>
> > --- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h
> > +++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h
> > @@ -320,16 +320,40 @@ static always_inline void __vmpclear(u64 addr)
> > BUG();
> > }
> >
> > -static always_inline void __vmread(unsigned long field, unsigned long =
value)
> > +static always_inline unsigned long vmread_unsafe(unsigned long field)
> > {
> > - asm volatile ( "vmread %1, %0\n\t"
> > - / CF=3D=3D1 or ZF=3D=3D1 --> BUG() */
> > - UNLIKELY_START(be, vmread)
> > - _ASM_BUGFRAME_TEXT(0)
> > - UNLIKELY_END_SECTION
> > - : "=3Drm" (*value)
> > - : "r" (field),
> > - _ASM_BUGFRAME_INFO(BUGFRAME_bug, LINE, FILE, 0) );
> > + unsigned long value;
> > +
> > + asm volatile ( "vmread %[field], %[value]\n\t"
> > + "jc 1f\n\t"
> > + "jz 1f\n\t"
>
>
> Why not JBE as it was before?
>
> > + "jmp 2f\n\t"
> > + "1:\n\t"
> > + " ud2\n\t"
> > + "2:"
>
>
> This is specifically why we used UNLIKELY_*() before. There's no justific=
ation
> whatsoever in the description for the dropping of its use here.
>
> Plus - where did _ASM_BUGFRAME_TEXT(0) go? A bare UD2 isn't acceptable, a=
s it
> won't be possible to associate it back with the respective source line.
>
> > + : [value] "=3Drm" (value)
> > + : [field] "r" (field) );
> > +
> > + return value;
> > +}
> > +
> > +static inline enum vmx_insn_errno vmread_safe(unsigned long field,
> > + unsigned long *value)
> > +{
> > + asm goto ( "vmread %[field], %[value]\n\t"
> > + "jc %l[vmfail_invalid]\n\t"
> > + "jz %l[vmfail_error]"
> > + :
> > + : [field] "r" (field), [value] "m" (*value)
>
>
> See comments on the vmr() adjustments you're making.
>
> Jan


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Subject: Re: [PATCH v5] x86/domain: revisit logging in arch_domain_create()
To: dmkhn@proton.me
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On 09.04.2025 00:40, dmkhn@proton.me wrote:
> From: Denis Mukhin 
> 
> Use %pd in all logs issued from arch_domain_create() and reword some of the
> messages.
> 
> Also, expand error message in arch_domain_create() under !emulation_flags_ok()
> case to help debugging.
> 
> Signed-off-by: Denis Mukhin 

Somewhat reluctantly:
Acked-by: Jan Beulich 

It still remains unclear to me why you think you need to change aspects of
prior wording for no apparent reason. For example, ...

> --- a/xen/arch/x86/domain.c
> +++ b/xen/arch/x86/domain.c
> @@ -791,13 +791,14 @@ int arch_domain_create(struct domain *d,
>      {
>          if ( !opt_allow_unsafe )
>          {
> -            printk(XENLOG_G_ERR "Xen does not allow DomU creation on this CPU"
> -                   " for security reasons.\n");
> +            printk(XENLOG_G_ERR
> +                   "%pd: will not create domU on this CPU for security reasons\n",
> +                   d);

... why would "DomU" need to change to "domU"? Yes, we're inconsistent about
the case of the first letter. Yet the change here doesn't help the
inconsistency in any way. My more general request remains, going forward:
Please no changes, big or small, that don't have at least a tiny bit of a
reason.

Jan


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Subject: Re: [PATCH v3 01/16] x86/boot: introduce boot domain
To: Alejandro Vallejo ,
 "Daniel P. Smith" 
Cc: Jason Andryuk ,
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On 08.04.2025 18:07, Alejandro Vallejo wrote:
> From: "Daniel P. Smith" 
> 
> To begin moving toward allowing the hypervisor to construct more than one
> domain at boot, a container is needed for a domain's build information.
> Introduce a new header, , that contains the initial
> struct boot_domain that encapsulate the build information for a domain.
> 
> Add a kernel and ramdisk boot module reference along with a struct domain
> reference to the new struct boot_domain. This allows a struct boot_domain
> reference to be the only parameter necessary to pass down through the domain
> construction call chain.
> 
> Signed-off-by: Daniel P. Smith 
> Reviewed-by: Jason Andryuk 

Acked-by: Jan Beulich 

> --- /dev/null
> +++ b/xen/arch/x86/include/asm/boot-domain.h
> @@ -0,0 +1,28 @@
> +/* SPDX-License-Identifier: GPL-2.0-or-later */
> +/*
> + * Copyright (c) 2024 Apertus Solutions, LLC
> + * Author: Daniel P. Smith 
> + * Copyright (c) 2024 Christopher Clark 
> + */

I wonder if the 2024-s here shouldn't have been amended by 2025 now. (I'm
also, more generally, unclear about the purpose of such, especially when
the file is really small and simple. It's only going to go stale, as we
can see from various other files having such copyright lines.)

Jan


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Subject: Re: [PATCH v3 00/16] Hyperlaunch device tree for dom0
To: Alejandro Vallejo 
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 Xenia Ragiadakou ,
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 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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 "Daniel P. Smith" ,
 Bertrand Marquis , xen-devel@lists.xenproject.org
References: <20250408160802.49870-1-agarciav@amd.com>
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On 08.04.2025 18:07, Alejandro Vallejo wrote:
> I've purposefully not added my S-by on anything I haven't touched
> (besides rebasing) as most of the feedback had already been addressed by
> Jason by the time I looked at it and it would be utterly nonsensical to
> give myself authorship over it.

My understanding of it is that S-o-b doesn't indicate (only) authorship.
See docs/process/sending-patches.pandoc "Developer's Certificate of Origin
1.1" point (c). And what you would want to demonstrate with adding your
own one is agreement with (d) there. With this I'm not even sure I could
commit patches becoming ready in their present form.

Jan


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Subject: Re: [PATCH v3 02/16] x86/boot: introduce domid field to struct
 boot_domain
To: Alejandro Vallejo 
Cc: "Daniel P. Smith" ,
 Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini ,
 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 xen-devel@lists.xenproject.org
References: <20250408160802.49870-1-agarciav@amd.com>
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On 08.04.2025 18:07, Alejandro Vallejo wrote:
> @@ -1010,15 +1010,15 @@ static struct domain *__init create_dom0(struct boot_info *bi)
>          dom0_cfg.flags |= XEN_DOMCTL_CDF_iommu;
>  
>      /* Create initial domain.  Not d0 for pvshim. */
> -    domid = get_initial_domain_id();
> -    d = domain_create(domid, &dom0_cfg, pv_shim ? 0 : CDF_privileged);
> +    bd->domid = get_initial_domain_id();
> +    d = domain_create(bd->domid, &dom0_cfg, pv_shim ? 0 : CDF_privileged);
>      if ( IS_ERR(d) )
> -        panic("Error creating d%u: %ld\n", domid, PTR_ERR(d));
> +        panic("Error creating d%u: %ld\n", bd->domid, PTR_ERR(d));
>  
>      init_dom0_cpuid_policy(d);
>  
>      if ( alloc_dom0_vcpu0(d) == NULL )
> -        panic("Error creating d%uv0\n", domid);
> +        panic("Error creating %pd vcpu 0\n", d);

And why exactly is this not %pdv0? That's what would be possible to catch by
grep-ing for what vsnprintf() would emit for %pv. Preferably with that adjusted
(which can be done while committing):
Acked-by: Jan Beulich 

Jan


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From: Jiqian Chen 
To: 
CC: Huang Rui , Jiqian Chen ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v2 3/8] vpci/header: Emulate extended capability list for host
Date: Wed, 9 Apr 2025 14:45:23 +0800
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Add a new function to emulate extended capability list for host,
and call it in init_header(). So that, it will be easy to hide
a capability whose initialization fails.

As for the extended capability list of guest, keep hiding it.

Signed-off-by: Jiqian Chen 
---
cc: "Roger Pau Monné" 
---
v1->v2 changes:
new patch

Best regards,
Jiqian Chen.
---
 xen/drivers/vpci/header.c | 44 ++++++++++++++++++++++++++++++++-------
 1 file changed, 36 insertions(+), 8 deletions(-)

diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c
index 0910eb940e23..6833d456566b 100644
--- a/xen/drivers/vpci/header.c
+++ b/xen/drivers/vpci/header.c
@@ -815,6 +815,39 @@ static int vpci_init_capability_list(struct pci_dev *pdev)
     return rc;
 }
 
+static int vpci_init_ext_capability_list(struct pci_dev *pdev)
+{
+    int rc;
+    u32 header;
+    unsigned int pos = 0x100U, ttl = 480;
+
+    if ( !is_hardware_domain(pdev->domain) )
+    {
+        /* Extended capabilities read as zero, write ignore */
+        rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL,
+                               pos, 4, (void *)0);
+        if ( rc )
+            return rc;
+    }
+
+    while ( pos && ttl-- )
+    {
+        header = pci_conf_read32(pdev->sbdf, pos);
+
+        rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL,
+                               pos, 4, (void *)(uintptr_t)header);
+        if ( rc )
+            return rc;
+
+        if ( (header == 0) || (header == -1) )
+            return 0;
+
+        pos = PCI_EXT_CAP_NEXT(header);
+    }
+
+    return 0;
+}
+
 static int cf_check init_header(struct pci_dev *pdev)
 {
     uint16_t cmd;
@@ -867,14 +900,9 @@ static int cf_check init_header(struct pci_dev *pdev)
     if ( rc )
         return rc;
 
-    if ( !is_hwdom )
-    {
-        /* Extended capabilities read as zero, write ignore */
-        rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL, 0x100, 4,
-                               (void *)0);
-        if ( rc )
-            return rc;
-    }
+    rc = vpci_init_ext_capability_list(pdev);
+    if ( rc )
+        return rc;
 
     if ( pdev->ignore_bars )
         return 0;
-- 
2.34.1



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From: Jiqian Chen 
To: 
CC: Huang Rui , Jiqian Chen , "Andrew
 Cooper" , Anthony PERARD
	, Michal Orzel , Jan Beulich
	, Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , "Stefano
 Stabellini" 
Subject: [PATCH v2 1/8] driver/pci: Get next capability without passing caps
Date: Wed, 9 Apr 2025 14:45:21 +0800
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Modify function pci_find_next_cap_ttl to support returning position
of next capability when array "caps" is empty or size "n" is zero.

That can help caller to get next capability offset if caller just
has a information of current capability offset.

That will be used in a follow-on change.

Signed-off-by: Jiqian Chen 
---
cc: Andrew Cooper 
cc: Anthony PERARD 
cc: Michal Orzel 
cc: Jan Beulich 
cc: Julien Grall 
cc: "Roger Pau Monné" 
cc: Stefano Stabellini 
---
v1->v2 changes:
new patch

Best regards,
Jiqian Chen.
---
 xen/drivers/pci/pci.c | 6 +++++-
 xen/include/xen/pci.h | 2 +-
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/xen/drivers/pci/pci.c b/xen/drivers/pci/pci.c
index edf5b9f7ae9f..ec81d0db6133 100644
--- a/xen/drivers/pci/pci.c
+++ b/xen/drivers/pci/pci.c
@@ -40,7 +40,7 @@ unsigned int pci_find_cap_offset(pci_sbdf_t sbdf, unsigned int cap)
 }
 
 unsigned int pci_find_next_cap_ttl(pci_sbdf_t sbdf, unsigned int pos,
-                                   const unsigned int caps[], unsigned int n,
+                                   const unsigned int *caps, unsigned int n,
                                    unsigned int *ttl)
 {
     while ( (*ttl)-- )
@@ -55,6 +55,10 @@ unsigned int pci_find_next_cap_ttl(pci_sbdf_t sbdf, unsigned int pos,
 
         if ( id == 0xff )
             break;
+
+        if ( !caps || n == 0 )
+            return pos;
+
         for ( i = 0; i < n; i++ )
         {
             if ( id == caps[i] )
diff --git a/xen/include/xen/pci.h b/xen/include/xen/pci.h
index ef601966533e..cc84f2cbebfc 100644
--- a/xen/include/xen/pci.h
+++ b/xen/include/xen/pci.h
@@ -251,7 +251,7 @@ int pci_mmcfg_write(unsigned int seg, unsigned int bus,
                     unsigned int devfn, int reg, int len, u32 value);
 unsigned int pci_find_cap_offset(pci_sbdf_t sbdf, unsigned int cap);
 unsigned int pci_find_next_cap_ttl(pci_sbdf_t sbdf, unsigned int pos,
-                                   const unsigned int caps[], unsigned int n,
+                                   const unsigned int *caps, unsigned int n,
                                    unsigned int *ttl);
 unsigned int pci_find_next_cap(pci_sbdf_t sbdf, unsigned int pos,
                                unsigned int cap);
-- 
2.34.1



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From: Jiqian Chen 
To: 
CC: Huang Rui , Jiqian Chen ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Andrew Cooper
	, Anthony PERARD ,
	Michal Orzel , Jan Beulich , "Julien
 Grall" , Stefano Stabellini 
Subject: [PATCH v2 4/8] vpci: Hide capability when it fails to initialize
Date: Wed, 9 Apr 2025 14:45:24 +0800
Message-ID: <20250409064528.405573-5-Jiqian.Chen@amd.com>
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When vpci fails to initialize a capability of a device, it just
return error instead of catching and processing exception. That
makes the entire device unusable.

So, refactor REGISTER_VPCI_INIT to contain more capability specific
information, and use new functions to hide capability when
initialization fails in vpci_assign_device().

Those new functions remove the failed legacy/extended capability
from the emulated legacy/extended capability list.

What's more, change the definition of init_header() since it is
not a capability and it is needed for all devices' PCI config space.

Note: call vpci_make_msix_hole() in the end of init_msix() since the
change of sequence of init_header() and init_msix().

Signed-off-by: Jiqian Chen 
---
cc: "Roger Pau Monné" 
cc: Andrew Cooper 
cc: Anthony PERARD 
cc: Michal Orzel 
cc: Jan Beulich 
cc: Julien Grall 
cc: Stefano Stabellini 
---
v1->v2 changes:
* Removed the "priorities" of initializing capabilities since it isn't used anymore.
* Added new function vpci_capability_mask() and vpci_ext_capability_mask() to remove failed capability from list.
* Called vpci_make_msix_hole() in the end of init_msix().

Best regards,
Jiqian Chen.
---
 xen/drivers/vpci/header.c  |   3 +-
 xen/drivers/vpci/msi.c     |   2 +-
 xen/drivers/vpci/msix.c    |   8 +-
 xen/drivers/vpci/rebar.c   |   2 +-
 xen/drivers/vpci/vpci.c    | 175 +++++++++++++++++++++++++++++++------
 xen/include/xen/pci_regs.h |   1 +
 xen/include/xen/vpci.h     |  26 ++++--
 xen/include/xen/xen.lds.h  |   2 +-
 8 files changed, 179 insertions(+), 40 deletions(-)

diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c
index 6833d456566b..51a67d76ad8a 100644
--- a/xen/drivers/vpci/header.c
+++ b/xen/drivers/vpci/header.c
@@ -848,7 +848,7 @@ static int vpci_init_ext_capability_list(struct pci_dev *pdev)
     return 0;
 }
 
-static int cf_check init_header(struct pci_dev *pdev)
+int vpci_init_header(struct pci_dev *pdev)
 {
     uint16_t cmd;
     uint64_t addr, size;
@@ -1044,7 +1044,6 @@ static int cf_check init_header(struct pci_dev *pdev)
     pci_conf_write16(pdev->sbdf, PCI_COMMAND, cmd);
     return rc;
 }
-REGISTER_VPCI_INIT(init_header, VPCI_PRIORITY_MIDDLE);
 
 /*
  * Local variables:
diff --git a/xen/drivers/vpci/msi.c b/xen/drivers/vpci/msi.c
index 66e5a8a116be..ca89ae9b9c22 100644
--- a/xen/drivers/vpci/msi.c
+++ b/xen/drivers/vpci/msi.c
@@ -270,7 +270,7 @@ static int cf_check init_msi(struct pci_dev *pdev)
 
     return 0;
 }
-REGISTER_VPCI_INIT(init_msi, VPCI_PRIORITY_LOW);
+REGISTER_VPCI_LEGACY_CAP(PCI_CAP_ID_MSI, init_msi);
 
 void vpci_dump_msi(void)
 {
diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c
index 6bd8c55bb48e..6537374c79a0 100644
--- a/xen/drivers/vpci/msix.c
+++ b/xen/drivers/vpci/msix.c
@@ -751,9 +751,13 @@ static int cf_check init_msix(struct pci_dev *pdev)
     pdev->vpci->msix = msix;
     list_add(&msix->next, &d->arch.hvm.msix_tables);
 
-    return 0;
+    spin_lock(&pdev->vpci->lock);
+    rc = vpci_make_msix_hole(pdev);
+    spin_unlock(&pdev->vpci->lock);
+
+    return rc
 }
-REGISTER_VPCI_INIT(init_msix, VPCI_PRIORITY_HIGH);
+REGISTER_VPCI_LEGACY_CAP(PCI_CAP_ID_MSIX, init_msix);
 
 /*
  * Local variables:
diff --git a/xen/drivers/vpci/rebar.c b/xen/drivers/vpci/rebar.c
index 793937449af7..79858e5dc92f 100644
--- a/xen/drivers/vpci/rebar.c
+++ b/xen/drivers/vpci/rebar.c
@@ -118,7 +118,7 @@ static int cf_check init_rebar(struct pci_dev *pdev)
 
     return 0;
 }
-REGISTER_VPCI_INIT(init_rebar, VPCI_PRIORITY_LOW);
+REGISTER_VPCI_EXTEND_CAP(PCI_EXT_CAP_ID_REBAR, init_rebar);
 
 /*
  * Local variables:
diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c
index 1e6aa5d799b9..f1f125bfdab1 100644
--- a/xen/drivers/vpci/vpci.c
+++ b/xen/drivers/vpci/vpci.c
@@ -35,9 +35,25 @@ struct vpci_register {
     uint32_t rsvdz_mask;
 };
 
+static int vpci_register_cmp(const struct vpci_register *r1,
+                             const struct vpci_register *r2)
+{
+    /* Return 0 if registers overlap. */
+    if ( r1->offset < r2->offset + r2->size &&
+         r2->offset < r1->offset + r1->size )
+        return 0;
+    if ( r1->offset < r2->offset )
+        return -1;
+    if ( r1->offset > r2->offset )
+        return 1;
+
+    ASSERT_UNREACHABLE();
+    return 0;
+}
+
 #ifdef __XEN__
-extern vpci_register_init_t *const __start_vpci_array[];
-extern vpci_register_init_t *const __end_vpci_array[];
+extern vpci_capability_t *const __start_vpci_array[];
+extern vpci_capability_t *const __end_vpci_array[];
 #define NUM_VPCI_INIT (__end_vpci_array - __start_vpci_array)
 
 #ifdef CONFIG_HAS_VPCI_GUEST_SUPPORT
@@ -83,6 +99,133 @@ static int assign_virtual_sbdf(struct pci_dev *pdev)
 
 #endif /* CONFIG_HAS_VPCI_GUEST_SUPPORT */
 
+static void vpci_capability_mask(struct pci_dev *pdev,
+                                 const unsigned int cap)
+{
+    const unsigned int size = 1;
+    const unsigned int offset = pci_find_cap_offset(pdev->sbdf, cap);
+    const struct vpci_register r = { .offset = offset, .size = size };
+    struct vpci_register *rm;
+    struct vpci *vpci = pdev->vpci;
+
+    spin_lock(&vpci->lock);
+    list_for_each_entry ( rm, &vpci->handlers, node )
+    {
+        int cmp = vpci_register_cmp(&r, rm);
+
+        if ( !cmp && rm->offset == offset && rm->size == size )
+        {
+            struct vpci_register *pre = list_entry(rm->node.prev,
+                                                   struct vpci_register,
+                                                   node);
+            struct vpci_register *next = list_entry(rm->node.next,
+                                                    struct vpci_register,
+                                                    node);
+
+            pre->private = next->private;
+
+            /* PCI_CAP_LIST_ID register of current capability */
+            list_del(&rm->node);
+            /* PCI_CAP_LIST_NEXT register of current capability */
+            list_del(&next->node);
+            spin_unlock(&vpci->lock);
+
+            xfree(rm);
+            xfree(next);
+            return;
+        }
+        if ( cmp <= 0 )
+            break;
+    }
+    spin_unlock(&vpci->lock);
+}
+
+static void vpci_ext_capability_mask(struct pci_dev *pdev,
+                                     const unsigned int cap)
+{
+    const unsigned int size = 4;
+    const unsigned int offset = pci_find_ext_capability(pdev->sbdf, cap);
+    const struct vpci_register r = { .offset = offset, .size = size };
+    struct vpci_register *rm;
+    struct vpci *vpci = pdev->vpci;
+
+    spin_lock(&vpci->lock);
+    list_for_each_entry ( rm, &vpci->handlers, node )
+    {
+        int cmp = vpci_register_cmp(&r, rm);
+
+        if ( !cmp && rm->offset == offset && rm->size == size )
+        {
+            struct vpci_register *pre;
+            u32 pre_header, header = (u32)(uintptr_t)rm->private;
+
+            if ( offset == 0x100U && PCI_EXT_CAP_NEXT(header) == 0 )
+            {
+                rm->private = (void *)(uintptr_t)0;
+                spin_unlock(&vpci->lock);
+                return;
+            }
+            else if ( offset == 0x100U )
+            {
+                pre = rm;
+                rm = list_entry(rm->node.next, struct vpci_register, node);
+                pre->private = rm->private;
+            }
+            else
+            {
+                pre = list_entry(rm->node.prev, struct vpci_register, node);
+                pre_header = (u32)(uintptr_t)pre->private;
+                pre->private =
+                    (void *)(uintptr_t)((pre_header & !PCI_EXT_CAP_NEXT_MASK) |
+                                        (header & PCI_EXT_CAP_NEXT_MASK));
+            }
+            list_del(&rm->node);
+            spin_unlock(&vpci->lock);
+            xfree(rm);
+            return;
+        }
+        if ( cmp <= 0 )
+            break;
+    }
+    spin_unlock(&vpci->lock);
+}
+
+static void vpci_init_capabilities(struct pci_dev *pdev)
+{
+    for ( unsigned int i = 0; i < NUM_VPCI_INIT; i++ )
+    {
+        const vpci_capability_t *capability = __start_vpci_array[i];
+        const unsigned int cap = capability->id;
+        const bool is_ext = capability->is_ext;
+        unsigned int pos;
+        int rc;
+
+        if ( !is_hardware_domain(pdev->domain) && is_ext )
+            continue;
+
+        if ( is_ext )
+            pos = pci_find_ext_capability(pdev->sbdf, cap);
+        else
+            pos = pci_find_cap_offset(pdev->sbdf, cap);
+
+        if ( !pos )
+            continue;
+
+        rc = capability->init(pdev);
+
+        if ( rc )
+        {
+            printk(XENLOG_WARNING "%pd %pp: %s cap %u init fail rc=%d, mask it\n",
+                   pdev->domain, &pdev->sbdf,
+                   is_ext ? "extended" : "legacy", cap, rc);
+            if ( is_ext )
+                vpci_ext_capability_mask(pdev, cap);
+            else
+                vpci_capability_mask(pdev, cap);
+        }
+    }
+}
+
 void vpci_deassign_device(struct pci_dev *pdev)
 {
     unsigned int i;
@@ -128,7 +271,6 @@ void vpci_deassign_device(struct pci_dev *pdev)
 
 int vpci_assign_device(struct pci_dev *pdev)
 {
-    unsigned int i;
     const unsigned long *ro_map;
     int rc = 0;
 
@@ -159,12 +301,11 @@ int vpci_assign_device(struct pci_dev *pdev)
         goto out;
 #endif
 
-    for ( i = 0; i < NUM_VPCI_INIT; i++ )
-    {
-        rc = __start_vpci_array[i](pdev);
-        if ( rc )
-            break;
-    }
+    rc = vpci_init_header(pdev);
+    if ( rc )
+        goto out;
+
+    vpci_init_capabilities(pdev);
 
  out: __maybe_unused;
     if ( rc )
@@ -174,22 +315,6 @@ int vpci_assign_device(struct pci_dev *pdev)
 }
 #endif /* __XEN__ */
 
-static int vpci_register_cmp(const struct vpci_register *r1,
-                             const struct vpci_register *r2)
-{
-    /* Return 0 if registers overlap. */
-    if ( r1->offset < r2->offset + r2->size &&
-         r2->offset < r1->offset + r1->size )
-        return 0;
-    if ( r1->offset < r2->offset )
-        return -1;
-    if ( r1->offset > r2->offset )
-        return 1;
-
-    ASSERT_UNREACHABLE();
-    return 0;
-}
-
 /* Dummy hooks, writes are ignored, reads return 1's */
 static uint32_t cf_check vpci_ignored_read(
     const struct pci_dev *pdev, unsigned int reg, void *data)
diff --git a/xen/include/xen/pci_regs.h b/xen/include/xen/pci_regs.h
index 27b4f44eedf3..5fe6653fded4 100644
--- a/xen/include/xen/pci_regs.h
+++ b/xen/include/xen/pci_regs.h
@@ -449,6 +449,7 @@
 #define PCI_EXT_CAP_ID(header)		((header) & 0x0000ffff)
 #define PCI_EXT_CAP_VER(header)		(((header) >> 16) & 0xf)
 #define PCI_EXT_CAP_NEXT(header)	(((header) >> 20) & 0xffc)
+#define PCI_EXT_CAP_NEXT_MASK		0xFFC00000U
 
 #define PCI_EXT_CAP_ID_ERR	1
 #define PCI_EXT_CAP_ID_VC	2
diff --git a/xen/include/xen/vpci.h b/xen/include/xen/vpci.h
index 807401b2eaa2..5016ded64d89 100644
--- a/xen/include/xen/vpci.h
+++ b/xen/include/xen/vpci.h
@@ -13,11 +13,11 @@ typedef uint32_t vpci_read_t(const struct pci_dev *pdev, unsigned int reg,
 typedef void vpci_write_t(const struct pci_dev *pdev, unsigned int reg,
                           uint32_t val, void *data);
 
-typedef int vpci_register_init_t(struct pci_dev *dev);
-
-#define VPCI_PRIORITY_HIGH      "1"
-#define VPCI_PRIORITY_MIDDLE    "5"
-#define VPCI_PRIORITY_LOW       "9"
+typedef struct {
+    unsigned int id;
+    bool is_ext;
+    int (*init)(struct pci_dev *pdev);
+} vpci_capability_t;
 
 #define VPCI_ECAM_BDF(addr)     (((addr) & 0x0ffff000) >> 12)
 
@@ -29,9 +29,19 @@ typedef int vpci_register_init_t(struct pci_dev *dev);
  */
 #define VPCI_MAX_VIRT_DEV       (PCI_SLOT(~0) + 1)
 
-#define REGISTER_VPCI_INIT(x, p)                \
-  static vpci_register_init_t *const x##_entry  \
-               __used_section(".data.vpci." p) = (x)
+#define REGISTER_VPCI_CAP(cap, x, ext) \
+  static vpci_capability_t x##_t = { \
+        .id = (cap), \
+        .init = (x), \
+        .is_ext = (ext), \
+  }; \
+  static vpci_capability_t *const x##_entry  \
+               __used_section(".data.vpci.") = &(x##_t)
+
+#define REGISTER_VPCI_LEGACY_CAP(cap, x) REGISTER_VPCI_CAP(cap, x, false)
+#define REGISTER_VPCI_EXTEND_CAP(cap, x) REGISTER_VPCI_CAP(cap, x, true)
+
+int __must_check vpci_init_header(struct pci_dev *pdev);
 
 /* Assign vPCI to device by adding handlers. */
 int __must_check vpci_assign_device(struct pci_dev *pdev);
diff --git a/xen/include/xen/xen.lds.h b/xen/include/xen/xen.lds.h
index 16a9b1ba03db..c73222112dd3 100644
--- a/xen/include/xen/xen.lds.h
+++ b/xen/include/xen/xen.lds.h
@@ -187,7 +187,7 @@
 #define VPCI_ARRAY               \
        . = ALIGN(POINTER_ALIGN); \
        __start_vpci_array = .;   \
-       *(SORT(.data.vpci.*))     \
+       *(.data.vpci.*)     \
        __end_vpci_array = .;
 #else
 #define VPCI_ARRAY
-- 
2.34.1



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From: Jiqian Chen 
To: 
CC: Huang Rui , Jiqian Chen , "Jan
 Beulich" , Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v2 8/8] vpci/msix: Add function to clean MSIX resources
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When init_msix() fails, it needs to clean all MSIX resources.
So, add a new function fini_msix() to do that.

And to unregister the mmio handler of vpci_msix_table_ops, add
a new function.

Signed-off-by: Jiqian Chen 
---
cc: Jan Beulich 
cc: Andrew Cooper 
cc: "Roger Pau Monné" 
---
v1->v2 changes:
new patch.

Best regards,
Jiqian Chen.
---
 xen/arch/x86/hvm/intercept.c      | 44 ++++++++++++++++++++++
 xen/arch/x86/include/asm/hvm/io.h |  3 ++
 xen/drivers/vpci/msix.c           | 61 ++++++++++++++++++++++++++++---
 3 files changed, 103 insertions(+), 5 deletions(-)

diff --git a/xen/arch/x86/hvm/intercept.c b/xen/arch/x86/hvm/intercept.c
index da22c386763e..5eacf51d4d2c 100644
--- a/xen/arch/x86/hvm/intercept.c
+++ b/xen/arch/x86/hvm/intercept.c
@@ -276,6 +276,50 @@ void register_mmio_handler(struct domain *d,
     handler->mmio.ops = ops;
 }
 
+void unregister_mmio_handler(struct domain *d,
+                             const struct hvm_mmio_ops *ops)
+{
+    unsigned int i, count = d->arch.hvm.io_handler_count;
+
+    ASSERT(d->arch.hvm.io_handler);
+
+    if ( !count )
+        return;
+
+    for ( i = 0; i < count; i++ )
+        if ( d->arch.hvm.io_handler[i].type == IOREQ_TYPE_COPY &&
+             d->arch.hvm.io_handler[i].mmio.ops == ops )
+            break;
+
+    if ( i == count )
+        return;
+
+    for ( ; i < count - 1; i++ )
+    {
+        struct hvm_io_handler *curr = &d->arch.hvm.io_handler[i];
+        struct hvm_io_handler *next = &d->arch.hvm.io_handler[i + 1];
+
+        curr->type = next->type;
+        curr->ops = next->ops;
+        if ( next->type == IOREQ_TYPE_COPY )
+        {
+            curr->portio.port = 0;
+            curr->portio.size = 0;
+            curr->portio.action = 0;
+            curr->mmio.ops = next->mmio.ops;
+        }
+        else
+        {
+            curr->mmio.ops = 0;
+            curr->portio.port = next->portio.port;
+            curr->portio.size = next->portio.size;
+            curr->portio.action = next->portio.action;
+        }
+    }
+
+    d->arch.hvm.io_handler_count--;
+}
+
 void register_portio_handler(struct domain *d, unsigned int port,
                              unsigned int size, portio_action_t action)
 {
diff --git a/xen/arch/x86/include/asm/hvm/io.h b/xen/arch/x86/include/asm/hvm/io.h
index 565bad300d20..018d2745fd99 100644
--- a/xen/arch/x86/include/asm/hvm/io.h
+++ b/xen/arch/x86/include/asm/hvm/io.h
@@ -75,6 +75,9 @@ bool hvm_mmio_internal(paddr_t gpa);
 void register_mmio_handler(struct domain *d,
                            const struct hvm_mmio_ops *ops);
 
+void unregister_mmio_handler(struct domain *d,
+                             const struct hvm_mmio_ops *ops);
+
 void register_portio_handler(
     struct domain *d, unsigned int port, unsigned int size,
     portio_action_t action);
diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c
index 6537374c79a0..60654d4f6d0b 100644
--- a/xen/drivers/vpci/msix.c
+++ b/xen/drivers/vpci/msix.c
@@ -703,6 +703,54 @@ int vpci_make_msix_hole(const struct pci_dev *pdev)
     return 0;
 }
 
+static void fini_msix(struct pci_dev *pdev)
+{
+    struct vpci *vpci = pdev->vpci;
+
+    if ( !vpci->msix )
+        return;
+
+    list_del(&vpci->msix->next);
+    if ( list_empty(&pdev->domain->arch.hvm.msix_tables) )
+        unregister_mmio_handler(pdev->domain, &vpci_msix_table_ops);
+
+    /* Remove any MSIX regions if present. */
+    for ( unsigned int i = 0;
+          vpci->msix && i < ARRAY_SIZE(vpci->msix->tables);
+          i++ )
+    {
+        unsigned long start = PFN_DOWN(vmsix_table_addr(pdev->vpci, i));
+        unsigned long end = PFN_DOWN(vmsix_table_addr(pdev->vpci, i) +
+                                     vmsix_table_size(pdev->vpci, i) - 1);
+
+        for ( unsigned int j = 0; j < ARRAY_SIZE(vpci->header.bars); j++ )
+        {
+            int rc;
+            const struct vpci_bar *bar = &vpci->header.bars[j];
+
+            if ( rangeset_is_empty(bar->mem) )
+                continue;
+
+            rc = rangeset_remove_range(bar->mem, start, end);
+            if ( rc )
+            {
+                gprintk(XENLOG_WARNING,
+                       "%pp: failed to remove MSIX table [%lx, %lx]: %d\n",
+                        &pdev->sbdf, start, end, rc);
+                return;
+            }
+        }
+    }
+
+    for ( unsigned int i = 0; i < ARRAY_SIZE(vpci->msix->table); i++ )
+        if ( vpci->msix->table[i] )
+            iounmap(vpci->msix->table[i]);
+
+    vpci_remove_registers(vpci, msix_control_reg(pdev->msix_pos), 2);
+    xfree(vpci->msix);
+    vpci->msix = NULL;
+}
+
 static int cf_check init_msix(struct pci_dev *pdev)
 {
     struct domain *d = pdev->domain;
@@ -726,10 +774,7 @@ static int cf_check init_msix(struct pci_dev *pdev)
     rc = vpci_add_register(pdev->vpci, control_read, control_write,
                            msix_control_reg(msix_offset), 2, msix);
     if ( rc )
-    {
-        xfree(msix);
-        return rc;
-    }
+        goto fail;
 
     msix->max_entries = max_entries;
     msix->pdev = pdev;
@@ -755,7 +800,13 @@ static int cf_check init_msix(struct pci_dev *pdev)
     rc = vpci_make_msix_hole(pdev);
     spin_unlock(&pdev->vpci->lock);
 
-    return rc
+    if ( !rc )
+        return 0;
+
+ fail:
+    fini_msix(pdev);
+
+    return rc;
 }
 REGISTER_VPCI_LEGACY_CAP(PCI_CAP_ID_MSIX, init_msix);
 
-- 
2.34.1



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From: Jiqian Chen 
To: 
CC: Huang Rui , Jiqian Chen , "Andrew
 Cooper" , Anthony PERARD
	, Michal Orzel , Jan Beulich
	, Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , "Stefano
 Stabellini" 
Subject: [PATCH v2 0/8] Support hiding capability when its initialization fails
Date: Wed, 9 Apr 2025 14:45:20 +0800
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Hi,

This series is to
emulate legacy and extended capability list for host, including patch #1, #2, #3,
hide capability when its initialization fails, including patch #4,
remove all related registers and other resources when failure, including patch #5, #6, #7, #8.

Best regards,
Jiqian Chen.
---
cc: Andrew Cooper 
cc: Anthony PERARD 
cc: Michal Orzel 
cc: Jan Beulich 
cc: Julien Grall 
cc: "Roger Pau Monné" 
cc: Stefano Stabellini 
---
Jiqian Chen (8):
  driver/pci: Get next capability without passing caps
  vpci/header: Emulate legacy capability list for host
  vpci/header: Emulate extended capability list for host
  vpci: Hide capability when it fails to initialize
  vpci: Refactor vpci_remove_register to remove matched registers
  vpci/rebar: Remove registers when init_rebar() fails
  vpci/msi: Free MSI resources when init_msi() fails
  vpci/msix: Add function to clean MSIX resources

 tools/tests/vpci/main.c           |   4 +-
 xen/arch/x86/hvm/intercept.c      |  44 +++++++
 xen/arch/x86/include/asm/hvm/io.h |   3 +
 xen/drivers/pci/pci.c             |   6 +-
 xen/drivers/vpci/header.c         | 180 ++++++++++++++++-----------
 xen/drivers/vpci/msi.c            |  49 ++++++--
 xen/drivers/vpci/msix.c           |  67 +++++++++-
 xen/drivers/vpci/rebar.c          |  27 ++--
 xen/drivers/vpci/vpci.c           | 198 ++++++++++++++++++++++++------
 xen/include/xen/pci.h             |   2 +-
 xen/include/xen/pci_regs.h        |   1 +
 xen/include/xen/vpci.h            |  30 +++--
 xen/include/xen/xen.lds.h         |   2 +-
 13 files changed, 461 insertions(+), 152 deletions(-)

-- 
2.34.1



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From: Jiqian Chen 
To: 
CC: Huang Rui , Jiqian Chen ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	
Subject: [PATCH v2 5/8] vpci: Refactor vpci_remove_register to remove matched registers
Date: Wed, 9 Apr 2025 14:45:25 +0800
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vpci_remove_register() only supports removing a register in a time,
but the follow-on changes need to remove all registers within a
range. And it is only used for test. So, refactor it to support
removing all matched registers in a calling time.

And it is no matter to remove a non exist register, so remove the
__must_check prefix.

Signed-off-by: Jiqian Chen 
---
cc: "Roger Pau Monné" 
cc: Anthony PERARD 
---
v1->v2 changes:
new patch

Best regards,
Jiqian Chen.
---
 tools/tests/vpci/main.c |  4 ++--
 xen/drivers/vpci/vpci.c | 23 ++++++++++++-----------
 xen/include/xen/vpci.h  |  4 ++--
 3 files changed, 16 insertions(+), 15 deletions(-)

diff --git a/tools/tests/vpci/main.c b/tools/tests/vpci/main.c
index 33223db3eb77..ca72877d60cd 100644
--- a/tools/tests/vpci/main.c
+++ b/tools/tests/vpci/main.c
@@ -132,10 +132,10 @@ static void vpci_write32_mask(const struct pci_dev *pdev, unsigned int reg,
                                   rsvdz_mask))
 
 #define VPCI_REMOVE_REG(off, size)                                          \
-    assert(!vpci_remove_register(test_pdev.vpci, off, size))
+    assert(!vpci_remove_registers(test_pdev.vpci, off, size))
 
 #define VPCI_REMOVE_INVALID_REG(off, size)                                  \
-    assert(vpci_remove_register(test_pdev.vpci, off, size))
+    assert(vpci_remove_registers(test_pdev.vpci, off, size))
 
 /* Read a 32b register using all possible sizes. */
 void multiread4_check(unsigned int reg, uint32_t val)
diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c
index f1f125bfdab1..115d3c5f0c84 100644
--- a/xen/drivers/vpci/vpci.c
+++ b/xen/drivers/vpci/vpci.c
@@ -418,34 +418,35 @@ int vpci_add_register_mask(struct vpci *vpci, vpci_read_t *read_handler,
     return 0;
 }
 
-int vpci_remove_register(struct vpci *vpci, unsigned int offset,
-                         unsigned int size)
+int vpci_remove_registers(struct vpci *vpci, unsigned int offset,
+                          unsigned int size)
 {
     const struct vpci_register r = { .offset = offset, .size = size };
     struct vpci_register *rm;
+    int rc = -ENOENT;
 
     spin_lock(&vpci->lock);
     list_for_each_entry ( rm, &vpci->handlers, node )
     {
         int cmp = vpci_register_cmp(&r, rm);
 
-        /*
-         * NB: do not use a switch so that we can use break to
-         * get out of the list loop earlier if required.
-         */
-        if ( !cmp && rm->offset == offset && rm->size == size )
+        if ( !cmp )
         {
+            struct vpci_register *prev =
+                list_entry(rm->node.prev, struct vpci_register, node);
+
             list_del(&rm->node);
-            spin_unlock(&vpci->lock);
             xfree(rm);
-            return 0;
+            rm = prev;
+            rc = 0;
         }
-        if ( cmp <= 0 )
+
+        if ( cmp < 0 )
             break;
     }
     spin_unlock(&vpci->lock);
 
-    return -ENOENT;
+    return rc;
 }
 
 /* Wrappers for performing reads/writes to the underlying hardware. */
diff --git a/xen/include/xen/vpci.h b/xen/include/xen/vpci.h
index 5016ded64d89..ee9163ca6a56 100644
--- a/xen/include/xen/vpci.h
+++ b/xen/include/xen/vpci.h
@@ -67,8 +67,8 @@ static inline int __must_check vpci_add_register(struct vpci *vpci,
                                   size, data, 0, 0, 0, 0);
 }
 
-int __must_check vpci_remove_register(struct vpci *vpci, unsigned int offset,
-                                      unsigned int size);
+int vpci_remove_registers(struct vpci *vpci, unsigned int offset,
+                          unsigned int size);
 
 /* Generic read/write handlers for the PCI config space. */
 uint32_t vpci_read(pci_sbdf_t sbdf, unsigned int reg, unsigned int size);
-- 
2.34.1



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From: Jiqian Chen 
To: 
CC: Huang Rui , Jiqian Chen ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v2 2/8] vpci/header: Emulate legacy capability list for host
Date: Wed, 9 Apr 2025 14:45:22 +0800
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Current logic of init_header() only emulates legacy capability list
for guest, expand it to emulate for host too. So that it will be
easy to hide a capability whose initialization fails and no need
to distinguish host or guest.

Signed-off-by: Jiqian Chen 
---
cc: "Roger Pau Monné" 
---
v1->v2 changes:
new patch

Best regards,
Jiqian Chen.
---
 xen/drivers/vpci/header.c | 139 ++++++++++++++++++++------------------
 1 file changed, 74 insertions(+), 65 deletions(-)

diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c
index ef6c965c081c..0910eb940e23 100644
--- a/xen/drivers/vpci/header.c
+++ b/xen/drivers/vpci/header.c
@@ -745,6 +745,76 @@ static int bar_add_rangeset(const struct pci_dev *pdev, struct vpci_bar *bar,
     return !bar->mem ? -ENOMEM : 0;
 }
 
+/* These capabilities can be exposed to the guest, that vPCI can handle. */
+static const unsigned int guest_supported_caps[] = {
+    PCI_CAP_ID_MSI,
+    PCI_CAP_ID_MSIX,
+};
+
+static int vpci_init_capability_list(struct pci_dev *pdev)
+{
+    int rc;
+    bool mask_cap_list = false;
+    bool is_hwdom = is_hardware_domain(pdev->domain);
+    const unsigned int *caps = is_hwdom ? NULL : guest_supported_caps;
+    const unsigned int n = is_hwdom ? 0 : ARRAY_SIZE(guest_supported_caps);
+
+    if ( pci_conf_read16(pdev->sbdf, PCI_STATUS) & PCI_STATUS_CAP_LIST )
+    {
+        unsigned int next, ttl = 48;
+
+        next = pci_find_next_cap_ttl(pdev->sbdf, PCI_CAPABILITY_LIST,
+                                     caps, n, &ttl);
+
+        rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL,
+                               PCI_CAPABILITY_LIST, 1,
+                               (void *)(uintptr_t)next);
+        if ( rc )
+            return rc;
+
+        next &= ~3;
+
+        if ( !next && !is_hwdom )
+            /*
+             * If we don't have any supported capabilities to expose to the
+             * guest, mask the PCI_STATUS_CAP_LIST bit in the status register.
+             */
+            mask_cap_list = true;
+
+        while ( next && ttl )
+        {
+            unsigned int pos = next;
+
+            next = pci_find_next_cap_ttl(pdev->sbdf, pos + PCI_CAP_LIST_NEXT,
+                                         caps, n, &ttl);
+
+            rc = vpci_add_register(pdev->vpci, vpci_hw_read8, NULL,
+                                   pos + PCI_CAP_LIST_ID, 1, NULL);
+            if ( rc )
+                return rc;
+
+            rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL,
+                                   pos + PCI_CAP_LIST_NEXT, 1,
+                                   (void *)(uintptr_t)next);
+            if ( rc )
+                return rc;
+
+            next &= ~3;
+        }
+    }
+
+    /* Utilize rsvdp_mask to hide PCI_STATUS_CAP_LIST from the guest. */
+    rc = vpci_add_register_mask(pdev->vpci, vpci_hw_read16, vpci_hw_write16,
+                                PCI_STATUS, 2, NULL,
+                                PCI_STATUS_RO_MASK &
+                                    ~(mask_cap_list ? PCI_STATUS_CAP_LIST : 0),
+                                PCI_STATUS_RW1C_MASK,
+                                mask_cap_list ? PCI_STATUS_CAP_LIST : 0,
+                                PCI_STATUS_RSVDZ_MASK);
+
+    return rc;
+}
+
 static int cf_check init_header(struct pci_dev *pdev)
 {
     uint16_t cmd;
@@ -753,7 +823,6 @@ static int cf_check init_header(struct pci_dev *pdev)
     struct vpci_header *header = &pdev->vpci->header;
     struct vpci_bar *bars = header->bars;
     int rc;
-    bool mask_cap_list = false;
     bool is_hwdom = is_hardware_domain(pdev->domain);
 
     ASSERT(rw_is_write_locked(&pdev->domain->pci_lock));
@@ -794,61 +863,12 @@ static int cf_check init_header(struct pci_dev *pdev)
     if ( rc )
         return rc;
 
+    rc = vpci_init_capability_list(pdev);
+    if ( rc )
+        return rc;
+
     if ( !is_hwdom )
     {
-        if ( pci_conf_read16(pdev->sbdf, PCI_STATUS) & PCI_STATUS_CAP_LIST )
-        {
-            /* Only expose capabilities to the guest that vPCI can handle. */
-            unsigned int next, ttl = 48;
-            static const unsigned int supported_caps[] = {
-                PCI_CAP_ID_MSI,
-                PCI_CAP_ID_MSIX,
-            };
-
-            next = pci_find_next_cap_ttl(pdev->sbdf, PCI_CAPABILITY_LIST,
-                                         supported_caps,
-                                         ARRAY_SIZE(supported_caps), &ttl);
-
-            rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL,
-                                   PCI_CAPABILITY_LIST, 1,
-                                   (void *)(uintptr_t)next);
-            if ( rc )
-                return rc;
-
-            next &= ~3;
-
-            if ( !next )
-                /*
-                 * If we don't have any supported capabilities to expose to the
-                 * guest, mask the PCI_STATUS_CAP_LIST bit in the status
-                 * register.
-                 */
-                mask_cap_list = true;
-
-            while ( next && ttl )
-            {
-                unsigned int pos = next;
-
-                next = pci_find_next_cap_ttl(pdev->sbdf,
-                                             pos + PCI_CAP_LIST_NEXT,
-                                             supported_caps,
-                                             ARRAY_SIZE(supported_caps), &ttl);
-
-                rc = vpci_add_register(pdev->vpci, vpci_hw_read8, NULL,
-                                       pos + PCI_CAP_LIST_ID, 1, NULL);
-                if ( rc )
-                    return rc;
-
-                rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL,
-                                       pos + PCI_CAP_LIST_NEXT, 1,
-                                       (void *)(uintptr_t)next);
-                if ( rc )
-                    return rc;
-
-                next &= ~3;
-            }
-        }
-
         /* Extended capabilities read as zero, write ignore */
         rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL, 0x100, 4,
                                (void *)0);
@@ -856,17 +876,6 @@ static int cf_check init_header(struct pci_dev *pdev)
             return rc;
     }
 
-    /* Utilize rsvdp_mask to hide PCI_STATUS_CAP_LIST from the guest. */
-    rc = vpci_add_register_mask(pdev->vpci, vpci_hw_read16, vpci_hw_write16,
-                                PCI_STATUS, 2, NULL,
-                                PCI_STATUS_RO_MASK &
-                                    ~(mask_cap_list ? PCI_STATUS_CAP_LIST : 0),
-                                PCI_STATUS_RW1C_MASK,
-                                mask_cap_list ? PCI_STATUS_CAP_LIST : 0,
-                                PCI_STATUS_RSVDZ_MASK);
-    if ( rc )
-        return rc;
-
     if ( pdev->ignore_bars )
         return 0;
 
-- 
2.34.1



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From: Jiqian Chen 
To: 
CC: Huang Rui , Jiqian Chen ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v2 7/8] vpci/msi: Free MSI resources when init_msi() fails
Date: Wed, 9 Apr 2025 14:45:27 +0800
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When init_msi() fails, the previous new changes will hide MSI
capability, it can't rely on vpci_deassign_device() to remove
all MSI related resources anymore, those resources must be
cleaned up in failure path of init_msi.

To do that, add a new function to free MSI resources.

Signed-off-by: Jiqian Chen 
---
cc: "Roger Pau Monné" 
---
v1->v2 changes:
* Added a new function fini_msi to free all MSI resources instead of using an array to record registered registers.
---
 xen/drivers/vpci/msi.c | 47 +++++++++++++++++++++++++++++++++---------
 1 file changed, 37 insertions(+), 10 deletions(-)

diff --git a/xen/drivers/vpci/msi.c b/xen/drivers/vpci/msi.c
index ca89ae9b9c22..48a466dba0ef 100644
--- a/xen/drivers/vpci/msi.c
+++ b/xen/drivers/vpci/msi.c
@@ -193,6 +193,33 @@ static void cf_check mask_write(
     msi->mask = val;
 }
 
+/* 12 is size of MSI structure for 32-bit Message Address without PVM */
+#define MSI_STRUCTURE_SIZE_32 12
+
+static void fini_msi(struct pci_dev *pdev)
+{
+    unsigned int size = MSI_STRUCTURE_SIZE_32;
+
+    if ( !pdev->vpci->msi )
+        return;
+
+    if ( pdev->vpci->msi->address64 )
+        size += 4;
+    if ( pdev->vpci->msi->masking )
+        size += 4;
+
+    /*
+     * Remove all possible registered registers except capability ID
+     * register and next capability pointer register, which will be
+     * removed in mask function.
+     */
+    vpci_remove_registers(pdev->vpci,
+                          msi_control_reg(pdev->msi_pos),
+                          size - PCI_MSI_FLAGS);
+    xfree(pdev->vpci->msi);
+    pdev->vpci->msi = NULL;
+}
+
 static int cf_check init_msi(struct pci_dev *pdev)
 {
     unsigned int pos = pdev->msi_pos;
@@ -209,12 +236,7 @@ static int cf_check init_msi(struct pci_dev *pdev)
     ret = vpci_add_register(pdev->vpci, control_read, control_write,
                             msi_control_reg(pos), 2, pdev->vpci->msi);
     if ( ret )
-        /*
-         * NB: there's no need to free the msi struct or remove the register
-         * handlers form the config space, the caller will take care of the
-         * cleanup.
-         */
-        return ret;
+        goto fail;
 
     /* Get the maximum number of vectors the device supports. */
     control = pci_conf_read16(pdev->sbdf, msi_control_reg(pos));
@@ -237,20 +259,20 @@ static int cf_check init_msi(struct pci_dev *pdev)
     ret = vpci_add_register(pdev->vpci, address_read, address_write,
                             msi_lower_address_reg(pos), 4, pdev->vpci->msi);
     if ( ret )
-        return ret;
+        goto fail;
 
     ret = vpci_add_register(pdev->vpci, data_read, data_write,
                             msi_data_reg(pos, pdev->vpci->msi->address64), 2,
                             pdev->vpci->msi);
     if ( ret )
-        return ret;
+        goto fail;
 
     if ( pdev->vpci->msi->address64 )
     {
         ret = vpci_add_register(pdev->vpci, address_hi_read, address_hi_write,
                                 msi_upper_address_reg(pos), 4, pdev->vpci->msi);
         if ( ret )
-            return ret;
+            goto fail;
     }
 
     if ( pdev->vpci->msi->masking )
@@ -260,7 +282,7 @@ static int cf_check init_msi(struct pci_dev *pdev)
                                                   pdev->vpci->msi->address64),
                                 4, pdev->vpci->msi);
         if ( ret )
-            return ret;
+            goto fail;
         /*
          * FIXME: do not add any handler for the pending bits for the hardware
          * domain, which means direct access. This will be revisited when
@@ -269,6 +291,11 @@ static int cf_check init_msi(struct pci_dev *pdev)
     }
 
     return 0;
+
+ fail:
+    fini_msi(pdev);
+
+    return ret;
 }
 REGISTER_VPCI_LEGACY_CAP(PCI_CAP_ID_MSI, init_msi);
 
-- 
2.34.1



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From: Jiqian Chen 
To: 
CC: Huang Rui , Jiqian Chen ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v2 6/8] vpci/rebar: Remove registers when init_rebar() fails
Date: Wed, 9 Apr 2025 14:45:26 +0800
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When init_rebar() fails, the previous new changes will hide Rebar
capability, it can't rely on vpci_deassign_device() to remove all
Rebar related registers anymore, those registers must be removed
in failure path of init_rebar.

To do that, call vpci_remove_registers() to remove all possible
registered registers in the failure patch.

Signed-off-by: Jiqian Chen 
---
cc: "Roger Pau Monné" 
---
v1->v2 changes:
* Called vpci_remove_registers() to remove all possible registered registers instead of using a array to record all registered register.

Best regards,
Jiqian Chen.
---
 xen/drivers/vpci/rebar.c | 25 ++++++++++++++-----------
 1 file changed, 14 insertions(+), 11 deletions(-)

diff --git a/xen/drivers/vpci/rebar.c b/xen/drivers/vpci/rebar.c
index 79858e5dc92f..e030937956e3 100644
--- a/xen/drivers/vpci/rebar.c
+++ b/xen/drivers/vpci/rebar.c
@@ -51,6 +51,7 @@ static void cf_check rebar_ctrl_write(const struct pci_dev *pdev,
 
 static int cf_check init_rebar(struct pci_dev *pdev)
 {
+    int rc = 0;
     uint32_t ctrl;
     unsigned int nbars;
     unsigned int rebar_offset = pci_find_ext_capability(pdev->sbdf,
@@ -70,7 +71,6 @@ static int cf_check init_rebar(struct pci_dev *pdev)
     nbars = MASK_EXTR(ctrl, PCI_REBAR_CTRL_NBAR_MASK);
     for ( unsigned int i = 0; i < nbars; i++ )
     {
-        int rc;
         struct vpci_bar *bar;
         unsigned int index;
 
@@ -80,7 +80,7 @@ static int cf_check init_rebar(struct pci_dev *pdev)
         {
             printk(XENLOG_ERR "%pd %pp: too big BAR number %u in REBAR_CTRL\n",
                    pdev->domain, &pdev->sbdf, index);
-            continue;
+            goto fail;
         }
 
         bar = &pdev->vpci->header.bars[index];
@@ -88,7 +88,7 @@ static int cf_check init_rebar(struct pci_dev *pdev)
         {
             printk(XENLOG_ERR "%pd %pp: BAR%u is not in memory space\n",
                    pdev->domain, &pdev->sbdf, index);
-            continue;
+            goto fail;
         }
 
         rc = vpci_add_register(pdev->vpci, vpci_hw_read32, rebar_ctrl_write,
@@ -97,14 +97,7 @@ static int cf_check init_rebar(struct pci_dev *pdev)
         {
             printk(XENLOG_ERR "%pd %pp: BAR%u fail to add reg of REBAR_CTRL rc=%d\n",
                    pdev->domain, &pdev->sbdf, index, rc);
-            /*
-             * Ideally we would hide the ReBar capability on error, but code
-             * for doing so still needs to be written. Use continue instead
-             * to keep any already setup register hooks, as returning an
-             * error will cause the hardware domain to get unmediated access
-             * to all device registers.
-             */
-            continue;
+            goto fail;
         }
 
         bar->resizable_sizes =
@@ -117,6 +110,16 @@ static int cf_check init_rebar(struct pci_dev *pdev)
     }
 
     return 0;
+
+ fail:
+    /*
+     * Remove all possible registered registers except header.
+     * Header register will be removed in mask function.
+     */
+    vpci_remove_registers(pdev->vpci, rebar_offset + PCI_REBAR_CAP(0),
+                          PCI_REBAR_CTRL(nbars - 1));
+
+    return rc;
 }
 REGISTER_VPCI_EXTEND_CAP(PCI_EXT_CAP_ID_REBAR, init_rebar);
 
-- 
2.34.1



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On 08.04.2025 18:07, Alejandro Vallejo wrote:
> From: "Daniel P. Smith" 
> 
> Add a container for the "cooked" command line for a domain. This
> provides for the backing memory to be directly associated with the
> domain being constructed.  This is done in anticipation that the domain
> construction path may need to be invoked multiple times, thus ensuring
> each instance had a distinct memory allocation.
> 
> Signed-off-by: Daniel P. Smith 
> Signed-off-by: Jason Andryuk 
> Signed-off-by: Alejandro Vallejo 
> ---
> No changes on ACPI cmdline handling on PVH, as it's orthogonal to the
> purpose of this patch.
> 
> v3:
>   * s/xfree/XFREE/ on failed construct_dom0() to avoid a dangling
> cmdline ptr.
>   * Re-flow hvm_copy_to_guest_phys() into a multi-line call.
>   * s/bd->cmdline != NULL/b->cmdline/ (to homogenise with the previous
>     cmdline pointer check)
> ---
>  xen/arch/x86/hvm/dom0_build.c          | 12 +++----
>  xen/arch/x86/include/asm/boot-domain.h |  1 +
>  xen/arch/x86/pv/dom0_build.c           |  4 +--
>  xen/arch/x86/setup.c                   | 50 +++++++++++++++++++-------
>  4 files changed, 47 insertions(+), 20 deletions(-)
> 
> diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build.c
> index 2a094b3145..ebad5a49b8 100644
> --- a/xen/arch/x86/hvm/dom0_build.c
> +++ b/xen/arch/x86/hvm/dom0_build.c
> @@ -653,7 +653,6 @@ static int __init pvh_load_kernel(
>      void *image_start = image_base + image->headroom;
>      unsigned long image_len = image->size;
>      unsigned long initrd_len = initrd ? initrd->size : 0;
> -    const char *cmdline = image->cmdline_pa ? __va(image->cmdline_pa) : NULL;
>      const char *initrd_cmdline = NULL;
>      struct elf_binary elf;
>      struct elf_dom_parms parms;
> @@ -736,8 +735,8 @@ static int __init pvh_load_kernel(
>              initrd = NULL;
>      }
>  
> -    if ( cmdline )
> -        extra_space += elf_round_up(&elf, strlen(cmdline) + 1);
> +    if ( bd->cmdline )
> +        extra_space += elf_round_up(&elf, strlen(bd->cmdline) + 1);
>  
>      last_addr = find_memory(d, &elf, extra_space);
>      if ( last_addr == INVALID_PADDR )
> @@ -778,9 +777,10 @@ static int __init pvh_load_kernel(
>      /* Free temporary buffers. */
>      free_boot_modules();
>  
> -    if ( cmdline != NULL )
> +    if ( bd->cmdline )
>      {
> -        rc = hvm_copy_to_guest_phys(last_addr, cmdline, strlen(cmdline) + 1, v);
> +        rc = hvm_copy_to_guest_phys(last_addr, bd->cmdline,
> +                                    strlen(bd->cmdline) + 1, v);
>          if ( rc )
>          {
>              printk("Unable to copy guest command line\n");
> @@ -791,7 +791,7 @@ static int __init pvh_load_kernel(
>           * Round up to 32/64 bits (depending on the guest kernel bitness) so
>           * the modlist/start_info is aligned.
>           */
> -        last_addr += elf_round_up(&elf, strlen(cmdline) + 1);
> +        last_addr += elf_round_up(&elf, strlen(bd->cmdline) + 1);
>      }
>      if ( initrd != NULL )
>      {

Perhaps better introduce a local variable cmdline_len? That would allow the first
if() to go away (but of course not its body).

> --- a/xen/arch/x86/setup.c
> +++ b/xen/arch/x86/setup.c
> @@ -978,10 +978,30 @@ static unsigned int __init copy_bios_e820(struct e820entry *map, unsigned int li
>      return n;
>  }
>  
> -static struct domain *__init create_dom0(struct boot_info *bi)
> +static size_t __init domain_cmdline_size(
> +    struct boot_info *bi, struct boot_domain *bd)

const for both? And perhaps s/domain/dom0/ in the function name?

>  {
> -    static char __initdata cmdline[MAX_GUEST_CMDLINE];
> +    size_t s = bi->kextra ? strlen(bi->kextra) : 0;
> +
> +    s += bd->kernel->cmdline_pa ? strlen(__va(bd->kernel->cmdline_pa)) : 0;
>  
> +    if ( s == 0 )
> +        return s;

While this retains prior behavior, that prior behavior was certainly odd (and
pretty likely not meant to be like that).

> @@ -1043,17 +1067,19 @@ static struct domain *__init create_dom0(struct boot_info *bi)
>  
>          if ( (strlen(acpi_param) != 0) && !strstr(cmdline, "acpi=") )
>          {
> -            safe_strcat(cmdline, " acpi=");
> -            safe_strcat(cmdline, acpi_param);
> +            strlcat(cmdline, " acpi=", cmdline_size);
> +            strlcat(cmdline, acpi_param, cmdline_size);
>          }
> -
> -        bd->kernel->cmdline_pa = __pa(cmdline);
> +        bd->kernel->cmdline_pa = 0;
> +        bd->cmdline = cmdline;
>      }
>  
>      bd->d = d;
>      if ( construct_dom0(bd) != 0 )
>          panic("Could not construct domain 0\n");
>  
> +    XFREE(cmdline);

While this tidies the local variable, what about bd->cmdline? As it stands this
gives the impression that you're freeing a pointer here which may still be used
through passing bd elsewhere.

Jan


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Date: Wed, 9 Apr 2025 08:58:06 +0200
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Subject: Re: [PATCH v2 2/7] xen/domain: introduce domid_alloc()
To: Denis Mukhin 
Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org,
 michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org,
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References: <20250331230508.440198-1-dmukhin@ford.com>
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On 09.04.2025 03:44, Denis Mukhin wrote:
> On Tuesday, April 8th, 2025 at 7:26 AM, Jan Beulich  wrote:
>> On 01.04.2025 01:05, dmkhn@proton.me wrote:
>>
>>> From: Denis Mukhin dmukhin@ford.com
>>>
>>> Move domain ID allocation during domain creation to a dedicated
>>> function domid_alloc().
>>>
>>> Allocation algorithm:
>>> - If an explicit domain ID is provided, verify its availability and
>>> use it if ID is unused;
>>> - Otherwise, perform an exhaustive search for the first available ID
>>> within the [0..DOMID_FIRST_RESERVED) range, excluding hardware_domid.
>>>
>>> This minimizes the use of max_init_domid in the code and, thus, is a
>>> prerequisite change for enabling console input rotation across domains
>>> with console input permission on x86 platforms (which currently is
>>> limited to dom0, PV shim and Xen).
>>
>>
>> By removing the updating of max_init_domid you do - afaict - break the
>> remaining use site(s) of the variable.
> 
> Unfortunately, this patch should go together with the next patch in
> this series:
>   xen/domain: introduce domid_top()
> 
> I mentioned dependency in the cover letter.

No, that would still break bisectability. Also such dependencies would
better be mentioned in both the cover letter and the patch(es).

Going back to the cover letter, all I find is "Patch 3 depends on patch
2." That's the natural thing in a series.

Jan


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On 07.04.2025 11:10, Teddy Astie wrote:
> AMD Translation Cache Extension is a flag that can be enabled in the EFER MSR to optimize
> some TLB flushes. Expose this flag to guest if supported by hardware. This flag can be
> used by Linux since version 6.14.
> 
> Only expose this feature to HAP-enabled guests. Guests with shadow paging guests have

Nit: double "guests".

> their TLB flush operations intercepted and handled separately, without taking account
> to this flag. PV guest follows Xen TLB flush behavior.

Commit messages want to have their lines limited to like 75 chars, to cover
for e.g. "git log" behavior combined with the general 80 chars line length
limit.

> --- a/CHANGELOG.md
> +++ b/CHANGELOG.md
> @@ -18,6 +18,7 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/)
>     - Support PCI passthrough for HVM domUs when dom0 is PVH (note SR-IOV
>       capability usage is not yet supported on PVH dom0).
>     - Smoke tests for the FreeBSD Xen builds in Cirrus CI.
> +   - Guest support for AMD Translation Cache Extension feature.

This may want to say HVM or even HAP.

> --- a/xen/arch/x86/pv/emul-priv-op.c
> +++ b/xen/arch/x86/pv/emul-priv-op.c
> @@ -857,8 +857,8 @@ static uint64_t guest_efer(const struct domain *d)
>  {
>      uint64_t val;
>  
> -    /* Hide unknown bits, and unconditionally hide SVME and AIBRSE from guests. */
> -    val = read_efer() & EFER_KNOWN_MASK & ~(EFER_SVME | EFER_AIBRSE);
> +    /* Hide unknown bits, and unconditionally hide SVME, TCE and AIBRSE from guests. */
> +    val = read_efer() & EFER_KNOWN_MASK & ~(EFER_SVME | EFER_TCE | EFER_AIBRSE);

Nit: Please respect line length limits when extending lines.

Jan


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On 07.04.2025 11:10, Teddy Astie wrote:
> Aside exposing this flag to guests, Xen can also make use of it to reduce the cost of
> some TLB flushes. Enable this flag if supported by hardware.

As said before: This needs to come with (perhaps a lot of) justification as
to it being safe for Xen to use without any adjustments anywhere else. This
exercise may not be left to the reviewer(s).

Jan


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From: Luca Fancellu 
To: Ayan Kumar Halder 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Michal Orzel ,
	Volodymyr Babchuk 
Subject: Re: [PATCH v2 2/7] arm/mpu: Provide access to the MPU region from the
 C code
Thread-Topic: [PATCH v2 2/7] arm/mpu: Provide access to the MPU region from
 the C code
Thread-Index:
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Date: Wed, 9 Apr 2025 07:54:11 +0000
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Subject: Re: [PATCH v4 1/6] x86: suppress ERMS for internal use when
 MISC_ENABLE.FAST_STRING is clear
From: Jan Beulich 
To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
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On 08.01.2025 11:11, Jan Beulich wrote:
> --- a/xen/arch/x86/cpu-policy.c
> +++ b/xen/arch/x86/cpu-policy.c
> @@ -487,6 +487,12 @@ static void __init guest_common_max_feat
>       */
>      if ( test_bit(X86_FEATURE_RTM, fs) )
>          __set_bit(X86_FEATURE_RTM_ALWAYS_ABORT, fs);
> +
> +    /*
> +     * We expose MISC_ENABLE to guests, so our internal clearing of ERMS when
> +     * FAST_STRING is not set should not affect the view of migrating-in guests.
> +     */
> +    __set_bit(X86_FEATURE_ERMS, fs);
>  }
>  
>  static void __init guest_common_default_feature_adjustments(uint32_t *fs)
> @@ -591,6 +597,15 @@ static void __init guest_common_feature_
>       */
>      if ( host_cpu_policy.feat.ibrsb )
>          __set_bit(X86_FEATURE_IBPB, fs);
> +
> +    /*
> +     * We expose MISC_ENABLE to guests, so our internal clearing of ERMS when
> +     * FAST_STRING is not set should not propagate to guest view.  Guests can
> +     * judge on their own whether to ignore the CPUID bit when the MSR bit is
> +     * clear.
> +     */
> +    if ( raw_cpu_policy.feat.erms )
> +        __set_bit(X86_FEATURE_ERMS, fs);
>  }
>  
>  static void __init calculate_pv_max_policy(void)

While doing unrelated work in this area I noticed that this hunk is wrong,
and wants to be

@@ -567,6 +573,16 @@ static void __init guest_common_default_
         __clear_bit(X86_FEATURE_RTM, fs);
         __set_bit(X86_FEATURE_RTM_ALWAYS_ABORT, fs);
     }
+
+    /*
+     * We expose MISC_ENABLE to guests, so our internal clearing of ERMS when
+     * FAST_STRING is not set should not propagate to guest view.  Guests can
+     * judge on their own whether to ignore the CPUID bit when the MSR bit is
+     * clear.  The bit being uniformly set in the max policies, we only need
+     * to clear it here (if hardware doesn't have it).
+     */
+    if ( !raw_cpu_policy.feat.erms )
+        __clear_bit(X86_FEATURE_ERMS, fs);
 }
 
 static void __init guest_common_feature_adjustments(uint32_t *fs)

instead. Fixed locally.

Jan


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From: Jan Beulich 
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 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 09.04.2025 09:11, Jan Beulich wrote:
> On 07.04.2025 11:10, Teddy Astie wrote:
>> Aside exposing this flag to guests, Xen can also make use of it to reduce the cost of
>> some TLB flushes. Enable this flag if supported by hardware.
> 
> As said before: This needs to come with (perhaps a lot of) justification as
> to it being safe for Xen to use without any adjustments anywhere else. This
> exercise may not be left to the reviewer(s).

One case to consider in particular is a shadow guest (EFER.TCE clear as per
patch 1) running with host EFER.TCE set. The TLB flushes we do may then simply
be insufficient for the guest's expectations.

Jan


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From: Luca Fancellu 
To: Ayan Kumar Halder 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Michal Orzel ,
	Volodymyr Babchuk 
Subject: Re: [PATCH v2 2/7] arm/mpu: Provide access to the MPU region from the
 C code
Thread-Topic: [PATCH v2 2/7] arm/mpu: Provide access to the MPU region from
 the C code
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Date: Wed, 9 Apr 2025 08:26:32 +0000
Message-ID: 
References: <20250407091430.2342709-1-luca.fancellu@arm.com>
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X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Apr 2025 08:27:04.4261
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Subject: Re: [PATCH v3.1 1/2] x86/amd: Add guest support for AMD TCE
To: Teddy Astie 
Cc: Oleksii Kurochko ,
 Community Manager ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 xen-devel@lists.xenproject.org
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On 07.04.2025 11:10, Teddy Astie wrote:
> --- a/xen/include/public/arch-x86/cpufeatureset.h
> +++ b/xen/include/public/arch-x86/cpufeatureset.h
> @@ -170,6 +170,7 @@ XEN_CPUFEATURE(SKINIT,        3*32+12) /*   SKINIT/STGI instructions */
>  XEN_CPUFEATURE(WDT,           3*32+13) /*   Watchdog timer */
>  XEN_CPUFEATURE(LWP,           3*32+15) /*   Light Weight Profiling */
>  XEN_CPUFEATURE(FMA4,          3*32+16) /*A  4 operands MAC instructions */
> +XEN_CPUFEATURE(TCE,           3*32+17) /*H  Translation Cache Extension support */

I consider this too limiting; this is a performance hint only, after all,
not affecting correctness when ignored if set. A shadow guest is fine to
enable TCE if it sees fit. It'll benefit if later migrated to a HAP-
capable host.

Further a HAP guest is also fine to set this bit even on a TCE-incapable
host. It'll benefit when migrated to a TCE-capable one. What we'd need to
ensure is that on TCE-incapable hosts only the guest view of EFER has the
bit set, while what's in the VMCB for hardware to use hasn't. (Arguably
support for this can come later, but the shortcoming would want pointing
out imo.)

Jan


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From: Frediano Ziglio 
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Subject: Re: [PATCH v7] Avoid crash calling PrintErrMesg from efi_multiboot2
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" , 
	=?UTF-8?Q?Marek_Marczykowski=2DG=C3=B3recki?= , 
	Jan Beulich , Andrew Cooper 
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ping

On Fri, Mar 21, 2025 at 10:33=E2=80=AFAM Frediano Ziglio
 wrote:
>
> Although code is compiled with -fpic option data is not position
> independent. This causes data pointer to become invalid if
> code is not relocated properly which is what happens for
> efi_multiboot2 which is called by multiboot entry code.
>
> Code tested adding
>    PrintErrMesg(L"Test message", EFI_BUFFER_TOO_SMALL);
> in efi_multiboot2 before calling efi_arch_edd (this function
> can potentially call PrintErrMesg).
>
> Before the patch (XenServer installation on Qemu, xen replaced
> with vanilla xen.gz):
>   Booting `XenServer (Serial)'Booting `XenServer (Serial)'
>   Test message: !!!! X64 Exception Type - 0E(#PF - Page-Fault)  CPU Apic =
ID - 00000000 !!!!
>   ExceptionData - 0000000000000000  I:0 R:0 U:0 W:0 P:0 PK:0 SS:0 SGX:0
>   RIP  - 000000007EE21E9A, CS  - 0000000000000038, RFLAGS - 0000000000210=
246
>   RAX  - 000000007FF0C1B5, RCX - 0000000000000050, RDX - 0000000000000010
>   RBX  - 0000000000000000, RSP - 000000007FF0C180, RBP - 000000007FF0C210
>   RSI  - FFFF82D040467CE8, RDI - 0000000000000000
>   R8   - 000000007FF0C1C8, R9  - 000000007FF0C1C0, R10 - 0000000000000000
>   R11  - 0000000000001020, R12 - FFFF82D040467CE8, R13 - 000000007FF0C1B8
>   R14  - 000000007EA33328, R15 - 000000007EA332D8
>   DS   - 0000000000000030, ES  - 0000000000000030, FS  - 0000000000000030
>   GS   - 0000000000000030, SS  - 0000000000000030
>   CR0  - 0000000080010033, CR2 - FFFF82D040467CE8, CR3 - 000000007FC01000
>   CR4  - 0000000000000668, CR8 - 0000000000000000
>   DR0  - 0000000000000000, DR1 - 0000000000000000, DR2 - 0000000000000000
>   DR3  - 0000000000000000, DR6 - 00000000FFFF0FF0, DR7 - 0000000000000400
>   GDTR - 000000007F9DB000 0000000000000047, LDTR - 0000000000000000
>   IDTR - 000000007F48E018 0000000000000FFF,   TR - 0000000000000000
>   FXSAVE_STATE - 000000007FF0BDE0
>   !!!! Find image based on IP(0x7EE21E9A) (No PDB)  (ImageBase=3D00000000=
7EE20000, EntryPoint=3D000000007EE23935) !!!!
>
> After the patch:
>   Booting `XenServer (Serial)'Booting `XenServer (Serial)'
>   Test message: Buffer too small
>   BdsDxe: loading Boot0000 "UiApp" from Fv(7CB8BDC9-F8EB-4F34-AAEA-3EE4AF=
6516A1)/FvFile(462CAA21-7614-4503-836E-8AB6F4662331)
>   BdsDxe: starting Boot0000 "UiApp" from Fv(7CB8BDC9-F8EB-4F34-AAEA-3EE4A=
F6516A1)/FvFile(462CAA21-7614-4503-836E-8AB6F4662331)
>
> This partially rollback commit 00d5d5ce23e6.
>
> Fixes: 9180f5365524 ("x86: add multiboot2 protocol support for EFI platfo=
rms")
> Signed-off-by: Frediano Ziglio 
> ---
> Changes since v1:
> - added "Fixes:" tag;
> - fixed cast style change.
>
> Changes since v2:
> - wrap long line.
>
> Changes since v3:
> - fixed "Fixes:" tag.
>
> Changes since v4:
> - use switch instead of tables.
>
> Changes since v5:
> - added -fno-jump-tables option.
>
> Changes since v6:
> - rebased.
> ---
>  xen/common/efi/boot.c        | 58 ++++++++++++++++++++++++------------
>  xen/common/efi/efi-common.mk |  1 +
>  2 files changed, 40 insertions(+), 19 deletions(-)
>
> diff --git a/xen/common/efi/boot.c b/xen/common/efi/boot.c
> index efbec00af9..143b5681ba 100644
> --- a/xen/common/efi/boot.c
> +++ b/xen/common/efi/boot.c
> @@ -287,33 +287,53 @@ static bool __init match_guid(const EFI_GUID *guid1=
, const EFI_GUID *guid2)
>  /* generic routine for printing error messages */
>  static void __init PrintErrMesg(const CHAR16 *mesg, EFI_STATUS ErrCode)
>  {
> -    static const CHAR16* const ErrCodeToStr[] __initconstrel =3D {
> -        [~EFI_ERROR_MASK & EFI_NOT_FOUND]           =3D L"Not found",
> -        [~EFI_ERROR_MASK & EFI_NO_MEDIA]            =3D L"The device has=
 no media",
> -        [~EFI_ERROR_MASK & EFI_MEDIA_CHANGED]       =3D L"Media changed"=
,
> -        [~EFI_ERROR_MASK & EFI_DEVICE_ERROR]        =3D L"Device error",
> -        [~EFI_ERROR_MASK & EFI_VOLUME_CORRUPTED]    =3D L"Volume corrupt=
ed",
> -        [~EFI_ERROR_MASK & EFI_ACCESS_DENIED]       =3D L"Access denied"=
,
> -        [~EFI_ERROR_MASK & EFI_OUT_OF_RESOURCES]    =3D L"Out of resourc=
es",
> -        [~EFI_ERROR_MASK & EFI_VOLUME_FULL]         =3D L"Volume is full=
",
> -        [~EFI_ERROR_MASK & EFI_SECURITY_VIOLATION]  =3D L"Security viola=
tion",
> -        [~EFI_ERROR_MASK & EFI_CRC_ERROR]           =3D L"CRC error",
> -        [~EFI_ERROR_MASK & EFI_COMPROMISED_DATA]    =3D L"Compromised da=
ta",
> -        [~EFI_ERROR_MASK & EFI_BUFFER_TOO_SMALL]    =3D L"Buffer too sma=
ll",
> -    };
> -    EFI_STATUS ErrIdx =3D ErrCode & ~EFI_ERROR_MASK;
> -
>      StdOut =3D StdErr;
>      PrintErr(mesg);
>      PrintErr(L": ");
>
> -    if( (ErrIdx < ARRAY_SIZE(ErrCodeToStr)) && ErrCodeToStr[ErrIdx] )
> -        mesg =3D ErrCodeToStr[ErrIdx];
> -    else
> +    switch (ErrCode)
>      {
> +    case EFI_NOT_FOUND:
> +        mesg =3D L"Not found";
> +        break;
> +    case EFI_NO_MEDIA:
> +        mesg =3D L"The device has no media";
> +        break;
> +    case EFI_MEDIA_CHANGED:
> +        mesg =3D L"Media changed";
> +        break;
> +    case EFI_DEVICE_ERROR:
> +        mesg =3D L"Device error";
> +        break;
> +    case EFI_VOLUME_CORRUPTED:
> +        mesg =3D L"Volume corrupted";
> +        break;
> +    case EFI_ACCESS_DENIED:
> +        mesg =3D L"Access denied";
> +        break;
> +    case EFI_OUT_OF_RESOURCES:
> +        mesg =3D L"Out of resources";
> +        break;
> +    case EFI_VOLUME_FULL:
> +        mesg =3D L"Volume is full";
> +        break;
> +    case EFI_SECURITY_VIOLATION:
> +        mesg =3D L"Security violation";
> +        break;
> +    case EFI_CRC_ERROR:
> +        mesg =3D L"CRC error";
> +        break;
> +    case EFI_COMPROMISED_DATA:
> +        mesg =3D L"Compromised data";
> +        break;
> +    case EFI_BUFFER_TOO_SMALL:
> +        mesg =3D L"Buffer too small";
> +        break;
> +    default:
>          PrintErr(L"ErrCode: ");
>          DisplayUint(ErrCode, 0);
>          mesg =3D NULL;
> +        break;
>      }
>      blexit(mesg);
>  }
> diff --git a/xen/common/efi/efi-common.mk b/xen/common/efi/efi-common.mk
> index 23cafcf20c..06b1c19674 100644
> --- a/xen/common/efi/efi-common.mk
> +++ b/xen/common/efi/efi-common.mk
> @@ -2,6 +2,7 @@ EFIOBJ-y :=3D boot.init.o pe.init.o ebmalloc.o runtime.o
>  EFIOBJ-$(CONFIG_COMPAT) +=3D compat.o
>
>  CFLAGS-y +=3D -fshort-wchar
> +CFLAGS-y +=3D -fno-jump-tables
>  CFLAGS-y +=3D -iquote $(srctree)/common/efi
>  CFLAGS-y +=3D -iquote $(srcdir)
>
> --
> 2.43.0
>


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Date: Wed, 9 Apr 2025 11:06:30 +0200
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Subject: Re: [PATCH v2] xen/riscv: Increase XEN_VIRT_SIZE
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <808d1b346bc90dde38fd19a6b92ab78d78e42936.1743766932.git.oleksii.kurochko@gmail.com>
 
 
 <8b2e50f2-1f89-41df-be88-afc9ef24b51a@suse.com>
 
 
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From: Oleksii Kurochko 
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On 4/8/25 4:04 PM, Jan Beulich wrote:
> On 08.04.2025 15:46, Oleksii Kurochko wrote:
>> On 4/8/25 2:02 PM, Jan Beulich wrote:
>>> On 08.04.2025 13:51, Oleksii Kurochko wrote:
>>>> On 4/7/25 12:09 PM, Jan Beulich wrote:
>>>>> On 04.04.2025 18:04, Oleksii Kurochko wrote:
>>>>>> --- a/xen/arch/riscv/include/asm/mm.h
>>>>>> +++ b/xen/arch/riscv/include/asm/mm.h
>>>>>> @@ -43,13 +43,19 @@ static inline void *maddr_to_virt(paddr_t ma)
>>>>>>      */
>>>>>>     static inline unsigned long virt_to_maddr(unsigned long va)
>>>>>>     {
>>>>>> +    const unsigned int vpn1_shift = PAGETABLE_ORDER + PAGE_SHIFT;
>>>>>> +    const unsigned long va_vpn = va >> vpn1_shift;
>>>>>> +    const unsigned long xen_virt_start_vpn =
>>>>>> +        _AC(XEN_VIRT_START, UL) >> vpn1_shift;
>>>>>> +    const unsigned long xen_virt_end_vpn =
>>>>>> +        xen_virt_start_vpn + ((XEN_VIRT_SIZE >> vpn1_shift) - 1);
>>>>>> +
>>>>>>         if ((va >= DIRECTMAP_VIRT_START) &&
>>>>>>             (va <= DIRECTMAP_VIRT_END))
>>>>>>             return directmapoff_to_maddr(va - directmap_virt_start);
>>>>>>     
>>>>>> -    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(2));
>>>>>> -    ASSERT((va >> (PAGETABLE_ORDER + PAGE_SHIFT)) ==
>>>>>> -           (_AC(XEN_VIRT_START, UL) >> (PAGETABLE_ORDER + PAGE_SHIFT)));
>>>>>> +    BUILD_BUG_ON(XEN_VIRT_SIZE > GB(1));
>>>>>> +    ASSERT((va_vpn >= xen_virt_start_vpn) && (va_vpn <= xen_virt_end_vpn));
>>>>> Not all of the range is backed by memory, and for the excess space the
>>>>> translation is therefore (likely) wrong. Which better would be caught by
>>>>> the assertion?
>>>> Backed here means that the memory is actually mapped?
>>>>
>>>> IIUC it is needed to check only for the range [XEN_VIRT_START, XEN_VIRT_START+xen_phys_size]
>>>> where xen_phys_size=(unsigned long)_end - (unsigned long)_start.
>>>>
>>>> Did I understand you correctly?
>>> I think so, yes. Depending on what you (intend to) do to .init.* at the
>>> end of boot, that range may later also want excluding.
>> I planned to release everything between __init_begin and __init_end in the following way:
>>     destroy_xen_mappings((unsigned long)__init_begin, (unsigned long)__init_end);
>>
>> So yes, then I think I have to come up with new ASSERT, add is_init_memory_freed variable and
>> if is_init_memory_freed=true then also check that `va` isn't from .init.* range.
>>
>> But I'm not quire sure that mapping for .got* should be destroyed after the end of boot. (now it is
>> part of [__init_begin,__init_end] range.
> Isn't this a non-issue considering
>
> ASSERT(!SIZEOF(.got),      ".got non-empty")
> ASSERT(!SIZEOF(.got.plt),  ".got.plt non-empty")
>
> near the bottom of xen.lds.S?

I forgot about that|ASSERT()|, so it's expected that|.got*| isn't used in Xen anyway.
Therefore, it shouldn't be an issue to destroy the mapping for the|[__init_begin, __init_end]| range.

>
>>>>>> --- a/xen/arch/riscv/mm.c
>>>>>> +++ b/xen/arch/riscv/mm.c
>>>>>> @@ -31,20 +31,27 @@ unsigned long __ro_after_init phys_offset; /* = load_start - XEN_VIRT_START */
>>>>>>     #define LOAD_TO_LINK(addr) ((unsigned long)(addr) - phys_offset)
>>>>>>     
>>>>>>     /*
>>>>>> - * It is expected that Xen won't be more then 2 MB.
>>>>>> + * It is expected that Xen won't be more then XEN_VIRT_SIZE MB.
>>>>>>      * The check in xen.lds.S guarantees that.
>>>>>> - * At least 3 page tables (in case of Sv39 ) are needed to cover 2 MB.
>>>>>> - * One for each page level table with PAGE_SIZE = 4 Kb.
>>>>>>      *
>>>>>> - * One L0 page table can cover 2 MB(512 entries of one page table * PAGE_SIZE).
>>>>>> + * Root page table is shared with the initial mapping and is declared
>>>>>> + * separetely. (look at stage1_pgtbl_root)
>>>>>>      *
>>>>>> - * It might be needed one more page table in case when Xen load address
>>>>>> - * isn't 2 MB aligned.
>>>>>> + * An amount of page tables between root page table and L0 page table
>>>>>> + * (in the case of Sv39 it covers L1 table):
>>>>>> + *   (CONFIG_PAGING_LEVELS - 2) are needed for an identity mapping and
>>>>>> + *   the same amount are needed for Xen.
>>>>>>      *
>>>>>> - * CONFIG_PAGING_LEVELS page tables are needed for the identity mapping,
>>>>>> - * except that the root page table is shared with the initial mapping
>>>>>> + * An amount of L0 page tables:
>>>>>> + *   (512 entries of one L0 page table covers 2MB == 1<>>>>> + *   XEN_VIRT_SIZE >> XEN_PT_LEVEL_SHIFT(1) are needed for Xen and
>>>>>> + *   one L0 is needed for indenity mapping.
>>>>>> + *
>>>>>> + *   It might be needed one more page table in case when Xen load
>>>>>> + *   address isn't 2 MB aligned.
>>>>> Shouldn't we guarantee that?
>>>> I think it's sufficient to guarantee 4KB alignment.
>>>>
>>>> The only real benefit I see in enforcing larger alignment is that it likely enables
>>>> the use of superpages for mapping, which would reduce TLB pressure.
>>>> But perhaps I'm missing something?
>>> No, it's indeed mainly that.
>> But then the linker address and the load address should both be aligned to a 2MB or 1GB boundary.
>> This likely isn't an issue at all, but could it be a problem if we require 1GB alignment for the
>> load address? In that case, might it be difficult for the platform to find a suitable place in
>> memory to load Xen for some reason? (I don't think so but maybe I'm missing something)
> Why would load address need to be 1Gb aligned? That (as well as 2Mb-)alignment
> matters only once you set up paging?

Mostly yes, it matters only once during paging set up.

I was thinking that if, one day, 2MB (or larger) alignment is used and the load address isn't
properly aligned, some space in a page might be lost.
(The word "should" above wasn't entirely accurate.)

But this likely isn't a big deal and can be safely ignored.

~ Oleksii


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On 4/8/25 4:04 PM, Jan Beulich wrote:

    

    

      
On 08.04.2025 15:46, Oleksii Kurochko wrote:


      

        
On 4/8/25 2:02 PM, Jan Beulich wrote:


        

          
On 08.04.2025 13:51, Oleksii Kurochko wrote:


          

            
On 4/7/25 12:09 PM, Jan Beulich wrote:


            

              
On 04.04.2025 18:04, Oleksii Kurochko wrote:


              

                
--- a/xen/arch/riscv/include/asm/mm.h
+++ b/xen/arch/riscv/include/asm/mm.h
@@ -43,13 +43,19 @@ static inline void *maddr_to_virt(paddr_t ma)
    */
   static inline unsigned long virt_to_maddr(unsigned long va)
   {
+    const unsigned int vpn1_shift = PAGETABLE_ORDER + PAGE_SHIFT;
+    const unsigned long va_vpn = va >> vpn1_shift;
+    const unsigned long xen_virt_start_vpn =
+        _AC(XEN_VIRT_START, UL) >> vpn1_shift;
+    const unsigned long xen_virt_end_vpn =
+        xen_virt_start_vpn + ((XEN_VIRT_SIZE >> vpn1_shift) - 1);
+
       if ((va >= DIRECTMAP_VIRT_START) &&
           (va <= DIRECTMAP_VIRT_END))
           return directmapoff_to_maddr(va - directmap_virt_start);
   
-    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(2));
-    ASSERT((va >> (PAGETABLE_ORDER + PAGE_SHIFT)) ==
-           (_AC(XEN_VIRT_START, UL) >> (PAGETABLE_ORDER + PAGE_SHIFT)));
+    BUILD_BUG_ON(XEN_VIRT_SIZE > GB(1));
+    ASSERT((va_vpn >= xen_virt_start_vpn) && (va_vpn <= xen_virt_end_vpn));


              

              
Not all of the range is backed by memory, and for the excess space the
translation is therefore (likely) wrong. Which better would be caught by
the assertion?


            

            
Backed here means that the memory is actually mapped?

IIUC it is needed to check only for the range [XEN_VIRT_START, XEN_VIRT_START+xen_phys_size]
where xen_phys_size=(unsigned long)_end - (unsigned long)_start.

Did I understand you correctly?


          

          
I think so, yes. Depending on what you (intend to) do to .init.* at the
end of boot, that range may later also want excluding.


        

        
I planned to release everything between __init_begin and __init_end in the following way:
   destroy_xen_mappings((unsigned long)__init_begin, (unsigned long)__init_end);

So yes, then I think I have to come up with new ASSERT, add is_init_memory_freed variable and
if is_init_memory_freed=true then also check that `va` isn't from .init.* range.

But I'm not quire sure that mapping for .got* should be destroyed after the end of boot. (now it is
part of [__init_begin,__init_end] range.


      

      
Isn't this a non-issue considering

ASSERT(!SIZEOF(.got),      ".got non-empty")
ASSERT(!SIZEOF(.got.plt),  ".got.plt non-empty")

near the bottom of xen.lds.S?

    

    
I forgot about that ASSERT(), so it's expected that .got* isn't used in Xen anyway.
Therefore, it shouldn't be an issue to destroy the mapping for the [__init_begin, __init_end] range.


    

      



      

        

          

            

              

                
--- a/xen/arch/riscv/mm.c
+++ b/xen/arch/riscv/mm.c
@@ -31,20 +31,27 @@ unsigned long __ro_after_init phys_offset; /* = load_start - XEN_VIRT_START */
   #define LOAD_TO_LINK(addr) ((unsigned long)(addr) - phys_offset)
   
   /*
- * It is expected that Xen won't be more then 2 MB.
+ * It is expected that Xen won't be more then XEN_VIRT_SIZE MB.
    * The check in xen.lds.S guarantees that.
- * At least 3 page tables (in case of Sv39 ) are needed to cover 2 MB.
- * One for each page level table with PAGE_SIZE = 4 Kb.
    *
- * One L0 page table can cover 2 MB(512 entries of one page table * PAGE_SIZE).
+ * Root page table is shared with the initial mapping and is declared
+ * separetely. (look at stage1_pgtbl_root)
    *
- * It might be needed one more page table in case when Xen load address
- * isn't 2 MB aligned.
+ * An amount of page tables between root page table and L0 page table
+ * (in the case of Sv39 it covers L1 table):
+ *   (CONFIG_PAGING_LEVELS - 2) are needed for an identity mapping and
+ *   the same amount are needed for Xen.
    *
- * CONFIG_PAGING_LEVELS page tables are needed for the identity mapping,
- * except that the root page table is shared with the initial mapping
+ * An amount of L0 page tables:
+ *   (512 entries of one L0 page table covers 2MB == 1<<XEN_PT_LEVEL_SHIFT(1))
+ *   XEN_VIRT_SIZE >> XEN_PT_LEVEL_SHIFT(1) are needed for Xen and
+ *   one L0 is needed for indenity mapping.
+ *
+ *   It might be needed one more page table in case when Xen load
+ *   address isn't 2 MB aligned.


              

              
Shouldn't we guarantee that?


            

            
I think it's sufficient to guarantee 4KB alignment.

The only real benefit I see in enforcing larger alignment is that it likely enables
the use of superpages for mapping, which would reduce TLB pressure.
But perhaps I'm missing something?


          

          
No, it's indeed mainly that.


        

        
But then the linker address and the load address should both be aligned to a 2MB or 1GB boundary.
This likely isn't an issue at all, but could it be a problem if we require 1GB alignment for the
load address? In that case, might it be difficult for the platform to find a suitable place in
memory to load Xen for some reason? (I don't think so but maybe I'm missing something)


      

      
Why would load address need to be 1Gb aligned? That (as well as 2Mb-)alignment
matters only once you set up paging?


    

    
Mostly yes, it matters only once during paging set up.

I was thinking that if, one day, 2MB (or larger) alignment is used and the load address isn't
properly aligned, some space in a page might be lost.
(The word "should" above wasn't entirely accurate.)

But this likely isn't a big deal and can be safely ignored.

~ Oleksii

    

  


--------------3VbIvQuZ34doO0coDiX8W00t--


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Date: Wed, 9 Apr 2025 11:07:16 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: Marek Marczykowski ,
	Andrew Cooper ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH 2/2] x86/hvm: fix write emulation of RO ranges
Message-ID: 
References: <20250408093156.83277-1-roger.pau@citrix.com>
 <20250408093156.83277-3-roger.pau@citrix.com>
 <16c73cae-2ac0-4811-97d3-b25c95ed5abc@suse.com>
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On Tue, Apr 08, 2025 at 03:57:17PM +0200, Jan Beulich wrote:
> On 08.04.2025 11:31, Roger Pau Monne wrote:
> > When running on AMD hardware in HVM mode the guest linear address (GLA)
> > will not be provided to hvm_emulate_one_mmio(), and instead is
> > unconditionally set of ~0.  As a consequence mmio_ro_emulated_write() will
> > always report an error, as the fault GLA generated by the emulation of the
> > access won't be ~0.
> 
> Which means subpage_mmio_write_accept() is flawed, too, on AMD (or more
> generally whenever .gla_valid isn't set).

Oh, yes, good catch.  I didn't notice that one.  We should move all
those checks to use a paddr rather than a gla.

> > Fix this by only checking for the fault GLA in mmio_ro_emulated_write()
> > when the guest is PV.
> 
> This narrows checking too much, imo. For VT-x we could continue to do so,
> provided we pass e.g. npfec down into hvm_emulate_one_mmio(), i.e. make
> the gla_valid flag visible there.

I don't think we should rely on the gla at all in
mmio_ro_emulated_write(), and instead just use the physical address.

> > --- a/xen/arch/x86/mm.c
> > +++ b/xen/arch/x86/mm.c
> > @@ -5187,7 +5187,12 @@ int cf_check mmio_ro_emulated_write(
> >  
> >      /* Only allow naturally-aligned stores at the original %cr2 address. */
> >      if ( ((bytes | offset) & (bytes - 1)) || !bytes ||
> > -         offset != mmio_ro_ctxt->cr2 )
> > +         /*
> > +          * HVM domains might not have a valid fault GLA in the context, as AMD
> > +          * NPT faults don't report the faulting GLA.  It's also possible for
> > +          * the fault to happen in non-paging modes.
> > +          */
> > +         (is_pv_domain(current->domain) && offset != mmio_ro_ctxt->cr2) )
> >      {
> >          gdprintk(XENLOG_WARNING, "bad access (cr2=%lx, addr=%lx, bytes=%u)\n",
> >                  mmio_ro_ctxt->cr2, offset, bytes);
> 
> Is logging the supposed CR2 value useful then for cases where the GLA
> isn't valid? I fear it might be more confusing than helpful.

Since it was a debug printk I was kind of OK with leaving it, but
given the other comments I think I will have to rework
mmio_ro_emulated_write() so that it doesn't use the gla anymore.

Thanks, Roger.


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Date: Wed, 9 Apr 2025 11:18:51 +0200
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Subject: Re: [PATCH v3.1 1/2] x86/amd: Add guest support for AMD TCE
From: Jan Beulich 
To: Teddy Astie 
Cc: Oleksii Kurochko ,
 Community Manager ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 xen-devel@lists.xenproject.org
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On 09.04.2025 10:53, Jan Beulich wrote:
> On 07.04.2025 11:10, Teddy Astie wrote:
>> --- a/xen/include/public/arch-x86/cpufeatureset.h
>> +++ b/xen/include/public/arch-x86/cpufeatureset.h
>> @@ -170,6 +170,7 @@ XEN_CPUFEATURE(SKINIT,        3*32+12) /*   SKINIT/STGI instructions */
>>  XEN_CPUFEATURE(WDT,           3*32+13) /*   Watchdog timer */
>>  XEN_CPUFEATURE(LWP,           3*32+15) /*   Light Weight Profiling */
>>  XEN_CPUFEATURE(FMA4,          3*32+16) /*A  4 operands MAC instructions */
>> +XEN_CPUFEATURE(TCE,           3*32+17) /*H  Translation Cache Extension support */
> 
> I consider this too limiting; this is a performance hint only, after all,
> not affecting correctness when ignored if set. A shadow guest is fine to
> enable TCE if it sees fit. It'll benefit if later migrated to a HAP-
> capable host.

Further to this: From all I can find it doesn't become clear whether INVLPGA
acts like INVLPG as to upper-level entries. Implicitly it comes closer to
acting like INVLPG with TCE set. Which may be the reason why svm_invlpg()
doesn't use INVLPGA. Yet that could change then for guests having TCE set,
which means it would become relevant to expose the bit also to shadow guests.

Jan


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Date: Wed, 9 Apr 2025 11:47:01 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Andrew Cooper 
Cc: xen-devel@lists.xenproject.org, Jan Beulich 
Subject: Re: [PATCH 2/2] x86/hvm: fix write emulation of RO ranges
Message-ID: 
References: <20250408093156.83277-1-roger.pau@citrix.com>
 <20250408093156.83277-3-roger.pau@citrix.com>
 <13127adf-4feb-4039-b859-27d68bef751d@citrix.com>
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On Tue, Apr 08, 2025 at 03:00:28PM +0100, Andrew Cooper wrote:
> On 08/04/2025 10:31 am, Roger Pau Monne wrote:
> > When running on AMD hardware in HVM mode the guest linear address (GLA)
> > will not be provided to hvm_emulate_one_mmio(), and instead is
> > unconditionally set of ~0.  As a consequence mmio_ro_emulated_write() will
> > always report an error, as the fault GLA generated by the emulation of the
> > access won't be ~0.
> >
> > Fix this by only checking for the fault GLA in mmio_ro_emulated_write()
> > when the guest is PV.
> >
> > Fixes: 33c19df9a5a0 ('x86/PCI: intercept accesses to RO MMIO from dom0s in HVM containers')
> > Signed-off-by: Roger Pau Monné 
> 
> I think there are several bugs here.
> 
> We do get %cr2 reliably for PV and Shadow guests.
> 
> Intel EPT may or may not give us GLA.  e.g. writes for pagetable A/D
> updates don't get GLA.
> 
> Defaulting to ~0 isn't ok.  We need some kind of GLA-valid signal,
> except for HAP guests, it isn't even the GLA we care about, it's the GPA
> which identifies the MMIO region.
> 
> We shouldn't terminate the emulation if there's no GLA to check.  In the
> case that we don't have a GLA, we should translate the memory operand
> and cross-check the GPA.  We'll definitely have one of the two to hand.

I guess I will have to switch to a more complex approach for HVM and
use logic similar to hvmemul_write() to figure out the mfn, and
compare it with the fault provided one.

Thanks, Roger.


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Subject: Re: [PATCH 2/2] x86/hvm: fix write emulation of RO ranges
To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
Cc: Marek Marczykowski ,
 Andrew Cooper , xen-devel@lists.xenproject.org
References: <20250408093156.83277-1-roger.pau@citrix.com>
 <20250408093156.83277-3-roger.pau@citrix.com>
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On 09.04.2025 11:07, Roger Pau Monné wrote:
> On Tue, Apr 08, 2025 at 03:57:17PM +0200, Jan Beulich wrote:
>> On 08.04.2025 11:31, Roger Pau Monne wrote:
>>> When running on AMD hardware in HVM mode the guest linear address (GLA)
>>> will not be provided to hvm_emulate_one_mmio(), and instead is
>>> unconditionally set of ~0.  As a consequence mmio_ro_emulated_write() will
>>> always report an error, as the fault GLA generated by the emulation of the
>>> access won't be ~0.
>>
>> Which means subpage_mmio_write_accept() is flawed, too, on AMD (or more
>> generally whenever .gla_valid isn't set).
> 
> Oh, yes, good catch.  I didn't notice that one.  We should move all
> those checks to use a paddr rather than a gla.

Really that function could just be passed the offset into the page.

>>> Fix this by only checking for the fault GLA in mmio_ro_emulated_write()
>>> when the guest is PV.
>>
>> This narrows checking too much, imo. For VT-x we could continue to do so,
>> provided we pass e.g. npfec down into hvm_emulate_one_mmio(), i.e. make
>> the gla_valid flag visible there.
> 
> I don't think we should rely on the gla at all in
> mmio_ro_emulated_write(), and instead just use the physical address.

But you can't validate a physical address against a CR2 value. And I view
this validation as meaningful, to guard (best effort, but still) against
e.g. insn re-writing under our feet.

Jan


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Date: Wed, 9 Apr 2025 12:05:04 +0200
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Subject: Re: [PATCH v2] xen/riscv: Increase XEN_VIRT_SIZE
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <808d1b346bc90dde38fd19a6b92ab78d78e42936.1743766932.git.oleksii.kurochko@gmail.com>
 
 
 <8b2e50f2-1f89-41df-be88-afc9ef24b51a@suse.com>
 
 
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From: Jan Beulich 
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On 09.04.2025 11:06, Oleksii Kurochko wrote:
> On 4/8/25 4:04 PM, Jan Beulich wrote:
>> On 08.04.2025 15:46, Oleksii Kurochko wrote:
>>> On 4/8/25 2:02 PM, Jan Beulich wrote:
>>>> On 08.04.2025 13:51, Oleksii Kurochko wrote:
>>>>> On 4/7/25 12:09 PM, Jan Beulich wrote:
>>>>>> On 04.04.2025 18:04, Oleksii Kurochko wrote:
>>>>>>> --- a/xen/arch/riscv/mm.c
>>>>>>> +++ b/xen/arch/riscv/mm.c
>>>>>>> @@ -31,20 +31,27 @@ unsigned long __ro_after_init phys_offset; /* = load_start - XEN_VIRT_START */
>>>>>>>     #define LOAD_TO_LINK(addr) ((unsigned long)(addr) - phys_offset)
>>>>>>>     
>>>>>>>     /*
>>>>>>> - * It is expected that Xen won't be more then 2 MB.
>>>>>>> + * It is expected that Xen won't be more then XEN_VIRT_SIZE MB.
>>>>>>>      * The check in xen.lds.S guarantees that.
>>>>>>> - * At least 3 page tables (in case of Sv39 ) are needed to cover 2 MB.
>>>>>>> - * One for each page level table with PAGE_SIZE = 4 Kb.
>>>>>>>      *
>>>>>>> - * One L0 page table can cover 2 MB(512 entries of one page table * PAGE_SIZE).
>>>>>>> + * Root page table is shared with the initial mapping and is declared
>>>>>>> + * separetely. (look at stage1_pgtbl_root)
>>>>>>>      *
>>>>>>> - * It might be needed one more page table in case when Xen load address
>>>>>>> - * isn't 2 MB aligned.
>>>>>>> + * An amount of page tables between root page table and L0 page table
>>>>>>> + * (in the case of Sv39 it covers L1 table):
>>>>>>> + *   (CONFIG_PAGING_LEVELS - 2) are needed for an identity mapping and
>>>>>>> + *   the same amount are needed for Xen.
>>>>>>>      *
>>>>>>> - * CONFIG_PAGING_LEVELS page tables are needed for the identity mapping,
>>>>>>> - * except that the root page table is shared with the initial mapping
>>>>>>> + * An amount of L0 page tables:
>>>>>>> + *   (512 entries of one L0 page table covers 2MB == 1<>>>>>> + *   XEN_VIRT_SIZE >> XEN_PT_LEVEL_SHIFT(1) are needed for Xen and
>>>>>>> + *   one L0 is needed for indenity mapping.
>>>>>>> + *
>>>>>>> + *   It might be needed one more page table in case when Xen load
>>>>>>> + *   address isn't 2 MB aligned.
>>>>>> Shouldn't we guarantee that?
>>>>> I think it's sufficient to guarantee 4KB alignment.
>>>>>
>>>>> The only real benefit I see in enforcing larger alignment is that it likely enables
>>>>> the use of superpages for mapping, which would reduce TLB pressure.
>>>>> But perhaps I'm missing something?
>>>> No, it's indeed mainly that.
>>> But then the linker address and the load address should both be aligned to a 2MB or 1GB boundary.
>>> This likely isn't an issue at all, but could it be a problem if we require 1GB alignment for the
>>> load address? In that case, might it be difficult for the platform to find a suitable place in
>>> memory to load Xen for some reason? (I don't think so but maybe I'm missing something)
>> Why would load address need to be 1Gb aligned? That (as well as 2Mb-)alignment
>> matters only once you set up paging?
> 
> Mostly yes, it matters only once during paging set up.
> 
> I was thinking that if, one day, 2MB (or larger) alignment is used and the load address isn't
> properly aligned, some space in a page might be lost.
> (The word "should" above wasn't entirely accurate.)

Actually I think I was wrong with my question. Load address of course matters to
a sufficient degree, especially if at 2Mb boundaries to want to be able to change
what permissions to use (without sacrificing the 2Mb mappings).

Jan


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On 09/04/2025 09:26, Luca Fancellu wrote:
> Hi Ayan,
Hi Luca,
>
>>>> The point of the code was to don’t issue an isb() every time we change the selector,
>>>> of course the code would be easier otherwise, but do we want to do that?
>>> Not sure if it is beneficial as you would need to use isb() from region16 onwards.
>> The isb() is issued only when changing the selector, so when you go from reading/writing regions
>> from 0-15 to 16-31 for example, of course there is a case that if you continuously write on region 15
>> and 16 you would have to always change the selector, but it’s the less impact we could have.
>>
>> armv8-R is even better since it’s able to address regions from 0 to 23 without flushing the pipeline,
>                   ^— aarch32 :)
Can you point me to the document where you got this info ?
>
>> so I would say we should exploit this big advantage.
>>
>> I’ll send shortly in this thread the code I would use and the code I was thinking you could use.
> Here the code I have in mind:
>
> static void prepare_selector(uint8_t *sel)
> {
>      uint8_t cur_sel = *sel;
>      /*
>       * {read,write}_protection_region works using the direct access to the 0..15
>       * regions, so in order to save the isb() overhead, change the PRSELR_EL2
>       * only when needed, so when the upper 4 bits of the selector will change.
>       */
>      cur_sel &= 0xF0U;
>      if ( READ_SYSREG(PRSELR_EL2) != cur_sel )
>      {
>          WRITE_SYSREG(cur_sel, PRSELR_EL2);
>          isb();
>      }
>      *sel = *sel & 0xFU;
> }
>
> void read_protection_region(pr_t *pr_read, uint8_t sel)
> {
>      /*
>       * Before accessing EL2 MPU region register PRBAR_EL2/PRLAR_EL2,
>       * make sure PRSELR_EL2 is set, as it determines which MPU region
>       * is selected.
>       */
>      prepare_selector(&sel);
>
>      switch ( sel )
>      {
>          GENERATE_READ_PR_REG_CASE(0, pr_read);
>          GENERATE_READ_PR_REG_CASE(1, pr_read);
>          GENERATE_READ_PR_REG_CASE(2, pr_read);
>          GENERATE_READ_PR_REG_CASE(3, pr_read);
>          GENERATE_READ_PR_REG_CASE(4, pr_read);
>          GENERATE_READ_PR_REG_CASE(5, pr_read);
>          GENERATE_READ_PR_REG_CASE(6, pr_read);
>          GENERATE_READ_PR_REG_CASE(7, pr_read);
>          GENERATE_READ_PR_REG_CASE(8, pr_read);
>          GENERATE_READ_PR_REG_CASE(9, pr_read);
>          GENERATE_READ_PR_REG_CASE(10, pr_read);
>          GENERATE_READ_PR_REG_CASE(11, pr_read);
>          GENERATE_READ_PR_REG_CASE(12, pr_read);
>          GENERATE_READ_PR_REG_CASE(13, pr_read);
>          GENERATE_READ_PR_REG_CASE(14, pr_read);
>          GENERATE_READ_PR_REG_CASE(15, pr_read);
>      default:
>          BUG(); /* Can't happen */
>      }
> }
>
> void write_protection_region(const pr_t *pr_write, uint8_t sel)
> {
>      /*
>       * Before accessing EL2 MPU region register PRBAR_EL2/PRLAR_EL2,
>       * make sure PRSELR_EL2 is set, as it determines which MPU region
>       * is selected.
>       */
>      prepare_selector(&sel);
>
>      switch ( sel )
>      {
>          GENERATE_WRITE_PR_REG_CASE(0, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(1, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(2, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(3, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(4, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(5, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(6, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(7, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(8, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(9, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(10, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(11, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(12, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(13, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(14, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(15, pr_write);
>      default:
>          BUG(); /* Can't happen */
>      }
> }
Till here I am fine if you think this is the correct approach for arm64.
>
> Here the code I thought you could add for arm32:
>
> static void prepare_selector(uint8_t *sel)
> {
>      uint8_t cur_sel = *sel;
>
> #ifdef CONFIG_ARM_64
>      /*
>       * {read,write}_protection_region works using the direct access to the 0..15
>       * regions, so in order to save the isb() overhead, change the PRSELR_EL2
>       * only when needed, so when the upper 4 bits of the selector will change.
>       */
>      cur_sel &= 0xF0U;
>      if ( READ_SYSREG(PRSELR_EL2) != cur_sel )
>      {
>          WRITE_SYSREG(cur_sel, PRSELR_EL2);
>          isb();
>      }
>      *sel = *sel & 0xFU;
> #else
>      if ( cur_sel > 23 )
>          panic("Armv8-R AArch32 region selector exceeds maximum allowed range!");
I am not sure about this. See my question before. However ...
> #endif
> }

 From ARM DDI 0568A.c ID110520

E2.2.3 HPRBAR - Provides access to the base addresses for the first 
32 defined EL2 MPU regions.

E2.2.6 HPRLAR - Provides access to the limit addresses for the first 
32 defined EL2 MPU regions.

I understand that HPRSELR is not used when directly accessing the above 
two registers. Thus, this function will be a nop for Arm32. Please let 
me know if I am mistaken.

>
> void read_protection_region(pr_t *pr_read, uint8_t sel)
> {
>      /*
>       * Before accessing EL2 MPU region register PRBAR_EL2/PRLAR_EL2,
>       * make sure PRSELR_EL2 is set, as it determines which MPU region
>       * is selected.
>       */
>      prepare_selector(&sel);
>
>      switch ( sel )
>      {
>          GENERATE_READ_PR_REG_CASE(0, pr_read);
>          GENERATE_READ_PR_REG_CASE(1, pr_read);
>          GENERATE_READ_PR_REG_CASE(2, pr_read);
>          GENERATE_READ_PR_REG_CASE(3, pr_read);
>          GENERATE_READ_PR_REG_CASE(4, pr_read);
>          GENERATE_READ_PR_REG_CASE(5, pr_read);
>          GENERATE_READ_PR_REG_CASE(6, pr_read);
>          GENERATE_READ_PR_REG_CASE(7, pr_read);
>          GENERATE_READ_PR_REG_CASE(8, pr_read);
>          GENERATE_READ_PR_REG_CASE(9, pr_read);
>          GENERATE_READ_PR_REG_CASE(10, pr_read);
>          GENERATE_READ_PR_REG_CASE(11, pr_read);
>          GENERATE_READ_PR_REG_CASE(12, pr_read);
>          GENERATE_READ_PR_REG_CASE(13, pr_read);
>          GENERATE_READ_PR_REG_CASE(14, pr_read);
>          GENERATE_READ_PR_REG_CASE(15, pr_read);
> #ifdef CONFIG_ARM_32
>          GENERATE_READ_PR_REG_CASE(16, pr_read);
>          GENERATE_READ_PR_REG_CASE(17, pr_read);
>          GENERATE_READ_PR_REG_CASE(18, pr_read);
>          GENERATE_READ_PR_REG_CASE(19, pr_read);
>          GENERATE_READ_PR_REG_CASE(20, pr_read);
>          GENERATE_READ_PR_REG_CASE(21, pr_read);
>          GENERATE_READ_PR_REG_CASE(22, pr_read);
>          GENERATE_READ_PR_REG_CASE(23, pr_read);
At least 32 regions are directly accessible, thus thisn should go till 
31 (0-31). Same ..
> #endif
>      default:
>          BUG(); /* Can't happen */
>      }
> }
>
> void write_protection_region(const pr_t *pr_write, uint8_t sel)
> {
>      /*
>       * Before accessing EL2 MPU region register PRBAR_EL2/PRLAR_EL2,
>       * make sure PRSELR_EL2 is set, as it determines which MPU region
>       * is selected.
>       */
>      prepare_selector(&sel);
>
>      switch ( sel )
>      {
>          GENERATE_WRITE_PR_REG_CASE(0, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(1, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(2, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(3, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(4, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(5, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(6, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(7, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(8, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(9, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(10, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(11, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(12, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(13, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(14, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(15, pr_write);
> #ifdef CONFIG_ARM_32
>          GENERATE_WRITE_PR_REG_CASE(16, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(17, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(18, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(19, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(20, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(21, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(22, pr_write);
>          GENERATE_WRITE_PR_REG_CASE(23, pr_write);
for here.
> #endif
>      default:
>          BUG(); /* Can't happen */
>      }
> }
>
> Please let me know your thoughts.
- Ayan
>
> Cheers,
> Luca
>
>
>


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From: Volodymyr Babchuk 
To: "xen-devel@lists.xenproject.org" 
CC: Volodymyr Babchuk , Andrew Cooper
	, Anthony PERARD ,
	Michal Orzel , Jan Beulich , Julien
 Grall , =?iso-8859-1?Q?Roger_Pau_Monn=E9?=
	, Stefano Stabellini 
Subject: [PATCH v5] xen: debug: gcov: add condition coverage support
Thread-Topic: [PATCH v5] xen: debug: gcov: add condition coverage support
Thread-Index: AQHbqTe/Csu/ncsNI0mulEQya+sOaA==
Date: Wed, 9 Apr 2025 10:11:23 +0000
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Condition coverage, also known as MC/DC (modified condition/decision
coverage) is a coverage metric that tracks separate outcomes in
boolean expressions.

This patch adds CONFIG_CONDITION_COVERAGE option to enable MC/DC for
GCC. Clang is not supported right now because Xen can't emit version
10 of LLVM profile data, where MC/DC support was added.

Also, use the opportunity to convert COV_FLAGS to cov-cflags-y, which
reduces amount of ifeqs in Rules.mk. Otherwise this patch had to add
another nesting level with "ifeq ($(CONFIG_CONDITION_COVERAGE),y)".

Signed-off-by: Volodymyr Babchuk 

---
Changes in v5:
 - cov-flags-y -> cov-cflags-y
 - Clarified why Clang is not supported right now

Changes in v4:
 - Slight formatting fixes
 - COV_FLAGS  -> cov-flags-y

Changes in v3:
 - Introduced CC_HAS_MCDC that checks if compiler supports
   required feature

Changes in v2:
 - Move gcc version check from .c file to Rules.mk (I can't find
   an easy way to check GCC version at Kconfig level)
 - Check for gcc 14, not gcc 14.1
---
 xen/Kconfig       |  4 ++++
 xen/Kconfig.debug |  9 +++++++++
 xen/Rules.mk      | 14 +++++++-------
 3 files changed, 20 insertions(+), 7 deletions(-)

diff --git a/xen/Kconfig b/xen/Kconfig
index 2128f0ccfc..3a723db8ea 100644
--- a/xen/Kconfig
+++ b/xen/Kconfig
@@ -41,6 +41,10 @@ config CC_SPLIT_SECTIONS
 config CC_HAS_UBSAN
 	def_bool $(cc-option,-fsanitize=3Dundefined)
=20
+# Compiler supports -fcondition-coverage aka MC/DC
+config CC_HAS_MCDC
+	def_bool $(cc-option,-fcondition-coverage)
+
 # Set code alignment.
 #
 # Allow setting on a boolean basis, and then convert such selection to an
diff --git a/xen/Kconfig.debug b/xen/Kconfig.debug
index f7cc5ffaab..f89cbd823b 100644
--- a/xen/Kconfig.debug
+++ b/xen/Kconfig.debug
@@ -44,6 +44,15 @@ config COVERAGE
=20
 	  If unsure, say N here.
=20
+config CONDITION_COVERAGE
+	bool "Condition coverage support"
+	depends on COVERAGE && CC_HAS_MCDC
+	help
+	  Enable condition coverage support. Used for collecting MC/DC
+	  (Modified Condition/Decision Coverage) metrics.
+
+	  If unsure, say N here.
+
 config DEBUG_LOCK_PROFILE
 	bool "Lock Profiling"
 	select DEBUG_LOCKS
diff --git a/xen/Rules.mk b/xen/Rules.mk
index d759cccee3..da21850926 100644
--- a/xen/Rules.mk
+++ b/xen/Rules.mk
@@ -29,6 +29,7 @@ targets :=3D
 subdir-y :=3D
 CFLAGS-y :=3D
 AFLAGS-y :=3D
+cov-cflags-y :=3D
 nocov-y :=3D
 noubsan-y :=3D
=20
@@ -133,19 +134,18 @@ $(filter %.init.o,$(obj-y) $(obj-bin-y) $(extra-y)): =
CFLAGS-y +=3D -DINIT_SECTIONS
=20
 non-init-objects =3D $(filter-out %.init.o, $(obj-y) $(obj-bin-y) $(extra-=
y))
=20
-ifeq ($(CONFIG_COVERAGE),y)
 ifeq ($(CONFIG_CC_IS_CLANG),y)
-    COV_FLAGS :=3D -fprofile-instr-generate -fcoverage-mapping
+    cov-cflags-$(CONFIG_COVERAGE) :=3D -fprofile-instr-generate -fcoverage=
-mapping
 else
-    COV_FLAGS :=3D -fprofile-arcs -ftest-coverage
+    cov-cflags-$(CONFIG_COVERAGE) :=3D -fprofile-arcs -ftest-coverage
+    cov-cflags-$(CONFIG_CONDITION_COVERAGE) +=3D -fcondition-coverage
 endif
=20
-# Reset COV_FLAGS in cases where an objects has another one as prerequisit=
e
+# Reset cov-cflags-y in cases where an objects has another one as prerequi=
site
 $(nocov-y) $(filter %.init.o, $(obj-y) $(obj-bin-y) $(extra-y)): \
-    COV_FLAGS :=3D
+    cov-cflags-y :=3D
=20
-$(non-init-objects): _c_flags +=3D $(COV_FLAGS)
-endif
+$(non-init-objects): _c_flags +=3D $(cov-cflags-y)
=20
 ifeq ($(CONFIG_UBSAN),y)
 # Any -fno-sanitize=3D options need to come after any -fsanitize=3D option=
s
--=20
2.48.1


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Date: Wed, 9 Apr 2025 11:19:42 +0100
Message-ID: 
CC: Jason Andryuk , Xenia Ragiadakou
	, Stefano Stabellini ,
	Michal Orzel , Andrew Cooper
	, =?utf-8?q?Roger_Pau_Monn=C3=A9?=
	, Anthony PERARD , "Julien
 Grall" , "Daniel P. Smith" ,
	Bertrand Marquis , 
Subject: Re: [PATCH v3 00/16] Hyperlaunch device tree for dom0
From: Alejandro Vallejo 
To: Jan Beulich 
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On Wed Apr 9, 2025 at 7:29 AM BST, Jan Beulich wrote:
> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>> I've purposefully not added my S-by on anything I haven't touched
>> (besides rebasing) as most of the feedback had already been addressed by
>> Jason by the time I looked at it and it would be utterly nonsensical to
>> give myself authorship over it.
>
> My understanding of it is that S-o-b doesn't indicate (only) authorship.
> See docs/process/sending-patches.pandoc "Developer's Certificate of Origi=
n
> 1.1" point (c). And what you would want to demonstrate with adding your
> own one is agreement with (d) there. With this I'm not even sure I could
> commit patches becoming ready in their present form.
>
> Jan

Fair enough. Will add myself everywhere on v4, then. Seeing as there's
still changes to go through.

Cheers,
Alejandro


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From: Luca Fancellu 
To: Ayan Kumar Halder 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Michal Orzel ,
	Volodymyr Babchuk 
Subject: Re: [PATCH v2 2/7] arm/mpu: Provide access to the MPU region from the
 C code
Thread-Topic: [PATCH v2 2/7] arm/mpu: Provide access to the MPU region from
 the C code
Thread-Index:
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Date: Wed, 9 Apr 2025 10:21:12 +0000
Message-ID: 
References: <20250407091430.2342709-1-luca.fancellu@arm.com>
 <20250407091430.2342709-3-luca.fancellu@arm.com>
 <0acf63c0-267e-44c0-b629-fa576307497c@amd.com>
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 <9f637d98-c8f8-49e0-9f0a-002cdfefc296@amd.com>
 
 
 
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Date: Wed, 9 Apr 2025 11:28:04 +0100
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Subject: Re: [PATCH v3 01/16] x86/boot: introduce boot domain
From: Alejandro Vallejo 
To: Jan Beulich , "Daniel P. Smith"
	
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On Wed Apr 9, 2025 at 7:24 AM BST, Jan Beulich wrote:
> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>> From: "Daniel P. Smith" 
>>=20
>> To begin moving toward allowing the hypervisor to construct more than on=
e
>> domain at boot, a container is needed for a domain's build information.
>> Introduce a new header, , that contains the initia=
l
>> struct boot_domain that encapsulate the build information for a domain.
>>=20
>> Add a kernel and ramdisk boot module reference along with a struct domai=
n
>> reference to the new struct boot_domain. This allows a struct boot_domai=
n
>> reference to be the only parameter necessary to pass down through the do=
main
>> construction call chain.
>>=20
>> Signed-off-by: Daniel P. Smith 
>> Reviewed-by: Jason Andryuk 
>
> Acked-by: Jan Beulich 

Thanks

>
>> --- /dev/null
>> +++ b/xen/arch/x86/include/asm/boot-domain.h
>> @@ -0,0 +1,28 @@
>> +/* SPDX-License-Identifier: GPL-2.0-or-later */
>> +/*
>> + * Copyright (c) 2024 Apertus Solutions, LLC
>> + * Author: Daniel P. Smith 
>> + * Copyright (c) 2024 Christopher Clark 
>> + */
>
> I wonder if the 2024-s here shouldn't have been amended by 2025 now.

Maybe. I didn't think about it, tbh. One could argue that Daniel and
Christopher's original contribution was indeed in 2024 and the fact they
weren't committed until (hopefully!) 2025 doesn't remove the fact they
did exist in some form in 2024.

I don't particularly care either way, but tend to lean on the "it's fine
how it is".

Cheers,
Alejandro


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Date: Wed, 9 Apr 2025 11:33:56 +0100
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CC: "Daniel P. Smith" , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" , Michal Orzel
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Subject: Re: [PATCH v3 02/16] x86/boot: introduce domid field to struct
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From: Alejandro Vallejo 
To: Jan Beulich 
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On Wed Apr 9, 2025 at 7:34 AM BST, Jan Beulich wrote:
> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>> @@ -1010,15 +1010,15 @@ static struct domain *__init create_dom0(struct =
boot_info *bi)
>>          dom0_cfg.flags |=3D XEN_DOMCTL_CDF_iommu;
>> =20
>>      /* Create initial domain.  Not d0 for pvshim. */
>> -    domid =3D get_initial_domain_id();
>> -    d =3D domain_create(domid, &dom0_cfg, pv_shim ? 0 : CDF_privileged)=
;
>> +    bd->domid =3D get_initial_domain_id();
>> +    d =3D domain_create(bd->domid, &dom0_cfg, pv_shim ? 0 : CDF_privile=
ged);
>>      if ( IS_ERR(d) )
>> -        panic("Error creating d%u: %ld\n", domid, PTR_ERR(d));
>> +        panic("Error creating d%u: %ld\n", bd->domid, PTR_ERR(d));
>> =20
>>      init_dom0_cpuid_policy(d);
>> =20
>>      if ( alloc_dom0_vcpu0(d) =3D=3D NULL )
>> -        panic("Error creating d%uv0\n", domid);
>> +        panic("Error creating %pd vcpu 0\n", d);
>
> And why exactly is this not %pdv0?

Likely to avoid what looks like a highly cryptic format specifier. But I
agree your option seems nicer.

> That's what would be possible to catch by
> grep-ing for what vsnprintf() would emit for %pv. Preferably with that ad=
justed
> (which can be done while committing):

Yes, please.

> Acked-by: Jan Beulich 

Thanks

>
> Jan

Cheers,
Alejandro


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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH] x86/ucode: Extend warning about disabling digest check too
Date: Wed,  9 Apr 2025 11:38:36 +0100
Message-Id: <20250409103836.1986139-1-andrew.cooper3@citrix.com>
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This was missed by accident.

Fixes: b63951467e96 ("x86/ucode: Extend AMD digest checks to cover Zen5 CPUs")
Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
CC: Roger Pau Monné 
---
 xen/arch/x86/cpu/microcode/amd.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/xen/arch/x86/cpu/microcode/amd.c b/xen/arch/x86/cpu/microcode/amd.c
index 4bc490dedca7..ebd9ecbeef0f 100644
--- a/xen/arch/x86/cpu/microcode/amd.c
+++ b/xen/arch/x86/cpu/microcode/amd.c
@@ -516,8 +516,7 @@ static const struct microcode_ops __initconst_cf_clobber amd_ucode_ops = {
 
 void __init ucode_probe_amd(struct microcode_ops *ops)
 {
-    if ( !opt_digest_check &&
-         boot_cpu_data.x86 >= 0x17 && boot_cpu_data.x86 <= 0x19 )
+    if ( !opt_digest_check && boot_cpu_data.x86 >= 0x17 )
     {
         printk(XENLOG_WARNING
                "Microcode patch additional digest checks disabled");

base-commit: b63951467e964bcc927f823fc943e40069fac0c9
prerequisite-patch-id: b61e58b40ec8f03baec78dd76ed47debdc4f6734
prerequisite-patch-id: 54ea7968a08b4f4d59642083357ce31215f89355
prerequisite-patch-id: 14fc34d8e2613f9c122a7b08b32698d7c55f2760
prerequisite-patch-id: 8afac5fd1570ffad810f4721007063037910724b
prerequisite-patch-id: e024feb79e9db58aa401d423bd7a4e08da155387
prerequisite-patch-id: 9ddae7943cd741f385ec443280b669e32fed4402
-- 
2.39.5



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Date: Wed, 9 Apr 2025 12:39:20 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: Marek Marczykowski ,
	Andrew Cooper ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH 2/2] x86/hvm: fix write emulation of RO ranges
Message-ID: 
References: <20250408093156.83277-1-roger.pau@citrix.com>
 <20250408093156.83277-3-roger.pau@citrix.com>
 <16c73cae-2ac0-4811-97d3-b25c95ed5abc@suse.com>
 
 
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On Wed, Apr 09, 2025 at 12:00:16PM +0200, Jan Beulich wrote:
> On 09.04.2025 11:07, Roger Pau Monné wrote:
> > On Tue, Apr 08, 2025 at 03:57:17PM +0200, Jan Beulich wrote:
> >> On 08.04.2025 11:31, Roger Pau Monne wrote:
> >>> When running on AMD hardware in HVM mode the guest linear address (GLA)
> >>> will not be provided to hvm_emulate_one_mmio(), and instead is
> >>> unconditionally set of ~0.  As a consequence mmio_ro_emulated_write() will
> >>> always report an error, as the fault GLA generated by the emulation of the
> >>> access won't be ~0.
> >>
> >> Which means subpage_mmio_write_accept() is flawed, too, on AMD (or more
> >> generally whenever .gla_valid isn't set).
> > 
> > Oh, yes, good catch.  I didn't notice that one.  We should move all
> > those checks to use a paddr rather than a gla.
> 
> Really that function could just be passed the offset into the page.
> 
> >>> Fix this by only checking for the fault GLA in mmio_ro_emulated_write()
> >>> when the guest is PV.
> >>
> >> This narrows checking too much, imo. For VT-x we could continue to do so,
> >> provided we pass e.g. npfec down into hvm_emulate_one_mmio(), i.e. make
> >> the gla_valid flag visible there.
> > 
> > I don't think we should rely on the gla at all in
> > mmio_ro_emulated_write(), and instead just use the physical address.
> 
> But you can't validate a physical address against a CR2 value. And I view
> this validation as meaningful, to guard (best effort, but still) against
> e.g. insn re-writing under our feet.

But we have the mfn in mmio_ro_ctxt, and could possibly use that to
validate?  I could expand the context to include the offset also, so
that we could fully validate it.

Thanks, Roger.


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Date: Wed, 9 Apr 2025 11:39:24 +0100
Message-ID: 
CC: Jason Andryuk , Xenia Ragiadakou
	, Stefano Stabellini ,
	Michal Orzel , Andrew Cooper
	, =?utf-8?q?Roger_Pau_Monn=C3=A9?=
	, Anthony PERARD , "Julien
 Grall" , "Daniel P. Smith" ,
	Bertrand Marquis ,
	, Xen-devel
	
Subject: Re: [PATCH v3 00/16] Hyperlaunch device tree for dom0
From: Alejandro Vallejo 
To: Alejandro Vallejo , Jan Beulich 
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References: <20250408160802.49870-1-agarciav@amd.com>
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On Wed Apr 9, 2025 at 11:19 AM BST, Alejandro Vallejo wrote:
> On Wed Apr 9, 2025 at 7:29 AM BST, Jan Beulich wrote:
>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>> I've purposefully not added my S-by on anything I haven't touched
>>> (besides rebasing) as most of the feedback had already been addressed b=
y
>>> Jason by the time I looked at it and it would be utterly nonsensical to
>>> give myself authorship over it.
>>
>> My understanding of it is that S-o-b doesn't indicate (only) authorship.
>> See docs/process/sending-patches.pandoc "Developer's Certificate of Orig=
in
>> 1.1" point (c). And what you would want to demonstrate with adding your
>> own one is agreement with (d) there. With this I'm not even sure I could
>> commit patches becoming ready in their present form.
>>
>> Jan
>
> Fair enough. Will add myself everywhere on v4, then. Seeing as there's
> still changes to go through.
>
> Cheers,
> Alejandro

And FTAOD, that also meant an implicit

    Signed-off-by: Alejandro Vallejo 

to everything in v3.

Cheers,
Alejandro


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Date: Wed, 9 Apr 2025 11:46:23 +0100
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Subject: Re: [PATCH v2 2/7] arm/mpu: Provide access to the MPU region from the
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To: Luca Fancellu 
Cc: "xen-devel@lists.xenproject.org" ,
 Stefano Stabellini , Julien Grall ,
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 Volodymyr Babchuk 
References: <20250407091430.2342709-1-luca.fancellu@arm.com>
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On 09/04/2025 11:21, Luca Fancellu wrote:
> Hi Ayan,
Hi,
>
>> On 9 Apr 2025, at 11:07, Ayan Kumar Halder  wrote:
>>
>>
>> On 09/04/2025 09:26, Luca Fancellu wrote:
>>> Hi Ayan,
>> Hi Luca,
>>>>>> The point of the code was to don’t issue an isb() every time we change the selector,
>>>>>> of course the code would be easier otherwise, but do we want to do that?
>>>>> Not sure if it is beneficial as you would need to use isb() from region16 onwards.
>>>> The isb() is issued only when changing the selector, so when you go from reading/writing regions
>>>> from 0-15 to 16-31 for example, of course there is a case that if you continuously write on region 15
>>>> and 16 you would have to always change the selector, but it’s the less impact we could have.
>>>>
>>>> armv8-R is even better since it’s able to address regions from 0 to 23 without flushing the pipeline,
>>>                   ^— aarch32 :)
>> Can you point me to the document where you got this info ?
> was referring to the r52, of course you are more knowledgeable on the armv8-r aarch32 part, so ...
If you can point me to the page and section within R52 TRM, I can take a 
look to see if I missed something (which isn't suprising as the docs are 
huge :))
>
>>>> so I would say we should exploit this big advantage.
>>>>
>>>> I’ll send shortly in this thread the code I would use and the code I was thinking you could use.
>>> Here the code I have in mind:
>>>
>>> static void prepare_selector(uint8_t *sel)
>>> {
>>>      uint8_t cur_sel = *sel;
>>>      /*
>>>       * {read,write}_protection_region works using the direct access to the 0..15
>>>       * regions, so in order to save the isb() overhead, change the PRSELR_EL2
>>>       * only when needed, so when the upper 4 bits of the selector will change.
>>>       */
>>>      cur_sel &= 0xF0U;
>>>      if ( READ_SYSREG(PRSELR_EL2) != cur_sel )
>>>      {
>>>          WRITE_SYSREG(cur_sel, PRSELR_EL2);
>>>          isb();
>>>      }
>>>      *sel = *sel & 0xFU;
>>> }
>>>
>>> void read_protection_region(pr_t *pr_read, uint8_t sel)
>>> {
>>>      /*
>>>       * Before accessing EL2 MPU region register PRBAR_EL2/PRLAR_EL2,
>>>       * make sure PRSELR_EL2 is set, as it determines which MPU region
>>>       * is selected.
>>>       */
>>>      prepare_selector(&sel);
>>>
>>>      switch ( sel )
>>>      {
>>>          GENERATE_READ_PR_REG_CASE(0, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(1, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(2, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(3, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(4, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(5, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(6, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(7, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(8, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(9, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(10, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(11, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(12, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(13, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(14, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(15, pr_read);
>>>      default:
>>>          BUG(); /* Can't happen */
>>>      }
>>> }
>>>
>>> void write_protection_region(const pr_t *pr_write, uint8_t sel)
>>> {
>>>      /*
>>>       * Before accessing EL2 MPU region register PRBAR_EL2/PRLAR_EL2,
>>>       * make sure PRSELR_EL2 is set, as it determines which MPU region
>>>       * is selected.
>>>       */
>>>      prepare_selector(&sel);
>>>
>>>      switch ( sel )
>>>      {
>>>          GENERATE_WRITE_PR_REG_CASE(0, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(1, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(2, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(3, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(4, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(5, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(6, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(7, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(8, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(9, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(10, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(11, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(12, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(13, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(14, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(15, pr_write);
>>>      default:
>>>          BUG(); /* Can't happen */
>>>      }
>>> }
>> Till here I am fine if you think this is the correct approach for arm64.
> Ok
>
>>> Here the code I thought you could add for arm32:
>>>
>>> static void prepare_selector(uint8_t *sel)
>>> {
>>>      uint8_t cur_sel = *sel;
>>>
>>> #ifdef CONFIG_ARM_64
>>>      /*
>>>       * {read,write}_protection_region works using the direct access to the 0..15
>>>       * regions, so in order to save the isb() overhead, change the PRSELR_EL2
>>>       * only when needed, so when the upper 4 bits of the selector will change.
>>>       */
>>>      cur_sel &= 0xF0U;
>>>      if ( READ_SYSREG(PRSELR_EL2) != cur_sel )
>>>      {
>>>          WRITE_SYSREG(cur_sel, PRSELR_EL2);
>>>          isb();
>>>      }
>>>      *sel = *sel & 0xFU;
>>> #else
>>>      if ( cur_sel > 23 )
>>>          panic("Armv8-R AArch32 region selector exceeds maximum allowed range!");
>> I am not sure about this. See my question before. However ...
>>> #endif
>>> }
>>  From ARM DDI 0568A.c ID110520
>>
>> E2.2.3 HPRBAR - Provides access to the base addresses for the first 32 defined EL2 MPU regions.
>>
>> E2.2.6 HPRLAR - Provides access to the limit addresses for the first 32 defined EL2 MPU regions.
>>
>> I understand that HPRSELR is not used when directly accessing the above two registers. Thus, this function will be a nop for Arm32. Please let me know if I am mistaken.
> yes you are right, you can decide if doing something or not in that function, you don’t need to change the selector.
>
>
>>> void read_protection_region(pr_t *pr_read, uint8_t sel)
>>> {
>>>      /*
>>>       * Before accessing EL2 MPU region register PRBAR_EL2/PRLAR_EL2,
>>>       * make sure PRSELR_EL2 is set, as it determines which MPU region
>>>       * is selected.
>>>       */
>>>      prepare_selector(&sel);
>>>
>>>      switch ( sel )
>>>      {
>>>          GENERATE_READ_PR_REG_CASE(0, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(1, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(2, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(3, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(4, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(5, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(6, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(7, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(8, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(9, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(10, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(11, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(12, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(13, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(14, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(15, pr_read);
>>> #ifdef CONFIG_ARM_32
>>>          GENERATE_READ_PR_REG_CASE(16, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(17, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(18, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(19, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(20, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(21, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(22, pr_read);
>>>          GENERATE_READ_PR_REG_CASE(23, pr_read);
>> At least 32 regions are directly accessible, thus thisn should go till 31 (0-31). Same ..
> yeah you can add until the 31st here and ...
>
>>> #endif
>>>      default:
>>>          BUG(); /* Can't happen */
>>>      }
>>> }
>>>
>>> void write_protection_region(const pr_t *pr_write, uint8_t sel)
>>> {
>>>      /*
>>>       * Before accessing EL2 MPU region register PRBAR_EL2/PRLAR_EL2,
>>>       * make sure PRSELR_EL2 is set, as it determines which MPU region
>>>       * is selected.
>>>       */
>>>      prepare_selector(&sel);
>>>
>>>      switch ( sel )
>>>      {
>>>          GENERATE_WRITE_PR_REG_CASE(0, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(1, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(2, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(3, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(4, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(5, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(6, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(7, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(8, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(9, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(10, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(11, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(12, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(13, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(14, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(15, pr_write);
>>> #ifdef CONFIG_ARM_32
>>>          GENERATE_WRITE_PR_REG_CASE(16, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(17, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(18, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(19, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(20, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(21, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(22, pr_write);
>>>          GENERATE_WRITE_PR_REG_CASE(23, pr_write);
>> for here.
> also here.
>
> So I guess we are aligned for this patch right? I will update this patch as the code above and you
> will modify the code for arm32 to support the direct access up to 32 region. Ok?

This is ok.

- Ayan

>
> Cheers,
> Luca
>
>


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Date: Wed, 9 Apr 2025 12:49:20 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Jan Beulich 
Subject: Re: [PATCH] x86/ucode: Extend warning about disabling digest check
 too
Message-ID: 
References: <20250409103836.1986139-1-andrew.cooper3@citrix.com>
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In-Reply-To: <20250409103836.1986139-1-andrew.cooper3@citrix.com>

On Wed, Apr 09, 2025 at 11:38:36AM +0100, Andrew Cooper wrote:
> This was missed by accident.
> 
> Fixes: b63951467e96 ("x86/ucode: Extend AMD digest checks to cover Zen5 CPUs")
> Signed-off-by: Andrew Cooper 

Reviewed-by: Roger Pau Monné 

Thanks, Roger.


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From: Luca Fancellu 
To: Ayan Kumar Halder 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Michal Orzel ,
	Volodymyr Babchuk 
Subject: Re: [PATCH v2 2/7] arm/mpu: Provide access to the MPU region from the
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Thread-Topic: [PATCH v2 2/7] arm/mpu: Provide access to the MPU region from
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Date: Wed, 9 Apr 2025 12:11:34 +0100
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	"Stefano Stabellini" , Michal Orzel
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Subject: Re: [PATCH v3 03/16] x86/boot: add cmdline to struct boot_domain
From: Alejandro Vallejo 
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References: <20250408160802.49870-1-agarciav@amd.com>
 <20250408160802.49870-4-agarciav@amd.com>
 
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On Wed Apr 9, 2025 at 7:48 AM BST, Jan Beulich wrote:
> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>> From: "Daniel P. Smith" 
>>=20
>> Add a container for the "cooked" command line for a domain. This
>> provides for the backing memory to be directly associated with the
>> domain being constructed.  This is done in anticipation that the domain
>> construction path may need to be invoked multiple times, thus ensuring
>> each instance had a distinct memory allocation.
>>=20
>> Signed-off-by: Daniel P. Smith 
>> Signed-off-by: Jason Andryuk 
>> Signed-off-by: Alejandro Vallejo 
>> ---
>> No changes on ACPI cmdline handling on PVH, as it's orthogonal to the
>> purpose of this patch.
>>=20
>> v3:
>>   * s/xfree/XFREE/ on failed construct_dom0() to avoid a dangling
>> cmdline ptr.
>>   * Re-flow hvm_copy_to_guest_phys() into a multi-line call.
>>   * s/bd->cmdline !=3D NULL/b->cmdline/ (to homogenise with the previous
>>     cmdline pointer check)
>> ---
>>  xen/arch/x86/hvm/dom0_build.c          | 12 +++----
>>  xen/arch/x86/include/asm/boot-domain.h |  1 +
>>  xen/arch/x86/pv/dom0_build.c           |  4 +--
>>  xen/arch/x86/setup.c                   | 50 +++++++++++++++++++-------
>>  4 files changed, 47 insertions(+), 20 deletions(-)
>>=20
>> diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build=
.c
>> index 2a094b3145..ebad5a49b8 100644
>> --- a/xen/arch/x86/hvm/dom0_build.c
>> +++ b/xen/arch/x86/hvm/dom0_build.c
>> @@ -653,7 +653,6 @@ static int __init pvh_load_kernel(
>>      void *image_start =3D image_base + image->headroom;
>>      unsigned long image_len =3D image->size;
>>      unsigned long initrd_len =3D initrd ? initrd->size : 0;
>> -    const char *cmdline =3D image->cmdline_pa ? __va(image->cmdline_pa)=
 : NULL;
>>      const char *initrd_cmdline =3D NULL;
>>      struct elf_binary elf;
>>      struct elf_dom_parms parms;
>> @@ -736,8 +735,8 @@ static int __init pvh_load_kernel(
>>              initrd =3D NULL;
>>      }
>> =20
>> -    if ( cmdline )
>> -        extra_space +=3D elf_round_up(&elf, strlen(cmdline) + 1);
>> +    if ( bd->cmdline )
>> +        extra_space +=3D elf_round_up(&elf, strlen(bd->cmdline) + 1);
>> =20
>>      last_addr =3D find_memory(d, &elf, extra_space);
>>      if ( last_addr =3D=3D INVALID_PADDR )
>> @@ -778,9 +777,10 @@ static int __init pvh_load_kernel(
>>      /* Free temporary buffers. */
>>      free_boot_modules();
>> =20
>> -    if ( cmdline !=3D NULL )
>> +    if ( bd->cmdline )
>>      {
>> -        rc =3D hvm_copy_to_guest_phys(last_addr, cmdline, strlen(cmdlin=
e) + 1, v);
>> +        rc =3D hvm_copy_to_guest_phys(last_addr, bd->cmdline,
>> +                                    strlen(bd->cmdline) + 1, v);
>>          if ( rc )
>>          {
>>              printk("Unable to copy guest command line\n");
>> @@ -791,7 +791,7 @@ static int __init pvh_load_kernel(
>>           * Round up to 32/64 bits (depending on the guest kernel bitnes=
s) so
>>           * the modlist/start_info is aligned.
>>           */
>> -        last_addr +=3D elf_round_up(&elf, strlen(cmdline) + 1);
>> +        last_addr +=3D elf_round_up(&elf, strlen(bd->cmdline) + 1);
>>      }
>>      if ( initrd !=3D NULL )
>>      {
>
> Perhaps better introduce a local variable cmdline_len? That would allow t=
he first
> if() to go away (but of course not its body).

I'd agree if the function body was smaller, but it has 16 locals
already. It's already quite hard to know what's going on, so I'd rather
not make the situation worse.

>
>> --- a/xen/arch/x86/setup.c
>> +++ b/xen/arch/x86/setup.c
>> @@ -978,10 +978,30 @@ static unsigned int __init copy_bios_e820(struct e=
820entry *map, unsigned int li
>>      return n;
>>  }
>> =20
>> -static struct domain *__init create_dom0(struct boot_info *bi)
>> +static size_t __init domain_cmdline_size(
>> +    struct boot_info *bi, struct boot_domain *bd)
>
> const for both? And perhaps s/domain/dom0/ in the function name?
>
>>  {
>> -    static char __initdata cmdline[MAX_GUEST_CMDLINE];
>> +    size_t s =3D bi->kextra ? strlen(bi->kextra) : 0;
>> +
>> +    s +=3D bd->kernel->cmdline_pa ? strlen(__va(bd->kernel->cmdline_pa)=
) : 0;
>> =20
>> +    if ( s =3D=3D 0 )
>> +        return s;
>
> While this retains prior behavior, that prior behavior was certainly odd =
(and
> pretty likely not meant to be like that).

What part of it? How would you propose it to behave? Do you mean that if
no cmdline is passed some ought to be allocated in case we want to
override it?

Either way, such a functional change is better suited for a different
patch that does just that, plus properly handling the acpi adjustments
for PVH dom0.

>
>> @@ -1043,17 +1067,19 @@ static struct domain *__init create_dom0(struct =
boot_info *bi)
>> =20
>>          if ( (strlen(acpi_param) !=3D 0) && !strstr(cmdline, "acpi=3D")=
 )
>>          {
>> -            safe_strcat(cmdline, " acpi=3D");
>> -            safe_strcat(cmdline, acpi_param);
>> +            strlcat(cmdline, " acpi=3D", cmdline_size);
>> +            strlcat(cmdline, acpi_param, cmdline_size);
>>          }
>> -
>> -        bd->kernel->cmdline_pa =3D __pa(cmdline);
>> +        bd->kernel->cmdline_pa =3D 0;
>> +        bd->cmdline =3D cmdline;
>>      }
>> =20
>>      bd->d =3D d;
>>      if ( construct_dom0(bd) !=3D 0 )
>>          panic("Could not construct domain 0\n");
>> =20
>> +    XFREE(cmdline);
>
> While this tidies the local variable, what about bd->cmdline? As it stand=
s this
> gives the impression that you're freeing a pointer here which may still b=
e used
> through passing bd elsewhere.

That ought to have been bd->cmdline indeed.

>
> Jan

Cheers,
Alejandro


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Date: Wed, 9 Apr 2025 12:28:06 +0100
Message-ID: 
Subject: Re: [PATCH v3 03/16] x86/boot: add cmdline to struct boot_domain
From: Alejandro Vallejo 
To: Alejandro Vallejo , Jan Beulich 
CC: "Daniel P. Smith" , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" , Michal Orzel
	, Andrew Cooper ,
	=?utf-8?q?Roger_Pau_Monn=C3=A9?= ,
	, Xen-devel
	
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On Wed Apr 9, 2025 at 12:11 PM BST, Alejandro Vallejo wrote:
> On Wed Apr 9, 2025 at 7:48 AM BST, Jan Beulich wrote:
>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>> --- a/xen/arch/x86/setup.c
>>> +++ b/xen/arch/x86/setup.c
>>> @@ -978,10 +978,30 @@ static unsigned int __init copy_bios_e820(struct =
e820entry *map, unsigned int li
>>>      return n;
>>>  }
>>> =20
>>> -static struct domain *__init create_dom0(struct boot_info *bi)
>>> +static size_t __init domain_cmdline_size(
>>> +    struct boot_info *bi, struct boot_domain *bd)
>>
>> const for both? And perhaps s/domain/dom0/ in the function name?

(missed this one)

Sure to the const pointers. But as the hyperlaunch effort progresses the
point is to turn all this into a more generic domain builders rather
than having dom0-specific stuff. Changing the name like that here to
adjust it in a few patches down the line doesn't seem worth the effort.

>> While this tidies the local variable, what about bd->cmdline? As it stan=
ds this
>> gives the impression that you're freeing a pointer here which may still =
be used
>> through passing bd elsewhere.
>
> That ought to have been bd->cmdline indeed.
>

Actually, it can't be. It's a "const char *", so XFREE() chokes on it.
I'll turn it into

    XFREE(cmdline);
    bd->cmdline =3D NULL;

instead.

Cheers,
Alejandro


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On 09.04.2025 12:39, Roger Pau Monné wrote:
> On Wed, Apr 09, 2025 at 12:00:16PM +0200, Jan Beulich wrote:
>> On 09.04.2025 11:07, Roger Pau Monné wrote:
>>> On Tue, Apr 08, 2025 at 03:57:17PM +0200, Jan Beulich wrote:
>>>> On 08.04.2025 11:31, Roger Pau Monne wrote:
>>>>> When running on AMD hardware in HVM mode the guest linear address (GLA)
>>>>> will not be provided to hvm_emulate_one_mmio(), and instead is
>>>>> unconditionally set of ~0.  As a consequence mmio_ro_emulated_write() will
>>>>> always report an error, as the fault GLA generated by the emulation of the
>>>>> access won't be ~0.
>>>>
>>>> Which means subpage_mmio_write_accept() is flawed, too, on AMD (or more
>>>> generally whenever .gla_valid isn't set).
>>>
>>> Oh, yes, good catch.  I didn't notice that one.  We should move all
>>> those checks to use a paddr rather than a gla.
>>
>> Really that function could just be passed the offset into the page.
>>
>>>>> Fix this by only checking for the fault GLA in mmio_ro_emulated_write()
>>>>> when the guest is PV.
>>>>
>>>> This narrows checking too much, imo. For VT-x we could continue to do so,
>>>> provided we pass e.g. npfec down into hvm_emulate_one_mmio(), i.e. make
>>>> the gla_valid flag visible there.
>>>
>>> I don't think we should rely on the gla at all in
>>> mmio_ro_emulated_write(), and instead just use the physical address.
>>
>> But you can't validate a physical address against a CR2 value. And I view
>> this validation as meaningful, to guard (best effort, but still) against
>> e.g. insn re-writing under our feet.
> 
> But we have the mfn in mmio_ro_ctxt, and could possibly use that to
> validate?  I could expand the context to include the offset also, so
> that we could fully validate it.

How would you use the MFN to validate against the VA in CR2?

Jan


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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
Subject: [PATCH] CI: Update x86 tests from Linux 6.1.19 to 6.6.56
Date: Wed,  9 Apr 2025 14:05:05 +0100
Message-Id: <20250409130505.2011604-1-andrew.cooper3@citrix.com>
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Linux 6.6.56 was already added to test-artifacts for the argo testing, and
this removes one moving part while cleaning things up.

Drop the associated export job, and dockerfile.

Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Doug Goldstein 
CC: Marek Marczykowski-Górecki 

https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1760198654
---
 automation/gitlab-ci/build.yaml               | 13 ------
 automation/gitlab-ci/test.yaml                |  4 +-
 .../tests-artifacts/kernel/6.1.19.dockerfile  | 41 -------------------
 3 files changed, 3 insertions(+), 55 deletions(-)
 delete mode 100644 automation/tests-artifacts/kernel/6.1.19.dockerfile

diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml
index 169bebe3c775..ab758243c1ec 100644
--- a/automation/gitlab-ci/build.yaml
+++ b/automation/gitlab-ci/build.yaml
@@ -308,19 +308,6 @@ qemu-system-aarch64-6.0.0-arm32-export:
   tags:
     - arm64
 
-# x86_64 test artifacts
-
-kernel-6.1.19-export:
-  extends: .test-jobs-artifact-common
-  image: registry.gitlab.com/xen-project/xen/tests-artifacts/kernel:6.1.19
-  script:
-    - mkdir binaries && cp /bzImage binaries/bzImage
-  artifacts:
-    paths:
-      - binaries/bzImage
-  tags:
-    - x86_64
-
 # Jobs below this line
 
 # Build jobs needed for tests
diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml
index d05b9a98afa6..58620b32da5d 100644
--- a/automation/gitlab-ci/test.yaml
+++ b/automation/gitlab-ci/test.yaml
@@ -16,7 +16,9 @@
   - qemu-system-aarch64-6.0.0-arm32-export
 
 .x86-64-test-needs: &x86-64-test-needs
-  - kernel-6.1.19-export
+  - project: xen-project/hardware/test-artifacts
+    job: x86_64-kernel-linux-6.6.56
+    ref: master
   - project: xen-project/hardware/test-artifacts
     job: x86_64-rootfs-alpine-3.18
     ref: master
diff --git a/automation/tests-artifacts/kernel/6.1.19.dockerfile b/automation/tests-artifacts/kernel/6.1.19.dockerfile
deleted file mode 100644
index 073eaa0e11fa..000000000000
--- a/automation/tests-artifacts/kernel/6.1.19.dockerfile
+++ /dev/null
@@ -1,41 +0,0 @@
-# syntax=docker/dockerfile:1
-FROM --platform=linux/amd64 debian:bookworm
-LABEL maintainer.name="The Xen Project" \
-      maintainer.email="xen-devel@lists.xenproject.org"
-
-ENV DEBIAN_FRONTEND=noninteractive
-ENV LINUX_VERSION=6.1.19
-ENV USER root
-
-RUN mkdir /build
-WORKDIR /build
-
-# build depends
-RUN apt-get update && \
-    apt-get --quiet --yes install \
-        build-essential \
-        bc \
-        curl \
-        flex \
-        bison \
-        libelf-dev \
-        && \
-    apt-get autoremove -y && \
-    apt-get clean && \
-    rm -rf /var/lib/apt/lists* /tmp/* /var/tmp/*
-
-# Build the kernel
-RUN curl -fsSLO https://cdn.kernel.org/pub/linux/kernel/v6.x/linux-"$LINUX_VERSION".tar.xz && \
-    tar xvJf linux-"$LINUX_VERSION".tar.xz && \
-    cd linux-"$LINUX_VERSION" && \
-    make defconfig && \
-    make xen.config && \
-    scripts/config --enable BRIDGE && \
-    scripts/config --enable IGC && \
-    scripts/config --enable TUN && \
-    cp .config .config.orig && \
-    cat .config.orig | grep XEN | grep =m |sed 's/=m/=y/g' >> .config && \
-    make -j$(nproc) bzImage && \
-    cp arch/x86/boot/bzImage / && \
-    cd /build && \
-    rm -rf linux-"$LINUX_VERSION"*

base-commit: 59bb316ea89e7f9461690fe00547d7d2af96321d
-- 
2.39.5



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To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper , Julien Grall ,
 Stefano Stabellini ,
 Anthony PERARD ,
 Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 
From: Jan Beulich 
Subject: [PATCH] include: sort $(wildcard ...) results
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The order of items is stored in .*.chk.cmd, and hence variations between
how items are ordered would result in re-invocation of the checking rule
during "make install-xen" despite that already having successfully run
earlier on. The difference can become noticable when building (as non-
root) and installing (as root) use different GNU make versions: In 3.82
the sorting was deliberately undone, just for it to be restored in 4.3.

Signed-off-by: Jan Beulich 
---
While this was an issue already before, it became noticable with the
toolchain baseline bump: The custom-built compilers I use, run directly
from their build areas, wouldn't find the C++ header files when run as
root. Hence the C++ checking rule would fail during "make install-xen",
when needlessly re-run there.

--- a/xen/include/Makefile
+++ b/xen/include/Makefile
@@ -41,8 +41,8 @@ cppflags-$(CONFIG_X86)    += -m32
 
 endif
 
-public-$(CONFIG_X86) := $(wildcard $(srcdir)/public/arch-x86/*.h $(srcdir)/public/arch-x86/*/*.h)
-public-$(CONFIG_ARM) := $(wildcard $(srcdir)/public/arch-arm/*.h $(srcdir)/public/arch-arm/*/*.h)
+public-$(CONFIG_X86) := $(sort $(wildcard $(srcdir)/public/arch-x86/*.h $(srcdir)/public/arch-x86/*/*.h))
+public-$(CONFIG_ARM) := $(sort $(wildcard $(srcdir)/public/arch-arm/*.h $(srcdir)/public/arch-arm/*/*.h))
 
 .PHONY: all
 all: $(addprefix $(obj)/,$(headers-y) $(headers-n))
@@ -130,7 +130,7 @@ all: $(obj)/headers.chk $(obj)/headers99
 
 public-hdrs-path := $(srcdir)/public
 
-public-list-headers = $(wildcard $1/*.h $1/*/*.h)
+public-list-headers = $(sort $(wildcard $1/*.h $1/*/*.h))
 public-filter-headers = $(filter-out $(addprefix $(public-hdrs-path)/, $($1-filter)), $($1))
 
 public-headers := $(call public-list-headers, $(public-hdrs-path)) $(public-y)


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To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
From: Jan Beulich 
Subject: [PATCH] x86/HVM: improve local variable use in
 hvm_hap_nested_page_fault()
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First gfn can be set just once, rather than (conditionally) twice.

And then gfn can be used in two function calls, rather than re-
calculating the value there.

Signed-off-by: Jan Beulich 
---
I wasn't quite sure about continuing to use an open-coded shift.
PFN_DOWN() could be used, or paddr_to_pfn(). Neither looks to be an
overly good fit to translate a gaddr to a gfn, yet gaddr_to_gfn() can't
be used quite nicely either as long as gfn isn't of type gfn_t.

--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -1794,7 +1794,7 @@ void hvm_inject_event(const struct x86_e
 int hvm_hap_nested_page_fault(paddr_t gpa, unsigned long gla,
                               struct npfec npfec)
 {
-    unsigned long gfn = gpa >> PAGE_SHIFT;
+    unsigned long gfn;
     p2m_type_t p2mt;
     p2m_access_t p2ma;
     mfn_t mfn;
@@ -1841,12 +1841,13 @@ int hvm_hap_nested_page_fault(paddr_t gp
                 hvm_inject_hw_exception(X86_EXC_GP, 0);
             return 1;
         case NESTEDHVM_PAGEFAULT_L0_ERROR:
-            /* gpa is now translated to l1 guest address, update gfn. */
-            gfn = gpa >> PAGE_SHIFT;
+            /* gpa is now translated to l1 guest address. */
             break;
         }
     }
 
+    gfn = gpa >> PAGE_SHIFT;
+
     /*
      * No need to do the P2M lookup for internally handled MMIO, benefiting
      * - 32-bit WinXP (& older Windows) on AMD CPUs for LAPIC accesses,
@@ -1854,7 +1855,7 @@ int hvm_hap_nested_page_fault(paddr_t gp
      */
     if ( !nestedhvm_vcpu_in_guestmode(curr) && hvm_mmio_internal(gpa) )
     {
-        if ( !handle_mmio_with_translation(gla, gpa >> PAGE_SHIFT, npfec) )
+        if ( !handle_mmio_with_translation(gla, gfn, npfec) )
             hvm_inject_hw_exception(X86_EXC_GP, 0);
         rc = 1;
         goto out;
@@ -1982,7 +1983,7 @@ int hvm_hap_nested_page_fault(paddr_t gp
          (npfec.write_access &&
           (p2m_is_discard_write(p2mt) || (p2mt == p2m_ioreq_server))) )
     {
-        if ( !handle_mmio_with_translation(gla, gpa >> PAGE_SHIFT, npfec) )
+        if ( !handle_mmio_with_translation(gla, gfn, npfec) )
             hvm_inject_hw_exception(X86_EXC_GP, 0);
         rc = 1;
         goto out_put_gfn;


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Subject: Re: [PATCH] include: sort $(wildcard ...) results
To: Jan Beulich ,
 "xen-devel@lists.xenproject.org" 
Cc: Julien Grall , Stefano Stabellini
 , Anthony PERARD ,
 Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 
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On 09/04/2025 2:15 pm, Jan Beulich wrote:
> The order of items is stored in .*.chk.cmd, and hence variations between
> how items are ordered would result in re-invocation of the checking rule
> during "make install-xen" despite that already having successfully run
> earlier on. The difference can become noticable when building (as non-
> root) and installing (as root) use different GNU make versions: In 3.82
> the sorting was deliberately undone, just for it to be restored in 4.3.
>
> Signed-off-by: Jan Beulich 

Acked-by: Andrew Cooper 


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Date: Wed, 9 Apr 2025 14:23:47 +0100
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Subject: Re: [PATCH] x86/HVM: improve local variable use in
 hvm_hap_nested_page_fault()
To: Jan Beulich ,
 "xen-devel@lists.xenproject.org" 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
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On 09/04/2025 2:17 pm, Jan Beulich wrote:
> First gfn can be set just once, rather than (conditionally) twice.

This wants a comma after First, or you're implying "the first gfn can
be..." which not the meaning you're trying to convey.  You also don't
really want one before "rather".

> And then gfn can be used in two function calls, rather than re-
> calculating the value there.
>
> Signed-off-by: Jan Beulich 

Acked-by: Andrew Cooper 

> ---
> I wasn't quite sure about continuing to use an open-coded shift.
> PFN_DOWN() could be used, or paddr_to_pfn(). Neither looks to be an
> overly good fit to translate a gaddr to a gfn, yet gaddr_to_gfn() can't
> be used quite nicely either as long as gfn isn't of type gfn_t.

I think it wants to stay like this here.


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Date: Wed, 9 Apr 2025 15:28:53 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein 
Subject: Re: [PATCH] CI: Update x86 tests from Linux 6.1.19 to 6.6.56
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Date: Wed, 9 Apr 2025 15:28:53 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein 
Subject: Re: [PATCH] CI: Update x86 tests from Linux 6.1.19 to 6.6.56

On Wed, Apr 09, 2025 at 02:05:05PM +0100, Andrew Cooper wrote:
> Linux 6.6.56 was already added to test-artifacts for the argo testing, and
> this removes one moving part while cleaning things up.
>=20
> Drop the associated export job, and dockerfile.

My hw12 runner series adds CONFIG_USB_RTL8152, there are also other
series that needs extending kernel config. Is there some better way of
handling such series than sending patches to two repositories? Maybe
test-artifacts.git scripts could pull some parts from xen.git? But the
committing order would still be weird (commit kernel change into
xen.git, rebuild test-artifacts, commit the rest to xen.git)...

> Signed-off-by: Andrew Cooper 
> ---
> CC: Anthony PERARD 
> CC: Stefano Stabellini 
> CC: Michal Orzel 
> CC: Doug Goldstein 
> CC: Marek Marczykowski-G=C3=B3recki 
>=20
> https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1760198654

This still waits in the queue for adl and kbl. But should be good, given
it worked also with 6.12.

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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To: "xen-devel@lists.xenproject.org" 
CC: Mykyta Poturai , Stefano Stabellini
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	, Michal Orzel , Volodymyr
 Babchuk 
Subject: [PATCH v3 0/4] Add support for R-Car Gen4 PCI host controller
Thread-Topic: [PATCH v3 0/4] Add support for R-Car Gen4 PCI host controller
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This series adds support for R-Car Gen4 PCI host controller.

To fully support the controller, the following changes were made:
- Generic mechanism to support PCI child buses is added.
- Private data for PCI host bridge and means to access it are added.

The series was tested as a part of the pci-passthrough patches[1] and
build-tested standalone with enabled HAS_PCI and HAS_VPCI.

[1] https://github.com/Deedone/xen/tree/pci_passthrough_wip

v2->v3:
* dropped patches related to ATU programming delay
* improved formatting

v1->v2:
* see individual patches

Oleksandr Andrushchenko (4):
  xen/arm: allow PCI host bridge to have private data
  xen/arm: make pci_host_common_probe return the bridge
  xen/arm: add support for PCI child bus
  xen/arm: add support for R-Car Gen4 PCI host controller

 xen/arch/arm/include/asm/pci.h      |  14 +-
 xen/arch/arm/pci/Makefile           |   2 +
 xen/arch/arm/pci/ecam.c             |  17 +-
 xen/arch/arm/pci/pci-access.c       |  37 ++-
 xen/arch/arm/pci/pci-designware.c   | 403 ++++++++++++++++++++++++++++
 xen/arch/arm/pci/pci-designware.h   | 102 +++++++
 xen/arch/arm/pci/pci-host-common.c  |  92 +++++--
 xen/arch/arm/pci/pci-host-generic.c |   2 +-
 xen/arch/arm/pci/pci-host-rcar4.c   | 103 +++++++
 xen/arch/arm/pci/pci-host-zynqmp.c  |   2 +-
 xen/arch/arm/vpci.c                 |  83 ++++--
 11 files changed, 807 insertions(+), 50 deletions(-)
 create mode 100644 xen/arch/arm/pci/pci-designware.c
 create mode 100644 xen/arch/arm/pci/pci-designware.h
 create mode 100644 xen/arch/arm/pci/pci-host-rcar4.c

--=20
2.34.1


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From: Mykyta Poturai 
To: "xen-devel@lists.xenproject.org" 
CC: Oleksandr Andrushchenko , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Michal Orzel ,
	Volodymyr Babchuk , Mykyta Poturai
	
Subject: [PATCH v3 2/4] xen/arm: make pci_host_common_probe return the bridge
Thread-Topic: [PATCH v3 2/4] xen/arm: make pci_host_common_probe return the
 bridge
Thread-Index: AQHbqVNqJOpNy64us0q429PoDyckxg==
Date: Wed, 9 Apr 2025 13:29:27 +0000
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From: Oleksandr Andrushchenko 

Some of the PCI host bridges require additional processing during the
probe phase. For that they need to access struct bridge of the probed
host, so return pointer to the new bridge from pci_host_common_probe.

Signed-off-by: Oleksandr Andrushchenko 
Signed-off-by: Mykyta Poturai 
---
v2->v3:
* no change

v1->v2:
* no change
---
 xen/arch/arm/include/asm/pci.h      |  5 +++--
 xen/arch/arm/pci/pci-host-common.c  | 10 +++++-----
 xen/arch/arm/pci/pci-host-generic.c |  2 +-
 xen/arch/arm/pci/pci-host-zynqmp.c  |  2 +-
 4 files changed, 10 insertions(+), 9 deletions(-)

diff --git a/xen/arch/arm/include/asm/pci.h b/xen/arch/arm/include/asm/pci.=
h
index a87672d834..3d2ca9b5b0 100644
--- a/xen/arch/arm/include/asm/pci.h
+++ b/xen/arch/arm/include/asm/pci.h
@@ -18,6 +18,7 @@
 #ifdef CONFIG_HAS_PCI
=20
 #include 
+#include 
=20
 #define pci_to_dev(pcidev) (&(pcidev)->arch.dev)
=20
@@ -95,8 +96,8 @@ struct pci_ecam_ops {
 /* Default ECAM ops */
 extern const struct pci_ecam_ops pci_generic_ecam_ops;
=20
-int pci_host_common_probe(struct dt_device_node *dev,
-                          const struct pci_ecam_ops *ops);
+struct pci_host_bridge *pci_host_common_probe(struct dt_device_node *dev,
+                                              const struct pci_ecam_ops *o=
ps);
 int pci_generic_config_read(struct pci_host_bridge *bridge, pci_sbdf_t sbd=
f,
                             uint32_t reg, uint32_t len, uint32_t *value);
 int pci_generic_config_write(struct pci_host_bridge *bridge, pci_sbdf_t sb=
df,
diff --git a/xen/arch/arm/pci/pci-host-common.c b/xen/arch/arm/pci/pci-host=
-common.c
index c0faf0f436..7ce9675551 100644
--- a/xen/arch/arm/pci/pci-host-common.c
+++ b/xen/arch/arm/pci/pci-host-common.c
@@ -208,8 +208,8 @@ static int pci_bus_find_domain_nr(struct dt_device_node=
 *dev)
     return domain;
 }
=20
-int pci_host_common_probe(struct dt_device_node *dev,
-                          const struct pci_ecam_ops *ops)
+struct pci_host_bridge *pci_host_common_probe(struct dt_device_node *dev,
+                                              const struct pci_ecam_ops *o=
ps)
 {
     struct pci_host_bridge *bridge;
     struct pci_config_window *cfg;
@@ -221,7 +221,7 @@ int pci_host_common_probe(struct dt_device_node *dev,
=20
     bridge =3D pci_alloc_host_bridge();
     if ( !bridge )
-        return -ENOMEM;
+        return ERR_PTR(-ENOMEM);
=20
     /* Parse and map our Configuration Space windows */
     cfg =3D gen_pci_init(dev, ops);
@@ -244,12 +244,12 @@ int pci_host_common_probe(struct dt_device_node *dev,
     bridge->segment =3D domain;
     pci_add_host_bridge(bridge);
=20
-    return 0;
+    return bridge;
=20
 err_exit:
     xfree(bridge);
=20
-    return err;
+    return ERR_PTR(err);
 }
=20
 /*
diff --git a/xen/arch/arm/pci/pci-host-generic.c b/xen/arch/arm/pci/pci-hos=
t-generic.c
index 46de6e43cc..a6ffbda174 100644
--- a/xen/arch/arm/pci/pci-host-generic.c
+++ b/xen/arch/arm/pci/pci-host-generic.c
@@ -29,7 +29,7 @@ static const struct dt_device_match __initconstrel gen_pc=
i_dt_match[] =3D
 static int __init pci_host_generic_probe(struct dt_device_node *dev,
                                          const void *data)
 {
-    return pci_host_common_probe(dev, &pci_generic_ecam_ops);
+    return PTR_RET(pci_host_common_probe(dev, &pci_generic_ecam_ops));
 }
=20
 DT_DEVICE_START(pci_gen, "PCI HOST GENERIC", DEVICE_PCI_HOSTBRIDGE)
diff --git a/xen/arch/arm/pci/pci-host-zynqmp.c b/xen/arch/arm/pci/pci-host=
-zynqmp.c
index 101edb8593..a38f2e019e 100644
--- a/xen/arch/arm/pci/pci-host-zynqmp.c
+++ b/xen/arch/arm/pci/pci-host-zynqmp.c
@@ -47,7 +47,7 @@ static const struct dt_device_match __initconstrel nwl_pc=
ie_dt_match[] =3D
 static int __init pci_host_generic_probe(struct dt_device_node *dev,
                                          const void *data)
 {
-    return pci_host_common_probe(dev, &nwl_pcie_ops);
+    return PTR_RET(pci_host_common_probe(dev, &nwl_pcie_ops));
 }
=20
 DT_DEVICE_START(pci_gen, "PCI HOST ZYNQMP", DEVICE_PCI_HOSTBRIDGE)
--=20
2.34.1


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From: Mykyta Poturai 
To: "xen-devel@lists.xenproject.org" 
CC: Oleksandr Andrushchenko , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Michal Orzel ,
	Volodymyr Babchuk , Mykyta Poturai
	
Subject: [PATCH v3 1/4] xen/arm: allow PCI host bridge to have private data
Thread-Topic: [PATCH v3 1/4] xen/arm: allow PCI host bridge to have private
 data
Thread-Index: AQHbqVNqGG2BsgJGTkebsT5cEBm3YA==
Date: Wed, 9 Apr 2025 13:29:27 +0000
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From: Oleksandr Andrushchenko 

Some of the PCI host bridges require private data. Add priv field
to struct pci_host_bridge, so such bridges may populate it with
their private data.

Signed-off-by: Oleksandr Andrushchenko 
Signed-off-by: Mykyta Poturai 
---
v2->v3:
* removed priv allocation from common code

v1->v2:
* no change
---
 xen/arch/arm/include/asm/pci.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/xen/arch/arm/include/asm/pci.h b/xen/arch/arm/include/asm/pci.=
h
index 7f77226c9b..a87672d834 100644
--- a/xen/arch/arm/include/asm/pci.h
+++ b/xen/arch/arm/include/asm/pci.h
@@ -66,6 +66,7 @@ struct pci_host_bridge {
     uint16_t segment;                /* Segment number */
     struct pci_config_window* cfg;   /* Pointer to the bridge config windo=
w */
     const struct pci_ops *ops;
+    void *priv;                      /* Private data of the bridge. */
 };
=20
 struct pci_ops {
--=20
2.34.1


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From: Mykyta Poturai 
To: "xen-devel@lists.xenproject.org" 
CC: Oleksandr Andrushchenko , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Michal Orzel ,
	Volodymyr Babchuk , Mykyta Poturai
	
Subject: [PATCH v3 3/4] xen/arm: add support for PCI child bus
Thread-Topic: [PATCH v3 3/4] xen/arm: add support for PCI child bus
Thread-Index: AQHbqVNqEyexvvIpgke1QVGEurkh9Q==
Date: Wed, 9 Apr 2025 13:29:27 +0000
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From: Oleksandr Andrushchenko 

PCI host bridges often have different ways to access the root and child
bus configuration spaces. One of the examples is Designware's host bridge
and its multiple clones [1].

Linux kernel implements this by instantiating a child bus when device
drivers provide not only the usual pci_ops to access ECAM space (this is
the case for the generic host bridge), but also means to access the child
bus which has a dedicated configuration space and own implementation for
accessing the bus, e.g. child_ops.

For Xen it is not feasible to fully implement PCI bus infrastructure as
Linux kernel does, but still child bus can be supported.

Add support for the PCI child bus which includes the following changes:
- introduce bus mapping functions depending on SBDF
- assign bus start and end for the child bus and re-configure the same for
  the parent (root) bus
- make pci_find_host_bridge be aware of multiple busses behind the same bri=
dge
- update pci_host_bridge_mappings, so it also doesn't map to guest the memo=
ry
  spaces belonging to the child bus
- make pci_host_common_probe accept one more pci_ops structure for the chil=
d bus
- install MMIO handlers for the child bus
- re-work vpci_mmio_{write|read} with parent and child approach in mind

[1] https://elixir.bootlin.com/linux/v5.15/source/drivers/pci/controller/dw=
c

Signed-off-by: Oleksandr Andrushchenko 
Signed-off-by: Mykyta Poturai 
---
v2->v3:
* no change

v1->v2:
* fixed compilation issues
---
 xen/arch/arm/include/asm/pci.h      | 12 +++-
 xen/arch/arm/pci/ecam.c             | 17 ++++--
 xen/arch/arm/pci/pci-access.c       | 37 +++++++++++--
 xen/arch/arm/pci/pci-host-common.c  | 86 +++++++++++++++++++++++------
 xen/arch/arm/pci/pci-host-generic.c |  2 +-
 xen/arch/arm/pci/pci-host-zynqmp.c  |  2 +-
 xen/arch/arm/vpci.c                 | 83 ++++++++++++++++++++++------
 7 files changed, 192 insertions(+), 47 deletions(-)

diff --git a/xen/arch/arm/include/asm/pci.h b/xen/arch/arm/include/asm/pci.=
h
index 3d2ca9b5b0..addec31791 100644
--- a/xen/arch/arm/include/asm/pci.h
+++ b/xen/arch/arm/include/asm/pci.h
@@ -67,6 +67,9 @@ struct pci_host_bridge {
     uint16_t segment;                /* Segment number */
     struct pci_config_window* cfg;   /* Pointer to the bridge config windo=
w */
     const struct pci_ops *ops;
+    /* Child bus */
+    struct pci_config_window *child_cfg;
+    const struct pci_ops *child_ops;
     void *priv;                      /* Private data of the bridge. */
 };
=20
@@ -96,14 +99,19 @@ struct pci_ecam_ops {
 /* Default ECAM ops */
 extern const struct pci_ecam_ops pci_generic_ecam_ops;
=20
-struct pci_host_bridge *pci_host_common_probe(struct dt_device_node *dev,
-                                              const struct pci_ecam_ops *o=
ps);
+struct pci_host_bridge *
+pci_host_common_probe(struct dt_device_node *dev,
+                      const struct pci_ecam_ops *ops,
+                      const struct pci_ecam_ops *child_ops);
 int pci_generic_config_read(struct pci_host_bridge *bridge, pci_sbdf_t sbd=
f,
                             uint32_t reg, uint32_t len, uint32_t *value);
 int pci_generic_config_write(struct pci_host_bridge *bridge, pci_sbdf_t sb=
df,
                              uint32_t reg, uint32_t len, uint32_t value);
 void __iomem *pci_ecam_map_bus(struct pci_host_bridge *bridge,
                                pci_sbdf_t sbdf, uint32_t where);
+void __iomem *pci_ecam_map_bus_generic(const struct pci_config_window *cfg=
,
+                                       const struct pci_ecam_ops *ops,
+                                       pci_sbdf_t sbdf, uint32_t where);
 bool pci_ecam_need_p2m_hwdom_mapping(struct domain *d,
                                      struct pci_host_bridge *bridge,
                                      uint64_t addr);
diff --git a/xen/arch/arm/pci/ecam.c b/xen/arch/arm/pci/ecam.c
index 3987f96b01..ad0b2c35f9 100644
--- a/xen/arch/arm/pci/ecam.c
+++ b/xen/arch/arm/pci/ecam.c
@@ -20,12 +20,10 @@
 /*
  * Function to implement the pci_ops->map_bus method.
  */
-void __iomem *pci_ecam_map_bus(struct pci_host_bridge *bridge,
-                               pci_sbdf_t sbdf, uint32_t where)
+void __iomem *pci_ecam_map_bus_generic(const struct pci_config_window *cfg=
,
+                                       const struct pci_ecam_ops *ops,
+                                       pci_sbdf_t sbdf, uint32_t where)
 {
-    const struct pci_config_window *cfg =3D bridge->cfg;
-    const struct pci_ecam_ops *ops =3D
-        container_of(bridge->ops, const struct pci_ecam_ops, pci_ops);
     unsigned int devfn_shift =3D ops->bus_shift - 8;
     void __iomem *base;
     unsigned int busn =3D sbdf.bus;
@@ -39,6 +37,15 @@ void __iomem *pci_ecam_map_bus(struct pci_host_bridge *b=
ridge,
     return base + (sbdf.devfn << devfn_shift) + where;
 }
=20
+void __iomem *pci_ecam_map_bus(struct pci_host_bridge *bridge, pci_sbdf_t =
sbdf,
+                               uint32_t where)
+{
+    const struct pci_ecam_ops *ops =3D
+        container_of(bridge->ops, const struct pci_ecam_ops, pci_ops);
+
+    return pci_ecam_map_bus_generic(bridge->cfg, ops, sbdf, where);
+}
+
 bool __init pci_ecam_need_p2m_hwdom_mapping(struct domain *d,
                                             struct pci_host_bridge *bridge=
,
                                             uint64_t addr)
diff --git a/xen/arch/arm/pci/pci-access.c b/xen/arch/arm/pci/pci-access.c
index 9f9aac43d7..cc4787f2b5 100644
--- a/xen/arch/arm/pci/pci-access.c
+++ b/xen/arch/arm/pci/pci-access.c
@@ -18,10 +18,31 @@
 #define INVALID_VALUE (~0U)
 #define PCI_ERR_VALUE(len) GENMASK(0, len * 8)
=20
+static const struct pci_ops *get_ops(struct pci_host_bridge *bridge,
+                                     pci_sbdf_t sbdf)
+{
+    if ( bridge->child_ops )
+    {
+        struct pci_config_window *cfg =3D bridge->child_cfg;
+
+        if ( (sbdf.bus >=3D cfg->busn_start) && (sbdf.bus <=3D cfg->busn_e=
nd) )
+            return bridge->child_ops;
+    }
+    return bridge->ops;
+}
+
+static void __iomem *map_bus(struct pci_host_bridge *bridge, pci_sbdf_t sb=
df,
+                             uint32_t reg)
+{
+    const struct pci_ops *ops =3D get_ops(bridge, sbdf);
+
+    return ops->map_bus(bridge, sbdf, reg);
+}
+
 int pci_generic_config_read(struct pci_host_bridge *bridge, pci_sbdf_t sbd=
f,
                             uint32_t reg, uint32_t len, uint32_t *value)
 {
-    void __iomem *addr =3D bridge->ops->map_bus(bridge, sbdf, reg);
+    void __iomem *addr =3D map_bus(bridge, sbdf, reg);
=20
     if ( !addr )
     {
@@ -50,7 +71,7 @@ int pci_generic_config_read(struct pci_host_bridge *bridg=
e, pci_sbdf_t sbdf,
 int pci_generic_config_write(struct pci_host_bridge *bridge, pci_sbdf_t sb=
df,
                              uint32_t reg, uint32_t len, uint32_t value)
 {
-    void __iomem *addr =3D bridge->ops->map_bus(bridge, sbdf, reg);
+    void __iomem *addr =3D map_bus(bridge, sbdf, reg);
=20
     if ( !addr )
         return -ENODEV;
@@ -78,14 +99,16 @@ static uint32_t pci_config_read(pci_sbdf_t sbdf, unsign=
ed int reg,
 {
     uint32_t val =3D PCI_ERR_VALUE(len);
     struct pci_host_bridge *bridge =3D pci_find_host_bridge(sbdf.seg, sbdf=
.bus);
+    const struct pci_ops *ops;
=20
     if ( unlikely(!bridge) )
         return val;
=20
-    if ( unlikely(!bridge->ops->read) )
+    ops =3D get_ops(bridge, sbdf);
+    if ( unlikely(!ops->read) )
         return val;
=20
-    bridge->ops->read(bridge, sbdf, reg, len, &val);
+    ops->read(bridge, sbdf, reg, len, &val);
=20
     return val;
 }
@@ -94,14 +117,16 @@ static void pci_config_write(pci_sbdf_t sbdf, unsigned=
 int reg,
                              unsigned int len, uint32_t val)
 {
     struct pci_host_bridge *bridge =3D pci_find_host_bridge(sbdf.seg, sbdf=
.bus);
+    const struct pci_ops *ops;
=20
     if ( unlikely(!bridge) )
         return;
=20
-    if ( unlikely(!bridge->ops->write) )
+    ops =3D get_ops(bridge, sbdf);
+    if ( unlikely(!ops->write) )
         return;
=20
-    bridge->ops->write(bridge, sbdf, reg, len, val);
+    ops->write(bridge, sbdf, reg, len, val);
 }
=20
 /*
diff --git a/xen/arch/arm/pci/pci-host-common.c b/xen/arch/arm/pci/pci-host=
-common.c
index 7ce9675551..2b058b5f5e 100644
--- a/xen/arch/arm/pci/pci-host-common.c
+++ b/xen/arch/arm/pci/pci-host-common.c
@@ -57,17 +57,12 @@ static void pci_ecam_free(struct pci_config_window *cfg=
)
     xfree(cfg);
 }
=20
-static struct pci_config_window * __init
-gen_pci_init(struct dt_device_node *dev, const struct pci_ecam_ops *ops)
+static void __init gen_pci_init_bus_range(struct dt_device_node *dev,
+                                          struct pci_host_bridge *bridge,
+                                          struct pci_config_window *cfg)
 {
-    int err, cfg_reg_idx;
     u32 bus_range[2];
-    paddr_t addr, size;
-    struct pci_config_window *cfg;
-
-    cfg =3D xzalloc(struct pci_config_window);
-    if ( !cfg )
-        return NULL;
+    int err;
=20
     err =3D dt_property_read_u32_array(dev, "bus-range", bus_range,
                                      ARRAY_SIZE(bus_range));
@@ -82,6 +77,36 @@ gen_pci_init(struct dt_device_node *dev, const struct pc=
i_ecam_ops *ops)
         if ( cfg->busn_end > cfg->busn_start + 0xff )
             cfg->busn_end =3D cfg->busn_start + 0xff;
     }
+}
+
+static void __init gen_pci_init_bus_range_child(struct dt_device_node *dev=
,
+                                                struct pci_host_bridge *br=
idge,
+                                                struct pci_config_window *=
cfg)
+{
+    cfg->busn_start =3D bridge->cfg->busn_start + 1;
+    cfg->busn_end =3D bridge->cfg->busn_end;
+    bridge->cfg->busn_end =3D bridge->cfg->busn_start;
+
+    printk(XENLOG_INFO "Root bus end updated: [bus %x-%x]\n",
+           bridge->cfg->busn_start, bridge->cfg->busn_end);
+}
+
+static struct pci_config_window *__init
+gen_pci_init(struct dt_device_node *dev, struct pci_host_bridge *bridge,
+             const struct pci_ecam_ops *ops,
+             void (*init_bus_range)(struct dt_device_node *dev,
+                                    struct pci_host_bridge *bridge,
+                                    struct pci_config_window *cfg))
+{
+    int err, cfg_reg_idx;
+    paddr_t addr, size;
+    struct pci_config_window *cfg;
+
+    cfg =3D xzalloc(struct pci_config_window);
+    if ( !cfg )
+        return NULL;
+
+    init_bus_range(dev, bridge, cfg);
=20
     if ( ops->cfg_reg_index )
     {
@@ -208,8 +233,10 @@ static int pci_bus_find_domain_nr(struct dt_device_nod=
e *dev)
     return domain;
 }
=20
-struct pci_host_bridge *pci_host_common_probe(struct dt_device_node *dev,
-                                              const struct pci_ecam_ops *o=
ps)
+struct pci_host_bridge *
+pci_host_common_probe(struct dt_device_node *dev,
+                      const struct pci_ecam_ops *ops,
+                      const struct pci_ecam_ops *child_ops)
 {
     struct pci_host_bridge *bridge;
     struct pci_config_window *cfg;
@@ -224,7 +251,7 @@ struct pci_host_bridge *pci_host_common_probe(struct dt=
_device_node *dev,
         return ERR_PTR(-ENOMEM);
=20
     /* Parse and map our Configuration Space windows */
-    cfg =3D gen_pci_init(dev, ops);
+    cfg =3D gen_pci_init(dev, bridge, ops, gen_pci_init_bus_range);
     if ( !cfg )
     {
         err =3D -ENOMEM;
@@ -242,10 +269,29 @@ struct pci_host_bridge *pci_host_common_probe(struct =
dt_device_node *dev,
         BUG();
     }
     bridge->segment =3D domain;
+
+    if ( child_ops )
+    {
+        /* Parse and map child's Configuration Space windows */
+        cfg =3D gen_pci_init(dev, bridge, child_ops,
+                           gen_pci_init_bus_range_child);
+        if ( !cfg )
+        {
+            err =3D -ENOMEM;
+            goto err_child;
+        }
+
+        bridge->child_cfg =3D cfg;
+        bridge->child_ops =3D &child_ops->pci_ops;
+    }
+
     pci_add_host_bridge(bridge);
=20
     return bridge;
=20
+err_child:
+    xfree(bridge->cfg);
+
 err_exit:
     xfree(bridge);
=20
@@ -280,9 +326,12 @@ struct pci_host_bridge *pci_find_host_bridge(uint16_t =
segment, uint8_t bus)
     {
         if ( bridge->segment !=3D segment )
             continue;
-        if ( (bus < bridge->cfg->busn_start) || (bus > bridge->cfg->busn_e=
nd) )
-            continue;
-        return bridge;
+        if ( bridge->child_cfg && (bus >=3D bridge->child_cfg->busn_start)=
 &&
+             (bus <=3D bridge->child_cfg->busn_end) )
+            return bridge;
+        if ( (bus >=3D bridge->cfg->busn_start) &&
+             (bus <=3D bridge->cfg->busn_end) )
+            return bridge;
     }
=20
     return NULL;
@@ -348,6 +397,7 @@ int __init pci_host_bridge_mappings(struct domain *d)
     {
         const struct dt_device_node *dev =3D bridge->dt_node;
         unsigned int i;
+        bool need_mapping;
=20
         for ( i =3D 0; i < dt_number_of_address(dev); i++ )
         {
@@ -363,7 +413,11 @@ int __init pci_host_bridge_mappings(struct domain *d)
                 return err;
             }
=20
-            if ( bridge->ops->need_p2m_hwdom_mapping(d, bridge, addr) )
+            need_mapping =3D bridge->ops->need_p2m_hwdom_mapping(d, bridge=
, addr);
+            if ( need_mapping && bridge->child_ops )
+                need_mapping =3D
+                    bridge->child_ops->need_p2m_hwdom_mapping(d, bridge, a=
ddr);
+            if ( need_mapping )
             {
                 err =3D map_range_to_domain(dev, addr, size, &mr_data);
                 if ( err )
diff --git a/xen/arch/arm/pci/pci-host-generic.c b/xen/arch/arm/pci/pci-hos=
t-generic.c
index a6ffbda174..47cf144831 100644
--- a/xen/arch/arm/pci/pci-host-generic.c
+++ b/xen/arch/arm/pci/pci-host-generic.c
@@ -29,7 +29,7 @@ static const struct dt_device_match __initconstrel gen_pc=
i_dt_match[] =3D
 static int __init pci_host_generic_probe(struct dt_device_node *dev,
                                          const void *data)
 {
-    return PTR_RET(pci_host_common_probe(dev, &pci_generic_ecam_ops));
+    return PTR_RET(pci_host_common_probe(dev, &pci_generic_ecam_ops, NULL)=
);
 }
=20
 DT_DEVICE_START(pci_gen, "PCI HOST GENERIC", DEVICE_PCI_HOSTBRIDGE)
diff --git a/xen/arch/arm/pci/pci-host-zynqmp.c b/xen/arch/arm/pci/pci-host=
-zynqmp.c
index a38f2e019e..75d1235aaf 100644
--- a/xen/arch/arm/pci/pci-host-zynqmp.c
+++ b/xen/arch/arm/pci/pci-host-zynqmp.c
@@ -47,7 +47,7 @@ static const struct dt_device_match __initconstrel nwl_pc=
ie_dt_match[] =3D
 static int __init pci_host_generic_probe(struct dt_device_node *dev,
                                          const void *data)
 {
-    return PTR_RET(pci_host_common_probe(dev, &nwl_pcie_ops));
+    return PTR_RET(pci_host_common_probe(dev, &nwl_pcie_ops, NULL));
 }
=20
 DT_DEVICE_START(pci_gen, "PCI HOST ZYNQMP", DEVICE_PCI_HOSTBRIDGE)
diff --git a/xen/arch/arm/vpci.c b/xen/arch/arm/vpci.c
index b63a356bb4..468aee1db7 100644
--- a/xen/arch/arm/vpci.c
+++ b/xen/arch/arm/vpci.c
@@ -8,15 +8,17 @@
 #include 
=20
 static pci_sbdf_t vpci_sbdf_from_gpa(const struct pci_host_bridge *bridge,
-                                     paddr_t gpa)
+                                     paddr_t gpa, bool use_root)
 {
     pci_sbdf_t sbdf;
=20
     if ( bridge )
     {
-        sbdf.sbdf =3D VPCI_ECAM_BDF(gpa - bridge->cfg->phys_addr);
+        const struct pci_config_window *cfg =3D use_root ? bridge->cfg
+                                                       : bridge->child_cfg=
;
+        sbdf.sbdf =3D VPCI_ECAM_BDF(gpa - cfg->phys_addr);
         sbdf.seg =3D bridge->segment;
-        sbdf.bus +=3D bridge->cfg->busn_start;
+        sbdf.bus +=3D cfg->busn_start;
     }
     else
         sbdf.sbdf =3D VPCI_ECAM_BDF(gpa - GUEST_VPCI_ECAM_BASE);
@@ -24,11 +26,9 @@ static pci_sbdf_t vpci_sbdf_from_gpa(const struct pci_ho=
st_bridge *bridge,
     return sbdf;
 }
=20
-static int vpci_mmio_read(struct vcpu *v, mmio_info_t *info,
-                          register_t *r, void *p)
+static int vpci_mmio_read(struct vcpu *v, mmio_info_t *info, register_t *r=
,
+                          pci_sbdf_t sbdf)
 {
-    struct pci_host_bridge *bridge =3D p;
-    pci_sbdf_t sbdf =3D vpci_sbdf_from_gpa(bridge, info->gpa);
     const unsigned int access_size =3D (1U << info->dabt.size) * 8;
     const register_t invalid =3D GENMASK_ULL(access_size - 1, 0);
     /* data is needed to prevent a pointer cast on 32bit */
@@ -46,31 +46,78 @@ static int vpci_mmio_read(struct vcpu *v, mmio_info_t *=
info,
     return 0;
 }
=20
-static int vpci_mmio_write(struct vcpu *v, mmio_info_t *info,
-                           register_t r, void *p)
+static int vpci_mmio_read_root(struct vcpu *v, mmio_info_t *info, register=
_t *r,
+                               void *p)
+{
+    struct pci_host_bridge *bridge =3D p;
+    pci_sbdf_t sbdf =3D vpci_sbdf_from_gpa(bridge, info->gpa, true);
+
+    return vpci_mmio_read(v, info, r, sbdf);
+}
+
+static int vpci_mmio_read_child(struct vcpu *v, mmio_info_t *info,
+                                register_t *r, void *p)
 {
     struct pci_host_bridge *bridge =3D p;
-    pci_sbdf_t sbdf =3D vpci_sbdf_from_gpa(bridge, info->gpa);
+    pci_sbdf_t sbdf =3D vpci_sbdf_from_gpa(bridge, info->gpa, false);
+
+    return vpci_mmio_read(v, info, r, sbdf);
+}
=20
+static int vpci_mmio_write(struct vcpu *v, mmio_info_t *info, register_t r=
,
+                           pci_sbdf_t sbdf)
+{
     return vpci_ecam_write(sbdf, ECAM_REG_OFFSET(info->gpa),
                            1U << info->dabt.size, r);
 }
=20
+static int vpci_mmio_write_root(struct vcpu *v, mmio_info_t *info, registe=
r_t r,
+                                void *p)
+{
+    struct pci_host_bridge *bridge =3D p;
+    pci_sbdf_t sbdf =3D vpci_sbdf_from_gpa(bridge, info->gpa, true);
+
+    return vpci_mmio_write(v, info, r, sbdf);
+}
+
+static int vpci_mmio_write_child(struct vcpu *v, mmio_info_t *info,
+                                 register_t r, void *p)
+{
+    struct pci_host_bridge *bridge =3D p;
+    pci_sbdf_t sbdf =3D vpci_sbdf_from_gpa(bridge, info->gpa, false);
+
+    return vpci_mmio_write(v, info, r, sbdf);
+}
+
 static const struct mmio_handler_ops vpci_mmio_handler =3D {
-    .read  =3D vpci_mmio_read,
-    .write =3D vpci_mmio_write,
+    .read =3D vpci_mmio_read_root,
+    .write =3D vpci_mmio_write_root,
+};
+
+static const struct mmio_handler_ops vpci_mmio_handler_child =3D {
+    .read =3D vpci_mmio_read_child,
+    .write =3D vpci_mmio_write_child,
 };
=20
 static int vpci_setup_mmio_handler_cb(struct domain *d,
                                       struct pci_host_bridge *bridge)
 {
     struct pci_config_window *cfg =3D bridge->cfg;
+    int count =3D 1;
=20
     register_mmio_handler(d, &vpci_mmio_handler,
                           cfg->phys_addr, cfg->size, bridge);
=20
-    /* We have registered a single MMIO handler. */
-    return 1;
+    if ( bridge->child_ops )
+    {
+        struct pci_config_window *cfg =3D bridge->child_cfg;
+
+        register_mmio_handler(d, &vpci_mmio_handler_child, cfg->phys_addr,
+                              cfg->size, bridge);
+        count++;
+    }
+
+    return count;
 }
=20
 int domain_vpci_init(struct domain *d)
@@ -101,8 +148,12 @@ int domain_vpci_init(struct domain *d)
 static int vpci_get_num_handlers_cb(struct domain *d,
                                     struct pci_host_bridge *bridge)
 {
-    /* Each bridge has a single MMIO handler for the configuration space. =
*/
-    return 1;
+    int count =3D 1;
+
+    if ( bridge->child_cfg )
+        count++;
+
+    return count;
 }
=20
 unsigned int domain_vpci_get_num_mmio_handlers(struct domain *d)
--=20
2.34.1


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From: Mykyta Poturai 
To: "xen-devel@lists.xenproject.org" 
CC: Oleksandr Andrushchenko , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Michal Orzel ,
	Volodymyr Babchuk , Mykyta Poturai
	
Subject: [PATCH v3 4/4] xen/arm: add support for R-Car Gen4 PCI host
 controller
Thread-Topic: [PATCH v3 4/4] xen/arm: add support for R-Car Gen4 PCI host
 controller
Thread-Index: AQHbqVNr1oqgbs5VOEWX9UPIk7Sjtw==
Date: Wed, 9 Apr 2025 13:29:28 +0000
Message-ID:
 <43f32fb392bfcb22b36281655242eead3fbbfa67.1744203405.git.mykyta_poturai@epam.com>
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From: Oleksandr Andrushchenko 

Add support for Renesas R-Car Gen4 PCI host controller, specifically
targeting the S4 and V4H SoCs. The implementation includes configuration
read/write operations for both root and child buses. For accessing the
child bus, iATU is used for address translation.

Code common to all DesignWare PCI host controllers is located in a
separate file to allow for easy reuse in other DesignWare-based PCI
host controllers.

Signed-off-by: Oleksandr Andrushchenko 
Signed-off-by: Mykyta Poturai 
---
v2->v3:
* add priv allocation to dw_pcie_host_probe

v1->v2:
* move designware code in a separate file
---
 xen/arch/arm/pci/Makefile         |   2 +
 xen/arch/arm/pci/pci-designware.c | 403 ++++++++++++++++++++++++++++++
 xen/arch/arm/pci/pci-designware.h | 102 ++++++++
 xen/arch/arm/pci/pci-host-rcar4.c | 103 ++++++++
 4 files changed, 610 insertions(+)
 create mode 100644 xen/arch/arm/pci/pci-designware.c
 create mode 100644 xen/arch/arm/pci/pci-designware.h
 create mode 100644 xen/arch/arm/pci/pci-host-rcar4.c

diff --git a/xen/arch/arm/pci/Makefile b/xen/arch/arm/pci/Makefile
index 1d045ade01..ca6135e282 100644
--- a/xen/arch/arm/pci/Makefile
+++ b/xen/arch/arm/pci/Makefile
@@ -4,3 +4,5 @@ obj-y +=3D pci-host-generic.o
 obj-y +=3D pci-host-common.o
 obj-y +=3D ecam.o
 obj-y +=3D pci-host-zynqmp.o
+obj-y +=3D pci-designware.o
+obj-y +=3D pci-host-rcar4.o
diff --git a/xen/arch/arm/pci/pci-designware.c b/xen/arch/arm/pci/pci-desig=
nware.c
new file mode 100644
index 0000000000..dcbd07ced3
--- /dev/null
+++ b/xen/arch/arm/pci/pci-designware.c
@@ -0,0 +1,403 @@
+/*
+ * Based on Linux drivers/pci/controller/pci-host-common.c
+ * Based on Linux drivers/pci/controller/pci-host-generic.c
+ * Based on xen/arch/arm/pci/pci-host-generic.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ */
+
+#include 
+#include 
+
+#include "pci-designware.h"
+/**
+ * upper_32_bits - return bits 32-63 of a number
+ * @n: the number we're accessing
+ *
+ * A basic shift-right of a 64- or 32-bit quantity.  Use this to suppress
+ * the "right shift count >=3D width of type" warning when that quantity i=
s
+ * 32-bits.
+ */
+#define upper_32_bits(n) ((uint32_t)(((n) >> 16) >> 16))
+
+/**
+ * lower_32_bits - return bits 0-31 of a number
+ * @n: the number we're accessing
+ */
+#define lower_32_bits(n) ((uint32_t)((n) & 0xffffffff))
+
+static int dw_pcie_read(void __iomem *addr, int size, uint32_t *val)
+{
+    if ( !IS_ALIGNED((uintptr_t)addr, size) )
+    {
+        *val =3D 0;
+        return PCIBIOS_BAD_REGISTER_NUMBER;
+    }
+
+    if ( size =3D=3D 4 )
+        *val =3D readl(addr);
+    else if ( size =3D=3D 2 )
+        *val =3D readw(addr);
+    else if ( size =3D=3D 1 )
+        *val =3D readb(addr);
+    else
+    {
+        *val =3D 0;
+        return PCIBIOS_BAD_REGISTER_NUMBER;
+    }
+
+    return PCIBIOS_SUCCESSFUL;
+}
+
+static int dw_pcie_write(void __iomem *addr, int size, uint32_t val)
+{
+    if ( !IS_ALIGNED((uintptr_t)addr, size) )
+        return PCIBIOS_BAD_REGISTER_NUMBER;
+
+    if ( size =3D=3D 4 )
+        writel(val, addr);
+    else if ( size =3D=3D 2 )
+        writew(val, addr);
+    else if ( size =3D=3D 1 )
+        writeb(val, addr);
+    else
+        return PCIBIOS_BAD_REGISTER_NUMBER;
+
+    return PCIBIOS_SUCCESSFUL;
+}
+
+static uint32_t dw_pcie_read_dbi(struct pci_host_bridge *bridge, uint32_t =
reg,
+                                 size_t size)
+{
+    void __iomem *addr =3D bridge->cfg->win + reg;
+    uint32_t val;
+
+    dw_pcie_read(addr, size, &val);
+    return val;
+}
+
+static void dw_pcie_write_dbi(struct pci_host_bridge *bridge, uint32_t reg=
,
+                              size_t size, uint32_t val)
+{
+    void __iomem *addr =3D bridge->cfg->win + reg;
+
+    dw_pcie_write(addr, size, val);
+}
+
+static uint32_t dw_pcie_readl_dbi(struct pci_host_bridge *bridge, uint32_t=
 reg)
+{
+    return dw_pcie_read_dbi(bridge, reg, sizeof(uint32_t));
+}
+
+static void dw_pcie_writel_dbi(struct pci_host_bridge *pci, uint32_t reg,
+                               uint32_t val)
+{
+    dw_pcie_write_dbi(pci, reg, sizeof(uint32_t), val);
+}
+
+static void dw_pcie_read_iatu_unroll_enabled(struct pci_host_bridge *bridg=
e)
+{
+    struct dw_pcie_priv *priv =3D bridge->priv;
+    uint32_t val;
+
+    val =3D dw_pcie_readl_dbi(bridge, PCIE_ATU_VIEWPORT);
+    if ( val =3D=3D 0xffffffff )
+        priv->iatu_unroll_enabled =3D true;
+
+    printk(XENLOG_DEBUG "%s iATU unroll: %sabled\n",
+           dt_node_full_name(bridge->dt_node),
+           priv->iatu_unroll_enabled ? "en" : "dis");
+}
+
+static uint32_t dw_pcie_readl_atu(struct pci_host_bridge *pci, uint32_t re=
g)
+{
+    struct dw_pcie_priv *priv =3D pci->priv;
+    int ret;
+    uint32_t val;
+
+    ret =3D dw_pcie_read(priv->atu_base + reg, 4, &val);
+    if ( ret )
+        printk(XENLOG_ERR "Read ATU address failed\n");
+
+    return val;
+}
+
+static void dw_pcie_writel_atu(struct pci_host_bridge *pci, uint32_t reg,
+                               uint32_t val)
+{
+    struct dw_pcie_priv *priv =3D pci->priv;
+    int ret;
+
+    ret =3D dw_pcie_write(priv->atu_base + reg, 4, val);
+    if ( ret )
+        printk(XENLOG_ERR "Write ATU address failed\n");
+}
+
+static uint32_t dw_pcie_readl_ob_unroll(struct pci_host_bridge *pci,
+                                        uint32_t index, uint32_t reg)
+{
+    uint32_t offset =3D PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(index);
+
+    return dw_pcie_readl_atu(pci, offset + reg);
+}
+
+static void dw_pcie_writel_ob_unroll(struct pci_host_bridge *pci,
+                                     uint32_t index, uint32_t reg, uint32_=
t val)
+{
+    uint32_t offset =3D PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(index);
+
+    dw_pcie_writel_atu(pci, offset + reg, val);
+}
+
+static uint32_t dw_pcie_enable_ecrc(uint32_t val)
+{
+    ASSERT_UNREACHABLE();
+    return 0;
+}
+
+static void dw_pcie_prog_outbound_atu_unroll(struct pci_host_bridge *pci,
+                                             uint8_t func_no, int index,
+                                             int type, uint64_t cpu_addr,
+                                             uint64_t pci_addr, uint64_t s=
ize)
+{
+    struct dw_pcie_priv *priv =3D pci->priv;
+    uint32_t retries, val;
+    uint64_t limit_addr =3D cpu_addr + size - 1;
+
+    dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_LOWER_BASE,
+                             lower_32_bits(cpu_addr));
+    dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_UPPER_BASE,
+                             upper_32_bits(cpu_addr));
+    dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_LOWER_LIMIT,
+                             lower_32_bits(limit_addr));
+    dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_UPPER_LIMIT,
+                             upper_32_bits(limit_addr));
+    dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_LOWER_TARGET,
+                             lower_32_bits(pci_addr));
+    dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_UPPER_TARGET,
+                             upper_32_bits(pci_addr));
+    val =3D type | PCIE_ATU_FUNC_NUM(func_no);
+    val =3D upper_32_bits(size - 1) ? val | PCIE_ATU_INCREASE_REGION_SIZE =
: val;
+    if ( priv->version =3D=3D 0x490A )
+        val =3D dw_pcie_enable_ecrc(val);
+    dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_REGION_CTRL1, val);
+    dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_REGION_CTRL2,
+                             PCIE_ATU_ENABLE);
+
+    /*
+     * Make sure ATU enable takes effect before any subsequent config
+     * and I/O accesses.
+     */
+    for ( retries =3D 0; retries < LINK_WAIT_MAX_IATU_RETRIES; retries++ )
+    {
+        val =3D dw_pcie_readl_ob_unroll(pci, index, PCIE_ATU_UNR_REGION_CT=
RL2);
+        if ( val & PCIE_ATU_ENABLE )
+            return;
+
+        mdelay(LINK_WAIT_IATU);
+    }
+    printk(XENLOG_ERR "Outbound iATU is not being enabled\n");
+}
+
+static void __dw_pcie_prog_outbound_atu(struct pci_host_bridge *pci,
+                                        uint8_t func_no, int index, int ty=
pe,
+                                        uint64_t cpu_addr, uint64_t pci_ad=
dr,
+                                        uint64_t size)
+{
+    struct dw_pcie_priv *priv =3D pci->priv;
+    uint32_t retries, val;
+
+    if ( priv->iatu_unroll_enabled )
+    {
+        dw_pcie_prog_outbound_atu_unroll(pci, func_no, index, type, cpu_ad=
dr,
+                                         pci_addr, size);
+        return;
+    }
+
+    dw_pcie_writel_dbi(pci, PCIE_ATU_VIEWPORT,
+                       PCIE_ATU_REGION_OUTBOUND | index);
+    dw_pcie_writel_dbi(pci, PCIE_ATU_LOWER_BASE, lower_32_bits(cpu_addr));
+    dw_pcie_writel_dbi(pci, PCIE_ATU_UPPER_BASE, upper_32_bits(cpu_addr));
+    dw_pcie_writel_dbi(pci, PCIE_ATU_LIMIT, lower_32_bits(cpu_addr + size =
- 1));
+    if ( priv->version >=3D 0x460A )
+        dw_pcie_writel_dbi(pci, PCIE_ATU_UPPER_LIMIT,
+                           upper_32_bits(cpu_addr + size - 1));
+    dw_pcie_writel_dbi(pci, PCIE_ATU_LOWER_TARGET, lower_32_bits(pci_addr)=
);
+    dw_pcie_writel_dbi(pci, PCIE_ATU_UPPER_TARGET, upper_32_bits(pci_addr)=
);
+    val =3D type | PCIE_ATU_FUNC_NUM(func_no);
+    val =3D ((upper_32_bits(size - 1)) && (priv->version >=3D 0x460A))
+              ? val | PCIE_ATU_INCREASE_REGION_SIZE
+              : val;
+    if ( priv->version =3D=3D 0x490A )
+        val =3D dw_pcie_enable_ecrc(val);
+    dw_pcie_writel_dbi(pci, PCIE_ATU_CR1, val);
+    dw_pcie_writel_dbi(pci, PCIE_ATU_CR2, PCIE_ATU_ENABLE);
+
+    /*
+     * Make sure ATU enable takes effect before any subsequent config
+     * and I/O accesses.
+     */
+    for ( retries =3D 0; retries < LINK_WAIT_MAX_IATU_RETRIES; retries++ )
+    {
+        val =3D dw_pcie_readl_dbi(pci, PCIE_ATU_CR2);
+        if ( val & PCIE_ATU_ENABLE )
+            return;
+
+        mdelay(LINK_WAIT_IATU);
+    }
+    printk(XENLOG_ERR "Outbound iATU is not being enabled\n");
+}
+
+static void dw_pcie_prog_outbound_atu(struct pci_host_bridge *pci, int ind=
ex,
+                                      int type, uint64_t cpu_addr,
+                                      uint64_t pci_addr, uint64_t size)
+{
+    __dw_pcie_prog_outbound_atu(pci, 0, index, type, cpu_addr, pci_addr, s=
ize);
+}
+
+void dw_pcie_set_version(struct pci_host_bridge *bridge, unsigned int vers=
ion)
+{
+    struct dw_pcie_priv *priv =3D bridge->priv;
+
+    priv->version =3D version;
+}
+
+void __iomem *dw_pcie_child_map_bus(struct pci_host_bridge *bridge,
+                                    pci_sbdf_t sbdf, uint32_t where)
+{
+    uint32_t busdev;
+
+    busdev =3D PCIE_ATU_BUS(sbdf.bus) | PCIE_ATU_DEV(PCI_SLOT(sbdf.devfn))=
 |
+             PCIE_ATU_FUNC(PCI_FUNC(sbdf.devfn));
+
+    /* FIXME: Parent is the root bus, so use PCIE_ATU_TYPE_CFG0. */
+    dw_pcie_prog_outbound_atu(bridge, PCIE_ATU_REGION_INDEX1,
+                              PCIE_ATU_TYPE_CFG0, bridge->child_cfg->phys_=
addr,
+                              busdev, bridge->child_cfg->size);
+
+    return bridge->child_cfg->win + where;
+}
+
+int dw_pcie_child_config_read(struct pci_host_bridge *bridge, pci_sbdf_t s=
bdf,
+                              uint32_t reg, uint32_t len, uint32_t *value)
+{
+    struct dw_pcie_priv *priv =3D bridge->priv;
+    int ret;
+
+    /*
+     * FIXME: we cannot read iATU settings at the early initialization
+     * (probe) as the host's HW is not yet initialized at that phase.
+     * This read operation is the very first thing Domain-0 will do
+     * during its initialization, so take this opportunity and read
+     * iATU setting now.
+     */
+    if ( unlikely(!priv->iatu_unroll_initilized) )
+    {
+        dw_pcie_read_iatu_unroll_enabled(bridge);
+        priv->iatu_unroll_initilized =3D true;
+    }
+
+    ret =3D pci_generic_config_read(bridge, sbdf, reg, len, value);
+    if ( !ret && (priv->num_viewport <=3D 2) )
+        dw_pcie_prog_outbound_atu(bridge, PCIE_ATU_REGION_INDEX1,
+                                  PCIE_ATU_TYPE_IO,
+                                  bridge->child_cfg->phys_addr, 0,
+                                  bridge->child_cfg->size);
+
+    return ret;
+}
+
+int dw_pcie_child_config_write(struct pci_host_bridge *bridge, pci_sbdf_t =
sbdf,
+                               uint32_t reg, uint32_t len, uint32_t value)
+{
+    struct dw_pcie_priv *priv =3D bridge->priv;
+    int ret;
+
+    ret =3D pci_generic_config_write(bridge, sbdf, reg, len, value);
+    if ( !ret && (priv->num_viewport <=3D 2) )
+        dw_pcie_prog_outbound_atu(bridge, PCIE_ATU_REGION_INDEX1,
+                                  PCIE_ATU_TYPE_IO,
+                                  bridge->child_cfg->phys_addr, 0,
+                                  bridge->child_cfg->size);
+    return ret;
+}
+
+bool __init dw_pcie_child_need_p2m_hwdom_mapping(struct domain *d,
+                                                 struct pci_host_bridge *b=
ridge,
+                                                 uint64_t addr)
+{
+    struct pci_config_window *cfg =3D bridge->child_cfg;
+
+    /*
+     * We do not want ECAM address space to be mapped in Domain-0's p2m,
+     * so we can trap access to it.
+     */
+    return cfg->phys_addr !=3D addr;
+}
+
+struct pci_host_bridge *__init
+dw_pcie_host_probe(struct dt_device_node *dev, const void *data,
+                   const struct pci_ecam_ops *ops,
+                   const struct pci_ecam_ops *child_ops)
+{
+    struct pci_host_bridge *bridge;
+    struct dw_pcie_priv *priv;
+
+    paddr_t atu_phys_addr;
+    paddr_t atu_size;
+    int atu_idx, ret;
+
+    bridge =3D pci_host_common_probe(dev, ops, child_ops);
+    if ( IS_ERR(bridge) )
+        return bridge;
+
+    priv =3D xzalloc_bytes(sizeof(struct dw_pcie_priv));
+    if ( !priv )
+        return ERR_PTR(-ENOMEM);
+
+    bridge->priv =3D priv;
+
+    atu_idx =3D dt_property_match_string(dev, "reg-names", "atu");
+    if ( atu_idx < 0 )
+    {
+        printk(XENLOG_ERR "Cannot find \"atu\" range index in device tree\=
n");
+        return ERR_PTR(atu_idx);
+    }
+    ret =3D dt_device_get_address(dev, atu_idx, &atu_phys_addr, &atu_size)=
;
+    if ( ret )
+    {
+        printk(XENLOG_ERR "Cannot find \"atu\" range in device tree\n");
+        return ERR_PTR(ret);
+    }
+    printk("iATU at [mem 0x%" PRIpaddr "-0x%" PRIpaddr "]\n", atu_phys_add=
r,
+           atu_phys_addr + atu_size - 1);
+    priv->atu_base =3D ioremap_nocache(atu_phys_addr, atu_size);
+    if ( !priv->atu_base )
+    {
+        printk(XENLOG_ERR "iATU ioremap failed\n");
+        return ERR_PTR(ENXIO);
+    }
+
+    if ( !dt_property_read_u32(dev, "num-viewport", &priv->num_viewport) )
+        priv->num_viewport =3D 2;
+
+    /*
+     * FIXME: we cannot read iATU unroll enable now as the host bridge's
+     * HW is not yet initialized by Domain-0: leave it for later.
+     */
+
+    printk(XENLOG_INFO "%s number of view ports: %d\n", dt_node_full_name(=
dev),
+           priv->num_viewport);
+
+    return bridge;
+}
diff --git a/xen/arch/arm/pci/pci-designware.h b/xen/arch/arm/pci/pci-desig=
nware.h
new file mode 100644
index 0000000000..a15ba9a329
--- /dev/null
+++ b/xen/arch/arm/pci/pci-designware.h
@@ -0,0 +1,102 @@
+/*
+ * Based on Linux drivers/pci/controller/pci-host-common.c
+ * Based on Linux drivers/pci/controller/pci-host-generic.c
+ * Based on xen/arch/arm/pci/pci-host-generic.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ */
+
+#include 
+#include 
+
+#ifndef __PCI_DESIGNWARE_H__
+#define __PCI_DESIGNWARE_H__
+
+#define PCIBIOS_SUCCESSFUL              0x00
+#define PCIBIOS_BAD_REGISTER_NUMBER     0x87
+
+#define PCIE_ATU_VIEWPORT               0x900
+#define PCIE_ATU_REGION_OUTBOUND        0
+#define PCIE_ATU_CR1                    0x904
+#define PCIE_ATU_INCREASE_REGION_SIZE   BIT(13, UL)
+#define PCIE_ATU_CR2                    0x908
+#define PCIE_ATU_ENABLE                 BIT(31, UL)
+#define PCIE_ATU_LOWER_BASE             0x90C
+#define PCIE_ATU_UPPER_BASE             0x910
+#define PCIE_ATU_LIMIT                  0x914
+#define PCIE_ATU_LOWER_TARGET           0x918
+#define PCIE_ATU_UPPER_TARGET           0x91C
+#define PCIE_ATU_UPPER_LIMIT            0x924
+
+#define PCIE_ATU_REGION_INDEX1  0x1
+#define PCIE_ATU_TYPE_IO        0x2
+#define PCIE_ATU_TYPE_CFG0      0x4
+
+#define FIELD_PREP(_mask, _val) \
+    (((typeof(_mask))(_val) << (ffs64(_mask) - 1)) & (_mask))
+
+#define PCIE_ATU_BUS(x)         FIELD_PREP(GENMASK(31, 24), x)
+#define PCIE_ATU_DEV(x)         FIELD_PREP(GENMASK(23, 19), x)
+#define PCIE_ATU_FUNC(x)        FIELD_PREP(GENMASK(18, 16), x)
+
+/* Register address builder */
+#define PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(region) \
+    ((region) << 9)
+
+/*
+ * iATU Unroll-specific register definitions
+ * From 4.80 core version the address translation will be made by unroll
+ */
+#define PCIE_ATU_UNR_REGION_CTRL1       0x00
+#define PCIE_ATU_UNR_REGION_CTRL2       0x04
+#define PCIE_ATU_UNR_LOWER_BASE         0x08
+#define PCIE_ATU_UNR_UPPER_BASE         0x0C
+#define PCIE_ATU_UNR_LOWER_LIMIT        0x10
+#define PCIE_ATU_UNR_LOWER_TARGET       0x14
+#define PCIE_ATU_UNR_UPPER_TARGET       0x18
+#define PCIE_ATU_UNR_UPPER_LIMIT        0x20
+
+#define PCIE_ATU_FUNC_NUM(pf)           ((pf) << 20)
+
+/* Parameters for the waiting for iATU enabled routine */
+#define LINK_WAIT_MAX_IATU_RETRIES      5
+#define LINK_WAIT_IATU                  9
+
+struct dw_pcie_priv {
+    uint32_t num_viewport;
+    bool iatu_unroll_initilized;
+    bool iatu_unroll_enabled;
+    void __iomem *atu_base;
+    unsigned int version;
+};
+
+void dw_pcie_set_version(struct pci_host_bridge *bridge, unsigned int vers=
ion);
+
+void __iomem *dw_pcie_child_map_bus(struct pci_host_bridge *bridge,
+                                    pci_sbdf_t sbdf, uint32_t where);
+
+int dw_pcie_child_config_read(struct pci_host_bridge *bridge, pci_sbdf_t s=
bdf,
+                              uint32_t reg, uint32_t len, uint32_t *value)=
;
+
+int dw_pcie_child_config_write(struct pci_host_bridge *bridge, pci_sbdf_t =
sbdf,
+                               uint32_t reg, uint32_t len, uint32_t value)=
;
+
+bool __init dw_pcie_child_need_p2m_hwdom_mapping(struct domain *d,
+                                                 struct pci_host_bridge *b=
ridge,
+                                                 uint64_t addr);
+
+struct pci_host_bridge *__init
+dw_pcie_host_probe(struct dt_device_node *dev, const void *data,
+                   const struct pci_ecam_ops *ops,
+                   const struct pci_ecam_ops *child_ops);
+#endif /* __PCI_DESIGNWARE_H__ */
diff --git a/xen/arch/arm/pci/pci-host-rcar4.c b/xen/arch/arm/pci/pci-host-=
rcar4.c
new file mode 100644
index 0000000000..cae1b4254d
--- /dev/null
+++ b/xen/arch/arm/pci/pci-host-rcar4.c
@@ -0,0 +1,103 @@
+/*
+ * Based on Linux drivers/pci/controller/pci-host-common.c
+ * Based on Linux drivers/pci/controller/pci-host-generic.c
+ * Based on xen/arch/arm/pci/pci-host-generic.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ */
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "pci-designware.h"
+
+#define RCAR4_DWC_VERSION       0x520A
+
+/*
+ * PCI host bridges often have different ways to access the root and child
+ * bus config spaces:
+ *   "dbi"   : the aperture where root port's own configuration registers
+ *             are available.
+ *   "config": child's configuration space
+ *   "atu"   : iATU registers for DWC version 4.80 or later
+ */
+static int __init rcar4_cfg_reg_index(struct dt_device_node *np)
+{
+    return dt_property_match_string(np, "reg-names", "dbi");
+}
+
+static int __init rcar4_child_cfg_reg_index(struct dt_device_node *np)
+{
+    return dt_property_match_string(np, "reg-names", "config");
+}
+
+/* ECAM ops */
+const struct pci_ecam_ops rcar4_pcie_ops =3D {
+    .bus_shift  =3D 20,
+    .cfg_reg_index =3D rcar4_cfg_reg_index,
+    .pci_ops    =3D {
+        .map_bus                =3D pci_ecam_map_bus,
+        .read                   =3D pci_generic_config_read,
+        .write                  =3D pci_generic_config_write,
+        .need_p2m_hwdom_mapping =3D pci_ecam_need_p2m_hwdom_mapping,
+    }
+};
+
+const struct pci_ecam_ops rcar4_pcie_child_ops =3D {
+    .bus_shift  =3D 20,
+    .cfg_reg_index =3D rcar4_child_cfg_reg_index,
+    .pci_ops    =3D {
+        .map_bus                =3D dw_pcie_child_map_bus,
+        .read                   =3D dw_pcie_child_config_read,
+        .write                  =3D dw_pcie_child_config_write,
+        .need_p2m_hwdom_mapping =3D dw_pcie_child_need_p2m_hwdom_mapping,
+    }
+};
+
+static const struct dt_device_match __initconstrel rcar4_pcie_dt_match[] =
=3D {
+    { .compatible =3D "renesas,r8a779f0-pcie" },
+    { .compatible =3D "renesas,r8a779g0-pcie" },
+    {},
+};
+
+static int __init pci_host_generic_probe(struct dt_device_node *dev,
+                                         const void *data)
+{
+    struct pci_host_bridge *bridge;
+
+    bridge =3D dw_pcie_host_probe(dev, data, &rcar4_pcie_ops,
+                                &rcar4_pcie_child_ops);
+
+    dw_pcie_set_version(bridge, RCAR4_DWC_VERSION);
+
+    return 0;
+}
+
+DT_DEVICE_START(pci_gen, "PCI HOST R-CAR GEN4", DEVICE_PCI_HOSTBRIDGE)
+.dt_match =3D rcar4_pcie_dt_match,
+.init =3D pci_host_generic_probe,
+DT_DEVICE_END
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * tab-width: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
--=20
2.34.1


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Date: Wed, 9 Apr 2025 15:33:49 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: Marek Marczykowski ,
	Andrew Cooper ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH 2/2] x86/hvm: fix write emulation of RO ranges
Message-ID: 
References: <20250408093156.83277-1-roger.pau@citrix.com>
 <20250408093156.83277-3-roger.pau@citrix.com>
 <16c73cae-2ac0-4811-97d3-b25c95ed5abc@suse.com>
 
 
 
 <2df78a5d-2f9f-4866-81cc-03ae09c76d50@suse.com>
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On Wed, Apr 09, 2025 at 02:59:45PM +0200, Jan Beulich wrote:
> On 09.04.2025 12:39, Roger Pau Monné wrote:
> > On Wed, Apr 09, 2025 at 12:00:16PM +0200, Jan Beulich wrote:
> >> On 09.04.2025 11:07, Roger Pau Monné wrote:
> >>> On Tue, Apr 08, 2025 at 03:57:17PM +0200, Jan Beulich wrote:
> >>>> On 08.04.2025 11:31, Roger Pau Monne wrote:
> >>>>> When running on AMD hardware in HVM mode the guest linear address (GLA)
> >>>>> will not be provided to hvm_emulate_one_mmio(), and instead is
> >>>>> unconditionally set of ~0.  As a consequence mmio_ro_emulated_write() will
> >>>>> always report an error, as the fault GLA generated by the emulation of the
> >>>>> access won't be ~0.
> >>>>
> >>>> Which means subpage_mmio_write_accept() is flawed, too, on AMD (or more
> >>>> generally whenever .gla_valid isn't set).
> >>>
> >>> Oh, yes, good catch.  I didn't notice that one.  We should move all
> >>> those checks to use a paddr rather than a gla.
> >>
> >> Really that function could just be passed the offset into the page.
> >>
> >>>>> Fix this by only checking for the fault GLA in mmio_ro_emulated_write()
> >>>>> when the guest is PV.
> >>>>
> >>>> This narrows checking too much, imo. For VT-x we could continue to do so,
> >>>> provided we pass e.g. npfec down into hvm_emulate_one_mmio(), i.e. make
> >>>> the gla_valid flag visible there.
> >>>
> >>> I don't think we should rely on the gla at all in
> >>> mmio_ro_emulated_write(), and instead just use the physical address.
> >>
> >> But you can't validate a physical address against a CR2 value. And I view
> >> this validation as meaningful, to guard (best effort, but still) against
> >> e.g. insn re-writing under our feet.
> > 
> > But we have the mfn in mmio_ro_ctxt, and could possibly use that to
> > validate?  I could expand the context to include the offset also, so
> > that we could fully validate it.
> 
> How would you use the MFN to validate against the VA in CR2?

I would use hvmemul_virtual_to_linear() and hvm_translate_get_page()
to get the underlying mfn of the linear address.  But maybe there's a
part of this that I'm missing, I've certainly haven't tried to
implement any of it.

Thanks, Roger.


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Cc: Xen-devel ,
 Anthony PERARD ,
 Stefano Stabellini ,
 Michal Orzel , Doug Goldstein 
References: <20250409130505.2011604-1-andrew.cooper3@citrix.com>
 
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On 09/04/2025 2:28 pm, Marek Marczykowski-Górecki wrote:
> On Wed, Apr 09, 2025 at 02:05:05PM +0100, Andrew Cooper wrote:
>> Linux 6.6.56 was already added to test-artifacts for the argo testing, and
>> this removes one moving part while cleaning things up.
>>
>> Drop the associated export job, and dockerfile.
> My hw12 runner series adds CONFIG_USB_RTL8152, there are also other
> series that needs extending kernel config. Is there some better way of
> handling such series than sending patches to two repositories? Maybe
> test-artifacts.git scripts could pull some parts from xen.git? But the
> committing order would still be weird (commit kernel change into
> xen.git, rebuild test-artifacts, commit the rest to xen.git)...

Yes, I'm aware.  I'm trying to get us down to 1 way of doing artefacts,
rather than continuing the hybrid scheme.  I have a *lot* of changes to
test-artefacts to post too.

When that's done, updating the config (or another aspect of the
artefact) should just be a change to test-artefacts, with no change to Xen.

Updating the versions will require a patch to test-artefacts first, then
one to Xen to start using it.

>
>> Signed-off-by: Andrew Cooper 
>> ---
>> CC: Anthony PERARD 
>> CC: Stefano Stabellini 
>> CC: Michal Orzel 
>> CC: Doug Goldstein 
>> CC: Marek Marczykowski-Górecki 
>>
>> https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1760198654
> This still waits in the queue for adl and kbl. But should be good, given
> it worked also with 6.12.
>

It worked in local smoke tests too.

~Andrew


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To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
Cc: Marek Marczykowski ,
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On 09.04.2025 15:33, Roger Pau Monné wrote:
> On Wed, Apr 09, 2025 at 02:59:45PM +0200, Jan Beulich wrote:
>> On 09.04.2025 12:39, Roger Pau Monné wrote:
>>> On Wed, Apr 09, 2025 at 12:00:16PM +0200, Jan Beulich wrote:
>>>> On 09.04.2025 11:07, Roger Pau Monné wrote:
>>>>> On Tue, Apr 08, 2025 at 03:57:17PM +0200, Jan Beulich wrote:
>>>>>> On 08.04.2025 11:31, Roger Pau Monne wrote:
>>>>>>> When running on AMD hardware in HVM mode the guest linear address (GLA)
>>>>>>> will not be provided to hvm_emulate_one_mmio(), and instead is
>>>>>>> unconditionally set of ~0.  As a consequence mmio_ro_emulated_write() will
>>>>>>> always report an error, as the fault GLA generated by the emulation of the
>>>>>>> access won't be ~0.
>>>>>>
>>>>>> Which means subpage_mmio_write_accept() is flawed, too, on AMD (or more
>>>>>> generally whenever .gla_valid isn't set).
>>>>>
>>>>> Oh, yes, good catch.  I didn't notice that one.  We should move all
>>>>> those checks to use a paddr rather than a gla.
>>>>
>>>> Really that function could just be passed the offset into the page.
>>>>
>>>>>>> Fix this by only checking for the fault GLA in mmio_ro_emulated_write()
>>>>>>> when the guest is PV.
>>>>>>
>>>>>> This narrows checking too much, imo. For VT-x we could continue to do so,
>>>>>> provided we pass e.g. npfec down into hvm_emulate_one_mmio(), i.e. make
>>>>>> the gla_valid flag visible there.
>>>>>
>>>>> I don't think we should rely on the gla at all in
>>>>> mmio_ro_emulated_write(), and instead just use the physical address.
>>>>
>>>> But you can't validate a physical address against a CR2 value. And I view
>>>> this validation as meaningful, to guard (best effort, but still) against
>>>> e.g. insn re-writing under our feet.
>>>
>>> But we have the mfn in mmio_ro_ctxt, and could possibly use that to
>>> validate?  I could expand the context to include the offset also, so
>>> that we could fully validate it.
>>
>> How would you use the MFN to validate against the VA in CR2?
> 
> I would use hvmemul_virtual_to_linear()

If you mean to use the CR2 as input, you wouldn't need this. I said VA in
my earlier reply, yes, but strictly speaking that's a linear address.

> and hvm_translate_get_page()
> to get the underlying mfn of the linear address.  But maybe there's a
> part of this that I'm missing, I've certainly haven't tried to
> implement any of it.

Hmm, I see. I didn't think of doing it this way round. There's certainly
at least one caveat with this approach: Multiple linear addresses can all
map to the same GFN and hence MFN. Checking against the original linear
address (when available) doesn't have such an issue.

Jan


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Date: Wed, 9 Apr 2025 16:00:23 +0200
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Subject: Re: [PATCH v3 03/16] x86/boot: add cmdline to struct boot_domain
To: Alejandro Vallejo 
Cc: "Daniel P. Smith" ,
 Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini ,
 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 xen-devel@lists.xenproject.org
References: <20250408160802.49870-1-agarciav@amd.com>
 <20250408160802.49870-4-agarciav@amd.com>
 
 
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From: Jan Beulich 
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On 09.04.2025 13:11, Alejandro Vallejo wrote:
> On Wed Apr 9, 2025 at 7:48 AM BST, Jan Beulich wrote:
>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>> --- a/xen/arch/x86/hvm/dom0_build.c
>>> +++ b/xen/arch/x86/hvm/dom0_build.c
>>> @@ -653,7 +653,6 @@ static int __init pvh_load_kernel(
>>>      void *image_start = image_base + image->headroom;
>>>      unsigned long image_len = image->size;
>>>      unsigned long initrd_len = initrd ? initrd->size : 0;
>>> -    const char *cmdline = image->cmdline_pa ? __va(image->cmdline_pa) : NULL;
>>>      const char *initrd_cmdline = NULL;
>>>      struct elf_binary elf;
>>>      struct elf_dom_parms parms;
>>> @@ -736,8 +735,8 @@ static int __init pvh_load_kernel(
>>>              initrd = NULL;
>>>      }
>>>  
>>> -    if ( cmdline )
>>> -        extra_space += elf_round_up(&elf, strlen(cmdline) + 1);
>>> +    if ( bd->cmdline )
>>> +        extra_space += elf_round_up(&elf, strlen(bd->cmdline) + 1);
>>>  
>>>      last_addr = find_memory(d, &elf, extra_space);
>>>      if ( last_addr == INVALID_PADDR )
>>> @@ -778,9 +777,10 @@ static int __init pvh_load_kernel(
>>>      /* Free temporary buffers. */
>>>      free_boot_modules();
>>>  
>>> -    if ( cmdline != NULL )
>>> +    if ( bd->cmdline )
>>>      {
>>> -        rc = hvm_copy_to_guest_phys(last_addr, cmdline, strlen(cmdline) + 1, v);
>>> +        rc = hvm_copy_to_guest_phys(last_addr, bd->cmdline,
>>> +                                    strlen(bd->cmdline) + 1, v);
>>>          if ( rc )
>>>          {
>>>              printk("Unable to copy guest command line\n");
>>> @@ -791,7 +791,7 @@ static int __init pvh_load_kernel(
>>>           * Round up to 32/64 bits (depending on the guest kernel bitness) so
>>>           * the modlist/start_info is aligned.
>>>           */
>>> -        last_addr += elf_round_up(&elf, strlen(cmdline) + 1);
>>> +        last_addr += elf_round_up(&elf, strlen(bd->cmdline) + 1);
>>>      }
>>>      if ( initrd != NULL )
>>>      {
>>
>> Perhaps better introduce a local variable cmdline_len? That would allow the first
>> if() to go away (but of course not its body).
> 
> I'd agree if the function body was smaller, but it has 16 locals
> already. It's already quite hard to know what's going on, so I'd rather
> not make the situation worse.

You wouldn't: You'd replace one local var by another.

>>> --- a/xen/arch/x86/setup.c
>>> +++ b/xen/arch/x86/setup.c
>>> @@ -978,10 +978,30 @@ static unsigned int __init copy_bios_e820(struct e820entry *map, unsigned int li
>>>      return n;
>>>  }
>>>  
>>> -static struct domain *__init create_dom0(struct boot_info *bi)
>>> +static size_t __init domain_cmdline_size(
>>> +    struct boot_info *bi, struct boot_domain *bd)
>>
>> const for both? And perhaps s/domain/dom0/ in the function name?
>>
>>>  {
>>> -    static char __initdata cmdline[MAX_GUEST_CMDLINE];
>>> +    size_t s = bi->kextra ? strlen(bi->kextra) : 0;
>>> +
>>> +    s += bd->kernel->cmdline_pa ? strlen(__va(bd->kernel->cmdline_pa)) : 0;
>>>  
>>> +    if ( s == 0 )
>>> +        return s;
>>
>> While this retains prior behavior, that prior behavior was certainly odd (and
>> pretty likely not meant to be like that).
> 
> What part of it? How would you propose it to behave? Do you mean that if
> no cmdline is passed some ought to be allocated in case we want to
> override it?

"noapic" and "acpi=" want appending (if so intended) irrespective of there
being a non-empty command line already.

> Either way, such a functional change is better suited for a different
> patch that does just that, plus properly handling the acpi adjustments
> for PVH dom0.

Maybe. It's always odd to see issues live on when changes are made in their
area. For backportability, yes, the fix may want to be separate (and first).

Jan


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Date: Wed, 9 Apr 2025 16:01:30 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: Marek Marczykowski ,
	Andrew Cooper ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH 2/2] x86/hvm: fix write emulation of RO ranges
Message-ID: 
References: <20250408093156.83277-1-roger.pau@citrix.com>
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On Wed, Apr 09, 2025 at 03:50:13PM +0200, Jan Beulich wrote:
> On 09.04.2025 15:33, Roger Pau Monné wrote:
> > On Wed, Apr 09, 2025 at 02:59:45PM +0200, Jan Beulich wrote:
> >> On 09.04.2025 12:39, Roger Pau Monné wrote:
> >>> On Wed, Apr 09, 2025 at 12:00:16PM +0200, Jan Beulich wrote:
> >>>> On 09.04.2025 11:07, Roger Pau Monné wrote:
> >>>>> On Tue, Apr 08, 2025 at 03:57:17PM +0200, Jan Beulich wrote:
> >>>>>> On 08.04.2025 11:31, Roger Pau Monne wrote:
> >>>>>>> When running on AMD hardware in HVM mode the guest linear address (GLA)
> >>>>>>> will not be provided to hvm_emulate_one_mmio(), and instead is
> >>>>>>> unconditionally set of ~0.  As a consequence mmio_ro_emulated_write() will
> >>>>>>> always report an error, as the fault GLA generated by the emulation of the
> >>>>>>> access won't be ~0.
> >>>>>>
> >>>>>> Which means subpage_mmio_write_accept() is flawed, too, on AMD (or more
> >>>>>> generally whenever .gla_valid isn't set).
> >>>>>
> >>>>> Oh, yes, good catch.  I didn't notice that one.  We should move all
> >>>>> those checks to use a paddr rather than a gla.
> >>>>
> >>>> Really that function could just be passed the offset into the page.
> >>>>
> >>>>>>> Fix this by only checking for the fault GLA in mmio_ro_emulated_write()
> >>>>>>> when the guest is PV.
> >>>>>>
> >>>>>> This narrows checking too much, imo. For VT-x we could continue to do so,
> >>>>>> provided we pass e.g. npfec down into hvm_emulate_one_mmio(), i.e. make
> >>>>>> the gla_valid flag visible there.
> >>>>>
> >>>>> I don't think we should rely on the gla at all in
> >>>>> mmio_ro_emulated_write(), and instead just use the physical address.
> >>>>
> >>>> But you can't validate a physical address against a CR2 value. And I view
> >>>> this validation as meaningful, to guard (best effort, but still) against
> >>>> e.g. insn re-writing under our feet.
> >>>
> >>> But we have the mfn in mmio_ro_ctxt, and could possibly use that to
> >>> validate?  I could expand the context to include the offset also, so
> >>> that we could fully validate it.
> >>
> >> How would you use the MFN to validate against the VA in CR2?
> > 
> > I would use hvmemul_virtual_to_linear()
> 
> If you mean to use the CR2 as input, you wouldn't need this. I said VA in
> my earlier reply, yes, but strictly speaking that's a linear address.

I was thinking about using the segment and offset parameters of the
mmio_ro_emulated_write() call.

> > and hvm_translate_get_page()
> > to get the underlying mfn of the linear address.  But maybe there's a
> > part of this that I'm missing, I've certainly haven't tried to
> > implement any of it.
> 
> Hmm, I see. I didn't think of doing it this way round. There's certainly
> at least one caveat with this approach: Multiple linear addresses can all
> map to the same GFN and hence MFN. Checking against the original linear
> address (when available) doesn't have such an issue.

I see... Yet for AMD that address is not uniformly available as part
of the vmexit information?  As I understand the checks done in
mmio_ro_emulated_write() are to ensure correctness, but carrying the
access even when the %cr2 check fail wouldn't cause issues to Xen
itself?

Thanks, Roger.


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Date: Wed, 9 Apr 2025 16:08:47 +0200
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Subject: Re: [PATCH 2/2] x86/hvm: fix write emulation of RO ranges
To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
Cc: Marek Marczykowski ,
 Andrew Cooper , xen-devel@lists.xenproject.org
References: <20250408093156.83277-1-roger.pau@citrix.com>
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On 09.04.2025 16:01, Roger Pau Monné wrote:
> On Wed, Apr 09, 2025 at 03:50:13PM +0200, Jan Beulich wrote:
>> On 09.04.2025 15:33, Roger Pau Monné wrote:
>>> On Wed, Apr 09, 2025 at 02:59:45PM +0200, Jan Beulich wrote:
>>>> On 09.04.2025 12:39, Roger Pau Monné wrote:
>>>>> On Wed, Apr 09, 2025 at 12:00:16PM +0200, Jan Beulich wrote:
>>>>>> On 09.04.2025 11:07, Roger Pau Monné wrote:
>>>>>>> On Tue, Apr 08, 2025 at 03:57:17PM +0200, Jan Beulich wrote:
>>>>>>>> On 08.04.2025 11:31, Roger Pau Monne wrote:
>>>>>>>>> When running on AMD hardware in HVM mode the guest linear address (GLA)
>>>>>>>>> will not be provided to hvm_emulate_one_mmio(), and instead is
>>>>>>>>> unconditionally set of ~0.  As a consequence mmio_ro_emulated_write() will
>>>>>>>>> always report an error, as the fault GLA generated by the emulation of the
>>>>>>>>> access won't be ~0.
>>>>>>>>
>>>>>>>> Which means subpage_mmio_write_accept() is flawed, too, on AMD (or more
>>>>>>>> generally whenever .gla_valid isn't set).
>>>>>>>
>>>>>>> Oh, yes, good catch.  I didn't notice that one.  We should move all
>>>>>>> those checks to use a paddr rather than a gla.
>>>>>>
>>>>>> Really that function could just be passed the offset into the page.
>>>>>>
>>>>>>>>> Fix this by only checking for the fault GLA in mmio_ro_emulated_write()
>>>>>>>>> when the guest is PV.
>>>>>>>>
>>>>>>>> This narrows checking too much, imo. For VT-x we could continue to do so,
>>>>>>>> provided we pass e.g. npfec down into hvm_emulate_one_mmio(), i.e. make
>>>>>>>> the gla_valid flag visible there.
>>>>>>>
>>>>>>> I don't think we should rely on the gla at all in
>>>>>>> mmio_ro_emulated_write(), and instead just use the physical address.
>>>>>>
>>>>>> But you can't validate a physical address against a CR2 value. And I view
>>>>>> this validation as meaningful, to guard (best effort, but still) against
>>>>>> e.g. insn re-writing under our feet.
>>>>>
>>>>> But we have the mfn in mmio_ro_ctxt, and could possibly use that to
>>>>> validate?  I could expand the context to include the offset also, so
>>>>> that we could fully validate it.
>>>>
>>>> How would you use the MFN to validate against the VA in CR2?
>>>
>>> I would use hvmemul_virtual_to_linear()
>>
>> If you mean to use the CR2 as input, you wouldn't need this. I said VA in
>> my earlier reply, yes, but strictly speaking that's a linear address.
> 
> I was thinking about using the segment and offset parameters of the
> mmio_ro_emulated_write() call.
> 
>>> and hvm_translate_get_page()
>>> to get the underlying mfn of the linear address.  But maybe there's a
>>> part of this that I'm missing, I've certainly haven't tried to
>>> implement any of it.
>>
>> Hmm, I see. I didn't think of doing it this way round. There's certainly
>> at least one caveat with this approach: Multiple linear addresses can all
>> map to the same GFN and hence MFN. Checking against the original linear
>> address (when available) doesn't have such an issue.
> 
> I see... Yet for AMD that address is not uniformly available as part
> of the vmexit information?

Even stronger, I thought: It's uniformly not available.

>  As I understand the checks done in
> mmio_ro_emulated_write() are to ensure correctness, but carrying the
> access even when the %cr2 check fail wouldn't cause issues to Xen
> itself?

Well, "wouldn't" is too strong for my taste, "shouldn't" would fit. The
checking is there to avoid guests playing games. Whether that prevents
merely in-guest just-bugs or actual XSAs we can't know until we find a
case where the game playing might make us do something wrong. I expect
it's unlikely for Xen itself to be affected. But an in-guest privilege
escalation would already be bad enough.

So why don't we do the linear address check as we do today (provided a
linear address is available), and only use the alternative approach when
no linear address is available?

Jan


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Subject: Re: [PATCH v3 03/16] x86/boot: add cmdline to struct boot_domain
To: Alejandro Vallejo 
Cc: "Daniel P. Smith" ,
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 Stefano Stabellini ,
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 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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References: <20250408160802.49870-1-agarciav@amd.com>
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On 09.04.2025 13:28, Alejandro Vallejo wrote:
> On Wed Apr 9, 2025 at 12:11 PM BST, Alejandro Vallejo wrote:
>> On Wed Apr 9, 2025 at 7:48 AM BST, Jan Beulich wrote:
>>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>>> --- a/xen/arch/x86/setup.c
>>>> +++ b/xen/arch/x86/setup.c
>>>> @@ -978,10 +978,30 @@ static unsigned int __init copy_bios_e820(struct e820entry *map, unsigned int li
>>>>      return n;
>>>>  }
>>>>  
>>>> -static struct domain *__init create_dom0(struct boot_info *bi)
>>>> +static size_t __init domain_cmdline_size(
>>>> +    struct boot_info *bi, struct boot_domain *bd)
>>>
>>> const for both? And perhaps s/domain/dom0/ in the function name?
> 
> (missed this one)
> 
> Sure to the const pointers. But as the hyperlaunch effort progresses the
> point is to turn all this into a more generic domain builders rather
> than having dom0-specific stuff. Changing the name like that here to
> adjust it in a few patches down the line doesn't seem worth the effort.

Oh, if the function is going to fine further uses, that's likely okay.
("likely" because we've seen too many abandoned series, where we then
ended up with pieces that were never gaining their intended final
purpose.)

>>> While this tidies the local variable, what about bd->cmdline? As it stands this
>>> gives the impression that you're freeing a pointer here which may still be used
>>> through passing bd elsewhere.
>>
>> That ought to have been bd->cmdline indeed.
>>
> 
> Actually, it can't be. It's a "const char *", so XFREE() chokes on it.
> I'll turn it into
> 
>     XFREE(cmdline);
>     bd->cmdline = NULL;
> 
> instead.

At which point it can be xfree() again, seeing that the function ends
right afterwards?

Jan


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Subject: Re: [PATCH v2 1/3] kasan: Avoid sleepable page allocation from atomic
 context
To: Alexander Gordeev ,
 Andrew Morton 
Cc: Hugh Dickins , Nicholas Piggin ,
 Guenter Roeck , Juergen Gross ,
 Jeremy Fitzhardinge , linux-kernel@vger.kernel.org,
 linux-mm@kvack.org, kasan-dev@googlegroups.com, sparclinux@vger.kernel.org,
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On 4/8/25 6:07 PM, Alexander Gordeev wrote:
> apply_to_page_range() enters lazy MMU mode and then invokes
> kasan_populate_vmalloc_pte() callback on each page table walk
> iteration. The lazy MMU mode may only be entered only under
> protection of the page table lock. However, the callback can
> go into sleep when trying to allocate a single page.
> 
> Change __get_free_page() allocation mode from GFP_KERNEL to
> GFP_ATOMIC to avoid scheduling out while in atomic context.
> 
> Cc: stable@vger.kernel.org
> Fixes: 3c5c3cfb9ef4 ("kasan: support backing vmalloc space with real shadow memory")
> Signed-off-by: Alexander Gordeev 
> ---
>  mm/kasan/shadow.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/mm/kasan/shadow.c b/mm/kasan/shadow.c
> index 88d1c9dcb507..edfa77959474 100644
> --- a/mm/kasan/shadow.c
> +++ b/mm/kasan/shadow.c
> @@ -301,7 +301,7 @@ static int kasan_populate_vmalloc_pte(pte_t *ptep, unsigned long addr,
>  	if (likely(!pte_none(ptep_get(ptep))))
>  		return 0;
>  
> -	page = __get_free_page(GFP_KERNEL);
> +	page = __get_free_page(GFP_ATOMIC);
>  	if (!page)
>  		return -ENOMEM;
>  

I think a better way to fix this would be moving out allocation from atomic context. Allocate page prior
to apply_to_page_range() call and pass it down to kasan_populate_vmalloc_pte().

Whenever kasan_populate_vmalloc_pte() will require additional page we could bail out with -EAGAIN,
and allocate another one.


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Date: Wed, 9 Apr 2025 16:25:54 +0200
From: Alexander Gordeev 
To: Andrey Ryabinin 
Cc: Andrew Morton , Hugh Dickins ,
        Nicholas Piggin ,
        Guenter Roeck , Juergen Gross ,
        Jeremy Fitzhardinge , linux-kernel@vger.kernel.org,
        linux-mm@kvack.org, kasan-dev@googlegroups.com,
        sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org,
        linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org,
        stable@vger.kernel.org
Subject: Re: [PATCH v2 1/3] kasan: Avoid sleepable page allocation from
 atomic context
Message-ID: 
References: 
 <2d9f4ac4528701b59d511a379a60107fa608ad30.1744128123.git.agordeev@linux.ibm.com>
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On Wed, Apr 09, 2025 at 04:10:58PM +0200, Andrey Ryabinin wrote:

Hi Andrey,

> > @@ -301,7 +301,7 @@ static int kasan_populate_vmalloc_pte(pte_t *ptep, unsigned long addr,
> >  	if (likely(!pte_none(ptep_get(ptep))))
> >  		return 0;
> >  
> > -	page = __get_free_page(GFP_KERNEL);
> > +	page = __get_free_page(GFP_ATOMIC);
> >  	if (!page)
> >  		return -ENOMEM;
> >  
> 
> I think a better way to fix this would be moving out allocation from atomic context. Allocate page prior
> to apply_to_page_range() call and pass it down to kasan_populate_vmalloc_pte().

I think the page address could be passed as the parameter to kasan_populate_vmalloc_pte().

> Whenever kasan_populate_vmalloc_pte() will require additional page we could bail out with -EAGAIN,
> and allocate another one.

When would it be needed? kasan_populate_vmalloc_pte() handles just one page.

Thanks!


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Date: Wed, 9 Apr 2025 16:27:40 +0200
From: Marek Marczykowski 
To: Jan Beulich 
Cc: Roger Pau Monne ,
	Andrew Cooper ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH 2/2] x86/hvm: fix write emulation of RO ranges
Message-ID: 
References: <20250408093156.83277-1-roger.pau@citrix.com>
 <20250408093156.83277-3-roger.pau@citrix.com>
 <16c73cae-2ac0-4811-97d3-b25c95ed5abc@suse.com>
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--Atdwa1+445GMBMc4
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Date: Wed, 9 Apr 2025 16:27:40 +0200
From: Marek Marczykowski 
To: Jan Beulich 
Cc: Roger Pau Monne ,
	Andrew Cooper ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH 2/2] x86/hvm: fix write emulation of RO ranges

On Tue, Apr 08, 2025 at 03:57:17PM +0200, Jan Beulich wrote:
> On 08.04.2025 11:31, Roger Pau Monne wrote:
> > When running on AMD hardware in HVM mode the guest linear address (GLA)
> > will not be provided to hvm_emulate_one_mmio(), and instead is
> > unconditionally set of ~0.  As a consequence mmio_ro_emulated_write() w=
ill
> > always report an error, as the fault GLA generated by the emulation of =
the
> > access won't be ~0.
>=20
> Which means subpage_mmio_write_accept() is flawed, too, on AMD (or more
> generally whenever .gla_valid isn't set).

That may explain issues I see when using XHCI console on AMD (I can
crash the whole thing using sequence of driver binding/unbinding in
dom0). That's actually the hw12 runner in the other series, but tests
that are included in gitlab do not trigger the issue (fortunately?). But
also, it may be a different issue, as it affects PV dom0 too...

Anyway, I can probably test a patch if subpage_mmio_write_accept() works
as intended (I'll need to check if that path is exercised on AMD too as
it depends on xhci caps layout - it was definitely used on Intel).

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Date: Wed, 9 Apr 2025 16:56:29 +0200
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Subject: Re: [PATCH v2 1/3] kasan: Avoid sleepable page allocation from atomic
 context
To: Alexander Gordeev 
Cc: Andrew Morton , Hugh Dickins
 , Nicholas Piggin ,
 Guenter Roeck , Juergen Gross ,
 Jeremy Fitzhardinge , linux-kernel@vger.kernel.org,
 linux-mm@kvack.org, kasan-dev@googlegroups.com, sparclinux@vger.kernel.org,
 xen-devel@lists.xenproject.org, linuxppc-dev@lists.ozlabs.org,
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References: 
 <2d9f4ac4528701b59d511a379a60107fa608ad30.1744128123.git.agordeev@linux.ibm.com>
 <3e245617-81a5-4ea3-843f-b86261cf8599@gmail.com>
 
Content-Language: en-US
From: Andrey Ryabinin 
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On 4/9/25 4:25 PM, Alexander Gordeev wrote:
> On Wed, Apr 09, 2025 at 04:10:58PM +0200, Andrey Ryabinin wrote:
> 
> Hi Andrey,
> 
>>> @@ -301,7 +301,7 @@ static int kasan_populate_vmalloc_pte(pte_t *ptep, unsigned long addr,
>>>  	if (likely(!pte_none(ptep_get(ptep))))
>>>  		return 0;
>>>  
>>> -	page = __get_free_page(GFP_KERNEL);
>>> +	page = __get_free_page(GFP_ATOMIC);
>>>  	if (!page)
>>>  		return -ENOMEM;
>>>  
>>
>> I think a better way to fix this would be moving out allocation from atomic context. Allocate page prior
>> to apply_to_page_range() call and pass it down to kasan_populate_vmalloc_pte().
> 
> I think the page address could be passed as the parameter to kasan_populate_vmalloc_pte().

We'll need to pass it as 'struct page **page' or maybe as pointer to some struct, e.g.:
struct page_data {
 struct page *page;
};


So, the kasan_populate_vmalloc_pte() would do something like this:

kasan_populate_vmalloc_pte() {
	if (!pte_none)
		return 0;
	if (!page_data->page)
		return -EAGAIN;

	//use page to set pte

        //NULLify pointer so that next kasan_populate_vmalloc_pte() will bail
	// out to allocate new page
	page_data->page = NULL; 
}

And it might be good idea to add 'last_addr' to page_data, so that we know where we stopped
so that the next apply_to_page_range() call could continue, instead of starting from the beginning. 


> 
>> Whenever kasan_populate_vmalloc_pte() will require additional page we could bail out with -EAGAIN,
>> and allocate another one.
> 
> When would it be needed? kasan_populate_vmalloc_pte() handles just one page.
> 

apply_to_page_range() goes over range of addresses and calls kasan_populate_vmalloc_pte()
multiple times (each time with different 'addr' but the same '*unused' arg). Things will go wrong
if you'll use same page multiple times for different addresses.


> Thanks!



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Date: Wed, 9 Apr 2025 17:33:54 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: Marek Marczykowski ,
	Andrew Cooper ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH 2/2] x86/hvm: fix write emulation of RO ranges
Message-ID: 
References: <20250408093156.83277-3-roger.pau@citrix.com>
 <16c73cae-2ac0-4811-97d3-b25c95ed5abc@suse.com>
 
 
 
 <2df78a5d-2f9f-4866-81cc-03ae09c76d50@suse.com>
 
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In-Reply-To: 

On Wed, Apr 09, 2025 at 04:08:47PM +0200, Jan Beulich wrote:
> On 09.04.2025 16:01, Roger Pau Monné wrote:
> > On Wed, Apr 09, 2025 at 03:50:13PM +0200, Jan Beulich wrote:
> >> On 09.04.2025 15:33, Roger Pau Monné wrote:
> >>> On Wed, Apr 09, 2025 at 02:59:45PM +0200, Jan Beulich wrote:
> >>>> On 09.04.2025 12:39, Roger Pau Monné wrote:
> >>>>> On Wed, Apr 09, 2025 at 12:00:16PM +0200, Jan Beulich wrote:
> >>>>>> On 09.04.2025 11:07, Roger Pau Monné wrote:
> >>>>>>> On Tue, Apr 08, 2025 at 03:57:17PM +0200, Jan Beulich wrote:
> >>>>>>>> On 08.04.2025 11:31, Roger Pau Monne wrote:
> >>>>>>>>> When running on AMD hardware in HVM mode the guest linear address (GLA)
> >>>>>>>>> will not be provided to hvm_emulate_one_mmio(), and instead is
> >>>>>>>>> unconditionally set of ~0.  As a consequence mmio_ro_emulated_write() will
> >>>>>>>>> always report an error, as the fault GLA generated by the emulation of the
> >>>>>>>>> access won't be ~0.
> >>>>>>>>
> >>>>>>>> Which means subpage_mmio_write_accept() is flawed, too, on AMD (or more
> >>>>>>>> generally whenever .gla_valid isn't set).
> >>>>>>>
> >>>>>>> Oh, yes, good catch.  I didn't notice that one.  We should move all
> >>>>>>> those checks to use a paddr rather than a gla.
> >>>>>>
> >>>>>> Really that function could just be passed the offset into the page.
> >>>>>>
> >>>>>>>>> Fix this by only checking for the fault GLA in mmio_ro_emulated_write()
> >>>>>>>>> when the guest is PV.
> >>>>>>>>
> >>>>>>>> This narrows checking too much, imo. For VT-x we could continue to do so,
> >>>>>>>> provided we pass e.g. npfec down into hvm_emulate_one_mmio(), i.e. make
> >>>>>>>> the gla_valid flag visible there.
> >>>>>>>
> >>>>>>> I don't think we should rely on the gla at all in
> >>>>>>> mmio_ro_emulated_write(), and instead just use the physical address.
> >>>>>>
> >>>>>> But you can't validate a physical address against a CR2 value. And I view
> >>>>>> this validation as meaningful, to guard (best effort, but still) against
> >>>>>> e.g. insn re-writing under our feet.
> >>>>>
> >>>>> But we have the mfn in mmio_ro_ctxt, and could possibly use that to
> >>>>> validate?  I could expand the context to include the offset also, so
> >>>>> that we could fully validate it.
> >>>>
> >>>> How would you use the MFN to validate against the VA in CR2?
> >>>
> >>> I would use hvmemul_virtual_to_linear()
> >>
> >> If you mean to use the CR2 as input, you wouldn't need this. I said VA in
> >> my earlier reply, yes, but strictly speaking that's a linear address.
> > 
> > I was thinking about using the segment and offset parameters of the
> > mmio_ro_emulated_write() call.
> > 
> >>> and hvm_translate_get_page()
> >>> to get the underlying mfn of the linear address.  But maybe there's a
> >>> part of this that I'm missing, I've certainly haven't tried to
> >>> implement any of it.
> >>
> >> Hmm, I see. I didn't think of doing it this way round. There's certainly
> >> at least one caveat with this approach: Multiple linear addresses can all
> >> map to the same GFN and hence MFN. Checking against the original linear
> >> address (when available) doesn't have such an issue.
> > 
> > I see... Yet for AMD that address is not uniformly available as part
> > of the vmexit information?
> 
> Even stronger, I thought: It's uniformly not available.

Oh yes, that's what I meant to say but got the words the other way
around.

> >  As I understand the checks done in
> > mmio_ro_emulated_write() are to ensure correctness, but carrying the
> > access even when the %cr2 check fail wouldn't cause issues to Xen
> > itself?
> 
> Well, "wouldn't" is too strong for my taste, "shouldn't" would fit. The
> checking is there to avoid guests playing games. Whether that prevents
> merely in-guest just-bugs or actual XSAs we can't know until we find a
> case where the game playing might make us do something wrong. I expect
> it's unlikely for Xen itself to be affected. But an in-guest privilege
> escalation would already be bad enough.

I see.  That was kind of my understanding of the checks.  At least on
HVM it feels a bit weird to handle r/o regions this way.  It would IMO
be more natural to use an hvm_io_handler, but that's maybe because I'm
more familiar with those.

And in that regard, hvm_io_handler don't seem to do any of the extra
checking that mmio_ro_emulated_write() does with the %cr2, but maybe
that's done by some higher layer?  AFAICT that would ultimately get
called by hvmemul_read(), and there are no checks there at all.

> So why don't we do the linear address check as we do today (provided a
> linear address is available), and only use the alternative approach when
> no linear address is available?

I can try to do that, albeit as said above, at least for HVM guests
that checking of %cr2 seems to be quite inconsistent, as
hvmemul_{read,write}() won't do any of it.

Thanks, Roger.


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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Michal Orzel ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Anthony PERARD 
Subject: [PATCH 7/8] Infrastructure for arm64 linux builds
Date: Wed,  9 Apr 2025 17:37:01 +0100
Message-Id: <20250409163702.2037301-8-andrew.cooper3@citrix.com>
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Signed-off-by: Andrew Cooper 
---
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Marek Marczykowski-Górecki 
CC: Anthony PERARD 
---
 .gitlab-ci.yml                            |  7 ++++++
 containerize                              |  1 +
 images/alpine/3.18-arm64-build.dockerfile | 27 +++++++++++++++++++++++
 scripts/build-linux.sh                    | 10 +++++++++
 4 files changed, 45 insertions(+)
 create mode 100644 images/alpine/3.18-arm64-build.dockerfile

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index ff8dce7be05d..6e38c2f2a108 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -19,6 +19,13 @@ stages:
     exclude:
       - binaries/.gitignore
 
+.arm64-artifacts:
+  extends: .artifacts
+  tags:
+    - arm64
+  variables:
+    CONTAINER: alpine:3.18-arm64-build
+
 .x86_64-artifacts:
   extends: .artifacts
   tags:
diff --git a/containerize b/containerize
index c32e40f5a6d9..6664ef9821d0 100755
--- a/containerize
+++ b/containerize
@@ -24,6 +24,7 @@ die() {
 #
 BASE="registry.gitlab.com/xen-project/hardware/test-artifacts"
 case "_${CONTAINER}" in
+    _alpine-3.18-arm64-build) CONTAINER="${BASE}/alpine:3.18-arm64-build" ;;
     _alpine-x86_64-base) CONTAINER="${BASE}/alpine:x86_64-base" ;;
     _alpine-x86_64-build|_) CONTAINER="${BASE}/alpine:x86_64-build" ;;
 esac
diff --git a/images/alpine/3.18-arm64-build.dockerfile b/images/alpine/3.18-arm64-build.dockerfile
new file mode 100644
index 000000000000..c76ac435e8dd
--- /dev/null
+++ b/images/alpine/3.18-arm64-build.dockerfile
@@ -0,0 +1,27 @@
+# syntax=docker/dockerfile:1
+FROM --platform=linux/arm64/v8 alpine:3.18
+LABEL maintainer.name="The Xen Project" \
+      maintainer.email="xen-devel@lists.xenproject.org"
+
+RUN apk --no-cache add bash
+
+RUN bash -ex <> .config
         ;;
+
+    aarch64)
+        ./scripts/config --enable XEN_NETDEV_BACKEND
+        ;;
 esac
 
 make olddefconfig
@@ -41,4 +46,9 @@ case $UNAME in
         make -j$(nproc) bzImage
         cp arch/x86/boot/bzImage "${COPYDIR}"
         ;;
+
+    aarch64)
+        make -j$(nproc) Image
+        cp arch/arm64/boot/Image "${COPYDIR}"
+        ;;
 esac
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Michal Orzel ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Anthony PERARD 
Subject: [PATCH 3/8] Fix container user setup
Date: Wed,  9 Apr 2025 17:36:57 +0100
Message-Id: <20250409163702.2037301-4-andrew.cooper3@citrix.com>
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Use USER (and 'user' as normal), rather than specifying configuration from the
outside.  This also fixes the fact that root-needing containers need to
override the default.

Signed-off-by: Andrew Cooper 
---
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Marek Marczykowski-Górecki 
CC: Anthony PERARD 
---
 .gitlab-ci.yml                        | 7 -------
 images/alpine/x86_64-build.dockerfile | 7 ++++---
 2 files changed, 4 insertions(+), 10 deletions(-)

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 7e18a87b3a07..36ec6a7e1ee5 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -14,10 +14,6 @@ workflow:
 
 .x86_64-artifacts:
   extends: .artifacts
-  image:
-    docker:
-      platform: linux/amd64
-      user: xenproject
   tags:
     - x86_64
   variables:
@@ -32,9 +28,6 @@ x86_64-kernel-linux-6.6.56:
 
 x86_64-rootfs-alpine-3.18:
   extends: .x86_64-artifacts
-  image:
-    docker:
-      user: root
   script:
     - . scripts/x86_64-rootfs-alpine.sh
   variables:
diff --git a/images/alpine/x86_64-build.dockerfile b/images/alpine/x86_64-build.dockerfile
index 3bfd17248d0a..6bfdb6ff5a0c 100644
--- a/images/alpine/x86_64-build.dockerfile
+++ b/images/alpine/x86_64-build.dockerfile
@@ -3,12 +3,10 @@ FROM --platform=linux/amd64 alpine:3.18
 LABEL maintainer.name="The Xen Project" \
       maintainer.email="xen-devel@lists.xenproject.org"
 
-WORKDIR /build/
-
 RUN apk --no-cache add bash
 
 RUN bash -ex <
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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Michal Orzel ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Anthony PERARD 
Subject: [PATCH TEST-ARTEFACTS 0/8] Cleanup and Linux ARM64 support
Date: Wed,  9 Apr 2025 17:36:54 +0100
Message-Id: <20250409163702.2037301-1-andrew.cooper3@citrix.com>
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Various bits of cleanup, and support for arm64 Linux builds.

Run using the new Linux 6.6.86 on (most) x86, and ARM64:
  https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1760667411

Still to go:
 - Merge argo into the linux build (as it builds a module), strip devel artefacts
 - Rootfs generation, both x86 and ARM64

The argo kernel module and userspace should be a CPIO fragment too, as it's
embedded into both dom0 and domU in the relevant test.

Switching from tar to cpio can happen when the artefact name changes; which
fixes the backwards comptibility concerns.  In hindsight, domU shouldn't be
automatically embedded in dom0, as several tests further customise it; the
test job can adjust, then wrap the whole lot in a CPIO and append it to
dom0's.

Xen's main build jobs should either build with --prefix=/usr, or the common
rootfs wants to set up /usr/local/, because right now it's done by all jobs.

Andrew Cooper (7):
  Port containerise
  Fix container user setup
  Clean up Gitlab yaml
  Adjust Linux build script to work with other major versions
  Factor our x86-isms in the linux build script
  Infrastructure for arm64 linux builds
  Linux 6.6.86 for x86 and arm64

Marek Marczykowski-Górecki (1):
  Consistently use DOCKER_CMD in makefiles

 .gitlab-ci.yml                                | 43 ++++++---
 containerize                                  | 95 +++++++++++++++++++
 images/Makefile                               |  5 +-
 ...dockerfile => 3.18-arm64-build.dockerfile} | 22 ++---
 images/alpine/x86_64-build.dockerfile         |  7 +-
 scripts/build-linux.sh                        | 54 +++++++++++
 scripts/x86_64-kernel-linux.sh                | 31 ------
 7 files changed, 197 insertions(+), 60 deletions(-)
 create mode 100755 containerize
 copy images/alpine/{x86_64-build.dockerfile => 3.18-arm64-build.dockerfile} (55%)
 create mode 100755 scripts/build-linux.sh
 delete mode 100755 scripts/x86_64-kernel-linux.sh

-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Stefano Stabellini ,
	Andrew Cooper 
Subject: [PATCH 1/8] Consistently use DOCKER_CMD in makefiles
Date: Wed,  9 Apr 2025 17:36:55 +0100
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From: Marek Marczykowski-Górecki 

This allows rebuilding containers using podman too.

Signed-off-by: Marek Marczykowski-Górecki 
Reviewed-by: Stefano Stabellini 
[Ported from Xen]
Signed-off-by: Andrew Cooper 
---
 images/Makefile | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/images/Makefile b/images/Makefile
index 42f231bcce27..b0b7a7cf63ee 100644
--- a/images/Makefile
+++ b/images/Makefile
@@ -1,3 +1,4 @@
+DOCKER_CMD ?= docker
 
 # The base of where these containers will appear
 REGISTRY := registry.gitlab.com/xen-project/hardware/test-artifacts
@@ -11,9 +12,9 @@ help:
 	@echo "To push container builds, set the environment variable PUSH"
 
 %: %.dockerfile ## Builds containers
-	docker build --pull -t $(REGISTRY)/$(@D):$(@F) -f $< $(
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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Michal Orzel ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Anthony PERARD 
Subject: [PATCH 6/8] Factor our x86-isms in the linux build script
Date: Wed,  9 Apr 2025 17:37:00 +0100
Message-Id: <20250409163702.2037301-7-andrew.cooper3@citrix.com>
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... in preparation to use it for arm64 too.  Rename the script.

Signed-off-by: Andrew Cooper 
---
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Marek Marczykowski-Górecki 
CC: Anthony PERARD 
---
 .gitlab-ci.yml                                |  3 +-
 ...{x86_64-kernel-linux.sh => build-linux.sh} | 34 +++++++++++++------
 2 files changed, 24 insertions(+), 13 deletions(-)
 rename scripts/{x86_64-kernel-linux.sh => build-linux.sh} (55%)

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 5a0a853e551d..ff8dce7be05d 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -31,8 +31,7 @@ stages:
 #
 x86_64-kernel-linux-6.6.56:
   extends: .x86_64-artifacts
-  script:
-    - . scripts/x86_64-kernel-linux.sh
+  script: ./scripts/build-linux.sh
   variables:
     LINUX_VERSION: 6.6.56
 
diff --git a/scripts/x86_64-kernel-linux.sh b/scripts/build-linux.sh
similarity index 55%
rename from scripts/x86_64-kernel-linux.sh
rename to scripts/build-linux.sh
index 5a0160655bea..5e25e958c0f3 100755
--- a/scripts/x86_64-kernel-linux.sh
+++ b/scripts/build-linux.sh
@@ -9,6 +9,7 @@ set -ex -o pipefail
 
 WORKDIR="${PWD}"
 COPYDIR="${WORKDIR}/binaries/"
+UNAME=$(uname -m)
 
 # Build Linux
 MAJOR=${LINUX_VERSION%%.*}
@@ -16,17 +17,28 @@ curl -fsSLO \
     https://cdn.kernel.org/pub/linux/kernel/v"${MAJOR}".x/linux-"${LINUX_VERSION}".tar.xz
 tar oxf linux-"${LINUX_VERSION}".tar.xz
 cd linux-"${LINUX_VERSION}"
-make ARCH=x86 defconfig
-make ARCH=x86 xen.config
+
+make defconfig
 ./scripts/config --enable BRIDGE
 ./scripts/config --enable IGC
 ./scripts/config --enable TUN
-cp .config .config.orig
-cat .config.orig \
-    | grep 'XEN' \
-    | grep '=m' \
-    | sed 's/=m/=y/g' \
-    >> .config
-make ARCH=x86 olddefconfig
-make -s -j "$(nproc)" ARCH=x86
-cp arch/x86/boot/bzImage "${COPYDIR}"
+
+case $UNAME in
+    x86_64)
+        make xen.config
+        cp .config .config.orig
+        cat .config.orig \
+            | grep 'XEN' \
+            | grep '=m' \
+            | sed 's/=m/=y/g' >> .config
+        ;;
+esac
+
+make olddefconfig
+
+case $UNAME in
+    x86_64)
+        make -j$(nproc) bzImage
+        cp arch/x86/boot/bzImage "${COPYDIR}"
+        ;;
+esac
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Michal Orzel ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Anthony PERARD 
Subject: [PATCH 5/8] Adjust Linux build script to work with other major versions
Date: Wed,  9 Apr 2025 17:36:59 +0100
Message-Id: <20250409163702.2037301-6-andrew.cooper3@citrix.com>
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Also use 'tar o' to decompress based on file name.

Signed-off-by: Andrew Cooper 
---
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Marek Marczykowski-Górecki 
CC: Anthony PERARD 
---
 scripts/x86_64-kernel-linux.sh | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/scripts/x86_64-kernel-linux.sh b/scripts/x86_64-kernel-linux.sh
index 2a816f0b3204..5a0160655bea 100755
--- a/scripts/x86_64-kernel-linux.sh
+++ b/scripts/x86_64-kernel-linux.sh
@@ -11,9 +11,10 @@ WORKDIR="${PWD}"
 COPYDIR="${WORKDIR}/binaries/"
 
 # Build Linux
+MAJOR=${LINUX_VERSION%%.*}
 curl -fsSLO \
-    https://cdn.kernel.org/pub/linux/kernel/v6.x/linux-"${LINUX_VERSION}".tar.xz
-tar xJf linux-"${LINUX_VERSION}".tar.xz
+    https://cdn.kernel.org/pub/linux/kernel/v"${MAJOR}".x/linux-"${LINUX_VERSION}".tar.xz
+tar oxf linux-"${LINUX_VERSION}".tar.xz
 cd linux-"${LINUX_VERSION}"
 make ARCH=x86 defconfig
 make ARCH=x86 xen.config
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Michal Orzel ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Anthony PERARD 
Subject: [PATCH 8/8] Linux 6.6.86 for x86 and arm64
Date: Wed,  9 Apr 2025 17:37:02 +0100
Message-Id: <20250409163702.2037301-9-andrew.cooper3@citrix.com>
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It's the latest 6.6 at the time of writing.

Signed-off-by: Andrew Cooper 
---
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Marek Marczykowski-Górecki 
CC: Anthony PERARD 
---
 .gitlab-ci.yml | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 6e38c2f2a108..c1ce3f38e8b8 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -33,6 +33,18 @@ stages:
   variables:
     CONTAINER: alpine:x86_64-build
 
+linux-6.6.86-arm64:
+  extends: .arm64-artifacts
+  script: ./scripts/build-linux.sh
+  variables:
+    LINUX_VERSION: 6.6.86
+
+linux-6.6.86-x86_64:
+  extends: .x86_64-artifacts
+  script: ./scripts/build-linux.sh
+  variables:
+    LINUX_VERSION: 6.6.86
+
 #
 # The jobs below here are legacy and being phased out.
 #
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Michal Orzel ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Anthony PERARD 
Subject: [PATCH 4/8] Clean up Gitlab yaml
Date: Wed,  9 Apr 2025 17:36:58 +0100
Message-Id: <20250409163702.2037301-5-andrew.cooper3@citrix.com>
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Factor out the registry into a common location.  Fix the worflow name.  List
all the stages.  Set a default expiry of 1 month.

Note all the current jobs as legacy.  Their naming scheme needs changing, and
we'll use this opportunity to switch formats too.  However, the artefacts need
to stay using the old name until the final staging-* branch using them is
phased out.

Signed-off-by: Andrew Cooper 
---
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Marek Marczykowski-Górecki 
CC: Anthony PERARD 
---
 .gitlab-ci.yml | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 36ec6a7e1ee5..5a0a853e551d 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -1,12 +1,19 @@
+variables:
+  REGISTRY: registry.gitlab.com/xen-project/hardware/test-artifacts
+
 workflow:
-  name: "xen test artifacts"
+  name: "Xen test artifacts"
+
+stages:
+  - build
 
 .artifacts:
   stage: build
   image:
-    name: registry.gitlab.com/xen-project/hardware/test-artifacts/${CONTAINER}
+    name: ${REGISTRY}/${CONTAINER}
   artifacts:
     name: "${CI_JOB_NAME_SLUG}"
+    expire_in: 1 month
     paths:
       - binaries/
     exclude:
@@ -19,6 +26,9 @@ workflow:
   variables:
     CONTAINER: alpine:x86_64-build
 
+#
+# The jobs below here are legacy and being phased out.
+#
 x86_64-kernel-linux-6.6.56:
   extends: .x86_64-artifacts
   script:
-- 
2.39.5



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        Wed, 09 Apr 2025 09:37:08 -0700 (PDT)
From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Michal Orzel ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Anthony PERARD 
Subject: [PATCH 2/8] Port containerise
Date: Wed,  9 Apr 2025 17:36:56 +0100
Message-Id: <20250409163702.2037301-3-andrew.cooper3@citrix.com>
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While it pains me to keep the wrong spelling, do so for consistency.

Signed-off-by: Andrew Cooper 
---
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Marek Marczykowski-Górecki 
CC: Anthony PERARD 
---
 containerize | 94 ++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 94 insertions(+)
 create mode 100755 containerize

diff --git a/containerize b/containerize
new file mode 100755
index 000000000000..c32e40f5a6d9
--- /dev/null
+++ b/containerize
@@ -0,0 +1,94 @@
+#!/bin/bash
+
+#
+# DOCKER_CMD should be either `docker` or `podman`.
+#
+# if using (rootless) podman, remember to set /etc/subuid
+# and /etc/subgid.
+#
+docker_cmd=${DOCKER_CMD:-"docker"}
+[ "$DOCKER_CMD" = "podman" ] && userns_podman="--userns=keep-id" selinux=",z"
+
+einfo() {
+    echo "$*" >&2
+}
+
+die() {
+    echo "$*" >&2
+    exit 1
+}
+
+#
+# The caller is expected to override the CONTAINER environment
+# variable with the container they wish to launch.
+#
+BASE="registry.gitlab.com/xen-project/hardware/test-artifacts"
+case "_${CONTAINER}" in
+    _alpine-x86_64-base) CONTAINER="${BASE}/alpine:x86_64-base" ;;
+    _alpine-x86_64-build|_) CONTAINER="${BASE}/alpine:x86_64-build" ;;
+esac
+
+# Use this variable to control whether root should be used
+case "_${CONTAINER_UID0}" in
+    _1)   userarg="-u 0" ;;
+    _0|_) userarg="-u $(id -u) $userns_podman" ;;
+esac
+
+# Save the commands for future use
+cmd=("$@")
+
+# If no command was specified, just drop us into a shell if we're interactive
+[ $# -eq 0 ] && tty -s && cmd=("/bin/bash")
+
+# Are we in an interactive terminal?
+tty -s && termint=t
+
+#
+# Fetch the latest version of the container in hub.docker.com,
+# unless it's a newly created local copy.
+#
+if [[ "_${CONTAINER_NO_PULL}" != "_1" ]]; then
+    einfo "*** Ensuring ${CONTAINER} is up to date"
+    ${docker_cmd} pull ${CONTAINER} > /dev/null ||     \
+        die "Failed to update container"
+fi
+
+if hash greadlink > /dev/null 2>&1; then
+    READLINK=greadlink
+elif [[ $(uname -s) == "Darwin" ]]; then
+    echo "Unable to forward SSH agent without coreutils installed"
+    unset SSH_AUTH_SOCK
+else
+    READLINK=readlink
+fi
+
+# Ensure we've got what we need for SSH_AUTH_SOCK
+if [[ -n ${SSH_AUTH_SOCK} ]]; then
+    fullpath_sock=$(${READLINK} -f ${SSH_AUTH_SOCK} 2> /dev/null)
+    if [ $? -ne 0 ]; then
+        echo "Invalid SSH_AUTH_SOCK: ${SSH_AUTH_SOCK}"
+        unset SSH_AUTH_SOCK
+    else
+        SSH_AUTH_DIR=$(dirname ${fullpath_sock})
+        SSH_AUTH_NAME=$(basename ${fullpath_sock})
+    fi
+fi
+
+# Figure out the base of what we want as our sources
+# by using the top of the git repo
+if [[ -z ${CONTAINER_PATH} ]]; then
+    CONTAINER_PATH=$(git rev-parse --show-toplevel)
+fi
+
+# Kick off Docker
+einfo "*** Launching container ..."
+exec ${docker_cmd} run \
+    ${userarg} \
+    ${SSH_AUTH_SOCK:+-e SSH_AUTH_SOCK="/tmp/ssh-agent/${SSH_AUTH_NAME}"} \
+    -v "${CONTAINER_PATH}":/build:rw${selinux} \
+    -v "${HOME}/.ssh":/root/.ssh:ro \
+    ${SSH_AUTH_DIR:+-v "${SSH_AUTH_DIR}":/tmp/ssh-agent${selinux}} \
+    ${CONTAINER_ARGS} \
+    -${termint}i --rm -- \
+    ${CONTAINER} \
+    "${cmd[@]}"
-- 
2.39.5



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Date: Wed, 9 Apr 2025 18:57:53 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Roger Pau =?utf-8?B?TW9ubsOp?= ,
	Stefano Stabellini ,
	Michal Orzel ,
	Anthony PERARD 
Subject: Re: [PATCH 5/8] Adjust Linux build script to work with other major
 versions
Message-ID: 
References: <20250409163702.2037301-1-andrew.cooper3@citrix.com>
 <20250409163702.2037301-6-andrew.cooper3@citrix.com>
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Date: Wed, 9 Apr 2025 18:57:53 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Roger Pau =?utf-8?B?TW9ubsOp?= ,
	Stefano Stabellini ,
	Michal Orzel ,
	Anthony PERARD 
Subject: Re: [PATCH 5/8] Adjust Linux build script to work with other major
 versions

On Wed, Apr 09, 2025 at 05:36:59PM +0100, Andrew Cooper wrote:
> Also use 'tar o' to decompress based on file name.

Do you mean 'tar a'? -o is --no-same-owner. Anyway, just 'tar xf'
works too, even in alpine.

> Signed-off-by: Andrew Cooper 
> ---
> CC: Roger Pau Monn=C3=A9 
> CC: Stefano Stabellini 
> CC: Michal Orzel 
> CC: Marek Marczykowski-G=C3=B3recki 
> CC: Anthony PERARD 
> ---
>  scripts/x86_64-kernel-linux.sh | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
>=20
> diff --git a/scripts/x86_64-kernel-linux.sh b/scripts/x86_64-kernel-linux=
=2Esh
> index 2a816f0b3204..5a0160655bea 100755
> --- a/scripts/x86_64-kernel-linux.sh
> +++ b/scripts/x86_64-kernel-linux.sh
> @@ -11,9 +11,10 @@ WORKDIR=3D"${PWD}"
>  COPYDIR=3D"${WORKDIR}/binaries/"
> =20
>  # Build Linux
> +MAJOR=3D${LINUX_VERSION%%.*}
>  curl -fsSLO \
> -    https://cdn.kernel.org/pub/linux/kernel/v6.x/linux-"${LINUX_VERSION}=
".tar.xz
> -tar xJf linux-"${LINUX_VERSION}".tar.xz
> +    https://cdn.kernel.org/pub/linux/kernel/v"${MAJOR}".x/linux-"${LINUX=
_VERSION}".tar.xz
> +tar oxf linux-"${LINUX_VERSION}".tar.xz
>  cd linux-"${LINUX_VERSION}"
>  make ARCH=3Dx86 defconfig
>  make ARCH=3Dx86 xen.config
> --=20
> 2.39.5
>=20

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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On 09/04/2025 5:36 pm, Andrew Cooper wrote:
> Various bits of cleanup, and support for arm64 Linux builds.
>
> Run using the new Linux 6.6.86 on (most) x86, and ARM64:
>   https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1760667411

Lovely, Linux 6.6.86 is broken for x86 PVH.  It triple faults very early on.

Sample log:
https://gitlab.com/xen-project/hardware/xen-staging/-/jobs/9673797450

I guess we'll have to stay on 6.6.56 for now.  (Only affects the final
patch.)

~Andrew


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Feedback-ID: i1568416f:Fastmail
Date: Wed, 9 Apr 2025 19:05:21 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Roger Pau =?utf-8?B?TW9ubsOp?= ,
	Stefano Stabellini ,
	Michal Orzel ,
	Anthony PERARD 
Subject: Re: [PATCH 6/8] Factor our x86-isms in the linux build script
Message-ID: 
References: <20250409163702.2037301-1-andrew.cooper3@citrix.com>
 <20250409163702.2037301-7-andrew.cooper3@citrix.com>
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Date: Wed, 9 Apr 2025 19:05:21 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Roger Pau =?utf-8?B?TW9ubsOp?= ,
	Stefano Stabellini ,
	Michal Orzel ,
	Anthony PERARD 
Subject: Re: [PATCH 6/8] Factor our x86-isms in the linux build script

On Wed, Apr 09, 2025 at 05:37:00PM +0100, Andrew Cooper wrote:
> ... in preparation to use it for arm64 too.  Rename the script.
>=20
> Signed-off-by: Andrew Cooper 

Reviewed-by: Marek Marczykowski-G=C3=B3recki 
> ---
> CC: Roger Pau Monn=C3=A9 
> CC: Stefano Stabellini 
> CC: Michal Orzel 
> CC: Marek Marczykowski-G=C3=B3recki 
> CC: Anthony PERARD 
> ---
>  .gitlab-ci.yml                                |  3 +-
>  ...{x86_64-kernel-linux.sh =3D> build-linux.sh} | 34 +++++++++++++------
>  2 files changed, 24 insertions(+), 13 deletions(-)
>  rename scripts/{x86_64-kernel-linux.sh =3D> build-linux.sh} (55%)
>=20
> diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
> index 5a0a853e551d..ff8dce7be05d 100644
> --- a/.gitlab-ci.yml
> +++ b/.gitlab-ci.yml
> @@ -31,8 +31,7 @@ stages:
>  #
>  x86_64-kernel-linux-6.6.56:
>    extends: .x86_64-artifacts
> -  script:
> -    - . scripts/x86_64-kernel-linux.sh
> +  script: ./scripts/build-linux.sh
>    variables:
>      LINUX_VERSION: 6.6.56
> =20
> diff --git a/scripts/x86_64-kernel-linux.sh b/scripts/build-linux.sh
> similarity index 55%
> rename from scripts/x86_64-kernel-linux.sh
> rename to scripts/build-linux.sh
> index 5a0160655bea..5e25e958c0f3 100755
> --- a/scripts/x86_64-kernel-linux.sh
> +++ b/scripts/build-linux.sh
> @@ -9,6 +9,7 @@ set -ex -o pipefail
> =20
>  WORKDIR=3D"${PWD}"
>  COPYDIR=3D"${WORKDIR}/binaries/"
> +UNAME=3D$(uname -m)
> =20
>  # Build Linux
>  MAJOR=3D${LINUX_VERSION%%.*}
> @@ -16,17 +17,28 @@ curl -fsSLO \
>      https://cdn.kernel.org/pub/linux/kernel/v"${MAJOR}".x/linux-"${LINUX=
_VERSION}".tar.xz
>  tar oxf linux-"${LINUX_VERSION}".tar.xz
>  cd linux-"${LINUX_VERSION}"
> -make ARCH=3Dx86 defconfig
> -make ARCH=3Dx86 xen.config
> +
> +make defconfig
>  ./scripts/config --enable BRIDGE
>  ./scripts/config --enable IGC
>  ./scripts/config --enable TUN
> -cp .config .config.orig
> -cat .config.orig \
> -    | grep 'XEN' \
> -    | grep '=3Dm' \
> -    | sed 's/=3Dm/=3Dy/g' \
> -    >> .config
> -make ARCH=3Dx86 olddefconfig
> -make -s -j "$(nproc)" ARCH=3Dx86
> -cp arch/x86/boot/bzImage "${COPYDIR}"
> +
> +case $UNAME in
> +    x86_64)
> +        make xen.config
> +        cp .config .config.orig
> +        cat .config.orig \
> +            | grep 'XEN' \
> +            | grep '=3Dm' \
> +            | sed 's/=3Dm/=3Dy/g' >> .config
> +        ;;
> +esac
> +
> +make olddefconfig
> +
> +case $UNAME in
> +    x86_64)
> +        make -j$(nproc) bzImage
> +        cp arch/x86/boot/bzImage "${COPYDIR}"
> +        ;;
> +esac
> --=20
> 2.39.5
>=20

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Hi,

On 08/04/2025 08:33, Orzel, Michal wrote:
>
> On 07/04/2025 20:44, Ayan Kumar Halder wrote:
>> Added a new file common.inc to hold the common earlyboot MPU regions
> NIT: Describe your changes in imperative mood
>
> Also, my understanding was that this file will contain common constructs not
> only regions related. If this is just for regions, then it's better to name it
> regions.inc.
>
>> configurations across arm64 and arm32.
>>
>> prepare_xen_region, fail_insufficient_regions() will be used by both arm32 and
>> arm64. Thus, they have been moved to common.inc.
>>
>> *_PRBAR are moved to arm64/sysregs.h.
>> *_PRLAR are moved to common.inc as they are common between arm32 and arm64.
>>
>> Introduce WRITE_SYSREG_ASM to write to the system registers from the common asm
>> file.
>>
>> Signed-off-by: Ayan Kumar Halder 
>> ---
>>
>> Changes from
>>
>> v1 -
>>
>> 1. enable_mpu() now sets HMAIR{0,1} registers. This is similar to what is
>> being done in enable_mmu(). All the mm related configurations happen in this
>> function.
>>
>> 2. Fixed some typos.
>>
>> v2 -
>> 1. Extracted the arm64 head.S functions/macros in a common file.
>>
>> v3 -
>> 1. Moved *_PRLAR are moved to prepare_xen_region.inc
>>
>> 2. enable_boot_cpu_mm() is preserved in mpu/head.S.
>>
>> 3. STORE_SYSREG is renamed as WRITE_SYSREG_ASM()
>>
>> 4. LOAD_SYSREG is removed.
>>
>> 5. No need to save/restore lr in enable_boot_cpu_mm(). IOW, keep it as it was
>> in the original code.
>>
>> v4 -
>> 1. Rename prepare_xen_region.inc to common.inc
>>
>> 2. enable_secondary_cpu_mm() is moved back to mpu/head.S.
>>
>>   xen/arch/arm/arm64/mpu/head.S            | 78 +----------------------
>>   xen/arch/arm/include/asm/arm64/sysregs.h | 11 ++++
>>   xen/arch/arm/include/asm/mpu/common.inc  | 79 ++++++++++++++++++++++++
>>   3 files changed, 91 insertions(+), 77 deletions(-)
>>   create mode 100644 xen/arch/arm/include/asm/mpu/common.inc
>>
>> diff --git a/xen/arch/arm/arm64/mpu/head.S b/xen/arch/arm/arm64/mpu/head.S
>> index ed01993d85..4d76a3166e 100644
>> --- a/xen/arch/arm/arm64/mpu/head.S
>> +++ b/xen/arch/arm/arm64/mpu/head.S
>> @@ -3,83 +3,7 @@
>>    * Start-of-day code for an Armv8-R MPU system.
>>    */
>>   
>> -#include 
>> -#include 
>> -
>> -/* Backgroud region enable/disable */
>> -#define SCTLR_ELx_BR    BIT(17, UL)
>> -
>> -#define REGION_TEXT_PRBAR       0x38    /* SH=11 AP=10 XN=00 */
>> -#define REGION_RO_PRBAR         0x3A    /* SH=11 AP=10 XN=10 */
>> -#define REGION_DATA_PRBAR       0x32    /* SH=11 AP=00 XN=10 */
>> -#define REGION_DEVICE_PRBAR     0x22    /* SH=10 AP=00 XN=10 */
>> -
>> -#define REGION_NORMAL_PRLAR     0x0f    /* NS=0 ATTR=111 EN=1 */
>> -#define REGION_DEVICE_PRLAR     0x09    /* NS=0 ATTR=100 EN=1 */
>> -
>> -/*
>> - * Macro to prepare and set a EL2 MPU memory region.
>> - * We will also create an according MPU memory region entry, which
>> - * is a structure of pr_t,  in table \prmap.
>> - *
>> - * sel:         region selector
>> - * base:        reg storing base address
>> - * limit:       reg storing limit address
>> - * prbar:       store computed PRBAR_EL2 value
>> - * prlar:       store computed PRLAR_EL2 value
>> - * maxcount:    maximum number of EL2 regions supported
>> - * attr_prbar:  PRBAR_EL2-related memory attributes. If not specified it will be
>> - *              REGION_DATA_PRBAR
>> - * attr_prlar:  PRLAR_EL2-related memory attributes. If not specified it will be
>> - *              REGION_NORMAL_PRLAR
>> - *
>> - * Preserves \maxcount
>> - * Output:
>> - *  \sel: Next available region selector index.
>> - * Clobbers \base, \limit, \prbar, \prlar
>> - *
>> - * Note that all parameters using registers should be distinct.
>> - */
>> -.macro prepare_xen_region, sel, base, limit, prbar, prlar, maxcount, attr_prbar=REGION_DATA_PRBAR, attr_prlar=REGION_NORMAL_PRLAR
>> -    /* Check if the region is empty */
>> -    cmp   \base, \limit
>> -    beq   1f
>> -
>> -    /* Check if the number of regions exceeded the count specified in MPUIR_EL2 */
>> -    cmp   \sel, \maxcount
>> -    bge   fail_insufficient_regions
>> -
>> -    /* Prepare value for PRBAR_EL2 reg and preserve it in \prbar.*/
>> -    and   \base, \base, #MPU_REGION_MASK
>> -    mov   \prbar, #\attr_prbar
>> -    orr   \prbar, \prbar, \base
>> -
>> -    /* Limit address should be inclusive */
>> -    sub   \limit, \limit, #1
>> -    and   \limit, \limit, #MPU_REGION_MASK
>> -    mov   \prlar, #\attr_prlar
>> -    orr   \prlar, \prlar, \limit
>> -
>> -    msr   PRSELR_EL2, \sel
>> -    isb
>> -    msr   PRBAR_EL2, \prbar
>> -    msr   PRLAR_EL2, \prlar
>> -    dsb   sy
>> -    isb
>> -
>> -    add   \sel, \sel, #1
>> -
>> -1:
>> -.endm
>> -
>> -/*
>> - * Failure caused due to insufficient MPU regions.
>> - */
>> -FUNC_LOCAL(fail_insufficient_regions)
>> -    PRINT("- Selected MPU region is above the implemented number in MPUIR_EL2 -\r\n")
>> -1:  wfe
>> -    b   1b
>> -END(fail_insufficient_regions)
>> +#include 
>>   
>>   /*
>>    * Enable EL2 MPU and data cache
>> diff --git a/xen/arch/arm/include/asm/arm64/sysregs.h b/xen/arch/arm/include/asm/arm64/sysregs.h
>> index b593e4028b..3ee3715430 100644
>> --- a/xen/arch/arm/include/asm/arm64/sysregs.h
>> +++ b/xen/arch/arm/include/asm/arm64/sysregs.h
>> @@ -462,6 +462,15 @@
>>   #define ZCR_ELx_LEN_SIZE             9
>>   #define ZCR_ELx_LEN_MASK             0x1ff
>>   
>> +#define REGION_TEXT_PRBAR       0x38    /* SH=11 AP=10 XN=00 */
>> +#define REGION_RO_PRBAR         0x3A    /* SH=11 AP=10 XN=10 */
>> +#define REGION_DATA_PRBAR       0x32    /* SH=11 AP=00 XN=10 */
>> +#define REGION_DEVICE_PRBAR     0x22    /* SH=10 AP=00 XN=10 */
>> +
>> +#define WRITE_SYSREG_ASM(v, name) "msr " __stringify(name,) #v;
Agreed with your other points.
> 1) This macro is ASM only and you don't protect it like the C macros below. Why?

I have a weak argument for this. :)

You can write ""msr " __stringify(name,) #v" in the C files. However, 
you cannot write "uint64_t _r  ....." in the assembly files.

If you strongly prefer, I can enclose this within #ifdef __ASSEMBLY__

> 2) Semicolon not needed at the end

Ack.

- Ayan

>
> ~Michal
>


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Date: Wed, 9 Apr 2025 19:11:45 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Roger Pau =?utf-8?B?TW9ubsOp?= ,
	Stefano Stabellini ,
	Michal Orzel ,
	Anthony PERARD 
Subject: Re: [PATCH 7/8] Infrastructure for arm64 linux builds
Message-ID: 
References: <20250409163702.2037301-1-andrew.cooper3@citrix.com>
 <20250409163702.2037301-8-andrew.cooper3@citrix.com>
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Date: Wed, 9 Apr 2025 19:11:45 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Roger Pau =?utf-8?B?TW9ubsOp?= ,
	Stefano Stabellini ,
	Michal Orzel ,
	Anthony PERARD 
Subject: Re: [PATCH 7/8] Infrastructure for arm64 linux builds

On Wed, Apr 09, 2025 at 05:37:01PM +0100, Andrew Cooper wrote:
> Signed-off-by: Andrew Cooper 
> ---
> CC: Roger Pau Monn=C3=A9 
> CC: Stefano Stabellini 
> CC: Michal Orzel 
> CC: Marek Marczykowski-G=C3=B3recki 
> CC: Anthony PERARD 
> ---
>  .gitlab-ci.yml                            |  7 ++++++
>  containerize                              |  1 +
>  images/alpine/3.18-arm64-build.dockerfile | 27 +++++++++++++++++++++++
>  scripts/build-linux.sh                    | 10 +++++++++
>  4 files changed, 45 insertions(+)
>  create mode 100644 images/alpine/3.18-arm64-build.dockerfile
>=20
> diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
> index ff8dce7be05d..6e38c2f2a108 100644
> --- a/.gitlab-ci.yml
> +++ b/.gitlab-ci.yml
> @@ -19,6 +19,13 @@ stages:
>      exclude:
>        - binaries/.gitignore
> =20
> +.arm64-artifacts:
> +  extends: .artifacts
> +  tags:
> +    - arm64
> +  variables:
> +    CONTAINER: alpine:3.18-arm64-build

Arm64 kernel used to be built in a Bookworm container. The build in alpine
has "find: unrecognized: -printf" in the middle of the build. It doesn't
fail outright, but something might be broken. I guess it's related to
initramfs - maybe some option can be disabled, to avoid this message?

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Date: Wed, 9 Apr 2025 19:15:30 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Roger Pau =?utf-8?B?TW9ubsOp?= ,
	Stefano Stabellini ,
	Michal Orzel ,
	Anthony PERARD 
Subject: Re: [PATCH 4/8] Clean up Gitlab yaml
Message-ID: 
References: <20250409163702.2037301-1-andrew.cooper3@citrix.com>
 <20250409163702.2037301-5-andrew.cooper3@citrix.com>
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Date: Wed, 9 Apr 2025 19:15:30 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Roger Pau =?utf-8?B?TW9ubsOp?= ,
	Stefano Stabellini ,
	Michal Orzel ,
	Anthony PERARD 
Subject: Re: [PATCH 4/8] Clean up Gitlab yaml

On Wed, Apr 09, 2025 at 05:36:58PM +0100, Andrew Cooper wrote:
> Factor out the registry into a common location.  Fix the worflow name.  L=
ist
> all the stages.  Set a default expiry of 1 month.

This is okay, since last artifacts for a branch are preserved even if
expired.

> Note all the current jobs as legacy.  Their naming scheme needs changing,=
 and
> we'll use this opportunity to switch formats too.  However, the artefacts=
 need
> to stay using the old name until the final staging-* branch using them is
> phased out.

This could use a comment what should the new naming be.

> Signed-off-by: Andrew Cooper 
> ---
> CC: Roger Pau Monn=C3=A9 
> CC: Stefano Stabellini 
> CC: Michal Orzel 
> CC: Marek Marczykowski-G=C3=B3recki 
> CC: Anthony PERARD 
> ---
>  .gitlab-ci.yml | 14 ++++++++++++--
>  1 file changed, 12 insertions(+), 2 deletions(-)
>=20
> diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
> index 36ec6a7e1ee5..5a0a853e551d 100644
> --- a/.gitlab-ci.yml
> +++ b/.gitlab-ci.yml
> @@ -1,12 +1,19 @@
> +variables:
> +  REGISTRY: registry.gitlab.com/xen-project/hardware/test-artifacts
> +
>  workflow:
> -  name: "xen test artifacts"
> +  name: "Xen test artifacts"
> +
> +stages:
> +  - build
> =20
>  .artifacts:
>    stage: build
>    image:
> -    name: registry.gitlab.com/xen-project/hardware/test-artifacts/${CONT=
AINER}
> +    name: ${REGISTRY}/${CONTAINER}
>    artifacts:
>      name: "${CI_JOB_NAME_SLUG}"
> +    expire_in: 1 month
>      paths:
>        - binaries/
>      exclude:
> @@ -19,6 +26,9 @@ workflow:
>    variables:
>      CONTAINER: alpine:x86_64-build
> =20
> +#
> +# The jobs below here are legacy and being phased out.
> +#
>  x86_64-kernel-linux-6.6.56:
>    extends: .x86_64-artifacts
>    script:
> --=20
> 2.39.5
>=20

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Date: Wed, 9 Apr 2025 18:15:57 +0100
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Subject: Re: [PATCH 7/8] Infrastructure for arm64 linux builds
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Cc: Xen-devel ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Michal Orzel ,
 Anthony PERARD 
References: <20250409163702.2037301-1-andrew.cooper3@citrix.com>
 <20250409163702.2037301-8-andrew.cooper3@citrix.com>
 
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From: Andrew Cooper 
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Content-Type: text/plain; charset=UTF-8
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On 09/04/2025 6:11 pm, Marek Marczykowski-Górecki wrote:
> On Wed, Apr 09, 2025 at 05:37:01PM +0100, Andrew Cooper wrote:
>> Signed-off-by: Andrew Cooper 
>> ---
>> CC: Roger Pau Monné 
>> CC: Stefano Stabellini 
>> CC: Michal Orzel 
>> CC: Marek Marczykowski-Górecki 
>> CC: Anthony PERARD 
>> ---
>>  .gitlab-ci.yml                            |  7 ++++++
>>  containerize                              |  1 +
>>  images/alpine/3.18-arm64-build.dockerfile | 27 +++++++++++++++++++++++
>>  scripts/build-linux.sh                    | 10 +++++++++
>>  4 files changed, 45 insertions(+)
>>  create mode 100644 images/alpine/3.18-arm64-build.dockerfile
>>
>> diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
>> index ff8dce7be05d..6e38c2f2a108 100644
>> --- a/.gitlab-ci.yml
>> +++ b/.gitlab-ci.yml
>> @@ -19,6 +19,13 @@ stages:
>>      exclude:
>>        - binaries/.gitignore
>>  
>> +.arm64-artifacts:
>> +  extends: .artifacts
>> +  tags:
>> +    - arm64
>> +  variables:
>> +    CONTAINER: alpine:3.18-arm64-build
> Arm64 kernel used to be built in a Bookworm container.

So did x86 before they were moved across.

>  The build in alpine
> has "find: unrecognized: -printf" in the middle of the build. It doesn't
> fail outright, but something might be broken. I guess it's related to
> initramfs - maybe some option can be disabled, to avoid this message?

Nothing seems to break...

There's also a bad awk regex.  Alpine seem to fix this by using mawk,
except they then have to patch the Linux build system to take the
override properly.

I can't see anything obvious they do to fix this -printf warning.

~Andrew


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Cc: Xen-devel ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Michal Orzel ,
 Anthony PERARD 
References: <20250409163702.2037301-1-andrew.cooper3@citrix.com>
 <20250409163702.2037301-6-andrew.cooper3@citrix.com>
 
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On 09/04/2025 5:57 pm, Marek Marczykowski-Górecki wrote:
> On Wed, Apr 09, 2025 at 05:36:59PM +0100, Andrew Cooper wrote:
>> Also use 'tar o' to decompress based on file name.
> Do you mean 'tar a'? -o is --no-same-owner. Anyway, just 'tar xf'
> works too, even in alpine.

Hmm...  Muscle memory from long enough ago that I don't recall why.

Lets go with just xf then.

~Andrew


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Date: Wed, 09 Apr 2025 18:53:55 +0000
To: Alejandro Vallejo 
From: Denis Mukhin 
Cc: xen-devel@lists.xenproject.org, "Daniel P. Smith" , Jason Andryuk , Xenia Ragiadakou , Stefano Stabellini , Michal Orzel , Jan Beulich , Andrew Cooper , =?utf-8?Q?Roger_Pau_Monn=C3=A9?= , Denis Mukhin 
Subject: Re: [PATCH v3 06/16] x86/hyperlaunch: introduce the domain builder
Message-ID: 
In-Reply-To: <20250408160802.49870-7-agarciav@amd.com>
References: <20250408160802.49870-1-agarciav@amd.com> <20250408160802.49870-7-agarciav@amd.com>
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On Tuesday, April 8th, 2025 at 9:07 AM, Alejandro Vallejo  wrote:

>=20
>=20
> From: "Daniel P. Smith" dpsmith@apertussolutions.com
>=20
>=20
> Introduce the domain builder which is capable of consuming a device tree =
as the
> first boot module. If it finds a device tree as the first boot module, it=
 will
> set its type to BOOTMOD_FDT. This change only detects the boot module and
> continues to boot with slight change to the boot convention that the dom0
> kernel is no longer first boot module but is the second.
>=20
> No functional change intended.
>=20
> Signed-off-by: Daniel P. Smith dpsmith@apertussolutions.com
>=20
> Signed-off-by: Jason Andryuk jason.andryuk@amd.com
>=20
> ---
> v3:
> * Move obj-y +=3D domain-builder/
> * Remove blank line in Makefile
> * const in has_hyperlaunch_fdt()
> * CONFIG_LIBFDT rename
> * Use boot_info forward declaration
> * Rename domainbuilder.h to domain-builder.h
> * Add fdt NULL check
> ---
> xen/arch/x86/Makefile | 1 +
> xen/arch/x86/domain-builder/Kconfig | 2 +-
> xen/arch/x86/domain-builder/Makefile | 2 +
> xen/arch/x86/domain-builder/core.c | 57 +++++++++++++++++++++++
> xen/arch/x86/domain-builder/fdt.c | 37 +++++++++++++++
> xen/arch/x86/domain-builder/fdt.h | 21 +++++++++

I have a general question.

Wouldn't that make sense to use arch-independent placeholder for domain bui=
lder
code right from the starting point?

For example something like xen/common/domain-builder ?

My understanding is that there's a lot of code in the domain builder which
can be potentially shared/re-used with non-x86 architectures.

Also, that seems to align with the intention to have common arch-independen=
t
subsystems in the code base:

   https://docs.google.com/presentation/d/1q9cjJZLUxUo1YzMpCxVHuL-ZOGoFaO9h=
aHfRBK4i4Uc/edit?slide=3Did.g32afc87aef4_0_18#slide=3Did.g32afc87aef4_0_18

> xen/arch/x86/include/asm/bootinfo.h | 3 ++
> xen/arch/x86/include/asm/domain-builder.h | 8 ++++
> xen/arch/x86/setup.c | 17 ++++---
> 9 files changed, 141 insertions(+), 7 deletions(-)
> create mode 100644 xen/arch/x86/domain-builder/Makefile
> create mode 100644 xen/arch/x86/domain-builder/core.c
> create mode 100644 xen/arch/x86/domain-builder/fdt.c
> create mode 100644 xen/arch/x86/domain-builder/fdt.h
> create mode 100644 xen/arch/x86/include/asm/domain-builder.h
>=20
> diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
> index f59c9665fd..deae31d627 100644
> --- a/xen/arch/x86/Makefile
> +++ b/xen/arch/x86/Makefile
> @@ -1,6 +1,7 @@
> obj-y +=3D acpi/
> obj-y +=3D boot/
> obj-y +=3D cpu/
> +obj-y +=3D domain-builder/
> obj-y +=3D efi/
> obj-y +=3D genapic/
> obj-$(CONFIG_GUEST) +=3D guest/
> diff --git a/xen/arch/x86/domain-builder/Kconfig b/xen/arch/x86/domain-bu=
ilder/Kconfig
> index 8ed493c3b5..51d549c20d 100644
> --- a/xen/arch/x86/domain-builder/Kconfig
> +++ b/xen/arch/x86/domain-builder/Kconfig
> @@ -3,7 +3,7 @@ menu "Domain Builder Features"
>=20
> config DOMAIN_BUILDER
> bool "Domain builder (UNSUPPORTED)" if UNSUPPORTED
> - select LIB_DEVICE_TREE
> + select LIBFDT
> help
> Enables the domain builder capability to configure boot domain
> construction using a flattened device tree.
> diff --git a/xen/arch/x86/domain-builder/Makefile b/xen/arch/x86/domain-b=
uilder/Makefile
> new file mode 100644
> index 0000000000..b10cd56b28
> --- /dev/null
> +++ b/xen/arch/x86/domain-builder/Makefile
> @@ -0,0 +1,2 @@
> +obj-$(CONFIG_DOMAIN_BUILDER) +=3D fdt.init.o
> +obj-y +=3D core.init.o
> diff --git a/xen/arch/x86/domain-builder/core.c b/xen/arch/x86/domain-bui=
lder/core.c
> new file mode 100644
> index 0000000000..d6ae94f45c
> --- /dev/null
> +++ b/xen/arch/x86/domain-builder/core.c
> @@ -0,0 +1,57 @@
> +/* SPDX-License-Identifier: GPL-2.0-only /
> +/
> + * Copyright (C) 2024, Apertus Solutions, LLC
> + */
> +#include 
>=20
> +#include 
>=20
> +#include 
>=20
> +#include 
>=20
> +
> +#include 
>=20
> +
> +#include "fdt.h"
> +
> +void __init builder_init(struct boot_info *bi)
> +{
> + if ( IS_ENABLED(CONFIG_DOMAIN_BUILDER) )
> + {
> + int ret;
> +
> + switch ( ret =3D has_hyperlaunch_fdt(bi) )
> + {
> + case 0:
> + printk("Hyperlaunch device tree detected\n");
> + bi->hyperlaunch_enabled =3D true;
>=20
> + bi->mods[0].type =3D BOOTMOD_FDT;
>=20
> + break;
> +
> + case -EINVAL:
> + printk("Hyperlaunch device tree was not detected\n");
> + bi->hyperlaunch_enabled =3D false;
>=20
> + break;
> +
> + case -ENOENT:
> + case -ENODATA:
> + printk("Device tree found, but not hyperlaunch (%d)\n", ret);
> + bi->hyperlaunch_enabled =3D false;
>=20
> + bi->mods[0].type =3D BOOTMOD_FDT;
>=20
> + break;
> +
> + default:
> + printk("Unknown error (%d) occured checking for hyperlaunch device tree=
\n",
> + ret);
> + bi->hyperlaunch_enabled =3D false;
>=20
> + break;
> + }
> + }
> +}
> +
> +/*
> + * Local variables:
> + * mode: C
> + * c-file-style: "BSD"
> + * c-basic-offset: 4
> + * tab-width: 4
> + * indent-tabs-mode: nil
> + * End:
> + /
> diff --git a/xen/arch/x86/domain-builder/fdt.c b/xen/arch/x86/domain-buil=
der/fdt.c
> new file mode 100644
> index 0000000000..aaf8c1cc16
> --- /dev/null
> +++ b/xen/arch/x86/domain-builder/fdt.c
> @@ -0,0 +1,37 @@
> +/ SPDX-License-Identifier: GPL-2.0-only /
> +/
> + * Copyright (C) 2024, Apertus Solutions, LLC
> + */
> +#include 
>=20
> +#include 
>=20
> +#include 
>=20
> +#include 
>=20
> +
> +#include 
>=20
> +#include 
>=20
> +#include 
>=20
> +
> +#include "fdt.h"
> +
> +int __init has_hyperlaunch_fdt(const struct boot_info *bi)
> +{
> + int ret =3D 0;
> + const void *fdt =3D bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_IDX])=
;
>=20
> +
> + if ( !fdt || fdt_check_header(fdt) < 0 )
> + ret =3D -EINVAL;
> +
> + bootstrap_unmap();
> +
> + return ret;
> +}
> +
> +/*
> + * Local variables:
> + * mode: C
> + * c-file-style: "BSD"
> + * c-basic-offset: 4
> + * tab-width: 4
> + * indent-tabs-mode: nil
> + * End:
> + /
> diff --git a/xen/arch/x86/domain-builder/fdt.h b/xen/arch/x86/domain-buil=
der/fdt.h
> new file mode 100644
> index 0000000000..8e62cd843e
> --- /dev/null
> +++ b/xen/arch/x86/domain-builder/fdt.h
> @@ -0,0 +1,21 @@
> +/ SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */
> +#ifndef XEN_X86_FDT_H
> +#define XEN_X86_FDT_H
> +
> +#include 
>=20
> +
> +struct boot_info;
> +
> +/* hyperlaunch fdt is required to be module 0 */
> +#define HYPERLAUNCH_MODULE_IDX 0
> +
> +#ifdef CONFIG_DOMAIN_BUILDER
> +int has_hyperlaunch_fdt(const struct boot_info *bi);
> +#else
> +static inline int __init has_hyperlaunch_fdt(const struct boot_info bi)
> +{
> + return -EINVAL;
> +}
> +#endif
> +
> +#endif / XEN_X86_FDT_H */
> diff --git a/xen/arch/x86/include/asm/bootinfo.h b/xen/arch/x86/include/a=
sm/bootinfo.h
> index 3afc214c17..82c2650fcf 100644
> --- a/xen/arch/x86/include/asm/bootinfo.h
> +++ b/xen/arch/x86/include/asm/bootinfo.h
> @@ -27,6 +27,7 @@ enum bootmod_type {
> BOOTMOD_RAMDISK,
> BOOTMOD_MICROCODE,
> BOOTMOD_XSM_POLICY,
> + BOOTMOD_FDT,
> };
>=20
> struct boot_module {
> @@ -80,6 +81,8 @@ struct boot_info {
> paddr_t memmap_addr;
> size_t memmap_length;
>=20
> + bool hyperlaunch_enabled;
> +
> unsigned int nr_modules;
> struct boot_module mods[MAX_NR_BOOTMODS + 1];
> struct boot_domain domains[MAX_NR_BOOTDOMS];
> diff --git a/xen/arch/x86/include/asm/domain-builder.h b/xen/arch/x86/inc=
lude/asm/domain-builder.h
> new file mode 100644
> index 0000000000..b6d9ba94de
> --- /dev/null
> +++ b/xen/arch/x86/include/asm/domain-builder.h
> @@ -0,0 +1,8 @@
> +#ifndef XEN_X86_DOMBUILDER_H
> +#define XEN_X86_DOMBUILDER_H
> +
> +struct boot_info;
> +
> +void builder_init(struct boot_info *bi);
> +
> +#endif
> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
> index 83cb66e309..e5d78bcb48 100644
> --- a/xen/arch/x86/setup.c
> +++ b/xen/arch/x86/setup.c
> @@ -36,6 +36,7 @@
> #include 
>=20
> #include 
>=20
> #include 
>=20
> +#include 
>=20
> #include 
>=20
> #include 
>=20
> #include 
>=20
> @@ -1281,9 +1282,12 @@ void asmlinkage __init noreturn __start_xen(void)
> bi->nr_modules);
>=20
> }
>=20
> - /* Dom0 kernel is always first */
> - bi->mods[0].type =3D BOOTMOD_KERNEL;
>=20
> - bi->domains[0].kernel =3D &bi->mods[0];
>=20
> + builder_init(bi);
> +
> + /* Find first unknown boot module to use as Dom0 kernel */
> + i =3D first_boot_module_index(bi, BOOTMOD_UNKNOWN);
> + bi->mods[i].type =3D BOOTMOD_KERNEL;
>=20
> + bi->domains[0].kernel =3D &bi->mods[i];
>=20
>=20
> if ( pvh_boot )
> {
> @@ -1466,8 +1470,9 @@ void asmlinkage __init noreturn __start_xen(void)
> xen->size =3D __2M_rwdata_end - _stext;
>=20
> }
>=20
> - bi->mods[0].headroom =3D
>=20
> - bzimage_headroom(bootstrap_map_bm(&bi->mods[0]), bi->mods[0].size);
>=20
> + bi->domains[0].kernel->headroom =3D
>=20
> + bzimage_headroom(bootstrap_map_bm(bi->domains[0].kernel),
>=20
> + bi->domains[0].kernel->size);
>=20
> bootstrap_unmap();
>=20
> #ifndef highmem_start
> @@ -1591,7 +1596,7 @@ void asmlinkage __init noreturn __start_xen(void)
> #endif
> }
>=20
> - if ( bi->mods[0].headroom && !bi->mods[0].relocated )
>=20
> + if ( bi->domains[0].kernel->headroom && !bi->domains[0].kernel->relocat=
ed )
>=20
> panic("Not enough memory to relocate the dom0 kernel image\n");
> for ( i =3D 0; i < bi->nr_modules; ++i )
>=20
> {
> --
> 2.43.0


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Date: Wed, 09 Apr 2025 18:57:53 +0000
To: Alejandro Vallejo 
From: Denis Mukhin 
Cc: xen-devel@lists.xenproject.org, "Daniel P. Smith" , Jason Andryuk , Xenia Ragiadakou , Stefano Stabellini , Michal Orzel , Andrew Cooper , Anthony PERARD , Jan Beulich , Julien Grall , =?utf-8?Q?Roger_Pau_Monn=C3=A9?= , Denis Mukhin 
Subject: Re: [PATCH v3 04/16] kconfig: introduce option to independently enable libfdt
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On Tuesday, April 8th, 2025 at 9:07 AM, Alejandro Vallejo  wrote:

>=20
>=20
> From: "Daniel P. Smith" dpsmith@apertussolutions.com
>=20
>=20
> Currently, the inclusion of libfdt is controlled by the CONFIG_HAS_DEVICE=
_TREE
> kconfig flag. This flag also changes behavior in a few places, such as bo=
ot
> module processing for XSM. To support the ability to include libfdt witho=
ut
> changing these behaviors, introduce CONFIG_LIBFDT. The inclusion of
> libfdt is then moved under CONFIG_LIBFDT.
>=20
> Signed-off-by: Daniel P. Smith dpsmith@apertussolutions.com
>=20
> Signed-off-by: Jason Andryuk jason.andryuk@amd.com

Reviewed-by: Denis Mukhin 

>=20
> ---
> v3:
> * Use CONFIG_LIBFDT instead of CONFIG_HAS_DEVICET_TREE
> ---
> xen/common/Kconfig | 4 ++++
> xen/common/Makefile | 2 +-
> 2 files changed, 5 insertions(+), 1 deletion(-)
>=20
> diff --git a/xen/common/Kconfig b/xen/common/Kconfig
> index 06ae9751aa..00f74b1e32 100644
> --- a/xen/common/Kconfig
> +++ b/xen/common/Kconfig
> @@ -72,6 +72,7 @@ config HAS_COMPAT
>=20
> config HAS_DEVICE_TREE
> bool
> + select LIBFDT
>=20
> config HAS_DIT # Data Independent Timing
> bool
> @@ -106,6 +107,9 @@ config HAS_UBSAN
> config HAS_VMAP
> bool
>=20
> +config LIBFDT
> + bool
> +
> config MEM_ACCESS_ALWAYS_ON
> bool
>=20
> diff --git a/xen/common/Makefile b/xen/common/Makefile
> index 9da8a7244d..5a9041b0ee 100644
> --- a/xen/common/Makefile
> +++ b/xen/common/Makefile
> @@ -79,7 +79,7 @@ obj-y +=3D sched/
> obj-$(CONFIG_UBSAN) +=3D ubsan/
>=20
> obj-$(CONFIG_NEEDS_LIBELF) +=3D libelf/
> -obj-$(CONFIG_HAS_DEVICE_TREE) +=3D libfdt/
> +obj-$(CONFIG_LIBFDT) +=3D libfdt/
>=20
> CONF_FILE :=3D $(if $(patsubst /%,,$(KCONFIG_CONFIG)),$(objtree)/)$(KCONF=
IG_CONFIG)
> $(obj)/config.gz: $(CONF_FILE)
> --
> 2.43.0


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        Wed, 09 Apr 2025 12:01:53 -0700 (PDT)
From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v3] xen/riscv: Increase XEN_VIRT_SIZE
Date: Wed,  9 Apr 2025 21:01:50 +0200
Message-ID: 
X-Mailer: git-send-email 2.49.0
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A randconfig job failed with the following issue:
  riscv64-linux-gnu-ld: Xen too large for early-boot assumptions

The reason is that enabling the UBSAN config increased the size of
the Xen binary.

Increase XEN_VIRT_SIZE to reserve enough space, allowing both UBSAN
and GCOV to be enabled together, with some slack for future growth.

Additionally, add ASSERTs to verify that XEN_VIRT_START is 1GB-aligned
and XEN_VIRT_SIZE is 2MB-aligned to reduce the number of page tables
needed for the initial mapping. In the future, when 2MB mappings are
used for .text (rx), .rodata (r), and .data (rw), this will also help
reduce TLB pressure.

Reported-by: Andrew Cooper 
Signed-off-by: Oleksii Kurochko 
---
Changes in v3:
 - Add ASSERT which checks .init* sections range. When Xen ends boot
   init* sections are going to be released.
 - Introduce is_init_section() macros.
 - Correct fixmap end address in RISCV-64 layour table.
 - Update ASSERT() which checks that `va` is in Xen virtual address
   range and drop BUILD_BUG_ON() as it isn't necessary anymore with
   the way how the ASSERT() looks now.
 - Add ASSERT() which checks that XEN_VIRT_START is 1gb aligned and
   add ASSERT() which checks that XEN_VIRT_SIZE is 2mb aligned.
   It helps us to reduce an amount of PGTBL_INITIAL_COUNT.
 - Update PGTBL_INITIAL_COUNT and the comment above.
 - Update the commit message.
---
Changes in v2:
 - Incerease XEN_VIRT_SIZE to 16 Mb to cover also the case if 2M mappings will
   be used for .text (rx), .rodata(r), and .data (rw).
 - Update layout table in config.h.
 - s/xen_virt_starn_vpn/xen_virt_start_vpn
 - Update BUILD_BUG_ON(... != MB(8)) check to "... > GB(1)".
 - Update definition of PGTBL_INITIAL_COUNT and the comment above.
---

 xen/arch/riscv/include/asm/config.h |  8 ++++----
 xen/arch/riscv/include/asm/mm.h     | 20 +++++++++++++++++---
 xen/arch/riscv/mm.c                 | 22 +++++++++++++---------
 xen/arch/riscv/xen.lds.S            |  4 ++++
 4 files changed, 38 insertions(+), 16 deletions(-)

diff --git a/xen/arch/riscv/include/asm/config.h b/xen/arch/riscv/include/asm/config.h
index 7141bd9e46..5eba626f27 100644
--- a/xen/arch/riscv/include/asm/config.h
+++ b/xen/arch/riscv/include/asm/config.h
@@ -41,11 +41,11 @@
  * Start addr          | End addr         | Slot       | area description
  * ============================================================================
  *                   .....                 L2 511          Unused
- *  0xffffffffc0a00000  0xffffffffc0bfffff L2 511          Fixmap
+ *  0xffffffffc1800000  0xffffffffc19fffff L2 511          Fixmap
  *                   ..... ( 2 MB gap )
- *  0xffffffffc0400000  0xffffffffc07fffff L2 511          FDT
+ *  0xffffffffc1200000  0xffffffffc15fffff L2 511          FDT
  *                   ..... ( 2 MB gap )
- *  0xffffffffc0000000  0xffffffffc01fffff L2 511          Xen
+ *  0xffffffffc0000000  0xffffffffc0ffffff L2 511          Xen
  *                   .....                 L2 510          Unused
  *  0x3200000000        0x7f7fffffff       L2 200-509      Direct map
  *                   .....                 L2 199          Unused
@@ -78,7 +78,7 @@
 
 #define GAP_SIZE                MB(2)
 
-#define XEN_VIRT_SIZE           MB(2)
+#define XEN_VIRT_SIZE           MB(16)
 
 #define BOOT_FDT_VIRT_START     (XEN_VIRT_START + XEN_VIRT_SIZE + GAP_SIZE)
 #define BOOT_FDT_VIRT_SIZE      MB(4)
diff --git a/xen/arch/riscv/include/asm/mm.h b/xen/arch/riscv/include/asm/mm.h
index 4035cd400a..1b0c4299c6 100644
--- a/xen/arch/riscv/include/asm/mm.h
+++ b/xen/arch/riscv/include/asm/mm.h
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -35,6 +36,11 @@ static inline void *maddr_to_virt(paddr_t ma)
     return (void *)va;
 }
 
+#define is_init_section(p) ({                   \
+    char *p_ = (char *)(unsigned long)(p);      \
+    (p_ >= __init_begin) && (p_ < __init_end);  \
+})
+
 /*
  * virt_to_maddr() is expected to work with virtual addresses from either
  * the directmap region or Xen's linkage (XEN_VIRT_START) region.
@@ -43,13 +49,21 @@ static inline void *maddr_to_virt(paddr_t ma)
  */
 static inline unsigned long virt_to_maddr(unsigned long va)
 {
+    const unsigned long xen_size = (unsigned long)(_end - _start);
+    const unsigned long xen_virt_start = _AC(XEN_VIRT_START, UL);
+    const unsigned long xen_virt_end = xen_virt_start + xen_size - 1;
+
     if ((va >= DIRECTMAP_VIRT_START) &&
         (va <= DIRECTMAP_VIRT_END))
         return directmapoff_to_maddr(va - directmap_virt_start);
 
-    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(2));
-    ASSERT((va >> (PAGETABLE_ORDER + PAGE_SHIFT)) ==
-           (_AC(XEN_VIRT_START, UL) >> (PAGETABLE_ORDER + PAGE_SHIFT)));
+    ASSERT((va >= xen_virt_start) && (va <= xen_virt_end));
+
+    /*
+    * The .init* sections will be freed when Xen completes booting,
+    * so the [__init_begin, __init_end] range must be excluded.
+    */
+    ASSERT((system_state != SYS_STATE_active) || !is_init_section(va));
 
     /* phys_offset = load_start - XEN_VIRT_START */
     return phys_offset + va;
diff --git a/xen/arch/riscv/mm.c b/xen/arch/riscv/mm.c
index f2bf279bac..064ae1ddc7 100644
--- a/xen/arch/riscv/mm.c
+++ b/xen/arch/riscv/mm.c
@@ -31,20 +31,24 @@ unsigned long __ro_after_init phys_offset; /* = load_start - XEN_VIRT_START */
 #define LOAD_TO_LINK(addr) ((unsigned long)(addr) - phys_offset)
 
 /*
- * It is expected that Xen won't be more then 2 MB.
+ * It is expected that Xen won't be more then XEN_VIRT_SIZE MB.
  * The check in xen.lds.S guarantees that.
- * At least 3 page tables (in case of Sv39 ) are needed to cover 2 MB.
- * One for each page level table with PAGE_SIZE = 4 Kb.
  *
- * One L0 page table can cover 2 MB(512 entries of one page table * PAGE_SIZE).
+ * Root page table is shared with the initial mapping and is declared
+ * separetely. (look at stage1_pgtbl_root)
  *
- * It might be needed one more page table in case when Xen load address
- * isn't 2 MB aligned.
+ * An amount of page tables between root page table and L0 page table
+ * (in the case of Sv39 it covers L1 table):
+ *   (CONFIG_PAGING_LEVELS - 2) are needed for an identity mapping and
+ *   the same amount are needed for Xen.
  *
- * CONFIG_PAGING_LEVELS page tables are needed for the identity mapping,
- * except that the root page table is shared with the initial mapping
+ * An amount of L0 page tables:
+ *   (512 entries of one L0 page table covers 2MB == 1<> XEN_PT_LEVEL_SHIFT(1) are needed for Xen and
+ *   one L0 is needed for indenity mapping.
  */
-#define PGTBL_INITIAL_COUNT ((CONFIG_PAGING_LEVELS - 1) * 2 + 1)
+#define PGTBL_INITIAL_COUNT ((CONFIG_PAGING_LEVELS - 2) * 2 + \
+                             (XEN_VIRT_SIZE >> XEN_PT_LEVEL_SHIFT(1)))
 
 pte_t __section(".bss.page_aligned") __aligned(PAGE_SIZE)
 stage1_pgtbl_root[PAGETABLE_ENTRIES];
diff --git a/xen/arch/riscv/xen.lds.S b/xen/arch/riscv/xen.lds.S
index dffc6ae119..91e10b8e52 100644
--- a/xen/arch/riscv/xen.lds.S
+++ b/xen/arch/riscv/xen.lds.S
@@ -178,4 +178,8 @@ ASSERT(!SIZEOF(.got.plt),  ".got.plt non-empty")
  */
 ASSERT(_end - _start <= XEN_VIRT_SIZE, "Xen too large for early-boot assumptions")
 
+/* Changing these ASSERTs can require an update of PGTBL_INITIAL_COUNT */
+ASSERT(IS_ALIGNED(XEN_VIRT_START, GB(1)), "XEN_VIRT_START should be 1gb aligned")
+ASSERT(IS_ALIGNED(XEN_VIRT_SIZE, MB(2)), "XEN_VIRT_SIZE should be 2mb aligned")
+
 ASSERT(_ident_end - _ident_start <= IDENT_AREA_SIZE, "identity region is too big");
-- 
2.49.0



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Date: Wed, 9 Apr 2025 21:17:02 +0200
From: Ingo Molnar 
To: Xin Li 
Cc: "H. Peter Anvin" , linux-kernel@vger.kernel.org,
	linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
	virtualization@lists.linux.dev, linux-edac@vger.kernel.org,
	kvm@vger.kernel.org, xen-devel@lists.xenproject.org,
	linux-ide@vger.kernel.org, linux-pm@vger.kernel.org,
	bpf@vger.kernel.org, llvm@lists.linux.dev, tglx@linutronix.de,
	mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com,
	x86@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
	peterz@infradead.org, acme@kernel.org, namhyung@kernel.org,
	mark.rutland@arm.com, alexander.shishkin@linux.intel.com,
	jolsa@kernel.org, irogers@google.com, adrian.hunter@intel.com,
	kan.liang@linux.intel.com, wei.liu@kernel.org,
	ajay.kaher@broadcom.com, bcm-kernel-feedback-list@broadcom.com,
	tony.luck@intel.com, pbonzini@redhat.com, vkuznets@redhat.com,
	seanjc@google.com, luto@kernel.org, boris.ostrovsky@oracle.com,
	kys@microsoft.com, haiyangz@microsoft.com, decui@microsoft.com,
	Linus Torvalds 
Subject: [PATCH] x86/msr: Standardize on 'u32' MSR indices in 
Message-ID: 
References: <20250331082251.3171276-1-xin@zytor.com>
 <20250331082251.3171276-2-xin@zytor.com>
 
 <9D15DE81-2E68-4FCD-A133-4963602E18C9@zytor.com>
 
 
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
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In-Reply-To: 


* Xin Li  wrote:

> On 4/1/2025 12:52 AM, Ingo Molnar wrote:
> > > Should we rename the *msrl() functions to *msrq() as part of this
> > > overhaul?
> > Yeah, that's a good idea, and because talk is cheap I just implemented
> > this in the tip:WIP.x86/msr branch with a couple of other cleanups in
> > this area (see the shortlog & diffstat below), but the churn is high:
> > 
> >    144 files changed, 1034 insertions(+), 1034 deletions(-)
> 
> Hi Ingo,
> 
> I noticed that you keep the type of MSR index in these patches as
> "unsigned int".
> 
> I'm thinking would it be better to standardize it as "u32"?
> 
> Because:
> 1) MSR index is placed in ECX to execute MSR instructions, and the
>    high-order 32 bits of RCX are ignored on 64-bit.
> 2) MSR index is encoded as a 32-bit immediate in the new immediate form
>    MSR instructions.

Makes sense - something like the attached patch?

Thanks,

	Ingo

=====================>
From: Ingo Molnar 
Date: Wed, 9 Apr 2025 21:12:39 +0200
Subject: [PATCH] x86/msr: Standardize on 'u32' MSR indices in 

This is the customary type used for hardware ABIs.

Suggested-by: Xin Li 
Suggested-by: "H. Peter Anvin" 
Signed-off-by: Ingo Molnar 
---
 arch/x86/include/asm/msr.h | 29 ++++++++++++++---------------
 arch/x86/lib/msr.c         |  4 ++--
 2 files changed, 16 insertions(+), 17 deletions(-)

diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 4ee9ae734c08..20deb58308e5 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -63,12 +63,12 @@ struct saved_msrs {
 DECLARE_TRACEPOINT(read_msr);
 DECLARE_TRACEPOINT(write_msr);
 DECLARE_TRACEPOINT(rdpmc);
-extern void do_trace_write_msr(unsigned int msr, u64 val, int failed);
-extern void do_trace_read_msr(unsigned int msr, u64 val, int failed);
+extern void do_trace_write_msr(u32 msr, u64 val, int failed);
+extern void do_trace_read_msr(u32 msr, u64 val, int failed);
 extern void do_trace_rdpmc(u32 msr, u64 val, int failed);
 #else
-static inline void do_trace_write_msr(unsigned int msr, u64 val, int failed) {}
-static inline void do_trace_read_msr(unsigned int msr, u64 val, int failed) {}
+static inline void do_trace_write_msr(u32 msr, u64 val, int failed) {}
+static inline void do_trace_read_msr(u32 msr, u64 val, int failed) {}
 static inline void do_trace_rdpmc(u32 msr, u64 val, int failed) {}
 #endif
 
@@ -79,7 +79,7 @@ static inline void do_trace_rdpmc(u32 msr, u64 val, int failed) {}
  * think of extending them - you will be slapped with a stinking trout or a frozen
  * shark will reach you, wherever you are! You've been warned.
  */
-static __always_inline u64 __rdmsr(unsigned int msr)
+static __always_inline u64 __rdmsr(u32 msr)
 {
 	DECLARE_ARGS(val, low, high);
 
@@ -91,7 +91,7 @@ static __always_inline u64 __rdmsr(unsigned int msr)
 	return EAX_EDX_VAL(val, low, high);
 }
 
-static __always_inline void __wrmsr(unsigned int msr, u32 low, u32 high)
+static __always_inline void __wrmsr(u32 msr, u32 low, u32 high)
 {
 	asm volatile("1: wrmsr\n"
 		     "2:\n"
@@ -113,7 +113,7 @@ do {							\
 	__wrmsr((msr), (u32)((u64)(val)),		\
 		       (u32)((u64)(val) >> 32))
 
-static inline u64 native_read_msr(unsigned int msr)
+static inline u64 native_read_msr(u32 msr)
 {
 	u64 val;
 
@@ -125,8 +125,7 @@ static inline u64 native_read_msr(unsigned int msr)
 	return val;
 }
 
-static inline u64 native_read_msr_safe(unsigned int msr,
-						      int *err)
+static inline u64 native_read_msr_safe(u32 msr, int *err)
 {
 	DECLARE_ARGS(val, low, high);
 
@@ -142,7 +141,7 @@ static inline u64 native_read_msr_safe(unsigned int msr,
 
 /* Can be uninlined because referenced by paravirt */
 static inline void notrace
-native_write_msr(unsigned int msr, u32 low, u32 high)
+native_write_msr(u32 msr, u32 low, u32 high)
 {
 	__wrmsr(msr, low, high);
 
@@ -152,7 +151,7 @@ native_write_msr(unsigned int msr, u32 low, u32 high)
 
 /* Can be uninlined because referenced by paravirt */
 static inline int notrace
-native_write_msr_safe(unsigned int msr, u32 low, u32 high)
+native_write_msr_safe(u32 msr, u32 low, u32 high)
 {
 	int err;
 
@@ -251,7 +250,7 @@ do {								\
 	(void)((high) = (u32)(__val >> 32));			\
 } while (0)
 
-static inline void wrmsr(unsigned int msr, u32 low, u32 high)
+static inline void wrmsr(u32 msr, u32 low, u32 high)
 {
 	native_write_msr(msr, low, high);
 }
@@ -259,13 +258,13 @@ static inline void wrmsr(unsigned int msr, u32 low, u32 high)
 #define rdmsrq(msr, val)			\
 	((val) = native_read_msr((msr)))
 
-static inline void wrmsrq(unsigned int msr, u64 val)
+static inline void wrmsrq(u32 msr, u64 val)
 {
 	native_write_msr(msr, (u32)(val & 0xffffffffULL), (u32)(val >> 32));
 }
 
 /* wrmsr with exception handling */
-static inline int wrmsr_safe(unsigned int msr, u32 low, u32 high)
+static inline int wrmsr_safe(u32 msr, u32 low, u32 high)
 {
 	return native_write_msr_safe(msr, low, high);
 }
@@ -280,7 +279,7 @@ static inline int wrmsr_safe(unsigned int msr, u32 low, u32 high)
 	__err;							\
 })
 
-static inline int rdmsrq_safe(unsigned int msr, u64 *p)
+static inline int rdmsrq_safe(u32 msr, u64 *p)
 {
 	int err;
 
diff --git a/arch/x86/lib/msr.c b/arch/x86/lib/msr.c
index e18925899f13..4ef7c6dcbea6 100644
--- a/arch/x86/lib/msr.c
+++ b/arch/x86/lib/msr.c
@@ -122,14 +122,14 @@ int msr_clear_bit(u32 msr, u8 bit)
 EXPORT_SYMBOL_GPL(msr_clear_bit);
 
 #ifdef CONFIG_TRACEPOINTS
-void do_trace_write_msr(unsigned int msr, u64 val, int failed)
+void do_trace_write_msr(u32 msr, u64 val, int failed)
 {
 	trace_write_msr(msr, val, failed);
 }
 EXPORT_SYMBOL(do_trace_write_msr);
 EXPORT_TRACEPOINT_SYMBOL(write_msr);
 
-void do_trace_read_msr(unsigned int msr, u64 val, int failed)
+void do_trace_read_msr(u32 msr, u64 val, int failed)
 {
 	trace_read_msr(msr, val, failed);
 }


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Date: Wed, 9 Apr 2025 21:53:59 +0200
From: Ingo Molnar 
To: "H. Peter Anvin" 
Cc: Dave Hansen , Xin Li ,
	linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
	linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
	linux-edac@vger.kernel.org, kvm@vger.kernel.org,
	xen-devel@lists.xenproject.org, linux-ide@vger.kernel.org,
	linux-pm@vger.kernel.org, bpf@vger.kernel.org, llvm@lists.linux.dev,
	tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
	dave.hansen@linux.intel.com, x86@kernel.org, jgross@suse.com,
	andrew.cooper3@citrix.com, peterz@infradead.org, acme@kernel.org,
	namhyung@kernel.org, mark.rutland@arm.com,
	alexander.shishkin@linux.intel.com, jolsa@kernel.org,
	irogers@google.com, adrian.hunter@intel.com,
	kan.liang@linux.intel.com, wei.liu@kernel.org,
	ajay.kaher@broadcom.com, alexey.amakhalov@broadcom.com,
	bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
	pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
	luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
	haiyangz@microsoft.com, decui@microsoft.com
Subject: Re: [RFC PATCH v1 01/15] x86/msr: Replace __wrmsr() with
 native_wrmsrl()
Message-ID: 
References: <20250331082251.3171276-1-xin@zytor.com>
 <20250331082251.3171276-2-xin@zytor.com>
 
 <9D15DE81-2E68-4FCD-A133-4963602E18C9@zytor.com>
 
 
 
MIME-Version: 1.0
Content-Type: text/plain; charset=iso-8859-1
Content-Disposition: inline
Content-Transfer-Encoding: 8bit
In-Reply-To: 


* H. Peter Anvin  wrote:

> On April 2, 2025 8:41:07 AM PDT, Dave Hansen  wrote:
> >On 3/31/25 22:53, Xin Li wrote:
> >> Per "struct msr" defined in arch/x86/include/asm/shared/msr.h:
> >> 
> >> struct msr {
> >>  union {
> >>  struct {
> >>  u32 l;
> >>  u32 h;
> >>  };
> >>  u64 q;
> >>  };
> >> };
> >> 
> >> Probably *msrq() is what we want?
> >
> > What would folks think about "wrmsr64()"? It's writing a 64-bit 
> > value to an MSR and there are a lot of functions in the kernel that 
> > are named with the argument width in bits.
> 
> Personally, I hate the extra verbosity, mostly visual, since numerals 
> are nearly as prominent as capital letters they tend to attract the 
> eye. There is a reason why they aren't used this way in assembly 
> languages.

So what's the consensus here? Both work for me, but I have to pick one. :-)

Thanks,

	Ingo


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Message-ID: <29ad84a6-b40c-456a-9eed-9887c87dfb38@intel.com>
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Subject: Re: [RFC PATCH v1 01/15] x86/msr: Replace __wrmsr() with
 native_wrmsrl()
To: Ingo Molnar , "H. Peter Anvin" 
Cc: Xin Li , linux-kernel@vger.kernel.org,
 linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
 virtualization@lists.linux.dev, linux-edac@vger.kernel.org,
 kvm@vger.kernel.org, xen-devel@lists.xenproject.org,
 linux-ide@vger.kernel.org, linux-pm@vger.kernel.org, bpf@vger.kernel.org,
 llvm@lists.linux.dev, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
 dave.hansen@linux.intel.com, x86@kernel.org, jgross@suse.com,
 andrew.cooper3@citrix.com, peterz@infradead.org, acme@kernel.org,
 namhyung@kernel.org, mark.rutland@arm.com,
 alexander.shishkin@linux.intel.com, jolsa@kernel.org, irogers@google.com,
 adrian.hunter@intel.com, kan.liang@linux.intel.com, wei.liu@kernel.org,
 ajay.kaher@broadcom.com, alexey.amakhalov@broadcom.com,
 bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
 pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
 luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
 haiyangz@microsoft.com, decui@microsoft.com
References: <20250331082251.3171276-1-xin@zytor.com>
 <20250331082251.3171276-2-xin@zytor.com> 
 <9D15DE81-2E68-4FCD-A133-4963602E18C9@zytor.com>
 
 
  
From: Dave Hansen 
Content-Language: en-US
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In-Reply-To: 
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On 4/9/25 12:53, Ingo Molnar wrote:
>>> What would folks think about "wrmsr64()"? It's writing a 64-bit 
>>> value to an MSR and there are a lot of functions in the kernel that 
>>> are named with the argument width in bits.
>> Personally, I hate the extra verbosity, mostly visual, since numerals 
>> are nearly as prominent as capital letters they tend to attract the 
>> eye. There is a reason why they aren't used this way in assembly 
>> languages.
> So what's the consensus here? Both work for me, but I have to pick one. 🙂

I don't feel strongly about it. You're not going to hurt my feelings if
you pick the "q" one, so go for "q" unless you have a real preference.


From xen-devel-bounces@lists.xenproject.org Wed Apr 09 20:11:34 2025
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Date: Wed, 9 Apr 2025 22:11:11 +0200
From: Ingo Molnar 
To: Dave Hansen 
Cc: "H. Peter Anvin" , Xin Li ,
	linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
	linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
	linux-edac@vger.kernel.org, kvm@vger.kernel.org,
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	linux-pm@vger.kernel.org, bpf@vger.kernel.org, llvm@lists.linux.dev,
	tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
	dave.hansen@linux.intel.com, x86@kernel.org, jgross@suse.com,
	andrew.cooper3@citrix.com, peterz@infradead.org, acme@kernel.org,
	namhyung@kernel.org, mark.rutland@arm.com,
	alexander.shishkin@linux.intel.com, jolsa@kernel.org,
	irogers@google.com, adrian.hunter@intel.com,
	kan.liang@linux.intel.com, wei.liu@kernel.org,
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	luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
	haiyangz@microsoft.com, decui@microsoft.com
Subject: Re: [RFC PATCH v1 01/15] x86/msr: Replace __wrmsr() with
 native_wrmsrl()
Message-ID: 
References: <20250331082251.3171276-1-xin@zytor.com>
 <20250331082251.3171276-2-xin@zytor.com>
 
 <9D15DE81-2E68-4FCD-A133-4963602E18C9@zytor.com>
 
 
 
 
 <29ad84a6-b40c-456a-9eed-9887c87dfb38@intel.com>
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* Dave Hansen  wrote:

> On 4/9/25 12:53, Ingo Molnar wrote:
> >>> What would folks think about "wrmsr64()"? It's writing a 64-bit 
> >>> value to an MSR and there are a lot of functions in the kernel that 
> >>> are named with the argument width in bits.
> >> Personally, I hate the extra verbosity, mostly visual, since numerals 
> >> are nearly as prominent as capital letters they tend to attract the 
> >> eye. There is a reason why they aren't used this way in assembly 
> >> languages.
> > So what's the consensus here? Both work for me, but I have to pick one. 🙂
> 
> I don't feel strongly about it. You're not going to hurt my feelings if
> you pick the "q" one, so go for "q" unless you have a real preference.

Ok, since hpa seems to hate the wrmsr64()/rdmsr64() names due to the 
numeric verbosity, I'll go with wrmsrq()/rdmsrq().

Thanks,

	Ingo



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Date: Wed, 09 Apr 2025 21:05:18 +0000
To: Alejandro Vallejo 
From: Denis Mukhin 
Cc: xen-devel@lists.xenproject.org, "Daniel P. Smith" , Jason Andryuk , Xenia Ragiadakou , Stefano Stabellini , Michal Orzel , Jan Beulich , Andrew Cooper , =?utf-8?Q?Roger_Pau_Monn=C3=A9?= 
Subject: Re: [PATCH v3 03/16] x86/boot: add cmdline to struct boot_domain
Message-ID: 
In-Reply-To: <20250408160802.49870-4-agarciav@amd.com>
References: <20250408160802.49870-1-agarciav@amd.com> <20250408160802.49870-4-agarciav@amd.com>
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On Tuesday, April 8th, 2025 at 9:07 AM, Alejandro Vallejo  wrote:

>=20
>=20
> From: "Daniel P. Smith" dpsmith@apertussolutions.com
>=20
>=20
> Add a container for the "cooked" command line for a domain. This
> provides for the backing memory to be directly associated with the
> domain being constructed. This is done in anticipation that the domain
> construction path may need to be invoked multiple times, thus ensuring
> each instance had a distinct memory allocation.
>=20
> Signed-off-by: Daniel P. Smith dpsmith@apertussolutions.com
>=20
> Signed-off-by: Jason Andryuk jason.andryuk@amd.com
>=20
> Signed-off-by: Alejandro Vallejo agarciav@amd.com
>=20
> ---
> No changes on ACPI cmdline handling on PVH, as it's orthogonal to the
> purpose of this patch.
>=20
> v3:
> * s/xfree/XFREE/ on failed construct_dom0() to avoid a dangling
> cmdline ptr.
> * Re-flow hvm_copy_to_guest_phys() into a multi-line call.
> * s/bd->cmdline !=3D NULL/b->cmdline/ (to homogenise with the previous
>=20
> cmdline pointer check)
> ---
> xen/arch/x86/hvm/dom0_build.c | 12 +++----
> xen/arch/x86/include/asm/boot-domain.h | 1 +
> xen/arch/x86/pv/dom0_build.c | 4 +--
> xen/arch/x86/setup.c | 50 +++++++++++++++++++-------
> 4 files changed, 47 insertions(+), 20 deletions(-)
>=20
> diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build.=
c
> index 2a094b3145..ebad5a49b8 100644
> --- a/xen/arch/x86/hvm/dom0_build.c
> +++ b/xen/arch/x86/hvm/dom0_build.c
> @@ -653,7 +653,6 @@ static int __init pvh_load_kernel(
> void *image_start =3D image_base + image->headroom;
>=20
> unsigned long image_len =3D image->size;
>=20
> unsigned long initrd_len =3D initrd ? initrd->size : 0;
>=20
> - const char *cmdline =3D image->cmdline_pa ? __va(image->cmdline_pa) : N=
ULL;
>=20
> const char *initrd_cmdline =3D NULL;
> struct elf_binary elf;
> struct elf_dom_parms parms;
> @@ -736,8 +735,8 @@ static int __init pvh_load_kernel(
> initrd =3D NULL;
> }
>=20
> - if ( cmdline )
> - extra_space +=3D elf_round_up(&elf, strlen(cmdline) + 1);
> + if ( bd->cmdline )
>=20
> + extra_space +=3D elf_round_up(&elf, strlen(bd->cmdline) + 1);

I think it makes sense to use local variable to cache the results of=20

  strlen(bd->cmdline) + 1

since the construct is used multiple times within pvh_load_kernel()

E.g. cmdline_len similarly to {image,initrd}_len.

>=20
>=20
> last_addr =3D find_memory(d, &elf, extra_space);
> if ( last_addr =3D=3D INVALID_PADDR )
> @@ -778,9 +777,10 @@ static int __init pvh_load_kernel(
> /* Free temporary buffers. */
> free_boot_modules();
>=20
> - if ( cmdline !=3D NULL )
> + if ( bd->cmdline )
>=20
> {
> - rc =3D hvm_copy_to_guest_phys(last_addr, cmdline, strlen(cmdline) + 1, =
v);
> + rc =3D hvm_copy_to_guest_phys(last_addr, bd->cmdline,
>=20
> + strlen(bd->cmdline) + 1, v);
>=20
> if ( rc )
> {
> printk("Unable to copy guest command line\n");
> @@ -791,7 +791,7 @@ static int __init pvh_load_kernel(
> * Round up to 32/64 bits (depending on the guest kernel bitness) so
> * the modlist/start_info is aligned.
> */
> - last_addr +=3D elf_round_up(&elf, strlen(cmdline) + 1);
> + last_addr +=3D elf_round_up(&elf, strlen(bd->cmdline) + 1);
>=20
> }
> if ( initrd !=3D NULL )
> {
> diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/includ=
e/asm/boot-domain.h
> index fcbedda0f0..d7c6042e25 100644
> --- a/xen/arch/x86/include/asm/boot-domain.h
> +++ b/xen/arch/x86/include/asm/boot-domain.h
> @@ -15,6 +15,7 @@ struct boot_domain {
>=20
> struct boot_module *kernel;
> struct boot_module *module;
> + const char *cmdline;
>=20
> struct domain *d;
> };
> diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c
> index b485eea05f..e1b78d47c2 100644
> --- a/xen/arch/x86/pv/dom0_build.c
> +++ b/xen/arch/x86/pv/dom0_build.c
> @@ -972,8 +972,8 @@ static int __init dom0_construct(const struct boot_do=
main *bd)
> }
>=20
> memset(si->cmd_line, 0, sizeof(si->cmd_line));
>=20
> - if ( image->cmdline_pa )
>=20
> - strlcpy((char *)si->cmd_line, __va(image->cmdline_pa), sizeof(si->cmd_l=
ine));
>=20
> + if ( bd->cmdline )
>=20
> + strlcpy((char *)si->cmd_line, bd->cmdline, sizeof(si->cmd_line));
>=20
>=20
> #ifdef CONFIG_VIDEO
> if ( !pv_shim && fill_console_start_info((void *)(si + 1)) )
> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
> index 585316f1ca..83cb66e309 100644
> --- a/xen/arch/x86/setup.c
> +++ b/xen/arch/x86/setup.c
> @@ -978,10 +978,30 @@ static unsigned int __init copy_bios_e820(struct e8=
20entry *map, unsigned int li
> return n;
> }
>=20
> -static struct domain *__init create_dom0(struct boot_info *bi)
> +static size_t __init domain_cmdline_size(
> + struct boot_info *bi, struct boot_domain *bd)
> {
> - static char __initdata cmdline[MAX_GUEST_CMDLINE];
> + size_t s =3D bi->kextra ? strlen(bi->kextra) : 0;
>=20
> +
> + s +=3D bd->kernel->cmdline_pa ? strlen(__va(bd->kernel->cmdline_pa)) : =
0;
>=20
>=20
> + if ( s =3D=3D 0 )
> + return s;
> +
> + /*
> + * Certain parameters from the Xen command line may be added to the dom0
> + * command line. Add additional space for the possible cases along with =
one
> + * extra char to hold \0.
> + */
> + s +=3D strlen(" noapic") + strlen(" acpi=3D") + sizeof(acpi_param) + 1;
> +
> + return s;
> +}
> +
> +static struct domain *__init create_dom0(struct boot_info *bi)
> +{
> + char *cmdline =3D NULL;
> + size_t cmdline_size;
> struct xen_domctl_createdomain dom0_cfg =3D {
> .flags =3D IS_ENABLED(CONFIG_TBOOT) ? XEN_DOMCTL_CDF_s3_integrity : 0,
> .max_evtchn_port =3D -1,
> @@ -1020,20 +1040,24 @@ static struct domain *__init create_dom0(struct b=
oot_info bi)
> if ( alloc_dom0_vcpu0(d) =3D=3D NULL )
> panic("Error creating %pd vcpu 0\n", d);
>=20
> - / Grab the DOM0 command line. */
> - if ( bd->kernel->cmdline_pa || bi->kextra )
>=20
> + cmdline_size =3D domain_cmdline_size(bi, bd);
> + if ( cmdline_size )
> {
> + if ( !(cmdline =3D xzalloc_array(char, cmdline_size)) )
> + panic("Error allocating cmdline buffer for %pd\n", d);
> +
> if ( bd->kernel->cmdline_pa )
>=20
> - safe_strcpy(cmdline,
> - cmdline_cook(__va(bd->kernel->cmdline_pa), bi->loader));
>=20
> + strlcpy(cmdline,
> + cmdline_cook(__va(bd->kernel->cmdline_pa), bi->loader),
>=20
> + cmdline_size);
>=20
> if ( bi->kextra )
>=20
> /* kextra always includes exactly one leading space. */
> - safe_strcat(cmdline, bi->kextra);
>=20
> + strlcat(cmdline, bi->kextra, cmdline_size);
>=20
>=20
> /* Append any extra parameters. */
> if ( skip_ioapic_setup && !strstr(cmdline, "noapic") )
> - safe_strcat(cmdline, " noapic");
> + strlcat(cmdline, " noapic", cmdline_size);
>=20
> if ( (strlen(acpi_param) =3D=3D 0) && acpi_disabled )
> {
> @@ -1043,17 +1067,19 @@ static struct domain *__init create_dom0(struct b=
oot_info *bi)
>=20
> if ( (strlen(acpi_param) !=3D 0) && !strstr(cmdline, "acpi=3D") )
> {
> - safe_strcat(cmdline, " acpi=3D");
> - safe_strcat(cmdline, acpi_param);
> + strlcat(cmdline, " acpi=3D", cmdline_size);
> + strlcat(cmdline, acpi_param, cmdline_size);
> }
> -
> - bd->kernel->cmdline_pa =3D __pa(cmdline);
>=20
> + bd->kernel->cmdline_pa =3D 0;
>=20
> + bd->cmdline =3D cmdline;
>=20
> }
>=20
> bd->d =3D d;
>=20
> if ( construct_dom0(bd) !=3D 0 )
> panic("Could not construct domain 0\n");
>=20
> + XFREE(cmdline);
> +
> return d;
> }
>=20
> --
> 2.43.0


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Date: Wed, 09 Apr 2025 21:24:17 +0000
To: Alejandro Vallejo 
From: Denis Mukhin 
Cc: xen-devel@lists.xenproject.org, "Daniel P. Smith" , Jason Andryuk , Xenia Ragiadakou , Stefano Stabellini , Michal Orzel , Jan Beulich , Andrew Cooper , =?utf-8?Q?Roger_Pau_Monn=C3=A9?= 
Subject: Re: [PATCH v3 09/16] x86/hyperlaunch: locate dom0 kernel with hyperlaunch
Message-ID: 
In-Reply-To: <20250408160802.49870-10-agarciav@amd.com>
References: <20250408160802.49870-1-agarciav@amd.com> <20250408160802.49870-10-agarciav@amd.com>
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On Tuesday, April 8th, 2025 at 9:07 AM, Alejandro Vallejo  wrote:

>=20
>=20
> From: "Daniel P. Smith" dpsmith@apertussolutions.com
>=20
>=20
> Look for a subnode of type `multiboot,kernel` within a domain node. If
> found, locate it using the multiboot module helper to generically ensure
> it lives in the module list. If the bootargs property is present and
> there was not an MB1 string, then use the command line from the device
> tree definition.
>=20
> Signed-off-by: Daniel P. Smith dpsmith@apertussolutions.com
>=20
> Signed-off-by: Jason Andryuk jason.andryuk@amd.com
>=20
> Signed-off-by: Alejandro Vallejo agarciav@amd.com
>=20
> ---
> v3:
> * Add const to fdt
> * Remove idx =3D=3D NULL checks
> * Add BUILD_BUG_ON for MAX_NR_BOOTMODS fitting in a uint32_t
> * Remove trailing ) from printks
> * Return ENODATA for missing kernel
> * Re-work "max domains" warning and print limit
> * fdt_cell_as_u32/directly return values
> * Remove "pairs" looping from fdt_get_reg_prop() and only grab 1.
> * Use addr_cells and size_cells
> ---
> xen/arch/x86/domain-builder/core.c | 11 ++++++
> xen/arch/x86/domain-builder/fdt.c | 57 ++++++++++++++++++++++++++++++
> xen/arch/x86/setup.c | 5 ---
> 3 files changed, 68 insertions(+), 5 deletions(-)
>=20
> diff --git a/xen/arch/x86/domain-builder/core.c b/xen/arch/x86/domain-bui=
lder/core.c
> index c50eff34fb..eda7fa7a8f 100644
> --- a/xen/arch/x86/domain-builder/core.c
> +++ b/xen/arch/x86/domain-builder/core.c
> @@ -59,6 +59,17 @@ void __init builder_init(struct boot_info *bi)
>=20
> printk(XENLOG_INFO " Number of domains: %d\n", bi->nr_domains);
>=20
> }
> + else
> + {
> + unsigned int i;
> +
> + /* Find first unknown boot module to use as Dom0 kernel */
> + printk("Falling back to using first boot module as dom0\n");
> + i =3D first_boot_module_index(bi, BOOTMOD_UNKNOWN);
> + bi->mods[i].type =3D BOOTMOD_KERNEL;
>=20
> + bi->domains[0].kernel =3D &bi->mods[i];
>=20
> + bi->nr_domains =3D 1;
>=20
> + }
> }
>=20
> /*
> diff --git a/xen/arch/x86/domain-builder/fdt.c b/xen/arch/x86/domain-buil=
der/fdt.c
> index 9ebc8fd0e4..a037c8b6cb 100644
> --- a/xen/arch/x86/domain-builder/fdt.c
> +++ b/xen/arch/x86/domain-builder/fdt.c
> @@ -155,6 +155,52 @@ int __init fdt_read_multiboot_module(const void *fdt=
, int node,
> return idx;
> }
>=20
> +static int __init process_domain_node(
> + struct boot_info *bi, const void *fdt, int dom_node)
> +{
> + int node;
> + struct boot_domain *bd =3D &bi->domains[bi->nr_domains];
>=20
> + const char *name =3D fdt_get_name(fdt, dom_node, NULL) ?: "unknown";
> + int address_cells =3D fdt_address_cells(fdt, dom_node);
> + int size_cells =3D fdt_size_cells(fdt, dom_node);
> +
> + fdt_for_each_subnode(node, fdt, dom_node)
> + {
> + if ( fdt_node_check_compatible(fdt, node, "multiboot,kernel") =3D=3D 0 =
)
> + {
> + int idx;
> +
> + if ( bd->kernel )
>=20
> + {
> + printk(XENLOG_ERR "Duplicate kernel module for domain %s\n",

Looks like it should be XENLOG_WARNING since the loop continues.

Also, I would use either Capitalized or lower case messages everywhere
for consistency.

> + name);
> + continue;
> + }
> +
> + idx =3D fdt_read_multiboot_module(fdt, node, address_cells,
> + size_cells, bi);
> + if ( idx < 0 )
> + {
> + printk(" failed processing kernel module for domain %s\n",

I think this printout should have XENLOG_ERR in it since it's on the
error code path.

> + name);
> + return idx;
> + }
> +
> + printk(" kernel: boot module %d\n", idx);
> + bi->mods[idx].type =3D BOOTMOD_KERNEL;
>=20
> + bd->kernel =3D &bi->mods[idx];
>=20
> + }
> + }
> +
> + if ( !bd->kernel )
>=20
> + {
> + printk(XENLOG_ERR "ERR: no kernel assigned to domain\n");

Drop "ERR" since it is already XENLOG_ERR level?

> + return -ENODATA;
> + }
> +
> + return 0;
> +}
> +
> static int __init find_hyperlaunch_node(const void *fdt)
> {
> int hv_node =3D fdt_path_offset(fdt, "/chosen/hypervisor");
> @@ -217,9 +263,20 @@ int __init walk_hyperlaunch_fdt(struct boot_info *bi=
)
>=20
> fdt_for_each_subnode(node, fdt, hv_node)
> {
> + if ( bi->nr_domains >=3D MAX_NR_BOOTDOMS )
>=20
> + {
> + printk(XENLOG_WARNING
> + "WARN: only creating first %u domains\n", MAX_NR_BOOTDOMS);

Drop "WARN" since it is already XENLOG_WARNING level?

> + break;
> + }
> +
> ret =3D fdt_node_check_compatible(fdt, node, "xen,domain");
> if ( ret =3D=3D 0 )
> + {
> + if ( (ret =3D process_domain_node(bi, fdt, node)) < 0 )
> + break;
> bi->nr_domains++;
>=20
> + }
> }
>=20
> /* Until multi-domain construction is added, throw an error /
> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
> index e5d78bcb48..00e8c8a2a3 100644
> --- a/xen/arch/x86/setup.c
> +++ b/xen/arch/x86/setup.c
> @@ -1284,11 +1284,6 @@ void asmlinkage __init noreturn __start_xen(void)
>=20
> builder_init(bi);
>=20
> - / Find first unknown boot module to use as Dom0 kernel */
> - i =3D first_boot_module_index(bi, BOOTMOD_UNKNOWN);
> - bi->mods[i].type =3D BOOTMOD_KERNEL;
>=20
> - bi->domains[0].kernel =3D &bi->mods[i];
>=20
> -
> if ( pvh_boot )
> {
> /* pvh_init() already filled in e820_raw */
> --
> 2.43.0


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Date: Wed, 09 Apr 2025 22:04:16 +0000
To: Alejandro Vallejo 
From: Denis Mukhin 
Cc: xen-devel@lists.xenproject.org, "Daniel P. Smith" , Jason Andryuk , Xenia Ragiadakou , Stefano Stabellini , Michal Orzel , Jan Beulich , Andrew Cooper , =?utf-8?Q?Roger_Pau_Monn=C3=A9?= , Julien Grall , Bertrand Marquis 
Subject: Re: [PATCH v3 10/16] x86/hyperlaunch: obtain cmdline from device tree
Message-ID: 
In-Reply-To: <20250408160802.49870-11-agarciav@amd.com>
References: <20250408160802.49870-1-agarciav@amd.com> <20250408160802.49870-11-agarciav@amd.com>
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On Tuesday, April 8th, 2025 at 9:07 AM, Alejandro Vallejo  wrote:

>=20
>=20
> From: "Daniel P. Smith" dpsmith@apertussolutions.com
>=20
>=20
> Add support to read the command line from the hyperlauunch device tree.
> The device tree command line is located in the "bootargs" property of the
> "multiboot,kernel" node.
>=20
> A boot loader command line, e.g. a grub module string field, takes
> precendence ove the device tree one since it is easier to modify.
>=20
> Signed-off-by: Daniel P. Smith dpsmith@apertussolutions.com
>=20
> Signed-off-by: Jason Andryuk jason.andryuk@amd.com
>=20
> ---
> v3:
> * Rename to fdt_get_prop_offset()
> * Remove size_t cast from builder_get_cmdline_size()
> * fdt_get_prop_offset() use strcmp()
> * fdt_get_prop_offset() return bool
> ---
> xen/arch/x86/domain-builder/core.c | 28 +++++++++++++++++++++++
> xen/arch/x86/domain-builder/fdt.c | 6 +++++
> xen/arch/x86/domain-builder/fdt.h | 25 ++++++++++++++++++++
> xen/arch/x86/include/asm/bootinfo.h | 6 +++--
> xen/arch/x86/include/asm/domain-builder.h | 4 ++++
> xen/arch/x86/setup.c | 12 +++++++---
> xen/include/xen/libfdt/libfdt-xen.h | 23 +++++++++++++++++++
> 7 files changed, 99 insertions(+), 5 deletions(-)
>=20
> diff --git a/xen/arch/x86/domain-builder/core.c b/xen/arch/x86/domain-bui=
lder/core.c
> index eda7fa7a8f..510a74a675 100644
> --- a/xen/arch/x86/domain-builder/core.c
> +++ b/xen/arch/x86/domain-builder/core.c
> @@ -8,9 +8,37 @@
> #include 
>=20
>=20
> #include 
>=20
> +#include 
>=20
>=20
> #include "fdt.h"
>=20
> +size_t __init builder_get_cmdline_size(struct boot_info *bi, int offset)
> +{
> +#ifdef CONFIG_DOMAIN_BUILDER
> + const void *fdt =3D bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_IDX])=
;
>=20
> + int size =3D fdt_cmdline_prop_size(fdt, offset);
> +
> + bootstrap_unmap();
> + return size < 0 ? 0 : size;
> +#else
> + return 0;
> +#endif
> +}
> +
> +int __init builder_get_cmdline(
> + struct boot_info *bi, int offset, char *cmdline, size_t size)
> +{
> +#ifdef CONFIG_DOMAIN_BUILDER
> + const void *fdt =3D bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_IDX])=
;
>=20
> + int ret =3D fdt_cmdline_prop_copy(fdt, offset, cmdline, size);
> +
> + bootstrap_unmap();
> + return ret;
> +#else
> + return 0;
> +#endif
> +}
> +
> void __init builder_init(struct boot_info *bi)
> {
> if ( IS_ENABLED(CONFIG_DOMAIN_BUILDER) )
> diff --git a/xen/arch/x86/domain-builder/fdt.c b/xen/arch/x86/domain-buil=
der/fdt.c
> index a037c8b6cb..bc9903a9de 100644
> --- a/xen/arch/x86/domain-builder/fdt.c
> +++ b/xen/arch/x86/domain-builder/fdt.c
> @@ -189,6 +189,12 @@ static int __init process_domain_node(
> printk(" kernel: boot module %d\n", idx);
> bi->mods[idx].type =3D BOOTMOD_KERNEL;
>=20
> bd->kernel =3D &bi->mods[idx];
>=20
> +
> + /* If bootloader didn't set cmdline, see if FDT provides one. */
> + if ( bd->kernel->cmdline_pa &&
>=20
> + !((char *)__va(bd->kernel->cmdline_pa))[0] )
>=20
> + bd->kernel->fdt_cmdline =3D fdt_get_prop_offset(
>=20
> + fdt, node, "bootargs", &bd->kernel->cmdline_pa);
>=20
> }
> }
>=20
> diff --git a/xen/arch/x86/domain-builder/fdt.h b/xen/arch/x86/domain-buil=
der/fdt.h
> index e8769dc51c..91f665c8fd 100644
> --- a/xen/arch/x86/domain-builder/fdt.h
> +++ b/xen/arch/x86/domain-builder/fdt.h
> @@ -12,6 +12,31 @@ struct boot_info;
> #define HYPERLAUNCH_MODULE_IDX 0
>=20
> #ifdef CONFIG_DOMAIN_BUILDER
> +
> +static inline int __init fdt_cmdline_prop_size(const void *fdt, int offs=
et)
> +{
> + int ret;
> +
> + fdt_get_property_by_offset(fdt, offset, &ret);
> +
> + return ret;
> +}
> +
> +static inline int __init fdt_cmdline_prop_copy(
> + const void *fdt, int offset, char *cmdline, size_t size)
> +{
> + int ret;
> + const struct fdt_property *prop =3D
> + fdt_get_property_by_offset(fdt, offset, &ret);
> +
> + if ( ret < 0 )
> + return ret;
> +
> + ASSERT(size > ret);
>=20
> +
> + return strlcpy(cmdline, prop->data, ret);
>=20
> +}
> +
> int has_hyperlaunch_fdt(const struct boot_info *bi);
> int walk_hyperlaunch_fdt(struct boot_info bi);
> #else
> diff --git a/xen/arch/x86/include/asm/bootinfo.h b/xen/arch/x86/include/a=
sm/bootinfo.h
> index 1e3d582e45..5b2c93b1ef 100644
> --- a/xen/arch/x86/include/asm/bootinfo.h
> +++ b/xen/arch/x86/include/asm/bootinfo.h
> @@ -35,11 +35,13 @@ struct boot_module {
>=20
> /
> * Module State Flags:
> - * relocated: indicates module has been relocated in memory.
> - * released: indicates module's pages have been freed.
> + * relocated: indicates module has been relocated in memory.
> + * released: indicates module's pages have been freed.
> + * fdt_cmdline: indicates module's cmdline is in the FDT.
> /
> bool relocated:1;
> bool released:1;
> + bool fdt_cmdline:1;
>=20
> /
> * A boot module may need decompressing by Xen. Headroom is an estimate of
> diff --git a/xen/arch/x86/include/asm/domain-builder.h b/xen/arch/x86/inc=
lude/asm/domain-builder.h
> index b6d9ba94de..7518b6ddf3 100644
> --- a/xen/arch/x86/include/asm/domain-builder.h
> +++ b/xen/arch/x86/include/asm/domain-builder.h
> @@ -3,6 +3,10 @@
>=20
> struct boot_info;
>=20
> +size_t __init builder_get_cmdline_size(struct boot_info *bi, int offset)=
;
> +int __init builder_get_cmdline(
> + struct boot_info *bi, int offset, char *cmdline, size_t size);
> +
> void builder_init(struct boot_info *bi);
>=20
> #endif
> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
> index 00e8c8a2a3..ca4415d020 100644
> --- a/xen/arch/x86/setup.c
> +++ b/xen/arch/x86/setup.c
> @@ -984,7 +984,10 @@ static size_t __init domain_cmdline_size(
> {
> size_t s =3D bi->kextra ? strlen(bi->kextra) : 0;
>=20
>=20
> - s +=3D bd->kernel->cmdline_pa ? strlen(__va(bd->kernel->cmdline_pa)) : =
0;
>=20
> + if ( bd->kernel->fdt_cmdline )
>=20
> + s +=3D builder_get_cmdline_size(bi, bd->kernel->cmdline_pa);
>=20
> + else
> + s +=3D strlen(__va(bd->kernel->cmdline_pa));
>=20
>=20
> if ( s =3D=3D 0 )
> return s;
> @@ -1047,9 +1050,12 @@ static struct domain *__init create_dom0(struct bo=
ot_info *bi)
> if ( !(cmdline =3D xzalloc_array(char, cmdline_size)) )
> panic("Error allocating cmdline buffer for %pd\n", d);
>=20
> - if ( bd->kernel->cmdline_pa )
>=20
> + if ( bd->kernel->fdt_cmdline )
>=20
> + builder_get_cmdline(
> + bi, bd->kernel->cmdline_pa, cmdline, cmdline_size);
>=20
> + else
> strlcpy(cmdline,
> - cmdline_cook(__va(bd->kernel->cmdline_pa), bi->loader),
>=20
> + cmdline_cook(__va(bd->kernel->cmdline_pa),bi->loader),

Add extra space before bi->loader?

>=20
> cmdline_size);
>=20
> if ( bi->kextra )
>=20
> diff --git a/xen/include/xen/libfdt/libfdt-xen.h b/xen/include/xen/libfdt=
/libfdt-xen.h
> index 2259c09a6a..e473fbaf0c 100644
> --- a/xen/include/xen/libfdt/libfdt-xen.h
> +++ b/xen/include/xen/libfdt/libfdt-xen.h
> @@ -23,6 +23,29 @@ static inline uint64_t __init fdt_cell_as_u64(const fd=
t32_t *cell)
> return ((uint64_t)fdt32_to_cpu(cell[0]) << 32) | fdt32_to_cpu(cell[1]);
> }
>=20
> +static inline bool __init fdt_get_prop_offset(
> + const void *fdt, int node, const char *name, unsigned long *offset)
> +{
> + int ret, poffset;
> + const char *pname;
> +
> + fdt_for_each_property_offset(poffset, fdt, node)
> + {
> + fdt_getprop_by_offset(fdt, poffset, &pname, &ret);

Return value is not checked.

> +
> + if ( ret < 0 )
> + continue;
> +
> + if ( strcmp(pname, name) =3D=3D 0 )

I got an impression that the preferred form is=20
   if ( !strcmp(pname, name) )

> + {
> + offset =3D poffset;
> + return true;
> + }
> + }
> +
> + return false;
> +}
> +
> /
> * Property: reg
> *
> --
> 2.43.0


From xen-devel-bounces@lists.xenproject.org Wed Apr 09 22:07:32 2025
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Date: Wed, 09 Apr 2025 22:07:13 +0000
To: Alejandro Vallejo 
From: Denis Mukhin 
Cc: xen-devel@lists.xenproject.org, "Daniel P. Smith" , Jason Andryuk , Xenia Ragiadakou , Stefano Stabellini , Michal Orzel , Jan Beulich , Andrew Cooper , =?utf-8?Q?Roger_Pau_Monn=C3=A9?= 
Subject: Re: [PATCH v3 11/16] x86/hyperlaunch: locate dom0 initrd with hyperlaunch
Message-ID: <7yfsIOlu7485oxHgd2L0b32KqzOfx7cJg8-ZwVb41T2NljBamLliFUysp7IM4fSh-DvmZD1H-9Gh2pjpSdIrXkUbbo3pxRV3h3P2TglHJlA=@proton.me>
In-Reply-To: <20250408160802.49870-12-agarciav@amd.com>
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On Tuesday, April 8th, 2025 at 9:07 AM, Alejandro Vallejo  wrote:

>=20
>=20
> From: "Daniel P. Smith" dpsmith@apertussolutions.com
>=20
>=20
> Look for a subnode of type `multiboot,ramdisk` within a domain node and
> parse via the fdt_read_multiboot_module() helper. After a successful
> helper call, the module index is returned and the module is guaranteed
> to be in the module list.
>=20
> Fix unused typo in adjacent comment.
>=20
> Signed-off-by: Daniel P. Smith dpsmith@apertussolutions.com
>=20
> Signed-off-by: Jason Andryuk jason.andryuk@amd.com
>=20
> Signed-off-by: Alejandro Vallejo agarciav@amd.com
>=20
> ---
> v3:
> * Reworded commit message to state the helper postconditions.
> * Wrapped long line
> * Fix ramdisk -> module rename
>=20
> * Move ramdisk parsing from later patch
> * Remove initrdidx indent
> ---
> xen/arch/x86/domain-builder/fdt.c | 29 +++++++++++++++++++++++++++++
> xen/arch/x86/setup.c | 4 ++--
> 2 files changed, 31 insertions(+), 2 deletions(-)
>=20
> diff --git a/xen/arch/x86/domain-builder/fdt.c b/xen/arch/x86/domain-buil=
der/fdt.c
> index bc9903a9de..0f5fd01557 100644
> --- a/xen/arch/x86/domain-builder/fdt.c
> +++ b/xen/arch/x86/domain-builder/fdt.c
> @@ -195,6 +195,35 @@ static int __init process_domain_node(
> !((char *)__va(bd->kernel->cmdline_pa))[0] )
>=20
> bd->kernel->fdt_cmdline =3D fdt_get_prop_offset(
>=20
> fdt, node, "bootargs", &bd->kernel->cmdline_pa);
>=20
> +
> + continue;
> + }
> + else if ( fdt_node_check_compatible(fdt, node,
> + "multiboot,ramdisk") =3D=3D 0 )
> + {
> + int idx;
> +
> + if ( bd->module )
>=20
> + {
> + printk(XENLOG_ERR "Duplicate ramdisk module for domain %s)\n",

I would start the message with lower case so it is consistent with the othe=
r one.

> + name);
> + continue;
> + }
> +
> + idx =3D fdt_read_multiboot_module(fdt, node, address_cells,
> + size_cells,bi);
> + if ( idx < 0 )
> + {
> + printk(" failed processing ramdisk module for domain %s\n",
> + name);

Prepend the log message with XENLOG_ERR ?

> + return -EINVAL;
> + }
> +
> + printk(" ramdisk: boot module %d\n", idx);
> + bi->mods[idx].type =3D BOOTMOD_RAMDISK;
>=20
> + bd->module =3D &bi->mods[idx];
>=20
> +
> + continue;
> }
> }
>=20
> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
> index ca4415d020..3dfa81b48c 100644
> --- a/xen/arch/x86/setup.c
> +++ b/xen/arch/x86/setup.c
> @@ -2149,11 +2149,11 @@ void asmlinkage __init noreturn __start_xen(void)
> * At this point all capabilities that consume boot modules should have
> * claimed their boot modules. Find the first unclaimed boot module and
> * claim it as the initrd ramdisk. Do a second search to see if there are
> - * any remaining unclaimed boot modules, and report them as unusued init=
rd
> + * any remaining unclaimed boot modules, and report them as unused initr=
d
> * candidates.
> */
> initrdidx =3D first_boot_module_index(bi, BOOTMOD_UNKNOWN);
> - if ( initrdidx < MAX_NR_BOOTMODS )
> + if ( !bi->hyperlaunch_enabled && initrdidx < MAX_NR_BOOTMODS )
>=20
> {
> bi->mods[initrdidx].type =3D BOOTMOD_RAMDISK;
>=20
> bi->domains[0].module =3D &bi->mods[initrdidx];
>=20
> --
> 2.43.0


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Date: Wed, 09 Apr 2025 22:15:18 +0000
To: Alejandro Vallejo 
From: Denis Mukhin 
Cc: xen-devel@lists.xenproject.org, "Daniel P. Smith" , Jason Andryuk , Xenia Ragiadakou , Stefano Stabellini , Michal Orzel , Jan Beulich , Andrew Cooper , =?utf-8?Q?Roger_Pau_Monn=C3=A9?= , Julien Grall , Bertrand Marquis 
Subject: Re: [PATCH v3 12/16] x86/hyperlaunch: add domain id parsing to domain config
Message-ID: 
In-Reply-To: <20250408160802.49870-13-agarciav@amd.com>
References: <20250408160802.49870-1-agarciav@amd.com> <20250408160802.49870-13-agarciav@amd.com>
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On Tuesday, April 8th, 2025 at 9:07 AM, Alejandro Vallejo  wrote:

>=20
>=20
> From: "Daniel P. Smith" dpsmith@apertussolutions.com
>=20
>=20
> Introduce the ability to specify the desired domain id for the domain
> definition. The domain id will be populated in the domid property of the
> domain
> node in the device tree configuration.
>=20
> Signed-off-by: Daniel P. Smith dpsmith@apertussolutions.com
>=20
> ---
> v3:
> * Remove ramdisk parsing
> * Add missing xen/errno.h include
> ---
> xen/arch/x86/domain-builder/fdt.c | 39 ++++++++++++++++++++++++++++-
> xen/arch/x86/setup.c | 5 ++--
> xen/include/xen/libfdt/libfdt-xen.h | 11 ++++++++
> 3 files changed, 52 insertions(+), 3 deletions(-)
>=20
> diff --git a/xen/arch/x86/domain-builder/fdt.c b/xen/arch/x86/domain-buil=
der/fdt.c
> index 0f5fd01557..4c6aafe195 100644
> --- a/xen/arch/x86/domain-builder/fdt.c
> +++ b/xen/arch/x86/domain-builder/fdt.c
> @@ -8,6 +8,7 @@
> #include 
>=20
>=20
> #include 
>=20
> +#include 
>=20
> #include 
>=20
> #include 
>=20
>=20
> @@ -158,12 +159,42 @@ int __init fdt_read_multiboot_module(const void *fd=
t, int node,
> static int __init process_domain_node(
> struct boot_info *bi, const void *fdt, int dom_node)
> {
> - int node;
> + int node, property;
> struct boot_domain *bd =3D &bi->domains[bi->nr_domains];
>=20
> const char *name =3D fdt_get_name(fdt, dom_node, NULL) ?: "unknown";
> int address_cells =3D fdt_address_cells(fdt, dom_node);
> int size_cells =3D fdt_size_cells(fdt, dom_node);
>=20
> + fdt_for_each_property_offset(property, fdt, dom_node)
> + {
> + const struct fdt_property *prop;
> + const char prop_name;
> + int name_len;
> +
> + prop =3D fdt_get_property_by_offset(fdt, property, NULL);
> + if ( !prop )
> + continue; / silently skip */
> +
> + prop_name =3D fdt_get_string(fdt, fdt32_to_cpu(prop->nameoff), &name_le=
n);
>=20
> +
> + if ( strncmp(prop_name, "domid", name_len) =3D=3D 0 )
> + {
> + uint32_t val =3D DOMID_INVALID;
> + if ( fdt_prop_as_u32(prop, &val) !=3D 0 )
> + {
> + printk(" failed processing domain id for domain %s\n", name);

Add XENLOG_ERR ?

> + return -EINVAL;
> + }
> + if ( val >=3D DOMID_FIRST_RESERVED )
>=20
> + {
> + printk(" invalid domain id for domain %s\n", name);

Add XENLOG_ERR ?

> + return -EINVAL;
> + }
> + bd->domid =3D (domid_t)val;
>=20
> + printk(" domid: %d\n", bd->domid);
>=20
> + }
> + }
> +
> fdt_for_each_subnode(node, fdt, dom_node)
> {
> if ( fdt_node_check_compatible(fdt, node, "multiboot,kernel") =3D=3D 0 )
> @@ -233,6 +264,12 @@ static int __init process_domain_node(
> return -ENODATA;
> }
>=20
> + if ( bd->domid =3D=3D DOMID_INVALID )
>=20
> + bd->domid =3D get_initial_domain_id();
>=20
> + else if ( bd->domid !=3D get_initial_domain_id() )
>=20
> + printk(XENLOG_WARNING
> + "WARN: Booting without initial domid not supported.\n");

Drop WARN since the log message is XENLOG_WARNING level already?

> +
> return 0;
> }
>=20
> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
> index 3dfa81b48c..db7280225e 100644
> --- a/xen/arch/x86/setup.c
> +++ b/xen/arch/x86/setup.c
> @@ -1033,8 +1033,9 @@ static struct domain *__init create_dom0(struct boo=
t_info bi)
> if ( iommu_enabled )
> dom0_cfg.flags |=3D XEN_DOMCTL_CDF_iommu;
>=20
> - / Create initial domain. Not d0 for pvshim. */
> - bd->domid =3D get_initial_domain_id();
>=20
> + if ( bd->domid =3D=3D DOMID_INVALID )
>=20
> + /* Create initial domain. Not d0 for pvshim. */
> + bd->domid =3D get_initial_domain_id();
>=20
> d =3D domain_create(bd->domid, &dom0_cfg, pv_shim ? 0 : CDF_privileged);
>=20
> if ( IS_ERR(d) )
> panic("Error creating d%u: %ld\n", bd->domid, PTR_ERR(d));
>=20
> diff --git a/xen/include/xen/libfdt/libfdt-xen.h b/xen/include/xen/libfdt=
/libfdt-xen.h
> index e473fbaf0c..3031bec90e 100644
> --- a/xen/include/xen/libfdt/libfdt-xen.h
> +++ b/xen/include/xen/libfdt/libfdt-xen.h
> @@ -12,6 +12,7 @@
> #define LIBFDT_XEN_H
>=20
> #include 
>=20
> +#include 
>=20
>=20
> static inline int __init fdt_cell_as_u32(const fdt32_t *cell)
> {
> @@ -23,6 +24,16 @@ static inline uint64_t __init fdt_cell_as_u64(const fd=
t32_t *cell)
> return ((uint64_t)fdt32_to_cpu(cell[0]) << 32) | fdt32_to_cpu(cell[1]);
> }
>=20
> +static inline int __init fdt_prop_as_u32(
> + const struct fdt_property *prop, uint32_t *val)
> +{
> + if ( !prop || fdt32_to_cpu(prop->len) < sizeof(u32) )
>=20
> + return -EINVAL;
> +
> + *val =3D fdt_cell_as_u32((fdt32_t *)prop->data);
>=20
> + return 0;
> +}
> +
> static inline bool __init fdt_get_prop_offset(
> const void *fdt, int node, const char *name, unsigned long *offset)
> {
> --
> 2.43.0


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Date: Wed, 09 Apr 2025 22:24:36 +0000
To: Alejandro Vallejo 
From: Denis Mukhin 
Cc: xen-devel@lists.xenproject.org, "Daniel P. Smith" , Jason Andryuk , Xenia Ragiadakou , Stefano Stabellini , Michal Orzel , Jan Beulich , Andrew Cooper , =?utf-8?Q?Roger_Pau_Monn=C3=A9?= 
Subject: Re: [PATCH v3 13/16] x86/hyperlaunch: specify dom0 mode with device tree
Message-ID: 
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On Tuesday, April 8th, 2025 at 9:07 AM, Alejandro Vallejo  wrote:

>=20
>=20
> From: "Daniel P. Smith" dpsmith@apertussolutions.com
>=20
>=20
> Enable selecting the mode in which the domain will be built and ran. This
> includes:
>=20
> - whether it will be either a 32/64 bit domain
> - if it will be run as a PV or HVM domain
> - and if it will require a device model (not applicable for dom0)
>=20
> In the device tree, this will be represented as a bit map that will be ca=
rried
> through into struct boot_domain.
>=20
> Signed-off-by: Daniel P. Smith dpsmith@apertussolutions.com
>=20
> Reviewed-by: Jason Andryuk jason.andryuk@amd.com
>=20
> ---
> xen/arch/x86/domain-builder/fdt.c | 19 +++++++++++++++++++
> xen/arch/x86/include/asm/boot-domain.h | 5 +++++
> xen/arch/x86/setup.c | 3 ++-
> 3 files changed, 26 insertions(+), 1 deletion(-)
>=20
> diff --git a/xen/arch/x86/domain-builder/fdt.c b/xen/arch/x86/domain-buil=
der/fdt.c
> index 4c6aafe195..da65f6a5a0 100644
> --- a/xen/arch/x86/domain-builder/fdt.c
> +++ b/xen/arch/x86/domain-builder/fdt.c
> @@ -193,6 +193,25 @@ static int __init process_domain_node(
> bd->domid =3D (domid_t)val;
>=20
> printk(" domid: %d\n", bd->domid);
>=20
> }
> + else if ( strncmp(prop_name, "mode", name_len) =3D=3D 0 )
> + {
> + if ( fdt_prop_as_u32(prop, &bd->mode) !=3D 0 )
>=20
> + {
> + printk(" failed processing mode for domain %s\n", name);
> + return -EINVAL;
> + }
> +
> + printk(" mode: ");
> + if ( !(bd->mode & BUILD_MODE_PARAVIRT) )
>=20
> + {
> + if ( bd->mode & BUILD_MODE_ENABLE_DM )
>=20
> + printk("HVM\n");
> + else
> + printk("PVH\n");
> + }
> + else
> + printk("PV\n");
> + }
> }

I would re-write so the positive condition is processed first, e.g.:

    if ( bd->mode & BUILD_MODE_PARAVIRT )
        printk("PV\n");
    else if ( bd->mode & BUILD_MODE_ENABLE_DM )
        printk("HVM\n");
    else
        printk("PVH\n");

I think it will reduce indentation and make code block a bit easier to read=
.

Also, if there are more uses for printing string representation of a
boot module mode in the future, perhaps move it to a separate function?

What do you think?

>=20
> fdt_for_each_subnode(node, fdt, dom_node)
> diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/includ=
e/asm/boot-domain.h
> index d7c6042e25..e316d4bcde 100644
> --- a/xen/arch/x86/include/asm/boot-domain.h
> +++ b/xen/arch/x86/include/asm/boot-domain.h
> @@ -13,6 +13,11 @@
> struct boot_domain {
> domid_t domid;
>=20
> + /* On | Off /
> +#define BUILD_MODE_PARAVIRT (1 << 0) / PV | PVH/HVM /
> +#define BUILD_MODE_ENABLE_DM (1 << 1) / HVM | PVH */
> + uint32_t mode;
> +
> struct boot_module *kernel;
> struct boot_module *module;
> const char *cmdline;
> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
> index db7280225e..4127a0105d 100644
> --- a/xen/arch/x86/setup.c
> +++ b/xen/arch/x86/setup.c
> @@ -1020,7 +1020,8 @@ static struct domain *__init create_dom0(struct boo=
t_info *bi)
> struct boot_domain *bd =3D &bi->domains[0];
>=20
> struct domain *d;
>=20
> - if ( opt_dom0_pvh )
> + if ( opt_dom0_pvh ||
> + (bi->hyperlaunch_enabled && !(bd->mode & BUILD_MODE_PARAVIRT)) )
>=20
> {
> dom0_cfg.flags |=3D (XEN_DOMCTL_CDF_hvm |
> ((hvm_hap_supported() && !opt_dom0_shadow) ?
> --
> 2.43.0


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Date: Wed, 09 Apr 2025 22:29:09 +0000
To: Alejandro Vallejo 
From: Denis Mukhin 
Cc: xen-devel@lists.xenproject.org, "Daniel P. Smith" , Jason Andryuk , Xenia Ragiadakou , Stefano Stabellini , Michal Orzel , Jan Beulich , Andrew Cooper , =?utf-8?Q?Roger_Pau_Monn=C3=A9?= , Julien Grall , Bertrand Marquis 
Subject: Re: [PATCH v3 14/16] x86/hyperlaunch: add memory parsing to domain config
Message-ID: 
In-Reply-To: <20250408160802.49870-15-agarciav@amd.com>
References: <20250408160802.49870-1-agarciav@amd.com> <20250408160802.49870-15-agarciav@amd.com>
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On Tuesday, April 8th, 2025 at 9:07 AM, Alejandro Vallejo  wrote:

>=20
>=20
> From: "Daniel P. Smith" dpsmith@apertussolutions.com
>=20
>=20
> Add three properties, memory, mem-min, and mem-max, to the domain node de=
vice
> tree parsing to define the memory allocation for a domain. All three fiel=
ds are
> expressed in kb and written as a u64 in the device tree entries.
>=20
> Signed-off-by: Daniel P. Smith dpsmith@apertussolutions.com
>=20
> Reviewed-by: Jason Andryuk jason.andryuk@amd.com
>=20
> ---
> xen/arch/x86/dom0_build.c | 8 ++++++
> xen/arch/x86/domain-builder/fdt.c | 34 ++++++++++++++++++++++++++
> xen/arch/x86/include/asm/boot-domain.h | 4 +++
> xen/include/xen/libfdt/libfdt-xen.h | 10 ++++++++
> 4 files changed, 56 insertions(+)
>=20
> diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c
> index 0b467fd4a4..36fb090643 100644
> --- a/xen/arch/x86/dom0_build.c
> +++ b/xen/arch/x86/dom0_build.c
> @@ -627,6 +627,14 @@ int __init construct_dom0(const struct boot_domain b=
d)
>=20
> process_pending_softirqs();
>=20
> + / If param dom0_size was not set and HL config provided memory size */
> + if ( !get_memsize(&dom0_size, LONG_MAX) && bd->mem_pages )
>=20
> + dom0_size.nr_pages =3D bd->mem_pages;
>=20
> + if ( !get_memsize(&dom0_min_size, LONG_MAX) && bd->min_pages )
>=20
> + dom0_size.nr_pages =3D bd->min_pages;
>=20
> + if ( !get_memsize(&dom0_max_size, LONG_MAX) && bd->max_pages )
>=20
> + dom0_size.nr_pages =3D bd->max_pages;
>=20
> +
> if ( is_hvm_domain(d) )
> rc =3D dom0_construct_pvh(bd);
> else if ( is_pv_domain(d) )
> diff --git a/xen/arch/x86/domain-builder/fdt.c b/xen/arch/x86/domain-buil=
der/fdt.c
> index da65f6a5a0..338b4838c2 100644
> --- a/xen/arch/x86/domain-builder/fdt.c
> +++ b/xen/arch/x86/domain-builder/fdt.c
> @@ -6,6 +6,7 @@
> #include 
>=20
> #include 
>=20
> #include 
>=20
> +#include 
>=20
>=20
> #include 
>=20
> #include 
>=20
> @@ -212,6 +213,39 @@ static int __init process_domain_node(
> else
> printk("PV\n");
> }
> + else if ( strncmp(prop_name, "memory", name_len) =3D=3D 0 )
> + {
> + uint64_t kb;
> + if ( fdt_prop_as_u64(prop, &kb) !=3D 0 )
> + {
> + printk(" failed processing memory for domain %s\n", name);
> + return -EINVAL;
> + }
> + bd->mem_pages =3D PFN_DOWN(kb * SZ_1K);

Perhaps use shorter form of KB(kb) (KB() from include/xen/config.h)?

What do you think?

>=20
> + printk(" memory: %ld kb\n", kb);
> + }
> + else if ( strncmp(prop_name, "mem-min", name_len) =3D=3D 0 )
> + {
> + uint64_t kb;
> + if ( fdt_prop_as_u64(prop, &kb) !=3D 0 )
> + {
> + printk(" failed processing memory for domain %s\n", name);
> + return -EINVAL;
> + }
> + bd->min_pages =3D PFN_DOWN(kb * SZ_1K);
>=20
> + printk(" min memory: %ld kb\n", kb);
> + }
> + else if ( strncmp(prop_name, "mem-max", name_len) =3D=3D 0 )
> + {
> + uint64_t kb;
> + if ( fdt_prop_as_u64(prop, &kb) !=3D 0 )
> + {
> + printk(" failed processing memory for domain %s\n", name);
> + return -EINVAL;
> + }
> + bd->max_pages =3D PFN_DOWN(kb * SZ_1K);
>=20
> + printk(" max memory: %ld kb\n", kb);
> + }
> }
>=20
> fdt_for_each_subnode(node, fdt, dom_node)
> diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/includ=
e/asm/boot-domain.h
> index e316d4bcde..fa8ea1cc66 100644
> --- a/xen/arch/x86/include/asm/boot-domain.h
> +++ b/xen/arch/x86/include/asm/boot-domain.h
> @@ -18,6 +18,10 @@ struct boot_domain {
> #define BUILD_MODE_ENABLE_DM (1 << 1) /* HVM | PVH */
> uint32_t mode;
>=20
> + unsigned long mem_pages;
> + unsigned long min_pages;
> + unsigned long max_pages;
> +
> struct boot_module *kernel;
> struct boot_module *module;
> const char *cmdline;
> diff --git a/xen/include/xen/libfdt/libfdt-xen.h b/xen/include/xen/libfdt=
/libfdt-xen.h
> index 3031bec90e..da43e12e38 100644
> --- a/xen/include/xen/libfdt/libfdt-xen.h
> +++ b/xen/include/xen/libfdt/libfdt-xen.h
> @@ -34,6 +34,16 @@ static inline int __init fdt_prop_as_u32(
> return 0;
> }
>=20
> +static inline int __init fdt_prop_as_u64(
> + const struct fdt_property *prop, uint64_t *val)
> +{
> + if ( !prop || fdt32_to_cpu(prop->len) < sizeof(u64) )
>=20
> + return -EINVAL;
> +
> + *val =3D fdt_cell_as_u64((fdt32_t *)prop->data);
>=20
> + return 0;
> +}
> +
> static inline bool __init fdt_get_prop_offset(
> const void *fdt, int node, const char *name, unsigned long *offset)
> {
> --
> 2.43.0


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Date: Wed, 09 Apr 2025 22:33:25 +0000
To: Alejandro Vallejo 
From: Denis Mukhin 
Cc: xen-devel@lists.xenproject.org, "Daniel P. Smith" , Jason Andryuk , Xenia Ragiadakou , Stefano Stabellini , Michal Orzel , Jan Beulich , Andrew Cooper , =?utf-8?Q?Roger_Pau_Monn=C3=A9?= 
Subject: Re: [PATCH v3 15/16] x86/hyperlaunch: add max vcpu parsing of hyperlaunch device tree
Message-ID: 
In-Reply-To: <20250408160802.49870-16-agarciav@amd.com>
References: <20250408160802.49870-1-agarciav@amd.com> <20250408160802.49870-16-agarciav@amd.com>
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On Tuesday, April 8th, 2025 at 9:07 AM, Alejandro Vallejo  wrote:

>=20
>=20
> From: "Daniel P. Smith" dpsmith@apertussolutions.com
>=20
>=20
> Introduce the `cpus` property, named as such for dom0less compatibility, =
that
> represents the maximum number of vpcus to allocate for a domain. In the d=
evice
> tree, it will be encoded as a u32 value.
>=20
> Signed-off-by: Daniel P. Smith dpsmith@apertussolutions.com
>=20
> Reviewed-by: Jason Andryuk jason.andryuk@amd.com
>=20
> ---
> xen/arch/x86/dom0_build.c | 3 +++
> xen/arch/x86/domain-builder/fdt.c | 11 +++++++++++
> xen/arch/x86/include/asm/boot-domain.h | 2 ++
> 3 files changed, 16 insertions(+)
>=20
> diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c
> index 36fb090643..7b3e31a08f 100644
> --- a/xen/arch/x86/dom0_build.c
> +++ b/xen/arch/x86/dom0_build.c
> @@ -635,6 +635,9 @@ int __init construct_dom0(const struct boot_domain *b=
d)
> if ( !get_memsize(&dom0_max_size, LONG_MAX) && bd->max_pages )
>=20
> dom0_size.nr_pages =3D bd->max_pages;
>=20
>=20
> + if ( opt_dom0_max_vcpus_max =3D=3D UINT_MAX && bd->max_vcpus )
>=20
> + opt_dom0_max_vcpus_max =3D bd->max_vcpus;
>=20
> +
> if ( is_hvm_domain(d) )
> rc =3D dom0_construct_pvh(bd);
> else if ( is_pv_domain(d) )
> diff --git a/xen/arch/x86/domain-builder/fdt.c b/xen/arch/x86/domain-buil=
der/fdt.c
> index 338b4838c2..5fcb767bdd 100644
> --- a/xen/arch/x86/domain-builder/fdt.c
> +++ b/xen/arch/x86/domain-builder/fdt.c
> @@ -246,6 +246,17 @@ static int __init process_domain_node(
> bd->max_pages =3D PFN_DOWN(kb * SZ_1K);
>=20
> printk(" max memory: %ld kb\n", kb);
> }
> + else if ( strncmp(prop_name, "cpus", name_len) =3D=3D 0 )
> + {
> + uint32_t val =3D UINT_MAX;
> + if ( fdt_prop_as_u32(prop, &val) !=3D 0 )
> + {
> + printk(" failed processing max_vcpus for domain %s\n", name);

Suggest adding XENLOG_ERR to the error message.

> + return -EINVAL;
> + }
> + bd->max_vcpus =3D val;
>=20
> + printk(" max vcpus: %d\n", bd->max_vcpus);
>=20
> + }
> }
>=20
> fdt_for_each_subnode(node, fdt, dom_node)
> diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/includ=
e/asm/boot-domain.h
> index fa8ea1cc66..969c02a6ea 100644
> --- a/xen/arch/x86/include/asm/boot-domain.h
> +++ b/xen/arch/x86/include/asm/boot-domain.h
> @@ -22,6 +22,8 @@ struct boot_domain {
> unsigned long min_pages;
> unsigned long max_pages;
>=20
> + unsigned int max_vcpus;
> +
> struct boot_module *kernel;
> struct boot_module *module;
> const char *cmdline;
> --
> 2.43.0


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Date: Wed, 09 Apr 2025 22:39:49 +0000
To: Alejandro Vallejo 
From: Denis Mukhin 
Cc: xen-devel@lists.xenproject.org, "Daniel P. Smith" , Jason Andryuk , Xenia Ragiadakou , Stefano Stabellini , Michal Orzel , Jan Beulich , Andrew Cooper , =?utf-8?Q?Roger_Pau_Monn=C3=A9?= 
Subject: Re: [PATCH v3 16/16] x86/hyperlaunch: add capabilities to boot domain
Message-ID: 
In-Reply-To: <20250408160802.49870-17-agarciav@amd.com>
References: <20250408160802.49870-1-agarciav@amd.com> <20250408160802.49870-17-agarciav@amd.com>
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On Tuesday, April 8th, 2025 at 9:07 AM, Alejandro Vallejo  wrote:

>=20
>=20
> From: "Daniel P. Smith" dpsmith@apertussolutions.com
>=20
>=20
> Introduce the ability to assign capabilities to a domain via its definiti=
on in
> device tree. The first capability enabled to select is the control domain
> capability. The capability property is a bitfield in both the device tree=
 and
> `struct boot_domain`.
>=20
> Signed-off-by: Daniel P. Smith dpsmith@apertussolutions.com
>=20
> Reviewed-by: Jason Andryuk jason.andryuk@amd.com
>=20
> Signed-off-by: Jason Andryuk jason.andryuk@amd.com
>=20
> ---
> xen/arch/x86/domain-builder/core.c | 1 +
> xen/arch/x86/domain-builder/fdt.c | 12 ++++++++++++
> xen/arch/x86/include/asm/boot-domain.h | 4 ++++
> xen/arch/x86/setup.c | 6 +++++-
> 4 files changed, 22 insertions(+), 1 deletion(-)
>=20
> diff --git a/xen/arch/x86/domain-builder/core.c b/xen/arch/x86/domain-bui=
lder/core.c
> index 510a74a675..6ab4e6fe53 100644
> --- a/xen/arch/x86/domain-builder/core.c
> +++ b/xen/arch/x86/domain-builder/core.c
> @@ -96,6 +96,7 @@ void __init builder_init(struct boot_info *bi)
> i =3D first_boot_module_index(bi, BOOTMOD_UNKNOWN);
> bi->mods[i].type =3D BOOTMOD_KERNEL;
>=20
> bi->domains[0].kernel =3D &bi->mods[i];
>=20
> + bi->domains[0].capabilities |=3D BUILD_CAPS_CONTROL;
>=20
> bi->nr_domains =3D 1;
>=20
> }
> }
> diff --git a/xen/arch/x86/domain-builder/fdt.c b/xen/arch/x86/domain-buil=
der/fdt.c
> index 5fcb767bdd..dbfbcffb0a 100644
> --- a/xen/arch/x86/domain-builder/fdt.c
> +++ b/xen/arch/x86/domain-builder/fdt.c
> @@ -257,6 +257,18 @@ static int __init process_domain_node(
> bd->max_vcpus =3D val;
>=20
> printk(" max vcpus: %d\n", bd->max_vcpus);
>=20
> }
> + else if ( strncmp(prop_name, "capabilities", name_len) =3D=3D 0 )
> + {
> + if ( fdt_prop_as_u32(prop, &bd->capabilities) !=3D 0 )
>=20
> + {
> + printk(" failed processing domain id for domain %s\n", name);

Suggest adding XENLOG_ERR to the error message.

> + return -EINVAL;
> + }
> + printk(" caps: ");
> + if ( bd->capabilities & BUILD_CAPS_CONTROL )
>=20
> + printk("c");

Perhaps wrap string generation into a separate function?

That will help if the number of capabilities will grow over time
and if there will be a need to use string representation somewhere else
in the code.

Thoughts?

> + printk("\n");
> + }
> }
>=20
> fdt_for_each_subnode(node, fdt, dom_node)
> diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/includ=
e/asm/boot-domain.h
> index 969c02a6ea..29a7d806de 100644
> --- a/xen/arch/x86/include/asm/boot-domain.h
> +++ b/xen/arch/x86/include/asm/boot-domain.h
> @@ -13,6 +13,10 @@
> struct boot_domain {
> domid_t domid;
>=20
> +#define BUILD_CAPS_NONE (0)
> +#define BUILD_CAPS_CONTROL (1 << 0)
> + uint32_t capabilities;
> +
> /* On | Off /
> #define BUILD_MODE_PARAVIRT (1 << 0) / PV | PVH/HVM /
> #define BUILD_MODE_ENABLE_DM (1 << 1) / HVM | PVH */
> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
> index 4127a0105d..7e1a26b4d2 100644
> --- a/xen/arch/x86/setup.c
> +++ b/xen/arch/x86/setup.c
> @@ -1006,6 +1006,7 @@ static struct domain *__init create_dom0(struct boo=
t_info *bi)
> {
> char *cmdline =3D NULL;
> size_t cmdline_size;
> + unsigned int create_flags =3D 0;
> struct xen_domctl_createdomain dom0_cfg =3D {
> .flags =3D IS_ENABLED(CONFIG_TBOOT) ? XEN_DOMCTL_CDF_s3_integrity : 0,
> .max_evtchn_port =3D -1,
> @@ -1037,7 +1038,10 @@ static struct domain *__init create_dom0(struct bo=
ot_info *bi)
> if ( bd->domid =3D=3D DOMID_INVALID )
>=20
> /* Create initial domain. Not d0 for pvshim. */
> bd->domid =3D get_initial_domain_id();
>=20
> - d =3D domain_create(bd->domid, &dom0_cfg, pv_shim ? 0 : CDF_privileged)=
;
>=20
> + if ( bd->capabilities & BUILD_CAPS_CONTROL )
>=20
> + create_flags |=3D CDF_privileged;
> + d =3D domain_create(bd->domid, &dom0_cfg,
>=20
> + pv_shim ? 0 : create_flags);
> if ( IS_ERR(d) )
> panic("Error creating d%u: %ld\n", bd->domid, PTR_ERR(d));
>=20
>=20
> --
> 2.43.0


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Feedback-ID: i1568416f:Fastmail
Date: Thu, 10 Apr 2025 00:59:54 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Roger Pau =?utf-8?B?TW9ubsOp?= ,
	Stefano Stabellini ,
	Michal Orzel ,
	Anthony PERARD 
Subject: Re: [PATCH 6/8] Factor our x86-isms in the linux build script
Message-ID: 
References: <20250409163702.2037301-1-andrew.cooper3@citrix.com>
 <20250409163702.2037301-7-andrew.cooper3@citrix.com>
 
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--pp/gzWmHsaGWXAvO
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Date: Thu, 10 Apr 2025 00:59:54 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Roger Pau =?utf-8?B?TW9ubsOp?= ,
	Stefano Stabellini ,
	Michal Orzel ,
	Anthony PERARD 
Subject: Re: [PATCH 6/8] Factor our x86-isms in the linux build script

On Wed, Apr 09, 2025 at 07:05:21PM +0200, Marek Marczykowski-G=C3=B3recki w=
rote:
> On Wed, Apr 09, 2025 at 05:37:00PM +0100, Andrew Cooper wrote:
> > ... in preparation to use it for arm64 too.  Rename the script.
> >=20
> > Signed-off-by: Andrew Cooper 
>=20
> Reviewed-by: Marek Marczykowski-G=C3=B3recki 

Replaying without dockerfile in context, so it actually hits the list...

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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On 09/04/2025 11:59 pm, Marek Marczykowski-Górecki wrote:
> On Wed, Apr 09, 2025 at 07:05:21PM +0200, Marek Marczykowski-Górecki wrote:
>> On Wed, Apr 09, 2025 at 05:37:00PM +0100, Andrew Cooper wrote:
>>> ... in preparation to use it for arm64 too.  Rename the script.
>>>
>>> Signed-off-by: Andrew Cooper 
>> Reviewed-by: Marek Marczykowski-Górecki 
> Replaying without dockerfile in context, so it actually hits the list...

It did hit the list.  (I'm paying attention via my shadow subscription)

Lore seems happy too. 
https://lore.kernel.org/xen-devel/828cabc9-512f-4c2f-a7d7-b9c8963c1300@citrix.com/T/#mf8fba1fa1372985c108752f5179e3f1d7a688323

At a guess, Inumbo have reverted whatever was causing the problems with
dockerfiles in emails.

~Andrew


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From: "Daniel P. Smith" 
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On 4/7/25 03:10, Jan Beulich wrote:
> On 05.04.2025 02:04, Daniel P. Smith wrote:
>> On 1/30/25 08:45, Jan Beulich wrote:
>>> On 26.12.2024 17:57, Daniel P. Smith wrote:
>>>> @@ -596,9 +597,10 @@ int __init dom0_setup_permissions(struct domain *d)
>>>>        return rc;
>>>>    }
>>>>    
>>>> -int __init construct_dom0(struct boot_info *bi, struct domain *d)
>>>> +int __init construct_dom0(struct boot_domain *bd)
>>>
>>> Pointer-to-const? Domain construction should only be consuming data
>>> supplied, I expect.
>>>
>>>> --- /dev/null
>>>> +++ b/xen/arch/x86/include/asm/bootdomain.h
>>>
>>> Maybe boot-domain.h? Or was that suggested before and discarded for
>>> whatever reason?
>>>
>>>> @@ -0,0 +1,28 @@
>>>> +/* SPDX-License-Identifier: GPL-2.0-or-later */
>>>> +/*
>>>> + * Copyright (c) 2024 Apertus Solutions, LLC
>>>> + * Author: Daniel P. Smith 
>>>> + * Copyright (c) 2024 Christopher Clark 
>>>> + */
>>>> +
>>>> +#ifndef __XEN_X86_BOOTDOMAIN_H__
>>>> +#define __XEN_X86_BOOTDOMAIN_H__
>>>> +
>>>> +struct boot_domain {
>>>> +    struct boot_module *kernel;
>>>> +    struct boot_module *ramdisk;
>>>
>>> "ramdisk" is Linux-centric, I think. Can we name this more generically?
>>> "module" perhaps, despite it then being the same name as we use for the
>>> modules Xen is passed?
>>
>> Ramdisk is not a linux-centric, take OpenBSD for example [1]. Calling
>> the field "module" is a recipe for confusion. Especially considering
>> that we are more or less providing a lightweight version of the
>> toolstack interface which use the name ramdisk.
>>
>> [1] https://openbsd.fandom.com/wiki/Creating_a_custom_OpenBSD_RAM_disk
> 
> Just one other OS also using such a concept doesn't mean much. In fact, "ramdisk"
> isn't quite appropriate a term for Linux nowadays anymore anyway. An initrd can
> consist of multiple pieces now, not all of which end up taken as "ramdisk". I
> wouldn't insist on "module" as a name, but I continue to think "ramdisk" is
> inappropriate. The fact that the toolstack uses the term has historical reasons;
> it doesn't mean new code in Xen needs to continue to use that term.

That opening response is very disingenuous and goal post moving. Your 
initial comment asserted that it is a Linux only concept, and when met 
with another example, you now want to just brush it off.

The fact is that the concept of a ramdisk predates Linux by a 
considerable amount, 1979 CP/M introduced the concept. Yes, initrd is a 
variation of a ramdisk, which is why the field is not called initrd 
(despite that term used elsewhere as a variable name). I would also 
point out, as you very well know, Linux's multiple module ramdisk is not 
supported by Xen today, nor is there any plan to add it.

The fact is that ramdisk **is** a general term for the specific 
capability that the primary supported operating system uses, along with 
other operating systems *BSD. As a result the concept is all over the 
code base and so it is not at all unreasonable to have an explicit 
reference reserved for it.

V/r,
DPS


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Date: Wed, 9 Apr 2025 20:09:09 -0400
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH TEST-ARTEFACTS 0/8] Cleanup and Linux ARM64 support
To: Andrew Cooper , Xen-devel
	
CC: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , "Stefano
 Stabellini" , Michal Orzel ,
	=?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
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	, Juergen Gross 
References: <20250409163702.2037301-1-andrew.cooper3@citrix.com>
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On 2025-04-09 13:01, Andrew Cooper wrote:
> On 09/04/2025 5:36 pm, Andrew Cooper wrote:
>> Various bits of cleanup, and support for arm64 Linux builds.
>>
>> Run using the new Linux 6.6.86 on (most) x86, and ARM64:
>>    https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1760667411
> 
> Lovely, Linux 6.6.86 is broken for x86 PVH.  It triple faults very early on.
> 
> Sample log:
> https://gitlab.com/xen-project/hardware/xen-staging/-/jobs/9673797450
> 
> I guess we'll have to stay on 6.6.56 for now.  (Only affects the final
> patch.)

This is an AMD system:

(XEN) [    2.577549] d0v0 Triple fault - invoking HVM shutdown action 1
(XEN) [    2.577557] RIP:    0008:[<0000000001f851d4>]

The instruction:
ffffffff81f851d4:       0f 01 c1                vmcall

vmcall is the Intel instruction, and vmmcall is the AMD one, so CPU 
detection is malfunctioning.

(Early PVH is running identity mapped, so it's offset from ffffffff80000000)

There are no debug symbols in the vmlinux I extracted from the bzImage 
from gitlab, but I can repro locally with on 6.6.86.  It's unclear to me 
why it's failing.

Trying:
diff --git i/arch/x86/xen/enlighten.c w/arch/x86/xen/enlighten.c
index 0219f1c90202..fb4ad7fe3e34 100644
--- i/arch/x86/xen/enlighten.c
+++ w/arch/x86/xen/enlighten.c
@@ -123,11 +123,10 @@ noinstr void *__xen_hypercall_setfunc(void)
         if (!boot_cpu_has(X86_FEATURE_CPUID))
                 xen_get_vendor();

-       if ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD ||
-            boot_cpu_data.x86_vendor == X86_VENDOR_HYGON))
-               func = xen_hypercall_amd;
-       else
+       if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL )
                 func = xen_hypercall_intel;
+       else
+               func = xen_hypercall_amd;

         static_call_update_early(xen_hypercall, func);

But it still calls xen_hypercall_intel().  So maybe x86_vendor isn't 
getting set and ends up as 0 (X86_VENDOR_INTEL)?

That's as far as I got here.

Different but related, on mainline master, I also get a fail in vmcall. 
There, I see in the disassembly that __xen_hypercall_setfunc()'s calls 
to xen_get_vendor() is gone.  xen_get_vendor() seems to have been 
DCE-ed.  There is some new code that hardcodes features - 
"x86/cpufeatures: Add {REQUIRED,DISABLED} feature configs" - which may 
be responsible.

Regards,
Jason


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On 09.04.2025 17:33, Roger Pau Monné wrote:
> On Wed, Apr 09, 2025 at 04:08:47PM +0200, Jan Beulich wrote:
>> On 09.04.2025 16:01, Roger Pau Monné wrote:
>>>  As I understand the checks done in
>>> mmio_ro_emulated_write() are to ensure correctness, but carrying the
>>> access even when the %cr2 check fail wouldn't cause issues to Xen
>>> itself?
>>
>> Well, "wouldn't" is too strong for my taste, "shouldn't" would fit. The
>> checking is there to avoid guests playing games. Whether that prevents
>> merely in-guest just-bugs or actual XSAs we can't know until we find a
>> case where the game playing might make us do something wrong. I expect
>> it's unlikely for Xen itself to be affected. But an in-guest privilege
>> escalation would already be bad enough.
> 
> I see.  That was kind of my understanding of the checks.  At least on
> HVM it feels a bit weird to handle r/o regions this way.  It would IMO
> be more natural to use an hvm_io_handler, but that's maybe because I'm
> more familiar with those.

I guess this would be an option; I assume it's the way it is because PVHv1
inherited it from PV, and PVHv2 inherited it from PVHv1.

> And in that regard, hvm_io_handler don't seem to do any of the extra
> checking that mmio_ro_emulated_write() does with the %cr2, but maybe
> that's done by some higher layer?  AFAICT that would ultimately get
> called by hvmemul_read(), and there are no checks there at all.

That more general framework isn't page-fault specific, and hence there's
no CR2 recorded to check against.

Jan


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On 10.04.2025 01:55, Daniel P. Smith wrote:
> On 4/7/25 03:10, Jan Beulich wrote:
>> On 05.04.2025 02:04, Daniel P. Smith wrote:
>>> On 1/30/25 08:45, Jan Beulich wrote:
>>>> On 26.12.2024 17:57, Daniel P. Smith wrote:
>>>>> @@ -596,9 +597,10 @@ int __init dom0_setup_permissions(struct domain *d)
>>>>>        return rc;
>>>>>    }
>>>>>    
>>>>> -int __init construct_dom0(struct boot_info *bi, struct domain *d)
>>>>> +int __init construct_dom0(struct boot_domain *bd)
>>>>
>>>> Pointer-to-const? Domain construction should only be consuming data
>>>> supplied, I expect.
>>>>
>>>>> --- /dev/null
>>>>> +++ b/xen/arch/x86/include/asm/bootdomain.h
>>>>
>>>> Maybe boot-domain.h? Or was that suggested before and discarded for
>>>> whatever reason?
>>>>
>>>>> @@ -0,0 +1,28 @@
>>>>> +/* SPDX-License-Identifier: GPL-2.0-or-later */
>>>>> +/*
>>>>> + * Copyright (c) 2024 Apertus Solutions, LLC
>>>>> + * Author: Daniel P. Smith 
>>>>> + * Copyright (c) 2024 Christopher Clark 
>>>>> + */
>>>>> +
>>>>> +#ifndef __XEN_X86_BOOTDOMAIN_H__
>>>>> +#define __XEN_X86_BOOTDOMAIN_H__
>>>>> +
>>>>> +struct boot_domain {
>>>>> +    struct boot_module *kernel;
>>>>> +    struct boot_module *ramdisk;
>>>>
>>>> "ramdisk" is Linux-centric, I think. Can we name this more generically?
>>>> "module" perhaps, despite it then being the same name as we use for the
>>>> modules Xen is passed?
>>>
>>> Ramdisk is not a linux-centric, take OpenBSD for example [1]. Calling
>>> the field "module" is a recipe for confusion. Especially considering
>>> that we are more or less providing a lightweight version of the
>>> toolstack interface which use the name ramdisk.
>>>
>>> [1] https://openbsd.fandom.com/wiki/Creating_a_custom_OpenBSD_RAM_disk
>>
>> Just one other OS also using such a concept doesn't mean much. In fact, "ramdisk"
>> isn't quite appropriate a term for Linux nowadays anymore anyway. An initrd can
>> consist of multiple pieces now, not all of which end up taken as "ramdisk". I
>> wouldn't insist on "module" as a name, but I continue to think "ramdisk" is
>> inappropriate. The fact that the toolstack uses the term has historical reasons;
>> it doesn't mean new code in Xen needs to continue to use that term.
> 
> That opening response is very disingenuous and goal post moving. Your 
> initial comment asserted that it is a Linux only concept, and when met 
> with another example, you now want to just brush it off.

Well, not quite. I deliberately said "..., I think" to indicate the my
horizon. For background, I've originally come from the DOS/Windows and
NetWare worlds, where no such concept ever existed (again, to my
necessarily limited knowledge).

> The fact is that the concept of a ramdisk predates Linux by a 
> considerable amount, 1979 CP/M introduced the concept. Yes, initrd is a 
> variation of a ramdisk, which is why the field is not called initrd 
> (despite that term used elsewhere as a variable name). I would also 
> point out, as you very well know, Linux's multiple module ramdisk is not 
> supported by Xen today, nor is there any plan to add it.

I don't understand what you're alluding to here. Xen doesn't itself need
a ramdisk. Nevertheless to perhaps find microcode to load, it peeks into
the (sole) module provided to the Dom0 kernel.

> The fact is that ramdisk **is** a general term for the specific 
> capability that the primary supported operating system uses, along with 
> other operating systems *BSD. As a result the concept is all over the 
> code base and so it is not at all unreasonable to have an explicit 
> reference reserved for it.

Yet then, compared to multiboot, it being just a single module is a
perhaps severe (portability) limitation. And as soon as we talk about
multiple modules, I'm relatively sure you agree that we can't assume
them all to be RAM disk images. See how Xen itself has got Dom0 kernel,
Dom0 initrd, XSM policy, and CPU microcode.

Naming the thing as generically as possible at least clearly indicates
the route to go from 1 to N.

Jan


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Date: Thu, 10 Apr 2025 09:02:14 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: Marek Marczykowski ,
	Andrew Cooper ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH 2/2] x86/hvm: fix write emulation of RO ranges
Message-ID: 
References: 
 
 
 <2df78a5d-2f9f-4866-81cc-03ae09c76d50@suse.com>
 
 <8709e7af-5827-4c96-9f6b-1f548045040d@suse.com>
 
 
 
 
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On Thu, Apr 10, 2025 at 08:27:49AM +0200, Jan Beulich wrote:
> On 09.04.2025 17:33, Roger Pau Monné wrote:
> > On Wed, Apr 09, 2025 at 04:08:47PM +0200, Jan Beulich wrote:
> >> On 09.04.2025 16:01, Roger Pau Monné wrote:
> >>>  As I understand the checks done in
> >>> mmio_ro_emulated_write() are to ensure correctness, but carrying the
> >>> access even when the %cr2 check fail wouldn't cause issues to Xen
> >>> itself?
> >>
> >> Well, "wouldn't" is too strong for my taste, "shouldn't" would fit. The
> >> checking is there to avoid guests playing games. Whether that prevents
> >> merely in-guest just-bugs or actual XSAs we can't know until we find a
> >> case where the game playing might make us do something wrong. I expect
> >> it's unlikely for Xen itself to be affected. But an in-guest privilege
> >> escalation would already be bad enough.
> > 
> > I see.  That was kind of my understanding of the checks.  At least on
> > HVM it feels a bit weird to handle r/o regions this way.  It would IMO
> > be more natural to use an hvm_io_handler, but that's maybe because I'm
> > more familiar with those.
> 
> I guess this would be an option; I assume it's the way it is because PVHv1
> inherited it from PV, and PVHv2 inherited it from PVHv1.

I have a draft with this approach, and it seems quite better, as it
allows to get rid of hvm_emulate_one_mmio() and the special casing
done in hvm_hap_nested_page_fault().

Thanks, Roger.


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Date: Thu, 10 Apr 2025 09:20:22 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: "Daniel P. Smith" ,
	Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= ,
	Andrew Cooper ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH v2 02/11] x86/mkreloc: fix obtaining PE image base address
Message-ID: 
References: <20250401130840.72119-1-roger.pau@citrix.com>
 <20250401130840.72119-3-roger.pau@citrix.com>
 <6c37ad18-a830-453e-a7ff-fb4978e3f0df@suse.com>
 
 
 <3364268c-41c9-47ed-a6d1-b8ee04118a46@suse.com>
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On Tue, Apr 08, 2025 at 02:34:48PM +0200, Jan Beulich wrote:
> On 08.04.2025 13:21, Roger Pau Monné wrote:
> > On Wed, Apr 02, 2025 at 09:46:53AM +0200, Jan Beulich wrote:
> >> x86/EFI: correct mkreloc header (field) reading
> >>
> >> With us now reading the full combined optional and NT headers, the
> >> subsequent reading of (and seeking to) NT header fields is wrong. Since
> >> PE32 and PE32+ NT headers are different anyway (beyond the image base
> >> oddity extending across both headers), switch to using a union. This
> >> allows to fetch the image base more directly then.
> >>
> >> Additionally add checking to map_section(), which would have caught at
> >> least the wrong (zero) image size that we previously used.
> >>
> >> Fixes: f7f42accbbbb ("x86/efi: Use generic PE/COFF structures")
> >> Reported-by: Roger Pau Monné 
> >> Signed-off-by: Jan Beulich 
> >> ---
> >> Of the two checks added to map_section(), the 1st ends up being largely
> >> redundant with the 2nd one. Should we use just the latter?
> >>
> >> Also sanity checking the image base would be possible, but more
> >> cumbersome if we wanted to check moret than just "is in high half of
> >> address space). Therefore I've left out doing so.
> > 
> > We could likely check that image_base >= XEN_VIRT_START?  However I'm
> > not sure how easy it is to make XEN_VIRT_START available to mkreloc.
> 
> This is precisely why I said "more cumbersome".
> 
> >> @@ -54,31 +56,40 @@ static unsigned int load(const char *nam
> >>  
> >>      if ( lseek(in, mz_hdr.peaddr, SEEK_SET) < 0 ||
> >>           read(in, &pe_hdr, sizeof(pe_hdr)) != sizeof(pe_hdr) ||
> >> -         read(in, &pe32_opt_hdr, sizeof(pe32_opt_hdr)) != sizeof(pe32_opt_hdr) ||
> >> -         read(in, &base, sizeof(base)) != sizeof(base) ||
> >> -         /*
> >> -          * Luckily the image size field lives at the
> >> -          * same offset for both formats.
> >> -          */
> >> -         lseek(in, 24, SEEK_CUR) < 0 ||
> >> -         read(in, image_size, sizeof(*image_size)) != sizeof(*image_size) )
> >> +         (read(in, &pe32_opt_hdr.pe, sizeof(pe32_opt_hdr.pe)) !=
> >> +          sizeof(pe32_opt_hdr.pe)) )
> >>      {
> >>          perror(name);
> >>          exit(3);
> >>      }
> >>  
> >>      switch ( (pe_hdr.magic == PE_MAGIC &&
> >> -              pe_hdr.opt_hdr_size > sizeof(pe32_opt_hdr)) *
> >> -              pe32_opt_hdr.magic )
> >> +              pe_hdr.opt_hdr_size > sizeof(pe32_opt_hdr.pe)) *
> >> +              pe32_opt_hdr.pe.magic )
> >>      {
> >>      case PE_OPT_MAGIC_PE32:
> >>          *width = 32;
> >> -        *image_base = base;
> >> +        *image_base = pe32_opt_hdr.pe.image_base;
> >> +        *image_size = pe32_opt_hdr.pe.image_size;
> >>          break;
> >>      case PE_OPT_MAGIC_PE32PLUS:
> >> -        *width = 64;
> >> -        *image_base = ((uint64_t)base << 32) | pe32_opt_hdr.data_base;
> >> -        break;
> >> +        if ( pe_hdr.opt_hdr_size > sizeof(pe32_opt_hdr.pep) )
> >> +        {
> >> +            if ( read(in,
> >> +                      &pe32_opt_hdr.pe + 1,
> >> +                      sizeof(pe32_opt_hdr.pep) - sizeof(pe32_opt_hdr.pe)) !=
> >> +                 sizeof(pe32_opt_hdr.pep) - sizeof(pe32_opt_hdr.pe) )
> >> +            {
> >> +                perror(name);
> >> +                exit(3);
> >> +            }
> >> +
> >> +            *width = 64;
> >> +            *image_base = pe32_opt_hdr.pep.image_base;
> >> +            *image_size = pe32_opt_hdr.pep.image_size;
> >> +            break;
> >> +        }
> > 
> > Since you are already refactoring much of this code, won't it be
> > clearer to fetch the header inside of the switch cases.  So that
> > there's a single read call for each header type?
> 
> Except that the switch() itself uses not only pe_hdr, but also
> pe32_opt_hdr. That could be re-arranged, but I'm a little reluctant to
> do so.

Hm, I see, the magic field checked here is in the extended header, so
we would need to fetch it ahead of the switch in any case.  How
unhelpful.

One thing that I find weird about this code is the obfuscation of the
switch condition, won't it be easier to read as:

if ( pe_hdr.magic != PE_MAGIC ||
     pe_hdr.opt_hdr_size < sizeof(pe32_opt_hdr) )
    fprintf(stderr,
            "%s: Wrong PE magic or missing optional header\n", name);
    exit(3);
}

switch ( pe32_opt_hdr.magic )
{
...

I would assume the current arrangement is done as to reuse the
`default` error label, but IMO that switch condition is too hard to
parse.

> >> @@ -108,11 +119,28 @@ static unsigned int load(const char *nam
> >>  static long page_size;
> >>  
> >>  static const void *map_section(const struct section_header *sec, int in,
> >> -                               const char *name)
> >> +                               const char *name, uint_fast32_t image_size)
> >>  {
> >>      const char *ptr;
> >>      unsigned long offs;
> >>  
> >> +    if ( sec->rva > image_size )
> > 
> > Strictly, should this be >=, as rva is a position, and image_size is a
> > size, so the last allowed bit would be image_size - 1?
> 
> Yes and no. No in so far as this would be wrong for zero-size sections.
> Yet see also the first of the two post-commit-message remarks.

Hm, yes, don't have a strong opinion really, just leave it like that
I guess.

Thanks, Roger.


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Message-ID: <8e15d185-7f04-432b-a091-a83a6f42e056@amd.com>
Date: Thu, 10 Apr 2025 09:25:19 +0200
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH] arm/irq: Reduce size of irq_desc array to exclude local
 IRQs
To: Mykola Kvach , xen-devel@lists.xenproject.org
Cc: Mykola Kvach ,
 Stefano Stabellini , Julien Grall ,
 Bertrand Marquis ,
 Volodymyr Babchuk 
References: 
From: "Orzel, Michal" 
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On 08/04/2025 05:42, Mykola Kvach wrote:
> 
> 
> From: Mykola Kvach 
> 
> SGI and PPI descriptors are banked and stored in the per-CPU local_irq_desc
> array, so not all elements of the global irq_desc array are used. This is
> already accounted for in the descriptor lookup logic inside __irq_to_desc:
>     return &irq_desc[irq - NR_LOCAL_IRQS];
> 
> Therefore, the size of the irq_desc array can be reduced by NR_LOCAL_IRQS,
> saving (NR_LOCAL_IRQS * L1_CACHE_BYTES) bytes of memory.
Good finding. History shows that local_irq_desc was introduced after irq_desc
that could explain the mistake.

> 
> Signed-off-by: Mykola Kvach 
Reviewed-by: Michal Orzel 

~Michal




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Date: Thu, 10 Apr 2025 09:41:56 +0200
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Subject: Re: [PATCH v2 02/11] x86/mkreloc: fix obtaining PE image base address
To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
Cc: "Daniel P. Smith" ,
 =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 , Andrew Cooper
 , xen-devel@lists.xenproject.org
References: <20250401130840.72119-1-roger.pau@citrix.com>
 <20250401130840.72119-3-roger.pau@citrix.com>
 <6c37ad18-a830-453e-a7ff-fb4978e3f0df@suse.com>
 
 
 <3364268c-41c9-47ed-a6d1-b8ee04118a46@suse.com>
 
Content-Language: en-US
From: Jan Beulich 
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On 10.04.2025 09:20, Roger Pau Monné wrote:
> On Tue, Apr 08, 2025 at 02:34:48PM +0200, Jan Beulich wrote:
>> On 08.04.2025 13:21, Roger Pau Monné wrote:
>>> On Wed, Apr 02, 2025 at 09:46:53AM +0200, Jan Beulich wrote:
>>>> @@ -54,31 +56,40 @@ static unsigned int load(const char *nam
>>>>  
>>>>      if ( lseek(in, mz_hdr.peaddr, SEEK_SET) < 0 ||
>>>>           read(in, &pe_hdr, sizeof(pe_hdr)) != sizeof(pe_hdr) ||
>>>> -         read(in, &pe32_opt_hdr, sizeof(pe32_opt_hdr)) != sizeof(pe32_opt_hdr) ||
>>>> -         read(in, &base, sizeof(base)) != sizeof(base) ||
>>>> -         /*
>>>> -          * Luckily the image size field lives at the
>>>> -          * same offset for both formats.
>>>> -          */
>>>> -         lseek(in, 24, SEEK_CUR) < 0 ||
>>>> -         read(in, image_size, sizeof(*image_size)) != sizeof(*image_size) )
>>>> +         (read(in, &pe32_opt_hdr.pe, sizeof(pe32_opt_hdr.pe)) !=
>>>> +          sizeof(pe32_opt_hdr.pe)) )
>>>>      {
>>>>          perror(name);
>>>>          exit(3);
>>>>      }
>>>>  
>>>>      switch ( (pe_hdr.magic == PE_MAGIC &&
>>>> -              pe_hdr.opt_hdr_size > sizeof(pe32_opt_hdr)) *
>>>> -              pe32_opt_hdr.magic )
>>>> +              pe_hdr.opt_hdr_size > sizeof(pe32_opt_hdr.pe)) *
>>>> +              pe32_opt_hdr.pe.magic )
>>>>      {
>>>>      case PE_OPT_MAGIC_PE32:
>>>>          *width = 32;
>>>> -        *image_base = base;
>>>> +        *image_base = pe32_opt_hdr.pe.image_base;
>>>> +        *image_size = pe32_opt_hdr.pe.image_size;
>>>>          break;
>>>>      case PE_OPT_MAGIC_PE32PLUS:
>>>> -        *width = 64;
>>>> -        *image_base = ((uint64_t)base << 32) | pe32_opt_hdr.data_base;
>>>> -        break;
>>>> +        if ( pe_hdr.opt_hdr_size > sizeof(pe32_opt_hdr.pep) )
>>>> +        {
>>>> +            if ( read(in,
>>>> +                      &pe32_opt_hdr.pe + 1,
>>>> +                      sizeof(pe32_opt_hdr.pep) - sizeof(pe32_opt_hdr.pe)) !=
>>>> +                 sizeof(pe32_opt_hdr.pep) - sizeof(pe32_opt_hdr.pe) )
>>>> +            {
>>>> +                perror(name);
>>>> +                exit(3);
>>>> +            }
>>>> +
>>>> +            *width = 64;
>>>> +            *image_base = pe32_opt_hdr.pep.image_base;
>>>> +            *image_size = pe32_opt_hdr.pep.image_size;
>>>> +            break;
>>>> +        }
>>>
>>> Since you are already refactoring much of this code, won't it be
>>> clearer to fetch the header inside of the switch cases.  So that
>>> there's a single read call for each header type?
>>
>> Except that the switch() itself uses not only pe_hdr, but also
>> pe32_opt_hdr. That could be re-arranged, but I'm a little reluctant to
>> do so.
> 
> Hm, I see, the magic field checked here is in the extended header, so
> we would need to fetch it ahead of the switch in any case.  How
> unhelpful.
> 
> One thing that I find weird about this code is the obfuscation of the
> switch condition, won't it be easier to read as:
> 
> if ( pe_hdr.magic != PE_MAGIC ||
>      pe_hdr.opt_hdr_size < sizeof(pe32_opt_hdr) )
>     fprintf(stderr,
>             "%s: Wrong PE magic or missing optional header\n", name);
>     exit(3);
> }
> 
> switch ( pe32_opt_hdr.magic )
> {
> ...
> 
> I would assume the current arrangement is done as to reuse the
> `default` error label, but IMO that switch condition is too hard to
> parse.

Well, yes, I have a tendency to code things like this to re-use code
where possible, but I (meanwhile) understand many people don't like
the result. Doing this differently would be a separate patch though, I
think. Anyway - to catch the maintainers' attention I guess I'll (re-)
submit the patch outside of this thread.

Jan


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To: "xen-devel@lists.xenproject.org" 
Cc: Marek Marczykowski ,
 Daniel Smith ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
From: Jan Beulich 
Subject: [PATCH RESEND] x86/EFI: correct mkreloc header (field) reading
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With us now reading the full combined optional and NT headers, the
subsequent reading of (and seeking to) NT header fields is wrong. Since
PE32 and PE32+ NT headers are different anyway (beyond the image base
oddity extending across both headers), switch to using a union. This
allows to fetch the image base more directly then.

Additionally add checking to map_section(), which would have caught at
least the wrong (zero) image size that we previously used.

Fixes: f7f42accbbbb ("x86/efi: Use generic PE/COFF structures")
Reported-by: Roger Pau Monné 
Signed-off-by: Jan Beulich 
---
Of the two checks added to map_section(), the 1st ends up being largely
redundant with the 2nd one. Should we use just the latter?

Also sanity checking the image base would be possible, but more
cumbersome if we wanted to check more than just "is in high half of
address space). Therefore I've left out doing so.

--- a/xen/arch/x86/efi/mkreloc.c
+++ b/xen/arch/x86/efi/mkreloc.c
@@ -28,14 +28,16 @@ static void usage(const char *cmd, int r
 static unsigned int load(const char *name, int *handle,
                          struct section_header **sections,
                          uint_fast64_t *image_base,
-                         uint32_t *image_size,
+                         uint_fast32_t *image_size,
                          unsigned int *width)
 {
     int in = open(name, O_RDONLY);
     struct mz_hdr mz_hdr;
     struct pe_hdr pe_hdr;
-    struct pe32_opt_hdr pe32_opt_hdr;
-    uint32_t base;
+    union {
+        struct pe32_opt_hdr pe;
+        struct pe32plus_opt_hdr pep;
+    } pe32_opt_hdr;
 
     if ( in < 0 ||
          read(in, &mz_hdr, sizeof(mz_hdr)) != sizeof(mz_hdr) )
@@ -54,31 +56,40 @@ static unsigned int load(const char *nam
 
     if ( lseek(in, mz_hdr.peaddr, SEEK_SET) < 0 ||
          read(in, &pe_hdr, sizeof(pe_hdr)) != sizeof(pe_hdr) ||
-         read(in, &pe32_opt_hdr, sizeof(pe32_opt_hdr)) != sizeof(pe32_opt_hdr) ||
-         read(in, &base, sizeof(base)) != sizeof(base) ||
-         /*
-          * Luckily the image size field lives at the
-          * same offset for both formats.
-          */
-         lseek(in, 24, SEEK_CUR) < 0 ||
-         read(in, image_size, sizeof(*image_size)) != sizeof(*image_size) )
+         (read(in, &pe32_opt_hdr.pe, sizeof(pe32_opt_hdr.pe)) !=
+          sizeof(pe32_opt_hdr.pe)) )
     {
         perror(name);
         exit(3);
     }
 
     switch ( (pe_hdr.magic == PE_MAGIC &&
-              pe_hdr.opt_hdr_size > sizeof(pe32_opt_hdr)) *
-              pe32_opt_hdr.magic )
+              pe_hdr.opt_hdr_size > sizeof(pe32_opt_hdr.pe)) *
+              pe32_opt_hdr.pe.magic )
     {
     case PE_OPT_MAGIC_PE32:
         *width = 32;
-        *image_base = base;
+        *image_base = pe32_opt_hdr.pe.image_base;
+        *image_size = pe32_opt_hdr.pe.image_size;
         break;
     case PE_OPT_MAGIC_PE32PLUS:
-        *width = 64;
-        *image_base = ((uint64_t)base << 32) | pe32_opt_hdr.data_base;
-        break;
+        if ( pe_hdr.opt_hdr_size > sizeof(pe32_opt_hdr.pep) )
+        {
+            if ( read(in,
+                      &pe32_opt_hdr.pe + 1,
+                      sizeof(pe32_opt_hdr.pep) - sizeof(pe32_opt_hdr.pe)) !=
+                 sizeof(pe32_opt_hdr.pep) - sizeof(pe32_opt_hdr.pe) )
+            {
+                perror(name);
+                exit(3);
+            }
+
+            *width = 64;
+            *image_base = pe32_opt_hdr.pep.image_base;
+            *image_size = pe32_opt_hdr.pep.image_size;
+            break;
+        }
+        /* Fall through. */
     default:
         fprintf(stderr, "%s: Wrong PE file format\n", name);
         exit(3);
@@ -108,11 +119,28 @@ static unsigned int load(const char *nam
 static long page_size;
 
 static const void *map_section(const struct section_header *sec, int in,
-                               const char *name)
+                               const char *name, uint_fast32_t image_size)
 {
     const char *ptr;
     unsigned long offs;
 
+    if ( sec->rva > image_size )
+    {
+        fprintf(stderr,
+                "%s: section %.8s @ %08"PRIx32" beyond image size %08"PRIxFAST32"\n",
+                name, sec->name, sec->rva, image_size);
+        exit(6);
+    }
+
+    if ( (uint_fast64_t)sec->rva + sec->virtual_size > image_size )
+    {
+        fprintf(stderr,
+                "%s: section %.8s @ [%09"PRIx32",%09"PRIxFAST64") extends beyond image size %09"PRIxFAST32"\n",
+                name, sec->name, sec->rva,
+                (uint_fast64_t)sec->rva + sec->virtual_size, image_size);
+        exit(6);
+    }
+
     if ( !page_size )
         page_size = sysconf(_SC_PAGESIZE);
     offs = sec->data_addr & (page_size - 1);
@@ -233,7 +261,7 @@ int main(int argc, char *argv[])
     int in1, in2;
     unsigned int i, nsec, width1, width2;
     uint_fast64_t base1, base2;
-    uint32_t size1, size2;
+    uint_fast32_t size1, size2;
     struct section_header *sec1, *sec2;
 
     if ( argc == 1 ||
@@ -308,8 +336,8 @@ int main(int argc, char *argv[])
             sec1[i].raw_data_size = sec1[i].virtual_size;
             sec2[i].raw_data_size = sec2[i].virtual_size;
         }
-        ptr1 = map_section(sec1 + i, in1, argv[1]);
-        ptr2 = map_section(sec2 + i, in2, argv[2]);
+        ptr1 = map_section(sec1 + i, in1, argv[1], size1);
+        ptr2 = map_section(sec2 + i, in2, argv[2], size1);
 
         diff_sections(ptr1, ptr2, sec1 + i, base2 - base1, width1,
                       base1, base1 + size1);


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Date: Thu, 10 Apr 2025 09:49:20 +0200
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v3 06/16] x86/hyperlaunch: introduce the domain builder
To: Denis Mukhin , Alejandro Vallejo 
Cc: xen-devel@lists.xenproject.org,
 "Daniel P. Smith" ,
 Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini ,
 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
References: <20250408160802.49870-1-agarciav@amd.com>
 <20250408160802.49870-7-agarciav@amd.com>
 
Content-Language: en-US
From: Jan Beulich 
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On 09.04.2025 20:53, Denis Mukhin wrote:
> On Tuesday, April 8th, 2025 at 9:07 AM, Alejandro Vallejo  wrote:
> 
>>
>>
>> From: "Daniel P. Smith" dpsmith@apertussolutions.com
>>
>>
>> Introduce the domain builder which is capable of consuming a device tree as the
>> first boot module. If it finds a device tree as the first boot module, it will
>> set its type to BOOTMOD_FDT. This change only detects the boot module and
>> continues to boot with slight change to the boot convention that the dom0
>> kernel is no longer first boot module but is the second.
>>
>> No functional change intended.
>>
>> Signed-off-by: Daniel P. Smith dpsmith@apertussolutions.com
>>
>> Signed-off-by: Jason Andryuk jason.andryuk@amd.com
>>
>> ---
>> v3:
>> * Move obj-y += domain-builder/
>> * Remove blank line in Makefile
>> * const in has_hyperlaunch_fdt()
>> * CONFIG_LIBFDT rename
>> * Use boot_info forward declaration
>> * Rename domainbuilder.h to domain-builder.h
>> * Add fdt NULL check
>> ---
>> xen/arch/x86/Makefile | 1 +
>> xen/arch/x86/domain-builder/Kconfig | 2 +-
>> xen/arch/x86/domain-builder/Makefile | 2 +
>> xen/arch/x86/domain-builder/core.c | 57 +++++++++++++++++++++++
>> xen/arch/x86/domain-builder/fdt.c | 37 +++++++++++++++
>> xen/arch/x86/domain-builder/fdt.h | 21 +++++++++
> 
> I have a general question.
> 
> Wouldn't that make sense to use arch-independent placeholder for domain builder
> code right from the starting point?
> 
> For example something like xen/common/domain-builder ?
> 
> My understanding is that there's a lot of code in the domain builder which
> can be potentially shared/re-used with non-x86 architectures.

And indeed this point was already raised before.

Jan


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Subject: Re: [PATCH v3] xen/riscv: Increase XEN_VIRT_SIZE
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: 
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From: Jan Beulich 
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On 09.04.2025 21:01, Oleksii Kurochko wrote:
> --- a/xen/arch/riscv/include/asm/mm.h
> +++ b/xen/arch/riscv/include/asm/mm.h
> @@ -9,6 +9,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  
>  #include 
> @@ -35,6 +36,11 @@ static inline void *maddr_to_virt(paddr_t ma)
>      return (void *)va;
>  }
>  
> +#define is_init_section(p) ({                   \
> +    char *p_ = (char *)(unsigned long)(p);      \
> +    (p_ >= __init_begin) && (p_ < __init_end);  \
> +})

I think this wants to be put in xen/sections.h, next to where __init_{begin,end}
are declared. But first it wants making const-correct, to eliminate the potential
of it indirectly casting away const-ness from the incoming argument.

(At some point related stuff wants moving from kernel.h to sections.h, I suppose.
And at that point they will all want to have const added.)

> @@ -43,13 +49,21 @@ static inline void *maddr_to_virt(paddr_t ma)
>   */
>  static inline unsigned long virt_to_maddr(unsigned long va)
>  {
> +    const unsigned long xen_size = (unsigned long)(_end - _start);
> +    const unsigned long xen_virt_start = _AC(XEN_VIRT_START, UL);
> +    const unsigned long xen_virt_end = xen_virt_start + xen_size - 1;
> +
>      if ((va >= DIRECTMAP_VIRT_START) &&
>          (va <= DIRECTMAP_VIRT_END))
>          return directmapoff_to_maddr(va - directmap_virt_start);
>  
> -    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(2));
> -    ASSERT((va >> (PAGETABLE_ORDER + PAGE_SHIFT)) ==
> -           (_AC(XEN_VIRT_START, UL) >> (PAGETABLE_ORDER + PAGE_SHIFT)));
> +    ASSERT((va >= xen_virt_start) && (va <= xen_virt_end));
> +
> +    /*
> +    * The .init* sections will be freed when Xen completes booting,
> +    * so the [__init_begin, __init_end] range must be excluded.

[__init_begin, __init_end)

> +    */
> +    ASSERT((system_state != SYS_STATE_active) || !is_init_section(va));

system_state < SYS_STATE_active

> --- a/xen/arch/riscv/mm.c
> +++ b/xen/arch/riscv/mm.c
> @@ -31,20 +31,24 @@ unsigned long __ro_after_init phys_offset; /* = load_start - XEN_VIRT_START */
>  #define LOAD_TO_LINK(addr) ((unsigned long)(addr) - phys_offset)
>  
>  /*
> - * It is expected that Xen won't be more then 2 MB.
> + * It is expected that Xen won't be more then XEN_VIRT_SIZE MB.

Why "MB" when the macro already expands to MB(16)?

>   * The check in xen.lds.S guarantees that.
> - * At least 3 page tables (in case of Sv39 ) are needed to cover 2 MB.
> - * One for each page level table with PAGE_SIZE = 4 Kb.
>   *
> - * One L0 page table can cover 2 MB(512 entries of one page table * PAGE_SIZE).
> + * Root page table is shared with the initial mapping and is declared
> + * separetely. (look at stage1_pgtbl_root)

Nit: separately

>   *
> - * It might be needed one more page table in case when Xen load address
> - * isn't 2 MB aligned.
> + * An amount of page tables between root page table and L0 page table
> + * (in the case of Sv39 it covers L1 table):
> + *   (CONFIG_PAGING_LEVELS - 2) are needed for an identity mapping and
> + *   the same amount are needed for Xen.
>   *
> - * CONFIG_PAGING_LEVELS page tables are needed for the identity mapping,
> - * except that the root page table is shared with the initial mapping
> + * An amount of L0 page tables:
> + *   (512 entries of one L0 page table covers 2MB == 1< + *   XEN_VIRT_SIZE >> XEN_PT_LEVEL_SHIFT(1) are needed for Xen and
> + *   one L0 is needed for indenity mapping.

Nit: identity

But more importantly, where's this one L0 ...

>   */
> -#define PGTBL_INITIAL_COUNT ((CONFIG_PAGING_LEVELS - 1) * 2 + 1)
> +#define PGTBL_INITIAL_COUNT ((CONFIG_PAGING_LEVELS - 2) * 2 + \
> +                             (XEN_VIRT_SIZE >> XEN_PT_LEVEL_SHIFT(1)))

.... in this calculation?

> --- a/xen/arch/riscv/xen.lds.S
> +++ b/xen/arch/riscv/xen.lds.S
> @@ -178,4 +178,8 @@ ASSERT(!SIZEOF(.got.plt),  ".got.plt non-empty")
>   */
>  ASSERT(_end - _start <= XEN_VIRT_SIZE, "Xen too large for early-boot assumptions")
>  
> +/* Changing these ASSERTs can require an update of PGTBL_INITIAL_COUNT */
> +ASSERT(IS_ALIGNED(XEN_VIRT_START, GB(1)), "XEN_VIRT_START should be 1gb aligned")
> +ASSERT(IS_ALIGNED(XEN_VIRT_SIZE, MB(2)), "XEN_VIRT_SIZE should be 2mb aligned")

Such checking wants to happen as early as possible in the build. Deferring to
the linking step should be done only if some part of the expression only is
established when linking. Aiui both of these could be BUILD_BUG_ON() somewhere
near to where PGTBL_INITIAL_COUNT is defined or used.

Jan


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Date: Thu, 10 Apr 2025 10:55:50 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: "xen-devel@lists.xenproject.org" ,
	Marek Marczykowski ,
	Daniel Smith 
Subject: Re: [PATCH RESEND] x86/EFI: correct mkreloc header (field) reading
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On Thu, Apr 10, 2025 at 09:45:15AM +0200, Jan Beulich wrote:
> With us now reading the full combined optional and NT headers, the
> subsequent reading of (and seeking to) NT header fields is wrong. Since
> PE32 and PE32+ NT headers are different anyway (beyond the image base
> oddity extending across both headers), switch to using a union. This
> allows to fetch the image base more directly then.
> 
> Additionally add checking to map_section(), which would have caught at
> least the wrong (zero) image size that we previously used.
> 
> Fixes: f7f42accbbbb ("x86/efi: Use generic PE/COFF structures")
> Reported-by: Roger Pau Monné 
> Signed-off-by: Jan Beulich 

Reviewed-by: Roger Pau Monné 

Thanks, Roger.


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Subject: Re: [PATCH v3 04/16] kconfig: introduce option to independently
 enable libfdt
To: Alejandro Vallejo 
Cc: "Daniel P. Smith" ,
 Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini ,
 Michal Orzel ,
 Andrew Cooper ,
 Anthony PERARD , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 xen-devel@lists.xenproject.org
References: <20250408160802.49870-1-agarciav@amd.com>
 <20250408160802.49870-5-agarciav@amd.com>
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From: Jan Beulich 
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On 08.04.2025 18:07, Alejandro Vallejo wrote:
> From: "Daniel P. Smith" 
> 
> Currently, the inclusion of libfdt is controlled by the CONFIG_HAS_DEVICE_TREE
> kconfig flag. This flag also changes behavior in a few places, such as boot
> module processing for XSM. To support the ability to include libfdt without
> changing these behaviors, introduce CONFIG_LIBFDT. The inclusion of
> libfdt is then moved under CONFIG_LIBFDT.
> 
> Signed-off-by: Daniel P. Smith 
> Signed-off-by: Jason Andryuk 

Acked-by: Jan Beulich 

Looks independent of earlier patches, and hence may be possible to go in right
away?

Jan


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From: Juergen Gross 
To: torvalds@linux-foundation.org
Cc: linux-kernel@vger.kernel.org,
	xen-devel@lists.xenproject.org,
	sstabellini@kernel.org
Subject: [GIT PULL] xen: branch for v6.15-rc2
Date: Thu, 10 Apr 2025 11:07:13 +0200
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Linus,

Please git pull the following tag:

 git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip.git for-linus-6.15a-rc2-tag

xen: branch for v6.15-rc2

It contains the following patches:

- A simple fix adding the module description of the Xenbus frontend
  module.

- A fix correcting the xen-acpi-processor Kconfig dependency for PVH
  Dom0 support.

- A fix for the Xen balloon driver when running as Xen Dom0 in PVH mode.

- A fix for PVH Dom0 in order to avoid problems with CPU idle and
  frequency drivers conflicting with Xen.


Thanks.

Juergen

 arch/x86/xen/enlighten.c                   | 10 +++++++++
 arch/x86/xen/enlighten_pvh.c               | 19 ++++++++++++++++-
 arch/x86/xen/setup.c                       |  3 ---
 drivers/xen/Kconfig                        |  2 +-
 drivers/xen/balloon.c                      | 34 +++++++++++++++++++++---------
 drivers/xen/xenbus/xenbus_probe_frontend.c |  1 +
 6 files changed, 54 insertions(+), 15 deletions(-)

Arnd Bergmann (1):
      xenbus: add module description

Jason Andryuk (1):
      xen: Change xen-acpi-processor dom0 dependency

Roger Pau Monne (2):
      x86/xen: fix balloon target initialization for PVH dom0
      x86/xen: disable CPU idle and frequency drivers for PVH dom0


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Subject: Re: [PATCH v3 05/16] kconfig: introduce domain builder config option
To: Alejandro Vallejo 
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 Stefano Stabellini ,
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 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 08.04.2025 18:07, Alejandro Vallejo wrote:
> --- /dev/null
> +++ b/xen/arch/x86/domain-builder/Kconfig

This really looks to be the first patch where it needs settling on whether
all of this is to live under arch/x86/. If it is to, the reasons need writing
down somewhere - maybe not here, but at least in the cover letter.

> @@ -0,0 +1,15 @@
> +
> +menu "Domain Builder Features"
> +
> +config DOMAIN_BUILDER
> +	bool "Domain builder (UNSUPPORTED)" if UNSUPPORTED
> +	select LIB_DEVICE_TREE

Was this meant to be LIBFDT?

Jan


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Subject: Re: [PATCH TEST-ARTEFACTS 0/8] Cleanup and Linux ARM64 support
To: Jason Andryuk ,
 Xen-devel 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Michal Orzel ,
 =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
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 , Juergen Gross 
References: <20250409163702.2037301-1-andrew.cooper3@citrix.com>
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On 10/04/2025 1:09 am, Jason Andryuk wrote:
> On 2025-04-09 13:01, Andrew Cooper wrote:
>> On 09/04/2025 5:36 pm, Andrew Cooper wrote:
>>> Various bits of cleanup, and support for arm64 Linux builds.
>>>
>>> Run using the new Linux 6.6.86 on (most) x86, and ARM64:
>>>   
>>> https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1760667411
>>
>> Lovely, Linux 6.6.86 is broken for x86 PVH.  It triple faults very
>> early on.
>>
>> Sample log:
>> https://gitlab.com/xen-project/hardware/xen-staging/-/jobs/9673797450
>>
>> I guess we'll have to stay on 6.6.56 for now.  (Only affects the final
>> patch.)
>
> This is an AMD system:
>
> (XEN) [    2.577549] d0v0 Triple fault - invoking HVM shutdown action 1
> (XEN) [    2.577557] RIP:    0008:[<0000000001f851d4>]
>
> The instruction:
> ffffffff81f851d4:       0f 01 c1                vmcall
>
> vmcall is the Intel instruction, and vmmcall is the AMD one, so CPU
> detection is malfunctioning.
>
> (Early PVH is running identity mapped, so it's offset from
> ffffffff80000000)
>
> There are no debug symbols in the vmlinux I extracted from the bzImage
> from gitlab, but I can repro locally with on 6.6.86.  It's unclear to
> me why it's failing.
>
> Trying:
> diff --git i/arch/x86/xen/enlighten.c w/arch/x86/xen/enlighten.c
> index 0219f1c90202..fb4ad7fe3e34 100644
> --- i/arch/x86/xen/enlighten.c
> +++ w/arch/x86/xen/enlighten.c
> @@ -123,11 +123,10 @@ noinstr void *__xen_hypercall_setfunc(void)
>         if (!boot_cpu_has(X86_FEATURE_CPUID))
>                 xen_get_vendor();
>
> -       if ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD ||
> -            boot_cpu_data.x86_vendor == X86_VENDOR_HYGON))
> -               func = xen_hypercall_amd;
> -       else
> +       if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL )
>                 func = xen_hypercall_intel;
> +       else
> +               func = xen_hypercall_amd;
>
>         static_call_update_early(xen_hypercall, func);
>
> But it still calls xen_hypercall_intel().  So maybe x86_vendor isn't
> getting set and ends up as 0 (X86_VENDOR_INTEL)?
>
> That's as far as I got here.
>
> Different but related, on mainline master, I also get a fail in
> vmcall. There, I see in the disassembly that
> __xen_hypercall_setfunc()'s calls to xen_get_vendor() is gone. 
> xen_get_vendor() seems to have been DCE-ed.  There is some new code
> that hardcodes features - "x86/cpufeatures: Add {REQUIRED,DISABLED}
> feature configs" - which may be responsible.

6.6.74 is broken too.  (That's the revision that the ARM tests want). 
So it broke somewhere between .56 and .74 which narrows the bisect a little.

https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1761323774

In Gitlab, both AMD and Intel are failing in roughly the same way.

~Andrew


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Message-ID: <6c1df460-6620-4439-b072-c23ebe738e99@suse.com>
Date: Thu, 10 Apr 2025 11:32:33 +0200
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Subject: Re: [PATCH TEST-ARTEFACTS 0/8] Cleanup and Linux ARM64 support
To: Jason Andryuk ,
 Andrew Cooper ,
 Xen-devel 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Michal Orzel ,
 =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 , Anthony PERARD 
References: <20250409163702.2037301-1-andrew.cooper3@citrix.com>
 <828cabc9-512f-4c2f-a7d7-b9c8963c1300@citrix.com>
 
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From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= 
To: Jason Andryuk ,
 Andrew Cooper ,
 Xen-devel 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Michal Orzel ,
 =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 , Anthony PERARD 
Message-ID: <6c1df460-6620-4439-b072-c23ebe738e99@suse.com>
Subject: Re: [PATCH TEST-ARTEFACTS 0/8] Cleanup and Linux ARM64 support
References: <20250409163702.2037301-1-andrew.cooper3@citrix.com>
 <828cabc9-512f-4c2f-a7d7-b9c8963c1300@citrix.com>
 
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From: "Anthony PERARD" 
Subject: =?utf-8?Q?Re:=20[PATCH=202/8]=20Port=20containerise?=
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On Wed, Apr 09, 2025 at 05:36:56PM +0100, Andrew Cooper wrote:
> +BASE="registry.gitlab.com/xen-project/hardware/test-artifacts"
> +case "_${CONTAINER}" in
> +    _alpine-x86_64-base) CONTAINER="${BASE}/alpine:x86_64-base" ;;

There's no "images/alpine/x86_64-base.dockerfile" in the repo, do you
mean "alpine:x86_64-rootfs" instead?

Cheers,

-- 

Anthony Perard | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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On 10/04/2025 10:33 am, Anthony PERARD wrote:
> On Wed, Apr 09, 2025 at 05:36:56PM +0100, Andrew Cooper wrote:
>> +BASE="registry.gitlab.com/xen-project/hardware/test-artifacts"
>> +case "_${CONTAINER}" in
>> +    _alpine-x86_64-base) CONTAINER="${BASE}/alpine:x86_64-base" ;;
> There's no "images/alpine/x86_64-base.dockerfile" in the repo, do you
> mean "alpine:x86_64-rootfs" instead?

Yes and no.  I'm renaming the containers, but haven't posted that part
of the series yet.

This wants to go back to rootfs in the short term.

~Andrew


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Cc: Xen-devel ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Michal Orzel ,
 Anthony PERARD 
References: <20250409163702.2037301-1-andrew.cooper3@citrix.com>
 <20250409163702.2037301-5-andrew.cooper3@citrix.com>
 
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On 09/04/2025 6:15 pm, Marek Marczykowski-Górecki wrote:
> On Wed, Apr 09, 2025 at 05:36:58PM +0100, Andrew Cooper wrote:
>> Factor out the registry into a common location.  Fix the worflow name.  List
>> all the stages.  Set a default expiry of 1 month.
> This is okay, since last artifacts for a branch are preserved even if
> expired.
>
>> Note all the current jobs as legacy.  Their naming scheme needs changing, and
>> we'll use this opportunity to switch formats too.  However, the artefacts need
>> to stay using the old name until the final staging-* branch using them is
>> phased out.
> This could use a comment what should the new naming be.

Same as we use in Xen.  linux-$VER-$ARCH, as shown later in the series,
and alpine-$VER-$ARCH-rootfs (currently there's no $VER, and this is
going to break horribly when moving off 3.18).

~Andrew


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Subject: Re: [PATCH v3 06/16] x86/hyperlaunch: introduce the domain builder
To: Alejandro Vallejo 
Cc: "Daniel P. Smith" ,
 Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini ,
 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 xen-devel@lists.xenproject.org
References: <20250408160802.49870-1-agarciav@amd.com>
 <20250408160802.49870-7-agarciav@amd.com>
Content-Language: en-US
From: Jan Beulich 
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On 08.04.2025 18:07, Alejandro Vallejo wrote:
> --- a/xen/arch/x86/Makefile
> +++ b/xen/arch/x86/Makefile
> @@ -1,6 +1,7 @@
>  obj-y += acpi/
>  obj-y += boot/
>  obj-y += cpu/
> +obj-y += domain-builder/

I continue to be irritated that this isn't obj-$(DOMAIN_BUILDER). The
sole function in core.c has "if ( IS_ENABLED(CONFIG_DOMAIN_BUILDER) )" around
its entire body (which is unhelpful at least from an indentation pov), and
the sole function in fdt.c is only used by the one in core.c. builder_init()
clearly could have an inline stub alternative as of this patch. If future
patches change that picture, imo that would need saying here to justify this
unconditional descend into the new subdir.

> --- a/xen/arch/x86/domain-builder/Kconfig
> +++ b/xen/arch/x86/domain-builder/Kconfig
> @@ -3,7 +3,7 @@ menu "Domain Builder Features"
>  
>  config DOMAIN_BUILDER
>  	bool "Domain builder (UNSUPPORTED)" if UNSUPPORTED
> -	select LIB_DEVICE_TREE
> +	select LIBFDT

That's what the earlier patch meant to be doing?

> --- /dev/null
> +++ b/xen/arch/x86/domain-builder/Makefile
> @@ -0,0 +1,2 @@
> +obj-$(CONFIG_DOMAIN_BUILDER) += fdt.init.o
> +obj-y += core.init.o

*.init.o want enlisting into obj-bin-y.

> --- /dev/null
> +++ b/xen/arch/x86/domain-builder/core.c
> @@ -0,0 +1,57 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Copyright (C) 2024, Apertus Solutions, LLC
> + */
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include 
> +
> +#include "fdt.h"
> +
> +void __init builder_init(struct boot_info *bi)
> +{
> +    if ( IS_ENABLED(CONFIG_DOMAIN_BUILDER) )
> +    {
> +        int ret;
> +
> +        switch ( ret = has_hyperlaunch_fdt(bi) )
> +        {
> +        case 0:
> +            printk("Hyperlaunch device tree detected\n");
> +            bi->hyperlaunch_enabled = true;
> +            bi->mods[0].type = BOOTMOD_FDT;
> +            break;
> +
> +        case -EINVAL:
> +            printk("Hyperlaunch device tree was not detected\n");
> +            bi->hyperlaunch_enabled = false;
> +            break;

For people not using hyperlaunch (which for the time being is likely going
to be a majority) this log line will be little more than spam. I'd like it
to be considered to be dropped.

> --- /dev/null
> +++ b/xen/arch/x86/domain-builder/fdt.c
> @@ -0,0 +1,37 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Copyright (C) 2024, Apertus Solutions, LLC
> + */
> +#include 

Was xen/errno.h meant here?

> +#include 
> +#include 

I don't see anything used from there.

> +#include 
> +
> +#include 
> +#include 

How does page.h come into play here?

> --- a/xen/arch/x86/setup.c
> +++ b/xen/arch/x86/setup.c
> @@ -36,6 +36,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -1281,9 +1282,12 @@ void asmlinkage __init noreturn __start_xen(void)
>                 bi->nr_modules);
>      }
>  
> -    /* Dom0 kernel is always first */
> -    bi->mods[0].type = BOOTMOD_KERNEL;
> -    bi->domains[0].kernel = &bi->mods[0];
> +    builder_init(bi);
> +
> +    /* Find first unknown boot module to use as Dom0 kernel */
> +    i = first_boot_module_index(bi, BOOTMOD_UNKNOWN);

For this I think it would be quite desirable if in a prereq patch i's type
was (finally) changed to unsigned int, which is how it's used effectively
everywhere, with one loop requiring a little bit of adjustment.

> +    bi->mods[i].type = BOOTMOD_KERNEL;

Overrunning the array if MAX_NR_BOOTMODS + 1 was returned.

Jan


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From: "Anthony PERARD" 
Subject: =?utf-8?Q?Re:=20[PATCH=203/8]=20Fix=20container=20user=20setup?=
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References: <20250409163702.2037301-1-andrew.cooper3@citrix.com> <20250409163702.2037301-4-andrew.cooper3@citrix.com>
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On Wed, Apr 09, 2025 at 05:36:57PM +0100, Andrew Cooper wrote:
> Use USER (and 'user' as normal), rather than specifying configuration from the
> outside.  This also fixes the fact that root-needing containers need to
> override the default.

This patch also removes one "docker:platform" which is redundant with
the containers image name.

> Signed-off-by: Andrew Cooper 

Reviewed-by: Anthony PERARD 

Thanks,

-- 

Anthony Perard | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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Date: Thu, 10 Apr 2025 11:48:47 +0200
From: Borislav Petkov 
To: Juergen Gross 
Cc: linux-kernel@vger.kernel.org, x86@kernel.org,
	Boris Ostrovsky ,
	Thomas Gleixner ,
	Ingo Molnar ,
	Dave Hansen ,
	"H. Peter Anvin" , xen-devel@lists.xenproject.org
Subject: Re: [PATCH] xen: fix multicall debug feature
Message-ID: <20250410094847.GAZ_eT__ab_VRmb8uk@fat_crate.local>
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On Thu, Mar 27, 2025 at 08:06:02PM +0100, Juergen Gross wrote:
> Initializing a percpu variable with the address of a struct tagged as
> .initdata is breaking the build with CONFIG_SECTION_MISMATCH_WARN_ONLY
> not set to "y".
> 
> Fix that by using an access function instead returning the .initdata
> struct address if the percpu space of the struct hasn't been
> allocated yet.
> 
> Fixes: 368990a7fe30 ("xen: fix multicall debug data referencing")
> Reported-by: Borislav Petkov 
> Signed-off-by: Juergen Gross 
> ---
>  arch/x86/xen/multicalls.c | 26 ++++++++++++++------------
>  arch/x86/xen/smp_pv.c     |  1 -
>  arch/x86/xen/xen-ops.h    |  3 ---
>  3 files changed, 14 insertions(+), 16 deletions(-)

Looks good, doesn't fire here anymore.

Acked-by: Borislav Petkov (AMD) 
Tested-by: Borislav Petkov (AMD) 

Thx!

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette


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Date: Thu, 10 Apr 2025 10:59:14 +0100
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Subject: Re: [PATCH 7/8] Infrastructure for arm64 linux builds
To: Xen-devel 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Michal Orzel ,
 =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 , Anthony PERARD 
References: <20250409163702.2037301-1-andrew.cooper3@citrix.com>
 <20250409163702.2037301-8-andrew.cooper3@citrix.com>
Content-Language: en-GB
From: Andrew Cooper 
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In-Reply-To: <20250409163702.2037301-8-andrew.cooper3@citrix.com>
Content-Type: text/plain; charset=UTF-8
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On 09/04/2025 5:37 pm, Andrew Cooper wrote:
> diff --git a/images/alpine/3.18-arm64-build.dockerfile b/images/alpine/3.18-arm64-build.dockerfile
> new file mode 100644
> index 000000000000..c76ac435e8dd
> --- /dev/null
> +++ b/images/alpine/3.18-arm64-build.dockerfile
> @@ -0,0 +1,27 @@
> +# syntax=docker/dockerfile:1
> +FROM --platform=linux/arm64/v8 alpine:3.18
> +LABEL maintainer.name="The Xen Project" \
> +      maintainer.email="xen-devel@lists.xenproject.org"
> +
> +RUN apk --no-cache add bash
> +
> +RUN bash -ex < +      adduser -D user --shell bash
> +
> +      DEPS=(# Base environment
> +            musl-dev
> +            build-base
> +            curl

It turns out we don't need musl-dev.  build-base depends on libc-dev
which musl-dev provides.  This was a bad dependency brought across from
the form we have in xen.git right now.

~Andrew


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From: "Anthony PERARD" 
Subject: =?utf-8?Q?Re:=20[PATCH=204/8]=20Clean=20up=20Gitlab=20yaml?=
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On Wed, Apr 09, 2025 at 05:36:58PM +0100, Andrew Cooper wrote:
> diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
> index 36ec6a7e1ee5..5a0a853e551d 100644
> --- a/.gitlab-ci.yml
> +++ b/.gitlab-ci.yml
> @@ -1,12 +1,19 @@
> +variables:
> +  REGISTRY: registry.gitlab.com/xen-project/hardware/test-artifacts

Did you consider naming that variable XEN_REGISTRY like in the xen.git
repo? REGISTRY is a fine name too.

> +
>  workflow:
> -  name: "xen test artifacts"
> +  name: "Xen test artifacts"

Isn't this a very useless workflow:name? Can I suggest to remove it
instead? I mean, currently, all pipeline appear to do the same thing:

    https://gitlab.com/xen-project/hardware/test-artifacts/-/pipelines

Without "workflow:name" set, the default name will be the subject of the
top commit.

Thanks,

-- 

Anthony Perard | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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Date: Thu, 10 Apr 2025 12:10:11 +0200
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Subject: Re: [PATCH v3 07/16] x86/hyperlaunch: initial support for hyperlaunch
 device tree
To: Alejandro Vallejo 
Cc: "Daniel P. Smith" ,
 Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini ,
 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 xen-devel@lists.xenproject.org
References: <20250408160802.49870-1-agarciav@amd.com>
 <20250408160802.49870-8-agarciav@amd.com>
Content-Language: en-US
From: Jan Beulich 
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In-Reply-To: <20250408160802.49870-8-agarciav@amd.com>
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On 08.04.2025 18:07, Alejandro Vallejo wrote:
> --- a/xen/arch/x86/domain-builder/core.c
> +++ b/xen/arch/x86/domain-builder/core.c
> @@ -44,6 +44,21 @@ void __init builder_init(struct boot_info *bi)
>              break;
>          }
>      }
> +
> +    if ( bi->hyperlaunch_enabled )
> +    {

Not knowing what else if going to appear here and in what shape, could the
if() here be avoided by making case blocks in the earlier switch setting
the field to false (which is kind of redundant anyway with it starting out
false) use "return" instead of "break"? The the setting of the field to
true could also be centralized below the switch().

> --- a/xen/arch/x86/domain-builder/fdt.c
> +++ b/xen/arch/x86/domain-builder/fdt.c
> @@ -13,6 +13,36 @@
>  
>  #include "fdt.h"
>  
> +static int __init find_hyperlaunch_node(const void *fdt)
> +{
> +    int hv_node = fdt_path_offset(fdt, "/chosen/hypervisor");
> +
> +    if ( hv_node >= 0 )
> +    {
> +        /* Anything other than zero indicates no match */
> +        if ( fdt_node_check_compatible(fdt, hv_node, "hypervisor,xen") )
> +            return -ENODATA;
> +        else
> +            return hv_node;

Could I talk you into omitting such unnecessary "else"?

> @@ -20,7 +50,41 @@ int __init has_hyperlaunch_fdt(const struct boot_info *bi)
>  
>      if ( !fdt || fdt_check_header(fdt) < 0 )
>          ret = -EINVAL;
> +    else
> +        ret = find_hyperlaunch_node(fdt);
> +
> +    bootstrap_unmap();
> +
> +    return ret < 0 ? ret : 0;
> +}
> +
> +int __init walk_hyperlaunch_fdt(struct boot_info *bi)
> +{
> +    int ret = 0, hv_node, node;
> +    const void *fdt = bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_IDX]);
> +
> +    if ( unlikely(!fdt) )
> +        return -EINVAL;
> +
> +    hv_node = find_hyperlaunch_node(fdt);
> +    if ( hv_node < 0 )
> +    {
> +        ret = hv_node;
> +        goto err_out;
> +    }
> +
> +    fdt_for_each_subnode(node, fdt, hv_node)
> +    {
> +        ret = fdt_node_check_compatible(fdt, node, "xen,domain");
> +        if ( ret == 0 )
> +            bi->nr_domains++;
> +    }
> +
> +    /* Until multi-domain construction is added, throw an error */
> +    if ( !bi->nr_domains || bi->nr_domains > 1 )

Simply "!= 1"?

> --- a/xen/arch/x86/domain-builder/fdt.h
> +++ b/xen/arch/x86/domain-builder/fdt.h
> @@ -11,11 +11,16 @@ struct boot_info;
>  
>  #ifdef CONFIG_DOMAIN_BUILDER
>  int has_hyperlaunch_fdt(const struct boot_info *bi);
> +int walk_hyperlaunch_fdt(struct boot_info *bi);
>  #else
>  static inline int __init has_hyperlaunch_fdt(const struct boot_info *bi)
>  {
>      return -EINVAL;
>  }
> +static inline int __init walk_hyperlaunch_fdt(struct boot_info *bi)
> +{
> +    return -EINVAL;
> +}

There's no need for this stub (nor the has_hyperlaunch_fdt() one, as I
notice only now) - even with present arrangements calling code is guarded
such that DCE will take care of eliminating the call, and hence having a
declaration suffices.

Jan


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To: Anthony PERARD 
Cc: Xen-devel ,
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On 10/04/2025 11:07 am, Anthony PERARD wrote:
> On Wed, Apr 09, 2025 at 05:36:58PM +0100, Andrew Cooper wrote:
>> diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
>> index 36ec6a7e1ee5..5a0a853e551d 100644
>> --- a/.gitlab-ci.yml
>> +++ b/.gitlab-ci.yml
>> @@ -1,12 +1,19 @@
>> +variables:
>> +  REGISTRY: registry.gitlab.com/xen-project/hardware/test-artifacts
> Did you consider naming that variable XEN_REGISTRY like in the xen.git
> repo? REGISTRY is a fine name too.

I did, except the makefile for rebuilding takes REGISTRY, so this
removes a REGISTERY=$XEN_REGISTRY from the container rebuild logic.

Which is another thing I haven't posted, because it turns out our
docker-in-docker only works for x86, not for ARM.

>
>> +
>>  workflow:
>> -  name: "xen test artifacts"
>> +  name: "Xen test artifacts"
> Isn't this a very useless workflow:name? Can I suggest to remove it
> instead? I mean, currently, all pipeline appear to do the same thing:
>
>     https://gitlab.com/xen-project/hardware/test-artifacts/-/pipelines
>
> Without "workflow:name" set, the default name will be the subject of the
> top commit.

I did wonder about the utility of it.  I'll drop.

~Andrew


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Cc: Xen-devel ,
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On 09/04/2025 6:15 pm, Andrew Cooper wrote:
> On 09/04/2025 6:11 pm, Marek Marczykowski-Górecki wrote:
>> On Wed, Apr 09, 2025 at 05:37:01PM +0100, Andrew Cooper wrote:
>>> Signed-off-by: Andrew Cooper 
>>> ---
>>> CC: Roger Pau Monné 
>>> CC: Stefano Stabellini 
>>> CC: Michal Orzel 
>>> CC: Marek Marczykowski-Górecki 
>>> CC: Anthony PERARD 
>>> ---
>>>  .gitlab-ci.yml                            |  7 ++++++
>>>  containerize                              |  1 +
>>>  images/alpine/3.18-arm64-build.dockerfile | 27 +++++++++++++++++++++++
>>>  scripts/build-linux.sh                    | 10 +++++++++
>>>  4 files changed, 45 insertions(+)
>>>  create mode 100644 images/alpine/3.18-arm64-build.dockerfile
>>>
>>> diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
>>> index ff8dce7be05d..6e38c2f2a108 100644
>>> --- a/.gitlab-ci.yml
>>> +++ b/.gitlab-ci.yml
>>> @@ -19,6 +19,13 @@ stages:
>>>      exclude:
>>>        - binaries/.gitignore
>>>  
>>> +.arm64-artifacts:
>>> +  extends: .artifacts
>>> +  tags:
>>> +    - arm64
>>> +  variables:
>>> +    CONTAINER: alpine:3.18-arm64-build
>> Arm64 kernel used to be built in a Bookworm container.
> So did x86 before they were moved across.
>
>>  The build in alpine
>> has "find: unrecognized: -printf" in the middle of the build. It doesn't
>> fail outright, but something might be broken. I guess it's related to
>> initramfs - maybe some option can be disabled, to avoid this message?
> Nothing seems to break...
>
> There's also a bad awk regex.  Alpine seem to fix this by using mawk,
> except they then have to patch the Linux build system to take the
> override properly.
>
> I can't see anything obvious they do to fix this -printf warning.

Yes I can.  We want findutils too.

x86 also wants diffutils too. (as I'm fixing that side of things too)

~Andrew


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Date: Thu, 10 Apr 2025 12:42:50 +0200
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v3 08/16] x86/hyperlaunch: Add helpers to locate multiboot
 modules
To: Alejandro Vallejo 
Cc: Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini ,
 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Julien Grall , Bertrand Marquis ,
 xen-devel@lists.xenproject.org
References: <20250408160802.49870-1-agarciav@amd.com>
 <20250408160802.49870-9-agarciav@amd.com>
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In-Reply-To: <20250408160802.49870-9-agarciav@amd.com>
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On 08.04.2025 18:07, Alejandro Vallejo wrote:
> --- a/xen/arch/x86/domain-builder/fdt.c
> +++ b/xen/arch/x86/domain-builder/fdt.c
> @@ -13,6 +13,148 @@
>  
>  #include "fdt.h"
>  
> +/*
> + * Unpacks a "reg" property into its address and size constituents.
> + *
> + * @param prop          Pointer to an FDT "reg" property.
> + * @param address_cells Number of 4-octet cells that make up an "address".
> + * @param size_cells    Number of 4-octet cells that make up a "size".
> + * @param p_addr[out]   Address encoded in the property.
> + * @param p_size[out]   Size encoded in the property.
> + * @returns             -EINVAL on malformed property, 0 otherwise.
> + */
> +static int __init read_fdt_prop_as_reg(const struct fdt_property *prop,
> +                                       int address_cells, int size_cells,
> +                                       uint64_t *p_addr, uint64_t *p_size)
> +{
> +    const fdt32_t *cell = (const fdt32_t *)prop->data;
> +    uint64_t addr, size;
> +
> +    if ( fdt32_to_cpu(prop->len) !=
> +         (address_cells + size_cells) * sizeof(*cell) )
> +    {
> +        printk("  Cannot read reg %lu+%lu from prop len %u\n",
> +            address_cells * sizeof(*cell), size_cells * sizeof(*cell),
> +            fdt32_to_cpu(prop->len));
> +        return -EINVAL;
> +    }
> +
> +    switch ( address_cells ) {

Nit: Brace on its own line please.

> +    case 1:
> +        addr = fdt32_to_cpu(*cell);
> +        break;
> +    case 2:
> +        addr = fdt64_to_cpu(*(const fdt64_t *)cell);
> +        break;
> +    default:
> +        printk("  unsupported sized address_cells\n");

Depending on how likely this or ...

> +        return -EINVAL;
> +    }
> +
> +    cell += address_cells;
> +    switch ( size_cells ) {
> +    case 1:
> +        size = fdt32_to_cpu(*cell);
> +        break;
> +    case 2:
> +        size = fdt64_to_cpu(*(const fdt64_t *)cell);
> +        break;
> +    default:
> +        printk("  unsupported sized size_cells\n");

... this path is to be hit, perhaps also log the bogus size? Then again, this
being passed in, isn't it an internal error if the wrong size makes it here?
I.e. rather use ASSERT_UNREACHABLE()?

> +        return -EINVAL;
> +    }
> +
> +    *p_addr = addr;
> +    *p_size = size;
> +
> +    return 0;
> +}

The function as a whole looks somewhat similar to fdt_get_reg_prop(). What's
the deal?

> +/*
> + * Locate a multiboot module given its node offset in the FDT.
> + *
> + * The module location may be given via either FDT property:
> + *     * reg = 
> + *         * Mutates `bi` to append the module.
> + *     * module-index = 
> + *         * Leaves `bi` unchanged.
> + *
> + * @param fdt           Pointer to the full FDT.
> + * @param node          Offset for the module node.
> + * @param address_cells Number of 4-octet cells that make up an "address".
> + * @param size_cells    Number of 4-octet cells that make up a "size".
> + * @param bi[inout]     Xen's representation of the boot parameters.
> + * @return              -EINVAL on malformed nodes, otherwise
> + *                      index inside `bi->mods`
> + */
> +int __init fdt_read_multiboot_module(const void *fdt, int node,
> +                                     int address_cells, int size_cells,
> +                                     struct boot_info *bi)

Functions without callers and non-static ones without declarations are
disliked by Misra.

> +{
> +    const struct fdt_property *prop;
> +    uint64_t addr, size;
> +    int ret;
> +    int idx;
> +
> +    ASSERT(!fdt_node_check_compatible(fdt, node, "multiboot,module"));
> +
> +    /* Location given as a `module-index` property. */
> +    prop = fdt_get_property(fdt, node, "module-index", NULL);
> +
> +    if ( prop )
> +    {
> +        if ( fdt_get_property(fdt, node, "reg", NULL) )
> +        {
> +            printk("  Location of multiboot,module defined multiple times\n");
> +            return -EINVAL;
> +        }
> +        return fdt_cell_as_u32((const fdt32_t *)prop->data);

No concerns here of there being less than 4 bytes of data?

> +    }
> +
> +    /* Otherwise location given as a `reg` property. */
> +    prop = fdt_get_property(fdt, node, "reg", NULL);
> +
> +    if ( !prop )
> +    {
> +        printk("  No location for multiboot,module\n");
> +        return -EINVAL;
> +    }
> +    if ( fdt_get_property(fdt, node, "module-index", NULL) )
> +    {
> +        printk("  Location of multiboot,module defined multiple times\n");
> +        return -EINVAL;
> +    }
> +
> +    ret = read_fdt_prop_as_reg(prop, address_cells, size_cells, &addr, &size);
> +
> +    if ( ret < 0 )
> +    {
> +        printk("  Failed reading reg for multiboot,module\n");
> +        return -EINVAL;
> +    }
> +
> +    idx = bi->nr_modules + 1;

This at least looks like an off-by-one. If the addition of 1 is really
intended, I think it needs commenting on.

> +    if ( idx > MAX_NR_BOOTMODS )
> +    {
> +        /*
> +         * MAX_NR_BOOTMODS cannot exceed the max for MB1, represented by 32bits,
> +         * thus the cast down to a u32 will be safe due to the prior check.
> +         */
> +        BUILD_BUG_ON(MAX_NR_BOOTMODS >= (uint64_t)UINT32_MAX);

Because of idx being a signed quantity, isn't INT_MAX the required upper
bound? The latest then the somewhat odd cast should also be possible to
drop.

> +        printk("  idx %d exceeds maximum boot modules\n", idx);

Perhaps include STR(MAX_NR_BOOTMODS) as well?

> --- a/xen/include/xen/libfdt/libfdt-xen.h
> +++ b/xen/include/xen/libfdt/libfdt-xen.h
> @@ -13,6 +13,63 @@
>  
>  #include 
>  
> +static inline int __init fdt_cell_as_u32(const fdt32_t *cell)

Why plain int here, but ...

> +{
> +    return fdt32_to_cpu(*cell);
> +}
> +
> +static inline uint64_t  __init fdt_cell_as_u64(const fdt32_t *cell)

... a fixed-width and unsigned type here? Question is whether the former
helper is really warranted.

Also nit: Stray double blank.

> +{
> +    return ((uint64_t)fdt32_to_cpu(cell[0]) << 32) | fdt32_to_cpu(cell[1]);

That is - uniformly big endian?

> +}

Marking such relatively generic inline functions __init is also somewhat
risky. 

> +/*
> + * Property: reg
> + *
> + * Defined in Section 2.3.6 of the Device Tree Specification is the "reg"
> + * standard property. The property is a prop-encoded-array that is encoded as
> + * an arbitrary number of (address, size) pairs.  We only extract a single
> + * pair since that is what is used in practice.
> + */
> +static inline int __init fdt_get_reg_prop(
> +    const void *fdt, int node, unsigned int addr_cells, unsigned int size_cells,
> +    uint64_t *addr, uint64_t *size)
> +{
> +    int ret;
> +    const struct fdt_property *prop;
> +    fdt32_t *cell;
> +
> +    /* FDT spec max size is 4 (128bit int), but largest arch int size is 64 */
> +    if ( size_cells > 2 || addr_cells > 2 )
> +        return -EINVAL;
> +
> +    prop = fdt_get_property(fdt, node, "reg", &ret);
> +    if ( !prop || ret < sizeof(u32) )

No uses of u32 et al in new code please. Question anyway is whether this isn't
meant to be sizeof(*cell) like you have it ...

> +        return ret < 0 ? ret : -EINVAL;
> +
> +    if ( fdt32_to_cpu(prop->len) !=
> +	 ((size_cells + addr_cells) * sizeof(*cell)) )

... here. Or maybe it's to be sizeof(prop->len)?

Also nit: Hard tab slipped in.

> +        return -EINVAL;
> +
> +    cell = (fdt32_t *)prop->data;
> +
> +    /* read address field */
> +    if ( addr_cells == 1 )
> +        *addr = fdt_cell_as_u32(cell);
> +    else
> +        *addr = fdt_cell_as_u64(cell);
> +
> +    cell += addr_cells;
> +
> +    /* read size field */
> +    if ( size_cells == 1 )
> +        *size = fdt_cell_as_u32(cell);
> +    else
> +        *size = fdt_cell_as_u64(cell);
> +
> +    return 0;
> +}

Does this really want/need to be an inline function?

Jan


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Date: Thu, 10 Apr 2025 11:57:23 +0100
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Subject: Re: [PATCH 7/8] Infrastructure for arm64 linux builds
From: Andrew Cooper 
To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 
Cc: Xen-devel ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Michal Orzel ,
 Anthony PERARD 
References: <20250409163702.2037301-1-andrew.cooper3@citrix.com>
 <20250409163702.2037301-8-andrew.cooper3@citrix.com>
  <21a35c38-ce2e-48c4-9586-9c232f77affa@citrix.com>
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On 10/04/2025 11:41 am, Andrew Cooper wrote:
> On 09/04/2025 6:15 pm, Andrew Cooper wrote:
>> On 09/04/2025 6:11 pm, Marek Marczykowski-Górecki wrote:
>>> On Wed, Apr 09, 2025 at 05:37:01PM +0100, Andrew Cooper wrote:
>>>> Signed-off-by: Andrew Cooper 
>>>> ---
>>>> CC: Roger Pau Monné 
>>>> CC: Stefano Stabellini 
>>>> CC: Michal Orzel 
>>>> CC: Marek Marczykowski-Górecki 
>>>> CC: Anthony PERARD 
>>>> ---
>>>>  .gitlab-ci.yml                            |  7 ++++++
>>>>  containerize                              |  1 +
>>>>  images/alpine/3.18-arm64-build.dockerfile | 27 +++++++++++++++++++++++
>>>>  scripts/build-linux.sh                    | 10 +++++++++
>>>>  4 files changed, 45 insertions(+)
>>>>  create mode 100644 images/alpine/3.18-arm64-build.dockerfile
>>>>
>>>> diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
>>>> index ff8dce7be05d..6e38c2f2a108 100644
>>>> --- a/.gitlab-ci.yml
>>>> +++ b/.gitlab-ci.yml
>>>> @@ -19,6 +19,13 @@ stages:
>>>>      exclude:
>>>>        - binaries/.gitignore
>>>>  
>>>> +.arm64-artifacts:
>>>> +  extends: .artifacts
>>>> +  tags:
>>>> +    - arm64
>>>> +  variables:
>>>> +    CONTAINER: alpine:3.18-arm64-build
>>> Arm64 kernel used to be built in a Bookworm container.
>> So did x86 before they were moved across.
>>
>>>  The build in alpine
>>> has "find: unrecognized: -printf" in the middle of the build. It doesn't
>>> fail outright, but something might be broken. I guess it's related to
>>> initramfs - maybe some option can be disabled, to avoid this message?
>> Nothing seems to break...
>>
>> There's also a bad awk regex.  Alpine seem to fix this by using mawk,
>> except they then have to patch the Linux build system to take the
>> override properly.
>>
>> I can't see anything obvious they do to fix this -printf warning.
> Yes I can.  We want findutils too.
>
> x86 also wants diffutils too. (as I'm fixing that side of things too)

Excellent.  Both x86 and ARM are clean with these changes:

https://gitlab.com/xen-project/hardware/test-artifacts/-/jobs/9682944850
https://gitlab.com/xen-project/hardware/test-artifacts/-/jobs/9682944867

The awk complaint has gone away too, so I suppose that's a knock-on effect.

~Andrew


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Subject: Re: [PATCH v3 09/16] x86/hyperlaunch: locate dom0 kernel with
 hyperlaunch
To: Alejandro Vallejo 
Cc: "Daniel P. Smith" ,
 Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini ,
 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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From: Jan Beulich 
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On 08.04.2025 18:07, Alejandro Vallejo wrote:
> From: "Daniel P. Smith" 
> 
> Look for a subnode of type `multiboot,kernel` within a domain node. If
> found, locate it using the multiboot module helper to generically ensure
> it lives in the module list. If the bootargs property is present and
> there was not an MB1 string, then use the command line from the device
> tree definition.
> 
> Signed-off-by: Daniel P. Smith 
> Signed-off-by: Jason Andryuk 
> Signed-off-by: Alejandro Vallejo 
> ---
> v3:
>     * Add const to fdt
>     * Remove idx == NULL checks
>     * Add BUILD_BUG_ON for MAX_NR_BOOTMODS fitting in a uint32_t

At least this one looks to rather belong into patch 08?

> --- a/xen/arch/x86/domain-builder/fdt.c
> +++ b/xen/arch/x86/domain-builder/fdt.c
> @@ -155,6 +155,52 @@ int __init fdt_read_multiboot_module(const void *fdt, int node,
>      return idx;
>  }
>  
> +static int __init process_domain_node(
> +    struct boot_info *bi, const void *fdt, int dom_node)
> +{
> +    int node;
> +    struct boot_domain *bd = &bi->domains[bi->nr_domains];
> +    const char *name = fdt_get_name(fdt, dom_node, NULL) ?: "unknown";
> +    int address_cells = fdt_address_cells(fdt, dom_node);
> +    int size_cells = fdt_size_cells(fdt, dom_node);

Oh, okay - regarding my earlier comment elsewhere: If the sizes come from DT,
then of course ASSERT_UNREACHABLE() can't be used at the place where bogus
ones are rejected.

> +    fdt_for_each_subnode(node, fdt, dom_node)
> +    {
> +        if ( fdt_node_check_compatible(fdt, node, "multiboot,kernel") == 0 )
> +        {

When the loop body is merely an if() with a non-negligible body, inverting
the condition and using "continue" is usually better. Much like you do ...

> +            int idx;
> +
> +            if ( bd->kernel )
> +            {
> +                printk(XENLOG_ERR "Duplicate kernel module for domain %s\n",
> +                       name);
> +                continue;

... here already.

Jan


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Message-ID: 
Date: Thu, 10 Apr 2025 13:12:38 +0200
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v3 10/16] x86/hyperlaunch: obtain cmdline from device tree
To: Alejandro Vallejo 
Cc: "Daniel P. Smith" ,
 Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini ,
 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Julien Grall , Bertrand Marquis ,
 xen-devel@lists.xenproject.org
References: <20250408160802.49870-1-agarciav@amd.com>
 <20250408160802.49870-11-agarciav@amd.com>
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From: Jan Beulich 
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In-Reply-To: <20250408160802.49870-11-agarciav@amd.com>
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On 08.04.2025 18:07, Alejandro Vallejo wrote:
> --- a/xen/arch/x86/domain-builder/core.c
> +++ b/xen/arch/x86/domain-builder/core.c
> @@ -8,9 +8,37 @@
>  #include 
>  
>  #include 
> +#include 
>  
>  #include "fdt.h"
>  
> +size_t __init builder_get_cmdline_size(struct boot_info *bi, int offset)
> +{
> +#ifdef CONFIG_DOMAIN_BUILDER
> +    const void *fdt = bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_IDX]);
> +    int size = fdt_cmdline_prop_size(fdt, offset);
> +
> +    bootstrap_unmap();
> +    return size < 0 ? 0 : size;

Use max() instead of open-coding it?

> --- a/xen/arch/x86/domain-builder/fdt.c
> +++ b/xen/arch/x86/domain-builder/fdt.c
> @@ -189,6 +189,12 @@ static int __init process_domain_node(
>              printk("  kernel: boot module %d\n", idx);
>              bi->mods[idx].type = BOOTMOD_KERNEL;
>              bd->kernel = &bi->mods[idx];
> +
> +            /* If bootloader didn't set cmdline, see if FDT provides one. */
> +            if ( bd->kernel->cmdline_pa &&
> +                 !((char *)__va(bd->kernel->cmdline_pa))[0] )
> +                bd->kernel->fdt_cmdline = fdt_get_prop_offset(
> +                    fdt, node, "bootargs", &bd->kernel->cmdline_pa);

Somewhat orthogonal question: Should there perhaps be a way for the boot loader
provided cmdline to go at the tail of the DT provided one?

> --- a/xen/arch/x86/domain-builder/fdt.h
> +++ b/xen/arch/x86/domain-builder/fdt.h
> @@ -12,6 +12,31 @@ struct boot_info;
>  #define HYPERLAUNCH_MODULE_IDX 0
>  
>  #ifdef CONFIG_DOMAIN_BUILDER
> +
> +static inline int __init fdt_cmdline_prop_size(const void *fdt, int offset)
> +{
> +    int ret;
> +
> +    fdt_get_property_by_offset(fdt, offset, &ret);
> +
> +    return ret;
> +}
> +
> +static inline int __init fdt_cmdline_prop_copy(
> +    const void *fdt, int offset, char *cmdline, size_t size)
> +{
> +    int ret;
> +    const struct fdt_property *prop =
> +        fdt_get_property_by_offset(fdt, offset, &ret);
> +
> +    if ( ret < 0 )
> +        return ret;
> +
> +    ASSERT(size > ret);
> +
> +    return strlcpy(cmdline, prop->data, ret);
> +}

What's the rationale for these to be separate functions, rather then the code
being integrated into their sole callers? Especially for the former the extra
layer feels excessive.

> --- a/xen/arch/x86/include/asm/domain-builder.h
> +++ b/xen/arch/x86/include/asm/domain-builder.h
> @@ -3,6 +3,10 @@
>  
>  struct boot_info;
>  
> +size_t __init builder_get_cmdline_size(struct boot_info *bi, int offset);
> +int __init builder_get_cmdline(
> +    struct boot_info *bi, int offset, char *cmdline, size_t size);

No __init on declarations please.

> --- a/xen/arch/x86/setup.c
> +++ b/xen/arch/x86/setup.c
> @@ -984,7 +984,10 @@ static size_t __init domain_cmdline_size(
>  {
>      size_t s = bi->kextra ? strlen(bi->kextra) : 0;
>  
> -    s += bd->kernel->cmdline_pa ? strlen(__va(bd->kernel->cmdline_pa)) : 0;
> +    if ( bd->kernel->fdt_cmdline )
> +        s += builder_get_cmdline_size(bi, bd->kernel->cmdline_pa);
> +    else
> +        s += strlen(__va(bd->kernel->cmdline_pa));

Why's the check lost for bd->kernel->cmdline_pa being non-zero?

> @@ -1047,9 +1050,12 @@ static struct domain *__init create_dom0(struct boot_info *bi)
>          if ( !(cmdline = xzalloc_array(char, cmdline_size)) )
>              panic("Error allocating cmdline buffer for %pd\n", d);
>  
> -        if ( bd->kernel->cmdline_pa )
> +        if ( bd->kernel->fdt_cmdline )
> +            builder_get_cmdline(
> +                bi, bd->kernel->cmdline_pa, cmdline, cmdline_size);
> +        else

Same here.

>              strlcpy(cmdline,
> -                    cmdline_cook(__va(bd->kernel->cmdline_pa), bi->loader),
> +                    cmdline_cook(__va(bd->kernel->cmdline_pa),bi->loader),

The change to this line is bogus altogether.

> --- a/xen/include/xen/libfdt/libfdt-xen.h
> +++ b/xen/include/xen/libfdt/libfdt-xen.h
> @@ -23,6 +23,29 @@ static inline uint64_t  __init fdt_cell_as_u64(const fdt32_t *cell)
>      return ((uint64_t)fdt32_to_cpu(cell[0]) << 32) | fdt32_to_cpu(cell[1]);
>  }
>  
> +static inline bool __init fdt_get_prop_offset(
> +    const void *fdt, int node, const char *name, unsigned long *offset)
> +{
> +    int ret, poffset;
> +    const char *pname;
> +
> +    fdt_for_each_property_offset(poffset, fdt, node)
> +    {
> +        fdt_getprop_by_offset(fdt, poffset, &pname, &ret);
> +
> +        if ( ret < 0 )
> +            continue;
> +
> +        if ( strcmp(pname, name) == 0 )
> +        {
> +            *offset = poffset;

Variable naming looks backwards here.

Jan


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Subject: Re: [PATCH v3 11/16] x86/hyperlaunch: locate dom0 initrd with
 hyperlaunch
To: Alejandro Vallejo 
Cc: "Daniel P. Smith" ,
 Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini ,
 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 08.04.2025 18:07, Alejandro Vallejo wrote:
> --- a/xen/arch/x86/domain-builder/fdt.c
> +++ b/xen/arch/x86/domain-builder/fdt.c
> @@ -195,6 +195,35 @@ static int __init process_domain_node(
>                   !((char *)__va(bd->kernel->cmdline_pa))[0] )
>                  bd->kernel->fdt_cmdline = fdt_get_prop_offset(
>                      fdt, node, "bootargs", &bd->kernel->cmdline_pa);
> +
> +            continue;

With this ...

> +        }
> +        else if ( fdt_node_check_compatible(fdt, node,

... no need for "else" here?

> +                                            "multiboot,ramdisk") == 0 )
> +        {
> +            int idx;
> +
> +            if ( bd->module )
> +            {
> +                printk(XENLOG_ERR "Duplicate ramdisk module for domain %s)\n",

Stray ')' in the string literal.

> +                       name);
> +                continue;
> +            }
> +
> +            idx = fdt_read_multiboot_module(fdt, node, address_cells,
> +                                            size_cells,bi);
> +            if ( idx < 0 )
> +            {
> +                printk("  failed processing ramdisk module for domain %s\n",
> +                       name);
> +                return -EINVAL;
> +            }

Along the lines of what Denis has said - please be consistent about log
messages: XENLOG_* or not, preferably no capital at the start, initial
blank padding. May apply elsewhere in the series as well.

> +            printk("  ramdisk: boot module %d\n", idx);
> +            bi->mods[idx].type = BOOTMOD_RAMDISK;
> +            bd->module = &bi->mods[idx];

The field's named "module" now, but that now ends up inconsistent with
naming used elsewhere, as is pretty noticeable here.

> +            continue;

This isn't strictly needed, is it, ...

>          }
>      }

... considering we're at the bottom of the loop?

Jan


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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Michal Orzel ,
	Anthony PERARD 
Subject: [PATCH 4/6] Factor our x86-isms in the linux build script
Date: Thu, 10 Apr 2025 12:46:26 +0100
Message-Id: <20250410114628.2060072-5-andrew.cooper3@citrix.com>
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... in preparation to use it for arm64 too.  Rename the script.

Signed-off-by: Andrew Cooper 
Reviewed-by: Marek Marczykowski-Górecki 
---
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Marek Marczykowski-Górecki 
CC: Anthony PERARD 
---
 .gitlab-ci.yml                                |  3 +-
 ...{x86_64-kernel-linux.sh => build-linux.sh} | 34 +++++++++++++------
 2 files changed, 24 insertions(+), 13 deletions(-)
 rename scripts/{x86_64-kernel-linux.sh => build-linux.sh} (55%)

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 734f3982c46f..a8e56b165ed6 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -28,8 +28,7 @@ stages:
 #
 x86_64-kernel-linux-6.6.56:
   extends: .x86_64-artifacts
-  script:
-    - . scripts/x86_64-kernel-linux.sh
+  script: ./scripts/build-linux.sh
   variables:
     LINUX_VERSION: 6.6.56
 
diff --git a/scripts/x86_64-kernel-linux.sh b/scripts/build-linux.sh
similarity index 55%
rename from scripts/x86_64-kernel-linux.sh
rename to scripts/build-linux.sh
index 5ed5608628bc..c78cd6ca46da 100755
--- a/scripts/x86_64-kernel-linux.sh
+++ b/scripts/build-linux.sh
@@ -9,6 +9,7 @@ set -ex -o pipefail
 
 WORKDIR="${PWD}"
 COPYDIR="${WORKDIR}/binaries/"
+UNAME=$(uname -m)
 
 # Build Linux
 MAJOR=${LINUX_VERSION%%.*}
@@ -16,17 +17,28 @@ curl -fsSLO \
     https://cdn.kernel.org/pub/linux/kernel/v"${MAJOR}".x/linux-"${LINUX_VERSION}".tar.xz
 tar xf linux-"${LINUX_VERSION}".tar.xz
 cd linux-"${LINUX_VERSION}"
-make ARCH=x86 defconfig
-make ARCH=x86 xen.config
+
+make defconfig
 ./scripts/config --enable BRIDGE
 ./scripts/config --enable IGC
 ./scripts/config --enable TUN
-cp .config .config.orig
-cat .config.orig \
-    | grep 'XEN' \
-    | grep '=m' \
-    | sed 's/=m/=y/g' \
-    >> .config
-make ARCH=x86 olddefconfig
-make -s -j "$(nproc)" ARCH=x86
-cp arch/x86/boot/bzImage "${COPYDIR}"
+
+case $UNAME in
+    x86_64)
+        make xen.config
+        cp .config .config.orig
+        cat .config.orig \
+            | grep 'XEN' \
+            | grep '=m' \
+            | sed 's/=m/=y/g' >> .config
+        ;;
+esac
+
+make olddefconfig
+
+case $UNAME in
+    x86_64)
+        make -j$(nproc) bzImage
+        cp arch/x86/boot/bzImage "${COPYDIR}"
+        ;;
+esac
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Michal Orzel ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Anthony PERARD 
Subject: [PATCH 1/6] Port containerise
Date: Thu, 10 Apr 2025 12:46:23 +0100
Message-Id: <20250410114628.2060072-2-andrew.cooper3@citrix.com>
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While it pains me to keep the wrong spelling, do so for consistency.

Signed-off-by: Andrew Cooper 
---
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Marek Marczykowski-Górecki 
CC: Anthony PERARD 

v2:
 * Switch back to alpine:x86_64-rootfs as the rename isn't in the series yet.
---
 containerize | 94 ++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 94 insertions(+)
 create mode 100755 containerize

diff --git a/containerize b/containerize
new file mode 100755
index 000000000000..fd488cc57596
--- /dev/null
+++ b/containerize
@@ -0,0 +1,94 @@
+#!/bin/bash
+
+#
+# DOCKER_CMD should be either `docker` or `podman`.
+#
+# if using (rootless) podman, remember to set /etc/subuid
+# and /etc/subgid.
+#
+docker_cmd=${DOCKER_CMD:-"docker"}
+[ "$DOCKER_CMD" = "podman" ] && userns_podman="--userns=keep-id" selinux=",z"
+
+einfo() {
+    echo "$*" >&2
+}
+
+die() {
+    echo "$*" >&2
+    exit 1
+}
+
+#
+# The caller is expected to override the CONTAINER environment
+# variable with the container they wish to launch.
+#
+BASE="registry.gitlab.com/xen-project/hardware/test-artifacts"
+case "_${CONTAINER}" in
+    _alpine-x86_64-rootfs) CONTAINER="${BASE}/alpine:x86_64-rootfs" ;;
+    _alpine-x86_64-build|_) CONTAINER="${BASE}/alpine:x86_64-build" ;;
+esac
+
+# Use this variable to control whether root should be used
+case "_${CONTAINER_UID0}" in
+    _1)   userarg="-u 0" ;;
+    _0|_) userarg="-u $(id -u) $userns_podman" ;;
+esac
+
+# Save the commands for future use
+cmd=("$@")
+
+# If no command was specified, just drop us into a shell if we're interactive
+[ $# -eq 0 ] && tty -s && cmd=("/bin/bash")
+
+# Are we in an interactive terminal?
+tty -s && termint=t
+
+#
+# Fetch the latest version of the container in hub.docker.com,
+# unless it's a newly created local copy.
+#
+if [[ "_${CONTAINER_NO_PULL}" != "_1" ]]; then
+    einfo "*** Ensuring ${CONTAINER} is up to date"
+    ${docker_cmd} pull ${CONTAINER} > /dev/null ||     \
+        die "Failed to update container"
+fi
+
+if hash greadlink > /dev/null 2>&1; then
+    READLINK=greadlink
+elif [[ $(uname -s) == "Darwin" ]]; then
+    echo "Unable to forward SSH agent without coreutils installed"
+    unset SSH_AUTH_SOCK
+else
+    READLINK=readlink
+fi
+
+# Ensure we've got what we need for SSH_AUTH_SOCK
+if [[ -n ${SSH_AUTH_SOCK} ]]; then
+    fullpath_sock=$(${READLINK} -f ${SSH_AUTH_SOCK} 2> /dev/null)
+    if [ $? -ne 0 ]; then
+        echo "Invalid SSH_AUTH_SOCK: ${SSH_AUTH_SOCK}"
+        unset SSH_AUTH_SOCK
+    else
+        SSH_AUTH_DIR=$(dirname ${fullpath_sock})
+        SSH_AUTH_NAME=$(basename ${fullpath_sock})
+    fi
+fi
+
+# Figure out the base of what we want as our sources
+# by using the top of the git repo
+if [[ -z ${CONTAINER_PATH} ]]; then
+    CONTAINER_PATH=$(git rev-parse --show-toplevel)
+fi
+
+# Kick off Docker
+einfo "*** Launching container ..."
+exec ${docker_cmd} run \
+    ${userarg} \
+    ${SSH_AUTH_SOCK:+-e SSH_AUTH_SOCK="/tmp/ssh-agent/${SSH_AUTH_NAME}"} \
+    -v "${CONTAINER_PATH}":/build:rw${selinux} \
+    -v "${HOME}/.ssh":/root/.ssh:ro \
+    ${SSH_AUTH_DIR:+-v "${SSH_AUTH_DIR}":/tmp/ssh-agent${selinux}} \
+    ${CONTAINER_ARGS} \
+    -${termint}i --rm -- \
+    ${CONTAINER} \
+    "${cmd[@]}"
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Michal Orzel ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Anthony PERARD 
Subject: [PATCH 5/6] Infrastructure for arm64 linux builds
Date: Thu, 10 Apr 2025 12:46:27 +0100
Message-Id: <20250410114628.2060072-6-andrew.cooper3@citrix.com>
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Signed-off-by: Andrew Cooper 
---
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Marek Marczykowski-Górecki 
CC: Anthony PERARD 

v2:
 * Drop musl-dev.  It's brought in by build-base.
 * Include findutils to fix build warnings.
---
 .gitlab-ci.yml                            |  7 ++++++
 containerize                              |  1 +
 images/alpine/3.18-arm64-build.dockerfile | 27 +++++++++++++++++++++++
 scripts/build-linux.sh                    | 10 +++++++++
 4 files changed, 45 insertions(+)
 create mode 100644 images/alpine/3.18-arm64-build.dockerfile

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index a8e56b165ed6..6faa85d8dd7c 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -16,6 +16,13 @@ stages:
     exclude:
       - binaries/.gitignore
 
+.arm64-artifacts:
+  extends: .artifacts
+  tags:
+    - arm64
+  variables:
+    CONTAINER: alpine:3.18-arm64-build
+
 .x86_64-artifacts:
   extends: .artifacts
   tags:
diff --git a/containerize b/containerize
index fd488cc57596..7abeb119ff6a 100755
--- a/containerize
+++ b/containerize
@@ -24,6 +24,7 @@ die() {
 #
 BASE="registry.gitlab.com/xen-project/hardware/test-artifacts"
 case "_${CONTAINER}" in
+    _alpine-3.18-arm64-build) CONTAINER="${BASE}/alpine:3.18-arm64-build" ;;
     _alpine-x86_64-rootfs) CONTAINER="${BASE}/alpine:x86_64-rootfs" ;;
     _alpine-x86_64-build|_) CONTAINER="${BASE}/alpine:x86_64-build" ;;
 esac
diff --git a/images/alpine/3.18-arm64-build.dockerfile b/images/alpine/3.18-arm64-build.dockerfile
new file mode 100644
index 000000000000..b6d9bd1af531
--- /dev/null
+++ b/images/alpine/3.18-arm64-build.dockerfile
@@ -0,0 +1,27 @@
+# syntax=docker/dockerfile:1
+FROM --platform=linux/arm64/v8 alpine:3.18
+LABEL maintainer.name="The Xen Project" \
+      maintainer.email="xen-devel@lists.xenproject.org"
+
+RUN apk --no-cache add bash
+
+RUN bash -ex <> .config
         ;;
+
+    aarch64)
+        ./scripts/config --enable XEN_NETDEV_BACKEND
+        ;;
 esac
 
 make olddefconfig
@@ -41,4 +46,9 @@ case $UNAME in
         make -j$(nproc) bzImage
         cp arch/x86/boot/bzImage "${COPYDIR}"
         ;;
+
+    aarch64)
+        make -j$(nproc) Image
+        cp arch/arm64/boot/Image "${COPYDIR}"
+        ;;
 esac
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Michal Orzel ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Anthony PERARD 
Subject: [PATCH 2/6] Clean up Gitlab yaml
Date: Thu, 10 Apr 2025 12:46:24 +0100
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Factor out the registry into a common location.  Drop the worflow name, as all
it does is hide the commit message of the change that triggered the pipeline.
List all the stages.  Set a default expiry of 1 month.

Note all the current jobs as legacy.  Their naming scheme needs changing, and
we'll use this opportunity to switch formats too.  However, the artefacts need
to stay using the old name until the final staging-* branch using them is
phased out.

Signed-off-by: Andrew Cooper 
---
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Marek Marczykowski-Górecki 
CC: Anthony PERARD 

v2:
 * Drop the workflow name.
---
 .gitlab-ci.yml | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 36ec6a7e1ee5..734f3982c46f 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -1,12 +1,16 @@
-workflow:
-  name: "xen test artifacts"
+variables:
+  REGISTRY: registry.gitlab.com/xen-project/hardware/test-artifacts
+
+stages:
+  - build
 
 .artifacts:
   stage: build
   image:
-    name: registry.gitlab.com/xen-project/hardware/test-artifacts/${CONTAINER}
+    name: ${REGISTRY}/${CONTAINER}
   artifacts:
     name: "${CI_JOB_NAME_SLUG}"
+    expire_in: 1 month
     paths:
       - binaries/
     exclude:
@@ -19,6 +23,9 @@ workflow:
   variables:
     CONTAINER: alpine:x86_64-build
 
+#
+# The jobs below here are legacy and being phased out.
+#
 x86_64-kernel-linux-6.6.56:
   extends: .x86_64-artifacts
   script:
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Michal Orzel ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Anthony PERARD 
Subject: [PATCH 3/6] Adjust Linux build script to work with other major versions
Date: Thu, 10 Apr 2025 12:46:25 +0100
Message-Id: <20250410114628.2060072-4-andrew.cooper3@citrix.com>
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Simply the tar expression, as 'tar xf' can figure out the compression
automatically.

Signed-off-by: Andrew Cooper 
---
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Marek Marczykowski-Górecki 
CC: Anthony PERARD 

v2:
 * Use 'tar xf'
---
 scripts/x86_64-kernel-linux.sh | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/scripts/x86_64-kernel-linux.sh b/scripts/x86_64-kernel-linux.sh
index 2a816f0b3204..5ed5608628bc 100755
--- a/scripts/x86_64-kernel-linux.sh
+++ b/scripts/x86_64-kernel-linux.sh
@@ -11,9 +11,10 @@ WORKDIR="${PWD}"
 COPYDIR="${WORKDIR}/binaries/"
 
 # Build Linux
+MAJOR=${LINUX_VERSION%%.*}
 curl -fsSLO \
-    https://cdn.kernel.org/pub/linux/kernel/v6.x/linux-"${LINUX_VERSION}".tar.xz
-tar xJf linux-"${LINUX_VERSION}".tar.xz
+    https://cdn.kernel.org/pub/linux/kernel/v"${MAJOR}".x/linux-"${LINUX_VERSION}".tar.xz
+tar xf linux-"${LINUX_VERSION}".tar.xz
 cd linux-"${LINUX_VERSION}"
 make ARCH=x86 defconfig
 make ARCH=x86 xen.config
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Michal Orzel ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Anthony PERARD 
Subject: [PATCH TEST-ARTEFACTS v2 0/6] Cleanup and Linux ARM64 support
Date: Thu, 10 Apr 2025 12:46:22 +0100
Message-Id: <20250410114628.2060072-1-andrew.cooper3@citrix.com>
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Two patches merged.  Only minor tweaks to the rest.

https://gitlab.com/xen-project/hardware/test-artifacts/-/pipelines/1762204421
is a pipline showing clean kernel builds.

https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1762221755 is
a Xen pipline using the artefacts from ^.

Andrew Cooper (6):
  Port containerise
  Clean up Gitlab yaml
  Adjust Linux build script to work with other major versions
  Factor our x86-isms in the linux build script
  Infrastructure for arm64 linux builds
  Linux builds for x86 and ARM64

 .gitlab-ci.yml                            | 41 ++++++++--
 containerize                              | 95 +++++++++++++++++++++++
 images/alpine/3.18-arm64-build.dockerfile | 27 +++++++
 scripts/build-linux.sh                    | 54 +++++++++++++
 scripts/x86_64-kernel-linux.sh            | 31 --------
 5 files changed, 212 insertions(+), 36 deletions(-)
 create mode 100755 containerize
 create mode 100644 images/alpine/3.18-arm64-build.dockerfile
 create mode 100755 scripts/build-linux.sh
 delete mode 100755 scripts/x86_64-kernel-linux.sh

-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Michal Orzel ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Anthony PERARD 
Subject: [PATCH 6/6] Linux builds for x86 and ARM64
Date: Thu, 10 Apr 2025 12:46:28 +0100
Message-Id: <20250410114628.2060072-7-andrew.cooper3@citrix.com>
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For ARM64, the tests in Xen currently use 6.6.74, but 6.6.86 works so update
to the latest.

For x86, stay at 6.6.56.  There's a PVH regression upstream in need of fixing.

Signed-off-by: Andrew Cooper 
---
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Marek Marczykowski-Górecki 
CC: Anthony PERARD 

v2:
 * Move x86 back to 6.6.56 until the PVH regression is fixed.
---
 .gitlab-ci.yml | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 6faa85d8dd7c..670f9621e26d 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -30,6 +30,24 @@ stages:
   variables:
     CONTAINER: alpine:x86_64-build
 
+#
+# ARM64 artifacts
+#
+linux-6.6.86-arm64:
+  extends: .arm64-artifacts
+  script: ./scripts/build-linux.sh
+  variables:
+    LINUX_VERSION: 6.6.86
+
+#
+# x86_64 artifacts
+#
+linux-6.6.56-x86_64:
+  extends: .x86_64-artifacts
+  script: ./scripts/build-linux.sh
+  variables:
+    LINUX_VERSION: 6.6.56
+
 #
 # The jobs below here are legacy and being phased out.
 #
-- 
2.39.5



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Subject: Re: [PATCH v3 12/16] x86/hyperlaunch: add domain id parsing to domain
 config
To: Alejandro Vallejo 
Cc: "Daniel P. Smith" ,
 Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini ,
 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Julien Grall , Bertrand Marquis ,
 xen-devel@lists.xenproject.org
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On 08.04.2025 18:07, Alejandro Vallejo wrote:
> From: "Daniel P. Smith" 
> 
> Introduce the ability to specify the desired domain id for the domain
> definition. The domain id will be populated in the domid property of the
> domain
> node in the device tree configuration.

Nit: Odd splitting of lines.

> --- a/xen/arch/x86/domain-builder/fdt.c
> +++ b/xen/arch/x86/domain-builder/fdt.c
> @@ -8,6 +8,7 @@
>  #include 
>  
>  #include 
> +#include 

What is this needed for?

> @@ -158,12 +159,42 @@ int __init fdt_read_multiboot_module(const void *fdt, int node,
>  static int __init process_domain_node(
>      struct boot_info *bi, const void *fdt, int dom_node)
>  {
> -    int node;
> +    int node, property;
>      struct boot_domain *bd = &bi->domains[bi->nr_domains];
>      const char *name = fdt_get_name(fdt, dom_node, NULL) ?: "unknown";
>      int address_cells = fdt_address_cells(fdt, dom_node);
>      int size_cells = fdt_size_cells(fdt, dom_node);
>  
> +    fdt_for_each_property_offset(property, fdt, dom_node)
> +    {
> +        const struct fdt_property *prop;
> +        const char *prop_name;
> +        int name_len;
> +
> +        prop = fdt_get_property_by_offset(fdt, property, NULL);
> +        if ( !prop )
> +            continue; /* silently skip */
> +
> +        prop_name = fdt_get_string(fdt, fdt32_to_cpu(prop->nameoff), &name_len);
> +
> +        if ( strncmp(prop_name, "domid", name_len) == 0 )
> +        {
> +            uint32_t val = DOMID_INVALID;
> +            if ( fdt_prop_as_u32(prop, &val) != 0 )

Nit: Blank line please between declaration(s) and statement(s).

> +            {
> +                printk("  failed processing domain id for domain %s\n", name);
> +                return -EINVAL;
> +            }
> +            if ( val >= DOMID_FIRST_RESERVED )
> +            {
> +                printk("  invalid domain id for domain %s\n", name);
> +                return -EINVAL;
> +            }
> +            bd->domid = (domid_t)val;

And a conflict with other domains' IDs will not be complained about?

> +            printk("  domid: %d\n", bd->domid);

If the error messages log "name" for (I suppose) disambiguation, why would
the success message here not also do so?

> @@ -233,6 +264,12 @@ static int __init process_domain_node(
>          return -ENODATA;
>      }
>  
> +    if ( bd->domid == DOMID_INVALID )
> +        bd->domid = get_initial_domain_id();
> +    else if ( bd->domid != get_initial_domain_id() )
> +        printk(XENLOG_WARNING
> +               "WARN: Booting without initial domid not supported.\n");

I'm not a native speaker, but (or perhaps because of that) "without" feels
wrong here.

Also nit: No full stops please at the end of log messages, at least in the
common case.

Is the resolving of DOMID_INVALID invalid really needed both here and ...

> --- a/xen/arch/x86/setup.c
> +++ b/xen/arch/x86/setup.c
> @@ -1033,8 +1033,9 @@ static struct domain *__init create_dom0(struct boot_info *bi)
>      if ( iommu_enabled )
>          dom0_cfg.flags |= XEN_DOMCTL_CDF_iommu;
>  
> -    /* Create initial domain.  Not d0 for pvshim. */
> -    bd->domid = get_initial_domain_id();
> +    if ( bd->domid == DOMID_INVALID )
> +        /* Create initial domain.  Not d0 for pvshim. */
> +        bd->domid = get_initial_domain_id();

... here?

> @@ -23,6 +24,16 @@ static inline uint64_t  __init fdt_cell_as_u64(const fdt32_t *cell)
>      return ((uint64_t)fdt32_to_cpu(cell[0]) << 32) | fdt32_to_cpu(cell[1]);
>  }
>  
> +static inline int __init fdt_prop_as_u32(
> +    const struct fdt_property *prop, uint32_t *val)
> +{
> +    if ( !prop || fdt32_to_cpu(prop->len) < sizeof(u32) )
> +        return -EINVAL;
> +
> +    *val = fdt_cell_as_u32((fdt32_t *)prop->data);
> +    return 0;
> +}

Path 08 looks to (partly) open-code this. Perhaps better to introduce already
there?

Jan


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To: Denis Mukhin , Alejandro Vallejo 
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 "Daniel P. Smith" ,
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 Xenia Ragiadakou ,
 Stefano Stabellini ,
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On 10.04.2025 00:24, Denis Mukhin wrote:
> On Tuesday, April 8th, 2025 at 9:07 AM, Alejandro Vallejo  wrote:
>> --- a/xen/arch/x86/domain-builder/fdt.c
>> +++ b/xen/arch/x86/domain-builder/fdt.c
>> @@ -193,6 +193,25 @@ static int __init process_domain_node(
>> bd->domid = (domid_t)val;
>>
>> printk(" domid: %d\n", bd->domid);
>>
>> }
>> + else if ( strncmp(prop_name, "mode", name_len) == 0 )
>> + {
>> + if ( fdt_prop_as_u32(prop, &bd->mode) != 0 )
>>
>> + {
>> + printk(" failed processing mode for domain %s\n", name);
>> + return -EINVAL;
>> + }
>> +
>> + printk(" mode: ");
>> + if ( !(bd->mode & BUILD_MODE_PARAVIRT) )
>>
>> + {
>> + if ( bd->mode & BUILD_MODE_ENABLE_DM )
>>
>> + printk("HVM\n");
>> + else
>> + printk("PVH\n");
>> + }
>> + else
>> + printk("PV\n");
>> + }
>> }
> 
> I would re-write so the positive condition is processed first, e.g.:
> 
>     if ( bd->mode & BUILD_MODE_PARAVIRT )
>         printk("PV\n");
>     else if ( bd->mode & BUILD_MODE_ENABLE_DM )
>         printk("HVM\n");
>     else
>         printk("PVH\n");
> 
> I think it will reduce indentation and make code block a bit easier to read.

I agree, except it's not so much the "positive condition" but "can be written
as if/else-if sequence".

Jan


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Subject: Re: [PATCH v3 13/16] x86/hyperlaunch: specify dom0 mode with device
 tree
To: Alejandro Vallejo 
Cc: "Daniel P. Smith" ,
 Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini ,
 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 xen-devel@lists.xenproject.org
References: <20250408160802.49870-1-agarciav@amd.com>
 <20250408160802.49870-14-agarciav@amd.com>
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From: Jan Beulich 
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On 08.04.2025 18:07, Alejandro Vallejo wrote:
> --- a/xen/arch/x86/domain-builder/fdt.c
> +++ b/xen/arch/x86/domain-builder/fdt.c
> @@ -193,6 +193,25 @@ static int __init process_domain_node(
>              bd->domid = (domid_t)val;
>              printk("  domid: %d\n", bd->domid);
>          }
> +        else if ( strncmp(prop_name, "mode", name_len) == 0 )
> +        {
> +            if ( fdt_prop_as_u32(prop, &bd->mode) != 0 )
> +            {
> +                printk("  failed processing mode for domain %s\n", name);
> +                return -EINVAL;
> +            }
> +
> +            printk("  mode: ");
> +            if ( !(bd->mode & BUILD_MODE_PARAVIRT) )
> +            {
> +                if ( bd->mode & BUILD_MODE_ENABLE_DM )
> +                    printk("HVM\n");
> +                else
> +                    printk("PVH\n");
> +            }
> +            else
> +                printk("PV\n");
> +        }

My prior questions here remain: What's the significance of
BUILD_MODE_ENABLE_DM when set alongside BUILD_MODE_PARAVIRT? What about
any of the other bits being set?

Jan


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Date: Thu, 10 Apr 2025 13:02:48 +0100
Message-ID: 
CC: , "Daniel P. Smith"
	, Jason Andryuk , "Xenia
 Ragiadakou" , Stefano Stabellini
	, Michal Orzel , Jan Beulich
	, Andrew Cooper ,
	=?utf-8?q?Roger_Pau_Monn=C3=A9?= 
Subject: Re: [PATCH v3 03/16] x86/boot: add cmdline to struct boot_domain
From: Alejandro Vallejo 
To: Denis Mukhin 
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References: <20250408160802.49870-1-agarciav@amd.com>
 <20250408160802.49870-4-agarciav@amd.com>
 
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On Wed Apr 9, 2025 at 10:05 PM BST, Denis Mukhin wrote:
> On Tuesday, April 8th, 2025 at 9:07 AM, Alejandro Vallejo  wrote:
>
>>=20
>>=20
>> From: "Daniel P. Smith" dpsmith@apertussolutions.com
>>=20
>>=20
>> Add a container for the "cooked" command line for a domain. This
>> provides for the backing memory to be directly associated with the
>> domain being constructed. This is done in anticipation that the domain
>> construction path may need to be invoked multiple times, thus ensuring
>> each instance had a distinct memory allocation.
>>=20
>> Signed-off-by: Daniel P. Smith dpsmith@apertussolutions.com
>>=20
>> Signed-off-by: Jason Andryuk jason.andryuk@amd.com
>>=20
>> Signed-off-by: Alejandro Vallejo agarciav@amd.com
>>=20
>> ---
>> No changes on ACPI cmdline handling on PVH, as it's orthogonal to the
>> purpose of this patch.
>>=20
>> v3:
>> * s/xfree/XFREE/ on failed construct_dom0() to avoid a dangling
>> cmdline ptr.
>> * Re-flow hvm_copy_to_guest_phys() into a multi-line call.
>> * s/bd->cmdline !=3D NULL/b->cmdline/ (to homogenise with the previous
>>=20
>> cmdline pointer check)
>> ---
>> xen/arch/x86/hvm/dom0_build.c | 12 +++----
>> xen/arch/x86/include/asm/boot-domain.h | 1 +
>> xen/arch/x86/pv/dom0_build.c | 4 +--
>> xen/arch/x86/setup.c | 50 +++++++++++++++++++-------
>> 4 files changed, 47 insertions(+), 20 deletions(-)
>>=20
>> diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build=
.c
>> index 2a094b3145..ebad5a49b8 100644
>> --- a/xen/arch/x86/hvm/dom0_build.c
>> +++ b/xen/arch/x86/hvm/dom0_build.c
>> @@ -653,7 +653,6 @@ static int __init pvh_load_kernel(
>> void *image_start =3D image_base + image->headroom;
>>=20
>> unsigned long image_len =3D image->size;
>>=20
>> unsigned long initrd_len =3D initrd ? initrd->size : 0;
>>=20
>> - const char *cmdline =3D image->cmdline_pa ? __va(image->cmdline_pa) : =
NULL;
>>=20
>> const char *initrd_cmdline =3D NULL;
>> struct elf_binary elf;
>> struct elf_dom_parms parms;
>> @@ -736,8 +735,8 @@ static int __init pvh_load_kernel(
>> initrd =3D NULL;
>> }
>>=20
>> - if ( cmdline )
>> - extra_space +=3D elf_round_up(&elf, strlen(cmdline) + 1);
>> + if ( bd->cmdline )
>>=20
>> + extra_space +=3D elf_round_up(&elf, strlen(bd->cmdline) + 1);
>
> I think it makes sense to use local variable to cache the results of=20
>
>   strlen(bd->cmdline) + 1
>
> since the construct is used multiple times within pvh_load_kernel()
>
> E.g. cmdline_len similarly to {image,initrd}_len.
>

Seeing how you're the second person to propose the same thing, I'll bite
and just do it. I really dislike the wall of locals in
pvh_load_kernel(), but oh well...

Cheers,
Alejandro


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Date: Thu, 10 Apr 2025 14:03:53 +0200
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Subject: Re: [PATCH v3 14/16] x86/hyperlaunch: add memory parsing to domain
 config
To: Alejandro Vallejo 
Cc: "Daniel P. Smith" ,
 Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini ,
 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Julien Grall , Bertrand Marquis ,
 xen-devel@lists.xenproject.org
References: <20250408160802.49870-1-agarciav@amd.com>
 <20250408160802.49870-15-agarciav@amd.com>
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From: Jan Beulich 
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In-Reply-To: <20250408160802.49870-15-agarciav@amd.com>
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On 08.04.2025 18:07, Alejandro Vallejo wrote:
> @@ -212,6 +213,39 @@ static int __init process_domain_node(
>              else
>                  printk("PV\n");
>          }
> +        else if ( strncmp(prop_name, "memory", name_len) == 0 )
> +        {
> +            uint64_t kb;
> +            if ( fdt_prop_as_u64(prop, &kb) != 0 )

Nit (you know what I have to say here, and again below.)

> +            {
> +                printk("  failed processing memory for domain %s\n", name);
> +                return -EINVAL;

Any reason to override fdt_prop_as_u64()'s return value here?

> +            }
> +            bd->mem_pages = PFN_DOWN(kb * SZ_1K);
> +            printk("  memory: %ld kb\n", kb);
> +        }
> +        else if ( strncmp(prop_name, "mem-min", name_len) == 0 )
> +        {
> +            uint64_t kb;
> +            if ( fdt_prop_as_u64(prop, &kb) != 0 )
> +            {
> +                printk("  failed processing memory for domain %s\n", name);
> +                return -EINVAL;
> +            }
> +            bd->min_pages = PFN_DOWN(kb * SZ_1K);
> +            printk("  min memory: %ld kb\n", kb);
> +        }
> +        else if ( strncmp(prop_name, "mem-max", name_len) == 0 )
> +        {
> +            uint64_t kb;
> +            if ( fdt_prop_as_u64(prop, &kb) != 0 )
> +            {
> +                printk("  failed processing memory for domain %s\n", name);

All three error messages being identical doesn't help diagnosing issues.

> --- a/xen/include/xen/libfdt/libfdt-xen.h
> +++ b/xen/include/xen/libfdt/libfdt-xen.h
> @@ -34,6 +34,16 @@ static inline int __init fdt_prop_as_u32(
>      return 0;
>  }
>  
> +static inline int __init fdt_prop_as_u64(
> +    const struct fdt_property *prop, uint64_t *val)
> +{
> +    if ( !prop || fdt32_to_cpu(prop->len) < sizeof(u64) )
> +        return -EINVAL;
> +
> +    *val = fdt_cell_as_u64((fdt32_t *)prop->data);

Please avoid casting away const. Looks like I overlooked this in
fdt_prop_as_u32() that was introduced by an earlier patch.

Jan


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Date: Thu, 10 Apr 2025 13:04:46 +0100
Message-ID: 
CC: "Daniel P. Smith" , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" , Michal Orzel
	, Andrew Cooper , Anthony
 PERARD , Julien Grall ,
	=?utf-8?q?Roger_Pau_Monn=C3=A9?= ,
	
Subject: Re: [PATCH v3 04/16] kconfig: introduce option to independently
 enable libfdt
From: Alejandro Vallejo 
To: Jan Beulich 
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On Thu Apr 10, 2025 at 10:04 AM BST, Jan Beulich wrote:
> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>> From: "Daniel P. Smith" 
>>=20
>> Currently, the inclusion of libfdt is controlled by the CONFIG_HAS_DEVIC=
E_TREE
>> kconfig flag. This flag also changes behavior in a few places, such as b=
oot
>> module processing for XSM. To support the ability to include libfdt with=
out
>> changing these behaviors, introduce CONFIG_LIBFDT. The inclusion of
>> libfdt is then moved under CONFIG_LIBFDT.
>>=20
>> Signed-off-by: Daniel P. Smith 
>> Signed-off-by: Jason Andryuk 
>
> Acked-by: Jan Beulich 

Thanks

>
> Looks independent of earlier patches, and hence may be possible to go in =
right
> away?
>
> Jan

Yes, it's independent of those.

Cheers,
Alejandro


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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
Subject: [PATCH 0/3] CI: Cleanup/Upgrade of Linux used for testing
Date: Thu, 10 Apr 2025 13:05:17 +0100
Message-Id: <20250410120520.2062328-1-andrew.cooper3@citrix.com>
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Switch fully on to test-artefacts for Linux.

Patch 3 is a repost.  Patch 1 supercedes a prior posting.

https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1762221755

Andrew Cooper (3):
  CI: Update x86 tests from Linux 6.1.19 to 6.6.56
  CI: Update ARM64 tests from Linux 6.6.74 to 6.6.86
  CI: Drop stale test-artifacts/alpine/3.18.dockerfile

 automation/gitlab-ci/build.yaml               | 24 -------
 automation/gitlab-ci/test.yaml                |  8 ++-
 .../tests-artifacts/alpine/3.18.dockerfile    | 67 -------------------
 .../tests-artifacts/kernel/6.1.19.dockerfile  | 41 ------------
 .../kernel/6.6.74-arm64v8.dockerfile          | 38 -----------
 5 files changed, 6 insertions(+), 172 deletions(-)
 delete mode 100644 automation/tests-artifacts/alpine/3.18.dockerfile
 delete mode 100644 automation/tests-artifacts/kernel/6.1.19.dockerfile
 delete mode 100644 automation/tests-artifacts/kernel/6.6.74-arm64v8.dockerfile

-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
Subject: [PATCH 2/3] CI: Update ARM64 tests from Linux 6.6.74 to 6.6.86
Date: Thu, 10 Apr 2025 13:05:19 +0100
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Switch over to test-artifacts.

Drop the associated export job, and dockerfile.

Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Doug Goldstein 
CC: Marek Marczykowski-Górecki 
---
 automation/gitlab-ci/build.yaml               | 11 ------
 automation/gitlab-ci/test.yaml                |  4 +-
 .../kernel/6.6.74-arm64v8.dockerfile          | 38 -------------------
 3 files changed, 3 insertions(+), 50 deletions(-)
 delete mode 100644 automation/tests-artifacts/kernel/6.6.74-arm64v8.dockerfile

diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml
index ab758243c1ec..40dcd31f1bce 100644
--- a/automation/gitlab-ci/build.yaml
+++ b/automation/gitlab-ci/build.yaml
@@ -275,17 +275,6 @@ alpine-3.18-arm64-rootfs-export:
   tags:
     - arm64
 
-kernel-6.6.74-arm64-export:
-  extends: .test-jobs-artifact-common
-  image: registry.gitlab.com/xen-project/xen/tests-artifacts/kernel:6.6.74-arm64v8
-  script:
-    - mkdir binaries && cp /Image binaries/Image
-  artifacts:
-    paths:
-      - binaries/Image
-  tags:
-    - arm64
-
 qemu-system-aarch64-6.0.0-arm64-export:
   extends: .test-jobs-artifact-common
   image: registry.gitlab.com/xen-project/xen/tests-artifacts/qemu-system-aarch64:6.0.0-arm64v8
diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml
index a23ff8a6e7fe..59a2de28c864 100644
--- a/automation/gitlab-ci/test.yaml
+++ b/automation/gitlab-ci/test.yaml
@@ -8,8 +8,10 @@
   - when: on_success
 
 .arm64-test-needs: &arm64-test-needs
+  - project: xen-project/hardware/test-artifacts
+    job: linux-6.6.86-arm64
+    ref: master
   - alpine-3.18-arm64-rootfs-export
-  - kernel-6.6.74-arm64-export
   - qemu-system-aarch64-6.0.0-arm64-export
 
 .arm32-test-needs: &arm32-test-needs
diff --git a/automation/tests-artifacts/kernel/6.6.74-arm64v8.dockerfile b/automation/tests-artifacts/kernel/6.6.74-arm64v8.dockerfile
deleted file mode 100644
index 73e51454257d..000000000000
--- a/automation/tests-artifacts/kernel/6.6.74-arm64v8.dockerfile
+++ /dev/null
@@ -1,38 +0,0 @@
-# syntax=docker/dockerfile:1
-FROM --platform=linux/arm64/v8 debian:bookworm
-LABEL maintainer.name="The Xen Project" \
-      maintainer.email="xen-devel@lists.xenproject.org"
-
-ENV DEBIAN_FRONTEND=noninteractive
-ENV LINUX_VERSION=6.6.74
-ENV USER root
-
-RUN mkdir /build
-WORKDIR /build
-
-# build depends
-RUN apt-get update && \
-    apt-get --quiet --yes install \
-        build-essential \
-        bc \
-        curl \
-        flex \
-        bison \
-        libssl-dev \
-        && \
-    \
-    # Build the kernel
-    curl -fsSLO https://cdn.kernel.org/pub/linux/kernel/v6.x/linux-"$LINUX_VERSION".tar.xz && \
-    tar xvJf linux-"$LINUX_VERSION".tar.xz && \
-    cd linux-"$LINUX_VERSION" && \
-    make defconfig && \
-    sed -i 's/CONFIG_IPV6=m/CONFIG_IPV6=y/g' .config && \
-    sed -i 's/CONFIG_BRIDGE=m/CONFIG_BRIDGE=y/g' .config && \
-    sed -i 's/# CONFIG_XEN_NETDEV_BACKEND is not set/CONFIG_XEN_NETDEV_BACKEND=y/g' .config && \
-    make -j$(nproc) Image.gz && \
-    cp arch/arm64/boot/Image / && \
-    cd /build && \
-    rm -rf linux-"$LINUX_VERSION"* && \
-    apt-get autoremove -y && \
-    apt-get clean && \
-    rm -rf /var/lib/apt/lists* /tmp/* /var/tmp/*
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
Subject: [PATCH 1/3] CI: Update x86 tests from Linux 6.1.19 to 6.6.56
Date: Thu, 10 Apr 2025 13:05:18 +0100
Message-Id: <20250410120520.2062328-2-andrew.cooper3@citrix.com>
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Linux 6.6.56 was already added to test-artifacts for the argo testing, and
this removes one moving part while cleaning things up.

Drop the associated export job, and dockerfile.

Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Doug Goldstein 
CC: Marek Marczykowski-Górecki 

Also, somewhere between 6.6.56 and 6.6.74, PVH stops working
---
 automation/gitlab-ci/build.yaml               | 13 ------
 automation/gitlab-ci/test.yaml                |  4 +-
 .../tests-artifacts/kernel/6.1.19.dockerfile  | 41 -------------------
 3 files changed, 3 insertions(+), 55 deletions(-)
 delete mode 100644 automation/tests-artifacts/kernel/6.1.19.dockerfile

diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml
index 169bebe3c775..ab758243c1ec 100644
--- a/automation/gitlab-ci/build.yaml
+++ b/automation/gitlab-ci/build.yaml
@@ -308,19 +308,6 @@ qemu-system-aarch64-6.0.0-arm32-export:
   tags:
     - arm64
 
-# x86_64 test artifacts
-
-kernel-6.1.19-export:
-  extends: .test-jobs-artifact-common
-  image: registry.gitlab.com/xen-project/xen/tests-artifacts/kernel:6.1.19
-  script:
-    - mkdir binaries && cp /bzImage binaries/bzImage
-  artifacts:
-    paths:
-      - binaries/bzImage
-  tags:
-    - x86_64
-
 # Jobs below this line
 
 # Build jobs needed for tests
diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml
index d05b9a98afa6..a23ff8a6e7fe 100644
--- a/automation/gitlab-ci/test.yaml
+++ b/automation/gitlab-ci/test.yaml
@@ -16,7 +16,9 @@
   - qemu-system-aarch64-6.0.0-arm32-export
 
 .x86-64-test-needs: &x86-64-test-needs
-  - kernel-6.1.19-export
+  - project: xen-project/hardware/test-artifacts
+    job: linux-6.6.56-x86_64
+    ref: master
   - project: xen-project/hardware/test-artifacts
     job: x86_64-rootfs-alpine-3.18
     ref: master
diff --git a/automation/tests-artifacts/kernel/6.1.19.dockerfile b/automation/tests-artifacts/kernel/6.1.19.dockerfile
deleted file mode 100644
index 073eaa0e11fa..000000000000
--- a/automation/tests-artifacts/kernel/6.1.19.dockerfile
+++ /dev/null
@@ -1,41 +0,0 @@
-# syntax=docker/dockerfile:1
-FROM --platform=linux/amd64 debian:bookworm
-LABEL maintainer.name="The Xen Project" \
-      maintainer.email="xen-devel@lists.xenproject.org"
-
-ENV DEBIAN_FRONTEND=noninteractive
-ENV LINUX_VERSION=6.1.19
-ENV USER root
-
-RUN mkdir /build
-WORKDIR /build
-
-# build depends
-RUN apt-get update && \
-    apt-get --quiet --yes install \
-        build-essential \
-        bc \
-        curl \
-        flex \
-        bison \
-        libelf-dev \
-        && \
-    apt-get autoremove -y && \
-    apt-get clean && \
-    rm -rf /var/lib/apt/lists* /tmp/* /var/tmp/*
-
-# Build the kernel
-RUN curl -fsSLO https://cdn.kernel.org/pub/linux/kernel/v6.x/linux-"$LINUX_VERSION".tar.xz && \
-    tar xvJf linux-"$LINUX_VERSION".tar.xz && \
-    cd linux-"$LINUX_VERSION" && \
-    make defconfig && \
-    make xen.config && \
-    scripts/config --enable BRIDGE && \
-    scripts/config --enable IGC && \
-    scripts/config --enable TUN && \
-    cp .config .config.orig && \
-    cat .config.orig | grep XEN | grep =m |sed 's/=m/=y/g' >> .config && \
-    make -j$(nproc) bzImage && \
-    cp arch/x86/boot/bzImage / && \
-    cd /build && \
-    rm -rf linux-"$LINUX_VERSION"*
-- 
2.39.5



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        Thu, 10 Apr 2025 05:05:25 -0700 (PDT)
From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
Subject: [PATCH 3/3] CI: Drop stale test-artifacts/alpine/3.18.dockerfile
Date: Thu, 10 Apr 2025 13:05:20 +0100
Message-Id: <20250410120520.2062328-4-andrew.cooper3@citrix.com>
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This should have been dropped too, as the authoritative copy lives in another
repo now.

Fixes: babe11b46c1a ("CI: Drop alpine-3.18-rootfs-export and use test-artefacts")
Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Doug Goldstein 
CC: Marek Marczykowski-Górecki 

Repost
---
 .../tests-artifacts/alpine/3.18.dockerfile    | 67 -------------------
 1 file changed, 67 deletions(-)
 delete mode 100644 automation/tests-artifacts/alpine/3.18.dockerfile

diff --git a/automation/tests-artifacts/alpine/3.18.dockerfile b/automation/tests-artifacts/alpine/3.18.dockerfile
deleted file mode 100644
index 311a92889b87..000000000000
--- a/automation/tests-artifacts/alpine/3.18.dockerfile
+++ /dev/null
@@ -1,67 +0,0 @@
-# syntax=docker/dockerfile:1
-FROM --platform=linux/amd64 alpine:3.18
-LABEL maintainer.name="The Xen Project" \
-      maintainer.email="xen-devel@lists.xenproject.org"
-
-ENV USER root
-
-RUN mkdir /build
-WORKDIR /build
-
-RUN \
-  # apk
-  apk update && \
-  \
-  # xen runtime deps
-  apk add musl && \
-  apk add libgcc && \
-  apk add openrc && \
-  apk add busybox && \
-  apk add sudo && \
-  apk add dbus && \
-  apk add bash && \
-  apk add python3 && \
-  apk add zlib && \
-  apk add ncurses && \
-  apk add yajl && \
-  apk add libaio && \
-  apk add xz && \
-  apk add util-linux && \
-  apk add argp-standalone && \
-  apk add libfdt && \
-  apk add glib && \
-  apk add pixman && \
-  apk add curl && \
-  apk add udev && \
-  apk add pciutils && \
-  apk add libelf && \
-  \
-  # Xen
-  cd / && \
-  # Minimal ramdisk environment in case of cpio output
-  rc-update add udev && \
-  rc-update add udev-trigger && \
-  rc-update add udev-settle && \
-  rc-update add loopback sysinit && \
-  rc-update add bootmisc boot && \
-  rc-update add devfs sysinit && \
-  rc-update add dmesg sysinit && \
-  rc-update add hostname boot && \
-  rc-update add hwclock boot && \
-  rc-update add hwdrivers sysinit && \
-  rc-update add modules boot && \
-  rc-update add killprocs shutdown && \
-  rc-update add mount-ro shutdown && \
-  rc-update add savecache shutdown && \
-  rc-update add local default && \
-  cp -a /sbin/init /init && \
-  echo "ttyS0" >> /etc/securetty && \
-  echo "hvc0" >> /etc/securetty && \
-  echo "ttyS0::respawn:/sbin/getty -L ttyS0 115200 vt100" >> /etc/inittab && \
-  echo "hvc0::respawn:/sbin/getty -L hvc0 115200 vt100" >> /etc/inittab && \
-  echo > /etc/modules && \
-  passwd -d "root" root && \
-  \
-  # Create rootfs
-  cd / && \
-  tar cvzf /initrd.tar.gz bin dev etc home init lib mnt opt root sbin usr var
-- 
2.39.5



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 hyperlaunch device tree
To: Alejandro Vallejo 
Cc: "Daniel P. Smith" ,
 Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini ,
 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 xen-devel@lists.xenproject.org
References: <20250408160802.49870-1-agarciav@amd.com>
 <20250408160802.49870-16-agarciav@amd.com>
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From: Jan Beulich 
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In-Reply-To: <20250408160802.49870-16-agarciav@amd.com>
Content-Type: text/plain; charset=UTF-8
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On 08.04.2025 18:07, Alejandro Vallejo wrote:
> From: "Daniel P. Smith" 
> 
> Introduce the `cpus` property, named as such for dom0less compatibility, that
> represents the maximum number of vpcus to allocate for a domain. In the device

Nit: vcpus

> --- a/xen/arch/x86/domain-builder/fdt.c
> +++ b/xen/arch/x86/domain-builder/fdt.c
> @@ -246,6 +246,17 @@ static int __init process_domain_node(
>              bd->max_pages = PFN_DOWN(kb * SZ_1K);
>              printk("  max memory: %ld kb\n", kb);
>          }
> +        else if ( strncmp(prop_name, "cpus", name_len) == 0 )
> +        {
> +            uint32_t val = UINT_MAX;
> +            if ( fdt_prop_as_u32(prop, &val) != 0 )

And again the same nit.

> +            {
> +                printk("  failed processing max_vcpus for domain %s\n", name);

There's no "max_vcpus" being processed here; that purely ...

> +                return -EINVAL;
> +            }
> +            bd->max_vcpus = val;

... the internal name we use for the struct field etc. The user observing the
message ought to be able to easily associate it back with the DT item.

Jan


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Feedback-ID: i1568416f:Fastmail
Date: Thu, 10 Apr 2025 14:09:17 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Roger Pau =?utf-8?B?TW9ubsOp?= ,
	Stefano Stabellini ,
	Michal Orzel ,
	Anthony PERARD 
Subject: Re: [PATCH 3/6] Adjust Linux build script to work with other major
 versions
Message-ID: 
References: <20250410114628.2060072-1-andrew.cooper3@citrix.com>
 <20250410114628.2060072-4-andrew.cooper3@citrix.com>
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--3cyWOqAS0erRWFr1
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Date: Thu, 10 Apr 2025 14:09:17 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Roger Pau =?utf-8?B?TW9ubsOp?= ,
	Stefano Stabellini ,
	Michal Orzel ,
	Anthony PERARD 
Subject: Re: [PATCH 3/6] Adjust Linux build script to work with other major
 versions

On Thu, Apr 10, 2025 at 12:46:25PM +0100, Andrew Cooper wrote:
> Simply the tar expression, as 'tar xf' can figure out the compression
> automatically.
>=20
> Signed-off-by: Andrew Cooper 

Reviewed-by: Marek Marczykowski-G=C3=B3recki 

> ---
> CC: Roger Pau Monn=C3=A9 
> CC: Stefano Stabellini 
> CC: Michal Orzel 
> CC: Marek Marczykowski-G=C3=B3recki 
> CC: Anthony PERARD 
>=20
> v2:
>  * Use 'tar xf'
> ---
>  scripts/x86_64-kernel-linux.sh | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
>=20
> diff --git a/scripts/x86_64-kernel-linux.sh b/scripts/x86_64-kernel-linux=
=2Esh
> index 2a816f0b3204..5ed5608628bc 100755
> --- a/scripts/x86_64-kernel-linux.sh
> +++ b/scripts/x86_64-kernel-linux.sh
> @@ -11,9 +11,10 @@ WORKDIR=3D"${PWD}"
>  COPYDIR=3D"${WORKDIR}/binaries/"
> =20
>  # Build Linux
> +MAJOR=3D${LINUX_VERSION%%.*}
>  curl -fsSLO \
> -    https://cdn.kernel.org/pub/linux/kernel/v6.x/linux-"${LINUX_VERSION}=
".tar.xz
> -tar xJf linux-"${LINUX_VERSION}".tar.xz
> +    https://cdn.kernel.org/pub/linux/kernel/v"${MAJOR}".x/linux-"${LINUX=
_VERSION}".tar.xz
> +tar xf linux-"${LINUX_VERSION}".tar.xz
>  cd linux-"${LINUX_VERSION}"
>  make ARCH=3Dx86 defconfig
>  make ARCH=3Dx86 xen.config
> --=20
> 2.39.5
>=20

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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CC: , "Daniel P. Smith"
	, Jason Andryuk , "Xenia
 Ragiadakou" , Stefano Stabellini
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Subject: Re: [PATCH v3 04/16] kconfig: introduce option to independently
 enable libfdt
From: Alejandro Vallejo 
To: Denis Mukhin 
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On Wed Apr 9, 2025 at 7:57 PM BST, Denis Mukhin wrote:
> On Tuesday, April 8th, 2025 at 9:07 AM, Alejandro Vallejo  wrote:
>
>>=20
>>=20
>> From: "Daniel P. Smith" dpsmith@apertussolutions.com
>>=20
>>=20
>> Currently, the inclusion of libfdt is controlled by the CONFIG_HAS_DEVIC=
E_TREE
>> kconfig flag. This flag also changes behavior in a few places, such as b=
oot
>> module processing for XSM. To support the ability to include libfdt with=
out
>> changing these behaviors, introduce CONFIG_LIBFDT. The inclusion of
>> libfdt is then moved under CONFIG_LIBFDT.
>>=20
>> Signed-off-by: Daniel P. Smith dpsmith@apertussolutions.com
>>=20
>> Signed-off-by: Jason Andryuk jason.andryuk@amd.com
>
> Reviewed-by: Denis Mukhin 

Thanks

Cheers,
Alejandro


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Subject: Re: [PATCH v3 16/16] x86/hyperlaunch: add capabilities to boot domain
To: Alejandro Vallejo ,
 Jason Andryuk 
Cc: "Daniel P. Smith" ,
 Xenia Ragiadakou ,
 Stefano Stabellini ,
 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 08.04.2025 18:07, Alejandro Vallejo wrote:
> From: "Daniel P. Smith" 
> 
> Introduce the ability to assign capabilities to a domain via its definition in
> device tree. The first capability enabled to select is the control domain
> capability. The capability property is a bitfield in both the device tree and
> `struct boot_domain`.
> 
> Signed-off-by: Daniel P. Smith 
> Reviewed-by: Jason Andryuk 
> Signed-off-by: Jason Andryuk 

The R-b feels kind of redundant with the subsequent S-o-b.

> --- a/xen/arch/x86/domain-builder/fdt.c
> +++ b/xen/arch/x86/domain-builder/fdt.c
> @@ -257,6 +257,18 @@ static int __init process_domain_node(
>              bd->max_vcpus = val;
>              printk("  max vcpus: %d\n", bd->max_vcpus);
>          }
> +        else if ( strncmp(prop_name, "capabilities", name_len) == 0 )
> +        {
> +            if ( fdt_prop_as_u32(prop, &bd->capabilities) != 0 )
> +            {
> +                printk("  failed processing domain id for domain %s\n", name);
> +                return -EINVAL;
> +            }
> +            printk("  caps: ");
> +            if ( bd->capabilities & BUILD_CAPS_CONTROL )
> +                printk("c");
> +            printk("\n");
> +        }

Like for the other patch: What about other bits being set in the value read?

> --- a/xen/arch/x86/setup.c
> +++ b/xen/arch/x86/setup.c
> @@ -1006,6 +1006,7 @@ static struct domain *__init create_dom0(struct boot_info *bi)
>  {
>      char *cmdline = NULL;
>      size_t cmdline_size;
> +    unsigned int create_flags = 0;
>      struct xen_domctl_createdomain dom0_cfg = {
>          .flags = IS_ENABLED(CONFIG_TBOOT) ? XEN_DOMCTL_CDF_s3_integrity : 0,
>          .max_evtchn_port = -1,
> @@ -1037,7 +1038,10 @@ static struct domain *__init create_dom0(struct boot_info *bi)
>      if ( bd->domid == DOMID_INVALID )
>          /* Create initial domain.  Not d0 for pvshim. */
>          bd->domid = get_initial_domain_id();
> -    d = domain_create(bd->domid, &dom0_cfg, pv_shim ? 0 : CDF_privileged);
> +    if ( bd->capabilities & BUILD_CAPS_CONTROL )
> +        create_flags |= CDF_privileged;

Seeing that builder_init() in the non-DT case sets the new bit unconditionally,
isn't the shim's only domain suddenly getting CDF_privileged set this way? Oh,
no, you then ...

> +    d = domain_create(bd->domid, &dom0_cfg,
> +                      pv_shim ? 0 : create_flags);

... hide the flag here. Any reason to have the intermediate variable in the
first place (can't resist: when there's already a wall of local variables here)?

Jan


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Subject: Re: [PATCH v3 16/16] x86/hyperlaunch: add capabilities to boot domain
To: Alejandro Vallejo ,
 Jason Andryuk 
Cc: "Daniel P. Smith" ,
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 Andrew Cooper ,
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On 08.04.2025 18:07, Alejandro Vallejo wrote:
> From: "Daniel P. Smith" 
> 
> Introduce the ability to assign capabilities to a domain via its definition in
> device tree. The first capability enabled to select is the control domain
> capability. The capability property is a bitfield in both the device tree and
> `struct boot_domain`.
> 
> Signed-off-by: Daniel P. Smith 
> Reviewed-by: Jason Andryuk 
> Signed-off-by: Jason Andryuk 

The R-b feels kind of redundant with the subsequent S-o-b.

> --- a/xen/arch/x86/domain-builder/fdt.c
> +++ b/xen/arch/x86/domain-builder/fdt.c
> @@ -257,6 +257,18 @@ static int __init process_domain_node(
>              bd->max_vcpus = val;
>              printk("  max vcpus: %d\n", bd->max_vcpus);
>          }
> +        else if ( strncmp(prop_name, "capabilities", name_len) == 0 )
> +        {
> +            if ( fdt_prop_as_u32(prop, &bd->capabilities) != 0 )
> +            {
> +                printk("  failed processing domain id for domain %s\n", name);
> +                return -EINVAL;
> +            }
> +            printk("  caps: ");
> +            if ( bd->capabilities & BUILD_CAPS_CONTROL )
> +                printk("c");
> +            printk("\n");
> +        }

Like for the other patch: What about other bits being set in the value read?

> --- a/xen/arch/x86/setup.c
> +++ b/xen/arch/x86/setup.c
> @@ -1006,6 +1006,7 @@ static struct domain *__init create_dom0(struct boot_info *bi)
>  {
>      char *cmdline = NULL;
>      size_t cmdline_size;
> +    unsigned int create_flags = 0;
>      struct xen_domctl_createdomain dom0_cfg = {
>          .flags = IS_ENABLED(CONFIG_TBOOT) ? XEN_DOMCTL_CDF_s3_integrity : 0,
>          .max_evtchn_port = -1,
> @@ -1037,7 +1038,10 @@ static struct domain *__init create_dom0(struct boot_info *bi)
>      if ( bd->domid == DOMID_INVALID )
>          /* Create initial domain.  Not d0 for pvshim. */
>          bd->domid = get_initial_domain_id();
> -    d = domain_create(bd->domid, &dom0_cfg, pv_shim ? 0 : CDF_privileged);
> +    if ( bd->capabilities & BUILD_CAPS_CONTROL )
> +        create_flags |= CDF_privileged;

Seeing that builder_init() in the non-DT case sets the new bit unconditionally,
isn't the shim's only domain suddenly getting CDF_privileged set this way? Oh,
no, you then ...

> +    d = domain_create(bd->domid, &dom0_cfg,
> +                      pv_shim ? 0 : create_flags);

... hide the flag here. Any reason to have the intermediate variable in the
first place (can't resist: when there's already a wall of local variables here)?

Jan


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	Michal Orzel ,
	Anthony PERARD 
Subject: Re: [PATCH 7/8] Infrastructure for arm64 linux builds

On Thu, Apr 10, 2025 at 11:57:23AM +0100, Andrew Cooper wrote:
> The awk complaint has gone away too, so I suppose that's a knock-on effec=
t.

It isn't?=20
https://gitlab.com/xen-project/hardware/test-artifacts/-/jobs/9683454411#L1=
06

Anyway, hopefully harmless.

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Subject: Ping: [PATCH] x86/EFI: sanitize DLL characteristics in binary
From: Jan Beulich 
To: Marek Marczykowski ,
 Daniel Smith 
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 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 02.04.2025 10:51, Jan Beulich wrote:
> In GNU ld --disable-reloc-section implies --disable-dynamicbase (and
> also --disable-high-entropy-va, just fyi). Therefore to yield
> functionally identical binaries independent of whether mkreloc needs to
> come into play, add --dynamicbase as well.
> 
> GNU ld further defaults to --high-entropy-va (along with --dynamicbase
> and --nxcompat) unless "Cygwin-like". This seems wrong to me; that
> default should be dependent upon "MinGW-like" instead; for the purpose
> of building EFI binaries with a PE32+-capable ELF linker neither
> "Cygwin-like" nor "MinGW-like" ought to be true. We certainly don't mean
> to have this bit set in the DLL characteristics, so suppress its
> setting.
> 
> Sadly while --high-entropy-va is supported by GNU ld 2.25,
> --disable-high-entropy-va was introduced only in 2.36. Luckily the
> defaulting to --high-entropy-va was also only introduced in 2.36. Plus
> --disable-reloc-section was introduced precisely there, too. Hence
> leverage the probing we do as to base relocation generation, to also
> determine whether to pass --disable-high-entropy-va.
> 
> Signed-off-by: Jan Beulich 

Despite the file being modified suggesting this needs an x86 maintainer
ack, I think it's rather one of the two of you who should ack (or
otherwise comment on) this.

Jan

> ---
> I remain uncertain about the applicability of DLL characteristics to
> non-DLLs, i.e. images without IMAGE_FILE_DLL set; current MS doc says
> nothing either way. Yet producing consistent binaries still seems
> desirable, even if the field wasn't to be used by loaders.
> 
> --- a/xen/arch/x86/arch.mk
> +++ b/xen/arch/x86/arch.mk
> @@ -113,6 +113,7 @@ efi-nr-fixups := $(shell LC_ALL=C $(OBJD
>  
>  ifeq ($(efi-nr-fixups),2)
>  MKRELOC := :
> +EFI_LDFLAGS += --disable-high-entropy-va
>  else
>  MKRELOC := arch/x86/efi/mkreloc
>  # If the linker produced fixups but not precisely two of them, we need to
> @@ -123,6 +124,8 @@ EFI_LDFLAGS += --disable-reloc-section
>  endif
>  endif
>  
> +EFI_LDFLAGS += --dynamicbase
> +
>  endif # $(XEN_BUILD_PE)
>  
>  export XEN_BUILD_EFI XEN_BUILD_PE



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Cc: Xen-devel ,
	Roger Pau =?utf-8?B?TW9ubsOp?= ,
	Stefano Stabellini ,
	Michal Orzel ,
	Anthony PERARD 
Subject: Re: [PATCH 2/6] Clean up Gitlab yaml

On Thu, Apr 10, 2025 at 12:46:24PM +0100, Andrew Cooper wrote:
> Factor out the registry into a common location.  Drop the worflow name, a=
s all
> it does is hide the commit message of the change that triggered the pipel=
ine.
> List all the stages.  Set a default expiry of 1 month.
>=20
> Note all the current jobs as legacy.  Their naming scheme needs changing,=
 and
> we'll use this opportunity to switch formats too.  However, the artefacts=
 need
> to stay using the old name until the final staging-* branch using them is
> phased out.
>=20
> Signed-off-by: Andrew Cooper 

Reviewed-by: Marek Marczykowski-G=C3=B3recki 

> ---
> CC: Roger Pau Monn=C3=A9 
> CC: Stefano Stabellini 
> CC: Michal Orzel 
> CC: Marek Marczykowski-G=C3=B3recki 
> CC: Anthony PERARD 
>=20
> v2:
>  * Drop the workflow name.
> ---
>  .gitlab-ci.yml | 13 ++++++++++---
>  1 file changed, 10 insertions(+), 3 deletions(-)
>=20
> diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
> index 36ec6a7e1ee5..734f3982c46f 100644
> --- a/.gitlab-ci.yml
> +++ b/.gitlab-ci.yml
> @@ -1,12 +1,16 @@
> -workflow:
> -  name: "xen test artifacts"
> +variables:
> +  REGISTRY: registry.gitlab.com/xen-project/hardware/test-artifacts
> +
> +stages:
> +  - build
> =20
>  .artifacts:
>    stage: build
>    image:
> -    name: registry.gitlab.com/xen-project/hardware/test-artifacts/${CONT=
AINER}
> +    name: ${REGISTRY}/${CONTAINER}
>    artifacts:
>      name: "${CI_JOB_NAME_SLUG}"
> +    expire_in: 1 month
>      paths:
>        - binaries/
>      exclude:
> @@ -19,6 +23,9 @@ workflow:
>    variables:
>      CONTAINER: alpine:x86_64-build
> =20
> +#
> +# The jobs below here are legacy and being phased out.
> +#
>  x86_64-kernel-linux-6.6.56:
>    extends: .x86_64-artifacts
>    script:
> --=20
> 2.39.5
>=20

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

--/4Mq+QJ+tWL6h2hY
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Date: Thu, 10 Apr 2025 14:34:37 +0200
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Subject: Re: [PATCH v2 1/8] driver/pci: Get next capability without passing
 caps
To: Jiqian Chen 
Cc: Huang Rui , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <20250409064528.405573-1-Jiqian.Chen@amd.com>
 <20250409064528.405573-2-Jiqian.Chen@amd.com>
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In-Reply-To: <20250409064528.405573-2-Jiqian.Chen@amd.com>
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On 09.04.2025 08:45, Jiqian Chen wrote:
> --- a/xen/drivers/pci/pci.c
> +++ b/xen/drivers/pci/pci.c
> @@ -40,7 +40,7 @@ unsigned int pci_find_cap_offset(pci_sbdf_t sbdf, unsigned int cap)
>  }
>  
>  unsigned int pci_find_next_cap_ttl(pci_sbdf_t sbdf, unsigned int pos,
> -                                   const unsigned int caps[], unsigned int n,
> +                                   const unsigned int *caps, unsigned int n,

I don't follow the need for this change.

> @@ -55,6 +55,10 @@ unsigned int pci_find_next_cap_ttl(pci_sbdf_t sbdf, unsigned int pos,
>  
>          if ( id == 0xff )
>              break;
> +
> +        if ( !caps || n == 0 )
> +            return pos;

Checking n to be zero ought to suffice here? In that case it doesn't matter
what caps is. Plus if n is non-zero, it clearly is an error if caps was NULL.

Jan


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Subject: Re: [PATCH v2 2/8] vpci/header: Emulate legacy capability list for
 host
To: Jiqian Chen 
Cc: Huang Rui , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , xen-devel@lists.xenproject.org
References: <20250409064528.405573-1-Jiqian.Chen@amd.com>
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From: Jan Beulich 
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On 09.04.2025 08:45, Jiqian Chen wrote:
> Current logic of init_header() only emulates legacy capability list
> for guest, expand it to emulate for host too. So that it will be
> easy to hide a capability whose initialization fails and no need
> to distinguish host or guest.

Before I (maybe) look at the patch as a hole: When you say "guest" you
mean "DomU" (which is a common pair of synonyms we use), whereas when
you say "host" you mean "Dom0"? The latter is not a common pair of
synonyms; "host" generally covers the entire system, including Xen and
all domains. See e.g. wording that we use in XSAs.

Jan


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Date: Thu, 10 Apr 2025 13:52:39 +0100
Message-ID: 
From: Alejandro Vallejo 
To: Jan Beulich 
CC: "Daniel P. Smith" , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" , Michal Orzel
	, Andrew Cooper ,
	=?utf-8?q?Roger_Pau_Monn=C3=A9?= ,
	
Subject: Re: [PATCH v3 05/16] kconfig: introduce domain builder config
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On Thu Apr 10, 2025 at 10:08 AM BST, Jan Beulich wrote:
> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>> --- /dev/null
>> +++ b/xen/arch/x86/domain-builder/Kconfig
>
> This really looks to be the first patch where it needs settling on whethe=
r
> all of this is to live under arch/x86/. If it is to, the reasons need wri=
ting
> down somewhere - maybe not here, but at least in the cover letter.

I need to think about it. I haven't yet reviewed all the history about
the series and the related discussions on the matter. Moving this to
common code ought to be simple enough, but merging dom0less into it
seems like a pretty big undertaking. Presumably you merely mean the code
location and the scope of the Kconfig?

>
>> @@ -0,0 +1,15 @@
>> +
>> +menu "Domain Builder Features"
>> +
>> +config DOMAIN_BUILDER
>> +	bool "Domain builder (UNSUPPORTED)" if UNSUPPORTED
>> +	select LIB_DEVICE_TREE
>
> Was this meant to be LIBFDT?
>
> Jan

Yes, the next patch turns it into LIBFDT. I spent more than I should've
wondering "How does the final series even work at all?" before looking
ahead and noticing this select was adjusted on the wrong patch.

Cheers,
Alejandro


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On 08.04.2025 17:57, Oleksii Kurochko wrote:
> @@ -23,6 +24,11 @@ static inline cycles_t get_cycles(void)
>      return csr_read(CSR_TIME);
>  }
>  
> +static inline s_time_t ticks_to_ns(uint64_t ticks)
> +{
> +    return muldiv64(ticks, SECONDS(1), 1000 * cpu_khz);
> +}

Why the extra multiplication by 1000? I.e. why not
"muldiv64(ticks, MILLISECONDS(1), cpu_khz)", getting away with just one
multiplication and a reduced risk of encountering intermediate overflow
(affecting only hypothetical above 4THz CPUs then)?

> --- a/xen/arch/riscv/time.c
> +++ b/xen/arch/riscv/time.c
> @@ -4,10 +4,17 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  
>  unsigned long __ro_after_init cpu_khz; /* CPU clock frequency in kHz. */
>  uint64_t __ro_after_init boot_clock_cycles;
>  
> +s_time_t get_s_time(void)
> +{
> +    uint64_t ticks = get_cycles() - boot_clock_cycles;
> +    return ticks_to_ns(ticks);

Nit: Blank line between declaration(s) and statement(s) please, as well as
ahead of the main "return" of a function.

Happy to make both adjustments upon committing, so long as you agree; then:
Reviewed-by: Jan Beulich 

Jan


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On 10.04.2025 14:52, Alejandro Vallejo wrote:
> On Thu Apr 10, 2025 at 10:08 AM BST, Jan Beulich wrote:
>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>> --- /dev/null
>>> +++ b/xen/arch/x86/domain-builder/Kconfig
>>
>> This really looks to be the first patch where it needs settling on whether
>> all of this is to live under arch/x86/. If it is to, the reasons need writing
>> down somewhere - maybe not here, but at least in the cover letter.
> 
> I need to think about it. I haven't yet reviewed all the history about
> the series and the related discussions on the matter. Moving this to
> common code ought to be simple enough, but merging dom0less into it
> seems like a pretty big undertaking. Presumably you merely mean the code
> location and the scope of the Kconfig?

Code location only: Yes, definitely. Kconfig: The scope would presumably still
be x86-only, until e.g. Arm was enabled, too.

Jan


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Date: Thu, 10 Apr 2025 14:01:51 +0100
Message-ID: 
CC: , "Daniel P. Smith"
	, Jason Andryuk , "Xenia
 Ragiadakou" , Stefano Stabellini
	, Michal Orzel , Jan Beulich
	, Andrew Cooper ,
	=?utf-8?q?Roger_Pau_Monn=C3=A9?= 
Subject: Re: [PATCH v3 06/16] x86/hyperlaunch: introduce the domain builder
From: Alejandro Vallejo 
To: Denis Mukhin 
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References: <20250408160802.49870-1-agarciav@amd.com>
 <20250408160802.49870-7-agarciav@amd.com>
 
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On Wed Apr 9, 2025 at 7:53 PM BST, Denis Mukhin wrote:
> On Tuesday, April 8th, 2025 at 9:07 AM, Alejandro Vallejo  wrote:
>
>>=20
>>=20
>> From: "Daniel P. Smith" dpsmith@apertussolutions.com
>>=20
>>=20
>> Introduce the domain builder which is capable of consuming a device tree=
 as the
>> first boot module. If it finds a device tree as the first boot module, i=
t will
>> set its type to BOOTMOD_FDT. This change only detects the boot module an=
d
>> continues to boot with slight change to the boot convention that the dom=
0
>> kernel is no longer first boot module but is the second.
>>=20
>> No functional change intended.
>>=20
>> Signed-off-by: Daniel P. Smith dpsmith@apertussolutions.com
>>=20
>> Signed-off-by: Jason Andryuk jason.andryuk@amd.com
>>=20
>> ---
>> v3:
>> * Move obj-y +=3D domain-builder/
>> * Remove blank line in Makefile
>> * const in has_hyperlaunch_fdt()
>> * CONFIG_LIBFDT rename
>> * Use boot_info forward declaration
>> * Rename domainbuilder.h to domain-builder.h
>> * Add fdt NULL check
>> ---
>> xen/arch/x86/Makefile | 1 +
>> xen/arch/x86/domain-builder/Kconfig | 2 +-
>> xen/arch/x86/domain-builder/Makefile | 2 +
>> xen/arch/x86/domain-builder/core.c | 57 +++++++++++++++++++++++
>> xen/arch/x86/domain-builder/fdt.c | 37 +++++++++++++++
>> xen/arch/x86/domain-builder/fdt.h | 21 +++++++++
>
> I have a general question.
>
> Wouldn't that make sense to use arch-independent placeholder for domain b=
uilder
> code right from the starting point?
>
> For example something like xen/common/domain-builder ?
>
> My understanding is that there's a lot of code in the domain builder whic=
h
> can be potentially shared/re-used with non-x86 architectures.
>
> Also, that seems to align with the intention to have common arch-independ=
ent
> subsystems in the code base:
>
>    https://docs.google.com/presentation/d/1q9cjJZLUxUo1YzMpCxVHuL-ZOGoFaO=
9haHfRBK4i4Uc/edit?slide=3Did.g32afc87aef4_0_18#slide=3Did.g32afc87aef4_0_1=
8

  https://lore.kernel.org/xen-devel/D92Z1LECR2VA.3FW5H7ZIRVXU7@amd.com/

In principle, yes. I'll try to move it, but I suspect making it coexist
with dom0less will prove tricky.

>> diff --git a/xen/arch/x86/domain-builder/core.c b/xen/arch/x86/domain-bu=
ilder/core.c
>> new file mode 100644
>> index 0000000000..d6ae94f45c
>> --- /dev/null
>> +++ b/xen/arch/x86/domain-builder/core.c
>> @@ -0,0 +1,57 @@
>> +/* SPDX-License-Identifier: GPL-2.0-only /
>> +/
>> + * Copyright (C) 2024, Apertus Solutions, LLC
>> + */
>> +#include 
>>=20
>> +#include 
>>=20
>> +#include 
>>=20
>> +#include 
>>=20
>> +
>> +#include 
>>=20
>> +
>> +#include "fdt.h"
>> +
>> +void __init builder_init(struct boot_info *bi)
>> +{
>> + if ( IS_ENABLED(CONFIG_DOMAIN_BUILDER) )
>> + {
>> + int ret;
>> +
>> + switch ( ret =3D has_hyperlaunch_fdt(bi) )
>> + {
>> + case 0:
>> + printk("Hyperlaunch device tree detected\n");
>> + bi->hyperlaunch_enabled =3D true;

FYI, your email client seems to be collapsing the indentation of the
quoted patches. Is that intentional?

Cheers,
Alejandro


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Date: Thu, 10 Apr 2025 09:09:53 -0400
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Subject: Re: [PATCH v3 01/16] x86/boot: introduce boot domain
To: Jan Beulich , Alejandro Vallejo 
Cc: Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini ,
 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 xen-devel@lists.xenproject.org
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On 4/9/25 02:24, Jan Beulich wrote:
> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>> From: "Daniel P. Smith" 
>>
>> To begin moving toward allowing the hypervisor to construct more than one
>> domain at boot, a container is needed for a domain's build information.
>> Introduce a new header, , that contains the initial
>> struct boot_domain that encapsulate the build information for a domain.
>>
>> Add a kernel and ramdisk boot module reference along with a struct domain
>> reference to the new struct boot_domain. This allows a struct boot_domain
>> reference to be the only parameter necessary to pass down through the domain
>> construction call chain.
>>
>> Signed-off-by: Daniel P. Smith 
>> Reviewed-by: Jason Andryuk 
> 
> Acked-by: Jan Beulich 

I have to object because the meaningless rename is going cause 
significant pain in the rebase of the follow-on series for no improved 
code clarity.

V/r,
DPS


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Subject: Re: [PATCH v1 02/14] xen/riscv: introduce smp_clear_cpu_maps()
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 08.04.2025 17:57, Oleksii Kurochko wrote:
> Initialize cpu_{possible, online, present}_map by using smp_clear_cpu_maps().
> 
> Drop DEFINE_PER_CPU(unsigned int, cpu_id) from stubs.c as this variable isn't
> expected to be used in RISC-V at all.
> 
> Move declaration of cpu_{possible,online,present}_map from stubs.c to smpboot.c
> as now smpboot.c is now introduced.
> Other defintions keep in stubs.c as they are not initialized and not needed, at
> the moment.
> 
> Signed-off-by: Oleksii Kurochko 
> ---
>  xen/arch/riscv/Makefile          |  1 +
>  xen/arch/riscv/include/asm/smp.h |  2 ++
>  xen/arch/riscv/setup.c           |  2 ++
>  xen/arch/riscv/smpboot.c         | 15 +++++++++++++++
>  xen/arch/riscv/stubs.c           |  6 ------
>  5 files changed, 20 insertions(+), 6 deletions(-)
>  create mode 100644 xen/arch/riscv/smpboot.c
> 
> diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile
> index 0c6c4a38a3..f551bf32a2 100644
> --- a/xen/arch/riscv/Makefile
> +++ b/xen/arch/riscv/Makefile
> @@ -10,6 +10,7 @@ obj-y += sbi.o
>  obj-y += setup.o
>  obj-y += shutdown.o
>  obj-y += smp.o
> +obj-y += smpboot.o
>  obj-y += stubs.o
>  obj-y += time.o
>  obj-y += traps.o
> diff --git a/xen/arch/riscv/include/asm/smp.h b/xen/arch/riscv/include/asm/smp.h
> index 5e170b57b3..188c033718 100644
> --- a/xen/arch/riscv/include/asm/smp.h
> +++ b/xen/arch/riscv/include/asm/smp.h
> @@ -26,6 +26,8 @@ static inline void set_cpuid_to_hartid(unsigned long cpuid,
>  
>  void setup_tp(unsigned int cpuid);
>  
> +void smp_clear_cpu_maps(void);
> +
>  #endif
>  
>  /*
> diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c
> index 4e416f6e44..7f68f3f5b7 100644
> --- a/xen/arch/riscv/setup.c
> +++ b/xen/arch/riscv/setup.c
> @@ -72,6 +72,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id,
>  
>      remove_identity_mapping();
>  
> +    smp_clear_cpu_maps();
> +
>      set_processor_id(0);
>  
>      set_cpuid_to_hartid(0, bootcpu_id);
> diff --git a/xen/arch/riscv/smpboot.c b/xen/arch/riscv/smpboot.c
> new file mode 100644
> index 0000000000..0f4dcc28e1
> --- /dev/null
> +++ b/xen/arch/riscv/smpboot.c
> @@ -0,0 +1,15 @@
> +#include 
> +#include 
> +
> +cpumask_t cpu_online_map;
> +cpumask_t cpu_present_map;
> +cpumask_t cpu_possible_map;

__read_mostly for all of them, perhaps (if CPU hotplug isn't expected to
be supported) even __ro_after_init for the latter two?

As to cpu_possible_map - do you predict that you'll actually use it? Arm
does (and instead has only a fake cpu_present_map), but on x86 we get away
without.

> +void __init smp_clear_cpu_maps(void)
> +{
> +    cpumask_clear(&cpu_possible_map);
> +    cpumask_clear(&cpu_online_map);

What's the point of these? All three maps start out fully zeroed.

> +    cpumask_set_cpu(0, &cpu_possible_map);
> +    cpumask_set_cpu(0, &cpu_online_map);

These are contradicting the name of the function. The somewhat equivalent
function we have on x86 is smp_prepare_boot_cpu().

> +    cpumask_copy(&cpu_present_map, &cpu_possible_map);

Another cpumask_set_cpu() is probably cheaper here then.

Jan


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Subject: Re: [PATCH v3 01/16] x86/boot: introduce boot domain
To: Alejandro Vallejo , Jan Beulich 
Cc: Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini ,
 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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 <20250408160802.49870-2-agarciav@amd.com>
 <141229a0-2cd2-4886-b5e5-02c85b0ca5ab@suse.com>
 
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On 4/9/25 06:28, Alejandro Vallejo wrote:
> On Wed Apr 9, 2025 at 7:24 AM BST, Jan Beulich wrote:
>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>> From: "Daniel P. Smith" 
>>>
>>> To begin moving toward allowing the hypervisor to construct more than one
>>> domain at boot, a container is needed for a domain's build information.
>>> Introduce a new header, , that contains the initial
>>> struct boot_domain that encapsulate the build information for a domain.
>>>
>>> Add a kernel and ramdisk boot module reference along with a struct domain
>>> reference to the new struct boot_domain. This allows a struct boot_domain
>>> reference to be the only parameter necessary to pass down through the domain
>>> construction call chain.
>>>
>>> Signed-off-by: Daniel P. Smith 
>>> Reviewed-by: Jason Andryuk 
>>
>> Acked-by: Jan Beulich 
> 
> Thanks
> 
>>
>>> --- /dev/null
>>> +++ b/xen/arch/x86/include/asm/boot-domain.h
>>> @@ -0,0 +1,28 @@
>>> +/* SPDX-License-Identifier: GPL-2.0-or-later */
>>> +/*
>>> + * Copyright (c) 2024 Apertus Solutions, LLC
>>> + * Author: Daniel P. Smith 
>>> + * Copyright (c) 2024 Christopher Clark 
>>> + */
>>
>> I wonder if the 2024-s here shouldn't have been amended by 2025 now.
> 
> Maybe. I didn't think about it, tbh. One could argue that Daniel and
> Christopher's original contribution was indeed in 2024 and the fact they
> weren't committed until (hopefully!) 2025 doesn't remove the fact they
> did exist in some form in 2024.
> 
> I don't particularly care either way, but tend to lean on the "it's fine
> how it is".

Jan is correct, now that we have moved into 2025, they should be 
updated. Maybe we can actually get it all committed this year.

v/r,
dps


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On Thu, Apr 10, 2025 at 12:46:23PM +0100, Andrew Cooper wrote:
> While it pains me to keep the wrong spelling, do so for consistency.
> 
> Signed-off-by: Andrew Cooper 

Reviewed-by: Anthony PERARD 

Thanks,

-- 

Anthony Perard | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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On Thu, Apr 10, 2025 at 12:46:24PM +0100, Andrew Cooper wrote:
> Factor out the registry into a common location.  Drop the worflow name, as all
> it does is hide the commit message of the change that triggered the pipeline.
> List all the stages.  Set a default expiry of 1 month.
> 
> Note all the current jobs as legacy.  Their naming scheme needs changing, and
> we'll use this opportunity to switch formats too.  However, the artefacts need
> to stay using the old name until the final staging-* branch using them is
> phased out.
> 
> Signed-off-by: Andrew Cooper 

Reviewed-by: Anthony PERARD 

Thanks,

-- 

Anthony Perard | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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On Thu, Apr 10, 2025 at 12:46:28PM +0100, Andrew Cooper wrote:
> For ARM64, the tests in Xen currently use 6.6.74, but 6.6.86 works so update
> to the latest.
> 
> For x86, stay at 6.6.56.  There's a PVH regression upstream in need of fixing.
> 
> Signed-off-by: Andrew Cooper 

Acked-by: Anthony PERARD 

Thanks,

-- 

Anthony Perard | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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Subject: Re: [PATCH 5/6] Infrastructure for arm64 linux builds
To: Anthony PERARD 
Cc: Xen-devel ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Michal Orzel ,
 =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= 
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On 10/04/2025 2:51 pm, Anthony PERARD wrote:
> On Thu, Apr 10, 2025 at 12:46:27PM +0100, Andrew Cooper wrote:
>> diff --git a/images/alpine/3.18-arm64-build.dockerfile b/images/alpine/3.18-arm64-build.dockerfile
>> new file mode 100644
>> index 000000000000..b6d9bd1af531
>> --- /dev/null
>> +++ b/images/alpine/3.18-arm64-build.dockerfile
>> @@ -0,0 +1,27 @@
>> +# syntax=docker/dockerfile:1
>> +FROM --platform=linux/arm64/v8 alpine:3.18
>> +LABEL maintainer.name="The Xen Project" \
>> +      maintainer.email="xen-devel@lists.xenproject.org"
> I though we were repeating the "LABEL" on each line these days, to avoid
> the backslash at the end of the line. ;-)

Oh right.  I'll fix.

>
>> +
>> +RUN apk --no-cache add bash
>> +
>> +RUN bash -ex <> +      adduser -D user --shell bash
>> +
>> +      DEPS=(# Base environment
>> +            build-base
>> +            curl
>> +
>> +            # Linux build deps
>> +            bison
>> +            findutils
>> +            flex
>> +            openssl-dev
>> +            perl
>> +      )
>> +
>> +      apk add --no-cache "\${DEPS[@]}"
> If I take one example from xen.git, we don't escape the $ and it's just
> "${DEPS[@]}", is it because the script is run with:
>
>     RUN bash -ex <
> instead of
>
>     RUN <     #!/usr/bin/bash
>
> ?
>
>
> As for the rest of the patch, it looks fine to me. I don't know if the
> change to the build config are necessary but they looks fine.

Ah, I meant to look at that and forgot.  This was started from the x86
container already in test-artefacts.

But yes, we want to do this the way xen.git does, with a set -eu too.

>
> With the LABEL repeated on each line:
> Reviewed-by: Anthony PERARD 

Thanks.

~Andrew


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Subject: Re: [GIT PULL] xen: branch for v6.15-rc2
From: pr-tracker-bot@kernel.org
In-Reply-To: <20250410090713.30027-1-jgross@suse.com>
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Date: Thu, 10 Apr 2025 14:09:42 +0000
To: Juergen Gross 
Cc: torvalds@linux-foundation.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, sstabellini@kernel.org

The pull request you sent on Thu, 10 Apr 2025 11:07:13 +0200:

> git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip.git for-linus-6.15a-rc2-tag

has been merged into torvalds/linux.git:
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Thank you!

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On 4/2/25 04:51, Jan Beulich wrote:
> In GNU ld --disable-reloc-section implies --disable-dynamicbase (and
> also --disable-high-entropy-va, just fyi). Therefore to yield
> functionally identical binaries independent of whether mkreloc needs to
> come into play, add --dynamicbase as well.
> 
> GNU ld further defaults to --high-entropy-va (along with --dynamicbase
> and --nxcompat) unless "Cygwin-like". This seems wrong to me; that
> default should be dependent upon "MinGW-like" instead; for the purpose
> of building EFI binaries with a PE32+-capable ELF linker neither
> "Cygwin-like" nor "MinGW-like" ought to be true. We certainly don't mean
> to have this bit set in the DLL characteristics, so suppress its
> setting.
> 
> Sadly while --high-entropy-va is supported by GNU ld 2.25,
> --disable-high-entropy-va was introduced only in 2.36. Luckily the
> defaulting to --high-entropy-va was also only introduced in 2.36. Plus
> --disable-reloc-section was introduced precisely there, too. Hence
> leverage the probing we do as to base relocation generation, to also
> determine whether to pass --disable-high-entropy-va.
> 
> Signed-off-by: Jan Beulich 
> ---
> I remain uncertain about the applicability of DLL characteristics to
> non-DLLs, i.e. images without IMAGE_FILE_DLL set; current MS doc says
> nothing either way. Yet producing consistent binaries still seems
> desirable, even if the field wasn't to be used by loaders.
> 
> --- a/xen/arch/x86/arch.mk
> +++ b/xen/arch/x86/arch.mk
> @@ -113,6 +113,7 @@ efi-nr-fixups := $(shell LC_ALL=C $(OBJD
>   
>   ifeq ($(efi-nr-fixups),2)
>   MKRELOC := :
> +EFI_LDFLAGS += --disable-high-entropy-va
>   else
>   MKRELOC := arch/x86/efi/mkreloc
>   # If the linker produced fixups but not precisely two of them, we need to
> @@ -123,6 +124,8 @@ EFI_LDFLAGS += --disable-reloc-section
>   endif
>   endif
>   
> +EFI_LDFLAGS += --dynamicbase
> +
>   endif # $(XEN_BUILD_PE)
>   
>   export XEN_BUILD_EFI XEN_BUILD_PE

Seems straightforward, will rely on your knowledge of binutils that 
there are no unattended effects from the flags.

Acked-by: Daniel P. Smith 


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Date: Thu, 10 Apr 2025 15:50:31 +0100
Message-ID: 
CC: "Daniel P. Smith" , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" , Michal Orzel
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	=?utf-8?q?Roger_Pau_Monn=C3=A9?= ,
	
Subject: Re: [PATCH v3 07/16] x86/hyperlaunch: initial support for
 hyperlaunch device tree
From: Alejandro Vallejo 
To: Jan Beulich 
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On Thu Apr 10, 2025 at 11:10 AM BST, Jan Beulich wrote:
> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>> --- a/xen/arch/x86/domain-builder/core.c
>> +++ b/xen/arch/x86/domain-builder/core.c
>> @@ -44,6 +44,21 @@ void __init builder_init(struct boot_info *bi)
>>              break;
>>          }
>>      }
>> +
>> +    if ( bi->hyperlaunch_enabled )
>> +    {
>
> Not knowing what else if going to appear here and in what shape, could th=
e
> if() here be avoided by making case blocks in the earlier switch setting
> the field to false (which is kind of redundant anyway with it starting ou=
t
> false) use "return" instead of "break"? The the setting of the field to
> true could also be centralized below the switch().

Looking ahead in the patchlist, not much. There's an else clause for
non-hyperlaunch with code picked from setup.c . It could very well stay
there and prevent core.c from being included at all, removing the if
guards here as well when the file is no longer included.

>
>> --- a/xen/arch/x86/domain-builder/fdt.c
>> +++ b/xen/arch/x86/domain-builder/fdt.c
>> @@ -13,6 +13,36 @@
>> =20
>>  #include "fdt.h"
>> =20
>> +static int __init find_hyperlaunch_node(const void *fdt)
>> +{
>> +    int hv_node =3D fdt_path_offset(fdt, "/chosen/hypervisor");
>> +
>> +    if ( hv_node >=3D 0 )
>> +    {
>> +        /* Anything other than zero indicates no match */
>> +        if ( fdt_node_check_compatible(fdt, hv_node, "hypervisor,xen") =
)
>> +            return -ENODATA;
>> +        else
>> +            return hv_node;
>
> Could I talk you into omitting such unnecessary "else"?

Yes, sure.

>
>> @@ -20,7 +50,41 @@ int __init has_hyperlaunch_fdt(const struct boot_info=
 *bi)
>> =20
>>      if ( !fdt || fdt_check_header(fdt) < 0 )
>>          ret =3D -EINVAL;
>> +    else
>> +        ret =3D find_hyperlaunch_node(fdt);
>> +
>> +    bootstrap_unmap();
>> +
>> +    return ret < 0 ? ret : 0;
>> +}
>> +
>> +int __init walk_hyperlaunch_fdt(struct boot_info *bi)
>> +{
>> +    int ret =3D 0, hv_node, node;
>> +    const void *fdt =3D bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_I=
DX]);
>> +
>> +    if ( unlikely(!fdt) )
>> +        return -EINVAL;
>> +
>> +    hv_node =3D find_hyperlaunch_node(fdt);
>> +    if ( hv_node < 0 )
>> +    {
>> +        ret =3D hv_node;
>> +        goto err_out;
>> +    }
>> +
>> +    fdt_for_each_subnode(node, fdt, hv_node)
>> +    {
>> +        ret =3D fdt_node_check_compatible(fdt, node, "xen,domain");
>> +        if ( ret =3D=3D 0 )
>> +            bi->nr_domains++;
>> +    }
>> +
>> +    /* Until multi-domain construction is added, throw an error */
>> +    if ( !bi->nr_domains || bi->nr_domains > 1 )
>
> Simply "!=3D 1"?

That would be simpler, yes :)

It's all temporary until the restriction is lifted later on, but will do.

>
>> --- a/xen/arch/x86/domain-builder/fdt.h
>> +++ b/xen/arch/x86/domain-builder/fdt.h
>> @@ -11,11 +11,16 @@ struct boot_info;
>> =20
>>  #ifdef CONFIG_DOMAIN_BUILDER
>>  int has_hyperlaunch_fdt(const struct boot_info *bi);
>> +int walk_hyperlaunch_fdt(struct boot_info *bi);
>>  #else
>>  static inline int __init has_hyperlaunch_fdt(const struct boot_info *bi=
)
>>  {
>>      return -EINVAL;
>>  }
>> +static inline int __init walk_hyperlaunch_fdt(struct boot_info *bi)
>> +{
>> +    return -EINVAL;
>> +}
>
> There's no need for this stub (nor the has_hyperlaunch_fdt() one, as I
> notice only now) - even with present arrangements calling code is guarded
> such that DCE will take care of eliminating the call, and hence having a
> declaration suffices.
>
> Jan

There's some refactoring to do for other helpers later on, but sure. It
should be fine.

Cheers,
Alejandro


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Date: Thu, 10 Apr 2025 16:50:33 +0200
From: Alexander Gordeev 
To: Andrew Morton ,
        Andrey Ryabinin 
Cc: Hugh Dickins , Nicholas Piggin ,
        Guenter Roeck , Juergen Gross ,
        Jeremy Fitzhardinge , linux-kernel@vger.kernel.org,
        linux-mm@kvack.org, kasan-dev@googlegroups.com,
        sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org,
        linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org,
        stable@vger.kernel.org
Subject: Re: [PATCH v2 3/3] mm: Protect kernel pgtables in
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On Tue, Apr 08, 2025 at 06:07:32PM +0200, Alexander Gordeev wrote:

Hi Andrew,

> The lazy MMU mode can only be entered and left under the protection
> of the page table locks for all page tables which may be modified.

Heiko Carstens noticed that the above claim is not valid, since
v6.15-rc1 commit 691ee97e1a9d ("mm: fix lazy mmu docs and usage"),
which restates it to:

"In the general case, no lock is guaranteed to be held between entry and exit
of the lazy mode. So the implementation must assume preemption may be enabled"

That effectively invalidates this patch, so it needs to be dropped.

Patch 2 still could be fine, except -stable and Fixes tags and it does
not need to aim 6.15-rcX. Do you want me to repost it?

Thanks!


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First, they all start out zeroed. There's no point doing an initial
cpumask_clear() on them.

Next, only cpu_online_map may be altered post-boot, and even that only
rarely. Add respective placement attributes.

Finally, cpu_present_map really isn't anything more than an alias of
cpu_possible_map. Avoid the copying, and have the linker provide the
symbol (if needed in the first place; it is needed right now as
common code references the symbol).

Signed-off-by: Jan Beulich 
---
I would have preferred to use __attribute__((alias(...))), but that
apparently (and following the doc) can't be used when a declaration of
the to-be-provided symbol is present earlier. 

With the cpumask_clear()s dropped, the containing function's name is
now yet more out of sync with what the function does. On x86 we call a
similar thing smp_prepare_boot_cpu().

With x86 getting away without cpu_possible_map I wonder if we shouldn't
globally fold that and cpu_present_map, under whichever is deemed the
more suitable name of the two. There's little point in having new ports
adding perhaps yet more inconsistencies there.

--- a/xen/arch/arm/smpboot.c
+++ b/xen/arch/arm/smpboot.c
@@ -35,9 +35,8 @@
 #undef virt_to_mfn
 #define virt_to_mfn(va) _mfn(__virt_to_mfn(va))
 
-cpumask_t cpu_online_map;
-cpumask_t cpu_present_map;
-cpumask_t cpu_possible_map;
+cpumask_t __read_mostly cpu_online_map;
+cpumask_t __ro_after_init cpu_possible_map;
 
 struct cpuinfo_arm cpu_data[NR_CPUS];
 
@@ -111,8 +110,6 @@ static void remove_cpu_sibling_map(int c
 void __init
 smp_clear_cpu_maps (void)
 {
-    cpumask_clear(&cpu_possible_map);
-    cpumask_clear(&cpu_online_map);
     cpumask_set_cpu(0, &cpu_online_map);
     cpumask_set_cpu(0, &cpu_possible_map);
     cpu_logical_map(0) = READ_SYSREG(MPIDR_EL1) & MPIDR_HWID_MASK;
@@ -312,8 +309,6 @@ smp_prepare_cpus(void)
 {
     int rc;
 
-    cpumask_copy(&cpu_present_map, &cpu_possible_map);
-
     rc = setup_cpu_sibling_map(0);
     if ( rc )
         panic("Unable to allocate CPU sibling/core maps\n");
--- a/xen/arch/arm/xen.lds.S
+++ b/xen/arch/arm/xen.lds.S
@@ -206,6 +206,8 @@ SECTIONS
   ELF_DETAILS_SECTIONS
 }
 
+PROVIDE(cpu_present_map = cpu_possible_map);
+
 /*
  * The assembly code use _start and XEN_VIRT_START interchangeably to
  * match the context.


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From: Aleksandr Partanen 
To: qemu-devel@nongnu.org
Cc: Stefano Stabellini ,
	"Edgar E. Iglesias" ,
	xen-devel@lists.xenproject.org,
	Paul Durrant ,
	Anthony PERARD ,
	Aleksandr Partanen 
Subject: [PATCH] xen: mapcache: Fix finding matching entry
Date: Thu, 10 Apr 2025 17:46:04 +0300
Message-Id: <20250410144604.214977-1-alex.pentagrid@gmail.com>
X-Mailer: git-send-email 2.39.5
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If we have request without lock and hit unlocked or invalid
entry during the search, we remap it immediately,
even if we have matching entry in next entries in bucket.
This leads to duplication of mappings of the same size,
and to possibility of selecting the wrong element
during invalidation and underflow it's entry->lock counter

Signed-off-by: Aleksandr Partanen 
---
 hw/xen/xen-mapcache.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/hw/xen/xen-mapcache.c b/hw/xen/xen-mapcache.c
index 698b5c53ed..2c8f861fdb 100644
--- a/hw/xen/xen-mapcache.c
+++ b/hw/xen/xen-mapcache.c
@@ -376,12 +376,12 @@ tryagain:
 
     entry = &mc->entry[address_index % mc->nr_buckets];
 
-    while (entry && (lock || entry->lock) && entry->vaddr_base &&
-            (entry->paddr_index != address_index || entry->size != cache_size ||
+    while (entry && (!entry->vaddr_base ||
+            entry->paddr_index != address_index || entry->size != cache_size ||
              !test_bits(address_offset >> XC_PAGE_SHIFT,
                  test_bit_size >> XC_PAGE_SHIFT,
                  entry->valid_mapping))) {
-        if (!free_entry && !entry->lock) {
+        if (!free_entry && (!entry->lock || !entry->vaddr_base)) {
             free_entry = entry;
             free_pentry = pentry;
         }
-- 
2.39.5



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Subject: Re: [PATCH] x86/EFI: sanitize DLL characteristics in binary
To: "Daniel P. Smith" 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Marek Marczykowski ,
 "xen-devel@lists.xenproject.org" 
References: <90354241-4ebb-4d52-809c-0af788d2b860@suse.com>
 
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From: Jan Beulich 
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On 10.04.2025 16:39, Daniel P. Smith wrote:
> On 4/2/25 04:51, Jan Beulich wrote:
>> --- a/xen/arch/x86/arch.mk
>> +++ b/xen/arch/x86/arch.mk
>> @@ -113,6 +113,7 @@ efi-nr-fixups := $(shell LC_ALL=C $(OBJD
>>   
>>   ifeq ($(efi-nr-fixups),2)
>>   MKRELOC := :
>> +EFI_LDFLAGS += --disable-high-entropy-va
>>   else
>>   MKRELOC := arch/x86/efi/mkreloc
>>   # If the linker produced fixups but not precisely two of them, we need to
>> @@ -123,6 +124,8 @@ EFI_LDFLAGS += --disable-reloc-section
>>   endif
>>   endif
>>   
>> +EFI_LDFLAGS += --dynamicbase
>> +
>>   endif # $(XEN_BUILD_PE)
>>   
>>   export XEN_BUILD_EFI XEN_BUILD_PE
> 
> Seems straightforward, will rely on your knowledge of binutils that 
> there are no unattended effects from the flags.
> 
> Acked-by: Daniel P. Smith 

Thanks, but to clarify: If there's an issue here, it would be with the PE
loaders in the various EFI implementations; the binutils side is of little
concern (as to the effects of the flags).

Jan


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Subject: Re: [PATCH v3 01/16] x86/boot: introduce boot domain
To: "Daniel P. Smith" 
Cc: Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini ,
 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 xen-devel@lists.xenproject.org, Alejandro Vallejo 
References: <20250408160802.49870-1-agarciav@amd.com>
 <20250408160802.49870-2-agarciav@amd.com>
 <141229a0-2cd2-4886-b5e5-02c85b0ca5ab@suse.com>
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On 10.04.2025 15:09, Daniel P. Smith wrote:
> On 4/9/25 02:24, Jan Beulich wrote:
>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>> From: "Daniel P. Smith" 
>>>
>>> To begin moving toward allowing the hypervisor to construct more than one
>>> domain at boot, a container is needed for a domain's build information.
>>> Introduce a new header, , that contains the initial
>>> struct boot_domain that encapsulate the build information for a domain.
>>>
>>> Add a kernel and ramdisk boot module reference along with a struct domain
>>> reference to the new struct boot_domain. This allows a struct boot_domain
>>> reference to be the only parameter necessary to pass down through the domain
>>> construction call chain.
>>>
>>> Signed-off-by: Daniel P. Smith 
>>> Reviewed-by: Jason Andryuk 
>>
>> Acked-by: Jan Beulich 
> 
> I have to object because the meaningless rename is going cause 
> significant pain in the rebase of the follow-on series for no improved 
> code clarity.

Sorry, then an incremental patch undoing the rename that happened (with
appropriate justification) will need proposing - the patch here has gone
in already.

Jan


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Date: Thu, 10 Apr 2025 17:09:37 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein 
Subject: Re: [PATCH 1/3] CI: Update x86 tests from Linux 6.1.19 to 6.6.56
Message-ID: 
References: <20250410120520.2062328-1-andrew.cooper3@citrix.com>
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Date: Thu, 10 Apr 2025 17:09:37 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein 
Subject: Re: [PATCH 1/3] CI: Update x86 tests from Linux 6.1.19 to 6.6.56

On Thu, Apr 10, 2025 at 01:05:18PM +0100, Andrew Cooper wrote:
> Linux 6.6.56 was already added to test-artifacts for the argo testing, and
> this removes one moving part while cleaning things up.
>=20
> Drop the associated export job, and dockerfile.
>=20
> Signed-off-by: Andrew Cooper 

Reviewed-by: Marek Marczykowski-G=C3=B3recki 

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Feedback-ID: i1568416f:Fastmail
Date: Thu, 10 Apr 2025 17:12:11 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein 
Subject: Re: [PATCH 2/3] CI: Update ARM64 tests from Linux 6.6.74 to 6.6.86
Message-ID: 
References: <20250410120520.2062328-1-andrew.cooper3@citrix.com>
 <20250410120520.2062328-3-andrew.cooper3@citrix.com>
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Date: Thu, 10 Apr 2025 17:12:11 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein 
Subject: Re: [PATCH 2/3] CI: Update ARM64 tests from Linux 6.6.74 to 6.6.86

On Thu, Apr 10, 2025 at 01:05:19PM +0100, Andrew Cooper wrote:
> Switch over to test-artifacts.
>=20
> Drop the associated export job, and dockerfile.
>=20
> Signed-off-by: Andrew Cooper 

Reviewed-by: Marek Marczykowski-G=C3=B3recki 

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Subject: Re: [PATCH v1 03/14] xen/riscv: introduce ioremap()
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: 
 <6d91eeabe2735de93bfcf2a2420e2059a8f35e52.1744126720.git.oleksii.kurochko@gmail.com>
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On 08.04.2025 17:57, Oleksii Kurochko wrote:
> Based on RISC-V unpriviliged spec ( Version 20240411 ):
> ```
> For implementations that conform to the RISC-V Unix Platform Specification,
> I/O devices and DMA operations are required to access memory coherently and
> via strongly ordered I/O channels. Therefore, accesses to regular main memory
> regions that are concurrently accessed by external devices can also use the
> standard synchronization mechanisms. Implementations that do not conform
> to the Unix Platform Specification and/or in which devices do not access
> memory coherently will need to use mechanisms
> (which are currently platform-specific or device-specific) to enforce
> coherency.
> 
> I/O regions in the address space should be considered non-cacheable
> regions in the PMAs for those regions. Such regions can be considered coherent
> by the PMA if they are not cached by any agent.
> ```
> and [1]:
> ```
> The current riscv linux implementation requires SOC system to support
> memory coherence between all I/O devices and CPUs. But some SOC systems
> cannot maintain the coherence and they need support cache clean/invalid
> operations to synchronize data.
> 
> Current implementation is no problem with SiFive FU540, because FU540
> keeps all IO devices and DMA master devices coherence with CPU. But to a
> traditional SOC vendor, it may already have a stable non-coherency SOC
> system, the need is simply to replace the CPU with RV CPU and rebuild
> the whole system with IO-coherency is very expensive.
> ```
> 
> and the fact that all known ( to me ) CPUs that support the H-extension
> and that ones is going to be supported by Xen have memory coherency
> between all I/O devices and CPUs, so it is currently safe to use the
> PAGE_HYPERVISOR attribute.
> However, in cases where a platform does not support memory coherency, it
> should support CMO extensions and Svpbmt. In this scenario, updates to
> ioremap will be necessary.
> For now, a compilation error will be generated to ensure that the need to
> update ioremap() is not overlooked.
> 
> [1] https://patchwork.kernel.org/project/linux-riscv/patch/1555947870-23014-1-git-send-email-guoren@kernel.org/

But MMIO access correctness isn't just a matter of coherency. There may not
be any caching involved in most cases, or else you may observe significantly
delayed or even dropped (folded with later ones) writes, and reads may be
serviced from the cache instead of going to actual MMIO. Therefore ...

> --- a/xen/arch/riscv/Kconfig
> +++ b/xen/arch/riscv/Kconfig
> @@ -15,6 +15,18 @@ config ARCH_DEFCONFIG
>  	string
>  	default "arch/riscv/configs/tiny64_defconfig"
>  
> +config HAS_SVPBMT
> +	bool
> +	help
> +	  This config enables usage of Svpbmt ISA-extension ( Supervisor-mode:
> +	  page-based memory types).
> +
> +	  The memory type for a page contains a combination of attributes
> +	  that indicate the cacheability, idempotency, and ordering
> +	  properties for access to that page.
> +
> +	  The Svpbmt extension is only available on 64-bit cpus.

... I kind of expect this extension (or anything else that there might be) will need
making use of.

> @@ -548,3 +549,21 @@ void clear_fixmap(unsigned int map)
>                                FIXMAP_ADDR(map) + PAGE_SIZE) != 0 )
>          BUG();
>  }
> +
> +void *ioremap(paddr_t pa, size_t len)
> +{
> +    mfn_t mfn = _mfn(PFN_DOWN(pa));
> +    unsigned int offs = pa & (PAGE_SIZE - 1);
> +    unsigned int nr = PFN_UP(offs + len);
> +
> +#ifdef CONFIG_HAS_SVPBMT
> +    #error "an introduction of PAGE_HYPERVISOR_IOREMAP is needed for __vmap()"
> +#endif

While, as per above, I don't think this can stay, just in case: As indicated
earlier, pre-processor directives want to have the # in the first column.

Jan


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Feedback-ID: i1568416f:Fastmail
Date: Thu, 10 Apr 2025 17:14:21 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein 
Subject: Re: [PATCH 3/3] CI: Drop stale test-artifacts/alpine/3.18.dockerfile
Message-ID: 
References: <20250410120520.2062328-1-andrew.cooper3@citrix.com>
 <20250410120520.2062328-4-andrew.cooper3@citrix.com>
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Date: Thu, 10 Apr 2025 17:14:21 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein 
Subject: Re: [PATCH 3/3] CI: Drop stale test-artifacts/alpine/3.18.dockerfile

On Thu, Apr 10, 2025 at 01:05:20PM +0100, Andrew Cooper wrote:
> This should have been dropped too, as the authoritative copy lives in ano=
ther
> repo now.
>=20
> Fixes: babe11b46c1a ("CI: Drop alpine-3.18-rootfs-export and use test-art=
efacts")
> Signed-off-by: Andrew Cooper 

Reviewed-by: Marek Marczykowski-G=C3=B3recki 

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Date: Thu, 10 Apr 2025 17:18:20 +0200
From: Alexander Gordeev 
To: Andrey Ryabinin ,
        Andrew Morton 
Cc: Hugh Dickins , Nicholas Piggin ,
        Guenter Roeck , Juergen Gross ,
        Jeremy Fitzhardinge , linux-kernel@vger.kernel.org,
        linux-mm@kvack.org, kasan-dev@googlegroups.com,
        sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org,
        linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org,
        stable@vger.kernel.org
Subject: Re: [PATCH v2 1/3] kasan: Avoid sleepable page allocation from
 atomic context
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 <2d9f4ac4528701b59d511a379a60107fa608ad30.1744128123.git.agordeev@linux.ibm.com>
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On Wed, Apr 09, 2025 at 04:56:29PM +0200, Andrey Ryabinin wrote:

Hi Andrey,

...
> >>> -	page = __get_free_page(GFP_KERNEL);
> >>> +	page = __get_free_page(GFP_ATOMIC);
> >>>  	if (!page)
> >> I think a better way to fix this would be moving out allocation from atomic context. Allocate page prior
> >> to apply_to_page_range() call and pass it down to kasan_populate_vmalloc_pte().
> > I think the page address could be passed as the parameter to kasan_populate_vmalloc_pte().
> 
> We'll need to pass it as 'struct page **page' or maybe as pointer to some struct, e.g.:
> struct page_data {
>  struct page *page;
> };
...

Thanks for the hint! I will try to implement that, but will likely start
in two weeks, after I am back from vacation.

Not sure wether this version needs to be dropped.

Thanks!


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Subject: Re: [PATCH v1 04/14] xen/riscv: introduce init_IRQ()
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
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On 08.04.2025 17:57, Oleksii Kurochko wrote:
> --- a/xen/arch/riscv/include/asm/irq.h
> +++ b/xen/arch/riscv/include/asm/irq.h
> @@ -3,6 +3,28 @@
>  #define ASM__RISCV__IRQ_H
>  
>  #include 
> +#include 
> +
> +#define NR_IRQS 1024
> +
> +/*
> + * TODO: Should IRQ_TYPE_* be moved to xen/irq.h and wrapped into
> + * #ifdef CONFIG_HAS_DEVICE_TREE?
> + */

Wouldn't that be more like asm-generic/dt-irq.h (or irq-dt.h)? The field where
these values are stored is an arch-specific one, after all.

> --- /dev/null
> +++ b/xen/arch/riscv/irq.c
> @@ -0,0 +1,44 @@
> +/* SPDX-License-Identifier: GPL-2.0-or-later */
> +
> +/*
> + * RISC-V Trap handlers
> + *
> + * Copyright (c) 2024 Vates
> + */
> +
> +#include 
> +#include 
> +#include 
> +
> +static irq_desc_t irq_desc[NR_IRQS];
> +
> +int arch_init_one_irq_desc(struct irq_desc *desc)
> +{
> +    desc->arch.type = IRQ_TYPE_INVALID;
> +    return 0;
> +}
> +
> +static int __init init_irq_data(void)
> +{
> +    int irq;
> +
> +    for ( irq = 0; irq < NR_IRQS; irq++ )

For this the variable would better be of unsigned type. I realize though that ...

> +    {
> +        struct irq_desc *desc = irq_to_desc(irq);
> +        int rc = init_one_irq_desc(desc);
> +
> +        if ( rc )
> +            return rc;
> +
> +        desc->irq = irq;

... it's a plain int field that we're storing into here. I don't think I can spot
any place where a negative value would be stored into there.

Jan


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Date: Thu, 10 Apr 2025 17:35:06 +0200
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Subject: Re: [PATCH v1 05/14] xen/riscv: introduce platform_get_irq()
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Romain Caritey , xen-devel@lists.xenproject.org
References: 
 <6c6e7482cc3b0332f5724c80bf16931fe2d793ae.1744126720.git.oleksii.kurochko@gmail.com>
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On 08.04.2025 17:57, Oleksii Kurochko wrote:
> @@ -21,6 +22,22 @@ static struct intc_info __ro_after_init aplic_info = {
>      .hw_version = INTC_APLIC,
>  };
>  
> +static int aplic_irq_xlate(const uint32_t *intspec, unsigned int intsize,

As you start adding functions calling indirectly, please consider adding cf_check
right away, even if right now this has no effect on RISC-V. That'll save you from
going through the entire RISC-V subtree later on to find them all.

> +                           unsigned int *out_hwirq,
> +                           unsigned int *out_type)
> +{
> +    if ( intsize < 2 )
> +        return -EINVAL;
> +
> +    /* Mapping 1:1 */
> +    *out_hwirq = intspec[0];
> +
> +    if ( out_type )
> +        *out_type = intspec[1] & IRQ_TYPE_SENSE_MASK;
> +
> +    return 0;
> +}
> +
>  static int __init aplic_preinit(struct dt_device_node *node, const void *dat)
>  {
>      if ( aplic_info.node )
> @@ -35,6 +52,8 @@ static int __init aplic_preinit(struct dt_device_node *node, const void *dat)
>  
>      aplic_info.node = node;
>  
> +    dt_irq_xlate = aplic_irq_xlate;
> +
>      return 0;
>  }
>  
> --- a/xen/arch/riscv/include/asm/irq.h
> +++ b/xen/arch/riscv/include/asm/irq.h
> @@ -47,6 +47,9 @@ static inline void arch_move_irqs(struct vcpu *v)
>      BUG_ON("unimplemented");
>  }
>  
> +struct dt_device_node;
> +int platform_get_irq(const struct dt_device_node *device, int index);

And I assume callers of this will appear later in the series.

> --- a/xen/arch/riscv/irq.c
> +++ b/xen/arch/riscv/irq.c
> @@ -7,11 +7,52 @@
>   */
>  
>  #include 
> +#include 
> +#include 
>  #include 
>  #include 
>  
>  static irq_desc_t irq_desc[NR_IRQS];
>  
> +static bool irq_validate_new_type(unsigned int curr, unsigned int new)
> +{
> +    return (curr == IRQ_TYPE_INVALID || curr == new );
> +}
> +
> +static int irq_set_type(unsigned int irq, unsigned int type)
> +{
> +    unsigned long flags;
> +    struct irq_desc *desc = irq_to_desc(irq);
> +    int ret = -EBUSY;
> +
> +    spin_lock_irqsave(&desc->lock, flags);
> +
> +    if ( !irq_validate_new_type(desc->arch.type, type) )
> +        goto err;
> +
> +    desc->arch.type = type;
> +
> +    ret = 0;
> +
> +err:

Labels indented by at least one blank please.

> +    spin_unlock_irqrestore(&desc->lock, flags);
> +
> +    return ret;
> +}
> +
> +int platform_get_irq(const struct dt_device_node *device, int index)
> +{
> +    struct dt_irq dt_irq;
> +
> +    if ( dt_device_get_irq(device, index, &dt_irq) )
> +        return -1;
> +
> +    if ( irq_set_type(dt_irq.irq, dt_irq.type) )
> +        return -1;

Can you please return proper -E... values, perhaps ones coming back from the
functions called?

Jan


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Date: Thu, 10 Apr 2025 17:53:48 +0200
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Subject: Re: [PATCH v1 06/14] xen/riscv: riscv_of_processor_hartid()
 implementation
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
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From: Jan Beulich 
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On 08.04.2025 17:57, Oleksii Kurochko wrote:
> @@ -13,3 +16,68 @@ void __init smp_clear_cpu_maps(void)
>      cpumask_set_cpu(0, &cpu_online_map);
>      cpumask_copy(&cpu_present_map, &cpu_possible_map);
>  }
> +
> +/**
> + * of_get_cpu_hwid - Get the hardware ID from a CPU device node
> + *
> + * @cpun: CPU number(logical index) for which device node is required
> + * @thread: The local thread number to get the hardware ID for.
> + *
> + * Return: The hardware ID for the CPU node or ~0ULL if not found.
> + */
> +static uint64_t of_get_cpu_hwid(struct dt_device_node *cpun, unsigned int thread)

What does the "of" prefix stand for here? Looking at the function body I'm
really at a loss. (I was first guessing something like OpenFirmware, but
there's nothing here that would support that.)

As you're only fetching data - can cpun be pointer-to-const?

> +{
> +    const __be32 *cell;
> +    int ac;
> +    uint32_t len;
> +
> +    ac = dt_n_addr_cells(cpun);
> +    cell = dt_get_property(cpun, "reg", &len);
> +    if ( !cell || !ac || ((sizeof(*cell) * ac * (thread + 1)) > len) )
> +        return ~0ULL;

I'm sorry for my lack of DT knowledge, but what's "thread" representing here?
You only pass in 0 below, so it's unclear whether it's what one might expect
(the thread number on a multi-threaded core).

> +    cell += ac * thread;
> +    return dt_read_number(cell, ac);

Nit (you know what)

> +/*
> + * Returns the hart ID of the given device tree node, or -ENODEV if the node
> + * isn't an enabled and valid RISC-V hart node.
> + */
> +int riscv_of_processor_hartid(struct dt_device_node *node, unsigned long *hart)

Similar question as above: What's "of" and what significance does the "riscv"
prefix have in RISC-V code?

Const-ness question again for "node".

> +{
> +    const char *isa;
> +
> +    if ( !dt_device_is_compatible(node, "riscv") )
> +    {
> +        printk("Found incompatible CPU\n");
> +        return -ENODEV;
> +    }
> +
> +    *hart = (unsigned long) of_get_cpu_hwid(node, 0);
> +    if ( *hart == ~0UL )

While for RV64 this won't matter, the difference in types (uint64_t returned,
unsigned long used) is still puzzling me. What's the deal?

Jan


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On 10/04/2025 4:56 pm, Anthony PERARD wrote:
> We need the full path to a shell in `/etc/passwd`, otherwise `su user`
> doesn't work.
>
>     $ su user
>     su: can't execute 'bash': No such file or directory
>
> Signed-off-by: Anthony PERARD 

Acked-by: Andrew Cooper 

Would you like me to pick this up?

> ---
>
> Although, I don't know when this shell is been used, it seems that we
> get /bin/sh unless we start the container explicitly with `bash`, like
> containerize is doing.

I'm not sure why the x86 side is like that, but I didn't want to change
it gratuitously...

~Andrew


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Date: Thu, 10 Apr 2025 18:02:22 +0200
MIME-Version: 1.0
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Subject: Re: [PATCH v1 07/14] xen/riscv: Introduce intc_hw_operations
 abstraction
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Romain Caritey , xen-devel@lists.xenproject.org
References: 
 <139b37478b4ca7e2ec3a04b73f462197227f57fa.1744126720.git.oleksii.kurochko@gmail.com>
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In-Reply-To: <139b37478b4ca7e2ec3a04b73f462197227f57fa.1744126720.git.oleksii.kurochko@gmail.com>
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On 08.04.2025 17:57, Oleksii Kurochko wrote:
> --- a/xen/arch/riscv/include/asm/intc.h
> +++ b/xen/arch/riscv/include/asm/intc.h
> @@ -17,6 +17,29 @@ struct intc_info {
>      const struct dt_device_node *node;
>  };
>  
> +struct intc_hw_operations {
> +    /* Hold intc hw information */
> +    const struct intc_info *info;
> +    /* Initialize the intc and the boot CPU */
> +    int (*init)(void);
> +
> +    /* hw_irq_controller to enable/disable/eoi host irq */
> +    hw_irq_controller *host_irq_type;

Pointer-to-const perhaps?

> +    /* Set IRQ type */
> +    void (*set_irq_type)(struct irq_desc *desc, unsigned int type);
> +    /* Set IRQ priority */
> +    void (*set_irq_priority)(struct irq_desc *desc, unsigned int priority);
> +
> +};
> +
>  void intc_preinit(void);
>  
> +void intc_init(void);
> +
> +void register_intc_ops(const struct intc_hw_operations *ops);
> +
> +struct irq_desc;

If it's needed here at all, it needs to move up, as some of the hook pointers
already use the type.

> --- a/xen/arch/riscv/intc.c
> +++ b/xen/arch/riscv/intc.c
> @@ -1,9 +1,21 @@
>  /* SPDX-License-Identifier: GPL-2.0-only */
>  
>  #include 
> +#include 
>  #include 
>  #include 
> +#include 
>  #include 
> +#include 
> +
> +#include 
> +
> +static const struct intc_hw_operations *intc_hw_ops;

__ro_after_init perhaps?

> +
> +void register_intc_ops(const struct intc_hw_operations *ops)

__init perhaps?

> +{
> +    intc_hw_ops = ops;
> +}
>  
>  void __init intc_preinit(void)
>  {
> @@ -12,3 +24,42 @@ void __init intc_preinit(void)
>      else
>          panic("ACPI interrupt controller preinit() isn't implemented\n");
>  }
> +
> +void __init intc_init(void)
> +{
> +    ASSERT(intc_hw_ops);
> +
> +    if ( intc_hw_ops->init() )
> +        panic("Failed to initialize the interrupt controller drivers\n");
> +}
> +
> +/* desc->irq needs to be disabled before calling this function */
> +static void intc_set_irq_type(struct irq_desc *desc, unsigned int type)
> +{
> +    ASSERT(test_bit(_IRQ_DISABLED, &desc->status));
> +    ASSERT(spin_is_locked(&desc->lock));
> +    ASSERT(type != IRQ_TYPE_INVALID);
> +    ASSERT(intc_hw_ops && intc_hw_ops->set_irq_type);
> +
> +    intc_hw_ops->set_irq_type(desc, type);
> +}
> +
> +static void intc_set_irq_priority(struct irq_desc *desc, unsigned int priority)
> +{
> +    ASSERT(intc_hw_ops && intc_hw_ops->set_irq_priority);
> +
> +    intc_hw_ops->set_irq_priority(desc, priority);
> +}
> +
> +void intc_route_irq_to_xen(struct irq_desc *desc, unsigned int priority)
> +{
> +    ASSERT(test_bit(_IRQ_DISABLED, &desc->status));
> +    ASSERT(spin_is_locked(&desc->lock));
> +    /* Can't route interrupts that don't exist */
> +    ASSERT(intc_hw_ops && desc->irq < intc_hw_ops->info->nr_irqs);
> +
> +    desc->handler = intc_hw_ops->host_irq_type;
> +
> +    intc_set_irq_type(desc, desc->arch.type);
> +    intc_set_irq_priority(desc, priority);

If these are going to remain the sole callers of the two functions, I'd question
the need for the separate functions. Some of the assertions done there would then
actually be redundant.

If not, is there a reason intc_set_irq_priority() doesn't have a lock-held check?

Jan


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Date: Thu, 10 Apr 2025 18:07:49 +0200
From: Alexander Gordeev 
To: Ryan Roberts 
Cc: Andrew Morton ,
        "David S. Miller" ,
        Andreas Larsson , Juergen Gross ,
        Boris Ostrovsky ,
        Thomas Gleixner , Ingo Molnar ,
        Borislav Petkov ,
        Dave Hansen ,
        "H. Peter Anvin" ,
        "Matthew Wilcox (Oracle)" ,
        Catalin Marinas , linux-mm@kvack.org,
        sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 0/5] Fix lazy mmu mode
Message-ID: <912c7a32-b39c-494f-a29c-4865cd92aeba@agordeev.local>
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On Mon, Mar 03, 2025 at 02:15:34PM +0000, Ryan Roberts wrote:

Hi Ryan,

> I'm planning to implement lazy mmu mode for arm64 to optimize vmalloc. As part
> of that, I will extend lazy mmu mode to cover kernel mappings in vmalloc table
> walkers. While lazy mmu mode is already used for kernel mappings in a few
> places, this will extend it's use significantly.
> 
> Having reviewed the existing lazy mmu implementations in powerpc, sparc and x86,
> it looks like there are a bunch of bugs, some of which may be more likely to
> trigger once I extend the use of lazy mmu.

Do you have any idea about generic code issues as result of not adhering to
the originally stated requirement:

  /*
   ...
   * the PTE updates which happen during this window.  Note that using this
   * interface requires that read hazards be removed from the code.  A read
   * hazard could result in the direct mode hypervisor case, since the actual
   * write to the page tables may not yet have taken place, so reads though
   * a raw PTE pointer after it has been modified are not guaranteed to be
   * up to date.
   ...
   */

I tried to follow few code paths and at least this one does not look so good:

copy_pte_range(..., src_pte, ...)
	ret = copy_nonpresent_pte(..., src_pte, ...)
		try_restore_exclusive_pte(..., src_pte, ...)	// is_device_exclusive_entry(entry)
			restore_exclusive_pte(..., ptep, ...)
				set_pte_at(..., ptep, ...)
					set_pte(ptep, pte);	// save in lazy mmu mode

	// ret == -ENOENT

	ptent = ptep_get(src_pte);				// lazy mmu save is not observed
	ret = copy_present_ptes(..., ptent, ...);		// wrong ptent used

I am not aware whether the effort to "read hazards be removed from the code"
has ever been made and the generic code is safe in this regard.

What is your take on this?

Thanks!


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On 2025-04-09 06:33, Alejandro Vallejo wrote:
> On Wed Apr 9, 2025 at 7:34 AM BST, Jan Beulich wrote:
>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>> @@ -1010,15 +1010,15 @@ static struct domain *__init create_dom0(struct boot_info *bi)
>>>           dom0_cfg.flags |= XEN_DOMCTL_CDF_iommu;
>>>   
>>>       /* Create initial domain.  Not d0 for pvshim. */
>>> -    domid = get_initial_domain_id();
>>> -    d = domain_create(domid, &dom0_cfg, pv_shim ? 0 : CDF_privileged);
>>> +    bd->domid = get_initial_domain_id();
>>> +    d = domain_create(bd->domid, &dom0_cfg, pv_shim ? 0 : CDF_privileged);
>>>       if ( IS_ERR(d) )
>>> -        panic("Error creating d%u: %ld\n", domid, PTR_ERR(d));
>>> +        panic("Error creating d%u: %ld\n", bd->domid, PTR_ERR(d));
>>>   
>>>       init_dom0_cpuid_policy(d);
>>>   
>>>       if ( alloc_dom0_vcpu0(d) == NULL )
>>> -        panic("Error creating d%uv0\n", domid);
>>> +        panic("Error creating %pd vcpu 0\n", d);
>>
>> And why exactly is this not %pdv0?
> 
> Likely to avoid what looks like a highly cryptic format specifier. But I
> agree your option seems nicer.

Hi, Jan.  Sorry, I made this change.  In earlier feedback you wrote:

 > That said, since vsprintf.c:print_vcpu() calls print_domain(), using
 > %pd is certainly an option here (inconsistencies would arise if %pv
 > and %pd presented domain IDs in [perhaps just slightly] different
 > ways).

I took that to mean you thought "faking" %pv is undesirable, so I just 
wrote in in a different form to avoid the potential inconsistency.  I'm 
fine with %pdv0.

>> Acked-by: Jan Beulich 

Thanks,
Jason


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Subject: Re: [PATCH TEST-ARTEFACTS] Fix adduser --shell path
To: Anthony PERARD 
Cc: xen-devel@lists.xenproject.org, =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Stefano Stabellini ,
 Michal Orzel ,
 =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= 
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On 10/04/2025 5:38 pm, Anthony PERARD wrote:
> On Thu, Apr 10, 2025 at 04:58:59PM +0100, Andrew Cooper wrote:
>> On 10/04/2025 4:56 pm, Anthony PERARD wrote:
>>> We need the full path to a shell in `/etc/passwd`, otherwise `su user`
>>> doesn't work.
>>>
>>>     $ su user
>>>     su: can't execute 'bash': No such file or directory
>>>
>>> Signed-off-by: Anthony PERARD 
>> Acked-by: Andrew Cooper 
>>
>> Would you like me to pick this up?
> Yes, that would be nice. I saw you've got more change coming to the
> dockerfiles, like actually adding `diffutils` to the x86 build
> container source file.

Indeed.

> And by the way, you might want to add `gawk` as
> well to replace busybox's awk, to make the linux build a bit more happy,
> even if it doesn't seems to be an issue right now.

That awk complaint appears to go away with find/diffutils in the
container.  I've not figured out exactly why yet.

~Andrew


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Date: Thu, 10 Apr 2025 19:18:29 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Anthony PERARD ,
	xen-devel@lists.xenproject.org,
	Roger Pau =?utf-8?B?TW9ubsOp?= ,
	Stefano Stabellini ,
	Michal Orzel 
Subject: Re: [PATCH TEST-ARTEFACTS] Fix adduser --shell path
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References: <20250410155531.29570-1-anthony.perard@vates.tech>
 <6046d30b-b5ca-4867-9f24-831b469d1ee3@citrix.com>
 
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Date: Thu, 10 Apr 2025 19:18:29 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Anthony PERARD ,
	xen-devel@lists.xenproject.org,
	Roger Pau =?utf-8?B?TW9ubsOp?= ,
	Stefano Stabellini ,
	Michal Orzel 
Subject: Re: [PATCH TEST-ARTEFACTS] Fix adduser --shell path

On Thu, Apr 10, 2025 at 05:57:23PM +0100, Andrew Cooper wrote:
> On 10/04/2025 5:38 pm, Anthony PERARD wrote:
> > And by the way, you might want to add `gawk` as
> > well to replace busybox's awk, to make the linux build a bit more happy,
> > even if it doesn't seems to be an issue right now.
>=20
> That awk complaint appears to go away with find/diffutils in the
> container.=C2=A0 I've not figured out exactly why yet.

See my earlier email, I've seen it still there at least in one job.

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Date: Thu, 10 Apr 2025 19:20:41 +0100
Message-ID: 
From: Alejandro Vallejo 
To: Andrew Cooper , Jason Andryuk
	, Xen-devel 
CC: =?utf-8?q?Roger_Pau_Monn=C3=A9?= , "Stefano
 Stabellini" , Michal Orzel ,
	=?utf-8?q?Marek_Marczykowski-G=C3=B3recki?=
	, Anthony PERARD
	, Juergen Gross , Xen-devel
	
Subject: Re: [PATCH TEST-ARTEFACTS 0/8] Cleanup and Linux ARM64 support
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On Thu Apr 10, 2025 at 10:17 AM BST, Andrew Cooper wrote:
> On 10/04/2025 1:09 am, Jason Andryuk wrote:
>> On 2025-04-09 13:01, Andrew Cooper wrote:
>>> On 09/04/2025 5:36 pm, Andrew Cooper wrote:
>>>> Various bits of cleanup, and support for arm64 Linux builds.
>>>>
>>>> Run using the new Linux 6.6.86 on (most) x86, and ARM64:
>>>> =C2=A0=C2=A0
>>>> https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/176066=
7411
>>>
>>> Lovely, Linux 6.6.86 is broken for x86 PVH.=C2=A0 It triple faults very
>>> early on.
>>>
>>> Sample log:
>>> https://gitlab.com/xen-project/hardware/xen-staging/-/jobs/9673797450
>>>
>>> I guess we'll have to stay on 6.6.56 for now.=C2=A0 (Only affects the f=
inal
>>> patch.)
>>
>> This is an AMD system:
>>
>> (XEN) [=C2=A0=C2=A0=C2=A0 2.577549] d0v0 Triple fault - invoking HVM shu=
tdown action 1
>> (XEN) [=C2=A0=C2=A0=C2=A0 2.577557] RIP:=C2=A0=C2=A0=C2=A0 0008:[<000000=
0001f851d4>]
>>
>> The instruction:
>> ffffffff81f851d4:=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 0f 01 c1=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0 vmcall
>>
>> vmcall is the Intel instruction, and vmmcall is the AMD one, so CPU
>> detection is malfunctioning.
>>
>> (Early PVH is running identity mapped, so it's offset from
>> ffffffff80000000)
>>
>> There are no debug symbols in the vmlinux I extracted from the bzImage
>> from gitlab, but I can repro locally with on 6.6.86.=C2=A0 It's unclear =
to
>> me why it's failing.
>>
>> Trying:
>> diff --git i/arch/x86/xen/enlighten.c w/arch/x86/xen/enlighten.c
>> index 0219f1c90202..fb4ad7fe3e34 100644
>> --- i/arch/x86/xen/enlighten.c
>> +++ w/arch/x86/xen/enlighten.c
>> @@ -123,11 +123,10 @@ noinstr void *__xen_hypercall_setfunc(void)
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (!boot_cpu_has(X86_FEATURE=
_CPUID))
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0 xen_get_vendor();
>>
>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if ((boot_cpu_data.x86_vendor =3D=
=3D X86_VENDOR_AMD ||
>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 boot=
_cpu_data.x86_vendor =3D=3D X86_VENDOR_HYGON))
>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0 func =3D xen_hypercall_amd;
>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 else
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (boot_cpu_data.x86_vendor =3D=
=3D X86_VENDOR_INTEL )
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0 func =3D xen_hypercall_intel;
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 else
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0 func =3D xen_hypercall_amd;
>>
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 static_call_update_early(xen_=
hypercall, func);
>>
>> But it still calls xen_hypercall_intel().=C2=A0 So maybe x86_vendor isn'=
t
>> getting set and ends up as 0 (X86_VENDOR_INTEL)?
>>
>> That's as far as I got here.
>>
>> Different but related, on mainline master, I also get a fail in
>> vmcall. There, I see in the disassembly that
>> __xen_hypercall_setfunc()'s calls to xen_get_vendor() is gone.=C2=A0
>> xen_get_vendor() seems to have been DCE-ed.=C2=A0 There is some new code
>> that hardcodes features - "x86/cpufeatures: Add {REQUIRED,DISABLED}
>> feature configs" - which may be responsible.
>
> 6.6.74 is broken too.=C2=A0 (That's the revision that the ARM tests want)=
.=C2=A0
> So it broke somewhere between .56 and .74 which narrows the bisect a litt=
le.
>
> https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/176132377=
4
>
> In Gitlab, both AMD and Intel are failing in roughly the same way.
>
> ~Andrew

I've bisected the tags and it was was introduced somewhere between the
v6.6.66 and the v6.6.67 tags.

The hypercall page was removed very shortly before v6.6.67 was tagged,
so I have a nagging suspicion...

Cheers,
Alejandro


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Date: Thu, 10 Apr 2025 19:28:06 +0100
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CC: =?utf-8?q?Roger_Pau_Monn=C3=A9?= , "Stefano
 Stabellini" , Michal Orzel ,
	=?utf-8?q?Marek_Marczykowski-G=C3=B3recki?=
	, Anthony PERARD
	, Juergen Gross , Xen-devel
	
Subject: Re: [PATCH TEST-ARTEFACTS 0/8] Cleanup and Linux ARM64 support
From: Alejandro Vallejo 
To: Alejandro Vallejo , Andrew Cooper
	, Jason Andryuk , Xen-devel
	
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On Thu Apr 10, 2025 at 7:20 PM BST, Alejandro Vallejo wrote:
> On Thu Apr 10, 2025 at 10:17 AM BST, Andrew Cooper wrote:
>> On 10/04/2025 1:09 am, Jason Andryuk wrote:
>>> On 2025-04-09 13:01, Andrew Cooper wrote:
>>>> On 09/04/2025 5:36 pm, Andrew Cooper wrote:
>>>>> Various bits of cleanup, and support for arm64 Linux builds.
>>>>>
>>>>> Run using the new Linux 6.6.86 on (most) x86, and ARM64:
>>>>> =C2=A0=C2=A0
>>>>> https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/17606=
67411
>>>>
>>>> Lovely, Linux 6.6.86 is broken for x86 PVH.=C2=A0 It triple faults ver=
y
>>>> early on.
>>>>
>>>> Sample log:
>>>> https://gitlab.com/xen-project/hardware/xen-staging/-/jobs/9673797450
>>>>
>>>> I guess we'll have to stay on 6.6.56 for now.=C2=A0 (Only affects the =
final
>>>> patch.)
>>>
>>> This is an AMD system:
>>>
>>> (XEN) [=C2=A0=C2=A0=C2=A0 2.577549] d0v0 Triple fault - invoking HVM sh=
utdown action 1
>>> (XEN) [=C2=A0=C2=A0=C2=A0 2.577557] RIP:=C2=A0=C2=A0=C2=A0 0008:[<00000=
00001f851d4>]
>>>
>>> The instruction:
>>> ffffffff81f851d4:=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 0f 01 c1=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0 vmcall
>>>
>>> vmcall is the Intel instruction, and vmmcall is the AMD one, so CPU
>>> detection is malfunctioning.
>>>
>>> (Early PVH is running identity mapped, so it's offset from
>>> ffffffff80000000)
>>>
>>> There are no debug symbols in the vmlinux I extracted from the bzImage
>>> from gitlab, but I can repro locally with on 6.6.86.=C2=A0 It's unclear=
 to
>>> me why it's failing.
>>>
>>> Trying:
>>> diff --git i/arch/x86/xen/enlighten.c w/arch/x86/xen/enlighten.c
>>> index 0219f1c90202..fb4ad7fe3e34 100644
>>> --- i/arch/x86/xen/enlighten.c
>>> +++ w/arch/x86/xen/enlighten.c
>>> @@ -123,11 +123,10 @@ noinstr void *__xen_hypercall_setfunc(void)
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (!boot_cpu_has(X86_FEATUR=
E_CPUID))
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0 xen_get_vendor();
>>>
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if ((boot_cpu_data.x86_vendor =3D=
=3D X86_VENDOR_AMD ||
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 boo=
t_cpu_data.x86_vendor =3D=3D X86_VENDOR_HYGON))
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0 func =3D xen_hypercall_amd;
>>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 else
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (boot_cpu_data.x86_vendor =3D=
=3D X86_VENDOR_INTEL )
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0 func =3D xen_hypercall_intel;
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 else
>>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0 func =3D xen_hypercall_amd;
>>>
>>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 static_call_update_early(xen=
_hypercall, func);
>>>
>>> But it still calls xen_hypercall_intel().=C2=A0 So maybe x86_vendor isn=
't
>>> getting set and ends up as 0 (X86_VENDOR_INTEL)?
>>>
>>> That's as far as I got here.
>>>
>>> Different but related, on mainline master, I also get a fail in
>>> vmcall. There, I see in the disassembly that
>>> __xen_hypercall_setfunc()'s calls to xen_get_vendor() is gone.=C2=A0
>>> xen_get_vendor() seems to have been DCE-ed.=C2=A0 There is some new cod=
e
>>> that hardcodes features - "x86/cpufeatures: Add {REQUIRED,DISABLED}
>>> feature configs" - which may be responsible.
>>
>> 6.6.74 is broken too.=C2=A0 (That's the revision that the ARM tests want=
).=C2=A0
>> So it broke somewhere between .56 and .74 which narrows the bisect a lit=
tle.
>>
>> https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/17613237=
74
>>
>> In Gitlab, both AMD and Intel are failing in roughly the same way.
>>
>> ~Andrew
>
> I've bisected the tags and it was was introduced somewhere between the
> v6.6.66 and the v6.6.67 tags.
>
> The hypercall page was removed very shortly before v6.6.67 was tagged,
> so I have a nagging suspicion...
>
> Cheers,
> Alejandro

The cutoff point is bcf0e2fda80c6("x86/xen: remove hypercall page").

Together with Jason's observation it would seem that Linux doesn't guess
the correct instruction (or not early enough) when running as PVH dom0.
On PV it's just "syscall", but on PVH it's a tad more complicated.

Cheers,
Alejandro


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Subject: Re: [PATCH TEST-ARTEFACTS] Fix adduser --shell path
To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 
Cc: Anthony PERARD ,
 xen-devel@lists.xenproject.org, =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Stefano Stabellini ,
 Michal Orzel 
References: <20250410155531.29570-1-anthony.perard@vates.tech>
 <6046d30b-b5ca-4867-9f24-831b469d1ee3@citrix.com> 
 <718ee844-64b6-4146-a0fd-0ff7042ce737@citrix.com> 
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On 10/04/2025 6:18 pm, Marek Marczykowski-Górecki wrote:
> On Thu, Apr 10, 2025 at 05:57:23PM +0100, Andrew Cooper wrote:
>> On 10/04/2025 5:38 pm, Anthony PERARD wrote:
>>> And by the way, you might want to add `gawk` as
>>> well to replace busybox's awk, to make the linux build a bit more happy,
>>> even if it doesn't seems to be an issue right now.
>> That awk complaint appears to go away with find/diffutils in the
>> container.  I've not figured out exactly why yet.
> See my earlier email, I've seen it still there at least in one job.
>

I've found it again.

+ make modules_prepare
  SYNC    include/config/auto.conf
  GEN     arch/x86/include/generated/asm/orc_hash.h
awk: bad regex '^struct orc_entry {$': Invalid contents of {}
  SYSHDR  arch/x86/include/generated/uapi/asm/unistd_32.h

It's specific to modules_prepare, so only shows up when building argo.

~Andrew


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Subject: [PATCH] x86/xen: Fix __xen_hypercall_setfunc
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Hypercall detection is failing with xen_hypercall_intel() chosen even on
an AMD processor.  Looking at the disassembly, the call to
xen_get_vendor() was removed.

The check for boot_cpu_has(X86_FEATURE_CPUID) was used as a proxy for
the x86_vendor having been set.  When
CONFIG_X86_REQUIRED_FEATURE_CPUID=y (the default value), DCE eliminates
the call to xen_get_vendor().  An uninitialized value 0 means
X86_VENDOR_INTEL, so the Intel function is always returned.

Remove the if and always call xen_get_vendor() to avoid this issue.

Fixes: 3d37d9396eb3 ("x86/cpufeatures: Add {REQUIRED,DISABLED} feature configs")
Suggested-by: Juergen Gross 
Signed-off-by: Jason Andryuk 
---
I think the Fixes is correct in that it default enables requiring the
feature.  There were a lot of other changes to how headers were
generated as well.
---
 arch/x86/xen/enlighten.c | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index 43dcd8c7badc..6a5cae915eb1 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -100,10 +100,6 @@ noinstr void *__xen_hypercall_setfunc(void)
 	void (*func)(void);
 
 	/*
-	 * Xen is supported only on CPUs with CPUID, so testing for
-	 * X86_FEATURE_CPUID is a test for early_cpu_init() having been
-	 * run.
-	 *
 	 * Note that __xen_hypercall_setfunc() is noinstr only due to a nasty
 	 * dependency chain: it is being called via the xen_hypercall static
 	 * call when running as a PVH or HVM guest. Hypercalls need to be
@@ -115,8 +111,7 @@ noinstr void *__xen_hypercall_setfunc(void)
 	 */
 	instrumentation_begin();
 
-	if (!boot_cpu_has(X86_FEATURE_CPUID))
-		xen_get_vendor();
+	xen_get_vendor();
 
 	if ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD ||
 	     boot_cpu_data.x86_vendor == X86_VENDOR_HYGON))
-- 
2.34.1



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From: Nicola Vetrini 
To: xen-devel@lists.xenproject.org
Cc: sstabellini@kernel.org,
	michal.orzel@amd.com,
	xenia.ragiadakou@amd.com,
	ayan.kumar.halder@amd.com,
	consulting@bugseng.com,
	Nicola Vetrini ,
	Doug Goldstein ,
	Andrew Cooper 
Subject: [XEN PATCH] automation/eclair: Remove bespoke service B.UNEVALEFF
Date: Thu, 10 Apr 2025 21:32:14 +0200
Message-ID: 
X-Mailer: git-send-email 2.43.0
MIME-Version: 1.0
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The service is now part of the updated ECLAIR runner, therefore
redefining will result in an error.

No functional change.

Signed-off-by: Nicola Vetrini 
---

To be applied after updating the ECLAIR runners
---
 automation/eclair_analysis/ECLAIR/B.UNEVALEFF.ecl | 10 ----------
 automation/eclair_analysis/ECLAIR/analysis.ecl    |  1 -
 2 files changed, 11 deletions(-)
 delete mode 100644 automation/eclair_analysis/ECLAIR/B.UNEVALEFF.ecl

diff --git a/automation/eclair_analysis/ECLAIR/B.UNEVALEFF.ecl b/automation/eclair_analysis/ECLAIR/B.UNEVALEFF.ecl
deleted file mode 100644
index fa249b8e3625..000000000000
--- a/automation/eclair_analysis/ECLAIR/B.UNEVALEFF.ecl
+++ /dev/null
@@ -1,10 +0,0 @@
--clone_service=MC3A2.R13.6,B.UNEVALEFF
-
--config=B.UNEVALEFF,summary="The operand of the `alignof' and `typeof'  operators shall not contain any expression which has potential side effects"
--config=B.UNEVALEFF,stmt_child_matcher=
-{"stmt(node(utrait_expr)&&operator(alignof))", expr, 0, "stmt(any())", {}},
-{"stmt(node(utrait_type)&&operator(alignof))", type, 0, "stmt(any())", {}},
-{"stmt(node(utrait_expr)&&operator(preferred_alignof))", expr, 0, "stmt(any())", {}},
-{"stmt(node(utrait_type)&&operator(preferred_alignof))", type, 0, "stmt(any())", {}},
-{"type(node(typeof_expr))", expr, 0, "stmt(any())", {}},
-{"type(node(typeof_type))", type, 0, "stmt(any())", {}}
diff --git a/automation/eclair_analysis/ECLAIR/analysis.ecl b/automation/eclair_analysis/ECLAIR/analysis.ecl
index 29409a9af0eb..399099938f45 100644
--- a/automation/eclair_analysis/ECLAIR/analysis.ecl
+++ b/automation/eclair_analysis/ECLAIR/analysis.ecl
@@ -50,7 +50,6 @@ their Standard Library equivalents."
 -eval_file=adopted.ecl
 -eval_file=out_of_scope.ecl
 
--eval_file=B.UNEVALEFF.ecl
 -eval_file=deviations.ecl
 -eval_file=call_properties.ecl
 -eval_file=tagging.ecl
-- 
2.43.0



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From: Jason Andryuk 
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CC: , ,
	, ,
	, , ,
	
Subject: [RFC PATCH] x86/xen: Fix PVH dom0 xen_hypercall detection
Date: Thu, 10 Apr 2025 15:50:12 -0400
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A Xen PVH dom0 on an AMD processor triple faults early in boot on
6.6.86.  CPU detection appears to fail, as the faulting instruction is
vmcall in xen_hypercall_intel() and not vmmcall in xen_hypercall_amd().

Detection fails because __xen_hypercall_setfunc() returns the full
kernel mapped address of xen_hypercall_amd() or xen_hypercall_intel() -
e.g. 0xffffffff815b93f0.  But this is compared against the rip-relative
xen_hypercall_amd(%rip), which when running from identity mapping, is
only 0x015b93f0.

Replace the rip-relative address with just loading the actual address to
restore the proper comparision.

This only seems to affect PVH dom0 boot.  This is probably because the
XENMEM_memory_map hypercall is issued early on from the identity
mappings.  With a domU, the memory map is provided via hvm_start_info
and the hypercall is skipped.  The domU is probably running from the
kernel high mapping when it issues hypercalls.

Signed-off-by: Jason Andryuk 
---
I think this sort of address mismatch would be addresed by
e8fbc0d9cab6 ("x86/pvh: Call C code via the kernel virtual mapping")

That could be backported instead, but it depends on a fair number of
patches.

Not sure on how getting a patch just into 6.6 would work.  This patch
could go into upstream Linux though it's not strictly necessary when the
rip-relative address is a high address.
---
 arch/x86/xen/xen-head.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/xen/xen-head.S b/arch/x86/xen/xen-head.S
index 059f343da76d..71a0eda2da60 100644
--- a/arch/x86/xen/xen-head.S
+++ b/arch/x86/xen/xen-head.S
@@ -117,7 +117,7 @@ SYM_FUNC_START(xen_hypercall_hvm)
 	pop %ebx
 	pop %eax
 #else
-	lea xen_hypercall_amd(%rip), %rcx
+	mov $xen_hypercall_amd, %rcx
 	cmp %rax, %rcx
 #ifdef CONFIG_FRAME_POINTER
 	pop %rax	/* Dummy pop. */
-- 
2.49.0



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Date: Thu, 10 Apr 2025 21:08:20 +0100
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [XEN PATCH] automation/eclair: Remove bespoke service B.UNEVALEFF
To: Nicola Vetrini ,
 xen-devel@lists.xenproject.org
Cc: sstabellini@kernel.org, michal.orzel@amd.com, xenia.ragiadakou@amd.com,
 ayan.kumar.halder@amd.com, consulting@bugseng.com,
 Doug Goldstein 
References: 
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On 10/04/2025 8:32 pm, Nicola Vetrini wrote:
> The service is now part of the updated ECLAIR runner, therefore
> redefining will result in an error.
>
> No functional change.
>
> Signed-off-by: Nicola Vetrini 

Acked-by: Andrew Cooper 

Presumably this will be needed on all branches using Eclair ?

~Andrew


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MIME-Version: 1.0
Date: Thu, 10 Apr 2025 22:17:50 +0200
From: Nicola Vetrini 
To: Andrew Cooper 
Cc: xen-devel@lists.xenproject.org, sstabellini@kernel.org,
 michal.orzel@amd.com, xenia.ragiadakou@amd.com, ayan.kumar.halder@amd.com,
 consulting@bugseng.com, Doug Goldstein 
Subject: Re: [XEN PATCH] automation/eclair: Remove bespoke service B.UNEVALEFF
In-Reply-To: 
References: 
 
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On 2025-04-10 22:08, Andrew Cooper wrote:
> On 10/04/2025 8:32 pm, Nicola Vetrini wrote:
>> The service is now part of the updated ECLAIR runner, therefore
>> redefining will result in an error.
>> 
>> No functional change.
>> 
>> Signed-off-by: Nicola Vetrini 
> 
> Acked-by: Andrew Cooper 
> 
> Presumably this will be needed on all branches using Eclair ?
> 

Tes, that would allow to reuse the latest runner on those branches, 
which is probably the best course of action. Since they get 
(presumably?) less activity than staging, that might be held off until 
then, before any other backports.

I'm still waiting for the container image to finish copying to the other 
runner though, so you might experience some short-term breakage.

> ~Andrew

-- 
Nicola Vetrini, B.Sc.
Software Engineer
BUGSENG (https://bugseng.com)
LinkedIn: https://www.linkedin.com/in/nicola-vetrini-a42471253


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Subject: Re: [XEN PATCH] automation/eclair: Remove bespoke service B.UNEVALEFF
To: Nicola Vetrini 
Cc: xen-devel@lists.xenproject.org, sstabellini@kernel.org,
 michal.orzel@amd.com, xenia.ragiadakou@amd.com, ayan.kumar.halder@amd.com,
 consulting@bugseng.com, Doug Goldstein 
References: 
 
 
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On 10/04/2025 9:17 pm, Nicola Vetrini wrote:
> On 2025-04-10 22:08, Andrew Cooper wrote:
>> On 10/04/2025 8:32 pm, Nicola Vetrini wrote:
>>> The service is now part of the updated ECLAIR runner, therefore
>>> redefining will result in an error.
>>>
>>> No functional change.
>>>
>>> Signed-off-by: Nicola Vetrini 
>>
>> Acked-by: Andrew Cooper 
>>
>> Presumably this will be needed on all branches using Eclair ?
>>
>
> Tes, that would allow to reuse the latest runner on those branches,
> which is probably the best course of action. Since they get
> (presumably?) less activity than staging, that might be held off until
> then, before any other backports.

Well, I'm doing backports for other reasons, so I'll include this.

~Andrew


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Subject: Re: [RFC] xen/x86: allow overlaps with non-RAM regions
To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , "Stefano
 Stabellini" 
CC: , Andrew Cooper
	, Jan Beulich ,
	, , "Lira, Victor
 M" 
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On 2025-04-04 06:28, Roger Pau Monné wrote:
> On Thu, Apr 03, 2025 at 06:01:42PM -0700, Stefano Stabellini wrote:
>> On one Sapphire AMD x86 board, I see this:
>>
>>
>> (XEN) [0000003943ca6ff2]  [00000000f0000000, 00000000f7ffffff] (reserved)
>> (XEN) [00000039460886d9]  [00000000fd000000, 00000000ffffffff] (reserved)
>> [...]
>> (XEN) [    4.612235] 0000:02:00.0: not mapping BAR [fea00, fea03] invalid position
>>
>>
>> Linux boots fine on this platform but Linux as Dom0 on Xen does not.
>> This is because the pci_check_bar->is_memory_hole check fails due to the
>> MMIO region overlapping with the EFI reserved region.
> 
> That's weird.  (Partially) the reason to not attempt to map such BAR
> is that it should already be mapped, because at dom0 creation time all
> reserved regions are added to the p2m (see arch_iommu_hwdom_init()).
> If that's not the case we should figure out why this reserved region
> is not added to dom0 p2m as part of arch_iommu_hwdom_init().

Victor discovered these regions are type 11 EfiMemoryMappedIO, but they 
get converted to e820 RESERVED.  The BAR points into it.

00000f0000000-00000f7ffffff type=11 attr=800000000000100d
00000fd000000-00000fedfffff type=11 attr=800000000000100d
00000fee00000-00000fee00fff type=11 attr=8000000000000001
00000fee01000-00000ffffffff type=11 attr=800000000000100d

Xenia discovered Linux keeps small regions like this reserved, but lets 
larger ones (>= 256kb) become holes.  See the comment in Linux 
arch/x86/platform/efi/efi.c:efi_remove_e820_mmio() around line 301.

The description of EfiMemoryMappedIO is a little confusing, which is 
probably why its use in unclear.

```
Table 7.5 Memory Type Usage before ExitBootServices()
EfiMemoryMappedIO

Used by system firmware to request that a memory-mapped IO region be 
mapped by the OS to a virtual address so it can be accessed by EFI 
runtime services.

Table 7.6 Memory Type Usage after ExitBootServices()
EfiMemoryMappedIO

This memory is not used by the OS. All system memory-mapped IO 
information should come from ACPI tables.
```

The two after ExitBootServices sentences seem contradictory.  I wonder 
if it should be "Ignore this memory type - All system memory-mapped IO 
information should come from ACPI tables".

> Can you paste the dom0 build output when booted with `iommu=verbose
> dom0=pvh,verbose`?  Does using `dom0=pvh,verbose,pf-fixup` solve the
> boot issue? (and can you paste the output if it does)

pf-fixup did not resolve it.  The vpci pci_check_bar() check is 
independent of pf-fixup from what I can tell.

Regards,
Jason


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Subject: Re: [RFC] xen/x86: allow overlaps with non-RAM regions
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On 2025-04-04 04:07, Jan Beulich wrote:
> On 04.04.2025 03:01, Stefano Stabellini wrote:
>> On one Sapphire AMD x86 board, I see this:
>>
>>
>> (XEN) [0000003943ca6ff2]  [00000000f0000000, 00000000f7ffffff] (reserved)
>> (XEN) [00000039460886d9]  [00000000fd000000, 00000000ffffffff] (reserved)
>> [...]
>> (XEN) [    4.612235] 0000:02:00.0: not mapping BAR [fea00, fea03] invalid position
> 
> I, too, see something like this on an SPR system. That's a firmware issue,
> which hence first of all should be dealt with at the firmware side.
> 
>> Linux boots fine on this platform but Linux as Dom0 on Xen does not.
>> This is because the pci_check_bar->is_memory_hole check fails due to the
>> MMIO region overlapping with the EFI reserved region.
> 
> And then what's the actual, observable problem? On my system I haven't
> noticed anything going wrong yet, albeit the affected device is also left
> without a driver.

The nvme drive (0000:02:00.0 with the invalid position above) fails to 
work and no root drive is available.

> Also aiui you strictly mean PVH Dom0 here?

I think we only looked at PVH Dom0.

Regards,
Jason


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On 2025-04-10 09:13, Daniel P. Smith wrote:
> On 4/9/25 06:28, Alejandro Vallejo wrote:
>> On Wed Apr 9, 2025 at 7:24 AM BST, Jan Beulich wrote:
>>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>>> --- /dev/null
>>>> +++ b/xen/arch/x86/include/asm/boot-domain.h
>>>> @@ -0,0 +1,28 @@
>>>> +/* SPDX-License-Identifier: GPL-2.0-or-later */
>>>> +/*
>>>> + * Copyright (c) 2024 Apertus Solutions, LLC
>>>> + * Author: Daniel P. Smith 
>>>> + * Copyright (c) 2024 Christopher Clark 
>>>> 
>>>> + */
>>>
>>> I wonder if the 2024-s here shouldn't have been amended by 2025 now.
>>
>> Maybe. I didn't think about it, tbh. One could argue that Daniel and
>> Christopher's original contribution was indeed in 2024 and the fact they
>> weren't committed until (hopefully!) 2025 doesn't remove the fact they
>> did exist in some form in 2024.
>>
>> I don't particularly care either way, but tend to lean on the "it's fine
>> how it is".
> 
> Jan is correct, now that we have moved into 2025, they should be 
> updated. Maybe we can actually get it all committed this year.

These were written in 2024.  Neither Christopher nor Dan touched them in 
2025, so why would the date change?

Regards,
Jason


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Subject: Re: [PATCH v3 01/16] x86/boot: introduce boot domain
To: Jan Beulich , "Daniel P. Smith"
	
CC: Xenia Ragiadakou , Stefano Stabellini
	, Michal Orzel , Andrew Cooper
	, =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
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On 2025-04-10 11:01, Jan Beulich wrote:
> On 10.04.2025 15:09, Daniel P. Smith wrote:
>> On 4/9/25 02:24, Jan Beulich wrote:
>>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>>> From: "Daniel P. Smith" 
>>>>
>>>> To begin moving toward allowing the hypervisor to construct more than one
>>>> domain at boot, a container is needed for a domain's build information.
>>>> Introduce a new header, , that contains the initial
>>>> struct boot_domain that encapsulate the build information for a domain.
>>>>
>>>> Add a kernel and ramdisk boot module reference along with a struct domain
>>>> reference to the new struct boot_domain. This allows a struct boot_domain
>>>> reference to be the only parameter necessary to pass down through the domain
>>>> construction call chain.
>>>>
>>>> Signed-off-by: Daniel P. Smith 
>>>> Reviewed-by: Jason Andryuk 
>>>
>>> Acked-by: Jan Beulich 
>>
>> I have to object because the meaningless rename is going cause
>> significant pain in the rebase of the follow-on series for no improved
>> code clarity.
> 
> Sorry, then an incremental patch undoing the rename that happened (with
> appropriate justification) will need proposing - the patch here has gone
> in already.

Coming from a Linux background, ramdisk seemed more natural to me.  But 
looking at hvm_start_info, the fields are called module there.  And 
since we shouldn't tie this to the Linux naming, the more generic 
"module" name seemed fine to me.

Regards,
Jason


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Date: Thu, 10 Apr 2025 17:16:20 -0400
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Subject: Re: [PATCH TEST-ARTEFACTS 0/8] Cleanup and Linux ARM64 support
To: Andrew Cooper , Xen-devel
	
CC: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , "Stefano
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--------------z5OKitUsG6XMyIF3I0T0oFij
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On 2025-04-10 05:17, Andrew Cooper wrote:
> On 10/04/2025 1:09 am, Jason Andryuk wrote:
>> On 2025-04-09 13:01, Andrew Cooper wrote:
>>> On 09/04/2025 5:36 pm, Andrew Cooper wrote:
> 
> 6.6.74 is broken too.  (That's the revision that the ARM tests want).
> So it broke somewhere between .56 and .74 which narrows the bisect a little.
> 
> https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1761323774
> 
> In Gitlab, both AMD and Intel are failing in roughly the same way.

Something else goes wrong in QEMU even with my patch for the hypercall, 
and Linux eventually crashes.  Lots of unhandled memory read/write in 
0x1bfffe000 - 0x1bfffeff8, which is marked unusable for dom0.  I trimmed 
lots of the consecutive "unhandled memory" from the attached log 
(313KB->22KB)

Regards,
Jason

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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Jason Andryuk ,
	"Daniel P . Smith" 
Subject: [PATCH 1/4] Rename and adjust x86 containers
Date: Thu, 10 Apr 2025 22:37:21 +0100
Message-Id: <20250410213724.2098383-2-andrew.cooper3@citrix.com>
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Insert the Alpine version as we'll need a newer version in due course, and
rename 'rootfs' to 'base' as the container really is not a rootfs on it's own.

In base, add bash.  It's added later by the rootfs generation anyway, but this
way we can write the generation script in bash too.

In build, group and sort the packages.  Drop the ones we don't need, or are
pulled in by dependencies.  Include diffutils, findutils and gawk to avoid
warnings in the kernel build.

Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Doug Goldstein 
CC: Marek Marczykowski-Górecki 
CC: Jason Andryuk 
CC: Daniel P. Smith 
---
 .gitlab-ci.yml                                |  4 +--
 containerize                                  |  4 +--
 images/alpine/3.18-x86_64-base.dockerfile     |  6 ++++
 ...ockerfile => 3.18-x86_64-build.dockerfile} | 32 ++++++++++++-------
 images/alpine/x86_64-rootfs.dockerfile        |  4 ---
 5 files changed, 30 insertions(+), 20 deletions(-)
 create mode 100644 images/alpine/3.18-x86_64-base.dockerfile
 rename images/alpine/{x86_64-build.dockerfile => 3.18-x86_64-build.dockerfile} (54%)
 delete mode 100644 images/alpine/x86_64-rootfs.dockerfile

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 670f9621e26d..fb997cc62162 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -28,7 +28,7 @@ stages:
   tags:
     - x86_64
   variables:
-    CONTAINER: alpine:x86_64-build
+    CONTAINER: alpine:3.18-x86_64-build
 
 #
 # ARM64 artifacts
@@ -62,7 +62,7 @@ x86_64-rootfs-alpine-3.18:
   script:
     - . scripts/x86_64-rootfs-alpine.sh
   variables:
-    CONTAINER: alpine:x86_64-rootfs
+    CONTAINER: alpine:3.18-x86_64-base
 
 x86_64-argo-linux-6.6.56:
   extends: .x86_64-artifacts
diff --git a/containerize b/containerize
index 7abeb119ff6a..c23f55ead737 100755
--- a/containerize
+++ b/containerize
@@ -25,8 +25,8 @@ die() {
 BASE="registry.gitlab.com/xen-project/hardware/test-artifacts"
 case "_${CONTAINER}" in
     _alpine-3.18-arm64-build) CONTAINER="${BASE}/alpine:3.18-arm64-build" ;;
-    _alpine-x86_64-rootfs) CONTAINER="${BASE}/alpine:x86_64-rootfs" ;;
-    _alpine-x86_64-build|_) CONTAINER="${BASE}/alpine:x86_64-build" ;;
+    _alpine-3.18-x86_64-base) CONTAINER="${BASE}/alpine:3.18-x86_64-base" ;;
+    _alpine-3.18-x86_64-build|_) CONTAINER="${BASE}/alpine:3.18-x86_64-build" ;;
 esac
 
 # Use this variable to control whether root should be used
diff --git a/images/alpine/3.18-x86_64-base.dockerfile b/images/alpine/3.18-x86_64-base.dockerfile
new file mode 100644
index 000000000000..a8cb274d5821
--- /dev/null
+++ b/images/alpine/3.18-x86_64-base.dockerfile
@@ -0,0 +1,6 @@
+# syntax=docker/dockerfile:1
+FROM --platform=linux/amd64 alpine:3.18
+LABEL maintainer.name="The Xen Project"
+LABEL maintainer.email="xen-devel@lists.xenproject.org"
+
+RUN apk --no-cache add bash
diff --git a/images/alpine/x86_64-build.dockerfile b/images/alpine/3.18-x86_64-build.dockerfile
similarity index 54%
rename from images/alpine/x86_64-build.dockerfile
rename to images/alpine/3.18-x86_64-build.dockerfile
index 98969a5be1da..eac0cda4fed3 100644
--- a/images/alpine/x86_64-build.dockerfile
+++ b/images/alpine/3.18-x86_64-build.dockerfile
@@ -1,31 +1,39 @@
 # syntax=docker/dockerfile:1
 FROM --platform=linux/amd64 alpine:3.18
-LABEL maintainer.name="The Xen Project" \
-      maintainer.email="xen-devel@lists.xenproject.org"
+LABEL maintainer.name="The Xen Project"
+LABEL maintainer.email="xen-devel@lists.xenproject.org"
 
 RUN apk --no-cache add bash
 
-RUN bash -ex <
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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Jason Andryuk ,
	"Daniel P . Smith" 
Subject: [PATCH XEN 4/4] CI: Switch to new argo artefact
Date: Thu, 10 Apr 2025 22:37:24 +0100
Message-Id: <20250410213724.2098383-5-andrew.cooper3@citrix.com>
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xen-argo.ko has moved into the standard location.  In the short term, simply
unpack argo.cpio.gz, but this can be simply concatinated with the base rootfs
when it is constructed in a more convenient way.

No practical change.

Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Doug Goldstein 
CC: Marek Marczykowski-Górecki 
CC: Jason Andryuk 
CC: Daniel P. Smith 

https://gitlab.com/xen-project/hardware/xen-staging/-/jobs/9690063969

diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml
index 59a2de28c864..9a533eedb941 100644
--- a/automation/gitlab-ci/test.yaml
+++ b/automation/gitlab-ci/test.yaml
@@ -240,14 +240,11 @@ xilinx-smoke-dom0-x86_64-gcc-debug-argo:
   needs:
     - alpine-3.18-gcc-debug
     - project: xen-project/hardware/test-artifacts
-      job: x86_64-kernel-linux-6.6.56
+      job: linux-6.6.56-x86_64
       ref: master
     - project: xen-project/hardware/test-artifacts
       job: x86_64-rootfs-alpine-3.18
       ref: master
-    - project: xen-project/hardware/test-artifacts
-      job: x86_64-argo-linux-6.6.56
-      ref: master
 
 adl-smoke-x86-64-gcc-debug:
   extends: .adl-x86-64
diff --git a/automation/scripts/xilinx-smoke-dom0-x86_64.sh b/automation/scripts/xilinx-smoke-dom0-x86_64.sh
index 7834ffbe0593..e97702f22827 100755
--- a/automation/scripts/xilinx-smoke-dom0-x86_64.sh
+++ b/automation/scripts/xilinx-smoke-dom0-x86_64.sh
@@ -66,7 +66,7 @@ then
     PASS_MSG="TEST: Message from DOMU"
     XEN_CMD_EXTRA="argo=1,mac-permissive=1"
     DOMU_CMD="
-insmod /root/xen-argo.ko
+insmod /lib/modules/\$(uname -r)/updates/xen-argo.ko
 until false
 do
   echo \"${PASS_MSG}\"
@@ -74,15 +74,13 @@ do
 done | argo-exec -p 28333 -d 0 -- /bin/echo
 "
     DOM0_CMD="
-insmod /root/xen-argo.ko
+insmod /lib/modules/\$(uname -r)/updates/xen-argo.ko
 xl -vvv create /etc/xen/domU.cfg
 argo-exec -l -p 28333 -- /bin/echo
 "
 copy_dom0_files ()
 {
-    cp "${WORKDIR}/binaries/xen-argo.ko" "root/"
-    cp -ar "${WORKDIR}/binaries/lib/"* "usr/local/lib/"
-    cp "${WORKDIR}/binaries/argo-exec" "usr/local/bin/"
+    zcat ${WORKDIR}/binaries/argo.cpio.gz | cpio -idv
 }
 copy_domU_files () { copy_dom0_files; }
 else


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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Jason Andryuk ,
	"Daniel P . Smith" 
Subject: [PATCH 3/4] Switch to fixed Argo
Date: Thu, 10 Apr 2025 22:37:23 +0100
Message-Id: <20250410213724.2098383-4-andrew.cooper3@citrix.com>
X-Mailer: git-send-email 2.39.5
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https://github.com/OpenXT/linux-xen-argo/pull/21

Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Doug Goldstein 
CC: Marek Marczykowski-Górecki 
CC: Jason Andryuk 
CC: Daniel P. Smith 

Probably not for applying, but it would be really good if we could make these
bugs go away.
---
 .gitlab-ci.yml        | 2 +-
 scripts/build-argo.sh | 3 +--
 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 790a6d9f9896..1d2c72b268a3 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -47,7 +47,7 @@ linux-6.6.56-x86_64:
   script: ./scripts/build-linux.sh
   variables:
     LINUX_VERSION: 6.6.56
-    ARGO_SHA: "705a7a8a624b42e13e655d3042059b8a85cdf6a3"
+    ARGO_SHA: "ca5473a56f62e2b4d59697c8552d151391d3fec1"
     ARGOEXEC_SHA: "d900429f6640acc6f68a3d3a4c945d7da60625d8"
 
 #
diff --git a/scripts/build-argo.sh b/scripts/build-argo.sh
index 0b4005f3b9a0..a18a259779c6 100644
--- a/scripts/build-argo.sh
+++ b/scripts/build-argo.sh
@@ -11,7 +11,7 @@ cd "${WORKDIR}"
 #
 ARGODIR="${WORKDIR}/argo-root"
 
-git clone https://github.com/OpenXT/linux-xen-argo.git --depth=1
+git clone https://github.com/andyhhp/linux-xen-argo.git --depth=1
 git -C "${WORKDIR}/linux-xen-argo" fetch origin "${ARGO_SHA}"
 git -C "${WORKDIR}/linux-xen-argo" switch --detach FETCH_HEAD
 
@@ -20,7 +20,6 @@ git -C "${WORKDIR}/linux-xen-argo" switch --detach FETCH_HEAD
 make -C "linux-${LINUX_VERSION}" \
      M="${WORKDIR}/linux-xen-argo/argo-linux" \
      KBUILD_MODPOST_WARN=1 \
-     CFLAGS_MODULE="-Wno-error" \
      modules
 install -D -m644 "${WORKDIR}/linux-xen-argo/argo-linux/xen-argo.ko" \
      "${ARGODIR}/lib/modules/${LINUX_VERSION}/updates/xen-argo.ko"
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Jason Andryuk ,
	"Daniel P . Smith" 
Subject: [PATCH TEST-ARTEFACTS 0/4] Argo artefact
Date: Thu, 10 Apr 2025 22:37:20 +0100
Message-Id: <20250410213724.2098383-1-andrew.cooper3@citrix.com>
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Part 2 of the cleanup, reworking Argo.

https://gitlab.com/xen-project/hardware/xen-staging/-/jobs/9690063969

Andrew Cooper (3):
  Rename and adjust x86 containers
  Overhaul how Argo is built and packged
  Switch to fixed Argo

 .gitlab-ci.yml                                |  6 +-
 containerize                                  |  4 +-
 images/alpine/3.18-x86_64-base.dockerfile     |  6 ++
 ...ockerfile => 3.18-x86_64-build.dockerfile} | 32 +++++----
 images/alpine/x86_64-rootfs.dockerfile        |  4 --
 scripts/build-argo.sh                         | 66 +++++++++++++++++++
 scripts/build-linux.sh                        |  6 +-
 7 files changed, 103 insertions(+), 21 deletions(-)
 create mode 100644 images/alpine/3.18-x86_64-base.dockerfile
 rename images/alpine/{x86_64-build.dockerfile => 3.18-x86_64-build.dockerfile} (54%)
 delete mode 100644 images/alpine/x86_64-rootfs.dockerfile
 create mode 100644 scripts/build-argo.sh

-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Jason Andryuk ,
	"Daniel P . Smith" 
Subject: [PATCH 2/4] Overhaul how Argo is built and packged
Date: Thu, 10 Apr 2025 22:37:22 +0100
Message-Id: <20250410213724.2098383-3-andrew.cooper3@citrix.com>
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Right now, the argo artefacts are a pile of files which the test has to turn
back into something which resembles a filesystem.  Furthermore, because we do
not build modules for the main kernel, it is extra important to make sure that
xen-argo.ko doesn't get out of sync.

Build argo unconditionally as part of the linux artefact.  It's ~100kb all
together, compared to ~14M for the kernel.

Produce a single argo.cpio.gz with xen-argo.ko in the standard location.
Prune userspace down to just the executables and libraries.

This is cribbed from the existing scripts/x86_64-linux-argo.sh, which stays in
place in the short term until Xen can be updated to use the new scheme.

Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Doug Goldstein 
CC: Marek Marczykowski-Górecki 
CC: Jason Andryuk 
CC: Daniel P. Smith 

I tried to make MODPOST work properly, but we don't build enough of it for the
kernel, and I didn't feel like adding an extra 10 mins to the build (all
modules) just to get the metadata right.
---
 .gitlab-ci.yml         |  2 ++
 scripts/build-argo.sh  | 67 ++++++++++++++++++++++++++++++++++++++++++
 scripts/build-linux.sh |  6 +++-
 3 files changed, 74 insertions(+), 1 deletion(-)
 create mode 100644 scripts/build-argo.sh

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index fb997cc62162..790a6d9f9896 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -47,6 +47,8 @@ linux-6.6.56-x86_64:
   script: ./scripts/build-linux.sh
   variables:
     LINUX_VERSION: 6.6.56
+    ARGO_SHA: "705a7a8a624b42e13e655d3042059b8a85cdf6a3"
+    ARGOEXEC_SHA: "d900429f6640acc6f68a3d3a4c945d7da60625d8"
 
 #
 # The jobs below here are legacy and being phased out.
diff --git a/scripts/build-argo.sh b/scripts/build-argo.sh
new file mode 100644
index 000000000000..0b4005f3b9a0
--- /dev/null
+++ b/scripts/build-argo.sh
@@ -0,0 +1,67 @@
+#
+# This is a partial script, sourced by build-linux.sh
+# It has expectations about the environment
+#
+
+cd "${WORKDIR}"
+
+#
+# We're going to collect everything in argo.cpio.gz.  Construct it under
+# $ARGODIR as we go.
+#
+ARGODIR="${WORKDIR}/argo-root"
+
+git clone https://github.com/OpenXT/linux-xen-argo.git --depth=1
+git -C "${WORKDIR}/linux-xen-argo" fetch origin "${ARGO_SHA}"
+git -C "${WORKDIR}/linux-xen-argo" switch --detach FETCH_HEAD
+
+# Build xen-argo.ko against the target kernel, and install it.  Install
+# linux/argo.h too because userspace needs it.
+make -C "linux-${LINUX_VERSION}" \
+     M="${WORKDIR}/linux-xen-argo/argo-linux" \
+     KBUILD_MODPOST_WARN=1 \
+     CFLAGS_MODULE="-Wno-error" \
+     modules
+install -D -m644 "${WORKDIR}/linux-xen-argo/argo-linux/xen-argo.ko" \
+     "${ARGODIR}/lib/modules/${LINUX_VERSION}/updates/xen-argo.ko"
+install -D -m644 "${WORKDIR}/linux-xen-argo/argo-linux/include/linux/argo.h" \
+     "${ARGODIR}/usr/include/linux/argo.h"
+
+# Build and install libargo, applying fixes to build in Alpine Linux
+cd "${WORKDIR}/linux-xen-argo/libargo"
+sed -e "s|AM_INIT_AUTOMAKE|AC_CONFIG_AUX_DIR(.)\nAM_INIT_AUTOMAKE|" \
+    -i configure.ac
+sed -e "s/__SOCKADDR_COMMON (sxenargo_)/sa_family_t sxenargo_family/" \
+    -e "s/__SOCKADDR_COMMON_SIZE/(sizeof (unsigned short int))/" \
+    -i src/libargo.h
+
+autoreconf --install
+./configure --prefix=/usr CPPFLAGS="-I${PWD}/../argo-linux/include"
+make
+make install DESTDIR="${ARGODIR}"
+
+# Build and install argo-exec, modifying for xilinx argo test
+cd "${WORKDIR}"
+curl -fsSLO \
+    https://raw.githubusercontent.com/OpenXT/xenclient-oe/${ARGOEXEC_SHA}/recipes-openxt/argo-exec/argo-exec/argo-exec.c
+sed -e "/#include /d" \
+    -e "s|ret = shuffle(s, fds\[0\], fds\[1\]);|ret = shuffle(s, 0, 1);|" \
+    -i argo-exec.c
+
+gcc -I"${ARGODIR}/usr/include" -L"${ARGODIR}/usr/lib/" \
+    argo-exec.c -o "${ARGODIR}/usr/bin/argo-exec" -largo
+
+#
+# Building is now complete.  Strip the devel components and the nointerposer
+# lib, which we don't care to deploy to the test system.
+#
+cd $ARGODIR
+rm -r usr/include usr/lib/pkgconfig
+find usr/lib -name \*nointerposer\* -delete
+find usr/lib \( -name \*.a -o -name \*.so -o -name \*.la \) -delete
+
+# Package everything up
+find . | cpio -R 0:0 -H newc -o | gzip > "$COPYDIR/argo.cpio.gz"
+
+# Print the contents for the build log
+zcat "$COPYDIR/argo.cpio.gz" | cpio -tv
diff --git a/scripts/build-linux.sh b/scripts/build-linux.sh
index 652fdba7b9d1..49b5ebed6424 100755
--- a/scripts/build-linux.sh
+++ b/scripts/build-linux.sh
@@ -8,7 +8,7 @@ fi
 set -ex -o pipefail
 
 WORKDIR="${PWD}"
-COPYDIR="${WORKDIR}/binaries/"
+COPYDIR="${WORKDIR}/binaries"
 UNAME=$(uname -m)
 
 # Build Linux
@@ -45,6 +45,10 @@ case $UNAME in
     x86_64)
         make -j$(nproc) bzImage
         cp arch/x86/boot/bzImage "${COPYDIR}"
+
+        # Build argo
+        make modules_prepare
+        . "${WORKDIR}/scripts/build-argo.sh"
         ;;
 
     aarch64)
-- 
2.39.5



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Subject: Re: [RFC PATCH] x86/xen: Fix PVH dom0 xen_hypercall detection
To: Jason Andryuk , agarciav@amd.com, jgross@suse.com
Cc: anthony.perard@vates.tech, marmarek@invisiblethingslab.com,
 michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org,
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On 10/04/2025 8:50 pm, Jason Andryuk wrote:
> A Xen PVH dom0 on an AMD processor triple faults early in boot on
> 6.6.86.  CPU detection appears to fail, as the faulting instruction is
> vmcall in xen_hypercall_intel() and not vmmcall in xen_hypercall_amd().
>
> Detection fails because __xen_hypercall_setfunc() returns the full
> kernel mapped address of xen_hypercall_amd() or xen_hypercall_intel() -
> e.g. 0xffffffff815b93f0.  But this is compared against the rip-relative
> xen_hypercall_amd(%rip), which when running from identity mapping, is
> only 0x015b93f0.
>
> Replace the rip-relative address with just loading the actual address to
> restore the proper comparision.
>
> This only seems to affect PVH dom0 boot.  This is probably because the
> XENMEM_memory_map hypercall is issued early on from the identity
> mappings.  With a domU, the memory map is provided via hvm_start_info
> and the hypercall is skipped.  The domU is probably running from the
> kernel high mapping when it issues hypercalls.
>
> Signed-off-by: Jason Andryuk 
> ---
> I think this sort of address mismatch would be addresed by
> e8fbc0d9cab6 ("x86/pvh: Call C code via the kernel virtual mapping")
>
> That could be backported instead, but it depends on a fair number of
> patches.

I've just spoken to Ard, and he thinks that it's standalone.  Should be
ok to backport as a fix.

> Not sure on how getting a patch just into 6.6 would work.  This patch
> could go into upstream Linux though it's not strictly necessary when the
> rip-relative address is a high address.

Do we know which other trees are broken?  I only found 6.6 because I was
messing around with other bits of CI that happen to use 6.6.

~Andrew


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Subject: Re: [PATCH TEST-ARTEFACTS 0/8] Cleanup and Linux ARM64 support
From: Jason Andryuk 
To: Andrew Cooper , Xen-devel
	
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On 2025-04-10 17:16, Jason Andryuk wrote:
> On 2025-04-10 05:17, Andrew Cooper wrote:
>> On 10/04/2025 1:09 am, Jason Andryuk wrote:
>>> On 2025-04-09 13:01, Andrew Cooper wrote:
>>>> On 09/04/2025 5:36 pm, Andrew Cooper wrote:
>>
>> 6.6.74 is broken too.  (That's the revision that the ARM tests want).
>> So it broke somewhere between .56 and .74 which narrows the bisect a 
>> little.
>>
>> https://gitlab.com/xen-project/hardware/xen-staging/-/ 
>> pipelines/1761323774
>>
>> In Gitlab, both AMD and Intel are failing in roughly the same way.
> 
> Something else goes wrong in QEMU even with my patch for the hypercall, 
> and Linux eventually crashes.  Lots of unhandled memory read/write in 
> 0x1bfffe000 - 0x1bfffeff8, which is marked unusable for dom0.  I trimmed 
> lots of the consecutive "unhandled memory" from the attached log (313KB- 
>  >22KB)

Seems like Rogers patches need backporting too:

x86/xen: fix memblock_reserve() usage on PVH
x86/xen: move xen_reserve_extra_memory()

Regards,
Jason


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Date: Thu, 10 Apr 2025 15:47:44 -0700
From: Andrew Morton 
To: Alexander Gordeev 
Cc: Andrey Ryabinin , Hugh Dickins
 , Nicholas Piggin , Guenter Roeck
 , Juergen Gross , Jeremy Fitzhardinge
 , linux-kernel@vger.kernel.org, linux-mm@kvack.org,
 kasan-dev@googlegroups.com, sparclinux@vger.kernel.org,
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Subject: Re: [PATCH v2 3/3] mm: Protect kernel pgtables in
 apply_to_pte_range()
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References: 
	
	
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On Thu, 10 Apr 2025 16:50:33 +0200 Alexander Gordeev  wrote:

> On Tue, Apr 08, 2025 at 06:07:32PM +0200, Alexander Gordeev wrote:
> 
> Hi Andrew,
> 
> > The lazy MMU mode can only be entered and left under the protection
> > of the page table locks for all page tables which may be modified.
> 
> Heiko Carstens noticed that the above claim is not valid, since
> v6.15-rc1 commit 691ee97e1a9d ("mm: fix lazy mmu docs and usage"),
> which restates it to:
> 
> "In the general case, no lock is guaranteed to be held between entry and exit
> of the lazy mode. So the implementation must assume preemption may be enabled"
> 
> That effectively invalidates this patch, so it needs to be dropped.
> 
> Patch 2 still could be fine, except -stable and Fixes tags and it does
> not need to aim 6.15-rcX. Do you want me to repost it?

I dropped the whole series - let's start again.


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Subject: Re: [RFC PATCH v1 10/15] KVM: VMX: Use WRMSRNS or its immediate form
 when available
From: Sean Christopherson 
To: "Xin Li (Intel)" 
Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, 
	linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, 
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Content-Type: text/plain; charset="us-ascii"

On Mon, Mar 31, 2025, Xin Li (Intel) wrote:
> Signed-off-by: Xin Li (Intel) 
> ---
>  arch/x86/include/asm/msr-index.h |  6 ++++++
>  arch/x86/kvm/vmx/vmenter.S       | 28 ++++++++++++++++++++++++----
>  2 files changed, 30 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
> index e6134ef2263d..04244c3ba374 100644
> --- a/arch/x86/include/asm/msr-index.h
> +++ b/arch/x86/include/asm/msr-index.h
> @@ -1226,4 +1226,10 @@
>  						* a #GP
>  						*/
>  
> +/* Instruction opcode for WRMSRNS supported in binutils >= 2.40 */
> +#define ASM_WRMSRNS		_ASM_BYTES(0x0f,0x01,0xc6)
> +
> +/* Instruction opcode for the immediate form RDMSR/WRMSRNS */
> +#define ASM_WRMSRNS_RAX		_ASM_BYTES(0xc4,0xe7,0x7a,0xf6,0xc0)
> +
>  #endif /* _ASM_X86_MSR_INDEX_H */
> diff --git a/arch/x86/kvm/vmx/vmenter.S b/arch/x86/kvm/vmx/vmenter.S
> index f6986dee6f8c..9fae43723c44 100644
> --- a/arch/x86/kvm/vmx/vmenter.S
> +++ b/arch/x86/kvm/vmx/vmenter.S
> @@ -64,6 +64,29 @@
>  	RET
>  .endm
>  
> +/*
> + * Write EAX to MSR_IA32_SPEC_CTRL.
> + *
> + * Choose the best WRMSR instruction based on availability.
> + *
> + * Replace with 'wrmsrns' and 'wrmsrns %rax, $MSR_IA32_SPEC_CTRL' once binutils support them.
> + */
> +.macro WRITE_EAX_TO_MSR_IA32_SPEC_CTRL
> +	ALTERNATIVE_2 __stringify(mov $MSR_IA32_SPEC_CTRL, %ecx;		\
> +				  xor %edx, %edx;				\
> +				  mov %edi, %eax;				\
> +				  ds wrmsr),					\
> +		      __stringify(mov $MSR_IA32_SPEC_CTRL, %ecx;		\
> +				  xor %edx, %edx;				\
> +				  mov %edi, %eax;				\
> +				  ASM_WRMSRNS),					\
> +		      X86_FEATURE_WRMSRNS,					\
> +		      __stringify(xor %_ASM_AX, %_ASM_AX;			\
> +				  mov %edi, %eax;				\
> +				  ASM_WRMSRNS_RAX; .long MSR_IA32_SPEC_CTRL),	\
> +		      X86_FEATURE_MSR_IMM
> +.endm

This is quite hideous.  I have no objection to optimizing __vmx_vcpu_run(), but
I would much prefer that a macro like this live in generic code, and that it be
generic.  It should be easy enough to provide an assembly friendly equivalent to
__native_wrmsr_constant().


> +
>  .section .noinstr.text, "ax"
>  
>  /**
> @@ -123,10 +146,7 @@ SYM_FUNC_START(__vmx_vcpu_run)
>  	movl PER_CPU_VAR(x86_spec_ctrl_current), %esi
>  	cmp %edi, %esi
>  	je .Lspec_ctrl_done
> -	mov $MSR_IA32_SPEC_CTRL, %ecx
> -	xor %edx, %edx
> -	mov %edi, %eax
> -	wrmsr
> +	WRITE_EAX_TO_MSR_IA32_SPEC_CTRL
>  
>  .Lspec_ctrl_done:
>  
> -- 
> 2.49.0
> 


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From: Tamas K Lengyel 
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Subject: Re: [PATCH] x86/mem-sharing: short-circuit p2m_is_shared() when MEM_SHARING=n
To: Jan Beulich 
Cc: "xen-devel@lists.xenproject.org" , 
	Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
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On Thu, Apr 3, 2025 at 4:42=E2=80=AFAM Jan Beulich  wrot=
e:
>
> Some of the uses of dom_cow aren't easily DCE-able (without extra
> #ifdef-ary), and hence it being constantly NULL when MEM_SHARING=3Dn
> misguides Coverity into thinking that there may be a NULL deref in
>
>         if ( p2m_is_shared(t) )
>             d =3D dom_cow;
>
>         if ( get_page(page, d) )
>             return page;
>
> (in get_page_from_mfn_and_type()). Help the situation by making
> p2m_is_shared() be compile-time false when MEM_SHARING=3Dn, thus also
> permitting the compiler to DCE some other code.
>
> Note that p2m_is_sharable() isn't used outside of mem_sharing.c, and
> hence P2M_SHARABLE_TYPES can simply be left undefined when
> MEM_SHARING=3Dn.
>
> Coverity ID: 1645573
> Fixes: 79d91e178a1a ("dom_cow is needed for mem-sharing only")
> Signed-off-by: Jan Beulich 

Reviewed-by: Tamas K Lengyel 

> ---
> Might be nice to also eliminate p2m_ram_shared (and for MEM_PAGING=3Dn
> also the three paging types) entirely from such builds, to eliminate the
> risk of accidental use. Yet that would apparently also come at the price
> of more #ifdef-ary. Opinions?

I don't think the risk of accidental use is a concern. I wouldn't
touch them unless they lead to similar confusion with coverity or some
other tool.

Cheers,
Tamas


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Date: Fri, 11 Apr 2025 02:22:23 +0000
To: Andrew Cooper 
From: Denis Mukhin 
Cc: Xen-devel , Anthony PERARD , Stefano Stabellini , Michal Orzel , Doug Goldstein , =?utf-8?Q?Marek_Marczykowski-G=C3=B3recki?= , Jason Andryuk , "Daniel P . Smith" 
Subject: Re: [PATCH 2/4] Overhaul how Argo is built and packged
Message-ID: 
In-Reply-To: <20250410213724.2098383-3-andrew.cooper3@citrix.com>
References: <20250410213724.2098383-1-andrew.cooper3@citrix.com> <20250410213724.2098383-3-andrew.cooper3@citrix.com>
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On Thursday, April 10th, 2025 at 2:37 PM, Andrew Cooper  wrote:

>=20
>=20
> Right now, the argo artefacts are a pile of files which the test has to t=
urn
> back into something which resembles a filesystem. Furthermore, because we=
 do
> not build modules for the main kernel, it is extra important to make sure=
 that
> xen-argo.ko doesn't get out of sync.
>=20
> Build argo unconditionally as part of the linux artefact. It's ~100kb all
> together, compared to ~14M for the kernel.
>=20
> Produce a single argo.cpio.gz with xen-argo.ko in the standard location.
> Prune userspace down to just the executables and libraries.
>=20
> This is cribbed from the existing scripts/x86_64-linux-argo.sh, which sta=
ys in
> place in the short term until Xen can be updated to use the new scheme.
>=20
> Signed-off-by: Andrew Cooper andrew.cooper3@citrix.com
>=20
> ---
> CC: Anthony PERARD anthony.perard@vates.tech
>=20
> CC: Stefano Stabellini sstabellini@kernel.org
>=20
> CC: Michal Orzel michal.orzel@amd.com
>=20
> CC: Doug Goldstein cardoe@cardoe.com
>=20
> CC: Marek Marczykowski-G=C3=B3recki marmarek@invisiblethingslab.com
>=20
> CC: Jason Andryuk jason.andryuk@amd.com
>=20
> CC: Daniel P. Smith dpsmith@apertussolutions.com
>=20
>=20
> I tried to make MODPOST work properly, but we don't build enough of it fo=
r the
> kernel, and I didn't feel like adding an extra 10 mins to the build (all
> modules) just to get the metadata right.
> ---
> .gitlab-ci.yml | 2 ++
> scripts/build-argo.sh | 67 ++++++++++++++++++++++++++++++++++++++++++
> scripts/build-linux.sh | 6 +++-
> 3 files changed, 74 insertions(+), 1 deletion(-)
> create mode 100644 scripts/build-argo.sh
>=20
> diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
> index fb997cc62162..790a6d9f9896 100644
> --- a/.gitlab-ci.yml
> +++ b/.gitlab-ci.yml
> @@ -47,6 +47,8 @@ linux-6.6.56-x86_64:
> script: ./scripts/build-linux.sh
> variables:
> LINUX_VERSION: 6.6.56
> + ARGO_SHA: "705a7a8a624b42e13e655d3042059b8a85cdf6a3"
> + ARGOEXEC_SHA: "d900429f6640acc6f68a3d3a4c945d7da60625d8"
>=20
> #
> # The jobs below here are legacy and being phased out.
> diff --git a/scripts/build-argo.sh b/scripts/build-argo.sh
> new file mode 100644
> index 000000000000..0b4005f3b9a0
> --- /dev/null
> +++ b/scripts/build-argo.sh
> @@ -0,0 +1,67 @@
> +#
> +# This is a partial script, sourced by build-linux.sh
> +# It has expectations about the environment
> +#
> +
> +cd "${WORKDIR}"
> +
> +#
> +# We're going to collect everything in argo.cpio.gz. Construct it under
> +# $ARGODIR as we go.
> +#
> +ARGODIR=3D"${WORKDIR}/argo-root"
> +
> +git clone https://github.com/OpenXT/linux-xen-argo.git --depth=3D1
> +git -C "${WORKDIR}/linux-xen-argo" fetch origin "${ARGO_SHA}"
> +git -C "${WORKDIR}/linux-xen-argo" switch --detach FETCH_HEAD
> +
> +# Build xen-argo.ko against the target kernel, and install it. Install
> +# linux/argo.h too because userspace needs it.
> +make -C "linux-${LINUX_VERSION}" \
> + M=3D"${WORKDIR}/linux-xen-argo/argo-linux" \
> + KBUILD_MODPOST_WARN=3D1 \
> + CFLAGS_MODULE=3D"-Wno-error" \

Suggest adding `W=3De` for catching problems and `V=3D1` to help debugging =
a bit.

> + modules
> +install -D -m644 "${WORKDIR}/linux-xen-argo/argo-linux/xen-argo.ko" \
> + "${ARGODIR}/lib/modules/${LINUX_VERSION}/updates/xen-argo.ko"
> +install -D -m644 "${WORKDIR}/linux-xen-argo/argo-linux/include/linux/arg=
o.h" \
> + "${ARGODIR}/usr/include/linux/argo.h"
> +
> +# Build and install libargo, applying fixes to build in Alpine Linux
> +cd "${WORKDIR}/linux-xen-argo/libargo"
> +sed -e "s|AM_INIT_AUTOMAKE|AC_CONFIG_AUX_DIR(.)\nAM_INIT_AUTOMAKE|" \
> + -i configure.ac
> +sed -e "s/_SOCKADDR_COMMON (sxenargo)/sa_family_t sxenargo_family/" \
> + -e "s/__SOCKADDR_COMMON_SIZE/(sizeof (unsigned short int))/" \
> + -i src/libargo.h
> +
> +autoreconf --install
> +./configure --prefix=3D/usr CPPFLAGS=3D"-I${PWD}/../argo-linux/include"
> +make

Perhaps add something like `make -j$(nproc)`?

> +make install DESTDIR=3D"${ARGODIR}"
> +
> +# Build and install argo-exec, modifying for xilinx argo test
> +cd "${WORKDIR}"
> +curl -fsSLO \
> + https://raw.githubusercontent.com/OpenXT/xenclient-oe/${ARGOEXEC_SHA}/r=
ecipes-openxt/argo-exec/argo-exec/argo-exec.c
> +sed -e "/#include /d" \
>=20
> + -e "s|ret =3D shuffle(s, fds\[0\], fds\[1\]);|ret =3D shuffle(s, 0, 1);=
|" \
> + -i argo-exec.c
> +
> +gcc -I"${ARGODIR}/usr/include" -L"${ARGODIR}/usr/lib/" \
> + argo-exec.c -o "${ARGODIR}/usr/bin/argo-exec" -largo
> +
> +#
> +# Building is now complete. Strip the devel components and the nointerpo=
ser
> +# lib, which we don't care to deploy to the test system.
> +#
> +cd $ARGODIR
> +rm -r usr/include usr/lib/pkgconfig
> +find usr/lib -name \nointerposer\ -delete
> +find usr/lib \( -name \.a -o -name \.so -o -name \*.la \) -delete
> +
> +# Package everything up
> +find . | cpio -R 0:0 -H newc -o | gzip > "$COPYDIR/argo.cpio.gz"
>=20
> +
> +# Print the contents for the build log
> +zcat "$COPYDIR/argo.cpio.gz" | cpio -tv
> diff --git a/scripts/build-linux.sh b/scripts/build-linux.sh
> index 652fdba7b9d1..49b5ebed6424 100755
> --- a/scripts/build-linux.sh
> +++ b/scripts/build-linux.sh
> @@ -8,7 +8,7 @@ fi
> set -ex -o pipefail
>=20
> WORKDIR=3D"${PWD}"
> -COPYDIR=3D"${WORKDIR}/binaries/"
> +COPYDIR=3D"${WORKDIR}/binaries"
> UNAME=3D$(uname -m)
>=20
> # Build Linux
> @@ -45,6 +45,10 @@ case $UNAME in
> x86_64)
> make -j$(nproc) bzImage
> cp arch/x86/boot/bzImage "${COPYDIR}"
> +
> + # Build argo
> + make modules_prepare
> + . "${WORKDIR}/scripts/build-argo.sh"

Nit: I would use `source` instead of `.` which is simple to overlook.

> ;;
>=20
> aarch64)
> --
> 2.39.5


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From: "Chen, Jiqian" 
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Date: Fri, 11 Apr 2025 02:51:59 +0000
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On 2025/4/10 20:34, Jan Beulich wrote:
> On 09.04.2025 08:45, Jiqian Chen wrote:
>> --- a/xen/drivers/pci/pci.c
>> +++ b/xen/drivers/pci/pci.c
>> @@ -40,7 +40,7 @@ unsigned int pci_find_cap_offset(pci_sbdf_t sbdf, unsi=
gned int cap)
>>  }
>> =20
>>  unsigned int pci_find_next_cap_ttl(pci_sbdf_t sbdf, unsigned int pos,
>> -                                   const unsigned int caps[], unsigned =
int n,
>> +                                   const unsigned int *caps, unsigned i=
nt n,
>=20
> I don't follow the need for this change.
This changed is for my next patch "vpci/header: Emulate legacy capability l=
ist for host".
Currently, vpci only emulates capability list for domU, not for dom0.
For domU, vpci exposes a fixed capability array which calls "supported_caps=
".
My changes want to emulate capability list for dom0.
I think vpci should expose all devices capabilities to dom0.
When I emulate it, I need to iterate over all capabilities without another =
fixed array,
so I need this function to return the position of next capability directly =
when passing a zero length array to this function.

>=20
>> @@ -55,6 +55,10 @@ unsigned int pci_find_next_cap_ttl(pci_sbdf_t sbdf, u=
nsigned int pos,
>> =20
>>          if ( id =3D=3D 0xff )
>>              break;
>> +
>> +        if ( !caps || n =3D=3D 0 )
>> +            return pos;
>=20
> Checking n to be zero ought to suffice here? In that case it doesn't matt=
er
> what caps is. Plus if n is non-zero, it clearly is an error if caps was N=
ULL.
Two checking is to prevent null pointer errors.
But as you said, if checking n to be zero is enough, then I don't need to c=
hange the definition of this function.
I will change in next version.

>=20
> Jan

--=20
Best regards,
Jiqian Chen.


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From: "Chen, Jiqian" 
To: Jan Beulich 
CC: =?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= ,
	"xen-devel@lists.xenproject.org" , "Huang,
 Ray" , "Chen, Jiqian" 
Subject: Re: [PATCH v2 2/8] vpci/header: Emulate legacy capability list for
 host
Thread-Topic: [PATCH v2 2/8] vpci/header: Emulate legacy capability list for
 host
Thread-Index: AQHbqRsaTINnyZcO4ESL6xMBZUfUtLOc2UMAgAF0NAA=
Date: Fri, 11 Apr 2025 02:54:45 +0000
Message-ID:
 
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Cc: "Hugh Dickins" , "Guenter Roeck" ,
 "Juergen Gross" , "Jeremy Fitzhardinge" ,
 , ,
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Subject: Re: [PATCH v1 1/4] kasan: Avoid sleepable page allocation from
 atomic context
From: "Nicholas Piggin" 
To: "Alexander Gordeev" , "Andrew Morton"
 , "Andrey Ryabinin" 
X-Mailer: aerc 0.19.0
References: 
 
In-Reply-To: 

On Tue Apr 8, 2025 at 1:11 AM AEST, Alexander Gordeev wrote:
> apply_to_page_range() enters lazy MMU mode and then invokes
> kasan_populate_vmalloc_pte() callback on each page table walk
> iteration. The lazy MMU mode may only be entered only under
> protection of the page table lock. However, the callback can
> go into sleep when trying to allocate a single page.
>
> Change __get_free_page() allocation mode from GFP_KERNEL to
> GFP_ATOMIC to avoid scheduling out while in atomic context.

It's a bit unfortunate to make this use atomic allocs for
archs that don't need it.

Could you make it depend on __HAVE_ARCH_ENTER_LAZY_MMU_MODE
or is that overkill?

I wanted to remove ppc64's per-CPU page array and replace it
with on stack or dynaimc alloc array in the thread... but
cost/benefit of working on ppc64 hash MMU code is not
high :(

Fix itself for ppc64's requirement at least looks right to me
so for that,

Reviewed-by: Nicholas Piggin 

>
> Signed-off-by: Alexander Gordeev 
> ---
>  mm/kasan/shadow.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/mm/kasan/shadow.c b/mm/kasan/shadow.c
> index 88d1c9dcb507..edfa77959474 100644
> --- a/mm/kasan/shadow.c
> +++ b/mm/kasan/shadow.c
> @@ -301,7 +301,7 @@ static int kasan_populate_vmalloc_pte(pte_t *ptep, un=
signed long addr,
>  	if (likely(!pte_none(ptep_get(ptep))))
>  		return 0;
> =20
> -	page =3D __get_free_page(GFP_KERNEL);
> +	page =3D __get_free_page(GFP_ATOMIC);
>  	if (!page)
>  		return -ENOMEM;
> =20



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Date: Fri, 11 Apr 2025 16:46:58 +1000
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Subject: Re: [PATCH v1 2/4] mm: Cleanup apply_to_pte_range() routine
From: "Nicholas Piggin" 
To: "Alexander Gordeev" , "Andrew Morton"
 , "Andrey Ryabinin" 
Cc: "Hugh Dickins" , "Guenter Roeck" ,
 "Juergen Gross" , "Jeremy Fitzhardinge" ,
 , ,
 , ,
 , ,
 
X-Mailer: aerc 0.19.0
References: 
 <93102722541b1daf541fce9fb316a1a2614d8c86.1744037648.git.agordeev@linux.ibm.com>
In-Reply-To: <93102722541b1daf541fce9fb316a1a2614d8c86.1744037648.git.agordeev@linux.ibm.com>

On Tue Apr 8, 2025 at 1:11 AM AEST, Alexander Gordeev wrote:
> Reverse 'create' vs 'mm =3D=3D &init_mm' conditions and move
> page table mask modification out of the atomic context.
>
> Signed-off-by: Alexander Gordeev 
> ---
>  mm/memory.c | 28 +++++++++++++++++-----------
>  1 file changed, 17 insertions(+), 11 deletions(-)
>
> diff --git a/mm/memory.c b/mm/memory.c
> index 2d8c265fc7d6..f0201c8ec1ce 100644
> --- a/mm/memory.c
> +++ b/mm/memory.c
> @@ -2915,24 +2915,28 @@ static int apply_to_pte_range(struct mm_struct *m=
m, pmd_t *pmd,
>  				     pte_fn_t fn, void *data, bool create,
>  				     pgtbl_mod_mask *mask)
>  {
> +	int err =3D create ? -ENOMEM : -EINVAL;

Could you make this a new variable instead of reusing
existing err? 'const int pte_err' or something?

>  	pte_t *pte, *mapped_pte;
> -	int err =3D 0;
>  	spinlock_t *ptl;
> =20
> -	if (create) {
> -		mapped_pte =3D pte =3D (mm =3D=3D &init_mm) ?
> -			pte_alloc_kernel_track(pmd, addr, mask) :
> -			pte_alloc_map_lock(mm, pmd, addr, &ptl);
> +	if (mm =3D=3D &init_mm) {
> +		if (create)
> +			pte =3D pte_alloc_kernel_track(pmd, addr, mask);
> +		else
> +			pte =3D pte_offset_kernel(pmd, addr);
>  		if (!pte)
> -			return -ENOMEM;
> +			return err;
>  	} else {
> -		mapped_pte =3D pte =3D (mm =3D=3D &init_mm) ?
> -			pte_offset_kernel(pmd, addr) :
> -			pte_offset_map_lock(mm, pmd, addr, &ptl);
> +		if (create)
> +			pte =3D pte_alloc_map_lock(mm, pmd, addr, &ptl);
> +		else
> +			pte =3D pte_offset_map_lock(mm, pmd, addr, &ptl);
>  		if (!pte)
> -			return -EINVAL;
> +			return err;
> +		mapped_pte =3D pte;
>  	}
> =20
> +	err =3D 0;
>  	arch_enter_lazy_mmu_mode();
> =20
>  	if (fn) {
> @@ -2944,12 +2948,14 @@ static int apply_to_pte_range(struct mm_struct *m=
m, pmd_t *pmd,
>  			}
>  		} while (addr +=3D PAGE_SIZE, addr !=3D end);
>  	}
> -	*mask |=3D PGTBL_PTE_MODIFIED;
> =20
>  	arch_leave_lazy_mmu_mode();
> =20
>  	if (mm !=3D &init_mm)
>  		pte_unmap_unlock(mapped_pte, ptl);
> +
> +	*mask |=3D PGTBL_PTE_MODIFIED;

This is done just because we might as well? Less work in critical
section?

Reviewed-by: Nicholas Piggin 

> +
>  	return err;
>  }
> =20



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Date: Fri, 11 Apr 2025 16:53:29 +1000
Message-Id: 
From: "Nicholas Piggin" 
To: "Alexander Gordeev" , "Andrew Morton"
 , "Andrey Ryabinin" 
Cc: "Hugh Dickins" , "Guenter Roeck" ,
 "Juergen Gross" , "Jeremy Fitzhardinge" ,
 , ,
 , ,
 , ,
 
Subject: Re: [PATCH v1 3/4] mm: Protect kernel pgtables in
 apply_to_pte_range()
X-Mailer: aerc 0.19.0
References: 
 <11dbe3ac88130dbd2b8554f9369cd93fe138c655.1744037648.git.agordeev@linux.ibm.com>
In-Reply-To: <11dbe3ac88130dbd2b8554f9369cd93fe138c655.1744037648.git.agordeev@linux.ibm.com>

On Tue Apr 8, 2025 at 1:11 AM AEST, Alexander Gordeev wrote:
> The lazy MMU mode can only be entered and left under the protection
> of the page table locks for all page tables which may be modified.
> Yet, when it comes to kernel mappings apply_to_pte_range() does not
> take any locks. That does not conform arch_enter|leave_lazy_mmu_mode()
> semantics and could potentially lead to re-schedulling a process while
> in lazy MMU mode or racing on a kernel page table updates.
>
> Signed-off-by: Alexander Gordeev 
> ---
>  mm/kasan/shadow.c | 7 ++-----
>  mm/memory.c       | 5 ++++-
>  2 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/mm/kasan/shadow.c b/mm/kasan/shadow.c
> index edfa77959474..6531a7aa8562 100644
> --- a/mm/kasan/shadow.c
> +++ b/mm/kasan/shadow.c
> @@ -308,14 +308,14 @@ static int kasan_populate_vmalloc_pte(pte_t *ptep, =
unsigned long addr,
>  	__memset((void *)page, KASAN_VMALLOC_INVALID, PAGE_SIZE);
>  	pte =3D pfn_pte(PFN_DOWN(__pa(page)), PAGE_KERNEL);
> =20
> -	spin_lock(&init_mm.page_table_lock);
>  	if (likely(pte_none(ptep_get(ptep)))) {
>  		set_pte_at(&init_mm, addr, ptep, pte);
>  		page =3D 0;
>  	}
> -	spin_unlock(&init_mm.page_table_lock);
> +
>  	if (page)
>  		free_page(page);
> +
>  	return 0;
>  }
> =20

kasan_populate_vmalloc_pte() is really the only thing that
takes the ptl in the apply_to_page_range fn()... Looks like
you may be right. I wonder why they do and nobody else? Just
luck?

Seems okay.

Reviewed-by: Nicholas Piggin 

> @@ -401,13 +401,10 @@ static int kasan_depopulate_vmalloc_pte(pte_t *ptep=
, unsigned long addr,
> =20
>  	page =3D (unsigned long)__va(pte_pfn(ptep_get(ptep)) << PAGE_SHIFT);
> =20
> -	spin_lock(&init_mm.page_table_lock);
> -
>  	if (likely(!pte_none(ptep_get(ptep)))) {
>  		pte_clear(&init_mm, addr, ptep);
>  		free_page(page);
>  	}
> -	spin_unlock(&init_mm.page_table_lock);
> =20
>  	return 0;
>  }
> diff --git a/mm/memory.c b/mm/memory.c
> index f0201c8ec1ce..1f3727104e99 100644
> --- a/mm/memory.c
> +++ b/mm/memory.c
> @@ -2926,6 +2926,7 @@ static int apply_to_pte_range(struct mm_struct *mm,=
 pmd_t *pmd,
>  			pte =3D pte_offset_kernel(pmd, addr);
>  		if (!pte)
>  			return err;
> +		spin_lock(&init_mm.page_table_lock);
>  	} else {
>  		if (create)
>  			pte =3D pte_alloc_map_lock(mm, pmd, addr, &ptl);
> @@ -2951,7 +2952,9 @@ static int apply_to_pte_range(struct mm_struct *mm,=
 pmd_t *pmd,
> =20
>  	arch_leave_lazy_mmu_mode();
> =20
> -	if (mm !=3D &init_mm)
> +	if (mm =3D=3D &init_mm)
> +		spin_unlock(&init_mm.page_table_lock);
> +	else
>  		pte_unmap_unlock(mapped_pte, ptl);
> =20
>  	*mask |=3D PGTBL_PTE_MODIFIED;



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Cc: "Hugh Dickins" , "Guenter Roeck" ,
 "Juergen Gross" , "Jeremy Fitzhardinge" ,
 , ,
 , ,
 , ,
 
Subject: Re: [PATCH v1 1/4] kasan: Avoid sleepable page allocation from
 atomic context
From: "Nicholas Piggin" 
To: "Alexander Gordeev" , "Andrew Morton"
 , "Andrey Ryabinin" 
X-Mailer: aerc 0.19.0
References: 
 
In-Reply-To: 

On Tue Apr 8, 2025 at 1:11 AM AEST, Alexander Gordeev wrote:
> apply_to_page_range() enters lazy MMU mode and then invokes
> kasan_populate_vmalloc_pte() callback on each page table walk
> iteration. The lazy MMU mode may only be entered only under
> protection of the page table lock. However, the callback can
> go into sleep when trying to allocate a single page.
>
> Change __get_free_page() allocation mode from GFP_KERNEL to
> GFP_ATOMIC to avoid scheduling out while in atomic context.
>
> Signed-off-by: Alexander Gordeev 
> ---
>  mm/kasan/shadow.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/mm/kasan/shadow.c b/mm/kasan/shadow.c
> index 88d1c9dcb507..edfa77959474 100644
> --- a/mm/kasan/shadow.c
> +++ b/mm/kasan/shadow.c
> @@ -301,7 +301,7 @@ static int kasan_populate_vmalloc_pte(pte_t *ptep, un=
signed long addr,
>  	if (likely(!pte_none(ptep_get(ptep))))
>  		return 0;
> =20
> -	page =3D __get_free_page(GFP_KERNEL);
> +	page =3D __get_free_page(GFP_ATOMIC);
>  	if (!page)
>  		return -ENOMEM;
> =20

Oh of course you can't make it GFP_KERNEL after the
patch to take ptl even for archs that don't use lazy
mmu.

Thanks,
Nick


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Date: Fri, 11 Apr 2025 17:12:28 +1000
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Cc: "Hugh Dickins" , "Guenter Roeck" ,
 "Juergen Gross" , "Jeremy Fitzhardinge" ,
 , ,
 , ,
 , ,
 
Subject: Re: [PATCH v1 0/4] mm: Fix apply_to_pte_range() vs lazy MMU mode
From: "Nicholas Piggin" 
To: "Alexander Gordeev" , "Andrew Morton"
 , "Andrey Ryabinin" 
X-Mailer: aerc 0.19.0
References: 
In-Reply-To: 

On Tue Apr 8, 2025 at 1:11 AM AEST, Alexander Gordeev wrote:
> Hi All,
>
> This series is an attempt to fix the violation of lazy MMU mode context
> requirement as described for arch_enter_lazy_mmu_mode():
>
>     This mode can only be entered and left under the protection of
>     the page table locks for all page tables which may be modified.
>
> On s390 if I make arch_enter_lazy_mmu_mode() -> preempt_enable() and
> arch_leave_lazy_mmu_mode() -> preempt_disable() I am getting this:
>
>     [  553.332108] preempt_count: 1, expected: 0
>     [  553.332117] no locks held by multipathd/2116.
>     [  553.332128] CPU: 24 PID: 2116 Comm: multipathd Kdump: loaded Taint=
ed:
>     [  553.332139] Hardware name: IBM 3931 A01 701 (LPAR)
>     [  553.332146] Call Trace:
>     [  553.332152]  [<00000000158de23a>] dump_stack_lvl+0xfa/0x150
>     [  553.332167]  [<0000000013e10d12>] __might_resched+0x57a/0x5e8
>     [  553.332178]  [<00000000144eb6c2>] __alloc_pages+0x2ba/0x7c0
>     [  553.332189]  [<00000000144d5cdc>] __get_free_pages+0x2c/0x88
>     [  553.332198]  [<00000000145663f6>] kasan_populate_vmalloc_pte+0x4e/=
0x110
>     [  553.332207]  [<000000001447625c>] apply_to_pte_range+0x164/0x3c8
>     [  553.332218]  [<000000001448125a>] apply_to_pmd_range+0xda/0x318
>     [  553.332226]  [<000000001448181c>] __apply_to_page_range+0x384/0x76=
8
>     [  553.332233]  [<0000000014481c28>] apply_to_page_range+0x28/0x38
>     [  553.332241]  [<00000000145665da>] kasan_populate_vmalloc+0x82/0x98
>     [  553.332249]  [<00000000144c88d0>] alloc_vmap_area+0x590/0x1c90
>     [  553.332257]  [<00000000144ca108>] __get_vm_area_node.constprop.0+0=
x138/0x260
>     [  553.332265]  [<00000000144d17fc>] __vmalloc_node_range+0x134/0x360
>     [  553.332274]  [<0000000013d5dbf2>] alloc_thread_stack_node+0x112/0x=
378
>     [  553.332284]  [<0000000013d62726>] dup_task_struct+0x66/0x430
>     [  553.332293]  [<0000000013d63962>] copy_process+0x432/0x4b80
>     [  553.332302]  [<0000000013d68300>] kernel_clone+0xf0/0x7d0
>     [  553.332311]  [<0000000013d68bd6>] __do_sys_clone+0xae/0xc8
>     [  553.332400]  [<0000000013d68dee>] __s390x_sys_clone+0xd6/0x118
>     [  553.332410]  [<0000000013c9d34c>] do_syscall+0x22c/0x328
>     [  553.332419]  [<00000000158e7366>] __do_syscall+0xce/0xf0
>     [  553.332428]  [<0000000015913260>] system_call+0x70/0x98
>
> This exposes a KASAN issue fixed with patch 1 and apply_to_pte_range()
> issue fixed with patches 2-3. Patch 4 is a debug improvement on top,
> that could have helped to notice the issue.
>
> Commit b9ef323ea168 ("powerpc/64s: Disable preemption in hash lazy mmu
> mode") looks like powerpc-only fix, yet not entirely conforming to the
> above provided requirement (page tables itself are still not protected).
> If I am not mistaken, xen and sparc are alike.

Huh. powerpc actually has some crazy code in __switch_to() that is
supposed to handle preemption while in lazy mmu mode. So we probably
don't even need to disable preemption, just use the raw per-cpu
accessors (or keep disabling preemption and remove the now dead code
from context switch).

IIRC all this got built up over a long time with some TLB flush
rules changing at the same time, we could probably stay in lazy mmu
mode for a longer time until it was discovered we really need to
flush before dropping the PTL.

ppc64 and sparc I think don't even need lazy mmu mode for kasan (TLBs
do not require flushing) and will function just fine if not in lazy
mode (they just flush one TLB at a time), not sure about xen. We could
actually go the other way and require that archs operate properly when
not in lazy mode (at least for kernel page tables) and avoid it for
apply_to_page_range()?

Thanks,
Nick


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Date: Fri, 11 Apr 2025 17:16:24 +1000
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Cc: "Hugh Dickins" , "Guenter Roeck" ,
 "Juergen Gross" , "Jeremy Fitzhardinge" ,
 , ,
 , ,
 , ,
 
Subject: Re: [PATCH v1 4/4] mm: Allow detection of wrong
 arch_enter_lazy_mmu_mode() context
From: "Nicholas Piggin" 
To: "Alexander Gordeev" , "Andrew Morton"
 , "Andrey Ryabinin" 
X-Mailer: aerc 0.19.0
References: 
 <5204eaec309f454efcb5a799c9e0ed9da1dff971.1744037648.git.agordeev@linux.ibm.com>
In-Reply-To: <5204eaec309f454efcb5a799c9e0ed9da1dff971.1744037648.git.agordeev@linux.ibm.com>

On Tue Apr 8, 2025 at 1:11 AM AEST, Alexander Gordeev wrote:
> The lazy MMU batching may be only be entered and left under the
> protection of the page table locks for all page tables which may
> be modified. Yet, there were cases arch_enter_lazy_mmu_mode()
> was called without the locks taken, e.g. commit b9ef323ea168
> ("powerpc/64s: Disable preemption in hash lazy mmu mode").
>
> Make default arch_enter|leave|flush_lazy_mmu_mode() callbacks
> complain at least in case the preemption is enabled to detect
> wrong contexts.
>
> Most platforms do not implement the callbacks, so to aovid a
> performance impact allow the complaint when CONFIG_DEBUG_VM
> option is enabled only.
>
> Signed-off-by: Alexander Gordeev 

This is a good debugging feature independent of how the fix
is done. I would just warn once, since it's not a bug for
the arch and could fire frequently if it fires at all.

Reviewed-by: Nicholas Piggin 

> ---
>  include/linux/pgtable.h | 15 ++++++++++++---
>  1 file changed, 12 insertions(+), 3 deletions(-)
>
> diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h
> index e2b705c14945..959590bb66da 100644
> --- a/include/linux/pgtable.h
> +++ b/include/linux/pgtable.h
> @@ -232,9 +232,18 @@ static inline int pmd_dirty(pmd_t pmd)
>   * and the mode cannot be used in interrupt context.
>   */
>  #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE
> -#define arch_enter_lazy_mmu_mode()	do {} while (0)
> -#define arch_leave_lazy_mmu_mode()	do {} while (0)
> -#define arch_flush_lazy_mmu_mode()	do {} while (0)
> +static inline void arch_enter_lazy_mmu_mode(void)
> +{
> +	VM_WARN_ON(preemptible());
> +}
> +static inline void arch_leave_lazy_mmu_mode(void)
> +{
> +	VM_WARN_ON(preemptible());
> +}
> +static inline void arch_flush_lazy_mmu_mode(void)
> +{
> +	VM_WARN_ON(preemptible());
> +}
>  #endif
> =20
>  #ifndef pte_batch_hint



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Date: Fri, 11 Apr 2025 09:31:21 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jason Andryuk 
Cc: Stefano Stabellini ,
	xen-devel@lists.xenproject.org,
	Andrew Cooper ,
	Jan Beulich , Xenia.Ragiadakou@amd.com,
	Alejandro.GarciaVallejo@amd.com,
	"Lira, Victor M" 
Subject: Re: [RFC] xen/x86: allow overlaps with non-RAM regions
Message-ID: 
References: 
 
 <3c5dfd26-3c12-498b-aca4-0beac4e991a5@amd.com>
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Thanks Jason for getting back, I'm intrigued by this issue :).

On Thu, Apr 10, 2025 at 04:55:54PM -0400, Jason Andryuk wrote:
> On 2025-04-04 06:28, Roger Pau Monné wrote:
> > On Thu, Apr 03, 2025 at 06:01:42PM -0700, Stefano Stabellini wrote:
> > > On one Sapphire AMD x86 board, I see this:
> > > 
> > > 
> > > (XEN) [0000003943ca6ff2]  [00000000f0000000, 00000000f7ffffff] (reserved)
> > > (XEN) [00000039460886d9]  [00000000fd000000, 00000000ffffffff] (reserved)
> > > [...]
> > > (XEN) [    4.612235] 0000:02:00.0: not mapping BAR [fea00, fea03] invalid position
> > > 
> > > 
> > > Linux boots fine on this platform but Linux as Dom0 on Xen does not.
> > > This is because the pci_check_bar->is_memory_hole check fails due to the
> > > MMIO region overlapping with the EFI reserved region.
> > 
> > That's weird.  (Partially) the reason to not attempt to map such BAR
> > is that it should already be mapped, because at dom0 creation time all
> > reserved regions are added to the p2m (see arch_iommu_hwdom_init()).
> > If that's not the case we should figure out why this reserved region
> > is not added to dom0 p2m as part of arch_iommu_hwdom_init().
> 
> Victor discovered these regions are type 11 EfiMemoryMappedIO, but they get
> converted to e820 RESERVED.  The BAR points into it.
> 
> 00000f0000000-00000f7ffffff type=11 attr=800000000000100d
> 00000fd000000-00000fedfffff type=11 attr=800000000000100d
> 00000fee00000-00000fee00fff type=11 attr=8000000000000001
> 00000fee01000-00000ffffffff type=11 attr=800000000000100d
> 
> Xenia discovered Linux keeps small regions like this reserved, but lets
> larger ones (>= 256kb) become holes.  See the comment in Linux
> arch/x86/platform/efi/efi.c:efi_remove_e820_mmio() around line 301.

Right, but whatever Linux decides to do with the reserved regions
won't affect how Xen maps them into the p2m.  Anything that's reserved
in the e820 should end up identity mapped in the p2m for PVH dom0,
unless it's being exclusively used by Xen (see
dom0_setup_permissions() use of iomem_deny_access() to deny dom0
access to some MMIO regions).

> The description of EfiMemoryMappedIO is a little confusing, which is
> probably why its use in unclear.
> 
> ```
> Table 7.5 Memory Type Usage before ExitBootServices()
> EfiMemoryMappedIO
> 
> Used by system firmware to request that a memory-mapped IO region be mapped
> by the OS to a virtual address so it can be accessed by EFI runtime
> services.
> 
> Table 7.6 Memory Type Usage after ExitBootServices()
> EfiMemoryMappedIO
> 
> This memory is not used by the OS. All system memory-mapped IO information
> should come from ACPI tables.
> ```
> 
> The two after ExitBootServices sentences seem contradictory.  I wonder if it
> should be "Ignore this memory type - All system memory-mapped IO information
> should come from ACPI tables".

Not very helpful indeed.  The description in "before
ExitBootServices()" seems more sensible to me: if the MMIO region is
used by runtime services Xen should ensure it's always mapped in the
dom0 p2m (which Xen should in principle already do).

> > Can you paste the dom0 build output when booted with `iommu=verbose
> > dom0=pvh,verbose`?

Would it be possible to see the output of a debug=y build when booted
with `iommu=verbose dom0=pvh,verbose` (with or without pf-fixup,
either is fine).

I'm specially interested in the ranggeset contents printed after "d0:
identity mappings for IOMMU:", but if possible would like to see the
full boot log (including Linux dom0).

> > Does using `dom0=pvh,verbose,pf-fixup` solve the
> > boot issue? (and can you paste the output if it does)
> 
> pf-fixup did not resolve it.  The vpci pci_check_bar() check is independent
> of pf-fixup from what I can tell.

Yup, the check is independent, but pf-fixup would create additional
p2m mappings if required (note this is only available on staging).

Also, when using a build of Xen from staging you should now get
messages about unhandled memory accesses by a PVH dom0 whne not using
the `pf-fixup` option.

Thanks, Roger.


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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Anthony PERARD 
Subject: [PATCH 2/2] tootls/tests: introduce unit tests for rangesets
Date: Fri, 11 Apr 2025 09:55:02 +0200
Message-ID: <20250411075502.19926-3-roger.pau@citrix.com>
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Introduce some basic infrastructure for doing rangeset unit tests, and add
a few tests that ensure correctness of rangeset subtraction.

Signed-off-by: Roger Pau Monné 
---
 tools/tests/Makefile                 |   1 +
 tools/tests/rangeset/Makefile        |  45 ++++++
 tools/tests/rangeset/harness.h       |  71 +++++++++
 tools/tests/rangeset/test-rangeset.c | 228 +++++++++++++++++++++++++++
 4 files changed, 345 insertions(+)
 create mode 100644 tools/tests/rangeset/Makefile
 create mode 100644 tools/tests/rangeset/harness.h
 create mode 100644 tools/tests/rangeset/test-rangeset.c

diff --git a/tools/tests/Makefile b/tools/tests/Makefile
index 1319c3a9d88c..3e60ab6b268d 100644
--- a/tools/tests/Makefile
+++ b/tools/tests/Makefile
@@ -10,6 +10,7 @@ SUBDIRS-$(CONFIG_X86) += x86_emulator
 endif
 SUBDIRS-y += xenstore
 SUBDIRS-y += depriv
+SUBDIRS-y += rangeset
 SUBDIRS-y += vpci
 SUBDIRS-y += paging-mempool
 
diff --git a/tools/tests/rangeset/Makefile b/tools/tests/rangeset/Makefile
new file mode 100644
index 000000000000..451f67e1920f
--- /dev/null
+++ b/tools/tests/rangeset/Makefile
@@ -0,0 +1,45 @@
+XEN_ROOT=$(CURDIR)/../../..
+include $(XEN_ROOT)/tools/Rules.mk
+
+TARGET := test-rangeset
+
+.PHONY: all
+all: $(TARGET)
+
+.PHONY: run
+run: $(TARGET)
+	./$<
+
+.PHONY: clean
+clean:
+	$(RM) -- *.o $(TARGET) $(DEPS_RM)
+
+.PHONY: distclean
+distclean: clean
+	$(RM) -- *~
+
+.PHONY: install
+install: all
+	$(INSTALL_DIR) $(DESTDIR)$(LIBEXEC_BIN)
+	$(INSTALL_PROG) $(TARGET) $(DESTDIR)$(LIBEXEC_BIN)
+
+.PHONY: uninstall
+uninstall:
+	$(RM) -- $(addprefix $(DESTDIR)$(LIBEXEC_BIN)/,$(TARGET))
+
+list.h: $(XEN_ROOT)/xen/include/xen/list.h
+rangeset.h: $(XEN_ROOT)/xen/include/xen/rangeset.h
+list.h rangeset.h:
+	sed -e '/#include/d' <$< >$@
+
+rangeset.c: $(XEN_ROOT)/xen/common/rangeset.c list.h rangeset.h
+	# Remove includes and add the test harness header
+	sed -e '/#include/d' -e '1s/^/#include "harness.h"/' <$< >$@
+
+CFLAGS  += -D__XEN_TOOLS__
+CFLAGS  += $(APPEND_CFLAGS)
+CFLAGS += $(CFLAGS_xeninclude)
+LDFLAGS += $(APPEND_LDFLAGS)
+
+test-rangeset: rangeset.o test-rangeset.o
+	$(CC) $^ -o $@ $(LDFLAGS)
diff --git a/tools/tests/rangeset/harness.h b/tools/tests/rangeset/harness.h
new file mode 100644
index 000000000000..a60ebff72d0f
--- /dev/null
+++ b/tools/tests/rangeset/harness.h
@@ -0,0 +1,71 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Unit tests for rangesets.
+ *
+ * Copyright (C) 2025 Cloud Software Group
+ */
+
+#ifndef _TEST_HARNESS_
+#define _TEST_HARNESS_
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#define smp_wmb()
+#define __must_check __attribute__((__warn_unused_result__))
+#define cf_check
+
+#define BUG_ON(x) assert(!(x))
+#define ASSERT(x) assert(x)
+
+#include "list.h"
+#include "rangeset.h"
+
+typedef bool rwlock_t;
+typedef bool spinlock_t;
+
+struct domain {
+    unsigned int     domain_id;
+    struct list_head rangesets;
+    spinlock_t       rangesets_lock;
+};
+
+/* For rangeset_domain_{initialize,printk}() */
+#define spin_lock_init(l) (*(l) = false)
+#define spin_lock(l)      (*(l) = true)
+#define spin_unlock(l)    (*(l) = false)
+
+/* For rangeset->lock */
+#define rwlock_init(l)    (*(l) = false)
+#define read_lock(l)      (*(l) = true)
+#define read_unlock(l)    (*(l) = false)
+#define write_lock(l)     (*(l) = true)
+#define write_unlock(l)   (*(l) = false)
+
+#define xmalloc(type) ((type *)malloc(sizeof(type)))
+#define xfree free
+
+#define unlikely
+
+#define safe_strcpy strcpy
+
+#define printk printf
+
+#endif
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/tools/tests/rangeset/test-rangeset.c b/tools/tests/rangeset/test-rangeset.c
new file mode 100644
index 000000000000..b44cd217a050
--- /dev/null
+++ b/tools/tests/rangeset/test-rangeset.c
@@ -0,0 +1,228 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Unit tests for rangesets.
+ *
+ * Copyright (C) 2025 Cloud Software Group
+ */
+
+#include "harness.h"
+
+struct range {
+    unsigned long start, end;
+};
+
+struct action {
+    enum {
+        ADD,
+        REMOVE,
+    } action;
+    struct range r;
+};
+
+#define DECLARE_ACTIONS(nr) static const struct action actions ## nr []
+#define DECLARE_RESULTS(nr) static const struct range results ## nr []
+
+/*
+ * Subtract range with tail overlap on existing range:
+ *
+ * { 0, 1, 4, 5 } - { 3, 4 } = { 0, 1, 5, 5 }
+ */
+DECLARE_ACTIONS(0) = {
+    { ADD,    { 0, 1 } },
+    { ADD,    { 4, 5 } },
+    { REMOVE, { 3, 4 } },
+};
+DECLARE_RESULTS(0) = {
+    { 0, 1 }, { 5, 5 },
+};
+
+/*
+ * Subtract range with complete and tail overlap on existing ranges:
+ *
+ * { 0, 1, 4, 5, 7, 8 } - { 3, 4, 5, 6, 7 } = { 0, 1, 8 }
+ */
+DECLARE_ACTIONS(1) = {
+    { ADD,    { 0, 1 } },
+    { ADD,    { 4, 5 } },
+    { ADD,    { 7, 8 } },
+    { REMOVE, { 3, 7 } },
+};
+DECLARE_RESULTS(1) = {
+    { 0, 1 }, { 8, 8 },
+};
+
+/*
+ * Subtract range with no overlap:
+ *
+ * { 0, 1, 4, 5 } - { 2, 3 } = { 0, 1, 4, 5 }
+ */
+DECLARE_ACTIONS(2) = {
+    { ADD,    { 0, 1 } },
+    { ADD,    { 4, 5 } },
+    { REMOVE, { 2, 3 } },
+};
+DECLARE_RESULTS(2) = {
+    { 0, 1 }, { 4, 5 },
+};
+
+/*
+ * Subtract range with partial overlap on two existing ranges:
+ *
+ * { 0, 1, 4, 5 } - { 1, 4 } = { 0, 5 }
+ */
+DECLARE_ACTIONS(3) = {
+    { ADD,    { 0, 1 } },
+    { ADD,    { 4, 5 } },
+    { REMOVE, { 1, 4 } },
+};
+DECLARE_RESULTS(3) = {
+    { 0, 0 }, { 5, 5 },
+};
+
+static const struct test {
+    unsigned int nr_actions, nr_results;
+    const struct action *actions;
+    const struct range *result;
+} tests[] = {
+#define DECLARE_TEST(nr)                                \
+    {                                                   \
+        .actions = actions ## nr,                       \
+        .nr_actions = ARRAY_SIZE(actions ## nr),        \
+        .result  = results ## nr,                       \
+        .nr_results = ARRAY_SIZE(results ## nr),        \
+    }
+
+    DECLARE_TEST(0),
+    DECLARE_TEST(1),
+    DECLARE_TEST(2),
+    DECLARE_TEST(3),
+
+#undef DECLARE_TEST
+};
+
+static int print_range(unsigned long s, unsigned long e, void *data)
+{
+    printf("[%ld, %ld]\n", s, e);
+
+    return 0;
+}
+
+static int count_ranges(unsigned long s, unsigned long e, void *data)
+{
+    unsigned int *nr = data;
+
+    ++*nr;
+    return 0;
+}
+
+const struct range *expected;
+static int check_ranges(unsigned long s, unsigned long e, void *data)
+{
+    unsigned int *nr = data;
+    int rc = 0;
+
+    if ( s != expected[*nr].start || e != expected[*nr].end )
+        rc = -EINVAL;
+
+    ++*nr;
+    return rc;
+}
+
+static void print_both(struct rangeset *r, const struct range *expected,
+                       unsigned int nr_expected)
+{
+    unsigned int i;
+
+    printf("Result:\n");
+    rangeset_report_ranges(r, 0, ~0UL, print_range, NULL);
+    printf("Expected:\n");
+    for ( i = 0; i < nr_expected; i++ )
+        printf("[%ld, %ld]\n", expected[i].start, expected[i].end);
+}
+
+int main(int argc, char **argv)
+{
+    struct rangeset *r = rangeset_new(NULL, NULL, 0);
+    unsigned int i;
+    int ret_code = 0;
+
+    ASSERT(r);
+
+    for ( i = 0 ; i < ARRAY_SIZE(tests); i++ )
+    {
+        unsigned int j, nr = 0;
+        int rc = 0;
+
+        rangeset_purge(r);
+        for ( j = 0; j < tests[i].nr_actions; j++ )
+        {
+            const struct action *a = &tests[i].actions[j];
+
+            switch ( a->action )
+            {
+            case ADD:
+                rc = rangeset_add_range(r, a->r.start, a->r.end);
+                break;
+
+            case REMOVE:
+                rc = rangeset_remove_range(r, a->r.start, a->r.end);
+                break;
+            }
+
+            if ( rc )
+            {
+                printf("Test %u failed to %s range [%ld, %ld]\n",
+                       i, a->action == ADD ? "add" : "remove",
+                       a->r.start, a->r.end);
+                rangeset_report_ranges(r, 0, ~0UL, print_range, NULL);
+                break;
+            }
+        }
+
+        if ( rc )
+        {
+            /* Action failed, skip this test and set exit code to failure. */
+            ret_code = EXIT_FAILURE;
+            continue;
+        }
+
+        rc = rangeset_report_ranges(r, 0, ~0UL, count_ranges, &nr);
+        if ( rc )
+        {
+            printf("Test %u unable to count number of result ranges\n", i);
+            rangeset_report_ranges(r, 0, ~0UL, print_range, NULL);
+            ret_code = EXIT_FAILURE;
+            continue;
+        }
+        if ( nr != tests[i].nr_results )
+        {
+            printf("Test %u unexpected number of result ranges, expected: %u got: %u\n",
+                   i, tests[i].nr_results, nr);
+            print_both(r, tests[i].result, tests[i].nr_results);
+            ret_code = EXIT_FAILURE;
+            continue;
+        }
+
+        nr = 0;
+        expected = tests[i].result;
+        rc = rangeset_report_ranges(r, 0, ~0UL, check_ranges, &nr);
+        if ( rc )
+        {
+            printf("Test %u range checking failed\n", i);
+            print_both(r, tests[i].result, tests[i].nr_results);
+            ret_code = EXIT_FAILURE;
+            continue;
+        }
+    }
+
+    return 0;
+}
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
-- 
2.48.1



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	Stefano Stabellini 
Subject: [PATCH 1/2] xen/rangeset: fix incorrect subtraction
Date: Fri, 11 Apr 2025 09:55:01 +0200
Message-ID: <20250411075502.19926-2-roger.pau@citrix.com>
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Given the following rangset operation:

{ [0, 1], [4, 5] } - { [3, 4] }

The current rangeset logic will output a rangeset:

{ [0, 2], [5, 5] }

This is incorrect, and also has the undesirable property of being bogus in
a way that the resulting rangeset is expanded.

Fix this by making sure the bounds are correctly checked before modifying
the previous range.

Fixes: 484a058c4828 ('Add auto-destructing per-domain rangeset data structure...')
Signed-off-by: Roger Pau Monné 
---
 xen/common/rangeset.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/xen/common/rangeset.c b/xen/common/rangeset.c
index b75590f90744..e75871039087 100644
--- a/xen/common/rangeset.c
+++ b/xen/common/rangeset.c
@@ -227,7 +227,8 @@ int rangeset_remove_range(
 
         if ( x->s < s )
         {
-            x->e = s - 1;
+            if ( x->e >= s )
+                x->e = s - 1;
             x = next_range(r, x);
         }
 
-- 
2.48.1



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	Stefano Stabellini 
Subject: [PATCH 0/2] xen/rangeset: one bugfix and unit testing
Date: Fri, 11 Apr 2025 09:55:00 +0200
Message-ID: <20250411075502.19926-1-roger.pau@citrix.com>
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Hello,

Rangesets are extensively used inside of Xen, yet we had no
unit tests to ensure it's correctness.  rangeset_remove_range() is in
fact bogus and will generate an incorrect output rangeset depending on
the inputs.

Patch 1 fixes the bug, patch 2 adds some basic unit testing to ensure
the fix done by patch 1 is correct.  The unit testing should likely be
expanded (in a different series) to further assert the correctness of
other rangeset operations.

Thanks, Roger.

Roger Pau Monne (2):
  xen/rangeset: fix incorrect subtraction
  tootls/tests: introduce unit tests for rangesets

 tools/tests/Makefile                 |   1 +
 tools/tests/rangeset/Makefile        |  45 ++++++
 tools/tests/rangeset/harness.h       |  71 +++++++++
 tools/tests/rangeset/test-rangeset.c | 228 +++++++++++++++++++++++++++
 xen/common/rangeset.c                |   3 +-
 5 files changed, 347 insertions(+), 1 deletion(-)
 create mode 100644 tools/tests/rangeset/Makefile
 create mode 100644 tools/tests/rangeset/harness.h
 create mode 100644 tools/tests/rangeset/test-rangeset.c

-- 
2.48.1



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Subject: Re: [PATCH v2 1/8] driver/pci: Get next capability without passing
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On 11.04.2025 04:51, Chen, Jiqian wrote:
> On 2025/4/10 20:34, Jan Beulich wrote:
>> On 09.04.2025 08:45, Jiqian Chen wrote:
>>> --- a/xen/drivers/pci/pci.c
>>> +++ b/xen/drivers/pci/pci.c
>>> @@ -40,7 +40,7 @@ unsigned int pci_find_cap_offset(pci_sbdf_t sbdf, unsigned int cap)
>>>  }
>>>  
>>>  unsigned int pci_find_next_cap_ttl(pci_sbdf_t sbdf, unsigned int pos,
>>> -                                   const unsigned int caps[], unsigned int n,
>>> +                                   const unsigned int *caps, unsigned int n,
>>
>> I don't follow the need for this change.
> This changed is for my next patch "vpci/header: Emulate legacy capability list for host".
> Currently, vpci only emulates capability list for domU, not for dom0.
> For domU, vpci exposes a fixed capability array which calls "supported_caps".
> My changes want to emulate capability list for dom0.
> I think vpci should expose all devices capabilities to dom0.
> When I emulate it, I need to iterate over all capabilities without another fixed array,
> so I need this function to return the position of next capability directly when passing a zero length array to this function.

This doesn't answer my question. The change you need for the next patch is
the hunk below, not the one above. Aiui at least.

>>> @@ -55,6 +55,10 @@ unsigned int pci_find_next_cap_ttl(pci_sbdf_t sbdf, unsigned int pos,
>>>  
>>>          if ( id == 0xff )
>>>              break;
>>> +
>>> +        if ( !caps || n == 0 )
>>> +            return pos;
>>
>> Checking n to be zero ought to suffice here? In that case it doesn't matter
>> what caps is. Plus if n is non-zero, it clearly is an error if caps was NULL.
> Two checking is to prevent null pointer errors.
> But as you said, if checking n to be zero is enough, then I don't need to change the definition of this function.
> I will change in next version.

If you really wanted to, you could add e.g. ASSERT(caps) after this if().

Jan


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Subject: Re: [PATCH v2 2/8] vpci/header: Emulate legacy capability list for
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To: "Chen, Jiqian" 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 "xen-devel@lists.xenproject.org" ,
 "Huang, Ray" 
References: <20250409064528.405573-1-Jiqian.Chen@amd.com>
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On 11.04.2025 04:54, Chen, Jiqian wrote:
> On 2025/4/10 20:40, Jan Beulich wrote:
>> On 09.04.2025 08:45, Jiqian Chen wrote:
>>> Current logic of init_header() only emulates legacy capability list
>>> for guest, expand it to emulate for host too. So that it will be
>>> easy to hide a capability whose initialization fails and no need
>>> to distinguish host or guest.
>>
>> Before I (maybe) look at the patch as a hole: When you say "guest" you
>> mean "DomU" (which is a common pair of synonyms we use), whereas when
>> you say "host" you mean "Dom0"? The latter is not a common pair of
>> synonyms; "host" generally covers the entire system, including Xen and
>> all domains. See e.g. wording that we use in XSAs.
> Yes, guest means domU, host means dom0(or hardware domain?),

We're less strict about that latter distinction - in most contexts
dom0 == hwdom is assumed.

> I will change my word in next version

Thanks.

Jan


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Subject: Re: [RFC] xen/x86: allow overlaps with non-RAM regions
To: Jason Andryuk ,
 Stefano Stabellini 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Xenia.Ragiadakou@amd.com, Alejandro.GarciaVallejo@amd.com,
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From: Jan Beulich 
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On 10.04.2025 22:55, Jason Andryuk wrote:
> On 2025-04-04 04:07, Jan Beulich wrote:
>> On 04.04.2025 03:01, Stefano Stabellini wrote:
>>> On one Sapphire AMD x86 board, I see this:
>>>
>>>
>>> (XEN) [0000003943ca6ff2]  [00000000f0000000, 00000000f7ffffff] (reserved)
>>> (XEN) [00000039460886d9]  [00000000fd000000, 00000000ffffffff] (reserved)
>>> [...]
>>> (XEN) [    4.612235] 0000:02:00.0: not mapping BAR [fea00, fea03] invalid position
>>
>> I, too, see something like this on an SPR system. That's a firmware issue,
>> which hence first of all should be dealt with at the firmware side.
>>
>>> Linux boots fine on this platform but Linux as Dom0 on Xen does not.
>>> This is because the pci_check_bar->is_memory_hole check fails due to the
>>> MMIO region overlapping with the EFI reserved region.
>>
>> And then what's the actual, observable problem? On my system I haven't
>> noticed anything going wrong yet, albeit the affected device is also left
>> without a driver.
> 
> The nvme drive (0000:02:00.0 with the invalid position above) fails to 
> work and no root drive is available.

And what - if anything - does baremetal Linux say about this pretty obvious
firmware bug?

Jan


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Subject: Re: [RFC] xen/x86: allow overlaps with non-RAM regions
To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Jason Andryuk 
Cc: Stefano Stabellini ,
 xen-devel@lists.xenproject.org, Andrew Cooper ,
 Xenia.Ragiadakou@amd.com, Alejandro.GarciaVallejo@amd.com,
 "Lira, Victor M" 
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On 11.04.2025 09:31, Roger Pau Monné wrote:
> Yup, the check is independent, but pf-fixup would create additional
> p2m mappings if required (note this is only available on staging).

It's also in 4.19.2 and on the 4.20 branch. 4.18 is where I couldn't
easily backport it to.

Jan


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From: "Chen, Jiqian" 
To: Jan Beulich 
CC: Andrew Cooper , Anthony PERARD
	, "Orzel, Michal" , Julien
 Grall , =?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?=
	, Stefano Stabellini ,
	"xen-devel@lists.xenproject.org" , "Huang,
 Ray" , "Chen, Jiqian" 
Subject: Re: [PATCH v2 1/8] driver/pci: Get next capability without passing
 caps
Thread-Topic: [PATCH v2 1/8] driver/pci: Get next capability without passing
 caps
Thread-Index: AQHbqRsYW9r+TjshqU+vmdXYCVrO/7Oc16GAgAFv6YD//9W+AIAAh8GA
Date: Fri, 11 Apr 2025 08:08:12 +0000
Message-ID:
 
References: <20250409064528.405573-1-Jiqian.Chen@amd.com>
 <20250409064528.405573-2-Jiqian.Chen@amd.com>
 <5a18ae61-3ffa-41d1-aa1d-dce4d3ca0381@suse.com>
 
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Subject: Re: [RFC] xen/x86: allow overlaps with non-RAM regions
To: Jason Andryuk ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
Cc: xen-devel@lists.xenproject.org, Andrew Cooper
 , Xenia.Ragiadakou@amd.com,
 Alejandro.GarciaVallejo@amd.com, "Lira, Victor M" ,
 Stefano Stabellini 
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On 10.04.2025 22:55, Jason Andryuk wrote:
> On 2025-04-04 06:28, Roger Pau Monné wrote:
>> On Thu, Apr 03, 2025 at 06:01:42PM -0700, Stefano Stabellini wrote:
>>> On one Sapphire AMD x86 board, I see this:
>>>
>>>
>>> (XEN) [0000003943ca6ff2]  [00000000f0000000, 00000000f7ffffff] (reserved)
>>> (XEN) [00000039460886d9]  [00000000fd000000, 00000000ffffffff] (reserved)
>>> [...]
>>> (XEN) [    4.612235] 0000:02:00.0: not mapping BAR [fea00, fea03] invalid position
>>>
>>>
>>> Linux boots fine on this platform but Linux as Dom0 on Xen does not.
>>> This is because the pci_check_bar->is_memory_hole check fails due to the
>>> MMIO region overlapping with the EFI reserved region.
>>
>> That's weird.  (Partially) the reason to not attempt to map such BAR
>> is that it should already be mapped, because at dom0 creation time all
>> reserved regions are added to the p2m (see arch_iommu_hwdom_init()).
>> If that's not the case we should figure out why this reserved region
>> is not added to dom0 p2m as part of arch_iommu_hwdom_init().
> 
> Victor discovered these regions are type 11 EfiMemoryMappedIO, but they 
> get converted to e820 RESERVED.  The BAR points into it.
> 
> 00000f0000000-00000f7ffffff type=11 attr=800000000000100d
> 00000fd000000-00000fedfffff type=11 attr=800000000000100d
> 00000fee00000-00000fee00fff type=11 attr=8000000000000001
> 00000fee01000-00000ffffffff type=11 attr=800000000000100d
> 
> Xenia discovered Linux keeps small regions like this reserved, but lets 
> larger ones (>= 256kb) become holes.  See the comment in Linux 
> arch/x86/platform/efi/efi.c:efi_remove_e820_mmio() around line 301.

What a hack. And the mentioning of MMCFG space isn't even correct there,
I think. That space may legitimately be reserved (and at least older
Linux actually checked for that), unlike any ranges where BARs may live.
As to host bridge windows - I dare to question that they always need to
be "large". Similarly nothing guarantees the some non-window space
included in _CRS may not point at a "large" region.

Jan


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Subject: Re: [PATCH 1/2] xen/rangeset: fix incorrect subtraction
To: Roger Pau Monne 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <20250411075502.19926-1-roger.pau@citrix.com>
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On 11.04.2025 09:55, Roger Pau Monne wrote:
> Given the following rangset operation:
> 
> { [0, 1], [4, 5] } - { [3, 4] }
> 
> The current rangeset logic will output a rangeset:
> 
> { [0, 2], [5, 5] }
> 
> This is incorrect, and also has the undesirable property of being bogus in
> a way that the resulting rangeset is expanded.
> 
> Fix this by making sure the bounds are correctly checked before modifying
> the previous range.
> 
> Fixes: 484a058c4828 ('Add auto-destructing per-domain rangeset data structure...')
> Signed-off-by: Roger Pau Monné 

Reviewed-by: Jan Beulich 




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Subject: Re: [PATCH 2/2] tootls/tests: introduce unit tests for rangesets
To: Roger Pau Monne 
Cc: Anthony PERARD , xen-devel@lists.xenproject.org
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 <20250411075502.19926-3-roger.pau@citrix.com>
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On 11.04.2025 09:55, Roger Pau Monne wrote:
> Introduce some basic infrastructure for doing rangeset unit tests, and add
> a few tests that ensure correctness of rangeset subtraction.
> 
> Signed-off-by: Roger Pau Monné 

It's okay as is, so:
Reviewed-by: Jan Beulich 
Nevertheless a couple of remarks.

> --- /dev/null
> +++ b/tools/tests/rangeset/Makefile
> @@ -0,0 +1,45 @@
> +XEN_ROOT=$(CURDIR)/../../..
> +include $(XEN_ROOT)/tools/Rules.mk
> +
> +TARGET := test-rangeset
> +
> +.PHONY: all
> +all: $(TARGET)
> +
> +.PHONY: run
> +run: $(TARGET)
> +	./$<
> +
> +.PHONY: clean
> +clean:
> +	$(RM) -- *.o $(TARGET) $(DEPS_RM)
> +
> +.PHONY: distclean
> +distclean: clean
> +	$(RM) -- *~
> +
> +.PHONY: install
> +install: all
> +	$(INSTALL_DIR) $(DESTDIR)$(LIBEXEC_BIN)
> +	$(INSTALL_PROG) $(TARGET) $(DESTDIR)$(LIBEXEC_BIN)
> +
> +.PHONY: uninstall
> +uninstall:
> +	$(RM) -- $(addprefix $(DESTDIR)$(LIBEXEC_BIN)/,$(TARGET))
> +
> +list.h: $(XEN_ROOT)/xen/include/xen/list.h
> +rangeset.h: $(XEN_ROOT)/xen/include/xen/rangeset.h
> +list.h rangeset.h:
> +	sed -e '/#include/d' <$< >$@
> +
> +rangeset.c: $(XEN_ROOT)/xen/common/rangeset.c list.h rangeset.h
> +	# Remove includes and add the test harness header
> +	sed -e '/#include/d' -e '1s/^/#include "harness.h"/' <$< >$@
> +
> +CFLAGS  += -D__XEN_TOOLS__
> +CFLAGS  += $(APPEND_CFLAGS)
> +CFLAGS += $(CFLAGS_xeninclude)
> +LDFLAGS += $(APPEND_LDFLAGS)

The mix of padding ahead of the += is a little odd here.

> --- /dev/null
> +++ b/tools/tests/rangeset/harness.h
> @@ -0,0 +1,71 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Unit tests for rangesets.
> + *
> + * Copyright (C) 2025 Cloud Software Group
> + */
> +
> +#ifndef _TEST_HARNESS_
> +#define _TEST_HARNESS_
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include 
> +
> +#define smp_wmb()
> +#define __must_check __attribute__((__warn_unused_result__))
> +#define cf_check
> +
> +#define BUG_ON(x) assert(!(x))
> +#define ASSERT(x) assert(x)
> +
> +#include "list.h"
> +#include "rangeset.h"
> +
> +typedef bool rwlock_t;
> +typedef bool spinlock_t;

Are spinlocks really required for the rangeset code?

> --- /dev/null
> +++ b/tools/tests/rangeset/test-rangeset.c
> @@ -0,0 +1,228 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Unit tests for rangesets.
> + *
> + * Copyright (C) 2025 Cloud Software Group
> + */
> +
> +#include "harness.h"
> +
> +struct range {
> +    unsigned long start, end;
> +};
> +
> +struct action {
> +    enum {
> +        ADD,
> +        REMOVE,
> +    } action;
> +    struct range r;
> +};
> +
> +#define DECLARE_ACTIONS(nr) static const struct action actions ## nr []
> +#define DECLARE_RESULTS(nr) static const struct range results ## nr []
> +
> +/*
> + * Subtract range with tail overlap on existing range:
> + *
> + * { 0, 1, 4, 5 } - { 3, 4 } = { 0, 1, 5, 5 }
> + */
> +DECLARE_ACTIONS(0) = {
> +    { ADD,    { 0, 1 } },
> +    { ADD,    { 4, 5 } },
> +    { REMOVE, { 3, 4 } },
> +};
> +DECLARE_RESULTS(0) = {
> +    { 0, 1 }, { 5, 5 },
> +};
> +
> +/*
> + * Subtract range with complete and tail overlap on existing ranges:
> + *
> + * { 0, 1, 4, 5, 7, 8 } - { 3, 4, 5, 6, 7 } = { 0, 1, 8 }
> + */
> +DECLARE_ACTIONS(1) = {
> +    { ADD,    { 0, 1 } },
> +    { ADD,    { 4, 5 } },
> +    { ADD,    { 7, 8 } },
> +    { REMOVE, { 3, 7 } },
> +};
> +DECLARE_RESULTS(1) = {
> +    { 0, 1 }, { 8, 8 },
> +};
> +
> +/*
> + * Subtract range with no overlap:
> + *
> + * { 0, 1, 4, 5 } - { 2, 3 } = { 0, 1, 4, 5 }
> + */
> +DECLARE_ACTIONS(2) = {
> +    { ADD,    { 0, 1 } },
> +    { ADD,    { 4, 5 } },
> +    { REMOVE, { 2, 3 } },
> +};
> +DECLARE_RESULTS(2) = {
> +    { 0, 1 }, { 4, 5 },
> +};
> +
> +/*
> + * Subtract range with partial overlap on two existing ranges:
> + *
> + * { 0, 1, 4, 5 } - { 1, 4 } = { 0, 5 }
> + */
> +DECLARE_ACTIONS(3) = {
> +    { ADD,    { 0, 1 } },
> +    { ADD,    { 4, 5 } },
> +    { REMOVE, { 1, 4 } },
> +};
> +DECLARE_RESULTS(3) = {
> +    { 0, 0 }, { 5, 5 },
> +};
> +
> +static const struct test {
> +    unsigned int nr_actions, nr_results;
> +    const struct action *actions;
> +    const struct range *result;
> +} tests[] = {
> +#define DECLARE_TEST(nr)                                \
> +    {                                                   \
> +        .actions = actions ## nr,                       \
> +        .nr_actions = ARRAY_SIZE(actions ## nr),        \
> +        .result  = results ## nr,                       \
> +        .nr_results = ARRAY_SIZE(results ## nr),        \
> +    }
> +
> +    DECLARE_TEST(0),
> +    DECLARE_TEST(1),
> +    DECLARE_TEST(2),
> +    DECLARE_TEST(3),
> +
> +#undef DECLARE_TEST
> +};
> +
> +static int print_range(unsigned long s, unsigned long e, void *data)
> +{
> +    printf("[%ld, %ld]\n", s, e);
> +
> +    return 0;
> +}
> +
> +static int count_ranges(unsigned long s, unsigned long e, void *data)
> +{
> +    unsigned int *nr = data;
> +
> +    ++*nr;
> +    return 0;
> +}
> +
> +const struct range *expected;

static?

Jan


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Date: Fri, 11 Apr 2025 11:00:41 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: Anthony PERARD ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH 2/2] tootls/tests: introduce unit tests for rangesets
Message-ID: 
References: <20250411075502.19926-1-roger.pau@citrix.com>
 <20250411075502.19926-3-roger.pau@citrix.com>
 <964624cb-2b21-4228-8774-2fd697ae13e6@suse.com>
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On Fri, Apr 11, 2025 at 10:21:08AM +0200, Jan Beulich wrote:
> On 11.04.2025 09:55, Roger Pau Monne wrote:
> > --- /dev/null
> > +++ b/tools/tests/rangeset/harness.h
> > @@ -0,0 +1,71 @@
> > +/* SPDX-License-Identifier: GPL-2.0-only */
> > +/*
> > + * Unit tests for rangesets.
> > + *
> > + * Copyright (C) 2025 Cloud Software Group
> > + */
> > +
> > +#ifndef _TEST_HARNESS_
> > +#define _TEST_HARNESS_
> > +
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +
> > +#include 
> > +
> > +#define smp_wmb()
> > +#define __must_check __attribute__((__warn_unused_result__))
> > +#define cf_check
> > +
> > +#define BUG_ON(x) assert(!(x))
> > +#define ASSERT(x) assert(x)
> > +
> > +#include "list.h"
> > +#include "rangeset.h"
> > +
> > +typedef bool rwlock_t;
> > +typedef bool spinlock_t;
> 
> Are spinlocks really required for the rangeset code?

It's noted a bit below in this same file:

/* For rangeset_domain_{initialize,printk}() */

Otherwise rangeset.c won't build.

Will adjust the rest of your comments before commit, thanks!

Roger.


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Hi,

On 08/04/2025 10:13, Orzel, Michal wrote:
>
> On 07/04/2025 20:44, Ayan Kumar Halder wrote:
>> We have created the same boot-time MPU protection regions as Armv8-R AArch64.
>> Also, we have defined *_PRBAR macros for arm32. The only difference from
>> arm64 is that XN is 1-bit for arm32.
>> The macros have been defined in mpu/cpregs.h.
> NIT: Describe your changes in imperative mood
>
>> Also defined WRITE_SYSREG_ASM() to write to system registers in assembly.
>>
>> Signed-off-by: Ayan Kumar Halder 
>> ---
>> Changes from
>>
>> v1 -
>>
>> 1. enable_mpu() now sets HMAIR{0,1} registers. This is similar to what is
>> being done in enable_mmu(). All the mm related configurations happen in this
>> function.
>>
>> 2. Fixed some typos.
>>
>> v2 -
>> 1. Include the common prepare_xen_region.inc in head.S.
>>
>> 2. Define LOAD_SYSREG()/STORE_SYSREG() for arm32.
>>
>> v3 -
>> 1. Rename STORE_SYSREG() as WRITE_SYSREG_ASM()
>>
>> 2. enable_boot_cpu_mm() is defined in head.S
>>
>> v4 -
>> 1. *_PRBAR is moved to arm32/sysregs.h.
>>
>> 2. MPU specific CP15 system registers are defined in mpu/cpregs.h.
>>
>>   xen/arch/arm/arm32/Makefile              |   1 +
>>   xen/arch/arm/arm32/mpu/Makefile          |   1 +
>>   xen/arch/arm/arm32/mpu/head.S            | 101 +++++++++++++++++++++++
>>   xen/arch/arm/include/asm/arm32/sysregs.h |   7 ++
>>   xen/arch/arm/include/asm/cpregs.h        |   4 +
>>   xen/arch/arm/include/asm/mpu/cpregs.h    |  24 ++++++
>>   6 files changed, 138 insertions(+)
>>   create mode 100644 xen/arch/arm/arm32/mpu/Makefile
>>   create mode 100644 xen/arch/arm/arm32/mpu/head.S
>>   create mode 100644 xen/arch/arm/include/asm/mpu/cpregs.h
>>
>> diff --git a/xen/arch/arm/arm32/Makefile b/xen/arch/arm/arm32/Makefile
>> index 40a2b4803f..537969d753 100644
>> --- a/xen/arch/arm/arm32/Makefile
>> +++ b/xen/arch/arm/arm32/Makefile
>> @@ -1,5 +1,6 @@
>>   obj-y += lib/
>>   obj-$(CONFIG_MMU) += mmu/
>> +obj-$(CONFIG_MPU) += mpu/
>>   
>>   obj-$(CONFIG_EARLY_PRINTK) += debug.o
>>   obj-y += domctl.o
>> diff --git a/xen/arch/arm/arm32/mpu/Makefile b/xen/arch/arm/arm32/mpu/Makefile
>> new file mode 100644
>> index 0000000000..3340058c08
>> --- /dev/null
>> +++ b/xen/arch/arm/arm32/mpu/Makefile
>> @@ -0,0 +1 @@
>> +obj-y += head.o
>> diff --git a/xen/arch/arm/arm32/mpu/head.S b/xen/arch/arm/arm32/mpu/head.S
>> new file mode 100644
>> index 0000000000..84e9f1f8ec
>> --- /dev/null
>> +++ b/xen/arch/arm/arm32/mpu/head.S
>> @@ -0,0 +1,101 @@
>> +/* SPDX-License-Identifier: GPL-2.0-only */
>> +/*
>> + * Start-of-day code for an Armv8-R MPU system.
> That's exactly the same text as for Aarch64. At least write Armv8A-R-AArch32.
Ack
>
>> + */
>> +
>> +#include 
>> +#include 
>> +#include 
>> +
>> +/*
>> + * Set up the memory attribute type tables and enable EL2 MPU and data cache.
>> + * If the Background region is enabled, then the MPU uses the default memory
>> + * map as the Background region for generating the memory
>> + * attributes when MPU is disabled.
>> + * Since the default memory map of the Armv8-R AArch32 architecture is
>> + * IMPLEMENTATION DEFINED, we intend to turn off the Background region here.
>> + *
>> + * Clobbers r0 - r1
>> + */
>> +FUNC_LOCAL(enable_mpu)
>> +    /* Set up memory attribute type tables */
>> +    mov_w r0, MAIR0VAL
>> +    mov_w r1, MAIR1VAL
>> +    mcr   CP32(r0, HMAIR0)
>> +    mcr   CP32(r1, HMAIR1)
> Is there really a need to do these 2 writes one after another?
> Why can't we use only r0 and save one clobbered reg?
> mov_w r0, MAIR0VAL
> mcr   CP32(r0, HMAIR0)
> mov_w r0, MAIR1VAL
> mcr   CP32(r0, HMAIR1)
I just copied it as it is from head.S. :) I will change it in v6.
>
>> +
>> +    mrc   CP32(r0, HSCTLR)
>> +    bic   r0, r0, #SCTLR_ELx_BR       /* Disable Background region */
>> +    orr   r0, r0, #SCTLR_Axx_ELx_M    /* Enable MPU */
>> +    orr   r0, r0, #SCTLR_Axx_ELx_C    /* Enable D-cache */
>> +    mcr   CP32(r0, HSCTLR)
>> +    isb
>> +
>> +    ret
>> +END(enable_mpu)
>> +
>> +/*
>> + * Maps the various sections of Xen (described in xen.lds.S) as different MPU
>> + * regions.
>> + *
>> + * Clobbers r0 - r5
>> + *
>> + */
>> +FUNC(enable_boot_cpu_mm)
>> +    /* Get the number of regions specified in MPUIR_EL2 */
>> +    mrc   CP32(r5, MPUIR_EL2)
>> +    and   r5, r5, #NUM_MPU_REGIONS_MASK
>> +
>> +    /* x0: region sel */
>> +    mov   r0, #0
>> +    /* Xen text section. */
>> +    mov_w   r1, _stext
>> +    mov_w   r2, _etext
>> +    prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_TEXT_PRBAR
>> +
>> +    /* Xen read-only data section. */
>> +    mov_w   r1, _srodata
>> +    mov_w   r2, _erodata
>> +    prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_RO_PRBAR
>> +
>> +    /* Xen read-only after init and data section. (RW data) */
>> +    mov_w   r1, __ro_after_init_start
>> +    mov_w   r2, __init_begin
>> +    prepare_xen_region r0, r1, r2, r3, r4, r5
>> +
>> +    /* Xen code section. */
>> +    mov_w   r1, __init_begin
>> +    mov_w   r2, __init_data_begin
>> +    prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_TEXT_PRBAR
>> +
>> +    /* Xen data and BSS section. */
>> +    mov_w   r1, __init_data_begin
>> +    mov_w   r2, __bss_end
>> +    prepare_xen_region r0, r1, r2, r3, r4, r5
>> +
>> +#ifdef CONFIG_EARLY_PRINTK
>> +    /* Xen early UART section. */
>> +    mov_w   r1, CONFIG_EARLY_UART_BASE_ADDRESS
>> +    mov_w   r2, (CONFIG_EARLY_UART_BASE_ADDRESS + CONFIG_EARLY_UART_SIZE)
>> +    prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_DEVICE_PRBAR, attr_prlar=REGION_DEVICE_PRLAR
>> +#endif
>> +
>> +    b    enable_mpu
>> +END(enable_boot_cpu_mm)
>> +
>> +/*
>> + * We don't yet support secondary CPUs bring-up. Implement a dummy helper to
>> + * please the common code.
>> + */
>> +FUNC(enable_secondary_cpu_mm)
>> +    PRINT("- SMP not enabled yet -\r\n")
>> +1:  wfe
>> +    b 1b
>> +END(enable_secondary_cpu_mm)
>> +
>> +/*
>> + * Local variables:
>> + * mode: ASM
>> + * indent-tabs-mode: nil
>> + * End:
>> + */
>> diff --git a/xen/arch/arm/include/asm/arm32/sysregs.h b/xen/arch/arm/include/asm/arm32/sysregs.h
>> index 22871999af..a90d1610a1 100644
>> --- a/xen/arch/arm/include/asm/arm32/sysregs.h
>> +++ b/xen/arch/arm/include/asm/arm32/sysregs.h
>> @@ -20,6 +20,13 @@
>>    * uses r0 as a placeholder register. */
>>   #define CMD_CP32(name...)      "mcr " __stringify(CP32(r0, name)) ";"
>>   
>> +#define REGION_TEXT_PRBAR       0x18    /* SH=11 AP=10 XN=0 */
>> +#define REGION_RO_PRBAR         0x1D    /* SH=11 AP=10 XN=1 */
>> +#define REGION_DATA_PRBAR       0x19    /* SH=11 AP=00 XN=1 */
>> +#define REGION_DEVICE_PRBAR     0x11    /* SH=10 AP=00 XN=1 */
>> +
>> +#define WRITE_SYSREG_ASM(v, name) mcr CP32(v, name)
> Same comment as for previous patch.
Ack.
>
>> +
>>   #ifndef __ASSEMBLY__
>>   
>>   /* C wrappers */
>> diff --git a/xen/arch/arm/include/asm/cpregs.h b/xen/arch/arm/include/asm/cpregs.h
>> index aec9e8f329..6019a2cbdd 100644
>> --- a/xen/arch/arm/include/asm/cpregs.h
>> +++ b/xen/arch/arm/include/asm/cpregs.h
>> @@ -1,6 +1,10 @@
>>   #ifndef __ASM_ARM_CPREGS_H
>>   #define __ASM_ARM_CPREGS_H
>>   
>> +#ifdef CONFIG_MPU
> NIT: Do we really need to protect this include? I thought we do the ifdefery if
> we need to include either mmu or mpu. Here we don't have a choice and afaict
> there's nothing problematic in mpu/cpregs.h
Ack.
>
>> +#include 
>> +#endif
>> +
>>   /*
>>    * AArch32 Co-processor registers.
>>    *
>> diff --git a/xen/arch/arm/include/asm/mpu/cpregs.h b/xen/arch/arm/include/asm/mpu/cpregs.h
>> new file mode 100644
>> index 0000000000..6b20c7ceae
>> --- /dev/null
>> +++ b/xen/arch/arm/include/asm/mpu/cpregs.h
>> @@ -0,0 +1,24 @@
>> +/* SPDX-License-Identifier: GPL-2.0-only */
>> +
>> +#ifndef __ASM_ARM_MPU_CPREGS_H
>> +#define __ASM_ARM_MPU_CPREGS_H
>> +
>> +/* CP15 CR0: MPU Type Register */
>> +#define HMPUIR          p15,4,c0,c0,4
>> +
>> +/* CP15 CR6: MPU Protection Region Base/Limit/Select Address Register */
>> +#define HPRSELR         p15,4,c6,c2,1
>> +#define PRBAR_EL2       p15,4,c6,c3,0
>> +#define PRLAR_EL2       p15,4,c6,c8,1
>> +
>> +#define MPUIR_EL2       HMPUIR
>> +#define PRSELR_EL2      HPRSELR
> AFAIK, these macros are there to use AArch64 sysreg names in common code when
> compiling Arm32. This would mean they should be protected with #ifdef CONFIG_ARM_32.

In the case of Arm64, the MPU system registers are defined by the 
compiler. So, these definitions are overridden.

I will enclose this within CONFIG_ARM_32 for better readability.

@Luca - I will keep your R-b unless you object. The changes are mostly 
style related. :)

- Ayan

>
> ~Michal
>


From xen-devel-bounces@lists.xenproject.org Fri Apr 11 09:27:23 2025
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Date: Fri, 11 Apr 2025 11:27:06 +0200
From: Ingo Molnar 
To: Juergen Gross 
Cc: Jason Andryuk ,
	Boris Ostrovsky ,
	Thomas Gleixner ,
	Ingo Molnar , Borislav Petkov ,
	Dave Hansen , x86@kernel.org,
	"H. Peter Anvin" , "Xin Li (Intel)" ,
	xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] x86/xen: Fix __xen_hypercall_setfunc
Message-ID: 
References: <20250410193106.16353-1-jason.andryuk@amd.com>
 <3c3115a6-f516-4f5f-8998-dafc343c829e@suse.com>
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* Juergen Gross  wrote:

> On 10.04.25 21:31, Jason Andryuk wrote:
> > Hypercall detection is failing with xen_hypercall_intel() chosen even on
> > an AMD processor.  Looking at the disassembly, the call to
> > xen_get_vendor() was removed.
> > 
> > The check for boot_cpu_has(X86_FEATURE_CPUID) was used as a proxy for
> > the x86_vendor having been set.  When
> > CONFIG_X86_REQUIRED_FEATURE_CPUID=y (the default value), DCE eliminates
> > the call to xen_get_vendor().  An uninitialized value 0 means
> > X86_VENDOR_INTEL, so the Intel function is always returned.
> > 
> > Remove the if and always call xen_get_vendor() to avoid this issue.
> > 
> > Fixes: 3d37d9396eb3 ("x86/cpufeatures: Add {REQUIRED,DISABLED} feature configs")
> > Suggested-by: Juergen Gross 
> > Signed-off-by: Jason Andryuk 
> 
> Reviewed-by: Juergen Gross 

Wanna merge this via the Xen tree, or should it go to x86/urgent?

The bug was *caused* by the x86 tree so we'd be glad to merge,
but your call.

If you'll merge it:

  Acked-by: Ingo Molnar 

Thanks,

	Ingo




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Message-ID: 
Date: Fri, 11 Apr 2025 11:29:47 +0200
MIME-Version: 1.0
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Subject: Re: [PATCH] x86/xen: Fix __xen_hypercall_setfunc
To: Ingo Molnar 
Cc: Jason Andryuk ,
 Boris Ostrovsky ,
 Thomas Gleixner , Ingo Molnar ,
 Borislav Petkov , Dave Hansen ,
 x86@kernel.org, "H. Peter Anvin" ,
 "Xin Li (Intel)" , xen-devel@lists.xenproject.org,
 linux-kernel@vger.kernel.org
References: <20250410193106.16353-1-jason.andryuk@amd.com>
 <3c3115a6-f516-4f5f-8998-dafc343c829e@suse.com> 
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From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= 
To: Ingo Molnar 
Cc: Jason Andryuk ,
 Boris Ostrovsky ,
 Thomas Gleixner , Ingo Molnar ,
 Borislav Petkov , Dave Hansen ,
 x86@kernel.org, "H. Peter Anvin" ,
 "Xin Li (Intel)" , xen-devel@lists.xenproject.org,
 linux-kernel@vger.kernel.org
Message-ID: 
Subject: Re: [PATCH] x86/xen: Fix __xen_hypercall_setfunc
References: <20250410193106.16353-1-jason.andryuk@amd.com>
 <3c3115a6-f516-4f5f-8998-dafc343c829e@suse.com> 
In-Reply-To: 

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From xen-devel-bounces@lists.xenproject.org Fri Apr 11 09:44:26 2025
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Date: Fri, 11 Apr 2025 11:44:07 +0200
From: Ingo Molnar 
To: =?iso-8859-1?Q?J=FCrgen_Gro=DF?= 
Cc: Jason Andryuk ,
	Boris Ostrovsky ,
	Thomas Gleixner ,
	Ingo Molnar , Borislav Petkov ,
	Dave Hansen , x86@kernel.org,
	"H. Peter Anvin" , "Xin Li (Intel)" ,
	xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] x86/xen: Fix __xen_hypercall_setfunc
Message-ID: 
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* Jrgen Gro  wrote:

> On 11.04.25 11:27, Ingo Molnar wrote:
> > 
> > * Juergen Gross  wrote:
> > 
> > > On 10.04.25 21:31, Jason Andryuk wrote:
> > > > Hypercall detection is failing with xen_hypercall_intel() chosen even on
> > > > an AMD processor.  Looking at the disassembly, the call to
> > > > xen_get_vendor() was removed.
> > > > 
> > > > The check for boot_cpu_has(X86_FEATURE_CPUID) was used as a proxy for
> > > > the x86_vendor having been set.  When
> > > > CONFIG_X86_REQUIRED_FEATURE_CPUID=y (the default value), DCE eliminates
> > > > the call to xen_get_vendor().  An uninitialized value 0 means
> > > > X86_VENDOR_INTEL, so the Intel function is always returned.
> > > > 
> > > > Remove the if and always call xen_get_vendor() to avoid this issue.
> > > > 
> > > > Fixes: 3d37d9396eb3 ("x86/cpufeatures: Add {REQUIRED,DISABLED} feature configs")
> > > > Suggested-by: Juergen Gross 
> > > > Signed-off-by: Jason Andryuk 
> > > 
> > > Reviewed-by: Juergen Gross 
> > 
> > Wanna merge this via the Xen tree, or should it go to x86/urgent?
> > 
> > The bug was *caused* by the x86 tree so we'd be glad to merge,
> > but your call.
> 
> x86/urgent is fine for me.

Applied, thanks!

	Ingo






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On 11/04/2025 10:35 am, Anthony PERARD wrote:
> On Thu, Apr 10, 2025 at 11:11:49AM +0100, Andrew Cooper wrote:
>> Which is another thing I haven't posted, because it turns out our
>> docker-in-docker only works for x86, not for ARM.
> Fixed! I've installed `qemu-user-static` on the runner
> which run jobs with tag `container-builder`.

Oh excellent.

https://gitlab.com/xen-project/hardware/test-artifacts/-/jobs/9691896141
was happy.

~Andrew


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Date: Fri, 11 Apr 2025 11:04:46 +0100
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v5 3/3] xen/arm32: mpu: Stubs to build MPU for arm32
Content-Language: en-GB
To: "Orzel, Michal" ,
 Ayan Kumar Halder , xen-devel@lists.xenproject.org
Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
 Volodymyr Babchuk 
References: <20250407184443.1790995-1-ayan.kumar.halder@amd.com>
 <20250407184443.1790995-4-ayan.kumar.halder@amd.com>
 
From: Ayan Kumar Halder 
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Hi,

On 08/04/2025 10:54, Orzel, Michal wrote:
>
> On 07/04/2025 20:44, Ayan Kumar Halder wrote:
>> Add stubs to enable compilation
> NIT: missing dot at the end of sentence.
>
>> Signed-off-by: Ayan Kumar Halder 
>> ---
>> Changes from :-
>>
>> v1, v2 -
>> 1. New patch introduced in v3.
>> 2. Should be applied on top of
>> https://patchwork.kernel.org/project/xen-devel/cover/20250316192445.2376484-1-luca.fancellu@arm.com/
>>
>> v3 -
>> 1. Add stubs for map_domain_page() and similar functions.
>>
>> 2. 'BUG_ON("unimplemented")' is kept in all the stubs.
>>
>> v4 -
>> 1. is_xen_heap_mfn() macros are defined across mpu/mm.h (ARM32 specific)
>> , mmu/mm.h (ARM32 specific) and asm/mm.h (ARM64 specific)
>>
>> 2. s/(void*)0/NULL
>>
>>   xen/arch/arm/arm32/mpu/Makefile   |  2 ++
>>   xen/arch/arm/arm32/mpu/p2m.c      | 18 ++++++++++++++
>>   xen/arch/arm/arm32/mpu/smpboot.c  | 23 +++++++++++++++++
>>   xen/arch/arm/include/asm/mm.h     |  9 +------
>>   xen/arch/arm/include/asm/mmu/mm.h |  9 +++++++
>>   xen/arch/arm/include/asm/mpu/mm.h |  5 ++++
>>   xen/arch/arm/mpu/Makefile         |  1 +
>>   xen/arch/arm/mpu/domain_page.c    | 41 +++++++++++++++++++++++++++++++
>>   8 files changed, 100 insertions(+), 8 deletions(-)
>>   create mode 100644 xen/arch/arm/arm32/mpu/p2m.c
>>   create mode 100644 xen/arch/arm/arm32/mpu/smpboot.c
>>   create mode 100644 xen/arch/arm/mpu/domain_page.c
>>
>> diff --git a/xen/arch/arm/arm32/mpu/Makefile b/xen/arch/arm/arm32/mpu/Makefile
>> index 3340058c08..38797f28af 100644
>> --- a/xen/arch/arm/arm32/mpu/Makefile
>> +++ b/xen/arch/arm/arm32/mpu/Makefile
>> @@ -1 +1,3 @@
>>   obj-y += head.o
>> +obj-y += smpboot.o
>> +obj-y += p2m.o
> Sort alphabetically. Always.
>
>> diff --git a/xen/arch/arm/arm32/mpu/p2m.c b/xen/arch/arm/arm32/mpu/p2m.c
>> new file mode 100644
>> index 0000000000..df8de5c7d8
>> --- /dev/null
>> +++ b/xen/arch/arm/arm32/mpu/p2m.c
>> @@ -0,0 +1,18 @@
>> +/* SPDX-License-Identifier: GPL-2.0-only */
>> +
>> +#include 
>> +#include 
>> +
>> +void __init setup_virt_paging(void)
>> +{
>> +    BUG_ON("unimplemented");
>> +}
>> +
>> +/*
>> + * Local variables:
>> + * mode: C
>> + * c-file-style: "BSD"
>> + * c-basic-offset: 4
>> + * indent-tabs-mode: nil
>> + * End:
>> + */
>> diff --git a/xen/arch/arm/arm32/mpu/smpboot.c b/xen/arch/arm/arm32/mpu/smpboot.c
>> new file mode 100644
>> index 0000000000..3f3e54294e
>> --- /dev/null
>> +++ b/xen/arch/arm/arm32/mpu/smpboot.c
>> @@ -0,0 +1,23 @@
>> +/* SPDX-License-Identifier: GPL-2.0-only */
>> +
>> +#include 
>> +
>> +int prepare_secondary_mm(int cpu)
>> +{
>> +    BUG_ON("unimplemented");
>> +    return -EINVAL;
>> +}
>> +
>> +void update_boot_mapping(bool enable)
>> +{
>> +    BUG_ON("unimplemented");
>> +}
>> +
>> +/*
>> + * Local variables:
>> + * mode: C
>> + * c-file-style: "BSD"
>> + * c-basic-offset: 4
>> + * indent-tabs-mode: nil
>> + * End:
>> + */
>> diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h
>> index fbffaccef4..5b67c0f8bb 100644
>> --- a/xen/arch/arm/include/asm/mm.h
>> +++ b/xen/arch/arm/include/asm/mm.h
>> @@ -170,14 +170,7 @@ struct page_info
>>   #define _PGC_need_scrub   _PGC_allocated
>>   #define PGC_need_scrub    PGC_allocated
>>   
>> -#ifdef CONFIG_ARM_32
>> -#define is_xen_heap_page(page) is_xen_heap_mfn(page_to_mfn(page))
>> -#define is_xen_heap_mfn(mfn) ({                                 \
>> -    unsigned long mfn_ = mfn_x(mfn);                            \
>> -    (mfn_ >= mfn_x(directmap_mfn_start) &&                      \
>> -     mfn_ < mfn_x(directmap_mfn_end));                          \
>> -})
>> -#else
> At first sight, it's not clear why we diverge here and move Arm32 but not Arm64.
> At least I'd expect some reasoning for this change in commit msg.
I added an explaination why the code is moved for Arm32 in my latest patch.
>
>> +#ifdef CONFIG_ARM_64
>>   #define is_xen_heap_page(page) ((page)->count_info & PGC_xen_heap)
>>   #define is_xen_heap_mfn(mfn) \
>>       (mfn_valid(mfn) && is_xen_heap_page(mfn_to_page(mfn)))
>> diff --git a/xen/arch/arm/include/asm/mmu/mm.h b/xen/arch/arm/include/asm/mmu/mm.h
>> index caba987edc..9b98d12b07 100644
>> --- a/xen/arch/arm/include/asm/mmu/mm.h
>> +++ b/xen/arch/arm/include/asm/mmu/mm.h
>> @@ -21,6 +21,15 @@ extern unsigned long directmap_base_pdx;
>>   
>>   #define frame_table ((struct page_info *)FRAMETABLE_VIRT_START)
>>   
>> +#ifdef CONFIG_ARM_32
> Why another #ifdef if there is one a few lines below in this file (below
> virt_to_maddr)?
Ack. I have moved it.
>
>> +#define is_xen_heap_page(page) is_xen_heap_mfn(page_to_mfn(page))
>> +#define is_xen_heap_mfn(mfn) ({                                 \
>> +    unsigned long mfn_ = mfn_x(mfn);                            \
>> +    (mfn_ >= mfn_x(directmap_mfn_start) &&                      \
>> +     mfn_ < mfn_x(directmap_mfn_end));                          \
>> +})
>> +#endif
>> +
>>   #define virt_to_maddr(va) ({                                                   \
>>       vaddr_t va_ = (vaddr_t)(va);                                               \
>>       (paddr_t)((va_to_par(va_) & PADDR_MASK & PAGE_MASK) | (va_ & ~PAGE_MASK)); \
>> diff --git a/xen/arch/arm/include/asm/mpu/mm.h b/xen/arch/arm/include/asm/mpu/mm.h
>> index 86f33d9836..bfd840fa5d 100644
>> --- a/xen/arch/arm/include/asm/mpu/mm.h
>> +++ b/xen/arch/arm/include/asm/mpu/mm.h
>> @@ -13,6 +13,11 @@ extern struct page_info *frame_table;
>>   
>>   #define virt_to_maddr(va) ((paddr_t)((vaddr_t)(va) & PADDR_MASK))
>>   
>> +#ifdef CONFIG_ARM_32
>> +#define is_xen_heap_page(page) ({ BUG_ON("unimplemented"); false; })
>> +#define is_xen_heap_mfn(mfn) ({ BUG_ON("unimplemented"); false; })
>> +#endif
>> +
>>   /* On MPU systems there is no translation, ma == va. */
>>   static inline void *maddr_to_virt(paddr_t ma)
>>   {
>> diff --git a/xen/arch/arm/mpu/Makefile b/xen/arch/arm/mpu/Makefile
>> index 21bbc517b5..ff221011d5 100644
>> --- a/xen/arch/arm/mpu/Makefile
>> +++ b/xen/arch/arm/mpu/Makefile
>> @@ -2,3 +2,4 @@ obj-y += mm.o
>>   obj-y += p2m.o
>>   obj-y += setup.init.o
>>   obj-y += vmap.o
>> +obj-$(CONFIG_ARM_32) += domain_page.o
> Again, sort alphabetically.
>
>> diff --git a/xen/arch/arm/mpu/domain_page.c b/xen/arch/arm/mpu/domain_page.c
>> new file mode 100644
>> index 0000000000..8859b24e04
>> --- /dev/null
>> +++ b/xen/arch/arm/mpu/domain_page.c
>> @@ -0,0 +1,41 @@
>> +/* SPDX-License-Identifier: GPL-2.0-or-later */
> empty line here
>
>> +#include 
>> +
>> +void *map_domain_page_global(mfn_t mfn)
>> +{
>> +    BUG_ON("unimplemented");
>> +    return NULL;
>> +}
>> +
>> +/* Map a page of domheap memory */
>> +void *map_domain_page(mfn_t mfn)
>> +{
>> +    BUG_ON("unimplemented");
>> +    return NULL;
>> +}
>> +
>> +/* Release a mapping taken with map_domain_page() */
>> +void unmap_domain_page(const void *ptr)
>> +{
>> +    BUG_ON("unimplemented");
>> +}
>> +
>> +mfn_t domain_page_map_to_mfn(const void *ptr)
>> +{
>> +    BUG_ON("unimplemented");
>> +    return INVALID_MFN;
>> +}
>> +
>> +void unmap_domain_page_global(const void *va)
>> +{
>> +    BUG_ON("unimplemented");
>> +}
>> +
>> +/*
>> + * Local variables:
>> + * mode: C
>> + * c-file-style: "BSD"
>> + * c-basic-offset: 4
>> + * indent-tabs-mode: nil
>> + * End:
>> + */
> Additionally, take into account Luca remarks regarding headers.

Thanks Luca for spotting them.

I have addressed all the other comments.

- Ayan

>
> ~Michal
>
>


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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
Subject: [PATCH TEST-ARTEFACTS 0/3] Rootfs generation (ARM and x86)
Date: Fri, 11 Apr 2025 11:52:14 +0100
Message-Id: <20250411105217.2141356-1-andrew.cooper3@citrix.com>
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Part 3 of the cleanup, reworking rootfs generation.

The Xen side of the change isn't quite ready yet, but this is in a good enough
state for review.

Andrew Cooper (3):
  Rework rootfs generation to make a cpio archive
  Shrink the rootfs substantially
  Provide an ARM64 rootfs too

 .gitlab-ci.yml                           | 16 ++++-
 containerize                             |  1 +
 images/alpine/3.18-arm64-base.dockerfile |  6 ++
 scripts/alpine-rootfs.sh                 | 92 ++++++++++++++++++++++++
 scripts/x86_64-rootfs-alpine.sh          | 60 ----------------
 5 files changed, 114 insertions(+), 61 deletions(-)
 create mode 100644 images/alpine/3.18-arm64-base.dockerfile
 create mode 100755 scripts/alpine-rootfs.sh
 delete mode 100755 scripts/x86_64-rootfs-alpine.sh

-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
Subject: [PATCH 2/3] Shrink the rootfs substantially
Date: Fri, 11 Apr 2025 11:52:16 +0100
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bash, busybox, musl and zlib are all in the base container.

python3 and ncurses are in principle used by bits of Xen, but not in anything
we test in CI.  argp-standlone, curl, dbus, libfdt, libgcc and sudo aren't
used at all (for x86 at least).

libbz2 and libuuid were pulled in transitively before, and need to be included
explicitly now.

Use apk --no-cache to avoid keeping a ~2M package index on disk.

Remove the modules scan on boot.  We don't have or build any.  This removes a
chunk of warnings on boot.

This shrinks the rootfs from ~30M down to ~8M.

No practical change.

Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Doug Goldstein 
CC: Marek Marczykowski-Górecki 

I'm still working on the integration of the new rootfs's int Xen, and will
hold off until committing that's ready but
https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1763510164
shows good early progress.
---
 scripts/alpine-rootfs.sh | 60 +++++++++++++++++++++++-----------------
 1 file changed, 34 insertions(+), 26 deletions(-)

diff --git a/scripts/alpine-rootfs.sh b/scripts/alpine-rootfs.sh
index c29c92d1c682..30d426d6e88f 100755
--- a/scripts/alpine-rootfs.sh
+++ b/scripts/alpine-rootfs.sh
@@ -4,33 +4,42 @@ set -eu
 
 WORKDIR="${PWD}"
 COPYDIR="${WORKDIR}/binaries"
+UNAME=$(uname -m)
 
-apk update
+apk --no-cache update
 
-# xen runtime deps
-apk add musl
-apk add libgcc
-apk add openrc
-apk add busybox
-apk add sudo
-apk add dbus
-apk add bash
-apk add python3
-apk add zlib
-apk add lzo
-apk add ncurses
-apk add yajl
-apk add libaio
-apk add xz
-apk add util-linux
-apk add argp-standalone
-apk add libfdt
-apk add glib
-apk add pixman
-apk add curl
-apk add udev
-apk add pciutils
-apk add libelf
+PKGS=(
+    # System
+    openrc
+    udev
+    util-linux
+
+    # Xen toolstack runtime deps
+    libbz2
+    libuuid
+    lzo
+    xz
+    yajl
+
+    # QEMU
+    glib
+    libaio
+    pixman
+    )
+
+case $UNAME in
+    x86_64)
+        PKGS+=(
+            # System
+            pciutils
+
+            # QEMU
+            libelf
+            )
+        ;;
+esac
+
+apk add --no-cache "${PKGS[@]}"
 
 # Xen
 cd /
@@ -45,7 +54,6 @@ rc-update add dmesg sysinit
 rc-update add hostname boot
 rc-update add hwclock boot
 rc-update add hwdrivers sysinit
-rc-update add modules boot
 rc-update add killprocs shutdown
 rc-update add mount-ro shutdown
 rc-update add savecache shutdown
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
Subject: [PATCH 3/3] Provide an ARM64 rootfs too
Date: Fri, 11 Apr 2025 11:52:17 +0100
Message-Id: <20250411105217.2141356-4-andrew.cooper3@citrix.com>
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The only extra package needed is libfdt.

The older ARM64 rootfs configured modloop, networking and sysctl, but none of
this is used in any of the testing, so is omitted here for now.

Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Doug Goldstein 
CC: Marek Marczykowski-Górecki 
---
 .gitlab-ci.yml                           | 7 +++++++
 containerize                             | 1 +
 images/alpine/3.18-arm64-base.dockerfile | 6 ++++++
 scripts/alpine-rootfs.sh                 | 7 +++++++
 4 files changed, 21 insertions(+)
 create mode 100644 images/alpine/3.18-arm64-base.dockerfile

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 916c5ae9d508..3587d660aa62 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -33,6 +33,13 @@ stages:
 #
 # ARM64 artifacts
 #
+alpine-3.18-arm64-rootfs:
+  extends: .arm64-artifacts
+  script:
+    - ./scripts/alpine-rootfs.sh cpio
+  variables:
+    CONTAINER: alpine:3.18-arm64-base
+
 linux-6.6.86-arm64:
   extends: .arm64-artifacts
   script: ./scripts/build-linux.sh
diff --git a/containerize b/containerize
index c23f55ead737..38a434ab7075 100755
--- a/containerize
+++ b/containerize
@@ -24,6 +24,7 @@ die() {
 #
 BASE="registry.gitlab.com/xen-project/hardware/test-artifacts"
 case "_${CONTAINER}" in
+    _alpine-3.18-arm64-base) CONTAINER="${BASE}/alpine:3.18-arm64-base" ;;
     _alpine-3.18-arm64-build) CONTAINER="${BASE}/alpine:3.18-arm64-build" ;;
     _alpine-3.18-x86_64-base) CONTAINER="${BASE}/alpine:3.18-x86_64-base" ;;
     _alpine-3.18-x86_64-build|_) CONTAINER="${BASE}/alpine:3.18-x86_64-build" ;;
diff --git a/images/alpine/3.18-arm64-base.dockerfile b/images/alpine/3.18-arm64-base.dockerfile
new file mode 100644
index 000000000000..ab597c75b80e
--- /dev/null
+++ b/images/alpine/3.18-arm64-base.dockerfile
@@ -0,0 +1,6 @@
+# syntax=docker/dockerfile:1
+FROM --platform=linux/arm64/v8 alpine:3.18
+LABEL maintainer.name="The Xen Project"
+LABEL maintainer.email="xen-devel@lists.xenproject.org"
+
+RUN apk --no-cache add bash
diff --git a/scripts/alpine-rootfs.sh b/scripts/alpine-rootfs.sh
index 30d426d6e88f..220a8aedf4a1 100755
--- a/scripts/alpine-rootfs.sh
+++ b/scripts/alpine-rootfs.sh
@@ -37,6 +37,13 @@ case $UNAME in
             libelf
             )
         ;;
+
+    aarch64)
+        PKGS+=(
+            # Xen
+            libfdt
+            )
+        ;;
 esac
 
 apk add --no-cache "${PKGS[@]}"
-- 
2.39.5



From xen-devel-bounces@lists.xenproject.org Fri Apr 11 10:52:28 2025
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        Fri, 11 Apr 2025 03:52:21 -0700 (PDT)
From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
Subject: [PATCH 1/3] Rework rootfs generation to make a cpio archive
Date: Fri, 11 Apr 2025 11:52:15 +0100
Message-Id: <20250411105217.2141356-2-andrew.cooper3@citrix.com>
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Rename the script as we're going to use it for ARM64 shortly, and have it take
a tar or cpio parameter to determine the output format.

Turn it into a proper bash script, and provide the cpio form under the new
artefact naming scheme.

No functional change.

Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Doug Goldstein 
CC: Marek Marczykowski-Górecki 
---
 .gitlab-ci.yml                                |  9 +++++++-
 ...6_64-rootfs-alpine.sh => alpine-rootfs.sh} | 21 +++++++++++++++++--
 2 files changed, 27 insertions(+), 3 deletions(-)
 rename scripts/{x86_64-rootfs-alpine.sh => alpine-rootfs.sh} (75%)

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 1d2c72b268a3..916c5ae9d508 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -42,6 +42,13 @@ linux-6.6.86-arm64:
 #
 # x86_64 artifacts
 #
+alpine-3.18-x86_64-rootfs:
+  extends: .x86_64-artifacts
+  script:
+    - ./scripts/alpine-rootfs.sh cpio
+  variables:
+    CONTAINER: alpine:3.18-x86_64-base
+
 linux-6.6.56-x86_64:
   extends: .x86_64-artifacts
   script: ./scripts/build-linux.sh
@@ -62,7 +69,7 @@ x86_64-kernel-linux-6.6.56:
 x86_64-rootfs-alpine-3.18:
   extends: .x86_64-artifacts
   script:
-    - . scripts/x86_64-rootfs-alpine.sh
+    - ./scripts/alpine-rootfs.sh tar
   variables:
     CONTAINER: alpine:3.18-x86_64-base
 
diff --git a/scripts/x86_64-rootfs-alpine.sh b/scripts/alpine-rootfs.sh
similarity index 75%
rename from scripts/x86_64-rootfs-alpine.sh
rename to scripts/alpine-rootfs.sh
index b70b3a54ede5..c29c92d1c682 100755
--- a/scripts/x86_64-rootfs-alpine.sh
+++ b/scripts/alpine-rootfs.sh
@@ -1,4 +1,9 @@
+#!/bin/bash
+
+set -eu
+
 WORKDIR="${PWD}"
+COPYDIR="${WORKDIR}/binaries"
 
 apk update
 
@@ -56,5 +61,17 @@ passwd -d "root" root
 
 # Create rootfs
 cd /
-tar cvzf "${WORKDIR}/binaries/initrd.tar.gz" \
-    bin dev etc home init lib mnt opt root sbin usr var
+PATHS="bin dev etc home init lib mnt opt root sbin usr var"
+
+case $1 in
+    cpio)
+        find $PATHS | cpio -o -H newc | gzip > "${COPYDIR}/rootfs.cpio.gz"
+
+        # Print the contents for the build log
+        zcat "${COPYDIR}/rootfs.cpio.gz" | cpio -tv
+        ;;
+
+    tar)
+        tar cvzf "${COPYDIR}/initrd.tar.gz" $PATHS
+        ;;
+esac
-- 
2.39.5



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper 
Subject: [PATCH 1/5] x86/mm: account for the offset when performing subpage r/o MMIO access
Date: Fri, 11 Apr 2025 12:54:07 +0200
Message-ID: <20250411105411.22334-2-roger.pau@citrix.com>
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The current logic in subpage_mmio_write_emulate() doesn't take into account
the page offset, and always performs the writes at offset 0 (start of the
page).

Fix this by accounting for the offset before performing the write.

Fixes: 8847d6e23f97 ('x86/mm: add API for marking only part of a MMIO page read only')
Signed-off-by: Roger Pau Monné 
---
 xen/arch/x86/mm.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 4fecd37aeca0..1cf236516789 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -5131,6 +5131,7 @@ static void subpage_mmio_write_emulate(
         return;
     }
 
+    addr += offset;
     switch ( len )
     {
     case 1:
-- 
2.48.1



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Julien Grall ,
	Stefano Stabellini 
Subject: [PATCH 0/5] xen/x86: fix implementation of subpage r/o MMIO
Date: Fri, 11 Apr 2025 12:54:06 +0200
Message-ID: <20250411105411.22334-1-roger.pau@citrix.com>
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Hello,

Following series include some bugfixes and improvements to the handling
of subpage r/o MMIO accesses.

First patch is a bugfix that applies to subpage accesses for both PV and
HVM.

Patch 2 introduces a helper to reduce code duplication when performing
MMIO accesses.

Patch 3 is a bugfix for using subpage in HVM guest, and patch 4 is an
optimization to only register the HVM subpage handler when needed.

Finally patch 5 moves some PV only code to a PV specific file.

Thanks, Roger.

Roger Pau Monne (5):
  x86/mm: account for the offset when performing subpage r/o MMIO access
  xen/io: provide helpers for multi size MMIO accesses
  x86/hvm: fix handling of accesses to partial r/o MMIO pages
  x86/hvm: only register the r/o subpage ops when needed
  x86/mm: move mmio_ro_emulated_write() to PV only file

 xen/arch/x86/hvm/emulate.c             |  47 +-----------
 xen/arch/x86/hvm/hvm.c                 |  90 +++++++++++++++++++---
 xen/arch/x86/hvm/vmsi.c                |  47 +-----------
 xen/arch/x86/include/asm/hvm/emulate.h |   1 -
 xen/arch/x86/include/asm/mm.h          |  21 ++---
 xen/arch/x86/mm.c                      | 102 ++++++-------------------
 xen/arch/x86/pv/ro-page-fault.c        |  34 +++++++++
 xen/drivers/vpci/msix.c                |  47 +-----------
 xen/include/xen/io.h                   |  63 +++++++++++++++
 9 files changed, 218 insertions(+), 234 deletions(-)
 create mode 100644 xen/include/xen/io.h

-- 
2.48.1



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Julien Grall ,
	Stefano Stabellini 
Subject: [PATCH 2/5] xen/io: provide helpers for multi size MMIO accesses
Date: Fri, 11 Apr 2025 12:54:08 +0200
Message-ID: <20250411105411.22334-3-roger.pau@citrix.com>
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Several handlers have the same necessity of reading from an MMIO region
using 1, 2, 4 or 8 bytes accesses.  So far this has been open-coded in the
function itself.  Instead provide a new handler that encapsulates the
accesses.

Since the added helpers are not architecture specific, introduce a new
generic io.h header.

No functional change intended.

Signed-off-by: Roger Pau Monné 
---
 xen/arch/x86/hvm/vmsi.c | 47 ++----------------------------
 xen/arch/x86/mm.c       | 32 +++++----------------
 xen/drivers/vpci/msix.c | 47 ++----------------------------
 xen/include/xen/io.h    | 63 +++++++++++++++++++++++++++++++++++++++++
 4 files changed, 76 insertions(+), 113 deletions(-)
 create mode 100644 xen/include/xen/io.h

diff --git a/xen/arch/x86/hvm/vmsi.c b/xen/arch/x86/hvm/vmsi.c
index fd83abb929ec..61b89834d97d 100644
--- a/xen/arch/x86/hvm/vmsi.c
+++ b/xen/arch/x86/hvm/vmsi.c
@@ -24,6 +24,7 @@
  * Will be merged it with virtual IOAPIC logic, since most is the same
 */
 
+#include 
 #include 
 #include 
 #include 
@@ -304,28 +305,7 @@ static void adjacent_read(
 
     hwaddr = fix_to_virt(fixmap_idx) + PAGE_OFFSET(address);
 
-    switch ( len )
-    {
-    case 1:
-        *pval = readb(hwaddr);
-        break;
-
-    case 2:
-        *pval = readw(hwaddr);
-        break;
-
-    case 4:
-        *pval = readl(hwaddr);
-        break;
-
-    case 8:
-        *pval = readq(hwaddr);
-        break;
-
-    default:
-        ASSERT_UNREACHABLE();
-        break;
-    }
+    *pval = read_mmio(hwaddr, len);
 }
 
 static void adjacent_write(
@@ -344,28 +324,7 @@ static void adjacent_write(
 
     hwaddr = fix_to_virt(fixmap_idx) + PAGE_OFFSET(address);
 
-    switch ( len )
-    {
-    case 1:
-        writeb(val, hwaddr);
-        break;
-
-    case 2:
-        writew(val, hwaddr);
-        break;
-
-    case 4:
-        writel(val, hwaddr);
-        break;
-
-    case 8:
-        writeq(val, hwaddr);
-        break;
-
-    default:
-        ASSERT_UNREACHABLE();
-        break;
-    }
+    write_mmio(hwaddr, val, len);
 }
 
 static int cf_check msixtbl_read(
diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 1cf236516789..989e62e7ce6f 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -95,6 +95,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -116,7 +117,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -5102,7 +5102,7 @@ static void __iomem *subpage_mmio_map_page(
 static void subpage_mmio_write_emulate(
     mfn_t mfn,
     unsigned int offset,
-    const void *data,
+    unsigned long data,
     unsigned int len)
 {
     struct subpage_ro_range *entry;
@@ -5115,7 +5115,6 @@ static void subpage_mmio_write_emulate(
 
     if ( test_bit(offset / MMIO_RO_SUBPAGE_GRAN, entry->ro_elems) )
     {
- write_ignored:
         gprintk(XENLOG_WARNING,
                 "ignoring write to R/O MMIO 0x%"PRI_mfn"%03x len %u\n",
                 mfn_x(mfn), offset, len);
@@ -5131,26 +5130,7 @@ static void subpage_mmio_write_emulate(
         return;
     }
 
-    addr += offset;
-    switch ( len )
-    {
-    case 1:
-        writeb(*(const uint8_t*)data, addr);
-        break;
-    case 2:
-        writew(*(const uint16_t*)data, addr);
-        break;
-    case 4:
-        writel(*(const uint32_t*)data, addr);
-        break;
-    case 8:
-        writeq(*(const uint64_t*)data, addr);
-        break;
-    default:
-        /* mmio_ro_emulated_write() already validated the size */
-        ASSERT_UNREACHABLE();
-        goto write_ignored;
-    }
+    write_mmio(addr + offset, data, len);
 }
 
 #ifdef CONFIG_HVM
@@ -5185,18 +5165,20 @@ int cf_check mmio_ro_emulated_write(
     struct x86_emulate_ctxt *ctxt)
 {
     struct mmio_ro_emulate_ctxt *mmio_ro_ctxt = ctxt->data;
+    unsigned long data = 0;
 
     /* Only allow naturally-aligned stores at the original %cr2 address. */
     if ( ((bytes | offset) & (bytes - 1)) || !bytes ||
-         offset != mmio_ro_ctxt->cr2 )
+         offset != mmio_ro_ctxt->cr2 || bytes > sizeof(data) )
     {
         gdprintk(XENLOG_WARNING, "bad access (cr2=%lx, addr=%lx, bytes=%u)\n",
                 mmio_ro_ctxt->cr2, offset, bytes);
         return X86EMUL_UNHANDLEABLE;
     }
 
+    memcpy(&data, p_data, bytes);
     subpage_mmio_write_emulate(mmio_ro_ctxt->mfn, PAGE_OFFSET(offset),
-                               p_data, bytes);
+                               data, bytes);
 
     return X86EMUL_OKAY;
 }
diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c
index 6bd8c55bb48e..6455f2a03a01 100644
--- a/xen/drivers/vpci/msix.c
+++ b/xen/drivers/vpci/msix.c
@@ -17,6 +17,7 @@
  * License along with this program; If not, see .
  */
 
+#include 
 #include 
 #include 
 
@@ -344,28 +345,7 @@ static int adjacent_read(const struct domain *d, const struct vpci_msix *msix,
         return X86EMUL_OKAY;
     }
 
-    switch ( len )
-    {
-    case 1:
-        *data = readb(mem + PAGE_OFFSET(addr));
-        break;
-
-    case 2:
-        *data = readw(mem + PAGE_OFFSET(addr));
-        break;
-
-    case 4:
-        *data = readl(mem + PAGE_OFFSET(addr));
-        break;
-
-    case 8:
-        *data = readq(mem + PAGE_OFFSET(addr));
-        break;
-
-    default:
-        ASSERT_UNREACHABLE();
-        break;
-    }
+    *data = read_mmio(mem + PAGE_OFFSET(addr), len);
     spin_unlock(&vpci->lock);
 
     return X86EMUL_OKAY;
@@ -493,28 +473,7 @@ static int adjacent_write(const struct domain *d, const struct vpci_msix *msix,
         return X86EMUL_OKAY;
     }
 
-    switch ( len )
-    {
-    case 1:
-        writeb(data, mem + PAGE_OFFSET(addr));
-        break;
-
-    case 2:
-        writew(data, mem + PAGE_OFFSET(addr));
-        break;
-
-    case 4:
-        writel(data, mem + PAGE_OFFSET(addr));
-        break;
-
-    case 8:
-        writeq(data, mem + PAGE_OFFSET(addr));
-        break;
-
-    default:
-        ASSERT_UNREACHABLE();
-        break;
-    }
+    write_mmio(mem + PAGE_OFFSET(addr), data, len);
     spin_unlock(&vpci->lock);
 
     return X86EMUL_OKAY;
diff --git a/xen/include/xen/io.h b/xen/include/xen/io.h
new file mode 100644
index 000000000000..5c360ce9dee2
--- /dev/null
+++ b/xen/include/xen/io.h
@@ -0,0 +1,63 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Generic helpers for doing MMIO accesses.
+ *
+ * Copyright (c) 2025 Cloud Software Group
+ */
+#ifndef XEN_IO_H
+#define XEN_IO_H
+
+#include 
+
+#include 
+
+static inline uint64_t read_mmio(const volatile void __iomem *mem,
+                                 unsigned int size)
+{
+    switch ( size )
+    {
+    case 1:
+        return readb(mem);
+
+    case 2:
+        return readw(mem);
+
+    case 4:
+        return readl(mem);
+
+    case 8:
+        return readq(mem);
+    }
+
+    ASSERT_UNREACHABLE();
+    return ~0UL;
+}
+
+static inline void write_mmio(volatile void __iomem *mem, uint64_t data,
+                              unsigned int size)
+{
+    switch ( size )
+    {
+    case 1:
+        writeb(data, mem);
+        break;
+
+    case 2:
+        writew(data, mem);
+        break;
+
+    case 4:
+        writel(data, mem);
+        break;
+
+    case 8:
+        writeq(data, mem);
+        break;
+
+    default:
+        ASSERT_UNREACHABLE();
+        break;
+    }
+}
+
+#endif /* XEN_IO_H */
-- 
2.48.1



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper 
Subject: [PATCH 4/5] x86/hvm: only register the r/o subpage ops when needed
Date: Fri, 11 Apr 2025 12:54:10 +0200
Message-ID: <20250411105411.22334-5-roger.pau@citrix.com>
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MMIO operation handlers can be expensive to process, hence attempt to
register only those that will be needed by the domain.

Subpage r/o MMIO regions are added exclusively at boot, further limit their
addition to strictly before the initial domain gets created, so by the time
initial domain creation happens Xen knows whether subpage is required or
not.  This allows only registering the MMIO handler when there are
subpage regions to handle.

Signed-off-by: Roger Pau Monné 
---
Could possibly be part of the previous patch, but strictly speaking is an
improvement, as even before the previous patch subpage r/o was always
called even when no subpage regions are registered.
---
 xen/arch/x86/hvm/hvm.c        |  5 +++--
 xen/arch/x86/include/asm/mm.h |  1 +
 xen/arch/x86/mm.c             | 16 ++++++++++++++++
 3 files changed, 20 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index 21f005b0947c..1a5dfc07813d 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -764,8 +764,9 @@ int hvm_domain_initialise(struct domain *d,
 
     register_portio_handler(d, XEN_HVM_DEBUGCONS_IOPORT, 1, hvm_print_line);
 
-    /* Handler for r/o MMIO subpage accesses. */
-    register_mmio_handler(d, &subpage_mmio_ops);
+    if ( subpage_ro_active() )
+        /* Handler for r/o MMIO subpage accesses. */
+        register_mmio_handler(d, &subpage_mmio_ops);
 
     if ( hvm_tsc_scaling_supported )
         d->arch.hvm.tsc_scaling_ratio = hvm_default_tsc_scaling_ratio;
diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h
index c2e9ef6e5023..aeb8ebcf2d56 100644
--- a/xen/arch/x86/include/asm/mm.h
+++ b/xen/arch/x86/include/asm/mm.h
@@ -561,6 +561,7 @@ struct subpage_ro_range {
     void __iomem *mapped;
     DECLARE_BITMAP(ro_elems, PAGE_SIZE / MMIO_RO_SUBPAGE_GRAN);
 };
+bool subpage_ro_active(void);
 struct subpage_ro_range *subpage_mmio_find_page(mfn_t mfn);
 void __iomem *subpage_mmio_map_page(struct subpage_ro_range *entry);
 void subpage_mmio_write_emulate(
diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index f59c7816fba5..3bc6304d831c 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -4922,6 +4922,11 @@ long arch_memory_op(unsigned long cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
     return rc;
 }
 
+bool subpage_ro_active(void)
+{
+    return !list_empty(&subpage_ro_ranges);
+}
+
 struct subpage_ro_range *subpage_mmio_find_page(mfn_t mfn)
 {
     struct subpage_ro_range *entry;
@@ -5011,6 +5016,17 @@ int __init subpage_mmio_ro_add(
          !IS_ALIGNED(size, MMIO_RO_SUBPAGE_GRAN) )
         return -EINVAL;
 
+    /*
+     * Force all r/o subregions to be registered before initial domain
+     * creation, so that the emulation handlers can be added only when there
+     * are pages registered.
+     */
+    if ( system_state >= SYS_STATE_smp_boot )
+    {
+        ASSERT_UNREACHABLE();
+        return -EILSEQ;
+    }
+
     if ( !size )
         return 0;
 
-- 
2.48.1



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper 
Subject: [PATCH 3/5] x86/hvm: fix handling of accesses to partial r/o MMIO pages
Date: Fri, 11 Apr 2025 12:54:09 +0200
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The current logic to handle accesses to MMIO pages partially read-only is
based on the (now removed) logic used to handle accesses to the r/o MMCFG
region(s) for PVH v1 dom0.  However that has issues when running on AMD
hardware, as in that case the guest linear address that triggered the fault
is not provided as part of the VM exit.  This caused
mmio_ro_emulated_write() to always fail before calling
subpage_mmio_write_emulate() when running on AMD and called from an HVM
context.

Take a different approach and convert the handling of partial read-only
MMIO page accesses into an HVM MMIO ops handler, as that's the more natural
way to handle this kind of emulation for HVM domains.

This allows getting rid of hvm_emulate_one_mmio() and it's single cal site
in hvm_hap_nested_page_fault().

Note a small adjustment is needed to the `pf-fixup` dom0 PVH logic: avoid
attempting to fixup faults resulting from accesses to read-only MMIO
regions, as handling of those accesses is now done by handle_mmio().

Fixes: 33c19df9a5a0 ('x86/PCI: intercept accesses to RO MMIO from dom0s in HVM containers')
Signed-off-by: Roger Pau Monné 
---
The fixes tag is maybe a bit wonky, it's either this or:

8847d6e23f97 ('x86/mm: add API for marking only part of a MMIO page read only')

However the addition of subpage r/o access handling to the existing
mmio_ro_emulated_write() function was done based on the assumption that the
current code was working - which turned out to not be the case for AMD,
hence my preference for blaming the commit that actually introduced the
broken logic.
---
 xen/arch/x86/hvm/emulate.c             | 47 +-------------
 xen/arch/x86/hvm/hvm.c                 | 89 +++++++++++++++++++++++---
 xen/arch/x86/include/asm/hvm/emulate.h |  1 -
 xen/arch/x86/include/asm/mm.h          | 12 ++++
 xen/arch/x86/mm.c                      | 37 +----------
 5 files changed, 96 insertions(+), 90 deletions(-)

diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c
index 9fff1b82f7c6..ed888f0b49d3 100644
--- a/xen/arch/x86/hvm/emulate.c
+++ b/xen/arch/x86/hvm/emulate.c
@@ -370,7 +370,8 @@ static int hvmemul_do_io(
         /* If there is no suitable backing DM, just ignore accesses */
         if ( !s )
         {
-            if ( is_mmio && is_hardware_domain(currd) )
+            if ( is_mmio && is_hardware_domain(currd) &&
+                 !rangeset_contains_singleton(mmio_ro_ranges, PFN_DOWN(addr)) )
             {
                 /*
                  * PVH dom0 is likely missing MMIO mappings on the p2m, due to
@@ -2856,50 +2857,6 @@ int hvm_emulate_one(
     return _hvm_emulate_one(hvmemul_ctxt, &hvm_emulate_ops, completion);
 }
 
-int hvm_emulate_one_mmio(unsigned long mfn, unsigned long gla)
-{
-    static const struct x86_emulate_ops hvm_ro_emulate_ops_mmio = {
-        .read       = x86emul_unhandleable_rw,
-        .insn_fetch = hvmemul_insn_fetch,
-        .write      = mmio_ro_emulated_write,
-        .validate   = hvmemul_validate,
-    };
-    struct mmio_ro_emulate_ctxt mmio_ro_ctxt = { .cr2 = gla, .mfn = _mfn(mfn) };
-    struct hvm_emulate_ctxt ctxt;
-    unsigned int seg, bdf;
-    int rc;
-
-    if ( pci_ro_mmcfg_decode(mfn, &seg, &bdf) )
-    {
-        /* Should be always handled by vPCI for PVH dom0. */
-        gdprintk(XENLOG_ERR, "unhandled MMCFG access for %pp\n",
-                 &PCI_SBDF(seg, bdf));
-        ASSERT_UNREACHABLE();
-        return X86EMUL_UNHANDLEABLE;
-    }
-
-    hvm_emulate_init_once(&ctxt, x86_insn_is_mem_write,
-                          guest_cpu_user_regs());
-    ctxt.ctxt.data = &mmio_ro_ctxt;
-
-    switch ( rc = _hvm_emulate_one(&ctxt, &hvm_ro_emulate_ops_mmio,
-                                   VIO_no_completion) )
-    {
-    case X86EMUL_UNHANDLEABLE:
-    case X86EMUL_UNIMPLEMENTED:
-        hvm_dump_emulation_state(XENLOG_G_WARNING, "r/o MMIO", &ctxt, rc);
-        break;
-    case X86EMUL_EXCEPTION:
-        hvm_inject_event(&ctxt.ctxt.event);
-        /* fallthrough */
-    default:
-        hvm_emulate_writeback(&ctxt);
-        break;
-    }
-
-    return rc;
-}
-
 void hvm_emulate_one_vm_event(enum emul_kind kind, unsigned int trapnr,
     unsigned int errcode)
 {
diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index 6f1174c5127e..21f005b0947c 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -8,6 +8,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -35,7 +36,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -585,9 +585,81 @@ static int cf_check hvm_print_line(
     return X86EMUL_OKAY;
 }
 
+static int cf_check subpage_mmio_accept(struct vcpu *v, unsigned long addr)
+{
+    p2m_type_t t;
+    mfn_t mfn = get_gfn_query_unlocked(v->domain, addr, &t);
+
+    return !mfn_eq(mfn, INVALID_MFN) && t == p2m_mmio_direct &&
+           !!subpage_mmio_find_page(mfn);
+}
+
+static int cf_check subpage_mmio_read(
+    struct vcpu *v, unsigned long addr, unsigned int len, unsigned long *data)
+{
+    struct domain *d = v->domain;
+    p2m_type_t t;
+    mfn_t mfn = get_gfn_query(d, addr, &t);
+    struct subpage_ro_range *entry;
+    volatile void __iomem *mem;
+
+    *data = ~0UL;
+
+    if ( mfn_eq(mfn, INVALID_MFN) || t != p2m_mmio_direct )
+    {
+        put_gfn(d, addr);
+        return X86EMUL_RETRY;
+    }
+
+    entry = subpage_mmio_find_page(mfn);
+    if ( !entry )
+    {
+        put_gfn(d, addr);
+        return X86EMUL_RETRY;
+    }
+
+    mem = subpage_mmio_map_page(entry);
+    if ( !mem )
+    {
+        put_gfn(d, addr);
+        gprintk(XENLOG_ERR, "Failed to map page for MMIO read at %#lx\n",
+                mfn_to_maddr(mfn) + PAGE_OFFSET(addr));
+        return X86EMUL_OKAY;
+    }
+
+    *data = read_mmio(mem + PAGE_OFFSET(addr), len);
+
+    put_gfn(d, addr);
+    return X86EMUL_OKAY;
+}
+
+static int cf_check subpage_mmio_write(
+    struct vcpu *v, unsigned long addr, unsigned int len, unsigned long data)
+{
+    struct domain *d = v->domain;
+    p2m_type_t t;
+    mfn_t mfn = get_gfn_query(d, addr, &t);
+
+    if ( mfn_eq(mfn, INVALID_MFN) || t != p2m_mmio_direct )
+    {
+        put_gfn(d, addr);
+        return X86EMUL_RETRY;
+    }
+
+    subpage_mmio_write_emulate(mfn, PAGE_OFFSET(addr), data, len);
+
+    put_gfn(d, addr);
+    return X86EMUL_OKAY;
+}
+
 int hvm_domain_initialise(struct domain *d,
                           const struct xen_domctl_createdomain *config)
 {
+    static const struct hvm_mmio_ops subpage_mmio_ops = {
+        .check = subpage_mmio_accept,
+        .read = subpage_mmio_read,
+        .write = subpage_mmio_write,
+    };
     unsigned int nr_gsis;
     int rc;
 
@@ -692,6 +764,9 @@ int hvm_domain_initialise(struct domain *d,
 
     register_portio_handler(d, XEN_HVM_DEBUGCONS_IOPORT, 1, hvm_print_line);
 
+    /* Handler for r/o MMIO subpage accesses. */
+    register_mmio_handler(d, &subpage_mmio_ops);
+
     if ( hvm_tsc_scaling_supported )
         d->arch.hvm.tsc_scaling_ratio = hvm_default_tsc_scaling_ratio;
 
@@ -1981,7 +2056,9 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned long gla,
      */
     if ( (p2mt == p2m_mmio_dm) ||
          (npfec.write_access &&
-          (p2m_is_discard_write(p2mt) || (p2mt == p2m_ioreq_server))) )
+          (p2m_is_discard_write(p2mt) || (p2mt == p2m_ioreq_server) ||
+           /* MMIO entries can be r/o if the target mfn is in mmio_ro_ranges. */
+           (p2mt == p2m_mmio_direct))) )
     {
         if ( !handle_mmio_with_translation(gla, gfn, npfec) )
             hvm_inject_hw_exception(X86_EXC_GP, 0);
@@ -2033,14 +2110,6 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned long gla,
         goto out_put_gfn;
     }
 
-    if ( (p2mt == p2m_mmio_direct) && npfec.write_access && npfec.present &&
-         (is_hardware_domain(currd) || subpage_mmio_write_accept(mfn, gla)) &&
-         (hvm_emulate_one_mmio(mfn_x(mfn), gla) == X86EMUL_OKAY) )
-    {
-        rc = 1;
-        goto out_put_gfn;
-    }
-
     /* If we fell through, the vcpu will retry now that access restrictions have
      * been removed. It may fault again if the p2m entry type still requires so.
      * Otherwise, this is an error condition. */
diff --git a/xen/arch/x86/include/asm/hvm/emulate.h b/xen/arch/x86/include/asm/hvm/emulate.h
index c7a2d2a5be4e..178ac32e151f 100644
--- a/xen/arch/x86/include/asm/hvm/emulate.h
+++ b/xen/arch/x86/include/asm/hvm/emulate.h
@@ -86,7 +86,6 @@ void hvmemul_cancel(struct vcpu *v);
 struct segment_register *hvmemul_get_seg_reg(
     enum x86_segment seg,
     struct hvm_emulate_ctxt *hvmemul_ctxt);
-int hvm_emulate_one_mmio(unsigned long mfn, unsigned long gla);
 
 static inline bool handle_mmio(void)
 {
diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h
index a1bc8cc27451..c2e9ef6e5023 100644
--- a/xen/arch/x86/include/asm/mm.h
+++ b/xen/arch/x86/include/asm/mm.h
@@ -554,6 +554,18 @@ int cf_check mmio_ro_emulated_write(
     enum x86_segment seg, unsigned long offset, void *p_data,
     unsigned int bytes, struct x86_emulate_ctxt *ctxt);
 
+/* r/o MMIO subpage access handlers. */
+struct subpage_ro_range {
+    struct list_head list;
+    mfn_t mfn;
+    void __iomem *mapped;
+    DECLARE_BITMAP(ro_elems, PAGE_SIZE / MMIO_RO_SUBPAGE_GRAN);
+};
+struct subpage_ro_range *subpage_mmio_find_page(mfn_t mfn);
+void __iomem *subpage_mmio_map_page(struct subpage_ro_range *entry);
+void subpage_mmio_write_emulate(
+    mfn_t mfn, unsigned int offset, unsigned long data, unsigned int len);
+
 int audit_adjust_pgtables(struct domain *d, int dir, int noisy);
 
 extern int pagefault_by_memadd(unsigned long addr, struct cpu_user_regs *regs);
diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 989e62e7ce6f..f59c7816fba5 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -157,13 +157,6 @@ struct rangeset *__read_mostly mmio_ro_ranges;
 static uint32_t __ro_after_init base_disallow_mask;
 
 /* Handling sub-page read-only MMIO regions */
-struct subpage_ro_range {
-    struct list_head list;
-    mfn_t mfn;
-    void __iomem *mapped;
-    DECLARE_BITMAP(ro_elems, PAGE_SIZE / MMIO_RO_SUBPAGE_GRAN);
-};
-
 static LIST_HEAD_RO_AFTER_INIT(subpage_ro_ranges);
 static DEFINE_SPINLOCK(subpage_ro_lock);
 
@@ -4929,7 +4922,7 @@ long arch_memory_op(unsigned long cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
     return rc;
 }
 
-static struct subpage_ro_range *subpage_mmio_find_page(mfn_t mfn)
+struct subpage_ro_range *subpage_mmio_find_page(mfn_t mfn)
 {
     struct subpage_ro_range *entry;
 
@@ -5074,7 +5067,7 @@ int __init subpage_mmio_ro_add(
     return rc;
 }
 
-static void __iomem *subpage_mmio_map_page(
+void __iomem *subpage_mmio_map_page(
     struct subpage_ro_range *entry)
 {
     void __iomem *mapped_page;
@@ -5099,7 +5092,7 @@ static void __iomem *subpage_mmio_map_page(
     return entry->mapped;
 }
 
-static void subpage_mmio_write_emulate(
+void subpage_mmio_write_emulate(
     mfn_t mfn,
     unsigned int offset,
     unsigned long data,
@@ -5133,30 +5126,6 @@ static void subpage_mmio_write_emulate(
     write_mmio(addr + offset, data, len);
 }
 
-#ifdef CONFIG_HVM
-bool subpage_mmio_write_accept(mfn_t mfn, unsigned long gla)
-{
-    unsigned int offset = PAGE_OFFSET(gla);
-    const struct subpage_ro_range *entry;
-
-    entry = subpage_mmio_find_page(mfn);
-    if ( !entry )
-        return false;
-
-    if ( !test_bit(offset / MMIO_RO_SUBPAGE_GRAN, entry->ro_elems) )
-    {
-        /*
-         * We don't know the write size at this point yet, so it could be
-         * an unaligned write, but accept it here anyway and deal with it
-         * later.
-         */
-        return true;
-    }
-
-    return false;
-}
-#endif
-
 int cf_check mmio_ro_emulated_write(
     enum x86_segment seg,
     unsigned long offset,
-- 
2.48.1



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper 
Subject: [PATCH 5/5] x86/mm: move mmio_ro_emulated_write() to PV only file
Date: Fri, 11 Apr 2025 12:54:11 +0200
Message-ID: <20250411105411.22334-6-roger.pau@citrix.com>
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In-Reply-To: <20250411105411.22334-1-roger.pau@citrix.com>
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mmio_ro_emulated_write() is only used in pv/ro-page-fault.c, move the
function to that file and make it static.

No functional change intended.

Signed-off-by: Roger Pau Monné 
---
 xen/arch/x86/include/asm/mm.h   | 12 ------------
 xen/arch/x86/mm.c               | 26 -------------------------
 xen/arch/x86/pv/ro-page-fault.c | 34 +++++++++++++++++++++++++++++++++
 3 files changed, 34 insertions(+), 38 deletions(-)

diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h
index aeb8ebcf2d56..2665daa6f74f 100644
--- a/xen/arch/x86/include/asm/mm.h
+++ b/xen/arch/x86/include/asm/mm.h
@@ -542,18 +542,6 @@ void memguard_unguard_stack(void *p);
 int subpage_mmio_ro_add(paddr_t start, size_t size);
 bool subpage_mmio_write_accept(mfn_t mfn, unsigned long gla);
 
-struct mmio_ro_emulate_ctxt {
-        unsigned long cr2;
-        /* Used only for mmcfg case */
-        unsigned int seg, bdf;
-        /* Used only for non-mmcfg case */
-        mfn_t mfn;
-};
-
-int cf_check mmio_ro_emulated_write(
-    enum x86_segment seg, unsigned long offset, void *p_data,
-    unsigned int bytes, struct x86_emulate_ctxt *ctxt);
-
 /* r/o MMIO subpage access handlers. */
 struct subpage_ro_range {
     struct list_head list;
diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 3bc6304d831c..7c6a5fde5ebd 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -5142,32 +5142,6 @@ void subpage_mmio_write_emulate(
     write_mmio(addr + offset, data, len);
 }
 
-int cf_check mmio_ro_emulated_write(
-    enum x86_segment seg,
-    unsigned long offset,
-    void *p_data,
-    unsigned int bytes,
-    struct x86_emulate_ctxt *ctxt)
-{
-    struct mmio_ro_emulate_ctxt *mmio_ro_ctxt = ctxt->data;
-    unsigned long data = 0;
-
-    /* Only allow naturally-aligned stores at the original %cr2 address. */
-    if ( ((bytes | offset) & (bytes - 1)) || !bytes ||
-         offset != mmio_ro_ctxt->cr2 || bytes > sizeof(data) )
-    {
-        gdprintk(XENLOG_WARNING, "bad access (cr2=%lx, addr=%lx, bytes=%u)\n",
-                mmio_ro_ctxt->cr2, offset, bytes);
-        return X86EMUL_UNHANDLEABLE;
-    }
-
-    memcpy(&data, p_data, bytes);
-    subpage_mmio_write_emulate(mmio_ro_ctxt->mfn, PAGE_OFFSET(offset),
-                               data, bytes);
-
-    return X86EMUL_OKAY;
-}
-
 /*
  * For these PTE APIs, the caller must follow the alloc-map-unmap-free
  * lifecycle, which means explicitly mapping the PTE pages before accessing
diff --git a/xen/arch/x86/pv/ro-page-fault.c b/xen/arch/x86/pv/ro-page-fault.c
index 11b01c479e43..8b1c25e60c17 100644
--- a/xen/arch/x86/pv/ro-page-fault.c
+++ b/xen/arch/x86/pv/ro-page-fault.c
@@ -298,6 +298,14 @@ static int ptwr_do_page_fault(struct x86_emulate_ctxt *ctxt,
  * fault handling for read-only MMIO pages
  */
 
+struct mmio_ro_emulate_ctxt {
+        unsigned long cr2;
+        /* Used only for mmcfg case */
+        unsigned int seg, bdf;
+        /* Used only for non-mmcfg case */
+        mfn_t mfn;
+};
+
 static int cf_check mmcfg_intercept_write(
     enum x86_segment seg,
     unsigned long offset,
@@ -329,6 +337,32 @@ static int cf_check mmcfg_intercept_write(
     return X86EMUL_OKAY;
 }
 
+static int cf_check mmio_ro_emulated_write(
+    enum x86_segment seg,
+    unsigned long offset,
+    void *p_data,
+    unsigned int bytes,
+    struct x86_emulate_ctxt *ctxt)
+{
+    struct mmio_ro_emulate_ctxt *mmio_ro_ctxt = ctxt->data;
+    unsigned long data = 0;
+
+    /* Only allow naturally-aligned stores at the original %cr2 address. */
+    if ( ((bytes | offset) & (bytes - 1)) || !bytes ||
+         offset != mmio_ro_ctxt->cr2 || bytes > sizeof(data) )
+    {
+        gdprintk(XENLOG_WARNING, "bad access (cr2=%lx, addr=%lx, bytes=%u)\n",
+                mmio_ro_ctxt->cr2, offset, bytes);
+        return X86EMUL_UNHANDLEABLE;
+    }
+
+    memcpy(&data, p_data, bytes);
+    subpage_mmio_write_emulate(mmio_ro_ctxt->mfn, PAGE_OFFSET(offset),
+                               data, bytes);
+
+    return X86EMUL_OKAY;
+}
+
 static const struct x86_emulate_ops mmio_ro_emulate_ops = {
     .read       = x86emul_unhandleable_rw,
     .insn_fetch = ptwr_emulated_insn_fetch,
-- 
2.48.1



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From: Ayan Kumar Halder 
To: 
CC: Ayan Kumar Halder , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" 
Subject: [PATCH v6 0/3] Enable early bootup of Armv8-R AArch32 systems
Date: Fri, 11 Apr 2025 12:04:49 +0100
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Enable early booting of Armv8-R AArch32 based systems.

Added Luca's R-b in all the patches.

Ayan Kumar Halder (3):
  xen/arm: Move some of the functions to common file
  xen/arm32: Create the same boot-time MPU regions as arm64
  xen/arm32: mpu: Stubs to build MPU for arm32

 xen/arch/arm/arm32/Makefile              |   1 +
 xen/arch/arm/arm32/mpu/Makefile          |   3 +
 xen/arch/arm/arm32/mpu/head.S            | 104 +++++++++++++++++++++++
 xen/arch/arm/arm32/mpu/p2m.c             |  19 +++++
 xen/arch/arm/arm32/mpu/smpboot.c         |  26 ++++++
 xen/arch/arm/arm64/mpu/head.S            |  78 +----------------
 xen/arch/arm/include/asm/arm32/sysregs.h |   9 ++
 xen/arch/arm/include/asm/arm64/sysregs.h |  13 +++
 xen/arch/arm/include/asm/cpregs.h        |   2 +
 xen/arch/arm/include/asm/mm.h            |   9 +-
 xen/arch/arm/include/asm/mmu/mm.h        |   7 ++
 xen/arch/arm/include/asm/mpu/cpregs.h    |  27 ++++++
 xen/arch/arm/include/asm/mpu/mm.h        |   5 ++
 xen/arch/arm/include/asm/mpu/regions.inc |  79 +++++++++++++++++
 xen/arch/arm/mpu/Makefile                |   1 +
 xen/arch/arm/mpu/domain_page.c           |  45 ++++++++++
 16 files changed, 343 insertions(+), 85 deletions(-)
 create mode 100644 xen/arch/arm/arm32/mpu/Makefile
 create mode 100644 xen/arch/arm/arm32/mpu/head.S
 create mode 100644 xen/arch/arm/arm32/mpu/p2m.c
 create mode 100644 xen/arch/arm/arm32/mpu/smpboot.c
 create mode 100644 xen/arch/arm/include/asm/mpu/cpregs.h
 create mode 100644 xen/arch/arm/include/asm/mpu/regions.inc
 create mode 100644 xen/arch/arm/mpu/domain_page.c

-- 
2.25.1



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From: Ayan Kumar Halder 
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CC: Ayan Kumar Halder , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" , Luca Fancellu 
Subject: [PATCH v6 1/3] xen/arm: Move some of the functions to common file
Date: Fri, 11 Apr 2025 12:04:50 +0100
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regions.inc is added to hold the common earlyboot MPU regions configuration
between arm64 and arm32.

prepare_xen_region, fail_insufficient_regions() will be used by both arm32 and
arm64. Thus, they have been moved to regions.inc.

*_PRBAR are moved to arm64/sysregs.h.
*_PRLAR are moved to regions.inc as they are common between arm32 and arm64.

Introduce WRITE_SYSREG_ASM to write to the system registers from regions.inc.

Signed-off-by: Ayan Kumar Halder 
Reviewed-by: Luca Fancellu 
---

Changes from

v1 -

1. enable_mpu() now sets HMAIR{0,1} registers. This is similar to what is
being done in enable_mmu(). All the mm related configurations happen in this
function.

2. Fixed some typos.

v2 -
1. Extracted the arm64 head.S functions/macros in a common file.

v3 -
1. Moved *_PRLAR are moved to prepare_xen_region.inc

2. enable_boot_cpu_mm() is preserved in mpu/head.S.

3. STORE_SYSREG is renamed as WRITE_SYSREG_ASM()

4. LOAD_SYSREG is removed.

5. No need to save/restore lr in enable_boot_cpu_mm(). IOW, keep it as it was
in the original code.

v4 - 
1. Rename prepare_xen_region.inc to common.inc

2. enable_secondary_cpu_mm() is moved back to mpu/head.S. 

v5 -
1. Rename common.inc to regions.inc.

2. WRITE_SYSREG_ASM() in enclosed within #ifdef __ASSEMBLY__.

 xen/arch/arm/arm64/mpu/head.S            | 78 +----------------------
 xen/arch/arm/include/asm/arm64/sysregs.h | 13 ++++
 xen/arch/arm/include/asm/mpu/regions.inc | 79 ++++++++++++++++++++++++
 3 files changed, 93 insertions(+), 77 deletions(-)
 create mode 100644 xen/arch/arm/include/asm/mpu/regions.inc

diff --git a/xen/arch/arm/arm64/mpu/head.S b/xen/arch/arm/arm64/mpu/head.S
index ed01993d85..6d336cafbb 100644
--- a/xen/arch/arm/arm64/mpu/head.S
+++ b/xen/arch/arm/arm64/mpu/head.S
@@ -3,83 +3,7 @@
  * Start-of-day code for an Armv8-R MPU system.
  */
 
-#include 
-#include 
-
-/* Backgroud region enable/disable */
-#define SCTLR_ELx_BR    BIT(17, UL)
-
-#define REGION_TEXT_PRBAR       0x38    /* SH=11 AP=10 XN=00 */
-#define REGION_RO_PRBAR         0x3A    /* SH=11 AP=10 XN=10 */
-#define REGION_DATA_PRBAR       0x32    /* SH=11 AP=00 XN=10 */
-#define REGION_DEVICE_PRBAR     0x22    /* SH=10 AP=00 XN=10 */
-
-#define REGION_NORMAL_PRLAR     0x0f    /* NS=0 ATTR=111 EN=1 */
-#define REGION_DEVICE_PRLAR     0x09    /* NS=0 ATTR=100 EN=1 */
-
-/*
- * Macro to prepare and set a EL2 MPU memory region.
- * We will also create an according MPU memory region entry, which
- * is a structure of pr_t,  in table \prmap.
- *
- * sel:         region selector
- * base:        reg storing base address
- * limit:       reg storing limit address
- * prbar:       store computed PRBAR_EL2 value
- * prlar:       store computed PRLAR_EL2 value
- * maxcount:    maximum number of EL2 regions supported
- * attr_prbar:  PRBAR_EL2-related memory attributes. If not specified it will be
- *              REGION_DATA_PRBAR
- * attr_prlar:  PRLAR_EL2-related memory attributes. If not specified it will be
- *              REGION_NORMAL_PRLAR
- *
- * Preserves \maxcount
- * Output:
- *  \sel: Next available region selector index.
- * Clobbers \base, \limit, \prbar, \prlar
- *
- * Note that all parameters using registers should be distinct.
- */
-.macro prepare_xen_region, sel, base, limit, prbar, prlar, maxcount, attr_prbar=REGION_DATA_PRBAR, attr_prlar=REGION_NORMAL_PRLAR
-    /* Check if the region is empty */
-    cmp   \base, \limit
-    beq   1f
-
-    /* Check if the number of regions exceeded the count specified in MPUIR_EL2 */
-    cmp   \sel, \maxcount
-    bge   fail_insufficient_regions
-
-    /* Prepare value for PRBAR_EL2 reg and preserve it in \prbar.*/
-    and   \base, \base, #MPU_REGION_MASK
-    mov   \prbar, #\attr_prbar
-    orr   \prbar, \prbar, \base
-
-    /* Limit address should be inclusive */
-    sub   \limit, \limit, #1
-    and   \limit, \limit, #MPU_REGION_MASK
-    mov   \prlar, #\attr_prlar
-    orr   \prlar, \prlar, \limit
-
-    msr   PRSELR_EL2, \sel
-    isb
-    msr   PRBAR_EL2, \prbar
-    msr   PRLAR_EL2, \prlar
-    dsb   sy
-    isb
-
-    add   \sel, \sel, #1
-
-1:
-.endm
-
-/*
- * Failure caused due to insufficient MPU regions.
- */
-FUNC_LOCAL(fail_insufficient_regions)
-    PRINT("- Selected MPU region is above the implemented number in MPUIR_EL2 -\r\n")
-1:  wfe
-    b   1b
-END(fail_insufficient_regions)
+#include 
 
 /*
  * Enable EL2 MPU and data cache
diff --git a/xen/arch/arm/include/asm/arm64/sysregs.h b/xen/arch/arm/include/asm/arm64/sysregs.h
index b593e4028b..dba0248c88 100644
--- a/xen/arch/arm/include/asm/arm64/sysregs.h
+++ b/xen/arch/arm/include/asm/arm64/sysregs.h
@@ -462,6 +462,17 @@
 #define ZCR_ELx_LEN_SIZE             9
 #define ZCR_ELx_LEN_MASK             0x1ff
 
+#define REGION_TEXT_PRBAR       0x38    /* SH=11 AP=10 XN=00 */
+#define REGION_RO_PRBAR         0x3A    /* SH=11 AP=10 XN=10 */
+#define REGION_DATA_PRBAR       0x32    /* SH=11 AP=00 XN=10 */
+#define REGION_DEVICE_PRBAR     0x22    /* SH=10 AP=00 XN=10 */
+
+#ifdef __ASSEMBLY__
+
+#define WRITE_SYSREG_ASM(v, name) "msr " __stringify(name,) #v
+
+#else /* !__ASSEMBLY__ */
+
 /* Access to system registers */
 
 #define WRITE_SYSREG64(v, name) do {                    \
@@ -481,6 +492,8 @@
 #define WRITE_SYSREG_LR(v, index)  WRITE_SYSREG(v, ICH_LR_REG(index))
 #define READ_SYSREG_LR(index)      READ_SYSREG(ICH_LR_REG(index))
 
+#endif /* !__ASSEMBLY__ */
+
 #endif /* _ASM_ARM_ARM64_SYSREGS_H */
 
 /*
diff --git a/xen/arch/arm/include/asm/mpu/regions.inc b/xen/arch/arm/include/asm/mpu/regions.inc
new file mode 100644
index 0000000000..47868a1526
--- /dev/null
+++ b/xen/arch/arm/include/asm/mpu/regions.inc
@@ -0,0 +1,79 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include 
+#include 
+
+/* Backgroud region enable/disable */
+#define SCTLR_ELx_BR    BIT(17, UL)
+
+#define REGION_NORMAL_PRLAR     0x0f    /* NS=0 ATTR=111 EN=1 */
+#define REGION_DEVICE_PRLAR     0x09    /* NS=0 ATTR=100 EN=1 */
+
+/*
+ * Macro to prepare and set a EL2 MPU memory region.
+ * We will also create an according MPU memory region entry, which
+ * is a structure of pr_t,  in table \prmap.
+ *
+ * sel:         region selector
+ * base:        reg storing base address
+ * limit:       reg storing limit address
+ * prbar:       store computed PRBAR_EL2 value
+ * prlar:       store computed PRLAR_EL2 value
+ * maxcount:    maximum number of EL2 regions supported
+ * attr_prbar:  PRBAR_EL2-related memory attributes. If not specified it will be
+ *              REGION_DATA_PRBAR
+ * attr_prlar:  PRLAR_EL2-related memory attributes. If not specified it will be
+ *              REGION_NORMAL_PRLAR
+ *
+ * Preserves maxcount
+ * Output:
+ *  sel: Next available region selector index.
+ * Clobbers base, limit, prbar, prlar
+ *
+ * Note that all parameters using registers should be distinct.
+ */
+.macro prepare_xen_region, sel, base, limit, prbar, prlar, maxcount, attr_prbar=REGION_DATA_PRBAR, attr_prlar=REGION_NORMAL_PRLAR
+    /* Check if the region is empty */
+    cmp   \base, \limit
+    beq   1f
+
+    /* Check if the number of regions exceeded the count specified in MPUIR_EL2 */
+    cmp   \sel, \maxcount
+    bge   fail_insufficient_regions
+
+    /* Prepare value for PRBAR_EL2 reg and preserve it in \prbar.*/
+    and   \base, \base, #MPU_REGION_MASK
+    mov   \prbar, #\attr_prbar
+    orr   \prbar, \prbar, \base
+
+    /* Limit address should be inclusive */
+    sub   \limit, \limit, #1
+    and   \limit, \limit, #MPU_REGION_MASK
+    mov   \prlar, #\attr_prlar
+    orr   \prlar, \prlar, \limit
+
+    WRITE_SYSREG_ASM(\sel, PRSELR_EL2)
+    isb
+    WRITE_SYSREG_ASM(\prbar, PRBAR_EL2)
+    WRITE_SYSREG_ASM(\prlar, PRLAR_EL2)
+    dsb   sy
+    isb
+
+    add   \sel, \sel, #1
+
+1:
+.endm
+
+/* Failure caused due to insufficient MPU regions. */
+FUNC_LOCAL(fail_insufficient_regions)
+    PRINT("- Selected MPU region is above the implemented number in MPUIR_EL2 -\r\n")
+1:  wfe
+    b   1b
+END(fail_insufficient_regions)
+
+/*
+ * Local variables:
+ * mode: ASM
+ * indent-tabs-mode: nil
+ * End:
+ */
-- 
2.25.1



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From: Ayan Kumar Halder 
To: 
CC: Ayan Kumar Halder , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" , Luca Fancellu 
Subject: [PATCH v6 2/3] xen/arm32: Create the same boot-time MPU regions as arm64
Date: Fri, 11 Apr 2025 12:04:51 +0100
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Boot-time MPU protection regions (similar to Armv8-R AArch64) are created for
Armv8-R AArch32.
Also, defined *_PRBAR macros for arm32. The only difference from arm64 is that
XN is 1-bit for arm32.
Defined the system registers and macros in mpu/cpregs.h.

Introduced WRITE_SYSREG_ASM() to write to system registers in assembly.

Signed-off-by: Ayan Kumar Halder 
Reviewed-by: Luca Fancellu 
---
Changes from

v1 -

1. enable_mpu() now sets HMAIR{0,1} registers. This is similar to what is
being done in enable_mmu(). All the mm related configurations happen in this
function.

2. Fixed some typos. 

v2 -
1. Include the common prepare_xen_region.inc in head.S.

2. Define LOAD_SYSREG()/STORE_SYSREG() for arm32.

v3 -
1. Rename STORE_SYSREG() as WRITE_SYSREG_ASM()

2. enable_boot_cpu_mm() is defined in head.S

v4 -
1. *_PRBAR is moved to arm32/sysregs.h.

2. MPU specific CP15 system registers are defined in mpu/cpregs.h. 

v5 -
1. WRITE_SYSREG_ASM is enclosed within #ifdef __ASSEMBLY__

2. enable_mpu() clobbers r0 only.

3. Definitions in mpu/cpregs.h in enclosed within ARM_32.

4. Removed some #ifdefs and style changes.

 xen/arch/arm/arm32/Makefile              |   1 +
 xen/arch/arm/arm32/mpu/Makefile          |   1 +
 xen/arch/arm/arm32/mpu/head.S            | 104 +++++++++++++++++++++++
 xen/arch/arm/include/asm/arm32/sysregs.h |   9 ++
 xen/arch/arm/include/asm/cpregs.h        |   2 +
 xen/arch/arm/include/asm/mpu/cpregs.h    |  27 ++++++
 6 files changed, 144 insertions(+)
 create mode 100644 xen/arch/arm/arm32/mpu/Makefile
 create mode 100644 xen/arch/arm/arm32/mpu/head.S
 create mode 100644 xen/arch/arm/include/asm/mpu/cpregs.h

diff --git a/xen/arch/arm/arm32/Makefile b/xen/arch/arm/arm32/Makefile
index 40a2b4803f..537969d753 100644
--- a/xen/arch/arm/arm32/Makefile
+++ b/xen/arch/arm/arm32/Makefile
@@ -1,5 +1,6 @@
 obj-y += lib/
 obj-$(CONFIG_MMU) += mmu/
+obj-$(CONFIG_MPU) += mpu/
 
 obj-$(CONFIG_EARLY_PRINTK) += debug.o
 obj-y += domctl.o
diff --git a/xen/arch/arm/arm32/mpu/Makefile b/xen/arch/arm/arm32/mpu/Makefile
new file mode 100644
index 0000000000..3340058c08
--- /dev/null
+++ b/xen/arch/arm/arm32/mpu/Makefile
@@ -0,0 +1 @@
+obj-y += head.o
diff --git a/xen/arch/arm/arm32/mpu/head.S b/xen/arch/arm/arm32/mpu/head.S
new file mode 100644
index 0000000000..b2c5245e51
--- /dev/null
+++ b/xen/arch/arm/arm32/mpu/head.S
@@ -0,0 +1,104 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Start-of-day code for an Armv8-R-AArch32 MPU system.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/*
+ * Set up the memory attribute type tables and enable EL2 MPU and data cache.
+ * If the Background region is enabled, then the MPU uses the default memory
+ * map as the Background region for generating the memory
+ * attributes when MPU is disabled.
+ * Since the default memory map of the Armv8-R AArch32 architecture is
+ * IMPLEMENTATION DEFINED, we intend to turn off the Background region here.
+ *
+ * Clobbers r0
+ */
+FUNC_LOCAL(enable_mpu)
+    /* Set up memory attribute type tables */
+    mov_w r0, MAIR0VAL
+    mcr   CP32(r0, HMAIR0)
+    mov_w r0, MAIR1VAL
+    mcr   CP32(r0, HMAIR1)
+
+    mrc   CP32(r0, HSCTLR)
+    bic   r0, r0, #SCTLR_ELx_BR       /* Disable Background region */
+    orr   r0, r0, #SCTLR_Axx_ELx_M    /* Enable MPU */
+    orr   r0, r0, #SCTLR_Axx_ELx_C    /* Enable D-cache */
+    mcr   CP32(r0, HSCTLR)
+    isb
+
+    ret
+END(enable_mpu)
+
+/*
+ * Maps the various sections of Xen (described in xen.lds.S) as different MPU
+ * regions.
+ *
+ * Clobbers r0 - r5
+ *
+ */
+FUNC(enable_boot_cpu_mm)
+    /* Get the number of regions specified in MPUIR_EL2 */
+    mrc   CP32(r5, MPUIR_EL2)
+    and   r5, r5, #NUM_MPU_REGIONS_MASK
+
+    /* x0: region sel */
+    mov   r0, #0
+    /* Xen text section. */
+    mov_w   r1, _stext
+    mov_w   r2, _etext
+    prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_TEXT_PRBAR
+
+    /* Xen read-only data section. */
+    mov_w   r1, _srodata
+    mov_w   r2, _erodata
+    prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_RO_PRBAR
+
+    /* Xen read-only after init and data section. (RW data) */
+    mov_w   r1, __ro_after_init_start
+    mov_w   r2, __init_begin
+    prepare_xen_region r0, r1, r2, r3, r4, r5
+
+    /* Xen code section. */
+    mov_w   r1, __init_begin
+    mov_w   r2, __init_data_begin
+    prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_TEXT_PRBAR
+
+    /* Xen data and BSS section. */
+    mov_w   r1, __init_data_begin
+    mov_w   r2, __bss_end
+    prepare_xen_region r0, r1, r2, r3, r4, r5
+
+#ifdef CONFIG_EARLY_PRINTK
+    /* Xen early UART section. */
+    mov_w   r1, CONFIG_EARLY_UART_BASE_ADDRESS
+    mov_w   r2, (CONFIG_EARLY_UART_BASE_ADDRESS + CONFIG_EARLY_UART_SIZE)
+    prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_DEVICE_PRBAR, attr_prlar=REGION_DEVICE_PRLAR
+#endif
+
+    b    enable_mpu
+END(enable_boot_cpu_mm)
+
+/*
+ * We don't yet support secondary CPUs bring-up. Implement a dummy helper to
+ * please the common code.
+ */
+FUNC(enable_secondary_cpu_mm)
+    PRINT("- SMP not enabled yet -\r\n")
+1:  wfe
+    b 1b
+END(enable_secondary_cpu_mm)
+
+/*
+ * Local variables:
+ * mode: ASM
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/arch/arm/include/asm/arm32/sysregs.h b/xen/arch/arm/include/asm/arm32/sysregs.h
index 22871999af..8d7b95d982 100644
--- a/xen/arch/arm/include/asm/arm32/sysregs.h
+++ b/xen/arch/arm/include/asm/arm32/sysregs.h
@@ -20,6 +20,15 @@
  * uses r0 as a placeholder register. */
 #define CMD_CP32(name...)      "mcr " __stringify(CP32(r0, name)) ";"
 
+#define REGION_TEXT_PRBAR       0x18    /* SH=11 AP=10 XN=0 */
+#define REGION_RO_PRBAR         0x1D    /* SH=11 AP=10 XN=1 */
+#define REGION_DATA_PRBAR       0x19    /* SH=11 AP=00 XN=1 */
+#define REGION_DEVICE_PRBAR     0x11    /* SH=10 AP=00 XN=1 */
+
+#ifdef __ASSEMBLY__
+#define WRITE_SYSREG_ASM(v, name) mcr CP32(v, name)
+#endif /* __ASSEMBLY__ */
+
 #ifndef __ASSEMBLY__
 
 /* C wrappers */
diff --git a/xen/arch/arm/include/asm/cpregs.h b/xen/arch/arm/include/asm/cpregs.h
index aec9e8f329..a7503a190f 100644
--- a/xen/arch/arm/include/asm/cpregs.h
+++ b/xen/arch/arm/include/asm/cpregs.h
@@ -1,6 +1,8 @@
 #ifndef __ASM_ARM_CPREGS_H
 #define __ASM_ARM_CPREGS_H
 
+#include 
+
 /*
  * AArch32 Co-processor registers.
  *
diff --git a/xen/arch/arm/include/asm/mpu/cpregs.h b/xen/arch/arm/include/asm/mpu/cpregs.h
new file mode 100644
index 0000000000..e2f3b2264c
--- /dev/null
+++ b/xen/arch/arm/include/asm/mpu/cpregs.h
@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef __ASM_ARM_MPU_CPREGS_H
+#define __ASM_ARM_MPU_CPREGS_H
+
+#ifdef CONFIG_ARM_32
+
+/* CP15 CR0: MPU Type Register */
+#define HMPUIR          p15,4,c0,c0,4
+
+/* CP15 CR6: MPU Protection Region Base/Limit/Select Address Register */
+#define HPRSELR         p15,4,c6,c2,1
+#define PRBAR_EL2       p15,4,c6,c3,0
+#define PRLAR_EL2       p15,4,c6,c8,1
+
+#define MPUIR_EL2       HMPUIR
+#define PRSELR_EL2      HPRSELR
+
+#endif /* CONFIG_ARM_32 */
+#endif /* __ASM_ARM_MPU_CPREGS_H */
+
+/*
+ * Local variables:
+ * mode: ASM
+ * indent-tabs-mode: nil
+ * End:
+ */
-- 
2.25.1



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From: Ayan Kumar Halder 
To: 
CC: Ayan Kumar Halder , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" , Luca Fancellu 
Subject: [PATCH v6 3/3] xen/arm32: mpu: Stubs to build MPU for arm32
Date: Fri, 11 Apr 2025 12:04:52 +0100
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Add stubs to enable compilation.

is_xen_heap_page() and is_xen_heap_mfn() are not implemented for arm32 MPU.
Thus, introduce the stubs for these functions in asm/mpu/mm.h and move the
original code to asm/mmu/mm.h (as it is used for arm32 MMU based system).

Signed-off-by: Ayan Kumar Halder 
Reviewed-by: Luca Fancellu 
---
Changes from :-

v1, v2 -
1. New patch introduced in v3.
2. Should be applied on top of
https://patchwork.kernel.org/project/xen-devel/cover/20250316192445.2376484-1-luca.fancellu@arm.com/

v3 -
1. Add stubs for map_domain_page() and similar functions.

2. 'BUG_ON("unimplemented")' is kept in all the stubs.

v4 - 
1. is_xen_heap_mfn() macros are defined across mpu/mm.h (ARM32 specific)
, mmu/mm.h (ARM32 specific) and asm/mm.h (ARM64 specific)

2. s/(void*)0/NULL

v5 -
1. Add the headers for smpboot.c, domain_page.c and p2m.c.

2. Inclusion of headers and makefile entries are sorted alphabetically.

3. Update the commit message and style changes.

 xen/arch/arm/arm32/mpu/Makefile   |  2 ++
 xen/arch/arm/arm32/mpu/p2m.c      | 19 +++++++++++++
 xen/arch/arm/arm32/mpu/smpboot.c  | 26 ++++++++++++++++++
 xen/arch/arm/include/asm/mm.h     |  9 +------
 xen/arch/arm/include/asm/mmu/mm.h |  7 +++++
 xen/arch/arm/include/asm/mpu/mm.h |  5 ++++
 xen/arch/arm/mpu/Makefile         |  1 +
 xen/arch/arm/mpu/domain_page.c    | 45 +++++++++++++++++++++++++++++++
 8 files changed, 106 insertions(+), 8 deletions(-)
 create mode 100644 xen/arch/arm/arm32/mpu/p2m.c
 create mode 100644 xen/arch/arm/arm32/mpu/smpboot.c
 create mode 100644 xen/arch/arm/mpu/domain_page.c

diff --git a/xen/arch/arm/arm32/mpu/Makefile b/xen/arch/arm/arm32/mpu/Makefile
index 3340058c08..cf0540aecc 100644
--- a/xen/arch/arm/arm32/mpu/Makefile
+++ b/xen/arch/arm/arm32/mpu/Makefile
@@ -1 +1,3 @@
 obj-y += head.o
+obj-y += p2m.o
+obj-y += smpboot.o
diff --git a/xen/arch/arm/arm32/mpu/p2m.c b/xen/arch/arm/arm32/mpu/p2m.c
new file mode 100644
index 0000000000..3d9abe4400
--- /dev/null
+++ b/xen/arch/arm/arm32/mpu/p2m.c
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include 
+#include 
+#include 
+
+void __init setup_virt_paging(void)
+{
+    BUG_ON("unimplemented");
+}
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/arch/arm/arm32/mpu/smpboot.c b/xen/arch/arm/arm32/mpu/smpboot.c
new file mode 100644
index 0000000000..5090f443f5
--- /dev/null
+++ b/xen/arch/arm/arm32/mpu/smpboot.c
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include 
+#include 
+#include 
+#include 
+
+int prepare_secondary_mm(int cpu)
+{
+    BUG_ON("unimplemented");
+    return -EINVAL;
+}
+
+void update_boot_mapping(bool enable)
+{
+    BUG_ON("unimplemented");
+}
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h
index fbffaccef4..5b67c0f8bb 100644
--- a/xen/arch/arm/include/asm/mm.h
+++ b/xen/arch/arm/include/asm/mm.h
@@ -170,14 +170,7 @@ struct page_info
 #define _PGC_need_scrub   _PGC_allocated
 #define PGC_need_scrub    PGC_allocated
 
-#ifdef CONFIG_ARM_32
-#define is_xen_heap_page(page) is_xen_heap_mfn(page_to_mfn(page))
-#define is_xen_heap_mfn(mfn) ({                                 \
-    unsigned long mfn_ = mfn_x(mfn);                            \
-    (mfn_ >= mfn_x(directmap_mfn_start) &&                      \
-     mfn_ < mfn_x(directmap_mfn_end));                          \
-})
-#else
+#ifdef CONFIG_ARM_64
 #define is_xen_heap_page(page) ((page)->count_info & PGC_xen_heap)
 #define is_xen_heap_mfn(mfn) \
     (mfn_valid(mfn) && is_xen_heap_page(mfn_to_page(mfn)))
diff --git a/xen/arch/arm/include/asm/mmu/mm.h b/xen/arch/arm/include/asm/mmu/mm.h
index caba987edc..7f4d59137d 100644
--- a/xen/arch/arm/include/asm/mmu/mm.h
+++ b/xen/arch/arm/include/asm/mmu/mm.h
@@ -27,6 +27,13 @@ extern unsigned long directmap_base_pdx;
 })
 
 #ifdef CONFIG_ARM_32
+#define is_xen_heap_page(page) is_xen_heap_mfn(page_to_mfn(page))
+#define is_xen_heap_mfn(mfn) ({                                 \
+    unsigned long mfn_ = mfn_x(mfn);                            \
+    (mfn_ >= mfn_x(directmap_mfn_start) &&                      \
+     mfn_ < mfn_x(directmap_mfn_end));                          \
+})
+
 /**
  * Find the virtual address corresponding to a machine address
  *
diff --git a/xen/arch/arm/include/asm/mpu/mm.h b/xen/arch/arm/include/asm/mpu/mm.h
index 86f33d9836..bfd840fa5d 100644
--- a/xen/arch/arm/include/asm/mpu/mm.h
+++ b/xen/arch/arm/include/asm/mpu/mm.h
@@ -13,6 +13,11 @@ extern struct page_info *frame_table;
 
 #define virt_to_maddr(va) ((paddr_t)((vaddr_t)(va) & PADDR_MASK))
 
+#ifdef CONFIG_ARM_32
+#define is_xen_heap_page(page) ({ BUG_ON("unimplemented"); false; })
+#define is_xen_heap_mfn(mfn) ({ BUG_ON("unimplemented"); false; })
+#endif
+
 /* On MPU systems there is no translation, ma == va. */
 static inline void *maddr_to_virt(paddr_t ma)
 {
diff --git a/xen/arch/arm/mpu/Makefile b/xen/arch/arm/mpu/Makefile
index 21bbc517b5..c7e3aa4d87 100644
--- a/xen/arch/arm/mpu/Makefile
+++ b/xen/arch/arm/mpu/Makefile
@@ -1,3 +1,4 @@
+obj-$(CONFIG_ARM_32) += domain_page.o
 obj-y += mm.o
 obj-y += p2m.o
 obj-y += setup.init.o
diff --git a/xen/arch/arm/mpu/domain_page.c b/xen/arch/arm/mpu/domain_page.c
new file mode 100644
index 0000000000..9e30970588
--- /dev/null
+++ b/xen/arch/arm/mpu/domain_page.c
@@ -0,0 +1,45 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include 
+#include 
+#include 
+#include 
+
+void *map_domain_page_global(mfn_t mfn)
+{
+    BUG_ON("unimplemented");
+    return NULL;
+}
+
+/* Map a page of domheap memory */
+void *map_domain_page(mfn_t mfn)
+{
+    BUG_ON("unimplemented");
+    return NULL;
+}
+
+/* Release a mapping taken with map_domain_page() */
+void unmap_domain_page(const void *ptr)
+{
+    BUG_ON("unimplemented");
+}
+
+mfn_t domain_page_map_to_mfn(const void *ptr)
+{
+    BUG_ON("unimplemented");
+    return INVALID_MFN;
+}
+
+void unmap_domain_page_global(const void *va)
+{
+    BUG_ON("unimplemented");
+}
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
-- 
2.25.1



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Date: Fri, 11 Apr 2025 13:06:40 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein 
Subject: Re: [PATCH 1/3] Rework rootfs generation to make a cpio archive
Message-ID: 
References: <20250411105217.2141356-1-andrew.cooper3@citrix.com>
 <20250411105217.2141356-2-andrew.cooper3@citrix.com>
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Date: Fri, 11 Apr 2025 13:06:40 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein 
Subject: Re: [PATCH 1/3] Rework rootfs generation to make a cpio archive

On Fri, Apr 11, 2025 at 11:52:15AM +0100, Andrew Cooper wrote:
> Rename the script as we're going to use it for ARM64 shortly, and have it=
 take
> a tar or cpio parameter to determine the output format.
>=20
> Turn it into a proper bash script, and provide the cpio form under the new
> artefact naming scheme.
>=20
> No functional change.
>=20
> Signed-off-by: Andrew Cooper 
> ---
> CC: Anthony PERARD 
> CC: Stefano Stabellini 
> CC: Michal Orzel 
> CC: Doug Goldstein 
> CC: Marek Marczykowski-G=C3=B3recki 
> ---
>  .gitlab-ci.yml                                |  9 +++++++-
>  ...6_64-rootfs-alpine.sh =3D> alpine-rootfs.sh} | 21 +++++++++++++++++--
>  2 files changed, 27 insertions(+), 3 deletions(-)
>  rename scripts/{x86_64-rootfs-alpine.sh =3D> alpine-rootfs.sh} (75%)
>=20
> diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
> index 1d2c72b268a3..916c5ae9d508 100644
> --- a/.gitlab-ci.yml
> +++ b/.gitlab-ci.yml
> @@ -42,6 +42,13 @@ linux-6.6.86-arm64:
>  #
>  # x86_64 artifacts
>  #
> +alpine-3.18-x86_64-rootfs:
> +  extends: .x86_64-artifacts
> +  script:
> +    - ./scripts/alpine-rootfs.sh cpio
> +  variables:
> +    CONTAINER: alpine:3.18-x86_64-base
> +
>  linux-6.6.56-x86_64:
>    extends: .x86_64-artifacts
>    script: ./scripts/build-linux.sh
> @@ -62,7 +69,7 @@ x86_64-kernel-linux-6.6.56:
>  x86_64-rootfs-alpine-3.18:
>    extends: .x86_64-artifacts
>    script:
> -    - . scripts/x86_64-rootfs-alpine.sh
> +    - ./scripts/alpine-rootfs.sh tar
>    variables:
>      CONTAINER: alpine:3.18-x86_64-base
> =20
> diff --git a/scripts/x86_64-rootfs-alpine.sh b/scripts/alpine-rootfs.sh
> similarity index 75%
> rename from scripts/x86_64-rootfs-alpine.sh
> rename to scripts/alpine-rootfs.sh
> index b70b3a54ede5..c29c92d1c682 100755
> --- a/scripts/x86_64-rootfs-alpine.sh
> +++ b/scripts/alpine-rootfs.sh
> @@ -1,4 +1,9 @@
> +#!/bin/bash
> +
> +set -eu
> +
>  WORKDIR=3D"${PWD}"
> +COPYDIR=3D"${WORKDIR}/binaries"
> =20
>  apk update
> =20
> @@ -56,5 +61,17 @@ passwd -d "root" root
> =20
>  # Create rootfs
>  cd /
> -tar cvzf "${WORKDIR}/binaries/initrd.tar.gz" \
> -    bin dev etc home init lib mnt opt root sbin usr var
> +PATHS=3D"bin dev etc home init lib mnt opt root sbin usr var"
> +
> +case $1 in
> +    cpio)
> +        find $PATHS | cpio -o -H newc | gzip > "${COPYDIR}/rootfs.cpio.g=
z"
> +
> +        # Print the contents for the build log
> +        zcat "${COPYDIR}/rootfs.cpio.gz" | cpio -tv

add 'v' to cpio above instead?

> +        ;;
> +
> +    tar)
> +        tar cvzf "${COPYDIR}/initrd.tar.gz" $PATHS
> +        ;;
> +esac
> --=20
> 2.39.5
>=20

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Subject: Re: [PATCH 1/3] Rework rootfs generation to make a cpio archive
To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 
Cc: Xen-devel ,
 Anthony PERARD ,
 Stefano Stabellini ,
 Michal Orzel , Doug Goldstein 
References: <20250411105217.2141356-1-andrew.cooper3@citrix.com>
 <20250411105217.2141356-2-andrew.cooper3@citrix.com>
 
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On 11/04/2025 12:06 pm, Marek Marczykowski-Górecki wrote:
> On Fri, Apr 11, 2025 at 11:52:15AM +0100, Andrew Cooper wrote:
>> diff --git a/scripts/x86_64-rootfs-alpine.sh b/scripts/alpine-rootfs.sh
>> similarity index 75%
>> rename from scripts/x86_64-rootfs-alpine.sh
>> rename to scripts/alpine-rootfs.sh
>> index b70b3a54ede5..c29c92d1c682 100755
>> --- a/scripts/x86_64-rootfs-alpine.sh
>> +++ b/scripts/alpine-rootfs.sh
>> @@ -56,5 +61,17 @@ passwd -d "root" root
>>  
>>  # Create rootfs
>>  cd /
>> -tar cvzf "${WORKDIR}/binaries/initrd.tar.gz" \
>> -    bin dev etc home init lib mnt opt root sbin usr var
>> +PATHS="bin dev etc home init lib mnt opt root sbin usr var"
>> +
>> +case $1 in
>> +    cpio)
>> +        find $PATHS | cpio -o -H newc | gzip > "${COPYDIR}/rootfs.cpio.gz"
>> +
>> +        # Print the contents for the build log
>> +        zcat "${COPYDIR}/rootfs.cpio.gz" | cpio -tv
> add 'v' to cpio above instead?

Oh, of course.  There's another instance of this pattern in argo, which
I'll fix up too.

~Andrew


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Message-ID: <6000ef43-b24e-4bb5-8dd9-0fa2374adcf4@citrix.com>
Date: Fri, 11 Apr 2025 12:10:06 +0100
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH 2/4] Overhaul how Argo is built and packged
To: Denis Mukhin 
Cc: Xen-devel ,
 Anthony PERARD ,
 Stefano Stabellini ,
 Michal Orzel , Doug Goldstein ,
 =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 , Jason Andryuk ,
 "Daniel P . Smith" 
References: <20250410213724.2098383-1-andrew.cooper3@citrix.com>
 <20250410213724.2098383-3-andrew.cooper3@citrix.com>
 
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From: Andrew Cooper 
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In-Reply-To: 
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On 11/04/2025 3:22 am, Denis Mukhin wrote:
> On Thursday, April 10th, 2025 at 2:37 PM, Andrew Cooper  wrote:
>
>>
>> Right now, the argo artefacts are a pile of files which the test has to turn
>> back into something which resembles a filesystem. Furthermore, because we do
>> not build modules for the main kernel, it is extra important to make sure that
>> xen-argo.ko doesn't get out of sync.
>>
>> Build argo unconditionally as part of the linux artefact. It's ~100kb all
>> together, compared to ~14M for the kernel.
>>
>> Produce a single argo.cpio.gz with xen-argo.ko in the standard location.
>> Prune userspace down to just the executables and libraries.
>>
>> This is cribbed from the existing scripts/x86_64-linux-argo.sh, which stays in
>> place in the short term until Xen can be updated to use the new scheme.
>>
>> Signed-off-by: Andrew Cooper andrew.cooper3@citrix.com
>>
>> ---
>> CC: Anthony PERARD anthony.perard@vates.tech
>>
>> CC: Stefano Stabellini sstabellini@kernel.org
>>
>> CC: Michal Orzel michal.orzel@amd.com
>>
>> CC: Doug Goldstein cardoe@cardoe.com
>>
>> CC: Marek Marczykowski-Górecki marmarek@invisiblethingslab.com
>>
>> CC: Jason Andryuk jason.andryuk@amd.com
>>
>> CC: Daniel P. Smith dpsmith@apertussolutions.com
>>
>>
>> I tried to make MODPOST work properly, but we don't build enough of it for the
>> kernel, and I didn't feel like adding an extra 10 mins to the build (all
>> modules) just to get the metadata right.
>> ---
>> .gitlab-ci.yml | 2 ++
>> scripts/build-argo.sh | 67 ++++++++++++++++++++++++++++++++++++++++++
>> scripts/build-linux.sh | 6 +++-
>> 3 files changed, 74 insertions(+), 1 deletion(-)
>> create mode 100644 scripts/build-argo.sh
>>
>> diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
>> index fb997cc62162..790a6d9f9896 100644
>> --- a/.gitlab-ci.yml
>> +++ b/.gitlab-ci.yml
>> @@ -47,6 +47,8 @@ linux-6.6.56-x86_64:
>> script: ./scripts/build-linux.sh
>> variables:
>> LINUX_VERSION: 6.6.56
>> + ARGO_SHA: "705a7a8a624b42e13e655d3042059b8a85cdf6a3"
>> + ARGOEXEC_SHA: "d900429f6640acc6f68a3d3a4c945d7da60625d8"
>>
>> #
>> # The jobs below here are legacy and being phased out.
>> diff --git a/scripts/build-argo.sh b/scripts/build-argo.sh
>> new file mode 100644
>> index 000000000000..0b4005f3b9a0
>> --- /dev/null
>> +++ b/scripts/build-argo.sh
>> @@ -0,0 +1,67 @@
>> +#
>> +# This is a partial script, sourced by build-linux.sh
>> +# It has expectations about the environment
>> +#
>> +
>> +cd "${WORKDIR}"
>> +
>> +#
>> +# We're going to collect everything in argo.cpio.gz. Construct it under
>> +# $ARGODIR as we go.
>> +#
>> +ARGODIR="${WORKDIR}/argo-root"
>> +
>> +git clone https://github.com/OpenXT/linux-xen-argo.git --depth=1
>> +git -C "${WORKDIR}/linux-xen-argo" fetch origin "${ARGO_SHA}"
>> +git -C "${WORKDIR}/linux-xen-argo" switch --detach FETCH_HEAD
>> +
>> +# Build xen-argo.ko against the target kernel, and install it. Install
>> +# linux/argo.h too because userspace needs it.
>> +make -C "linux-${LINUX_VERSION}" \
>> + M="${WORKDIR}/linux-xen-argo/argo-linux" \
>> + KBUILD_MODPOST_WARN=1 \
>> + CFLAGS_MODULE="-Wno-error" \
> Suggest adding `W=e` for catching problems and `V=1` to help debugging a bit.

The currently referenced commit is buggy, and depends on this -Wno-error
to compile.

I've submitted a PR upstream to fix (see next patch), but there's no ETA
on when it will get merged, and we can't be blocked waiting on it.

>
>> + modules
>> +install -D -m644 "${WORKDIR}/linux-xen-argo/argo-linux/xen-argo.ko" \
>> + "${ARGODIR}/lib/modules/${LINUX_VERSION}/updates/xen-argo.ko"
>> +install -D -m644 "${WORKDIR}/linux-xen-argo/argo-linux/include/linux/argo.h" \
>> + "${ARGODIR}/usr/include/linux/argo.h"
>> +
>> +# Build and install libargo, applying fixes to build in Alpine Linux
>> +cd "${WORKDIR}/linux-xen-argo/libargo"
>> +sed -e "s|AM_INIT_AUTOMAKE|AC_CONFIG_AUX_DIR(.)\nAM_INIT_AUTOMAKE|" \
>> + -i configure.ac
>> +sed -e "s/_SOCKADDR_COMMON (sxenargo)/sa_family_t sxenargo_family/" \
>> + -e "s/__SOCKADDR_COMMON_SIZE/(sizeof (unsigned short int))/" \
>> + -i src/libargo.h
>> +
>> +autoreconf --install
>> +./configure --prefix=/usr CPPFLAGS="-I${PWD}/../argo-linux/include"
>> +make
> Perhaps add something like `make -j$(nproc)`?

Can do.  The build is so trivial you don't even notice it when non-parallel.

>
>> +make install DESTDIR="${ARGODIR}"
>> +
>> +# Build and install argo-exec, modifying for xilinx argo test
>> +cd "${WORKDIR}"
>> +curl -fsSLO \
>> + https://raw.githubusercontent.com/OpenXT/xenclient-oe/${ARGOEXEC_SHA}/recipes-openxt/argo-exec/argo-exec/argo-exec.c
>> +sed -e "/#include /d" \
>>
>> + -e "s|ret = shuffle(s, fds\[0\], fds\[1\]);|ret = shuffle(s, 0, 1);|" \
>> + -i argo-exec.c
>> +
>> +gcc -I"${ARGODIR}/usr/include" -L"${ARGODIR}/usr/lib/" \
>> + argo-exec.c -o "${ARGODIR}/usr/bin/argo-exec" -largo
>> +
>> +#
>> +# Building is now complete. Strip the devel components and the nointerposer
>> +# lib, which we don't care to deploy to the test system.
>> +#
>> +cd $ARGODIR
>> +rm -r usr/include usr/lib/pkgconfig
>> +find usr/lib -name \nointerposer\ -delete
>> +find usr/lib \( -name \.a -o -name \.so -o -name \*.la \) -delete
>> +
>> +# Package everything up
>> +find . | cpio -R 0:0 -H newc -o | gzip > "$COPYDIR/argo.cpio.gz"
>>
>> +
>> +# Print the contents for the build log
>> +zcat "$COPYDIR/argo.cpio.gz" | cpio -tv
>> diff --git a/scripts/build-linux.sh b/scripts/build-linux.sh
>> index 652fdba7b9d1..49b5ebed6424 100755
>> --- a/scripts/build-linux.sh
>> +++ b/scripts/build-linux.sh
>> @@ -8,7 +8,7 @@ fi
>> set -ex -o pipefail
>>
>> WORKDIR="${PWD}"
>> -COPYDIR="${WORKDIR}/binaries/"
>> +COPYDIR="${WORKDIR}/binaries"
>> UNAME=$(uname -m)
>>
>> # Build Linux
>> @@ -45,6 +45,10 @@ case $UNAME in
>> x86_64)
>> make -j$(nproc) bzImage
>> cp arch/x86/boot/bzImage "${COPYDIR}"
>> +
>> + # Build argo
>> + make modules_prepare
>> + . "${WORKDIR}/scripts/build-argo.sh"
> Nit: I would use `source` instead of `.` which is simple to overlook.

I expect you'll find that . is more common `source` in Xen.

~Andrew


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From: Luca Fancellu 
To: Ayan Kumar Halder 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Michal Orzel ,
	Volodymyr Babchuk 
Subject: Re: [PATCH v6 0/3] Enable early bootup of Armv8-R AArch32 systems
Thread-Topic: [PATCH v6 0/3] Enable early bootup of Armv8-R AArch32 systems
Thread-Index: AQHbqtGiUF1c7UE7dEqUOxk7cDhLvrOeUUwA
Date: Fri, 11 Apr 2025 11:19:07 +0000
Message-ID: <53CDA1B8-107C-4B08-88FB-D8822549DBB0@arm.com>
References: <20250411110452.3748186-1-ayan.kumar.halder@amd.com>
In-Reply-To: <20250411110452.3748186-1-ayan.kumar.halder@amd.com>
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Subject: Re: [PATCH 1/3] Rework rootfs generation to make a cpio archive
From: Andrew Cooper 
To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 
Cc: Xen-devel ,
 Anthony PERARD ,
 Stefano Stabellini ,
 Michal Orzel , Doug Goldstein 
References: <20250411105217.2141356-1-andrew.cooper3@citrix.com>
 <20250411105217.2141356-2-andrew.cooper3@citrix.com>
  
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On 11/04/2025 12:09 pm, Andrew Cooper wrote:
> On 11/04/2025 12:06 pm, Marek Marczykowski-Górecki wrote:
>> On Fri, Apr 11, 2025 at 11:52:15AM +0100, Andrew Cooper wrote:
>>> diff --git a/scripts/x86_64-rootfs-alpine.sh b/scripts/alpine-rootfs.sh
>>> similarity index 75%
>>> rename from scripts/x86_64-rootfs-alpine.sh
>>> rename to scripts/alpine-rootfs.sh
>>> index b70b3a54ede5..c29c92d1c682 100755
>>> --- a/scripts/x86_64-rootfs-alpine.sh
>>> +++ b/scripts/alpine-rootfs.sh
>>> @@ -56,5 +61,17 @@ passwd -d "root" root
>>>  
>>>  # Create rootfs
>>>  cd /
>>> -tar cvzf "${WORKDIR}/binaries/initrd.tar.gz" \
>>> -    bin dev etc home init lib mnt opt root sbin usr var
>>> +PATHS="bin dev etc home init lib mnt opt root sbin usr var"
>>> +
>>> +case $1 in
>>> +    cpio)
>>> +        find $PATHS | cpio -o -H newc | gzip > "${COPYDIR}/rootfs.cpio.gz"
>>> +
>>> +        # Print the contents for the build log
>>> +        zcat "${COPYDIR}/rootfs.cpio.gz" | cpio -tv
>> add 'v' to cpio above instead?
> Oh, of course.  There's another instance of this pattern in argo, which
> I'll fix up too.

Apparently not. 
https://gitlab.com/xen-project/hardware/test-artifacts/-/jobs/9695952322

I expect the -v is getting swallowed by the pipe.

~Andrew


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From: Ard Biesheuvel 
Date: Fri, 11 Apr 2025 13:35:57 +0200
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Subject: Re: [RFC PATCH] x86/xen: Fix PVH dom0 xen_hypercall detection
To: Andrew Cooper 
Cc: Jason Andryuk , agarciav@amd.com, jgross@suse.com, 
	anthony.perard@vates.tech, marmarek@invisiblethingslab.com, 
	michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, 
	xen-devel@lists.xenproject.org
Content-Type: text/plain; charset="UTF-8"

On Thu, 10 Apr 2025 at 23:49, Andrew Cooper  wrote:
>
> On 10/04/2025 8:50 pm, Jason Andryuk wrote:
> > A Xen PVH dom0 on an AMD processor triple faults early in boot on
> > 6.6.86.  CPU detection appears to fail, as the faulting instruction is
> > vmcall in xen_hypercall_intel() and not vmmcall in xen_hypercall_amd().
> >
> > Detection fails because __xen_hypercall_setfunc() returns the full
> > kernel mapped address of xen_hypercall_amd() or xen_hypercall_intel() -
> > e.g. 0xffffffff815b93f0.  But this is compared against the rip-relative
> > xen_hypercall_amd(%rip), which when running from identity mapping, is
> > only 0x015b93f0.
> >
> > Replace the rip-relative address with just loading the actual address to
> > restore the proper comparision.
> >
> > This only seems to affect PVH dom0 boot.  This is probably because the
> > XENMEM_memory_map hypercall is issued early on from the identity
> > mappings.  With a domU, the memory map is provided via hvm_start_info
> > and the hypercall is skipped.  The domU is probably running from the
> > kernel high mapping when it issues hypercalls.
> >
> > Signed-off-by: Jason Andryuk 
> > ---
> > I think this sort of address mismatch would be addresed by
> > e8fbc0d9cab6 ("x86/pvh: Call C code via the kernel virtual mapping")
> >
> > That could be backported instead, but it depends on a fair number of
> > patches.
>
> I've just spoken to Ard, and he thinks that it's standalone.  Should be
> ok to backport as a fix.
>

I've tried building and booting 6.6.y with the patch applied - GS will
still be set to the 1:1 mapped address but that shouldn't matter,
given that it is only used for the stack canary, and we don't do
address comparisons on that afaik.

> > Not sure on how getting a patch just into 6.6 would work.  This patch
> > could go into upstream Linux though it's not strictly necessary when the
> > rip-relative address is a high address.
>
> Do we know which other trees are broken?  I only found 6.6 because I was
> messing around with other bits of CI that happen to use 6.6.
>

I'd assume all trees that had the hypercall page removal patch
backported to them will be broken in the same way.


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Date: Fri, 11 Apr 2025 13:47:09 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein 
Subject: Re: [PATCH 1/3] Rework rootfs generation to make a cpio archive
Message-ID: 
References: <20250411105217.2141356-1-andrew.cooper3@citrix.com>
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Date: Fri, 11 Apr 2025 13:47:09 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein 
Subject: Re: [PATCH 1/3] Rework rootfs generation to make a cpio archive

On Fri, Apr 11, 2025 at 12:33:50PM +0100, Andrew Cooper wrote:
> On 11/04/2025 12:09 pm, Andrew Cooper wrote:
> > On 11/04/2025 12:06 pm, Marek Marczykowski-G=C3=B3recki wrote:
> >> On Fri, Apr 11, 2025 at 11:52:15AM +0100, Andrew Cooper wrote:
> >>> +        find $PATHS | cpio -o -H newc | gzip > "${COPYDIR}/rootfs.cp=
io.gz"
> >>> +
> >>> +        # Print the contents for the build log
> >>> +        zcat "${COPYDIR}/rootfs.cpio.gz" | cpio -tv
> >> add 'v' to cpio above instead?
> > Oh, of course.=C2=A0 There's another instance of this pattern in argo, =
which
> > I'll fix up too.
>=20
> Apparently not.=C2=A0
> https://gitlab.com/xen-project/hardware/test-artifacts/-/jobs/9695952322
>=20
> I expect the -v is getting swallowed by the pipe.

Great, busybox's cpio prints it to stdout instead of stderr (as normal
cpio do)...

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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On 11/04/2025 11:54 am, Roger Pau Monne wrote:
> The current logic in subpage_mmio_write_emulate() doesn't take into account
> the page offset, and always performs the writes at offset 0 (start of the
> page).
>
> Fix this by accounting for the offset before performing the write.
>
> Fixes: 8847d6e23f97 ('x86/mm: add API for marking only part of a MMIO page read only')
> Signed-off-by: Roger Pau Monné 

Reviewed-by: Andrew Cooper 


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Date: Fri, 11 Apr 2025 14:04:44 +0200
From: Alexander Gordeev 
To: Nicholas Piggin 
Cc: Andrew Morton ,
        Andrey Ryabinin ,
        Hugh Dickins , Guenter Roeck ,
        Juergen Gross , Jeremy Fitzhardinge ,
        linux-kernel@vger.kernel.org, linux-mm@kvack.org,
        kasan-dev@googlegroups.com, sparclinux@vger.kernel.org,
        xen-devel@lists.xenproject.org, linuxppc-dev@lists.ozlabs.org,
        linux-s390@vger.kernel.org
Subject: Re: [PATCH v1 0/4] mm: Fix apply_to_pte_range() vs lazy MMU mode
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On Fri, Apr 11, 2025 at 05:12:28PM +1000, Nicholas Piggin wrote:
...
> Huh. powerpc actually has some crazy code in __switch_to() that is
> supposed to handle preemption while in lazy mmu mode. So we probably
> don't even need to disable preemption, just use the raw per-cpu
> accessors (or keep disabling preemption and remove the now dead code
> from context switch).

Well, I tried to do the latter ;)
https://lore.kernel.org/linuxppc-dev/3b4e3e28172f09165b19ee7cac67a860d7cc1c6e.1742915600.git.agordeev@linux.ibm.com/
Not sure how it is aligned with the current state (see below).

> IIRC all this got built up over a long time with some TLB flush
> rules changing at the same time, we could probably stay in lazy mmu
> mode for a longer time until it was discovered we really need to
> flush before dropping the PTL.
> 
> ppc64 and sparc I think don't even need lazy mmu mode for kasan (TLBs
> do not require flushing) and will function just fine if not in lazy
> mode (they just flush one TLB at a time), not sure about xen. We could
> actually go the other way and require that archs operate properly when
> not in lazy mode (at least for kernel page tables) and avoid it for
> apply_to_page_range()?

Ryan Roberts hopefully brought some order to the topic:
https://lore.kernel.org/linux-mm/20250303141542.3371656-1-ryan.roberts@arm.com/

> Thanks,
> Nick


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From: Frediano Ziglio 
Date: Fri, 11 Apr 2025 13:25:47 +0100
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Subject: Re: [PATCH 1/3] Rework rootfs generation to make a cpio archive
To: Andrew Cooper 
Cc: Xen-devel , 
	Anthony PERARD , Stefano Stabellini , 
	Michal Orzel , Doug Goldstein , 
	=?UTF-8?Q?Marek_Marczykowski=2DG=C3=B3recki?= 
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On Fri, Apr 11, 2025 at 11:52=E2=80=AFAM Andrew Cooper
 wrote:
>
> Rename the script as we're going to use it for ARM64 shortly, and have it=
 take
> a tar or cpio parameter to determine the output format.
>
> Turn it into a proper bash script, and provide the cpio form under the ne=
w
> artefact naming scheme.
>
> No functional change.
>
> Signed-off-by: Andrew Cooper 
> ---
> CC: Anthony PERARD 
> CC: Stefano Stabellini 
> CC: Michal Orzel 
> CC: Doug Goldstein 
> CC: Marek Marczykowski-G=C3=B3recki 
> ---
>  .gitlab-ci.yml                                |  9 +++++++-
>  ...6_64-rootfs-alpine.sh =3D> alpine-rootfs.sh} | 21 +++++++++++++++++--
>  2 files changed, 27 insertions(+), 3 deletions(-)
>  rename scripts/{x86_64-rootfs-alpine.sh =3D> alpine-rootfs.sh} (75%)
>
> diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
> index 1d2c72b268a3..916c5ae9d508 100644
> --- a/.gitlab-ci.yml
> +++ b/.gitlab-ci.yml
> @@ -42,6 +42,13 @@ linux-6.6.86-arm64:
>  #
>  # x86_64 artifacts
>  #
> +alpine-3.18-x86_64-rootfs:
> +  extends: .x86_64-artifacts
> +  script:
> +    - ./scripts/alpine-rootfs.sh cpio
> +  variables:
> +    CONTAINER: alpine:3.18-x86_64-base
> +
>  linux-6.6.56-x86_64:
>    extends: .x86_64-artifacts
>    script: ./scripts/build-linux.sh
> @@ -62,7 +69,7 @@ x86_64-kernel-linux-6.6.56:
>  x86_64-rootfs-alpine-3.18:
>    extends: .x86_64-artifacts
>    script:
> -    - . scripts/x86_64-rootfs-alpine.sh
> +    - ./scripts/alpine-rootfs.sh tar
>    variables:
>      CONTAINER: alpine:3.18-x86_64-base
>
> diff --git a/scripts/x86_64-rootfs-alpine.sh b/scripts/alpine-rootfs.sh
> similarity index 75%
> rename from scripts/x86_64-rootfs-alpine.sh
> rename to scripts/alpine-rootfs.sh
> index b70b3a54ede5..c29c92d1c682 100755
> --- a/scripts/x86_64-rootfs-alpine.sh
> +++ b/scripts/alpine-rootfs.sh
> @@ -1,4 +1,9 @@
> +#!/bin/bash
> +
> +set -eu
> +
>  WORKDIR=3D"${PWD}"
> +COPYDIR=3D"${WORKDIR}/binaries"
>
>  apk update
>
> @@ -56,5 +61,17 @@ passwd -d "root" root
>
>  # Create rootfs
>  cd /
> -tar cvzf "${WORKDIR}/binaries/initrd.tar.gz" \
> -    bin dev etc home init lib mnt opt root sbin usr var
> +PATHS=3D"bin dev etc home init lib mnt opt root sbin usr var"
> +
> +case $1 in
> +    cpio)
> +        find $PATHS | cpio -o -H newc | gzip > "${COPYDIR}/rootfs.cpio.g=
z"
> +

Paranoia mode: -print0 for find and -0 for cpio to support weird file names=
?

> +        # Print the contents for the build log
> +        zcat "${COPYDIR}/rootfs.cpio.gz" | cpio -tv

I saw other comments about -v and busybox compatibility.
I suppose it depends how important are performances here, otherwise I
could suggest the usage of mkfifo before, use -F option to the fifo
and use an additional pipeline to compress the file.

mypipe=3D$(mktemp -u)
mkfifo $mypipe
gzip -c > "${COPYDIR}/rootfs.cpio.gz" < $mypipe &
find $PATHS -print0 | cpio -o -H newc -F $mypipe -0
wait # for gzip
rm $mypipe

> +        ;;
> +
> +    tar)
> +        tar cvzf "${COPYDIR}/initrd.tar.gz" $PATHS
> +        ;;
> +esac
> --
> 2.39.5
>
>

Frediano


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In-Reply-To: <20250411105217.2141356-3-andrew.cooper3@citrix.com>
From: Frediano Ziglio 
Date: Fri, 11 Apr 2025 13:35:15 +0100
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Message-ID: 
Subject: Re: [PATCH 2/3] Shrink the rootfs substantially
To: Andrew Cooper 
Cc: Xen-devel , 
	Anthony PERARD , Stefano Stabellini , 
	Michal Orzel , Doug Goldstein , 
	=?UTF-8?Q?Marek_Marczykowski=2DG=C3=B3recki?= 
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On Fri, Apr 11, 2025 at 11:52=E2=80=AFAM Andrew Cooper
 wrote:
>
> bash, busybox, musl and zlib are all in the base container.
>
> python3 and ncurses are in principle used by bits of Xen, but not in anyt=
hing
> we test in CI.  argp-standlone, curl, dbus, libfdt, libgcc and sudo aren'=
t
> used at all (for x86 at least).
>
> libbz2 and libuuid were pulled in transitively before, and need to be inc=
luded
> explicitly now.
>
> Use apk --no-cache to avoid keeping a ~2M package index on disk.
>
> Remove the modules scan on boot.  We don't have or build any.  This remov=
es a
> chunk of warnings on boot.
>
> This shrinks the rootfs from ~30M down to ~8M.
>
> No practical change.
>
> Signed-off-by: Andrew Cooper 
> ---
> CC: Anthony PERARD 
> CC: Stefano Stabellini 
> CC: Michal Orzel 
> CC: Doug Goldstein 
> CC: Marek Marczykowski-G=C3=B3recki 
>
> I'm still working on the integration of the new rootfs's int Xen, and wil=
l
> hold off until committing that's ready but
> https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/176351016=
4
> shows good early progress.
> ---
>  scripts/alpine-rootfs.sh | 60 +++++++++++++++++++++++-----------------
>  1 file changed, 34 insertions(+), 26 deletions(-)
>
> diff --git a/scripts/alpine-rootfs.sh b/scripts/alpine-rootfs.sh
> index c29c92d1c682..30d426d6e88f 100755
> --- a/scripts/alpine-rootfs.sh
> +++ b/scripts/alpine-rootfs.sh
> @@ -4,33 +4,42 @@ set -eu
>
>  WORKDIR=3D"${PWD}"
>  COPYDIR=3D"${WORKDIR}/binaries"
> +UNAME=3D$(uname -m)
>

Minor: maybe ARCH/MACHINE ?

> -apk update
> +apk --no-cache update
>
> -# xen runtime deps
> -apk add musl
> -apk add libgcc
> -apk add openrc
> -apk add busybox
> -apk add sudo
> -apk add dbus
> -apk add bash
> -apk add python3
> -apk add zlib
> -apk add lzo
> -apk add ncurses
> -apk add yajl
> -apk add libaio
> -apk add xz
> -apk add util-linux
> -apk add argp-standalone
> -apk add libfdt
> -apk add glib
> -apk add pixman
> -apk add curl
> -apk add udev
> -apk add pciutils
> -apk add libelf
> +PKGS=3D(
> +    # System
> +    openrc
> +    udev
> +    util-linux
> +
> +    # Xen toolstack runtime deps
> +    libbz2
> +    libuuid
> +    lzo
> +    xz
> +    yajl
> +
> +    # QEMU
> +    glib
> +    libaio
> +    pixman
> +    )

Minor: indent with "PKGS" ?

> +
> +case $UNAME in
> +    x86_64)
> +        PKGS+=3D(
> +            # System
> +            pciutils
> +
> +            # QEMU
> +            libelf
> +            )
> +        ;;
> +esac
> +
> +apk add --no-cache "${PKGS[@]}"
>
>  # Xen
>  cd /
> @@ -45,7 +54,6 @@ rc-update add dmesg sysinit
>  rc-update add hostname boot
>  rc-update add hwclock boot
>  rc-update add hwdrivers sysinit
> -rc-update add modules boot
>  rc-update add killprocs shutdown
>  rc-update add mount-ro shutdown
>  rc-update add savecache shutdown
> --
> 2.39.5
>
>

It looks good to me.

Frediano


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Subject: Re: [PATCH 1/3] Rework rootfs generation to make a cpio archive
To: Frediano Ziglio 
Cc: Xen-devel ,
 Anthony PERARD ,
 Stefano Stabellini ,
 Michal Orzel , Doug Goldstein ,
 =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= 
References: <20250411105217.2141356-1-andrew.cooper3@citrix.com>
 <20250411105217.2141356-2-andrew.cooper3@citrix.com>
 
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From: Andrew Cooper 
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On 11/04/2025 1:25 pm, Frediano Ziglio wrote:
> On Fri, Apr 11, 2025 at 11:52 AM Andrew Cooper
>  wrote:
>> Rename the script as we're going to use it for ARM64 shortly, and have it take
>> a tar or cpio parameter to determine the output format.
>>
>> Turn it into a proper bash script, and provide the cpio form under the new
>> artefact naming scheme.
>>
>> No functional change.
>>
>> Signed-off-by: Andrew Cooper 
>> ---
>> CC: Anthony PERARD 
>> CC: Stefano Stabellini 
>> CC: Michal Orzel 
>> CC: Doug Goldstein 
>> CC: Marek Marczykowski-Górecki 
>> ---
>>  .gitlab-ci.yml                                |  9 +++++++-
>>  ...6_64-rootfs-alpine.sh => alpine-rootfs.sh} | 21 +++++++++++++++++--
>>  2 files changed, 27 insertions(+), 3 deletions(-)
>>  rename scripts/{x86_64-rootfs-alpine.sh => alpine-rootfs.sh} (75%)
>>
>> diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
>> index 1d2c72b268a3..916c5ae9d508 100644
>> --- a/.gitlab-ci.yml
>> +++ b/.gitlab-ci.yml
>> @@ -42,6 +42,13 @@ linux-6.6.86-arm64:
>>  #
>>  # x86_64 artifacts
>>  #
>> +alpine-3.18-x86_64-rootfs:
>> +  extends: .x86_64-artifacts
>> +  script:
>> +    - ./scripts/alpine-rootfs.sh cpio
>> +  variables:
>> +    CONTAINER: alpine:3.18-x86_64-base
>> +
>>  linux-6.6.56-x86_64:
>>    extends: .x86_64-artifacts
>>    script: ./scripts/build-linux.sh
>> @@ -62,7 +69,7 @@ x86_64-kernel-linux-6.6.56:
>>  x86_64-rootfs-alpine-3.18:
>>    extends: .x86_64-artifacts
>>    script:
>> -    - . scripts/x86_64-rootfs-alpine.sh
>> +    - ./scripts/alpine-rootfs.sh tar
>>    variables:
>>      CONTAINER: alpine:3.18-x86_64-base
>>
>> diff --git a/scripts/x86_64-rootfs-alpine.sh b/scripts/alpine-rootfs.sh
>> similarity index 75%
>> rename from scripts/x86_64-rootfs-alpine.sh
>> rename to scripts/alpine-rootfs.sh
>> index b70b3a54ede5..c29c92d1c682 100755
>> --- a/scripts/x86_64-rootfs-alpine.sh
>> +++ b/scripts/alpine-rootfs.sh
>> @@ -1,4 +1,9 @@
>> +#!/bin/bash
>> +
>> +set -eu
>> +
>>  WORKDIR="${PWD}"
>> +COPYDIR="${WORKDIR}/binaries"
>>
>>  apk update
>>
>> @@ -56,5 +61,17 @@ passwd -d "root" root
>>
>>  # Create rootfs
>>  cd /
>> -tar cvzf "${WORKDIR}/binaries/initrd.tar.gz" \
>> -    bin dev etc home init lib mnt opt root sbin usr var
>> +PATHS="bin dev etc home init lib mnt opt root sbin usr var"
>> +
>> +case $1 in
>> +    cpio)
>> +        find $PATHS | cpio -o -H newc | gzip > "${COPYDIR}/rootfs.cpio.gz"
>> +
> Paranoia mode: -print0 for find and -0 for cpio to support weird file names?

This is a tiny alpine rootfs.  There aren't any, but weird filenames
would be a problem elsewhere too.

>
>> +        # Print the contents for the build log
>> +        zcat "${COPYDIR}/rootfs.cpio.gz" | cpio -tv
> I saw other comments about -v and busybox compatibility.
> I suppose it depends how important are performances here, otherwise I
> could suggest the usage of mkfifo before, use -F option to the fifo
> and use an additional pipeline to compress the file.
>
> mypipe=$(mktemp -u)
> mkfifo $mypipe
> gzip -c > "${COPYDIR}/rootfs.cpio.gz" < $mypipe &
> find $PATHS -print0 | cpio -o -H newc -F $mypipe -0
> wait # for gzip
> rm $mypipe

These artefacts are built once, then reused indefinitely.  Generating
this artefact takes 18s, most of which is the gitlab runner starting up.

~Andrew


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Date: Fri, 11 Apr 2025 13:41:12 +0100
Message-ID: 
From: Alejandro Vallejo 
To: Jason Andryuk , Andrew Cooper
	, Xen-devel 
CC: =?utf-8?q?Roger_Pau_Monn=C3=A9?= , "Stefano
 Stabellini" , Michal Orzel ,
	=?utf-8?q?Marek_Marczykowski-G=C3=B3recki?=
	, Anthony PERARD
	, Juergen Gross , Xen-devel
	
Subject: Re: [PATCH TEST-ARTEFACTS 0/8] Cleanup and Linux ARM64 support
X-Mailer: aerc 0.20.1
References: <20250409163702.2037301-1-andrew.cooper3@citrix.com>
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On Thu Apr 10, 2025 at 10:50 PM BST, Jason Andryuk wrote:
> On 2025-04-10 17:16, Jason Andryuk wrote:
>> On 2025-04-10 05:17, Andrew Cooper wrote:
>>> On 10/04/2025 1:09 am, Jason Andryuk wrote:
>>>> On 2025-04-09 13:01, Andrew Cooper wrote:
>>>>> On 09/04/2025 5:36 pm, Andrew Cooper wrote:
>>>
>>> 6.6.74 is broken too.=C2=A0 (That's the revision that the ARM tests wan=
t).
>>> So it broke somewhere between .56 and .74 which narrows the bisect a=20
>>> little.
>>>
>>> https://gitlab.com/xen-project/hardware/xen-staging/-/=20
>>> pipelines/1761323774
>>>
>>> In Gitlab, both AMD and Intel are failing in roughly the same way.
>>=20
>> Something else goes wrong in QEMU even with my patch for the hypercall,=
=20
>> and Linux eventually crashes.=C2=A0 Lots of unhandled memory read/write =
in=20
>> 0x1bfffe000 - 0x1bfffeff8, which is marked unusable for dom0.=C2=A0 I tr=
immed=20
>> lots of the consecutive "unhandled memory" from the attached log (313KB-=
=20
>>  >22KB)
>
> Seems like Rogers patches need backporting too:
>
> x86/xen: fix memblock_reserve() usage on PVH
> x86/xen: move xen_reserve_extra_memory()
>
> Regards,
> Jason

I just tested this with your RFC change + those 2 backports on top of
stable/v6.6.y and Linux does boot afterwards.

Well found.

Cheers,
Alejandro


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Subject: Re: [RFC PATCH] x86/xen: Fix PVH dom0 xen_hypercall detection
From: Alejandro Vallejo 
To: Jason Andryuk , 
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On Thu Apr 10, 2025 at 8:50 PM BST, Jason Andryuk wrote:
> A Xen PVH dom0 on an AMD processor triple faults early in boot on
> 6.6.86.  CPU detection appears to fail, as the faulting instruction is
> vmcall in xen_hypercall_intel() and not vmmcall in xen_hypercall_amd().
>
> Detection fails because __xen_hypercall_setfunc() returns the full
> kernel mapped address of xen_hypercall_amd() or xen_hypercall_intel() -
> e.g. 0xffffffff815b93f0.  But this is compared against the rip-relative
> xen_hypercall_amd(%rip), which when running from identity mapping, is
> only 0x015b93f0.
>
> Replace the rip-relative address with just loading the actual address to
> restore the proper comparision.
>
> This only seems to affect PVH dom0 boot.  This is probably because the
> XENMEM_memory_map hypercall is issued early on from the identity
> mappings.  With a domU, the memory map is provided via hvm_start_info
> and the hypercall is skipped.  The domU is probably running from the
> kernel high mapping when it issues hypercalls.
>
> Signed-off-by: Jason Andryuk 
> ---
> I think this sort of address mismatch would be addresed by
> e8fbc0d9cab6 ("x86/pvh: Call C code via the kernel virtual mapping")
>
> That could be backported instead, but it depends on a fair number of
> patches.
>
> Not sure on how getting a patch just into 6.6 would work.  This patch
> could go into upstream Linux though it's not strictly necessary when the
> rip-relative address is a high address.
> ---
>  arch/x86/xen/xen-head.S | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/xen/xen-head.S b/arch/x86/xen/xen-head.S
> index 059f343da76d..71a0eda2da60 100644
> --- a/arch/x86/xen/xen-head.S
> +++ b/arch/x86/xen/xen-head.S
> @@ -117,7 +117,7 @@ SYM_FUNC_START(xen_hypercall_hvm)
>  	pop %ebx
>  	pop %eax
>  #else
> -	lea xen_hypercall_amd(%rip), %rcx
> +	mov $xen_hypercall_amd, %rcx

(Now that this is known to be the fix upstream) This probably wants to
be plain lea without RIP-relative addressing, like the x86_32 branch
above?

>  	cmp %rax, %rcx
>  #ifdef CONFIG_FRAME_POINTER
>  	pop %rax	/* Dummy pop. */



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Subject: Re: [RFC PATCH] x86/xen: Fix PVH dom0 xen_hypercall detection
To: Alejandro Vallejo 
Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech,
 marmarek@invisiblethingslab.com, michal.orzel@amd.com, roger.pau@citrix.com,
 sstabellini@kernel.org, xen-devel@lists.xenproject.org,
 Jason Andryuk , jgross@suse.com
References: 
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On 11.04.2025 14:46, Alejandro Vallejo wrote:
> On Thu Apr 10, 2025 at 8:50 PM BST, Jason Andryuk wrote:
>> A Xen PVH dom0 on an AMD processor triple faults early in boot on
>> 6.6.86.  CPU detection appears to fail, as the faulting instruction is
>> vmcall in xen_hypercall_intel() and not vmmcall in xen_hypercall_amd().
>>
>> Detection fails because __xen_hypercall_setfunc() returns the full
>> kernel mapped address of xen_hypercall_amd() or xen_hypercall_intel() -
>> e.g. 0xffffffff815b93f0.  But this is compared against the rip-relative
>> xen_hypercall_amd(%rip), which when running from identity mapping, is
>> only 0x015b93f0.
>>
>> Replace the rip-relative address with just loading the actual address to
>> restore the proper comparision.
>>
>> This only seems to affect PVH dom0 boot.  This is probably because the
>> XENMEM_memory_map hypercall is issued early on from the identity
>> mappings.  With a domU, the memory map is provided via hvm_start_info
>> and the hypercall is skipped.  The domU is probably running from the
>> kernel high mapping when it issues hypercalls.
>>
>> Signed-off-by: Jason Andryuk 
>> ---
>> I think this sort of address mismatch would be addresed by
>> e8fbc0d9cab6 ("x86/pvh: Call C code via the kernel virtual mapping")
>>
>> That could be backported instead, but it depends on a fair number of
>> patches.
>>
>> Not sure on how getting a patch just into 6.6 would work.  This patch
>> could go into upstream Linux though it's not strictly necessary when the
>> rip-relative address is a high address.
>> ---
>>  arch/x86/xen/xen-head.S | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/x86/xen/xen-head.S b/arch/x86/xen/xen-head.S
>> index 059f343da76d..71a0eda2da60 100644
>> --- a/arch/x86/xen/xen-head.S
>> +++ b/arch/x86/xen/xen-head.S
>> @@ -117,7 +117,7 @@ SYM_FUNC_START(xen_hypercall_hvm)
>>  	pop %ebx
>>  	pop %eax
>>  #else
>> -	lea xen_hypercall_amd(%rip), %rcx
>> +	mov $xen_hypercall_amd, %rcx
> 
> (Now that this is known to be the fix upstream) This probably wants to
> be plain lea without RIP-relative addressing, like the x86_32 branch
> above?

Why would you want to use LEA there? It's functionally identical, but the
MOV can be encoded without ModR/M byte.

Jan


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Subject: Re: [RFC] xen/x86: allow overlaps with non-RAM regions
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CC: Stefano Stabellini ,
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On 2025-04-11 03:31, Roger Pau Monné wrote:
> Thanks Jason for getting back, I'm intrigued by this issue :).
> 
> On Thu, Apr 10, 2025 at 04:55:54PM -0400, Jason Andryuk wrote:
>> On 2025-04-04 06:28, Roger Pau Monné wrote:
>>> On Thu, Apr 03, 2025 at 06:01:42PM -0700, Stefano Stabellini wrote:
>>>> On one Sapphire AMD x86 board, I see this:
>>>>
>>>>
>>>> (XEN) [0000003943ca6ff2]  [00000000f0000000, 00000000f7ffffff] (reserved)
>>>> (XEN) [00000039460886d9]  [00000000fd000000, 00000000ffffffff] (reserved)
>>>> [...]
>>>> (XEN) [    4.612235] 0000:02:00.0: not mapping BAR [fea00, fea03] invalid position
>>>>
>>>>
>>>> Linux boots fine on this platform but Linux as Dom0 on Xen does not.
>>>> This is because the pci_check_bar->is_memory_hole check fails due to the
>>>> MMIO region overlapping with the EFI reserved region.
>>>
>>> That's weird.  (Partially) the reason to not attempt to map such BAR
>>> is that it should already be mapped, because at dom0 creation time all
>>> reserved regions are added to the p2m (see arch_iommu_hwdom_init()).
>>> If that's not the case we should figure out why this reserved region
>>> is not added to dom0 p2m as part of arch_iommu_hwdom_init().
>>
>> Victor discovered these regions are type 11 EfiMemoryMappedIO, but they get
>> converted to e820 RESERVED.  The BAR points into it.
>>
>> 00000f0000000-00000f7ffffff type=11 attr=800000000000100d
>> 00000fd000000-00000fedfffff type=11 attr=800000000000100d
>> 00000fee00000-00000fee00fff type=11 attr=8000000000000001
>> 00000fee01000-00000ffffffff type=11 attr=800000000000100d
>>
>> Xenia discovered Linux keeps small regions like this reserved, but lets
>> larger ones (>= 256kb) become holes.  See the comment in Linux
>> arch/x86/platform/efi/efi.c:efi_remove_e820_mmio() around line 301.
> 
> Right, but whatever Linux decides to do with the reserved regions
> won't affect how Xen maps them into the p2m.  Anything that's reserved
> in the e820 should end up identity mapped in the p2m for PVH dom0,
> unless it's being exclusively used by Xen (see
> dom0_setup_permissions() use of iomem_deny_access() to deny dom0
> access to some MMIO regions).

Oh, my point was more that Baremetal Linux won't have reserved ranges in 
these regions, so there would not be any BAR conflicts.  Though I'm not 
sure if it checks.

If Xen removed them from the memory map, then pci_check_bar() -> 
is_memory_hole() would pass.

>> The description of EfiMemoryMappedIO is a little confusing, which is
>> probably why its use in unclear.
>>
>> ```
>> Table 7.5 Memory Type Usage before ExitBootServices()
>> EfiMemoryMappedIO
>>
>> Used by system firmware to request that a memory-mapped IO region be mapped
>> by the OS to a virtual address so it can be accessed by EFI runtime
>> services.
>>
>> Table 7.6 Memory Type Usage after ExitBootServices()
>> EfiMemoryMappedIO
>>
>> This memory is not used by the OS. All system memory-mapped IO information
>> should come from ACPI tables.
>> ```
>>
>> The two after ExitBootServices sentences seem contradictory.  I wonder if it
>> should be "Ignore this memory type - All system memory-mapped IO information
>> should come from ACPI tables".
> 
> Not very helpful indeed.  The description in "before
> ExitBootServices()" seems more sensible to me: if the MMIO region is
> used by runtime services Xen should ensure it's always mapped in the
> dom0 p2m (which Xen should in principle already do).
> 
>>> Can you paste the dom0 build output when booted with `iommu=verbose
>>> dom0=pvh,verbose`?
> 
> Would it be possible to see the output of a debug=y build when booted
> with `iommu=verbose dom0=pvh,verbose` (with or without pf-fixup,
> either is fine).
> 
> I'm specially interested in the ranggeset contents printed after "d0:
> identity mappings for IOMMU:", but if possible would like to see the
> full boot log (including Linux dom0).

Attached.

Regards,
Jason
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Date: Fri, 11 Apr 2025 15:10:50 +0100
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Subject: Re: [RFC PATCH] x86/xen: Fix PVH dom0 xen_hypercall detection
From: Alejandro Vallejo 
To: Jan Beulich 
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On Fri Apr 11, 2025 at 2:08 PM BST, Jan Beulich wrote:
> On 11.04.2025 14:46, Alejandro Vallejo wrote:
>> On Thu Apr 10, 2025 at 8:50 PM BST, Jason Andryuk wrote:
>>> A Xen PVH dom0 on an AMD processor triple faults early in boot on
>>> 6.6.86.  CPU detection appears to fail, as the faulting instruction is
>>> vmcall in xen_hypercall_intel() and not vmmcall in xen_hypercall_amd().
>>>
>>> Detection fails because __xen_hypercall_setfunc() returns the full
>>> kernel mapped address of xen_hypercall_amd() or xen_hypercall_intel() -
>>> e.g. 0xffffffff815b93f0.  But this is compared against the rip-relative
>>> xen_hypercall_amd(%rip), which when running from identity mapping, is
>>> only 0x015b93f0.
>>>
>>> Replace the rip-relative address with just loading the actual address t=
o
>>> restore the proper comparision.
>>>
>>> This only seems to affect PVH dom0 boot.  This is probably because the
>>> XENMEM_memory_map hypercall is issued early on from the identity
>>> mappings.  With a domU, the memory map is provided via hvm_start_info
>>> and the hypercall is skipped.  The domU is probably running from the
>>> kernel high mapping when it issues hypercalls.
>>>
>>> Signed-off-by: Jason Andryuk 
>>> ---
>>> I think this sort of address mismatch would be addresed by
>>> e8fbc0d9cab6 ("x86/pvh: Call C code via the kernel virtual mapping")
>>>
>>> That could be backported instead, but it depends on a fair number of
>>> patches.
>>>
>>> Not sure on how getting a patch just into 6.6 would work.  This patch
>>> could go into upstream Linux though it's not strictly necessary when th=
e
>>> rip-relative address is a high address.
>>> ---
>>>  arch/x86/xen/xen-head.S | 2 +-
>>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/arch/x86/xen/xen-head.S b/arch/x86/xen/xen-head.S
>>> index 059f343da76d..71a0eda2da60 100644
>>> --- a/arch/x86/xen/xen-head.S
>>> +++ b/arch/x86/xen/xen-head.S
>>> @@ -117,7 +117,7 @@ SYM_FUNC_START(xen_hypercall_hvm)
>>>  	pop %ebx
>>>  	pop %eax
>>>  #else
>>> -	lea xen_hypercall_amd(%rip), %rcx
>>> +	mov $xen_hypercall_amd, %rcx
>>=20
>> (Now that this is known to be the fix upstream) This probably wants to
>> be plain lea without RIP-relative addressing, like the x86_32 branch
>> above?
>
> Why would you want to use LEA there? It's functionally identical, but the
> MOV can be encoded without ModR/M byte.
>
> Jan

It's not the using of a particular encoding that I meant, but not using
the same on both 32 and 64 bit paths. Surely whatever argument in favour
of either would hold for both 32 and 64 bits.

Cheers,
Alejandro


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Subject: Re: [RFC PATCH] x86/xen: Fix PVH dom0 xen_hypercall detection
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On 2025-04-11 07:35, Ard Biesheuvel wrote:
> On Thu, 10 Apr 2025 at 23:49, Andrew Cooper  wrote:
>>
>> On 10/04/2025 8:50 pm, Jason Andryuk wrote:
>>> A Xen PVH dom0 on an AMD processor triple faults early in boot on
>>> 6.6.86.  CPU detection appears to fail, as the faulting instruction is
>>> vmcall in xen_hypercall_intel() and not vmmcall in xen_hypercall_amd().
>>>
>>> Detection fails because __xen_hypercall_setfunc() returns the full
>>> kernel mapped address of xen_hypercall_amd() or xen_hypercall_intel() -
>>> e.g. 0xffffffff815b93f0.  But this is compared against the rip-relative
>>> xen_hypercall_amd(%rip), which when running from identity mapping, is
>>> only 0x015b93f0.
>>>
>>> Replace the rip-relative address with just loading the actual address to
>>> restore the proper comparision.
>>>
>>> This only seems to affect PVH dom0 boot.  This is probably because the
>>> XENMEM_memory_map hypercall is issued early on from the identity
>>> mappings.  With a domU, the memory map is provided via hvm_start_info
>>> and the hypercall is skipped.  The domU is probably running from the
>>> kernel high mapping when it issues hypercalls.
>>>
>>> Signed-off-by: Jason Andryuk 
>>> ---
>>> I think this sort of address mismatch would be addresed by
>>> e8fbc0d9cab6 ("x86/pvh: Call C code via the kernel virtual mapping")
>>>
>>> That could be backported instead, but it depends on a fair number of
>>> patches.
>>
>> I've just spoken to Ard, and he thinks that it's standalone.  Should be
>> ok to backport as a fix.
>>
> 
> I've tried building and booting 6.6.y with the patch applied - GS will
> still be set to the 1:1 mapped address but that shouldn't matter,
> given that it is only used for the stack canary, and we don't do
> address comparisons on that afaik.

Yes, it seems to work - I tested with dom0 and it booted.  I removed the 
use of phys_base - the diff is included below.  Does that match what you 
did?

>>> Not sure on how getting a patch just into 6.6 would work.  This patch
>>> could go into upstream Linux though it's not strictly necessary when the
>>> rip-relative address is a high address.
>>
>> Do we know which other trees are broken?  I only found 6.6 because I was
>> messing around with other bits of CI that happen to use 6.6.
>>
> 
> I'd assume all trees that had the hypercall page removal patch
> backported to them will be broken in the same way.

Yes, I think so.  Looks like it went back to 5.10 but not to 5.4.

Ard, I can submit the stable request unless you want to.

Regards,
Jason

diff --git a/arch/x86/platform/pvh/head.S b/arch/x86/platform/pvh/head.S
index c4365a05ab83..9bf4cc04f079 100644
--- a/arch/x86/platform/pvh/head.S
+++ b/arch/x86/platform/pvh/head.S
@@ -100,7 +100,11 @@ SYM_CODE_START_LOCAL(pvh_start_xen)
         xor %edx, %edx
         wrmsr

-       call xen_prepare_pvh
+       /* Call xen_prepare_pvh() via the kernel virtual mapping */
+       leaq xen_prepare_pvh(%rip), %rax
+       addq $__START_KERNEL_map, %rax
+       ANNOTATE_RETPOLINE_SAFE
+       call *%rax

         /* startup_64 expects boot_params in %rsi. */
         mov $_pa(pvh_bootparams), %rsi



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From: Luca Fancellu 
To: xen-devel@lists.xenproject.org
Cc: Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk 
Subject: [PATCH v3 3/7] arm/mpu: Introduce utility functions for the pr_t type
Date: Fri, 11 Apr 2025 15:56:51 +0100
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Introduce few utility function to manipulate and handle the
pr_t type.

Signed-off-by: Luca Fancellu 
---
 xen/arch/arm/include/asm/mpu.h | 40 ++++++++++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h
index 59ff22c804c1..6971507457fb 100644
--- a/xen/arch/arm/include/asm/mpu.h
+++ b/xen/arch/arm/include/asm/mpu.h
@@ -20,6 +20,46 @@
 #define NUM_MPU_REGIONS_MASK    (NUM_MPU_REGIONS - 1)
 #define MAX_MPU_REGIONS         NUM_MPU_REGIONS_MASK
 
+#ifndef __ASSEMBLY__
+
+/* Set base address of MPU protection region(pr_t). */
+static inline void pr_set_base(pr_t *pr, paddr_t base)
+{
+    pr->prbar.reg.base = (base >> MPU_REGION_SHIFT);
+}
+
+/* Set limit address of MPU protection region(pr_t). */
+static inline void pr_set_limit(pr_t *pr, paddr_t limit)
+{
+    pr->prlar.reg.limit = ((limit - 1) >> MPU_REGION_SHIFT);
+}
+
+/*
+ * Access to get base address of MPU protection region(pr_t).
+ * The base address shall be zero extended.
+ */
+static inline paddr_t pr_get_base(pr_t *pr)
+{
+    return (paddr_t)(pr->prbar.reg.base << MPU_REGION_SHIFT);
+}
+
+/*
+ * Access to get limit address of MPU protection region(pr_t).
+ * The limit address shall be concatenated with 0x3f.
+ */
+static inline paddr_t pr_get_limit(pr_t *pr)
+{
+    return (paddr_t)((pr->prlar.reg.limit << MPU_REGION_SHIFT)
+                     | ~MPU_REGION_MASK);
+}
+
+static inline bool region_is_valid(pr_t *pr)
+{
+    return pr->prlar.reg.en;
+}
+
+#endif /* __ASSEMBLY__ */
+
 #endif /* __ARM_MPU_H__ */
 
 /*
-- 
2.34.1



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Subject: [PATCH v3 5/7] arm/mpu: Introduce MPU memory mapping flags
Date: Fri, 11 Apr 2025 15:56:53 +0100
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Introduce the MPU memory mapping flags in asm/page.h.

Signed-off-by: Luca Fancellu 
---
 xen/arch/arm/include/asm/page.h | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/xen/arch/arm/include/asm/page.h b/xen/arch/arm/include/asm/page.h
index 69f817d1e68a..22f7d2c6cb30 100644
--- a/xen/arch/arm/include/asm/page.h
+++ b/xen/arch/arm/include/asm/page.h
@@ -62,6 +62,7 @@
 
 #define MAIRVAL (MAIR1VAL << 32 | MAIR0VAL)
 
+#ifdef CONFIG_MMU
 /*
  * Layout of the flags used for updating the hypervisor page tables
  *
@@ -90,6 +91,30 @@
 #define _PAGE_CONTIG_BIT    8
 #define _PAGE_CONTIG        (1U << _PAGE_CONTIG_BIT)
 
+#else /* !CONFIG_MMU */
+
+/*
+ * Layout of the flags used for updating MPU memory region attributes
+ * [0:2] Memory attribute Index
+ * [3:4] Execute Never
+ * [5:6] Access Permission
+ * [7]   Region Present
+ */
+#define _PAGE_AI_BIT            0
+#define _PAGE_XN_BIT            3
+#define _PAGE_AP_BIT            5
+#define _PAGE_PRESENT_BIT       7
+#define _PAGE_AI                (7U << _PAGE_AI_BIT)
+#define _PAGE_XN                (2U << _PAGE_XN_BIT)
+#define _PAGE_RO                (2U << _PAGE_AP_BIT)
+#define _PAGE_PRESENT           (1U << _PAGE_PRESENT_BIT)
+#define PAGE_AI_MASK(x)         (((x) >> _PAGE_AI_BIT) & 0x7U)
+#define PAGE_XN_MASK(x)         (((x) >> _PAGE_XN_BIT) & 0x3U)
+#define PAGE_AP_MASK(x)         (((x) >> _PAGE_AP_BIT) & 0x3U)
+#define PAGE_RO_MASK(x)         (((x) >> _PAGE_AP_BIT) & 0x2U)
+
+#endif /* CONFIG_MMU */
+
 /*
  * _PAGE_DEVICE and _PAGE_NORMAL are convenience defines. They are not
  * meant to be used outside of this header.
-- 
2.34.1



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Cc: Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk 
Subject: [PATCH v3 4/7] arm/mpu: Provide a constructor for pr_t type
Date: Fri, 11 Apr 2025 15:56:52 +0100
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Provide a function that creates a pr_t object from a memory
range and some attributes.

Signed-off-by: Luca Fancellu 
---
 xen/arch/arm/include/asm/arm64/mpu.h | 11 +++++
 xen/arch/arm/include/asm/mpu.h       |  4 ++
 xen/arch/arm/include/asm/mpu/mm.h    |  3 ++
 xen/arch/arm/mpu/mm.c                | 73 ++++++++++++++++++++++++++++
 4 files changed, 91 insertions(+)

diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/asm/arm64/mpu.h
index b4e1ecdf741d..eb0add5c6c2a 100644
--- a/xen/arch/arm/include/asm/arm64/mpu.h
+++ b/xen/arch/arm/include/asm/arm64/mpu.h
@@ -6,6 +6,17 @@
 #ifndef __ARM_ARM64_MPU_H__
 #define __ARM_ARM64_MPU_H__
 
+/*
+ * Excute never.
+ * Stage 1 EL2 translation regime.
+ * XN[1] determines whether execution of the instruction fetched from the MPU
+ * memory region is permitted.
+ * Stage 2 EL1/EL0 translation regime.
+ * XN[0] determines whether execution of the instruction fetched from the MPU
+ * memory region is permitted.
+ */
+#define XN_EL2_ENABLED  0x2
+
 #ifndef __ASSEMBLY__
 
 /*
diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h
index 6971507457fb..eba5086cde97 100644
--- a/xen/arch/arm/include/asm/mpu.h
+++ b/xen/arch/arm/include/asm/mpu.h
@@ -20,6 +20,10 @@
 #define NUM_MPU_REGIONS_MASK    (NUM_MPU_REGIONS - 1)
 #define MAX_MPU_REGIONS         NUM_MPU_REGIONS_MASK
 
+/* Access permission attributes. */
+/* Read/Write at EL2, No Access at EL1/EL0. */
+#define AP_RW_EL2 0x0
+
 #ifndef __ASSEMBLY__
 
 /* Set base address of MPU protection region(pr_t). */
diff --git a/xen/arch/arm/include/asm/mpu/mm.h b/xen/arch/arm/include/asm/mpu/mm.h
index 5cabe9d111ce..9c7a01d6bd58 100644
--- a/xen/arch/arm/include/asm/mpu/mm.h
+++ b/xen/arch/arm/include/asm/mpu/mm.h
@@ -53,6 +53,9 @@ extern void read_protection_region(pr_t *pr_read, uint8_t sel);
 /* Writes the MPU region with index 'sel' to the HW */
 extern void write_protection_region(const pr_t *pr_write, uint8_t sel);
 
+/* Creates a pr_t entry for the MPU data structure */
+extern pr_t pr_of_xenaddr(paddr_t base, paddr_t limit, unsigned attr);
+
 #endif /* __ARM_MPU_MM_H__ */
 
 /*
diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c
index e522ce53c357..635d1f5a2ba0 100644
--- a/xen/arch/arm/mpu/mm.c
+++ b/xen/arch/arm/mpu/mm.c
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 struct page_info *frame_table;
@@ -149,6 +150,78 @@ void write_protection_region(const pr_t *pr_write, uint8_t sel)
     }
 }
 
+/*
+ * Standard entry for building up the structure of MPU memory region(pr_t).
+ * It is equivalent to mfn_to_xen_entry in MMU system.
+ * Base and limit refer to exclusive range [start, limit].
+ */
+pr_t pr_of_xenaddr(paddr_t base, paddr_t limit, unsigned attr)
+{
+    prbar_t prbar;
+    prlar_t prlar;
+    pr_t region;
+
+    /* Build up value for PRBAR_EL2. */
+    prbar = (prbar_t) {
+        .reg = {
+            .ap = AP_RW_EL2,      /* Read/Write at EL2, no access at EL1/EL0. */
+            .xn = XN_EL2_ENABLED, /* No need to execute outside .text */
+        }};
+
+    switch ( attr )
+    {
+    case MT_NORMAL_NC:
+        /*
+         * ARM ARM: Overlaying the shareability attribute (DDI
+         * 0406C.b B3-1376 to 1377)
+         *
+         * A memory region with a resultant memory type attribute of normal,
+         * and a resultant cacheability attribute of Inner non-cacheable,
+         * outer non-cacheable, must have a resultant shareability attribute
+         * of outer shareable, otherwise shareability is UNPREDICTABLE.
+         *
+         * On ARMv8 sharability is ignored and explicitly treated as outer
+         * shareable for normal inner non-cacheable, outer non-cacheable.
+         */
+        prbar.reg.sh = LPAE_SH_OUTER;
+        break;
+    case MT_DEVICE_nGnRnE:
+    case MT_DEVICE_nGnRE:
+        /*
+         * Shareability is ignored for non-normal memory, Outer is as
+         * good as anything.
+         *
+         * On ARMv8 sharability is ignored and explicitly treated as outer
+         * shareable for any device memory type.
+         */
+        prbar.reg.sh = LPAE_SH_OUTER;
+        break;
+    default:
+        /* Xen mappings are SMP coherent */
+        prbar.reg.sh = LPAE_SH_INNER;
+    }
+
+    /* Build up value for PRLAR_EL2. */
+    prlar = (prlar_t) {
+        .reg = {
+            .ns = 0,        /* Hyp mode is in secure world */
+            .ai = attr,
+            .en = 1,        /* Region enabled */
+        }};
+
+    /* Build up MPU memory region. */
+    region = (pr_t) {
+        .prbar = prbar,
+        .prlar = prlar,
+    };
+
+    /* Set base address and limit address. */
+    pr_set_base(®ion, base);
+    pr_set_limit(®ion, limit);
+
+    return region;
+}
+
 void __init setup_mm(void)
 {
     BUG_ON("unimplemented");
-- 
2.34.1



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	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk 
Subject: [PATCH v3 0/7] First chunk for Arm R82 and MPU support
Date: Fri, 11 Apr 2025 15:56:48 +0100
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Hi all,

This is the first chunk of work to support MPU and R82 on Xen, this serie
reaches the early boot stages until setup_pagetables() which is not used for MPU
but it is just to give an idea about which stage of the boot is reached.

v3 changes:
 - stated on each patch
v2 changes for this serie:
 - rebased serie on the MPU skeleton that allow compilation
 - removed some patches already merged in the MPU skeleton


Luca Fancellu (6):
  arm/mpu: Provide access to the MPU region from the C code
  arm/mpu: Introduce utility functions for the pr_t type
  arm/mpu: Provide a constructor for pr_t type
  arm/mpu: Introduce MPU memory mapping flags
  arm/mpu: Implement early_fdt_map support in MPU systems
  arm/mpu: Implement setup_mpu for MPU system

Penny Zheng (1):
  arm/mpu: Introduce MPU memory region map structure

 xen/arch/arm/include/asm/arm64/mpu.h |  62 +++++++
 xen/arch/arm/include/asm/mpu.h       |  52 ++++++
 xen/arch/arm/include/asm/mpu/mm.h    |  27 +++
 xen/arch/arm/include/asm/page.h      |  25 +++
 xen/arch/arm/mpu/mm.c                | 251 ++++++++++++++++++++++++++-
 xen/arch/arm/mpu/setup.c             |  54 +++++-
 6 files changed, 468 insertions(+), 3 deletions(-)
 create mode 100644 xen/arch/arm/include/asm/arm64/mpu.h

-- 
2.34.1



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Subject: [PATCH v3 2/7] arm/mpu: Provide access to the MPU region from the C code
Date: Fri, 11 Apr 2025 15:56:50 +0100
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Implement some utility function in order to access the MPU regions
from the C world.

Signed-off-by: Luca Fancellu 
---
v3 changes:
 - Moved PRBAR0_EL2/PRLAR0_EL2 to arm64 specific
 - Modified prepare_selector() to be easily made a NOP
   for Arm32, which can address up to 32 region without
   changing selector and it is also its maximum amount
   of MPU regions.
---
---
 xen/arch/arm/include/asm/arm64/mpu.h |   7 ++
 xen/arch/arm/include/asm/mpu.h       |   1 +
 xen/arch/arm/include/asm/mpu/mm.h    |  24 +++++
 xen/arch/arm/mpu/mm.c                | 125 +++++++++++++++++++++++++++
 4 files changed, 157 insertions(+)

diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/asm/arm64/mpu.h
index 4d2bd7d7877f..b4e1ecdf741d 100644
--- a/xen/arch/arm/include/asm/arm64/mpu.h
+++ b/xen/arch/arm/include/asm/arm64/mpu.h
@@ -8,6 +8,13 @@
 
 #ifndef __ASSEMBLY__
 
+/*
+ * The following are needed for the case generators GENERATE_WRITE_PR_REG_CASE
+ * and GENERATE_READ_PR_REG_CASE with num==0
+ */
+#define PRBAR0_EL2 PRBAR_EL2
+#define PRLAR0_EL2 PRLAR_EL2
+
 /* Protection Region Base Address Register */
 typedef union {
     struct __packed {
diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h
index e148c705b82c..59ff22c804c1 100644
--- a/xen/arch/arm/include/asm/mpu.h
+++ b/xen/arch/arm/include/asm/mpu.h
@@ -13,6 +13,7 @@
 #define MPU_REGION_SHIFT  6
 #define MPU_REGION_ALIGN  (_AC(1, UL) << MPU_REGION_SHIFT)
 #define MPU_REGION_MASK   (~(MPU_REGION_ALIGN - 1))
+#define MPU_REGION_RES0   (0xFFFULL << 52)
 
 #define NUM_MPU_REGIONS_SHIFT   8
 #define NUM_MPU_REGIONS         (_AC(1, UL) << NUM_MPU_REGIONS_SHIFT)
diff --git a/xen/arch/arm/include/asm/mpu/mm.h b/xen/arch/arm/include/asm/mpu/mm.h
index 86f33d9836b7..5cabe9d111ce 100644
--- a/xen/arch/arm/include/asm/mpu/mm.h
+++ b/xen/arch/arm/include/asm/mpu/mm.h
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 
 extern struct page_info *frame_table;
 
@@ -29,6 +30,29 @@ static inline struct page_info *virt_to_page(const void *v)
     return mfn_to_page(mfn);
 }
 
+/* Utility function to be used whenever MPU regions are modified */
+static inline void context_sync_mpu(void)
+{
+    /*
+     * ARM DDI 0600B.a, C1.7.1
+     * Writes to MPU registers are only guaranteed to be visible following a
+     * Context synchronization event and DSB operation.
+     */
+    dsb(sy);
+    isb();
+}
+
+/*
+ * The following API require context_sync_mpu() after being used to modifiy MPU
+ * regions:
+ *  - write_protection_region
+ */
+
+/* Reads the MPU region with index 'sel' from the HW */
+extern void read_protection_region(pr_t *pr_read, uint8_t sel);
+/* Writes the MPU region with index 'sel' to the HW */
+extern void write_protection_region(const pr_t *pr_write, uint8_t sel);
+
 #endif /* __ARM_MPU_MM_H__ */
 
 /*
diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c
index f83ce04fef8a..e522ce53c357 100644
--- a/xen/arch/arm/mpu/mm.c
+++ b/xen/arch/arm/mpu/mm.c
@@ -8,12 +8,30 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 struct page_info *frame_table;
 
 /* EL2 Xen MPU memory region mapping table. */
 pr_t xen_mpumap[MAX_MPU_REGIONS];
 
+#define GENERATE_WRITE_PR_REG_CASE(num, pr)                                 \
+    case num:                                                               \
+    {                                                                       \
+        WRITE_SYSREG(pr->prbar.bits & ~MPU_REGION_RES0, PRBAR##num##_EL2);  \
+        WRITE_SYSREG(pr->prlar.bits & ~MPU_REGION_RES0, PRLAR##num##_EL2);  \
+        break;                                                              \
+    }
+
+#define GENERATE_READ_PR_REG_CASE(num, pr)                      \
+    case num:                                                   \
+    {                                                           \
+        pr->prbar.bits = READ_SYSREG(PRBAR##num##_EL2);         \
+        pr->prlar.bits = READ_SYSREG(PRLAR##num##_EL2);         \
+        break;                                                  \
+    }
+
 static void __init __maybe_unused build_assertions(void)
 {
     /*
@@ -24,6 +42,113 @@ static void __init __maybe_unused build_assertions(void)
     BUILD_BUG_ON(PAGE_SIZE != SZ_4K);
 }
 
+static void prepare_selector(uint8_t *sel)
+{
+    uint8_t cur_sel = *sel;
+    /*
+     * {read,write}_protection_region works using the direct access to the 0..15
+     * regions, so in order to save the isb() overhead, change the PRSELR_EL2
+     * only when needed, so when the upper 4 bits of the selector will change.
+     */
+    cur_sel &= 0xF0U;
+    if ( READ_SYSREG(PRSELR_EL2) != cur_sel )
+    {
+        WRITE_SYSREG(cur_sel, PRSELR_EL2);
+        isb();
+    }
+    *sel = *sel & 0xFU;
+}
+
+/*
+ * Armv8-R AArch64 at most supports 255 MPU protection regions.
+ * See section G1.3.18 of the reference manual for Armv8-R AArch64,
+ * PRBAR_EL2 and PRLAR_EL2 provide access to the EL2 MPU region
+ * determined by the value of 'n' and PRSELR_EL2.REGION as
+ * PRSELR_EL2.REGION<7:4>:n(n = 0, 1, 2, ... , 15)
+ * For example to access regions from 16 to 31 (0b10000 to 0b11111):
+ * - Set PRSELR_EL2 to 0b1xxxx
+ * - Region 16 configuration is accessible through PRBAR_EL2 and PRLAR_EL2
+ * - Region 17 configuration is accessible through PRBAR1_EL2 and PRLAR1_EL2
+ * - Region 18 configuration is accessible through PRBAR2_EL2 and PRLAR2_EL2
+ * - ...
+ * - Region 31 configuration is accessible through PRBAR15_EL2 and PRLAR15_EL2
+ */
+/*
+ * Read EL2 MPU Protection Region.
+ *
+ * @pr_read: mpu protection region returned by read op.
+ * @sel: mpu protection region selector
+ */
+void read_protection_region(pr_t *pr_read, uint8_t sel)
+{
+    /*
+     * Before accessing EL2 MPU region register PRBAR_EL2/PRLAR_EL2,
+     * make sure PRSELR_EL2 is set, as it determines which MPU region
+     * is selected.
+     */
+    prepare_selector(&sel);
+
+    switch ( sel )
+    {
+        GENERATE_READ_PR_REG_CASE(0, pr_read);
+        GENERATE_READ_PR_REG_CASE(1, pr_read);
+        GENERATE_READ_PR_REG_CASE(2, pr_read);
+        GENERATE_READ_PR_REG_CASE(3, pr_read);
+        GENERATE_READ_PR_REG_CASE(4, pr_read);
+        GENERATE_READ_PR_REG_CASE(5, pr_read);
+        GENERATE_READ_PR_REG_CASE(6, pr_read);
+        GENERATE_READ_PR_REG_CASE(7, pr_read);
+        GENERATE_READ_PR_REG_CASE(8, pr_read);
+        GENERATE_READ_PR_REG_CASE(9, pr_read);
+        GENERATE_READ_PR_REG_CASE(10, pr_read);
+        GENERATE_READ_PR_REG_CASE(11, pr_read);
+        GENERATE_READ_PR_REG_CASE(12, pr_read);
+        GENERATE_READ_PR_REG_CASE(13, pr_read);
+        GENERATE_READ_PR_REG_CASE(14, pr_read);
+        GENERATE_READ_PR_REG_CASE(15, pr_read);
+    default:
+        BUG(); /* Can't happen */
+    }
+}
+
+/*
+ * Write EL2 MPU Protection Region.
+ *
+ * @pr_write: const mpu protection region passed through write op.
+ * @sel: mpu protection region selector
+ */
+void write_protection_region(const pr_t *pr_write, uint8_t sel)
+{
+    /*
+     * Before accessing EL2 MPU region register PRBAR_EL2/PRLAR_EL2,
+     * make sure PRSELR_EL2 is set, as it determines which MPU region
+     * is selected.
+     */
+    prepare_selector(&sel);
+
+    switch ( sel )
+    {
+        GENERATE_WRITE_PR_REG_CASE(0, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(1, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(2, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(3, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(4, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(5, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(6, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(7, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(8, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(9, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(10, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(11, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(12, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(13, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(14, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(15, pr_write);
+    default:
+        BUG(); /* Can't happen */
+    }
+}
+
 void __init setup_mm(void)
 {
     BUG_ON("unimplemented");
-- 
2.34.1



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Cc: Penny Zheng ,
	Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk ,
	Penny Zheng ,
	Wei Chen 
Subject: [PATCH v3 1/7] arm/mpu: Introduce MPU memory region map structure
Date: Fri, 11 Apr 2025 15:56:49 +0100
Message-Id: <20250411145655.140667-2-luca.fancellu@arm.com>
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From: Penny Zheng 

Introduce pr_t typedef which is a structure having the prbar
and prlar members, each being structured as the registers of
the aarch64 armv8-r architecture.

Introduce the array 'xen_mpumap' that will store a view of
the content of the MPU regions.

Introduce MAX_MPU_REGIONS macro that uses the value of
NUM_MPU_REGIONS_MASK just for clarity, because using the
latter as number of elements of the xen_mpumap array might
be misleading.

Signed-off-by: Penny Zheng 
Signed-off-by: Wei Chen 
Signed-off-by: Luca Fancellu 
---
 xen/arch/arm/include/asm/arm64/mpu.h | 44 ++++++++++++++++++++++++++++
 xen/arch/arm/include/asm/mpu.h       |  5 ++++
 xen/arch/arm/mpu/mm.c                |  4 +++
 3 files changed, 53 insertions(+)
 create mode 100644 xen/arch/arm/include/asm/arm64/mpu.h

diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/asm/arm64/mpu.h
new file mode 100644
index 000000000000..4d2bd7d7877f
--- /dev/null
+++ b/xen/arch/arm/include/asm/arm64/mpu.h
@@ -0,0 +1,44 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * mpu.h: Arm Memory Protection Unit definitions for aarch64.
+ */
+
+#ifndef __ARM_ARM64_MPU_H__
+#define __ARM_ARM64_MPU_H__
+
+#ifndef __ASSEMBLY__
+
+/* Protection Region Base Address Register */
+typedef union {
+    struct __packed {
+        unsigned long xn:2;       /* Execute-Never */
+        unsigned long ap:2;       /* Acess Permission */
+        unsigned long sh:2;       /* Sharebility */
+        unsigned long base:46;    /* Base Address */
+        unsigned long pad:12;
+    } reg;
+    uint64_t bits;
+} prbar_t;
+
+/* Protection Region Limit Address Register */
+typedef union {
+    struct __packed {
+        unsigned long en:1;     /* Region enable */
+        unsigned long ai:3;     /* Memory Attribute Index */
+        unsigned long ns:1;     /* Not-Secure */
+        unsigned long res:1;    /* Reserved 0 by hardware */
+        unsigned long limit:46; /* Limit Address */
+        unsigned long pad:12;
+    } reg;
+    uint64_t bits;
+} prlar_t;
+
+/* MPU Protection Region */
+typedef struct {
+    prbar_t prbar;
+    prlar_t prlar;
+} pr_t;
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __ARM_ARM64_MPU_H__ */
\ No newline at end of file
diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h
index d4ec4248b62b..e148c705b82c 100644
--- a/xen/arch/arm/include/asm/mpu.h
+++ b/xen/arch/arm/include/asm/mpu.h
@@ -6,6 +6,10 @@
 #ifndef __ARM_MPU_H__
 #define __ARM_MPU_H__
 
+#if defined(CONFIG_ARM_64)
+# include 
+#endif
+
 #define MPU_REGION_SHIFT  6
 #define MPU_REGION_ALIGN  (_AC(1, UL) << MPU_REGION_SHIFT)
 #define MPU_REGION_MASK   (~(MPU_REGION_ALIGN - 1))
@@ -13,6 +17,7 @@
 #define NUM_MPU_REGIONS_SHIFT   8
 #define NUM_MPU_REGIONS         (_AC(1, UL) << NUM_MPU_REGIONS_SHIFT)
 #define NUM_MPU_REGIONS_MASK    (NUM_MPU_REGIONS - 1)
+#define MAX_MPU_REGIONS         NUM_MPU_REGIONS_MASK
 
 #endif /* __ARM_MPU_H__ */
 
diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c
index 07c8959f4ee9..f83ce04fef8a 100644
--- a/xen/arch/arm/mpu/mm.c
+++ b/xen/arch/arm/mpu/mm.c
@@ -7,9 +7,13 @@
 #include 
 #include 
 #include 
+#include 
 
 struct page_info *frame_table;
 
+/* EL2 Xen MPU memory region mapping table. */
+pr_t xen_mpumap[MAX_MPU_REGIONS];
+
 static void __init __maybe_unused build_assertions(void)
 {
     /*
-- 
2.34.1



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	Bertrand Marquis ,
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Subject: [PATCH v3 6/7] arm/mpu: Implement early_fdt_map support in MPU systems
Date: Fri, 11 Apr 2025 15:56:54 +0100
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Implement early_fdt_map() function, that is responsible to map the
device tree blob in the early stages of the boot process, since at
this stage the MPU C data structure are not yet initialised, it is
using low level APIs to write into the MPU registers at a fixed
MPU region number.

The MPU memory management is designed to work on pages of PAGE_SIZE
in order to reuse helpers and macros already available on the Xen
memory management system.

Signed-off-by: Luca Fancellu 
---
 xen/arch/arm/mpu/setup.c | 54 ++++++++++++++++++++++++++++++++++++++--
 1 file changed, 52 insertions(+), 2 deletions(-)

diff --git a/xen/arch/arm/mpu/setup.c b/xen/arch/arm/mpu/setup.c
index b4da77003f47..5969065250d4 100644
--- a/xen/arch/arm/mpu/setup.c
+++ b/xen/arch/arm/mpu/setup.c
@@ -1,17 +1,67 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#include 
 #include 
 #include 
+#include 
 #include 
+#include 
 #include 
+#include 
+#include 
 #include 
 
+/* Needs to be kept in sync with the regions programmed in arm64/mpu/head.S */
+#define EARLY_FDT_MAP_REGION_NUMBER 6
+
 void __init setup_pagetables(void) {}
 
 void * __init early_fdt_map(paddr_t fdt_paddr)
 {
-    BUG_ON("unimplemented");
-    return NULL;
+    /* Map at least a page containing the DTB address, exclusive range */
+    paddr_t base_paddr = round_pgdown(fdt_paddr);
+    paddr_t end_paddr = round_pgup(fdt_paddr + sizeof(struct fdt_header));
+    unsigned int flags = PAGE_HYPERVISOR_RO;
+    void *fdt_virt = (void *)fdt_paddr; /* virt == paddr for MPU */
+    pr_t fdt_region;
+
+    /*
+     * Check whether the physical FDT address is set and meets the minimum
+     * alignment requirement. Since we are relying on MIN_FDT_ALIGN to be at
+     * least 8 bytes so that we always access the magic and size fields
+     * of the FDT header after mapping the first chunk, double check if
+     * that is indeed the case.
+     */
+    BUILD_BUG_ON(MIN_FDT_ALIGN < 8);
+    if ( !fdt_paddr || fdt_paddr % MIN_FDT_ALIGN )
+        return NULL;
+
+    /* Map the device tree blob header  */
+    fdt_region = pr_of_xenaddr(base_paddr, end_paddr, PAGE_AI_MASK(flags));
+    fdt_region.prbar.reg.ap = PAGE_AP_MASK(flags);
+    fdt_region.prbar.reg.xn = PAGE_XN_MASK(flags);
+
+    write_protection_region(&fdt_region, EARLY_FDT_MAP_REGION_NUMBER);
+    context_sync_mpu();
+
+    if ( fdt_magic(fdt_virt) != FDT_MAGIC )
+        return NULL;
+
+    end_paddr = round_pgup(fdt_paddr + fdt_totalsize(fdt_virt));
+
+    /*
+     * If the mapped range is not enough, map the rest of the DTB, pr_get_limit
+     * returns an inclusive address of the range, hence the increment.
+     */
+    if ( end_paddr > (pr_get_limit(&fdt_region) + 1) )
+    {
+        pr_set_limit(&fdt_region, end_paddr);
+
+        write_protection_region(&fdt_region, EARLY_FDT_MAP_REGION_NUMBER);
+        context_sync_mpu();
+    }
+
+    return fdt_virt;
 }
 
 /*
-- 
2.34.1



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Subject: [PATCH v3 7/7] arm/mpu: Implement setup_mpu for MPU system
Date: Fri, 11 Apr 2025 15:56:55 +0100
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Implement the function setup_mpu that will logically track the MPU
regions defined by hardware registers, start introducing data
structures and functions to track the status from the C world.

The xen_mpumap_mask bitmap is used to track which MPU region are
enabled at runtime.

This function is called from setup_mm() which full implementation
will be provided in a later stage.

Signed-off-by: Luca Fancellu 
---
v3 changes:
 - Moved PRENR_MASK define to common.
---
---
 xen/arch/arm/include/asm/mpu.h |  2 ++
 xen/arch/arm/mpu/mm.c          | 49 +++++++++++++++++++++++++++++++++-
 2 files changed, 50 insertions(+), 1 deletion(-)

diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h
index eba5086cde97..77d0566f9780 100644
--- a/xen/arch/arm/include/asm/mpu.h
+++ b/xen/arch/arm/include/asm/mpu.h
@@ -20,6 +20,8 @@
 #define NUM_MPU_REGIONS_MASK    (NUM_MPU_REGIONS - 1)
 #define MAX_MPU_REGIONS         NUM_MPU_REGIONS_MASK
 
+#define PRENR_MASK  GENMASK(31, 0)
+
 /* Access permission attributes. */
 /* Read/Write at EL2, No Access at EL1/EL0. */
 #define AP_RW_EL2 0x0
diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c
index 635d1f5a2ba0..e0a40489a7fc 100644
--- a/xen/arch/arm/mpu/mm.c
+++ b/xen/arch/arm/mpu/mm.c
@@ -14,6 +14,17 @@
 
 struct page_info *frame_table;
 
+/* Maximum number of supported MPU memory regions by the EL2 MPU. */
+uint8_t __ro_after_init max_xen_mpumap;
+
+/*
+ * Bitmap xen_mpumap_mask is to record the usage of EL2 MPU memory regions.
+ * Bit 0 represents MPU memory region 0, bit 1 represents MPU memory
+ * region 1, ..., and so on.
+ * If a MPU memory region gets enabled, set the according bit to 1.
+ */
+DECLARE_BITMAP(xen_mpumap_mask, MAX_MPU_REGIONS);
+
 /* EL2 Xen MPU memory region mapping table. */
 pr_t xen_mpumap[MAX_MPU_REGIONS];
 
@@ -222,9 +233,45 @@ pr_t pr_of_xenaddr(paddr_t base, paddr_t limit, unsigned attr)
     return region;
 }
 
+/*
+ * The code in this function needs to track the regions programmed in
+ * arm64/mpu/head.S
+ */
+static void __init setup_mpu(void)
+{
+    register_t prenr;
+    unsigned int i = 0;
+
+    /*
+     * MPUIR_EL2.Region[0:7] identifies the number of regions supported by
+     * the EL2 MPU.
+     */
+    max_xen_mpumap = (uint8_t)(READ_SYSREG(MPUIR_EL2) & NUM_MPU_REGIONS_MASK);
+
+    /* PRENR_EL2 has the N bit set if the N region is enabled, N < 32 */
+    prenr = (READ_SYSREG(PRENR_EL2) & PRENR_MASK);
+
+    /*
+     * Set the bitfield for regions enabled in assembly boot-time.
+     * This code works under the assumption that the code in head.S has
+     * allocated and enabled regions below 32 (N < 32).
+     */
+    while ( prenr > 0 )
+    {
+        if (prenr & 0x1)
+        {
+            set_bit(i, xen_mpumap_mask);
+            read_protection_region(&xen_mpumap[i], i);
+        }
+
+        prenr >>= 1;
+        i++;
+    }
+}
+
 void __init setup_mm(void)
 {
-    BUG_ON("unimplemented");
+    setup_mpu();
 }
 
 int modify_xen_mappings(unsigned long s, unsigned long e, unsigned int nf)
-- 
2.34.1



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From: Ard Biesheuvel 
Date: Fri, 11 Apr 2025 17:32:03 +0200
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Subject: Re: [RFC PATCH] x86/xen: Fix PVH dom0 xen_hypercall detection
To: Jason Andryuk 
Cc: Andrew Cooper , agarciav@amd.com, jgross@suse.com, 
	anthony.perard@vates.tech, marmarek@invisiblethingslab.com, 
	michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, 
	xen-devel@lists.xenproject.org
Content-Type: text/plain; charset="UTF-8"

On Fri, 11 Apr 2025 at 16:28, Jason Andryuk  wrote:
>
>
>
> On 2025-04-11 07:35, Ard Biesheuvel wrote:
> > On Thu, 10 Apr 2025 at 23:49, Andrew Cooper  wrote:
> >>
> >> On 10/04/2025 8:50 pm, Jason Andryuk wrote:
> >>> A Xen PVH dom0 on an AMD processor triple faults early in boot on
> >>> 6.6.86.  CPU detection appears to fail, as the faulting instruction is
> >>> vmcall in xen_hypercall_intel() and not vmmcall in xen_hypercall_amd().
> >>>
> >>> Detection fails because __xen_hypercall_setfunc() returns the full
> >>> kernel mapped address of xen_hypercall_amd() or xen_hypercall_intel() -
> >>> e.g. 0xffffffff815b93f0.  But this is compared against the rip-relative
> >>> xen_hypercall_amd(%rip), which when running from identity mapping, is
> >>> only 0x015b93f0.
> >>>
> >>> Replace the rip-relative address with just loading the actual address to
> >>> restore the proper comparision.
> >>>
> >>> This only seems to affect PVH dom0 boot.  This is probably because the
> >>> XENMEM_memory_map hypercall is issued early on from the identity
> >>> mappings.  With a domU, the memory map is provided via hvm_start_info
> >>> and the hypercall is skipped.  The domU is probably running from the
> >>> kernel high mapping when it issues hypercalls.
> >>>
> >>> Signed-off-by: Jason Andryuk 
> >>> ---
> >>> I think this sort of address mismatch would be addresed by
> >>> e8fbc0d9cab6 ("x86/pvh: Call C code via the kernel virtual mapping")
> >>>
> >>> That could be backported instead, but it depends on a fair number of
> >>> patches.
> >>
> >> I've just spoken to Ard, and he thinks that it's standalone.  Should be
> >> ok to backport as a fix.
> >>
> >
> > I've tried building and booting 6.6.y with the patch applied - GS will
> > still be set to the 1:1 mapped address but that shouldn't matter,
> > given that it is only used for the stack canary, and we don't do
> > address comparisons on that afaik.
>
> Yes, it seems to work - I tested with dom0 and it booted.  I removed the
> use of phys_base - the diff is included below.  Does that match what you
> did?
>

The stable tree maintainers generally prefer the backports to be as
close to the originals as possible, and given that phys_base is
guaranteed to be 0x0, you might as well keep the subtraction.

> >>> Not sure on how getting a patch just into 6.6 would work.  This patch
> >>> could go into upstream Linux though it's not strictly necessary when the
> >>> rip-relative address is a high address.
> >>
> >> Do we know which other trees are broken?  I only found 6.6 because I was
> >> messing around with other bits of CI that happen to use 6.6.
> >>
> >
> > I'd assume all trees that had the hypercall page removal patch
> > backported to them will be broken in the same way.
>
> Yes, I think so.  Looks like it went back to 5.10 but not to 5.4.
>
> Ard, I can submit the stable request unless you want to.
>

Please go ahead.


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Date: Fri, 11 Apr 2025 15:53:12 +0000
To: Andrew Cooper 
From: Denis Mukhin 
Cc: Xen-devel , Anthony PERARD , Stefano Stabellini , Michal Orzel , Doug Goldstein , =?utf-8?Q?Marek_Marczykowski-G=C3=B3recki?= 
Subject: Re: [PATCH 1/3] Rework rootfs generation to make a cpio archive
Message-ID: 
In-Reply-To: <20250411105217.2141356-2-andrew.cooper3@citrix.com>
References: <20250411105217.2141356-1-andrew.cooper3@citrix.com> <20250411105217.2141356-2-andrew.cooper3@citrix.com>
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On Friday, April 11th, 2025 at 3:52 AM, Andrew Cooper  wrote:

>=20
>=20
> Rename the script as we're going to use it for ARM64 shortly, and have it=
 take
> a tar or cpio parameter to determine the output format.
>=20
> Turn it into a proper bash script, and provide the cpio form under the ne=
w
> artefact naming scheme.
>=20
> No functional change.
>=20
> Signed-off-by: Andrew Cooper andrew.cooper3@citrix.com
>=20
> ---
> CC: Anthony PERARD anthony.perard@vates.tech
>=20
> CC: Stefano Stabellini sstabellini@kernel.org
>=20
> CC: Michal Orzel michal.orzel@amd.com
>=20
> CC: Doug Goldstein cardoe@cardoe.com
>=20
> CC: Marek Marczykowski-G=C3=B3recki marmarek@invisiblethingslab.com
>=20
> ---
> .gitlab-ci.yml | 9 +++++++-
> ...6_64-rootfs-alpine.sh =3D> alpine-rootfs.sh} | 21 +++++++++++++++++--
>=20
> 2 files changed, 27 insertions(+), 3 deletions(-)
> rename scripts/{x86_64-rootfs-alpine.sh =3D> alpine-rootfs.sh} (75%)
>=20
>=20
> diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
> index 1d2c72b268a3..916c5ae9d508 100644
> --- a/.gitlab-ci.yml
> +++ b/.gitlab-ci.yml
> @@ -42,6 +42,13 @@ linux-6.6.86-arm64:
> #
> # x86_64 artifacts
> #
> +alpine-3.18-x86_64-rootfs:
> + extends: .x86_64-artifacts
> + script:
> + - ./scripts/alpine-rootfs.sh cpio
> + variables:
> + CONTAINER: alpine:3.18-x86_64-base
> +
> linux-6.6.56-x86_64:
> extends: .x86_64-artifacts
> script: ./scripts/build-linux.sh
> @@ -62,7 +69,7 @@ x86_64-kernel-linux-6.6.56:
> x86_64-rootfs-alpine-3.18:
> extends: .x86_64-artifacts
> script:
> - - . scripts/x86_64-rootfs-alpine.sh
> + - ./scripts/alpine-rootfs.sh tar
> variables:
> CONTAINER: alpine:3.18-x86_64-base
>=20
> diff --git a/scripts/x86_64-rootfs-alpine.sh b/scripts/alpine-rootfs.sh
> similarity index 75%
> rename from scripts/x86_64-rootfs-alpine.sh
> rename to scripts/alpine-rootfs.sh
> index b70b3a54ede5..c29c92d1c682 100755
> --- a/scripts/x86_64-rootfs-alpine.sh
> +++ b/scripts/alpine-rootfs.sh
> @@ -1,4 +1,9 @@
> +#!/bin/bash
> +
> +set -eu
> +
> WORKDIR=3D"${PWD}"
> +COPYDIR=3D"${WORKDIR}/binaries"
>=20
> apk update
>=20
> @@ -56,5 +61,17 @@ passwd -d "root" root
>=20
> # Create rootfs
> cd /
> -tar cvzf "${WORKDIR}/binaries/initrd.tar.gz" \
> - bin dev etc home init lib mnt opt root sbin usr var
> +PATHS=3D"bin dev etc home init lib mnt opt root sbin usr var"
> +
> +case $1 in
> + cpio)
> + find $PATHS | cpio -o -H newc | gzip > "${COPYDIR}/rootfs.cpio.gz"
>=20
> +
> + # Print the contents for the build log
> + zcat "${COPYDIR}/rootfs.cpio.gz" | cpio -tv

Maybe allow $1 to be a filename? E. g. rootfs.cpio.gz or initrd.tar.gz.
This way $1 will contain an explicit output artifact format along with
the output filename.

What do you think?

> + ;;
> +
> + tar)
> + tar cvzf "${COPYDIR}/initrd.tar.gz" $PATHS
> + ;;

I would add the default case and error out in case of possible mis-use.

> +esac
> --
> 2.39.5


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Subject: Re: [RFC PATCH v1 10/15] KVM: VMX: Use WRMSRNS or its immediate form
 when available
To: Sean Christopherson 
Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
        linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
        linux-edac@vger.kernel.org, kvm@vger.kernel.org,
        xen-devel@lists.xenproject.org, linux-ide@vger.kernel.org,
        linux-pm@vger.kernel.org, bpf@vger.kernel.org, llvm@lists.linux.dev,
        tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        jgross@suse.com, andrew.cooper3@citrix.com, peterz@infradead.org,
        acme@kernel.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
        pbonzini@redhat.com, vkuznets@redhat.com, luto@kernel.org,
        boris.ostrovsky@oracle.com, kys@microsoft.com, haiyangz@microsoft.com,
        decui@microsoft.com
References: <20250331082251.3171276-1-xin@zytor.com>
 <20250331082251.3171276-11-xin@zytor.com> 
Content-Language: en-US
From: Xin Li 
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On 4/10/2025 4:24 PM, Sean Christopherson wrote:
>> +/*
>> + * Write EAX to MSR_IA32_SPEC_CTRL.
>> + *
>> + * Choose the best WRMSR instruction based on availability.
>> + *
>> + * Replace with 'wrmsrns' and 'wrmsrns %rax, $MSR_IA32_SPEC_CTRL' once binutils support them.
>> + */
>> +.macro WRITE_EAX_TO_MSR_IA32_SPEC_CTRL
>> +	ALTERNATIVE_2 __stringify(mov $MSR_IA32_SPEC_CTRL, %ecx;		\
>> +				  xor %edx, %edx;				\
>> +				  mov %edi, %eax;				\
>> +				  ds wrmsr),					\
>> +		      __stringify(mov $MSR_IA32_SPEC_CTRL, %ecx;		\
>> +				  xor %edx, %edx;				\
>> +				  mov %edi, %eax;				\
>> +				  ASM_WRMSRNS),					\
>> +		      X86_FEATURE_WRMSRNS,					\
>> +		      __stringify(xor %_ASM_AX, %_ASM_AX;			\
>> +				  mov %edi, %eax;				\
>> +				  ASM_WRMSRNS_RAX; .long MSR_IA32_SPEC_CTRL),	\
>> +		      X86_FEATURE_MSR_IMM
>> +.endm
> This is quite hideous.  I have no objection to optimizing __vmx_vcpu_run(), but
> I would much prefer that a macro like this live in generic code, and that it be
> generic.  It should be easy enough to provide an assembly friendly equivalent to
> __native_wrmsr_constant().

Will do.


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Feedback-ID: i1568416f:Fastmail
Date: Fri, 11 Apr 2025 18:54:39 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: xen-devel 
Cc: =?utf-8?B?SsO8cmdlbiBHcm/Dnw==?= 
Subject: Linux 6.15-rc1: pvqspinlock: lock 0xffff8881029af110 has corrupted
 value 0x0!
Message-ID: 
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Date: Fri, 11 Apr 2025 18:54:39 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: xen-devel 
Cc: =?utf-8?B?SsO8cmdlbiBHcm/Dnw==?= 
Subject: Linux 6.15-rc1: pvqspinlock: lock 0xffff8881029af110 has corrupted
 value 0x0!

Hi,

When testing 6.15-rc1 I got this warning:

    [ 1656.521169] xen-blkback: backend/vbd/92/51712: using 2 queues, proto=
col 1 (x86_64-abi) persistent grants
    [ 1656.527173] xen-blkback: backend/vbd/92/51728: using 2 queues, proto=
col 1 (x86_64-abi) persistent grants
    [ 1656.532240] xen-blkback: backend/vbd/92/51744: using 2 queues, proto=
col 1 (x86_64-abi) persistent grants
    [ 1656.537807] ------------[ cut here ]------------
    [ 1656.538131] pvqspinlock: lock 0xffff8881029af110 has corrupted value=
 0x0!
    [ 1656.538586] WARNING: CPU: 1 PID: 118 at kernel/locking/qspinlock_par=
avirt.h:504 __pv_queued_spin_unlock_slowpath+0xdc/0x120
    [ 1656.539342] Modules linked in: snd_seq_dummy snd_hrtimer vfat fat in=
tel_uncore_frequency_common intel_powerclamp snd_sof_pci_intel_mtl snd_sof_=
intel_hda_generic soundwire_intel snd_sof_intel_hda_sdw_bpt snd_sof_intel_h=
da_common snd_soc_hdac_hda snd_sof_intel_hda_mlink snd_sof_intel_hda snd_hd=
a_codec_hdmi soundwire_cadence snd_sof_pci snd_sof_xtensa_dsp snd_sof snd_s=
of_utils snd_hda_ext_core snd_soc_acpi_intel_match snd_soc_acpi_intel_sdca_=
quirks soundwire_generic_allocation snd_soc_acpi crc8 soundwire_bus snd_hda=
_codec_realtek snd_soc_sdca snd_hda_codec_generic snd_hda_scodec_component =
snd_soc_core snd_compress ac97_bus iTCO_wdt snd_pcm_dmaengine intel_pmc_bxt=
 spd5118 iTCO_vendor_support spi_nor snd_hda_intel mtd snd_intel_dspcfg mei=
_gsc_proxy snd_intel_sdw_acpi snd_hda_codec snd_hda_core intel_rapl_msr snd=
_hwdep snd_seq snd_seq_device snd_pcm snd_timer i2c_i801 snd spi_intel_pci =
processor_thermal_device_pci pcspkr processor_thermal_device processor_ther=
mal_wt_hint soundcore spi_intel e1000e i2c_smbus mei_me
    [ 1656.539419]  processor_thermal_rfim processor_thermal_rapl mei intel=
_rapl_common idma64 processor_thermal_wt_req thunderbolt processor_thermal_=
power_floor processor_thermal_mbox intel_pmc_core int340x_thermal_zone igen=
6_edac intel_hid pmt_telemetry pmt_class sparse_keymap intel_scu_pltdrv joy=
dev fuse loop xenfs nfnetlink vsock_loopback vmw_vsock_virtio_transport_com=
mon vmw_vsock_vmci_transport vsock zram vmw_vmci lz4hc_compress lz4_compres=
s dm_thin_pool dm_persistent_data dm_bio_prison dm_crypt xe drm_ttm_helper =
drm_suballoc_helper gpu_sched drm_gpuvm drm_exec drm_gpusvm i915 i2c_algo_b=
it drm_buddy nvme ttm sdhci_pci polyval_clmulni sdhci_uhs2 polyval_generic =
drm_display_helper nvme_core ghash_clmulni_intel sdhci hid_multitouch xhci_=
pci cqhci nvme_keyring sha512_ssse3 sha256_ssse3 sha1_ssse3 mmc_core intel_=
vpu xhci_hcd nvme_auth intel_vsec cec i2c_hid_acpi i2c_hid intel_pmc_mux vi=
deo typec wmi pinctrl_meteorlake serio_raw xen_acpi_processor xen_privcmd x=
en_pciback xen_blkback xen_gntalloc xen_gntdev xen_evtchn
    [ 1656.545212]  scsi_dh_rdac scsi_dh_emc scsi_dh_alua uinput
    [ 1656.551213] CPU: 1 UID: 0 PID: 118 Comm: xenbus Not tainted 6.15.0-0=
=2Erc1.1.qubes.1.fc41.x86_64 #1 PREEMPT(full)=20
    [ 1656.551845] Hardware name: Notebook V54x_6x_TU/V54x_6x_TU, BIOS Dash=
aro (coreboot+UEFI) v0.9.0 07/17/2024
    [ 1656.552425] RIP: e030:__pv_queued_spin_unlock_slowpath+0xdc/0x120
    [ 1656.552810] Code: ca 13 ed fe 90 48 83 c4 10 5b c3 cc cc cc cc 8b 05=
 e9 05 22 01 85 c0 75 ec 8b 17 48 89 fe 48 c7 c7 30 04 f9 81 e8 84 35 f8 fe=
 <0f> 0b eb d7 44 89 ca be 01 00 00 00 48 c7 c7 a0 78 48 82 e8 8c 4d
    [ 1656.553939] RSP: e02b:ffffc9004048bdd8 EFLAGS: 00010086
    [ 1656.554252] RAX: 0000000000000000 RBX: ffff8881029af110 RCX: 0000000=
000000027
    [ 1656.554673] RDX: ffff88819629cac8 RSI: 0000000000000001 RDI: ffff888=
19629cac0
    [ 1656.555102] RBP: ffff8881029af110 R08: 0000000000000000 R09: 0000000=
00000000e
    [ 1656.555524] R10: 636f6c203a6b636f R11: 6c6e697073717670 R12: 0000000=
000000001
    [ 1656.555949] R13: ffffffff80fc0290 R14: 0000000000000000 R15: 0000000=
000000000
    [ 1656.556373] FS:  0000000000000000(0000) GS:ffff888212e61000(0000) kn=
lGS:0000000000000000
    [ 1656.556841] CS:  e030 DS: 0000 ES: 0000 CR0: 0000000080050033
    [ 1656.557176] CR2: 000071b817a4067c CR3: 000000000242e000 CR4: 0000000=
000050660
    [ 1656.557592] Call Trace:
    [ 1656.557739]  
    [ 1656.557870]  __raw_callee_save___pv_queued_spin_unlock_slowpath+0x15=
/0x30
    [ 1656.558266]  .slowpath+0x9/0x18
    [ 1656.558453]  ? xen_manage_runstate_time+0x190/0x2d0
    [ 1656.558745]  _raw_spin_unlock_irqrestore+0xe/0x40
    [ 1656.559026]  __wake_up+0x44/0x60
    [ 1656.559230]  ? __pfx_xenbus_thread+0x10/0x10
    [ 1656.559479]  process_msg+0x204/0x2e0
    [ 1656.559693]  xenbus_thread+0x165/0x200
    [ 1656.559913]  ? __pfx_autoremove_wake_function+0x10/0x10
    [ 1656.560223]  kthread+0xf9/0x240
    [ 1656.560420]  ? __pfx_kthread+0x10/0x10
    [ 1656.560637]  ret_from_fork+0x31/0x50
    [ 1656.560854]  ? __pfx_kthread+0x10/0x10
    [ 1656.561070]  ret_from_fork_asm+0x1a/0x30
    [ 1656.561306]  
    [ 1656.561440] ---[ end trace 0000000000000000 ]---
    [ 1656.562933] xen-blkback: backend/vbd/92/51760: using 2 queues, proto=
col 1 (x86_64-abi) persistent grants


I'm not sure what exactly triggers it, it doesn't happen on every domU
startup, but I've seen it at least twice already.

Full log at https://openqa.qubes-os.org/tests/135573/logfile?filename=3Dser=
ial0.txt#line-6858

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Subject: Re: [PATCH 1/3] Rework rootfs generation to make a cpio archive
To: Denis Mukhin 
Cc: Xen-devel ,
 Anthony PERARD ,
 Stefano Stabellini ,
 Michal Orzel , Doug Goldstein ,
 =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= 
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On 11/04/2025 4:53 pm, Denis Mukhin wrote:
> On Friday, April 11th, 2025 at 3:52 AM, Andrew Cooper  wrote:
>
>>
>> Rename the script as we're going to use it for ARM64 shortly, and have it take
>> a tar or cpio parameter to determine the output format.
>>
>> Turn it into a proper bash script, and provide the cpio form under the new
>> artefact naming scheme.
>>
>> No functional change.
>>
>> Signed-off-by: Andrew Cooper andrew.cooper3@citrix.com
>>
>> ---
>> CC: Anthony PERARD anthony.perard@vates.tech
>>
>> CC: Stefano Stabellini sstabellini@kernel.org
>>
>> CC: Michal Orzel michal.orzel@amd.com
>>
>> CC: Doug Goldstein cardoe@cardoe.com
>>
>> CC: Marek Marczykowski-Górecki marmarek@invisiblethingslab.com
>>
>> ---
>> .gitlab-ci.yml | 9 +++++++-
>> ...6_64-rootfs-alpine.sh => alpine-rootfs.sh} | 21 +++++++++++++++++--
>>
>> 2 files changed, 27 insertions(+), 3 deletions(-)
>> rename scripts/{x86_64-rootfs-alpine.sh => alpine-rootfs.sh} (75%)
>>
>>
>> diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
>> index 1d2c72b268a3..916c5ae9d508 100644
>> --- a/.gitlab-ci.yml
>> +++ b/.gitlab-ci.yml
>> @@ -42,6 +42,13 @@ linux-6.6.86-arm64:
>> #
>> # x86_64 artifacts
>> #
>> +alpine-3.18-x86_64-rootfs:
>> + extends: .x86_64-artifacts
>> + script:
>> + - ./scripts/alpine-rootfs.sh cpio
>> + variables:
>> + CONTAINER: alpine:3.18-x86_64-base
>> +
>> linux-6.6.56-x86_64:
>> extends: .x86_64-artifacts
>> script: ./scripts/build-linux.sh
>> @@ -62,7 +69,7 @@ x86_64-kernel-linux-6.6.56:
>> x86_64-rootfs-alpine-3.18:
>> extends: .x86_64-artifacts
>> script:
>> - - . scripts/x86_64-rootfs-alpine.sh
>> + - ./scripts/alpine-rootfs.sh tar
>> variables:
>> CONTAINER: alpine:3.18-x86_64-base
>>
>> diff --git a/scripts/x86_64-rootfs-alpine.sh b/scripts/alpine-rootfs.sh
>> similarity index 75%
>> rename from scripts/x86_64-rootfs-alpine.sh
>> rename to scripts/alpine-rootfs.sh
>> index b70b3a54ede5..c29c92d1c682 100755
>> --- a/scripts/x86_64-rootfs-alpine.sh
>> +++ b/scripts/alpine-rootfs.sh
>> @@ -1,4 +1,9 @@
>> +#!/bin/bash
>> +
>> +set -eu
>> +
>> WORKDIR="${PWD}"
>> +COPYDIR="${WORKDIR}/binaries"
>>
>> apk update
>>
>> @@ -56,5 +61,17 @@ passwd -d "root" root
>>
>> # Create rootfs
>> cd /
>> -tar cvzf "${WORKDIR}/binaries/initrd.tar.gz" \
>> - bin dev etc home init lib mnt opt root sbin usr var
>> +PATHS="bin dev etc home init lib mnt opt root sbin usr var"
>> +
>> +case $1 in
>> + cpio)
>> + find $PATHS | cpio -o -H newc | gzip > "${COPYDIR}/rootfs.cpio.gz"
>>
>> +
>> + # Print the contents for the build log
>> + zcat "${COPYDIR}/rootfs.cpio.gz" | cpio -tv
> Maybe allow $1 to be a filename? E. g. rootfs.cpio.gz or initrd.tar.gz.
> This way $1 will contain an explicit output artifact format along with
> the output filename.
>
> What do you think?
>
>> + ;;
>> +
>> + tar)
>> + tar cvzf "${COPYDIR}/initrd.tar.gz" $PATHS
>> + ;;
> I would add the default case and error out in case of possible mis-use.

This is bespoke tooling, used as part of Xen's GitlabCI infrastructure.

The parameter is going to last for all of about a week, until we can
retire the tests using the tarball, because they're creating routine but
intermittent test failure.

I'm not looking to over-engineer the result.

~Andrew


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Date: Fri, 11 Apr 2025 18:26:30 +0000
To: Andrew Cooper 
From: Denis Mukhin 
Cc: Xen-devel , Anthony PERARD , Stefano Stabellini , Michal Orzel , Doug Goldstein , =?utf-8?Q?Marek_Marczykowski-G=C3=B3recki?= 
Subject: Re: [PATCH 1/3] Rework rootfs generation to make a cpio archive
Message-ID: 
In-Reply-To: <19e76d36-41d3-4d7f-b3db-f1e17c2c30b1@citrix.com>
References: <20250411105217.2141356-1-andrew.cooper3@citrix.com> <20250411105217.2141356-2-andrew.cooper3@citrix.com>  <19e76d36-41d3-4d7f-b3db-f1e17c2c30b1@citrix.com>
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On Friday, April 11th, 2025 at 10:50 AM, Andrew Cooper  wrote:

>=20
>=20
> On 11/04/2025 4:53 pm, Denis Mukhin wrote:
>=20
> > On Friday, April 11th, 2025 at 3:52 AM, Andrew Cooper andrew.cooper3@ci=
trix.com wrote:
> >=20
> > > Rename the script as we're going to use it for ARM64 shortly, and hav=
e it take
> > > a tar or cpio parameter to determine the output format.
> > >=20
> > > Turn it into a proper bash script, and provide the cpio form under th=
e new
> > > artefact naming scheme.
> > >=20
> > > No functional change.
> > >=20
> > > Signed-off-by: Andrew Cooper andrew.cooper3@citrix.com
> > >=20
> > > ---
> > > CC: Anthony PERARD anthony.perard@vates.tech
> > >=20
> > > CC: Stefano Stabellini sstabellini@kernel.org
> > >=20
> > > CC: Michal Orzel michal.orzel@amd.com
> > >=20
> > > CC: Doug Goldstein cardoe@cardoe.com
> > >=20
> > > CC: Marek Marczykowski-G=C3=B3recki marmarek@invisiblethingslab.com
> > >=20
> > > ---
> > > .gitlab-ci.yml | 9 +++++++-
> > > ...6_64-rootfs-alpine.sh =3D> alpine-rootfs.sh} | 21 ++++++++++++++++=
+--
> > >=20
> > > 2 files changed, 27 insertions(+), 3 deletions(-)
> > > rename scripts/{x86_64-rootfs-alpine.sh =3D> alpine-rootfs.sh} (75%)
> > >=20
> > > diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
> > > index 1d2c72b268a3..916c5ae9d508 100644
> > > --- a/.gitlab-ci.yml
> > > +++ b/.gitlab-ci.yml
> > > @@ -42,6 +42,13 @@ linux-6.6.86-arm64:
> > > #
> > > # x86_64 artifacts
> > > #
> > > +alpine-3.18-x86_64-rootfs:
> > > + extends: .x86_64-artifacts
> > > + script:
> > > + - ./scripts/alpine-rootfs.sh cpio
> > > + variables:
> > > + CONTAINER: alpine:3.18-x86_64-base
> > > +
> > > linux-6.6.56-x86_64:
> > > extends: .x86_64-artifacts
> > > script: ./scripts/build-linux.sh
> > > @@ -62,7 +69,7 @@ x86_64-kernel-linux-6.6.56:
> > > x86_64-rootfs-alpine-3.18:
> > > extends: .x86_64-artifacts
> > > script:
> > > - - . scripts/x86_64-rootfs-alpine.sh
> > > + - ./scripts/alpine-rootfs.sh tar
> > > variables:
> > > CONTAINER: alpine:3.18-x86_64-base
> > >=20
> > > diff --git a/scripts/x86_64-rootfs-alpine.sh b/scripts/alpine-rootfs.=
sh
> > > similarity index 75%
> > > rename from scripts/x86_64-rootfs-alpine.sh
> > > rename to scripts/alpine-rootfs.sh
> > > index b70b3a54ede5..c29c92d1c682 100755
> > > --- a/scripts/x86_64-rootfs-alpine.sh
> > > +++ b/scripts/alpine-rootfs.sh
> > > @@ -1,4 +1,9 @@
> > > +#!/bin/bash
> > > +
> > > +set -eu
> > > +
> > > WORKDIR=3D"${PWD}"
> > > +COPYDIR=3D"${WORKDIR}/binaries"
> > >=20
> > > apk update
> > >=20
> > > @@ -56,5 +61,17 @@ passwd -d "root" root
> > >=20
> > > # Create rootfs
> > > cd /
> > > -tar cvzf "${WORKDIR}/binaries/initrd.tar.gz" \
> > > - bin dev etc home init lib mnt opt root sbin usr var
> > > +PATHS=3D"bin dev etc home init lib mnt opt root sbin usr var"
> > > +
> > > +case $1 in
> > > + cpio)
> > > + find $PATHS | cpio -o -H newc | gzip > "${COPYDIR}/rootfs.cpio.gz"
> > >=20
> > > +
> > > + # Print the contents for the build log
> > > + zcat "${COPYDIR}/rootfs.cpio.gz" | cpio -tv
> > > Maybe allow $1 to be a filename? E. g. rootfs.cpio.gz or initrd.tar.g=
z.
> > > This way $1 will contain an explicit output artifact format along wit=
h
> > > the output filename.
> >=20
> > What do you think?
> >=20
> > > + ;;
> > > +
> > > + tar)
> > > + tar cvzf "${COPYDIR}/initrd.tar.gz" $PATHS
> > > + ;;
> > > I would add the default case and error out in case of possible mis-us=
e.
>=20
>=20
> This is bespoke tooling, used as part of Xen's GitlabCI infrastructure.
>=20
> The parameter is going to last for all of about a week, until we can
> retire the tests using the tarball, because they're creating routine but
> intermittent test failure.

Oh, I see, thanks for the details!

>=20
> I'm not looking to over-engineer the result.
>=20
> ~Andrew


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Date: Fri, 11 Apr 2025 18:36:46 +0000
To: Andrew Cooper 
From: Denis Mukhin 
Cc: Xen-devel , Anthony PERARD , Stefano Stabellini , Michal Orzel , Doug Goldstein , =?utf-8?Q?Marek_Marczykowski-G=C3=B3recki?= 
Subject: Re: [PATCH 1/3] Rework rootfs generation to make a cpio archive
Message-ID: 
In-Reply-To: <20250411105217.2141356-2-andrew.cooper3@citrix.com>
References: <20250411105217.2141356-1-andrew.cooper3@citrix.com> <20250411105217.2141356-2-andrew.cooper3@citrix.com>
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On Friday, April 11th, 2025 at 3:52 AM, Andrew Cooper  wrote:

>=20
>=20
> Rename the script as we're going to use it for ARM64 shortly, and have it=
 take
> a tar or cpio parameter to determine the output format.
>=20
> Turn it into a proper bash script, and provide the cpio form under the ne=
w
> artefact naming scheme.
>=20
> No functional change.
>=20
> Signed-off-by: Andrew Cooper andrew.cooper3@citrix.com

Reviewed-by: Denis Mukhin 

>=20
> ---
> CC: Anthony PERARD anthony.perard@vates.tech
>=20
> CC: Stefano Stabellini sstabellini@kernel.org
>=20
> CC: Michal Orzel michal.orzel@amd.com
>=20
> CC: Doug Goldstein cardoe@cardoe.com
>=20
> CC: Marek Marczykowski-G=C3=B3recki marmarek@invisiblethingslab.com
>=20
> ---
> .gitlab-ci.yml | 9 +++++++-
> ...6_64-rootfs-alpine.sh =3D> alpine-rootfs.sh} | 21 +++++++++++++++++--
>=20
> 2 files changed, 27 insertions(+), 3 deletions(-)
> rename scripts/{x86_64-rootfs-alpine.sh =3D> alpine-rootfs.sh} (75%)
>=20
>=20
> diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
> index 1d2c72b268a3..916c5ae9d508 100644
> --- a/.gitlab-ci.yml
> +++ b/.gitlab-ci.yml
> @@ -42,6 +42,13 @@ linux-6.6.86-arm64:
> #
> # x86_64 artifacts
> #
> +alpine-3.18-x86_64-rootfs:
> + extends: .x86_64-artifacts
> + script:
> + - ./scripts/alpine-rootfs.sh cpio
> + variables:
> + CONTAINER: alpine:3.18-x86_64-base
> +
> linux-6.6.56-x86_64:
> extends: .x86_64-artifacts
> script: ./scripts/build-linux.sh
> @@ -62,7 +69,7 @@ x86_64-kernel-linux-6.6.56:
> x86_64-rootfs-alpine-3.18:
> extends: .x86_64-artifacts
> script:
> - - . scripts/x86_64-rootfs-alpine.sh
> + - ./scripts/alpine-rootfs.sh tar
> variables:
> CONTAINER: alpine:3.18-x86_64-base
>=20
> diff --git a/scripts/x86_64-rootfs-alpine.sh b/scripts/alpine-rootfs.sh
> similarity index 75%
> rename from scripts/x86_64-rootfs-alpine.sh
> rename to scripts/alpine-rootfs.sh
> index b70b3a54ede5..c29c92d1c682 100755
> --- a/scripts/x86_64-rootfs-alpine.sh
> +++ b/scripts/alpine-rootfs.sh
> @@ -1,4 +1,9 @@
> +#!/bin/bash
> +
> +set -eu
> +
> WORKDIR=3D"${PWD}"
> +COPYDIR=3D"${WORKDIR}/binaries"
>=20
> apk update
>=20
> @@ -56,5 +61,17 @@ passwd -d "root" root
>=20
> # Create rootfs
> cd /
> -tar cvzf "${WORKDIR}/binaries/initrd.tar.gz" \
> - bin dev etc home init lib mnt opt root sbin usr var
> +PATHS=3D"bin dev etc home init lib mnt opt root sbin usr var"
> +
> +case $1 in
> + cpio)
> + find $PATHS | cpio -o -H newc | gzip > "${COPYDIR}/rootfs.cpio.gz"
>=20
> +
> + # Print the contents for the build log
> + zcat "${COPYDIR}/rootfs.cpio.gz" | cpio -tv
> + ;;
> +
> + tar)
> + tar cvzf "${COPYDIR}/initrd.tar.gz" $PATHS
> + ;;
> +esac
> --
> 2.39.5


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Date: Fri, 11 Apr 2025 18:44:08 +0000
To: Roger Pau Monne 
From: Denis Mukhin 
Cc: xen-devel@lists.xenproject.org, Jan Beulich , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini 
Subject: Re: [PATCH 2/5] xen/io: provide helpers for multi size MMIO accesses
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In-Reply-To: <20250411105411.22334-3-roger.pau@citrix.com>
References: <20250411105411.22334-1-roger.pau@citrix.com> <20250411105411.22334-3-roger.pau@citrix.com>
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On Friday, April 11th, 2025 at 3:54 AM, Roger Pau Monne  wrote:

>=20
>=20
> Several handlers have the same necessity of reading from an MMIO region
> using 1, 2, 4 or 8 bytes accesses. So far this has been open-coded in the
> function itself. Instead provide a new handler that encapsulates the
> accesses.
>=20
> Since the added helpers are not architecture specific, introduce a new
> generic io.h header.
>=20
> No functional change intended.
>=20
> Signed-off-by: Roger Pau Monn=C3=A9 roger.pau@citrix.com
>=20
> ---
> xen/arch/x86/hvm/vmsi.c | 47 ++----------------------------
> xen/arch/x86/mm.c | 32 +++++----------------
> xen/drivers/vpci/msix.c | 47 ++----------------------------
> xen/include/xen/io.h | 63 +++++++++++++++++++++++++++++++++++++++++
> 4 files changed, 76 insertions(+), 113 deletions(-)
> create mode 100644 xen/include/xen/io.h
>=20
> diff --git a/xen/arch/x86/hvm/vmsi.c b/xen/arch/x86/hvm/vmsi.c
> index fd83abb929ec..61b89834d97d 100644
> --- a/xen/arch/x86/hvm/vmsi.c
> +++ b/xen/arch/x86/hvm/vmsi.c
> @@ -24,6 +24,7 @@
> * Will be merged it with virtual IOAPIC logic, since most is the same
> */
>=20
> +#include 
>=20
> #include 
>=20
> #include 
>=20
> #include 
>=20
> @@ -304,28 +305,7 @@ static void adjacent_read(
>=20
> hwaddr =3D fix_to_virt(fixmap_idx) + PAGE_OFFSET(address);
>=20
> - switch ( len )
> - {
> - case 1:
> - *pval =3D readb(hwaddr);
> - break;
> -
> - case 2:
> - *pval =3D readw(hwaddr);
> - break;
> -
> - case 4:
> - *pval =3D readl(hwaddr);
> - break;
> -
> - case 8:
> - *pval =3D readq(hwaddr);
> - break;
> -
> - default:
> - ASSERT_UNREACHABLE();
> - break;
> - }
> + *pval =3D read_mmio(hwaddr, len);
> }
>=20
> static void adjacent_write(
> @@ -344,28 +324,7 @@ static void adjacent_write(
>=20
> hwaddr =3D fix_to_virt(fixmap_idx) + PAGE_OFFSET(address);
>=20
> - switch ( len )
> - {
> - case 1:
> - writeb(val, hwaddr);
> - break;
> -
> - case 2:
> - writew(val, hwaddr);
> - break;
> -
> - case 4:
> - writel(val, hwaddr);
> - break;
> -
> - case 8:
> - writeq(val, hwaddr);
> - break;
> -
> - default:
> - ASSERT_UNREACHABLE();
> - break;
> - }
> + write_mmio(hwaddr, val, len);
> }
>=20
> static int cf_check msixtbl_read(
> diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
> index 1cf236516789..989e62e7ce6f 100644
> --- a/xen/arch/x86/mm.c
> +++ b/xen/arch/x86/mm.c
> @@ -95,6 +95,7 @@
> #include 
>=20
> #include 
>=20
> #include 
>=20
> +#include 
>=20
> #include 
>=20
> #include 
>=20
> #include 
>=20
> @@ -116,7 +117,6 @@
> #include 
>=20
> #include 
>=20
> #include 
>=20
> -#include 
>=20
> #include 
>=20
> #include 
>=20
> #include 
>=20
> @@ -5102,7 +5102,7 @@ static void __iomem *subpage_mmio_map_page(
> static void subpage_mmio_write_emulate(
> mfn_t mfn,
> unsigned int offset,
> - const void *data,
> + unsigned long data,
> unsigned int len)
> {
> struct subpage_ro_range *entry;
> @@ -5115,7 +5115,6 @@ static void subpage_mmio_write_emulate(
>=20
> if ( test_bit(offset / MMIO_RO_SUBPAGE_GRAN, entry->ro_elems) )
>=20
> {
> - write_ignored:
> gprintk(XENLOG_WARNING,
> "ignoring write to R/O MMIO 0x%"PRI_mfn"%03x len %u\n",
> mfn_x(mfn), offset, len);
> @@ -5131,26 +5130,7 @@ static void subpage_mmio_write_emulate(
> return;
> }
>=20
> - addr +=3D offset;
> - switch ( len )
> - {
> - case 1:
> - writeb((const uint8_t)data, addr);
> - break;
> - case 2:
> - writew((const uint16_t)data, addr);
> - break;
> - case 4:
> - writel((const uint32_t)data, addr);
> - break;
> - case 8:
> - writeq((const uint64_t)data, addr);
> - break;
> - default:
> - /* mmio_ro_emulated_write() already validated the size */
> - ASSERT_UNREACHABLE();
> - goto write_ignored;
> - }
> + write_mmio(addr + offset, data, len);
> }
>=20
> #ifdef CONFIG_HVM
> @@ -5185,18 +5165,20 @@ int cf_check mmio_ro_emulated_write(
> struct x86_emulate_ctxt *ctxt)
> {
> struct mmio_ro_emulate_ctxt *mmio_ro_ctxt =3D ctxt->data;
>=20
> + unsigned long data =3D 0;
>=20
> /* Only allow naturally-aligned stores at the original %cr2 address. */
> if ( ((bytes | offset) & (bytes - 1)) || !bytes ||
> - offset !=3D mmio_ro_ctxt->cr2 )
>=20
> + offset !=3D mmio_ro_ctxt->cr2 || bytes > sizeof(data) )
>=20
> {
> gdprintk(XENLOG_WARNING, "bad access (cr2=3D%lx, addr=3D%lx, bytes=3D%u)\=
n",
> mmio_ro_ctxt->cr2, offset, bytes);
>=20
> return X86EMUL_UNHANDLEABLE;
> }
>=20
> + memcpy(&data, p_data, bytes);
> subpage_mmio_write_emulate(mmio_ro_ctxt->mfn, PAGE_OFFSET(offset),
>=20
> - p_data, bytes);
> + data, bytes);
>=20
> return X86EMUL_OKAY;
> }
> diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c
> index 6bd8c55bb48e..6455f2a03a01 100644
> --- a/xen/drivers/vpci/msix.c
> +++ b/xen/drivers/vpci/msix.c
> @@ -17,6 +17,7 @@
> * License along with this program; If not, see http://www.gnu.org/license=
s/.
>=20
> */
>=20
> +#include 
>=20
> #include 
>=20
> #include 
>=20
>=20
> @@ -344,28 +345,7 @@ static int adjacent_read(const struct domain *d, con=
st struct vpci_msix *msix,
> return X86EMUL_OKAY;
> }
>=20
> - switch ( len )
> - {
> - case 1:
> - *data =3D readb(mem + PAGE_OFFSET(addr));
> - break;
> -
> - case 2:
> - *data =3D readw(mem + PAGE_OFFSET(addr));
> - break;
> -
> - case 4:
> - *data =3D readl(mem + PAGE_OFFSET(addr));
> - break;
> -
> - case 8:
> - *data =3D readq(mem + PAGE_OFFSET(addr));
> - break;
> -
> - default:
> - ASSERT_UNREACHABLE();
> - break;
> - }
> + *data =3D read_mmio(mem + PAGE_OFFSET(addr), len);
> spin_unlock(&vpci->lock);
>=20
>=20
> return X86EMUL_OKAY;
> @@ -493,28 +473,7 @@ static int adjacent_write(const struct domain *d, co=
nst struct vpci_msix *msix,
> return X86EMUL_OKAY;
> }
>=20
> - switch ( len )
> - {
> - case 1:
> - writeb(data, mem + PAGE_OFFSET(addr));
> - break;
> -
> - case 2:
> - writew(data, mem + PAGE_OFFSET(addr));
> - break;
> -
> - case 4:
> - writel(data, mem + PAGE_OFFSET(addr));
> - break;
> -
> - case 8:
> - writeq(data, mem + PAGE_OFFSET(addr));
> - break;
> -
> - default:
> - ASSERT_UNREACHABLE();
> - break;
> - }
> + write_mmio(mem + PAGE_OFFSET(addr), data, len);
> spin_unlock(&vpci->lock);
>=20
>=20
> return X86EMUL_OKAY;
> diff --git a/xen/include/xen/io.h b/xen/include/xen/io.h
> new file mode 100644
> index 000000000000..5c360ce9dee2
> --- /dev/null
> +++ b/xen/include/xen/io.h
> @@ -0,0 +1,63 @@
> +/* SPDX-License-Identifier: GPL-2.0-only /
> +/
> + * Generic helpers for doing MMIO accesses.
> + *
> + * Copyright (c) 2025 Cloud Software Group
> + */
> +#ifndef XEN_IO_H
> +#define XEN_IO_H
> +
> +#include 
>=20
> +
> +#include 
>=20
> +
> +static inline uint64_t read_mmio(const volatile void __iomem *mem,
> + unsigned int size)
> +{
> + switch ( size )
> + {
> + case 1:
> + return readb(mem);
> +
> + case 2:
> + return readw(mem);
> +
> + case 4:
> + return readl(mem);
> +
> + case 8:
> + return readq(mem);

Suggest adding `default` case for MISRA compliance.=20

> + }
> +
> + ASSERT_UNREACHABLE();
> + return ~0UL;
> +}
> +
> +static inline void write_mmio(volatile void __iomem mem, uint64_t data,
> + unsigned int size)
> +{
> + switch ( size )
> + {
> + case 1:
> + writeb(data, mem);
> + break;
> +
> + case 2:
> + writew(data, mem);
> + break;
> +
> + case 4:
> + writel(data, mem);
> + break;
> +
> + case 8:
> + writeq(data, mem);
> + break;
> +
> + default:
> + ASSERT_UNREACHABLE();
> + break;
> + }
> +}
> +
> +#endif / XEN_IO_H */
> --
> 2.48.1


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From: "Weber (US), Matthew L" 
To: "xen-devel@lists.xenproject.org" 
CC: "Whitehead (US), Joshua C" ,
        "Wood (US),
 Brian J" 
Subject: NXP Layerscape SMMU IDs
Thread-Topic: NXP Layerscape SMMU IDs
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X-TM-AS-GCONF: 00

Hello,

We're curious if anyone else has figured out NXP Layerscape Xen support to =
get at least basic domains launching with minimal IO support?

Started a recent discussion on it here:
https://community.nxp.com/t5/Layerscape/How-to-determine-LS1088A-SMMU-Maste=
rs-and-Stream-IDs/m-p/2072157#M15560

We're guessing some of the NXP specific chip/interconnect designs in Layers=
cape were carried over from the QORIQ PowerPC P/T series.  Maybe some clues=
 in that Topaz hypervisor code?  https://github.com/nxp-qoriq-yocto-sdk/hyp=
ervisor

Regards,
Matt


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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
Subject: [PATCH] Package microcode for the x86 hardware runners
Date: Fri, 11 Apr 2025 20:59:14 +0100
Message-Id: <20250411195914.2256882-1-andrew.cooper3@citrix.com>
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They are all out of date, to different degrees.

Install jq into the x86_64 build container so we can parse the Github latest
release information in an acceptable way.

The resulting archive must be uncompressed, in order to work during early
boot.

Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Doug Goldstein 
CC: Marek Marczykowski-Górecki 

Example working in Xen:
  https://gitlab.com/xen-project/hardware/xen-staging/-/jobs/9700756054#L206
---
 .gitlab-ci.yml                             |  4 +++
 images/alpine/3.18-x86_64-build.dockerfile |  3 ++
 scripts/x86-microcode.sh                   | 42 ++++++++++++++++++++++
 3 files changed, 49 insertions(+)
 create mode 100755 scripts/x86-microcode.sh

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 3587d660aa62..63722233dc6f 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -64,6 +64,10 @@ linux-6.6.56-x86_64:
     ARGO_SHA: "ca5473a56f62e2b4d59697c8552d151391d3fec1"
     ARGOEXEC_SHA: "d900429f6640acc6f68a3d3a4c945d7da60625d8"
 
+microcode-x86:
+  extends: .x86_64-artifacts
+  script: ./scripts/x86-microcode.sh
+
 #
 # The jobs below here are legacy and being phased out.
 #
diff --git a/images/alpine/3.18-x86_64-build.dockerfile b/images/alpine/3.18-x86_64-build.dockerfile
index eac0cda4fed3..c4ff30e1f138 100644
--- a/images/alpine/3.18-x86_64-build.dockerfile
+++ b/images/alpine/3.18-x86_64-build.dockerfile
@@ -27,6 +27,9 @@ RUN < intel-latest.json
+TARBALL_URL="$(jq -r .tarball_url intel-latest.json)"
+curl -fsSL "${TARBALL_URL}" > intel-latest.tar
+tar xf intel-latest.tar --strip-components=1
+
+(
+    cd intel-ucode
+    cat 06-97-02 # adl-*
+    cat 06-8e-09 # kbl-*
+) > "${UCODEDIR}/GenuineIntel.bin"
+
+#
+# AMD microcode comes from linux-firmware
+#
+curl -fsSLO https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/plain/amd-ucode/microcode_amd_fam17h.bin
+curl -fsSLO https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/plain/amd-ucode/microcode_amd_fam19h.bin
+
+(
+    cat microcode_amd_fam17h.bin # zen2-*, xilinux-*-x86_64-*
+    cat microcode_amd_fam19h.bin # zen3p-*
+) > "${UCODEDIR}/AuthenticAMD.bin"
+
+# Package everything up.  It must be uncompressed
+cd "${ROOTDIR}"
+find . | cpio -R 0:0 -H newc -o > "${COPYDIR}/ucode.cpio"
+
+# Print the contents for the build log
+cpio -tv < "${COPYDIR}/ucode.cpio"
-- 
2.39.5



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From: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
To: xen-devel@lists.xenproject.org
Cc: Andrew Cooper ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Doug Goldstein ,
	Stefano Stabellini 
Subject: [PATCH v3 1/7] CI: wait for Xen to start before waiting for test to complete
Date: Fri, 11 Apr 2025 22:32:13 +0200
Message-ID: <3f1ef15b54a84573576e647314ec61ea43d4e3af.1744403499.git-series.marmarek@invisiblethingslab.com>
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Add additional stage in console output parsing - wait for first message
from Xen. The message is defined via BOOT_MSG variable. This has two
effects:
- distinguishes failing Xen to load at all from later test failures
- resets timeout when Xen starts loading

The latter is especially relevant for hardware tests where firmware +
network boot may take some time before Xen starts booting. The two-stage
timeout is more robust solution than increasing the overall timeout.
The issue has been observed on some dom0pvh-hvm jobs, at least on
runners hw3 and hw11. This patch is a first stage before qubes-x86-64.sh
is switched to use expect in the next stage.

While at it, consistently use 'expect -re' for all matches. This
especially allows matching newlines ("\n"), which will become relevant
in the next patch. And document variables used in console.exp.

Signed-off-by: Marek Marczykowski-Górecki 
---
Changes in v3:
- split off "CI: switch qubes runners to use console.exp"
- use BOOT_MSG in more tests (all using network boot)
---
 automation/scripts/console.exp                    | 27 +++++++++++++---
 automation/scripts/qemu-alpine-x86_64.sh          |  1 +-
 automation/scripts/qemu-smoke-dom0-arm32.sh       |  1 +-
 automation/scripts/qemu-smoke-dom0-arm64.sh       |  1 +-
 automation/scripts/qemu-smoke-dom0less-arm32.sh   |  1 +-
 automation/scripts/qemu-xtf-dom0less-arm64.sh     |  1 +-
 automation/scripts/xilinx-smoke-dom0-x86_64.sh    |  1 +-
 automation/scripts/xilinx-smoke-dom0less-arm64.sh |  1 +-
 8 files changed, 29 insertions(+), 5 deletions(-)

diff --git a/automation/scripts/console.exp b/automation/scripts/console.exp
index 31ce97b91b63..c27f893dfba7 100755
--- a/automation/scripts/console.exp
+++ b/automation/scripts/console.exp
@@ -1,4 +1,17 @@
 #!/usr/bin/env expect
+#
+# Variables used by this script:
+# - TEST_TIMEOUT: timeout between each *_MSG match
+# - TEST_TIMEOUT_OVERRIDE: when set, overrides TEST_TIMEOUT
+# - TEST_LOG: save console log to this file
+# - TEST_CMD: commands that prints test system console output to stdout - in
+#   qemu tests that's usually qemu itself (with -serial stdio), in hardware
+#   tests that's a command to read serial console
+# - UBOOT_CMD (optional): command to enter at u-boot prompt
+# - BOOT_MSG (optional): initial Xen message to wait for (aka sign-of-life)
+# - LOG_MSG (optional): final console message to wait for
+# - PASSED: message to look for to consider test a success; if LOG_MSG is set,
+#   both LOG_MSG and PASSED must appear (in any order) for test to succeed
 
 if {[info exists env(TEST_TIMEOUT_OVERRIDE)]} {
     set timeout $env(TEST_TIMEOUT_OVERRIDE)
@@ -28,21 +41,25 @@ if {[info exists env(UBOOT_CMD)]} {
     send "$env(UBOOT_CMD)\r"
 }
 
+if {[info exists env(BOOT_MSG)]} {
+    expect -re "$env(BOOT_MSG)"
+}
+
 if {[info exists env(LOG_MSG)]} {
     expect {
-        "$env(PASSED)" {
-            expect "$env(LOG_MSG)"
+        -re "$env(PASSED)" {
+            expect -re "$env(LOG_MSG)"
             exit 0
         }
-        "$env(LOG_MSG)" {
-            expect "$env(PASSED)"
+        -re "$env(LOG_MSG)" {
+            expect -re "$env(PASSED)"
             exit 0
         }
     }
 }
 
 expect {
-    "$env(PASSED)" {
+    -re "$env(PASSED)" {
         exit 0
     }
 }
diff --git a/automation/scripts/qemu-alpine-x86_64.sh b/automation/scripts/qemu-alpine-x86_64.sh
index 17e2141d625e..89bdb4df7dac 100755
--- a/automation/scripts/qemu-alpine-x86_64.sh
+++ b/automation/scripts/qemu-alpine-x86_64.sh
@@ -85,6 +85,7 @@ export TEST_CMD="qemu-system-x86_64 \
     -netdev user,id=n0,tftp=binaries,bootfile=/pxelinux.0"
 
 export TEST_LOG="smoke.serial"
+export BOOT_MSG="Latest ChangeSet: "
 export LOG_MSG="Domain-0"
 export PASSED="BusyBox"
 
diff --git a/automation/scripts/qemu-smoke-dom0-arm32.sh b/automation/scripts/qemu-smoke-dom0-arm32.sh
index 0c60a66e25e3..4f50eabdef53 100755
--- a/automation/scripts/qemu-smoke-dom0-arm32.sh
+++ b/automation/scripts/qemu-smoke-dom0-arm32.sh
@@ -92,6 +92,7 @@ export TEST_CMD="./qemu-system-arm \
 
 export UBOOT_CMD="virtio scan; dhcp; tftpb 0x40000000 boot.scr; source 0x40000000"
 export TEST_LOG="${serial_log}"
+export BOOT_MSG="Latest ChangeSet: "
 export LOG_MSG="Domain-0"
 export PASSED="/ #"
 
diff --git a/automation/scripts/qemu-smoke-dom0-arm64.sh b/automation/scripts/qemu-smoke-dom0-arm64.sh
index 8774a8701232..51d037b0003e 100755
--- a/automation/scripts/qemu-smoke-dom0-arm64.sh
+++ b/automation/scripts/qemu-smoke-dom0-arm64.sh
@@ -104,6 +104,7 @@ export TEST_CMD="./binaries/qemu-system-aarch64 \
     -bios /usr/lib/u-boot/qemu_arm64/u-boot.bin"
 
 export UBOOT_CMD="virtio scan; dhcp; tftpb 0x40000000 boot.scr; source 0x40000000"
+export BOOT_MSG="Latest ChangeSet: "
 export TEST_LOG="smoke.serial"
 export LOG_MSG="Domain-0"
 export PASSED="BusyBox"
diff --git a/automation/scripts/qemu-smoke-dom0less-arm32.sh b/automation/scripts/qemu-smoke-dom0less-arm32.sh
index 0c94e662aab9..0e2c5496db51 100755
--- a/automation/scripts/qemu-smoke-dom0less-arm32.sh
+++ b/automation/scripts/qemu-smoke-dom0less-arm32.sh
@@ -144,6 +144,7 @@ export TEST_CMD="./qemu-system-arm \
     -bios /usr/lib/u-boot/qemu_arm/u-boot.bin"
 
 export UBOOT_CMD="virtio scan; dhcp; tftpb 0x40000000 boot.scr; source 0x40000000"
+export BOOT_MSG="Latest ChangeSet: "
 export TEST_LOG="${serial_log}"
 export LOG_MSG="${dom0_prompt}"
 export PASSED="${passed}"
diff --git a/automation/scripts/qemu-xtf-dom0less-arm64.sh b/automation/scripts/qemu-xtf-dom0less-arm64.sh
index 9608de6ec033..436f460c3cb6 100755
--- a/automation/scripts/qemu-xtf-dom0less-arm64.sh
+++ b/automation/scripts/qemu-xtf-dom0less-arm64.sh
@@ -61,6 +61,7 @@ export TEST_CMD="./binaries/qemu-system-aarch64 \
     -bios /usr/lib/u-boot/qemu_arm64/u-boot.bin"
 
 export UBOOT_CMD="virtio scan; dhcp; tftpb 0x40000000 boot.scr; source 0x40000000"
+export BOOT_MSG="Latest ChangeSet: "
 export TEST_LOG="smoke.serial"
 export PASSED="${passed}"
 
diff --git a/automation/scripts/xilinx-smoke-dom0-x86_64.sh b/automation/scripts/xilinx-smoke-dom0-x86_64.sh
index 7834ffbe0593..69caabe2d8ed 100755
--- a/automation/scripts/xilinx-smoke-dom0-x86_64.sh
+++ b/automation/scripts/xilinx-smoke-dom0-x86_64.sh
@@ -159,6 +159,7 @@ stty -F ${SERIAL_DEV} 57600
 
 # Capture test result and power off board before exiting.
 export PASSED="${PASS_MSG}"
+export BOOT_MSG="Latest ChangeSet: "
 export TEST_CMD="cat ${SERIAL_DEV}"
 export TEST_LOG="smoke.serial"
 
diff --git a/automation/scripts/xilinx-smoke-dom0less-arm64.sh b/automation/scripts/xilinx-smoke-dom0less-arm64.sh
index b24ad11b8cac..3e1fcf6bf93c 100755
--- a/automation/scripts/xilinx-smoke-dom0less-arm64.sh
+++ b/automation/scripts/xilinx-smoke-dom0less-arm64.sh
@@ -140,6 +140,7 @@ stty -F ${SERIAL_DEV} 115200
 
 # Capture test result and power off board before exiting.
 export PASSED="${passed}"
+export BOOT_MSG="Latest ChangeSet: "
 export LOG_MSG="Welcome to Alpine Linux"
 export TEST_CMD="cat ${SERIAL_DEV}"
 export TEST_LOG="smoke.serial"
-- 
git-series 0.9.1


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Feedback-ID: i1568416f:Fastmail
From: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
To: xen-devel@lists.xenproject.org
Cc: Andrew Cooper ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Doug Goldstein ,
	Stefano Stabellini 
Subject: [PATCH v3 4/7] CI: write whole etc/issue for domU initrd
Date: Fri, 11 Apr 2025 22:32:16 +0200
Message-ID: <526ec153b1cabc1d5b111be27ded8d0d4da5178a.1744403499.git-series.marmarek@invisiblethingslab.com>
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Upcoming changes won't unpack original rootfs anymore, so sed on
existing file cannot be used. Override the whole file instead.

No functional change intended.

Signed-off-by: Marek Marczykowski-Górecki 
---
 automation/scripts/qubes-x86-64.sh             | 5 ++++-
 automation/scripts/xilinx-smoke-dom0-x86_64.sh | 5 ++++-
 2 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh
index 861e302d845b..dd88a1398f2b 100755
--- a/automation/scripts/qubes-x86-64.sh
+++ b/automation/scripts/qubes-x86-64.sh
@@ -182,7 +182,10 @@ ${domU_check}
 " > etc/local.d/xen.start
     chmod +x etc/local.d/xen.start
     echo "rc_verbose=yes" >> etc/rc.conf
-    sed -i -e 's/^Welcome/domU \0/' etc/issue
+    echo "domU Welcome to Alpine Linux 3.18
+Kernel \r on an \m (\l)
+
+" > etc/issue
     find . | fakeroot -i ../fakeroot-save cpio -H newc -o | gzip > ../binaries/domU-rootfs.cpio.gz
     cd ..
     rm -rf rootfs
diff --git a/automation/scripts/xilinx-smoke-dom0-x86_64.sh b/automation/scripts/xilinx-smoke-dom0-x86_64.sh
index 69caabe2d8ed..4db249530823 100755
--- a/automation/scripts/xilinx-smoke-dom0-x86_64.sh
+++ b/automation/scripts/xilinx-smoke-dom0-x86_64.sh
@@ -103,7 +103,10 @@ ${DOMU_CMD}
 " > etc/local.d/xen.start
 chmod +x etc/local.d/xen.start
 echo "rc_verbose=yes" >> etc/rc.conf
-sed -i -e 's/^Welcome/domU \0/' etc/issue
+echo "domU Welcome to Alpine Linux 3.18
+Kernel \r on an \m (\l)
+
+" > etc/issue
 copy_domU_files
 find . | cpio -H newc -o | gzip > ../binaries/domU-rootfs.cpio.gz
 cd ..
-- 
git-series 0.9.1


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Feedback-ID: i1568416f:Fastmail
From: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
To: xen-devel@lists.xenproject.org
Cc: Andrew Cooper ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Doug Goldstein ,
	Stefano Stabellini 
Subject: [PATCH v3 3/7] CI: switch qubes runners to use console.exp
Date: Fri, 11 Apr 2025 22:32:15 +0200
Message-ID: <668fb90bbc5e418f6aea85e81d90343d834a066f.1744403499.git-series.marmarek@invisiblethingslab.com>
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It appears as sometimes it takes more time for Xen even start booting,
mostly due to firmware and fetching large boot files by grub. In some
jobs the current timeout is pretty close to the actual time needed, and
sometimes (rarely for now) test fails due to timeout expiring in the
middle of dom0 booting. This will be happening more often if the
initramfs will grow (and with more complex tests).
This has been observed on some dom0pvh-hvm jobs, at least on runners hw3
and hw11.

Switch to using expect (console.exp) for more robust test output
handling. This allows waiting separately for Xen starting to boot and
then for the test to complete. For now, set both of those to 120s, which
pessimistically bumps timeout for the whole test to 240s (from 120s).

Add S3 handling to console.exp via SUSPEND_MSG + WAKEUP_CMD.

Signed-off-by: Marek Marczykowski-Górecki 
---
Changes in v3:
- split into two patches - generic change is in the previous one
Changes in v2:
- replace previous "ci: increase timeout for hw tests" with changing how
  console is interacted with

This needs a containers rebuild.
---
 automation/build/alpine/3.18-arm64v8.dockerfile |  1 +-
 automation/scripts/console.exp                  | 13 +++++-
 automation/scripts/qubes-x86-64.sh              | 52 ++++--------------
 3 files changed, 27 insertions(+), 39 deletions(-)

diff --git a/automation/build/alpine/3.18-arm64v8.dockerfile b/automation/build/alpine/3.18-arm64v8.dockerfile
index 19fe46f8418f..b8482d5bf43f 100644
--- a/automation/build/alpine/3.18-arm64v8.dockerfile
+++ b/automation/build/alpine/3.18-arm64v8.dockerfile
@@ -48,3 +48,4 @@ RUN apk --no-cache add \
   # qubes test deps
   openssh-client \
   fakeroot \
+  expect \
diff --git a/automation/scripts/console.exp b/automation/scripts/console.exp
index 834a08db1b95..bdb1dd982003 100755
--- a/automation/scripts/console.exp
+++ b/automation/scripts/console.exp
@@ -9,6 +9,10 @@
 #   tests that's a command to read serial console
 # - UBOOT_CMD (optional): command to enter at u-boot prompt
 # - BOOT_MSG (optional): initial Xen message to wait for (aka sign-of-life)
+# - SUSPEND_MSG (optional): message signaling system is going to sleep, it's
+#   trigger for WAKEUP_CMD (see below)
+# - WAKEUP_CMD (optional): command to execute to wakeup the system 30s after
+#   seeing SUSPEND_MSG
 # - LOG_MSG (optional): final console message to wait for
 # - PASSED: message to look for to consider test a success; if LOG_MSG is set,
 #   both LOG_MSG and PASSED must appear (in any order) for test to succeed
@@ -45,6 +49,15 @@ if {[info exists env(BOOT_MSG)]} {
     expect -re "$env(BOOT_MSG)"
 }
 
+if {[info exists env(WAKEUP_CMD)]} {
+    expect -re "$env(SUSPEND_MSG)"
+
+    # keep it suspended a bit, then wakeup
+    sleep 30
+
+    system "$env(WAKEUP_CMD)"
+}
+
 if {[info exists env(LOG_MSG)]} {
     expect {
         -re "$env(PASSED)" {
diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh
index a964ac4b7a4e..861e302d845b 100755
--- a/automation/scripts/qubes-x86-64.sh
+++ b/automation/scripts/qubes-x86-64.sh
@@ -1,6 +1,6 @@
 #!/bin/sh
 
-set -ex
+set -ex -o pipefail
 
 # One of:
 #  - ""             PV dom0,  PVH domU
@@ -267,52 +267,26 @@ cp -f binaries/xen $TFTP/xen
 cp -f binaries/bzImage $TFTP/vmlinuz
 cp -f binaries/dom0-rootfs.cpio.gz $TFTP/initrd-dom0
 
-# start logging the serial; this gives interactive console, don't close its
-# stdin to not close it; the 'cat' is important, plain redirection would hang
-# until somebody opens the pipe; opening and closing the pipe is used to close
-# the console
-mkfifo /tmp/console-stdin
-cat /tmp/console-stdin |\
-ssh $CONTROLLER console | tee smoke.serial | sed 's/\r//' &
-
 # start the system pointing at gitlab-ci predefined config
 ssh $CONTROLLER gitlabci poweron
-trap "ssh $CONTROLLER poweroff; : > /tmp/console-stdin" EXIT
+trap "ssh $CONTROLLER poweroff" EXIT
 
 if [ -n "$wait_and_wakeup" ]; then
-    # wait for suspend or a timeout
-    until grep "$wait_and_wakeup" smoke.serial || [ $timeout -le 0 ]; do
-        sleep 1;
-        : $((--timeout))
-    done
-    if [ $timeout -le 0 ]; then
-        echo "ERROR: suspend timeout, aborting"
-        exit 1
-    fi
-    # keep it suspended a bit, then wakeup
-    sleep 30
-    ssh $CONTROLLER wake
+    export SUSPEND_MSG="$wait_and_wakeup"
+    export WAKEUP_CMD="ssh $CONTROLLER wake"
 fi
 
-set +x
-until grep "^Welcome to Alpine Linux" smoke.serial || [ $timeout -le 0 ]; do
-    sleep 1;
-    : $((--timeout))
-done
-set -x
-
-tail -n 100 smoke.serial
-
-if [ $timeout -le 0 ]; then
-    echo "ERROR: test timeout, aborting"
-    exit 1
-fi
+export PASSED="${passed}"
+export BOOT_MSG="Latest ChangeSet: "
+export LOG_MSG="\nWelcome to Alpine Linux"
+export TEST_CMD="ssh $CONTROLLER console"
+export TEST_LOG="smoke.serial"
+export TEST_TIMEOUT="$timeout"
+./automation/scripts/console.exp | sed 's/\r\+$//'
+TEST_RESULT=$?
 
 if [ -n "$retrieve_xml" ]; then
     nc -w 10 "$SUT_ADDR" 8080 > tests-junit.xml 
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Feedback-ID: i1568416f:Fastmail
From: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
To: xen-devel@lists.xenproject.org
Cc: Andrew Cooper ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Doug Goldstein ,
	Stefano Stabellini 
Subject: [PATCH v3 2/7] CI: fix waiting for final test message
Date: Fri, 11 Apr 2025 22:32:14 +0200
Message-ID: 
X-Mailer: git-send-email 2.48.1
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Expect normally discards initial part of its buffer after matching the
patter, before looking for the next one. If both PASSED and LOG_MSG
happen to be in the buffer at the same time, depending on their order,
only one will be matched and the waiting for the other will timeout.
Example expect -d output of this happening (parts eclipsed for brevity):

    expect: does "\r\r\r\nWelcome to Alpine Linux 3.18\r\r\r\n...\r\r\r\r\n(domU) + echo 'pci test passed'\r\r\r\r\n(domU) pci test passed\r\r\r\r..." (spawn_id exp4) match regular expression "pci test passed"? Gate "pci test passed"? gate=yes re=yes
    ...
    Gate keeper glob pattern for '\nWelcome to Alpine Linux' is '
    Welcome to Alpine Linux'. Activating booster.
    expect: does "'\r\r\r\r\n(domU) pci test passed\r\r\r\r\n(domU)  [ ok ]\r\r\r\r\n(domU)  [ ok ]\r\r\r\r\n(domU) \r\r\r\r\r\n(domU) domU Welcome to Alpine Linux 3.18\r\r\r\r\n(domU) \rKernel 6.6.56 on an x86_64 (/dev/hvc0)\r\r\r\r\n(domU) \r\r\r\r\r\n" (spawn_id exp4) match regular expression "\nWelcome to Alpine Linux"? Gate "\nWelcome to Alpine Linux"? gate=no

Fix this by using -notransfer flag to keep matched part in the buffer.

Signed-off-by: Marek Marczykowski-Górecki 
---
 automation/scripts/console.exp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/automation/scripts/console.exp b/automation/scripts/console.exp
index c27f893dfba7..834a08db1b95 100755
--- a/automation/scripts/console.exp
+++ b/automation/scripts/console.exp
@@ -48,11 +48,11 @@ if {[info exists env(BOOT_MSG)]} {
 if {[info exists env(LOG_MSG)]} {
     expect {
         -re "$env(PASSED)" {
-            expect -re "$env(LOG_MSG)"
+            expect -notransfer -re "$env(LOG_MSG)"
             exit 0
         }
         -re "$env(LOG_MSG)" {
-            expect -re "$env(PASSED)"
+            expect -notransfer -re "$env(PASSED)"
             exit 0
         }
     }
-- 
git-series 0.9.1


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From: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
To: xen-devel@lists.xenproject.org
Cc: Andrew Cooper ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
Subject: [PATCH v3 0/7] Several CI cleanups and improvements around initrd/rootfs
Date: Fri, 11 Apr 2025 22:32:12 +0200
Message-ID: 
X-Mailer: git-send-email 2.48.1
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Some of those patches are collected from my stubdomain test series, others are
made while getting the new runner working. This series initially included
adding Zen4 runner, but drop it in this version as there is quite enough stuff
here already, and there are few more dependencies for the new runner (fixing
some PVH issues, getting 6.12 kernel to build etc).

This series also evolved into refactoring initrd/rootfs handling and now
depends on test-artifacts changes posted by Andrew. This significantly reduces
hw test jobs time.

Marek Marczykowski-Górecki (7):
  CI: wait for Xen to start before waiting for test to complete
  CI: fix waiting for final test message
  CI: switch qubes runners to use console.exp
  CI: write whole etc/issue for domU initrd
  CI: avoid repacking initrd as part of the test job
  CI: remove now unused alpine-3.18-arm64-rootfs job and its container
  CI: save toolstack artifact as cpio.gz

 automation/build/alpine/3.18-arm64v8.dockerfile           |  1 +-
 automation/gitlab-ci/build.yaml                           | 11 +-
 automation/gitlab-ci/test.yaml                            |  6 +-
 automation/scripts/build                                  |  2 +-
 automation/scripts/console.exp                            | 40 +++-
 automation/scripts/qemu-alpine-x86_64.sh                  | 12 +-
 automation/scripts/qemu-smoke-dom0-arm32.sh               |  1 +-
 automation/scripts/qemu-smoke-dom0-arm64.sh               | 10 +-
 automation/scripts/qemu-smoke-dom0less-arm32.sh           |  1 +-
 automation/scripts/qemu-smoke-dom0less-arm64.sh           |  9 +-
 automation/scripts/qemu-xtf-dom0less-arm64.sh             |  1 +-
 automation/scripts/qubes-x86-64.sh                        | 79 ++------
 automation/scripts/xilinx-smoke-dom0-x86_64.sh            | 23 +-
 automation/scripts/xilinx-smoke-dom0less-arm64.sh         | 17 +--
 automation/tests-artifacts/alpine/3.18-arm64v8.dockerfile | 66 +-------
 15 files changed, 108 insertions(+), 171 deletions(-)
 delete mode 100644 automation/tests-artifacts/alpine/3.18-arm64v8.dockerfile

base-commit: 7bf777b42cade81d4f20f78cb85c4bc0f638de7b
-- 
git-series 0.9.1


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Feedback-ID: i1568416f:Fastmail
From: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
To: xen-devel@lists.xenproject.org
Cc: Andrew Cooper ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Doug Goldstein ,
	Stefano Stabellini 
Subject: [PATCH v3 5/7] CI: avoid repacking initrd as part of the test job
Date: Fri, 11 Apr 2025 22:32:17 +0200
Message-ID: 
X-Mailer: git-send-email 2.48.1
In-Reply-To: 
References: 
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Content-Type: text/plain; charset=UTF-8
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The prerequisite for this is building rootfs.cpio.gz, not only
initrd.tar.gz. That's a change in the test-artifacts repository in the
"Rootfs generation" series from Andrew.

Having that, do not repack the whole initrd, but only pack modified
files and rely on Linux handling of concatenated archives.
This allows packing just test-related files (which includes the whole
toolstack), instead of the whole initrd.

DomU initrd handling is a bit more complicated thing. It's sent to the
target host as part of the dom0 initrd. For now include prepared domU
initrd as a whole in dom0's rootfs "overlay", which means compressing it
(again) each job (this takes 3s). This can be later improved by
splitting domU initrd into two parts (base + overlay) and concatenate
them in target dom0 already. For this to be useful, test-artifacts would
need to provide pre-made double-cpio version too (rootfs.cpio.gz wrapper
in yet another cpio.gz as boot/domU-initrd).

Since full initrd is not unpacked now when preparing domU (and dom0)
rootfs, a couple of minor changes are needed to how they are prepared.
This includes creating whole etc/issue file, instead of modifying
existing one, and a need to create a couple directories.

Finally, move adding "rc_verbose=yes" to /etc/rc.conf to initrd
building.

Signed-off-by: Marek Marczykowski-Górecki 
---
Changes in v3:
- adjust for Andrew's version of cpio rootfs artifacts
- don't require double-cpio archive for domU initrd, instead add it via
  dom0 initrd as plain cpio to avoid re-compressing the same thing
New in v2

Jobs xilinx-* are untested, as I don't have necessary access.
---
 automation/gitlab-ci/test.yaml                    |  6 +++--
 automation/scripts/qemu-alpine-x86_64.sh          |  9 +++-----
 automation/scripts/qemu-smoke-dom0-arm64.sh       |  7 ++----
 automation/scripts/qemu-smoke-dom0less-arm64.sh   |  7 ++----
 automation/scripts/qubes-x86-64.sh                | 18 +++++++---------
 automation/scripts/xilinx-smoke-dom0-x86_64.sh    | 15 ++++++-------
 automation/scripts/xilinx-smoke-dom0less-arm64.sh | 14 +++++-------
 7 files changed, 35 insertions(+), 41 deletions(-)

diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml
index 59a2de28c864..3e02bf0e4d21 100644
--- a/automation/gitlab-ci/test.yaml
+++ b/automation/gitlab-ci/test.yaml
@@ -11,7 +11,9 @@
   - project: xen-project/hardware/test-artifacts
     job: linux-6.6.86-arm64
     ref: master
-  - alpine-3.18-arm64-rootfs-export
+  - project: xen-project/hardware/test-artifacts
+    job: alpine-3.18-arm64-rootfs
+    ref: master
   - qemu-system-aarch64-6.0.0-arm64-export
 
 .arm32-test-needs: &arm32-test-needs
@@ -22,7 +24,7 @@
     job: linux-6.6.56-x86_64
     ref: master
   - project: xen-project/hardware/test-artifacts
-    job: x86_64-rootfs-alpine-3.18
+    job: alpine-3.18-x86_64-rootfs
     ref: master
 
 .qemu-arm64:
diff --git a/automation/scripts/qemu-alpine-x86_64.sh b/automation/scripts/qemu-alpine-x86_64.sh
index 89bdb4df7dac..6e0a67b4018c 100755
--- a/automation/scripts/qemu-alpine-x86_64.sh
+++ b/automation/scripts/qemu-alpine-x86_64.sh
@@ -28,16 +28,15 @@ cd initrd
 find . | cpio --create --format='newc' | gzip > ../initrd.cpio.gz
 cd ..
 
-# initrd.tar.gz is Dom0 rootfs
+# Dom0 rootfs - overlay on top of rootfs.cpio.gz
 mkdir -p rootfs
 cd rootfs
-tar xvzf ../initrd.tar.gz
 mkdir proc
 mkdir run
 mkdir srv
 mkdir sys
-rm var/run
 cp -ar ../dist/install/* .
+mkdir -p root etc/local.d
 mv ../initrd.cpio.gz ./root
 cp ../bzImage ./root
 echo "name=\"test\"
@@ -60,9 +59,9 @@ xl -vvv create -c /root/test.cfg
 
 " > etc/local.d/xen.start
 chmod +x etc/local.d/xen.start
-echo "rc_verbose=yes" >> etc/rc.conf
 # rebuild Dom0 rootfs
-find . |cpio -H newc -o|gzip > ../xen-rootfs.cpio.gz
+cp ../rootfs.cpio.gz ../xen-rootfs.cpio.gz
+find . |cpio -H newc -o|gzip >> ../xen-rootfs.cpio.gz
 cd ../..
 
 cat >> binaries/pxelinux.0 << EOF
diff --git a/automation/scripts/qemu-smoke-dom0-arm64.sh b/automation/scripts/qemu-smoke-dom0-arm64.sh
index 51d037b0003e..86047ccd9e7b 100755
--- a/automation/scripts/qemu-smoke-dom0-arm64.sh
+++ b/automation/scripts/qemu-smoke-dom0-arm64.sh
@@ -29,13 +29,12 @@ cd ..
 
 mkdir -p rootfs
 cd rootfs
-tar xvzf ../initrd.tar.gz
 mkdir proc
 mkdir run
 mkdir srv
 mkdir sys
-rm var/run
 cp -ar ../dist/install/* .
+mkdir -p etc/local.d root
 mv ../initrd.cpio.gz ./root
 cp ../Image ./root
 echo "name=\"test\"
@@ -56,8 +55,8 @@ xl -vvv create -c /root/test.cfg
 
 " > etc/local.d/xen.start
 chmod +x etc/local.d/xen.start
-echo "rc_verbose=yes" >> etc/rc.conf
-find . |cpio -H newc -o|gzip > ../xen-rootfs.cpio.gz
+cp ../rootfs.cpio.gz ../xen-rootfs.cpio.gz
+find . |cpio -H newc -o|gzip >> ../xen-rootfs.cpio.gz
 cd ../..
 
 # XXX QEMU looks for "efi-virtio.rom" even if it is unneeded
diff --git a/automation/scripts/qemu-smoke-dom0less-arm64.sh b/automation/scripts/qemu-smoke-dom0less-arm64.sh
index f72d20936181..b095a5008e30 100755
--- a/automation/scripts/qemu-smoke-dom0less-arm64.sh
+++ b/automation/scripts/qemu-smoke-dom0less-arm64.sh
@@ -117,13 +117,12 @@ cd ..
 # DOM0 rootfs
 mkdir -p rootfs
 cd rootfs
-tar xzf ../binaries/initrd.tar.gz
 mkdir proc
 mkdir run
 mkdir srv
 mkdir sys
-rm var/run
 cp -ar ../binaries/dist/install/* .
+mkdir -p etc/local.d
 
 echo "#!/bin/bash
 
@@ -142,8 +141,8 @@ xl network-attach 1 type=vif
 ${dom0_check}
 " > etc/local.d/xen.start
 chmod +x etc/local.d/xen.start
-echo "rc_verbose=yes" >> etc/rc.conf
-find . | cpio -H newc -o | gzip > ../binaries/dom0-rootfs.cpio.gz
+cp ../binaries/rootfs.cpio.gz ../binaries/dom0-rootfs.cpio.gz
+find . | cpio -H newc -o | gzip >> ../binaries/dom0-rootfs.cpio.gz
 cd ..
 
 # ImageBuilder
diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh
index dd88a1398f2b..99c2ece304f0 100755
--- a/automation/scripts/qubes-x86-64.sh
+++ b/automation/scripts/qubes-x86-64.sh
@@ -167,13 +167,11 @@ if [ -n "$domU_check" ]; then
     # DomU
     mkdir -p rootfs
     cd rootfs
-    # fakeroot is needed to preserve device nodes in rootless podman container
-    fakeroot -s ../fakeroot-save tar xzf ../binaries/initrd.tar.gz
     mkdir proc
     mkdir run
     mkdir srv
     mkdir sys
-    rm var/run
+    mkdir -p etc/local.d
     echo "#!/bin/sh
 
 echo 8 > /proc/sys/kernel/printk
@@ -181,26 +179,25 @@ echo 8 > /proc/sys/kernel/printk
 ${domU_check}
 " > etc/local.d/xen.start
     chmod +x etc/local.d/xen.start
-    echo "rc_verbose=yes" >> etc/rc.conf
     echo "domU Welcome to Alpine Linux 3.18
 Kernel \r on an \m (\l)
 
 " > etc/issue
-    find . | fakeroot -i ../fakeroot-save cpio -H newc -o | gzip > ../binaries/domU-rootfs.cpio.gz
+    cp ../binaries/rootfs.cpio.gz ../binaries/domU-rootfs.cpio.gz
+    find . | cpio -H newc -o | gzip >> ../binaries/domU-rootfs.cpio.gz
     cd ..
     rm -rf rootfs
 fi
 
-# DOM0 rootfs
+# DOM0 rootfs - this will be an overlay over alpine's initrd
 mkdir -p rootfs
 cd rootfs
-fakeroot -s ../fakeroot-save tar xzf ../binaries/initrd.tar.gz
 mkdir boot
 mkdir proc
 mkdir run
 mkdir srv
 mkdir sys
-rm var/run
+mkdir -p etc/local.d
 cp -ar ../binaries/dist/install/* .
 cp -ar ../binaries/tests .
 cp -a ../automation/scripts/run-tools-tests tests/
@@ -237,7 +234,6 @@ fi
 chmod +x etc/local.d/xen.start
 echo "$domU_config" > etc/xen/domU.cfg
 
-echo "rc_verbose=yes" >> etc/rc.conf
 echo "XENCONSOLED_TRACE=all" >> etc/default/xencommons
 echo "QEMU_XEN=/bin/false" >> etc/default/xencommons
 mkdir -p var/log/xen/console
@@ -245,7 +241,9 @@ cp ../binaries/bzImage boot/vmlinuz
 if [ -n "$domU_check" ]; then
     cp ../binaries/domU-rootfs.cpio.gz boot/initrd-domU
 fi
-find . | fakeroot -i ../fakeroot-save cpio -H newc -o | gzip > ../binaries/dom0-rootfs.cpio.gz
+# take base initrd and append test-specific files
+cp ../binaries/rootfs.cpio.gz ../binaries/dom0-rootfs.cpio.gz
+find . | cpio -H newc -o | gzip >> ../binaries/dom0-rootfs.cpio.gz
 cd ..
 
 
diff --git a/automation/scripts/xilinx-smoke-dom0-x86_64.sh b/automation/scripts/xilinx-smoke-dom0-x86_64.sh
index 4db249530823..52a0e05e3f1b 100755
--- a/automation/scripts/xilinx-smoke-dom0-x86_64.sh
+++ b/automation/scripts/xilinx-smoke-dom0-x86_64.sh
@@ -80,6 +80,7 @@ argo-exec -l -p 28333 -- /bin/echo
 "
 copy_dom0_files ()
 {
+    mkdir -p root usr/local/lib
     cp "${WORKDIR}/binaries/xen-argo.ko" "root/"
     cp -ar "${WORKDIR}/binaries/lib/"* "usr/local/lib/"
     cp "${WORKDIR}/binaries/argo-exec" "usr/local/bin/"
@@ -92,9 +93,8 @@ fi
 # Set up domU rootfs.
 mkdir -p rootfs
 cd rootfs
-tar xzf ../binaries/initrd.tar.gz
 mkdir proc run srv sys
-rm var/run
+mkdir -p etc/local.d
 echo "#!/bin/sh
 set -x
 export LD_LIBRARY_PATH=/usr/local/lib
@@ -102,23 +102,22 @@ PATH=/usr/local/bin:/usr/local/sbin:\$PATH
 ${DOMU_CMD}
 " > etc/local.d/xen.start
 chmod +x etc/local.d/xen.start
-echo "rc_verbose=yes" >> etc/rc.conf
 echo "domU Welcome to Alpine Linux 3.18
 Kernel \r on an \m (\l)
 
 " > etc/issue
 copy_domU_files
-find . | cpio -H newc -o | gzip > ../binaries/domU-rootfs.cpio.gz
+cp ../binaries/initrd.cpio.gz ../binaries/domU-rootfs.cpio.gz
+find . | cpio -H newc -o | gzip >> ../binaries/domU-rootfs.cpio.gz
 cd ..
 rm -rf rootfs
 
 # Set up dom0 rootfs.
 mkdir -p rootfs
 cd rootfs
-tar xzf ../binaries/initrd.tar.gz
 mkdir boot proc run srv sys
-rm var/run
 cp -ar ../binaries/dist/install/* .
+mkdir -p etc/local.d
 echo "#!/bin/bash
 set -x
 export LD_LIBRARY_PATH=/usr/local/lib
@@ -127,14 +126,14 @@ ${DOM0_CMD}
 " > etc/local.d/xen.start
 chmod +x etc/local.d/xen.start
 echo "${DOMU_CFG}${DOMU_CFG_EXTRA}" > etc/xen/domU.cfg
-echo "rc_verbose=yes" >> etc/rc.conf
 echo "XENCONSOLED_TRACE=all" >> etc/default/xencommons
 echo "QEMU_XEN=/bin/false" >> etc/default/xencommons
 mkdir -p var/log/xen/console
 cp ../binaries/bzImage boot/vmlinuz
 cp ../binaries/domU-rootfs.cpio.gz boot/initrd-domU
 copy_dom0_files
-find . | cpio -H newc -o | gzip > ../binaries/dom0-rootfs.cpio.gz
+cp ../binaries/rootfs.cpio.gz ../binaries/dom0-rootfs.cpio.gz
+find . | cpio -H newc -o | gzip >> ../binaries/dom0-rootfs.cpio.gz
 cd ..
 
 # Load software into TFTP server directory.
diff --git a/automation/scripts/xilinx-smoke-dom0less-arm64.sh b/automation/scripts/xilinx-smoke-dom0less-arm64.sh
index 3e1fcf6bf93c..97190d0cbb9c 100755
--- a/automation/scripts/xilinx-smoke-dom0less-arm64.sh
+++ b/automation/scripts/xilinx-smoke-dom0less-arm64.sh
@@ -41,33 +41,31 @@ fi
 # DomU
 mkdir -p rootfs
 cd rootfs
-tar xzf ../binaries/initrd.tar.gz
 mkdir proc
 mkdir run
 mkdir srv
 mkdir sys
-rm var/run
+mkdir -p etc/local.d
 echo "#!/bin/sh
 
 ${domU_check}
 /bin/sh" > etc/local.d/xen.start
 chmod +x etc/local.d/xen.start
-echo "rc_verbose=yes" >> etc/rc.conf
-find . | cpio -H newc -o | gzip > ../binaries/domU-rootfs.cpio.gz
+cp ../binaries/rootfs.cpio.gz ../binaries/domU-rootfs.cpio.gz
+find . | cpio -H newc -o | gzip >> ../binaries/domU-rootfs.cpio.gz
 cd ..
 rm -rf rootfs
 
 # DOM0 rootfs
 mkdir -p rootfs
 cd rootfs
-tar xzf ../binaries/initrd.tar.gz
 mkdir proc
 mkdir run
 mkdir srv
 mkdir sys
-rm var/run
 cp -ar ../binaries/dist/install/* .
 
+mkdir -p etc/local.d
 echo "#!/bin/bash
 
 export LD_LIBRARY_PATH=/usr/local/lib
@@ -78,8 +76,8 @@ bash /etc/init.d/xencommons start
 ${dom0_check}
 " > etc/local.d/xen.start
 chmod +x etc/local.d/xen.start
-echo "rc_verbose=yes" >> etc/rc.conf
-find . | cpio -H newc -o | gzip > ../binaries/dom0-rootfs.cpio.gz
+cp ../binaries/rootfs.cpio.gz ../binaries/dom0-rootfs.cpio.gz
+find . | cpio -H newc -o | gzip >> ../binaries/dom0-rootfs.cpio.gz
 cd ..
 
 
-- 
git-series 0.9.1


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Feedback-ID: i1568416f:Fastmail
From: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
To: xen-devel@lists.xenproject.org
Cc: Andrew Cooper ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Doug Goldstein ,
	Stefano Stabellini 
Subject: [PATCH v3 7/7] CI: save toolstack artifact as cpio.gz
Date: Fri, 11 Apr 2025 22:32:19 +0200
Message-ID: 
X-Mailer: git-send-email 2.48.1
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This avoids the need to re-compress it in every test job.

Signed-off-by: Marek Marczykowski-Górecki 
---
New in v2
---
 automation/scripts/build                          | 2 +-
 automation/scripts/qemu-alpine-x86_64.sh          | 2 +-
 automation/scripts/qemu-smoke-dom0-arm64.sh       | 2 +-
 automation/scripts/qemu-smoke-dom0less-arm64.sh   | 2 +-
 automation/scripts/qubes-x86-64.sh                | 4 +++-
 automation/scripts/xilinx-smoke-dom0-x86_64.sh    | 4 ++--
 automation/scripts/xilinx-smoke-dom0less-arm64.sh | 2 +-
 7 files changed, 10 insertions(+), 8 deletions(-)

diff --git a/automation/scripts/build b/automation/scripts/build
index 522efe774ef3..365534895047 100755
--- a/automation/scripts/build
+++ b/automation/scripts/build
@@ -108,7 +108,7 @@ else
     # Note: Some smoke tests depending on finding binaries/xen on a full build
     # even though dist/ contains everything, while some containers don't even
     # build Xen
-    cp -r dist binaries/
+    (cd dist/install; find | cpio -o -H newc | gzip) > binaries/toolstack.cpio.gz
     cp -r tools/tests binaries/
     collect_xen_artefacts
 fi
diff --git a/automation/scripts/qemu-alpine-x86_64.sh b/automation/scripts/qemu-alpine-x86_64.sh
index 6e0a67b4018c..746fd48e6a0e 100755
--- a/automation/scripts/qemu-alpine-x86_64.sh
+++ b/automation/scripts/qemu-alpine-x86_64.sh
@@ -35,7 +35,6 @@ mkdir proc
 mkdir run
 mkdir srv
 mkdir sys
-cp -ar ../dist/install/* .
 mkdir -p root etc/local.d
 mv ../initrd.cpio.gz ./root
 cp ../bzImage ./root
@@ -61,6 +60,7 @@ xl -vvv create -c /root/test.cfg
 chmod +x etc/local.d/xen.start
 # rebuild Dom0 rootfs
 cp ../rootfs.cpio.gz ../xen-rootfs.cpio.gz
+cat ../toolstack.cpio.gz >> ../xen-rootfs.cpio.gz
 find . |cpio -H newc -o|gzip >> ../xen-rootfs.cpio.gz
 cd ../..
 
diff --git a/automation/scripts/qemu-smoke-dom0-arm64.sh b/automation/scripts/qemu-smoke-dom0-arm64.sh
index 86047ccd9e7b..a3f321b253e2 100755
--- a/automation/scripts/qemu-smoke-dom0-arm64.sh
+++ b/automation/scripts/qemu-smoke-dom0-arm64.sh
@@ -33,7 +33,6 @@ mkdir proc
 mkdir run
 mkdir srv
 mkdir sys
-cp -ar ../dist/install/* .
 mkdir -p etc/local.d root
 mv ../initrd.cpio.gz ./root
 cp ../Image ./root
@@ -56,6 +55,7 @@ xl -vvv create -c /root/test.cfg
 " > etc/local.d/xen.start
 chmod +x etc/local.d/xen.start
 cp ../rootfs.cpio.gz ../xen-rootfs.cpio.gz
+cat ../toolstack.cpio.gz >> ../xen-rootfs.cpio.gz
 find . |cpio -H newc -o|gzip >> ../xen-rootfs.cpio.gz
 cd ../..
 
diff --git a/automation/scripts/qemu-smoke-dom0less-arm64.sh b/automation/scripts/qemu-smoke-dom0less-arm64.sh
index b095a5008e30..a73cb24b7e52 100755
--- a/automation/scripts/qemu-smoke-dom0less-arm64.sh
+++ b/automation/scripts/qemu-smoke-dom0less-arm64.sh
@@ -121,7 +121,6 @@ mkdir proc
 mkdir run
 mkdir srv
 mkdir sys
-cp -ar ../binaries/dist/install/* .
 mkdir -p etc/local.d
 
 echo "#!/bin/bash
@@ -142,6 +141,7 @@ ${dom0_check}
 " > etc/local.d/xen.start
 chmod +x etc/local.d/xen.start
 cp ../binaries/rootfs.cpio.gz ../binaries/dom0-rootfs.cpio.gz
+cat ../binaries/toolstack.cpio.gz >> ../binaries/dom0-rootfs.cpio.gz
 find . | cpio -H newc -o | gzip >> ../binaries/dom0-rootfs.cpio.gz
 cd ..
 
diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh
index 99c2ece304f0..a9696d2168c3 100755
--- a/automation/scripts/qubes-x86-64.sh
+++ b/automation/scripts/qubes-x86-64.sh
@@ -198,7 +198,6 @@ mkdir run
 mkdir srv
 mkdir sys
 mkdir -p etc/local.d
-cp -ar ../binaries/dist/install/* .
 cp -ar ../binaries/tests .
 cp -a ../automation/scripts/run-tools-tests tests/
 
@@ -232,8 +231,10 @@ else
 fi
 
 chmod +x etc/local.d/xen.start
+mkdir -p etc/xen
 echo "$domU_config" > etc/xen/domU.cfg
 
+mkdir -p etc/default
 echo "XENCONSOLED_TRACE=all" >> etc/default/xencommons
 echo "QEMU_XEN=/bin/false" >> etc/default/xencommons
 mkdir -p var/log/xen/console
@@ -243,6 +244,7 @@ if [ -n "$domU_check" ]; then
 fi
 # take base initrd and append test-specific files
 cp ../binaries/rootfs.cpio.gz ../binaries/dom0-rootfs.cpio.gz
+cat ../binaries/toolstack.cpio.gz >> ../binaries/dom0-rootfs.cpio.gz
 find . | cpio -H newc -o | gzip >> ../binaries/dom0-rootfs.cpio.gz
 cd ..
 
diff --git a/automation/scripts/xilinx-smoke-dom0-x86_64.sh b/automation/scripts/xilinx-smoke-dom0-x86_64.sh
index 52a0e05e3f1b..40f23f29582e 100755
--- a/automation/scripts/xilinx-smoke-dom0-x86_64.sh
+++ b/automation/scripts/xilinx-smoke-dom0-x86_64.sh
@@ -116,8 +116,7 @@ rm -rf rootfs
 mkdir -p rootfs
 cd rootfs
 mkdir boot proc run srv sys
-cp -ar ../binaries/dist/install/* .
-mkdir -p etc/local.d
+mkdir -p etc/local.d etc/xen etc/default
 echo "#!/bin/bash
 set -x
 export LD_LIBRARY_PATH=/usr/local/lib
@@ -133,6 +132,7 @@ cp ../binaries/bzImage boot/vmlinuz
 cp ../binaries/domU-rootfs.cpio.gz boot/initrd-domU
 copy_dom0_files
 cp ../binaries/rootfs.cpio.gz ../binaries/dom0-rootfs.cpio.gz
+cat ../binaries/toolstack.cpio.gz >> ../binaries/dom0-rootfs.cpio.gz
 find . | cpio -H newc -o | gzip >> ../binaries/dom0-rootfs.cpio.gz
 cd ..
 
diff --git a/automation/scripts/xilinx-smoke-dom0less-arm64.sh b/automation/scripts/xilinx-smoke-dom0less-arm64.sh
index 97190d0cbb9c..ab9205f29689 100755
--- a/automation/scripts/xilinx-smoke-dom0less-arm64.sh
+++ b/automation/scripts/xilinx-smoke-dom0less-arm64.sh
@@ -63,7 +63,6 @@ mkdir proc
 mkdir run
 mkdir srv
 mkdir sys
-cp -ar ../binaries/dist/install/* .
 
 mkdir -p etc/local.d
 echo "#!/bin/bash
@@ -77,6 +76,7 @@ ${dom0_check}
 " > etc/local.d/xen.start
 chmod +x etc/local.d/xen.start
 cp ../binaries/rootfs.cpio.gz ../binaries/dom0-rootfs.cpio.gz
+cat ../binaries/toolstack.cpio.gz >> ../binaries/dom0-rootfs.cpio.gz
 find . | cpio -H newc -o | gzip >> ../binaries/dom0-rootfs.cpio.gz
 cd ..
 
-- 
git-series 0.9.1


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Feedback-ID: i1568416f:Fastmail
From: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
To: xen-devel@lists.xenproject.org
Cc: Andrew Cooper ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH test-artifacts v3 8/7] Enable CONFIG_USB_RTL8152 in kernel for hw12 runner
Date: Fri, 11 Apr 2025 22:32:20 +0200
Message-ID: <20250411203336.585215-1-marmarek@invisiblethingslab.com>
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It uses this USB network interface.

Signed-off-by: Marek Marczykowski-Górecki 
---
 scripts/build-linux.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/scripts/build-linux.sh b/scripts/build-linux.sh
index 49b5ebe..af684d6 100755
--- a/scripts/build-linux.sh
+++ b/scripts/build-linux.sh
@@ -32,6 +32,7 @@ case $UNAME in
             | grep 'XEN' \
             | grep '=m' \
             | sed 's/=m/=y/g' >> .config
+        ./scripts/config --enable USB_RTL8152
         ;;
 
     aarch64)
-- 
2.48.1



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Subject: Re: [PATCH v3 1/7] CI: wait for Xen to start before waiting for test
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To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 , xen-devel@lists.xenproject.org
Cc: Doug Goldstein ,
 Stefano Stabellini 
References: 
 <3f1ef15b54a84573576e647314ec61ea43d4e3af.1744403499.git-series.marmarek@invisiblethingslab.com>
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In-Reply-To: <3f1ef15b54a84573576e647314ec61ea43d4e3af.1744403499.git-series.marmarek@invisiblethingslab.com>
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On 11/04/2025 9:32 pm, Marek Marczykowski-Górecki wrote:
> Add additional stage in console output parsing - wait for first message
> from Xen. The message is defined via BOOT_MSG variable. This has two
> effects:
> - distinguishes failing Xen to load at all from later test failures
> - resets timeout when Xen starts loading
>
> The latter is especially relevant for hardware tests where firmware +
> network boot may take some time before Xen starts booting. The two-stage
> timeout is more robust solution than increasing the overall timeout.
> The issue has been observed on some dom0pvh-hvm jobs, at least on
> runners hw3 and hw11. This patch is a first stage before qubes-x86-64.sh
> is switched to use expect in the next stage.
>
> While at it, consistently use 'expect -re' for all matches. This
> especially allows matching newlines ("\n"), which will become relevant
> in the next patch. And document variables used in console.exp.
>
> Signed-off-by: Marek Marczykowski-Górecki 

Reviewed-by: Andrew Cooper 


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Subject: Re: [PATCH v3 2/7] CI: fix waiting for final test message
To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
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 Stefano Stabellini 
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On 11/04/2025 9:32 pm, Marek Marczykowski-Górecki wrote:
> Expect normally discards initial part of its buffer after matching the
> patter, before looking for the next one. If both PASSED and LOG_MSG
> happen to be in the buffer at the same time, depending on their order,
> only one will be matched and the waiting for the other will timeout.
> Example expect -d output of this happening (parts eclipsed for brevity):
>
>     expect: does "\r\r\r\nWelcome to Alpine Linux 3.18\r\r\r\n...\r\r\r\r\n(domU) + echo 'pci test passed'\r\r\r\r\n(domU) pci test passed\r\r\r\r..." (spawn_id exp4) match regular expression "pci test passed"? Gate "pci test passed"? gate=yes re=yes
>     ...
>     Gate keeper glob pattern for '\nWelcome to Alpine Linux' is '
>     Welcome to Alpine Linux'. Activating booster.
>     expect: does "'\r\r\r\r\n(domU) pci test passed\r\r\r\r\n(domU)  [ ok ]\r\r\r\r\n(domU)  [ ok ]\r\r\r\r\n(domU) \r\r\r\r\r\n(domU) domU Welcome to Alpine Linux 3.18\r\r\r\r\n(domU) \rKernel 6.6.56 on an x86_64 (/dev/hvc0)\r\r\r\r\n(domU) \r\r\r\r\r\n" (spawn_id exp4) match regular expression "\nWelcome to Alpine Linux"? Gate "\nWelcome to Alpine Linux"? gate=no
>
> Fix this by using -notransfer flag to keep matched part in the buffer.
>
> Signed-off-by: Marek Marczykowski-Górecki 

Acked-by: Andrew Cooper 


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Date: Fri, 11 Apr 2025 21:40:31 +0100
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Subject: Re: [PATCH v3 3/7] CI: switch qubes runners to use console.exp
To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 , xen-devel@lists.xenproject.org
Cc: Doug Goldstein ,
 Stefano Stabellini 
References: 
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On 11/04/2025 9:32 pm, Marek Marczykowski-Górecki wrote:
> diff --git a/automation/scripts/console.exp b/automation/scripts/console.exp
> index 834a08db1b95..bdb1dd982003 100755
> --- a/automation/scripts/console.exp
> +++ b/automation/scripts/console.exp
> @@ -45,6 +49,15 @@ if {[info exists env(BOOT_MSG)]} {
>      expect -re "$env(BOOT_MSG)"
>  }
>  
> +if {[info exists env(WAKEUP_CMD)]} {
> +    expect -re "$env(SUSPEND_MSG)"
> +
> +    # keep it suspended a bit, then wakeup
> +    sleep 30

Do we need 30s here?  Couldn't we get away with 10?

Either way, Acked-by: Andrew Cooper 


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Date: Fri, 11 Apr 2025 22:43:09 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: xen-devel@lists.xenproject.org, Doug Goldstein ,
	Stefano Stabellini 
Subject: Re: [PATCH v3 3/7] CI: switch qubes runners to use console.exp
Message-ID: 
References: 
 <668fb90bbc5e418f6aea85e81d90343d834a066f.1744403499.git-series.marmarek@invisiblethingslab.com>
 
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Date: Fri, 11 Apr 2025 22:43:09 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: xen-devel@lists.xenproject.org, Doug Goldstein ,
	Stefano Stabellini 
Subject: Re: [PATCH v3 3/7] CI: switch qubes runners to use console.exp

On Fri, Apr 11, 2025 at 09:40:31PM +0100, Andrew Cooper wrote:
> On 11/04/2025 9:32 pm, Marek Marczykowski-G=C3=B3recki wrote:
> > diff --git a/automation/scripts/console.exp b/automation/scripts/consol=
e.exp
> > index 834a08db1b95..bdb1dd982003 100755
> > --- a/automation/scripts/console.exp
> > +++ b/automation/scripts/console.exp
> > @@ -45,6 +49,15 @@ if {[info exists env(BOOT_MSG)]} {
> >      expect -re "$env(BOOT_MSG)"
> >  }
> > =20
> > +if {[info exists env(WAKEUP_CMD)]} {
> > +    expect -re "$env(SUSPEND_MSG)"
> > +
> > +    # keep it suspended a bit, then wakeup
> > +    sleep 30
>=20
> Do we need 30s here?=C2=A0 Couldn't we get away with 10?

I want to be absolutely sure it got suspended (target system actually
suspends only after printing the message), and I've seen some drivers
taking a bit more time...

> Either way, Acked-by: Andrew Cooper 

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Date: Fri, 11 Apr 2025 13:50:45 -0700
From: "H. Peter Anvin" 
To: Xin Li , Sean Christopherson 
CC: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
        linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
        linux-edac@vger.kernel.org, kvm@vger.kernel.org,
        xen-devel@lists.xenproject.org, linux-ide@vger.kernel.org,
        linux-pm@vger.kernel.org, bpf@vger.kernel.org, llvm@lists.linux.dev,
        tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, jgross@suse.com,
        andrew.cooper3@citrix.com, peterz@infradead.org, acme@kernel.org,
        namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
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        boris.ostrovsky@oracle.com, kys@microsoft.com, haiyangz@microsoft.com,
        decui@microsoft.com
Subject: =?US-ASCII?Q?Re=3A_=5BRFC_PATCH_v1_10/15=5D_KVM=3A_VMX=3A_Use_WR?=
 =?US-ASCII?Q?MSRNS_or_its_immediate_form_when_available?=
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On April 11, 2025 9:18:08 AM PDT, Xin Li  wrote:
>On 4/10/2025 4:24 PM, Sean Christopherson wrote:
>>> +/*
>>> + * Write EAX to MSR_IA32_SPEC_CTRL=2E
>>> + *
>>> + * Choose the best WRMSR instruction based on availability=2E
>>> + *
>>> + * Replace with 'wrmsrns' and 'wrmsrns %rax, $MSR_IA32_SPEC_CTRL' onc=
e binutils support them=2E
>>> + */
>>> +=2Emacro WRITE_EAX_TO_MSR_IA32_SPEC_CTRL
>>> +	ALTERNATIVE_2 __stringify(mov $MSR_IA32_SPEC_CTRL, %ecx;		\
>>> +				  xor %edx, %edx;				\
>>> +				  mov %edi, %eax;				\
>>> +				  ds wrmsr),					\
>>> +		      __stringify(mov $MSR_IA32_SPEC_CTRL, %ecx;		\
>>> +				  xor %edx, %edx;				\
>>> +				  mov %edi, %eax;				\
>>> +				  ASM_WRMSRNS),					\
>>> +		      X86_FEATURE_WRMSRNS,					\
>>> +		      __stringify(xor %_ASM_AX, %_ASM_AX;			\
>>> +				  mov %edi, %eax;				\
>>> +				  ASM_WRMSRNS_RAX; =2Elong MSR_IA32_SPEC_CTRL),	\
>>> +		      X86_FEATURE_MSR_IMM
>>> +=2Eendm
>> This is quite hideous=2E  I have no objection to optimizing __vmx_vcpu_=
run(), but
>> I would much prefer that a macro like this live in generic code, and th=
at it be
>> generic=2E  It should be easy enough to provide an assembly friendly eq=
uivalent to
>> __native_wrmsr_constant()=2E
>
>Will do=2E

This should be coming anyway, right?


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Subject: Re: [PATCH v3 4/7] CI: write whole etc/issue for domU initrd
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Cc: Doug Goldstein ,
 Stefano Stabellini 
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In-Reply-To: <526ec153b1cabc1d5b111be27ded8d0d4da5178a.1744403499.git-series.marmarek@invisiblethingslab.com>
Content-Type: text/plain; charset=UTF-8
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On 11/04/2025 9:32 pm, Marek Marczykowski-Górecki wrote:
> diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh
> index 861e302d845b..dd88a1398f2b 100755
> --- a/automation/scripts/qubes-x86-64.sh
> +++ b/automation/scripts/qubes-x86-64.sh
> @@ -182,7 +182,10 @@ ${domU_check}
>  " > etc/local.d/xen.start
>      chmod +x etc/local.d/xen.start
>      echo "rc_verbose=yes" >> etc/rc.conf
> -    sed -i -e 's/^Welcome/domU \0/' etc/issue
> +    echo "domU Welcome to Alpine Linux 3.18

This 3.18 is going to go stale shortly.

Because of LOG_MSG="Welcome to Alpine Linux", the version doesn't matter.

Alpine does have /etc/os-release, but busybox's getty doesn't translate
\S. 
https://github.com/brgl/busybox/blob/abbf17abccbf832365d9acf1c280369ba7d5f8b2/libbb/login.c#L84-L86

I'd suggest just dropping the 3.18.

Otherwise, Reviewed-by: Andrew Cooper 


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In-Reply-To: 
From: Jim Mattson 
Date: Fri, 11 Apr 2025 14:12:27 -0700
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Message-ID: 
Subject: Re: [RFC PATCH v1 10/15] KVM: VMX: Use WRMSRNS or its immediate form
 when available
To: Sean Christopherson 
Cc: "Xin Li (Intel)" , linux-kernel@vger.kernel.org, 
	linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org, 
	virtualization@lists.linux.dev, linux-edac@vger.kernel.org, 
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	namhyung@kernel.org, mark.rutland@arm.com, alexander.shishkin@linux.intel.com, 
	jolsa@kernel.org, irogers@google.com, adrian.hunter@intel.com, 
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	alexey.amakhalov@broadcom.com, bcm-kernel-feedback-list@broadcom.com, 
	tony.luck@intel.com, pbonzini@redhat.com, vkuznets@redhat.com, 
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	haiyangz@microsoft.com, decui@microsoft.com
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On Thu, Apr 10, 2025 at 4:24=E2=80=AFPM Sean Christopherson  wrote:
>
> On Mon, Mar 31, 2025, Xin Li (Intel) wrote:
> > Signed-off-by: Xin Li (Intel) 
> > ---
> >  arch/x86/include/asm/msr-index.h |  6 ++++++
> >  arch/x86/kvm/vmx/vmenter.S       | 28 ++++++++++++++++++++++++----
> >  2 files changed, 30 insertions(+), 4 deletions(-)
> >
> > diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/ms=
r-index.h
> > index e6134ef2263d..04244c3ba374 100644
> > --- a/arch/x86/include/asm/msr-index.h
> > +++ b/arch/x86/include/asm/msr-index.h
> > @@ -1226,4 +1226,10 @@
> >                                               * a #GP
> >                                               */
> >
> > +/* Instruction opcode for WRMSRNS supported in binutils >=3D 2.40 */
> > +#define ASM_WRMSRNS          _ASM_BYTES(0x0f,0x01,0xc6)
> > +
> > +/* Instruction opcode for the immediate form RDMSR/WRMSRNS */
> > +#define ASM_WRMSRNS_RAX              _ASM_BYTES(0xc4,0xe7,0x7a,0xf6,0x=
c0)
> > +
> >  #endif /* _ASM_X86_MSR_INDEX_H */
> > diff --git a/arch/x86/kvm/vmx/vmenter.S b/arch/x86/kvm/vmx/vmenter.S
> > index f6986dee6f8c..9fae43723c44 100644
> > --- a/arch/x86/kvm/vmx/vmenter.S
> > +++ b/arch/x86/kvm/vmx/vmenter.S
> > @@ -64,6 +64,29 @@
> >       RET
> >  .endm
> >
> > +/*
> > + * Write EAX to MSR_IA32_SPEC_CTRL.
> > + *
> > + * Choose the best WRMSR instruction based on availability.
> > + *
> > + * Replace with 'wrmsrns' and 'wrmsrns %rax, $MSR_IA32_SPEC_CTRL' once=
 binutils support them.
> > + */
> > +.macro WRITE_EAX_TO_MSR_IA32_SPEC_CTRL
> > +     ALTERNATIVE_2 __stringify(mov $MSR_IA32_SPEC_CTRL, %ecx;         =
       \
> > +                               xor %edx, %edx;                        =
       \
> > +                               mov %edi, %eax;                        =
       \
> > +                               ds wrmsr),                             =
       \
> > +                   __stringify(mov $MSR_IA32_SPEC_CTRL, %ecx;         =
       \
> > +                               xor %edx, %edx;                        =
       \
> > +                               mov %edi, %eax;                        =
       \
> > +                               ASM_WRMSRNS),                          =
       \
> > +                   X86_FEATURE_WRMSRNS,                               =
       \
> > +                   __stringify(xor %_ASM_AX, %_ASM_AX;                =
       \
> > +                               mov %edi, %eax;                        =
       \
> > +                               ASM_WRMSRNS_RAX; .long MSR_IA32_SPEC_CT=
RL),   \
> > +                   X86_FEATURE_MSR_IMM
> > +.endm
>
> This is quite hideous.  I have no objection to optimizing __vmx_vcpu_run(=
), but
> I would much prefer that a macro like this live in generic code, and that=
 it be
> generic.  It should be easy enough to provide an assembly friendly equiva=
lent to
> __native_wrmsr_constant().

Surely, any CPU that has WRMSRNS also supports "Virtualize
IA32_SPEC_CTRL," right? Shouldn't we be using that feature rather than
swapping host and guest values with some form of WRMSR?

> > +
> >  .section .noinstr.text, "ax"
> >
> >  /**
> > @@ -123,10 +146,7 @@ SYM_FUNC_START(__vmx_vcpu_run)
> >       movl PER_CPU_VAR(x86_spec_ctrl_current), %esi
> >       cmp %edi, %esi
> >       je .Lspec_ctrl_done
> > -     mov $MSR_IA32_SPEC_CTRL, %ecx
> > -     xor %edx, %edx
> > -     mov %edi, %eax
> > -     wrmsr
> > +     WRITE_EAX_TO_MSR_IA32_SPEC_CTRL
> >
> >  .Lspec_ctrl_done:
> >
> > --
> > 2.49.0
> >
>


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Subject: Re: [PATCH] Package microcode for the x86 hardware runners
To: Andrew Cooper , Xen-devel
	
CC: Anthony PERARD , Stefano Stabellini
	, Michal Orzel , Doug Goldstein
	, =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
	
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On 2025-04-11 15:59, Andrew Cooper wrote:
> They are all out of date, to different degrees.
> 
> Install jq into the x86_64 build container so we can parse the Github latest
> release information in an acceptable way.
> 
> The resulting archive must be uncompressed, in order to work during early
> boot.
> 
> Signed-off-by: Andrew Cooper 

Reviewed-by: Jason Andryuk 


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Date: Sat, 12 Apr 2025 00:52:10 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: xen-devel@lists.xenproject.org, Doug Goldstein ,
	Stefano Stabellini 
Subject: Re: [PATCH v3 4/7] CI: write whole etc/issue for domU initrd
Message-ID: 
References: 
 <526ec153b1cabc1d5b111be27ded8d0d4da5178a.1744403499.git-series.marmarek@invisiblethingslab.com>
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Date: Sat, 12 Apr 2025 00:52:10 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: xen-devel@lists.xenproject.org, Doug Goldstein ,
	Stefano Stabellini 
Subject: Re: [PATCH v3 4/7] CI: write whole etc/issue for domU initrd

On Fri, Apr 11, 2025 at 10:07:28PM +0100, Andrew Cooper wrote:
> On 11/04/2025 9:32 pm, Marek Marczykowski-G=C3=B3recki wrote:
> > diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qu=
bes-x86-64.sh
> > index 861e302d845b..dd88a1398f2b 100755
> > --- a/automation/scripts/qubes-x86-64.sh
> > +++ b/automation/scripts/qubes-x86-64.sh
> > @@ -182,7 +182,10 @@ ${domU_check}
> >  " > etc/local.d/xen.start
> >      chmod +x etc/local.d/xen.start
> >      echo "rc_verbose=3Dyes" >> etc/rc.conf
> > -    sed -i -e 's/^Welcome/domU \0/' etc/issue
> > +    echo "domU Welcome to Alpine Linux 3.18
>=20
> This 3.18 is going to go stale shortly.
>=20
> Because of LOG_MSG=3D"Welcome to Alpine Linux", the version doesn't matte=
r.
>=20
> Alpine does have /etc/os-release, but busybox's getty doesn't translate
> \S.=C2=A0
> https://github.com/brgl/busybox/blob/abbf17abccbf832365d9acf1c280369ba7d5=
f8b2/libbb/login.c#L84-L86
>=20
> I'd suggest just dropping the 3.18.

Fine with me.

> Otherwise, Reviewed-by: Andrew Cooper 

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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On 4/11/2025 1:50 PM, H. Peter Anvin wrote:
>>> This is quite hideous.  I have no objection to optimizing __vmx_vcpu_run(), but
>>> I would much prefer that a macro like this live in generic code, and that it be
>>> generic.  It should be easy enough to provide an assembly friendly equivalent to
>>> __native_wrmsr_constant().
>> Will do.
> This should be coming anyway, right?

Absolutely.

Totally stupid me: we have it ready to use here, but ...



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Subject: Re: [RFC PATCH v1 10/15] KVM: VMX: Use WRMSRNS or its immediate form
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To: Jim Mattson , Sean Christopherson 
Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
        linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
        linux-edac@vger.kernel.org, kvm@vger.kernel.org,
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References: <20250331082251.3171276-1-xin@zytor.com>
 <20250331082251.3171276-11-xin@zytor.com> 
 
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On 4/11/2025 2:12 PM, Jim Mattson wrote:
> Surely, any CPU that has WRMSRNS also supports "Virtualize
> IA32_SPEC_CTRL," right? Shouldn't we be using that feature rather than
> swapping host and guest values with some form of WRMSR?

Good question, the simple answer is that they are irrelevant.


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Subject: Re: [PATCH v3 5/7] CI: avoid repacking initrd as part of the test job
To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 , xen-devel@lists.xenproject.org
Cc: Doug Goldstein ,
 Stefano Stabellini 
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On 11/04/2025 9:32 pm, Marek Marczykowski-Górecki wrote:
> The prerequisite for this is building rootfs.cpio.gz, not only
> initrd.tar.gz. That's a change in the test-artifacts repository in the
> "Rootfs generation" series from Andrew.
>
> Having that, do not repack the whole initrd, but only pack modified
> files and rely on Linux handling of concatenated archives.
> This allows packing just test-related files (which includes the whole
> toolstack), instead of the whole initrd.
>
> DomU initrd handling is a bit more complicated thing. It's sent to the
> target host as part of the dom0 initrd. For now include prepared domU
> initrd as a whole in dom0's rootfs "overlay", which means compressing it
> (again) each job (this takes 3s). This can be later improved by
> splitting domU initrd into two parts (base + overlay) and concatenate
> them in target dom0 already. For this to be useful, test-artifacts would
> need to provide pre-made double-cpio version too (rootfs.cpio.gz wrapper
> in yet another cpio.gz as boot/domU-initrd).
>
> Since full initrd is not unpacked now when preparing domU (and dom0)
> rootfs, a couple of minor changes are needed to how they are prepared.
> This includes creating whole etc/issue file, instead of modifying
> existing one, and a need to create a couple directories.
>
> Finally, move adding "rc_verbose=yes" to /etc/rc.conf to initrd
> building.
>
> Signed-off-by: Marek Marczykowski-Górecki 
> ---
> Changes in v3:
> - adjust for Andrew's version of cpio rootfs artifacts
> - don't require double-cpio archive for domU initrd, instead add it via
>   dom0 initrd as plain cpio to avoid re-compressing the same thing
> New in v2
>
> Jobs xilinx-* are untested, as I don't have necessary access.

I can test these.

> ---
>  automation/gitlab-ci/test.yaml                    |  6 +++--
>  automation/scripts/qemu-alpine-x86_64.sh          |  9 +++-----
>  automation/scripts/qemu-smoke-dom0-arm64.sh       |  7 ++----
>  automation/scripts/qemu-smoke-dom0less-arm64.sh   |  7 ++----
>  automation/scripts/qubes-x86-64.sh                | 18 +++++++---------
>  automation/scripts/xilinx-smoke-dom0-x86_64.sh    | 15 ++++++-------
>  automation/scripts/xilinx-smoke-dom0less-arm64.sh | 14 +++++-------
>  7 files changed, 35 insertions(+), 41 deletions(-)
>
> diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml
> index 59a2de28c864..3e02bf0e4d21 100644
> --- a/automation/gitlab-ci/test.yaml
> +++ b/automation/gitlab-ci/test.yaml
> @@ -11,7 +11,9 @@
>    - project: xen-project/hardware/test-artifacts
>      job: linux-6.6.86-arm64
>      ref: master
> -  - alpine-3.18-arm64-rootfs-export
> +  - project: xen-project/hardware/test-artifacts
> +    job: alpine-3.18-arm64-rootfs
> +    ref: master
>    - qemu-system-aarch64-6.0.0-arm64-export
>  
>  .arm32-test-needs: &arm32-test-needs
> @@ -22,7 +24,7 @@
>      job: linux-6.6.56-x86_64
>      ref: master
>    - project: xen-project/hardware/test-artifacts
> -    job: x86_64-rootfs-alpine-3.18
> +    job: alpine-3.18-x86_64-rootfs
>      ref: master
>  
>  .qemu-arm64:
> diff --git a/automation/scripts/qemu-alpine-x86_64.sh b/automation/scripts/qemu-alpine-x86_64.sh
> index 89bdb4df7dac..6e0a67b4018c 100755
> --- a/automation/scripts/qemu-alpine-x86_64.sh
> +++ b/automation/scripts/qemu-alpine-x86_64.sh

There are some very poor choices of name in this script.  I'll do a prep
patch to make them consistent.

> @@ -28,16 +28,15 @@ cd initrd
>  find . | cpio --create --format='newc' | gzip > ../initrd.cpio.gz
>  cd ..
>  
> -# initrd.tar.gz is Dom0 rootfs
> +# Dom0 rootfs - overlay on top of rootfs.cpio.gz
>  mkdir -p rootfs
>  cd rootfs
> -tar xvzf ../initrd.tar.gz
>  mkdir proc
>  mkdir run
>  mkdir srv
>  mkdir sys
> -rm var/run

I'm not sure why we need to make proc, run, srv, sys in the overlay
image, but this is repeated everywhere.

srv is just a plain empty dir.  It's missing from $PATHS in the rootfs
generation, so that's easy.

proc, run and sys are more complicated, because we don't want to simply
copy them from the rootfs generation environment.

dev is also in the same boat, and what we do now seems to cause openrc
not to seed it normally, which seems unwise.

I'll see what I can do to clean this all up.

> diff --git a/automation/scripts/xilinx-smoke-dom0-x86_64.sh b/automation/scripts/xilinx-smoke-dom0-x86_64.sh
> index 4db249530823..52a0e05e3f1b 100755
> --- a/automation/scripts/xilinx-smoke-dom0-x86_64.sh
> +++ b/automation/scripts/xilinx-smoke-dom0-x86_64.sh
> @@ -80,6 +80,7 @@ argo-exec -l -p 28333 -- /bin/echo
>  "
>  copy_dom0_files ()
>  {
> +    mkdir -p root usr/local/lib
>      cp "${WORKDIR}/binaries/xen-argo.ko" "root/"
>      cp -ar "${WORKDIR}/binaries/lib/"* "usr/local/lib/"
>      cp "${WORKDIR}/binaries/argo-exec" "usr/local/bin/"

This would be better based on top of my patch to switch to the new argo,
at which point it will simply be to append argo.cpio.gz.

~Andrew


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Date: Sat, 12 Apr 2025 16:19:15 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: xen-devel@lists.xenproject.org, Doug Goldstein ,
	Stefano Stabellini 
Subject: Re: [PATCH v3 5/7] CI: avoid repacking initrd as part of the test job
Message-ID: 
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Date: Sat, 12 Apr 2025 16:19:15 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: xen-devel@lists.xenproject.org, Doug Goldstein ,
	Stefano Stabellini 
Subject: Re: [PATCH v3 5/7] CI: avoid repacking initrd as part of the test job

On Sat, Apr 12, 2025 at 03:05:13PM +0100, Andrew Cooper wrote:
> On 11/04/2025 9:32 pm, Marek Marczykowski-G=C3=B3recki wrote:
> > @@ -28,16 +28,15 @@ cd initrd
> >  find . | cpio --create --format=3D'newc' | gzip > ../initrd.cpio.gz
> >  cd ..
> > =20
> > -# initrd.tar.gz is Dom0 rootfs
> > +# Dom0 rootfs - overlay on top of rootfs.cpio.gz
> >  mkdir -p rootfs
> >  cd rootfs
> > -tar xvzf ../initrd.tar.gz
> >  mkdir proc
> >  mkdir run
> >  mkdir srv
> >  mkdir sys
> > -rm var/run
>=20
> I'm not sure why we need to make proc, run, srv, sys in the overlay
> image, but this is repeated everywhere.
>=20
> srv is just a plain empty dir.=C2=A0 It's missing from $PATHS in the root=
fs
> generation, so that's easy.

srv is indeed likely not needed, but there is enough changes here
already.

> proc, run and sys are more complicated, because we don't want to simply
> copy them from the rootfs generation environment.

As for those mountpoints, they looks to be necessary - in a job that
failed to unpack this overlay part, openrc failed to mount those
filesystems and crashed rather badly (especially without /run...).
I'm not sure if that's something that is missing in the base archive, or
is a problem for another reason, but it seems to be necessary to have it
here, at least without changes elsewhere.
Looking at PATHS in alpine-rootfs.sh they may be simply skipped there.

> dev is also in the same boat, and what we do now seems to cause openrc
> not to seed it normally, which seems unwise.

It mounts devtmpfs there anyway, no?

> I'll see what I can do to clean this all up.
>=20
> > diff --git a/automation/scripts/xilinx-smoke-dom0-x86_64.sh b/automatio=
n/scripts/xilinx-smoke-dom0-x86_64.sh
> > index 4db249530823..52a0e05e3f1b 100755
> > --- a/automation/scripts/xilinx-smoke-dom0-x86_64.sh
> > +++ b/automation/scripts/xilinx-smoke-dom0-x86_64.sh
> > @@ -80,6 +80,7 @@ argo-exec -l -p 28333 -- /bin/echo
> >  "
> >  copy_dom0_files ()
> >  {
> > +    mkdir -p root usr/local/lib
> >      cp "${WORKDIR}/binaries/xen-argo.ko" "root/"
> >      cp -ar "${WORKDIR}/binaries/lib/"* "usr/local/lib/"
> >      cp "${WORKDIR}/binaries/argo-exec" "usr/local/bin/"
>=20
> This would be better based on top of my patch to switch to the new argo,
> at which point it will simply be to append argo.cpio.gz.
>=20
> ~Andrew

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Subject: Re: [PATCH v3 5/7] CI: avoid repacking initrd as part of the test job
To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
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On 11/04/2025 9:32 pm, Marek Marczykowski-Górecki wrote:
> The prerequisite for this is building rootfs.cpio.gz, not only
> initrd.tar.gz. That's a change in the test-artifacts repository in the
> "Rootfs generation" series from Andrew.
>
> Having that, do not repack the whole initrd, but only pack modified
> files and rely on Linux handling of concatenated archives.
> This allows packing just test-related files (which includes the whole
> toolstack), instead of the whole initrd.

It's probably worth saying ", fixed subsequently)" for the toolstack, as
it's the single largest aspect.

> DomU initrd handling is a bit more complicated thing. It's sent to the
> target host as part of the dom0 initrd. For now include prepared domU
> initrd as a whole in dom0's rootfs "overlay", which means compressing it
> (again) each job (this takes 3s). This can be later improved by
> splitting domU initrd into two parts (base + overlay) and concatenate
> them in target dom0 already. For this to be useful, test-artifacts would
> need to provide pre-made double-cpio version too (rootfs.cpio.gz wrapper
> in yet another cpio.gz as boot/domU-initrd).
>
> Since full initrd is not unpacked now when preparing domU (and dom0)
> rootfs, a couple of minor changes are needed to how they are prepared.
> This includes creating whole etc/issue file, instead of modifying
> existing one, and a need to create a couple directories.
>
> Finally, move adding "rc_verbose=yes" to /etc/rc.conf to initrd
> building.

These two paragraphs are a little stale now.  etc/issue has already been
committed, and there's no initd building now I've moved arm into test
artefacts.

However, they're going to need tweaking again if I can get the rootfs
generation working more nicely, so lets hold off for now.

>
> Signed-off-by: Marek Marczykowski-Górecki 
> ---
> Changes in v3:
> - adjust for Andrew's version of cpio rootfs artifacts
> - don't require double-cpio archive for domU initrd, instead add it via
>   dom0 initrd as plain cpio to avoid re-compressing the same thing
> New in v2
>
> Jobs xilinx-* are untested, as I don't have necessary access.
> ---
>  automation/gitlab-ci/test.yaml                    |  6 +++--
>  automation/scripts/qemu-alpine-x86_64.sh          |  9 +++-----
>  automation/scripts/qemu-smoke-dom0-arm64.sh       |  7 ++----
>  automation/scripts/qemu-smoke-dom0less-arm64.sh   |  7 ++----
>  automation/scripts/qubes-x86-64.sh                | 18 +++++++---------
>  automation/scripts/xilinx-smoke-dom0-x86_64.sh    | 15 ++++++-------
>  automation/scripts/xilinx-smoke-dom0less-arm64.sh | 14 +++++-------
>  7 files changed, 35 insertions(+), 41 deletions(-)

One thing that does matter now is the order of appending archives.

I've reworked this locally to be of the form:

# DomU rootfs
cp ../binaries/rootfs.cpio.gz ../binaries/domU-rootfs.cpio.gz

# test-local configuration
mkdir rootfs
...
find . | cpio -H newc -o | gzip >> ../binaries/domU-rootfs.cpio.gz


This then ends up looking rather more clean in followon patches, where
we end up with:

# Dom0 rootfs
cp ../binaries/ucode.cpio ../binaries/dom0-rootfs.cpio.gz
cat ../binaries/rootfs.cpio.gz >> ../binaries/dom0-rootfs.cpio.gz
cat ../binaries/toolstack.cpio.gz >> ../binaries/dom0-rootfs.cpio.gz
if [[ "${TEST}" == argo ]]; then
    cat ../binaries/argo.cpio.gz >> ../binaries/dom0-rootfs.cpio.gz
fi

# test-local configuration
...
find . | cpio -H newc -o | gzip >> ../binaries/dom0-rootfs.cpio.gz


> diff --git a/automation/scripts/xilinx-smoke-dom0-x86_64.sh b/automation/scripts/xilinx-smoke-dom0-x86_64.sh
> index 4db249530823..52a0e05e3f1b 100755
> --- a/automation/scripts/xilinx-smoke-dom0-x86_64.sh
> +++ b/automation/scripts/xilinx-smoke-dom0-x86_64.sh
> @@ -80,6 +80,7 @@ argo-exec -l -p 28333 -- /bin/echo
>  "
>  copy_dom0_files ()
>  {
> +    mkdir -p root usr/local/lib
>      cp "${WORKDIR}/binaries/xen-argo.ko" "root/"
>      cp -ar "${WORKDIR}/binaries/lib/"* "usr/local/lib/"
>      cp "${WORKDIR}/binaries/argo-exec" "usr/local/bin/"
> @@ -92,9 +93,8 @@ fi
>  # Set up domU rootfs.
>  mkdir -p rootfs
>  cd rootfs
> -tar xzf ../binaries/initrd.tar.gz
>  mkdir proc run srv sys
> -rm var/run
> +mkdir -p etc/local.d
>  echo "#!/bin/sh
>  set -x
>  export LD_LIBRARY_PATH=/usr/local/lib
> @@ -102,23 +102,22 @@ PATH=/usr/local/bin:/usr/local/sbin:\$PATH
>  ${DOMU_CMD}
>  " > etc/local.d/xen.start
>  chmod +x etc/local.d/xen.start
> -echo "rc_verbose=yes" >> etc/rc.conf
>  echo "domU Welcome to Alpine Linux 3.18
>  Kernel \r on an \m (\l)
>  
>  " > etc/issue
>  copy_domU_files
> -find . | cpio -H newc -o | gzip > ../binaries/domU-rootfs.cpio.gz
> +cp ../binaries/initrd.cpio.gz ../binaries/domU-rootfs.cpio.gz

Stray initrd.  Found while reworking.

I'll give the whole lot commit-by-commit full runs, when I'm done tinkering.

~Andrew


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Date: Sat, 12 Apr 2025 17:55:33 +0100
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Subject: Re: [PATCH v3 6/7] CI: remove now unused alpine-3.18-arm64-rootfs job
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To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 , xen-devel@lists.xenproject.org
Cc: Doug Goldstein ,
 Stefano Stabellini 
References: 
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In-Reply-To: <733860a00926d1d2d50e5914a783e5d777828442.1744403499.git-series.marmarek@invisiblethingslab.com>
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On 11/04/2025 9:32 pm, Marek Marczykowski-Górecki wrote:
> This got moved to test-artifacts.
>
> Signed-off-by: Marek Marczykowski-Górecki 

Reviewed-by: Andrew Cooper 


From xen-devel-bounces@lists.xenproject.org Sat Apr 12 23:11:41 2025
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Date: Sat, 12 Apr 2025 16:10:06 -0700
From: "H. Peter Anvin" 
To: Xin Li , Jim Mattson ,
        Sean Christopherson 
CC: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
        linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
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Subject: =?US-ASCII?Q?Re=3A_=5BRFC_PATCH_v1_10/15=5D_KVM=3A_VMX=3A_Use_WR?=
 =?US-ASCII?Q?MSRNS_or_its_immediate_form_when_available?=
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On April 11, 2025 9:32:32 PM PDT, Xin Li  wrote:
>On 4/11/2025 2:12 PM, Jim Mattson wrote:
>> Surely, any CPU that has WRMSRNS also supports "Virtualize
>> IA32_SPEC_CTRL," right? Shouldn't we be using that feature rather than
>> swapping host and guest values with some form of WRMSR?
>
>Good question, the simple answer is that they are irrelevant=2E

Also, *in this specific case* IA32_SPEC_CTRL is architecturally nonseriali=
zing, i=2Ee=2E WRMSR executes as WRMSRNS anyway=2E


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Feedback-ID: i1568416f:Fastmail
From: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
To: xen-devel@lists.xenproject.org
Cc: Andrew Cooper ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Doug Goldstein ,
	Stefano Stabellini 
Subject: [PATCH] CI: fix waiting for final test message (again)
Date: Sun, 13 Apr 2025 15:47:31 +0200
Message-ID: <20250413134826.1366350-1-marmarek@invisiblethingslab.com>
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The previous attempt has correct diagnosis, but added -notransfer flag
in a wrong place - it should be used in the first (outer) match out of
two, not the second (inner) one.

Fixes: 1e12cbd6af2c ("CI: fix waiting for final test message")
Signed-off-by: Marek Marczykowski-Górecki 
---
This actually fixes the issue described in the referenced commit. When
that issue happens, it can be seen as a complete console output (up to
Alpine login prompt), but test still failed.
But that is not all the issues, sometimes it hangs really in the middle
of dom0 boot, for example with last lines as:

    [    1.816052] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
    Poking KASLR using RDRAND RDTSC...
    [    1.818089] Dynamic Preempt: voluntary
    [    1.818251] rcu: Preemptible hierarchical RCU implementation.
    [    1.818254] rcu: 	RCU event tracing is ena

and sits there for over 120s.

It's unclear to me yet whether it's a real dom0 hang, or an issue with
grabbing console output. Debugging...
---
 automation/scripts/console.exp | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/automation/scripts/console.exp b/automation/scripts/console.exp
index bdb1dd982003..fc80513dfb35 100755
--- a/automation/scripts/console.exp
+++ b/automation/scripts/console.exp
@@ -60,12 +60,12 @@ if {[info exists env(WAKEUP_CMD)]} {
 
 if {[info exists env(LOG_MSG)]} {
     expect {
-        -re "$env(PASSED)" {
-            expect -notransfer -re "$env(LOG_MSG)"
+        -notransfer -re "$env(PASSED)" {
+            expect -re "$env(LOG_MSG)"
             exit 0
         }
-        -re "$env(LOG_MSG)" {
-            expect -notransfer -re "$env(PASSED)"
+        -notransfer -re "$env(LOG_MSG)" {
+            expect -re "$env(PASSED)"
             exit 0
         }
     }
-- 
2.48.1



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From: Elliott Mitchell 
To: Roger Pau =?iso-8859-1?Q?Monn=E9?= 
Cc: xen-devel@lists.xenproject.org, Jan Beulich ,
        Andrew Cooper 
Subject: Re: Serious AMD-Vi issue
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On Mon, Jan 27, 2025 at 10:44:33AM +0100, Roger Pau Monn wrote:
> On Fri, Jan 24, 2025 at 01:26:23PM -0800, Elliott Mitchell wrote:
> > 
> > In fact what seems a likely reproduction on Intel hardware is the Intel
> > sound card issue.  I notice that issue occurs when sound *starts*
> > playing.  When a sound device starts, its buffers would be empty and the
> > first DMA request would be turned around with minimal latency.  In such
> > case this matches the Samsung SATA devices handling DMA with low
> > latency.
> 
> Can you reproduce the data loss issue without using RAID in Linux?
> You can use fio with verify or similar to stress test it.

This seems rather unlikely.  The first reportter tried without software
RAID and didn't observe the issue.  If the problem occurred without
software RAID, there would be massive numbers of data loss reports.

> Can you reproduce if dom0 is PVH instead of PV?

Haven't gotten Domain 0 PVH to work yet.  I was planning to try again
when Debian updates to 4.20, but until then this isn't working.

> Can you reproduce with dom0-iommu=strict mode in the Xen command line?

Alas, this is now a definite "yes".  Took a bunch of waiting, but now
confirmed to occur with "dom0-iommu=strict".


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Subject: Re: [PATCH 2/5] xen/io: provide helpers for multi size MMIO accesses
To: Roger Pau Monne 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <20250411105411.22334-1-roger.pau@citrix.com>
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On 11.04.2025 12:54, Roger Pau Monne wrote:
> Several handlers have the same necessity of reading from an MMIO region
> using 1, 2, 4 or 8 bytes accesses.  So far this has been open-coded in the
> function itself.  Instead provide a new handler that encapsulates the
> accesses.
> 
> Since the added helpers are not architecture specific, introduce a new
> generic io.h header.

Except that ...

> --- /dev/null
> +++ b/xen/include/xen/io.h
> @@ -0,0 +1,63 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Generic helpers for doing MMIO accesses.
> + *
> + * Copyright (c) 2025 Cloud Software Group
> + */
> +#ifndef XEN_IO_H
> +#define XEN_IO_H
> +
> +#include 
> +
> +#include 
> +
> +static inline uint64_t read_mmio(const volatile void __iomem *mem,
> +                                 unsigned int size)
> +{
> +    switch ( size )
> +    {
> +    case 1:
> +        return readb(mem);
> +
> +    case 2:
> +        return readw(mem);
> +
> +    case 4:
> +        return readl(mem);
> +
> +    case 8:
> +        return readq(mem);

... this and ...

> +    }
> +
> +    ASSERT_UNREACHABLE();
> +    return ~0UL;
> +}
> +
> +static inline void write_mmio(volatile void __iomem *mem, uint64_t data,
> +                              unsigned int size)
> +{
> +    switch ( size )
> +    {
> +    case 1:
> +        writeb(data, mem);
> +        break;
> +
> +    case 2:
> +        writew(data, mem);
> +        break;
> +
> +    case 4:
> +        writel(data, mem);
> +        break;
> +
> +    case 8:
> +        writeq(data, mem);
> +        break;

... this may (generally will) not work on 32-bit architectures. Add
CONFIG_64BIT conditionals? At which point return type / last parameter
type could move from uint64_t to unsigned long.

As to the top comment of the file: io.h is, to me at least, wider than
just dealing with MMIO accesses. IOW I fear that sentence may go stale
at some point, without anyone paying attention.

Jan


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Date: Mon, 14 Apr 2025 08:33:44 +0200
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Subject: Re: [PATCH 3/5] x86/hvm: fix handling of accesses to partial r/o MMIO
 pages
To: Roger Pau Monne 
Cc: Andrew Cooper , xen-devel@lists.xenproject.org
References: <20250411105411.22334-1-roger.pau@citrix.com>
 <20250411105411.22334-4-roger.pau@citrix.com>
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From: Jan Beulich 
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On 11.04.2025 12:54, Roger Pau Monne wrote:
> The current logic to handle accesses to MMIO pages partially read-only is
> based on the (now removed) logic used to handle accesses to the r/o MMCFG
> region(s) for PVH v1 dom0.  However that has issues when running on AMD
> hardware, as in that case the guest linear address that triggered the fault
> is not provided as part of the VM exit.  This caused
> mmio_ro_emulated_write() to always fail before calling
> subpage_mmio_write_emulate() when running on AMD and called from an HVM
> context.
> 
> Take a different approach and convert the handling of partial read-only
> MMIO page accesses into an HVM MMIO ops handler, as that's the more natural
> way to handle this kind of emulation for HVM domains.
> 
> This allows getting rid of hvm_emulate_one_mmio() and it's single cal site
> in hvm_hap_nested_page_fault().
> 
> Note a small adjustment is needed to the `pf-fixup` dom0 PVH logic: avoid
> attempting to fixup faults resulting from accesses to read-only MMIO
> regions, as handling of those accesses is now done by handle_mmio().
> 
> Fixes: 33c19df9a5a0 ('x86/PCI: intercept accesses to RO MMIO from dom0s in HVM containers')
> Signed-off-by: Roger Pau Monné 
> ---
> The fixes tag is maybe a bit wonky, it's either this or:
> 
> 8847d6e23f97 ('x86/mm: add API for marking only part of a MMIO page read only')
> 
> However the addition of subpage r/o access handling to the existing
> mmio_ro_emulated_write() function was done based on the assumption that the
> current code was working - which turned out to not be the case for AMD,
> hence my preference for blaming the commit that actually introduced the
> broken logic.

I agree.

> ---
>  xen/arch/x86/hvm/emulate.c             | 47 +-------------
>  xen/arch/x86/hvm/hvm.c                 | 89 +++++++++++++++++++++++---

It's quite a bit of rather special code you add to this catch-all file. How
about introducing a small new one, e.g. mmio.c (to later maybe become home
to some further stuff)?

> --- a/xen/arch/x86/hvm/emulate.c
> +++ b/xen/arch/x86/hvm/emulate.c
> @@ -370,7 +370,8 @@ static int hvmemul_do_io(
>          /* If there is no suitable backing DM, just ignore accesses */
>          if ( !s )
>          {
> -            if ( is_mmio && is_hardware_domain(currd) )
> +            if ( is_mmio && is_hardware_domain(currd) &&
> +                 !rangeset_contains_singleton(mmio_ro_ranges, PFN_DOWN(addr)) )

I think this needs a brief comment - it otherwise looks misplaced here.

> @@ -585,9 +585,81 @@ static int cf_check hvm_print_line(
>      return X86EMUL_OKAY;
>  }
>  
> +static int cf_check subpage_mmio_accept(struct vcpu *v, unsigned long addr)
> +{
> +    p2m_type_t t;
> +    mfn_t mfn = get_gfn_query_unlocked(v->domain, addr, &t);
> +
> +    return !mfn_eq(mfn, INVALID_MFN) && t == p2m_mmio_direct &&
> +           !!subpage_mmio_find_page(mfn);

The !! isn't needed here, is it?

> +}
> +
> +static int cf_check subpage_mmio_read(
> +    struct vcpu *v, unsigned long addr, unsigned int len, unsigned long *data)
> +{
> +    struct domain *d = v->domain;
> +    p2m_type_t t;
> +    mfn_t mfn = get_gfn_query(d, addr, &t);
> +    struct subpage_ro_range *entry;
> +    volatile void __iomem *mem;
> +
> +    *data = ~0UL;
> +
> +    if ( mfn_eq(mfn, INVALID_MFN) || t != p2m_mmio_direct )
> +    {
> +        put_gfn(d, addr);
> +        return X86EMUL_RETRY;
> +    }
> +
> +    entry = subpage_mmio_find_page(mfn);
> +    if ( !entry )
> +    {
> +        put_gfn(d, addr);
> +        return X86EMUL_RETRY;
> +    }
> +
> +    mem = subpage_mmio_map_page(entry);
> +    if ( !mem )
> +    {
> +        put_gfn(d, addr);
> +        gprintk(XENLOG_ERR, "Failed to map page for MMIO read at %#lx\n",
> +                mfn_to_maddr(mfn) + PAGE_OFFSET(addr));

Makes me wonder whether the function parameter wouldn't better be named
"curr" and the local variable "currd", to reflect that this log message
will report appropriate context.

Would also logging the guest physical address perhaps be worthwhile here?

> +        return X86EMUL_OKAY;
> +    }
> +
> +    *data = read_mmio(mem + PAGE_OFFSET(addr), len);
> +
> +    put_gfn(d, addr);
> +    return X86EMUL_OKAY;
> +}
> +
> +static int cf_check subpage_mmio_write(
> +    struct vcpu *v, unsigned long addr, unsigned int len, unsigned long data)
> +{
> +    struct domain *d = v->domain;
> +    p2m_type_t t;
> +    mfn_t mfn = get_gfn_query(d, addr, &t);
> +
> +    if ( mfn_eq(mfn, INVALID_MFN) || t != p2m_mmio_direct )
> +    {
> +        put_gfn(d, addr);
> +        return X86EMUL_RETRY;
> +    }
> +
> +    subpage_mmio_write_emulate(mfn, PAGE_OFFSET(addr), data, len);
> +
> +    put_gfn(d, addr);
> +    return X86EMUL_OKAY;
> +}

Unlike the read path this doesn't return RETRY when subpage_mmio_find_page()
fails (indicating something must have changed after "accept" said yes).

> @@ -1981,7 +2056,9 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned long gla,
>       */
>      if ( (p2mt == p2m_mmio_dm) ||
>           (npfec.write_access &&
> -          (p2m_is_discard_write(p2mt) || (p2mt == p2m_ioreq_server))) )
> +          (p2m_is_discard_write(p2mt) || (p2mt == p2m_ioreq_server) ||
> +           /* MMIO entries can be r/o if the target mfn is in mmio_ro_ranges. */
> +           (p2mt == p2m_mmio_direct))) )
>      {
>          if ( !handle_mmio_with_translation(gla, gfn, npfec) )
>              hvm_inject_hw_exception(X86_EXC_GP, 0);

Aren't we handing too many things to handle_mmio_with_translation() this
way? At the very least you're losing ...

> @@ -2033,14 +2110,6 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned long gla,
>          goto out_put_gfn;
>      }
>  
> -    if ( (p2mt == p2m_mmio_direct) && npfec.write_access && npfec.present &&

... the .present check.

I'm also concerned of e.g. VT-x'es APIC access MFN, which is
p2m_mmio_direct.

Jan


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Subject: Re: [PATCH 4/5] x86/hvm: only register the r/o subpage ops when
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To: Roger Pau Monne 
Cc: Andrew Cooper , xen-devel@lists.xenproject.org
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On 11.04.2025 12:54, Roger Pau Monne wrote:
> MMIO operation handlers can be expensive to process, hence attempt to
> register only those that will be needed by the domain.
> 
> Subpage r/o MMIO regions are added exclusively at boot, further limit their
> addition to strictly before the initial domain gets created, so by the time
> initial domain creation happens Xen knows whether subpage is required or
> not.  This allows only registering the MMIO handler when there are
> subpage regions to handle.
> 
> Signed-off-by: Roger Pau Monné 

Reviewed-by: Jan Beulich 




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Subject: Re: [PATCH 5/5] x86/mm: move mmio_ro_emulated_write() to PV only file
To: Roger Pau Monne 
Cc: Andrew Cooper , xen-devel@lists.xenproject.org
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On 11.04.2025 12:54, Roger Pau Monne wrote:
> mmio_ro_emulated_write() is only used in pv/ro-page-fault.c, move the
> function to that file and make it static.
> 
> No functional change intended.
> 
> Signed-off-by: Roger Pau Monné 

Reviewed-by: Jan Beulich 
with ...

> --- a/xen/arch/x86/pv/ro-page-fault.c
> +++ b/xen/arch/x86/pv/ro-page-fault.c
> @@ -298,6 +298,14 @@ static int ptwr_do_page_fault(struct x86_emulate_ctxt *ctxt,
>   * fault handling for read-only MMIO pages
>   */
>  
> +struct mmio_ro_emulate_ctxt {
> +        unsigned long cr2;
> +        /* Used only for mmcfg case */
> +        unsigned int seg, bdf;
> +        /* Used only for non-mmcfg case */
> +        mfn_t mfn;

... the unnecessarily deep indentation corrected here.

Jan


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From: Penny Zheng 
To: 
CC: , Penny Zheng , Jan Beulich
	
Subject: [PATCH v4 01/15] xen/cpufreq: move "init" flag into common structure
Date: Mon, 14 Apr 2025 15:40:42 +0800
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AMD cpufreq cores will be intialized in two modes, legacy P-state mode,
and CPPC mode. So "init" flag shall be extracted from specific
"struct xen_processor_perf", and placed in the common
"struct processor_pminfo".

Signed-off-by: Penny Zheng 
---
v3 -> v4:
- new commit
---
 xen/drivers/acpi/pmstat.c                 | 4 ++--
 xen/drivers/cpufreq/cpufreq.c             | 8 ++++----
 xen/include/acpi/cpufreq/processor_perf.h | 4 ++--
 3 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/xen/drivers/acpi/pmstat.c b/xen/drivers/acpi/pmstat.c
index c51b9ca358..767594908c 100644
--- a/xen/drivers/acpi/pmstat.c
+++ b/xen/drivers/acpi/pmstat.c
@@ -68,7 +68,7 @@ int do_get_pm_info(struct xen_sysctl_get_pmstat *op)
             return -ENODEV;
         if ( hwp_active() )
             return -EOPNOTSUPP;
-        if ( !pmpt || !(pmpt->perf.init & XEN_PX_INIT) )
+        if ( !pmpt || !(pmpt->init & XEN_PX_INIT) )
             return -EINVAL;
         break;
     default:
@@ -463,7 +463,7 @@ int do_pm_op(struct xen_sysctl_pm_op *op)
     case CPUFREQ_PARA:
         if ( !(xen_processor_pmbits & XEN_PROCESSOR_PM_PX) )
             return -ENODEV;
-        if ( !pmpt || !(pmpt->perf.init & XEN_PX_INIT) )
+        if ( !pmpt || !(pmpt->init & XEN_PX_INIT) )
             return -EINVAL;
         break;
     }
diff --git a/xen/drivers/cpufreq/cpufreq.c b/xen/drivers/cpufreq/cpufreq.c
index 4a103c6de9..b01ed8e294 100644
--- a/xen/drivers/cpufreq/cpufreq.c
+++ b/xen/drivers/cpufreq/cpufreq.c
@@ -209,7 +209,7 @@ int cpufreq_add_cpu(unsigned int cpu)
 
     perf = &processor_pminfo[cpu]->perf;
 
-    if ( !(perf->init & XEN_PX_INIT) )
+    if ( !(processor_pminfo[cpu]->init & XEN_PX_INIT) )
         return -EINVAL;
 
     if (!cpufreq_driver.init)
@@ -367,7 +367,7 @@ int cpufreq_del_cpu(unsigned int cpu)
 
     perf = &processor_pminfo[cpu]->perf;
 
-    if ( !(perf->init & XEN_PX_INIT) )
+    if ( !(processor_pminfo[cpu]->init & XEN_PX_INIT) )
         return -EINVAL;
 
     if (!per_cpu(cpufreq_cpu_policy, cpu))
@@ -563,7 +563,7 @@ int set_px_pminfo(uint32_t acpi_id, struct xen_processor_performance *perf)
         if ( cpufreq_verbose )
             print_PPC(pxpt->platform_limit);
 
-        if ( pxpt->init == XEN_PX_INIT )
+        if ( pmpt->init == XEN_PX_INIT )
         {
             ret = cpufreq_limit_change(cpu);
             goto out;
@@ -572,7 +572,7 @@ int set_px_pminfo(uint32_t acpi_id, struct xen_processor_performance *perf)
 
     if ( perf->flags == ( XEN_PX_PCT | XEN_PX_PSS | XEN_PX_PSD | XEN_PX_PPC ) )
     {
-        pxpt->init = XEN_PX_INIT;
+        pmpt->init = XEN_PX_INIT;
 
         ret = cpufreq_cpu_init(cpu);
         goto out;
diff --git a/xen/include/acpi/cpufreq/processor_perf.h b/xen/include/acpi/cpufreq/processor_perf.h
index 301104e16f..5f2612b15a 100644
--- a/xen/include/acpi/cpufreq/processor_perf.h
+++ b/xen/include/acpi/cpufreq/processor_perf.h
@@ -29,14 +29,14 @@ struct processor_performance {
     struct xen_processor_px *states;
     struct xen_psd_package domain_info;
     uint32_t shared_type;
-
-    uint32_t init;
 };
 
 struct processor_pminfo {
     uint32_t acpi_id;
     uint32_t id;
     struct processor_performance    perf;
+
+    uint32_t init;
 };
 
 extern struct processor_pminfo *processor_pminfo[NR_CPUS];
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , Penny Zheng , Jan Beulich
	, Andrew Cooper , "Anthony
 PERARD" , Michal Orzel ,
	Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Stefano Stabellini 
Subject: [PATCH v4 02/15] xen/cpufreq: extract _PSD info from "struct xen_processor_performance"
Date: Mon, 14 Apr 2025 15:40:43 +0800
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Since we need to re-use _PSD info, containing "shared_type" and
"struct xen_psd_package", for CPPC mode, we move all
"#define XEN_CPUPERF_SHARED_TYPE_xxx" up as common values, and introduce
a new helper check_psd_pminfo() to wrap _PSD info check.

In cpufreq_add/del_cpu(), a new helper get_psd_info() is introduced to
extract "shared_type" and "struct xen_psd_package" from
"struct xen_processor_performance", and a few indentation get fixed at
the same time.

Signed-off-by: Penny Zheng 
---
v3 -> v4:
- new commit
---
 xen/drivers/cpufreq/cpufreq.c | 107 ++++++++++++++++++++++++----------
 xen/include/public/platform.h |  10 ++--
 2 files changed, 82 insertions(+), 35 deletions(-)

diff --git a/xen/drivers/cpufreq/cpufreq.c b/xen/drivers/cpufreq/cpufreq.c
index b01ed8e294..b020ccbcf7 100644
--- a/xen/drivers/cpufreq/cpufreq.c
+++ b/xen/drivers/cpufreq/cpufreq.c
@@ -191,9 +191,31 @@ int cpufreq_limit_change(unsigned int cpu)
     return __cpufreq_set_policy(data, &policy);
 }
 
-int cpufreq_add_cpu(unsigned int cpu)
+static int get_psd_info(uint32_t init, unsigned int cpu,
+                        uint32_t *shared_type,
+                        struct xen_psd_package *domain_info)
 {
     int ret = 0;
+
+    switch ( init )
+    {
+    case XEN_PX_INIT:
+        if ( shared_type )
+            *shared_type = processor_pminfo[cpu]->perf.shared_type;
+        if ( domain_info )
+            *domain_info = processor_pminfo[cpu]->perf.domain_info;
+        break;
+    default:
+        ret = -EINVAL;
+        break;
+    }
+
+    return ret;
+}
+
+int cpufreq_add_cpu(unsigned int cpu)
+{
+    int ret;
     unsigned int firstcpu;
     unsigned int dom, domexist = 0;
     unsigned int hw_all = 0;
@@ -201,14 +223,13 @@ int cpufreq_add_cpu(unsigned int cpu)
     struct cpufreq_dom *cpufreq_dom = NULL;
     struct cpufreq_policy new_policy;
     struct cpufreq_policy *policy;
-    struct processor_performance *perf;
+    struct xen_psd_package domain_info;
+    uint32_t shared_type;
 
     /* to protect the case when Px was not controlled by xen */
     if ( !processor_pminfo[cpu] || !cpu_online(cpu) )
         return -EINVAL;
 
-    perf = &processor_pminfo[cpu]->perf;
-
     if ( !(processor_pminfo[cpu]->init & XEN_PX_INIT) )
         return -EINVAL;
 
@@ -218,10 +239,15 @@ int cpufreq_add_cpu(unsigned int cpu)
     if (per_cpu(cpufreq_cpu_policy, cpu))
         return 0;
 
-    if (perf->shared_type == CPUFREQ_SHARED_TYPE_HW)
+    ret = get_psd_info(processor_pminfo[cpu]->init, cpu,
+                       &shared_type, &domain_info);
+    if ( ret )
+        return ret;
+
+    if ( shared_type == CPUFREQ_SHARED_TYPE_HW )
         hw_all = 1;
 
-    dom = perf->domain_info.domain;
+    dom = domain_info.domain;
 
     list_for_each(pos, &cpufreq_dom_list_head) {
         cpufreq_dom = list_entry(pos, struct cpufreq_dom, node);
@@ -244,20 +270,27 @@ int cpufreq_add_cpu(unsigned int cpu)
         cpufreq_dom->dom = dom;
         list_add(&cpufreq_dom->node, &cpufreq_dom_list_head);
     } else {
+        uint32_t firstcpu_shared_type;
+        struct xen_psd_package firstcpu_domain_info;
+
         /* domain sanity check under whatever coordination type */
         firstcpu = cpumask_first(cpufreq_dom->map);
-        if ((perf->domain_info.coord_type !=
-            processor_pminfo[firstcpu]->perf.domain_info.coord_type) ||
-            (perf->domain_info.num_processors !=
-            processor_pminfo[firstcpu]->perf.domain_info.num_processors)) {
-
+        ret = get_psd_info(processor_pminfo[firstcpu]->init, firstcpu,
+                           &firstcpu_shared_type, &firstcpu_domain_info);
+        if ( ret )
+            return ret;
+
+        if ( (domain_info.coord_type != firstcpu_domain_info.coord_type) ||
+             (domain_info.num_processors !=
+              firstcpu_domain_info.num_processors) )
+        {
             printk(KERN_WARNING "cpufreq fail to add CPU%d:"
                    "incorrect _PSD(%"PRIu64":%"PRIu64"), "
                    "expect(%"PRIu64"/%"PRIu64")\n",
-                   cpu, perf->domain_info.coord_type,
-                   perf->domain_info.num_processors,
-                   processor_pminfo[firstcpu]->perf.domain_info.coord_type,
-                   processor_pminfo[firstcpu]->perf.domain_info.num_processors
+                   cpu, domain_info.coord_type,
+                   domain_info.num_processors,
+                   firstcpu_domain_info.coord_type,
+                   firstcpu_domain_info.num_processors
                 );
             return -EINVAL;
         }
@@ -304,8 +337,9 @@ int cpufreq_add_cpu(unsigned int cpu)
     if (ret)
         goto err1;
 
-    if (hw_all || (cpumask_weight(cpufreq_dom->map) ==
-                   perf->domain_info.num_processors)) {
+    if ( hw_all || (cpumask_weight(cpufreq_dom->map) ==
+                    domain_info.num_processors) )
+    {
         memcpy(&new_policy, policy, sizeof(struct cpufreq_policy));
         policy->governor = NULL;
 
@@ -354,29 +388,34 @@ err0:
 
 int cpufreq_del_cpu(unsigned int cpu)
 {
+    int ret;
     unsigned int dom, domexist = 0;
     unsigned int hw_all = 0;
     struct list_head *pos;
     struct cpufreq_dom *cpufreq_dom = NULL;
     struct cpufreq_policy *policy;
-    struct processor_performance *perf;
+    uint32_t shared_type;
+    struct xen_psd_package domain_info;
 
     /* to protect the case when Px was not controlled by xen */
     if ( !processor_pminfo[cpu] || !cpu_online(cpu) )
         return -EINVAL;
 
-    perf = &processor_pminfo[cpu]->perf;
-
     if ( !(processor_pminfo[cpu]->init & XEN_PX_INIT) )
         return -EINVAL;
 
     if (!per_cpu(cpufreq_cpu_policy, cpu))
         return 0;
 
-    if (perf->shared_type == CPUFREQ_SHARED_TYPE_HW)
+    ret = get_psd_info(processor_pminfo[cpu]->init, cpu,
+                       &shared_type, &domain_info);
+    if ( ret )
+        return ret;
+
+    if ( shared_type == CPUFREQ_SHARED_TYPE_HW )
         hw_all = 1;
 
-    dom = perf->domain_info.domain;
+    dom = domain_info.domain;
     policy = per_cpu(cpufreq_cpu_policy, cpu);
 
     list_for_each(pos, &cpufreq_dom_list_head) {
@@ -392,8 +431,8 @@ int cpufreq_del_cpu(unsigned int cpu)
 
     /* for HW_ALL, stop gov for each core of the _PSD domain */
     /* for SW_ALL & SW_ANY, stop gov for the 1st core of the _PSD domain */
-    if (hw_all || (cpumask_weight(cpufreq_dom->map) ==
-                   perf->domain_info.num_processors))
+    if ( hw_all || (cpumask_weight(cpufreq_dom->map) ==
+                    domain_info.num_processors) )
         __cpufreq_governor(policy, CPUFREQ_GOV_STOP);
 
     cpufreq_statistic_exit(cpu);
@@ -458,6 +497,17 @@ static void print_PPC(unsigned int platform_limit)
     printk("\t_PPC: %d\n", platform_limit);
 }
 
+static int check_psd_pminfo(const struct xen_processor_performance *perf)
+{
+    /* check domain coordination */
+    if ( perf->shared_type != CPUFREQ_SHARED_TYPE_ALL &&
+         perf->shared_type != CPUFREQ_SHARED_TYPE_ANY &&
+         perf->shared_type != CPUFREQ_SHARED_TYPE_HW )
+        return -EINVAL;
+
+    return 0;
+}
+
 int set_px_pminfo(uint32_t acpi_id, struct xen_processor_performance *perf)
 {
     int ret = 0, cpu;
@@ -539,14 +589,9 @@ int set_px_pminfo(uint32_t acpi_id, struct xen_processor_performance *perf)
 
     if ( perf->flags & XEN_PX_PSD )
     {
-        /* check domain coordination */
-        if ( perf->shared_type != CPUFREQ_SHARED_TYPE_ALL &&
-             perf->shared_type != CPUFREQ_SHARED_TYPE_ANY &&
-             perf->shared_type != CPUFREQ_SHARED_TYPE_HW )
-        {
-            ret = -EINVAL;
+        ret = check_psd_pminfo(perf);
+        if ( ret )
             goto out;
-        }
 
         pxpt->shared_type = perf->shared_type;
         memcpy(&pxpt->domain_info, &perf->domain_info,
diff --git a/xen/include/public/platform.h b/xen/include/public/platform.h
index 2725b8d104..67cf5eeabd 100644
--- a/xen/include/public/platform.h
+++ b/xen/include/public/platform.h
@@ -440,6 +440,11 @@ struct xen_psd_package {
     uint64_t num_processors;
 };
 
+/* Coordination type value */
+#define XEN_CPUPERF_SHARED_TYPE_HW   1 /* HW does needed coordination */
+#define XEN_CPUPERF_SHARED_TYPE_ALL  2 /* All dependent CPUs should set freq */
+#define XEN_CPUPERF_SHARED_TYPE_ANY  3 /* Freq can be set from any dependent CPU */
+
 struct xen_processor_performance {
     uint32_t flags;     /* flag for Px sub info type */
     uint32_t platform_limit;  /* Platform limitation on freq usage */
@@ -449,10 +454,7 @@ struct xen_processor_performance {
     XEN_GUEST_HANDLE(xen_processor_px_t) states;
     struct xen_psd_package domain_info;
     /* Coordination type of this processor */
-#define XEN_CPUPERF_SHARED_TYPE_HW   1 /* HW does needed coordination */
-#define XEN_CPUPERF_SHARED_TYPE_ALL  2 /* All dependent CPUs should set freq */
-#define XEN_CPUPERF_SHARED_TYPE_ANY  3 /* Freq can be set from any dependent CPU */
-    uint32_t shared_type;
+    uint32_t shared_type; /* XEN_CPUPERF_SHARED_TYPE_xxx */
 };
 typedef struct xen_processor_performance xen_processor_performance_t;
 DEFINE_XEN_GUEST_HANDLE(xen_processor_performance_t);
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , Penny Zheng , Jan Beulich
	
Subject: [PATCH v4 04/15] xen/cpufreq: refactor cmdline "cpufreq=xxx"
Date: Mon, 14 Apr 2025 15:40:45 +0800
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A helper function handle_cpufreq_cmdline() is introduced to tidy different
handling pathes.
We also add a new helper cpufreq_opts_contain() to ignore and warn user
redundant setting, like "cpufreq=hwp;hwp;xen"

Signed-off-by: Penny Zheng 
---
v2 -> v3:
- new commit
---
v3 -> v4:
- add one single helper to do the tidy work
- ignore and warn user redundant setting
---
 xen/drivers/cpufreq/cpufreq.c | 53 +++++++++++++++++++++++++++++------
 1 file changed, 45 insertions(+), 8 deletions(-)

diff --git a/xen/drivers/cpufreq/cpufreq.c b/xen/drivers/cpufreq/cpufreq.c
index e01acc0c2d..79c6444116 100644
--- a/xen/drivers/cpufreq/cpufreq.c
+++ b/xen/drivers/cpufreq/cpufreq.c
@@ -71,6 +71,49 @@ unsigned int __initdata cpufreq_xen_cnt = 1;
 
 static int __init cpufreq_cmdline_parse(const char *s, const char *e);
 
+static bool __init cpufreq_opts_contain(enum cpufreq_xen_opt option)
+{
+    unsigned int count = cpufreq_xen_cnt;
+
+    while ( count )
+    {
+        if ( cpufreq_xen_opts[--count] == option )
+            return true;
+    }
+
+    return false;
+}
+
+static int __init handle_cpufreq_cmdline(enum cpufreq_xen_opt option)
+{
+    int ret = 0;
+
+    if ( cpufreq_opts_contain(option) )
+    {
+        const char *cpufreq_opts_str[] = { "CPUFREQ_xen", "CPUFREQ_hwp" };
+
+        printk(XENLOG_WARNING
+               "Duplicate cpufreq driver option: %s",
+               cpufreq_opts_str[option - 1]);
+        return 0;
+    }
+
+    cpufreq_controller = FREQCTL_xen;
+    cpufreq_xen_opts[cpufreq_xen_cnt++] = option;
+    switch ( option )
+    {
+    case CPUFREQ_hwp:
+    case CPUFREQ_xen:
+        xen_processor_pmbits |= XEN_PROCESSOR_PM_PX;
+        break;
+    default:
+        ret = -EINVAL;
+        break;
+    }
+
+    return ret;
+}
+
 static int __init cf_check setup_cpufreq_option(const char *str)
 {
     const char *arg = strpbrk(str, ",:;");
@@ -114,20 +157,14 @@ static int __init cf_check setup_cpufreq_option(const char *str)
 
         if ( choice > 0 || !cmdline_strcmp(str, "xen") )
         {
-            xen_processor_pmbits |= XEN_PROCESSOR_PM_PX;
-            cpufreq_controller = FREQCTL_xen;
-            cpufreq_xen_opts[cpufreq_xen_cnt++] = CPUFREQ_xen;
-            ret = 0;
+            ret = handle_cpufreq_cmdline(CPUFREQ_xen);
             if ( arg[0] && arg[1] )
                 ret = cpufreq_cmdline_parse(arg + 1, end);
         }
         else if ( IS_ENABLED(CONFIG_INTEL) && choice < 0 &&
                   !cmdline_strcmp(str, "hwp") )
         {
-            xen_processor_pmbits |= XEN_PROCESSOR_PM_PX;
-            cpufreq_controller = FREQCTL_xen;
-            cpufreq_xen_opts[cpufreq_xen_cnt++] = CPUFREQ_hwp;
-            ret = 0;
+            ret = handle_cpufreq_cmdline(CPUFREQ_hwp);
             if ( arg[0] && arg[1] )
                 ret = hwp_cmdline_parse(arg + 1, end);
         }
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , Penny Zheng , Jan Beulich
	
Subject: [PATCH v4 06/15] xen/cpufreq: disable px statistic info in amd-cppc mode
Date: Mon, 14 Apr 2025 15:40:47 +0800
Message-ID: <20250414074056.3696888-7-Penny.Zheng@amd.com>
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We need to bypass construction of px statistic info in
cpufreq_statistic_init() for amd-cppc mode, as P-states is not necessary there.

Signed-off-by: Penny Zheng 
---
v3 -> v4:
- remove unnecessary stub for cpufreq_statistic_exit()
---
 xen/drivers/cpufreq/utility.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/xen/drivers/cpufreq/utility.c b/xen/drivers/cpufreq/utility.c
index e690a484f1..b35e2eb1b6 100644
--- a/xen/drivers/cpufreq/utility.c
+++ b/xen/drivers/cpufreq/utility.c
@@ -98,6 +98,9 @@ int cpufreq_statistic_init(unsigned int cpu)
     if ( !pmpt )
         return -EINVAL;
 
+    if ( !(pmpt->init & XEN_PX_INIT) )
+        return 0;
+
     spin_lock(cpufreq_statistic_lock);
 
     pxpt = per_cpu(cpufreq_statistic_data, cpu);
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , Penny Zheng , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini 
Subject: [PATCH v4 03/15] xen/x86: introduce new sub-hypercall to propagate CPPC data
Date: Mon, 14 Apr 2025 15:40:44 +0800
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In order to provide backward compatibility with existing governors
that represent performance as frequency, like ondemand, the _CPC
table can optionally provide processor frequency range values, Lowest
frequency and Norminal frequency, to let OS use Lowest Frequency/
Performance and Nominal Frequency/Performance as anchor points to
create linear mapping of CPPC abstract performance to CPU frequency.

As Xen is uncapable of parsing the ACPI dynamic table, we'd like to
introduce a new sub-hypercall "XEN_PM_CPPC" to propagate required CPPC
data from dom0 kernel to Xen.
In the according handler set_cppc_pminfo(), we do _CPC and _PSD
sanitization check, as both _PSD and _CPC info are necessary for correctly
initializing cpufreq cores in CPPC mode.
Users shall be warned that if we failed at this point,
no fallback scheme, like legacy P-state could be switched to.
A new flag "XEN_CPPC_INIT" is also introduced to differentiate cpufreq core
initialised in Px mode.

Signed-off-by: Penny Zheng 
---
v1 -> v2:
- Remove unnecessary figure braces
- Pointer-to-const for print_CPPC and set_cppc_pminfo
- Structure allocation shall use xvzalloc()
- Unnecessary memcpy(), and change it to a (type safe) structure assignment
- Add comment for struct xen_processor_cppc, and keep the chosen fields
in the order _CPC has them
- Obey to alphabetic sorting, and prefix compat structures with ? instead
of !
---
v2 -> v3:
- Trim too long line
- Re-place set_cppc_pminfo() past set_px_pminfo()
- Fix Misra violations: Declaration and definition ought to agree
in parameter names
- Introduce a new flag XEN_PM_CPPC to reflect processor initialised in CPPC
mode
---
v3 -> v4:
- Refactor commit message
- make "acpi_id" unsigned int
- Add warning message when cpufreq_cpu_init() failed only under debug mode
- Expand "struct xen_processor_cppc" to include _PSD and shared type
- add sanity check for ACPI CPPC data
---
 xen/arch/x86/platform_hypercall.c         |   5 +
 xen/drivers/cpufreq/cpufreq.c             | 131 ++++++++++++++++++++--
 xen/include/acpi/cpufreq/processor_perf.h |   4 +-
 xen/include/public/platform.h             |  26 +++++
 xen/include/xen/pmstat.h                  |   2 +
 xen/include/xlat.lst                      |   1 +
 6 files changed, 161 insertions(+), 8 deletions(-)

diff --git a/xen/arch/x86/platform_hypercall.c b/xen/arch/x86/platform_hypercall.c
index 90abd3197f..49717e9ca9 100644
--- a/xen/arch/x86/platform_hypercall.c
+++ b/xen/arch/x86/platform_hypercall.c
@@ -572,6 +572,11 @@ ret_t do_platform_op(
             break;
         }
 
+        case XEN_PM_CPPC:
+            ret = set_cppc_pminfo(op->u.set_pminfo.id,
+                                  &op->u.set_pminfo.u.cppc_data);
+            break;
+
         default:
             ret = -EINVAL;
             break;
diff --git a/xen/drivers/cpufreq/cpufreq.c b/xen/drivers/cpufreq/cpufreq.c
index b020ccbcf7..e01acc0c2d 100644
--- a/xen/drivers/cpufreq/cpufreq.c
+++ b/xen/drivers/cpufreq/cpufreq.c
@@ -40,6 +40,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -205,6 +206,12 @@ static int get_psd_info(uint32_t init, unsigned int cpu,
         if ( domain_info )
             *domain_info = processor_pminfo[cpu]->perf.domain_info;
         break;
+    case XEN_CPPC_INIT:
+        if ( shared_type )
+            *shared_type = processor_pminfo[cpu]->cppc_data.shared_type;
+        if ( domain_info )
+            *domain_info = processor_pminfo[cpu]->cppc_data.domain_info;
+        break;
     default:
         ret = -EINVAL;
         break;
@@ -230,7 +237,7 @@ int cpufreq_add_cpu(unsigned int cpu)
     if ( !processor_pminfo[cpu] || !cpu_online(cpu) )
         return -EINVAL;
 
-    if ( !(processor_pminfo[cpu]->init & XEN_PX_INIT) )
+    if ( !(processor_pminfo[cpu]->init & (XEN_PX_INIT | XEN_CPPC_INIT)) )
         return -EINVAL;
 
     if (!cpufreq_driver.init)
@@ -401,7 +408,7 @@ int cpufreq_del_cpu(unsigned int cpu)
     if ( !processor_pminfo[cpu] || !cpu_online(cpu) )
         return -EINVAL;
 
-    if ( !(processor_pminfo[cpu]->init & XEN_PX_INIT) )
+    if ( !(processor_pminfo[cpu]->init & (XEN_PX_INIT | XEN_CPPC_INIT)) )
         return -EINVAL;
 
     if (!per_cpu(cpufreq_cpu_policy, cpu))
@@ -497,12 +504,19 @@ static void print_PPC(unsigned int platform_limit)
     printk("\t_PPC: %d\n", platform_limit);
 }
 
-static int check_psd_pminfo(const struct xen_processor_performance *perf)
+static int check_psd_pminfo(const struct xen_processor_performance *perf,
+                            const struct xen_processor_cppc *cppc_data)
 {
+    uint32_t shared_type;
+
+    if ( !perf && !cppc_data )
+        return -EINVAL;
+
+    shared_type = perf ? perf->shared_type : cppc_data->shared_type;
     /* check domain coordination */
-    if ( perf->shared_type != CPUFREQ_SHARED_TYPE_ALL &&
-         perf->shared_type != CPUFREQ_SHARED_TYPE_ANY &&
-         perf->shared_type != CPUFREQ_SHARED_TYPE_HW )
+    if ( shared_type != CPUFREQ_SHARED_TYPE_ALL &&
+         shared_type != CPUFREQ_SHARED_TYPE_ANY &&
+         shared_type != CPUFREQ_SHARED_TYPE_HW )
         return -EINVAL;
 
     return 0;
@@ -589,7 +603,7 @@ int set_px_pminfo(uint32_t acpi_id, struct xen_processor_performance *perf)
 
     if ( perf->flags & XEN_PX_PSD )
     {
-        ret = check_psd_pminfo(perf);
+        ret = check_psd_pminfo(perf, NULL);
         if ( ret )
             goto out;
 
@@ -627,6 +641,109 @@ out:
     return ret;
 }
 
+static void print_CPPC(const struct xen_processor_cppc *cppc_data)
+{
+    printk("\t_CPC: highest_perf=%u, lowest_perf=%u, "
+           "nominal_perf=%u, lowest_nonlinear_perf=%u, "
+           "nominal_mhz=%uMHz, lowest_mhz=%uMHz\n",
+           cppc_data->cpc.highest_perf, cppc_data->cpc.lowest_perf,
+           cppc_data->cpc.nominal_perf, cppc_data->cpc.lowest_nonlinear_perf,
+           cppc_data->cpc.nominal_mhz, cppc_data->cpc.lowest_mhz);
+}
+
+int set_cppc_pminfo(unsigned int acpi_id,
+                    const struct xen_processor_cppc *cppc_data)
+{
+    int ret = 0, cpuid;
+    struct processor_pminfo *pm_info;
+
+    cpuid = get_cpu_id(acpi_id);
+    if ( cpuid < 0 || !cppc_data )
+    {
+        ret = -EINVAL;
+        goto out;
+    }
+    if ( cpufreq_verbose )
+        printk("Set CPU acpi_id(%u) cpuid(%d) CPPC State info:\n",
+               acpi_id, cpuid);
+
+    pm_info = processor_pminfo[cpuid];
+    if ( !pm_info )
+    {
+        pm_info = xvzalloc(struct processor_pminfo);
+        if ( !pm_info )
+        {
+            ret = -ENOMEM;
+            goto out;
+        }
+        processor_pminfo[cpuid] = pm_info;
+    }
+    pm_info->acpi_id = acpi_id;
+    pm_info->id = cpuid;
+
+    if ( cppc_data->flags & XEN_CPPC_PSD )
+    {
+        ret = check_psd_pminfo(NULL, cppc_data);
+        if ( ret )
+            goto out;
+    }
+
+    if ( cppc_data->flags & XEN_CPPC_CPC )
+    {
+        if ( cppc_data->cpc.highest_perf == 0 ||
+             cppc_data->cpc.highest_perf > UINT8_MAX ||
+             cppc_data->cpc.nominal_perf == 0 ||
+             cppc_data->cpc.nominal_perf > UINT8_MAX ||
+             cppc_data->cpc.lowest_nonlinear_perf == 0 ||
+             cppc_data->cpc.lowest_nonlinear_perf > UINT8_MAX ||
+             cppc_data->cpc.lowest_perf == 0 ||
+             cppc_data->cpc.lowest_perf > UINT8_MAX ||
+             cppc_data->cpc.lowest_perf >
+                cppc_data->cpc.lowest_nonlinear_perf ||
+             cppc_data->cpc.lowest_nonlinear_perf >
+                cppc_data->cpc.nominal_perf ||
+             cppc_data->cpc.nominal_perf > cppc_data->cpc.highest_perf )
+            /*
+             * Right now, Xen doesn't actually use perf values
+             * in ACPI _CPC table, warning is enough.
+             */
+            printk(XENLOG_WARNING
+                   "Broken CPPC perf values: lowest(%u), nonlinear_lowest(%u), nominal(%u), highest(%u)\n",
+                   cppc_data->cpc.lowest_perf,
+                   cppc_data->cpc.lowest_nonlinear_perf,
+                   cppc_data->cpc.nominal_perf,
+                   cppc_data->cpc.highest_perf);
+
+        /* lowest_mhz and nominal_mhz are optional value */
+        if ( (cppc_data->cpc.lowest_mhz && cppc_data->cpc.nominal_mhz) &&
+             cppc_data->cpc.lowest_mhz > cppc_data->cpc.nominal_mhz )
+            printk(XENLOG_WARNING
+                   "Broken CPPC freq values: lowest(%u), nominal(%u)\n",
+                   cppc_data->cpc.lowest_mhz,
+                   cppc_data->cpc.nominal_mhz);
+    }
+
+    if ( cppc_data->flags == (XEN_CPPC_PSD | XEN_CPPC_CPC) )
+    {
+        pm_info->cppc_data = *cppc_data;
+        if ( cpufreq_verbose )
+        {
+            print_PSD(&pm_info->cppc_data.domain_info);
+            print_CPPC(&pm_info->cppc_data);
+        }
+
+        pm_info->init = XEN_CPPC_INIT;
+        ret = cpufreq_cpu_init(cpuid);
+#ifndef NDEBUG
+        if ( ret )
+            printk(XENLOG_WARNING "No fallback scheme could be replaced now");
+#endif
+    }
+
+ out:
+    return ret;
+}
+
 static void cpufreq_cmdline_common_para(struct cpufreq_policy *new_policy)
 {
     if (usr_max_freq)
diff --git a/xen/include/acpi/cpufreq/processor_perf.h b/xen/include/acpi/cpufreq/processor_perf.h
index 5f2612b15a..f1f4f3138d 100644
--- a/xen/include/acpi/cpufreq/processor_perf.h
+++ b/xen/include/acpi/cpufreq/processor_perf.h
@@ -5,7 +5,8 @@
 #include 
 #include 
 
-#define XEN_PX_INIT 0x80000000U
+#define XEN_CPPC_INIT 0x40000000U
+#define XEN_PX_INIT   0x80000000U
 
 unsigned int powernow_register_driver(void);
 unsigned int get_measured_perf(unsigned int cpu, unsigned int flag);
@@ -35,6 +36,7 @@ struct processor_pminfo {
     uint32_t acpi_id;
     uint32_t id;
     struct processor_performance    perf;
+    struct xen_processor_cppc cppc_data;
 
     uint32_t init;
 };
diff --git a/xen/include/public/platform.h b/xen/include/public/platform.h
index 67cf5eeabd..0e18a86ab4 100644
--- a/xen/include/public/platform.h
+++ b/xen/include/public/platform.h
@@ -363,6 +363,7 @@ DEFINE_XEN_GUEST_HANDLE(xenpf_getidletime_t);
 #define XEN_PM_PX   1
 #define XEN_PM_TX   2
 #define XEN_PM_PDC  3
+#define XEN_PM_CPPC 4
 
 /* Px sub info type */
 #define XEN_PX_PCT   1
@@ -370,6 +371,10 @@ DEFINE_XEN_GUEST_HANDLE(xenpf_getidletime_t);
 #define XEN_PX_PPC   4
 #define XEN_PX_PSD   8
 
+/* CPPC sub info type */
+#define XEN_CPPC_PSD   1
+#define XEN_CPPC_CPC   2
+
 struct xen_power_register {
     uint32_t     space_id;
     uint32_t     bit_width;
@@ -459,6 +464,26 @@ struct xen_processor_performance {
 typedef struct xen_processor_performance xen_processor_performance_t;
 DEFINE_XEN_GUEST_HANDLE(xen_processor_performance_t);
 
+struct xen_processor_cppc {
+    uint8_t flags; /* flag for CPPC sub info type */
+    /*
+     * Subset _CPC fields useful for CPPC-compatible cpufreq
+     * driver's initialization
+     */
+    struct {
+        uint32_t highest_perf;
+        uint32_t nominal_perf;
+        uint32_t lowest_nonlinear_perf;
+        uint32_t lowest_perf;
+        uint32_t lowest_mhz;
+        uint32_t nominal_mhz;
+    } cpc;
+    struct xen_psd_package domain_info; /* _PSD */
+    /* Coordination type of this processor */
+    uint32_t shared_type;
+};
+typedef struct xen_processor_cppc xen_processor_cppc_t;
+
 struct xenpf_set_processor_pminfo {
     /* IN variables */
     uint32_t id;    /* ACPI CPU ID */
@@ -467,6 +492,7 @@ struct xenpf_set_processor_pminfo {
         struct xen_processor_power          power;/* Cx: _CST/_CSD */
         struct xen_processor_performance    perf; /* Px: _PPC/_PCT/_PSS/_PSD */
         XEN_GUEST_HANDLE(uint32)            pdc;  /* _PDC */
+        xen_processor_cppc_t                cppc_data; /* _CPC and _PSD */
     } u;
 };
 typedef struct xenpf_set_processor_pminfo xenpf_set_processor_pminfo_t;
diff --git a/xen/include/xen/pmstat.h b/xen/include/xen/pmstat.h
index 8350403e95..f30286d48e 100644
--- a/xen/include/xen/pmstat.h
+++ b/xen/include/xen/pmstat.h
@@ -7,6 +7,8 @@
 
 int set_px_pminfo(uint32_t acpi_id, struct xen_processor_performance *perf);
 long set_cx_pminfo(uint32_t acpi_id, struct xen_processor_power *power);
+int set_cppc_pminfo(unsigned int acpi_id,
+                    const struct xen_processor_cppc *cppc_data);
 
 #ifdef CONFIG_COMPAT
 struct compat_processor_performance;
diff --git a/xen/include/xlat.lst b/xen/include/xlat.lst
index 3c7b6c6830..d3f87c7cc2 100644
--- a/xen/include/xlat.lst
+++ b/xen/include/xlat.lst
@@ -168,6 +168,7 @@
 !	processor_performance		platform.h
 !	processor_power			platform.h
 ?	processor_px			platform.h
+?	processor_cppc			platform.h
 !	psd_package			platform.h
 ?	xenpf_enter_acpi_sleep		platform.h
 ?	xenpf_pcpu_version		platform.h
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , Penny Zheng , Jan Beulich
	, Andrew Cooper , "Anthony
 PERARD" , Michal Orzel ,
	Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Stefano Stabellini , "Juergen
 Gross" 
Subject: [PATCH v4 00/15] amd-cppc CPU Performance Scaling Driver
Date: Mon, 14 Apr 2025 15:40:41 +0800
Message-ID: <20250414074056.3696888-1-Penny.Zheng@amd.com>
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amd-cppc is the AMD CPU performance scaling driver that introduces a
new CPU frequency control mechanism on modern AMD APU and CPU series in
Xen. The new mechanism is based on Collaborative Processor Performance
Control (CPPC) which provides finer grain frequency management than
legacy ACPI hardware P-States. Current AMD CPU/APU platforms are using
the ACPI P-states driver to manage CPU frequency and clocks with
switching only in 3 P-states. CPPC replaces the ACPI P-states controls
and allows a flexible, low-latency interface for Xen to directly
communicate the performance hints to hardware.

amd_cppc driver has 2 operation modes: autonomous (active) mode,
and non-autonomous (passive) mode. We register different CPUFreq driver
for different modes, "amd-cppc" for passive mode and "amd-cppc-epp"
for active mode.

The passive mode leverages common governors such as *ondemand*,
*performance*, etc, to manage the performance hints. And the active mode
uses epp to provides a hint to the hardware if software wants to bias
toward performance (0x0) or energy efficiency (0xff). CPPC power algorithm
in hardware will automatically calculate the runtime workload and adjust the
realtime cpu cores frequency according to the power supply and thermal, core
voltage and some other hardware conditions.

amd-cppc is enabled on passive mode with a top-level `cpufreq=amd-cppc` option,
while users add extra `active` flag to select active mode.

With `cpufreq=amd-cppc,active`, we did a 60s sampling test to see the CPU
frequency change, through tweaking the energy_perf preference from
`xenpm set-cpufreq-cppc powersave` to `xenpm set-cpufreq-cppc performance`.
The outputs are as follows:
```
Setting CPU in powersave mode
Sampling and Outputs:
  Avg freq      2000000 KHz
  Avg freq      2000000 KHz
  Avg freq      2000000 KHz
Setting CPU in performance mode
Sampling and Outputs:
  Avg freq      4640000 KHz
  Avg freq      4220000 KHz
  Avg freq      4640000 KHz

Penny Zheng (15):
  xen/cpufreq: move "init" flag into common structure
  xen/cpufreq: extract _PSD info from "struct xen_processor_performance"
  xen/x86: introduce new sub-hypercall to propagate CPPC data
  xen/cpufreq: refactor cmdline "cpufreq=xxx"
  xen/x86: introduce "cpufreq=amd-cppc" xen cmdline
  xen/cpufreq: disable px statistic info in amd-cppc mode
  xen/cpufreq: fix core frequency calculation for AMD Family 1Ah CPUs
  xen/amd: introduce amd_process_freq() to get processor frequency
  xen/x86: introduce a new amd cppc driver for cpufreq scaling
  xen/cpufreq: only set gov NULL when cpufreq_driver.setpolicy is NULL
  xen/x86: implement EPP support for the amd-cppc driver in active mode
  tools/xenpm: Print CPPC parameters for amd-cppc driver
  tools/xenpm: fix unnecessary scaling_available_frequencies in CPPC
    mode
  tools/xenpm: remove px_cap dependency check for average frequency
  xen/xenpm: Adapt SET/GET_CPUFREQ_CPPC xen_sysctl_pm_op for amd-cppc
    driver

 docs/misc/xen-command-line.pandoc         |  13 +-
 tools/libs/ctrl/xc_pm.c                   |  45 +-
 tools/misc/xenpm.c                        |  20 +-
 xen/arch/x86/acpi/cpufreq/Makefile        |   1 +
 xen/arch/x86/acpi/cpufreq/acpi.c          |  14 +-
 xen/arch/x86/acpi/cpufreq/amd-cppc.c      | 708 ++++++++++++++++++++++
 xen/arch/x86/acpi/cpufreq/cpufreq.c       |  34 +-
 xen/arch/x86/cpu/amd.c                    |  81 ++-
 xen/arch/x86/include/asm/amd.h            |   4 +
 xen/arch/x86/include/asm/msr-index.h      |   6 +
 xen/arch/x86/platform_hypercall.c         |  16 +
 xen/drivers/acpi/pmstat.c                 |  42 +-
 xen/drivers/cpufreq/cpufreq.c             | 306 ++++++++--
 xen/drivers/cpufreq/utility.c             |  14 +
 xen/include/acpi/cpufreq/cpufreq.h        |  22 +-
 xen/include/acpi/cpufreq/processor_perf.h |  11 +-
 xen/include/public/platform.h             |  36 +-
 xen/include/public/sysctl.h               |   2 +
 xen/include/xen/pmstat.h                  |   2 +
 xen/include/xlat.lst                      |   1 +
 20 files changed, 1268 insertions(+), 110 deletions(-)
 create mode 100644 xen/arch/x86/acpi/cpufreq/amd-cppc.c

-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , Penny Zheng , Andrew Cooper
	, Anthony PERARD ,
	Michal Orzel , Jan Beulich , "Julien
 Grall" , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Stefano Stabellini 
Subject: [PATCH v4 05/15] xen/x86: introduce "cpufreq=amd-cppc" xen cmdline
Date: Mon, 14 Apr 2025 15:40:46 +0800
Message-ID: <20250414074056.3696888-6-Penny.Zheng@amd.com>
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Users need to set "cpufreq=amd-cppc" in xen cmdline to enable
amd-cppc driver, which selects ACPI Collaborative Performance
and Power Control (CPPC) on supported AMD hardware to provide a
finer grained frequency control mechanism.
`verbose` option can also be included to support verbose print.

When users setting "cpufreq=amd-cppc", a new amd-cppc driver
shall be registered and used. All hooks for amd-cppc driver are missing
until commit "xen/x86: introduce a new amd cppc driver for cpufreq scaling"

Xen is not expected to support both or mixed mode (CPPC & legacy PSS, _PCT,
_PPC) operations, so only one cpufreq driver gets registerd, either amd-cppc
or legacy P-states driver, which is reflected and asserted by the incompatible
flags XEN_PROCESSOR_PM_PX and XEN_PROCESSOR_PM_CPPC.

Signed-off-by: Penny Zheng 
---
v1 -> v2:
- Obey to alphabetic sorting and also strict it with CONFIG_AMD
- Remove unnecessary empty comment line
- Use __initconst_cf_clobber for pre-filled structure cpufreq_driver
- Make new switch-case code apply to Hygon CPUs too
- Change ENOSYS with EOPNOTSUPP
- Blanks around binary operator
- Change all amd_/-pstate defined values to amd_/-cppc
---
v2 -> v3
- refactor too long lines
- Make sure XEN_PROCESSOR_PM_PX and XEN_PROCESSOR_PM_CPPC incompatible flags
after cpufreq register registrantion
---
v3 -> v4:
- introduce XEN_PROCESSOR_PM_CPPC in xen internal header
- complement "Hygon" in log message
- remove unnecessary if()
- grow cpufreq_xen_opts[] array
---
 docs/misc/xen-command-line.pandoc         |  7 +-
 xen/arch/x86/acpi/cpufreq/Makefile        |  1 +
 xen/arch/x86/acpi/cpufreq/acpi.c          | 14 +++-
 xen/arch/x86/acpi/cpufreq/amd-cppc.c      | 81 +++++++++++++++++++++++
 xen/arch/x86/acpi/cpufreq/cpufreq.c       | 34 +++++++++-
 xen/arch/x86/platform_hypercall.c         | 11 +++
 xen/drivers/cpufreq/cpufreq.c             | 15 ++++-
 xen/include/acpi/cpufreq/cpufreq.h        |  6 +-
 xen/include/acpi/cpufreq/processor_perf.h |  3 +
 xen/include/public/sysctl.h               |  1 +
 10 files changed, 166 insertions(+), 7 deletions(-)
 create mode 100644 xen/arch/x86/acpi/cpufreq/amd-cppc.c

diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc
index 89db6e83be..9ef847a336 100644
--- a/docs/misc/xen-command-line.pandoc
+++ b/docs/misc/xen-command-line.pandoc
@@ -515,7 +515,7 @@ If set, force use of the performance counters for oprofile, rather than detectin
 available support.
 
 ### cpufreq
-> `= none | {{  | xen } { [:[powersave|performance|ondemand|userspace][,[]][,[]]] } [,verbose]} | dom0-kernel | hwp[:[][,verbose]]`
+> `= none | {{  | xen } { [:[powersave|performance|ondemand|userspace][,[]][,[]]] } [,verbose]} | dom0-kernel | hwp[:[][,verbose]] | amd-cppc[:[verbose]]`
 
 > Default: `xen`
 
@@ -526,7 +526,7 @@ choice of `dom0-kernel` is deprecated and not supported by all Dom0 kernels.
 * `` and `` are integers which represent max and min processor frequencies
   respectively.
 * `verbose` option can be included as a string or also as `verbose=`
-  for `xen`.  It is a boolean for `hwp`.
+  for `xen`.  It is a boolean for `hwp` and `amd-cppc`.
 * `hwp` selects Hardware-Controlled Performance States (HWP) on supported Intel
   hardware.  HWP is a Skylake+ feature which provides better CPU power
   management.  The default is disabled.  If `hwp` is selected, but hardware
@@ -534,6 +534,9 @@ choice of `dom0-kernel` is deprecated and not supported by all Dom0 kernels.
 * `` is a boolean to enable Hardware Duty Cycling (HDC).  HDC enables the
   processor to autonomously force physical package components into idle state.
   The default is enabled, but the option only applies when `hwp` is enabled.
+* `amd-cppc` selects ACPI Collaborative Performance and Power Control (CPPC)
+  on supported AMD hardware to provide finer grained frequency control
+  mechanism. The default is disabled.
 
 There is also support for `;`-separated fallback options:
 `cpufreq=hwp;xen,verbose`.  This first tries `hwp` and falls back to `xen` if
diff --git a/xen/arch/x86/acpi/cpufreq/Makefile b/xen/arch/x86/acpi/cpufreq/Makefile
index e7dbe434a8..a2ba34bda0 100644
--- a/xen/arch/x86/acpi/cpufreq/Makefile
+++ b/xen/arch/x86/acpi/cpufreq/Makefile
@@ -1,4 +1,5 @@
 obj-$(CONFIG_INTEL) += acpi.o
+obj-$(CONFIG_AMD) += amd-cppc.o
 obj-y += cpufreq.o
 obj-$(CONFIG_INTEL) += hwp.o
 obj-$(CONFIG_AMD) += powernow.o
diff --git a/xen/arch/x86/acpi/cpufreq/acpi.c b/xen/arch/x86/acpi/cpufreq/acpi.c
index 0c25376406..e0cea9425f 100644
--- a/xen/arch/x86/acpi/cpufreq/acpi.c
+++ b/xen/arch/x86/acpi/cpufreq/acpi.c
@@ -13,6 +13,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -514,5 +515,16 @@ acpi_cpufreq_driver = {
 
 int __init acpi_cpufreq_register(void)
 {
-    return cpufreq_register_driver(&acpi_cpufreq_driver);
+    int ret;
+
+    ret = cpufreq_register_driver(&acpi_cpufreq_driver);
+    if ( ret )
+        return ret;
+    /*
+     * After cpufreq driver registeration, XEN_PROCESSOR_PM_CPPC
+     * and XEN_PROCESSOR_PM_PX shall become exclusive flags
+     */
+    xen_processor_pmbits &= ~XEN_PROCESSOR_PM_CPPC;
+
+    return ret;
 }
diff --git a/xen/arch/x86/acpi/cpufreq/amd-cppc.c b/xen/arch/x86/acpi/cpufreq/amd-cppc.c
new file mode 100644
index 0000000000..8a081e5523
--- /dev/null
+++ b/xen/arch/x86/acpi/cpufreq/amd-cppc.c
@@ -0,0 +1,81 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * amd-cppc.c - AMD Processor CPPC Frequency Driver
+ *
+ * Copyright (C) 2025 Advanced Micro Devices, Inc. All Rights Reserved.
+ *
+ * Author: Penny Zheng 
+ *
+ * AMD CPPC cpufreq driver introduces a new CPU performance scaling design
+ * for AMD processors using the ACPI Collaborative Performance and Power
+ * Control (CPPC) feature which provides finer grained frequency control range.
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+static bool __init amd_cppc_handle_option(const char *s, const char *end)
+{
+    int ret;
+
+    ret = parse_boolean("verbose", s, end);
+    if ( ret >= 0 )
+    {
+        cpufreq_verbose = ret;
+        return true;
+    }
+
+    return false;
+}
+
+int __init amd_cppc_cmdline_parse(const char *s, const char *e)
+{
+    do
+    {
+        const char *end = strpbrk(s, ",;");
+
+        if ( !amd_cppc_handle_option(s, end) )
+        {
+            printk(XENLOG_WARNING
+                   "cpufreq/amd-cppc: option '%.*s' not recognized\n",
+                   (int)((end ?: e) - s), s);
+
+            return -EINVAL;
+        }
+
+        s = end ? end + 1 : NULL;
+    } while ( s && s < e );
+
+    return 0;
+}
+
+static const struct cpufreq_driver __initconst_cf_clobber
+amd_cppc_cpufreq_driver =
+{
+    .name   = XEN_AMD_CPPC_DRIVER_NAME,
+};
+
+int __init amd_cppc_register_driver(void)
+{
+    int ret;
+
+    if ( !cpu_has_cppc )
+    {
+        xen_processor_pmbits &= ~XEN_PROCESSOR_PM_CPPC;
+        return -ENODEV;
+    }
+
+    ret = cpufreq_register_driver(&amd_cppc_cpufreq_driver);
+    if ( ret )
+        return ret;
+
+    /*
+     * After cpufreq driver registeration, XEN_PROCESSOR_PM_CPPC
+     * and XEN_PROCESSOR_PM_PX shall become exclusive flags
+     */
+    xen_processor_pmbits &= ~XEN_PROCESSOR_PM_PX;
+
+    return ret;
+}
diff --git a/xen/arch/x86/acpi/cpufreq/cpufreq.c b/xen/arch/x86/acpi/cpufreq/cpufreq.c
index 61e98b67bd..eac1c125a3 100644
--- a/xen/arch/x86/acpi/cpufreq/cpufreq.c
+++ b/xen/arch/x86/acpi/cpufreq/cpufreq.c
@@ -148,6 +148,10 @@ static int __init cf_check cpufreq_driver_init(void)
                 case CPUFREQ_none:
                     ret = 0;
                     break;
+                default:
+                    printk(XENLOG_WARNING
+                           "Unsupported cpufreq driver for vendor Intel\n");
+                    break;
                 }
 
                 if ( ret != -ENODEV )
@@ -157,7 +161,35 @@ static int __init cf_check cpufreq_driver_init(void)
 
         case X86_VENDOR_AMD:
         case X86_VENDOR_HYGON:
-            ret = IS_ENABLED(CONFIG_AMD) ? powernow_register_driver() : -ENODEV;
+            if ( !IS_ENABLED(CONFIG_AMD) )
+            {
+                ret = -ENODEV;
+                break;
+            }
+            ret = -ENOENT;
+
+            for ( unsigned int i = 0; i < cpufreq_xen_cnt; i++ )
+            {
+                switch ( cpufreq_xen_opts[i] )
+                {
+                case CPUFREQ_xen:
+                    ret = powernow_register_driver();
+                    break;
+                case CPUFREQ_amd_cppc:
+                    ret = amd_cppc_register_driver();
+                    break;
+                case CPUFREQ_none:
+                    ret = 0;
+                    break;
+                default:
+                    printk(XENLOG_WARNING
+                           "Unsupported cpufreq driver for vendor AMD or Hygon\n");
+                    break;
+                }
+
+                if ( ret != -ENODEV )
+                    break;
+            }
             break;
         }
     }
diff --git a/xen/arch/x86/platform_hypercall.c b/xen/arch/x86/platform_hypercall.c
index 49717e9ca9..82663011ad 100644
--- a/xen/arch/x86/platform_hypercall.c
+++ b/xen/arch/x86/platform_hypercall.c
@@ -542,6 +542,9 @@ ret_t do_platform_op(
                 ret = -ENOSYS;
                 break;
             }
+            /* Xen doesn't support mixed mode */
+            ASSERT((xen_processor_pmbits & XEN_PROCESSOR_PM_CPPC) == 0);
+
             ret = set_px_pminfo(op->u.set_pminfo.id, &op->u.set_pminfo.u.perf);
             break;
  
@@ -573,6 +576,14 @@ ret_t do_platform_op(
         }
 
         case XEN_PM_CPPC:
+            if ( !(xen_processor_pmbits & XEN_PROCESSOR_PM_CPPC) )
+            {
+                ret = -EOPNOTSUPP;
+                break;
+            }
+            /* Xen doesn't support mixed mode */
+            ASSERT((xen_processor_pmbits & XEN_PROCESSOR_PM_PX) == 0);
+
             ret = set_cppc_pminfo(op->u.set_pminfo.id,
                                   &op->u.set_pminfo.u.cppc_data);
             break;
diff --git a/xen/drivers/cpufreq/cpufreq.c b/xen/drivers/cpufreq/cpufreq.c
index 79c6444116..818668c99c 100644
--- a/xen/drivers/cpufreq/cpufreq.c
+++ b/xen/drivers/cpufreq/cpufreq.c
@@ -65,7 +65,7 @@ LIST_HEAD_READ_MOSTLY(cpufreq_governor_list);
 /* set xen as default cpufreq */
 enum cpufreq_controller cpufreq_controller = FREQCTL_xen;
 
-enum cpufreq_xen_opt __initdata cpufreq_xen_opts[2] = { CPUFREQ_xen,
+enum cpufreq_xen_opt __initdata cpufreq_xen_opts[3] = { CPUFREQ_xen,
                                                         CPUFREQ_none };
 unsigned int __initdata cpufreq_xen_cnt = 1;
 
@@ -90,7 +90,8 @@ static int __init handle_cpufreq_cmdline(enum cpufreq_xen_opt option)
 
     if ( cpufreq_opts_contain(option) )
     {
-        const char *cpufreq_opts_str[] = { "CPUFREQ_xen", "CPUFREQ_hwp" };
+        const char *cpufreq_opts_str[] = { "CPUFREQ_xen", "CPUFREQ_hwp",
+                                           "CPUFREQ_amd_cppc" };
 
         printk(XENLOG_WARNING
                "Duplicate cpufreq driver option: %s",
@@ -102,6 +103,9 @@ static int __init handle_cpufreq_cmdline(enum cpufreq_xen_opt option)
     cpufreq_xen_opts[cpufreq_xen_cnt++] = option;
     switch ( option )
     {
+    case CPUFREQ_amd_cppc:
+        xen_processor_pmbits |= XEN_PROCESSOR_PM_CPPC;
+        break;
     case CPUFREQ_hwp:
     case CPUFREQ_xen:
         xen_processor_pmbits |= XEN_PROCESSOR_PM_PX;
@@ -168,6 +172,13 @@ static int __init cf_check setup_cpufreq_option(const char *str)
             if ( arg[0] && arg[1] )
                 ret = hwp_cmdline_parse(arg + 1, end);
         }
+        else if ( IS_ENABLED(CONFIG_AMD) && choice < 0 &&
+                  !cmdline_strcmp(str, "amd-cppc") )
+        {
+            ret = handle_cpufreq_cmdline(CPUFREQ_amd_cppc);
+            if ( arg[0] && arg[1] )
+                ret = amd_cppc_cmdline_parse(arg + 1, end);
+        }
         else
             ret = -EINVAL;
 
diff --git a/xen/include/acpi/cpufreq/cpufreq.h b/xen/include/acpi/cpufreq/cpufreq.h
index a3c84143af..83050c58b2 100644
--- a/xen/include/acpi/cpufreq/cpufreq.h
+++ b/xen/include/acpi/cpufreq/cpufreq.h
@@ -28,8 +28,9 @@ enum cpufreq_xen_opt {
     CPUFREQ_none,
     CPUFREQ_xen,
     CPUFREQ_hwp,
+    CPUFREQ_amd_cppc,
 };
-extern enum cpufreq_xen_opt cpufreq_xen_opts[2];
+extern enum cpufreq_xen_opt cpufreq_xen_opts[3];
 extern unsigned int cpufreq_xen_cnt;
 struct cpufreq_governor;
 
@@ -277,4 +278,7 @@ int set_hwp_para(struct cpufreq_policy *policy,
 
 int acpi_cpufreq_register(void);
 
+int amd_cppc_cmdline_parse(const char *s, const char *e);
+int amd_cppc_register_driver(void);
+
 #endif /* __XEN_CPUFREQ_PM_H__ */
diff --git a/xen/include/acpi/cpufreq/processor_perf.h b/xen/include/acpi/cpufreq/processor_perf.h
index f1f4f3138d..1a6591d612 100644
--- a/xen/include/acpi/cpufreq/processor_perf.h
+++ b/xen/include/acpi/cpufreq/processor_perf.h
@@ -5,6 +5,9 @@
 #include 
 #include 
 
+/* ability bits */
+#define XEN_PROCESSOR_PM_CPPC   8
+
 #define XEN_CPPC_INIT 0x40000000U
 #define XEN_PX_INIT   0x80000000U
 
diff --git a/xen/include/public/sysctl.h b/xen/include/public/sysctl.h
index b0fec271d3..42997252ef 100644
--- a/xen/include/public/sysctl.h
+++ b/xen/include/public/sysctl.h
@@ -423,6 +423,7 @@ struct xen_set_cppc_para {
     uint32_t activity_window;
 };
 
+#define XEN_AMD_CPPC_DRIVER_NAME "amd-cppc"
 #define XEN_HWP_DRIVER_NAME "hwp"
 
 /*
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , Penny Zheng , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v4 07/15] xen/cpufreq: fix core frequency calculation for AMD Family 1Ah CPUs
Date: Mon, 14 Apr 2025 15:40:48 +0800
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AMD Family 1Ah CPU needs a different COF(Core Operating Frequency) formula,
due to a change in the PStateDef MSR layout in AMD Family 1Ah.
In AMD Family 1Ah, Core current operating frequency in MHz is calculated as
follows:
    CoreCOF = Core::X86::Msr::PStateDef[CpuFid[11:0]] * 5MHz

We introduce a helper amd_parse_freq() to parse cpu min/nominal/max core
frequency from PstateDef register, to replace the original macro FREQ(v).
amd_parse_freq() is declared as const, as it mainly consists of mathematical
conputation.

Signed-off-by: Penny Zheng 
---
v2 -> v3:
- new commit
---
v3 -> v4:
 - introduce amd_parse_freq() and declare it as const
 - express if-else-arry() as switch()
---
 xen/arch/x86/cpu/amd.c | 43 +++++++++++++++++++++++++++++++++++-------
 1 file changed, 36 insertions(+), 7 deletions(-)

diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c
index ce4e1df710..f93dda927e 100644
--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -56,6 +56,9 @@ bool __initdata amd_virt_spec_ctrl;
 
 static bool __read_mostly fam17_c6_disabled;
 
+static uint64_t attr_const amd_parse_freq(unsigned char c, uint64_t value);
+#define INVAL_FREQ_MHZ  ~(uint64_t)0
+
 static inline int rdmsr_amd_safe(unsigned int msr, unsigned int *lo,
 				 unsigned int *hi)
 {
@@ -570,12 +573,35 @@ static void amd_get_topology(struct cpuinfo_x86 *c)
                                                           : c->cpu_core_id);
 }
 
+static uint64_t amd_parse_freq(unsigned char c, uint64_t value)
+{
+	uint64_t freq = INVAL_FREQ_MHZ;
+
+	switch (c) {
+	case 0x10 ... 0x16:
+		freq = (((value & 0x3f) + 0x10) * 100) >> ((value >> 6) & 7);
+		break;
+	case 0x17 ... 0x19:
+		freq = ((value & 0xff) * 25 * 8) / ((value >> 8) & 0x3f);
+		break;
+	case 0x1A:
+		freq = (value & 0xfff) * 5;
+		break;
+	default:
+		printk(XENLOG_ERR
+		       "Unsupported cpu familly %c on cpufreq parsing", c);
+		break;
+	}
+
+	return freq;
+}
+
 void amd_log_freq(const struct cpuinfo_x86 *c)
 {
 	unsigned int idx = 0, h;
 	uint64_t hi, lo, val;
 
-	if (c->x86 < 0x10 || c->x86 > 0x19 ||
+	if (c->x86 < 0x10 || c->x86 > 0x1A ||
 	    (c != &boot_cpu_data &&
 	     (!opt_cpu_info || (c->apicid & (c->x86_num_siblings - 1)))))
 		return;
@@ -656,19 +682,22 @@ void amd_log_freq(const struct cpuinfo_x86 *c)
 	if (!(lo >> 63))
 		return;
 
-#define FREQ(v) (c->x86 < 0x17 ? ((((v) & 0x3f) + 0x10) * 100) >> (((v) >> 6) & 7) \
-		                     : (((v) & 0xff) * 25 * 8) / (((v) >> 8) & 0x3f))
 	if (idx && idx < h &&
 	    !rdmsr_safe(0xC0010064 + idx, val) && (val >> 63) &&
 	    !rdmsr_safe(0xC0010064, hi) && (hi >> 63))
 		printk("CPU%u: %lu (%lu ... %lu) MHz\n",
-		       smp_processor_id(), FREQ(val), FREQ(lo), FREQ(hi));
+		       smp_processor_id(),
+		       amd_parse_freq(c->x86, val),
+		       amd_parse_freq(c->x86, lo),
+		       amd_parse_freq(c->x86, hi));
 	else if (h && !rdmsr_safe(0xC0010064, hi) && (hi >> 63))
 		printk("CPU%u: %lu ... %lu MHz\n",
-		       smp_processor_id(), FREQ(lo), FREQ(hi));
+		       smp_processor_id(),
+		       amd_parse_freq(c->x86, lo),
+		       amd_parse_freq(c->x86, hi));
 	else
-		printk("CPU%u: %lu MHz\n", smp_processor_id(), FREQ(lo));
-#undef FREQ
+		printk("CPU%u: %lu MHz\n", smp_processor_id(),
+		       amd_parse_freq(c->x86, lo));
 }
 
 void cf_check early_init_amd(struct cpuinfo_x86 *c)
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , Penny Zheng , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v4 08/15] xen/amd: introduce amd_process_freq() to get processor frequency
Date: Mon, 14 Apr 2025 15:40:49 +0800
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When _CPC table could not provide processor frequency range
values for Xen governor, we need to read processor max frequency
as anchor point.
So we extract amd cpu core frequency calculation logic from amd_log_freq(),
and wrap it as a new helper amd_process_freq().

Signed-off-by: Penny Zheng 
---
v1 -> v2:
- new commit
---
v3 -> v4
- introduce amd_process_freq()
---
 xen/arch/x86/cpu/amd.c         | 60 +++++++++++++++++++++++-----------
 xen/arch/x86/include/asm/amd.h |  4 +++
 2 files changed, 45 insertions(+), 19 deletions(-)

diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c
index f93dda927e..e875014de9 100644
--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -57,7 +57,6 @@ bool __initdata amd_virt_spec_ctrl;
 static bool __read_mostly fam17_c6_disabled;
 
 static uint64_t attr_const amd_parse_freq(unsigned char c, uint64_t value);
-#define INVAL_FREQ_MHZ  ~(uint64_t)0
 
 static inline int rdmsr_amd_safe(unsigned int msr, unsigned int *lo,
 				 unsigned int *hi)
@@ -596,14 +595,13 @@ static uint64_t amd_parse_freq(unsigned char c, uint64_t value)
 	return freq;
 }
 
-void amd_log_freq(const struct cpuinfo_x86 *c)
+void amd_process_freq(const struct cpuinfo_x86 *c,
+		      uint64_t *low_mhz, uint64_t *nom_mhz, uint64_t *hi_mhz)
 {
 	unsigned int idx = 0, h;
 	uint64_t hi, lo, val;
 
-	if (c->x86 < 0x10 || c->x86 > 0x1A ||
-	    (c != &boot_cpu_data &&
-	     (!opt_cpu_info || (c->apicid & (c->x86_num_siblings - 1)))))
+	if (c->x86 < 0x10 || c->x86 > 0x1A)
 		return;
 
 	if (c->x86 < 0x17) {
@@ -684,20 +682,21 @@ void amd_log_freq(const struct cpuinfo_x86 *c)
 
 	if (idx && idx < h &&
 	    !rdmsr_safe(0xC0010064 + idx, val) && (val >> 63) &&
-	    !rdmsr_safe(0xC0010064, hi) && (hi >> 63))
-		printk("CPU%u: %lu (%lu ... %lu) MHz\n",
-		       smp_processor_id(),
-		       amd_parse_freq(c->x86, val),
-		       amd_parse_freq(c->x86, lo),
-		       amd_parse_freq(c->x86, hi));
-	else if (h && !rdmsr_safe(0xC0010064, hi) && (hi >> 63))
-		printk("CPU%u: %lu ... %lu MHz\n",
-		       smp_processor_id(),
-		       amd_parse_freq(c->x86, lo),
-		       amd_parse_freq(c->x86, hi));
-	else
-		printk("CPU%u: %lu MHz\n", smp_processor_id(),
-		       amd_parse_freq(c->x86, lo));
+	    !rdmsr_safe(0xC0010064, hi) && (hi >> 63)) {
+		if (nom_mhz)
+			*nom_mhz = amd_parse_freq(c->x86, val);
+		if (low_mhz)
+			*low_mhz = amd_parse_freq(c->x86, lo);
+		if (hi_mhz)
+			*hi_mhz = amd_parse_freq(c->x86, hi);
+	} else if (h && !rdmsr_safe(0xC0010064, hi) && (hi >> 63)) {
+		if (low_mhz)
+			*low_mhz = amd_parse_freq(c->x86, lo);
+		if (hi_mhz)
+			*hi_mhz = amd_parse_freq(c->x86, hi);
+	} else
+		if (low_mhz)
+			*low_mhz = amd_parse_freq(c->x86, lo);
 }
 
 void cf_check early_init_amd(struct cpuinfo_x86 *c)
@@ -708,6 +707,29 @@ void cf_check early_init_amd(struct cpuinfo_x86 *c)
 	ctxt_switch_levelling(NULL);
 }
 
+void amd_log_freq(const struct cpuinfo_x86 *c)
+{
+	uint64_t low_mhz, nom_mhz, hi_mhz;
+
+	if (c != &boot_cpu_data &&
+	    (!opt_cpu_info || (c->apicid & (c->x86_num_siblings - 1))))
+		return;
+
+	low_mhz = nom_mhz = hi_mhz = INVAL_FREQ_MHZ;
+	amd_process_freq(c, &low_mhz, &nom_mhz, &hi_mhz);
+
+	if (low_mhz != INVAL_FREQ_MHZ && nom_mhz != INVAL_FREQ_MHZ &&
+	    hi_mhz != INVAL_FREQ_MHZ)
+		printk("CPU%u: %lu (%lu ... %lu) MHz\n",
+		       smp_processor_id(),
+		       low_mhz, nom_mhz, hi_mhz);
+	else if (low_mhz != INVAL_FREQ_MHZ && hi_mhz != INVAL_FREQ_MHZ)
+		printk("CPU%u: %lu ... %lu MHz\n",
+		       smp_processor_id(), low_mhz, hi_mhz);
+	else if (low_mhz != INVAL_FREQ_MHZ)
+		printk("CPU%u: %lu MHz\n", smp_processor_id(), low_mhz);
+}
+
 void amd_init_lfence(struct cpuinfo_x86 *c)
 {
 	uint64_t value;
diff --git a/xen/arch/x86/include/asm/amd.h b/xen/arch/x86/include/asm/amd.h
index 9c9599a622..9dd3592bbb 100644
--- a/xen/arch/x86/include/asm/amd.h
+++ b/xen/arch/x86/include/asm/amd.h
@@ -174,4 +174,8 @@ bool amd_setup_legacy_ssbd(void);
 void amd_set_legacy_ssbd(bool enable);
 void amd_set_cpuid_user_dis(bool enable);
 
+#define INVAL_FREQ_MHZ  ~(uint64_t)0
+void amd_process_freq(const struct cpuinfo_x86 *c, uint64_t *low_mhz,
+		      uint64_t *nom_mhz, uint64_t *hi_mhz);
+
 #endif /* __AMD_H__ */
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , Penny Zheng , Jan Beulich
	
Subject: [PATCH v4 10/15] xen/cpufreq: only set gov NULL when cpufreq_driver.setpolicy is NULL
Date: Mon, 14 Apr 2025 15:40:51 +0800
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amd-cppc on active mode bypasses the scaling governor layer, and
provides its own P-state selection algorithms in hardware. Consequently,
when it is used, the driver's -> setpolicy() callback is invoked
to register per-CPU utilization update callbacks, not the ->target()
callback.

So, only when cpufreq_driver.setpolicy is NULL, we need to deliberately
set old gov as NULL to trigger the according gov starting.

Signed-off-by: Penny Zheng 
Reviewed-by: Jan Beulich 
---
v3 -> v4:
- fix indentation and this commit is independent of all earlier patches
---
 xen/drivers/cpufreq/cpufreq.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/xen/drivers/cpufreq/cpufreq.c b/xen/drivers/cpufreq/cpufreq.c
index 818668c99c..2e392110d8 100644
--- a/xen/drivers/cpufreq/cpufreq.c
+++ b/xen/drivers/cpufreq/cpufreq.c
@@ -396,7 +396,13 @@ int cpufreq_add_cpu(unsigned int cpu)
                     domain_info.num_processors) )
     {
         memcpy(&new_policy, policy, sizeof(struct cpufreq_policy));
-        policy->governor = NULL;
+
+        /*
+         * Only when cpufreq_driver.setpolicy == NULL, we need to deliberately
+         * set old gov as NULL to trigger the according gov starting.
+         */
+        if ( cpufreq_driver.setpolicy == NULL )
+            policy->governor = NULL;
 
         cpufreq_cmdline_common_para(&new_policy);
 
-- 
2.34.1



From xen-devel-bounces@lists.xenproject.org Mon Apr 14 07:49:34 2025
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Date: Mon, 14 Apr 2025 16:49:18 +0900
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Subject: Re: [PATCH 2/5] xen/io: provide helpers for multi size MMIO accesses
Content-Language: en-GB
To: Jan Beulich , Roger Pau Monne 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <20250411105411.22334-1-roger.pau@citrix.com>
 <20250411105411.22334-3-roger.pau@citrix.com>
 
From: Julien Grall 
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Hi,

On 14/04/2025 15:07, Jan Beulich wrote:
> On 11.04.2025 12:54, Roger Pau Monne wrote:
>> Several handlers have the same necessity of reading from an MMIO region
>> using 1, 2, 4 or 8 bytes accesses.  So far this has been open-coded in the
>> function itself.  Instead provide a new handler that encapsulates the
>> accesses.
>>
>> Since the added helpers are not architecture specific, introduce a new
>> generic io.h header.
> 
> Except that ...
> 
>> --- /dev/null
>> +++ b/xen/include/xen/io.h
>> @@ -0,0 +1,63 @@
>> +/* SPDX-License-Identifier: GPL-2.0-only */
>> +/*
>> + * Generic helpers for doing MMIO accesses.
>> + *
>> + * Copyright (c) 2025 Cloud Software Group
>> + */
>> +#ifndef XEN_IO_H
>> +#define XEN_IO_H
>> +
>> +#include 
>> +
>> +#include 
>> +
>> +static inline uint64_t read_mmio(const volatile void __iomem *mem,
>> +                                 unsigned int size)
>> +{
>> +    switch ( size )
>> +    {
>> +    case 1:
>> +        return readb(mem);
>> +
>> +    case 2:
>> +        return readw(mem);
>> +
>> +    case 4:
>> +        return readl(mem);
>> +
>> +    case 8:
>> +        return readq(mem);
> 
> ... this and ...
> 
>> +    }
>> +
>> +    ASSERT_UNREACHABLE();
>> +    return ~0UL;
>> +}
>> +
>> +static inline void write_mmio(volatile void __iomem *mem, uint64_t data,
>> +                              unsigned int size)
>> +{
>> +    switch ( size )
>> +    {
>> +    case 1:
>> +        writeb(data, mem);
>> +        break;
>> +
>> +    case 2:
>> +        writew(data, mem);
>> +        break;
>> +
>> +    case 4:
>> +        writel(data, mem);
>> +        break;
>> +
>> +    case 8:
>> +        writeq(data, mem);
>> +        break;
> 
> ... this may (generally will) not work on 32-bit architectures. Add
> CONFIG_64BIT conditionals? At which point return type / last parameter
> type could move from uint64_t to unsigned long.

Technically arm32 bit supports 64-bit write because we mandate LPAE. I 
see this is used by the vPCI code. Are we expecting to have any 64-bit 
access?

Cheers,

-- 
Julien Grall



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From: Penny Zheng 
To: 
CC: , Penny Zheng , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v4 09/15] xen/x86: introduce a new amd cppc driver for cpufreq scaling
Date: Mon, 14 Apr 2025 15:40:50 +0800
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amd-cppc is the AMD CPU performance scaling driver that introduces a
new CPU frequency control mechanism firstly on AMD Zen based CPU series.
The new mechanism is based on Collaborative Processor Performance
Control (CPPC) which is a finer grain frequency management
than legacy ACPI hardware P-States.
Current AMD CPU platforms are using the ACPI P-states driver to
manage CPU frequency and clocks with switching only in 3 P-states.
The new amd-cppc allows a more flexible, low-latency interface for Xen
to directly communicate the performance hints to hardware.

The first version "amd-cppc" could leverage common governors such as
*ondemand*, *performance*, etc, to manage the performance hints. In the
future, we will introduce an advanced active mode to enable autonomous
performence level selection.

Signed-off-by: Penny Zheng 
---
v1 -> v2:
- re-construct union caps and req to have anonymous struct instead
- avoid "else" when the earlier if() ends in an unconditional control flow statement
- Add check to avoid chopping off set bits from cast
- make pointers pointer-to-const wherever possible
- remove noisy log
- exclude families before 0x17 before CPPC-feature MSR op
- remove useless variable helpers
- use xvzalloc and XVFREE
- refactor error handling as ENABLE bit can only be cleared by reset
---
v2 -> v3:
- Move all MSR-definations to msr-index.h and follow the required style
- Refactor opening figure braces for struct/union
- Sort overlong lines throughout the series
- Make offset/res int covering underflow scenario
- Error out when amd_max_freq_mhz isn't set
- Introduce amd_get_freq(name) macro to decrease redundancy
- Supported CPU family checked ahead of smp-function
- Nominal freq shall be checked between the [min, max]
- Use APERF/MPREF to calculate current frequency
- Use amd_cppc_cpufreq_cpu_exit() to tidy error path
---
v3 -> v4:
- verbose print shall come with a CPU number
- deal with res <= 0 in amd_cppc_khz_to_perf()
- introduce a single helper amd_get_lowest_or_nominal_freq() to cover both
lowest and nominal scenario
- reduce abuse of wrmsr_safe()/rdmsr_safe() with wrmsrl()/rdmsrl()
- move cf_check from amd_cppc_write_request() to amd_cppc_write_request_msrs()
- add comment to explain why setting non_linear_lowest in passive mode
- add check to ensure perf values in
lowest <= non_linear_lowest <= nominal <= highset
- refactor comment for "data->err != 0" scenario
- use "data->err" instead of -ENODEV
- add U suffixes for all msr macro
---
 xen/arch/x86/acpi/cpufreq/amd-cppc.c | 393 +++++++++++++++++++++++++++
 xen/arch/x86/include/asm/msr-index.h |   5 +
 2 files changed, 398 insertions(+)

diff --git a/xen/arch/x86/acpi/cpufreq/amd-cppc.c b/xen/arch/x86/acpi/cpufreq/amd-cppc.c
index 8a081e5523..2fdfd17f59 100644
--- a/xen/arch/x86/acpi/cpufreq/amd-cppc.c
+++ b/xen/arch/x86/acpi/cpufreq/amd-cppc.c
@@ -14,7 +14,56 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
+#include 
+#include 
+
+#define amd_cppc_err(cpu, fmt, args...)                             \
+    printk(XENLOG_ERR "AMD_CPPC: CPU%u error: " fmt, cpu, ## args)
+#define amd_cppc_warn(cpu, fmt, args...)                            \
+    printk(XENLOG_WARNING "AMD_CPPC: CPU%u warning: " fmt, cpu, ## args)
+#define amd_cppc_verbose(cpu, fmt, args...)                         \
+({                                                                  \
+    if ( cpufreq_verbose )                                          \
+        printk(XENLOG_DEBUG "AMD_CPPC: CPU%u " fmt, cpu, ## args);  \
+})
+
+struct amd_cppc_drv_data
+{
+    const struct xen_processor_cppc *cppc_data;
+    union {
+        uint64_t raw;
+        struct {
+            unsigned int lowest_perf:8;
+            unsigned int lowest_nonlinear_perf:8;
+            unsigned int nominal_perf:8;
+            unsigned int highest_perf:8;
+            unsigned int :32;
+        };
+    } caps;
+    union {
+        uint64_t raw;
+        struct {
+            unsigned int max_perf:8;
+            unsigned int min_perf:8;
+            unsigned int des_perf:8;
+            unsigned int epp:8;
+            unsigned int :32;
+        };
+    } req;
+
+    int err;
+};
+
+static DEFINE_PER_CPU_READ_MOSTLY(struct amd_cppc_drv_data *,
+                                  amd_cppc_drv_data);
+/*
+ * Core max frequency read from PstateDef as anchor point
+ * for freq-to-perf transition
+ */
+static DEFINE_PER_CPU_READ_MOSTLY(uint64_t, amd_max_pxfreq_mhz);
 
 static bool __init amd_cppc_handle_option(const char *s, const char *end)
 {
@@ -51,10 +100,354 @@ int __init amd_cppc_cmdline_parse(const char *s, const char *e)
     return 0;
 }
 
+/*
+ * If CPPC lowest_freq and nominal_freq registers are exposed then we can
+ * use them to convert perf to freq and vice versa. The conversion is
+ * extrapolated as an linear function passing by the 2 points:
+ *  - (Low perf, Low freq)
+ *  - (Nominal perf, Nominal freq)
+ */
+static int amd_cppc_khz_to_perf(const struct amd_cppc_drv_data *data,
+                                unsigned int freq, uint8_t *perf)
+{
+    const struct xen_processor_cppc *cppc_data = data->cppc_data;
+    uint64_t mul, div;
+    int offset = 0, res;
+
+    if ( freq == (cppc_data->cpc.nominal_mhz * 1000) )
+    {
+        *perf = data->caps.nominal_perf;
+        return 0;
+    }
+
+    if ( freq == (cppc_data->cpc.lowest_mhz * 1000) )
+    {
+        *perf = data->caps.lowest_perf;
+        return 0;
+    }
+
+    if ( cppc_data->cpc.lowest_mhz && cppc_data->cpc.nominal_mhz &&
+         cppc_data->cpc.lowest_mhz < cppc_data->cpc.nominal_mhz )
+    {
+        mul = data->caps.nominal_perf - data->caps.lowest_perf;
+        div = cppc_data->cpc.nominal_mhz - cppc_data->cpc.lowest_mhz;
+
+        /*
+         * We don't need to convert to kHz for computing offset and can
+         * directly use nominal_mhz and lowest_mhz as the division
+         * will remove the frequency unit.
+         */
+        offset = data->caps.nominal_perf -
+                 (mul * cppc_data->cpc.nominal_mhz) / div;
+    }
+    else
+    {
+        /* Read Processor Max Speed(MHz) as anchor point */
+        mul = data->caps.highest_perf;
+        div = this_cpu(amd_max_pxfreq_mhz);
+        if ( !div || div == INVAL_FREQ_MHZ )
+            return -EINVAL;
+    }
+
+    res = offset + (mul * freq) / (div * 1000);
+    if ( res > UINT8_MAX )
+    {
+        printk_once(XENLOG_WARNING
+                    "Perf value exceeds maximum value 255: %d\n", res);
+        *perf = 0xff;
+        return 0;
+    } else if ( res < 0 )
+    {
+        printk_once(XENLOG_WARNING
+                    "Perf value smaller than minimum value 0: %d\n", res);
+        *perf = 0;
+        return 0;
+    }
+    *perf = (uint8_t)res;
+
+    return 0;
+}
+
+static int amd_get_lowest_or_nominal_freq(const struct amd_cppc_drv_data *data,
+                                          uint32_t cpc_mhz, uint8_t perf,
+                                          unsigned int *freq)
+{
+    uint64_t mul, div, res;
+
+    if ( !freq )
+        return -EINVAL;
+
+    if ( cpc_mhz )
+    {
+        /* Switch to khz */
+        *freq = cpc_mhz * 1000;
+        return 0;
+    }
+
+    /* Read Processor Max Speed(MHz) as anchor point */
+    mul = this_cpu(amd_max_pxfreq_mhz);
+    if ( mul == INVAL_FREQ_MHZ || !mul )
+    {
+        printk(XENLOG_ERR
+               "Failed to read valid processor max frequency as anchor point: %lu\n",
+               mul);
+        return -EINVAL;
+    }
+    div = data->caps.highest_perf;
+    res = (mul * perf * 1000) / div;
+
+    if ( res > UINT_MAX || !res )
+    {
+        printk(XENLOG_ERR
+               "Frequeny exceeds maximum value UINT_MAX or being zero value: %lu\n",
+               res);
+        return -EINVAL;
+    }
+    *freq = (unsigned int)res;
+
+    return 0;
+}
+
+static int amd_get_max_freq(const struct amd_cppc_drv_data *data,
+                            unsigned int *max_freq)
+{
+    unsigned int nom_freq = 0, boost_ratio;
+    int res;
+
+    res = amd_get_lowest_or_nominal_freq(data,
+                                         data->cppc_data->cpc.nominal_mhz,
+                                         data->caps.nominal_perf,
+                                         &nom_freq);
+    if ( res )
+        return res;
+
+    boost_ratio = (unsigned int)(data->caps.highest_perf /
+                                 data->caps.nominal_perf);
+    *max_freq = nom_freq * boost_ratio;
+
+    return 0;
+}
+
+static int cf_check amd_cppc_cpufreq_verify(struct cpufreq_policy *policy)
+{
+    cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq,
+                                 policy->cpuinfo.max_freq);
+
+    return 0;
+}
+
+static void cf_check amd_cppc_write_request_msrs(void *info)
+{
+    const struct amd_cppc_drv_data *data = info;
+
+    wrmsrl(MSR_AMD_CPPC_REQ, data->req.raw);
+}
+
+static void amd_cppc_write_request(unsigned int cpu, uint8_t min_perf,
+                                   uint8_t des_perf, uint8_t max_perf)
+{
+    struct amd_cppc_drv_data *data = per_cpu(amd_cppc_drv_data, cpu);
+    uint64_t prev = data->req.raw;
+
+    data->req.min_perf = min_perf;
+    data->req.max_perf = max_perf;
+    data->req.des_perf = des_perf;
+
+    if ( prev == data->req.raw )
+        return;
+
+    on_selected_cpus(cpumask_of(cpu), amd_cppc_write_request_msrs, data, 1);
+}
+
+static int cf_check amd_cppc_cpufreq_target(struct cpufreq_policy *policy,
+                                            unsigned int target_freq,
+                                            unsigned int relation)
+{
+    unsigned int cpu = policy->cpu;
+    const struct amd_cppc_drv_data *data = per_cpu(amd_cppc_drv_data, cpu);
+    uint8_t des_perf;
+    int res;
+
+    if ( unlikely(!target_freq) )
+        return 0;
+
+    res = amd_cppc_khz_to_perf(data, target_freq, &des_perf);
+    if ( res )
+        return res;
+
+    /*
+     * Setting with "lowest_nonlinear_perf" to ensure governoring
+     * performance in P-state range.
+     */
+    amd_cppc_write_request(policy->cpu, data->caps.lowest_nonlinear_perf,
+                           des_perf, data->caps.highest_perf);
+    return 0;
+}
+
+static void cf_check amd_cppc_init_msrs(void *info)
+{
+    struct cpufreq_policy *policy = info;
+    struct amd_cppc_drv_data *data = this_cpu(amd_cppc_drv_data);
+    uint64_t val;
+    unsigned int min_freq = 0, nominal_freq = 0, max_freq;
+
+    /* Package level MSR */
+    rdmsrl(MSR_AMD_CPPC_ENABLE, val);
+    /*
+     * Only when Enable bit is on, the hardware will calculate the processor’s
+     * performance capabilities and initialize the performance level fields in
+     * the CPPC capability registers.
+     */
+    if ( !(val & AMD_CPPC_ENABLE) )
+    {
+        val |= AMD_CPPC_ENABLE;
+        wrmsrl(MSR_AMD_CPPC_ENABLE, val);
+    }
+
+    rdmsrl(MSR_AMD_CPPC_CAP1, data->caps.raw);
+
+    if ( data->caps.highest_perf == 0 || data->caps.lowest_perf == 0 ||
+         data->caps.nominal_perf == 0 || data->caps.lowest_nonlinear_perf == 0 ||
+         data->caps.lowest_perf > data->caps.lowest_nonlinear_perf ||
+         data->caps.lowest_nonlinear_perf > data->caps.nominal_perf ||
+         data->caps.nominal_perf > data->caps.highest_perf )
+    {
+        amd_cppc_err(policy->cpu,
+                     "Platform malfunction, read CPPC capability highest(%u), lowest(%u), nominal(%u), lowest_nonlinear(%u) zero value\n",
+                     data->caps.highest_perf, data->caps.lowest_perf,
+                     data->caps.nominal_perf, data->caps.lowest_nonlinear_perf);
+        goto err;
+    }
+
+    amd_process_freq(cpu_data + policy->cpu,
+                     NULL, NULL, &this_cpu(amd_max_pxfreq_mhz));
+
+    data->err = amd_get_lowest_or_nominal_freq(data,
+                                               data->cppc_data->cpc.lowest_mhz,
+                                               data->caps.lowest_perf,
+                                               &min_freq);
+    if ( data->err )
+        return;
+
+    data->err = amd_get_lowest_or_nominal_freq(data,
+                                               data->cppc_data->cpc.nominal_mhz,
+                                               data->caps.nominal_perf,
+                                               &nominal_freq);
+    if ( data->err )
+        return;
+
+    data->err = amd_get_max_freq(data, &max_freq);
+    if ( data->err )
+        return;
+
+    if ( min_freq > nominal_freq || nominal_freq > max_freq )
+    {
+        amd_cppc_err(policy->cpu,
+                     "min(%u), or max(%u), or nominal(%u) freq value is incorrect\n",
+                     min_freq, max_freq, nominal_freq);
+        goto err;
+    }
+
+    policy->min = min_freq;
+    policy->max = max_freq;
+
+    policy->cpuinfo.min_freq = min_freq;
+    policy->cpuinfo.max_freq = max_freq;
+    policy->cpuinfo.perf_freq = nominal_freq;
+    /*
+     * Set after policy->cpuinfo.perf_freq, as we are taking
+     * APERF/MPERF average frequency as current frequency.
+     */
+    policy->cur = cpufreq_driver_getavg(policy->cpu, GOV_GETAVG);
+
+    return;
+
+ err:
+    /*
+     * No fallback shceme is available here, see more explanation at call
+     * site in amd_cppc_cpufreq_cpu_init().
+     */
+    data->err = -EINVAL;
+}
+
+/*
+ * AMD CPPC driver is different than legacy ACPI hardware P-State,
+ * which has a finer grain frequency range between the highest and lowest
+ * frequency. And boost frequency is actually the frequency which is mapped on
+ * highest performance ratio. The legacy P0 frequency is actually mapped on
+ * nominal performance ratio.
+ */
+static void amd_cppc_boost_init(struct cpufreq_policy *policy,
+                                const struct amd_cppc_drv_data *data)
+{
+    if ( data->caps.highest_perf <= data->caps.nominal_perf )
+        return;
+
+    policy->turbo = CPUFREQ_TURBO_ENABLED;
+}
+
+static int cf_check amd_cppc_cpufreq_cpu_exit(struct cpufreq_policy *policy)
+{
+    XVFREE(per_cpu(amd_cppc_drv_data, policy->cpu));
+
+    return 0;
+}
+
+static int cf_check amd_cppc_cpufreq_cpu_init(struct cpufreq_policy *policy)
+{
+    unsigned int cpu = policy->cpu;
+    struct amd_cppc_drv_data *data;
+    const struct cpuinfo_x86 *c = cpu_data + cpu;
+
+    data = xvzalloc(struct amd_cppc_drv_data);
+    if ( !data )
+        return -ENOMEM;
+
+    data->cppc_data = &processor_pminfo[cpu]->cppc_data;
+
+    per_cpu(amd_cppc_drv_data, cpu) = data;
+
+    /* Feature CPPC is firstly introduced on Zen2 */
+    if ( c->x86 < 0x17 )
+    {
+        printk_once("Unsupported cpu family: %x\n", c->x86);
+        return -EOPNOTSUPP;
+    }
+
+    on_selected_cpus(cpumask_of(cpu), amd_cppc_init_msrs, policy, 1);
+
+    /*
+     * The enable bit is sticky, as we need to enable it at the very first
+     * begining, before CPPC capability sanity check.
+     * If error path takes effective, not only amd-cppc cpufreq driver fails
+     * to initialize, but also we could not fall back to legacy P-states
+     * driver, irrespective of the command line specifying a fallback option.
+     */
+    if ( data->err )
+    {
+        amd_cppc_err(cpu, "Could not initialize AMD CPPC MSR properly\n");
+        amd_cppc_cpufreq_cpu_exit(policy);
+        return data->err;
+    }
+
+    policy->governor = cpufreq_opt_governor ? : CPUFREQ_DEFAULT_GOVERNOR;
+
+    amd_cppc_boost_init(policy, data);
+
+    amd_cppc_verbose(policy->cpu,
+                     "CPU initialized with amd-cppc passive mode\n");
+
+    return 0;
+}
+
 static const struct cpufreq_driver __initconst_cf_clobber
 amd_cppc_cpufreq_driver =
 {
     .name   = XEN_AMD_CPPC_DRIVER_NAME,
+    .verify = amd_cppc_cpufreq_verify,
+    .target = amd_cppc_cpufreq_target,
+    .init   = amd_cppc_cpufreq_cpu_init,
+    .exit   = amd_cppc_cpufreq_cpu_exit,
 };
 
 int __init amd_cppc_register_driver(void)
diff --git a/xen/arch/x86/include/asm/msr-index.h b/xen/arch/x86/include/asm/msr-index.h
index 22d9e76e55..3ffa613df0 100644
--- a/xen/arch/x86/include/asm/msr-index.h
+++ b/xen/arch/x86/include/asm/msr-index.h
@@ -238,6 +238,11 @@
 
 #define MSR_AMD_CSTATE_CFG                  0xc0010296U
 
+#define MSR_AMD_CPPC_CAP1                   0xc00102b0U
+#define MSR_AMD_CPPC_ENABLE                 0xc00102b1U
+#define  AMD_CPPC_ENABLE                    (_AC(1, ULL) <<  0)
+#define MSR_AMD_CPPC_REQ                    0xc00102b3U
+
 /*
  * Legacy MSR constants in need of cleanup.  No new MSRs below this comment.
  */
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , Penny Zheng , Andrew Cooper
	, Anthony PERARD ,
	Michal Orzel , Jan Beulich , "Julien
 Grall" , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Stefano Stabellini 
Subject: [PATCH v4 11/15] xen/x86: implement EPP support for the amd-cppc driver in active mode
Date: Mon, 14 Apr 2025 15:40:52 +0800
Message-ID: <20250414074056.3696888-12-Penny.Zheng@amd.com>
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amd-cppc has 2 operation modes: autonomous (active) mode,
non-autonomous (passive) mode.
In active mode, platform ignores the requestd done in the Desired
Performance Target register and takes into account only the values
set to the minimum, maximum and energy performance preference(EPP)
registers.
The EPP is used in the CCLK DPM controller to drive the frequency
that a core is going to operate during short periods of activity.
The SOC EPP targets are configured on a scale from 0 to 255 where 0
represents maximum performance and 255 represents maximum efficiency.

We implement a new AMD CPU frequency driver `amd-cppc-epp` for active mode.
It requires `active` tag for users to explicitly select active mode.
In driver `active-cppc-epp`, ->setpolicy() is hooked, not the ->target(), as
it does not depend on xen governor to do performance tuning.

Signed-off-by: Penny Zheng 
---
v1 -> v2:
- Remove redundant epp_mode
- Remove pointless initializer
- Define sole caller read_epp_init_once and epp_init value to read
pre-defined BIOS epp value only once
- Combine the commit "xen/cpufreq: introduce policy type when
cpufreq_driver->setpolicy exists"
---
v2 -> v3:
- Combined with commit "x86/cpufreq: add "cpufreq=amd-cppc,active" para"
- Refactor doc about "active mode"
- Change opt_cpufreq_active to opt_active_mode
- Let caller pass epp_init when unspecified to allow the function parameter
to be of uint8_t
- Make epp_init per-cpu value
---
v3 -> v4:
- doc refinement
- use MASK_EXTR() to get epp value
- fix indentation
- replace if-else() with switch()
- combine successive comments and do refinement
- no need to introduce amd_cppc_epp_update_limit() as a wrapper
- rename cpufreq_parse_policy() with cpufreq_policy_from_governor()
- no need to use case-insensitive comparison
---
 docs/misc/xen-command-line.pandoc    |   8 +-
 xen/arch/x86/acpi/cpufreq/amd-cppc.c | 121 ++++++++++++++++++++++++++-
 xen/arch/x86/include/asm/msr-index.h |   1 +
 xen/drivers/cpufreq/utility.c        |  11 +++
 xen/include/acpi/cpufreq/cpufreq.h   |  12 +++
 xen/include/public/sysctl.h          |   1 +
 6 files changed, 149 insertions(+), 5 deletions(-)

diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc
index 9ef847a336..09f5cb452f 100644
--- a/docs/misc/xen-command-line.pandoc
+++ b/docs/misc/xen-command-line.pandoc
@@ -515,7 +515,7 @@ If set, force use of the performance counters for oprofile, rather than detectin
 available support.
 
 ### cpufreq
-> `= none | {{  | xen } { [:[powersave|performance|ondemand|userspace][,[]][,[]]] } [,verbose]} | dom0-kernel | hwp[:[][,verbose]] | amd-cppc[:[verbose]]`
+> `= none | {{  | xen } { [:[powersave|performance|ondemand|userspace][,[]][,[]]] } [,verbose]} | dom0-kernel | hwp[:[][,verbose]] | amd-cppc[:[active][,verbose]]`
 
 > Default: `xen`
 
@@ -537,6 +537,12 @@ choice of `dom0-kernel` is deprecated and not supported by all Dom0 kernels.
 * `amd-cppc` selects ACPI Collaborative Performance and Power Control (CPPC)
   on supported AMD hardware to provide finer grained frequency control
   mechanism. The default is disabled.
+* `active` is to enable amd-cppc driver in active(autonomous) mode. In this
+  mode, users could write to energy performance preference register(epp) to
+  tell hardware if they want to bias toward performance or energy efficiency.
+  Then built-in CPPC power algorithm will calculate the runtime workload and
+  adjust cores frequency automatically according to the power supply, thermal,
+  core voltage and some other hardware conditions.
 
 There is also support for `;`-separated fallback options:
 `cpufreq=hwp;xen,verbose`.  This first tries `hwp` and falls back to `xen` if
diff --git a/xen/arch/x86/acpi/cpufreq/amd-cppc.c b/xen/arch/x86/acpi/cpufreq/amd-cppc.c
index 2fdfd17f59..3a576fd4be 100644
--- a/xen/arch/x86/acpi/cpufreq/amd-cppc.c
+++ b/xen/arch/x86/acpi/cpufreq/amd-cppc.c
@@ -30,6 +30,9 @@
         printk(XENLOG_DEBUG "AMD_CPPC: CPU%u " fmt, cpu, ## args);  \
 })
 
+static bool __ro_after_init opt_active_mode;
+static DEFINE_PER_CPU_READ_MOSTLY(uint8_t, epp_init);
+
 struct amd_cppc_drv_data
 {
     const struct xen_processor_cppc *cppc_data;
@@ -76,6 +79,13 @@ static bool __init amd_cppc_handle_option(const char *s, const char *end)
         return true;
     }
 
+    ret = parse_boolean("active", s, end);
+    if ( ret >= 0 )
+    {
+        opt_active_mode = ret;
+        return true;
+    }
+
     return false;
 }
 
@@ -244,11 +254,18 @@ static void cf_check amd_cppc_write_request_msrs(void *info)
 }
 
 static void amd_cppc_write_request(unsigned int cpu, uint8_t min_perf,
-                                   uint8_t des_perf, uint8_t max_perf)
+                                   uint8_t des_perf, uint8_t max_perf,
+                                   uint8_t epp)
 {
     struct amd_cppc_drv_data *data = per_cpu(amd_cppc_drv_data, cpu);
     uint64_t prev = data->req.raw;
 
+    if ( !opt_active_mode )
+        data->req.des_perf = des_perf;
+    else
+        data->req.des_perf = 0;
+    data->req.epp = epp;
+
     data->req.min_perf = min_perf;
     data->req.max_perf = max_perf;
     data->req.des_perf = des_perf;
@@ -259,6 +276,14 @@ static void amd_cppc_write_request(unsigned int cpu, uint8_t min_perf,
     on_selected_cpus(cpumask_of(cpu), amd_cppc_write_request_msrs, data, 1);
 }
 
+static void read_epp_init(void)
+{
+    uint64_t val;
+
+    rdmsrl(MSR_AMD_CPPC_REQ, val);
+    this_cpu(epp_init) = MASK_EXTR(val, AMD_CPPC_EPP_MASK);
+}
+
 static int cf_check amd_cppc_cpufreq_target(struct cpufreq_policy *policy,
                                             unsigned int target_freq,
                                             unsigned int relation)
@@ -280,7 +305,10 @@ static int cf_check amd_cppc_cpufreq_target(struct cpufreq_policy *policy,
      * performance in P-state range.
      */
     amd_cppc_write_request(policy->cpu, data->caps.lowest_nonlinear_perf,
-                           des_perf, data->caps.highest_perf);
+                           des_perf, data->caps.highest_perf,
+                           /* Pre-defined BIOS value for passive mode */
+                           per_cpu(epp_init, policy->cpu));
+
     return 0;
 }
 
@@ -360,6 +388,8 @@ static void cf_check amd_cppc_init_msrs(void *info)
      */
     policy->cur = cpufreq_driver_getavg(policy->cpu, GOV_GETAVG);
 
+    read_epp_init();
+
     return;
 
  err:
@@ -393,7 +423,7 @@ static int cf_check amd_cppc_cpufreq_cpu_exit(struct cpufreq_policy *policy)
     return 0;
 }
 
-static int cf_check amd_cppc_cpufreq_cpu_init(struct cpufreq_policy *policy)
+static int amd_cppc_cpufreq_init_perf(struct cpufreq_policy *policy)
 {
     unsigned int cpu = policy->cpu;
     struct amd_cppc_drv_data *data;
@@ -434,12 +464,82 @@ static int cf_check amd_cppc_cpufreq_cpu_init(struct cpufreq_policy *policy)
 
     amd_cppc_boost_init(policy, data);
 
+    return 0;
+}
+
+static int cf_check amd_cppc_cpufreq_cpu_init(struct cpufreq_policy *policy)
+{
+    int ret;
+
+    ret = amd_cppc_cpufreq_init_perf(policy);
+    if ( ret )
+        return ret;
+
     amd_cppc_verbose(policy->cpu,
                      "CPU initialized with amd-cppc passive mode\n");
 
     return 0;
 }
 
+static int cf_check amd_cppc_epp_cpu_init(struct cpufreq_policy *policy)
+{
+    int ret;
+
+    ret = amd_cppc_cpufreq_init_perf(policy);
+    if ( ret )
+        return ret;
+
+    policy->policy = cpufreq_policy_from_governor(policy->governor);
+
+    amd_cppc_verbose(policy->cpu,
+                     "CPU initialized with amd-cppc active mode\n");
+
+    return 0;
+}
+
+static int cf_check amd_cppc_epp_set_policy(struct cpufreq_policy *policy)
+{
+    const struct amd_cppc_drv_data *data = per_cpu(amd_cppc_drv_data,
+                                                   policy->cpu);
+    uint8_t max_perf, min_perf, epp;
+
+    /*
+     * Initial min/max values for CPPC Performance Controls Register.
+     * Continuous CPPC performance scale in active mode is [lowest_perf,
+     * highest_perf]
+     */
+    max_perf = data->caps.highest_perf;
+    min_perf = data->caps.lowest_perf;
+
+    /*
+     * As min_perf sets the idle frequency and max_perf sets the maximum
+     * frequency, we make min_perf equal with max_perf in performance mode
+     * and lower max_perf to the nominal perf in powersave mode, to achieve
+     * ultmost performance and efficiency in each mode.
+     */
+    switch ( policy->policy )
+    {
+    case CPUFREQ_POLICY_PERFORMANCE:
+        /* Force the epp value to be zero for performance policy */
+        epp = CPPC_ENERGY_PERF_MAX_PERFORMANCE;
+        min_perf = max_perf;
+        break;
+    case CPUFREQ_POLICY_POWERSAVE:
+        /* Force the epp value to be 0xff for powersave policy */
+        epp = CPPC_ENERGY_PERF_MAX_POWERSAVE;
+        max_perf = data->caps.nominal_perf;
+        break;
+    default:
+        epp = per_cpu(epp_init, policy->cpu);
+        break;
+    }
+
+    amd_cppc_write_request(policy->cpu, min_perf,
+                           0 /* no des_perf for epp mode */,
+                           max_perf, epp);
+    return 0;
+}
+
 static const struct cpufreq_driver __initconst_cf_clobber
 amd_cppc_cpufreq_driver =
 {
@@ -450,6 +550,16 @@ amd_cppc_cpufreq_driver =
     .exit   = amd_cppc_cpufreq_cpu_exit,
 };
 
+static const struct cpufreq_driver __initconst_cf_clobber
+amd_cppc_epp_driver =
+{
+    .name       = XEN_AMD_CPPC_EPP_DRIVER_NAME,
+    .verify     = amd_cppc_cpufreq_verify,
+    .setpolicy  = amd_cppc_epp_set_policy,
+    .init       = amd_cppc_epp_cpu_init,
+    .exit       = amd_cppc_cpufreq_cpu_exit,
+};
+
 int __init amd_cppc_register_driver(void)
 {
     int ret;
@@ -460,7 +570,10 @@ int __init amd_cppc_register_driver(void)
         return -ENODEV;
     }
 
-    ret = cpufreq_register_driver(&amd_cppc_cpufreq_driver);
+    if ( opt_active_mode )
+        ret = cpufreq_register_driver(&amd_cppc_epp_driver);
+    else
+        ret = cpufreq_register_driver(&amd_cppc_cpufreq_driver);
     if ( ret )
         return ret;
 
diff --git a/xen/arch/x86/include/asm/msr-index.h b/xen/arch/x86/include/asm/msr-index.h
index 3ffa613df0..d29d1d33aa 100644
--- a/xen/arch/x86/include/asm/msr-index.h
+++ b/xen/arch/x86/include/asm/msr-index.h
@@ -242,6 +242,7 @@
 #define MSR_AMD_CPPC_ENABLE                 0xc00102b1U
 #define  AMD_CPPC_ENABLE                    (_AC(1, ULL) <<  0)
 #define MSR_AMD_CPPC_REQ                    0xc00102b3U
+#define  AMD_CPPC_EPP_MASK                  (_AC(0xff, ULL) <<  24)
 
 /*
  * Legacy MSR constants in need of cleanup.  No new MSRs below this comment.
diff --git a/xen/drivers/cpufreq/utility.c b/xen/drivers/cpufreq/utility.c
index b35e2eb1b6..2617581125 100644
--- a/xen/drivers/cpufreq/utility.c
+++ b/xen/drivers/cpufreq/utility.c
@@ -487,3 +487,14 @@ int __cpufreq_set_policy(struct cpufreq_policy *data,
 
     return __cpufreq_governor(data, CPUFREQ_GOV_LIMITS);
 }
+
+unsigned int cpufreq_policy_from_governor(const struct cpufreq_governor *gov)
+{
+    if ( !strncmp(gov->name, "performance", CPUFREQ_NAME_LEN) )
+        return CPUFREQ_POLICY_PERFORMANCE;
+
+    if ( !strncmp(gov->name, "powersave", CPUFREQ_NAME_LEN) )
+        return CPUFREQ_POLICY_POWERSAVE;
+
+    return CPUFREQ_POLICY_UNKNOWN;
+}
diff --git a/xen/include/acpi/cpufreq/cpufreq.h b/xen/include/acpi/cpufreq/cpufreq.h
index 83050c58b2..6f31009e82 100644
--- a/xen/include/acpi/cpufreq/cpufreq.h
+++ b/xen/include/acpi/cpufreq/cpufreq.h
@@ -83,6 +83,7 @@ struct cpufreq_policy {
     int8_t              turbo;  /* tristate flag: 0 for unsupported
                                  * -1 for disable, 1 for enabled
                                  * See CPUFREQ_TURBO_* below for defines */
+    unsigned int        policy; /* CPUFREQ_POLICY_* */
 };
 DECLARE_PER_CPU(struct cpufreq_policy *, cpufreq_cpu_policy);
 
@@ -133,6 +134,17 @@ extern int cpufreq_register_governor(struct cpufreq_governor *governor);
 extern struct cpufreq_governor *__find_governor(const char *governor);
 #define CPUFREQ_DEFAULT_GOVERNOR &cpufreq_gov_dbs
 
+#define CPUFREQ_POLICY_UNKNOWN      0
+/*
+ * If cpufreq_driver->target() exists, the ->governor decides what frequency
+ * within the limits is used. If cpufreq_driver->setpolicy() exists, these
+ * two generic policies are available:
+ */
+#define CPUFREQ_POLICY_POWERSAVE    1
+#define CPUFREQ_POLICY_PERFORMANCE  2
+
+unsigned int cpufreq_policy_from_governor(const struct cpufreq_governor *gov);
+
 /* pass a target to the cpufreq driver */
 extern int __cpufreq_driver_target(struct cpufreq_policy *policy,
                                    unsigned int target_freq,
diff --git a/xen/include/public/sysctl.h b/xen/include/public/sysctl.h
index 42997252ef..fa431fd983 100644
--- a/xen/include/public/sysctl.h
+++ b/xen/include/public/sysctl.h
@@ -424,6 +424,7 @@ struct xen_set_cppc_para {
 };
 
 #define XEN_AMD_CPPC_DRIVER_NAME "amd-cppc"
+#define XEN_AMD_CPPC_EPP_DRIVER_NAME "amd-cppc-epp"
 #define XEN_HWP_DRIVER_NAME "hwp"
 
 /*
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , Penny Zheng , Anthony PERARD
	
Subject: [PATCH v4 14/15] tools/xenpm: remove px_cap dependency check for average frequency
Date: Mon, 14 Apr 2025 15:40:55 +0800
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In `xenpm start` command, the monitor of average frequency shall
not depend on the existence of legacy P-states, so removing "px_cap"
dependancy check.

Signed-off-by: Penny Zheng 
---
v3 -> v4:
- new commit
---
 tools/misc/xenpm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/misc/xenpm.c b/tools/misc/xenpm.c
index 29fffebebd..b823e5c433 100644
--- a/tools/misc/xenpm.c
+++ b/tools/misc/xenpm.c
@@ -539,7 +539,7 @@ static void signal_int_handler(int signo)
                         res / 1000000UL, 100UL * res / (double)sum_px[i]);
             }
         }
-        if ( px_cap && avgfreq[i] )
+        if ( avgfreq[i] )
             printf("  Avg freq\t%d\tKHz\n", avgfreq[i]);
     }
 
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , Penny Zheng , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v4 15/15] xen/xenpm: Adapt SET/GET_CPUFREQ_CPPC xen_sysctl_pm_op for amd-cppc driver
Date: Mon, 14 Apr 2025 15:40:56 +0800
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Introduce helper set_amd_cppc_para and get_amd_cppc_para to
SET/GET CPPC-related para for amd-cppc/amd-cppc-epp driver.

Signed-off-by: Penny Zheng 
---
v1 -> v2:
- Give the variable des_perf an initializer of 0
- Use the strncmp()s directly in the if()
---
v3 -> v4
- refactor comments
- remove double blank lines
- replace amd_cppc_in_use flag with XEN_PROCESSOR_PM_CPPC
---
 xen/arch/x86/acpi/cpufreq/amd-cppc.c | 121 +++++++++++++++++++++++++++
 xen/drivers/acpi/pmstat.c            |  22 ++++-
 xen/include/acpi/cpufreq/cpufreq.h   |   4 +
 3 files changed, 143 insertions(+), 4 deletions(-)

diff --git a/xen/arch/x86/acpi/cpufreq/amd-cppc.c b/xen/arch/x86/acpi/cpufreq/amd-cppc.c
index 3a576fd4be..95d04bf77a 100644
--- a/xen/arch/x86/acpi/cpufreq/amd-cppc.c
+++ b/xen/arch/x86/acpi/cpufreq/amd-cppc.c
@@ -540,6 +540,127 @@ static int cf_check amd_cppc_epp_set_policy(struct cpufreq_policy *policy)
     return 0;
 }
 
+int get_amd_cppc_para(unsigned int cpu,
+                      struct xen_cppc_para *cppc_para)
+{
+    const struct amd_cppc_drv_data *data = per_cpu(amd_cppc_drv_data, cpu);
+
+    if ( data == NULL )
+        return -ENODATA;
+
+    cppc_para->features         = 0;
+    cppc_para->lowest           = data->caps.lowest_perf;
+    cppc_para->lowest_nonlinear = data->caps.lowest_nonlinear_perf;
+    cppc_para->nominal          = data->caps.nominal_perf;
+    cppc_para->highest          = data->caps.highest_perf;
+    cppc_para->minimum          = data->req.min_perf;
+    cppc_para->maximum          = data->req.max_perf;
+    cppc_para->desired          = data->req.des_perf;
+    cppc_para->energy_perf      = data->req.epp;
+
+    return 0;
+}
+
+int set_amd_cppc_para(const struct cpufreq_policy *policy,
+                      const struct xen_set_cppc_para *set_cppc)
+{
+    unsigned int cpu = policy->cpu;
+    struct amd_cppc_drv_data *data = per_cpu(amd_cppc_drv_data, cpu);
+    uint8_t max_perf, min_perf, des_perf = 0, epp;
+
+    if ( data == NULL )
+        return -ENOENT;
+
+    /* Validate all parameters - Disallow reserved bits. */
+    if ( set_cppc->minimum > UINT8_MAX || set_cppc->maximum > UINT8_MAX ||
+         set_cppc->desired > UINT8_MAX || set_cppc->energy_perf > UINT8_MAX )
+        return -EINVAL;
+
+    /* Only allow values if params bit is set. */
+    if ( (!(set_cppc->set_params & XEN_SYSCTL_CPPC_SET_DESIRED) &&
+          set_cppc->desired) ||
+         (!(set_cppc->set_params & XEN_SYSCTL_CPPC_SET_MINIMUM) &&
+          set_cppc->minimum) ||
+         (!(set_cppc->set_params & XEN_SYSCTL_CPPC_SET_MAXIMUM) &&
+          set_cppc->maximum) ||
+         (!(set_cppc->set_params & XEN_SYSCTL_CPPC_SET_ENERGY_PERF) &&
+          set_cppc->energy_perf) )
+        return -EINVAL;
+
+    /* Activity window not supported in MSR */
+    if ( set_cppc->set_params & XEN_SYSCTL_CPPC_SET_ACT_WINDOW )
+        return -EOPNOTSUPP;
+
+    /* Return if there is nothing to do. */
+    if ( set_cppc->set_params == 0 )
+        return 0;
+
+    epp = per_cpu(epp_init, cpu);
+    /*
+     * Apply presets:
+     * XEN_SYSCTL_CPPC_SET_DESIRED reflects whether desired perf is set, which
+     * is also the flag to distiguish between passive mode and active mode.
+     * When it is set, CPPC in passive mode, only
+     * XEN_SYSCTL_CPPC_SET_PRESET_NONE could be chosen, where min_perf =
+     * lowest_nonlinear_perf to ensures performance in P-state range.
+     * when it is not set, CPPC in active mode, three different profile
+     * XEN_SYSCTL_CPPC_SET_PRESET_POWERSAVE/PERFORMANCE/BALANCE are provided,
+     * where min_perf = lowest_perf having T-state range of performance.
+     */
+    switch ( set_cppc->set_params & XEN_SYSCTL_CPPC_SET_PRESET_MASK )
+    {
+    case XEN_SYSCTL_CPPC_SET_PRESET_POWERSAVE:
+        if ( set_cppc->set_params & XEN_SYSCTL_CPPC_SET_DESIRED )
+            return -EINVAL;
+        min_perf = data->caps.lowest_perf;
+        /* Lower max frequency to nominal */
+        max_perf = data->caps.nominal_perf;
+        epp = CPPC_ENERGY_PERF_MAX_POWERSAVE;
+        break;
+
+    case XEN_SYSCTL_CPPC_SET_PRESET_PERFORMANCE:
+        if ( set_cppc->set_params & XEN_SYSCTL_CPPC_SET_DESIRED )
+            return -EINVAL;
+        /* Increase idle frequency to highest */
+        min_perf = data->caps.highest_perf;
+        max_perf = data->caps.highest_perf;
+        epp = CPPC_ENERGY_PERF_MAX_PERFORMANCE;
+        break;
+
+    case XEN_SYSCTL_CPPC_SET_PRESET_BALANCE:
+        if ( set_cppc->set_params & XEN_SYSCTL_CPPC_SET_DESIRED )
+            return -EINVAL;
+        min_perf = data->caps.lowest_perf;
+        max_perf = data->caps.highest_perf;
+        epp = CPPC_ENERGY_PERF_BALANCE;
+        break;
+
+    case XEN_SYSCTL_CPPC_SET_PRESET_NONE:
+        min_perf = data->caps.lowest_nonlinear_perf;
+        max_perf = data->caps.highest_perf;
+        break;
+
+    default:
+        return -EINVAL;
+    }
+
+    /* Further customize presets if needed */
+    if ( set_cppc->set_params & XEN_SYSCTL_CPPC_SET_MINIMUM )
+        min_perf = set_cppc->minimum;
+
+    if ( set_cppc->set_params & XEN_SYSCTL_CPPC_SET_MAXIMUM )
+        max_perf = set_cppc->maximum;
+
+    if ( set_cppc->set_params & XEN_SYSCTL_CPPC_SET_ENERGY_PERF )
+        epp = set_cppc->energy_perf;
+
+    if ( set_cppc->set_params & XEN_SYSCTL_CPPC_SET_DESIRED )
+        des_perf = set_cppc->desired;
+
+    amd_cppc_write_request(cpu, min_perf, des_perf, max_perf, epp);
+    return 0;
+}
+
 static const struct cpufreq_driver __initconst_cf_clobber
 amd_cppc_cpufreq_driver =
 {
diff --git a/xen/drivers/acpi/pmstat.c b/xen/drivers/acpi/pmstat.c
index 83cfef398e..876d82036d 100644
--- a/xen/drivers/acpi/pmstat.c
+++ b/xen/drivers/acpi/pmstat.c
@@ -257,7 +257,18 @@ static int get_cpufreq_para(struct xen_sysctl_pm_op *op)
          !strncmp(op->u.get_para.scaling_driver, XEN_HWP_DRIVER_NAME,
                   CPUFREQ_NAME_LEN) )
         ret = get_hwp_para(policy->cpu, &op->u.get_para.u.cppc_para);
-    else
+    else if ( !strncmp(op->u.get_para.scaling_driver,
+                       XEN_AMD_CPPC_DRIVER_NAME,
+                       CPUFREQ_NAME_LEN) ||
+              !strncmp(op->u.get_para.scaling_driver,
+                       XEN_AMD_CPPC_EPP_DRIVER_NAME,
+                       CPUFREQ_NAME_LEN) )
+        ret = get_amd_cppc_para(policy->cpu, &op->u.get_para.u.cppc_para);
+
+    if ( strncmp(op->u.get_para.scaling_driver, XEN_HWP_DRIVER_NAME,
+                 CPUFREQ_NAME_LEN) &&
+         strncmp(op->u.get_para.scaling_driver, XEN_AMD_CPPC_EPP_DRIVER_NAME,
+                 CPUFREQ_NAME_LEN) )
     {
         if ( !(scaling_available_governors =
                xzalloc_array(char, gov_num * CPUFREQ_NAME_LEN)) )
@@ -413,10 +424,13 @@ static int set_cpufreq_cppc(struct xen_sysctl_pm_op *op)
     if ( !policy || !policy->governor )
         return -ENOENT;
 
-    if ( !hwp_active() )
-        return -EOPNOTSUPP;
+    if ( hwp_active() )
+        return set_hwp_para(policy, &op->u.set_cppc);
+
+    if ( xen_processor_pmbits & XEN_PROCESSOR_PM_CPPC )
+        return set_amd_cppc_para(policy, &op->u.set_cppc);
 
-    return set_hwp_para(policy, &op->u.set_cppc);
+    return -EOPNOTSUPP;
 }
 
 int do_pm_op(struct xen_sysctl_pm_op *op)
diff --git a/xen/include/acpi/cpufreq/cpufreq.h b/xen/include/acpi/cpufreq/cpufreq.h
index 6f31009e82..4d786ce92b 100644
--- a/xen/include/acpi/cpufreq/cpufreq.h
+++ b/xen/include/acpi/cpufreq/cpufreq.h
@@ -292,5 +292,9 @@ int acpi_cpufreq_register(void);
 
 int amd_cppc_cmdline_parse(const char *s, const char *e);
 int amd_cppc_register_driver(void);
+int get_amd_cppc_para(unsigned int cpu,
+                      struct xen_cppc_para *cppc_para);
+int set_amd_cppc_para(const struct cpufreq_policy *policy,
+                      const struct xen_set_cppc_para *set_cppc);
 
 #endif /* __XEN_CPUFREQ_PM_H__ */
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , Penny Zheng , Anthony PERARD
	, Juergen Gross , Jan Beulich
	
Subject: [PATCH v4 13/15] tools/xenpm: fix unnecessary scaling_available_frequencies in CPPC mode
Date: Mon, 14 Apr 2025 15:40:54 +0800
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In `xenpm get-cpufreq-para `, para scaling_available_frequencies
only has meaningful value when cpufreq driver in legacy P-states mode.

So we drop the "has_num" condition check, and mirror the ->gov_num check for
both ->freq_num and ->cpu_num in xc_get_cpufreq_para().
In get_cpufreq_para(), add "freq_num" check to avoid copying data to
op->u.get_para.scaling_available_frequencies in CPPC mode.

Signed-off-by: Penny Zheng 
---
v3 -> v4:
- drop the "has_num" condition check
---
 tools/libs/ctrl/xc_pm.c   | 45 +++++++++++++++++++++------------------
 xen/drivers/acpi/pmstat.c | 11 ++++++----
 2 files changed, 31 insertions(+), 25 deletions(-)

diff --git a/tools/libs/ctrl/xc_pm.c b/tools/libs/ctrl/xc_pm.c
index ff7b5ada05..2089aa41b3 100644
--- a/tools/libs/ctrl/xc_pm.c
+++ b/tools/libs/ctrl/xc_pm.c
@@ -212,34 +212,39 @@ int xc_get_cpufreq_para(xc_interface *xch, int cpuid,
     DECLARE_NAMED_HYPERCALL_BOUNCE(scaling_available_governors,
 			 user_para->scaling_available_governors,
 			 user_para->gov_num * CPUFREQ_NAME_LEN * sizeof(char), XC_HYPERCALL_BUFFER_BOUNCE_BOTH);
-    bool has_num = user_para->cpu_num && user_para->freq_num;
 
-    if ( has_num )
+    if ( (user_para->cpu_num && !user_para->affected_cpus) ||
+         (user_para->freq_num && !user_para->scaling_available_frequencies) ||
+         (user_para->gov_num && !user_para->scaling_available_governors) )
+    {
+        errno = EINVAL;
+        return -1;
+    }
+    if ( user_para->cpu_num )
     {
-        if ( (!user_para->affected_cpus)                    ||
-             (!user_para->scaling_available_frequencies)    ||
-             (user_para->gov_num && !user_para->scaling_available_governors) )
-        {
-            errno = EINVAL;
-            return -1;
-        }
         ret = xc_hypercall_bounce_pre(xch, affected_cpus);
         if ( ret )
             return ret;
+    }
+    if ( user_para->freq_num )
+    {
         ret = xc_hypercall_bounce_pre(xch, scaling_available_frequencies);
         if ( ret )
             goto unlock_2;
-        if ( user_para->gov_num )
-            ret = xc_hypercall_bounce_pre(xch, scaling_available_governors);
-        if ( ret )
-            goto unlock_3;
+    }
+    if ( user_para->gov_num )
+        ret = xc_hypercall_bounce_pre(xch, scaling_available_governors);
+    if ( ret )
+        goto unlock_3;
 
+    if ( user_para->cpu_num )
         set_xen_guest_handle(sys_para->affected_cpus, affected_cpus);
-        set_xen_guest_handle(sys_para->scaling_available_frequencies, scaling_available_frequencies);
-        if ( user_para->gov_num )
-            set_xen_guest_handle(sys_para->scaling_available_governors,
-                                 scaling_available_governors);
-    }
+    if ( user_para->freq_num )
+        set_xen_guest_handle(sys_para->scaling_available_frequencies,
+                             scaling_available_frequencies);
+    if ( user_para->gov_num )
+        set_xen_guest_handle(sys_para->scaling_available_governors,
+                             scaling_available_governors);
 
     sysctl.cmd = XEN_SYSCTL_pm_op;
     sysctl.u.pm_op.cmd = GET_CPUFREQ_PARA;
@@ -258,9 +263,7 @@ int xc_get_cpufreq_para(xc_interface *xch, int cpuid,
             user_para->gov_num  = sys_para->gov_num;
         }
 
-        if ( has_num )
-            goto unlock_4;
-        return ret;
+        goto unlock_4;
     }
     else
     {
diff --git a/xen/drivers/acpi/pmstat.c b/xen/drivers/acpi/pmstat.c
index 0e90ffcc19..83cfef398e 100644
--- a/xen/drivers/acpi/pmstat.c
+++ b/xen/drivers/acpi/pmstat.c
@@ -228,10 +228,13 @@ static int get_cpufreq_para(struct xen_sysctl_pm_op *op)
     ret = copy_to_guest(op->u.get_para.affected_cpus,
                         data, op->u.get_para.cpu_num);
 
-    for ( i = 0; i < op->u.get_para.freq_num; i++ )
-        data[i] = pmpt->perf.states[i].core_frequency * 1000;
-    ret += copy_to_guest(op->u.get_para.scaling_available_frequencies,
-                         data, op->u.get_para.freq_num);
+    if ( op->u.get_para.freq_num )
+    {
+        for ( i = 0; i < op->u.get_para.freq_num; i++ )
+            data[i] = pmpt->perf.states[i].core_frequency * 1000;
+        ret += copy_to_guest(op->u.get_para.scaling_available_frequencies,
+                             data, op->u.get_para.freq_num);
+    }
 
     xfree(data);
     if ( ret )
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , Penny Zheng , Anthony PERARD
	, Jan Beulich 
Subject: [PATCH v4 12/15] tools/xenpm: Print CPPC parameters for amd-cppc driver
Date: Mon, 14 Apr 2025 15:40:53 +0800
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HWP, amd-cppc, amd-cppc-epp are all the implementation
of ACPI CPPC (Collaborative Processor Performace Control),
so we introduce cppc_mode flag to print CPPC-related para.

And HWP and amd-cppc-epp are both governor-less driver,
so we introduce hw_auto flag to bypass governor-related print.

Validation check on `xenpm get-cpufreq-para` shall also consider
CPPC scenario.

Signed-off-by: Penny Zheng 
---
v3 -> v4:
- Include validation check fix here
---
 tools/misc/xenpm.c        | 18 ++++++++++++++----
 xen/drivers/acpi/pmstat.c |  7 ++++---
 2 files changed, 18 insertions(+), 7 deletions(-)

diff --git a/tools/misc/xenpm.c b/tools/misc/xenpm.c
index db658ebadd..29fffebebd 100644
--- a/tools/misc/xenpm.c
+++ b/tools/misc/xenpm.c
@@ -790,9 +790,18 @@ static unsigned int calculate_activity_window(const xc_cppc_para_t *cppc,
 /* print out parameters about cpu frequency */
 static void print_cpufreq_para(int cpuid, struct xc_get_cpufreq_para *p_cpufreq)
 {
-    bool hwp = strcmp(p_cpufreq->scaling_driver, XEN_HWP_DRIVER_NAME) == 0;
+    bool cppc_mode = false, hw_auto = false;
     int i;
 
+    if ( !strcmp(p_cpufreq->scaling_driver, XEN_HWP_DRIVER_NAME) ||
+         !strcmp(p_cpufreq->scaling_driver, XEN_AMD_CPPC_DRIVER_NAME) ||
+         !strcmp(p_cpufreq->scaling_driver, XEN_AMD_CPPC_EPP_DRIVER_NAME) )
+        cppc_mode = true;
+
+    if ( !strcmp(p_cpufreq->scaling_driver, XEN_HWP_DRIVER_NAME) ||
+         !strcmp(p_cpufreq->scaling_driver, XEN_AMD_CPPC_EPP_DRIVER_NAME) )
+        hw_auto = true;
+
     printf("cpu id               : %d\n", cpuid);
 
     printf("affected_cpus        :");
@@ -800,7 +809,7 @@ static void print_cpufreq_para(int cpuid, struct xc_get_cpufreq_para *p_cpufreq)
         printf(" %d", p_cpufreq->affected_cpus[i]);
     printf("\n");
 
-    if ( hwp )
+    if ( hw_auto )
         printf("cpuinfo frequency    : base [%"PRIu32"] max [%"PRIu32"]\n",
                p_cpufreq->cpuinfo_min_freq,
                p_cpufreq->cpuinfo_max_freq);
@@ -812,7 +821,7 @@ static void print_cpufreq_para(int cpuid, struct xc_get_cpufreq_para *p_cpufreq)
 
     printf("scaling_driver       : %s\n", p_cpufreq->scaling_driver);
 
-    if ( hwp )
+    if ( cppc_mode )
     {
         const xc_cppc_para_t *cppc = &p_cpufreq->u.cppc_para;
 
@@ -838,7 +847,8 @@ static void print_cpufreq_para(int cpuid, struct xc_get_cpufreq_para *p_cpufreq)
                cppc->desired,
                cppc->desired ? "" : " hw autonomous");
     }
-    else
+
+    if ( !hw_auto )
     {
         if ( p_cpufreq->gov_num )
             printf("scaling_avail_gov    : %s\n",
diff --git a/xen/drivers/acpi/pmstat.c b/xen/drivers/acpi/pmstat.c
index 767594908c..0e90ffcc19 100644
--- a/xen/drivers/acpi/pmstat.c
+++ b/xen/drivers/acpi/pmstat.c
@@ -201,7 +201,7 @@ static int get_cpufreq_para(struct xen_sysctl_pm_op *op)
     pmpt = processor_pminfo[op->cpuid];
     policy = per_cpu(cpufreq_cpu_policy, op->cpuid);
 
-    if ( !pmpt || !pmpt->perf.states ||
+    if ( !pmpt || ((pmpt->init & XEN_PX_INIT) && !pmpt->perf.states) ||
          !policy || !policy->governor )
         return -EINVAL;
 
@@ -461,9 +461,10 @@ int do_pm_op(struct xen_sysctl_pm_op *op)
     switch ( op->cmd & PM_PARA_CATEGORY_MASK )
     {
     case CPUFREQ_PARA:
-        if ( !(xen_processor_pmbits & XEN_PROCESSOR_PM_PX) )
+        if ( !(xen_processor_pmbits & (XEN_PROCESSOR_PM_PX |
+                                       XEN_PROCESSOR_PM_CPPC)) )
             return -ENODEV;
-        if ( !pmpt || !(pmpt->init & XEN_PX_INIT) )
+        if ( !pmpt || !(pmpt->init & (XEN_PX_INIT | XEN_CPPC_INIT)) )
             return -EINVAL;
         break;
     }
-- 
2.34.1



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From: Grygorii Strashko 

The current code in generate_uboot_images() does not detect arm64 properly
and always generates ARM u-boot image. This causes Xen boot issues.

Fix it by searching for "ARM64" for AArch64 binary detection.

- mkimage -l xen.ub
Before:
Image Type:   ARM Linux Kernel Image (uncompressed)

After:
Image Type:   AArch64 Linux Kernel Image (uncompressed)

Signed-off-by: Grygorii Strashko 
---
 scripts/uboot-script-gen | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/scripts/uboot-script-gen b/scripts/uboot-script-gen
index a9f698f00fd1..c4d26caf5e0e 100755
--- a/scripts/uboot-script-gen
+++ b/scripts/uboot-script-gen
@@ -815,13 +815,13 @@ function linux_config()
=20
 generate_uboot_images()
 {
-    local arch=3D$(file -L $XEN | grep "ARM")
+    local arch=3D$(file -L $XEN | grep -o "ARM64")
=20
     if test "$arch"
     then
-        arch=3Darm
-    else
         arch=3Darm64
+    else
+        arch=3Darm
     fi
=20
     mkimage -A $arch -T kernel -C none -a $memaddr -e $memaddr -d $XEN "$X=
EN".ub
--=20
2.34.1


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Date: Mon, 14 Apr 2025 10:14:22 +0200
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Subject: Re: [PATCH v6 1/3] xen/arm: Move some of the functions to common file
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References: <20250411110452.3748186-1-ayan.kumar.halder@amd.com>
 <20250411110452.3748186-2-ayan.kumar.halder@amd.com>
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On 11/04/2025 13:04, Ayan Kumar Halder wrote:
> regions.inc is added to hold the common earlyboot MPU regions configuration
NIT: I mentioned this a few times already. Please use imperative mood in commit msg.

> between arm64 and arm32.
> 
> prepare_xen_region, fail_insufficient_regions() will be used by both arm32 and
> arm64. Thus, they have been moved to regions.inc.
> 
> *_PRBAR are moved to arm64/sysregs.h.
> *_PRLAR are moved to regions.inc as they are common between arm32 and arm64.
> 
> Introduce WRITE_SYSREG_ASM to write to the system registers from regions.inc.
> 
> Signed-off-by: Ayan Kumar Halder 
> Reviewed-by: Luca Fancellu 
Reviewed-by: Michal Orzel 

~Michal



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From: Grygorii Strashko 
To: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini 
CC: Oleksandr Tyshchenko , Grygorii Strashko
	
Subject: [ImageBuilder] uboot-script-gen: add xen xsm policy loading support
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From: Grygorii Strashko 

This patch adds Xen XSM policy loading support.

The configuration file XEN_POLICY specifies Xen hypervisor
XSM policy binary to load.

Signed-off-by: Grygorii Strashko 
---
 README.md                |  2 ++
 scripts/uboot-script-gen | 33 +++++++++++++++++++++++++++++++++
 2 files changed, 35 insertions(+)

diff --git a/README.md b/README.md
index 137abef153ce..9106d2a07302 100644
--- a/README.md
+++ b/README.md
@@ -91,6 +91,8 @@ Where:
 - XEN specifies the Xen hypervisor binary to load. Note that it has to
   be a regular Xen binary, not a u-boot binary.
=20
+- XEN_POLICY specifies the Xen hypervisor XSM policy binary to load.
+
 - XEN_COLORS specifies the colors (cache coloring) to be used for Xen
   and is in the format startcolor-endcolor
=20
diff --git a/scripts/uboot-script-gen b/scripts/uboot-script-gen
index c4d26caf5e0e..343eba20e4d9 100755
--- a/scripts/uboot-script-gen
+++ b/scripts/uboot-script-gen
@@ -315,6 +315,15 @@ function xen_device_tree_editing()
     dt_set "/chosen" "#size-cells" "hex" "0x2"
     dt_set "/chosen" "xen,xen-bootargs" "str" "$XEN_CMD"
=20
+    if test "$XEN_POLICY" && test $xen_policy_addr !=3D "-"
+    then
+        local node_name=3D"xen-policy@${xen_policy_addr#0x}"
+
+        dt_mknode "/chosen" "$node_name"
+        dt_set "/chosen/$node_name" "compatible" "str_a" "xen,xsm-policy x=
en,multiboot-module multiboot,module"
+        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $xen_po=
licy_addr $xen_policy_size)"
+    fi
+
     if test "$DOM0_KERNEL"
     then
         local node_name=3D"dom0@${dom0_kernel_addr#0x}"
@@ -900,6 +909,14 @@ xen_file_loading()
     kernel_addr=3D$memaddr
     kernel_path=3D$XEN
     load_file "$XEN" "host_kernel"
+
+    xen_policy_addr=3D=3D"-"
+    if test "$XEN_POLICY"
+    then
+        xen_policy_addr=3D$memaddr
+        load_file "$XEN_POLICY" "xen_policy"
+        xen_policy_size=3D$filesize
+    fi
 }
=20
 linux_file_loading()
@@ -939,6 +956,22 @@ bitstream_load_and_config()
=20
 create_its_file_xen()
 {
+    if test "$XEN_POLICY" && test $xen_policy_addr !=3D "-"
+    then
+        cat >> "$its_file" <<- EOF
+        xen_policy {
+            description =3D "Xen XSM policy binary";
+            data =3D /incbin/("$XEN_POLICY");
+            type =3D "kernel";
+            arch =3D "arm64";
+            os =3D "linux";
+            compression =3D "none";
+            load =3D <$xen_policy_addr>;
+            $fit_algo
+        };
+	EOF
+    fi
+
     if test "$DOM0_KERNEL"
     then
         if test "$ramdisk_addr" !=3D "-"
--=20
2.34.1


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Date: Mon, 14 Apr 2025 10:25:24 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jason Andryuk 
Cc: Stefano Stabellini ,
	xen-devel@lists.xenproject.org,
	Andrew Cooper ,
	Jan Beulich , Xenia.Ragiadakou@amd.com,
	Alejandro.GarciaVallejo@amd.com,
	"Lira, Victor M" 
Subject: Re: [RFC] xen/x86: allow overlaps with non-RAM regions
Message-ID: 
References: 
 
 <3c5dfd26-3c12-498b-aca4-0beac4e991a5@amd.com>
 
 <9ed89e50-c645-407d-80b4-5b78cb6e36fa@amd.com>
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In-Reply-To: <9ed89e50-c645-407d-80b4-5b78cb6e36fa@amd.com>

On Fri, Apr 11, 2025 at 09:45:26AM -0400, Jason Andryuk wrote:
> On 2025-04-11 03:31, Roger Pau Monné wrote:
> > Thanks Jason for getting back, I'm intrigued by this issue :).
> > 
> > On Thu, Apr 10, 2025 at 04:55:54PM -0400, Jason Andryuk wrote:
> > > On 2025-04-04 06:28, Roger Pau Monné wrote:
> > > > On Thu, Apr 03, 2025 at 06:01:42PM -0700, Stefano Stabellini wrote:
> > > > > On one Sapphire AMD x86 board, I see this:
> > > > > 
> > > > > 
> > > > > (XEN) [0000003943ca6ff2]  [00000000f0000000, 00000000f7ffffff] (reserved)
> > > > > (XEN) [00000039460886d9]  [00000000fd000000, 00000000ffffffff] (reserved)
> > > > > [...]
> > > > > (XEN) [    4.612235] 0000:02:00.0: not mapping BAR [fea00, fea03] invalid position
> > > > > 
> > > > > 
> > > > > Linux boots fine on this platform but Linux as Dom0 on Xen does not.
> > > > > This is because the pci_check_bar->is_memory_hole check fails due to the
> > > > > MMIO region overlapping with the EFI reserved region.
> > > > 
> > > > That's weird.  (Partially) the reason to not attempt to map such BAR
> > > > is that it should already be mapped, because at dom0 creation time all
> > > > reserved regions are added to the p2m (see arch_iommu_hwdom_init()).
> > > > If that's not the case we should figure out why this reserved region
> > > > is not added to dom0 p2m as part of arch_iommu_hwdom_init().
> > > 
> > > Victor discovered these regions are type 11 EfiMemoryMappedIO, but they get
> > > converted to e820 RESERVED.  The BAR points into it.
> > > 
> > > 00000f0000000-00000f7ffffff type=11 attr=800000000000100d
> > > 00000fd000000-00000fedfffff type=11 attr=800000000000100d
> > > 00000fee00000-00000fee00fff type=11 attr=8000000000000001
> > > 00000fee01000-00000ffffffff type=11 attr=800000000000100d
> > > 
> > > Xenia discovered Linux keeps small regions like this reserved, but lets
> > > larger ones (>= 256kb) become holes.  See the comment in Linux
> > > arch/x86/platform/efi/efi.c:efi_remove_e820_mmio() around line 301.
> > 
> > Right, but whatever Linux decides to do with the reserved regions
> > won't affect how Xen maps them into the p2m.  Anything that's reserved
> > in the e820 should end up identity mapped in the p2m for PVH dom0,
> > unless it's being exclusively used by Xen (see
> > dom0_setup_permissions() use of iomem_deny_access() to deny dom0
> > access to some MMIO regions).
> 
> Oh, my point was more that Baremetal Linux won't have reserved ranges in
> these regions, so there would not be any BAR conflicts.  Though I'm not sure
> if it checks.
> 
> If Xen removed them from the memory map, then pci_check_bar() ->
> is_memory_hole() would pass.

Yes, it would pass.  The underlying issue however is that such region
should already be mapped in the p2m, and hence accesses shouldn't
fault.

When building dom0:

(XEN) [    7.943830] *** Building a PVH Dom0 ***
(XEN) [    7.955960] d0: identity mappings for IOMMU:
(XEN) [    7.965494]  [00000000a0, 00000000ff] RW
(XEN) [    7.974336]  [0000009bff, 0000009fff] RW
(XEN) [    7.983172]  [00000cabc9, 00000cc14c] RW
(XEN) [    7.992049]  [00000cc389, 00000cc389] RW
(XEN) [    8.000890]  [00000cc70a, 00000cd1fe] RW
(XEN) [    8.010065]  [00000ce000, 00000cffff] RW
(XEN) [    8.018904]  [00000fd000, 00000fd2ff] RW
(XEN) [    8.027745]  [00000fd304, 00000febff] RW
(XEN) [    8.036584]  [00000fec02, 00000fedff] RW
(XEN) [    8.045546]  [00000fee01, 00000fffff] RW
(XEN) [    8.054519]  [000080f340, 00008501ff] RW

All the ranges listed here are added to the p2m, and hence the range
[0xfea00, 0xfea03] should be covered by:

(XEN) [    8.027745]  [00000fd304, 00000febff] RW

The expectation is that those mappings are never removed from dom0
p2m.

> > > The description of EfiMemoryMappedIO is a little confusing, which is
> > > probably why its use in unclear.
> > > 
> > > ```
> > > Table 7.5 Memory Type Usage before ExitBootServices()
> > > EfiMemoryMappedIO
> > > 
> > > Used by system firmware to request that a memory-mapped IO region be mapped
> > > by the OS to a virtual address so it can be accessed by EFI runtime
> > > services.
> > > 
> > > Table 7.6 Memory Type Usage after ExitBootServices()
> > > EfiMemoryMappedIO
> > > 
> > > This memory is not used by the OS. All system memory-mapped IO information
> > > should come from ACPI tables.
> > > ```
> > > 
> > > The two after ExitBootServices sentences seem contradictory.  I wonder if it
> > > should be "Ignore this memory type - All system memory-mapped IO information
> > > should come from ACPI tables".
> > 
> > Not very helpful indeed.  The description in "before
> > ExitBootServices()" seems more sensible to me: if the MMIO region is
> > used by runtime services Xen should ensure it's always mapped in the
> > dom0 p2m (which Xen should in principle already do).
> > 
> > > > Can you paste the dom0 build output when booted with `iommu=verbose
> > > > dom0=pvh,verbose`?
> > 
> > Would it be possible to see the output of a debug=y build when booted
> > with `iommu=verbose dom0=pvh,verbose` (with or without pf-fixup,
> > either is fine).
> > 
> > I'm specially interested in the ranggeset contents printed after "d0:
> > identity mappings for IOMMU:", but if possible would like to see the
> > full boot log (including Linux dom0).
> 
> Attached.
> 
> Regards,
> Jason

> (XEN) [00000039f8a5e9d8] Xen version 4.21-unstable (root@) (gcc (Alpine 12.2.1_git20220924-r10) 12.2.1 20220924) debug=y Mon Apr  7 21:19:20 UTC 2025
> (XEN) [00000039fd29ca67] Latest ChangeSet:
> (XEN) [00000039fe824ec4] build-id: 5b79e5a1e7c0b3f356c8d413924be90e6610ea62
> (XEN) [0000003a00cfcb68] Console output is synchronous.
> (XEN) [0000003a02842e16] CPU Vendor: AMD, Family 23 (0x17), Model 96 (0x60), Stepping 1 (raw 00860f01)
> (XEN) [0000003a05a066b4] BSP microcode revision: 0x0860010c
> (XEN) [0000003a077362ac] Bootloader: GRUB 2.13
> (XEN) [0000003a08e2dcdd] Command line: console=com1 com1=57600,8n1,0x3F8,4 sched=null loglvl=all guest_loglvl=all console_timestamps=boot iommu=verbose dom0=pvh,verbose,pf-fixup dom0_max_vcpus=4 dom0_mem=4G argo=1,mac-permissive=1 sync_console noreboot wow
> (XEN) [0000003a109a0624] Xen image load base address: 0xc6600000
> (XEN) [0000003a1293662b] Video information:
> (XEN) [0000003a13ebea87]  VGA is graphics mode 1920x1200, 32 bpp
> (XEN) [0000003a15e52f98] Disc information:
> (XEN) [0000003a173606a3]  Found 0 MBR signatures
> (XEN) [0000003a18b4ce18]  Found 1 EDD information structures
> (XEN) [0000003a1a8f6353] EFI RAM map:
> (XEN) [0000003a1bb9f456]  [0000000000000000, 000000000009ffff] (usable)
> (XEN) [0000003a1de8d54f]  [00000000000a0000, 00000000000fffff] (reserved)
> (XEN) [0000003a2026fad3]  [0000000000100000, 0000000009bfefff] (usable)
> (XEN) [0000003a2255f258]  [0000000009bff000, 0000000009ffffff] (reserved)
> (XEN) [0000003a249416b9]  [000000000a000000, 000000000a1fffff] (usable)
> (XEN) [0000003a26c2deaa]  [000000000a200000, 000000000a20cfff] (ACPI NVS)
> (XEN) [0000003a290124b1]  [000000000a20d000, 00000000cabc8fff] (usable)
> (XEN) [0000003a2b2ffbce]  [00000000cabc9000, 00000000cc14cfff] (reserved)
> (XEN) [0000003a2d6e36bb]  [00000000cc14d000, 00000000cc195fff] (ACPI data)
> (XEN) [0000003a2fb3feea]  [00000000cc196000, 00000000cc388fff] (ACPI NVS)
> (XEN) [0000003a31f22330]  [00000000cc389000, 00000000cc389fff] (reserved)
> (XEN) [0000003a34304f7f]  [00000000cc38a000, 00000000cc709fff] (ACPI NVS)
> (XEN) [0000003a366e8ff9]  [00000000cc70a000, 00000000cd1fefff] (reserved)
> (XEN) [0000003a38acabf9]  [00000000cd1ff000, 00000000cdffffff] (usable)
> (XEN) [0000003a3adba3f1]  [00000000ce000000, 00000000cfffffff] (reserved)
> (XEN) [0000003a3d19c902]  [00000000f0000000, 00000000f7ffffff] (reserved)
> (XEN) [0000003a3f57f2f0]  [00000000fd000000, 00000000ffffffff] (reserved)
> (XEN) [0000003a419613b2]  [0000000100000000, 000000080f33ffff] (usable)
> (XEN) [0000003a43c4eddf]  [000000080f340000, 00000008501fffff] (reserved)
[...]
> (XEN) [    7.943830] *** Building a PVH Dom0 ***
> (XEN) [    7.955960] d0: identity mappings for IOMMU:
> (XEN) [    7.965494]  [00000000a0, 00000000ff] RW
> (XEN) [    7.974336]  [0000009bff, 0000009fff] RW
> (XEN) [    7.983172]  [00000cabc9, 00000cc14c] RW
> (XEN) [    7.992049]  [00000cc389, 00000cc389] RW
> (XEN) [    8.000890]  [00000cc70a, 00000cd1fe] RW
> (XEN) [    8.010065]  [00000ce000, 00000cffff] RW
> (XEN) [    8.018904]  [00000fd000, 00000fd2ff] RW
> (XEN) [    8.027745]  [00000fd304, 00000febff] RW
> (XEN) [    8.036584]  [00000fec02, 00000fedff] RW
> (XEN) [    8.045546]  [00000fee01, 00000fffff] RW
> (XEN) [    8.054519]  [000080f340, 00008501ff] RW
> (XEN) [    8.064135] 0000:02:00.0: not mapping BAR [fea00, fea03] invalid position
> (XEN) [    8.078698] 0000:03:00.0: not mapping BAR [fe900, fe90f] invalid position
> (XEN) [    8.093260] 0000:03:00.0: not mapping BAR [fe910, fe913] invalid position
> (XEN) [    8.107815] 0000:04:00.0: not mapping BAR [fe700, fe77f] invalid position
> (XEN) [    8.122376] 0000:04:00.3: not mapping BAR [fe500, fe5ff] invalid position
> (XEN) [    8.136936] 0000:04:00.4: not mapping BAR [fe400, fe4ff] invalid position
> (XEN) [    8.151498] 0000:05:00.0: not mapping BAR [fe801, fe801] invalid position
> (XEN) [    8.166056] 0000:05:00.1: not mapping BAR [fe800, fe800] invalid position

Note those messages don't imply that the BARs are not mapped in the
dom0 p2m, for example here all the ranges listed as invalid positions
are already mapped into the p2m and covered by the range:

(XEN) [    8.027745]  [00000fd304, 00000febff] RW

> [    6.378198] nvme nvme0: pci function 0000:02:00.0
> (XEN) [   20.964789] d0v3 unable to fixup memory read from 0xfea0300c size 4: -1
> [    6.387692] a(XEN) [   20.981772] d0v3 unable to fixup memory write to 0xfea03000 size 4: -1

And here the address is somehow not populated in the p2m, despite
being listed as an identity mapped region.  I think the real issue
here is why this address is somehow unmapped from the p2m (or maybe
not even added in the first place?).  Xen does identify it as a region
that must be identity mapped.

It's a fairly wild guess, but can you try if:

https://xenbits.xen.org/gitweb/?p=xen.git;a=commit;h=e118fc98e7ae652a188d227bd7ea22f132724150

Makes a difference?  vPCI uses rangesets extensively, so the bug fixed
above could in theory cause unmap operations to remove unintended
regions, and could explain the symptoms you are seeing here.

If that commit doesn't change behavior we would need to figure out why
the identity ranges are either not properly mapped, or unexpectedly
unmapped at a later point.

Thanks, Roger.


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Message-ID: 
Date: Mon, 14 Apr 2025 10:38:07 +0200
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v6 2/3] xen/arm32: Create the same boot-time MPU regions
 as arm64
To: Ayan Kumar Halder ,
 xen-devel@lists.xenproject.org
Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
 Volodymyr Babchuk ,
 Luca Fancellu 
References: <20250411110452.3748186-1-ayan.kumar.halder@amd.com>
 <20250411110452.3748186-3-ayan.kumar.halder@amd.com>
From: "Orzel, Michal" 
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In-Reply-To: <20250411110452.3748186-3-ayan.kumar.halder@amd.com>
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On 11/04/2025 13:04, Ayan Kumar Halder wrote:
> Boot-time MPU protection regions (similar to Armv8-R AArch64) are created for
> Armv8-R AArch32.
> Also, defined *_PRBAR macros for arm32. The only difference from arm64 is that
> XN is 1-bit for arm32.
> Defined the system registers and macros in mpu/cpregs.h.
> 
> Introduced WRITE_SYSREG_ASM() to write to system registers in assembly.
It really reads odd when you write what patch does in past tense.

> 
> Signed-off-by: Ayan Kumar Halder 
> Reviewed-by: Luca Fancellu 
> ---
> Changes from
> 
> v1 -
> 
> 1. enable_mpu() now sets HMAIR{0,1} registers. This is similar to what is
> being done in enable_mmu(). All the mm related configurations happen in this
> function.
> 
> 2. Fixed some typos. 
> 
> v2 -
> 1. Include the common prepare_xen_region.inc in head.S.
> 
> 2. Define LOAD_SYSREG()/STORE_SYSREG() for arm32.
> 
> v3 -
> 1. Rename STORE_SYSREG() as WRITE_SYSREG_ASM()
> 
> 2. enable_boot_cpu_mm() is defined in head.S
> 
> v4 -
> 1. *_PRBAR is moved to arm32/sysregs.h.
> 
> 2. MPU specific CP15 system registers are defined in mpu/cpregs.h. 
> 
> v5 -
> 1. WRITE_SYSREG_ASM is enclosed within #ifdef __ASSEMBLY__
> 
> 2. enable_mpu() clobbers r0 only.
> 
> 3. Definitions in mpu/cpregs.h in enclosed within ARM_32.
> 
> 4. Removed some #ifdefs and style changes.
> 
>  xen/arch/arm/arm32/Makefile              |   1 +
>  xen/arch/arm/arm32/mpu/Makefile          |   1 +
>  xen/arch/arm/arm32/mpu/head.S            | 104 +++++++++++++++++++++++
>  xen/arch/arm/include/asm/arm32/sysregs.h |   9 ++
>  xen/arch/arm/include/asm/cpregs.h        |   2 +
>  xen/arch/arm/include/asm/mpu/cpregs.h    |  27 ++++++
>  6 files changed, 144 insertions(+)
>  create mode 100644 xen/arch/arm/arm32/mpu/Makefile
>  create mode 100644 xen/arch/arm/arm32/mpu/head.S
>  create mode 100644 xen/arch/arm/include/asm/mpu/cpregs.h
> 
> diff --git a/xen/arch/arm/arm32/Makefile b/xen/arch/arm/arm32/Makefile
> index 40a2b4803f..537969d753 100644
> --- a/xen/arch/arm/arm32/Makefile
> +++ b/xen/arch/arm/arm32/Makefile
> @@ -1,5 +1,6 @@
>  obj-y += lib/
>  obj-$(CONFIG_MMU) += mmu/
> +obj-$(CONFIG_MPU) += mpu/
>  
>  obj-$(CONFIG_EARLY_PRINTK) += debug.o
>  obj-y += domctl.o
> diff --git a/xen/arch/arm/arm32/mpu/Makefile b/xen/arch/arm/arm32/mpu/Makefile
> new file mode 100644
> index 0000000000..3340058c08
> --- /dev/null
> +++ b/xen/arch/arm/arm32/mpu/Makefile
> @@ -0,0 +1 @@
> +obj-y += head.o
> diff --git a/xen/arch/arm/arm32/mpu/head.S b/xen/arch/arm/arm32/mpu/head.S
> new file mode 100644
> index 0000000000..b2c5245e51
> --- /dev/null
> +++ b/xen/arch/arm/arm32/mpu/head.S
> @@ -0,0 +1,104 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Start-of-day code for an Armv8-R-AArch32 MPU system.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +/*
> + * Set up the memory attribute type tables and enable EL2 MPU and data cache.
> + * If the Background region is enabled, then the MPU uses the default memory
> + * map as the Background region for generating the memory
> + * attributes when MPU is disabled.
> + * Since the default memory map of the Armv8-R AArch32 architecture is
> + * IMPLEMENTATION DEFINED, we intend to turn off the Background region here.
> + *
> + * Clobbers r0
> + */
> +FUNC_LOCAL(enable_mpu)
> +    /* Set up memory attribute type tables */
> +    mov_w r0, MAIR0VAL
> +    mcr   CP32(r0, HMAIR0)
> +    mov_w r0, MAIR1VAL
> +    mcr   CP32(r0, HMAIR1)
> +
> +    mrc   CP32(r0, HSCTLR)
> +    bic   r0, r0, #SCTLR_ELx_BR       /* Disable Background region */
> +    orr   r0, r0, #SCTLR_Axx_ELx_M    /* Enable MPU */
> +    orr   r0, r0, #SCTLR_Axx_ELx_C    /* Enable D-cache */
> +    mcr   CP32(r0, HSCTLR)
> +    isb
> +
> +    ret
> +END(enable_mpu)
> +
> +/*
> + * Maps the various sections of Xen (described in xen.lds.S) as different MPU
> + * regions.
> + *
> + * Clobbers r0 - r5
> + *
> + */
> +FUNC(enable_boot_cpu_mm)
> +    /* Get the number of regions specified in MPUIR_EL2 */
> +    mrc   CP32(r5, MPUIR_EL2)
> +    and   r5, r5, #NUM_MPU_REGIONS_MASK
> +
> +    /* x0: region sel */
> +    mov   r0, #0
> +    /* Xen text section. */
> +    mov_w   r1, _stext
> +    mov_w   r2, _etext
> +    prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_TEXT_PRBAR
> +
> +    /* Xen read-only data section. */
> +    mov_w   r1, _srodata
> +    mov_w   r2, _erodata
> +    prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_RO_PRBAR
> +
> +    /* Xen read-only after init and data section. (RW data) */
> +    mov_w   r1, __ro_after_init_start
> +    mov_w   r2, __init_begin
> +    prepare_xen_region r0, r1, r2, r3, r4, r5
> +
> +    /* Xen code section. */
> +    mov_w   r1, __init_begin
> +    mov_w   r2, __init_data_begin
> +    prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_TEXT_PRBAR
> +
> +    /* Xen data and BSS section. */
> +    mov_w   r1, __init_data_begin
> +    mov_w   r2, __bss_end
> +    prepare_xen_region r0, r1, r2, r3, r4, r5
> +
> +#ifdef CONFIG_EARLY_PRINTK
> +    /* Xen early UART section. */
> +    mov_w   r1, CONFIG_EARLY_UART_BASE_ADDRESS
> +    mov_w   r2, (CONFIG_EARLY_UART_BASE_ADDRESS + CONFIG_EARLY_UART_SIZE)
> +    prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_DEVICE_PRBAR, attr_prlar=REGION_DEVICE_PRLAR
> +#endif
> +
> +    b    enable_mpu
> +END(enable_boot_cpu_mm)
> +
> +/*
> + * We don't yet support secondary CPUs bring-up. Implement a dummy helper to
> + * please the common code.
> + */
> +FUNC(enable_secondary_cpu_mm)
> +    PRINT("- SMP not enabled yet -\r\n")
> +1:  wfe
> +    b 1b
> +END(enable_secondary_cpu_mm)
> +
> +/*
> + * Local variables:
> + * mode: ASM
> + * indent-tabs-mode: nil
> + * End:
> + */
> diff --git a/xen/arch/arm/include/asm/arm32/sysregs.h b/xen/arch/arm/include/asm/arm32/sysregs.h
> index 22871999af..8d7b95d982 100644
> --- a/xen/arch/arm/include/asm/arm32/sysregs.h
> +++ b/xen/arch/arm/include/asm/arm32/sysregs.h
> @@ -20,6 +20,15 @@
>   * uses r0 as a placeholder register. */
>  #define CMD_CP32(name...)      "mcr " __stringify(CP32(r0, name)) ";"
>  
> +#define REGION_TEXT_PRBAR       0x18    /* SH=11 AP=10 XN=0 */
> +#define REGION_RO_PRBAR         0x1D    /* SH=11 AP=10 XN=1 */
> +#define REGION_DATA_PRBAR       0x19    /* SH=11 AP=00 XN=1 */
> +#define REGION_DEVICE_PRBAR     0x11    /* SH=10 AP=00 XN=1 */
> +
> +#ifdef __ASSEMBLY__
In previous patch, you had empty lines surrounding the macro.

> +#define WRITE_SYSREG_ASM(v, name) mcr CP32(v, name)
Hmm, for arm64 you surrounded msr within "". Any reason for these style changes?

> +#endif /* __ASSEMBLY__ */
Why #endif given ...

> +
>  #ifndef __ASSEMBLY__
this one?

>  
>  /* C wrappers */
> diff --git a/xen/arch/arm/include/asm/cpregs.h b/xen/arch/arm/include/asm/cpregs.h
> index aec9e8f329..a7503a190f 100644
> --- a/xen/arch/arm/include/asm/cpregs.h
> +++ b/xen/arch/arm/include/asm/cpregs.h
> @@ -1,6 +1,8 @@
>  #ifndef __ASM_ARM_CPREGS_H
>  #define __ASM_ARM_CPREGS_H
>  
> +#include 
> +
>  /*
>   * AArch32 Co-processor registers.
>   *
> diff --git a/xen/arch/arm/include/asm/mpu/cpregs.h b/xen/arch/arm/include/asm/mpu/cpregs.h
> new file mode 100644
> index 0000000000..e2f3b2264c
> --- /dev/null
> +++ b/xen/arch/arm/include/asm/mpu/cpregs.h
> @@ -0,0 +1,27 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +
> +#ifndef __ASM_ARM_MPU_CPREGS_H
There are already 4 header files in this directory. Why don't you look at them
to get a hint as for naming the header guards? You don't need ASM here.

> +#define __ASM_ARM_MPU_CPREGS_H
> +
> +#ifdef CONFIG_ARM_32
If you look at cpregs.h, we only use #ifdef CONFIG_ARM_32 to protect aliases.
I'd prefer to follow the same rules here.

> +
> +/* CP15 CR0: MPU Type Register */
> +#define HMPUIR          p15,4,c0,c0,4
> +
> +/* CP15 CR6: MPU Protection Region Base/Limit/Select Address Register */
> +#define HPRSELR         p15,4,c6,c2,1
> +#define PRBAR_EL2       p15,4,c6,c3,0
> +#define PRLAR_EL2       p15,4,c6,c8,1
> +
> +#define MPUIR_EL2       HMPUIR
> +#define PRSELR_EL2      HPRSELR
> +
> +#endif /* CONFIG_ARM_32 */
Emtpy line here

> +#endif /* __ASM_ARM_MPU_CPREGS_H */
> +
> +/*
> + * Local variables:
> + * mode: ASM
This is not ASM file.

~Michal



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Date: Mon, 14 Apr 2025 10:41:33 +0200
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v6 3/3] xen/arm32: mpu: Stubs to build MPU for arm32
To: Ayan Kumar Halder ,
 xen-devel@lists.xenproject.org
Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
 Volodymyr Babchuk ,
 Luca Fancellu 
References: <20250411110452.3748186-1-ayan.kumar.halder@amd.com>
 <20250411110452.3748186-4-ayan.kumar.halder@amd.com>
From: "Orzel, Michal" 
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On 11/04/2025 13:04, Ayan Kumar Halder wrote:
> Add stubs to enable compilation.
> 
> is_xen_heap_page() and is_xen_heap_mfn() are not implemented for arm32 MPU.
> Thus, introduce the stubs for these functions in asm/mpu/mm.h and move the
> original code to asm/mmu/mm.h (as it is used for arm32 MMU based system).
> 
> Signed-off-by: Ayan Kumar Halder 
> Reviewed-by: Luca Fancellu 
Reviewed-by: Michal Orzel 

~Michal



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Subject: Re: [PATCH 2/5] xen/io: provide helpers for multi size MMIO accesses
To: Julien Grall 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel ,
 Stefano Stabellini , xen-devel@lists.xenproject.org,
 Roger Pau Monne 
References: <20250411105411.22334-1-roger.pau@citrix.com>
 <20250411105411.22334-3-roger.pau@citrix.com>
 
 <28db4a69-ea60-4c4d-a6e8-0dcc548a9e75@xen.org>
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On 14.04.2025 09:49, Julien Grall wrote:
> On 14/04/2025 15:07, Jan Beulich wrote:
>> On 11.04.2025 12:54, Roger Pau Monne wrote:
>>> Several handlers have the same necessity of reading from an MMIO region
>>> using 1, 2, 4 or 8 bytes accesses.  So far this has been open-coded in the
>>> function itself.  Instead provide a new handler that encapsulates the
>>> accesses.
>>>
>>> Since the added helpers are not architecture specific, introduce a new
>>> generic io.h header.
>>
>> Except that ...
>>
>>> --- /dev/null
>>> +++ b/xen/include/xen/io.h
>>> @@ -0,0 +1,63 @@
>>> +/* SPDX-License-Identifier: GPL-2.0-only */
>>> +/*
>>> + * Generic helpers for doing MMIO accesses.
>>> + *
>>> + * Copyright (c) 2025 Cloud Software Group
>>> + */
>>> +#ifndef XEN_IO_H
>>> +#define XEN_IO_H
>>> +
>>> +#include 
>>> +
>>> +#include 
>>> +
>>> +static inline uint64_t read_mmio(const volatile void __iomem *mem,
>>> +                                 unsigned int size)
>>> +{
>>> +    switch ( size )
>>> +    {
>>> +    case 1:
>>> +        return readb(mem);
>>> +
>>> +    case 2:
>>> +        return readw(mem);
>>> +
>>> +    case 4:
>>> +        return readl(mem);
>>> +
>>> +    case 8:
>>> +        return readq(mem);
>>
>> ... this and ...
>>
>>> +    }
>>> +
>>> +    ASSERT_UNREACHABLE();
>>> +    return ~0UL;
>>> +}
>>> +
>>> +static inline void write_mmio(volatile void __iomem *mem, uint64_t data,
>>> +                              unsigned int size)
>>> +{
>>> +    switch ( size )
>>> +    {
>>> +    case 1:
>>> +        writeb(data, mem);
>>> +        break;
>>> +
>>> +    case 2:
>>> +        writew(data, mem);
>>> +        break;
>>> +
>>> +    case 4:
>>> +        writel(data, mem);
>>> +        break;
>>> +
>>> +    case 8:
>>> +        writeq(data, mem);
>>> +        break;
>>
>> ... this may (generally will) not work on 32-bit architectures. Add
>> CONFIG_64BIT conditionals? At which point return type / last parameter
>> type could move from uint64_t to unsigned long.
> 
> Technically arm32 bit supports 64-bit write because we mandate LPAE. I see this is used by the vPCI code. Are we expecting to have any 64-bit access?

vPCI is, I think, supposed to not see 64-bit accesses (to config space).
However, vMSI-X already may see such.

Jan


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References: <20250213130007.1418890-1-ruanjinjie@huawei.com>
From: Jinjie Ruan 
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On 2025/2/13 20:59, Jinjie Ruan wrote:
> Currently, x86, Riscv, Loongarch use the generic entry. Convert arm64
> to use the generic entry infrastructure from kernel/entry/*. The generic
> entry makes maintainers' work easier and codes more elegant, which will
> make PREEMPT_DYNAMIC and PREEMPT_LAZY available and remove a lot of
> duplicate code.
> 
> This patch series split the generic entry into generic irq entry and
> generic syscall entry first, and then convert arm64 to use the generic
> irq entry. arm64 will be completely converted to generic entry in another
> patch series.
> 
> The main convert steps are as follows:
> - Split generic entry into generic irq entry and generic syscall to
>   make the single patch more concentrated in switching to one thing.
> - Make arm64 easier to use irqentry_enter/exit().
> - Make arm64 closer to the PREEMPT_DYNAMIC code of generic entry.
> - Switch to generic irq entry.

Gentle Ping.

> 
> Changes in v6:
> - Rebased on 6.14 rc2 next.
> - Put the syscall bits aside and split it out.
> - Have the split patch before the arm64 changes.
> - Merge some tightly coupled patches.
> - Adjust the order of some patches to make them more reasonable.
> - Define regs_irqs_disabled() by inline function.
> - Define interrupts_enabled() in terms of regs_irqs_disabled().
> - Delete the fast_interrupts_enabled() macro.
> - irqentry_state_t -> arm64_irqentry_state_t.
> - Remove arch_exit_to_user_mode_prepare() and pull local_daif_mask() later
>   in the arm64 exit sequence
> - Update the commit message.
> 
> Changes in v5:
> - Not change arm32 and keep inerrupts_enabled() macro for gicv3 driver.
> - Move irqentry_state definition into arch/arm64/kernel/entry-common.c.
> - Avoid removing the __enter_from_*() and __exit_to_*() wrappers.
> - Update "irqentry_state_t ret/irq_state" to "state"
>   to keep it consistently.
> - Use generic irq entry header for PREEMPT_DYNAMIC after split
>   the generic entry.
> - Also refactor the ARM64 syscall code.
> - Introduce arch_ptrace_report_syscall_entry/exit(), instead of
>   arch_pre/post_report_syscall_entry/exit() to simplify code.
> - Make the syscall patches clear separation.
> - Update the commit message.
> 
> Changes in v4:
> - Rework/cleanup split into a few patches as Mark suggested.
> - Replace interrupts_enabled() macro with regs_irqs_disabled(), instead
>   of left it here.
> - Remove rcu and lockdep state in pt_regs by using temporary
>   irqentry_state_t as Mark suggested.
> - Remove some unnecessary intermediate functions to make it clear.
> - Rework preempt irq and PREEMPT_DYNAMIC code
>   to make the switch more clear.
> - arch_prepare_*_entry/exit() -> arch_pre_*_entry/exit().
> - Expand the arch functions comment.
> - Make arch functions closer to its caller.
> - Declare saved_reg in for block.
> - Remove arch_exit_to_kernel_mode_prepare(), arch_enter_from_kernel_mode().
> - Adjust "Add few arch functions to use generic entry" patch to be
>   the penultimate.
> - Update the commit message.
> - Add suggested-by.
> 
> Changes in v3:
> - Test the MTE test cases.
> - Handle forget_syscall() in arch_post_report_syscall_entry()
> - Make the arch funcs not use __weak as Thomas suggested, so move
>   the arch funcs to entry-common.h, and make arch_forget_syscall() folded
>   in arch_post_report_syscall_entry() as suggested.
> - Move report_single_step() to thread_info.h for arm64
> - Change __always_inline() to inline, add inline for the other arch funcs.
> - Remove unused signal.h for entry-common.h.
> - Add Suggested-by.
> - Update the commit message.
> 
> Changes in v2:
> - Add tested-by.
> - Fix a bug that not call arch_post_report_syscall_entry() in
>   syscall_trace_enter() if ptrace_report_syscall_entry() return not zero.
> - Refactor report_syscall().
> - Add comment for arch_prepare_report_syscall_exit().
> - Adjust entry-common.h header file inclusion to alphabetical order.
> - Update the commit message.
> 
> Jinjie Ruan (8):
>   entry: Split generic entry into generic exception and syscall entry
>   arm64: ptrace: Replace interrupts_enabled() with regs_irqs_disabled()
>   arm64: entry: Refactor the entry and exit for exceptions from EL1
>   arm64: entry: Rework arm64_preempt_schedule_irq()
>   arm64: entry: Use preempt_count() and need_resched() helper
>   arm64: entry: Refactor preempt_schedule_irq() check code
>   arm64: entry: Move arm64_preempt_schedule_irq() into
>     __exit_to_kernel_mode()
>   arm64: entry: Switch to generic IRQ entry
> 
>  MAINTAINERS                           |   1 +
>  arch/Kconfig                          |   9 +
>  arch/arm64/Kconfig                    |   1 +
>  arch/arm64/include/asm/daifflags.h    |   2 +-
>  arch/arm64/include/asm/entry-common.h |  56 ++++
>  arch/arm64/include/asm/preempt.h      |   2 -
>  arch/arm64/include/asm/ptrace.h       |  13 +-
>  arch/arm64/include/asm/xen/events.h   |   2 +-
>  arch/arm64/kernel/acpi.c              |   2 +-
>  arch/arm64/kernel/debug-monitors.c    |   2 +-
>  arch/arm64/kernel/entry-common.c      | 378 ++++++++-----------------
>  arch/arm64/kernel/sdei.c              |   2 +-
>  arch/arm64/kernel/signal.c            |   3 +-
>  include/linux/entry-common.h          | 382 +------------------------
>  include/linux/irq-entry-common.h      | 389 ++++++++++++++++++++++++++
>  kernel/entry/Makefile                 |   3 +-
>  kernel/entry/common.c                 | 176 ++----------
>  kernel/entry/syscall-common.c         | 159 +++++++++++
>  kernel/sched/core.c                   |   8 +-
>  19 files changed, 766 insertions(+), 824 deletions(-)
>  create mode 100644 arch/arm64/include/asm/entry-common.h
>  create mode 100644 include/linux/irq-entry-common.h
>  create mode 100644 kernel/entry/syscall-common.c
> 


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Date: Mon, 14 Apr 2025 11:32:01 +0200
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Subject: Re: [PATCH v1 08/14] xen/riscv: imsic_init() implementation
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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In-Reply-To: <09e0fcd64f97062441a68102ead520b818150fe9.1744126720.git.oleksii.kurochko@gmail.com>
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On 08.04.2025 17:57, Oleksii Kurochko wrote:
> --- /dev/null
> +++ b/xen/arch/riscv/imsic.c
> @@ -0,0 +1,286 @@
> +/* SPDX-License-Identifier: MIT */
> +
> +/*
> + * xen/arch/riscv/imsic.c
> + *
> + * RISC-V Incoming MSI Controller support
> + *
> + * (c) 2023 Microchip Technology Inc.
> + * (c) 2024 Vates

No 2025 here (if already the years matter)?

> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include 
> +
> +static struct imsic_config imsic_cfg;
> +
> +const struct imsic_config *imsic_get_config(void)

Does this need to return a pointer to non-const?

> +{
> +    return &imsic_cfg;
> +}
> +
> +static int __init imsic_get_parent_hartid(struct dt_device_node *node,
> +                                          unsigned int index,
> +                                          unsigned long *hartid)
> +{
> +    int res;
> +    unsigned long hart;
> +    struct dt_phandle_args args;
> +
> +    /* Try the new-style interrupts-extended first */

The comment says "first", but then ...

> +    res = dt_parse_phandle_with_args(node, "interrupts-extended",
> +                                     "#interrupt-cells", index, &args);
> +    if ( !res )
> +    {
> +        res = riscv_of_processor_hartid(args.np->parent, &hart);
> +        if ( res < 0 )
> +            return -EINVAL;
> +
> +        *hartid = hart;
> +    }
> +    return res;
> +}

... nothing else is being tried.

Also, nit: Blank line please ahead of the main "return" of a function.

Further - any particular reason to discard riscv_of_processor_hartid()'s
error code on the error path?

> +
> +

Nit: No double blank lines please (and I wish I wouldn't need to repeat
this any further).

> +static int imsic_parse_node(struct dt_device_node *node,
> +                     unsigned int *nr_parent_irqs)
> +{
> +    int rc;
> +    unsigned int tmp;
> +    paddr_t base_addr;
> +
> +    /* Find number of parent interrupts */
> +    *nr_parent_irqs = dt_number_of_irq(node);
> +    if ( !*nr_parent_irqs )
> +    {
> +        printk(XENLOG_ERR "%s: no parent irqs available\n", node->name);
> +        return -ENOENT;
> +    }
> +
> +    /* Find number of guest index bits in MSI address */
> +    rc = dt_property_read_u32(node, "riscv,guest-index-bits",
> +                              &imsic_cfg.guest_index_bits);
> +    if ( !rc )

It is confusing to store a bool return value in a local "int" variable,
just to then use it as boolean. Is the local var needed at all here?

> +        imsic_cfg.guest_index_bits = 0;
> +    tmp = BITS_PER_LONG - IMSIC_MMIO_PAGE_SHIFT;
> +    if ( tmp < imsic_cfg.guest_index_bits )
> +    {
> +        printk(XENLOG_ERR "%s: guest index bits too big\n", node->name);
> +        return -ENOENT;
> +    }
> +
> +    /* Find number of HART index bits */
> +    rc = dt_property_read_u32(node, "riscv,hart-index-bits",
> +                              &imsic_cfg.hart_index_bits);
> +    if ( !rc )
> +    {
> +        /* Assume default value */
> +        imsic_cfg.hart_index_bits = fls(*nr_parent_irqs);
> +        if ( BIT(imsic_cfg.hart_index_bits, UL) < *nr_parent_irqs )
> +            imsic_cfg.hart_index_bits++;
> +    }
> +    tmp = BITS_PER_LONG - IMSIC_MMIO_PAGE_SHIFT -
> +          imsic_cfg.guest_index_bits;

    tmp -= imsic_cfg.guest_index_bits;

? (And then similarly further down.)

> +    if ( tmp < imsic_cfg.hart_index_bits )
> +    {
> +        printk(XENLOG_ERR "%s: HART index bits too big\n", node->name);
> +        return -ENOENT;
> +    }
> +
> +    /* Find number of group index bits */
> +    rc = dt_property_read_u32(node, "riscv,group-index-bits",
> +                              &imsic_cfg.group_index_bits);
> +    if ( !rc )
> +        imsic_cfg.group_index_bits = 0;
> +    tmp = BITS_PER_LONG - IMSIC_MMIO_PAGE_SHIFT -
> +          imsic_cfg.guest_index_bits - imsic_cfg.hart_index_bits;
> +    if ( tmp < imsic_cfg.group_index_bits )
> +    {
> +        printk(XENLOG_ERR "%s: group index bits too big\n", node->name);
> +        return -ENOENT;
> +    }
> +
> +    /* Find first bit position of group index */
> +    tmp = IMSIC_MMIO_PAGE_SHIFT * 2;
> +    rc = dt_property_read_u32(node, "riscv,group-index-shift",
> +                              &imsic_cfg.group_index_shift);
> +    if ( !rc )
> +        imsic_cfg.group_index_shift = tmp;
> +    if ( imsic_cfg.group_index_shift < tmp )
> +    {
> +        printk(XENLOG_ERR "%s: group index shift too small\n", node->name);
> +        return -ENOENT;
> +    }
> +    tmp = imsic_cfg.group_index_bits + imsic_cfg.group_index_shift - 1;
> +    if ( tmp >= BITS_PER_LONG )
> +    {
> +        printk(XENLOG_ERR "%s: group index shift too big\n", node->name);
> +        return -EINVAL;
> +    }
> +
> +    /* Find number of interrupt identities */
> +    rc = dt_property_read_u32(node, "riscv,num-ids", &imsic_cfg.nr_ids);
> +    if ( !rc )
> +    {
> +        printk(XENLOG_ERR "%s: number of interrupt identities not found\n",
> +               node->name);
> +        return -ENOENT;
> +    }
> +
> +    if ( (imsic_cfg.nr_ids < IMSIC_MIN_ID) ||
> +         (imsic_cfg.nr_ids >= IMSIC_MAX_ID) ||

Something named "max" normally wants to decribe the highest valid value,
not the first out-of-range one.

> +         ((imsic_cfg.nr_ids & IMSIC_MIN_ID) != IMSIC_MIN_ID) )
> +    {
> +        printk(XENLOG_ERR "%s: invalid number of interrupt identities\n",
> +               node->name);
> +        return -EINVAL;
> +    }
> +
> +    /* Compute base address */
> +    imsic_cfg.nr_mmios = 0;
> +    rc = dt_device_get_address(node, imsic_cfg.nr_mmios, &base_addr, NULL);
> +    if (rc)

Nit: Style.

> +    {
> +        printk(XENLOG_ERR "%s: first MMIO resource not found\n", node->name);
> +        return -EINVAL;

Discarding "rc" again?

> +    }
> +
> +    imsic_cfg.base_addr = base_addr;
> +    imsic_cfg.base_addr &= ~(BIT(imsic_cfg.guest_index_bits +
> +                   imsic_cfg.hart_index_bits +
> +                   IMSIC_MMIO_PAGE_SHIFT, UL) - 1);
> +    imsic_cfg.base_addr &= ~((BIT(imsic_cfg.group_index_bits, UL) - 1) <<
> +                   imsic_cfg.group_index_shift);

Besides indentation being bogus here, why is it that you need to mask bits
off of the value read from DT? Wouldn't the expectation be that you get back
the true base address?

> +    /* Find number of MMIO register sets */
> +    imsic_cfg.nr_mmios++;
> +    while ( !dt_device_get_address(node, imsic_cfg.nr_mmios, &base_addr, NULL) )
> +        imsic_cfg.nr_mmios++;

And the base addresses of these aren't of interest? Oh, I see they're
fetched again further down.

Also - use do-while here?

> +    return 0;
> +}
> +
> +int __init imsic_init(struct dt_device_node *node)
> +{
> +    int rc;
> +    unsigned long reloff, hartid;
> +    uint32_t nr_parent_irqs, index, nr_handlers = 0;
> +    paddr_t base_addr;
> +
> +    /* Parse IMSIC node */
> +    rc = imsic_parse_node(node, &nr_parent_irqs);
> +    if ( rc )
> +        return rc;
> +
> +    /* Allocate MMIO resource array */
> +    imsic_cfg.mmios = xzalloc_array(struct imsic_mmios, imsic_cfg.nr_mmios);
> +    if ( !imsic_cfg.mmios )
> +        return -ENOMEM;
> +
> +    /* check MMIO register sets */
> +    for ( int i = 0; i < imsic_cfg.nr_mmios; i++ )

No plain int please for anything that can only be non-negative.

> +    {
> +        rc = dt_device_get_address(node, i, &imsic_cfg.mmios[i].base_addr,
> +                                   &imsic_cfg.mmios[i].size);
> +        if ( rc )
> +        {
> +            printk(XENLOG_ERR "%s:  unable to parse MMIO regset %d\n",
> +                   node->name, i);
> +            goto imsic_init_err;
> +        }
> +
> +        base_addr = imsic_cfg.mmios[i].base_addr;
> +        base_addr &= ~(BIT(imsic_cfg.guest_index_bits +
> +                   imsic_cfg.hart_index_bits +
> +                   IMSIC_MMIO_PAGE_SHIFT, UL) - 1);
> +        base_addr &= ~((BIT(imsic_cfg.group_index_bits, UL) - 1) <<
> +                   imsic_cfg.group_index_shift);

Indentation again.

> +        if ( base_addr != imsic_cfg.base_addr )
> +        {
> +            rc = -EINVAL;
> +            printk(XENLOG_ERR "%s: address mismatch for regset %d\n",
> +                   node->name, i);
> +            goto imsic_init_err;
> +        }

Oh, all of the addresses need to (sufficiently) match.

> +    }
> +
> +    /* Configure handlers for target CPUs */
> +    for ( int i = 0; i < nr_parent_irqs; i++ )
> +    {
> +        rc = imsic_get_parent_hartid(node, i, &hartid);
> +        if ( rc )
> +        {
> +            printk(XENLOG_WARNING "%s: hart ID for parent irq%d not found\n",
> +                   node->name, i);
> +            continue;
> +        }
> +
> +        if ( hartid > NR_CPUS )
> +        {
> +            printk(XENLOG_WARNING "%s: unsupported hart ID=%lu for parent irq%d\n",
> +                   node->name, hartid, i);
> +            continue;
> +        }
> +
> +        /* Find MMIO location of MSI page */
> +        index = imsic_cfg.nr_mmios;
> +        reloff = i * BIT(imsic_cfg.guest_index_bits, UL) * IMSIC_MMIO_PAGE_SZ;
> +        for ( int j = 0; imsic_cfg.nr_mmios; j++ )
> +        {
> +            if ( reloff < imsic_cfg.mmios[j].size )
> +            {
> +                index = j;
> +                break;
> +            }
> +
> +            /*
> +             * MMIO region size may not be aligned to
> +             * BIT(global->guest_index_bits) * IMSIC_MMIO_PAGE_SZ
> +             * if holes are present.
> +             */
> +            reloff -= ROUNDUP(imsic_cfg.mmios[j].size,
> +                BIT(imsic_cfg.guest_index_bits, UL) * IMSIC_MMIO_PAGE_SZ);
> +        }
> +
> +        if ( index >= imsic_cfg.nr_mmios )
> +        {
> +            printk(XENLOG_WARNING "%s: MMIO not found for parent irq%d\n",
> +                   node->name, i);
> +            continue;
> +        }
> +
> +        if ( !IS_ALIGNED(imsic_cfg.msi[hartid].base_addr + reloff, PAGE_SIZE) )
> +        {
> +            printk(XENLOG_WARNING "%s: MMIO address 0x%lx is not aligned on a page\n",
> +                   node->name, imsic_cfg.msi[hartid].base_addr + reloff);
> +            imsic_cfg.msi[hartid].offset = 0;
> +            imsic_cfg.msi[hartid].base_addr = 0;
> +            continue;
> +        }
> +
> +        imsic_cfg.mmios[index].harts[hartid] = true;
> +        imsic_cfg.msi[hartid].base_addr = imsic_cfg.mmios[index].base_addr;
> +        imsic_cfg.msi[hartid].offset = reloff;
> +        nr_handlers++;
> +    }
> +
> +    if ( !nr_handlers )
> +    {
> +        printk(XENLOG_ERR "%s: No CPU handlers found\n", node->name);
> +        rc = -ENODEV;
> +        goto imsic_init_err;
> +    }
> +
> +    return 0;
> +
> +imsic_init_err:

Labels indented by at least one blank please.

> +    xfree(imsic_cfg.mmios);

Better use XFREE() in cases like this one?

> --- /dev/null
> +++ b/xen/arch/riscv/include/asm/imsic.h
> @@ -0,0 +1,66 @@
> +/* SPDX-License-Identifier: MIT */
> +
> +/*
> + * xen/arch/riscv/imsic.h
> + *
> + * RISC-V Incoming MSI Controller support
> + *
> + * (c) 2023 Microchip Technology Inc.
> + */
> +
> +#ifndef ASM__RISCV__IMSIC_H
> +#define ASM__RISCV__IMSIC_H
> +
> +#include 
> +
> +#define IMSIC_MMIO_PAGE_SHIFT   12
> +#define IMSIC_MMIO_PAGE_SZ      (1UL << IMSIC_MMIO_PAGE_SHIFT)
> +
> +#define IMSIC_MIN_ID            63
> +#define IMSIC_MAX_ID            2048
> +
> +struct imsic_msi {
> +    paddr_t base_addr;
> +    unsigned long offset;
> +};
> +
> +struct imsic_mmios {
> +    paddr_t base_addr;
> +    unsigned long size;
> +    bool harts[NR_CPUS];

An array of bool - won't a bitmap do here? Even then I wouldn't be overly
happy to see it dimensioned by NR_CPUS.

> +};
> +
> +struct imsic_config {
> +    /* base address */
> +    paddr_t base_addr;
> +
> +    /* Bits representing Guest index, HART index, and Group index */
> +    unsigned int guest_index_bits;
> +    unsigned int hart_index_bits;
> +    unsigned int group_index_bits;
> +    unsigned int group_index_shift;
> +
> +    /* imsic phandle */
> +    unsigned int phandle;
> +
> +    /* number of parent irq */
> +    unsigned int nr_parent_irqs;
> +
> +    /* number off interrupt identities */
> +    unsigned int nr_ids;
> +
> +    /* mmios */
> +    unsigned int nr_mmios;
> +    struct imsic_mmios *mmios;
> +
> +    /* MSI */
> +    struct imsic_msi msi[NR_CPUS];

You surely can avoid wasting perhaps a lot of memory by allocating this
based on the number of CPUs in use?

> +};
> +
> +struct dt_device_node;
> +int imsic_init(struct dt_device_node *n);

Misra demands that parameter names match between declaration and definition.

> +struct imsic_config;

I don't think you need this, as it's ...

> +const struct imsic_config *imsic_get_config(void);

... not used as parameter type (where its scope would otherwise be wrongly
limited).

Jan


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Message-ID: 
Date: Mon, 14 Apr 2025 10:42:51 +0100
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH] CI: fix waiting for final test message (again)
To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 , xen-devel@lists.xenproject.org
Cc: Doug Goldstein ,
 Stefano Stabellini 
References: <20250413134826.1366350-1-marmarek@invisiblethingslab.com>
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From: Andrew Cooper 
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In-Reply-To: <20250413134826.1366350-1-marmarek@invisiblethingslab.com>
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On 13/04/2025 2:47 pm, Marek Marczykowski-Górecki wrote:
> The previous attempt has correct diagnosis, but added -notransfer flag
> in a wrong place - it should be used in the first (outer) match out of
> two, not the second (inner) one.
>
> Fixes: 1e12cbd6af2c ("CI: fix waiting for final test message")
> Signed-off-by: Marek Marczykowski-Górecki 

Acked-by: Andrew Cooper 

> This actually fixes the issue described in the referenced commit. When
> that issue happens, it can be seen as a complete console output (up to
> Alpine login prompt), but test still failed.
> But that is not all the issues, sometimes it hangs really in the middle
> of dom0 boot, for example with last lines as:
>
>     [    1.816052] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
>     Poking KASLR using RDRAND RDTSC...
>     [    1.818089] Dynamic Preempt: voluntary
>     [    1.818251] rcu: Preemptible hierarchical RCU implementation.
>     [    1.818254] rcu: 	RCU event tracing is ena
>
> and sits there for over 120s.
>
> It's unclear to me yet whether it's a real dom0 hang, or an issue with
> grabbing console output. Debugging...

This is now the only failure I've been encountering, given the extensive
runs over the weekend.

~Andrew


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From: Mykyta Poturai 
To: "xen-devel@lists.xenproject.org" 
CC: Mykyta Poturai , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , Volodymyr
 Babchuk , Mykyta Poturai
	
Subject: [PATCH v2 1/2] arm: vgic: Add the ability to trigger MSIs from the
 Hypervisor
Thread-Topic: [PATCH v2 1/2] arm: vgic: Add the ability to trigger MSIs from
 the Hypervisor
Thread-Index: AQHbrSLDj8+kM3eLrkyegn+x6Pj4JA==
Date: Mon, 14 Apr 2025 09:51:15 +0000
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From: Mykyta Poturai 

Add the vgic_its_trigger_msi() function to the vgic interface. This
function allows to inject MSIs from the Hypervisor to the guest.
Which is useful for userspace PCI backend drivers.

Signed-off-by: Mykyta Poturai 
---
v1->v2:
* replace -1 with -ENOENT
* reduce guest memory access in vgic_its_trigger_msi
---
 xen/arch/arm/include/asm/vgic.h | 11 +++++++++++
 xen/arch/arm/vgic-v3-its.c      | 19 +++++++++++++++++++
 2 files changed, 30 insertions(+)

diff --git a/xen/arch/arm/include/asm/vgic.h b/xen/arch/arm/include/asm/vgi=
c.h
index e309dca1ad..3d8e3a8343 100644
--- a/xen/arch/arm/include/asm/vgic.h
+++ b/xen/arch/arm/include/asm/vgic.h
@@ -318,6 +318,17 @@ extern bool vgic_migrate_irq(struct vcpu *old, struct =
vcpu *new, unsigned int ir
 extern void vgic_check_inflight_irqs_pending(struct vcpu *v,
                                              unsigned int rank, uint32_t r=
);
=20
+#ifdef CONFIG_HAS_ITS
+int vgic_its_trigger_msi(struct domain *d, paddr_t doorbell_address,
+                                u32 devid, u32 eventid);
+#else
+static inline int vgic_its_trigger_msi(struct domain *d, paddr_t doorbell_=
address,
+                                u32 devid, u32 eventid)
+{
+    return -EOPNOTSUPP;
+}
+#endif /* CONFIG_HAS_ITS */
+
 #endif /* !CONFIG_NEW_VGIC */
=20
 /*** Common VGIC functions used by Xen arch code ****/
diff --git a/xen/arch/arm/vgic-v3-its.c b/xen/arch/arm/vgic-v3-its.c
index c65c1dbf52..be5bfe0d21 100644
--- a/xen/arch/arm/vgic-v3-its.c
+++ b/xen/arch/arm/vgic-v3-its.c
@@ -1484,6 +1484,25 @@ static int vgic_v3_its_init_virtual(struct domain *d=
, paddr_t guest_addr,
     return 0;
 }
=20
+int vgic_its_trigger_msi(struct domain *d, paddr_t doorbell_address,
+                                u32 devid, u32 eventid)
+{
+    struct pending_irq *pend;
+    unsigned int vcpu_id;
+
+    pend =3D gicv3_its_get_event_pending_irq(d,doorbell_address, devid, ev=
entid);
+    if ( !pend )
+        return -ENOENT;
+   =20
+    vcpu_id =3D ACCESS_ONCE(pend->lpi_vcpu_id);
+    if ( vcpu_id >=3D d->max_vcpus )
+          return -ENOENT;
+
+    vgic_inject_irq(d, d->vcpu[vcpu_id], pend->irq, true);
+
+    return 0;
+}
+
 unsigned int vgic_v3_its_count(const struct domain *d)
 {
     struct host_its *hw_its;
--=20
2.34.1


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From: Mykyta Poturai 
To: "xen-devel@lists.xenproject.org" 
CC: Mykyta Poturai , Stefano Stabellini
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	, Michal Orzel , Volodymyr
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Subject: [PATCH v2 0/2] Add support for MSI injection on Arm
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This series adds the base support for MSI injection on Arm. This is
needed to streamline virtio-pci interrupt triggering.

With this patches, MSIs can be triggered in guests by issuing the new
DM op, inject_msi2. This op is similar to inject_msi, but it allows
to specify the source id of the MSI.

We chose the approach of adding a new DM op instead of using the pad
field of inject_msi because we have no clear way of distinguishing
between set and unset pad fields. New implementations also adds flags
field to clearly specify if the SBDF is set.

Patches were tested on QEMU with QEMU virtio-pci backends, with=20
virtio-pci patches and patches for ITS support for DomUs applied.

Branch with all relevant Xen patches:
https://github.com/Deedone/xen/tree/4.20-dev%2Bvirtio

Branch with all relevant QEMU patches:
https://github.com/Deedone/qemu/tree/virtio-msi2

Mykyta Poturai (2):
  arm: vgic: Add the ability to trigger MSIs from the Hypervisor
  xen/dm: arm: Introduce inject_msi2 DM op

 tools/include/xendevicemodel.h               | 14 ++++++++++++++
 tools/libs/devicemodel/core.c                | 20 ++++++++++++++++++++
 tools/libs/devicemodel/libxendevicemodel.map |  5 +++++
 xen/arch/arm/dm.c                            | 17 +++++++++++++++++
 xen/arch/arm/include/asm/vgic.h              | 11 +++++++++++
 xen/arch/arm/vgic-v3-its.c                   | 19 +++++++++++++++++++
 xen/arch/x86/hvm/dm.c                        | 18 ++++++++++++++++++
 xen/include/public/hvm/dm_op.h               | 18 ++++++++++++++++++
 8 files changed, 122 insertions(+)

--=20
2.34.1


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From: Mykyta Poturai 
To: "xen-devel@lists.xenproject.org" 
CC: Mykyta Poturai , Anthony PERARD
	, Juergen Gross , Andrew Cooper
	, Jan Beulich , Julien Grall
	, Stefano Stabellini , Bertrand
 Marquis , Michal Orzel ,
	Volodymyr Babchuk ,
	=?iso-8859-1?Q?Roger_Pau_Monn=E9?= , Mykyta Poturai
	
Subject: [PATCH v2 2/2] xen/dm: arm: Introduce inject_msi2 DM op
Thread-Topic: [PATCH v2 2/2] xen/dm: arm: Introduce inject_msi2 DM op
Thread-Index: AQHbrSLDkG1zT9bAeU6MKrLu8tJrtQ==
Date: Mon, 14 Apr 2025 09:51:16 +0000
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From: Mykyta Poturai 

Add the second version of inject_msi DM op, which allows to specify
the source_id of an MSI interrupt. This is needed for correct MSI
injection on ARM.

It would not be safe to include the source_id in the original inject_msi
in the pad field, because we have no way to know if it is set or not.

Signed-off-by: Mykyta Poturai 
---
v1->v2:
* fix warning for ignored source_id
* rework xen_dm_op_inject_msi2 struct
* rework xendevicemodel_inject_msi2 params
---
 tools/include/xendevicemodel.h               | 14 ++++++++++++++
 tools/libs/devicemodel/core.c                | 20 ++++++++++++++++++++
 tools/libs/devicemodel/libxendevicemodel.map |  5 +++++
 xen/arch/arm/dm.c                            | 17 +++++++++++++++++
 xen/arch/x86/hvm/dm.c                        | 18 ++++++++++++++++++
 xen/include/public/hvm/dm_op.h               | 18 ++++++++++++++++++
 6 files changed, 92 insertions(+)

diff --git a/tools/include/xendevicemodel.h b/tools/include/xendevicemodel.=
h
index 227e7fd810..d0847dfdc8 100644
--- a/tools/include/xendevicemodel.h
+++ b/tools/include/xendevicemodel.h
@@ -236,6 +236,20 @@ int xendevicemodel_inject_msi(
     xendevicemodel_handle *dmod, domid_t domid, uint64_t msi_addr,
     uint32_t msi_data);
=20
+/**
+ * This function injects an MSI into a guest.
+ *
+ * @parm dmod a handle to an open devicemodel interface.
+ * @parm domid the domain id to be serviced
+ * @parm msi_addr the MSI address
+ * @parm source_id the PCI SBDF of the source device
+ * @parm msi_data the MSI data
+ * @return 0 on success, -1 on failure.
+*/
+int xendevicemodel_inject_msi2(
+    xendevicemodel_handle *dmod, domid_t domid, uint64_t addr, uint32_t so=
urce_id,
+    uint32_t data);
+
 /**
  * This function enables tracking of changes in the VRAM area.
  *
diff --git a/tools/libs/devicemodel/core.c b/tools/libs/devicemodel/core.c
index 8e619eeb0a..92db92e89b 100644
--- a/tools/libs/devicemodel/core.c
+++ b/tools/libs/devicemodel/core.c
@@ -448,6 +448,26 @@ int xendevicemodel_set_irq_level(
     return xendevicemodel_op(dmod, domid, 1, &op, sizeof(op));
 }
=20
+int xendevicemodel_inject_msi2(
+    xendevicemodel_handle *dmod, domid_t domid, uint64_t addr, uint32_t so=
urce_id,
+    uint32_t data)
+{
+    uint16_t segment =3D source_id >> 16;
+    uint16_t bdf =3D source_id & 0xffff;
+    struct xen_dm_op op =3D {
+        .op =3D XEN_DMOP_inject_msi2,
+        .u.inject_msi2 =3D {
+            .addr =3D addr,
+            .data =3D data,
+            .segment =3D segment,
+            .source_id =3D bdf,
+            .flags =3D XEN_DMOP_MSI_SOURCE_ID_VALID,
+        },
+    };
+
+    return xendevicemodel_op(dmod, domid, 1, &op, sizeof(op));
+}
+
 int xendevicemodel_set_pci_link_route(
     xendevicemodel_handle *dmod, domid_t domid, uint8_t link, uint8_t irq)
 {
diff --git a/tools/libs/devicemodel/libxendevicemodel.map b/tools/libs/devi=
cemodel/libxendevicemodel.map
index f7f9e3d932..aa05768642 100644
--- a/tools/libs/devicemodel/libxendevicemodel.map
+++ b/tools/libs/devicemodel/libxendevicemodel.map
@@ -44,3 +44,8 @@ VERS_1.4 {
 		xendevicemodel_set_irq_level;
 		xendevicemodel_nr_vcpus;
 } VERS_1.3;
+
+VERS_1.5 {
+	global:
+		xendevicemodel_inject_msi2;
+} VERS_1.4;
diff --git a/xen/arch/arm/dm.c b/xen/arch/arm/dm.c
index 773a0a2592..a1340b45a3 100644
--- a/xen/arch/arm/dm.c
+++ b/xen/arch/arm/dm.c
@@ -27,6 +27,7 @@ int dm_op(const struct dmop_args *op_args)
         [XEN_DMOP_set_ioreq_server_state]           =3D sizeof(struct xen_=
dm_op_set_ioreq_server_state),
         [XEN_DMOP_destroy_ioreq_server]             =3D sizeof(struct xen_=
dm_op_destroy_ioreq_server),
         [XEN_DMOP_set_irq_level]                    =3D sizeof(struct xen_=
dm_op_set_irq_level),
+        [XEN_DMOP_inject_msi2]                      =3D sizeof(struct xen_=
dm_op_inject_msi2),
         [XEN_DMOP_nr_vcpus]                         =3D sizeof(struct xen_=
dm_op_nr_vcpus),
     };
=20
@@ -112,6 +113,22 @@ int dm_op(const struct dmop_args *op_args)
         break;
     }
=20
+    case XEN_DMOP_inject_msi2:
+    {
+        const struct xen_dm_op_inject_msi2 *data =3D &op.u.inject_msi2;
+        uint32_t pci_sbdf =3D data->segment << 16 | data->source_id;
+
+        if ( !(data->flags & XEN_DMOP_MSI_SOURCE_ID_VALID) || data->pad ||=
=20
+             data->flags & ~XEN_DMOP_MSI_SOURCE_ID_VALID )
+        {
+            rc =3D -EINVAL;
+            break;
+        }
+
+        rc =3D vgic_its_trigger_msi(d, data->addr, pci_sbdf, data->data);
+        break;
+
+    }
     case XEN_DMOP_nr_vcpus:
     {
         struct xen_dm_op_nr_vcpus *data =3D &op.u.nr_vcpus;
diff --git a/xen/arch/x86/hvm/dm.c b/xen/arch/x86/hvm/dm.c
index 462691f91d..da0a00844b 100644
--- a/xen/arch/x86/hvm/dm.c
+++ b/xen/arch/x86/hvm/dm.c
@@ -344,6 +344,7 @@ int dm_op(const struct dmop_args *op_args)
         [XEN_DMOP_set_mem_type]                     =3D sizeof(struct xen_=
dm_op_set_mem_type),
         [XEN_DMOP_inject_event]                     =3D sizeof(struct xen_=
dm_op_inject_event),
         [XEN_DMOP_inject_msi]                       =3D sizeof(struct xen_=
dm_op_inject_msi),
+        [XEN_DMOP_inject_msi2]                      =3D sizeof(struct xen_=
dm_op_inject_msi2),
         [XEN_DMOP_map_mem_type_to_ioreq_server]     =3D sizeof(struct xen_=
dm_op_map_mem_type_to_ioreq_server),
         [XEN_DMOP_remote_shutdown]                  =3D sizeof(struct xen_=
dm_op_remote_shutdown),
         [XEN_DMOP_relocate_memory]                  =3D sizeof(struct xen_=
dm_op_relocate_memory),
@@ -539,6 +540,23 @@ int dm_op(const struct dmop_args *op_args)
         break;
     }
=20
+    case XEN_DMOP_inject_msi2:
+    {
+        const struct xen_dm_op_inject_msi2 *data =3D &op.u.inject_msi2;
+
+        if ( data->pad || data->flags & ~XEN_DMOP_MSI_SOURCE_ID_VALID )
+        {
+            rc =3D -EINVAL;
+            break;
+        }
+
+        if ( data->flags & XEN_DMOP_MSI_SOURCE_ID_VALID )
+            gprintk(XENLOG_WARNING "XEN_DMOP_inject_msi2: source_id is ign=
ored\n");
+
+        rc =3D hvm_inject_msi(d, data->addr, data->data);
+        break;
+    }
+
     case XEN_DMOP_remote_shutdown:
     {
         const struct xen_dm_op_remote_shutdown *data =3D
diff --git a/xen/include/public/hvm/dm_op.h b/xen/include/public/hvm/dm_op.=
h
index 2bf0fdc1ae..4141af4300 100644
--- a/xen/include/public/hvm/dm_op.h
+++ b/xen/include/public/hvm/dm_op.h
@@ -444,6 +444,23 @@ struct xen_dm_op_nr_vcpus {
 };
 typedef struct xen_dm_op_nr_vcpus xen_dm_op_nr_vcpus_t;
=20
+#define XEN_DMOP_inject_msi2 21
+
+struct xen_dm_op_inject_msi2 {
+      /* IN - MSI data */
+      uint32_t data;
+      /* IN - next two fields form an ID of the device triggering the MSI =
*/
+      uint16_t segment; /* The segment number */
+      uint16_t source_id; /* The source ID that is local to segment (PCI B=
DF) */
+      /* IN - types of source ID */
+      uint32_t flags;
+#define XEN_DMOP_MSI_SOURCE_ID_VALID (1u << 0)
+      uint32_t pad;
+      /* IN - MSI address */
+      uint64_aligned_t addr;
+};
+typedef struct xen_dm_op_inject_msi2 xen_dm_op_inject_msi2_t;
+
 struct xen_dm_op {
     uint32_t op;
     uint32_t pad;
@@ -463,6 +480,7 @@ struct xen_dm_op {
         xen_dm_op_set_mem_type_t set_mem_type;
         xen_dm_op_inject_event_t inject_event;
         xen_dm_op_inject_msi_t inject_msi;
+        xen_dm_op_inject_msi2_t inject_msi2;
         xen_dm_op_map_mem_type_to_ioreq_server_t map_mem_type_to_ioreq_ser=
ver;
         xen_dm_op_remote_shutdown_t remote_shutdown;
         xen_dm_op_relocate_memory_t relocate_memory;
--=20
2.34.1


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Date: Mon, 14 Apr 2025 12:04:41 +0200
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Subject: Re: [PATCH v1 09/14] xen/riscv: aplic_init() implementation
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Romain Caritey , xen-devel@lists.xenproject.org
References: 
 <1d023045be49ae93d41d552f9c9a79972fa4e84b.1744126720.git.oleksii.kurochko@gmail.com>
Content-Language: en-US
From: Jan Beulich 
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In-Reply-To: <1d023045be49ae93d41d552f9c9a79972fa4e84b.1744126720.git.oleksii.kurochko@gmail.com>
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On 08.04.2025 17:57, Oleksii Kurochko wrote:
> --- a/xen/arch/riscv/aplic.c
> +++ b/xen/arch/riscv/aplic.c
> @@ -9,19 +9,112 @@
>   * Copyright (c) 2024-2025 Vates
>   */
>  
> +#include 
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
> +#include 
>  
> +#include 
>  #include 
> +#include 
>  #include 
> +#include 
> +
> +#define APLIC_DEFAULT_PRIORITY  1
> +
> +static struct aplic_priv aplic;
>  
>  static struct intc_info __ro_after_init aplic_info = {
>      .hw_version = INTC_APLIC,
>  };
>  
> +static void __init aplic_init_hw_interrupts(void)
> +{
> +    int i;
> +
> +    /* Disable all interrupts */
> +    for ( i = 0; i <= aplic_info.nr_irqs; i += 32 )
> +        aplic.regs->clrie[i] = -1U;
> +
> +    /* Set interrupt type and default priority for all interrupts */
> +    for ( i = 1; i <= aplic_info.nr_irqs; i++ )
> +    {
> +        aplic.regs->sourcecfg[i - 1] = 0;
> +        aplic.regs->target[i - 1] = APLIC_DEFAULT_PRIORITY;

A field named "target" is written with a priority value?

> +    }
> +
> +    /* Clear APLIC domaincfg */
> +    aplic.regs->domaincfg = APLIC_DOMAINCFG_IE | APLIC_DOMAINCFG_DM;

The statement doesn't like like there was any "clearing" here.

> +}
> +
> +static int __init aplic_init(void)
> +{
> +    int rc;
> +    dt_phandle imsic_phandle;
> +    uint32_t irq_range[2];
> +    const __be32 *prop;
> +    uint64_t size, paddr;
> +    struct dt_device_node *imsic_node;
> +    const struct dt_device_node *node = aplic_info.node;
> +
> +    /* check for associated imsic node */

Nit: Comment style (also elsewhere).

> +    rc = dt_property_read_u32(node, "msi-parent", &imsic_phandle);
> +    if ( !rc )
> +        panic("%s: IDC mode not supported\n", node->full_name);
> +
> +    imsic_node = dt_find_node_by_phandle(imsic_phandle);
> +    if ( !imsic_node )
> +        panic("%s: unable to find IMSIC node\n", node->full_name);
> +
> +    /* check imsic mode */
> +    rc = dt_property_read_u32_array(imsic_node, "interrupts-extended",
> +                                    irq_range, ARRAY_SIZE(irq_range));
> +    if ( rc && (rc != -EOVERFLOW) )
> +        panic("%s: unable to find interrupt-extended in %s node\n",
> +               node->full_name, imsic_node->full_name);

Why exactly is EOVERFLOW tolerable here?

> +    if ( irq_range[1] == IRQ_M_EXT )
> +        /* machine mode imsic node, ignore this aplic node */
> +        return 0;
> +
> +    rc = imsic_init(imsic_node);
> +    if ( rc )
> +        panic("%s: Failded to initialize IMSIC\n", node->full_name);
> +
> +    /* Find out number of interrupt sources */
> +    rc = dt_property_read_u32(node, "riscv,num-sources", &aplic_info.nr_irqs);
> +    if ( !rc )
> +        panic("%s: failed to get number of interrupt sources\n",
> +              node->full_name);
> +
> +    prop = dt_get_property(node, "reg", NULL);
> +    dt_get_range(&prop, node, &paddr, &size);
> +    if ( !paddr )
> +        panic("%s: first MMIO resource not found\n", node->full_name);
> +
> +    aplic.paddr_start = paddr;
> +    aplic.paddr_end = paddr + size;
> +    aplic.size = size;

Why do all three need recording? Isn't a (start,size) tuple sufficient
(and unambiguous)?

> +    aplic.regs = ioremap(paddr, size);
> +    if ( !aplic.regs )
> +        panic("%s: unable to map\n", node->full_name);
> +
> +    /* Setup initial state APLIC interrupts */
> +    aplic_init_hw_interrupts();
> +
> +    return 0;
> +}
> +
> +static const struct intc_hw_operations __ro_after_init aplic_ops = {

const or __ro_after_init?

> --- /dev/null
> +++ b/xen/arch/riscv/include/asm/aplic.h
> @@ -0,0 +1,77 @@
> +/* SPDX-License-Identifier: MIT */
> +
> +/*
> + * xen/arch/riscv/aplic.h
> + *
> + * RISC-V Advanced Platform-Level Interrupt Controller support
> + *
> + * Copyright (c) 2023 Microchip.
> + */
> +
> +#ifndef ASM__RISCV__APLIC_H
> +#define ASM__RISCV__APLIC_H
> +
> +#include 
> +
> +#include 
> +
> +#define APLIC_DOMAINCFG_IE      BIT(8, UL)
> +#define APLIC_DOMAINCFG_DM      BIT(2, UL)
> +
> +struct aplic_regs {
> +    uint32_t domaincfg;
> +    uint32_t sourcecfg[1023];
> +    uint8_t _reserved1[0xBC0];
> +
> +    uint32_t mmsiaddrcfg;
> +    uint32_t mmsiaddrcfgh;
> +    uint32_t smsiaddrcfg;
> +    uint32_t smsiaddrcfgh;
> +    uint8_t _reserved2[0x30];
> +
> +    uint32_t setip[32];
> +    uint8_t _reserved3[92];
> +
> +    uint32_t setipnum;
> +    uint8_t _reserved4[0x20];
> +
> +    uint32_t in_clrip[32];
> +    uint8_t _reserved5[92];
> +
> +    uint32_t clripnum;
> +    uint8_t _reserved6[32];
> +
> +    uint32_t setie[32];
> +    uint8_t _reserved7[92];
> +
> +    uint32_t setienum;
> +    uint8_t _reserved8[32];
> +
> +    uint32_t clrie[32];
> +    uint8_t _reserved9[92];
> +
> +    uint32_t clrienum;
> +    uint8_t _reserved10[32];
> +
> +    uint32_t setipnum_le;
> +    uint32_t setipnum_be;
> +    uint8_t _reserved11[4088];
> +
> +    uint32_t genmsi;
> +    uint32_t target[1023];
> +};
> +
> +struct aplic_priv {
> +    /* base physical address and size */
> +    paddr_t paddr_start;
> +    paddr_t paddr_end;
> +    size_t  size;
> +
> +    /* registers */
> +    volatile struct aplic_regs *regs;
> +
> +    /* imsic configuration */
> +    const struct imsic_config *imsic_cfg;
> +};
> +
> +#endif /* ASM__RISCV__APLIC_H */

Does all of this really need to live in a non-private header?

> --- a/xen/arch/riscv/include/asm/irq.h
> +++ b/xen/arch/riscv/include/asm/irq.h
> @@ -27,7 +27,6 @@
>  #define IRQ_TYPE_INVALID        DT_IRQ_TYPE_INVALID
>  
>  /* TODO */
> -#define nr_irqs 0U

How come this is simply no longer needed, i.e. without any replacement?
Hmm, looks like the only use in common code has gone away. Yet then this
still doesn't really look to belong here (especially if not mentioned in
the description).

Jan


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On 11/04/2025 16:56, Luca Fancellu wrote:
> From: Penny Zheng 
> 
> Introduce pr_t typedef which is a structure having the prbar
> and prlar members, each being structured as the registers of
> the aarch64 armv8-r architecture.
> 
> Introduce the array 'xen_mpumap' that will store a view of
> the content of the MPU regions.
> 
> Introduce MAX_MPU_REGIONS macro that uses the value of
> NUM_MPU_REGIONS_MASK just for clarity, because using the
> latter as number of elements of the xen_mpumap array might
> be misleading.
What should be the size of this array? I thought NUM_MPU_REGIONS indicates how
many regions there can be (i.e. 256) and this should be the size. Yet you use
MASK for size which is odd.

> 
> Signed-off-by: Penny Zheng 
> Signed-off-by: Wei Chen 
> Signed-off-by: Luca Fancellu 
> ---
>  xen/arch/arm/include/asm/arm64/mpu.h | 44 ++++++++++++++++++++++++++++
>  xen/arch/arm/include/asm/mpu.h       |  5 ++++
>  xen/arch/arm/mpu/mm.c                |  4 +++
>  3 files changed, 53 insertions(+)
>  create mode 100644 xen/arch/arm/include/asm/arm64/mpu.h
> 
> diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/asm/arm64/mpu.h
> new file mode 100644
> index 000000000000..4d2bd7d7877f
> --- /dev/null
> +++ b/xen/arch/arm/include/asm/arm64/mpu.h
> @@ -0,0 +1,44 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * mpu.h: Arm Memory Protection Unit definitions for aarch64.
NIT: Do we really see the benefit in having such generic comments? What if you
add a prototype of some function here. Will it fit into a definition scope?

> + */
> +
> +#ifndef __ARM_ARM64_MPU_H__
> +#define __ARM_ARM64_MPU_H__
> +
> +#ifndef __ASSEMBLY__
> +
> +/* Protection Region Base Address Register */
> +typedef union {
> +    struct __packed {
> +        unsigned long xn:2;       /* Execute-Never */
> +        unsigned long ap:2;       /* Acess Permission */
s/Acess/Access/

> +        unsigned long sh:2;       /* Sharebility */
s/Sharebility/Shareability/

> +        unsigned long base:46;    /* Base Address */
> +        unsigned long pad:12;
If you describe the register 1:1, why "pad" and not "res" or "res0"?

> +    } reg;
> +    uint64_t bits;
> +} prbar_t;
> +
> +/* Protection Region Limit Address Register */
> +typedef union {
> +    struct __packed {
> +        unsigned long en:1;     /* Region enable */
> +        unsigned long ai:3;     /* Memory Attribute Index */
> +        unsigned long ns:1;     /* Not-Secure */
> +        unsigned long res:1;    /* Reserved 0 by hardware */
res0 /* RES0 */

> +        unsigned long limit:46; /* Limit Address */
> +        unsigned long pad:12;
res1 /* RES0 */

> +    } reg;
> +    uint64_t bits;
> +} prlar_t;
> +
> +/* MPU Protection Region */
> +typedef struct {
> +    prbar_t prbar;
> +    prlar_t prlar;
> +} pr_t;
> +
> +#endif /* __ASSEMBLY__ */
> +
> +#endif /* __ARM_ARM64_MPU_H__ */
> \ No newline at end of file
Please add a new line at the end

Also, EMACS comment is missing.

> diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h
> index d4ec4248b62b..e148c705b82c 100644
> --- a/xen/arch/arm/include/asm/mpu.h
> +++ b/xen/arch/arm/include/asm/mpu.h
> @@ -6,6 +6,10 @@
>  #ifndef __ARM_MPU_H__
>  #define __ARM_MPU_H__
>  
> +#if defined(CONFIG_ARM_64)
> +# include 
> +#endif
> +
>  #define MPU_REGION_SHIFT  6
>  #define MPU_REGION_ALIGN  (_AC(1, UL) << MPU_REGION_SHIFT)
>  #define MPU_REGION_MASK   (~(MPU_REGION_ALIGN - 1))
> @@ -13,6 +17,7 @@
>  #define NUM_MPU_REGIONS_SHIFT   8
>  #define NUM_MPU_REGIONS         (_AC(1, UL) << NUM_MPU_REGIONS_SHIFT)
>  #define NUM_MPU_REGIONS_MASK    (NUM_MPU_REGIONS - 1)
> +#define MAX_MPU_REGIONS         NUM_MPU_REGIONS_MASK
>  
>  #endif /* __ARM_MPU_H__ */
>  
> diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c
> index 07c8959f4ee9..f83ce04fef8a 100644
> --- a/xen/arch/arm/mpu/mm.c
> +++ b/xen/arch/arm/mpu/mm.c
> @@ -7,9 +7,13 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  
>  struct page_info *frame_table;
>  
> +/* EL2 Xen MPU memory region mapping table. */
> +pr_t xen_mpumap[MAX_MPU_REGIONS];
> +
>  static void __init __maybe_unused build_assertions(void)
>  {
>      /*

~Michal



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
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	Doug Goldstein ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
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	"Daniel P . Smith" 
Subject: [PATCH v2 1/7] Rename and adjust x86 containers
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Insert the Alpine version as we'll need a newer version in due course, and
rename 'rootfs' to 'base' as the container really is not a rootfs on it's own.

In base, add bash.  It's added later by the rootfs generation anyway, but this
way we can write the generation script in bash too.

In build, group and sort the packages.  Drop the ones we don't need, or are
pulled in by dependencies.  Include diffutils, findutils and gawk to avoid
warnings in the kernel build.

Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Doug Goldstein 
CC: Marek Marczykowski-Górecki 
CC: Jason Andryuk 
CC: Daniel P. Smith 
---
 .gitlab-ci.yml                                |  4 +--
 containerize                                  |  4 +--
 images/alpine/3.18-x86_64-base.dockerfile     |  6 ++++
 ...ockerfile => 3.18-x86_64-build.dockerfile} | 32 ++++++++++++-------
 images/alpine/x86_64-rootfs.dockerfile        |  4 ---
 5 files changed, 30 insertions(+), 20 deletions(-)
 create mode 100644 images/alpine/3.18-x86_64-base.dockerfile
 rename images/alpine/{x86_64-build.dockerfile => 3.18-x86_64-build.dockerfile} (54%)
 delete mode 100644 images/alpine/x86_64-rootfs.dockerfile

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 670f9621e26d..fb997cc62162 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -28,7 +28,7 @@ stages:
   tags:
     - x86_64
   variables:
-    CONTAINER: alpine:x86_64-build
+    CONTAINER: alpine:3.18-x86_64-build
 
 #
 # ARM64 artifacts
@@ -62,7 +62,7 @@ x86_64-rootfs-alpine-3.18:
   script:
     - . scripts/x86_64-rootfs-alpine.sh
   variables:
-    CONTAINER: alpine:x86_64-rootfs
+    CONTAINER: alpine:3.18-x86_64-base
 
 x86_64-argo-linux-6.6.56:
   extends: .x86_64-artifacts
diff --git a/containerize b/containerize
index 7abeb119ff6a..c23f55ead737 100755
--- a/containerize
+++ b/containerize
@@ -25,8 +25,8 @@ die() {
 BASE="registry.gitlab.com/xen-project/hardware/test-artifacts"
 case "_${CONTAINER}" in
     _alpine-3.18-arm64-build) CONTAINER="${BASE}/alpine:3.18-arm64-build" ;;
-    _alpine-x86_64-rootfs) CONTAINER="${BASE}/alpine:x86_64-rootfs" ;;
-    _alpine-x86_64-build|_) CONTAINER="${BASE}/alpine:x86_64-build" ;;
+    _alpine-3.18-x86_64-base) CONTAINER="${BASE}/alpine:3.18-x86_64-base" ;;
+    _alpine-3.18-x86_64-build|_) CONTAINER="${BASE}/alpine:3.18-x86_64-build" ;;
 esac
 
 # Use this variable to control whether root should be used
diff --git a/images/alpine/3.18-x86_64-base.dockerfile b/images/alpine/3.18-x86_64-base.dockerfile
new file mode 100644
index 000000000000..a8cb274d5821
--- /dev/null
+++ b/images/alpine/3.18-x86_64-base.dockerfile
@@ -0,0 +1,6 @@
+# syntax=docker/dockerfile:1
+FROM --platform=linux/amd64 alpine:3.18
+LABEL maintainer.name="The Xen Project"
+LABEL maintainer.email="xen-devel@lists.xenproject.org"
+
+RUN apk --no-cache add bash
diff --git a/images/alpine/x86_64-build.dockerfile b/images/alpine/3.18-x86_64-build.dockerfile
similarity index 54%
rename from images/alpine/x86_64-build.dockerfile
rename to images/alpine/3.18-x86_64-build.dockerfile
index 98969a5be1da..eac0cda4fed3 100644
--- a/images/alpine/x86_64-build.dockerfile
+++ b/images/alpine/3.18-x86_64-build.dockerfile
@@ -1,31 +1,39 @@
 # syntax=docker/dockerfile:1
 FROM --platform=linux/amd64 alpine:3.18
-LABEL maintainer.name="The Xen Project" \
-      maintainer.email="xen-devel@lists.xenproject.org"
+LABEL maintainer.name="The Xen Project"
+LABEL maintainer.email="xen-devel@lists.xenproject.org"
 
 RUN apk --no-cache add bash
 
-RUN bash -ex <
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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Jason Andryuk ,
	"Daniel P . Smith" 
Subject: [PATCH TEST-ARTEFACTS v2 0/7] Rootfs/argo cleanup and microcode support
Date: Mon, 14 Apr 2025 11:18:36 +0100
Message-Id: <20250414101843.2348330-1-andrew.cooper3@citrix.com>
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This series supersedes the others posted.  Only minor changes from before; see
patches for details.

See the companion Xen series for the testing using these new artefacts.

Andrew Cooper (7):
  Rename and adjust x86 containers
  Overhaul how Argo is built and packged
  Rework rootfs generation to make a cpio archive
  Shrink the rootfs substantially
  Adjust directory layout for rootfs.cpio.gz
  Provide an ARM64 rootfs too
  Package microcode for the x86 hardware runners

 .gitlab-ci.yml                                | 26 ++++-
 containerize                                  |  5 +-
 images/alpine/3.18-arm64-base.dockerfile      |  6 ++
 images/alpine/3.18-x86_64-base.dockerfile     |  6 ++
 ...ockerfile => 3.18-x86_64-build.dockerfile} | 35 ++++---
 images/alpine/x86_64-rootfs.dockerfile        |  4 -
 scripts/alpine-rootfs.sh                      | 95 +++++++++++++++++++
 scripts/build-argo.sh                         | 67 +++++++++++++
 scripts/build-linux.sh                        |  8 +-
 scripts/x86-microcode.sh                      | 42 ++++++++
 scripts/x86_64-rootfs-alpine.sh               | 60 ------------
 11 files changed, 272 insertions(+), 82 deletions(-)
 create mode 100644 images/alpine/3.18-arm64-base.dockerfile
 create mode 100644 images/alpine/3.18-x86_64-base.dockerfile
 rename images/alpine/{x86_64-build.dockerfile => 3.18-x86_64-build.dockerfile} (51%)
 delete mode 100644 images/alpine/x86_64-rootfs.dockerfile
 create mode 100755 scripts/alpine-rootfs.sh
 create mode 100755 scripts/build-argo.sh
 create mode 100755 scripts/x86-microcode.sh
 delete mode 100755 scripts/x86_64-rootfs-alpine.sh

-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Jason Andryuk ,
	"Daniel P . Smith" 
Subject: [PATCH v2 2/7] Overhaul how Argo is built and packged
Date: Mon, 14 Apr 2025 11:18:38 +0100
Message-Id: <20250414101843.2348330-3-andrew.cooper3@citrix.com>
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Right now, the argo artefacts are a pile of files which the test has to turn
back into something which resembles a filesystem.  Furthermore, because we do
not build modules for the main kernel, it is extra important to make sure that
xen-argo.ko doesn't get out of sync.

Build argo conditionally as part of the linux artefact.  It's ~100kb all
together, compared to ~14M for the kernel.

Produce a single argo.cpio.gz with xen-argo.ko in the standard location.
Prune userspace down to just the executables and libraries.

This is cribbed from the existing scripts/x86_64-linux-argo.sh, which stays in
place in the short term until Xen can be updated to use the new scheme.

Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Doug Goldstein 
CC: Marek Marczykowski-Górecki 
CC: Jason Andryuk 
CC: Daniel P. Smith 

v2:
 * Only build conditionally.  Argo is bust with Linux 6.12, which is needed
   for new hardware runners.
 * Parallel build of xen-argo.ko and libargo.
 * Use -print0

I tried to make MODPOST work properly, but we don't build enough of it for the
kernel, and I didn't feel like adding an extra 10 mins to the build (all
modules) just to get the metadata right.
---
 .gitlab-ci.yml         |  2 ++
 scripts/build-argo.sh  | 67 ++++++++++++++++++++++++++++++++++++++++++
 scripts/build-linux.sh |  8 ++++-
 3 files changed, 76 insertions(+), 1 deletion(-)
 create mode 100755 scripts/build-argo.sh

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index fb997cc62162..790a6d9f9896 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -47,6 +47,8 @@ linux-6.6.56-x86_64:
   script: ./scripts/build-linux.sh
   variables:
     LINUX_VERSION: 6.6.56
+    ARGO_SHA: "705a7a8a624b42e13e655d3042059b8a85cdf6a3"
+    ARGOEXEC_SHA: "d900429f6640acc6f68a3d3a4c945d7da60625d8"
 
 #
 # The jobs below here are legacy and being phased out.
diff --git a/scripts/build-argo.sh b/scripts/build-argo.sh
new file mode 100755
index 000000000000..ef7057d847d4
--- /dev/null
+++ b/scripts/build-argo.sh
@@ -0,0 +1,67 @@
+#
+# This is a partial script, sourced by build-linux.sh
+# It has expectations about the environment
+#
+
+cd "${WORKDIR}"
+
+#
+# We're going to collect everything in argo.cpio.gz.  Construct it under
+# $ARGODIR as we go.
+#
+ARGODIR="${WORKDIR}/argo-root"
+
+git clone https://github.com/OpenXT/linux-xen-argo.git --depth=1
+git -C "${WORKDIR}/linux-xen-argo" fetch origin "${ARGO_SHA}"
+git -C "${WORKDIR}/linux-xen-argo" switch --detach FETCH_HEAD
+
+# Build xen-argo.ko against the target kernel, and install it.  Install
+# linux/argo.h too because userspace needs it.
+make -j$(nproc) -C "linux-${LINUX_VERSION}" \
+     M="${WORKDIR}/linux-xen-argo/argo-linux" \
+     KBUILD_MODPOST_WARN=1 \
+     CFLAGS_MODULE="-Wno-error" \
+     modules
+install -D -m644 "${WORKDIR}/linux-xen-argo/argo-linux/xen-argo.ko" \
+     "${ARGODIR}/lib/modules/${LINUX_VERSION}/updates/xen-argo.ko"
+install -D -m644 "${WORKDIR}/linux-xen-argo/argo-linux/include/linux/argo.h" \
+     "${ARGODIR}/usr/include/linux/argo.h"
+
+# Build and install libargo, applying fixes to build in Alpine Linux
+cd "${WORKDIR}/linux-xen-argo/libargo"
+sed -e "s|AM_INIT_AUTOMAKE|AC_CONFIG_AUX_DIR(.)\nAM_INIT_AUTOMAKE|" \
+    -i configure.ac
+sed -e "s/__SOCKADDR_COMMON (sxenargo_)/sa_family_t sxenargo_family/" \
+    -e "s/__SOCKADDR_COMMON_SIZE/(sizeof (unsigned short int))/" \
+    -i src/libargo.h
+
+autoreconf --install
+./configure --prefix=/usr CPPFLAGS="-I${PWD}/../argo-linux/include"
+make -j$(nproc)
+make install DESTDIR="${ARGODIR}"
+
+# Build and install argo-exec, modifying for xilinx argo test
+cd "${WORKDIR}"
+curl -fsSLO \
+    https://raw.githubusercontent.com/OpenXT/xenclient-oe/${ARGOEXEC_SHA}/recipes-openxt/argo-exec/argo-exec/argo-exec.c
+sed -e "/#include /d" \
+    -e "s|ret = shuffle(s, fds\[0\], fds\[1\]);|ret = shuffle(s, 0, 1);|" \
+    -i argo-exec.c
+
+gcc -I"${ARGODIR}/usr/include" -L"${ARGODIR}/usr/lib/" \
+    argo-exec.c -o "${ARGODIR}/usr/bin/argo-exec" -largo
+
+#
+# Building is now complete.  Strip the devel components and the nointerposer
+# lib, which we don't care to deploy to the test system.
+#
+cd $ARGODIR
+rm -r usr/include usr/lib/pkgconfig
+find usr/lib -name \*nointerposer\* -delete
+find usr/lib \( -name \*.a -o -name \*.so -o -name \*.la \) -delete
+
+# Package everything up
+find . -print0 | cpio -0 -R 0:0 -H newc -o | gzip > "$COPYDIR/argo.cpio.gz"
+
+# Print the contents for the build log
+zcat "${COPYDIR}/argo.cpio.gz" | cpio -tv
diff --git a/scripts/build-linux.sh b/scripts/build-linux.sh
index 652fdba7b9d1..441b8721a490 100755
--- a/scripts/build-linux.sh
+++ b/scripts/build-linux.sh
@@ -8,7 +8,7 @@ fi
 set -ex -o pipefail
 
 WORKDIR="${PWD}"
-COPYDIR="${WORKDIR}/binaries/"
+COPYDIR="${WORKDIR}/binaries"
 UNAME=$(uname -m)
 
 # Build Linux
@@ -45,6 +45,12 @@ case $UNAME in
     x86_64)
         make -j$(nproc) bzImage
         cp arch/x86/boot/bzImage "${COPYDIR}"
+
+        # Build argo if requested
+        if [[ -n "${ARGO_SHA}" ]]; then
+            make modules_prepare
+            . "${WORKDIR}/scripts/build-argo.sh"
+        fi
         ;;
 
     aarch64)
-- 
2.39.5



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        Mon, 14 Apr 2025 03:18:50 -0700 (PDT)
From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Denis Mukhin ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
Subject: [PATCH v2 3/7] Rework rootfs generation to make a cpio archive
Date: Mon, 14 Apr 2025 11:18:39 +0100
Message-Id: <20250414101843.2348330-4-andrew.cooper3@citrix.com>
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Rename the script as we're going to use it for ARM64 shortly, and have it take
a tar or cpio parameter to determine the output format.

Turn it into a proper bash script, and provide the cpio form under the new
artefact naming scheme.

No functional change.

Signed-off-by: Andrew Cooper 
Reviewed-by: Denis Mukhin 
---
CC: Anthony PERARD 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Doug Goldstein 
CC: Marek Marczykowski-Górecki 

v2:
 * Use -print0
 * Don't dedup $PATHS.  It's going to change between cpio and tar in
   subsequent patches.
---
 .gitlab-ci.yml                                |  9 +++++++-
 ...6_64-rootfs-alpine.sh => alpine-rootfs.sh} | 21 +++++++++++++++++--
 2 files changed, 27 insertions(+), 3 deletions(-)
 rename scripts/{x86_64-rootfs-alpine.sh => alpine-rootfs.sh} (71%)

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 790a6d9f9896..b7d187168df2 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -42,6 +42,13 @@ linux-6.6.86-arm64:
 #
 # x86_64 artifacts
 #
+alpine-3.18-x86_64-rootfs:
+  extends: .x86_64-artifacts
+  script:
+    - ./scripts/alpine-rootfs.sh cpio
+  variables:
+    CONTAINER: alpine:3.18-x86_64-base
+
 linux-6.6.56-x86_64:
   extends: .x86_64-artifacts
   script: ./scripts/build-linux.sh
@@ -62,7 +69,7 @@ x86_64-kernel-linux-6.6.56:
 x86_64-rootfs-alpine-3.18:
   extends: .x86_64-artifacts
   script:
-    - . scripts/x86_64-rootfs-alpine.sh
+    - ./scripts/alpine-rootfs.sh tar
   variables:
     CONTAINER: alpine:3.18-x86_64-base
 
diff --git a/scripts/x86_64-rootfs-alpine.sh b/scripts/alpine-rootfs.sh
similarity index 71%
rename from scripts/x86_64-rootfs-alpine.sh
rename to scripts/alpine-rootfs.sh
index b70b3a54ede5..75e2f8648ce5 100755
--- a/scripts/x86_64-rootfs-alpine.sh
+++ b/scripts/alpine-rootfs.sh
@@ -1,4 +1,9 @@
+#!/bin/bash
+
+set -eu
+
 WORKDIR="${PWD}"
+COPYDIR="${WORKDIR}/binaries"
 
 apk update
 
@@ -56,5 +61,17 @@ passwd -d "root" root
 
 # Create rootfs
 cd /
-tar cvzf "${WORKDIR}/binaries/initrd.tar.gz" \
-    bin dev etc home init lib mnt opt root sbin usr var
+case $1 in
+    cpio)
+        PATHS="bin dev etc home init lib mnt opt root sbin usr var"
+        find $PATHS -print0 | cpio -0 -H newc -o | gzip > "${COPYDIR}/rootfs.cpio.gz"
+
+        # Print the contents for the build log
+        zcat "${COPYDIR}/rootfs.cpio.gz" | cpio -tv
+        ;;
+
+    tar)
+        PATHS="bin dev etc home init lib mnt opt root sbin usr var"
+        tar cvzf "${COPYDIR}/initrd.tar.gz" $PATHS
+        ;;
+esac
-- 
2.39.5



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        Mon, 14 Apr 2025 03:18:51 -0700 (PDT)
From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
Subject: [PATCH v2 4/7] Shrink the rootfs substantially
Date: Mon, 14 Apr 2025 11:18:40 +0100
Message-Id: <20250414101843.2348330-5-andrew.cooper3@citrix.com>
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bash, busybox, musl and zlib are all in the base container.

python3 and ncurses are in principle used by bits of Xen, but not in anything
we test in CI.  argp-standlone, curl, dbus, libfdt, libgcc and sudo aren't
used at all (for x86 at least).

libbz2 and libuuid were pulled in transitively before, and need to be included
explicitly now.

Use apk --no-cache to avoid keeping a ~2M package index on disk.

Remove the modules scan on boot.  We don't have or build any.  This removes a
chunk of warnings on boot.

This shrinks the rootfs from ~30M down to ~8M.

No practical change.

Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Doug Goldstein 
CC: Marek Marczykowski-Górecki 
---
 scripts/alpine-rootfs.sh | 60 +++++++++++++++++++++++-----------------
 1 file changed, 34 insertions(+), 26 deletions(-)

diff --git a/scripts/alpine-rootfs.sh b/scripts/alpine-rootfs.sh
index 75e2f8648ce5..72c29e0a0a13 100755
--- a/scripts/alpine-rootfs.sh
+++ b/scripts/alpine-rootfs.sh
@@ -4,33 +4,42 @@ set -eu
 
 WORKDIR="${PWD}"
 COPYDIR="${WORKDIR}/binaries"
+UNAME=$(uname -m)
 
-apk update
+apk --no-cache update
 
-# xen runtime deps
-apk add musl
-apk add libgcc
-apk add openrc
-apk add busybox
-apk add sudo
-apk add dbus
-apk add bash
-apk add python3
-apk add zlib
-apk add lzo
-apk add ncurses
-apk add yajl
-apk add libaio
-apk add xz
-apk add util-linux
-apk add argp-standalone
-apk add libfdt
-apk add glib
-apk add pixman
-apk add curl
-apk add udev
-apk add pciutils
-apk add libelf
+PKGS=(
+    # System
+    openrc
+    udev
+    util-linux
+
+    # Xen toolstack runtime deps
+    libbz2
+    libuuid
+    lzo
+    xz
+    yajl
+
+    # QEMU
+    glib
+    libaio
+    pixman
+    )
+
+case $UNAME in
+    x86_64)
+        PKGS+=(
+            # System
+            pciutils
+
+            # QEMU
+            libelf
+            )
+        ;;
+esac
+
+apk add --no-cache "${PKGS[@]}"
 
 # Xen
 cd /
@@ -45,7 +54,6 @@ rc-update add dmesg sysinit
 rc-update add hostname boot
 rc-update add hwclock boot
 rc-update add hwdrivers sysinit
-rc-update add modules boot
 rc-update add killprocs shutdown
 rc-update add mount-ro shutdown
 rc-update add savecache shutdown
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
Subject: [PATCH v2 6/7] Provide an ARM64 rootfs too
Date: Mon, 14 Apr 2025 11:18:42 +0100
Message-Id: <20250414101843.2348330-7-andrew.cooper3@citrix.com>
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The only extra package needed is libfdt.

The older ARM64 rootfs configured modloop, networking and sysctl, but none of
this is used in any of the testing, so is omitted here for now.

Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Doug Goldstein 
CC: Marek Marczykowski-Górecki 
---
 .gitlab-ci.yml                           | 7 +++++++
 containerize                             | 1 +
 images/alpine/3.18-arm64-base.dockerfile | 6 ++++++
 scripts/alpine-rootfs.sh                 | 7 +++++++
 4 files changed, 21 insertions(+)
 create mode 100644 images/alpine/3.18-arm64-base.dockerfile

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index b7d187168df2..d70ddd99e529 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -33,6 +33,13 @@ stages:
 #
 # ARM64 artifacts
 #
+alpine-3.18-arm64-rootfs:
+  extends: .arm64-artifacts
+  script:
+    - ./scripts/alpine-rootfs.sh cpio
+  variables:
+    CONTAINER: alpine:3.18-arm64-base
+
 linux-6.6.86-arm64:
   extends: .arm64-artifacts
   script: ./scripts/build-linux.sh
diff --git a/containerize b/containerize
index c23f55ead737..38a434ab7075 100755
--- a/containerize
+++ b/containerize
@@ -24,6 +24,7 @@ die() {
 #
 BASE="registry.gitlab.com/xen-project/hardware/test-artifacts"
 case "_${CONTAINER}" in
+    _alpine-3.18-arm64-base) CONTAINER="${BASE}/alpine:3.18-arm64-base" ;;
     _alpine-3.18-arm64-build) CONTAINER="${BASE}/alpine:3.18-arm64-build" ;;
     _alpine-3.18-x86_64-base) CONTAINER="${BASE}/alpine:3.18-x86_64-base" ;;
     _alpine-3.18-x86_64-build|_) CONTAINER="${BASE}/alpine:3.18-x86_64-build" ;;
diff --git a/images/alpine/3.18-arm64-base.dockerfile b/images/alpine/3.18-arm64-base.dockerfile
new file mode 100644
index 000000000000..ab597c75b80e
--- /dev/null
+++ b/images/alpine/3.18-arm64-base.dockerfile
@@ -0,0 +1,6 @@
+# syntax=docker/dockerfile:1
+FROM --platform=linux/arm64/v8 alpine:3.18
+LABEL maintainer.name="The Xen Project"
+LABEL maintainer.email="xen-devel@lists.xenproject.org"
+
+RUN apk --no-cache add bash
diff --git a/scripts/alpine-rootfs.sh b/scripts/alpine-rootfs.sh
index 53547b5c5282..e52908a3d588 100755
--- a/scripts/alpine-rootfs.sh
+++ b/scripts/alpine-rootfs.sh
@@ -37,6 +37,13 @@ case $UNAME in
             libelf
             )
         ;;
+
+    aarch64)
+        PKGS+=(
+            # Xen
+            libfdt
+            )
+        ;;
 esac
 
 apk add --no-cache "${PKGS[@]}"
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
Subject: [PATCH v2 5/7] Adjust directory layout for rootfs.cpio.gz
Date: Mon, 14 Apr 2025 11:18:41 +0100
Message-Id: <20250414101843.2348330-6-andrew.cooper3@citrix.com>
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All tests using the rootfs currently modify it with:

  mkdir proc
  mkdir run
  mkdir srv
  mkdir sys
  rm var/run

This is because the rootfs doesn't have the correct top level directories.
Furthermore, dev is currently included when it oughtn't to be.

srv is easy.  It's an empty directory and can be included in PATHS.

dev, proc, run and sys are all mount points, which OpenRC knows how to
populate on boot.  Create only the top level directories in rootfs, without
`find` recursing into them.

Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Doug Goldstein 
CC: Marek Marczykowski-Górecki 

v2:
 * New
---
 scripts/alpine-rootfs.sh | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/scripts/alpine-rootfs.sh b/scripts/alpine-rootfs.sh
index 72c29e0a0a13..53547b5c5282 100755
--- a/scripts/alpine-rootfs.sh
+++ b/scripts/alpine-rootfs.sh
@@ -71,8 +71,11 @@ passwd -d "root" root
 cd /
 case $1 in
     cpio)
-        PATHS="bin dev etc home init lib mnt opt root sbin usr var"
-        find $PATHS -print0 | cpio -0 -H newc -o | gzip > "${COPYDIR}/rootfs.cpio.gz"
+        {
+            PATHS="bin etc home init lib mnt opt root sbin srv usr var"
+            find $PATHS -print0
+            echo -ne "dev\0proc\0run\0sys\0"
+        } | cpio -0 -H newc -o | gzip > "${COPYDIR}/rootfs.cpio.gz"
 
         # Print the contents for the build log
         zcat "${COPYDIR}/rootfs.cpio.gz" | cpio -tv
-- 
2.39.5



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        Mon, 14 Apr 2025 03:18:54 -0700 (PDT)
From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jason Andryuk ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
Subject: [PATCH v2 7/7] Package microcode for the x86 hardware runners
Date: Mon, 14 Apr 2025 11:18:43 +0100
Message-Id: <20250414101843.2348330-8-andrew.cooper3@citrix.com>
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They are all out of date, to different degrees.

Install jq into the x86_64 build container so we can parse the Github latest
release information in an acceptable way.

The resulting archive must be uncompressed, in order to work during early
boot.

Signed-off-by: Andrew Cooper 
Reviewed-by: Jason Andryuk 
---
CC: Anthony PERARD 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Doug Goldstein 
CC: Marek Marczykowski-Górecki 
---
 .gitlab-ci.yml                             |  4 +++
 images/alpine/3.18-x86_64-build.dockerfile |  3 ++
 scripts/x86-microcode.sh                   | 42 ++++++++++++++++++++++
 3 files changed, 49 insertions(+)
 create mode 100755 scripts/x86-microcode.sh

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index d70ddd99e529..74335363d5ed 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -64,6 +64,10 @@ linux-6.6.56-x86_64:
     ARGO_SHA: "705a7a8a624b42e13e655d3042059b8a85cdf6a3"
     ARGOEXEC_SHA: "d900429f6640acc6f68a3d3a4c945d7da60625d8"
 
+microcode-x86:
+  extends: .x86_64-artifacts
+  script: ./scripts/x86-microcode.sh
+
 #
 # The jobs below here are legacy and being phased out.
 #
diff --git a/images/alpine/3.18-x86_64-build.dockerfile b/images/alpine/3.18-x86_64-build.dockerfile
index eac0cda4fed3..c4ff30e1f138 100644
--- a/images/alpine/3.18-x86_64-build.dockerfile
+++ b/images/alpine/3.18-x86_64-build.dockerfile
@@ -27,6 +27,9 @@ RUN < intel-latest.json
+TARBALL_URL="$(jq -r .tarball_url intel-latest.json)"
+curl -fsSL "${TARBALL_URL}" > intel-latest.tar
+tar xf intel-latest.tar --strip-components=1
+
+(
+    cd intel-ucode
+    cat 06-97-02 # adl-*
+    cat 06-8e-09 # kbl-*
+) > "${UCODEDIR}/GenuineIntel.bin"
+
+#
+# AMD microcode comes from linux-firmware
+#
+curl -fsSLO https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/plain/amd-ucode/microcode_amd_fam17h.bin
+curl -fsSLO https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/plain/amd-ucode/microcode_amd_fam19h.bin
+
+(
+    cat microcode_amd_fam17h.bin # zen2-*, xilinux-*-x86_64-*
+    cat microcode_amd_fam19h.bin # zen3p-*
+) > "${UCODEDIR}/AuthenticAMD.bin"
+
+# Package everything up.  It must be uncompressed
+cd "${ROOTDIR}"
+find . | cpio -R 0:0 -H newc -o > "${COPYDIR}/ucode.cpio"
+
+# Print the contents for the build log
+cpio -tv < "${COPYDIR}/ucode.cpio"
-- 
2.39.5



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Date: Mon, 14 Apr 2025 12:35:44 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	Jason Andryuk ,
	"Daniel P . Smith" 
Subject: Re: [PATCH v2 2/7] Overhaul how Argo is built and packged
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 <20250414101843.2348330-3-andrew.cooper3@citrix.com>
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Date: Mon, 14 Apr 2025 12:35:44 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	Jason Andryuk ,
	"Daniel P . Smith" 
Subject: Re: [PATCH v2 2/7] Overhaul how Argo is built and packged

On Mon, Apr 14, 2025 at 11:18:38AM +0100, Andrew Cooper wrote:
> --- a/scripts/build-linux.sh
> +++ b/scripts/build-linux.sh
> @@ -8,7 +8,7 @@ fi
>  set -ex -o pipefail
> =20
>  WORKDIR=3D"${PWD}"
> -COPYDIR=3D"${WORKDIR}/binaries/"
> +COPYDIR=3D"${WORKDIR}/binaries"

Is this change intentional? It has worse failure mode if "binaries" dir
wouldn't exist for some reason...

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Date: Mon, 14 Apr 2025 11:38:10 +0100
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Subject: Re: [PATCH v2 2/7] Overhaul how Argo is built and packged
To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 
Cc: Xen-devel ,
 Anthony PERARD ,
 Stefano Stabellini ,
 Michal Orzel , Doug Goldstein ,
 Jason Andryuk ,
 "Daniel P . Smith" 
References: <20250414101843.2348330-1-andrew.cooper3@citrix.com>
 <20250414101843.2348330-3-andrew.cooper3@citrix.com>
 
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On 14/04/2025 11:35 am, Marek Marczykowski-Górecki wrote:
> On Mon, Apr 14, 2025 at 11:18:38AM +0100, Andrew Cooper wrote:
>> --- a/scripts/build-linux.sh
>> +++ b/scripts/build-linux.sh
>> @@ -8,7 +8,7 @@ fi
>>  set -ex -o pipefail
>>  
>>  WORKDIR="${PWD}"
>> -COPYDIR="${WORKDIR}/binaries/"
>> +COPYDIR="${WORKDIR}/binaries"
> Is this change intentional? It has worse failure mode if "binaries" dir
> wouldn't exist for some reason...

Yes it is intentional.  It causes problems when we derive new variables
from COPYDIR.

binaries/ always exists.  It's in the base repo.

~Andrew


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Subject: Re: [PATCH v2 0/2] Add support for MSI injection on Arm
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To: Mykyta Poturai ,
 "xen-devel@lists.xenproject.org" 
Cc: Stefano Stabellini ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Anthony PERARD , Juergen Gross ,
 Andrew Cooper , Jan Beulich ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
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Hi Mykyta,

On 14/04/2025 18:51, Mykyta Poturai wrote:
> This series adds the base support for MSI injection on Arm. This is
> needed to streamline virtio-pci interrupt triggering.
> 
> With this patches, MSIs can be triggered in guests by issuing the new
> DM op, inject_msi2. This op is similar to inject_msi, but it allows
> to specify the source id of the MSI.
> 
> We chose the approach of adding a new DM op instead of using the pad
> field of inject_msi because we have no clear way of distinguishing
> between set and unset pad fields. New implementations also adds flags
> field to clearly specify if the SBDF is set.
> 
> Patches were tested on QEMU with

[...]

> patches for ITS support for DomUs applied.

This means this series is unusable without external patches. Given this 
is adding a new DM operations, I think it would be more sensible to have 
the vITS support merged first. Then we can look at merging this series.

Cheers,

-- 
Julien Grall



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On 4/14/25 06:18, Andrew Cooper wrote:
> Right now, the argo artefacts are a pile of files which the test has to turn
> back into something which resembles a filesystem.  Furthermore, because we do
> not build modules for the main kernel, it is extra important to make sure that
> xen-argo.ko doesn't get out of sync.
> 
> Build argo conditionally as part of the linux artefact.  It's ~100kb all
> together, compared to ~14M for the kernel.
> 
> Produce a single argo.cpio.gz with xen-argo.ko in the standard location.
> Prune userspace down to just the executables and libraries.
> 
> This is cribbed from the existing scripts/x86_64-linux-argo.sh, which stays in
> place in the short term until Xen can be updated to use the new scheme.
> 
> Signed-off-by: Andrew Cooper 

Reviewed-by: Daniel P. Smith 


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Date: Mon, 14 Apr 2025 20:04:44 +0900
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Subject: Re: [PATCH v2 1/2] arm: vgic: Add the ability to trigger MSIs from
 the Hypervisor
Content-Language: en-GB
To: Mykyta Poturai ,
 "xen-devel@lists.xenproject.org" 
Cc: Stefano Stabellini ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk 
References: 
 <3dba1b51984f24e36d5fbd81396ab7dd53d8ac95.1744621166.git.mykyta_poturai@epam.com>
From: Julien Grall 
In-Reply-To: <3dba1b51984f24e36d5fbd81396ab7dd53d8ac95.1744621166.git.mykyta_poturai@epam.com>
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Hi,

On 14/04/2025 18:51, Mykyta Poturai wrote:
> From: Mykyta Poturai 
> 
> Add the vgic_its_trigger_msi() function to the vgic interface. This
> function allows to inject MSIs from the Hypervisor to the guest.
> Which is useful for userspace PCI backend drivers.
> 
> Signed-off-by: Mykyta Poturai 
> ---
> v1->v2:
> * replace -1 with -ENOENT
> * reduce guest memory access in vgic_its_trigger_msi
> ---
>   xen/arch/arm/include/asm/vgic.h | 11 +++++++++++
>   xen/arch/arm/vgic-v3-its.c      | 19 +++++++++++++++++++
>   2 files changed, 30 insertions(+)
> 
> diff --git a/xen/arch/arm/include/asm/vgic.h b/xen/arch/arm/include/asm/vgic.h
> index e309dca1ad..3d8e3a8343 100644
> --- a/xen/arch/arm/include/asm/vgic.h
> +++ b/xen/arch/arm/include/asm/vgic.h
> @@ -318,6 +318,17 @@ extern bool vgic_migrate_irq(struct vcpu *old, struct vcpu *new, unsigned int ir
>   extern void vgic_check_inflight_irqs_pending(struct vcpu *v,
>                                                unsigned int rank, uint32_t r);
>   
> +#ifdef CONFIG_HAS_ITS
> +int vgic_its_trigger_msi(struct domain *d, paddr_t doorbell_address,
> +                                u32 devid, u32 eventid);
> +#else
> +static inline int vgic_its_trigger_msi(struct domain *d, paddr_t doorbell_address,
> +                                u32 devid, u32 eventid)
> +{
> +    return -EOPNOTSUPP;
> +}
> +#endif /* CONFIG_HAS_ITS */
> +
>   #endif /* !CONFIG_NEW_VGIC */
>   
>   /*** Common VGIC functions used by Xen arch code ****/
> diff --git a/xen/arch/arm/vgic-v3-its.c b/xen/arch/arm/vgic-v3-its.c
> index c65c1dbf52..be5bfe0d21 100644
> --- a/xen/arch/arm/vgic-v3-its.c
> +++ b/xen/arch/arm/vgic-v3-its.c
> @@ -1484,6 +1484,25 @@ static int vgic_v3_its_init_virtual(struct domain *d, paddr_t guest_addr,
>       return 0;
>   }
>   
> +int vgic_its_trigger_msi(struct domain *d, paddr_t doorbell_address,
> +                                u32 devid, u32 eventid)

Looking at how this is used in the next patch, you are assuming that 
devid == sbdf. However, given there is no support for guest vITS yet, I 
don't think we took a decision on whether the device ID match the SBDF.

This goes back to what I wrote in the cover letter. It seems that there 
are more work needed to be merged before this series.

Also coding style: we use uint32_t in newer code.

> +{
> +    struct pending_irq *pend;
> +    unsigned int vcpu_id;
> +
> +    pend = gicv3_its_get_event_pending_irq(d,doorbell_address, devid, eventid);

A couple of questions:

  1. What prevents pending_irq to be freed behind our back?
  2. Going back to my point about the missing guest ITS support, it is 
unclear how virtual device will work and whether we want QEMU to inject 
interrupts which belongs to a physical device.

coding style: Missing space before the comma.

> +    if ( !pend )
> +        return -ENOENT;
> +
> +    vcpu_id = ACCESS_ONCE(pend->lpi_vcpu_id);
> +    if ( vcpu_id >= d->max_vcpus )
> +          return -ENOENT;
> +
> +    vgic_inject_irq(d, d->vcpu[vcpu_id], pend->irq, true);
> +
> +    return 0;
> +}
> +
>   unsigned int vgic_v3_its_count(const struct domain *d)
>   {
>       struct host_its *hw_its;

Cheers,

-- 
Julien Grall



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        Mon, 14 Apr 2025 04:09:06 -0700 (PDT)
From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
Subject: [PATCH v3 1/6] CI: Rename intermediate artefacts in qemu-* scripts
Date: Mon, 14 Apr 2025 12:08:58 +0100
Message-Id: <20250414110903.2355303-2-andrew.cooper3@citrix.com>
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Right now, we have initrd.cpio.gz as domU, and initrd.tar.gz as the base for
dom0.

Rename initrd.cpio.gz to domU-rootfs.cpio.gz, and xen-rootfs.cpio.gz to
dom0-rootfs.cpio.gz to make it clearer which is which.  Rename the VM from
test to domU.

No functional change.

Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Doug Goldstein 
CC: Marek Marczykowski-Górecki 

v3:
 * New

https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1765822634
---
 automation/scripts/qemu-alpine-x86_64.sh    | 16 ++++++++--------
 automation/scripts/qemu-smoke-dom0-arm64.sh | 16 ++++++++--------
 2 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/automation/scripts/qemu-alpine-x86_64.sh b/automation/scripts/qemu-alpine-x86_64.sh
index 89bdb4df7dac..569bd766d31e 100755
--- a/automation/scripts/qemu-alpine-x86_64.sh
+++ b/automation/scripts/qemu-alpine-x86_64.sh
@@ -25,7 +25,7 @@ mount -t devtmpfs devtmpfs /dev
 chmod +x initrd/init
 # DomU rootfs
 cd initrd
-find . | cpio --create --format='newc' | gzip > ../initrd.cpio.gz
+find . | cpio -H newc -o | gzip > ../domU-rootfs.cpio.gz
 cd ..
 
 # initrd.tar.gz is Dom0 rootfs
@@ -38,15 +38,15 @@ mkdir srv
 mkdir sys
 rm var/run
 cp -ar ../dist/install/* .
-mv ../initrd.cpio.gz ./root
+mv ../domU-rootfs.cpio.gz ./root
 cp ../bzImage ./root
-echo "name=\"test\"
+echo "name=\"domU\"
 memory=512
 vcpus=1
 kernel=\"/root/bzImage\"
-ramdisk=\"/root/initrd.cpio.gz\"
+ramdisk=\"/root/domU-rootfs.cpio.gz\"
 extra=\"console=hvc0 root=/dev/ram0 rdinit=/bin/sh\"
-" > root/test.cfg
+" > root/domU.cfg
 echo "#!/bin/bash
 
 set -x
@@ -56,13 +56,13 @@ bash /etc/init.d/xencommons start
 
 xl list
 
-xl -vvv create -c /root/test.cfg
+xl -vvv create -c /root/domU.cfg
 
 " > etc/local.d/xen.start
 chmod +x etc/local.d/xen.start
 echo "rc_verbose=yes" >> etc/rc.conf
 # rebuild Dom0 rootfs
-find . |cpio -H newc -o|gzip > ../xen-rootfs.cpio.gz
+find . | cpio -H newc -o | gzip > ../dom0-rootfs.cpio.gz
 cd ../..
 
 cat >> binaries/pxelinux.0 << EOF
@@ -70,7 +70,7 @@ cat >> binaries/pxelinux.0 << EOF
 
 kernel xen console=com1 console_timestamps=boot
 module bzImage console=hvc0
-module xen-rootfs.cpio.gz
+module dom0-rootfs.cpio.gz
 boot
 EOF
 
diff --git a/automation/scripts/qemu-smoke-dom0-arm64.sh b/automation/scripts/qemu-smoke-dom0-arm64.sh
index 51d037b0003e..e8e49ded245a 100755
--- a/automation/scripts/qemu-smoke-dom0-arm64.sh
+++ b/automation/scripts/qemu-smoke-dom0-arm64.sh
@@ -24,7 +24,7 @@ mount -t devtmpfs devtmpfs /dev
 /bin/sh" > initrd/init
 chmod +x initrd/init
 cd initrd
-find . | cpio --create --format='newc' | gzip > ../initrd.cpio.gz
+find . | cpio -H newc -o | gzip > ../domU-rootfs.cpio.gz
 cd ..
 
 mkdir -p rootfs
@@ -36,15 +36,15 @@ mkdir srv
 mkdir sys
 rm var/run
 cp -ar ../dist/install/* .
-mv ../initrd.cpio.gz ./root
+mv ../domU-rootfs.cpio.gz ./root
 cp ../Image ./root
-echo "name=\"test\"
+echo "name=\"domU\"
 memory=512
 vcpus=1
 kernel=\"/root/Image\"
-ramdisk=\"/root/initrd.cpio.gz\"
+ramdisk=\"/root/domU-rootfs.cpio.gz\"
 extra=\"console=hvc0 root=/dev/ram0 rdinit=/bin/sh\"
-" > root/test.cfg
+" > root/domU.cfg
 echo "#!/bin/bash
 
 export LD_LIBRARY_PATH=/usr/local/lib
@@ -52,12 +52,12 @@ bash /etc/init.d/xencommons start
 
 xl list
 
-xl -vvv create -c /root/test.cfg
+xl -vvv create -c /root/domU.cfg
 
 " > etc/local.d/xen.start
 chmod +x etc/local.d/xen.start
 echo "rc_verbose=yes" >> etc/rc.conf
-find . |cpio -H newc -o|gzip > ../xen-rootfs.cpio.gz
+find . | cpio -H newc -o | gzip > ../dom0-rootfs.cpio.gz
 cd ../..
 
 # XXX QEMU looks for "efi-virtio.rom" even if it is unneeded
@@ -78,7 +78,7 @@ MEMORY_END="0xC0000000"
 DEVICE_TREE="virt-gicv2.dtb"
 XEN="xen"
 DOM0_KERNEL="Image"
-DOM0_RAMDISK="xen-rootfs.cpio.gz"
+DOM0_RAMDISK="dom0-rootfs.cpio.gz"
 XEN_CMD="console=dtuart dom0_mem=1024M console_timestamps=boot"
 
 NUM_DOMUS=0
-- 
2.39.5



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        Mon, 14 Apr 2025 04:09:05 -0700 (PDT)
From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Jason Andryuk ,
	"Daniel P . Smith" 
Subject: [PATCH v3 0/6] CI: switch to CPIO archives
Date: Mon, 14 Apr 2025 12:08:57 +0100
Message-Id: <20250414110903.2355303-1-andrew.cooper3@citrix.com>
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This is an amalgamation of Marek's work and mine, tested at each stage on all
hardware runners.  See patches for details.

Andrew Cooper (3):
  CI: Rename intermediate artefacts in qemu-* scripts
  CI: Switch to new argo artefact
  CI: Include microcode for x86 hardware jobs

Marek Marczykowski-Górecki (3):
  CI: avoid repacking initrd as part of the test job
  CI: remove now unused alpine-3.18-arm64-rootfs job and its container
  CI: save toolstack artifact as cpio.gz

 automation/gitlab-ci/build.yaml               | 12 +---
 automation/gitlab-ci/test.yaml                | 16 +++--
 automation/scripts/build                      |  2 +-
 automation/scripts/qemu-alpine-x86_64.sh      | 32 ++++-----
 automation/scripts/qemu-smoke-dom0-arm64.sh   | 30 ++++-----
 .../scripts/qemu-smoke-dom0less-arm64.sh      | 17 ++---
 automation/scripts/qubes-x86-64.sh            | 37 +++++------
 .../scripts/xilinx-smoke-dom0-x86_64.sh       | 50 +++++++-------
 .../scripts/xilinx-smoke-dom0less-arm64.sh    | 33 ++++------
 .../alpine/3.18-arm64v8.dockerfile            | 66 -------------------
 10 files changed, 101 insertions(+), 194 deletions(-)
 delete mode 100644 automation/tests-artifacts/alpine/3.18-arm64v8.dockerfile


base-commit: f401eae6ec446671ad79deac84421d56808d43f2
-- 
2.39.5



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        Mon, 14 Apr 2025 04:09:08 -0700 (PDT)
From: Andrew Cooper 
To: Xen-devel 
Cc: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Andrew Cooper ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein 
Subject: [PATCH v3 2/6] CI: avoid repacking initrd as part of the test job
Date: Mon, 14 Apr 2025 12:08:59 +0100
Message-Id: <20250414110903.2355303-3-andrew.cooper3@citrix.com>
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From: Marek Marczykowski-Górecki 

Use the new test-artifacts which provide rootfs.cpio.gz rather than
initrd.tar.gz.  rootfs.cpio.gz also has all the necessary top-level
directories, and includes the rc_verbose setting, so these modifications can
be dropped.

Having that, do not repack the whole initrd, but only pack modified
files and rely on Linux handling of concatenated archives.
This allows packing just test-related files (which includes the whole
toolstack), instead of the whole initrd.

For xilinx-smoke-dom0-x86_64.sh, this involves instructing grub not to unzip
the archive, as doing so corrupts it.

Signed-off-by: Marek Marczykowski-Górecki 
Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Doug Goldstein 
CC: Marek Marczykowski-Górecki 

v3:
 * Tested (bugfixed) on xilinx-* runners
 * Rearrange logic so the order of concantination is clearer (relevant for
   subsequent patches)

https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1765676583
---
 automation/gitlab-ci/test.yaml                |  8 +++--
 automation/scripts/qemu-alpine-x86_64.sh      | 16 ++++------
 automation/scripts/qemu-smoke-dom0-arm64.sh   | 14 ++++----
 .../scripts/qemu-smoke-dom0less-arm64.sh      | 15 ++++-----
 automation/scripts/qubes-x86-64.sh            | 32 +++++++------------
 .../scripts/xilinx-smoke-dom0-x86_64.sh       | 27 ++++++++--------
 .../scripts/xilinx-smoke-dom0less-arm64.sh    | 30 +++++++----------
 7 files changed, 61 insertions(+), 81 deletions(-)

diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml
index 59a2de28c864..51229cbe561d 100644
--- a/automation/gitlab-ci/test.yaml
+++ b/automation/gitlab-ci/test.yaml
@@ -11,7 +11,9 @@
   - project: xen-project/hardware/test-artifacts
     job: linux-6.6.86-arm64
     ref: master
-  - alpine-3.18-arm64-rootfs-export
+  - project: xen-project/hardware/test-artifacts
+    job: alpine-3.18-arm64-rootfs
+    ref: master
   - qemu-system-aarch64-6.0.0-arm64-export
 
 .arm32-test-needs: &arm32-test-needs
@@ -22,7 +24,7 @@
     job: linux-6.6.56-x86_64
     ref: master
   - project: xen-project/hardware/test-artifacts
-    job: x86_64-rootfs-alpine-3.18
+    job: alpine-3.18-x86_64-rootfs
     ref: master
 
 .qemu-arm64:
@@ -243,7 +245,7 @@ xilinx-smoke-dom0-x86_64-gcc-debug-argo:
       job: x86_64-kernel-linux-6.6.56
       ref: master
     - project: xen-project/hardware/test-artifacts
-      job: x86_64-rootfs-alpine-3.18
+      job: alpine-3.18-x86_64-rootfs
       ref: master
     - project: xen-project/hardware/test-artifacts
       job: x86_64-argo-linux-6.6.56
diff --git a/automation/scripts/qemu-alpine-x86_64.sh b/automation/scripts/qemu-alpine-x86_64.sh
index 569bd766d31e..c7dd12197862 100755
--- a/automation/scripts/qemu-alpine-x86_64.sh
+++ b/automation/scripts/qemu-alpine-x86_64.sh
@@ -28,16 +28,14 @@ cd initrd
 find . | cpio -H newc -o | gzip > ../domU-rootfs.cpio.gz
 cd ..
 
-# initrd.tar.gz is Dom0 rootfs
+# Dom0 rootfs
+cp rootfs.cpio.gz dom0-rootfs.cpio.gz
+
+# test-local configuration
 mkdir -p rootfs
 cd rootfs
-tar xvzf ../initrd.tar.gz
-mkdir proc
-mkdir run
-mkdir srv
-mkdir sys
-rm var/run
 cp -ar ../dist/install/* .
+mkdir -p root etc/local.d
 mv ../domU-rootfs.cpio.gz ./root
 cp ../bzImage ./root
 echo "name=\"domU\"
@@ -60,9 +58,7 @@ xl -vvv create -c /root/domU.cfg
 
 " > etc/local.d/xen.start
 chmod +x etc/local.d/xen.start
-echo "rc_verbose=yes" >> etc/rc.conf
-# rebuild Dom0 rootfs
-find . | cpio -H newc -o | gzip > ../dom0-rootfs.cpio.gz
+find . | cpio -H newc -o | gzip >> ../dom0-rootfs.cpio.gz
 cd ../..
 
 cat >> binaries/pxelinux.0 << EOF
diff --git a/automation/scripts/qemu-smoke-dom0-arm64.sh b/automation/scripts/qemu-smoke-dom0-arm64.sh
index e8e49ded245a..c0cf61ff8f7b 100755
--- a/automation/scripts/qemu-smoke-dom0-arm64.sh
+++ b/automation/scripts/qemu-smoke-dom0-arm64.sh
@@ -27,15 +27,14 @@ cd initrd
 find . | cpio -H newc -o | gzip > ../domU-rootfs.cpio.gz
 cd ..
 
+# Dom0 rootfs
+cp rootfs.cpio.gz dom0-rootfs.cpio.gz
+
+# test-local configuration
 mkdir -p rootfs
 cd rootfs
-tar xvzf ../initrd.tar.gz
-mkdir proc
-mkdir run
-mkdir srv
-mkdir sys
-rm var/run
 cp -ar ../dist/install/* .
+mkdir -p etc/local.d root
 mv ../domU-rootfs.cpio.gz ./root
 cp ../Image ./root
 echo "name=\"domU\"
@@ -56,8 +55,7 @@ xl -vvv create -c /root/domU.cfg
 
 " > etc/local.d/xen.start
 chmod +x etc/local.d/xen.start
-echo "rc_verbose=yes" >> etc/rc.conf
-find . | cpio -H newc -o | gzip > ../dom0-rootfs.cpio.gz
+find . | cpio -H newc -o | gzip >> ../dom0-rootfs.cpio.gz
 cd ../..
 
 # XXX QEMU looks for "efi-virtio.rom" even if it is unneeded
diff --git a/automation/scripts/qemu-smoke-dom0less-arm64.sh b/automation/scripts/qemu-smoke-dom0less-arm64.sh
index f72d20936181..8e939f0b7214 100755
--- a/automation/scripts/qemu-smoke-dom0less-arm64.sh
+++ b/automation/scripts/qemu-smoke-dom0less-arm64.sh
@@ -114,16 +114,14 @@ cd initrd
 find . | cpio --create --format='newc' | gzip > ../binaries/initrd
 cd ..
 
-# DOM0 rootfs
+# Dom0 rootfs
+cp binaries/rootfs.cpio.gz binaries/dom0-rootfs.cpio.gz
+
+# test-local configuration
 mkdir -p rootfs
 cd rootfs
-tar xzf ../binaries/initrd.tar.gz
-mkdir proc
-mkdir run
-mkdir srv
-mkdir sys
-rm var/run
 cp -ar ../binaries/dist/install/* .
+mkdir -p etc/local.d
 
 echo "#!/bin/bash
 
@@ -142,8 +140,7 @@ xl network-attach 1 type=vif
 ${dom0_check}
 " > etc/local.d/xen.start
 chmod +x etc/local.d/xen.start
-echo "rc_verbose=yes" >> etc/rc.conf
-find . | cpio -H newc -o | gzip > ../binaries/dom0-rootfs.cpio.gz
+find . | cpio -H newc -o | gzip >> ../binaries/dom0-rootfs.cpio.gz
 cd ..
 
 # ImageBuilder
diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh
index c4be71464246..e2376cb51cb4 100755
--- a/automation/scripts/qubes-x86-64.sh
+++ b/automation/scripts/qubes-x86-64.sh
@@ -164,16 +164,13 @@ ${domU_extra_config}
 "
 
 if [ -n "$domU_check" ]; then
-    # DomU
+    # DomU rootfs
+    cp binaries/rootfs.cpio.gz binaries/domU-rootfs.cpio.gz
+
+    # test-local configuration
     mkdir -p rootfs
     cd rootfs
-    # fakeroot is needed to preserve device nodes in rootless podman container
-    fakeroot -s ../fakeroot-save tar xzf ../binaries/initrd.tar.gz
-    mkdir proc
-    mkdir run
-    mkdir srv
-    mkdir sys
-    rm var/run
+    mkdir -p etc/local.d
     echo "#!/bin/sh
 
 echo 8 > /proc/sys/kernel/printk
@@ -181,26 +178,22 @@ echo 8 > /proc/sys/kernel/printk
 ${domU_check}
 " > etc/local.d/xen.start
     chmod +x etc/local.d/xen.start
-    echo "rc_verbose=yes" >> etc/rc.conf
     echo "domU Welcome to Alpine Linux
 Kernel \r on an \m (\l)
 
 " > etc/issue
-    find . | fakeroot -i ../fakeroot-save cpio -H newc -o | gzip > ../binaries/domU-rootfs.cpio.gz
+    find . | cpio -H newc -o | gzip >> ../binaries/domU-rootfs.cpio.gz
     cd ..
     rm -rf rootfs
 fi
 
-# DOM0 rootfs
+# Dom0 rootfs
+cp binaries/rootfs.cpio.gz binaries/dom0-rootfs.cpio.gz
+
+# test-local configuration
 mkdir -p rootfs
 cd rootfs
-fakeroot -s ../fakeroot-save tar xzf ../binaries/initrd.tar.gz
-mkdir boot
-mkdir proc
-mkdir run
-mkdir srv
-mkdir sys
-rm var/run
+mkdir -p boot etc/local.d
 cp -ar ../binaries/dist/install/* .
 cp -ar ../binaries/tests .
 cp -a ../automation/scripts/run-tools-tests tests/
@@ -237,7 +230,6 @@ fi
 chmod +x etc/local.d/xen.start
 echo "$domU_config" > etc/xen/domU.cfg
 
-echo "rc_verbose=yes" >> etc/rc.conf
 echo "XENCONSOLED_TRACE=all" >> etc/default/xencommons
 echo "QEMU_XEN=/bin/false" >> etc/default/xencommons
 mkdir -p var/log/xen/console
@@ -245,7 +237,7 @@ cp ../binaries/bzImage boot/vmlinuz
 if [ -n "$domU_check" ]; then
     cp ../binaries/domU-rootfs.cpio.gz boot/initrd-domU
 fi
-find . | fakeroot -i ../fakeroot-save cpio -H newc -o | gzip > ../binaries/dom0-rootfs.cpio.gz
+find . | cpio -H newc -o | gzip >> ../binaries/dom0-rootfs.cpio.gz
 cd ..
 
 
diff --git a/automation/scripts/xilinx-smoke-dom0-x86_64.sh b/automation/scripts/xilinx-smoke-dom0-x86_64.sh
index 7e5382931b85..1fc52d78db16 100755
--- a/automation/scripts/xilinx-smoke-dom0-x86_64.sh
+++ b/automation/scripts/xilinx-smoke-dom0-x86_64.sh
@@ -80,6 +80,7 @@ argo-exec -l -p 28333 -- /bin/echo
 "
 copy_dom0_files ()
 {
+    mkdir -p root usr/local/lib usr/local/bin
     cp "${WORKDIR}/binaries/xen-argo.ko" "root/"
     cp -ar "${WORKDIR}/binaries/lib/"* "usr/local/lib/"
     cp "${WORKDIR}/binaries/argo-exec" "usr/local/bin/"
@@ -89,12 +90,13 @@ else
     fatal "Unknown test: ${TEST}"
 fi
 
-# Set up domU rootfs.
+# DomU rootfs
+cp binaries/rootfs.cpio.gz binaries/domU-rootfs.cpio.gz
+
+# test-local configuration
 mkdir -p rootfs
 cd rootfs
-tar xzf ../binaries/initrd.tar.gz
-mkdir proc run srv sys
-rm var/run
+mkdir -p etc/local.d
 echo "#!/bin/sh
 set -x
 export LD_LIBRARY_PATH=/usr/local/lib
@@ -102,22 +104,22 @@ PATH=/usr/local/bin:/usr/local/sbin:\$PATH
 ${DOMU_CMD}
 " > etc/local.d/xen.start
 chmod +x etc/local.d/xen.start
-echo "rc_verbose=yes" >> etc/rc.conf
 echo "domU Welcome to Alpine Linux
 Kernel \r on an \m (\l)
 
 " > etc/issue
 copy_domU_files
-find . | cpio -H newc -o | gzip > ../binaries/domU-rootfs.cpio.gz
+find . | cpio -H newc -o | gzip >> ../binaries/domU-rootfs.cpio.gz
 cd ..
 rm -rf rootfs
 
-# Set up dom0 rootfs.
+# Dom0 rootfs
+cp binaries/rootfs.cpio.gz binaries/dom0-rootfs.cpio.gz
+
+# test-local configuration
 mkdir -p rootfs
 cd rootfs
-tar xzf ../binaries/initrd.tar.gz
-mkdir boot proc run srv sys
-rm var/run
+mkdir -p boot etc/local.d
 cp -ar ../binaries/dist/install/* .
 echo "#!/bin/bash
 set -x
@@ -127,14 +129,13 @@ ${DOM0_CMD}
 " > etc/local.d/xen.start
 chmod +x etc/local.d/xen.start
 echo "${DOMU_CFG}${DOMU_CFG_EXTRA}" > etc/xen/domU.cfg
-echo "rc_verbose=yes" >> etc/rc.conf
 echo "XENCONSOLED_TRACE=all" >> etc/default/xencommons
 echo "QEMU_XEN=/bin/false" >> etc/default/xencommons
 mkdir -p var/log/xen/console
 cp ../binaries/bzImage boot/vmlinuz
 cp ../binaries/domU-rootfs.cpio.gz boot/initrd-domU
 copy_dom0_files
-find . | cpio -H newc -o | gzip > ../binaries/dom0-rootfs.cpio.gz
+find . | cpio -H newc -o | gzip >> ../binaries/dom0-rootfs.cpio.gz
 cd ..
 
 # Load software into TFTP server directory.
@@ -147,7 +148,7 @@ echo "
 net_default_server=10.0.6.1
 multiboot2 (tftp)/${TEST_BOARD}/xen ${XEN_CMDLINE} sync_console
 module2 (tftp)/${TEST_BOARD}/vmlinuz console=hvc0 root=/dev/ram0 earlyprintk=xen
-module2 (tftp)/${TEST_BOARD}/initrd-dom0
+module2 --nounzip (tftp)/${TEST_BOARD}/initrd-dom0
 boot
 " > ${TFTP}/${TEST_BOARD}/grub.cfg
 
diff --git a/automation/scripts/xilinx-smoke-dom0less-arm64.sh b/automation/scripts/xilinx-smoke-dom0less-arm64.sh
index 3e1fcf6bf93c..a3031ecab0dc 100755
--- a/automation/scripts/xilinx-smoke-dom0less-arm64.sh
+++ b/automation/scripts/xilinx-smoke-dom0less-arm64.sh
@@ -38,36 +38,31 @@ echo \"${passed}\"
 "
 fi
 
-# DomU
+# DomU rootfs
+cp binaries/rootfs.cpio.gz binaries/domU-rootfs.cpio.gz
+
+# test-local configuration
 mkdir -p rootfs
 cd rootfs
-tar xzf ../binaries/initrd.tar.gz
-mkdir proc
-mkdir run
-mkdir srv
-mkdir sys
-rm var/run
+mkdir -p etc/local.d
 echo "#!/bin/sh
 
 ${domU_check}
 /bin/sh" > etc/local.d/xen.start
 chmod +x etc/local.d/xen.start
-echo "rc_verbose=yes" >> etc/rc.conf
-find . | cpio -H newc -o | gzip > ../binaries/domU-rootfs.cpio.gz
+find . | cpio -H newc -o | gzip >> ../binaries/domU-rootfs.cpio.gz
 cd ..
 rm -rf rootfs
 
-# DOM0 rootfs
+# Dom0 rootfs
+cp binaries/rootfs.cpio.gz binaries/dom0-rootfs.cpio.gz
+
+# test-local configuration
 mkdir -p rootfs
 cd rootfs
-tar xzf ../binaries/initrd.tar.gz
-mkdir proc
-mkdir run
-mkdir srv
-mkdir sys
-rm var/run
 cp -ar ../binaries/dist/install/* .
 
+mkdir -p etc/local.d
 echo "#!/bin/bash
 
 export LD_LIBRARY_PATH=/usr/local/lib
@@ -78,8 +73,7 @@ bash /etc/init.d/xencommons start
 ${dom0_check}
 " > etc/local.d/xen.start
 chmod +x etc/local.d/xen.start
-echo "rc_verbose=yes" >> etc/rc.conf
-find . | cpio -H newc -o | gzip > ../binaries/dom0-rootfs.cpio.gz
+find . | cpio -H newc -o | gzip >> ../binaries/dom0-rootfs.cpio.gz
 cd ..
 
 
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Andrew Cooper ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein 
Subject: [PATCH v3 3/6] CI: remove now unused alpine-3.18-arm64-rootfs job and its container
Date: Mon, 14 Apr 2025 12:09:00 +0100
Message-Id: <20250414110903.2355303-4-andrew.cooper3@citrix.com>
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From: Marek Marczykowski-Górecki 

This got moved to test-artifacts.

Signed-off-by: Marek Marczykowski-Górecki 
Reviewed-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Doug Goldstein 
CC: Marek Marczykowski-Górecki 
---
 automation/gitlab-ci/build.yaml               | 11 ----
 .../alpine/3.18-arm64v8.dockerfile            | 66 -------------------
 2 files changed, 77 deletions(-)
 delete mode 100644 automation/tests-artifacts/alpine/3.18-arm64v8.dockerfile

diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml
index 40dcd31f1bce..1b82b359d01f 100644
--- a/automation/gitlab-ci/build.yaml
+++ b/automation/gitlab-ci/build.yaml
@@ -264,17 +264,6 @@
 
 # Arm test artifacts
 
-alpine-3.18-arm64-rootfs-export:
-  extends: .test-jobs-artifact-common
-  image: registry.gitlab.com/xen-project/xen/tests-artifacts/alpine:3.18-arm64v8
-  script:
-    - mkdir binaries && cp /initrd.tar.gz binaries/initrd.tar.gz
-  artifacts:
-    paths:
-      - binaries/initrd.tar.gz
-  tags:
-    - arm64
-
 qemu-system-aarch64-6.0.0-arm64-export:
   extends: .test-jobs-artifact-common
   image: registry.gitlab.com/xen-project/xen/tests-artifacts/qemu-system-aarch64:6.0.0-arm64v8
diff --git a/automation/tests-artifacts/alpine/3.18-arm64v8.dockerfile b/automation/tests-artifacts/alpine/3.18-arm64v8.dockerfile
deleted file mode 100644
index a4542f703997..000000000000
--- a/automation/tests-artifacts/alpine/3.18-arm64v8.dockerfile
+++ /dev/null
@@ -1,66 +0,0 @@
-# syntax=docker/dockerfile:1
-FROM --platform=linux/arm64/v8 alpine:3.18
-LABEL maintainer.name="The Xen Project" \
-      maintainer.email="xen-devel@lists.xenproject.org"
-
-ENV USER root
-
-RUN mkdir /build
-WORKDIR /build
-
-RUN \
-  # apk
-  apk update && \
-  \
-  # xen runtime deps
-  apk add musl && \
-  apk add openrc && \
-  apk add busybox && \
-  apk add sudo && \
-  apk add dbus && \
-  apk add bash && \
-  apk add python3 && \
-  apk add zlib && \
-  apk add ncurses && \
-  apk add yajl && \
-  apk add libaio && \
-  apk add xz && \
-  apk add util-linux && \
-  apk add argp-standalone && \
-  apk add libfdt && \
-  apk add glib && \
-  apk add pixman && \
-  apk add curl && \
-  apk add udev && \
-  \
-  # Xen
-  cd / && \
-  # Minimal ramdisk environment in case of cpio output
-  rc-update add udev && \
-  rc-update add udev-trigger && \
-  rc-update add udev-settle && \
-  rc-update add networking sysinit && \
-  rc-update add loopback sysinit && \
-  rc-update add bootmisc boot && \
-  rc-update add devfs sysinit && \
-  rc-update add dmesg sysinit && \
-  rc-update add hostname boot && \
-  rc-update add hwclock boot && \
-  rc-update add hwdrivers sysinit && \
-  rc-update add killprocs shutdown && \
-  rc-update add modloop sysinit && \
-  rc-update add modules boot && \
-  rc-update add mount-ro shutdown && \
-  rc-update add savecache shutdown && \
-  rc-update add sysctl boot && \
-  rc-update add local default && \
-  cp -a /sbin/init /init && \
-  echo "ttyS0" >> /etc/securetty && \
-  echo "hvc0" >> /etc/securetty && \
-  echo "ttyS0::respawn:/sbin/getty -L ttyS0 115200 vt100" >> /etc/inittab && \
-  echo "hvc0::respawn:/sbin/getty -L hvc0 115200 vt100" >> /etc/inittab && \
-  passwd -d "root" root && \
-  \
-  # Create rootfs
-  cd / && \
-  tar cvzf /initrd.tar.gz bin dev etc home init lib mnt opt root sbin usr var
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Jason Andryuk ,
	"Daniel P . Smith" 
Subject: [PATCH v3 4/6] CI: Switch to new argo artefact
Date: Mon, 14 Apr 2025 12:09:01 +0100
Message-Id: <20250414110903.2355303-5-andrew.cooper3@citrix.com>
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The argo artefact is now a cpio archive and can be appended to dom?-rootfs
directly, rather than being part of of the overlay.  Drop the
copy_dom?_files() functions.

xen-argo.ko has moved into the standard location, so update the insmod path.

No practical change.

Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Doug Goldstein 
CC: Marek Marczykowski-Górecki 
CC: Jason Andryuk 
CC: Daniel P. Smith 

v3:
 * Rebase over change to rootfs handling

https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1766180593
---
 automation/gitlab-ci/test.yaml                |  2 +-
 .../scripts/xilinx-smoke-dom0-x86_64.sh       | 22 +++++++------------
 2 files changed, 9 insertions(+), 15 deletions(-)

diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml
index 51229cbe561d..d46da1c43d05 100644
--- a/automation/gitlab-ci/test.yaml
+++ b/automation/gitlab-ci/test.yaml
@@ -242,7 +242,7 @@ xilinx-smoke-dom0-x86_64-gcc-debug-argo:
   needs:
     - alpine-3.18-gcc-debug
     - project: xen-project/hardware/test-artifacts
-      job: x86_64-kernel-linux-6.6.56
+      job: linux-6.6.56-x86_64
       ref: master
     - project: xen-project/hardware/test-artifacts
       job: alpine-3.18-x86_64-rootfs
diff --git a/automation/scripts/xilinx-smoke-dom0-x86_64.sh b/automation/scripts/xilinx-smoke-dom0-x86_64.sh
index 1fc52d78db16..85007dcc290a 100755
--- a/automation/scripts/xilinx-smoke-dom0-x86_64.sh
+++ b/automation/scripts/xilinx-smoke-dom0-x86_64.sh
@@ -28,8 +28,6 @@ extra = "root=/dev/ram0 console=hvc0"
 memory = 512
 '
 DOMU_CFG_EXTRA=""
-copy_domU_files () { :; }
-copy_dom0_files () { :; }
 
 # Select test variant.
 if [ "${TEST}" = "ping" ]; then
@@ -66,7 +64,7 @@ then
     PASS_MSG="TEST: Message from DOMU"
     XEN_CMD_EXTRA="argo=1,mac-permissive=1"
     DOMU_CMD="
-insmod /root/xen-argo.ko
+insmod /lib/modules/\$(uname -r)/updates/xen-argo.ko
 until false
 do
   echo \"${PASS_MSG}\"
@@ -74,24 +72,19 @@ do
 done | argo-exec -p 28333 -d 0 -- /bin/echo
 "
     DOM0_CMD="
-insmod /root/xen-argo.ko
+insmod /lib/modules/\$(uname -r)/updates/xen-argo.ko
 xl -vvv create /etc/xen/domU.cfg
 argo-exec -l -p 28333 -- /bin/echo
 "
-copy_dom0_files ()
-{
-    mkdir -p root usr/local/lib usr/local/bin
-    cp "${WORKDIR}/binaries/xen-argo.ko" "root/"
-    cp -ar "${WORKDIR}/binaries/lib/"* "usr/local/lib/"
-    cp "${WORKDIR}/binaries/argo-exec" "usr/local/bin/"
-}
-copy_domU_files () { copy_dom0_files; }
 else
     fatal "Unknown test: ${TEST}"
 fi
 
 # DomU rootfs
 cp binaries/rootfs.cpio.gz binaries/domU-rootfs.cpio.gz
+if [[ "${TEST}" == argo ]]; then
+    cat binaries/argo.cpio.gz >> binaries/domU-rootfs.cpio.gz
+fi
 
 # test-local configuration
 mkdir -p rootfs
@@ -108,13 +101,15 @@ echo "domU Welcome to Alpine Linux
 Kernel \r on an \m (\l)
 
 " > etc/issue
-copy_domU_files
 find . | cpio -H newc -o | gzip >> ../binaries/domU-rootfs.cpio.gz
 cd ..
 rm -rf rootfs
 
 # Dom0 rootfs
 cp binaries/rootfs.cpio.gz binaries/dom0-rootfs.cpio.gz
+if [[ "${TEST}" == argo ]]; then
+    cat binaries/argo.cpio.gz >> binaries/dom0-rootfs.cpio.gz
+fi
 
 # test-local configuration
 mkdir -p rootfs
@@ -134,7 +129,6 @@ echo "QEMU_XEN=/bin/false" >> etc/default/xencommons
 mkdir -p var/log/xen/console
 cp ../binaries/bzImage boot/vmlinuz
 cp ../binaries/domU-rootfs.cpio.gz boot/initrd-domU
-copy_dom0_files
 find . | cpio -H newc -o | gzip >> ../binaries/dom0-rootfs.cpio.gz
 cd ..
 
-- 
2.39.5



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        Mon, 14 Apr 2025 04:09:10 -0700 (PDT)
From: Andrew Cooper 
To: Xen-devel 
Cc: =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Andrew Cooper ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein 
Subject: [PATCH v3 5/6] CI: save toolstack artifact as cpio.gz
Date: Mon, 14 Apr 2025 12:09:02 +0100
Message-Id: <20250414110903.2355303-6-andrew.cooper3@citrix.com>
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From: Marek Marczykowski-Górecki 

This avoids the need to re-compress it in every test job.  This saves minutes
of wallclock time.

Signed-off-by: Marek Marczykowski-Górecki 
Reviewed-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Doug Goldstein 
CC: Marek Marczykowski-Górecki 

v3:
 * Rebase
 * Rename to xen-tools.cpio.gz to be more specific

https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1766186423
---
 automation/scripts/build                          | 2 +-
 automation/scripts/qemu-alpine-x86_64.sh          | 2 +-
 automation/scripts/qemu-smoke-dom0-arm64.sh       | 2 +-
 automation/scripts/qemu-smoke-dom0less-arm64.sh   | 2 +-
 automation/scripts/qubes-x86-64.sh                | 4 +++-
 automation/scripts/xilinx-smoke-dom0-x86_64.sh    | 4 ++--
 automation/scripts/xilinx-smoke-dom0less-arm64.sh | 3 +--
 7 files changed, 10 insertions(+), 9 deletions(-)

diff --git a/automation/scripts/build b/automation/scripts/build
index 522efe774ef3..51effec81ddd 100755
--- a/automation/scripts/build
+++ b/automation/scripts/build
@@ -108,7 +108,7 @@ else
     # Note: Some smoke tests depending on finding binaries/xen on a full build
     # even though dist/ contains everything, while some containers don't even
     # build Xen
-    cp -r dist binaries/
+    (cd dist/install; find | cpio -o -H newc | gzip) > binaries/xen-tools.cpio.gz
     cp -r tools/tests binaries/
     collect_xen_artefacts
 fi
diff --git a/automation/scripts/qemu-alpine-x86_64.sh b/automation/scripts/qemu-alpine-x86_64.sh
index c7dd12197862..fe86caa39304 100755
--- a/automation/scripts/qemu-alpine-x86_64.sh
+++ b/automation/scripts/qemu-alpine-x86_64.sh
@@ -30,11 +30,11 @@ cd ..
 
 # Dom0 rootfs
 cp rootfs.cpio.gz dom0-rootfs.cpio.gz
+cat xen-tools.cpio.gz >> dom0-rootfs.cpio.gz
 
 # test-local configuration
 mkdir -p rootfs
 cd rootfs
-cp -ar ../dist/install/* .
 mkdir -p root etc/local.d
 mv ../domU-rootfs.cpio.gz ./root
 cp ../bzImage ./root
diff --git a/automation/scripts/qemu-smoke-dom0-arm64.sh b/automation/scripts/qemu-smoke-dom0-arm64.sh
index c0cf61ff8f7b..61dd24b9abef 100755
--- a/automation/scripts/qemu-smoke-dom0-arm64.sh
+++ b/automation/scripts/qemu-smoke-dom0-arm64.sh
@@ -29,11 +29,11 @@ cd ..
 
 # Dom0 rootfs
 cp rootfs.cpio.gz dom0-rootfs.cpio.gz
+cat xen-tools.cpio.gz >> dom0-rootfs.cpio.gz
 
 # test-local configuration
 mkdir -p rootfs
 cd rootfs
-cp -ar ../dist/install/* .
 mkdir -p etc/local.d root
 mv ../domU-rootfs.cpio.gz ./root
 cp ../Image ./root
diff --git a/automation/scripts/qemu-smoke-dom0less-arm64.sh b/automation/scripts/qemu-smoke-dom0less-arm64.sh
index 8e939f0b7214..58f11dd31038 100755
--- a/automation/scripts/qemu-smoke-dom0less-arm64.sh
+++ b/automation/scripts/qemu-smoke-dom0less-arm64.sh
@@ -116,11 +116,11 @@ cd ..
 
 # Dom0 rootfs
 cp binaries/rootfs.cpio.gz binaries/dom0-rootfs.cpio.gz
+cat binaries/xen-tools.cpio.gz >> binaries/dom0-rootfs.cpio.gz
 
 # test-local configuration
 mkdir -p rootfs
 cd rootfs
-cp -ar ../binaries/dist/install/* .
 mkdir -p etc/local.d
 
 echo "#!/bin/bash
diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh
index e2376cb51cb4..3947027d6e4d 100755
--- a/automation/scripts/qubes-x86-64.sh
+++ b/automation/scripts/qubes-x86-64.sh
@@ -189,12 +189,12 @@ fi
 
 # Dom0 rootfs
 cp binaries/rootfs.cpio.gz binaries/dom0-rootfs.cpio.gz
+cat binaries/xen-tools.cpio.gz >> binaries/dom0-rootfs.cpio.gz
 
 # test-local configuration
 mkdir -p rootfs
 cd rootfs
 mkdir -p boot etc/local.d
-cp -ar ../binaries/dist/install/* .
 cp -ar ../binaries/tests .
 cp -a ../automation/scripts/run-tools-tests tests/
 
@@ -228,8 +228,10 @@ else
 fi
 
 chmod +x etc/local.d/xen.start
+mkdir -p etc/xen
 echo "$domU_config" > etc/xen/domU.cfg
 
+mkdir -p etc/default
 echo "XENCONSOLED_TRACE=all" >> etc/default/xencommons
 echo "QEMU_XEN=/bin/false" >> etc/default/xencommons
 mkdir -p var/log/xen/console
diff --git a/automation/scripts/xilinx-smoke-dom0-x86_64.sh b/automation/scripts/xilinx-smoke-dom0-x86_64.sh
index 85007dcc290a..1f8cc172c630 100755
--- a/automation/scripts/xilinx-smoke-dom0-x86_64.sh
+++ b/automation/scripts/xilinx-smoke-dom0-x86_64.sh
@@ -107,6 +107,7 @@ rm -rf rootfs
 
 # Dom0 rootfs
 cp binaries/rootfs.cpio.gz binaries/dom0-rootfs.cpio.gz
+cat binaries/xen-tools.cpio.gz >> binaries/dom0-rootfs.cpio.gz
 if [[ "${TEST}" == argo ]]; then
     cat binaries/argo.cpio.gz >> binaries/dom0-rootfs.cpio.gz
 fi
@@ -114,8 +115,7 @@ fi
 # test-local configuration
 mkdir -p rootfs
 cd rootfs
-mkdir -p boot etc/local.d
-cp -ar ../binaries/dist/install/* .
+mkdir -p boot etc/local.d etc/xen etc/default
 echo "#!/bin/bash
 set -x
 export LD_LIBRARY_PATH=/usr/local/lib
diff --git a/automation/scripts/xilinx-smoke-dom0less-arm64.sh b/automation/scripts/xilinx-smoke-dom0less-arm64.sh
index a3031ecab0dc..59f3fe7edb3e 100755
--- a/automation/scripts/xilinx-smoke-dom0less-arm64.sh
+++ b/automation/scripts/xilinx-smoke-dom0less-arm64.sh
@@ -56,12 +56,11 @@ rm -rf rootfs
 
 # Dom0 rootfs
 cp binaries/rootfs.cpio.gz binaries/dom0-rootfs.cpio.gz
+cat binaries/xen-tools.cpio.gz >> binaries/dom0-rootfs.cpio.gz
 
 # test-local configuration
 mkdir -p rootfs
 cd rootfs
-cp -ar ../binaries/dist/install/* .
-
 mkdir -p etc/local.d
 echo "#!/bin/bash
 
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
Subject: [PATCH v3 6/6] CI: Include microcode for x86 hardware jobs
Date: Mon, 14 Apr 2025 12:09:03 +0100
Message-Id: <20250414110903.2355303-7-andrew.cooper3@citrix.com>
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All the x86 hardware runners are out of date, to varying degrees, in terms of
microcode.

Microcode must be uncompressed and prepended to the initrd in order for Xen to
be able to use it during early boot.

Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Doug Goldstein 
CC: Marek Marczykowski-Górecki 

v3:
 * New

https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1766187024
---
 automation/gitlab-ci/build.yaml                | 1 +
 automation/gitlab-ci/test.yaml                 | 6 ++++++
 automation/scripts/qubes-x86-64.sh             | 3 ++-
 automation/scripts/xilinx-smoke-dom0-x86_64.sh | 3 ++-
 4 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml
index 1b82b359d01f..ac5367874526 100644
--- a/automation/gitlab-ci/build.yaml
+++ b/automation/gitlab-ci/build.yaml
@@ -306,6 +306,7 @@ alpine-3.18-gcc-debug:
       CONFIG_ARGO=y
       CONFIG_UBSAN=y
       CONFIG_UBSAN_FATAL=y
+      CONFIG_UCODE_SCAN_DEFAULT=y
       CONFIG_XHCI=y
 
 debian-12-x86_64-gcc-debug:
diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml
index d46da1c43d05..ef17def0120a 100644
--- a/automation/gitlab-ci/test.yaml
+++ b/automation/gitlab-ci/test.yaml
@@ -26,6 +26,9 @@
   - project: xen-project/hardware/test-artifacts
     job: alpine-3.18-x86_64-rootfs
     ref: master
+  - project: xen-project/hardware/test-artifacts
+    job: microcode-x86_64
+    ref: master
 
 .qemu-arm64:
   extends: .test-jobs-common
@@ -250,6 +253,9 @@ xilinx-smoke-dom0-x86_64-gcc-debug-argo:
     - project: xen-project/hardware/test-artifacts
       job: x86_64-argo-linux-6.6.56
       ref: master
+    - project: xen-project/hardware/test-artifacts
+      job: microcode-x86_64
+      ref: master
 
 adl-smoke-x86-64-gcc-debug:
   extends: .adl-x86-64
diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh
index 3947027d6e4d..1f90e7002c73 100755
--- a/automation/scripts/qubes-x86-64.sh
+++ b/automation/scripts/qubes-x86-64.sh
@@ -188,7 +188,8 @@ Kernel \r on an \m (\l)
 fi
 
 # Dom0 rootfs
-cp binaries/rootfs.cpio.gz binaries/dom0-rootfs.cpio.gz
+cp binaries/ucode.cpio binaries/dom0-rootfs.cpio.gz
+cat binaries/rootfs.cpio.gz >> binaries/dom0-rootfs.cpio.gz
 cat binaries/xen-tools.cpio.gz >> binaries/dom0-rootfs.cpio.gz
 
 # test-local configuration
diff --git a/automation/scripts/xilinx-smoke-dom0-x86_64.sh b/automation/scripts/xilinx-smoke-dom0-x86_64.sh
index 1f8cc172c630..5bb44188dc3d 100755
--- a/automation/scripts/xilinx-smoke-dom0-x86_64.sh
+++ b/automation/scripts/xilinx-smoke-dom0-x86_64.sh
@@ -106,7 +106,8 @@ cd ..
 rm -rf rootfs
 
 # Dom0 rootfs
-cp binaries/rootfs.cpio.gz binaries/dom0-rootfs.cpio.gz
+cp binaries/ucode.cpio binaries/dom0-rootfs.cpio.gz
+cat binaries/rootfs.cpio.gz >> binaries/dom0-rootfs.cpio.gz
 cat binaries/xen-tools.cpio.gz >> binaries/dom0-rootfs.cpio.gz
 if [[ "${TEST}" == argo ]]; then
     cat binaries/argo.cpio.gz >> binaries/dom0-rootfs.cpio.gz
-- 
2.39.5



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Date: Mon, 14 Apr 2025 12:12:18 +0100
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v6 2/3] xen/arm32: Create the same boot-time MPU regions
 as arm64
To: "Orzel, Michal" ,
 Ayan Kumar Halder , xen-devel@lists.xenproject.org
Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
 Volodymyr Babchuk ,
 Luca Fancellu 
References: <20250411110452.3748186-1-ayan.kumar.halder@amd.com>
 <20250411110452.3748186-3-ayan.kumar.halder@amd.com>
 
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Hi Michal,

On 14/04/2025 09:38, Orzel, Michal wrote:
>
> On 11/04/2025 13:04, Ayan Kumar Halder wrote:
>> Boot-time MPU protection regions (similar to Armv8-R AArch64) are created for
>> Armv8-R AArch32.
>> Also, defined *_PRBAR macros for arm32. The only difference from arm64 is that
>> XN is 1-bit for arm32.
>> Defined the system registers and macros in mpu/cpregs.h.
>>
>> Introduced WRITE_SYSREG_ASM() to write to system registers in assembly.
> It really reads odd when you write what patch does in past tense.
I will change it.
>
>> Signed-off-by: Ayan Kumar Halder 
>> Reviewed-by: Luca Fancellu 
>> ---
>> Changes from
>>
>> v1 -
>>
>> 1. enable_mpu() now sets HMAIR{0,1} registers. This is similar to what is
>> being done in enable_mmu(). All the mm related configurations happen in this
>> function.
>>
>> 2. Fixed some typos.
>>
>> v2 -
>> 1. Include the common prepare_xen_region.inc in head.S.
>>
>> 2. Define LOAD_SYSREG()/STORE_SYSREG() for arm32.
>>
>> v3 -
>> 1. Rename STORE_SYSREG() as WRITE_SYSREG_ASM()
>>
>> 2. enable_boot_cpu_mm() is defined in head.S
>>
>> v4 -
>> 1. *_PRBAR is moved to arm32/sysregs.h.
>>
>> 2. MPU specific CP15 system registers are defined in mpu/cpregs.h.
>>
>> v5 -
>> 1. WRITE_SYSREG_ASM is enclosed within #ifdef __ASSEMBLY__
>>
>> 2. enable_mpu() clobbers r0 only.
>>
>> 3. Definitions in mpu/cpregs.h in enclosed within ARM_32.
>>
>> 4. Removed some #ifdefs and style changes.
>>
>>   xen/arch/arm/arm32/Makefile              |   1 +
>>   xen/arch/arm/arm32/mpu/Makefile          |   1 +
>>   xen/arch/arm/arm32/mpu/head.S            | 104 +++++++++++++++++++++++
>>   xen/arch/arm/include/asm/arm32/sysregs.h |   9 ++
>>   xen/arch/arm/include/asm/cpregs.h        |   2 +
>>   xen/arch/arm/include/asm/mpu/cpregs.h    |  27 ++++++
>>   6 files changed, 144 insertions(+)
>>   create mode 100644 xen/arch/arm/arm32/mpu/Makefile
>>   create mode 100644 xen/arch/arm/arm32/mpu/head.S
>>   create mode 100644 xen/arch/arm/include/asm/mpu/cpregs.h
>>
>> diff --git a/xen/arch/arm/arm32/Makefile b/xen/arch/arm/arm32/Makefile
>> index 40a2b4803f..537969d753 100644
>> --- a/xen/arch/arm/arm32/Makefile
>> +++ b/xen/arch/arm/arm32/Makefile
>> @@ -1,5 +1,6 @@
>>   obj-y += lib/
>>   obj-$(CONFIG_MMU) += mmu/
>> +obj-$(CONFIG_MPU) += mpu/
>>   
>>   obj-$(CONFIG_EARLY_PRINTK) += debug.o
>>   obj-y += domctl.o
>> diff --git a/xen/arch/arm/arm32/mpu/Makefile b/xen/arch/arm/arm32/mpu/Makefile
>> new file mode 100644
>> index 0000000000..3340058c08
>> --- /dev/null
>> +++ b/xen/arch/arm/arm32/mpu/Makefile
>> @@ -0,0 +1 @@
>> +obj-y += head.o
>> diff --git a/xen/arch/arm/arm32/mpu/head.S b/xen/arch/arm/arm32/mpu/head.S
>> new file mode 100644
>> index 0000000000..b2c5245e51
>> --- /dev/null
>> +++ b/xen/arch/arm/arm32/mpu/head.S
>> @@ -0,0 +1,104 @@
>> +/* SPDX-License-Identifier: GPL-2.0-only */
>> +/*
>> + * Start-of-day code for an Armv8-R-AArch32 MPU system.
>> + */
>> +
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +
>> +/*
>> + * Set up the memory attribute type tables and enable EL2 MPU and data cache.
>> + * If the Background region is enabled, then the MPU uses the default memory
>> + * map as the Background region for generating the memory
>> + * attributes when MPU is disabled.
>> + * Since the default memory map of the Armv8-R AArch32 architecture is
>> + * IMPLEMENTATION DEFINED, we intend to turn off the Background region here.
>> + *
>> + * Clobbers r0
>> + */
>> +FUNC_LOCAL(enable_mpu)
>> +    /* Set up memory attribute type tables */
>> +    mov_w r0, MAIR0VAL
>> +    mcr   CP32(r0, HMAIR0)
>> +    mov_w r0, MAIR1VAL
>> +    mcr   CP32(r0, HMAIR1)
>> +
>> +    mrc   CP32(r0, HSCTLR)
>> +    bic   r0, r0, #SCTLR_ELx_BR       /* Disable Background region */
>> +    orr   r0, r0, #SCTLR_Axx_ELx_M    /* Enable MPU */
>> +    orr   r0, r0, #SCTLR_Axx_ELx_C    /* Enable D-cache */
>> +    mcr   CP32(r0, HSCTLR)
>> +    isb
>> +
>> +    ret
>> +END(enable_mpu)
>> +
>> +/*
>> + * Maps the various sections of Xen (described in xen.lds.S) as different MPU
>> + * regions.
>> + *
>> + * Clobbers r0 - r5
>> + *
>> + */
>> +FUNC(enable_boot_cpu_mm)
>> +    /* Get the number of regions specified in MPUIR_EL2 */
>> +    mrc   CP32(r5, MPUIR_EL2)
>> +    and   r5, r5, #NUM_MPU_REGIONS_MASK
>> +
>> +    /* x0: region sel */
>> +    mov   r0, #0
>> +    /* Xen text section. */
>> +    mov_w   r1, _stext
>> +    mov_w   r2, _etext
>> +    prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_TEXT_PRBAR
>> +
>> +    /* Xen read-only data section. */
>> +    mov_w   r1, _srodata
>> +    mov_w   r2, _erodata
>> +    prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_RO_PRBAR
>> +
>> +    /* Xen read-only after init and data section. (RW data) */
>> +    mov_w   r1, __ro_after_init_start
>> +    mov_w   r2, __init_begin
>> +    prepare_xen_region r0, r1, r2, r3, r4, r5
>> +
>> +    /* Xen code section. */
>> +    mov_w   r1, __init_begin
>> +    mov_w   r2, __init_data_begin
>> +    prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_TEXT_PRBAR
>> +
>> +    /* Xen data and BSS section. */
>> +    mov_w   r1, __init_data_begin
>> +    mov_w   r2, __bss_end
>> +    prepare_xen_region r0, r1, r2, r3, r4, r5
>> +
>> +#ifdef CONFIG_EARLY_PRINTK
>> +    /* Xen early UART section. */
>> +    mov_w   r1, CONFIG_EARLY_UART_BASE_ADDRESS
>> +    mov_w   r2, (CONFIG_EARLY_UART_BASE_ADDRESS + CONFIG_EARLY_UART_SIZE)
>> +    prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_DEVICE_PRBAR, attr_prlar=REGION_DEVICE_PRLAR
>> +#endif
>> +
>> +    b    enable_mpu
>> +END(enable_boot_cpu_mm)
>> +
>> +/*
>> + * We don't yet support secondary CPUs bring-up. Implement a dummy helper to
>> + * please the common code.
>> + */
>> +FUNC(enable_secondary_cpu_mm)
>> +    PRINT("- SMP not enabled yet -\r\n")
>> +1:  wfe
>> +    b 1b
>> +END(enable_secondary_cpu_mm)
>> +
>> +/*
>> + * Local variables:
>> + * mode: ASM
>> + * indent-tabs-mode: nil
>> + * End:
>> + */
>> diff --git a/xen/arch/arm/include/asm/arm32/sysregs.h b/xen/arch/arm/include/asm/arm32/sysregs.h
>> index 22871999af..8d7b95d982 100644
>> --- a/xen/arch/arm/include/asm/arm32/sysregs.h
>> +++ b/xen/arch/arm/include/asm/arm32/sysregs.h
>> @@ -20,6 +20,15 @@
>>    * uses r0 as a placeholder register. */
>>   #define CMD_CP32(name...)      "mcr " __stringify(CP32(r0, name)) ";"
>>   
>> +#define REGION_TEXT_PRBAR       0x18    /* SH=11 AP=10 XN=0 */
>> +#define REGION_RO_PRBAR         0x1D    /* SH=11 AP=10 XN=1 */
>> +#define REGION_DATA_PRBAR       0x19    /* SH=11 AP=00 XN=1 */
>> +#define REGION_DEVICE_PRBAR     0x11    /* SH=10 AP=00 XN=1 */
>> +
>> +#ifdef __ASSEMBLY__
> In previous patch, you had empty lines surrounding the macro.
I will put a empty line here.
>
>> +#define WRITE_SYSREG_ASM(v, name) mcr CP32(v, name)
> Hmm, for arm64 you surrounded msr within "". Any reason for these style changes?

In arm64, it is

"msr " __stringify(name,) #v

One needs " " to treat this as string for concatenation. Otherwise, we 
get an error.

In the case of arm32, we don't need __stringify().

Let me know if it makes sense.

>
>> +#endif /* __ASSEMBLY__ */
> Why #endif given ...
#else /* __ASSEMBLY__ */
>
>> +
>>   #ifndef __ASSEMBLY__
> this one?
remove this.
>
>>   
>>   /* C wrappers */
>> diff --git a/xen/arch/arm/include/asm/cpregs.h b/xen/arch/arm/include/asm/cpregs.h
>> index aec9e8f329..a7503a190f 100644
>> --- a/xen/arch/arm/include/asm/cpregs.h
>> +++ b/xen/arch/arm/include/asm/cpregs.h
>> @@ -1,6 +1,8 @@
>>   #ifndef __ASM_ARM_CPREGS_H
>>   #define __ASM_ARM_CPREGS_H
>>   
>> +#include 
>> +
>>   /*
>>    * AArch32 Co-processor registers.
>>    *
>> diff --git a/xen/arch/arm/include/asm/mpu/cpregs.h b/xen/arch/arm/include/asm/mpu/cpregs.h
>> new file mode 100644
>> index 0000000000..e2f3b2264c
>> --- /dev/null
>> +++ b/xen/arch/arm/include/asm/mpu/cpregs.h
>> @@ -0,0 +1,27 @@
>> +/* SPDX-License-Identifier: GPL-2.0-only */
>> +
>> +#ifndef __ASM_ARM_MPU_CPREGS_H
> There are already 4 header files in this directory. Why don't you look at them
> to get a hint as for naming the header guards? You don't need ASM here.

Yes, this should be

__ARM_MPU_CPREGS_H

>
>> +#define __ASM_ARM_MPU_CPREGS_H
>> +
>> +#ifdef CONFIG_ARM_32
> If you look at cpregs.h, we only use #ifdef CONFIG_ARM_32 to protect aliases.
> I'd prefer to follow the same rules here.
ok.
>
>> +
>> +/* CP15 CR0: MPU Type Register */
>> +#define HMPUIR          p15,4,c0,c0,4
>> +
>> +/* CP15 CR6: MPU Protection Region Base/Limit/Select Address Register */
>> +#define HPRSELR         p15,4,c6,c2,1
>> +#define PRBAR_EL2       p15,4,c6,c3,0
>> +#define PRLAR_EL2       p15,4,c6,c8,1
>> +
>> +#define MPUIR_EL2       HMPUIR
>> +#define PRSELR_EL2      HPRSELR
>> +
>> +#endif /* CONFIG_ARM_32 */
> Emtpy line here
ok
>
>> +#endif /* __ASM_ARM_MPU_CPREGS_H */
>> +
>> +/*
>> + * Local variables:
>> + * mode: ASM
> This is not ASM file.

Ack

- Ayan

>
> ~Michal
>


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Feedback-ID: i1568416f:Fastmail
Date: Mon, 14 Apr 2025 13:12:47 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	Jason Andryuk ,
	"Daniel P . Smith" 
Subject: Re: [PATCH v2 1/7] Rename and adjust x86 containers
Message-ID: 
References: <20250414101843.2348330-1-andrew.cooper3@citrix.com>
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Date: Mon, 14 Apr 2025 13:12:47 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	Jason Andryuk ,
	"Daniel P . Smith" 
Subject: Re: [PATCH v2 1/7] Rename and adjust x86 containers

On Mon, Apr 14, 2025 at 11:18:37AM +0100, Andrew Cooper wrote:
> Insert the Alpine version as we'll need a newer version in due course, and
> rename 'rootfs' to 'base' as the container really is not a rootfs on it's=
 own.
>=20
> In base, add bash.  It's added later by the rootfs generation anyway, but=
 this
> way we can write the generation script in bash too.
>=20
> In build, group and sort the packages.  Drop the ones we don't need, or a=
re
> pulled in by dependencies.  Include diffutils, findutils and gawk to avoid
> warnings in the kernel build.
>=20
> Signed-off-by: Andrew Cooper 

Reviewed-by: Marek Marczykowski-G=C3=B3recki 

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Message-ID: 
Date: Mon, 14 Apr 2025 12:14:25 +0100
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v6 1/3] xen/arm: Move some of the functions to common file
Content-Language: en-GB
To: Ayan Kumar Halder ,
 xen-devel@lists.xenproject.org
Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Luca Fancellu 
References: <20250411110452.3748186-1-ayan.kumar.halder@amd.com>
 <20250411110452.3748186-2-ayan.kumar.halder@amd.com>
From: Ayan Kumar Halder 
In-Reply-To: <20250411110452.3748186-2-ayan.kumar.halder@amd.com>
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Hi,

I will keep Michal's R-b with one small change.

On 11/04/2025 12:04, Ayan Kumar Halder wrote:
> regions.inc is added to hold the common earlyboot MPU regions configuration
> between arm64 and arm32.
>
> prepare_xen_region, fail_insufficient_regions() will be used by both arm32 and
> arm64. Thus, they have been moved to regions.inc.
>
> *_PRBAR are moved to arm64/sysregs.h.
> *_PRLAR are moved to regions.inc as they are common between arm32 and arm64.
>
> Introduce WRITE_SYSREG_ASM to write to the system registers from regions.inc.
>
> Signed-off-by: Ayan Kumar Halder 
> Reviewed-by: Luca Fancellu 
> ---
>
> Changes from
>
> v1 -
>
> 1. enable_mpu() now sets HMAIR{0,1} registers. This is similar to what is
> being done in enable_mmu(). All the mm related configurations happen in this
> function.
>
> 2. Fixed some typos.
>
> v2 -
> 1. Extracted the arm64 head.S functions/macros in a common file.
>
> v3 -
> 1. Moved *_PRLAR are moved to prepare_xen_region.inc
>
> 2. enable_boot_cpu_mm() is preserved in mpu/head.S.
>
> 3. STORE_SYSREG is renamed as WRITE_SYSREG_ASM()
>
> 4. LOAD_SYSREG is removed.
>
> 5. No need to save/restore lr in enable_boot_cpu_mm(). IOW, keep it as it was
> in the original code.
>
> v4 -
> 1. Rename prepare_xen_region.inc to common.inc
>
> 2. enable_secondary_cpu_mm() is moved back to mpu/head.S.
>
> v5 -
> 1. Rename common.inc to regions.inc.
>
> 2. WRITE_SYSREG_ASM() in enclosed within #ifdef __ASSEMBLY__.
>
>   xen/arch/arm/arm64/mpu/head.S            | 78 +----------------------
>   xen/arch/arm/include/asm/arm64/sysregs.h | 13 ++++
>   xen/arch/arm/include/asm/mpu/regions.inc | 79 ++++++++++++++++++++++++
>   3 files changed, 93 insertions(+), 77 deletions(-)
>   create mode 100644 xen/arch/arm/include/asm/mpu/regions.inc
>
> diff --git a/xen/arch/arm/arm64/mpu/head.S b/xen/arch/arm/arm64/mpu/head.S
> index ed01993d85..6d336cafbb 100644
> --- a/xen/arch/arm/arm64/mpu/head.S
> +++ b/xen/arch/arm/arm64/mpu/head.S
> @@ -3,83 +3,7 @@
>    * Start-of-day code for an Armv8-R MPU system.
>    */
>   
> -#include 
> -#include 
> -
> -/* Backgroud region enable/disable */
> -#define SCTLR_ELx_BR    BIT(17, UL)
> -
> -#define REGION_TEXT_PRBAR       0x38    /* SH=11 AP=10 XN=00 */
> -#define REGION_RO_PRBAR         0x3A    /* SH=11 AP=10 XN=10 */
> -#define REGION_DATA_PRBAR       0x32    /* SH=11 AP=00 XN=10 */
> -#define REGION_DEVICE_PRBAR     0x22    /* SH=10 AP=00 XN=10 */
> -
> -#define REGION_NORMAL_PRLAR     0x0f    /* NS=0 ATTR=111 EN=1 */
> -#define REGION_DEVICE_PRLAR     0x09    /* NS=0 ATTR=100 EN=1 */
> -
> -/*
> - * Macro to prepare and set a EL2 MPU memory region.
> - * We will also create an according MPU memory region entry, which
> - * is a structure of pr_t,  in table \prmap.
> - *
> - * sel:         region selector
> - * base:        reg storing base address
> - * limit:       reg storing limit address
> - * prbar:       store computed PRBAR_EL2 value
> - * prlar:       store computed PRLAR_EL2 value
> - * maxcount:    maximum number of EL2 regions supported
> - * attr_prbar:  PRBAR_EL2-related memory attributes. If not specified it will be
> - *              REGION_DATA_PRBAR
> - * attr_prlar:  PRLAR_EL2-related memory attributes. If not specified it will be
> - *              REGION_NORMAL_PRLAR
> - *
> - * Preserves \maxcount
> - * Output:
> - *  \sel: Next available region selector index.
> - * Clobbers \base, \limit, \prbar, \prlar
> - *
> - * Note that all parameters using registers should be distinct.
> - */
> -.macro prepare_xen_region, sel, base, limit, prbar, prlar, maxcount, attr_prbar=REGION_DATA_PRBAR, attr_prlar=REGION_NORMAL_PRLAR
> -    /* Check if the region is empty */
> -    cmp   \base, \limit
> -    beq   1f
> -
> -    /* Check if the number of regions exceeded the count specified in MPUIR_EL2 */
> -    cmp   \sel, \maxcount
> -    bge   fail_insufficient_regions
> -
> -    /* Prepare value for PRBAR_EL2 reg and preserve it in \prbar.*/
> -    and   \base, \base, #MPU_REGION_MASK
> -    mov   \prbar, #\attr_prbar
> -    orr   \prbar, \prbar, \base
> -
> -    /* Limit address should be inclusive */
> -    sub   \limit, \limit, #1
> -    and   \limit, \limit, #MPU_REGION_MASK
> -    mov   \prlar, #\attr_prlar
> -    orr   \prlar, \prlar, \limit
> -
> -    msr   PRSELR_EL2, \sel
> -    isb
> -    msr   PRBAR_EL2, \prbar
> -    msr   PRLAR_EL2, \prlar
> -    dsb   sy
> -    isb
> -
> -    add   \sel, \sel, #1
> -
> -1:
> -.endm
> -
> -/*
> - * Failure caused due to insufficient MPU regions.
> - */
> -FUNC_LOCAL(fail_insufficient_regions)
> -    PRINT("- Selected MPU region is above the implemented number in MPUIR_EL2 -\r\n")
> -1:  wfe
> -    b   1b
> -END(fail_insufficient_regions)
> +#include 
>   
>   /*
>    * Enable EL2 MPU and data cache
> diff --git a/xen/arch/arm/include/asm/arm64/sysregs.h b/xen/arch/arm/include/asm/arm64/sysregs.h
> index b593e4028b..dba0248c88 100644
> --- a/xen/arch/arm/include/asm/arm64/sysregs.h
> +++ b/xen/arch/arm/include/asm/arm64/sysregs.h
> @@ -462,6 +462,17 @@
>   #define ZCR_ELx_LEN_SIZE             9
>   #define ZCR_ELx_LEN_MASK             0x1ff
>   
> +#define REGION_TEXT_PRBAR       0x38    /* SH=11 AP=10 XN=00 */
> +#define REGION_RO_PRBAR         0x3A    /* SH=11 AP=10 XN=10 */
> +#define REGION_DATA_PRBAR       0x32    /* SH=11 AP=00 XN=10 */
> +#define REGION_DEVICE_PRBAR     0x22    /* SH=10 AP=00 XN=10 */
> +
> +#ifdef __ASSEMBLY__
> +
> +#define WRITE_SYSREG_ASM(v, name) "msr " __stringify(name,) #v
> +
> +#else /* !__ASSEMBLY__ */

change this to make it consistent as patch 2.

#else /* __ASSEMBLY__ */

- Ayan



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Date: Mon, 14 Apr 2025 13:15:26 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Denis Mukhin ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein 
Subject: Re: [PATCH v2 3/7] Rework rootfs generation to make a cpio archive
Message-ID: 
References: <20250414101843.2348330-1-andrew.cooper3@citrix.com>
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Date: Mon, 14 Apr 2025 13:15:26 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Denis Mukhin ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein 
Subject: Re: [PATCH v2 3/7] Rework rootfs generation to make a cpio archive

On Mon, Apr 14, 2025 at 11:18:39AM +0100, Andrew Cooper wrote:
> Rename the script as we're going to use it for ARM64 shortly, and have it=
 take
> a tar or cpio parameter to determine the output format.
>=20
> Turn it into a proper bash script, and provide the cpio form under the new
> artefact naming scheme.
>=20
> No functional change.
>=20
> Signed-off-by: Andrew Cooper 
> Reviewed-by: Denis Mukhin 

Reviewed-by: Marek Marczykowski-G=C3=B3recki 

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Subject: Re: [PATCH v4 10/15] xen/cpufreq: only set gov NULL when
 cpufreq_driver.setpolicy is NULL
To: Penny Zheng 
Cc: ray.huang@amd.com, xen-devel@lists.xenproject.org
References: <20250414074056.3696888-1-Penny.Zheng@amd.com>
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On 14.04.2025 09:40, Penny Zheng wrote:
> amd-cppc on active mode bypasses the scaling governor layer, and
> provides its own P-state selection algorithms in hardware. Consequently,
> when it is used, the driver's -> setpolicy() callback is invoked
> to register per-CPU utilization update callbacks, not the ->target()
> callback.
> 
> So, only when cpufreq_driver.setpolicy is NULL, we need to deliberately
> set old gov as NULL to trigger the according gov starting.
> 
> Signed-off-by: Penny Zheng 
> Reviewed-by: Jan Beulich 
> ---
> v3 -> v4:
> - fix indentation and this commit is independent of all earlier patches

I've committed this, but had to adjust for fuzz first. Would be nice if such
entirely ready (i.e. also independent) patches could be moved to the front of
the containing series.

Jan


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Date: Mon, 14 Apr 2025 20:21:05 +0900
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Subject: Re: [PATCH v6 2/3] xen/arm32: Create the same boot-time MPU regions
 as arm64
Content-Language: en-GB
To: Ayan Kumar Halder ,
 xen-devel@lists.xenproject.org
Cc: Stefano Stabellini ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Luca Fancellu 
References: <20250411110452.3748186-1-ayan.kumar.halder@amd.com>
 <20250411110452.3748186-3-ayan.kumar.halder@amd.com>
From: Julien Grall 
In-Reply-To: <20250411110452.3748186-3-ayan.kumar.halder@amd.com>
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Hi Ayan,

On 11/04/2025 20:04, Ayan Kumar Halder wrote:
> diff --git a/xen/arch/arm/include/asm/arm32/sysregs.h b/xen/arch/arm/include/asm/arm32/sysregs.h
> index 22871999af..8d7b95d982 100644
> --- a/xen/arch/arm/include/asm/arm32/sysregs.h
> +++ b/xen/arch/arm/include/asm/arm32/sysregs.h
> @@ -20,6 +20,15 @@
>    * uses r0 as a placeholder register. */
>   #define CMD_CP32(name...)      "mcr " __stringify(CP32(r0, name)) ";"
>   
> +#define REGION_TEXT_PRBAR       0x18    /* SH=11 AP=10 XN=0 */
> +#define REGION_RO_PRBAR         0x1D    /* SH=11 AP=10 XN=1 */
> +#define REGION_DATA_PRBAR       0x19    /* SH=11 AP=00 XN=1 */
> +#define REGION_DEVICE_PRBAR     0x11    /* SH=10 AP=00 XN=1 */
> +
> +#ifdef __ASSEMBLY__
> +#define WRITE_SYSREG_ASM(v, name) mcr CP32(v, name)
> +#endif /* __ASSEMBLY__ */
> +
>   #ifndef __ASSEMBLY__
>   
>   /* C wrappers */
> diff --git a/xen/arch/arm/include/asm/cpregs.h b/xen/arch/arm/include/asm/cpregs.h
> index aec9e8f329..a7503a190f 100644
> --- a/xen/arch/arm/include/asm/cpregs.h
> +++ b/xen/arch/arm/include/asm/cpregs.h
> @@ -1,6 +1,8 @@
>   #ifndef __ASM_ARM_CPREGS_H
>   #define __ASM_ARM_CPREGS_H
>   
> +#include 

Just to confirm, the CP registers used by the MPU will never be used for 
an other purpose on MMU systems, is that correct?

> diff --git a/xen/arch/arm/include/asm/mpu/cpregs.h b/xen/arch/arm/include/asm/mpu/cpregs.h
> new file mode 100644
> index 0000000000..e2f3b2264c
> --- /dev/null
> +++ b/xen/arch/arm/include/asm/mpu/cpregs.h
> @@ -0,0 +1,27 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +
> +#ifndef __ASM_ARM_MPU_CPREGS_H
> +#define __ASM_ARM_MPU_CPREGS_H
> +
> +#ifdef CONFIG_ARM_32

I am not sure I agree with the placement of this ifdef. Is the 
implication that 32-bit domain will never be supported on arm64? If not, 
then everything but the aliases should be available for 64-bit (like we 
already do in asm/cpregs.h).

> +
> +/* CP15 CR0: MPU Type Register */
> +#define HMPUIR          p15,4,c0,c0,4
> +
> +/* CP15 CR6: MPU Protection Region Base/Limit/Select Address Register */
> +#define HPRSELR         p15,4,c6,c2,1
> +#define PRBAR_EL2       p15,4,c6,c3,0
> +#define PRLAR_EL2       p15,4,c6,c8,1

I am a little bit surprised the registers have _EL2 in their name. By 
any chance are you using the aarch64 naming? If so, please provide the 
32-bit name and add an alias below.

> +
> +#define MPUIR_EL2       HMPUIR
> +#define PRSELR_EL2      HPRSELR

Please add a comment on top explaining why we have the aliases (see in 
cpregs.h).

> +
> +#endif /* CONFIG_ARM_32 */
> +#endif /* __ASM_ARM_MPU_CPREGS_H */
> +
> +/*
> + * Local variables:
> + * mode: ASM
> + * indent-tabs-mode: nil
> + * End:
> + */

Cheers,

-- 
Julien Grall



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Feedback-ID: i1568416f:Fastmail
Date: Mon, 14 Apr 2025 13:25:18 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein 
Subject: Re: [PATCH v2 4/7] Shrink the rootfs substantially
Message-ID: 
References: <20250414101843.2348330-1-andrew.cooper3@citrix.com>
 <20250414101843.2348330-5-andrew.cooper3@citrix.com>
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--gxC3D/kKw+fomu75
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Date: Mon, 14 Apr 2025 13:25:18 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein 
Subject: Re: [PATCH v2 4/7] Shrink the rootfs substantially

On Mon, Apr 14, 2025 at 11:18:40AM +0100, Andrew Cooper wrote:
> bash, busybox, musl and zlib are all in the base container.
>=20
> python3 and ncurses are in principle used by bits of Xen, but not in anyt=
hing
> we test in CI.  argp-standlone, curl, dbus, libfdt, libgcc and sudo aren't
> used at all (for x86 at least).
>=20
> libbz2 and libuuid were pulled in transitively before, and need to be inc=
luded
> explicitly now.
>=20
> Use apk --no-cache to avoid keeping a ~2M package index on disk.
>=20
> Remove the modules scan on boot.  We don't have or build any.  This remov=
es a
> chunk of warnings on boot.

Strictly speaking there is xen-argo.ko, but that's handled manually
anyway, so probably not worth mentioning.

> This shrinks the rootfs from ~30M down to ~8M.
>=20
> No practical change.

This also adds some preparation (the case on `uname -m`) for ARM64
rootfs, would be nice to mention it too. Especially since libfdt removed
here will be re-added for ARM.

> Signed-off-by: Andrew Cooper 
> ---
> CC: Anthony PERARD 
> CC: Stefano Stabellini 
> CC: Michal Orzel 
> CC: Doug Goldstein 
> CC: Marek Marczykowski-G=C3=B3recki 
> ---
>  scripts/alpine-rootfs.sh | 60 +++++++++++++++++++++++-----------------
>  1 file changed, 34 insertions(+), 26 deletions(-)
>=20
> diff --git a/scripts/alpine-rootfs.sh b/scripts/alpine-rootfs.sh
> index 75e2f8648ce5..72c29e0a0a13 100755
> --- a/scripts/alpine-rootfs.sh
> +++ b/scripts/alpine-rootfs.sh
> @@ -4,33 +4,42 @@ set -eu
> =20
>  WORKDIR=3D"${PWD}"
>  COPYDIR=3D"${WORKDIR}/binaries"
> +UNAME=3D$(uname -m)
> =20
> -apk update
> +apk --no-cache update

This is no-op, no? IIUC the only thing `apk update` does is updating the
cache, which you disabled...

> -# xen runtime deps
> -apk add musl
> -apk add libgcc
> -apk add openrc
> -apk add busybox
> -apk add sudo
> -apk add dbus
> -apk add bash
> -apk add python3
> -apk add zlib
> -apk add lzo
> -apk add ncurses
> -apk add yajl
> -apk add libaio
> -apk add xz
> -apk add util-linux
> -apk add argp-standalone
> -apk add libfdt
> -apk add glib
> -apk add pixman
> -apk add curl
> -apk add udev
> -apk add pciutils
> -apk add libelf
> +PKGS=3D(
> +    # System
> +    openrc
> +    udev
> +    util-linux
> +
> +    # Xen toolstack runtime deps
> +    libbz2
> +    libuuid
> +    lzo
> +    xz
> +    yajl
> +
> +    # QEMU
> +    glib
> +    libaio
> +    pixman
> +    )
> +
> +case $UNAME in
> +    x86_64)
> +        PKGS+=3D(
> +            # System
> +            pciutils
> +
> +            # QEMU
> +            libelf
> +            )
> +        ;;
> +esac
> +
> +apk add --no-cache "${PKGS[@]}"
> =20
>  # Xen
>  cd /
> @@ -45,7 +54,6 @@ rc-update add dmesg sysinit
>  rc-update add hostname boot
>  rc-update add hwclock boot
>  rc-update add hwdrivers sysinit
> -rc-update add modules boot
>  rc-update add killprocs shutdown
>  rc-update add mount-ro shutdown
>  rc-update add savecache shutdown
> --=20
> 2.39.5
>=20

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Date: Mon, 14 Apr 2025 12:35:22 +0100
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Subject: Re: [PATCH v2 4/7] Shrink the rootfs substantially
To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 
Cc: Xen-devel ,
 Anthony PERARD ,
 Stefano Stabellini ,
 Michal Orzel , Doug Goldstein 
References: <20250414101843.2348330-1-andrew.cooper3@citrix.com>
 <20250414101843.2348330-5-andrew.cooper3@citrix.com>
 
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From: Andrew Cooper 
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On 14/04/2025 12:25 pm, Marek Marczykowski-Górecki wrote:
> On Mon, Apr 14, 2025 at 11:18:40AM +0100, Andrew Cooper wrote:
>> bash, busybox, musl and zlib are all in the base container.
>>
>> python3 and ncurses are in principle used by bits of Xen, but not in anything
>> we test in CI.  argp-standlone, curl, dbus, libfdt, libgcc and sudo aren't
>> used at all (for x86 at least).
>>
>> libbz2 and libuuid were pulled in transitively before, and need to be included
>> explicitly now.
>>
>> Use apk --no-cache to avoid keeping a ~2M package index on disk.
>>
>> Remove the modules scan on boot.  We don't have or build any.  This removes a
>> chunk of warnings on boot.
> Strictly speaking there is xen-argo.ko, but that's handled manually
> anyway, so probably not worth mentioning.

Hmm, it's an awkward way around in the series, but yes.  The lack of
doing any of the normal module work in the kernel build is what causes
xen-argo.ko to be more special than I'd like.

>
>> This shrinks the rootfs from ~30M down to ~8M.
>>
>> No practical change.
> This also adds some preparation (the case on `uname -m`) for ARM64
> rootfs, would be nice to mention it too. Especially since libfdt removed
> here will be re-added for ARM.

"Factor out some x86-isms in preparation for ARM64 support."

>> Signed-off-by: Andrew Cooper 
>> ---
>> CC: Anthony PERARD 
>> CC: Stefano Stabellini 
>> CC: Michal Orzel 
>> CC: Doug Goldstein 
>> CC: Marek Marczykowski-Górecki 
>> ---
>>  scripts/alpine-rootfs.sh | 60 +++++++++++++++++++++++-----------------
>>  1 file changed, 34 insertions(+), 26 deletions(-)
>>
>> diff --git a/scripts/alpine-rootfs.sh b/scripts/alpine-rootfs.sh
>> index 75e2f8648ce5..72c29e0a0a13 100755
>> --- a/scripts/alpine-rootfs.sh
>> +++ b/scripts/alpine-rootfs.sh
>> @@ -4,33 +4,42 @@ set -eu
>>  
>>  WORKDIR="${PWD}"
>>  COPYDIR="${WORKDIR}/binaries"
>> +UNAME=$(uname -m)
>>  
>> -apk update
>> +apk --no-cache update
> This is no-op, no? IIUC the only thing `apk update` does is updating the
> cache, which you disabled...

Lovely.  This ought to be upgrade, so we pull in updates to the packages
in the base image.

~Andrew


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Subject: Re: [PATCH v3 2/7] arm/mpu: Provide access to the MPU region from the
 C code
Content-Language: en-GB
To: Luca Fancellu , xen-devel@lists.xenproject.org
Cc: Stefano Stabellini ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk 
References: <20250411145655.140667-1-luca.fancellu@arm.com>
 <20250411145655.140667-3-luca.fancellu@arm.com>
From: Julien Grall 
In-Reply-To: <20250411145655.140667-3-luca.fancellu@arm.com>
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Hi Luca,

On 11/04/2025 23:56, Luca Fancellu wrote:
> Implement some utility function in order to access the MPU regions
> from the C world.
> 
> Signed-off-by: Luca Fancellu 
> ---
> v3 changes:
>   - Moved PRBAR0_EL2/PRLAR0_EL2 to arm64 specific
>   - Modified prepare_selector() to be easily made a NOP
>     for Arm32, which can address up to 32 region without
>     changing selector and it is also its maximum amount
>     of MPU regions.
> ---
> ---
>   xen/arch/arm/include/asm/arm64/mpu.h |   7 ++
>   xen/arch/arm/include/asm/mpu.h       |   1 +
>   xen/arch/arm/include/asm/mpu/mm.h    |  24 +++++
>   xen/arch/arm/mpu/mm.c                | 125 +++++++++++++++++++++++++++
>   4 files changed, 157 insertions(+)
> 
> diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/asm/arm64/mpu.h
> index 4d2bd7d7877f..b4e1ecdf741d 100644
> --- a/xen/arch/arm/include/asm/arm64/mpu.h
> +++ b/xen/arch/arm/include/asm/arm64/mpu.h
> @@ -8,6 +8,13 @@
>   
>   #ifndef __ASSEMBLY__
>   
> +/*
> + * The following are needed for the case generators GENERATE_WRITE_PR_REG_CASE
> + * and GENERATE_READ_PR_REG_CASE with num==0
> + */
> +#define PRBAR0_EL2 PRBAR_EL2
> +#define PRLAR0_EL2 PRLAR_EL2

Rather than aliasing, shouldn't we just rename PR{B,L}AR_EL2 to 
PR{B,L}AR0_EL2? This would the code mixing between the two.

> +
>   /* Protection Region Base Address Register */
>   typedef union {
>       struct __packed {
> diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h
> index e148c705b82c..59ff22c804c1 100644
> --- a/xen/arch/arm/include/asm/mpu.h
> +++ b/xen/arch/arm/include/asm/mpu.h
> @@ -13,6 +13,7 @@
>   #define MPU_REGION_SHIFT  6
>   #define MPU_REGION_ALIGN  (_AC(1, UL) << MPU_REGION_SHIFT)
>   #define MPU_REGION_MASK   (~(MPU_REGION_ALIGN - 1))
> +#define MPU_REGION_RES0   (0xFFFULL << 52)
>   
>   #define NUM_MPU_REGIONS_SHIFT   8
>   #define NUM_MPU_REGIONS         (_AC(1, UL) << NUM_MPU_REGIONS_SHIFT)
> diff --git a/xen/arch/arm/include/asm/mpu/mm.h b/xen/arch/arm/include/asm/mpu/mm.h
> index 86f33d9836b7..5cabe9d111ce 100644
> --- a/xen/arch/arm/include/asm/mpu/mm.h
> +++ b/xen/arch/arm/include/asm/mpu/mm.h
> @@ -8,6 +8,7 @@
>   #include 
>   #include 
>   #include 
> +#include 
>   
>   extern struct page_info *frame_table;
>   
> @@ -29,6 +30,29 @@ static inline struct page_info *virt_to_page(const void *v)
>       return mfn_to_page(mfn);
>   }
>   
> +/* Utility function to be used whenever MPU regions are modified */
> +static inline void context_sync_mpu(void)
> +{
> +    /*
> +     * ARM DDI 0600B.a, C1.7.1
> +     * Writes to MPU registers are only guaranteed to be visible following a
> +     * Context synchronization event and DSB operation.

I know we discussed about this before. I find odd that the specification 
says "context synchronization event and DSB operation". At least to me, 
it implies "isb + dsb" not the other way around. Has this been clarified 
in newer version of the specification?

> +     */
> +    dsb(sy);
> +    isb();
> +}
> +
> +/*
> + * The following API require context_sync_mpu() after being used to modifiy MPU

typo: s/require/requires/ and s/modifiy/modify/

> + * regions:
> + *  - write_protection_region
> + */
> +
> +/* Reads the MPU region with index 'sel' from the HW */
> +extern void read_protection_region(pr_t *pr_read, uint8_t sel);

I am probably missing something. But don't you have a copy of pr_t in 
xen_mpumap? If so, can't we use the cached version to avoid accessing 
the system registers?

> +/* Writes the MPU region with index 'sel' to the HW */
> +extern void write_protection_region(const pr_t *pr_write, uint8_t sel);
> +
>   #endif /* __ARM_MPU_MM_H__ */
>   
>   /*
> diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c
> index f83ce04fef8a..e522ce53c357 100644
> --- a/xen/arch/arm/mpu/mm.c
> +++ b/xen/arch/arm/mpu/mm.c
> @@ -8,12 +8,30 @@
>   #include 
>   #include 
>   #include 
> +#include 
> +#include 
>   
>   struct page_info *frame_table;
>   
>   /* EL2 Xen MPU memory region mapping table. */
>   pr_t xen_mpumap[MAX_MPU_REGIONS];
>   
> +#define GENERATE_WRITE_PR_REG_CASE(num, pr)                                 \
> +    case num:                                                               \
> +    {                                                                       \
> +        WRITE_SYSREG(pr->prbar.bits & ~MPU_REGION_RES0, PRBAR##num##_EL2);  \
> +        WRITE_SYSREG(pr->prlar.bits & ~MPU_REGION_RES0, PRLAR##num##_EL2);  \
> +        break;                                                              \
> +    }
> +
> +#define GENERATE_READ_PR_REG_CASE(num, pr)                      \
> +    case num:                                                   \
> +    {                                                           \
> +        pr->prbar.bits = READ_SYSREG(PRBAR##num##_EL2);         \
> +        pr->prlar.bits = READ_SYSREG(PRLAR##num##_EL2);         \
> +        break;                                                  \
> +    }
> +
>   static void __init __maybe_unused build_assertions(void)
>   {
>       /*
> @@ -24,6 +42,113 @@ static void __init __maybe_unused build_assertions(void)
>       BUILD_BUG_ON(PAGE_SIZE != SZ_4K);
>   }
>   
> +static void prepare_selector(uint8_t *sel)
> +{
> +    uint8_t cur_sel = *sel;

Coding style: Missing newline.

> +    /*
> +     * {read,write}_protection_region works using the direct access to the 0..15
> +     * regions, so in order to save the isb() overhead, change the PRSELR_EL2
> +     * only when needed, so when the upper 4 bits of the selector will change.
> +     */
> +    cur_sel &= 0xF0U;
> +    if ( READ_SYSREG(PRSELR_EL2) != cur_sel )
> +    {
> +        WRITE_SYSREG(cur_sel, PRSELR_EL2);
> +        isb();
> +    }
> +    *sel = *sel & 0xFU;
> +}
> +
> +/*
> + * Armv8-R AArch64 at most supports 255 MPU protection regions.
> + * See section G1.3.18 of the reference manual for Armv8-R AArch64,
> + * PRBAR_EL2 and PRLAR_EL2 provide access to the EL2 MPU region
> + * determined by the value of 'n' and PRSELR_EL2.REGION as
> + * PRSELR_EL2.REGION<7:4>:n(n = 0, 1, 2, ... , 15)
> + * For example to access regions from 16 to 31 (0b10000 to 0b11111):
> + * - Set PRSELR_EL2 to 0b1xxxx
> + * - Region 16 configuration is accessible through PRBAR_EL2 and PRLAR_EL2
> + * - Region 17 configuration is accessible through PRBAR1_EL2 and PRLAR1_EL2
> + * - Region 18 configuration is accessible through PRBAR2_EL2 and PRLAR2_EL2
> + * - ...
> + * - Region 31 configuration is accessible through PRBAR15_EL2 and PRLAR15_EL2
> + */

I am a bit confused. This function is implemented in the common MPU 
code. Yet, then comment only refer to 64-bit. Is the code the same on 
32-bit? If not, then I think this function wants to be moved in arm64/mpu/

> +/*
> + * Read EL2 MPU Protection Region.
> + *
> + * @pr_read: mpu protection region returned by read op.
> + * @sel: mpu protection region selector
> + */

NIT: Usually we add documentation on the prototype in the header and not 
in the definition.

> +void read_protection_region(pr_t *pr_read, uint8_t sel)
> +{
> +    /*
> +     * Before accessing EL2 MPU region register PRBAR_EL2/PRLAR_EL2,
> +     * make sure PRSELR_EL2 is set, as it determines which MPU region
> +     * is selected.
> +     */
> +    prepare_selector(&sel);
> +
> +    switch ( sel )
> +    {
> +        GENERATE_READ_PR_REG_CASE(0, pr_read);
> +        GENERATE_READ_PR_REG_CASE(1, pr_read);
> +        GENERATE_READ_PR_REG_CASE(2, pr_read);
> +        GENERATE_READ_PR_REG_CASE(3, pr_read);
> +        GENERATE_READ_PR_REG_CASE(4, pr_read);
> +        GENERATE_READ_PR_REG_CASE(5, pr_read);
> +        GENERATE_READ_PR_REG_CASE(6, pr_read);
> +        GENERATE_READ_PR_REG_CASE(7, pr_read);
> +        GENERATE_READ_PR_REG_CASE(8, pr_read);
> +        GENERATE_READ_PR_REG_CASE(9, pr_read);
> +        GENERATE_READ_PR_REG_CASE(10, pr_read);
> +        GENERATE_READ_PR_REG_CASE(11, pr_read);
> +        GENERATE_READ_PR_REG_CASE(12, pr_read);
> +        GENERATE_READ_PR_REG_CASE(13, pr_read);
> +        GENERATE_READ_PR_REG_CASE(14, pr_read);
> +        GENERATE_READ_PR_REG_CASE(15, pr_read);
> +    default:
> +        BUG(); /* Can't happen */
> +    }
> +}
> +
> +/*
> + * Write EL2 MPU Protection Region.
> + *
> + * @pr_write: const mpu protection region passed through write op.
> + * @sel: mpu protection region selector
> + */
> +void write_protection_region(const pr_t *pr_write, uint8_t sel)
> +{
> +    /*
> +     * Before accessing EL2 MPU region register PRBAR_EL2/PRLAR_EL2,
> +     * make sure PRSELR_EL2 is set, as it determines which MPU region
> +     * is selected.
> +     */
> +    prepare_selector(&sel);
> +
> +    switch ( sel )
> +    {
> +        GENERATE_WRITE_PR_REG_CASE(0, pr_write);
> +        GENERATE_WRITE_PR_REG_CASE(1, pr_write);
> +        GENERATE_WRITE_PR_REG_CASE(2, pr_write);
> +        GENERATE_WRITE_PR_REG_CASE(3, pr_write);
> +        GENERATE_WRITE_PR_REG_CASE(4, pr_write);
> +        GENERATE_WRITE_PR_REG_CASE(5, pr_write);
> +        GENERATE_WRITE_PR_REG_CASE(6, pr_write);
> +        GENERATE_WRITE_PR_REG_CASE(7, pr_write);
> +        GENERATE_WRITE_PR_REG_CASE(8, pr_write);
> +        GENERATE_WRITE_PR_REG_CASE(9, pr_write);
> +        GENERATE_WRITE_PR_REG_CASE(10, pr_write);
> +        GENERATE_WRITE_PR_REG_CASE(11, pr_write);
> +        GENERATE_WRITE_PR_REG_CASE(12, pr_write);
> +        GENERATE_WRITE_PR_REG_CASE(13, pr_write);
> +        GENERATE_WRITE_PR_REG_CASE(14, pr_write);
> +        GENERATE_WRITE_PR_REG_CASE(15, pr_write);
> +    default:
> +        BUG(); /* Can't happen */
> +    }
> +}
> +
>   void __init setup_mm(void)
>   {
>       BUG_ON("unimplemented");

Cheers,

-- 
Julien Grall



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Date: Mon, 14 Apr 2025 13:48:18 +0200
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Subject: Re: [PATCH v3] xen/riscv: Increase XEN_VIRT_SIZE
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
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On 4/10/25 10:48 AM, Jan Beulich wrote:
> On 09.04.2025 21:01, Oleksii Kurochko wrote:
>> --- a/xen/arch/riscv/include/asm/mm.h
>> +++ b/xen/arch/riscv/include/asm/mm.h
>> @@ -9,6 +9,7 @@
>>   #include 
>>   #include 
>>   #include 
>> +#include 
>>   #include 
>>   
>>   #include 
>> @@ -35,6 +36,11 @@ static inline void *maddr_to_virt(paddr_t ma)
>>       return (void *)va;
>>   }
>>   
>> +#define is_init_section(p) ({                   \
>> +    char *p_ = (char *)(unsigned long)(p);      \
>> +    (p_ >= __init_begin) && (p_ < __init_end);  \
>> +})
> I think this wants to be put in xen/sections.h, next to where __init_{begin,end}
> are declared. But first it wants making const-correct, to eliminate the potential
> of it indirectly casting away const-ness from the incoming argument.
>
> (At some point related stuff wants moving from kernel.h to sections.h, I suppose.
> And at that point they will all want to have const added.)

Sure, I'll change to 'const char *p_ = (const char*)(unsigned long)(p)'.

>> --- a/xen/arch/riscv/mm.c
>> +++ b/xen/arch/riscv/mm.c
>> @@ -31,20 +31,24 @@ unsigned long __ro_after_init phys_offset; /* = load_start - XEN_VIRT_START */
>>   #define LOAD_TO_LINK(addr) ((unsigned long)(addr) - phys_offset)
>>   
>>   /*
>> - * It is expected that Xen won't be more then 2 MB.
>> + * It is expected that Xen won't be more then XEN_VIRT_SIZE MB.
> Why "MB" when the macro already expands to MB(16)?

It should be really dropped, no need for MB in the comment.

>
>>    * The check in xen.lds.S guarantees that.
>> - * At least 3 page tables (in case of Sv39 ) are needed to cover 2 MB.
>> - * One for each page level table with PAGE_SIZE = 4 Kb.
>>    *
>> - * One L0 page table can cover 2 MB(512 entries of one page table * PAGE_SIZE).
>> + * Root page table is shared with the initial mapping and is declared
>> + * separetely. (look at stage1_pgtbl_root)
> Nit: separately
>
>>    *
>> - * It might be needed one more page table in case when Xen load address
>> - * isn't 2 MB aligned.
>> + * An amount of page tables between root page table and L0 page table
>> + * (in the case of Sv39 it covers L1 table):
>> + *   (CONFIG_PAGING_LEVELS - 2) are needed for an identity mapping and
>> + *   the same amount are needed for Xen.
>>    *
>> - * CONFIG_PAGING_LEVELS page tables are needed for the identity mapping,
>> - * except that the root page table is shared with the initial mapping
>> + * An amount of L0 page tables:
>> + *   (512 entries of one L0 page table covers 2MB == 1<> + *   XEN_VIRT_SIZE >> XEN_PT_LEVEL_SHIFT(1) are needed for Xen and
>> + *   one L0 is needed for indenity mapping.
> Nit: identity
>
> But more importantly, where's this one L0 ...
>
>>    */
>> -#define PGTBL_INITIAL_COUNT ((CONFIG_PAGING_LEVELS - 1) * 2 + 1)
>> +#define PGTBL_INITIAL_COUNT ((CONFIG_PAGING_LEVELS - 2) * 2 + \
>> +                             (XEN_VIRT_SIZE >> XEN_PT_LEVEL_SHIFT(1)))
> .... in this calculation?

L0 for identity mapping is really missed.

Thanks.

~ Oleksii

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On 4/10/25 10:48 AM, Jan Beulich wrote:

    

    

      
On 09.04.2025 21:01, Oleksii Kurochko wrote:


      

        
--- a/xen/arch/riscv/include/asm/mm.h
+++ b/xen/arch/riscv/include/asm/mm.h
@@ -9,6 +9,7 @@
 #include <xen/mm-frame.h>
 #include <xen/pdx.h>
 #include <xen/pfn.h>
+#include <xen/sections.h>
 #include <xen/types.h>
 
 #include <asm/page-bits.h>
@@ -35,6 +36,11 @@ static inline void *maddr_to_virt(paddr_t ma)
     return (void *)va;
 }
 
+#define is_init_section(p) ({                   \
+    char *p_ = (char *)(unsigned long)(p);      \
+    (p_ >= __init_begin) && (p_ < __init_end);  \
+})


      

      
I think this wants to be put in xen/sections.h, next to where __init_{begin,end}
are declared. But first it wants making const-correct, to eliminate the potential
of it indirectly casting away const-ness from the incoming argument.

(At some point related stuff wants moving from kernel.h to sections.h, I suppose.
And at that point they will all want to have const added.)

    

    
Sure, I'll change to 'const char *p_ = (const char*)(unsigned long)(p)'.



    

      

        
--- a/xen/arch/riscv/mm.c
+++ b/xen/arch/riscv/mm.c
@@ -31,20 +31,24 @@ unsigned long __ro_after_init phys_offset; /* = load_start - XEN_VIRT_START */
 #define LOAD_TO_LINK(addr) ((unsigned long)(addr) - phys_offset)
 
 /*
- * It is expected that Xen won't be more then 2 MB.
+ * It is expected that Xen won't be more then XEN_VIRT_SIZE MB.


      

      
Why "MB" when the macro already expands to MB(16)?

    

    
It should be really dropped, no need for MB in the comment.



    

      



      

        
  * The check in xen.lds.S guarantees that.
- * At least 3 page tables (in case of Sv39 ) are needed to cover 2 MB.
- * One for each page level table with PAGE_SIZE = 4 Kb.
  *
- * One L0 page table can cover 2 MB(512 entries of one page table * PAGE_SIZE).
+ * Root page table is shared with the initial mapping and is declared
+ * separetely. (look at stage1_pgtbl_root)


      

      
Nit: separately



      

        
  *
- * It might be needed one more page table in case when Xen load address
- * isn't 2 MB aligned.
+ * An amount of page tables between root page table and L0 page table
+ * (in the case of Sv39 it covers L1 table):
+ *   (CONFIG_PAGING_LEVELS - 2) are needed for an identity mapping and
+ *   the same amount are needed for Xen.
  *
- * CONFIG_PAGING_LEVELS page tables are needed for the identity mapping,
- * except that the root page table is shared with the initial mapping
+ * An amount of L0 page tables:
+ *   (512 entries of one L0 page table covers 2MB == 1<<XEN_PT_LEVEL_SHIFT(1))
+ *   XEN_VIRT_SIZE >> XEN_PT_LEVEL_SHIFT(1) are needed for Xen and
+ *   one L0 is needed for indenity mapping.


      

      
Nit: identity

But more importantly, where's this one L0 ...



      

        
  */
-#define PGTBL_INITIAL_COUNT ((CONFIG_PAGING_LEVELS - 1) * 2 + 1)
+#define PGTBL_INITIAL_COUNT ((CONFIG_PAGING_LEVELS - 2) * 2 + \
+                             (XEN_VIRT_SIZE >> XEN_PT_LEVEL_SHIFT(1)))


      

      
.... in this calculation?

    

    
L0 for identity mapping is really missed.

Thanks.

~ Oleksii

  


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Date: Mon, 14 Apr 2025 20:48:56 +0900
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Subject: Re: [PATCH v3 5/7] arm/mpu: Introduce MPU memory mapping flags
Content-Language: en-GB
To: Luca Fancellu , xen-devel@lists.xenproject.org
Cc: Stefano Stabellini ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk 
References: <20250411145655.140667-1-luca.fancellu@arm.com>
 <20250411145655.140667-6-luca.fancellu@arm.com>
From: Julien Grall 
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Hi Luca,

On 11/04/2025 23:56, Luca Fancellu wrote:
> Introduce the MPU memory mapping flags in asm/page.h.
> 
> Signed-off-by: Luca Fancellu 
> ---
>   xen/arch/arm/include/asm/page.h | 25 +++++++++++++++++++++++++
>   1 file changed, 25 insertions(+)
> 
> diff --git a/xen/arch/arm/include/asm/page.h b/xen/arch/arm/include/asm/page.h
> index 69f817d1e68a..22f7d2c6cb30 100644
> --- a/xen/arch/arm/include/asm/page.h
> +++ b/xen/arch/arm/include/asm/page.h
> @@ -62,6 +62,7 @@
>   
>   #define MAIRVAL (MAIR1VAL << 32 | MAIR0VAL)
>   
> +#ifdef CONFIG_MMU
>   /*
>    * Layout of the flags used for updating the hypervisor page tables
>    *
> @@ -90,6 +91,30 @@
>   #define _PAGE_CONTIG_BIT    8
>   #define _PAGE_CONTIG        (1U << _PAGE_CONTIG_BIT)
>   
> +#else /* !CONFIG_MMU */
> +
> +/*
> + * Layout of the flags used for updating MPU memory region attributes
> + * [0:2] Memory attribute Index
> + * [3:4] Execute Never
> + * [5:6] Access Permission

I am rather confused why we are splitting Execute Never from the Access 
Permission. I guess you tried to match the HW, but it also means we need 
to duplicate a lot of define between the MMU and MPU code.

Instead, I would rather try to re-use the existing ones and ignore the 
ones we don't need (e.g. BLOCK_BIT and CONTIG).

Cheers,

-- 
Julien Grall



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
Subject: [PATCH v2.1 4/7] Shrink the rootfs substantially
Date: Mon, 14 Apr 2025 12:52:26 +0100
Message-Id: <20250414115226.2357714-1-andrew.cooper3@citrix.com>
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bash, busybox, musl and zlib are all in the base container.

python3 and ncurses are in principle used by bits of Xen, but not in anything
we test in CI.  argp-standlone, curl, dbus, libfdt, libgcc and sudo aren't
used at all (for x86 at least).

libbz2 and libuuid were pulled in transitively before, and need to be included
explicitly now.

Use apk --no-cache to avoid keeping a ~2M package index on disk.  Use apk
upgrade in case there are changes to the base container.

Remove the modules scan on boot.  We don't have or build any (except argo, and
that's handled specially).  This removes a chunk of warnings on boot.

This shrinks the rootfs from ~30M down to ~8M.

Factor out some x86-isms in preparation for ARM64 support.

No practical change.

Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Doug Goldstein 
CC: Marek Marczykowski-Górecki 

v2.1:
 * Extend commit message
 * Use apk upgrade

https://gitlab.com/xen-project/hardware/test-artifacts/-/jobs/9713228239
https://gitlab.com/xen-project/hardware/test-artifacts/-/jobs/9713228242
---
 scripts/alpine-rootfs.sh | 60 +++++++++++++++++++++++-----------------
 1 file changed, 34 insertions(+), 26 deletions(-)

diff --git a/scripts/alpine-rootfs.sh b/scripts/alpine-rootfs.sh
index 75e2f8648ce5..b01de9709d02 100755
--- a/scripts/alpine-rootfs.sh
+++ b/scripts/alpine-rootfs.sh
@@ -4,33 +4,42 @@ set -eu
 
 WORKDIR="${PWD}"
 COPYDIR="${WORKDIR}/binaries"
+UNAME=$(uname -m)
 
-apk update
+apk --no-cache upgrade
 
-# xen runtime deps
-apk add musl
-apk add libgcc
-apk add openrc
-apk add busybox
-apk add sudo
-apk add dbus
-apk add bash
-apk add python3
-apk add zlib
-apk add lzo
-apk add ncurses
-apk add yajl
-apk add libaio
-apk add xz
-apk add util-linux
-apk add argp-standalone
-apk add libfdt
-apk add glib
-apk add pixman
-apk add curl
-apk add udev
-apk add pciutils
-apk add libelf
+PKGS=(
+    # System
+    openrc
+    udev
+    util-linux
+
+    # Xen toolstack runtime deps
+    libbz2
+    libuuid
+    lzo
+    xz
+    yajl
+
+    # QEMU
+    glib
+    libaio
+    pixman
+    )
+
+case $UNAME in
+    x86_64)
+        PKGS+=(
+            # System
+            pciutils
+
+            # QEMU
+            libelf
+            )
+        ;;
+esac
+
+apk add --no-cache "${PKGS[@]}"
 
 # Xen
 cd /
@@ -45,7 +54,6 @@ rc-update add dmesg sysinit
 rc-update add hostname boot
 rc-update add hwclock boot
 rc-update add hwdrivers sysinit
-rc-update add modules boot
 rc-update add killprocs shutdown
 rc-update add mount-ro shutdown
 rc-update add savecache shutdown
-- 
2.39.5



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Date: Mon, 14 Apr 2025 12:54:19 +0100
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v6 2/3] xen/arm32: Create the same boot-time MPU regions
 as arm64
Content-Language: en-GB
To: Julien Grall ,
 Ayan Kumar Halder , xen-devel@lists.xenproject.org
Cc: Stefano Stabellini ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Luca Fancellu 
References: <20250411110452.3748186-1-ayan.kumar.halder@amd.com>
 <20250411110452.3748186-3-ayan.kumar.halder@amd.com>
 
From: Ayan Kumar Halder 
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On 14/04/2025 12:21, Julien Grall wrote:
> Hi Ayan,

Hi Julien,

A few clarifications.

>
> On 11/04/2025 20:04, Ayan Kumar Halder wrote:
>> diff --git a/xen/arch/arm/include/asm/arm32/sysregs.h 
>> b/xen/arch/arm/include/asm/arm32/sysregs.h
>> index 22871999af..8d7b95d982 100644
>> --- a/xen/arch/arm/include/asm/arm32/sysregs.h
>> +++ b/xen/arch/arm/include/asm/arm32/sysregs.h
>> @@ -20,6 +20,15 @@
>>    * uses r0 as a placeholder register. */
>>   #define CMD_CP32(name...)      "mcr " __stringify(CP32(r0, name)) ";"
>>   +#define REGION_TEXT_PRBAR       0x18    /* SH=11 AP=10 XN=0 */
>> +#define REGION_RO_PRBAR         0x1D    /* SH=11 AP=10 XN=1 */
>> +#define REGION_DATA_PRBAR       0x19    /* SH=11 AP=00 XN=1 */
>> +#define REGION_DEVICE_PRBAR     0x11    /* SH=10 AP=00 XN=1 */
>> +
>> +#ifdef __ASSEMBLY__
>> +#define WRITE_SYSREG_ASM(v, name) mcr CP32(v, name)
>> +#endif /* __ASSEMBLY__ */
>> +
>>   #ifndef __ASSEMBLY__
>>     /* C wrappers */
>> diff --git a/xen/arch/arm/include/asm/cpregs.h 
>> b/xen/arch/arm/include/asm/cpregs.h
>> index aec9e8f329..a7503a190f 100644
>> --- a/xen/arch/arm/include/asm/cpregs.h
>> +++ b/xen/arch/arm/include/asm/cpregs.h
>> @@ -1,6 +1,8 @@
>>   #ifndef __ASM_ARM_CPREGS_H
>>   #define __ASM_ARM_CPREGS_H
>>   +#include 
>
> Just to confirm, the CP registers used by the MPU will never be used 
> for an other purpose on MMU systems, is that correct?
Yes, this is correct. The registers are specific to PMSAv8-32 which will 
not be present on MMU systems.
>
>> diff --git a/xen/arch/arm/include/asm/mpu/cpregs.h 
>> b/xen/arch/arm/include/asm/mpu/cpregs.h
>> new file mode 100644
>> index 0000000000..e2f3b2264c
>> --- /dev/null
>> +++ b/xen/arch/arm/include/asm/mpu/cpregs.h
>> @@ -0,0 +1,27 @@
>> +/* SPDX-License-Identifier: GPL-2.0-only */
>> +
>> +#ifndef __ASM_ARM_MPU_CPREGS_H
>> +#define __ASM_ARM_MPU_CPREGS_H
>> +
>> +#ifdef CONFIG_ARM_32
>
> I am not sure I agree with the placement of this ifdef. Is the 
> implication that 32-bit domain will never be supported on arm64? If 
> not, then everything but the aliases should be available for 64-bit 
> (like we already do in asm/cpregs.h).
Yes, I will enclose the alias only.
>
>> +
>> +/* CP15 CR0: MPU Type Register */
>> +#define HMPUIR          p15,4,c0,c0,4
>> +
>> +/* CP15 CR6: MPU Protection Region Base/Limit/Select Address 
>> Register */
>> +#define HPRSELR         p15,4,c6,c2,1
>> +#define PRBAR_EL2       p15,4,c6,c3,0
>> +#define PRLAR_EL2       p15,4,c6,c8,1
>
> I am a little bit surprised the registers have _EL2 in their name. By 
> any chance are you using the aarch64 naming? 
yes.
> If so, please provide the 32-bit name and add an alias below.

yes, sorry this is a bit mixed up. I did not understand the purpose for 
defining alias , so I used the common name.

I will use HPRBAR and HPRLAR here and ....

>
>> +
>> +#define MPUIR_EL2       HMPUIR
>> +#define PRSELR_EL2      HPRSELR

#define PRBAR_EL2 HPRBAR

#define PRLAR_EL2 HPRLAR

>
> Please add a comment on top explaining why we have the aliases (see in 
> cpregs.h).

Actually, that comment (in asm/cpregs.h) did not make sense to me

"/* Aliases of AArch64 names for use in common code when building for 
AArch32 */"

Do you mean the common code is used for building both AArch64 and AArch32 ?

If so, then the comment I should put here

/* Aliases of AArch32 names for use in common code */

Does this sound correct ?

- Ayan

>
>> +
>> +#endif /* CONFIG_ARM_32 */
>> +#endif /* __ASM_ARM_MPU_CPREGS_H */
>> +
>> +/*
>> + * Local variables:
>> + * mode: ASM
>> + * indent-tabs-mode: nil
>> + * End:
>> + */
>
> Cheers,
>


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Date: Mon, 14 Apr 2025 20:57:34 +0900
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User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v3 6/7] arm/mpu: Implement early_fdt_map support in MPU
 systems
Content-Language: en-GB
To: Luca Fancellu , xen-devel@lists.xenproject.org
Cc: Stefano Stabellini ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk 
References: <20250411145655.140667-1-luca.fancellu@arm.com>
 <20250411145655.140667-7-luca.fancellu@arm.com>
From: Julien Grall 
In-Reply-To: <20250411145655.140667-7-luca.fancellu@arm.com>
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Hi Luca,

On 11/04/2025 23:56, Luca Fancellu wrote:
> Implement early_fdt_map() function, that is responsible to map the
> device tree blob in the early stages of the boot process, since at
> this stage the MPU C data structure are not yet initialised, it is
> using low level APIs to write into the MPU registers at a fixed
> MPU region number.
> 
> The MPU memory management is designed to work on pages of PAGE_SIZE
> in order to reuse helpers and macros already available on the Xen
> memory management system.
> 
> Signed-off-by: Luca Fancellu 
> ---
>   xen/arch/arm/mpu/setup.c | 54 ++++++++++++++++++++++++++++++++++++++--
>   1 file changed, 52 insertions(+), 2 deletions(-)
> 
> diff --git a/xen/arch/arm/mpu/setup.c b/xen/arch/arm/mpu/setup.c
> index b4da77003f47..5969065250d4 100644
> --- a/xen/arch/arm/mpu/setup.c
> +++ b/xen/arch/arm/mpu/setup.c
> @@ -1,17 +1,67 @@
>   /* SPDX-License-Identifier: GPL-2.0-only */
>   
> +#include 
>   #include 
>   #include 
> +#include 
>   #include 
> +#include 
>   #include 
> +#include 
> +#include 
>   #include 
>   
> +/* Needs to be kept in sync with the regions programmed in arm64/mpu/head.S */

This is common code. So you will need to keep in sync for both 32-bit 
and 64-bit. That said, someone modifying head.S will not necessarily 
remember that this needs to be kept in sync. Such comment would be more 
effective in head.S just after the last section.

However, the number of regions mapped can change. So I am not sure why 
we are...

> +#define EARLY_FDT_MAP_REGION_NUMBER 6

... hardcoding to 6 rather than using the next available region.

> +
>   void __init setup_pagetables(void) {}
>   
>   void * __init early_fdt_map(paddr_t fdt_paddr)
>   {
> -    BUG_ON("unimplemented");
> -    return NULL;
> +    /* Map at least a page containing the DTB address, exclusive range */
> +    paddr_t base_paddr = round_pgdown(fdt_paddr);

NIT:  IIRC, the minimum for the MPU is 64-byte. So is there any reason 
we are enforcing a bigger alignment?

> +    paddr_t end_paddr = round_pgup(fdt_paddr + sizeof(struct fdt_header));
> +    unsigned int flags = PAGE_HYPERVISOR_RO;
> +    void *fdt_virt = (void *)fdt_paddr; /* virt == paddr for MPU */
> +    pr_t fdt_region;
> +
> +    /*
> +     * Check whether the physical FDT address is set and meets the minimum
> +     * alignment requirement. Since we are relying on MIN_FDT_ALIGN to be at
> +     * least 8 bytes so that we always access the magic and size fields
> +     * of the FDT header after mapping the first chunk, double check if
> +     * that is indeed the case.
> +     */
> +    BUILD_BUG_ON(MIN_FDT_ALIGN < 8);
> +    if ( !fdt_paddr || fdt_paddr % MIN_FDT_ALIGN )
> +        return NULL;
> +
> +    /* Map the device tree blob header  */
> +    fdt_region = pr_of_xenaddr(base_paddr, end_paddr, PAGE_AI_MASK(flags));
> +    fdt_region.prbar.reg.ap = PAGE_AP_MASK(flags);
> +    fdt_region.prbar.reg.xn = PAGE_XN_MASK(flags);
> +
> +    write_protection_region(&fdt_region, EARLY_FDT_MAP_REGION_NUMBER);
> +    context_sync_mpu();
> +
> +    if ( fdt_magic(fdt_virt) != FDT_MAGIC )
> +        return NULL;
> +
> +    end_paddr = round_pgup(fdt_paddr + fdt_totalsize(fdt_virt));
> +
> +    /*
> +     * If the mapped range is not enough, map the rest of the DTB, pr_get_limit
> +     * returns an inclusive address of the range, hence the increment.
> +     */
> +    if ( end_paddr > (pr_get_limit(&fdt_region) + 1) )
> +    {
> +        pr_set_limit(&fdt_region, end_paddr);
> +
> +        write_protection_region(&fdt_region, EARLY_FDT_MAP_REGION_NUMBER);
> +        context_sync_mpu();
> +    }
> +
> +    return fdt_virt;
>   }
>   
>   /*

Cheers,

-- 
Julien Grall



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Date: Mon, 14 Apr 2025 12:57:37 +0100
Message-ID: 
CC: Oleksandr Tyshchenko , Xen-devel
	
Subject: Re: [ImageBuilder] uboot-script-gen: add xen xsm policy loading
 support
From: Alejandro Vallejo 
To: Grygorii Strashko ,
	"xen-devel@lists.xenproject.org" , "Stefano
 Stabellini" 
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As a general question, why using "test" so much, rather than

   if [ -n "$FOO" -a "FOO" =3D=3D ABC ]

Using test seems far harder to read than it needs to be, and single
brackets are perfectly valid POSIX shell.

On Mon Apr 14, 2025 at 9:14 AM BST, Grygorii Strashko wrote:
> From: Grygorii Strashko 
>
> This patch adds Xen XSM policy loading support.
>
> The configuration file XEN_POLICY specifies Xen hypervisor
> XSM policy binary to load.
>
> Signed-off-by: Grygorii Strashko 
> ---
>  README.md                |  2 ++
>  scripts/uboot-script-gen | 33 +++++++++++++++++++++++++++++++++
>  2 files changed, 35 insertions(+)
>
> diff --git a/README.md b/README.md
> index 137abef153ce..9106d2a07302 100644
> --- a/README.md
> +++ b/README.md
> @@ -91,6 +91,8 @@ Where:
>  - XEN specifies the Xen hypervisor binary to load. Note that it has to
>    be a regular Xen binary, not a u-boot binary.
> =20
> +- XEN_POLICY specifies the Xen hypervisor XSM policy binary to load.
> +
>  - XEN_COLORS specifies the colors (cache coloring) to be used for Xen
>    and is in the format startcolor-endcolor
> =20
> diff --git a/scripts/uboot-script-gen b/scripts/uboot-script-gen
> index c4d26caf5e0e..343eba20e4d9 100755
> --- a/scripts/uboot-script-gen
> +++ b/scripts/uboot-script-gen
> @@ -315,6 +315,15 @@ function xen_device_tree_editing()
>      dt_set "/chosen" "#size-cells" "hex" "0x2"
>      dt_set "/chosen" "xen,xen-bootargs" "str" "$XEN_CMD"
> =20
> +    if test "$XEN_POLICY" && test $xen_policy_addr !=3D "-"

If XEN_POLICY is a binary, shouldn't it be "test -f" ? Same later on.

Also, missing quotes around $xen_policy_addr

> +    then
> +        local node_name=3D"xen-policy@${xen_policy_addr#0x}"
> +
> +        dt_mknode "/chosen" "$node_name"
> +        dt_set "/chosen/$node_name" "compatible" "str_a" "xen,xsm-policy=
 xen,multiboot-module multiboot,module"
> +        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $xen_=
policy_addr $xen_policy_size)"
> +    fi
> +
>      if test "$DOM0_KERNEL"

test -f?
g
>      then
>          local node_name=3D"dom0@${dom0_kernel_addr#0x}"
> @@ -900,6 +909,14 @@ xen_file_loading()
>      kernel_addr=3D$memaddr
>      kernel_path=3D$XEN
>      load_file "$XEN" "host_kernel"
> +
> +    xen_policy_addr=3D=3D"-"

Do you mean =3D ?

> +    if test "$XEN_POLICY"
> +    then
> +        xen_policy_addr=3D$memaddr
> +        load_file "$XEN_POLICY" "xen_policy"
> +        xen_policy_size=3D$filesize
> +    fi
>  }
> =20
>  linux_file_loading()
> @@ -939,6 +956,22 @@ bitstream_load_and_config()
> =20
>  create_its_file_xen()
>  {
> +    if test "$XEN_POLICY" && test $xen_policy_addr !=3D "-"
> +    then
> +        cat >> "$its_file" <<- EOF
> +        xen_policy {
> +            description =3D "Xen XSM policy binary";
> +            data =3D /incbin/("$XEN_POLICY");
> +            type =3D "kernel";
> +            arch =3D "arm64";
> +            os =3D "linux";
> +            compression =3D "none";
> +            load =3D <$xen_policy_addr>;
> +            $fit_algo
> +        };
> +	EOF
> +    fi
> +
>      if test "$DOM0_KERNEL"
>      then
>          if test "$ramdisk_addr" !=3D "-"

Cheers,
Alejandro


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Subject: Re: [PATCH v6 2/3] xen/arm32: Create the same boot-time MPU regions
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To: Ayan Kumar Halder ,
 Ayan Kumar Halder , xen-devel@lists.xenproject.org
Cc: Stefano Stabellini ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Luca Fancellu 
References: <20250411110452.3748186-1-ayan.kumar.halder@amd.com>
 <20250411110452.3748186-3-ayan.kumar.halder@amd.com>
 
 <614002cc-4dfe-44f7-8ab5-ff7d4f1e694f@amd.com>
From: Julien Grall 
In-Reply-To: <614002cc-4dfe-44f7-8ab5-ff7d4f1e694f@amd.com>
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Hi Ayan,

On 14/04/2025 20:54, Ayan Kumar Halder wrote:
> 
> On 14/04/2025 12:21, Julien Grall wrote:
>> Hi Ayan,
> 
> Hi Julien,
> 
> A few clarifications.
> 
>>
>> On 11/04/2025 20:04, Ayan Kumar Halder wrote:
>>> diff --git a/xen/arch/arm/include/asm/arm32/sysregs.h b/xen/arch/arm/ 
>>> include/asm/arm32/sysregs.h
>>> index 22871999af..8d7b95d982 100644
>>> --- a/xen/arch/arm/include/asm/arm32/sysregs.h
>>> +++ b/xen/arch/arm/include/asm/arm32/sysregs.h
>>> @@ -20,6 +20,15 @@
>>>    * uses r0 as a placeholder register. */
>>>   #define CMD_CP32(name...)      "mcr " __stringify(CP32(r0, name)) ";"
>>>   +#define REGION_TEXT_PRBAR       0x18    /* SH=11 AP=10 XN=0 */
>>> +#define REGION_RO_PRBAR         0x1D    /* SH=11 AP=10 XN=1 */
>>> +#define REGION_DATA_PRBAR       0x19    /* SH=11 AP=00 XN=1 */
>>> +#define REGION_DEVICE_PRBAR     0x11    /* SH=10 AP=00 XN=1 */
>>> +
>>> +#ifdef __ASSEMBLY__
>>> +#define WRITE_SYSREG_ASM(v, name) mcr CP32(v, name)
>>> +#endif /* __ASSEMBLY__ */
>>> +
>>>   #ifndef __ASSEMBLY__
>>>     /* C wrappers */
>>> diff --git a/xen/arch/arm/include/asm/cpregs.h b/xen/arch/arm/ 
>>> include/asm/cpregs.h
>>> index aec9e8f329..a7503a190f 100644
>>> --- a/xen/arch/arm/include/asm/cpregs.h
>>> +++ b/xen/arch/arm/include/asm/cpregs.h
>>> @@ -1,6 +1,8 @@
>>>   #ifndef __ASM_ARM_CPREGS_H
>>>   #define __ASM_ARM_CPREGS_H
>>>   +#include 
>>
>> Just to confirm, the CP registers used by the MPU will never be used 
>> for an other purpose on MMU systems, is that correct?
> Yes, this is correct. The registers are specific to PMSAv8-32 which will 
> not be present on MMU systems.

I am not entirely sure this is answering my question. I was asking 
whether the encoding could be re-used for a non-MPU specific register in 
the future? IOW, is the encoding reserved for PMSAv8-32 only?

>>
>>> diff --git a/xen/arch/arm/include/asm/mpu/cpregs.h b/xen/arch/arm/ 
>>> include/asm/mpu/cpregs.h
>>> new file mode 100644
>>> index 0000000000..e2f3b2264c
>>> --- /dev/null
>>> +++ b/xen/arch/arm/include/asm/mpu/cpregs.h
>>> @@ -0,0 +1,27 @@
>>> +/* SPDX-License-Identifier: GPL-2.0-only */
>>> +
>>> +#ifndef __ASM_ARM_MPU_CPREGS_H
>>> +#define __ASM_ARM_MPU_CPREGS_H
>>> +
>>> +#ifdef CONFIG_ARM_32
>>
>> I am not sure I agree with the placement of this ifdef. Is the 
>> implication that 32-bit domain will never be supported on arm64? If 
>> not, then everything but the aliases should be available for 64-bit 
>> (like we already do in asm/cpregs.h).
> Yes, I will enclose the alias only.
>>
>>> +
>>> +/* CP15 CR0: MPU Type Register */
>>> +#define HMPUIR          p15,4,c0,c0,4
>>> +
>>> +/* CP15 CR6: MPU Protection Region Base/Limit/Select Address 
>>> Register */
>>> +#define HPRSELR         p15,4,c6,c2,1
>>> +#define PRBAR_EL2       p15,4,c6,c3,0
>>> +#define PRLAR_EL2       p15,4,c6,c8,1
>>
>> I am a little bit surprised the registers have _EL2 in their name. By 
>> any chance are you using the aarch64 naming? 
> yes.
>> If so, please provide the 32-bit name and add an alias below.
> 
> yes, sorry this is a bit mixed up. I did not understand the purpose for 
> defining alias , so I used the common name.
> 
> I will use HPRBAR and HPRLAR here and ....
> 
>>
>>> +
>>> +#define MPUIR_EL2       HMPUIR
>>> +#define PRSELR_EL2      HPRSELR
> 
> #define PRBAR_EL2 HPRBAR
> 
> #define PRLAR_EL2 HPRLAR
> 
>>
>> Please add a comment on top explaining why we have the aliases (see in 
>> cpregs.h).
> 
> Actually, that comment (in asm/cpregs.h) did not make sense to me
> 
> "/* Aliases of AArch64 names for use in common code when building for 
> AArch32 */"
> 
> Do you mean the common code is used for building both AArch64 and AArch32 ?

The goal of the comment is to explain why we are defining AArch64. So I 
think...

 > > If so, then the comment I should put here
> 
> /* Aliases of AArch32 names for use in common code */
> 
> Does this sound correct ?

it wants to be s/AArch32/AArch64/ in your proposed comment.

Cheers,

-- 
Julien Grall



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Date: Mon, 14 Apr 2025 14:06:00 +0200
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v6 2/3] xen/arm32: Create the same boot-time MPU regions
 as arm64
To: Ayan Kumar Halder ,
 Ayan Kumar Halder , xen-devel@lists.xenproject.org
Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
 Volodymyr Babchuk ,
 Luca Fancellu 
References: <20250411110452.3748186-1-ayan.kumar.halder@amd.com>
 <20250411110452.3748186-3-ayan.kumar.halder@amd.com>
 
 <0e20dc0f-ec97-4b6a-98c5-cdfcd3dfb44c@amd.com>
From: "Orzel, Michal" 
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On 14/04/2025 13:12, Ayan Kumar Halder wrote:
> Hi Michal,
> 
> On 14/04/2025 09:38, Orzel, Michal wrote:
>>
>> On 11/04/2025 13:04, Ayan Kumar Halder wrote:
>>> Boot-time MPU protection regions (similar to Armv8-R AArch64) are created for
>>> Armv8-R AArch32.
>>> Also, defined *_PRBAR macros for arm32. The only difference from arm64 is that
>>> XN is 1-bit for arm32.
>>> Defined the system registers and macros in mpu/cpregs.h.
>>>
>>> Introduced WRITE_SYSREG_ASM() to write to system registers in assembly.
>> It really reads odd when you write what patch does in past tense.
> I will change it.
>>
>>> Signed-off-by: Ayan Kumar Halder 
>>> Reviewed-by: Luca Fancellu 
>>> ---
>>> Changes from
>>>
>>> v1 -
>>>
>>> 1. enable_mpu() now sets HMAIR{0,1} registers. This is similar to what is
>>> being done in enable_mmu(). All the mm related configurations happen in this
>>> function.
>>>
>>> 2. Fixed some typos.
>>>
>>> v2 -
>>> 1. Include the common prepare_xen_region.inc in head.S.
>>>
>>> 2. Define LOAD_SYSREG()/STORE_SYSREG() for arm32.
>>>
>>> v3 -
>>> 1. Rename STORE_SYSREG() as WRITE_SYSREG_ASM()
>>>
>>> 2. enable_boot_cpu_mm() is defined in head.S
>>>
>>> v4 -
>>> 1. *_PRBAR is moved to arm32/sysregs.h.
>>>
>>> 2. MPU specific CP15 system registers are defined in mpu/cpregs.h.
>>>
>>> v5 -
>>> 1. WRITE_SYSREG_ASM is enclosed within #ifdef __ASSEMBLY__
>>>
>>> 2. enable_mpu() clobbers r0 only.
>>>
>>> 3. Definitions in mpu/cpregs.h in enclosed within ARM_32.
>>>
>>> 4. Removed some #ifdefs and style changes.
>>>
>>>   xen/arch/arm/arm32/Makefile              |   1 +
>>>   xen/arch/arm/arm32/mpu/Makefile          |   1 +
>>>   xen/arch/arm/arm32/mpu/head.S            | 104 +++++++++++++++++++++++
>>>   xen/arch/arm/include/asm/arm32/sysregs.h |   9 ++
>>>   xen/arch/arm/include/asm/cpregs.h        |   2 +
>>>   xen/arch/arm/include/asm/mpu/cpregs.h    |  27 ++++++
>>>   6 files changed, 144 insertions(+)
>>>   create mode 100644 xen/arch/arm/arm32/mpu/Makefile
>>>   create mode 100644 xen/arch/arm/arm32/mpu/head.S
>>>   create mode 100644 xen/arch/arm/include/asm/mpu/cpregs.h
>>>
>>> diff --git a/xen/arch/arm/arm32/Makefile b/xen/arch/arm/arm32/Makefile
>>> index 40a2b4803f..537969d753 100644
>>> --- a/xen/arch/arm/arm32/Makefile
>>> +++ b/xen/arch/arm/arm32/Makefile
>>> @@ -1,5 +1,6 @@
>>>   obj-y += lib/
>>>   obj-$(CONFIG_MMU) += mmu/
>>> +obj-$(CONFIG_MPU) += mpu/
>>>   
>>>   obj-$(CONFIG_EARLY_PRINTK) += debug.o
>>>   obj-y += domctl.o
>>> diff --git a/xen/arch/arm/arm32/mpu/Makefile b/xen/arch/arm/arm32/mpu/Makefile
>>> new file mode 100644
>>> index 0000000000..3340058c08
>>> --- /dev/null
>>> +++ b/xen/arch/arm/arm32/mpu/Makefile
>>> @@ -0,0 +1 @@
>>> +obj-y += head.o
>>> diff --git a/xen/arch/arm/arm32/mpu/head.S b/xen/arch/arm/arm32/mpu/head.S
>>> new file mode 100644
>>> index 0000000000..b2c5245e51
>>> --- /dev/null
>>> +++ b/xen/arch/arm/arm32/mpu/head.S
>>> @@ -0,0 +1,104 @@
>>> +/* SPDX-License-Identifier: GPL-2.0-only */
>>> +/*
>>> + * Start-of-day code for an Armv8-R-AArch32 MPU system.
>>> + */
>>> +
>>> +#include 
>>> +#include 
>>> +#include 
>>> +#include 
>>> +#include 
>>> +#include 
>>> +
>>> +/*
>>> + * Set up the memory attribute type tables and enable EL2 MPU and data cache.
>>> + * If the Background region is enabled, then the MPU uses the default memory
>>> + * map as the Background region for generating the memory
>>> + * attributes when MPU is disabled.
>>> + * Since the default memory map of the Armv8-R AArch32 architecture is
>>> + * IMPLEMENTATION DEFINED, we intend to turn off the Background region here.
>>> + *
>>> + * Clobbers r0
>>> + */
>>> +FUNC_LOCAL(enable_mpu)
>>> +    /* Set up memory attribute type tables */
>>> +    mov_w r0, MAIR0VAL
>>> +    mcr   CP32(r0, HMAIR0)
>>> +    mov_w r0, MAIR1VAL
>>> +    mcr   CP32(r0, HMAIR1)
>>> +
>>> +    mrc   CP32(r0, HSCTLR)
>>> +    bic   r0, r0, #SCTLR_ELx_BR       /* Disable Background region */
>>> +    orr   r0, r0, #SCTLR_Axx_ELx_M    /* Enable MPU */
>>> +    orr   r0, r0, #SCTLR_Axx_ELx_C    /* Enable D-cache */
>>> +    mcr   CP32(r0, HSCTLR)
>>> +    isb
>>> +
>>> +    ret
>>> +END(enable_mpu)
>>> +
>>> +/*
>>> + * Maps the various sections of Xen (described in xen.lds.S) as different MPU
>>> + * regions.
>>> + *
>>> + * Clobbers r0 - r5
>>> + *
>>> + */
>>> +FUNC(enable_boot_cpu_mm)
>>> +    /* Get the number of regions specified in MPUIR_EL2 */
>>> +    mrc   CP32(r5, MPUIR_EL2)
>>> +    and   r5, r5, #NUM_MPU_REGIONS_MASK
>>> +
>>> +    /* x0: region sel */
>>> +    mov   r0, #0
>>> +    /* Xen text section. */
>>> +    mov_w   r1, _stext
>>> +    mov_w   r2, _etext
>>> +    prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_TEXT_PRBAR
>>> +
>>> +    /* Xen read-only data section. */
>>> +    mov_w   r1, _srodata
>>> +    mov_w   r2, _erodata
>>> +    prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_RO_PRBAR
>>> +
>>> +    /* Xen read-only after init and data section. (RW data) */
>>> +    mov_w   r1, __ro_after_init_start
>>> +    mov_w   r2, __init_begin
>>> +    prepare_xen_region r0, r1, r2, r3, r4, r5
>>> +
>>> +    /* Xen code section. */
>>> +    mov_w   r1, __init_begin
>>> +    mov_w   r2, __init_data_begin
>>> +    prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_TEXT_PRBAR
>>> +
>>> +    /* Xen data and BSS section. */
>>> +    mov_w   r1, __init_data_begin
>>> +    mov_w   r2, __bss_end
>>> +    prepare_xen_region r0, r1, r2, r3, r4, r5
>>> +
>>> +#ifdef CONFIG_EARLY_PRINTK
>>> +    /* Xen early UART section. */
>>> +    mov_w   r1, CONFIG_EARLY_UART_BASE_ADDRESS
>>> +    mov_w   r2, (CONFIG_EARLY_UART_BASE_ADDRESS + CONFIG_EARLY_UART_SIZE)
>>> +    prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_DEVICE_PRBAR, attr_prlar=REGION_DEVICE_PRLAR
>>> +#endif
>>> +
>>> +    b    enable_mpu
>>> +END(enable_boot_cpu_mm)
>>> +
>>> +/*
>>> + * We don't yet support secondary CPUs bring-up. Implement a dummy helper to
>>> + * please the common code.
>>> + */
>>> +FUNC(enable_secondary_cpu_mm)
>>> +    PRINT("- SMP not enabled yet -\r\n")
>>> +1:  wfe
>>> +    b 1b
>>> +END(enable_secondary_cpu_mm)
>>> +
>>> +/*
>>> + * Local variables:
>>> + * mode: ASM
>>> + * indent-tabs-mode: nil
>>> + * End:
>>> + */
>>> diff --git a/xen/arch/arm/include/asm/arm32/sysregs.h b/xen/arch/arm/include/asm/arm32/sysregs.h
>>> index 22871999af..8d7b95d982 100644
>>> --- a/xen/arch/arm/include/asm/arm32/sysregs.h
>>> +++ b/xen/arch/arm/include/asm/arm32/sysregs.h
>>> @@ -20,6 +20,15 @@
>>>    * uses r0 as a placeholder register. */
>>>   #define CMD_CP32(name...)      "mcr " __stringify(CP32(r0, name)) ";"
>>>   
>>> +#define REGION_TEXT_PRBAR       0x18    /* SH=11 AP=10 XN=0 */
>>> +#define REGION_RO_PRBAR         0x1D    /* SH=11 AP=10 XN=1 */
>>> +#define REGION_DATA_PRBAR       0x19    /* SH=11 AP=00 XN=1 */
>>> +#define REGION_DEVICE_PRBAR     0x11    /* SH=10 AP=00 XN=1 */
>>> +
>>> +#ifdef __ASSEMBLY__
>> In previous patch, you had empty lines surrounding the macro.
> I will put a empty line here.
>>
>>> +#define WRITE_SYSREG_ASM(v, name) mcr CP32(v, name)
>> Hmm, for arm64 you surrounded msr within "". Any reason for these style changes?
> 
> In arm64, it is
> 
> "msr " __stringify(name,) #v
> 
> One needs " " to treat this as string for concatenation. Otherwise, we 
> get an error.
> 
> In the case of arm32, we don't need __stringify().
> 
> Let me know if it makes sense.
It does. Thanks for providing the reasoning.

~Michal



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Date: Mon, 14 Apr 2025 21:12:05 +0900
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User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v3 7/7] arm/mpu: Implement setup_mpu for MPU system
Content-Language: en-GB
To: Luca Fancellu , xen-devel@lists.xenproject.org
Cc: Stefano Stabellini ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk 
References: <20250411145655.140667-1-luca.fancellu@arm.com>
 <20250411145655.140667-8-luca.fancellu@arm.com>
From: Julien Grall 
In-Reply-To: <20250411145655.140667-8-luca.fancellu@arm.com>
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Hi Luca,

On 11/04/2025 23:56, Luca Fancellu wrote:
> Implement the function setup_mpu that will logically track the MPU
> regions defined by hardware registers, start introducing data
> structures and functions to track the status from the C world.
> 
> The xen_mpumap_mask bitmap is used to track which MPU region are
> enabled at runtime.
> 
> This function is called from setup_mm() which full implementation
> will be provided in a later stage.
> 
> Signed-off-by: Luca Fancellu 
> ---
> v3 changes:
>   - Moved PRENR_MASK define to common.
> ---
> ---
>   xen/arch/arm/include/asm/mpu.h |  2 ++
>   xen/arch/arm/mpu/mm.c          | 49 +++++++++++++++++++++++++++++++++-
>   2 files changed, 50 insertions(+), 1 deletion(-)
> 
> diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h
> index eba5086cde97..77d0566f9780 100644
> --- a/xen/arch/arm/include/asm/mpu.h
> +++ b/xen/arch/arm/include/asm/mpu.h
> @@ -20,6 +20,8 @@
>   #define NUM_MPU_REGIONS_MASK    (NUM_MPU_REGIONS - 1)
>   #define MAX_MPU_REGIONS         NUM_MPU_REGIONS_MASK
>   
> +#define PRENR_MASK  GENMASK(31, 0)
> +
>   /* Access permission attributes. */
>   /* Read/Write at EL2, No Access at EL1/EL0. */
>   #define AP_RW_EL2 0x0
> diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c
> index 635d1f5a2ba0..e0a40489a7fc 100644
> --- a/xen/arch/arm/mpu/mm.c
> +++ b/xen/arch/arm/mpu/mm.c
> @@ -14,6 +14,17 @@
>   
>   struct page_info *frame_table;
>   
> +/* Maximum number of supported MPU memory regions by the EL2 MPU. */
 > +uint8_t __ro_after_init max_xen_mpumap;

Are this variable and ...

> +
> +/*
> + * Bitmap xen_mpumap_mask is to record the usage of EL2 MPU memory regions.
> + * Bit 0 represents MPU memory region 0, bit 1 represents MPU memory
> + * region 1, ..., and so on.
> + * If a MPU memory region gets enabled, set the according bit to 1.
> + */
> +DECLARE_BITMAP(xen_mpumap_mask, MAX_MPU_REGIONS);

... this one meant to be global? If yes, then they need to have a 
declaration in the header. If not, then you want to add 'static'.

 > +
>   /* EL2 Xen MPU memory region mapping table. */
>   pr_t xen_mpumap[MAX_MPU_REGIONS];
>   
> @@ -222,9 +233,45 @@ pr_t pr_of_xenaddr(paddr_t base, paddr_t limit, unsigned attr)
>       return region;
>   }
>   
> +/*
> + * The code in this function needs to track the regions programmed in
> + * arm64/mpu/head.S
> + */
> +static void __init setup_mpu(void)
> +{
> +    register_t prenr;
> +    unsigned int i = 0;
> +
> +    /*
> +     * MPUIR_EL2.Region[0:7] identifies the number of regions supported by
> +     * the EL2 MPU.
> +     */
> +    max_xen_mpumap = (uint8_t)(READ_SYSREG(MPUIR_EL2) & NUM_MPU_REGIONS_MASK);
> +
> +    /* PRENR_EL2 has the N bit set if the N region is enabled, N < 32 */
> +    prenr = (READ_SYSREG(PRENR_EL2) & PRENR_MASK);
> +
> +    /*
> +     * Set the bitfield for regions enabled in assembly boot-time.
> +     * This code works under the assumption that the code in head.S has
> +     * allocated and enabled regions below 32 (N < 32).
> +     
This is a bit fragile. I think it would be better if the bitmap is set 
by head.S as we add the regions. Same for ...

> +    while ( prenr > 0 )
> +    {
> +        if (prenr & 0x1)
> +        {
> +            set_bit(i, xen_mpumap_mask);
> +            read_protection_region(&xen_mpumap[i], i);

... xen_mpumap.

> +        }
> +
> +        prenr >>= 1;
> +        i++;
> +    }
> +}
> +
>   void __init setup_mm(void)
>   {
> -    BUG_ON("unimplemented");
> +    setup_mpu();
 >   }>
>   int modify_xen_mappings(unsigned long s, unsigned long e, unsigned int nf)

Cheers,


-- 
Julien Grall



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On Mon Apr 14, 2025 at 12:57 PM BST, Alejandro Vallejo wrote:
> As a general question, why using "test" so much, rather than
>
>    if [ -n "$FOO" -a "FOO" =3D=3D ABC ]
>
> Using test seems far harder to read than it needs to be, and single
> brackets are perfectly valid POSIX shell.
>
> On Mon Apr 14, 2025 at 9:14 AM BST, Grygorii Strashko wrote:
>> From: Grygorii Strashko 
>>
>> This patch adds Xen XSM policy loading support.
>>
>> The configuration file XEN_POLICY specifies Xen hypervisor
>> XSM policy binary to load.
>>
>> Signed-off-by: Grygorii Strashko 
>> ---
>>  README.md                |  2 ++
>>  scripts/uboot-script-gen | 33 +++++++++++++++++++++++++++++++++
>>  2 files changed, 35 insertions(+)
>>
>> diff --git a/README.md b/README.md
>> index 137abef153ce..9106d2a07302 100644
>> --- a/README.md
>> +++ b/README.md
>> @@ -91,6 +91,8 @@ Where:
>>  - XEN specifies the Xen hypervisor binary to load. Note that it has to
>>    be a regular Xen binary, not a u-boot binary.
>> =20
>> +- XEN_POLICY specifies the Xen hypervisor XSM policy binary to load.
>> +
>>  - XEN_COLORS specifies the colors (cache coloring) to be used for Xen
>>    and is in the format startcolor-endcolor
>> =20
>> diff --git a/scripts/uboot-script-gen b/scripts/uboot-script-gen
>> index c4d26caf5e0e..343eba20e4d9 100755
>> --- a/scripts/uboot-script-gen
>> +++ b/scripts/uboot-script-gen
>> @@ -315,6 +315,15 @@ function xen_device_tree_editing()
>>      dt_set "/chosen" "#size-cells" "hex" "0x2"
>>      dt_set "/chosen" "xen,xen-bootargs" "str" "$XEN_CMD"
>> =20
>> +    if test "$XEN_POLICY" && test $xen_policy_addr !=3D "-"
>
> If XEN_POLICY is a binary, shouldn't it be "test -f" ? Same later on.

On the absent flag:

Nevermind, I see you're using "-n" implicitly instead. I'd rather it be
less opaque, but it does function. I do think most uses of test "$FOO"
would be better off with an explicit -f or -n. But that's a separate
matter.

Cheers,
Alejandro


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Date: Mon, 14 Apr 2025 13:26:00 +0100
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v6 2/3] xen/arm32: Create the same boot-time MPU regions
 as arm64
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To: Julien Grall ,
 Ayan Kumar Halder , xen-devel@lists.xenproject.org
Cc: Stefano Stabellini ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Luca Fancellu 
References: <20250411110452.3748186-1-ayan.kumar.halder@amd.com>
 <20250411110452.3748186-3-ayan.kumar.halder@amd.com>
 
 <614002cc-4dfe-44f7-8ab5-ff7d4f1e694f@amd.com>
 
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On 14/04/2025 13:03, Julien Grall wrote:
> Hi Ayan,
Hi Julien,
>
> On 14/04/2025 20:54, Ayan Kumar Halder wrote:
>>
>> On 14/04/2025 12:21, Julien Grall wrote:
>>> Hi Ayan,
>>
>> Hi Julien,
>>
>> A few clarifications.
>>
>>>
>>> On 11/04/2025 20:04, Ayan Kumar Halder wrote:
>>>> diff --git a/xen/arch/arm/include/asm/arm32/sysregs.h 
>>>> b/xen/arch/arm/ include/asm/arm32/sysregs.h
>>>> index 22871999af..8d7b95d982 100644
>>>> --- a/xen/arch/arm/include/asm/arm32/sysregs.h
>>>> +++ b/xen/arch/arm/include/asm/arm32/sysregs.h
>>>> @@ -20,6 +20,15 @@
>>>>    * uses r0 as a placeholder register. */
>>>>   #define CMD_CP32(name...)      "mcr " __stringify(CP32(r0, name)) 
>>>> ";"
>>>>   +#define REGION_TEXT_PRBAR       0x18    /* SH=11 AP=10 XN=0 */
>>>> +#define REGION_RO_PRBAR         0x1D    /* SH=11 AP=10 XN=1 */
>>>> +#define REGION_DATA_PRBAR       0x19    /* SH=11 AP=00 XN=1 */
>>>> +#define REGION_DEVICE_PRBAR     0x11    /* SH=10 AP=00 XN=1 */
>>>> +
>>>> +#ifdef __ASSEMBLY__
>>>> +#define WRITE_SYSREG_ASM(v, name) mcr CP32(v, name)
>>>> +#endif /* __ASSEMBLY__ */
>>>> +
>>>>   #ifndef __ASSEMBLY__
>>>>     /* C wrappers */
>>>> diff --git a/xen/arch/arm/include/asm/cpregs.h b/xen/arch/arm/ 
>>>> include/asm/cpregs.h
>>>> index aec9e8f329..a7503a190f 100644
>>>> --- a/xen/arch/arm/include/asm/cpregs.h
>>>> +++ b/xen/arch/arm/include/asm/cpregs.h
>>>> @@ -1,6 +1,8 @@
>>>>   #ifndef __ASM_ARM_CPREGS_H
>>>>   #define __ASM_ARM_CPREGS_H
>>>>   +#include 
>>>
>>> Just to confirm, the CP registers used by the MPU will never be used 
>>> for an other purpose on MMU systems, is that correct?
>> Yes, this is correct. The registers are specific to PMSAv8-32 which 
>> will not be present on MMU systems.
>
> I am not entirely sure this is answering my question. I was asking 
> whether the encoding could be re-used for a non-MPU specific register 
> in the future? IOW, is the encoding reserved for PMSAv8-32 only?
yes, these registers encoding are reserved for PMSAv8-32 only.
>
>>>
>>>> diff --git a/xen/arch/arm/include/asm/mpu/cpregs.h b/xen/arch/arm/ 
>>>> include/asm/mpu/cpregs.h
>>>> new file mode 100644
>>>> index 0000000000..e2f3b2264c
>>>> --- /dev/null
>>>> +++ b/xen/arch/arm/include/asm/mpu/cpregs.h
>>>> @@ -0,0 +1,27 @@
>>>> +/* SPDX-License-Identifier: GPL-2.0-only */
>>>> +
>>>> +#ifndef __ASM_ARM_MPU_CPREGS_H
>>>> +#define __ASM_ARM_MPU_CPREGS_H
>>>> +
>>>> +#ifdef CONFIG_ARM_32
>>>
>>> I am not sure I agree with the placement of this ifdef. Is the 
>>> implication that 32-bit domain will never be supported on arm64? If 
>>> not, then everything but the aliases should be available for 64-bit 
>>> (like we already do in asm/cpregs.h).
>> Yes, I will enclose the alias only.
>>>
>>>> +
>>>> +/* CP15 CR0: MPU Type Register */
>>>> +#define HMPUIR          p15,4,c0,c0,4
>>>> +
>>>> +/* CP15 CR6: MPU Protection Region Base/Limit/Select Address 
>>>> Register */
>>>> +#define HPRSELR         p15,4,c6,c2,1
>>>> +#define PRBAR_EL2       p15,4,c6,c3,0
>>>> +#define PRLAR_EL2       p15,4,c6,c8,1
>>>
>>> I am a little bit surprised the registers have _EL2 in their name. 
>>> By any chance are you using the aarch64 naming? 
>> yes.
>>> If so, please provide the 32-bit name and add an alias below.
>>
>> yes, sorry this is a bit mixed up. I did not understand the purpose 
>> for defining alias , so I used the common name.
>>
>> I will use HPRBAR and HPRLAR here and ....
>>
>>>
>>>> +
>>>> +#define MPUIR_EL2       HMPUIR
>>>> +#define PRSELR_EL2      HPRSELR
>>
>> #define PRBAR_EL2 HPRBAR
>>
>> #define PRLAR_EL2 HPRLAR
>>
>>>
>>> Please add a comment on top explaining why we have the aliases (see 
>>> in cpregs.h).
>>
>> Actually, that comment (in asm/cpregs.h) did not make sense to me
>>
>> "/* Aliases of AArch64 names for use in common code when building for 
>> AArch32 */"
>>
>> Do you mean the common code is used for building both AArch64 and 
>> AArch32 ?
>
> The goal of the comment is to explain why we are defining AArch64. So 
> I think...
>
> > > If so, then the comment I should put here
>>
>> /* Aliases of AArch32 names for use in common code */
>>
>> Does this sound correct ?
>
> it wants to be s/AArch32/AArch64/ in your proposed comment.

ok.

Now I understand. We are using AArch64 names in the common code. :)

- Ayan

>
> Cheers,
>


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Hi Alejandro,

On 14.04.25 14:57, Alejandro Vallejo wrote:
> As a general question, why using "test" so much, rather than
> 
>     if [ -n "$FOO" -a "FOO" == ABC ]
> 
> Using test seems far harder to read than it needs to be, and single
> brackets are perfectly valid POSIX shell.
> 
> On Mon Apr 14, 2025 at 9:14 AM BST, Grygorii Strashko wrote:
>> From: Grygorii Strashko 
>>
>> This patch adds Xen XSM policy loading support.
>>
>> The configuration file XEN_POLICY specifies Xen hypervisor
>> XSM policy binary to load.
>>
>> Signed-off-by: Grygorii Strashko 
>> ---
>>   README.md                |  2 ++
>>   scripts/uboot-script-gen | 33 +++++++++++++++++++++++++++++++++
>>   2 files changed, 35 insertions(+)
>>
>> diff --git a/README.md b/README.md
>> index 137abef153ce..9106d2a07302 100644
>> --- a/README.md
>> +++ b/README.md
>> @@ -91,6 +91,8 @@ Where:
>>   - XEN specifies the Xen hypervisor binary to load. Note that it has to
>>     be a regular Xen binary, not a u-boot binary.
>>   
>> +- XEN_POLICY specifies the Xen hypervisor XSM policy binary to load.
>> +
>>   - XEN_COLORS specifies the colors (cache coloring) to be used for Xen
>>     and is in the format startcolor-endcolor
>>   
>> diff --git a/scripts/uboot-script-gen b/scripts/uboot-script-gen
>> index c4d26caf5e0e..343eba20e4d9 100755
>> --- a/scripts/uboot-script-gen
>> +++ b/scripts/uboot-script-gen
>> @@ -315,6 +315,15 @@ function xen_device_tree_editing()
>>       dt_set "/chosen" "#size-cells" "hex" "0x2"
>>       dt_set "/chosen" "xen,xen-bootargs" "str" "$XEN_CMD"
>>   
>> +    if test "$XEN_POLICY" && test $xen_policy_addr != "-"
> 
> If XEN_POLICY is a binary, shouldn't it be "test -f" ? Same later on.

You're right. I'll update it as below...

> 
> Also, missing quotes around $xen_policy_addr
> 
>> +    then
>> +        local node_name="xen-policy@${xen_policy_addr#0x}"
>> +
>> +        dt_mknode "/chosen" "$node_name"
>> +        dt_set "/chosen/$node_name" "compatible" "str_a" "xen,xsm-policy xen,multiboot-module multiboot,module"
>> +        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $xen_policy_addr $xen_policy_size)"
>> +    fi
>> +
>>       if test "$DOM0_KERNEL"
> 
> test -f?
> g
>>       then
>>           local node_name="dom0@${dom0_kernel_addr#0x}"
>> @@ -900,6 +909,14 @@ xen_file_loading()
>>       kernel_addr=$memaddr
>>       kernel_path=$XEN
>>       load_file "$XEN" "host_kernel"
>> +
>> +    xen_policy_addr=="-"
> 
> Do you mean = ?
> 
>> +    if test "$XEN_POLICY"
>> +    then

I'll add here:

             check_file_type "${XEN_POLICY}" "SE Linux policy"

and fix other comments.

>> +        xen_policy_addr=$memaddr
>> +        load_file "$XEN_POLICY" "xen_policy"
>> +        xen_policy_size=$filesize
>> +    fi
>>   }
>>   
>>   linux_file_loading()
>> @@ -939,6 +956,22 @@ bitstream_load_and_config()
>>   
>>   create_its_file_xen()
>>   {
>> +    if test "$XEN_POLICY" && test $xen_policy_addr != "-"
>> +    then
>> +        cat >> "$its_file" <<- EOF
>> +        xen_policy {
>> +            description = "Xen XSM policy binary";
>> +            data = /incbin/("$XEN_POLICY");
>> +            type = "kernel";
>> +            arch = "arm64";
>> +            os = "linux";
>> +            compression = "none";
>> +            load = <$xen_policy_addr>;
>> +            $fit_algo
>> +        };
>> +	EOF
>> +    fi
>> +
>>       if test "$DOM0_KERNEL"
>>       then
>>           if test "$ramdisk_addr" != "-"

Thanks for your review.

-- 
Best regards,
-grygorii


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Subject: Re: [PATCH v3] xen/riscv: Increase XEN_VIRT_SIZE
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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 <35a0256f-cb48-4e39-b60d-8ee698154e77@gmail.com>
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On 14.04.2025 13:48, Oleksii Kurochko wrote:
> 
> On 4/10/25 10:48 AM, Jan Beulich wrote:
>> On 09.04.2025 21:01, Oleksii Kurochko wrote:
>>> --- a/xen/arch/riscv/include/asm/mm.h
>>> +++ b/xen/arch/riscv/include/asm/mm.h
>>> @@ -9,6 +9,7 @@
>>>   #include 
>>>   #include 
>>>   #include 
>>> +#include 
>>>   #include 
>>>   
>>>   #include 
>>> @@ -35,6 +36,11 @@ static inline void *maddr_to_virt(paddr_t ma)
>>>       return (void *)va;
>>>   }
>>>   
>>> +#define is_init_section(p) ({                   \
>>> +    char *p_ = (char *)(unsigned long)(p);      \
>>> +    (p_ >= __init_begin) && (p_ < __init_end);  \
>>> +})
>> I think this wants to be put in xen/sections.h, next to where __init_{begin,end}
>> are declared. But first it wants making const-correct, to eliminate the potential
>> of it indirectly casting away const-ness from the incoming argument.
>>
>> (At some point related stuff wants moving from kernel.h to sections.h, I suppose.
>> And at that point they will all want to have const added.)
> 
> Sure, I'll change to 'const char *p_ = (const char*)(unsigned long)(p)'.

And hopefully without forgetting the blank ahead of the *.

Jan


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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
Subject: [PATCH RFC 7/6] CI: Adjust how domU is packaged in dom0
Date: Mon, 14 Apr 2025 13:47:15 +0100
Message-Id: <20250414124715.2358883-1-andrew.cooper3@citrix.com>
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Package domU in /boot for dom0 and insert into the uncompressed part of dom0's
rootfs, rather than recompressing it as part of the overlay.

Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Doug Goldstein 
CC: Marek Marczykowski-Górecki 

A little RFC.  It wants extending to the other tests too.
---
 automation/scripts/qubes-x86-64.sh | 16 ++++++++++++----
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh
index 1f90e7002c73..7ce077dfeaee 100755
--- a/automation/scripts/qubes-x86-64.sh
+++ b/automation/scripts/qubes-x86-64.sh
@@ -185,10 +185,22 @@ Kernel \r on an \m (\l)
     find . | cpio -H newc -o | gzip >> ../binaries/domU-rootfs.cpio.gz
     cd ..
     rm -rf rootfs
+
+    # Package domU kernel+rootfs in /boot for dom0 (uncompressed)
+    mkdir -p rootfs/boot
+    cd rootfs
+    cp ../binaries/bzImage boot/vmlinuz
+    cp ../binaries/domU-rootfs.cpio.gz boot/
+    find . | cpio -H newc -o > ../binaries/domU-in-dom0.cpio
+    cd ..
+    rm -rf rootfs
 fi
 
 # Dom0 rootfs
 cp binaries/ucode.cpio binaries/dom0-rootfs.cpio.gz
+if [ -e binaries/domU-in-dom0.cpio ]; then
+    cat binaries/domU-in-dom0.cpio >> binaries/dom0-rootfs.cpio.gz
+fi
 cat binaries/rootfs.cpio.gz >> binaries/dom0-rootfs.cpio.gz
 cat binaries/xen-tools.cpio.gz >> binaries/dom0-rootfs.cpio.gz
 
@@ -236,10 +248,6 @@ mkdir -p etc/default
 echo "XENCONSOLED_TRACE=all" >> etc/default/xencommons
 echo "QEMU_XEN=/bin/false" >> etc/default/xencommons
 mkdir -p var/log/xen/console
-cp ../binaries/bzImage boot/vmlinuz
-if [ -n "$domU_check" ]; then
-    cp ../binaries/domU-rootfs.cpio.gz boot/initrd-domU
-fi
 find . | cpio -H newc -o | gzip >> ../binaries/dom0-rootfs.cpio.gz
 cd ..
 
-- 
2.39.5



From xen-devel-bounces@lists.xenproject.org Mon Apr 14 13:23:14 2025
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Subject: Re: [PATCH v2 0/5] Fix lazy mmu mode
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To: Alexander Gordeev 
Cc: Andrew Morton ,
 "David S. Miller" ,
 Andreas Larsson , Juergen Gross ,
 Boris Ostrovsky ,
 Thomas Gleixner , Ingo Molnar ,
 Borislav Petkov , Dave Hansen ,
 "H. Peter Anvin" ,
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On 10/04/2025 17:07, Alexander Gordeev wrote:
> On Mon, Mar 03, 2025 at 02:15:34PM +0000, Ryan Roberts wrote:
> 
> Hi Ryan,
> 
>> I'm planning to implement lazy mmu mode for arm64 to optimize vmalloc. As part
>> of that, I will extend lazy mmu mode to cover kernel mappings in vmalloc table
>> walkers. While lazy mmu mode is already used for kernel mappings in a few
>> places, this will extend it's use significantly.
>>
>> Having reviewed the existing lazy mmu implementations in powerpc, sparc and x86,
>> it looks like there are a bunch of bugs, some of which may be more likely to
>> trigger once I extend the use of lazy mmu.
> 
> Do you have any idea about generic code issues as result of not adhering to
> the originally stated requirement:
> 
>   /*
>    ...
>    * the PTE updates which happen during this window.  Note that using this
>    * interface requires that read hazards be removed from the code.  A read
>    * hazard could result in the direct mode hypervisor case, since the actual
>    * write to the page tables may not yet have taken place, so reads though
>    * a raw PTE pointer after it has been modified are not guaranteed to be
>    * up to date.
>    ...
>    */
> 
> I tried to follow few code paths and at least this one does not look so good:
> 
> copy_pte_range(..., src_pte, ...)
> 	ret = copy_nonpresent_pte(..., src_pte, ...)
> 		try_restore_exclusive_pte(..., src_pte, ...)	// is_device_exclusive_entry(entry)
> 			restore_exclusive_pte(..., ptep, ...)
> 				set_pte_at(..., ptep, ...)
> 					set_pte(ptep, pte);	// save in lazy mmu mode
> 
> 	// ret == -ENOENT
> 
> 	ptent = ptep_get(src_pte);				// lazy mmu save is not observed
> 	ret = copy_present_ptes(..., ptent, ...);		// wrong ptent used
> 
> I am not aware whether the effort to "read hazards be removed from the code"
> has ever been made and the generic code is safe in this regard.
> 
> What is your take on this?

Hmm, that looks like a bug to me, at least based on the stated requirements.
Although this is not a "read through a raw PTE *pointer*", it is a ptep_get().
The arch code can override that so I guess it has an opportunity to flush. But I
don't think any arches are currently doing that.

Probably the simplest fix is to add arch_flush_lazy_mmu_mode() before the
ptep_get()?

It won't be a problem in practice for arm64, since the pgtables are always
updated immediately. I just want to use these hooks to defer/batch barriers in
certain cases.

And this is a pre-existing issue for the arches that use lazy mmu with
device-exclusive mappings, which my extending lazy mmu into vmalloc won't
exacerbate.

Would you be willing/able to submit a fix?

Thanks,
Ryan


> 
> Thanks!



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From: Sasha Levin 
To: linux-kernel@vger.kernel.org,
	stable@vger.kernel.org
Cc: Jason Andryuk ,
	Jan Beulich ,
	Juergen Gross ,
	Sasha Levin ,
	sstabellini@kernel.org,
	xen-devel@lists.xenproject.org
Subject: [PATCH AUTOSEL 6.14 07/34] xen: Change xen-acpi-processor dom0 dependency
Date: Mon, 14 Apr 2025 09:25:43 -0400
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From: Jason Andryuk 

[ Upstream commit 0f2946bb172632e122d4033e0b03f85230a29510 ]

xen-acpi-processor functions under a PVH dom0 with only a
xen_initial_domain() runtime check.  Change the Kconfig dependency from
PV dom0 to generic dom0 to reflect that.

Suggested-by: Jan Beulich 
Signed-off-by: Jason Andryuk 
Reviewed-by: Juergen Gross 
Tested-by: Jan Beulich 
Signed-off-by: Juergen Gross 
Message-ID: <20250331172913.51240-1-jason.andryuk@amd.com>
Signed-off-by: Sasha Levin 
---
 drivers/xen/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/xen/Kconfig b/drivers/xen/Kconfig
index f7d6f47971fdf..24f485827e039 100644
--- a/drivers/xen/Kconfig
+++ b/drivers/xen/Kconfig
@@ -278,7 +278,7 @@ config XEN_PRIVCMD_EVENTFD
 
 config XEN_ACPI_PROCESSOR
 	tristate "Xen ACPI processor"
-	depends on XEN && XEN_PV_DOM0 && X86 && ACPI_PROCESSOR && CPU_FREQ
+	depends on XEN && XEN_DOM0 && X86 && ACPI_PROCESSOR && CPU_FREQ
 	default m
 	help
 	  This ACPI processor uploads Power Management information to the Xen
-- 
2.39.5



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From: Sasha Levin 
To: linux-kernel@vger.kernel.org,
	stable@vger.kernel.org
Cc: Roger Pau Monne ,
	Jason Andryuk ,
	Juergen Gross ,
	Sasha Levin ,
	tglx@linutronix.de,
	mingo@redhat.com,
	bp@alien8.de,
	dave.hansen@linux.intel.com,
	x86@kernel.org,
	xen-devel@lists.xenproject.org
Subject: [PATCH AUTOSEL 6.14 21/34] x86/xen: disable CPU idle and frequency drivers for PVH dom0
Date: Mon, 14 Apr 2025 09:25:57 -0400
Message-Id: <20250414132610.677644-21-sashal@kernel.org>
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From: Roger Pau Monne 

[ Upstream commit 64a66e2c3b3113dc78a6124e14825d68ddc2e188 ]

When running as a PVH dom0 the ACPI tables exposed to Linux are (mostly)
the native ones, thus exposing the C and P states, that can lead to
attachment of CPU idle and frequency drivers.  However the entity in
control of the CPU C and P states is Xen, as dom0 doesn't have a full view
of the system load, neither has all CPUs assigned and identity pinned.

Like it's done for classic PV guests, prevent Linux from using idle or
frequency state drivers when running as a PVH dom0.

On an AMD EPYC 7543P system without this fix a Linux PVH dom0 will keep the
host CPUs spinning at 100% even when dom0 is completely idle, as it's
attempting to use the acpi_idle driver.

Signed-off-by: Roger Pau Monné 
Reviewed-by: Jason Andryuk 
Signed-off-by: Juergen Gross 
Message-ID: <20250407101842.67228-1-roger.pau@citrix.com>
Signed-off-by: Sasha Levin 
---
 arch/x86/xen/enlighten_pvh.c | 19 ++++++++++++++++++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/arch/x86/xen/enlighten_pvh.c b/arch/x86/xen/enlighten_pvh.c
index 0e3d930bcb89e..9d25d9373945c 100644
--- a/arch/x86/xen/enlighten_pvh.c
+++ b/arch/x86/xen/enlighten_pvh.c
@@ -1,5 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0
 #include 
+#include 
+#include 
 #include 
 #include 
 
@@ -123,8 +125,23 @@ static void __init pvh_arch_setup(void)
 {
 	pvh_reserve_extra_memory();
 
-	if (xen_initial_domain())
+	if (xen_initial_domain()) {
 		xen_add_preferred_consoles();
+
+		/*
+		 * Disable usage of CPU idle and frequency drivers: when
+		 * running as hardware domain the exposed native ACPI tables
+		 * causes idle and/or frequency drivers to attach and
+		 * malfunction.  It's Xen the entity that controls the idle and
+		 * frequency states.
+		 *
+		 * For unprivileged domains the exposed ACPI tables are
+		 * fabricated and don't contain such data.
+		 */
+		disable_cpuidle();
+		disable_cpufreq();
+		WARN_ON(xen_set_default_idle());
+	}
 }
 
 void __init xen_pvh_init(struct boot_params *boot_params)
-- 
2.39.5



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From: Sasha Levin 
To: linux-kernel@vger.kernel.org,
	stable@vger.kernel.org
Cc: Roger Pau Monne ,
	Jason Andryuk ,
	Juergen Gross ,
	Sasha Levin ,
	tglx@linutronix.de,
	mingo@redhat.com,
	bp@alien8.de,
	dave.hansen@linux.intel.com,
	x86@kernel.org,
	xen-devel@lists.xenproject.org
Subject: [PATCH AUTOSEL 6.13 21/34] x86/xen: disable CPU idle and frequency drivers for PVH dom0
Date: Mon, 14 Apr 2025 09:27:15 -0400
Message-Id: <20250414132729.679254-21-sashal@kernel.org>
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From: Roger Pau Monne 

[ Upstream commit 64a66e2c3b3113dc78a6124e14825d68ddc2e188 ]

When running as a PVH dom0 the ACPI tables exposed to Linux are (mostly)
the native ones, thus exposing the C and P states, that can lead to
attachment of CPU idle and frequency drivers.  However the entity in
control of the CPU C and P states is Xen, as dom0 doesn't have a full view
of the system load, neither has all CPUs assigned and identity pinned.

Like it's done for classic PV guests, prevent Linux from using idle or
frequency state drivers when running as a PVH dom0.

On an AMD EPYC 7543P system without this fix a Linux PVH dom0 will keep the
host CPUs spinning at 100% even when dom0 is completely idle, as it's
attempting to use the acpi_idle driver.

Signed-off-by: Roger Pau Monné 
Reviewed-by: Jason Andryuk 
Signed-off-by: Juergen Gross 
Message-ID: <20250407101842.67228-1-roger.pau@citrix.com>
Signed-off-by: Sasha Levin 
---
 arch/x86/xen/enlighten_pvh.c | 19 ++++++++++++++++++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/arch/x86/xen/enlighten_pvh.c b/arch/x86/xen/enlighten_pvh.c
index 0e3d930bcb89e..9d25d9373945c 100644
--- a/arch/x86/xen/enlighten_pvh.c
+++ b/arch/x86/xen/enlighten_pvh.c
@@ -1,5 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0
 #include 
+#include 
+#include 
 #include 
 #include 
 
@@ -123,8 +125,23 @@ static void __init pvh_arch_setup(void)
 {
 	pvh_reserve_extra_memory();
 
-	if (xen_initial_domain())
+	if (xen_initial_domain()) {
 		xen_add_preferred_consoles();
+
+		/*
+		 * Disable usage of CPU idle and frequency drivers: when
+		 * running as hardware domain the exposed native ACPI tables
+		 * causes idle and/or frequency drivers to attach and
+		 * malfunction.  It's Xen the entity that controls the idle and
+		 * frequency states.
+		 *
+		 * For unprivileged domains the exposed ACPI tables are
+		 * fabricated and don't contain such data.
+		 */
+		disable_cpuidle();
+		disable_cpufreq();
+		WARN_ON(xen_set_default_idle());
+	}
 }
 
 void __init xen_pvh_init(struct boot_params *boot_params)
-- 
2.39.5



From xen-devel-bounces@lists.xenproject.org Mon Apr 14 13:29:07 2025
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From: Sasha Levin 
To: linux-kernel@vger.kernel.org,
	stable@vger.kernel.org
Cc: Jason Andryuk ,
	Jan Beulich ,
	Juergen Gross ,
	Sasha Levin ,
	sstabellini@kernel.org,
	xen-devel@lists.xenproject.org
Subject: [PATCH AUTOSEL 6.12 06/30] xen: Change xen-acpi-processor dom0 dependency
Date: Mon, 14 Apr 2025 09:28:23 -0400
Message-Id: <20250414132848.679855-6-sashal@kernel.org>
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From: Jason Andryuk 

[ Upstream commit 0f2946bb172632e122d4033e0b03f85230a29510 ]

xen-acpi-processor functions under a PVH dom0 with only a
xen_initial_domain() runtime check.  Change the Kconfig dependency from
PV dom0 to generic dom0 to reflect that.

Suggested-by: Jan Beulich 
Signed-off-by: Jason Andryuk 
Reviewed-by: Juergen Gross 
Tested-by: Jan Beulich 
Signed-off-by: Juergen Gross 
Message-ID: <20250331172913.51240-1-jason.andryuk@amd.com>
Signed-off-by: Sasha Levin 
---
 drivers/xen/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/xen/Kconfig b/drivers/xen/Kconfig
index f7d6f47971fdf..24f485827e039 100644
--- a/drivers/xen/Kconfig
+++ b/drivers/xen/Kconfig
@@ -278,7 +278,7 @@ config XEN_PRIVCMD_EVENTFD
 
 config XEN_ACPI_PROCESSOR
 	tristate "Xen ACPI processor"
-	depends on XEN && XEN_PV_DOM0 && X86 && ACPI_PROCESSOR && CPU_FREQ
+	depends on XEN && XEN_DOM0 && X86 && ACPI_PROCESSOR && CPU_FREQ
 	default m
 	help
 	  This ACPI processor uploads Power Management information to the Xen
-- 
2.39.5



From xen-devel-bounces@lists.xenproject.org Mon Apr 14 13:30:18 2025
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From: Sasha Levin 
To: linux-kernel@vger.kernel.org,
	stable@vger.kernel.org
Cc: Jason Andryuk ,
	Jan Beulich ,
	Juergen Gross ,
	Sasha Levin ,
	sstabellini@kernel.org,
	xen-devel@lists.xenproject.org
Subject: [PATCH AUTOSEL 6.6 06/24] xen: Change xen-acpi-processor dom0 dependency
Date: Mon, 14 Apr 2025 09:29:39 -0400
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From: Jason Andryuk 

[ Upstream commit 0f2946bb172632e122d4033e0b03f85230a29510 ]

xen-acpi-processor functions under a PVH dom0 with only a
xen_initial_domain() runtime check.  Change the Kconfig dependency from
PV dom0 to generic dom0 to reflect that.

Suggested-by: Jan Beulich 
Signed-off-by: Jason Andryuk 
Reviewed-by: Juergen Gross 
Tested-by: Jan Beulich 
Signed-off-by: Juergen Gross 
Message-ID: <20250331172913.51240-1-jason.andryuk@amd.com>
Signed-off-by: Sasha Levin 
---
 drivers/xen/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/xen/Kconfig b/drivers/xen/Kconfig
index d43153fec18ea..af5c214b22069 100644
--- a/drivers/xen/Kconfig
+++ b/drivers/xen/Kconfig
@@ -278,7 +278,7 @@ config XEN_PRIVCMD_IRQFD
 
 config XEN_ACPI_PROCESSOR
 	tristate "Xen ACPI processor"
-	depends on XEN && XEN_PV_DOM0 && X86 && ACPI_PROCESSOR && CPU_FREQ
+	depends on XEN && XEN_DOM0 && X86 && ACPI_PROCESSOR && CPU_FREQ
 	default m
 	help
 	  This ACPI processor uploads Power Management information to the Xen
-- 
2.39.5



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From: Sasha Levin 
To: linux-kernel@vger.kernel.org,
	stable@vger.kernel.org
Cc: Jason Andryuk ,
	Jan Beulich ,
	Juergen Gross ,
	Sasha Levin ,
	sstabellini@kernel.org,
	xen-devel@lists.xenproject.org
Subject: [PATCH AUTOSEL 6.13 07/34] xen: Change xen-acpi-processor dom0 dependency
Date: Mon, 14 Apr 2025 09:27:01 -0400
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From: Jason Andryuk 

[ Upstream commit 0f2946bb172632e122d4033e0b03f85230a29510 ]

xen-acpi-processor functions under a PVH dom0 with only a
xen_initial_domain() runtime check.  Change the Kconfig dependency from
PV dom0 to generic dom0 to reflect that.

Suggested-by: Jan Beulich 
Signed-off-by: Jason Andryuk 
Reviewed-by: Juergen Gross 
Tested-by: Jan Beulich 
Signed-off-by: Juergen Gross 
Message-ID: <20250331172913.51240-1-jason.andryuk@amd.com>
Signed-off-by: Sasha Levin 
---
 drivers/xen/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/xen/Kconfig b/drivers/xen/Kconfig
index f7d6f47971fdf..24f485827e039 100644
--- a/drivers/xen/Kconfig
+++ b/drivers/xen/Kconfig
@@ -278,7 +278,7 @@ config XEN_PRIVCMD_EVENTFD
 
 config XEN_ACPI_PROCESSOR
 	tristate "Xen ACPI processor"
-	depends on XEN && XEN_PV_DOM0 && X86 && ACPI_PROCESSOR && CPU_FREQ
+	depends on XEN && XEN_DOM0 && X86 && ACPI_PROCESSOR && CPU_FREQ
 	default m
 	help
 	  This ACPI processor uploads Power Management information to the Xen
-- 
2.39.5



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From: Sasha Levin 
To: linux-kernel@vger.kernel.org,
	stable@vger.kernel.org
Cc: Jason Andryuk ,
	Jan Beulich ,
	Juergen Gross ,
	Sasha Levin ,
	sstabellini@kernel.org,
	xen-devel@lists.xenproject.org
Subject: [PATCH AUTOSEL 6.1 04/17] xen: Change xen-acpi-processor dom0 dependency
Date: Mon, 14 Apr 2025 09:30:35 -0400
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From: Jason Andryuk 

[ Upstream commit 0f2946bb172632e122d4033e0b03f85230a29510 ]

xen-acpi-processor functions under a PVH dom0 with only a
xen_initial_domain() runtime check.  Change the Kconfig dependency from
PV dom0 to generic dom0 to reflect that.

Suggested-by: Jan Beulich 
Signed-off-by: Jason Andryuk 
Reviewed-by: Juergen Gross 
Tested-by: Jan Beulich 
Signed-off-by: Juergen Gross 
Message-ID: <20250331172913.51240-1-jason.andryuk@amd.com>
Signed-off-by: Sasha Levin 
---
 drivers/xen/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/xen/Kconfig b/drivers/xen/Kconfig
index d5d7c402b6511..ab135c3e43410 100644
--- a/drivers/xen/Kconfig
+++ b/drivers/xen/Kconfig
@@ -271,7 +271,7 @@ config XEN_PRIVCMD
 
 config XEN_ACPI_PROCESSOR
 	tristate "Xen ACPI processor"
-	depends on XEN && XEN_PV_DOM0 && X86 && ACPI_PROCESSOR && CPU_FREQ
+	depends on XEN && XEN_DOM0 && X86 && ACPI_PROCESSOR && CPU_FREQ
 	default m
 	help
 	  This ACPI processor uploads Power Management information to the Xen
-- 
2.39.5



From xen-devel-bounces@lists.xenproject.org Mon Apr 14 13:31:18 2025
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From: Sasha Levin 
To: linux-kernel@vger.kernel.org,
	stable@vger.kernel.org
Cc: Roger Pau Monne ,
	Jason Andryuk ,
	Juergen Gross ,
	Sasha Levin ,
	tglx@linutronix.de,
	mingo@redhat.com,
	bp@alien8.de,
	dave.hansen@linux.intel.com,
	x86@kernel.org,
	xen-devel@lists.xenproject.org
Subject: [PATCH AUTOSEL 6.12 17/30] x86/xen: disable CPU idle and frequency drivers for PVH dom0
Date: Mon, 14 Apr 2025 09:28:34 -0400
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From: Roger Pau Monne 

[ Upstream commit 64a66e2c3b3113dc78a6124e14825d68ddc2e188 ]

When running as a PVH dom0 the ACPI tables exposed to Linux are (mostly)
the native ones, thus exposing the C and P states, that can lead to
attachment of CPU idle and frequency drivers.  However the entity in
control of the CPU C and P states is Xen, as dom0 doesn't have a full view
of the system load, neither has all CPUs assigned and identity pinned.

Like it's done for classic PV guests, prevent Linux from using idle or
frequency state drivers when running as a PVH dom0.

On an AMD EPYC 7543P system without this fix a Linux PVH dom0 will keep the
host CPUs spinning at 100% even when dom0 is completely idle, as it's
attempting to use the acpi_idle driver.

Signed-off-by: Roger Pau Monné 
Reviewed-by: Jason Andryuk 
Signed-off-by: Juergen Gross 
Message-ID: <20250407101842.67228-1-roger.pau@citrix.com>
Signed-off-by: Sasha Levin 
---
 arch/x86/xen/enlighten_pvh.c | 19 ++++++++++++++++++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/arch/x86/xen/enlighten_pvh.c b/arch/x86/xen/enlighten_pvh.c
index 0e3d930bcb89e..9d25d9373945c 100644
--- a/arch/x86/xen/enlighten_pvh.c
+++ b/arch/x86/xen/enlighten_pvh.c
@@ -1,5 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0
 #include 
+#include 
+#include 
 #include 
 #include 
 
@@ -123,8 +125,23 @@ static void __init pvh_arch_setup(void)
 {
 	pvh_reserve_extra_memory();
 
-	if (xen_initial_domain())
+	if (xen_initial_domain()) {
 		xen_add_preferred_consoles();
+
+		/*
+		 * Disable usage of CPU idle and frequency drivers: when
+		 * running as hardware domain the exposed native ACPI tables
+		 * causes idle and/or frequency drivers to attach and
+		 * malfunction.  It's Xen the entity that controls the idle and
+		 * frequency states.
+		 *
+		 * For unprivileged domains the exposed ACPI tables are
+		 * fabricated and don't contain such data.
+		 */
+		disable_cpuidle();
+		disable_cpufreq();
+		WARN_ON(xen_set_default_idle());
+	}
 }
 
 void __init xen_pvh_init(struct boot_params *boot_params)
-- 
2.39.5



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	stable@vger.kernel.org
Cc: Jason Andryuk ,
	Jan Beulich ,
	Juergen Gross ,
	Sasha Levin ,
	sstabellini@kernel.org,
	xen-devel@lists.xenproject.org
Subject: [PATCH AUTOSEL 5.15 04/15] xen: Change xen-acpi-processor dom0 dependency
Date: Mon, 14 Apr 2025 09:31:14 -0400
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From: Jason Andryuk 

[ Upstream commit 0f2946bb172632e122d4033e0b03f85230a29510 ]

xen-acpi-processor functions under a PVH dom0 with only a
xen_initial_domain() runtime check.  Change the Kconfig dependency from
PV dom0 to generic dom0 to reflect that.

Suggested-by: Jan Beulich 
Signed-off-by: Jason Andryuk 
Reviewed-by: Juergen Gross 
Tested-by: Jan Beulich 
Signed-off-by: Juergen Gross 
Message-ID: <20250331172913.51240-1-jason.andryuk@amd.com>
Signed-off-by: Sasha Levin 
---
 drivers/xen/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/xen/Kconfig b/drivers/xen/Kconfig
index 1b2c3aca6887c..474b0173323a6 100644
--- a/drivers/xen/Kconfig
+++ b/drivers/xen/Kconfig
@@ -241,7 +241,7 @@ config XEN_PRIVCMD
 
 config XEN_ACPI_PROCESSOR
 	tristate "Xen ACPI processor"
-	depends on XEN && XEN_PV_DOM0 && X86 && ACPI_PROCESSOR && CPU_FREQ
+	depends on XEN && XEN_DOM0 && X86 && ACPI_PROCESSOR && CPU_FREQ
 	default m
 	help
 	  This ACPI processor uploads Power Management information to the Xen
-- 
2.39.5



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Date: Mon, 14 Apr 2025 14:37:42 +0100
Message-ID: 
From: Alejandro Vallejo 
To: Jan Beulich 
CC: Jason Andryuk , Xenia Ragiadakou
	, Stefano Stabellini ,
	Michal Orzel , Andrew Cooper
	, =?utf-8?q?Roger_Pau_Monn=C3=A9?=
	, Julien Grall , Bertrand Marquis
	, 
Subject: Re: [PATCH v3 08/16] x86/hyperlaunch: Add helpers to locate
 multiboot modules
X-Mailer: aerc 0.20.1
References: <20250408160802.49870-1-agarciav@amd.com>
 <20250408160802.49870-9-agarciav@amd.com>
 
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On Thu Apr 10, 2025 at 11:42 AM BST, Jan Beulich wrote:
> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>> --- a/xen/arch/x86/domain-builder/fdt.c
>> +++ b/xen/arch/x86/domain-builder/fdt.c
>> @@ -13,6 +13,148 @@
>> =20
>>  #include "fdt.h"
>> =20
>> +/*
>> + * Unpacks a "reg" property into its address and size constituents.
>> + *
>> + * @param prop          Pointer to an FDT "reg" property.
>> + * @param address_cells Number of 4-octet cells that make up an "addres=
s".
>> + * @param size_cells    Number of 4-octet cells that make up a "size".
>> + * @param p_addr[out]   Address encoded in the property.
>> + * @param p_size[out]   Size encoded in the property.
>> + * @returns             -EINVAL on malformed property, 0 otherwise.
>> + */
>> +static int __init read_fdt_prop_as_reg(const struct fdt_property *prop,
>> +                                       int address_cells, int size_cell=
s,
>> +                                       uint64_t *p_addr, uint64_t *p_si=
ze)
>> +{
>> +    const fdt32_t *cell =3D (const fdt32_t *)prop->data;
>> +    uint64_t addr, size;
>> +
>> +    if ( fdt32_to_cpu(prop->len) !=3D
>> +         (address_cells + size_cells) * sizeof(*cell) )
>> +    {
>> +        printk("  Cannot read reg %lu+%lu from prop len %u\n",
>> +            address_cells * sizeof(*cell), size_cells * sizeof(*cell),
>> +            fdt32_to_cpu(prop->len));
>> +        return -EINVAL;
>> +    }
>> +
>> +    switch ( address_cells ) {
>
> Nit: Brace on its own line please.

Sure

>
>> +    case 1:
>> +        addr =3D fdt32_to_cpu(*cell);
>> +        break;
>> +    case 2:
>> +        addr =3D fdt64_to_cpu(*(const fdt64_t *)cell);
>> +        break;
>> +    default:
>> +        printk("  unsupported sized address_cells\n");
>
> Depending on how likely this or ...
>
>> +        return -EINVAL;
>> +    }
>> +
>> +    cell +=3D address_cells;
>> +    switch ( size_cells ) {
>> +    case 1:
>> +        size =3D fdt32_to_cpu(*cell);
>> +        break;
>> +    case 2:
>> +        size =3D fdt64_to_cpu(*(const fdt64_t *)cell);
>> +        break;
>> +    default:
>> +        printk("  unsupported sized size_cells\n");
>
> ... this path is to be hit, perhaps also log the bogus size? Then again, =
this
> being passed in, isn't it an internal error if the wrong size makes it he=
re?
> I.e. rather use ASSERT_UNREACHABLE()?

*_cells are DTB properties, so it's more of an input error.

Ack to log the sizes, will do.

>
>> +        return -EINVAL;
>> +    }
>> +
>> +    *p_addr =3D addr;
>> +    *p_size =3D size;
>> +
>> +    return 0;
>> +}
>
> The function as a whole looks somewhat similar to fdt_get_reg_prop(). Wha=
t's
> the deal?

The latter shouldn't be there. It's leftover from code motion and a
merge.

>
>> +/*
>> + * Locate a multiboot module given its node offset in the FDT.
>> + *
>> + * The module location may be given via either FDT property:
>> + *     * reg =3D 
>> + *         * Mutates `bi` to append the module.
>> + *     * module-index =3D 
>> + *         * Leaves `bi` unchanged.
>> + *
>> + * @param fdt           Pointer to the full FDT.
>> + * @param node          Offset for the module node.
>> + * @param address_cells Number of 4-octet cells that make up an "addres=
s".
>> + * @param size_cells    Number of 4-octet cells that make up a "size".
>> + * @param bi[inout]     Xen's representation of the boot parameters.
>> + * @return              -EINVAL on malformed nodes, otherwise
>> + *                      index inside `bi->mods`
>> + */
>> +int __init fdt_read_multiboot_module(const void *fdt, int node,
>> +                                     int address_cells, int size_cells,
>> +                                     struct boot_info *bi)
>
> Functions without callers and non-static ones without declarations are
> disliked by Misra.

Can't do much about it if I want them to stand alone in a single patch.
Otherwise the following ones become quite unwieldy to look at. All I can
say is that this function becomes static and with a caller on the next
patch.

>
>> +{
>> +    const struct fdt_property *prop;
>> +    uint64_t addr, size;
>> +    int ret;
>> +    int idx;
>> +
>> +    ASSERT(!fdt_node_check_compatible(fdt, node, "multiboot,module"));
>> +
>> +    /* Location given as a `module-index` property. */
>> +    prop =3D fdt_get_property(fdt, node, "module-index", NULL);
>> +
>> +    if ( prop )
>> +    {
>> +        if ( fdt_get_property(fdt, node, "reg", NULL) )
>> +        {
>> +            printk("  Location of multiboot,module defined multiple tim=
es\n");
>> +            return -EINVAL;
>> +        }
>> +        return fdt_cell_as_u32((const fdt32_t *)prop->data);
>
> No concerns here of there being less than 4 bytes of data?

v4 moves the property accessors earlier so this is a safe access.

>
>> +    }
>> +
>> +    /* Otherwise location given as a `reg` property. */
>> +    prop =3D fdt_get_property(fdt, node, "reg", NULL);
>> +
>> +    if ( !prop )
>> +    {
>> +        printk("  No location for multiboot,module\n");
>> +        return -EINVAL;
>> +    }
>> +    if ( fdt_get_property(fdt, node, "module-index", NULL) )
>> +    {
>> +        printk("  Location of multiboot,module defined multiple times\n=
");
>> +        return -EINVAL;
>> +    }
>> +
>> +    ret =3D read_fdt_prop_as_reg(prop, address_cells, size_cells, &addr=
, &size);
>> +
>> +    if ( ret < 0 )
>> +    {
>> +        printk("  Failed reading reg for multiboot,module\n");
>> +        return -EINVAL;
>> +    }
>> +
>> +    idx =3D bi->nr_modules + 1;
>
> This at least looks like an off-by-one. If the addition of 1 is really
> intended, I think it needs commenting on.

Seems to be, yes. The underlying array is a bit bizarre. It's sizes as
MAX_NR_BOOTMODS + 1, with the first one being the DTB itself. I guess
the intent was to take it into account, but bi->nr_modules is
initialised to the number of multiboot modules, so it SHOULD be already
taking it into account.

Also, the logic for bounds checking seems... off (because of the + 1 I
mentioned before). Or at least confusing, so I've moved to using
ARRAY_SIZE(bi->mods) rather than explicitly comparing against
MAX_NR_BOOTMODS.

The array is MAX_NR_BOOTMODS + 1 in length, so it's just more cognitive
load than I'm comfortable with.

>
>> +    if ( idx > MAX_NR_BOOTMODS )
>> +    {
>> +        /*
>> +         * MAX_NR_BOOTMODS cannot exceed the max for MB1, represented b=
y 32bits,
>> +         * thus the cast down to a u32 will be safe due to the prior ch=
eck.
>> +         */
>> +        BUILD_BUG_ON(MAX_NR_BOOTMODS >=3D (uint64_t)UINT32_MAX);
>
> Because of idx being a signed quantity, isn't INT_MAX the required upper
> bound? The latest then the somewhat odd cast should also be possible to
> drop.

It is, yes. Having a theoretical limit of 2**31-1 rather than 2**32-1 doesn=
't worry
me in the slightest.

>
>> +        printk("  idx %d exceeds maximum boot modules\n", idx);
>
> Perhaps include STR(MAX_NR_BOOTMODS) as well?
I'll print ARRAY_SIZE(bi->mods) instead. Otherwise it will be very
confusing.

>
>> --- a/xen/include/xen/libfdt/libfdt-xen.h
>> +++ b/xen/include/xen/libfdt/libfdt-xen.h
>> @@ -13,6 +13,63 @@kkk
>> =20
>>  #include 
>> =20
>> +static inline int __init fdt_cell_as_u32(const fdt32_t *cell)
>
> Why plain int here, but ...
>
>> +{
>> +    return fdt32_to_cpu(*cell);
>> +}
>> +
>> +static inline uint64_t  __init fdt_cell_as_u64(const fdt32_t *cell)
>
> ... a fixed-width and unsigned type here? Question is whether the former
> helper is really warranted.
>
> Also nit: Stray double blank.
>
>> +{
>> +    return ((uint64_t)fdt32_to_cpu(cell[0]) << 32) | fdt32_to_cpu(cell[=
1]);
>
> That is - uniformly big endian?

These helpers are disappearing, so it doesn't matter. This is basically
an open coded:

  fdt64_to_cpu(*(const fdt64_t *)fdt32)

And, yes. DTBs are standardised as having big-endian properties, for
better or worse :/

>
>> +}
>
> Marking such relatively generic inline functions __init is also somewhat
> risky.=20

They were originally in domain-builder/fdt.c and moved here as a result
of a request to have them on libfdt. libfdt proved to be somewhat
annoying because it would be hard to distinguish accessors for the
flattened and the unflattened tree.

I'd personally have them in domain-builder instead, where they are used.
Should they be needed somewhere else, we can always fator them out
somewhere else.

Thoughts?

>
>> +/*
>> + * Property: reg
>> + *
>> + * Defined in Section 2.3.6 of the Device Tree Specification is the "re=
g"
>> + * standard property. The property is a prop-encoded-array that is enco=
ded as
>> + * an arbitrary number of (address, size) pairs.  We only extract a sin=
gle
>> + * pair since that is what is used in practice.
>> + */
>> +static inline int __init fdt_get_reg_prop(
>> +    const void *fdt, int node, unsigned int addr_cells, unsigned int si=
ze_cells,
>> +    uint64_t *addr, uint64_t *size)
>> +{
>> +    int ret;
>> +    const struct fdt_property *prop;
>> +    fdt32_t *cell;
>> +
>> +    /* FDT spec max size is 4 (128bit int), but largest arch int size i=
s 64 */
>> +    if ( size_cells > 2 || addr_cells > 2 )
>> +        return -EINVAL;
>> +
>> +    prop =3D fdt_get_property(fdt, node, "reg", &ret);
>> +    if ( !prop || ret < sizeof(u32) )
>
> No uses of u32 et al in new code please. Question anyway is whether this =
isn't
> meant to be sizeof(*cell) like you have it ...
>
>> +        return ret < 0 ? ret : -EINVAL;
>> +
>> +    if ( fdt32_to_cpu(prop->len) !=3D
>> +	 ((size_cells + addr_cells) * sizeof(*cell)) )
>
> ... here. Or maybe it's to be sizeof(prop->len)?
>
> Also nit: Hard tab slipped in.
>
>> +        return -EINVAL;
>> +
>> +    cell =3D (fdt32_t *)prop->data;
>> +
>> +    /* read address field */
>> +    if ( addr_cells =3D=3D 1 )
>> +        *addr =3D fdt_cell_as_u32(cell);
>> +    else
>> +        *addr =3D fdt_cell_as_u64(cell);
>> +
>> +    cell +=3D addr_cells;
>> +
>> +    /* read size field */
>> +    if ( size_cells =3D=3D 1 )
>> +        *size =3D fdt_cell_as_u32(cell);
>> +    else
>> +        *size =3D fdt_cell_as_u64(cell);
>> +
>> +    return 0;
>> +}
>
> Does this really want/need to be an inline function?
>
> Jan

This function is gone in v4.

Cheers,
Alejandro


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From: Thomas Zimmermann 
To: airlied@gmail.com,
	simona@ffwll.ch,
	mripard@kernel.org,
	maarten.lankhorst@linux.intel.com
Cc: dri-devel@lists.freedesktop.org,
	Thomas Zimmermann ,
	Oleksandr Andrushchenko ,
	xen-devel@lists.xenproject.org
Subject: [PATCH 07/11] drm/xen: Test for imported buffers with drm_gem_is_imported()
Date: Mon, 14 Apr 2025 15:48:14 +0200
Message-ID: <20250414134821.568225-7-tzimmermann@suse.de>
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Instead of testing import_attach for imported GEM buffers, invoke
drm_gem_is_imported() to do the test. The helper tests the dma_buf
itself while import_attach is just an artifact of the import. Prepares
to make import_attach optional.

Signed-off-by: Thomas Zimmermann 
Cc: Oleksandr Andrushchenko 
Cc: xen-devel@lists.xenproject.org
---
 drivers/gpu/drm/xen/xen_drm_front_gem.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xen/xen_drm_front_gem.c b/drivers/gpu/drm/xen/xen_drm_front_gem.c
index 63112ed975c4..62a83c36fce8 100644
--- a/drivers/gpu/drm/xen/xen_drm_front_gem.c
+++ b/drivers/gpu/drm/xen/xen_drm_front_gem.c
@@ -203,7 +203,7 @@ void xen_drm_front_gem_free_object_unlocked(struct drm_gem_object *gem_obj)
 {
 	struct xen_gem_object *xen_obj = to_xen_gem_obj(gem_obj);
 
-	if (xen_obj->base.import_attach) {
+	if (drm_gem_is_imported(&xen_obj->base)) {
 		drm_prime_gem_destroy(&xen_obj->base, xen_obj->sgt_imported);
 		gem_free_pages_array(xen_obj);
 	} else {
-- 
2.49.0



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Date: Mon, 14 Apr 2025 15:53:32 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: Andrew Cooper ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH 3/5] x86/hvm: fix handling of accesses to partial r/o
 MMIO pages
Message-ID: 
References: <20250411105411.22334-1-roger.pau@citrix.com>
 <20250411105411.22334-4-roger.pau@citrix.com>
 
MIME-Version: 1.0
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On Mon, Apr 14, 2025 at 08:33:44AM +0200, Jan Beulich wrote:
> On 11.04.2025 12:54, Roger Pau Monne wrote:
> > The current logic to handle accesses to MMIO pages partially read-only is
> > based on the (now removed) logic used to handle accesses to the r/o MMCFG
> > region(s) for PVH v1 dom0.  However that has issues when running on AMD
> > hardware, as in that case the guest linear address that triggered the fault
> > is not provided as part of the VM exit.  This caused
> > mmio_ro_emulated_write() to always fail before calling
> > subpage_mmio_write_emulate() when running on AMD and called from an HVM
> > context.
> > 
> > Take a different approach and convert the handling of partial read-only
> > MMIO page accesses into an HVM MMIO ops handler, as that's the more natural
> > way to handle this kind of emulation for HVM domains.
> > 
> > This allows getting rid of hvm_emulate_one_mmio() and it's single cal site
> > in hvm_hap_nested_page_fault().
> > 
> > Note a small adjustment is needed to the `pf-fixup` dom0 PVH logic: avoid
> > attempting to fixup faults resulting from accesses to read-only MMIO
> > regions, as handling of those accesses is now done by handle_mmio().
> > 
> > Fixes: 33c19df9a5a0 ('x86/PCI: intercept accesses to RO MMIO from dom0s in HVM containers')
> > Signed-off-by: Roger Pau Monné 
> > ---
> > The fixes tag is maybe a bit wonky, it's either this or:
> > 
> > 8847d6e23f97 ('x86/mm: add API for marking only part of a MMIO page read only')
> > 
> > However the addition of subpage r/o access handling to the existing
> > mmio_ro_emulated_write() function was done based on the assumption that the
> > current code was working - which turned out to not be the case for AMD,
> > hence my preference for blaming the commit that actually introduced the
> > broken logic.
> 
> I agree.
> 
> > ---
> >  xen/arch/x86/hvm/emulate.c             | 47 +-------------
> >  xen/arch/x86/hvm/hvm.c                 | 89 +++++++++++++++++++++++---
> 
> It's quite a bit of rather special code you add to this catch-all file. How
> about introducing a small new one, e.g. mmio.c (to later maybe become home
> to some further stuff)?

Yes, I didn't find any suitable place, I was also considering
hvm/io.c or hvm/intercept.c, but none looked very good TBH.

The main benefit of placing it in hvm.c is that the functions can all
be static and confined to hvm.c as it's only user.

> > --- a/xen/arch/x86/hvm/emulate.c
> > +++ b/xen/arch/x86/hvm/emulate.c
> > @@ -370,7 +370,8 @@ static int hvmemul_do_io(
> >          /* If there is no suitable backing DM, just ignore accesses */
> >          if ( !s )
> >          {
> > -            if ( is_mmio && is_hardware_domain(currd) )
> > +            if ( is_mmio && is_hardware_domain(currd) &&
> > +                 !rangeset_contains_singleton(mmio_ro_ranges, PFN_DOWN(addr)) )
> 
> I think this needs a brief comment - it otherwise looks misplaced here.
> 
> > @@ -585,9 +585,81 @@ static int cf_check hvm_print_line(
> >      return X86EMUL_OKAY;
> >  }
> >  
> > +static int cf_check subpage_mmio_accept(struct vcpu *v, unsigned long addr)
> > +{
> > +    p2m_type_t t;
> > +    mfn_t mfn = get_gfn_query_unlocked(v->domain, addr, &t);
> > +
> > +    return !mfn_eq(mfn, INVALID_MFN) && t == p2m_mmio_direct &&
> > +           !!subpage_mmio_find_page(mfn);
> 
> The !! isn't needed here, is it?

IIRC clang complained about conversion from pointer to integer without
a cast, but maybe that was before adding the further conditions here.

> > +}
> > +
> > +static int cf_check subpage_mmio_read(
> > +    struct vcpu *v, unsigned long addr, unsigned int len, unsigned long *data)
> > +{
> > +    struct domain *d = v->domain;
> > +    p2m_type_t t;
> > +    mfn_t mfn = get_gfn_query(d, addr, &t);
> > +    struct subpage_ro_range *entry;
> > +    volatile void __iomem *mem;
> > +
> > +    *data = ~0UL;
> > +
> > +    if ( mfn_eq(mfn, INVALID_MFN) || t != p2m_mmio_direct )
> > +    {
> > +        put_gfn(d, addr);
> > +        return X86EMUL_RETRY;
> > +    }
> > +
> > +    entry = subpage_mmio_find_page(mfn);
> > +    if ( !entry )
> > +    {
> > +        put_gfn(d, addr);
> > +        return X86EMUL_RETRY;
> > +    }
> > +
> > +    mem = subpage_mmio_map_page(entry);
> > +    if ( !mem )
> > +    {
> > +        put_gfn(d, addr);
> > +        gprintk(XENLOG_ERR, "Failed to map page for MMIO read at %#lx\n",
> > +                mfn_to_maddr(mfn) + PAGE_OFFSET(addr));
> 
> Makes me wonder whether the function parameter wouldn't better be named
> "curr" and the local variable "currd", to reflect that this log message
> will report appropriate context.

Sure, can adjust.

> Would also logging the guest physical address perhaps be worthwhile here?

Possibly, my first apporahc was to print gfn -> mfn, but ended up
copying the same message from  subpage_mmio_write_emulate() for
symmetry reasons.

> > +        return X86EMUL_OKAY;
> > +    }
> > +
> > +    *data = read_mmio(mem + PAGE_OFFSET(addr), len);
> > +
> > +    put_gfn(d, addr);
> > +    return X86EMUL_OKAY;
> > +}
> > +
> > +static int cf_check subpage_mmio_write(
> > +    struct vcpu *v, unsigned long addr, unsigned int len, unsigned long data)
> > +{
> > +    struct domain *d = v->domain;
> > +    p2m_type_t t;
> > +    mfn_t mfn = get_gfn_query(d, addr, &t);
> > +
> > +    if ( mfn_eq(mfn, INVALID_MFN) || t != p2m_mmio_direct )
> > +    {
> > +        put_gfn(d, addr);
> > +        return X86EMUL_RETRY;
> > +    }
> > +
> > +    subpage_mmio_write_emulate(mfn, PAGE_OFFSET(addr), data, len);
> > +
> > +    put_gfn(d, addr);
> > +    return X86EMUL_OKAY;
> > +}
> 
> Unlike the read path this doesn't return RETRY when subpage_mmio_find_page()
> fails (indicating something must have changed after "accept" said yes).

Yeah, I've noticed this, but didn't feel like modifying
subpage_mmio_write_emulate() for this.  The list of partial r/o MMIO
pages cannot change after system boot, so accept returning yes and not
finding a page here would likely warrant an ASSERT_UNRECHABLE().

Would you like me to modify subpage_mmio_write_emulate to make it
return an error code?

> > @@ -1981,7 +2056,9 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned long gla,
> >       */
> >      if ( (p2mt == p2m_mmio_dm) ||
> >           (npfec.write_access &&
> > -          (p2m_is_discard_write(p2mt) || (p2mt == p2m_ioreq_server))) )
> > +          (p2m_is_discard_write(p2mt) || (p2mt == p2m_ioreq_server) ||
> > +           /* MMIO entries can be r/o if the target mfn is in mmio_ro_ranges. */
> > +           (p2mt == p2m_mmio_direct))) )
> >      {
> >          if ( !handle_mmio_with_translation(gla, gfn, npfec) )
> >              hvm_inject_hw_exception(X86_EXC_GP, 0);
> 
> Aren't we handing too many things to handle_mmio_with_translation() this
> way? At the very least you're losing ...
> 
> > @@ -2033,14 +2110,6 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned long gla,
> >          goto out_put_gfn;
> >      }
> >  
> > -    if ( (p2mt == p2m_mmio_direct) && npfec.write_access && npfec.present &&
> 
> ... the .present check.

Isn't the p2mt == p2m_mmio_direct check already ensuring the entry is
present?  Otherwise it's type would be p2m_invalid or p2m_mmio_dm?

It did seem to me the other checks in this function already assume
that by having a valid type the entry is present.

> I'm also concerned of e.g. VT-x'es APIC access MFN, which is
> p2m_mmio_direct.

But that won't go into hvm_hap_nested_page_fault() when using
cpu_has_vmx_virtualize_apic_accesses (and thus having an APIC page
mapped as p2m_mmio_direct)?

It would instead be an EXIT_REASON_APIC_ACCESS vmexit which is handled
differently?

Thanks, Roger.


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Date: Mon, 14 Apr 2025 14:56:58 +0100
Message-ID: 
CC: , "Daniel P. Smith"
	, Jason Andryuk , "Xenia
 Ragiadakou" , Stefano Stabellini
	, Michal Orzel , Jan Beulich
	, Andrew Cooper ,
	=?utf-8?q?Roger_Pau_Monn=C3=A9?= 
Subject: Re: [PATCH v3 09/16] x86/hyperlaunch: locate dom0 kernel with
 hyperlaunch
From: Alejandro Vallejo 
To: Denis Mukhin 
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References: <20250408160802.49870-1-agarciav@amd.com>
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On Wed Apr 9, 2025 at 10:24 PM BST, Denis Mukhin wrote:
> On Tuesday, April 8th, 2025 at 9:07 AM, Alejandro Vallejo  wrote:
>
>>=20
>>=20
>> From: "Daniel P. Smith" dpsmith@apertussolutions.com
>>=20
>>=20
>> Look for a subnode of type `multiboot,kernel` within a domain node. If
>> found, locate it using the multiboot module helper to generically ensure
>> it lives in the module list. If the bootargs property is present and
>> there was not an MB1 string, then use the command line from the device
>> tree definition.
>>=20
>> Signed-off-by: Daniel P. Smith dpsmith@apertussolutions.com
>>=20
>> Signed-off-by: Jason Andryuk jason.andryuk@amd.com
>>=20
>> Signed-off-by: Alejandro Vallejo agarciav@amd.com
>>=20
>> ---
>> v3:
>> * Add const to fdt
>> * Remove idx =3D=3D NULL checks
>> * Add BUILD_BUG_ON for MAX_NR_BOOTMODS fitting in a uint32_t
>> * Remove trailing ) from printks
>> * Return ENODATA for missing kernel
>> * Re-work "max domains" warning and print limit
>> * fdt_cell_as_u32/directly return values
>> * Remove "pairs" looping from fdt_get_reg_prop() and only grab 1.
>> * Use addr_cells and size_cells
>> ---
>> xen/arch/x86/domain-builder/core.c | 11 ++++++
>> xen/arch/x86/domain-builder/fdt.c | 57 ++++++++++++++++++++++++++++++
>> xen/arch/x86/setup.c | 5 ---
>> 3 files changed, 68 insertions(+), 5 deletions(-)
>>=20
>> diff --git a/xen/arch/x86/domain-builder/core.c b/xen/arch/x86/domain-bu=
ilder/core.c
>> index c50eff34fb..eda7fa7a8f 100644
>> --- a/xen/arch/x86/domain-builder/core.c
>> +++ b/xen/arch/x86/domain-builder/core.c
>> @@ -59,6 +59,17 @@ void __init builder_init(struct boot_info *bi)
>>=20
>> printk(XENLOG_INFO " Number of domains: %d\n", bi->nr_domains);
>>=20
>> }
>> + else
>> + {
>> + unsigned int i;
>> +
>> + /* Find first unknown boot module to use as Dom0 kernel */
>> + printk("Falling back to using first boot module as dom0\n");
>> + i =3D first_boot_module_index(bi, BOOTMOD_UNKNOWN);
>> + bi->mods[i].type =3D BOOTMOD_KERNEL;
>>=20
>> + bi->domains[0].kernel =3D &bi->mods[i];
>>=20
>> + bi->nr_domains =3D 1;
>>=20
>> + }
>> }
>>=20
>> /*
>> diff --git a/xen/arch/x86/domain-builder/fdt.c b/xen/arch/x86/domain-bui=
lder/fdt.c
>> index 9ebc8fd0e4..a037c8b6cb 100644
>> --- a/xen/arch/x86/domain-builder/fdt.c
>> +++ b/xen/arch/x86/domain-builder/fdt.c
>> @@ -155,6 +155,52 @@ int __init fdt_read_multiboot_module(const void *fd=
t, int node,
>> return idx;
>> }
>>=20
>> +static int __init process_domain_node(
>> + struct boot_info *bi, const void *fdt, int dom_node)
>> +{
>> + int node;
>> + struct boot_domain *bd =3D &bi->domains[bi->nr_domains];
>>=20
>> + const char *name =3D fdt_get_name(fdt, dom_node, NULL) ?: "unknown";
>> + int address_cells =3D fdt_address_cells(fdt, dom_node);
>> + int size_cells =3D fdt_size_cells(fdt, dom_node);
>> +
>> + fdt_for_each_subnode(node, fdt, dom_node)
>> + {
>> + if ( fdt_node_check_compatible(fdt, node, "multiboot,kernel") =3D=3D 0=
 )
>> + {
>> + int idx;
>> +
>> + if ( bd->kernel )
>>=20
>> + {
>> + printk(XENLOG_ERR "Duplicate kernel module for domain %s\n",
>
> Looks like it should be XENLOG_WARNING since the loop continues.

Fair point.

>
> Also, I would use either Capitalized or lower case messages everywhere
> for consistency.

That's related to those leading spaces. The lowercases end up
immediately under the configuration message so it's easier to bind them
visually as "hyperlaunch-related".

    (XEN) Hyperlaunch configuration:
    (XEN)   something
    (XEN)   failed processing kernel module for domain %s

>
>> + name);
>> + continue;
>> + }
>> +
>> + idx =3D fdt_read_multiboot_module(fdt, node, address_cells,
>> + size_cells, bi);
>> + if ( idx < 0 )
>> + {
>> + printk(" failed processing kernel module for domain %s\n",
>
> I think this printout should have XENLOG_ERR in it since it's on the
> error code path.

All of these should have a XENLOG_X so they can be skipped when _INFO
is itself filtered out.

>
>> + name);
>> + return idx;
>> + }
>> +
>> + printk(" kernel: boot module %d\n", idx);
>> + bi->mods[idx].type =3D BOOTMOD_KERNEL;
>>=20
>> + bd->kernel =3D &bi->mods[idx];
>>=20
>> + }
>> + }
>> +
>> + if ( !bd->kernel )
>>=20
>> + {
>> + printk(XENLOG_ERR "ERR: no kernel assigned to domain\n");
>
> Drop "ERR" since it is already XENLOG_ERR level?

ERR: is printed though, whereas XENLOG_ERR is not. That's meant to make
it visually clear that's _really_ not meant to happen.

>
>> + return -ENODATA;
>> + }
>> +
>> + return 0;
>> +}
>> +
>> static int __init find_hyperlaunch_node(const void *fdt)
>> {
>> int hv_node =3D fdt_path_offset(fdt, "/chosen/hypervisor");
>> @@ -217,9 +263,20 @@ int __init walk_hyperlaunch_fdt(struct boot_info *b=
i)
>>=20
>> fdt_for_each_subnode(node, fdt, hv_node)
>> {
>> + if ( bi->nr_domains >=3D MAX_NR_BOOTDOMS )
>>=20
>> + {
>> + printk(XENLOG_WARNING
>> + "WARN: only creating first %u domains\n", MAX_NR_BOOTDOMS);
>
> Drop "WARN" since it is already XENLOG_WARNING level?

Same rationale as above.

>
>> + break;
>> + }
>> +
>> ret =3D fdt_node_check_compatible(fdt, node, "xen,domain");
>> if ( ret =3D=3D 0 )
>> + {
>> + if ( (ret =3D process_domain_node(bi, fdt, node)) < 0 )
>> + break;
>> bi->nr_domains++;
>>=20
>> + }
>> }
>>=20
>> /* Until multi-domain construction is added, throw an error /
>> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
>> index e5d78bcb48..00e8c8a2a3 100644
>> --- a/xen/arch/x86/setup.c
>> +++ b/xen/arch/x86/setup.c
>> @@ -1284,11 +1284,6 @@ void asmlinkage __init noreturn __start_xen(void)
>>=20
>> builder_init(bi);
>>=20
>> - / Find first unknown boot module to use as Dom0 kernel */
>> - i =3D first_boot_module_index(bi, BOOTMOD_UNKNOWN);
>> - bi->mods[i].type =3D BOOTMOD_KERNEL;
>>=20
>> - bi->domains[0].kernel =3D &bi->mods[i];
>>=20
>> -
>> if ( pvh_boot )
>> {
>> /* pvh_init() already filled in e820_raw */
>> --
>> 2.43.0

Cheers,
Alejandro


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Date: Mon, 14 Apr 2025 14:58:51 +0100
Message-ID: 
CC: "Daniel P. Smith" , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" , Michal Orzel
	, Andrew Cooper ,
	=?utf-8?q?Roger_Pau_Monn=C3=A9?= ,
	
Subject: Re: [PATCH v3 09/16] x86/hyperlaunch: locate dom0 kernel with
 hyperlaunch
From: Alejandro Vallejo 
To: Jan Beulich 
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On Thu Apr 10, 2025 at 11:58 AM BST, Jan Beulich wrote:
> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>> From: "Daniel P. Smith" 
>>=20
>> Look for a subnode of type `multiboot,kernel` within a domain node. If
>> found, locate it using the multiboot module helper to generically ensure
>> it lives in the module list. If the bootargs property is present and
>> there was not an MB1 string, then use the command line from the device
>> tree definition.
>>=20
>> Signed-off-by: Daniel P. Smith 
>> Signed-off-by: Jason Andryuk 
>> Signed-off-by: Alejandro Vallejo 
>> ---
>> v3:
>>     * Add const to fdt
>>     * Remove idx =3D=3D NULL checks
>>     * Add BUILD_BUG_ON for MAX_NR_BOOTMODS fitting in a uint32_t
>
> At least this one looks to rather belong into patch 08?

Urg, yes. Sorry. There was a lot of code motion when I factored out the
helpers.

>
>> --- a/xen/arch/x86/domain-builder/fdt.c
>> +++ b/xen/arch/x86/domain-builder/fdt.c
>> @@ -155,6 +155,52 @@ int __init fdt_read_multiboot_module(const void *fd=
t, int node,
>>      return idx;
>>  }
>> =20
>> +static int __init process_domain_node(
>> +    struct boot_info *bi, const void *fdt, int dom_node)
>> +{
>> +    int node;
>> +    struct boot_domain *bd =3D &bi->domains[bi->nr_domains];
>> +    const char *name =3D fdt_get_name(fdt, dom_node, NULL) ?: "unknown"=
;
>> +    int address_cells =3D fdt_address_cells(fdt, dom_node);
>> +    int size_cells =3D fdt_size_cells(fdt, dom_node);
>
> Oh, okay - regarding my earlier comment elsewhere: If the sizes come from=
 DT,
> then of course ASSERT_UNREACHABLE() can't be used at the place where bogu=
s
> ones are rejected.
>
>> +    fdt_for_each_subnode(node, fdt, dom_node)
>> +    {
>> +        if ( fdt_node_check_compatible(fdt, node, "multiboot,kernel") =
=3D=3D 0 )
>> +        {
>
> When the loop body is merely an if() with a non-negligible body, invertin=
g
> the condition and using "continue" is usually better. Much like you do ..=
.

This becomes a chain of if conditions later on, one per property.

>
>> +            int idx;
>> +
>> +            if ( bd->kernel )
>> +            {
>> +                printk(XENLOG_ERR "Duplicate kernel module for domain %=
s\n",
>> +                       name);
>> +                continue;
>
> ... here already.
>
> Jan

Cheers,
Alejandro



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Date: Mon, 14 Apr 2025 16:04:38 +0200
From: Alexander Gordeev 
To: Ryan Roberts 
Cc: Andrew Morton ,
        "David S. Miller" ,
        Andreas Larsson , Juergen Gross ,
        Boris Ostrovsky ,
        Thomas Gleixner , Ingo Molnar ,
        Borislav Petkov ,
        Dave Hansen ,
        "H. Peter Anvin" ,
        "Matthew Wilcox (Oracle)" ,
        Catalin Marinas , linux-mm@kvack.org,
        sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 0/5] Fix lazy mmu mode
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References: <20250303141542.3371656-1-ryan.roberts@arm.com>
 <912c7a32-b39c-494f-a29c-4865cd92aeba@agordeev.local>
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On Mon, Apr 14, 2025 at 02:22:53PM +0100, Ryan Roberts wrote:
> On 10/04/2025 17:07, Alexander Gordeev wrote:
> >> I'm planning to implement lazy mmu mode for arm64 to optimize vmalloc. As part
> >> of that, I will extend lazy mmu mode to cover kernel mappings in vmalloc table
> >> walkers. While lazy mmu mode is already used for kernel mappings in a few
> >> places, this will extend it's use significantly.
> >>
> >> Having reviewed the existing lazy mmu implementations in powerpc, sparc and x86,
> >> it looks like there are a bunch of bugs, some of which may be more likely to
> >> trigger once I extend the use of lazy mmu.
> > 
> > Do you have any idea about generic code issues as result of not adhering to
> > the originally stated requirement:
> > 
> >   /*
> >    ...
> >    * the PTE updates which happen during this window.  Note that using this
> >    * interface requires that read hazards be removed from the code.  A read
> >    * hazard could result in the direct mode hypervisor case, since the actual
> >    * write to the page tables may not yet have taken place, so reads though
> >    * a raw PTE pointer after it has been modified are not guaranteed to be
> >    * up to date.
> >    ...
> >    */
> > 
> > I tried to follow few code paths and at least this one does not look so good:
> > 
> > copy_pte_range(..., src_pte, ...)
> > 	ret = copy_nonpresent_pte(..., src_pte, ...)
> > 		try_restore_exclusive_pte(..., src_pte, ...)	// is_device_exclusive_entry(entry)
> > 			restore_exclusive_pte(..., ptep, ...)
> > 				set_pte_at(..., ptep, ...)
> > 					set_pte(ptep, pte);	// save in lazy mmu mode
> > 
> > 	// ret == -ENOENT
> > 
> > 	ptent = ptep_get(src_pte);				// lazy mmu save is not observed
> > 	ret = copy_present_ptes(..., ptent, ...);		// wrong ptent used
> > 
> > I am not aware whether the effort to "read hazards be removed from the code"
> > has ever been made and the generic code is safe in this regard.
> > 
> > What is your take on this?
> 
> Hmm, that looks like a bug to me, at least based on the stated requirements.
> Although this is not a "read through a raw PTE *pointer*", it is a ptep_get().
> The arch code can override that so I guess it has an opportunity to flush. But I
> don't think any arches are currently doing that.
> 
> Probably the simplest fix is to add arch_flush_lazy_mmu_mode() before the
> ptep_get()?

Which would completely revert the very idea of the lazy mmu mode?
(As one would flush on every PTE page table iteration).

> It won't be a problem in practice for arm64, since the pgtables are always
> updated immediately. I just want to use these hooks to defer/batch barriers in
> certain cases.
> 
> And this is a pre-existing issue for the arches that use lazy mmu with
> device-exclusive mappings, which my extending lazy mmu into vmalloc won't
> exacerbate.
> 
> Would you be willing/able to submit a fix?

Well, we have a dozen of lazy mmu cases and I would guess it is not the
only piece of code that seems affected. I was thinking about debug feature
that could help spotting all troubled locations.

Then we could assess and decide if it is feasible to fix. Just turning the
code above into the PTE read-modify-update pattern is quite an exercise...

> Thanks,
> Ryan


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Subject: Re: [PATCH v2 0/5] Fix lazy mmu mode
Content-Language: en-GB
To: Alexander Gordeev 
Cc: Andrew Morton ,
 "David S. Miller" ,
 Andreas Larsson , Juergen Gross ,
 Boris Ostrovsky ,
 Thomas Gleixner , Ingo Molnar ,
 Borislav Petkov , Dave Hansen ,
 "H. Peter Anvin" ,
 "Matthew Wilcox (Oracle)" ,
 Catalin Marinas , linux-mm@kvack.org,
 sparclinux@vger.kernel.org, xen-devel@lists.xenproject.org,
 linux-kernel@vger.kernel.org
References: <20250303141542.3371656-1-ryan.roberts@arm.com>
 <912c7a32-b39c-494f-a29c-4865cd92aeba@agordeev.local>
 <5b0609c9-95ee-4e48-bb6d-98f57c5d2c31@arm.com>
 
From: Ryan Roberts 
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On 14/04/2025 15:04, Alexander Gordeev wrote:
> On Mon, Apr 14, 2025 at 02:22:53PM +0100, Ryan Roberts wrote:
>> On 10/04/2025 17:07, Alexander Gordeev wrote:
>>>> I'm planning to implement lazy mmu mode for arm64 to optimize vmalloc. As part
>>>> of that, I will extend lazy mmu mode to cover kernel mappings in vmalloc table
>>>> walkers. While lazy mmu mode is already used for kernel mappings in a few
>>>> places, this will extend it's use significantly.
>>>>
>>>> Having reviewed the existing lazy mmu implementations in powerpc, sparc and x86,
>>>> it looks like there are a bunch of bugs, some of which may be more likely to
>>>> trigger once I extend the use of lazy mmu.
>>>
>>> Do you have any idea about generic code issues as result of not adhering to
>>> the originally stated requirement:
>>>
>>>   /*
>>>    ...
>>>    * the PTE updates which happen during this window.  Note that using this
>>>    * interface requires that read hazards be removed from the code.  A read
>>>    * hazard could result in the direct mode hypervisor case, since the actual
>>>    * write to the page tables may not yet have taken place, so reads though
>>>    * a raw PTE pointer after it has been modified are not guaranteed to be
>>>    * up to date.
>>>    ...
>>>    */
>>>
>>> I tried to follow few code paths and at least this one does not look so good:
>>>
>>> copy_pte_range(..., src_pte, ...)
>>> 	ret = copy_nonpresent_pte(..., src_pte, ...)
>>> 		try_restore_exclusive_pte(..., src_pte, ...)	// is_device_exclusive_entry(entry)
>>> 			restore_exclusive_pte(..., ptep, ...)
>>> 				set_pte_at(..., ptep, ...)
>>> 					set_pte(ptep, pte);	// save in lazy mmu mode
>>>
>>> 	// ret == -ENOENT
>>>
>>> 	ptent = ptep_get(src_pte);				// lazy mmu save is not observed
>>> 	ret = copy_present_ptes(..., ptent, ...);		// wrong ptent used
>>>
>>> I am not aware whether the effort to "read hazards be removed from the code"
>>> has ever been made and the generic code is safe in this regard.
>>>
>>> What is your take on this?
>>
>> Hmm, that looks like a bug to me, at least based on the stated requirements.
>> Although this is not a "read through a raw PTE *pointer*", it is a ptep_get().
>> The arch code can override that so I guess it has an opportunity to flush. But I
>> don't think any arches are currently doing that.
>>
>> Probably the simplest fix is to add arch_flush_lazy_mmu_mode() before the
>> ptep_get()?
> 
> Which would completely revert the very idea of the lazy mmu mode?
> (As one would flush on every PTE page table iteration).

Well yes, but this is a pretty rare path, I'm guessing?

> 
>> It won't be a problem in practice for arm64, since the pgtables are always
>> updated immediately. I just want to use these hooks to defer/batch barriers in
>> certain cases.
>>
>> And this is a pre-existing issue for the arches that use lazy mmu with
>> device-exclusive mappings, which my extending lazy mmu into vmalloc won't
>> exacerbate.
>>
>> Would you be willing/able to submit a fix?
> 
> Well, we have a dozen of lazy mmu cases and I would guess it is not the
> only piece of code that seems affected. I was thinking about debug feature
> that could help spotting all troubled locations.
> 
> Then we could assess and decide if it is feasible to fix. Just turning the
> code above into the PTE read-modify-update pattern is quite an exercise...
> 
>> Thanks,
>> Ryan



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From: Anthony PERARD 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Anthony PERARD 
Subject: [XEN PATCH] tools/tests: Fix newly introduced Makefile
Date: Mon, 14 Apr 2025 16:17:14 +0200
Message-Id: <20250414141714.10166-1-anthony@xenproject.org>
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From: Anthony PERARD 

Fix few issue with this new directory:
- clean generated files
- and ignore those generated files
- include the dependency files generated by `gcc`.
- rework prerequisites:
  "test-rangeset.o" also needs the generated files "list.h" and
  "rangeset.h". Technically, both only needs "harness.h" which needs
  the generated headers, but that's a bit simpler and the previous
  point will add the dependency on "harness.h" automatically.

This last point fix an issue where `make` might decide to build
"test-rangeset.o" before the other files are ready.

Fixes: 7bf777b42cad ("tootls/tests: introduce unit tests for rangesets")
Signed-off-by: Anthony PERARD 
---

Make doesn't needs the *.h to generated the .c. So removing that
prerequisite means make can generate all 3 at the same time.
---
 tools/tests/rangeset/.gitignore | 4 ++++
 tools/tests/rangeset/Makefile   | 8 ++++++--
 2 files changed, 10 insertions(+), 2 deletions(-)
 create mode 100644 tools/tests/rangeset/.gitignore

diff --git a/tools/tests/rangeset/.gitignore b/tools/tests/rangeset/.gitignore
new file mode 100644
index 0000000000..cdeb778535
--- /dev/null
+++ b/tools/tests/rangeset/.gitignore
@@ -0,0 +1,4 @@
+/list.h
+/rangeset.c
+/rangeset.h
+/test-rangeset
diff --git a/tools/tests/rangeset/Makefile b/tools/tests/rangeset/Makefile
index 70076eff34..3dafcbd054 100644
--- a/tools/tests/rangeset/Makefile
+++ b/tools/tests/rangeset/Makefile
@@ -12,7 +12,7 @@ run: $(TARGET)
 
 .PHONY: clean
 clean:
-	$(RM) -- *.o $(TARGET) $(DEPS_RM)
+	$(RM) -- *.o $(TARGET) $(DEPS_RM) list.h rangeset.h rangeset.c
 
 .PHONY: distclean
 distclean: clean
@@ -32,7 +32,7 @@ rangeset.h: $(XEN_ROOT)/xen/include/xen/rangeset.h
 list.h rangeset.h:
 	sed -e '/#include/d' <$< >$@
 
-rangeset.c: $(XEN_ROOT)/xen/common/rangeset.c list.h rangeset.h
+rangeset.c: $(XEN_ROOT)/xen/common/rangeset.c
 	# Remove includes and add the test harness header
 	sed -e '/#include/d' -e '1s/^/#include "harness.h"/' <$< >$@
 
@@ -42,5 +42,9 @@ CFLAGS += $(CFLAGS_xeninclude)
 
 LDFLAGS += $(APPEND_LDFLAGS)
 
+test-rangeset.o rangeset.o: list.h rangeset.h
+
 test-rangeset: rangeset.o test-rangeset.o
 	$(CC) $^ -o $@ $(LDFLAGS)
+
+-include $(DEPS_INCLUDE)
-- 
Anthony PERARD



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Date: Mon, 14 Apr 2025 16:17:47 +0200
From: Alexander Gordeev 
To: Nicholas Piggin 
Cc: Andrew Morton ,
        Andrey Ryabinin ,
        Hugh Dickins , Guenter Roeck ,
        Juergen Gross , Jeremy Fitzhardinge ,
        linux-kernel@vger.kernel.org, linux-mm@kvack.org,
        kasan-dev@googlegroups.com, sparclinux@vger.kernel.org,
        xen-devel@lists.xenproject.org, linuxppc-dev@lists.ozlabs.org,
        linux-s390@vger.kernel.org
Subject: Re: [PATCH v1 2/4] mm: Cleanup apply_to_pte_range() routine
Message-ID: 
References: 
 <93102722541b1daf541fce9fb316a1a2614d8c86.1744037648.git.agordeev@linux.ibm.com>
 
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On Fri, Apr 11, 2025 at 04:46:58PM +1000, Nicholas Piggin wrote:
> On Tue Apr 8, 2025 at 1:11 AM AEST, Alexander Gordeev wrote:
> > Reverse 'create' vs 'mm == &init_mm' conditions and move
> > page table mask modification out of the atomic context.
> >
> > Signed-off-by: Alexander Gordeev 
> > ---
> >  mm/memory.c | 28 +++++++++++++++++-----------
> >  1 file changed, 17 insertions(+), 11 deletions(-)
> >
> > diff --git a/mm/memory.c b/mm/memory.c
> > index 2d8c265fc7d6..f0201c8ec1ce 100644
> > --- a/mm/memory.c
> > +++ b/mm/memory.c
> > @@ -2915,24 +2915,28 @@ static int apply_to_pte_range(struct mm_struct *mm, pmd_t *pmd,
> >  				     pte_fn_t fn, void *data, bool create,
> >  				     pgtbl_mod_mask *mask)
> >  {
> > +	int err = create ? -ENOMEM : -EINVAL;
> 
> Could you make this a new variable instead of reusing
> existing err? 'const int pte_err' or something?

Will do, when/if repost.

...

> > @@ -2944,12 +2948,14 @@ static int apply_to_pte_range(struct mm_struct *mm, pmd_t *pmd,
> >  			}
> >  		} while (addr += PAGE_SIZE, addr != end);
> >  	}
> > -	*mask |= PGTBL_PTE_MODIFIED;
> >  
> >  	arch_leave_lazy_mmu_mode();
> >  
> >  	if (mm != &init_mm)
> >  		pte_unmap_unlock(mapped_pte, ptl);
> > +
> > +	*mask |= PGTBL_PTE_MODIFIED;
> 
> This is done just because we might as well? Less work in critical
> section?

Yes.

Thanks!


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Date: Mon, 14 Apr 2025 16:21:38 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein 
Subject: Re: [PATCH v2 5/7] Adjust directory layout for rootfs.cpio.gz
Message-ID: 
References: <20250414101843.2348330-1-andrew.cooper3@citrix.com>
 <20250414101843.2348330-6-andrew.cooper3@citrix.com>
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Date: Mon, 14 Apr 2025 16:21:38 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein 
Subject: Re: [PATCH v2 5/7] Adjust directory layout for rootfs.cpio.gz

On Mon, Apr 14, 2025 at 11:18:41AM +0100, Andrew Cooper wrote:
> All tests using the rootfs currently modify it with:
>=20
>   mkdir proc
>   mkdir run
>   mkdir srv
>   mkdir sys
>   rm var/run
>=20
> This is because the rootfs doesn't have the correct top level directories.
> Furthermore, dev is currently included when it oughtn't to be.
>=20
> srv is easy.  It's an empty directory and can be included in PATHS.
>=20
> dev, proc, run and sys are all mount points, which OpenRC knows how to
> populate on boot.  Create only the top level directories in rootfs, witho=
ut
> `find` recursing into them.
>=20
> Signed-off-by: Andrew Cooper 

Reviewed-by: Marek Marczykowski-G=C3=B3recki 

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Date: Mon, 14 Apr 2025 16:22:17 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein 
Subject: Re: [PATCH v2.1 4/7] Shrink the rootfs substantially
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Date: Mon, 14 Apr 2025 16:22:17 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein 
Subject: Re: [PATCH v2.1 4/7] Shrink the rootfs substantially

On Mon, Apr 14, 2025 at 12:52:26PM +0100, Andrew Cooper wrote:
> bash, busybox, musl and zlib are all in the base container.
>=20
> python3 and ncurses are in principle used by bits of Xen, but not in anyt=
hing
> we test in CI.  argp-standlone, curl, dbus, libfdt, libgcc and sudo aren't
> used at all (for x86 at least).
>=20
> libbz2 and libuuid were pulled in transitively before, and need to be inc=
luded
> explicitly now.
>=20
> Use apk --no-cache to avoid keeping a ~2M package index on disk.  Use apk
> upgrade in case there are changes to the base container.
>=20
> Remove the modules scan on boot.  We don't have or build any (except argo=
, and
> that's handled specially).  This removes a chunk of warnings on boot.
>=20
> This shrinks the rootfs from ~30M down to ~8M.
>=20
> Factor out some x86-isms in preparation for ARM64 support.
>=20
> No practical change.
>=20
> Signed-off-by: Andrew Cooper 

Reviewed-by: Marek Marczykowski-G=C3=B3recki 

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Date: Mon, 14 Apr 2025 15:23:25 +0100
Message-ID: 
Subject: Re: [PATCH v3 10/16] x86/hyperlaunch: obtain cmdline from device
 tree
From: Alejandro Vallejo 
To: Jan Beulich 
CC: "Daniel P. Smith" , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" , Michal Orzel
	, Andrew Cooper ,
	=?utf-8?q?Roger_Pau_Monn=C3=A9?= , Julien Grall
	, Bertrand Marquis ,
	
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On Thu Apr 10, 2025 at 12:12 PM BST, Jan Beulich wrote:
> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>> --- a/xen/arch/x86/domain-builder/core.c
>> +++ b/xen/arch/x86/domain-builder/core.c
>> @@ -8,9 +8,37 @@
>>  #include 
>> =20
>>  #include 
>> +#include 
>> =20
>>  #include "fdt.h"
>> =20
>> +size_t __init builder_get_cmdline_size(struct boot_info *bi, int offset=
)
>> +{
>> +#ifdef CONFIG_DOMAIN_BUILDER
>> +    const void *fdt =3D bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_I=
DX]);
>> +    int size =3D fdt_cmdline_prop_size(fdt, offset);
>> +
>> +    bootstrap_unmap();
>> +    return size < 0 ? 0 : size;
>
> Use max() instead of open-coding it?

Sure. On an unrelated matter, I've also removed the ifdef and relied on
DCE for v4 for this and the next helper.

>
>> --- a/xen/arch/x86/domain-builder/fdt.c
>> +++ b/xen/arch/x86/domain-builder/fdt.c
>> @@ -189,6 +189,12 @@ static int __init process_domain_node(
>>              printk("  kernel: boot module %d\n", idx);
>>              bi->mods[idx].type =3D BOOTMOD_KERNEL;
>>              bd->kernel =3D &bi->mods[idx];
>> +
>> +            /* If bootloader didn't set cmdline, see if FDT provides on=
e. */
>> +            if ( bd->kernel->cmdline_pa &&
>> +                 !((char *)__va(bd->kernel->cmdline_pa))[0] )
>> +                bd->kernel->fdt_cmdline =3D fdt_get_prop_offset(
>> +                    fdt, node, "bootargs", &bd->kernel->cmdline_pa);
>
> Somewhat orthogonal question: Should there perhaps be a way for the boot =
loader
> provided cmdline to go at the tail of the DT provided one?

That would preclude the bootloader fully overriding what's on the DT.
One can always just copy the cmdline in the DT to the bootloader and
adjust whatever is necessary there for testing. Adding append behaviour
sounds more like a hindrance rather than helpful. To me at least.

>
>> --- a/xen/arch/x86/domain-builder/fdt.h
>> +++ b/xen/arch/x86/domain-builder/fdt.h
>> @@ -12,6 +12,31 @@ struct boot_info;
>>  #define HYPERLAUNCH_MODULE_IDX 0
>> =20
>>  #ifdef CONFIG_DOMAIN_BUILDER
>> +
>> +static inline int __init fdt_cmdline_prop_size(const void *fdt, int off=
set)
>> +{
>> +    int ret;
>> +
>> +    fdt_get_property_by_offset(fdt, offset, &ret);
>> +
>> +    return ret;
>> +}
>> +
>> +static inline int __init fdt_cmdline_prop_copy(
>> +    const void *fdt, int offset, char *cmdline, size_t size)
>> +{
>> +    int ret;
>> +    const struct fdt_property *prop =3D
>> +        fdt_get_property_by_offset(fdt, offset, &ret);
>> +
>> +    if ( ret < 0 )
>> +        return ret;
>> +
>> +    ASSERT(size > ret);
>> +
>> +    return strlcpy(cmdline, prop->data, ret);
>> +}
>
> What's the rationale for these to be separate functions, rather then the =
code
> being integrated into their sole callers? Especially for the former the e=
xtra
> layer feels excessive.

I've moved them onto domain-builder/fdt.c (where I believe they were
originally?) for v4.

>
>> --- a/xen/arch/x86/include/asm/domain-builder.h
>> +++ b/xen/arch/x86/include/asm/domain-builder.h
>> @@ -3,6 +3,10 @@
>> =20
>>  struct boot_info;
>> =20
>> +size_t __init builder_get_cmdline_size(struct boot_info *bi, int offset=
);
>> +int __init builder_get_cmdline(
>> +    struct boot_info *bi, int offset, char *cmdline, size_t size);
>
> No __init on declarations please.

Ack.

>
>> --- a/xen/arch/x86/setup.c
>> +++ b/xen/arch/x86/setup.c
>> @@ -984,7 +984,10 @@ static size_t __init domain_cmdline_size(
>>  {
>>      size_t s =3D bi->kextra ? strlen(bi->kextra) : 0;
>> =20
>> -    s +=3D bd->kernel->cmdline_pa ? strlen(__va(bd->kernel->cmdline_pa)=
) : 0;
>> +    if ( bd->kernel->fdt_cmdline )
>> +        s +=3D builder_get_cmdline_size(bi, bd->kernel->cmdline_pa);
>> +    else
>> +        s +=3D strlen(__va(bd->kernel->cmdline_pa));
>
> Why's the check lost for bd->kernel->cmdline_pa being non-zero?

Shouldn't have been, indeed.
>
>> @@ -1047,9 +1050,12 @@ static struct domain *__init create_dom0(struct b=
oot_info *bi)
>>          if ( !(cmdline =3D xzalloc_array(char, cmdline_size)) )
>>              panic("Error allocating cmdline buffer for %pd\n", d);
>> =20
>> -        if ( bd->kernel->cmdline_pa )
>> +        if ( bd->kernel->fdt_cmdline )
>> +            builder_get_cmdline(
>> +                bi, bd->kernel->cmdline_pa, cmdline, cmdline_size);
>> +        else
>
> Same here.

Ack.

>
>>              strlcpy(cmdline,
>> -                    cmdline_cook(__va(bd->kernel->cmdline_pa), bi->load=
er),
>> +                    cmdline_cook(__va(bd->kernel->cmdline_pa),bi->loade=
r),
>
> The change to this line is bogus altogether.

Ugh, yes.

>
>> --- a/xen/include/xen/libfdt/libfdt-xen.h
>> +++ b/xen/include/xen/libfdt/libfdt-xen.h
>> @@ -23,6 +23,29 @@ static inline uint64_t  __init fdt_cell_as_u64(const =
fdt32_t *cell)
>>      return ((uint64_t)fdt32_to_cpu(cell[0]) << 32) | fdt32_to_cpu(cell[=
1]);
>>  }
>> =20
>> +static inline bool __init fdt_get_prop_offset(
>> +    const void *fdt, int node, const char *name, unsigned long *offset)
>> +{
>> +    int ret, poffset;
>> +    const char *pname;
>> +
>> +    fdt_for_each_property_offset(poffset, fdt, node)
>> +    {
>> +        fdt_getprop_by_offset(fdt, poffset, &pname, &ret);
>> +
>> +        if ( ret < 0 )
>> +            continue;
>> +
>> +        if ( strcmp(pname, name) =3D=3D 0 )
>> +        {
>> +            *offset =3D poffset;
>
> Variable naming looks backwards here.
>
> Jan

I think the leading p stands for "property" (for the sake of giving it a
name). But I see how that might be confusing when interpreted with a
Hungarian notation lens.

I'll invert it. It doesn't matter which is which, after all.

Cheers,
Alejandro


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Date: Mon, 14 Apr 2025 16:23:24 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein 
Subject: Re: [PATCH v2 6/7] Provide an ARM64 rootfs too
Message-ID: 
References: <20250414101843.2348330-1-andrew.cooper3@citrix.com>
 <20250414101843.2348330-7-andrew.cooper3@citrix.com>
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Date: Mon, 14 Apr 2025 16:23:24 +0200
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To: Andrew Cooper 
Cc: Xen-devel ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein 
Subject: Re: [PATCH v2 6/7] Provide an ARM64 rootfs too

On Mon, Apr 14, 2025 at 11:18:42AM +0100, Andrew Cooper wrote:
> The only extra package needed is libfdt.
>=20
> The older ARM64 rootfs configured modloop, networking and sysctl, but non=
e of
> this is used in any of the testing, so is omitted here for now.
>=20
> Signed-off-by: Andrew Cooper 

Reviewed-by: Marek Marczykowski-G=C3=B3recki 

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Date: Mon, 14 Apr 2025 16:50:33 +0200
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User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v1 01/14] xen/riscv: implement get_s_time()
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: 
 
 <7f26a9cb-a685-4a2a-a470-8c5e94ddc31e@suse.com>
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From: Oleksii Kurochko 
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On 4/10/25 2:52 PM, Jan Beulich wrote:
> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>> @@ -23,6 +24,11 @@ static inline cycles_t get_cycles(void)
>>       return csr_read(CSR_TIME);
>>   }
>>   
>> +static inline s_time_t ticks_to_ns(uint64_t ticks)
>> +{
>> +    return muldiv64(ticks, SECONDS(1), 1000 * cpu_khz);
>> +}
> Why the extra multiplication by 1000? I.e. why not
> "muldiv64(ticks, MILLISECONDS(1), cpu_khz)", getting away with just one
> multiplication and a reduced risk of encountering intermediate overflow
> (affecting only hypothetical above 4THz CPUs then)?

Multiplication by 1000 was needed to convert khz to hz, but yes, your option
would be better.

>
>> --- a/xen/arch/riscv/time.c
>> +++ b/xen/arch/riscv/time.c
>> @@ -4,10 +4,17 @@
>>   #include 
>>   #include 
>>   #include 
>> +#include 
>>   
>>   unsigned long __ro_after_init cpu_khz; /* CPU clock frequency in kHz. */
>>   uint64_t __ro_after_init boot_clock_cycles;
>>   
>> +s_time_t get_s_time(void)
>> +{
>> +    uint64_t ticks = get_cycles() - boot_clock_cycles;
>> +    return ticks_to_ns(ticks);
> Nit: Blank line between declaration(s) and statement(s) please, as well as
> ahead of the main "return" of a function.
>
> Happy to make both adjustments upon committing, so long as you agree; then:
> Reviewed-by: Jan Beulich

I'll be happy with that.

Thank you very much.

~ Oleksii

--------------yo4C76a0szgaZfAxZHH92FIz
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On 4/10/25 2:52 PM, Jan Beulich wrote:

    

    

      
On 08.04.2025 17:57, Oleksii Kurochko wrote:


      

        
@@ -23,6 +24,11 @@ static inline cycles_t get_cycles(void)
     return csr_read(CSR_TIME);
 }
 
+static inline s_time_t ticks_to_ns(uint64_t ticks)
+{
+    return muldiv64(ticks, SECONDS(1), 1000 * cpu_khz);
+}


      

      
Why the extra multiplication by 1000? I.e. why not
"muldiv64(ticks, MILLISECONDS(1), cpu_khz)", getting away with just one
multiplication and a reduced risk of encountering intermediate overflow
(affecting only hypothetical above 4THz CPUs then)?

    

    
Multiplication by 1000 was needed to convert khz to hz, but yes, your option
would be better.



    

      



      

        
--- a/xen/arch/riscv/time.c
+++ b/xen/arch/riscv/time.c
@@ -4,10 +4,17 @@
 #include <xen/init.h>
 #include <xen/lib.h>
 #include <xen/sections.h>
+#include <xen/types.h>
 
 unsigned long __ro_after_init cpu_khz; /* CPU clock frequency in kHz. */
 uint64_t __ro_after_init boot_clock_cycles;
 
+s_time_t get_s_time(void)
+{
+    uint64_t ticks = get_cycles() - boot_clock_cycles;
+    return ticks_to_ns(ticks);


      

      
Nit: Blank line between declaration(s) and statement(s) please, as well as
ahead of the main "return" of a function.

Happy to make both adjustments upon committing, so long as you agree; then:
Reviewed-by: Jan Beulich <jbeulich@suse.com>

    

    
I'll be happy with that.

Thank you very much.

~ Oleksii

  


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From: Luca Fancellu 
To: "Orzel, Michal" 
CC: "xen-devel@lists.xenproject.org" , Penny
 Zheng , Stefano Stabellini ,
	Julien Grall , Bertrand Marquis ,
	Volodymyr Babchuk , Wei Chen 
Subject: Re: [PATCH v3 1/7] arm/mpu: Introduce MPU memory region map structure
Thread-Topic: [PATCH v3 1/7] arm/mpu: Introduce MPU memory region map
 structure
Thread-Index: AQHbqvIQP3h8YyZqYkSDv4tGWZWI7LOi9uCAgABMVgA=
Date: Mon, 14 Apr 2025 14:50:54 +0000
Message-ID: 
References: <20250411145655.140667-1-luca.fancellu@arm.com>
 <20250411145655.140667-2-luca.fancellu@arm.com>
 
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Hi Michal,

> On 14 Apr 2025, at 11:17, Orzel, Michal  wrote:
>=20
>=20
>=20
> On 11/04/2025 16:56, Luca Fancellu wrote:
>> From: Penny Zheng 
>>=20
>> Introduce pr_t typedef which is a structure having the prbar
>> and prlar members, each being structured as the registers of
>> the aarch64 armv8-r architecture.
>>=20
>> Introduce the array 'xen_mpumap' that will store a view of
>> the content of the MPU regions.
>>=20
>> Introduce MAX_MPU_REGIONS macro that uses the value of
>> NUM_MPU_REGIONS_MASK just for clarity, because using the
>> latter as number of elements of the xen_mpumap array might
>> be misleading.
> What should be the size of this array? I thought NUM_MPU_REGIONS indicate=
s how
> many regions there can be (i.e. 256) and this should be the size. Yet you=
 use
> MASK for size which is odd.

So the maximum number of regions for aarch64 armv8-r are 255, MPUIR_EL2.REG=
ION is an
8 bit field advertising the number of region supported.

Is it better if I use just the below?

#define MAX_MPU_REGIONS 255

>=20
>>=20
>> Signed-off-by: Penny Zheng 
>> Signed-off-by: Wei Chen 
>> Signed-off-by: Luca Fancellu 
>> ---
>> xen/arch/arm/include/asm/arm64/mpu.h | 44 ++++++++++++++++++++++++++++
>> xen/arch/arm/include/asm/mpu.h       |  5 ++++
>> xen/arch/arm/mpu/mm.c                |  4 +++
>> 3 files changed, 53 insertions(+)
>> create mode 100644 xen/arch/arm/include/asm/arm64/mpu.h
>>=20
>> diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include=
/asm/arm64/mpu.h
>> new file mode 100644
>> index 000000000000..4d2bd7d7877f
>> --- /dev/null
>> +++ b/xen/arch/arm/include/asm/arm64/mpu.h
>> @@ -0,0 +1,44 @@
>> +/* SPDX-License-Identifier: GPL-2.0-only */
>> +/*
>> + * mpu.h: Arm Memory Protection Unit definitions for aarch64.
> NIT: Do we really see the benefit in having such generic comments? What i=
f you
> add a prototype of some function here. Will it fit into a definition scop=
e?

I can remove the comment, but I would say that if I put some function proto=
type here
it should be related to arm64, being this file under arm64.

>=20
>> + */
>> +
>> +#ifndef __ARM_ARM64_MPU_H__
>> +#define __ARM_ARM64_MPU_H__
>> +
>> +#ifndef __ASSEMBLY__
>> +
>> +/* Protection Region Base Address Register */
>> +typedef union {
>> +    struct __packed {
>> +        unsigned long xn:2;       /* Execute-Never */
>> +        unsigned long ap:2;       /* Acess Permission */
> s/Acess/Access/
>=20
>> +        unsigned long sh:2;       /* Sharebility */
> s/Sharebility/Shareability/
>=20
>> +        unsigned long base:46;    /* Base Address */
>> +        unsigned long pad:12;
> If you describe the register 1:1, why "pad" and not "res" or "res0"?
>=20
>> +    } reg;
>> +    uint64_t bits;
>> +} prbar_t;
>> +
>> +/* Protection Region Limit Address Register */
>> +typedef union {
>> +    struct __packed {
>> +        unsigned long en:1;     /* Region enable */
>> +        unsigned long ai:3;     /* Memory Attribute Index */
>> +        unsigned long ns:1;     /* Not-Secure */
>> +        unsigned long res:1;    /* Reserved 0 by hardware */
> res0 /* RES0 */
>=20
>> +        unsigned long limit:46; /* Limit Address */
>> +        unsigned long pad:12;
> res1 /* RES0 */
>=20
>> +    } reg;
>> +    uint64_t bits;
>> +} prlar_t;
>> +
>> +/* MPU Protection Region */
>> +typedef struct {
>> +    prbar_t prbar;
>> +    prlar_t prlar;
>> +} pr_t;
>> +
>> +#endif /* __ASSEMBLY__ */
>> +
>> +#endif /* __ARM_ARM64_MPU_H__ */
>> \ No newline at end of file
> Please add a new line at the end
>=20
> Also, EMACS comment is missing.

Thanks I will fix all these findings

Cheers,
Luca



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Date: Mon, 14 Apr 2025 15:54:04 +0100
Message-ID: 
CC: , "Daniel P. Smith"
	, Jason Andryuk , "Xenia
 Ragiadakou" , Stefano Stabellini
	, Michal Orzel , Jan Beulich
	, Andrew Cooper ,
	=?utf-8?q?Roger_Pau_Monn=C3=A9?= , Julien Grall
	, Bertrand Marquis 
Subject: Re: [PATCH v3 10/16] x86/hyperlaunch: obtain cmdline from device
 tree
From: Alejandro Vallejo 
To: Denis Mukhin 
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References: <20250408160802.49870-1-agarciav@amd.com>
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On Wed Apr 9, 2025 at 11:04 PM BST, Denis Mukhin wrote:
> On Tuesday, April 8th, 2025 at 9:07 AM, Alejandro Vallejo  wrote:
>
>>=20
>>=20
>> From: "Daniel P. Smith" dpsmith@apertussolutions.com
>>=20
>>=20
>> Add support to read the command line from the hyperlauunch device tree.
>> The device tree command line is located in the "bootargs" property of th=
e
>> "multiboot,kernel" node.
>>=20
>> A boot loader command line, e.g. a grub module string field, takes
>> precendence ove the device tree one since it is easier to modify.
>>=20
>> Signed-off-by: Daniel P. Smith dpsmith@apertussolutions.com
>>=20
>> Signed-off-by: Jason Andryuk jason.andryuk@amd.com
>>=20
>> ---
>> v3:
>> * Rename to fdt_get_prop_offset()
>> * Remove size_t cast from builder_get_cmdline_size()
>> * fdt_get_prop_offset() use strcmp()
>> * fdt_get_prop_offset() return bool
>> ---
>> xen/arch/x86/domain-builder/core.c | 28 +++++++++++++++++++++++
>> xen/arch/x86/domain-builder/fdt.c | 6 +++++
>> xen/arch/x86/domain-builder/fdt.h | 25 ++++++++++++++++++++
>> xen/arch/x86/include/asm/bootinfo.h | 6 +++--
>> xen/arch/x86/include/asm/domain-builder.h | 4 ++++
>> xen/arch/x86/setup.c | 12 +++++++---
>> xen/include/xen/libfdt/libfdt-xen.h | 23 +++++++++++++++++++
>> 7 files changed, 99 insertions(+), 5 deletions(-)
>>=20
>> diff --git a/xen/arch/x86/domain-builder/core.c b/xen/arch/x86/domain-bu=
ilder/core.c
>> index eda7fa7a8f..510a74a675 100644
>> --- a/xen/arch/x86/domain-builder/core.c
>> +++ b/xen/arch/x86/domain-builder/core.c
>> @@ -8,9 +8,37 @@
>> #include 
>>=20
>>=20
>> #include 
>>=20
>> +#include 
>>=20
>>=20
>> #include "fdt.h"
>>=20
>> +size_t __init builder_get_cmdline_size(struct boot_info *bi, int offset=
)
>> +{
>> +#ifdef CONFIG_DOMAIN_BUILDER
>> + const void *fdt =3D bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_IDX]=
);
>>=20
>> + int size =3D fdt_cmdline_prop_size(fdt, offset);
>> +
>> + bootstrap_unmap();
>> + return size < 0 ? 0 : size;
>> +#else
>> + return 0;
>> +#endif
>> +}
>> +
>> +int __init builder_get_cmdline(
>> + struct boot_info *bi, int offset, char *cmdline, size_t size)
>> +{
>> +#ifdef CONFIG_DOMAIN_BUILDER
>> + const void *fdt =3D bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_IDX]=
);
>>=20
>> + int ret =3D fdt_cmdline_prop_copy(fdt, offset, cmdline, size);
>> +
>> + bootstrap_unmap();
>> + return ret;
>> +#else
>> + return 0;
>> +#endif
>> +}
>> +
>> void __init builder_init(struct boot_info *bi)
>> {
>> if ( IS_ENABLED(CONFIG_DOMAIN_BUILDER) )
>> diff --git a/xen/arch/x86/domain-builder/fdt.c b/xen/arch/x86/domain-bui=
lder/fdt.c
>> index a037c8b6cb..bc9903a9de 100644
>> --- a/xen/arch/x86/domain-builder/fdt.c
>> +++ b/xen/arch/x86/domain-builder/fdt.c
>> @@ -189,6 +189,12 @@ static int __init process_domain_node(
>> printk(" kernel: boot module %d\n", idx);
>> bi->mods[idx].type =3D BOOTMOD_KERNEL;
>>=20
>> bd->kernel =3D &bi->mods[idx];
>>=20
>> +
>> + /* If bootloader didn't set cmdline, see if FDT provides one. */
>> + if ( bd->kernel->cmdline_pa &&
>>=20
>> + !((char *)__va(bd->kernel->cmdline_pa))[0] )
>>=20
>> + bd->kernel->fdt_cmdline =3D fdt_get_prop_offset(
>>=20
>> + fdt, node, "bootargs", &bd->kernel->cmdline_pa);
>>=20
>> }
>> }
>>=20
>> diff --git a/xen/arch/x86/domain-builder/fdt.h b/xen/arch/x86/domain-bui=
lder/fdt.h
>> index e8769dc51c..91f665c8fd 100644
>> --- a/xen/arch/x86/domain-builder/fdt.h
>> +++ b/xen/arch/x86/domain-builder/fdt.h
>> @@ -12,6 +12,31 @@ struct boot_info;
>> #define HYPERLAUNCH_MODULE_IDX 0
>>=20
>> #ifdef CONFIG_DOMAIN_BUILDER
>> +
>> +static inline int __init fdt_cmdline_prop_size(const void *fdt, int off=
set)
>> +{
>> + int ret;
>> +
>> + fdt_get_property_by_offset(fdt, offset, &ret);
>> +
>> + return ret;
>> +}
>> +
>> +static inline int __init fdt_cmdline_prop_copy(
>> + const void *fdt, int offset, char *cmdline, size_t size)
>> +{
>> + int ret;
>> + const struct fdt_property *prop =3D
>> + fdt_get_property_by_offset(fdt, offset, &ret);
>> +
>> + if ( ret < 0 )
>> + return ret;
>> +
>> + ASSERT(size > ret);
>>=20
>> +
>> + return strlcpy(cmdline, prop->data, ret);
>>=20
>> +}
>> +
>> int has_hyperlaunch_fdt(const struct boot_info *bi);
>> int walk_hyperlaunch_fdt(struct boot_info bi);
>> #else
>> diff --git a/xen/arch/x86/include/asm/bootinfo.h b/xen/arch/x86/include/=
asm/bootinfo.h
>> index 1e3d582e45..5b2c93b1ef 100644
>> --- a/xen/arch/x86/include/asm/bootinfo.h
>> +++ b/xen/arch/x86/include/asm/bootinfo.h
>> @@ -35,11 +35,13 @@ struct boot_module {
>>=20
>> /
>> * Module State Flags:
>> - * relocated: indicates module has been relocated in memory.
>> - * released: indicates module's pages have been freed.
>> + * relocated: indicates module has been relocated in memory.
>> + * released: indicates module's pages have been freed.
>> + * fdt_cmdline: indicates module's cmdline is in the FDT.
>> /
>> bool relocated:1;
>> bool released:1;
>> + bool fdt_cmdline:1;
>>=20
>> /
>> * A boot module may need decompressing by Xen. Headroom is an estimate o=
f
>> diff --git a/xen/arch/x86/include/asm/domain-builder.h b/xen/arch/x86/in=
clude/asm/domain-builder.h
>> index b6d9ba94de..7518b6ddf3 100644
>> --- a/xen/arch/x86/include/asm/domain-builder.h
>> +++ b/xen/arch/x86/include/asm/domain-builder.h
>> @@ -3,6 +3,10 @@
>>=20
>> struct boot_info;
>>=20
>> +size_t __init builder_get_cmdline_size(struct boot_info *bi, int offset=
);
>> +int __init builder_get_cmdline(
>> + struct boot_info *bi, int offset, char *cmdline, size_t size);
>> +
>> void builder_init(struct boot_info *bi);
>>=20
>> #endif
>> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
>> index 00e8c8a2a3..ca4415d020 100644
>> --- a/xen/arch/x86/setup.c
>> +++ b/xen/arch/x86/setup.c
>> @@ -984,7 +984,10 @@ static size_t __init domain_cmdline_size(
>> {
>> size_t s =3D bi->kextra ? strlen(bi->kextra) : 0;
>>=20
>>=20
>> - s +=3D bd->kernel->cmdline_pa ? strlen(__va(bd->kernel->cmdline_pa)) :=
 0;
>>=20
>> + if ( bd->kernel->fdt_cmdline )
>>=20
>> + s +=3D builder_get_cmdline_size(bi, bd->kernel->cmdline_pa);
>>=20
>> + else
>> + s +=3D strlen(__va(bd->kernel->cmdline_pa));
>>=20
>>=20
>> if ( s =3D=3D 0 )
>> return s;
>> @@ -1047,9 +1050,12 @@ static struct domain *__init create_dom0(struct b=
oot_info *bi)
>> if ( !(cmdline =3D xzalloc_array(char, cmdline_size)) )
>> panic("Error allocating cmdline buffer for %pd\n", d);
>>=20
>> - if ( bd->kernel->cmdline_pa )
>>=20
>> + if ( bd->kernel->fdt_cmdline )
>>=20
>> + builder_get_cmdline(
>> + bi, bd->kernel->cmdline_pa, cmdline, cmdline_size);
>>=20
>> + else
>> strlcpy(cmdline,
>> - cmdline_cook(__va(bd->kernel->cmdline_pa), bi->loader),
>>=20
>> + cmdline_cook(__va(bd->kernel->cmdline_pa),bi->loader),
>
> Add extra space before bi->loader?

Yes, was a spurious diff.

>
>>=20
>> cmdline_size);
>>=20
>> if ( bi->kextra )
>>=20
>> diff --git a/xen/include/xen/libfdt/libfdt-xen.h b/xen/include/xen/libfd=
t/libfdt-xen.h
>> index 2259c09a6a..e473fbaf0c 100644
>> --- a/xen/include/xen/libfdt/libfdt-xen.h
>> +++ b/xen/include/xen/libfdt/libfdt-xen.h
>> @@ -23,6 +23,29 @@ static inline uint64_t __init fdt_cell_as_u64(const f=
dt32_t *cell)
>> return ((uint64_t)fdt32_to_cpu(cell[0]) << 32) | fdt32_to_cpu(cell[1]);
>> }
>>=20
>> +static inline bool __init fdt_get_prop_offset(
>> + const void *fdt, int node, const char *name, unsigned long *offset)
>> +{
>> + int ret, poffset;
>> + const char *pname;
>> +
>> + fdt_for_each_property_offset(poffset, fdt, node)
>> + {
>> + fdt_getprop_by_offset(fdt, poffset, &pname, &ret);
>
> Return value is not checked.

The pointer itself is ignored, but the error code is placed in "ret"
(when there is an error). Hence the ret < 0 that follows this.

>
>> +
>> + if ( ret < 0 )
>> + continue;
>> +
>> + if ( strcmp(pname, name) =3D=3D 0 )
>
> I got an impression that the preferred form is=20
>    if ( !strcmp(pname, name) )

It varies per file. Doesn't matter much, but sure. Will change.

>
>> + {
>> + offset =3D poffset;
>> + return true;
>> + }
>> + }
>> +
>> + return false;
>> +}
>> +
>> /
>> * Property: reg
>> *
>> --
>> 2.43.0

Cheers,
Alejandro


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Date: Mon, 14 Apr 2025 17:01:07 +0200
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Subject: Re: [PATCH v3 1/7] arm/mpu: Introduce MPU memory region map structure
To: Luca Fancellu 
Cc: "xen-devel@lists.xenproject.org" ,
 Penny Zheng ,
 Stefano Stabellini , Julien Grall ,
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References: <20250411145655.140667-1-luca.fancellu@arm.com>
 <20250411145655.140667-2-luca.fancellu@arm.com>
 
 
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On 14/04/2025 16:50, Luca Fancellu wrote:
> Hi Michal,
> 
>> On 14 Apr 2025, at 11:17, Orzel, Michal  wrote:
>>
>>
>>
>> On 11/04/2025 16:56, Luca Fancellu wrote:
>>> From: Penny Zheng 
>>>
>>> Introduce pr_t typedef which is a structure having the prbar
>>> and prlar members, each being structured as the registers of
>>> the aarch64 armv8-r architecture.
>>>
>>> Introduce the array 'xen_mpumap' that will store a view of
>>> the content of the MPU regions.
>>>
>>> Introduce MAX_MPU_REGIONS macro that uses the value of
>>> NUM_MPU_REGIONS_MASK just for clarity, because using the
>>> latter as number of elements of the xen_mpumap array might
>>> be misleading.
>> What should be the size of this array? I thought NUM_MPU_REGIONS indicates how
>> many regions there can be (i.e. 256) and this should be the size. Yet you use
>> MASK for size which is odd.
> 
> So the maximum number of regions for aarch64 armv8-r are 255, MPUIR_EL2.REGION is an
> 8 bit field advertising the number of region supported.
So there can be max 255 regions. Ok.

> 
> Is it better if I use just the below?
> 
> #define MAX_MPU_REGIONS 255
If there are 255 regions, what NUM_MPU_REGIONS macro is for which stores 256?
These two macros confuse me. Or is it that by your macro you want to denote the
max region number? In that case, the macro should be named MAX_MPU_REGION_NR or
alike.

> 
>>
>>>
>>> Signed-off-by: Penny Zheng 
>>> Signed-off-by: Wei Chen 
>>> Signed-off-by: Luca Fancellu 
>>> ---
>>> xen/arch/arm/include/asm/arm64/mpu.h | 44 ++++++++++++++++++++++++++++
>>> xen/arch/arm/include/asm/mpu.h       |  5 ++++
>>> xen/arch/arm/mpu/mm.c                |  4 +++
>>> 3 files changed, 53 insertions(+)
>>> create mode 100644 xen/arch/arm/include/asm/arm64/mpu.h
>>>
>>> diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/asm/arm64/mpu.h
>>> new file mode 100644
>>> index 000000000000..4d2bd7d7877f
>>> --- /dev/null
>>> +++ b/xen/arch/arm/include/asm/arm64/mpu.h
>>> @@ -0,0 +1,44 @@
>>> +/* SPDX-License-Identifier: GPL-2.0-only */
>>> +/*
>>> + * mpu.h: Arm Memory Protection Unit definitions for aarch64.
>> NIT: Do we really see the benefit in having such generic comments? What if you
>> add a prototype of some function here. Will it fit into a definition scope?
> 
> I can remove the comment, but I would say that if I put some function prototype here
> it should be related to arm64, being this file under arm64.
Sorry, I don't see why you mention arm64 here. It is under arm64 directory, so
it's clear. I was referring to the word "definition".

~Michal



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Date: Mon, 14 Apr 2025 16:03:49 +0100
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CC: , "Daniel P. Smith"
	, Jason Andryuk , "Xenia
 Ragiadakou" , Stefano Stabellini
	, Michal Orzel , Jan Beulich
	, Andrew Cooper ,
	=?utf-8?q?Roger_Pau_Monn=C3=A9?= 
Subject: Re: [PATCH v3 11/16] x86/hyperlaunch: locate dom0 initrd with
 hyperlaunch
From: Alejandro Vallejo 
To: Denis Mukhin 
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On Wed Apr 9, 2025 at 11:07 PM BST, Denis Mukhin wrote:
> On Tuesday, April 8th, 2025 at 9:07 AM, Alejandro Vallejo  wrote:
>
>>=20
>>=20
>> From: "Daniel P. Smith" dpsmith@apertussolutions.com
>>=20
>>=20
>> Look for a subnode of type `multiboot,ramdisk` within a domain node and
>> parse via the fdt_read_multiboot_module() helper. After a successful
>> helper call, the module index is returned and the module is guaranteed
>> to be in the module list.
>>=20
>> Fix unused typo in adjacent comment.
>>=20
>> Signed-off-by: Daniel P. Smith dpsmith@apertussolutions.com
>>=20
>> Signed-off-by: Jason Andryuk jason.andryuk@amd.com
>>=20
>> Signed-off-by: Alejandro Vallejo agarciav@amd.com
>>=20
>> ---
>> v3:
>> * Reworded commit message to state the helper postconditions.
>> * Wrapped long line
>> * Fix ramdisk -> module rename
>>=20
>> * Move ramdisk parsing from later patch
>> * Remove initrdidx indent
>> ---
>> xen/arch/x86/domain-builder/fdt.c | 29 +++++++++++++++++++++++++++++
>> xen/arch/x86/setup.c | 4 ++--
>> 2 files changed, 31 insertions(+), 2 deletions(-)
>>=20
>> diff --git a/xen/arch/x86/domain-builder/fdt.c b/xen/arch/x86/domain-bui=
lder/fdt.c
>> index bc9903a9de..0f5fd01557 100644
>> --- a/xen/arch/x86/domain-builder/fdt.c
>> +++ b/xen/arch/x86/domain-builder/fdt.c
>> @@ -195,6 +195,35 @@ static int __init process_domain_node(
>> !((char *)__va(bd->kernel->cmdline_pa))[0] )
>>=20
>> bd->kernel->fdt_cmdline =3D fdt_get_prop_offset(
>>=20
>> fdt, node, "bootargs", &bd->kernel->cmdline_pa);
>>=20
>> +
>> + continue;
>> + }
>> + else if ( fdt_node_check_compatible(fdt, node,
>> + "multiboot,ramdisk") =3D=3D 0 )
>> + {
>> + int idx;
>> +
>> + if ( bd->module )
>>=20
>> + {
>> + printk(XENLOG_ERR "Duplicate ramdisk module for domain %s)\n",
>
> I would start the message with lower case so it is consistent with the ot=
her one.

As mentioned before, this is due to how it's meant to be rendered. This
is a standalone message, hence the uppercase (consistent with the
duplicate kernel).

Will change the XENLOG_ERR into XENLOG_WARNING though.

>
>> + name);
>> + continue;
>> + }
>> +
>> + idx =3D fdt_read_multiboot_module(fdt, node, address_cells,
>> + size_cells,bi);
>> + if ( idx < 0 )
>> + {
>> + printk(" failed processing ramdisk module for domain %s\n",
>> + name);
>
> Prepend the log message with XENLOG_ERR ?

Indeed.

>
>> + return -EINVAL;
>> + }
>> +
>> + printk(" ramdisk: boot module %d\n", idx);
>> + bi->mods[idx].type =3D BOOTMOD_RAMDISK;
>>=20
>> + bd->module =3D &bi->mods[idx];
>>=20
>> +
>> + continue;
>> }
>> }
>>=20
>> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
>> index ca4415d020..3dfa81b48c 100644
>> --- a/xen/arch/x86/setup.c
>> +++ b/xen/arch/x86/setup.c
>> @@ -2149,11 +2149,11 @@ void asmlinkage __init noreturn __start_xen(void=
)
>> * At this point all capabilities that consume boot modules should have
>> * claimed their boot modules. Find the first unclaimed boot module and
>> * claim it as the initrd ramdisk. Do a second search to see if there are
>> - * any remaining unclaimed boot modules, and report them as unusued ini=
trd
>> + * any remaining unclaimed boot modules, and report them as unused init=
rd
>> * candidates.
>> */
>> initrdidx =3D first_boot_module_index(bi, BOOTMOD_UNKNOWN);
>> - if ( initrdidx < MAX_NR_BOOTMODS )
>> + if ( !bi->hyperlaunch_enabled && initrdidx < MAX_NR_BOOTMODS )
>>=20
>> {
>> bi->mods[initrdidx].type =3D BOOTMOD_RAMDISK;
>>=20
>> bi->domains[0].module =3D &bi->mods[initrdidx];
>>=20
>> --
>> 2.43.0

Cheers,
Alejandro


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Date: Mon, 14 Apr 2025 17:05:02 +0200
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Subject: Re: [PATCH v3 08/16] x86/hyperlaunch: Add helpers to locate multiboot
 modules
To: Alejandro Vallejo 
Cc: Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini ,
 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Julien Grall , Bertrand Marquis ,
 xen-devel@lists.xenproject.org,
 "consulting@bugseng.com" 
References: <20250408160802.49870-1-agarciav@amd.com>
 <20250408160802.49870-9-agarciav@amd.com>
 
 
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From: Jan Beulich 
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On 14.04.2025 15:37, Alejandro Vallejo wrote:
> On Thu Apr 10, 2025 at 11:42 AM BST, Jan Beulich wrote:
>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>> +/*
>>> + * Locate a multiboot module given its node offset in the FDT.
>>> + *
>>> + * The module location may be given via either FDT property:
>>> + *     * reg = 
>>> + *         * Mutates `bi` to append the module.
>>> + *     * module-index = 
>>> + *         * Leaves `bi` unchanged.
>>> + *
>>> + * @param fdt           Pointer to the full FDT.
>>> + * @param node          Offset for the module node.
>>> + * @param address_cells Number of 4-octet cells that make up an "address".
>>> + * @param size_cells    Number of 4-octet cells that make up a "size".
>>> + * @param bi[inout]     Xen's representation of the boot parameters.
>>> + * @return              -EINVAL on malformed nodes, otherwise
>>> + *                      index inside `bi->mods`
>>> + */
>>> +int __init fdt_read_multiboot_module(const void *fdt, int node,
>>> +                                     int address_cells, int size_cells,
>>> +                                     struct boot_info *bi)
>>
>> Functions without callers and non-static ones without declarations are
>> disliked by Misra.
> 
> Can't do much about it if I want them to stand alone in a single patch.
> Otherwise the following ones become quite unwieldy to look at. All I can
> say is that this function becomes static and with a caller on the next
> patch.

Which means you need to touch this again anyway. Perhaps we need a Misra
deviation for __maybe_unused functions / data, in which case you could
use that here and strip it along with making the function static. Cc-ing
Bugseng folks.

>>> +    /* Otherwise location given as a `reg` property. */
>>> +    prop = fdt_get_property(fdt, node, "reg", NULL);
>>> +
>>> +    if ( !prop )
>>> +    {
>>> +        printk("  No location for multiboot,module\n");
>>> +        return -EINVAL;
>>> +    }
>>> +    if ( fdt_get_property(fdt, node, "module-index", NULL) )
>>> +    {
>>> +        printk("  Location of multiboot,module defined multiple times\n");
>>> +        return -EINVAL;
>>> +    }
>>> +
>>> +    ret = read_fdt_prop_as_reg(prop, address_cells, size_cells, &addr, &size);
>>> +
>>> +    if ( ret < 0 )
>>> +    {
>>> +        printk("  Failed reading reg for multiboot,module\n");
>>> +        return -EINVAL;
>>> +    }
>>> +
>>> +    idx = bi->nr_modules + 1;
>>
>> This at least looks like an off-by-one. If the addition of 1 is really
>> intended, I think it needs commenting on.
> 
> Seems to be, yes. The underlying array is a bit bizarre. It's sizes as
> MAX_NR_BOOTMODS + 1, with the first one being the DTB itself. I guess
> the intent was to take it into account, but bi->nr_modules is
> initialised to the number of multiboot modules, so it SHOULD be already
> taking it into account.
> 
> Also, the logic for bounds checking seems... off (because of the + 1 I
> mentioned before). Or at least confusing, so I've moved to using
> ARRAY_SIZE(bi->mods) rather than explicitly comparing against
> MAX_NR_BOOTMODS.
> 
> The array is MAX_NR_BOOTMODS + 1 in length, so it's just more cognitive
> load than I'm comfortable with.

If I'm not mistaken the +1 is inherited from the modules array we had in
the past, where we wanted 1 extra slot for Xen itself. Hence before you
move to using ARRAY_SIZE() everywhere it needs to really be clear what
the +1 here is used for.

>>> --- a/xen/include/xen/libfdt/libfdt-xen.h
>>> +++ b/xen/include/xen/libfdt/libfdt-xen.h
>>> @@ -13,6 +13,63 @@kkk
>>>  
>>>  #include 
>>>  
>>> +static inline int __init fdt_cell_as_u32(const fdt32_t *cell)
>>
>> Why plain int here, but ...
>>
>>> +{
>>> +    return fdt32_to_cpu(*cell);
>>> +}
>>> +
>>> +static inline uint64_t  __init fdt_cell_as_u64(const fdt32_t *cell)
>>
>> ... a fixed-width and unsigned type here? Question is whether the former
>> helper is really warranted.
>>
>> Also nit: Stray double blank.
>>
>>> +{
>>> +    return ((uint64_t)fdt32_to_cpu(cell[0]) << 32) | fdt32_to_cpu(cell[1]);
>>
>> That is - uniformly big endian?
> 
> These helpers are disappearing, so it doesn't matter. This is basically
> an open coded:
> 
>   fdt64_to_cpu(*(const fdt64_t *)fdt32)
> 
> And, yes. DTBs are standardised as having big-endian properties, for
> better or worse :/
> 
>>
>>> +}
>>
>> Marking such relatively generic inline functions __init is also somewhat
>> risky. 
> 
> They were originally in domain-builder/fdt.c and moved here as a result
> of a request to have them on libfdt. libfdt proved to be somewhat
> annoying because it would be hard to distinguish accessors for the
> flattened and the unflattened tree.
> 
> I'd personally have them in domain-builder instead, where they are used.
> Should they be needed somewhere else, we can always fator them out
> somewhere else.
> 
> Thoughts?

As long as they're needed only by domain-builder, it's probably fine to have
them just there.

Jan


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Subject: Re: [PATCH v1 02/14] xen/riscv: introduce smp_clear_cpu_maps()
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: 
 
 <18277077-2cf0-466f-8bde-f7955806bcb2@suse.com>
Content-Language: en-US
From: Oleksii Kurochko 
In-Reply-To: <18277077-2cf0-466f-8bde-f7955806bcb2@suse.com>

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On 4/10/25 3:10 PM, Jan Beulich wrote:
> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>> Initialize cpu_{possible, online, present}_map by using smp_clear_cpu_maps().
>>
>> Drop DEFINE_PER_CPU(unsigned int, cpu_id) from stubs.c as this variable isn't
>> expected to be used in RISC-V at all.
>>
>> Move declaration of cpu_{possible,online,present}_map from stubs.c to smpboot.c
>> as now smpboot.c is now introduced.
>> Other defintions keep in stubs.c as they are not initialized and not needed, at
>> the moment.
>>
>> Signed-off-by: Oleksii Kurochko
>> ---
>>   xen/arch/riscv/Makefile          |  1 +
>>   xen/arch/riscv/include/asm/smp.h |  2 ++
>>   xen/arch/riscv/setup.c           |  2 ++
>>   xen/arch/riscv/smpboot.c         | 15 +++++++++++++++
>>   xen/arch/riscv/stubs.c           |  6 ------
>>   5 files changed, 20 insertions(+), 6 deletions(-)
>>   create mode 100644 xen/arch/riscv/smpboot.c
>>
>> diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile
>> index 0c6c4a38a3..f551bf32a2 100644
>> --- a/xen/arch/riscv/Makefile
>> +++ b/xen/arch/riscv/Makefile
>> @@ -10,6 +10,7 @@ obj-y += sbi.o
>>   obj-y += setup.o
>>   obj-y += shutdown.o
>>   obj-y += smp.o
>> +obj-y += smpboot.o
>>   obj-y += stubs.o
>>   obj-y += time.o
>>   obj-y += traps.o
>> diff --git a/xen/arch/riscv/include/asm/smp.h b/xen/arch/riscv/include/asm/smp.h
>> index 5e170b57b3..188c033718 100644
>> --- a/xen/arch/riscv/include/asm/smp.h
>> +++ b/xen/arch/riscv/include/asm/smp.h
>> @@ -26,6 +26,8 @@ static inline void set_cpuid_to_hartid(unsigned long cpuid,
>>   
>>   void setup_tp(unsigned int cpuid);
>>   
>> +void smp_clear_cpu_maps(void);
>> +
>>   #endif
>>   
>>   /*
>> diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c
>> index 4e416f6e44..7f68f3f5b7 100644
>> --- a/xen/arch/riscv/setup.c
>> +++ b/xen/arch/riscv/setup.c
>> @@ -72,6 +72,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id,
>>   
>>       remove_identity_mapping();
>>   
>> +    smp_clear_cpu_maps();
>> +
>>       set_processor_id(0);
>>   
>>       set_cpuid_to_hartid(0, bootcpu_id);
>> diff --git a/xen/arch/riscv/smpboot.c b/xen/arch/riscv/smpboot.c
>> new file mode 100644
>> index 0000000000..0f4dcc28e1
>> --- /dev/null
>> +++ b/xen/arch/riscv/smpboot.c
>> @@ -0,0 +1,15 @@
>> +#include 
>> +#include 
>> +
>> +cpumask_t cpu_online_map;
>> +cpumask_t cpu_present_map;
>> +cpumask_t cpu_possible_map;
> __read_mostly for all of them, perhaps (if CPU hotplug isn't expected to
> be supported) even __ro_after_init for the latter two?

We have been living without CPU hotplug support for a long time in the downstream
branch, but I can't say whether it is expected to be supported in the future or not.
To ensure we can add such an option later without changing the attributes of
cpu_online_map variable, I prefer to use|__read_mostly| here and __ro_after_init for
cpu_possible_map.

>
> As to cpu_possible_map - do you predict that you'll actually use it? Arm
> does (and instead has only a fake cpu_present_map), but on x86 we get away
> without.

I checked how it is used now in downstream latest branch and it isn't really used
only during initialization smp_clear_cpu_maps() and smp_prepare_cpus() so we can
skip it for RISC-V too.

>
>> +void __init smp_clear_cpu_maps(void)
>> +{
>> +    cpumask_clear(&cpu_possible_map);
>> +    cpumask_clear(&cpu_online_map);
> What's the point of these? All three maps start out fully zeroed.

It could be really dropped. I saw your patch for Arm, I'll align the current
patch with that changes.


>
>> +    cpumask_set_cpu(0, &cpu_possible_map);
>> +    cpumask_set_cpu(0, &cpu_online_map);
> These are contradicting the name of the function. The somewhat equivalent
> function we have on x86 is smp_prepare_boot_cpu().
>
>> +    cpumask_copy(&cpu_present_map, &cpu_possible_map);
> Another cpumask_set_cpu() is probably cheaper here then.

What do you mean by cheaper here?

~ Oleksii

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On 4/10/25 3:10 PM, Jan Beulich wrote:

    

    

      
On 08.04.2025 17:57, Oleksii Kurochko wrote:


      

        
Initialize cpu_{possible, online, present}_map by using smp_clear_cpu_maps().

Drop DEFINE_PER_CPU(unsigned int, cpu_id) from stubs.c as this variable isn't
expected to be used in RISC-V at all.

Move declaration of cpu_{possible,online,present}_map from stubs.c to smpboot.c
as now smpboot.c is now introduced.
Other defintions keep in stubs.c as they are not initialized and not needed, at
the moment.

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
 xen/arch/riscv/Makefile          |  1 +
 xen/arch/riscv/include/asm/smp.h |  2 ++
 xen/arch/riscv/setup.c           |  2 ++
 xen/arch/riscv/smpboot.c         | 15 +++++++++++++++
 xen/arch/riscv/stubs.c           |  6 ------
 5 files changed, 20 insertions(+), 6 deletions(-)
 create mode 100644 xen/arch/riscv/smpboot.c

diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile
index 0c6c4a38a3..f551bf32a2 100644
--- a/xen/arch/riscv/Makefile
+++ b/xen/arch/riscv/Makefile
@@ -10,6 +10,7 @@ obj-y += sbi.o
 obj-y += setup.o
 obj-y += shutdown.o
 obj-y += smp.o
+obj-y += smpboot.o
 obj-y += stubs.o
 obj-y += time.o
 obj-y += traps.o
diff --git a/xen/arch/riscv/include/asm/smp.h b/xen/arch/riscv/include/asm/smp.h
index 5e170b57b3..188c033718 100644
--- a/xen/arch/riscv/include/asm/smp.h
+++ b/xen/arch/riscv/include/asm/smp.h
@@ -26,6 +26,8 @@ static inline void set_cpuid_to_hartid(unsigned long cpuid,
 
 void setup_tp(unsigned int cpuid);
 
+void smp_clear_cpu_maps(void);
+
 #endif
 
 /*
diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c
index 4e416f6e44..7f68f3f5b7 100644
--- a/xen/arch/riscv/setup.c
+++ b/xen/arch/riscv/setup.c
@@ -72,6 +72,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id,
 
     remove_identity_mapping();
 
+    smp_clear_cpu_maps();
+
     set_processor_id(0);
 
     set_cpuid_to_hartid(0, bootcpu_id);
diff --git a/xen/arch/riscv/smpboot.c b/xen/arch/riscv/smpboot.c
new file mode 100644
index 0000000000..0f4dcc28e1
--- /dev/null
+++ b/xen/arch/riscv/smpboot.c
@@ -0,0 +1,15 @@
+#include <xen/cpumask.h>
+#include <xen/init.h>
+
+cpumask_t cpu_online_map;
+cpumask_t cpu_present_map;
+cpumask_t cpu_possible_map;


      

      
__read_mostly for all of them, perhaps (if CPU hotplug isn't expected to
be supported) even __ro_after_init for the latter two?

    

    
We have been living without CPU hotplug support for a long time in the downstream
branch, but I can't say whether it is expected to be supported in the future or not.
To ensure we can add such an option later without changing the attributes of
cpu_online_map variable, I prefer to use __read_mostly here and __ro_after_init for
cpu_possible_map.



    

      

As to cpu_possible_map - do you predict that you'll actually use it? Arm
does (and instead has only a fake cpu_present_map), but on x86 we get away
without.

    

    
I checked how it is used now in downstream latest branch and it isn't really used
only during initialization smp_clear_cpu_maps() and smp_prepare_cpus() so we can
skip it for RISC-V too.

    

      



      

        
+void __init smp_clear_cpu_maps(void)
+{
+    cpumask_clear(&cpu_possible_map);
+    cpumask_clear(&cpu_online_map);


      

      
What's the point of these? All three maps start out fully zeroed.

    

    
It could be really dropped. I saw your patch for Arm, I'll align the current
patch with that changes.


    


    

    

      



      

        
+    cpumask_set_cpu(0, &cpu_possible_map);
+    cpumask_set_cpu(0, &cpu_online_map);


      

      
These are contradicting the name of the function. The somewhat equivalent
function we have on x86 is smp_prepare_boot_cpu().



      

        
+    cpumask_copy(&cpu_present_map, &cpu_possible_map);


      

      
Another cpumask_set_cpu() is probably cheaper here then.

    

    
What do you mean by cheaper here?


    
~ Oleksii


  


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From: Luca Fancellu 
To: Julien Grall 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Bertrand Marquis
	, Michal Orzel , Volodymyr
 Babchuk 
Subject: Re: [PATCH v3 2/7] arm/mpu: Provide access to the MPU region from the
 C code
Thread-Topic: [PATCH v3 2/7] arm/mpu: Provide access to the MPU region from
 the C code
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Date: Mon, 14 Apr 2025 15:07:40 +0000
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References: <20250411145655.140667-1-luca.fancellu@arm.com>
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On 14.04.2025 16:23, Alejandro Vallejo wrote:
> On Thu Apr 10, 2025 at 12:12 PM BST, Jan Beulich wrote:
>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>> --- a/xen/arch/x86/domain-builder/fdt.c
>>> +++ b/xen/arch/x86/domain-builder/fdt.c
>>> @@ -189,6 +189,12 @@ static int __init process_domain_node(
>>>              printk("  kernel: boot module %d\n", idx);
>>>              bi->mods[idx].type = BOOTMOD_KERNEL;
>>>              bd->kernel = &bi->mods[idx];
>>> +
>>> +            /* If bootloader didn't set cmdline, see if FDT provides one. */
>>> +            if ( bd->kernel->cmdline_pa &&
>>> +                 !((char *)__va(bd->kernel->cmdline_pa))[0] )
>>> +                bd->kernel->fdt_cmdline = fdt_get_prop_offset(
>>> +                    fdt, node, "bootargs", &bd->kernel->cmdline_pa);
>>
>> Somewhat orthogonal question: Should there perhaps be a way for the boot loader
>> provided cmdline to go at the tail of the DT provided one?
> 
> That would preclude the bootloader fully overriding what's on the DT.
> One can always just copy the cmdline in the DT to the bootloader and
> adjust whatever is necessary there for testing. Adding append behaviour
> sounds more like a hindrance rather than helpful. To me at least.

Well. This is why I have been pushing for all options to also have a
"negative" form. This way you can override whatever specifically you
need to override, without re-typing the entire (perhaps long) cmdline
from DT.

Also, I didn't mean that to necessarily be the one-and-only behavior.

Jan


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Subject: Re: [PATCH v1 02/14] xen/riscv: introduce smp_clear_cpu_maps()
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On 14.04.2025 17:05, Oleksii Kurochko wrote:
> On 4/10/25 3:10 PM, Jan Beulich wrote:
>> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>>> +void __init smp_clear_cpu_maps(void)
>>> +{
>>> +    cpumask_clear(&cpu_possible_map);
>>> +    cpumask_clear(&cpu_online_map);
>> What's the point of these? All three maps start out fully zeroed.
> 
> It could be really dropped. I saw your patch for Arm, I'll align the current
> patch with that changes.
> 
>>> +    cpumask_set_cpu(0, &cpu_possible_map);
>>> +    cpumask_set_cpu(0, &cpu_online_map);
>> These are contradicting the name of the function. The somewhat equivalent
>> function we have on x86 is smp_prepare_boot_cpu().
>>
>>> +    cpumask_copy(&cpu_present_map, &cpu_possible_map);
>> Another cpumask_set_cpu() is probably cheaper here then.
> 
> What do you mean by cheaper here?

Less code to execute to achieve the same effect.

Jan


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From: Luca Fancellu 
To: Julien Grall 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Bertrand Marquis
	, Michal Orzel , Volodymyr
 Babchuk 
Subject: Re: [PATCH v3 7/7] arm/mpu: Implement setup_mpu for MPU system
Thread-Topic: [PATCH v3 7/7] arm/mpu: Implement setup_mpu for MPU system
Thread-Index: AQHbqvIOcqFIKG0Dnkidmosr/dM7hLOjFvuAgAAzsIA=
Date: Mon, 14 Apr 2025 15:17:36 +0000
Message-ID: <4771188E-B307-4452-A900-2ACACC1CE333@arm.com>
References: <20250411145655.140667-1-luca.fancellu@arm.com>
 <20250411145655.140667-8-luca.fancellu@arm.com>
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From: Luca Fancellu 
To: "Orzel, Michal" 
CC: "xen-devel@lists.xenproject.org" , Penny
 Zheng , Stefano Stabellini ,
	Julien Grall , Bertrand Marquis ,
	Volodymyr Babchuk , Wei Chen 
Subject: Re: [PATCH v3 1/7] arm/mpu: Introduce MPU memory region map structure
Thread-Topic: [PATCH v3 1/7] arm/mpu: Introduce MPU memory region map
 structure
Thread-Index: AQHbqvIQP3h8YyZqYkSDv4tGWZWI7LOi9uCAgABMVgCAAAL/gIAABWmA
Date: Mon, 14 Apr 2025 15:21:00 +0000
Message-ID: 
References: <20250411145655.140667-1-luca.fancellu@arm.com>
 <20250411145655.140667-2-luca.fancellu@arm.com>
 
 
 
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Subject: Re: [PATCH 3/5] x86/hvm: fix handling of accesses to partial r/o MMIO
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To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
Cc: Andrew Cooper , xen-devel@lists.xenproject.org
References: <20250411105411.22334-1-roger.pau@citrix.com>
 <20250411105411.22334-4-roger.pau@citrix.com>
 
 
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On 14.04.2025 15:53, Roger Pau Monné wrote:
> On Mon, Apr 14, 2025 at 08:33:44AM +0200, Jan Beulich wrote:
>> On 11.04.2025 12:54, Roger Pau Monne wrote:
>>> ---
>>>  xen/arch/x86/hvm/emulate.c             | 47 +-------------
>>>  xen/arch/x86/hvm/hvm.c                 | 89 +++++++++++++++++++++++---
>>
>> It's quite a bit of rather special code you add to this catch-all file. How
>> about introducing a small new one, e.g. mmio.c (to later maybe become home
>> to some further stuff)?
> 
> Yes, I didn't find any suitable place, I was also considering
> hvm/io.c or hvm/intercept.c, but none looked very good TBH.
> 
> The main benefit of placing it in hvm.c is that the functions can all
> be static and confined to hvm.c as it's only user.

I understand that. Still, if we went by that criteria, we'd best put all of
our code in a single file ;-)

>>> +static int cf_check subpage_mmio_write(
>>> +    struct vcpu *v, unsigned long addr, unsigned int len, unsigned long data)
>>> +{
>>> +    struct domain *d = v->domain;
>>> +    p2m_type_t t;
>>> +    mfn_t mfn = get_gfn_query(d, addr, &t);
>>> +
>>> +    if ( mfn_eq(mfn, INVALID_MFN) || t != p2m_mmio_direct )
>>> +    {
>>> +        put_gfn(d, addr);
>>> +        return X86EMUL_RETRY;
>>> +    }
>>> +
>>> +    subpage_mmio_write_emulate(mfn, PAGE_OFFSET(addr), data, len);
>>> +
>>> +    put_gfn(d, addr);
>>> +    return X86EMUL_OKAY;
>>> +}
>>
>> Unlike the read path this doesn't return RETRY when subpage_mmio_find_page()
>> fails (indicating something must have changed after "accept" said yes).
> 
> Yeah, I've noticed this, but didn't feel like modifying
> subpage_mmio_write_emulate() for this.  The list of partial r/o MMIO
> pages cannot change after system boot, so accept returning yes and not
> finding a page here would likely warrant an ASSERT_UNRECHABLE().
> 
> Would you like me to modify subpage_mmio_write_emulate to make it
> return an error code?

I'd be happy with the two paths being in sync in whichever way that's
achieved. The argument you give equally holds for the read path, after
all.

>>> @@ -1981,7 +2056,9 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned long gla,
>>>       */
>>>      if ( (p2mt == p2m_mmio_dm) ||
>>>           (npfec.write_access &&
>>> -          (p2m_is_discard_write(p2mt) || (p2mt == p2m_ioreq_server))) )
>>> +          (p2m_is_discard_write(p2mt) || (p2mt == p2m_ioreq_server) ||
>>> +           /* MMIO entries can be r/o if the target mfn is in mmio_ro_ranges. */
>>> +           (p2mt == p2m_mmio_direct))) )
>>>      {
>>>          if ( !handle_mmio_with_translation(gla, gfn, npfec) )
>>>              hvm_inject_hw_exception(X86_EXC_GP, 0);
>>
>> Aren't we handing too many things to handle_mmio_with_translation() this
>> way? At the very least you're losing ...
>>
>>> @@ -2033,14 +2110,6 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned long gla,
>>>          goto out_put_gfn;
>>>      }
>>>  
>>> -    if ( (p2mt == p2m_mmio_direct) && npfec.write_access && npfec.present &&
>>
>> ... the .present check.
> 
> Isn't the p2mt == p2m_mmio_direct check already ensuring the entry is
> present?  Otherwise it's type would be p2m_invalid or p2m_mmio_dm?

Yes (to the 1st question), it kind of is.

> It did seem to me the other checks in this function already assume
> that by having a valid type the entry is present.

Except for the code above, where we decided to play safe. AT the very least
if you drop such a check, please say a justifying word in the description.

>> I'm also concerned of e.g. VT-x'es APIC access MFN, which is
>> p2m_mmio_direct.
> 
> But that won't go into hvm_hap_nested_page_fault() when using
> cpu_has_vmx_virtualize_apic_accesses (and thus having an APIC page
> mapped as p2m_mmio_direct)?
> 
> It would instead be an EXIT_REASON_APIC_ACCESS vmexit which is handled
> differently?

All true as long as things work as expected (potentially including the guest
also behaving as expected). Also this was explicitly only an example I could
readily think of. I'm simply wary of handle_mmio_with_translation() now
getting things to handle it's not meant to ever see.

Jan


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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk ,
	Andrew Cooper ,
	Anthony PERARD ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v2 2/8] xen/common: dom0less: make some parts of Arm's CONFIG_DOM0LESS common
Date: Mon, 14 Apr 2025 17:56:35 +0200
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Move some parts of Arm's Dom0Less code to be reused by other architectures.
At the moment, RISC-V is going to reuse these parts.

Move dom0less-build.h from the Arm-specific directory to asm-generic
as these header is expected to be the same across acrhictectures with
some updates: add the following declaration of construct_domU(),
arch_xen_domctl_createdomain() and arch_create_domus() as there are
some parts which are still architecture-specific.

Introduce HAS_DOM0LESS to provide ability to enable generic Dom0less
code for an architecture.

Relocate the CONFIG_DOM0LESS configuration to the common with adding
"depends on HAS_DOM0LESS" to not break builds for architectures which
don't support CONFIG_DOM0LESS config, especically it would be useful
to not provide stubs for  construct_domU(), arch_xen_domctl_createdomain()
and arch_create_domus() in case of *-randconfig which may set
CONFIG_DOM0LESS=y.

Move is_dom0less_mode() function to the common code, as it depends on
boot modules that are already part of the common code.

Move create_domUs() function to the common code with some updates:
- Add function arch_xen_domctl_createdomain() as structure
  xen_domctl_createdomain may have some arch-spicific information and
  initialization.
- Add arch_create_domus() to cover parsing of arch-specific features,
  for example, SVE (Scalar Vector Extension ) exists only in Arm.

Signed-off-by: Oleksii Kurochko 
---
Changes in v2:
 - Convert 'depends on Arm' to 'depends on HAS_DOM0LESS' for
   CONFIG_DOM0LESS_BOOT.
 - Change 'default Arm' to 'default y' for CONFIG_DOM0LESS_BOOT as there is
   dependency on HAS_DOM0LESS.
 - Introduce HAS_DOM0LESS and enable it for Arm.
 - Update the commit message.
---
 xen/arch/arm/Kconfig                      |   9 +-
 xen/arch/arm/dom0less-build.c             | 270 ++++++----------------
 xen/arch/arm/include/asm/Makefile         |   1 +
 xen/arch/arm/include/asm/dom0less-build.h |  32 ---
 xen/common/Kconfig                        |  12 +
 xen/common/device-tree/Makefile           |   1 +
 xen/common/device-tree/dom0less-build.c   | 161 +++++++++++++
 xen/include/asm-generic/dom0less-build.h  |  40 ++++
 8 files changed, 287 insertions(+), 239 deletions(-)
 delete mode 100644 xen/arch/arm/include/asm/dom0less-build.h
 create mode 100644 xen/common/device-tree/dom0less-build.c
 create mode 100644 xen/include/asm-generic/dom0less-build.h

diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig
index 565f288331..060389c3c8 100644
--- a/xen/arch/arm/Kconfig
+++ b/xen/arch/arm/Kconfig
@@ -15,6 +15,7 @@ config ARM
 	select GENERIC_UART_INIT
 	select HAS_ALTERNATIVE if HAS_VMAP
 	select HAS_DEVICE_TREE
+	select HAS_DOM0LESS
 	select HAS_UBSAN
 
 config ARCH_DEFCONFIG
@@ -119,14 +120,6 @@ config GICV2
 	  Driver for the ARM Generic Interrupt Controller v2.
 	  If unsure, say Y
 
-config DOM0LESS_BOOT
-	bool "Dom0less boot support" if EXPERT
-	default y
-	help
-	  Dom0less boot support enables Xen to create and start domU guests during
-	  Xen boot without the need of a control domain (Dom0), which could be
-	  present anyway.
-
 config GICV3
 	bool "GICv3 driver"
 	depends on !NEW_VGIC
diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c
index bd15563750..7ec3f85795 100644
--- a/xen/arch/arm/dom0less-build.c
+++ b/xen/arch/arm/dom0less-build.c
@@ -20,38 +20,6 @@
 #include 
 #include 
 
-bool __init is_dom0less_mode(void)
-{
-    struct bootmodules *mods = &bootinfo.modules;
-    struct bootmodule *mod;
-    unsigned int i;
-    bool dom0found = false;
-    bool domUfound = false;
-
-    /* Look into the bootmodules */
-    for ( i = 0 ; i < mods->nr_mods ; i++ )
-    {
-        mod = &mods->module[i];
-        /* Find if dom0 and domU kernels are present */
-        if ( mod->kind == BOOTMOD_KERNEL )
-        {
-            if ( mod->domU == false )
-            {
-                dom0found = true;
-                break;
-            }
-            else
-                domUfound = true;
-        }
-    }
-
-    /*
-     * If there is no dom0 kernel but at least one domU, then we are in
-     * dom0less mode
-     */
-    return ( !dom0found && domUfound );
-}
-
 #ifdef CONFIG_VGICV2
 static int __init make_gicv2_domU_node(struct kernel_info *kinfo)
 {
@@ -869,8 +837,8 @@ static inline int domain_p2m_set_allocation(struct domain *d, uint64_t mem,
 }
 #endif /* CONFIG_ARCH_PAGING_MEMPOOL */
 
-static int __init construct_domU(struct domain *d,
-                                 const struct dt_device_node *node)
+int __init construct_domU(struct domain *d,
+                          const struct dt_device_node *node)
 {
     struct kernel_info kinfo = KERNEL_INFO_INIT;
     const char *dom0less_enhanced;
@@ -965,188 +933,92 @@ static int __init construct_domU(struct domain *d,
     return alloc_xenstore_params(&kinfo);
 }
 
-void __init create_domUs(void)
-{
-    struct dt_device_node *node;
-    const char *dom0less_iommu;
-    bool iommu = false;
-    const struct dt_device_node *cpupool_node,
-                                *chosen = dt_find_node_by_path("/chosen");
-    const char *llc_colors_str = NULL;
-
-    BUG_ON(chosen == NULL);
-    dt_for_each_child_node(chosen, node)
-    {
-        struct domain *d;
-        struct xen_domctl_createdomain d_cfg = {
-            .arch.gic_version = XEN_DOMCTL_CONFIG_GIC_NATIVE,
-            .flags = XEN_DOMCTL_CDF_hvm | XEN_DOMCTL_CDF_hap,
-            /*
-             * The default of 1023 should be sufficient for guests because
-             * on ARM we don't bind physical interrupts to event channels.
-             * The only use of the evtchn port is inter-domain communications.
-             * 1023 is also the default value used in libxl.
-             */
-            .max_evtchn_port = 1023,
-            .max_grant_frames = -1,
-            .max_maptrack_frames = -1,
-            .grant_opts = XEN_DOMCTL_GRANT_version(opt_gnttab_max_version),
-        };
-        unsigned int flags = 0U;
-        uint32_t val;
-        int rc;
-
-        if ( !dt_device_is_compatible(node, "xen,domain") )
-            continue;
-
-        if ( (max_init_domid + 1) >= DOMID_FIRST_RESERVED )
-            panic("No more domain IDs available\n");
-
-        if ( dt_find_property(node, "xen,static-mem", NULL) )
-        {
-            if ( llc_coloring_enabled )
-                panic("LLC coloring and static memory are incompatible\n");
-
-            flags |= CDF_staticmem;
-        }
-
-        if ( dt_property_read_bool(node, "direct-map") )
-        {
-            if ( !(flags & CDF_staticmem) )
-                panic("direct-map is not valid for domain %s without static allocation.\n",
-                      dt_node_name(node));
-
-            flags |= CDF_directmap;
-        }
 
-        if ( !dt_property_read_u32(node, "cpus", &d_cfg.max_vcpus) )
-            panic("Missing property 'cpus' for domain %s\n",
-                  dt_node_name(node));
-
-        if ( !dt_property_read_string(node, "passthrough", &dom0less_iommu) &&
-             !strcmp(dom0less_iommu, "enabled") )
-            iommu = true;
+struct xen_domctl_createdomain __init arch_xen_domctl_createdomain(void)
+{
+    struct xen_domctl_createdomain d_cfg = {
+        .arch.gic_version = XEN_DOMCTL_CONFIG_GIC_NATIVE,
+        .flags = XEN_DOMCTL_CDF_hvm | XEN_DOMCTL_CDF_hap,
+        /*
+            * The default of 1023 should be sufficient for guests because
+            * on ARM we don't bind physical interrupts to event channels.
+            * The only use of the evtchn port is inter-domain communications.
+            * 1023 is also the default value used in libxl.
+            */
+        .max_evtchn_port = 1023,
+        .max_grant_frames = -1,
+        .max_maptrack_frames = -1,
+        .grant_opts = XEN_DOMCTL_GRANT_version(opt_gnttab_max_version),
+    };
+
+    return d_cfg;
+}
 
-        if ( iommu_enabled &&
-             (iommu || dt_find_compatible_node(node, NULL,
-                                               "multiboot,device-tree")) )
-            d_cfg.flags |= XEN_DOMCTL_CDF_iommu;
+void __init arch_create_domus(struct dt_device_node *node,
+                       struct xen_domctl_createdomain *d_cfg,
+                       unsigned int flags)
+{
+    uint32_t val;
 
-        if ( !dt_property_read_u32(node, "nr_spis", &d_cfg.arch.nr_spis) )
-        {
-            int vpl011_virq = GUEST_VPL011_SPI;
-
-            d_cfg.arch.nr_spis = VGIC_DEF_NR_SPIS;
-
-            /*
-             * The VPL011 virq is GUEST_VPL011_SPI, unless direct-map is
-             * set, in which case it'll match the hardware.
-             *
-             * Since the domain is not yet created, we can't use
-             * d->arch.vpl011.irq. So the logic to find the vIRQ has to
-             * be hardcoded.
-             * The logic here shall be consistent with the one in
-             * domain_vpl011_init().
-             */
-            if ( flags & CDF_directmap )
-            {
-                vpl011_virq = serial_irq(SERHND_DTUART);
-                if ( vpl011_virq < 0 )
-                    panic("Error getting IRQ number for this serial port %d\n",
-                          SERHND_DTUART);
-            }
+    if ( !dt_property_read_u32(node, "nr_spis", &d_cfg->arch.nr_spis) )
+    {
+        int vpl011_virq = GUEST_VPL011_SPI;
 
-            /*
-             * vpl011 uses one emulated SPI. If vpl011 is requested, make
-             * sure that we allocate enough SPIs for it.
-             */
-            if ( dt_property_read_bool(node, "vpl011") )
-                d_cfg.arch.nr_spis = MAX(d_cfg.arch.nr_spis,
-                                         vpl011_virq - 32 + 1);
-        }
+        d_cfg->arch.nr_spis = VGIC_DEF_NR_SPIS;
 
-        /* Get the optional property domain-cpupool */
-        cpupool_node = dt_parse_phandle(node, "domain-cpupool", 0);
-        if ( cpupool_node )
+        /*
+         * The VPL011 virq is GUEST_VPL011_SPI, unless direct-map is
+         * set, in which case it'll match the hardware.
+         *
+         * Since the domain is not yet created, we can't use
+         * d->arch.vpl011.irq. So the logic to find the vIRQ has to
+         * be hardcoded.
+         * The logic here shall be consistent with the one in
+         * domain_vpl011_init().
+         */
+        if ( flags & CDF_directmap )
         {
-            int pool_id = btcpupools_get_domain_pool_id(cpupool_node);
-            if ( pool_id < 0 )
-                panic("Error getting cpupool id from domain-cpupool (%d)\n",
-                      pool_id);
-            d_cfg.cpupool_id = pool_id;
+            vpl011_virq = serial_irq(SERHND_DTUART);
+            if ( vpl011_virq < 0 )
+                panic("Error getting IRQ number for this serial port %d\n",
+                        SERHND_DTUART);
         }
 
-        if ( dt_property_read_u32(node, "max_grant_version", &val) )
-            d_cfg.grant_opts = XEN_DOMCTL_GRANT_version(val);
+        /*
+         * vpl011 uses one emulated SPI. If vpl011 is requested, make
+         * sure that we allocate enough SPIs for it.
+         */
+        if ( dt_property_read_bool(node, "vpl011") )
+            d_cfg->arch.nr_spis = MAX(d_cfg->arch.nr_spis,
+                                      vpl011_virq - 32 + 1);
+    }
 
-        if ( dt_property_read_u32(node, "max_grant_frames", &val) )
-        {
-            if ( val > INT32_MAX )
-                panic("max_grant_frames (%"PRIu32") overflow\n", val);
-            d_cfg.max_grant_frames = val;
-        }
+    if ( dt_get_property(node, "sve", &val) )
+    {
+#ifdef CONFIG_ARM64_SVE
+        unsigned int sve_vl_bits;
+        bool ret = false;
 
-        if ( dt_property_read_u32(node, "max_maptrack_frames", &val) )
+        if ( !val )
         {
-            if ( val > INT32_MAX )
-                panic("max_maptrack_frames (%"PRIu32") overflow\n", val);
-            d_cfg.max_maptrack_frames = val;
+            /* Property found with no value, means max HW VL supported */
+            ret = sve_domctl_vl_param(-1, &sve_vl_bits);
         }
-
-        if ( dt_get_property(node, "sve", &val) )
+        else
         {
-#ifdef CONFIG_ARM64_SVE
-            unsigned int sve_vl_bits;
-            bool ret = false;
-
-            if ( !val )
-            {
-                /* Property found with no value, means max HW VL supported */
-                ret = sve_domctl_vl_param(-1, &sve_vl_bits);
-            }
+            if ( dt_property_read_u32(node, "sve", &val) )
+                ret = sve_domctl_vl_param(val, &sve_vl_bits);
             else
-            {
-                if ( dt_property_read_u32(node, "sve", &val) )
-                    ret = sve_domctl_vl_param(val, &sve_vl_bits);
-                else
-                    panic("Error reading 'sve' property\n");
-            }
+                panic("Error reading 'sve' property\n");
+        }
 
-            if ( ret )
-                d_cfg.arch.sve_vl = sve_encode_vl(sve_vl_bits);
-            else
-                panic("SVE vector length error\n");
+        if ( ret )
+            d_cfg->arch.sve_vl = sve_encode_vl(sve_vl_bits);
+        else
+            panic("SVE vector length error\n");
 #else
-            panic("'sve' property found, but CONFIG_ARM64_SVE not selected\n");
+        panic("'sve' property found, but CONFIG_ARM64_SVE not selected\n");
 #endif
-        }
-
-        dt_property_read_string(node, "llc-colors", &llc_colors_str);
-        if ( !llc_coloring_enabled && llc_colors_str )
-            panic("'llc-colors' found, but LLC coloring is disabled\n");
-
-        /*
-         * The variable max_init_domid is initialized with zero, so here it's
-         * very important to use the pre-increment operator to call
-         * domain_create() with a domid > 0. (domid == 0 is reserved for Dom0)
-         */
-        d = domain_create(++max_init_domid, &d_cfg, flags);
-        if ( IS_ERR(d) )
-            panic("Error creating domain %s (rc = %ld)\n",
-                  dt_node_name(node), PTR_ERR(d));
-
-        if ( llc_coloring_enabled &&
-             (rc = domain_set_llc_colors_from_str(d, llc_colors_str)) )
-            panic("Error initializing LLC coloring for domain %s (rc = %d)\n",
-                  dt_node_name(node), rc);
-
-        d->is_console = true;
-        dt_device_set_used_by(node, d->domain_id);
-
-        rc = construct_domU(d, node);
-        if ( rc )
-            panic("Could not set up domain %s (rc = %d)\n",
-                  dt_node_name(node), rc);
     }
 }
 
diff --git a/xen/arch/arm/include/asm/Makefile b/xen/arch/arm/include/asm/Makefile
index 4a4036c951..831c914cce 100644
--- a/xen/arch/arm/include/asm/Makefile
+++ b/xen/arch/arm/include/asm/Makefile
@@ -1,6 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0-only
 generic-y += altp2m.h
 generic-y += device.h
+generic-y += dom0less-build.h
 generic-y += hardirq.h
 generic-y += iocap.h
 generic-y += paging.h
diff --git a/xen/arch/arm/include/asm/dom0less-build.h b/xen/arch/arm/include/asm/dom0less-build.h
deleted file mode 100644
index 5864944bda..0000000000
--- a/xen/arch/arm/include/asm/dom0less-build.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#ifndef __ASM_DOM0LESS_BUILD_H_
-#define __ASM_DOM0LESS_BUILD_H_
-
-#include 
-
-#ifdef CONFIG_DOM0LESS_BOOT
-
-void create_domUs(void);
-bool is_dom0less_mode(void);
-
-#else /* !CONFIG_DOM0LESS_BOOT */
-
-static inline void create_domUs(void) {}
-static inline bool is_dom0less_mode(void)
-{
-    return false;
-}
-
-#endif /* CONFIG_DOM0LESS_BOOT */
-
-#endif /* __ASM_DOM0LESS_BUILD_H_ */
-
-/*
- * Local variables:
- * mode: C
- * c-file-style: "BSD"
- * c-basic-offset: 4
- * indent-tabs-mode: nil
- * End:
- */
diff --git a/xen/common/Kconfig b/xen/common/Kconfig
index 06ae9751aa..2fd79aea5b 100644
--- a/xen/common/Kconfig
+++ b/xen/common/Kconfig
@@ -12,6 +12,15 @@ config CORE_PARKING
 	bool
 	depends on NR_CPUS > 1
 
+config DOM0LESS_BOOT
+	bool "Dom0less boot support" if EXPERT
+	depends on HAS_DOM0LESS
+	default y
+	help
+	  Dom0less boot support enables Xen to create and start domU guests during
+	  Xen boot without the need of a control domain (Dom0), which could be
+	  present anyway.
+
 config GRANT_TABLE
 	bool "Grant table support" if EXPERT
 	default y
@@ -73,6 +82,9 @@ config HAS_COMPAT
 config HAS_DEVICE_TREE
 	bool
 
+config HAS_DOM0LESS
+	bool
+
 config HAS_DIT # Data Independent Timing
 	bool
 
diff --git a/xen/common/device-tree/Makefile b/xen/common/device-tree/Makefile
index 7c549be38a..f3dafc9b81 100644
--- a/xen/common/device-tree/Makefile
+++ b/xen/common/device-tree/Makefile
@@ -1,5 +1,6 @@
 obj-y += bootfdt.init.o
 obj-y += bootinfo.init.o
 obj-y += device-tree.o
+obj-$(CONFIG_DOM0LESS_BOOT) += dom0less-build.o
 obj-$(CONFIG_OVERLAY_DTB) += dt-overlay.o
 obj-y += intc.o
diff --git a/xen/common/device-tree/dom0less-build.c b/xen/common/device-tree/dom0less-build.c
new file mode 100644
index 0000000000..19bfa5e005
--- /dev/null
+++ b/xen/common/device-tree/dom0less-build.c
@@ -0,0 +1,161 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include 
+#include 
+
+bool __init is_dom0less_mode(void)
+{
+    struct bootmodules *mods = &bootinfo.modules;
+    struct bootmodule *mod;
+    unsigned int i;
+    bool dom0found = false;
+    bool domUfound = false;
+
+    /* Look into the bootmodules */
+    for ( i = 0 ; i < mods->nr_mods ; i++ )
+    {
+        mod = &mods->module[i];
+        /* Find if dom0 and domU kernels are present */
+        if ( mod->kind == BOOTMOD_KERNEL )
+        {
+            if ( mod->domU == false )
+            {
+                dom0found = true;
+                break;
+            }
+            else
+                domUfound = true;
+        }
+    }
+
+    /*
+     * If there is no dom0 kernel but at least one domU, then we are in
+     * dom0less mode
+     */
+    return ( !dom0found && domUfound );
+}
+
+void __init create_domUs(void)
+{
+    struct dt_device_node *node;
+    const char *dom0less_iommu;
+    bool iommu = false;
+    const struct dt_device_node *cpupool_node,
+                                *chosen = dt_find_node_by_path("/chosen");
+    const char *llc_colors_str = NULL;
+
+    BUG_ON(chosen == NULL);
+    dt_for_each_child_node(chosen, node)
+    {
+        struct domain *d;
+        struct xen_domctl_createdomain d_cfg = arch_xen_domctl_createdomain();
+        unsigned int flags = 0U;
+        uint32_t val;
+        int rc;
+
+        if ( !dt_device_is_compatible(node, "xen,domain") )
+            continue;
+
+        if ( (max_init_domid + 1) >= DOMID_FIRST_RESERVED )
+            panic("No more domain IDs available\n");
+
+        if ( dt_find_property(node, "xen,static-mem", NULL) )
+        {
+            if ( llc_coloring_enabled )
+                panic("LLC coloring and static memory are incompatible\n");
+
+            flags |= CDF_staticmem;
+        }
+
+        if ( dt_property_read_bool(node, "direct-map") )
+        {
+            if ( !(flags & CDF_staticmem) )
+                panic("direct-map is not valid for domain %s without static allocation.\n",
+                      dt_node_name(node));
+
+            flags |= CDF_directmap;
+        }
+
+        if ( !dt_property_read_u32(node, "cpus", &d_cfg.max_vcpus) )
+            panic("Missing property 'cpus' for domain %s\n",
+                  dt_node_name(node));
+
+        if ( !dt_property_read_string(node, "passthrough", &dom0less_iommu) &&
+             !strcmp(dom0less_iommu, "enabled") )
+            iommu = true;
+
+        if ( iommu_enabled &&
+             (iommu || dt_find_compatible_node(node, NULL,
+                                               "multiboot,device-tree")) )
+            d_cfg.flags |= XEN_DOMCTL_CDF_iommu;
+
+        /* Get the optional property domain-cpupool */
+        cpupool_node = dt_parse_phandle(node, "domain-cpupool", 0);
+        if ( cpupool_node )
+        {
+            int pool_id = btcpupools_get_domain_pool_id(cpupool_node);
+            if ( pool_id < 0 )
+                panic("Error getting cpupool id from domain-cpupool (%d)\n",
+                      pool_id);
+            d_cfg.cpupool_id = pool_id;
+        }
+
+        if ( dt_property_read_u32(node, "max_grant_version", &val) )
+            d_cfg.grant_opts = XEN_DOMCTL_GRANT_version(val);
+
+        if ( dt_property_read_u32(node, "max_grant_frames", &val) )
+        {
+            if ( val > INT32_MAX )
+                panic("max_grant_frames (%"PRIu32") overflow\n", val);
+            d_cfg.max_grant_frames = val;
+        }
+
+        if ( dt_property_read_u32(node, "max_maptrack_frames", &val) )
+        {
+            if ( val > INT32_MAX )
+                panic("max_maptrack_frames (%"PRIu32") overflow\n", val);
+            d_cfg.max_maptrack_frames = val;
+        }
+
+        dt_property_read_string(node, "llc-colors", &llc_colors_str);
+        if ( !llc_coloring_enabled && llc_colors_str )
+            panic("'llc-colors' found, but LLC coloring is disabled\n");
+
+        arch_create_domus(node, &d_cfg, flags);
+
+        /*
+         * The variable max_init_domid is initialized with zero, so here it's
+         * very important to use the pre-increment operator to call
+         * domain_create() with a domid > 0. (domid == 0 is reserved for Dom0)
+         */
+        d = domain_create(++max_init_domid, &d_cfg, flags);
+        if ( IS_ERR(d) )
+            panic("Error creating domain %s (rc = %ld)\n",
+                  dt_node_name(node), PTR_ERR(d));
+
+        if ( llc_coloring_enabled &&
+             (rc = domain_set_llc_colors_from_str(d, llc_colors_str)) )
+            panic("Error initializing LLC coloring for domain %s (rc = %d)\n",
+                  dt_node_name(node), rc);
+
+        d->is_console = true;
+        dt_device_set_used_by(node, d->domain_id);
+
+        rc = construct_domU(d, node);
+        if ( rc )
+            panic("Could not set up domain %s (rc = %d)\n",
+                  dt_node_name(node), rc);
+    }
+}
diff --git a/xen/include/asm-generic/dom0less-build.h b/xen/include/asm-generic/dom0less-build.h
new file mode 100644
index 0000000000..a6985bc20a
--- /dev/null
+++ b/xen/include/asm-generic/dom0less-build.h
@@ -0,0 +1,40 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef __ASM_GENERIC_DOM0LESS_BUILD_H__
+#define __ASM_GENERIC_DOM0LESS_BUILD_H__
+
+#include 
+
+#ifdef CONFIG_DOM0LESS_BOOT
+
+#include 
+
+void create_domUs(void);
+bool is_dom0less_mode(void);
+
+int construct_domU(struct domain *d, const struct dt_device_node *node);
+
+struct xen_domctl_createdomain arch_xen_domctl_createdomain(void);
+void arch_create_domus(struct dt_device_node *node,
+                       struct xen_domctl_createdomain *d_cfg,
+                       unsigned int flags);
+
+#else /* !CONFIG_DOM0LESS_BOOT */
+
+static inline void create_domUs(void) {}
+static inline bool is_dom0less_mode(void)
+{
+    return false;
+}
+
+#endif /* CONFIG_DOM0LESS_BOOT */
+
+#endif /* __ASM_GENERIC_DOM0LESS_BUILD_H__ */
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
-- 
2.49.0



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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk ,
	Andrew Cooper ,
	Anthony PERARD ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v2 0/8] Move parts of Arm's Dom0less to common code
Date: Mon, 14 Apr 2025 17:56:33 +0200
Message-ID: 
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Some parts of Arm's Dom0less solution could be moved to common code as they are
not truly Arm-specific.

Most of the code is moved as is, with only minor changes introduced to provide
abstractions that hide Arm-specific details, while maintaining functional
equivalence with original Arm's code.

There are several open questions:
1. Probably, the introduced headers currently placed in asm-generic should
   instead reside in the xen/include folder.
2. Perhaps the introduced *.c files should always be placed elsewhere. They
   have been put in device-tree common as they somewhat depend on device tree
   functionality.
3. The u64 and u32 types are widely used in the code where device tree
   functionality is implemented because these types are used in device tree
   function arguments.
   Should this be reworked to use uint32_t and uint64_t instead? If so, will it
   also be necessary to change the type of variables passed to dt-related
   functions, or should the argument types of device tree functions be updated
   too? For example:
   ```
    u64 mem;
    ...
    rc = dt_property_read_u64(node, "memory", &mem);
   ```
   where dt_property_read_u64 is declared as:
     bool dt_property_read_u64(... , u64 *out_value);
4. Instead of providing init_intc_phandle() (see the patch: [1]), perhaps it
   would be better to add a for loop in domain_handle_dtb_bootmodule()?
   Something like:
   ```
    bool is_intc_phandle_inited = false;
    for ( unsigned int i = 0; i < ARRAY_SIZE(intc_names_array); i++ )
    {
        if ( dt_node_cmp(name, intc_names_array[i]) == 0 )
        {
            uint32_t phandle_intc = fdt_get_phandle(pfdt, node_next);

            if ( phandle_intc != 0 )
                kinfo->phandle_intc = phandle_intc;

            is_intc_phandle_inited = true;
            break;
        }
    }

    if ( is_intc_phandle_inited ) continue;
  ```

[1]] [PATCH v1 9/9] xen/common: dom0less: introduce common dom0less-build.c

---
Changes in v2:
- Update cover letter message.
- Rebase on top of the current staging.
- Drop patches:
   - asm-generic: move Arm's static-memory.h to asm-generic
   - asm-generic: move Arm's static-shmem.h to asm-generic
  as in the nearest future there is no real users of STATIC_MEMORY and
  STATIC_SHMEM.
- Add new cleanup patch:
  [PATCH v2 1/8] xen/arm: drop declaration of handle_device_interrupts()
- All other changes are patch specific. Please check them seprately for each
  patch
---

Oleksii Kurochko (8):
  xen/arm: drop declaration of handle_device_interrupts()
  xen/common: dom0less: make some parts of Arm's CONFIG_DOM0LESS common
  asm-generic: move parts of Arm's asm/kernel.h to common code
  arm/static-shmem.h: drop inclusion of asm/setup.h
  asm-generic: move some parts of Arm's domain_build.h to common
  xen/common: dom0less: introduce common kernel.c
  xen/common: dom0less: introduce common domain-build.c
  xen/common: dom0less: introduce common dom0less-build.c

 xen/arch/arm/Kconfig                      |  10 +-
 xen/arch/arm/acpi/domain_build.c          |   4 +-
 xen/arch/arm/dom0less-build.c             | 997 +++-------------------
 xen/arch/arm/domain_build.c               | 411 +--------
 xen/arch/arm/include/asm/Makefile         |   1 +
 xen/arch/arm/include/asm/dom0less-build.h |  32 -
 xen/arch/arm/include/asm/domain_build.h   |  31 +-
 xen/arch/arm/include/asm/kernel.h         | 126 +--
 xen/arch/arm/include/asm/static-memory.h  |   2 +-
 xen/arch/arm/include/asm/static-shmem.h   |   2 +-
 xen/arch/arm/kernel.c                     | 234 +----
 xen/arch/arm/static-memory.c              |   1 +
 xen/arch/arm/static-shmem.c               |   3 +-
 xen/common/Kconfig                        |  19 +
 xen/common/device-tree/Makefile           |   3 +
 xen/common/device-tree/dom0less-build.c   | 891 +++++++++++++++++++
 xen/common/device-tree/domain-build.c     | 404 +++++++++
 xen/common/device-tree/dt-overlay.c       |   4 +-
 xen/common/device-tree/kernel.c           | 242 ++++++
 xen/include/asm-generic/dom0less-build.h  |  82 ++
 xen/include/xen/fdt-domain-build.h        |  77 ++
 xen/include/xen/fdt-kernel.h              | 146 ++++
 22 files changed, 2013 insertions(+), 1709 deletions(-)
 delete mode 100644 xen/arch/arm/include/asm/dom0less-build.h
 create mode 100644 xen/common/device-tree/dom0less-build.c
 create mode 100644 xen/common/device-tree/domain-build.c
 create mode 100644 xen/common/device-tree/kernel.c
 create mode 100644 xen/include/asm-generic/dom0less-build.h
 create mode 100644 xen/include/xen/fdt-domain-build.h
 create mode 100644 xen/include/xen/fdt-kernel.h

-- 
2.49.0



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        Mon, 14 Apr 2025 08:56:47 -0700 (PDT)
From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk ,
	Andrew Cooper ,
	Anthony PERARD ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v2 3/8] asm-generic: move parts of Arm's asm/kernel.h to common code
Date: Mon, 14 Apr 2025 17:56:36 +0200
Message-ID: 
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Move the following parts to common with the following changes:
- struct kernel_info:
  - Create arch_kernel_info for arch specific kernel information.
    At the moment, it contains domain_type for Arm.
  - Rename vpl011 to vuart to have more generic name suitable for other archs.
  - s/phandle_gic/phandle_intc to have more generic name suitable for other
    archs.
  - Make text_offset of zimage structure available for RISCV_64.
- Wrap by `#ifdef KERNEL_INFO_SHM_MEM_INIT` definition of KERNEL_SHM_MEM_INIT
  and wrap by `#ifndef KERNEL_INFO_INIT` definition of KERNEL_INFO_INIT to have
  ability to override KERNEL_INFO_SHM_MEM_INIT for arch in case it doesn't
  want to use generic one.
- Move DOM0LESS_* macros to dom0less-build.h.
- Move all others parts of Arm's kernel.h to xen/fdt-kernel.h.

Because of the changes in struct kernel_info the correspondent parts of Arm's
code are updated.

As part of this patch the following clean up happens:
- Drop asm/setup.h from asm/kernel.h as nothing depends from it.
  Add inclusion of asm/setup.h for a code which uses device_tree_get_reg() to
  avoid compilation issues for CONFIG_STATIC_MEMORY and CONFIG_STATIC_SHM.
- Drop inclusion of asm/kernel.h everywhere except xen/fdt-kernel.h.

Signed-off-by: Oleksii Kurochko 
---
Changes in v2:
 - Introduce xen/fdt-kernel.h.
 - Move DOM0LESS_* macros to dom0less-build.h.
 - Move the rest in asm-generic/kernel.h to xen/fdt-kernel.h.
 - Drop inclusion of asm/kernel.h everywhere except xen/fdt-kernel.h.
 - Wrap by #if __has_include(....) the member of kernel_info structure:
     struct arch_kernel_info arch.
 - Update the commit message.
---
 xen/arch/arm/acpi/domain_build.c         |   2 +-
 xen/arch/arm/dom0less-build.c            |  29 ++---
 xen/arch/arm/domain_build.c              |  12 +-
 xen/arch/arm/include/asm/domain_build.h  |   2 +-
 xen/arch/arm/include/asm/kernel.h        | 126 +--------------------
 xen/arch/arm/include/asm/static-memory.h |   2 +-
 xen/arch/arm/include/asm/static-shmem.h  |   2 +-
 xen/arch/arm/kernel.c                    |  13 ++-
 xen/arch/arm/static-memory.c             |   1 +
 xen/arch/arm/static-shmem.c              |   1 +
 xen/common/device-tree/dt-overlay.c      |   2 +-
 xen/include/asm-generic/dom0less-build.h |  28 +++++
 xen/include/xen/fdt-kernel.h             | 133 +++++++++++++++++++++++
 13 files changed, 198 insertions(+), 155 deletions(-)
 create mode 100644 xen/include/xen/fdt-kernel.h

diff --git a/xen/arch/arm/acpi/domain_build.c b/xen/arch/arm/acpi/domain_build.c
index 2ce75543d0..f9ca8b47e5 100644
--- a/xen/arch/arm/acpi/domain_build.c
+++ b/xen/arch/arm/acpi/domain_build.c
@@ -10,6 +10,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -18,7 +19,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 
 /* Override macros from asm/page.h to make them work with mfn_t */
diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c
index 7ec3f85795..5810083951 100644
--- a/xen/arch/arm/dom0less-build.c
+++ b/xen/arch/arm/dom0less-build.c
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -60,11 +61,11 @@ static int __init make_gicv2_domU_node(struct kernel_info *kinfo)
     if (res)
         return res;
 
-    res = fdt_property_cell(fdt, "linux,phandle", kinfo->phandle_gic);
+    res = fdt_property_cell(fdt, "linux,phandle", kinfo->phandle_intc);
     if (res)
         return res;
 
-    res = fdt_property_cell(fdt, "phandle", kinfo->phandle_gic);
+    res = fdt_property_cell(fdt, "phandle", kinfo->phandle_intc);
     if (res)
         return res;
 
@@ -131,11 +132,11 @@ static int __init make_gicv3_domU_node(struct kernel_info *kinfo)
     if (res)
         return res;
 
-    res = fdt_property_cell(fdt, "linux,phandle", kinfo->phandle_gic);
+    res = fdt_property_cell(fdt, "linux,phandle", kinfo->phandle_intc);
     if (res)
         return res;
 
-    res = fdt_property_cell(fdt, "phandle", kinfo->phandle_gic);
+    res = fdt_property_cell(fdt, "phandle", kinfo->phandle_intc);
     if (res)
         return res;
 
@@ -196,7 +197,7 @@ static int __init make_vpl011_uart_node(struct kernel_info *kinfo)
         return res;
 
     res = fdt_property_cell(fdt, "interrupt-parent",
-                            kinfo->phandle_gic);
+                            kinfo->phandle_intc);
     if ( res )
         return res;
 
@@ -482,10 +483,10 @@ static int __init domain_handle_dtb_bootmodule(struct domain *d,
          */
         if ( dt_node_cmp(name, "gic") == 0 )
         {
-            uint32_t phandle_gic = fdt_get_phandle(pfdt, node_next);
+            uint32_t phandle_intc = fdt_get_phandle(pfdt, node_next);
 
-            if ( phandle_gic != 0 )
-                kinfo->phandle_gic = phandle_gic;
+            if ( phandle_intc != 0 )
+                kinfo->phandle_intc = phandle_intc;
             continue;
         }
 
@@ -528,7 +529,7 @@ static int __init prepare_dtb_domU(struct domain *d, struct kernel_info *kinfo)
     int addrcells, sizecells;
     int ret, fdt_size = DOMU_DTB_SIZE;
 
-    kinfo->phandle_gic = GUEST_PHANDLE_GIC;
+    kinfo->phandle_intc = GUEST_PHANDLE_GIC;
     kinfo->gnttab_start = GUEST_GNTTAB_BASE;
     kinfo->gnttab_size = GUEST_GNTTAB_SIZE;
 
@@ -590,7 +591,7 @@ static int __init prepare_dtb_domU(struct domain *d, struct kernel_info *kinfo)
     /*
      * domain_handle_dtb_bootmodule has to be called before the rest of
      * the device tree is generated because it depends on the value of
-     * the field phandle_gic.
+     * the field phandle_intc.
      */
     if ( kinfo->dtb_bootmodule )
     {
@@ -607,7 +608,7 @@ static int __init prepare_dtb_domU(struct domain *d, struct kernel_info *kinfo)
     if ( ret )
         goto err;
 
-    if ( kinfo->vpl011 )
+    if ( kinfo->vuart )
     {
         ret = -EINVAL;
 #ifdef CONFIG_SBSA_VUART_CONSOLE
@@ -860,7 +861,7 @@ int __init construct_domU(struct domain *d,
     printk("*** LOADING DOMU cpus=%u memory=%#"PRIx64"KB ***\n",
            d->max_vcpus, mem);
 
-    kinfo.vpl011 = dt_property_read_bool(node, "vpl011");
+    kinfo.vuart = dt_property_read_bool(node, "vpl011");
 
     rc = dt_property_read_string(node, "xen,enhanced", &dom0less_enhanced);
     if ( rc == -EILSEQ ||
@@ -895,7 +896,7 @@ int __init construct_domU(struct domain *d,
 
 #ifdef CONFIG_ARM_64
     /* type must be set before allocate memory */
-    d->arch.type = kinfo.type;
+    d->arch.type = kinfo.arch.type;
 #endif
     if ( !dt_find_property(node, "xen,static-mem", NULL) )
         allocate_memory(d, &kinfo);
@@ -913,7 +914,7 @@ int __init construct_domU(struct domain *d,
      * tree node in prepare_dtb_domU, so initialization on related variables
      * shall be done first.
      */
-    if ( kinfo.vpl011 )
+    if ( kinfo.vuart )
     {
         rc = domain_vpl011_init(d, NULL);
         if ( rc < 0 )
diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
index 634333cdde..a19914f836 100644
--- a/xen/arch/arm/domain_build.c
+++ b/xen/arch/arm/domain_build.c
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -20,7 +21,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -747,7 +747,7 @@ static int __init fdt_property_interrupts(const struct kernel_info *kinfo,
         return res;
 
     res = fdt_property_cell(kinfo->fdt, "interrupt-parent",
-                            kinfo->phandle_gic);
+                            kinfo->phandle_intc);
 
     return res;
 }
@@ -2026,7 +2026,7 @@ static int __init prepare_dtb_hwdom(struct domain *d, struct kernel_info *kinfo)
 
     ASSERT(dt_host && (dt_host->sibling == NULL));
 
-    kinfo->phandle_gic = dt_interrupt_controller->phandle;
+    kinfo->phandle_intc = dt_interrupt_controller->phandle;
     fdt = device_tree_flattened;
 
     new_size = fdt_totalsize(fdt) + DOM0_FDT_EXTRA_SIZE;
@@ -2196,13 +2196,13 @@ int __init construct_domain(struct domain *d, struct kernel_info *kinfo)
 
 #ifdef CONFIG_ARM_64
     /* if aarch32 mode is not supported at EL1 do not allow 32-bit domain */
-    if ( !(cpu_has_el1_32) && kinfo->type == DOMAIN_32BIT )
+    if ( !(cpu_has_el1_32) && kinfo->arch.type == DOMAIN_32BIT )
     {
         printk("Platform does not support 32-bit domain\n");
         return -EINVAL;
     }
 
-    if ( is_sve_domain(d) && (kinfo->type == DOMAIN_32BIT) )
+    if ( is_sve_domain(d) && (kinfo->arch.type == DOMAIN_32BIT) )
     {
         printk("SVE is not available for 32-bit domain\n");
         return -EINVAL;
@@ -2317,7 +2317,7 @@ int __init construct_hwdom(struct kernel_info *kinfo)
 
 #ifdef CONFIG_ARM_64
     /* type must be set before allocate_memory */
-    d->arch.type = kinfo->type;
+    d->arch.type = kinfo->arch.type;
 #endif
     find_gnttab_region(d, kinfo);
     if ( is_domain_direct_mapped(d) )
diff --git a/xen/arch/arm/include/asm/domain_build.h b/xen/arch/arm/include/asm/domain_build.h
index 38546de477..7136857ce4 100644
--- a/xen/arch/arm/include/asm/domain_build.h
+++ b/xen/arch/arm/include/asm/domain_build.h
@@ -1,8 +1,8 @@
 #ifndef __ASM_DOMAIN_BUILD_H__
 #define __ASM_DOMAIN_BUILD_H__
 
+#include 
 #include 
-#include 
 
 typedef __be32 gic_interrupt_t[3];
 typedef bool (*alloc_domheap_mem_cb)(struct domain *d, struct page_info *pg,
diff --git a/xen/arch/arm/include/asm/kernel.h b/xen/arch/arm/include/asm/kernel.h
index bdc96f4c18..cfeab792c7 100644
--- a/xen/arch/arm/include/asm/kernel.h
+++ b/xen/arch/arm/include/asm/kernel.h
@@ -6,137 +6,15 @@
 #ifndef __ARCH_ARM_KERNEL_H__
 #define __ARCH_ARM_KERNEL_H__
 
-#include 
 #include 
-#include 
 
-/*
- * List of possible features for dom0less domUs
- *
- * DOM0LESS_ENHANCED_NO_XS:  Notify the OS it is running on top of Xen. All the
- *                           default features (excluding Xenstore) will be
- *                           available. Note that an OS *must* not rely on the
- *                           availability of Xen features if this is not set.
- * DOM0LESS_XENSTORE:        Xenstore will be enabled for the VM. The
- *                           xenstore page allocation is done by Xen at
- *                           domain creation. This feature can't be
- *                           enabled without the DOM0LESS_ENHANCED_NO_XS.
- * DOM0LESS_XS_LEGACY        Xenstore will be enabled for the VM, the
- *                           xenstore page allocation will happen in
- *                           init-dom0less. This feature can't be enabled
- *                           without the DOM0LESS_ENHANCED_NO_XS.
- * DOM0LESS_ENHANCED:        Notify the OS it is running on top of Xen. All the
- *                           default features (including Xenstore) will be
- *                           available. Note that an OS *must* not rely on the
- *                           availability of Xen features if this is not set.
- * DOM0LESS_ENHANCED_LEGACY: Same as before, but using DOM0LESS_XS_LEGACY.
- */
-#define DOM0LESS_ENHANCED_NO_XS  BIT(0, U)
-#define DOM0LESS_XENSTORE        BIT(1, U)
-#define DOM0LESS_XS_LEGACY       BIT(2, U)
-#define DOM0LESS_ENHANCED_LEGACY (DOM0LESS_ENHANCED_NO_XS | DOM0LESS_XS_LEGACY)
-#define DOM0LESS_ENHANCED        (DOM0LESS_ENHANCED_NO_XS | DOM0LESS_XENSTORE)
-
-struct kernel_info {
+struct arch_kernel_info
+{
 #ifdef CONFIG_ARM_64
     enum domain_type type;
 #endif
-
-    struct domain *d;
-
-    void *fdt; /* flat device tree */
-    paddr_t unassigned_mem; /* RAM not (yet) assigned to a bank */
-    struct meminfo mem;
-#ifdef CONFIG_STATIC_SHM
-    struct shared_meminfo shm_mem;
-#endif
-
-    /* kernel entry point */
-    paddr_t entry;
-
-    /* grant table region */
-    paddr_t gnttab_start;
-    paddr_t gnttab_size;
-
-    /* boot blob load addresses */
-    const struct bootmodule *kernel_bootmodule, *initrd_bootmodule, *dtb_bootmodule;
-    const char* cmdline;
-    paddr_t dtb_paddr;
-    paddr_t initrd_paddr;
-
-    /* Enable pl011 emulation */
-    bool vpl011;
-
-    /* Enable/Disable PV drivers interfaces */
-    uint16_t dom0less_feature;
-
-    /* GIC phandle */
-    uint32_t phandle_gic;
-
-    /* loader to use for this kernel */
-    void (*load)(struct kernel_info *info);
-    /* loader specific state */
-    union {
-        struct {
-            paddr_t kernel_addr;
-            paddr_t len;
-#ifdef CONFIG_ARM_64
-            paddr_t text_offset; /* 64-bit Image only */
-#endif
-            paddr_t start; /* Must be 0 for 64-bit Image */
-        } zimage;
-    };
 };
 
-static inline struct membanks *kernel_info_get_mem(struct kernel_info *kinfo)
-{
-    return container_of(&kinfo->mem.common, struct membanks, common);
-}
-
-static inline const struct membanks *
-kernel_info_get_mem_const(const struct kernel_info *kinfo)
-{
-    return container_of(&kinfo->mem.common, const struct membanks, common);
-}
-
-#ifdef CONFIG_STATIC_SHM
-#define KERNEL_INFO_SHM_MEM_INIT                \
-    .shm_mem.common.max_banks = NR_SHMEM_BANKS, \
-    .shm_mem.common.type = STATIC_SHARED_MEMORY,
-#else
-#define KERNEL_INFO_SHM_MEM_INIT
-#endif
-
-#define KERNEL_INFO_INIT                        \
-{                                               \
-    .mem.common.max_banks = NR_MEM_BANKS,       \
-    .mem.common.type = MEMORY,                  \
-    KERNEL_INFO_SHM_MEM_INIT                    \
-}
-
-/*
- * Probe the kernel to detemine its type and select a loader.
- *
- * Sets in info:
- *  ->type
- *  ->load hook, and sets loader specific variables ->zimage
- */
-int kernel_probe(struct kernel_info *info, const struct dt_device_node *domain);
-
-/*
- * Loads the kernel into guest RAM.
- *
- * Expects to be set in info when called:
- *  ->mem
- *  ->fdt
- *
- * Sets in info:
- *  ->entry
- *  ->dtb_paddr
- *  ->initrd_paddr
- */
-void kernel_load(struct kernel_info *info);
-
 #endif /* #ifdef __ARCH_ARM_KERNEL_H__ */
 
 /*
diff --git a/xen/arch/arm/include/asm/static-memory.h b/xen/arch/arm/include/asm/static-memory.h
index 804166e541..a32a3c6553 100644
--- a/xen/arch/arm/include/asm/static-memory.h
+++ b/xen/arch/arm/include/asm/static-memory.h
@@ -3,8 +3,8 @@
 #ifndef __ASM_STATIC_MEMORY_H_
 #define __ASM_STATIC_MEMORY_H_
 
+#include 
 #include 
-#include 
 
 #ifdef CONFIG_STATIC_MEMORY
 
diff --git a/xen/arch/arm/include/asm/static-shmem.h b/xen/arch/arm/include/asm/static-shmem.h
index 94eaa9d500..a4f853805a 100644
--- a/xen/arch/arm/include/asm/static-shmem.h
+++ b/xen/arch/arm/include/asm/static-shmem.h
@@ -3,8 +3,8 @@
 #ifndef __ASM_STATIC_SHMEM_H_
 #define __ASM_STATIC_SHMEM_H_
 
+#include 
 #include 
-#include 
 #include 
 
 #ifdef CONFIG_STATIC_SHM
diff --git a/xen/arch/arm/kernel.c b/xen/arch/arm/kernel.c
index 6eaf9e2b06..5482cf4239 100644
--- a/xen/arch/arm/kernel.c
+++ b/xen/arch/arm/kernel.c
@@ -6,6 +6,7 @@
  */
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -16,7 +17,7 @@
 #include 
 
 #include 
-#include 
+#include 
 #include 
 
 #define UIMAGE_MAGIC          0x27051956
@@ -101,7 +102,7 @@ static paddr_t __init kernel_zimage_place(struct kernel_info *info)
     paddr_t load_addr;
 
 #ifdef CONFIG_ARM_64
-    if ( (info->type == DOMAIN_64BIT) && (info->zimage.start == 0) )
+    if ( (info->arch.type == DOMAIN_64BIT) && (info->zimage.start == 0) )
         return mem->bank[0].start + info->zimage.text_offset;
 #endif
 
@@ -371,10 +372,10 @@ static int __init kernel_uimage_probe(struct kernel_info *info,
     switch ( uimage.arch )
     {
     case IH_ARCH_ARM:
-        info->type = DOMAIN_32BIT;
+        info->arch.type = DOMAIN_32BIT;
         break;
     case IH_ARCH_ARM64:
-        info->type = DOMAIN_64BIT;
+        info->arch.type = DOMAIN_64BIT;
         break;
     default:
         printk(XENLOG_ERR "Unsupported uImage arch type %d\n", uimage.arch);
@@ -444,7 +445,7 @@ static int __init kernel_zimage64_probe(struct kernel_info *info,
 
     info->load = kernel_zimage_load;
 
-    info->type = DOMAIN_64BIT;
+    info->arch.type = DOMAIN_64BIT;
 
     return 0;
 }
@@ -496,7 +497,7 @@ static int __init kernel_zimage32_probe(struct kernel_info *info,
     info->load = kernel_zimage_load;
 
 #ifdef CONFIG_ARM_64
-    info->type = DOMAIN_32BIT;
+    info->arch.type = DOMAIN_32BIT;
 #endif
 
     return 0;
diff --git a/xen/arch/arm/static-memory.c b/xen/arch/arm/static-memory.c
index d4585c5a06..e0f76afcd8 100644
--- a/xen/arch/arm/static-memory.c
+++ b/xen/arch/arm/static-memory.c
@@ -2,6 +2,7 @@
 
 #include 
 
+#include 
 #include 
 
 static bool __init append_static_memory_to_bank(struct domain *d,
diff --git a/xen/arch/arm/static-shmem.c b/xen/arch/arm/static-shmem.c
index e8d4ca3ba3..14ae48fb1e 100644
--- a/xen/arch/arm/static-shmem.c
+++ b/xen/arch/arm/static-shmem.c
@@ -6,6 +6,7 @@
 #include 
 
 #include 
+#include 
 #include 
 #include 
 
diff --git a/xen/common/device-tree/dt-overlay.c b/xen/common/device-tree/dt-overlay.c
index 97fb99eaaa..81107cb48d 100644
--- a/xen/common/device-tree/dt-overlay.c
+++ b/xen/common/device-tree/dt-overlay.c
@@ -6,8 +6,8 @@
  * Written by Vikram Garhwal 
  *
  */
-#include 
 #include 
+#include 
 #include 
 #include 
 #include 
diff --git a/xen/include/asm-generic/dom0less-build.h b/xen/include/asm-generic/dom0less-build.h
index a6985bc20a..7092f7fc7e 100644
--- a/xen/include/asm-generic/dom0less-build.h
+++ b/xen/include/asm-generic/dom0less-build.h
@@ -8,6 +8,34 @@
 
 #include 
 
+/*
+ * List of possible features for dom0less domUs
+ *
+ * DOM0LESS_ENHANCED_NO_XS:  Notify the OS it is running on top of Xen. All the
+ *                           default features (excluding Xenstore) will be
+ *                           available. Note that an OS *must* not rely on the
+ *                           availability of Xen features if this is not set.
+ * DOM0LESS_XENSTORE:        Xenstore will be enabled for the VM. The
+ *                           xenstore page allocation is done by Xen at
+ *                           domain creation. This feature can't be
+ *                           enabled without the DOM0LESS_ENHANCED_NO_XS.
+ * DOM0LESS_XS_LEGACY        Xenstore will be enabled for the VM, the
+ *                           xenstore page allocation will happen in
+ *                           init-dom0less. This feature can't be enabled
+ *                           without the DOM0LESS_ENHANCED_NO_XS.
+ * DOM0LESS_ENHANCED:        Notify the OS it is running on top of Xen. All the
+ *                           default features (including Xenstore) will be
+ *                           available. Note that an OS *must* not rely on the
+ *                           availability of Xen features if this is not set.
+ * DOM0LESS_ENHANCED_LEGACY: Same as before, but using DOM0LESS_XS_LEGACY.
+
+ */
+#define DOM0LESS_ENHANCED_NO_XS  BIT(0, U)
+#define DOM0LESS_XENSTORE        BIT(1, U)
+#define DOM0LESS_XS_LEGACY       BIT(2, U)
+#define DOM0LESS_ENHANCED_LEGACY (DOM0LESS_ENHANCED_NO_XS | DOM0LESS_XS_LEGACY)
+#define DOM0LESS_ENHANCED        (DOM0LESS_ENHANCED_NO_XS | DOM0LESS_XENSTORE)
+
 void create_domUs(void);
 bool is_dom0less_mode(void);
 
diff --git a/xen/include/xen/fdt-kernel.h b/xen/include/xen/fdt-kernel.h
new file mode 100644
index 0000000000..c81e759423
--- /dev/null
+++ b/xen/include/xen/fdt-kernel.h
@@ -0,0 +1,133 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * For Kernel image loading.
+ *
+ * Copyright (C) 2011 Citrix Systems, Inc.
+ */
+#ifndef __XEN_FDT_KERNEL_H__
+#define __XEN_FDT_KERNEL_H__
+
+#include 
+#include 
+#include 
+
+#if __has_include()
+#   include 
+#endif
+
+struct kernel_info {
+    struct domain *d;
+
+    void *fdt; /* flat device tree */
+    paddr_t unassigned_mem; /* RAM not (yet) assigned to a bank */
+    struct meminfo mem;
+#ifdef CONFIG_STATIC_SHM
+    struct shared_meminfo shm_mem;
+#endif
+
+    /* kernel entry point */
+    paddr_t entry;
+
+    /* grant table region */
+    paddr_t gnttab_start;
+    paddr_t gnttab_size;
+
+    /* boot blob load addresses */
+    const struct bootmodule *kernel_bootmodule, *initrd_bootmodule, *dtb_bootmodule;
+    const char* cmdline;
+    paddr_t dtb_paddr;
+    paddr_t initrd_paddr;
+
+    /* Enable uart emulation */
+    bool vuart;
+
+    /* Enable/Disable PV drivers interfaces */
+    uint16_t dom0less_feature;
+
+    /* Interrupt controller phandle */
+    uint32_t phandle_intc;
+
+    /* loader to use for this kernel */
+    void (*load)(struct kernel_info *info);
+
+    /* loader specific state */
+    union {
+        struct {
+            paddr_t kernel_addr;
+            paddr_t len;
+#if defined(CONFIG_ARM_64) || defined(CONFIG_RISCV_64)
+            paddr_t text_offset; /* 64-bit Image only */
+#endif
+            paddr_t start; /* Must be 0 for 64-bit Image */
+        } zimage;
+    };
+
+#if __has_include()
+    struct arch_kernel_info arch;
+#endif
+};
+
+static inline struct membanks *kernel_info_get_mem(struct kernel_info *kinfo)
+{
+    return container_of(&kinfo->mem.common, struct membanks, common);
+}
+
+static inline const struct membanks *
+kernel_info_get_mem_const(const struct kernel_info *kinfo)
+{
+    return container_of(&kinfo->mem.common, const struct membanks, common);
+}
+
+#ifndef KERNEL_INFO_SHM_MEM_INIT
+
+#ifdef CONFIG_STATIC_SHM
+#define KERNEL_INFO_SHM_MEM_INIT .shm_mem.common.max_banks = NR_SHMEM_BANKS,
+#else
+#define KERNEL_INFO_SHM_MEM_INIT
+#endif
+
+#endif /* KERNEL_INFO_SHM_MEM_INIT */
+
+#ifndef KERNEL_INFO_INIT
+
+#define KERNEL_INFO_INIT                        \
+{                                               \
+    .mem.common.max_banks = NR_MEM_BANKS,       \
+    KERNEL_INFO_SHM_MEM_INIT                    \
+}
+
+#endif /* KERNEL_INFO_INIT */
+
+/*
+ * Probe the kernel to detemine its type and select a loader.
+ *
+ * Sets in info:
+ *  ->type
+ *  ->load hook, and sets loader specific variables ->zimage
+ */
+int kernel_probe(struct kernel_info *info, const struct dt_device_node *domain);
+
+/*
+ * Loads the kernel into guest RAM.
+ *
+ * Expects to be set in info when called:
+ *  ->mem
+ *  ->fdt
+ *
+ * Sets in info:
+ *  ->entry
+ *  ->dtb_paddr
+ *  ->initrd_paddr
+ */
+void kernel_load(struct kernel_info *info);
+
+#endif /* __XEN_FDT_KERNEL_H__ */
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
-- 
2.49.0



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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk 
Subject: [PATCH v2 1/8] xen/arm: drop declaration of handle_device_interrupts()
Date: Mon, 14 Apr 2025 17:56:34 +0200
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There is no any users of handle_device_interrupts() thereby it
could be dropped.

Signed-off-by: Oleksii Kurochko 
---
Changes in V2:
- New patch.
---
 xen/arch/arm/include/asm/domain_build.h | 11 -----------
 1 file changed, 11 deletions(-)

diff --git a/xen/arch/arm/include/asm/domain_build.h b/xen/arch/arm/include/asm/domain_build.h
index 134290853c..38546de477 100644
--- a/xen/arch/arm/include/asm/domain_build.h
+++ b/xen/arch/arm/include/asm/domain_build.h
@@ -27,17 +27,6 @@ void evtchn_allocate(struct domain *d);
 
 unsigned int get_allocation_size(paddr_t size);
 
-/*
- * handle_device_interrupts retrieves the interrupts configuration from
- * a device tree node and maps those interrupts to the target domain.
- *
- * Returns:
- *   < 0 error
- *   0   success
- */
-int handle_device_interrupts(struct domain *d, struct dt_device_node *dev,
-                             bool need_mapping);
-
 /*
  * Helper to write an interrupts with the GIC format
  * This code is assuming the irq is an PPI.
-- 
2.49.0



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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk 
Subject: [PATCH v2 4/8] arm/static-shmem.h: drop inclusion of asm/setup.h
Date: Mon, 14 Apr 2025 17:56:37 +0200
Message-ID: <96e1f798ff19bcee73e613ae9b74056cc37eb5c3.1744626032.git.oleksii.kurochko@gmail.com>
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Nothing is dependent from asm/setup.h in asm/static-shmem.h so inclusion of
asm/setup.h is droped.

After this drop the following compilation error related to impicit declaration
of the following functions device_tree_get_reg and map_device_irqs_to_domain,
device_tree_get_u32 occur during compilation of dom0less-build.c ( as they are
declared in asm/setup.h ).

Add inclusion of  in dt-overlay.c as it is using handle_device()
declared in .

Signed-off-by: Oleksii Kurochko 
---
Changes in V2:
 - Nothing changed. Only rebase.
---
 xen/arch/arm/dom0less-build.c       | 1 +
 xen/common/device-tree/dt-overlay.c | 2 ++
 2 files changed, 3 insertions(+)

diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c
index 5810083951..122739061c 100644
--- a/xen/arch/arm/dom0less-build.c
+++ b/xen/arch/arm/dom0less-build.c
@@ -18,6 +18,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
diff --git a/xen/common/device-tree/dt-overlay.c b/xen/common/device-tree/dt-overlay.c
index 81107cb48d..d184186c01 100644
--- a/xen/common/device-tree/dt-overlay.c
+++ b/xen/common/device-tree/dt-overlay.c
@@ -13,6 +13,8 @@
 #include 
 #include 
 
+#include 
+
 #define DT_OVERLAY_MAX_SIZE KB(500)
 
 static LIST_HEAD(overlay_tracker);
-- 
2.49.0



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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk ,
	Andrew Cooper ,
	Anthony PERARD ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v2 5/8] asm-generic: move some parts of Arm's domain_build.h to common
Date: Mon, 14 Apr 2025 17:56:38 +0200
Message-ID: <1c67078147c4a89e46f253f040bef5046fac9ca9.1744626032.git.oleksii.kurochko@gmail.com>
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Nothing changed. Only some functions declaration are moved to xen/include/
headers as they are expected to be used by common code of domain builing
or dom0less.

Signed-off-by: Oleksii Kurochko 
---
 Chnages in v2:
  - Add missed declaration of construct_hwdom().
  - Drop unnessary blank line.
  - Introduce xen/fdt-domain-build.h and move parts of Arm's domain_build.h to
    it.
  - Update the commit message.
---
 xen/arch/arm/acpi/domain_build.c        |  2 +-
 xen/arch/arm/dom0less-build.c           |  2 +-
 xen/arch/arm/domain_build.c             |  2 +-
 xen/arch/arm/include/asm/domain_build.h | 18 +---------
 xen/arch/arm/kernel.c                   |  2 +-
 xen/arch/arm/static-shmem.c             |  2 +-
 xen/include/xen/fdt-domain-build.h      | 46 +++++++++++++++++++++++++
 7 files changed, 52 insertions(+), 22 deletions(-)
 create mode 100644 xen/include/xen/fdt-domain-build.h

diff --git a/xen/arch/arm/acpi/domain_build.c b/xen/arch/arm/acpi/domain_build.c
index f9ca8b47e5..2b0768b7d5 100644
--- a/xen/arch/arm/acpi/domain_build.c
+++ b/xen/arch/arm/acpi/domain_build.c
@@ -10,6 +10,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -19,7 +20,6 @@
 #include 
 #include 
 #include 
-#include 
 
 /* Override macros from asm/page.h to make them work with mfn_t */
 #undef virt_to_mfn
diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c
index 122739061c..ca78cff655 100644
--- a/xen/arch/arm/dom0less-build.c
+++ b/xen/arch/arm/dom0less-build.c
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -17,7 +18,6 @@
 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
index a19914f836..75f048f58c 100644
--- a/xen/arch/arm/domain_build.c
+++ b/xen/arch/arm/domain_build.c
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -30,7 +31,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 
diff --git a/xen/arch/arm/include/asm/domain_build.h b/xen/arch/arm/include/asm/domain_build.h
index 7136857ce4..5f9b063be1 100644
--- a/xen/arch/arm/include/asm/domain_build.h
+++ b/xen/arch/arm/include/asm/domain_build.h
@@ -5,27 +5,11 @@
 #include 
 
 typedef __be32 gic_interrupt_t[3];
-typedef bool (*alloc_domheap_mem_cb)(struct domain *d, struct page_info *pg,
-                                     unsigned int order, void *extra);
-bool allocate_domheap_memory(struct domain *d, paddr_t tot_size,
-                             alloc_domheap_mem_cb cb, void *extra);
-bool allocate_bank_memory(struct kernel_info *kinfo, gfn_t sgfn,
-                          paddr_t tot_size);
-void allocate_memory(struct domain *d, struct kernel_info *kinfo);
-int construct_domain(struct domain *d, struct kernel_info *kinfo);
-int construct_hwdom(struct kernel_info *kinfo);
 int domain_fdt_begin_node(void *fdt, const char *name, uint64_t unit);
-int make_chosen_node(const struct kernel_info *kinfo);
-int make_cpus_node(const struct domain *d, void *fdt);
-int make_hypervisor_node(struct domain *d, const struct kernel_info *kinfo,
-                         int addrcells, int sizecells);
-int make_memory_node(const struct kernel_info *kinfo, int addrcells,
-                     int sizecells, const struct membanks *mem);
 int make_psci_node(void *fdt);
-int make_timer_node(const struct kernel_info *kinfo);
 void evtchn_allocate(struct domain *d);
 
-unsigned int get_allocation_size(paddr_t size);
+int construct_hwdom(struct kernel_info *kinfo);
 
 /*
  * Helper to write an interrupts with the GIC format
diff --git a/xen/arch/arm/kernel.c b/xen/arch/arm/kernel.c
index 5482cf4239..164f417e75 100644
--- a/xen/arch/arm/kernel.c
+++ b/xen/arch/arm/kernel.c
@@ -6,6 +6,7 @@
  */
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -17,7 +18,6 @@
 #include 
 
 #include 
-#include 
 #include 
 
 #define UIMAGE_MAGIC          0x27051956
diff --git a/xen/arch/arm/static-shmem.c b/xen/arch/arm/static-shmem.c
index 14ae48fb1e..07ebd8b41f 100644
--- a/xen/arch/arm/static-shmem.c
+++ b/xen/arch/arm/static-shmem.c
@@ -1,11 +1,11 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include 
+#include 
 #include 
 #include 
 #include 
 
-#include 
 #include 
 #include 
 #include 
diff --git a/xen/include/xen/fdt-domain-build.h b/xen/include/xen/fdt-domain-build.h
new file mode 100644
index 0000000000..41454e75ca
--- /dev/null
+++ b/xen/include/xen/fdt-domain-build.h
@@ -0,0 +1,46 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef __XEN_FDT_DOMAIN_BUILD_H__
+#define __XEN_FDT_DOMAIN_BUILD_H__
+
+#include 
+#include 
+#include 
+#include 
+
+#if __has_include()
+#   include 
+#endif
+
+struct domain;
+struct page_info;
+struct membanks;
+
+typedef bool (*alloc_domheap_mem_cb)(struct domain *d, struct page_info *pg,
+                                     unsigned int order, void *extra);
+bool allocate_domheap_memory(struct domain *d, paddr_t tot_size,
+                             alloc_domheap_mem_cb cb, void *extra);
+
+bool allocate_bank_memory(struct kernel_info *kinfo, gfn_t sgfn,
+                          paddr_t tot_size);
+void allocate_memory(struct domain *d, struct kernel_info *kinfo);
+int construct_domain(struct domain *d, struct kernel_info *kinfo);
+int make_chosen_node(const struct kernel_info *kinfo);
+int make_cpus_node(const struct domain *d, void *fdt);
+int make_hypervisor_node(struct domain *d, const struct kernel_info *kinfo,
+                         int addrcells, int sizecells);
+int make_memory_node(const struct kernel_info *kinfo, int addrcells,
+                     int sizecells, const struct membanks *mem);
+int make_timer_node(const struct kernel_info *kinfo);
+
+unsigned int get_allocation_size(paddr_t size);
+
+#endif /* __XEN_FDT_DOMAIN_BUILD_H__ */
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
-- 
2.49.0



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        Mon, 14 Apr 2025 08:56:51 -0700 (PDT)
From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk ,
	Andrew Cooper ,
	Anthony PERARD ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v2 6/8] xen/common: dom0less: introduce common kernel.c
Date: Mon, 14 Apr 2025 17:56:39 +0200
Message-ID: 
X-Mailer: git-send-email 2.49.0
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The following functions don't have arch specific things so it is moved to
common:
- kernel_prboe()
- kernel_load()
- output_length()

Functions necessary for dom0less are only moved.

The following changes are done:
- Swap __init and return type of kernel_decompress() function to be
  consistent with defintions of functions in other files. The same
  for output_length().
- Wrap by "ifdef CONFIG_ARM" the call of kernel_uimage_probe() in
  kernel_probe() as uImage isn't really used nowadays thereby leave
  kernel_uimage_probe() call here just for compatability with Arm code.
- Introduce kernel_zimage_probe() to cover the case that arch can have
  different zimage header.
- Add ASSERT() for kernel_load() to check that it argument isn't NULL.
- Make kernel_uimage_probe() non-static in Arm's code as it is used in
  common/kernel.c.

Introduce CONFIG_DOMAIN_BUILD_HELPERS to not provide stubs for archs
which don't provide enough functionality to enable it.
Select CONFIG_DOMAIN_BUILD_HELPERS for CONFIG_ARM as only Arm supports
it, at the moment.

Signed-off-by: Oleksii Kurochko 
---
Change in v2:
 - Drop inclusion of asm/kernel.h in kernel.c as everything necessary has
   been moved to xen/fdt-kernel.h.
---
 xen/arch/arm/Kconfig            |   1 +
 xen/arch/arm/kernel.c           | 221 +----------------------------
 xen/common/Kconfig              |   9 +-
 xen/common/device-tree/Makefile |   1 +
 xen/common/device-tree/kernel.c | 242 ++++++++++++++++++++++++++++++++
 xen/include/xen/fdt-kernel.h    |  13 ++
 6 files changed, 271 insertions(+), 216 deletions(-)
 create mode 100644 xen/common/device-tree/kernel.c

diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig
index 060389c3c8..d63c0dc669 100644
--- a/xen/arch/arm/Kconfig
+++ b/xen/arch/arm/Kconfig
@@ -11,6 +11,7 @@ config ARM_64
 
 config ARM
 	def_bool y
+	select DOMAIN_BUILD_HELPERS
 	select FUNCTION_ALIGNMENT_4B
 	select GENERIC_UART_INIT
 	select HAS_ALTERNATIVE if HAS_VMAP
diff --git a/xen/arch/arm/kernel.c b/xen/arch/arm/kernel.c
index 164f417e75..1a5ae4b95c 100644
--- a/xen/arch/arm/kernel.c
+++ b/xen/arch/arm/kernel.c
@@ -161,105 +161,6 @@ static void __init kernel_zimage_load(struct kernel_info *info)
     iounmap(kernel);
 }
 
-static __init uint32_t output_length(char *image, unsigned long image_len)
-{
-    return *(uint32_t *)&image[image_len - 4];
-}
-
-static __init int kernel_decompress(struct bootmodule *mod, uint32_t offset)
-{
-    char *output, *input;
-    char magic[2];
-    int rc;
-    unsigned int kernel_order_out;
-    paddr_t output_size;
-    struct page_info *pages;
-    mfn_t mfn;
-    int i;
-    paddr_t addr = mod->start;
-    paddr_t size = mod->size;
-
-    if ( size < offset )
-        return -EINVAL;
-
-    /*
-     * It might be that gzip header does not appear at the start address
-     * (e.g. in case of compressed uImage) so take into account offset to
-     * gzip header.
-     */
-    addr += offset;
-    size -= offset;
-
-    if ( size < 2 )
-        return -EINVAL;
-
-    copy_from_paddr(magic, addr, sizeof(magic));
-
-    /* only gzip is supported */
-    if ( !gzip_check(magic, size) )
-        return -EINVAL;
-
-    input = ioremap_cache(addr, size);
-    if ( input == NULL )
-        return -EFAULT;
-
-    output_size = output_length(input, size);
-    kernel_order_out = get_order_from_bytes(output_size);
-    pages = alloc_domheap_pages(NULL, kernel_order_out, 0);
-    if ( pages == NULL )
-    {
-        iounmap(input);
-        return -ENOMEM;
-    }
-    mfn = page_to_mfn(pages);
-    output = vmap_contig(mfn, 1 << kernel_order_out);
-
-    rc = perform_gunzip(output, input, size);
-    clean_dcache_va_range(output, output_size);
-    iounmap(input);
-    vunmap(output);
-
-    if ( rc )
-    {
-        free_domheap_pages(pages, kernel_order_out);
-        return rc;
-    }
-
-    mod->start = page_to_maddr(pages);
-    mod->size = output_size;
-
-    /*
-     * Need to free pages after output_size here because they won't be
-     * freed by discard_initial_modules
-     */
-    i = PFN_UP(output_size);
-    for ( ; i < (1 << kernel_order_out); i++ )
-        free_domheap_page(pages + i);
-
-    /*
-     * When using static heap feature, don't give bootmodules memory back to
-     * the heap allocator
-     */
-    if ( using_static_heap )
-        return 0;
-
-    /*
-     * When freeing the kernel, we need to pass the module start address and
-     * size as they were before taking an offset to gzip header into account,
-     * so that the entire region will be freed.
-     */
-    addr -= offset;
-    size += offset;
-
-    /*
-     * Free the original kernel, update the pointers to the
-     * decompressed kernel
-     */
-    fw_unreserved_regions(addr, addr + size, init_domheap_pages, 0);
-
-    return 0;
-}
-
 /*
  * Uimage CPU Architecture Codes
  */
@@ -272,8 +173,8 @@ static __init int kernel_decompress(struct bootmodule *mod, uint32_t offset)
 /*
  * Check if the image is a uImage and setup kernel_info
  */
-static int __init kernel_uimage_probe(struct kernel_info *info,
-                                      struct bootmodule *mod)
+int __init kernel_uimage_probe(struct kernel_info *info,
+                               struct bootmodule *mod)
 {
     struct {
         __be32 magic;   /* Image Header Magic Number */
@@ -503,130 +404,20 @@ static int __init kernel_zimage32_probe(struct kernel_info *info,
     return 0;
 }
 
-int __init kernel_probe(struct kernel_info *info,
-                        const struct dt_device_node *domain)
+int __init kernel_zimage_probe(struct kernel_info *info, paddr_t addr,
+                               paddr_t size)
 {
-    struct bootmodule *mod = NULL;
-    struct bootcmdline *cmd = NULL;
-    struct dt_device_node *node;
-    u64 kernel_addr, initrd_addr, dtb_addr, size;
     int rc;
 
-    /*
-     * We need to initialize start to 0. This field may be populated during
-     * kernel_xxx_probe() if the image has a fixed entry point (for e.g.
-     * uimage.ep).
-     * We will use this to determine if the image has a fixed entry point or
-     * the load address should be used as the start address.
-     */
-    info->entry = 0;
-
-    /* domain is NULL only for the hardware domain */
-    if ( domain == NULL )
-    {
-        ASSERT(is_hardware_domain(info->d));
-
-        mod = boot_module_find_by_kind(BOOTMOD_KERNEL);
-
-        info->kernel_bootmodule = mod;
-        info->initrd_bootmodule = boot_module_find_by_kind(BOOTMOD_RAMDISK);
-
-        cmd = boot_cmdline_find_by_kind(BOOTMOD_KERNEL);
-        if ( cmd )
-            info->cmdline = &cmd->cmdline[0];
-    }
-    else
-    {
-        const char *name = NULL;
-
-        dt_for_each_child_node(domain, node)
-        {
-            if ( dt_device_is_compatible(node, "multiboot,kernel") )
-            {
-                u32 len;
-                const __be32 *val;
-
-                val = dt_get_property(node, "reg", &len);
-                dt_get_range(&val, node, &kernel_addr, &size);
-                mod = boot_module_find_by_addr_and_kind(
-                        BOOTMOD_KERNEL, kernel_addr);
-                info->kernel_bootmodule = mod;
-            }
-            else if ( dt_device_is_compatible(node, "multiboot,ramdisk") )
-            {
-                u32 len;
-                const __be32 *val;
-
-                val = dt_get_property(node, "reg", &len);
-                dt_get_range(&val, node, &initrd_addr, &size);
-                info->initrd_bootmodule = boot_module_find_by_addr_and_kind(
-                        BOOTMOD_RAMDISK, initrd_addr);
-            }
-            else if ( dt_device_is_compatible(node, "multiboot,device-tree") )
-            {
-                uint32_t len;
-                const __be32 *val;
-
-                val = dt_get_property(node, "reg", &len);
-                if ( val == NULL )
-                    continue;
-                dt_get_range(&val, node, &dtb_addr, &size);
-                info->dtb_bootmodule = boot_module_find_by_addr_and_kind(
-                        BOOTMOD_GUEST_DTB, dtb_addr);
-            }
-            else
-                continue;
-        }
-        name = dt_node_name(domain);
-        cmd = boot_cmdline_find_by_name(name);
-        if ( cmd )
-            info->cmdline = &cmd->cmdline[0];
-    }
-    if ( !mod || !mod->size )
-    {
-        printk(XENLOG_ERR "Missing kernel boot module?\n");
-        return -ENOENT;
-    }
-
-    printk("Loading %pd kernel from boot module @ %"PRIpaddr"\n",
-           info->d, info->kernel_bootmodule->start);
-    if ( info->initrd_bootmodule )
-        printk("Loading ramdisk from boot module @ %"PRIpaddr"\n",
-               info->initrd_bootmodule->start);
-
-    /*
-     * uImage header always appears at the top of the image (even compressed),
-     * so it needs to be probed first. Note that in case of compressed uImage,
-     * kernel_decompress is called from kernel_uimage_probe making the function
-     * self-containing (i.e. fall through only in case of a header not found).
-     */
-    rc = kernel_uimage_probe(info, mod);
-    if ( rc != -ENOENT )
-        return rc;
-
-    /*
-     * If it is a gzip'ed image, 32bit or 64bit, uncompress it.
-     * At this point, gzip header appears (if at all) at the top of the image,
-     * so pass 0 as an offset.
-     */
-    rc = kernel_decompress(mod, 0);
-    if ( rc && rc != -EINVAL )
-        return rc;
-
 #ifdef CONFIG_ARM_64
-    rc = kernel_zimage64_probe(info, mod->start, mod->size);
+    rc = kernel_zimage64_probe(info, addr, size);
     if (rc < 0)
 #endif
-        rc = kernel_zimage32_probe(info, mod->start, mod->size);
+        rc = kernel_zimage32_probe(info, addr, size);
 
     return rc;
 }
 
-void __init kernel_load(struct kernel_info *info)
-{
-    info->load(info);
-}
-
 /*
  * Local variables:
  * mode: C
diff --git a/xen/common/Kconfig b/xen/common/Kconfig
index 2fd79aea5b..b2f915c429 100644
--- a/xen/common/Kconfig
+++ b/xen/common/Kconfig
@@ -14,13 +14,20 @@ config CORE_PARKING
 
 config DOM0LESS_BOOT
 	bool "Dom0less boot support" if EXPERT
-	depends on HAS_DOM0LESS
+	depends on HAS_DOM0LESS && DOMAIN_BUILD_HELPERS
 	default y
 	help
 	  Dom0less boot support enables Xen to create and start domU guests during
 	  Xen boot without the need of a control domain (Dom0), which could be
 	  present anyway.
 
+config DOMAIN_BUILD_HELPERS
+	bool
+	help
+	  Introduce functions necessary for working with domain creation, kernel,
+	  etc. As an examples, these type of functions are going to be used by
+	  CONFIG_DOM0LESS_BOOT.
+
 config GRANT_TABLE
 	bool "Grant table support" if EXPERT
 	default y
diff --git a/xen/common/device-tree/Makefile b/xen/common/device-tree/Makefile
index f3dafc9b81..e88a4d5799 100644
--- a/xen/common/device-tree/Makefile
+++ b/xen/common/device-tree/Makefile
@@ -4,3 +4,4 @@ obj-y += device-tree.o
 obj-$(CONFIG_DOM0LESS_BOOT) += dom0less-build.o
 obj-$(CONFIG_OVERLAY_DTB) += dt-overlay.o
 obj-y += intc.o
+obj-$(CONFIG_DOMAIN_BUILD_HELPERS) += kernel.o
diff --git a/xen/common/device-tree/kernel.c b/xen/common/device-tree/kernel.c
new file mode 100644
index 0000000000..1bf3bbf64e
--- /dev/null
+++ b/xen/common/device-tree/kernel.c
@@ -0,0 +1,242 @@
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+static uint32_t __init output_length(char *image, unsigned long image_len)
+{
+    return *(uint32_t *)&image[image_len - 4];
+}
+
+int __init kernel_decompress(struct bootmodule *mod, uint32_t offset)
+{
+    char *output, *input;
+    char magic[2];
+    int rc;
+    unsigned int kernel_order_out;
+    paddr_t output_size;
+    struct page_info *pages;
+    mfn_t mfn;
+    int i;
+    paddr_t addr = mod->start;
+    paddr_t size = mod->size;
+
+    if ( size < offset )
+        return -EINVAL;
+
+    /*
+     * It might be that gzip header does not appear at the start address
+     * (e.g. in case of compressed uImage) so take into account offset to
+     * gzip header.
+     */
+    addr += offset;
+    size -= offset;
+
+    if ( size < 2 )
+        return -EINVAL;
+
+    copy_from_paddr(magic, addr, sizeof(magic));
+
+    /* only gzip is supported */
+    if ( !gzip_check(magic, size) )
+        return -EINVAL;
+
+    input = ioremap_cache(addr, size);
+    if ( input == NULL )
+        return -EFAULT;
+
+    output_size = output_length(input, size);
+    kernel_order_out = get_order_from_bytes(output_size);
+    pages = alloc_domheap_pages(NULL, kernel_order_out, 0);
+    if ( pages == NULL )
+    {
+        iounmap(input);
+        return -ENOMEM;
+    }
+    mfn = page_to_mfn(pages);
+    output = vmap_contig(mfn, 1 << kernel_order_out);
+
+    rc = perform_gunzip(output, input, size);
+    clean_dcache_va_range(output, output_size);
+    iounmap(input);
+    vunmap(output);
+
+    if ( rc )
+    {
+        free_domheap_pages(pages, kernel_order_out);
+        return rc;
+    }
+
+    mod->start = page_to_maddr(pages);
+    mod->size = output_size;
+
+    /*
+     * Need to free pages after output_size here because they won't be
+     * freed by discard_initial_modules
+     */
+    i = PFN_UP(output_size);
+    for ( ; i < (1 << kernel_order_out); i++ )
+        free_domheap_page(pages + i);
+
+    /*
+     * When using static heap feature, don't give bootmodules memory back to
+     * the heap allocator
+     */
+    if ( using_static_heap )
+        return 0;
+
+    /*
+     * When freeing the kernel, we need to pass the module start address and
+     * size as they were before taking an offset to gzip header into account,
+     * so that the entire region will be freed.
+     */
+    addr -= offset;
+    size += offset;
+
+    /*
+     * Free the original kernel, update the pointers to the
+     * decompressed kernel
+     */
+    fw_unreserved_regions(addr, addr + size, init_domheap_pages, 0);
+
+    return 0;
+}
+
+int __init kernel_probe(struct kernel_info *info,
+                        const struct dt_device_node *domain)
+{
+    struct bootmodule *mod = NULL;
+    struct bootcmdline *cmd = NULL;
+    struct dt_device_node *node;
+    u64 kernel_addr, initrd_addr, dtb_addr, size;
+    int rc;
+
+    /*
+     * We need to initialize start to 0. This field may be populated during
+     * kernel_xxx_probe() if the image has a fixed entry point (for e.g.
+     * uimage.ep).
+     * We will use this to determine if the image has a fixed entry point or
+     * the load address should be used as the start address.
+     */
+    info->entry = 0;
+
+    /* domain is NULL only for the hardware domain */
+    if ( domain == NULL )
+    {
+        ASSERT(is_hardware_domain(info->d));
+
+        mod = boot_module_find_by_kind(BOOTMOD_KERNEL);
+
+        info->kernel_bootmodule = mod;
+        info->initrd_bootmodule = boot_module_find_by_kind(BOOTMOD_RAMDISK);
+
+        cmd = boot_cmdline_find_by_kind(BOOTMOD_KERNEL);
+        if ( cmd )
+            info->cmdline = &cmd->cmdline[0];
+    }
+    else
+    {
+        const char *name = NULL;
+
+        dt_for_each_child_node(domain, node)
+        {
+            if ( dt_device_is_compatible(node, "multiboot,kernel") )
+            {
+                u32 len;
+                const __be32 *val;
+
+                val = dt_get_property(node, "reg", &len);
+                dt_get_range(&val, node, &kernel_addr, &size);
+                mod = boot_module_find_by_addr_and_kind(
+                        BOOTMOD_KERNEL, kernel_addr);
+                info->kernel_bootmodule = mod;
+            }
+            else if ( dt_device_is_compatible(node, "multiboot,ramdisk") )
+            {
+                u32 len;
+                const __be32 *val;
+
+                val = dt_get_property(node, "reg", &len);
+                dt_get_range(&val, node, &initrd_addr, &size);
+                info->initrd_bootmodule = boot_module_find_by_addr_and_kind(
+                        BOOTMOD_RAMDISK, initrd_addr);
+            }
+            else if ( dt_device_is_compatible(node, "multiboot,device-tree") )
+            {
+                uint32_t len;
+                const __be32 *val;
+
+                val = dt_get_property(node, "reg", &len);
+                if ( val == NULL )
+                    continue;
+                dt_get_range(&val, node, &dtb_addr, &size);
+                info->dtb_bootmodule = boot_module_find_by_addr_and_kind(
+                        BOOTMOD_GUEST_DTB, dtb_addr);
+            }
+            else
+                continue;
+        }
+        name = dt_node_name(domain);
+        cmd = boot_cmdline_find_by_name(name);
+        if ( cmd )
+            info->cmdline = &cmd->cmdline[0];
+    }
+    if ( !mod || !mod->size )
+    {
+        printk(XENLOG_ERR "Missing kernel boot module?\n");
+        return -ENOENT;
+    }
+
+    printk("Loading %pd kernel from boot module @ %"PRIpaddr"\n",
+           info->d, info->kernel_bootmodule->start);
+    if ( info->initrd_bootmodule )
+        printk("Loading ramdisk from boot module @ %"PRIpaddr"\n",
+               info->initrd_bootmodule->start);
+
+    /*
+     * uImage isn't really used nowadays thereby leave kernel_uimage_probe()
+     * call here just for compatability with Arm code.
+     */
+#ifdef CONFIG_ARM
+    /*
+     * uImage header always appears at the top of the image (even compressed),
+     * so it needs to be probed first. Note that in case of compressed uImage,
+     * kernel_decompress is called from kernel_uimage_probe making the function
+     * self-containing (i.e. fall through only in case of a header not found).
+     */
+    rc = kernel_uimage_probe(info, mod);
+    if ( rc != -ENOENT )
+        return rc;
+#endif
+
+    /*
+     * If it is a gzip'ed image, 32bit or 64bit, uncompress it.
+     * At this point, gzip header appears (if at all) at the top of the image,
+     * so pass 0 as an offset.
+     */
+    rc = kernel_decompress(mod, 0);
+    if ( rc && rc != -EINVAL )
+        return rc;
+
+    rc = kernel_zimage_probe(info, mod->start, mod->size);
+
+    return rc;
+}
+
+void __init kernel_load(struct kernel_info *info)
+{
+    ASSERT(info && info->load);
+
+    info->load(info);
+}
diff --git a/xen/include/xen/fdt-kernel.h b/xen/include/xen/fdt-kernel.h
index c81e759423..d85324c867 100644
--- a/xen/include/xen/fdt-kernel.h
+++ b/xen/include/xen/fdt-kernel.h
@@ -121,6 +121,19 @@ int kernel_probe(struct kernel_info *info, const struct dt_device_node *domain);
  */
 void kernel_load(struct kernel_info *info);
 
+int kernel_decompress(struct bootmodule *mod, uint32_t offset);
+
+int kernel_zimage_probe(struct kernel_info *info, paddr_t addr, paddr_t size);
+
+/*
+ * uImage isn't really used nowadays thereby leave kernel_uimage_probe()
+ * call here just for compatability with Arm code.
+ */
+#ifdef CONFIG_ARM
+struct bootmodule;
+int kernel_uimage_probe(struct kernel_info *info, struct bootmodule *mod);
+#endif
+
 #endif /* __XEN_FDT_KERNEL_H__ */
 
 /*
-- 
2.49.0



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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk ,
	Andrew Cooper ,
	Anthony PERARD ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v2 7/8] xen/common: dom0less: introduce common domain-build.c
Date: Mon, 14 Apr 2025 17:56:40 +0200
Message-ID: <9dbf651ce177a7292f80879373e86a51305f216e.1744626032.git.oleksii.kurochko@gmail.com>
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Some functions of Arm's domain_build.c could be reused by dom0less or other
features connected to domain construction/build.

The following functions are moved to common:
- get_allocation_size().
- allocate_domheap_memory().
- guest_map_pages().
- allocate_bank_memory().
- add_hwdom_free_regions().
- find_unallocated_memory().
- allocate_memory().
- dtb_load().
- initrd_load().

Prototype of dtb_load() and initrd_load() is updated to recieve a pointer
to copy_to_guest_phys() as some archs require
copy_to_guest_phys_fluch_dcache().

Update arm/include/asm/Makefile to generate  domain-build.h for Arm as it is
used by domain-build.c.

Signed-off-by: Oleksii Kurochko 
---
Change in v2:
 - Use xen/fdt-domain-build.h instead of asm/domain_build.h.
---
 xen/arch/arm/domain_build.c           | 397 +------------------------
 xen/common/device-tree/Makefile       |   1 +
 xen/common/device-tree/domain-build.c | 404 ++++++++++++++++++++++++++
 xen/include/xen/fdt-domain-build.h    |  33 ++-
 4 files changed, 439 insertions(+), 396 deletions(-)
 create mode 100644 xen/common/device-tree/domain-build.c

diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
index 75f048f58c..86fcaefa26 100644
--- a/xen/arch/arm/domain_build.c
+++ b/xen/arch/arm/domain_build.c
@@ -119,18 +119,6 @@ struct vcpu *__init alloc_dom0_vcpu0(struct domain *dom0)
     return vcpu_create(dom0, 0);
 }
 
-unsigned int __init get_allocation_size(paddr_t size)
-{
-    /*
-     * get_order_from_bytes returns the order greater than or equal to
-     * the given size, but we need less than or equal. Adding one to
-     * the size pushes an evenly aligned size into the next order, so
-     * we can then unconditionally subtract 1 from the order which is
-     * returned.
-     */
-    return get_order_from_bytes(size + 1) - 1;
-}
-
 /*
  * Insert the given pages into a memory bank, banks are ordered by address.
  *
@@ -417,98 +405,6 @@ static void __init allocate_memory_11(struct domain *d,
     }
 }
 
-bool __init allocate_domheap_memory(struct domain *d, paddr_t tot_size,
-                                    alloc_domheap_mem_cb cb, void *extra)
-{
-    unsigned int max_order = UINT_MAX;
-
-    while ( tot_size > 0 )
-    {
-        unsigned int order = get_allocation_size(tot_size);
-        struct page_info *pg;
-
-        order = min(max_order, order);
-
-        pg = alloc_domheap_pages(d, order, 0);
-        if ( !pg )
-        {
-            /*
-             * If we can't allocate one page, then it is unlikely to
-             * succeed in the next iteration. So bail out.
-             */
-            if ( !order )
-                return false;
-
-            /*
-             * If we can't allocate memory with order, then it is
-             * unlikely to succeed in the next iteration.
-             * Record the order - 1 to avoid re-trying.
-             */
-            max_order = order - 1;
-            continue;
-        }
-
-        if ( !cb(d, pg, order, extra) )
-            return false;
-
-        tot_size -= (1ULL << (PAGE_SHIFT + order));
-    }
-
-    return true;
-}
-
-static bool __init guest_map_pages(struct domain *d, struct page_info *pg,
-                                   unsigned int order, void *extra)
-{
-    gfn_t *sgfn = (gfn_t *)extra;
-    int res;
-
-    BUG_ON(!sgfn);
-    res = guest_physmap_add_page(d, *sgfn, page_to_mfn(pg), order);
-    if ( res )
-    {
-        dprintk(XENLOG_ERR, "Failed map pages to DOMU: %d", res);
-        return false;
-    }
-
-    *sgfn = gfn_add(*sgfn, 1UL << order);
-
-    return true;
-}
-
-bool __init allocate_bank_memory(struct kernel_info *kinfo, gfn_t sgfn,
-                                 paddr_t tot_size)
-{
-    struct membanks *mem = kernel_info_get_mem(kinfo);
-    struct domain *d = kinfo->d;
-    struct membank *bank;
-
-    /*
-     * allocate_bank_memory can be called with a tot_size of zero for
-     * the second memory bank. It is not an error and we can safely
-     * avoid creating a zero-size memory bank.
-     */
-    if ( tot_size == 0 )
-        return true;
-
-    bank = &mem->bank[mem->nr_banks];
-    bank->start = gfn_to_gaddr(sgfn);
-    bank->size = tot_size;
-
-    /*
-     * Allocate pages from the heap until tot_size is zero and map them to the
-     * guest using guest_map_pages, passing the starting gfn as extra parameter
-     * for the map operation.
-     */
-    if ( !allocate_domheap_memory(d, tot_size, guest_map_pages, &sgfn) )
-        return false;
-
-    mem->nr_banks++;
-    kinfo->unassigned_mem -= bank->size;
-
-    return true;
-}
-
 /*
  * When PCI passthrough is available we want to keep the
  * "linux,pci-domain" in sync for every host bridge.
@@ -899,226 +795,6 @@ int __init add_ext_regions(unsigned long s_gfn, unsigned long e_gfn,
     return 0;
 }
 
-static int __init add_hwdom_free_regions(unsigned long s_gfn,
-                                         unsigned long e_gfn, void *data)
-{
-    struct membanks *free_regions = data;
-    paddr_t start, size;
-    paddr_t s = pfn_to_paddr(s_gfn);
-    paddr_t e = pfn_to_paddr(e_gfn);
-    unsigned int i, j;
-
-    if ( free_regions->nr_banks >= free_regions->max_banks )
-        return 0;
-
-    /*
-     * Both start and size of the free region should be 2MB aligned to
-     * potentially allow superpage mapping.
-     */
-    start = (s + SZ_2M - 1) & ~(SZ_2M - 1);
-    if ( start > e )
-        return 0;
-
-    /*
-     * e is actually "end-1" because it is called by rangeset functions
-     * which are inclusive of the last address.
-     */
-    e += 1;
-    size = (e - start) & ~(SZ_2M - 1);
-
-    /* Find the insert position (descending order). */
-    for ( i = 0; i < free_regions->nr_banks ; i++ )
-        if ( size > free_regions->bank[i].size )
-            break;
-
-    /* Move the other banks to make space. */
-    for ( j = free_regions->nr_banks; j > i ; j-- )
-    {
-        free_regions->bank[j].start = free_regions->bank[j - 1].start;
-        free_regions->bank[j].size = free_regions->bank[j - 1].size;
-    }
-
-    free_regions->bank[i].start = start;
-    free_regions->bank[i].size = size;
-    free_regions->nr_banks++;
-
-    return 0;
-}
-
-/*
- * Find unused regions of Host address space which can be exposed to domain
- * using the host memory layout. In order to calculate regions we exclude every
- * region passed in mem_banks from the Host RAM.
- */
-static int __init find_unallocated_memory(const struct kernel_info *kinfo,
-                                          const struct membanks *mem_banks[],
-                                          unsigned int nr_mem_banks,
-                                          struct membanks *free_regions,
-                                          int (*cb)(unsigned long s_gfn,
-                                                    unsigned long e_gfn,
-                                                    void *data))
-{
-    const struct membanks *mem = bootinfo_get_mem();
-    struct rangeset *unalloc_mem;
-    paddr_t start, end;
-    unsigned int i, j;
-    int res;
-
-    ASSERT(domain_use_host_layout(kinfo->d));
-
-    unalloc_mem = rangeset_new(NULL, NULL, 0);
-    if ( !unalloc_mem )
-        return -ENOMEM;
-
-    /* Start with all available RAM */
-    for ( i = 0; i < mem->nr_banks; i++ )
-    {
-        start = mem->bank[i].start;
-        end = mem->bank[i].start + mem->bank[i].size;
-        res = rangeset_add_range(unalloc_mem, PFN_DOWN(start),
-                                 PFN_DOWN(end - 1));
-        if ( res )
-        {
-            printk(XENLOG_ERR "Failed to add: %#"PRIpaddr"->%#"PRIpaddr"\n",
-                   start, end);
-            goto out;
-        }
-    }
-
-    /* Remove all regions listed in mem_banks */
-    for ( i = 0; i < nr_mem_banks; i++ )
-        for ( j = 0; j < mem_banks[i]->nr_banks; j++ )
-        {
-            start = mem_banks[i]->bank[j].start;
-
-            /* Shared memory banks can contain INVALID_PADDR as start */
-            if ( INVALID_PADDR == start )
-                continue;
-
-            end = mem_banks[i]->bank[j].start + mem_banks[i]->bank[j].size;
-            res = rangeset_remove_range(unalloc_mem, PFN_DOWN(start),
-                                        PFN_DOWN(end - 1));
-            if ( res )
-            {
-                printk(XENLOG_ERR
-                       "Failed to add: %#"PRIpaddr"->%#"PRIpaddr", error %d\n",
-                       start, end, res);
-                goto out;
-            }
-        }
-
-    start = 0;
-    end = (1ULL << p2m_ipa_bits) - 1;
-    res = rangeset_report_ranges(unalloc_mem, PFN_DOWN(start), PFN_DOWN(end),
-                                 cb, free_regions);
-    if ( res )
-        free_regions->nr_banks = 0;
-    else if ( !free_regions->nr_banks )
-        res = -ENOENT;
-
-out:
-    rangeset_destroy(unalloc_mem);
-
-    return res;
-}
-
-void __init allocate_memory(struct domain *d, struct kernel_info *kinfo)
-{
-    struct membanks *mem = kernel_info_get_mem(kinfo);
-    unsigned int i, nr_banks = GUEST_RAM_BANKS;
-    struct membanks *hwdom_free_mem = NULL;
-
-    printk(XENLOG_INFO "Allocating mappings totalling %ldMB for %pd:\n",
-           /* Don't want format this as PRIpaddr (16 digit hex) */
-           (unsigned long)(kinfo->unassigned_mem >> 20), d);
-
-    mem->nr_banks = 0;
-    /*
-     * Use host memory layout for hwdom. Only case for this is when LLC coloring
-     * is enabled.
-     */
-    if ( is_hardware_domain(d) )
-    {
-        struct membanks *gnttab = membanks_xzalloc(1, MEMORY);
-        /*
-         * Exclude the following regions:
-         * 1) Remove reserved memory
-         * 2) Grant table assigned to hwdom
-         */
-        const struct membanks *mem_banks[] = {
-            bootinfo_get_reserved_mem(),
-            gnttab,
-        };
-
-        if ( !gnttab )
-            goto fail;
-
-        gnttab->nr_banks = 1;
-        gnttab->bank[0].start = kinfo->gnttab_start;
-        gnttab->bank[0].size = kinfo->gnttab_size;
-
-        hwdom_free_mem = membanks_xzalloc(NR_MEM_BANKS, MEMORY);
-        if ( !hwdom_free_mem )
-            goto fail;
-
-        if ( find_unallocated_memory(kinfo, mem_banks, ARRAY_SIZE(mem_banks),
-                                     hwdom_free_mem, add_hwdom_free_regions) )
-            goto fail;
-
-        nr_banks = hwdom_free_mem->nr_banks;
-        xfree(gnttab);
-    }
-
-    for ( i = 0; kinfo->unassigned_mem > 0 && nr_banks > 0; i++, nr_banks-- )
-    {
-        paddr_t bank_start, bank_size;
-
-        if ( is_hardware_domain(d) )
-        {
-            bank_start = hwdom_free_mem->bank[i].start;
-            bank_size = hwdom_free_mem->bank[i].size;
-        }
-        else
-        {
-            const uint64_t bankbase[] = GUEST_RAM_BANK_BASES;
-            const uint64_t banksize[] = GUEST_RAM_BANK_SIZES;
-
-            if ( i >= GUEST_RAM_BANKS )
-                goto fail;
-
-            bank_start = bankbase[i];
-            bank_size = banksize[i];
-        }
-
-        bank_size = MIN(bank_size, kinfo->unassigned_mem);
-        if ( !allocate_bank_memory(kinfo, gaddr_to_gfn(bank_start), bank_size) )
-            goto fail;
-    }
-
-    if ( kinfo->unassigned_mem )
-        goto fail;
-
-    for( i = 0; i < mem->nr_banks; i++ )
-    {
-        printk(XENLOG_INFO "%pd BANK[%d] %#"PRIpaddr"-%#"PRIpaddr" (%ldMB)\n",
-               d,
-               i,
-               mem->bank[i].start,
-               mem->bank[i].start + mem->bank[i].size,
-               /* Don't want format this as PRIpaddr (16 digit hex) */
-               (unsigned long)(mem->bank[i].size >> 20));
-    }
-
-    xfree(hwdom_free_mem);
-    return;
-
-  fail:
-    panic("Failed to allocate requested domain memory."
-          /* Don't want format this as PRIpaddr (16 digit hex) */
-          " %ldKB unallocated. Fix the VMs configurations.\n",
-          (unsigned long)kinfo->unassigned_mem >> 10);
-}
-
 static int __init handle_pci_range(const struct dt_device_node *dev,
                                    uint64_t addr, uint64_t len, void *data)
 {
@@ -2058,75 +1734,6 @@ static int __init prepare_dtb_hwdom(struct domain *d, struct kernel_info *kinfo)
     return -EINVAL;
 }
 
-static void __init dtb_load(struct kernel_info *kinfo)
-{
-    unsigned long left;
-
-    printk("Loading %pd DTB to 0x%"PRIpaddr"-0x%"PRIpaddr"\n",
-           kinfo->d, kinfo->dtb_paddr,
-           kinfo->dtb_paddr + fdt_totalsize(kinfo->fdt));
-
-    left = copy_to_guest_phys_flush_dcache(kinfo->d, kinfo->dtb_paddr,
-                                           kinfo->fdt,
-                                           fdt_totalsize(kinfo->fdt));
-
-    if ( left != 0 )
-        panic("Unable to copy the DTB to %pd memory (left = %lu bytes)\n",
-              kinfo->d, left);
-    xfree(kinfo->fdt);
-}
-
-static void __init initrd_load(struct kernel_info *kinfo)
-{
-    const struct bootmodule *mod = kinfo->initrd_bootmodule;
-    paddr_t load_addr = kinfo->initrd_paddr;
-    paddr_t paddr, len;
-    int node;
-    int res;
-    __be32 val[2];
-    __be32 *cellp;
-    void __iomem *initrd;
-
-    if ( !mod || !mod->size )
-        return;
-
-    paddr = mod->start;
-    len = mod->size;
-
-    printk("Loading %pd initrd from %"PRIpaddr" to 0x%"PRIpaddr"-0x%"PRIpaddr"\n",
-           kinfo->d, paddr, load_addr, load_addr + len);
-
-    /* Fix up linux,initrd-start and linux,initrd-end in /chosen */
-    node = fdt_path_offset(kinfo->fdt, "/chosen");
-    if ( node < 0 )
-        panic("Cannot find the /chosen node\n");
-
-    cellp = (__be32 *)val;
-    dt_set_cell(&cellp, ARRAY_SIZE(val), load_addr);
-    res = fdt_setprop_inplace(kinfo->fdt, node, "linux,initrd-start",
-                              val, sizeof(val));
-    if ( res )
-        panic("Cannot fix up \"linux,initrd-start\" property\n");
-
-    cellp = (__be32 *)val;
-    dt_set_cell(&cellp, ARRAY_SIZE(val), load_addr + len);
-    res = fdt_setprop_inplace(kinfo->fdt, node, "linux,initrd-end",
-                              val, sizeof(val));
-    if ( res )
-        panic("Cannot fix up \"linux,initrd-end\" property\n");
-
-    initrd = ioremap_wc(paddr, len);
-    if ( !initrd )
-        panic("Unable to map the %pd initrd\n", kinfo->d);
-
-    res = copy_to_guest_phys_flush_dcache(kinfo->d, load_addr,
-                                          initrd, len);
-    if ( res != 0 )
-        panic("Unable to copy the initrd in the %pd memory\n", kinfo->d);
-
-    iounmap(initrd);
-}
-
 /*
  * Allocate the event channel PPIs and setup the HVM_PARAM_CALLBACK_IRQ.
  * The allocated IRQ will be found in d->arch.evtchn_irq.
@@ -2219,8 +1826,8 @@ int __init construct_domain(struct domain *d, struct kernel_info *kinfo)
      */
     kernel_load(kinfo);
     /* initrd_load will fix up the fdt, so call it before dtb_load */
-    initrd_load(kinfo);
-    dtb_load(kinfo);
+    initrd_load(kinfo, copy_to_guest_phys_flush_dcache);
+    dtb_load(kinfo, copy_to_guest_phys_flush_dcache);
 
     memset(regs, 0, sizeof(*regs));
 
diff --git a/xen/common/device-tree/Makefile b/xen/common/device-tree/Makefile
index e88a4d5799..831b91399b 100644
--- a/xen/common/device-tree/Makefile
+++ b/xen/common/device-tree/Makefile
@@ -1,6 +1,7 @@
 obj-y += bootfdt.init.o
 obj-y += bootinfo.init.o
 obj-y += device-tree.o
+obj-$(CONFIG_DOMAIN_BUILD_HELPERS) += domain-build.o
 obj-$(CONFIG_DOM0LESS_BOOT) += dom0less-build.o
 obj-$(CONFIG_OVERLAY_DTB) += dt-overlay.o
 obj-y += intc.o
diff --git a/xen/common/device-tree/domain-build.c b/xen/common/device-tree/domain-build.c
new file mode 100644
index 0000000000..69257a15ba
--- /dev/null
+++ b/xen/common/device-tree/domain-build.c
@@ -0,0 +1,404 @@
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+bool __init allocate_domheap_memory(struct domain *d, paddr_t tot_size,
+                                    alloc_domheap_mem_cb cb, void *extra)
+{
+    unsigned int max_order = UINT_MAX;
+
+    while ( tot_size > 0 )
+    {
+        unsigned int order = get_allocation_size(tot_size);
+        struct page_info *pg;
+
+        order = min(max_order, order);
+
+        pg = alloc_domheap_pages(d, order, 0);
+        if ( !pg )
+        {
+            /*
+             * If we can't allocate one page, then it is unlikely to
+             * succeed in the next iteration. So bail out.
+             */
+            if ( !order )
+                return false;
+
+            /*
+             * If we can't allocate memory with order, then it is
+             * unlikely to succeed in the next iteration.
+             * Record the order - 1 to avoid re-trying.
+             */
+            max_order = order - 1;
+            continue;
+        }
+
+        if ( !cb(d, pg, order, extra) )
+            return false;
+
+        tot_size -= (1ULL << (PAGE_SHIFT + order));
+    }
+
+    return true;
+}
+
+static bool __init guest_map_pages(struct domain *d, struct page_info *pg,
+                                   unsigned int order, void *extra)
+{
+    gfn_t *sgfn = (gfn_t *)extra;
+    int res;
+
+    BUG_ON(!sgfn);
+    res = guest_physmap_add_page(d, *sgfn, page_to_mfn(pg), order);
+    if ( res )
+    {
+        dprintk(XENLOG_ERR, "Failed map pages to DOMU: %d", res);
+        return false;
+    }
+
+    *sgfn = gfn_add(*sgfn, 1UL << order);
+
+    return true;
+}
+
+bool __init allocate_bank_memory(struct kernel_info *kinfo, gfn_t sgfn,
+                                 paddr_t tot_size)
+{
+    struct membanks *mem = kernel_info_get_mem(kinfo);
+    struct domain *d = kinfo->d;
+    struct membank *bank;
+
+    /*
+     * allocate_bank_memory can be called with a tot_size of zero for
+     * the second memory bank. It is not an error and we can safely
+     * avoid creating a zero-size memory bank.
+     */
+    if ( tot_size == 0 )
+        return true;
+
+    bank = &mem->bank[mem->nr_banks];
+    bank->start = gfn_to_gaddr(sgfn);
+    bank->size = tot_size;
+
+    /*
+     * Allocate pages from the heap until tot_size is zero and map them to the
+     * guest using guest_map_pages, passing the starting gfn as extra parameter
+     * for the map operation.
+     */
+    if ( !allocate_domheap_memory(d, tot_size, guest_map_pages, &sgfn) )
+        return false;
+
+    mem->nr_banks++;
+    kinfo->unassigned_mem -= bank->size;
+
+    return true;
+}
+
+static int __init add_hwdom_free_regions(unsigned long s_gfn,
+                                         unsigned long e_gfn, void *data)
+{
+    struct membanks *free_regions = data;
+    paddr_t start, size;
+    paddr_t s = pfn_to_paddr(s_gfn);
+    paddr_t e = pfn_to_paddr(e_gfn);
+    unsigned int i, j;
+
+    if ( free_regions->nr_banks >= free_regions->max_banks )
+        return 0;
+
+    /*
+     * Both start and size of the free region should be 2MB aligned to
+     * potentially allow superpage mapping.
+     */
+    start = (s + SZ_2M - 1) & ~(SZ_2M - 1);
+    if ( start > e )
+        return 0;
+
+    /*
+     * e is actually "end-1" because it is called by rangeset functions
+     * which are inclusive of the last address.
+     */
+    e += 1;
+    size = (e - start) & ~(SZ_2M - 1);
+
+    /* Find the insert position (descending order). */
+    for ( i = 0; i < free_regions->nr_banks ; i++ )
+        if ( size > free_regions->bank[i].size )
+            break;
+
+    /* Move the other banks to make space. */
+    for ( j = free_regions->nr_banks; j > i ; j-- )
+    {
+        free_regions->bank[j].start = free_regions->bank[j - 1].start;
+        free_regions->bank[j].size = free_regions->bank[j - 1].size;
+    }
+
+    free_regions->bank[i].start = start;
+    free_regions->bank[i].size = size;
+    free_regions->nr_banks++;
+
+    return 0;
+}
+
+/*
+ * Find unused regions of Host address space which can be exposed to domain
+ * using the host memory layout. In order to calculate regions we exclude every
+ * region passed in mem_banks from the Host RAM.
+ */
+int __init find_unallocated_memory(const struct kernel_info *kinfo,
+                                   const struct membanks *mem_banks[],
+                                   unsigned int nr_mem_banks,
+                                   struct membanks *free_regions,
+                                   int (*cb)(unsigned long s_gfn,
+                                             unsigned long e_gfn,
+                                             void *data))
+{
+    const struct membanks *mem = bootinfo_get_mem();
+    struct rangeset *unalloc_mem;
+    paddr_t start, end;
+    unsigned int i, j;
+    int res;
+
+    ASSERT(domain_use_host_layout(kinfo->d));
+
+    unalloc_mem = rangeset_new(NULL, NULL, 0);
+    if ( !unalloc_mem )
+        return -ENOMEM;
+
+    /* Start with all available RAM */
+    for ( i = 0; i < mem->nr_banks; i++ )
+    {
+        start = mem->bank[i].start;
+        end = mem->bank[i].start + mem->bank[i].size;
+        res = rangeset_add_range(unalloc_mem, PFN_DOWN(start),
+                                 PFN_DOWN(end - 1));
+        if ( res )
+        {
+            printk(XENLOG_ERR "Failed to add: %#"PRIpaddr"->%#"PRIpaddr"\n",
+                   start, end);
+            goto out;
+        }
+    }
+
+    /* Remove all regions listed in mem_banks */
+    for ( i = 0; i < nr_mem_banks; i++ )
+        for ( j = 0; j < mem_banks[i]->nr_banks; j++ )
+        {
+            start = mem_banks[i]->bank[j].start;
+
+            /* Shared memory banks can contain INVALID_PADDR as start */
+            if ( INVALID_PADDR == start )
+                continue;
+
+            end = mem_banks[i]->bank[j].start + mem_banks[i]->bank[j].size;
+            res = rangeset_remove_range(unalloc_mem, PFN_DOWN(start),
+                                        PFN_DOWN(end - 1));
+            if ( res )
+            {
+                printk(XENLOG_ERR
+                       "Failed to add: %#"PRIpaddr"->%#"PRIpaddr", error %d\n",
+                       start, end, res);
+                goto out;
+            }
+        }
+
+    start = 0;
+    end = (1ULL << p2m_ipa_bits) - 1;
+    res = rangeset_report_ranges(unalloc_mem, PFN_DOWN(start), PFN_DOWN(end),
+                                 cb, free_regions);
+    if ( res )
+        free_regions->nr_banks = 0;
+    else if ( !free_regions->nr_banks )
+        res = -ENOENT;
+
+out:
+    rangeset_destroy(unalloc_mem);
+
+    return res;
+}
+
+void __init allocate_memory(struct domain *d, struct kernel_info *kinfo)
+{
+    struct membanks *mem = kernel_info_get_mem(kinfo);
+    unsigned int i, nr_banks = GUEST_RAM_BANKS;
+    struct membanks *hwdom_free_mem = NULL;
+
+    printk(XENLOG_INFO "Allocating mappings totalling %ldMB for %pd:\n",
+           /* Don't want format this as PRIpaddr (16 digit hex) */
+           (unsigned long)(kinfo->unassigned_mem >> 20), d);
+
+    mem->nr_banks = 0;
+    /*
+     * Use host memory layout for hwdom. Only case for this is when LLC coloring
+     * is enabled.
+     */
+    if ( is_hardware_domain(d) )
+    {
+        struct membanks *gnttab = xzalloc_flex_struct(struct membanks, bank, 1);
+        /*
+         * Exclude the following regions:
+         * 1) Remove reserved memory
+         * 2) Grant table assigned to hwdom
+         */
+        const struct membanks *mem_banks[] = {
+            bootinfo_get_reserved_mem(),
+            gnttab,
+        };
+
+        if ( !gnttab )
+            goto fail;
+
+        gnttab->nr_banks = 1;
+        gnttab->bank[0].start = kinfo->gnttab_start;
+        gnttab->bank[0].size = kinfo->gnttab_size;
+
+        hwdom_free_mem = xzalloc_flex_struct(struct membanks, bank,
+                                             NR_MEM_BANKS);
+        if ( !hwdom_free_mem )
+            goto fail;
+
+        hwdom_free_mem->max_banks = NR_MEM_BANKS;
+
+        if ( find_unallocated_memory(kinfo, mem_banks, ARRAY_SIZE(mem_banks),
+                                     hwdom_free_mem, add_hwdom_free_regions) )
+            goto fail;
+
+        nr_banks = hwdom_free_mem->nr_banks;
+        xfree(gnttab);
+    }
+
+    for ( i = 0; kinfo->unassigned_mem > 0 && nr_banks > 0; i++, nr_banks-- )
+    {
+        paddr_t bank_start, bank_size;
+
+        if ( is_hardware_domain(d) )
+        {
+            bank_start = hwdom_free_mem->bank[i].start;
+            bank_size = hwdom_free_mem->bank[i].size;
+        }
+        else
+        {
+            const uint64_t bankbase[] = GUEST_RAM_BANK_BASES;
+            const uint64_t banksize[] = GUEST_RAM_BANK_SIZES;
+
+            if ( i >= GUEST_RAM_BANKS )
+                goto fail;
+
+            bank_start = bankbase[i];
+            bank_size = banksize[i];
+        }
+
+        bank_size = MIN(bank_size, kinfo->unassigned_mem);
+        if ( !allocate_bank_memory(kinfo, gaddr_to_gfn(bank_start), bank_size) )
+            goto fail;
+    }
+
+    if ( kinfo->unassigned_mem )
+        goto fail;
+
+    for( i = 0; i < mem->nr_banks; i++ )
+    {
+        printk(XENLOG_INFO "%pd BANK[%d] %#"PRIpaddr"-%#"PRIpaddr" (%ldMB)\n",
+               d,
+               i,
+               mem->bank[i].start,
+               mem->bank[i].start + mem->bank[i].size,
+               /* Don't want format this as PRIpaddr (16 digit hex) */
+               (unsigned long)(mem->bank[i].size >> 20));
+    }
+
+    xfree(hwdom_free_mem);
+    return;
+
+  fail:
+    panic("Failed to allocate requested domain memory."
+          /* Don't want format this as PRIpaddr (16 digit hex) */
+          " %ldKB unallocated. Fix the VMs configurations.\n",
+          (unsigned long)kinfo->unassigned_mem >> 10);
+}
+
+/* Copy data to guest physical address, then clean the region. */
+typedef unsigned long (*copy_to_guest_phys_cb)(struct domain *d,
+                                               paddr_t gpa,
+                                               void *buf,
+                                               unsigned int len);
+
+void __init dtb_load(struct kernel_info *kinfo,
+                     copy_to_guest_phys_cb copy_to_guest)
+{
+    unsigned long left;
+
+    printk("Loading %pd DTB to 0x%"PRIpaddr"-0x%"PRIpaddr"\n",
+           kinfo->d, kinfo->dtb_paddr,
+           kinfo->dtb_paddr + fdt_totalsize(kinfo->fdt));
+
+    left = copy_to_guest(kinfo->d, kinfo->dtb_paddr,
+                         kinfo->fdt,
+                         fdt_totalsize(kinfo->fdt));
+
+    if ( left != 0 )
+        panic("Unable to copy the DTB to %pd memory (left = %lu bytes)\n",
+              kinfo->d, left);
+    xfree(kinfo->fdt);
+}
+
+void __init initrd_load(struct kernel_info *kinfo,
+                        copy_to_guest_phys_cb copy_to_guest)
+{
+    const struct bootmodule *mod = kinfo->initrd_bootmodule;
+    paddr_t load_addr = kinfo->initrd_paddr;
+    paddr_t paddr, len;
+    int node;
+    int res;
+    __be32 val[2];
+    __be32 *cellp;
+    void __iomem *initrd;
+
+    if ( !mod || !mod->size )
+        return;
+
+    paddr = mod->start;
+    len = mod->size;
+
+    printk("Loading %pd initrd from %"PRIpaddr" to 0x%"PRIpaddr"-0x%"PRIpaddr"\n",
+           kinfo->d, paddr, load_addr, load_addr + len);
+
+    /* Fix up linux,initrd-start and linux,initrd-end in /chosen */
+    node = fdt_path_offset(kinfo->fdt, "/chosen");
+    if ( node < 0 )
+        panic("Cannot find the /chosen node\n");
+
+    cellp = (__be32 *)val;
+    dt_set_cell(&cellp, ARRAY_SIZE(val), load_addr);
+    res = fdt_setprop_inplace(kinfo->fdt, node, "linux,initrd-start",
+                              val, sizeof(val));
+    if ( res )
+        panic("Cannot fix up \"linux,initrd-start\" property\n");
+
+    cellp = (__be32 *)val;
+    dt_set_cell(&cellp, ARRAY_SIZE(val), load_addr + len);
+    res = fdt_setprop_inplace(kinfo->fdt, node, "linux,initrd-end",
+                              val, sizeof(val));
+    if ( res )
+        panic("Cannot fix up \"linux,initrd-end\" property\n");
+
+    initrd = ioremap_wc(paddr, len);
+    if ( !initrd )
+        panic("Unable to map the hwdom initrd\n");
+
+    res = copy_to_guest(kinfo->d, load_addr,
+                        initrd, len);
+    if ( res != 0 )
+        panic("Unable to copy the initrd in the hwdom memory\n");
+
+    iounmap(initrd);
+}
diff --git a/xen/include/xen/fdt-domain-build.h b/xen/include/xen/fdt-domain-build.h
index 41454e75ca..0af2b927fc 100644
--- a/xen/include/xen/fdt-domain-build.h
+++ b/xen/include/xen/fdt-domain-build.h
@@ -5,6 +5,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #if __has_include()
@@ -32,7 +33,37 @@ int make_memory_node(const struct kernel_info *kinfo, int addrcells,
                      int sizecells, const struct membanks *mem);
 int make_timer_node(const struct kernel_info *kinfo);
 
-unsigned int get_allocation_size(paddr_t size);
+
+static inline int get_allocation_size(paddr_t size)
+{
+    /*
+     * get_order_from_bytes returns the order greater than or equal to
+     * the given size, but we need less than or equal. Adding one to
+     * the size pushes an evenly aligned size into the next order, so
+     * we can then unconditionally subtract 1 from the order which is
+     * returned.
+     */
+    return get_order_from_bytes(size + 1) - 1;
+}
+
+typedef unsigned long (*copy_to_guest_phys_cb)(struct domain *d,
+                                               paddr_t gpa,
+                                               void *buf,
+                                               unsigned int len);
+
+void initrd_load(struct kernel_info *kinfo,
+                 copy_to_guest_phys_cb copy_to_guest);
+
+void dtb_load(struct kernel_info *kinfo,
+              copy_to_guest_phys_cb copy_to_guest);
+
+int find_unallocated_memory(const struct kernel_info *kinfo,
+                            const struct membanks *mem_banks[],
+                            unsigned int nr_mem_banks,
+                            struct membanks *free_regions,
+                            int (*cb)(unsigned long s_gfn,
+                                      unsigned long e_gfn,
+                                      void *data));
 
 #endif /* __XEN_FDT_DOMAIN_BUILD_H__ */
 
-- 
2.49.0



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        Mon, 14 Apr 2025 08:56:53 -0700 (PDT)
From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk ,
	Andrew Cooper ,
	Anthony PERARD ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v2 8/8] xen/common: dom0less: introduce common dom0less-build.c
Date: Mon, 14 Apr 2025 17:56:41 +0200
Message-ID: <034190a9d2cfc98306b47dbfe4a70937f5820562.1744626032.git.oleksii.kurochko@gmail.com>
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Part of Arm's dom0less-build.c could be common between architectures which are
using device tree files to create guest domains. Thereby move some parts of
Arm's dom0less-build.c to common code with minor changes.

As a part of theses changes the following changes are introduced:
- Introduce make_arch_nodes() to cover arch-specific nodes. For example, in
  case of Arm, it is PSCI and vpl011 nodes.
- Introduce set_domain_type() to abstract a way how setting of domain type
  happens. For example, RISC-V won't have this member of arch_domain structure
  as vCPUs will always have the same bitness as hypervisor. In case of Arm, it
  is possible that Arm64 could create 32-bit and 64-bit domains.
- Introduce init_vuart() to cover details of virtual uart initialization.
- Introduce init_intc_phandle() to cover some details of interrupt controller
  phandle initialization. As an example, RISC-V could have different name for
  interrupt controller node ( APLIC, PLIC, IMSIC, etc ) but the code in
  domain_handle_dtb_bootmodule() could handle only one interrupt controller
  node name.
- s/make_gic_domU_node/make_intc_domU_node as GIC is Arm specific naming and
  add prototype of make_intc_domU_node() to dom0less-build.h

The following functions are moved to xen/common/device-tree:
- Functions which are moved as is:
  - domain_p2m_pages().
  - handle_passthrough_prop().
  - handle_prop_pfdt().
  - scan_pfdt_node().
  - check_partial_fdt().
- Functions which are moved with some minor changes:
  - alloc_xenstore_evtchn():
    - ifdef-ing by CONFIG_HVM accesses to hvm.params.
  - prepare_dtb_domU():
    - ifdef-ing access to gnttab_{start,size} by CONFIG_GRANT_TABLE.
    - s/make_gic_domU_node/make_intc_domU_node.
    - Add call of make_arch_nodes().
- domain_handle_dtb_bootmodule():
  - hide details of interrupt controller phandle initialization by calling
    init_intc_phandle().
  - Update the comment above init_intc_phandle(): s/gic/interrupt controller.
- construct_domU():
  - ifdef-ing by CONFIG_HVM accesses to hvm.params.
  - Call init_vuart() to hide Arm's vpl011_init() details there.
  - Add call of set_domain_type() instead of setting kinfo->arch.type explicitly.

Some parts of dom0less-build.c are wraped by #ifdef CONFIG_STATIC_{SHMEM,MEMORY}
as not all archs support these configs.

Signed-off-by: Oleksii Kurochko 
---
Change in v2:
 - Wrap by #ifdef CONFIG_STATIC_* inclusions of  and
   . Wrap also the code which uses something from the
   mentioned headers.
 - Add handling of legacy case in construct_domU().
 - Use xen/fdt-kernel.h and xen/fdt-domain-build.h instead of asm/*.
 - Update the commit message.
---
 xen/arch/arm/dom0less-build.c            | 721 ++--------------------
 xen/common/device-tree/dom0less-build.c  | 730 +++++++++++++++++++++++
 xen/include/asm-generic/dom0less-build.h |  14 +
 3 files changed, 779 insertions(+), 686 deletions(-)

diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c
index ca78cff655..463c38ae6c 100644
--- a/xen/arch/arm/dom0less-build.c
+++ b/xen/arch/arm/dom0less-build.c
@@ -147,7 +147,7 @@ static int __init make_gicv3_domU_node(struct kernel_info *kinfo)
 }
 #endif
 
-static int __init make_gic_domU_node(struct kernel_info *kinfo)
+int __init make_intc_domU_node(struct kernel_info *kinfo)
 {
     switch ( kinfo->d->arch.vgic.version )
     {
@@ -213,729 +213,62 @@ static int __init make_vpl011_uart_node(struct kernel_info *kinfo)
 }
 #endif
 
-/*
- * Scan device tree properties for passthrough specific information.
- * Returns < 0 on error
- *         0 on success
- */
-static int __init handle_passthrough_prop(struct kernel_info *kinfo,
-                                          const struct fdt_property *xen_reg,
-                                          const struct fdt_property *xen_path,
-                                          bool xen_force,
-                                          uint32_t address_cells,
-                                          uint32_t size_cells)
-{
-    const __be32 *cell;
-    unsigned int i, len;
-    struct dt_device_node *node;
-    int res;
-    paddr_t mstart, size, gstart;
-
-    /* xen,reg specifies where to map the MMIO region */
-    cell = (const __be32 *)xen_reg->data;
-    len = fdt32_to_cpu(xen_reg->len) / ((address_cells * 2 + size_cells) *
-                                        sizeof(uint32_t));
-
-    for ( i = 0; i < len; i++ )
-    {
-        device_tree_get_reg(&cell, address_cells, size_cells,
-                            &mstart, &size);
-        gstart = dt_next_cell(address_cells, &cell);
-
-        if ( gstart & ~PAGE_MASK || mstart & ~PAGE_MASK || size & ~PAGE_MASK )
-        {
-            printk(XENLOG_ERR
-                   "DomU passthrough config has not page aligned addresses/sizes\n");
-            return -EINVAL;
-        }
-
-        res = iomem_permit_access(kinfo->d, paddr_to_pfn(mstart),
-                                  paddr_to_pfn(PAGE_ALIGN(mstart + size - 1)));
-        if ( res )
-        {
-            printk(XENLOG_ERR "Unable to permit to dom%d access to"
-                   " 0x%"PRIpaddr" - 0x%"PRIpaddr"\n",
-                   kinfo->d->domain_id,
-                   mstart & PAGE_MASK, PAGE_ALIGN(mstart + size) - 1);
-            return res;
-        }
-
-        res = map_regions_p2mt(kinfo->d,
-                               gaddr_to_gfn(gstart),
-                               PFN_DOWN(size),
-                               maddr_to_mfn(mstart),
-                               p2m_mmio_direct_dev);
-        if ( res < 0 )
-        {
-            printk(XENLOG_ERR
-                   "Failed to map %"PRIpaddr" to the guest at%"PRIpaddr"\n",
-                   mstart, gstart);
-            return -EFAULT;
-        }
-    }
-
-    /*
-     * If xen_force, we let the user assign a MMIO region with no
-     * associated path.
-     */
-    if ( xen_path == NULL )
-        return xen_force ? 0 : -EINVAL;
-
-    /*
-     * xen,path specifies the corresponding node in the host DT.
-     * Both interrupt mappings and IOMMU settings are based on it,
-     * as they are done based on the corresponding host DT node.
-     */
-    node = dt_find_node_by_path(xen_path->data);
-    if ( node == NULL )
-    {
-        printk(XENLOG_ERR "Couldn't find node %s in host_dt!\n",
-               xen_path->data);
-        return -EINVAL;
-    }
-
-    res = map_device_irqs_to_domain(kinfo->d, node, true, NULL);
-    if ( res < 0 )
-        return res;
-
-    res = iommu_add_dt_device(node);
-    if ( res < 0 )
-        return res;
-
-    /* If xen_force, we allow assignment of devices without IOMMU protection. */
-    if ( xen_force && !dt_device_is_protected(node) )
-        return 0;
-
-    return iommu_assign_dt_device(kinfo->d, node);
-}
-
-static int __init handle_prop_pfdt(struct kernel_info *kinfo,
-                                   const void *pfdt, int nodeoff,
-                                   uint32_t address_cells, uint32_t size_cells,
-                                   bool scan_passthrough_prop)
-{
-    void *fdt = kinfo->fdt;
-    int propoff, nameoff, res;
-    const struct fdt_property *prop, *xen_reg = NULL, *xen_path = NULL;
-    const char *name;
-    bool found, xen_force = false;
-
-    for ( propoff = fdt_first_property_offset(pfdt, nodeoff);
-          propoff >= 0;
-          propoff = fdt_next_property_offset(pfdt, propoff) )
-    {
-        if ( !(prop = fdt_get_property_by_offset(pfdt, propoff, NULL)) )
-            return -FDT_ERR_INTERNAL;
-
-        found = false;
-        nameoff = fdt32_to_cpu(prop->nameoff);
-        name = fdt_string(pfdt, nameoff);
-
-        if ( scan_passthrough_prop )
-        {
-            if ( dt_prop_cmp("xen,reg", name) == 0 )
-            {
-                xen_reg = prop;
-                found = true;
-            }
-            else if ( dt_prop_cmp("xen,path", name) == 0 )
-            {
-                xen_path = prop;
-                found = true;
-            }
-            else if ( dt_prop_cmp("xen,force-assign-without-iommu",
-                                  name) == 0 )
-            {
-                xen_force = true;
-                found = true;
-            }
-        }
-
-        /*
-         * Copy properties other than the ones above: xen,reg, xen,path,
-         * and xen,force-assign-without-iommu.
-         */
-        if ( !found )
-        {
-            res = fdt_property(fdt, name, prop->data, fdt32_to_cpu(prop->len));
-            if ( res )
-                return res;
-        }
-    }
-
-    /*
-     * Only handle passthrough properties if both xen,reg and xen,path
-     * are present, or if xen,force-assign-without-iommu is specified.
-     */
-    if ( xen_reg != NULL && (xen_path != NULL || xen_force) )
-    {
-        res = handle_passthrough_prop(kinfo, xen_reg, xen_path, xen_force,
-                                      address_cells, size_cells);
-        if ( res < 0 )
-        {
-            printk(XENLOG_ERR "Failed to assign device to %pd\n", kinfo->d);
-            return res;
-        }
-    }
-    else if ( (xen_path && !xen_reg) || (xen_reg && !xen_path && !xen_force) )
-    {
-        printk(XENLOG_ERR "xen,reg or xen,path missing for %pd\n",
-               kinfo->d);
-        return -EINVAL;
-    }
-
-    /* FDT_ERR_NOTFOUND => There is no more properties for this node */
-    return ( propoff != -FDT_ERR_NOTFOUND ) ? propoff : 0;
-}
-
-static int __init scan_pfdt_node(struct kernel_info *kinfo, const void *pfdt,
-                                 int nodeoff,
-                                 uint32_t address_cells, uint32_t size_cells,
-                                 bool scan_passthrough_prop)
-{
-    int rc = 0;
-    void *fdt = kinfo->fdt;
-    int node_next;
-
-    rc = fdt_begin_node(fdt, fdt_get_name(pfdt, nodeoff, NULL));
-    if ( rc )
-        return rc;
-
-    rc = handle_prop_pfdt(kinfo, pfdt, nodeoff, address_cells, size_cells,
-                          scan_passthrough_prop);
-    if ( rc )
-        return rc;
-
-    address_cells = device_tree_get_u32(pfdt, nodeoff, "#address-cells",
-                                        DT_ROOT_NODE_ADDR_CELLS_DEFAULT);
-    size_cells = device_tree_get_u32(pfdt, nodeoff, "#size-cells",
-                                     DT_ROOT_NODE_SIZE_CELLS_DEFAULT);
-
-    node_next = fdt_first_subnode(pfdt, nodeoff);
-    while ( node_next > 0 )
-    {
-        rc = scan_pfdt_node(kinfo, pfdt, node_next, address_cells, size_cells,
-                            scan_passthrough_prop);
-        if ( rc )
-            return rc;
-
-        node_next = fdt_next_subnode(pfdt, node_next);
-    }
-
-    return fdt_end_node(fdt);
-}
-
-static int __init check_partial_fdt(void *pfdt, size_t size)
-{
-    int res;
-
-    if ( fdt_magic(pfdt) != FDT_MAGIC )
-    {
-        dprintk(XENLOG_ERR, "Partial FDT is not a valid Flat Device Tree");
-        return -EINVAL;
-    }
-
-    res = fdt_check_header(pfdt);
-    if ( res )
-    {
-        dprintk(XENLOG_ERR, "Failed to check the partial FDT (%d)", res);
-        return -EINVAL;
-    }
-
-    if ( fdt_totalsize(pfdt) > size )
-    {
-        dprintk(XENLOG_ERR, "Partial FDT totalsize is too big");
-        return -EINVAL;
-    }
-
-    return 0;
-}
-
-static int __init domain_handle_dtb_bootmodule(struct domain *d,
-                                               struct kernel_info *kinfo)
-{
-    void *pfdt;
-    int res, node_next;
-
-    pfdt = ioremap_cache(kinfo->dtb_bootmodule->start,
-                         kinfo->dtb_bootmodule->size);
-    if ( pfdt == NULL )
-        return -EFAULT;
-
-    res = check_partial_fdt(pfdt, kinfo->dtb_bootmodule->size);
-    if ( res < 0 )
-        goto out;
-
-    for ( node_next = fdt_first_subnode(pfdt, 0);
-          node_next > 0;
-          node_next = fdt_next_subnode(pfdt, node_next) )
-    {
-        const char *name = fdt_get_name(pfdt, node_next, NULL);
-
-        if ( name == NULL )
-            continue;
-
-        /*
-         * Only scan /gic /aliases /passthrough, ignore the rest.
-         * They don't have to be parsed in order.
-         *
-         * Take the GIC phandle value from the special /gic node in the
-         * DTB fragment.
-         */
-        if ( dt_node_cmp(name, "gic") == 0 )
-        {
-            uint32_t phandle_intc = fdt_get_phandle(pfdt, node_next);
-
-            if ( phandle_intc != 0 )
-                kinfo->phandle_intc = phandle_intc;
-            continue;
-        }
-
-        if ( dt_node_cmp(name, "aliases") == 0 )
-        {
-            res = scan_pfdt_node(kinfo, pfdt, node_next,
-                                 DT_ROOT_NODE_ADDR_CELLS_DEFAULT,
-                                 DT_ROOT_NODE_SIZE_CELLS_DEFAULT,
-                                 false);
-            if ( res )
-                goto out;
-            continue;
-        }
-        if ( dt_node_cmp(name, "passthrough") == 0 )
-        {
-            res = scan_pfdt_node(kinfo, pfdt, node_next,
-                                 DT_ROOT_NODE_ADDR_CELLS_DEFAULT,
-                                 DT_ROOT_NODE_SIZE_CELLS_DEFAULT,
-                                 true);
-            if ( res )
-                goto out;
-            continue;
-        }
-    }
-
- out:
-    iounmap(pfdt);
-
-    return res;
-}
-
-/*
- * The max size for DT is 2MB. However, the generated DT is small (not including
- * domU passthrough DT nodes whose size we account separately), 4KB are enough
- * for now, but we might have to increase it in the future.
- */
-#define DOMU_DTB_SIZE 4096
-static int __init prepare_dtb_domU(struct domain *d, struct kernel_info *kinfo)
+int __init make_arch_nodes(struct kernel_info *kinfo)
 {
-    int addrcells, sizecells;
-    int ret, fdt_size = DOMU_DTB_SIZE;
-
-    kinfo->phandle_intc = GUEST_PHANDLE_GIC;
-    kinfo->gnttab_start = GUEST_GNTTAB_BASE;
-    kinfo->gnttab_size = GUEST_GNTTAB_SIZE;
-
-    addrcells = GUEST_ROOT_ADDRESS_CELLS;
-    sizecells = GUEST_ROOT_SIZE_CELLS;
-
-    /* Account for domU passthrough DT size */
-    if ( kinfo->dtb_bootmodule )
-        fdt_size += kinfo->dtb_bootmodule->size;
-
-    /* Cap to max DT size if needed */
-    fdt_size = min(fdt_size, SZ_2M);
-
-    kinfo->fdt = xmalloc_bytes(fdt_size);
-    if ( kinfo->fdt == NULL )
-        return -ENOMEM;
-
-    ret = fdt_create(kinfo->fdt, fdt_size);
-    if ( ret < 0 )
-        goto err;
-
-    ret = fdt_finish_reservemap(kinfo->fdt);
-    if ( ret < 0 )
-        goto err;
-
-    ret = fdt_begin_node(kinfo->fdt, "");
-    if ( ret < 0 )
-        goto err;
-
-    ret = fdt_property_cell(kinfo->fdt, "#address-cells", addrcells);
-    if ( ret )
-        goto err;
-
-    ret = fdt_property_cell(kinfo->fdt, "#size-cells", sizecells);
-    if ( ret )
-        goto err;
-
-    ret = make_chosen_node(kinfo);
-    if ( ret )
-        goto err;
+    int ret;
 
     ret = make_psci_node(kinfo->fdt);
     if ( ret )
-        goto err;
-
-    ret = make_cpus_node(d, kinfo->fdt);
-    if ( ret )
-        goto err;
-
-    ret = make_memory_node(kinfo, addrcells, sizecells,
-                           kernel_info_get_mem(kinfo));
-    if ( ret )
-        goto err;
-
-    ret = make_resv_memory_node(kinfo, addrcells, sizecells);
-    if ( ret )
-        goto err;
-
-    /*
-     * domain_handle_dtb_bootmodule has to be called before the rest of
-     * the device tree is generated because it depends on the value of
-     * the field phandle_intc.
-     */
-    if ( kinfo->dtb_bootmodule )
-    {
-        ret = domain_handle_dtb_bootmodule(d, kinfo);
-        if ( ret )
-            goto err;
-    }
-
-    ret = make_gic_domU_node(kinfo);
-    if ( ret )
-        goto err;
-
-    ret = make_timer_node(kinfo);
-    if ( ret )
-        goto err;
+        return -EINVAL;
 
     if ( kinfo->vuart )
     {
-        ret = -EINVAL;
 #ifdef CONFIG_SBSA_VUART_CONSOLE
         ret = make_vpl011_uart_node(kinfo);
 #endif
         if ( ret )
-            goto err;
-    }
-
-    if ( kinfo->dom0less_feature & DOM0LESS_ENHANCED_NO_XS )
-    {
-        ret = make_hypervisor_node(d, kinfo, addrcells, sizecells);
-        if ( ret )
-            goto err;
+            return -EINVAL;
     }
 
-    ret = fdt_end_node(kinfo->fdt);
-    if ( ret < 0 )
-        goto err;
-
-    ret = fdt_finish(kinfo->fdt);
-    if ( ret < 0 )
-        goto err;
-
     return 0;
-
-  err:
-    printk("Device tree generation failed (%d).\n", ret);
-    xfree(kinfo->fdt);
-
-    return -EINVAL;
 }
 
-static int __init alloc_xenstore_evtchn(struct domain *d)
+/* TODO: make arch.type generic ? */
+#ifdef CONFIG_ARM_64
+void __init set_domain_type(struct domain *d, struct kernel_info *kinfo)
 {
-    evtchn_alloc_unbound_t alloc;
-    int rc;
-
-    alloc.dom = d->domain_id;
-    alloc.remote_dom = hardware_domain->domain_id;
-    rc = evtchn_alloc_unbound(&alloc, 0);
-    if ( rc )
-    {
-        printk("Failed allocating event channel for domain\n");
-        return rc;
-    }
-
-    d->arch.hvm.params[HVM_PARAM_STORE_EVTCHN] = alloc.port;
-
-    return 0;
+    /* type must be set before allocate memory */
+    d->arch.type = kinfo->arch.type;
 }
-
-#define XENSTORE_PFN_OFFSET 1
-static int __init alloc_xenstore_page(struct domain *d)
+#else
+void __init set_domain_type(struct domain *d, struct kernel_info *kinfo)
 {
-    struct page_info *xenstore_pg;
-    struct xenstore_domain_interface *interface;
-    mfn_t mfn;
-    gfn_t gfn;
-    int rc;
-
-    if ( (UINT_MAX - d->max_pages) < 1 )
-    {
-        printk(XENLOG_ERR "%pd: Over-allocation for d->max_pages by 1 page.\n",
-               d);
-        return -EINVAL;
-    }
-
-    d->max_pages += 1;
-    xenstore_pg = alloc_domheap_page(d, MEMF_bits(32));
-    if ( xenstore_pg == NULL && is_64bit_domain(d) )
-        xenstore_pg = alloc_domheap_page(d, 0);
-    if ( xenstore_pg == NULL )
-        return -ENOMEM;
-
-    mfn = page_to_mfn(xenstore_pg);
-    if ( !mfn_x(mfn) )
-        return -ENOMEM;
-
-    if ( !is_domain_direct_mapped(d) )
-        gfn = gaddr_to_gfn(GUEST_MAGIC_BASE +
-                           (XENSTORE_PFN_OFFSET << PAGE_SHIFT));
-    else
-        gfn = gaddr_to_gfn(mfn_to_maddr(mfn));
-
-    rc = guest_physmap_add_page(d, gfn, mfn, 0);
-    if ( rc )
-    {
-        free_domheap_page(xenstore_pg);
-        return rc;
-    }
-
-    d->arch.hvm.params[HVM_PARAM_STORE_PFN] = gfn_x(gfn);
-    interface = map_domain_page(mfn);
-    interface->connection = XENSTORE_RECONNECT;
-    unmap_domain_page(interface);
-
-    return 0;
+    /* Nothing to do */
 }
+#endif
 
-static int __init alloc_xenstore_params(struct kernel_info *kinfo)
+int __init init_vuart(struct domain *d, struct kernel_info *kinfo,
+                      const struct dt_device_node *node)
 {
-    struct domain *d = kinfo->d;
     int rc = 0;
 
-    if ( kinfo->dom0less_feature & (DOM0LESS_XENSTORE | DOM0LESS_XS_LEGACY) )
-    {
-        ASSERT(hardware_domain);
-        rc = alloc_xenstore_evtchn(d);
-        if ( rc < 0 )
-            return rc;
-        d->arch.hvm.params[HVM_PARAM_STORE_PFN] = ~0ULL;
-    }
-
-    if ( kinfo->dom0less_feature & DOM0LESS_XENSTORE )
-    {
-        rc = alloc_xenstore_page(d);
-        if ( rc < 0 )
-            return rc;
-    }
-
-    return rc;
-}
-
-static void __init domain_vcpu_affinity(struct domain *d,
-                                        const struct dt_device_node *node)
-{
-    struct dt_device_node *np;
-
-    dt_for_each_child_node(node, np)
-    {
-        const char *hard_affinity_str = NULL;
-        uint32_t val;
-        int rc;
-        struct vcpu *v;
-        cpumask_t affinity;
-
-        if ( !dt_device_is_compatible(np, "xen,vcpu") )
-            continue;
-
-        if ( !dt_property_read_u32(np, "id", &val) )
-            panic("Invalid xen,vcpu node for domain %s\n", dt_node_name(node));
-
-        if ( val >= d->max_vcpus )
-            panic("Invalid vcpu_id %u for domain %s, max_vcpus=%u\n", val,
-                  dt_node_name(node), d->max_vcpus);
-
-        v = d->vcpu[val];
-        rc = dt_property_read_string(np, "hard-affinity", &hard_affinity_str);
-        if ( rc < 0 )
-            continue;
-
-        cpumask_clear(&affinity);
-        while ( *hard_affinity_str != '\0' )
-        {
-            unsigned int start, end;
-
-            start = simple_strtoul(hard_affinity_str, &hard_affinity_str, 0);
-
-            if ( *hard_affinity_str == '-' )    /* Range */
-            {
-                hard_affinity_str++;
-                end = simple_strtoul(hard_affinity_str, &hard_affinity_str, 0);
-            }
-            else                /* Single value */
-                end = start;
-
-            if ( end >= nr_cpu_ids )
-                panic("Invalid pCPU %u for domain %s\n", end, dt_node_name(node));
-
-            for ( ; start <= end; start++ )
-                cpumask_set_cpu(start, &affinity);
-
-            if ( *hard_affinity_str == ',' )
-                hard_affinity_str++;
-            else if ( *hard_affinity_str != '\0' )
-                break;
-        }
-
-        rc = vcpu_set_hard_affinity(v, &affinity);
-        if ( rc )
-            panic("vcpu%d: failed (rc=%d) to set hard affinity for domain %s\n",
-                  v->vcpu_id, rc, dt_node_name(node));
-    }
-}
-
-#ifdef CONFIG_ARCH_PAGING_MEMPOOL
-static unsigned long __init domain_p2m_pages(unsigned long maxmem_kb,
-                                             unsigned int smp_cpus)
-{
-    /*
-     * Keep in sync with libxl__get_required_paging_memory().
-     * 256 pages (1MB) per vcpu, plus 1 page per MiB of RAM for the P2M map,
-     * plus 128 pages to cover extended regions.
-     */
-    unsigned long memkb = 4 * (256 * smp_cpus + (maxmem_kb / 1024) + 128);
-
-    BUILD_BUG_ON(PAGE_SIZE != SZ_4K);
-
-    return DIV_ROUND_UP(memkb, 1024) << (20 - PAGE_SHIFT);
-}
-
-static int __init domain_p2m_set_allocation(struct domain *d, uint64_t mem,
-                                            const struct dt_device_node *node)
-{
-    unsigned long p2m_pages;
-    uint32_t p2m_mem_mb;
-    int rc;
-
-    rc = dt_property_read_u32(node, "xen,domain-p2m-mem-mb", &p2m_mem_mb);
-    /* If xen,domain-p2m-mem-mb is not specified, use the default value. */
-    p2m_pages = rc ?
-                p2m_mem_mb << (20 - PAGE_SHIFT) :
-                domain_p2m_pages(mem, d->max_vcpus);
-
-    spin_lock(&d->arch.paging.lock);
-    rc = p2m_set_allocation(d, p2m_pages, NULL);
-    spin_unlock(&d->arch.paging.lock);
-
-    return rc;
-}
-#else /* !CONFIG_ARCH_PAGING_MEMPOOL */
-static inline int domain_p2m_set_allocation(struct domain *d, uint64_t mem,
-                                            const struct dt_device_node *node)
-{
-    return 0;
-}
-#endif /* CONFIG_ARCH_PAGING_MEMPOOL */
-
-int __init construct_domU(struct domain *d,
-                          const struct dt_device_node *node)
-{
-    struct kernel_info kinfo = KERNEL_INFO_INIT;
-    const char *dom0less_enhanced;
-    int rc;
-    u64 mem;
-
-    rc = dt_property_read_u64(node, "memory", &mem);
-    if ( !rc )
-    {
-        printk("Error building DomU: cannot read \"memory\" property\n");
-        return -EINVAL;
-    }
-    kinfo.unassigned_mem = (paddr_t)mem * SZ_1K;
-
-    rc = domain_p2m_set_allocation(d, mem, node);
-    if ( rc != 0 )
-        return rc;
-
-    printk("*** LOADING DOMU cpus=%u memory=%#"PRIx64"KB ***\n",
-           d->max_vcpus, mem);
-
-    kinfo.vuart = dt_property_read_bool(node, "vpl011");
-
-    rc = dt_property_read_string(node, "xen,enhanced", &dom0less_enhanced);
-    if ( rc == -EILSEQ ||
-         rc == -ENODATA ||
-         (rc == 0 && !strcmp(dom0less_enhanced, "enabled")) )
-    {
-        if ( hardware_domain )
-            kinfo.dom0less_feature = DOM0LESS_ENHANCED;
-        else
-            panic("At the moment, Xenstore support requires dom0 to be present\n");
-    }
-    else if ( rc == 0 && !strcmp(dom0less_enhanced, "legacy") )
-    {
-        if ( hardware_domain )
-            kinfo.dom0less_feature = DOM0LESS_ENHANCED_LEGACY;
-        else
-            panic("At the moment, Xenstore support requires dom0 to be present\n");
-    }
-    else if ( rc == 0 && !strcmp(dom0less_enhanced, "no-xenstore") )
-        kinfo.dom0less_feature = DOM0LESS_ENHANCED_NO_XS;
-
-    if ( vcpu_create(d, 0) == NULL )
-        return -ENOMEM;
-
-    d->max_pages = ((paddr_t)mem * SZ_1K) >> PAGE_SHIFT;
-
-    kinfo.d = d;
-
-    rc = kernel_probe(&kinfo, node);
-    if ( rc < 0 )
-        return rc;
-
-#ifdef CONFIG_ARM_64
-    /* type must be set before allocate memory */
-    d->arch.type = kinfo.arch.type;
-#endif
-    if ( !dt_find_property(node, "xen,static-mem", NULL) )
-        allocate_memory(d, &kinfo);
-    else if ( !is_domain_direct_mapped(d) )
-        allocate_static_memory(d, &kinfo, node);
-    else
-        assign_static_memory_11(d, &kinfo, node);
-
-    rc = process_shm(d, &kinfo, node);
-    if ( rc < 0 )
-        return rc;
+    kinfo->vuart = dt_property_read_bool(node, "vpl011");
 
     /*
      * Base address and irq number are needed when creating vpl011 device
      * tree node in prepare_dtb_domU, so initialization on related variables
      * shall be done first.
      */
-    if ( kinfo.vuart )
+    if ( kinfo->vuart )
     {
         rc = domain_vpl011_init(d, NULL);
         if ( rc < 0 )
             return rc;
     }
 
-    rc = prepare_dtb_domU(d, &kinfo);
-    if ( rc < 0 )
-        return rc;
-
-    rc = construct_domain(d, &kinfo);
-    if ( rc < 0 )
-        return rc;
-
-    domain_vcpu_affinity(d, node);
-
-    return alloc_xenstore_params(&kinfo);
+    return rc;
 }
 
-
 struct xen_domctl_createdomain __init arch_xen_domctl_createdomain(void)
 {
     struct xen_domctl_createdomain d_cfg = {
@@ -1024,6 +357,22 @@ void __init arch_create_domus(struct dt_device_node *node,
     }
 }
 
+int __init init_intc_phandle(struct kernel_info *kinfo, const char *name,
+                             const int node_next, const void *pfdt)
+{
+    if ( dt_node_cmp(name, "gic") == 0 )
+    {
+        uint32_t phandle_intc = fdt_get_phandle(pfdt, node_next);
+
+        if ( phandle_intc != 0 )
+            kinfo->phandle_intc = phandle_intc;
+
+        return 0;
+    }
+
+    return 1;
+}
+
 /*
  * Local variables:
  * mode: C
diff --git a/xen/common/device-tree/dom0less-build.c b/xen/common/device-tree/dom0less-build.c
index 19bfa5e005..9ee0e25deb 100644
--- a/xen/common/device-tree/dom0less-build.c
+++ b/xen/common/device-tree/dom0less-build.c
@@ -2,19 +2,36 @@
 #include 
 #include 
 #include 
+#include 
 #include 
+#include 
+#include 
+#include 
 #include 
+#include 
 #include 
+#include 
 #include 
+#include 
 #include 
 #include 
 #include 
+#include 
 
 #include 
+#include 
 
 #include 
 #include 
 
+#ifdef CONFIG_STATIC_MEMORY
+#include 
+#endif
+
+#ifdef CONFIG_STATIC_SHM
+#include 
+#endif
+
 bool __init is_dom0less_mode(void)
 {
     struct bootmodules *mods = &bootinfo.modules;
@@ -159,3 +176,716 @@ void __init create_domUs(void)
                   dt_node_name(node), rc);
     }
 }
+
+/*
+ * Scan device tree properties for passthrough specific information.
+ * Returns < 0 on error
+ *         0 on success
+ */
+static int __init handle_passthrough_prop(struct kernel_info *kinfo,
+                                          const struct fdt_property *xen_reg,
+                                          const struct fdt_property *xen_path,
+                                          bool xen_force,
+                                          uint32_t address_cells,
+                                          uint32_t size_cells)
+{
+    const __be32 *cell;
+    unsigned int i, len;
+    struct dt_device_node *node;
+    int res;
+    paddr_t mstart, size, gstart;
+
+    /* xen,reg specifies where to map the MMIO region */
+    cell = (const __be32 *)xen_reg->data;
+    len = fdt32_to_cpu(xen_reg->len) / ((address_cells * 2 + size_cells) *
+                                        sizeof(uint32_t));
+
+    for ( i = 0; i < len; i++ )
+    {
+        device_tree_get_reg(&cell, address_cells, size_cells,
+                            &mstart, &size);
+        gstart = dt_next_cell(address_cells, &cell);
+
+        if ( gstart & ~PAGE_MASK || mstart & ~PAGE_MASK || size & ~PAGE_MASK )
+        {
+            printk(XENLOG_ERR
+                   "DomU passthrough config has not page aligned addresses/sizes\n");
+            return -EINVAL;
+        }
+
+        res = iomem_permit_access(kinfo->d, paddr_to_pfn(mstart),
+                                  paddr_to_pfn(PAGE_ALIGN(mstart + size - 1)));
+        if ( res )
+        {
+            printk(XENLOG_ERR "Unable to permit to dom%d access to"
+                   " 0x%"PRIpaddr" - 0x%"PRIpaddr"\n",
+                   kinfo->d->domain_id,
+                   mstart & PAGE_MASK, PAGE_ALIGN(mstart + size) - 1);
+            return res;
+        }
+
+        res = map_regions_p2mt(kinfo->d,
+                               gaddr_to_gfn(gstart),
+                               PFN_DOWN(size),
+                               maddr_to_mfn(mstart),
+                               p2m_mmio_direct_dev);
+        if ( res < 0 )
+        {
+            printk(XENLOG_ERR
+                   "Failed to map %"PRIpaddr" to the guest at%"PRIpaddr"\n",
+                   mstart, gstart);
+            return -EFAULT;
+        }
+    }
+
+    /*
+     * If xen_force, we let the user assign a MMIO region with no
+     * associated path.
+     */
+    if ( xen_path == NULL )
+        return xen_force ? 0 : -EINVAL;
+
+    /*
+     * xen,path specifies the corresponding node in the host DT.
+     * Both interrupt mappings and IOMMU settings are based on it,
+     * as they are done based on the corresponding host DT node.
+     */
+    node = dt_find_node_by_path(xen_path->data);
+    if ( node == NULL )
+    {
+        printk(XENLOG_ERR "Couldn't find node %s in host_dt!\n",
+               xen_path->data);
+        return -EINVAL;
+    }
+
+    res = map_device_irqs_to_domain(kinfo->d, node, true, NULL);
+    if ( res < 0 )
+        return res;
+
+    res = iommu_add_dt_device(node);
+    if ( res < 0 )
+        return res;
+
+    /* If xen_force, we allow assignment of devices without IOMMU protection. */
+    if ( xen_force && !dt_device_is_protected(node) )
+        return 0;
+
+    return iommu_assign_dt_device(kinfo->d, node);
+}
+
+static int __init handle_prop_pfdt(struct kernel_info *kinfo,
+                                   const void *pfdt, int nodeoff,
+                                   uint32_t address_cells, uint32_t size_cells,
+                                   bool scan_passthrough_prop)
+{
+    void *fdt = kinfo->fdt;
+    int propoff, nameoff, res;
+    const struct fdt_property *prop, *xen_reg = NULL, *xen_path = NULL;
+    const char *name;
+    bool found, xen_force = false;
+
+    for ( propoff = fdt_first_property_offset(pfdt, nodeoff);
+          propoff >= 0;
+          propoff = fdt_next_property_offset(pfdt, propoff) )
+    {
+        if ( !(prop = fdt_get_property_by_offset(pfdt, propoff, NULL)) )
+            return -FDT_ERR_INTERNAL;
+
+        found = false;
+        nameoff = fdt32_to_cpu(prop->nameoff);
+        name = fdt_string(pfdt, nameoff);
+
+        if ( scan_passthrough_prop )
+        {
+            if ( dt_prop_cmp("xen,reg", name) == 0 )
+            {
+                xen_reg = prop;
+                found = true;
+            }
+            else if ( dt_prop_cmp("xen,path", name) == 0 )
+            {
+                xen_path = prop;
+                found = true;
+            }
+            else if ( dt_prop_cmp("xen,force-assign-without-iommu",
+                                  name) == 0 )
+            {
+                xen_force = true;
+                found = true;
+            }
+        }
+
+        /*
+         * Copy properties other than the ones above: xen,reg, xen,path,
+         * and xen,force-assign-without-iommu.
+         */
+        if ( !found )
+        {
+            res = fdt_property(fdt, name, prop->data, fdt32_to_cpu(prop->len));
+            if ( res )
+                return res;
+        }
+    }
+
+    /*
+     * Only handle passthrough properties if both xen,reg and xen,path
+     * are present, or if xen,force-assign-without-iommu is specified.
+     */
+    if ( xen_reg != NULL && (xen_path != NULL || xen_force) )
+    {
+        res = handle_passthrough_prop(kinfo, xen_reg, xen_path, xen_force,
+                                      address_cells, size_cells);
+        if ( res < 0 )
+        {
+            printk(XENLOG_ERR "Failed to assign device to %pd\n", kinfo->d);
+            return res;
+        }
+    }
+    else if ( (xen_path && !xen_reg) || (xen_reg && !xen_path && !xen_force) )
+    {
+        printk(XENLOG_ERR "xen,reg or xen,path missing for %pd\n",
+               kinfo->d);
+        return -EINVAL;
+    }
+
+    /* FDT_ERR_NOTFOUND => There is no more properties for this node */
+    return ( propoff != -FDT_ERR_NOTFOUND ) ? propoff : 0;
+}
+
+static int __init scan_pfdt_node(struct kernel_info *kinfo, const void *pfdt,
+                                 int nodeoff,
+                                 uint32_t address_cells, uint32_t size_cells,
+                                 bool scan_passthrough_prop)
+{
+    int rc = 0;
+    void *fdt = kinfo->fdt;
+    int node_next;
+
+    rc = fdt_begin_node(fdt, fdt_get_name(pfdt, nodeoff, NULL));
+    if ( rc )
+        return rc;
+
+    rc = handle_prop_pfdt(kinfo, pfdt, nodeoff, address_cells, size_cells,
+                          scan_passthrough_prop);
+    if ( rc )
+        return rc;
+
+    address_cells = device_tree_get_u32(pfdt, nodeoff, "#address-cells",
+                                        DT_ROOT_NODE_ADDR_CELLS_DEFAULT);
+    size_cells = device_tree_get_u32(pfdt, nodeoff, "#size-cells",
+                                     DT_ROOT_NODE_SIZE_CELLS_DEFAULT);
+
+    node_next = fdt_first_subnode(pfdt, nodeoff);
+    while ( node_next > 0 )
+    {
+        rc = scan_pfdt_node(kinfo, pfdt, node_next, address_cells, size_cells,
+                            scan_passthrough_prop);
+        if ( rc )
+            return rc;
+
+        node_next = fdt_next_subnode(pfdt, node_next);
+    }
+
+    return fdt_end_node(fdt);
+}
+
+static int __init check_partial_fdt(void *pfdt, size_t size)
+{
+    int res;
+
+    if ( fdt_magic(pfdt) != FDT_MAGIC )
+    {
+        dprintk(XENLOG_ERR, "Partial FDT is not a valid Flat Device Tree");
+        return -EINVAL;
+    }
+
+    res = fdt_check_header(pfdt);
+    if ( res )
+    {
+        dprintk(XENLOG_ERR, "Failed to check the partial FDT (%d)", res);
+        return -EINVAL;
+    }
+
+    if ( fdt_totalsize(pfdt) > size )
+    {
+        dprintk(XENLOG_ERR, "Partial FDT totalsize is too big");
+        return -EINVAL;
+    }
+
+    return 0;
+}
+
+static int __init domain_handle_dtb_bootmodule(struct domain *d,
+                                               struct kernel_info *kinfo)
+{
+    void *pfdt;
+    int res, node_next;
+
+    pfdt = ioremap_cache(kinfo->dtb_bootmodule->start,
+                         kinfo->dtb_bootmodule->size);
+    if ( pfdt == NULL )
+        return -EFAULT;
+
+    res = check_partial_fdt(pfdt, kinfo->dtb_bootmodule->size);
+    if ( res < 0 )
+        goto out;
+
+    for ( node_next = fdt_first_subnode(pfdt, 0);
+          node_next > 0;
+          node_next = fdt_next_subnode(pfdt, node_next) )
+    {
+        const char *name = fdt_get_name(pfdt, node_next, NULL);
+
+        if ( name == NULL )
+            continue;
+
+        /*
+         * Only scan /$(interrupt_controller) /aliases /passthrough,
+         * ignore the rest.
+         * They don't have to be parsed in order.
+         *
+         * Take the interrupt controller phandle value from the special
+         * interrupt controller node in the DTB fragment.
+         */
+        if ( init_intc_phandle(kinfo, name, node_next, pfdt) == 0 )
+            continue;
+
+        if ( dt_node_cmp(name, "aliases") == 0 )
+        {
+            res = scan_pfdt_node(kinfo, pfdt, node_next,
+                                 DT_ROOT_NODE_ADDR_CELLS_DEFAULT,
+                                 DT_ROOT_NODE_SIZE_CELLS_DEFAULT,
+                                 false);
+            if ( res )
+                goto out;
+            continue;
+        }
+        if ( dt_node_cmp(name, "passthrough") == 0 )
+        {
+            res = scan_pfdt_node(kinfo, pfdt, node_next,
+                                 DT_ROOT_NODE_ADDR_CELLS_DEFAULT,
+                                 DT_ROOT_NODE_SIZE_CELLS_DEFAULT,
+                                 true);
+            if ( res )
+                goto out;
+            continue;
+        }
+    }
+
+ out:
+    iounmap(pfdt);
+
+    return res;
+}
+
+/*
+ * The max size for DT is 2MB. However, the generated DT is small (not including
+ * domU passthrough DT nodes whose size we account separately), 4KB are enough
+ * for now, but we might have to increase it in the future.
+ */
+#define DOMU_DTB_SIZE 4096
+static int __init prepare_dtb_domU(struct domain *d, struct kernel_info *kinfo)
+{
+    int addrcells, sizecells;
+    int ret, fdt_size = DOMU_DTB_SIZE;
+
+    kinfo->phandle_intc = GUEST_PHANDLE_GIC;
+
+#ifdef CONFIG_GRANT_TABLE
+    kinfo->gnttab_start = GUEST_GNTTAB_BASE;
+    kinfo->gnttab_size = GUEST_GNTTAB_SIZE;
+#endif
+
+    addrcells = GUEST_ROOT_ADDRESS_CELLS;
+    sizecells = GUEST_ROOT_SIZE_CELLS;
+
+    /* Account for domU passthrough DT size */
+    if ( kinfo->dtb_bootmodule )
+        fdt_size += kinfo->dtb_bootmodule->size;
+
+    /* Cap to max DT size if needed */
+    fdt_size = min(fdt_size, SZ_2M);
+
+    kinfo->fdt = xmalloc_bytes(fdt_size);
+    if ( kinfo->fdt == NULL )
+        return -ENOMEM;
+
+    ret = fdt_create(kinfo->fdt, fdt_size);
+    if ( ret < 0 )
+        goto err;
+
+    ret = fdt_finish_reservemap(kinfo->fdt);
+    if ( ret < 0 )
+        goto err;
+
+    ret = fdt_begin_node(kinfo->fdt, "");
+    if ( ret < 0 )
+        goto err;
+
+    ret = fdt_property_cell(kinfo->fdt, "#address-cells", addrcells);
+    if ( ret )
+        goto err;
+
+    ret = fdt_property_cell(kinfo->fdt, "#size-cells", sizecells);
+    if ( ret )
+        goto err;
+
+    ret = make_chosen_node(kinfo);
+    if ( ret )
+        goto err;
+
+    ret = make_cpus_node(d, kinfo->fdt);
+    if ( ret )
+        goto err;
+
+    ret = make_memory_node(kinfo, addrcells, sizecells,
+                           kernel_info_get_mem(kinfo));
+    if ( ret )
+        goto err;
+
+#ifdef CONFIG_STATIC_SHM
+    ret = make_resv_memory_node(kinfo, addrcells, sizecells);
+    if ( ret )
+        goto err;
+#endif
+
+    /*
+     * domain_handle_dtb_bootmodule has to be called before the rest of
+     * the device tree is generated because it depends on the value of
+     * the field phandle_intc.
+     */
+    if ( kinfo->dtb_bootmodule )
+    {
+        ret = domain_handle_dtb_bootmodule(d, kinfo);
+        if ( ret )
+            goto err;
+    }
+
+    ret = make_intc_domU_node(kinfo);
+    if ( ret )
+        goto err;
+
+    ret = make_timer_node(kinfo);
+    if ( ret )
+        goto err;
+
+    if ( kinfo->dom0less_feature & DOM0LESS_ENHANCED_NO_XS )
+    {
+        ret = make_hypervisor_node(d, kinfo, addrcells, sizecells);
+        if ( ret )
+            goto err;
+    }
+
+    ret = make_arch_nodes(kinfo);
+    if ( ret )
+        goto err;
+
+    ret = fdt_end_node(kinfo->fdt);
+    if ( ret < 0 )
+        goto err;
+
+    ret = fdt_finish(kinfo->fdt);
+    if ( ret < 0 )
+        goto err;
+
+    return 0;
+
+  err:
+    printk("Device tree generation failed (%d).\n", ret);
+    xfree(kinfo->fdt);
+
+    return -EINVAL;
+}
+
+static int __init alloc_xenstore_evtchn(struct domain *d)
+{
+    evtchn_alloc_unbound_t alloc;
+    int rc;
+
+    alloc.dom = d->domain_id;
+    alloc.remote_dom = hardware_domain->domain_id;
+    rc = evtchn_alloc_unbound(&alloc, 0);
+    if ( rc )
+    {
+        printk("Failed allocating event channel for domain\n");
+        return rc;
+    }
+
+#ifdef CONFIG_HVM
+    d->arch.hvm.params[HVM_PARAM_STORE_EVTCHN] = alloc.port;
+#endif
+
+    return 0;
+}
+
+#define XENSTORE_PFN_OFFSET 1
+static int __init alloc_xenstore_page(struct domain *d)
+{
+    struct page_info *xenstore_pg;
+    struct xenstore_domain_interface *interface;
+    mfn_t mfn;
+    gfn_t gfn;
+    int rc;
+
+    if ( (UINT_MAX - d->max_pages) < 1 )
+    {
+        printk(XENLOG_ERR "%pd: Over-allocation for d->max_pages by 1 page.\n",
+               d);
+        return -EINVAL;
+    }
+
+    d->max_pages += 1;
+    xenstore_pg = alloc_domheap_page(d, MEMF_bits(32));
+    if ( xenstore_pg == NULL && is_64bit_domain(d) )
+        xenstore_pg = alloc_domheap_page(d, 0);
+    if ( xenstore_pg == NULL )
+        return -ENOMEM;
+
+    mfn = page_to_mfn(xenstore_pg);
+    if ( !mfn_x(mfn) )
+        return -ENOMEM;
+
+    if ( !is_domain_direct_mapped(d) )
+        gfn = gaddr_to_gfn(GUEST_MAGIC_BASE +
+                           (XENSTORE_PFN_OFFSET << PAGE_SHIFT));
+    else
+        gfn = gaddr_to_gfn(mfn_to_maddr(mfn));
+
+    rc = guest_physmap_add_page(d, gfn, mfn, 0);
+    if ( rc )
+    {
+        free_domheap_page(xenstore_pg);
+        return rc;
+    }
+
+#ifdef CONFIG_HVM
+    d->arch.hvm.params[HVM_PARAM_STORE_PFN] = gfn_x(gfn);
+#endif
+    interface = map_domain_page(mfn);
+    interface->connection = XENSTORE_RECONNECT;
+    unmap_domain_page(interface);
+
+    return 0;
+}
+
+static int __init alloc_xenstore_params(struct kernel_info *kinfo)
+{
+    struct domain *d = kinfo->d;
+    int rc = 0;
+
+    if ( kinfo->dom0less_feature & (DOM0LESS_XENSTORE | DOM0LESS_XS_LEGACY) )
+    {
+        ASSERT(hardware_domain);
+        rc = alloc_xenstore_evtchn(d);
+        if ( rc < 0 )
+            return rc;
+
+#ifdef CONFIG_HVM
+        d->arch.hvm.params[HVM_PARAM_STORE_PFN] = ~0ULL;
+#endif
+    }
+
+    if ( kinfo->dom0less_feature & DOM0LESS_XENSTORE )
+    {
+        rc = alloc_xenstore_page(d);
+        if ( rc < 0 )
+            return rc;
+    }
+
+    return rc;
+}
+
+
+static void __init domain_vcpu_affinity(struct domain *d,
+                                        const struct dt_device_node *node)
+{
+    struct dt_device_node *np;
+
+    dt_for_each_child_node(node, np)
+    {
+        const char *hard_affinity_str = NULL;
+        uint32_t val;
+        int rc;
+        struct vcpu *v;
+        cpumask_t affinity;
+
+        if ( !dt_device_is_compatible(np, "xen,vcpu") )
+            continue;
+
+        if ( !dt_property_read_u32(np, "id", &val) )
+            panic("Invalid xen,vcpu node for domain %s\n", dt_node_name(node));
+
+        if ( val >= d->max_vcpus )
+            panic("Invalid vcpu_id %u for domain %s, max_vcpus=%u\n", val,
+                  dt_node_name(node), d->max_vcpus);
+
+        v = d->vcpu[val];
+        rc = dt_property_read_string(np, "hard-affinity", &hard_affinity_str);
+        if ( rc < 0 )
+            continue;
+
+        cpumask_clear(&affinity);
+        while ( *hard_affinity_str != '\0' )
+        {
+            unsigned int start, end;
+
+            start = simple_strtoul(hard_affinity_str, &hard_affinity_str, 0);
+
+            if ( *hard_affinity_str == '-' )    /* Range */
+            {
+                hard_affinity_str++;
+                end = simple_strtoul(hard_affinity_str, &hard_affinity_str, 0);
+            }
+            else                /* Single value */
+                end = start;
+
+            if ( end >= nr_cpu_ids )
+                panic("Invalid pCPU %u for domain %s\n", end, dt_node_name(node));
+
+            for ( ; start <= end; start++ )
+                cpumask_set_cpu(start, &affinity);
+
+            if ( *hard_affinity_str == ',' )
+                hard_affinity_str++;
+            else if ( *hard_affinity_str != '\0' )
+                break;
+        }
+
+        rc = vcpu_set_hard_affinity(v, &affinity);
+        if ( rc )
+            panic("vcpu%d: failed (rc=%d) to set hard affinity for domain %s\n",
+                  v->vcpu_id, rc, dt_node_name(node));
+    }
+}
+
+#ifdef CONFIG_ARCH_PAGING_MEMPOOL
+static unsigned long __init domain_p2m_pages(unsigned long maxmem_kb,
+                                             unsigned int smp_cpus)
+{
+    /*
+     * Keep in sync with libxl__get_required_paging_memory().
+     * 256 pages (1MB) per vcpu, plus 1 page per MiB of RAM for the P2M map,
+     * plus 128 pages to cover extended regions.
+     */
+    unsigned long memkb = 4 * (256 * smp_cpus + (maxmem_kb / 1024) + 128);
+
+    BUILD_BUG_ON(PAGE_SIZE != SZ_4K);
+
+    return DIV_ROUND_UP(memkb, 1024) << (20 - PAGE_SHIFT);
+}
+
+static int __init domain_p2m_set_allocation(struct domain *d, uint64_t mem,
+                                            const struct dt_device_node *node)
+{
+    unsigned long p2m_pages;
+    uint32_t p2m_mem_mb;
+    int rc;
+
+    rc = dt_property_read_u32(node, "xen,domain-p2m-mem-mb", &p2m_mem_mb);
+    /* If xen,domain-p2m-mem-mb is not specified, use the default value. */
+    p2m_pages = rc ?
+                p2m_mem_mb << (20 - PAGE_SHIFT) :
+                domain_p2m_pages(mem, d->max_vcpus);
+
+    spin_lock(&d->arch.paging.lock);
+    rc = p2m_set_allocation(d, p2m_pages, NULL);
+    spin_unlock(&d->arch.paging.lock);
+
+    return rc;
+}
+#else /* !CONFIG_ARCH_PAGING_MEMPOOL */
+static inline int domain_p2m_set_allocation(struct domain *d, uint64_t mem,
+                                            const struct dt_device_node *node)
+{
+    return 0;
+}
+#endif /* CONFIG_ARCH_PAGING_MEMPOOL */
+
+
+int __init construct_domU(struct domain *d,
+                          const struct dt_device_node *node)
+{
+    struct kernel_info kinfo = KERNEL_INFO_INIT;
+    const char *dom0less_enhanced;
+    int rc;
+    u64 mem;
+
+    rc = dt_property_read_u64(node, "memory", &mem);
+    if ( !rc )
+    {
+        printk("Error building DomU: cannot read \"memory\" property\n");
+        return -EINVAL;
+    }
+    kinfo.unassigned_mem = (paddr_t)mem * SZ_1K;
+
+    rc = domain_p2m_set_allocation(d, mem, node);
+    if ( rc != 0 )
+        return rc;
+
+    printk("*** LOADING DOMU cpus=%u memory=%#"PRIx64"KB ***\n",
+           d->max_vcpus, mem);
+
+    rc = dt_property_read_string(node, "xen,enhanced", &dom0less_enhanced);
+    if ( rc == -EILSEQ ||
+         rc == -ENODATA ||
+         (rc == 0 && !strcmp(dom0less_enhanced, "enabled")) )
+    {
+        if ( hardware_domain )
+            kinfo.dom0less_feature = DOM0LESS_ENHANCED;
+        else
+            panic("At the moment, Xenstore support requires dom0 to be present\n");
+    }
+    else if ( rc == 0 && !strcmp(dom0less_enhanced, "legacy") )
+    {
+        if ( hardware_domain )
+            kinfo.dom0less_feature = DOM0LESS_ENHANCED_LEGACY;
+        else
+            panic("At the moment, Xenstore support requires dom0 to be present\n");
+    }
+    else if ( rc == 0 && !strcmp(dom0less_enhanced, "no-xenstore") )
+        kinfo.dom0less_feature = DOM0LESS_ENHANCED_NO_XS;
+
+    if ( vcpu_create(d, 0) == NULL )
+        return -ENOMEM;
+
+    d->max_pages = ((paddr_t)mem * SZ_1K) >> PAGE_SHIFT;
+
+    kinfo.d = d;
+
+    rc = kernel_probe(&kinfo, node);
+    if ( rc < 0 )
+        return rc;
+
+    set_domain_type(d, &kinfo);
+
+    if ( !dt_find_property(node, "xen,static-mem", NULL) )
+        allocate_memory(d, &kinfo);
+#ifdef CONFIG_STATIC_MEMORY
+    else if ( !is_domain_direct_mapped(d) )
+        allocate_static_memory(d, &kinfo, node);
+    else
+        assign_static_memory_11(d, &kinfo, node);
+#endif
+
+#ifdef CONFIG_STATIC_SHM
+    rc = process_shm(d, &kinfo, node);
+    if ( rc < 0 )
+        return rc;
+#endif
+
+    rc = init_vuart(d, &kinfo, node);
+    if ( rc < 0 )
+        return rc;
+
+    rc = prepare_dtb_domU(d, &kinfo);
+    if ( rc < 0 )
+        return rc;
+
+    rc = construct_domain(d, &kinfo);
+    if ( rc < 0 )
+        return rc;
+
+    domain_vcpu_affinity(d, node);
+
+    return alloc_xenstore_params(&kinfo);
+}
diff --git a/xen/include/asm-generic/dom0less-build.h b/xen/include/asm-generic/dom0less-build.h
index 7092f7fc7e..901cd0eb7b 100644
--- a/xen/include/asm-generic/dom0less-build.h
+++ b/xen/include/asm-generic/dom0less-build.h
@@ -36,6 +36,9 @@
 #define DOM0LESS_ENHANCED_LEGACY (DOM0LESS_ENHANCED_NO_XS | DOM0LESS_XS_LEGACY)
 #define DOM0LESS_ENHANCED        (DOM0LESS_ENHANCED_NO_XS | DOM0LESS_XENSTORE)
 
+struct kernel_info;
+struct dt_device_node;
+
 void create_domUs(void);
 bool is_dom0less_mode(void);
 
@@ -46,6 +49,17 @@ void arch_create_domus(struct dt_device_node *node,
                        struct xen_domctl_createdomain *d_cfg,
                        unsigned int flags);
 
+int init_vuart(struct domain *d, struct kernel_info *kinfo,
+               const struct dt_device_node *node);
+
+int make_intc_domU_node(struct kernel_info *kinfo);
+int make_arch_nodes(struct kernel_info *kinfo);
+
+void set_domain_type(struct domain *d, struct kernel_info *kinfo);
+
+int init_intc_phandle(struct kernel_info *kinfo, const char *name,
+                      const int node_next, const void *pfdt);
+
 #else /* !CONFIG_DOM0LESS_BOOT */
 
 static inline void create_domUs(void) {}
-- 
2.49.0



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        Mon, 14 Apr 2025 08:56:57 -0700 (PDT)
From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v4] xen/riscv: Increase XEN_VIRT_SIZE
Date: Mon, 14 Apr 2025 17:56:54 +0200
Message-ID: <0815b65aa0b526b85c737f5923148b119cc4104f.1744639515.git.oleksii.kurochko@gmail.com>
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A randconfig job failed with the following issue:
  riscv64-linux-gnu-ld: Xen too large for early-boot assumptions

The reason is that enabling the UBSAN config increased the size of
the Xen binary.

Increase XEN_VIRT_SIZE to reserve enough space, allowing both UBSAN
and GCOV to be enabled together, with some slack for future growth.

Additionally, add checks to verify that XEN_VIRT_START is 1GB-aligned
and XEN_VIRT_SIZE is 2MB-aligned to reduce the number of page tables
needed for the initial mapping. In the future, when 2MB mappings are
used for .text (rx), .rodata (r), and .data (rw), this will also help
reduce TLB pressure.

Reported-by: Andrew Cooper 
Signed-off-by: Oleksii Kurochko 
---
Changes in v4:
 - Move is_init_section() to xen/sections.h. Add const for
   declaration of `p` variable inside is_init_section() and
   for the cast.
 - Update the comment above ASSERT() with .init* section range:
   s/[__init_begin, __init_end]/[__init_begin, __init_end).
 - Update ASSERT condition:
   s/"system_state != SYS_STATE_active"/"system_state < SYS_STATE_active".
 - Drop MB after XEN_VIRT_SIZE in the comment above PGTBL_INITIAL_COUNT
   as XEN_VIRT_SIZE expands to MB(16).
 - Fix typos:
   s/separetely/separately
   s/indenity/identity
 - Add lost L0 table for identity mapping to PGTBL_INITIAL_COUNT.
 - Move checks to alignment checks of XEN_VIRT_SIZE and XEN_VIRT_SIZE
   closer to the definition of PGTBL_INITIAL_COUNT.
 - Update the commit message.
---
Changes in v3:
 - Add ASSERT which checks .init* sections range. When Xen ends boot
   init* sections are going to be released.
 - Introduce is_init_section() macros.
 - Correct fixmap end address in RISCV-64 layour table.
 - Update ASSERT() which checks that `va` is in Xen virtual address
   range and drop BUILD_BUG_ON() as it isn't necessary anymore with
   the way how the ASSERT() looks now.
 - Add ASSERT() which checks that XEN_VIRT_START is 1gb aligned and
   add ASSERT() which checks that XEN_VIRT_SIZE is 2mb aligned.
   It helps us to reduce an amount of PGTBL_INITIAL_COUNT.
 - Update PGTBL_INITIAL_COUNT and the comment above.
 - Update the commit message.
---
Changes in v2:
 - Incerease XEN_VIRT_SIZE to 16 Mb to cover also the case if 2M mappings will
   be used for .text (rx), .rodata(r), and .data (rw).
 - Update layout table in config.h.
 - s/xen_virt_starn_vpn/xen_virt_start_vpn
 - Update BUILD_BUG_ON(... != MB(8)) check to "... > GB(1)".
 - Update definition of PGTBL_INITIAL_COUNT and the comment above.
---
 xen/arch/riscv/include/asm/config.h |  8 ++++----
 xen/arch/riscv/include/asm/mm.h     | 15 ++++++++++++---
 xen/arch/riscv/mm.c                 | 28 +++++++++++++++++++---------
 xen/include/xen/sections.h          |  4 ++++
 4 files changed, 39 insertions(+), 16 deletions(-)

diff --git a/xen/arch/riscv/include/asm/config.h b/xen/arch/riscv/include/asm/config.h
index 7141bd9e46..5eba626f27 100644
--- a/xen/arch/riscv/include/asm/config.h
+++ b/xen/arch/riscv/include/asm/config.h
@@ -41,11 +41,11 @@
  * Start addr          | End addr         | Slot       | area description
  * ============================================================================
  *                   .....                 L2 511          Unused
- *  0xffffffffc0a00000  0xffffffffc0bfffff L2 511          Fixmap
+ *  0xffffffffc1800000  0xffffffffc19fffff L2 511          Fixmap
  *                   ..... ( 2 MB gap )
- *  0xffffffffc0400000  0xffffffffc07fffff L2 511          FDT
+ *  0xffffffffc1200000  0xffffffffc15fffff L2 511          FDT
  *                   ..... ( 2 MB gap )
- *  0xffffffffc0000000  0xffffffffc01fffff L2 511          Xen
+ *  0xffffffffc0000000  0xffffffffc0ffffff L2 511          Xen
  *                   .....                 L2 510          Unused
  *  0x3200000000        0x7f7fffffff       L2 200-509      Direct map
  *                   .....                 L2 199          Unused
@@ -78,7 +78,7 @@
 
 #define GAP_SIZE                MB(2)
 
-#define XEN_VIRT_SIZE           MB(2)
+#define XEN_VIRT_SIZE           MB(16)
 
 #define BOOT_FDT_VIRT_START     (XEN_VIRT_START + XEN_VIRT_SIZE + GAP_SIZE)
 #define BOOT_FDT_VIRT_SIZE      MB(4)
diff --git a/xen/arch/riscv/include/asm/mm.h b/xen/arch/riscv/include/asm/mm.h
index 4035cd400a..ef8b35d7c2 100644
--- a/xen/arch/riscv/include/asm/mm.h
+++ b/xen/arch/riscv/include/asm/mm.h
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -43,13 +44,21 @@ static inline void *maddr_to_virt(paddr_t ma)
  */
 static inline unsigned long virt_to_maddr(unsigned long va)
 {
+    const unsigned long xen_size = (unsigned long)(_end - _start);
+    const unsigned long xen_virt_start = _AC(XEN_VIRT_START, UL);
+    const unsigned long xen_virt_end = xen_virt_start + xen_size - 1;
+
     if ((va >= DIRECTMAP_VIRT_START) &&
         (va <= DIRECTMAP_VIRT_END))
         return directmapoff_to_maddr(va - directmap_virt_start);
 
-    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(2));
-    ASSERT((va >> (PAGETABLE_ORDER + PAGE_SHIFT)) ==
-           (_AC(XEN_VIRT_START, UL) >> (PAGETABLE_ORDER + PAGE_SHIFT)));
+    ASSERT((va >= xen_virt_start) && (va <= xen_virt_end));
+
+    /*
+    * The .init* sections will be freed when Xen completes booting,
+    * so the [__init_begin, __init_end) range must be excluded.
+    */
+    ASSERT((system_state < SYS_STATE_active) || !is_init_section(va));
 
     /* phys_offset = load_start - XEN_VIRT_START */
     return phys_offset + va;
diff --git a/xen/arch/riscv/mm.c b/xen/arch/riscv/mm.c
index f2bf279bac..ee30ed7ff5 100644
--- a/xen/arch/riscv/mm.c
+++ b/xen/arch/riscv/mm.c
@@ -31,20 +31,30 @@ unsigned long __ro_after_init phys_offset; /* = load_start - XEN_VIRT_START */
 #define LOAD_TO_LINK(addr) ((unsigned long)(addr) - phys_offset)
 
 /*
- * It is expected that Xen won't be more then 2 MB.
+ * It is expected that Xen won't be more then XEN_VIRT_SIZE.
  * The check in xen.lds.S guarantees that.
- * At least 3 page tables (in case of Sv39 ) are needed to cover 2 MB.
- * One for each page level table with PAGE_SIZE = 4 Kb.
  *
- * One L0 page table can cover 2 MB(512 entries of one page table * PAGE_SIZE).
+ * Root page table is shared with the initial mapping and is declared
+ * separately. (look at stage1_pgtbl_root)
  *
- * It might be needed one more page table in case when Xen load address
- * isn't 2 MB aligned.
+ * An amount of page tables between root page table and L0 page table
+ * (in the case of Sv39 it covers L1 table):
+ *   (CONFIG_PAGING_LEVELS - 2) are needed for an identity mapping and
+ *   the same amount are needed for Xen.
  *
- * CONFIG_PAGING_LEVELS page tables are needed for the identity mapping,
- * except that the root page table is shared with the initial mapping
+ * An amount of L0 page tables:
+ *   (512 entries of one L0 page table covers 2MB == 1<> XEN_PT_LEVEL_SHIFT(1) are needed for Xen and
+ *   one L0 is needed for identity mapping.
  */
-#define PGTBL_INITIAL_COUNT ((CONFIG_PAGING_LEVELS - 1) * 2 + 1)
+#define PGTBL_INITIAL_COUNT ((CONFIG_PAGING_LEVELS - 2) * 2 + \
+                             (XEN_VIRT_SIZE >> XEN_PT_LEVEL_SHIFT(1)) + 1)
+
+/* Changing these checks can require an update of PGTBL_INITIAL_COUNT */
+_Static_assert(IS_ALIGNED(XEN_VIRT_START, GB(1)),
+               "XEN_VIRT_START should be 1gb aligned");
+_Static_assert(IS_ALIGNED(XEN_VIRT_SIZE, MB(2)),
+               "XEN_VIRT_SIZE should be 2mb aligned");
 
 pte_t __section(".bss.page_aligned") __aligned(PAGE_SIZE)
 stage1_pgtbl_root[PAGETABLE_ENTRIES];
diff --git a/xen/include/xen/sections.h b/xen/include/xen/sections.h
index f2fac8d7fa..fe49d7d0e6 100644
--- a/xen/include/xen/sections.h
+++ b/xen/include/xen/sections.h
@@ -7,6 +7,10 @@
 
 /* SAF-0-safe */
 extern char __init_begin[], __init_end[];
+#define is_init_section(p) ({                           \
+    const char *p_ = (const char *)(unsigned long)(p);  \
+    (p_ >= __init_begin) && (p_ < __init_end);          \
+})
 
 /*
  * Some data is expected to be written rarely (if at all).
-- 
2.49.0



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Date: Mon, 14 Apr 2025 18:13:25 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: Andrew Cooper ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH 3/5] x86/hvm: fix handling of accesses to partial r/o
 MMIO pages
Message-ID: 
References: <20250411105411.22334-1-roger.pau@citrix.com>
 <20250411105411.22334-4-roger.pau@citrix.com>
 
 
 
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On Mon, Apr 14, 2025 at 05:24:32PM +0200, Jan Beulich wrote:
> On 14.04.2025 15:53, Roger Pau Monné wrote:
> > On Mon, Apr 14, 2025 at 08:33:44AM +0200, Jan Beulich wrote:
> >> On 11.04.2025 12:54, Roger Pau Monne wrote:
> >>> @@ -1981,7 +2056,9 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned long gla,
> >>>       */
> >>>      if ( (p2mt == p2m_mmio_dm) ||
> >>>           (npfec.write_access &&
> >>> -          (p2m_is_discard_write(p2mt) || (p2mt == p2m_ioreq_server))) )
> >>> +          (p2m_is_discard_write(p2mt) || (p2mt == p2m_ioreq_server) ||
> >>> +           /* MMIO entries can be r/o if the target mfn is in mmio_ro_ranges. */
> >>> +           (p2mt == p2m_mmio_direct))) )
> >>>      {
> >>>          if ( !handle_mmio_with_translation(gla, gfn, npfec) )
> >>>              hvm_inject_hw_exception(X86_EXC_GP, 0);
> >>
> >> Aren't we handing too many things to handle_mmio_with_translation() this
> >> way? At the very least you're losing ...
> >>
> >>> @@ -2033,14 +2110,6 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned long gla,
> >>>          goto out_put_gfn;
> >>>      }
> >>>  
> >>> -    if ( (p2mt == p2m_mmio_direct) && npfec.write_access && npfec.present &&
> >>
> >> ... the .present check.
> > 
> > Isn't the p2mt == p2m_mmio_direct check already ensuring the entry is
> > present?  Otherwise it's type would be p2m_invalid or p2m_mmio_dm?
> 
> Yes (to the 1st question), it kind of is.
> 
> > It did seem to me the other checks in this function already assume
> > that by having a valid type the entry is present.
> 
> Except for the code above, where we decided to play safe. AT the very least
> if you drop such a check, please say a justifying word in the description.

I've added:

"As part of the fix r/o MMIO accesses are now handled by
handle_mmio_with_translation(), re-using the same logic that was used
for other read-only types part of p2m_is_discard_write().  The page
present check is dropped as type p2m_mmio_direct must have the
present bit set in the PTE."

Let me know if you think that's enough.

> >> I'm also concerned of e.g. VT-x'es APIC access MFN, which is
> >> p2m_mmio_direct.
> > 
> > But that won't go into hvm_hap_nested_page_fault() when using
> > cpu_has_vmx_virtualize_apic_accesses (and thus having an APIC page
> > mapped as p2m_mmio_direct)?
> > 
> > It would instead be an EXIT_REASON_APIC_ACCESS vmexit which is handled
> > differently?
> 
> All true as long as things work as expected (potentially including the guest
> also behaving as expected). Also this was explicitly only an example I could
> readily think of. I'm simply wary of handle_mmio_with_translation() now
> getting things to handle it's not meant to ever see.

How was access to MMIO r/o regions supposed to be handled before
33c19df9a5a0 (~2015)?  I see that setting r/o MMIO p2m entries was
added way before to p2m_type_to_flags() and ept_p2m_type_to_flags()
(~2010), yet I can't figure out how writes would be handled back then
that didn't result in a p2m fault and crashing of the domain.

I'm happy to look at other ways to handling this, but given there's
current logic for handling accesses to read-only regions in
hvm_hap_nested_page_fault() I think re-using that was the best way to
also handle accesses to MMIO read-only regions.

Arguably it would already be the case that for other reasons Xen would
need to emulate an instruction that accesses a read-only MMIO region?

Thanks, Roger.


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Date: Mon, 14 Apr 2025 18:19:18 +0200
From: Anthony PERARD 
To: Andrew Cooper 
Cc: Xen-devel ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	Marek =?iso-8859-1?Q?Marczykowski-G=F3recki?= 
Subject: Re: [PATCH v3 1/6] CI: Rename intermediate artefacts in qemu-*
 scripts
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References: <20250414110903.2355303-1-andrew.cooper3@citrix.com>
 <20250414110903.2355303-2-andrew.cooper3@citrix.com>
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On Mon, Apr 14, 2025 at 12:08:58PM +0100, Andrew Cooper wrote:
> Right now, we have initrd.cpio.gz as domU, and initrd.tar.gz as the base for
> dom0.
> 
> Rename initrd.cpio.gz to domU-rootfs.cpio.gz, and xen-rootfs.cpio.gz to
> dom0-rootfs.cpio.gz to make it clearer which is which.  Rename the VM from
> test to domU.
> 
> No functional change.
> 
> Signed-off-by: Andrew Cooper 

This also rename some long option into short options without an
explanation, but the change looks fine. (I usually prefer long options
in scripts because it means you don't need to check `man` to figure out
what a command line does.)

Reviewed-by: Anthony PERARD 

Thanks,

-- 
Anthony PERARD


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	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" 
Subject: [PATCH v7 0/3] Enable early bootup of Armv8-R AArch32 systems
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Enable early booting of Armv8-R AArch32 based systems.

Added Luca's R-b in all the patches.
Added Michal's R-b in patch 1 and 3.

Ayan Kumar Halder (3):
  xen/arm: Move some of the functions to common file
  xen/arm32: Create the same boot-time MPU regions as arm64
  xen/arm32: mpu: Stubs to build MPU for arm32

 xen/arch/arm/arm32/Makefile              |   1 +
 xen/arch/arm/arm32/mpu/Makefile          |   3 +
 xen/arch/arm/arm32/mpu/head.S            | 104 +++++++++++++++++++++++
 xen/arch/arm/arm32/mpu/p2m.c             |  19 +++++
 xen/arch/arm/arm32/mpu/smpboot.c         |  26 ++++++
 xen/arch/arm/arm64/mpu/head.S            |  78 +----------------
 xen/arch/arm/include/asm/arm32/sysregs.h |  13 ++-
 xen/arch/arm/include/asm/arm64/sysregs.h |  13 +++
 xen/arch/arm/include/asm/cpregs.h        |   2 +
 xen/arch/arm/include/asm/mm.h            |   9 +-
 xen/arch/arm/include/asm/mmu/mm.h        |   7 ++
 xen/arch/arm/include/asm/mpu/cpregs.h    |  32 +++++++
 xen/arch/arm/include/asm/mpu/mm.h        |   5 ++
 xen/arch/arm/include/asm/mpu/regions.inc |  79 +++++++++++++++++
 xen/arch/arm/mpu/Makefile                |   1 +
 xen/arch/arm/mpu/domain_page.c           |  45 ++++++++++
 16 files changed, 350 insertions(+), 87 deletions(-)
 create mode 100644 xen/arch/arm/arm32/mpu/Makefile
 create mode 100644 xen/arch/arm/arm32/mpu/head.S
 create mode 100644 xen/arch/arm/arm32/mpu/p2m.c
 create mode 100644 xen/arch/arm/arm32/mpu/smpboot.c
 create mode 100644 xen/arch/arm/include/asm/mpu/cpregs.h
 create mode 100644 xen/arch/arm/include/asm/mpu/regions.inc
 create mode 100644 xen/arch/arm/mpu/domain_page.c

-- 
2.25.1



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From: Ayan Kumar Halder 
To: 
CC: Ayan Kumar Halder , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" , Luca Fancellu 
Subject: [PATCH v7 1/3] xen/arm: Move some of the functions to common file
Date: Mon, 14 Apr 2025 17:45:12 +0100
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regions.inc is added to hold the common earlyboot MPU regions configurations
between arm64 and arm32.

prepare_xen_region, fail_insufficient_regions() will be used by both arm32 and
arm64. Thus, they have been moved to regions.inc.

*_PRBAR are moved to arm64/sysregs.h.
*_PRLAR are moved to regions.inc as they are common between arm32 and arm64.

Introduce WRITE_SYSREG_ASM to write to the system registers from regions.inc.

Signed-off-by: Ayan Kumar Halder 
Reviewed-by: Luca Fancellu 
Reviewed-by: Michal Orzel 
Tested-by: Luca Fancellu 
---

Changes from

v1 -

1. enable_mpu() now sets HMAIR{0,1} registers. This is similar to what is
being done in enable_mmu(). All the mm related configurations happen in this
function.

2. Fixed some typos.

v2 -
1. Extracted the arm64 head.S functions/macros in a common file.

v3 -
1. Moved *_PRLAR are moved to prepare_xen_region.inc

2. enable_boot_cpu_mm() is preserved in mpu/head.S.

3. STORE_SYSREG is renamed as WRITE_SYSREG_ASM()

4. LOAD_SYSREG is removed.

5. No need to save/restore lr in enable_boot_cpu_mm(). IOW, keep it as it was
in the original code.

v4 - 
1. Rename prepare_xen_region.inc to common.inc

2. enable_secondary_cpu_mm() is moved back to mpu/head.S. 

v5 -
1. Rename common.inc to regions.inc.

2. WRITE_SYSREG_ASM() in enclosed within #ifdef __ASSEMBLY__.

v6 -
1. Add Michal's R-b and Luca's T-b.

 xen/arch/arm/arm64/mpu/head.S            | 78 +----------------------
 xen/arch/arm/include/asm/arm64/sysregs.h | 13 ++++
 xen/arch/arm/include/asm/mpu/regions.inc | 79 ++++++++++++++++++++++++
 3 files changed, 93 insertions(+), 77 deletions(-)
 create mode 100644 xen/arch/arm/include/asm/mpu/regions.inc

diff --git a/xen/arch/arm/arm64/mpu/head.S b/xen/arch/arm/arm64/mpu/head.S
index ed01993d85..6d336cafbb 100644
--- a/xen/arch/arm/arm64/mpu/head.S
+++ b/xen/arch/arm/arm64/mpu/head.S
@@ -3,83 +3,7 @@
  * Start-of-day code for an Armv8-R MPU system.
  */
 
-#include 
-#include 
-
-/* Backgroud region enable/disable */
-#define SCTLR_ELx_BR    BIT(17, UL)
-
-#define REGION_TEXT_PRBAR       0x38    /* SH=11 AP=10 XN=00 */
-#define REGION_RO_PRBAR         0x3A    /* SH=11 AP=10 XN=10 */
-#define REGION_DATA_PRBAR       0x32    /* SH=11 AP=00 XN=10 */
-#define REGION_DEVICE_PRBAR     0x22    /* SH=10 AP=00 XN=10 */
-
-#define REGION_NORMAL_PRLAR     0x0f    /* NS=0 ATTR=111 EN=1 */
-#define REGION_DEVICE_PRLAR     0x09    /* NS=0 ATTR=100 EN=1 */
-
-/*
- * Macro to prepare and set a EL2 MPU memory region.
- * We will also create an according MPU memory region entry, which
- * is a structure of pr_t,  in table \prmap.
- *
- * sel:         region selector
- * base:        reg storing base address
- * limit:       reg storing limit address
- * prbar:       store computed PRBAR_EL2 value
- * prlar:       store computed PRLAR_EL2 value
- * maxcount:    maximum number of EL2 regions supported
- * attr_prbar:  PRBAR_EL2-related memory attributes. If not specified it will be
- *              REGION_DATA_PRBAR
- * attr_prlar:  PRLAR_EL2-related memory attributes. If not specified it will be
- *              REGION_NORMAL_PRLAR
- *
- * Preserves \maxcount
- * Output:
- *  \sel: Next available region selector index.
- * Clobbers \base, \limit, \prbar, \prlar
- *
- * Note that all parameters using registers should be distinct.
- */
-.macro prepare_xen_region, sel, base, limit, prbar, prlar, maxcount, attr_prbar=REGION_DATA_PRBAR, attr_prlar=REGION_NORMAL_PRLAR
-    /* Check if the region is empty */
-    cmp   \base, \limit
-    beq   1f
-
-    /* Check if the number of regions exceeded the count specified in MPUIR_EL2 */
-    cmp   \sel, \maxcount
-    bge   fail_insufficient_regions
-
-    /* Prepare value for PRBAR_EL2 reg and preserve it in \prbar.*/
-    and   \base, \base, #MPU_REGION_MASK
-    mov   \prbar, #\attr_prbar
-    orr   \prbar, \prbar, \base
-
-    /* Limit address should be inclusive */
-    sub   \limit, \limit, #1
-    and   \limit, \limit, #MPU_REGION_MASK
-    mov   \prlar, #\attr_prlar
-    orr   \prlar, \prlar, \limit
-
-    msr   PRSELR_EL2, \sel
-    isb
-    msr   PRBAR_EL2, \prbar
-    msr   PRLAR_EL2, \prlar
-    dsb   sy
-    isb
-
-    add   \sel, \sel, #1
-
-1:
-.endm
-
-/*
- * Failure caused due to insufficient MPU regions.
- */
-FUNC_LOCAL(fail_insufficient_regions)
-    PRINT("- Selected MPU region is above the implemented number in MPUIR_EL2 -\r\n")
-1:  wfe
-    b   1b
-END(fail_insufficient_regions)
+#include 
 
 /*
  * Enable EL2 MPU and data cache
diff --git a/xen/arch/arm/include/asm/arm64/sysregs.h b/xen/arch/arm/include/asm/arm64/sysregs.h
index b593e4028b..7440d495e4 100644
--- a/xen/arch/arm/include/asm/arm64/sysregs.h
+++ b/xen/arch/arm/include/asm/arm64/sysregs.h
@@ -462,6 +462,17 @@
 #define ZCR_ELx_LEN_SIZE             9
 #define ZCR_ELx_LEN_MASK             0x1ff
 
+#define REGION_TEXT_PRBAR       0x38    /* SH=11 AP=10 XN=00 */
+#define REGION_RO_PRBAR         0x3A    /* SH=11 AP=10 XN=10 */
+#define REGION_DATA_PRBAR       0x32    /* SH=11 AP=00 XN=10 */
+#define REGION_DEVICE_PRBAR     0x22    /* SH=10 AP=00 XN=10 */
+
+#ifdef __ASSEMBLY__
+
+#define WRITE_SYSREG_ASM(v, name) "msr " __stringify(name,) #v
+
+#else /* __ASSEMBLY__ */
+
 /* Access to system registers */
 
 #define WRITE_SYSREG64(v, name) do {                    \
@@ -481,6 +492,8 @@
 #define WRITE_SYSREG_LR(v, index)  WRITE_SYSREG(v, ICH_LR_REG(index))
 #define READ_SYSREG_LR(index)      READ_SYSREG(ICH_LR_REG(index))
 
+#endif /* !__ASSEMBLY__ */
+
 #endif /* _ASM_ARM_ARM64_SYSREGS_H */
 
 /*
diff --git a/xen/arch/arm/include/asm/mpu/regions.inc b/xen/arch/arm/include/asm/mpu/regions.inc
new file mode 100644
index 0000000000..47868a1526
--- /dev/null
+++ b/xen/arch/arm/include/asm/mpu/regions.inc
@@ -0,0 +1,79 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include 
+#include 
+
+/* Backgroud region enable/disable */
+#define SCTLR_ELx_BR    BIT(17, UL)
+
+#define REGION_NORMAL_PRLAR     0x0f    /* NS=0 ATTR=111 EN=1 */
+#define REGION_DEVICE_PRLAR     0x09    /* NS=0 ATTR=100 EN=1 */
+
+/*
+ * Macro to prepare and set a EL2 MPU memory region.
+ * We will also create an according MPU memory region entry, which
+ * is a structure of pr_t,  in table \prmap.
+ *
+ * sel:         region selector
+ * base:        reg storing base address
+ * limit:       reg storing limit address
+ * prbar:       store computed PRBAR_EL2 value
+ * prlar:       store computed PRLAR_EL2 value
+ * maxcount:    maximum number of EL2 regions supported
+ * attr_prbar:  PRBAR_EL2-related memory attributes. If not specified it will be
+ *              REGION_DATA_PRBAR
+ * attr_prlar:  PRLAR_EL2-related memory attributes. If not specified it will be
+ *              REGION_NORMAL_PRLAR
+ *
+ * Preserves maxcount
+ * Output:
+ *  sel: Next available region selector index.
+ * Clobbers base, limit, prbar, prlar
+ *
+ * Note that all parameters using registers should be distinct.
+ */
+.macro prepare_xen_region, sel, base, limit, prbar, prlar, maxcount, attr_prbar=REGION_DATA_PRBAR, attr_prlar=REGION_NORMAL_PRLAR
+    /* Check if the region is empty */
+    cmp   \base, \limit
+    beq   1f
+
+    /* Check if the number of regions exceeded the count specified in MPUIR_EL2 */
+    cmp   \sel, \maxcount
+    bge   fail_insufficient_regions
+
+    /* Prepare value for PRBAR_EL2 reg and preserve it in \prbar.*/
+    and   \base, \base, #MPU_REGION_MASK
+    mov   \prbar, #\attr_prbar
+    orr   \prbar, \prbar, \base
+
+    /* Limit address should be inclusive */
+    sub   \limit, \limit, #1
+    and   \limit, \limit, #MPU_REGION_MASK
+    mov   \prlar, #\attr_prlar
+    orr   \prlar, \prlar, \limit
+
+    WRITE_SYSREG_ASM(\sel, PRSELR_EL2)
+    isb
+    WRITE_SYSREG_ASM(\prbar, PRBAR_EL2)
+    WRITE_SYSREG_ASM(\prlar, PRLAR_EL2)
+    dsb   sy
+    isb
+
+    add   \sel, \sel, #1
+
+1:
+.endm
+
+/* Failure caused due to insufficient MPU regions. */
+FUNC_LOCAL(fail_insufficient_regions)
+    PRINT("- Selected MPU region is above the implemented number in MPUIR_EL2 -\r\n")
+1:  wfe
+    b   1b
+END(fail_insufficient_regions)
+
+/*
+ * Local variables:
+ * mode: ASM
+ * indent-tabs-mode: nil
+ * End:
+ */
-- 
2.25.1



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From: Ayan Kumar Halder 
To: 
CC: Ayan Kumar Halder , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" , Luca Fancellu 
Subject: [PATCH v7 3/3] xen/arm32: mpu: Stubs to build MPU for arm32
Date: Mon, 14 Apr 2025 17:45:14 +0100
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Add stubs to enable compilation.

is_xen_heap_page() and is_xen_heap_mfn() are not implemented for arm32 MPU.
Thus, introduce the stubs for these functions in asm/mpu/mm.h and move the
original code to asm/mmu/mm.h (as it is used for arm32 MMU based system).

Signed-off-by: Ayan Kumar Halder 
Reviewed-by: Luca Fancellu 
Reviewed-by: Michal Orzel 
Tested-by: Luca Fancellu 
---
Changes from :-

v1, v2 -
1. New patch introduced in v3.
2. Should be applied on top of
https://patchwork.kernel.org/project/xen-devel/cover/20250316192445.2376484-1-luca.fancellu@arm.com/

v3 -
1. Add stubs for map_domain_page() and similar functions.

2. 'BUG_ON("unimplemented")' is kept in all the stubs.

v4 - 
1. is_xen_heap_mfn() macros are defined across mpu/mm.h (ARM32 specific)
, mmu/mm.h (ARM32 specific) and asm/mm.h (ARM64 specific)

2. s/(void*)0/NULL

v5 -
1. Add the headers for smpboot.c, domain_page.c and p2m.c.

2. Inclusion of headers and makefile entries are sorted alphabetically.

3. Update the commit message and style changes.

v6 -
1. Add R-b and T-b.
 
 xen/arch/arm/arm32/mpu/Makefile   |  2 ++
 xen/arch/arm/arm32/mpu/p2m.c      | 19 +++++++++++++
 xen/arch/arm/arm32/mpu/smpboot.c  | 26 ++++++++++++++++++
 xen/arch/arm/include/asm/mm.h     |  9 +------
 xen/arch/arm/include/asm/mmu/mm.h |  7 +++++
 xen/arch/arm/include/asm/mpu/mm.h |  5 ++++
 xen/arch/arm/mpu/Makefile         |  1 +
 xen/arch/arm/mpu/domain_page.c    | 45 +++++++++++++++++++++++++++++++
 8 files changed, 106 insertions(+), 8 deletions(-)
 create mode 100644 xen/arch/arm/arm32/mpu/p2m.c
 create mode 100644 xen/arch/arm/arm32/mpu/smpboot.c
 create mode 100644 xen/arch/arm/mpu/domain_page.c

diff --git a/xen/arch/arm/arm32/mpu/Makefile b/xen/arch/arm/arm32/mpu/Makefile
index 3340058c08..cf0540aecc 100644
--- a/xen/arch/arm/arm32/mpu/Makefile
+++ b/xen/arch/arm/arm32/mpu/Makefile
@@ -1 +1,3 @@
 obj-y += head.o
+obj-y += p2m.o
+obj-y += smpboot.o
diff --git a/xen/arch/arm/arm32/mpu/p2m.c b/xen/arch/arm/arm32/mpu/p2m.c
new file mode 100644
index 0000000000..3d9abe4400
--- /dev/null
+++ b/xen/arch/arm/arm32/mpu/p2m.c
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include 
+#include 
+#include 
+
+void __init setup_virt_paging(void)
+{
+    BUG_ON("unimplemented");
+}
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/arch/arm/arm32/mpu/smpboot.c b/xen/arch/arm/arm32/mpu/smpboot.c
new file mode 100644
index 0000000000..5090f443f5
--- /dev/null
+++ b/xen/arch/arm/arm32/mpu/smpboot.c
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include 
+#include 
+#include 
+#include 
+
+int prepare_secondary_mm(int cpu)
+{
+    BUG_ON("unimplemented");
+    return -EINVAL;
+}
+
+void update_boot_mapping(bool enable)
+{
+    BUG_ON("unimplemented");
+}
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h
index fbffaccef4..5b67c0f8bb 100644
--- a/xen/arch/arm/include/asm/mm.h
+++ b/xen/arch/arm/include/asm/mm.h
@@ -170,14 +170,7 @@ struct page_info
 #define _PGC_need_scrub   _PGC_allocated
 #define PGC_need_scrub    PGC_allocated
 
-#ifdef CONFIG_ARM_32
-#define is_xen_heap_page(page) is_xen_heap_mfn(page_to_mfn(page))
-#define is_xen_heap_mfn(mfn) ({                                 \
-    unsigned long mfn_ = mfn_x(mfn);                            \
-    (mfn_ >= mfn_x(directmap_mfn_start) &&                      \
-     mfn_ < mfn_x(directmap_mfn_end));                          \
-})
-#else
+#ifdef CONFIG_ARM_64
 #define is_xen_heap_page(page) ((page)->count_info & PGC_xen_heap)
 #define is_xen_heap_mfn(mfn) \
     (mfn_valid(mfn) && is_xen_heap_page(mfn_to_page(mfn)))
diff --git a/xen/arch/arm/include/asm/mmu/mm.h b/xen/arch/arm/include/asm/mmu/mm.h
index caba987edc..7f4d59137d 100644
--- a/xen/arch/arm/include/asm/mmu/mm.h
+++ b/xen/arch/arm/include/asm/mmu/mm.h
@@ -27,6 +27,13 @@ extern unsigned long directmap_base_pdx;
 })
 
 #ifdef CONFIG_ARM_32
+#define is_xen_heap_page(page) is_xen_heap_mfn(page_to_mfn(page))
+#define is_xen_heap_mfn(mfn) ({                                 \
+    unsigned long mfn_ = mfn_x(mfn);                            \
+    (mfn_ >= mfn_x(directmap_mfn_start) &&                      \
+     mfn_ < mfn_x(directmap_mfn_end));                          \
+})
+
 /**
  * Find the virtual address corresponding to a machine address
  *
diff --git a/xen/arch/arm/include/asm/mpu/mm.h b/xen/arch/arm/include/asm/mpu/mm.h
index 86f33d9836..bfd840fa5d 100644
--- a/xen/arch/arm/include/asm/mpu/mm.h
+++ b/xen/arch/arm/include/asm/mpu/mm.h
@@ -13,6 +13,11 @@ extern struct page_info *frame_table;
 
 #define virt_to_maddr(va) ((paddr_t)((vaddr_t)(va) & PADDR_MASK))
 
+#ifdef CONFIG_ARM_32
+#define is_xen_heap_page(page) ({ BUG_ON("unimplemented"); false; })
+#define is_xen_heap_mfn(mfn) ({ BUG_ON("unimplemented"); false; })
+#endif
+
 /* On MPU systems there is no translation, ma == va. */
 static inline void *maddr_to_virt(paddr_t ma)
 {
diff --git a/xen/arch/arm/mpu/Makefile b/xen/arch/arm/mpu/Makefile
index 21bbc517b5..c7e3aa4d87 100644
--- a/xen/arch/arm/mpu/Makefile
+++ b/xen/arch/arm/mpu/Makefile
@@ -1,3 +1,4 @@
+obj-$(CONFIG_ARM_32) += domain_page.o
 obj-y += mm.o
 obj-y += p2m.o
 obj-y += setup.init.o
diff --git a/xen/arch/arm/mpu/domain_page.c b/xen/arch/arm/mpu/domain_page.c
new file mode 100644
index 0000000000..df5e06b6db
--- /dev/null
+++ b/xen/arch/arm/mpu/domain_page.c
@@ -0,0 +1,45 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include 
+#include 
+#include 
+#include 
+
+void *map_domain_page_global(mfn_t mfn)
+{
+    BUG_ON("unimplemented");
+    return NULL;
+}
+
+/* Map a page of domheap memory */
+void *map_domain_page(mfn_t mfn)
+{
+    BUG_ON("unimplemented");
+    return NULL;
+}
+
+/* Release a mapping taken with map_domain_page() */
+void unmap_domain_page(const void *ptr)
+{
+    BUG_ON("unimplemented");
+}
+
+mfn_t domain_page_map_to_mfn(const void *ptr)
+{
+    BUG_ON("unimplemented");
+    return INVALID_MFN;
+}
+
+void unmap_domain_page_global(const void *va)
+{
+    BUG_ON("unimplemented");
+}
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
-- 
2.25.1



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From: Ayan Kumar Halder 
To: 
CC: Ayan Kumar Halder , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" , Luca Fancellu 
Subject: [PATCH v7 2/3] xen/arm32: Create the same boot-time MPU regions as arm64
Date: Mon, 14 Apr 2025 17:45:13 +0100
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Create Boot-time MPU protection regions (similar to Armv8-R AArch64) for
Armv8-R AArch32.
Also, defined *_PRBAR macros for arm32. The only difference from arm64 is that
XN is 1-bit for arm32.
Define the system registers and macros in mpu/cpregs.h.

Introduce WRITE_SYSREG_ASM() to write to system registers in assembly.

Signed-off-by: Ayan Kumar Halder 
Reviewed-by: Luca Fancellu 
Tested-by: Luca Fancellu 
---
Changes from

v1 -

1. enable_mpu() now sets HMAIR{0,1} registers. This is similar to what is
being done in enable_mmu(). All the mm related configurations happen in this
function.

2. Fixed some typos. 

v2 -
1. Include the common prepare_xen_region.inc in head.S.

2. Define LOAD_SYSREG()/STORE_SYSREG() for arm32.

v3 -
1. Rename STORE_SYSREG() as WRITE_SYSREG_ASM()

2. enable_boot_cpu_mm() is defined in head.S

v4 -
1. *_PRBAR is moved to arm32/sysregs.h.

2. MPU specific CP15 system registers are defined in mpu/cpregs.h. 

v5 -
1. WRITE_SYSREG_ASM is enclosed within #ifdef __ASSEMBLY__

2. enable_mpu() clobbers r0 only.

3. Definitions in mpu/cpregs.h in enclosed within ARM_32.

4. Removed some #ifdefs and style changes.

v6 -
1. Coding style issues.

2. Kept Luca's R-b and T-b as the changes should not impact the behavior.

3. Added alias and renamed the sysregs as it is named in the specs.

 xen/arch/arm/arm32/Makefile              |   1 +
 xen/arch/arm/arm32/mpu/Makefile          |   1 +
 xen/arch/arm/arm32/mpu/head.S            | 104 +++++++++++++++++++++++
 xen/arch/arm/include/asm/arm32/sysregs.h |  13 ++-
 xen/arch/arm/include/asm/cpregs.h        |   2 +
 xen/arch/arm/include/asm/mpu/cpregs.h    |  32 +++++++
 6 files changed, 151 insertions(+), 2 deletions(-)
 create mode 100644 xen/arch/arm/arm32/mpu/Makefile
 create mode 100644 xen/arch/arm/arm32/mpu/head.S
 create mode 100644 xen/arch/arm/include/asm/mpu/cpregs.h

diff --git a/xen/arch/arm/arm32/Makefile b/xen/arch/arm/arm32/Makefile
index 40a2b4803f..537969d753 100644
--- a/xen/arch/arm/arm32/Makefile
+++ b/xen/arch/arm/arm32/Makefile
@@ -1,5 +1,6 @@
 obj-y += lib/
 obj-$(CONFIG_MMU) += mmu/
+obj-$(CONFIG_MPU) += mpu/
 
 obj-$(CONFIG_EARLY_PRINTK) += debug.o
 obj-y += domctl.o
diff --git a/xen/arch/arm/arm32/mpu/Makefile b/xen/arch/arm/arm32/mpu/Makefile
new file mode 100644
index 0000000000..3340058c08
--- /dev/null
+++ b/xen/arch/arm/arm32/mpu/Makefile
@@ -0,0 +1 @@
+obj-y += head.o
diff --git a/xen/arch/arm/arm32/mpu/head.S b/xen/arch/arm/arm32/mpu/head.S
new file mode 100644
index 0000000000..b2c5245e51
--- /dev/null
+++ b/xen/arch/arm/arm32/mpu/head.S
@@ -0,0 +1,104 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Start-of-day code for an Armv8-R-AArch32 MPU system.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/*
+ * Set up the memory attribute type tables and enable EL2 MPU and data cache.
+ * If the Background region is enabled, then the MPU uses the default memory
+ * map as the Background region for generating the memory
+ * attributes when MPU is disabled.
+ * Since the default memory map of the Armv8-R AArch32 architecture is
+ * IMPLEMENTATION DEFINED, we intend to turn off the Background region here.
+ *
+ * Clobbers r0
+ */
+FUNC_LOCAL(enable_mpu)
+    /* Set up memory attribute type tables */
+    mov_w r0, MAIR0VAL
+    mcr   CP32(r0, HMAIR0)
+    mov_w r0, MAIR1VAL
+    mcr   CP32(r0, HMAIR1)
+
+    mrc   CP32(r0, HSCTLR)
+    bic   r0, r0, #SCTLR_ELx_BR       /* Disable Background region */
+    orr   r0, r0, #SCTLR_Axx_ELx_M    /* Enable MPU */
+    orr   r0, r0, #SCTLR_Axx_ELx_C    /* Enable D-cache */
+    mcr   CP32(r0, HSCTLR)
+    isb
+
+    ret
+END(enable_mpu)
+
+/*
+ * Maps the various sections of Xen (described in xen.lds.S) as different MPU
+ * regions.
+ *
+ * Clobbers r0 - r5
+ *
+ */
+FUNC(enable_boot_cpu_mm)
+    /* Get the number of regions specified in MPUIR_EL2 */
+    mrc   CP32(r5, MPUIR_EL2)
+    and   r5, r5, #NUM_MPU_REGIONS_MASK
+
+    /* x0: region sel */
+    mov   r0, #0
+    /* Xen text section. */
+    mov_w   r1, _stext
+    mov_w   r2, _etext
+    prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_TEXT_PRBAR
+
+    /* Xen read-only data section. */
+    mov_w   r1, _srodata
+    mov_w   r2, _erodata
+    prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_RO_PRBAR
+
+    /* Xen read-only after init and data section. (RW data) */
+    mov_w   r1, __ro_after_init_start
+    mov_w   r2, __init_begin
+    prepare_xen_region r0, r1, r2, r3, r4, r5
+
+    /* Xen code section. */
+    mov_w   r1, __init_begin
+    mov_w   r2, __init_data_begin
+    prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_TEXT_PRBAR
+
+    /* Xen data and BSS section. */
+    mov_w   r1, __init_data_begin
+    mov_w   r2, __bss_end
+    prepare_xen_region r0, r1, r2, r3, r4, r5
+
+#ifdef CONFIG_EARLY_PRINTK
+    /* Xen early UART section. */
+    mov_w   r1, CONFIG_EARLY_UART_BASE_ADDRESS
+    mov_w   r2, (CONFIG_EARLY_UART_BASE_ADDRESS + CONFIG_EARLY_UART_SIZE)
+    prepare_xen_region r0, r1, r2, r3, r4, r5, attr_prbar=REGION_DEVICE_PRBAR, attr_prlar=REGION_DEVICE_PRLAR
+#endif
+
+    b    enable_mpu
+END(enable_boot_cpu_mm)
+
+/*
+ * We don't yet support secondary CPUs bring-up. Implement a dummy helper to
+ * please the common code.
+ */
+FUNC(enable_secondary_cpu_mm)
+    PRINT("- SMP not enabled yet -\r\n")
+1:  wfe
+    b 1b
+END(enable_secondary_cpu_mm)
+
+/*
+ * Local variables:
+ * mode: ASM
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/arch/arm/include/asm/arm32/sysregs.h b/xen/arch/arm/include/asm/arm32/sysregs.h
index 22871999af..ef1a870fd6 100644
--- a/xen/arch/arm/include/asm/arm32/sysregs.h
+++ b/xen/arch/arm/include/asm/arm32/sysregs.h
@@ -20,7 +20,16 @@
  * uses r0 as a placeholder register. */
 #define CMD_CP32(name...)      "mcr " __stringify(CP32(r0, name)) ";"
 
-#ifndef __ASSEMBLY__
+#define REGION_TEXT_PRBAR       0x18    /* SH=11 AP=10 XN=0 */
+#define REGION_RO_PRBAR         0x1D    /* SH=11 AP=10 XN=1 */
+#define REGION_DATA_PRBAR       0x19    /* SH=11 AP=00 XN=1 */
+#define REGION_DEVICE_PRBAR     0x11    /* SH=10 AP=00 XN=1 */
+
+#ifdef __ASSEMBLY__
+
+#define WRITE_SYSREG_ASM(v, name) mcr CP32(v, name)
+
+#else /* __ASSEMBLY__ */
 
 /* C wrappers */
 #define READ_CP32(name...) ({                                   \
@@ -84,7 +93,7 @@
 /* MVFR2 is not defined on ARMv7 */
 #define MVFR2_MAYBE_UNDEFINED
 
-#endif /* __ASSEMBLY__ */
+#endif /* !__ASSEMBLY__ */
 
 #endif /* __ASM_ARM_ARM32_SYSREGS_H */
 /*
diff --git a/xen/arch/arm/include/asm/cpregs.h b/xen/arch/arm/include/asm/cpregs.h
index aec9e8f329..a7503a190f 100644
--- a/xen/arch/arm/include/asm/cpregs.h
+++ b/xen/arch/arm/include/asm/cpregs.h
@@ -1,6 +1,8 @@
 #ifndef __ASM_ARM_CPREGS_H
 #define __ASM_ARM_CPREGS_H
 
+#include 
+
 /*
  * AArch32 Co-processor registers.
  *
diff --git a/xen/arch/arm/include/asm/mpu/cpregs.h b/xen/arch/arm/include/asm/mpu/cpregs.h
new file mode 100644
index 0000000000..d5cd0e04d5
--- /dev/null
+++ b/xen/arch/arm/include/asm/mpu/cpregs.h
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef __ARM_MPU_CPREGS_H
+#define __ARM_MPU_CPREGS_H
+
+/* CP15 CR0: MPU Type Register */
+#define HMPUIR          p15,4,c0,c0,4
+
+/* CP15 CR6: MPU Protection Region Base/Limit/Select Address Register */
+#define HPRSELR         p15,4,c6,c2,1
+#define HPRBAR          p15,4,c6,c3,0
+#define HPRLAR          p15,4,c6,c8,1
+
+/* Aliases of AArch64 names for use in common code */
+#ifdef CONFIG_ARM_32
+/* Alphabetically... */
+#define MPUIR_EL2       HMPUIR
+#define PRBAR_EL2       HPRBAR
+#define PRLAR_EL2       HPRLAR
+#define PRSELR_EL2      HPRSELR
+#endif /* CONFIG_ARM_32 */
+
+#endif /* __ARM_MPU_CPREGS_H */
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
-- 
2.25.1



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	Marek =?iso-8859-1?Q?Marczykowski-G=F3recki?= ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein 
Subject: Re: [PATCH v3 2/6] CI: avoid repacking initrd as part of the test job
Message-ID: 
References: <20250414110903.2355303-1-andrew.cooper3@citrix.com>
 <20250414110903.2355303-3-andrew.cooper3@citrix.com>
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In-Reply-To: <20250414110903.2355303-3-andrew.cooper3@citrix.com>

On Mon, Apr 14, 2025 at 12:08:59PM +0100, Andrew Cooper wrote:
> From: Marek Marczykowski-Grecki 
> 
> Use the new test-artifacts which provide rootfs.cpio.gz rather than
> initrd.tar.gz.  rootfs.cpio.gz also has all the necessary top-level
> directories, and includes the rc_verbose setting, so these modifications can
> be dropped.
> 
> Having that, do not repack the whole initrd, but only pack modified
> files and rely on Linux handling of concatenated archives.
> This allows packing just test-related files (which includes the whole
> toolstack), instead of the whole initrd.
> 
> For xilinx-smoke-dom0-x86_64.sh, this involves instructing grub not to unzip
> the archive, as doing so corrupts it.
> 
> Signed-off-by: Marek Marczykowski-Grecki 
> Signed-off-by: Andrew Cooper 

This patch seems to depends on the other patch series for
"test-artifacts" repo.

I've tried to compare the rootfs fs generated by this repo, and the one
generated in the "test-artifacts" repo, and I think there's a few
changes, at least for the arm64 rootfs as the changes have probably
already sailed for x86_64, namely:

    Those don't exist in the new rootfs:
        rc-update add networking sysinit
        rc-update add modloop sysinit
        rc-update add modules boot
        rc-update add sysctl boot
    There's `echo > /etc/modules` been added.

But I guess none of those matter, as it already works on x86_64 tests.

Overall, looks good, more common code between tests!

Reviewed-by: Anthony PERARD 

Thanks,

-- 
Anthony PERARD


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Date: Mon, 14 Apr 2025 18:57:58 +0200
From: Anthony PERARD 
To: Andrew Cooper 
Cc: Xen-devel ,
	Marek =?iso-8859-1?Q?Marczykowski-G=F3recki?= ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein 
Subject: Re: [PATCH v3 3/6] CI: remove now unused alpine-3.18-arm64-rootfs
 job and its container
Message-ID: 
References: <20250414110903.2355303-1-andrew.cooper3@citrix.com>
 <20250414110903.2355303-4-andrew.cooper3@citrix.com>
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On Mon, Apr 14, 2025 at 12:09:00PM +0100, Andrew Cooper wrote:
> From: Marek Marczykowski-Grecki 
> 
> This got moved to test-artifacts.
> 
> Signed-off-by: Marek Marczykowski-Grecki 
> Reviewed-by: Andrew Cooper 

Acked-by: Anthony PERARD 

Thanks,

-- 
Anthony PERARD


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	"Stefano Stabellini" , Michal Orzel
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Subject: Re: [PATCH v3 11/16] x86/hyperlaunch: locate dom0 initrd with
 hyperlaunch
From: Alejandro Vallejo 
To: Jan Beulich 
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References: <20250408160802.49870-1-agarciav@amd.com>
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On Thu Apr 10, 2025 at 12:34 PM BST, Jan Beulich wrote:
> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>> --- a/xen/arch/x86/domain-builder/fdt.c
>> +++ b/xen/arch/x86/domain-builder/fdt.c
>> @@ -195,6 +195,35 @@ static int __init process_domain_node(
>>                   !((char *)__va(bd->kernel->cmdline_pa))[0] )
>>                  bd->kernel->fdt_cmdline =3D fdt_get_prop_offset(
>>                      fdt, node, "bootargs", &bd->kernel->cmdline_pa);
>> +
>> +            continue;
>
> With this ...
>
>> +        }
>> +        else if ( fdt_node_check_compatible(fdt, node,
>
> ... no need for "else" here?

Sure

>
>> +                                            "multiboot,ramdisk") =3D=3D=
 0 )
>> +        {
>> +            int idx;
>> +
>> +            if ( bd->module )
>> +            {
>> +                printk(XENLOG_ERR "Duplicate ramdisk module for domain =
%s)\n",
>
> Stray ')' in the string literal.

Ack.

>
>> +                       name);
>> +                continue;
>> +            }
>> +
>> +            idx =3D fdt_read_multiboot_module(fdt, node, address_cells,
>> +                                            size_cells,bi);
>> +            if ( idx < 0 )
>> +            {
>> +                printk("  failed processing ramdisk module for domain %=
s\n",
>> +                       name);
>> +                return -EINVAL;
>> +            }
>
> Along the lines of what Denis has said - please be consistent about log
> messages: XENLOG_* or not, preferably no capital at the start, initial
> blank padding. May apply elsewhere in the series as well.

I don't mind dropping that and making everything flat (uppercase + no
padding), but there is some consistency. Albeit, it is true the
rationale is somewhat obscure.

ATM the consistency is: "padding spaces + lowercase" when giving extra
information on hyperlaunch. It ends up creating a hyperlaunch block in
`dmesg` with a "Hyperlaunch detected" line on top so it's easier to
know what lines are hyperlaunch related and which ones aren't.

Do you have a preference for a specific reporting style?

>
>> +            printk("  ramdisk: boot module %d\n", idx);
>> +            bi->mods[idx].type =3D BOOTMOD_RAMDISK;
>> +            bd->module =3D &bi->mods[idx];
>
> The field's named "module" now, but that now ends up inconsistent with
> naming used elsewhere, as is pretty noticeable here.

Well, yes. It is confusing. Also, the DTB is called multiboot,ramdisk,
because multiboot,module is already used to detect what nodes are
expressed as multiboot,modules. I'm considering going back and calling
them ramdisk again. If anything, to avoid the ambiguity between
domain modules and multiboot modules. e.g: a kernel is a multiboot
module, but not a domain module.

>
>> +            continue;
>
> This isn't strictly needed, is it, ...
>
>>          }
>>      }
>
> ... considering we're at the bottom of the loop?

Indeed

>
> Jan

Cheers,
Alejandro


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Date: Mon, 14 Apr 2025 19:24:26 +0200
From: Anthony PERARD 
To: Andrew Cooper 
Cc: Xen-devel ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	Marek =?iso-8859-1?Q?Marczykowski-G=F3recki?= ,
	Jason Andryuk ,
	"Daniel P . Smith" 
Subject: Re: [PATCH v3 4/6] CI: Switch to new argo artefact
Message-ID: 
References: <20250414110903.2355303-1-andrew.cooper3@citrix.com>
 <20250414110903.2355303-5-andrew.cooper3@citrix.com>
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On Mon, Apr 14, 2025 at 12:09:01PM +0100, Andrew Cooper wrote:
> diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml
> index 51229cbe561d..d46da1c43d05 100644
> --- a/automation/gitlab-ci/test.yaml
> +++ b/automation/gitlab-ci/test.yaml
> @@ -242,7 +242,7 @@ xilinx-smoke-dom0-x86_64-gcc-debug-argo:
>    needs:
>      - alpine-3.18-gcc-debug
>      - project: xen-project/hardware/test-artifacts
> -      job: x86_64-kernel-linux-6.6.56
> +      job: linux-6.6.56-x86_64
>        ref: master
>      - project: xen-project/hardware/test-artifacts
>        job: alpine-3.18-x86_64-rootfs


Don't you need to remove the dependency on "x86_64-argo-linux-6.6.56"
which is just out of context, as I think this is now part of
"linux-6.6.56-x86_64" job.

Besides that:
Reviewed-by: Anthony PERARD 

Thanks,

-- 
Anthony PERARD


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Subject: Re: [PATCH v3 4/6] CI: Switch to new argo artefact
To: Anthony PERARD 
Cc: Xen-devel ,
 Anthony PERARD ,
 Stefano Stabellini ,
 Michal Orzel , Doug Goldstein ,
 =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 , Jason Andryuk ,
 "Daniel P . Smith" 
References: <20250414110903.2355303-1-andrew.cooper3@citrix.com>
 <20250414110903.2355303-5-andrew.cooper3@citrix.com> 
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From: Andrew Cooper 
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On 14/04/2025 6:24 pm, Anthony PERARD wrote:
> On Mon, Apr 14, 2025 at 12:09:01PM +0100, Andrew Cooper wrote:
>> diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml
>> index 51229cbe561d..d46da1c43d05 100644
>> --- a/automation/gitlab-ci/test.yaml
>> +++ b/automation/gitlab-ci/test.yaml
>> @@ -242,7 +242,7 @@ xilinx-smoke-dom0-x86_64-gcc-debug-argo:
>>    needs:
>>      - alpine-3.18-gcc-debug
>>      - project: xen-project/hardware/test-artifacts
>> -      job: x86_64-kernel-linux-6.6.56
>> +      job: linux-6.6.56-x86_64
>>        ref: master
>>      - project: xen-project/hardware/test-artifacts
>>        job: alpine-3.18-x86_64-rootfs
>
> Don't you need to remove the dependency on "x86_64-argo-linux-6.6.56"
> which is just out of context, as I think this is now part of
> "linux-6.6.56-x86_64" job.

Yes.  Sorry, this was a bad rebase taking out my "ref:
andrewcoop-test"'s through the series.

>
> Besides that:
> Reviewed-by: Anthony PERARD 

Thanks.

~Andrew


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Date: Mon, 14 Apr 2025 18:27:15 +0100
Message-ID: 
To: Alejandro Vallejo , Jan Beulich 
CC: "Daniel P. Smith" , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" , Michal Orzel
	, Andrew Cooper ,
	=?utf-8?q?Roger_Pau_Monn=C3=A9?= ,
	, Xen-devel
	
Subject: Re: [PATCH v3 11/16] x86/hyperlaunch: locate dom0 initrd with
 hyperlaunch
From: Alejandro Vallejo 
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On Mon Apr 14, 2025 at 6:06 PM BST, Alejandro Vallejo wrote:
> On Thu Apr 10, 2025 at 12:34 PM BST, Jan Beulich wrote:
>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>
>>> +            printk("  ramdisk: boot module %d\n", idx);
>>> +            bi->mods[idx].type =3D BOOTMOD_RAMDISK;
>>> +            bd->module =3D &bi->mods[idx];
>>
>> The field's named "module" now, but that now ends up inconsistent with
>> naming used elsewhere, as is pretty noticeable here.
>
> Well, yes. It is confusing. Also, the DTB is called multiboot,ramdisk,
> because multiboot,module is already used to detect what nodes are
> expressed as multiboot,modules. I'm considering going back and calling
> them ramdisk again. If anything, to avoid the ambiguity between
> domain modules and multiboot modules. e.g: a kernel is a multiboot
> module, but not a domain module.

Particularly when misc/arm/device-tree/booting.txt already states that
the initrd for dom0 ought to be provided with the "multiboot,ramdisk"
string in the "compatible" prop.  Deviating from that is just going to
make it far more annoying to unify arm and x86 in the future.  And
calling those ramdisks anything but ramdisk internally is just plain
confusing (as evidenced in the current series).

So... how frontally opposed would you be to restoring the ramdisk
nomenclature? Also, for ease of rebasing future patches it'd be far
nicer to go back to ramdisk rather than reinventing some new name.

I'm for the time being leaving things as they are (because it is a pain
to change these things) until we settle on something.

Cheers,
Alejandro


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Subject: Re: [PATCH v3 2/6] CI: avoid repacking initrd as part of the test job
To: Anthony PERARD 
Cc: Xen-devel ,
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 , Anthony PERARD
 , Stefano Stabellini ,
 Michal Orzel , Doug Goldstein 
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On 14/04/2025 5:57 pm, Anthony PERARD wrote:
> On Mon, Apr 14, 2025 at 12:08:59PM +0100, Andrew Cooper wrote:
>> From: Marek Marczykowski-Górecki 
>>
>> Use the new test-artifacts which provide rootfs.cpio.gz rather than
>> initrd.tar.gz.  rootfs.cpio.gz also has all the necessary top-level
>> directories, and includes the rc_verbose setting, so these modifications can
>> be dropped.
>>
>> Having that, do not repack the whole initrd, but only pack modified
>> files and rely on Linux handling of concatenated archives.
>> This allows packing just test-related files (which includes the whole
>> toolstack), instead of the whole initrd.
>>
>> For xilinx-smoke-dom0-x86_64.sh, this involves instructing grub not to unzip
>> the archive, as doing so corrupts it.
>>
>> Signed-off-by: Marek Marczykowski-Górecki 
>> Signed-off-by: Andrew Cooper 
> This patch seems to depends on the other patch series for
> "test-artifacts" repo.

Yes, there's a large interlink, although the other series is fully
committed now.

>
> I've tried to compare the rootfs fs generated by this repo, and the one
> generated in the "test-artifacts" repo, and I think there's a few
> changes, at least for the arm64 rootfs as the changes have probably
> already sailed for x86_64, namely:
>
>     Those don't exist in the new rootfs:
>         rc-update add networking sysinit
>         rc-update add modloop sysinit
>         rc-update add modules boot
>         rc-update add sysctl boot
>     There's `echo > /etc/modules` been added.
>
> But I guess none of those matter, as it already works on x86_64 tests.

Those changes are discussed in the other series, in the relevant patches.

modules is deliberately removed; we don't build them (properly), and the
scan on boot puts errors onto the console.  Emptying /etc/modules is to
remove af_packet and ipv6, again because we don't have those as modules
(we build ipv6 in).

Modloop seems to be scanning other devices for filesystems.  networking
depends on sysctl, but I can't see any of them being used, and the arm64
tests work fine without them

>
> Overall, looks good, more common code between tests!

Indeed.  We can always put them back in if they turn out to be needed.

> Reviewed-by: Anthony PERARD 

Thanks.

~Andrew


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Date: Mon, 14 Apr 2025 19:31:27 +0200
From: Anthony PERARD 
To: Andrew Cooper 
Cc: Xen-devel ,
	Marek =?iso-8859-1?Q?Marczykowski-G=F3recki?= ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein 
Subject: Re: [PATCH v3 5/6] CI: save toolstack artifact as cpio.gz
Message-ID: 
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On Mon, Apr 14, 2025 at 12:09:02PM +0100, Andrew Cooper wrote:
> From: Marek Marczykowski-Grecki 
> 
> This avoids the need to re-compress it in every test job.  This saves minutes
> of wallclock time.
> 
> Signed-off-by: Marek Marczykowski-Grecki 
> Reviewed-by: Andrew Cooper 

Reviewed-by: Anthony PERARD 

Thanks,

-- 
Anthony PERARD


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Date: Mon, 14 Apr 2025 19:34:17 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein 
Subject: Re: [PATCH RFC 7/6] CI: Adjust how domU is packaged in dom0
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Date: Mon, 14 Apr 2025 19:34:17 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein 
Subject: Re: [PATCH RFC 7/6] CI: Adjust how domU is packaged in dom0

On Mon, Apr 14, 2025 at 01:47:15PM +0100, Andrew Cooper wrote:
> Package domU in /boot for dom0 and insert into the uncompressed part of d=
om0's
> rootfs, rather than recompressing it as part of the overlay.
>=20
> Signed-off-by: Andrew Cooper 
> ---
> CC: Anthony PERARD 
> CC: Stefano Stabellini 
> CC: Michal Orzel 
> CC: Doug Goldstein 
> CC: Marek Marczykowski-G=C3=B3recki 
>=20
> A little RFC.  It wants extending to the other tests too.
> ---
>  automation/scripts/qubes-x86-64.sh | 16 ++++++++++++----
>  1 file changed, 12 insertions(+), 4 deletions(-)
>=20
> diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qube=
s-x86-64.sh
> index 1f90e7002c73..7ce077dfeaee 100755
> --- a/automation/scripts/qubes-x86-64.sh
> +++ b/automation/scripts/qubes-x86-64.sh
> @@ -185,10 +185,22 @@ Kernel \r on an \m (\l)
>      find . | cpio -H newc -o | gzip >> ../binaries/domU-rootfs.cpio.gz
>      cd ..
>      rm -rf rootfs
> +
> +    # Package domU kernel+rootfs in /boot for dom0 (uncompressed)
> +    mkdir -p rootfs/boot
> +    cd rootfs
> +    cp ../binaries/bzImage boot/vmlinuz
> +    cp ../binaries/domU-rootfs.cpio.gz boot/

This changes the name of domU rootfs - was initrd-domU, yet the domU.cfg
is not updated.

> +    find . | cpio -H newc -o > ../binaries/domU-in-dom0.cpio
> +    cd ..
> +    rm -rf rootfs
>  fi
> =20
>  # Dom0 rootfs
>  cp binaries/ucode.cpio binaries/dom0-rootfs.cpio.gz
> +if [ -e binaries/domU-in-dom0.cpio ]; then
> +    cat binaries/domU-in-dom0.cpio >> binaries/dom0-rootfs.cpio.gz
> +fi
>  cat binaries/rootfs.cpio.gz >> binaries/dom0-rootfs.cpio.gz
>  cat binaries/xen-tools.cpio.gz >> binaries/dom0-rootfs.cpio.gz
> =20
> @@ -236,10 +248,6 @@ mkdir -p etc/default
>  echo "XENCONSOLED_TRACE=3Dall" >> etc/default/xencommons
>  echo "QEMU_XEN=3D/bin/false" >> etc/default/xencommons
>  mkdir -p var/log/xen/console
> -cp ../binaries/bzImage boot/vmlinuz
> -if [ -n "$domU_check" ]; then
> -    cp ../binaries/domU-rootfs.cpio.gz boot/initrd-domU
> -fi
>  find . | cpio -H newc -o | gzip >> ../binaries/dom0-rootfs.cpio.gz
>  cd ..
> =20
> --=20
> 2.39.5
>=20

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Date: Mon, 14 Apr 2025 19:45:30 +0200
From: Anthony PERARD 
To: Andrew Cooper 
Cc: Xen-devel ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	Marek =?iso-8859-1?Q?Marczykowski-G=F3recki?= 
Subject: Re: [PATCH v3 6/6] CI: Include microcode for x86 hardware jobs
Message-ID: 
References: <20250414110903.2355303-1-andrew.cooper3@citrix.com>
 <20250414110903.2355303-7-andrew.cooper3@citrix.com>
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On Mon, Apr 14, 2025 at 12:09:03PM +0100, Andrew Cooper wrote:
> diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml
> index 1b82b359d01f..ac5367874526 100644
> --- a/automation/gitlab-ci/build.yaml
> +++ b/automation/gitlab-ci/build.yaml
> @@ -306,6 +306,7 @@ alpine-3.18-gcc-debug:
>        CONFIG_ARGO=y
>        CONFIG_UBSAN=y
>        CONFIG_UBSAN_FATAL=y
> +      CONFIG_UCODE_SCAN_DEFAULT=y

Is there a change that this patch series gets backported? Because that
new Kconfig option won't exist.

Othewise, patch looks fine:
Reviewed-by: Anthony PERARD 

Thanks,

-- 
Anthony PERARD


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Subject: Re: [PATCH v3 6/6] CI: Include microcode for x86 hardware jobs
To: Anthony PERARD 
Cc: Xen-devel ,
 Anthony PERARD ,
 Stefano Stabellini ,
 Michal Orzel , Doug Goldstein ,
 =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= 
References: <20250414110903.2355303-1-andrew.cooper3@citrix.com>
 <20250414110903.2355303-7-andrew.cooper3@citrix.com> 
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On 14/04/2025 6:45 pm, Anthony PERARD wrote:
> On Mon, Apr 14, 2025 at 12:09:03PM +0100, Andrew Cooper wrote:
>> diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml
>> index 1b82b359d01f..ac5367874526 100644
>> --- a/automation/gitlab-ci/build.yaml
>> +++ b/automation/gitlab-ci/build.yaml
>> @@ -306,6 +306,7 @@ alpine-3.18-gcc-debug:
>>        CONFIG_ARGO=y
>>        CONFIG_UBSAN=y
>>        CONFIG_UBSAN_FATAL=y
>> +      CONFIG_UCODE_SCAN_DEFAULT=y
> Is there a change

DYM "chance" ?

>  that this patch series gets backported? Because that
> new Kconfig option won't exist.

Yes, I do intend to backport this whole series in due course, and yes,
I'm aware.

> Othewise, patch looks fine:
> Reviewed-by: Anthony PERARD 

Thanks.

~Andrew


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On 4/12/2025 4:10 PM, H. Peter Anvin wrote:
> Also,*in this specific case* IA32_SPEC_CTRL is architecturally nonserializing, i.e. WRMSR executes as WRMSRNS anyway.

While the immediate form WRMSRNS could be faster because the MSR index
is available *much* earlier in the pipeline, right?


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Date: Mon, 14 Apr 2025 19:55:57 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Anthony PERARD ,
	Xen-devel ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein 
Subject: Re: [PATCH v3 6/6] CI: Include microcode for x86 hardware jobs
Message-ID: 
References: <20250414110903.2355303-1-andrew.cooper3@citrix.com>
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Date: Mon, 14 Apr 2025 19:55:57 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Anthony PERARD ,
	Xen-devel ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein 
Subject: Re: [PATCH v3 6/6] CI: Include microcode for x86 hardware jobs

On Mon, Apr 14, 2025 at 06:47:07PM +0100, Andrew Cooper wrote:
> On 14/04/2025 6:45 pm, Anthony PERARD wrote:
> > On Mon, Apr 14, 2025 at 12:09:03PM +0100, Andrew Cooper wrote:
> >> diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/bu=
ild.yaml
> >> index 1b82b359d01f..ac5367874526 100644
> >> --- a/automation/gitlab-ci/build.yaml
> >> +++ b/automation/gitlab-ci/build.yaml
> >> @@ -306,6 +306,7 @@ alpine-3.18-gcc-debug:
> >>        CONFIG_ARGO=3Dy
> >>        CONFIG_UBSAN=3Dy
> >>        CONFIG_UBSAN_FATAL=3Dy
> >> +      CONFIG_UCODE_SCAN_DEFAULT=3Dy
> > Is there a change
>=20
> DYM "chance" ?
>=20
> >  that this patch series gets backported? Because that
> > new Kconfig option won't exist.
>=20
> Yes, I do intend to backport this whole series in due course, and yes,
> I'm aware.

A more backport-friendly way would be add ucode=3Dscan to xen cmdline.

> > Othewise, patch looks fine:
> > Reviewed-by: Anthony PERARD 
>=20
> Thanks.
>=20
> ~Andrew

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Hello there,=0A=
=0A=
Static analyser cppcheck says:=0A=
=0A=
linux-6.15-rc2/drivers/xen/balloon.c:346:24: style: int result is assigned =
to long variable. If the variable is long to avoid loss of information, the=
n you have loss of information. [truncLongCastAssignment]=0A=
=0A=
Source code is=0A=
=0A=
    unsigned long i, size =3D (1 << order);=0A=
=0A=
Maybe better code:=0A=
=0A=
    unsigned long i, size =3D (1UL << order);=0A=
=0A=
Regards=0A=
=0A=
David Binderman=0A=
=0A=


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On Mon Apr 14, 2025 at 4:05 PM BST, Jan Beulich wrote:
> On 14.04.2025 15:37, Alejandro Vallejo wrote:
>> On Thu Apr 10, 2025 at 11:42 AM BST, Jan Beulich wrote:
>>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>>> +/*
>>>> + * Locate a multiboot module given its node offset in the FDT.
>>>> + *
>>>> + * The module location may be given via either FDT property:
>>>> + *     * reg =3D 
>>>> + *         * Mutates `bi` to append the module.
>>>> + *     * module-index =3D 
>>>> + *         * Leaves `bi` unchanged.
>>>> + *
>>>> + * @param fdt           Pointer to the full FDT.
>>>> + * @param node          Offset for the module node.
>>>> + * @param address_cells Number of 4-octet cells that make up an "addr=
ess".
>>>> + * @param size_cells    Number of 4-octet cells that make up a "size"=
.
>>>> + * @param bi[inout]     Xen's representation of the boot parameters.
>>>> + * @return              -EINVAL on malformed nodes, otherwise
>>>> + *                      index inside `bi->mods`
>>>> + */
>>>> +int __init fdt_read_multiboot_module(const void *fdt, int node,
>>>> +                                     int address_cells, int size_cell=
s,
>>>> +                                     struct boot_info *bi)
>>>
>>> Functions without callers and non-static ones without declarations are
>>> disliked by Misra.
>>=20
>> Can't do much about it if I want them to stand alone in a single patch.
>> Otherwise the following ones become quite unwieldy to look at. All I can
>> say is that this function becomes static and with a caller on the next
>> patch.
>
> Which means you need to touch this again anyway. Perhaps we need a Misra
> deviation for __maybe_unused functions / data, in which case you could
> use that here and strip it along with making the function static. Cc-ing
> Bugseng folks.

It's a transient violation, sure. Do we care about transient MISRA
violations though? I understand the importance of bisectability, but
AUIU MISRA compliance matters to the extent that that the tip is
compliant rather than the intermediate steps?

Another option would be to fold them this patch and the next together
after both get their R-by. As I said, I assumed you'd rather see them in
isolation for purposes of review.

>
>>>> +    /* Otherwise location given as a `reg` property. */
>>>> +    prop =3D fdt_get_property(fdt, node, "reg", NULL);
>>>> +
>>>> +    if ( !prop )
>>>> +    {
>>>> +        printk("  No location for multiboot,module\n");
>>>> +        return -EINVAL;
>>>> +    }
>>>> +    if ( fdt_get_property(fdt, node, "module-index", NULL) )
>>>> +    {
>>>> +        printk("  Location of multiboot,module defined multiple times=
\n");
>>>> +        return -EINVAL;
>>>> +    }
>>>> +
>>>> +    ret =3D read_fdt_prop_as_reg(prop, address_cells, size_cells, &ad=
dr, &size);
>>>> +
>>>> +    if ( ret < 0 )
>>>> +    {
>>>> +        printk("  Failed reading reg for multiboot,module\n");
>>>> +        return -EINVAL;
>>>> +    }
>>>> +
>>>> +    idx =3D bi->nr_modules + 1;
>>>
>>> This at least looks like an off-by-one. If the addition of 1 is really
>>> intended, I think it needs commenting on.
>>=20
>> Seems to be, yes. The underlying array is a bit bizarre. It's sizes as
>> MAX_NR_BOOTMODS + 1, with the first one being the DTB itself. I guess
>> the intent was to take it into account, but bi->nr_modules is
>> initialised to the number of multiboot modules, so it SHOULD be already
>> taking it into account.
>>=20
>> Also, the logic for bounds checking seems... off (because of the + 1 I
>> mentioned before). Or at least confusing, so I've moved to using
>> ARRAY_SIZE(bi->mods) rather than explicitly comparing against
>> MAX_NR_BOOTMODS.
>>=20
>> The array is MAX_NR_BOOTMODS + 1 in length, so it's just more cognitive
>> load than I'm comfortable with.
>
> If I'm not mistaken the +1 is inherited from the modules array we had in
> the past, where we wanted 1 extra slot for Xen itself. Hence before you
> move to using ARRAY_SIZE() everywhere it needs to really be clear what
> the +1 here is used for.

Ew.  Ok, just looked at the code in multiboot_fill_boot_info and indeed
the arrangement is for all multiboot modules to be in front, and Xen to
be appended. But bi->nr_modules only lists multiboot modules, so
increasing that value is therefore not enough (or
next_boot_module_index() would fail).

I need to have a proper read on how this is all stitched together.  I
may simply swap BOOTMOD_XEN with the next entry on append. Though my
preference would be to _not_ have Xen as part of the module list to
begin with. Before boot_info that was probably a place as good as any,
but this would be much better off in a dedicated field.

I don't see much in terms of usage though. Why is it being added at all?

Cheers,
Alejandro


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Date: Mon, 14 Apr 2025 19:01:33 +0100
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v3 6/6] CI: Include microcode for x86 hardware jobs
To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 
Cc: Anthony PERARD ,
 Xen-devel ,
 Anthony PERARD ,
 Stefano Stabellini ,
 Michal Orzel , Doug Goldstein 
References: <20250414110903.2355303-1-andrew.cooper3@citrix.com>
 <20250414110903.2355303-7-andrew.cooper3@citrix.com> 
  
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On 14/04/2025 6:55 pm, Marek Marczykowski-Górecki wrote:
> On Mon, Apr 14, 2025 at 06:47:07PM +0100, Andrew Cooper wrote:
>> On 14/04/2025 6:45 pm, Anthony PERARD wrote:
>>> On Mon, Apr 14, 2025 at 12:09:03PM +0100, Andrew Cooper wrote:
>>>> diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml
>>>> index 1b82b359d01f..ac5367874526 100644
>>>> --- a/automation/gitlab-ci/build.yaml
>>>> +++ b/automation/gitlab-ci/build.yaml
>>>> @@ -306,6 +306,7 @@ alpine-3.18-gcc-debug:
>>>>        CONFIG_ARGO=y
>>>>        CONFIG_UBSAN=y
>>>>        CONFIG_UBSAN_FATAL=y
>>>> +      CONFIG_UCODE_SCAN_DEFAULT=y
>>> Is there a change
>> DYM "chance" ?
>>
>>>  that this patch series gets backported? Because that
>>> new Kconfig option won't exist.
>> Yes, I do intend to backport this whole series in due course, and yes,
>> I'm aware.
> A more backport-friendly way would be add ucode=scan to xen cmdline.

Yeah, but they're too long already IMO.

Needing to override defaults to make our CI system useful is a good hint
that the defaults are wrong.

Same for console_timestamps, which isn't even deployed consistently
across the testing.

~Andrew


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Date: Mon, 14 Apr 2025 19:07:09 +0100
Message-ID: 
CC: , "Daniel P. Smith"
	, Jason Andryuk , "Xenia
 Ragiadakou" , Stefano Stabellini
	, Michal Orzel , Jan Beulich
	, Andrew Cooper ,
	=?utf-8?q?Roger_Pau_Monn=C3=A9?= , Julien Grall
	, Bertrand Marquis 
Subject: Re: [PATCH v3 12/16] x86/hyperlaunch: add domain id parsing to
 domain config
From: Alejandro Vallejo 
To: Denis Mukhin 
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References: <20250408160802.49870-1-agarciav@amd.com>
 <20250408160802.49870-13-agarciav@amd.com>
 
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On Wed Apr 9, 2025 at 11:15 PM BST, Denis Mukhin wrote:
> On Tuesday, April 8th, 2025 at 9:07 AM, Alejandro Vallejo  wrote:
>
>>=20
>>=20
>> From: "Daniel P. Smith" dpsmith@apertussolutions.com
>>=20
>>=20
>> Introduce the ability to specify the desired domain id for the domain
>> definition. The domain id will be populated in the domid property of the
>> domain
>> node in the device tree configuration.
>>=20
>> Signed-off-by: Daniel P. Smith dpsmith@apertussolutions.com
>>=20
>> ---
>> v3:
>> * Remove ramdisk parsing
>> * Add missing xen/errno.h include
>> ---
>> xen/arch/x86/domain-builder/fdt.c | 39 ++++++++++++++++++++++++++++-
>> xen/arch/x86/setup.c | 5 ++--
>> xen/include/xen/libfdt/libfdt-xen.h | 11 ++++++++
>> 3 files changed, 52 insertions(+), 3 deletions(-)
>>=20
>> diff --git a/xen/arch/x86/domain-builder/fdt.c b/xen/arch/x86/domain-bui=
lder/fdt.c
>> index 0f5fd01557..4c6aafe195 100644
>> --- a/xen/arch/x86/domain-builder/fdt.c
>> +++ b/xen/arch/x86/domain-builder/fdt.c
>> @@ -8,6 +8,7 @@
>> #include 
>>=20
>>=20
>> #include 
>>=20
>> +#include 
>>=20
>> #include 
>>=20
>> #include 
>>=20
>>=20
>> @@ -158,12 +159,42 @@ int __init fdt_read_multiboot_module(const void *f=
dt, int node,
>> static int __init process_domain_node(
>> struct boot_info *bi, const void *fdt, int dom_node)
>> {
>> - int node;
>> + int node, property;
>> struct boot_domain *bd =3D &bi->domains[bi->nr_domains];
>>=20
>> const char *name =3D fdt_get_name(fdt, dom_node, NULL) ?: "unknown";
>> int address_cells =3D fdt_address_cells(fdt, dom_node);
>> int size_cells =3D fdt_size_cells(fdt, dom_node);
>>=20
>> + fdt_for_each_property_offset(property, fdt, dom_node)
>> + {
>> + const struct fdt_property *prop;
>> + const char prop_name;
>> + int name_len;
>> +
>> + prop =3D fdt_get_property_by_offset(fdt, property, NULL);
>> + if ( !prop )
>> + continue; / silently skip */
>> +
>> + prop_name =3D fdt_get_string(fdt, fdt32_to_cpu(prop->nameoff), &name_l=
en);
>>=20
>> +
>> + if ( strncmp(prop_name, "domid", name_len) =3D=3D 0 )
>> + {
>> + uint32_t val =3D DOMID_INVALID;
>> + if ( fdt_prop_as_u32(prop, &val) !=3D 0 )
>> + {
>> + printk(" failed processing domain id for domain %s\n", name);
>
> Add XENLOG_ERR ?

Yes, and...

>
>> + return -EINVAL;
>> + }
>> + if ( val >=3D DOMID_FIRST_RESERVED )
>>=20
>> + {
>> + printk(" invalid domain id for domain %s\n", name);
>
> Add XENLOG_ERR ?

... yes.

>
>> + return -EINVAL;
>> + }
>> + bd->domid =3D (domid_t)val;
>>=20
>> + printk(" domid: %d\n", bd->domid);
>>=20
>> + }
>> + }
>> +
>> fdt_for_each_subnode(node, fdt, dom_node)
>> {
>> if ( fdt_node_check_compatible(fdt, node, "multiboot,kernel") =3D=3D 0 )
>> @@ -233,6 +264,12 @@ static int __init process_domain_node(
>> return -ENODATA;
>> }
>>=20
>> + if ( bd->domid =3D=3D DOMID_INVALID )
>>=20
>> + bd->domid =3D get_initial_domain_id();
>>=20
>> + else if ( bd->domid !=3D get_initial_domain_id() )
>>=20
>> + printk(XENLOG_WARNING
>> + "WARN: Booting without initial domid not supported.\n");
>
> Drop WARN since the log message is XENLOG_WARNING level already?

As mentioned elsewhere, the point of those prefixes are to be readable.

Though I'm starting to get urges to rewrite many of this error handlers
as asserts, on the basis that "why do we think it's ok to boot with
malformed DTBs"? A safe system that doesn't boot is more helpful than an
unsafe one that boots everything except a critical component for you to
find later on.

Cheers,
Alejandro


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Date: Mon, 14 Apr 2025 19:35:44 +0100
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CC: "Daniel P. Smith" , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" , Michal Orzel
	, Andrew Cooper ,
	=?utf-8?q?Roger_Pau_Monn=C3=A9?= , Julien Grall
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Subject: Re: [PATCH v3 12/16] x86/hyperlaunch: add domain id parsing to
 domain config
From: Alejandro Vallejo 
To: Jan Beulich 
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On Thu Apr 10, 2025 at 12:49 PM BST, Jan Beulich wrote:
> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>> From: "Daniel P. Smith" 
>>=20
>> Introduce the ability to specify the desired domain id for the domain
>> definition. The domain id will be populated in the domid property of the
>> domain
>> node in the device tree configuration.
>
> Nit: Odd splitting of lines.

Fixed

>
>> --- a/xen/arch/x86/domain-builder/fdt.c
>> +++ b/xen/arch/x86/domain-builder/fdt.c
>> @@ -8,6 +8,7 @@
>>  #include 
>> =20
>>  #include 
>> +#include 
>
> What is this needed for?

get_initial_domain_id(), but that ought to come from xen/domain.h instead.

Fixed.

>
>> @@ -158,12 +159,42 @@ int __init fdt_read_multiboot_module(const void *f=
dt, int node,
>>  static int __init process_domain_node(
>>      struct boot_info *bi, const void *fdt, int dom_node)
>>  {
>> -    int node;
>> +    int node, property;
>>      struct boot_domain *bd =3D &bi->domains[bi->nr_domains];
>>      const char *name =3D fdt_get_name(fdt, dom_node, NULL) ?: "unknown"=
;
>>      int address_cells =3D fdt_address_cells(fdt, dom_node);
>>      int size_cells =3D fdt_size_cells(fdt, dom_node);
>> =20
>> +    fdt_for_each_property_offset(property, fdt, dom_node)
>> +    {
>> +        const struct fdt_property *prop;
>> +        const char *prop_name;
>> +        int name_len;
>> +
>> +        prop =3D fdt_get_property_by_offset(fdt, property, NULL);
>> +        if ( !prop )
>> +            continue; /* silently skip */
>> +
>> +        prop_name =3D fdt_get_string(fdt, fdt32_to_cpu(prop->nameoff), =
&name_len);
>> +
>> +        if ( strncmp(prop_name, "domid", name_len) =3D=3D 0 )
>> +        {
>> +            uint32_t val =3D DOMID_INVALID;
>> +            if ( fdt_prop_as_u32(prop, &val) !=3D 0 )
>
> Nit: Blank line please between declaration(s) and statement(s).

Ack.

>
>> +            {
>> +                printk("  failed processing domain id for domain %s\n",=
 name);
>> +                return -EINVAL;
>> +            }
>> +            if ( val >=3D DOMID_FIRST_RESERVED )
>> +            {
>> +                printk("  invalid domain id for domain %s\n", name);
>> +                return -EINVAL;
>> +            }
>> +            bd->domid =3D (domid_t)val;
>
> And a conflict with other domains' IDs will not be complained about?

Hmmm... sure, I can iterate the domlist and check.

>
>> +            printk("  domid: %d\n", bd->domid);
>
> If the error messages log "name" for (I suppose) disambiguation, why woul=
d
> the success message here not also do so?
>
>> @@ -233,6 +264,12 @@ static int __init process_domain_node(
>>          return -ENODATA;
>>      }
>> =20
>> +    if ( bd->domid =3D=3D DOMID_INVALID )
>> +        bd->domid =3D get_initial_domain_id();
>> +    else if ( bd->domid !=3D get_initial_domain_id() )
>> +        printk(XENLOG_WARNING
>> +               "WARN: Booting without initial domid not supported.\n");
>
> I'm not a native speaker, but (or perhaps because of that) "without" feel=
s
> wrong here.

It's probably the compound effect of without and "not supported". The
statement is correct, but it's arguably a bit obtuse.

I'll replace it with "WARN: Unsupported boot with missing initial domid.".

As for the first branch of that clause... I'm not sure we want to
support running with DTs that are missing the domid property.

>
> Also nit: No full stops please at the end of log messages, at least in th=
e
> common case.

Ack

>
> Is the resolving of DOMID_INVALID invalid really needed both here and ...
>
>> --- a/xen/arch/x86/setup.c
>> +++ b/xen/arch/x86/setup.c
>> @@ -1033,8 +1033,9 @@ static struct domain *__init create_dom0(struct bo=
ot_info *bi)
>>      if ( iommu_enabled )
>>          dom0_cfg.flags |=3D XEN_DOMCTL_CDF_iommu;
>> =20
>> -    /* Create initial domain.  Not d0 for pvshim. */
>> -    bd->domid =3D get_initial_domain_id();
>> +    if ( bd->domid =3D=3D DOMID_INVALID )
>> +        /* Create initial domain.  Not d0 for pvshim. */
>> +        bd->domid =3D get_initial_domain_id();
>
> ... here?

I'll rationatise all that on v4.

>
>> @@ -23,6 +24,16 @@ static inline uint64_t  __init fdt_cell_as_u64(const =
fdt32_t *cell)
>>      return ((uint64_t)fdt32_to_cpu(cell[0]) << 32) | fdt32_to_cpu(cell[=
1]);
>>  }
>> =20
>> +static inline int __init fdt_prop_as_u32(
>> +    const struct fdt_property *prop, uint32_t *val)
>> +{
>> +    if ( !prop || fdt32_to_cpu(prop->len) < sizeof(u32) )
>> +        return -EINVAL;
>> +
>> +    *val =3D fdt_cell_as_u32((fdt32_t *)prop->data);
>> +    return 0;
>> +}
>
> Path 08 looks to (partly) open-code this. Perhaps better to introduce alr=
eady
> there?

Already done.

Cheers,
Alejandro



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Date: Mon, 14 Apr 2025 19:45:11 +0100
Message-ID: 
CC: , "Daniel P. Smith"
	, Jason Andryuk , "Xenia
 Ragiadakou" , Stefano Stabellini
	, Michal Orzel , Jan Beulich
	, Andrew Cooper ,
	=?utf-8?q?Roger_Pau_Monn=C3=A9?= 
Subject: Re: [PATCH v3 13/16] x86/hyperlaunch: specify dom0 mode with device
 tree
From: Alejandro Vallejo 
To: Denis Mukhin 
X-Mailer: aerc 0.20.1
References: <20250408160802.49870-1-agarciav@amd.com>
 <20250408160802.49870-14-agarciav@amd.com>
 
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On Wed Apr 9, 2025 at 11:24 PM BST, Denis Mukhin wrote:
> On Tuesday, April 8th, 2025 at 9:07 AM, Alejandro Vallejo  wrote:
>
>>=20
>>=20
>> From: "Daniel P. Smith" dpsmith@apertussolutions.com
>>=20
>>=20
>> Enable selecting the mode in which the domain will be built and ran. Thi=
s
>> includes:
>>=20
>> - whether it will be either a 32/64 bit domain
>> - if it will be run as a PV or HVM domain
>> - and if it will require a device model (not applicable for dom0)
>>=20
>> In the device tree, this will be represented as a bit map that will be c=
arried
>> through into struct boot_domain.
>>=20
>> Signed-off-by: Daniel P. Smith dpsmith@apertussolutions.com
>>=20
>> Reviewed-by: Jason Andryuk jason.andryuk@amd.com
>>=20
>> ---
>> xen/arch/x86/domain-builder/fdt.c | 19 +++++++++++++++++++
>> xen/arch/x86/include/asm/boot-domain.h | 5 +++++
>> xen/arch/x86/setup.c | 3 ++-
>> 3 files changed, 26 insertions(+), 1 deletion(-)
>>=20
>> diff --git a/xen/arch/x86/domain-builder/fdt.c b/xen/arch/x86/domain-bui=
lder/fdt.c
>> index 4c6aafe195..da65f6a5a0 100644
>> --- a/xen/arch/x86/domain-builder/fdt.c
>> +++ b/xen/arch/x86/domain-builder/fdt.c
>> @@ -193,6 +193,25 @@ static int __init process_domain_node(
>> bd->domid =3D (domid_t)val;
>>=20
>> printk(" domid: %d\n", bd->domid);
>>=20
>> }
>> + else if ( strncmp(prop_name, "mode", name_len) =3D=3D 0 )
>> + {
>> + if ( fdt_prop_as_u32(prop, &bd->mode) !=3D 0 )
>>=20
>> + {
>> + printk(" failed processing mode for domain %s\n", name);
>> + return -EINVAL;
>> + }
>> +
>> + printk(" mode: ");
>> + if ( !(bd->mode & BUILD_MODE_PARAVIRT) )
>>=20
>> + {
>> + if ( bd->mode & BUILD_MODE_ENABLE_DM )
>>=20
>> + printk("HVM\n");
>> + else
>> + printk("PVH\n");
>> + }
>> + else
>> + printk("PV\n");
>> + }
>> }
>
> I would re-write so the positive condition is processed first, e.g.:
>
>     if ( bd->mode & BUILD_MODE_PARAVIRT )
>         printk("PV\n");
>     else if ( bd->mode & BUILD_MODE_ENABLE_DM )
>         printk("HVM\n");
>     else
>         printk("PVH\n");
>
> I think it will reduce indentation and make code block a bit easier to re=
ad.
>

For sure. You're absolutely right.

> Also, if there are more uses for printing string representation of a
> boot module mode in the future, perhaps move it to a separate function?
>
> What do you think?

If there's more existing cases I'm happy to unify them, but otherwise
I'd rather keep the code inlined to avoid too much indirection.

Cheers,
Alejandro


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Date: Mon, 14 Apr 2025 19:49:44 +0100
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CC: , "Daniel P. Smith"
	, Jason Andryuk , "Xenia
 Ragiadakou" , Stefano Stabellini
	, Michal Orzel , Jan Beulich
	, Andrew Cooper ,
	=?utf-8?q?Roger_Pau_Monn=C3=A9?= , Julien Grall
	, Bertrand Marquis 
Subject: Re: [PATCH v3 14/16] x86/hyperlaunch: add memory parsing to domain
 config
From: Alejandro Vallejo 
To: Denis Mukhin 
X-Mailer: aerc 0.20.1
References: <20250408160802.49870-1-agarciav@amd.com>
 <20250408160802.49870-15-agarciav@amd.com>
 
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On Wed Apr 9, 2025 at 11:29 PM BST, Denis Mukhin wrote:
> On Tuesday, April 8th, 2025 at 9:07 AM, Alejandro Vallejo  wrote:
>
>>=20
>>=20
>> From: "Daniel P. Smith" dpsmith@apertussolutions.com
>>=20
>>=20
>> Add three properties, memory, mem-min, and mem-max, to the domain node d=
evice
>> tree parsing to define the memory allocation for a domain. All three fie=
lds are
>> expressed in kb and written as a u64 in the device tree entries.
>>=20
>> Signed-off-by: Daniel P. Smith dpsmith@apertussolutions.com
>>=20
>> Reviewed-by: Jason Andryuk jason.andryuk@amd.com
>>=20
>> ---
>> xen/arch/x86/dom0_build.c | 8 ++++++
>> xen/arch/x86/domain-builder/fdt.c | 34 ++++++++++++++++++++++++++
>> xen/arch/x86/include/asm/boot-domain.h | 4 +++
>> xen/include/xen/libfdt/libfdt-xen.h | 10 ++++++++
>> 4 files changed, 56 insertions(+)
>>=20
>> diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c
>> index 0b467fd4a4..36fb090643 100644
>> --- a/xen/arch/x86/dom0_build.c
>> +++ b/xen/arch/x86/dom0_build.c
>> @@ -627,6 +627,14 @@ int __init construct_dom0(const struct boot_domain =
bd)
>>=20
>> process_pending_softirqs();
>>=20
>> + / If param dom0_size was not set and HL config provided memory size */
>> + if ( !get_memsize(&dom0_size, LONG_MAX) && bd->mem_pages )
>>=20
>> + dom0_size.nr_pages =3D bd->mem_pages;
>>=20
>> + if ( !get_memsize(&dom0_min_size, LONG_MAX) && bd->min_pages )
>>=20
>> + dom0_size.nr_pages =3D bd->min_pages;
>>=20
>> + if ( !get_memsize(&dom0_max_size, LONG_MAX) && bd->max_pages )
>>=20
>> + dom0_size.nr_pages =3D bd->max_pages;
>>=20
>> +
>> if ( is_hvm_domain(d) )
>> rc =3D dom0_construct_pvh(bd);
>> else if ( is_pv_domain(d) )
>> diff --git a/xen/arch/x86/domain-builder/fdt.c b/xen/arch/x86/domain-bui=
lder/fdt.c
>> index da65f6a5a0..338b4838c2 100644
>> --- a/xen/arch/x86/domain-builder/fdt.c
>> +++ b/xen/arch/x86/domain-builder/fdt.c
>> @@ -6,6 +6,7 @@
>> #include 
>>=20
>> #include 
>>=20
>> #include 
>>=20
>> +#include 
>>=20
>>=20
>> #include 
>>=20
>> #include 
>>=20
>> @@ -212,6 +213,39 @@ static int __init process_domain_node(
>> else
>> printk("PV\n");
>> }
>> + else if ( strncmp(prop_name, "memory", name_len) =3D=3D 0 )
>> + {
>> + uint64_t kb;
>> + if ( fdt_prop_as_u64(prop, &kb) !=3D 0 )
>> + {
>> + printk(" failed processing memory for domain %s\n", name);
>> + return -EINVAL;
>> + }
>> + bd->mem_pages =3D PFN_DOWN(kb * SZ_1K);
>
> Perhaps use shorter form of KB(kb) (KB() from include/xen/config.h)?
>
> What do you think?

Sure.

Cheers,
Alejandro


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Date: Mon, 14 Apr 2025 19:59:19 +0100
Message-ID: 
From: Alejandro Vallejo 
To: Jan Beulich 
CC: "Daniel P. Smith" , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" , Michal Orzel
	, Andrew Cooper ,
	=?utf-8?q?Roger_Pau_Monn=C3=A9?= , Julien Grall
	, Bertrand Marquis ,
	
Subject: Re: [PATCH v3 14/16] x86/hyperlaunch: add memory parsing to domain
 config
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References: <20250408160802.49870-1-agarciav@amd.com>
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On Thu Apr 10, 2025 at 1:03 PM BST, Jan Beulich wrote:
> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>> @@ -212,6 +213,39 @@ static int __init process_domain_node(
>>              else
>>                  printk("PV\n");
>>          }
>> +        else if ( strncmp(prop_name, "memory", name_len) =3D=3D 0 )
>> +        {
>> +            uint64_t kb;
>> +            if ( fdt_prop_as_u64(prop, &kb) !=3D 0 )
>
> Nit (you know what I have to say here, and again below.)

Ack

>
>> +            {
>> +                printk("  failed processing memory for domain %s\n", na=
me);
>> +                return -EINVAL;
>
> Any reason to override fdt_prop_as_u64()'s return value here?

Mostly to avoid needing to recover the error code. I'll just do it.

>
>> +            }
>> +            bd->mem_pages =3D PFN_DOWN(kb * SZ_1K);
>> +            printk("  memory: %ld kb\n", kb);
>> +        }
>> +        else if ( strncmp(prop_name, "mem-min", name_len) =3D=3D 0 )
>> +        {
>> +            uint64_t kb;
>> +            if ( fdt_prop_as_u64(prop, &kb) !=3D 0 )
>> +            {
>> +                printk("  failed processing memory for domain %s\n", na=
me);
>> +                return -EINVAL;
>> +            }
>> +            bd->min_pages =3D PFN_DOWN(kb * SZ_1K);
>> +            printk("  min memory: %ld kb\n", kb);
>> +        }
>> +        else if ( strncmp(prop_name, "mem-max", name_len) =3D=3D 0 )
>> +        {
>> +            uint64_t kb;
>> +            if ( fdt_prop_as_u64(prop, &kb) !=3D 0 )
>> +            {
>> +                printk("  failed processing memory for domain %s\n", na=
me);
>
> All three error messages being identical doesn't help diagnosing issues.

Indeed. Will add the prop that trigger each.

>
>> --- a/xen/include/xen/libfdt/libfdt-xen.h
>> +++ b/xen/include/xen/libfdt/libfdt-xen.h
>> @@ -34,6 +34,16 @@ static inline int __init fdt_prop_as_u32(
>>      return 0;
>>  }
>> =20
>> +static inline int __init fdt_prop_as_u64(
>> +    const struct fdt_property *prop, uint64_t *val)
>> +{
>> +    if ( !prop || fdt32_to_cpu(prop->len) < sizeof(u64) )
>> +        return -EINVAL;
>> +
>> +    *val =3D fdt_cell_as_u64((fdt32_t *)prop->data);
>
> Please avoid casting away const. Looks like I overlooked this in
> fdt_prop_as_u32() that was introduced by an earlier patch.

As part of v4 I moved this and fdt_prop_as_u32() earlier to patch8 and
already adjusted accordingly.

Cheers,
Alejandro


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Date: Mon, 14 Apr 2025 20:07:22 +0100
Message-ID: 
CC: , "Daniel P. Smith"
	, Jason Andryuk , "Xenia
 Ragiadakou" , Stefano Stabellini
	, Michal Orzel , Jan Beulich
	, Andrew Cooper ,
	=?utf-8?q?Roger_Pau_Monn=C3=A9?= 
Subject: Re: [PATCH v3 15/16] x86/hyperlaunch: add max vcpu parsing of
 hyperlaunch device tree
From: Alejandro Vallejo 
To: Denis Mukhin 
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References: <20250408160802.49870-1-agarciav@amd.com>
 <20250408160802.49870-16-agarciav@amd.com>
 
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On Wed Apr 9, 2025 at 11:33 PM BST, Denis Mukhin wrote:
> On Tuesday, April 8th, 2025 at 9:07 AM, Alejandro Vallejo  wrote:
>
>>=20
>>=20
>> From: "Daniel P. Smith" dpsmith@apertussolutions.com
>>=20
>>=20
>> Introduce the `cpus` property, named as such for dom0less compatibility,=
 that
>> represents the maximum number of vpcus to allocate for a domain. In the =
device
>> tree, it will be encoded as a u32 value.
>>=20
>> Signed-off-by: Daniel P. Smith dpsmith@apertussolutions.com
>>=20
>> Reviewed-by: Jason Andryuk jason.andryuk@amd.com
>>=20
>> ---
>> xen/arch/x86/dom0_build.c | 3 +++
>> xen/arch/x86/domain-builder/fdt.c | 11 +++++++++++
>> xen/arch/x86/include/asm/boot-domain.h | 2 ++
>> 3 files changed, 16 insertions(+)
>>=20
>> diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c
>> index 36fb090643..7b3e31a08f 100644
>> --- a/xen/arch/x86/dom0_build.c
>> +++ b/xen/arch/x86/dom0_build.c
>> @@ -635,6 +635,9 @@ int __init construct_dom0(const struct boot_domain *=
bd)
>> if ( !get_memsize(&dom0_max_size, LONG_MAX) && bd->max_pages )
>>=20
>> dom0_size.nr_pages =3D bd->max_pages;
>>=20
>>=20
>> + if ( opt_dom0_max_vcpus_max =3D=3D UINT_MAX && bd->max_vcpus )
>>=20
>> + opt_dom0_max_vcpus_max =3D bd->max_vcpus;
>>=20
>> +
>> if ( is_hvm_domain(d) )
>> rc =3D dom0_construct_pvh(bd);
>> else if ( is_pv_domain(d) )
>> diff --git a/xen/arch/x86/domain-builder/fdt.c b/xen/arch/x86/domain-bui=
lder/fdt.c
>> index 338b4838c2..5fcb767bdd 100644
>> --- a/xen/arch/x86/domain-builder/fdt.c
>> +++ b/xen/arch/x86/domain-builder/fdt.c
>> @@ -246,6 +246,17 @@ static int __init process_domain_node(
>> bd->max_pages =3D PFN_DOWN(kb * SZ_1K);
>>=20
>> printk(" max memory: %ld kb\n", kb);
>> }
>> + else if ( strncmp(prop_name, "cpus", name_len) =3D=3D 0 )
>> + {
>> + uint32_t val =3D UINT_MAX;
>> + if ( fdt_prop_as_u32(prop, &val) !=3D 0 )
>> + {
>> + printk(" failed processing max_vcpus for domain %s\n", name);
>
> Suggest adding XENLOG_ERR to the error message.

And XENLOG_INFO to the one below.

Ack.

Cheers,
Alejandro


From xen-devel-bounces@lists.xenproject.org Mon Apr 14 19:08:55 2025
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From: Alexey Nepomnyashih 
To: Juergen Gross 
Cc: Alexey Nepomnyashih ,
	Stefano Stabellini ,
	Oleksandr Tyshchenko ,
	"David S. Miller" ,
	Eric Dumazet ,
	Jakub Kicinski ,
	Paolo Abeni ,
	Alexei Starovoitov ,
	Daniel Borkmann ,
	Jesper Dangaard Brouer ,
	John Fastabend ,
	xen-devel@lists.xenproject.org,
	netdev@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	bpf@vger.kernel.org,
	lvc-project@linuxtesting.org,
	stable@vger.kernel.org
Subject: [PATCH] xen-netfront: handle NULL returned by xdp_convert_buff_to_frame()
Date: Mon, 14 Apr 2025 18:34:01 +0000
Message-ID: <20250414183403.265943-1-sdl@nppct.ru>
X-Mailer: git-send-email 2.43.0
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit

The function xdp_convert_buff_to_frame() may return NULL if it fails
to correctly convert the XDP buffer into an XDP frame due to memory
constraints, internal errors, or invalid data. Failing to check for NULL
may lead to a NULL pointer dereference if the result is used later in
processing, potentially causing crashes, data corruption, or undefined
behavior.

Found by Linux Verification Center (linuxtesting.org) with SVACE.

Cc: stable@vger.kernel.org # v5.9+
Fixes: 6c5aa6fc4def ("xen networking: add basic XDP support for xen-netfront")
Signed-off-by: Alexey Nepomnyashih 
---
 drivers/net/xen-netfront.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/net/xen-netfront.c b/drivers/net/xen-netfront.c
index 8425226c09f0..e99561de3cda 100644
--- a/drivers/net/xen-netfront.c
+++ b/drivers/net/xen-netfront.c
@@ -987,6 +987,10 @@ static u32 xennet_run_xdp(struct netfront_queue *queue, struct page *pdata,
 	case XDP_TX:
 		get_page(pdata);
 		xdpf = xdp_convert_buff_to_frame(xdp);
+		if (unlikely(!xdpf)) {
+			trace_xdp_exception(queue->info->netdev, prog, act);
+			break;
+		}
 		err = xennet_xdp_xmit(queue->info->netdev, 1, &xdpf, 0);
 		if (unlikely(!err))
 			xdp_return_frame_rx_napi(xdpf);
-- 
2.43.0



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Message-ID: <0f4f2ed70829fffb2eb816e34e26be22681705a5.camel@gmail.com>
Subject: Re: [RFC PATCH v1 13/15] x86/msr: Use the alternatives mechanism to
 read MSR
From: Francesco Lavra 
To: xin@zytor.com
Cc: acme@kernel.org, adrian.hunter@intel.com, ajay.kaher@broadcom.com, 
 alexander.shishkin@linux.intel.com, alexey.amakhalov@broadcom.com, 
 andrew.cooper3@citrix.com, bcm-kernel-feedback-list@broadcom.com, 
 boris.ostrovsky@oracle.com, bp@alien8.de, bpf@vger.kernel.org, 
 dave.hansen@linux.intel.com, decui@microsoft.com, haiyangz@microsoft.com, 
 hpa@zytor.com, irogers@google.com, jgross@suse.com, jolsa@kernel.org, 
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 linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org, 
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 mingo@redhat.com, namhyung@kernel.org,  pbonzini@redhat.com,
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 tony.luck@intel.com, virtualization@lists.linux.dev, vkuznets@redhat.com, 
 wei.liu@kernel.org, x86@kernel.org, xen-devel@lists.xenproject.org
Date: Mon, 14 Apr 2025 19:13:09 +0200
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On 2025-03-31 at 8:22, Xin Li (Intel) wrote:
> diff --git a/arch/x86/xen/xen-asm.S b/arch/x86/xen/xen-asm.S
> index e672632b1cc0..6e7a9daa03d4 100644
> --- a/arch/x86/xen/xen-asm.S
> +++ b/arch/x86/xen/xen-asm.S
> @@ -399,3 +399,37 @@ SYM_CODE_END(xen_entry_SYSCALL_compat)
>  	RET
>  SYM_FUNC_END(asm_xen_write_msr)
>  EXPORT_SYMBOL_GPL(asm_xen_write_msr)
> +
> +/*
> + * The prototype of the Xen C code:
> + * 	struct { u64 val, bool done } xen_do_read_msr(u32 msr)
> + */
> +SYM_FUNC_START(asm_xen_read_msr)
> +	ENDBR
> +	FRAME_BEGIN
> +	XEN_SAVE_CALLEE_REGS_FOR_MSR
> +	mov %ecx, %edi		/* MSR number */
> +	call xen_do_read_msr
> +	test %dl, %dl		/* %dl=3D1, i.e., ZF=3D0, meaning
> successfully done */
> +	XEN_RESTORE_CALLEE_REGS_FOR_MSR
> +	jnz 2f
> +
> +1:	rdmsr
> +	_ASM_EXTABLE_FUNC_REWIND(1b, -5, FRAME_OFFSET /
> (BITS_PER_LONG / 8))
> +	shl $0x20, %rdx
> +	or %rdx, %rax
> +	/*
> +	 * The top of the stack points directly at the return
> address;
> +	 * back up by 5 bytes from the return address.
> +	 */

This works only if this function has been called directly (e.g. via
`call asm_xen_write_msr`), but doesn't work with alternative call types
(like indirect calls). Not sure why one might want to use an indirect
call to invoke asm_xen_write_msr, but this creates a hidden coupling
between caller and callee.
I don't have a suggestion on how to get rid of this coupling, other
than setting ipdelta in _ASM_EXTABLE_FUNC_REWIND() to 0 and adjusting
the _ASM_EXTABLE_TYPE entries at the call sites to consider the
instruction that follows the function call (instead of the call
instruction) as the faulting instruction (which seems pretty ugly, at
least because what follows the function call could be an instruction
that might itself fault). But you may want to make this caveat explicit
in the comment.


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Date: Mon, 14 Apr 2025 21:09:11 +0200
From: Nicola Vetrini 
To: Jan Beulich 
Cc: Alejandro Vallejo , Jason Andryuk
 , Xenia Ragiadakou ,
 Stefano Stabellini , Michal Orzel
 , Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Julien Grall
 , Bertrand Marquis ,
 xen-devel@lists.xenproject.org, consulting@bugseng.com
Subject: Re: [PATCH v3 08/16] x86/hyperlaunch: Add helpers to locate multiboot
 modules
In-Reply-To: <3d2aa870-a1cb-4e33-841d-aee7b6b6db83@suse.com>
References: <20250408160802.49870-1-agarciav@amd.com>
 <20250408160802.49870-9-agarciav@amd.com>
 
 
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On 2025-04-14 17:05, Jan Beulich wrote:
> On 14.04.2025 15:37, Alejandro Vallejo wrote:
>> On Thu Apr 10, 2025 at 11:42 AM BST, Jan Beulich wrote:
>>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>>> +/*
>>>> + * Locate a multiboot module given its node offset in the FDT.
>>>> + *
>>>> + * The module location may be given via either FDT property:
>>>> + *     * reg = 
>>>> + *         * Mutates `bi` to append the module.
>>>> + *     * module-index = 
>>>> + *         * Leaves `bi` unchanged.
>>>> + *
>>>> + * @param fdt           Pointer to the full FDT.
>>>> + * @param node          Offset for the module node.
>>>> + * @param address_cells Number of 4-octet cells that make up an 
>>>> "address".
>>>> + * @param size_cells    Number of 4-octet cells that make up a 
>>>> "size".
>>>> + * @param bi[inout]     Xen's representation of the boot 
>>>> parameters.
>>>> + * @return              -EINVAL on malformed nodes, otherwise
>>>> + *                      index inside `bi->mods`
>>>> + */
>>>> +int __init fdt_read_multiboot_module(const void *fdt, int node,
>>>> +                                     int address_cells, int 
>>>> size_cells,
>>>> +                                     struct boot_info *bi)
>>> 
>>> Functions without callers and non-static ones without declarations 
>>> are
>>> disliked by Misra.
>> 
>> Can't do much about it if I want them to stand alone in a single 
>> patch.
>> Otherwise the following ones become quite unwieldy to look at. All I 
>> can
>> say is that this function becomes static and with a caller on the next
>> patch.
> 
> Which means you need to touch this again anyway. Perhaps we need a 
> Misra
> deviation for __maybe_unused functions / data, in which case you could
> use that here and strip it along with making the function static. 
> Cc-ing
> Bugseng folks.
> 

There is already an exception for __maybe_unused on labels (Rule 2.6). 
In principle it could be easily extended to encompass unused functions 
(which are verified by another rule), with a suitable rationale.

>>>> +    /* Otherwise location given as a `reg` property. */
>>>> +    prop = fdt_get_property(fdt, node, "reg", NULL);
>>>> +
>>>> +    if ( !prop )
>>>> +    {
>>>> +        printk("  No location for multiboot,module\n");
>>>> +        return -EINVAL;
>>>> +    }
>>>> +    if ( fdt_get_property(fdt, node, "module-index", NULL) )
>>>> +    {
>>>> +        printk("  Location of multiboot,module defined multiple 
>>>> times\n");
>>>> +        return -EINVAL;
>>>> +    }
>>>> +
>>>> +    ret = read_fdt_prop_as_reg(prop, address_cells, size_cells, 
>>>> &addr, &size);
>>>> +
>>>> +    if ( ret < 0 )
>>>> +    {
>>>> +        printk("  Failed reading reg for multiboot,module\n");
>>>> +        return -EINVAL;
>>>> +    }
>>>> +
>>>> +    idx = bi->nr_modules + 1;
>>> 
>>> This at least looks like an off-by-one. If the addition of 1 is 
>>> really
>>> intended, I think it needs commenting on.
>> 
>> Seems to be, yes. The underlying array is a bit bizarre. It's sizes as
>> MAX_NR_BOOTMODS + 1, with the first one being the DTB itself. I guess
>> the intent was to take it into account, but bi->nr_modules is
>> initialised to the number of multiboot modules, so it SHOULD be 
>> already
>> taking it into account.
>> 
>> Also, the logic for bounds checking seems... off (because of the + 1 I
>> mentioned before). Or at least confusing, so I've moved to using
>> ARRAY_SIZE(bi->mods) rather than explicitly comparing against
>> MAX_NR_BOOTMODS.
>> 
>> The array is MAX_NR_BOOTMODS + 1 in length, so it's just more 
>> cognitive
>> load than I'm comfortable with.
> 
> If I'm not mistaken the +1 is inherited from the modules array we had 
> in
> the past, where we wanted 1 extra slot for Xen itself. Hence before you
> move to using ARRAY_SIZE() everywhere it needs to really be clear what
> the +1 here is used for.
> 
>>>> --- a/xen/include/xen/libfdt/libfdt-xen.h
>>>> +++ b/xen/include/xen/libfdt/libfdt-xen.h
>>>> @@ -13,6 +13,63 @@kkk
>>>> 
>>>>  #include 
>>>> 
>>>> +static inline int __init fdt_cell_as_u32(const fdt32_t *cell)
>>> 
>>> Why plain int here, but ...
>>> 
>>>> +{
>>>> +    return fdt32_to_cpu(*cell);
>>>> +}
>>>> +
>>>> +static inline uint64_t  __init fdt_cell_as_u64(const fdt32_t *cell)
>>> 
>>> ... a fixed-width and unsigned type here? Question is whether the 
>>> former
>>> helper is really warranted.
>>> 
>>> Also nit: Stray double blank.
>>> 
>>>> +{
>>>> +    return ((uint64_t)fdt32_to_cpu(cell[0]) << 32) | 
>>>> fdt32_to_cpu(cell[1]);
>>> 
>>> That is - uniformly big endian?
>> 
>> These helpers are disappearing, so it doesn't matter. This is 
>> basically
>> an open coded:
>> 
>>   fdt64_to_cpu(*(const fdt64_t *)fdt32)
>> 
>> And, yes. DTBs are standardised as having big-endian properties, for
>> better or worse :/
>> 
>>> 
>>>> +}
>>> 
>>> Marking such relatively generic inline functions __init is also 
>>> somewhat
>>> risky.
>> 
>> They were originally in domain-builder/fdt.c and moved here as a 
>> result
>> of a request to have them on libfdt. libfdt proved to be somewhat
>> annoying because it would be hard to distinguish accessors for the
>> flattened and the unflattened tree.
>> 
>> I'd personally have them in domain-builder instead, where they are 
>> used.
>> Should they be needed somewhere else, we can always fator them out
>> somewhere else.
>> 
>> Thoughts?
> 
> As long as they're needed only by domain-builder, it's probably fine to 
> have
> them just there.
> 
> Jan

-- 
Nicola Vetrini, B.Sc.
Software Engineer
BUGSENG (https://bugseng.com)
LinkedIn: https://www.linkedin.com/in/nicola-vetrini-a42471253


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Date: Mon, 14 Apr 2025 20:12:17 +0100
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CC: "Daniel P. Smith" , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" , Michal Orzel
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	=?utf-8?q?Roger_Pau_Monn=C3=A9?= ,
	
Subject: Re: [PATCH v3 15/16] x86/hyperlaunch: add max vcpu parsing of
 hyperlaunch device tree
From: Alejandro Vallejo 
To: Jan Beulich 
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 <20250408160802.49870-16-agarciav@amd.com>
 
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On Thu Apr 10, 2025 at 1:08 PM BST, Jan Beulich wrote:
> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>> From: "Daniel P. Smith" 
>>=20
>> Introduce the `cpus` property, named as such for dom0less compatibility,=
 that
>> represents the maximum number of vpcus to allocate for a domain. In the =
device
>
> Nit: vcpus

Ack, and same below

>
>> --- a/xen/arch/x86/domain-builder/fdt.c
>> +++ b/xen/arch/x86/domain-builder/fdt.c
>> @@ -246,6 +246,17 @@ static int __init process_domain_node(
>>              bd->max_pages =3D PFN_DOWN(kb * SZ_1K);
>>              printk("  max memory: %ld kb\n", kb);
>>          }
>> +        else if ( strncmp(prop_name, "cpus", name_len) =3D=3D 0 )
>> +        {
>> +            uint32_t val =3D UINT_MAX;
>> +            if ( fdt_prop_as_u32(prop, &val) !=3D 0 )
>
> And again the same nit.
>
>> +            {
>> +                printk("  failed processing max_vcpus for domain %s\n",=
 name);
>
> There's no "max_vcpus" being processed here; that purely ...
>
>> +                return -EINVAL;
>> +            }
>> +            bd->max_vcpus =3D val;
>
> ... the internal name we use for the struct field etc. The user observing=
 the
> message ought to be able to easily associate it back with the DT item.
>
> Jan

Very true. I agree, and will change accordingly.

Cheers,
Alejandro


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Date: Mon, 14 Apr 2025 20:17:17 +0100
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CC: , "Daniel P. Smith"
	, Jason Andryuk , "Xenia
 Ragiadakou" , Stefano Stabellini
	, Michal Orzel , Jan Beulich
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	=?utf-8?q?Roger_Pau_Monn=C3=A9?= 
Subject: Re: [PATCH v3 16/16] x86/hyperlaunch: add capabilities to boot
 domain
From: Alejandro Vallejo 
To: Denis Mukhin 
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References: <20250408160802.49870-1-agarciav@amd.com>
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On Wed Apr 9, 2025 at 11:39 PM BST, Denis Mukhin wrote:
> On Tuesday, April 8th, 2025 at 9:07 AM, Alejandro Vallejo  wrote:
>
>>=20
>>=20
>> From: "Daniel P. Smith" dpsmith@apertussolutions.com
>>=20
>>=20
>> Introduce the ability to assign capabilities to a domain via its definit=
ion in
>> device tree. The first capability enabled to select is the control domai=
n
>> capability. The capability property is a bitfield in both the device tre=
e and
>> `struct boot_domain`.
>>=20
>> Signed-off-by: Daniel P. Smith dpsmith@apertussolutions.com
>>=20
>> Reviewed-by: Jason Andryuk jason.andryuk@amd.com
>>=20
>> Signed-off-by: Jason Andryuk jason.andryuk@amd.com
>>=20
>> ---
>> xen/arch/x86/domain-builder/core.c | 1 +
>> xen/arch/x86/domain-builder/fdt.c | 12 ++++++++++++
>> xen/arch/x86/include/asm/boot-domain.h | 4 ++++
>> xen/arch/x86/setup.c | 6 +++++-
>> 4 files changed, 22 insertions(+), 1 deletion(-)
>>=20
>> diff --git a/xen/arch/x86/domain-builder/core.c b/xen/arch/x86/domain-bu=
ilder/core.c
>> index 510a74a675..6ab4e6fe53 100644
>> --- a/xen/arch/x86/domain-builder/core.c
>> +++ b/xen/arch/x86/domain-builder/core.c
>> @@ -96,6 +96,7 @@ void __init builder_init(struct boot_info *bi)
>> i =3D first_boot_module_index(bi, BOOTMOD_UNKNOWN);
>> bi->mods[i].type =3D BOOTMOD_KERNEL;
>>=20
>> bi->domains[0].kernel =3D &bi->mods[i];
>>=20
>> + bi->domains[0].capabilities |=3D BUILD_CAPS_CONTROL;
>>=20
>> bi->nr_domains =3D 1;
>>=20
>> }
>> }
>> diff --git a/xen/arch/x86/domain-builder/fdt.c b/xen/arch/x86/domain-bui=
lder/fdt.c
>> index 5fcb767bdd..dbfbcffb0a 100644
>> --- a/xen/arch/x86/domain-builder/fdt.c
>> +++ b/xen/arch/x86/domain-builder/fdt.c
>> @@ -257,6 +257,18 @@ static int __init process_domain_node(
>> bd->max_vcpus =3D val;
>>=20
>> printk(" max vcpus: %d\n", bd->max_vcpus);
>>=20
>> }
>> + else if ( strncmp(prop_name, "capabilities", name_len) =3D=3D 0 )
>> + {
>> + if ( fdt_prop_as_u32(prop, &bd->capabilities) !=3D 0 )
>>=20
>> + {
>> + printk(" failed processing domain id for domain %s\n", name);
>
> Suggest adding XENLOG_ERR to the error message.

Yes, and the message itself seems bogus. The dangers of copy-paste...

Will fix both.

>
>> + return -EINVAL;
>> + }
>> + printk(" caps: ");
>> + if ( bd->capabilities & BUILD_CAPS_CONTROL )
>>=20
>> + printk("c");
>
> Perhaps wrap string generation into a separate function?
>
> That will help if the number of capabilities will grow over time
> and if there will be a need to use string representation somewhere else
> in the code.
>
> Thoughts?

If/when such other code appears I'm happy to unify them, but until then
I'd rather reduce indirection if possible and keep it inlined.

Cheers,
Alejandro


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From: Andrii Sultanov 
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To: xen-devel@lists.xenproject.org
Cc: Andrii Sultanov ,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v4 0/3] drivers: Simplify handling of pci_sbdf_t in passthrough/amd
Date: Mon, 14 Apr 2025 20:19:15 +0100
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Step-by-step, use pci_sbdf_t directly where appropriate instead of
handling seg and bdf separately. This removes conversions, reduces code
size and simplifies code in general.

Andrii Sultanov (3):
  drivers: Change amd_iommu struct to contain pci_sbdf_t, simplify code
  drivers: Change find_iommu_for_device function to take pci_sbdf_t,
    simplify code
  drivers: Make ioapic_sbdf and hpet_sbdf contain pci_sbdf_t

 xen/drivers/passthrough/amd/iommu.h         | 11 +--
 xen/drivers/passthrough/amd/iommu_acpi.c    | 58 ++++++++--------
 xen/drivers/passthrough/amd/iommu_cmd.c     | 10 +--
 xen/drivers/passthrough/amd/iommu_detect.c  | 18 ++---
 xen/drivers/passthrough/amd/iommu_init.c    | 39 +++++------
 xen/drivers/passthrough/amd/iommu_intr.c    | 76 ++++++++++-----------
 xen/drivers/passthrough/amd/iommu_map.c     |  6 +-
 xen/drivers/passthrough/amd/pci_amd_iommu.c | 50 +++++++-------
 8 files changed, 130 insertions(+), 138 deletions(-)

-- 
2.49.0



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        Mon, 14 Apr 2025 12:19:30 -0700 (PDT)
From: Andrii Sultanov 
X-Google-Original-From: Andrii Sultanov 
To: xen-devel@lists.xenproject.org
Cc: Andrii Sultanov ,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v4 1/3] drivers: Change amd_iommu struct to contain pci_sbdf_t, simplify code
Date: Mon, 14 Apr 2025 20:19:16 +0100
Message-ID: <40f504017d71c16a3e2bc8945ac5e674a3e791ed.1744657012.git.andriy.sultanov@vates.tech>
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From: Andrii Sultanov 

Following on from 250d87dc3ff9 ("x86/msi: Change __msi_set_enable() to
take pci_sbdf_t"), make struct amd_iommu contain pci_sbdf_t directly
instead of specifying seg+bdf separately and regenerating sbdf_t from them,
which simplifies code.

Bloat-o-meter reports:
add/remove: 0/0 grow/shrink: 4/13 up/down: 121/-377 (-256)
Function                                     old     new   delta
_einittext                                 22028   22092     +64
amd_iommu_prepare                            853     897     +44
__mon_lengths                               2928    2936      +8
_invalidate_all_devices                      133     138      +5
_hvm_dpci_msi_eoi                            157     155      -2
build_info                                   752     744      -8
amd_iommu_add_device                         856     844     -12
amd_iommu_msi_enable                          33      20     -13
update_intremap_entry_from_msi_msg           879     859     -20
amd_iommu_msi_msg_update_ire                 472     448     -24
send_iommu_command                           251     224     -27
amd_iommu_get_supported_ivhd_type             86      54     -32
amd_iommu_detect_one_acpi                    918     886     -32
iterate_ivrs_mappings                        169     129     -40
flush_command_buffer                         460     417     -43
set_iommu_interrupt_handler                  421     377     -44
enable_iommu                                1745    1665     -80

Resolves: https://gitlab.com/xen-project/xen/-/issues/198

Reported-by: Andrew Cooper 
Signed-off-by: Andrii Sultanov 

---
Changes in V4:
* Dropped references to the order of seg/bdf in the commit message
* Dropped unnecessary detail from the commit message
* Reverted to a macro usage in one case where it was mistakenly dropped
* Folded several separate seg+bdf comparisons into a single one between
  sbdf_t, folded separate assignments with a macro.
* More code size improvements with the changes, so I've refreshed the
  bloat-o-meter report

Changes in V3:
* Dropped the union with seg+bdf/pci_sbdf_t to avoid aliasing, renamed
  all users appropriately

Changes in V2:
* Split single commit into several patches
* Added the commit title of the referenced patch
* Dropped brackets around &(iommu->sbdf) and &(sbdf)
---
 xen/drivers/passthrough/amd/iommu.h         |  4 +--
 xen/drivers/passthrough/amd/iommu_acpi.c    | 16 +++++-----
 xen/drivers/passthrough/amd/iommu_cmd.c     |  8 ++---
 xen/drivers/passthrough/amd/iommu_detect.c  | 18 +++++------
 xen/drivers/passthrough/amd/iommu_init.c    | 35 ++++++++++-----------
 xen/drivers/passthrough/amd/iommu_intr.c    | 29 ++++++++---------
 xen/drivers/passthrough/amd/iommu_map.c     |  4 +--
 xen/drivers/passthrough/amd/pci_amd_iommu.c | 22 ++++++-------
 8 files changed, 67 insertions(+), 69 deletions(-)

diff --git a/xen/drivers/passthrough/amd/iommu.h b/xen/drivers/passthrough/amd/iommu.h
index 00e81b4b2a..ba541f7943 100644
--- a/xen/drivers/passthrough/amd/iommu.h
+++ b/xen/drivers/passthrough/amd/iommu.h
@@ -77,8 +77,8 @@ struct amd_iommu {
     struct list_head list;
     spinlock_t lock; /* protect iommu */
 
-    u16 seg;
-    u16 bdf;
+    pci_sbdf_t sbdf;
+
     struct msi_desc msi;
 
     u16 cap_offset;
diff --git a/xen/drivers/passthrough/amd/iommu_acpi.c b/xen/drivers/passthrough/amd/iommu_acpi.c
index 5bdbfb5ba8..025d9be40f 100644
--- a/xen/drivers/passthrough/amd/iommu_acpi.c
+++ b/xen/drivers/passthrough/amd/iommu_acpi.c
@@ -58,7 +58,7 @@ static void __init add_ivrs_mapping_entry(
     uint16_t bdf, uint16_t alias_id, uint8_t flags, unsigned int ext_flags,
     bool alloc_irt, struct amd_iommu *iommu)
 {
-    struct ivrs_mappings *ivrs_mappings = get_ivrs_mappings(iommu->seg);
+    struct ivrs_mappings *ivrs_mappings = get_ivrs_mappings(iommu->sbdf.seg);
 
     ASSERT( ivrs_mappings != NULL );
 
@@ -70,7 +70,7 @@ static void __init add_ivrs_mapping_entry(
     ivrs_mappings[bdf].device_flags = flags;
 
     /* Don't map an IOMMU by itself. */
-    if ( iommu->bdf == bdf )
+    if ( iommu->sbdf.bdf == bdf )
         return;
 
     /* Allocate interrupt remapping table if needed. */
@@ -96,7 +96,7 @@ static void __init add_ivrs_mapping_entry(
 
             if ( !ivrs_mappings[alias_id].intremap_table )
                 panic("No memory for %pp's IRT\n",
-                      &PCI_SBDF(iommu->seg, alias_id));
+                      &PCI_SBDF(iommu->sbdf.seg, alias_id));
         }
     }
 
@@ -112,7 +112,7 @@ static struct amd_iommu * __init find_iommu_from_bdf_cap(
     struct amd_iommu *iommu;
 
     for_each_amd_iommu ( iommu )
-        if ( (iommu->seg == seg) && (iommu->bdf == bdf) &&
+        if ( (iommu->sbdf.seg == seg) && (iommu->sbdf.bdf == bdf) &&
              (iommu->cap_offset == cap_offset) )
             return iommu;
 
@@ -297,13 +297,13 @@ static int __init register_range_for_iommu_devices(
     /* reserve unity-mapped page entries for devices */
     for ( bdf = rc = 0; !rc && bdf < ivrs_bdf_entries; bdf++ )
     {
-        if ( iommu != find_iommu_for_device(iommu->seg, bdf) )
+        if ( iommu != find_iommu_for_device(iommu->sbdf.seg, bdf) )
             continue;
 
-        req = get_ivrs_mappings(iommu->seg)[bdf].dte_requestor_id;
-        rc = reserve_unity_map_for_device(iommu->seg, bdf, base, length,
+        req = get_ivrs_mappings(iommu->sbdf.seg)[bdf].dte_requestor_id;
+        rc = reserve_unity_map_for_device(iommu->sbdf.seg, bdf, base, length,
                                           iw, ir, false) ?:
-             reserve_unity_map_for_device(iommu->seg, req, base, length,
+             reserve_unity_map_for_device(iommu->sbdf.seg, req, base, length,
                                           iw, ir, false);
     }
 
diff --git a/xen/drivers/passthrough/amd/iommu_cmd.c b/xen/drivers/passthrough/amd/iommu_cmd.c
index 83c525b84f..eefd626161 100644
--- a/xen/drivers/passthrough/amd/iommu_cmd.c
+++ b/xen/drivers/passthrough/amd/iommu_cmd.c
@@ -40,7 +40,7 @@ static void send_iommu_command(struct amd_iommu *iommu,
                      IOMMU_RING_BUFFER_PTR_MASK) )
     {
         printk_once(XENLOG_ERR "AMD IOMMU %pp: no cmd slot available\n",
-                    &PCI_SBDF(iommu->seg, iommu->bdf));
+                    &iommu->sbdf);
         cpu_relax();
     }
 
@@ -85,7 +85,7 @@ static void flush_command_buffer(struct amd_iommu *iommu,
             threshold |= threshold << 1;
             printk(XENLOG_WARNING
                    "AMD IOMMU %pp: %scompletion wait taking too long\n",
-                   &PCI_SBDF(iommu->seg, iommu->bdf),
+                   &iommu->sbdf,
                    timeout_base ? "iotlb " : "");
             timeout = 0;
         }
@@ -95,7 +95,7 @@ static void flush_command_buffer(struct amd_iommu *iommu,
     if ( !timeout )
         printk(XENLOG_WARNING
                "AMD IOMMU %pp: %scompletion wait took %lums\n",
-               &PCI_SBDF(iommu->seg, iommu->bdf),
+               &iommu->sbdf,
                timeout_base ? "iotlb " : "",
                (NOW() - start) / 10000000);
 }
@@ -300,7 +300,7 @@ void amd_iommu_flush_iotlb(u8 devfn, const struct pci_dev *pdev,
     if ( !iommu_has_cap(iommu, PCI_CAP_IOTLB_SHIFT) )
         return;
 
-    req_id = get_dma_requestor_id(iommu->seg, PCI_BDF(pdev->bus, devfn));
+    req_id = get_dma_requestor_id(iommu->sbdf.seg, PCI_BDF(pdev->bus, devfn));
     queueid = req_id;
     maxpend = pdev->ats.queue_depth & 0xff;
 
diff --git a/xen/drivers/passthrough/amd/iommu_detect.c b/xen/drivers/passthrough/amd/iommu_detect.c
index cede44e651..72cc554b08 100644
--- a/xen/drivers/passthrough/amd/iommu_detect.c
+++ b/xen/drivers/passthrough/amd/iommu_detect.c
@@ -162,8 +162,8 @@ int __init amd_iommu_detect_one_acpi(
     spin_lock_init(&iommu->lock);
     INIT_LIST_HEAD(&iommu->ats_devices);
 
-    iommu->seg = ivhd_block->pci_segment_group;
-    iommu->bdf = ivhd_block->header.device_id;
+    iommu->sbdf = PCI_SBDF(ivhd_block->pci_segment_group,
+                           ivhd_block->header.device_id);
     iommu->cap_offset = ivhd_block->capability_offset;
     iommu->mmio_base_phys = ivhd_block->base_address;
 
@@ -210,16 +210,16 @@ int __init amd_iommu_detect_one_acpi(
     /* override IOMMU HT flags */
     iommu->ht_flags = ivhd_block->header.flags;
 
-    bus = PCI_BUS(iommu->bdf);
-    dev = PCI_SLOT(iommu->bdf);
-    func = PCI_FUNC(iommu->bdf);
+    bus = PCI_BUS(iommu->sbdf.bdf);
+    dev = PCI_SLOT(iommu->sbdf.bdf);
+    func = PCI_FUNC(iommu->sbdf.bdf);
 
-    rt = get_iommu_capabilities(iommu->seg, bus, dev, func,
+    rt = get_iommu_capabilities(iommu->sbdf.seg, bus, dev, func,
                                 iommu->cap_offset, iommu);
     if ( rt )
         goto out;
 
-    rt = get_iommu_msi_capabilities(iommu->seg, bus, dev, func, iommu);
+    rt = get_iommu_msi_capabilities(iommu->sbdf.seg, bus, dev, func, iommu);
     if ( rt )
         goto out;
 
@@ -228,10 +228,10 @@ int __init amd_iommu_detect_one_acpi(
     if ( !iommu->domid_map )
         goto out;
 
-    rt = pci_ro_device(iommu->seg, bus, PCI_DEVFN(dev, func));
+    rt = pci_ro_device(iommu->sbdf.seg, bus, PCI_DEVFN(dev, func));
     if ( rt )
         printk(XENLOG_ERR "Could not mark config space of %pp read-only (%d)\n",
-               &PCI_SBDF(iommu->seg, iommu->bdf), rt);
+               &iommu->sbdf, rt);
 
     list_add_tail(&iommu->list, &amd_iommu_head);
     rt = 0;
diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c
index bb25b55c85..58d657060a 100644
--- a/xen/drivers/passthrough/amd/iommu_init.c
+++ b/xen/drivers/passthrough/amd/iommu_init.c
@@ -409,9 +409,7 @@ static void iommu_reset_log(struct amd_iommu *iommu,
 
 static void amd_iommu_msi_enable(struct amd_iommu *iommu, int flag)
 {
-    pci_sbdf_t sbdf = { .seg = iommu->seg, .bdf = iommu->bdf };
-
-    __msi_set_enable(sbdf, iommu->msi.msi_attrib.pos, flag);
+    __msi_set_enable(iommu->sbdf, iommu->msi.msi_attrib.pos, flag);
 }
 
 static void cf_check iommu_msi_unmask(struct irq_desc *desc)
@@ -566,7 +564,7 @@ static void cf_check parse_event_log_entry(struct amd_iommu *iommu, u32 entry[])
 
         printk(XENLOG_ERR "AMD-Vi: %s: %pp d%u addr %016"PRIx64
                " flags %#x%s%s%s%s%s%s%s%s%s%s\n",
-               code_str, &PCI_SBDF(iommu->seg, device_id),
+               code_str, &PCI_SBDF(iommu->sbdf.seg, device_id),
                domain_id, addr, flags,
                (flags & 0xe00) ? " ??" : "",
                (flags & 0x100) ? " TR" : "",
@@ -583,8 +581,8 @@ static void cf_check parse_event_log_entry(struct amd_iommu *iommu, u32 entry[])
             amd_iommu_print_entries(iommu, device_id, daddr_to_dfn(addr));
 
         for ( bdf = 0; bdf < ivrs_bdf_entries; bdf++ )
-            if ( get_dma_requestor_id(iommu->seg, bdf) == device_id )
-                pci_check_disable_device(iommu->seg, PCI_BUS(bdf),
+            if ( get_dma_requestor_id(iommu->sbdf.seg, bdf) == device_id )
+                pci_check_disable_device(iommu->sbdf.seg, PCI_BUS(bdf),
                                          PCI_DEVFN(bdf));
     }
     else
@@ -643,7 +641,7 @@ static void cf_check parse_ppr_log_entry(struct amd_iommu *iommu, u32 entry[])
     struct pci_dev *pdev;
 
     pcidevs_lock();
-    pdev = pci_get_real_pdev(PCI_SBDF(iommu->seg, device_id));
+    pdev = pci_get_real_pdev(PCI_SBDF(iommu->sbdf.seg, device_id));
     pcidevs_unlock();
 
     if ( pdev )
@@ -752,12 +750,11 @@ static bool __init set_iommu_interrupt_handler(struct amd_iommu *iommu)
     }
 
     pcidevs_lock();
-    iommu->msi.dev = pci_get_pdev(NULL, PCI_SBDF(iommu->seg, iommu->bdf));
+    iommu->msi.dev = pci_get_pdev(NULL, iommu->sbdf);
     pcidevs_unlock();
     if ( !iommu->msi.dev )
     {
-        AMD_IOMMU_WARN("no pdev for %pp\n",
-                       &PCI_SBDF(iommu->seg, iommu->bdf));
+        AMD_IOMMU_WARN("no pdev for %pp\n", &iommu->sbdf);
         return 0;
     }
 
@@ -779,7 +776,7 @@ static bool __init set_iommu_interrupt_handler(struct amd_iommu *iommu)
         hw_irq_controller *handler;
         u16 control;
 
-        control = pci_conf_read16(PCI_SBDF(iommu->seg, iommu->bdf),
+        control = pci_conf_read16(iommu->sbdf,
                                   iommu->msi.msi_attrib.pos + PCI_MSI_FLAGS);
 
         iommu->msi.msi.nvec = 1;
@@ -843,22 +840,22 @@ static void amd_iommu_erratum_746_workaround(struct amd_iommu *iommu)
          (boot_cpu_data.x86_model > 0x1f) )
         return;
 
-    pci_conf_write32(PCI_SBDF(iommu->seg, iommu->bdf), 0xf0, 0x90);
-    value = pci_conf_read32(PCI_SBDF(iommu->seg, iommu->bdf), 0xf4);
+    pci_conf_write32(iommu->sbdf, 0xf0, 0x90);
+    value = pci_conf_read32(iommu->sbdf, 0xf4);
 
     if ( value & (1 << 2) )
         return;
 
     /* Select NB indirect register 0x90 and enable writing */
-    pci_conf_write32(PCI_SBDF(iommu->seg, iommu->bdf), 0xf0, 0x90 | (1 << 8));
+    pci_conf_write32(iommu->sbdf, 0xf0, 0x90 | (1 << 8));
 
-    pci_conf_write32(PCI_SBDF(iommu->seg, iommu->bdf), 0xf4, value | (1 << 2));
+    pci_conf_write32(iommu->sbdf, 0xf4, value | (1 << 2));
     printk(XENLOG_INFO
            "AMD-Vi: Applying erratum 746 workaround for IOMMU at %pp\n",
-           &PCI_SBDF(iommu->seg, iommu->bdf));
+           &iommu->sbdf);
 
     /* Clear the enable writing bit */
-    pci_conf_write32(PCI_SBDF(iommu->seg, iommu->bdf), 0xf0, 0x90);
+    pci_conf_write32(iommu->sbdf, 0xf0, 0x90);
 }
 
 static void enable_iommu(struct amd_iommu *iommu)
@@ -1095,7 +1092,7 @@ static int __init amd_iommu_init_one(struct amd_iommu *iommu, bool intr)
         goto error_out;
 
     /* Make sure that the device table has been successfully allocated. */
-    ivrs_mappings = get_ivrs_mappings(iommu->seg);
+    ivrs_mappings = get_ivrs_mappings(iommu->sbdf.seg);
     if ( !IVRS_MAPPINGS_DEVTAB(ivrs_mappings) )
         goto error_out;
 
@@ -1363,7 +1360,7 @@ static bool __init amd_sp5100_erratum28(void)
 
 static int __init amd_iommu_prepare_one(struct amd_iommu *iommu)
 {
-    int rc = alloc_ivrs_mappings(iommu->seg);
+    int rc = alloc_ivrs_mappings(iommu->sbdf.seg);
 
     if ( !rc )
         rc = map_iommu_mmio_region(iommu);
diff --git a/xen/drivers/passthrough/amd/iommu_intr.c b/xen/drivers/passthrough/amd/iommu_intr.c
index 9abdc38053..a7347fcbad 100644
--- a/xen/drivers/passthrough/amd/iommu_intr.c
+++ b/xen/drivers/passthrough/amd/iommu_intr.c
@@ -132,7 +132,7 @@ static int get_intremap_requestor_id(int seg, int bdf)
 static unsigned int alloc_intremap_entry(const struct amd_iommu *iommu,
                                          unsigned int bdf, unsigned int nr)
 {
-    const struct ivrs_mappings *ivrs_mappings = get_ivrs_mappings(iommu->seg);
+    const struct ivrs_mappings *ivrs_mappings = get_ivrs_mappings(iommu->sbdf.seg);
     unsigned long *inuse = ivrs_mappings[bdf].intremap_inuse;
     unsigned int nr_ents =
         intremap_table_entries(ivrs_mappings[bdf].intremap_table, iommu);
@@ -167,7 +167,7 @@ static union irte_ptr get_intremap_entry(const struct amd_iommu *iommu,
                                          unsigned int bdf, unsigned int index)
 {
     union irte_ptr table = {
-        .ptr = get_ivrs_mappings(iommu->seg)[bdf].intremap_table
+        .ptr = get_ivrs_mappings(iommu->sbdf.seg)[bdf].intremap_table
     };
 
     ASSERT(table.ptr && (index < intremap_table_entries(table.ptr, iommu)));
@@ -184,7 +184,7 @@ static void free_intremap_entry(const struct amd_iommu *iommu,
                                 unsigned int bdf, unsigned int index)
 {
     union irte_ptr entry = get_intremap_entry(iommu, bdf, index);
-    struct ivrs_mappings *ivrs = get_ivrs_mappings(iommu->seg);
+    struct ivrs_mappings *ivrs = get_ivrs_mappings(iommu->sbdf.seg);
 
     if ( iommu->ctrl.ga_en )
     {
@@ -281,8 +281,8 @@ static int update_intremap_entry_from_ioapic(
     unsigned int dest, offset;
     bool fresh = false;
 
-    req_id = get_intremap_requestor_id(iommu->seg, bdf);
-    lock = get_intremap_lock(iommu->seg, req_id);
+    req_id = get_intremap_requestor_id(iommu->sbdf.seg, bdf);
+    lock = get_intremap_lock(iommu->sbdf.seg, req_id);
 
     delivery_mode = rte->delivery_mode;
     vector = rte->vector;
@@ -419,10 +419,10 @@ static int update_intremap_entry_from_msi_msg(
     unsigned int dest, offset, i;
     bool fresh = false;
 
-    req_id = get_dma_requestor_id(iommu->seg, bdf);
-    alias_id = get_intremap_requestor_id(iommu->seg, bdf);
+    req_id = get_dma_requestor_id(iommu->sbdf.seg, bdf);
+    alias_id = get_intremap_requestor_id(iommu->sbdf.seg, bdf);
 
-    lock = get_intremap_lock(iommu->seg, req_id);
+    lock = get_intremap_lock(iommu->sbdf.seg, req_id);
     spin_lock_irqsave(lock, flags);
 
     if ( msg == NULL )
@@ -486,10 +486,10 @@ static int update_intremap_entry_from_msi_msg(
      */
 
     if ( ( req_id != alias_id ) &&
-         get_ivrs_mappings(iommu->seg)[alias_id].intremap_table != NULL )
+         get_ivrs_mappings(iommu->sbdf.seg)[alias_id].intremap_table != NULL )
     {
-        BUG_ON(get_ivrs_mappings(iommu->seg)[req_id].intremap_table !=
-               get_ivrs_mappings(iommu->seg)[alias_id].intremap_table);
+        BUG_ON(get_ivrs_mappings(iommu->sbdf.seg)[req_id].intremap_table !=
+               get_ivrs_mappings(iommu->sbdf.seg)[alias_id].intremap_table);
     }
 
     return fresh;
@@ -498,16 +498,17 @@ static int update_intremap_entry_from_msi_msg(
 static struct amd_iommu *_find_iommu_for_device(int seg, int bdf)
 {
     struct amd_iommu *iommu;
+    pci_sbdf_t sbdf = PCI_SBDF(seg, bdf);
 
     for_each_amd_iommu ( iommu )
-        if ( iommu->seg == seg && iommu->bdf == bdf )
+        if ( iommu->sbdf.sbdf == sbdf.sbdf )
             return NULL;
 
     iommu = find_iommu_for_device(seg, bdf);
     if ( iommu )
         return iommu;
 
-    AMD_IOMMU_DEBUG("No IOMMU for MSI dev = %pp\n", &PCI_SBDF(seg, bdf));
+    AMD_IOMMU_DEBUG("No IOMMU for MSI dev = %pp\n", &sbdf);
     return ERR_PTR(-EINVAL);
 }
 
@@ -730,7 +731,7 @@ static void dump_intremap_table(const struct amd_iommu *iommu,
         if ( ivrs_mapping )
         {
             printk("  %pp:\n",
-                   &PCI_SBDF(iommu->seg, ivrs_mapping->dte_requestor_id));
+                   &PCI_SBDF(iommu->sbdf.seg, ivrs_mapping->dte_requestor_id));
             ivrs_mapping = NULL;
         }
 
diff --git a/xen/drivers/passthrough/amd/iommu_map.c b/xen/drivers/passthrough/amd/iommu_map.c
index dde393645a..d28c475650 100644
--- a/xen/drivers/passthrough/amd/iommu_map.c
+++ b/xen/drivers/passthrough/amd/iommu_map.c
@@ -558,14 +558,14 @@ void amd_iommu_print_entries(const struct amd_iommu *iommu, unsigned int dev_id,
 
     if ( !dt[dev_id].tv )
     {
-        printk("%pp: no root\n", &PCI_SBDF(iommu->seg, dev_id));
+        printk("%pp: no root\n", &PCI_SBDF(iommu->sbdf.seg, dev_id));
         return;
     }
 
     pt_mfn = _mfn(dt[dev_id].pt_root);
     level = dt[dev_id].paging_mode;
     printk("%pp root @ %"PRI_mfn" (%u levels) dfn=%"PRI_dfn"\n",
-           &PCI_SBDF(iommu->seg, dev_id), mfn_x(pt_mfn), level, dfn_x(dfn));
+           &PCI_SBDF(iommu->sbdf.seg, dev_id), mfn_x(pt_mfn), level, dfn_x(dfn));
 
     while ( level )
     {
diff --git a/xen/drivers/passthrough/amd/pci_amd_iommu.c b/xen/drivers/passthrough/amd/pci_amd_iommu.c
index d00697edb3..6b58e3380b 100644
--- a/xen/drivers/passthrough/amd/pci_amd_iommu.c
+++ b/xen/drivers/passthrough/amd/pci_amd_iommu.c
@@ -43,7 +43,7 @@ struct amd_iommu *find_iommu_for_device(int seg, int bdf)
     {
         unsigned int bd0 = bdf & ~PCI_FUNC(~0);
 
-        if ( ivrs_mappings[bd0].iommu && ivrs_mappings[bd0].iommu->bdf != bdf )
+        if ( ivrs_mappings[bd0].iommu && ivrs_mappings[bd0].iommu->sbdf.bdf != bdf )
         {
             struct ivrs_mappings tmp = ivrs_mappings[bd0];
 
@@ -121,7 +121,7 @@ static bool use_ats(
 {
     return !ivrs_dev->block_ats &&
            iommu_has_cap(iommu, PCI_CAP_IOTLB_SHIFT) &&
-           pci_ats_device(iommu->seg, pdev->bus, pdev->devfn);
+           pci_ats_device(iommu->sbdf.seg, pdev->bus, pdev->devfn);
 }
 
 static int __must_check amd_iommu_setup_domain_device(
@@ -147,17 +147,17 @@ static int __must_check amd_iommu_setup_domain_device(
     if ( rc )
         return rc;
 
-    req_id = get_dma_requestor_id(iommu->seg, pdev->sbdf.bdf);
-    ivrs_dev = &get_ivrs_mappings(iommu->seg)[req_id];
+    req_id = get_dma_requestor_id(iommu->sbdf.seg, pdev->sbdf.bdf);
+    ivrs_dev = &get_ivrs_mappings(iommu->sbdf.seg)[req_id];
     sr_flags = (iommu_hwdom_passthrough && is_hardware_domain(domain)
                 ? 0 : SET_ROOT_VALID)
                | (ivrs_dev->unity_map ? SET_ROOT_WITH_UNITY_MAP : 0);
 
     /* get device-table entry */
-    req_id = get_dma_requestor_id(iommu->seg, PCI_BDF(bus, devfn));
+    req_id = get_dma_requestor_id(iommu->sbdf.seg, PCI_BDF(bus, devfn));
     table = iommu->dev_table.buffer;
     dte = &table[req_id];
-    ivrs_dev = &get_ivrs_mappings(iommu->seg)[req_id];
+    ivrs_dev = &get_ivrs_mappings(iommu->sbdf.seg)[req_id];
 
     if ( domain != dom_io )
     {
@@ -275,7 +275,7 @@ static int __must_check amd_iommu_setup_domain_device(
     ASSERT(pcidevs_locked());
 
     if ( use_ats(pdev, iommu, ivrs_dev) &&
-         !pci_ats_enabled(iommu->seg, bus, pdev->devfn) )
+         !pci_ats_enabled(iommu->sbdf.seg, bus, pdev->devfn) )
     {
         if ( devfn == pdev->devfn )
             enable_ats_device(pdev, &iommu->ats_devices);
@@ -418,12 +418,12 @@ static void amd_iommu_disable_domain_device(const struct domain *domain,
 
     ASSERT(pcidevs_locked());
 
-    if ( pci_ats_device(iommu->seg, bus, pdev->devfn) &&
-         pci_ats_enabled(iommu->seg, bus, pdev->devfn) )
+    if ( pci_ats_device(iommu->sbdf.seg, bus, pdev->devfn) &&
+         pci_ats_enabled(iommu->sbdf.seg, bus, pdev->devfn) )
         disable_ats_device(pdev);
 
     BUG_ON ( iommu->dev_table.buffer == NULL );
-    req_id = get_dma_requestor_id(iommu->seg, PCI_BDF(bus, devfn));
+    req_id = get_dma_requestor_id(iommu->sbdf.seg, PCI_BDF(bus, devfn));
     table = iommu->dev_table.buffer;
     dte = &table[req_id];
 
@@ -578,7 +578,7 @@ static int cf_check amd_iommu_add_device(u8 devfn, struct pci_dev *pdev)
         return -EINVAL;
 
     for_each_amd_iommu(iommu)
-        if ( pdev->seg == iommu->seg && pdev->sbdf.bdf == iommu->bdf )
+        if ( pdev->sbdf.sbdf == iommu->sbdf.sbdf )
             return is_hardware_domain(pdev->domain) ? 0 : -ENODEV;
 
     iommu = find_iommu_for_device(pdev->seg, pdev->sbdf.bdf);
-- 
2.49.0



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        Mon, 14 Apr 2025 12:19:32 -0700 (PDT)
From: Andrii Sultanov 
X-Google-Original-From: Andrii Sultanov 
To: xen-devel@lists.xenproject.org
Cc: Andrii Sultanov ,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v4 2/3] drivers: Change find_iommu_for_device function to take pci_sbdf_t, simplify code
Date: Mon, 14 Apr 2025 20:19:17 +0100
Message-ID: <34125ae23ff54f55637f25afb7972374c87172cd.1744657012.git.andriy.sultanov@vates.tech>
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From: Andrii Sultanov 

Following a similar change to amd_iommu struct, change the
find_iommu_for_device function to take pci_sbdf_t as a single parameter.
This removes conversions in the majority of cases.

Bloat-o-meter reports (on top of the first patch in the series):
add/remove: 0/0 grow/shrink: 12/11 up/down: 95/-95 (0)
Function                                     old     new   delta
amd_iommu_get_supported_ivhd_type             54      86     +32
parse_ivrs_table                            3955    3966     +11
amd_iommu_assign_device                      271     282     +11
__mon_lengths                               2928    2936      +8
update_intremap_entry_from_msi_msg           859     864      +5
iov_supports_xt                              270     275      +5
amd_setup_hpet_msi                           232     237      +5
amd_iommu_domain_destroy                      46      51      +5
_hvm_dpci_msi_eoi                            155     160      +5
find_iommu_for_device                        242     246      +4
amd_iommu_ioapic_update_ire                  572     575      +3
allocate_domain_resources                     82      83      +1
amd_iommu_read_ioapic_from_ire               347     344      -3
reassign_device                              843     838      -5
amd_iommu_remove_device                      352     347      -5
amd_iommu_get_reserved_device_memory         521     516      -5
amd_iommu_flush_iotlb                        359     354      -5
amd_iommu_add_device                         844     839      -5
amd_iommu_setup_domain_device               1478    1472      -6
build_info                                   752     744      -8
amd_iommu_detect_one_acpi                    886     876     -10
register_range_for_device                    297     281     -16
parse_ivmd_block                            1339    1312     -27

Signed-off-by: Andrii Sultanov 

Acked-by: Jan Beulich 

---
Changes in V4:
* After amendments to the previous commit which increased improvements
  there, this commit now does not improve code size anymore (but still
  simplifies code), so I've updated the bloat-o-meter report.

Changes in V3:
* Amended commit message
* As the previous patch dropped the aliasing of seg and bdf, renamed users of
  amd_iommu as appropriate.

Changes in V2:
* Split single commit into several patches
* Dropped brackets around &(iommu->sbdf) and &(sbdf)
* Dropped most of the hunk in _invalidate_all_devices - it was
  bloat-equivalent to the existing code - just convert with PCI_SBDF
  instead
* Dropped the hunk in get_intremap_requestor_id (iommu_intr.c) and
  amd_iommu_get_reserved_device_memory (iommu_map.c) as they were only
  increasing the code size.
* Kept "/* XXX */" where appropriate
* Fixed a slip-up in register_range_for_iommu_devices where iommu->sbdf
  replaced the usage of *different* seg and bdf.
---
 xen/drivers/passthrough/amd/iommu.h         |  2 +-
 xen/drivers/passthrough/amd/iommu_acpi.c    | 14 +++++-----
 xen/drivers/passthrough/amd/iommu_cmd.c     |  2 +-
 xen/drivers/passthrough/amd/iommu_init.c    |  4 +--
 xen/drivers/passthrough/amd/iommu_intr.c    | 17 ++++++------
 xen/drivers/passthrough/amd/iommu_map.c     |  2 +-
 xen/drivers/passthrough/amd/pci_amd_iommu.c | 30 ++++++++++-----------
 7 files changed, 35 insertions(+), 36 deletions(-)

diff --git a/xen/drivers/passthrough/amd/iommu.h b/xen/drivers/passthrough/amd/iommu.h
index ba541f7943..2599800e6a 100644
--- a/xen/drivers/passthrough/amd/iommu.h
+++ b/xen/drivers/passthrough/amd/iommu.h
@@ -240,7 +240,7 @@ void amd_iommu_flush_intremap(struct amd_iommu *iommu, uint16_t bdf);
 void amd_iommu_flush_all_caches(struct amd_iommu *iommu);
 
 /* find iommu for bdf */
-struct amd_iommu *find_iommu_for_device(int seg, int bdf);
+struct amd_iommu *find_iommu_for_device(pci_sbdf_t sbdf);
 
 /* interrupt remapping */
 bool cf_check iov_supports_xt(void);
diff --git a/xen/drivers/passthrough/amd/iommu_acpi.c b/xen/drivers/passthrough/amd/iommu_acpi.c
index 025d9be40f..9e4fbee953 100644
--- a/xen/drivers/passthrough/amd/iommu_acpi.c
+++ b/xen/drivers/passthrough/amd/iommu_acpi.c
@@ -239,17 +239,17 @@ static int __init register_range_for_device(
     unsigned int bdf, paddr_t base, paddr_t limit,
     bool iw, bool ir, bool exclusion)
 {
-    int seg = 0; /* XXX */
-    struct ivrs_mappings *ivrs_mappings = get_ivrs_mappings(seg);
+    pci_sbdf_t sbdf = { .seg = 0 /* XXX */, .bdf = bdf };
+    struct ivrs_mappings *ivrs_mappings = get_ivrs_mappings(sbdf.seg);
     struct amd_iommu *iommu;
     u16 req;
     int rc = 0;
 
-    iommu = find_iommu_for_device(seg, bdf);
+    iommu = find_iommu_for_device(sbdf);
     if ( !iommu )
     {
         AMD_IOMMU_WARN("IVMD: no IOMMU for device %pp - ignoring constrain\n",
-                       &PCI_SBDF(seg, bdf));
+                       &sbdf);
         return 0;
     }
     req = ivrs_mappings[bdf].dte_requestor_id;
@@ -263,9 +263,9 @@ static int __init register_range_for_device(
         paddr_t length = limit + PAGE_SIZE - base;
 
         /* reserve unity-mapped page entries for device */
-        rc = reserve_unity_map_for_device(seg, bdf, base, length, iw, ir,
+        rc = reserve_unity_map_for_device(sbdf.seg, bdf, base, length, iw, ir,
                                           false) ?:
-             reserve_unity_map_for_device(seg, req, base, length, iw, ir,
+             reserve_unity_map_for_device(sbdf.seg, req, base, length, iw, ir,
                                           false);
     }
     else
@@ -297,7 +297,7 @@ static int __init register_range_for_iommu_devices(
     /* reserve unity-mapped page entries for devices */
     for ( bdf = rc = 0; !rc && bdf < ivrs_bdf_entries; bdf++ )
     {
-        if ( iommu != find_iommu_for_device(iommu->sbdf.seg, bdf) )
+        if ( iommu != find_iommu_for_device(PCI_SBDF(iommu->sbdf.seg, bdf)) )
             continue;
 
         req = get_ivrs_mappings(iommu->sbdf.seg)[bdf].dte_requestor_id;
diff --git a/xen/drivers/passthrough/amd/iommu_cmd.c b/xen/drivers/passthrough/amd/iommu_cmd.c
index eefd626161..6b80c57f44 100644
--- a/xen/drivers/passthrough/amd/iommu_cmd.c
+++ b/xen/drivers/passthrough/amd/iommu_cmd.c
@@ -288,7 +288,7 @@ void amd_iommu_flush_iotlb(u8 devfn, const struct pci_dev *pdev,
     if ( !pci_ats_enabled(pdev->seg, pdev->bus, pdev->devfn) )
         return;
 
-    iommu = find_iommu_for_device(pdev->seg, pdev->sbdf.bdf);
+    iommu = find_iommu_for_device(pdev->sbdf);
 
     if ( !iommu )
     {
diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c
index 58d657060a..3f6d2f5db5 100644
--- a/xen/drivers/passthrough/amd/iommu_init.c
+++ b/xen/drivers/passthrough/amd/iommu_init.c
@@ -1540,13 +1540,13 @@ static void invalidate_all_domain_pages(void)
 static int cf_check _invalidate_all_devices(
     u16 seg, struct ivrs_mappings *ivrs_mappings)
 {
-    unsigned int bdf; 
+    unsigned int bdf;
     u16 req_id;
     struct amd_iommu *iommu;
 
     for ( bdf = 0; bdf < ivrs_bdf_entries; bdf++ )
     {
-        iommu = find_iommu_for_device(seg, bdf);
+        iommu = find_iommu_for_device(PCI_SBDF(seg, bdf));
         req_id = ivrs_mappings[bdf].dte_requestor_id;
         if ( iommu )
         {
diff --git a/xen/drivers/passthrough/amd/iommu_intr.c b/xen/drivers/passthrough/amd/iommu_intr.c
index a7347fcbad..16075cd5a1 100644
--- a/xen/drivers/passthrough/amd/iommu_intr.c
+++ b/xen/drivers/passthrough/amd/iommu_intr.c
@@ -337,7 +337,7 @@ void cf_check amd_iommu_ioapic_update_ire(
     /* get device id of ioapic devices */
     bdf = ioapic_sbdf[idx].bdf;
     seg = ioapic_sbdf[idx].seg;
-    iommu = find_iommu_for_device(seg, bdf);
+    iommu = find_iommu_for_device(PCI_SBDF(seg, bdf));
     if ( !iommu )
     {
         AMD_IOMMU_WARN("failed to find IOMMU for IO-APIC @ %04x:%04x\n",
@@ -383,7 +383,7 @@ unsigned int cf_check amd_iommu_read_ioapic_from_ire(
 
     seg = ioapic_sbdf[idx].seg;
     bdf = ioapic_sbdf[idx].bdf;
-    iommu = find_iommu_for_device(seg, bdf);
+    iommu = find_iommu_for_device(PCI_SBDF(seg, bdf));
     if ( !iommu )
         return val;
     req_id = get_intremap_requestor_id(seg, bdf);
@@ -495,16 +495,15 @@ static int update_intremap_entry_from_msi_msg(
     return fresh;
 }
 
-static struct amd_iommu *_find_iommu_for_device(int seg, int bdf)
+static struct amd_iommu *_find_iommu_for_device(pci_sbdf_t sbdf)
 {
     struct amd_iommu *iommu;
-    pci_sbdf_t sbdf = PCI_SBDF(seg, bdf);
 
     for_each_amd_iommu ( iommu )
         if ( iommu->sbdf.sbdf == sbdf.sbdf )
             return NULL;
 
-    iommu = find_iommu_for_device(seg, bdf);
+    iommu = find_iommu_for_device(sbdf);
     if ( iommu )
         return iommu;
 
@@ -524,7 +523,7 @@ int cf_check amd_iommu_msi_msg_update_ire(
     bdf = pdev ? pdev->sbdf.bdf : hpet_sbdf.bdf;
     seg = pdev ? pdev->seg : hpet_sbdf.seg;
 
-    iommu = _find_iommu_for_device(seg, bdf);
+    iommu = _find_iommu_for_device(PCI_SBDF(seg, bdf));
     if ( IS_ERR_OR_NULL(iommu) )
         return PTR_ERR(iommu);
 
@@ -661,8 +660,8 @@ bool __init cf_check iov_supports_xt(void)
         if ( idx == MAX_IO_APICS )
             return false;
 
-        if ( !find_iommu_for_device(ioapic_sbdf[idx].seg,
-                                    ioapic_sbdf[idx].bdf) )
+        if ( !find_iommu_for_device(PCI_SBDF(ioapic_sbdf[idx].seg,
+                                             ioapic_sbdf[idx].bdf)) )
         {
             AMD_IOMMU_WARN("no IOMMU for IO-APIC %#x (ID %x)\n",
                            apic, IO_APIC_ID(apic));
@@ -691,7 +690,7 @@ int __init cf_check amd_setup_hpet_msi(struct msi_desc *msi_desc)
         return -ENODEV;
     }
 
-    iommu = find_iommu_for_device(hpet_sbdf.seg, hpet_sbdf.bdf);
+    iommu = find_iommu_for_device(PCI_SBDF(hpet_sbdf.seg, hpet_sbdf.bdf));
     if ( !iommu )
         return -ENXIO;
 
diff --git a/xen/drivers/passthrough/amd/iommu_map.c b/xen/drivers/passthrough/amd/iommu_map.c
index d28c475650..320a2dc64c 100644
--- a/xen/drivers/passthrough/amd/iommu_map.c
+++ b/xen/drivers/passthrough/amd/iommu_map.c
@@ -717,7 +717,7 @@ int cf_check amd_iommu_get_reserved_device_memory(
             pcidevs_unlock();
 
             if ( pdev )
-                iommu = find_iommu_for_device(seg, bdf);
+                iommu = find_iommu_for_device(sbdf);
             if ( !iommu )
                 continue;
         }
diff --git a/xen/drivers/passthrough/amd/pci_amd_iommu.c b/xen/drivers/passthrough/amd/pci_amd_iommu.c
index 6b58e3380b..3a14770855 100644
--- a/xen/drivers/passthrough/amd/pci_amd_iommu.c
+++ b/xen/drivers/passthrough/amd/pci_amd_iommu.c
@@ -32,35 +32,35 @@ static bool __read_mostly init_done;
 
 static const struct iommu_init_ops _iommu_init_ops;
 
-struct amd_iommu *find_iommu_for_device(int seg, int bdf)
+struct amd_iommu *find_iommu_for_device(pci_sbdf_t sbdf)
 {
-    struct ivrs_mappings *ivrs_mappings = get_ivrs_mappings(seg);
+    struct ivrs_mappings *ivrs_mappings = get_ivrs_mappings(sbdf.seg);
 
-    if ( !ivrs_mappings || bdf >= ivrs_bdf_entries )
+    if ( !ivrs_mappings || sbdf.bdf >= ivrs_bdf_entries )
         return NULL;
 
-    if ( unlikely(!ivrs_mappings[bdf].iommu) && likely(init_done) )
+    if ( unlikely(!ivrs_mappings[sbdf.bdf].iommu) && likely(init_done) )
     {
-        unsigned int bd0 = bdf & ~PCI_FUNC(~0);
+        unsigned int bd0 = sbdf.bdf & ~PCI_FUNC(~0);
 
-        if ( ivrs_mappings[bd0].iommu && ivrs_mappings[bd0].iommu->sbdf.bdf != bdf )
+        if ( ivrs_mappings[bd0].iommu && ivrs_mappings[bd0].iommu->sbdf.bdf != sbdf.bdf )
         {
             struct ivrs_mappings tmp = ivrs_mappings[bd0];
 
             tmp.iommu = NULL;
             if ( tmp.dte_requestor_id == bd0 )
-                tmp.dte_requestor_id = bdf;
-            ivrs_mappings[bdf] = tmp;
+                tmp.dte_requestor_id = sbdf.bdf;
+            ivrs_mappings[sbdf.bdf] = tmp;
 
             printk(XENLOG_WARNING "%pp not found in ACPI tables;"
-                   " using same IOMMU as function 0\n", &PCI_SBDF(seg, bdf));
+                   " using same IOMMU as function 0\n", &sbdf);
 
             /* write iommu field last */
-            ivrs_mappings[bdf].iommu = ivrs_mappings[bd0].iommu;
+            ivrs_mappings[sbdf.bdf].iommu = ivrs_mappings[bd0].iommu;
         }
     }
 
-    return ivrs_mappings[bdf].iommu;
+    return ivrs_mappings[sbdf.bdf].iommu;
 }
 
 /*
@@ -107,7 +107,7 @@ static bool any_pdev_behind_iommu(const struct domain *d,
         if ( pdev == exclude )
             continue;
 
-        if ( find_iommu_for_device(pdev->seg, pdev->sbdf.bdf) == iommu )
+        if ( find_iommu_for_device(pdev->sbdf) == iommu )
             return true;
     }
 
@@ -468,7 +468,7 @@ static int cf_check reassign_device(
     struct amd_iommu *iommu;
     int rc;
 
-    iommu = find_iommu_for_device(pdev->seg, pdev->sbdf.bdf);
+    iommu = find_iommu_for_device(pdev->sbdf);
     if ( !iommu )
     {
         AMD_IOMMU_WARN("failed to find IOMMU: %pp cannot be assigned to %pd\n",
@@ -581,7 +581,7 @@ static int cf_check amd_iommu_add_device(u8 devfn, struct pci_dev *pdev)
         if ( pdev->sbdf.sbdf == iommu->sbdf.sbdf )
             return is_hardware_domain(pdev->domain) ? 0 : -ENODEV;
 
-    iommu = find_iommu_for_device(pdev->seg, pdev->sbdf.bdf);
+    iommu = find_iommu_for_device(pdev->sbdf);
     if ( unlikely(!iommu) )
     {
         /* Filter bridge devices. */
@@ -666,7 +666,7 @@ static int cf_check amd_iommu_remove_device(u8 devfn, struct pci_dev *pdev)
     if ( !pdev->domain )
         return -EINVAL;
 
-    iommu = find_iommu_for_device(pdev->seg, pdev->sbdf.bdf);
+    iommu = find_iommu_for_device(pdev->sbdf);
     if ( !iommu )
     {
         AMD_IOMMU_WARN("failed to find IOMMU: %pp cannot be removed from %pd\n",
-- 
2.49.0



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        Mon, 14 Apr 2025 12:19:34 -0700 (PDT)
From: Andrii Sultanov 
X-Google-Original-From: Andrii Sultanov 
To: xen-devel@lists.xenproject.org
Cc: Andrii Sultanov ,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v4 3/3] drivers: Make ioapic_sbdf and hpet_sbdf contain pci_sbdf_t
Date: Mon, 14 Apr 2025 20:19:18 +0100
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From: Andrii Sultanov 

Following a similar change to amd_iommu struct, make two more structs
take pci_sbdf_t directly instead of seg and bdf separately. This lets us
drop several conversions from the latter to the former and simplifies
several comparisons and assignments.

Bloat-o-meter reports:
add/remove: 0/0 grow/shrink: 1/10 up/down: 256/-320 (-64)
Function                                     old     new   delta
_einittext                                 22092   22348    +256
parse_ivrs_hpet                              248     245      -3
amd_iommu_detect_one_acpi                    876     868      -8
iov_supports_xt                              275     264     -11
amd_iommu_read_ioapic_from_ire               344     332     -12
amd_setup_hpet_msi                           237     224     -13
amd_iommu_ioapic_update_ire                  575     555     -20
reserve_unity_map_for_device                 453     424     -29
_hvm_dpci_msi_eoi                            160     128     -32
amd_iommu_get_supported_ivhd_type             86      30     -56
parse_ivrs_table                            3966    3830    -136

Signed-off-by: Andrii Sultanov 

---
Changes in V4:
* Folded several separate seg+bdf comparisons and assignments into one
  with sbdf_t
* With reshuffling in the prior commits, this commit is no longer
  neutral in terms of code size

Changes in V3:
* Dropped aliasing of seg and bdf, renamed users.

Changes in V2:
* Split single commit into several patches
* Change the format specifier to %pp in amd_iommu_ioapic_update_ire
---
 xen/drivers/passthrough/amd/iommu.h      |  5 +--
 xen/drivers/passthrough/amd/iommu_acpi.c | 30 +++++++---------
 xen/drivers/passthrough/amd/iommu_intr.c | 44 +++++++++++-------------
 3 files changed, 37 insertions(+), 42 deletions(-)

diff --git a/xen/drivers/passthrough/amd/iommu.h b/xen/drivers/passthrough/amd/iommu.h
index 2599800e6a..52f748310b 100644
--- a/xen/drivers/passthrough/amd/iommu.h
+++ b/xen/drivers/passthrough/amd/iommu.h
@@ -262,7 +262,7 @@ int cf_check amd_setup_hpet_msi(struct msi_desc *msi_desc);
 void cf_check amd_iommu_dump_intremap_tables(unsigned char key);
 
 extern struct ioapic_sbdf {
-    u16 bdf, seg;
+    pci_sbdf_t sbdf;
     u8 id;
     bool cmdline;
     u16 *pin_2_idx;
@@ -273,7 +273,8 @@ unsigned int ioapic_id_to_index(unsigned int apic_id);
 unsigned int get_next_ioapic_sbdf_index(void);
 
 extern struct hpet_sbdf {
-    u16 bdf, seg, id;
+    pci_sbdf_t sbdf;
+    uint16_t id;
     enum {
         HPET_NONE,
         HPET_CMDL,
diff --git a/xen/drivers/passthrough/amd/iommu_acpi.c b/xen/drivers/passthrough/amd/iommu_acpi.c
index 9e4fbee953..14845766e6 100644
--- a/xen/drivers/passthrough/amd/iommu_acpi.c
+++ b/xen/drivers/passthrough/amd/iommu_acpi.c
@@ -707,8 +707,7 @@ static int __init cf_check parse_ivrs_ioapic(const char *str)
         }
     }
 
-    ioapic_sbdf[idx].bdf = PCI_BDF(bus, dev, func);
-    ioapic_sbdf[idx].seg = seg;
+    ioapic_sbdf[idx].sbdf = PCI_SBDF( seg, PCI_BDF(bus, dev, func) );
     ioapic_sbdf[idx].id = id;
     ioapic_sbdf[idx].cmdline = true;
 
@@ -734,8 +733,7 @@ static int __init cf_check parse_ivrs_hpet(const char *str)
         return -EINVAL;
 
     hpet_sbdf.id = id;
-    hpet_sbdf.bdf = PCI_BDF(bus, dev, func);
-    hpet_sbdf.seg = seg;
+    hpet_sbdf.sbdf = PCI_SBDF( seg, PCI_BDF(bus, dev, func) );
     hpet_sbdf.init = HPET_CMDL;
 
     return 0;
@@ -748,6 +746,7 @@ static u16 __init parse_ivhd_device_special(
 {
     u16 dev_length, bdf;
     unsigned int apic, idx;
+    pci_sbdf_t sbdf;
 
     dev_length = sizeof(*special);
     if ( header_length < (block_length + dev_length) )
@@ -757,6 +756,7 @@ static u16 __init parse_ivhd_device_special(
     }
 
     bdf = special->used_id;
+    sbdf = PCI_SBDF(seg, bdf);
     if ( bdf >= ivrs_bdf_entries )
     {
         AMD_IOMMU_ERROR("IVHD: invalid Device_Entry Dev_Id %#x\n", bdf);
@@ -764,7 +764,7 @@ static u16 __init parse_ivhd_device_special(
     }
 
     AMD_IOMMU_DEBUG("IVHD Special: %pp variety %#x handle %#x\n",
-                    &PCI_SBDF(seg, bdf), special->variety, special->handle);
+                    &sbdf, special->variety, special->handle);
     add_ivrs_mapping_entry(bdf, bdf, special->header.data_setting, 0, true,
                            iommu);
 
@@ -780,8 +780,7 @@ static u16 __init parse_ivhd_device_special(
          */
         for ( idx = 0; idx < nr_ioapic_sbdf; idx++ )
         {
-            if ( ioapic_sbdf[idx].bdf == bdf &&
-                 ioapic_sbdf[idx].seg == seg &&
+            if ( ioapic_sbdf[idx].sbdf.sbdf == sbdf.sbdf &&
                  ioapic_sbdf[idx].cmdline )
                 break;
         }
@@ -790,7 +789,7 @@ static u16 __init parse_ivhd_device_special(
             AMD_IOMMU_DEBUG("IVHD: Command line override present for IO-APIC %#x"
                             "(IVRS: %#x devID %pp)\n",
                             ioapic_sbdf[idx].id, special->handle,
-                            &PCI_SBDF(seg, bdf));
+                            &sbdf);
             break;
         }
 
@@ -805,8 +804,7 @@ static u16 __init parse_ivhd_device_special(
                                 special->handle);
             else if ( idx != MAX_IO_APICS && ioapic_sbdf[idx].pin_2_idx )
             {
-                if ( ioapic_sbdf[idx].bdf == bdf &&
-                     ioapic_sbdf[idx].seg == seg )
+                if ( ioapic_sbdf[idx].sbdf.sbdf == sbdf.sbdf )
                     AMD_IOMMU_WARN("IVHD: duplicate IO-APIC %#x entries\n",
                                     special->handle);
                 else
@@ -827,8 +825,7 @@ static u16 __init parse_ivhd_device_special(
                 }
 
                 /* set device id of ioapic */
-                ioapic_sbdf[idx].bdf = bdf;
-                ioapic_sbdf[idx].seg = seg;
+                ioapic_sbdf[idx].sbdf = sbdf;
                 ioapic_sbdf[idx].id = special->handle;
 
                 ioapic_sbdf[idx].pin_2_idx = xmalloc_array(
@@ -862,13 +859,12 @@ static u16 __init parse_ivhd_device_special(
             AMD_IOMMU_DEBUG("IVHD: Command line override present for HPET %#x "
                             "(IVRS: %#x devID %pp)\n",
                             hpet_sbdf.id, special->handle,
-                            &PCI_SBDF(seg, bdf));
+                            &sbdf);
             break;
         case HPET_NONE:
             /* set device id of hpet */
             hpet_sbdf.id = special->handle;
-            hpet_sbdf.bdf = bdf;
-            hpet_sbdf.seg = seg;
+            hpet_sbdf.sbdf = sbdf;
             hpet_sbdf.init = HPET_IVHD;
             break;
         default:
@@ -1139,9 +1135,9 @@ static int __init cf_check parse_ivrs_table(struct acpi_table_header *table)
                 return -ENXIO;
         }
 
-        if ( !ioapic_sbdf[idx].seg &&
+        if ( !ioapic_sbdf[idx].sbdf.seg &&
              /* SB IO-APIC is always on this device in AMD systems. */
-             ioapic_sbdf[idx].bdf == PCI_BDF(0, 0x14, 0) )
+             ioapic_sbdf[idx].sbdf.bdf == PCI_BDF(0, 0x14, 0) )
             sb_ioapic = 1;
 
         if ( ioapic_sbdf[idx].pin_2_idx )
diff --git a/xen/drivers/passthrough/amd/iommu_intr.c b/xen/drivers/passthrough/amd/iommu_intr.c
index 16075cd5a1..b788675be2 100644
--- a/xen/drivers/passthrough/amd/iommu_intr.c
+++ b/xen/drivers/passthrough/amd/iommu_intr.c
@@ -323,7 +323,8 @@ void cf_check amd_iommu_ioapic_update_ire(
     unsigned int apic, unsigned int pin, uint64_t rte)
 {
     struct IO_APIC_route_entry new_rte;
-    int seg, bdf, rc;
+    pci_sbdf_t sbdf;
+    int rc;
     struct amd_iommu *iommu;
     unsigned int idx;
 
@@ -335,20 +336,18 @@ void cf_check amd_iommu_ioapic_update_ire(
     new_rte.raw = rte;
 
     /* get device id of ioapic devices */
-    bdf = ioapic_sbdf[idx].bdf;
-    seg = ioapic_sbdf[idx].seg;
-    iommu = find_iommu_for_device(PCI_SBDF(seg, bdf));
+    sbdf = ioapic_sbdf[idx].sbdf;
+    iommu = find_iommu_for_device(sbdf);
     if ( !iommu )
     {
-        AMD_IOMMU_WARN("failed to find IOMMU for IO-APIC @ %04x:%04x\n",
-                       seg, bdf);
+        AMD_IOMMU_WARN("failed to find IOMMU for IO-APIC @ %pp\n", &sbdf);
         __ioapic_write_entry(apic, pin, true, new_rte);
         return;
     }
 
     /* Update interrupt remapping entry */
     rc = update_intremap_entry_from_ioapic(
-             bdf, iommu, &new_rte,
+             sbdf.bdf, iommu, &new_rte,
              &ioapic_sbdf[idx].pin_2_idx[pin]);
 
     if ( rc )
@@ -369,7 +368,8 @@ unsigned int cf_check amd_iommu_read_ioapic_from_ire(
     unsigned int offset;
     unsigned int val = __io_apic_read(apic, reg);
     unsigned int pin = (reg - 0x10) / 2;
-    uint16_t seg, bdf, req_id;
+    pci_sbdf_t sbdf;
+    uint16_t req_id;
     const struct amd_iommu *iommu;
     union irte_ptr entry;
 
@@ -381,12 +381,11 @@ unsigned int cf_check amd_iommu_read_ioapic_from_ire(
     if ( offset >= INTREMAP_MAX_ENTRIES )
         return val;
 
-    seg = ioapic_sbdf[idx].seg;
-    bdf = ioapic_sbdf[idx].bdf;
-    iommu = find_iommu_for_device(PCI_SBDF(seg, bdf));
+    sbdf = ioapic_sbdf[idx].sbdf;
+    iommu = find_iommu_for_device(sbdf);
     if ( !iommu )
         return val;
-    req_id = get_intremap_requestor_id(seg, bdf);
+    req_id = get_intremap_requestor_id(sbdf.seg, sbdf.bdf);
     entry = get_intremap_entry(iommu, req_id, offset);
 
     if ( !(reg & 1) )
@@ -515,15 +514,15 @@ int cf_check amd_iommu_msi_msg_update_ire(
     struct msi_desc *msi_desc, struct msi_msg *msg)
 {
     struct pci_dev *pdev = msi_desc->dev;
-    int bdf, seg, rc;
+    pci_sbdf_t sbdf;
+    int rc;
     struct amd_iommu *iommu;
     unsigned int i, nr = 1;
     u32 data;
 
-    bdf = pdev ? pdev->sbdf.bdf : hpet_sbdf.bdf;
-    seg = pdev ? pdev->seg : hpet_sbdf.seg;
+    sbdf = pdev ? pdev->sbdf : hpet_sbdf.sbdf;
 
-    iommu = _find_iommu_for_device(PCI_SBDF(seg, bdf));
+    iommu = _find_iommu_for_device(sbdf);
     if ( IS_ERR_OR_NULL(iommu) )
         return PTR_ERR(iommu);
 
@@ -532,7 +531,7 @@ int cf_check amd_iommu_msi_msg_update_ire(
 
     if ( msi_desc->remap_index >= 0 && !msg )
     {
-        update_intremap_entry_from_msi_msg(iommu, bdf, nr,
+        update_intremap_entry_from_msi_msg(iommu, sbdf.bdf, nr,
                                            &msi_desc->remap_index,
                                            NULL, NULL);
 
@@ -543,7 +542,7 @@ int cf_check amd_iommu_msi_msg_update_ire(
     if ( !msg )
         return 0;
 
-    rc = update_intremap_entry_from_msi_msg(iommu, bdf, nr,
+    rc = update_intremap_entry_from_msi_msg(iommu, sbdf.bdf, nr,
                                             &msi_desc->remap_index,
                                             msg, &data);
     if ( rc > 0 )
@@ -660,8 +659,7 @@ bool __init cf_check iov_supports_xt(void)
         if ( idx == MAX_IO_APICS )
             return false;
 
-        if ( !find_iommu_for_device(PCI_SBDF(ioapic_sbdf[idx].seg,
-                                             ioapic_sbdf[idx].bdf)) )
+        if ( !find_iommu_for_device(ioapic_sbdf[idx].sbdf) )
         {
             AMD_IOMMU_WARN("no IOMMU for IO-APIC %#x (ID %x)\n",
                            apic, IO_APIC_ID(apic));
@@ -690,14 +688,14 @@ int __init cf_check amd_setup_hpet_msi(struct msi_desc *msi_desc)
         return -ENODEV;
     }
 
-    iommu = find_iommu_for_device(PCI_SBDF(hpet_sbdf.seg, hpet_sbdf.bdf));
+    iommu = find_iommu_for_device(hpet_sbdf.sbdf);
     if ( !iommu )
         return -ENXIO;
 
-    lock = get_intremap_lock(hpet_sbdf.seg, hpet_sbdf.bdf);
+    lock = get_intremap_lock(hpet_sbdf.sbdf.seg, hpet_sbdf.sbdf.bdf);
     spin_lock_irqsave(lock, flags);
 
-    msi_desc->remap_index = alloc_intremap_entry(iommu, hpet_sbdf.bdf, 1);
+    msi_desc->remap_index = alloc_intremap_entry(iommu, hpet_sbdf.sbdf.bdf, 1);
     if ( msi_desc->remap_index >= INTREMAP_MAX_ENTRIES )
     {
         msi_desc->remap_index = -1;
-- 
2.49.0



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Date: Mon, 14 Apr 2025 20:31:29 +0100
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CC: "Daniel P. Smith" , Xenia Ragiadakou
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Subject: Re: [PATCH v3 16/16] x86/hyperlaunch: add capabilities to boot
 domain
From: Alejandro Vallejo 
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On Thu Apr 10, 2025 at 1:18 PM BST, Jan Beulich wrote:
> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>> From: "Daniel P. Smith" 
>>=20
>> Introduce the ability to assign capabilities to a domain via its definit=
ion in
>> device tree. The first capability enabled to select is the control domai=
n
>> capability. The capability property is a bitfield in both the device tre=
e and
>> `struct boot_domain`.
>>=20
>> Signed-off-by: Daniel P. Smith 
>> Reviewed-by: Jason Andryuk 
>> Signed-off-by: Jason Andryuk 
>
> The R-b feels kind of redundant with the subsequent S-o-b.

I'll drop it.

>
>> --- a/xen/arch/x86/domain-builder/fdt.c
>> +++ b/xen/arch/x86/domain-builder/fdt.c
>> @@ -257,6 +257,18 @@ static int __init process_domain_node(
>>              bd->max_vcpus =3D val;
>>              printk("  max vcpus: %d\n", bd->max_vcpus);
>>          }
>> +        else if ( strncmp(prop_name, "capabilities", name_len) =3D=3D 0=
 )
>> +        {
>> +            if ( fdt_prop_as_u32(prop, &bd->capabilities) !=3D 0 )
>> +            {
>> +                printk("  failed processing domain id for domain %s\n",=
 name);
>> +                return -EINVAL;
>> +            }
>> +            printk("  caps: ");
>> +            if ( bd->capabilities & BUILD_CAPS_CONTROL )
>> +                printk("c");
>> +            printk("\n");
>> +        }
>
> Like for the other patch: What about other bits being set in the value re=
ad?

I take it that the non-worded suggestion is to have a mask of reserved
bits for each case and check they are not set (giving a warning if they are=
)?

>
>> --- a/xen/arch/x86/setup.c
>> +++ b/xen/arch/x86/setup.c
>> @@ -1006,6 +1006,7 @@ static struct domain *__init create_dom0(struct bo=
ot_info *bi)
>>  {
>>      char *cmdline =3D NULL;
>>      size_t cmdline_size;
>> +    unsigned int create_flags =3D 0;
>>      struct xen_domctl_createdomain dom0_cfg =3D {
>>          .flags =3D IS_ENABLED(CONFIG_TBOOT) ? XEN_DOMCTL_CDF_s3_integri=
ty : 0,
>>          .max_evtchn_port =3D -1,
>> @@ -1037,7 +1038,10 @@ static struct domain *__init create_dom0(struct b=
oot_info *bi)
>>      if ( bd->domid =3D=3D DOMID_INVALID )
>>          /* Create initial domain.  Not d0 for pvshim. */
>>          bd->domid =3D get_initial_domain_id();
>> -    d =3D domain_create(bd->domid, &dom0_cfg, pv_shim ? 0 : CDF_privile=
ged);
>> +    if ( bd->capabilities & BUILD_CAPS_CONTROL )
>> +        create_flags |=3D CDF_privileged;
>
> Seeing that builder_init() in the non-DT case sets the new bit unconditio=
nally,
> isn't the shim's only domain suddenly getting CDF_privileged set this way=
? Oh,
> no, you then ...
>
>> +    d =3D domain_create(bd->domid, &dom0_cfg,
>> +                      pv_shim ? 0 : create_flags);
>
> ... hide the flag here. Any reason to have the intermediate variable in t=
he
> first place

Well, the logic would end up fairly convoluted otherwise. As things
stand this can be encoded in an if-else fashion with 2 calls, but
there's 2 capability flags coming that need integrating together.

This is just avoiding further code motion down the line.

> (can't resist: when there's already a wall of local variables here)?

Heh :). Point taken.

Cheers,
Alejandro


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Subject: Re: [PATCH v3 2/7] arm/mpu: Provide access to the MPU region from the
 C code
Content-Language: en-GB
To: Luca Fancellu 
Cc: "xen-devel@lists.xenproject.org" ,
 Stefano Stabellini ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk 
References: <20250411145655.140667-1-luca.fancellu@arm.com>
 <20250411145655.140667-3-luca.fancellu@arm.com>
 
 <1A24757A-ECCB-4080-B370-DA44D469CC7D@arm.com>
From: Julien Grall 
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Hi Luca,

On 15/04/2025 00:07, Luca Fancellu wrote:
> HI Julien,
> 
>> On 14 Apr 2025, at 12:41, Julien Grall  wrote:
>>
>> Hi Luca,
>>
>> On 11/04/2025 23:56, Luca Fancellu wrote:
>>> Implement some utility function in order to access the MPU regions
>>> from the C world.
>>> Signed-off-by: Luca Fancellu 
>>> ---
>>> v3 changes:
>>>   - Moved PRBAR0_EL2/PRLAR0_EL2 to arm64 specific
>>>   - Modified prepare_selector() to be easily made a NOP
>>>     for Arm32, which can address up to 32 region without
>>>     changing selector and it is also its maximum amount
>>>     of MPU regions.
>>> ---
>>> ---
>>>   xen/arch/arm/include/asm/arm64/mpu.h |   7 ++
>>>   xen/arch/arm/include/asm/mpu.h       |   1 +
>>>   xen/arch/arm/include/asm/mpu/mm.h    |  24 +++++
>>>   xen/arch/arm/mpu/mm.c                | 125 +++++++++++++++++++++++++++
>>>   4 files changed, 157 insertions(+)
>>> diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/asm/arm64/mpu.h
>>> index 4d2bd7d7877f..b4e1ecdf741d 100644
>>> --- a/xen/arch/arm/include/asm/arm64/mpu.h
>>> +++ b/xen/arch/arm/include/asm/arm64/mpu.h
>>> @@ -8,6 +8,13 @@
>>>     #ifndef __ASSEMBLY__
>>>   +/*
>>> + * The following are needed for the case generators GENERATE_WRITE_PR_REG_CASE
>>> + * and GENERATE_READ_PR_REG_CASE with num==0
>>> + */
>>> +#define PRBAR0_EL2 PRBAR_EL2
>>> +#define PRLAR0_EL2 PRLAR_EL2
>>
>> Rather than aliasing, shouldn't we just rename PR{B,L}AR_EL2 to PR{B,L}AR0_EL2? This would the code mixing between the two.
> 
> PR{B,L}AR0_ELx does not exists really, the PR{B,L}AR_ELx exists for n=1..15, here I’m only using this “alias” for the generator,
> but PR{B,L}AR_EL2 are the real register.

In this case, can PR{B,L}AR0_EL2 defined in mm.c so they are not used 
anywhere else?

> 
>>
>>> +
>>>   /* Protection Region Base Address Register */
>>>   typedef union {
>>>       struct __packed {
>>> diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h
>>> index e148c705b82c..59ff22c804c1 100644
>>> --- a/xen/arch/arm/include/asm/mpu.h
>>> +++ b/xen/arch/arm/include/asm/mpu.h
>>> @@ -13,6 +13,7 @@
>>>   #define MPU_REGION_SHIFT  6
>>>   #define MPU_REGION_ALIGN  (_AC(1, UL) << MPU_REGION_SHIFT)
>>>   #define MPU_REGION_MASK   (~(MPU_REGION_ALIGN - 1))
>>> +#define MPU_REGION_RES0   (0xFFFULL << 52)
>>>     #define NUM_MPU_REGIONS_SHIFT   8
>>>   #define NUM_MPU_REGIONS         (_AC(1, UL) << NUM_MPU_REGIONS_SHIFT)
>>> diff --git a/xen/arch/arm/include/asm/mpu/mm.h b/xen/arch/arm/include/asm/mpu/mm.h
>>> index 86f33d9836b7..5cabe9d111ce 100644
>>> --- a/xen/arch/arm/include/asm/mpu/mm.h
>>> +++ b/xen/arch/arm/include/asm/mpu/mm.h
>>> @@ -8,6 +8,7 @@
>>>   #include 
>>>   #include 
>>>   #include 
>>> +#include 
>>>     extern struct page_info *frame_table;
>>>   @@ -29,6 +30,29 @@ static inline struct page_info *virt_to_page(const void *v)
>>>       return mfn_to_page(mfn);
>>>   }
>>>   +/* Utility function to be used whenever MPU regions are modified */
>>> +static inline void context_sync_mpu(void)
>>> +{
>>> +    /*
>>> +     * ARM DDI 0600B.a, C1.7.1
>>> +     * Writes to MPU registers are only guaranteed to be visible following a
>>> +     * Context synchronization event and DSB operation.
>>
>> I know we discussed about this before. I find odd that the specification says "context synchronization event and DSB operation". At least to me, it implies "isb + dsb" not the other way around. Has this been clarified in newer version of the specification?
> 
> unfortunately no, I’m looking into the latest one (Arm® Architecture Reference Manual Supplement Armv8, for R-profile AArch64 architecture 0600B.a) but it has the same wording, however
> I spoke internally with Cortex-R architects and they told me to use DSB+ISB

So you didn't speak with the ArmV8-R architects? Asking because we are 
writing code for ArmV8-R (so not only Cortex-R).

In any case, I still think this is something that needs to be clarified
in the specification. So people that don't have access to the Arm 
internal architects know the correct sequence. Is this something you can 
follow-up on?

Cheers,

-- 
Julien Grall



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Date: Mon, 14 Apr 2025 17:28:15 -0700 (PDT)
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To: Alejandro Vallejo 
cc: Denis Mukhin , xen-devel@lists.xenproject.org, 
    "Daniel P. Smith" , 
    Jason Andryuk , 
    Xenia Ragiadakou , 
    Stefano Stabellini , 
    Michal Orzel , Jan Beulich , 
    Andrew Cooper , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
    Julien Grall , Bertrand Marquis 
Subject: Re: [PATCH v3 12/16] x86/hyperlaunch: add domain id parsing to domain
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On Mon, 14 Apr 2025, Alejandro Vallejo wrote:
> Though I'm starting to get urges to rewrite many of this error handlers
> as asserts, on the basis that "why do we think it's ok to boot with
> malformed DTBs"? A safe system that doesn't boot is more helpful than an
> unsafe one that boots everything except a critical component for you to
> find later on.

It is totally OK to panic on boot if a malformed DTB was passed.  See
the number of panics in xen/arch/arm/dom0less-build.c.


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Subject: Re: [PATCH v3 7/7] arm/mpu: Implement setup_mpu for MPU system
Content-Language: en-GB
To: Luca Fancellu 
Cc: "xen-devel@lists.xenproject.org" ,
 Stefano Stabellini ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk 
References: <20250411145655.140667-1-luca.fancellu@arm.com>
 <20250411145655.140667-8-luca.fancellu@arm.com>
 <923a2fc0-4eeb-4e09-a56d-7471a56fe3bf@xen.org>
 <4771188E-B307-4452-A900-2ACACC1CE333@arm.com>
From: Julien Grall 
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Hi Luca,

On 15/04/2025 00:17, Luca Fancellu wrote:
> HI Julien,
> 
>> On 14 Apr 2025, at 13:12, Julien Grall  wrote:
>>
>> Hi Luca,
>>
>> On 11/04/2025 23:56, Luca Fancellu wrote:
>>> Implement the function setup_mpu that will logically track the MPU
>>> regions defined by hardware registers, start introducing data
>>> structures and functions to track the status from the C world.
>>> The xen_mpumap_mask bitmap is used to track which MPU region are
>>> enabled at runtime.
>>> This function is called from setup_mm() which full implementation
>>> will be provided in a later stage.
>>> Signed-off-by: Luca Fancellu 
>>> ---
>>> v3 changes:
>>>   - Moved PRENR_MASK define to common.
>>> ---
>>> ---
>>>   xen/arch/arm/include/asm/mpu.h |  2 ++
>>>   xen/arch/arm/mpu/mm.c          | 49 +++++++++++++++++++++++++++++++++-
>>>   2 files changed, 50 insertions(+), 1 deletion(-)
>>> diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h
>>> index eba5086cde97..77d0566f9780 100644
>>> --- a/xen/arch/arm/include/asm/mpu.h
>>> +++ b/xen/arch/arm/include/asm/mpu.h
>>> @@ -20,6 +20,8 @@
>>>   #define NUM_MPU_REGIONS_MASK    (NUM_MPU_REGIONS - 1)
>>>   #define MAX_MPU_REGIONS         NUM_MPU_REGIONS_MASK
>>>   +#define PRENR_MASK  GENMASK(31, 0)
>>> +
>>>   /* Access permission attributes. */
>>>   /* Read/Write at EL2, No Access at EL1/EL0. */
>>>   #define AP_RW_EL2 0x0
>>> diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c
>>> index 635d1f5a2ba0..e0a40489a7fc 100644
>>> --- a/xen/arch/arm/mpu/mm.c
>>> +++ b/xen/arch/arm/mpu/mm.c
>>> @@ -14,6 +14,17 @@
>>>     struct page_info *frame_table;
>>>   +/* Maximum number of supported MPU memory regions by the EL2 MPU. */
>>> +uint8_t __ro_after_init max_xen_mpumap;
>>
>> Are this variable and ...
>>
>>> +
>>> +/*
>>> + * Bitmap xen_mpumap_mask is to record the usage of EL2 MPU memory regions.
>>> + * Bit 0 represents MPU memory region 0, bit 1 represents MPU memory
>>> + * region 1, ..., and so on.
>>> + * If a MPU memory region gets enabled, set the according bit to 1.
>>> + */
>>> +DECLARE_BITMAP(xen_mpumap_mask, MAX_MPU_REGIONS);
>>
>> ... this one meant to be global? If yes, then they need to have a declaration in the header. If not, then you want to add 'static'.
> 
> yes they are meant to be global, I’ll add a declaration in the header.
> 
>>
>>> +
>>>   /* EL2 Xen MPU memory region mapping table. */
>>>   pr_t xen_mpumap[MAX_MPU_REGIONS];
>>>   @@ -222,9 +233,45 @@ pr_t pr_of_xenaddr(paddr_t base, paddr_t limit, unsigned attr)
>>>       return region;
>>>   }
>>>   +/*
>>> + * The code in this function needs to track the regions programmed in
>>> + * arm64/mpu/head.S
>>> + */
>>> +static void __init setup_mpu(void)
>>> +{
>>> +    register_t prenr;
>>> +    unsigned int i = 0;
>>> +
>>> +    /*
>>> +     * MPUIR_EL2.Region[0:7] identifies the number of regions supported by
>>> +     * the EL2 MPU.
>>> +     */
>>> +    max_xen_mpumap = (uint8_t)(READ_SYSREG(MPUIR_EL2) & NUM_MPU_REGIONS_MASK);
>>> +
>>> +    /* PRENR_EL2 has the N bit set if the N region is enabled, N < 32 */
>>> +    prenr = (READ_SYSREG(PRENR_EL2) & PRENR_MASK);
>>> +
>>> +    /*
>>> +     * Set the bitfield for regions enabled in assembly boot-time.
>>> +     * This code works under the assumption that the code in head.S has
>>> +     * allocated and enabled regions below 32 (N < 32).
>>> +
>> This is a bit fragile. I think it would be better if the bitmap is set by head.S as we add the regions. Same for ...
> 
> So, I was trying to avoid that because in that case we need to place xen_mpumap out of the BSS and start
> manipulating the bitmap from asm, instead I was hoping to use the C code, I understand that if someone
> wants to have more than 31 region as boot region this might break, but it’s also a bit unlikely?

The 31 is only part of the problem. The other problem is there is at 
least one other places in Xen (i.e. as early_fdt_map()) which will also 
create an entry in the MPU before setup_mm()/setup_mpu() is called. I am 
a bit concerned that the assumption is going to spread and yet we have 
no way to programmatically check if this will be broken.

Furthermore, right now, you are hardcoding the slot used and updating 
the MPU. But if you had the bitmap updated, you could just look up for a 
free slot.

> 
> So I was balancing the pros to manipulate everything from the C world against the cons (boot region > 31).
> 
> Is it still your preferred way to handle everything from asm?

Yes. I don't think the change in asm will be large and this would allow 
to remove other assumptions (like in the FDT mapping code).

As a side note, I noticed that the MPU entries are not cleared before we 
enable the MPU. Is there anything in the boot protocol that guarantee 
all the entries will be invalid? If not, then I think we need to clear 
the entries.

Otherwise, your current logic doesn't work. That said, I think it would 
still be necessary even if we get rid of your logic because we don't 
know the content of the MPU entries.

Cheers,

-- 
Julien Grall



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Date: Tue, 15 Apr 2025 08:05:56 +0200
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Subject: Re: [PATCH v3 08/16] x86/hyperlaunch: Add helpers to locate multiboot
 modules
To: Alejandro Vallejo 
Cc: Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini ,
 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Julien Grall , Bertrand Marquis ,
 xen-devel@lists.xenproject.org,
 "consulting@bugseng.com" 
References: <20250408160802.49870-1-agarciav@amd.com>
 <20250408160802.49870-9-agarciav@amd.com>
 
 
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From: Jan Beulich 
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On 14.04.2025 20:01, Alejandro Vallejo wrote:
> On Mon Apr 14, 2025 at 4:05 PM BST, Jan Beulich wrote:
>> On 14.04.2025 15:37, Alejandro Vallejo wrote:
>>> On Thu Apr 10, 2025 at 11:42 AM BST, Jan Beulich wrote:
>>>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>>>> +/*
>>>>> + * Locate a multiboot module given its node offset in the FDT.
>>>>> + *
>>>>> + * The module location may be given via either FDT property:
>>>>> + *     * reg = 
>>>>> + *         * Mutates `bi` to append the module.
>>>>> + *     * module-index = 
>>>>> + *         * Leaves `bi` unchanged.
>>>>> + *
>>>>> + * @param fdt           Pointer to the full FDT.
>>>>> + * @param node          Offset for the module node.
>>>>> + * @param address_cells Number of 4-octet cells that make up an "address".
>>>>> + * @param size_cells    Number of 4-octet cells that make up a "size".
>>>>> + * @param bi[inout]     Xen's representation of the boot parameters.
>>>>> + * @return              -EINVAL on malformed nodes, otherwise
>>>>> + *                      index inside `bi->mods`
>>>>> + */
>>>>> +int __init fdt_read_multiboot_module(const void *fdt, int node,
>>>>> +                                     int address_cells, int size_cells,
>>>>> +                                     struct boot_info *bi)
>>>>
>>>> Functions without callers and non-static ones without declarations are
>>>> disliked by Misra.
>>>
>>> Can't do much about it if I want them to stand alone in a single patch.
>>> Otherwise the following ones become quite unwieldy to look at. All I can
>>> say is that this function becomes static and with a caller on the next
>>> patch.
>>
>> Which means you need to touch this again anyway. Perhaps we need a Misra
>> deviation for __maybe_unused functions / data, in which case you could
>> use that here and strip it along with making the function static. Cc-ing
>> Bugseng folks.
> 
> It's a transient violation, sure. Do we care about transient MISRA
> violations though? I understand the importance of bisectability, but
> AUIU MISRA compliance matters to the extent that that the tip is
> compliant rather than the intermediate steps?

Thing is that quite a few rules are blocking now. I haven't checked whether
the one here (already) is; if it isn't, we can't exclude it will be by the
time this patch is committed. If then the next patch isn't committed
together with it, we'd face a CI failure.

> Another option would be to fold them this patch and the next together
> after both get their R-by. As I said, I assumed you'd rather see them in
> isolation for purposes of review.

As it looks it's all plain code additions, so reviewability would merely
mildly suffer from patch size. But afaict there would be no loss of clarity.

>>>>> +    /* Otherwise location given as a `reg` property. */
>>>>> +    prop = fdt_get_property(fdt, node, "reg", NULL);
>>>>> +
>>>>> +    if ( !prop )
>>>>> +    {
>>>>> +        printk("  No location for multiboot,module\n");
>>>>> +        return -EINVAL;
>>>>> +    }
>>>>> +    if ( fdt_get_property(fdt, node, "module-index", NULL) )
>>>>> +    {
>>>>> +        printk("  Location of multiboot,module defined multiple times\n");
>>>>> +        return -EINVAL;
>>>>> +    }
>>>>> +
>>>>> +    ret = read_fdt_prop_as_reg(prop, address_cells, size_cells, &addr, &size);
>>>>> +
>>>>> +    if ( ret < 0 )
>>>>> +    {
>>>>> +        printk("  Failed reading reg for multiboot,module\n");
>>>>> +        return -EINVAL;
>>>>> +    }
>>>>> +
>>>>> +    idx = bi->nr_modules + 1;
>>>>
>>>> This at least looks like an off-by-one. If the addition of 1 is really
>>>> intended, I think it needs commenting on.
>>>
>>> Seems to be, yes. The underlying array is a bit bizarre. It's sizes as
>>> MAX_NR_BOOTMODS + 1, with the first one being the DTB itself. I guess
>>> the intent was to take it into account, but bi->nr_modules is
>>> initialised to the number of multiboot modules, so it SHOULD be already
>>> taking it into account.
>>>
>>> Also, the logic for bounds checking seems... off (because of the + 1 I
>>> mentioned before). Or at least confusing, so I've moved to using
>>> ARRAY_SIZE(bi->mods) rather than explicitly comparing against
>>> MAX_NR_BOOTMODS.
>>>
>>> The array is MAX_NR_BOOTMODS + 1 in length, so it's just more cognitive
>>> load than I'm comfortable with.
>>
>> If I'm not mistaken the +1 is inherited from the modules array we had in
>> the past, where we wanted 1 extra slot for Xen itself. Hence before you
>> move to using ARRAY_SIZE() everywhere it needs to really be clear what
>> the +1 here is used for.
> 
> Ew.  Ok, just looked at the code in multiboot_fill_boot_info and indeed
> the arrangement is for all multiboot modules to be in front, and Xen to
> be appended. But bi->nr_modules only lists multiboot modules, so
> increasing that value is therefore not enough (or
> next_boot_module_index() would fail).
> 
> I need to have a proper read on how this is all stitched together.  I
> may simply swap BOOTMOD_XEN with the next entry on append. Though my
> preference would be to _not_ have Xen as part of the module list to
> begin with. Before boot_info that was probably a place as good as any,
> but this would be much better off in a dedicated field.
> 
> I don't see much in terms of usage though. Why is it being added at all?

For hyperlaunch I fear it's you who needs to answer this question. For
pre-hyperlaunch it's (primarily?) for consider_modules(), iirc. See two
of the three comments ahead of its non-recursive invocations.

Jan


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Subject: Re: [PATCH v3 11/16] x86/hyperlaunch: locate dom0 initrd with
 hyperlaunch
To: Alejandro Vallejo 
Cc: "Daniel P. Smith" ,
 Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini ,
 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 xen-devel@lists.xenproject.org
References: <20250408160802.49870-1-agarciav@amd.com>
 <20250408160802.49870-12-agarciav@amd.com>
 
 
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From: Jan Beulich 
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On 14.04.2025 19:06, Alejandro Vallejo wrote:
> On Thu Apr 10, 2025 at 12:34 PM BST, Jan Beulich wrote:
>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>> --- a/xen/arch/x86/domain-builder/fdt.c
>>> +++ b/xen/arch/x86/domain-builder/fdt.c
>>> @@ -195,6 +195,35 @@ static int __init process_domain_node(
>>>                   !((char *)__va(bd->kernel->cmdline_pa))[0] )
>>>                  bd->kernel->fdt_cmdline = fdt_get_prop_offset(
>>>                      fdt, node, "bootargs", &bd->kernel->cmdline_pa);
>>> +
>>> +            continue;
>>
>> With this ...
>>
>>> +        }
>>> +        else if ( fdt_node_check_compatible(fdt, node,
>>
>> ... no need for "else" here?
> 
> Sure
> 
>>
>>> +                                            "multiboot,ramdisk") == 0 )
>>> +        {
>>> +            int idx;
>>> +
>>> +            if ( bd->module )
>>> +            {
>>> +                printk(XENLOG_ERR "Duplicate ramdisk module for domain %s)\n",

For context below, note this message.

>>> +                       name);
>>> +                continue;
>>> +            }
>>> +
>>> +            idx = fdt_read_multiboot_module(fdt, node, address_cells,
>>> +                                            size_cells,bi);
>>> +            if ( idx < 0 )
>>> +            {
>>> +                printk("  failed processing ramdisk module for domain %s\n",
>>> +                       name);
>>> +                return -EINVAL;
>>> +            }
>>
>> Along the lines of what Denis has said - please be consistent about log
>> messages: XENLOG_* or not, preferably no capital at the start, initial
>> blank padding. May apply elsewhere in the series as well.
> 
> I don't mind dropping that and making everything flat (uppercase + no
> padding), but there is some consistency. Albeit, it is true the
> rationale is somewhat obscure.

Obscure or not - it might be fine if stated that way sufficiently
prominently, such that future additions here then will adhere to that
model.

> ATM the consistency is: "padding spaces + lowercase" when giving extra
> information on hyperlaunch. It ends up creating a hyperlaunch block in
> `dmesg` with a "Hyperlaunch detected" line on top so it's easier to
> know what lines are hyperlaunch related and which ones aren't.
> 
> Do you have a preference for a specific reporting style?

XENLOG_* or not want to be consistent, no matter what. Generally I think
that log messages shouldn't start with capitals, unless it's e.g. an
acronym. The padding to help grouping would be fine with me if, as said,
properly spelled as the scheme to use.

Jan


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Date: Tue, 15 Apr 2025 08:17:02 +0200
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Subject: Re: [PATCH v7 2/3] xen/arm32: Create the same boot-time MPU regions
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To: Ayan Kumar Halder ,
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Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
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 Luca Fancellu 
References: <20250414164514.588373-1-ayan.kumar.halder@amd.com>
 <20250414164514.588373-3-ayan.kumar.halder@amd.com>
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On 14/04/2025 18:45, Ayan Kumar Halder wrote:
> Create Boot-time MPU protection regions (similar to Armv8-R AArch64) for
> Armv8-R AArch32.
> Also, defined *_PRBAR macros for arm32. The only difference from arm64 is that
> XN is 1-bit for arm32.
> Define the system registers and macros in mpu/cpregs.h.
> 
> Introduce WRITE_SYSREG_ASM() to write to system registers in assembly.
> 
> Signed-off-by: Ayan Kumar Halder 
> Reviewed-by: Luca Fancellu 
> Tested-by: Luca Fancellu 
> ---
> Changes from
> 
> v1 -
> 
> 1. enable_mpu() now sets HMAIR{0,1} registers. This is similar to what is
> being done in enable_mmu(). All the mm related configurations happen in this
> function.
> 
> 2. Fixed some typos. 
> 
> v2 -
> 1. Include the common prepare_xen_region.inc in head.S.
> 
> 2. Define LOAD_SYSREG()/STORE_SYSREG() for arm32.
> 
> v3 -
> 1. Rename STORE_SYSREG() as WRITE_SYSREG_ASM()
> 
> 2. enable_boot_cpu_mm() is defined in head.S
> 
> v4 -
> 1. *_PRBAR is moved to arm32/sysregs.h.
> 
> 2. MPU specific CP15 system registers are defined in mpu/cpregs.h. 
> 
> v5 -
> 1. WRITE_SYSREG_ASM is enclosed within #ifdef __ASSEMBLY__
> 
> 2. enable_mpu() clobbers r0 only.
> 
> 3. Definitions in mpu/cpregs.h in enclosed within ARM_32.
> 
> 4. Removed some #ifdefs and style changes.
> 
> v6 -
> 1. Coding style issues.
> 
> 2. Kept Luca's R-b and T-b as the changes should not impact the behavior.
Note for the future: Especially for T-b, it's better to drop the tags because
the series has not been tested in its current shape.

Reviewed-by: Michal Orzel 

~Michal



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To: Alejandro Vallejo 
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On 14.04.2025 19:27, Alejandro Vallejo wrote:
> On Mon Apr 14, 2025 at 6:06 PM BST, Alejandro Vallejo wrote:
>> On Thu Apr 10, 2025 at 12:34 PM BST, Jan Beulich wrote:
>>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>>
>>>> +            printk("  ramdisk: boot module %d\n", idx);
>>>> +            bi->mods[idx].type = BOOTMOD_RAMDISK;
>>>> +            bd->module = &bi->mods[idx];
>>>
>>> The field's named "module" now, but that now ends up inconsistent with
>>> naming used elsewhere, as is pretty noticeable here.
>>
>> Well, yes. It is confusing. Also, the DTB is called multiboot,ramdisk,
>> because multiboot,module is already used to detect what nodes are
>> expressed as multiboot,modules. I'm considering going back and calling
>> them ramdisk again. If anything, to avoid the ambiguity between
>> domain modules and multiboot modules. e.g: a kernel is a multiboot
>> module, but not a domain module.
> 
> Particularly when misc/arm/device-tree/booting.txt already states that
> the initrd for dom0 ought to be provided with the "multiboot,ramdisk"
> string in the "compatible" prop.  Deviating from that is just going to
> make it far more annoying to unify arm and x86 in the future.  And
> calling those ramdisks anything but ramdisk internally is just plain
> confusing (as evidenced in the current series).

Yet the limitation of this is quite obvious: How would you express
multiple such items? Have many "ramdisk"s? Even if some of them serve
an entirely different purpose? See how Linux has gone to tuck together
multiple CPIOs, as they can have only one thing called "ramdisk"
(which, aiui, now no longer truly is).

> So... how frontally opposed would you be to restoring the ramdisk
> nomenclature? Also, for ease of rebasing future patches it'd be far
> nicer to go back to ramdisk rather than reinventing some new name.

Well, I fear I wouldn't ack such a patch. If everyone else agrees
that "ramdisk" is the best of all names (or at least getting close),
I'd perhaps mumble over, but let it go in.

(Only partly as a joke: If we dislike "module", how about "blob" or
some such?)

Jan


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Date: Tue, 15 Apr 2025 08:20:07 +0200
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Subject: Re: [PATCH v7 1/3] xen/arm: Move some of the functions to common file
To: Ayan Kumar Halder ,
 xen-devel@lists.xenproject.org
Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
 Volodymyr Babchuk ,
 Luca Fancellu 
References: <20250414164514.588373-1-ayan.kumar.halder@amd.com>
 <20250414164514.588373-2-ayan.kumar.halder@amd.com>
From: "Orzel, Michal" 
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On 14/04/2025 18:45, Ayan Kumar Halder wrote:
> regions.inc is added to hold the common earlyboot MPU regions configurations
> between arm64 and arm32.
> 
> prepare_xen_region, fail_insufficient_regions() will be used by both arm32 and
> arm64. Thus, they have been moved to regions.inc.
Despite my numerous remarks about the commit message style, you did not change
it in this patch even though you were respinning the series. For the future,
please fix remarks in all the patches.

The series is now reviewed. I'll wait a day before committing.

~Michal



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To: Alejandro Vallejo 
Cc: xen-devel@lists.xenproject.org,
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On 14.04.2025 20:07, Alejandro Vallejo wrote:
> On Wed Apr 9, 2025 at 11:15 PM BST, Denis Mukhin wrote:
>> On Tuesday, April 8th, 2025 at 9:07 AM, Alejandro Vallejo  wrote:
>>> @@ -233,6 +264,12 @@ static int __init process_domain_node(
>>> return -ENODATA;
>>> }
>>>
>>> + if ( bd->domid == DOMID_INVALID )
>>>
>>> + bd->domid = get_initial_domain_id();
>>>
>>> + else if ( bd->domid != get_initial_domain_id() )
>>>
>>> + printk(XENLOG_WARNING
>>> + "WARN: Booting without initial domid not supported.\n");
>>
>> Drop WARN since the log message is XENLOG_WARNING level already?
> 
> As mentioned elsewhere, the point of those prefixes are to be readable.

This, however, imo is a matter of consistency across the codebase, not just
within hyperlaunch. Plus (again imo) if anything, prefixes that are part of
the log output should contain proper words ("Warning:" or "Error:"), and
they shouldn't needlessly "shout" (i.e. "FATAL:" is okay-ish to be all caps,
but the others aren't).

Jan


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Date: Tue, 15 Apr 2025 08:27:52 +0200
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Subject: Re: [PATCH v3 12/16] x86/hyperlaunch: add domain id parsing to domain
 config
To: Alejandro Vallejo 
Cc: "Daniel P. Smith" ,
 Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini ,
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 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 14.04.2025 20:35, Alejandro Vallejo wrote:
> On Thu Apr 10, 2025 at 12:49 PM BST, Jan Beulich wrote:
>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>> From: "Daniel P. Smith" 
>>> @@ -158,12 +159,42 @@ int __init fdt_read_multiboot_module(const void *fdt, int node,
>>>  static int __init process_domain_node(
>>>      struct boot_info *bi, const void *fdt, int dom_node)
>>>  {
>>> -    int node;
>>> +    int node, property;
>>>      struct boot_domain *bd = &bi->domains[bi->nr_domains];
>>>      const char *name = fdt_get_name(fdt, dom_node, NULL) ?: "unknown";
>>>      int address_cells = fdt_address_cells(fdt, dom_node);
>>>      int size_cells = fdt_size_cells(fdt, dom_node);
>>>  
>>> +    fdt_for_each_property_offset(property, fdt, dom_node)
>>> +    {
>>> +        const struct fdt_property *prop;
>>> +        const char *prop_name;
>>> +        int name_len;
>>> +
>>> +        prop = fdt_get_property_by_offset(fdt, property, NULL);
>>> +        if ( !prop )
>>> +            continue; /* silently skip */
>>> +
>>> +        prop_name = fdt_get_string(fdt, fdt32_to_cpu(prop->nameoff), &name_len);
>>> +
>>> +        if ( strncmp(prop_name, "domid", name_len) == 0 )
>>> +        {
>>> +            uint32_t val = DOMID_INVALID;
>>> +            if ( fdt_prop_as_u32(prop, &val) != 0 )
>>> +            {
>>> +                printk("  failed processing domain id for domain %s\n", name);
>>> +                return -EINVAL;
>>> +            }
>>> +            if ( val >= DOMID_FIRST_RESERVED )
>>> +            {
>>> +                printk("  invalid domain id for domain %s\n", name);
>>> +                return -EINVAL;
>>> +            }
>>> +            bd->domid = (domid_t)val;
>>
>> And a conflict with other domains' IDs will not be complained about?
> 
> Hmmm... sure, I can iterate the domlist and check.

Well, just to clarify: The checking doesn't necessarily need to happen here
and now. It may also happen as domains are actually created. Yet then I
think a pointer there (in a code comment) would be helpful here.

>>> @@ -233,6 +264,12 @@ static int __init process_domain_node(
>>>          return -ENODATA;
>>>      }
>>>  
>>> +    if ( bd->domid == DOMID_INVALID )
>>> +        bd->domid = get_initial_domain_id();
>>> +    else if ( bd->domid != get_initial_domain_id() )
>>> +        printk(XENLOG_WARNING
>>> +               "WARN: Booting without initial domid not supported.\n");
>>
>> I'm not a native speaker, but (or perhaps because of that) "without" feels
>> wrong here.
> 
> It's probably the compound effect of without and "not supported". The
> statement is correct, but it's arguably a bit obtuse.
> 
> I'll replace it with "WARN: Unsupported boot with missing initial domid.".

But that still doesn't fit the check, which compares the given ID (i.e.
there's nothing "missing" here) with the expected one. The "no ID given"
is handled by the plain if() that's first.

> As for the first branch of that clause... I'm not sure we want to
> support running with DTs that are missing the domid property.

This I can't really judge on.

Jan


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Subject: Re: [PATCH v3 16/16] x86/hyperlaunch: add capabilities to boot domain
To: Alejandro Vallejo 
Cc: "Daniel P. Smith" ,
 Xenia Ragiadakou ,
 Stefano Stabellini ,
 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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References: <20250408160802.49870-1-agarciav@amd.com>
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From: Jan Beulich 
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On 14.04.2025 21:31, Alejandro Vallejo wrote:
> On Thu Apr 10, 2025 at 1:18 PM BST, Jan Beulich wrote:
>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>> --- a/xen/arch/x86/domain-builder/fdt.c
>>> +++ b/xen/arch/x86/domain-builder/fdt.c
>>> @@ -257,6 +257,18 @@ static int __init process_domain_node(
>>>              bd->max_vcpus = val;
>>>              printk("  max vcpus: %d\n", bd->max_vcpus);
>>>          }
>>> +        else if ( strncmp(prop_name, "capabilities", name_len) == 0 )
>>> +        {
>>> +            if ( fdt_prop_as_u32(prop, &bd->capabilities) != 0 )
>>> +            {
>>> +                printk("  failed processing domain id for domain %s\n", name);
>>> +                return -EINVAL;
>>> +            }
>>> +            printk("  caps: ");
>>> +            if ( bd->capabilities & BUILD_CAPS_CONTROL )
>>> +                printk("c");
>>> +            printk("\n");
>>> +        }
>>
>> Like for the other patch: What about other bits being set in the value read?
> 
> I take it that the non-worded suggestion is to have a mask of reserved
> bits for each case and check they are not set (giving a warning if they are)?

Whether a warning is sufficient I can't tell. I would have expected such to be
outright rejected.

>>> --- a/xen/arch/x86/setup.c
>>> +++ b/xen/arch/x86/setup.c
>>> @@ -1006,6 +1006,7 @@ static struct domain *__init create_dom0(struct boot_info *bi)
>>>  {
>>>      char *cmdline = NULL;
>>>      size_t cmdline_size;
>>> +    unsigned int create_flags = 0;
>>>      struct xen_domctl_createdomain dom0_cfg = {
>>>          .flags = IS_ENABLED(CONFIG_TBOOT) ? XEN_DOMCTL_CDF_s3_integrity : 0,
>>>          .max_evtchn_port = -1,
>>> @@ -1037,7 +1038,10 @@ static struct domain *__init create_dom0(struct boot_info *bi)
>>>      if ( bd->domid == DOMID_INVALID )
>>>          /* Create initial domain.  Not d0 for pvshim. */
>>>          bd->domid = get_initial_domain_id();
>>> -    d = domain_create(bd->domid, &dom0_cfg, pv_shim ? 0 : CDF_privileged);
>>> +    if ( bd->capabilities & BUILD_CAPS_CONTROL )
>>> +        create_flags |= CDF_privileged;
>>
>> Seeing that builder_init() in the non-DT case sets the new bit unconditionally,
>> isn't the shim's only domain suddenly getting CDF_privileged set this way? Oh,
>> no, you then ...
>>
>>> +    d = domain_create(bd->domid, &dom0_cfg,
>>> +                      pv_shim ? 0 : create_flags);
>>
>> ... hide the flag here. Any reason to have the intermediate variable in the
>> first place
> 
> Well, the logic would end up fairly convoluted otherwise. As things
> stand this can be encoded in an if-else fashion with 2 calls, but
> there's 2 capability flags coming that need integrating together.
> 
> This is just avoiding further code motion down the line.

Is it?

-    d = domain_create(bd->domid, &dom0_cfg, pv_shim ? 0 : CDF_privileged);
+    d = domain_create(bd->domid, &dom0_cfg,
+                      ((bd->capabilities & BUILD_CAPS_CONTROL) && !pv_shim
+                       ? CDF_privileged : 0));

isn't really worse (imo), but is highlighting the problem more clearly: Why
would the shim have BUILD_CAPS_CONTROL set in the first place? Without that
the statement would remain pretty similar to what it was before.

Jan


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Subject: Re: [PATCH v7 0/3] Enable early bootup of Armv8-R AArch32 systems
To: Ayan Kumar Halder 
Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
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On 14.04.2025 18:45, Ayan Kumar Halder wrote:
> Enable early booting of Armv8-R AArch32 based systems.
> 
> Added Luca's R-b in all the patches.
> Added Michal's R-b in patch 1 and 3.
> 
> Ayan Kumar Halder (3):
>   xen/arm: Move some of the functions to common file
>   xen/arm32: Create the same boot-time MPU regions as arm64
>   xen/arm32: mpu: Stubs to build MPU for arm32
> 
>  xen/arch/arm/arm32/Makefile              |   1 +
>  xen/arch/arm/arm32/mpu/Makefile          |   3 +
>  xen/arch/arm/arm32/mpu/head.S            | 104 +++++++++++++++++++++++
>  xen/arch/arm/arm32/mpu/p2m.c             |  19 +++++
>  xen/arch/arm/arm32/mpu/smpboot.c         |  26 ++++++
>  xen/arch/arm/arm64/mpu/head.S            |  78 +----------------
>  xen/arch/arm/include/asm/arm32/sysregs.h |  13 ++-
>  xen/arch/arm/include/asm/arm64/sysregs.h |  13 +++
>  xen/arch/arm/include/asm/cpregs.h        |   2 +
>  xen/arch/arm/include/asm/mm.h            |   9 +-
>  xen/arch/arm/include/asm/mmu/mm.h        |   7 ++
>  xen/arch/arm/include/asm/mpu/cpregs.h    |  32 +++++++
>  xen/arch/arm/include/asm/mpu/mm.h        |   5 ++
>  xen/arch/arm/include/asm/mpu/regions.inc |  79 +++++++++++++++++
>  xen/arch/arm/mpu/Makefile                |   1 +
>  xen/arch/arm/mpu/domain_page.c           |  45 ++++++++++
>  16 files changed, 350 insertions(+), 87 deletions(-)
>  create mode 100644 xen/arch/arm/arm32/mpu/Makefile
>  create mode 100644 xen/arch/arm/arm32/mpu/head.S
>  create mode 100644 xen/arch/arm/arm32/mpu/p2m.c
>  create mode 100644 xen/arch/arm/arm32/mpu/smpboot.c
>  create mode 100644 xen/arch/arm/include/asm/mpu/cpregs.h
>  create mode 100644 xen/arch/arm/include/asm/mpu/regions.inc
>  create mode 100644 xen/arch/arm/mpu/domain_page.c

Even if we have files of this name elsewhere, it would imo be nice if new ones
still used dash(es) instead of underscore(s) in their names.

Jan


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From xen-devel-bounces@lists.xenproject.org Tue Apr 15 06:57:44 2025
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Date: Mon, 14 Apr 2025 23:56:47 -0700
From: "H. Peter Anvin" 
To: Xin Li , Jim Mattson ,
        Sean Christopherson 
CC: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
        linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
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Subject: =?US-ASCII?Q?Re=3A_=5BRFC_PATCH_v1_10/15=5D_KVM=3A_VMX=3A_Use_WR?=
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On April 14, 2025 10:48:47 AM PDT, Xin Li  wrote:
>On 4/12/2025 4:10 PM, H=2E Peter Anvin wrote:
>> Also,*in this specific case* IA32_SPEC_CTRL is architecturally nonseria=
lizing, i=2Ee=2E WRMSR executes as WRMSRNS anyway=2E
>
>While the immediate form WRMSRNS could be faster because the MSR index
>is available *much* earlier in the pipeline, right?

Yes, but then it would be redundant with the virtualization support=2E


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From: Grygorii Strashko 

This patch adds Xen XSM policy loading support.

The configuration file XEN_POLICY specifies Xen hypervisor
XSM policy binary to load.

Signed-off-by: Grygorii Strashko 
---
changes in v2:
- fix conditional statements for XEN_POLICY
- add XSM policy binary check

 README.md                |  2 ++
 scripts/uboot-script-gen | 34 ++++++++++++++++++++++++++++++++++
 2 files changed, 36 insertions(+)

diff --git a/README.md b/README.md
index 137abef153ce..9106d2a07302 100644
--- a/README.md
+++ b/README.md
@@ -91,6 +91,8 @@ Where:
 - XEN specifies the Xen hypervisor binary to load. Note that it has to
   be a regular Xen binary, not a u-boot binary.
=20
+- XEN_POLICY specifies the Xen hypervisor XSM policy binary to load.
+
 - XEN_COLORS specifies the colors (cache coloring) to be used for Xen
   and is in the format startcolor-endcolor
=20
diff --git a/scripts/uboot-script-gen b/scripts/uboot-script-gen
index c4d26caf5e0e..208eafdecfeb 100755
--- a/scripts/uboot-script-gen
+++ b/scripts/uboot-script-gen
@@ -315,6 +315,15 @@ function xen_device_tree_editing()
     dt_set "/chosen" "#size-cells" "hex" "0x2"
     dt_set "/chosen" "xen,xen-bootargs" "str" "$XEN_CMD"
=20
+    if test -n "$XEN_POLICY" && test "$xen_policy_addr" !=3D "-"
+    then
+        local node_name=3D"xen-policy@${xen_policy_addr#0x}"
+
+        dt_mknode "/chosen" "$node_name"
+        dt_set "/chosen/$node_name" "compatible" "str_a" "xen,xsm-policy x=
en,multiboot-module multiboot,module"
+        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $xen_po=
licy_addr $xen_policy_size)"
+    fi
+
     if test "$DOM0_KERNEL"
     then
         local node_name=3D"dom0@${dom0_kernel_addr#0x}"
@@ -900,6 +909,15 @@ xen_file_loading()
     kernel_addr=3D$memaddr
     kernel_path=3D$XEN
     load_file "$XEN" "host_kernel"
+
+    xen_policy_addr=3D"-"
+    if test -n "$XEN_POLICY"
+    then
+        check_file_type "${XEN_POLICY}" "SE Linux policy"
+        xen_policy_addr=3D$memaddr
+        load_file "$XEN_POLICY" "xen_policy"
+        xen_policy_size=3D$filesize
+    fi
 }
=20
 linux_file_loading()
@@ -939,6 +957,22 @@ bitstream_load_and_config()
=20
 create_its_file_xen()
 {
+    if test -n "$XEN_POLICY" && test "$xen_policy_addr" !=3D "-"
+    then
+        cat >> "$its_file" <<- EOF
+        xen_policy {
+            description =3D "Xen XSM policy binary";
+            data =3D /incbin/("$XEN_POLICY");
+            type =3D "kernel";
+            arch =3D "arm64";
+            os =3D "linux";
+            compression =3D "none";
+            load =3D <$xen_policy_addr>;
+            $fit_algo
+        };
+	EOF
+    fi
+
     if test "$DOM0_KERNEL"
     then
         if test "$ramdisk_addr" !=3D "-"
--=20
2.34.1


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Date: Tue, 15 Apr 2025 07:05:07 +0000
To: Andrii Sultanov 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, Jan Beulich , Andrew Cooper , =?utf-8?Q?Roger_Pau_Monn=C3=A9?= 
Subject: Re: [PATCH v4 3/3] drivers: Make ioapic_sbdf and hpet_sbdf contain pci_sbdf_t
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On Mon, Apr 14, 2025 at 08:19:18PM +0100, Andrii Sultanov wrote:
> From: Andrii Sultanov 
>=20
> Following a similar change to amd_iommu struct, make two more structs
> take pci_sbdf_t directly instead of seg and bdf separately. This lets us
> drop several conversions from the latter to the former and simplifies
> several comparisons and assignments.
>=20
> Bloat-o-meter reports:
> add/remove: 0/0 grow/shrink: 1/10 up/down: 256/-320 (-64)
> Function                                     old     new   delta
> _einittext                                 22092   22348    +256
> parse_ivrs_hpet                              248     245      -3
> amd_iommu_detect_one_acpi                    876     868      -8
> iov_supports_xt                              275     264     -11
> amd_iommu_read_ioapic_from_ire               344     332     -12
> amd_setup_hpet_msi                           237     224     -13
> amd_iommu_ioapic_update_ire                  575     555     -20
> reserve_unity_map_for_device                 453     424     -29
> _hvm_dpci_msi_eoi                            160     128     -32
> amd_iommu_get_supported_ivhd_type             86      30     -56
> parse_ivrs_table                            3966    3830    -136
>=20
> Signed-off-by: Andrii Sultanov 
>=20
> ---
> Changes in V4:
> * Folded several separate seg+bdf comparisons and assignments into one
>   with sbdf_t
> * With reshuffling in the prior commits, this commit is no longer
>   neutral in terms of code size
>=20
> Changes in V3:
> * Dropped aliasing of seg and bdf, renamed users.
>=20
> Changes in V2:
> * Split single commit into several patches
> * Change the format specifier to %pp in amd_iommu_ioapic_update_ire
> ---
>  xen/drivers/passthrough/amd/iommu.h      |  5 +--
>  xen/drivers/passthrough/amd/iommu_acpi.c | 30 +++++++---------
>  xen/drivers/passthrough/amd/iommu_intr.c | 44 +++++++++++-------------
>  3 files changed, 37 insertions(+), 42 deletions(-)
>=20
> diff --git a/xen/drivers/passthrough/amd/iommu.h b/xen/drivers/passthroug=
h/amd/iommu.h
> index 2599800e6a..52f748310b 100644
> --- a/xen/drivers/passthrough/amd/iommu.h
> +++ b/xen/drivers/passthrough/amd/iommu.h
> @@ -262,7 +262,7 @@ int cf_check amd_setup_hpet_msi(struct msi_desc *msi_=
desc);
>  void cf_check amd_iommu_dump_intremap_tables(unsigned char key);
>=20
>  extern struct ioapic_sbdf {
> -    u16 bdf, seg;
> +    pci_sbdf_t sbdf;
>      u8 id;
>      bool cmdline;
>      u16 *pin_2_idx;
> @@ -273,7 +273,8 @@ unsigned int ioapic_id_to_index(unsigned int apic_id)=
;
>  unsigned int get_next_ioapic_sbdf_index(void);
>=20
>  extern struct hpet_sbdf {
> -    u16 bdf, seg, id;
> +    pci_sbdf_t sbdf;
> +    uint16_t id;
>      enum {
>          HPET_NONE,
>          HPET_CMDL,
> diff --git a/xen/drivers/passthrough/amd/iommu_acpi.c b/xen/drivers/passt=
hrough/amd/iommu_acpi.c
> index 9e4fbee953..14845766e6 100644
> --- a/xen/drivers/passthrough/amd/iommu_acpi.c
> +++ b/xen/drivers/passthrough/amd/iommu_acpi.c
> @@ -707,8 +707,7 @@ static int __init cf_check parse_ivrs_ioapic(const ch=
ar *str)
>          }
>      }
>=20
> -    ioapic_sbdf[idx].bdf =3D PCI_BDF(bus, dev, func);
> -    ioapic_sbdf[idx].seg =3D seg;
> +    ioapic_sbdf[idx].sbdf =3D PCI_SBDF( seg, PCI_BDF(bus, dev, func) );

PCI_SBDF() is a variadic macro, so, IMO, the line above can be simplified a=
s:

       ioapic_sbdf[idx].sbdf =3D PCI_SBDF( seg, bus, dev, func );

Ex: pdev_type() in xen/drivers/passthrough/pci.c

Can you please double check in the modified code?

>      ioapic_sbdf[idx].id =3D id;
>      ioapic_sbdf[idx].cmdline =3D true;
>=20
> @@ -734,8 +733,7 @@ static int __init cf_check parse_ivrs_hpet(const char=
 *str)
>          return -EINVAL;
>=20
>      hpet_sbdf.id =3D id;
> -    hpet_sbdf.bdf =3D PCI_BDF(bus, dev, func);
> -    hpet_sbdf.seg =3D seg;
> +    hpet_sbdf.sbdf =3D PCI_SBDF( seg, PCI_BDF(bus, dev, func) );

                        ^^
                        e.g. here it can be simplified too.

>      hpet_sbdf.init =3D HPET_CMDL;
>=20
>      return 0;
> @@ -748,6 +746,7 @@ static u16 __init parse_ivhd_device_special(
>  {
>      u16 dev_length, bdf;
>      unsigned int apic, idx;
> +    pci_sbdf_t sbdf;
>=20
>      dev_length =3D sizeof(*special);
>      if ( header_length < (block_length + dev_length) )
> @@ -757,6 +756,7 @@ static u16 __init parse_ivhd_device_special(
>      }
>=20
>      bdf =3D special->used_id;
> +    sbdf =3D PCI_SBDF(seg, bdf);
>      if ( bdf >=3D ivrs_bdf_entries )
>      {
>          AMD_IOMMU_ERROR("IVHD: invalid Device_Entry Dev_Id %#x\n", bdf);
> @@ -764,7 +764,7 @@ static u16 __init parse_ivhd_device_special(
>      }
>=20
>      AMD_IOMMU_DEBUG("IVHD Special: %pp variety %#x handle %#x\n",
> -                    &PCI_SBDF(seg, bdf), special->variety, special->hand=
le);
> +                    &sbdf, special->variety, special->handle);
>      add_ivrs_mapping_entry(bdf, bdf, special->header.data_setting, 0, tr=
ue,
>                             iommu);
>=20
> @@ -780,8 +780,7 @@ static u16 __init parse_ivhd_device_special(
>           */
>          for ( idx =3D 0; idx < nr_ioapic_sbdf; idx++ )
>          {
> -            if ( ioapic_sbdf[idx].bdf =3D=3D bdf &&
> -                 ioapic_sbdf[idx].seg =3D=3D seg &&
> +            if ( ioapic_sbdf[idx].sbdf.sbdf =3D=3D sbdf.sbdf &&
>                   ioapic_sbdf[idx].cmdline )
>                  break;
>          }
> @@ -790,7 +789,7 @@ static u16 __init parse_ivhd_device_special(
>              AMD_IOMMU_DEBUG("IVHD: Command line override present for IO-=
APIC %#x"
>                              "(IVRS: %#x devID %pp)\n",
>                              ioapic_sbdf[idx].id, special->handle,
> -                            &PCI_SBDF(seg, bdf));
> +                            &sbdf);
>              break;
>          }
>=20
> @@ -805,8 +804,7 @@ static u16 __init parse_ivhd_device_special(
>                                  special->handle);
>              else if ( idx !=3D MAX_IO_APICS && ioapic_sbdf[idx].pin_2_id=
x )
>              {
> -                if ( ioapic_sbdf[idx].bdf =3D=3D bdf &&
> -                     ioapic_sbdf[idx].seg =3D=3D seg )
> +                if ( ioapic_sbdf[idx].sbdf.sbdf =3D=3D sbdf.sbdf )
>                      AMD_IOMMU_WARN("IVHD: duplicate IO-APIC %#x entries\=
n",
>                                      special->handle);
>                  else
> @@ -827,8 +825,7 @@ static u16 __init parse_ivhd_device_special(
>                  }
>=20
>                  /* set device id of ioapic */
> -                ioapic_sbdf[idx].bdf =3D bdf;
> -                ioapic_sbdf[idx].seg =3D seg;
> +                ioapic_sbdf[idx].sbdf =3D sbdf;
>                  ioapic_sbdf[idx].id =3D special->handle;
>=20
>                  ioapic_sbdf[idx].pin_2_idx =3D xmalloc_array(
> @@ -862,13 +859,12 @@ static u16 __init parse_ivhd_device_special(
>              AMD_IOMMU_DEBUG("IVHD: Command line override present for HPE=
T %#x "
>                              "(IVRS: %#x devID %pp)\n",
>                              hpet_sbdf.id, special->handle,
> -                            &PCI_SBDF(seg, bdf));
> +                            &sbdf);
>              break;
>          case HPET_NONE:
>              /* set device id of hpet */
>              hpet_sbdf.id =3D special->handle;
> -            hpet_sbdf.bdf =3D bdf;
> -            hpet_sbdf.seg =3D seg;
> +            hpet_sbdf.sbdf =3D sbdf;
>              hpet_sbdf.init =3D HPET_IVHD;
>              break;
>          default:
> @@ -1139,9 +1135,9 @@ static int __init cf_check parse_ivrs_table(struct =
acpi_table_header *table)
>                  return -ENXIO;
>          }
>=20
> -        if ( !ioapic_sbdf[idx].seg &&
> +        if ( !ioapic_sbdf[idx].sbdf.seg &&
>               /* SB IO-APIC is always on this device in AMD systems. */
> -             ioapic_sbdf[idx].bdf =3D=3D PCI_BDF(0, 0x14, 0) )
> +             ioapic_sbdf[idx].sbdf.bdf =3D=3D PCI_BDF(0, 0x14, 0) )

Looks like something like the following should work:

          if ( ioapic_sbdf[idx].sbdf.sbdf =3D=3D PCI_SBDF(0, 0, 0x14, 0).sb=
df )

What do you think?

>              sb_ioapic =3D 1;
>=20
>          if ( ioapic_sbdf[idx].pin_2_idx )
> diff --git a/xen/drivers/passthrough/amd/iommu_intr.c b/xen/drivers/passt=
hrough/amd/iommu_intr.c
> index 16075cd5a1..b788675be2 100644
> --- a/xen/drivers/passthrough/amd/iommu_intr.c
> +++ b/xen/drivers/passthrough/amd/iommu_intr.c
> @@ -323,7 +323,8 @@ void cf_check amd_iommu_ioapic_update_ire(
>      unsigned int apic, unsigned int pin, uint64_t rte)
>  {
>      struct IO_APIC_route_entry new_rte;
> -    int seg, bdf, rc;
> +    pci_sbdf_t sbdf;
> +    int rc;
>      struct amd_iommu *iommu;
>      unsigned int idx;
>=20
> @@ -335,20 +336,18 @@ void cf_check amd_iommu_ioapic_update_ire(
>      new_rte.raw =3D rte;
>=20
>      /* get device id of ioapic devices */
> -    bdf =3D ioapic_sbdf[idx].bdf;
> -    seg =3D ioapic_sbdf[idx].seg;
> -    iommu =3D find_iommu_for_device(PCI_SBDF(seg, bdf));
> +    sbdf =3D ioapic_sbdf[idx].sbdf;
> +    iommu =3D find_iommu_for_device(sbdf);
>      if ( !iommu )
>      {
> -        AMD_IOMMU_WARN("failed to find IOMMU for IO-APIC @ %04x:%04x\n",
> -                       seg, bdf);
> +        AMD_IOMMU_WARN("failed to find IOMMU for IO-APIC @ %pp\n", &sbdf=
);
>          __ioapic_write_entry(apic, pin, true, new_rte);
>          return;
>      }
>=20
>      /* Update interrupt remapping entry */
>      rc =3D update_intremap_entry_from_ioapic(
> -             bdf, iommu, &new_rte,
> +             sbdf.bdf, iommu, &new_rte,
>               &ioapic_sbdf[idx].pin_2_idx[pin]);
>=20
>      if ( rc )
> @@ -369,7 +368,8 @@ unsigned int cf_check amd_iommu_read_ioapic_from_ire(
>      unsigned int offset;
>      unsigned int val =3D __io_apic_read(apic, reg);
>      unsigned int pin =3D (reg - 0x10) / 2;
> -    uint16_t seg, bdf, req_id;
> +    pci_sbdf_t sbdf;
> +    uint16_t req_id;
>      const struct amd_iommu *iommu;
>      union irte_ptr entry;
>=20
> @@ -381,12 +381,11 @@ unsigned int cf_check amd_iommu_read_ioapic_from_ir=
e(
>      if ( offset >=3D INTREMAP_MAX_ENTRIES )
>          return val;
>=20
> -    seg =3D ioapic_sbdf[idx].seg;
> -    bdf =3D ioapic_sbdf[idx].bdf;
> -    iommu =3D find_iommu_for_device(PCI_SBDF(seg, bdf));
> +    sbdf =3D ioapic_sbdf[idx].sbdf;
> +    iommu =3D find_iommu_for_device(sbdf);
>      if ( !iommu )
>          return val;
> -    req_id =3D get_intremap_requestor_id(seg, bdf);
> +    req_id =3D get_intremap_requestor_id(sbdf.seg, sbdf.bdf);
>      entry =3D get_intremap_entry(iommu, req_id, offset);
>=20
>      if ( !(reg & 1) )
> @@ -515,15 +514,15 @@ int cf_check amd_iommu_msi_msg_update_ire(
>      struct msi_desc *msi_desc, struct msi_msg *msg)
>  {
>      struct pci_dev *pdev =3D msi_desc->dev;
> -    int bdf, seg, rc;
> +    pci_sbdf_t sbdf;
> +    int rc;
>      struct amd_iommu *iommu;
>      unsigned int i, nr =3D 1;
>      u32 data;
>=20
> -    bdf =3D pdev ? pdev->sbdf.bdf : hpet_sbdf.bdf;
> -    seg =3D pdev ? pdev->seg : hpet_sbdf.seg;
> +    sbdf =3D pdev ? pdev->sbdf : hpet_sbdf.sbdf;
>=20
> -    iommu =3D _find_iommu_for_device(PCI_SBDF(seg, bdf));
> +    iommu =3D _find_iommu_for_device(sbdf);
>      if ( IS_ERR_OR_NULL(iommu) )
>          return PTR_ERR(iommu);
>=20
> @@ -532,7 +531,7 @@ int cf_check amd_iommu_msi_msg_update_ire(
>=20
>      if ( msi_desc->remap_index >=3D 0 && !msg )
>      {
> -        update_intremap_entry_from_msi_msg(iommu, bdf, nr,
> +        update_intremap_entry_from_msi_msg(iommu, sbdf.bdf, nr,
>                                             &msi_desc->remap_index,
>                                             NULL, NULL);
>=20
> @@ -543,7 +542,7 @@ int cf_check amd_iommu_msi_msg_update_ire(
>      if ( !msg )
>          return 0;
>=20
> -    rc =3D update_intremap_entry_from_msi_msg(iommu, bdf, nr,
> +    rc =3D update_intremap_entry_from_msi_msg(iommu, sbdf.bdf, nr,
>                                              &msi_desc->remap_index,
>                                              msg, &data);
>      if ( rc > 0 )
> @@ -660,8 +659,7 @@ bool __init cf_check iov_supports_xt(void)
>          if ( idx =3D=3D MAX_IO_APICS )
>              return false;
>=20
> -        if ( !find_iommu_for_device(PCI_SBDF(ioapic_sbdf[idx].seg,
> -                                             ioapic_sbdf[idx].bdf)) )
> +        if ( !find_iommu_for_device(ioapic_sbdf[idx].sbdf) )
>          {
>              AMD_IOMMU_WARN("no IOMMU for IO-APIC %#x (ID %x)\n",
>                             apic, IO_APIC_ID(apic));
> @@ -690,14 +688,14 @@ int __init cf_check amd_setup_hpet_msi(struct msi_d=
esc *msi_desc)
>          return -ENODEV;
>      }
>=20
> -    iommu =3D find_iommu_for_device(PCI_SBDF(hpet_sbdf.seg, hpet_sbdf.bd=
f));
> +    iommu =3D find_iommu_for_device(hpet_sbdf.sbdf);
>      if ( !iommu )
>          return -ENXIO;
>=20
> -    lock =3D get_intremap_lock(hpet_sbdf.seg, hpet_sbdf.bdf);
> +    lock =3D get_intremap_lock(hpet_sbdf.sbdf.seg, hpet_sbdf.sbdf.bdf);
>      spin_lock_irqsave(lock, flags);
>=20
> -    msi_desc->remap_index =3D alloc_intremap_entry(iommu, hpet_sbdf.bdf,=
 1);
> +    msi_desc->remap_index =3D alloc_intremap_entry(iommu, hpet_sbdf.sbdf=
.bdf, 1);
>      if ( msi_desc->remap_index >=3D INTREMAP_MAX_ENTRIES )
>      {
>          msi_desc->remap_index =3D -1;
> --
> 2.49.0
>=20
>=20

Thanks,
Denis



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Date: Tue, 15 Apr 2025 08:15:35 +0100
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v4 3/3] drivers: Make ioapic_sbdf and hpet_sbdf contain
 pci_sbdf_t
To: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, Jan Beulich ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
References: 
 
 
Content-Language: en-US
From: Andriy Sultanov 
In-Reply-To: 
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Content-Transfer-Encoding: 7bit

On 4/15/25 8:05 AM, dmkhn@proton.me wrote:

>> --- a/xen/drivers/passthrough/amd/iommu_acpi.c
>> +++ b/xen/drivers/passthrough/amd/iommu_acpi.c
>> @@ -707,8 +707,7 @@ static int __init cf_check parse_ivrs_ioapic(const char *str)
>>           }
>>       }
>>
>> -    ioapic_sbdf[idx].bdf = PCI_BDF(bus, dev, func);
>> -    ioapic_sbdf[idx].seg = seg;
>> +    ioapic_sbdf[idx].sbdf = PCI_SBDF( seg, PCI_BDF(bus, dev, func) );
> PCI_SBDF() is a variadic macro, so, IMO, the line above can be simplified as:
>
>         ioapic_sbdf[idx].sbdf = PCI_SBDF( seg, bus, dev, func );
>
> Ex: pdev_type() in xen/drivers/passthrough/pci.c
>
> Can you please double check in the modified code?
>
>>       ioapic_sbdf[idx].id = id;
>>       ioapic_sbdf[idx].cmdline = true;
>>
>> @@ -734,8 +733,7 @@ static int __init cf_check parse_ivrs_hpet(const char *str)
>>           return -EINVAL;
>>
>>       hpet_sbdf.id = id;
>> -    hpet_sbdf.bdf = PCI_BDF(bus, dev, func);
>> -    hpet_sbdf.seg = seg;
>> +    hpet_sbdf.sbdf = PCI_SBDF( seg, PCI_BDF(bus, dev, func) );
>                          ^^
>                          e.g. here it can be simplified too.
You are right, PCI_SBDF(sef, bus, dev, func) works here and above. Will 
resend.
>> @@ -1139,9 +1135,9 @@ static int __init cf_check parse_ivrs_table(struct acpi_table_header *table)
>>                   return -ENXIO;
>>           }
>>
>> -        if ( !ioapic_sbdf[idx].seg &&
>> +        if ( !ioapic_sbdf[idx].sbdf.seg &&
>>                /* SB IO-APIC is always on this device in AMD systems. */
>> -             ioapic_sbdf[idx].bdf == PCI_BDF(0, 0x14, 0) )
>> +             ioapic_sbdf[idx].sbdf.bdf == PCI_BDF(0, 0x14, 0) )
> Looks like something like the following should work:
>
>            if ( ioapic_sbdf[idx].sbdf.sbdf == PCI_SBDF(0, 0, 0x14, 0).sbdf )
>
> What do you think?

Will replace this one as well.

Thank you!




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On 14.04.2025 18:13, Roger Pau Monné wrote:
> On Mon, Apr 14, 2025 at 05:24:32PM +0200, Jan Beulich wrote:
>> On 14.04.2025 15:53, Roger Pau Monné wrote:
>>> On Mon, Apr 14, 2025 at 08:33:44AM +0200, Jan Beulich wrote:
>>>> On 11.04.2025 12:54, Roger Pau Monne wrote:
>>>>> @@ -1981,7 +2056,9 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned long gla,
>>>>>       */
>>>>>      if ( (p2mt == p2m_mmio_dm) ||
>>>>>           (npfec.write_access &&
>>>>> -          (p2m_is_discard_write(p2mt) || (p2mt == p2m_ioreq_server))) )
>>>>> +          (p2m_is_discard_write(p2mt) || (p2mt == p2m_ioreq_server) ||
>>>>> +           /* MMIO entries can be r/o if the target mfn is in mmio_ro_ranges. */
>>>>> +           (p2mt == p2m_mmio_direct))) )
>>>>>      {
>>>>>          if ( !handle_mmio_with_translation(gla, gfn, npfec) )
>>>>>              hvm_inject_hw_exception(X86_EXC_GP, 0);
>>>>
>>>> Aren't we handing too many things to handle_mmio_with_translation() this
>>>> way? At the very least you're losing ...
>>>>
>>>>> @@ -2033,14 +2110,6 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned long gla,
>>>>>          goto out_put_gfn;
>>>>>      }
>>>>>  
>>>>> -    if ( (p2mt == p2m_mmio_direct) && npfec.write_access && npfec.present &&
>>>>
>>>> ... the .present check.
>>>
>>> Isn't the p2mt == p2m_mmio_direct check already ensuring the entry is
>>> present?  Otherwise it's type would be p2m_invalid or p2m_mmio_dm?
>>
>> Yes (to the 1st question), it kind of is.
>>
>>> It did seem to me the other checks in this function already assume
>>> that by having a valid type the entry is present.
>>
>> Except for the code above, where we decided to play safe. AT the very least
>> if you drop such a check, please say a justifying word in the description.
> 
> I've added:
> 
> "As part of the fix r/o MMIO accesses are now handled by
> handle_mmio_with_translation(), re-using the same logic that was used
> for other read-only types part of p2m_is_discard_write().  The page
> present check is dropped as type p2m_mmio_direct must have the
> present bit set in the PTE."
> 
> Let me know if you think that's enough.

That's fine; it's even more verbose than I was hoping for.

Independently (i.e. not for this patch) we may want to actually assert
that npfec.present is set for P2M types where we demand that to always
be the case. (I wouldn't be too surprised if we actually found such an
assertion to trigger.)

>>>> I'm also concerned of e.g. VT-x'es APIC access MFN, which is
>>>> p2m_mmio_direct.
>>>
>>> But that won't go into hvm_hap_nested_page_fault() when using
>>> cpu_has_vmx_virtualize_apic_accesses (and thus having an APIC page
>>> mapped as p2m_mmio_direct)?
>>>
>>> It would instead be an EXIT_REASON_APIC_ACCESS vmexit which is handled
>>> differently?
>>
>> All true as long as things work as expected (potentially including the guest
>> also behaving as expected). Also this was explicitly only an example I could
>> readily think of. I'm simply wary of handle_mmio_with_translation() now
>> getting things to handle it's not meant to ever see.
> 
> How was access to MMIO r/o regions supposed to be handled before
> 33c19df9a5a0 (~2015)?  I see that setting r/o MMIO p2m entries was
> added way before to p2m_type_to_flags() and ept_p2m_type_to_flags()
> (~2010), yet I can't figure out how writes would be handled back then
> that didn't result in a p2m fault and crashing of the domain.

Was that handled at all before said change? mmio_ro_do_page_fault() was
(and still is) invoked for the hardware domain only, and quite likely
the need for handling (discarding) writes for PVHv1 had been overlooked
until someone was hit by the lack thereof.

> I'm happy to look at other ways to handling this, but given there's
> current logic for handling accesses to read-only regions in
> hvm_hap_nested_page_fault() I think re-using that was the best way to
> also handle accesses to MMIO read-only regions.
> 
> Arguably it would already be the case that for other reasons Xen would
> need to emulate an instruction that accesses a read-only MMIO region?

Aiui hvm_translate_get_page() will yield HVMTRANS_bad_gfn_to_mfn for
p2m_mmio_direct (after all, "direct" means we expect no emulation is
needed; while arguably wrong for the introspection case, I'm not sure
that and pass-through actually go together). Hence it's down to
hvmemul_linear_mmio_access() -> hvmemul_phys_mmio_access() ->
hvmemul_do_mmio_buffer() -> hvmemul_do_io_buffer() -> hvmemul_do_io(),
which means that if hvm_io_intercept() can't handle it, the access
will be forwarded to the responsible DM, or be "processed" by the
internal null handler.

Given this, perhaps what you do is actually fine. At the same time
note how several functions in hvm/emulate.c simply fail upon
encountering p2m_mmio_direct. These are all REP handlers though, so
the main emulator would then try emulating the insn the non-REP way.

Jan


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Date: Tue, 15 Apr 2025 07:34:37 +0000
To: Andrii Sultanov 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, Jan Beulich , Andrew Cooper , =?utf-8?Q?Roger_Pau_Monn=C3=A9?= 
Subject: Re: [PATCH v4 1/3] drivers: Change amd_iommu struct to contain pci_sbdf_t, simplify code
Message-ID: 
In-Reply-To: <40f504017d71c16a3e2bc8945ac5e674a3e791ed.1744657012.git.andriy.sultanov@vates.tech>
References:  <40f504017d71c16a3e2bc8945ac5e674a3e791ed.1744657012.git.andriy.sultanov@vates.tech>
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On Mon, Apr 14, 2025 at 08:19:16PM +0100, Andrii Sultanov wrote:
> From: Andrii Sultanov 
>=20
> Following on from 250d87dc3ff9 ("x86/msi: Change __msi_set_enable() to
> take pci_sbdf_t"), make struct amd_iommu contain pci_sbdf_t directly
> instead of specifying seg+bdf separately and regenerating sbdf_t from the=
m,
> which simplifies code.
>=20
> Bloat-o-meter reports:
> add/remove: 0/0 grow/shrink: 4/13 up/down: 121/-377 (-256)
> Function                                     old     new   delta
> _einittext                                 22028   22092     +64
> amd_iommu_prepare                            853     897     +44
> __mon_lengths                               2928    2936      +8
> _invalidate_all_devices                      133     138      +5
> _hvm_dpci_msi_eoi                            157     155      -2
> build_info                                   752     744      -8
> amd_iommu_add_device                         856     844     -12
> amd_iommu_msi_enable                          33      20     -13
> update_intremap_entry_from_msi_msg           879     859     -20
> amd_iommu_msi_msg_update_ire                 472     448     -24
> send_iommu_command                           251     224     -27
> amd_iommu_get_supported_ivhd_type             86      54     -32
> amd_iommu_detect_one_acpi                    918     886     -32
> iterate_ivrs_mappings                        169     129     -40
> flush_command_buffer                         460     417     -43
> set_iommu_interrupt_handler                  421     377     -44
> enable_iommu                                1745    1665     -80
>=20
> Resolves: https://gitlab.com/xen-project/xen/-/issues/198
>=20
> Reported-by: Andrew Cooper 
> Signed-off-by: Andrii Sultanov 
>=20
> ---
> Changes in V4:
> * Dropped references to the order of seg/bdf in the commit message
> * Dropped unnecessary detail from the commit message
> * Reverted to a macro usage in one case where it was mistakenly dropped
> * Folded several separate seg+bdf comparisons into a single one between
>   sbdf_t, folded separate assignments with a macro.
> * More code size improvements with the changes, so I've refreshed the
>   bloat-o-meter report
>=20
> Changes in V3:
> * Dropped the union with seg+bdf/pci_sbdf_t to avoid aliasing, renamed
>   all users appropriately
>=20
> Changes in V2:
> * Split single commit into several patches
> * Added the commit title of the referenced patch
> * Dropped brackets around &(iommu->sbdf) and &(sbdf)
> ---
>  xen/drivers/passthrough/amd/iommu.h         |  4 +--
>  xen/drivers/passthrough/amd/iommu_acpi.c    | 16 +++++-----
>  xen/drivers/passthrough/amd/iommu_cmd.c     |  8 ++---
>  xen/drivers/passthrough/amd/iommu_detect.c  | 18 +++++------
>  xen/drivers/passthrough/amd/iommu_init.c    | 35 ++++++++++-----------
>  xen/drivers/passthrough/amd/iommu_intr.c    | 29 ++++++++---------
>  xen/drivers/passthrough/amd/iommu_map.c     |  4 +--
>  xen/drivers/passthrough/amd/pci_amd_iommu.c | 22 ++++++-------
>  8 files changed, 67 insertions(+), 69 deletions(-)
>=20
> diff --git a/xen/drivers/passthrough/amd/iommu.h b/xen/drivers/passthroug=
h/amd/iommu.h
> index 00e81b4b2a..ba541f7943 100644
> --- a/xen/drivers/passthrough/amd/iommu.h
> +++ b/xen/drivers/passthrough/amd/iommu.h
> @@ -77,8 +77,8 @@ struct amd_iommu {
>      struct list_head list;
>      spinlock_t lock; /* protect iommu */
>=20
> -    u16 seg;
> -    u16 bdf;
> +    pci_sbdf_t sbdf;
> +
>      struct msi_desc msi;
>=20
>      u16 cap_offset;
> diff --git a/xen/drivers/passthrough/amd/iommu_acpi.c b/xen/drivers/passt=
hrough/amd/iommu_acpi.c
> index 5bdbfb5ba8..025d9be40f 100644
> --- a/xen/drivers/passthrough/amd/iommu_acpi.c
> +++ b/xen/drivers/passthrough/amd/iommu_acpi.c
> @@ -58,7 +58,7 @@ static void __init add_ivrs_mapping_entry(
>      uint16_t bdf, uint16_t alias_id, uint8_t flags, unsigned int ext_fla=
gs,
>      bool alloc_irt, struct amd_iommu *iommu)
>  {
> -    struct ivrs_mappings *ivrs_mappings =3D get_ivrs_mappings(iommu->seg=
);
> +    struct ivrs_mappings *ivrs_mappings =3D get_ivrs_mappings(iommu->sbd=
f.seg);
>=20
>      ASSERT( ivrs_mappings !=3D NULL );
>=20
> @@ -70,7 +70,7 @@ static void __init add_ivrs_mapping_entry(
>      ivrs_mappings[bdf].device_flags =3D flags;
>=20
>      /* Don't map an IOMMU by itself. */
> -    if ( iommu->bdf =3D=3D bdf )
> +    if ( iommu->sbdf.bdf =3D=3D bdf )
>          return;
>=20
>      /* Allocate interrupt remapping table if needed. */
> @@ -96,7 +96,7 @@ static void __init add_ivrs_mapping_entry(
>=20
>              if ( !ivrs_mappings[alias_id].intremap_table )
>                  panic("No memory for %pp's IRT\n",
> -                      &PCI_SBDF(iommu->seg, alias_id));
> +                      &PCI_SBDF(iommu->sbdf.seg, alias_id));
>          }
>      }
>=20
> @@ -112,7 +112,7 @@ static struct amd_iommu * __init find_iommu_from_bdf_=
cap(
>      struct amd_iommu *iommu;
>=20
>      for_each_amd_iommu ( iommu )
> -        if ( (iommu->seg =3D=3D seg) && (iommu->bdf =3D=3D bdf) &&
> +        if ( (iommu->sbdf.seg =3D=3D seg) && (iommu->sbdf.bdf =3D=3D bdf=
) &&

Perhaps something like

           if ( (iommu->sbdf.sbdf =3D=3D PCI_SBDF(seg, bdf).sbdf &&

?

>               (iommu->cap_offset =3D=3D cap_offset) )
>              return iommu;
>=20
> @@ -297,13 +297,13 @@ static int __init register_range_for_iommu_devices(
>      /* reserve unity-mapped page entries for devices */
>      for ( bdf =3D rc =3D 0; !rc && bdf < ivrs_bdf_entries; bdf++ )
>      {
> -        if ( iommu !=3D find_iommu_for_device(iommu->seg, bdf) )
> +        if ( iommu !=3D find_iommu_for_device(iommu->sbdf.seg, bdf) )
>              continue;
>=20
> -        req =3D get_ivrs_mappings(iommu->seg)[bdf].dte_requestor_id;
> -        rc =3D reserve_unity_map_for_device(iommu->seg, bdf, base, lengt=
h,
> +        req =3D get_ivrs_mappings(iommu->sbdf.seg)[bdf].dte_requestor_id=
;
> +        rc =3D reserve_unity_map_for_device(iommu->sbdf.seg, bdf, base, =
length,
>                                            iw, ir, false) ?:
> -             reserve_unity_map_for_device(iommu->seg, req, base, length,
> +             reserve_unity_map_for_device(iommu->sbdf.seg, req, base, le=
ngth,
>                                            iw, ir, false);
>      }
>=20
> diff --git a/xen/drivers/passthrough/amd/iommu_cmd.c b/xen/drivers/passth=
rough/amd/iommu_cmd.c
> index 83c525b84f..eefd626161 100644
> --- a/xen/drivers/passthrough/amd/iommu_cmd.c
> +++ b/xen/drivers/passthrough/amd/iommu_cmd.c
> @@ -40,7 +40,7 @@ static void send_iommu_command(struct amd_iommu *iommu,
>                       IOMMU_RING_BUFFER_PTR_MASK) )
>      {
>          printk_once(XENLOG_ERR "AMD IOMMU %pp: no cmd slot available\n",
> -                    &PCI_SBDF(iommu->seg, iommu->bdf));
> +                    &iommu->sbdf);
>          cpu_relax();
>      }
>=20
> @@ -85,7 +85,7 @@ static void flush_command_buffer(struct amd_iommu *iomm=
u,
>              threshold |=3D threshold << 1;
>              printk(XENLOG_WARNING
>                     "AMD IOMMU %pp: %scompletion wait taking too long\n",
> -                   &PCI_SBDF(iommu->seg, iommu->bdf),
> +                   &iommu->sbdf,
>                     timeout_base ? "iotlb " : "");
>              timeout =3D 0;
>          }
> @@ -95,7 +95,7 @@ static void flush_command_buffer(struct amd_iommu *iomm=
u,
>      if ( !timeout )
>          printk(XENLOG_WARNING
>                 "AMD IOMMU %pp: %scompletion wait took %lums\n",
> -               &PCI_SBDF(iommu->seg, iommu->bdf),
> +               &iommu->sbdf,
>                 timeout_base ? "iotlb " : "",
>                 (NOW() - start) / 10000000);
>  }
> @@ -300,7 +300,7 @@ void amd_iommu_flush_iotlb(u8 devfn, const struct pci=
_dev *pdev,
>      if ( !iommu_has_cap(iommu, PCI_CAP_IOTLB_SHIFT) )
>          return;
>=20
> -    req_id =3D get_dma_requestor_id(iommu->seg, PCI_BDF(pdev->bus, devfn=
));
> +    req_id =3D get_dma_requestor_id(iommu->sbdf.seg, PCI_BDF(pdev->bus, =
devfn));
>      queueid =3D req_id;
>      maxpend =3D pdev->ats.queue_depth & 0xff;
>=20
> diff --git a/xen/drivers/passthrough/amd/iommu_detect.c b/xen/drivers/pas=
sthrough/amd/iommu_detect.c
> index cede44e651..72cc554b08 100644
> --- a/xen/drivers/passthrough/amd/iommu_detect.c
> +++ b/xen/drivers/passthrough/amd/iommu_detect.c
> @@ -162,8 +162,8 @@ int __init amd_iommu_detect_one_acpi(
>      spin_lock_init(&iommu->lock);
>      INIT_LIST_HEAD(&iommu->ats_devices);
>=20
> -    iommu->seg =3D ivhd_block->pci_segment_group;
> -    iommu->bdf =3D ivhd_block->header.device_id;
> +    iommu->sbdf =3D PCI_SBDF(ivhd_block->pci_segment_group,
> +                           ivhd_block->header.device_id);
>      iommu->cap_offset =3D ivhd_block->capability_offset;
>      iommu->mmio_base_phys =3D ivhd_block->base_address;
>=20
> @@ -210,16 +210,16 @@ int __init amd_iommu_detect_one_acpi(
>      /* override IOMMU HT flags */
>      iommu->ht_flags =3D ivhd_block->header.flags;
>=20
> -    bus =3D PCI_BUS(iommu->bdf);
> -    dev =3D PCI_SLOT(iommu->bdf);
> -    func =3D PCI_FUNC(iommu->bdf);
> +    bus =3D PCI_BUS(iommu->sbdf.bdf);
> +    dev =3D PCI_SLOT(iommu->sbdf.bdf);
> +    func =3D PCI_FUNC(iommu->sbdf.bdf);
>=20
> -    rt =3D get_iommu_capabilities(iommu->seg, bus, dev, func,
> +    rt =3D get_iommu_capabilities(iommu->sbdf.seg, bus, dev, func,

I would update signature of get_iommu_capabilities() so it takes pci_sbdf_t
as an agument instead of disaggregated PCI address. I think it will simplif=
y
the code futher.

>                                  iommu->cap_offset, iommu);
>      if ( rt )
>          goto out;
>=20
> -    rt =3D get_iommu_msi_capabilities(iommu->seg, bus, dev, func, iommu)=
;
> +    rt =3D get_iommu_msi_capabilities(iommu->sbdf.seg, bus, dev, func, i=
ommu);

... and same idea for get_iommu_msi_capabilities()

What do you think?

>      if ( rt )
>          goto out;
>=20
> @@ -228,10 +228,10 @@ int __init amd_iommu_detect_one_acpi(
>      if ( !iommu->domid_map )
>          goto out;
>=20
> -    rt =3D pci_ro_device(iommu->seg, bus, PCI_DEVFN(dev, func));
> +    rt =3D pci_ro_device(iommu->sbdf.seg, bus, PCI_DEVFN(dev, func));

There's not so many users of pci_ro_device(). I think it makes sense to upd=
ate
pci_ro_device() to something like:

    int pci_ro_device(pci_sbdf_t pciaddr);

But probably in a separate code change.

>      if ( rt )
>          printk(XENLOG_ERR "Could not mark config space of %pp read-only =
(%d)\n",
> -               &PCI_SBDF(iommu->seg, iommu->bdf), rt);
> +               &iommu->sbdf, rt);
>=20
>      list_add_tail(&iommu->list, &amd_iommu_head);
>      rt =3D 0;
> diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passt=
hrough/amd/iommu_init.c
> index bb25b55c85..58d657060a 100644
> --- a/xen/drivers/passthrough/amd/iommu_init.c
> +++ b/xen/drivers/passthrough/amd/iommu_init.c
> @@ -409,9 +409,7 @@ static void iommu_reset_log(struct amd_iommu *iommu,
>=20
>  static void amd_iommu_msi_enable(struct amd_iommu *iommu, int flag)
>  {
> -    pci_sbdf_t sbdf =3D { .seg =3D iommu->seg, .bdf =3D iommu->bdf };
> -
> -    __msi_set_enable(sbdf, iommu->msi.msi_attrib.pos, flag);
> +    __msi_set_enable(iommu->sbdf, iommu->msi.msi_attrib.pos, flag);
>  }
>=20
>  static void cf_check iommu_msi_unmask(struct irq_desc *desc)
> @@ -566,7 +564,7 @@ static void cf_check parse_event_log_entry(struct amd=
_iommu *iommu, u32 entry[])
>=20
>          printk(XENLOG_ERR "AMD-Vi: %s: %pp d%u addr %016"PRIx64
>                 " flags %#x%s%s%s%s%s%s%s%s%s%s\n",
> -               code_str, &PCI_SBDF(iommu->seg, device_id),
> +               code_str, &PCI_SBDF(iommu->sbdf.seg, device_id),
>                 domain_id, addr, flags,
>                 (flags & 0xe00) ? " ??" : "",
>                 (flags & 0x100) ? " TR" : "",
> @@ -583,8 +581,8 @@ static void cf_check parse_event_log_entry(struct amd=
_iommu *iommu, u32 entry[])
>              amd_iommu_print_entries(iommu, device_id, daddr_to_dfn(addr)=
);
>=20
>          for ( bdf =3D 0; bdf < ivrs_bdf_entries; bdf++ )
> -            if ( get_dma_requestor_id(iommu->seg, bdf) =3D=3D device_id =
)
> -                pci_check_disable_device(iommu->seg, PCI_BUS(bdf),
> +            if ( get_dma_requestor_id(iommu->sbdf.seg, bdf) =3D=3D devic=
e_id )
> +                pci_check_disable_device(iommu->sbdf.seg, PCI_BUS(bdf),
>                                           PCI_DEVFN(bdf));
>      }
>      else
> @@ -643,7 +641,7 @@ static void cf_check parse_ppr_log_entry(struct amd_i=
ommu *iommu, u32 entry[])
>      struct pci_dev *pdev;
>=20
>      pcidevs_lock();
> -    pdev =3D pci_get_real_pdev(PCI_SBDF(iommu->seg, device_id));
> +    pdev =3D pci_get_real_pdev(PCI_SBDF(iommu->sbdf.seg, device_id));
>      pcidevs_unlock();
>=20
>      if ( pdev )
> @@ -752,12 +750,11 @@ static bool __init set_iommu_interrupt_handler(stru=
ct amd_iommu *iommu)
>      }
>=20
>      pcidevs_lock();
> -    iommu->msi.dev =3D pci_get_pdev(NULL, PCI_SBDF(iommu->seg, iommu->bd=
f));
> +    iommu->msi.dev =3D pci_get_pdev(NULL, iommu->sbdf);
>      pcidevs_unlock();
>      if ( !iommu->msi.dev )
>      {
> -        AMD_IOMMU_WARN("no pdev for %pp\n",
> -                       &PCI_SBDF(iommu->seg, iommu->bdf));
> +        AMD_IOMMU_WARN("no pdev for %pp\n", &iommu->sbdf);
>          return 0;
>      }
>=20
> @@ -779,7 +776,7 @@ static bool __init set_iommu_interrupt_handler(struct=
 amd_iommu *iommu)
>          hw_irq_controller *handler;
>          u16 control;
>=20
> -        control =3D pci_conf_read16(PCI_SBDF(iommu->seg, iommu->bdf),
> +        control =3D pci_conf_read16(iommu->sbdf,
>                                    iommu->msi.msi_attrib.pos + PCI_MSI_FL=
AGS);
>=20
>          iommu->msi.msi.nvec =3D 1;
> @@ -843,22 +840,22 @@ static void amd_iommu_erratum_746_workaround(struct=
 amd_iommu *iommu)
>           (boot_cpu_data.x86_model > 0x1f) )
>          return;
>=20
> -    pci_conf_write32(PCI_SBDF(iommu->seg, iommu->bdf), 0xf0, 0x90);
> -    value =3D pci_conf_read32(PCI_SBDF(iommu->seg, iommu->bdf), 0xf4);
> +    pci_conf_write32(iommu->sbdf, 0xf0, 0x90);
> +    value =3D pci_conf_read32(iommu->sbdf, 0xf4);
>=20
>      if ( value & (1 << 2) )
>          return;
>=20
>      /* Select NB indirect register 0x90 and enable writing */
> -    pci_conf_write32(PCI_SBDF(iommu->seg, iommu->bdf), 0xf0, 0x90 | (1 <=
< 8));
> +    pci_conf_write32(iommu->sbdf, 0xf0, 0x90 | (1 << 8));
>=20
> -    pci_conf_write32(PCI_SBDF(iommu->seg, iommu->bdf), 0xf4, value | (1 =
<< 2));
> +    pci_conf_write32(iommu->sbdf, 0xf4, value | (1 << 2));
>      printk(XENLOG_INFO
>             "AMD-Vi: Applying erratum 746 workaround for IOMMU at %pp\n",
> -           &PCI_SBDF(iommu->seg, iommu->bdf));
> +           &iommu->sbdf);
>=20
>      /* Clear the enable writing bit */
> -    pci_conf_write32(PCI_SBDF(iommu->seg, iommu->bdf), 0xf0, 0x90);
> +    pci_conf_write32(iommu->sbdf, 0xf0, 0x90);
>  }
>=20
>  static void enable_iommu(struct amd_iommu *iommu)
> @@ -1095,7 +1092,7 @@ static int __init amd_iommu_init_one(struct amd_iom=
mu *iommu, bool intr)
>          goto error_out;
>=20
>      /* Make sure that the device table has been successfully allocated. =
*/
> -    ivrs_mappings =3D get_ivrs_mappings(iommu->seg);
> +    ivrs_mappings =3D get_ivrs_mappings(iommu->sbdf.seg);
>      if ( !IVRS_MAPPINGS_DEVTAB(ivrs_mappings) )
>          goto error_out;
>=20
> @@ -1363,7 +1360,7 @@ static bool __init amd_sp5100_erratum28(void)
>=20
>  static int __init amd_iommu_prepare_one(struct amd_iommu *iommu)
>  {
> -    int rc =3D alloc_ivrs_mappings(iommu->seg);
> +    int rc =3D alloc_ivrs_mappings(iommu->sbdf.seg);
>=20
>      if ( !rc )
>          rc =3D map_iommu_mmio_region(iommu);
> diff --git a/xen/drivers/passthrough/amd/iommu_intr.c b/xen/drivers/passt=
hrough/amd/iommu_intr.c
> index 9abdc38053..a7347fcbad 100644
> --- a/xen/drivers/passthrough/amd/iommu_intr.c
> +++ b/xen/drivers/passthrough/amd/iommu_intr.c
> @@ -132,7 +132,7 @@ static int get_intremap_requestor_id(int seg, int bdf=
)
>  static unsigned int alloc_intremap_entry(const struct amd_iommu *iommu,
>                                           unsigned int bdf, unsigned int =
nr)
>  {
> -    const struct ivrs_mappings *ivrs_mappings =3D get_ivrs_mappings(iomm=
u->seg);
> +    const struct ivrs_mappings *ivrs_mappings =3D get_ivrs_mappings(iomm=
u->sbdf.seg);
>      unsigned long *inuse =3D ivrs_mappings[bdf].intremap_inuse;
>      unsigned int nr_ents =3D
>          intremap_table_entries(ivrs_mappings[bdf].intremap_table, iommu)=
;
> @@ -167,7 +167,7 @@ static union irte_ptr get_intremap_entry(const struct=
 amd_iommu *iommu,
>                                           unsigned int bdf, unsigned int =
index)
>  {
>      union irte_ptr table =3D {
> -        .ptr =3D get_ivrs_mappings(iommu->seg)[bdf].intremap_table
> +        .ptr =3D get_ivrs_mappings(iommu->sbdf.seg)[bdf].intremap_table
>      };
>=20
>      ASSERT(table.ptr && (index < intremap_table_entries(table.ptr, iommu=
)));
> @@ -184,7 +184,7 @@ static void free_intremap_entry(const struct amd_iomm=
u *iommu,
>                                  unsigned int bdf, unsigned int index)
>  {
>      union irte_ptr entry =3D get_intremap_entry(iommu, bdf, index);
> -    struct ivrs_mappings *ivrs =3D get_ivrs_mappings(iommu->seg);
> +    struct ivrs_mappings *ivrs =3D get_ivrs_mappings(iommu->sbdf.seg);
>=20
>      if ( iommu->ctrl.ga_en )
>      {
> @@ -281,8 +281,8 @@ static int update_intremap_entry_from_ioapic(
>      unsigned int dest, offset;
>      bool fresh =3D false;
>=20
> -    req_id =3D get_intremap_requestor_id(iommu->seg, bdf);
> -    lock =3D get_intremap_lock(iommu->seg, req_id);
> +    req_id =3D get_intremap_requestor_id(iommu->sbdf.seg, bdf);
> +    lock =3D get_intremap_lock(iommu->sbdf.seg, req_id);
>=20
>      delivery_mode =3D rte->delivery_mode;
>      vector =3D rte->vector;
> @@ -419,10 +419,10 @@ static int update_intremap_entry_from_msi_msg(
>      unsigned int dest, offset, i;
>      bool fresh =3D false;
>=20
> -    req_id =3D get_dma_requestor_id(iommu->seg, bdf);
> -    alias_id =3D get_intremap_requestor_id(iommu->seg, bdf);
> +    req_id =3D get_dma_requestor_id(iommu->sbdf.seg, bdf);
> +    alias_id =3D get_intremap_requestor_id(iommu->sbdf.seg, bdf);
>=20
> -    lock =3D get_intremap_lock(iommu->seg, req_id);
> +    lock =3D get_intremap_lock(iommu->sbdf.seg, req_id);
>      spin_lock_irqsave(lock, flags);
>=20
>      if ( msg =3D=3D NULL )
> @@ -486,10 +486,10 @@ static int update_intremap_entry_from_msi_msg(
>       */
>=20
>      if ( ( req_id !=3D alias_id ) &&
> -         get_ivrs_mappings(iommu->seg)[alias_id].intremap_table !=3D NUL=
L )
> +         get_ivrs_mappings(iommu->sbdf.seg)[alias_id].intremap_table !=
=3D NULL )
>      {
> -        BUG_ON(get_ivrs_mappings(iommu->seg)[req_id].intremap_table !=3D
> -               get_ivrs_mappings(iommu->seg)[alias_id].intremap_table);
> +        BUG_ON(get_ivrs_mappings(iommu->sbdf.seg)[req_id].intremap_table=
 !=3D
> +               get_ivrs_mappings(iommu->sbdf.seg)[alias_id].intremap_tab=
le);
>      }
>=20
>      return fresh;
> @@ -498,16 +498,17 @@ static int update_intremap_entry_from_msi_msg(
>  static struct amd_iommu *_find_iommu_for_device(int seg, int bdf)
>  {
>      struct amd_iommu *iommu;
> +    pci_sbdf_t sbdf =3D PCI_SBDF(seg, bdf);
>=20
>      for_each_amd_iommu ( iommu )
> -        if ( iommu->seg =3D=3D seg && iommu->bdf =3D=3D bdf )
> +        if ( iommu->sbdf.sbdf =3D=3D sbdf.sbdf )
>              return NULL;
>=20
>      iommu =3D find_iommu_for_device(seg, bdf);
>      if ( iommu )
>          return iommu;
>=20
> -    AMD_IOMMU_DEBUG("No IOMMU for MSI dev =3D %pp\n", &PCI_SBDF(seg, bdf=
));
> +    AMD_IOMMU_DEBUG("No IOMMU for MSI dev =3D %pp\n", &sbdf);
>      return ERR_PTR(-EINVAL);
>  }
>=20
> @@ -730,7 +731,7 @@ static void dump_intremap_table(const struct amd_iomm=
u *iommu,
>          if ( ivrs_mapping )
>          {
>              printk("  %pp:\n",
> -                   &PCI_SBDF(iommu->seg, ivrs_mapping->dte_requestor_id)=
);
> +                   &PCI_SBDF(iommu->sbdf.seg, ivrs_mapping->dte_requesto=
r_id));
>              ivrs_mapping =3D NULL;
>          }
>=20
> diff --git a/xen/drivers/passthrough/amd/iommu_map.c b/xen/drivers/passth=
rough/amd/iommu_map.c
> index dde393645a..d28c475650 100644
> --- a/xen/drivers/passthrough/amd/iommu_map.c
> +++ b/xen/drivers/passthrough/amd/iommu_map.c
> @@ -558,14 +558,14 @@ void amd_iommu_print_entries(const struct amd_iommu=
 *iommu, unsigned int dev_id,
>=20
>      if ( !dt[dev_id].tv )
>      {
> -        printk("%pp: no root\n", &PCI_SBDF(iommu->seg, dev_id));
> +        printk("%pp: no root\n", &PCI_SBDF(iommu->sbdf.seg, dev_id));
>          return;
>      }
>=20
>      pt_mfn =3D _mfn(dt[dev_id].pt_root);
>      level =3D dt[dev_id].paging_mode;
>      printk("%pp root @ %"PRI_mfn" (%u levels) dfn=3D%"PRI_dfn"\n",
> -           &PCI_SBDF(iommu->seg, dev_id), mfn_x(pt_mfn), level, dfn_x(df=
n));
> +           &PCI_SBDF(iommu->sbdf.seg, dev_id), mfn_x(pt_mfn), level, dfn=
_x(dfn));
>=20
>      while ( level )
>      {
> diff --git a/xen/drivers/passthrough/amd/pci_amd_iommu.c b/xen/drivers/pa=
ssthrough/amd/pci_amd_iommu.c
> index d00697edb3..6b58e3380b 100644
> --- a/xen/drivers/passthrough/amd/pci_amd_iommu.c
> +++ b/xen/drivers/passthrough/amd/pci_amd_iommu.c
> @@ -43,7 +43,7 @@ struct amd_iommu *find_iommu_for_device(int seg, int bd=
f)
>      {
>          unsigned int bd0 =3D bdf & ~PCI_FUNC(~0);
>=20
> -        if ( ivrs_mappings[bd0].iommu && ivrs_mappings[bd0].iommu->bdf !=
=3D bdf )
> +        if ( ivrs_mappings[bd0].iommu && ivrs_mappings[bd0].iommu->sbdf.=
bdf !=3D bdf )
>          {
>              struct ivrs_mappings tmp =3D ivrs_mappings[bd0];
>=20
> @@ -121,7 +121,7 @@ static bool use_ats(
>  {
>      return !ivrs_dev->block_ats &&
>             iommu_has_cap(iommu, PCI_CAP_IOTLB_SHIFT) &&
> -           pci_ats_device(iommu->seg, pdev->bus, pdev->devfn);
> +           pci_ats_device(iommu->sbdf.seg, pdev->bus, pdev->devfn);

Same idea about updating signature to take pci_sbdf_t.

>  }
>=20
>  static int __must_check amd_iommu_setup_domain_device(
> @@ -147,17 +147,17 @@ static int __must_check amd_iommu_setup_domain_devi=
ce(
>      if ( rc )
>          return rc;
>=20
> -    req_id =3D get_dma_requestor_id(iommu->seg, pdev->sbdf.bdf);
> -    ivrs_dev =3D &get_ivrs_mappings(iommu->seg)[req_id];
> +    req_id =3D get_dma_requestor_id(iommu->sbdf.seg, pdev->sbdf.bdf);
> +    ivrs_dev =3D &get_ivrs_mappings(iommu->sbdf.seg)[req_id];
>      sr_flags =3D (iommu_hwdom_passthrough && is_hardware_domain(domain)
>                  ? 0 : SET_ROOT_VALID)
>                 | (ivrs_dev->unity_map ? SET_ROOT_WITH_UNITY_MAP : 0);
>=20
>      /* get device-table entry */
> -    req_id =3D get_dma_requestor_id(iommu->seg, PCI_BDF(bus, devfn));
> +    req_id =3D get_dma_requestor_id(iommu->sbdf.seg, PCI_BDF(bus, devfn)=
);
>      table =3D iommu->dev_table.buffer;
>      dte =3D &table[req_id];
> -    ivrs_dev =3D &get_ivrs_mappings(iommu->seg)[req_id];
> +    ivrs_dev =3D &get_ivrs_mappings(iommu->sbdf.seg)[req_id];
>=20
>      if ( domain !=3D dom_io )
>      {
> @@ -275,7 +275,7 @@ static int __must_check amd_iommu_setup_domain_device=
(
>      ASSERT(pcidevs_locked());
>=20
>      if ( use_ats(pdev, iommu, ivrs_dev) &&
> -         !pci_ats_enabled(iommu->seg, bus, pdev->devfn) )
> +         !pci_ats_enabled(iommu->sbdf.seg, bus, pdev->devfn) )

... and same for pci_ats_enabled()

>      {
>          if ( devfn =3D=3D pdev->devfn )
>              enable_ats_device(pdev, &iommu->ats_devices);
> @@ -418,12 +418,12 @@ static void amd_iommu_disable_domain_device(const s=
truct domain *domain,
>=20
>      ASSERT(pcidevs_locked());
>=20
> -    if ( pci_ats_device(iommu->seg, bus, pdev->devfn) &&
> -         pci_ats_enabled(iommu->seg, bus, pdev->devfn) )
> +    if ( pci_ats_device(iommu->sbdf.seg, bus, pdev->devfn) &&
> +         pci_ats_enabled(iommu->sbdf.seg, bus, pdev->devfn) )
>          disable_ats_device(pdev);
>=20
>      BUG_ON ( iommu->dev_table.buffer =3D=3D NULL );
> -    req_id =3D get_dma_requestor_id(iommu->seg, PCI_BDF(bus, devfn));
> +    req_id =3D get_dma_requestor_id(iommu->sbdf.seg, PCI_BDF(bus, devfn)=
);
>      table =3D iommu->dev_table.buffer;
>      dte =3D &table[req_id];
>=20
> @@ -578,7 +578,7 @@ static int cf_check amd_iommu_add_device(u8 devfn, st=
ruct pci_dev *pdev)
>          return -EINVAL;
>=20
>      for_each_amd_iommu(iommu)
> -        if ( pdev->seg =3D=3D iommu->seg && pdev->sbdf.bdf =3D=3D iommu-=
>bdf )
> +        if ( pdev->sbdf.sbdf =3D=3D iommu->sbdf.sbdf )
>              return is_hardware_domain(pdev->domain) ? 0 : -ENODEV;
>=20
>      iommu =3D find_iommu_for_device(pdev->seg, pdev->sbdf.bdf);
> --
> 2.49.0
>=20
>=20



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Subject: Re: [PATCH v4 3/3] drivers: Make ioapic_sbdf and hpet_sbdf contain
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On 15.04.2025 09:15, Andriy Sultanov wrote:
> On 4/15/25 8:05 AM, dmkhn@proton.me wrote:
>>> --- a/xen/drivers/passthrough/amd/iommu_acpi.c
>>> +++ b/xen/drivers/passthrough/amd/iommu_acpi.c
>>> @@ -707,8 +707,7 @@ static int __init cf_check parse_ivrs_ioapic(const char *str)
>>>           }
>>>       }
>>>
>>> -    ioapic_sbdf[idx].bdf = PCI_BDF(bus, dev, func);
>>> -    ioapic_sbdf[idx].seg = seg;
>>> +    ioapic_sbdf[idx].sbdf = PCI_SBDF( seg, PCI_BDF(bus, dev, func) );
>> PCI_SBDF() is a variadic macro, so, IMO, the line above can be simplified as:
>>
>>         ioapic_sbdf[idx].sbdf = PCI_SBDF( seg, bus, dev, func );
>>
>> Ex: pdev_type() in xen/drivers/passthrough/pci.c
>>
>> Can you please double check in the modified code?
>>
>>>       ioapic_sbdf[idx].id = id;
>>>       ioapic_sbdf[idx].cmdline = true;
>>>
>>> @@ -734,8 +733,7 @@ static int __init cf_check parse_ivrs_hpet(const char *str)
>>>           return -EINVAL;
>>>
>>>       hpet_sbdf.id = id;
>>> -    hpet_sbdf.bdf = PCI_BDF(bus, dev, func);
>>> -    hpet_sbdf.seg = seg;
>>> +    hpet_sbdf.sbdf = PCI_SBDF( seg, PCI_BDF(bus, dev, func) );
>>                          ^^
>>                          e.g. here it can be simplified too.
> You are right, PCI_SBDF(sef, bus, dev, func) works here and above. Will 
> resend.

And please also drop the stray blanks immediately next to the parentheses.

Jan


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Subject: Re: [PATCH v4 1/3] drivers: Change amd_iommu struct to contain
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To: dmkhn@proton.me
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On 15.04.2025 09:34, dmkhn@proton.me wrote:
> On Mon, Apr 14, 2025 at 08:19:16PM +0100, Andrii Sultanov wrote:
>> --- a/xen/drivers/passthrough/amd/pci_amd_iommu.c
>> +++ b/xen/drivers/passthrough/amd/pci_amd_iommu.c
>> @@ -43,7 +43,7 @@ struct amd_iommu *find_iommu_for_device(int seg, int bdf)
>>      {
>>          unsigned int bd0 = bdf & ~PCI_FUNC(~0);
>>
>> -        if ( ivrs_mappings[bd0].iommu && ivrs_mappings[bd0].iommu->bdf != bdf )
>> +        if ( ivrs_mappings[bd0].iommu && ivrs_mappings[bd0].iommu->sbdf.bdf != bdf )
>>          {
>>              struct ivrs_mappings tmp = ivrs_mappings[bd0];
>>
>> @@ -121,7 +121,7 @@ static bool use_ats(
>>  {
>>      return !ivrs_dev->block_ats &&
>>             iommu_has_cap(iommu, PCI_CAP_IOTLB_SHIFT) &&
>> -           pci_ats_device(iommu->seg, pdev->bus, pdev->devfn);
>> +           pci_ats_device(iommu->sbdf.seg, pdev->bus, pdev->devfn);
> 
> Same idea about updating signature to take pci_sbdf_t.

Perhaps both this and ...

>> @@ -147,17 +147,17 @@ static int __must_check amd_iommu_setup_domain_device(
>>      if ( rc )
>>          return rc;
>>
>> -    req_id = get_dma_requestor_id(iommu->seg, pdev->sbdf.bdf);
>> -    ivrs_dev = &get_ivrs_mappings(iommu->seg)[req_id];
>> +    req_id = get_dma_requestor_id(iommu->sbdf.seg, pdev->sbdf.bdf);
>> +    ivrs_dev = &get_ivrs_mappings(iommu->sbdf.seg)[req_id];
>>      sr_flags = (iommu_hwdom_passthrough && is_hardware_domain(domain)
>>                  ? 0 : SET_ROOT_VALID)
>>                 | (ivrs_dev->unity_map ? SET_ROOT_WITH_UNITY_MAP : 0);
>>
>>      /* get device-table entry */
>> -    req_id = get_dma_requestor_id(iommu->seg, PCI_BDF(bus, devfn));
>> +    req_id = get_dma_requestor_id(iommu->sbdf.seg, PCI_BDF(bus, devfn));
>>      table = iommu->dev_table.buffer;
>>      dte = &table[req_id];
>> -    ivrs_dev = &get_ivrs_mappings(iommu->seg)[req_id];
>> +    ivrs_dev = &get_ivrs_mappings(iommu->sbdf.seg)[req_id];
>>
>>      if ( domain != dom_io )
>>      {
>> @@ -275,7 +275,7 @@ static int __must_check amd_iommu_setup_domain_device(
>>      ASSERT(pcidevs_locked());
>>
>>      if ( use_ats(pdev, iommu, ivrs_dev) &&
>> -         !pci_ats_enabled(iommu->seg, bus, pdev->devfn) )
>> +         !pci_ats_enabled(iommu->sbdf.seg, bus, pdev->devfn) )
> 
> ... and same for pci_ats_enabled()

... this would best take a pointer to a const pdev (if that works out).

And yes, there's a lot of similar cleanup to be done in this area. I don't
think we can demand Andrii to do it all in one go.

Jan


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Date: Tue, 15 Apr 2025 07:50:28 +0000
To: Andrii Sultanov 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, Jan Beulich , Andrew Cooper , =?utf-8?Q?Roger_Pau_Monn=C3=A9?= 
Subject: Re: [PATCH v4 2/3] drivers: Change find_iommu_for_device function to take pci_sbdf_t, simplify code
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On Mon, Apr 14, 2025 at 08:19:17PM +0100, Andrii Sultanov wrote:
> From: Andrii Sultanov 
>=20
> Following a similar change to amd_iommu struct, change the
> find_iommu_for_device function to take pci_sbdf_t as a single parameter.
> This removes conversions in the majority of cases.
>=20
> Bloat-o-meter reports (on top of the first patch in the series):
> add/remove: 0/0 grow/shrink: 12/11 up/down: 95/-95 (0)
> Function                                     old     new   delta
> amd_iommu_get_supported_ivhd_type             54      86     +32
> parse_ivrs_table                            3955    3966     +11
> amd_iommu_assign_device                      271     282     +11
> __mon_lengths                               2928    2936      +8
> update_intremap_entry_from_msi_msg           859     864      +5
> iov_supports_xt                              270     275      +5
> amd_setup_hpet_msi                           232     237      +5
> amd_iommu_domain_destroy                      46      51      +5
> _hvm_dpci_msi_eoi                            155     160      +5
> find_iommu_for_device                        242     246      +4
> amd_iommu_ioapic_update_ire                  572     575      +3
> allocate_domain_resources                     82      83      +1
> amd_iommu_read_ioapic_from_ire               347     344      -3
> reassign_device                              843     838      -5
> amd_iommu_remove_device                      352     347      -5
> amd_iommu_get_reserved_device_memory         521     516      -5
> amd_iommu_flush_iotlb                        359     354      -5
> amd_iommu_add_device                         844     839      -5
> amd_iommu_setup_domain_device               1478    1472      -6
> build_info                                   752     744      -8
> amd_iommu_detect_one_acpi                    886     876     -10
> register_range_for_device                    297     281     -16
> parse_ivmd_block                            1339    1312     -27
>=20
> Signed-off-by: Andrii Sultanov 
>=20
> Acked-by: Jan Beulich 

Looks good to me:

Reviewed-by: Denis Mukhin 
>=20
> ---
> Changes in V4:
> * After amendments to the previous commit which increased improvements
>   there, this commit now does not improve code size anymore (but still
>   simplifies code), so I've updated the bloat-o-meter report.
>=20
> Changes in V3:
> * Amended commit message
> * As the previous patch dropped the aliasing of seg and bdf, renamed user=
s of
>   amd_iommu as appropriate.
>=20
> Changes in V2:
> * Split single commit into several patches
> * Dropped brackets around &(iommu->sbdf) and &(sbdf)
> * Dropped most of the hunk in _invalidate_all_devices - it was
>   bloat-equivalent to the existing code - just convert with PCI_SBDF
>   instead
> * Dropped the hunk in get_intremap_requestor_id (iommu_intr.c) and
>   amd_iommu_get_reserved_device_memory (iommu_map.c) as they were only
>   increasing the code size.
> * Kept "/* XXX */" where appropriate
> * Fixed a slip-up in register_range_for_iommu_devices where iommu->sbdf
>   replaced the usage of *different* seg and bdf.
> ---
>  xen/drivers/passthrough/amd/iommu.h         |  2 +-
>  xen/drivers/passthrough/amd/iommu_acpi.c    | 14 +++++-----
>  xen/drivers/passthrough/amd/iommu_cmd.c     |  2 +-
>  xen/drivers/passthrough/amd/iommu_init.c    |  4 +--
>  xen/drivers/passthrough/amd/iommu_intr.c    | 17 ++++++------
>  xen/drivers/passthrough/amd/iommu_map.c     |  2 +-
>  xen/drivers/passthrough/amd/pci_amd_iommu.c | 30 ++++++++++-----------
>  7 files changed, 35 insertions(+), 36 deletions(-)
>=20
> diff --git a/xen/drivers/passthrough/amd/iommu.h b/xen/drivers/passthroug=
h/amd/iommu.h
> index ba541f7943..2599800e6a 100644
> --- a/xen/drivers/passthrough/amd/iommu.h
> +++ b/xen/drivers/passthrough/amd/iommu.h
> @@ -240,7 +240,7 @@ void amd_iommu_flush_intremap(struct amd_iommu *iommu=
, uint16_t bdf);
>  void amd_iommu_flush_all_caches(struct amd_iommu *iommu);
>=20
>  /* find iommu for bdf */
> -struct amd_iommu *find_iommu_for_device(int seg, int bdf);
> +struct amd_iommu *find_iommu_for_device(pci_sbdf_t sbdf);
>=20
>  /* interrupt remapping */
>  bool cf_check iov_supports_xt(void);
> diff --git a/xen/drivers/passthrough/amd/iommu_acpi.c b/xen/drivers/passt=
hrough/amd/iommu_acpi.c
> index 025d9be40f..9e4fbee953 100644
> --- a/xen/drivers/passthrough/amd/iommu_acpi.c
> +++ b/xen/drivers/passthrough/amd/iommu_acpi.c
> @@ -239,17 +239,17 @@ static int __init register_range_for_device(
>      unsigned int bdf, paddr_t base, paddr_t limit,
>      bool iw, bool ir, bool exclusion)
>  {
> -    int seg =3D 0; /* XXX */
> -    struct ivrs_mappings *ivrs_mappings =3D get_ivrs_mappings(seg);
> +    pci_sbdf_t sbdf =3D { .seg =3D 0 /* XXX */, .bdf =3D bdf };
> +    struct ivrs_mappings *ivrs_mappings =3D get_ivrs_mappings(sbdf.seg);
>      struct amd_iommu *iommu;
>      u16 req;
>      int rc =3D 0;
>=20
> -    iommu =3D find_iommu_for_device(seg, bdf);
> +    iommu =3D find_iommu_for_device(sbdf);
>      if ( !iommu )
>      {
>          AMD_IOMMU_WARN("IVMD: no IOMMU for device %pp - ignoring constra=
in\n",
> -                       &PCI_SBDF(seg, bdf));
> +                       &sbdf);
>          return 0;
>      }
>      req =3D ivrs_mappings[bdf].dte_requestor_id;
> @@ -263,9 +263,9 @@ static int __init register_range_for_device(
>          paddr_t length =3D limit + PAGE_SIZE - base;
>=20
>          /* reserve unity-mapped page entries for device */
> -        rc =3D reserve_unity_map_for_device(seg, bdf, base, length, iw, =
ir,
> +        rc =3D reserve_unity_map_for_device(sbdf.seg, bdf, base, length,=
 iw, ir,
>                                            false) ?:
> -             reserve_unity_map_for_device(seg, req, base, length, iw, ir=
,
> +             reserve_unity_map_for_device(sbdf.seg, req, base, length, i=
w, ir,
>                                            false);
>      }
>      else
> @@ -297,7 +297,7 @@ static int __init register_range_for_iommu_devices(
>      /* reserve unity-mapped page entries for devices */
>      for ( bdf =3D rc =3D 0; !rc && bdf < ivrs_bdf_entries; bdf++ )
>      {
> -        if ( iommu !=3D find_iommu_for_device(iommu->sbdf.seg, bdf) )
> +        if ( iommu !=3D find_iommu_for_device(PCI_SBDF(iommu->sbdf.seg, =
bdf)) )
>              continue;
>=20
>          req =3D get_ivrs_mappings(iommu->sbdf.seg)[bdf].dte_requestor_id=
;
> diff --git a/xen/drivers/passthrough/amd/iommu_cmd.c b/xen/drivers/passth=
rough/amd/iommu_cmd.c
> index eefd626161..6b80c57f44 100644
> --- a/xen/drivers/passthrough/amd/iommu_cmd.c
> +++ b/xen/drivers/passthrough/amd/iommu_cmd.c
> @@ -288,7 +288,7 @@ void amd_iommu_flush_iotlb(u8 devfn, const struct pci=
_dev *pdev,
>      if ( !pci_ats_enabled(pdev->seg, pdev->bus, pdev->devfn) )
>          return;
>=20
> -    iommu =3D find_iommu_for_device(pdev->seg, pdev->sbdf.bdf);
> +    iommu =3D find_iommu_for_device(pdev->sbdf);
>=20
>      if ( !iommu )
>      {
> diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passt=
hrough/amd/iommu_init.c
> index 58d657060a..3f6d2f5db5 100644
> --- a/xen/drivers/passthrough/amd/iommu_init.c
> +++ b/xen/drivers/passthrough/amd/iommu_init.c
> @@ -1540,13 +1540,13 @@ static void invalidate_all_domain_pages(void)
>  static int cf_check _invalidate_all_devices(
>      u16 seg, struct ivrs_mappings *ivrs_mappings)
>  {
> -    unsigned int bdf;
> +    unsigned int bdf;
>      u16 req_id;
>      struct amd_iommu *iommu;
>=20
>      for ( bdf =3D 0; bdf < ivrs_bdf_entries; bdf++ )
>      {
> -        iommu =3D find_iommu_for_device(seg, bdf);
> +        iommu =3D find_iommu_for_device(PCI_SBDF(seg, bdf));
>          req_id =3D ivrs_mappings[bdf].dte_requestor_id;
>          if ( iommu )
>          {
> diff --git a/xen/drivers/passthrough/amd/iommu_intr.c b/xen/drivers/passt=
hrough/amd/iommu_intr.c
> index a7347fcbad..16075cd5a1 100644
> --- a/xen/drivers/passthrough/amd/iommu_intr.c
> +++ b/xen/drivers/passthrough/amd/iommu_intr.c
> @@ -337,7 +337,7 @@ void cf_check amd_iommu_ioapic_update_ire(
>      /* get device id of ioapic devices */
>      bdf =3D ioapic_sbdf[idx].bdf;
>      seg =3D ioapic_sbdf[idx].seg;
> -    iommu =3D find_iommu_for_device(seg, bdf);
> +    iommu =3D find_iommu_for_device(PCI_SBDF(seg, bdf));
>      if ( !iommu )
>      {
>          AMD_IOMMU_WARN("failed to find IOMMU for IO-APIC @ %04x:%04x\n",
> @@ -383,7 +383,7 @@ unsigned int cf_check amd_iommu_read_ioapic_from_ire(
>=20
>      seg =3D ioapic_sbdf[idx].seg;
>      bdf =3D ioapic_sbdf[idx].bdf;
> -    iommu =3D find_iommu_for_device(seg, bdf);
> +    iommu =3D find_iommu_for_device(PCI_SBDF(seg, bdf));
>      if ( !iommu )
>          return val;
>      req_id =3D get_intremap_requestor_id(seg, bdf);
> @@ -495,16 +495,15 @@ static int update_intremap_entry_from_msi_msg(
>      return fresh;
>  }
>=20
> -static struct amd_iommu *_find_iommu_for_device(int seg, int bdf)
> +static struct amd_iommu *_find_iommu_for_device(pci_sbdf_t sbdf)
>  {
>      struct amd_iommu *iommu;
> -    pci_sbdf_t sbdf =3D PCI_SBDF(seg, bdf);
>=20
>      for_each_amd_iommu ( iommu )
>          if ( iommu->sbdf.sbdf =3D=3D sbdf.sbdf )
>              return NULL;
>=20
> -    iommu =3D find_iommu_for_device(seg, bdf);
> +    iommu =3D find_iommu_for_device(sbdf);
>      if ( iommu )
>          return iommu;
>=20
> @@ -524,7 +523,7 @@ int cf_check amd_iommu_msi_msg_update_ire(
>      bdf =3D pdev ? pdev->sbdf.bdf : hpet_sbdf.bdf;
>      seg =3D pdev ? pdev->seg : hpet_sbdf.seg;
>=20
> -    iommu =3D _find_iommu_for_device(seg, bdf);
> +    iommu =3D _find_iommu_for_device(PCI_SBDF(seg, bdf));
>      if ( IS_ERR_OR_NULL(iommu) )
>          return PTR_ERR(iommu);
>=20
> @@ -661,8 +660,8 @@ bool __init cf_check iov_supports_xt(void)
>          if ( idx =3D=3D MAX_IO_APICS )
>              return false;
>=20
> -        if ( !find_iommu_for_device(ioapic_sbdf[idx].seg,
> -                                    ioapic_sbdf[idx].bdf) )
> +        if ( !find_iommu_for_device(PCI_SBDF(ioapic_sbdf[idx].seg,
> +                                             ioapic_sbdf[idx].bdf)) )
>          {
>              AMD_IOMMU_WARN("no IOMMU for IO-APIC %#x (ID %x)\n",
>                             apic, IO_APIC_ID(apic));
> @@ -691,7 +690,7 @@ int __init cf_check amd_setup_hpet_msi(struct msi_des=
c *msi_desc)
>          return -ENODEV;
>      }
>=20
> -    iommu =3D find_iommu_for_device(hpet_sbdf.seg, hpet_sbdf.bdf);
> +    iommu =3D find_iommu_for_device(PCI_SBDF(hpet_sbdf.seg, hpet_sbdf.bd=
f));
>      if ( !iommu )
>          return -ENXIO;
>=20
> diff --git a/xen/drivers/passthrough/amd/iommu_map.c b/xen/drivers/passth=
rough/amd/iommu_map.c
> index d28c475650..320a2dc64c 100644
> --- a/xen/drivers/passthrough/amd/iommu_map.c
> +++ b/xen/drivers/passthrough/amd/iommu_map.c
> @@ -717,7 +717,7 @@ int cf_check amd_iommu_get_reserved_device_memory(
>              pcidevs_unlock();
>=20
>              if ( pdev )
> -                iommu =3D find_iommu_for_device(seg, bdf);
> +                iommu =3D find_iommu_for_device(sbdf);
>              if ( !iommu )
>                  continue;
>          }
> diff --git a/xen/drivers/passthrough/amd/pci_amd_iommu.c b/xen/drivers/pa=
ssthrough/amd/pci_amd_iommu.c
> index 6b58e3380b..3a14770855 100644
> --- a/xen/drivers/passthrough/amd/pci_amd_iommu.c
> +++ b/xen/drivers/passthrough/amd/pci_amd_iommu.c
> @@ -32,35 +32,35 @@ static bool __read_mostly init_done;
>=20
>  static const struct iommu_init_ops _iommu_init_ops;
>=20
> -struct amd_iommu *find_iommu_for_device(int seg, int bdf)
> +struct amd_iommu *find_iommu_for_device(pci_sbdf_t sbdf)
>  {
> -    struct ivrs_mappings *ivrs_mappings =3D get_ivrs_mappings(seg);
> +    struct ivrs_mappings *ivrs_mappings =3D get_ivrs_mappings(sbdf.seg);
>=20
> -    if ( !ivrs_mappings || bdf >=3D ivrs_bdf_entries )
> +    if ( !ivrs_mappings || sbdf.bdf >=3D ivrs_bdf_entries )
>          return NULL;
>=20
> -    if ( unlikely(!ivrs_mappings[bdf].iommu) && likely(init_done) )
> +    if ( unlikely(!ivrs_mappings[sbdf.bdf].iommu) && likely(init_done) )
>      {
> -        unsigned int bd0 =3D bdf & ~PCI_FUNC(~0);
> +        unsigned int bd0 =3D sbdf.bdf & ~PCI_FUNC(~0);
>=20
> -        if ( ivrs_mappings[bd0].iommu && ivrs_mappings[bd0].iommu->sbdf.=
bdf !=3D bdf )
> +        if ( ivrs_mappings[bd0].iommu && ivrs_mappings[bd0].iommu->sbdf.=
bdf !=3D sbdf.bdf )
>          {
>              struct ivrs_mappings tmp =3D ivrs_mappings[bd0];
>=20
>              tmp.iommu =3D NULL;
>              if ( tmp.dte_requestor_id =3D=3D bd0 )
> -                tmp.dte_requestor_id =3D bdf;
> -            ivrs_mappings[bdf] =3D tmp;
> +                tmp.dte_requestor_id =3D sbdf.bdf;
> +            ivrs_mappings[sbdf.bdf] =3D tmp;
>=20
>              printk(XENLOG_WARNING "%pp not found in ACPI tables;"
> -                   " using same IOMMU as function 0\n", &PCI_SBDF(seg, b=
df));
> +                   " using same IOMMU as function 0\n", &sbdf);
>=20
>              /* write iommu field last */
> -            ivrs_mappings[bdf].iommu =3D ivrs_mappings[bd0].iommu;
> +            ivrs_mappings[sbdf.bdf].iommu =3D ivrs_mappings[bd0].iommu;
>          }
>      }
>=20
> -    return ivrs_mappings[bdf].iommu;
> +    return ivrs_mappings[sbdf.bdf].iommu;
>  }
>=20
>  /*
> @@ -107,7 +107,7 @@ static bool any_pdev_behind_iommu(const struct domain=
 *d,
>          if ( pdev =3D=3D exclude )
>              continue;
>=20
> -        if ( find_iommu_for_device(pdev->seg, pdev->sbdf.bdf) =3D=3D iom=
mu )
> +        if ( find_iommu_for_device(pdev->sbdf) =3D=3D iommu )
>              return true;
>      }
>=20
> @@ -468,7 +468,7 @@ static int cf_check reassign_device(
>      struct amd_iommu *iommu;
>      int rc;
>=20
> -    iommu =3D find_iommu_for_device(pdev->seg, pdev->sbdf.bdf);
> +    iommu =3D find_iommu_for_device(pdev->sbdf);
>      if ( !iommu )
>      {
>          AMD_IOMMU_WARN("failed to find IOMMU: %pp cannot be assigned to =
%pd\n",
> @@ -581,7 +581,7 @@ static int cf_check amd_iommu_add_device(u8 devfn, st=
ruct pci_dev *pdev)
>          if ( pdev->sbdf.sbdf =3D=3D iommu->sbdf.sbdf )
>              return is_hardware_domain(pdev->domain) ? 0 : -ENODEV;
>=20
> -    iommu =3D find_iommu_for_device(pdev->seg, pdev->sbdf.bdf);
> +    iommu =3D find_iommu_for_device(pdev->sbdf);
>      if ( unlikely(!iommu) )
>      {
>          /* Filter bridge devices. */
> @@ -666,7 +666,7 @@ static int cf_check amd_iommu_remove_device(u8 devfn,=
 struct pci_dev *pdev)
>      if ( !pdev->domain )
>          return -EINVAL;
>=20
> -    iommu =3D find_iommu_for_device(pdev->seg, pdev->sbdf.bdf);
> +    iommu =3D find_iommu_for_device(pdev->sbdf);
>      if ( !iommu )
>      {
>          AMD_IOMMU_WARN("failed to find IOMMU: %pp cannot be removed from=
 %pd\n",
> --
> 2.49.0
>=20
>=20



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From: Luca Fancellu 
To: Julien Grall 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Bertrand Marquis
	, Michal Orzel , Volodymyr
 Babchuk 
Subject: Re: [PATCH v3 7/7] arm/mpu: Implement setup_mpu for MPU system
Thread-Topic: [PATCH v3 7/7] arm/mpu: Implement setup_mpu for MPU system
Thread-Index: AQHbqvIOcqFIKG0Dnkidmosr/dM7hLOjFvuAgAAzsICAAJ2ngIAAeRkA
Date: Tue, 15 Apr 2025 07:55:16 +0000
Message-ID: 
References: <20250411145655.140667-1-luca.fancellu@arm.com>
 <20250411145655.140667-8-luca.fancellu@arm.com>
 <923a2fc0-4eeb-4e09-a56d-7471a56fe3bf@xen.org>
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Date: Tue, 15 Apr 2025 08:56:16 +0100
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Subject: Re: [PATCH v4 1/3] drivers: Change amd_iommu struct to contain
 pci_sbdf_t, simplify code
To: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, Jan Beulich ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
References: 
 <40f504017d71c16a3e2bc8945ac5e674a3e791ed.1744657012.git.andriy.sultanov@vates.tech>
 
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From: Andriy Sultanov 
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On 4/15/25 8:34 AM, dmkhn@proton.me wrote:
> On Mon, Apr 14, 2025 at 08:19:16PM +0100, Andrii Sultanov wrote:
>> From: Andrii Sultanov 
>>
>> Following on from 250d87dc3ff9 ("x86/msi: Change __msi_set_enable() to
>> take pci_sbdf_t"), make struct amd_iommu contain pci_sbdf_t directly
>> instead of specifying seg+bdf separately and regenerating sbdf_t from them,
>> which simplifies code.
>>
>> Bloat-o-meter reports:
>> add/remove: 0/0 grow/shrink: 4/13 up/down: 121/-377 (-256)
>> Function                                     old     new   delta
>> _einittext                                 22028   22092     +64
>> amd_iommu_prepare                            853     897     +44
>> __mon_lengths                               2928    2936      +8
>> _invalidate_all_devices                      133     138      +5
>> _hvm_dpci_msi_eoi                            157     155      -2
>> build_info                                   752     744      -8
>> amd_iommu_add_device                         856     844     -12
>> amd_iommu_msi_enable                          33      20     -13
>> update_intremap_entry_from_msi_msg           879     859     -20
>> amd_iommu_msi_msg_update_ire                 472     448     -24
>> send_iommu_command                           251     224     -27
>> amd_iommu_get_supported_ivhd_type             86      54     -32
>> amd_iommu_detect_one_acpi                    918     886     -32
>> iterate_ivrs_mappings                        169     129     -40
>> flush_command_buffer                         460     417     -43
>> set_iommu_interrupt_handler                  421     377     -44
>> enable_iommu                                1745    1665     -80
>>
>> Resolves: https://gitlab.com/xen-project/xen/-/issues/198
>>
>> Reported-by: Andrew Cooper 
>> Signed-off-by: Andrii Sultanov 
>>
>> ---
>> Changes in V4:
>> * Dropped references to the order of seg/bdf in the commit message
>> * Dropped unnecessary detail from the commit message
>> * Reverted to a macro usage in one case where it was mistakenly dropped
>> * Folded several separate seg+bdf comparisons into a single one between
>>    sbdf_t, folded separate assignments with a macro.
>> * More code size improvements with the changes, so I've refreshed the
>>    bloat-o-meter report
>>
>> Changes in V3:
>> * Dropped the union with seg+bdf/pci_sbdf_t to avoid aliasing, renamed
>>    all users appropriately
>>
>> Changes in V2:
>> * Split single commit into several patches
>> * Added the commit title of the referenced patch
>> * Dropped brackets around &(iommu->sbdf) and &(sbdf)
>> ---
>>   xen/drivers/passthrough/amd/iommu.h         |  4 +--
>>   xen/drivers/passthrough/amd/iommu_acpi.c    | 16 +++++-----
>>   xen/drivers/passthrough/amd/iommu_cmd.c     |  8 ++---
>>   xen/drivers/passthrough/amd/iommu_detect.c  | 18 +++++------
>>   xen/drivers/passthrough/amd/iommu_init.c    | 35 ++++++++++-----------
>>   xen/drivers/passthrough/amd/iommu_intr.c    | 29 ++++++++---------
>>   xen/drivers/passthrough/amd/iommu_map.c     |  4 +--
>>   xen/drivers/passthrough/amd/pci_amd_iommu.c | 22 ++++++-------
>>   8 files changed, 67 insertions(+), 69 deletions(-)
>>
>> diff --git a/xen/drivers/passthrough/amd/iommu.h b/xen/drivers/passthrough/amd/iommu.h
>> index 00e81b4b2a..ba541f7943 100644
>> --- a/xen/drivers/passthrough/amd/iommu.h
>> +++ b/xen/drivers/passthrough/amd/iommu.h
>> @@ -77,8 +77,8 @@ struct amd_iommu {
>>       struct list_head list;
>>       spinlock_t lock; /* protect iommu */
>>
>> -    u16 seg;
>> -    u16 bdf;
>> +    pci_sbdf_t sbdf;
>> +
>>       struct msi_desc msi;
>>
>>       u16 cap_offset;
>> diff --git a/xen/drivers/passthrough/amd/iommu_acpi.c b/xen/drivers/passthrough/amd/iommu_acpi.c
>> index 5bdbfb5ba8..025d9be40f 100644
>> --- a/xen/drivers/passthrough/amd/iommu_acpi.c
>> +++ b/xen/drivers/passthrough/amd/iommu_acpi.c
>> @@ -58,7 +58,7 @@ static void __init add_ivrs_mapping_entry(
>>       uint16_t bdf, uint16_t alias_id, uint8_t flags, unsigned int ext_flags,
>>       bool alloc_irt, struct amd_iommu *iommu)
>>   {
>> -    struct ivrs_mappings *ivrs_mappings = get_ivrs_mappings(iommu->seg);
>> +    struct ivrs_mappings *ivrs_mappings = get_ivrs_mappings(iommu->sbdf.seg);
>>
>>       ASSERT( ivrs_mappings != NULL );
>>
>> @@ -70,7 +70,7 @@ static void __init add_ivrs_mapping_entry(
>>       ivrs_mappings[bdf].device_flags = flags;
>>
>>       /* Don't map an IOMMU by itself. */
>> -    if ( iommu->bdf == bdf )
>> +    if ( iommu->sbdf.bdf == bdf )
>>           return;
>>
>>       /* Allocate interrupt remapping table if needed. */
>> @@ -96,7 +96,7 @@ static void __init add_ivrs_mapping_entry(
>>
>>               if ( !ivrs_mappings[alias_id].intremap_table )
>>                   panic("No memory for %pp's IRT\n",
>> -                      &PCI_SBDF(iommu->seg, alias_id));
>> +                      &PCI_SBDF(iommu->sbdf.seg, alias_id));
>>           }
>>       }
>>
>> @@ -112,7 +112,7 @@ static struct amd_iommu * __init find_iommu_from_bdf_cap(
>>       struct amd_iommu *iommu;
>>
>>       for_each_amd_iommu ( iommu )
>> -        if ( (iommu->seg == seg) && (iommu->bdf == bdf) &&
>> +        if ( (iommu->sbdf.seg == seg) && (iommu->sbdf.bdf == bdf) &&
> Perhaps something like
>
>             if ( (iommu->sbdf.sbdf == PCI_SBDF(seg, bdf).sbdf &&
>
> ?
>
>>                (iommu->cap_offset == cap_offset) )
>>               return iommu;
>>
>> @@ -297,13 +297,13 @@ static int __init register_range_for_iommu_devices(
>>       /* reserve unity-mapped page entries for devices */
>>       for ( bdf = rc = 0; !rc && bdf < ivrs_bdf_entries; bdf++ )
>>       {
>> -        if ( iommu != find_iommu_for_device(iommu->seg, bdf) )
>> +        if ( iommu != find_iommu_for_device(iommu->sbdf.seg, bdf) )
>>               continue;
>>
>> -        req = get_ivrs_mappings(iommu->seg)[bdf].dte_requestor_id;
>> -        rc = reserve_unity_map_for_device(iommu->seg, bdf, base, length,
>> +        req = get_ivrs_mappings(iommu->sbdf.seg)[bdf].dte_requestor_id;
>> +        rc = reserve_unity_map_for_device(iommu->sbdf.seg, bdf, base, length,
>>                                             iw, ir, false) ?:
>> -             reserve_unity_map_for_device(iommu->seg, req, base, length,
>> +             reserve_unity_map_for_device(iommu->sbdf.seg, req, base, length,
>>                                             iw, ir, false);
>>       }
>>
>> diff --git a/xen/drivers/passthrough/amd/iommu_cmd.c b/xen/drivers/passthrough/amd/iommu_cmd.c
>> index 83c525b84f..eefd626161 100644
>> --- a/xen/drivers/passthrough/amd/iommu_cmd.c
>> +++ b/xen/drivers/passthrough/amd/iommu_cmd.c
>> @@ -40,7 +40,7 @@ static void send_iommu_command(struct amd_iommu *iommu,
>>                        IOMMU_RING_BUFFER_PTR_MASK) )
>>       {
>>           printk_once(XENLOG_ERR "AMD IOMMU %pp: no cmd slot available\n",
>> -                    &PCI_SBDF(iommu->seg, iommu->bdf));
>> +                    &iommu->sbdf);
>>           cpu_relax();
>>       }
>>
>> @@ -85,7 +85,7 @@ static void flush_command_buffer(struct amd_iommu *iommu,
>>               threshold |= threshold << 1;
>>               printk(XENLOG_WARNING
>>                      "AMD IOMMU %pp: %scompletion wait taking too long\n",
>> -                   &PCI_SBDF(iommu->seg, iommu->bdf),
>> +                   &iommu->sbdf,
>>                      timeout_base ? "iotlb " : "");
>>               timeout = 0;
>>           }
>> @@ -95,7 +95,7 @@ static void flush_command_buffer(struct amd_iommu *iommu,
>>       if ( !timeout )
>>           printk(XENLOG_WARNING
>>                  "AMD IOMMU %pp: %scompletion wait took %lums\n",
>> -               &PCI_SBDF(iommu->seg, iommu->bdf),
>> +               &iommu->sbdf,
>>                  timeout_base ? "iotlb " : "",
>>                  (NOW() - start) / 10000000);
>>   }
>> @@ -300,7 +300,7 @@ void amd_iommu_flush_iotlb(u8 devfn, const struct pci_dev *pdev,
>>       if ( !iommu_has_cap(iommu, PCI_CAP_IOTLB_SHIFT) )
>>           return;
>>
>> -    req_id = get_dma_requestor_id(iommu->seg, PCI_BDF(pdev->bus, devfn));
>> +    req_id = get_dma_requestor_id(iommu->sbdf.seg, PCI_BDF(pdev->bus, devfn));
>>       queueid = req_id;
>>       maxpend = pdev->ats.queue_depth & 0xff;
>>
>> diff --git a/xen/drivers/passthrough/amd/iommu_detect.c b/xen/drivers/passthrough/amd/iommu_detect.c
>> index cede44e651..72cc554b08 100644
>> --- a/xen/drivers/passthrough/amd/iommu_detect.c
>> +++ b/xen/drivers/passthrough/amd/iommu_detect.c
>> @@ -162,8 +162,8 @@ int __init amd_iommu_detect_one_acpi(
>>       spin_lock_init(&iommu->lock);
>>       INIT_LIST_HEAD(&iommu->ats_devices);
>>
>> -    iommu->seg = ivhd_block->pci_segment_group;
>> -    iommu->bdf = ivhd_block->header.device_id;
>> +    iommu->sbdf = PCI_SBDF(ivhd_block->pci_segment_group,
>> +                           ivhd_block->header.device_id);
>>       iommu->cap_offset = ivhd_block->capability_offset;
>>       iommu->mmio_base_phys = ivhd_block->base_address;
>>
>> @@ -210,16 +210,16 @@ int __init amd_iommu_detect_one_acpi(
>>       /* override IOMMU HT flags */
>>       iommu->ht_flags = ivhd_block->header.flags;
>>
>> -    bus = PCI_BUS(iommu->bdf);
>> -    dev = PCI_SLOT(iommu->bdf);
>> -    func = PCI_FUNC(iommu->bdf);
>> +    bus = PCI_BUS(iommu->sbdf.bdf);
>> +    dev = PCI_SLOT(iommu->sbdf.bdf);
>> +    func = PCI_FUNC(iommu->sbdf.bdf);
>>
>> -    rt = get_iommu_capabilities(iommu->seg, bus, dev, func,
>> +    rt = get_iommu_capabilities(iommu->sbdf.seg, bus, dev, func,
> I would update signature of get_iommu_capabilities() so it takes pci_sbdf_t
> as an agument instead of disaggregated PCI address. I think it will simplify
> the code futher.
>
>>                                   iommu->cap_offset, iommu);
>>       if ( rt )
>>           goto out;
>>
>> -    rt = get_iommu_msi_capabilities(iommu->seg, bus, dev, func, iommu);
>> +    rt = get_iommu_msi_capabilities(iommu->sbdf.seg, bus, dev, func, iommu);
> ... and same idea for get_iommu_msi_capabilities()
>
> What do you think?
>
>>       if ( rt )
>>           goto out;
>>
>> @@ -228,10 +228,10 @@ int __init amd_iommu_detect_one_acpi(
>>       if ( !iommu->domid_map )
>>           goto out;
>>
>> -    rt = pci_ro_device(iommu->seg, bus, PCI_DEVFN(dev, func));
>> +    rt = pci_ro_device(iommu->sbdf.seg, bus, PCI_DEVFN(dev, func));
> There's not so many users of pci_ro_device(). I think it makes sense to update
> pci_ro_device() to something like:
>
>      int pci_ro_device(pci_sbdf_t pciaddr);
>
> But probably in a separate code change.
>
>>       if ( rt )
>>           printk(XENLOG_ERR "Could not mark config space of %pp read-only (%d)\n",
>> -               &PCI_SBDF(iommu->seg, iommu->bdf), rt);
>> +               &iommu->sbdf, rt);
>>
>>       list_add_tail(&iommu->list, &amd_iommu_head);
>>       rt = 0;
>> diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c
>> index bb25b55c85..58d657060a 100644
>> --- a/xen/drivers/passthrough/amd/iommu_init.c
>> +++ b/xen/drivers/passthrough/amd/iommu_init.c
>> @@ -409,9 +409,7 @@ static void iommu_reset_log(struct amd_iommu *iommu,
>>
>>   static void amd_iommu_msi_enable(struct amd_iommu *iommu, int flag)
>>   {
>> -    pci_sbdf_t sbdf = { .seg = iommu->seg, .bdf = iommu->bdf };
>> -
>> -    __msi_set_enable(sbdf, iommu->msi.msi_attrib.pos, flag);
>> +    __msi_set_enable(iommu->sbdf, iommu->msi.msi_attrib.pos, flag);
>>   }
>>
>>   static void cf_check iommu_msi_unmask(struct irq_desc *desc)
>> @@ -566,7 +564,7 @@ static void cf_check parse_event_log_entry(struct amd_iommu *iommu, u32 entry[])
>>
>>           printk(XENLOG_ERR "AMD-Vi: %s: %pp d%u addr %016"PRIx64
>>                  " flags %#x%s%s%s%s%s%s%s%s%s%s\n",
>> -               code_str, &PCI_SBDF(iommu->seg, device_id),
>> +               code_str, &PCI_SBDF(iommu->sbdf.seg, device_id),
>>                  domain_id, addr, flags,
>>                  (flags & 0xe00) ? " ??" : "",
>>                  (flags & 0x100) ? " TR" : "",
>> @@ -583,8 +581,8 @@ static void cf_check parse_event_log_entry(struct amd_iommu *iommu, u32 entry[])
>>               amd_iommu_print_entries(iommu, device_id, daddr_to_dfn(addr));
>>
>>           for ( bdf = 0; bdf < ivrs_bdf_entries; bdf++ )
>> -            if ( get_dma_requestor_id(iommu->seg, bdf) == device_id )
>> -                pci_check_disable_device(iommu->seg, PCI_BUS(bdf),
>> +            if ( get_dma_requestor_id(iommu->sbdf.seg, bdf) == device_id )
>> +                pci_check_disable_device(iommu->sbdf.seg, PCI_BUS(bdf),
>>                                            PCI_DEVFN(bdf));
>>       }
>>       else
>> @@ -643,7 +641,7 @@ static void cf_check parse_ppr_log_entry(struct amd_iommu *iommu, u32 entry[])
>>       struct pci_dev *pdev;
>>
>>       pcidevs_lock();
>> -    pdev = pci_get_real_pdev(PCI_SBDF(iommu->seg, device_id));
>> +    pdev = pci_get_real_pdev(PCI_SBDF(iommu->sbdf.seg, device_id));
>>       pcidevs_unlock();
>>
>>       if ( pdev )
>> @@ -752,12 +750,11 @@ static bool __init set_iommu_interrupt_handler(struct amd_iommu *iommu)
>>       }
>>
>>       pcidevs_lock();
>> -    iommu->msi.dev = pci_get_pdev(NULL, PCI_SBDF(iommu->seg, iommu->bdf));
>> +    iommu->msi.dev = pci_get_pdev(NULL, iommu->sbdf);
>>       pcidevs_unlock();
>>       if ( !iommu->msi.dev )
>>       {
>> -        AMD_IOMMU_WARN("no pdev for %pp\n",
>> -                       &PCI_SBDF(iommu->seg, iommu->bdf));
>> +        AMD_IOMMU_WARN("no pdev for %pp\n", &iommu->sbdf);
>>           return 0;
>>       }
>>
>> @@ -779,7 +776,7 @@ static bool __init set_iommu_interrupt_handler(struct amd_iommu *iommu)
>>           hw_irq_controller *handler;
>>           u16 control;
>>
>> -        control = pci_conf_read16(PCI_SBDF(iommu->seg, iommu->bdf),
>> +        control = pci_conf_read16(iommu->sbdf,
>>                                     iommu->msi.msi_attrib.pos + PCI_MSI_FLAGS);
>>
>>           iommu->msi.msi.nvec = 1;
>> @@ -843,22 +840,22 @@ static void amd_iommu_erratum_746_workaround(struct amd_iommu *iommu)
>>            (boot_cpu_data.x86_model > 0x1f) )
>>           return;
>>
>> -    pci_conf_write32(PCI_SBDF(iommu->seg, iommu->bdf), 0xf0, 0x90);
>> -    value = pci_conf_read32(PCI_SBDF(iommu->seg, iommu->bdf), 0xf4);
>> +    pci_conf_write32(iommu->sbdf, 0xf0, 0x90);
>> +    value = pci_conf_read32(iommu->sbdf, 0xf4);
>>
>>       if ( value & (1 << 2) )
>>           return;
>>
>>       /* Select NB indirect register 0x90 and enable writing */
>> -    pci_conf_write32(PCI_SBDF(iommu->seg, iommu->bdf), 0xf0, 0x90 | (1 << 8));
>> +    pci_conf_write32(iommu->sbdf, 0xf0, 0x90 | (1 << 8));
>>
>> -    pci_conf_write32(PCI_SBDF(iommu->seg, iommu->bdf), 0xf4, value | (1 << 2));
>> +    pci_conf_write32(iommu->sbdf, 0xf4, value | (1 << 2));
>>       printk(XENLOG_INFO
>>              "AMD-Vi: Applying erratum 746 workaround for IOMMU at %pp\n",
>> -           &PCI_SBDF(iommu->seg, iommu->bdf));
>> +           &iommu->sbdf);
>>
>>       /* Clear the enable writing bit */
>> -    pci_conf_write32(PCI_SBDF(iommu->seg, iommu->bdf), 0xf0, 0x90);
>> +    pci_conf_write32(iommu->sbdf, 0xf0, 0x90);
>>   }
>>
>>   static void enable_iommu(struct amd_iommu *iommu)
>> @@ -1095,7 +1092,7 @@ static int __init amd_iommu_init_one(struct amd_iommu *iommu, bool intr)
>>           goto error_out;
>>
>>       /* Make sure that the device table has been successfully allocated. */
>> -    ivrs_mappings = get_ivrs_mappings(iommu->seg);
>> +    ivrs_mappings = get_ivrs_mappings(iommu->sbdf.seg);
>>       if ( !IVRS_MAPPINGS_DEVTAB(ivrs_mappings) )
>>           goto error_out;
>>
>> @@ -1363,7 +1360,7 @@ static bool __init amd_sp5100_erratum28(void)
>>
>>   static int __init amd_iommu_prepare_one(struct amd_iommu *iommu)
>>   {
>> -    int rc = alloc_ivrs_mappings(iommu->seg);
>> +    int rc = alloc_ivrs_mappings(iommu->sbdf.seg);
>>
>>       if ( !rc )
>>           rc = map_iommu_mmio_region(iommu);
>> diff --git a/xen/drivers/passthrough/amd/iommu_intr.c b/xen/drivers/passthrough/amd/iommu_intr.c
>> index 9abdc38053..a7347fcbad 100644
>> --- a/xen/drivers/passthrough/amd/iommu_intr.c
>> +++ b/xen/drivers/passthrough/amd/iommu_intr.c
>> @@ -132,7 +132,7 @@ static int get_intremap_requestor_id(int seg, int bdf)
>>   static unsigned int alloc_intremap_entry(const struct amd_iommu *iommu,
>>                                            unsigned int bdf, unsigned int nr)
>>   {
>> -    const struct ivrs_mappings *ivrs_mappings = get_ivrs_mappings(iommu->seg);
>> +    const struct ivrs_mappings *ivrs_mappings = get_ivrs_mappings(iommu->sbdf.seg);
>>       unsigned long *inuse = ivrs_mappings[bdf].intremap_inuse;
>>       unsigned int nr_ents =
>>           intremap_table_entries(ivrs_mappings[bdf].intremap_table, iommu);
>> @@ -167,7 +167,7 @@ static union irte_ptr get_intremap_entry(const struct amd_iommu *iommu,
>>                                            unsigned int bdf, unsigned int index)
>>   {
>>       union irte_ptr table = {
>> -        .ptr = get_ivrs_mappings(iommu->seg)[bdf].intremap_table
>> +        .ptr = get_ivrs_mappings(iommu->sbdf.seg)[bdf].intremap_table
>>       };
>>
>>       ASSERT(table.ptr && (index < intremap_table_entries(table.ptr, iommu)));
>> @@ -184,7 +184,7 @@ static void free_intremap_entry(const struct amd_iommu *iommu,
>>                                   unsigned int bdf, unsigned int index)
>>   {
>>       union irte_ptr entry = get_intremap_entry(iommu, bdf, index);
>> -    struct ivrs_mappings *ivrs = get_ivrs_mappings(iommu->seg);
>> +    struct ivrs_mappings *ivrs = get_ivrs_mappings(iommu->sbdf.seg);
>>
>>       if ( iommu->ctrl.ga_en )
>>       {
>> @@ -281,8 +281,8 @@ static int update_intremap_entry_from_ioapic(
>>       unsigned int dest, offset;
>>       bool fresh = false;
>>
>> -    req_id = get_intremap_requestor_id(iommu->seg, bdf);
>> -    lock = get_intremap_lock(iommu->seg, req_id);
>> +    req_id = get_intremap_requestor_id(iommu->sbdf.seg, bdf);
>> +    lock = get_intremap_lock(iommu->sbdf.seg, req_id);
>>
>>       delivery_mode = rte->delivery_mode;
>>       vector = rte->vector;
>> @@ -419,10 +419,10 @@ static int update_intremap_entry_from_msi_msg(
>>       unsigned int dest, offset, i;
>>       bool fresh = false;
>>
>> -    req_id = get_dma_requestor_id(iommu->seg, bdf);
>> -    alias_id = get_intremap_requestor_id(iommu->seg, bdf);
>> +    req_id = get_dma_requestor_id(iommu->sbdf.seg, bdf);
>> +    alias_id = get_intremap_requestor_id(iommu->sbdf.seg, bdf);
>>
>> -    lock = get_intremap_lock(iommu->seg, req_id);
>> +    lock = get_intremap_lock(iommu->sbdf.seg, req_id);
>>       spin_lock_irqsave(lock, flags);
>>
>>       if ( msg == NULL )
>> @@ -486,10 +486,10 @@ static int update_intremap_entry_from_msi_msg(
>>        */
>>
>>       if ( ( req_id != alias_id ) &&
>> -         get_ivrs_mappings(iommu->seg)[alias_id].intremap_table != NULL )
>> +         get_ivrs_mappings(iommu->sbdf.seg)[alias_id].intremap_table != NULL )
>>       {
>> -        BUG_ON(get_ivrs_mappings(iommu->seg)[req_id].intremap_table !=
>> -               get_ivrs_mappings(iommu->seg)[alias_id].intremap_table);
>> +        BUG_ON(get_ivrs_mappings(iommu->sbdf.seg)[req_id].intremap_table !=
>> +               get_ivrs_mappings(iommu->sbdf.seg)[alias_id].intremap_table);
>>       }
>>
>>       return fresh;
>> @@ -498,16 +498,17 @@ static int update_intremap_entry_from_msi_msg(
>>   static struct amd_iommu *_find_iommu_for_device(int seg, int bdf)
>>   {
>>       struct amd_iommu *iommu;
>> +    pci_sbdf_t sbdf = PCI_SBDF(seg, bdf);
>>
>>       for_each_amd_iommu ( iommu )
>> -        if ( iommu->seg == seg && iommu->bdf == bdf )
>> +        if ( iommu->sbdf.sbdf == sbdf.sbdf )
>>               return NULL;
>>
>>       iommu = find_iommu_for_device(seg, bdf);
>>       if ( iommu )
>>           return iommu;
>>
>> -    AMD_IOMMU_DEBUG("No IOMMU for MSI dev = %pp\n", &PCI_SBDF(seg, bdf));
>> +    AMD_IOMMU_DEBUG("No IOMMU for MSI dev = %pp\n", &sbdf);
>>       return ERR_PTR(-EINVAL);
>>   }
>>
>> @@ -730,7 +731,7 @@ static void dump_intremap_table(const struct amd_iommu *iommu,
>>           if ( ivrs_mapping )
>>           {
>>               printk("  %pp:\n",
>> -                   &PCI_SBDF(iommu->seg, ivrs_mapping->dte_requestor_id));
>> +                   &PCI_SBDF(iommu->sbdf.seg, ivrs_mapping->dte_requestor_id));
>>               ivrs_mapping = NULL;
>>           }
>>
>> diff --git a/xen/drivers/passthrough/amd/iommu_map.c b/xen/drivers/passthrough/amd/iommu_map.c
>> index dde393645a..d28c475650 100644
>> --- a/xen/drivers/passthrough/amd/iommu_map.c
>> +++ b/xen/drivers/passthrough/amd/iommu_map.c
>> @@ -558,14 +558,14 @@ void amd_iommu_print_entries(const struct amd_iommu *iommu, unsigned int dev_id,
>>
>>       if ( !dt[dev_id].tv )
>>       {
>> -        printk("%pp: no root\n", &PCI_SBDF(iommu->seg, dev_id));
>> +        printk("%pp: no root\n", &PCI_SBDF(iommu->sbdf.seg, dev_id));
>>           return;
>>       }
>>
>>       pt_mfn = _mfn(dt[dev_id].pt_root);
>>       level = dt[dev_id].paging_mode;
>>       printk("%pp root @ %"PRI_mfn" (%u levels) dfn=%"PRI_dfn"\n",
>> -           &PCI_SBDF(iommu->seg, dev_id), mfn_x(pt_mfn), level, dfn_x(dfn));
>> +           &PCI_SBDF(iommu->sbdf.seg, dev_id), mfn_x(pt_mfn), level, dfn_x(dfn));
>>
>>       while ( level )
>>       {
>> diff --git a/xen/drivers/passthrough/amd/pci_amd_iommu.c b/xen/drivers/passthrough/amd/pci_amd_iommu.c
>> index d00697edb3..6b58e3380b 100644
>> --- a/xen/drivers/passthrough/amd/pci_amd_iommu.c
>> +++ b/xen/drivers/passthrough/amd/pci_amd_iommu.c
>> @@ -43,7 +43,7 @@ struct amd_iommu *find_iommu_for_device(int seg, int bdf)
>>       {
>>           unsigned int bd0 = bdf & ~PCI_FUNC(~0);
>>
>> -        if ( ivrs_mappings[bd0].iommu && ivrs_mappings[bd0].iommu->bdf != bdf )
>> +        if ( ivrs_mappings[bd0].iommu && ivrs_mappings[bd0].iommu->sbdf.bdf != bdf )
>>           {
>>               struct ivrs_mappings tmp = ivrs_mappings[bd0];
>>
>> @@ -121,7 +121,7 @@ static bool use_ats(
>>   {
>>       return !ivrs_dev->block_ats &&
>>              iommu_has_cap(iommu, PCI_CAP_IOTLB_SHIFT) &&
>> -           pci_ats_device(iommu->seg, pdev->bus, pdev->devfn);
>> +           pci_ats_device(iommu->sbdf.seg, pdev->bus, pdev->devfn);
> Same idea about updating signature to take pci_sbdf_t.
>
>>   }
>>
>>   static int __must_check amd_iommu_setup_domain_device(
>> @@ -147,17 +147,17 @@ static int __must_check amd_iommu_setup_domain_device(
>>       if ( rc )
>>           return rc;
>>
>> -    req_id = get_dma_requestor_id(iommu->seg, pdev->sbdf.bdf);
>> -    ivrs_dev = &get_ivrs_mappings(iommu->seg)[req_id];
>> +    req_id = get_dma_requestor_id(iommu->sbdf.seg, pdev->sbdf.bdf);
>> +    ivrs_dev = &get_ivrs_mappings(iommu->sbdf.seg)[req_id];
>>       sr_flags = (iommu_hwdom_passthrough && is_hardware_domain(domain)
>>                   ? 0 : SET_ROOT_VALID)
>>                  | (ivrs_dev->unity_map ? SET_ROOT_WITH_UNITY_MAP : 0);
>>
>>       /* get device-table entry */
>> -    req_id = get_dma_requestor_id(iommu->seg, PCI_BDF(bus, devfn));
>> +    req_id = get_dma_requestor_id(iommu->sbdf.seg, PCI_BDF(bus, devfn));
>>       table = iommu->dev_table.buffer;
>>       dte = &table[req_id];
>> -    ivrs_dev = &get_ivrs_mappings(iommu->seg)[req_id];
>> +    ivrs_dev = &get_ivrs_mappings(iommu->sbdf.seg)[req_id];
>>
>>       if ( domain != dom_io )
>>       {
>> @@ -275,7 +275,7 @@ static int __must_check amd_iommu_setup_domain_device(
>>       ASSERT(pcidevs_locked());
>>
>>       if ( use_ats(pdev, iommu, ivrs_dev) &&
>> -         !pci_ats_enabled(iommu->seg, bus, pdev->devfn) )
>> +         !pci_ats_enabled(iommu->sbdf.seg, bus, pdev->devfn) )
> ... and same for pci_ats_enabled()
>
>>       {
>>           if ( devfn == pdev->devfn )
>>               enable_ats_device(pdev, &iommu->ats_devices);
>> @@ -418,12 +418,12 @@ static void amd_iommu_disable_domain_device(const struct domain *domain,
>>
>>       ASSERT(pcidevs_locked());
>>
>> -    if ( pci_ats_device(iommu->seg, bus, pdev->devfn) &&
>> -         pci_ats_enabled(iommu->seg, bus, pdev->devfn) )
>> +    if ( pci_ats_device(iommu->sbdf.seg, bus, pdev->devfn) &&
>> +         pci_ats_enabled(iommu->sbdf.seg, bus, pdev->devfn) )
>>           disable_ats_device(pdev);
>>
>>       BUG_ON ( iommu->dev_table.buffer == NULL );
>> -    req_id = get_dma_requestor_id(iommu->seg, PCI_BDF(bus, devfn));
>> +    req_id = get_dma_requestor_id(iommu->sbdf.seg, PCI_BDF(bus, devfn));
>>       table = iommu->dev_table.buffer;
>>       dte = &table[req_id];
>>
>> @@ -578,7 +578,7 @@ static int cf_check amd_iommu_add_device(u8 devfn, struct pci_dev *pdev)
>>           return -EINVAL;
>>
>>       for_each_amd_iommu(iommu)
>> -        if ( pdev->seg == iommu->seg && pdev->sbdf.bdf == iommu->bdf )
>> +        if ( pdev->sbdf.sbdf == iommu->sbdf.sbdf )
>>               return is_hardware_domain(pdev->domain) ? 0 : -ENODEV;
>>
>>       iommu = find_iommu_for_device(pdev->seg, pdev->sbdf.bdf);
>> --
>> 2.49.0
>>
>>
I'll leave pci_ats_device and similar functions from directories above 
passthrough/amd for the next cleanup in a separate patch. Will change 
local functions like get_iommu.*_capabilities and resend.


Thank you!



From xen-devel-bounces@lists.xenproject.org Tue Apr 15 07:58:00 2025
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Date: Tue, 15 Apr 2025 07:57:47 +0000
To: Anthony PERARD 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, Roger Pau Monne , Anthony PERARD 
Subject: Re: [XEN PATCH] tools/tests: Fix newly introduced Makefile
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In-Reply-To: <20250414141714.10166-1-anthony@xenproject.org>
References: <20250414141714.10166-1-anthony@xenproject.org>
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On Mon, Apr 14, 2025 at 04:17:14PM +0200, Anthony PERARD wrote:
> From: Anthony PERARD 
>=20
> Fix few issue with this new directory:
> - clean generated files
> - and ignore those generated files
> - include the dependency files generated by `gcc`.
> - rework prerequisites:
>   "test-rangeset.o" also needs the generated files "list.h" and
>   "rangeset.h". Technically, both only needs "harness.h" which needs
>   the generated headers, but that's a bit simpler and the previous
>   point will add the dependency on "harness.h" automatically.
>=20
> This last point fix an issue where `make` might decide to build
> "test-rangeset.o" before the other files are ready.
>=20
> Fixes: 7bf777b42cad ("tootls/tests: introduce unit tests for rangesets")
> Signed-off-by: Anthony PERARD 

Reviewed-by: Denis Mukhin 

> ---
>=20
> Make doesn't needs the *.h to generated the .c. So removing that
> prerequisite means make can generate all 3 at the same time.
> ---
>  tools/tests/rangeset/.gitignore | 4 ++++
>  tools/tests/rangeset/Makefile   | 8 ++++++--
>  2 files changed, 10 insertions(+), 2 deletions(-)
>  create mode 100644 tools/tests/rangeset/.gitignore
>=20
> diff --git a/tools/tests/rangeset/.gitignore b/tools/tests/rangeset/.giti=
gnore
> new file mode 100644
> index 0000000000..cdeb778535
> --- /dev/null
> +++ b/tools/tests/rangeset/.gitignore
> @@ -0,0 +1,4 @@
> +/list.h
> +/rangeset.c
> +/rangeset.h
> +/test-rangeset
> diff --git a/tools/tests/rangeset/Makefile b/tools/tests/rangeset/Makefil=
e
> index 70076eff34..3dafcbd054 100644
> --- a/tools/tests/rangeset/Makefile
> +++ b/tools/tests/rangeset/Makefile
> @@ -12,7 +12,7 @@ run: $(TARGET)
>=20
>  .PHONY: clean
>  clean:
> -=09$(RM) -- *.o $(TARGET) $(DEPS_RM)
> +=09$(RM) -- *.o $(TARGET) $(DEPS_RM) list.h rangeset.h rangeset.c
>=20
>  .PHONY: distclean
>  distclean: clean
> @@ -32,7 +32,7 @@ rangeset.h: $(XEN_ROOT)/xen/include/xen/rangeset.h
>  list.h rangeset.h:
>  =09sed -e '/#include/d' <$< >$@
>=20
> -rangeset.c: $(XEN_ROOT)/xen/common/rangeset.c list.h rangeset.h
> +rangeset.c: $(XEN_ROOT)/xen/common/rangeset.c
>  =09# Remove includes and add the test harness header
>  =09sed -e '/#include/d' -e '1s/^/#include "harness.h"/' <$< >$@
>=20
> @@ -42,5 +42,9 @@ CFLAGS +=3D $(CFLAGS_xeninclude)
>=20
>  LDFLAGS +=3D $(APPEND_LDFLAGS)
>=20
> +test-rangeset.o rangeset.o: list.h rangeset.h
> +
>  test-rangeset: rangeset.o test-rangeset.o
>  =09$(CC) $^ -o $@ $(LDFLAGS)
> +
> +-include $(DEPS_INCLUDE)
> --
> Anthony PERARD
>=20
>=20



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From: Luca Fancellu 
To: Ayan Kumar Halder 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Michal Orzel ,
	Volodymyr Babchuk 
Subject: Re: [PATCH v7 0/3] Enable early bootup of Armv8-R AArch32 systems
Thread-Topic: [PATCH v7 0/3] Enable early bootup of Armv8-R AArch32 systems
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Date: Tue, 15 Apr 2025 08:05:11 +0000
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From: Luca Fancellu 
To: Julien Grall 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Bertrand Marquis
	, Michal Orzel , Volodymyr
 Babchuk 
Subject: Re: [PATCH v3 2/7] arm/mpu: Provide access to the MPU region from the
 C code
Thread-Topic: [PATCH v3 2/7] arm/mpu: Provide access to the MPU region from
 the C code
Thread-Index: AQHbqvIQLPZqfCHfmUu6hn1OCHotk7OjDmYAgAA5foCAAJw1AIAAgSKA
Date: Tue, 15 Apr 2025 08:08:55 +0000
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References: <20250411145655.140667-1-luca.fancellu@arm.com>
 <20250411145655.140667-3-luca.fancellu@arm.com>
 
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Date: Tue, 15 Apr 2025 10:34:12 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: Andrew Cooper ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH 3/5] x86/hvm: fix handling of accesses to partial r/o
 MMIO pages
Message-ID: 
References: <20250411105411.22334-1-roger.pau@citrix.com>
 <20250411105411.22334-4-roger.pau@citrix.com>
 
 
 
 
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On Tue, Apr 15, 2025 at 09:32:37AM +0200, Jan Beulich wrote:
> On 14.04.2025 18:13, Roger Pau Monné wrote:
> > On Mon, Apr 14, 2025 at 05:24:32PM +0200, Jan Beulich wrote:
> >> On 14.04.2025 15:53, Roger Pau Monné wrote:
> >>> On Mon, Apr 14, 2025 at 08:33:44AM +0200, Jan Beulich wrote:
> >>>> On 11.04.2025 12:54, Roger Pau Monne wrote:
> Independently (i.e. not for this patch) we may want to actually assert
> that npfec.present is set for P2M types where we demand that to always
> be the case. (I wouldn't be too surprised if we actually found such an
> assertion to trigger.)
> 
> >>>> I'm also concerned of e.g. VT-x'es APIC access MFN, which is
> >>>> p2m_mmio_direct.
> >>>
> >>> But that won't go into hvm_hap_nested_page_fault() when using
> >>> cpu_has_vmx_virtualize_apic_accesses (and thus having an APIC page
> >>> mapped as p2m_mmio_direct)?
> >>>
> >>> It would instead be an EXIT_REASON_APIC_ACCESS vmexit which is handled
> >>> differently?
> >>
> >> All true as long as things work as expected (potentially including the guest
> >> also behaving as expected). Also this was explicitly only an example I could
> >> readily think of. I'm simply wary of handle_mmio_with_translation() now
> >> getting things to handle it's not meant to ever see.
> > 
> > How was access to MMIO r/o regions supposed to be handled before
> > 33c19df9a5a0 (~2015)?  I see that setting r/o MMIO p2m entries was
> > added way before to p2m_type_to_flags() and ept_p2m_type_to_flags()
> > (~2010), yet I can't figure out how writes would be handled back then
> > that didn't result in a p2m fault and crashing of the domain.
> 
> Was that handled at all before said change?

Not really AFAICT, hence me wondering how where write accesses to r/o
MMIO regions supposed to be handled by (non-priv) domains.  Was the
expectation that those writes trigger an p2m violation thus crashing
the domain?

> mmio_ro_do_page_fault() was
> (and still is) invoked for the hardware domain only, and quite likely
> the need for handling (discarding) writes for PVHv1 had been overlooked
> until someone was hit by the lack thereof.

I see, I didn't realize r/o MMIO was only handled for PV hardware
domains only.  I could arguably do the same for HVM in
hvm_hap_nested_page_fault().

Not sure whether the subpage stuff is supposed to be functional for
domains different than the hardware domain?  It seems to be available
to the hanrdware domain only for PV guests, while for HVM is available
for both PV and HVM domains:

is_hardware_domain(currd) || subpage_mmio_write_accept(mfn, gla)

In hvm_hap_nested_page_fault().

> > I'm happy to look at other ways to handling this, but given there's
> > current logic for handling accesses to read-only regions in
> > hvm_hap_nested_page_fault() I think re-using that was the best way to
> > also handle accesses to MMIO read-only regions.
> > 
> > Arguably it would already be the case that for other reasons Xen would
> > need to emulate an instruction that accesses a read-only MMIO region?
> 
> Aiui hvm_translate_get_page() will yield HVMTRANS_bad_gfn_to_mfn for
> p2m_mmio_direct (after all, "direct" means we expect no emulation is
> needed; while arguably wrong for the introspection case, I'm not sure
> that and pass-through actually go together). Hence it's down to
> hvmemul_linear_mmio_access() -> hvmemul_phys_mmio_access() ->
> hvmemul_do_mmio_buffer() -> hvmemul_do_io_buffer() -> hvmemul_do_io(),
> which means that if hvm_io_intercept() can't handle it, the access
> will be forwarded to the responsible DM, or be "processed" by the
> internal null handler.
> 
> Given this, perhaps what you do is actually fine. At the same time
> note how several functions in hvm/emulate.c simply fail upon
> encountering p2m_mmio_direct. These are all REP handlers though, so
> the main emulator would then try emulating the insn the non-REP way.

I'm open to alternative ways of handling such accesses, just used what
seemed more natural in the context of hvm_hap_nested_page_fault().

Emulation of r/o MMIO accesses failing wouldn't be an issue from Xen's
perspective, that would "just" result in the guest getting a #GP
injected.

Would you like me to add some of your reasoning above to the commit
message?

Thanks, Roger.


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Date: Tue, 15 Apr 2025 10:43:24 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Anthony PERARD 
Cc: xen-devel@lists.xenproject.org,
	Anthony PERARD 
Subject: Re: [XEN PATCH] tools/tests: Fix newly introduced Makefile
Message-ID: 
References: <20250414141714.10166-1-anthony@xenproject.org>
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On Mon, Apr 14, 2025 at 04:17:14PM +0200, Anthony PERARD wrote:
> From: Anthony PERARD 
> 
> Fix few issue with this new directory:
> - clean generated files
> - and ignore those generated files
> - include the dependency files generated by `gcc`.
> - rework prerequisites:
>   "test-rangeset.o" also needs the generated files "list.h" and
>   "rangeset.h". Technically, both only needs "harness.h" which needs
>   the generated headers, but that's a bit simpler and the previous
>   point will add the dependency on "harness.h" automatically.
> 
> This last point fix an issue where `make` might decide to build
> "test-rangeset.o" before the other files are ready.

Oh, I see, yes, test-rangeset.o wasn't dependent on the generated
files.

> 
> Fixes: 7bf777b42cad ("tootls/tests: introduce unit tests for rangesets")
> Signed-off-by: Anthony PERARD 

Reviewed-by: Roger Pau Monné 

> ---
> 
> Make doesn't needs the *.h to generated the .c. So removing that
> prerequisite means make can generate all 3 at the same time.
> ---
>  tools/tests/rangeset/.gitignore | 4 ++++
>  tools/tests/rangeset/Makefile   | 8 ++++++--
>  2 files changed, 10 insertions(+), 2 deletions(-)
>  create mode 100644 tools/tests/rangeset/.gitignore
> 
> diff --git a/tools/tests/rangeset/.gitignore b/tools/tests/rangeset/.gitignore
> new file mode 100644
> index 0000000000..cdeb778535
> --- /dev/null
> +++ b/tools/tests/rangeset/.gitignore
> @@ -0,0 +1,4 @@
> +/list.h
> +/rangeset.c
> +/rangeset.h
> +/test-rangeset
> diff --git a/tools/tests/rangeset/Makefile b/tools/tests/rangeset/Makefile
> index 70076eff34..3dafcbd054 100644
> --- a/tools/tests/rangeset/Makefile
> +++ b/tools/tests/rangeset/Makefile
> @@ -12,7 +12,7 @@ run: $(TARGET)
>  
>  .PHONY: clean
>  clean:
> -	$(RM) -- *.o $(TARGET) $(DEPS_RM)
> +	$(RM) -- *.o $(TARGET) $(DEPS_RM) list.h rangeset.h rangeset.c
>  
>  .PHONY: distclean
>  distclean: clean
> @@ -32,7 +32,7 @@ rangeset.h: $(XEN_ROOT)/xen/include/xen/rangeset.h
>  list.h rangeset.h:
>  	sed -e '/#include/d' <$< >$@
>  
> -rangeset.c: $(XEN_ROOT)/xen/common/rangeset.c list.h rangeset.h
> +rangeset.c: $(XEN_ROOT)/xen/common/rangeset.c
>  	# Remove includes and add the test harness header
>  	sed -e '/#include/d' -e '1s/^/#include "harness.h"/' <$< >$@
>  
> @@ -42,5 +42,9 @@ CFLAGS += $(CFLAGS_xeninclude)
>  
>  LDFLAGS += $(APPEND_LDFLAGS)
>  
> +test-rangeset.o rangeset.o: list.h rangeset.h
> +
>  test-rangeset: rangeset.o test-rangeset.o
>  	$(CC) $^ -o $@ $(LDFLAGS)
> +
> +-include $(DEPS_INCLUDE)

This include is likely also needed by vpci/Makefile?

Thanks, Roger.


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Date: Tue, 15 Apr 2025 11:25:20 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jiqian Chen 
Cc: xen-devel@lists.xenproject.org, Huang Rui 
Subject: Re: [PATCH v2 2/8] vpci/header: Emulate legacy capability list for
 host
Message-ID: 
References: <20250409064528.405573-1-Jiqian.Chen@amd.com>
 <20250409064528.405573-3-Jiqian.Chen@amd.com>
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On Wed, Apr 09, 2025 at 02:45:22PM +0800, Jiqian Chen wrote:
> Current logic of init_header() only emulates legacy capability list
> for guest, expand it to emulate for host too. So that it will be
> easy to hide a capability whose initialization fails and no need
> to distinguish host or guest.

It might be best if the initial code movement of the logic in
init_header() into it's own separate function was done as a
non-functional change, and a later patch added support for dom0.

It's easier to then spot the differences that you are adding to
support dom0.

> Signed-off-by: Jiqian Chen 
> ---
> cc: "Roger Pau Monné" 
> ---
> v1->v2 changes:
> new patch
> 
> Best regards,
> Jiqian Chen.
> ---
>  xen/drivers/vpci/header.c | 139 ++++++++++++++++++++------------------
>  1 file changed, 74 insertions(+), 65 deletions(-)
> 
> diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c
> index ef6c965c081c..0910eb940e23 100644
> --- a/xen/drivers/vpci/header.c
> +++ b/xen/drivers/vpci/header.c
> @@ -745,6 +745,76 @@ static int bar_add_rangeset(const struct pci_dev *pdev, struct vpci_bar *bar,
>      return !bar->mem ? -ENOMEM : 0;
>  }
>  
> +/* These capabilities can be exposed to the guest, that vPCI can handle. */
> +static const unsigned int guest_supported_caps[] = {
> +    PCI_CAP_ID_MSI,
> +    PCI_CAP_ID_MSIX,
> +};

Is there a reason this needs to be defined outside of the function
scope?  So far it's only used by vpci_init_capability_list().

> +
> +static int vpci_init_capability_list(struct pci_dev *pdev)
> +{
> +    int rc;
> +    bool mask_cap_list = false;
> +    bool is_hwdom = is_hardware_domain(pdev->domain);
> +    const unsigned int *caps = is_hwdom ? NULL : guest_supported_caps;
> +    const unsigned int n = is_hwdom ? 0 : ARRAY_SIZE(guest_supported_caps);
> +
> +    if ( pci_conf_read16(pdev->sbdf, PCI_STATUS) & PCI_STATUS_CAP_LIST )
> +    {
> +        unsigned int next, ttl = 48;
> +
> +        next = pci_find_next_cap_ttl(pdev->sbdf, PCI_CAPABILITY_LIST,
> +                                     caps, n, &ttl);
> +
> +        rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL,
> +                               PCI_CAPABILITY_LIST, 1,
> +                               (void *)(uintptr_t)next);
> +        if ( rc )
> +            return rc;
> +
> +        next &= ~3;
> +
> +        if ( !next && !is_hwdom )
> +            /*
> +             * If we don't have any supported capabilities to expose to the
> +             * guest, mask the PCI_STATUS_CAP_LIST bit in the status register.
> +             */
> +            mask_cap_list = true;
> +
> +        while ( next && ttl )
> +        {
> +            unsigned int pos = next;
> +
> +            next = pci_find_next_cap_ttl(pdev->sbdf, pos + PCI_CAP_LIST_NEXT,
> +                                         caps, n, &ttl);
> +
> +            rc = vpci_add_register(pdev->vpci, vpci_hw_read8, NULL,
> +                                   pos + PCI_CAP_LIST_ID, 1, NULL);

There's no need to add this handler for the hardware domain, that's
already the default behavior in that case.

Thanks, Roger.


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Date: Tue, 15 Apr 2025 11:33:31 +0200
From: Anthony PERARD 
To: Roger Pau =?iso-8859-1?Q?Monn=E9?= 
Cc: xen-devel@lists.xenproject.org,
	Anthony PERARD 
Subject: Re: [XEN PATCH] tools/tests: Fix newly introduced Makefile
Message-ID: 
References: <20250414141714.10166-1-anthony@xenproject.org>
 
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On Tue, Apr 15, 2025 at 10:43:24AM +0200, Roger Pau Monn wrote:
> On Mon, Apr 14, 2025 at 04:17:14PM +0200, Anthony PERARD wrote:
> > From: Anthony PERARD 
> > +
> > +-include $(DEPS_INCLUDE)
> 
> This include is likely also needed by vpci/Makefile?

No, because we don't build any object there, and build the binary
directly from source, for some reason. So there's no deps files been
generated.

Cheers,

-- 
Anthony PERARD


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Subject: Re: [PATCH 3/5] x86/hvm: fix handling of accesses to partial r/o MMIO
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To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
Cc: Andrew Cooper ,
 xen-devel@lists.xenproject.org,
 Marek Marczykowski 
References: <20250411105411.22334-1-roger.pau@citrix.com>
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On 15.04.2025 10:34, Roger Pau Monné wrote:
> On Tue, Apr 15, 2025 at 09:32:37AM +0200, Jan Beulich wrote:
>> On 14.04.2025 18:13, Roger Pau Monné wrote:
>>> On Mon, Apr 14, 2025 at 05:24:32PM +0200, Jan Beulich wrote:
>>>> On 14.04.2025 15:53, Roger Pau Monné wrote:
>>>>> On Mon, Apr 14, 2025 at 08:33:44AM +0200, Jan Beulich wrote:
>>>>>> I'm also concerned of e.g. VT-x'es APIC access MFN, which is
>>>>>> p2m_mmio_direct.
>>>>>
>>>>> But that won't go into hvm_hap_nested_page_fault() when using
>>>>> cpu_has_vmx_virtualize_apic_accesses (and thus having an APIC page
>>>>> mapped as p2m_mmio_direct)?
>>>>>
>>>>> It would instead be an EXIT_REASON_APIC_ACCESS vmexit which is handled
>>>>> differently?
>>>>
>>>> All true as long as things work as expected (potentially including the guest
>>>> also behaving as expected). Also this was explicitly only an example I could
>>>> readily think of. I'm simply wary of handle_mmio_with_translation() now
>>>> getting things to handle it's not meant to ever see.
>>>
>>> How was access to MMIO r/o regions supposed to be handled before
>>> 33c19df9a5a0 (~2015)?  I see that setting r/o MMIO p2m entries was
>>> added way before to p2m_type_to_flags() and ept_p2m_type_to_flags()
>>> (~2010), yet I can't figure out how writes would be handled back then
>>> that didn't result in a p2m fault and crashing of the domain.
>>
>> Was that handled at all before said change?
> 
> Not really AFAICT, hence me wondering how where write accesses to r/o
> MMIO regions supposed to be handled by (non-priv) domains.  Was the
> expectation that those writes trigger an p2m violation thus crashing
> the domain?

I think so, yes. Devices with such special areas weren't (aren't?) supposed
to be handed to DomU-s.

>> mmio_ro_do_page_fault() was
>> (and still is) invoked for the hardware domain only, and quite likely
>> the need for handling (discarding) writes for PVHv1 had been overlooked
>> until someone was hit by the lack thereof.
> 
> I see, I didn't realize r/o MMIO was only handled for PV hardware
> domains only.  I could arguably do the same for HVM in
> hvm_hap_nested_page_fault().
> 
> Not sure whether the subpage stuff is supposed to be functional for
> domains different than the hardware domain?  It seems to be available
> to the hanrdware domain only for PV guests, while for HVM is available
> for both PV and HVM domains:

DYM Dom0 and DomU here?

> is_hardware_domain(currd) || subpage_mmio_write_accept(mfn, gla)
> 
> In hvm_hap_nested_page_fault().

See the three XHCI_SHARE_* modes. When it's XHCI_SHARE_ANY, even DomU-s
would require this handling. It looks like a mistake that we permit the
path to be taken for DomU-s even when the mode is XHCI_SHARE_HWDOM. It
also looks like a mistake that the PV path has remained Dom0-only, even
in the XHCI_SHARE_ANY case. Cc-ing Marek once again ...

>>> I'm happy to look at other ways to handling this, but given there's
>>> current logic for handling accesses to read-only regions in
>>> hvm_hap_nested_page_fault() I think re-using that was the best way to
>>> also handle accesses to MMIO read-only regions.
>>>
>>> Arguably it would already be the case that for other reasons Xen would
>>> need to emulate an instruction that accesses a read-only MMIO region?
>>
>> Aiui hvm_translate_get_page() will yield HVMTRANS_bad_gfn_to_mfn for
>> p2m_mmio_direct (after all, "direct" means we expect no emulation is
>> needed; while arguably wrong for the introspection case, I'm not sure
>> that and pass-through actually go together). Hence it's down to
>> hvmemul_linear_mmio_access() -> hvmemul_phys_mmio_access() ->
>> hvmemul_do_mmio_buffer() -> hvmemul_do_io_buffer() -> hvmemul_do_io(),
>> which means that if hvm_io_intercept() can't handle it, the access
>> will be forwarded to the responsible DM, or be "processed" by the
>> internal null handler.
>>
>> Given this, perhaps what you do is actually fine. At the same time
>> note how several functions in hvm/emulate.c simply fail upon
>> encountering p2m_mmio_direct. These are all REP handlers though, so
>> the main emulator would then try emulating the insn the non-REP way.
> 
> I'm open to alternative ways of handling such accesses, just used what
> seemed more natural in the context of hvm_hap_nested_page_fault().
> 
> Emulation of r/o MMIO accesses failing wouldn't be an issue from Xen's
> perspective, that would "just" result in the guest getting a #GP
> injected.

That's not the part I'm worried about. What worries me is that we open up
another (or better: we're widening a) way to hit the emulator in the first
place. (Plus, as said, the issue with the not really tidy P2M type system.)

> Would you like me to add some of your reasoning above to the commit
> message?

While I'd still be a little hesitant as to ack-ing of the result, I think
that's all I'm really asking for, yes.

Jan


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Date: Tue, 15 Apr 2025 11:42:30 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jiqian Chen 
Cc: xen-devel@lists.xenproject.org, Huang Rui 
Subject: Re: [PATCH v2 3/8] vpci/header: Emulate extended capability list for
 host
Message-ID: 
References: <20250409064528.405573-1-Jiqian.Chen@amd.com>
 <20250409064528.405573-4-Jiqian.Chen@amd.com>
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In-Reply-To: <20250409064528.405573-4-Jiqian.Chen@amd.com>

On Wed, Apr 09, 2025 at 02:45:23PM +0800, Jiqian Chen wrote:
> Add a new function to emulate extended capability list for host,
> and call it in init_header(). So that, it will be easy to hide
> a capability whose initialization fails.
> 
> As for the extended capability list of guest, keep hiding it.
> 
> Signed-off-by: Jiqian Chen 
> ---
> cc: "Roger Pau Monné" 
> ---
> v1->v2 changes:
> new patch
> 
> Best regards,
> Jiqian Chen.
> ---
>  xen/drivers/vpci/header.c | 44 ++++++++++++++++++++++++++++++++-------
>  1 file changed, 36 insertions(+), 8 deletions(-)
> 
> diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c
> index 0910eb940e23..6833d456566b 100644
> --- a/xen/drivers/vpci/header.c
> +++ b/xen/drivers/vpci/header.c
> @@ -815,6 +815,39 @@ static int vpci_init_capability_list(struct pci_dev *pdev)
>      return rc;
>  }
>  
> +static int vpci_init_ext_capability_list(struct pci_dev *pdev)
> +{
> +    int rc;
> +    u32 header;

uint32_t would be preferred.

> +    unsigned int pos = 0x100U, ttl = 480;
> +
> +    if ( !is_hardware_domain(pdev->domain) )
> +    {
> +        /* Extended capabilities read as zero, write ignore */
> +        rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL,
> +                               pos, 4, (void *)0);
> +        if ( rc )
> +            return rc;

I think you want to unconditionally return here, otherwise you will
most likely add a duplicated handler over "pos" when going inside the
loop below?

Also for domU we don't want to expose any extended capabilities yet.

> +    }
> +
> +    while ( pos && ttl-- )
> +    {
> +        header = pci_conf_read32(pdev->sbdf, pos);
> +
> +        rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL,

You don't want to pass NULL here, as that would prevent dom0 from
writing to the register, you instead want to pass vpci_hw_write32 I
think.

> +                               pos, 4, (void *)(uintptr_t)header);
> +        if ( rc )
> +            return rc;
> +
> +        if ( (header == 0) || (header == -1) )
> +            return 0;
> +
> +        pos = PCI_EXT_CAP_NEXT(header);

Don't you need to check that pos >= 0x100?  Possibly done in the while
loop condition: while ( pos >= 0x100 && ... )

Thanks, Roger.


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MIME-Version: 1.0
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Subject: Re: [PATCH v2 3/8] vpci/header: Emulate extended capability list for
 host
To: Jiqian Chen 
Cc: Huang Rui , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , xen-devel@lists.xenproject.org
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In-Reply-To: <20250409064528.405573-4-Jiqian.Chen@amd.com>
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On 09.04.2025 08:45, Jiqian Chen wrote:
> --- a/xen/drivers/vpci/header.c
> +++ b/xen/drivers/vpci/header.c
> @@ -815,6 +815,39 @@ static int vpci_init_capability_list(struct pci_dev *pdev)
>      return rc;
>  }
>  
> +static int vpci_init_ext_capability_list(struct pci_dev *pdev)
> +{
> +    int rc;
> +    u32 header;
> +    unsigned int pos = 0x100U, ttl = 480;
> +
> +    if ( !is_hardware_domain(pdev->domain) )
> +    {
> +        /* Extended capabilities read as zero, write ignore */
> +        rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL,
> +                               pos, 4, (void *)0);
> +        if ( rc )
> +            return rc;
> +    }
> +
> +    while ( pos && ttl-- )
> +    {
> +        header = pci_conf_read32(pdev->sbdf, pos);
> +
> +        rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL,
> +                               pos, 4, (void *)(uintptr_t)header);
> +        if ( rc )
> +            return rc;
> +
> +        if ( (header == 0) || (header == -1) )
> +            return 0;

I realize pci_find_next_ext_capability() also has such a check, but even
there it's not really clear to me why compare not only against 0, but also
again -1 (aka ~0).

Jan


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Date: Tue, 15 Apr 2025 12:04:03 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: Andrew Cooper ,
	xen-devel@lists.xenproject.org,
	Marek Marczykowski 
Subject: Re: [PATCH 3/5] x86/hvm: fix handling of accesses to partial r/o
 MMIO pages
Message-ID: 
References: <20250411105411.22334-1-roger.pau@citrix.com>
 <20250411105411.22334-4-roger.pau@citrix.com>
 
 
 
 
 <7c3c91d9-4de8-4910-b26e-8782a0f0d364@suse.com>
 
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On Tue, Apr 15, 2025 at 11:41:27AM +0200, Jan Beulich wrote:
> On 15.04.2025 10:34, Roger Pau Monné wrote:
> > On Tue, Apr 15, 2025 at 09:32:37AM +0200, Jan Beulich wrote:
> >> On 14.04.2025 18:13, Roger Pau Monné wrote:
> >>> On Mon, Apr 14, 2025 at 05:24:32PM +0200, Jan Beulich wrote:
> >>>> On 14.04.2025 15:53, Roger Pau Monné wrote:
> >>>>> On Mon, Apr 14, 2025 at 08:33:44AM +0200, Jan Beulich wrote:
> >>>>>> I'm also concerned of e.g. VT-x'es APIC access MFN, which is
> >>>>>> p2m_mmio_direct.
> >>>>>
> >>>>> But that won't go into hvm_hap_nested_page_fault() when using
> >>>>> cpu_has_vmx_virtualize_apic_accesses (and thus having an APIC page
> >>>>> mapped as p2m_mmio_direct)?
> >>>>>
> >>>>> It would instead be an EXIT_REASON_APIC_ACCESS vmexit which is handled
> >>>>> differently?
> >>>>
> >>>> All true as long as things work as expected (potentially including the guest
> >>>> also behaving as expected). Also this was explicitly only an example I could
> >>>> readily think of. I'm simply wary of handle_mmio_with_translation() now
> >>>> getting things to handle it's not meant to ever see.
> >>>
> >>> How was access to MMIO r/o regions supposed to be handled before
> >>> 33c19df9a5a0 (~2015)?  I see that setting r/o MMIO p2m entries was
> >>> added way before to p2m_type_to_flags() and ept_p2m_type_to_flags()
> >>> (~2010), yet I can't figure out how writes would be handled back then
> >>> that didn't result in a p2m fault and crashing of the domain.
> >>
> >> Was that handled at all before said change?
> > 
> > Not really AFAICT, hence me wondering how where write accesses to r/o
> > MMIO regions supposed to be handled by (non-priv) domains.  Was the
> > expectation that those writes trigger an p2m violation thus crashing
> > the domain?
> 
> I think so, yes. Devices with such special areas weren't (aren't?) supposed
> to be handed to DomU-s.

Oh, I see.  That makes stuff a bit clearer.  I think we would then
also want to add some checks to {ept_}p2m_type_to_flags()?

I wonder why handling of mmio_ro_ranges was added to the HVM p2m code
in ~2010 then.  If mmio_ro_ranges is only supposed to be relevant for
the hardware domain in ~2010 an HVM dom0 was not even in sight?

Sorry to ask so many questions, I'm a bit confused about how this
was/is supposed to work.

> >> mmio_ro_do_page_fault() was
> >> (and still is) invoked for the hardware domain only, and quite likely
> >> the need for handling (discarding) writes for PVHv1 had been overlooked
> >> until someone was hit by the lack thereof.
> > 
> > I see, I didn't realize r/o MMIO was only handled for PV hardware
> > domains only.  I could arguably do the same for HVM in
> > hvm_hap_nested_page_fault().
> > 
> > Not sure whether the subpage stuff is supposed to be functional for
> > domains different than the hardware domain?  It seems to be available
> > to the hanrdware domain only for PV guests, while for HVM is available
> > for both PV and HVM domains:
> 
> DYM Dom0 and DomU here?

Indeed, sorry.

> > is_hardware_domain(currd) || subpage_mmio_write_accept(mfn, gla)
> > 
> > In hvm_hap_nested_page_fault().
> 
> See the three XHCI_SHARE_* modes. When it's XHCI_SHARE_ANY, even DomU-s
> would require this handling. It looks like a mistake that we permit the
> path to be taken for DomU-s even when the mode is XHCI_SHARE_HWDOM.

Arguable a domU will never get the device assigned in the first place
unless the share mode is set to XHCI_SHARE_ANY.  For the other modes
the device is hidden, and hence couldn't be assigned to a domU anyway.

> It
> also looks like a mistake that the PV path has remained Dom0-only, even
> in the XHCI_SHARE_ANY case. Cc-ing Marek once again ...
> 
> >>> I'm happy to look at other ways to handling this, but given there's
> >>> current logic for handling accesses to read-only regions in
> >>> hvm_hap_nested_page_fault() I think re-using that was the best way to
> >>> also handle accesses to MMIO read-only regions.
> >>>
> >>> Arguably it would already be the case that for other reasons Xen would
> >>> need to emulate an instruction that accesses a read-only MMIO region?
> >>
> >> Aiui hvm_translate_get_page() will yield HVMTRANS_bad_gfn_to_mfn for
> >> p2m_mmio_direct (after all, "direct" means we expect no emulation is
> >> needed; while arguably wrong for the introspection case, I'm not sure
> >> that and pass-through actually go together). Hence it's down to
> >> hvmemul_linear_mmio_access() -> hvmemul_phys_mmio_access() ->
> >> hvmemul_do_mmio_buffer() -> hvmemul_do_io_buffer() -> hvmemul_do_io(),
> >> which means that if hvm_io_intercept() can't handle it, the access
> >> will be forwarded to the responsible DM, or be "processed" by the
> >> internal null handler.
> >>
> >> Given this, perhaps what you do is actually fine. At the same time
> >> note how several functions in hvm/emulate.c simply fail upon
> >> encountering p2m_mmio_direct. These are all REP handlers though, so
> >> the main emulator would then try emulating the insn the non-REP way.
> > 
> > I'm open to alternative ways of handling such accesses, just used what
> > seemed more natural in the context of hvm_hap_nested_page_fault().
> > 
> > Emulation of r/o MMIO accesses failing wouldn't be an issue from Xen's
> > perspective, that would "just" result in the guest getting a #GP
> > injected.
> 
> That's not the part I'm worried about. What worries me is that we open up
> another (or better: we're widening a) way to hit the emulator in the first
> place. (Plus, as said, the issue with the not really tidy P2M type system.)

But the hit would be limited to domains having r/o p2m_mmio_direct
entries in the p2m, as otherwise the path would be unreachable?

> > Would you like me to add some of your reasoning above to the commit
> > message?
> 
> While I'd still be a little hesitant as to ack-ing of the result, I think
> that's all I'm really asking for, yes.

As said before - I'm happy to consider suggestions here, I don't want
to fix this with yet another bodge that will cause us further issues
down the road.  What I proposed seemed like the most natural way to
handle those accesses IMO, but I'm not an expert on the emulator.

Thanks, Roger.


From xen-devel-bounces@lists.xenproject.org Tue Apr 15 10:07:23 2025
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CC: "xen-devel@lists.xenproject.org" , "Huang,
 Ray" , "Chen, Jiqian" 
Subject: Re: [PATCH v2 2/8] vpci/header: Emulate legacy capability list for
 host
Thread-Topic: [PATCH v2 2/8] vpci/header: Emulate legacy capability list for
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Date: Tue, 15 Apr 2025 10:07:14 +0000
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Subject: Re: [PATCH v4] xen/riscv: Increase XEN_VIRT_SIZE
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
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On 14.04.2025 17:56, Oleksii Kurochko wrote:
> --- a/xen/arch/riscv/mm.c
> +++ b/xen/arch/riscv/mm.c
> @@ -31,20 +31,30 @@ unsigned long __ro_after_init phys_offset; /* = load_start - XEN_VIRT_START */
>  #define LOAD_TO_LINK(addr) ((unsigned long)(addr) - phys_offset)
>  
>  /*
> - * It is expected that Xen won't be more then 2 MB.
> + * It is expected that Xen won't be more then XEN_VIRT_SIZE.
>   * The check in xen.lds.S guarantees that.
> - * At least 3 page tables (in case of Sv39 ) are needed to cover 2 MB.
> - * One for each page level table with PAGE_SIZE = 4 Kb.
>   *
> - * One L0 page table can cover 2 MB(512 entries of one page table * PAGE_SIZE).
> + * Root page table is shared with the initial mapping and is declared
> + * separately. (look at stage1_pgtbl_root)
>   *
> - * It might be needed one more page table in case when Xen load address
> - * isn't 2 MB aligned.
> + * An amount of page tables between root page table and L0 page table
> + * (in the case of Sv39 it covers L1 table):
> + *   (CONFIG_PAGING_LEVELS - 2) are needed for an identity mapping and
> + *   the same amount are needed for Xen.
>   *
> - * CONFIG_PAGING_LEVELS page tables are needed for the identity mapping,
> - * except that the root page table is shared with the initial mapping
> + * An amount of L0 page tables:
> + *   (512 entries of one L0 page table covers 2MB == 1< + *   XEN_VIRT_SIZE >> XEN_PT_LEVEL_SHIFT(1) are needed for Xen and
> + *   one L0 is needed for identity mapping.
>   */
> -#define PGTBL_INITIAL_COUNT ((CONFIG_PAGING_LEVELS - 1) * 2 + 1)
> +#define PGTBL_INITIAL_COUNT ((CONFIG_PAGING_LEVELS - 2) * 2 + \
> +                             (XEN_VIRT_SIZE >> XEN_PT_LEVEL_SHIFT(1)) + 1)

I'm still struggling here. In the original expression, the +1 was to cover
the root page table, wasn't it? By now subtracting 2 from
CONFIG_PAGING_LEVELS, you reduce the overall result by 2. One of these two
is accounted for by the Xen size calculation now. Where's the other one?
Or are you suggesting that for some (not obvious to me) reason we
previously calculated one too many?

> +/* Changing these checks can require an update of PGTBL_INITIAL_COUNT */
> +_Static_assert(IS_ALIGNED(XEN_VIRT_START, GB(1)),
> +               "XEN_VIRT_START should be 1gb aligned");
> +_Static_assert(IS_ALIGNED(XEN_VIRT_SIZE, MB(2)),
> +               "XEN_VIRT_SIZE should be 2mb aligned");

Why would you need to open-code BUILD_BUG_ON() here? See the various
build_assertions() functions we've accumulated.

Jan


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Subject: Re: [PATCH v2 2/8] vpci/header: Emulate legacy capability list for
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To: "Chen, Jiqian" 
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On 15.04.2025 12:07, Chen, Jiqian wrote:
> On 2025/4/15 17:25, Roger Pau Monné wrote:
>> On Wed, Apr 09, 2025 at 02:45:22PM +0800, Jiqian Chen wrote:
>>> --- a/xen/drivers/vpci/header.c
>>> +++ b/xen/drivers/vpci/header.c
>>> @@ -745,6 +745,76 @@ static int bar_add_rangeset(const struct pci_dev *pdev, struct vpci_bar *bar,
>>>      return !bar->mem ? -ENOMEM : 0;
>>>  }
>>>  
>>> +/* These capabilities can be exposed to the guest, that vPCI can handle. */
>>> +static const unsigned int guest_supported_caps[] = {
>>> +    PCI_CAP_ID_MSI,
>>> +    PCI_CAP_ID_MSIX,
>>> +};
>>
>> Is there a reason this needs to be defined outside of the function
>> scope?  So far it's only used by vpci_init_capability_list().
> Because, for dom0 I don't need to pass this array, so I need to set below parameter "caps" to be NULL or guest_supported_caps according to the type of domain.
> If inside the function, I can't to do that since "caps" is const, I think.

Why would the more narrow scope of the array affect how it can be used?

Jan


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Date: Tue, 15 Apr 2025 19:08:51 +0900
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Subject: Re: [PATCH v3 2/7] arm/mpu: Provide access to the MPU region from the
 C code
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To: Luca Fancellu 
Cc: "xen-devel@lists.xenproject.org" ,
 Stefano Stabellini ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk 
References: <20250411145655.140667-1-luca.fancellu@arm.com>
 <20250411145655.140667-3-luca.fancellu@arm.com>
 
 <1A24757A-ECCB-4080-B370-DA44D469CC7D@arm.com>
 <6a681c92-8c61-43f5-b266-b0306bc0b1ce@xen.org>
 <72B2783C-AF90-4154-8EF9-4F81A0A537B2@arm.com>
From: Julien Grall 
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On 15/04/2025 17:08, Luca Fancellu wrote:
> Hi Julien,
> 
>>>>>   +/*
>>>>> + * The following are needed for the case generators GENERATE_WRITE_PR_REG_CASE
>>>>> + * and GENERATE_READ_PR_REG_CASE with num==0
>>>>> + */
>>>>> +#define PRBAR0_EL2 PRBAR_EL2
>>>>> +#define PRLAR0_EL2 PRLAR_EL2
>>>>
>>>> Rather than aliasing, shouldn't we just rename PR{B,L}AR_EL2 to PR{B,L}AR0_EL2? This would the code mixing between the two.
>>> PR{B,L}AR0_ELx does not exists really, the PR{B,L}AR_ELx exists for n=1..15, here I’m only using this “alias” for the generator,
>>> but PR{B,L}AR_EL2 are the real register.
>>
>> In this case, can PR{B,L}AR0_EL2 defined in mm.c so they are not used anywhere else?
> 
> So this was the case in my previous serie, but Ayan asked me to put them in
> here because PRBAR_EL2 is arm64 specific, not sure now, shall we move it back
> and protect it with CONFIG_ARM_64?

Yes. I don't thikn PRBAR0_EL2 should be exposed.

Cheers,

-- 
Julien Grall



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Date: Tue, 15 Apr 2025 12:10:24 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jiqian Chen 
Cc: xen-devel@lists.xenproject.org, Huang Rui 
Subject: Re: [PATCH v2 2/8] vpci/header: Emulate legacy capability list for
 host
Message-ID: 
References: <20250409064528.405573-1-Jiqian.Chen@amd.com>
 <20250409064528.405573-3-Jiqian.Chen@amd.com>
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On Wed, Apr 09, 2025 at 02:45:22PM +0800, Jiqian Chen wrote:
> Current logic of init_header() only emulates legacy capability list
> for guest, expand it to emulate for host too. So that it will be
> easy to hide a capability whose initialization fails and no need
> to distinguish host or guest.
> 
> Signed-off-by: Jiqian Chen 
> ---
> cc: "Roger Pau Monné" 
> ---
> v1->v2 changes:
> new patch
> 
> Best regards,
> Jiqian Chen.
> ---
>  xen/drivers/vpci/header.c | 139 ++++++++++++++++++++------------------
>  1 file changed, 74 insertions(+), 65 deletions(-)
> 
> diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c
> index ef6c965c081c..0910eb940e23 100644
> --- a/xen/drivers/vpci/header.c
> +++ b/xen/drivers/vpci/header.c
> @@ -745,6 +745,76 @@ static int bar_add_rangeset(const struct pci_dev *pdev, struct vpci_bar *bar,
>      return !bar->mem ? -ENOMEM : 0;
>  }
>  
> +/* These capabilities can be exposed to the guest, that vPCI can handle. */
> +static const unsigned int guest_supported_caps[] = {
> +    PCI_CAP_ID_MSI,
> +    PCI_CAP_ID_MSIX,
> +};
> +
> +static int vpci_init_capability_list(struct pci_dev *pdev)
> +{
> +    int rc;
> +    bool mask_cap_list = false;
> +    bool is_hwdom = is_hardware_domain(pdev->domain);
> +    const unsigned int *caps = is_hwdom ? NULL : guest_supported_caps;
> +    const unsigned int n = is_hwdom ? 0 : ARRAY_SIZE(guest_supported_caps);
> +
> +    if ( pci_conf_read16(pdev->sbdf, PCI_STATUS) & PCI_STATUS_CAP_LIST )
> +    {
> +        unsigned int next, ttl = 48;
> +
> +        next = pci_find_next_cap_ttl(pdev->sbdf, PCI_CAPABILITY_LIST,
> +                                     caps, n, &ttl);
> +
> +        rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL,
> +                               PCI_CAPABILITY_LIST, 1,
> +                               (void *)(uintptr_t)next);
> +        if ( rc )
> +            return rc;
> +
> +        next &= ~3;
> +
> +        if ( !next && !is_hwdom )
> +            /*
> +             * If we don't have any supported capabilities to expose to the
> +             * guest, mask the PCI_STATUS_CAP_LIST bit in the status register.
> +             */
> +            mask_cap_list = true;
> +
> +        while ( next && ttl )
> +        {
> +            unsigned int pos = next;
> +
> +            next = pci_find_next_cap_ttl(pdev->sbdf, pos + PCI_CAP_LIST_NEXT,
> +                                         caps, n, &ttl);
> +
> +            rc = vpci_add_register(pdev->vpci, vpci_hw_read8, NULL,
> +                                   pos + PCI_CAP_LIST_ID, 1, NULL);
> +            if ( rc )
> +                return rc;
> +
> +            rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL,
> +                                   pos + PCI_CAP_LIST_NEXT, 1,
> +                                   (void *)(uintptr_t)next);
> +            if ( rc )
> +                return rc;
> +
> +            next &= ~3;
> +        }
> +    }
> +
> +    /* Utilize rsvdp_mask to hide PCI_STATUS_CAP_LIST from the guest. */
> +    rc = vpci_add_register_mask(pdev->vpci, vpci_hw_read16, vpci_hw_write16,
> +                                PCI_STATUS, 2, NULL,
> +                                PCI_STATUS_RO_MASK &
> +                                    ~(mask_cap_list ? PCI_STATUS_CAP_LIST : 0),
> +                                PCI_STATUS_RW1C_MASK,
> +                                mask_cap_list ? PCI_STATUS_CAP_LIST : 0,
> +                                PCI_STATUS_RSVDZ_MASK);

One further remark I've forgot to make on the previous reply: I'm
unsure we want to do this for dom0, as we in general allow dom0
unfiltered write access (unless it's for accesses mediated by Xen).

Thanks, Roger.


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From: "Chen, Jiqian" 
To: =?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= 
CC: "xen-devel@lists.xenproject.org" , "Huang,
 Ray" , "Chen, Jiqian" 
Subject: Re: [PATCH v2 3/8] vpci/header: Emulate extended capability list for
 host
Thread-Topic: [PATCH v2 3/8] vpci/header: Emulate extended capability list for
 host
Thread-Index: AQHbqRsbo3LVuEnuFEu9nspfZtmL8rOkgzIAgACNGIA=
Date: Tue, 15 Apr 2025 10:11:34 +0000
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References: <20250409064528.405573-1-Jiqian.Chen@amd.com>
 <20250409064528.405573-4-Jiqian.Chen@amd.com> 
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Subject: Re: [PATCH 3/5] x86/hvm: fix handling of accesses to partial r/o MMIO
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To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
Cc: Andrew Cooper ,
 xen-devel@lists.xenproject.org,
 Marek Marczykowski 
References: <20250411105411.22334-1-roger.pau@citrix.com>
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On 15.04.2025 12:04, Roger Pau Monné wrote:
> On Tue, Apr 15, 2025 at 11:41:27AM +0200, Jan Beulich wrote:
>> On 15.04.2025 10:34, Roger Pau Monné wrote:
>>> On Tue, Apr 15, 2025 at 09:32:37AM +0200, Jan Beulich wrote:
>>>> On 14.04.2025 18:13, Roger Pau Monné wrote:
>>>>> On Mon, Apr 14, 2025 at 05:24:32PM +0200, Jan Beulich wrote:
>>>>>> On 14.04.2025 15:53, Roger Pau Monné wrote:
>>>>>>> On Mon, Apr 14, 2025 at 08:33:44AM +0200, Jan Beulich wrote:
>>>>>>>> I'm also concerned of e.g. VT-x'es APIC access MFN, which is
>>>>>>>> p2m_mmio_direct.
>>>>>>>
>>>>>>> But that won't go into hvm_hap_nested_page_fault() when using
>>>>>>> cpu_has_vmx_virtualize_apic_accesses (and thus having an APIC page
>>>>>>> mapped as p2m_mmio_direct)?
>>>>>>>
>>>>>>> It would instead be an EXIT_REASON_APIC_ACCESS vmexit which is handled
>>>>>>> differently?
>>>>>>
>>>>>> All true as long as things work as expected (potentially including the guest
>>>>>> also behaving as expected). Also this was explicitly only an example I could
>>>>>> readily think of. I'm simply wary of handle_mmio_with_translation() now
>>>>>> getting things to handle it's not meant to ever see.
>>>>>
>>>>> How was access to MMIO r/o regions supposed to be handled before
>>>>> 33c19df9a5a0 (~2015)?  I see that setting r/o MMIO p2m entries was
>>>>> added way before to p2m_type_to_flags() and ept_p2m_type_to_flags()
>>>>> (~2010), yet I can't figure out how writes would be handled back then
>>>>> that didn't result in a p2m fault and crashing of the domain.
>>>>
>>>> Was that handled at all before said change?
>>>
>>> Not really AFAICT, hence me wondering how where write accesses to r/o
>>> MMIO regions supposed to be handled by (non-priv) domains.  Was the
>>> expectation that those writes trigger an p2m violation thus crashing
>>> the domain?
>>
>> I think so, yes. Devices with such special areas weren't (aren't?) supposed
>> to be handed to DomU-s.
> 
> Oh, I see.  That makes stuff a bit clearer.  I think we would then
> also want to add some checks to {ept_}p2m_type_to_flags()?
> 
> I wonder why handling of mmio_ro_ranges was added to the HVM p2m code
> in ~2010 then.  If mmio_ro_ranges is only supposed to be relevant for
> the hardware domain in ~2010 an HVM dom0 was not even in sight?

I fear because I was wrong with what I said in the earlier reply: There's
one exception - the MSI-X tables of devices. DomU-s (and even Dom0) aren't
supposed to access them directly, but we'd permit reads (which, at least
back at the time, were also required to keep qemu working).

> Sorry to ask so many questions, I'm a bit confused about how this
> was/is supposed to work.

No worries - as you can see, I'm not getting it quite straight either.

>>>> mmio_ro_do_page_fault() was
>>>> (and still is) invoked for the hardware domain only, and quite likely
>>>> the need for handling (discarding) writes for PVHv1 had been overlooked
>>>> until someone was hit by the lack thereof.
>>>
>>> I see, I didn't realize r/o MMIO was only handled for PV hardware
>>> domains only.  I could arguably do the same for HVM in
>>> hvm_hap_nested_page_fault().
>>>
>>> Not sure whether the subpage stuff is supposed to be functional for
>>> domains different than the hardware domain?  It seems to be available
>>> to the hanrdware domain only for PV guests, while for HVM is available
>>> for both PV and HVM domains:
>>
>> DYM Dom0 and DomU here?
> 
> Indeed, sorry.
> 
>>> is_hardware_domain(currd) || subpage_mmio_write_accept(mfn, gla)
>>>
>>> In hvm_hap_nested_page_fault().
>>
>> See the three XHCI_SHARE_* modes. When it's XHCI_SHARE_ANY, even DomU-s
>> would require this handling. It looks like a mistake that we permit the
>> path to be taken for DomU-s even when the mode is XHCI_SHARE_HWDOM.
> 
> Arguable a domU will never get the device assigned in the first place
> unless the share mode is set to XHCI_SHARE_ANY.  For the other modes
> the device is hidden, and hence couldn't be assigned to a domU anyway.

Correct. Yet then we permit a code path to be taken which is supposedly
unnecessary, but potentially (if something went wrong) harmful.

>>>>> I'm happy to look at other ways to handling this, but given there's
>>>>> current logic for handling accesses to read-only regions in
>>>>> hvm_hap_nested_page_fault() I think re-using that was the best way to
>>>>> also handle accesses to MMIO read-only regions.
>>>>>
>>>>> Arguably it would already be the case that for other reasons Xen would
>>>>> need to emulate an instruction that accesses a read-only MMIO region?
>>>>
>>>> Aiui hvm_translate_get_page() will yield HVMTRANS_bad_gfn_to_mfn for
>>>> p2m_mmio_direct (after all, "direct" means we expect no emulation is
>>>> needed; while arguably wrong for the introspection case, I'm not sure
>>>> that and pass-through actually go together). Hence it's down to
>>>> hvmemul_linear_mmio_access() -> hvmemul_phys_mmio_access() ->
>>>> hvmemul_do_mmio_buffer() -> hvmemul_do_io_buffer() -> hvmemul_do_io(),
>>>> which means that if hvm_io_intercept() can't handle it, the access
>>>> will be forwarded to the responsible DM, or be "processed" by the
>>>> internal null handler.
>>>>
>>>> Given this, perhaps what you do is actually fine. At the same time
>>>> note how several functions in hvm/emulate.c simply fail upon
>>>> encountering p2m_mmio_direct. These are all REP handlers though, so
>>>> the main emulator would then try emulating the insn the non-REP way.
>>>
>>> I'm open to alternative ways of handling such accesses, just used what
>>> seemed more natural in the context of hvm_hap_nested_page_fault().
>>>
>>> Emulation of r/o MMIO accesses failing wouldn't be an issue from Xen's
>>> perspective, that would "just" result in the guest getting a #GP
>>> injected.
>>
>> That's not the part I'm worried about. What worries me is that we open up
>> another (or better: we're widening a) way to hit the emulator in the first
>> place. (Plus, as said, the issue with the not really tidy P2M type system.)
> 
> But the hit would be limited to domains having r/o p2m_mmio_direct
> entries in the p2m, as otherwise the path would be unreachable?

I fear I don't follow - all you look for in the newly extended conditional
is the type being p2m_mmio_direct. There's no r/o-ness being checked for
until we'd make it through the emulator and into subpage_mmio_accept().

Jan


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From: "Chen, Jiqian" 
To: Jan Beulich 
CC: =?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= ,
	"xen-devel@lists.xenproject.org" , "Huang,
 Ray" , "Chen, Jiqian" 
Subject: Re: [PATCH v2 3/8] vpci/header: Emulate extended capability list for
 host
Thread-Topic: [PATCH v2 3/8] vpci/header: Emulate extended capability list for
 host
Thread-Index: AQHbqRsbo3LVuEnuFEu9nspfZtmL8rOkhQ8AgACNiwA=
Date: Tue, 15 Apr 2025 10:18:13 +0000
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References: <20250409064528.405573-1-Jiqian.Chen@amd.com>
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 "Huang, Ray" 
References: <20250409064528.405573-1-Jiqian.Chen@amd.com>
 <20250409064528.405573-4-Jiqian.Chen@amd.com>
 
 
Content-Language: en-US
From: Jan Beulich 
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On 15.04.2025 12:18, Chen, Jiqian wrote:
> On 2025/4/15 17:49, Jan Beulich wrote:
>> On 09.04.2025 08:45, Jiqian Chen wrote:
>>> --- a/xen/drivers/vpci/header.c
>>> +++ b/xen/drivers/vpci/header.c
>>> @@ -815,6 +815,39 @@ static int vpci_init_capability_list(struct pci_dev *pdev)
>>>      return rc;
>>>  }
>>>  
>>> +static int vpci_init_ext_capability_list(struct pci_dev *pdev)
>>> +{
>>> +    int rc;
>>> +    u32 header;
>>> +    unsigned int pos = 0x100U, ttl = 480;
>>> +
>>> +    if ( !is_hardware_domain(pdev->domain) )
>>> +    {
>>> +        /* Extended capabilities read as zero, write ignore */
>>> +        rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL,
>>> +                               pos, 4, (void *)0);
>>> +        if ( rc )
>>> +            return rc;
>>> +    }
>>> +
>>> +    while ( pos && ttl-- )
>>> +    {
>>> +        header = pci_conf_read32(pdev->sbdf, pos);
>>> +
>>> +        rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL,
>>> +                               pos, 4, (void *)(uintptr_t)header);
>>> +        if ( rc )
>>> +            return rc;
>>> +
>>> +        if ( (header == 0) || (header == -1) )
>>> +            return 0;
>>
>> I realize pci_find_next_ext_capability() also has such a check, but even
>> there it's not really clear to me why compare not only against 0, but also
>> again -1 (aka ~0).
> Thank you for raising this question.
> When I coded this part, I also had this confuse since pci_find_next_ext_capability() has this check,
> so I chose to keep the same check.
> Do you think I need to remove this -1 check?

Unless you can explain why it's needed (perhaps by figuring out why the other
one is there), I'd say - yes.

Jan


From xen-devel-bounces@lists.xenproject.org Tue Apr 15 10:21:00 2025
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Message-ID: <9eec0359-e9e9-4d38-abc0-3cde6eb94e3b@xen.org>
Date: Tue, 15 Apr 2025 19:20:50 +0900
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User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v3 7/7] arm/mpu: Implement setup_mpu for MPU system
Content-Language: en-GB
To: Luca Fancellu 
Cc: "xen-devel@lists.xenproject.org" ,
 Stefano Stabellini ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk 
References: <20250411145655.140667-1-luca.fancellu@arm.com>
 <20250411145655.140667-8-luca.fancellu@arm.com>
 <923a2fc0-4eeb-4e09-a56d-7471a56fe3bf@xen.org>
 <4771188E-B307-4452-A900-2ACACC1CE333@arm.com>
 
 
From: Julien Grall 
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Hi Luca,

On 15/04/2025 16:55, Luca Fancellu wrote:
> Hi Julien,
> 
>>>>> +static void __init setup_mpu(void)
>>>>> +{
>>>>> +    register_t prenr;
>>>>> +    unsigned int i = 0;
>>>>> +
>>>>> +    /*
>>>>> +     * MPUIR_EL2.Region[0:7] identifies the number of regions supported by
>>>>> +     * the EL2 MPU.
>>>>> +     */
>>>>> +    max_xen_mpumap = (uint8_t)(READ_SYSREG(MPUIR_EL2) & NUM_MPU_REGIONS_MASK);
>>>>> +
>>>>> +    /* PRENR_EL2 has the N bit set if the N region is enabled, N < 32 */
>>>>> +    prenr = (READ_SYSREG(PRENR_EL2) & PRENR_MASK);
>>>>> +
>>>>> +    /*
>>>>> +     * Set the bitfield for regions enabled in assembly boot-time.
>>>>> +     * This code works under the assumption that the code in head.S has
>>>>> +     * allocated and enabled regions below 32 (N < 32).
>>>>> +
>>>> This is a bit fragile. I think it would be better if the bitmap is set by head.S as we add the regions. Same for ...
>>> So, I was trying to avoid that because in that case we need to place xen_mpumap out of the BSS and start
>>> manipulating the bitmap from asm, instead I was hoping to use the C code, I understand that if someone
>>> wants to have more than 31 region as boot region this might break, but it’s also a bit unlikely?
>>
>> The 31 is only part of the problem. The other problem is there is at least one other places in Xen (i.e. as early_fdt_map()) which will also create an entry in the MPU before setup_mm()/setup_mpu() is called. I am a bit concerned that the assumption is going to spread and yet we have no way to programmatically check if this will be broken.
> 
> If we would like to find ways, we could check eventually for clashes on enabled MPU regions;
> so the only part where a region is created in the C world without the assistance of xen_mpumap is early_fdt_map(),
> asserts etc could be used in one or both setup_mpu and early_fdt_map to prevent breakage.
 > >>
>> Furthermore, right now, you are hardcoding the slot used and updating the MPU. But if you had the bitmap updated, you could just look up for a free slot.
> 
> of course, but still the early DTB map is temporary and it will be gone after boot, so it won’t impact much unless I’m
> missing something.

It doesn't really matter whether the region is temporary or not. My 
concern is you are making assumption that are difficult to track (they 
are not documented where a developper would most likely look at).

So if we still want to hardcode the value, then this should be 
documented in head.S and probably in a layout.h (or similar) so there is 
a single place where the MPU layout is described.

> 
>>
>>> So I was balancing the pros to manipulate everything from the C world against the cons (boot region > 31).
>>> Is it still your preferred way to handle everything from asm?
>>
>> Yes. I don't think the change in asm will be large and this would allow to remove other assumptions (like in the FDT mapping code).
> 
> not large, but still something to be maintained, we will need arm64/arm32 code to set/clear bits on the bitmap
> (causing duplication with bitops.c), code to save things on the xen_mpumap, code to clean/invalidate dcache for the entries in xen_mpumap and finally we will need to keep the code aligned to the implementation of the bitmap
> (which is fairly stable, but still needs to be taken into account).

I understand the changes and risks, but I still think this is the right 
approach. Let see what the other maintainers think.

> 
>>
>> As a side note, I noticed that the MPU entries are not cleared before we enable the MPU. Is there anything in the boot protocol that guarantee all the entries will be invalid? If not, then I think we need to clear the entries.
>>
>> Otherwise, your current logic doesn't work. That said, I think it would still be necessary even if we get rid of your logic because we don't know the content of the MPU entries.
> 
> The PRLAR.EN bit resets to zero on a warm reset, so any region will be always disabled unless programmed, I thought it is enough.

This is only telling me the state PRLAR.EN when the CPU is initially 
turn on. This doesn't tell me the value of the bit when jumping in Xen.

I am making the difference because there might be another software 
running at EL2 before jumping into Xen (e.g. bootloader, or even a 
previous Xen if we were using Kexec) which could use the MPU.

So I am looking for some details on how the expected state of the system 
when jumping to an OS/hypervisor. For a comparison, on the MMU side, we 
have the Linux arm64 Image protocol that will specific how
a bootloader needs to configure the system.

Cheers,

-- 
Julien Grall



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From: "Chen, Jiqian" 
To: Jan Beulich 
CC: "xen-devel@lists.xenproject.org" ,
	=?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= , "Huang, Ray"
	, "Chen, Jiqian" 
Subject: Re: [PATCH v2 2/8] vpci/header: Emulate legacy capability list for
 host
Thread-Topic: [PATCH v2 2/8] vpci/header: Emulate legacy capability list for
 host
Thread-Index: AQHbqRsaTINnyZcO4ESL6xMBZUfUtLOkfmYAgACPYID//3zKAIAAiTCA
Date: Tue, 15 Apr 2025 10:23:53 +0000
Message-ID:
 
References: <20250409064528.405573-1-Jiqian.Chen@amd.com>
 <20250409064528.405573-3-Jiqian.Chen@amd.com> 
 
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Date: Tue, 15 Apr 2025 12:29:51 +0200
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Subject: Re: [PATCH v1 03/14] xen/riscv: introduce ioremap()
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: 
 <6d91eeabe2735de93bfcf2a2420e2059a8f35e52.1744126720.git.oleksii.kurochko@gmail.com>
 <84089b6d-efeb-4613-85b9-eb10d11d7338@suse.com>
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From: Oleksii Kurochko 
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On 4/10/25 5:13 PM, Jan Beulich wrote:
> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>> Based on RISC-V unpriviliged spec ( Version 20240411 ):
>> ```
>> For implementations that conform to the RISC-V Unix Platform Specification,
>> I/O devices and DMA operations are required to access memory coherently and
>> via strongly ordered I/O channels. Therefore, accesses to regular main memory
>> regions that are concurrently accessed by external devices can also use the
>> standard synchronization mechanisms. Implementations that do not conform
>> to the Unix Platform Specification and/or in which devices do not access
>> memory coherently will need to use mechanisms
>> (which are currently platform-specific or device-specific) to enforce
>> coherency.
>>
>> I/O regions in the address space should be considered non-cacheable
>> regions in the PMAs for those regions. Such regions can be considered coherent
>> by the PMA if they are not cached by any agent.
>> ```
>> and [1]:
>> ```
>> The current riscv linux implementation requires SOC system to support
>> memory coherence between all I/O devices and CPUs. But some SOC systems
>> cannot maintain the coherence and they need support cache clean/invalid
>> operations to synchronize data.
>>
>> Current implementation is no problem with SiFive FU540, because FU540
>> keeps all IO devices and DMA master devices coherence with CPU. But to a
>> traditional SOC vendor, it may already have a stable non-coherency SOC
>> system, the need is simply to replace the CPU with RV CPU and rebuild
>> the whole system with IO-coherency is very expensive.
>> ```
>>
>> and the fact that all known ( to me ) CPUs that support the H-extension
>> and that ones is going to be supported by Xen have memory coherency
>> between all I/O devices and CPUs, so it is currently safe to use the
>> PAGE_HYPERVISOR attribute.
>> However, in cases where a platform does not support memory coherency, it
>> should support CMO extensions and Svpbmt. In this scenario, updates to
>> ioremap will be necessary.
>> For now, a compilation error will be generated to ensure that the need to
>> update ioremap() is not overlooked.
>>
>> [1]https://patchwork.kernel.org/project/linux-riscv/patch/1555947870-23014-1-git-send-email-guoren@kernel.org/
> But MMIO access correctness isn't just a matter of coherency. There may not
> be any caching involved in most cases, or else you may observe significantly
> delayed or even dropped (folded with later ones) writes, and reads may be
> serviced from the cache instead of going to actual MMIO. Therefore ...
>
>> --- a/xen/arch/riscv/Kconfig
>> +++ b/xen/arch/riscv/Kconfig
>> @@ -15,6 +15,18 @@ config ARCH_DEFCONFIG
>>   	string
>>   	default "arch/riscv/configs/tiny64_defconfig"
>>   
>> +config HAS_SVPBMT
>> +	bool
>> +	help
>> +	  This config enables usage of Svpbmt ISA-extension ( Supervisor-mode:
>> +	  page-based memory types).
>> +
>> +	  The memory type for a page contains a combination of attributes
>> +	  that indicate the cacheability, idempotency, and ordering
>> +	  properties for access to that page.
>> +
>> +	  The Svpbmt extension is only available on 64-bit cpus.
> ... I kind of expect this extension (or anything else that there might be) will need
> making use of.

In cases where the Svpbmt extension isn't available, PMA (Physical Memory Attributes)
is used to control which memory regions are cacheable, non-cacheable, readable, writable,
etc. PMA is configured in M-mode by the firmware (e.g., OpenSBI), as is done in Andes
cores, or it can be fixed at design time, as in SiFive cores.

In the case of QEMU, I assume it is QEMU's responsibility to properly emulate accesses
to device memory regions. Since QEMU does not appear to provide registers for configuring
PMA, it seems that PMA is not emulated. Additionally, QEMU does not emulate caches.

Based on that, I expect that it is the responsibility of the firmware or the hardware
itself to provide the correct PMA configuration.

I want to note that even Svpbmt is available PMA settings could be used or be ovewritten
by Svpbmt's attribute value.

I will update the commit message  for more clearness.

>
>> @@ -548,3 +549,21 @@ void clear_fixmap(unsigned int map)
>>                                 FIXMAP_ADDR(map) + PAGE_SIZE) != 0 )
>>           BUG();
>>   }
>> +
>> +void *ioremap(paddr_t pa, size_t len)
>> +{
>> +    mfn_t mfn = _mfn(PFN_DOWN(pa));
>> +    unsigned int offs = pa & (PAGE_SIZE - 1);
>> +    unsigned int nr = PFN_UP(offs + len);
>> +
>> +#ifdef CONFIG_HAS_SVPBMT
>> +    #error "an introduction of PAGE_HYPERVISOR_IOREMAP is needed for __vmap()"
>> +#endif
> While, as per above, I don't think this can stay, just in case: As indicated
> earlier, pre-processor directives want to have the # in the first column.

I think it can be safely dropped now, and|PAGE_HYPERVISOR_IOREMAP| could be introduced
and simply PTE's PMBT bits can be ignored in|pt_update_entry()| if Svpbmt isn't implemented.

~ Oleksii

--------------9zjEHGfWx3C45ZpsOmsI0P4B
Content-Type: text/html; charset=UTF-8
Content-Transfer-Encoding: 7bit



  
    
  
  
    


    

    
On 4/10/25 5:13 PM, Jan Beulich wrote:

    

    

      
On 08.04.2025 17:57, Oleksii Kurochko wrote:


      

        
Based on RISC-V unpriviliged spec ( Version 20240411 ):
```
For implementations that conform to the RISC-V Unix Platform Specification,
I/O devices and DMA operations are required to access memory coherently and
via strongly ordered I/O channels. Therefore, accesses to regular main memory
regions that are concurrently accessed by external devices can also use the
standard synchronization mechanisms. Implementations that do not conform
to the Unix Platform Specification and/or in which devices do not access
memory coherently will need to use mechanisms
(which are currently platform-specific or device-specific) to enforce
coherency.

I/O regions in the address space should be considered non-cacheable
regions in the PMAs for those regions. Such regions can be considered coherent
by the PMA if they are not cached by any agent.
```
and [1]:
```
The current riscv linux implementation requires SOC system to support
memory coherence between all I/O devices and CPUs. But some SOC systems
cannot maintain the coherence and they need support cache clean/invalid
operations to synchronize data.

Current implementation is no problem with SiFive FU540, because FU540
keeps all IO devices and DMA master devices coherence with CPU. But to a
traditional SOC vendor, it may already have a stable non-coherency SOC
system, the need is simply to replace the CPU with RV CPU and rebuild
the whole system with IO-coherency is very expensive.
```

and the fact that all known ( to me ) CPUs that support the H-extension
and that ones is going to be supported by Xen have memory coherency
between all I/O devices and CPUs, so it is currently safe to use the
PAGE_HYPERVISOR attribute.
However, in cases where a platform does not support memory coherency, it
should support CMO extensions and Svpbmt. In this scenario, updates to
ioremap will be necessary.
For now, a compilation error will be generated to ensure that the need to
update ioremap() is not overlooked.

[1] https://patchwork.kernel.org/project/linux-riscv/patch/1555947870-23014-1-git-send-email-guoren@kernel.org/


      

      
But MMIO access correctness isn't just a matter of coherency. There may not
be any caching involved in most cases, or else you may observe significantly
delayed or even dropped (folded with later ones) writes, and reads may be
serviced from the cache instead of going to actual MMIO. Therefore ...



      

        
--- a/xen/arch/riscv/Kconfig
+++ b/xen/arch/riscv/Kconfig
@@ -15,6 +15,18 @@ config ARCH_DEFCONFIG
 	string
 	default "arch/riscv/configs/tiny64_defconfig"
 
+config HAS_SVPBMT
+	bool
+	help
+	  This config enables usage of Svpbmt ISA-extension ( Supervisor-mode:
+	  page-based memory types).
+
+	  The memory type for a page contains a combination of attributes
+	  that indicate the cacheability, idempotency, and ordering
+	  properties for access to that page.
+
+	  The Svpbmt extension is only available on 64-bit cpus.


      

      
... I kind of expect this extension (or anything else that there might be) will need
making use of.

    

    
In cases where the Svpbmt extension isn't available, PMA (Physical Memory Attributes)
is used to control which memory regions are cacheable, non-cacheable, readable, writable,
etc. PMA is configured in M-mode by the firmware (e.g., OpenSBI), as is done in Andes
cores, or it can be fixed at design time, as in SiFive cores.

In the case of QEMU, I assume it is QEMU's responsibility to properly emulate accesses
to device memory regions. Since QEMU does not appear to provide registers for configuring
PMA, it seems that PMA is not emulated. Additionally, QEMU does not emulate caches.

    
Based on that, I expect that it is the responsibility of the firmware or the hardware
itself to provide the correct PMA configuration.

I want to note that even Svpbmt is available PMA settings could be used or be ovewritten
by Svpbmt's attribute value.

I will update the commit message  for more clearness.



    

      



      

        
@@ -548,3 +549,21 @@ void clear_fixmap(unsigned int map)
                               FIXMAP_ADDR(map) + PAGE_SIZE) != 0 )
         BUG();
 }
+
+void *ioremap(paddr_t pa, size_t len)
+{
+    mfn_t mfn = _mfn(PFN_DOWN(pa));
+    unsigned int offs = pa & (PAGE_SIZE - 1);
+    unsigned int nr = PFN_UP(offs + len);
+
+#ifdef CONFIG_HAS_SVPBMT
+    #error "an introduction of PAGE_HYPERVISOR_IOREMAP is needed for __vmap()"
+#endif


      

      
While, as per above, I don't think this can stay, just in case: As indicated
earlier, pre-processor directives want to have the # in the first column.

    

    
I think it can be safely dropped now, and PAGE_HYPERVISOR_IOREMAP could be introduced
and simply PTE's PMBT bits can be ignored in pt_update_entry() if Svpbmt isn't implemented.

    
~ Oleksii


  


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Date: Tue, 15 Apr 2025 12:36:33 +0200
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Subject: Re: [PATCH v1 04/14] xen/riscv: introduce init_IRQ()
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
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On 4/10/25 5:25 PM, Jan Beulich wrote:
> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>> --- a/xen/arch/riscv/include/asm/irq.h
>> +++ b/xen/arch/riscv/include/asm/irq.h
>> @@ -3,6 +3,28 @@
>>   #define ASM__RISCV__IRQ_H
>>   
>>   #include 
>> +#include 
>> +
>> +#define NR_IRQS 1024
>> +
>> +/*
>> + * TODO: Should IRQ_TYPE_* be moved to xen/irq.h and wrapped into
>> + * #ifdef CONFIG_HAS_DEVICE_TREE?
>> + */
> Wouldn't that be more like asm-generic/dt-irq.h (or irq-dt.h)? The field where
> these values are stored is an arch-specific one, after all.

It would be much better. Thanks!

~ Oleksii

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On 4/10/25 5:25 PM, Jan Beulich wrote:

    

    

      
On 08.04.2025 17:57, Oleksii Kurochko wrote:


      

        
--- a/xen/arch/riscv/include/asm/irq.h
+++ b/xen/arch/riscv/include/asm/irq.h
@@ -3,6 +3,28 @@
 #define ASM__RISCV__IRQ_H
 
 #include <xen/bug.h>
+#include <xen/device_tree.h>
+
+#define NR_IRQS 1024
+
+/*
+ * TODO: Should IRQ_TYPE_* be moved to xen/irq.h and wrapped into
+ * #ifdef CONFIG_HAS_DEVICE_TREE?
+ */


      

      
Wouldn't that be more like asm-generic/dt-irq.h (or irq-dt.h)? The field where
these values are stored is an arch-specific one, after all.

    

    
It would be much better. Thanks!

~ Oleksii


  


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Subject: Re: [PATCH v4 1/3] drivers: Change amd_iommu struct to contain
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To: Andrii Sultanov 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 xen-devel@lists.xenproject.org
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On 14.04.2025 21:19, Andrii Sultanov wrote:
> @@ -578,7 +578,7 @@ static int cf_check amd_iommu_add_device(u8 devfn, struct pci_dev *pdev)
>          return -EINVAL;
>  
>      for_each_amd_iommu(iommu)
> -        if ( pdev->seg == iommu->seg && pdev->sbdf.bdf == iommu->bdf )
> +        if ( pdev->sbdf.sbdf == iommu->sbdf.sbdf )

Not for this patch (optionally for a prereq one) we may want to gain sbdf_eq(),
much like we have mfn_eq() and friends.

Jan


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Date: Tue, 15 Apr 2025 12:40:11 +0200
From: Marek Marczykowski 
To: Jan Beulich 
Cc: Roger Pau =?utf-8?B?TW9ubsOp?= ,
	Andrew Cooper ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH 3/5] x86/hvm: fix handling of accesses to partial r/o
 MMIO pages
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Date: Tue, 15 Apr 2025 12:40:11 +0200
From: Marek Marczykowski 
To: Jan Beulich 
Cc: Roger Pau =?utf-8?B?TW9ubsOp?= ,
	Andrew Cooper ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH 3/5] x86/hvm: fix handling of accesses to partial r/o
 MMIO pages

On Tue, Apr 15, 2025 at 12:18:04PM +0200, Jan Beulich wrote:
> On 15.04.2025 12:04, Roger Pau Monn=C3=A9 wrote:
> > On Tue, Apr 15, 2025 at 11:41:27AM +0200, Jan Beulich wrote:
> >> On 15.04.2025 10:34, Roger Pau Monn=C3=A9 wrote:
> >>> On Tue, Apr 15, 2025 at 09:32:37AM +0200, Jan Beulich wrote:
> >>>> On 14.04.2025 18:13, Roger Pau Monn=C3=A9 wrote:
> >>>>> On Mon, Apr 14, 2025 at 05:24:32PM +0200, Jan Beulich wrote:
> >>>>>> On 14.04.2025 15:53, Roger Pau Monn=C3=A9 wrote:
> >>>>>>> On Mon, Apr 14, 2025 at 08:33:44AM +0200, Jan Beulich wrote:
> >>>>>>>> I'm also concerned of e.g. VT-x'es APIC access MFN, which is
> >>>>>>>> p2m_mmio_direct.
> >>>>>>>
> >>>>>>> But that won't go into hvm_hap_nested_page_fault() when using
> >>>>>>> cpu_has_vmx_virtualize_apic_accesses (and thus having an APIC page
> >>>>>>> mapped as p2m_mmio_direct)?
> >>>>>>>
> >>>>>>> It would instead be an EXIT_REASON_APIC_ACCESS vmexit which is ha=
ndled
> >>>>>>> differently?
> >>>>>>
> >>>>>> All true as long as things work as expected (potentially including=
 the guest
> >>>>>> also behaving as expected). Also this was explicitly only an examp=
le I could
> >>>>>> readily think of. I'm simply wary of handle_mmio_with_translation(=
) now
> >>>>>> getting things to handle it's not meant to ever see.
> >>>>>
> >>>>> How was access to MMIO r/o regions supposed to be handled before
> >>>>> 33c19df9a5a0 (~2015)?  I see that setting r/o MMIO p2m entries was
> >>>>> added way before to p2m_type_to_flags() and ept_p2m_type_to_flags()
> >>>>> (~2010), yet I can't figure out how writes would be handled back th=
en
> >>>>> that didn't result in a p2m fault and crashing of the domain.
> >>>>
> >>>> Was that handled at all before said change?
> >>>
> >>> Not really AFAICT, hence me wondering how where write accesses to r/o
> >>> MMIO regions supposed to be handled by (non-priv) domains.  Was the
> >>> expectation that those writes trigger an p2m violation thus crashing
> >>> the domain?
> >>
> >> I think so, yes. Devices with such special areas weren't (aren't?) sup=
posed
> >> to be handed to DomU-s.
> >=20
> > Oh, I see.  That makes stuff a bit clearer.  I think we would then
> > also want to add some checks to {ept_}p2m_type_to_flags()?
> >=20
> > I wonder why handling of mmio_ro_ranges was added to the HVM p2m code
> > in ~2010 then.  If mmio_ro_ranges is only supposed to be relevant for
> > the hardware domain in ~2010 an HVM dom0 was not even in sight?
>=20
> I fear because I was wrong with what I said in the earlier reply: There's
> one exception - the MSI-X tables of devices. DomU-s (and even Dom0) aren't
> supposed to access them directly, but we'd permit reads (which, at least
> back at the time, were also required to keep qemu working).

And there is also a case where some devices have other registers on the
same page as MSI-X tables. But this case is handled specially in the
MSI-X code, not via sub-page R/O API.

> > Sorry to ask so many questions, I'm a bit confused about how this
> > was/is supposed to work.
>=20
> No worries - as you can see, I'm not getting it quite straight either.
>=20
> >>>> mmio_ro_do_page_fault() was
> >>>> (and still is) invoked for the hardware domain only, and quite likely
> >>>> the need for handling (discarding) writes for PVHv1 had been overloo=
ked
> >>>> until someone was hit by the lack thereof.
> >>>
> >>> I see, I didn't realize r/o MMIO was only handled for PV hardware
> >>> domains only.  I could arguably do the same for HVM in
> >>> hvm_hap_nested_page_fault().
> >>>
> >>> Not sure whether the subpage stuff is supposed to be functional for
> >>> domains different than the hardware domain?  It seems to be available
> >>> to the hanrdware domain only for PV guests, while for HVM is available
> >>> for both PV and HVM domains:
> >>
> >> DYM Dom0 and DomU here?
> >=20
> > Indeed, sorry.

I'm not sure about the PV case and domU. I think I tested it at some
iteration, but it isn't configuration that I care much about. If it
doesn't work (and fixing it would make it even more complex), IMO we can
simply adjust documentation of XHCI_SHARE_ANY to say it works only with
HVM domU.

The domU case exists mostly (only?) to enable automated testing. I do a
lot of that on laptops, which have only a single USB controller (no way
to plug any extra one), and I need that USB controller in a domU for
several tests. In fact, the XHCI console is a debugging feature in the
first place. So, the domU part doesn't need security support, can
require extra hoops to jump through etc.

> >>> is_hardware_domain(currd) || subpage_mmio_write_accept(mfn, gla)
> >>>
> >>> In hvm_hap_nested_page_fault().
> >>
> >> See the three XHCI_SHARE_* modes. When it's XHCI_SHARE_ANY, even DomU-s
> >> would require this handling. It looks like a mistake that we permit the
> >> path to be taken for DomU-s even when the mode is XHCI_SHARE_HWDOM.
> >=20
> > Arguable a domU will never get the device assigned in the first place
> > unless the share mode is set to XHCI_SHARE_ANY.  For the other modes
> > the device is hidden, and hence couldn't be assigned to a domU anyway.
>=20
> Correct. Yet then we permit a code path to be taken which is supposedly
> unnecessary, but potentially (if something went wrong) harmful.

Since the XHCI_SHARE_ANY case is rare (and not security-supported),
maybe there should be a global variable guarding this part? It would be
set to true only if XHCI_SHARE_ANY is used (or some future use of this
subpage-ro API with a domU). Then, that code would still be potentially
reachable for all domUs (if XHCI_SHARE_ANY is used), but that's still
better?
Anyway, I'm still not sure what the concern is. What is the (not purely
theoretical) case where domU gains access to the emulator, where without
this feature it wouldn't have it already? Any HVM can hit the emulator
already, regardless of this feature, no?

> >>>>> I'm happy to look at other ways to handling this, but given there's
> >>>>> current logic for handling accesses to read-only regions in
> >>>>> hvm_hap_nested_page_fault() I think re-using that was the best way =
to
> >>>>> also handle accesses to MMIO read-only regions.
> >>>>>
> >>>>> Arguably it would already be the case that for other reasons Xen wo=
uld
> >>>>> need to emulate an instruction that accesses a read-only MMIO regio=
n?
> >>>>
> >>>> Aiui hvm_translate_get_page() will yield HVMTRANS_bad_gfn_to_mfn for
> >>>> p2m_mmio_direct (after all, "direct" means we expect no emulation is
> >>>> needed; while arguably wrong for the introspection case, I'm not sure
> >>>> that and pass-through actually go together). Hence it's down to
> >>>> hvmemul_linear_mmio_access() -> hvmemul_phys_mmio_access() ->
> >>>> hvmemul_do_mmio_buffer() -> hvmemul_do_io_buffer() -> hvmemul_do_io(=
),
> >>>> which means that if hvm_io_intercept() can't handle it, the access
> >>>> will be forwarded to the responsible DM, or be "processed" by the
> >>>> internal null handler.
> >>>>
> >>>> Given this, perhaps what you do is actually fine. At the same time
> >>>> note how several functions in hvm/emulate.c simply fail upon
> >>>> encountering p2m_mmio_direct. These are all REP handlers though, so
> >>>> the main emulator would then try emulating the insn the non-REP way.
> >>>
> >>> I'm open to alternative ways of handling such accesses, just used what
> >>> seemed more natural in the context of hvm_hap_nested_page_fault().
> >>>
> >>> Emulation of r/o MMIO accesses failing wouldn't be an issue from Xen's
> >>> perspective, that would "just" result in the guest getting a #GP
> >>> injected.
> >>
> >> That's not the part I'm worried about. What worries me is that we open=
 up
> >> another (or better: we're widening a) way to hit the emulator in the f=
irst
> >> place. (Plus, as said, the issue with the not really tidy P2M type sys=
tem.)
> >=20
> > But the hit would be limited to domains having r/o p2m_mmio_direct
> > entries in the p2m, as otherwise the path would be unreachable?
>=20
> I fear I don't follow - all you look for in the newly extended conditional
> is the type being p2m_mmio_direct. There's no r/o-ness being checked for
> until we'd make it through the emulator and into subpage_mmio_accept().

But EPT violation can be hit on p2m_mmio_direct page only if it's a
write and the page is read-only, no? Is there any other case that exists
today?

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Date: Tue, 15 Apr 2025 12:47:19 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jiqian Chen 
Cc: xen-devel@lists.xenproject.org, Huang Rui ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich , Julien Grall ,
	Stefano Stabellini 
Subject: Re: [PATCH v2 4/8] vpci: Hide capability when it fails to initialize
Message-ID: 
References: <20250409064528.405573-1-Jiqian.Chen@amd.com>
 <20250409064528.405573-5-Jiqian.Chen@amd.com>
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In-Reply-To: <20250409064528.405573-5-Jiqian.Chen@amd.com>

On Wed, Apr 09, 2025 at 02:45:24PM +0800, Jiqian Chen wrote:
> When vpci fails to initialize a capability of a device, it just
> return error instead of catching and processing exception. That
> makes the entire device unusable.
> 
> So, refactor REGISTER_VPCI_INIT to contain more capability specific
> information, and use new functions to hide capability when
> initialization fails in vpci_assign_device().
> 
> Those new functions remove the failed legacy/extended capability
> from the emulated legacy/extended capability list.

I think this needs to be at least 2 different changes.

First change adds the usage of REGISTER_VPCI_{LEGACY,EXTENDED}_CAP()
helpers, while second change introduces the masking of capabilities on
initialization failure.

Otherwise review is a bit complicated.

> What's more, change the definition of init_header() since it is
> not a capability and it is needed for all devices' PCI config space.
> 
> Note: call vpci_make_msix_hole() in the end of init_msix() since the
> change of sequence of init_header() and init_msix().
> 
> Signed-off-by: Jiqian Chen 
> ---
> cc: "Roger Pau Monné" 
> cc: Andrew Cooper 
> cc: Anthony PERARD 
> cc: Michal Orzel 
> cc: Jan Beulich 
> cc: Julien Grall 
> cc: Stefano Stabellini 
> ---
> v1->v2 changes:
> * Removed the "priorities" of initializing capabilities since it isn't used anymore.
> * Added new function vpci_capability_mask() and vpci_ext_capability_mask() to remove failed capability from list.
> * Called vpci_make_msix_hole() in the end of init_msix().
> 
> Best regards,
> Jiqian Chen.
> ---
>  xen/drivers/vpci/header.c  |   3 +-
>  xen/drivers/vpci/msi.c     |   2 +-
>  xen/drivers/vpci/msix.c    |   8 +-
>  xen/drivers/vpci/rebar.c   |   2 +-
>  xen/drivers/vpci/vpci.c    | 175 +++++++++++++++++++++++++++++++------
>  xen/include/xen/pci_regs.h |   1 +
>  xen/include/xen/vpci.h     |  26 ++++--
>  xen/include/xen/xen.lds.h  |   2 +-
>  8 files changed, 179 insertions(+), 40 deletions(-)
> 
> diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c
> index 6833d456566b..51a67d76ad8a 100644
> --- a/xen/drivers/vpci/header.c
> +++ b/xen/drivers/vpci/header.c
> @@ -848,7 +848,7 @@ static int vpci_init_ext_capability_list(struct pci_dev *pdev)
>      return 0;
>  }
>  
> -static int cf_check init_header(struct pci_dev *pdev)
> +int vpci_init_header(struct pci_dev *pdev)
>  {
>      uint16_t cmd;
>      uint64_t addr, size;
> @@ -1044,7 +1044,6 @@ static int cf_check init_header(struct pci_dev *pdev)
>      pci_conf_write16(pdev->sbdf, PCI_COMMAND, cmd);
>      return rc;
>  }
> -REGISTER_VPCI_INIT(init_header, VPCI_PRIORITY_MIDDLE);
>  
>  /*
>   * Local variables:
> diff --git a/xen/drivers/vpci/msi.c b/xen/drivers/vpci/msi.c
> index 66e5a8a116be..ca89ae9b9c22 100644
> --- a/xen/drivers/vpci/msi.c
> +++ b/xen/drivers/vpci/msi.c
> @@ -270,7 +270,7 @@ static int cf_check init_msi(struct pci_dev *pdev)
>  
>      return 0;
>  }
> -REGISTER_VPCI_INIT(init_msi, VPCI_PRIORITY_LOW);
> +REGISTER_VPCI_LEGACY_CAP(PCI_CAP_ID_MSI, init_msi);
>  
>  void vpci_dump_msi(void)
>  {
> diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c
> index 6bd8c55bb48e..6537374c79a0 100644
> --- a/xen/drivers/vpci/msix.c
> +++ b/xen/drivers/vpci/msix.c
> @@ -751,9 +751,13 @@ static int cf_check init_msix(struct pci_dev *pdev)
>      pdev->vpci->msix = msix;
>      list_add(&msix->next, &d->arch.hvm.msix_tables);
>  
> -    return 0;
> +    spin_lock(&pdev->vpci->lock);
> +    rc = vpci_make_msix_hole(pdev);
> +    spin_unlock(&pdev->vpci->lock);
> +
> +    return rc
>  }
> -REGISTER_VPCI_INIT(init_msix, VPCI_PRIORITY_HIGH);
> +REGISTER_VPCI_LEGACY_CAP(PCI_CAP_ID_MSIX, init_msix);
>  
>  /*
>   * Local variables:
> diff --git a/xen/drivers/vpci/rebar.c b/xen/drivers/vpci/rebar.c
> index 793937449af7..79858e5dc92f 100644
> --- a/xen/drivers/vpci/rebar.c
> +++ b/xen/drivers/vpci/rebar.c
> @@ -118,7 +118,7 @@ static int cf_check init_rebar(struct pci_dev *pdev)
>  
>      return 0;
>  }
> -REGISTER_VPCI_INIT(init_rebar, VPCI_PRIORITY_LOW);
> +REGISTER_VPCI_EXTEND_CAP(PCI_EXT_CAP_ID_REBAR, init_rebar);
>  
>  /*
>   * Local variables:
> diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c
> index 1e6aa5d799b9..f1f125bfdab1 100644
> --- a/xen/drivers/vpci/vpci.c
> +++ b/xen/drivers/vpci/vpci.c
> @@ -35,9 +35,25 @@ struct vpci_register {
>      uint32_t rsvdz_mask;
>  };
>  
> +static int vpci_register_cmp(const struct vpci_register *r1,
> +                             const struct vpci_register *r2)
> +{
> +    /* Return 0 if registers overlap. */
> +    if ( r1->offset < r2->offset + r2->size &&
> +         r2->offset < r1->offset + r1->size )
> +        return 0;
> +    if ( r1->offset < r2->offset )
> +        return -1;
> +    if ( r1->offset > r2->offset )
> +        return 1;
> +
> +    ASSERT_UNREACHABLE();
> +    return 0;
> +}
> +
>  #ifdef __XEN__
> -extern vpci_register_init_t *const __start_vpci_array[];
> -extern vpci_register_init_t *const __end_vpci_array[];
> +extern vpci_capability_t *const __start_vpci_array[];
> +extern vpci_capability_t *const __end_vpci_array[];
>  #define NUM_VPCI_INIT (__end_vpci_array - __start_vpci_array)
>  
>  #ifdef CONFIG_HAS_VPCI_GUEST_SUPPORT
> @@ -83,6 +99,133 @@ static int assign_virtual_sbdf(struct pci_dev *pdev)
>  
>  #endif /* CONFIG_HAS_VPCI_GUEST_SUPPORT */
>  
> +static void vpci_capability_mask(struct pci_dev *pdev,
> +                                 const unsigned int cap)
> +{
> +    const unsigned int size = 1;
> +    const unsigned int offset = pci_find_cap_offset(pdev->sbdf, cap);
> +    const struct vpci_register r = { .offset = offset, .size = size };
> +    struct vpci_register *rm;
> +    struct vpci *vpci = pdev->vpci;
> +
> +    spin_lock(&vpci->lock);
> +    list_for_each_entry ( rm, &vpci->handlers, node )
> +    {
> +        int cmp = vpci_register_cmp(&r, rm);
> +
> +        if ( !cmp && rm->offset == offset && rm->size == size )
> +        {
> +            struct vpci_register *pre = list_entry(rm->node.prev,
> +                                                   struct vpci_register,
> +                                                   node);
> +            struct vpci_register *next = list_entry(rm->node.next,
> +                                                    struct vpci_register,
> +                                                    node);
> +
> +            pre->private = next->private;
> +
> +            /* PCI_CAP_LIST_ID register of current capability */
> +            list_del(&rm->node);
> +            /* PCI_CAP_LIST_NEXT register of current capability */
> +            list_del(&next->node);
> +            spin_unlock(&vpci->lock);

Are you sure this works as intended?  The list is sorted, so if there
further handlers in between the two capabilities, like when handling
MSI capability, the next handler in the list won't point to the next
capability list handler.

> +
> +            xfree(rm);
> +            xfree(next);
> +            return;
> +        }
> +        if ( cmp <= 0 )
> +            break;
> +    }
> +    spin_unlock(&vpci->lock);
> +}
> +
> +static void vpci_ext_capability_mask(struct pci_dev *pdev,
> +                                     const unsigned int cap)
> +{
> +    const unsigned int size = 4;
> +    const unsigned int offset = pci_find_ext_capability(pdev->sbdf, cap);
> +    const struct vpci_register r = { .offset = offset, .size = size };
> +    struct vpci_register *rm;
> +    struct vpci *vpci = pdev->vpci;
> +
> +    spin_lock(&vpci->lock);
> +    list_for_each_entry ( rm, &vpci->handlers, node )
> +    {
> +        int cmp = vpci_register_cmp(&r, rm);
> +
> +        if ( !cmp && rm->offset == offset && rm->size == size )
> +        {
> +            struct vpci_register *pre;
> +            u32 pre_header, header = (u32)(uintptr_t)rm->private;
> +
> +            if ( offset == 0x100U && PCI_EXT_CAP_NEXT(header) == 0 )

It would be safer to check for next < 0x100 rather than explicitly
0.

> +            {
> +                rm->private = (void *)(uintptr_t)0;
> +                spin_unlock(&vpci->lock);
> +                return;
> +            }
> +            else if ( offset == 0x100U )

There's no need for the else branch, as the previous if has a return.

> +            {
> +                pre = rm;
> +                rm = list_entry(rm->node.next, struct vpci_register, node);
> +                pre->private = rm->private;
> +            }
> +            else
> +            {
> +                pre = list_entry(rm->node.prev, struct vpci_register, node);
> +                pre_header = (u32)(uintptr_t)pre->private;
> +                pre->private =
> +                    (void *)(uintptr_t)((pre_header & !PCI_EXT_CAP_NEXT_MASK) |

I think you want ~PCI_EXT_CAP_NEXT_MASK rather than !PCI_EXT_CAP_NEXT_MASK?

> +                                        (header & PCI_EXT_CAP_NEXT_MASK));
> +            }
> +            list_del(&rm->node);
> +            spin_unlock(&vpci->lock);
> +            xfree(rm);
> +            return;

Kind of the same complaint I had on the previous patch, this seems to
assume that capability handlers are always consecutive in the list of
handlers, which I don't think it's the case.

> +        }
> +        if ( cmp <= 0 )
> +            break;
> +    }
> +    spin_unlock(&vpci->lock);
> +}
> +
> +static void vpci_init_capabilities(struct pci_dev *pdev)
> +{
> +    for ( unsigned int i = 0; i < NUM_VPCI_INIT; i++ )
> +    {
> +        const vpci_capability_t *capability = __start_vpci_array[i];
> +        const unsigned int cap = capability->id;
> +        const bool is_ext = capability->is_ext;
> +        unsigned int pos;
> +        int rc;
> +
> +        if ( !is_hardware_domain(pdev->domain) && is_ext )
> +            continue;
> +
> +        if ( is_ext )
> +            pos = pci_find_ext_capability(pdev->sbdf, cap);
> +        else
> +            pos = pci_find_cap_offset(pdev->sbdf, cap);
> +
> +        if ( !pos )
> +            continue;
> +
> +        rc = capability->init(pdev);
> +
> +        if ( rc )
> +        {
> +            printk(XENLOG_WARNING "%pd %pp: %s cap %u init fail rc=%d, mask it\n",
> +                   pdev->domain, &pdev->sbdf,
> +                   is_ext ? "extended" : "legacy", cap, rc);
> +            if ( is_ext )
> +                vpci_ext_capability_mask(pdev, cap);
> +            else
> +                vpci_capability_mask(pdev, cap);
> +        }
> +    }
> +}
> +
>  void vpci_deassign_device(struct pci_dev *pdev)
>  {
>      unsigned int i;
> @@ -128,7 +271,6 @@ void vpci_deassign_device(struct pci_dev *pdev)
>  
>  int vpci_assign_device(struct pci_dev *pdev)
>  {
> -    unsigned int i;
>      const unsigned long *ro_map;
>      int rc = 0;
>  
> @@ -159,12 +301,11 @@ int vpci_assign_device(struct pci_dev *pdev)
>          goto out;
>  #endif
>  
> -    for ( i = 0; i < NUM_VPCI_INIT; i++ )
> -    {
> -        rc = __start_vpci_array[i](pdev);
> -        if ( rc )
> -            break;
> -    }
> +    rc = vpci_init_header(pdev);
> +    if ( rc )
> +        goto out;

If you use the out label here you can remove the __maybe_unused
attribute from it.

> +
> +    vpci_init_capabilities(pdev);
>  
>   out: __maybe_unused;
>      if ( rc )
> @@ -174,22 +315,6 @@ int vpci_assign_device(struct pci_dev *pdev)
>  }
>  #endif /* __XEN__ */
>  
> -static int vpci_register_cmp(const struct vpci_register *r1,
> -                             const struct vpci_register *r2)
> -{
> -    /* Return 0 if registers overlap. */
> -    if ( r1->offset < r2->offset + r2->size &&
> -         r2->offset < r1->offset + r1->size )
> -        return 0;
> -    if ( r1->offset < r2->offset )
> -        return -1;
> -    if ( r1->offset > r2->offset )
> -        return 1;
> -
> -    ASSERT_UNREACHABLE();
> -    return 0;
> -}
> -
>  /* Dummy hooks, writes are ignored, reads return 1's */
>  static uint32_t cf_check vpci_ignored_read(
>      const struct pci_dev *pdev, unsigned int reg, void *data)
> diff --git a/xen/include/xen/pci_regs.h b/xen/include/xen/pci_regs.h
> index 27b4f44eedf3..5fe6653fded4 100644
> --- a/xen/include/xen/pci_regs.h
> +++ b/xen/include/xen/pci_regs.h
> @@ -449,6 +449,7 @@
>  #define PCI_EXT_CAP_ID(header)		((header) & 0x0000ffff)
>  #define PCI_EXT_CAP_VER(header)		(((header) >> 16) & 0xf)
>  #define PCI_EXT_CAP_NEXT(header)	(((header) >> 20) & 0xffc)
> +#define PCI_EXT_CAP_NEXT_MASK		0xFFC00000U
>  
>  #define PCI_EXT_CAP_ID_ERR	1
>  #define PCI_EXT_CAP_ID_VC	2
> diff --git a/xen/include/xen/vpci.h b/xen/include/xen/vpci.h
> index 807401b2eaa2..5016ded64d89 100644
> --- a/xen/include/xen/vpci.h
> +++ b/xen/include/xen/vpci.h
> @@ -13,11 +13,11 @@ typedef uint32_t vpci_read_t(const struct pci_dev *pdev, unsigned int reg,
>  typedef void vpci_write_t(const struct pci_dev *pdev, unsigned int reg,
>                            uint32_t val, void *data);
>  
> -typedef int vpci_register_init_t(struct pci_dev *dev);
> -
> -#define VPCI_PRIORITY_HIGH      "1"
> -#define VPCI_PRIORITY_MIDDLE    "5"
> -#define VPCI_PRIORITY_LOW       "9"
> +typedef struct {
> +    unsigned int id;
> +    bool is_ext;
> +    int (*init)(struct pci_dev *pdev);
> +} vpci_capability_t;
>  
>  #define VPCI_ECAM_BDF(addr)     (((addr) & 0x0ffff000) >> 12)
>  
> @@ -29,9 +29,19 @@ typedef int vpci_register_init_t(struct pci_dev *dev);
>   */
>  #define VPCI_MAX_VIRT_DEV       (PCI_SLOT(~0) + 1)
>  
> -#define REGISTER_VPCI_INIT(x, p)                \
> -  static vpci_register_init_t *const x##_entry  \
> -               __used_section(".data.vpci." p) = (x)
> +#define REGISTER_VPCI_CAP(cap, x, ext) \
> +  static vpci_capability_t x##_t = { \
> +        .id = (cap), \
> +        .init = (x), \
> +        .is_ext = (ext), \
> +  }; \
> +  static vpci_capability_t *const x##_entry  \
> +               __used_section(".data.vpci.") = &(x##_t)
> +
> +#define REGISTER_VPCI_LEGACY_CAP(cap, x) REGISTER_VPCI_CAP(cap, x, false)
> +#define REGISTER_VPCI_EXTEND_CAP(cap, x) REGISTER_VPCI_CAP(cap, x, true)

Nit: I would use EXTENDED here, there's no need to keep both defines
the same length.

Thanks, Roger.


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Date: Tue, 15 Apr 2025 12:50:01 +0200
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH 3/5] x86/hvm: fix handling of accesses to partial r/o MMIO
 pages
To: Marek Marczykowski 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Andrew Cooper , xen-devel@lists.xenproject.org
References: <20250411105411.22334-4-roger.pau@citrix.com>
 
 
 
 
 <7c3c91d9-4de8-4910-b26e-8782a0f0d364@suse.com>
 
 <4dd5ada8-32e7-4b94-b2a4-51b20e09eb79@suse.com>
 
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On 15.04.2025 12:40, Marek Marczykowski wrote:
> On Tue, Apr 15, 2025 at 12:18:04PM +0200, Jan Beulich wrote:
>> On 15.04.2025 12:04, Roger Pau Monné wrote:
>>> On Tue, Apr 15, 2025 at 11:41:27AM +0200, Jan Beulich wrote:
>>>> On 15.04.2025 10:34, Roger Pau Monné wrote:
>>>>> Emulation of r/o MMIO accesses failing wouldn't be an issue from Xen's
>>>>> perspective, that would "just" result in the guest getting a #GP
>>>>> injected.
>>>>
>>>> That's not the part I'm worried about. What worries me is that we open up
>>>> another (or better: we're widening a) way to hit the emulator in the first
>>>> place. (Plus, as said, the issue with the not really tidy P2M type system.)
>>>
>>> But the hit would be limited to domains having r/o p2m_mmio_direct
>>> entries in the p2m, as otherwise the path would be unreachable?
>>
>> I fear I don't follow - all you look for in the newly extended conditional
>> is the type being p2m_mmio_direct. There's no r/o-ness being checked for
>> until we'd make it through the emulator and into subpage_mmio_accept().
> 
> But EPT violation can be hit on p2m_mmio_direct page only if it's a
> write and the page is read-only, no? Is there any other case that exists
> today?

Today and if everything works as it should - yes, I think so.

Jan


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Date: Tue, 15 Apr 2025 12:50:36 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: "Chen, Jiqian" 
Cc: "xen-devel@lists.xenproject.org" ,
	"Huang, Ray" 
Subject: Re: [PATCH v2 2/8] vpci/header: Emulate legacy capability list for
 host
Message-ID: 
References: <20250409064528.405573-1-Jiqian.Chen@amd.com>
 <20250409064528.405573-3-Jiqian.Chen@amd.com>
 
 
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On Tue, Apr 15, 2025 at 10:07:14AM +0000, Chen, Jiqian wrote:
> On 2025/4/15 17:25, Roger Pau Monné wrote:
> > On Wed, Apr 09, 2025 at 02:45:22PM +0800, Jiqian Chen wrote:
> >> +static int vpci_init_capability_list(struct pci_dev *pdev)
> >> +{
> >> +    int rc;
> >> +    bool mask_cap_list = false;
> >> +    bool is_hwdom = is_hardware_domain(pdev->domain);
> >> +    const unsigned int *caps = is_hwdom ? NULL : guest_supported_caps;
> >> +    const unsigned int n = is_hwdom ? 0 : ARRAY_SIZE(guest_supported_caps);
> >> +
> >> +    if ( pci_conf_read16(pdev->sbdf, PCI_STATUS) & PCI_STATUS_CAP_LIST )
> >> +    {
> >> +        unsigned int next, ttl = 48;
> >> +
> >> +        next = pci_find_next_cap_ttl(pdev->sbdf, PCI_CAPABILITY_LIST,
> >> +                                     caps, n, &ttl);
> >> +
> >> +        rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL,
> >> +                               PCI_CAPABILITY_LIST, 1,
> >> +                               (void *)(uintptr_t)next);
> >> +        if ( rc )
> >> +            return rc;
> >> +
> >> +        next &= ~3;
> >> +
> >> +        if ( !next && !is_hwdom )
> >> +            /*
> >> +             * If we don't have any supported capabilities to expose to the
> >> +             * guest, mask the PCI_STATUS_CAP_LIST bit in the status register.
> >> +             */
> >> +            mask_cap_list = true;
> >> +
> >> +        while ( next && ttl )
> >> +        {
> >> +            unsigned int pos = next;
> >> +
> >> +            next = pci_find_next_cap_ttl(pdev->sbdf, pos + PCI_CAP_LIST_NEXT,
> >> +                                         caps, n, &ttl);
> >> +
> >> +            rc = vpci_add_register(pdev->vpci, vpci_hw_read8, NULL,
> >> +                                   pos + PCI_CAP_LIST_ID, 1, NULL);
> > 
> > There's no need to add this handler for the hardware domain, that's
> > already the default behavior in that case.
> But if not, I have no handler to remove from capability list in next patch's hiding function vpci_capability_mask(),
> then I can't success to hide it.

Oh, I see, I have further comments on that approach, see the comments
on the followup patches.

Thanks, Roger.


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Date: Tue, 15 Apr 2025 13:02:37 +0200
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Subject: Re: [PATCH v1 03/14] xen/riscv: introduce ioremap()
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: 
 <6d91eeabe2735de93bfcf2a2420e2059a8f35e52.1744126720.git.oleksii.kurochko@gmail.com>
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On 15.04.2025 12:29, Oleksii Kurochko wrote:
> 
> On 4/10/25 5:13 PM, Jan Beulich wrote:
>> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>>> Based on RISC-V unpriviliged spec ( Version 20240411 ):
>>> ```
>>> For implementations that conform to the RISC-V Unix Platform Specification,
>>> I/O devices and DMA operations are required to access memory coherently and
>>> via strongly ordered I/O channels. Therefore, accesses to regular main memory
>>> regions that are concurrently accessed by external devices can also use the
>>> standard synchronization mechanisms. Implementations that do not conform
>>> to the Unix Platform Specification and/or in which devices do not access
>>> memory coherently will need to use mechanisms
>>> (which are currently platform-specific or device-specific) to enforce
>>> coherency.
>>>
>>> I/O regions in the address space should be considered non-cacheable
>>> regions in the PMAs for those regions. Such regions can be considered coherent
>>> by the PMA if they are not cached by any agent.
>>> ```
>>> and [1]:
>>> ```
>>> The current riscv linux implementation requires SOC system to support
>>> memory coherence between all I/O devices and CPUs. But some SOC systems
>>> cannot maintain the coherence and they need support cache clean/invalid
>>> operations to synchronize data.
>>>
>>> Current implementation is no problem with SiFive FU540, because FU540
>>> keeps all IO devices and DMA master devices coherence with CPU. But to a
>>> traditional SOC vendor, it may already have a stable non-coherency SOC
>>> system, the need is simply to replace the CPU with RV CPU and rebuild
>>> the whole system with IO-coherency is very expensive.
>>> ```
>>>
>>> and the fact that all known ( to me ) CPUs that support the H-extension
>>> and that ones is going to be supported by Xen have memory coherency
>>> between all I/O devices and CPUs, so it is currently safe to use the
>>> PAGE_HYPERVISOR attribute.
>>> However, in cases where a platform does not support memory coherency, it
>>> should support CMO extensions and Svpbmt. In this scenario, updates to
>>> ioremap will be necessary.
>>> For now, a compilation error will be generated to ensure that the need to
>>> update ioremap() is not overlooked.
>>>
>>> [1]https://patchwork.kernel.org/project/linux-riscv/patch/1555947870-23014-1-git-send-email-guoren@kernel.org/
>> But MMIO access correctness isn't just a matter of coherency. There may not
>> be any caching involved in most cases, or else you may observe significantly
>> delayed or even dropped (folded with later ones) writes, and reads may be
>> serviced from the cache instead of going to actual MMIO. Therefore ...
>>
>>> --- a/xen/arch/riscv/Kconfig
>>> +++ b/xen/arch/riscv/Kconfig
>>> @@ -15,6 +15,18 @@ config ARCH_DEFCONFIG
>>>   	string
>>>   	default "arch/riscv/configs/tiny64_defconfig"
>>>   
>>> +config HAS_SVPBMT
>>> +	bool
>>> +	help
>>> +	  This config enables usage of Svpbmt ISA-extension ( Supervisor-mode:
>>> +	  page-based memory types).
>>> +
>>> +	  The memory type for a page contains a combination of attributes
>>> +	  that indicate the cacheability, idempotency, and ordering
>>> +	  properties for access to that page.
>>> +
>>> +	  The Svpbmt extension is only available on 64-bit cpus.
>> ... I kind of expect this extension (or anything else that there might be) will need
>> making use of.
> 
> In cases where the Svpbmt extension isn't available, PMA (Physical Memory Attributes)
> is used to control which memory regions are cacheable, non-cacheable, readable, writable,
> etc. PMA is configured in M-mode by the firmware (e.g., OpenSBI), as is done in Andes
> cores, or it can be fixed at design time, as in SiFive cores.

How would things work if there was a need to map a RAM page uncacheable (via
ioremap() or otherwise)?

Jan


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Date: Tue, 15 Apr 2025 13:06:06 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jiqian Chen 
Cc: xen-devel@lists.xenproject.org, Huang Rui ,
	Anthony PERARD 
Subject: Re: [PATCH v2 5/8] vpci: Refactor vpci_remove_register to remove
 matched registers
Message-ID: 
References: <20250409064528.405573-1-Jiqian.Chen@amd.com>
 <20250409064528.405573-6-Jiqian.Chen@amd.com>
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In-Reply-To: <20250409064528.405573-6-Jiqian.Chen@amd.com>

On Wed, Apr 09, 2025 at 02:45:25PM +0800, Jiqian Chen wrote:
> vpci_remove_register() only supports removing a register in a time,
> but the follow-on changes need to remove all registers within a
> range. And it is only used for test. So, refactor it to support
> removing all matched registers in a calling time.
> 
> And it is no matter to remove a non exist register, so remove the
> __must_check prefix.
> 
> Signed-off-by: Jiqian Chen 
> ---
> cc: "Roger Pau Monné" 
> cc: Anthony PERARD 
> ---
> v1->v2 changes:
> new patch
> 
> Best regards,
> Jiqian Chen.
> ---
>  tools/tests/vpci/main.c |  4 ++--
>  xen/drivers/vpci/vpci.c | 23 ++++++++++++-----------
>  xen/include/xen/vpci.h  |  4 ++--
>  3 files changed, 16 insertions(+), 15 deletions(-)
> 
> diff --git a/tools/tests/vpci/main.c b/tools/tests/vpci/main.c
> index 33223db3eb77..ca72877d60cd 100644
> --- a/tools/tests/vpci/main.c
> +++ b/tools/tests/vpci/main.c
> @@ -132,10 +132,10 @@ static void vpci_write32_mask(const struct pci_dev *pdev, unsigned int reg,
>                                    rsvdz_mask))
>  
>  #define VPCI_REMOVE_REG(off, size)                                          \
> -    assert(!vpci_remove_register(test_pdev.vpci, off, size))
> +    assert(!vpci_remove_registers(test_pdev.vpci, off, size))
>  
>  #define VPCI_REMOVE_INVALID_REG(off, size)                                  \
> -    assert(vpci_remove_register(test_pdev.vpci, off, size))
> +    assert(vpci_remove_registers(test_pdev.vpci, off, size))
>  
>  /* Read a 32b register using all possible sizes. */
>  void multiread4_check(unsigned int reg, uint32_t val)
> diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c
> index f1f125bfdab1..115d3c5f0c84 100644
> --- a/xen/drivers/vpci/vpci.c
> +++ b/xen/drivers/vpci/vpci.c
> @@ -418,34 +418,35 @@ int vpci_add_register_mask(struct vpci *vpci, vpci_read_t *read_handler,
>      return 0;
>  }
>  
> -int vpci_remove_register(struct vpci *vpci, unsigned int offset,
> -                         unsigned int size)
> +int vpci_remove_registers(struct vpci *vpci, unsigned int offset,
> +                          unsigned int size)
>  {
>      const struct vpci_register r = { .offset = offset, .size = size };
>      struct vpci_register *rm;
> +    int rc = -ENOENT;

Thinking about this, not sure returning ENOENT makes much sense now,
as the (new) purpose of the function is to zap all handlers from a
range, without possibly prior knowledge whether there are any
handlers in the range.

>  
>      spin_lock(&vpci->lock);
>      list_for_each_entry ( rm, &vpci->handlers, node )
>      {
>          int cmp = vpci_register_cmp(&r, rm);
>  
> -        /*
> -         * NB: do not use a switch so that we can use break to
> -         * get out of the list loop earlier if required.
> -         */
> -        if ( !cmp && rm->offset == offset && rm->size == size )
> +        if ( !cmp )
>          {
> +            struct vpci_register *prev =
> +                list_entry(rm->node.prev, struct vpci_register, node);
> +
>              list_del(&rm->node);
> -            spin_unlock(&vpci->lock);
>              xfree(rm);
> -            return 0;
> +            rm = prev;
> +            rc = 0;

I think you want some extra checks here to ensure you are not removing
partially overlapping registers.  IOW, you need to assert the register
in rm is fully contained inside the range to zap.

It might be best to simply not use vpci_register_cmp(), and instead
open code the comparison here to ensure "rm" is fuly contained inside
the [offset, offset + size - 1] range.  You will need to return an
error if there's a partially overlapping register.

Thanks, Roger.


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From: Luca Fancellu 
To: Julien Grall 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Bertrand Marquis
	, Michal Orzel , Volodymyr
 Babchuk 
Subject: Re: [PATCH v3 7/7] arm/mpu: Implement setup_mpu for MPU system
Thread-Topic: [PATCH v3 7/7] arm/mpu: Implement setup_mpu for MPU system
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Date: Tue, 15 Apr 2025 11:10:05 +0000
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Date: Tue, 15 Apr 2025 13:11:28 +0200
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User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v1 05/14] xen/riscv: introduce platform_get_irq()
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Romain Caritey , xen-devel@lists.xenproject.org
References: 
 <6c6e7482cc3b0332f5724c80bf16931fe2d793ae.1744126720.git.oleksii.kurochko@gmail.com>
 <31de00cb-b3b4-4d15-a128-930dc1c7ccdf@suse.com>
Content-Language: en-US
From: Oleksii Kurochko 
In-Reply-To: <31de00cb-b3b4-4d15-a128-930dc1c7ccdf@suse.com>

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On 4/10/25 5:35 PM, Jan Beulich wrote:
> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>> @@ -21,6 +22,22 @@ static struct intc_info __ro_after_init aplic_info = {
>>       .hw_version = INTC_APLIC,
>>   };
>>   
>> +static int aplic_irq_xlate(const uint32_t *intspec, unsigned int intsize,
> As you start adding functions calling indirectly, please consider adding cf_check
> right away, even if right now this has no effect on RISC-V. That'll save you from
> going through the entire RISC-V subtree later on to find them all.

Sure. I thought that it is a feature for x86 as I haven't seen such attribute for
Arm and RISC-V in GCC manuals.

>
>> +                           unsigned int *out_hwirq,
>> +                           unsigned int *out_type)
>> +{
>> +    if ( intsize < 2 )
>> +        return -EINVAL;
>> +
>> +    /* Mapping 1:1 */
>> +    *out_hwirq = intspec[0];
>> +
>> +    if ( out_type )
>> +        *out_type = intspec[1] & IRQ_TYPE_SENSE_MASK;
>> +
>> +    return 0;
>> +}
>> +
>>   static int __init aplic_preinit(struct dt_device_node *node, const void *dat)
>>   {
>>       if ( aplic_info.node )
>> @@ -35,6 +52,8 @@ static int __init aplic_preinit(struct dt_device_node *node, const void *dat)
>>   
>>       aplic_info.node = node;
>>   
>> +    dt_irq_xlate = aplic_irq_xlate;
>> +
>>       return 0;
>>   }
>>   
>> --- a/xen/arch/riscv/include/asm/irq.h
>> +++ b/xen/arch/riscv/include/asm/irq.h
>> @@ -47,6 +47,9 @@ static inline void arch_move_irqs(struct vcpu *v)
>>       BUG_ON("unimplemented");
>>   }
>>   
>> +struct dt_device_node;
>> +int platform_get_irq(const struct dt_device_node *device, int index);
> And I assume callers of this will appear later in the series.

Yes, it will be called ns16550_uart_dt_init() when CONFIG_NS16550 will be enabled for RISC-V.

>
>> --- a/xen/arch/riscv/irq.c
>> +++ b/xen/arch/riscv/irq.c
>> @@ -7,11 +7,52 @@
>>    */
>>   
>>   #include 
>> +#include 
>> +#include 
>>   #include 
>>   #include 
>>   
>>   static irq_desc_t irq_desc[NR_IRQS];
>>   
>> +static bool irq_validate_new_type(unsigned int curr, unsigned int new)
>> +{
>> +    return (curr == IRQ_TYPE_INVALID || curr == new );
>> +}
>> +
>> +static int irq_set_type(unsigned int irq, unsigned int type)
>> +{
>> +    unsigned long flags;
>> +    struct irq_desc *desc = irq_to_desc(irq);
>> +    int ret = -EBUSY;
>> +
>> +    spin_lock_irqsave(&desc->lock, flags);
>> +
>> +    if ( !irq_validate_new_type(desc->arch.type, type) )
>> +        goto err;
>> +
>> +    desc->arch.type = type;
>> +
>> +    ret = 0;
>> +
>> +err:
> Labels indented by at least one blank please.
>
>> +    spin_unlock_irqrestore(&desc->lock, flags);
>> +
>> +    return ret;
>> +}
>> +
>> +int platform_get_irq(const struct dt_device_node *device, int index)
>> +{
>> +    struct dt_irq dt_irq;
>> +
>> +    if ( dt_device_get_irq(device, index, &dt_irq) )
>> +        return -1;
>> +
>> +    if ( irq_set_type(dt_irq.irq, dt_irq.type) )
>> +        return -1;
> Can you please return proper -E... values, perhaps ones coming back from the
> functions called?

Sure, I will use -EINVAL. (or ,perhaps, it  will be better to introduce ret and
return what dt_device_get_irq()/irq_set_type() returns in the case of failure.

~ Oleksii

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On 4/10/25 5:35 PM, Jan Beulich wrote:

    

    

      
On 08.04.2025 17:57, Oleksii Kurochko wrote:


      

        
@@ -21,6 +22,22 @@ static struct intc_info __ro_after_init aplic_info = {
     .hw_version = INTC_APLIC,
 };
 
+static int aplic_irq_xlate(const uint32_t *intspec, unsigned int intsize,


      

      
As you start adding functions calling indirectly, please consider adding cf_check
right away, even if right now this has no effect on RISC-V. That'll save you from
going through the entire RISC-V subtree later on to find them all.

    

    
Sure. I thought that it is a feature for x86 as I haven't seen such attribute for
Arm and RISC-V in GCC manuals.



    

      



      

        
+                           unsigned int *out_hwirq,
+                           unsigned int *out_type)
+{
+    if ( intsize < 2 )
+        return -EINVAL;
+
+    /* Mapping 1:1 */
+    *out_hwirq = intspec[0];
+
+    if ( out_type )
+        *out_type = intspec[1] & IRQ_TYPE_SENSE_MASK;
+
+    return 0;
+}
+
 static int __init aplic_preinit(struct dt_device_node *node, const void *dat)
 {
     if ( aplic_info.node )
@@ -35,6 +52,8 @@ static int __init aplic_preinit(struct dt_device_node *node, const void *dat)
 
     aplic_info.node = node;
 
+    dt_irq_xlate = aplic_irq_xlate;
+
     return 0;
 }
 
--- a/xen/arch/riscv/include/asm/irq.h
+++ b/xen/arch/riscv/include/asm/irq.h
@@ -47,6 +47,9 @@ static inline void arch_move_irqs(struct vcpu *v)
     BUG_ON("unimplemented");
 }
 
+struct dt_device_node;
+int platform_get_irq(const struct dt_device_node *device, int index);


      

      
And I assume callers of this will appear later in the series.

    

    
Yes, it will be called ns16550_uart_dt_init() when CONFIG_NS16550 will be enabled for RISC-V.



    

      



      

        
--- a/xen/arch/riscv/irq.c
+++ b/xen/arch/riscv/irq.c
@@ -7,11 +7,52 @@
  */
 
 #include <xen/bug.h>
+#include <xen/device_tree.h>
+#include <xen/errno.h>
 #include <xen/init.h>
 #include <xen/irq.h>
 
 static irq_desc_t irq_desc[NR_IRQS];
 
+static bool irq_validate_new_type(unsigned int curr, unsigned int new)
+{
+    return (curr == IRQ_TYPE_INVALID || curr == new );
+}
+
+static int irq_set_type(unsigned int irq, unsigned int type)
+{
+    unsigned long flags;
+    struct irq_desc *desc = irq_to_desc(irq);
+    int ret = -EBUSY;
+
+    spin_lock_irqsave(&desc->lock, flags);
+
+    if ( !irq_validate_new_type(desc->arch.type, type) )
+        goto err;
+
+    desc->arch.type = type;
+
+    ret = 0;
+
+err:


      

      
Labels indented by at least one blank please.



      

        
+    spin_unlock_irqrestore(&desc->lock, flags);
+
+    return ret;
+}
+
+int platform_get_irq(const struct dt_device_node *device, int index)
+{
+    struct dt_irq dt_irq;
+
+    if ( dt_device_get_irq(device, index, &dt_irq) )
+        return -1;
+
+    if ( irq_set_type(dt_irq.irq, dt_irq.type) )
+        return -1;


      

      
Can you please return proper -E... values, perhaps ones coming back from the
functions called?

    

    
Sure, I will use -EINVAL. (or ,perhaps, it  will be better to introduce ret and
return what dt_device_get_irq()/irq_set_type() returns in the case of failure.



    
~ Oleksii


  


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On 14.04.2025 21:19, Andrii Sultanov wrote:
> @@ -748,6 +746,7 @@ static u16 __init parse_ivhd_device_special(
>  {
>      u16 dev_length, bdf;
>      unsigned int apic, idx;
> +    pci_sbdf_t sbdf;

Why does bdf need keeping around here?

> @@ -335,20 +336,18 @@ void cf_check amd_iommu_ioapic_update_ire(
>      new_rte.raw = rte;
>  
>      /* get device id of ioapic devices */
> -    bdf = ioapic_sbdf[idx].bdf;
> -    seg = ioapic_sbdf[idx].seg;
> -    iommu = find_iommu_for_device(PCI_SBDF(seg, bdf));
> +    sbdf = ioapic_sbdf[idx].sbdf;
> +    iommu = find_iommu_for_device(sbdf);
>      if ( !iommu )
>      {
> -        AMD_IOMMU_WARN("failed to find IOMMU for IO-APIC @ %04x:%04x\n",
> -                       seg, bdf);
> +        AMD_IOMMU_WARN("failed to find IOMMU for IO-APIC @ %pp\n", &sbdf);

Hmm, this one's somewhat questionable: An IO-APIC isn't a PCI device, so
making its "coordinates" look like one can be confusing.

> @@ -369,7 +368,8 @@ unsigned int cf_check amd_iommu_read_ioapic_from_ire(
>      unsigned int offset;
>      unsigned int val = __io_apic_read(apic, reg);
>      unsigned int pin = (reg - 0x10) / 2;
> -    uint16_t seg, bdf, req_id;
> +    pci_sbdf_t sbdf;
> +    uint16_t req_id;
>      const struct amd_iommu *iommu;
>      union irte_ptr entry;
>  
> @@ -381,12 +381,11 @@ unsigned int cf_check amd_iommu_read_ioapic_from_ire(
>      if ( offset >= INTREMAP_MAX_ENTRIES )
>          return val;
>  
> -    seg = ioapic_sbdf[idx].seg;
> -    bdf = ioapic_sbdf[idx].bdf;
> -    iommu = find_iommu_for_device(PCI_SBDF(seg, bdf));
> +    sbdf = ioapic_sbdf[idx].sbdf;
> +    iommu = find_iommu_for_device(sbdf);
>      if ( !iommu )
>          return val;
> -    req_id = get_intremap_requestor_id(seg, bdf);
> +    req_id = get_intremap_requestor_id(sbdf.seg, sbdf.bdf);
>      entry = get_intremap_entry(iommu, req_id, offset);
>  
>      if ( !(reg & 1) )

Is a local variable here warranted in the first place?

Jan


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Date: Tue, 15 Apr 2025 13:23:06 +0200
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Subject: Re: [PATCH v1 05/14] xen/riscv: introduce platform_get_irq()
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
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On 15.04.2025 13:11, Oleksii Kurochko wrote:
> On 4/10/25 5:35 PM, Jan Beulich wrote:
>> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>>> @@ -21,6 +22,22 @@ static struct intc_info __ro_after_init aplic_info = {
>>>       .hw_version = INTC_APLIC,
>>>   };
>>>   
>>> +static int aplic_irq_xlate(const uint32_t *intspec, unsigned int intsize,
>> As you start adding functions calling indirectly, please consider adding cf_check
>> right away, even if right now this has no effect on RISC-V. That'll save you from
>> going through the entire RISC-V subtree later on to find them all.
> 
> Sure. I thought that it is a feature for x86 as I haven't seen such attribute for
> Arm and RISC-V in GCC manuals.

And that looks to be correct. I was under the (admittedly vague) impression
Arm64 had something equivalent in hardware, which then merely needs enabling
in the compiler. Not sure about RISC-V, but seeing the endless flow of
patches enabling new extensions in binutils, it would perhaps even be
surprising if nothing along these lines was already in the works somewhere.

Jan


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On 15/04/2025 13:10, Luca Fancellu wrote:
> Hi Julien,
> 
>> On 15 Apr 2025, at 11:20, Julien Grall  wrote:
>>
>> Hi Luca,
>>
>> On 15/04/2025 16:55, Luca Fancellu wrote:
>>> Hi Julien,
>>>>>>> +static void __init setup_mpu(void)
>>>>>>> +{
>>>>>>> +    register_t prenr;
>>>>>>> +    unsigned int i = 0;
>>>>>>> +
>>>>>>> +    /*
>>>>>>> +     * MPUIR_EL2.Region[0:7] identifies the number of regions supported by
>>>>>>> +     * the EL2 MPU.
>>>>>>> +     */
>>>>>>> +    max_xen_mpumap = (uint8_t)(READ_SYSREG(MPUIR_EL2) & NUM_MPU_REGIONS_MASK);
>>>>>>> +
>>>>>>> +    /* PRENR_EL2 has the N bit set if the N region is enabled, N < 32 */
>>>>>>> +    prenr = (READ_SYSREG(PRENR_EL2) & PRENR_MASK);
>>>>>>> +
>>>>>>> +    /*
>>>>>>> +     * Set the bitfield for regions enabled in assembly boot-time.
>>>>>>> +     * This code works under the assumption that the code in head.S has
>>>>>>> +     * allocated and enabled regions below 32 (N < 32).
>>>>>>> +
>>>>>> This is a bit fragile. I think it would be better if the bitmap is set by head.S as we add the regions. Same for ...
>>>>> So, I was trying to avoid that because in that case we need to place xen_mpumap out of the BSS and start
>>>>> manipulating the bitmap from asm, instead I was hoping to use the C code, I understand that if someone
>>>>> wants to have more than 31 region as boot region this might break, but it’s also a bit unlikely?
>>>>
>>>> The 31 is only part of the problem. The other problem is there is at least one other places in Xen (i.e. as early_fdt_map()) which will also create an entry in the MPU before setup_mm()/setup_mpu() is called. I am a bit concerned that the assumption is going to spread and yet we have no way to programmatically check if this will be broken.
>>> If we would like to find ways, we could check eventually for clashes on enabled MPU regions;
>>> so the only part where a region is created in the C world without the assistance of xen_mpumap is early_fdt_map(),
>>> asserts etc could be used in one or both setup_mpu and early_fdt_map to prevent breakage.
>>>>>
>>>> Furthermore, right now, you are hardcoding the slot used and updating the MPU. But if you had the bitmap updated, you could just look up for a free slot.
>>> of course, but still the early DTB map is temporary and it will be gone after boot, so it won’t impact much unless I’m
>>> missing something.
>>
>> It doesn't really matter whether the region is temporary or not. My concern is you are making assumption that are difficult to track (they are not documented where a developper would most likely look at).
>>
>> So if we still want to hardcode the value, then this should be documented in head.S and probably in a layout.h (or similar) so there is a single place where the MPU layout is described.
> 
> Sure, I’m fine with documenting everything, let’s see ...
> 
>>
>>>>
>>>>> So I was balancing the pros to manipulate everything from the C world against the cons (boot region > 31).
>>>>> Is it still your preferred way to handle everything from asm?
>>>>
>>>> Yes. I don't think the change in asm will be large and this would allow to remove other assumptions (like in the FDT mapping code).
>>> not large, but still something to be maintained, we will need arm64/arm32 code to set/clear bits on the bitmap
>>> (causing duplication with bitops.c), code to save things on the xen_mpumap, code to clean/invalidate dcache for the entries in xen_mpumap and finally we will need to keep the code aligned to the implementation of the bitmap
>>> (which is fairly stable, but still needs to be taken into account).
>>
>> I understand the changes and risks, but I still think this is the right approach. Let see what the other maintainers think.
> 
> what the other maintainers thinks about this one. 
I read the thread and my opinion is that we should do that in ASM even it if
means more code and possible duplication. From maintainer perspective this is
easier to handle than assumptions which are more error prone and difficult to
change in the future.

> 
>>
>>>>
>>>> As a side note, I noticed that the MPU entries are not cleared before we enable the MPU. Is there anything in the boot protocol that guarantee all the entries will be invalid? If not, then I think we need to clear the entries.
>>>>
>>>> Otherwise, your current logic doesn't work. That said, I think it would still be necessary even if we get rid of your logic because we don't know the content of the MPU entries.
>>> The PRLAR.EN bit resets to zero on a warm reset, so any region will be always disabled unless programmed, I thought it is enough.
>>
>> This is only telling me the state PRLAR.EN when the CPU is initially turn on. This doesn't tell me the value of the bit when jumping in Xen.
>>
>> I am making the difference because there might be another software running at EL2 before jumping into Xen (e.g. bootloader, or even a previous Xen if we were using Kexec) which could use the MPU.
>>
>> So I am looking for some details on how the expected state of the system when jumping to an OS/hypervisor. For a comparison, on the MMU side, we have the Linux arm64 Image protocol that will specific how
>> a bootloader needs to configure the system.
> 
> Ok I now understand the question, so I think we still could use the Linux arm64 Image protocol, but we will need to define what we expect for the MPU, is docs/misc/arm/booting.txt
> the right place for it? Shall we start a different thread?
Please start a new thread for documenting booting protocol for ARMv8-R.

~Michal



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Date: Tue, 15 Apr 2025 12:30:08 +0100
Message-ID: 
CC: Jason Andryuk , Xenia Ragiadakou
	, Stefano Stabellini ,
	Michal Orzel , Andrew Cooper
	, =?utf-8?q?Roger_Pau_Monn=C3=A9?=
	, Julien Grall , Bertrand Marquis
	, ,
	"consulting@bugseng.com" 
Subject: Re: [PATCH v3 08/16] x86/hyperlaunch: Add helpers to locate
 multiboot modules
From: Alejandro Vallejo 
To: Jan Beulich 
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References: <20250408160802.49870-1-agarciav@amd.com>
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On Tue Apr 15, 2025 at 7:05 AM BST, Jan Beulich wrote:
> On 14.04.2025 20:01, Alejandro Vallejo wrote:
>> On Mon Apr 14, 2025 at 4:05 PM BST, Jan Beulich wrote:
>>> On 14.04.2025 15:37, Alejandro Vallejo wrote:
>>>> On Thu Apr 10, 2025 at 11:42 AM BST, Jan Beulich wrote:
>>>>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>>>>> +/*
>>>>>> + * Locate a multiboot module given its node offset in the FDT.
>>>>>> + *
>>>>>> + * The module location may be given via either FDT property:
>>>>>> + *     * reg =3D 
>>>>>> + *         * Mutates `bi` to append the module.
>>>>>> + *     * module-index =3D 
>>>>>> + *         * Leaves `bi` unchanged.
>>>>>> + *
>>>>>> + * @param fdt           Pointer to the full FDT.
>>>>>> + * @param node          Offset for the module node.
>>>>>> + * @param address_cells Number of 4-octet cells that make up an "ad=
dress".
>>>>>> + * @param size_cells    Number of 4-octet cells that make up a "siz=
e".
>>>>>> + * @param bi[inout]     Xen's representation of the boot parameters=
.
>>>>>> + * @return              -EINVAL on malformed nodes, otherwise
>>>>>> + *                      index inside `bi->mods`
>>>>>> + */
>>>>>> +int __init fdt_read_multiboot_module(const void *fdt, int node,
>>>>>> +                                     int address_cells, int size_ce=
lls,
>>>>>> +                                     struct boot_info *bi)
>>>>>
>>>>> Functions without callers and non-static ones without declarations ar=
e
>>>>> disliked by Misra.
>>>>
>>>> Can't do much about it if I want them to stand alone in a single patch=
.
>>>> Otherwise the following ones become quite unwieldy to look at. All I c=
an
>>>> say is that this function becomes static and with a caller on the next
>>>> patch.
>>>
>>> Which means you need to touch this again anyway. Perhaps we need a Misr=
a
>>> deviation for __maybe_unused functions / data, in which case you could
>>> use that here and strip it along with making the function static. Cc-in=
g
>>> Bugseng folks.
>>=20
>> It's a transient violation, sure. Do we care about transient MISRA
>> violations though? I understand the importance of bisectability, but
>> AUIU MISRA compliance matters to the extent that that the tip is
>> compliant rather than the intermediate steps?
>
> Thing is that quite a few rules are blocking now. I haven't checked wheth=
er
> the one here (already) is; if it isn't, we can't exclude it will be by th=
e
> time this patch is committed. If then the next patch isn't committed
> together with it, we'd face a CI failure.
>
>> Another option would be to fold them this patch and the next together
>> after both get their R-by. As I said, I assumed you'd rather see them in
>> isolation for purposes of review.
>
> As it looks it's all plain code additions, so reviewability would merely
> mildly suffer from patch size. But afaict there would be no loss of clari=
ty.
>
>>>>>> +    /* Otherwise location given as a `reg` property. */
>>>>>> +    prop =3D fdt_get_property(fdt, node, "reg", NULL);
>>>>>> +
>>>>>> +    if ( !prop )
>>>>>> +    {
>>>>>> +        printk("  No location for multiboot,module\n");
>>>>>> +        return -EINVAL;
>>>>>> +    }
>>>>>> +    if ( fdt_get_property(fdt, node, "module-index", NULL) )
>>>>>> +    {
>>>>>> +        printk("  Location of multiboot,module defined multiple tim=
es\n");
>>>>>> +        return -EINVAL;
>>>>>> +    }
>>>>>> +
>>>>>> +    ret =3D read_fdt_prop_as_reg(prop, address_cells, size_cells, &=
addr, &size);
>>>>>> +
>>>>>> +    if ( ret < 0 )
>>>>>> +    {
>>>>>> +        printk("  Failed reading reg for multiboot,module\n");
>>>>>> +        return -EINVAL;
>>>>>> +    }
>>>>>> +
>>>>>> +    idx =3D bi->nr_modules + 1;
>>>>>
>>>>> This at least looks like an off-by-one. If the addition of 1 is reall=
y
>>>>> intended, I think it needs commenting on.
>>>>
>>>> Seems to be, yes. The underlying array is a bit bizarre. It's sizes as
>>>> MAX_NR_BOOTMODS + 1, with the first one being the DTB itself. I guess
>>>> the intent was to take it into account, but bi->nr_modules is
>>>> initialised to the number of multiboot modules, so it SHOULD be alread=
y
>>>> taking it into account.
>>>>
>>>> Also, the logic for bounds checking seems... off (because of the + 1 I
>>>> mentioned before). Or at least confusing, so I've moved to using
>>>> ARRAY_SIZE(bi->mods) rather than explicitly comparing against
>>>> MAX_NR_BOOTMODS.
>>>>
>>>> The array is MAX_NR_BOOTMODS + 1 in length, so it's just more cognitiv=
e
>>>> load than I'm comfortable with.
>>>
>>> If I'm not mistaken the +1 is inherited from the modules array we had i=
n
>>> the past, where we wanted 1 extra slot for Xen itself. Hence before you
>>> move to using ARRAY_SIZE() everywhere it needs to really be clear what
>>> the +1 here is used for.
>>=20
>> Ew.  Ok, just looked at the code in multiboot_fill_boot_info and indeed
>> the arrangement is for all multiboot modules to be in front, and Xen to
>> be appended. But bi->nr_modules only lists multiboot modules, so
>> increasing that value is therefore not enough (or
>> next_boot_module_index() would fail).
>>=20
>> I need to have a proper read on how this is all stitched together.  I
>> may simply swap BOOTMOD_XEN with the next entry on append. Though my
>> preference would be to _not_ have Xen as part of the module list to
>> begin with. Before boot_info that was probably a place as good as any,
>> but this would be much better off in a dedicated field.
>>=20
>> I don't see much in terms of usage though. Why is it being added at all?
>
> For hyperlaunch I fear it's you who needs to answer this question. For
> pre-hyperlaunch it's (primarily?) for consider_modules(), iirc. See two
> of the three comments ahead of its non-recursive invocations.
>
> Jan

There's no specific need for it on hyperlaunch AFAIK. Fixing
consider_modules to not require Xen being on the list of modules is easy
enough on both arm and x86 (it's a matter of passing the boot_info in
full rather than array + size), but I fear there may be more instances of
such checks.

I'll let it be for the time being and take a mental note to untangle
it later on. For this I'll simply ensure the append logic maintains Xen
at the back, as a sentinel of sorts for the module list, and document
that behaviour in the boot_info itself.

Cheers,
Alejandro


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Date: Tue, 15 Apr 2025 12:37:49 +0100
Message-ID: 
From: Alejandro Vallejo 
To: Jan Beulich 
CC: , "Daniel P. Smith"
	, Jason Andryuk , "Xenia
 Ragiadakou" , Stefano Stabellini
	, Michal Orzel , "Andrew
 Cooper" , =?utf-8?q?Roger_Pau_Monn=C3=A9?=
	, Julien Grall , Bertrand Marquis
	, Denis Mukhin 
Subject: Re: [PATCH v3 12/16] x86/hyperlaunch: add domain id parsing to
 domain config
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On Tue Apr 15, 2025 at 7:21 AM BST, Jan Beulich wrote:
> On 14.04.2025 20:07, Alejandro Vallejo wrote:
>> On Wed Apr 9, 2025 at 11:15 PM BST, Denis Mukhin wrote:
>>> On Tuesday, April 8th, 2025 at 9:07 AM, Alejandro Vallejo  wrote:
>>>> @@ -233,6 +264,12 @@ static int __init process_domain_node(
>>>> return -ENODATA;
>>>> }
>>>>
>>>> + if ( bd->domid =3D=3D DOMID_INVALID )
>>>>
>>>> + bd->domid =3D get_initial_domain_id();
>>>>
>>>> + else if ( bd->domid !=3D get_initial_domain_id() )
>>>>
>>>> + printk(XENLOG_WARNING
>>>> + "WARN: Booting without initial domid not supported.\n");
>>>
>>> Drop WARN since the log message is XENLOG_WARNING level already?
>>=20
>> As mentioned elsewhere, the point of those prefixes are to be readable.
>
> This, however, imo is a matter of consistency across the codebase, not ju=
st
> within hyperlaunch.

I agree. There is precedent though for certain printks to have a
collective pattern for ease of reading (e.g: spec_ctrl.c when printing
mitigations). With I'm merely justifying the 2 spaces followed by
lowercase.

I did try to remove them and it was strictly harder to know what they
referred to.

> Plus (again imo) if anything, prefixes that are part of
> the log output should contain proper words ("Warning:" or "Error:"), and
> they shouldn't needlessly "shout" (i.e. "FATAL:" is okay-ish to be all ca=
ps,
> but the others aren't).
>
> Jan

Right. I'm happy to rewrite them as "Warning: ..." and "Error: ..."

Cheers,
Alejandro


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Date: Tue, 15 Apr 2025 12:59:09 +0100
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CC: "Daniel P. Smith" , Jason Andryuk
	, Xenia Ragiadakou ,
	"Stefano Stabellini" , Michal Orzel
	, Andrew Cooper ,
	=?utf-8?q?Roger_Pau_Monn=C3=A9?= ,
	
Subject: Re: [PATCH v3 11/16] x86/hyperlaunch: locate dom0 initrd with
 hyperlaunch
From: Alejandro Vallejo 
To: Jan Beulich 
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On Tue Apr 15, 2025 at 7:17 AM BST, Jan Beulich wrote:
> On 14.04.2025 19:27, Alejandro Vallejo wrote:
>> On Mon Apr 14, 2025 at 6:06 PM BST, Alejandro Vallejo wrote:
>>> On Thu Apr 10, 2025 at 12:34 PM BST, Jan Beulich wrote:
>>>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>>>
>>>>> +            printk("  ramdisk: boot module %d\n", idx);
>>>>> +            bi->mods[idx].type =3D BOOTMOD_RAMDISK;
>>>>> +            bd->module =3D &bi->mods[idx];
>>>>
>>>> The field's named "module" now, but that now ends up inconsistent with
>>>> naming used elsewhere, as is pretty noticeable here.
>>>
>>> Well, yes. It is confusing. Also, the DTB is called multiboot,ramdisk,
>>> because multiboot,module is already used to detect what nodes are
>>> expressed as multiboot,modules. I'm considering going back and calling
>>> them ramdisk again. If anything, to avoid the ambiguity between
>>> domain modules and multiboot modules. e.g: a kernel is a multiboot
>>> module, but not a domain module.
>>=20
>> Particularly when misc/arm/device-tree/booting.txt already states that
>> the initrd for dom0 ought to be provided with the "multiboot,ramdisk"
>> string in the "compatible" prop.  Deviating from that is just going to
>> make it far more annoying to unify arm and x86 in the future.  And
>> calling those ramdisks anything but ramdisk internally is just plain
>> confusing (as evidenced in the current series).
>
> Yet the limitation of this is quite obvious: How would you express
> multiple such items?

With multiple such nodes.

  initrd1 {
      compatible =3D "multiboot,ramdisk", "multiboot,module"
      module-idx =3D <2>
  };
  initrd2 {
      compatible =3D "multiboot,ramdisk", "multiboot,module"
      module-idx =3D <3>
  };

as is done in dom0less. This is not a hypothetical, it's already
comitted.

> Have many "ramdisk"s?

As many as I require. If I was booting Xen(dom0+initrd) on
Xen(hyperlaunch), that'd be 2 (with Xen passed as the kernel).

> Even if some of them serve an entirely different purpose?

The purpose of a ramdisk/initrd is of no concern to the hypervisor. They ar=
e
specially crafted blobs consumed by kernels for purposes of bootstrap.

> See how Linux has gone to tuck together multiple CPIOs, as they can
> have only one thing called "ramdisk" (which, aiui, now no longer truly
> is).

That's an internal Linux matter. If they need 1, we'll pass 1. We do
need several such blobs, because some OSs do need them. Namely, Xen. And
AFAICS we call them modules mostly because (a) Xen does not have the
module infrastructure that Linux has, which would causes ambiguities and
(b) is typically loaded via multiboot, which does call each blob a
module.

>
>> So... how frontally opposed would you be to restoring the ramdisk
>> nomenclature? Also, for ease of rebasing future patches it'd be far
>> nicer to go back to ramdisk rather than reinventing some new name.
>
> Well, I fear I wouldn't ack such a patch. If everyone else agrees
> that "ramdisk" is the best of all names (or at least getting close),
> I'd perhaps mumble over, but let it go in.

Ok... When I send v4 I'll do so keeping the "module" rename. Meanwhile,
I'll try to think of some options. Calling Xen's modules and the booted
kernel modules the same way is just way too confusing.

I take it you have the same dislike for initrd as you do for ramdisk?

>
> (Only partly as a joke: If we dislike "module", how about "blob" or
> some such?)

Better not. Blob makes "kernel" sound like an adjective: Kernel blob.

There might be some other suitable word. I'll think about it.

Cheers,
Alejandro


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Date: Tue, 15 Apr 2025 13:05:00 +0100
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Subject: Re: [PATCH v3 12/16] x86/hyperlaunch: add domain id parsing to
 domain config
From: Alejandro Vallejo 
To: Jan Beulich 
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On Tue Apr 15, 2025 at 7:27 AM BST, Jan Beulich wrote:
> On 14.04.2025 20:35, Alejandro Vallejo wrote:
>> On Thu Apr 10, 2025 at 12:49 PM BST, Jan Beulich wrote:
>>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>>> From: "Daniel P. Smith" 
>>>> @@ -158,12 +159,42 @@ int __init fdt_read_multiboot_module(const void =
*fdt, int node,
>>>>  static int __init process_domain_node(
>>>>      struct boot_info *bi, const void *fdt, int dom_node)
>>>>  {
>>>> -    int node;
>>>> +    int node, property;
>>>>      struct boot_domain *bd =3D &bi->domains[bi->nr_domains];
>>>>      const char *name =3D fdt_get_name(fdt, dom_node, NULL) ?: "unknow=
n";
>>>>      int address_cells =3D fdt_address_cells(fdt, dom_node);
>>>>      int size_cells =3D fdt_size_cells(fdt, dom_node);
>>>> =20
>>>> +    fdt_for_each_property_offset(property, fdt, dom_node)
>>>> +    {
>>>> +        const struct fdt_property *prop;
>>>> +        const char *prop_name;
>>>> +        int name_len;
>>>> +
>>>> +        prop =3D fdt_get_property_by_offset(fdt, property, NULL);
>>>> +        if ( !prop )
>>>> +            continue; /* silently skip */
>>>> +
>>>> +        prop_name =3D fdt_get_string(fdt, fdt32_to_cpu(prop->nameoff)=
, &name_len);
>>>> +
>>>> +        if ( strncmp(prop_name, "domid", name_len) =3D=3D 0 )
>>>> +        {
>>>> +            uint32_t val =3D DOMID_INVALID;
>>>> +            if ( fdt_prop_as_u32(prop, &val) !=3D 0 )
>>>> +            {
>>>> +                printk("  failed processing domain id for domain %s\n=
", name);
>>>> +                return -EINVAL;
>>>> +            }
>>>> +            if ( val >=3D DOMID_FIRST_RESERVED )
>>>> +            {
>>>> +                printk("  invalid domain id for domain %s\n", name);
>>>> +                return -EINVAL;
>>>> +            }
>>>> +            bd->domid =3D (domid_t)val;
>>>
>>> And a conflict with other domains' IDs will not be complained about?
>>=20
>> Hmmm... sure, I can iterate the domlist and check.
>
> Well, just to clarify: The checking doesn't necessarily need to happen he=
re
> and now. It may also happen as domains are actually created. Yet then I
> think a pointer there (in a code comment) would be helpful here.

That'd be fairly unsafe. In the case of parallel boot it'd be
indeterminate which VMs end up running if they happen to have a domid
clash. It's better to detect the error earlier and crash before any get
to start up.

>
>>>> @@ -233,6 +264,12 @@ static int __init process_domain_node(
>>>>          return -ENODATA;
>>>>      }
>>>> =20
>>>> +    if ( bd->domid =3D=3D DOMID_INVALID )
>>>> +        bd->domid =3D get_initial_domain_id();
>>>> +    else if ( bd->domid !=3D get_initial_domain_id() )
>>>> +        printk(XENLOG_WARNING
>>>> +               "WARN: Booting without initial domid not supported.\n"=
);
>>>
>>> I'm not a native speaker, but (or perhaps because of that) "without" fe=
els
>>> wrong here.
>>=20
>> It's probably the compound effect of without and "not supported". The
>> statement is correct, but it's arguably a bit obtuse.
>>=20
>> I'll replace it with "WARN: Unsupported boot with missing initial domid.=
".
>
> But that still doesn't fit the check, which compares the given ID (i.e.
> there's nothing "missing" here) with the expected one. The "no ID given"
> is handled by the plain if() that's first.

It's not that the domid is missing from the node, but that the domid in
the node doesn't match the initial domid. Maybe s/domid/domain, then?

  "Warning: Unsupported boot with missing initial domain"

Cheers,
Alejandro


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From: Luca Fancellu 
To: "xen-devel@lists.xenproject.org" 
CC: Stefano Stabellini , Bertrand Marquis
	, Julien Grall , "Orzel, Michal"
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Subject: Xen Armv8-R booting protocol
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Date: Tue, 15 Apr 2025 13:22:05 +0100
Message-ID: 
Subject: Re: [PATCH v3 16/16] x86/hyperlaunch: add capabilities to boot
 domain
From: Alejandro Vallejo 
To: Jan Beulich 
CC: "Daniel P. Smith" , Xenia Ragiadakou
	, Stefano Stabellini ,
	Michal Orzel , Andrew Cooper
	, =?utf-8?q?Roger_Pau_Monn=C3=A9?=
	, , Jason Andryuk
	
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On Tue Apr 15, 2025 at 7:38 AM BST, Jan Beulich wrote:
> On 14.04.2025 21:31, Alejandro Vallejo wrote:
>> On Thu Apr 10, 2025 at 1:18 PM BST, Jan Beulich wrote:
>>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>>> --- a/xen/arch/x86/domain-builder/fdt.c
>>>> +++ b/xen/arch/x86/domain-builder/fdt.c
>>>> @@ -257,6 +257,18 @@ static int __init process_domain_node(
>>>>              bd->max_vcpus =3D val;
>>>>              printk("  max vcpus: %d\n", bd->max_vcpus);
>>>>          }
>>>> +        else if ( strncmp(prop_name, "capabilities", name_len) =3D=3D=
 0 )
>>>> +        {
>>>> +            if ( fdt_prop_as_u32(prop, &bd->capabilities) !=3D 0 )
>>>> +            {
>>>> +                printk("  failed processing domain id for domain %s\n=
", name);
>>>> +                return -EINVAL;
>>>> +            }
>>>> +            printk("  caps: ");
>>>> +            if ( bd->capabilities & BUILD_CAPS_CONTROL )
>>>> +                printk("c");
>>>> +            printk("\n");
>>>> +        }
>>>
>>> Like for the other patch: What about other bits being set in the value =
read?
>>=20
>> I take it that the non-worded suggestion is to have a mask of reserved
>> bits for each case and check they are not set (giving a warning if they =
are)?
>
> Whether a warning is sufficient I can't tell. I would have expected such =
to be
> outright rejected.
>
>>>> --- a/xen/arch/x86/setup.c
>>>> +++ b/xen/arch/x86/setup.c
>>>> @@ -1006,6 +1006,7 @@ static struct domain *__init create_dom0(struct =
boot_info *bi)
>>>>  {
>>>>      char *cmdline =3D NULL;
>>>>      size_t cmdline_size;
>>>> +    unsigned int create_flags =3D 0;
>>>>      struct xen_domctl_createdomain dom0_cfg =3D {
>>>>          .flags =3D IS_ENABLED(CONFIG_TBOOT) ? XEN_DOMCTL_CDF_s3_integ=
rity : 0,
>>>>          .max_evtchn_port =3D -1,
>>>> @@ -1037,7 +1038,10 @@ static struct domain *__init create_dom0(struct=
 boot_info *bi)
>>>>      if ( bd->domid =3D=3D DOMID_INVALID )
>>>>          /* Create initial domain.  Not d0 for pvshim. */
>>>>          bd->domid =3D get_initial_domain_id();
>>>> -    d =3D domain_create(bd->domid, &dom0_cfg, pv_shim ? 0 : CDF_privi=
leged);
>>>> +    if ( bd->capabilities & BUILD_CAPS_CONTROL )
>>>> +        create_flags |=3D CDF_privileged;
>>>
>>> Seeing that builder_init() in the non-DT case sets the new bit uncondit=
ionally,
>>> isn't the shim's only domain suddenly getting CDF_privileged set this w=
ay? Oh,
>>> no, you then ...
>>>
>>>> +    d =3D domain_create(bd->domid, &dom0_cfg,
>>>> +                      pv_shim ? 0 : create_flags);
>>>
>>> ... hide the flag here. Any reason to have the intermediate variable in=
 the
>>> first place
>>=20
>> Well, the logic would end up fairly convoluted otherwise. As things
>> stand this can be encoded in an if-else fashion with 2 calls, but
>> there's 2 capability flags coming that need integrating together.
>>=20
>> This is just avoiding further code motion down the line.
>
> Is it?
>
> -    d =3D domain_create(bd->domid, &dom0_cfg, pv_shim ? 0 : CDF_privileg=
ed);
> +    d =3D domain_create(bd->domid, &dom0_cfg,
> +                      ((bd->capabilities & BUILD_CAPS_CONTROL) && !pv_sh=
im
> +                       ? CDF_privileged : 0));
>
> isn't really worse (imo),

Not sure I agree. Long conditions on ternary operators makes the
control flow harder to follow.

A nicer alternative that also removes the auxiliary variable is to have
a helper to convert from bootcaps to whatever createdomainflags are
required. That'd extend naturally for more bits.

> but is highlighting the problem more clearly: Why
> would the shim have BUILD_CAPS_CONTROL set in the first place? Without th=
at
> the statement would remain pretty similar to what it was before.

If the commandline is parsed early enough (I see the early parse path in
head.S?) it would be better to add this logic to builder_init() and
prevent the capability from reaching the boot_domain in the first place.

Then there's no exception for the pv shim.

Cheers,
Alejandro


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Message-ID: <35075d73-ec3c-4e8f-b7ed-657b604904bd@suse.com>
Date: Tue, 15 Apr 2025 14:46:38 +0200
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v1 10/14] xen/riscv: implementation of aplic and imsic
 operations
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Romain Caritey , xen-devel@lists.xenproject.org
References: 
 <74a07ed7c596bbcf581010685e01bfdfa19164f5.1744126720.git.oleksii.kurochko@gmail.com>
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In-Reply-To: <74a07ed7c596bbcf581010685e01bfdfa19164f5.1744126720.git.oleksii.kurochko@gmail.com>
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On 08.04.2025 17:57, Oleksii Kurochko wrote:
> Introduce interrupt controller descriptor for host APLIC to describe
> the low-lovel hardare. It includes implementation of the following functions:
>  - aplic_irq_startup()
>  - aplic_irq_shutdown()
>  - aplic_irq_enable()
>  - aplic_irq_disable()
>  - aplic_irq_ack()
>  - aplic_host_irq_end()
>  - aplic_set_irq_affinity()
> 
> As APLIC is used in MSI mode it requires to enable/disable interrupts not
> only for APLIC but also for IMSIC. Thereby for the purpose of
> aplic_irq_{enable,disable}() it is introduced imsic_irq_{enable,disable)().
> 
> For the purpose of aplic_set_irq_affinity() aplic_get_cpu_from_mask() is
> introduced to get hart id.
> 
> Also, introduce additional interrupt controller h/w operations and
> host_irq_type for APLIC:
>  - aplic_host_irq_type
>  - aplic_set_irq_priority()
>  - aplic_set_irq_type()

Yet these two functions nor the hooks they're used to populate are entirely
unused here. Since they're also outside of the common IRQ handling machinery,
it's unclear how one would sanely ack such a change.

> --- a/xen/arch/riscv/aplic.c
> +++ b/xen/arch/riscv/aplic.c
> @@ -15,6 +15,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  
> @@ -110,9 +111,173 @@ static int __init aplic_init(void)
>      return 0;
>  }
>  
> -static const struct intc_hw_operations __ro_after_init aplic_ops = {
> +static void aplic_set_irq_type(struct irq_desc *desc, unsigned int type)
> +{
> +    unsigned int irq = desc->irq - 1;

Why this adjustment by 1 (and yet both items being named "irq")?

> +    spin_lock(&aplic.lock);
> +    switch(type) {
> +        case IRQ_TYPE_EDGE_RISING:

Nit (style): Missing blanks, brace on its own line, case labels indented
like their containing switch().

> +            aplic.regs->sourcecfg[irq] = APLIC_SOURCECFG_SM_EDGE_RISE;
> +            break;
> +        case IRQ_TYPE_EDGE_FALLING:

Blank lines please between non-fall-through case blocks.

> +            aplic.regs->sourcecfg[irq] = APLIC_SOURCECFG_SM_EDGE_FALL;
> +            break;
> +        case IRQ_TYPE_LEVEL_HIGH:
> +            aplic.regs->sourcecfg[irq] = APLIC_SOURCECFG_SM_LEVEL_HIGH;
> +            break;
> +        case IRQ_TYPE_LEVEL_LOW:
> +            aplic.regs->sourcecfg[irq] = APLIC_SOURCECFG_SM_LEVEL_LOW;
> +            break;
> +        default:
> +            aplic.regs->sourcecfg[irq] = APLIC_SOURCECFG_SM_INACTIVE;
> +            break;

Is the default: label legitimate to be reached?

> +    }
> +    spin_unlock(&aplic.lock);
> +}
> +
> +static void aplic_set_irq_priority(struct irq_desc *desc,
> +                                   unsigned int priority)
> +{
> +    /* No priority, do nothing */
> +}

Since the function dopes nothing, wouldn't it be better to omit it and have
the (future) caller check for a NULL pointer ahead of making the (indirect)
call? Same remark for other handlers (below) which also do nothing.

> +static void aplic_irq_enable(struct irq_desc *desc)
> +{
> +    unsigned long flags;
> +
> +    /*
> +     * TODO: Currently, APLIC is supported only with MSI interrupts.
> +     *       If APLIC without MSI interrupts is required in the future,
> +     *       this function will need to be updated accordingly.
> +     */
> +    ASSERT(aplic.imsic_cfg->is_used);

Such an extra field, used only for assertions, is pretty odd. Can't you
use any of the other fields to achieve the same effect?

> +    ASSERT(spin_is_locked(&desc->lock));

If this lock (which is an IRQ-safe one) is necessarily held, ...

> +    spin_lock_irqsave(&aplic.lock, flags);

... you can use just spin_lock() here.

> +    clear_bit(_IRQ_DISABLED, &desc->status);

Why an atomic bitop when desc is locked? (And yes, I ought to raise the same
question on Arm code also doing so.)

I'm uncertain about this bit setting anyway - on x86 we would only fiddle
with it for IRQs not in use, not while enabling/disabling one.

In any event this can be done outside of the APLIC-locked region, I think.

> +    /* enable interrupt in IMSIC */

May I remind you of Xen comment style?

> +    imsic_irq_enable(desc->irq);
> +
> +    /* enable interrupt in APLIC */
> +    aplic.regs->setienum = desc->irq;

Are you sure you want to use plain assignments for MMIO accesses? I'd have
expected writel() to be used here. (And only later I realized that I didn't
spot the same already higher up from here.)

>From the vague understanding I've gained so far: Isn't the APLIC closer to
the CPU and the IMSIC closer to the device? If so, wouldn't you want to
enable at the APLIC before enabling at the IMSIC? But of course that also
depends on what exactly happens in the window while one is already enabled
and the other is still disabled. (Later) From the code you add to imsic.c
it looks like it's the other way around, as the IMSIC is accessed through
CSRs.

> +    spin_unlock_irqrestore(&aplic.lock, flags);
> +}
> +
> +static void aplic_irq_disable(struct irq_desc *desc)
> +{
> +    unsigned long flags;
> +
> +    /*
> +     * TODO: Currently, APLIC is supported only with MSI interrupts.
> +     *       If APLIC without MSI interrupts is required in the future,
> +     *       this function will need to be updated accordingly.
> +     */
> +    ASSERT(aplic.imsic_cfg->is_used);
> +
> +    ASSERT(spin_is_locked(&desc->lock));
> +
> +    spin_lock_irqsave(&aplic.lock, flags);
> +
> +    set_bit(_IRQ_DISABLED, &desc->status);
> +
> +    /* disable interrupt in APLIC */
> +    aplic.regs->clrienum = desc->irq;
> +
> +    /* disable interrupt in IMSIC */
> +    imsic_irq_disable(desc->irq);
> +
> +    spin_unlock_irqrestore(&aplic.lock, flags);
> +}
> +
> +static unsigned int aplic_irq_startup(struct irq_desc *desc)
> +{
> +    aplic_irq_enable(desc);
> +
> +    return 0;
> +}
> +
> +static void aplic_irq_shutdown(struct irq_desc *desc)
> +{
> +    aplic_irq_disable(desc);
> +}

You don't really need a separate hook function here, do you?

> +static void aplic_irq_ack(struct irq_desc *desc)
> +{
> +    /* nothing to do */
> +}
> +
> +static void aplic_host_irq_end(struct irq_desc *desc)

What's the "host" in the identifier about?

> +{
> +    /* nothing to do */
> +}
> +
> +static unsigned int aplic_get_cpu_from_mask(const cpumask_t *cpumask)
> +{
> +    unsigned int cpu;

No real need for this variable?

> +    cpumask_t possible_mask;
> +
> +    cpumask_and(&possible_mask, cpumask, &cpu_possible_map);
> +    cpu = cpumask_any(&possible_mask);

Why would you use cpu_possible_map here? That includes any offline CPUs.
I think you need to use cpu_online_map here.

> +    return cpu;
> +}
> +
> +static void aplic_set_irq_affinity(struct irq_desc *desc, const cpumask_t *mask)
> +{
> +    unsigned int cpu;
> +    uint64_t group_index, base_ppn;
> +    uint32_t hhxw, lhxw ,hhxs, value;
> +    const struct imsic_config *imsic = aplic.imsic_cfg;
> +
> +    /*
> +     * TODO: Currently, APLIC is supported only with MSI interrupts.
> +     *       If APLIC without MSI interrupts is required in the future,
> +     *       this function will need to be updated accordingly.
> +     */
> +    ASSERT(aplic.imsic_cfg->is_used);

Use the local variable you have made yourself?

> +    ASSERT(!cpumask_empty(mask));
> +
> +    spin_lock(&aplic.lock);

Aiui the lock can be acquired quite a bit later. It ought to be needed only
around the actual write to the hardware register.

> +    cpu = cpuid_to_hartid(aplic_get_cpu_from_mask(mask));
> +    hhxw = imsic->group_index_bits;
> +    lhxw = imsic->hart_index_bits;
> +    hhxs = imsic->group_index_shift - IMSIC_MMIO_PAGE_SHIFT * 2;
> +    base_ppn = imsic->msi[cpu].base_addr >> IMSIC_MMIO_PAGE_SHIFT;
> +
> +    /* update hart and EEID in the target register */
> +    group_index = (base_ppn >> (hhxs + 12)) & (BIT(hhxw, UL) - 1);

What's this magic 12 in here? Not IMSIC_MMIO_PAGE_SHIFT I suppose?

> +    value = desc->irq;
> +    value |= cpu << APLIC_TARGET_HART_IDX_SHIFT;
> +    value |= group_index << (lhxw + APLIC_TARGET_HART_IDX_SHIFT) ;
> +    aplic.regs->target[desc->irq - 1] = value;
> +
> +    spin_unlock(&aplic.lock);
> +}
> +
> +static hw_irq_controller aplic_host_irq_type = {

const?

> --- a/xen/arch/riscv/imsic.c
> +++ b/xen/arch/riscv/imsic.c
> @@ -14,12 +14,68 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  
>  #include 
>  
>  static struct imsic_config imsic_cfg;
>  
> +#define imsic_csr_set(c, v)     \
> +do {                            \
> +    csr_write(CSR_SISELECT, c); \
> +    csr_set(CSR_SIREG, v);      \
> +} while (0)
> +
> +#define imsic_csr_clear(c, v)   \
> +do {                            \
> +    csr_write(CSR_SISELECT, c); \
> +    csr_clear(CSR_SIREG, v);    \
> +} while (0)
> +
> +static void imsic_local_eix_update(unsigned long base_id, unsigned long num_id,
> +                                   bool pend, bool val)
> +{
> +    unsigned long i, isel, ireg;

These can be constrained to inside the outer loop below.

> +    unsigned long id = base_id, last_id = base_id + num_id;
> +
> +    while ( id < last_id )
> +    {
> +        isel = id / __riscv_xlen;
> +        isel *= __riscv_xlen / IMSIC_EIPx_BITS;
> +        isel += (pend) ? IMSIC_EIP0 : IMSIC_EIE0;

Nit: Why the parentheses?

> +        ireg = 0;
> +        for ( i = id & (__riscv_xlen - 1);
> +              (id < last_id) && (i < __riscv_xlen);
> +              i++, id++ )
> +            ireg |= (1 << i);

I wonder if this calculation really needs a loop. Afaict it's just a
consecutive set of bits you mean to set.

> +        if ( val )
> +            imsic_csr_set(isel, ireg);
> +        else
> +            imsic_csr_clear(isel, ireg);
> +    }
> +}
> +
> +void imsic_irq_enable(unsigned int hwirq)
> +{
> +    unsigned long flags;
> +
> +    spin_lock_irqsave(&imsic_cfg.lock, flags);
> +    imsic_local_eix_update(hwirq, 1, false, true);

No subtraction of 1 here? Also, why "hwirq" and not just "irq"?

> +    spin_unlock_irqrestore(&imsic_cfg.lock, flags);
> +}
> +
> +void imsic_irq_disable(unsigned int hwirq)
> +{
> +    unsigned long flags;
> +
> +    spin_lock_irqsave(&imsic_cfg.lock, flags);
> +    imsic_local_eix_update(hwirq, 1, false, false);
> +    spin_unlock_irqrestore(&imsic_cfg.lock, flags);
> +}
> +
>  const struct imsic_config *imsic_get_config(void)
>  {
>      return &imsic_cfg;
> @@ -277,6 +333,13 @@ int __init imsic_init(struct dt_device_node *node)
>          goto imsic_init_err;
>      }
>  
> +    spin_lock_init(&imsic_cfg.lock);
> +
> +    /* Enable local interrupt delivery */
> +    imsic_ids_local_delivery(true);

What's this? I can't find the function/macro here, nor in patch 08, nor in
staging.

Jan


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Date: Tue, 15 Apr 2025 14:47:28 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: Andrew Cooper ,
	xen-devel@lists.xenproject.org,
	Marek Marczykowski 
Subject: Re: [PATCH 3/5] x86/hvm: fix handling of accesses to partial r/o
 MMIO pages
Message-ID: 
References: <20250411105411.22334-4-roger.pau@citrix.com>
 
 
 
 
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On Tue, Apr 15, 2025 at 12:18:04PM +0200, Jan Beulich wrote:
> On 15.04.2025 12:04, Roger Pau Monné wrote:
> > On Tue, Apr 15, 2025 at 11:41:27AM +0200, Jan Beulich wrote:
> >> On 15.04.2025 10:34, Roger Pau Monné wrote:
> >>> On Tue, Apr 15, 2025 at 09:32:37AM +0200, Jan Beulich wrote:
> >>>> On 14.04.2025 18:13, Roger Pau Monné wrote:
> >>>>> On Mon, Apr 14, 2025 at 05:24:32PM +0200, Jan Beulich wrote:
> >>>>>> On 14.04.2025 15:53, Roger Pau Monné wrote:
> >>>>>>> On Mon, Apr 14, 2025 at 08:33:44AM +0200, Jan Beulich wrote:
> >>>>>>>> I'm also concerned of e.g. VT-x'es APIC access MFN, which is
> >>>>>>>> p2m_mmio_direct.
> >>>>>>>
> >>>>>>> But that won't go into hvm_hap_nested_page_fault() when using
> >>>>>>> cpu_has_vmx_virtualize_apic_accesses (and thus having an APIC page
> >>>>>>> mapped as p2m_mmio_direct)?
> >>>>>>>
> >>>>>>> It would instead be an EXIT_REASON_APIC_ACCESS vmexit which is handled
> >>>>>>> differently?
> >>>>>>
> >>>>>> All true as long as things work as expected (potentially including the guest
> >>>>>> also behaving as expected). Also this was explicitly only an example I could
> >>>>>> readily think of. I'm simply wary of handle_mmio_with_translation() now
> >>>>>> getting things to handle it's not meant to ever see.
> >>>>>
> >>>>> How was access to MMIO r/o regions supposed to be handled before
> >>>>> 33c19df9a5a0 (~2015)?  I see that setting r/o MMIO p2m entries was
> >>>>> added way before to p2m_type_to_flags() and ept_p2m_type_to_flags()
> >>>>> (~2010), yet I can't figure out how writes would be handled back then
> >>>>> that didn't result in a p2m fault and crashing of the domain.
> >>>>
> >>>> Was that handled at all before said change?
> >>>
> >>> Not really AFAICT, hence me wondering how where write accesses to r/o
> >>> MMIO regions supposed to be handled by (non-priv) domains.  Was the
> >>> expectation that those writes trigger an p2m violation thus crashing
> >>> the domain?
> >>
> >> I think so, yes. Devices with such special areas weren't (aren't?) supposed
> >> to be handed to DomU-s.
> > 
> > Oh, I see.  That makes stuff a bit clearer.  I think we would then
> > also want to add some checks to {ept_}p2m_type_to_flags()?
> > 
> > I wonder why handling of mmio_ro_ranges was added to the HVM p2m code
> > in ~2010 then.  If mmio_ro_ranges is only supposed to be relevant for
> > the hardware domain in ~2010 an HVM dom0 was not even in sight?
> 
> I fear because I was wrong with what I said in the earlier reply: There's
> one exception - the MSI-X tables of devices. DomU-s (and even Dom0) aren't
> supposed to access them directly, but we'd permit reads (which, at least
> back at the time, were also required to keep qemu working).

Hm, but reads to the MSI-X table for HVM domains will go through QEMU,
and hence not hit the r/o MMIO path, because the MSI-X table will
never be mapped to an HVM guest p2m?

Reads from QEMU are indeed different, but those where always made from
a PV domain.  As said above - HVM guests never got to see the native
MSI-X table at all.

> >>>>> I'm happy to look at other ways to handling this, but given there's
> >>>>> current logic for handling accesses to read-only regions in
> >>>>> hvm_hap_nested_page_fault() I think re-using that was the best way to
> >>>>> also handle accesses to MMIO read-only regions.
> >>>>>
> >>>>> Arguably it would already be the case that for other reasons Xen would
> >>>>> need to emulate an instruction that accesses a read-only MMIO region?
> >>>>
> >>>> Aiui hvm_translate_get_page() will yield HVMTRANS_bad_gfn_to_mfn for
> >>>> p2m_mmio_direct (after all, "direct" means we expect no emulation is
> >>>> needed; while arguably wrong for the introspection case, I'm not sure
> >>>> that and pass-through actually go together). Hence it's down to
> >>>> hvmemul_linear_mmio_access() -> hvmemul_phys_mmio_access() ->
> >>>> hvmemul_do_mmio_buffer() -> hvmemul_do_io_buffer() -> hvmemul_do_io(),
> >>>> which means that if hvm_io_intercept() can't handle it, the access
> >>>> will be forwarded to the responsible DM, or be "processed" by the
> >>>> internal null handler.
> >>>>
> >>>> Given this, perhaps what you do is actually fine. At the same time
> >>>> note how several functions in hvm/emulate.c simply fail upon
> >>>> encountering p2m_mmio_direct. These are all REP handlers though, so
> >>>> the main emulator would then try emulating the insn the non-REP way.
> >>>
> >>> I'm open to alternative ways of handling such accesses, just used what
> >>> seemed more natural in the context of hvm_hap_nested_page_fault().
> >>>
> >>> Emulation of r/o MMIO accesses failing wouldn't be an issue from Xen's
> >>> perspective, that would "just" result in the guest getting a #GP
> >>> injected.
> >>
> >> That's not the part I'm worried about. What worries me is that we open up
> >> another (or better: we're widening a) way to hit the emulator in the first
> >> place. (Plus, as said, the issue with the not really tidy P2M type system.)
> > 
> > But the hit would be limited to domains having r/o p2m_mmio_direct
> > entries in the p2m, as otherwise the path would be unreachable?
> 
> I fear I don't follow - all you look for in the newly extended conditional
> is the type being p2m_mmio_direct. There's no r/o-ness being checked for
> until we'd make it through the emulator and into subpage_mmio_accept().

Well, it's a write page-fault of a type with p2m_mmio_direct.  What
about limiting the path even further by checking for mmio_ro_ranges:

    if ( (p2mt == p2m_mmio_dm) ||
         (npfec.write_access &&
          (p2m_is_discard_write(p2mt) || (p2mt == p2m_ioreq_server) ||
           /* MMIO entries can be r/o if the target mfn is in mmio_ro_ranges. */
           (p2mt == p2m_mmio_direct &&
            rangeset_contains_singleton(mmio_ro_ranges, mfn_x(mfn))))) )
    {

Thanks, Roger.


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Subject: =?utf-8?Q?[PATCH]=20x86/shadow:=20Fix=20UBSAN=20in=20hvm=5Femulate=5Finsn=5Ffetch?=
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UBSAN complains when trying memcpy with a NULL pointer even if it's going to
copy zero bytes (which are the only cases where a NULL pointer is used).
Fix this by only doing the memcpy if the pointer is non-NULL.

(XEN) ================================================================================
(XEN) UBSAN: Undefined behaviour in arch/x86/mm/shadow/hvm.c:168:5
(XEN) null pointer passed as argument 1, declared with nonnull attribute
(XEN) ----[ Xen-4.21-unstable  x86_64  debug=y ubsan=y  Not tainted ]----
(XEN) CPU:    0
(XEN) RIP:    e008:[] common/ubsan/ubsan.c#ubsan_epilogue+0xa/0xd2
(XEN) RFLAGS: 0000000000010046   CONTEXT: hypervisor (d1v0)
(XEN) rax: ffff82d040a82eb0   rbx: ffff83021b6e7808   rcx: 000000000000c458
(XEN) rdx: ffff83021b6e7fd0   rsi: 000000000000000a   rdi: ffff83021b6e7808
(XEN) rbp: ffff83021b6e77f8   rsp: ffff83021b6e77e8   r8:  00000000ffffffff
(XEN) r9:  00000000ffffffff   r10: 0000000000000000   r11: 0000000000000000
(XEN) r12: 000000000000004d   r13: 0000000000000000   r14: ffff82d040a82eb0
(XEN) r15: 00000000002ffddc   cr0: 0000000080050033   cr4: 00000000001526e0
(XEN) cr3: 000000021b7f4000   cr2: 0000000000000000
(XEN) fsb: 0000000000000000   gsb: 0000000000000000   gss: 0000000000000000
(XEN) ds: 0000   es: 0000   fs: 0000   gs: 0000   ss: 0000   cs: e008
(XEN) Xen code around  (common/ubsan/ubsan.c#ubsan_epilogue+0xa/0xd2):
(XEN)  89 e5 41 54 53 48 89 fb <0f> 0b 48 8d 3d 1b cf 36 00 e8 b4 94 00 00 48 85
(XEN) Xen stack trace from rsp=ffff83021b6e77e8:
(XEN)    ffff82d040a82ea0 000000000000004d ffff83021b6e7820 ffff82d0402f8435
(XEN)    0000000000000202 ffff83021b6e7d25 0000000000000000 ffff83021b6e7858
(XEN)    ffff82d040455cb6 00000000002ffddc ffff83021b6e7ef8 ffff83021fbf1010
(XEN)    0000000000000000 0000000000000000 ffff83021b6e7bd8 ffff82d0405b562b
(XEN)    ffffffff00200033 ffffffff0020874b 00007cfde4918743 ffff83021b6e7af0
(XEN)    0000000000000003 000000000000000a 0000000000000000 0000000440661f40
(XEN)    ffffffff00000000 0000000000000000 00007cfd000000e8 ffff83021b6e79a8
(XEN)    ffff83021b6e7980 ffff82d040d3fa90 00000000a00000e8 ffff82d0406904a0
(XEN)    ffff83021b6e7cd8 ffff8302159963f0 ffff83021b6e7998 ffff82d04052f592
(XEN)    fffffffa0000000a ffff83021b6e7b21 393082d040661f40 0000001000000033
(XEN)    ffffffff00307b39 ffffffffe491868b ffffffff00200d00 00007cfde491867b
(XEN)    ffff83021b6e7bb8 0000000000000003 0000000000000001 0000000000000000
(XEN)    0000000000000000 0000000000000067 ffff8302159963f0 aaaaaaaaaaaaaaaa
(XEN)    aaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaa
(XEN)    aaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaa ffff83021b7fc008
(XEN)    00000000000002ff ffff8302159963f0 0000000000000000 ffff830215994000
(XEN)    0000000715994000 0000000000000000 0000000000000003 0000000000000000
(XEN)    0000000000000000 8086000000008086 0000000000000000 0000000000000000
(XEN)    0000000400000002 00000000002ffddc 0000000000000000 8086000000008086
(XEN)    0000000000000000 0000000000000000 ffffffffffffffff 000000000000001f
(XEN) Xen call trace:
(XEN)    [] R common/ubsan/ubsan.c#ubsan_epilogue+0xa/0xd2
(XEN)    [] F __ubsan_handle_nonnull_arg+0x7c/0xb3
(XEN)    [] F arch/x86/mm/shadow/hvm.c#hvm_emulate_insn_fetch+0xfb/0x100
(XEN)    [] F x86_emulate+0x17f6b/0x3b8e3
(XEN)    [] F x86_emulate_wrapper+0x87/0x216
(XEN)    [] F arch/x86/mm/shadow/guest_4.c#sh_page_fault__guest_4+0x908/0x3b34
(XEN)    [] F vmx_vmexit_handler+0x1691/0x3439
(XEN)    [] F vmx_asm_vmexit_handler+0x103/0x220
(XEN)
(XEN) ================================================================================

Signed-off-by: Teddy Astie 
---
 xen/arch/x86/mm/shadow/hvm.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/mm/shadow/hvm.c b/xen/arch/x86/mm/shadow/hvm.c
index 114957a3e1..298dd0f229 100644
--- a/xen/arch/x86/mm/shadow/hvm.c
+++ b/xen/arch/x86/mm/shadow/hvm.c
@@ -165,7 +165,8 @@ hvm_emulate_insn_fetch(unsigned long offset,
                         hvm_access_insn_fetch, sh_ctxt);
 
     /* Hit the cache. Simple memcpy. */
-    memcpy(p_data, &sh_ctxt->insn_buf[insn_off], bytes);
+    if ( p_data )
+        memcpy(p_data, &sh_ctxt->insn_buf[insn_off], bytes);
     return X86EMUL_OKAY;
 }
 
-- 
2.47.2



 | Vates

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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Date: Tue, 15 Apr 2025 14:53:04 +0200
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Subject: Re: [PATCH 3/5] x86/hvm: fix handling of accesses to partial r/o MMIO
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To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
Cc: Andrew Cooper ,
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References: <20250411105411.22334-4-roger.pau@citrix.com>
 
 
 
 
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On 15.04.2025 14:47, Roger Pau Monné wrote:
> On Tue, Apr 15, 2025 at 12:18:04PM +0200, Jan Beulich wrote:
>> On 15.04.2025 12:04, Roger Pau Monné wrote:
>>> On Tue, Apr 15, 2025 at 11:41:27AM +0200, Jan Beulich wrote:
>>>> On 15.04.2025 10:34, Roger Pau Monné wrote:
>>>>> On Tue, Apr 15, 2025 at 09:32:37AM +0200, Jan Beulich wrote:
>>>>>> On 14.04.2025 18:13, Roger Pau Monné wrote:
>>>>>>> On Mon, Apr 14, 2025 at 05:24:32PM +0200, Jan Beulich wrote:
>>>>>>>> On 14.04.2025 15:53, Roger Pau Monné wrote:
>>>>>>>>> On Mon, Apr 14, 2025 at 08:33:44AM +0200, Jan Beulich wrote:
>>>>>>>>>> I'm also concerned of e.g. VT-x'es APIC access MFN, which is
>>>>>>>>>> p2m_mmio_direct.
>>>>>>>>>
>>>>>>>>> But that won't go into hvm_hap_nested_page_fault() when using
>>>>>>>>> cpu_has_vmx_virtualize_apic_accesses (and thus having an APIC page
>>>>>>>>> mapped as p2m_mmio_direct)?
>>>>>>>>>
>>>>>>>>> It would instead be an EXIT_REASON_APIC_ACCESS vmexit which is handled
>>>>>>>>> differently?
>>>>>>>>
>>>>>>>> All true as long as things work as expected (potentially including the guest
>>>>>>>> also behaving as expected). Also this was explicitly only an example I could
>>>>>>>> readily think of. I'm simply wary of handle_mmio_with_translation() now
>>>>>>>> getting things to handle it's not meant to ever see.
>>>>>>>
>>>>>>> How was access to MMIO r/o regions supposed to be handled before
>>>>>>> 33c19df9a5a0 (~2015)?  I see that setting r/o MMIO p2m entries was
>>>>>>> added way before to p2m_type_to_flags() and ept_p2m_type_to_flags()
>>>>>>> (~2010), yet I can't figure out how writes would be handled back then
>>>>>>> that didn't result in a p2m fault and crashing of the domain.
>>>>>>
>>>>>> Was that handled at all before said change?
>>>>>
>>>>> Not really AFAICT, hence me wondering how where write accesses to r/o
>>>>> MMIO regions supposed to be handled by (non-priv) domains.  Was the
>>>>> expectation that those writes trigger an p2m violation thus crashing
>>>>> the domain?
>>>>
>>>> I think so, yes. Devices with such special areas weren't (aren't?) supposed
>>>> to be handed to DomU-s.
>>>
>>> Oh, I see.  That makes stuff a bit clearer.  I think we would then
>>> also want to add some checks to {ept_}p2m_type_to_flags()?
>>>
>>> I wonder why handling of mmio_ro_ranges was added to the HVM p2m code
>>> in ~2010 then.  If mmio_ro_ranges is only supposed to be relevant for
>>> the hardware domain in ~2010 an HVM dom0 was not even in sight?
>>
>> I fear because I was wrong with what I said in the earlier reply: There's
>> one exception - the MSI-X tables of devices. DomU-s (and even Dom0) aren't
>> supposed to access them directly, but we'd permit reads (which, at least
>> back at the time, were also required to keep qemu working).
> 
> Hm, but reads to the MSI-X table for HVM domains will go through QEMU,
> and hence not hit the r/o MMIO path, because the MSI-X table will
> never be mapped to an HVM guest p2m?

Right, just wanted to be on the safe side there.

>>>>>>> I'm happy to look at other ways to handling this, but given there's
>>>>>>> current logic for handling accesses to read-only regions in
>>>>>>> hvm_hap_nested_page_fault() I think re-using that was the best way to
>>>>>>> also handle accesses to MMIO read-only regions.
>>>>>>>
>>>>>>> Arguably it would already be the case that for other reasons Xen would
>>>>>>> need to emulate an instruction that accesses a read-only MMIO region?
>>>>>>
>>>>>> Aiui hvm_translate_get_page() will yield HVMTRANS_bad_gfn_to_mfn for
>>>>>> p2m_mmio_direct (after all, "direct" means we expect no emulation is
>>>>>> needed; while arguably wrong for the introspection case, I'm not sure
>>>>>> that and pass-through actually go together). Hence it's down to
>>>>>> hvmemul_linear_mmio_access() -> hvmemul_phys_mmio_access() ->
>>>>>> hvmemul_do_mmio_buffer() -> hvmemul_do_io_buffer() -> hvmemul_do_io(),
>>>>>> which means that if hvm_io_intercept() can't handle it, the access
>>>>>> will be forwarded to the responsible DM, or be "processed" by the
>>>>>> internal null handler.
>>>>>>
>>>>>> Given this, perhaps what you do is actually fine. At the same time
>>>>>> note how several functions in hvm/emulate.c simply fail upon
>>>>>> encountering p2m_mmio_direct. These are all REP handlers though, so
>>>>>> the main emulator would then try emulating the insn the non-REP way.
>>>>>
>>>>> I'm open to alternative ways of handling such accesses, just used what
>>>>> seemed more natural in the context of hvm_hap_nested_page_fault().
>>>>>
>>>>> Emulation of r/o MMIO accesses failing wouldn't be an issue from Xen's
>>>>> perspective, that would "just" result in the guest getting a #GP
>>>>> injected.
>>>>
>>>> That's not the part I'm worried about. What worries me is that we open up
>>>> another (or better: we're widening a) way to hit the emulator in the first
>>>> place. (Plus, as said, the issue with the not really tidy P2M type system.)
>>>
>>> But the hit would be limited to domains having r/o p2m_mmio_direct
>>> entries in the p2m, as otherwise the path would be unreachable?
>>
>> I fear I don't follow - all you look for in the newly extended conditional
>> is the type being p2m_mmio_direct. There's no r/o-ness being checked for
>> until we'd make it through the emulator and into subpage_mmio_accept().
> 
> Well, it's a write page-fault of a type with p2m_mmio_direct.  What
> about limiting the path even further by checking for mmio_ro_ranges:
> 
>     if ( (p2mt == p2m_mmio_dm) ||
>          (npfec.write_access &&
>           (p2m_is_discard_write(p2mt) || (p2mt == p2m_ioreq_server) ||
>            /* MMIO entries can be r/o if the target mfn is in mmio_ro_ranges. */
>            (p2mt == p2m_mmio_direct &&
>             rangeset_contains_singleton(mmio_ro_ranges, mfn_x(mfn))))) )
>     {

Yes, this would make me quite a bit less nervous.

Jan


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Date: Tue, 15 Apr 2025 14:59:35 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jiqian Chen 
Cc: xen-devel@lists.xenproject.org, Huang Rui 
Subject: Re: [PATCH v2 6/8] vpci/rebar: Remove registers when init_rebar()
 fails
Message-ID: 
References: <20250409064528.405573-1-Jiqian.Chen@amd.com>
 <20250409064528.405573-7-Jiqian.Chen@amd.com>
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On Wed, Apr 09, 2025 at 02:45:26PM +0800, Jiqian Chen wrote:
> When init_rebar() fails, the previous new changes will hide Rebar
> capability, it can't rely on vpci_deassign_device() to remove all
> Rebar related registers anymore, those registers must be removed
> in failure path of init_rebar.
> 
> To do that, call vpci_remove_registers() to remove all possible
> registered registers in the failure patch.
> 
> Signed-off-by: Jiqian Chen 
> ---
> cc: "Roger Pau Monné" 
> ---
> v1->v2 changes:
> * Called vpci_remove_registers() to remove all possible registered registers instead of using a array to record all registered register.
> 
> Best regards,
> Jiqian Chen.
> ---
>  xen/drivers/vpci/rebar.c | 25 ++++++++++++++-----------
>  1 file changed, 14 insertions(+), 11 deletions(-)
> 
> diff --git a/xen/drivers/vpci/rebar.c b/xen/drivers/vpci/rebar.c
> index 79858e5dc92f..e030937956e3 100644
> --- a/xen/drivers/vpci/rebar.c
> +++ b/xen/drivers/vpci/rebar.c
> @@ -51,6 +51,7 @@ static void cf_check rebar_ctrl_write(const struct pci_dev *pdev,
>  
>  static int cf_check init_rebar(struct pci_dev *pdev)
>  {
> +    int rc = 0;
>      uint32_t ctrl;
>      unsigned int nbars;
>      unsigned int rebar_offset = pci_find_ext_capability(pdev->sbdf,
> @@ -70,7 +71,6 @@ static int cf_check init_rebar(struct pci_dev *pdev)
>      nbars = MASK_EXTR(ctrl, PCI_REBAR_CTRL_NBAR_MASK);
>      for ( unsigned int i = 0; i < nbars; i++ )
>      {
> -        int rc;
>          struct vpci_bar *bar;
>          unsigned int index;
>  
> @@ -80,7 +80,7 @@ static int cf_check init_rebar(struct pci_dev *pdev)
>          {
>              printk(XENLOG_ERR "%pd %pp: too big BAR number %u in REBAR_CTRL\n",
>                     pdev->domain, &pdev->sbdf, index);
> -            continue;
> +            goto fail;
>          }
>  
>          bar = &pdev->vpci->header.bars[index];
> @@ -88,7 +88,7 @@ static int cf_check init_rebar(struct pci_dev *pdev)
>          {
>              printk(XENLOG_ERR "%pd %pp: BAR%u is not in memory space\n",
>                     pdev->domain, &pdev->sbdf, index);
> -            continue;
> +            goto fail;

I think you need to set rc to an error code for the two chunks above,
otherwise you jump into the fail label with rc == 0 AFAICT.

Thanks, Roger.


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Date: Tue, 15 Apr 2025 15:00:48 +0200
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Subject: Re: [PATCH] x86/shadow: Fix UBSAN in hvm_emulate_insn_fetch
To: Teddy Astie 
Cc: Andrew Cooper , Tim Deegan ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 15.04.2025 14:49, Teddy Astie wrote:
> UBSAN complains when trying memcpy with a NULL pointer even if it's going to
> copy zero bytes (which are the only cases where a NULL pointer is used).

If this really was a problem, I think we'd need to go through and find all
instances. However, ...

> Fix this by only doing the memcpy if the pointer is non-NULL.
> 
> (XEN) ================================================================================
> (XEN) UBSAN: Undefined behaviour in arch/x86/mm/shadow/hvm.c:168:5
> (XEN) null pointer passed as argument 1, declared with nonnull attribute

... it can only be the compiler who has added the nonnull attribute; we
use it only in very few (other) places.

Personally I find it absurd to forbid NULL here when the size is zero. Yet
I agree that the spec can be interpreted this way.

Jan


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Subject: Re: [PATCH] x86/shadow: Fix UBSAN in hvm_emulate_insn_fetch
To: Teddy Astie , xen-devel@lists.xenproject.org
Cc: Jan Beulich , Tim Deegan ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
References: <91bd66eae876b940b09b3b650a21614e42ab0469.1744721279.git.teddy.astie@vates.tech>
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On 15/04/2025 1:49 pm, Teddy Astie wrote:
> UBSAN complains when trying memcpy with a NULL pointer even if it's going to
> copy zero bytes (which are the only cases where a NULL pointer is used).
> Fix this by only doing the memcpy if the pointer is non-NULL.

Which compiler are you using?  (Just so there's a record.  These reports
are version-sensitive.)

>
> (XEN) ================================================================================
> (XEN) UBSAN: Undefined behaviour in arch/x86/mm/shadow/hvm.c:168:5
> (XEN) null pointer passed as argument 1, declared with nonnull attribute

Interestingly, this isn't a Xen annotation.  It must be coming from the
builtin.

And what we really want is nonnull_if_nonzero, but I bet that's not
available.

> (XEN) ----[ Xen-4.21-unstable  x86_64  debug=y ubsan=y  Not tainted ]----
> (XEN) CPU:    0
> (XEN) RIP:    e008:[] common/ubsan/ubsan.c#ubsan_epilogue+0xa/0xd2
> (XEN) RFLAGS: 0000000000010046   CONTEXT: hypervisor (d1v0)
> (XEN) rax: ffff82d040a82eb0   rbx: ffff83021b6e7808   rcx: 000000000000c458
> (XEN) rdx: ffff83021b6e7fd0   rsi: 000000000000000a   rdi: ffff83021b6e7808
> (XEN) rbp: ffff83021b6e77f8   rsp: ffff83021b6e77e8   r8:  00000000ffffffff
> (XEN) r9:  00000000ffffffff   r10: 0000000000000000   r11: 0000000000000000
> (XEN) r12: 000000000000004d   r13: 0000000000000000   r14: ffff82d040a82eb0
> (XEN) r15: 00000000002ffddc   cr0: 0000000080050033   cr4: 00000000001526e0
> (XEN) cr3: 000000021b7f4000   cr2: 0000000000000000
> (XEN) fsb: 0000000000000000   gsb: 0000000000000000   gss: 0000000000000000
> (XEN) ds: 0000   es: 0000   fs: 0000   gs: 0000   ss: 0000   cs: e008
> (XEN) Xen code around  (common/ubsan/ubsan.c#ubsan_epilogue+0xa/0xd2):
> (XEN)  89 e5 41 54 53 48 89 fb <0f> 0b 48 8d 3d 1b cf 36 00 e8 b4 94 00 00 48 85
> (XEN) Xen stack trace from rsp=ffff83021b6e77e8:
> (XEN)    ffff82d040a82ea0 000000000000004d ffff83021b6e7820 ffff82d0402f8435
> (XEN)    0000000000000202 ffff83021b6e7d25 0000000000000000 ffff83021b6e7858
> (XEN)    ffff82d040455cb6 00000000002ffddc ffff83021b6e7ef8 ffff83021fbf1010
> (XEN)    0000000000000000 0000000000000000 ffff83021b6e7bd8 ffff82d0405b562b
> (XEN)    ffffffff00200033 ffffffff0020874b 00007cfde4918743 ffff83021b6e7af0
> (XEN)    0000000000000003 000000000000000a 0000000000000000 0000000440661f40
> (XEN)    ffffffff00000000 0000000000000000 00007cfd000000e8 ffff83021b6e79a8
> (XEN)    ffff83021b6e7980 ffff82d040d3fa90 00000000a00000e8 ffff82d0406904a0
> (XEN)    ffff83021b6e7cd8 ffff8302159963f0 ffff83021b6e7998 ffff82d04052f592
> (XEN)    fffffffa0000000a ffff83021b6e7b21 393082d040661f40 0000001000000033
> (XEN)    ffffffff00307b39 ffffffffe491868b ffffffff00200d00 00007cfde491867b
> (XEN)    ffff83021b6e7bb8 0000000000000003 0000000000000001 0000000000000000
> (XEN)    0000000000000000 0000000000000067 ffff8302159963f0 aaaaaaaaaaaaaaaa
> (XEN)    aaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaa
> (XEN)    aaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaa aaaaaaaaaaaaaaaa ffff83021b7fc008
> (XEN)    00000000000002ff ffff8302159963f0 0000000000000000 ffff830215994000
> (XEN)    0000000715994000 0000000000000000 0000000000000003 0000000000000000
> (XEN)    0000000000000000 8086000000008086 0000000000000000 0000000000000000
> (XEN)    0000000400000002 00000000002ffddc 0000000000000000 8086000000008086
> (XEN)    0000000000000000 0000000000000000 ffffffffffffffff 000000000000001f
> (XEN) Xen call trace:
> (XEN)    [] R common/ubsan/ubsan.c#ubsan_epilogue+0xa/0xd2
> (XEN)    [] F __ubsan_handle_nonnull_arg+0x7c/0xb3
> (XEN)    [] F arch/x86/mm/shadow/hvm.c#hvm_emulate_insn_fetch+0xfb/0x100
> (XEN)    [] F x86_emulate+0x17f6b/0x3b8e3
> (XEN)    [] F x86_emulate_wrapper+0x87/0x216
> (XEN)    [] F arch/x86/mm/shadow/guest_4.c#sh_page_fault__guest_4+0x908/0x3b34
> (XEN)    [] F vmx_vmexit_handler+0x1691/0x3439
> (XEN)    [] F vmx_asm_vmexit_handler+0x103/0x220
> (XEN)
> (XEN) ================================================================================

For this, we normally abbreviate it to just the relevant information, so
in this case:

(XEN) UBSAN: Undefined behaviour in arch/x86/mm/shadow/hvm.c:168:5
(XEN) null pointer passed as argument 1, declared with nonnull attribute
(XEN) ----[ Xen-4.21-unstable  x86_64  debug=y ubsan=y  Not tainted ]----
(XEN) CPU:    0
(XEN) RIP:    e008:[]
common/ubsan/ubsan.c#ubsan_epilogue+0xa/0xd2
...
(XEN) Xen call trace:
(XEN)    [] R common/ubsan/ubsan.c#ubsan_epilogue+0xa/0xd2
(XEN)    [] F __ubsan_handle_nonnull_arg+0x7c/0xb3
(XEN)    [] F
arch/x86/mm/shadow/hvm.c#hvm_emulate_insn_fetch+0xfb/0x100
(XEN)    [] F x86_emulate+0x17f6b/0x3b8e3
(XEN)    [] F x86_emulate_wrapper+0x87/0x216
(XEN)    [] F
arch/x86/mm/shadow/guest_4.c#sh_page_fault__guest_4+0x908/0x3b34
(XEN)    [] F vmx_vmexit_handler+0x1691/0x3439
(XEN)    [] F vmx_asm_vmexit_handler+0x103/0x220

which is rather less voluminous.

>
> Signed-off-by: Teddy Astie 
> ---
>  xen/arch/x86/mm/shadow/hvm.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/xen/arch/x86/mm/shadow/hvm.c b/xen/arch/x86/mm/shadow/hvm.c
> index 114957a3e1..298dd0f229 100644
> --- a/xen/arch/x86/mm/shadow/hvm.c
> +++ b/xen/arch/x86/mm/shadow/hvm.c
> @@ -165,7 +165,8 @@ hvm_emulate_insn_fetch(unsigned long offset,
>                          hvm_access_insn_fetch, sh_ctxt);
>  
>      /* Hit the cache. Simple memcpy. */
> -    memcpy(p_data, &sh_ctxt->insn_buf[insn_off], bytes);
> +    if ( p_data )
> +        memcpy(p_data, &sh_ctxt->insn_buf[insn_off], bytes);

Do you know precisely which condition is being hit?

~Andrew


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On 15/04/2025 14:10, Luca Fancellu wrote:
> Hi all,
> 
> I’ve started this thread to talk about a possible Xen booting protocol when running on Armv8-R,
> currently Xen uses the Linux boot protocol and some other requirements stated in docs/misc/arm/booting.txt.
> 
> Unfortunately we don’t have anything already available for Armv8-R, the only implementation of a bootloader
> is the boot-wrapper-aarch64 which keeps the MPU off, I/D cache off.
> 
> So my proposal is to add additional requirements in our docs/misc/arm/booting.txt for the case where Xen is
> started on Armv8-R, under "Firmware/bootloader requirements”.
> 
> diff --git a/docs/misc/arm/booting.txt b/docs/misc/arm/booting.txt
> index 21ae74837dcc..39f029153e38 100644
> --- a/docs/misc/arm/booting.txt
> +++ b/docs/misc/arm/booting.txt
> @@ -62,6 +62,14 @@ Xen relies on some settings the firmware has to configure in EL3 before starting
>  
>  * The bit SCR_EL3.HCE (resp. SCR.HCE for 32-bit ARM) must be set to 1.
>  
> +When Xen runs on Armv8-R, the highest exception level is EL2 and the only
> +available mode is secure, hence the above requirements needs to be adjusted to
I think in Arm docs, this is called state, i.e. secure/non-secure state.
Also, s/needs/need/

> +this case:
> +
> +* Xen must be entered in S EL2 mode.
> +
> +* Xen must be entered with MPU off and data cache disabled (SCTLR_EL2.M bit and
> +  SCTLR_EL2.C set to 0).
>  
>  [1] linux/Documentation/arm/booting.rst
>  Latest version: http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Documentation/arch/arm/booting.rst
> 
> Please let me know your thoughts.
I think we need to have a place for boot assumptions for Armv8-R, so this is a
good start. MPU work is Experimental for now, so we can treat it as a living doc
(MPU part) for now.

~Michal



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Date: Tue, 15 Apr 2025 14:06:41 +0100
User-Agent: Mozilla Thunderbird
Subject: Re: Xen Armv8-R booting protocol
Content-Language: en-GB
To: Luca Fancellu ,
 "xen-devel@lists.xenproject.org" 
Cc: Stefano Stabellini ,
 Bertrand Marquis , Julien Grall ,
 "Orzel, Michal" ,
 Ayan Kumar Halder 
References: 
From: Ayan Kumar Halder 
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On 15/04/2025 13:10, Luca Fancellu wrote:
> Hi all,
Hi Luca,
>
> I’ve started this thread to talk about a possible Xen booting protocol when running on Armv8-R,
> currently Xen uses the Linux boot protocol and some other requirements stated in docs/misc/arm/booting.txt.
>
> Unfortunately we don’t have anything already available for Armv8-R, the only implementation of a bootloader
> is the boot-wrapper-aarch64 which keeps the MPU off, I/D cache off.
>
> So my proposal is to add additional requirements in our docs/misc/arm/booting.txt for the case where Xen is
> started on Armv8-R, under "Firmware/bootloader requirements”.
This makes sense.
>
> diff --git a/docs/misc/arm/booting.txt b/docs/misc/arm/booting.txt
> index 21ae74837dcc..39f029153e38 100644
> --- a/docs/misc/arm/booting.txt
> +++ b/docs/misc/arm/booting.txt
> @@ -62,6 +62,14 @@ Xen relies on some settings the firmware has to configure in EL3 before starting
>   
>   * The bit SCR_EL3.HCE (resp. SCR.HCE for 32-bit ARM) must be set to 1.
>   
> +When Xen runs on Armv8-R, the highest exception level is EL2 and the only
> +available mode is secure, hence the above requirements needs to be adjusted to
> +this case:
> +
> +* Xen must be entered in S EL2 mode.

Refer ARM DDI 0568A.c ID110520 A1.3.1

Armv8-R (AArch32) only supports a single Security state, Non-secure.

I see that it differs from Armv8-R (AArch64) ARM DDI 0600A.d ID120821, A1.3

The PE is always in Secure state.

Probably you can mention both.

> +
> +* Xen must be entered with MPU off and data cache disabled (SCTLR_EL2.M bit and
> +  SCTLR_EL2.C set to 0).
>   
>   [1] linux/Documentation/arm/booting.rst
>   Latest version: http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Documentation/arch/arm/booting.rst
>
> Please let me know your thoughts.

A question, Do you know if u-boot (or any other bootloader) is supported 
on Armv8-R ? Because someone needs to pass the DTB address in r2/x0.

- Ayan

>
> Cheers,
> Luca
>


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In-Reply-To: <9211cbe0-3674-41d5-8862-c819ada37140@suse.com>
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On 15/04/2025 2:00 pm, Jan Beulich wrote:
> On 15.04.2025 14:49, Teddy Astie wrote:
>> UBSAN complains when trying memcpy with a NULL pointer even if it's going to
>> copy zero bytes (which are the only cases where a NULL pointer is used).
> If this really was a problem, I think we'd need to go through and find all
> instances. However, ...
>
>> Fix this by only doing the memcpy if the pointer is non-NULL.
>>
>> (XEN) ================================================================================
>> (XEN) UBSAN: Undefined behaviour in arch/x86/mm/shadow/hvm.c:168:5
>> (XEN) null pointer passed as argument 1, declared with nonnull attribute
> ... it can only be the compiler who has added the nonnull attribute; we
> use it only in very few (other) places.
>
> Personally I find it absurd to forbid NULL here when the size is zero. Yet
> I agree that the spec can be interpreted this way.

https://www.open-std.org/jtc1/sc22/wg14/www/docs/n3322.pdf

This is being proposed for fixing in C2Y, because lots of people think
it's absurd.

However, until we can raise our -std, I think we're stuck with the
current behaviour.

GCC-15 introduces the nonnull_if_nonzero attribute specifically for
memcpy() etc, but I don't see how we could make use of it in this case.

~Andrew


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From: Luca Fancellu 
To: Ayan Kumar Halder 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Bertrand Marquis
	, Julien Grall , "Orzel, Michal"
	, Ayan Kumar Halder 
Subject: Re: Xen Armv8-R booting protocol
Thread-Topic: Xen Armv8-R booting protocol
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Date: Tue, 15 Apr 2025 15:29:16 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jiqian Chen 
Cc: xen-devel@lists.xenproject.org, Huang Rui 
Subject: Re: [PATCH v2 7/8] vpci/msi: Free MSI resources when init_msi() fails
Message-ID: 
References: <20250409064528.405573-1-Jiqian.Chen@amd.com>
 <20250409064528.405573-8-Jiqian.Chen@amd.com>
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In-Reply-To: <20250409064528.405573-8-Jiqian.Chen@amd.com>

On Wed, Apr 09, 2025 at 02:45:27PM +0800, Jiqian Chen wrote:
> When init_msi() fails, the previous new changes will hide MSI
> capability, it can't rely on vpci_deassign_device() to remove
> all MSI related resources anymore, those resources must be
> cleaned up in failure path of init_msi.
> 
> To do that, add a new function to free MSI resources.
> 
> Signed-off-by: Jiqian Chen 
> ---
> cc: "Roger Pau Monné" 
> ---
> v1->v2 changes:
> * Added a new function fini_msi to free all MSI resources instead of using an array to record registered registers.
> ---
>  xen/drivers/vpci/msi.c | 47 +++++++++++++++++++++++++++++++++---------
>  1 file changed, 37 insertions(+), 10 deletions(-)
> 
> diff --git a/xen/drivers/vpci/msi.c b/xen/drivers/vpci/msi.c
> index ca89ae9b9c22..48a466dba0ef 100644
> --- a/xen/drivers/vpci/msi.c
> +++ b/xen/drivers/vpci/msi.c
> @@ -193,6 +193,33 @@ static void cf_check mask_write(
>      msi->mask = val;
>  }
>  
> +/* 12 is size of MSI structure for 32-bit Message Address without PVM */
> +#define MSI_STRUCTURE_SIZE_32 12

I'm confused by this.  The minimum size of the capability is 4 bytes
for the capability pointer, plus 4 bytes for the message address,
plus 2 bytes for the message data.  So that's 10 bytes in total.

I think it would be best if you calculate the size based on the
existing msi_ macros.

if ( masking )
    end = msi_pending_bits_reg(msi_pos, address64);
else
    end = msi_mask_bits_reg(msi_pos, address64) - 2;

size = end - msi_control_reg(msi_pos);

> +
> +static void fini_msi(struct pci_dev *pdev)
> +{
> +    unsigned int size = MSI_STRUCTURE_SIZE_32;
> +
> +    if ( !pdev->vpci->msi )
> +        return;
> +
> +    if ( pdev->vpci->msi->address64 )
> +        size += 4;
> +    if ( pdev->vpci->msi->masking )
> +        size += 4;
> +
> +    /*
> +     * Remove all possible registered registers except capability ID
> +     * register and next capability pointer register, which will be
> +     * removed in mask function.
> +     *msi_mask_bits_reg/
> +    vpci_remove_registers(pdev->vpci,
> +                          msi_control_reg(pdev->msi_pos),
> +                          size - PCI_MSI_FLAGS);
> +    xfree(pdev->vpci->msi);
> +    pdev->vpci->msi = NULL;
> +}
> +
>  static int cf_check init_msi(struct pci_dev *pdev)
>  {
>      unsigned int pos = pdev->msi_pos;
> @@ -209,12 +236,7 @@ static int cf_check init_msi(struct pci_dev *pdev)
>      ret = vpci_add_register(pdev->vpci, control_read, control_write,
>                              msi_control_reg(pos), 2, pdev->vpci->msi);
>      if ( ret )
> -        /*
> -         * NB: there's no need to free the msi struct or remove the register
> -         * handlers form the config space, the caller will take care of the
> -         * cleanup.
> -         */
> -        return ret;
> +        goto fail;
>  
>      /* Get the maximum number of vectors the device supports. */
>      control = pci_conf_read16(pdev->sbdf, msi_control_reg(pos));
> @@ -237,20 +259,20 @@ static int cf_check init_msi(struct pci_dev *pdev)
>      ret = vpci_add_register(pdev->vpci, address_read, address_write,
>                              msi_lower_address_reg(pos), 4, pdev->vpci->msi);
>      if ( ret )
> -        return ret;
> +        goto fail;
>  
>      ret = vpci_add_register(pdev->vpci, data_read, data_write,
>                              msi_data_reg(pos, pdev->vpci->msi->address64), 2,
>                              pdev->vpci->msi);
>      if ( ret )
> -        return ret;
> +        goto fail;
>  
>      if ( pdev->vpci->msi->address64 )
>      {
>          ret = vpci_add_register(pdev->vpci, address_hi_read, address_hi_write,
>                                  msi_upper_address_reg(pos), 4, pdev->vpci->msi);
>          if ( ret )
> -            return ret;
> +            goto fail;
>      }
>  
>      if ( pdev->vpci->msi->masking )
> @@ -260,7 +282,7 @@ static int cf_check init_msi(struct pci_dev *pdev)
>                                                    pdev->vpci->msi->address64),
>                                  4, pdev->vpci->msi);
>          if ( ret )
> -            return ret;
> +            goto fail;
>          /*
>           * FIXME: do not add any handler for the pending bits for the hardware
>           * domain, which means direct access. This will be revisited when
> @@ -269,6 +291,11 @@ static int cf_check init_msi(struct pci_dev *pdev)
>      }
>  
>      return 0;
> +
> + fail:
> +    fini_msi(pdev);
> +
> +    return ret;
>  }
>  REGISTER_VPCI_LEGACY_CAP(PCI_CAP_ID_MSI, init_msi);

I wonder if the fini_msi should be referenced in
REGISTER_VPCI_{EXTENDED,LEGACY}_CAP(), so that the caller of
init_msi() can call fini_msi() on failure and thus avoid all those
fail hooks and labels, as the caller can take care of the cleanup.

Thanks, Roger.


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Date: Tue, 15 Apr 2025 15:39:27 +0200
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v1 06/14] xen/riscv: riscv_of_processor_hartid()
 implementation
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
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 <65f5952a-8d2a-499c-bd66-53e9e2fbfa9c@suse.com>
Content-Language: en-US
From: Oleksii Kurochko 
In-Reply-To: <65f5952a-8d2a-499c-bd66-53e9e2fbfa9c@suse.com>

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On 4/10/25 5:53 PM, Jan Beulich wrote:
> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>> @@ -13,3 +16,68 @@ void __init smp_clear_cpu_maps(void)
>>       cpumask_set_cpu(0, &cpu_online_map);
>>       cpumask_copy(&cpu_present_map, &cpu_possible_map);
>>   }
>> +
>> +/**
>> + * of_get_cpu_hwid - Get the hardware ID from a CPU device node
>> + *
>> + * @cpun: CPU number(logical index) for which device node is required
>> + * @thread: The local thread number to get the hardware ID for.
>> + *
>> + * Return: The hardware ID for the CPU node or ~0ULL if not found.
>> + */
>> +static uint64_t of_get_cpu_hwid(struct dt_device_node *cpun, unsigned int thread)
> What does the "of" prefix stand for here? Looking at the function body I'm
> really at a loss. (I was first guessing something like OpenFirmware, but
> there's nothing here that would support that.)

I copy this function from Linux kernel. But you are right, "of" means OpenFirmware or
Open Firmware Device Tree and is used for the functions which work with device
tree.
I'll rename to dt_get_cpu_hwid() to follow the naming of device tree's functions
name in Xen.

>
> As you're only fetching data - can cpun be pointer-to-const?

Sure, it can  be. I'll update that.

>
>> +{
>> +    const __be32 *cell;
>> +    int ac;
>> +    uint32_t len;
>> +
>> +    ac = dt_n_addr_cells(cpun);
>> +    cell = dt_get_property(cpun, "reg", &len);
>> +    if ( !cell || !ac || ((sizeof(*cell) * ac * (thread + 1)) > len) )
>> +        return ~0ULL;
> I'm sorry for my lack of DT knowledge, but what's "thread" representing here?
> You only pass in 0 below, so it's unclear whether it's what one might expect
> (the thread number on a multi-threaded core).

Based on the DT specification alone, the|`reg`| value could refer to either a CPU or a thread ID:
```
The value of reg is a  that defines a unique CPU/thread id for
the CPU/threads represented by the CPU node. If a CPU supports more than one thread
(i.e. multiple streams of execution) the reg prop-erty is an array with 1 element
per thread.
```

My understanding is that the term/thread/ was used in the Linux kernel to cover both
cases.
When SMT isn't supported, the CPU can be considered to have a single thread.
For example, RISC-V uses the term/hardware thread/ to describe a hart (i.e., a CPU).

Interestingly, the Linux kernel always uses|thread = 0|.

We could potentially drop this ambiguity and introduce an|ASSERT()| to check that
the|`reg`| property contains only one entry, representing the HART (CPU) ID:
```
   Software can determine the number of threads by dividing the size of reg by the parent
   node’s #address-cells. If `|reg`| has more than one entry, it would simply SMT support
   is required.
```

Does that approach make sense, or should we stick with the current implementation?

>
>> +    cell += ac * thread;
>> +    return dt_read_number(cell, ac);
> Nit (you know what)
>
>> +/*
>> + * Returns the hart ID of the given device tree node, or -ENODEV if the node
>> + * isn't an enabled and valid RISC-V hart node.
>> + */
>> +int riscv_of_processor_hartid(struct dt_device_node *node, unsigned long *hart)
> Similar question as above: What's "of" and what significance does the "riscv"
> prefix have in RISC-V code?

I will drop usage of 'of' in Xen and change it to 'dt'.

>
> Const-ness question again for "node".
>
>> +{
>> +    const char *isa;
>> +
>> +    if ( !dt_device_is_compatible(node, "riscv") )
>> +    {
>> +        printk("Found incompatible CPU\n");
>> +        return -ENODEV;
>> +    }
>> +
>> +    *hart = (unsigned long) of_get_cpu_hwid(node, 0);
>> +    if ( *hart == ~0UL )
> While for RV64 this won't matter, the difference in types (uint64_t returned,
> unsigned long used) is still puzzling me. What's the deal?

No specific reason, just overlooked that moment. I think we could use just
drop this cast.
The reason for uint64_t as a return type is that dt_read_number() returns
u64.

~ Oleksii

--------------YKs1CjQbsGPB0Y1NBR0w6uHB
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On 4/10/25 5:53 PM, Jan Beulich wrote:

    

    

      
On 08.04.2025 17:57, Oleksii Kurochko wrote:


      

        
@@ -13,3 +16,68 @@ void __init smp_clear_cpu_maps(void)
     cpumask_set_cpu(0, &cpu_online_map);
     cpumask_copy(&cpu_present_map, &cpu_possible_map);
 }
+
+/**
+ * of_get_cpu_hwid - Get the hardware ID from a CPU device node
+ *
+ * @cpun: CPU number(logical index) for which device node is required
+ * @thread: The local thread number to get the hardware ID for.
+ *
+ * Return: The hardware ID for the CPU node or ~0ULL if not found.
+ */
+static uint64_t of_get_cpu_hwid(struct dt_device_node *cpun, unsigned int thread)


      

      
What does the "of" prefix stand for here? Looking at the function body I'm
really at a loss. (I was first guessing something like OpenFirmware, but
there's nothing here that would support that.)

    

    
I copy this function from Linux kernel. But you are right, "of" means OpenFirmware or
Open Firmware Device Tree and is used for the functions which work with device
tree.
I'll rename to dt_get_cpu_hwid() to follow the naming of device tree's functions
name in Xen.



    

      

As you're only fetching data - can cpun be pointer-to-const?

    

    
Sure, it can  be. I'll update that.



    

      



      

        
+{
+    const __be32 *cell;
+    int ac;
+    uint32_t len;
+
+    ac = dt_n_addr_cells(cpun);
+    cell = dt_get_property(cpun, "reg", &len);
+    if ( !cell || !ac || ((sizeof(*cell) * ac * (thread + 1)) > len) )
+        return ~0ULL;


      

      
I'm sorry for my lack of DT knowledge, but what's "thread" representing here?
You only pass in 0 below, so it's unclear whether it's what one might expect
(the thread number on a multi-threaded core).

    

    
Based on the DT specification alone, the `reg` value could refer to either a CPU or a thread ID:
```
The value of reg is a <prop-encoded-array> that defines a unique CPU/thread id for
the CPU/threads represented by the CPU node. If a CPU supports more than one thread
(i.e. multiple streams of execution) the reg prop-erty is an array with 1 element
per thread.
```



    
My understanding is that the term thread was used in the Linux kernel to cover both
cases.
When SMT isn't supported, the CPU can be considered to have a single thread.
For example, RISC-V uses the term hardware thread to describe a hart (i.e., a CPU).

    
Interestingly, the Linux kernel always uses thread = 0.

    
We could potentially drop this ambiguity and introduce an ASSERT() to check that
the `reg` property contains only one entry, representing the HART (CPU) ID:
```
  Software can determine the number of threads by dividing the size of reg by the parent
  node’s #address-cells. If `reg` has more than one entry, it would simply SMT support
  is required.
```


    
Does that approach make sense, or should we stick with the current implementation?

    

    

      



      

        
+    cell += ac * thread;
+    return dt_read_number(cell, ac);


      

      
Nit (you know what)



      

        
+/*
+ * Returns the hart ID of the given device tree node, or -ENODEV if the node
+ * isn't an enabled and valid RISC-V hart node.
+ */
+int riscv_of_processor_hartid(struct dt_device_node *node, unsigned long *hart)


      

      
Similar question as above: What's "of" and what significance does the "riscv"
prefix have in RISC-V code?

    

    
I will drop usage of 'of' in Xen and change it to 'dt'.



    

      

Const-ness question again for "node".



      

        
+{
+    const char *isa;
+
+    if ( !dt_device_is_compatible(node, "riscv") )
+    {
+        printk("Found incompatible CPU\n");
+        return -ENODEV;
+    }
+
+    *hart = (unsigned long) of_get_cpu_hwid(node, 0);
+    if ( *hart == ~0UL )


      

      
While for RV64 this won't matter, the difference in types (uint64_t returned,
unsigned long used) is still puzzling me. What's the deal?

    

    
No specific reason, just overlooked that moment. I think we could use just
drop this cast.
The reason for uint64_t as a return type is that dt_read_number() returns
u64.

~ Oleksii

  


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From: "Teddy Astie" 
Subject: =?utf-8?Q?Re:=20[PATCH]=20x86/shadow:=20Fix=20UBSAN=20in=20hvm=5Femulate=5Finsn=5Ffetch?=
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Le 15/04/2025 =C3=A0 15:02, Andrew Cooper a =C3=A9crit=C2=A0:
> Which compiler are you using?=C2=A0 (Just so there's a record.=C2=A0 Thes=
e reports
> are version-sensitive.)

It's GCC 14.2.0.

> 
> Do you know precisely which condition is being hit?

It occurs when booting OVMF (PVH and HVM) with HAP=3D0.
It doesn't seem to occur with SeaBIOS or PVH GRUB though.

Teddy


Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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Date: Tue, 15 Apr 2025 15:45:19 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jiqian Chen 
Cc: xen-devel@lists.xenproject.org, Huang Rui ,
	Jan Beulich ,
	Andrew Cooper 
Subject: Re: [PATCH v2 8/8] vpci/msix: Add function to clean MSIX resources
Message-ID: 
References: <20250409064528.405573-1-Jiqian.Chen@amd.com>
 <20250409064528.405573-9-Jiqian.Chen@amd.com>
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On Wed, Apr 09, 2025 at 02:45:28PM +0800, Jiqian Chen wrote:
> When init_msix() fails, it needs to clean all MSIX resources.
> So, add a new function fini_msix() to do that.
> 
> And to unregister the mmio handler of vpci_msix_table_ops, add
> a new function.
> 
> Signed-off-by: Jiqian Chen 
> ---
> cc: Jan Beulich 
> cc: Andrew Cooper 
> cc: "Roger Pau Monné" 
> ---
> v1->v2 changes:
> new patch.
> 
> Best regards,
> Jiqian Chen.
> ---
>  xen/arch/x86/hvm/intercept.c      | 44 ++++++++++++++++++++++
>  xen/arch/x86/include/asm/hvm/io.h |  3 ++
>  xen/drivers/vpci/msix.c           | 61 ++++++++++++++++++++++++++++---
>  3 files changed, 103 insertions(+), 5 deletions(-)
> 
> diff --git a/xen/arch/x86/hvm/intercept.c b/xen/arch/x86/hvm/intercept.c
> index da22c386763e..5eacf51d4d2c 100644
> --- a/xen/arch/x86/hvm/intercept.c
> +++ b/xen/arch/x86/hvm/intercept.c
> @@ -276,6 +276,50 @@ void register_mmio_handler(struct domain *d,
>      handler->mmio.ops = ops;
>  }
>  
> +void unregister_mmio_handler(struct domain *d,
> +                             const struct hvm_mmio_ops *ops)
> +{
> +    unsigned int i, count = d->arch.hvm.io_handler_count;
> +
> +    ASSERT(d->arch.hvm.io_handler);
> +
> +    if ( !count )
> +        return;
> +
> +    for ( i = 0; i < count; i++ )
> +        if ( d->arch.hvm.io_handler[i].type == IOREQ_TYPE_COPY &&
> +             d->arch.hvm.io_handler[i].mmio.ops == ops )
> +            break;
> +
> +    if ( i == count )
> +        return;
> +
> +    for ( ; i < count - 1; i++ )
> +    {
> +        struct hvm_io_handler *curr = &d->arch.hvm.io_handler[i];
> +        struct hvm_io_handler *next = &d->arch.hvm.io_handler[i + 1];
> +
> +        curr->type = next->type;
> +        curr->ops = next->ops;
> +        if ( next->type == IOREQ_TYPE_COPY )
> +        {
> +            curr->portio.port = 0;
> +            curr->portio.size = 0;
> +            curr->portio.action = 0;
> +            curr->mmio.ops = next->mmio.ops;
> +        }
> +        else
> +        {
> +            curr->mmio.ops = 0;
> +            curr->portio.port = next->portio.port;
> +            curr->portio.size = next->portio.size;
> +            curr->portio.action = next->portio.action;
> +        }
> +    }

Can't you use memmove() instead of a for loop?

memmove(&d->arch.hvm.io_handler[i], &d->arch.hvm.io_handler[i + 1],
	sizeof(d->arch.hvm.io_handler[0]) * (count - i - 1));

> +
> +    d->arch.hvm.io_handler_count--;
> +}
> +
>  void register_portio_handler(struct domain *d, unsigned int port,
>                               unsigned int size, portio_action_t action)
>  {
> diff --git a/xen/arch/x86/include/asm/hvm/io.h b/xen/arch/x86/include/asm/hvm/io.h
> index 565bad300d20..018d2745fd99 100644
> --- a/xen/arch/x86/include/asm/hvm/io.h
> +++ b/xen/arch/x86/include/asm/hvm/io.h
> @@ -75,6 +75,9 @@ bool hvm_mmio_internal(paddr_t gpa);
>  void register_mmio_handler(struct domain *d,
>                             const struct hvm_mmio_ops *ops);
>  
> +void unregister_mmio_handler(struct domain *d,
> +                             const struct hvm_mmio_ops *ops);
> +
>  void register_portio_handler(
>      struct domain *d, unsigned int port, unsigned int size,
>      portio_action_t action);
> diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c
> index 6537374c79a0..60654d4f6d0b 100644
> --- a/xen/drivers/vpci/msix.c
> +++ b/xen/drivers/vpci/msix.c
> @@ -703,6 +703,54 @@ int vpci_make_msix_hole(const struct pci_dev *pdev)
>      return 0;
>  }
>  
> +static void fini_msix(struct pci_dev *pdev)
> +{
> +    struct vpci *vpci = pdev->vpci;
> +
> +    if ( !vpci->msix )
> +        return;
> +
> +    list_del(&vpci->msix->next);
> +    if ( list_empty(&pdev->domain->arch.hvm.msix_tables) )
> +        unregister_mmio_handler(pdev->domain, &vpci_msix_table_ops);

At the point the MMIO handler is added the capability initialization
cannot fail, so arguably if the MSI-X handler is registered there will
always be at least one functional MSI-X capability that requires it.

IOW: you can likely drop the addition of unregister_mmio_handler() and
avoid the removal of the MMIO handler.  Worst case a domain will end
up with a dummy handler that does nothing, but it won't cause
malfunctions.

> +
> +    /* Remove any MSIX regions if present. */
> +    for ( unsigned int i = 0;
> +          vpci->msix && i < ARRAY_SIZE(vpci->msix->tables);
> +          i++ )
> +    {
> +        unsigned long start = PFN_DOWN(vmsix_table_addr(pdev->vpci, i));
> +        unsigned long end = PFN_DOWN(vmsix_table_addr(pdev->vpci, i) +
> +                                     vmsix_table_size(pdev->vpci, i) - 1);
> +
> +        for ( unsigned int j = 0; j < ARRAY_SIZE(vpci->header.bars); j++ )
> +        {
> +            int rc;
> +            const struct vpci_bar *bar = &vpci->header.bars[j];
> +
> +            if ( rangeset_is_empty(bar->mem) )
> +                continue;
> +
> +            rc = rangeset_remove_range(bar->mem, start, end);
> +            if ( rc )
> +            {
> +                gprintk(XENLOG_WARNING,
> +                       "%pp: failed to remove MSIX table [%lx, %lx]: %d\n",
> +                        &pdev->sbdf, start, end, rc);
> +                return;
> +            }
> +        }
> +    }

There's no need to do any of this rangeset manipulation.  The BAR
rangesets are re-created for any map/unmap request, and hence should
be empty unless there's a concurrent operation going on (which won't
be the case when initializing the capabilities).

> +
> +    for ( unsigned int i = 0; i < ARRAY_SIZE(vpci->msix->table); i++ )
> +        if ( vpci->msix->table[i] )
> +            iounmap(vpci->msix->table[i]);

The MSI-X init function never maps tables, so the code here (given
it's current usage) will also never unmap anything.  However I would
also like to use this code for vPCI deassing, at which point the logic
will get used.

Thanks, Roger.


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Subject: Re: [PATCH v1 06/14] xen/riscv: riscv_of_processor_hartid()
 implementation
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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From: Jan Beulich 
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On 15.04.2025 15:39, Oleksii Kurochko wrote:
> On 4/10/25 5:53 PM, Jan Beulich wrote:
>> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>>> +{
>>> +    const __be32 *cell;
>>> +    int ac;
>>> +    uint32_t len;
>>> +
>>> +    ac = dt_n_addr_cells(cpun);
>>> +    cell = dt_get_property(cpun, "reg", &len);
>>> +    if ( !cell || !ac || ((sizeof(*cell) * ac * (thread + 1)) > len) )
>>> +        return ~0ULL;
>> I'm sorry for my lack of DT knowledge, but what's "thread" representing here?
>> You only pass in 0 below, so it's unclear whether it's what one might expect
>> (the thread number on a multi-threaded core).
> 
> Based on the DT specification alone, the|`reg`| value could refer to either a CPU or a thread ID:
> ```
> The value of reg is a  that defines a unique CPU/thread id for
> the CPU/threads represented by the CPU node. If a CPU supports more than one thread
> (i.e. multiple streams of execution) the reg prop-erty is an array with 1 element
> per thread.
> ```
> 
> My understanding is that the term/thread/ was used in the Linux kernel to cover both
> cases.
> When SMT isn't supported, the CPU can be considered to have a single thread.
> For example, RISC-V uses the term/hardware thread/ to describe a hart (i.e., a CPU).
> 
> Interestingly, the Linux kernel always uses|thread = 0|.
> 
> We could potentially drop this ambiguity and introduce an|ASSERT()| to check that
> the|`reg`| property contains only one entry, representing the HART (CPU) ID:
> ```
>    Software can determine the number of threads by dividing the size of reg by the parent
>    node’s #address-cells. If `|reg`| has more than one entry, it would simply SMT support
>    is required.
> ```
> 
> Does that approach make sense, or should we stick with the current implementation?

If extra enabling is required to make multi-thread CPUs work, then panic()ing
(not so much ASSERT()ing) may make sense, for the time being. Better would be
if we could use all threads in a system right away.

Jan


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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
Subject: [PATCH] CI: Build with --prefix=/usr rather than setting LD_LIBRARY_PATH
Date: Tue, 15 Apr 2025 14:54:26 +0100
Message-Id: <20250415135426.2442073-1-andrew.cooper3@citrix.com>
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This also moves executables too.  I'm not sure why xilinx-smoke-dom0-x86_64.sh
was overriding PATH too, as /usr/local is clearly in PATH for all other tests,
but drop that too.

No practical change.

Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Doug Goldstein 
CC: Marek Marczykowski-Górecki 

https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1769687343
---
 automation/scripts/build                          | 2 +-
 automation/scripts/qemu-alpine-x86_64.sh          | 1 -
 automation/scripts/qemu-smoke-dom0-arm64.sh       | 1 -
 automation/scripts/qemu-smoke-dom0less-arm64.sh   | 3 +--
 automation/scripts/qubes-x86-64.sh                | 1 -
 automation/scripts/xilinx-smoke-dom0-x86_64.sh    | 3 ---
 automation/scripts/xilinx-smoke-dom0less-arm64.sh | 3 +--
 7 files changed, 3 insertions(+), 11 deletions(-)

diff --git a/automation/scripts/build b/automation/scripts/build
index 51effec81ddd..a348c781d1f2 100755
--- a/automation/scripts/build
+++ b/automation/scripts/build
@@ -67,7 +67,7 @@ elif [[ "${HYPERVISOR_ONLY}" == "y" ]]; then
     collect_xen_artefacts
 else
     # Full build.  Figure out our ./configure options
-    cfgargs=()
+    cfgargs=("--prefix=/usr")
     cfgargs+=("--enable-docs")
 
     # booleans for which compiler is in use
diff --git a/automation/scripts/qemu-alpine-x86_64.sh b/automation/scripts/qemu-alpine-x86_64.sh
index fe86caa39304..746e70483d2c 100755
--- a/automation/scripts/qemu-alpine-x86_64.sh
+++ b/automation/scripts/qemu-alpine-x86_64.sh
@@ -49,7 +49,6 @@ echo "#!/bin/bash
 
 set -x
 
-export LD_LIBRARY_PATH=/usr/local/lib
 bash /etc/init.d/xencommons start
 
 xl list
diff --git a/automation/scripts/qemu-smoke-dom0-arm64.sh b/automation/scripts/qemu-smoke-dom0-arm64.sh
index 61dd24b9abef..d6f6b7488018 100755
--- a/automation/scripts/qemu-smoke-dom0-arm64.sh
+++ b/automation/scripts/qemu-smoke-dom0-arm64.sh
@@ -46,7 +46,6 @@ extra=\"console=hvc0 root=/dev/ram0 rdinit=/bin/sh\"
 " > root/domU.cfg
 echo "#!/bin/bash
 
-export LD_LIBRARY_PATH=/usr/local/lib
 bash /etc/init.d/xencommons start
 
 xl list
diff --git a/automation/scripts/qemu-smoke-dom0less-arm64.sh b/automation/scripts/qemu-smoke-dom0less-arm64.sh
index 58f11dd31038..e7a3e670d033 100755
--- a/automation/scripts/qemu-smoke-dom0less-arm64.sh
+++ b/automation/scripts/qemu-smoke-dom0less-arm64.sh
@@ -125,10 +125,9 @@ mkdir -p etc/local.d
 
 echo "#!/bin/bash
 
-export LD_LIBRARY_PATH=/usr/local/lib
 bash /etc/init.d/xencommons start
 
-/usr/local/lib/xen/bin/init-dom0less
+/usr/lib/xen/bin/init-dom0less
 
 brctl addbr xenbr0
 brctl addif xenbr0 eth0
diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh
index 1f90e7002c73..bfdd2ceb99ba 100755
--- a/automation/scripts/qubes-x86-64.sh
+++ b/automation/scripts/qubes-x86-64.sh
@@ -201,7 +201,6 @@ cp -a ../automation/scripts/run-tools-tests tests/
 
 echo "#!/bin/bash
 
-export LD_LIBRARY_PATH=/usr/local/lib
 bash /etc/init.d/xencommons start
 
 brctl addbr xenbr0
diff --git a/automation/scripts/xilinx-smoke-dom0-x86_64.sh b/automation/scripts/xilinx-smoke-dom0-x86_64.sh
index 5bb44188dc3d..8f02fa73bd06 100755
--- a/automation/scripts/xilinx-smoke-dom0-x86_64.sh
+++ b/automation/scripts/xilinx-smoke-dom0-x86_64.sh
@@ -92,8 +92,6 @@ cd rootfs
 mkdir -p etc/local.d
 echo "#!/bin/sh
 set -x
-export LD_LIBRARY_PATH=/usr/local/lib
-PATH=/usr/local/bin:/usr/local/sbin:\$PATH
 ${DOMU_CMD}
 " > etc/local.d/xen.start
 chmod +x etc/local.d/xen.start
@@ -119,7 +117,6 @@ cd rootfs
 mkdir -p boot etc/local.d etc/xen etc/default
 echo "#!/bin/bash
 set -x
-export LD_LIBRARY_PATH=/usr/local/lib
 bash /etc/init.d/xencommons start
 ${DOM0_CMD}
 " > etc/local.d/xen.start
diff --git a/automation/scripts/xilinx-smoke-dom0less-arm64.sh b/automation/scripts/xilinx-smoke-dom0less-arm64.sh
index 59f3fe7edb3e..293232eebfe7 100755
--- a/automation/scripts/xilinx-smoke-dom0less-arm64.sh
+++ b/automation/scripts/xilinx-smoke-dom0less-arm64.sh
@@ -64,10 +64,9 @@ cd rootfs
 mkdir -p etc/local.d
 echo "#!/bin/bash
 
-export LD_LIBRARY_PATH=/usr/local/lib
 bash /etc/init.d/xencommons start
 
-/usr/local/lib/xen/bin/init-dom0less
+/usr/lib/xen/bin/init-dom0less
 
 ${dom0_check}
 " > etc/local.d/xen.start
-- 
2.39.5



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Subject: Re: [PATCH v3 11/16] x86/hyperlaunch: locate dom0 initrd with
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To: Alejandro Vallejo 
Cc: "Daniel P. Smith" ,
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 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 15.04.2025 13:59, Alejandro Vallejo wrote:
> On Tue Apr 15, 2025 at 7:17 AM BST, Jan Beulich wrote:
>> On 14.04.2025 19:27, Alejandro Vallejo wrote:
>>> So... how frontally opposed would you be to restoring the ramdisk
>>> nomenclature? Also, for ease of rebasing future patches it'd be far
>>> nicer to go back to ramdisk rather than reinventing some new name.
>>
>> Well, I fear I wouldn't ack such a patch. If everyone else agrees
>> that "ramdisk" is the best of all names (or at least getting close),
>> I'd perhaps mumble over, but let it go in.
> 
> Ok... When I send v4 I'll do so keeping the "module" rename. Meanwhile,
> I'll try to think of some options. Calling Xen's modules and the booted
> kernel modules the same way is just way too confusing.
> 
> I take it you have the same dislike for initrd as you do for ramdisk?

Indeed.

Jan


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Date: Tue, 15 Apr 2025 16:13:52 +0200
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Subject: Re: [PATCH v3 12/16] x86/hyperlaunch: add domain id parsing to domain
 config
To: Alejandro Vallejo 
Cc: xen-devel@lists.xenproject.org,
 "Daniel P. Smith" ,
 Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini ,
 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Julien Grall , Bertrand Marquis ,
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On 15.04.2025 13:37, Alejandro Vallejo wrote:
> On Tue Apr 15, 2025 at 7:21 AM BST, Jan Beulich wrote:
>> On 14.04.2025 20:07, Alejandro Vallejo wrote:
>>> On Wed Apr 9, 2025 at 11:15 PM BST, Denis Mukhin wrote:
>>>> On Tuesday, April 8th, 2025 at 9:07 AM, Alejandro Vallejo  wrote:
>>>>> @@ -233,6 +264,12 @@ static int __init process_domain_node(
>>>>> return -ENODATA;
>>>>> }
>>>>>
>>>>> + if ( bd->domid == DOMID_INVALID )
>>>>>
>>>>> + bd->domid = get_initial_domain_id();
>>>>>
>>>>> + else if ( bd->domid != get_initial_domain_id() )
>>>>>
>>>>> + printk(XENLOG_WARNING
>>>>> + "WARN: Booting without initial domid not supported.\n");
>>>>
>>>> Drop WARN since the log message is XENLOG_WARNING level already?
>>>
>>> As mentioned elsewhere, the point of those prefixes are to be readable.
>>
>> This, however, imo is a matter of consistency across the codebase, not just
>> within hyperlaunch.
> 
> I agree. There is precedent though for certain printks to have a
> collective pattern for ease of reading (e.g: spec_ctrl.c when printing
> mitigations). With I'm merely justifying the 2 spaces followed by
> lowercase.
> 
> I did try to remove them and it was strictly harder to know what they
> referred to.
> 
>> Plus (again imo) if anything, prefixes that are part of
>> the log output should contain proper words ("Warning:" or "Error:"), and
>> they shouldn't needlessly "shout" (i.e. "FATAL:" is okay-ish to be all caps,
>> but the others aren't).
> 
> Right. I'm happy to rewrite them as "Warning: ..." and "Error: ..."

FTAOD - in the common case I'd prefer such prefixes to be omitted. Which
still means that there may be special cases where having them is warranted.

Jan


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Date: Tue, 15 Apr 2025 16:16:56 +0200
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Subject: Re: [PATCH v3 12/16] x86/hyperlaunch: add domain id parsing to domain
 config
To: Alejandro Vallejo 
Cc: "Daniel P. Smith" ,
 Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini ,
 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Julien Grall , Bertrand Marquis ,
 xen-devel@lists.xenproject.org
References: <20250408160802.49870-1-agarciav@amd.com>
 <20250408160802.49870-13-agarciav@amd.com>
 <6ce79cc0-1fec-4ad9-834e-680ef1f81549@suse.com>
 
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From: Jan Beulich 
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On 15.04.2025 14:05, Alejandro Vallejo wrote:
> On Tue Apr 15, 2025 at 7:27 AM BST, Jan Beulich wrote:
>> On 14.04.2025 20:35, Alejandro Vallejo wrote:
>>> On Thu Apr 10, 2025 at 12:49 PM BST, Jan Beulich wrote:
>>>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>>>> From: "Daniel P. Smith" 
>>>>> @@ -158,12 +159,42 @@ int __init fdt_read_multiboot_module(const void *fdt, int node,
>>>>>  static int __init process_domain_node(
>>>>>      struct boot_info *bi, const void *fdt, int dom_node)
>>>>>  {
>>>>> -    int node;
>>>>> +    int node, property;
>>>>>      struct boot_domain *bd = &bi->domains[bi->nr_domains];
>>>>>      const char *name = fdt_get_name(fdt, dom_node, NULL) ?: "unknown";
>>>>>      int address_cells = fdt_address_cells(fdt, dom_node);
>>>>>      int size_cells = fdt_size_cells(fdt, dom_node);
>>>>>  
>>>>> +    fdt_for_each_property_offset(property, fdt, dom_node)
>>>>> +    {
>>>>> +        const struct fdt_property *prop;
>>>>> +        const char *prop_name;
>>>>> +        int name_len;
>>>>> +
>>>>> +        prop = fdt_get_property_by_offset(fdt, property, NULL);
>>>>> +        if ( !prop )
>>>>> +            continue; /* silently skip */
>>>>> +
>>>>> +        prop_name = fdt_get_string(fdt, fdt32_to_cpu(prop->nameoff), &name_len);
>>>>> +
>>>>> +        if ( strncmp(prop_name, "domid", name_len) == 0 )
>>>>> +        {
>>>>> +            uint32_t val = DOMID_INVALID;
>>>>> +            if ( fdt_prop_as_u32(prop, &val) != 0 )
>>>>> +            {
>>>>> +                printk("  failed processing domain id for domain %s\n", name);
>>>>> +                return -EINVAL;
>>>>> +            }
>>>>> +            if ( val >= DOMID_FIRST_RESERVED )
>>>>> +            {
>>>>> +                printk("  invalid domain id for domain %s\n", name);
>>>>> +                return -EINVAL;
>>>>> +            }
>>>>> +            bd->domid = (domid_t)val;
>>>>
>>>> And a conflict with other domains' IDs will not be complained about?
>>>
>>> Hmmm... sure, I can iterate the domlist and check.
>>
>> Well, just to clarify: The checking doesn't necessarily need to happen here
>> and now. It may also happen as domains are actually created. Yet then I
>> think a pointer there (in a code comment) would be helpful here.
> 
> That'd be fairly unsafe. In the case of parallel boot it'd be
> indeterminate which VMs end up running if they happen to have a domid
> clash. It's better to detect the error earlier and crash before any get
> to start up.

What's the unsafe aspect here? We'd crash either way; the domain(s) that
may be successfully launched wouldn't make it very far.

Yet irrespective - my request is _that_ collisions are checked for. I
don't mind much _where_ that checking lives.

>>>>> @@ -233,6 +264,12 @@ static int __init process_domain_node(
>>>>>          return -ENODATA;
>>>>>      }
>>>>>  
>>>>> +    if ( bd->domid == DOMID_INVALID )
>>>>> +        bd->domid = get_initial_domain_id();
>>>>> +    else if ( bd->domid != get_initial_domain_id() )
>>>>> +        printk(XENLOG_WARNING
>>>>> +               "WARN: Booting without initial domid not supported.\n");
>>>>
>>>> I'm not a native speaker, but (or perhaps because of that) "without" feels
>>>> wrong here.
>>>
>>> It's probably the compound effect of without and "not supported". The
>>> statement is correct, but it's arguably a bit obtuse.
>>>
>>> I'll replace it with "WARN: Unsupported boot with missing initial domid.".
>>
>> But that still doesn't fit the check, which compares the given ID (i.e.
>> there's nothing "missing" here) with the expected one. The "no ID given"
>> is handled by the plain if() that's first.
> 
> It's not that the domid is missing from the node, but that the domid in
> the node doesn't match the initial domid. Maybe s/domid/domain, then?
> 
>   "Warning: Unsupported boot with missing initial domain"

I must be missing something: When it's "don't match" why would the message
say "missing"?

Jan


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Subject: Re: [PATCH v3 16/16] x86/hyperlaunch: add capabilities to boot domain
To: Alejandro Vallejo 
Cc: "Daniel P. Smith" ,
 Xenia Ragiadakou ,
 Stefano Stabellini ,
 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 xen-devel@lists.xenproject.org, Jason Andryuk 
References: <20250408160802.49870-1-agarciav@amd.com>
 <20250408160802.49870-17-agarciav@amd.com>
 <93bad6aa-57a8-427d-a0f6-924f03f0db34@suse.com>
 
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On 15.04.2025 14:22, Alejandro Vallejo wrote:
> On Tue Apr 15, 2025 at 7:38 AM BST, Jan Beulich wrote:
>> On 14.04.2025 21:31, Alejandro Vallejo wrote:
>>> On Thu Apr 10, 2025 at 1:18 PM BST, Jan Beulich wrote:
>>>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>>>> --- a/xen/arch/x86/setup.c
>>>>> +++ b/xen/arch/x86/setup.c
>>>>> @@ -1006,6 +1006,7 @@ static struct domain *__init create_dom0(struct boot_info *bi)
>>>>>  {
>>>>>      char *cmdline = NULL;
>>>>>      size_t cmdline_size;
>>>>> +    unsigned int create_flags = 0;
>>>>>      struct xen_domctl_createdomain dom0_cfg = {
>>>>>          .flags = IS_ENABLED(CONFIG_TBOOT) ? XEN_DOMCTL_CDF_s3_integrity : 0,
>>>>>          .max_evtchn_port = -1,
>>>>> @@ -1037,7 +1038,10 @@ static struct domain *__init create_dom0(struct boot_info *bi)
>>>>>      if ( bd->domid == DOMID_INVALID )
>>>>>          /* Create initial domain.  Not d0 for pvshim. */
>>>>>          bd->domid = get_initial_domain_id();
>>>>> -    d = domain_create(bd->domid, &dom0_cfg, pv_shim ? 0 : CDF_privileged);
>>>>> +    if ( bd->capabilities & BUILD_CAPS_CONTROL )
>>>>> +        create_flags |= CDF_privileged;
>>>>
>>>> Seeing that builder_init() in the non-DT case sets the new bit unconditionally,
>>>> isn't the shim's only domain suddenly getting CDF_privileged set this way? Oh,
>>>> no, you then ...
>>>>
>>>>> +    d = domain_create(bd->domid, &dom0_cfg,
>>>>> +                      pv_shim ? 0 : create_flags);
>>>>
>>>> ... hide the flag here. Any reason to have the intermediate variable in the
>>>> first place
>>>
>>> Well, the logic would end up fairly convoluted otherwise. As things
>>> stand this can be encoded in an if-else fashion with 2 calls, but
>>> there's 2 capability flags coming that need integrating together.
>>>
>>> This is just avoiding further code motion down the line.
>>
>> Is it?
>>
>> -    d = domain_create(bd->domid, &dom0_cfg, pv_shim ? 0 : CDF_privileged);
>> +    d = domain_create(bd->domid, &dom0_cfg,
>> +                      ((bd->capabilities & BUILD_CAPS_CONTROL) && !pv_shim
>> +                       ? CDF_privileged : 0));
>>
>> isn't really worse (imo),
> 
> Not sure I agree. Long conditions on ternary operators makes the
> control flow harder to follow.
> 
> A nicer alternative that also removes the auxiliary variable is to have
> a helper to convert from bootcaps to whatever createdomainflags are
> required. That'd extend naturally for more bits.
> 
>> but is highlighting the problem more clearly: Why
>> would the shim have BUILD_CAPS_CONTROL set in the first place? Without that
>> the statement would remain pretty similar to what it was before.
> 
> If the commandline is parsed early enough (I see the early parse path in
> head.S?) it would be better to add this logic to builder_init() and
> prevent the capability from reaching the boot_domain in the first place.

The parsing from head.S is only partial. But surely DT is being looked at
far later than when the full parsing (cmdline_parse()) is done?

Jan


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Date: Tue, 15 Apr 2025 16:42:57 +0200
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Subject: Re: [PATCH v1 11/14] xen/riscv: add external interrupt handling for
 hypervisor mode
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Romain Caritey , xen-devel@lists.xenproject.org
References: 
 <1685488b8c1b48149e94bd3625c7b46b78c72e8e.1744126720.git.oleksii.kurochko@gmail.com>
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From: Jan Beulich 
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On 08.04.2025 17:57, Oleksii Kurochko wrote:
> Implement functions necessarry to have working external interrupts in
> hypervisor mode. The following changes are done:
>  - Add a common function intc_handle_external_irq() to call APLIC specific
>    function to handle an interrupt.
>  - Update do_trap() function to handle IRQ_S_EXT case; add the check to catch
>    case when cause of trap is an interrupt.
>  - Add handle_interrrupt() member to intc_hw_operations structure.
>  - Enable local interrupt delivery for IMSIC by implementation and calling of
>    imsic_ids_local_delivery() in imsic_init();

Ah, here is where that call really belongs (see my question on the earlier
patch). Please make sure you series builds okay at every patch boundary.

> --- a/xen/arch/riscv/aplic.c
> +++ b/xen/arch/riscv/aplic.c
> @@ -261,6 +261,21 @@ static void aplic_set_irq_affinity(struct irq_desc *desc, const cpumask_t *mask)
>      spin_unlock(&aplic.lock);
>  }
>  
> +static void aplic_handle_interrupt(unsigned long cause, struct cpu_user_regs *regs)
> +{
> +    /* disable to avoid more external interrupts */
> +    csr_clear(CSR_SIE, 1UL << IRQ_S_EXT);

Didn't I see you use BIT() elsewhere? Would be nice to be overall consistent
at least within related code.

> +    /* clear the pending bit */
> +    csr_clear(CSR_SIP, 1UL << IRQ_S_EXT);
> +
> +    /* dispatch the interrupt */
> +    do_IRQ(regs, csr_swap(CSR_STOPEI, 0) >> TOPI_IID_SHIFT);
> +
> +    /* enable external interrupts */
> +    csr_set(CSR_SIE, 1UL << IRQ_S_EXT);
> +}

Why does "cause" need passing into here? I realize the function is used ...

> @@ -278,6 +293,7 @@ static const struct intc_hw_operations aplic_ops = {
>      .host_irq_type       = &aplic_host_irq_type,
>      .set_irq_priority    = aplic_set_irq_priority,
>      .set_irq_type        = aplic_set_irq_type,
> +    .handle_interrupt    = aplic_handle_interrupt,
>  };

... as a hook, yet it's still unclear whether (why) any other such hook
would need the cause to be passed in.

> @@ -33,6 +44,20 @@ do {                            \
>      csr_clear(CSR_SIREG, v);    \
>  } while (0)
>  
> +void imsic_ids_local_delivery(bool enable)

__init as long as the sole caller is such?

> --- a/xen/arch/riscv/include/asm/intc.h
> +++ b/xen/arch/riscv/include/asm/intc.h
> @@ -34,6 +34,8 @@ struct intc_hw_operations {
>      /* Set IRQ priority */
>      void (*set_irq_priority)(struct irq_desc *desc, unsigned int priority);
>  
> +    /* handle external interrupt */
> +    void (*handle_interrupt)(unsigned long cause, struct cpu_user_regs *regs);
>  };
>  
>  void intc_preinit(void);
> @@ -45,4 +47,7 @@ void register_intc_ops(const struct intc_hw_operations *ops);
>  struct irq_desc;
>  void intc_route_irq_to_xen(struct irq_desc *desc, unsigned int priority);
>  
> +struct cpu_user_regs;

This is too late - you've used it above already. It either can be dropped,
or needs to move up.

> --- a/xen/arch/riscv/intc.c
> +++ b/xen/arch/riscv/intc.c
> @@ -51,6 +51,13 @@ static void intc_set_irq_priority(struct irq_desc *desc, unsigned int priority)
>      intc_hw_ops->set_irq_priority(desc, priority);
>  }
>  
> +void intc_handle_external_irqs(unsigned long cause, struct cpu_user_regs *regs)
> +{
> +    ASSERT(intc_hw_ops && intc_hw_ops->handle_interrupt);

I don't view such checks (on every interrupt) as very useful. If you checked
once early on - okay. But here you gain nothing at all ...

> +    intc_hw_ops->handle_interrupt(cause, regs);

... towards the use here, when considering a release build.


> @@ -83,3 +87,42 @@ void __init init_IRQ(void)
>      if ( init_irq_data() < 0 )
>          panic("initialization of IRQ data failed\n");
>  }
> +
> +/* Dispatch an interrupt */
> +void do_IRQ(struct cpu_user_regs *regs, unsigned int irq)
> +{
> +    struct irq_desc *desc = irq_to_desc(irq);
> +    struct irqaction *action;
> +
> +    irq_enter();
> +
> +    spin_lock(&desc->lock);
> +    desc->handler->ack(desc);
> +
> +    if ( test_bit(_IRQ_DISABLED, &desc->status) )
> +        goto out;
> +
> +    set_bit(_IRQ_INPROGRESS, &desc->status);

Same comment as on the earlier patch - atomic bitop when in a suitably
locked region?

> +    action = desc->action;
> +
> +    spin_unlock_irq(&desc->lock);
> +
> +#ifndef CONFIG_IRQ_HAS_MULTIPLE_ACTION

Stolen from Arm? What's this about?

> +    action->handler(irq, action->dev_id);
> +#else
> +    do {
> +        action->handler(irq, action->dev_id);
> +        action = action->next;
> +    } while ( action );
> +#endif /* CONFIG_IRQ_HAS_MULTIPLE_ACTION */
> +
> +    spin_lock_irq(&desc->lock);
> +
> +    clear_bit(_IRQ_INPROGRESS, &desc->status);

See above.

> +out:

Nit (you know what).

> @@ -128,6 +129,23 @@ void do_trap(struct cpu_user_regs *cpu_regs)
>          }
>          fallthrough;
>      default:
> +        if ( cause & CAUSE_IRQ_FLAG )
> +        {
> +            /* Handle interrupt */
> +            unsigned long icause = cause & ~CAUSE_IRQ_FLAG;
> +
> +            switch ( icause )
> +            {
> +            case IRQ_S_EXT:
> +                intc_handle_external_irqs(cause, cpu_regs);
> +                break;
> +            default:

Nit: Blank line please between non-fall-through case blocks.

Jan


From xen-devel-bounces@lists.xenproject.org Tue Apr 15 14:53:38 2025
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Date: Tue, 15 Apr 2025 16:53:24 +0200
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Subject: Re: [PATCH v1 10/14] xen/riscv: implementation of aplic and imsic
 operations
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Romain Caritey , xen-devel@lists.xenproject.org
References: 
 <74a07ed7c596bbcf581010685e01bfdfa19164f5.1744126720.git.oleksii.kurochko@gmail.com>
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From: Jan Beulich 
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In-Reply-To: <74a07ed7c596bbcf581010685e01bfdfa19164f5.1744126720.git.oleksii.kurochko@gmail.com>
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On 08.04.2025 17:57, Oleksii Kurochko wrote:
> --- a/xen/arch/riscv/imsic.c
> +++ b/xen/arch/riscv/imsic.c
> @@ -14,12 +14,68 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  
>  #include 
>  
>  static struct imsic_config imsic_cfg;
>  
> +#define imsic_csr_set(c, v)     \
> +do {                            \
> +    csr_write(CSR_SISELECT, c); \
> +    csr_set(CSR_SIREG, v);      \
> +} while (0)
> +
> +#define imsic_csr_clear(c, v)   \
> +do {                            \
> +    csr_write(CSR_SISELECT, c); \
> +    csr_clear(CSR_SIREG, v);    \
> +} while (0)

Coming back to these (the later patch adds one more here): How expensive are
these CSR writes? IOW would it perhaps make sense to maintain a local cache
of the last written SISELECT value, to avoid writing the same one again if
the same windowed register needs accessing twice in a row?

Jan


From xen-devel-bounces@lists.xenproject.org Tue Apr 15 15:02:11 2025
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Date: Tue, 15 Apr 2025 17:01:54 +0200
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Subject: Re: [PATCH v1 07/14] xen/riscv: Introduce intc_hw_operations
 abstraction
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Romain Caritey , xen-devel@lists.xenproject.org
References: 
 <139b37478b4ca7e2ec3a04b73f462197227f57fa.1744126720.git.oleksii.kurochko@gmail.com>
 
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On 4/10/25 6:02 PM, Jan Beulich wrote:
> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>> --- a/xen/arch/riscv/include/asm/intc.h
>> +++ b/xen/arch/riscv/include/asm/intc.h
>> @@ -17,6 +17,29 @@ struct intc_info {
>>       const struct dt_device_node *node;
>>   };
>>   
>> +struct intc_hw_operations {
>> +    /* Hold intc hw information */
>> +    const struct intc_info *info;
>> +    /* Initialize the intc and the boot CPU */
>> +    int (*init)(void);
>> +
>> +    /* hw_irq_controller to enable/disable/eoi host irq */
>> +    hw_irq_controller *host_irq_type;
> Pointer-to-const perhaps?

It could be pointer-to-const. I'll updat

>
>> +    /* Set IRQ type */
>> +    void (*set_irq_type)(struct irq_desc *desc, unsigned int type);
>> +    /* Set IRQ priority */
>> +    void (*set_irq_priority)(struct irq_desc *desc, unsigned int priority);
>> +
>> +};
>> +
>>   void intc_preinit(void);
>>   
>> +void intc_init(void);
>> +
>> +void register_intc_ops(const struct intc_hw_operations *ops);
>> +
>> +struct irq_desc;
> If it's needed here at all, it needs to move up, as some of the hook pointers
> already use the type.

It could be dropped, but then we would need to include||, and I figured
the fewer includes we have, the better.

>
>> --- a/xen/arch/riscv/intc.c
>> +++ b/xen/arch/riscv/intc.c
>> @@ -1,9 +1,21 @@
>>   /* SPDX-License-Identifier: GPL-2.0-only */
>>   
>>   #include 
>> +#include 
>>   #include 
>>   #include 
>> +#include 
>>   #include 
>> +#include 
>> +
>> +#include 
>> +
>> +static const struct intc_hw_operations *intc_hw_ops;
> __ro_after_init perhaps?
>
>> +
>> +void register_intc_ops(const struct intc_hw_operations *ops)
> __init perhaps?

For both, yes, it should be __ro_after_init and __init.

>
>> +{
>> +    intc_hw_ops = ops;
>> +}
>>   
>>   void __init intc_preinit(void)
>>   {
>> @@ -12,3 +24,42 @@ void __init intc_preinit(void)
>>       else
>>           panic("ACPI interrupt controller preinit() isn't implemented\n");
>>   }
>> +
>> +void __init intc_init(void)
>> +{
>> +    ASSERT(intc_hw_ops);
>> +
>> +    if ( intc_hw_ops->init() )
>> +        panic("Failed to initialize the interrupt controller drivers\n");
>> +}
>> +
>> +/* desc->irq needs to be disabled before calling this function */
>> +static void intc_set_irq_type(struct irq_desc *desc, unsigned int type)
>> +{
>> +    ASSERT(test_bit(_IRQ_DISABLED, &desc->status));
>> +    ASSERT(spin_is_locked(&desc->lock));
>> +    ASSERT(type != IRQ_TYPE_INVALID);
>> +    ASSERT(intc_hw_ops && intc_hw_ops->set_irq_type);
>> +
>> +    intc_hw_ops->set_irq_type(desc, type);
>> +}
>> +
>> +static void intc_set_irq_priority(struct irq_desc *desc, unsigned int priority)
>> +{
>> +    ASSERT(intc_hw_ops && intc_hw_ops->set_irq_priority);
>> +
>> +    intc_hw_ops->set_irq_priority(desc, priority);
>> +}
>> +
>> +void intc_route_irq_to_xen(struct irq_desc *desc, unsigned int priority)
>> +{
>> +    ASSERT(test_bit(_IRQ_DISABLED, &desc->status));
>> +    ASSERT(spin_is_locked(&desc->lock));
>> +    /* Can't route interrupts that don't exist */
>> +    ASSERT(intc_hw_ops && desc->irq < intc_hw_ops->info->nr_irqs);
>> +
>> +    desc->handler = intc_hw_ops->host_irq_type;
>> +
>> +    intc_set_irq_type(desc, desc->arch.type);
>> +    intc_set_irq_priority(desc, priority);
> If these are going to remain the sole callers of the two functions, I'd question
> the need for the separate functions. Some of the assertions done there would then
> actually be redundant.

Likely they will be reused for similar function but for guest to route an interrupt
to a guest. And, perhaps, only intc_set_irq_type() will be re-used outside
intc_route_irq_to_{xen,guest}...

>
> If not, is there a reason intc_set_irq_priority() doesn't have a lock-held check?

Do you mean this one: ASSERT(spin_is_locked(&desc->lock));

...
And it is the reason why intc_set_irq_priority() doesn't have this check as it is checked in the
caller.

But I think just to be on a safe side, it could be better to add this check to
intc_set_irq_priority().

~ Oleksii

--------------zGvFIHJPCJWGfAGl7HRXCBGk
Content-Type: text/html; charset=UTF-8
Content-Transfer-Encoding: 7bit



  
    
  
  
    


    

    
On 4/10/25 6:02 PM, Jan Beulich wrote:

    

    

      
On 08.04.2025 17:57, Oleksii Kurochko wrote:


      

        
--- a/xen/arch/riscv/include/asm/intc.h
+++ b/xen/arch/riscv/include/asm/intc.h
@@ -17,6 +17,29 @@ struct intc_info {
     const struct dt_device_node *node;
 };
 
+struct intc_hw_operations {
+    /* Hold intc hw information */
+    const struct intc_info *info;
+    /* Initialize the intc and the boot CPU */
+    int (*init)(void);
+
+    /* hw_irq_controller to enable/disable/eoi host irq */
+    hw_irq_controller *host_irq_type;


      

      
Pointer-to-const perhaps?

    

    
It could be pointer-to-const. I'll updat


    

      



      

        
+    /* Set IRQ type */
+    void (*set_irq_type)(struct irq_desc *desc, unsigned int type);
+    /* Set IRQ priority */
+    void (*set_irq_priority)(struct irq_desc *desc, unsigned int priority);
+
+};
+
 void intc_preinit(void);
 
+void intc_init(void);
+
+void register_intc_ops(const struct intc_hw_operations *ops);
+
+struct irq_desc;


      

      
If it's needed here at all, it needs to move up, as some of the hook pointers
already use the type.

    

    
It could be dropped, but then we would need to include <xen/irq.h>, and I figured
the fewer includes we have, the better.



    

      



      

        
--- a/xen/arch/riscv/intc.c
+++ b/xen/arch/riscv/intc.c
@@ -1,9 +1,21 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <xen/acpi.h>
+#include <xen/bug.h>
 #include <xen/device_tree.h>
 #include <xen/init.h>
+#include <xen/irq.h>
 #include <xen/lib.h>
+#include <xen/spinlock.h>
+
+#include <asm/intc.h>
+
+static const struct intc_hw_operations *intc_hw_ops;


      

      
__ro_after_init perhaps?



      

        
+
+void register_intc_ops(const struct intc_hw_operations *ops)


      

      
__init perhaps?

    

    
For both, yes, it should be __ro_after_init and __init. 


    

      



      

        
+{
+    intc_hw_ops = ops;
+}
 
 void __init intc_preinit(void)
 {
@@ -12,3 +24,42 @@ void __init intc_preinit(void)
     else
         panic("ACPI interrupt controller preinit() isn't implemented\n");
 }
+
+void __init intc_init(void)
+{
+    ASSERT(intc_hw_ops);
+
+    if ( intc_hw_ops->init() )
+        panic("Failed to initialize the interrupt controller drivers\n");
+}
+
+/* desc->irq needs to be disabled before calling this function */
+static void intc_set_irq_type(struct irq_desc *desc, unsigned int type)
+{
+    ASSERT(test_bit(_IRQ_DISABLED, &desc->status));
+    ASSERT(spin_is_locked(&desc->lock));
+    ASSERT(type != IRQ_TYPE_INVALID);
+    ASSERT(intc_hw_ops && intc_hw_ops->set_irq_type);
+
+    intc_hw_ops->set_irq_type(desc, type);
+}
+
+static void intc_set_irq_priority(struct irq_desc *desc, unsigned int priority)
+{
+    ASSERT(intc_hw_ops && intc_hw_ops->set_irq_priority);
+
+    intc_hw_ops->set_irq_priority(desc, priority);
+}
+
+void intc_route_irq_to_xen(struct irq_desc *desc, unsigned int priority)
+{
+    ASSERT(test_bit(_IRQ_DISABLED, &desc->status));
+    ASSERT(spin_is_locked(&desc->lock));
+    /* Can't route interrupts that don't exist */
+    ASSERT(intc_hw_ops && desc->irq < intc_hw_ops->info->nr_irqs);
+
+    desc->handler = intc_hw_ops->host_irq_type;
+
+    intc_set_irq_type(desc, desc->arch.type);
+    intc_set_irq_priority(desc, priority);


      

      
If these are going to remain the sole callers of the two functions, I'd question
the need for the separate functions. Some of the assertions done there would then
actually be redundant.

    

    
Likely they will be reused for similar function but for guest to route an interrupt
to a guest. And, perhaps, only intc_set_irq_type() will be re-used outside
intc_route_irq_to_{xen,guest}...

    

      

If not, is there a reason intc_set_irq_priority() doesn't have a lock-held check?

    

    
Do you mean this one: ASSERT(spin_is_locked(&desc->lock));

...
And it is the reason why intc_set_irq_priority() doesn't have this check as it is checked in the
caller.

But I think just to be on a safe side, it could be better to add this check to 
intc_set_irq_priority().

~ Oleksii


  


--------------zGvFIHJPCJWGfAGl7HRXCBGk--


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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Julien Grall ,
	Stefano Stabellini 
Subject: [PATCH v2 1/4] xen/io: provide helpers for multi size MMIO accesses
Date: Tue, 15 Apr 2025 17:32:43 +0200
Message-ID: <20250415153246.81688-2-roger.pau@citrix.com>
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Several handlers have the same necessity of reading or writing from or to
an MMIO region using 1, 2, 4 or 8 bytes accesses.  So far this has been
open-coded in the function itself.  Instead provide a new set of handlers
that encapsulate the accesses.

Since the added helpers are not architecture specific, introduce a new
generic io.h header.

No functional change intended.

Signed-off-by: Roger Pau Monné 
---
Changes since v1:
 - Limit {read,write}q() to 64bit architectures.
 - Always have a default case in switch statement.
---
 xen/arch/x86/hvm/vmsi.c | 47 ++--------------------------
 xen/arch/x86/mm.c       | 32 +++++--------------
 xen/drivers/vpci/msix.c | 47 ++--------------------------
 xen/include/xen/io.h    | 68 +++++++++++++++++++++++++++++++++++++++++
 4 files changed, 81 insertions(+), 113 deletions(-)
 create mode 100644 xen/include/xen/io.h

diff --git a/xen/arch/x86/hvm/vmsi.c b/xen/arch/x86/hvm/vmsi.c
index fd83abb929ec..61b89834d97d 100644
--- a/xen/arch/x86/hvm/vmsi.c
+++ b/xen/arch/x86/hvm/vmsi.c
@@ -24,6 +24,7 @@
  * Will be merged it with virtual IOAPIC logic, since most is the same
 */
 
+#include 
 #include 
 #include 
 #include 
@@ -304,28 +305,7 @@ static void adjacent_read(
 
     hwaddr = fix_to_virt(fixmap_idx) + PAGE_OFFSET(address);
 
-    switch ( len )
-    {
-    case 1:
-        *pval = readb(hwaddr);
-        break;
-
-    case 2:
-        *pval = readw(hwaddr);
-        break;
-
-    case 4:
-        *pval = readl(hwaddr);
-        break;
-
-    case 8:
-        *pval = readq(hwaddr);
-        break;
-
-    default:
-        ASSERT_UNREACHABLE();
-        break;
-    }
+    *pval = read_mmio(hwaddr, len);
 }
 
 static void adjacent_write(
@@ -344,28 +324,7 @@ static void adjacent_write(
 
     hwaddr = fix_to_virt(fixmap_idx) + PAGE_OFFSET(address);
 
-    switch ( len )
-    {
-    case 1:
-        writeb(val, hwaddr);
-        break;
-
-    case 2:
-        writew(val, hwaddr);
-        break;
-
-    case 4:
-        writel(val, hwaddr);
-        break;
-
-    case 8:
-        writeq(val, hwaddr);
-        break;
-
-    default:
-        ASSERT_UNREACHABLE();
-        break;
-    }
+    write_mmio(hwaddr, val, len);
 }
 
 static int cf_check msixtbl_read(
diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 1cf236516789..989e62e7ce6f 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -95,6 +95,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -116,7 +117,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -5102,7 +5102,7 @@ static void __iomem *subpage_mmio_map_page(
 static void subpage_mmio_write_emulate(
     mfn_t mfn,
     unsigned int offset,
-    const void *data,
+    unsigned long data,
     unsigned int len)
 {
     struct subpage_ro_range *entry;
@@ -5115,7 +5115,6 @@ static void subpage_mmio_write_emulate(
 
     if ( test_bit(offset / MMIO_RO_SUBPAGE_GRAN, entry->ro_elems) )
     {
- write_ignored:
         gprintk(XENLOG_WARNING,
                 "ignoring write to R/O MMIO 0x%"PRI_mfn"%03x len %u\n",
                 mfn_x(mfn), offset, len);
@@ -5131,26 +5130,7 @@ static void subpage_mmio_write_emulate(
         return;
     }
 
-    addr += offset;
-    switch ( len )
-    {
-    case 1:
-        writeb(*(const uint8_t*)data, addr);
-        break;
-    case 2:
-        writew(*(const uint16_t*)data, addr);
-        break;
-    case 4:
-        writel(*(const uint32_t*)data, addr);
-        break;
-    case 8:
-        writeq(*(const uint64_t*)data, addr);
-        break;
-    default:
-        /* mmio_ro_emulated_write() already validated the size */
-        ASSERT_UNREACHABLE();
-        goto write_ignored;
-    }
+    write_mmio(addr + offset, data, len);
 }
 
 #ifdef CONFIG_HVM
@@ -5185,18 +5165,20 @@ int cf_check mmio_ro_emulated_write(
     struct x86_emulate_ctxt *ctxt)
 {
     struct mmio_ro_emulate_ctxt *mmio_ro_ctxt = ctxt->data;
+    unsigned long data = 0;
 
     /* Only allow naturally-aligned stores at the original %cr2 address. */
     if ( ((bytes | offset) & (bytes - 1)) || !bytes ||
-         offset != mmio_ro_ctxt->cr2 )
+         offset != mmio_ro_ctxt->cr2 || bytes > sizeof(data) )
     {
         gdprintk(XENLOG_WARNING, "bad access (cr2=%lx, addr=%lx, bytes=%u)\n",
                 mmio_ro_ctxt->cr2, offset, bytes);
         return X86EMUL_UNHANDLEABLE;
     }
 
+    memcpy(&data, p_data, bytes);
     subpage_mmio_write_emulate(mmio_ro_ctxt->mfn, PAGE_OFFSET(offset),
-                               p_data, bytes);
+                               data, bytes);
 
     return X86EMUL_OKAY;
 }
diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c
index 6bd8c55bb48e..6455f2a03a01 100644
--- a/xen/drivers/vpci/msix.c
+++ b/xen/drivers/vpci/msix.c
@@ -17,6 +17,7 @@
  * License along with this program; If not, see .
  */
 
+#include 
 #include 
 #include 
 
@@ -344,28 +345,7 @@ static int adjacent_read(const struct domain *d, const struct vpci_msix *msix,
         return X86EMUL_OKAY;
     }
 
-    switch ( len )
-    {
-    case 1:
-        *data = readb(mem + PAGE_OFFSET(addr));
-        break;
-
-    case 2:
-        *data = readw(mem + PAGE_OFFSET(addr));
-        break;
-
-    case 4:
-        *data = readl(mem + PAGE_OFFSET(addr));
-        break;
-
-    case 8:
-        *data = readq(mem + PAGE_OFFSET(addr));
-        break;
-
-    default:
-        ASSERT_UNREACHABLE();
-        break;
-    }
+    *data = read_mmio(mem + PAGE_OFFSET(addr), len);
     spin_unlock(&vpci->lock);
 
     return X86EMUL_OKAY;
@@ -493,28 +473,7 @@ static int adjacent_write(const struct domain *d, const struct vpci_msix *msix,
         return X86EMUL_OKAY;
     }
 
-    switch ( len )
-    {
-    case 1:
-        writeb(data, mem + PAGE_OFFSET(addr));
-        break;
-
-    case 2:
-        writew(data, mem + PAGE_OFFSET(addr));
-        break;
-
-    case 4:
-        writel(data, mem + PAGE_OFFSET(addr));
-        break;
-
-    case 8:
-        writeq(data, mem + PAGE_OFFSET(addr));
-        break;
-
-    default:
-        ASSERT_UNREACHABLE();
-        break;
-    }
+    write_mmio(mem + PAGE_OFFSET(addr), data, len);
     spin_unlock(&vpci->lock);
 
     return X86EMUL_OKAY;
diff --git a/xen/include/xen/io.h b/xen/include/xen/io.h
new file mode 100644
index 000000000000..4495a04c403e
--- /dev/null
+++ b/xen/include/xen/io.h
@@ -0,0 +1,68 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * IO related routines.
+ *
+ * Copyright (c) 2025 Cloud Software Group
+ */
+#ifndef XEN_IO_H
+#define XEN_IO_H
+
+#include 
+
+#include 
+
+static inline unsigned long read_mmio(const volatile void __iomem *mem,
+                                      unsigned int size)
+{
+    switch ( size )
+    {
+    case 1:
+        return readb(mem);
+
+    case 2:
+        return readw(mem);
+
+    case 4:
+        return readl(mem);
+
+#ifdef CONFIG_64BIT
+    case 8:
+        return readq(mem);
+#endif
+
+    default:
+        ASSERT_UNREACHABLE();
+        return ~0UL;
+    }
+}
+
+static inline void write_mmio(volatile void __iomem *mem, unsigned long data,
+                              unsigned int size)
+{
+    switch ( size )
+    {
+    case 1:
+        writeb(data, mem);
+        break;
+
+    case 2:
+        writew(data, mem);
+        break;
+
+    case 4:
+        writel(data, mem);
+        break;
+
+#ifdef CONFIG_64BIT
+    case 8:
+        writeq(data, mem);
+        break;
+#endif
+
+    default:
+        ASSERT_UNREACHABLE();
+        break;
+    }
+}
+
+#endif /* XEN_IO_H */
-- 
2.48.1



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Julien Grall ,
	Stefano Stabellini 
Subject: [PATCH v2 0/4] xen/x86: fix implementation of subpage r/o MMIO
Date: Tue, 15 Apr 2025 17:32:42 +0200
Message-ID: <20250415153246.81688-1-roger.pau@citrix.com>
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Hello,

Following series include some bugfixes and improvements to the handling
of subpage r/o MMIO accesses.

Patch 1 introduces a helper to reduce code duplication when performing
MMIO accesses.

Patch 2 is a bugfix for using subpage in HVM guest, and patch 3 is an
optimization to only register the HVM subpage handler when needed.

Finally patch 4 moves some PV only code to a PV specific file.

Thanks, Roger.

Roger Pau Monne (4):
  xen/io: provide helpers for multi size MMIO accesses
  x86/hvm: fix handling of accesses to partial r/o MMIO pages
  x86/hvm: only register the r/o subpage ops when needed
  x86/mm: move mmio_ro_emulated_write() to PV only file

 xen/arch/x86/hvm/Makefile              |   1 +
 xen/arch/x86/hvm/emulate.c             |  51 ++----------
 xen/arch/x86/hvm/hvm.c                 |  18 ++---
 xen/arch/x86/hvm/mmio.c                | 100 ++++++++++++++++++++++++
 xen/arch/x86/hvm/vmsi.c                |  47 +----------
 xen/arch/x86/include/asm/hvm/emulate.h |   1 -
 xen/arch/x86/include/asm/hvm/io.h      |   3 +
 xen/arch/x86/include/asm/mm.h          |  21 ++---
 xen/arch/x86/mm.c                      | 103 ++++++-------------------
 xen/arch/x86/pv/ro-page-fault.c        |  34 ++++++++
 xen/drivers/vpci/msix.c                |  47 +----------
 xen/include/xen/io.h                   |  68 ++++++++++++++++
 12 files changed, 259 insertions(+), 235 deletions(-)
 create mode 100644 xen/arch/x86/hvm/mmio.c
 create mode 100644 xen/include/xen/io.h

-- 
2.48.1



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper 
Subject: [PATCH v2 2/4] x86/hvm: fix handling of accesses to partial r/o MMIO pages
Date: Tue, 15 Apr 2025 17:32:44 +0200
Message-ID: <20250415153246.81688-3-roger.pau@citrix.com>
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The current logic to handle accesses to MMIO pages partially read-only is
based on the (now removed) logic used to handle accesses to the r/o MMCFG
region(s) for PVH v1 dom0.  However that has issues when running on AMD
hardware, as in that case the guest linear address that triggered the fault
is not provided as part of the VM exit.  This caused
mmio_ro_emulated_write() to always fail before calling
subpage_mmio_write_emulate() when running on AMD and called from an HVM
context.

Take a different approach and convert the handling of partial read-only
MMIO page accesses into an HVM MMIO ops handler, as that's the more natural
way to handle this kind of emulation for HVM domains.

This allows getting rid of hvm_emulate_one_mmio() and it's single call site
in hvm_hap_nested_page_fault().  As part of the fix r/o MMIO accesses are
now handled by handle_mmio_with_translation(), re-using the same logic that
was used for other read-only types part of p2m_is_discard_write().  The
usage of emulation for faulting p2m_mmio_direct types is limited to
addresses in the r/o MMIO range. The page present check is dropped as type
p2m_mmio_direct must have the present bit set in the PTE.

Note a small adjustment is needed to the `pf-fixup` dom0 PVH logic: avoid
attempting to fixup faults resulting from accesses to read-only MMIO
regions, as handling of those accesses is now done by handle_mmio().

Fixes: 33c19df9a5a0 ('x86/PCI: intercept accesses to RO MMIO from dom0s in HVM containers')
Signed-off-by: Roger Pau Monné 
---
Changes since v1:
 - Introduce hvm/mmio.c to place the r/o MMIO handlers.
 - Add comment about pf-fixup and r/o MMIO range checking.
 - Expand commit message about dropping the PTE present check and usage of
   the emulator.
 - Return X86EMUL_OKAY in the read handler if the MMIO region is not found.
 - Check the faulting address is in the mmio_ro_ranges before sending for
   emulation.
---
 xen/arch/x86/hvm/Makefile              |   1 +
 xen/arch/x86/hvm/emulate.c             |  51 ++-----------
 xen/arch/x86/hvm/hvm.c                 |  17 ++---
 xen/arch/x86/hvm/mmio.c                | 100 +++++++++++++++++++++++++
 xen/arch/x86/include/asm/hvm/emulate.h |   1 -
 xen/arch/x86/include/asm/hvm/io.h      |   3 +
 xen/arch/x86/include/asm/mm.h          |  12 +++
 xen/arch/x86/mm.c                      |  37 +--------
 8 files changed, 132 insertions(+), 90 deletions(-)
 create mode 100644 xen/arch/x86/hvm/mmio.c

diff --git a/xen/arch/x86/hvm/Makefile b/xen/arch/x86/hvm/Makefile
index 4c1fa5c6c2bf..6ec2c8f2db56 100644
--- a/xen/arch/x86/hvm/Makefile
+++ b/xen/arch/x86/hvm/Makefile
@@ -15,6 +15,7 @@ obj-y += intercept.o
 obj-y += io.o
 obj-y += ioreq.o
 obj-y += irq.o
+obj-y += mmio.o
 obj-y += monitor.o
 obj-y += mtrr.o
 obj-y += nestedhvm.o
diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c
index 9fff1b82f7c6..fbe8dd6ccb0b 100644
--- a/xen/arch/x86/hvm/emulate.c
+++ b/xen/arch/x86/hvm/emulate.c
@@ -370,7 +370,12 @@ static int hvmemul_do_io(
         /* If there is no suitable backing DM, just ignore accesses */
         if ( !s )
         {
-            if ( is_mmio && is_hardware_domain(currd) )
+            if ( is_mmio && is_hardware_domain(currd) &&
+                 /*
+                  * Do not attempt to fixup accesses to r/o MMIO regions, they
+                  * are expected to be terminated by the null handler below.
+                  */
+                 !rangeset_contains_singleton(mmio_ro_ranges, PFN_DOWN(addr)) )
             {
                 /*
                  * PVH dom0 is likely missing MMIO mappings on the p2m, due to
@@ -2856,50 +2861,6 @@ int hvm_emulate_one(
     return _hvm_emulate_one(hvmemul_ctxt, &hvm_emulate_ops, completion);
 }
 
-int hvm_emulate_one_mmio(unsigned long mfn, unsigned long gla)
-{
-    static const struct x86_emulate_ops hvm_ro_emulate_ops_mmio = {
-        .read       = x86emul_unhandleable_rw,
-        .insn_fetch = hvmemul_insn_fetch,
-        .write      = mmio_ro_emulated_write,
-        .validate   = hvmemul_validate,
-    };
-    struct mmio_ro_emulate_ctxt mmio_ro_ctxt = { .cr2 = gla, .mfn = _mfn(mfn) };
-    struct hvm_emulate_ctxt ctxt;
-    unsigned int seg, bdf;
-    int rc;
-
-    if ( pci_ro_mmcfg_decode(mfn, &seg, &bdf) )
-    {
-        /* Should be always handled by vPCI for PVH dom0. */
-        gdprintk(XENLOG_ERR, "unhandled MMCFG access for %pp\n",
-                 &PCI_SBDF(seg, bdf));
-        ASSERT_UNREACHABLE();
-        return X86EMUL_UNHANDLEABLE;
-    }
-
-    hvm_emulate_init_once(&ctxt, x86_insn_is_mem_write,
-                          guest_cpu_user_regs());
-    ctxt.ctxt.data = &mmio_ro_ctxt;
-
-    switch ( rc = _hvm_emulate_one(&ctxt, &hvm_ro_emulate_ops_mmio,
-                                   VIO_no_completion) )
-    {
-    case X86EMUL_UNHANDLEABLE:
-    case X86EMUL_UNIMPLEMENTED:
-        hvm_dump_emulation_state(XENLOG_G_WARNING, "r/o MMIO", &ctxt, rc);
-        break;
-    case X86EMUL_EXCEPTION:
-        hvm_inject_event(&ctxt.ctxt.event);
-        /* fallthrough */
-    default:
-        hvm_emulate_writeback(&ctxt);
-        break;
-    }
-
-    return rc;
-}
-
 void hvm_emulate_one_vm_event(enum emul_kind kind, unsigned int trapnr,
     unsigned int errcode)
 {
diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index 6f1174c5127e..6b998387e3d8 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -8,6 +8,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -35,7 +36,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -692,6 +692,8 @@ int hvm_domain_initialise(struct domain *d,
 
     register_portio_handler(d, XEN_HVM_DEBUGCONS_IOPORT, 1, hvm_print_line);
 
+    register_subpage_ro_handler(d);
+
     if ( hvm_tsc_scaling_supported )
         d->arch.hvm.tsc_scaling_ratio = hvm_default_tsc_scaling_ratio;
 
@@ -1981,7 +1983,10 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned long gla,
      */
     if ( (p2mt == p2m_mmio_dm) ||
          (npfec.write_access &&
-          (p2m_is_discard_write(p2mt) || (p2mt == p2m_ioreq_server))) )
+          (p2m_is_discard_write(p2mt) || (p2mt == p2m_ioreq_server) ||
+           /* MMIO entries can be r/o if the target mfn is in mmio_ro_ranges. */
+           (p2mt == p2m_mmio_direct &&
+            rangeset_contains_singleton(mmio_ro_ranges, mfn_x(mfn))))) )
     {
         if ( !handle_mmio_with_translation(gla, gfn, npfec) )
             hvm_inject_hw_exception(X86_EXC_GP, 0);
@@ -2033,14 +2038,6 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned long gla,
         goto out_put_gfn;
     }
 
-    if ( (p2mt == p2m_mmio_direct) && npfec.write_access && npfec.present &&
-         (is_hardware_domain(currd) || subpage_mmio_write_accept(mfn, gla)) &&
-         (hvm_emulate_one_mmio(mfn_x(mfn), gla) == X86EMUL_OKAY) )
-    {
-        rc = 1;
-        goto out_put_gfn;
-    }
-
     /* If we fell through, the vcpu will retry now that access restrictions have
      * been removed. It may fault again if the p2m entry type still requires so.
      * Otherwise, this is an error condition. */
diff --git a/xen/arch/x86/hvm/mmio.c b/xen/arch/x86/hvm/mmio.c
new file mode 100644
index 000000000000..ee29d9e5039e
--- /dev/null
+++ b/xen/arch/x86/hvm/mmio.c
@@ -0,0 +1,100 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * MMIO related routines.
+ *
+ * Copyright (c) 2025 Cloud Software Group
+ */
+
+#include 
+#include 
+
+#include 
+
+static int cf_check subpage_mmio_accept(struct vcpu *v, unsigned long addr)
+{
+    p2m_type_t t;
+    mfn_t mfn = get_gfn_query_unlocked(v->domain, addr, &t);
+
+    return !mfn_eq(mfn, INVALID_MFN) && t == p2m_mmio_direct &&
+           subpage_mmio_find_page(mfn);
+}
+
+static int cf_check subpage_mmio_read(
+    struct vcpu *v, unsigned long addr, unsigned int len, unsigned long *data)
+{
+    struct domain *d = v->domain;
+    p2m_type_t t;
+    mfn_t mfn = get_gfn_query(d, addr, &t);
+    struct subpage_ro_range *entry;
+    volatile void __iomem *mem;
+
+    *data = ~0UL;
+
+    if ( mfn_eq(mfn, INVALID_MFN) || t != p2m_mmio_direct )
+    {
+        put_gfn(d, addr);
+        return X86EMUL_RETRY;
+    }
+
+    entry = subpage_mmio_find_page(mfn);
+    if ( !entry )
+    {
+        put_gfn(d, addr);
+        return X86EMUL_OKAY;
+    }
+
+    mem = subpage_mmio_map_page(entry);
+    if ( !mem )
+    {
+        put_gfn(d, addr);
+        gprintk(XENLOG_ERR,
+                "Failed to map page for MMIO read at %#lx -> %#lx\n",
+                addr, mfn_to_maddr(mfn) + PAGE_OFFSET(addr));
+        return X86EMUL_OKAY;
+    }
+
+    *data = read_mmio(mem + PAGE_OFFSET(addr), len);
+
+    put_gfn(d, addr);
+    return X86EMUL_OKAY;
+}
+
+static int cf_check subpage_mmio_write(
+    struct vcpu *v, unsigned long addr, unsigned int len, unsigned long data)
+{
+    struct domain *d = v->domain;
+    p2m_type_t t;
+    mfn_t mfn = get_gfn_query(d, addr, &t);
+
+    if ( mfn_eq(mfn, INVALID_MFN) || t != p2m_mmio_direct )
+    {
+        put_gfn(d, addr);
+        return X86EMUL_RETRY;
+    }
+
+    subpage_mmio_write_emulate(mfn, PAGE_OFFSET(addr), data, len);
+
+    put_gfn(d, addr);
+    return X86EMUL_OKAY;
+}
+
+void register_subpage_ro_handler(struct domain *d)
+{
+    static const struct hvm_mmio_ops subpage_mmio_ops = {
+        .check = subpage_mmio_accept,
+        .read = subpage_mmio_read,
+        .write = subpage_mmio_write,
+    };
+
+    register_mmio_handler(d, &subpage_mmio_ops);
+}
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * tab-width: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/arch/x86/include/asm/hvm/emulate.h b/xen/arch/x86/include/asm/hvm/emulate.h
index c7a2d2a5be4e..178ac32e151f 100644
--- a/xen/arch/x86/include/asm/hvm/emulate.h
+++ b/xen/arch/x86/include/asm/hvm/emulate.h
@@ -86,7 +86,6 @@ void hvmemul_cancel(struct vcpu *v);
 struct segment_register *hvmemul_get_seg_reg(
     enum x86_segment seg,
     struct hvm_emulate_ctxt *hvmemul_ctxt);
-int hvm_emulate_one_mmio(unsigned long mfn, unsigned long gla);
 
 static inline bool handle_mmio(void)
 {
diff --git a/xen/arch/x86/include/asm/hvm/io.h b/xen/arch/x86/include/asm/hvm/io.h
index 565bad300d20..c12f099a037c 100644
--- a/xen/arch/x86/include/asm/hvm/io.h
+++ b/xen/arch/x86/include/asm/hvm/io.h
@@ -135,6 +135,9 @@ void destroy_vpci_mmcfg(struct domain *d);
 /* Remove MMCFG regions from a domain ->iomem_caps. */
 int vpci_mmcfg_deny_access(struct domain *d);
 
+/* r/o MMIO subpage access handler. */
+void register_subpage_ro_handler(struct domain *d);
+
 #endif /* __ASM_X86_HVM_IO_H__ */
 
 
diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h
index a1bc8cc27451..c2e9ef6e5023 100644
--- a/xen/arch/x86/include/asm/mm.h
+++ b/xen/arch/x86/include/asm/mm.h
@@ -554,6 +554,18 @@ int cf_check mmio_ro_emulated_write(
     enum x86_segment seg, unsigned long offset, void *p_data,
     unsigned int bytes, struct x86_emulate_ctxt *ctxt);
 
+/* r/o MMIO subpage access handlers. */
+struct subpage_ro_range {
+    struct list_head list;
+    mfn_t mfn;
+    void __iomem *mapped;
+    DECLARE_BITMAP(ro_elems, PAGE_SIZE / MMIO_RO_SUBPAGE_GRAN);
+};
+struct subpage_ro_range *subpage_mmio_find_page(mfn_t mfn);
+void __iomem *subpage_mmio_map_page(struct subpage_ro_range *entry);
+void subpage_mmio_write_emulate(
+    mfn_t mfn, unsigned int offset, unsigned long data, unsigned int len);
+
 int audit_adjust_pgtables(struct domain *d, int dir, int noisy);
 
 extern int pagefault_by_memadd(unsigned long addr, struct cpu_user_regs *regs);
diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 989e62e7ce6f..f59c7816fba5 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -157,13 +157,6 @@ struct rangeset *__read_mostly mmio_ro_ranges;
 static uint32_t __ro_after_init base_disallow_mask;
 
 /* Handling sub-page read-only MMIO regions */
-struct subpage_ro_range {
-    struct list_head list;
-    mfn_t mfn;
-    void __iomem *mapped;
-    DECLARE_BITMAP(ro_elems, PAGE_SIZE / MMIO_RO_SUBPAGE_GRAN);
-};
-
 static LIST_HEAD_RO_AFTER_INIT(subpage_ro_ranges);
 static DEFINE_SPINLOCK(subpage_ro_lock);
 
@@ -4929,7 +4922,7 @@ long arch_memory_op(unsigned long cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
     return rc;
 }
 
-static struct subpage_ro_range *subpage_mmio_find_page(mfn_t mfn)
+struct subpage_ro_range *subpage_mmio_find_page(mfn_t mfn)
 {
     struct subpage_ro_range *entry;
 
@@ -5074,7 +5067,7 @@ int __init subpage_mmio_ro_add(
     return rc;
 }
 
-static void __iomem *subpage_mmio_map_page(
+void __iomem *subpage_mmio_map_page(
     struct subpage_ro_range *entry)
 {
     void __iomem *mapped_page;
@@ -5099,7 +5092,7 @@ static void __iomem *subpage_mmio_map_page(
     return entry->mapped;
 }
 
-static void subpage_mmio_write_emulate(
+void subpage_mmio_write_emulate(
     mfn_t mfn,
     unsigned int offset,
     unsigned long data,
@@ -5133,30 +5126,6 @@ static void subpage_mmio_write_emulate(
     write_mmio(addr + offset, data, len);
 }
 
-#ifdef CONFIG_HVM
-bool subpage_mmio_write_accept(mfn_t mfn, unsigned long gla)
-{
-    unsigned int offset = PAGE_OFFSET(gla);
-    const struct subpage_ro_range *entry;
-
-    entry = subpage_mmio_find_page(mfn);
-    if ( !entry )
-        return false;
-
-    if ( !test_bit(offset / MMIO_RO_SUBPAGE_GRAN, entry->ro_elems) )
-    {
-        /*
-         * We don't know the write size at this point yet, so it could be
-         * an unaligned write, but accept it here anyway and deal with it
-         * later.
-         */
-        return true;
-    }
-
-    return false;
-}
-#endif
-
 int cf_check mmio_ro_emulated_write(
     enum x86_segment seg,
     unsigned long offset,
-- 
2.48.1



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper 
Subject: [PATCH v2 3/4] x86/hvm: only register the r/o subpage ops when needed
Date: Tue, 15 Apr 2025 17:32:45 +0200
Message-ID: <20250415153246.81688-4-roger.pau@citrix.com>
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MMIO operation handlers can be expensive to process, hence attempt to
register only those that will be needed by the domain.

Subpage r/o MMIO regions are added exclusively at boot, further limit their
addition to strictly before the initial domain gets created, so by the time
initial domain creation happens Xen knows whether subpage is required or
not.  This allows only registering the MMIO handler when there are
subpage regions to handle.

Signed-off-by: Roger Pau Monné 
Reviewed-by: Jan Beulich 
---
Could possibly be part of the previous patch, but strictly speaking is an
improvement, as even before the previous patch subpage r/o was always
called even when no subpage regions are registered.
---
 xen/arch/x86/hvm/hvm.c        |  3 ++-
 xen/arch/x86/include/asm/mm.h |  1 +
 xen/arch/x86/mm.c             | 16 ++++++++++++++++
 3 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index 6b998387e3d8..4cb2e13046d1 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -692,7 +692,8 @@ int hvm_domain_initialise(struct domain *d,
 
     register_portio_handler(d, XEN_HVM_DEBUGCONS_IOPORT, 1, hvm_print_line);
 
-    register_subpage_ro_handler(d);
+    if ( subpage_ro_active() )
+        register_subpage_ro_handler(d);
 
     if ( hvm_tsc_scaling_supported )
         d->arch.hvm.tsc_scaling_ratio = hvm_default_tsc_scaling_ratio;
diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h
index c2e9ef6e5023..aeb8ebcf2d56 100644
--- a/xen/arch/x86/include/asm/mm.h
+++ b/xen/arch/x86/include/asm/mm.h
@@ -561,6 +561,7 @@ struct subpage_ro_range {
     void __iomem *mapped;
     DECLARE_BITMAP(ro_elems, PAGE_SIZE / MMIO_RO_SUBPAGE_GRAN);
 };
+bool subpage_ro_active(void);
 struct subpage_ro_range *subpage_mmio_find_page(mfn_t mfn);
 void __iomem *subpage_mmio_map_page(struct subpage_ro_range *entry);
 void subpage_mmio_write_emulate(
diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index f59c7816fba5..3bc6304d831c 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -4922,6 +4922,11 @@ long arch_memory_op(unsigned long cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
     return rc;
 }
 
+bool subpage_ro_active(void)
+{
+    return !list_empty(&subpage_ro_ranges);
+}
+
 struct subpage_ro_range *subpage_mmio_find_page(mfn_t mfn)
 {
     struct subpage_ro_range *entry;
@@ -5011,6 +5016,17 @@ int __init subpage_mmio_ro_add(
          !IS_ALIGNED(size, MMIO_RO_SUBPAGE_GRAN) )
         return -EINVAL;
 
+    /*
+     * Force all r/o subregions to be registered before initial domain
+     * creation, so that the emulation handlers can be added only when there
+     * are pages registered.
+     */
+    if ( system_state >= SYS_STATE_smp_boot )
+    {
+        ASSERT_UNREACHABLE();
+        return -EILSEQ;
+    }
+
     if ( !size )
         return 0;
 
-- 
2.48.1



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        Tue, 15 Apr 2025 08:34:31 -0700 (PDT)
From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper 
Subject: [PATCH v2 4/4] x86/mm: move mmio_ro_emulated_write() to PV only file
Date: Tue, 15 Apr 2025 17:32:46 +0200
Message-ID: <20250415153246.81688-5-roger.pau@citrix.com>
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mmio_ro_emulated_write() is only used in pv/ro-page-fault.c, move the
function to that file and make it static.

No functional change intended.

Signed-off-by: Roger Pau Monné 
Reviewed-by: Jan Beulich 
---
 xen/arch/x86/include/asm/mm.h   | 12 ------------
 xen/arch/x86/mm.c               | 26 -------------------------
 xen/arch/x86/pv/ro-page-fault.c | 34 +++++++++++++++++++++++++++++++++
 3 files changed, 34 insertions(+), 38 deletions(-)

diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h
index aeb8ebcf2d56..2665daa6f74f 100644
--- a/xen/arch/x86/include/asm/mm.h
+++ b/xen/arch/x86/include/asm/mm.h
@@ -542,18 +542,6 @@ void memguard_unguard_stack(void *p);
 int subpage_mmio_ro_add(paddr_t start, size_t size);
 bool subpage_mmio_write_accept(mfn_t mfn, unsigned long gla);
 
-struct mmio_ro_emulate_ctxt {
-        unsigned long cr2;
-        /* Used only for mmcfg case */
-        unsigned int seg, bdf;
-        /* Used only for non-mmcfg case */
-        mfn_t mfn;
-};
-
-int cf_check mmio_ro_emulated_write(
-    enum x86_segment seg, unsigned long offset, void *p_data,
-    unsigned int bytes, struct x86_emulate_ctxt *ctxt);
-
 /* r/o MMIO subpage access handlers. */
 struct subpage_ro_range {
     struct list_head list;
diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 3bc6304d831c..7c6a5fde5ebd 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -5142,32 +5142,6 @@ void subpage_mmio_write_emulate(
     write_mmio(addr + offset, data, len);
 }
 
-int cf_check mmio_ro_emulated_write(
-    enum x86_segment seg,
-    unsigned long offset,
-    void *p_data,
-    unsigned int bytes,
-    struct x86_emulate_ctxt *ctxt)
-{
-    struct mmio_ro_emulate_ctxt *mmio_ro_ctxt = ctxt->data;
-    unsigned long data = 0;
-
-    /* Only allow naturally-aligned stores at the original %cr2 address. */
-    if ( ((bytes | offset) & (bytes - 1)) || !bytes ||
-         offset != mmio_ro_ctxt->cr2 || bytes > sizeof(data) )
-    {
-        gdprintk(XENLOG_WARNING, "bad access (cr2=%lx, addr=%lx, bytes=%u)\n",
-                mmio_ro_ctxt->cr2, offset, bytes);
-        return X86EMUL_UNHANDLEABLE;
-    }
-
-    memcpy(&data, p_data, bytes);
-    subpage_mmio_write_emulate(mmio_ro_ctxt->mfn, PAGE_OFFSET(offset),
-                               data, bytes);
-
-    return X86EMUL_OKAY;
-}
-
 /*
  * For these PTE APIs, the caller must follow the alloc-map-unmap-free
  * lifecycle, which means explicitly mapping the PTE pages before accessing
diff --git a/xen/arch/x86/pv/ro-page-fault.c b/xen/arch/x86/pv/ro-page-fault.c
index 11b01c479e43..3dd795288379 100644
--- a/xen/arch/x86/pv/ro-page-fault.c
+++ b/xen/arch/x86/pv/ro-page-fault.c
@@ -298,6 +298,14 @@ static int ptwr_do_page_fault(struct x86_emulate_ctxt *ctxt,
  * fault handling for read-only MMIO pages
  */
 
+struct mmio_ro_emulate_ctxt {
+    unsigned long cr2;
+    /* Used only for mmcfg case */
+    unsigned int seg, bdf;
+    /* Used only for non-mmcfg case */
+    mfn_t mfn;
+};
+
 static int cf_check mmcfg_intercept_write(
     enum x86_segment seg,
     unsigned long offset,
@@ -329,6 +337,32 @@ static int cf_check mmcfg_intercept_write(
     return X86EMUL_OKAY;
 }
 
+static int cf_check mmio_ro_emulated_write(
+    enum x86_segment seg,
+    unsigned long offset,
+    void *p_data,
+    unsigned int bytes,
+    struct x86_emulate_ctxt *ctxt)
+{
+    struct mmio_ro_emulate_ctxt *mmio_ro_ctxt = ctxt->data;
+    unsigned long data = 0;
+
+    /* Only allow naturally-aligned stores at the original %cr2 address. */
+    if ( ((bytes | offset) & (bytes - 1)) || !bytes ||
+         offset != mmio_ro_ctxt->cr2 || bytes > sizeof(data) )
+    {
+        gdprintk(XENLOG_WARNING, "bad access (cr2=%lx, addr=%lx, bytes=%u)\n",
+                mmio_ro_ctxt->cr2, offset, bytes);
+        return X86EMUL_UNHANDLEABLE;
+    }
+
+    memcpy(&data, p_data, bytes);
+    subpage_mmio_write_emulate(mmio_ro_ctxt->mfn, PAGE_OFFSET(offset),
+                               data, bytes);
+
+    return X86EMUL_OKAY;
+}
+
 static const struct x86_emulate_ops mmio_ro_emulate_ops = {
     .read       = x86emul_unhandleable_rw,
     .insn_fetch = ptwr_emulated_insn_fetch,
-- 
2.48.1



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Date: Tue, 15 Apr 2025 17:40:34 +0200
From: Anthony PERARD 
To: Andrew Cooper 
Cc: Xen-devel ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	Marek =?iso-8859-1?Q?Marczykowski-G=F3recki?= 
Subject: Re: [PATCH] CI: Build with --prefix=/usr rather than setting
 LD_LIBRARY_PATH
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On Tue, Apr 15, 2025 at 02:54:26PM +0100, Andrew Cooper wrote:
> This also moves executables too.  I'm not sure why xilinx-smoke-dom0-x86_64.sh
> was overriding PATH too, as /usr/local is clearly in PATH for all other tests,
> but drop that too.
> 
> No practical change.
> 
> Signed-off-by: Andrew Cooper 

Reviewed-by: Anthony PERARD 

Thanks,

-- 
Anthony PERARD


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Date: Tue, 15 Apr 2025 17:55:16 +0200
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Subject: Re: [PATCH v1 12/14] xen/riscv: implement setup_irq()
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Romain Caritey , xen-devel@lists.xenproject.org
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In-Reply-To: <2bc37c3996978129a5b2c888917307ea32448651.1744126720.git.oleksii.kurochko@gmail.com>
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On 08.04.2025 17:57, Oleksii Kurochko wrote:
> --- a/xen/arch/riscv/include/asm/irq.h
> +++ b/xen/arch/riscv/include/asm/irq.h
> @@ -26,6 +26,8 @@
>  #define IRQ_TYPE_SENSE_MASK     DT_IRQ_TYPE_SENSE_MASK
>  #define IRQ_TYPE_INVALID        DT_IRQ_TYPE_INVALID
>  
> +#define IRQ_NO_PRIORITY 0
> +
>  /* TODO */
>  #define nr_static_irqs 0
>  #define arch_hwdom_irqs(domid) 0U
> @@ -54,6 +56,10 @@ void init_IRQ(void);
>  struct cpu_user_regs;

Seeing this and ...

>  void do_IRQ(struct cpu_user_regs *regs, unsigned int irq);
>  
> +struct irq_desc;
> +struct cpumask_t;

... now these - all of such forward decls may want to collectively live in a
central place higher up in the file.

> @@ -57,6 +59,99 @@ int platform_get_irq(const struct dt_device_node *device, int index)
>      return dt_irq.irq;
>  }
>  
> +static int __setup_irq(struct irq_desc *desc, unsigned int irqflags,
> +                       struct irqaction *new)

Irrespective of you possibly having found it like this elsewhere, may I
suggest that in new code we avoid leading double underscores? A single one
will do here.

> +{
> +    bool shared = irqflags & IRQF_SHARED;
> +
> +    ASSERT(new != NULL);
> +
> +    /* Sanity checks:

Nit: Comment style (and there are many more issues below).

> +     *  - if the IRQ is marked as shared
> +     *  - dev_id is not NULL when IRQF_SHARED is set
> +     */
> +    if ( desc->action != NULL && (!test_bit(_IRQF_SHARED, &desc->status)
> +         || !shared) )

Nit: Operator placement and indentation.

You're probably better off this way anyway:

    if ( desc->action != NULL &&
         (!test_bit(_IRQF_SHARED, &desc->status) || !shared) )

> +        return -EINVAL;
> +    if ( shared && new->dev_id == NULL )
> +        return -EINVAL;
> +
> +    if ( shared )
> +        set_bit(_IRQF_SHARED, &desc->status);

See comments on earlier patches.

> +#ifdef CONFIG_IRQ_HAS_MULTIPLE_ACTION
> +    new->next = desc->action;
> +    smp_mb();
> +#endif
> +
> +    desc->action = new;
> +    smp_mb();

Aren't smp_wmb() sufficient on both places? If not, I think comments
want adding.

> +    return 0;
> +}
> +
> +void irq_set_affinity(struct irq_desc *desc, const cpumask_t *cpu_mask)
> +{
> +    if ( desc != NULL )

Can desc really be NULL here? Isn't desc->lock required to be held?

> +        desc->handler->set_affinity(desc, cpu_mask);
> +}
> +
> +int setup_irq(unsigned int irq, unsigned int irqflags, struct irqaction *new)
> +{
> +    int rc;
> +    unsigned long flags;
> +    struct irq_desc *desc;
> +    bool disabled;
> +
> +    desc = irq_to_desc(irq);

Make this the variable's initializer?

> +    spin_lock_irqsave(&desc->lock, flags);
> +
> +    disabled = (desc->action == NULL);
> +
> +    if ( test_bit(_IRQ_GUEST, &desc->status) )
> +    {
> +        spin_unlock_irqrestore(&desc->lock, flags);
> +        /*
> +         * TODO: would be nice to have functionality to print which domain owns
> +         *       an IRQ.
> +         */
> +        printk(XENLOG_ERR "ERROR: IRQ %u is already in use by a domain\n", irq);
> +        return -EBUSY;
> +    }
> +
> +    rc = __setup_irq(desc, irqflags, new);
> +    if ( rc )
> +        goto err;
> +
> +    /* First time the IRQ is setup */
> +    if ( disabled )
> +    {
> +        /* disable irq by default */
> +        set_bit(_IRQ_DISABLED, &desc->status);

Shouldn't this be set when we make it here?

> +        /* route interrupt to xen */
> +        intc_route_irq_to_xen(desc, IRQ_NO_PRIORITY);
> +
> +        /*
> +         * we don't care for now which CPU will receive the
> +         * interrupt
> +         *
> +         * TODO: Handle case where IRQ is setup on different CPU than
> +         * the targeted CPU and the priority.
> +         */
> +        irq_set_affinity(desc, cpumask_of(smp_processor_id()));
> +        desc->handler->startup(desc);
> +        /* enable irq */
> +        clear_bit(_IRQ_DISABLED, &desc->status);

Now it turns out this is really done twice: Once in aplic_irq_enable(),
and once here.

> +    }
> +
> +err:

Nit (yet once again).

Jan


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Date: Tue, 15 Apr 2025 17:59:06 +0200
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Subject: Re: [PATCH v1 13/14] xen/riscv: initialize interrupt controller
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
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On 08.04.2025 17:57, Oleksii Kurochko wrote:
> Call intc_init() to do basic initialization steps for APLIC and IMISC.
> 
> Signed-off-by: Oleksii Kurochko 

Acked-by: Jan Beulich 
yet ...

> --- a/xen/arch/riscv/setup.c
> +++ b/xen/arch/riscv/setup.c
> @@ -136,6 +136,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id,
>  
>      intc_preinit();
>  
> +    intc_init();
> +
>      printk("All set up\n");
>  
>      machine_halt();

... this being everything here I wonder if this can't be folded with the
patch where the function is introduced.

Jan


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Subject: Re: [PATCH v1 14/14] xen/riscv: add basic UART support
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: 
 <3e96851da8751ac17cbf0cb5a649c0d86259460a.1744126720.git.oleksii.kurochko@gmail.com>
Content-Language: en-US
From: Jan Beulich 
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In-Reply-To: <3e96851da8751ac17cbf0cb5a649c0d86259460a.1744126720.git.oleksii.kurochko@gmail.com>
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Content-Transfer-Encoding: 7bit

On 08.04.2025 17:57, Oleksii Kurochko wrote:
> --- a/xen/arch/riscv/setup.c
> +++ b/xen/arch/riscv/setup.c
> @@ -4,11 +4,16 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> +#include 

Why's this one needed?

>  #include 
> +#include 
> +#include 
>  #include 
> +#include 
>  #include 
>  #include 
>  
> @@ -73,6 +78,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id,
>  
>      remove_identity_mapping();
>  
> +    percpu_init_areas();

I'll trust you that it's needed now, but the addition looks unrelated here,
and also isn't mentioned as intentional in the description.

> --- a/xen/drivers/char/Kconfig
> +++ b/xen/drivers/char/Kconfig
> @@ -3,7 +3,6 @@ config GENERIC_UART_INIT
>  
>  config HAS_NS16550
>  	bool "NS16550 UART driver" if ARM
> -	default n if RISCV
>  	default y

Just to double-check: Unlike Arm you don't want this to be user-(un)selectable
on RISC-V?

Jan


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From: Stewart Hildebrand 
To: 
CC: Stewart Hildebrand , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" , Jan Beulich ,
	"Andrew Cooper" ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, "Jiqian Chen" , Mykyta
 Poturai 
Subject: [PATCH v19 0/3] PCI devices passthrough on Arm, part 3
Date: Tue, 15 Apr 2025 12:53:59 -0400
Message-ID: <20250415165404.435506-1-stewart.hildebrand@amd.com>
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This is next version of vPCI rework. Aim of this series is to prepare
ground for introducing PCI support on ARM platform.

in v19:
 - ("xen/arm: check read handler behavior") is ready to be committed
 - add ("vpci: acquire d->pci_lock in I/O handlers")

in v18:
 - address warning in vpci test suite

in v17:
 - add ("xen/arm: check read handler behavior")
 - drop ("xen/arm: account IO handlers for emulated PCI MSI-X") as it
   should wait for future work
 - drop committed patches

in v16:
 - minor updates - see individual patches

in v15:
 - reorder so ("arm/vpci: honor access size when returning an error")
   comes first

in v14:
 - drop first 9 patches as they were committed
 - updated ("vpci/header: emulate PCI_COMMAND register for guests")

in v13:
 - drop ("xen/arm: vpci: permit access to guest vpci space") as it was
   unnecessary

in v12:
 - I (Stewart) coordinated with Volodomyr to send this whole series. So,
   add my (Stewart) Signed-off-by to all patches.
 - The biggest change is to re-work the PCI_COMMAND register patch.
   Additional feedback has also been addressed - see individual patches.
 - Drop ("pci: msi: pass pdev to pci_enable_msi() function") and
   ("pci: introduce per-domain PCI rwlock") as they were committed
 - Rename ("rangeset: add rangeset_empty() function")
       to ("rangeset: add rangeset_purge() function")
 - Rename ("vpci/header: rework exit path in init_bars")
       to ("vpci/header: rework exit path in init_header()")

in v11:
 - Added my (Volodymyr) Signed-off-by tag to all patches
 - Patch "vpci/header: emulate PCI_COMMAND register for guests" is in
   intermediate state, because it was agreed to rework it once Stewart's
   series on register handling are in.
 - Addressed comments, please see patch descriptions for details.

in v10:

 - Removed patch ("xen/arm: vpci: check guest range"), proper fix
   for the issue is part of ("vpci/header: emulate PCI_COMMAND
   register for guests")
 - Removed patch ("pci/header: reset the command register when adding
   devices")
 - Added patch ("rangeset: add rangeset_empty() function") because
   this function is needed in ("vpci/header: handle p2m range sets
   per BAR")
 - Added ("vpci/header: handle p2m range sets per BAR") which addressed
   an issue discovered by Andrii Chepurnyi during virtio integration
 - Added ("pci: msi: pass pdev to pci_enable_msi() function"), which is
   prereq for ("pci: introduce per-domain PCI rwlock")
 - Fixed "Since v9/v8/... " comments in changelogs to reduce confusion.
   I left "Since" entries for older versions, because they were added
   by original author of the patches.

in v9:

v9 includes addressed commentes from a previous one. Also it
introduces a couple patches from Stewart. This patches are related to
vPCI use on ARM. Patch "vpci/header: rework exit path in init_bars"
was factored-out from "vpci/header: handle p2m range sets per BAR".

in v8:

The biggest change from previous, mistakenly named, v7 series is how
locking is implemented. Instead of d->vpci_rwlock we introduce
d->pci_lock which has broader scope, as it protects not only domain's
vpci state, but domain's list of PCI devices as well.

As we discussed in IRC with Roger, it is not feasible to rework all
the existing code to use the new lock right away. It was agreed that
any write access to d->pdev_list will be protected by **both**
d->pci_lock in write mode and pcidevs_lock(). Read access on other
hand should be protected by either d->pci_lock in read mode or
pcidevs_lock(). It is expected that existing code will use
pcidevs_lock() and new users will use new rw lock. Of course, this
does not mean that new users shall not use pcidevs_lock() when it is
appropriate.

Changes from previous versions are described in each separate patch.

Oleksandr Andrushchenko (1):
  xen/arm: translate virtual PCI bus topology for guests

Stewart Hildebrand (2):
  xen/arm: check read handler behavior
  vpci: acquire d->pci_lock in I/O handlers

 tools/tests/vpci/emul.h |  7 ++---
 xen/arch/arm/io.c       |  2 ++
 xen/arch/arm/vpci.c     | 59 ++++++++++++++++++++++++++++++++---------
 xen/arch/x86/hvm/io.c   | 10 ++++++-
 xen/drivers/vpci/vpci.c | 45 +++++++++++++++++++++++--------
 xen/include/xen/vpci.h  | 12 +++++++++
 6 files changed, 108 insertions(+), 27 deletions(-)


base-commit: 38d07809794e3c723a4de7e10c25c1f6cb590dc6
-- 
2.49.0



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From: Stewart Hildebrand 
To: 
CC: Stewart Hildebrand , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Julien Grall 
Subject: [PATCH v19 1/3] xen/arm: check read handler behavior
Date: Tue, 15 Apr 2025 12:54:00 -0400
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We expect mmio read handlers to leave the bits above the access size
zeroed. Add an ASSERT to check this aspect of read handler behavior.

Suggested-by: Roger Pau Monné 
Signed-off-by: Stewart Hildebrand 
Acked-by: Julien Grall 
---
There's no need to wait for the rest of the series to commit this patch.

v18->v19:
* add Julien's A-b
* s/GENMASK_ULL/GENMASK/

v17->v18:
* no change

v16->v17:
* new patch

See https://lore.kernel.org/xen-devel/bc6660ef-59f1-4514-9792-067d987e3fbc@xen.org/

Also see 7db7bd0f319f ("arm/vpci: honor access size when returning an error")

Also see xen/arch/arm/ioreq.c:handle_ioserv()
---
 xen/arch/arm/io.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/xen/arch/arm/io.c b/xen/arch/arm/io.c
index 653428e16c1f..5a4b0e8f25c6 100644
--- a/xen/arch/arm/io.c
+++ b/xen/arch/arm/io.c
@@ -37,6 +37,8 @@ static enum io_state handle_read(const struct mmio_handler *handler,
     if ( !handler->ops->read(v, info, &r, handler->priv) )
         return IO_ABORT;
 
+    ASSERT((r & ~GENMASK((1U << info->dabt.size) * 8 - 1, 0)) == 0);
+
     r = sign_extend(dabt, r);
 
     set_user_reg(regs, dabt.reg, r);
-- 
2.49.0



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From: Stewart Hildebrand 
To: 
CC: Stewart Hildebrand , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" , Jan Beulich ,
	"Andrew Cooper" ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v19 2/3] vpci: acquire d->pci_lock in I/O handlers
Date: Tue, 15 Apr 2025 12:54:01 -0400
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In preparation for translating virtual PCI bus topology (where a pdev
lookup will be needed in the vPCI I/O handlers), acquire d->pci_lock in
the vPCI I/O handlers.

While here, adjust indentation in vpci_ecam_{read,write}.

Signed-off-by: Stewart Hildebrand 
---
v18->v19:
* new patch

While the current patch series focus is Arm, this is also prerequisite
for eventually enabling x86 PVH domU passthrough. Similar to Arm, a call
to vpci_translate_virtual_device() would be added in
xen/arch/x86/hvm/io.c:vpci_portio_{read,write} and
vpci_mmcfg_{read,write}.
---
 xen/arch/arm/vpci.c     | 11 +++++++++--
 xen/arch/x86/hvm/io.c   | 10 +++++++++-
 xen/drivers/vpci/vpci.c | 21 ++++++++++-----------
 3 files changed, 28 insertions(+), 14 deletions(-)

diff --git a/xen/arch/arm/vpci.c b/xen/arch/arm/vpci.c
index b63a356bb4a8..828c5c745bd9 100644
--- a/xen/arch/arm/vpci.c
+++ b/xen/arch/arm/vpci.c
@@ -34,15 +34,18 @@ static int vpci_mmio_read(struct vcpu *v, mmio_info_t *info,
     /* data is needed to prevent a pointer cast on 32bit */
     unsigned long data;
 
+    read_lock(&v->domain->pci_lock);
     if ( vpci_ecam_read(sbdf, ECAM_REG_OFFSET(info->gpa),
                         1U << info->dabt.size, &data) )
     {
         *r = data;
+        read_unlock(&v->domain->pci_lock);
         return 1;
     }
 
     *r = invalid;
 
+    read_unlock(&v->domain->pci_lock);
     return 0;
 }
 
@@ -51,9 +54,13 @@ static int vpci_mmio_write(struct vcpu *v, mmio_info_t *info,
 {
     struct pci_host_bridge *bridge = p;
     pci_sbdf_t sbdf = vpci_sbdf_from_gpa(bridge, info->gpa);
+    int ret;
 
-    return vpci_ecam_write(sbdf, ECAM_REG_OFFSET(info->gpa),
-                           1U << info->dabt.size, r);
+    write_lock(&v->domain->pci_lock);
+    ret = vpci_ecam_write(sbdf, ECAM_REG_OFFSET(info->gpa),
+                          1U << info->dabt.size, r);
+    write_unlock(&v->domain->pci_lock);
+    return ret;
 }
 
 static const struct mmio_handler_ops vpci_mmio_handler = {
diff --git a/xen/arch/x86/hvm/io.c b/xen/arch/x86/hvm/io.c
index de6ee6c4dd4d..0b9036528abe 100644
--- a/xen/arch/x86/hvm/io.c
+++ b/xen/arch/x86/hvm/io.c
@@ -261,7 +261,7 @@ static int cf_check vpci_portio_read(
     const struct hvm_io_handler *handler, uint64_t addr, uint32_t size,
     uint64_t *data)
 {
-    const struct domain *d = current->domain;
+    struct domain *d = current->domain;
     unsigned int reg;
     pci_sbdf_t sbdf;
     uint32_t cf8;
@@ -285,7 +285,9 @@ static int cf_check vpci_portio_read(
     if ( !vpci_access_allowed(reg, size) )
         return X86EMUL_OKAY;
 
+    read_lock(&d->pci_lock);
     *data = vpci_read(sbdf, reg, size);
+    read_unlock(&d->pci_lock);
 
     return X86EMUL_OKAY;
 }
@@ -316,7 +318,9 @@ static int cf_check vpci_portio_write(
     if ( !vpci_access_allowed(reg, size) )
         return X86EMUL_OKAY;
 
+    write_lock(&d->pci_lock);
     vpci_write(sbdf, reg, size, data);
+    write_unlock(&d->pci_lock);
 
     return X86EMUL_OKAY;
 }
@@ -424,7 +428,9 @@ static int cf_check vpci_mmcfg_read(
     read_unlock(&d->arch.hvm.mmcfg_lock);
 
     /* Failed reads are not propagated to the caller */
+    read_lock(&d->pci_lock);
     vpci_ecam_read(sbdf, reg, len, data);
+    read_unlock(&d->pci_lock);
 
     return X86EMUL_OKAY;
 }
@@ -449,7 +455,9 @@ static int cf_check vpci_mmcfg_write(
     read_unlock(&d->arch.hvm.mmcfg_lock);
 
     /* Failed writes are not propagated to the caller */
+    write_lock(&d->pci_lock);
     vpci_ecam_write(sbdf, reg, len, data);
+    write_unlock(&d->pci_lock);
 
     return X86EMUL_OKAY;
 }
diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c
index 1e6aa5d799b9..d01fb7be226a 100644
--- a/xen/drivers/vpci/vpci.c
+++ b/xen/drivers/vpci/vpci.c
@@ -440,6 +440,8 @@ uint32_t vpci_read(pci_sbdf_t sbdf, unsigned int reg, unsigned int size)
     unsigned int data_offset = 0;
     uint32_t data = ~(uint32_t)0;
 
+    ASSERT(rw_is_locked(&d->pci_lock));
+
     if ( !size )
     {
         ASSERT_UNREACHABLE();
@@ -452,15 +454,11 @@ uint32_t vpci_read(pci_sbdf_t sbdf, unsigned int reg, unsigned int size)
      * If this is hwdom and the device is assigned to DomXEN, acquiring hwdom's
      * pci_lock is sufficient.
      */
-    read_lock(&d->pci_lock);
     pdev = pci_get_pdev(d, sbdf);
     if ( !pdev && is_hardware_domain(d) )
         pdev = pci_get_pdev(dom_xen, sbdf);
     if ( !pdev || !pdev->vpci )
-    {
-        read_unlock(&d->pci_lock);
         return vpci_read_hw(sbdf, reg, size);
-    }
 
     spin_lock(&pdev->vpci->lock);
 
@@ -507,7 +505,6 @@ uint32_t vpci_read(pci_sbdf_t sbdf, unsigned int reg, unsigned int size)
         ASSERT(data_offset < size);
     }
     spin_unlock(&pdev->vpci->lock);
-    read_unlock(&d->pci_lock);
 
     if ( data_offset < size )
     {
@@ -555,6 +552,8 @@ void vpci_write(pci_sbdf_t sbdf, unsigned int reg, unsigned int size,
     const struct vpci_register *r;
     unsigned int data_offset = 0;
 
+    ASSERT(rw_is_write_locked(&d->pci_lock));
+
     if ( !size )
     {
         ASSERT_UNREACHABLE();
@@ -570,7 +569,6 @@ void vpci_write(pci_sbdf_t sbdf, unsigned int reg, unsigned int size,
      * TODO: We need to take pci_locks in exclusive mode only if we
      * are modifying BARs, so there is a room for improvement.
      */
-    write_lock(&d->pci_lock);
     pdev = pci_get_pdev(d, sbdf);
     if ( !pdev && is_hardware_domain(d) )
         pdev = pci_get_pdev(dom_xen, sbdf);
@@ -579,8 +577,6 @@ void vpci_write(pci_sbdf_t sbdf, unsigned int reg, unsigned int size,
         /* Ignore writes to read-only devices, which have no ->vpci. */
         const unsigned long *ro_map = pci_get_ro_map(sbdf.seg);
 
-        write_unlock(&d->pci_lock);
-
         if ( !ro_map || !test_bit(sbdf.bdf, ro_map) )
             vpci_write_hw(sbdf, reg, size, data);
         return;
@@ -622,7 +618,6 @@ void vpci_write(pci_sbdf_t sbdf, unsigned int reg, unsigned int size,
         ASSERT(data_offset < size);
     }
     spin_unlock(&pdev->vpci->lock);
-    write_unlock(&d->pci_lock);
 
     if ( data_offset < size )
         /* Tailing gap, write the remaining. */
@@ -651,8 +646,10 @@ bool vpci_access_allowed(unsigned int reg, unsigned int len)
 }
 
 bool vpci_ecam_write(pci_sbdf_t sbdf, unsigned int reg, unsigned int len,
-                         unsigned long data)
+                     unsigned long data)
 {
+    ASSERT(rw_is_write_locked(¤t->domain->pci_lock));
+
     if ( !vpci_access_allowed(reg, len) ||
          (reg + len) > PCI_CFG_SPACE_EXP_SIZE )
         return false;
@@ -667,8 +664,10 @@ bool vpci_ecam_write(pci_sbdf_t sbdf, unsigned int reg, unsigned int len,
 }
 
 bool vpci_ecam_read(pci_sbdf_t sbdf, unsigned int reg, unsigned int len,
-                        unsigned long *data)
+                    unsigned long *data)
 {
+    ASSERT(rw_is_locked(¤t->domain->pci_lock));
+
     if ( !vpci_access_allowed(reg, len) ||
          (reg + len) > PCI_CFG_SPACE_EXP_SIZE )
         return false;
-- 
2.49.0



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From: Stewart Hildebrand 
To: 
CC: Oleksandr Andrushchenko ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , "Stewart
 Hildebrand" , Anthony PERARD
	, Stefano Stabellini ,
	Julien Grall , Bertrand Marquis ,
	Michal Orzel , Volodymyr Babchuk
	, Jiqian Chen , "Mykyta
 Poturai" , Volodymyr Babchuk
	
Subject: [PATCH v19 3/3] xen/arm: translate virtual PCI bus topology for guests
Date: Tue, 15 Apr 2025 12:54:02 -0400
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From: Oleksandr Andrushchenko 

There are three originators for the PCI configuration space access:
1. The domain that owns physical host bridge: MMIO handlers are
there so we can update vPCI register handlers with the values
written by the hardware domain, e.g. physical view of the registers
vs guest's view on the configuration space.
2. Guest access to the passed through PCI devices: we need to properly
map virtual bus topology to the physical one, e.g. pass the configuration
space access to the corresponding physical devices.
3. Emulated host PCI bridge access. It doesn't exist in the physical
topology, e.g. it can't be mapped to some physical host bridge.
So, all access to the host bridge itself needs to be trapped and
emulated.

Signed-off-by: Oleksandr Andrushchenko 
Signed-off-by: Volodymyr Babchuk 
Signed-off-by: Stewart Hildebrand 
---
In v19:
* move locking to pre-patch
In v18:
* address warning in vpci test suite
In v17:
* move lock to inside vpci_translate_virtual_device()
* acks were previously given for Arm [0] and vPCI [1], but since it was
  two releases ago and the patch has changed, I didn't pick them up

[0] https://lore.kernel.org/xen-devel/4afe33f2-72e6-4755-98ce-d7f9da374e90@xen.org/
[1] https://lore.kernel.org/xen-devel/Zk70udmiriruMt0r@macbook/

In v15:
- base on top of ("arm/vpci: honor access size when returning an error")
In v11:
- Fixed format issues
- Added ASSERT_UNREACHABLE() to the dummy implementation of
vpci_translate_virtual_device()
- Moved variable in vpci_sbdf_from_gpa(), now it is easier to follow
the logic in the function
Since v9:
- Commend about required lock replaced with ASSERT()
- Style fixes
- call to vpci_translate_virtual_device folded into vpci_sbdf_from_gpa
Since v8:
- locks moved out of vpci_translate_virtual_device()
Since v6:
- add pcidevs locking to vpci_translate_virtual_device
- update wrt to the new locking scheme
Since v5:
- add vpci_translate_virtual_device for #ifndef CONFIG_HAS_VPCI_GUEST_SUPPORT
  case to simplify ifdefery
- add ASSERT(!is_hardware_domain(d)); to vpci_translate_virtual_device
- reset output register on failed virtual SBDF translation
Since v4:
- indentation fixes
- constify struct domain
- updated commit message
- updates to the new locking scheme (pdev->vpci_lock)
Since v3:
- revisit locking
- move code to vpci.c
Since v2:
 - pass struct domain instead of struct vcpu
 - constify arguments where possible
 - gate relevant code with CONFIG_HAS_VPCI_GUEST_SUPPORT
New in v2
---
 tools/tests/vpci/emul.h |  7 +++---
 xen/arch/arm/vpci.c     | 48 ++++++++++++++++++++++++++++++++---------
 xen/drivers/vpci/vpci.c | 24 +++++++++++++++++++++
 xen/include/xen/vpci.h  | 12 +++++++++++
 4 files changed, 78 insertions(+), 13 deletions(-)

diff --git a/tools/tests/vpci/emul.h b/tools/tests/vpci/emul.h
index da446bba86b4..d3b8978f948c 100644
--- a/tools/tests/vpci/emul.h
+++ b/tools/tests/vpci/emul.h
@@ -85,6 +85,10 @@ typedef union {
 } pci_sbdf_t;
 
 #define CONFIG_HAS_VPCI
+
+#define BUG() assert(0)
+#define ASSERT_UNREACHABLE() assert(0)
+
 #include "vpci.h"
 
 #define __hwdom_init
@@ -112,9 +116,6 @@ typedef union {
 
 #define PCI_CFG_SPACE_EXP_SIZE 4096
 
-#define BUG() assert(0)
-#define ASSERT_UNREACHABLE() assert(0)
-
 #endif
 
 /*
diff --git a/xen/arch/arm/vpci.c b/xen/arch/arm/vpci.c
index 828c5c745bd9..7bb77f9f9c80 100644
--- a/xen/arch/arm/vpci.c
+++ b/xen/arch/arm/vpci.c
@@ -7,34 +7,54 @@
 
 #include 
 
-static pci_sbdf_t vpci_sbdf_from_gpa(const struct pci_host_bridge *bridge,
-                                     paddr_t gpa)
+static bool vpci_sbdf_from_gpa(struct domain *d,
+                               const struct pci_host_bridge *bridge,
+                               paddr_t gpa, pci_sbdf_t *sbdf)
 {
-    pci_sbdf_t sbdf;
+    bool translated = true;
+
+    ASSERT(sbdf);
+    ASSERT(rw_is_locked(&d->pci_lock));
 
     if ( bridge )
     {
-        sbdf.sbdf = VPCI_ECAM_BDF(gpa - bridge->cfg->phys_addr);
-        sbdf.seg = bridge->segment;
-        sbdf.bus += bridge->cfg->busn_start;
+        sbdf->sbdf = VPCI_ECAM_BDF(gpa - bridge->cfg->phys_addr);
+        sbdf->seg = bridge->segment;
+        sbdf->bus += bridge->cfg->busn_start;
     }
     else
-        sbdf.sbdf = VPCI_ECAM_BDF(gpa - GUEST_VPCI_ECAM_BASE);
+    {
+        /*
+         * For the passed through devices we need to map their virtual SBDF
+         * to the physical PCI device being passed through.
+         */
+        sbdf->sbdf = VPCI_ECAM_BDF(gpa - GUEST_VPCI_ECAM_BASE);
+        translated = vpci_translate_virtual_device(d, sbdf);
+    }
 
-    return sbdf;
+    return translated;
 }
 
 static int vpci_mmio_read(struct vcpu *v, mmio_info_t *info,
                           register_t *r, void *p)
 {
     struct pci_host_bridge *bridge = p;
-    pci_sbdf_t sbdf = vpci_sbdf_from_gpa(bridge, info->gpa);
+    pci_sbdf_t sbdf;
     const unsigned int access_size = (1U << info->dabt.size) * 8;
     const register_t invalid = GENMASK_ULL(access_size - 1, 0);
     /* data is needed to prevent a pointer cast on 32bit */
     unsigned long data;
 
+    ASSERT(!bridge == !is_hardware_domain(v->domain));
+
     read_lock(&v->domain->pci_lock);
+    if ( !vpci_sbdf_from_gpa(v->domain, bridge, info->gpa, &sbdf) )
+    {
+        *r = invalid;
+        read_unlock(&v->domain->pci_lock);
+        return 1;
+    }
+
     if ( vpci_ecam_read(sbdf, ECAM_REG_OFFSET(info->gpa),
                         1U << info->dabt.size, &data) )
     {
@@ -53,10 +73,18 @@ static int vpci_mmio_write(struct vcpu *v, mmio_info_t *info,
                            register_t r, void *p)
 {
     struct pci_host_bridge *bridge = p;
-    pci_sbdf_t sbdf = vpci_sbdf_from_gpa(bridge, info->gpa);
+    pci_sbdf_t sbdf;
     int ret;
 
+    ASSERT(!bridge == !is_hardware_domain(v->domain));
+
     write_lock(&v->domain->pci_lock);
+    if ( !vpci_sbdf_from_gpa(v->domain, bridge, info->gpa, &sbdf) )
+    {
+        write_unlock(&v->domain->pci_lock);
+        return 1;
+    }
+
     ret = vpci_ecam_write(sbdf, ECAM_REG_OFFSET(info->gpa),
                           1U << info->dabt.size, r);
     write_unlock(&v->domain->pci_lock);
diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c
index d01fb7be226a..46e96518299e 100644
--- a/xen/drivers/vpci/vpci.c
+++ b/xen/drivers/vpci/vpci.c
@@ -81,6 +81,30 @@ static int assign_virtual_sbdf(struct pci_dev *pdev)
     return 0;
 }
 
+/*
+ * Find the physical device which is mapped to the virtual device
+ * and translate virtual SBDF to the physical one.
+ */
+bool vpci_translate_virtual_device(struct domain *d, pci_sbdf_t *sbdf)
+{
+    const struct pci_dev *pdev;
+
+    ASSERT(!is_hardware_domain(d));
+    ASSERT(rw_is_locked(&d->pci_lock));
+
+    for_each_pdev ( d, pdev )
+    {
+        if ( pdev->vpci && (pdev->vpci->guest_sbdf.sbdf == sbdf->sbdf) )
+        {
+            /* Replace guest SBDF with the physical one. */
+            *sbdf = pdev->sbdf;
+            return true;
+        }
+    }
+
+    return false;
+}
+
 #endif /* CONFIG_HAS_VPCI_GUEST_SUPPORT */
 
 void vpci_deassign_device(struct pci_dev *pdev)
diff --git a/xen/include/xen/vpci.h b/xen/include/xen/vpci.h
index 807401b2eaa2..e355329913ef 100644
--- a/xen/include/xen/vpci.h
+++ b/xen/include/xen/vpci.h
@@ -311,6 +311,18 @@ static inline int __must_check vpci_reset_device(struct pci_dev *pdev)
     return vpci_assign_device(pdev);
 }
 
+#ifdef CONFIG_HAS_VPCI_GUEST_SUPPORT
+bool vpci_translate_virtual_device(struct domain *d, pci_sbdf_t *sbdf);
+#else
+static inline bool vpci_translate_virtual_device(struct domain *d,
+                                                 pci_sbdf_t *sbdf)
+{
+    ASSERT_UNREACHABLE();
+
+    return false;
+}
+#endif
+
 #endif
 
 /*
-- 
2.49.0



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On 4/14/2025 11:56 PM, H. Peter Anvin wrote:
>> arlier in the pipeline, right?
> Yes, but then it would be redundant with the virtualization support.
> 

So better to drop this patch then.


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Date: Tue, 15 Apr 2025 10:07:01 -0700
From: "H. Peter Anvin" 
To: Xin Li , Jim Mattson ,
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On April 15, 2025 10:06:01 AM PDT, Xin Li  wrote:
>On 4/14/2025 11:56 PM, H=2E Peter Anvin wrote:
>>> arlier in the pipeline, right?
>> Yes, but then it would be redundant with the virtualization support=2E
>>=20
>
>So better to drop this patch then=2E

Yeah, if it gets pulled in as a consequence of a global change that is OK =
but the local change makes no sense=2E


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Introduce vmsix_table_host_{addr,base} returning the host physical MSI-X
table address and base. Use them in update_entry() and get_table().

Remove stale comment.

Signed-off-by: Stewart Hildebrand 
---
I considered adding this tag:
Fixes: 52ebde3cfae2 ("vpci/header: program p2m with guest BAR view")
but I left it out since upstream currently only supports identity-mapped
vPCI.
---
 xen/drivers/vpci/msix.c | 14 ++++----------
 xen/include/xen/vpci.h  | 13 +++++++++++++
 2 files changed, 17 insertions(+), 10 deletions(-)

diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c
index 6bd8c55bb48e..f3804ce047a3 100644
--- a/xen/drivers/vpci/msix.c
+++ b/xen/drivers/vpci/msix.c
@@ -57,8 +57,8 @@ static void update_entry(struct vpci_msix_entry *entry,
     }
 
     rc = vpci_msix_arch_enable_entry(entry, pdev,
-                                     vmsix_table_base(pdev->vpci,
-                                                      VPCI_MSIX_TABLE));
+                                     vmsix_table_host_base(pdev->vpci,
+                                                           VPCI_MSIX_TABLE));
     if ( rc )
     {
         gprintk(XENLOG_WARNING, "%pp: unable to enable entry %u: %d\n",
@@ -218,14 +218,14 @@ static void __iomem *get_table(const struct vpci *vpci, unsigned int slot)
         addr = vmsix_table_size(vpci, VPCI_MSIX_TABLE);
         fallthrough;
     case VPCI_MSIX_TBL_HEAD:
-        addr += vmsix_table_addr(vpci, VPCI_MSIX_TABLE);
+        addr += vmsix_table_host_addr(vpci, VPCI_MSIX_TABLE);
         break;
 
     case VPCI_MSIX_PBA_TAIL:
         addr = vmsix_table_size(vpci, VPCI_MSIX_PBA);
         fallthrough;
     case VPCI_MSIX_PBA_HEAD:
-        addr += vmsix_table_addr(vpci, VPCI_MSIX_PBA);
+        addr += vmsix_table_host_addr(vpci, VPCI_MSIX_PBA);
         break;
 
     default:
@@ -242,12 +242,6 @@ static unsigned int get_slot(const struct vpci *vpci, unsigned long addr)
 {
     unsigned long pfn = PFN_DOWN(addr);
 
-    /*
-     * The logic below relies on having the tables identity mapped to the guest
-     * address space, or for the `addr` parameter to be translated into its
-     * host physical memory address equivalent.
-     */
-
     if ( pfn == PFN_DOWN(vmsix_table_addr(vpci, VPCI_MSIX_TABLE)) )
         return VPCI_MSIX_TBL_HEAD;
     if ( pfn == PFN_DOWN(vmsix_table_addr(vpci, VPCI_MSIX_TABLE) +
diff --git a/xen/include/xen/vpci.h b/xen/include/xen/vpci.h
index 807401b2eaa2..475981cb8155 100644
--- a/xen/include/xen/vpci.h
+++ b/xen/include/xen/vpci.h
@@ -231,6 +231,19 @@ int vpci_msix_arch_print(const struct vpci_msix *msix);
  * Helper functions to fetch MSIX related data. They are used by both the
  * emulated MSIX code and the BAR handlers.
  */
+static inline paddr_t vmsix_table_host_base(const struct vpci *vpci,
+                                            unsigned int nr)
+{
+    return vpci->header.bars[vpci->msix->tables[nr] & PCI_MSIX_BIRMASK].addr;
+}
+
+static inline paddr_t vmsix_table_host_addr(const struct vpci *vpci,
+                                            unsigned int nr)
+{
+    return vmsix_table_host_base(vpci, nr) +
+           (vpci->msix->tables[nr] & ~PCI_MSIX_BIRMASK);
+}
+
 static inline paddr_t vmsix_table_base(const struct vpci *vpci, unsigned int nr)
 {
     return vpci->header.bars[vpci->msix->tables[nr] &

base-commit: 38d07809794e3c723a4de7e10c25c1f6cb590dc6
-- 
2.49.0



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Date: Tue, 15 Apr 2025 21:11:50 +0200
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User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v1 08/14] xen/riscv: imsic_init() implementation
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Romain Caritey , xen-devel@lists.xenproject.org
References: 
 <09e0fcd64f97062441a68102ead520b818150fe9.1744126720.git.oleksii.kurochko@gmail.com>
 <78fa2ed0-57a2-4990-bc9c-8fa52e41420a@suse.com>
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From: Oleksii Kurochko 
In-Reply-To: <78fa2ed0-57a2-4990-bc9c-8fa52e41420a@suse.com>

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On 4/14/25 11:32 AM, Jan Beulich wrote:
> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>> --- /dev/null
>> +++ b/xen/arch/riscv/imsic.c
>> @@ -0,0 +1,286 @@
>> +/* SPDX-License-Identifier: MIT */
>> +
>> +/*
>> + * xen/arch/riscv/imsic.c
>> + *
>> + * RISC-V Incoming MSI Controller support
>> + *
>> + * (c) 2023 Microchip Technology Inc.
>> + * (c) 2024 Vates
> No 2025 here (if already the years matter)?

I think it doesn't really matter and it could be just dropped.

>
>> + */
>> +
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +
>> +#include 
>> +
>> +static struct imsic_config imsic_cfg;
>> +
>> +const struct imsic_config *imsic_get_config(void)
> Does this need to return a pointer to non-const?

No, I think it could be const struct imsic_config * const as a return type.
It isn't expected that the caller will change a pointer.

>
>> +{
>> +    return &imsic_cfg;
>> +}
>> +
>> +static int __init imsic_get_parent_hartid(struct dt_device_node *node,
>> +                                          unsigned int index,
>> +                                          unsigned long *hartid)
>> +{
>> +    int res;
>> +    unsigned long hart;
>> +    struct dt_phandle_args args;
>> +
>> +    /* Try the new-style interrupts-extended first */
> The comment says "first", but then ...
>
>> +    res = dt_parse_phandle_with_args(node, "interrupts-extended",
>> +                                     "#interrupt-cells", index, &args);
>> +    if ( !res )
>> +    {
>> +        res = riscv_of_processor_hartid(args.np->parent, &hart);
>> +        if ( res < 0 )
>> +            return -EINVAL;
>> +
>> +        *hartid = hart;
>> +    }
>> +    return res;
>> +}
> ... nothing else is being tried.

A stale comment, we decided to support only interrupt-extended to be in line with
Linux device tree bindings.
I'll drop this comment.

>
> Also, nit: Blank line please ahead of the main "return" of a function.
>
> Further - any particular reason to discard riscv_of_processor_hartid()'s
> error code on the error path?

No particular reason, just overlooked that we could really return just `res`.


>> +static int imsic_parse_node(struct dt_device_node *node,
>> +                     unsigned int *nr_parent_irqs)

(for me: fix an indentation)

>> +{
>> +    int rc;
>> +    unsigned int tmp;
>> +    paddr_t base_addr;
>> +
>> +    /* Find number of parent interrupts */
>> +    *nr_parent_irqs = dt_number_of_irq(node);
>> +    if ( !*nr_parent_irqs )
>> +    {
>> +        printk(XENLOG_ERR "%s: no parent irqs available\n", node->name);
>> +        return -ENOENT;
>> +    }
>> +
>> +    /* Find number of guest index bits in MSI address */
>> +    rc = dt_property_read_u32(node, "riscv,guest-index-bits",
>> +                              &imsic_cfg.guest_index_bits);
>> +    if ( !rc )
> It is confusing to store a bool return value in a local "int" variable,
> just to then use it as boolean. Is the local var needed at all here?

'int` is used because of ...:
   rc = dt_device_get_address(node, imsic_cfg.nr_mmios, &base_addr, NULL);
... at the end of imsic_parse_node().

Agree, we can just drop `rc` variable and return err code explicitly.

>
>> +        imsic_cfg.guest_index_bits = 0;
>> +    tmp = BITS_PER_LONG - IMSIC_MMIO_PAGE_SHIFT;
>> +    if ( tmp < imsic_cfg.guest_index_bits )
>> +    {
>> +        printk(XENLOG_ERR "%s: guest index bits too big\n", node->name);
>> +        return -ENOENT;
>> +    }
>> +
>> +    /* Find number of HART index bits */
>> +    rc = dt_property_read_u32(node, "riscv,hart-index-bits",
>> +                              &imsic_cfg.hart_index_bits);
>> +    if ( !rc )
>> +    {
>> +        /* Assume default value */
>> +        imsic_cfg.hart_index_bits = fls(*nr_parent_irqs);
>> +        if ( BIT(imsic_cfg.hart_index_bits, UL) < *nr_parent_irqs )
>> +            imsic_cfg.hart_index_bits++;
>> +    }
>> +    tmp = BITS_PER_LONG - IMSIC_MMIO_PAGE_SHIFT -
>> +          imsic_cfg.guest_index_bits;
>      tmp -= imsic_cfg.guest_index_bits;
>
> ? (And then similarly further down.)

Yes, it would be simpler.

>> +    if ( tmp < imsic_cfg.hart_index_bits )
>> +    {
>> +        printk(XENLOG_ERR "%s: HART index bits too big\n", node->name);
>> +        return -ENOENT;
>> +    }
>> +
>> +    /* Find number of group index bits */
>> +    rc = dt_property_read_u32(node, "riscv,group-index-bits",
>> +                              &imsic_cfg.group_index_bits);
>> +    if ( !rc )
>> +        imsic_cfg.group_index_bits = 0;
>> +    tmp = BITS_PER_LONG - IMSIC_MMIO_PAGE_SHIFT -
>> +          imsic_cfg.guest_index_bits - imsic_cfg.hart_index_bits;
>> +    if ( tmp < imsic_cfg.group_index_bits )
>> +    {
>> +        printk(XENLOG_ERR "%s: group index bits too big\n", node->name);
>> +        return -ENOENT;
>> +    }
>> +
>> +    /* Find first bit position of group index */
>> +    tmp = IMSIC_MMIO_PAGE_SHIFT * 2;
>> +    rc = dt_property_read_u32(node, "riscv,group-index-shift",
>> +                              &imsic_cfg.group_index_shift);
>> +    if ( !rc )
>> +        imsic_cfg.group_index_shift = tmp;
>> +    if ( imsic_cfg.group_index_shift < tmp )
>> +    {
>> +        printk(XENLOG_ERR "%s: group index shift too small\n", node->name);
>> +        return -ENOENT;
>> +    }
>> +    tmp = imsic_cfg.group_index_bits + imsic_cfg.group_index_shift - 1;
>> +    if ( tmp >= BITS_PER_LONG )
>> +    {
>> +        printk(XENLOG_ERR "%s: group index shift too big\n", node->name);
>> +        return -EINVAL;
>> +    }
>> +
>> +    /* Find number of interrupt identities */
>> +    rc = dt_property_read_u32(node, "riscv,num-ids", &imsic_cfg.nr_ids);
>> +    if ( !rc )
>> +    {
>> +        printk(XENLOG_ERR "%s: number of interrupt identities not found\n",
>> +               node->name);
>> +        return -ENOENT;
>> +    }
>> +
>> +    if ( (imsic_cfg.nr_ids < IMSIC_MIN_ID) ||
>> +         (imsic_cfg.nr_ids >= IMSIC_MAX_ID) ||
> Something named "max" normally wants to decribe the highest valid value,
> not the first out-of-range one.

But it is the maximum of identities for IMISIC according to the AIA specs:
```
( MRIF stands for Memory-Resident Interrupt File )

All MRIFs are the size to accommodate 2047 valid interrupt identities,
the maximum allowed for an IMSIC interrupt file. If a system’s actual IMSICs
have interrupt files that implement only N interrupt identities, N < 2047,
then the contents of MRIFs for identities greater than N may be ignored by
softwareand
```
and prefix IMSIC (IMO)emphasizes this. Would it be better to rename to IMSIC_MAX_ALLOWED_ID? 
And then IMSIC_MIN_ALLOWED_ID?

>
>> +         ((imsic_cfg.nr_ids & IMSIC_MIN_ID) != IMSIC_MIN_ID) )
>> +    {
>> +        printk(XENLOG_ERR "%s: invalid number of interrupt identities\n",
>> +               node->name);
>> +        return -EINVAL;
>> +    }
>> +
>> +    /* Compute base address */
>> +    imsic_cfg.nr_mmios = 0;
>> +    rc = dt_device_get_address(node, imsic_cfg.nr_mmios, &base_addr, NULL);
>> +    if (rc)
> Nit: Style.
>
>> +    {
>> +        printk(XENLOG_ERR "%s: first MMIO resource not found\n", node->name);
>> +        return -EINVAL;
> Discarding "rc" again?

Agree, it could be just `rc`, but considering of that this functions always returns
-EINVAL in case of the error and that `rc` could be dropped at all, we just explicitly
return here -EINVAL.

>
>> +    }
>> +
>> +    imsic_cfg.base_addr = base_addr;
>> +    imsic_cfg.base_addr &= ~(BIT(imsic_cfg.guest_index_bits +
>> +                   imsic_cfg.hart_index_bits +
>> +                   IMSIC_MMIO_PAGE_SHIFT, UL) - 1);
>> +    imsic_cfg.base_addr &= ~((BIT(imsic_cfg.group_index_bits, UL) - 1) <<
>> +                   imsic_cfg.group_index_shift);
> Besides indentation being bogus here, why is it that you need to mask bits
> off of the value read from DT? Wouldn't the expectation be that you get back
> the true base address?

The group index is used to differentiate between clusters/groups. For 
example, consider two clusters: - Cluster 1 with cpu0 and cpu1 - Cluster 
2 with cpu2 and cpu3 Then, the reg property in the IMSIC node will 
include two entries: reg = <0x0 0xd100000 0x0 0x20000>, <0x0 0x2d100000 
0x0 0x20000>; riscv,guest-index-bits = <3>; riscv,hart-index-bits = <2>; 
riscv,group-index-bits = <1>; riscv,group-index-shift = <29>; In this 
example: The group index is 1 bit wide (group-index-bits = <1>), It is 
located at bit 29 (group-index-shift = <29>) of the address.

so imsic_cfg.group_index_bits will be used to distinguish clusters, but 
they must have

the same base address and this is the reason why the mask is applied.



>
>> +    /* Find number of MMIO register sets */
>> +    imsic_cfg.nr_mmios++;
>> +    while ( !dt_device_get_address(node, imsic_cfg.nr_mmios, &base_addr, NULL) )
>> +        imsic_cfg.nr_mmios++;
> And the base addresses of these aren't of interest? Oh, I see they're
> fetched again further down.

It is fetched again because we are using imsic_cfg.nr_mmios to calculate the size of
imsic_cfg.mmios array:
   imsic_cfg.mmios = xzalloc_array(struct imsic_mmios, imsic_cfg.nr_mmios);

>
> Also - use do-while here?

It could be, I'll update that.

>> +        if ( base_addr != imsic_cfg.base_addr )
>> +        {
>> +            rc = -EINVAL;
>> +            printk(XENLOG_ERR "%s: address mismatch for regset %d\n",
>> +                   node->name, i);
>> +            goto imsic_init_err;
>> +        }
> Oh, all of the addresses need to (sufficiently) match.
>
>> +    xfree(imsic_cfg.mmios);
> Better use XFREE() in cases like this one?

I think, yes.

>
>> --- /dev/null
>> +++ b/xen/arch/riscv/include/asm/imsic.h
>> @@ -0,0 +1,66 @@
>> +/* SPDX-License-Identifier: MIT */
>> +
>> +/*
>> + * xen/arch/riscv/imsic.h
>> + *
>> + * RISC-V Incoming MSI Controller support
>> + *
>> + * (c) 2023 Microchip Technology Inc.
>> + */
>> +
>> +#ifndef ASM__RISCV__IMSIC_H
>> +#define ASM__RISCV__IMSIC_H
>> +
>> +#include 
>> +
>> +#define IMSIC_MMIO_PAGE_SHIFT   12
>> +#define IMSIC_MMIO_PAGE_SZ      (1UL << IMSIC_MMIO_PAGE_SHIFT)
>> +
>> +#define IMSIC_MIN_ID            63
>> +#define IMSIC_MAX_ID            2048
>> +
>> +struct imsic_msi {
>> +    paddr_t base_addr;
>> +    unsigned long offset;
>> +};
>> +
>> +struct imsic_mmios {
>> +    paddr_t base_addr;
>> +    unsigned long size;
>> +    bool harts[NR_CPUS];
> An array of bool - won't a bitmap do here? Even then I wouldn't be overly
> happy to see it dimensioned by NR_CPUS.

Bitmap will fit here well. But for DECLARE_BITMAP() is necessary the size
of bitmap so NR_CPUS should be used again.
Could you please remind me why it isn't good to use it?
Because NR_CPUS not always equal to an amount of physical cpus?
Should I use non-static version of bitmap declaration? (if we have such...)

>
>> +};
>> +
>> +struct imsic_config {
>> +    /* base address */
>> +    paddr_t base_addr;
>> +
>> +    /* Bits representing Guest index, HART index, and Group index */
>> +    unsigned int guest_index_bits;
>> +    unsigned int hart_index_bits;
>> +    unsigned int group_index_bits;
>> +    unsigned int group_index_shift;
>> +
>> +    /* imsic phandle */
>> +    unsigned int phandle;
>> +
>> +    /* number of parent irq */
>> +    unsigned int nr_parent_irqs;
>> +
>> +    /* number off interrupt identities */
>> +    unsigned int nr_ids;
>> +
>> +    /* mmios */
>> +    unsigned int nr_mmios;
>> +    struct imsic_mmios *mmios;
>> +
>> +    /* MSI */
>> +    struct imsic_msi msi[NR_CPUS];
> You surely can avoid wasting perhaps a lot of memory by allocating this
> based on the number of CPUs in use?

It make sense. I'll allocate then this dynamically.

Thanks!

~ Oleksii

--------------2PuCBkmw5JrA8BtKKDoiNZrA
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Content-Transfer-Encoding: 8bit



  
    
  
  
    


    

    
On 4/14/25 11:32 AM, Jan Beulich wrote:

    

    

      
On 08.04.2025 17:57, Oleksii Kurochko wrote:


      

        
--- /dev/null
+++ b/xen/arch/riscv/imsic.c
@@ -0,0 +1,286 @@
+/* SPDX-License-Identifier: MIT */
+
+/*
+ * xen/arch/riscv/imsic.c
+ *
+ * RISC-V Incoming MSI Controller support
+ *
+ * (c) 2023 Microchip Technology Inc.
+ * (c) 2024 Vates


      

      
No 2025 here (if already the years matter)?

    

    
I think it doesn't really matter and it could be just dropped.



    

      



      

        
+ */
+
+#include <xen/const.h>
+#include <xen/device_tree.h>
+#include <xen/errno.h>
+#include <xen/init.h>
+#include <xen/macros.h>
+#include <xen/xmalloc.h>
+
+#include <asm/imsic.h>
+
+static struct imsic_config imsic_cfg;
+
+const struct imsic_config *imsic_get_config(void)


      

      
Does this need to return a pointer to non-const?

    

    
No, I think it could be const struct imsic_config * const as a return type.
It isn't expected that the caller will change a pointer.



    

      



      

        
+{
+    return &imsic_cfg;
+}
+
+static int __init imsic_get_parent_hartid(struct dt_device_node *node,
+                                          unsigned int index,
+                                          unsigned long *hartid)
+{
+    int res;
+    unsigned long hart;
+    struct dt_phandle_args args;
+
+    /* Try the new-style interrupts-extended first */


      

      
The comment says "first", but then ...



      

        
+    res = dt_parse_phandle_with_args(node, "interrupts-extended",
+                                     "#interrupt-cells", index, &args);
+    if ( !res )
+    {
+        res = riscv_of_processor_hartid(args.np->parent, &hart);
+        if ( res < 0 )
+            return -EINVAL;
+
+        *hartid = hart;
+    }
+    return res;
+}


      

      
... nothing else is being tried.

    

    
A stale comment, we decided to support only interrupt-extended to be in line with
Linux device tree bindings.
I'll drop this comment.



    

      

Also, nit: Blank line please ahead of the main "return" of a function.

Further - any particular reason to discard riscv_of_processor_hartid()'s
error code on the error path?

    

    
No particular reason, just overlooked that we could really return just `res`.




    

      

        
+static int imsic_parse_node(struct dt_device_node *node,
+                     unsigned int *nr_parent_irqs)

      

    

    
(for me: fix an indentation)

    

      

        
+{
+    int rc;
+    unsigned int tmp;
+    paddr_t base_addr;
+
+    /* Find number of parent interrupts */
+    *nr_parent_irqs = dt_number_of_irq(node);
+    if ( !*nr_parent_irqs )
+    {
+        printk(XENLOG_ERR "%s: no parent irqs available\n", node->name);
+        return -ENOENT;
+    }
+
+    /* Find number of guest index bits in MSI address */
+    rc = dt_property_read_u32(node, "riscv,guest-index-bits",
+                              &imsic_cfg.guest_index_bits);
+    if ( !rc )


      

      
It is confusing to store a bool return value in a local "int" variable,
just to then use it as boolean. Is the local var needed at all here?

    

    
'int` is used because of ...:
  rc = dt_device_get_address(node, imsic_cfg.nr_mmios, &base_addr, NULL);
... at the end of imsic_parse_node().

Agree, we can just drop `rc` variable and return err code explicitly.



    

      



      

        
+        imsic_cfg.guest_index_bits = 0;
+    tmp = BITS_PER_LONG - IMSIC_MMIO_PAGE_SHIFT;
+    if ( tmp < imsic_cfg.guest_index_bits )
+    {
+        printk(XENLOG_ERR "%s: guest index bits too big\n", node->name);
+        return -ENOENT;
+    }
+
+    /* Find number of HART index bits */
+    rc = dt_property_read_u32(node, "riscv,hart-index-bits",
+                              &imsic_cfg.hart_index_bits);
+    if ( !rc )
+    {
+        /* Assume default value */
+        imsic_cfg.hart_index_bits = fls(*nr_parent_irqs);
+        if ( BIT(imsic_cfg.hart_index_bits, UL) < *nr_parent_irqs )
+            imsic_cfg.hart_index_bits++;
+    }
+    tmp = BITS_PER_LONG - IMSIC_MMIO_PAGE_SHIFT -
+          imsic_cfg.guest_index_bits;


      

      
    tmp -= imsic_cfg.guest_index_bits;

? (And then similarly further down.)


    

    
Yes, it would be simpler.



    

      

      

        
+    if ( tmp < imsic_cfg.hart_index_bits )
+    {
+        printk(XENLOG_ERR "%s: HART index bits too big\n", node->name);
+        return -ENOENT;
+    }
+
+    /* Find number of group index bits */
+    rc = dt_property_read_u32(node, "riscv,group-index-bits",
+                              &imsic_cfg.group_index_bits);
+    if ( !rc )
+        imsic_cfg.group_index_bits = 0;
+    tmp = BITS_PER_LONG - IMSIC_MMIO_PAGE_SHIFT -
+          imsic_cfg.guest_index_bits - imsic_cfg.hart_index_bits;
+    if ( tmp < imsic_cfg.group_index_bits )
+    {
+        printk(XENLOG_ERR "%s: group index bits too big\n", node->name);
+        return -ENOENT;
+    }
+
+    /* Find first bit position of group index */
+    tmp = IMSIC_MMIO_PAGE_SHIFT * 2;
+    rc = dt_property_read_u32(node, "riscv,group-index-shift",
+                              &imsic_cfg.group_index_shift);
+    if ( !rc )
+        imsic_cfg.group_index_shift = tmp;
+    if ( imsic_cfg.group_index_shift < tmp )
+    {
+        printk(XENLOG_ERR "%s: group index shift too small\n", node->name);
+        return -ENOENT;
+    }
+    tmp = imsic_cfg.group_index_bits + imsic_cfg.group_index_shift - 1;
+    if ( tmp >= BITS_PER_LONG )
+    {
+        printk(XENLOG_ERR "%s: group index shift too big\n", node->name);
+        return -EINVAL;
+    }
+
+    /* Find number of interrupt identities */
+    rc = dt_property_read_u32(node, "riscv,num-ids", &imsic_cfg.nr_ids);
+    if ( !rc )
+    {
+        printk(XENLOG_ERR "%s: number of interrupt identities not found\n",
+               node->name);
+        return -ENOENT;
+    }
+
+    if ( (imsic_cfg.nr_ids < IMSIC_MIN_ID) ||
+         (imsic_cfg.nr_ids >= IMSIC_MAX_ID) ||


      

      
Something named "max" normally wants to decribe the highest valid value,
not the first out-of-range one.

    

    
But it is the maximum of identities for IMISIC according to the AIA specs:
```
( MRIF stands for Memory-Resident Interrupt File )

All MRIFs are the size to accommodate 2047 valid interrupt identities,
the maximum allowed for an IMSIC interrupt file. If a system’s actual IMSICs
have interrupt files that implement only N interrupt identities, N < 2047,
then the contents of MRIFs for identities greater than N may be ignored by
softwareand
```
and prefix IMSIC (IMO) emphasizes this.

Would it be better to rename to IMSIC_MAX_ALLOWED_ID? And then IMSIC_MIN_ALLOWED_ID?



    

      



      

        
+         ((imsic_cfg.nr_ids & IMSIC_MIN_ID) != IMSIC_MIN_ID) )
+    {
+        printk(XENLOG_ERR "%s: invalid number of interrupt identities\n",
+               node->name);
+        return -EINVAL;
+    }
+
+    /* Compute base address */
+    imsic_cfg.nr_mmios = 0;
+    rc = dt_device_get_address(node, imsic_cfg.nr_mmios, &base_addr, NULL);
+    if (rc)


      

      
Nit: Style.



      

        
+    {
+        printk(XENLOG_ERR "%s: first MMIO resource not found\n", node->name);
+        return -EINVAL;


      

      
Discarding "rc" again?

    

    
Agree, it could be just `rc`, but considering of that this functions always returns
-EINVAL in case of the error and that `rc` could be dropped at all, we just explicitly
return here -EINVAL.



    

      



      

        
+    }
+
+    imsic_cfg.base_addr = base_addr;
+    imsic_cfg.base_addr &= ~(BIT(imsic_cfg.guest_index_bits +
+                   imsic_cfg.hart_index_bits +
+                   IMSIC_MMIO_PAGE_SHIFT, UL) - 1);
+    imsic_cfg.base_addr &= ~((BIT(imsic_cfg.group_index_bits, UL) - 1) <<
+                   imsic_cfg.group_index_shift);


      

      
Besides indentation being bogus here, why is it that you need to mask bits
off of the value read from DT? Wouldn't the expectation be that you get back
the true base address?

    

    
The group index is used to differentiate between clusters/groups.
For example, consider two clusters:
- Cluster 1 with cpu0 and cpu1
- Cluster 2 with cpu2 and cpu3

Then, the reg property in the IMSIC node will include two entries:
reg = <0x0 0xd100000  0x0 0x20000>,
      <0x0 0x2d100000 0x0 0x20000>;
riscv,guest-index-bits = <3>;
riscv,hart-index-bits = <2>;
riscv,group-index-bits = <1>;
riscv,group-index-shift = <29>;

In this example:
The group index is 1 bit wide (group-index-bits = <1>),
It is located at bit 29 (group-index-shift = <29>) of the address.
so imsic_cfg.group_index_bits will be used to distinguish clusters, but they must have
the same base address and this is the reason why the mask is applied.





    

      



      

        
+    /* Find number of MMIO register sets */
+    imsic_cfg.nr_mmios++;
+    while ( !dt_device_get_address(node, imsic_cfg.nr_mmios, &base_addr, NULL) )
+        imsic_cfg.nr_mmios++;


      

      
And the base addresses of these aren't of interest? Oh, I see they're
fetched again further down.

    

    
It is fetched again because we are using imsic_cfg.nr_mmios to calculate the size of
imsic_cfg.mmios array:
  imsic_cfg.mmios = xzalloc_array(struct imsic_mmios, imsic_cfg.nr_mmios);



    

      

Also - use do-while here?

    

    
It could be, I'll update that.

    

      

        
+        if ( base_addr != imsic_cfg.base_addr )
+        {
+            rc = -EINVAL;
+            printk(XENLOG_ERR "%s: address mismatch for regset %d\n",
+                   node->name, i);
+            goto imsic_init_err;
+        }


      

      
Oh, all of the addresses need to (sufficiently) match.



      

        
+    xfree(imsic_cfg.mmios);


      

      
Better use XFREE() in cases like this one?

    

    
I think, yes.



    

      



      

        
--- /dev/null
+++ b/xen/arch/riscv/include/asm/imsic.h
@@ -0,0 +1,66 @@
+/* SPDX-License-Identifier: MIT */
+
+/*
+ * xen/arch/riscv/imsic.h
+ *
+ * RISC-V Incoming MSI Controller support
+ *
+ * (c) 2023 Microchip Technology Inc.
+ */
+
+#ifndef ASM__RISCV__IMSIC_H
+#define ASM__RISCV__IMSIC_H
+
+#include <xen/types.h>
+
+#define IMSIC_MMIO_PAGE_SHIFT   12
+#define IMSIC_MMIO_PAGE_SZ      (1UL << IMSIC_MMIO_PAGE_SHIFT)
+
+#define IMSIC_MIN_ID            63
+#define IMSIC_MAX_ID            2048
+
+struct imsic_msi {
+    paddr_t base_addr;
+    unsigned long offset;
+};
+
+struct imsic_mmios {
+    paddr_t base_addr;
+    unsigned long size;
+    bool harts[NR_CPUS];


      

      
An array of bool - won't a bitmap do here? Even then I wouldn't be overly
happy to see it dimensioned by NR_CPUS.

    

    
Bitmap will fit here well. But for DECLARE_BITMAP() is necessary the size
of bitmap so NR_CPUS should be used again.
Could you please remind me why it isn't good to use it?
Because NR_CPUS not always equal to an amount of physical cpus?
Should I use non-static version of bitmap declaration? (if we have such...)



    

      



      

        
+};
+
+struct imsic_config {
+    /* base address */
+    paddr_t base_addr;
+
+    /* Bits representing Guest index, HART index, and Group index */
+    unsigned int guest_index_bits;
+    unsigned int hart_index_bits;
+    unsigned int group_index_bits;
+    unsigned int group_index_shift;
+
+    /* imsic phandle */
+    unsigned int phandle;
+
+    /* number of parent irq */
+    unsigned int nr_parent_irqs;
+
+    /* number off interrupt identities */
+    unsigned int nr_ids;
+
+    /* mmios */
+    unsigned int nr_mmios;
+    struct imsic_mmios *mmios;
+
+    /* MSI */
+    struct imsic_msi msi[NR_CPUS];


      

      
You surely can avoid wasting perhaps a lot of memory by allocating this
based on the number of CPUs in use?

    

    
It make sense. I'll allocate then this dynamically.

Thanks!

~ Oleksii


  


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From: Stefano Stabellini 
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To: "Weber (US), Matthew L" 
cc: "xen-devel@lists.xenproject.org" , 
    "Whitehead (US), Joshua C" , 
    "Wood (US), Brian J" , julien@xen.org, 
    bertrand.marquis@arm.com, michal.orzel@amd.com, Volodymyr_Babchuk@epam.com, 
    Luca.Fancellu@arm.com, andrei.cherechesu@oss.nxp.com, 
    andrei.cherechesu@nxp.com, peng.fan@nxp.com, john.ernberg@actia.se, 
    sstabellini@kernel.org
Subject: Re: NXP Layerscape SMMU IDs
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Adding a few people in CC that might be able to help

On Fri, 11 Apr 2025, Weber (US), Matthew L wrote:
> Hello,
> 
> We're curious if anyone else has figured out NXP Layerscape Xen support to get at least basic domains launching with minimal IO support?
> 
> Started a recent discussion on it here:
> https://community.nxp.com/t5/Layerscape/How-to-determine-LS1088A-SMMU-Masters-and-Stream-IDs/m-p/2072157#M15560
> 
> We're guessing some of the NXP specific chip/interconnect designs in Layerscape were carried over from the QORIQ PowerPC P/T series.  Maybe some clues in that Topaz hypervisor code?  https://github.com/nxp-qoriq-yocto-sdk/hypervisor
> 
> Regards,
> Matt
> 


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    Bertrand Marquis , 
    Michal Orzel , 
    Volodymyr Babchuk , 
    Anthony PERARD , 
    Juergen Gross , Andrew Cooper , 
    Jan Beulich , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
Subject: Re: [PATCH v2 0/2] Add support for MSI injection on Arm
In-Reply-To: <98feb427-7da5-47ff-831c-2b4bcb26c4b9@xen.org>
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On Mon, 14 Apr 2025, Julien Grall wrote:
> Hi Mykyta,
> 
> On 14/04/2025 18:51, Mykyta Poturai wrote:
> > This series adds the base support for MSI injection on Arm. This is
> > needed to streamline virtio-pci interrupt triggering.
> > 
> > With this patches, MSIs can be triggered in guests by issuing the new
> > DM op, inject_msi2. This op is similar to inject_msi, but it allows
> > to specify the source id of the MSI.
> > 
> > We chose the approach of adding a new DM op instead of using the pad
> > field of inject_msi because we have no clear way of distinguishing
> > between set and unset pad fields. New implementations also adds flags
> > field to clearly specify if the SBDF is set.
> > 
> > Patches were tested on QEMU with
> 
> [...]
> 
> > patches for ITS support for DomUs applied.
> 
> This means this series is unusable without external patches. Given this is
> adding a new DM operations, I think it would be more sensible to have the vITS
> support merged first. Then we can look at merging this series.

Hi Mykyta, just checking explicitly with you whether this series
requires vgic-v3-its.c for DomUs?

If yes, how far are you from sending the relevant patches to xen-devel?
How many are they?


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Date: Tue, 15 Apr 2025 16:48:37 -0700 (PDT)
From: Stefano Stabellini 
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To: Andrew Cooper 
cc: Xen-devel , 
    Anthony PERARD , 
    Stefano Stabellini , 
    Michal Orzel , Doug Goldstein , 
    =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , 
    Jason Andryuk , 
    "Daniel P . Smith" 
Subject: Re: [PATCH v2 2/7] Overhaul how Argo is built and packged
In-Reply-To: <20250414101843.2348330-3-andrew.cooper3@citrix.com>
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On Mon, 14 Apr 2025, Andrew Cooper wrote:
> Right now, the argo artefacts are a pile of files which the test has to turn
> back into something which resembles a filesystem.  Furthermore, because we do
> not build modules for the main kernel, it is extra important to make sure that
> xen-argo.ko doesn't get out of sync.
> 
> Build argo conditionally as part of the linux artefact.  It's ~100kb all
> together, compared to ~14M for the kernel.
> 
> Produce a single argo.cpio.gz with xen-argo.ko in the standard location.
> Prune userspace down to just the executables and libraries.
> 
> This is cribbed from the existing scripts/x86_64-linux-argo.sh, which stays in
> place in the short term until Xen can be updated to use the new scheme.
> 
> Signed-off-by: Andrew Cooper 

Do we need to remove x86_64-argo-linux.sh?



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Date: Tue, 15 Apr 2025 16:48:29 -0700 (PDT)
From: Stefano Stabellini 
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To: Andrew Cooper 
cc: Xen-devel , 
    =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , 
    Anthony PERARD , 
    Stefano Stabellini , 
    Michal Orzel , Doug Goldstein 
Subject: Re: [PATCH v3 2/6] CI: avoid repacking initrd as part of the test
 job
In-Reply-To: <20250414110903.2355303-3-andrew.cooper3@citrix.com>
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On Mon, 14 Apr 2025, Andrew Cooper wrote:
> From: Marek Marczykowski-Górecki 
> 
> Use the new test-artifacts which provide rootfs.cpio.gz rather than
> initrd.tar.gz.  rootfs.cpio.gz also has all the necessary top-level
> directories, and includes the rc_verbose setting, so these modifications can
> be dropped.
> 
> Having that, do not repack the whole initrd, but only pack modified
> files and rely on Linux handling of concatenated archives.
> This allows packing just test-related files (which includes the whole
> toolstack), instead of the whole initrd.
> 
> For xilinx-smoke-dom0-x86_64.sh, this involves instructing grub not to unzip
> the archive, as doing so corrupts it.
> 
> Signed-off-by: Marek Marczykowski-Górecki 
> Signed-off-by: Andrew Cooper 

[...]


> diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh
> index c4be71464246..e2376cb51cb4 100755
> --- a/automation/scripts/qubes-x86-64.sh
> +++ b/automation/scripts/qubes-x86-64.sh
> @@ -164,16 +164,13 @@ ${domU_extra_config}
>  "
>  
>  if [ -n "$domU_check" ]; then
> -    # DomU
> +    # DomU rootfs
> +    cp binaries/rootfs.cpio.gz binaries/domU-rootfs.cpio.gz
> +
> +    # test-local configuration
>      mkdir -p rootfs
>      cd rootfs
> -    # fakeroot is needed to preserve device nodes in rootless podman container
> -    fakeroot -s ../fakeroot-save tar xzf ../binaries/initrd.tar.gz
> -    mkdir proc
> -    mkdir run
> -    mkdir srv
> -    mkdir sys
> -    rm var/run
> +    mkdir -p etc/local.d
>      echo "#!/bin/sh

I am worried about the drop of fakeroot because the newly created dirs
and files we'll have user as owner instead of root.

I suggest we fix this for consistency, and cpio -R 0:0 might suffice.


>  echo 8 > /proc/sys/kernel/printk
> @@ -181,26 +178,22 @@ echo 8 > /proc/sys/kernel/printk
>  ${domU_check}
>  " > etc/local.d/xen.start
>      chmod +x etc/local.d/xen.start
> -    echo "rc_verbose=yes" >> etc/rc.conf
>      echo "domU Welcome to Alpine Linux
>  Kernel \r on an \m (\l)
>  
>  " > etc/issue
> -    find . | fakeroot -i ../fakeroot-save cpio -H newc -o | gzip > ../binaries/domU-rootfs.cpio.gz
> +    find . | cpio -H newc -o | gzip >> ../binaries/domU-rootfs.cpio.gz
>      cd ..
>      rm -rf rootfs
>  fi
>  
> -# DOM0 rootfs
> +# Dom0 rootfs
> +cp binaries/rootfs.cpio.gz binaries/dom0-rootfs.cpio.gz
> +
> +# test-local configuration
>  mkdir -p rootfs
>  cd rootfs
> -fakeroot -s ../fakeroot-save tar xzf ../binaries/initrd.tar.gz
> -mkdir boot
> -mkdir proc
> -mkdir run
> -mkdir srv
> -mkdir sys
> -rm var/run
> +mkdir -p boot etc/local.d
>  cp -ar ../binaries/dist/install/* .
>  cp -ar ../binaries/tests .
>  cp -a ../automation/scripts/run-tools-tests tests/
> @@ -237,7 +230,6 @@ fi
>  chmod +x etc/local.d/xen.start
>  echo "$domU_config" > etc/xen/domU.cfg
>  
> -echo "rc_verbose=yes" >> etc/rc.conf
>  echo "XENCONSOLED_TRACE=all" >> etc/default/xencommons
>  echo "QEMU_XEN=/bin/false" >> etc/default/xencommons
>  mkdir -p var/log/xen/console
> @@ -245,7 +237,7 @@ cp ../binaries/bzImage boot/vmlinuz
>  if [ -n "$domU_check" ]; then
>      cp ../binaries/domU-rootfs.cpio.gz boot/initrd-domU
>  fi
> -find . | fakeroot -i ../fakeroot-save cpio -H newc -o | gzip > ../binaries/dom0-rootfs.cpio.gz
> +find . | cpio -H newc -o | gzip >> ../binaries/dom0-rootfs.cpio.gz
>  cd ..
--8323329-1964788768-1744760523=:8008--


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cc: Andrew Cooper , 
    Xen-devel , 
    Anthony PERARD , 
    Stefano Stabellini , 
    Michal Orzel , Doug Goldstein , 
    =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= 
Subject: Re: [PATCH] CI: Build with --prefix=/usr rather than setting
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On Tue, 15 Apr 2025, Anthony PERARD wrote:
> On Tue, Apr 15, 2025 at 02:54:26PM +0100, Andrew Cooper wrote:
> > This also moves executables too.  I'm not sure why xilinx-smoke-dom0-x86_64.sh
> > was overriding PATH too, as /usr/local is clearly in PATH for all other tests,
> > but drop that too.
> > 
> > No practical change.
> > 
> > Signed-off-by: Andrew Cooper 
> 
> Reviewed-by: Anthony PERARD 

Acked-by: Stefano Stabellini 


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From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Anthony PERARD 
cc: Stefano Stabellini , 
    xen-devel@lists.xenproject.org, Doug Goldstein 
Subject: Re: [XEN PATCH] automation: Avoid changing source files for randconfig
 tests
In-Reply-To: 
Message-ID: 
References: <20250326142754.5441-1-anthony.perard@vates.tech>    
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On Fri, 4 Apr 2025, Anthony PERARD wrote:
> On Thu, Mar 27, 2025 at 03:59:16PM -0700, Stefano Stabellini wrote:
> > I was suggesting to create a file under /tmp instead to keep the source
> > directory cleaner,
> 
> There's an easy way to keep the source directory *extra clean* when
> doing hypervisor build, like we are doing here for randoconfig, that is:
> out-of-tree build!
> 
> > and also because I don't think it is an issue to add
> > files to /tmp and not clean them because they get removed when the
> > container exits. Isn't it the case? Locally it looks like each
> > containers gets its own /tmp that is cleaned after exit.
> 
> Sorry, I tend to think that those script could be use outside of the CI
> or containers, and /tmp can have a lot of different configuration, so
> it's better to clean after oneself when possible.
> 
> As for running containers locally, maybe it's faster to reuse a
> container instead of creating a new one from an image, which mean /tmp
> is probably not cleaned on exit. But I guess people usuasly do `docker
> run --rm` or use `containerize` which does the same.
> 
> > So my preference is to use mktemp and *not* clean the tmp file on exit.
> > 
> > If you think we have to clean the tmp file on exit, then let's go with
> > your xen/allrandom.config.tmp approach as I would prefer to avoid the
> > "trap" command to keep the sources simpler.
> 
> So, is that an Ack on my original patch?

Yes


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Date: Tue, 15 Apr 2025 23:52:10 +0200
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To: xen-devel@lists.xenproject.org
From: Manuel Andreas 
Subject: Assert in x86_emulate_wrapper triggerable by HVM domain
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Dear all,

my fuzzing infrastructure discovered that an assert in 
x86_emulate_wrapper is able to be triggered by an HVM domain executing a 
specially crafted repeating movs instruction.

Specifically, if the emulation of the rep movs instruction triggers an 
exception (e.g. by accessing invalid memory after some amount of 
iterations), the emulation will be halted at that point.
However, the instruction manual requires that _some_ register state 
(namely the updated value of rcx) shall be commited, whereas the 
instruction pointer needs to be rolled back to point to the address of 
the instruction itself. The assert checks for the latter. Problematic is 
the fact that for these type of repeating instructions, Xen seems to 
eventually just commit all register state when it encounters an exception:

    557  #define put_rep_prefix(reps_completed) 
({                               \
    558      if ( rep_prefix() 
)                                                 \
    559 { \
    560          __put_rep_prefix(&_regs, ctxt->regs, ad_bytes, 
reps_completed); \
    561          if ( unlikely(rc == X86EMUL_EXCEPTION) 
)                        \
    562              goto 
complete_insn;                                         \
    563 } \
    564  })

   8356   complete_insn: /* Commit shadow register state. */
   8357      put_fpu(fpu_type, false, state, ctxt, ops);
   8358      fpu_type = X86EMUL_FPU_none;
   8359
   8360      /* Zero the upper 32 bits of %rip if not in 64-bit mode. */
   8361      if ( !mode_64bit() )
   8362          _regs.r(ip) = (uint32_t)_regs.r(ip);
   8363
   8364      /* Should a singlestep #DB be raised? */
   8365      if ( rc == X86EMUL_OKAY && singlestep && !ctxt->retire.mov_ss )
   8366      {
   8367          ctxt->retire.singlestep = true;
   8368          ctxt->retire.sti = false;
   8369      }
   8370
   8371      if ( rc != X86EMUL_DONE )
   8372          *ctxt->regs = _regs; // <- Incorrect RIP is commited

I've attached an XTF test that should trigger the aforementioned assert 
on the latest release commit: 3ad5d648cda5add395f49fc3704b2552aae734f7

Best,
Manuel

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From xen-devel-bounces@lists.xenproject.org Wed Apr 16 00:48:43 2025
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Date: Tue, 15 Apr 2025 17:48:15 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Jason Andryuk 
cc: xen-devel@lists.xenproject.org, 
    Stefano Stabellini , Julien Grall , 
    Bertrand Marquis , 
    Michal Orzel , 
    Volodymyr Babchuk 
Subject: Re: [PATCH v4 2/7] xen/arm: dom0less hwdom construction
In-Reply-To: <20250407194038.83860-3-jason.andryuk@amd.com>
Message-ID: 
References: <20250407194038.83860-1-jason.andryuk@amd.com> <20250407194038.83860-3-jason.andryuk@amd.com>
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On Mon, 7 Apr 2025, Jason Andryuk wrote:
> When creating a hardware domain, have the dom0less code call
> construct_hwdom() which is shared with the dom0 code.  The hardware
> domain requires building that best matches the dom0 build path.  Re-use
> it to keep them in sync.
> 
> The device tree node of the dom0less config is now passed into
> construct_hwdom().  dom0 uses /chosen for process_shm while a hwdom will
> use the value from its dom0less device tree node.
> 
> Signed-off-by: Jason Andryuk 

Reviewed-by: Stefano Stabellini 


> ---
> v3:
> Rebase on process_shm_chosen() removal
> ---
>  xen/arch/arm/dom0less-build.c           | 57 ++++++++++++++-----------
>  xen/arch/arm/domain_build.c             |  7 +--
>  xen/arch/arm/include/asm/domain_build.h |  3 +-
>  3 files changed, 39 insertions(+), 28 deletions(-)
> 
> diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c
> index bd15563750..7bc6a6c4d7 100644
> --- a/xen/arch/arm/dom0less-build.c
> +++ b/xen/arch/arm/dom0less-build.c
> @@ -929,36 +929,45 @@ static int __init construct_domU(struct domain *d,
>      /* type must be set before allocate memory */
>      d->arch.type = kinfo.type;
>  #endif
> -    if ( !dt_find_property(node, "xen,static-mem", NULL) )
> -        allocate_memory(d, &kinfo);
> -    else if ( !is_domain_direct_mapped(d) )
> -        allocate_static_memory(d, &kinfo, node);
> -    else
> -        assign_static_memory_11(d, &kinfo, node);
> -
> -    rc = process_shm(d, &kinfo, node);
> -    if ( rc < 0 )
> -        return rc;
> -
> -    /*
> -     * Base address and irq number are needed when creating vpl011 device
> -     * tree node in prepare_dtb_domU, so initialization on related variables
> -     * shall be done first.
> -     */
> -    if ( kinfo.vpl011 )
> +    if ( is_hardware_domain(d) )
>      {
> -        rc = domain_vpl011_init(d, NULL);
> +        rc = construct_hwdom(&kinfo, node);
>          if ( rc < 0 )
>              return rc;
>      }
> +    else
> +    {
> +        if ( !dt_find_property(node, "xen,static-mem", NULL) )
> +            allocate_memory(d, &kinfo);
> +        else if ( !is_domain_direct_mapped(d) )
> +            allocate_static_memory(d, &kinfo, node);
> +        else
> +            assign_static_memory_11(d, &kinfo, node);
>  
> -    rc = prepare_dtb_domU(d, &kinfo);
> -    if ( rc < 0 )
> -        return rc;
> +        rc = process_shm(d, &kinfo, node);
> +        if ( rc < 0 )
> +            return rc;
>  
> -    rc = construct_domain(d, &kinfo);
> -    if ( rc < 0 )
> -        return rc;
> +        /*
> +         * Base address and irq number are needed when creating vpl011 device
> +         * tree node in prepare_dtb_domU, so initialization on related variables
> +         * shall be done first.
> +         */
> +        if ( kinfo.vpl011 )
> +        {
> +            rc = domain_vpl011_init(d, NULL);
> +            if ( rc < 0 )
> +                return rc;
> +        }
> +
> +        rc = prepare_dtb_domU(d, &kinfo);
> +        if ( rc < 0 )
> +            return rc;
> +
> +        rc = construct_domain(d, &kinfo);
> +        if ( rc < 0 )
> +            return rc;
> +    }
>  
>      domain_vcpu_affinity(d, node);
>  
> diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
> index b8f282ff10..0a329f9f5e 100644
> --- a/xen/arch/arm/domain_build.c
> +++ b/xen/arch/arm/domain_build.c
> @@ -2305,10 +2305,11 @@ static int __init construct_dom0(struct domain *d)
>      if ( rc < 0 )
>          return rc;
>  
> -    return construct_hwdom(&kinfo);
> +    return construct_hwdom(&kinfo, NULL);
>  }
>  
> -int __init construct_hwdom(struct kernel_info *kinfo)
> +int __init construct_hwdom(struct kernel_info *kinfo,
> +                           const struct dt_device_node *node)
>  {
>      struct domain *d = kinfo->d;
>      int rc;
> @@ -2327,7 +2328,7 @@ int __init construct_hwdom(struct kernel_info *kinfo)
>  
>      if ( acpi_disabled )
>      {
> -        rc = process_shm(d, kinfo, NULL);
> +        rc = process_shm(d, kinfo, node);
>          if ( rc < 0 )
>              return rc;
>      }
> diff --git a/xen/arch/arm/include/asm/domain_build.h b/xen/arch/arm/include/asm/domain_build.h
> index 134290853c..17619c875d 100644
> --- a/xen/arch/arm/include/asm/domain_build.h
> +++ b/xen/arch/arm/include/asm/domain_build.h
> @@ -13,7 +13,8 @@ bool allocate_bank_memory(struct kernel_info *kinfo, gfn_t sgfn,
>                            paddr_t tot_size);
>  void allocate_memory(struct domain *d, struct kernel_info *kinfo);
>  int construct_domain(struct domain *d, struct kernel_info *kinfo);
> -int construct_hwdom(struct kernel_info *kinfo);
> +int construct_hwdom(struct kernel_info *kinfo,
> +                    const struct dt_device_node *node);
>  int domain_fdt_begin_node(void *fdt, const char *name, uint64_t unit);
>  int make_chosen_node(const struct kernel_info *kinfo);
>  int make_cpus_node(const struct domain *d, void *fdt);
> -- 
> 2.49.0
> 


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Date: Tue, 15 Apr 2025 17:51:22 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Jason Andryuk 
cc: xen-devel@lists.xenproject.org, 
    Stefano Stabellini , Julien Grall , 
    Bertrand Marquis , 
    Michal Orzel , 
    Volodymyr Babchuk , 
    Andrew Cooper , 
    Anthony PERARD , 
    Jan Beulich , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
Subject: Re: [PATCH v4 4/7] xen/arm: dom0less seed xenstore grant table
 entry
In-Reply-To: <20250407194038.83860-5-jason.andryuk@amd.com>
Message-ID: 
References: <20250407194038.83860-1-jason.andryuk@amd.com> <20250407194038.83860-5-jason.andryuk@amd.com>
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On Mon, 7 Apr 2025, Jason Andryuk wrote:
> xenstored maps other domains' xenstore pages.  Currently this relies on
> init-dom0less or xl to seed the grants from Dom0.  With split
> hardware/control/xenstore domains, this is problematic since we don't
> want the hardware domain to be able to map other domains' resources
> without their permission.  Instead have the hypervisor seed the grant
> table entry for every dom0less domain.  The grant is then accessible as
> normal.
> 
> C xenstored uses grants, so it can map the xenstore pages from a
> non-dom0 xenstore domain.  OCaml xenstored uses foreign mappings, so it
> can only run from a privileged domain (dom0).
> 
> Add a define to indicate the late alloc xsentore PFN, to better indicate
> what is being checked.  Use UINT64_MAX instead of ~0ULL as the HVM_PARAM
> field is a uint64_t.  UINT64_MAX is not defined, so add it.
> 
> Signed-off-by: Jason Andryuk 

Reviewed-by: Stefano Stabellini 


> ---
> v4:
> ASSERT gfn against UINT32_MAX and use < to avoid INVALID_GFN on 32bit
> builds
> Stefano gave R-b, but holding off addition because of changes
> Use IS_ENABLED(CONFIG_GRANT_TABLE) instead of wrapper
> Add XENSTORE_PFN_LATE_ALLOC
> Add UINT64_MAX
> 
> v3:
> Expand commit message about C vs. OCaml xenstored.
> Remove __init and flags from gnttab_seed_entry()
> Change frame to uint32_t
> ASSERT gfn fits in a uint32_t
> Rebase on mem paging changes
> 
> v2:
> Tweak commit message
> Mark gnttab_seed_entry() __init and put inside CONFIG_DOM0LESS_BOOT
> Add ASSERT(!d->creation_finished) and ASSERT(gt->gt_version == 1);
> const struct domain & struct grant_table
> ---
>  xen/arch/arm/dom0less-build.c | 10 +++++++++-
>  xen/common/grant_table.c      | 14 ++++++++++++++
>  xen/include/xen/grant_table.h |  4 ++++
>  xen/include/xen/types.h       |  1 +
>  4 files changed, 28 insertions(+), 1 deletion(-)
> 
> diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c
> index bb8cc3be43..188ef40b52 100644
> --- a/xen/arch/arm/dom0less-build.c
> +++ b/xen/arch/arm/dom0less-build.c
> @@ -20,6 +20,8 @@
>  #include 
>  #include 
>  
> +#define XENSTORE_PFN_LATE_ALLOC UINT64_MAX
> +
>  static domid_t __initdata xs_domid = DOMID_INVALID;
>  static bool __initdata need_xenstore;
>  
> @@ -756,7 +758,7 @@ static int __init alloc_xenstore_params(struct kernel_info *kinfo)
>  
>      if ( (kinfo->dom0less_feature & (DOM0LESS_XENSTORE | DOM0LESS_XS_LEGACY))
>                                   == (DOM0LESS_XENSTORE | DOM0LESS_XS_LEGACY) )
> -        d->arch.hvm.params[HVM_PARAM_STORE_PFN] = ~0ULL;
> +        d->arch.hvm.params[HVM_PARAM_STORE_PFN] = XENSTORE_PFN_LATE_ALLOC;
>      else if ( kinfo->dom0less_feature & DOM0LESS_XENSTORE )
>      {
>          rc = alloc_xenstore_page(d);
> @@ -788,6 +790,12 @@ static void __init initialize_domU_xenstore(void)
>          rc = alloc_xenstore_evtchn(d);
>          if ( rc < 0 )
>              panic("%pd: Failed to allocate xenstore_evtchn\n", d);
> +
> +        if ( gfn != XENSTORE_PFN_LATE_ALLOC && IS_ENABLED(CONFIG_GRANT_TABLE) )
> +        {
> +            ASSERT(gfn < UINT32_MAX);
> +            gnttab_seed_entry(d, GNTTAB_RESERVED_XENSTORE, xs_domid, gfn);
> +        }
>      }
>  }
>  
> diff --git a/xen/common/grant_table.c b/xen/common/grant_table.c
> index 6c77867f8c..e75ff98aff 100644
> --- a/xen/common/grant_table.c
> +++ b/xen/common/grant_table.c
> @@ -4346,6 +4346,20 @@ static void gnttab_usage_print(struct domain *rd)
>          printk("no active grant table entries\n");
>  }
>  
> +#ifdef CONFIG_DOM0LESS_BOOT
> +void __init gnttab_seed_entry(const struct domain *d, unsigned int idx,
> +                              domid_t be_domid, uint32_t frame)
> +{
> +    const struct grant_table *gt = d->grant_table;
> +
> +    ASSERT(!d->creation_finished);
> +    ASSERT(gt->gt_version == 1);
> +    shared_entry_v1(gt, idx).flags = GTF_permit_access;
> +    shared_entry_v1(gt, idx).domid = be_domid;
> +    shared_entry_v1(gt, idx).frame = frame;
> +}
> +#endif
> +
>  static void cf_check gnttab_usage_print_all(unsigned char key)
>  {
>      struct domain *d;
> diff --git a/xen/include/xen/grant_table.h b/xen/include/xen/grant_table.h
> index 50edfecfb6..297d7669e9 100644
> --- a/xen/include/xen/grant_table.h
> +++ b/xen/include/xen/grant_table.h
> @@ -33,6 +33,10 @@
>  
>  struct grant_table;
>  
> +/* Seed a gnttab entry for Hyperlaunch/dom0less. */
> +void gnttab_seed_entry(const struct domain *d, unsigned int idx,
> +                       domid_t be_domid, uint32_t frame);
> +
>  #ifdef CONFIG_GRANT_TABLE
>  
>  extern unsigned int opt_gnttab_max_version;
> diff --git a/xen/include/xen/types.h b/xen/include/xen/types.h
> index e8d419b954..73ddccbbd5 100644
> --- a/xen/include/xen/types.h
> +++ b/xen/include/xen/types.h
> @@ -44,6 +44,7 @@ typedef __UINTPTR_TYPE__ uintptr_t;
>  #define UINT8_MAX       (255)
>  #define UINT16_MAX      (65535)
>  #define UINT32_MAX      (4294967295U)
> +#define UINT64_MAX      (18446744073709551615ULL)
>  
>  #define INT_MAX         ((int)(~0U>>1))
>  #define INT_MIN         (-INT_MAX - 1)
> -- 
> 2.49.0
> 


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Date: Tue, 15 Apr 2025 18:03:26 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Grygorii Strashko 
cc: "xen-devel@lists.xenproject.org" , 
    Stefano Stabellini 
Subject: Re: [ImageBuilder] uboot-script-gen: fix arm64 xen u-boot image
 generation
In-Reply-To: <20250414081223.1763630-1-grygorii_strashko@epam.com>
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On Mon, 14 Apr 2025, Grygorii Strashko wrote:
> From: Grygorii Strashko 
> 
> The current code in generate_uboot_images() does not detect arm64 properly
> and always generates ARM u-boot image. This causes Xen boot issues.
> 
> Fix it by searching for "ARM64" for AArch64 binary detection.
> 
> - mkimage -l xen.ub
> Before:
> Image Type:   ARM Linux Kernel Image (uncompressed)
> 
> After:
> Image Type:   AArch64 Linux Kernel Image (uncompressed)
> 
> Signed-off-by: Grygorii Strashko 
> ---
>  scripts/uboot-script-gen | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/scripts/uboot-script-gen b/scripts/uboot-script-gen
> index a9f698f00fd1..c4d26caf5e0e 100755
> --- a/scripts/uboot-script-gen
> +++ b/scripts/uboot-script-gen
> @@ -815,13 +815,13 @@ function linux_config()
>  
>  generate_uboot_images()
>  {
> -    local arch=$(file -L $XEN | grep "ARM")
> +    local arch=$(file -L $XEN | grep -o "ARM64")

My file -L gives:

for arm32: ARM OpenFirmware [...]
for arm64: Aarch64

So the ARM64 grep wouldn't work as intended. Is the version of `file'
that you are using really printing ARM64? If so, we can do:

  file -L $XEN | grep -E 'ARM64|Aarch64'


>      if test "$arch"
>      then
> -        arch=arm
> -    else
>          arch=arm64
> +    else
> +        arch=arm
>      fi
>  
>      mkimage -A $arch -T kernel -C none -a $memaddr -e $memaddr -d $XEN "$XEN".ub
> -- 
> 2.34.1
> 


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From: "Chen, Jiqian" 
To: =?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= 
CC: "xen-devel@lists.xenproject.org" , "Huang,
 Ray" , "Chen, Jiqian" 
Subject: Re: [PATCH v2 2/8] vpci/header: Emulate legacy capability list for
 host
Thread-Topic: [PATCH v2 2/8] vpci/header: Emulate legacy capability list for
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Date: Wed, 16 Apr 2025 02:51:18 +0000
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From: "Penny, Zheng" 
To: Jan Beulich , "xen-devel@lists.xenproject.org"
	
CC: "Stabellini, Stefano" 
Subject: RE: [PATCH v2 10/19] xen/sysctl: introduce CONFIG_PM_STATS
Thread-Topic: [PATCH v2 10/19] xen/sysctl: introduce CONFIG_PM_STATS
Thread-Index: AQHbnhN0GO5sSI+g2kqtQPzlgrAUG7OO0pKAgBbuLcA=
Date: Wed, 16 Apr 2025 03:54:23 +0000
Message-ID:
 
References: <20250326055053.3313146-1-Penny.Zheng@amd.com>
 <20250326055053.3313146-11-Penny.Zheng@amd.com>
 
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Date: Wed, 16 Apr 2025 05:05:07 +0000
To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, christopher.w.clark@gmail.com, dpsmith@apertussolutions.com, persaur@gmail.com, dmukhin@ford.com
Subject: [XTF PATCH v1 0/2] xtf: integrate argo test
Message-ID: <20250416050443.919751-1-dmukhin@ford.com>
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The patch series integrates an XTF argo test available at [1].

Patch 1 is the original test.
Patch 2 adds fixups to run the test under QEMU environment in gitlab CI.

[1] https://github.com/dozylynx/meta-argo/blob/master/recipes-extended/xen/=
xtf/0001-Add-Argo-test.patch

Christopher Clark (1):
  tests/argo: Add argo test suite

Denis Mukhin (1):
  tests/argo: fixup for recent xen

 docs/all-tests.dox      |   2 +
 include/xen/argo.h      | 259 +++++++++++++++++++++++++++++
 include/xtf/hypercall.h |   1 +
 include/xtf/numbers.h   |   5 +
 tests/argo/Makefile     |   9 +
 tests/argo/main.c       | 355 ++++++++++++++++++++++++++++++++++++++++
 6 files changed, 631 insertions(+)
 create mode 100644 include/xen/argo.h
 create mode 100644 tests/argo/Makefile
 create mode 100644 tests/argo/main.c

--=20
2.34.1




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Date: Wed, 16 Apr 2025 05:05:11 +0000
To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, christopher.w.clark@gmail.com, dpsmith@apertussolutions.com, persaur@gmail.com, dmukhin@ford.com, Christopher Clark 
Subject: [XTF PATCH v1 1/2] tests/argo: Add argo test suite
Message-ID: <20250416050443.919751-2-dmukhin@ford.com>
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From: Christopher Clark 

From: Christopher Clark 

Simple test cases for the four Argo operations, register, unregister,
sendv and notify exercised with a single test domain.
Add infrastructure to access Argo: a 5-argument hypercall, number 39.

Signed-off-by: Christopher Clark 
Signed-off-by: Denis Mukhin 
---
Original XTF argo test:
  https://github.com/dozylynx/meta-argo/blob/master/recipes-extended/xen/xt=
f/0001-Add-Argo-test.patch
---
 docs/all-tests.dox      |   2 +
 include/xen/argo.h      | 259 +++++++++++++++++++++++++++++
 include/xtf/hypercall.h |   1 +
 include/xtf/numbers.h   |   5 +
 tests/argo/Makefile     |   9 +
 tests/argo/main.c       | 353 ++++++++++++++++++++++++++++++++++++++++
 6 files changed, 629 insertions(+)
 create mode 100644 include/xen/argo.h
 create mode 100644 tests/argo/Makefile
 create mode 100644 tests/argo/main.c

diff --git a/docs/all-tests.dox b/docs/all-tests.dox
index 0a8b913..9bdeaa8 100644
--- a/docs/all-tests.dox
+++ b/docs/all-tests.dox
@@ -174,6 +174,8 @@ states.
=20
 @section index-utility Utilities
=20
+@subpage test-argo - Argo functionality test
+
 @subpage test-cpuid - Print CPUID information.
=20
 @subpage test-fep - Test availability of HVM Forced Emulation Prefix.
diff --git a/include/xen/argo.h b/include/xen/argo.h
new file mode 100644
index 0000000..5ae2def
--- /dev/null
+++ b/include/xen/argo.h
@@ -0,0 +1,259 @@
+/*************************************************************************=
*****
+ * Argo : Hypervisor-Mediated data eXchange
+ *
+ * Derived from v4v, the version 2 of v2v.
+ *
+ * Copyright (c) 2010, Citrix Systems
+ * Copyright (c) 2018-2019, BAE Systems
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a=
 copy
+ * of this software and associated documentation files (the "Software"), t=
o
+ * deal in the Software without restriction, including without limitation =
the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, an=
d/or
+ * sell copies of the Software, and to permit persons to whom the Software=
 is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included=
 in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS=
 OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY=
,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL=
 THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifndef __XEN_PUBLIC_ARGO_H__
+#define __XEN_PUBLIC_ARGO_H__
+
+#define XEN_ARGO_DOMID_ANY       DOMID_INVALID
+
+/* The maximum size of an Argo ring is defined to be: 16MB (0x1000000 byte=
s). */
+#define XEN_ARGO_MAX_RING_SIZE  (0x1000000ULL)
+
+/* Fixed-width type for "argo port" number. Nothing to do with evtchns. */
+typedef uint32_t xen_argo_port_t;
+
+/* gfn type: 64-bit fixed-width on all architectures */
+typedef uint64_t xen_argo_gfn_t;
+
+/*
+ * XEN_ARGO_MAXIOV : maximum number of iovs accepted in a single sendv.
+ * Caution is required if this value is increased: this determines the siz=
e of
+ * an array of xen_argo_iov_t structs on the hypervisor stack, so could ca=
use
+ * stack overflow if the value is too large.
+ * The Linux Argo driver never passes more than two iovs.
+*/
+#define XEN_ARGO_MAXIOV          8U
+
+typedef struct xen_argo_iov
+{
+    unsigned long iov_hnd;
+    uint32_t iov_len;
+    uint32_t pad;
+} xen_argo_iov_t;
+
+typedef struct xen_argo_addr
+{
+    xen_argo_port_t aport;
+    domid_t domain_id;
+    uint16_t pad;
+} xen_argo_addr_t;
+
+typedef struct xen_argo_send_addr
+{
+    struct xen_argo_addr src;
+    struct xen_argo_addr dst;
+} xen_argo_send_addr_t;
+
+typedef struct xen_argo_ring
+{
+    /* Guests should use atomic operations to access rx_ptr */
+    uint32_t rx_ptr;
+    /* Guests should use atomic operations to access tx_ptr */
+    uint32_t tx_ptr;
+    /*
+     * Header space reserved for later use. Align the start of the ring to=
 a
+     * multiple of the message slot size.
+     */
+    uint8_t reserved[56];
+    uint8_t ring[];
+} xen_argo_ring_t;
+
+typedef struct xen_argo_register_ring
+{
+    xen_argo_port_t aport;
+    domid_t partner_id;
+    uint16_t pad;
+    uint32_t len;
+} xen_argo_register_ring_t;
+
+typedef struct xen_argo_unregister_ring
+{
+    xen_argo_port_t aport;
+    domid_t partner_id;
+    uint16_t pad;
+} xen_argo_unregister_ring_t;
+
+/* Messages on the ring are padded to a multiple of this size. */
+#define XEN_ARGO_MSG_SLOT_SIZE 0x10
+
+/*
+ * Notify flags
+ */
+/* Ring exists */
+#define XEN_ARGO_RING_EXISTS            (1U << 0)
+/* Ring is shared, not unicast */
+#define XEN_ARGO_RING_SHARED            (1U << 1)
+/* Ring is empty */
+#define XEN_ARGO_RING_EMPTY             (1U << 2)
+/* Sufficient space to queue space_required bytes might exist */
+#define XEN_ARGO_RING_SUFFICIENT        (1U << 3)
+/* Insufficient ring size for space_required bytes */
+#define XEN_ARGO_RING_EMSGSIZE          (1U << 4)
+/* Too many domains waiting for available space signals for this ring */
+#define XEN_ARGO_RING_EBUSY             (1U << 5)
+
+typedef struct xen_argo_ring_data_ent
+{
+    struct xen_argo_addr ring;
+    uint16_t flags;
+    uint16_t pad;
+    uint32_t space_required;
+    uint32_t max_message_size;
+} xen_argo_ring_data_ent_t;
+
+typedef struct xen_argo_ring_data
+{
+    uint32_t nent;
+    uint32_t pad;
+
+    /*
+     * The Xen headers have:
+     *   struct xen_argo_ring_data_ent data[];
+     * here.  It's useful for the hypervisor side of the interface, but re=
ally
+     * not for the client side.
+     */
+} xen_argo_ring_data_t;
+
+struct xen_argo_ring_message_header
+{
+    uint32_t len;
+    struct xen_argo_addr source;
+    uint32_t message_type;
+    uint8_t data[];
+};
+
+/*
+ * Hypercall operations
+ */
+
+/*
+ * XEN_ARGO_OP_register_ring
+ *
+ * Register a ring using the guest-supplied memory pages.
+ * Also used to reregister an existing ring (eg. after resume from hiberna=
te).
+ *
+ * The first argument struct indicates the port number for the ring to reg=
ister
+ * and the partner domain, if any, that is to be allowed to send to the ri=
ng.
+ * A wildcard (XEN_ARGO_DOMID_ANY) may be supplied instead of a partner do=
mid,
+ * and if the hypervisor has wildcard sender rings enabled, this will allo=
w
+ * any domain (XSM notwithstanding) to send to the ring.
+ *
+ * The second argument is an array of guest frame numbers and the third ar=
gument
+ * indicates the size of the array. This operation only supports 4K-sized =
pages.
+ *
+ * arg1: XEN_GUEST_HANDLE(xen_argo_register_ring_t)
+ * arg2: XEN_GUEST_HANDLE(xen_argo_gfn_t)
+ * arg3: unsigned long npages
+ * arg4: unsigned long flags (32-bit value)
+ */
+#define XEN_ARGO_OP_register_ring     1
+
+/* Register op flags */
+/*
+ * Fail exist:
+ * If set, reject attempts to (re)register an existing established ring.
+ * If clear, reregistration occurs if the ring exists, with the new ring
+ * taking the place of the old, preserving tx_ptr if it remains valid.
+ */
+#define XEN_ARGO_REGISTER_FLAG_FAIL_EXIST  0x1
+
+#ifdef __XEN__
+/* Mask for all defined flags. */
+#define XEN_ARGO_REGISTER_FLAG_MASK XEN_ARGO_REGISTER_FLAG_FAIL_EXIST
+#endif
+
+/*
+ * XEN_ARGO_OP_unregister_ring
+ *
+ * Unregister a previously-registered ring, ending communication.
+ *
+ * arg1: XEN_GUEST_HANDLE(xen_argo_unregister_ring_t)
+ * arg2: NULL
+ * arg3: 0 (ZERO)
+ * arg4: 0 (ZERO)
+ */
+#define XEN_ARGO_OP_unregister_ring     2
+
+/*
+ * XEN_ARGO_OP_sendv
+ *
+ * Send a list of buffers contained in iovs.
+ *
+ * The send address struct specifies the source and destination addresses
+ * for the message being sent, which are used to find the destination ring=
:
+ * Xen first looks for a most-specific match with a registered ring with
+ *  (id.addr =3D=3D dst) and (id.partner =3D=3D sending_domain) ;
+ * if that fails, it then looks for a wildcard match (aka multicast receiv=
er)
+ * where (id.addr =3D=3D dst) and (id.partner =3D=3D DOMID_ANY).
+ *
+ * For each iov entry, send iov_len bytes from iov_base to the destination=
 ring.
+ * If insufficient space exists in the destination ring, it will return -E=
AGAIN
+ * and Xen will notify the caller when sufficient space becomes available.
+ *
+ * The message type is a 32-bit data field available to communicate messag=
e
+ * context data (eg. kernel-to-kernel, rather than application layer).
+ *
+ * arg1: XEN_GUEST_HANDLE(xen_argo_send_addr_t) source and dest addresses
+ * arg2: XEN_GUEST_HANDLE(xen_argo_iov_t) iovs
+ * arg3: unsigned long niov
+ * arg4: unsigned long message type (32-bit value)
+ */
+#define XEN_ARGO_OP_sendv               3
+
+/*
+ * XEN_ARGO_OP_notify
+ *
+ * Asks Xen for information about other rings in the system.
+ *
+ * ent->ring is the xen_argo_addr_t of the ring you want information on.
+ * Uses the same ring matching rules as XEN_ARGO_OP_sendv.
+ *
+ * ent->space_required : if this field is not null then Xen will check
+ * that there is space in the destination ring for this many bytes of payl=
oad.
+ * If the ring is too small for the requested space_required, it will set =
the
+ * XEN_ARGO_RING_EMSGSIZE flag on return.
+ * If sufficient space is available, it will set XEN_ARGO_RING_SUFFICIENT
+ * and CANCEL any pending notification for that ent->ring; otherwise it
+ * will schedule a notification event and the flag will not be set.
+ *
+ * These flags are set by Xen when notify replies:
+ * XEN_ARGO_RING_EXISTS     ring exists
+ * XEN_ARGO_RING_SHARED     ring is registered for wildcard partner
+ * XEN_ARGO_RING_EMPTY      ring is empty
+ * XEN_ARGO_RING_SUFFICIENT sufficient space for space_required is there
+ * XEN_ARGO_RING_EMSGSIZE   space_required is too large for the ring size
+ * XEN_ARGO_RING_EBUSY      too many domains waiting for available space s=
ignals
+ *
+ * arg1: XEN_GUEST_HANDLE(xen_argo_ring_data_t) ring_data (may be NULL)
+ * arg2: NULL
+ * arg3: 0 (ZERO)
+ * arg4: 0 (ZERO)
+ */
+#define XEN_ARGO_OP_notify              4
+
+#endif
diff --git a/include/xtf/hypercall.h b/include/xtf/hypercall.h
index 0d33807..17975ba 100644
--- a/include/xtf/hypercall.h
+++ b/include/xtf/hypercall.h
@@ -33,6 +33,7 @@
 extern uint8_t hypercall_page[PAGE_SIZE];
=20
 /* All Xen ABI for includers convenience .*/
+#include 
 #include 
 #include 
 #include 
diff --git a/include/xtf/numbers.h b/include/xtf/numbers.h
index f5c73b7..b0b2c1b 100644
--- a/include/xtf/numbers.h
+++ b/include/xtf/numbers.h
@@ -52,6 +52,11 @@
  */
 #define _u(v) ((unsigned long)(v))
=20
+/**
+ * Round up a number to the next integer
+ */
+#define roundup(x, y) ((((x) + ((y) - 1)) / (y)) * (y))
+
 #endif /* !__ASSEMBLY__ */
 #endif /* XTF_NUMBERS_H */
=20
diff --git a/tests/argo/Makefile b/tests/argo/Makefile
new file mode 100644
index 0000000..c6b3113
--- /dev/null
+++ b/tests/argo/Makefile
@@ -0,0 +1,9 @@
+include $(ROOT)/build/common.mk
+
+NAME      :=3D argo
+CATEGORY  :=3D in-development
+TEST-ENVS :=3D $(ALL_ENVIRONMENTS)
+
+obj-perenv +=3D main.o
+
+include $(ROOT)/build/gen.mk
diff --git a/tests/argo/main.c b/tests/argo/main.c
new file mode 100644
index 0000000..fa54aed
--- /dev/null
+++ b/tests/argo/main.c
@@ -0,0 +1,353 @@
+/**
+ * @file tests/argo/main.c
+ * @ref test-argo
+ *
+ * @page test-argo argo
+ *
+ * @todo Docs for test-argo
+ *
+ * @see tests/argo/main.c
+ */
+#include 
+
+const char test_title[] =3D "Argo hypercall test";
+
+/*
+ * The current Linux Argo driver has a default ring size of 32 4k pages,
+ * so follow that for the test ring size.
+ */
+static uint8_t ring_buffer[32 * PAGE_SIZE] __page_aligned_bss;
+#define TEST_RING_NPAGES (sizeof(ring_buffer) / PAGE_SIZE)
+
+static int probe_for_argo(domid_t own_domid)
+{
+    /* Attempt an Argo call to register a ring with invalid arguments */
+    xen_argo_register_ring_t reg =3D {
+        .aport      =3D 1,
+        .partner_id =3D own_domid,
+        .len        =3D 1, /* A 1-byte ring is never allowed */
+    };
+    int rc =3D hypercall_argo_op(XEN_ARGO_OP_register_ring, ®, NULL, 0,=
 0);
+
+    switch ( rc )
+    {
+    case -EINVAL: /* This is the response we are looking for */
+        return 0;
+
+        /* All below here are test exit conditions */
+    case -ENOSYS:
+        xtf_skip("Skip: Argo support has not been enabled in this hypervis=
or\n");
+        break;
+    case -EOPNOTSUPP:
+        xtf_skip("Skip: Argo is not enabled at runtime for this hypervisor=
\n");
+        break;
+    case -ENODEV:
+        xtf_skip("Skip: Argo is not enabled for this domain\n");
+        break;
+
+    case -EPERM:
+        xtf_failure("Fail: ring registration by this domain is not permitt=
ed\n");
+        break;
+    case 0:
+        xtf_failure("Fail: an invalid ring register op was not rejected\n"=
);
+        break;
+    default:
+        xtf_failure("Fail: unknown error %d for invalid ring registration\=
n", rc);
+        break;
+    }
+
+    return -1;
+}
+
+/* notify: asks Xen for information about rings */
+static int
+test_notify_for_one_ring(domid_t query_domid, xen_argo_port_t query_port,
+                         bool exists)
+{
+    struct {
+        xen_argo_ring_data_t data;
+        xen_argo_ring_data_ent_t ents[1];
+    } notify =3D {
+        .data =3D {
+            .nent =3D ARRAY_SIZE(notify.ents),
+        },
+        .ents =3D {
+            {
+                .ring =3D {
+                    .domain_id =3D query_domid,
+                    .aport     =3D query_port,
+                },
+            },
+        },
+    };
+    int rc =3D hypercall_argo_op(XEN_ARGO_OP_notify, ¬ify, NULL, 0, 0);
+
+    if ( rc )
+    {
+        xtf_failure("Fail: Unexpected error code %d in notify test\n", rc)=
;
+        return -1;
+    }
+
+    if ( !exists )
+    {
+        /* No currently-defined flags should be set for a non-existent rin=
g */
+        if ( notify.ents[0].flags )
+        {
+            xtf_failure("Fail: Non-existent ring reported as existing\n");
+            return -1;
+        }
+    }
+    else
+    {
+        if ( !(notify.ents[0].flags & XEN_ARGO_RING_EXISTS) )
+        {
+            xtf_failure("Fail: Ring not reported as existing\n");
+            return -1;
+        }
+    }
+
+    return 0;
+}
+
+/* See the Argo Linux device driver for similar use of these macros */
+#define XEN_ARGO_ROUNDUP(x) roundup((x), XEN_ARGO_MSG_SLOT_SIZE)
+#define ARGO_RING_OVERHEAD 80
+#define TEST_RING_SIZE(npages)                                      \
+    (XEN_ARGO_ROUNDUP((((PAGE_SIZE)*npages) - ARGO_RING_OVERHEAD)))
+
+static int
+test_register_ring(domid_t own_domid, xen_argo_port_t aport)
+{
+    unsigned int i;
+    xen_argo_register_ring_t reg =3D {
+        .aport      =3D aport,
+        .partner_id =3D own_domid,
+        .len        =3D TEST_RING_SIZE(TEST_RING_NPAGES),
+    };
+    xen_argo_gfn_t gfns[TEST_RING_NPAGES];
+
+    for ( i =3D 0; i < TEST_RING_NPAGES; i++ )
+        gfns[i] =3D virt_to_gfn(ring_buffer + (i * PAGE_SIZE));
+
+    int rc =3D hypercall_argo_op(XEN_ARGO_OP_register_ring, ®, &gfns,
+                               TEST_RING_NPAGES, XEN_ARGO_REGISTER_FLAG_FA=
IL_EXIST);
+    switch ( rc )
+    {
+    case 0:
+        return 0;
+
+    case -ENODEV:
+        xtf_failure("Fail: Argo is not enabled for this domain\n");
+        break;
+    case -EFAULT:
+        xtf_failure("Fail: Memory fault performing register ring test\n");
+        break;
+    default:
+        xtf_failure("Fail: Unexpected error code %d in register ring test\=
n", rc);
+        break;
+    }
+    return -1;
+}
+
+static int
+test_unregister_ring(domid_t partner_domid, xen_argo_port_t aport,
+                     bool exists)
+{
+    xen_argo_register_ring_t unreg =3D {
+        .aport      =3D aport,
+        .partner_id =3D partner_domid,
+    };
+    int rc =3D hypercall_argo_op(XEN_ARGO_OP_unregister_ring, &unreg, NULL=
, 0, 0);
+
+    switch ( rc )
+    {
+    case 0:
+        if ( exists )
+            return 0;
+        xtf_failure("Fail: unexpected success unregistering non-existent r=
ing\n");
+        return -1;
+
+    case -ENOENT:
+        if ( !exists )
+            return 0;
+        xtf_failure("Fail: unexpected ring not found when unregistering \n=
");
+        return -1;
+
+    default:
+        xtf_failure("Fail: Unexpected error code %d in unregister ring tes=
t\n", rc);
+        break;
+    }
+    return -1;
+}
+
+static int
+test_sendv(domid_t src_domid, xen_argo_port_t src_aport,
+           domid_t dst_domid, xen_argo_port_t dst_aport,
+           const char *msg_text, size_t msg_len, unsigned int msg_type)
+{
+    xen_argo_send_addr_t send_addr =3D {
+        .src =3D {
+            .domain_id =3D src_domid,
+            .aport     =3D src_aport,
+        },
+        .dst =3D {
+            .domain_id =3D dst_domid,
+            .aport     =3D dst_aport,
+        },
+    };
+    xen_argo_iov_t iovs[] =3D {
+        {
+            .iov_hnd =3D _u(msg_text),
+            .iov_len =3D msg_len,
+        },
+    };
+    int rc =3D hypercall_argo_op(XEN_ARGO_OP_sendv, &send_addr,
+                               iovs, ARRAY_SIZE(iovs), msg_type);
+
+    if ( rc < 0 )
+    {
+        xtf_failure("Fail: Unexpected error code %d in sendv test\n", rc);
+        return -1;
+    }
+
+    if ( (size_t)rc !=3D msg_len )
+    {
+        xtf_failure("Fail: Unexpected message size %d written in sendv tes=
t\n", rc);
+        return -1;
+    }
+
+    return 0;
+}
+
+static int
+inspect_ring_after_first_single_sendv(domid_t src_domid,
+                                      xen_argo_port_t src_aport,
+                                      const char *sent_msg,
+                                      unsigned int sent_msg_len,
+                                      unsigned int sent_msg_type)
+{
+    int rc =3D 0;
+    xen_argo_ring_t *ringp =3D (xen_argo_ring_t *)ring_buffer;
+    struct xen_argo_ring_message_header *msg_hdr;
+    unsigned int sent_length;
+
+    if ( ringp->rx_ptr !=3D 0 )
+    {
+        xtf_failure("Fail: receive pointer non-zero after sendv: %u\n",
+                    ringp->rx_ptr);
+        rc =3D -1;
+    }
+
+    if ( ringp->tx_ptr !=3D XEN_ARGO_ROUNDUP(
+             sizeof(struct xen_argo_ring_message_header) + sent_msg_len) )
+    {
+        xtf_failure("Fail: transmit pointer incorrect after sendv: %u\n",
+                    ringp->rx_ptr);
+        rc =3D -1;
+    }
+
+    msg_hdr =3D (struct xen_argo_ring_message_header *)&(ringp->ring);
+
+    if ( msg_hdr->source.domain_id !=3D src_domid )
+    {
+        xtf_failure("Fail: source domain id incorrect: %u, expected %u\n",
+                    msg_hdr->source.domain_id, src_domid);
+        rc =3D -1;
+    }
+
+    if ( msg_hdr->source.aport !=3D src_aport )
+    {
+        xtf_failure("Fail: source domain port incorrect: %u, expected %u\n=
",
+                    msg_hdr->source.domain_id, src_aport);
+        rc =3D -1;
+    }
+
+    if ( msg_hdr->source.pad !=3D 0 )
+    {
+        xtf_failure("Fail: source padding incorrect: %u, expected zero\n",
+                    msg_hdr->source.pad);
+        rc =3D -1;
+    }
+
+    if ( sent_msg_type !=3D msg_hdr->message_type )
+    {
+        xtf_failure("Fail: message type incorrect: %u sent, %u received\n"=
,
+                    sent_msg_type, msg_hdr->message_type);
+        rc =3D -1;
+    }
+
+    sent_length =3D sent_msg_len + sizeof(struct xen_argo_ring_message_hea=
der);
+    if ( sent_length !=3D msg_hdr->len )
+    {
+        xtf_failure("Fail: received message length incorrect: "
+                    "%u sent is %u with header added, %u received\n",
+                    sent_msg_len, sent_length, msg_hdr->len);
+        rc =3D -1;
+    }
+
+    if ( strncmp((const char *)msg_hdr->data, sent_msg, sent_msg_len) )
+    {
+        xtf_failure("Fail: sent message got mangled\n");
+        rc =3D -1;
+    }
+
+    return rc;
+}
+
+static void clear_test_ring(void)
+{
+    memset(ring_buffer, 0, sizeof(ring_buffer));
+}
+
+void test_main(void)
+{
+    int own_domid;
+    xen_argo_port_t test_aport =3D 1;
+    const char simple_text[] =3D "a simple thing to send\n";
+    const unsigned int msg_type =3D 0x12345678;
+
+    own_domid =3D xtf_get_domid();
+    if ( own_domid < 0 )
+        return xtf_error("Error: could not determine domid of the test dom=
ain\n");
+
+    /* First test validates for Argo availability to gate further testing =
*/
+    if ( probe_for_argo(own_domid) )
+        return;
+
+    if ( test_notify_for_one_ring(own_domid, test_aport, false) ||
+         test_unregister_ring(own_domid, test_aport, false) )
+        return;
+
+    clear_test_ring();
+
+    if ( test_register_ring(own_domid, test_aport) ||
+         test_notify_for_one_ring(own_domid, test_aport, true) ||
+         test_unregister_ring(own_domid, test_aport, true) ||
+         test_notify_for_one_ring(own_domid, test_aport, false) ||
+         test_unregister_ring(own_domid, test_aport, false) )
+        return;
+
+    clear_test_ring();
+
+    if ( test_register_ring(own_domid, test_aport) ||
+         test_sendv(own_domid, test_aport, own_domid, test_aport,
+                    simple_text, strlen(simple_text), msg_type) ||
+         inspect_ring_after_first_single_sendv(
+             own_domid, test_aport, simple_text, strlen(simple_text), msg_=
type) ||
+         test_notify_for_one_ring(own_domid, test_aport, true) ||
+         test_unregister_ring(own_domid, test_aport, true) ||
+         test_unregister_ring(own_domid, test_aport, false) )
+        return;
+
+    xtf_success(NULL);
+}
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * tab-width: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
--=20
2.34.1




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To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, christopher.w.clark@gmail.com, dpsmith@apertussolutions.com, persaur@gmail.com, dmukhin@ford.com
Subject: [XTF PATCH v1 2/2] tests/argo: fixup for recent xen
Message-ID: <20250416050443.919751-3-dmukhin@ford.com>
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From: Denis Mukhin 

Add fixup for own_domid under CONFIG_HAS_XENSTORE to make XTF argo test
can pass under x86 QEMU.

Signed-off-by: Denis Mukhin 
---
Successful argo XTF run:
  https://gitlab.com/xen-project/people/dmukhin/xen/-/jobs/9733329882
---
 tests/argo/main.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/tests/argo/main.c b/tests/argo/main.c
index fa54aed..1e6b92f 100644
--- a/tests/argo/main.c
+++ b/tests/argo/main.c
@@ -301,14 +301,16 @@ static void clear_test_ring(void)
=20
 void test_main(void)
 {
-    int own_domid;
+    int own_domid =3D 0;
     xen_argo_port_t test_aport =3D 1;
     const char simple_text[] =3D "a simple thing to send\n";
     const unsigned int msg_type =3D 0x12345678;
=20
+#if defined(CONFIG_HAS_XENSTORE)
     own_domid =3D xtf_get_domid();
     if ( own_domid < 0 )
         return xtf_error("Error: could not determine domid of the test dom=
ain\n");
+#endif
=20
     /* First test validates for Argo availability to gate further testing =
*/
     if ( probe_for_argo(own_domid) )
--=20
2.34.1




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Date: Wed, 16 Apr 2025 05:32:26 +0000
To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, cardoe@cardoe.com, marmarek@invisiblethingslab.com, sstabellini@kernel.org, dmukhin@ford.com
Subject: [PATCH v1 1/4] CI: unify x86 XTF test runner
Message-ID: <20250416053213.921444-2-dmukhin@ford.com>
In-Reply-To: <20250416053213.921444-1-dmukhin@ford.com>
References: <20250416053213.921444-1-dmukhin@ford.com>
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From: Denis Mukhin 

Add test runner script qemu-xtf.sh which is allows any XTF x86 test to be
easily executed. Test runner is invoked from the qemu-smoke* jobs with the
hardcoded parameters.

Each x86 XTF job lead time is reduced a bit since only the test-related cod=
e
is built, not the entire XTF project.

Add .gitignore to avoid committing test artifacts by mistake.

Signed-off-by: Denis Mukhin 
---
 automation/gitlab-ci/test.yaml                |   8 +-
 automation/scripts/.gitignore                 |   6 +
 .../scripts/include/configs/xtf-x86-64-config |   0
 automation/scripts/include/xtf-runner         | 134 ++++++++++++++++++
 automation/scripts/include/xtf-x86-64         |  31 ++++
 automation/scripts/qemu-smoke-x86-64.sh       |  26 ----
 automation/scripts/qemu-xtf.sh                |  26 ++++
 7 files changed, 201 insertions(+), 30 deletions(-)
 create mode 100644 automation/scripts/.gitignore
 create mode 100644 automation/scripts/include/configs/xtf-x86-64-config
 create mode 100644 automation/scripts/include/xtf-runner
 create mode 100644 automation/scripts/include/xtf-x86-64
 delete mode 100755 automation/scripts/qemu-smoke-x86-64.sh
 create mode 100755 automation/scripts/qemu-xtf.sh

diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yam=
l
index 5ce445b78f..3adc841335 100644
--- a/automation/gitlab-ci/test.yaml
+++ b/automation/gitlab-ci/test.yaml
@@ -659,28 +659,28 @@ qemu-alpine-x86_64-gcc:
 qemu-smoke-x86-64-gcc:
   extends: .qemu-smoke-x86-64
   script:
-    - ./automation/scripts/qemu-smoke-x86-64.sh pv 2>&1 | tee ${LOGFILE}
+    - ./automation/scripts/qemu-xtf.sh x86-64 pv64 example 2>&1 | tee ${LO=
GFILE}
   needs:
     - debian-12-x86_64-gcc-debug
=20
 qemu-smoke-x86-64-clang:
   extends: .qemu-smoke-x86-64
   script:
-    - ./automation/scripts/qemu-smoke-x86-64.sh pv 2>&1 | tee ${LOGFILE}
+    - ./automation/scripts/qemu-xtf.sh x86-64 pv64 example 2>&1 | tee ${LO=
GFILE}
   needs:
     - debian-12-x86_64-clang-debug
=20
 qemu-smoke-x86-64-gcc-pvh:
   extends: .qemu-smoke-x86-64
   script:
-    - ./automation/scripts/qemu-smoke-x86-64.sh pvh 2>&1 | tee ${LOGFILE}
+    - ./automation/scripts/qemu-xtf.sh x86-64 hvm64 example 2>&1 | tee ${L=
OGFILE}
   needs:
     - debian-12-x86_64-gcc-debug
=20
 qemu-smoke-x86-64-clang-pvh:
   extends: .qemu-smoke-x86-64
   script:
-    - ./automation/scripts/qemu-smoke-x86-64.sh pvh 2>&1 | tee ${LOGFILE}
+    - ./automation/scripts/qemu-xtf.sh x86-64 hvm64 example 2>&1 | tee ${L=
OGFILE}
   needs:
     - debian-12-x86_64-clang-debug
=20
diff --git a/automation/scripts/.gitignore b/automation/scripts/.gitignore
new file mode 100644
index 0000000000..2f2d6e1ebd
--- /dev/null
+++ b/automation/scripts/.gitignore
@@ -0,0 +1,6 @@
+!include
+
+binaries
+smoke.serial
+xen
+xtf*/
diff --git a/automation/scripts/include/configs/xtf-x86-64-config b/automat=
ion/scripts/include/configs/xtf-x86-64-config
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/automation/scripts/include/xtf-runner b/automation/scripts/inc=
lude/xtf-runner
new file mode 100644
index 0000000000..55b7b34b89
--- /dev/null
+++ b/automation/scripts/include/xtf-runner
@@ -0,0 +1,134 @@
+#!/bin/bash
+#
+# XTF test utilities.
+#
+# Environment variables:
+#   BOOT_MSG: Expected boot message
+#   FW_PREFIX: Firmware images path including '/' at the end
+#   PASSED: XTF test printout in case of a pass
+#   QEMU_PREFIX: QEMU path including '/' at the end
+#   TEST_LOG: Output log file
+#   UBOOT_CMD: U-Boot command line
+#   WORKDIR: Test working directory
+#   XEN_BINARY: Xen binary location
+#   XEN_CONSOLE: Xen console device name
+#   XTF_SRC_CONFIG: XTF config file
+#   XTF_SRC_BRANCH: XTF branch
+#   XTF_SRC_URI: XTF source code URI
+
+function die()
+{
+    set +x
+    echo "FATAL: $*" >&2
+    exit 1
+}
+
+[ -z "$TOP" ] && die "\$TOP is not set"
+
+# Output log file
+TEST_LOG=3D"${TEST_LOG:-smoke.serial}"
+# XTF test printout in case of a pass
+PASSED=3D"${PASSED:-Test result: SUCCESS}"
+# Expected boot message
+BOOT_MSG=3D"${BOOT_MSG:-Latest ChangeSet: }"
+# Test working directory
+WORKDIR=3D"${WORKDIR:-binaries}"
+# XTF source code
+XTF_SRC_CONFIG=3D"${XTF_CONFIG:-${TOP}/include/configs/xtf-${ARCH}-config}=
"
+
+# Build an XTF test binary.
+# $1 Test variant.
+# $2 Test name.
+function xtf_build_binary()
+{
+    local xtf_variant=3D$1
+    local xtf_name=3D$2
+    local xtf_dir=3D"xtf-${ARCH}"
+
+    # Crude check for local testing
+    if [ ! -d ${xtf_dir}/.git ]; then
+        git clone ${XTF_SRC_URI} ${xtf_dir} -b ${XTF_SRC_BRANCH}
+    fi
+
+    make \
+        -C ${xtf_dir} \
+        -j$(nproc) \
+        $(tr '\n' ' ' < ${XTF_SRC_CONFIG}) \
+        TESTS=3Dtests/${xtf_name}
+
+    export XTF_NAME=3D"${xtf_name}"
+    export XTF_VARIANT=3D"${xtf_variant}"
+    export XTF_WORKDIR=3D"$(readlink -f ${xtf_dir})"
+    export XTF_BINARY=3D"${XTF_WORKDIR}/tests/${xtf_name}/test-${xtf_varia=
nt}-${xtf_name}"
+}
+
+# Build Xen command line for running an XTF test.
+# $1 Test variant.
+# $2 Test name.
+function xtf_build_cmdline()
+{
+    local xtf_variant=3D$1
+    local xtf_name=3D$2
+    declare -a cmdline=3D()
+
+    cmdline+=3D("loglvl=3Dall noreboot console_timestamps=3Dboot")
+    cmdline+=3D("console=3D${XEN_CONSOLE}")
+
+    # NB: OK to have hvm64, which is x86-only variant
+    if [[ $xtf_variant =3D=3D "hvm64" ]]; then
+        cmdline+=3D("dom0-iommu=3Dnone dom0=3Dpvh")
+    fi
+
+    export XEN_CMDLINE=3D"${cmdline[@]}"
+}
+
+# Build an XTF test environment.
+# $1 Test variant.
+# $2 Test name.
+function xtf_build_test()
+{
+    local v=3D$1
+    local xtf_name=3D$2
+    local xtf_variant=3D""
+
+    for x in ${XTF_SRC_VARIANTS}; do
+        if [[ "${x}" =3D=3D "${v}" ]]; then
+            xtf_variant=3D${v}
+            break
+        fi
+    done
+    if [[ -z $xtf_variant ]]; then
+        die "unsupported test variant '$1', supported variants: ${XTF_SRC_=
VARIANTS}"
+    fi
+
+    xtf_build_binary ${xtf_variant} ${xtf_name}
+    xtf_build_cmdline ${xtf_variant} ${xtf_name}
+}
+
+# Execute an XTF test.
+function xtf_run_test()
+{
+    rm -f ${TEST_LOG}
+    export BOOT_MSG PASSED TEST_CMD TEST_LOG UBOOT_CMD
+    ${TOP}/console.exp | sed 's/\r\+$//'
+}
+
+# Setup environment and run an XTF test.
+# $1 Test variant.
+# $2 Test name.
+function xtf_test()
+{
+    # Out: FW_*, QEMU_*, XEN_{BINARY,CONSOLE}, XTF_SRC_*
+    xtf_arch_prepare
+
+    # In: XTF_SRC_*
+    # OUt: XTF_{BINARY,NAME,VARIANT,WORKDIR} and XEN_CMDLINE
+    xtf_build_test $@
+
+    # In: FW_*, QEMU_*, XTF_*, XEN_*
+    # Out: BOOT_MSG, PASSED, TEST_{CMD,LOG}, UBOOT_CMD
+    xtf_arch_setup
+
+    # In: BOOT_MSG, PASSED, TEST_{CMD,LOG}, UBOOT_CMD
+    xtf_run_test
+}
diff --git a/automation/scripts/include/xtf-x86-64 b/automation/scripts/inc=
lude/xtf-x86-64
new file mode 100644
index 0000000000..edddf18b38
--- /dev/null
+++ b/automation/scripts/include/xtf-x86-64
@@ -0,0 +1,31 @@
+#!/bin/bash
+#
+# XTF test utilities (x86_64).
+#
+
+# Arch-specific environment overrides.
+function xtf_arch_prepare()
+{
+    export FW_PREFIX=3D"${FW_PREFIX:-}"
+    export QEMU_PREFIX=3D"${QEMU_PREFIX:-}"
+    export XEN_BINARY=3D"${XEN_BINARY:-${WORKDIR}/xen}"
+    export XEN_CONSOLE=3D"${XEN_CONSOLE:-com1}"
+    export XTF_SRC_BRANCH=3D"${XTF_SRC_BRANCH:-master}"
+    export XTF_SRC_URI=3D"${XTF_SRC_URI:-https://xenbits.xen.org/git-http/=
xtf.git}"
+    export XTF_SRC_VARIANTS=3D"hvm64 pv64"
+}
+
+# Perform arch-specific XTF environment setup.
+function xtf_arch_setup()
+{
+    export TEST_CMD=3D"${QEMU_PREFIX}qemu-system-x86_64 \
+        -no-reboot \
+        -nographic \
+        -monitor none \
+        -serial stdio \
+        -m 512 \
+        -kernel ${XEN_BINARY} \
+        -initrd ${XTF_BINARY} \
+        -append \"${XEN_CMDLINE}\" \
+    "
+}
diff --git a/automation/scripts/qemu-smoke-x86-64.sh b/automation/scripts/q=
emu-smoke-x86-64.sh
deleted file mode 100755
index da0c26cc2f..0000000000
--- a/automation/scripts/qemu-smoke-x86-64.sh
+++ /dev/null
@@ -1,26 +0,0 @@
-#!/bin/bash
-
-set -ex -o pipefail
-
-# variant should be either pv or pvh
-variant=3D$1
-
-# Clone and build XTF
-git clone https://xenbits.xen.org/git-http/xtf.git
-cd xtf && make -j$(nproc) && cd -
-
-case $variant in
-    pvh) k=3Dtest-hvm64-example    extra=3D"dom0-iommu=3Dnone dom0=3Dpvh" =
;;
-    *)   k=3Dtest-pv64-example     extra=3D ;;
-esac
-
-rm -f smoke.serial
-export TEST_CMD=3D"qemu-system-x86_64 -nographic -kernel binaries/xen \
-        -initrd xtf/tests/example/$k \
-        -append \"loglvl=3Dall console=3Dcom1 noreboot console_timestamps=
=3Dboot $extra\" \
-        -m 512 -monitor none -serial stdio"
-
-export TEST_LOG=3D"smoke.serial"
-export PASSED=3D"Test result: SUCCESS"
-
-./automation/scripts/console.exp | sed 's/\r\+$//'
diff --git a/automation/scripts/qemu-xtf.sh b/automation/scripts/qemu-xtf.s=
h
new file mode 100755
index 0000000000..2e16d4aece
--- /dev/null
+++ b/automation/scripts/qemu-xtf.sh
@@ -0,0 +1,26 @@
+#!/bin/bash
+#
+# XTF test runner (QEMU).
+#
+
+set -e -o pipefail
+
+if [ $# -lt 3 ]; then
+    echo "Usage: $(basename $0) ARCH XTF-VARIANT XTF-NAME"
+    exit 1
+fi
+
+export ARCH=3D"$1"
+shift
+
+export TOP=3D"$(cd "$(dirname "${BASH_SOURCE[0]}")" &>/dev/null && pwd)"
+if [ ! -f "${TOP}/include/xtf-${ARCH}" ]; then
+    echo "unsupported architecture '${ARCH}'" >&2
+    exit 1
+fi
+
+set -x
+source ${TOP}/include/xtf-runner
+source ${TOP}/include/xtf-${ARCH}
+
+xtf_test $@
--=20
2.34.1




From xen-devel-bounces@lists.xenproject.org Wed Apr 16 05:32:34 2025
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Date: Wed, 16 Apr 2025 05:32:19 +0000
To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, cardoe@cardoe.com, marmarek@invisiblethingslab.com, sstabellini@kernel.org, dmukhin@ford.com
Subject: [PATCH v1 0/4] CI: updates to XTF CI runners
Message-ID: <20250416053213.921444-1-dmukhin@ford.com>
Feedback-ID: 123220910:user:proton
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The series started from adding new argo XTF CI job and ended up with updati=
ng
all XTF runners and related CI jobs.

It unifies the XTF runner scripts so that it is possible to use one script =
for
executing any XTF test under QEMU. That simplifies running XTFs locally and=
 in
CI.

Patch 1 reworks x86 XTF runner.
Patch 2 reworks x86 EFI XTF.
Patch 3 reworks Arm64 XTF runner.
Patch 4 adds new argo x86 XTF CI job.

CI run: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines/17704=
37024

Denis Mukhin (4):
  CI: unify x86 XTF test runner
  CI: switch x86 EFI smoke test runner to qemu-xtf.sh
  CI: switch arm64 XTF test runner to qemu-xtf.sh
  CI: add argo x86 XTF test

 automation/gitlab-ci/test.yaml                |  23 ++-
 automation/scripts/.gitignore                 |   9 ++
 .../scripts/include/configs/xtf-arm64-config  |   2 +
 .../scripts/include/configs/xtf-x86-64-config |   0
 .../include/configs/xtf-x86-64-efi-config     |   0
 automation/scripts/include/xtf-arm64          |  81 ++++++++++
 automation/scripts/include/xtf-runner         | 141 ++++++++++++++++++
 automation/scripts/include/xtf-x86-64         |  31 ++++
 automation/scripts/include/xtf-x86-64-efi     |  52 +++++++
 automation/scripts/qemu-smoke-x86-64-efi.sh   |  43 ------
 automation/scripts/qemu-smoke-x86-64.sh       |  26 ----
 automation/scripts/qemu-xtf-dom0less-arm64.sh |  68 ---------
 automation/scripts/qemu-xtf.sh                |  26 ++++
 13 files changed, 358 insertions(+), 144 deletions(-)
 create mode 100644 automation/scripts/.gitignore
 create mode 100644 automation/scripts/include/configs/xtf-arm64-config
 create mode 100644 automation/scripts/include/configs/xtf-x86-64-config
 create mode 100644 automation/scripts/include/configs/xtf-x86-64-efi-confi=
g
 create mode 100644 automation/scripts/include/xtf-arm64
 create mode 100644 automation/scripts/include/xtf-runner
 create mode 100644 automation/scripts/include/xtf-x86-64
 create mode 100644 automation/scripts/include/xtf-x86-64-efi
 delete mode 100755 automation/scripts/qemu-smoke-x86-64-efi.sh
 delete mode 100755 automation/scripts/qemu-smoke-x86-64.sh
 delete mode 100755 automation/scripts/qemu-xtf-dom0less-arm64.sh
 create mode 100755 automation/scripts/qemu-xtf.sh

--=20
2.34.1




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Date: Wed, 16 Apr 2025 05:32:31 +0000
To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, cardoe@cardoe.com, marmarek@invisiblethingslab.com, sstabellini@kernel.org, dmukhin@ford.com
Subject: [PATCH v1 2/4] CI: switch x86 EFI smoke test runner to qemu-xtf.sh
Message-ID: <20250416053213.921444-3-dmukhin@ford.com>
In-Reply-To: <20250416053213.921444-1-dmukhin@ford.com>
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From: Denis Mukhin 

Use qemu-xtf.sh for qemu-smoke-x86-64-gcc-efi job.

Lead time is reduced a bit since not all XTF code base is built, just the
required test.

Signed-off-by: Denis Mukhin 
---
 automation/gitlab-ci/test.yaml                |  2 +-
 .../include/configs/xtf-x86-64-efi-config     |  0
 automation/scripts/include/xtf-x86-64-efi     | 52 +++++++++++++++++++
 automation/scripts/qemu-smoke-x86-64-efi.sh   | 43 ---------------
 4 files changed, 53 insertions(+), 44 deletions(-)
 create mode 100644 automation/scripts/include/configs/xtf-x86-64-efi-confi=
g
 create mode 100644 automation/scripts/include/xtf-x86-64-efi
 delete mode 100755 automation/scripts/qemu-smoke-x86-64-efi.sh

diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yam=
l
index 3adc841335..ca1e4eb528 100644
--- a/automation/gitlab-ci/test.yaml
+++ b/automation/gitlab-ci/test.yaml
@@ -687,7 +687,7 @@ qemu-smoke-x86-64-clang-pvh:
 qemu-smoke-x86-64-gcc-efi:
   extends: .qemu-smoke-x86-64
   script:
-    - ./automation/scripts/qemu-smoke-x86-64-efi.sh pv 2>&1 | tee ${LOGFIL=
E}
+    - ./automation/scripts/qemu-xtf.sh x86-64-efi hvm64 example 2>&1 | tee=
 ${LOGFILE}
   needs:
     - debian-12-x86_64-gcc-debug
=20
diff --git a/automation/scripts/include/configs/xtf-x86-64-efi-config b/aut=
omation/scripts/include/configs/xtf-x86-64-efi-config
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/automation/scripts/include/xtf-x86-64-efi b/automation/scripts=
/include/xtf-x86-64-efi
new file mode 100644
index 0000000000..79622d5a6c
--- /dev/null
+++ b/automation/scripts/include/xtf-x86-64-efi
@@ -0,0 +1,52 @@
+#!/bin/bash
+#
+# XTF test utilities (x86_64, EFI).
+#
+
+# Arch-specific environment overrides.
+function xtf_arch_prepare()
+{
+    export FW_PREFIX=3D"${FW_PREFIX:-/usr/share/OVMF/}"
+    export QEMU_PREFIX=3D"${QEMU_PREFIX:-}"
+    export XEN_BINARY=3D"${XEN_BINARY:-${WORKDIR}/xen.efi}"
+    export XEN_CONSOLE=3D"${XEN_CONSOLE:-com1}"
+    export XTF_SRC_BRANCH=3D"${XTF_SRC_BRANCH:-master}"
+    export XTF_SRC_URI=3D"${XTF_SRC_URI:-https://xenbits.xen.org/git-http/=
xtf.git}"
+    export XTF_SRC_VARIANTS=3D"hvm64 pv64"
+}
+
+# Perform arch-specific XTF environment setup.
+function xtf_arch_setup()
+{
+    local esp_dir=3D"${WORKDIR}/boot-esp"
+    local efi_dir=3D"${esp_dir}/EFI/BOOT"
+
+    # Generate EFI boot environment
+    mkdir -p ${efi_dir}
+    cp ${XEN_BINARY} ${efi_dir}/BOOTX64.EFI
+    cp ${XTF_BINARY} ${efi_dir}/kernel
+
+    cat > ${efi_dir}/BOOTX64.cfg < boot-esp/EFI/BOOT/BOOTX64.cfg <
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Date: Wed, 16 Apr 2025 05:32:37 +0000
To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, cardoe@cardoe.com, marmarek@invisiblethingslab.com, sstabellini@kernel.org, dmukhin@ford.com
Subject: [PATCH v1 3/4] CI: switch arm64 XTF test runner to qemu-xtf.sh
Message-ID: <20250416053213.921444-4-dmukhin@ford.com>
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From: Denis Mukhin 

Hook arm64 QEMU configuration to qemu-xtf.sh and use new script in arm64 CI
jobs.

Signed-off-by: Denis Mukhin 
---
 automation/gitlab-ci/test.yaml                |  4 +-
 automation/scripts/.gitignore                 |  3 +
 .../scripts/include/configs/xtf-arm64-config  |  2 +
 automation/scripts/include/xtf-arm64          | 81 +++++++++++++++++++
 automation/scripts/qemu-xtf-dom0less-arm64.sh | 68 ----------------
 5 files changed, 88 insertions(+), 70 deletions(-)
 create mode 100644 automation/scripts/include/configs/xtf-arm64-config
 create mode 100644 automation/scripts/include/xtf-arm64
 delete mode 100755 automation/scripts/qemu-xtf-dom0less-arm64.sh

diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yam=
l
index ca1e4eb528..d6e4a0a622 100644
--- a/automation/gitlab-ci/test.yaml
+++ b/automation/gitlab-ci/test.yaml
@@ -571,7 +571,7 @@ qemu-smoke-dom0less-arm64-gcc-debug-earlyprintk:
 qemu-xtf-dom0less-arm64-gcc-hyp-xen-version:
   extends: .qemu-arm64
   script:
-    - ./automation/scripts/qemu-xtf-dom0less-arm64.sh hyp-xen-version 2>&1=
 | tee ${LOGFILE}
+    - ./automation/scripts/qemu-xtf.sh arm64 mmu64le hyp-xen-version 2>&1 =
| tee ${LOGFILE}
   needs:
     - alpine-3.18-gcc-arm64
     - qemu-system-aarch64-6.0.0-arm64-export
@@ -579,7 +579,7 @@ qemu-xtf-dom0less-arm64-gcc-hyp-xen-version:
 qemu-xtf-dom0less-arm64-gcc-debug-hyp-xen-version:
   extends: .qemu-arm64
   script:
-    - ./automation/scripts/qemu-xtf-dom0less-arm64.sh hyp-xen-version 2>&1=
 | tee ${LOGFILE}
+    - ./automation/scripts/qemu-xtf.sh arm64 mmu64le hyp-xen-version 2>&1 =
| tee ${LOGFILE}
   needs:
     - alpine-3.18-gcc-debug-arm64
     - qemu-system-aarch64-6.0.0-arm64-export
diff --git a/automation/scripts/.gitignore b/automation/scripts/.gitignore
index 2f2d6e1ebd..f853da4d89 100644
--- a/automation/scripts/.gitignore
+++ b/automation/scripts/.gitignore
@@ -1,6 +1,9 @@
 !include
=20
 binaries
+imagebuilder
 smoke.serial
 xen
 xtf*/
+
+*.rom
diff --git a/automation/scripts/include/configs/xtf-arm64-config b/automati=
on/scripts/include/configs/xtf-arm64-config
new file mode 100644
index 0000000000..9942740927
--- /dev/null
+++ b/automation/scripts/include/configs/xtf-arm64-config
@@ -0,0 +1,2 @@
+CONFIG_GICV2=3Dy
+CONFIG_SBSA_UART=3Dy
diff --git a/automation/scripts/include/xtf-arm64 b/automation/scripts/incl=
ude/xtf-arm64
new file mode 100644
index 0000000000..68487fe617
--- /dev/null
+++ b/automation/scripts/include/xtf-arm64
@@ -0,0 +1,81 @@
+#!/bin/bash
+#
+# XTF test utilities (arm64).
+#
+
+# Arch-specific environment overrides.
+function xtf_arch_prepare()
+{
+    export FW_PREFIX=3D"${FW_PREFIX:-/usr/lib/u-boot/qemu_arm64/}"
+    export QEMU_PREFIX=3D"${QEMU_PREFIX:-${WORKDIR}/}"
+    export XEN_BINARY=3D"${XEN_BINARY:-${WORKDIR}/xen}"
+    export XEN_CONSOLE=3D"${XEN_CONSOLE:-dtuart}"
+    export XTF_SRC_BRANCH=3D"${XTF_SRC_BRANCH:-xtf-arm}"
+    export XTF_SRC_URI=3D"${XTF_SRC_URI:-https://gitlab.com/xen-project/fu=
sa/xtf.git}"
+    export XTF_SRC_VARIANTS=3D"mmu64le"
+}
+
+# Perform arch-specific XTF environment setup.
+function xtf_arch_setup()
+{
+    # QEMU looks for "efi-virtio.rom" even if it is unneeded
+    curl -fsSLO https://github.com/qemu/qemu/raw/v5.2.0/pc-bios/efi-virtio=
.rom
+
+    # Crude check for local testing
+    if [ ! -d imagebuilder/.git ]; then
+        git clone --depth 1 https://gitlab.com/xen-project/imagebuilder.gi=
t
+    fi
+
+    cat > ${WORKDIR}/config < binaries/config
-
-rm -rf imagebuilder
-git clone --depth 1 https://gitlab.com/xen-project/imagebuilder.git
-bash imagebuilder/scripts/uboot-script-gen -t tftp -d binaries/ -c binarie=
s/config
-
-# Run the test
-rm -f smoke.serial
-export TEST_CMD=3D"./binaries/qemu-system-aarch64 \
-    -machine virtualization=3Dtrue \
-    -cpu cortex-a57 -machine type=3Dvirt \
-    -m 2048 -monitor none -serial stdio \
-    -smp 2 \
-    -no-reboot \
-    -device virtio-net-pci,netdev=3Dn0 \
-    -netdev user,id=3Dn0,tftp=3Dbinaries \
-    -bios /usr/lib/u-boot/qemu_arm64/u-boot.bin"
-
-export UBOOT_CMD=3D"virtio scan; dhcp; tftpb 0x40000000 boot.scr; source 0=
x40000000"
-export BOOT_MSG=3D"Latest ChangeSet: "
-export TEST_LOG=3D"smoke.serial"
-export PASSED=3D"${passed}"
-
-./automation/scripts/console.exp | sed 's/\r\+$//'
--=20
2.34.1




From xen-devel-bounces@lists.xenproject.org Wed Apr 16 05:32:47 2025
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Date: Wed, 16 Apr 2025 05:32:41 +0000
To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, cardoe@cardoe.com, marmarek@invisiblethingslab.com, sstabellini@kernel.org, dmukhin@ford.com
Subject: [PATCH v1 4/4] CI: add argo x86 XTF test
Message-ID: <20250416053213.921444-5-dmukhin@ford.com>
In-Reply-To: <20250416053213.921444-1-dmukhin@ford.com>
References: <20250416053213.921444-1-dmukhin@ford.com>
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From: Denis Mukhin 

Introduce new CI job to run x86 XTF argo test under QEMU to smoke test argo
feature functionality in upstream CI.

The new job lead time is ~30s, limit max job duration to 60s.

Signed-off-by: Denis Mukhin 
---
 automation/gitlab-ci/test.yaml        | 9 +++++++++
 automation/scripts/include/xtf-runner | 7 +++++++
 2 files changed, 16 insertions(+)

diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yam=
l
index d6e4a0a622..9001efb45c 100644
--- a/automation/gitlab-ci/test.yaml
+++ b/automation/gitlab-ci/test.yaml
@@ -691,6 +691,15 @@ qemu-smoke-x86-64-gcc-efi:
   needs:
     - debian-12-x86_64-gcc-debug
=20
+qemu-xtf-argo-x86_64-gcc-debug:
+  extends: .qemu-smoke-x86-64
+  variables:
+    TEST_TIMEOUT_OVERRIDE: 60
+  script:
+    - ./automation/scripts/qemu-xtf.sh x86-64 pv64 argo 2>&1 | tee ${LOGFI=
LE}
+  needs:
+    - alpine-3.18-gcc-debug
+
 qemu-smoke-riscv64-gcc:
   extends: .qemu-riscv64
   script:
diff --git a/automation/scripts/include/xtf-runner b/automation/scripts/inc=
lude/xtf-runner
index 55b7b34b89..12470b3979 100644
--- a/automation/scripts/include/xtf-runner
+++ b/automation/scripts/include/xtf-runner
@@ -70,6 +70,9 @@ function xtf_build_cmdline()
     local xtf_variant=3D$1
     local xtf_name=3D$2
     declare -a cmdline=3D()
+    declare -A per_test_args=3D(
+        [argo]=3D"argo=3D1 mac-permissive=3D1"
+    )
=20
     cmdline+=3D("loglvl=3Dall noreboot console_timestamps=3Dboot")
     cmdline+=3D("console=3D${XEN_CONSOLE}")
@@ -79,6 +82,10 @@ function xtf_build_cmdline()
         cmdline+=3D("dom0-iommu=3Dnone dom0=3Dpvh")
     fi
=20
+    if [[ -v per_test_args[${xtf_name}] ]]; then
+        cmdline+=3D("${per_test_args[${xtf_name}]}")
+    fi
+
     export XEN_CMDLINE=3D"${cmdline[@]}"
 }
=20
--=20
2.34.1




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From: "Chen, Jiqian" 
To: =?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= 
CC: "xen-devel@lists.xenproject.org" , "Huang,
 Ray" , Andrew Cooper , Anthony
 PERARD , "Orzel, Michal" ,
	Jan Beulich , Julien Grall , Stefano
 Stabellini , "Chen, Jiqian" 
Subject: Re: [PATCH v2 4/8] vpci: Hide capability when it fails to initialize
Thread-Topic: [PATCH v2 4/8] vpci: Hide capability when it fails to initialize
Thread-Index: AQHbqRsfg3RwMiNXxEOdiN0NH9ACsrOklU6AgAHIwoA=
Date: Wed, 16 Apr 2025 06:07:49 +0000
Message-ID:
 
References: <20250409064528.405573-1-Jiqian.Chen@amd.com>
 <20250409064528.405573-5-Jiqian.Chen@amd.com> 
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Date: Wed, 16 Apr 2025 06:15:18 +0000
To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com
Subject: [PATCH v3] xen/domain: unify domain ID allocation
Message-ID: <20250416061509.934220-1-dmukhin@ford.com>
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From: Denis Mukhin 

Unify the logic of domain ID allocation, so that both the initial domain
creation and the usage by domctl use the same helper function across
architectures (Arm and x86).

Wrap the domain ID allocation as an arch-independent function domid_alloc()=
 in
common/domain.c.

Allocation algorithm:
- If an explicit domain ID is provided, verify its availability and
  use it if ID is unused;
- Otherwise, perform an exhaustive search for the first available ID
  within the [0..DOMID_FIRST_RESERVED) range, excluding hardware_domid.

Move the is_free_domid() helper closer to domid_alloc(). Simplify
is_free_domid() by removing the domain ID range check, as the ID is now
guaranteed to be within the valid range. Additionally, update the predicate=
 to
return a bool value instead of an int.

Signed-off-by: Denis Mukhin 
---
Link to v2: https://lore.kernel.org/xen-devel/20250331230508.440198-3-dmukh=
in@ford.com/
CI: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines/177080184=
7

I hope by moving it to an isolated thread the review will be simpler.

Changes since v2:
- added max_init_domid change so the patch does not need to depend on
  other patches
- moved uses of domid_alloc() close to domain_create()
- use DOMID_INVALID as the indicator for doing an exhaustive domain ID sear=
ch
---
 xen/arch/arm/dom0less-build.c | 19 ++++++++-------
 xen/arch/arm/domain_build.c   | 19 +++++++++++----
 xen/arch/x86/setup.c          |  8 +++++--
 xen/common/domain.c           | 45 +++++++++++++++++++++++++++++++++++
 xen/common/domctl.c           | 45 ++++-------------------------------
 xen/include/xen/domain.h      |  2 ++
 6 files changed, 81 insertions(+), 57 deletions(-)

diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c
index bd15563750..387ba938ba 100644
--- a/xen/arch/arm/dom0less-build.c
+++ b/xen/arch/arm/dom0less-build.c
@@ -993,15 +993,13 @@ void __init create_domUs(void)
             .grant_opts =3D XEN_DOMCTL_GRANT_version(opt_gnttab_max_versio=
n),
         };
         unsigned int flags =3D 0U;
+        domid_t domid;
         uint32_t val;
         int rc;
=20
         if ( !dt_device_is_compatible(node, "xen,domain") )
             continue;
=20
-        if ( (max_init_domid + 1) >=3D DOMID_FIRST_RESERVED )
-            panic("No more domain IDs available\n");
-
         if ( dt_find_property(node, "xen,static-mem", NULL) )
         {
             if ( llc_coloring_enabled )
@@ -1125,12 +1123,15 @@ void __init create_domUs(void)
         if ( !llc_coloring_enabled && llc_colors_str )
             panic("'llc-colors' found, but LLC coloring is disabled\n");
=20
-        /*
-         * The variable max_init_domid is initialized with zero, so here i=
t's
-         * very important to use the pre-increment operator to call
-         * domain_create() with a domid > 0. (domid =3D=3D 0 is reserved f=
or Dom0)
-         */
-        d =3D domain_create(++max_init_domid, &d_cfg, flags);
+        rc =3D domid_alloc(DOMID_INVALID);
+        if ( rc < 0 )
+            panic("Error allocating ID for domain %s (rc =3D %d)\n",
+                  dt_node_name(node), rc);
+        domid =3D rc;
+        if ( max_init_domid < domid )
+            max_init_domid =3D domid;
+
+        d =3D domain_create(domid, &d_cfg, flags);
         if ( IS_ERR(d) )
             panic("Error creating domain %s (rc =3D %ld)\n",
                   dt_node_name(node), PTR_ERR(d));
diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
index 634333cdde..2ee6ffd30b 100644
--- a/xen/arch/arm/domain_build.c
+++ b/xen/arch/arm/domain_build.c
@@ -2370,6 +2370,7 @@ void __init create_dom0(void)
         .grant_opts =3D XEN_DOMCTL_GRANT_version(opt_gnttab_max_version),
     };
     unsigned int flags =3D CDF_privileged;
+    domid_t domid;
     int rc;
=20
     /* The vGIC for DOM0 is exactly emulating the hardware GIC */
@@ -2394,19 +2395,27 @@ void __init create_dom0(void)
     if ( !llc_coloring_enabled )
         flags |=3D CDF_directmap;
=20
-    dom0 =3D domain_create(0, &dom0_cfg, flags);
+    rc =3D domid_alloc(get_initial_domain_id());
+    if ( rc < 0 )
+        panic("Error allocating domain ID %d (rc =3D %d)\n",
+              get_initial_domain_id(), rc);
+    domid =3D rc;
+
+    dom0 =3D domain_create(domid, &dom0_cfg, flags);
     if ( IS_ERR(dom0) )
-        panic("Error creating domain 0 (rc =3D %ld)\n", PTR_ERR(dom0));
+        panic("Error creating domain %d (rc =3D %ld)\n", domid, PTR_ERR(do=
m0));
=20
     if ( llc_coloring_enabled && (rc =3D dom0_set_llc_colors(dom0)) )
-        panic("Error initializing LLC coloring for domain 0 (rc =3D %d)\n"=
, rc);
+        panic("Error initializing LLC coloring for domain %d (rc =3D %d)\n=
",
+              domid, rc);
=20
     if ( alloc_dom0_vcpu0(dom0) =3D=3D NULL )
-        panic("Error creating domain 0 vcpu0\n");
+        panic("Error creating domain %d vcpu0\n", domid);
=20
     rc =3D construct_dom0(dom0);
     if ( rc )
-        panic("Could not set up DOM0 guest OS (rc =3D %d)\n", rc);
+        panic("Could not set up guest OS for domain %d (rc =3D %d)\n",
+              domid, rc);
 }
=20
 /*
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 3c257f0bad..e20a416bf4 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -1009,8 +1009,12 @@ static struct domain *__init create_dom0(struct boot=
_info *bi)
     if ( iommu_enabled )
         dom0_cfg.flags |=3D XEN_DOMCTL_CDF_iommu;
=20
-    /* Create initial domain.  Not d0 for pvshim. */
-    bd->domid =3D get_initial_domain_id();
+    /* Allocate initial domain ID. Not d0 for pvshim. */
+    bd->domid =3D domid_alloc(get_initial_domain_id());
+    if ( bd->domid < 0 )
+        panic("Error allocating domain ID %d (rc =3D %d)\n",
+              get_initial_domain_id(), bd->domid);
+
     d =3D domain_create(bd->domid, &dom0_cfg, pv_shim ? 0 : CDF_privileged=
);
     if ( IS_ERR(d) )
         panic("Error creating d%u: %ld\n", bd->domid, PTR_ERR(d));
diff --git a/xen/common/domain.c b/xen/common/domain.c
index 585fd726a9..db98d9c1b2 100644
--- a/xen/common/domain.c
+++ b/xen/common/domain.c
@@ -66,6 +66,51 @@ DEFINE_RCU_READ_LOCK(domlist_read_lock);
 static struct domain *domain_hash[DOMAIN_HASH_SIZE];
 struct domain *domain_list;
=20
+static inline bool is_free_domid(domid_t dom)
+{
+    struct domain *d =3D rcu_lock_domain_by_id(dom);
+
+    if ( d )
+        rcu_unlock_domain(d);
+
+    return !d;
+}
+
+/*
+ * Allocate new domain ID based on the hint.
+ *
+ * If hint is outside of valid [0..DOMID_FIRST_RESERVED] range of IDs,
+ * perform an exhaustive search of the first free domain ID excluding
+ * hardware_domid.
+ */
+int domid_alloc(int hint)
+{
+    domid_t domid;
+
+    if ( hint >=3D 0 && hint < DOMID_FIRST_RESERVED )
+    {
+        if ( !is_free_domid(hint) )
+            return -EEXIST;
+
+        domid =3D hint;
+    }
+    else
+    {
+        for ( domid =3D 0; domid < DOMID_FIRST_RESERVED; domid++ )
+        {
+            if ( domid =3D=3D hardware_domid )
+                continue;
+            if ( is_free_domid(domid) )
+                break;
+        }
+
+        if ( domid =3D=3D DOMID_FIRST_RESERVED )
+            return -ENOMEM;
+    }
+
+    return domid;
+}
+
 /*
  * Insert a domain into the domlist/hash.  This allows the domain to be lo=
oked
  * up by domid, and therefore to be the subject of hypercalls/etc.
diff --git a/xen/common/domctl.c b/xen/common/domctl.c
index bfe2e1f9f0..3d21612660 100644
--- a/xen/common/domctl.c
+++ b/xen/common/domctl.c
@@ -49,20 +49,6 @@ static int xenctl_bitmap_to_nodemask(nodemask_t *nodemas=
k,
                                    MAX_NUMNODES);
 }
=20
-static inline int is_free_domid(domid_t dom)
-{
-    struct domain *d;
-
-    if ( dom >=3D DOMID_FIRST_RESERVED )
-        return 0;
-
-    if ( (d =3D rcu_lock_domain_by_id(dom)) =3D=3D NULL )
-        return 1;
-
-    rcu_unlock_domain(d);
-    return 0;
-}
-
 void getdomaininfo(struct domain *d, struct xen_domctl_getdomaininfo *info=
)
 {
     struct vcpu *v;
@@ -421,34 +407,11 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u=
_domctl)
=20
     case XEN_DOMCTL_createdomain:
     {
-        domid_t        dom;
-        static domid_t rover =3D 0;
+        ret =3D domid_alloc(op->domain);
+        if ( ret < 0 )
+            break;
=20
-        dom =3D op->domain;
-        if ( (dom > 0) && (dom < DOMID_FIRST_RESERVED) )
-        {
-            ret =3D -EEXIST;
-            if ( !is_free_domid(dom) )
-                break;
-        }
-        else
-        {
-            for ( dom =3D rover + 1; dom !=3D rover; dom++ )
-            {
-                if ( dom =3D=3D DOMID_FIRST_RESERVED )
-                    dom =3D 1;
-                if ( is_free_domid(dom) )
-                    break;
-            }
-
-            ret =3D -ENOMEM;
-            if ( dom =3D=3D rover )
-                break;
-
-            rover =3D dom;
-        }
-
-        d =3D domain_create(dom, &op->u.createdomain, false);
+        d =3D domain_create(ret, &op->u.createdomain, false);
         if ( IS_ERR(d) )
         {
             ret =3D PTR_ERR(d);
diff --git a/xen/include/xen/domain.h b/xen/include/xen/domain.h
index a34daa7d10..9f2470b095 100644
--- a/xen/include/xen/domain.h
+++ b/xen/include/xen/domain.h
@@ -38,6 +38,8 @@ void arch_get_domain_info(const struct domain *d,
=20
 domid_t get_initial_domain_id(void);
=20
+int domid_alloc(int hint);
+
 /* CDF_* constant. Internal flags for domain creation. */
 /* Is this a privileged domain? */
 #define CDF_privileged           (1U << 0)
--=20
2.34.1




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From: "Chen, Jiqian" 
To: =?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= 
CC: "xen-devel@lists.xenproject.org" , "Huang,
 Ray" , "Chen, Jiqian" 
Subject: Re: [PATCH v2 7/8] vpci/msi: Free MSI resources when init_msi() fails
Thread-Topic: [PATCH v2 7/8] vpci/msi: Free MSI resources when init_msi()
 fails
Thread-Index: AQHbqRsgbLaoMHelXkGKdCfvKc+G8rOkwo4AgAGd4IA=
Date: Wed, 16 Apr 2025 06:16:36 +0000
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References: <20250409064528.405573-1-Jiqian.Chen@amd.com>
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From: "Chen, Jiqian" 
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CC: "xen-devel@lists.xenproject.org" , "Huang,
 Ray" , Jan Beulich , Andrew Cooper
	, "Chen, Jiqian" 
Subject: Re: [PATCH v2 8/8] vpci/msix: Add function to clean MSIX resources
Thread-Topic: [PATCH v2 8/8] vpci/msix: Add function to clean MSIX resources
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Date: Wed, 16 Apr 2025 06:20:50 +0000
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Date: Wed, 16 Apr 2025 06:28:28 +0000
To: Roger Pau Monne 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, Jan Beulich , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini 
Subject: Re: [PATCH v2 1/4] xen/io: provide helpers for multi size MMIO accesses
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In-Reply-To: <20250415153246.81688-2-roger.pau@citrix.com>
References: <20250415153246.81688-1-roger.pau@citrix.com> <20250415153246.81688-2-roger.pau@citrix.com>
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On Tue, Apr 15, 2025 at 05:32:43PM +0200, Roger Pau Monne wrote:
> Several handlers have the same necessity of reading or writing from or to
> an MMIO region using 1, 2, 4 or 8 bytes accesses.  So far this has been
> open-coded in the function itself.  Instead provide a new set of handlers
> that encapsulate the accesses.
>=20
> Since the added helpers are not architecture specific, introduce a new
> generic io.h header.
>=20
> No functional change intended.
>=20
> Signed-off-by: Roger Pau Monn=C3=A9 

Reviewed-by: Denis Mukhin 

> ---
> Changes since v1:
>  - Limit {read,write}q() to 64bit architectures.
>  - Always have a default case in switch statement.
> ---
>  xen/arch/x86/hvm/vmsi.c | 47 ++--------------------------
>  xen/arch/x86/mm.c       | 32 +++++--------------
>  xen/drivers/vpci/msix.c | 47 ++--------------------------
>  xen/include/xen/io.h    | 68 +++++++++++++++++++++++++++++++++++++++++
>  4 files changed, 81 insertions(+), 113 deletions(-)
>  create mode 100644 xen/include/xen/io.h
>=20
> diff --git a/xen/arch/x86/hvm/vmsi.c b/xen/arch/x86/hvm/vmsi.c
> index fd83abb929ec..61b89834d97d 100644
> --- a/xen/arch/x86/hvm/vmsi.c
> +++ b/xen/arch/x86/hvm/vmsi.c
> @@ -24,6 +24,7 @@
>   * Will be merged it with virtual IOAPIC logic, since most is the same
>  */
>=20
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -304,28 +305,7 @@ static void adjacent_read(
>=20
>      hwaddr =3D fix_to_virt(fixmap_idx) + PAGE_OFFSET(address);
>=20
> -    switch ( len )
> -    {
> -    case 1:
> -        *pval =3D readb(hwaddr);
> -        break;
> -
> -    case 2:
> -        *pval =3D readw(hwaddr);
> -        break;
> -
> -    case 4:
> -        *pval =3D readl(hwaddr);
> -        break;
> -
> -    case 8:
> -        *pval =3D readq(hwaddr);
> -        break;
> -
> -    default:
> -        ASSERT_UNREACHABLE();
> -        break;
> -    }
> +    *pval =3D read_mmio(hwaddr, len);
>  }
>=20
>  static void adjacent_write(
> @@ -344,28 +324,7 @@ static void adjacent_write(
>=20
>      hwaddr =3D fix_to_virt(fixmap_idx) + PAGE_OFFSET(address);
>=20
> -    switch ( len )
> -    {
> -    case 1:
> -        writeb(val, hwaddr);
> -        break;
> -
> -    case 2:
> -        writew(val, hwaddr);
> -        break;
> -
> -    case 4:
> -        writel(val, hwaddr);
> -        break;
> -
> -    case 8:
> -        writeq(val, hwaddr);
> -        break;
> -
> -    default:
> -        ASSERT_UNREACHABLE();
> -        break;
> -    }
> +    write_mmio(hwaddr, val, len);
>  }
>=20
>  static int cf_check msixtbl_read(
> diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
> index 1cf236516789..989e62e7ce6f 100644
> --- a/xen/arch/x86/mm.c
> +++ b/xen/arch/x86/mm.c
> @@ -95,6 +95,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -116,7 +117,6 @@
>  #include 
>  #include 
>  #include 
> -#include 
>  #include 
>  #include 
>  #include 
> @@ -5102,7 +5102,7 @@ static void __iomem *subpage_mmio_map_page(
>  static void subpage_mmio_write_emulate(
>      mfn_t mfn,
>      unsigned int offset,
> -    const void *data,
> +    unsigned long data,
>      unsigned int len)
>  {
>      struct subpage_ro_range *entry;
> @@ -5115,7 +5115,6 @@ static void subpage_mmio_write_emulate(
>=20
>      if ( test_bit(offset / MMIO_RO_SUBPAGE_GRAN, entry->ro_elems) )
>      {
> - write_ignored:
>          gprintk(XENLOG_WARNING,
>                  "ignoring write to R/O MMIO 0x%"PRI_mfn"%03x len %u\n",
>                  mfn_x(mfn), offset, len);
> @@ -5131,26 +5130,7 @@ static void subpage_mmio_write_emulate(
>          return;
>      }
>=20
> -    addr +=3D offset;
> -    switch ( len )
> -    {
> -    case 1:
> -        writeb(*(const uint8_t*)data, addr);
> -        break;
> -    case 2:
> -        writew(*(const uint16_t*)data, addr);
> -        break;
> -    case 4:
> -        writel(*(const uint32_t*)data, addr);
> -        break;
> -    case 8:
> -        writeq(*(const uint64_t*)data, addr);
> -        break;
> -    default:
> -        /* mmio_ro_emulated_write() already validated the size */
> -        ASSERT_UNREACHABLE();
> -        goto write_ignored;
> -    }
> +    write_mmio(addr + offset, data, len);
>  }
>=20
>  #ifdef CONFIG_HVM
> @@ -5185,18 +5165,20 @@ int cf_check mmio_ro_emulated_write(
>      struct x86_emulate_ctxt *ctxt)
>  {
>      struct mmio_ro_emulate_ctxt *mmio_ro_ctxt =3D ctxt->data;
> +    unsigned long data =3D 0;
>=20
>      /* Only allow naturally-aligned stores at the original %cr2 address.=
 */
>      if ( ((bytes | offset) & (bytes - 1)) || !bytes ||
> -         offset !=3D mmio_ro_ctxt->cr2 )
> +         offset !=3D mmio_ro_ctxt->cr2 || bytes > sizeof(data) )
>      {
>          gdprintk(XENLOG_WARNING, "bad access (cr2=3D%lx, addr=3D%lx, byt=
es=3D%u)\n",
>                  mmio_ro_ctxt->cr2, offset, bytes);
>          return X86EMUL_UNHANDLEABLE;
>      }
>=20
> +    memcpy(&data, p_data, bytes);
>      subpage_mmio_write_emulate(mmio_ro_ctxt->mfn, PAGE_OFFSET(offset),
> -                               p_data, bytes);
> +                               data, bytes);
>=20
>      return X86EMUL_OKAY;
>  }
> diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c
> index 6bd8c55bb48e..6455f2a03a01 100644
> --- a/xen/drivers/vpci/msix.c
> +++ b/xen/drivers/vpci/msix.c
> @@ -17,6 +17,7 @@
>   * License along with this program; If not, see .
>   */
>=20
> +#include 
>  #include 
>  #include 
>=20
> @@ -344,28 +345,7 @@ static int adjacent_read(const struct domain *d, con=
st struct vpci_msix *msix,
>          return X86EMUL_OKAY;
>      }
>=20
> -    switch ( len )
> -    {
> -    case 1:
> -        *data =3D readb(mem + PAGE_OFFSET(addr));
> -        break;
> -
> -    case 2:
> -        *data =3D readw(mem + PAGE_OFFSET(addr));
> -        break;
> -
> -    case 4:
> -        *data =3D readl(mem + PAGE_OFFSET(addr));
> -        break;
> -
> -    case 8:
> -        *data =3D readq(mem + PAGE_OFFSET(addr));
> -        break;
> -
> -    default:
> -        ASSERT_UNREACHABLE();
> -        break;
> -    }
> +    *data =3D read_mmio(mem + PAGE_OFFSET(addr), len);
>      spin_unlock(&vpci->lock);
>=20
>      return X86EMUL_OKAY;
> @@ -493,28 +473,7 @@ static int adjacent_write(const struct domain *d, co=
nst struct vpci_msix *msix,
>          return X86EMUL_OKAY;
>      }
>=20
> -    switch ( len )
> -    {
> -    case 1:
> -        writeb(data, mem + PAGE_OFFSET(addr));
> -        break;
> -
> -    case 2:
> -        writew(data, mem + PAGE_OFFSET(addr));
> -        break;
> -
> -    case 4:
> -        writel(data, mem + PAGE_OFFSET(addr));
> -        break;
> -
> -    case 8:
> -        writeq(data, mem + PAGE_OFFSET(addr));
> -        break;
> -
> -    default:
> -        ASSERT_UNREACHABLE();
> -        break;
> -    }
> +    write_mmio(mem + PAGE_OFFSET(addr), data, len);
>      spin_unlock(&vpci->lock);
>=20
>      return X86EMUL_OKAY;
> diff --git a/xen/include/xen/io.h b/xen/include/xen/io.h
> new file mode 100644
> index 000000000000..4495a04c403e
> --- /dev/null
> +++ b/xen/include/xen/io.h
> @@ -0,0 +1,68 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * IO related routines.
> + *
> + * Copyright (c) 2025 Cloud Software Group
> + */
> +#ifndef XEN_IO_H
> +#define XEN_IO_H
> +
> +#include 
> +
> +#include 
> +
> +static inline unsigned long read_mmio(const volatile void __iomem *mem,
> +                                      unsigned int size)
> +{
> +    switch ( size )
> +    {
> +    case 1:
> +        return readb(mem);
> +
> +    case 2:
> +        return readw(mem);
> +
> +    case 4:
> +        return readl(mem);
> +
> +#ifdef CONFIG_64BIT
> +    case 8:
> +        return readq(mem);
> +#endif
> +
> +    default:
> +        ASSERT_UNREACHABLE();
> +        return ~0UL;
> +    }
> +}
> +
> +static inline void write_mmio(volatile void __iomem *mem, unsigned long =
data,
> +                              unsigned int size)
> +{
> +    switch ( size )
> +    {
> +    case 1:
> +        writeb(data, mem);
> +        break;
> +
> +    case 2:
> +        writew(data, mem);
> +        break;
> +
> +    case 4:
> +        writel(data, mem);
> +        break;
> +
> +#ifdef CONFIG_64BIT
> +    case 8:
> +        writeq(data, mem);
> +        break;
> +#endif
> +
> +    default:
> +        ASSERT_UNREACHABLE();
> +        break;
> +    }
> +}
> +
> +#endif /* XEN_IO_H */
> --
> 2.48.1
>=20
>=20



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Date: Wed, 16 Apr 2025 08:37:12 +0200
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Subject: Re: [PATCH v2 10/19] xen/sysctl: introduce CONFIG_PM_STATS
To: "Penny, Zheng" 
Cc: "Stabellini, Stefano" ,
 "xen-devel@lists.xenproject.org" 
References: <20250326055053.3313146-1-Penny.Zheng@amd.com>
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On 16.04.2025 05:54, Penny, Zheng wrote:
>> -----Original Message-----
>> From: Jan Beulich 
>> Sent: Tuesday, April 1, 2025 9:10 PM
>>
>> On 26.03.2025 06:50, Penny Zheng wrote:
>>> --- a/xen/common/Kconfig
>>> +++ b/xen/common/Kconfig
>>> @@ -557,4 +557,9 @@ config SYSCTL
>>>       to reduce Xen footprint.
>>>  endmenu
>>>
>>> +config PM_STATS
>>> +   bool "Enable Performance Management Statistics"
>>> +   depends on ACPI && HAS_CPUFREQ && SYSCTL
>>> +   default y
>>
>> As per above - either name, prompt and the description that Stefano suggested
>> are wrong, or it is too much that is being covered by this new control.
>>
> 
> We have two sysctl-op on performance, do_get_pm_info() and do_pm_op().
> I think do_get_pm_info() is to collect PM statistic info, which could be wrapped with
> CONFIG_PM_STATS, while maybe do_pm_op() is more focusing on performance tuning.
> How about we introduce another Kconfig CONFIG_PM_TUNE to wrap  do_pm_op()
> and related helpers? I suggest to introduce a new file pmtune.c to contain.
> Or any better suggestion?

"tune" is too narrow imo. "ctrl" may be an option, but how about simply pm-op.c,
fitting do_pm_op() pretty nicely? Question is what else is going to end up in
that file.

Jan


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From: Luca Fancellu 
To: Julien Grall 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Bertrand Marquis
	, Michal Orzel , Volodymyr
 Babchuk 
Subject: Re: [PATCH v3 6/7] arm/mpu: Implement early_fdt_map support in MPU
 systems
Thread-Topic: [PATCH v3 6/7] arm/mpu: Implement early_fdt_map support in MPU
 systems
Thread-Index: AQHbqvINbdgv2Gjl9Uy6CHqPPhTkQbOjEuwAgALYpYA=
Date: Wed, 16 Apr 2025 07:25:59 +0000
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Hi Julien,

>=20
>> +
>>  void __init setup_pagetables(void) {}
>>    void * __init early_fdt_map(paddr_t fdt_paddr)
>>  {
>> -    BUG_ON("unimplemented");
>> -    return NULL;
>> +    /* Map at least a page containing the DTB address, exclusive range =
*/
>> +    paddr_t base_paddr =3D round_pgdown(fdt_paddr);
>=20
> NIT:  IIRC, the minimum for the MPU is 64-byte. So is there any reason we=
 are enforcing a bigger alignment?

So the original work starts from the assumption that we would like to reuse
some of the helper used for MMU, so everything is developed to work on
pages of 4kb, do you think it should change?

Cheers,
Luca



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Date: Wed, 16 Apr 2025 09:32:11 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: "Chen, Jiqian" 
Cc: "xen-devel@lists.xenproject.org" ,
	"Huang, Ray" 
Subject: Re: [PATCH v2 2/8] vpci/header: Emulate legacy capability list for
 host
Message-ID: 
References: <20250409064528.405573-1-Jiqian.Chen@amd.com>
 <20250409064528.405573-3-Jiqian.Chen@amd.com>
 
 
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In-Reply-To: 

On Wed, Apr 16, 2025 at 02:51:18AM +0000, Chen, Jiqian wrote:
> On 2025/4/15 18:10, Roger Pau Monné wrote:
> > On Wed, Apr 09, 2025 at 02:45:22PM +0800, Jiqian Chen wrote:
> >> +        while ( next && ttl )
> >> +        {
> >> +            unsigned int pos = next;
> >> +
> >> +            next = pci_find_next_cap_ttl(pdev->sbdf, pos + PCI_CAP_LIST_NEXT,
> >> +                                         caps, n, &ttl);
> >> +
> >> +            rc = vpci_add_register(pdev->vpci, vpci_hw_read8, NULL,
> >> +                                   pos + PCI_CAP_LIST_ID, 1, NULL);
> >> +            if ( rc )
> >> +                return rc;
> >> +
> >> +            rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL,
> >> +                                   pos + PCI_CAP_LIST_NEXT, 1,
> >> +                                   (void *)(uintptr_t)next);
> >> +            if ( rc )
> >> +                return rc;
> >> +
> >> +            next &= ~3;
> >> +        }
> >> +    }
> >> +
> >> +    /* Utilize rsvdp_mask to hide PCI_STATUS_CAP_LIST from the guest. */
> >> +    rc = vpci_add_register_mask(pdev->vpci, vpci_hw_read16, vpci_hw_write16,
> >> +                                PCI_STATUS, 2, NULL,
> >> +                                PCI_STATUS_RO_MASK &
> >> +                                    ~(mask_cap_list ? PCI_STATUS_CAP_LIST : 0),
> >> +                                PCI_STATUS_RW1C_MASK,
> >> +                                mask_cap_list ? PCI_STATUS_CAP_LIST : 0,
> >> +                                PCI_STATUS_RSVDZ_MASK);
> > 
> > One further remark I've forgot to make on the previous reply: I'm
> > unsure we want to do this for dom0, as we in general allow dom0
> > unfiltered write access (unless it's for accesses mediated by Xen).
> This part is the original implementation before my patches.
> If you want to restrict this only for domUs, not for dom0.

Oh, indeed.  I was confused thinking it was inside the
!is_hardware_domain() conditional.  Leave it like that, your series is
already long enough.

Thanks, Roger.


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Date: Wed, 16 Apr 2025 09:37:46 +0200
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Subject: Re: [PATCH v7 0/3] Enable early bootup of Armv8-R AArch32 systems
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On 15/04/2025 08:55, Jan Beulich wrote:
> On 14.04.2025 18:45, Ayan Kumar Halder wrote:
>> Enable early booting of Armv8-R AArch32 based systems.
>>
>> Added Luca's R-b in all the patches.
>> Added Michal's R-b in patch 1 and 3.
>>
>> Ayan Kumar Halder (3):
>>   xen/arm: Move some of the functions to common file
>>   xen/arm32: Create the same boot-time MPU regions as arm64
>>   xen/arm32: mpu: Stubs to build MPU for arm32
>>
>>  xen/arch/arm/arm32/Makefile              |   1 +
>>  xen/arch/arm/arm32/mpu/Makefile          |   3 +
>>  xen/arch/arm/arm32/mpu/head.S            | 104 +++++++++++++++++++++++
>>  xen/arch/arm/arm32/mpu/p2m.c             |  19 +++++
>>  xen/arch/arm/arm32/mpu/smpboot.c         |  26 ++++++
>>  xen/arch/arm/arm64/mpu/head.S            |  78 +----------------
>>  xen/arch/arm/include/asm/arm32/sysregs.h |  13 ++-
>>  xen/arch/arm/include/asm/arm64/sysregs.h |  13 +++
>>  xen/arch/arm/include/asm/cpregs.h        |   2 +
>>  xen/arch/arm/include/asm/mm.h            |   9 +-
>>  xen/arch/arm/include/asm/mmu/mm.h        |   7 ++
>>  xen/arch/arm/include/asm/mpu/cpregs.h    |  32 +++++++
>>  xen/arch/arm/include/asm/mpu/mm.h        |   5 ++
>>  xen/arch/arm/include/asm/mpu/regions.inc |  79 +++++++++++++++++
>>  xen/arch/arm/mpu/Makefile                |   1 +
>>  xen/arch/arm/mpu/domain_page.c           |  45 ++++++++++
>>  16 files changed, 350 insertions(+), 87 deletions(-)
>>  create mode 100644 xen/arch/arm/arm32/mpu/Makefile
>>  create mode 100644 xen/arch/arm/arm32/mpu/head.S
>>  create mode 100644 xen/arch/arm/arm32/mpu/p2m.c
>>  create mode 100644 xen/arch/arm/arm32/mpu/smpboot.c
>>  create mode 100644 xen/arch/arm/include/asm/mpu/cpregs.h
>>  create mode 100644 xen/arch/arm/include/asm/mpu/regions.inc
>>  create mode 100644 xen/arch/arm/mpu/domain_page.c
> 
> Even if we have files of this name elsewhere, it would imo be nice if new ones
> still used dash(es) instead of underscore(s) in their names.
I took care of this while committing.

~Michal



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From: Bertrand Marquis 
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	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
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	Volodymyr Babchuk 
Subject: [PATCH v5 0/6] FF-A VM to VM support
Date: Wed, 16 Apr 2025 09:39:41 +0200
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This patch serie adds support to use FF-A between VM for communications
using indirect messages.

It adds a Kconfig parameter to enable this feature and marks it as
experimental as for now there is no system to restrict communication
rights between VM using this system.

It also adds support to use VM to VM communications using FF-A even if
there is no firmware support for FF-A. As this feature enables FF-A
support in all cases, we also introduce a new command line parameter to
allow the user to force which tee is to be used between FF-A and Optee
to have a solution to enable optee support if FF-A VM to VM is enabled.

Changes since v4:
- fix typos and optimize command line parameter
- split VM to VM support in 2 patches to ease review
- organize ffa contexts in a chain list to be able to build the partinfo
  result without taking the global domain lock
- introduce a maximum number of SPs to prevent holding the CPU for too
  long during partinfo call
- use an atomic to store the number of FF-A VMs
- prevent potential overflows in indirect message handling
- fix copy bug in indirect message introduced in v4

Changes since v3:
- reintroduce firmare v1.0 support in partinfo
- fix a possible TOC/TOU issue in indirect message handling
- typos and small fixes

Changes since v2:
- Rework partition_info_get implementation
- Taint Xen and display a message when VM to VM is enabled
- Various fixes explained in each patch

Changes since v1 (rfc):
- add a tee command line parameter
- use IS_ENABLED instead of ifdef when possible
- rebase on latest staging


Bertrand Marquis (6):
  xen/arm: Create tee command line parameter
  xen/arm: ffa: Rework partinfo_get implementation
  xen/arm: ffa: Introduce VM to VM support
  xen/arm: ffa: Add buffer full notification support
  xen/arm: ffa: Add indirect message between VM
  xen/arm: ffa: Enable VM to VM without firmware

 docs/misc/xen-command-line.pandoc  |  14 ++
 xen/arch/arm/include/asm/tee/tee.h |   4 +
 xen/arch/arm/tee/Kconfig           |  11 ++
 xen/arch/arm/tee/ffa.c             |  69 ++++++-
 xen/arch/arm/tee/ffa_msg.c         | 115 ++++++++++--
 xen/arch/arm/tee/ffa_notif.c       | 140 +++++++-------
 xen/arch/arm/tee/ffa_partinfo.c    | 286 ++++++++++++++++++++---------
 xen/arch/arm/tee/ffa_private.h     | 153 ++++++++++++---
 xen/arch/arm/tee/tee.c             |  32 ++++
 9 files changed, 628 insertions(+), 196 deletions(-)

-- 
2.47.1



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Subject: [PATCH v5 1/6] xen/arm: Create tee command line parameter
Date: Wed, 16 Apr 2025 09:39:42 +0200
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Add a new command line parameter "tee=" to be used to explicitly select
what tee mediator is to be used by Xen and fail if it does not exist
or the probe function for it failed.

Without specifying which tee is to be used, Xen will use the first one
for which the probe function succeeds which depends on the order of the
mediator list which depends on the compiler.
Using the command line argument, it is now possible to explicit request
a specific TEE mediator and panic on boot if it is not available.

Signed-off-by: Bertrand Marquis 
---
Changes in v5:
- Typo fix and rewording in command line doc (Julien)
- fix include order in tee.c (Julien)
- use a local bool instead of retesting the string each time in tee_init
  (Julien)
Changes in v4:
- None
Changes in v3:
- Properly classify tee as arm specific (Jan)
Changes in v2:
- Patch introduced to add a command line selection of the TEE
---
 docs/misc/xen-command-line.pandoc  | 14 +++++++++++++
 xen/arch/arm/include/asm/tee/tee.h |  4 ++++
 xen/arch/arm/tee/tee.c             | 32 ++++++++++++++++++++++++++++++
 3 files changed, 50 insertions(+)

diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc
index 89db6e83be66..472de1911363 100644
--- a/docs/misc/xen-command-line.pandoc
+++ b/docs/misc/xen-command-line.pandoc
@@ -2651,6 +2651,20 @@ Specify the per-cpu trace buffer size in pages.
 
 Flag to enable TSC deadline as the APIC timer mode.
 
+### tee (arm)
+> `= `
+
+Specify the TEE mediator to be probed and use.
+
+The default behaviour is to probe all TEEs supported by Xen and use
+the first one successfully probed. When this parameter is passed, Xen will
+probe only the TEE mediator passed as argument and boot will fail if this
+mediator is not properly probed or if the requested TEE is not supported by
+Xen.
+
+This parameter can be set to `optee` or `ffa` if the corresponding mediators
+are compiled in.
+
 ### tevt_mask
 > `= `
 
diff --git a/xen/arch/arm/include/asm/tee/tee.h b/xen/arch/arm/include/asm/tee/tee.h
index 0169fd746bcd..15d664e28dce 100644
--- a/xen/arch/arm/include/asm/tee/tee.h
+++ b/xen/arch/arm/include/asm/tee/tee.h
@@ -55,6 +55,9 @@ struct tee_mediator_desc {
     /* Printable name of the TEE. */
     const char *name;
 
+    /* Command line name of the TEE (to be used with tee= cmdline option) */
+    const char *cmdline_name;
+
     /* Mediator callbacks as described above. */
     const struct tee_mediator_ops *ops;
 
@@ -77,6 +80,7 @@ void tee_free_domain_ctx(struct domain *d);
 static const struct tee_mediator_desc __tee_desc_##_name __used     \
 __section(".teemediator.info") = {                                  \
     .name = _namestr,                                               \
+    .cmdline_name = #_name,                                         \
     .ops = _ops,                                                    \
     .tee_type = _type                                               \
 }
diff --git a/xen/arch/arm/tee/tee.c b/xen/arch/arm/tee/tee.c
index 3f65e45a7892..8501443c8e57 100644
--- a/xen/arch/arm/tee/tee.c
+++ b/xen/arch/arm/tee/tee.c
@@ -18,6 +18,7 @@
 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -25,6 +26,10 @@
 extern const struct tee_mediator_desc _steemediator[], _eteemediator[];
 static const struct tee_mediator_desc __read_mostly *cur_mediator;
 
+/* Select the TEE mediator using a name on command line. */
+static char __initdata opt_mediator[16] = "";
+string_param("tee", opt_mediator);
+
 /*
  * TODO: Add function to alter Dom0 DTB, so we can properly describe
  * present TEE.
@@ -80,15 +85,42 @@ uint16_t tee_get_type(void)
 static int __init tee_init(void)
 {
     const struct tee_mediator_desc *desc;
+    bool select_mediator = strcmp(opt_mediator, "");
+
+    if ( select_mediator )
+        printk(XENLOG_INFO "TEE Mediator %s selected from command line\n",
+               opt_mediator);
 
+    /*
+     * When a specific TEE is selected using the 'tee=' command line
+     * argument, we panic if the probe fails or if the requested TEE is not
+     * supported.
+     */
     for ( desc = _steemediator; desc != _eteemediator; desc++ )
     {
+        if ( select_mediator &&
+             strncmp(opt_mediator, desc->cmdline_name, sizeof(opt_mediator)) )
+            continue;
+
         if ( desc->ops->probe() )
         {
             printk(XENLOG_INFO "Using TEE mediator for %s\n", desc->name);
             cur_mediator = desc;
             return 0;
         }
+        else if ( select_mediator )
+        {
+            panic("TEE mediator %s from command line probe failed\n",
+                  opt_mediator);
+            return -EFAULT;
+        }
+    }
+
+    if ( select_mediator )
+    {
+        panic("TEE Mediator %s from command line not supported\n",
+              opt_mediator);
+        return -EINVAL;
     }
 
     return 0;
-- 
2.47.1



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	Volodymyr Babchuk ,
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Subject: [PATCH v5 2/6] xen/arm: ffa: Rework partinfo_get implementation
Date: Wed, 16 Apr 2025 09:39:43 +0200
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This patch is in preparation for VM to VM support in order to do the
changes on the SP handling part of partinfo_get before adding support
for the VM part.

This patches is doing the following changes:
- split partinfo_get into 3 functions to have the locking handling and
  proper exit on error handled more clearly
- add some potential overflow checks to validate the offset and sizes
  passed by the VM on partinfo call.
- Introduce a maximum number of SPs (for now set to 64) to prevent
  holding the CPU for too long in case there would be a lot of
  partitions in the secure world. The limit currently set is thought to
  be realistic for most use cases as 64 secure partitions is a very high
  number compared to current seen usage (more 3 or 4).
- fix include ordering in ffa_private.h to be in alphabetic order

Signed-off-by: Bertrand Marquis 
---
Changes in v5:
- patch added
---
 xen/arch/arm/tee/ffa_partinfo.c | 201 +++++++++++++++++++-------------
 xen/arch/arm/tee/ffa_private.h  |  18 ++-
 2 files changed, 131 insertions(+), 88 deletions(-)

diff --git a/xen/arch/arm/tee/ffa_partinfo.c b/xen/arch/arm/tee/ffa_partinfo.c
index c0510ceb8338..e524445c6fb8 100644
--- a/xen/arch/arm/tee/ffa_partinfo.c
+++ b/xen/arch/arm/tee/ffa_partinfo.c
@@ -63,9 +63,95 @@ static int32_t ffa_partition_info_get(uint32_t *uuid, uint32_t flags,
     return ret;
 }
 
-void ffa_handle_partition_info_get(struct cpu_user_regs *regs)
+static int32_t ffa_get_sp_count(uint32_t *uuid, uint32_t *sp_count)
+{
+    uint32_t src_size;
+
+    return ffa_partition_info_get(uuid, FFA_PARTITION_INFO_GET_COUNT_FLAG,
+                                  sp_count, &src_size);
+}
+
+static int32_t ffa_get_sp_partinfo(uint32_t *uuid, uint32_t *sp_count,
+                                   void *dst_buf, void *end_buf,
+                                   uint32_t dst_size)
 {
     int32_t ret;
+    uint32_t src_size, real_sp_count;
+    void *src_buf = ffa_rx;
+    uint32_t count = 0;
+
+    /* Do we have a RX buffer with the SPMC */
+    if ( !ffa_rx )
+        return FFA_RET_DENIED;
+
+    /* We need to use the RX buffer to receive the list */
+    spin_lock(&ffa_rx_buffer_lock);
+
+    ret = ffa_partition_info_get(uuid, 0, &real_sp_count, &src_size);
+    if ( ret )
+        goto out;
+
+    /* We now own the RX buffer */
+
+    /* Validate the src_size we got */
+    if ( src_size < sizeof(struct ffa_partition_info_1_0) ||
+         src_size >= FFA_PAGE_SIZE )
+    {
+        ret = FFA_RET_NOT_SUPPORTED;
+        goto out_release;
+    }
+
+    /*
+     * Limit the maximum time we hold the CPU by limiting the number of SPs.
+     * We just ignore the extra ones as this is tested during init in
+     * ffa_partinfo_init so the only possible reason is SP have been added
+     * since boot.
+     */
+    if ( real_sp_count > FFA_MAX_NUM_SP )
+        real_sp_count = FFA_MAX_NUM_SP;
+
+    /* Make sure the data fits in our buffer */
+    if ( real_sp_count > (FFA_RXTX_PAGE_COUNT * FFA_PAGE_SIZE) / src_size )
+    {
+        ret = FFA_RET_NOT_SUPPORTED;
+        goto out_release;
+    }
+
+    for ( uint32_t sp_num = 0; sp_num < real_sp_count; sp_num++ )
+    {
+        struct ffa_partition_info_1_1 *fpi = src_buf;
+
+        /* filter out SP not following bit 15 convention if any */
+        if ( FFA_ID_IS_SECURE(fpi->id) )
+        {
+            if ( dst_buf > (end_buf - dst_size) )
+            {
+                ret = FFA_RET_NO_MEMORY;
+                goto out_release;
+            }
+
+            memcpy(dst_buf, src_buf, MIN(src_size, dst_size));
+            if ( dst_size > src_size )
+                memset(dst_buf + src_size, 0, dst_size - src_size);
+
+            dst_buf += dst_size;
+            count++;
+        }
+
+        src_buf += src_size;
+    }
+
+    *sp_count = count;
+
+out_release:
+    ffa_hyp_rx_release();
+out:
+    spin_unlock(&ffa_rx_buffer_lock);
+    return ret;
+}
+void ffa_handle_partition_info_get(struct cpu_user_regs *regs)
+{
+    int32_t ret = FFA_RET_OK;
     struct domain *d = current->domain;
     struct ffa_ctx *ctx = d->arch.tee;
     uint32_t flags = get_user_reg(regs, 5);
@@ -75,8 +161,8 @@ void ffa_handle_partition_info_get(struct cpu_user_regs *regs)
         get_user_reg(regs, 3),
         get_user_reg(regs, 4),
     };
-    uint32_t src_size, dst_size;
-    void *dst_buf;
+    uint32_t dst_size = 0;
+    void *dst_buf, *end_buf;
     uint32_t ffa_sp_count = 0;
 
     /*
@@ -89,31 +175,26 @@ void ffa_handle_partition_info_get(struct cpu_user_regs *regs)
     else
         dst_size = sizeof(struct ffa_partition_info_1_1);
 
-    /*
-     * FF-A v1.0 has w5 MBZ while v1.1 allows
-     * FFA_PARTITION_INFO_GET_COUNT_FLAG to be non-zero.
-     *
-     * FFA_PARTITION_INFO_GET_COUNT is only using registers and not the
-     * rxtx buffer so do the partition_info_get directly.
-     */
-    if ( flags == FFA_PARTITION_INFO_GET_COUNT_FLAG &&
-         ctx->guest_vers == FFA_VERSION_1_1 )
+    /* Only count requested */
+    if ( flags )
     {
+        /*
+         * FF-A v1.0 has w5 MBZ while v1.1 allows
+         * FFA_PARTITION_INFO_GET_COUNT_FLAG to be non-zero.
+         */
+        if ( ctx->guest_vers == FFA_VERSION_1_0 ||
+                flags != FFA_PARTITION_INFO_GET_COUNT_FLAG )
+        {
+            ret = FFA_RET_INVALID_PARAMETERS;
+            goto out;
+        }
+
         if ( ffa_fw_supports_fid(FFA_PARTITION_INFO_GET) )
-            ret = ffa_partition_info_get(uuid, flags, &ffa_sp_count,
-                                        &src_size);
-        else
-            ret = FFA_RET_OK;
+            ret = ffa_get_sp_count(uuid, &ffa_sp_count);
 
         goto out;
     }
 
-    if ( flags )
-    {
-        ret = FFA_RET_INVALID_PARAMETERS;
-        goto out;
-    }
-
     if ( !ffa_fw_supports_fid(FFA_PARTITION_INFO_GET) )
     {
         /* Just give an empty partition list to the caller */
@@ -121,80 +202,33 @@ void ffa_handle_partition_info_get(struct cpu_user_regs *regs)
         goto out;
     }
 
+    /* Get the RX buffer to write the list of partitions */
     ret = ffa_rx_acquire(d);
     if ( ret != FFA_RET_OK )
         goto out;
 
     dst_buf = ctx->rx;
+    end_buf = ctx->rx + ctx->page_count * FFA_PAGE_SIZE;
 
-    if ( !ffa_rx )
-    {
-        ret = FFA_RET_DENIED;
-        goto out_rx_release;
-    }
-
-    spin_lock(&ffa_rx_buffer_lock);
-
-    ret = ffa_partition_info_get(uuid, 0, &ffa_sp_count, &src_size);
-
-    if ( ret )
-        goto out_rx_hyp_unlock;
+    /* An entry should be smaller than a page */
+    BUILD_BUG_ON(sizeof(struct ffa_partition_info_1_1) > FFA_PAGE_SIZE);
 
     /*
-     * ffa_partition_info_get() succeeded so we now own the RX buffer we
-     * share with the SPMC. We must give it back using ffa_hyp_rx_release()
-     * once we've copied the content.
+     * Check for overflow and that we can at least store one entry.
+     * page_count cannot be 0 so we have at least one page.
      */
-
-    /* we cannot have a size smaller than 1.0 structure */
-    if ( src_size < sizeof(struct ffa_partition_info_1_0) )
-    {
-        ret = FFA_RET_NOT_SUPPORTED;
-        goto out_rx_hyp_release;
-    }
-
-    if ( ctx->page_count * FFA_PAGE_SIZE < ffa_sp_count * dst_size )
+    if ( dst_buf >= end_buf || dst_buf > (end_buf - dst_size) )
     {
-        ret = FFA_RET_NO_MEMORY;
-        goto out_rx_hyp_release;
+        ret = FFA_RET_INVALID_PARAMETERS;
+        goto out_rx_release;
     }
 
-    if ( ffa_sp_count > 0 )
-    {
-        uint32_t n, n_limit = ffa_sp_count;
-        void *src_buf = ffa_rx;
-
-        /* copy the secure partitions info */
-        for ( n = 0; n < n_limit; n++ )
-        {
-            struct ffa_partition_info_1_1 *fpi = src_buf;
-
-            /* filter out SP not following bit 15 convention if any */
-            if ( FFA_ID_IS_SECURE(fpi->id) )
-            {
-                memcpy(dst_buf, src_buf, dst_size);
-                dst_buf += dst_size;
-            }
-            else
-                ffa_sp_count--;
+    ret = ffa_get_sp_partinfo(uuid, &ffa_sp_count, dst_buf, end_buf,
+                              dst_size);
 
-            src_buf += src_size;
-        }
-    }
 
-out_rx_hyp_release:
-    ffa_hyp_rx_release();
-out_rx_hyp_unlock:
-    spin_unlock(&ffa_rx_buffer_lock);
 out_rx_release:
-    /*
-     * The calling VM RX buffer only contains data to be used by the VM if the
-     * call was successful, in which case the VM has to release the buffer
-     * once it has used the data.
-     * If something went wrong during the call, we have to release the RX
-     * buffer back to the SPMC as the VM will not do it.
-     */
-    if ( ret != FFA_RET_OK )
+    if ( ret )
         ffa_rx_release(d);
 out:
     if ( ret )
@@ -353,9 +387,10 @@ bool ffa_partinfo_init(void)
         goto out;
     }
 
-    if ( count >= UINT16_MAX )
+    if ( count >= FFA_MAX_NUM_SP )
     {
-        printk(XENLOG_ERR "ffa: Impossible number of SPs: %u\n", count);
+        printk(XENLOG_ERR "ffa: More SPs than the maximum supported: %u - %u\n",
+               count, FFA_MAX_NUM_SP);
         goto out;
     }
 
diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_private.h
index c4cd65538908..0a9c1082db28 100644
--- a/xen/arch/arm/tee/ffa_private.h
+++ b/xen/arch/arm/tee/ffa_private.h
@@ -6,15 +6,15 @@
 #ifndef __FFA_PRIVATE_H__
 #define __FFA_PRIVATE_H__
 
+#include 
 #include 
-#include 
-#include 
-#include 
 #include 
-#include 
+#include 
 #include 
+#include 
+#include 
 #include 
-#include 
+#include 
 
 /* Error codes */
 #define FFA_RET_OK                      0
@@ -108,6 +108,14 @@
  */
 #define FFA_CTX_TEARDOWN_DELAY          SECONDS(1)
 
+/*
+ * The maximum number of Secure partitions we support for partinfo_get.
+ * This prevents holding the CPU during potentially to long time during
+ * a partinfo_get call. Value choosen seems realistic for any configuration
+ * but can be incremented here if needed.
+ */
+#define FFA_MAX_NUM_SP                  64
+
 /*
  * We rely on the convention suggested but not mandated by the FF-A
  * specification that secure world endpoint identifiers have the bit 15
-- 
2.47.1



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From: Bertrand Marquis 
To: xen-devel@lists.xenproject.org
Cc: jens.wiklander@linaro.org,
	Volodymyr Babchuk ,
	Stefano Stabellini ,
	Julien Grall ,
	Michal Orzel 
Subject: [PATCH v5 4/6] xen/arm: ffa: Add buffer full notification support
Date: Wed, 16 Apr 2025 09:39:45 +0200
Message-ID: <95b87ebec5ffa5e7200f6cc1ba8503c8d92c6f37.1744787720.git.bertrand.marquis@arm.com>
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Add support to raise a Rx buffer full notification to a VM.
This function will be used for indirect message support between VM and
is only activated if CONFIG_FFA_VM_TO_VM is selected.

Even if there are 32 framework notifications possible, right now only
one is defined so the implementation is simplified to only handle the
buffer full notification using a boolean. If other framework
notifications have to be supported one day, the design will have to be
modified to handle it properly.

Signed-off-by: Bertrand Marquis 
Reviewed-by: Jens Wiklander 
---
Changes in v5:
- None
Changes in v4:
- Add Jens R-b
Changes in v3:
- introduce a vm_pending boolean to track if VM notifications are
  pending and allow to decorelate pending secure notifications from
  pending vm ones
- remove ifdef around boolean entries for notifications and make use of
  IS_ENABLED instead of ifdefs when possible
- Fix notification number signaled to VMs for buffer full to use the
  proper GUEST_FFA_NOTIF_PEND_INTR_ID instead of the identifier received
  from the SPMC.
- Move back into this patch ffa_private.h part which was wrongly in the
  patch for indirect messages between VM
Changes in v2:
- Switch ifdef to IS_ENABLED when possible
---
 xen/arch/arm/tee/ffa_notif.c   | 36 ++++++++++++++++++++++++++++------
 xen/arch/arm/tee/ffa_private.h | 23 +++++++++++++++++++++-
 2 files changed, 52 insertions(+), 7 deletions(-)

diff --git a/xen/arch/arm/tee/ffa_notif.c b/xen/arch/arm/tee/ffa_notif.c
index 00efaf8f7353..f6df2f15bb00 100644
--- a/xen/arch/arm/tee/ffa_notif.c
+++ b/xen/arch/arm/tee/ffa_notif.c
@@ -69,6 +69,7 @@ void ffa_handle_notification_info_get(struct cpu_user_regs *regs)
 {
     struct domain *d = current->domain;
     struct ffa_ctx *ctx = d->arch.tee;
+    bool notif_pending;
 
     if ( !notif_enabled )
     {
@@ -76,7 +77,11 @@ void ffa_handle_notification_info_get(struct cpu_user_regs *regs)
         return;
     }
 
-    if ( test_and_clear_bool(ctx->notif.secure_pending) )
+    notif_pending = test_and_clear_bool(ctx->notif.secure_pending);
+    if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) )
+        notif_pending |= test_and_clear_bool(ctx->notif.vm_pending);
+
+    if ( notif_pending )
     {
         /* A pending global notification for the guest */
         ffa_set_regs(regs, FFA_SUCCESS_64, 0,
@@ -93,6 +98,7 @@ void ffa_handle_notification_info_get(struct cpu_user_regs *regs)
 void ffa_handle_notification_get(struct cpu_user_regs *regs)
 {
     struct domain *d = current->domain;
+    struct ffa_ctx *ctx = d->arch.tee;
     uint32_t recv = get_user_reg(regs, 1);
     uint32_t flags = get_user_reg(regs, 2);
     uint32_t w2 = 0;
@@ -132,11 +138,7 @@ void ffa_handle_notification_get(struct cpu_user_regs *regs)
          */
         if ( ( flags  & FFA_NOTIF_FLAG_BITMAP_SP ) &&
              ( flags & FFA_NOTIF_FLAG_BITMAP_SPM ) )
-        {
-                struct ffa_ctx *ctx = d->arch.tee;
-
-                ACCESS_ONCE(ctx->notif.secure_pending) = false;
-        }
+            ACCESS_ONCE(ctx->notif.secure_pending) = false;
 
         arm_smccc_1_2_smc(&arg, &resp);
         e = ffa_get_ret_code(&resp);
@@ -156,6 +158,14 @@ void ffa_handle_notification_get(struct cpu_user_regs *regs)
             w6 = resp.a6;
     }
 
+    if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) &&
+          flags & FFA_NOTIF_FLAG_BITMAP_HYP &&
+          test_and_clear_bool(ctx->notif.buff_full_pending) )
+    {
+        ACCESS_ONCE(ctx->notif.vm_pending) = false;
+        w7 = FFA_NOTIF_RX_BUFFER_FULL;
+    }
+
     ffa_set_regs(regs, FFA_SUCCESS_32, 0, w2, w3, w4, w5, w6, w7);
 }
 
@@ -178,6 +188,20 @@ int ffa_handle_notification_set(struct cpu_user_regs *regs)
                            bitmap_hi);
 }
 
+#ifdef CONFIG_FFA_VM_TO_VM
+void ffa_raise_rx_buffer_full(struct domain *d)
+{
+    struct ffa_ctx *ctx = d->arch.tee;
+
+    if ( !ctx )
+        return;
+
+    ACCESS_ONCE(ctx->notif.buff_full_pending) = true;
+    if ( !test_and_set_bool(ctx->notif.vm_pending) )
+        vgic_inject_irq(d, d->vcpu[0], GUEST_FFA_NOTIF_PEND_INTR_ID, true);
+}
+#endif
+
 /*
  * Extract a 16-bit ID (index n) from the successful return value from
  * FFA_NOTIFICATION_INFO_GET_64 or FFA_NOTIFICATION_INFO_GET_32. IDs are
diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_private.h
index 52c1078b06f4..63c21c1fc0f7 100644
--- a/xen/arch/arm/tee/ffa_private.h
+++ b/xen/arch/arm/tee/ffa_private.h
@@ -218,6 +218,8 @@
 #define FFA_NOTIF_INFO_GET_ID_COUNT_SHIFT   7
 #define FFA_NOTIF_INFO_GET_ID_COUNT_MASK    0x1F
 
+#define FFA_NOTIF_RX_BUFFER_FULL        BIT(0, U)
+
 /* Feature IDs used with FFA_FEATURES */
 #define FFA_FEATURE_NOTIF_PEND_INTR     0x1U
 #define FFA_FEATURE_SCHEDULE_RECV_INTR  0x2U
@@ -303,9 +305,20 @@ struct ffa_mem_region {
 struct ffa_ctx_notif {
     /*
      * True if domain is reported by FFA_NOTIFICATION_INFO_GET to have
-     * pending global notifications.
+     * pending notifications from the secure world.
      */
     bool secure_pending;
+
+    /*
+     * True if domain is reported by FFA_NOTIFICATION_INFO_GET to have
+     * pending notifications from VMs (including framework ones).
+     */
+    bool vm_pending;
+
+    /*
+     * True if domain has buffer full notification pending
+     */
+    bool buff_full_pending;
 };
 
 struct ffa_ctx {
@@ -414,6 +427,14 @@ void ffa_handle_notification_info_get(struct cpu_user_regs *regs);
 void ffa_handle_notification_get(struct cpu_user_regs *regs);
 int ffa_handle_notification_set(struct cpu_user_regs *regs);
 
+#ifdef CONFIG_FFA_VM_TO_VM
+void ffa_raise_rx_buffer_full(struct domain *d);
+#else
+static inline void ffa_raise_rx_buffer_full(struct domain *d)
+{
+}
+#endif
+
 void ffa_handle_msg_send_direct_req(struct cpu_user_regs *regs, uint32_t fid);
 int32_t ffa_handle_msg_send2(struct cpu_user_regs *regs);
 
-- 
2.47.1



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To: xen-devel@lists.xenproject.org
Cc: jens.wiklander@linaro.org,
	Volodymyr Babchuk ,
	Stefano Stabellini ,
	Julien Grall ,
	Michal Orzel 
Subject: [PATCH v5 3/6] xen/arm: ffa: Introduce VM to VM support
Date: Wed, 16 Apr 2025 09:39:44 +0200
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Create a CONFIG_FFA_VM_TO_VM parameter to activate FFA communication
between VMs.
When activated list VMs in the system with FF-A support in part_info_get.

When VM to VM is activated, Xen will be tainted as Insecure and a
message is displayed to the user during the boot as there is no
filtering of VMs in FF-A so any VM can communicate or see any other VM
in the system.

WARNING: There is no filtering for now and all VMs are listed !!

This patch is reorganizing the ffa_ctx structure to make clear which
lock is protecting what parts.

This patch is introducing a chain list of the ffa_ctx with a FFA Version
negociated allowing to create the partinfo results for VMs without
taking a lock on the global domain list in Xen.

Signed-off-by: Bertrand Marquis 
---
Changes in v5:
- remove invalid comment about 1.1 firmware support
- rename variables from d and dom to curr_d and dest_d (Julien)
- add a TODO in the code for potential holding for long of the CPU
  (Julien)
- use an atomic global variable to store the number of VMs instead of
  recomputing the value each time (Julien)
- add partinfo information in ffa_ctx (id, cpus and 64bit) and create a
  chain list of ctx. Use this chain list to create the partinfo result
  without holding a global lock to prevent concurrency issues.
- Move some changes in a preparation patch modifying partinfo for sps to
  reduce this patch size and make the review easier
Changes in v4:
- properly handle SPMC version 1.0 header size case in partinfo_get
- switch to local counting variables instead of *pointer += 1 form
- coding style issue with missing spaces in if ()
Changes in v3:
- break partinfo_get in several sub functions to make the implementation
  easier to understand and lock handling easier
- rework implementation to check size along the way and prevent previous
  implementation limits which had to check that the number of VMs or SPs
  did not change
- taint Xen as INSECURE when VM to VM is enabled
Changes in v2:
- Switch ifdef to IS_ENABLED
- dom was not switched to d as requested by Jan because there is already
  a variable d pointing to the current domain and it must not be
  shadowed.
---
 xen/arch/arm/tee/Kconfig        |  11 ++++
 xen/arch/arm/tee/ffa.c          |  47 +++++++++++++-
 xen/arch/arm/tee/ffa_partinfo.c |  95 ++++++++++++++++++++++++---
 xen/arch/arm/tee/ffa_private.h  | 112 ++++++++++++++++++++++++++------
 4 files changed, 233 insertions(+), 32 deletions(-)

diff --git a/xen/arch/arm/tee/Kconfig b/xen/arch/arm/tee/Kconfig
index c5b0f88d7522..88a4c4c99154 100644
--- a/xen/arch/arm/tee/Kconfig
+++ b/xen/arch/arm/tee/Kconfig
@@ -28,5 +28,16 @@ config FFA
 
 	  [1] https://developer.arm.com/documentation/den0077/latest
 
+config FFA_VM_TO_VM
+    bool "Enable FF-A between VMs (UNSUPPORTED)" if UNSUPPORTED
+    default n
+    depends on FFA
+    help
+      This option enables to use FF-A between VMs.
+      This is experimental and there is no access control so any
+      guest can communicate with any other guest.
+
+      If unsure, say N.
+
 endmenu
 
diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c
index 3bbdd7168a6b..c1c4c0957091 100644
--- a/xen/arch/arm/tee/ffa.c
+++ b/xen/arch/arm/tee/ffa.c
@@ -118,6 +118,13 @@ void *ffa_tx __read_mostly;
 DEFINE_SPINLOCK(ffa_rx_buffer_lock);
 DEFINE_SPINLOCK(ffa_tx_buffer_lock);
 
+struct list_head ffa_ctx_head;
+/* Lock to protect addition/removal in ffa_ctx_head */
+DEFINE_SPINLOCK(ffa_ctx_list_lock);
+
+#ifdef CONFIG_FFA_VM_TO_VM
+atomic_t ffa_vm_count;
+#endif
 
 /* Used to track domains that could not be torn down immediately. */
 static struct timer ffa_teardown_timer;
@@ -160,10 +167,21 @@ static void handle_version(struct cpu_user_regs *regs)
      */
     if ( FFA_VERSION_MAJOR(vers) == FFA_MY_VERSION_MAJOR )
     {
+        uint32_t old_vers = ACCESS_ONCE(ctx->guest_vers);
+
         if ( FFA_VERSION_MINOR(vers) > FFA_MY_VERSION_MINOR )
-            ctx->guest_vers = FFA_MY_VERSION;
+            ACCESS_ONCE(ctx->guest_vers) = FFA_MY_VERSION;
         else
-            ctx->guest_vers = vers;
+            ACCESS_ONCE(ctx->guest_vers) = vers;
+
+        if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) && !old_vers )
+        {
+            /* One more VM with FF-A support available */
+            inc_ffa_vm_count();
+            spin_lock(&ffa_ctx_list_lock);
+            list_add_tail(&ctx->ctx_list, &ffa_ctx_head);
+            spin_unlock(&ffa_ctx_list_lock);
+        }
     }
     ffa_set_regs(regs, FFA_MY_VERSION, 0, 0, 0, 0, 0, 0, 0);
 }
@@ -345,6 +363,10 @@ static int ffa_domain_init(struct domain *d)
     ctx->teardown_d = d;
     INIT_LIST_HEAD(&ctx->shm_list);
 
+    ctx->ffa_id = ffa_get_vm_id(d);
+    ctx->num_vcpus = d->max_vcpus;
+    ctx->is_64bit = is_64bit_domain(d);
+
     /*
      * ffa_domain_teardown() will be called if ffa_domain_init() returns an
      * error, so no need for cleanup in this function.
@@ -421,6 +443,14 @@ static int ffa_domain_teardown(struct domain *d)
     if ( !ctx )
         return 0;
 
+    if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) && ACCESS_ONCE(ctx->guest_vers) )
+    {
+        dec_ffa_vm_count();
+        spin_lock(&ffa_ctx_list_lock);
+        list_del(&ctx->ctx_list);
+        spin_unlock(&ffa_ctx_list_lock);
+    }
+
     ffa_rxtx_domain_destroy(d);
     ffa_notif_domain_destroy(d);
 
@@ -464,6 +494,18 @@ static bool ffa_probe(void)
     printk(XENLOG_INFO "ARM FF-A Mediator version %u.%u\n",
            FFA_MY_VERSION_MAJOR, FFA_MY_VERSION_MINOR);
 
+    if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) )
+    {
+        /*
+         * When FFA VM to VM is enabled, the current implementation does not
+         * offer any way to limit which VM can communicate with which VM using
+         * FF-A.
+         * Signal this in the xen console and taint the system as insecure.
+         * TODO: Introduce a solution to limit what a VM can do through FFA.
+         */
+        printk(XENLOG_ERR "ffa: VM to VM is enabled, system is insecure !!\n");
+        add_taint(TAINT_MACHINE_INSECURE);
+    }
     /*
      * psci_init_smccc() updates this value with what's reported by EL-3
      * or secure world.
@@ -538,6 +580,7 @@ static bool ffa_probe(void)
 
     ffa_notif_init();
     INIT_LIST_HEAD(&ffa_teardown_head);
+    INIT_LIST_HEAD(&ffa_ctx_head);
     init_timer(&ffa_teardown_timer, ffa_teardown_timer_callback, NULL, 0);
 
     return true;
diff --git a/xen/arch/arm/tee/ffa_partinfo.c b/xen/arch/arm/tee/ffa_partinfo.c
index e524445c6fb8..66ea1860e97a 100644
--- a/xen/arch/arm/tee/ffa_partinfo.c
+++ b/xen/arch/arm/tee/ffa_partinfo.c
@@ -149,6 +149,68 @@ out:
     spin_unlock(&ffa_rx_buffer_lock);
     return ret;
 }
+
+static int32_t ffa_get_vm_partinfo(uint32_t *vm_count, void *dst_buf,
+                                   void *end_buf, uint32_t dst_size)
+{
+    struct ffa_ctx *curr_ctx = current->domain->arch.tee;
+    struct ffa_ctx *dest_ctx, *tmp;
+    uint32_t count = 0;
+
+    /*
+     * There could potentially be a lot of VMs in the system and we could
+     * hold the CPU for long here.
+     * Right now there is no solution in FF-A specification to split
+     * the work in this case.
+     * TODO: Check how we could delay the work or have preemption checks.
+     */
+    list_for_each_entry_safe(dest_ctx, tmp, &ffa_ctx_head, ctx_list)
+    {
+        /*
+         * Do not include an entry for the caller VM as the spec is not
+         * clearly mandating it and it is not supported by Linux.
+         */
+        if ( dest_ctx != curr_ctx )
+        {
+            /*
+             * We do not have UUID info for VMs so use
+             * the 1.0 structure so that we set UUIDs to
+             * zero using memset
+             */
+            struct ffa_partition_info_1_0 info;
+
+            if  ( dst_buf > (end_buf - dst_size) )
+            {
+                return FFA_RET_NO_MEMORY;
+            }
+
+            /*
+             * Context might has been removed since we go it or being removed
+             * right now so we might return information for a VM not existing
+             * anymore. This is acceptable as we return a view of the system
+             * which could change at any time.
+             */
+            info.id = dest_ctx->ffa_id;
+            info.execution_context = dest_ctx->num_vcpus;
+            info.partition_properties = FFA_PART_VM_PROP;
+            if ( dest_ctx->is_64bit )
+                info.partition_properties |= FFA_PART_PROP_AARCH64_STATE;
+
+            memcpy(dst_buf, &info, MIN(sizeof(info), dst_size));
+
+            if ( dst_size > sizeof(info) )
+                memset(dst_buf + sizeof(info), 0,
+                       dst_size - sizeof(info));
+
+            dst_buf += dst_size;
+            count++;
+        }
+    }
+    *vm_count = count;
+
+    return FFA_RET_OK;
+}
+
 void ffa_handle_partition_info_get(struct cpu_user_regs *regs)
 {
     int32_t ret = FFA_RET_OK;
@@ -163,7 +225,7 @@ void ffa_handle_partition_info_get(struct cpu_user_regs *regs)
     };
     uint32_t dst_size = 0;
     void *dst_buf, *end_buf;
-    uint32_t ffa_sp_count = 0;
+    uint32_t ffa_vm_count = 0, ffa_sp_count = 0;
 
     /*
      * If the guest is v1.0, he does not get back the entry size so we must
@@ -190,15 +252,18 @@ void ffa_handle_partition_info_get(struct cpu_user_regs *regs)
         }
 
         if ( ffa_fw_supports_fid(FFA_PARTITION_INFO_GET) )
+        {
             ret = ffa_get_sp_count(uuid, &ffa_sp_count);
+            if ( ret )
+                goto out;
+        }
 
-        goto out;
-    }
+        /*
+         * Do not count the caller VM as the spec is not clearly mandating it
+         * and it is not supported by Linux.
+         */
+        ffa_vm_count = get_ffa_vm_count() - 1;
 
-    if ( !ffa_fw_supports_fid(FFA_PARTITION_INFO_GET) )
-    {
-        /* Just give an empty partition list to the caller */
-        ret = FFA_RET_OK;
         goto out;
     }
 
@@ -223,9 +288,19 @@ void ffa_handle_partition_info_get(struct cpu_user_regs *regs)
         goto out_rx_release;
     }
 
-    ret = ffa_get_sp_partinfo(uuid, &ffa_sp_count, dst_buf, end_buf,
-                              dst_size);
+    if ( ffa_fw_supports_fid(FFA_PARTITION_INFO_GET) )
+    {
+        ret = ffa_get_sp_partinfo(uuid, &ffa_sp_count, dst_buf, end_buf,
+                                  dst_size);
+
+        if ( ret )
+            goto out_rx_release;
+
+        dst_buf += ffa_sp_count * dst_size;
+    }
 
+    if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) )
+        ret = ffa_get_vm_partinfo(&ffa_vm_count, dst_buf, end_buf, dst_size);
 
 out_rx_release:
     if ( ret )
@@ -234,7 +309,7 @@ out:
     if ( ret )
         ffa_set_regs_error(regs, ret);
     else
-        ffa_set_regs_success(regs, ffa_sp_count, dst_size);
+        ffa_set_regs_success(regs, ffa_sp_count + ffa_vm_count, dst_size);
 }
 
 static int32_t ffa_direct_req_send_vm(uint16_t sp_id, uint16_t vm_id,
diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_private.h
index 0a9c1082db28..52c1078b06f4 100644
--- a/xen/arch/arm/tee/ffa_private.h
+++ b/xen/arch/arm/tee/ffa_private.h
@@ -195,6 +195,18 @@
  */
 #define FFA_PARTITION_INFO_GET_COUNT_FLAG BIT(0, U)
 
+/*
+ * Partition properties we give for a normal world VM:
+ * - can send direct message but not receive them
+ * - can handle indirect messages
+ * - can receive notifications
+ * 32/64 bit flag is set depending on the VM
+ */
+#define FFA_PART_VM_PROP    (FFA_PART_PROP_DIRECT_REQ_SEND | \
+                             FFA_PART_PROP_INDIRECT_MSGS | \
+                             FFA_PART_PROP_RECV_NOTIF | \
+                             FFA_PART_PROP_IS_PE_ID)
+
 /* Flags used in calls to FFA_NOTIFICATION_GET interface  */
 #define FFA_NOTIF_FLAG_BITMAP_SP        BIT(0, U)
 #define FFA_NOTIF_FLAG_BITMAP_VM        BIT(1, U)
@@ -297,36 +309,66 @@ struct ffa_ctx_notif {
 };
 
 struct ffa_ctx {
-    void *rx;
-    const void *tx;
-    struct page_info *rx_pg;
-    struct page_info *tx_pg;
-    /* Number of 4kB pages in each of rx/rx_pg and tx/tx_pg */
-    unsigned int page_count;
+    /*
+     * Chain list of all FF-A contexts, to prevent locking access to this list,
+     * all "unlocked" data from the structure must be set before adding an
+     * entry in the list and an entry must be removed from the list before
+     * freeing a context.
+     */
+    struct list_head ctx_list; /* chain list of all FF-A contexts */
+
+    /*
+     * Data access unlocked (mainly for part_info_get in VM to VM).
+     * Those should be set before the ctx is added in the list.
+     */
+    /* FF-A Endpoint ID */
+    uint16_t ffa_id;
+    uint16_t num_vcpus;
+    bool is_64bit;
+
+    /*
+     * Global data accessed atomically or using ACCES_ONCE.
+     */
     /* FF-A version used by the guest */
     uint32_t guest_vers;
-    bool rx_is_free;
-    /* Used shared memory objects, struct ffa_shm_mem */
-    struct list_head shm_list;
+    struct ffa_ctx_notif notif;
+
+    /*
+     * Global data accessed with lock locked.
+     */
+    spinlock_t lock;
+    /* Number of 4kB pages in each of rx/rx_pg and tx/tx_pg */
+    unsigned int page_count;
     /* Number of allocated shared memory object */
     unsigned int shm_count;
-    struct ffa_ctx_notif notif;
+    /* Used shared memory objects, struct ffa_shm_mem */
+    struct list_head shm_list;
+
     /*
-     * tx_lock is used to serialize access to tx
-     * rx_lock is used to serialize access to rx_is_free
-     * lock is used for the rest in this struct
+     * Rx buffer, accessed with rx_lock locked.
+     * rx_is_free is used to serialize access.
      */
-    spinlock_t tx_lock;
     spinlock_t rx_lock;
-    spinlock_t lock;
-    /* Used if domain can't be torn down immediately */
+    bool rx_is_free;
+    void *rx;
+    struct page_info *rx_pg;
+
+    /*
+     * Tx buffer, access with tx_lock locked.
+     */
+    spinlock_t tx_lock;
+    const void *tx;
+    struct page_info *tx_pg;
+
+
+    /*
+     * Domain teardown handling if data shared or used by other domains
+     * do not allow to teardown the domain immediately.
+     */
     struct domain *teardown_d;
     struct list_head teardown_list;
     s_time_t teardown_expire;
-    /*
-     * Used for ffa_domain_teardown() to keep track of which SPs should be
-     * notified that this guest is being destroyed.
-     */
+    /* Keep track of SPs that should be notified of VM destruction */
     unsigned long *vm_destroy_bitmap;
 };
 
@@ -334,8 +376,15 @@ extern void *ffa_rx;
 extern void *ffa_tx;
 extern spinlock_t ffa_rx_buffer_lock;
 extern spinlock_t ffa_tx_buffer_lock;
+extern spinlock_t ffa_ctx_list_lock;
 extern DECLARE_BITMAP(ffa_fw_abi_supported, FFA_ABI_BITMAP_SIZE);
 
+extern struct list_head ffa_ctx_head;
+
+#ifdef CONFIG_FFA_VM_TO_VM
+extern atomic_t ffa_vm_count;
+#endif
+
 bool ffa_shm_domain_destroy(struct domain *d);
 void ffa_handle_mem_share(struct cpu_user_regs *regs);
 int ffa_handle_mem_reclaim(uint64_t handle, uint32_t flags);
@@ -368,6 +417,29 @@ int ffa_handle_notification_set(struct cpu_user_regs *regs);
 void ffa_handle_msg_send_direct_req(struct cpu_user_regs *regs, uint32_t fid);
 int32_t ffa_handle_msg_send2(struct cpu_user_regs *regs);
 
+#ifdef CONFIG_FFA_VM_TO_VM
+static inline uint16_t get_ffa_vm_count(void)
+{
+    return atomic_read(&ffa_vm_count);
+}
+
+static inline void inc_ffa_vm_count(void)
+{
+    atomic_inc(&ffa_vm_count);
+}
+
+static inline void dec_ffa_vm_count(void)
+{
+    ASSERT(atomic_read(&ffa_vm_count) > 0);
+    atomic_dec(&ffa_vm_count);
+}
+#else
+/* Only count the caller VM */
+#define get_ffa_vm_count()  ((uint16_t)1UL)
+#define inc_ffa_vm_count()  do {} while(0)
+#define dec_ffa_vm_count()  do {} while(0)
+#endif
+
 static inline uint16_t ffa_get_vm_id(const struct domain *d)
 {
     /* +1 since 0 is reserved for the hypervisor in FF-A */
-- 
2.47.1



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From: Bertrand Marquis 
To: xen-devel@lists.xenproject.org
Cc: jens.wiklander@linaro.org,
	Volodymyr Babchuk ,
	Stefano Stabellini ,
	Julien Grall ,
	Michal Orzel 
Subject: [PATCH v5 5/6] xen/arm: ffa: Add indirect message between VM
Date: Wed, 16 Apr 2025 09:39:46 +0200
Message-ID: <81ec9ce34c3990b02ec6427d95b6238445333b57.1744787720.git.bertrand.marquis@arm.com>
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Add support for indirect messages between VMs.
This is only enabled if CONFIG_FFA_VM_TO_VM is selected.

Signed-off-by: Bertrand Marquis 
---
Changes in v5:
- Prevent potential overflow in send2 handling (Julien)
- Only use page_count with rx lock acquired
- Fix an issue where send2 between VMs was not doing the copy from the
  tx buffer but from a wrong location in the stack. This bug was
  introduced in v4 when switching to a local copy for the header.
Changes in v4:
- Use a local copy of the message header to prevent a TOC/TOU possible
  issue when using the payload size
Changes in v3:
- Move vm to vm indirect message handling in a sub function to simplify
  lock handling and make implementation easier to read
Changes in v2:
- Switch ifdef to IS_ENABLED
---
 xen/arch/arm/tee/ffa_msg.c | 115 ++++++++++++++++++++++++++++++++-----
 1 file changed, 101 insertions(+), 14 deletions(-)

diff --git a/xen/arch/arm/tee/ffa_msg.c b/xen/arch/arm/tee/ffa_msg.c
index ee594e737fc7..35de260c013a 100644
--- a/xen/arch/arm/tee/ffa_msg.c
+++ b/xen/arch/arm/tee/ffa_msg.c
@@ -88,43 +88,130 @@ out:
                  resp.a7 & mask);
 }
 
+static int32_t ffa_msg_send2_vm(uint16_t dst_id, const void *src_buf,
+                                struct ffa_part_msg_rxtx *src_msg)
+{
+    struct domain *dst_d;
+    struct ffa_ctx *dst_ctx;
+    struct ffa_part_msg_rxtx *dst_msg;
+    int err;
+    int32_t ret;
+
+    if ( dst_id == 0 )
+        /* FF-A ID 0 is the hypervisor, this is not valid */
+        return FFA_RET_INVALID_PARAMETERS;
+
+    /* This is also checking that dest is not src */
+    err = rcu_lock_live_remote_domain_by_id(dst_id - 1, &dst_d);
+    if ( err )
+        return FFA_RET_INVALID_PARAMETERS;
+
+    if ( dst_d->arch.tee == NULL )
+    {
+        ret = FFA_RET_INVALID_PARAMETERS;
+        goto out_unlock;
+    }
+
+    dst_ctx = dst_d->arch.tee;
+    if ( !dst_ctx->guest_vers )
+    {
+        ret = FFA_RET_INVALID_PARAMETERS;
+        goto out_unlock;
+    }
+
+    /* This also checks that destination has set a Rx buffer */
+    ret = ffa_rx_acquire(dst_d);
+    if ( ret )
+        goto out_unlock;
+
+    /* we need to have enough space in the destination buffer */
+    if ( (dst_ctx->page_count * FFA_PAGE_SIZE -
+          sizeof(struct ffa_part_msg_rxtx)) < src_msg->msg_size )
+    {
+        ret = FFA_RET_NO_MEMORY;
+        ffa_rx_release(dst_d);
+        goto out_unlock;
+    }
+
+    dst_msg = dst_ctx->rx;
+
+    /* prepare destination header */
+    dst_msg->flags = 0;
+    dst_msg->reserved = 0;
+    dst_msg->msg_offset = sizeof(struct ffa_part_msg_rxtx);
+    dst_msg->send_recv_id = src_msg->send_recv_id;
+    dst_msg->msg_size = src_msg->msg_size;
+
+    memcpy(dst_ctx->rx + sizeof(struct ffa_part_msg_rxtx),
+           src_buf + src_msg->msg_offset, src_msg->msg_size);
+
+    /* receiver rx buffer will be released by the receiver*/
+
+out_unlock:
+    rcu_unlock_domain(dst_d);
+    if ( !ret )
+        ffa_raise_rx_buffer_full(dst_d);
+
+    return ret;
+}
+
 int32_t ffa_handle_msg_send2(struct cpu_user_regs *regs)
 {
     struct domain *src_d = current->domain;
     struct ffa_ctx *src_ctx = src_d->arch.tee;
-    const struct ffa_part_msg_rxtx *src_msg;
+    struct ffa_part_msg_rxtx src_msg;
     uint16_t dst_id, src_id;
     int32_t ret;
 
-    if ( !ffa_fw_supports_fid(FFA_MSG_SEND2) )
-        return FFA_RET_NOT_SUPPORTED;
+    BUILD_BUG_ON(sizeof(struct ffa_part_msg_rxtx) >= FFA_PAGE_SIZE);
 
     if ( !spin_trylock(&src_ctx->tx_lock) )
         return FFA_RET_BUSY;
 
-    src_msg = src_ctx->tx;
-    src_id = src_msg->send_recv_id >> 16;
-    dst_id = src_msg->send_recv_id & GENMASK(15,0);
+    /* create a copy of the message header */
+    memcpy(&src_msg, src_ctx->tx, sizeof(src_msg));
 
-    if ( src_id != ffa_get_vm_id(src_d) || !FFA_ID_IS_SECURE(dst_id) )
+    src_id = src_msg.send_recv_id >> 16;
+    dst_id = src_msg.send_recv_id & GENMASK(15,0);
+
+    if ( src_id != ffa_get_vm_id(src_d) )
     {
         ret = FFA_RET_INVALID_PARAMETERS;
-        goto out_unlock_tx;
+        goto out;
     }
 
     /* check source message fits in buffer */
-    if ( src_ctx->page_count * FFA_PAGE_SIZE <
-         src_msg->msg_offset + src_msg->msg_size ||
-         src_msg->msg_offset < sizeof(struct ffa_part_msg_rxtx) )
+    if ( src_msg.msg_offset < sizeof(struct ffa_part_msg_rxtx) ||
+            src_msg.msg_size == 0 ||
+            src_msg.msg_offset > src_ctx->page_count * FFA_PAGE_SIZE ||
+            src_msg.msg_size > (src_ctx->page_count * FFA_PAGE_SIZE -
+                                src_msg.msg_offset) )
     {
         ret = FFA_RET_INVALID_PARAMETERS;
-        goto out_unlock_tx;
+        goto out;
     }
 
-    ret = ffa_simple_call(FFA_MSG_SEND2,
+    if ( FFA_ID_IS_SECURE(dst_id) )
+    {
+        /* Message for a secure partition */
+        if ( !ffa_fw_supports_fid(FFA_MSG_SEND2) )
+        {
+            ret = FFA_RET_NOT_SUPPORTED;
+            goto out;
+        }
+
+        ret = ffa_simple_call(FFA_MSG_SEND2,
                           ((uint32_t)ffa_get_vm_id(src_d)) << 16, 0, 0, 0);
+    }
+    else if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) )
+    {
+        /* Message for a VM */
+        ret = ffa_msg_send2_vm(dst_id, src_ctx->tx, &src_msg);
+    }
+    else
+        ret = FFA_RET_INVALID_PARAMETERS;
 
-out_unlock_tx:
+out:
     spin_unlock(&src_ctx->tx_lock);
     return ret;
 }
-- 
2.47.1



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From: Bertrand Marquis 
To: xen-devel@lists.xenproject.org
Cc: jens.wiklander@linaro.org,
	Volodymyr Babchuk ,
	Stefano Stabellini ,
	Julien Grall ,
	Michal Orzel 
Subject: [PATCH v5 6/6] xen/arm: ffa: Enable VM to VM without firmware
Date: Wed, 16 Apr 2025 09:39:47 +0200
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When VM to VM support is activated and there is no suitable FF-A support
in the firmware, enable FF-A support for VMs to allow using it for VM to
VM communications.
If there is OP-TEE running in the secure world and using the non FF-A
communication system, having CONFIG_FFA_VM_TO_VM could be non functional
(if optee is probed first) or OP-TEE could be non functional (if FF-A is
probed first) so it is not recommended to activate the configuration
option for such systems.

To make buffer full notification work between VMs when there is no
firmware, rework the notification handling and modify the global flag to
only be used as check for firmware notification support instead.

Signed-off-by: Bertrand Marquis 
---
Changes in v5:
- init ctx list when there is no firmware
- rework init a bit to prevent duplicates
- Remove Jens R-b due to changes done
Changes in v4:
- Fix Optee to OP-TEE in commit message
- Add Jens R-b
Changes in v3:
- fix typos in commit message
- add spaces around <<
- move notification id fix back into buffer full patch
- fix | position in if
Changes in v2:
- replace ifdef with IS_ENABLED when possible
---
 xen/arch/arm/tee/ffa.c       |  24 ++++++--
 xen/arch/arm/tee/ffa_notif.c | 104 ++++++++++++++++-------------------
 2 files changed, 67 insertions(+), 61 deletions(-)

diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c
index c1c4c0957091..b86c88cefa8c 100644
--- a/xen/arch/arm/tee/ffa.c
+++ b/xen/arch/arm/tee/ffa.c
@@ -342,8 +342,9 @@ static int ffa_domain_init(struct domain *d)
     struct ffa_ctx *ctx;
     int ret;
 
-    if ( !ffa_fw_version )
+    if ( !IS_ENABLED(CONFIG_FFA_VM_TO_VM) && !ffa_fw_version )
         return -ENODEV;
+
     /*
      * We are using the domain_id + 1 as the FF-A ID for VMs as FF-A ID 0 is
      * reserved for the hypervisor and we only support secure endpoints using
@@ -579,11 +580,8 @@ static bool ffa_probe(void)
         goto err_rxtx_destroy;
 
     ffa_notif_init();
-    INIT_LIST_HEAD(&ffa_teardown_head);
-    INIT_LIST_HEAD(&ffa_ctx_head);
-    init_timer(&ffa_teardown_timer, ffa_teardown_timer_callback, NULL, 0);
 
-    return true;
+    goto exit;
 
 err_rxtx_destroy:
     ffa_rxtx_destroy();
@@ -592,6 +590,22 @@ err_no_fw:
     bitmap_zero(ffa_fw_abi_supported, FFA_ABI_BITMAP_SIZE);
     printk(XENLOG_WARNING "ARM FF-A No firmware support\n");
 
+exit:
+    if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) || ffa_fw_version )
+    {
+        INIT_LIST_HEAD(&ffa_teardown_head);
+        INIT_LIST_HEAD(&ffa_ctx_head);
+        init_timer(&ffa_teardown_timer, ffa_teardown_timer_callback, NULL, 0);
+    }
+
+    if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) )
+    {
+        printk(XENLOG_INFO "ARM FF-A only available between VMs\n");
+        return true;
+    }
+    else if ( ffa_fw_version )
+        return true;
+
     return false;
 }
 
diff --git a/xen/arch/arm/tee/ffa_notif.c b/xen/arch/arm/tee/ffa_notif.c
index f6df2f15bb00..86bef6b3b2ab 100644
--- a/xen/arch/arm/tee/ffa_notif.c
+++ b/xen/arch/arm/tee/ffa_notif.c
@@ -16,7 +16,7 @@
 
 #include "ffa_private.h"
 
-static bool __ro_after_init notif_enabled;
+static bool __ro_after_init fw_notif_enabled;
 static unsigned int __ro_after_init notif_sri_irq;
 
 int ffa_handle_notification_bind(struct cpu_user_regs *regs)
@@ -27,21 +27,17 @@ int ffa_handle_notification_bind(struct cpu_user_regs *regs)
     uint32_t bitmap_lo = get_user_reg(regs, 3);
     uint32_t bitmap_hi = get_user_reg(regs, 4);
 
-    if ( !notif_enabled )
-        return FFA_RET_NOT_SUPPORTED;
-
     if ( (src_dst & 0xFFFFU) != ffa_get_vm_id(d) )
         return FFA_RET_INVALID_PARAMETERS;
 
     if ( flags )    /* Only global notifications are supported */
         return FFA_RET_DENIED;
 
-    /*
-     * We only support notifications from SP so no need to check the sender
-     * endpoint ID, the SPMC will take care of that for us.
-     */
-    return ffa_simple_call(FFA_NOTIFICATION_BIND, src_dst, flags, bitmap_lo,
-                           bitmap_hi);
+    if ( FFA_ID_IS_SECURE(src_dst >> 16) && fw_notif_enabled )
+        return ffa_simple_call(FFA_NOTIFICATION_BIND, src_dst, flags,
+                               bitmap_lo, bitmap_hi);
+
+    return FFA_RET_NOT_SUPPORTED;
 }
 
 int ffa_handle_notification_unbind(struct cpu_user_regs *regs)
@@ -51,18 +47,14 @@ int ffa_handle_notification_unbind(struct cpu_user_regs *regs)
     uint32_t bitmap_lo = get_user_reg(regs, 3);
     uint32_t bitmap_hi = get_user_reg(regs, 4);
 
-    if ( !notif_enabled )
-        return FFA_RET_NOT_SUPPORTED;
-
     if ( (src_dst & 0xFFFFU) != ffa_get_vm_id(d) )
         return FFA_RET_INVALID_PARAMETERS;
 
-    /*
-     * We only support notifications from SP so no need to check the
-     * destination endpoint ID, the SPMC will take care of that for us.
-     */
-    return  ffa_simple_call(FFA_NOTIFICATION_UNBIND, src_dst, 0, bitmap_lo,
-                            bitmap_hi);
+    if ( FFA_ID_IS_SECURE(src_dst >> 16) && fw_notif_enabled )
+        return  ffa_simple_call(FFA_NOTIFICATION_UNBIND, src_dst, 0, bitmap_lo,
+                                bitmap_hi);
+
+    return FFA_RET_NOT_SUPPORTED;
 }
 
 void ffa_handle_notification_info_get(struct cpu_user_regs *regs)
@@ -71,7 +63,7 @@ void ffa_handle_notification_info_get(struct cpu_user_regs *regs)
     struct ffa_ctx *ctx = d->arch.tee;
     bool notif_pending;
 
-    if ( !notif_enabled )
+    if ( !IS_ENABLED(CONFIG_FFA_VM_TO_VM) && !fw_notif_enabled )
     {
         ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED);
         return;
@@ -108,7 +100,7 @@ void ffa_handle_notification_get(struct cpu_user_regs *regs)
     uint32_t w6 = 0;
     uint32_t w7 = 0;
 
-    if ( !notif_enabled )
+    if ( !IS_ENABLED(CONFIG_FFA_VM_TO_VM) && !fw_notif_enabled )
     {
         ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED);
         return;
@@ -120,7 +112,8 @@ void ffa_handle_notification_get(struct cpu_user_regs *regs)
         return;
     }
 
-    if ( flags & ( FFA_NOTIF_FLAG_BITMAP_SP | FFA_NOTIF_FLAG_BITMAP_SPM ) )
+    if ( fw_notif_enabled && (flags & ( FFA_NOTIF_FLAG_BITMAP_SP |
+                                        FFA_NOTIF_FLAG_BITMAP_SPM )) )
     {
         struct arm_smccc_1_2_regs arg = {
             .a0 = FFA_NOTIFICATION_GET,
@@ -177,15 +170,14 @@ int ffa_handle_notification_set(struct cpu_user_regs *regs)
     uint32_t bitmap_lo = get_user_reg(regs, 3);
     uint32_t bitmap_hi = get_user_reg(regs, 4);
 
-    if ( !notif_enabled )
-        return FFA_RET_NOT_SUPPORTED;
-
     if ( (src_dst >> 16) != ffa_get_vm_id(d) )
         return FFA_RET_INVALID_PARAMETERS;
 
-    /* Let the SPMC check the destination of the notification */
-    return ffa_simple_call(FFA_NOTIFICATION_SET, src_dst, flags, bitmap_lo,
-                           bitmap_hi);
+    if ( FFA_ID_IS_SECURE(src_dst >> 16) && fw_notif_enabled )
+        return ffa_simple_call(FFA_NOTIFICATION_SET, src_dst, flags, bitmap_lo,
+                               bitmap_hi);
+
+    return FFA_RET_NOT_SUPPORTED;
 }
 
 #ifdef CONFIG_FFA_VM_TO_VM
@@ -371,7 +363,7 @@ void ffa_notif_init_interrupt(void)
 {
     int ret;
 
-    if ( notif_enabled && notif_sri_irq < NR_GIC_SGI )
+    if ( fw_notif_enabled && notif_sri_irq < NR_GIC_SGI )
     {
         /*
          * An error here is unlikely since the primary CPU has already
@@ -402,41 +394,41 @@ void ffa_notif_init(void)
     int ret;
 
     /* Only enable fw notification if all ABIs we need are supported */
-    if ( !(ffa_fw_supports_fid(FFA_NOTIFICATION_BITMAP_CREATE) &&
-           ffa_fw_supports_fid(FFA_NOTIFICATION_BITMAP_DESTROY) &&
-           ffa_fw_supports_fid(FFA_NOTIFICATION_GET) &&
-           ffa_fw_supports_fid(FFA_NOTIFICATION_INFO_GET_64)) )
-        return;
-
-    arm_smccc_1_2_smc(&arg, &resp);
-    if ( resp.a0 != FFA_SUCCESS_32 )
-        return;
-
-    irq = resp.a2;
-    notif_sri_irq = irq;
-    if ( irq >= NR_GIC_SGI )
-        irq_set_type(irq, IRQ_TYPE_EDGE_RISING);
-    ret = request_irq(irq, 0, notif_irq_handler, "FF-A notif", NULL);
-    if ( ret )
+    if ( ffa_fw_supports_fid(FFA_NOTIFICATION_BITMAP_CREATE) &&
+         ffa_fw_supports_fid(FFA_NOTIFICATION_BITMAP_DESTROY) &&
+         ffa_fw_supports_fid(FFA_NOTIFICATION_GET) &&
+         ffa_fw_supports_fid(FFA_NOTIFICATION_INFO_GET_64) )
     {
-        printk(XENLOG_ERR "ffa: request_irq irq %u failed: error %d\n",
-               irq, ret);
-        return;
-    }
+        arm_smccc_1_2_smc(&arg, &resp);
+        if ( resp.a0 != FFA_SUCCESS_32 )
+            return;
 
-    notif_enabled = true;
+        irq = resp.a2;
+        notif_sri_irq = irq;
+        if ( irq >= NR_GIC_SGI )
+            irq_set_type(irq, IRQ_TYPE_EDGE_RISING);
+        ret = request_irq(irq, 0, notif_irq_handler, "FF-A notif", NULL);
+        if ( ret )
+        {
+            printk(XENLOG_ERR "ffa: request_irq irq %u failed: error %d\n",
+                   irq, ret);
+            return;
+        }
+        fw_notif_enabled = true;
+    }
 }
 
 int ffa_notif_domain_init(struct domain *d)
 {
     int32_t res;
 
-    if ( !notif_enabled )
-        return 0;
+    if ( fw_notif_enabled )
+    {
 
-    res = ffa_notification_bitmap_create(ffa_get_vm_id(d), d->max_vcpus);
-    if ( res )
-        return -ENOMEM;
+        res = ffa_notification_bitmap_create(ffa_get_vm_id(d), d->max_vcpus);
+        if ( res )
+            return -ENOMEM;
+    }
 
     return 0;
 }
@@ -447,6 +439,6 @@ void ffa_notif_domain_destroy(struct domain *d)
      * Call bitmap_destroy even if bitmap create failed as the SPMC will
      * return a DENIED error that we will ignore.
      */
-    if ( notif_enabled )
+    if ( fw_notif_enabled )
         ffa_notification_bitmap_destroy(ffa_get_vm_id(d));
 }
-- 
2.47.1



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Date: Wed, 16 Apr 2025 09:47:57 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: "Chen, Jiqian" 
Cc: "xen-devel@lists.xenproject.org" ,
	"Huang, Ray" 
Subject: Re: [PATCH v2 7/8] vpci/msi: Free MSI resources when init_msi() fails
Message-ID: 
References: <20250409064528.405573-1-Jiqian.Chen@amd.com>
 <20250409064528.405573-8-Jiqian.Chen@amd.com>
 
 
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On Wed, Apr 16, 2025 at 06:16:36AM +0000, Chen, Jiqian wrote:
> On 2025/4/15 21:29, Roger Pau Monné wrote:
> > On Wed, Apr 09, 2025 at 02:45:27PM +0800, Jiqian Chen wrote:
> >> When init_msi() fails, the previous new changes will hide MSI
> >> capability, it can't rely on vpci_deassign_device() to remove
> >> all MSI related resources anymore, those resources must be
> >> cleaned up in failure path of init_msi.
> >>
> >> To do that, add a new function to free MSI resources.
> >>
> >> Signed-off-by: Jiqian Chen 
> >> ---
> >> cc: "Roger Pau Monné" 
> >> ---
> >> v1->v2 changes:
> >> * Added a new function fini_msi to free all MSI resources instead of using an array to record registered registers.
> >> ---
> >>  xen/drivers/vpci/msi.c | 47 +++++++++++++++++++++++++++++++++---------
> >>  1 file changed, 37 insertions(+), 10 deletions(-)
> >>
> >> diff --git a/xen/drivers/vpci/msi.c b/xen/drivers/vpci/msi.c
> >> index ca89ae9b9c22..48a466dba0ef 100644
> >> --- a/xen/drivers/vpci/msi.c
> >> +++ b/xen/drivers/vpci/msi.c
> >> @@ -193,6 +193,33 @@ static void cf_check mask_write(
> >>      msi->mask = val;
> >>  }
> >>  
> >> +/* 12 is size of MSI structure for 32-bit Message Address without PVM */
> >> +#define MSI_STRUCTURE_SIZE_32 12
> > 
> > I'm confused by this.  The minimum size of the capability is 4 bytes
> > for the capability pointer, plus 4 bytes for the message address,
> > plus 2 bytes for the message data.  So that's 10 bytes in total.
> The remain 2 bytes is Extended Message Data, PCIe spec has this register's definition even though it is optional.

I was looking at the PCI Local Bus Specification rev 3.0 (because that
has nicer figures IMO), and such field is not listed there.  It's
listed in the PCI Express 6.0.1 specification.  I have to admit I've
completely forgot about such optional feature.

We never expose this bit to the guest in the control register, and
consequently we never explicitly handle accesses to what would be the
extended message data register, neither allow guests to enable it.

If/when we add support for such field we will likely need to adjust
fini_msi() to also zap it if present.

Thanks, Roger.


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Date: Wed, 16 Apr 2025 09:54:30 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: "Chen, Jiqian" 
Cc: "xen-devel@lists.xenproject.org" ,
	"Huang, Ray" , Jan Beulich ,
	Andrew Cooper 
Subject: Re: [PATCH v2 8/8] vpci/msix: Add function to clean MSIX resources
Message-ID: 
References: <20250409064528.405573-1-Jiqian.Chen@amd.com>
 <20250409064528.405573-9-Jiqian.Chen@amd.com>
 
 
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On Wed, Apr 16, 2025 at 06:20:50AM +0000, Chen, Jiqian wrote:
> On 2025/4/15 21:45, Roger Pau Monné wrote:
> > On Wed, Apr 09, 2025 at 02:45:28PM +0800, Jiqian Chen wrote: 
> >> +
> >> +    for ( unsigned int i = 0; i < ARRAY_SIZE(vpci->msix->table); i++ )
> >> +        if ( vpci->msix->table[i] )
> >> +            iounmap(vpci->msix->table[i]);
> > 
> > The MSI-X init function never maps tables, so the code here (given
> > it's current usage) will also never unmap anything.  However I would
> > also like to use this code for vPCI deassing, at which point the logic
> > will get used.
> So, I still need to keep this part, right?

Yes, I guess leave it for now, we can always rip it later.  I would
like to see how doing the cleanup in the caller in case of failure
looks.

Then we can likely extend such cleanup to be done in the deassign case
also.

Thanks, Roger.


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Just like for RISCV and PPC, the earlier we enable the CI build the
better.

Signed-off-by: Michal Orzel 
---
Changes in v2:
 - add Arm32 job given recently committed series

Pipeline:
https://gitlab.com/xen-project/people/morzel/xen/-/pipelines/1771015642
---
 automation/gitlab-ci/build.yaml | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml
index ac5367874526..ab5211f77e5e 100644
--- a/automation/gitlab-ci/build.yaml
+++ b/automation/gitlab-ci/build.yaml
@@ -379,6 +379,16 @@ debian-bookworm-gcc-arm32-debug-earlyprintk:
       CONFIG_EARLY_UART_CHOICE_PL011=y
       CONFIG_EARLY_UART_BASE_ADDRESS=0x9000000
 
+debian-bookworm-gcc-arm32-debug-mpu:
+  extends: .gcc-arm32-cross-build-debug
+  variables:
+    CONTAINER: debian:bookworm-arm64v8-arm32-gcc
+    HYPERVISOR_ONLY: y
+    EXTRA_XEN_CONFIG: |
+      CONFIG_XEN_START_ADDRESS=0x0
+      CONFIG_MPU=y
+      CONFIG_UNSUPPORTED=y
+
 # Arm builds
 
 debian-bookworm-gcc-arm64:
@@ -443,6 +453,16 @@ alpine-3.18-gcc-debug-arm64-earlyprintk:
       CONFIG_EARLY_UART_CHOICE_PL011=y
       CONFIG_EARLY_UART_BASE_ADDRESS=0x9000000
 
+alpine-3.18-gcc-debug-arm64-mpu:
+  extends: .gcc-arm64-build-debug
+  variables:
+    CONTAINER: alpine:3.18-arm64v8
+    HYPERVISOR_ONLY: y
+    EXTRA_XEN_CONFIG: |
+      CONFIG_XEN_START_ADDRESS=0x0
+      CONFIG_MPU=y
+      CONFIG_UNSUPPORTED=y
+
 # Yocto test jobs
 yocto-qemuarm64:
   extends: .yocto-test-arm64
-- 
2.25.1



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Subject: Re: [PATCH v2 1/4] xen/io: provide helpers for multi size MMIO
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To: Roger Pau Monne , xen-devel@lists.xenproject.org
Cc: Jan Beulich ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 Stefano Stabellini 
References: <20250415153246.81688-1-roger.pau@citrix.com>
 <20250415153246.81688-2-roger.pau@citrix.com>
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From: Andrew Cooper 
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On 15/04/2025 4:32 pm, Roger Pau Monne wrote:
> diff --git a/xen/include/xen/io.h b/xen/include/xen/io.h
> new file mode 100644
> index 000000000000..4495a04c403e
> --- /dev/null
> +++ b/xen/include/xen/io.h
> @@ -0,0 +1,68 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * IO related routines.
> + *
> + * Copyright (c) 2025 Cloud Software Group
> + */
> +#ifndef XEN_IO_H
> +#define XEN_IO_H
> +
> +#include 
> +
> +#include 
> +
> +static inline unsigned long read_mmio(const volatile void __iomem *mem,

void *__iomem.  (i.e. without the __iomem in the middle of the type). 
It seems most examples of this in Xen are wrong.

~Andrew


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From: Mykyta Poturai 
To: Stefano Stabellini , Julien Grall 
CC: "xen-devel@lists.xenproject.org" ,
	Bertrand Marquis , Michal Orzel
	, Volodymyr Babchuk ,
	Anthony PERARD , Juergen Gross ,
	Andrew Cooper , Jan Beulich ,
	=?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= 
Subject: Re: [PATCH v2 0/2] Add support for MSI injection on Arm
Thread-Topic: [PATCH v2 0/2] Add support for MSI injection on Arm
Thread-Index: AQHbrSLDj7RBwKKgz0m9mJin+yPd5rOi+rAAgAJZvwCAAKbLgA==
Date: Wed, 16 Apr 2025 08:37:14 +0000
Message-ID: <15938705-ae5e-43c9-826f-d7a8c7425baa@epam.com>
References: 
 <98feb427-7da5-47ff-831c-2b4bcb26c4b9@xen.org>
 
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From: "Penny, Zheng" 
To: Jan Beulich 
CC: "Stabellini, Stefano" ,
	"xen-devel@lists.xenproject.org" 
Subject: RE: [PATCH v2 10/19] xen/sysctl: introduce CONFIG_PM_STATS
Thread-Topic: [PATCH v2 10/19] xen/sysctl: introduce CONFIG_PM_STATS
Thread-Index: AQHbnhN0GO5sSI+g2kqtQPzlgrAUG7OO0pKAgBbuLcCAADcSAIAAF55A
Date: Wed, 16 Apr 2025 08:38:08 +0000
Message-ID:
 
References: <20250326055053.3313146-1-Penny.Zheng@amd.com>
 <20250326055053.3313146-11-Penny.Zheng@amd.com>
 
 
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To: Andrew Cooper 
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On 16.04.2025 10:29, Andrew Cooper wrote:
> On 15/04/2025 4:32 pm, Roger Pau Monne wrote:
>> diff --git a/xen/include/xen/io.h b/xen/include/xen/io.h
>> new file mode 100644
>> index 000000000000..4495a04c403e
>> --- /dev/null
>> +++ b/xen/include/xen/io.h
>> @@ -0,0 +1,68 @@
>> +/* SPDX-License-Identifier: GPL-2.0-only */
>> +/*
>> + * IO related routines.
>> + *
>> + * Copyright (c) 2025 Cloud Software Group
>> + */
>> +#ifndef XEN_IO_H
>> +#define XEN_IO_H
>> +
>> +#include 
>> +
>> +#include 
>> +
>> +static inline unsigned long read_mmio(const volatile void __iomem *mem,
> 
> void *__iomem.  (i.e. without the __iomem in the middle of the type). 
> It seems most examples of this in Xen are wrong.

Hmm, perhaps in turn because I don't see why it would need to be that
placement. The attribute describes what's pointed to, not the variable
(or parameter here) itself.

Jan


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On 16.04.2025 10:38, Penny, Zheng wrote:
> [Public]
> 
> Hi,
> 
>> -----Original Message-----
>> From: Jan Beulich 
>> Sent: Wednesday, April 16, 2025 2:37 PM
>> To: Penny, Zheng 
>> Cc: Stabellini, Stefano ; xen-
>> devel@lists.xenproject.org
>> Subject: Re: [PATCH v2 10/19] xen/sysctl: introduce CONFIG_PM_STATS
>>
>> On 16.04.2025 05:54, Penny, Zheng wrote:
>>>> -----Original Message-----
>>>> From: Jan Beulich 
>>>> Sent: Tuesday, April 1, 2025 9:10 PM
>>>>
>>>> On 26.03.2025 06:50, Penny Zheng wrote:
>>>>> --- a/xen/common/Kconfig
>>>>> +++ b/xen/common/Kconfig
>>>>> @@ -557,4 +557,9 @@ config SYSCTL
>>>>>       to reduce Xen footprint.
>>>>>  endmenu
>>>>>
>>>>> +config PM_STATS
>>>>> +   bool "Enable Performance Management Statistics"
>>>>> +   depends on ACPI && HAS_CPUFREQ && SYSCTL
>>>>> +   default y
>>>>
>>>> As per above - either name, prompt and the description that Stefano
>>>> suggested are wrong, or it is too much that is being covered by this new
>> control.
>>>>
>>>
>>> We have two sysctl-op on performance, do_get_pm_info() and do_pm_op().
>>> I think do_get_pm_info() is to collect PM statistic info, which could
>>> be wrapped with CONFIG_PM_STATS, while maybe do_pm_op() is more
>> focusing on performance tuning.
>>> How about we introduce another Kconfig CONFIG_PM_TUNE to wrap
>>> do_pm_op() and related helpers? I suggest to introduce a new file pmtune.c to
>> contain.
>>> Or any better suggestion?
>>
>> "tune" is too narrow imo. "ctrl" may be an option, but how about simply pm-op.c,
>> fitting do_pm_op() pretty nicely? Question is what else is going to end up in that
>> file.
>>
> 
> The following functions will be included in pm_op.c

To avoid another round trip just for this - I wrote pm-op.c for a reason.

> and wrapped with PM_CTRL or PM_OP
>     - get_cpufreq_para()
>     - set_cpufreq_para()
>     - set_cpufreq_gov()
>     - set_cpufreq_cppc()
>     - cpufreq_driver_getavg()
>     - cpufreq_update_turbo()
>     - cpufreq_get_turbo_status()
> And description for PM_STATS, I'll take stefano's suggestion and for PM_CTRL/PM_OP, maybe it will be
> ```
> Enable userspace performance management control to do power/performance analyzing and tuning
> ```

Reads okay at the first glance.

Jan


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To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper , Julien Grall ,
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From: Jan Beulich 
Subject: [PATCH] symbols: discard stray file symbols
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By observation GNU ld 2.25 may emit file symbols for .data.read_mostly
when linking xen.efi. Due to the nature of file symbols in COFF symbol
tables (see the code comment) the symbols_offsets[] entries for such
symbols would cause assembler warnings regarding value truncation. Of
course the resulting entries would also be both meaningless and useless.
Add a heuristic to get rid of them, really taking effect only when
--all-symbols is specified (otherwise these symbols are discarded
anyway).

Signed-off-by: Jan Beulich 
---
Factor 2 may in principle still be too small: We zap what looks like
real file symbols already in read_symbol(), so table_cnt doesn't really
reflect the number of symbol table entries encountered. It has proven to
work for me in practice though, with still some leeway left.

--- a/xen/tools/symbols.c
+++ b/xen/tools/symbols.c
@@ -213,6 +213,16 @@ static int symbol_valid(struct sym_entry
 	if (strstr((char *)s->sym + offset, "_compiled."))
 		return 0;
 
+	/* At least GNU ld 2.25 may emit bogus file symbols referencing a
+	 * section name while linking xen.efi. In COFF symbol tables the
+	 * "value" of file symbols is a link (symbol table index) to the next
+	 * file symbol. Since file (and other) symbols (can) come with one
+	 * (or in principle more) auxiliary symbol table entries, the value in
+	 * this heuristic is bounded to twice the number of symbols we have
+	 * found. See also read_symbol() as to the '?' checked for here. */
+	if (s->sym[0] == '?' && s->sym[1] == '.' && s->addr < table_cnt * 2)
+		return 0;
+
 	return 1;
 }
 


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Subject: Re: Assert in x86_emulate_wrapper triggerable by HVM domain
To: Manuel Andreas 
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On 15.04.2025 23:52, Manuel Andreas wrote:
> Dear all,
> 
> my fuzzing infrastructure discovered that an assert in 
> x86_emulate_wrapper is able to be triggered by an HVM domain executing a 
> specially crafted repeating movs instruction.

That's

    /* All cases returning X86EMUL_EXCEPTION should have fault semantics. */
    if ( rc == X86EMUL_EXCEPTION )
        ASSERT(ctxt->regs->r(ip) == orig_ip);

?

> Specifically, if the emulation of the rep movs instruction triggers an 
> exception (e.g. by accessing invalid memory after some amount of 
> iterations), the emulation will be halted at that point.
> However, the instruction manual requires that _some_ register state 
> (namely the updated value of rcx) shall be commited, whereas the 
> instruction pointer needs to be rolled back to point to the address of 
> the instruction itself. The assert checks for the latter. Problematic is 
> the fact that for these type of repeating instructions, Xen seems to 
> eventually just commit all register state when it encounters an exception:
> 
>     557  #define put_rep_prefix(reps_completed) 
> ({                               \
>     558      if ( rep_prefix() 
> )                                                 \
>     559 { \
>     560          __put_rep_prefix(&_regs, ctxt->regs, ad_bytes, 
> reps_completed); \
>     561          if ( unlikely(rc == X86EMUL_EXCEPTION) 
> )                        \
>     562              goto 
> complete_insn;                                         \
>     563 } \
>     564  })

I fear I'm not following, considering __put_rep_prefix() has

    /* Reduce counter appropriately, and repeat instruction if non-zero. */
    ecx -= reps_completed;
    if ( ecx != 0 )
        int_regs->r(ip) = ext_regs->r(ip);

>    8356   complete_insn: /* Commit shadow register state. */
>    8357      put_fpu(fpu_type, false, state, ctxt, ops);
>    8358      fpu_type = X86EMUL_FPU_none;
>    8359
>    8360      /* Zero the upper 32 bits of %rip if not in 64-bit mode. */
>    8361      if ( !mode_64bit() )
>    8362          _regs.r(ip) = (uint32_t)_regs.r(ip);
>    8363
>    8364      /* Should a singlestep #DB be raised? */
>    8365      if ( rc == X86EMUL_OKAY && singlestep && !ctxt->retire.mov_ss )
>    8366      {
>    8367          ctxt->retire.singlestep = true;
>    8368          ctxt->retire.sti = false;
>    8369      }
>    8370
>    8371      if ( rc != X86EMUL_DONE )
>    8372          *ctxt->regs = _regs; // <- Incorrect RIP is commited
> 
> I've attached an XTF test that should trigger the aforementioned assert 
> on the latest release commit: 3ad5d648cda5add395f49fc3704b2552aae734f7

I'll give this a try, perhaps it'll shed more light on the situation. I'd
be surprised though that the fuzzer we have in tree wouldn't have found
this (so far).

Jan


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Subject: Re: [PATCH v3 2/6] CI: avoid repacking initrd as part of the test job
To: Stefano Stabellini 
Cc: Xen-devel ,
 =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
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 , Michal Orzel ,
 Doug Goldstein 
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On 16/04/2025 12:48 am, Stefano Stabellini wrote:
>> diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh
>> index c4be71464246..e2376cb51cb4 100755
>> --- a/automation/scripts/qubes-x86-64.sh
>> +++ b/automation/scripts/qubes-x86-64.sh
>> @@ -164,16 +164,13 @@ ${domU_extra_config}
>>  "
>>  
>>  if [ -n "$domU_check" ]; then
>> -    # DomU
>> +    # DomU rootfs
>> +    cp binaries/rootfs.cpio.gz binaries/domU-rootfs.cpio.gz
>> +
>> +    # test-local configuration
>>      mkdir -p rootfs
>>      cd rootfs
>> -    # fakeroot is needed to preserve device nodes in rootless podman container
>> -    fakeroot -s ../fakeroot-save tar xzf ../binaries/initrd.tar.gz
>> -    mkdir proc
>> -    mkdir run
>> -    mkdir srv
>> -    mkdir sys
>> -    rm var/run
>> +    mkdir -p etc/local.d
>>      echo "#!/bin/sh
> I am worried about the drop of fakeroot because the newly created dirs
> and files we'll have user as owner instead of root.
>
> I suggest we fix this for consistency, and cpio -R 0:0 might suffice.

https://gitlab.com/xen-project/hardware/xen-staging/-/jobs/9737393986#L1087

It seems to be all root anyway.  I'm not entirely sure why, but it does
explain why everything is working, given the attempt to have non-root
containers.

~Andrew


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Date: Wed, 16 Apr 2025 11:15:21 +0100
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Subject: Re: [PATCH v2 2/7] Overhaul how Argo is built and packged
To: Stefano Stabellini 
Cc: Xen-devel ,
 Anthony PERARD ,
 Michal Orzel , Doug Goldstein ,
 =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 , Jason Andryuk ,
 "Daniel P . Smith" 
References: <20250414101843.2348330-1-andrew.cooper3@citrix.com>
 <20250414101843.2348330-3-andrew.cooper3@citrix.com>
 
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From: Andrew Cooper 
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On 16/04/2025 12:48 am, Stefano Stabellini wrote:
> On Mon, 14 Apr 2025, Andrew Cooper wrote:
>> Right now, the argo artefacts are a pile of files which the test has to turn
>> back into something which resembles a filesystem.  Furthermore, because we do
>> not build modules for the main kernel, it is extra important to make sure that
>> xen-argo.ko doesn't get out of sync.
>>
>> Build argo conditionally as part of the linux artefact.  It's ~100kb all
>> together, compared to ~14M for the kernel.
>>
>> Produce a single argo.cpio.gz with xen-argo.ko in the standard location.
>> Prune userspace down to just the executables and libraries.
>>
>> This is cribbed from the existing scripts/x86_64-linux-argo.sh, which stays in
>> place in the short term until Xen can be updated to use the new scheme.
>>
>> Signed-off-by: Andrew Cooper 
> Do we need to remove x86_64-argo-linux.sh?

Yes, but 4.20 still uses it.

One thing I'm not sure about is whether "keep latest artefact" is just
artefacts from the latest run, or the latest of each named artefact.

Now is as good a time to experiment as any.

~Andrew


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Date: Wed, 16 Apr 2025 12:15:31 +0200
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User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v1 09/14] xen/riscv: aplic_init() implementation
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Romain Caritey , xen-devel@lists.xenproject.org
References: 
 <1d023045be49ae93d41d552f9c9a79972fa4e84b.1744126720.git.oleksii.kurochko@gmail.com>
 
Content-Language: en-US
From: Oleksii Kurochko 
In-Reply-To: 

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--------------SfsmbpGnclB31etoHmDRSJCQ
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On 4/14/25 12:04 PM, Jan Beulich wrote:
> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>> --- a/xen/arch/riscv/aplic.c
>> +++ b/xen/arch/riscv/aplic.c
>> @@ -9,19 +9,112 @@
>>    * Copyright (c) 2024-2025 Vates
>>    */
>>   
>> +#include 
>>   #include 
>>   #include 
>>   #include 
>> +#include 
>>   #include 
>>   #include 
>> +#include 
>>   
>> +#include 
>>   #include 
>> +#include 
>>   #include 
>> +#include 
>> +
>> +#define APLIC_DEFAULT_PRIORITY  1
>> +
>> +static struct aplic_priv aplic;
>>   
>>   static struct intc_info __ro_after_init aplic_info = {
>>       .hw_version = INTC_APLIC,
>>   };
>>   
>> +static void __init aplic_init_hw_interrupts(void)
>> +{
>> +    int i;
>> +
>> +    /* Disable all interrupts */
>> +    for ( i = 0; i <= aplic_info.nr_irqs; i += 32 )
>> +        aplic.regs->clrie[i] = -1U;
>> +
>> +    /* Set interrupt type and default priority for all interrupts */
>> +    for ( i = 1; i <= aplic_info.nr_irqs; i++ )
>> +    {
>> +        aplic.regs->sourcecfg[i - 1] = 0;
>> +        aplic.regs->target[i - 1] = APLIC_DEFAULT_PRIORITY;
> A field named "target" is written with a priority value?

Low bits of target register contains Interrupt Priority bits which can't be zero according to
AIA spec:
```
4.5.16.1. Active source, direct delivery mode
For an active interrupt source , if the domain is configured in direct delivery mode (domaincfg.DM = 0),
then register target[ ] has this format:
   bits 31:18 Hart Index (WLRL)
   bits 7:0 IPRIO (WARL)

All other register bits are reserved and read as zeros.
Hart Index is a WLRL field that specifies the hart to which interrupts from this source will be delivered.
Field IPRIO (Interrupt Priority) specifies the priority number for the interrupt source. This field is
a WARL unsigned integer of IPRIOLEN bits, where IPRIOLEN is a constant parameter for the given APLIC, in
the range of 1 to 8. Only values 1 through are allowed for IPRIO, not zero. A write to a target register
sets IPRIO equal to bits :0 of the 32-bit value written, unless those bits are all zeros, in which case
the priority number is set to 1 instead. (If IPRIOLEN = 1, these rules cause IPRIO to be effectively
read-only with value 1.)
```

>
>> +    }
>> +
>> +    /* Clear APLIC domaincfg */
>> +    aplic.regs->domaincfg = APLIC_DOMAINCFG_IE | APLIC_DOMAINCFG_DM;
> The statement doesn't like like there was any "clearing" here.

But all other bits, except|APLIC_DOMAINCFG_{IE, DM}|, are set to zero.
I think we can remove this comment to avoid confusion.

>> +    rc = dt_property_read_u32(node, "msi-parent", &imsic_phandle);
>> +    if ( !rc )
>> +        panic("%s: IDC mode not supported\n", node->full_name);
>> +
>> +    imsic_node = dt_find_node_by_phandle(imsic_phandle);
>> +    if ( !imsic_node )
>> +        panic("%s: unable to find IMSIC node\n", node->full_name);
>> +
>> +    /* check imsic mode */
>> +    rc = dt_property_read_u32_array(imsic_node, "interrupts-extended",
>> +                                    irq_range, ARRAY_SIZE(irq_range));
>> +    if ( rc && (rc != -EOVERFLOW) )
>> +        panic("%s: unable to find interrupt-extended in %s node\n",
>> +               node->full_name, imsic_node->full_name);
> Why exactly is EOVERFLOW tolerable here?

QEMU generates two IMSIC device tree nodes: one for M-mode and one for S-mode.
For the hypervisor, we don’t really care about the M-mode IMSIC node — we're only
interested in the S-mode IMSIC node.

The IMSIC node includes this information in the|"interrupts-extended"| property,
which has the following format:
   interrupt-extended = {, },...
The number of such|| pairs depends on the number of CPUs the platform has.

For our purposes, to determine whether the IMSIC node corresponds to M-mode or not, it’s sufficient to read only the first pair and check the mode like this:

   if ( irq_range[1] == IRQ_M_EXT )

Thereby dt_property_read_u32_array() will return -EOVERFLOW in the case when a platfrom
has more then one CPU as we passed irq_range[2] as an argument but the amount of values
in "interrupts-extended" property will be (2 * CPUS_NUM).

I can update the comment above dt_property_read_u32_array() for more clearness.

>> +    if ( irq_range[1] == IRQ_M_EXT )
>> +        /* machine mode imsic node, ignore this aplic node */
>> +        return 0;
>> +
>> +    rc = imsic_init(imsic_node);
>> +    if ( rc )
>> +        panic("%s: Failded to initialize IMSIC\n", node->full_name);
>> +
>> +    /* Find out number of interrupt sources */
>> +    rc = dt_property_read_u32(node, "riscv,num-sources", &aplic_info.nr_irqs);
>> +    if ( !rc )
>> +        panic("%s: failed to get number of interrupt sources\n",
>> +              node->full_name);
>> +
>> +    prop = dt_get_property(node, "reg", NULL);
>> +    dt_get_range(&prop, node, &paddr, &size);
>> +    if ( !paddr )
>> +        panic("%s: first MMIO resource not found\n", node->full_name);
>> +
>> +    aplic.paddr_start = paddr;
>> +    aplic.paddr_end = paddr + size;
>> +    aplic.size = size;
> Why do all three need recording? Isn't a (start,size) tuple sufficient
> (and unambiguous)?

(start,size) will be enough. I'll drop aplic.paddr_end.

>
>> +    aplic.regs = ioremap(paddr, size);
>> +    if ( !aplic.regs )
>> +        panic("%s: unable to map\n", node->full_name);
>> +
>> +    /* Setup initial state APLIC interrupts */
>> +    aplic_init_hw_interrupts();
>> +
>> +    return 0;
>> +}
>> +
>> +static const struct intc_hw_operations __ro_after_init aplic_ops = {
> const or __ro_after_init?

What’s wrong with using both?|const| ensures the variable can't be changed at compile time,
while|__ro_after_init| makes it read-only at runtime after initialization is complete.

Probably,|__initconst| would be a better fit:
   static const struct intc_hw_operations __initconst aplic_ops = {

Or even|__initconstrel|, since the|struct intc_hw_operations| contains pointers.

>
>> --- /dev/null
>> +++ b/xen/arch/riscv/include/asm/aplic.h
>> @@ -0,0 +1,77 @@
>> +/* SPDX-License-Identifier: MIT */
>> +
>> +/*
>> + * xen/arch/riscv/aplic.h
>> + *
>> + * RISC-V Advanced Platform-Level Interrupt Controller support
>> + *
>> + * Copyright (c) 2023 Microchip.
>> + */
>> +
>> +#ifndef ASM__RISCV__APLIC_H
>> +#define ASM__RISCV__APLIC_H
>> +
>> +#include 
>> +
>> +#include 
>> +
>> +#define APLIC_DOMAINCFG_IE      BIT(8, UL)
>> +#define APLIC_DOMAINCFG_DM      BIT(2, UL)
>> +
>> +struct aplic_regs {
>> +    uint32_t domaincfg;
>> +    uint32_t sourcecfg[1023];
>> +    uint8_t _reserved1[0xBC0];
>> +
>> +    uint32_t mmsiaddrcfg;
>> +    uint32_t mmsiaddrcfgh;
>> +    uint32_t smsiaddrcfg;
>> +    uint32_t smsiaddrcfgh;
>> +    uint8_t _reserved2[0x30];
>> +
>> +    uint32_t setip[32];
>> +    uint8_t _reserved3[92];
>> +
>> +    uint32_t setipnum;
>> +    uint8_t _reserved4[0x20];
>> +
>> +    uint32_t in_clrip[32];
>> +    uint8_t _reserved5[92];
>> +
>> +    uint32_t clripnum;
>> +    uint8_t _reserved6[32];
>> +
>> +    uint32_t setie[32];
>> +    uint8_t _reserved7[92];
>> +
>> +    uint32_t setienum;
>> +    uint8_t _reserved8[32];
>> +
>> +    uint32_t clrie[32];
>> +    uint8_t _reserved9[92];
>> +
>> +    uint32_t clrienum;
>> +    uint8_t _reserved10[32];
>> +
>> +    uint32_t setipnum_le;
>> +    uint32_t setipnum_be;
>> +    uint8_t _reserved11[4088];
>> +
>> +    uint32_t genmsi;
>> +    uint32_t target[1023];
>> +};
>> +
>> +struct aplic_priv {
>> +    /* base physical address and size */
>> +    paddr_t paddr_start;
>> +    paddr_t paddr_end;
>> +    size_t  size;
>> +
>> +    /* registers */
>> +    volatile struct aplic_regs *regs;
>> +
>> +    /* imsic configuration */
>> +    const struct imsic_config *imsic_cfg;
>> +};
>> +
>> +#endif /* ASM__RISCV__APLIC_H */
> Does all of this really need to live in a non-private header?

struct aplic_priv is used in different files:
- in aplic.c to define `aplic` variable.
- in vaplic.c (which isn't intoduced yet) is used in several places:https://gitlab.com/xen-project/people/olkur/xen/-/blob/latest/xen/arch/riscv/vaplic.c#L41

struct aplic_regs is used only in aplic.c (at least, at the moment) so could be moved to
aplic.c, but I don't see too much sense.

>
>> --- a/xen/arch/riscv/include/asm/irq.h
>> +++ b/xen/arch/riscv/include/asm/irq.h
>> @@ -27,7 +27,6 @@
>>   #define IRQ_TYPE_INVALID        DT_IRQ_TYPE_INVALID
>>   
>>   /* TODO */
>> -#define nr_irqs 0U
> How come this is simply no longer needed, i.e. without any replacement?
> Hmm, looks like the only use in common code has gone away. Yet then this
> still doesn't really look to belong here (especially if not mentioned in
> the description).

I missed that it is used in xen/common/domain.c when CONFIG_HAS_PIRQ=y, but this
config isn't selected for RISC-V.
I think that I have to revert this change.

~ Oleksii

--------------SfsmbpGnclB31etoHmDRSJCQ
Content-Type: text/html; charset=UTF-8
Content-Transfer-Encoding: 8bit



  
    
  
  
    


    

    
On 4/14/25 12:04 PM, Jan Beulich wrote:

    

    

      
On 08.04.2025 17:57, Oleksii Kurochko wrote:


      

        
--- a/xen/arch/riscv/aplic.c
+++ b/xen/arch/riscv/aplic.c
@@ -9,19 +9,112 @@
  * Copyright (c) 2024-2025 Vates
  */
 
+#include <xen/device_tree.h>
 #include <xen/errno.h>
 #include <xen/init.h>
 #include <xen/irq.h>
+#include <xen/mm.h>
 #include <xen/sections.h>
 #include <xen/types.h>
+#include <xen/vmap.h>
 
+#include <asm/aplic.h>
 #include <asm/device.h>
+#include <asm/imsic.h>
 #include <asm/intc.h>
+#include <asm/riscv_encoding.h>
+
+#define APLIC_DEFAULT_PRIORITY  1
+
+static struct aplic_priv aplic;
 
 static struct intc_info __ro_after_init aplic_info = {
     .hw_version = INTC_APLIC,
 };
 
+static void __init aplic_init_hw_interrupts(void)
+{
+    int i;
+
+    /* Disable all interrupts */
+    for ( i = 0; i <= aplic_info.nr_irqs; i += 32 )
+        aplic.regs->clrie[i] = -1U;
+
+    /* Set interrupt type and default priority for all interrupts */
+    for ( i = 1; i <= aplic_info.nr_irqs; i++ )
+    {
+        aplic.regs->sourcecfg[i - 1] = 0;
+        aplic.regs->target[i - 1] = APLIC_DEFAULT_PRIORITY;


      

      
A field named "target" is written with a priority value?

    

    
Low bits of target register contains Interrupt Priority bits which can't be zero according to
AIA spec:
```
4.5.16.1. Active source, direct delivery mode
For an active interrupt source , if the domain is configured in direct delivery mode (domaincfg.DM = 0),
then register target[ ] has this format:
  bits 31:18 Hart Index (WLRL)
  bits 7:0 IPRIO (WARL)

All other register bits are reserved and read as zeros.
Hart Index is a WLRL field that specifies the hart to which interrupts from this source will be delivered.
Field IPRIO (Interrupt Priority) specifies the priority number for the interrupt source. This field is
a WARL unsigned integer of IPRIOLEN bits, where IPRIOLEN is a constant parameter for the given APLIC, in
the range of 1 to 8. Only values 1 through are allowed for IPRIO, not zero. A write to a target register
sets IPRIO equal to bits :0 of the 32-bit value written, unless those bits are all zeros, in which case
the priority number is set to 1 instead. (If IPRIOLEN = 1, these rules cause IPRIO to be effectively
read-only with value 1.)
```


    

    

      



      

        
+    }
+
+    /* Clear APLIC domaincfg */
+    aplic.regs->domaincfg = APLIC_DOMAINCFG_IE | APLIC_DOMAINCFG_DM;


      

      
The statement doesn't like like there was any "clearing" here.

    

    
But all other bits, except APLIC_DOMAINCFG_{IE, DM}, are set to zero.
I think we can remove this comment to avoid confusion.



    

      

        
+    rc = dt_property_read_u32(node, "msi-parent", &imsic_phandle);
+    if ( !rc )
+        panic("%s: IDC mode not supported\n", node->full_name);
+
+    imsic_node = dt_find_node_by_phandle(imsic_phandle);
+    if ( !imsic_node )
+        panic("%s: unable to find IMSIC node\n", node->full_name);
+
+    /* check imsic mode */
+    rc = dt_property_read_u32_array(imsic_node, "interrupts-extended",
+                                    irq_range, ARRAY_SIZE(irq_range));
+    if ( rc && (rc != -EOVERFLOW) )
+        panic("%s: unable to find interrupt-extended in %s node\n",
+               node->full_name, imsic_node->full_name);


      

      
Why exactly is EOVERFLOW tolerable here?

    

    
QEMU generates two IMSIC device tree nodes: one for M-mode and one for S-mode.
For the hypervisor, we don’t really care about the M-mode IMSIC node — we're only
interested in the S-mode IMSIC node.

    
The IMSIC node includes this information in the "interrupts-extended" property,
which has the following format:
  interrupt-extended = {<interrupt-controller-phandle>, <machine_mode>},...
The number of such <phandle, mode> pairs depends on the number of CPUs the platform has.

    
For our purposes, to determine whether the IMSIC node corresponds to M-mode or not, it’s sufficient to read only the first pair and check the mode like this:

    
  if ( irq_range[1] == IRQ_M_EXT )

Thereby dt_property_read_u32_array() will return -EOVERFLOW in the case when a platfrom
has more then one CPU as we passed irq_range[2] as an argument but the amount of values
in "interrupts-extended" property will be (2 * CPUS_NUM).

I can update the comment above dt_property_read_u32_array() for more clearness.



    

      

      

        
+    if ( irq_range[1] == IRQ_M_EXT )
+        /* machine mode imsic node, ignore this aplic node */
+        return 0;
+
+    rc = imsic_init(imsic_node);
+    if ( rc )
+        panic("%s: Failded to initialize IMSIC\n", node->full_name);
+
+    /* Find out number of interrupt sources */
+    rc = dt_property_read_u32(node, "riscv,num-sources", &aplic_info.nr_irqs);
+    if ( !rc )
+        panic("%s: failed to get number of interrupt sources\n",
+              node->full_name);
+
+    prop = dt_get_property(node, "reg", NULL);
+    dt_get_range(&prop, node, &paddr, &size);
+    if ( !paddr )
+        panic("%s: first MMIO resource not found\n", node->full_name);
+
+    aplic.paddr_start = paddr;
+    aplic.paddr_end = paddr + size;
+    aplic.size = size;


      

      
Why do all three need recording? Isn't a (start,size) tuple sufficient
(and unambiguous)?

    

    
(start,size) will be enough. I'll drop aplic.paddr_end.



    

      



      

        
+    aplic.regs = ioremap(paddr, size);
+    if ( !aplic.regs )
+        panic("%s: unable to map\n", node->full_name);
+
+    /* Setup initial state APLIC interrupts */
+    aplic_init_hw_interrupts();
+
+    return 0;
+}
+
+static const struct intc_hw_operations __ro_after_init aplic_ops = {


      

      
const or __ro_after_init?

    

    
What’s wrong with using both? const ensures the variable can't be changed at compile time,
while __ro_after_init makes it read-only at runtime after initialization is complete.

    
Probably, __initconst would be a better fit:
  static const struct intc_hw_operations __initconst aplic_ops = {

Or even __initconstrel, since the struct intc_hw_operations contains pointers.


    

      



      

        
--- /dev/null
+++ b/xen/arch/riscv/include/asm/aplic.h
@@ -0,0 +1,77 @@
+/* SPDX-License-Identifier: MIT */
+
+/*
+ * xen/arch/riscv/aplic.h
+ *
+ * RISC-V Advanced Platform-Level Interrupt Controller support
+ *
+ * Copyright (c) 2023 Microchip.
+ */
+
+#ifndef ASM__RISCV__APLIC_H
+#define ASM__RISCV__APLIC_H
+
+#include <xen/types.h>
+
+#include <asm/imsic.h>
+
+#define APLIC_DOMAINCFG_IE      BIT(8, UL)
+#define APLIC_DOMAINCFG_DM      BIT(2, UL)
+
+struct aplic_regs {
+    uint32_t domaincfg;
+    uint32_t sourcecfg[1023];
+    uint8_t _reserved1[0xBC0];
+
+    uint32_t mmsiaddrcfg;
+    uint32_t mmsiaddrcfgh;
+    uint32_t smsiaddrcfg;
+    uint32_t smsiaddrcfgh;
+    uint8_t _reserved2[0x30];
+
+    uint32_t setip[32];
+    uint8_t _reserved3[92];
+
+    uint32_t setipnum;
+    uint8_t _reserved4[0x20];
+
+    uint32_t in_clrip[32];
+    uint8_t _reserved5[92];
+
+    uint32_t clripnum;
+    uint8_t _reserved6[32];
+
+    uint32_t setie[32];
+    uint8_t _reserved7[92];
+
+    uint32_t setienum;
+    uint8_t _reserved8[32];
+
+    uint32_t clrie[32];
+    uint8_t _reserved9[92];
+
+    uint32_t clrienum;
+    uint8_t _reserved10[32];
+
+    uint32_t setipnum_le;
+    uint32_t setipnum_be;
+    uint8_t _reserved11[4088];
+
+    uint32_t genmsi;
+    uint32_t target[1023];
+};
+
+struct aplic_priv {
+    /* base physical address and size */
+    paddr_t paddr_start;
+    paddr_t paddr_end;
+    size_t  size;
+
+    /* registers */
+    volatile struct aplic_regs *regs;
+
+    /* imsic configuration */
+    const struct imsic_config *imsic_cfg;
+};
+
+#endif /* ASM__RISCV__APLIC_H */


      

      
Does all of this really need to live in a non-private header?

    

    
struct aplic_priv is used in different files:
- in aplic.c to define `aplic` variable.
- in vaplic.c (which isn't intoduced yet) is used in several places: https://gitlab.com/xen-project/people/olkur/xen/-/blob/latest/xen/arch/riscv/vaplic.c#L41

struct aplic_regs is used only in aplic.c (at least, at the moment) so could be moved to
aplic.c, but I don't see too much sense.



    

      



      

        
--- a/xen/arch/riscv/include/asm/irq.h
+++ b/xen/arch/riscv/include/asm/irq.h
@@ -27,7 +27,6 @@
 #define IRQ_TYPE_INVALID        DT_IRQ_TYPE_INVALID
 
 /* TODO */
-#define nr_irqs 0U


      

      
How come this is simply no longer needed, i.e. without any replacement?
Hmm, looks like the only use in common code has gone away. Yet then this
still doesn't really look to belong here (especially if not mentioned in
the description).

    

    
I missed that it is used in xen/common/domain.c when CONFIG_HAS_PIRQ=y, but this
config isn't selected for RISC-V.
I think that I have to revert this change.

~ Oleksii


  


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On 10/04/2025 16:54, Jan Beulich wrote:
> First, they all start out zeroed. There's no point doing an initial
> cpumask_clear() on them.
> 
> Next, only cpu_online_map may be altered post-boot, and even that only
> rarely. Add respective placement attributes.
> 
> Finally, cpu_present_map really isn't anything more than an alias of
> cpu_possible_map. Avoid the copying, and have the linker provide the
> symbol (if needed in the first place; it is needed right now as
> common code references the symbol).
> 
> Signed-off-by: Jan Beulich 
Reviewed-by: Michal Orzel 

> ---
> I would have preferred to use __attribute__((alias(...))), but that
> apparently (and following the doc) can't be used when a declaration of
> the to-be-provided symbol is present earlier. 
> 
> With the cpumask_clear()s dropped, the containing function's name is
> now yet more out of sync with what the function does. On x86 we call a
> similar thing smp_prepare_boot_cpu().
I agree the function name no longer makes sense. I'd be ok with renaming it to
smp_prepare_boot_cpu().

~Michal



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	Xen-devel ,
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Date: Wed, 16 Apr 2025 12:21:33 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Andrew Cooper 
Cc: Stefano Stabellini ,
	Xen-devel ,
	Anthony PERARD ,
	Michal Orzel ,
	Doug Goldstein ,
	Jason Andryuk ,
	"Daniel P . Smith" 
Subject: Re: [PATCH v2 2/7] Overhaul how Argo is built and packged

On Wed, Apr 16, 2025 at 11:15:21AM +0100, Andrew Cooper wrote:
> On 16/04/2025 12:48 am, Stefano Stabellini wrote:
> > On Mon, 14 Apr 2025, Andrew Cooper wrote:
> >> Right now, the argo artefacts are a pile of files which the test has t=
o turn
> >> back into something which resembles a filesystem.  Furthermore, becaus=
e we do
> >> not build modules for the main kernel, it is extra important to make s=
ure that
> >> xen-argo.ko doesn't get out of sync.
> >>
> >> Build argo conditionally as part of the linux artefact.  It's ~100kb a=
ll
> >> together, compared to ~14M for the kernel.
> >>
> >> Produce a single argo.cpio.gz with xen-argo.ko in the standard locatio=
n.
> >> Prune userspace down to just the executables and libraries.
> >>
> >> This is cribbed from the existing scripts/x86_64-linux-argo.sh, which =
stays in
> >> place in the short term until Xen can be updated to use the new scheme.
> >>
> >> Signed-off-by: Andrew Cooper 
> > Do we need to remove x86_64-argo-linux.sh?
>=20
> Yes, but 4.20 still uses it.
>=20
> One thing I'm not sure about is whether "keep latest artefact" is just
> artefacts from the latest run, or the latest of each named artefact.

I think it's latest run for a branch. If newer job (on a branch) doesn't
include an artifact anymore, it will be gone. Jobs referencing it won't
see it immediately, regardless of expire time.

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Subject: Re: [PATCH v1 09/14] xen/riscv: aplic_init() implementation
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Romain Caritey , xen-devel@lists.xenproject.org
References: 
 <1d023045be49ae93d41d552f9c9a79972fa4e84b.1744126720.git.oleksii.kurochko@gmail.com>
 
 
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On 16.04.2025 12:15, Oleksii Kurochko wrote:
> On 4/14/25 12:04 PM, Jan Beulich wrote:
>> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>>> +    rc = dt_property_read_u32(node, "msi-parent", &imsic_phandle);
>>> +    if ( !rc )
>>> +        panic("%s: IDC mode not supported\n", node->full_name);
>>> +
>>> +    imsic_node = dt_find_node_by_phandle(imsic_phandle);
>>> +    if ( !imsic_node )
>>> +        panic("%s: unable to find IMSIC node\n", node->full_name);
>>> +
>>> +    /* check imsic mode */
>>> +    rc = dt_property_read_u32_array(imsic_node, "interrupts-extended",
>>> +                                    irq_range, ARRAY_SIZE(irq_range));
>>> +    if ( rc && (rc != -EOVERFLOW) )
>>> +        panic("%s: unable to find interrupt-extended in %s node\n",
>>> +               node->full_name, imsic_node->full_name);
>> Why exactly is EOVERFLOW tolerable here?
> 
> QEMU generates two IMSIC device tree nodes: one for M-mode and one for S-mode.
> For the hypervisor, we don’t really care about the M-mode IMSIC node — we're only
> interested in the S-mode IMSIC node.
> 
> The IMSIC node includes this information in the|"interrupts-extended"| property,
> which has the following format:
>    interrupt-extended = {, },...
> The number of such|| pairs depends on the number of CPUs the platform has.
> 
> For our purposes, to determine whether the IMSIC node corresponds to M-mode or not, it’s sufficient to read only the first pair and check the mode like this:
> 
>    if ( irq_range[1] == IRQ_M_EXT )
> 
> Thereby dt_property_read_u32_array() will return -EOVERFLOW in the case when a platfrom
> has more then one CPU as we passed irq_range[2] as an argument but the amount of values
> in "interrupts-extended" property will be (2 * CPUS_NUM).
> 
> I can update the comment above dt_property_read_u32_array() for more clearness.

Yet my question remains: Why would it be okay to ignore the remaining entries,
and hence accept -EOVERFLOW as kind-of-success?

>>> +    aplic.regs = ioremap(paddr, size);
>>> +    if ( !aplic.regs )
>>> +        panic("%s: unable to map\n", node->full_name);
>>> +
>>> +    /* Setup initial state APLIC interrupts */
>>> +    aplic_init_hw_interrupts();
>>> +
>>> +    return 0;
>>> +}
>>> +
>>> +static const struct intc_hw_operations __ro_after_init aplic_ops = {
>> const or __ro_after_init?
> 
> What’s wrong with using both?|const| ensures the variable can't be changed at compile time,
> while|__ro_after_init| makes it read-only at runtime after initialization is complete.

No, const makes it read-only at compile- and run-time. __ro_after_init,
putting the item into a special section, makes it writable at init-time.
Due to the const, the compiler wouldn't emit any writes. But we can
also avoid stray writes by having the item live in .rodata.

> Probably,|__initconst| would be a better fit:
>    static const struct intc_hw_operations __initconst aplic_ops = {
> 
> Or even|__initconstrel|, since the|struct intc_hw_operations| contains pointers.

Well, if this variable isn't accessed post-init, sure. That seems pretty
unlikely though, considering it contains pointers to hook functions.

>>> --- /dev/null
>>> +++ b/xen/arch/riscv/include/asm/aplic.h
>>> @@ -0,0 +1,77 @@
>>> +/* SPDX-License-Identifier: MIT */
>>> +
>>> +/*
>>> + * xen/arch/riscv/aplic.h
>>> + *
>>> + * RISC-V Advanced Platform-Level Interrupt Controller support
>>> + *
>>> + * Copyright (c) 2023 Microchip.
>>> + */
>>> +
>>> +#ifndef ASM__RISCV__APLIC_H
>>> +#define ASM__RISCV__APLIC_H
>>> +
>>> +#include 
>>> +
>>> +#include 
>>> +
>>> +#define APLIC_DOMAINCFG_IE      BIT(8, UL)
>>> +#define APLIC_DOMAINCFG_DM      BIT(2, UL)
>>> +
>>> +struct aplic_regs {
>>> +    uint32_t domaincfg;
>>> +    uint32_t sourcecfg[1023];
>>> +    uint8_t _reserved1[0xBC0];
>>> +
>>> +    uint32_t mmsiaddrcfg;
>>> +    uint32_t mmsiaddrcfgh;
>>> +    uint32_t smsiaddrcfg;
>>> +    uint32_t smsiaddrcfgh;
>>> +    uint8_t _reserved2[0x30];
>>> +
>>> +    uint32_t setip[32];
>>> +    uint8_t _reserved3[92];
>>> +
>>> +    uint32_t setipnum;
>>> +    uint8_t _reserved4[0x20];
>>> +
>>> +    uint32_t in_clrip[32];
>>> +    uint8_t _reserved5[92];
>>> +
>>> +    uint32_t clripnum;
>>> +    uint8_t _reserved6[32];
>>> +
>>> +    uint32_t setie[32];
>>> +    uint8_t _reserved7[92];
>>> +
>>> +    uint32_t setienum;
>>> +    uint8_t _reserved8[32];
>>> +
>>> +    uint32_t clrie[32];
>>> +    uint8_t _reserved9[92];
>>> +
>>> +    uint32_t clrienum;
>>> +    uint8_t _reserved10[32];
>>> +
>>> +    uint32_t setipnum_le;
>>> +    uint32_t setipnum_be;
>>> +    uint8_t _reserved11[4088];
>>> +
>>> +    uint32_t genmsi;
>>> +    uint32_t target[1023];
>>> +};
>>> +
>>> +struct aplic_priv {
>>> +    /* base physical address and size */
>>> +    paddr_t paddr_start;
>>> +    paddr_t paddr_end;
>>> +    size_t  size;
>>> +
>>> +    /* registers */
>>> +    volatile struct aplic_regs *regs;
>>> +
>>> +    /* imsic configuration */
>>> +    const struct imsic_config *imsic_cfg;
>>> +};
>>> +
>>> +#endif /* ASM__RISCV__APLIC_H */
>> Does all of this really need to live in a non-private header?
> 
> struct aplic_priv is used in different files:
> - in aplic.c to define `aplic` variable.
> - in vaplic.c (which isn't intoduced yet) is used in several places:https://gitlab.com/xen-project/people/olkur/xen/-/blob/latest/xen/arch/riscv/vaplic.c#L41

Which would still call for a private header (xen/arch/riscv/aplic.h).

> struct aplic_regs is used only in aplic.c (at least, at the moment) so could be moved to
> aplic.c, but I don't see too much sense.

It is generally good practice to limit the scope of things as much as
possible. Just to avoid (or make more noticeable) mis-uses or layering
violations, for example.

>>> --- a/xen/arch/riscv/include/asm/irq.h
>>> +++ b/xen/arch/riscv/include/asm/irq.h
>>> @@ -27,7 +27,6 @@
>>>   #define IRQ_TYPE_INVALID        DT_IRQ_TYPE_INVALID
>>>   
>>>   /* TODO */
>>> -#define nr_irqs 0U
>> How come this is simply no longer needed, i.e. without any replacement?
>> Hmm, looks like the only use in common code has gone away. Yet then this
>> still doesn't really look to belong here (especially if not mentioned in
>> the description).
> 
> I missed that it is used in xen/common/domain.c when CONFIG_HAS_PIRQ=y, but this
> config isn't selected for RISC-V.
> I think that I have to revert this change.

I don't think you need to, as long as you don't mean to select HAS_PIRQ
for RISC-V. It's just that the change looks entirely unrelated _here_.

Jan


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Date: Wed, 16 Apr 2025 19:38:20 +0900
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Subject: Re: [PATCH v2 0/2] Add support for MSI injection on Arm
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To: Mykyta Poturai ,
 Stefano Stabellini 
Cc: "xen-devel@lists.xenproject.org" ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Rahul Singh 
References: 
 <98feb427-7da5-47ff-831c-2b4bcb26c4b9@xen.org>
 
 <15938705-ae5e-43c9-826f-d7a8c7425baa@epam.com>
From: Julien Grall 
In-Reply-To: <15938705-ae5e-43c9-826f-d7a8c7425baa@epam.com>
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(+ Rahul)

On 16/04/2025 17:37, Mykyta Poturai wrote:
> On 16.04.25 01:40, Stefano Stabellini wrote:
>> On Mon, 14 Apr 2025, Julien Grall wrote:
>>> Hi Mykyta,
>>>
>>> On 14/04/2025 18:51, Mykyta Poturai wrote:
>>>> This series adds the base support for MSI injection on Arm. This is
>>>> needed to streamline virtio-pci interrupt triggering.
>>>>
>>>> With this patches, MSIs can be triggered in guests by issuing the new
>>>> DM op, inject_msi2. This op is similar to inject_msi, but it allows
>>>> to specify the source id of the MSI.
>>>>
>>>> We chose the approach of adding a new DM op instead of using the pad
>>>> field of inject_msi because we have no clear way of distinguishing
>>>> between set and unset pad fields. New implementations also adds flags
>>>> field to clearly specify if the SBDF is set.
>>>>
>>>> Patches were tested on QEMU with
>>>
>>> [...]
>>>
>>>> patches for ITS support for DomUs applied.
>>>
>>> This means this series is unusable without external patches. Given this is
>>> adding a new DM operations, I think it would be more sensible to have the vITS
>>> support merged first. Then we can look at merging this series.
>>
>> Hi Mykyta, just checking explicitly with you whether this series
>> requires vgic-v3-its.c for DomUs?
>>
>> If yes, how far are you from sending the relevant patches to xen-devel?
>> How many are they?
> 
> Hi Stefano,
> Yes, I am planning to send them together with VPCI MSI support after
> SMMU patches are merged.
> 
> Although the DomU vits itself is only two patches.

I am assuming this is work in progress patches rather than the one you 
plan to send, correct?

Asking, because currently there are a few 
ASSERT(is_hardware_domain(its->d)) to indicate where changes are likely 
for the guests. You seem to remove them without explaining why or any 
associated code.

While I will not ask to have a security support guest vITS from the 
start. I would like some confidence that we are going in the right 
direction. IOW, I would like to see a design document that would explain 
how we can achieve it. Some of the part to consider:
   * Command queue
   * LPIs
   * 1:1 pITS <-> vITS vs one vITS to many pITS
   * The page-tables are shared between the device and CPU. Are we ok to 
keep the doorbell writable by the CPU?

There was some discussion in the past about it (I have added Rahul 
because IIRC he was driving the discussion). So most likely, we would 
need the design to be respinned and agreed first.

Lastly, I see you seem to go down the route of exposing one vITS only. 
But I don't think your patch is sufficient to support multiple pITS (the 
guest doorbell will be mapped to a different host doorbell depending on 
the guest).

Cheers,

-- 
Julien Grall



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On 16.04.25 04:03, Stefano Stabellini wrote:
> On Mon, 14 Apr 2025, Grygorii Strashko wrote:
>> From: Grygorii Strashko 
>>
>> The current code in generate_uboot_images() does not detect arm64 properly
>> and always generates ARM u-boot image. This causes Xen boot issues.
>>
>> Fix it by searching for "ARM64" for AArch64 binary detection.
>>
>> - mkimage -l xen.ub
>> Before:
>> Image Type:   ARM Linux Kernel Image (uncompressed)
>>
>> After:
>> Image Type:   AArch64 Linux Kernel Image (uncompressed)
>>
>> Signed-off-by: Grygorii Strashko 
>> ---
>>   scripts/uboot-script-gen | 6 +++---
>>   1 file changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/scripts/uboot-script-gen b/scripts/uboot-script-gen
>> index a9f698f00fd1..c4d26caf5e0e 100755
>> --- a/scripts/uboot-script-gen
>> +++ b/scripts/uboot-script-gen
>> @@ -815,13 +815,13 @@ function linux_config()
>>   
>>   generate_uboot_images()
>>   {
>> -    local arch=$(file -L $XEN | grep "ARM")
>> +    local arch=$(file -L $XEN | grep -o "ARM64")
> 
> My file -L gives:
> 
> for arm32: ARM OpenFirmware [...]
> for arm64: Aarch64
> 
> So the ARM64 grep wouldn't work as intended. Is the version of `file'
> that you are using really printing ARM64?

Hm, yes.

	file -L xen
	xen: Linux kernel ARM64 boot executable Image, little-endian, 4K pages

	file -v
	file-5.41

u-boot boot command:
	 bootm 0x4EA00000 - 0x4EE00000


  If so, we can do:
> 
>    file -L $XEN | grep -E 'ARM64|Aarch64'

sure. I'll update.

> 
> 
>>       if test "$arch"
>>       then
>> -        arch=arm
>> -    else
>>           arch=arm64
>> +    else
>> +        arch=arm
>>       fi
>>   
>>       mkimage -A $arch -T kernel -C none -a $memaddr -e $memaddr -d $XEN "$XEN".ub
>> -- 
>> 2.34.1
>>

-- 
Best regards,
-grygorii


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Subject: Re: [PATCH v4] xen/riscv: Increase XEN_VIRT_SIZE
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <0815b65aa0b526b85c737f5923148b119cc4104f.1744639515.git.oleksii.kurochko@gmail.com>
 <6ea52f30-7aa4-494b-9719-9fdffc56e3c8@suse.com>
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On 4/15/25 12:07 PM, Jan Beulich wrote:
> On 14.04.2025 17:56, Oleksii Kurochko wrote:
>> --- a/xen/arch/riscv/mm.c
>> +++ b/xen/arch/riscv/mm.c
>> @@ -31,20 +31,30 @@ unsigned long __ro_after_init phys_offset; /* = load_start - XEN_VIRT_START */
>>   #define LOAD_TO_LINK(addr) ((unsigned long)(addr) - phys_offset)
>>   
>>   /*
>> - * It is expected that Xen won't be more then 2 MB.
>> + * It is expected that Xen won't be more then XEN_VIRT_SIZE.
>>    * The check in xen.lds.S guarantees that.
>> - * At least 3 page tables (in case of Sv39 ) are needed to cover 2 MB.
>> - * One for each page level table with PAGE_SIZE = 4 Kb.
>>    *
>> - * One L0 page table can cover 2 MB(512 entries of one page table * PAGE_SIZE).
>> + * Root page table is shared with the initial mapping and is declared
>> + * separately. (look at stage1_pgtbl_root)
>>    *
>> - * It might be needed one more page table in case when Xen load address
>> - * isn't 2 MB aligned.
>> + * An amount of page tables between root page table and L0 page table
>> + * (in the case of Sv39 it covers L1 table):
>> + *   (CONFIG_PAGING_LEVELS - 2) are needed for an identity mapping and
>> + *   the same amount are needed for Xen.
>>    *
>> - * CONFIG_PAGING_LEVELS page tables are needed for the identity mapping,
>> - * except that the root page table is shared with the initial mapping
>> + * An amount of L0 page tables:
>> + *   (512 entries of one L0 page table covers 2MB == 1<> + *   XEN_VIRT_SIZE >> XEN_PT_LEVEL_SHIFT(1) are needed for Xen and
>> + *   one L0 is needed for identity mapping.
>>    */
>> -#define PGTBL_INITIAL_COUNT ((CONFIG_PAGING_LEVELS - 1) * 2 + 1)
>> +#define PGTBL_INITIAL_COUNT ((CONFIG_PAGING_LEVELS - 2) * 2 + \
>> +                             (XEN_VIRT_SIZE >> XEN_PT_LEVEL_SHIFT(1)) + 1)
> I'm still struggling here. In the original expression, the +1 was to cover
> the root page table, wasn't it?

|+1| was added to cover the case where the Xen address is not 2MB-aligned.

For the root page table, we use a separate variable|stage1_pgtbl_root|.
Since the root page table is shared with the identity mapping, it is not
included in|PGTBL_INITIAL_COUNT|.

> By now subtracting 2 from
> CONFIG_PAGING_LEVELS, you reduce the overall result by 2. One of these two
> is accounted for by the Xen size calculation now. Where's the other one?
> Or are you suggesting that for some (not obvious to me) reason we
> previously calculated one too many?

My calculation was as follows:
  *[a]* One shared root page table is needed for both the identity mapping and Xen itself.
  *[b]* |(CONFIG_PAGING_LEVELS - 2)| page tables are needed for identity mapping and Xen.
      The|-2| accounts for:
      - No extra root page table (since we use a separate variable for it).
      - No extra L0 page table (as those will be calculated separately in the next step).
   *[c]* We also need|(XEN_VIRT_SIZE >> XEN_PT_LEVEL_SHIFT(1))| L0s to cover Xen itself,
       plus one additional L0 page table for the identity mapping.

It might be better to calculate the total in the following way:
  ((CONFIG_PAGING_LEVELS - 1) * 2 + (XEN_VIRT_SIZE >> XEN_PT_LEVEL_SHIFT(1)) - 1)

Here’s the reasoning:
   -|(CONFIG_PAGING_LEVELS - 1)| excludes the root page table (provided separately via
|||stage1_pgtbl_root|), but we add back:
       - One L0 for Xen,
       - One L0 for the identity mapping.
Since the L0 used for identity mapping is now implicitly part of|(CONFIG_PAGING_LEVELS - 1)|,
we can drop the|+1| from|PGTBL_INITIAL_COUNT|.
Additionally, we need to subtract|1|, because changing from|(CONFIG_PAGING_LEVELS - 2)| to
|(CONFIG_PAGING_LEVELS - 1)| adds one extra L0 for Xen itself too.

Does it make sense?

>
>> +/* Changing these checks can require an update of PGTBL_INITIAL_COUNT */
>> +_Static_assert(IS_ALIGNED(XEN_VIRT_START, GB(1)),
>> +               "XEN_VIRT_START should be 1gb aligned");
>> +_Static_assert(IS_ALIGNED(XEN_VIRT_SIZE, MB(2)),
>> +               "XEN_VIRT_SIZE should be 2mb aligned");
> Why would you need to open-code BUILD_BUG_ON() here? See the various
> build_assertions() functions we've accumulated.

I missed build_assertions() functions. I will do in a similar way.

Thanks.

~ Oleksii

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On 4/15/25 12:07 PM, Jan Beulich wrote:

    

    

      
On 14.04.2025 17:56, Oleksii Kurochko wrote:


      

        
--- a/xen/arch/riscv/mm.c
+++ b/xen/arch/riscv/mm.c
@@ -31,20 +31,30 @@ unsigned long __ro_after_init phys_offset; /* = load_start - XEN_VIRT_START */
 #define LOAD_TO_LINK(addr) ((unsigned long)(addr) - phys_offset)
 
 /*
- * It is expected that Xen won't be more then 2 MB.
+ * It is expected that Xen won't be more then XEN_VIRT_SIZE.
  * The check in xen.lds.S guarantees that.
- * At least 3 page tables (in case of Sv39 ) are needed to cover 2 MB.
- * One for each page level table with PAGE_SIZE = 4 Kb.
  *
- * One L0 page table can cover 2 MB(512 entries of one page table * PAGE_SIZE).
+ * Root page table is shared with the initial mapping and is declared
+ * separately. (look at stage1_pgtbl_root)
  *
- * It might be needed one more page table in case when Xen load address
- * isn't 2 MB aligned.
+ * An amount of page tables between root page table and L0 page table
+ * (in the case of Sv39 it covers L1 table):
+ *   (CONFIG_PAGING_LEVELS - 2) are needed for an identity mapping and
+ *   the same amount are needed for Xen.
  *
- * CONFIG_PAGING_LEVELS page tables are needed for the identity mapping,
- * except that the root page table is shared with the initial mapping
+ * An amount of L0 page tables:
+ *   (512 entries of one L0 page table covers 2MB == 1<<XEN_PT_LEVEL_SHIFT(1))
+ *   XEN_VIRT_SIZE >> XEN_PT_LEVEL_SHIFT(1) are needed for Xen and
+ *   one L0 is needed for identity mapping.
  */
-#define PGTBL_INITIAL_COUNT ((CONFIG_PAGING_LEVELS - 1) * 2 + 1)
+#define PGTBL_INITIAL_COUNT ((CONFIG_PAGING_LEVELS - 2) * 2 + \
+                             (XEN_VIRT_SIZE >> XEN_PT_LEVEL_SHIFT(1)) + 1)


      

      
I'm still struggling here. In the original expression, the +1 was to cover
the root page table, wasn't it? 

    

    
+1 was added to cover the case where the Xen address is not 2MB-aligned.

For the root page table, we use a separate variable stage1_pgtbl_root.
Since the root page table is shared with the identity mapping, it is not
included in PGTBL_INITIAL_COUNT.



    

      
By now subtracting 2 from
CONFIG_PAGING_LEVELS, you reduce the overall result by 2. One of these two
is accounted for by the Xen size calculation now. Where's the other one?
Or are you suggesting that for some (not obvious to me) reason we
previously calculated one too many?

    

    
My calculation was as follows:
 [a] One shared root page table is needed for both the identity mapping and Xen itself.
 [b] (CONFIG_PAGING_LEVELS - 2) page tables are needed for identity mapping and Xen.
     The -2 accounts for:
     - No extra root page table (since we use a separate variable for it).
     - No extra L0 page table (as those will be calculated separately in the next step).
  [c] We also need (XEN_VIRT_SIZE >> XEN_PT_LEVEL_SHIFT(1)) L0s to cover Xen itself,
      plus one additional L0 page table for the identity mapping.

    
It might be better to calculate the total in the following way:
 ((CONFIG_PAGING_LEVELS - 1) * 2 + (XEN_VIRT_SIZE >> XEN_PT_LEVEL_SHIFT(1)) - 1)

Here’s the reasoning:
  - (CONFIG_PAGING_LEVELS - 1) excludes the root page table (provided separately via
    stage1_pgtbl_root), but we add back:
      - One L0 for Xen,
      - One L0 for the identity mapping.
Since the L0 used for identity mapping is now implicitly part of (CONFIG_PAGING_LEVELS - 1),
we can drop the +1 from PGTBL_INITIAL_COUNT.
Additionally, we need to subtract 1, because changing from (CONFIG_PAGING_LEVELS - 2) to
(CONFIG_PAGING_LEVELS - 1) adds one extra L0 for Xen itself too.

Does it make sense?



    

      



      

        
+/* Changing these checks can require an update of PGTBL_INITIAL_COUNT */
+_Static_assert(IS_ALIGNED(XEN_VIRT_START, GB(1)),
+               "XEN_VIRT_START should be 1gb aligned");
+_Static_assert(IS_ALIGNED(XEN_VIRT_SIZE, MB(2)),
+               "XEN_VIRT_SIZE should be 2mb aligned");


      

      
Why would you need to open-code BUILD_BUG_ON() here? See the various
build_assertions() functions we've accumulated.

    

    
I missed build_assertions() functions. I will do in a similar way.

Thanks.

~ Oleksii


  


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Message-ID: 
Date: Wed, 16 Apr 2025 12:50:42 +0200
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Subject: Re: [PATCH v3 3/7] arm/mpu: Introduce utility functions for the pr_t
 type
To: Luca Fancellu , xen-devel@lists.xenproject.org
Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
 Volodymyr Babchuk 
References: <20250411145655.140667-1-luca.fancellu@arm.com>
 <20250411145655.140667-4-luca.fancellu@arm.com>
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On 11/04/2025 16:56, Luca Fancellu wrote:
> Introduce few utility function to manipulate and handle the
> pr_t type.
> 
> Signed-off-by: Luca Fancellu 
> ---
>  xen/arch/arm/include/asm/mpu.h | 40 ++++++++++++++++++++++++++++++++++
>  1 file changed, 40 insertions(+)
> 
> diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h
> index 59ff22c804c1..6971507457fb 100644
> --- a/xen/arch/arm/include/asm/mpu.h
> +++ b/xen/arch/arm/include/asm/mpu.h
> @@ -20,6 +20,46 @@
>  #define NUM_MPU_REGIONS_MASK    (NUM_MPU_REGIONS - 1)
>  #define MAX_MPU_REGIONS         NUM_MPU_REGIONS_MASK
>  
> +#ifndef __ASSEMBLY__
> +
> +/* Set base address of MPU protection region(pr_t). */
What's the use of (pr_t) in this comment? pr_t is a data type. If at all, it
would want to be ...region @pr but I think you can skip it.

> +static inline void pr_set_base(pr_t *pr, paddr_t base)
> +{
> +    pr->prbar.reg.base = (base >> MPU_REGION_SHIFT);
Looking at pr_t definition, base/limit is 46 bits wide. However the spec says
that last 4bits are reserved (i.e. you should not write to them) unless FEAT_LPA
is implemented. What's our plan here?

> +}
> +
> +/* Set limit address of MPU protection region(pr_t). */
> +static inline void pr_set_limit(pr_t *pr, paddr_t limit)
> +{
> +    pr->prlar.reg.limit = ((limit - 1) >> MPU_REGION_SHIFT);
Why -1? AFAIR these registers take inclusive addresses, so is it because you
want caller to pass limit as exclusive and you convert it to inclusive? I think
it's quite error prone.


~Michal



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Subject: Re: [PATCH v9 8/8] xen/arm: Map ITS doorbell register to IOMMU page
 tables
Content-Language: en-GB
To: Mykyta Poturai ,
 "xen-devel@lists.xenproject.org" 
Cc: Rahul Singh ,
 Stefano Stabellini ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Stewart Hildebrand 
References: 
 
From: Julien Grall 
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Hi Mykyta,

On 14/03/2025 22:34, Mykyta Poturai wrote:
> From: Rahul Singh 
> 
> When ITS is enabled and PCI devices that are behind an SMMU generate an
> MSI interrupt, SMMU fault will be observed as there is currently no
> mapping in p2m table for the ITS translation register (GITS_TRANSLATER).
> 
> A mapping is required in the iommu page tables so that the device can
> generate the MSI interrupt writing to the GITS_TRANSLATER register.
> 
> The GITS_TRANSLATER register is a 32-bit register, and there is nothing
> else in a page containing it, so map that page.
> 
> Signed-off-by: Rahul Singh 
> Signed-off-by: Stewart Hildebrand 
> Signed-off-by: Mykyta Poturai 
> ---
> This patch was originally picked up from [1], and commit description
> loosely borrowed from [2].
> 
> Example SMMUv3 fault (qemu-system-aarch64 virt model), ITS base 0x8080000:
> 
> (XEN) SMMUv3: /smmuv3@9050000: event 0x10 received:
> (XEN) SMMUv3: /smmuv3@9050000:  0x0000000800000010
> (XEN) SMMUv3: /smmuv3@9050000:  0x0000008000000000
> (XEN) SMMUv3: /smmuv3@9050000:  0x0000000008090040
> (XEN) SMMUv3: /smmuv3@9050000:  0x0000000000000000
> 
> Example SMMUv2 fault (AMD/Xilinx Versal), ITS base 0xf9020000:
> 
> (XEN) smmu: /axi/smmu@fd800000: Unhandled context fault: fsr=0x402, iova=0xf9030040, fsynr=0x12, cb=0
> 
> v8->v9:
> * no changes
> 
> v7->v8:
> * no changes
> 
> v6->v7:
> * add tlb flush after mapping
> * style: update formatting
> * revert back to printk with XENLOG_G_ERR
> 
> v5->v6:
> * switch to iommu_map() interface
> * fix page_count argument
> * style fixup
> * use gprintk instead of printk
> * add my Signed-off-by
> * move to vgic_v3_its_init_virtual()
> 
> v4->v5:
> * new patch
> 
> [1] https://lists.xenproject.org/archives/html/xen-devel/2023-07/msg00483.html
> [2] https://gitlab.com/xen-project/people/bmarquis/xen-arm-poc/-/commit/6232a0d53377009bb7fbc3c3ab81d0153734be6b
> ---
>   xen/arch/arm/vgic-v3-its.c | 20 ++++++++++++++++++++
>   1 file changed, 20 insertions(+)
> 
> diff --git a/xen/arch/arm/vgic-v3-its.c b/xen/arch/arm/vgic-v3-its.c
> index c65c1dbf52..376254f206 100644
> --- a/xen/arch/arm/vgic-v3-its.c
> +++ b/xen/arch/arm/vgic-v3-its.c
> @@ -1478,6 +1478,26 @@ static int vgic_v3_its_init_virtual(struct domain *d, paddr_t guest_addr,
>   
>       register_mmio_handler(d, &vgic_its_mmio_handler, guest_addr, SZ_64K, its);
>   
> +    if ( is_iommu_enabled(its->d) )
> +    {
> +        mfn_t mfn = maddr_to_mfn(its->doorbell_address);
> +        unsigned int flush_flags = 0;
> +        int ret = iommu_map(its->d, _dfn(mfn_x(mfn)), mfn, 1, IOMMUF_writable,
> +                            &flush_flags);

While looking at your patches for the guest vITS support. I noticed this 
line is not updated for domU. Regardless of the one vs many vITS 
discussion, I don't think this wants to be mapped 1:1. Instead, you want 
to map the guest doorbell page to the host doorbell page.

The flush would need to be updated accordingly.

Cheers,

> +
> +        if ( ret < 0 )
> +        {
> +            printk(XENLOG_G_ERR
> +                    "GICv3: Map ITS translation register for %pd failed.\n",
> +                    its->d);
> +            return ret;
> +        }
> +
> +        ret = iommu_iotlb_flush(its->d, _dfn(mfn_x(mfn)), 1, flush_flags);
> +        if ( ret < 0 )
> +            return ret;
> +    }
> +
>       /* Register the virtual ITS to be able to clean it up later. */
>       list_add_tail(&its->vits_list, &d->arch.vgic.vits_list);
>   

-- 
Julien Grall



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Date: Wed, 16 Apr 2025 13:40:36 +0200
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v4] xen/riscv: Increase XEN_VIRT_SIZE
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <0815b65aa0b526b85c737f5923148b119cc4104f.1744639515.git.oleksii.kurochko@gmail.com>
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On 16.04.2025 12:44, Oleksii Kurochko wrote:
> 
> On 4/15/25 12:07 PM, Jan Beulich wrote:
>> On 14.04.2025 17:56, Oleksii Kurochko wrote:
>>> --- a/xen/arch/riscv/mm.c
>>> +++ b/xen/arch/riscv/mm.c
>>> @@ -31,20 +31,30 @@ unsigned long __ro_after_init phys_offset; /* = load_start - XEN_VIRT_START */
>>>   #define LOAD_TO_LINK(addr) ((unsigned long)(addr) - phys_offset)
>>>   
>>>   /*
>>> - * It is expected that Xen won't be more then 2 MB.
>>> + * It is expected that Xen won't be more then XEN_VIRT_SIZE.
>>>    * The check in xen.lds.S guarantees that.
>>> - * At least 3 page tables (in case of Sv39 ) are needed to cover 2 MB.
>>> - * One for each page level table with PAGE_SIZE = 4 Kb.
>>>    *
>>> - * One L0 page table can cover 2 MB(512 entries of one page table * PAGE_SIZE).
>>> + * Root page table is shared with the initial mapping and is declared
>>> + * separately. (look at stage1_pgtbl_root)
>>>    *
>>> - * It might be needed one more page table in case when Xen load address
>>> - * isn't 2 MB aligned.
>>> + * An amount of page tables between root page table and L0 page table
>>> + * (in the case of Sv39 it covers L1 table):
>>> + *   (CONFIG_PAGING_LEVELS - 2) are needed for an identity mapping and
>>> + *   the same amount are needed for Xen.
>>>    *
>>> - * CONFIG_PAGING_LEVELS page tables are needed for the identity mapping,
>>> - * except that the root page table is shared with the initial mapping
>>> + * An amount of L0 page tables:
>>> + *   (512 entries of one L0 page table covers 2MB == 1<>> + *   XEN_VIRT_SIZE >> XEN_PT_LEVEL_SHIFT(1) are needed for Xen and
>>> + *   one L0 is needed for identity mapping.
>>>    */
>>> -#define PGTBL_INITIAL_COUNT ((CONFIG_PAGING_LEVELS - 1) * 2 + 1)
>>> +#define PGTBL_INITIAL_COUNT ((CONFIG_PAGING_LEVELS - 2) * 2 + \
>>> +                             (XEN_VIRT_SIZE >> XEN_PT_LEVEL_SHIFT(1)) + 1)
>> I'm still struggling here. In the original expression, the +1 was to cover
>> the root page table, wasn't it?
> 
> |+1| was added to cover the case where the Xen address is not 2MB-aligned.

Oh, okay.

> For the root page table, we use a separate variable|stage1_pgtbl_root|.
> Since the root page table is shared with the identity mapping, it is not
> included in|PGTBL_INITIAL_COUNT|.

Makes all sense then, thanks.

Jan


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From: Andrew Cooper 
To: Xen-devel 
Cc: Lin Liu ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Volodymyr Babchuk ,
	Bertrand Marquis ,
	Shawn Anastasio ,
	Oleksii Kurochko ,
	"Daniel P . Smith" 
Subject: [PATCH v6 04/15] xen/device-tree: Remove use of *_to_cpup() helpers
Date: Wed, 16 Apr 2025 12:58:49 +0100
Message-Id: <20250416115900.2491661-5-andrew.cooper3@citrix.com>
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From: Lin Liu 

These wrappers simply hide a deference, which adds to the cognitive complexity
of reading the code.  As such, they're not going to be included in the new
byteswap infrastructure.

No functional change.

Signed-off-by: Lin Liu 
Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Michal Orzel 
CC: Jan Beulich 
CC: Julien Grall 
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Volodymyr Babchuk 
CC: Bertrand Marquis 
CC: Shawn Anastasio 
CC: Oleksii Kurochko 
CC: Daniel P. Smith 
CC: Lin Liu 

v5:
 * Rebase
 * Split out of later patch
---
 xen/common/device-tree/device-tree.c | 44 ++++++++++++++--------------
 1 file changed, 22 insertions(+), 22 deletions(-)

diff --git a/xen/common/device-tree/device-tree.c b/xen/common/device-tree/device-tree.c
index e8f810b2fe10..90fee2ba0315 100644
--- a/xen/common/device-tree/device-tree.c
+++ b/xen/common/device-tree/device-tree.c
@@ -173,7 +173,7 @@ bool dt_property_read_u32(const struct dt_device_node *np,
     if ( !val || len < sizeof(*out_value) )
         return 0;
 
-    *out_value = be32_to_cpup(val);
+    *out_value = be32_to_cpu(*val);
 
     return 1;
 }
@@ -266,7 +266,7 @@ int dt_property_read_variable_u32_array(const struct dt_device_node *np,
 
     count = sz;
     while ( count-- )
-        *out_values++ = be32_to_cpup(val++);
+        *out_values++ = be32_to_cpu(*val++);
 
     return sz;
 }
@@ -493,7 +493,7 @@ static int __dt_n_addr_cells(const struct dt_device_node *np, bool parent)
 
         ip = dt_get_property(np, "#address-cells", NULL);
         if ( ip )
-            return be32_to_cpup(ip);
+            return be32_to_cpu(*ip);
     } while ( np->parent );
     /* No #address-cells property for the root node */
     return DT_ROOT_NODE_ADDR_CELLS_DEFAULT;
@@ -510,7 +510,7 @@ static int __dt_n_size_cells(const struct dt_device_node *np, bool parent)
 
         ip = dt_get_property(np, "#size-cells", NULL);
         if ( ip )
-            return be32_to_cpup(ip);
+            return be32_to_cpu(*ip);
     } while ( np->parent );
     /* No #address-cells property for the root node */
     return DT_ROOT_NODE_SIZE_CELLS_DEFAULT;
@@ -643,7 +643,7 @@ static void dt_bus_pci_count_cells(const struct dt_device_node *np,
 static unsigned int dt_bus_pci_get_flags(const __be32 *addr)
 {
     unsigned int flags = 0;
-    u32 w = be32_to_cpup(addr);
+    u32 w = be32_to_cpu(*addr);
 
     switch((w >> 24) & 0x03) {
     case 0x01:
@@ -1096,7 +1096,7 @@ dt_irq_find_parent(const struct dt_device_node *child)
         if ( parp == NULL )
             p = dt_get_parent(child);
         else
-            p = dt_find_node_by_phandle(be32_to_cpup(parp));
+            p = dt_find_node_by_phandle(be32_to_cpu(*parp));
         child = p;
     } while ( p && dt_get_property(p, "#interrupt-cells", NULL) == NULL );
 
@@ -1129,7 +1129,7 @@ unsigned int dt_number_of_irq(const struct dt_device_node *device)
     intlen /= sizeof(*intspec);
 
     dt_dprintk(" using 'interrupts' property\n");
-    dt_dprintk(" intspec=%d intlen=%d\n", be32_to_cpup(intspec), intlen);
+    dt_dprintk(" intspec=%d intlen=%d\n", be32_to_cpu(*intspec), intlen);
 
     /* Look for the interrupt parent. */
     p = dt_irq_find_parent(device);
@@ -1260,7 +1260,7 @@ int dt_for_each_irq_map(const struct dt_device_node *dev,
         imaplen -= addrsize + intsize;
 
         /* Get the interrupt parent */
-        ipar = dt_find_node_by_phandle(be32_to_cpup(imap));
+        ipar = dt_find_node_by_phandle(be32_to_cpu(*imap));
         imap++;
         --imaplen;
 
@@ -1377,8 +1377,8 @@ static int dt_irq_map_raw(const struct dt_device_node *parent,
     int match, i;
 
     dt_dprintk("dt_irq_map_raw: par=%s,intspec=[0x%08x 0x%08x...],ointsize=%d\n",
-               parent->full_name, be32_to_cpup(intspec),
-               be32_to_cpup(intspec + 1), ointsize);
+               parent->full_name, be32_to_cpu(*intspec),
+               be32_to_cpu(*(intspec+1)), ointsize);
 
     ipar = parent;
 
@@ -1490,7 +1490,7 @@ static int dt_irq_map_raw(const struct dt_device_node *parent,
             dt_dprintk(" -> match=%d (imaplen=%d)\n", match, imaplen);
 
             /* Get the interrupt parent */
-            newpar = dt_find_node_by_phandle(be32_to_cpup(imap));
+            newpar = dt_find_node_by_phandle(be32_to_cpu(*imap));
             imap++;
             --imaplen;
 
@@ -1584,7 +1584,7 @@ int dt_device_get_raw_irq(const struct dt_device_node *device,
     intlen /= sizeof(*intspec);
 
     dt_dprintk(" using 'interrupts' property\n");
-    dt_dprintk(" intspec=%d intlen=%d\n", be32_to_cpup(intspec), intlen);
+    dt_dprintk(" intspec=%d intlen=%d\n", be32_to_cpu(*intspec), intlen);
 
     /* Look for the interrupt parent. */
     p = dt_irq_find_parent(device);
@@ -1695,7 +1695,7 @@ static int __dt_parse_phandle_with_args(const struct dt_device_node *np,
          * If phandle is 0, then it is an empty entry with no
          * arguments.  Skip forward to the next entry.
          * */
-        phandle = be32_to_cpup(list++);
+        phandle = be32_to_cpu(*list++);
         if ( phandle )
         {
             /*
@@ -1764,7 +1764,7 @@ static int __dt_parse_phandle_with_args(const struct dt_device_node *np,
                 out_args->np = node;
                 out_args->args_count = count;
                 for ( i = 0; i < count; i++ )
-                    out_args->args[i] = be32_to_cpup(list++);
+                    out_args->args[i] = be32_to_cpu(*list++);
             }
 
             /* Found it! return success */
@@ -1845,7 +1845,7 @@ static unsigned long unflatten_dt_node(const void *fdt,
     int has_name = 0;
     int new_format = 0;
 
-    tag = be32_to_cpup((__be32 *)(*p));
+    tag = be32_to_cpu(*(__be32 *)(*p));
     if ( tag != FDT_BEGIN_NODE )
     {
         printk(XENLOG_WARNING "Weird tag at start of node: %x\n", tag);
@@ -1938,7 +1938,7 @@ static unsigned long unflatten_dt_node(const void *fdt,
         u32 sz, noff;
         const char *pname;
 
-        tag = be32_to_cpup((__be32 *)(*p));
+        tag = be32_to_cpu(*(__be32 *)(*p));
         if ( tag == FDT_NOP )
         {
             *p += 4;
@@ -1947,8 +1947,8 @@ static unsigned long unflatten_dt_node(const void *fdt,
         if ( tag != FDT_PROP )
             break;
         *p += 4;
-        sz = be32_to_cpup((__be32 *)(*p));
-        noff = be32_to_cpup((__be32 *)((*p) + 4));
+        sz = be32_to_cpu(*(__be32 *)(*p));
+        noff = be32_to_cpu(*(__be32 *)((*p) + 4));
         *p += 8;
         if ( fdt_version(fdt) < 0x10 )
             *p = ROUNDUP(*p, sz >= 8 ? 8 : 4);
@@ -1975,13 +1975,13 @@ static unsigned long unflatten_dt_node(const void *fdt,
                  (strcmp(pname, "linux,phandle") == 0) )
             {
                 if ( np->phandle == 0 )
-                    np->phandle = be32_to_cpup((__be32*)*p);
+                    np->phandle = be32_to_cpu(*(__be32*)*p);
             }
             /* And we process the "ibm,phandle" property
              * used in pSeries dynamic device tree
              * stuff */
             if ( strcmp(pname, "ibm,phandle") == 0 )
-                np->phandle = be32_to_cpup((__be32 *)*p);
+                np->phandle = be32_to_cpu(*(__be32 *)*p);
             pp->name = pname;
             pp->length = sz;
             pp->value = (void *)*p;
@@ -2053,7 +2053,7 @@ static unsigned long unflatten_dt_node(const void *fdt,
             *p += 4;
         else
             mem = unflatten_dt_node(fdt, mem, p, np, allnextpp, fpsize);
-        tag = be32_to_cpup((__be32 *)(*p));
+        tag = be32_to_cpu(*(__be32 *)(*p));
     }
     if ( tag != FDT_END_NODE )
     {
@@ -2099,7 +2099,7 @@ int unflatten_device_tree(const void *fdt, struct dt_device_node **mynodes)
     /* Second pass, do actual unflattening */
     start = ((unsigned long)fdt) + fdt_off_dt_struct(fdt);
     unflatten_dt_node(fdt, mem, &start, NULL, &allnextp, 0);
-    if ( be32_to_cpup((__be32 *)start) != FDT_END )
+    if ( be32_to_cpu(*(__be32 *)start) != FDT_END )
     {
         printk(XENLOG_ERR "Weird tag at end of tree: %08x\n",
                   *((u32 *)start));
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Volodymyr Babchuk ,
	Bertrand Marquis ,
	Shawn Anastasio ,
	Oleksii Kurochko ,
	"Daniel P . Smith" ,
	Lin Liu 
Subject: [PATCH v6 02/15] drivers/smmu-v3: Fix impending MISRA R20.6 violation
Date: Wed, 16 Apr 2025 12:58:47 +0100
Message-Id: <20250416115900.2491661-3-andrew.cooper3@citrix.com>
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cpu_to_le64() is about to become a macro, at which point the #ifdef in the
middle of it becomes undefined behaviour.

Use a logcal variable to prepare strtab, where the #ifdef is fine to use.

No functional change.

Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Michal Orzel 
CC: Jan Beulich 
CC: Julien Grall 
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Volodymyr Babchuk 
CC: Bertrand Marquis 
CC: Shawn Anastasio 
CC: Oleksii Kurochko 
CC: Daniel P. Smith 
CC: Lin Liu 

v6:
 * New

Eclair log from v5:
  https://saas.eclairit.com:3787/fs/var/local/eclair/xen-project.ecdf/xen-project/people/andyhhp/xen/ECLAIR_normal/xen-bswap/ARM64/9556392204/PROJECT.ecd;/by_service/MC3A2.R20.6.html
---
 xen/drivers/passthrough/arm/smmu-v3.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/xen/drivers/passthrough/arm/smmu-v3.c b/xen/drivers/passthrough/arm/smmu-v3.c
index cee572402203..df162350578c 100644
--- a/xen/drivers/passthrough/arm/smmu-v3.c
+++ b/xen/drivers/passthrough/arm/smmu-v3.c
@@ -722,15 +722,17 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid,
 	}
 
 	if (s2_cfg) {
-		BUG_ON(ste_live);
-		dst[2] = cpu_to_le64(
+		u64 strtab =
 			 FIELD_PREP(STRTAB_STE_2_S2VMID, s2_cfg->vmid) |
 			 FIELD_PREP(STRTAB_STE_2_VTCR, s2_cfg->vtcr) |
 #ifdef __BIG_ENDIAN
 			 STRTAB_STE_2_S2ENDI |
 #endif
 			 STRTAB_STE_2_S2PTW | STRTAB_STE_2_S2AA64 |
-			 STRTAB_STE_2_S2R);
+			 STRTAB_STE_2_S2R;
+
+		BUG_ON(ste_live);
+		dst[2] = cpu_to_le64(strtab);
 
 		dst[3] = cpu_to_le64(s2_cfg->vttbr & STRTAB_STE_3_S2TTB_MASK);
 
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Volodymyr Babchuk ,
	Bertrand Marquis ,
	Shawn Anastasio ,
	Oleksii Kurochko ,
	"Daniel P . Smith" ,
	Lin Liu 
Subject: [PATCH v6 00/15] xen: Centralise byteswap infrastructure
Date: Wed, 16 Apr 2025 12:58:45 +0100
Message-Id: <20250416115900.2491661-1-andrew.cooper3@citrix.com>
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The diffstat speaks for itself.

Compared to v6, one patch (TMEM) committed, one new patch (drivers/smmu-v3) to
fix a MISRA regression, and the __{BIG,LITTLE}_ENDIAN_BITFIELD logic is
retained.  See individual patches for details.

https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1771377732

Andrew Cooper (7):
  drivers/smmu-v3: Fix impending MISRA R20.6 violation
  xsm/flask: Switch {asm -> xen}/byteorder.h
  xen/common: Switch {asm -> xen}/byteorder.h
  arm: Remove asm/byteorder.h
  ppc: Drop asm/byteorder.h
  riscv: Remove asm/byteorder.h
  x86: Drop asm/byteorder.h

Lin Liu (8):
  xen: Implement common byte{order,swap}.h
  xen/lib: Switch to xen/byteorder.h
  xen/device-tree: Remove use of *_to_cpup() helpers
  xen/decompressors: Remove use of *_to_cpup() helpers
  xen/arch: Switch to new byteorder infrastructure
  xen/decompressors: Use new byteorder infrastructure
  xen: Remove old byteorder infrastructure
  crypto/vmac: Switch to xen/byteswap.h

 tools/libs/guest/xg_dom_decompress_lz4.c      |  10 +-
 .../guest/xg_dom_decompress_unsafe_lzo1x.c    |  14 +-
 .../libs/guest/xg_dom_decompress_unsafe_xz.c  |  13 +-
 .../guest/xg_dom_decompress_unsafe_zstd.c     |   3 +-
 xen/arch/arm/alternative.c                    |   6 +-
 xen/arch/arm/arm64/livepatch.c                |   2 +-
 xen/arch/arm/include/asm/arm32/io.h           |   3 +-
 xen/arch/arm/include/asm/arm64/io.h           |   3 +-
 xen/arch/arm/include/asm/byteorder.h          |  16 --
 xen/arch/arm/kernel.c                         |   2 +-
 xen/arch/arm/vgic/vgic-mmio.c                 |   3 +-
 xen/arch/ppc/include/asm/byteorder.h          |  12 --
 xen/arch/ppc/include/asm/page.h               |   4 +-
 xen/arch/ppc/mm-radix.c                       |   2 +-
 xen/arch/riscv/include/asm/byteorder.h        |  16 --
 xen/arch/riscv/include/asm/io.h               |   3 +-
 xen/arch/x86/include/asm/byteorder.h          |  29 ---
 xen/arch/x86/include/asm/msi.h                |   1 -
 xen/common/bitmap.c                           |   5 +-
 xen/common/device-tree/device-tree.c          |  44 ++---
 xen/common/libelf/libelf-private.h            |   9 +-
 xen/common/lz4/defs.h                         |   7 +-
 xen/common/lzo.c                              |   1 -
 xen/common/unlzo.c                            |  13 +-
 xen/common/xz/private.h                       |  13 +-
 xen/crypto/vmac.c                             |  76 +-------
 xen/drivers/char/ehci-dbgp.c                  |   4 +-
 xen/drivers/passthrough/arm/smmu-v3.c         |   8 +-
 xen/include/xen/bitmap.h                      |   2 +-
 xen/include/xen/byteorder.h                   |  44 +++++
 xen/include/xen/byteorder/big_endian.h        | 102 ----------
 xen/include/xen/byteorder/generic.h           |  68 -------
 xen/include/xen/byteorder/little_endian.h     | 102 ----------
 xen/include/xen/byteorder/swab.h              | 179 ------------------
 xen/include/xen/byteswap.h                    |  15 ++
 xen/include/xen/config.h                      |   8 +
 xen/include/xen/device_tree.h                 |   3 +-
 xen/include/xen/libfdt/libfdt_env.h           |   3 +-
 xen/include/xen/unaligned.h                   |   3 +-
 xen/lib/divmod.c                              |   5 +-
 xen/lib/find-next-bit.c                       |  39 +---
 xen/xsm/flask/ss/avtab.c                      |   4 +-
 xen/xsm/flask/ss/conditional.c                |   9 +-
 xen/xsm/flask/ss/ebitmap.c                    |   9 +-
 xen/xsm/flask/ss/policydb.c                   |   7 +-
 45 files changed, 193 insertions(+), 731 deletions(-)
 delete mode 100644 xen/arch/arm/include/asm/byteorder.h
 delete mode 100644 xen/arch/ppc/include/asm/byteorder.h
 delete mode 100644 xen/arch/riscv/include/asm/byteorder.h
 delete mode 100644 xen/arch/x86/include/asm/byteorder.h
 create mode 100644 xen/include/xen/byteorder.h
 delete mode 100644 xen/include/xen/byteorder/big_endian.h
 delete mode 100644 xen/include/xen/byteorder/generic.h
 delete mode 100644 xen/include/xen/byteorder/little_endian.h
 delete mode 100644 xen/include/xen/byteorder/swab.h
 create mode 100644 xen/include/xen/byteswap.h


base-commit: 7f8c2dd829358406dc9e50d5e386e4d2b20b4303
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Lin Liu ,
	Andrew Cooper ,
	Jan Beulich ,
	Anthony PERARD ,
	Michal Orzel ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Volodymyr Babchuk ,
	Bertrand Marquis ,
	Shawn Anastasio ,
	Oleksii Kurochko ,
	"Daniel P . Smith" 
Subject: [PATCH v6 01/15] xen: Implement common byte{order,swap}.h
Date: Wed, 16 Apr 2025 12:58:46 +0100
Message-Id: <20250416115900.2491661-2-andrew.cooper3@citrix.com>
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From: Lin Liu 

The current swab??() infrastructure is unecesserily complicated, and can be
replaced entirely with compiler builtins.

All supported compilers provide __BYTE_ORDER__ and __builtin_bswap??().

Nothing in Xen cares about the values of __{BIG,LITTLE}_ENDIAN; just that one
of them is defined.  Therefore, centralise their definitions in xen/config.h

Signed-off-by: Lin Liu 
Signed-off-by: Andrew Cooper 
Reviewed-by: Jan Beulich 
---
CC: Anthony PERARD 
CC: Michal Orzel 
CC: Jan Beulich 
CC: Julien Grall 
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Volodymyr Babchuk 
CC: Bertrand Marquis 
CC: Shawn Anastasio 
CC: Oleksii Kurochko 
CC: Daniel P. Smith 
CC: Lin Liu 

v6:
 * Fix typos
 * Retain __{BIG,LITTLE}_ENDIAN_BITFIELDS and set them in common logic.
 * Extra brackets for the non-transformed case.

v5:
 * Rebase substantially
 * Drop PASTE().  It doesn't work when BITS_PER_LONG isn't a plain integer
 * Simplify in light of new toolchain baseline
---
 xen/include/xen/byteorder.h               | 44 +++++++++++++++++++++++
 xen/include/xen/byteorder/big_endian.h    |  7 ----
 xen/include/xen/byteorder/little_endian.h |  7 ----
 xen/include/xen/byteswap.h                | 15 ++++++++
 xen/include/xen/config.h                  |  8 +++++
 5 files changed, 67 insertions(+), 14 deletions(-)
 create mode 100644 xen/include/xen/byteorder.h
 create mode 100644 xen/include/xen/byteswap.h

diff --git a/xen/include/xen/byteorder.h b/xen/include/xen/byteorder.h
new file mode 100644
index 000000000000..2b9b97044478
--- /dev/null
+++ b/xen/include/xen/byteorder.h
@@ -0,0 +1,44 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+#ifndef XEN_BYTEORDER_H
+#define XEN_BYTEORDER_H
+
+#include 
+#include 
+
+#if defined(__LITTLE_ENDIAN)
+
+# define cpu_to_le64(x) ((uint64_t)(x))
+# define le64_to_cpu(x) ((uint64_t)(x))
+# define cpu_to_le32(x) ((uint32_t)(x))
+# define le32_to_cpu(x) ((uint32_t)(x))
+# define cpu_to_le16(x) ((uint16_t)(x))
+# define le16_to_cpu(x) ((uint16_t)(x))
+
+# define cpu_to_be64(x) bswap64(x)
+# define be64_to_cpu(x) bswap64(x)
+# define cpu_to_be32(x) bswap32(x)
+# define be32_to_cpu(x) bswap32(x)
+# define cpu_to_be16(x) bswap16(x)
+# define be16_to_cpu(x) bswap16(x)
+
+#elif defined(__BIG_ENDIAN)
+
+# define cpu_to_le64(x) bswap64(x)
+# define le64_to_cpu(x) bswap64(x)
+# define cpu_to_le32(x) bswap32(x)
+# define le32_to_cpu(x) bswap32(x)
+# define cpu_to_le16(x) bswap16(x)
+# define le16_to_cpu(x) bswap16(x)
+
+# define cpu_to_be64(x) ((uint64_t)(x))
+# define be64_to_cpu(x) ((uint64_t)(x))
+# define cpu_to_be32(x) ((uint32_t)(x))
+# define be32_to_cpu(x) ((uint32_t)(x))
+# define cpu_to_be16(x) ((uint16_t)(x))
+# define be16_to_cpu(x) ((uint16_t)(x))
+
+#else
+# error Unknown Endianness
+#endif /* __*_ENDIAN */
+
+#endif /* XEN_BYTEORDER_H */
diff --git a/xen/include/xen/byteorder/big_endian.h b/xen/include/xen/byteorder/big_endian.h
index ce395a17f64b..512291c76f1b 100644
--- a/xen/include/xen/byteorder/big_endian.h
+++ b/xen/include/xen/byteorder/big_endian.h
@@ -1,13 +1,6 @@
 #ifndef __XEN_BYTEORDER_BIG_ENDIAN_H__
 #define __XEN_BYTEORDER_BIG_ENDIAN_H__
 
-#ifndef __BIG_ENDIAN
-#define __BIG_ENDIAN 4321
-#endif
-#ifndef __BIG_ENDIAN_BITFIELD
-#define __BIG_ENDIAN_BITFIELD
-#endif
-
 #include 
 #include 
 
diff --git a/xen/include/xen/byteorder/little_endian.h b/xen/include/xen/byteorder/little_endian.h
index 8b118afba5e3..bd1afc6a67c3 100644
--- a/xen/include/xen/byteorder/little_endian.h
+++ b/xen/include/xen/byteorder/little_endian.h
@@ -1,13 +1,6 @@
 #ifndef __XEN_BYTEORDER_LITTLE_ENDIAN_H__
 #define __XEN_BYTEORDER_LITTLE_ENDIAN_H__
 
-#ifndef __LITTLE_ENDIAN
-#define __LITTLE_ENDIAN 1234
-#endif
-#ifndef __LITTLE_ENDIAN_BITFIELD
-#define __LITTLE_ENDIAN_BITFIELD
-#endif
-
 #include 
 #include 
 
diff --git a/xen/include/xen/byteswap.h b/xen/include/xen/byteswap.h
new file mode 100644
index 000000000000..46d93f88eac9
--- /dev/null
+++ b/xen/include/xen/byteswap.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+#ifndef XEN_BYTESWAP_H
+#define XEN_BYTESWAP_H
+
+#define bswap16(x) __builtin_bswap16(x)
+#define bswap32(x) __builtin_bswap32(x)
+#define bswap64(x) __builtin_bswap64(x)
+
+#if BITS_PER_LONG == 64
+# define bswapl(x) bswap64(x)
+#elif BITS_PER_LONG == 32
+# define bswapl(x) bswap32(x)
+#endif
+
+#endif /* XEN_BYTESWAP_H */
diff --git a/xen/include/xen/config.h b/xen/include/xen/config.h
index 7d43159efb56..1d7195066c08 100644
--- a/xen/include/xen/config.h
+++ b/xen/include/xen/config.h
@@ -108,4 +108,12 @@
 /* It is assumed that sizeof(void *) == __alignof(void *) */
 #define POINTER_ALIGN   __SIZEOF_POINTER__
 
+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
+# define __LITTLE_ENDIAN
+# define __LITTLE_ENDIAN_BITFIELD
+#elif __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+# define __BIG_ENDIAN
+# define __BIG_ENDIAN_BITFIELD
+#endif
+
 #endif /* __XEN_CONFIG_H__ */

base-commit: 7f8c2dd829358406dc9e50d5e386e4d2b20b4303
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Lin Liu ,
	Andrew Cooper ,
	Jan Beulich ,
	Anthony PERARD ,
	Michal Orzel ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Volodymyr Babchuk ,
	Bertrand Marquis ,
	Shawn Anastasio ,
	Oleksii Kurochko ,
	"Daniel P . Smith" 
Subject: [PATCH v6 03/15] xen/lib: Switch to xen/byteorder.h
Date: Wed, 16 Apr 2025 12:58:48 +0100
Message-Id: <20250416115900.2491661-4-andrew.cooper3@citrix.com>
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From: Lin Liu 

In divmod.c, additionally swap xen/lib.h for xen/macros.h as only ABS() is
needed.

In find-next-bit.c, ext2 has nothing to do with this logic.  It was a local
modification when the logic was imported from Linux, because Xen didn't have a
suitable helper.

The new infrastructure does have a suitable primitive, so use it.

No functional change.

Signed-off-by: Lin Liu 
Signed-off-by: Andrew Cooper 
Reviewed-by: Jan Beulich 
---
CC: Anthony PERARD 
CC: Michal Orzel 
CC: Jan Beulich 
CC: Julien Grall 
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Volodymyr Babchuk 
CC: Bertrand Marquis 
CC: Shawn Anastasio 
CC: Oleksii Kurochko 
CC: Daniel P. Smith 
CC: Lin Liu 

The find-next-bit.c changes, being inside __BIG_ENDIAN aren't even compiled in
any build of Xen.  I manually checked that they compiled.

v5:
 * Rebase
 * Include a fixto divmod.c
 * Explain why even Linux has never had anything by the name ext2_swab()
---
 xen/lib/divmod.c        |  4 ++--
 xen/lib/find-next-bit.c | 39 +++++++--------------------------------
 2 files changed, 9 insertions(+), 34 deletions(-)

diff --git a/xen/lib/divmod.c b/xen/lib/divmod.c
index 0377d62130ae..063e867a81ed 100644
--- a/xen/lib/divmod.c
+++ b/xen/lib/divmod.c
@@ -1,6 +1,6 @@
-#include 
+#include 
+#include 
 #include 
-#include 
 
 /*
  * A couple of 64 bit operations ported from FreeBSD.
diff --git a/xen/lib/find-next-bit.c b/xen/lib/find-next-bit.c
index 761b02739841..9b8d7814f20c 100644
--- a/xen/lib/find-next-bit.c
+++ b/xen/lib/find-next-bit.c
@@ -9,8 +9,7 @@
  * 2 of the License, or (at your option) any later version.
  */
 #include 
-
-#include 
+#include 
 
 #define __ffs(x) (ffsl(x) - 1)
 #define ffz(x) __ffs(~(x))
@@ -164,30 +163,6 @@ EXPORT_SYMBOL(find_first_zero_bit);
 
 #ifdef __BIG_ENDIAN
 
-/* include/linux/byteorder does not support "unsigned long" type */
-static inline unsigned long ext2_swabp(const unsigned long * x)
-{
-#if BITS_PER_LONG == 64
-	return (unsigned long) __swab64p((u64 *) x);
-#elif BITS_PER_LONG == 32
-	return (unsigned long) __swab32p((u32 *) x);
-#else
-#error BITS_PER_LONG not defined
-#endif
-}
-
-/* include/linux/byteorder doesn't support "unsigned long" type */
-static inline unsigned long ext2_swab(const unsigned long y)
-{
-#if BITS_PER_LONG == 64
-	return (unsigned long) __swab64((u64) y);
-#elif BITS_PER_LONG == 32
-	return (unsigned long) __swab32((u32) y);
-#else
-#error BITS_PER_LONG not defined
-#endif
-}
-
 #ifndef find_next_zero_bit_le
 unsigned long find_next_zero_bit_le(const void *addr, unsigned
 		long size, unsigned long offset)
@@ -202,7 +177,7 @@ unsigned long find_next_zero_bit_le(const void *addr, unsigned
 	size -= result;
 	offset &= (BITS_PER_LONG - 1UL);
 	if (offset) {
-		tmp = ext2_swabp(p++);
+		tmp = bswapl(*p++);
 		tmp |= (~0UL >> (BITS_PER_LONG - offset));
 		if (size < BITS_PER_LONG)
 			goto found_first;
@@ -220,7 +195,7 @@ unsigned long find_next_zero_bit_le(const void *addr, unsigned
 	}
 	if (!size)
 		return result;
-	tmp = ext2_swabp(p);
+	tmp = bswapl(*p);
 found_first:
 	tmp |= ~0UL << size;
 	if (tmp == ~0UL)	/* Are any bits zero? */
@@ -229,7 +204,7 @@ unsigned long find_next_zero_bit_le(const void *addr, unsigned
 	return result + ffz(tmp);
 
 found_middle_swap:
-	return result + ffz(ext2_swab(tmp));
+	return result + ffz(bswapl(tmp));
 }
 EXPORT_SYMBOL(find_next_zero_bit_le);
 #endif
@@ -248,7 +223,7 @@ unsigned long find_next_bit_le(const void *addr, unsigned
 	size -= result;
 	offset &= (BITS_PER_LONG - 1UL);
 	if (offset) {
-		tmp = ext2_swabp(p++);
+		tmp = bswapl(*p++);
 		tmp &= (~0UL << offset);
 		if (size < BITS_PER_LONG)
 			goto found_first;
@@ -267,7 +242,7 @@ unsigned long find_next_bit_le(const void *addr, unsigned
 	}
 	if (!size)
 		return result;
-	tmp = ext2_swabp(p);
+	tmp = bswapl(*p);
 found_first:
 	tmp &= (~0UL >> (BITS_PER_LONG - size));
 	if (tmp == 0UL)		/* Are any bits set? */
@@ -276,7 +251,7 @@ unsigned long find_next_bit_le(const void *addr, unsigned
 	return result + __ffs(tmp);
 
 found_middle_swap:
-	return result + __ffs(ext2_swab(tmp));
+	return result + __ffs(bswapl(tmp));
 }
 EXPORT_SYMBOL(find_next_bit_le);
 #endif
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Lin Liu ,
	Andrew Cooper ,
	Jan Beulich ,
	Anthony PERARD ,
	Michal Orzel ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Volodymyr Babchuk ,
	Bertrand Marquis ,
	Shawn Anastasio ,
	Oleksii Kurochko ,
	"Daniel P . Smith" 
Subject: [PATCH v6 06/15] xen/arch: Switch to new byteorder infrastructure
Date: Wed, 16 Apr 2025 12:58:51 +0100
Message-Id: <20250416115900.2491661-7-andrew.cooper3@citrix.com>
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From: Lin Liu 

This needs to be done in several steps, because of common vs arch issues.
Start by using the new common infastructure inside the arch infrastructure.

libelf-private.h is awkward, and the only thing in Xen using swab??()
directly.  It needs updating at the same time.

Signed-off-by: Lin Liu 
Signed-off-by: Andrew Cooper 
Reviewed-by: Jan Beulich 
---
CC: Anthony PERARD 
CC: Michal Orzel 
CC: Jan Beulich 
CC: Julien Grall 
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Volodymyr Babchuk 
CC: Bertrand Marquis 
CC: Shawn Anastasio 
CC: Oleksii Kurochko 
CC: Daniel P. Smith 
CC: Lin Liu 

v5:
 * Rebase
 * Rearange from other patches to maintain bisectability
---
 xen/arch/arm/include/asm/byteorder.h   |  4 +---
 xen/arch/ppc/include/asm/byteorder.h   |  8 +-------
 xen/arch/riscv/include/asm/byteorder.h |  4 +---
 xen/arch/x86/include/asm/byteorder.h   | 25 +------------------------
 xen/common/libelf/libelf-private.h     |  6 +++---
 5 files changed, 7 insertions(+), 40 deletions(-)

diff --git a/xen/arch/arm/include/asm/byteorder.h b/xen/arch/arm/include/asm/byteorder.h
index 9c712c47884a..7f1419c45a16 100644
--- a/xen/arch/arm/include/asm/byteorder.h
+++ b/xen/arch/arm/include/asm/byteorder.h
@@ -1,9 +1,7 @@
 #ifndef __ASM_ARM_BYTEORDER_H__
 #define __ASM_ARM_BYTEORDER_H__
 
-#define __BYTEORDER_HAS_U64__
-
-#include 
+#include 
 
 #endif /* __ASM_ARM_BYTEORDER_H__ */
 /*
diff --git a/xen/arch/ppc/include/asm/byteorder.h b/xen/arch/ppc/include/asm/byteorder.h
index 2b5f6b9f6321..8df6adbf0d7d 100644
--- a/xen/arch/ppc/include/asm/byteorder.h
+++ b/xen/arch/ppc/include/asm/byteorder.h
@@ -1,12 +1,6 @@
 #ifndef _ASM_PPC_BYTEORDER_H
 #define _ASM_PPC_BYTEORDER_H
 
-#define __arch__swab16 __builtin_bswap16
-#define __arch__swab32 __builtin_bswap32
-#define __arch__swab64 __builtin_bswap64
-
-#define __BYTEORDER_HAS_U64__
-
-#include 
+#include 
 
 #endif /* _ASM_PPC_BYTEORDER_H */
diff --git a/xen/arch/riscv/include/asm/byteorder.h b/xen/arch/riscv/include/asm/byteorder.h
index 8ca65e1b330e..a32bca02df38 100644
--- a/xen/arch/riscv/include/asm/byteorder.h
+++ b/xen/arch/riscv/include/asm/byteorder.h
@@ -1,9 +1,7 @@
 #ifndef ASM__RISCV__BYTEORDER_H
 #define ASM__RISCV__BYTEORDER_H
 
-#define __BYTEORDER_HAS_U64__
-
-#include 
+#include 
 
 #endif /* ASM__RISCV__BYTEORDER_H */
 /*
diff --git a/xen/arch/x86/include/asm/byteorder.h b/xen/arch/x86/include/asm/byteorder.h
index 44c240376d3a..3524a6cee741 100644
--- a/xen/arch/x86/include/asm/byteorder.h
+++ b/xen/arch/x86/include/asm/byteorder.h
@@ -1,29 +1,6 @@
 #ifndef __ASM_X86_BYTEORDER_H__
 #define __ASM_X86_BYTEORDER_H__
 
-#include 
-#include 
-
-static inline attr_const uint32_t ___arch__swab32(uint32_t x)
-{
-    asm("bswap %0" : "=r" (x) : "0" (x));
-    return x;
-}
-
-static inline attr_const uint64_t ___arch__swab64(uint64_t x)
-{ 
-    asm ( "bswap %0" : "+r" (x) );
-    return x;
-} 
-
-/* Do not define swab16.  Gcc is smart enough to recognize "C" version and
-   convert it into rotation or exhange.  */
-
-#define __arch__swab64(x) ___arch__swab64(x)
-#define __arch__swab32(x) ___arch__swab32(x)
-
-#define __BYTEORDER_HAS_U64__
-
-#include 
+#include 
 
 #endif /* __ASM_X86_BYTEORDER_H__ */
diff --git a/xen/common/libelf/libelf-private.h b/xen/common/libelf/libelf-private.h
index 197d7a7623a3..65417dffc8a0 100644
--- a/xen/common/libelf/libelf-private.h
+++ b/xen/common/libelf/libelf-private.h
@@ -31,9 +31,9 @@
    printk(fmt, ## args )
 
 #define strtoull(str, end, base) simple_strtoull(str, end, base)
-#define bswap_16(x) swab16(x)
-#define bswap_32(x) swab32(x)
-#define bswap_64(x) swab64(x)
+#define bswap_16(x) bswap16(x)
+#define bswap_32(x) bswap32(x)
+#define bswap_64(x) bswap64(x)
 
 #else /* !__XEN__ */
 
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Lin Liu ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Volodymyr Babchuk ,
	Bertrand Marquis ,
	Shawn Anastasio ,
	Oleksii Kurochko ,
	"Daniel P . Smith" 
Subject: [PATCH v6 05/15] xen/decompressors: Remove use of *_to_cpup() helpers
Date: Wed, 16 Apr 2025 12:58:50 +0100
Message-Id: <20250416115900.2491661-6-andrew.cooper3@citrix.com>
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From: Lin Liu 

These wrappers simply hide a deference, which adds to the cognitive complexity
of reading the code.  As such, they're not going to be included in the new
byteswap infrastructure.

No functional change.

Signed-off-by: Lin Liu 
Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Michal Orzel 
CC: Jan Beulich 
CC: Julien Grall 
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Volodymyr Babchuk 
CC: Bertrand Marquis 
CC: Shawn Anastasio 
CC: Oleksii Kurochko 
CC: Daniel P. Smith 
CC: Lin Liu 

v6:
 * Fix lz4 and lzo1x too.

v5:
 * Rebase
 * Rearranged from other patches
---
 tools/libs/guest/xg_dom_decompress_lz4.c          | 10 ++++++++--
 tools/libs/guest/xg_dom_decompress_unsafe_lzo1x.c | 14 ++++----------
 tools/libs/guest/xg_dom_decompress_unsafe_xz.c    | 13 +++++++------
 xen/common/lz4/defs.h                             |  6 +++++-
 xen/common/unlzo.c                                | 12 ++++++++++--
 xen/common/xz/private.h                           | 12 +++++++++---
 6 files changed, 43 insertions(+), 24 deletions(-)

diff --git a/tools/libs/guest/xg_dom_decompress_lz4.c b/tools/libs/guest/xg_dom_decompress_lz4.c
index b26cce3ec532..53ef0bf328ed 100644
--- a/tools/libs/guest/xg_dom_decompress_lz4.c
+++ b/tools/libs/guest/xg_dom_decompress_lz4.c
@@ -3,6 +3,8 @@
 #include 
 #include 
 
+#include INCLUDE_ENDIAN_H
+
 #define XG_NEED_UNALIGNED
 #include "xg_private.h"
 #include "xg_dom_decompress.h"
@@ -17,9 +19,13 @@ typedef uint64_t u64;
 #define likely(a) a
 #define unlikely(a) a
 
-static inline uint_fast16_t le16_to_cpup(const unsigned char *buf)
+static inline uint16_t le16_to_cpu(uint16_t v)
 {
-    return buf[0] | (buf[1] << 8);
+#if BYTE_ORDER == BIG_ENDIAN
+    return __builtin_bswap16(v);
+#else
+    return v;
+#endif
 }
 
 #include "../../xen/include/xen/lz4.h"
diff --git a/tools/libs/guest/xg_dom_decompress_unsafe_lzo1x.c b/tools/libs/guest/xg_dom_decompress_unsafe_lzo1x.c
index e58c1b95ed17..3f6b133ccf9d 100644
--- a/tools/libs/guest/xg_dom_decompress_unsafe_lzo1x.c
+++ b/tools/libs/guest/xg_dom_decompress_unsafe_lzo1x.c
@@ -16,25 +16,19 @@ typedef uint64_t u64;
 #define noinline
 #define unlikely(a) a
 
-static inline u16 be16_to_cpup(const u16 *p)
+static inline u16 be16_to_cpu(const u16 v)
 {
-	u16 v = *p;
 #if BYTE_ORDER == LITTLE_ENDIAN
-	return (((v & 0x00ffU) << 8) |
-                ((v & 0xff00U) >> 8));
+	return __builtin_bswap16(v);
 #else
 	return v;
 #endif
 }
 
-static inline u32 be32_to_cpup(const u32 *p)
+static inline u32 be32_to_cpup(const u32 v)
 {
-	u32 v = *p;
 #if BYTE_ORDER == LITTLE_ENDIAN
-	return (((v & 0x000000ffUL) << 24) |
-                ((v & 0x0000ff00UL) <<  8) |
-                ((v & 0x00ff0000UL) >>  8) |
-                ((v & 0xff000000UL) >> 24));
+	return __builtin_bswap32(v);
 #else
 	return v;
 #endif
diff --git a/tools/libs/guest/xg_dom_decompress_unsafe_xz.c b/tools/libs/guest/xg_dom_decompress_unsafe_xz.c
index 80eed912dd68..7dbd2622c3b8 100644
--- a/tools/libs/guest/xg_dom_decompress_unsafe_xz.c
+++ b/tools/libs/guest/xg_dom_decompress_unsafe_xz.c
@@ -19,18 +19,19 @@ typedef uint32_t __le32;
 static inline u32 cpu_to_le32(const u32 v)
 {
 #if BYTE_ORDER == BIG_ENDIAN
-	return (((v & 0x000000ffUL) << 24) |
-	        ((v & 0x0000ff00UL) <<  8) |
-	        ((v & 0x00ff0000UL) >>  8) |
-	        ((v & 0xff000000UL) >> 24));
+        return __builtin_bswap32(v);
 #else
 	return v;
 #endif
 }
 
-static inline u32 le32_to_cpup(const u32 *p)
+static inline u32 le32_to_cpu(const u32 p)
 {
-	return cpu_to_le32(*p);
+#if BYTE_ORDER == BIG_ENDIAN
+        return __builtin_bswap32(v);
+#else
+	return v;
+#endif
 }
 
 #define __force
diff --git a/xen/common/lz4/defs.h b/xen/common/lz4/defs.h
index ecfbf07f8323..e477806634c1 100644
--- a/xen/common/lz4/defs.h
+++ b/xen/common/lz4/defs.h
@@ -18,7 +18,11 @@
 
 static inline u16 get_unaligned_le16(const void *p)
 {
-	return le16_to_cpup(p);
+	u16 v;
+
+	memcpy(&v, p, sizeof(v));
+
+	return le16_to_cpu(v);
 }
 
 #endif
diff --git a/xen/common/unlzo.c b/xen/common/unlzo.c
index acb8dff600fc..17efb1cc8f1d 100644
--- a/xen/common/unlzo.c
+++ b/xen/common/unlzo.c
@@ -39,12 +39,20 @@
 
 static inline u16 get_unaligned_be16(const void *p)
 {
-	return be16_to_cpup(p);
+	u16 v;
+
+	memcpy(&v, p, sizeof(v));
+
+	return be16_to_cpu(v);
 }
 
 static inline u32 get_unaligned_be32(const void *p)
 {
-	return be32_to_cpup(p);
+	u32 v;
+
+	memcpy(&v, p, sizeof(v));
+
+	return be32_to_cpu(v);
 }
 
 #endif
diff --git a/xen/common/xz/private.h b/xen/common/xz/private.h
index 2299705378ac..a63379994fd6 100644
--- a/xen/common/xz/private.h
+++ b/xen/common/xz/private.h
@@ -18,17 +18,23 @@
 
 static inline u32 get_unaligned_le32(const void *p)
 {
-	return le32_to_cpup(p);
+	u32 v;
+
+	memcpy(&v, p, sizeof(v));
+
+	return le32_to_cpu(v);
 }
 
 static inline void put_unaligned_le32(u32 val, void *p)
 {
-	*(__force __le32*)p = cpu_to_le32(val);
+	u32 v = cpu_to_le32(val);
+
+	memcpy(p, &v, sizeof(v));
 }
 
 #endif
 
-#define get_le32(p) le32_to_cpup((const uint32_t *)(p))
+#define get_le32(p) le32_to_cpu(*(const uint32_t *)(p))
 
 #define false 0
 #define true 1
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Lin Liu ,
	Andrew Cooper ,
	Jan Beulich ,
	Anthony PERARD ,
	Michal Orzel ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Volodymyr Babchuk ,
	Bertrand Marquis ,
	Shawn Anastasio ,
	Oleksii Kurochko ,
	"Daniel P . Smith" 
Subject: [PATCH v6 07/15] xen/decompressors: Use new byteorder infrastructure
Date: Wed, 16 Apr 2025 12:58:52 +0100
Message-Id: <20250416115900.2491661-8-andrew.cooper3@citrix.com>
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From: Lin Liu 

unaligned.h already inlcudes byteorder.h, so most can simply be dropped.

No functional change.

Signed-off-by: Lin Liu 
Signed-off-by: Andrew Cooper 
Acked-by: Jan Beulich 
---
CC: Anthony PERARD 
CC: Michal Orzel 
CC: Jan Beulich 
CC: Julien Grall 
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Volodymyr Babchuk 
CC: Bertrand Marquis 
CC: Shawn Anastasio 
CC: Oleksii Kurochko 
CC: Daniel P. Smith 
CC: Lin Liu 

v5:
 * New
---
 tools/libs/guest/xg_dom_decompress_unsafe_zstd.c | 3 +--
 xen/common/lz4/defs.h                            | 1 -
 xen/common/lzo.c                                 | 1 -
 xen/common/unlzo.c                               | 1 -
 xen/common/xz/private.h                          | 1 -
 5 files changed, 1 insertion(+), 6 deletions(-)

diff --git a/tools/libs/guest/xg_dom_decompress_unsafe_zstd.c b/tools/libs/guest/xg_dom_decompress_unsafe_zstd.c
index ff45732a3616..319816a390eb 100644
--- a/tools/libs/guest/xg_dom_decompress_unsafe_zstd.c
+++ b/tools/libs/guest/xg_dom_decompress_unsafe_zstd.c
@@ -30,9 +30,8 @@ typedef uint64_t __be64;
 
 #undef ERROR
 
-#define __BYTEORDER_HAS_U64__
 #define __TYPES_H__ /* xen/types.h guard */
-#include "../../xen/include/xen/byteorder/little_endian.h"
+#include "../../xen/include/xen/byteorder.h"
 #include "../../xen/include/xen/unaligned.h"
 #include "../../xen/include/xen/xxhash.h"
 #include "../../xen/lib/xxhash64.c"
diff --git a/xen/common/lz4/defs.h b/xen/common/lz4/defs.h
index e477806634c1..b697a06c00d7 100644
--- a/xen/common/lz4/defs.h
+++ b/xen/common/lz4/defs.h
@@ -12,7 +12,6 @@
 #define COMMON_LZ4_DEFS_H
 
 #ifdef __XEN__
-#include 
 #include 
 #else
 
diff --git a/xen/common/lzo.c b/xen/common/lzo.c
index 07b4017812dc..0393ec5c4472 100644
--- a/xen/common/lzo.c
+++ b/xen/common/lzo.c
@@ -68,7 +68,6 @@
 
 #ifdef __XEN__
 #include 
-#include 
 #include 
 #else
 #define get_unaligned_le16(_p) (*(u16 *)(_p))
diff --git a/xen/common/unlzo.c b/xen/common/unlzo.c
index 17efb1cc8f1d..9a9d39c4239b 100644
--- a/xen/common/unlzo.c
+++ b/xen/common/unlzo.c
@@ -33,7 +33,6 @@
 #include 
 
 #ifdef __XEN__
-#include 
 #include 
 #else
 
diff --git a/xen/common/xz/private.h b/xen/common/xz/private.h
index a63379994fd6..3dce124fa743 100644
--- a/xen/common/xz/private.h
+++ b/xen/common/xz/private.h
@@ -12,7 +12,6 @@
 
 #ifdef __XEN__
 #include 
-#include 
 #include 
 #else
 
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Lin Liu ,
	Jan Beulich ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Volodymyr Babchuk ,
	Bertrand Marquis ,
	Shawn Anastasio ,
	Oleksii Kurochko ,
	"Daniel P . Smith" 
Subject: [PATCH v6 09/15] crypto/vmac: Switch to xen/byteswap.h
Date: Wed, 16 Apr 2025 12:58:54 +0100
Message-Id: <20250416115900.2491661-10-andrew.cooper3@citrix.com>
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From: Lin Liu 

This file has its own implementation of swap bytes. Clean up
the code with xen/byteswap.h.

No functional change.

Signed-off-by: Lin Liu 
Acked-by: Jan Beulich 
Reviewed-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Michal Orzel 
CC: Jan Beulich 
CC: Julien Grall 
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Volodymyr Babchuk 
CC: Bertrand Marquis 
CC: Shawn Anastasio 
CC: Oleksii Kurochko 
CC: Daniel P. Smith 
CC: Lin Liu 
---
 xen/crypto/vmac.c | 76 ++---------------------------------------------
 1 file changed, 3 insertions(+), 73 deletions(-)

diff --git a/xen/crypto/vmac.c b/xen/crypto/vmac.c
index 294dd16a52cb..acb4e015f511 100644
--- a/xen/crypto/vmac.c
+++ b/xen/crypto/vmac.c
@@ -8,6 +8,7 @@
 
 /* start for Xen */
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -50,7 +51,6 @@ const uint64_t mpoly = UINT64_C(0x1fffffff1fffffff);  /* Poly key mask     */
  * MUL64: 64x64->128-bit multiplication
  * PMUL64: assumes top bits cleared on inputs
  * ADD128: 128x128->128-bit addition
- * GET_REVERSED_64: load and byte-reverse 64-bit word  
  * ----------------------------------------------------------------------- */
 
 /* ----------------------------------------------------------------------- */
@@ -68,22 +68,6 @@ const uint64_t mpoly = UINT64_C(0x1fffffff1fffffff);  /* Poly key mask     */
 
 #define PMUL64 MUL64
 
-#define GET_REVERSED_64(p)                                                \
-    ({uint64_t x;                                                         \
-     asm ("bswapq %0" : "=r" (x) : "0"(*(uint64_t *)(p))); x;})
-
-/* ----------------------------------------------------------------------- */
-#elif (__GNUC__ && __i386__)
-/* ----------------------------------------------------------------------- */
-
-#define GET_REVERSED_64(p)                                                \
-    ({ uint64_t x;                                                        \
-    uint32_t *tp = (uint32_t *)(p);                                       \
-    asm  ("bswap %%edx\n\t"                                               \
-          "bswap %%eax"                                                   \
-    : "=A"(x)                                                             \
-    : "a"(tp[1]), "d"(tp[0]));                                            \
-    x; })
 
 /* ----------------------------------------------------------------------- */
 #elif (__GNUC__ && __ppc64__)
@@ -103,37 +87,6 @@ const uint64_t mpoly = UINT64_C(0x1fffffff1fffffff);  /* Poly key mask     */
 
 #define PMUL64 MUL64
 
-#define GET_REVERSED_64(p)                                                \
-    ({ uint32_t hi, lo, *_p = (uint32_t *)(p);                            \
-       asm volatile ("lwbrx %0, %1, %2" : "=r"(lo) : "b%"(0), "r"(_p) );  \
-       asm volatile ("lwbrx %0, %1, %2" : "=r"(hi) : "b%"(4), "r"(_p) );  \
-       ((uint64_t)hi << 32) | (uint64_t)lo; } )
-
-/* ----------------------------------------------------------------------- */
-#elif (__GNUC__ && (__ppc__ || __PPC__))
-/* ----------------------------------------------------------------------- */
-
-#define GET_REVERSED_64(p)                                                \
-    ({ uint32_t hi, lo, *_p = (uint32_t *)(p);                            \
-       asm volatile ("lwbrx %0, %1, %2" : "=r"(lo) : "b%"(0), "r"(_p) );  \
-       asm volatile ("lwbrx %0, %1, %2" : "=r"(hi) : "b%"(4), "r"(_p) );  \
-       ((uint64_t)hi << 32) | (uint64_t)lo; } )
-
-/* ----------------------------------------------------------------------- */
-#elif (__GNUC__ && (__ARMEL__ || __ARM__))
-/* ----------------------------------------------------------------------- */
-
-#define bswap32(v)                                                        \
-({ uint32_t tmp,out;                                                      \
-    asm volatile(                                                         \
-        "eor    %1, %2, %2, ror #16\n"                                    \
-        "bic    %1, %1, #0x00ff0000\n"                                    \
-        "mov    %0, %2, ror #8\n"                                         \
-        "eor    %0, %0, %1, lsr #8"                                       \
-    : "=r" (out), "=&r" (tmp)                                             \
-    : "r" (v));                                                           \
-    out;})
-
 /* ----------------------------------------------------------------------- */
 #elif _MSC_VER
 /* ----------------------------------------------------------------------- */
@@ -154,11 +107,6 @@ const uint64_t mpoly = UINT64_C(0x1fffffff1fffffff);  /* Poly key mask     */
         (rh) += (ih) + ((rl) < (_il));                               \
     }
 
-#if _MSC_VER >= 1300
-#define GET_REVERSED_64(p) _byteswap_uint64(*(uint64_t *)(p))
-#pragma intrinsic(_byteswap_uint64)
-#endif
-
 #if _MSC_VER >= 1400 && \
     (!defined(__INTEL_COMPILER) || __INTEL_COMPILER >= 1000)
 #define MUL32(i1,i2)    (__emulu((uint32_t)(i1),(uint32_t)(i2)))
@@ -219,24 +167,6 @@ const uint64_t mpoly = UINT64_C(0x1fffffff1fffffff);  /* Poly key mask     */
     }
 #endif
 
-#ifndef GET_REVERSED_64
-#ifndef bswap64
-#ifndef bswap32
-#define bswap32(x)                                                        \
-  ({ uint32_t bsx = (x);                                                  \
-      ((((bsx) & 0xff000000u) >> 24) | (((bsx) & 0x00ff0000u) >>  8) |    \
-       (((bsx) & 0x0000ff00u) <<  8) | (((bsx) & 0x000000ffu) << 24)); })
-#endif
-#define bswap64(x)                                                        \
-     ({ union { uint64_t ll; uint32_t l[2]; } w, r;                       \
-         w.ll = (x);                                                      \
-         r.l[0] = bswap32 (w.l[1]);                                       \
-         r.l[1] = bswap32 (w.l[0]);                                       \
-         r.ll; })
-#endif
-#define GET_REVERSED_64(p) bswap64(*(uint64_t *)(p)) 
-#endif
-
 /* ----------------------------------------------------------------------- */
 
 #if (VMAC_PREFER_BIG_ENDIAN)
@@ -247,9 +177,9 @@ const uint64_t mpoly = UINT64_C(0x1fffffff1fffffff);  /* Poly key mask     */
 
 #if (VMAC_ARCH_BIG_ENDIAN)
 #  define get64BE(ptr) (*(uint64_t *)(ptr))
-#  define get64LE(ptr) GET_REVERSED_64(ptr)
+#  define get64LE(ptr) bswap64(*(uint64_t *)(ptr))
 #else /* assume little-endian */
-#  define get64BE(ptr) GET_REVERSED_64(ptr)
+#  define get64BE(ptr) bswap64(*(uint64_t *)(ptr))
 #  define get64LE(ptr) (*(uint64_t *)(ptr))
 #endif
 
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
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	Volodymyr Babchuk ,
	Bertrand Marquis ,
	Shawn Anastasio ,
	Oleksii Kurochko ,
	"Daniel P . Smith" ,
	Lin Liu 
Subject: [PATCH v6 10/15] xsm/flask: Switch {asm -> xen}/byteorder.h
Date: Wed, 16 Apr 2025 12:58:55 +0100
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Sort the includes while at it.

No functional change.

Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Michal Orzel 
CC: Jan Beulich 
CC: Julien Grall 
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Volodymyr Babchuk 
CC: Bertrand Marquis 
CC: Shawn Anastasio 
CC: Oleksii Kurochko 
CC: Daniel P. Smith 
CC: Lin Liu 

v5:
 * New
---
 xen/xsm/flask/ss/avtab.c       | 4 ++--
 xen/xsm/flask/ss/conditional.c | 9 ++++-----
 xen/xsm/flask/ss/ebitmap.c     | 9 ++++-----
 xen/xsm/flask/ss/policydb.c    | 7 +++----
 4 files changed, 13 insertions(+), 16 deletions(-)

diff --git a/xen/xsm/flask/ss/avtab.c b/xen/xsm/flask/ss/avtab.c
index 9761d028d82d..2d07917e79e5 100644
--- a/xen/xsm/flask/ss/avtab.c
+++ b/xen/xsm/flask/ss/avtab.c
@@ -19,11 +19,11 @@
 
 /* Ported to Xen 3.0, George Coker,  */
 
+#include 
+#include 
 #include 
-#include 
 #include 
 #include 
-#include 
 
 #include "avtab.h"
 #include "policydb.h"
diff --git a/xen/xsm/flask/ss/conditional.c b/xen/xsm/flask/ss/conditional.c
index d314f772b405..a0d255596204 100644
--- a/xen/xsm/flask/ss/conditional.c
+++ b/xen/xsm/flask/ss/conditional.c
@@ -9,15 +9,14 @@
 
 /* Ported to Xen 3.0, George Coker,  */
 
-#include 
-#include 
+#include 
 #include 
-#include 
+#include 
 #include 
+#include 
+#include 
 #include 
 
-#include 
-
 #include "security.h"
 #include "conditional.h"
 
diff --git a/xen/xsm/flask/ss/ebitmap.c b/xen/xsm/flask/ss/ebitmap.c
index 1db69d9ad1bd..1ced81ea0287 100644
--- a/xen/xsm/flask/ss/ebitmap.c
+++ b/xen/xsm/flask/ss/ebitmap.c
@@ -10,13 +10,12 @@
 
 /* Ported to Xen 3.0, George Coker,  */
 
-#include 
-#include 
+#include 
+#include 
 #include 
+#include 
 #include 
-#include 
-
-#include 
+#include 
 
 #include "ebitmap.h"
 #include "policydb.h"
diff --git a/xen/xsm/flask/ss/policydb.c b/xen/xsm/flask/ss/policydb.c
index 5af45fdc2783..165304c1331c 100644
--- a/xen/xsm/flask/ss/policydb.c
+++ b/xen/xsm/flask/ss/policydb.c
@@ -22,13 +22,12 @@
 
 /* Ported to Xen 3.0, George Coker,  */
 
+#include 
+#include 
 #include 
+#include 
 #include 
 #include 
-#include 
-#include 
-
-#include 
 
 #include 
 #include "security.h"
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Lin Liu ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Volodymyr Babchuk ,
	Bertrand Marquis ,
	Shawn Anastasio ,
	Oleksii Kurochko ,
	"Daniel P . Smith" 
Subject: [PATCH v6 08/15] xen: Remove old byteorder infrastructure
Date: Wed, 16 Apr 2025 12:58:53 +0100
Message-Id: <20250416115900.2491661-9-andrew.cooper3@citrix.com>
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From: Lin Liu 

It is no longer used.

Signed-off-by: Lin Liu 
Reviewed-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Michal Orzel 
CC: Jan Beulich 
CC: Julien Grall 
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Volodymyr Babchuk 
CC: Bertrand Marquis 
CC: Shawn Anastasio 
CC: Oleksii Kurochko 
CC: Daniel P. Smith 
CC: Lin Liu 
---
 xen/include/xen/byteorder/big_endian.h    |  95 ------------
 xen/include/xen/byteorder/generic.h       |  68 --------
 xen/include/xen/byteorder/little_endian.h |  95 ------------
 xen/include/xen/byteorder/swab.h          | 179 ----------------------
 4 files changed, 437 deletions(-)
 delete mode 100644 xen/include/xen/byteorder/big_endian.h
 delete mode 100644 xen/include/xen/byteorder/generic.h
 delete mode 100644 xen/include/xen/byteorder/little_endian.h
 delete mode 100644 xen/include/xen/byteorder/swab.h

diff --git a/xen/include/xen/byteorder/big_endian.h b/xen/include/xen/byteorder/big_endian.h
deleted file mode 100644
index 512291c76f1b..000000000000
--- a/xen/include/xen/byteorder/big_endian.h
+++ /dev/null
@@ -1,95 +0,0 @@
-#ifndef __XEN_BYTEORDER_BIG_ENDIAN_H__
-#define __XEN_BYTEORDER_BIG_ENDIAN_H__
-
-#include 
-#include 
-
-#define __constant_cpu_to_le64(x) ((__force __le64)___constant_swab64((x)))
-#define __constant_le64_to_cpu(x) ___constant_swab64((__force uint64_t)(__le64)(x))
-#define __constant_cpu_to_le32(x) ((__force __le32)___constant_swab32((x)))
-#define __constant_le32_to_cpu(x) ___constant_swab32((__force uint32_t)(__le32)(x))
-#define __constant_cpu_to_le16(x) ((__force __le16)___constant_swab16((x)))
-#define __constant_le16_to_cpu(x) ___constant_swab16((__force uint16_t)(__le16)(x))
-#define __constant_cpu_to_be64(x) ((__force __be64)(uint64_t)(x))
-#define __constant_be64_to_cpu(x) ((__force uint64_t)(__be64)(x))
-#define __constant_cpu_to_be32(x) ((__force __be32)(uint32_t)(x))
-#define __constant_be32_to_cpu(x) ((__force uint32_t)(__be32)(x))
-#define __constant_cpu_to_be16(x) ((__force __be16)(uint16_t)(x))
-#define __constant_be16_to_cpu(x) ((__force uint16_t)(__be16)(x))
-#define __cpu_to_le64(x) ((__force __le64)__swab64((x)))
-#define __le64_to_cpu(x) __swab64((__force uint64_t)(__le64)(x))
-#define __cpu_to_le32(x) ((__force __le32)__swab32((x)))
-#define __le32_to_cpu(x) __swab32((__force uint32_t)(__le32)(x))
-#define __cpu_to_le16(x) ((__force __le16)__swab16((x)))
-#define __le16_to_cpu(x) __swab16((__force uint16_t)(__le16)(x))
-#define __cpu_to_be64(x) ((__force __be64)(uint64_t)(x))
-#define __be64_to_cpu(x) ((__force uint64_t)(__be64)(x))
-#define __cpu_to_be32(x) ((__force __be32)(uint32_t)(x))
-#define __be32_to_cpu(x) ((__force uint32_t)(__be32)(x))
-#define __cpu_to_be16(x) ((__force __be16)(uint16_t)(x))
-#define __be16_to_cpu(x) ((__force uint16_t)(__be16)(x))
-
-static inline __le64 __cpu_to_le64p(const uint64_t *p)
-{
-    return (__force __le64)__swab64p(p);
-}
-static inline uint64_t __le64_to_cpup(const __le64 *p)
-{
-    return __swab64p((const uint64_t *)p);
-}
-static inline __le32 __cpu_to_le32p(const uint32_t *p)
-{
-    return (__force __le32)__swab32p(p);
-}
-static inline uint32_t __le32_to_cpup(const __le32 *p)
-{
-    return __swab32p((const uint32_t *)p);
-}
-static inline __le16 __cpu_to_le16p(const uint16_t *p)
-{
-    return (__force __le16)__swab16p(p);
-}
-static inline uint16_t __le16_to_cpup(const __le16 *p)
-{
-    return __swab16p((const uint16_t *)p);
-}
-static inline __be64 __cpu_to_be64p(const uint64_t *p)
-{
-    return (__force __be64)*p;
-}
-static inline uint64_t __be64_to_cpup(const __be64 *p)
-{
-    return (__force uint64_t)*p;
-}
-static inline __be32 __cpu_to_be32p(const uint32_t *p)
-{
-    return (__force __be32)*p;
-}
-static inline uint32_t __be32_to_cpup(const __be32 *p)
-{
-    return (__force uint32_t)*p;
-}
-static inline __be16 __cpu_to_be16p(const uint16_t *p)
-{
-    return (__force __be16)*p;
-}
-static inline uint16_t __be16_to_cpup(const __be16 *p)
-{
-    return (__force uint16_t)*p;
-}
-#define __cpu_to_le64s(x) __swab64s((x))
-#define __le64_to_cpus(x) __swab64s((x))
-#define __cpu_to_le32s(x) __swab32s((x))
-#define __le32_to_cpus(x) __swab32s((x))
-#define __cpu_to_le16s(x) __swab16s((x))
-#define __le16_to_cpus(x) __swab16s((x))
-#define __cpu_to_be64s(x) do {} while (0)
-#define __be64_to_cpus(x) do {} while (0)
-#define __cpu_to_be32s(x) do {} while (0)
-#define __be32_to_cpus(x) do {} while (0)
-#define __cpu_to_be16s(x) do {} while (0)
-#define __be16_to_cpus(x) do {} while (0)
-
-#include 
-
-#endif /* __XEN_BYTEORDER_BIG_ENDIAN_H__ */
diff --git a/xen/include/xen/byteorder/generic.h b/xen/include/xen/byteorder/generic.h
deleted file mode 100644
index 8a0006b75594..000000000000
--- a/xen/include/xen/byteorder/generic.h
+++ /dev/null
@@ -1,68 +0,0 @@
-#ifndef __XEN_BYTEORDER_GENERIC_H__
-#define __XEN_BYTEORDER_GENERIC_H__
-
-/*
- * Generic Byte-reordering support
- *
- * The "... p" macros, like le64_to_cpup, can be used with pointers
- * to unaligned data, but there will be a performance penalty on 
- * some architectures.  Use get_unaligned for unaligned data.
- *
- * The following macros are to be defined by :
- *
- * Conversion of XX-bit integers (16- 32- or 64-)
- * between native CPU format and little/big endian format
- * 64-bit stuff only defined for proper architectures
- *     cpu_to_[bl]eXX(__uXX x)
- *     [bl]eXX_to_cpu(__uXX x)
- *
- * The same, but takes a pointer to the value to convert
- *     cpu_to_[bl]eXXp(__uXX x)
- *     [bl]eXX_to_cpup(__uXX x)
- *
- * The same, but change in situ
- *     cpu_to_[bl]eXXs(__uXX x)
- *     [bl]eXX_to_cpus(__uXX x)
- *
- * See asm-foo/byteorder.h for examples of how to provide
- * architecture-optimized versions
- */
-
-#define cpu_to_le64 __cpu_to_le64
-#define le64_to_cpu __le64_to_cpu
-#define cpu_to_le32 __cpu_to_le32
-#define le32_to_cpu __le32_to_cpu
-#define cpu_to_le16 __cpu_to_le16
-#define le16_to_cpu __le16_to_cpu
-#define cpu_to_be64 __cpu_to_be64
-#define be64_to_cpu __be64_to_cpu
-#define cpu_to_be32 __cpu_to_be32
-#define be32_to_cpu __be32_to_cpu
-#define cpu_to_be16 __cpu_to_be16
-#define be16_to_cpu __be16_to_cpu
-#define cpu_to_le64p __cpu_to_le64p
-#define le64_to_cpup __le64_to_cpup
-#define cpu_to_le32p __cpu_to_le32p
-#define le32_to_cpup __le32_to_cpup
-#define cpu_to_le16p __cpu_to_le16p
-#define le16_to_cpup __le16_to_cpup
-#define cpu_to_be64p __cpu_to_be64p
-#define be64_to_cpup __be64_to_cpup
-#define cpu_to_be32p __cpu_to_be32p
-#define be32_to_cpup __be32_to_cpup
-#define cpu_to_be16p __cpu_to_be16p
-#define be16_to_cpup __be16_to_cpup
-#define cpu_to_le64s __cpu_to_le64s
-#define le64_to_cpus __le64_to_cpus
-#define cpu_to_le32s __cpu_to_le32s
-#define le32_to_cpus __le32_to_cpus
-#define cpu_to_le16s __cpu_to_le16s
-#define le16_to_cpus __le16_to_cpus
-#define cpu_to_be64s __cpu_to_be64s
-#define be64_to_cpus __be64_to_cpus
-#define cpu_to_be32s __cpu_to_be32s
-#define be32_to_cpus __be32_to_cpus
-#define cpu_to_be16s __cpu_to_be16s
-#define be16_to_cpus __be16_to_cpus
-
-#endif /* __XEN_BYTEORDER_GENERIC_H__ */
diff --git a/xen/include/xen/byteorder/little_endian.h b/xen/include/xen/byteorder/little_endian.h
deleted file mode 100644
index bd1afc6a67c3..000000000000
--- a/xen/include/xen/byteorder/little_endian.h
+++ /dev/null
@@ -1,95 +0,0 @@
-#ifndef __XEN_BYTEORDER_LITTLE_ENDIAN_H__
-#define __XEN_BYTEORDER_LITTLE_ENDIAN_H__
-
-#include 
-#include 
-
-#define __constant_cpu_to_le64(x) ((__force __le64)(uint64_t)(x))
-#define __constant_le64_to_cpu(x) ((__force uint64_t)(__le64)(x))
-#define __constant_cpu_to_le32(x) ((__force __le32)(uint32_t)(x))
-#define __constant_le32_to_cpu(x) ((__force uint32_t)(__le32)(x))
-#define __constant_cpu_to_le16(x) ((__force __le16)(uint16_t)(x))
-#define __constant_le16_to_cpu(x) ((__force uint16_t)(__le16)(x))
-#define __constant_cpu_to_be64(x) ((__force __be64)___constant_swab64((x)))
-#define __constant_be64_to_cpu(x) ___constant_swab64((__force uint64_t)(__be64)(x))
-#define __constant_cpu_to_be32(x) ((__force __be32)___constant_swab32((x)))
-#define __constant_be32_to_cpu(x) ___constant_swab32((__force uint32_t)(__be32)(x))
-#define __constant_cpu_to_be16(x) ((__force __be16)___constant_swab16((x)))
-#define __constant_be16_to_cpu(x) ___constant_swab16((__force uint16_t)(__be16)(x))
-#define __cpu_to_le64(x) ((__force __le64)(uint64_t)(x))
-#define __le64_to_cpu(x) ((__force uint64_t)(__le64)(x))
-#define __cpu_to_le32(x) ((__force __le32)(uint32_t)(x))
-#define __le32_to_cpu(x) ((__force uint32_t)(__le32)(x))
-#define __cpu_to_le16(x) ((__force __le16)(uint16_t)(x))
-#define __le16_to_cpu(x) ((__force uint16_t)(__le16)(x))
-#define __cpu_to_be64(x) ((__force __be64)__swab64((x)))
-#define __be64_to_cpu(x) __swab64((__force uint64_t)(__be64)(x))
-#define __cpu_to_be32(x) ((__force __be32)__swab32((x)))
-#define __be32_to_cpu(x) __swab32((__force uint32_t)(__be32)(x))
-#define __cpu_to_be16(x) ((__force __be16)__swab16((x)))
-#define __be16_to_cpu(x) __swab16((__force uint16_t)(__be16)(x))
-
-static inline __le64 __cpu_to_le64p(const uint64_t *p)
-{
-    return (__force __le64)*p;
-}
-static inline uint64_t __le64_to_cpup(const __le64 *p)
-{
-    return (__force uint64_t)*p;
-}
-static inline __le32 __cpu_to_le32p(const uint32_t *p)
-{
-    return (__force __le32)*p;
-}
-static inline uint32_t __le32_to_cpup(const __le32 *p)
-{
-    return (__force uint32_t)*p;
-}
-static inline __le16 __cpu_to_le16p(const uint16_t *p)
-{
-    return (__force __le16)*p;
-}
-static inline uint16_t __le16_to_cpup(const __le16 *p)
-{
-    return (__force uint16_t)*p;
-}
-static inline __be64 __cpu_to_be64p(const uint64_t *p)
-{
-    return (__force __be64)__swab64p(p);
-}
-static inline uint64_t __be64_to_cpup(const __be64 *p)
-{
-    return __swab64p((const uint64_t *)p);
-}
-static inline __be32 __cpu_to_be32p(const uint32_t *p)
-{
-    return (__force __be32)__swab32p(p);
-}
-static inline uint32_t __be32_to_cpup(const __be32 *p)
-{
-    return __swab32p((const uint32_t *)p);
-}
-static inline __be16 __cpu_to_be16p(const uint16_t *p)
-{
-    return (__force __be16)__swab16p(p);
-}
-static inline uint16_t __be16_to_cpup(const __be16 *p)
-{
-    return __swab16p((const uint16_t *)p);
-}
-#define __cpu_to_le64s(x) do {} while (0)
-#define __le64_to_cpus(x) do {} while (0)
-#define __cpu_to_le32s(x) do {} while (0)
-#define __le32_to_cpus(x) do {} while (0)
-#define __cpu_to_le16s(x) do {} while (0)
-#define __le16_to_cpus(x) do {} while (0)
-#define __cpu_to_be64s(x) __swab64s((x))
-#define __be64_to_cpus(x) __swab64s((x))
-#define __cpu_to_be32s(x) __swab32s((x))
-#define __be32_to_cpus(x) __swab32s((x))
-#define __cpu_to_be16s(x) __swab16s((x))
-#define __be16_to_cpus(x) __swab16s((x))
-
-#include 
-
-#endif /* __XEN_BYTEORDER_LITTLE_ENDIAN_H__ */
diff --git a/xen/include/xen/byteorder/swab.h b/xen/include/xen/byteorder/swab.h
deleted file mode 100644
index ffcf1cf800b2..000000000000
--- a/xen/include/xen/byteorder/swab.h
+++ /dev/null
@@ -1,179 +0,0 @@
-#ifndef __XEN_BYTEORDER_SWAB_H__
-#define __XEN_BYTEORDER_SWAB_H__
-
-/*
- * Byte-swapping, independently from CPU endianness
- *     swabXX[ps]?(foo)
- *
- * Francois-Rene Rideau  19971205
- *    separated swab functions from cpu_to_XX,
- *    to clean up support for bizarre-endian architectures.
- */
-
-#define ___swab16(x)                                    \
-({                                                      \
-    uint16_t x_ = (x);                                  \
-    (uint16_t)(                                         \
-        (((uint16_t)(x_) & 0x00ffU) << 8) |             \
-        (((uint16_t)(x_) & 0xff00U) >> 8));             \
-})
-
-#define ___swab32(x)                                            \
-({                                                              \
-    uint32_t x_ = (x);                                          \
-    (uint32_t)(                                                 \
-        (((uint32_t)(x_) & 0x000000ffU) << 24) |                \
-        (((uint32_t)(x_) & 0x0000ff00U) <<  8) |                \
-        (((uint32_t)(x_) & 0x00ff0000U) >>  8) |                \
-        (((uint32_t)(x_) & 0xff000000U) >> 24));                \
-})
-
-#define ___swab64(x)                                                       \
-({                                                                         \
-    uint64_t x_ = (x);                                                     \
-    (uint64_t)(                                                            \
-        (((uint64_t)(x_) & 0x00000000000000ffULL) << 56) |                 \
-        (((uint64_t)(x_) & 0x000000000000ff00ULL) << 40) |                 \
-        (((uint64_t)(x_) & 0x0000000000ff0000ULL) << 24) |                 \
-        (((uint64_t)(x_) & 0x00000000ff000000ULL) <<  8) |                 \
-        (((uint64_t)(x_) & 0x000000ff00000000ULL) >>  8) |                 \
-        (((uint64_t)(x_) & 0x0000ff0000000000ULL) >> 24) |                 \
-        (((uint64_t)(x_) & 0x00ff000000000000ULL) >> 40) |                 \
-        (((uint64_t)(x_) & 0xff00000000000000ULL) >> 56));                 \
-})
-
-#define ___constant_swab16(x)                   \
-    ((uint16_t)(                                \
-        (((uint16_t)(x) & 0x00ffU) << 8) |      \
-        (((uint16_t)(x) & 0xff00U) >> 8)))
-#define ___constant_swab32(x)                           \
-    ((uint32_t)(                                        \
-        (((uint32_t)(x) & 0x000000ffU) << 24) |         \
-        (((uint32_t)(x) & 0x0000ff00U) <<  8) |         \
-        (((uint32_t)(x) & 0x00ff0000U) >>  8) |         \
-        (((uint32_t)(x) & 0xff000000U) >> 24)))
-#define ___constant_swab64(x)                                            \
-    ((uint64_t)(                                                         \
-        (((uint64_t)(x) & 0x00000000000000ffULL) << 56) |                \
-        (((uint64_t)(x) & 0x000000000000ff00ULL) << 40) |                \
-        (((uint64_t)(x) & 0x0000000000ff0000ULL) << 24) |                \
-        (((uint64_t)(x) & 0x00000000ff000000ULL) <<  8) |                \
-        (((uint64_t)(x) & 0x000000ff00000000ULL) >>  8) |                \
-        (((uint64_t)(x) & 0x0000ff0000000000ULL) >> 24) |                \
-        (((uint64_t)(x) & 0x00ff000000000000ULL) >> 40) |                \
-        (((uint64_t)(x) & 0xff00000000000000ULL) >> 56)))
-
-/*
- * provide defaults when no architecture-specific optimization is detected
- */
-#ifndef __arch__swab16
-#  define __arch__swab16(x) ___swab16(x)
-#endif
-#ifndef __arch__swab32
-#  define __arch__swab32(x) ___swab32(x)
-#endif
-#ifndef __arch__swab64
-#  define __arch__swab64(x) ___swab64(x)
-#endif
-
-#ifndef __arch__swab16p
-#  define __arch__swab16p(x) __arch__swab16(*(x))
-#endif
-#ifndef __arch__swab32p
-#  define __arch__swab32p(x) __arch__swab32(*(x))
-#endif
-#ifndef __arch__swab64p
-#  define __arch__swab64p(x) __arch__swab64(*(x))
-#endif
-
-#ifndef __arch__swab16s
-#  define __arch__swab16s(x) do { *(x) = __arch__swab16p((x)); } while (0)
-#endif
-#ifndef __arch__swab32s
-#  define __arch__swab32s(x) do { *(x) = __arch__swab32p((x)); } while (0)
-#endif
-#ifndef __arch__swab64s
-#  define __arch__swab64s(x) do { *(x) = __arch__swab64p((x)); } while (0)
-#endif
-
-
-/*
- * Allow constant folding
- */
-#if defined(__GNUC__) && defined(__OPTIMIZE__)
-#  define __swab16(x) \
-(__builtin_constant_p((uint16_t)(x)) ? \
- ___swab16((x)) : \
- __fswab16((x)))
-#  define __swab32(x) \
-(__builtin_constant_p((uint32_t)(x)) ? \
- ___swab32((x)) : \
- __fswab32((x)))
-#  define __swab64(x) \
-(__builtin_constant_p((uint64_t)(x)) ? \
- ___swab64((x)) : \
- __fswab64((x)))
-#else
-#  define __swab16(x) __fswab16(x)
-#  define __swab32(x) __fswab32(x)
-#  define __swab64(x) __fswab64(x)
-#endif /* OPTIMIZE */
-
-
-static inline attr_const uint16_t __fswab16(uint16_t x)
-{
-    return __arch__swab16(x);
-}
-static inline uint16_t __swab16p(const uint16_t *x)
-{
-    return __arch__swab16p(x);
-}
-static inline void __swab16s(uint16_t *addr)
-{
-    __arch__swab16s(addr);
-}
-
-static inline attr_const uint32_t __fswab32(uint32_t x)
-{
-    return __arch__swab32(x);
-}
-static inline uint32_t __swab32p(const uint32_t *x)
-{
-    return __arch__swab32p(x);
-}
-static inline void __swab32s(uint32_t *addr)
-{
-    __arch__swab32s(addr);
-}
-
-#ifdef __BYTEORDER_HAS_U64__
-static inline attr_const uint64_t __fswab64(uint64_t x)
-{
-#  ifdef __SWAB_64_THRU_32__
-    uint32_t h = x >> 32, l = x;
-    return ((uint64_t)__swab32(l) << 32) | __swab32(h);
-#  else
-    return __arch__swab64(x);
-#  endif
-}
-static inline uint64_t __swab64p(const uint64_t *x)
-{
-    return __arch__swab64p(x);
-}
-static inline void __swab64s(uint64_t *addr)
-{
-    __arch__swab64s(addr);
-}
-#endif /* __BYTEORDER_HAS_U64__ */
-
-#define swab16 __swab16
-#define swab32 __swab32
-#define swab64 __swab64
-#define swab16p __swab16p
-#define swab32p __swab32p
-#define swab64p __swab64p
-#define swab16s __swab16s
-#define swab32s __swab32s
-#define swab64s __swab64s
-
-#endif /* __XEN_BYTEORDER_SWAB_H__ */
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	Anthony PERARD ,
	Michal Orzel ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Volodymyr Babchuk ,
	Bertrand Marquis ,
	Shawn Anastasio ,
	Oleksii Kurochko ,
	"Daniel P . Smith" ,
	Lin Liu 
Subject: [PATCH v6 11/15] xen/common: Switch {asm -> xen}/byteorder.h
Date: Wed, 16 Apr 2025 12:58:56 +0100
Message-Id: <20250416115900.2491661-12-andrew.cooper3@citrix.com>
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Sort the includes.  Drop useless includes of xen/types.h

Signed-off-by: Andrew Cooper 
Acked-by: Jan Beulich 
---
CC: Anthony PERARD 
CC: Michal Orzel 
CC: Jan Beulich 
CC: Julien Grall 
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Volodymyr Babchuk 
CC: Bertrand Marquis 
CC: Shawn Anastasio 
CC: Oleksii Kurochko 
CC: Daniel P. Smith 
CC: Lin Liu 

v5:
 * New
---
 xen/common/bitmap.c                 | 5 ++---
 xen/common/libelf/libelf-private.h  | 3 ++-
 xen/drivers/char/ehci-dbgp.c        | 4 +++-
 xen/include/xen/bitmap.h            | 2 +-
 xen/include/xen/device_tree.h       | 3 ++-
 xen/include/xen/libfdt/libfdt_env.h | 3 +--
 xen/include/xen/unaligned.h         | 3 +--
 7 files changed, 12 insertions(+), 11 deletions(-)

diff --git a/xen/common/bitmap.c b/xen/common/bitmap.c
index 6c4af09c18cb..bf1a7fd91e36 100644
--- a/xen/common/bitmap.c
+++ b/xen/common/bitmap.c
@@ -5,14 +5,13 @@
  * This source code is licensed under the GNU General Public License,
  * Version 2.  See the file COPYING for more details.
  */
-#include 
-#include 
 #include 
 #include 
+#include 
 #include 
+#include 
 #include 
 #include 
-#include 
 
 /*
  * bitmaps provide an array of bits, implemented using an an
diff --git a/xen/common/libelf/libelf-private.h b/xen/common/libelf/libelf-private.h
index 65417dffc8a0..e5c9cc109972 100644
--- a/xen/common/libelf/libelf-private.h
+++ b/xen/common/libelf/libelf-private.h
@@ -17,10 +17,11 @@
 
 #ifdef __XEN__
 
+#include 
 #include 
 #include 
 #include 
-#include 
+
 #include 
 
 /* we would like to use elf->log_callback but we can't because
diff --git a/xen/drivers/char/ehci-dbgp.c b/xen/drivers/char/ehci-dbgp.c
index 1ad3c6bebf87..e9cd59b25463 100644
--- a/xen/drivers/char/ehci-dbgp.c
+++ b/xen/drivers/char/ehci-dbgp.c
@@ -5,15 +5,17 @@
  * Linux; see the Linux source for authorship and copyrights.
  */
 
+#include 
 #include 
 #include 
 #include 
 #include 
 #include 
 #include 
-#include 
+
 #include 
 #include 
+
 #include 
 
 /* #define DBGP_DEBUG */
diff --git a/xen/include/xen/bitmap.h b/xen/include/xen/bitmap.h
index 4b642cd4207b..b5e9cdd3db86 100644
--- a/xen/include/xen/bitmap.h
+++ b/xen/include/xen/bitmap.h
@@ -230,7 +230,7 @@ static inline unsigned int bitmap_weight(const unsigned long *src,
 	return __bitmap_weight(src, nbits);
 }
 
-#include 
+#include 
 
 #ifdef __LITTLE_ENDIAN
 #define BITMAP_MEM_ALIGNMENT 8
diff --git a/xen/include/xen/device_tree.h b/xen/include/xen/device_tree.h
index 0ff80fda04da..6dc1fb5159cd 100644
--- a/xen/include/xen/device_tree.h
+++ b/xen/include/xen/device_tree.h
@@ -10,7 +10,8 @@
 #ifndef __XEN_DEVICE_TREE_H__
 #define __XEN_DEVICE_TREE_H__
 
-#include 
+#include 
+
 #include 
 #include 
 #include 
diff --git a/xen/include/xen/libfdt/libfdt_env.h b/xen/include/xen/libfdt/libfdt_env.h
index 8368787391b7..04abc6bb68c6 100644
--- a/xen/include/xen/libfdt/libfdt_env.h
+++ b/xen/include/xen/libfdt/libfdt_env.h
@@ -7,9 +7,8 @@
  * Copyright 2012 Kim Phillips, Freescale Semiconductor.
  */
 
-#include 
+#include 
 #include 
-#include 
 
 #ifdef __CHECKER__
 #define FDT_FORCE __attribute__((force))
diff --git a/xen/include/xen/unaligned.h b/xen/include/xen/unaligned.h
index 8c8b08338b8d..e64813ab4b20 100644
--- a/xen/include/xen/unaligned.h
+++ b/xen/include/xen/unaligned.h
@@ -3,8 +3,7 @@
 #define __XEN_UNALIGNED_H__
 
 #ifdef __XEN__
-#include 
-#include 
+#include 
 #endif
 
 /*
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Volodymyr Babchuk ,
	Bertrand Marquis ,
	Shawn Anastasio ,
	Oleksii Kurochko ,
	"Daniel P . Smith" ,
	Lin Liu 
Subject: [PATCH v6 12/15] arm: Remove asm/byteorder.h
Date: Wed, 16 Apr 2025 12:58:57 +0100
Message-Id: <20250416115900.2491661-13-andrew.cooper3@citrix.com>
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With the common code moved fully onto xen/byteorder.h, clean up the dregs.

Sort includes in some files while swapping over to xen/byteorder.h.

No functional change.

Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Michal Orzel 
CC: Jan Beulich 
CC: Julien Grall 
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Volodymyr Babchuk 
CC: Bertrand Marquis 
CC: Shawn Anastasio 
CC: Oleksii Kurochko 
CC: Daniel P. Smith 
CC: Lin Liu 

v5:
 * New
---
 xen/arch/arm/alternative.c           |  6 +++---
 xen/arch/arm/arm64/livepatch.c       |  2 +-
 xen/arch/arm/include/asm/arm32/io.h  |  3 ++-
 xen/arch/arm/include/asm/arm64/io.h  |  3 ++-
 xen/arch/arm/include/asm/byteorder.h | 14 --------------
 xen/arch/arm/kernel.c                |  2 +-
 xen/arch/arm/vgic/vgic-mmio.c        |  3 ++-
 7 files changed, 11 insertions(+), 22 deletions(-)
 delete mode 100644 xen/arch/arm/include/asm/byteorder.h

diff --git a/xen/arch/arm/alternative.c b/xen/arch/arm/alternative.c
index 2c1af6e7e426..adb9b7d8814b 100644
--- a/xen/arch/arm/alternative.c
+++ b/xen/arch/arm/alternative.c
@@ -6,18 +6,18 @@
  * Copyright (C) 2014-2016 ARM Ltd.
  */
 
+#include 
 #include 
-#include 
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
+#include 
+
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
diff --git a/xen/arch/arm/arm64/livepatch.c b/xen/arch/arm/arm64/livepatch.c
index 6efe4ec770d4..e135bd5bf99a 100644
--- a/xen/arch/arm/arm64/livepatch.c
+++ b/xen/arch/arm/arm64/livepatch.c
@@ -3,6 +3,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -11,7 +12,6 @@
 #include 
 
 #include 
-#include 
 #include 
 #include 
 
diff --git a/xen/arch/arm/include/asm/arm32/io.h b/xen/arch/arm/include/asm/arm32/io.h
index 782b564809e3..fb0425e62930 100644
--- a/xen/arch/arm/include/asm/arm32/io.h
+++ b/xen/arch/arm/include/asm/arm32/io.h
@@ -21,8 +21,9 @@
 #ifndef _ARM_ARM32_IO_H
 #define _ARM_ARM32_IO_H
 
+#include 
+
 #include 
-#include 
 
 static inline void __raw_writeb(u8 val, volatile void __iomem *addr)
 {
diff --git a/xen/arch/arm/include/asm/arm64/io.h b/xen/arch/arm/include/asm/arm64/io.h
index 2e2ab24f7838..7d5959877759 100644
--- a/xen/arch/arm/include/asm/arm64/io.h
+++ b/xen/arch/arm/include/asm/arm64/io.h
@@ -20,8 +20,9 @@
 #ifndef _ARM_ARM64_IO_H
 #define _ARM_ARM64_IO_H
 
+#include 
+
 #include 
-#include 
 #include 
 
 /*
diff --git a/xen/arch/arm/include/asm/byteorder.h b/xen/arch/arm/include/asm/byteorder.h
deleted file mode 100644
index 7f1419c45a16..000000000000
--- a/xen/arch/arm/include/asm/byteorder.h
+++ /dev/null
@@ -1,14 +0,0 @@
-#ifndef __ASM_ARM_BYTEORDER_H__
-#define __ASM_ARM_BYTEORDER_H__
-
-#include 
-
-#endif /* __ASM_ARM_BYTEORDER_H__ */
-/*
- * Local variables:
- * mode: C
- * c-file-style: "BSD"
- * c-basic-offset: 4
- * indent-tabs-mode: nil
- * End:
- */
diff --git a/xen/arch/arm/kernel.c b/xen/arch/arm/kernel.c
index 6eaf9e2b06b3..2647812e8e3e 100644
--- a/xen/arch/arm/kernel.c
+++ b/xen/arch/arm/kernel.c
@@ -4,6 +4,7 @@
  *
  * Copyright (C) 2011 Citrix Systems, Inc.
  */
+#include 
 #include 
 #include 
 #include 
@@ -15,7 +16,6 @@
 #include 
 #include 
 
-#include 
 #include 
 #include 
 
diff --git a/xen/arch/arm/vgic/vgic-mmio.c b/xen/arch/arm/vgic/vgic-mmio.c
index b4ba34cfc368..d2bcb32cd797 100644
--- a/xen/arch/arm/vgic/vgic-mmio.c
+++ b/xen/arch/arm/vgic/vgic-mmio.c
@@ -14,10 +14,11 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
+
 #include 
-#include 
 
 #include "vgic.h"
 #include "vgic-mmio.h"
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Volodymyr Babchuk ,
	Bertrand Marquis ,
	Shawn Anastasio ,
	Oleksii Kurochko ,
	"Daniel P . Smith" ,
	Lin Liu 
Subject: [PATCH v6 13/15] ppc: Drop asm/byteorder.h
Date: Wed, 16 Apr 2025 12:58:58 +0100
Message-Id: <20250416115900.2491661-14-andrew.cooper3@citrix.com>
X-Mailer: git-send-email 2.39.5
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With the common code moved fully onto xen/byteorder.h, clean up the dregs.

Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Michal Orzel 
CC: Jan Beulich 
CC: Julien Grall 
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Volodymyr Babchuk 
CC: Bertrand Marquis 
CC: Shawn Anastasio 
CC: Oleksii Kurochko 
CC: Daniel P. Smith 
CC: Lin Liu 

v5:
 * New
---
 xen/arch/ppc/include/asm/byteorder.h | 6 ------
 xen/arch/ppc/include/asm/page.h      | 4 +---
 xen/arch/ppc/mm-radix.c              | 2 +-
 3 files changed, 2 insertions(+), 10 deletions(-)
 delete mode 100644 xen/arch/ppc/include/asm/byteorder.h

diff --git a/xen/arch/ppc/include/asm/byteorder.h b/xen/arch/ppc/include/asm/byteorder.h
deleted file mode 100644
index 8df6adbf0d7d..000000000000
--- a/xen/arch/ppc/include/asm/byteorder.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _ASM_PPC_BYTEORDER_H
-#define _ASM_PPC_BYTEORDER_H
-
-#include 
-
-#endif /* _ASM_PPC_BYTEORDER_H */
diff --git a/xen/arch/ppc/include/asm/page.h b/xen/arch/ppc/include/asm/page.h
index 6d4cd2611c2b..c6160afcfdb8 100644
--- a/xen/arch/ppc/include/asm/page.h
+++ b/xen/arch/ppc/include/asm/page.h
@@ -3,9 +3,7 @@
 #define _ASM_PPC_PAGE_H
 
 #include 
-#include 
-
-#include 
+#include 
 
 #define PDE_VALID     PPC_BIT(0)
 #define PDE_NLB_MASK  0x1ffffffffffffe0UL
diff --git a/xen/arch/ppc/mm-radix.c b/xen/arch/ppc/mm-radix.c
index 24232f3907aa..9a00ae416af0 100644
--- a/xen/arch/ppc/mm-radix.c
+++ b/xen/arch/ppc/mm-radix.c
@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -7,7 +8,6 @@
 #include 
 #include 
 
-#include 
 #include 
 #include 
 #include 
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	Anthony PERARD ,
	Michal Orzel ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Volodymyr Babchuk ,
	Bertrand Marquis ,
	Shawn Anastasio ,
	Oleksii Kurochko ,
	"Daniel P . Smith" ,
	Lin Liu 
Subject: [PATCH v6 15/15] x86: Drop asm/byteorder.h
Date: Wed, 16 Apr 2025 12:59:00 +0100
Message-Id: <20250416115900.2491661-16-andrew.cooper3@citrix.com>
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With the common code moved fully onto xen/byteorder.h, clean up the dregs.

It turns out that msi.h has not needed byteorder.h since the use of
__{BIG,LITTLE}_ENDIAN_BITFIELD was dropped in commit d58f3941ce3f ("x86/MSI:
use standard C types in structures/unions").

No functional change.

Signed-off-by: Andrew Cooper 
Acked-by: Jan Beulich 
---
CC: Anthony PERARD 
CC: Michal Orzel 
CC: Jan Beulich 
CC: Julien Grall 
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Volodymyr Babchuk 
CC: Bertrand Marquis 
CC: Shawn Anastasio 
CC: Oleksii Kurochko 
CC: Daniel P. Smith 
CC: Lin Liu 

v5:
 * New
---
 xen/arch/x86/include/asm/byteorder.h | 6 ------
 xen/arch/x86/include/asm/msi.h       | 1 -
 2 files changed, 7 deletions(-)
 delete mode 100644 xen/arch/x86/include/asm/byteorder.h

diff --git a/xen/arch/x86/include/asm/byteorder.h b/xen/arch/x86/include/asm/byteorder.h
deleted file mode 100644
index 3524a6cee741..000000000000
--- a/xen/arch/x86/include/asm/byteorder.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef __ASM_X86_BYTEORDER_H__
-#define __ASM_X86_BYTEORDER_H__
-
-#include 
-
-#endif /* __ASM_X86_BYTEORDER_H__ */
diff --git a/xen/arch/x86/include/asm/msi.h b/xen/arch/x86/include/asm/msi.h
index 975d0f26b35d..00059d4a3a9d 100644
--- a/xen/arch/x86/include/asm/msi.h
+++ b/xen/arch/x86/include/asm/msi.h
@@ -3,7 +3,6 @@
 
 #include 
 #include 
-#include 
 #include 
 
 /*
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Oleksii Kurochko ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Volodymyr Babchuk ,
	Bertrand Marquis ,
	Shawn Anastasio ,
	"Daniel P . Smith" ,
	Lin Liu 
Subject: [PATCH v6 14/15] riscv: Remove asm/byteorder.h
Date: Wed, 16 Apr 2025 12:58:59 +0100
Message-Id: <20250416115900.2491661-15-andrew.cooper3@citrix.com>
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With the common code moved fully onto xen/byteorder.h, clean up the dregs.

The use of byteorder.h in io.h appears to have been copy&paste from ARM.  It's
not needed, but macros and types are.

No functional change.

Signed-off-by: Andrew Cooper 
Reviewed-by: Oleksii Kurochko 
---
CC: Anthony PERARD 
CC: Michal Orzel 
CC: Jan Beulich 
CC: Julien Grall 
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Volodymyr Babchuk 
CC: Bertrand Marquis 
CC: Shawn Anastasio 
CC: Oleksii Kurochko 
CC: Daniel P. Smith 
CC: Lin Liu 

v5:
 * New
---
 xen/arch/riscv/include/asm/byteorder.h | 14 --------------
 xen/arch/riscv/include/asm/io.h        |  3 ++-
 2 files changed, 2 insertions(+), 15 deletions(-)
 delete mode 100644 xen/arch/riscv/include/asm/byteorder.h

diff --git a/xen/arch/riscv/include/asm/byteorder.h b/xen/arch/riscv/include/asm/byteorder.h
deleted file mode 100644
index a32bca02df38..000000000000
--- a/xen/arch/riscv/include/asm/byteorder.h
+++ /dev/null
@@ -1,14 +0,0 @@
-#ifndef ASM__RISCV__BYTEORDER_H
-#define ASM__RISCV__BYTEORDER_H
-
-#include 
-
-#endif /* ASM__RISCV__BYTEORDER_H */
-/*
- * Local variables:
- * mode: C
- * c-file-style: "BSD"
- * c-basic-offset: 4
- * indent-tabs-mode: nil
- * End:
- */
diff --git a/xen/arch/riscv/include/asm/io.h b/xen/arch/riscv/include/asm/io.h
index 55f329dde321..8bab4ffa0390 100644
--- a/xen/arch/riscv/include/asm/io.h
+++ b/xen/arch/riscv/include/asm/io.h
@@ -38,7 +38,8 @@
 #ifndef ASM__RISCV__IO_H
 #define ASM__RISCV__IO_H
 
-#include 
+#include 
+#include 
 
 /*
  * The RISC-V ISA doesn't yet specify how to query or modify PMAs, so we can't
-- 
2.39.5



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Date: Wed, 16 Apr 2025 14:07:20 +0200
From: Petr =?utf-8?B?VmFuxJtr?= 
To: linux-kernel@vger.kernel.org
Cc: Kevin Brodsky ,
	Andrew Morton , linux-mm@kvack.org,
	x86@kernel.org, xen-devel@lists.xenproject.org,
	linux-arch@vger.kernel.org
Subject: Regression from a9b3c355c2e6 ("asm-generic: pgalloc: provide generic
 __pgd_{alloc,free}") with CONFIG_DEBUG_VM_PGFLAGS=y and Xen
Message-ID: <202541612720-Z_-deOZTOztMXHBh-arkamar@atlas.cz>
MIME-Version: 1.0
Content-Type: text/plain; charset=utf-8
Content-Disposition: inline

Hi all,

I have discovered a regression introduced in commit a9b3c355c2e6
("asm-generic: pgalloc: provide generic __pgd_{alloc,free}") [1,2] in
kernel version 6.14. The problem occurs when the x86 kernel is
configured with CONFIG_DEBUG_VM_PGFLAGS=y and is run as a PV Dom0 in Xen
4.19.1. During the startup, the kernel panics with the error log below.

The commit changed PGD allocation path.  In the new implementation
_pgd_alloc allocates memory with __pgd_alloc, which indirectly calls 

  alloc_pages_noprof(gfp | __GFP_COMP, order);

This is in contrast to the old behavior, where __get_free_pages was
used, which indirectly called

  alloc_pages_noprof(gfp_mask & ~__GFP_HIGHMEM, order);

The key difference is that the new allocator can return a compound page.
When xen_pin_page is later called on such a page, it call
TestSetPagePinned function, which internally uses the PF_NO_COMPOUND
macro. This macro enforces VM_BUG_ON_PGFLAGS if PageCompound is true,
triggering the panic when CONFIG_DEBUG_VM_PGFLAGS is enabled.

I am reporting this issue without a patch as I am not sure which part of
the code should be adapted to resolve the regression.

Let me know if I forgot to mention something important.

Cheers,
Petr

[1] a9b3c355c2e6 ("asm-generic: pgalloc: provide generic __pgd_{alloc,free}")
[2] https://lkml.kernel.org/r/20250103184415.2744423-6-kevin.brodsky@arm.com

[    0.396244] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
[    0.398164] software IO TLB: area num 2.
[    0.449383] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
[    0.452043] page: refcount:1 mapcount:0 mapping:0000000000000000 index:0xffff888003450000 pfn:0x344e
[    0.454715] head: order:1 mapcount:0 entire_mapcount:0 nr_pages_mapped:0 pincount:0
[    0.456908] flags: 0x10000000000040(head|node=0|zone=1)
[    0.458390] raw: 0010000000000040 ffffffff82850ed0 ffffffff82850ed0 0000000000000000
[    0.460621] raw: ffff888003450000 ffff888003454000 00000001ffffffff 0000000000000000
[    0.462807] head: 0010000000000040 ffffffff82850ed0 ffffffff82850ed0 0000000000000000
[    0.464928] head: ffff888003450000 ffff888003454000 00000001ffffffff 0000000000000000
[    0.467106] head: 0010000000000001 ffffea00000d1381 ffffffffffffffff 0000000000000000
[    0.469263] head: 0000000000000002 0000000000000000 00000000ffffffff 0000000000000000
[    0.471430] page dumped because: VM_BUG_ON_PAGE(1 && PageCompound(page))
[    0.473338] ------------[ cut here ]------------
[    0.474764] kernel BUG at include/linux/page-flags.h:527!
[    0.476473] Oops: invalid opcode: 0000 [#1] PREEMPT SMP NOPTI
[    0.478294] CPU: 0 UID: 0 PID: 0 Comm: swapper Not tainted 6.13.0-rc6-00187-ga9b3c355c2e6 #41
[    0.480971] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.16.3-20240910_120124-localhost 04/01/2014
[    0.484218] RIP: e030:xen_pin_page+0x5e/0x180
[    0.485580] Code: f0 48 0f ba 2e 0a 73 24 48 83 c4 08 5b 41 5c 41 5d 41 5e 41 5f 5d e9 a1 75 e1 00 48 c7 c6 68 70 58 82 48 89 df e8 c2 da 30 00 <0f> 0b 49 bd 00 00 00 00 00 16 00 00 31 ff 41 89 d4 48 b8 00 00 00
[    0.491414] RSP: e02b:ffffffff82803d18 EFLAGS: 00010046
[    0.493064] RAX: 000000000000003c RBX: ffffea00000d1380 RCX: 0000000000000000
[    0.495294] RDX: 0000000000000000 RSI: ffffffff82803b68 RDI: 00000000ffffffff
[    0.497513] RBP: ffffffff82803d48 R08: 00000000ffffdfff R09: ffffffff82925148
[    0.499723] R10: ffffffff828751a0 R11: ffffffff82803a88 R12: ffff88800344e000
[    0.501940] R13: ffff88808344e000 R14: ffff88800344e000 R15: 0000000000000100
[    0.504180] FS:  0000000000000000(0000) GS:ffff88803aa00000(0000) knlGS:0000000000000000
[    0.506699] CS:  e030 DS: 0000 ES: 0000 CR0: 0000000080050033
[    0.508485] CR2: ffffc90000a00000 CR3: 0000000002842000 CR4: 0000000000000660
[    0.510648] Call Trace:
[    0.511420]  
[    0.512071]  ? show_regs.part.0+0x1d/0x30
[    0.513315]  ? __die+0x52/0x90
[    0.514282]  ? die+0x2a/0x50
[    0.515189]  ? do_trap+0x10e/0x120
[    0.516255]  ? do_error_trap+0x6e/0xa0
[    0.517453]  ? xen_pin_page+0x5e/0x180
[    0.518611]  ? exc_invalid_op+0x52/0x70
[    0.519805]  ? xen_pin_page+0x5e/0x180
[    0.520936]  ? asm_exc_invalid_op+0x1b/0x20
[    0.522245]  ? xen_pin_page+0x5e/0x180
[    0.523424]  ? xen_pin_page+0x5e/0x180
[    0.524596]  __xen_pgd_walk+0x2a0/0x2d0
[    0.525816]  ? __pfx_xen_pin_page+0x10/0x10
[    0.527116]  __xen_pgd_pin+0x4d/0x180
[    0.528288]  xen_enter_mmap+0x25/0x40
[    0.529431]  poking_init+0x53/0x130
[    0.530558]  start_kernel+0x4a7/0x6f0
[    0.531726]  x86_64_start_reservations+0x29/0x30
[    0.533197]  xen_start_kernel+0x6cf/0x6e0
[    0.534466]  startup_xen+0x1f/0x20
[    0.535497]  
[    0.536193] ---[ end trace 0000000000000000 ]---
[    0.537676] RIP: e030:xen_pin_page+0x5e/0x180
[    0.539049] Code: f0 48 0f ba 2e 0a 73 24 48 83 c4 08 5b 41 5c 41 5d 41 5e 41 5f 5d e9 a1 75 e1 00 48 c7 c6 68 70 58 82 48 89 df e8 c2 da 30 00 <0f> 0b 49 bd 00 00 00 00 00 16 00 00 31 ff 41 89 d4 48 b8 00 00 00
[    0.544954] RSP: e02b:ffffffff82803d18 EFLAGS: 00010046
[    0.546553] RAX: 000000000000003c RBX: ffffea00000d1380 RCX: 0000000000000000
[    0.548821] RDX: 0000000000000000 RSI: ffffffff82803b68 RDI: 00000000ffffffff
[    0.551022] RBP: ffffffff82803d48 R08: 00000000ffffdfff R09: ffffffff82925148
[    0.553233] R10: ffffffff828751a0 R11: ffffffff82803a88 R12: ffff88800344e000
[    0.555420] R13: ffff88808344e000 R14: ffff88800344e000 R15: 0000000000000100
[    0.557365] FS:  0000000000000000(0000) GS:ffff88803aa00000(0000) knlGS:0000000000000000
[    0.559528] CS:  e030 DS: 0000 ES: 0000 CR0: 0000000080050033
[    0.561050] CR2: ffffc90000a00000 CR3: 0000000002842000 CR4: 0000000000000660
[    0.562970] Kernel panic - not syncing: Attempted to kill the idle task!
(XEN) Hardware Dom0 crashed: rebooting machine in 5 seconds.
QEMU: Terminated



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From: Luca Fancellu 
To: "Orzel, Michal" 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Volodymyr Babchuk
	
Subject: Re: [PATCH v3 3/7] arm/mpu: Introduce utility functions for the pr_t
 type
Thread-Topic: [PATCH v3 3/7] arm/mpu: Introduce utility functions for the pr_t
 type
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 Xen-devel 
Cc: Anthony PERARD ,
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 Oleksii Kurochko , Lin Liu 
References: <20250416115900.2491661-1-andrew.cooper3@citrix.com>
 <20250416115900.2491661-11-andrew.cooper3@citrix.com>
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On 4/16/25 07:58, Andrew Cooper wrote:
> Sort the includes while at it.
> 
> No functional change.
> 
> Signed-off-by: Andrew Cooper 

Acked-by: Daniel P. Smith 


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On 16/04/2025 14:31, Luca Fancellu wrote:
> Hi Michal,
> 
>> On 16 Apr 2025, at 11:50, Orzel, Michal  wrote:
>>
>>
>>
>> On 11/04/2025 16:56, Luca Fancellu wrote:
>>> Introduce few utility function to manipulate and handle the
>>> pr_t type.
>>>
>>> Signed-off-by: Luca Fancellu 
>>> ---
>>> xen/arch/arm/include/asm/mpu.h | 40 ++++++++++++++++++++++++++++++++++
>>> 1 file changed, 40 insertions(+)
>>>
>>> diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h
>>> index 59ff22c804c1..6971507457fb 100644
>>> --- a/xen/arch/arm/include/asm/mpu.h
>>> +++ b/xen/arch/arm/include/asm/mpu.h
>>> @@ -20,6 +20,46 @@
>>> #define NUM_MPU_REGIONS_MASK    (NUM_MPU_REGIONS - 1)
>>> #define MAX_MPU_REGIONS         NUM_MPU_REGIONS_MASK
>>>
>>> +#ifndef __ASSEMBLY__
>>> +
>>> +/* Set base address of MPU protection region(pr_t). */
>> What's the use of (pr_t) in this comment? pr_t is a data type. If at all, it
>> would want to be ...region @pr but I think you can skip it.
> 
> ok
> 
>>
>>> +static inline void pr_set_base(pr_t *pr, paddr_t base)
>>> +{
>>> +    pr->prbar.reg.base = (base >> MPU_REGION_SHIFT);
>> Looking at pr_t definition, base/limit is 46 bits wide. However the spec says
>> that last 4bits are reserved (i.e. you should not write to them) unless FEAT_LPA
>> is implemented. What's our plan here?
> 
> So we’re currently supporting max 1TB, so probably this one needs to be on the
> case when FEAT_LPA is considered not implemented, so I’ll change and if we will
> later support more than 42 bit we could do something?
I think yes.

> 
>>
>>> +}
>>> +
>>> +/* Set limit address of MPU protection region(pr_t). */
>>> +static inline void pr_set_limit(pr_t *pr, paddr_t limit)
>>> +{
>>> +    pr->prlar.reg.limit = ((limit - 1) >> MPU_REGION_SHIFT);
>> Why -1? AFAIR these registers take inclusive addresses, so is it because you
>> want caller to pass limit as exclusive and you convert it to inclusive? I think
>> it's quite error prone.
> 
> Yes it’s meant to be used with exclusive range, shall we document it or use
> Inclusive range instead?
What's the expected behavior of callers? Are we going to set up protection
region based on regular start+size pair (like with MMU) or start+end? If the
latter for some reason (with size there are less issues), then end usually is
inclusive and you would not need conversion.

~Michal



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Date: Wed, 16 Apr 2025 13:41:51 +0100
From: Matthew Wilcox 
To: Petr =?utf-8?B?VmFuxJtr?= 
Cc: linux-kernel@vger.kernel.org, Kevin Brodsky ,
	Andrew Morton , linux-mm@kvack.org,
	x86@kernel.org, xen-devel@lists.xenproject.org,
	linux-arch@vger.kernel.org
Subject: Re: Regression from a9b3c355c2e6 ("asm-generic: pgalloc: provide
 generic __pgd_{alloc,free}") with CONFIG_DEBUG_VM_PGFLAGS=y and Xen
Message-ID: 
References: <202541612720-Z_-deOZTOztMXHBh-arkamar@atlas.cz>
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In-Reply-To: <202541612720-Z_-deOZTOztMXHBh-arkamar@atlas.cz>

On Wed, Apr 16, 2025 at 02:07:20PM +0200, Petr Vaněk wrote:
> I have discovered a regression introduced in commit a9b3c355c2e6
> ("asm-generic: pgalloc: provide generic __pgd_{alloc,free}") [1,2] in
> kernel version 6.14. The problem occurs when the x86 kernel is
> configured with CONFIG_DEBUG_VM_PGFLAGS=y and is run as a PV Dom0 in Xen
> 4.19.1. During the startup, the kernel panics with the error log below.

You also have to have CONFIG_MITIGATION_PAGE_TABLE_ISOLATION enabled
to hit this problem, otherwise we allocate an order-0 page.

> The commit changed PGD allocation path.  In the new implementation
> _pgd_alloc allocates memory with __pgd_alloc, which indirectly calls 
> 
>   alloc_pages_noprof(gfp | __GFP_COMP, order);
> 
> This is in contrast to the old behavior, where __get_free_pages was
> used, which indirectly called
> 
>   alloc_pages_noprof(gfp_mask & ~__GFP_HIGHMEM, order);
> 
> The key difference is that the new allocator can return a compound page.
> When xen_pin_page is later called on such a page, it call
> TestSetPagePinned function, which internally uses the PF_NO_COMPOUND
> macro. This macro enforces VM_BUG_ON_PGFLAGS if PageCompound is true,
> triggering the panic when CONFIG_DEBUG_VM_PGFLAGS is enabled.

I suspect the right thing to do here is to change the PF_NO_COMPOUND to
PF_HEAD.  Probably for all of these:

/* Xen */
PAGEFLAG(Pinned, pinned, PF_NO_COMPOUND)
        TESTSCFLAG(Pinned, pinned, PF_NO_COMPOUND)
PAGEFLAG(SavePinned, savepinned, PF_NO_COMPOUND);
PAGEFLAG(Foreign, foreign, PF_NO_COMPOUND);
PAGEFLAG(XenRemapped, xen_remapped, PF_NO_COMPOUND)
        TESTCLEARFLAG(XenRemapped, xen_remapped, PF_NO_COMPOUND)

Could you give that a try?


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Subject: Re: Regression from a9b3c355c2e6 ("asm-generic: pgalloc: provide
 generic __pgd_{alloc,free}") with CONFIG_DEBUG_VM_PGFLAGS=y and Xen
To: =?UTF-8?Q?Petr_Van=C4=9Bk?= ,
 linux-kernel@vger.kernel.org
Cc: Kevin Brodsky ,
 Andrew Morton , linux-mm@kvack.org,
 x86@kernel.org, xen-devel@lists.xenproject.org, linux-arch@vger.kernel.org
References: <202541612720-Z_-deOZTOztMXHBh-arkamar@atlas.cz>
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In-Reply-To: <202541612720-Z_-deOZTOztMXHBh-arkamar@atlas.cz>
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 protected-headers="v1"
From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= 
To: =?UTF-8?Q?Petr_Van=C4=9Bk?= ,
 linux-kernel@vger.kernel.org
Cc: Kevin Brodsky ,
 Andrew Morton , linux-mm@kvack.org,
 x86@kernel.org, xen-devel@lists.xenproject.org, linux-arch@vger.kernel.org
Message-ID: <4347cd96-52c8-4bfc-b383-6fea1554fd4a@suse.com>
Subject: Re: Regression from a9b3c355c2e6 ("asm-generic: pgalloc: provide
 generic __pgd_{alloc,free}") with CONFIG_DEBUG_VM_PGFLAGS=y and Xen
References: <202541612720-Z_-deOZTOztMXHBh-arkamar@atlas.cz>
In-Reply-To: <202541612720-Z_-deOZTOztMXHBh-arkamar@atlas.cz>

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From: Luca Fancellu 
To: "Orzel, Michal" 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Volodymyr Babchuk
	
Subject: Re: [PATCH v3 3/7] arm/mpu: Introduce utility functions for the pr_t
 type
Thread-Topic: [PATCH v3 3/7] arm/mpu: Introduce utility functions for the pr_t
 type
Thread-Index: AQHbqvIP34UccZOkWUuu+Y+Ap2U3MrOmJOcAgAAb/QCAAAMjAIAABC8A
Date: Wed, 16 Apr 2025 12:57:35 +0000
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References: <20250411145655.140667-1-luca.fancellu@arm.com>
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To: Jason Andryuk , Jan Beulich 
Cc: Xenia Ragiadakou ,
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 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 xen-devel@lists.xenproject.org, Alejandro Vallejo 
References: <20250408160802.49870-1-agarciav@amd.com>
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 <644cdc5a-b96a-4e43-ae7a-4cadda1d1084@amd.com>
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Autocrypt: addr=dpsmith@apertussolutions.com; keydata=
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On 4/10/25 16:56, Jason Andryuk wrote:
> On 2025-04-10 11:01, Jan Beulich wrote:
>> On 10.04.2025 15:09, Daniel P. Smith wrote:
>>> On 4/9/25 02:24, Jan Beulich wrote:
>>>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>>>> From: "Daniel P. Smith" 
>>>>>
>>>>> To begin moving toward allowing the hypervisor to construct more 
>>>>> than one
>>>>> domain at boot, a container is needed for a domain's build 
>>>>> information.
>>>>> Introduce a new header, , that contains the 
>>>>> initial
>>>>> struct boot_domain that encapsulate the build information for a 
>>>>> domain.
>>>>>
>>>>> Add a kernel and ramdisk boot module reference along with a struct 
>>>>> domain
>>>>> reference to the new struct boot_domain. This allows a struct 
>>>>> boot_domain
>>>>> reference to be the only parameter necessary to pass down through 
>>>>> the domain
>>>>> construction call chain.
>>>>>
>>>>> Signed-off-by: Daniel P. Smith 
>>>>> Reviewed-by: Jason Andryuk 
>>>>
>>>> Acked-by: Jan Beulich 
>>>
>>> I have to object because the meaningless rename is going cause
>>> significant pain in the rebase of the follow-on series for no improved
>>> code clarity.
>>
>> Sorry, then an incremental patch undoing the rename that happened (with
>> appropriate justification) will need proposing - the patch here has gone
>> in already.
> 
> Coming from a Linux background, ramdisk seemed more natural to me.  But 
> looking at hvm_start_info, the fields are called module there.  And 
> since we shouldn't tie this to the Linux naming, the more generic 
> "module" name seemed fine to me.

Again, as I have stated, ramdisk is not a Linux only concept. In fact, 
as Jan points out, initrd/initramfs are Linux specific implementations 
of a ramdisk for which Xen doesn't even fully support. I am inclined to 
ask the inverse of why hvm_start_info uses the name module. But that 
aside, let's consider the fact that the field is only populated by the 
device tree when a module type of BOOTMOD_RAMDISK is matched. And all 
the uses of the field are when its value is stored into a local variable 
called initrd.

Though the biggest irony is that generally obtuse abstraction are 
routinely blocked unless there is a tangible future case. Yet none was 
offered in the comment. Thus on that principle alone, a request for a 
tangible future use should have been requested and provided for the 
change to be considered.

V/r,
DPS


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On 16/04/2025 14:57, Luca Fancellu wrote:
> Hi Michal,
> 
>>>
>>>>
>>>>> +}
>>>>> +
>>>>> +/* Set limit address of MPU protection region(pr_t). */
>>>>> +static inline void pr_set_limit(pr_t *pr, paddr_t limit)
>>>>> +{
>>>>> +    pr->prlar.reg.limit = ((limit - 1) >> MPU_REGION_SHIFT);
>>>> Why -1? AFAIR these registers take inclusive addresses, so is it because you
>>>> want caller to pass limit as exclusive and you convert it to inclusive? I think
>>>> it's quite error prone.
>>>
>>> Yes it’s meant to be used with exclusive range, shall we document it or use
>>> Inclusive range instead?
>> What's the expected behavior of callers? Are we going to set up protection
>> region based on regular start+size pair (like with MMU) or start+end? If the
>> latter for some reason (with size there are less issues), then end usually is
>> inclusive and you would not need conversion.
> 
> I think we have a mix because for example destroy_xen_mappings and modify_xen_mappings
> are start and end, map_pages_to_xen instead is kind of start+size?
> 
> I moved the -1 inside pr_set_limit because it was open-coded in all the places, for example when
> referencing linker symbols or output of mfn_to_maddr(mfn_add(smfn, nr_mfn)), for this reason I
> thought: let’s call this one with exclusive ranges and modify internally for inclusive.
Hmm, yes. Indeed we have a mix of places where end is inclusive or exclusive. I
think we can stick with exclusive address being passed to this helper unless
others have a different opinion. I know we tried to convert some places to
start+size but I don't remember the future plans.

~Michal




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From: Luca Fancellu 
To: "Orzel, Michal" 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Volodymyr Babchuk
	
Subject: Re: [PATCH v3 3/7] arm/mpu: Introduce utility functions for the pr_t
 type
Thread-Topic: [PATCH v3 3/7] arm/mpu: Introduce utility functions for the pr_t
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Date: Wed, 16 Apr 2025 09:19:46 -0400
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Subject: Re: [PATCH v3 11/16] x86/hyperlaunch: locate dom0 initrd with
 hyperlaunch
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To: Alejandro Vallejo , Jan Beulich 
Cc: Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini ,
 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 xen-devel@lists.xenproject.org
References: <20250408160802.49870-1-agarciav@amd.com>
 <20250408160802.49870-12-agarciav@amd.com>
 
  
 <60363eb4-cb35-4077-b964-0c321c495a19@suse.com>
 
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On 4/15/25 07:59, Alejandro Vallejo wrote:
> On Tue Apr 15, 2025 at 7:17 AM BST, Jan Beulich wrote:
>> On 14.04.2025 19:27, Alejandro Vallejo wrote:
>>> On Mon Apr 14, 2025 at 6:06 PM BST, Alejandro Vallejo wrote:
>>>> On Thu Apr 10, 2025 at 12:34 PM BST, Jan Beulich wrote:
>>>>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>>>>
>>>>>> +            printk("  ramdisk: boot module %d\n", idx);
>>>>>> +            bi->mods[idx].type = BOOTMOD_RAMDISK;
>>>>>> +            bd->module = &bi->mods[idx];
>>>>>
>>>>> The field's named "module" now, but that now ends up inconsistent with
>>>>> naming used elsewhere, as is pretty noticeable here.
>>>>
>>>> Well, yes. It is confusing. Also, the DTB is called multiboot,ramdisk,
>>>> because multiboot,module is already used to detect what nodes are
>>>> expressed as multiboot,modules. I'm considering going back and calling
>>>> them ramdisk again. If anything, to avoid the ambiguity between
>>>> domain modules and multiboot modules. e.g: a kernel is a multiboot
>>>> module, but not a domain module.
>>>
>>> Particularly when misc/arm/device-tree/booting.txt already states that
>>> the initrd for dom0 ought to be provided with the "multiboot,ramdisk"
>>> string in the "compatible" prop.  Deviating from that is just going to
>>> make it far more annoying to unify arm and x86 in the future.  And
>>> calling those ramdisks anything but ramdisk internally is just plain
>>> confusing (as evidenced in the current series).
>>
>> Yet the limitation of this is quite obvious: How would you express
>> multiple such items?
> 
> With multiple such nodes.
> 
>    initrd1 {
>        compatible = "multiboot,ramdisk", "multiboot,module"
>        module-idx = <2>
>    };
>    initrd2 {
>        compatible = "multiboot,ramdisk", "multiboot,module"
>        module-idx = <3>
>    };
> 
> as is done in dom0less. This is not a hypothetical, it's already
> comitted.
> 
>> Have many "ramdisk"s?
> 
> As many as I require. If I was booting Xen(dom0+initrd) on
> Xen(hyperlaunch), that'd be 2 (with Xen passed as the kernel).
> 
>> Even if some of them serve an entirely different purpose?
> 
> The purpose of a ramdisk/initrd is of no concern to the hypervisor. They are
> specially crafted blobs consumed by kernels for purposes of bootstrap.
> 
>> See how Linux has gone to tuck together multiple CPIOs, as they can
>> have only one thing called "ramdisk" (which, aiui, now no longer truly
>> is).
> 
> That's an internal Linux matter. If they need 1, we'll pass 1. We do
> need several such blobs, because some OSs do need them. Namely, Xen. And
> AFAICS we call them modules mostly because (a) Xen does not have the
> module infrastructure that Linux has, which would causes ambiguities and
> (b) is typically loaded via multiboot, which does call each blob a
> module.
> 
>>
>>> So... how frontally opposed would you be to restoring the ramdisk
>>> nomenclature? Also, for ease of rebasing future patches it'd be far
>>> nicer to go back to ramdisk rather than reinventing some new name.
>>
>> Well, I fear I wouldn't ack such a patch. If everyone else agrees
>> that "ramdisk" is the best of all names (or at least getting close),
>> I'd perhaps mumble over, but let it go in.
> 
> Ok... When I send v4 I'll do so keeping the "module" rename. Meanwhile,
> I'll try to think of some options. Calling Xen's modules and the booted
> kernel modules the same way is just way too confusing.
> 
> I take it you have the same dislike for initrd as you do for ramdisk?
> 
>>
>> (Only partly as a joke: If we dislike "module", how about "blob" or
>> some such?)
> 
> Better not. Blob makes "kernel" sound like an adjective: Kernel blob.
> 
> There might be some other suitable word. I'll think about it.

And all this confusion and mess would have been avoided if left as the 
abstract ramdisk name.

v/r,
dps


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Date: Wed, 16 Apr 2025 09:32:56 -0400
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Subject: Re: [PATCH v3 13/16] x86/hyperlaunch: specify dom0 mode with device
 tree
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To: Jan Beulich , Alejandro Vallejo 
Cc: Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini ,
 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 xen-devel@lists.xenproject.org
References: <20250408160802.49870-1-agarciav@amd.com>
 <20250408160802.49870-14-agarciav@amd.com>
 <7a13e61b-8568-4852-bb46-974964e02d61@suse.com>
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On 4/10/25 07:57, Jan Beulich wrote:
> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>> --- a/xen/arch/x86/domain-builder/fdt.c
>> +++ b/xen/arch/x86/domain-builder/fdt.c
>> @@ -193,6 +193,25 @@ static int __init process_domain_node(
>>               bd->domid = (domid_t)val;
>>               printk("  domid: %d\n", bd->domid);
>>           }
>> +        else if ( strncmp(prop_name, "mode", name_len) == 0 )
>> +        {
>> +            if ( fdt_prop_as_u32(prop, &bd->mode) != 0 )
>> +            {
>> +                printk("  failed processing mode for domain %s\n", name);
>> +                return -EINVAL;
>> +            }
>> +
>> +            printk("  mode: ");
>> +            if ( !(bd->mode & BUILD_MODE_PARAVIRT) )
>> +            {
>> +                if ( bd->mode & BUILD_MODE_ENABLE_DM )
>> +                    printk("HVM\n");
>> +                else
>> +                    printk("PVH\n");
>> +            }
>> +            else
>> +                printk("PV\n");
>> +        }
> 
> My prior questions here remain: What's the significance of
> BUILD_MODE_ENABLE_DM when set alongside BUILD_MODE_PARAVIRT? What about
> any of the other bits being set?

 From boot-domain.h:
                                           /* On     | Off    */
#define BUILD_MODE_PARAVIRT      (1 << 0) /* PV     | PVH/HVM */
#define BUILD_MODE_ENABLE_DM     (1 << 1) /* HVM    | PVH     */

The logic says, if BUILD_MODE_PARAVIRT bit is not set, thus an HVM 
domain, check if BUILD_MODE_ENABLE_DM has been set. This is determin if 
the domain is what the toolstack differentiates as either an HVM or PVH 
domain. As you should know, there is no case of a PV domain requiring a 
backing device mode (DM) domain. IOW, BUILD_MODE_ENABLE_DM is only 
relevant to an HVM domain.

v/r,
dps



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Subject: Re: [PATCH v3 01/16] x86/boot: introduce boot domain
To: "Daniel P. Smith" 
Cc: Xenia Ragiadakou ,
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 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 16.04.2025 15:02, Daniel P. Smith wrote:
> On 4/10/25 16:56, Jason Andryuk wrote:
>> On 2025-04-10 11:01, Jan Beulich wrote:
>>> On 10.04.2025 15:09, Daniel P. Smith wrote:
>>>> On 4/9/25 02:24, Jan Beulich wrote:
>>>>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>>>>> From: "Daniel P. Smith" 
>>>>>>
>>>>>> To begin moving toward allowing the hypervisor to construct more 
>>>>>> than one
>>>>>> domain at boot, a container is needed for a domain's build 
>>>>>> information.
>>>>>> Introduce a new header, , that contains the 
>>>>>> initial
>>>>>> struct boot_domain that encapsulate the build information for a 
>>>>>> domain.
>>>>>>
>>>>>> Add a kernel and ramdisk boot module reference along with a struct 
>>>>>> domain
>>>>>> reference to the new struct boot_domain. This allows a struct 
>>>>>> boot_domain
>>>>>> reference to be the only parameter necessary to pass down through 
>>>>>> the domain
>>>>>> construction call chain.
>>>>>>
>>>>>> Signed-off-by: Daniel P. Smith 
>>>>>> Reviewed-by: Jason Andryuk 
>>>>>
>>>>> Acked-by: Jan Beulich 
>>>>
>>>> I have to object because the meaningless rename is going cause
>>>> significant pain in the rebase of the follow-on series for no improved
>>>> code clarity.
>>>
>>> Sorry, then an incremental patch undoing the rename that happened (with
>>> appropriate justification) will need proposing - the patch here has gone
>>> in already.
>>
>> Coming from a Linux background, ramdisk seemed more natural to me.  But 
>> looking at hvm_start_info, the fields are called module there.  And 
>> since we shouldn't tie this to the Linux naming, the more generic 
>> "module" name seemed fine to me.
> 
> Again, as I have stated, ramdisk is not a Linux only concept. In fact, 
> as Jan points out, initrd/initramfs are Linux specific implementations 
> of a ramdisk for which Xen doesn't even fully support. I am inclined to 
> ask the inverse of why hvm_start_info uses the name module. But that 
> aside, let's consider the fact that the field is only populated by the 
> device tree when a module type of BOOTMOD_RAMDISK is matched. And all 
> the uses of the field are when its value is stored into a local variable 
> called initrd.
> 
> Though the biggest irony is that generally obtuse abstraction are 
> routinely blocked unless there is a tangible future case. Yet none was 
> offered in the comment. Thus on that principle alone, a request for a 
> tangible future use should have been requested and provided for the 
> change to be considered.

Does it even need to be a _future_ use here? Aren't you working on
abstracting domain creation, suitable (in principle) for all architectures?
Isn't therefore a more generic name (as "module" is) preferable over a more
specific one?

Jan


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To: Jan Beulich , Alejandro Vallejo 
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 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 4/10/25 08:03, Jan Beulich wrote:
> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>> @@ -212,6 +213,39 @@ static int __init process_domain_node(
>>               else
>>                   printk("PV\n");
>>           }
>> +        else if ( strncmp(prop_name, "memory", name_len) == 0 )
>> +        {
>> +            uint64_t kb;
>> +            if ( fdt_prop_as_u64(prop, &kb) != 0 )
> 
> Nit (you know what I have to say here, and again below.)
> 
>> +            {
>> +                printk("  failed processing memory for domain %s\n", name);
>> +                return -EINVAL;
> 
> Any reason to override fdt_prop_as_u64()'s return value here?
> 

IMHO this should be a function that libfdt should provide, but altering 
libftd directly would make uprev'ing it challenging. The least I could 
do is make the function behave like the rest of libfdt's helper functions.

v/r,
dps




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Subject: Re: [PATCH v3 13/16] x86/hyperlaunch: specify dom0 mode with device
 tree
To: "Daniel P. Smith" 
Cc: Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini ,
 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 xen-devel@lists.xenproject.org, Alejandro Vallejo 
References: <20250408160802.49870-1-agarciav@amd.com>
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On 16.04.2025 15:32, Daniel P. Smith wrote:
> On 4/10/25 07:57, Jan Beulich wrote:
>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>> --- a/xen/arch/x86/domain-builder/fdt.c
>>> +++ b/xen/arch/x86/domain-builder/fdt.c
>>> @@ -193,6 +193,25 @@ static int __init process_domain_node(
>>>               bd->domid = (domid_t)val;
>>>               printk("  domid: %d\n", bd->domid);
>>>           }
>>> +        else if ( strncmp(prop_name, "mode", name_len) == 0 )
>>> +        {
>>> +            if ( fdt_prop_as_u32(prop, &bd->mode) != 0 )
>>> +            {
>>> +                printk("  failed processing mode for domain %s\n", name);
>>> +                return -EINVAL;
>>> +            }
>>> +
>>> +            printk("  mode: ");
>>> +            if ( !(bd->mode & BUILD_MODE_PARAVIRT) )
>>> +            {
>>> +                if ( bd->mode & BUILD_MODE_ENABLE_DM )
>>> +                    printk("HVM\n");
>>> +                else
>>> +                    printk("PVH\n");
>>> +            }
>>> +            else
>>> +                printk("PV\n");
>>> +        }
>>
>> My prior questions here remain: What's the significance of
>> BUILD_MODE_ENABLE_DM when set alongside BUILD_MODE_PARAVIRT? What about
>> any of the other bits being set?
> 
>  From boot-domain.h:
>                                            /* On     | Off    */
> #define BUILD_MODE_PARAVIRT      (1 << 0) /* PV     | PVH/HVM */
> #define BUILD_MODE_ENABLE_DM     (1 << 1) /* HVM    | PVH     */
> 
> The logic says, if BUILD_MODE_PARAVIRT bit is not set, thus an HVM 
> domain, check if BUILD_MODE_ENABLE_DM has been set. This is determin if 
> the domain is what the toolstack differentiates as either an HVM or PVH 
> domain. As you should know, there is no case of a PV domain requiring a 
> backing device mode (DM) domain. IOW, BUILD_MODE_ENABLE_DM is only 
> relevant to an HVM domain.

And hence should (my conclusion) never be set for a PV one.

Except - how wide or narrow do you mean "DM"? There are certainly cases
where a PV guest requires a qemu to serve as backend for one or more
devices. That's not what "DM" originally meant, but it goes in that
direction. Hence just to avoid such an ambiguity I think it's better to
properly reject any flags / flag combinations that we can't make sense
of.

Jan


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Subject: Re: [PATCH v3 14/16] x86/hyperlaunch: add memory parsing to domain
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To: "Daniel P. Smith" 
Cc: Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini ,
 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Julien Grall , Bertrand Marquis ,
 xen-devel@lists.xenproject.org, Alejandro Vallejo 
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On 16.04.2025 15:37, Daniel P. Smith wrote:
> On 4/10/25 08:03, Jan Beulich wrote:
>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>> @@ -212,6 +213,39 @@ static int __init process_domain_node(
>>>               else
>>>                   printk("PV\n");
>>>           }
>>> +        else if ( strncmp(prop_name, "memory", name_len) == 0 )
>>> +        {
>>> +            uint64_t kb;
>>> +            if ( fdt_prop_as_u64(prop, &kb) != 0 )
>>
>> Nit (you know what I have to say here, and again below.)
>>
>>> +            {
>>> +                printk("  failed processing memory for domain %s\n", name);
>>> +                return -EINVAL;
>>
>> Any reason to override fdt_prop_as_u64()'s return value here?
> 
> IMHO this should be a function that libfdt should provide, but altering 
> libftd directly would make uprev'ing it challenging. The least I could 
> do is make the function behave like the rest of libfdt's helper functions.

How's this related to the question that I raised? I didn't question the
function, but a particular aspect of the specific use that is being made
of it here.

Jan


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To: Jan Beulich , Alejandro Vallejo 
Cc: Jason Andryuk ,
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 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 4/10/25 08:08, Jan Beulich wrote:
> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>> From: "Daniel P. Smith" 
>>
>> Introduce the `cpus` property, named as such for dom0less compatibility, that
>> represents the maximum number of vpcus to allocate for a domain. In the device
> 
> Nit: vcpus

I agree with you here, the issue is that it was requested that we keep 
this field in line with Arm's DT, and they unfortunately used `cpus` to 
specify the vcpu allocation.

>> --- a/xen/arch/x86/domain-builder/fdt.c
>> +++ b/xen/arch/x86/domain-builder/fdt.c
>> @@ -246,6 +246,17 @@ static int __init process_domain_node(
>>               bd->max_pages = PFN_DOWN(kb * SZ_1K);
>>               printk("  max memory: %ld kb\n", kb);
>>           }
>> +        else if ( strncmp(prop_name, "cpus", name_len) == 0 )
>> +        {
>> +            uint32_t val = UINT_MAX;
>> +            if ( fdt_prop_as_u32(prop, &val) != 0 )
> 
> And again the same nit.
> 
>> +            {
>> +                printk("  failed processing max_vcpus for domain %s\n", name);
> 
> There's no "max_vcpus" being processed here; that purely ...
> 
>> +                return -EINVAL;
>> +            }
>> +            bd->max_vcpus = val;
> 
> ... the internal name we use for the struct field etc. The user observing the
> message ought to be able to easily associate it back with the DT item.
> 
> Jan



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For the X86EMUL_EXCEPTION case the repeat count must be correctly
propagated back. Since for the recursive invocation we use a local
helper variable, its value needs copying to the caller's one.

While there also correct the off-by-1 range in the comment ahead of the
function (strictly speaking for the "DF set" case we'd need to put
another, different range there as well).

Fixes: 53f87c03b4ea ("x86emul: generalize exception handling for rep_* hooks")
Reported-by: Manuel Andreas 
Signed-off-by: Jan Beulich 

--- a/xen/arch/x86/hvm/emulate.c
+++ b/xen/arch/x86/hvm/emulate.c
@@ -825,7 +825,7 @@ static void hvmemul_unmap_linear_addr(
 
 /*
  * Convert addr from linear to physical form, valid over the range
- * [addr, addr + *reps * bytes_per_rep]. *reps is adjusted according to
+ * [addr, addr + *reps * bytes_per_rep). *reps is adjusted according to
  * the valid computed range. It is always >0 when X86EMUL_OKAY is returned.
  * @pfec indicates the access checks to be performed during page-table walks.
  */
@@ -865,7 +865,10 @@ static int hvmemul_linear_to_phys(
         int rc = hvmemul_linear_to_phys(
             addr, &_paddr, bytes_per_rep, &one_rep, pfec, hvmemul_ctxt);
         if ( rc != X86EMUL_OKAY )
+        {
+            *reps = one_rep;
             return rc;
+        }
         pfn = _paddr >> PAGE_SHIFT;
     }
     else if ( (pfn = paging_gva_to_gfn(curr, addr, &pfec)) == gfn_x(INVALID_GFN) )


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Subject: Re: Assert in x86_emulate_wrapper triggerable by HVM domain
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On 15.04.2025 23:52, Manuel Andreas wrote:
> my fuzzing infrastructure discovered that an assert in 
> x86_emulate_wrapper is able to be triggered by an HVM domain executing a 
> specially crafted repeating movs instruction.
> 
> Specifically, if the emulation of the rep movs instruction triggers an 
> exception (e.g. by accessing invalid memory after some amount of 
> iterations), the emulation will be halted at that point.
> However, the instruction manual requires that _some_ register state 
> (namely the updated value of rcx) shall be commited, whereas the 
> instruction pointer needs to be rolled back to point to the address of 
> the instruction itself. The assert checks for the latter. Problematic is 
> the fact that for these type of repeating instructions, Xen seems to 
> eventually just commit all register state when it encounters an exception:

If my analysis is correct, none of this matters here; the core emulator
is working correctly. Hence also why the in-tree fuzzer wouldn't have
caught it. Would you please give the patch a try that I just sent, with
Cc to you (sorry, the list archive didn't pick it up yet, hence no link)?

Jan

>     557  #define put_rep_prefix(reps_completed) 
> ({                               \
>     558      if ( rep_prefix() 
> )                                                 \
>     559 { \
>     560          __put_rep_prefix(&_regs, ctxt->regs, ad_bytes, 
> reps_completed); \
>     561          if ( unlikely(rc == X86EMUL_EXCEPTION) 
> )                        \
>     562              goto 
> complete_insn;                                         \
>     563 } \
>     564  })
> 
>    8356   complete_insn: /* Commit shadow register state. */
>    8357      put_fpu(fpu_type, false, state, ctxt, ops);
>    8358      fpu_type = X86EMUL_FPU_none;
>    8359
>    8360      /* Zero the upper 32 bits of %rip if not in 64-bit mode. */
>    8361      if ( !mode_64bit() )
>    8362          _regs.r(ip) = (uint32_t)_regs.r(ip);
>    8363
>    8364      /* Should a singlestep #DB be raised? */
>    8365      if ( rc == X86EMUL_OKAY && singlestep && !ctxt->retire.mov_ss )
>    8366      {
>    8367          ctxt->retire.singlestep = true;
>    8368          ctxt->retire.sti = false;
>    8369      }
>    8370
>    8371      if ( rc != X86EMUL_DONE )
>    8372          *ctxt->regs = _regs; // <- Incorrect RIP is commited
> 
> I've attached an XTF test that should trigger the aforementioned assert 
> on the latest release commit: 3ad5d648cda5add395f49fc3704b2552aae734f7
> 
> Best,
> Manuel



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Date: Wed, 16 Apr 2025 15:53:25 +0200
From: Petr =?utf-8?B?VmFuxJtr?= 
To: Matthew Wilcox 
Cc: Juergen Gross , linux-kernel@vger.kernel.org,
	Kevin Brodsky ,
	Andrew Morton , linux-mm@kvack.org,
	x86@kernel.org, xen-devel@lists.xenproject.org,
	linux-arch@vger.kernel.org
Subject: Re: Regression from a9b3c355c2e6 ("asm-generic: pgalloc: provide
 generic __pgd_{alloc,free}") with CONFIG_DEBUG_VM_PGFLAGS=y and Xen
Message-ID: <2025416135325-Z_-2VTPsw81jMgCm-arkamar@atlas.cz>
References: <202541612720-Z_-deOZTOztMXHBh-arkamar@atlas.cz>
 
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On Wed, Apr 16, 2025 at 01:41:51PM +0100, Matthew Wilcox wrote:
> On Wed, Apr 16, 2025 at 02:07:20PM +0200, Petr Vaněk wrote:
> > I have discovered a regression introduced in commit a9b3c355c2e6
> > ("asm-generic: pgalloc: provide generic __pgd_{alloc,free}") [1,2] in
> > kernel version 6.14. The problem occurs when the x86 kernel is
> > configured with CONFIG_DEBUG_VM_PGFLAGS=y and is run as a PV Dom0 in Xen
> > 4.19.1. During the startup, the kernel panics with the error log below.
> 
> You also have to have CONFIG_MITIGATION_PAGE_TABLE_ISOLATION enabled
> to hit this problem, otherwise we allocate an order-0 page.

Indeed, the issue disappears when I disable
CONFIG_MITIGATION_PAGE_TABLE_ISOLATION.

> > The commit changed PGD allocation path.  In the new implementation
> > _pgd_alloc allocates memory with __pgd_alloc, which indirectly calls 
> > 
> >   alloc_pages_noprof(gfp | __GFP_COMP, order);
> > 
> > This is in contrast to the old behavior, where __get_free_pages was
> > used, which indirectly called
> > 
> >   alloc_pages_noprof(gfp_mask & ~__GFP_HIGHMEM, order);
> > 
> > The key difference is that the new allocator can return a compound page.
> > When xen_pin_page is later called on such a page, it call
> > TestSetPagePinned function, which internally uses the PF_NO_COMPOUND
> > macro. This macro enforces VM_BUG_ON_PGFLAGS if PageCompound is true,
> > triggering the panic when CONFIG_DEBUG_VM_PGFLAGS is enabled.
> 
> I suspect the right thing to do here is to change the PF_NO_COMPOUND to
> PF_HEAD.  Probably for all of these:
> 
> /* Xen */
> PAGEFLAG(Pinned, pinned, PF_NO_COMPOUND)
>         TESTSCFLAG(Pinned, pinned, PF_NO_COMPOUND)
> PAGEFLAG(SavePinned, savepinned, PF_NO_COMPOUND);
> PAGEFLAG(Foreign, foreign, PF_NO_COMPOUND);
> PAGEFLAG(XenRemapped, xen_remapped, PF_NO_COMPOUND)
>         TESTCLEARFLAG(XenRemapped, xen_remapped, PF_NO_COMPOUND)
> 
> Could you give that a try?

Yes, I could. Changing PF_NO_COMPOUND to PF_HEAD in those lines resolves
the issue for me.

Petr


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Date: Wed, 16 Apr 2025 15:53:35 +0200
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Subject: Re: Assert in x86_emulate_wrapper triggerable by HVM domain
From: Jan Beulich 
To: Manuel Andreas 
Cc: xen-devel@lists.xenproject.org
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On 16.04.2025 15:52, Jan Beulich wrote:
> On 15.04.2025 23:52, Manuel Andreas wrote:
>> my fuzzing infrastructure discovered that an assert in 
>> x86_emulate_wrapper is able to be triggered by an HVM domain executing a 
>> specially crafted repeating movs instruction.
>>
>> Specifically, if the emulation of the rep movs instruction triggers an 
>> exception (e.g. by accessing invalid memory after some amount of 
>> iterations), the emulation will be halted at that point.
>> However, the instruction manual requires that _some_ register state 
>> (namely the updated value of rcx) shall be commited, whereas the 
>> instruction pointer needs to be rolled back to point to the address of 
>> the instruction itself. The assert checks for the latter. Problematic is 
>> the fact that for these type of repeating instructions, Xen seems to 
>> eventually just commit all register state when it encounters an exception:
> 
> If my analysis is correct, none of this matters here; the core emulator
> is working correctly. Hence also why the in-tree fuzzer wouldn't have
> caught it. Would you please give the patch a try that I just sent, with
> Cc to you (sorry, the list archive didn't pick it up yet, hence no link)?

https://lists.xen.org/archives/html/xen-devel/2025-04/msg01283.html



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Date: Wed, 16 Apr 2025 14:54:47 +0100
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CC: Jason Andryuk , Xenia Ragiadakou
	, Stefano Stabellini ,
	Michal Orzel , Andrew Cooper
	, =?utf-8?q?Roger_Pau_Monn=C3=A9?=
	, 
Subject: Re: [PATCH v3 15/16] x86/hyperlaunch: add max vcpu parsing of
 hyperlaunch device tree
From: Alejandro Vallejo 
To: "Daniel P. Smith" , Jan Beulich
	
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On Wed Apr 16, 2025 at 2:42 PM BST, Daniel P. Smith wrote:
>
> On 4/10/25 08:08, Jan Beulich wrote:
>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>> From: "Daniel P. Smith" 
>>>
>>> Introduce the `cpus` property, named as such for dom0less compatibility=
, that
>>> represents the maximum number of vpcus to allocate for a domain. In the=
 device
                                       ^
                                       |
				     "vcpus"

>>=20
>> Nit: vcpus
>
> I agree with you here, the issue is that it was requested that we keep=20
> this field in line with Arm's DT, and they unfortunately used `cpus` to=
=20
> specify the vcpu allocation.

He meant in the commit message. There's a typo.

Cheers,
Alejandro


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On 16.04.2025 15:42, Daniel P. Smith wrote:
> 
> On 4/10/25 08:08, Jan Beulich wrote:
>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>> From: "Daniel P. Smith" 
>>>
>>> Introduce the `cpus` property, named as such for dom0less compatibility, that
>>> represents the maximum number of vpcus to allocate for a domain. In the device
>>
>> Nit: vcpus
> 
> I agree with you here, the issue is that it was requested that we keep 
> this field in line with Arm's DT, and they unfortunately used `cpus` to 
> specify the vcpu allocation.

You misunderstood, I think. The comment was on the mis-spelling in the latter
of the quoted lines.

Jan


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V/r,
Daniel P. Smith
Apertus Solutions, LLC

On 4/16/25 09:33, Jan Beulich wrote:
> On 16.04.2025 15:02, Daniel P. Smith wrote:
>> On 4/10/25 16:56, Jason Andryuk wrote:
>>> On 2025-04-10 11:01, Jan Beulich wrote:
>>>> On 10.04.2025 15:09, Daniel P. Smith wrote:
>>>>> On 4/9/25 02:24, Jan Beulich wrote:
>>>>>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>>>>>> From: "Daniel P. Smith" 
>>>>>>>
>>>>>>> To begin moving toward allowing the hypervisor to construct more
>>>>>>> than one
>>>>>>> domain at boot, a container is needed for a domain's build
>>>>>>> information.
>>>>>>> Introduce a new header, , that contains the
>>>>>>> initial
>>>>>>> struct boot_domain that encapsulate the build information for a
>>>>>>> domain.
>>>>>>>
>>>>>>> Add a kernel and ramdisk boot module reference along with a struct
>>>>>>> domain
>>>>>>> reference to the new struct boot_domain. This allows a struct
>>>>>>> boot_domain
>>>>>>> reference to be the only parameter necessary to pass down through
>>>>>>> the domain
>>>>>>> construction call chain.
>>>>>>>
>>>>>>> Signed-off-by: Daniel P. Smith 
>>>>>>> Reviewed-by: Jason Andryuk 
>>>>>>
>>>>>> Acked-by: Jan Beulich 
>>>>>
>>>>> I have to object because the meaningless rename is going cause
>>>>> significant pain in the rebase of the follow-on series for no improved
>>>>> code clarity.
>>>>
>>>> Sorry, then an incremental patch undoing the rename that happened (with
>>>> appropriate justification) will need proposing - the patch here has gone
>>>> in already.
>>>
>>> Coming from a Linux background, ramdisk seemed more natural to me.  But
>>> looking at hvm_start_info, the fields are called module there.  And
>>> since we shouldn't tie this to the Linux naming, the more generic
>>> "module" name seemed fine to me.
>>
>> Again, as I have stated, ramdisk is not a Linux only concept. In fact,
>> as Jan points out, initrd/initramfs are Linux specific implementations
>> of a ramdisk for which Xen doesn't even fully support. I am inclined to
>> ask the inverse of why hvm_start_info uses the name module. But that
>> aside, let's consider the fact that the field is only populated by the
>> device tree when a module type of BOOTMOD_RAMDISK is matched. And all
>> the uses of the field are when its value is stored into a local variable
>> called initrd.
>>
>> Though the biggest irony is that generally obtuse abstraction are
>> routinely blocked unless there is a tangible future case. Yet none was
>> offered in the comment. Thus on that principle alone, a request for a
>> tangible future use should have been requested and provided for the
>> change to be considered.
> 
> Does it even need to be a _future_ use here? Aren't you working on
> abstracting domain creation, suitable (in principle) for all architectures?
> Isn't therefore a more generic name (as "module" is) preferable over a more
> specific one?

Yes we are trying to build a future capability, but my point is let's 
consider all possible known OS's start up today. What other boot module 
could potentially be passed in that is exclusive of a ramdisk, thus 
allowing a multiplex of the field. And the answer is none. The other 
potential modules that could be passed in will need to be able to be 
coexist with a ramdisk module being passed. The immediate examples I can 
point to are, an SELinux policy file or a guest device tree. I'm not too 
familiar, perhaps a Zephyr guest may only take a guest DT, but a Linux 
guest may take an initrd and a DT.

v/r,
dps




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Date: Wed, 16 Apr 2025 16:03:07 +0200
MIME-Version: 1.0
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Subject: Re: [PATCH v6 05/15] xen/decompressors: Remove use of *_to_cpup()
 helpers
To: Andrew Cooper 
Cc: Lin Liu , Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Volodymyr Babchuk ,
 Bertrand Marquis ,
 Shawn Anastasio ,
 Oleksii Kurochko ,
 "Daniel P . Smith" ,
 Xen-devel 
References: <20250416115900.2491661-1-andrew.cooper3@citrix.com>
 <20250416115900.2491661-6-andrew.cooper3@citrix.com>
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On 16.04.2025 13:58, Andrew Cooper wrote:
> From: Lin Liu 
> 
> These wrappers simply hide a deference, which adds to the cognitive complexity
> of reading the code.  As such, they're not going to be included in the new
> byteswap infrastructure.
> 
> No functional change.
> 
> Signed-off-by: Lin Liu 
> Signed-off-by: Andrew Cooper 

Reviewed-by: Jan Beulich  # hypervisor
with a request below.

> --- a/tools/libs/guest/xg_dom_decompress_unsafe_xz.c
> +++ b/tools/libs/guest/xg_dom_decompress_unsafe_xz.c
> @@ -19,18 +19,19 @@ typedef uint32_t __le32;
>  static inline u32 cpu_to_le32(const u32 v)
>  {
>  #if BYTE_ORDER == BIG_ENDIAN
> -	return (((v & 0x000000ffUL) << 24) |
> -	        ((v & 0x0000ff00UL) <<  8) |
> -	        ((v & 0x00ff0000UL) >>  8) |
> -	        ((v & 0xff000000UL) >> 24));
> +        return __builtin_bswap32(v);

Supposedly a hard tab is to be used for indentation here, if original code
and ...

>  #else
>  	return v;

... this is to be trusted.

>  #endif
>  }
>  
> -static inline u32 le32_to_cpup(const u32 *p)
> +static inline u32 le32_to_cpu(const u32 p)
>  {
> -	return cpu_to_le32(*p);
> +#if BYTE_ORDER == BIG_ENDIAN
> +        return __builtin_bswap32(v);
> +#else
> +	return v;
> +#endif
>  }

Same here.

> --- a/xen/common/lz4/defs.h
> +++ b/xen/common/lz4/defs.h
> @@ -18,7 +18,11 @@
>  
>  static inline u16 get_unaligned_le16(const void *p)
>  {
> -	return le16_to_cpup(p);
> +	u16 v;

Here and below - I realize there's u16 in context (u32 elsewhere), yet it would
still be nice if no new instances appeared and you used uint16_t here (and
uint32_t in the other cases).

Jan


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Subject: Re: [PATCH v3 01/16] x86/boot: introduce boot domain
To: "Daniel P. Smith" 
Cc: Xenia Ragiadakou ,
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 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 16.04.2025 16:00, Daniel P. Smith wrote:
> 
> 
> V/r,
> Daniel P. Smith
> Apertus Solutions, LLC
> 
> On 4/16/25 09:33, Jan Beulich wrote:
>> On 16.04.2025 15:02, Daniel P. Smith wrote:
>>> On 4/10/25 16:56, Jason Andryuk wrote:
>>>> On 2025-04-10 11:01, Jan Beulich wrote:
>>>>> On 10.04.2025 15:09, Daniel P. Smith wrote:
>>>>>> On 4/9/25 02:24, Jan Beulich wrote:
>>>>>>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>>>>>>> From: "Daniel P. Smith" 
>>>>>>>>
>>>>>>>> To begin moving toward allowing the hypervisor to construct more
>>>>>>>> than one
>>>>>>>> domain at boot, a container is needed for a domain's build
>>>>>>>> information.
>>>>>>>> Introduce a new header, , that contains the
>>>>>>>> initial
>>>>>>>> struct boot_domain that encapsulate the build information for a
>>>>>>>> domain.
>>>>>>>>
>>>>>>>> Add a kernel and ramdisk boot module reference along with a struct
>>>>>>>> domain
>>>>>>>> reference to the new struct boot_domain. This allows a struct
>>>>>>>> boot_domain
>>>>>>>> reference to be the only parameter necessary to pass down through
>>>>>>>> the domain
>>>>>>>> construction call chain.
>>>>>>>>
>>>>>>>> Signed-off-by: Daniel P. Smith 
>>>>>>>> Reviewed-by: Jason Andryuk 
>>>>>>>
>>>>>>> Acked-by: Jan Beulich 
>>>>>>
>>>>>> I have to object because the meaningless rename is going cause
>>>>>> significant pain in the rebase of the follow-on series for no improved
>>>>>> code clarity.
>>>>>
>>>>> Sorry, then an incremental patch undoing the rename that happened (with
>>>>> appropriate justification) will need proposing - the patch here has gone
>>>>> in already.
>>>>
>>>> Coming from a Linux background, ramdisk seemed more natural to me.  But
>>>> looking at hvm_start_info, the fields are called module there.  And
>>>> since we shouldn't tie this to the Linux naming, the more generic
>>>> "module" name seemed fine to me.
>>>
>>> Again, as I have stated, ramdisk is not a Linux only concept. In fact,
>>> as Jan points out, initrd/initramfs are Linux specific implementations
>>> of a ramdisk for which Xen doesn't even fully support. I am inclined to
>>> ask the inverse of why hvm_start_info uses the name module. But that
>>> aside, let's consider the fact that the field is only populated by the
>>> device tree when a module type of BOOTMOD_RAMDISK is matched. And all
>>> the uses of the field are when its value is stored into a local variable
>>> called initrd.
>>>
>>> Though the biggest irony is that generally obtuse abstraction are
>>> routinely blocked unless there is a tangible future case. Yet none was
>>> offered in the comment. Thus on that principle alone, a request for a
>>> tangible future use should have been requested and provided for the
>>> change to be considered.
>>
>> Does it even need to be a _future_ use here? Aren't you working on
>> abstracting domain creation, suitable (in principle) for all architectures?
>> Isn't therefore a more generic name (as "module" is) preferable over a more
>> specific one?
> 
> Yes we are trying to build a future capability, but my point is let's 
> consider all possible known OS's start up today. What other boot module 
> could potentially be passed in that is exclusive of a ramdisk, thus 
> allowing a multiplex of the field. And the answer is none.

Is it? What if you are to start a nested Xen with its own kernel, initrd
and perhaps even an XSM policy "module"? Or anything else that is multi-
module capable (possibly but not necessarily because of having started
out as multiboot)?

Jan


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To: Jan Beulich 
Cc: Jason Andryuk ,
 Xenia Ragiadakou ,
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 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 xen-devel@lists.xenproject.org, Alejandro Vallejo 
References: <20250408160802.49870-1-agarciav@amd.com>
 <20250408160802.49870-14-agarciav@amd.com>
 <7a13e61b-8568-4852-bb46-974964e02d61@suse.com>
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On 4/16/25 09:38, Jan Beulich wrote:
> On 16.04.2025 15:32, Daniel P. Smith wrote:
>> On 4/10/25 07:57, Jan Beulich wrote:
>>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>>> --- a/xen/arch/x86/domain-builder/fdt.c
>>>> +++ b/xen/arch/x86/domain-builder/fdt.c
>>>> @@ -193,6 +193,25 @@ static int __init process_domain_node(
>>>>                bd->domid = (domid_t)val;
>>>>                printk("  domid: %d\n", bd->domid);
>>>>            }
>>>> +        else if ( strncmp(prop_name, "mode", name_len) == 0 )
>>>> +        {
>>>> +            if ( fdt_prop_as_u32(prop, &bd->mode) != 0 )
>>>> +            {
>>>> +                printk("  failed processing mode for domain %s\n", name);
>>>> +                return -EINVAL;
>>>> +            }
>>>> +
>>>> +            printk("  mode: ");
>>>> +            if ( !(bd->mode & BUILD_MODE_PARAVIRT) )
>>>> +            {
>>>> +                if ( bd->mode & BUILD_MODE_ENABLE_DM )
>>>> +                    printk("HVM\n");
>>>> +                else
>>>> +                    printk("PVH\n");
>>>> +            }
>>>> +            else
>>>> +                printk("PV\n");
>>>> +        }
>>>
>>> My prior questions here remain: What's the significance of
>>> BUILD_MODE_ENABLE_DM when set alongside BUILD_MODE_PARAVIRT? What about
>>> any of the other bits being set?
>>
>>   From boot-domain.h:
>>                                             /* On     | Off    */
>> #define BUILD_MODE_PARAVIRT      (1 << 0) /* PV     | PVH/HVM */
>> #define BUILD_MODE_ENABLE_DM     (1 << 1) /* HVM    | PVH     */
>>
>> The logic says, if BUILD_MODE_PARAVIRT bit is not set, thus an HVM
>> domain, check if BUILD_MODE_ENABLE_DM has been set. This is determin if
>> the domain is what the toolstack differentiates as either an HVM or PVH
>> domain. As you should know, there is no case of a PV domain requiring a
>> backing device mode (DM) domain. IOW, BUILD_MODE_ENABLE_DM is only
>> relevant to an HVM domain.
> 
> And hence should (my conclusion) never be set for a PV one.

Yes and?

> Except - how wide or narrow do you mean "DM"? There are certainly cases
> where a PV guest requires a qemu to serve as backend for one or more
> devices. That's not what "DM" originally meant, but it goes in that
> direction. Hence just to avoid such an ambiguity I think it's better to
> properly reject any flags / flag combinations that we can't make sense
> of.

OpenXT has done this for since it was XenClientXT, and those are driver 
domains. We do distinguish between the two because a device model domain 
is specific to provide the larger core device plane to a domain. While a 
driver domain is a much narrower scope of providing a specific emulated 
hardware device to one or more domains. As a result, they have totally 
different security policies applied to them.

v/r,
dps


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Subject: Re: [PATCH v3 14/16] x86/hyperlaunch: add memory parsing to domain
 config
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To: Jan Beulich 
Cc: Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini ,
 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Julien Grall , Bertrand Marquis ,
 xen-devel@lists.xenproject.org, Alejandro Vallejo 
References: <20250408160802.49870-1-agarciav@amd.com>
 <20250408160802.49870-15-agarciav@amd.com>
 
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V/r,
Daniel P. Smith
Apertus Solutions, LLC

On 4/16/25 09:41, Jan Beulich wrote:
> On 16.04.2025 15:37, Daniel P. Smith wrote:
>> On 4/10/25 08:03, Jan Beulich wrote:
>>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>>> @@ -212,6 +213,39 @@ static int __init process_domain_node(
>>>>                else
>>>>                    printk("PV\n");
>>>>            }
>>>> +        else if ( strncmp(prop_name, "memory", name_len) == 0 )
>>>> +        {
>>>> +            uint64_t kb;
>>>> +            if ( fdt_prop_as_u64(prop, &kb) != 0 )
>>>
>>> Nit (you know what I have to say here, and again below.)
>>>
>>>> +            {
>>>> +                printk("  failed processing memory for domain %s\n", name);
>>>> +                return -EINVAL;
>>>
>>> Any reason to override fdt_prop_as_u64()'s return value here?
>>
>> IMHO this should be a function that libfdt should provide, but altering
>> libftd directly would make uprev'ing it challenging. The least I could
>> do is make the function behave like the rest of libfdt's helper functions.
> 
> How's this related to the question that I raised? I didn't question the
> function, but a particular aspect of the specific use that is being made
> of it here.

Your question was, "Any reason to override fdt_prop_as_u64()'s return 
value here?"

And my answer was, I copied libfdt's behavior for its helper functions. 
IOW, to have the helper behave like libfdt's other helper functions.

v/r,
dps


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To: Alejandro Vallejo , Jan Beulich 
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 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 4/16/25 09:54, Alejandro Vallejo wrote:
> On Wed Apr 16, 2025 at 2:42 PM BST, Daniel P. Smith wrote:
>>
>> On 4/10/25 08:08, Jan Beulich wrote:
>>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>>> From: "Daniel P. Smith" 
>>>>
>>>> Introduce the `cpus` property, named as such for dom0less compatibility, that
>>>> represents the maximum number of vpcus to allocate for a domain. In the device
>                                         ^
>                                         |
> 				     "vcpus"
> 
>>>
>>> Nit: vcpus
>>
>> I agree with you here, the issue is that it was requested that we keep
>> this field in line with Arm's DT, and they unfortunately used `cpus` to
>> specify the vcpu allocation.
> 
> He meant in the commit message. There's a typo.

Right, so I guess my response should have been further down. He points 
it out as a nit the second time, and then his final comment led me to 
believe he was raising an issue with vcpu vs cpu and not just the typo.

v/r,
dps



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To: Jan Beulich 
Cc: Jason Andryuk ,
 Xenia Ragiadakou ,
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 Michal Orzel ,
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 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 4/16/25 09:54, Jan Beulich wrote:
> On 16.04.2025 15:42, Daniel P. Smith wrote:
>>
>> On 4/10/25 08:08, Jan Beulich wrote:
>>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>>> From: "Daniel P. Smith" 
>>>>
>>>> Introduce the `cpus` property, named as such for dom0less compatibility, that
>>>> represents the maximum number of vpcus to allocate for a domain. In the device
>>>
>>> Nit: vcpus
>>
>> I agree with you here, the issue is that it was requested that we keep
>> this field in line with Arm's DT, and they unfortunately used `cpus` to
>> specify the vcpu allocation.
> 
> You misunderstood, I think. The comment was on the mis-spelling in the latter
> of the quoted lines.
> 

Then your latter comment is that you want the internal field to be 
renamed to cpu? Wouldn't that create further confusion of a physical cpu 
assignment vs virtual cpu allocation?

v/r,
dps



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Subject: Re: [PATCH v3 13/16] x86/hyperlaunch: specify dom0 mode with device
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To: "Daniel P. Smith" 
Cc: Jason Andryuk ,
 Xenia Ragiadakou ,
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 Michal Orzel ,
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 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 16.04.2025 16:09, Daniel P. Smith wrote:
> On 4/16/25 09:38, Jan Beulich wrote:
>> On 16.04.2025 15:32, Daniel P. Smith wrote:
>>> On 4/10/25 07:57, Jan Beulich wrote:
>>>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>>>> --- a/xen/arch/x86/domain-builder/fdt.c
>>>>> +++ b/xen/arch/x86/domain-builder/fdt.c
>>>>> @@ -193,6 +193,25 @@ static int __init process_domain_node(
>>>>>                bd->domid = (domid_t)val;
>>>>>                printk("  domid: %d\n", bd->domid);
>>>>>            }
>>>>> +        else if ( strncmp(prop_name, "mode", name_len) == 0 )
>>>>> +        {
>>>>> +            if ( fdt_prop_as_u32(prop, &bd->mode) != 0 )
>>>>> +            {
>>>>> +                printk("  failed processing mode for domain %s\n", name);
>>>>> +                return -EINVAL;
>>>>> +            }
>>>>> +
>>>>> +            printk("  mode: ");
>>>>> +            if ( !(bd->mode & BUILD_MODE_PARAVIRT) )
>>>>> +            {
>>>>> +                if ( bd->mode & BUILD_MODE_ENABLE_DM )
>>>>> +                    printk("HVM\n");
>>>>> +                else
>>>>> +                    printk("PVH\n");
>>>>> +            }
>>>>> +            else
>>>>> +                printk("PV\n");
>>>>> +        }
>>>>
>>>> My prior questions here remain: What's the significance of
>>>> BUILD_MODE_ENABLE_DM when set alongside BUILD_MODE_PARAVIRT? What about
>>>> any of the other bits being set?
>>>
>>>   From boot-domain.h:
>>>                                             /* On     | Off    */
>>> #define BUILD_MODE_PARAVIRT      (1 << 0) /* PV     | PVH/HVM */
>>> #define BUILD_MODE_ENABLE_DM     (1 << 1) /* HVM    | PVH     */
>>>
>>> The logic says, if BUILD_MODE_PARAVIRT bit is not set, thus an HVM
>>> domain, check if BUILD_MODE_ENABLE_DM has been set. This is determin if
>>> the domain is what the toolstack differentiates as either an HVM or PVH
>>> domain. As you should know, there is no case of a PV domain requiring a
>>> backing device mode (DM) domain. IOW, BUILD_MODE_ENABLE_DM is only
>>> relevant to an HVM domain.
>>
>> And hence should (my conclusion) never be set for a PV one.
> 
> Yes and?

And it being wrongly set should be rejected, rather than silently ignored.

Jan


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Date: Wed, 16 Apr 2025 15:26:35 +0100
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CC: "xen-devel@lists.xenproject.org" ,
	Xen-devel 
Subject: Re: [ImageBuilder] uboot-script-gen: fix arm64 xen u-boot image
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From: Alejandro Vallejo 
To: Grygorii Strashko , Stefano Stabellini
	
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On Wed Apr 16, 2025 at 11:44 AM BST, Grygorii Strashko wrote:
>
>
> On 16.04.25 04:03, Stefano Stabellini wrote:
>> On Mon, 14 Apr 2025, Grygorii Strashko wrote:
>>> From: Grygorii Strashko 
>>>
>>> The current code in generate_uboot_images() does not detect arm64 prope=
rly
>>> and always generates ARM u-boot image. This causes Xen boot issues.
>>>
>>> Fix it by searching for "ARM64" for AArch64 binary detection.
>>>
>>> - mkimage -l xen.ub
>>> Before:
>>> Image Type:   ARM Linux Kernel Image (uncompressed)
>>>
>>> After:
>>> Image Type:   AArch64 Linux Kernel Image (uncompressed)
>>>
>>> Signed-off-by: Grygorii Strashko 
>>> ---
>>>   scripts/uboot-script-gen | 6 +++---
>>>   1 file changed, 3 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/scripts/uboot-script-gen b/scripts/uboot-script-gen
>>> index a9f698f00fd1..c4d26caf5e0e 100755
>>> --- a/scripts/uboot-script-gen
>>> +++ b/scripts/uboot-script-gen
>>> @@ -815,13 +815,13 @@ function linux_config()
>>>  =20
>>>   generate_uboot_images()
>>>   {
>>> -    local arch=3D$(file -L $XEN | grep "ARM")
>>> +    local arch=3D$(file -L $XEN | grep -o "ARM64")
>>=20
>> My file -L gives:
>>=20
>> for arm32: ARM OpenFirmware [...]
>> for arm64: Aarch64
>>=20
>> So the ARM64 grep wouldn't work as intended. Is the version of `file'
>> that you are using really printing ARM64?
>
> Hm, yes.
>
> 	file -L xen
> 	xen: Linux kernel ARM64 boot executable Image, little-endian, 4K pages
>
> 	file -v
> 	file-5.41
>
> u-boot boot command:
> 	 bootm 0x4EA00000 - 0x4EE00000
>
>
>   If so, we can do:
>>=20
>>    file -L $XEN | grep -E 'ARM64|Aarch64'
>
> sure. I'll update.

Missing escape? I think it's needed even with single quotes.

  file -L $XEN | grep -E 'ARM64\|Aarch64'

Cheers,
Alejandro


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To: "Daniel P. Smith" 
Cc: Jason Andryuk ,
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On 16.04.2025 16:12, Daniel P. Smith wrote:
> On 4/16/25 09:41, Jan Beulich wrote:
>> On 16.04.2025 15:37, Daniel P. Smith wrote:
>>> On 4/10/25 08:03, Jan Beulich wrote:
>>>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>>>> @@ -212,6 +213,39 @@ static int __init process_domain_node(
>>>>>                else
>>>>>                    printk("PV\n");
>>>>>            }
>>>>> +        else if ( strncmp(prop_name, "memory", name_len) == 0 )
>>>>> +        {
>>>>> +            uint64_t kb;
>>>>> +            if ( fdt_prop_as_u64(prop, &kb) != 0 )
>>>>
>>>> Nit (you know what I have to say here, and again below.)
>>>>
>>>>> +            {
>>>>> +                printk("  failed processing memory for domain %s\n", name);
>>>>> +                return -EINVAL;
>>>>
>>>> Any reason to override fdt_prop_as_u64()'s return value here?
>>>
>>> IMHO this should be a function that libfdt should provide, but altering
>>> libftd directly would make uprev'ing it challenging. The least I could
>>> do is make the function behave like the rest of libfdt's helper functions.
>>
>> How's this related to the question that I raised? I didn't question the
>> function, but a particular aspect of the specific use that is being made
>> of it here.
> 
> Your question was, "Any reason to override fdt_prop_as_u64()'s return 
> value here?"
> 
> And my answer was, I copied libfdt's behavior for its helper functions. 
> IOW, to have the helper behave like libfdt's other helper functions.

I'm sorry, but no. It meanwhile feels like you're intentionally
misunderstanding. We're in process_domain_node() here. That's not a libfdt-
like helper function? And the question was why this function throws away
the return value it got from fdt_prop_as_u64().

Jan


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Subject: Re: [PATCH v3 15/16] x86/hyperlaunch: add max vcpu parsing of
 hyperlaunch device tree
To: "Daniel P. Smith" 
Cc: Jason Andryuk ,
 Xenia Ragiadakou ,
 Stefano Stabellini ,
 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 xen-devel@lists.xenproject.org, Alejandro Vallejo 
References: <20250408160802.49870-1-agarciav@amd.com>
 <20250408160802.49870-16-agarciav@amd.com>
 
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On 16.04.2025 16:19, Daniel P. Smith wrote:
> On 4/16/25 09:54, Jan Beulich wrote:
>> On 16.04.2025 15:42, Daniel P. Smith wrote:
>>>
>>> On 4/10/25 08:08, Jan Beulich wrote:
>>>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>>>> From: "Daniel P. Smith" 
>>>>>
>>>>> Introduce the `cpus` property, named as such for dom0less compatibility, that
>>>>> represents the maximum number of vpcus to allocate for a domain. In the device
>>>>
>>>> Nit: vcpus
>>>
>>> I agree with you here, the issue is that it was requested that we keep
>>> this field in line with Arm's DT, and they unfortunately used `cpus` to
>>> specify the vcpu allocation.
>>
>> You misunderstood, I think. The comment was on the mis-spelling in the latter
>> of the quoted lines.
> 
> Then your latter comment is that you want the internal field to be 
> renamed to cpu?

No? Where are you taking that from? My comment was that a log message refers
to "max_vcpus", when no field / property of that name is being processed.
Going back to my reply (and seeing that Alejandro understood what I meant,
afaict) I see nothing ambiguous there at all.

In any event, ftaod, there were three entirely independent comments in my
original reply to that patch.

Jan

> Wouldn't that create further confusion of a physical cpu 
> assignment vs virtual cpu allocation?
> 
> v/r,
> dps
> 



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 Michal Orzel ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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V/r,
Daniel P. Smith
Apertus Solutions, LLC

On 4/16/25 10:06, Jan Beulich wrote:
> On 16.04.2025 16:00, Daniel P. Smith wrote:
>>
>>
>> V/r,
>> Daniel P. Smith
>> Apertus Solutions, LLC
>>
>> On 4/16/25 09:33, Jan Beulich wrote:
>>> On 16.04.2025 15:02, Daniel P. Smith wrote:
>>>> On 4/10/25 16:56, Jason Andryuk wrote:
>>>>> On 2025-04-10 11:01, Jan Beulich wrote:
>>>>>> On 10.04.2025 15:09, Daniel P. Smith wrote:
>>>>>>> On 4/9/25 02:24, Jan Beulich wrote:
>>>>>>>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>>>>>>>> From: "Daniel P. Smith" 
>>>>>>>>>
>>>>>>>>> To begin moving toward allowing the hypervisor to construct more
>>>>>>>>> than one
>>>>>>>>> domain at boot, a container is needed for a domain's build
>>>>>>>>> information.
>>>>>>>>> Introduce a new header, , that contains the
>>>>>>>>> initial
>>>>>>>>> struct boot_domain that encapsulate the build information for a
>>>>>>>>> domain.
>>>>>>>>>
>>>>>>>>> Add a kernel and ramdisk boot module reference along with a struct
>>>>>>>>> domain
>>>>>>>>> reference to the new struct boot_domain. This allows a struct
>>>>>>>>> boot_domain
>>>>>>>>> reference to be the only parameter necessary to pass down through
>>>>>>>>> the domain
>>>>>>>>> construction call chain.
>>>>>>>>>
>>>>>>>>> Signed-off-by: Daniel P. Smith 
>>>>>>>>> Reviewed-by: Jason Andryuk 
>>>>>>>>
>>>>>>>> Acked-by: Jan Beulich 
>>>>>>>
>>>>>>> I have to object because the meaningless rename is going cause
>>>>>>> significant pain in the rebase of the follow-on series for no improved
>>>>>>> code clarity.
>>>>>>
>>>>>> Sorry, then an incremental patch undoing the rename that happened (with
>>>>>> appropriate justification) will need proposing - the patch here has gone
>>>>>> in already.
>>>>>
>>>>> Coming from a Linux background, ramdisk seemed more natural to me.  But
>>>>> looking at hvm_start_info, the fields are called module there.  And
>>>>> since we shouldn't tie this to the Linux naming, the more generic
>>>>> "module" name seemed fine to me.
>>>>
>>>> Again, as I have stated, ramdisk is not a Linux only concept. In fact,
>>>> as Jan points out, initrd/initramfs are Linux specific implementations
>>>> of a ramdisk for which Xen doesn't even fully support. I am inclined to
>>>> ask the inverse of why hvm_start_info uses the name module. But that
>>>> aside, let's consider the fact that the field is only populated by the
>>>> device tree when a module type of BOOTMOD_RAMDISK is matched. And all
>>>> the uses of the field are when its value is stored into a local variable
>>>> called initrd.
>>>>
>>>> Though the biggest irony is that generally obtuse abstraction are
>>>> routinely blocked unless there is a tangible future case. Yet none was
>>>> offered in the comment. Thus on that principle alone, a request for a
>>>> tangible future use should have been requested and provided for the
>>>> change to be considered.
>>>
>>> Does it even need to be a _future_ use here? Aren't you working on
>>> abstracting domain creation, suitable (in principle) for all architectures?
>>> Isn't therefore a more generic name (as "module" is) preferable over a more
>>> specific one?
>>
>> Yes we are trying to build a future capability, but my point is let's
>> consider all possible known OS's start up today. What other boot module
>> could potentially be passed in that is exclusive of a ramdisk, thus
>> allowing a multiplex of the field. And the answer is none.
> 
> Is it? What if you are to start a nested Xen with its own kernel, initrd
> and perhaps even an XSM policy "module"? Or anything else that is multi-
> module capable (possibly but not necessarily because of having started
> out as multiboot)?

As you said on the v2 thread, just one other OS also using such a 
concept doesn't mean much.

With that said, as I am sure you are well aware of, the nested example 
is a far more complicated situation which there is currently no good 
abstraction in use.

And btw, as far as ramdisk usage goes, I would be remised not to mention 
that another significantly large OS uses a ramdisk for boot, and that 
would be Windows. Windows leverages a ramdisk as configuration store 
between the winlaoder and tcbloader when doing a DRTM boot.

v/r,
dps


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Subject: Re: [PATCH v2 2/2] xen/dm: arm: Introduce inject_msi2 DM op
To: Mykyta Poturai 
Cc: Anthony PERARD ,
 Juergen Gross , Andrew Cooper ,
 Julien Grall , Stefano Stabellini ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
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On 14.04.2025 11:51, Mykyta Poturai wrote:
> From: Mykyta Poturai 
> 
> Add the second version of inject_msi DM op, which allows to specify
> the source_id of an MSI interrupt. This is needed for correct MSI
> injection on ARM.

If this is about Arm, why does x86 also gain (incomplete) handling?

> @@ -539,6 +540,23 @@ int dm_op(const struct dmop_args *op_args)
>          break;
>      }
>  
> +    case XEN_DMOP_inject_msi2:
> +    {
> +        const struct xen_dm_op_inject_msi2 *data = &op.u.inject_msi2;
> +
> +        if ( data->pad || data->flags & ~XEN_DMOP_MSI_SOURCE_ID_VALID )

Nit: If the x86 code is to stay in the first place, parentheses please
around the & expression. Even if not, similar issues appear to exist
in the Arm code.

> +        {
> +            rc = -EINVAL;
> +            break;
> +        }
> +
> +        if ( data->flags & XEN_DMOP_MSI_SOURCE_ID_VALID )
> +            gprintk(XENLOG_WARNING "XEN_DMOP_inject_msi2: source_id is ignored\n");

Does this compile? It looks to me as if there was a missing comma.

> --- a/xen/include/public/hvm/dm_op.h
> +++ b/xen/include/public/hvm/dm_op.h
> @@ -444,6 +444,23 @@ struct xen_dm_op_nr_vcpus {
>  };
>  typedef struct xen_dm_op_nr_vcpus xen_dm_op_nr_vcpus_t;
>  
> +#define XEN_DMOP_inject_msi2 21
> +
> +struct xen_dm_op_inject_msi2 {
> +      /* IN - MSI data */
> +      uint32_t data;
> +      /* IN - next two fields form an ID of the device triggering the MSI */
> +      uint16_t segment; /* The segment number */
> +      uint16_t source_id; /* The source ID that is local to segment (PCI BDF) */
> +      /* IN - types of source ID */
> +      uint32_t flags;
> +#define XEN_DMOP_MSI_SOURCE_ID_VALID (1u << 0)

What purpose does this flag serve? IOW what's the value of using this
sub-op when one doesn't want to specify a source ID?

Jan


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Subject: Re: [PATCH v19 2/3] vpci: acquire d->pci_lock in I/O handlers
To: Stewart Hildebrand 
Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
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 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 15.04.2025 18:54, Stewart Hildebrand wrote:
> In preparation for translating virtual PCI bus topology (where a pdev
> lookup will be needed in the vPCI I/O handlers), acquire d->pci_lock in
> the vPCI I/O handlers.

I find it concerning that the locked regions (it's a domain-wide lock
after all) are further grown.

> --- a/xen/drivers/vpci/vpci.c
> +++ b/xen/drivers/vpci/vpci.c
> @@ -440,6 +440,8 @@ uint32_t vpci_read(pci_sbdf_t sbdf, unsigned int reg, unsigned int size)
>      unsigned int data_offset = 0;
>      uint32_t data = ~(uint32_t)0;
>  
> +    ASSERT(rw_is_locked(&d->pci_lock));
> +
>      if ( !size )
>      {
>          ASSERT_UNREACHABLE();
> @@ -452,15 +454,11 @@ uint32_t vpci_read(pci_sbdf_t sbdf, unsigned int reg, unsigned int size)
>       * If this is hwdom and the device is assigned to DomXEN, acquiring hwdom's
>       * pci_lock is sufficient.
>       */
> -    read_lock(&d->pci_lock);

The comment now becomes meaningless in its context.

> @@ -570,7 +569,6 @@ void vpci_write(pci_sbdf_t sbdf, unsigned int reg, unsigned int size,
>       * TODO: We need to take pci_locks in exclusive mode only if we
>       * are modifying BARs, so there is a room for improvement.
>       */
> -    write_lock(&d->pci_lock);

Same here.

Jan


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Subject: Re: [PATCH] x86/HVM: update repeat count upon nested lin->phys
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To: Jan Beulich ,
 "xen-devel@lists.xenproject.org" 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 16/04/2025 2:44 pm, Jan Beulich wrote:
> For the X86EMUL_EXCEPTION case the repeat count must be correctly
> propagated back. Since for the recursive invocation we use a local
> helper variable, its value needs copying to the caller's one.
>
> While there also correct the off-by-1 range in the comment ahead of the
> function (strictly speaking for the "DF set" case we'd need to put
> another, different range there as well).
>
> Fixes: 53f87c03b4ea ("x86emul: generalize exception handling for rep_* hooks")
> Reported-by: Manuel Andreas 
> Signed-off-by: Jan Beulich 

Reviewed-by: Andrew Cooper 

I really do hate everything about how *reps is handled in the emulator,
but this will have to do in the short term.


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Date: Wed, 16 Apr 2025 19:10:43 +0300
User-Agent: Mozilla Thunderbird
Subject: Re: [ImageBuilder] uboot-script-gen: fix arm64 xen u-boot image
 generation
To: Alejandro Vallejo ,
 Stefano Stabellini 
Cc: "xen-devel@lists.xenproject.org" ,
 Xen-devel 
References: <20250414081223.1763630-1-grygorii_strashko@epam.com>
 
 
 
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On 16.04.25 17:26, Alejandro Vallejo wrote:
> On Wed Apr 16, 2025 at 11:44 AM BST, Grygorii Strashko wrote:
>>
>>
>> On 16.04.25 04:03, Stefano Stabellini wrote:
>>> On Mon, 14 Apr 2025, Grygorii Strashko wrote:
>>>> From: Grygorii Strashko 
>>>>
>>>> The current code in generate_uboot_images() does not detect arm64 properly
>>>> and always generates ARM u-boot image. This causes Xen boot issues.
>>>>
>>>> Fix it by searching for "ARM64" for AArch64 binary detection.
>>>>
>>>> - mkimage -l xen.ub
>>>> Before:
>>>> Image Type:   ARM Linux Kernel Image (uncompressed)
>>>>
>>>> After:
>>>> Image Type:   AArch64 Linux Kernel Image (uncompressed)
>>>>
>>>> Signed-off-by: Grygorii Strashko 
>>>> ---
>>>>    scripts/uboot-script-gen | 6 +++---
>>>>    1 file changed, 3 insertions(+), 3 deletions(-)
>>>>
>>>> diff --git a/scripts/uboot-script-gen b/scripts/uboot-script-gen
>>>> index a9f698f00fd1..c4d26caf5e0e 100755
>>>> --- a/scripts/uboot-script-gen
>>>> +++ b/scripts/uboot-script-gen
>>>> @@ -815,13 +815,13 @@ function linux_config()
>>>>    
>>>>    generate_uboot_images()
>>>>    {
>>>> -    local arch=$(file -L $XEN | grep "ARM")
>>>> +    local arch=$(file -L $XEN | grep -o "ARM64")
>>>
>>> My file -L gives:
>>>
>>> for arm32: ARM OpenFirmware [...]
>>> for arm64: Aarch64
>>>
>>> So the ARM64 grep wouldn't work as intended. Is the version of `file'
>>> that you are using really printing ARM64?
>>
>> Hm, yes.
>>
>> 	file -L xen
>> 	xen: Linux kernel ARM64 boot executable Image, little-endian, 4K pages
>>
>> 	file -v
>> 	file-5.41
>>
>> u-boot boot command:
>> 	 bootm 0x4EA00000 - 0x4EE00000
>>
>>
>>    If so, we can do:
>>>
>>>     file -L $XEN | grep -E 'ARM64|Aarch64'
>>
>> sure. I'll update.
> 
> Missing escape? I think it's needed even with single quotes.
> 
>    file -L $XEN | grep -E 'ARM64\|Aarch64'

No. It's extended regular expressions ("-E") no need for escape.
Also it works with both '' and "".



-- 
Best regards,
-grygorii


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From: Grygorii Strashko 
To: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini 
CC: Oleksandr Tyshchenko , Alejandro Vallejo
	, Grygorii Strashko 
Subject: [ImageBuilder v2] uboot-script-gen: fix arm64 xen u-boot image
 generation
Thread-Topic: [ImageBuilder v2] uboot-script-gen: fix arm64 xen u-boot image
 generation
Thread-Index: AQHbru+gjQsTQ/HM4kWWIbbQtHW9Sg==
Date: Wed, 16 Apr 2025 16:50:15 +0000
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From: Grygorii Strashko 

The current code in generate_uboot_images() does not detect arm64 properly
and always generates ARM u-boot image, because below command
 file -L $XEN
returns string which may contain "Aarch64" or "ARM64", and, in the later
case, the current code will mistakenly identify Xen binary as "ARM".
This causes Xen boot issues.

Fix it by searching for "ARM64|Aarch64" for AArch64 binary detection.

- mkimage -l xen.ub
Before:
 Image Type:   ARM Linux Kernel Image (uncompressed)

After:
 Image Type:   AArch64 Linux Kernel Image (uncompressed)

Signed-off-by: Grygorii Strashko 
---
changes in v2:
- check for "Aarch64" in addition to "ARM64"

 scripts/uboot-script-gen | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/scripts/uboot-script-gen b/scripts/uboot-script-gen
index 527b70dfdc4b..f3ca787e557f 100755
--- a/scripts/uboot-script-gen
+++ b/scripts/uboot-script-gen
@@ -824,13 +824,13 @@ function linux_config()
=20
 generate_uboot_images()
 {
-    local arch=3D$(file -L $XEN | grep "ARM")
+    local arch=3D$(file -L $XEN | grep -E 'ARM64|Aarch64')
=20
     if test "$arch"
     then
-        arch=3Darm
-    else
         arch=3Darm64
+    else
+        arch=3Darm
     fi
=20
     mkimage -A $arch -T kernel -C none -a $memaddr -e $memaddr -d $XEN "$X=
EN".ub
--=20
2.34.1


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MIME-Version: 1.0
Date: Wed, 16 Apr 2025 18:51:28 +0200
From: Nicola Vetrini 
To: Andrew Cooper 
Cc: Xen-devel , Anthony PERARD
 , Michal Orzel , Jan
 Beulich , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini
 , Volodymyr Babchuk ,
 Bertrand Marquis , Shawn Anastasio
 , Oleksii Kurochko
 , "Daniel P . Smith"
 , Lin Liu 
Subject: Re: [PATCH v6 02/15] drivers/smmu-v3: Fix impending MISRA R20.6
 violation
In-Reply-To: <20250416115900.2491661-3-andrew.cooper3@citrix.com>
References: <20250416115900.2491661-1-andrew.cooper3@citrix.com>
 <20250416115900.2491661-3-andrew.cooper3@citrix.com>
Message-ID: 
X-Sender: nicola.vetrini@bugseng.com
Organization: BUGSENG s.r.l.
Content-Type: text/plain; charset=UTF-8;
 format=flowed
Content-Transfer-Encoding: 8bit

On 2025-04-16 13:58, Andrew Cooper wrote:
> cpu_to_le64() is about to become a macro, at which point the #ifdef in 
> the
> middle of it becomes undefined behaviour.
> 
> Use a logcal variable to prepare strtab, where the #ifdef is fine to 
> use.
> 
> No functional change.
> 
> Signed-off-by: Andrew Cooper 

for MISRA:

Reviewed-by: Nicola Vetrini 
> ---
> CC: Anthony PERARD 
> CC: Michal Orzel 
> CC: Jan Beulich 
> CC: Julien Grall 
> CC: Roger Pau Monné 
> CC: Stefano Stabellini 
> CC: Volodymyr Babchuk 
> CC: Bertrand Marquis 
> CC: Shawn Anastasio 
> CC: Oleksii Kurochko 
> CC: Daniel P. Smith 
> CC: Lin Liu 
> 
> v6:
>  * New
> 
> Eclair log from v5:
>   
> https://saas.eclairit.com:3787/fs/var/local/eclair/xen-project.ecdf/xen-project/people/andyhhp/xen/ECLAIR_normal/xen-bswap/ARM64/9556392204/PROJECT.ecd;/by_service/MC3A2.R20.6.html
> ---
>  xen/drivers/passthrough/arm/smmu-v3.c | 8 +++++---
>  1 file changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/xen/drivers/passthrough/arm/smmu-v3.c 
> b/xen/drivers/passthrough/arm/smmu-v3.c
> index cee572402203..df162350578c 100644
> --- a/xen/drivers/passthrough/arm/smmu-v3.c
> +++ b/xen/drivers/passthrough/arm/smmu-v3.c
> @@ -722,15 +722,17 @@ static void arm_smmu_write_strtab_ent(struct 
> arm_smmu_master *master, u32 sid,
>  	}
> 
>  	if (s2_cfg) {
> -		BUG_ON(ste_live);
> -		dst[2] = cpu_to_le64(
> +		u64 strtab =
>  			 FIELD_PREP(STRTAB_STE_2_S2VMID, s2_cfg->vmid) |
>  			 FIELD_PREP(STRTAB_STE_2_VTCR, s2_cfg->vtcr) |
>  #ifdef __BIG_ENDIAN
>  			 STRTAB_STE_2_S2ENDI |
>  #endif
>  			 STRTAB_STE_2_S2PTW | STRTAB_STE_2_S2AA64 |
> -			 STRTAB_STE_2_S2R);
> +			 STRTAB_STE_2_S2R;
> +
> +		BUG_ON(ste_live);
> +		dst[2] = cpu_to_le64(strtab);
> 
>  		dst[3] = cpu_to_le64(s2_cfg->vttbr & STRTAB_STE_3_S2TTB_MASK);

-- 
Nicola Vetrini, B.Sc.
Software Engineer
BUGSENG (https://bugseng.com)
LinkedIn: https://www.linkedin.com/in/nicola-vetrini-a42471253


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From: Luca Fancellu 
To: Julien Grall 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Bertrand Marquis
	, Michal Orzel , Volodymyr
 Babchuk 
Subject: Re: [PATCH v3 5/7] arm/mpu: Introduce MPU memory mapping flags
Thread-Topic: [PATCH v3 5/7] arm/mpu: Introduce MPU memory mapping flags
Thread-Index: AQHbqvIRPrwVw96fI0iTW2LEmRilT7OjEIMAgAN5QoA=
Date: Wed, 16 Apr 2025 16:52:13 +0000
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Date: Wed, 16 Apr 2025 18:55:21 +0200
From: Nicola Vetrini 
To: Jan Beulich 
Cc: Alejandro Vallejo , Jason Andryuk
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 Stefano Stabellini , Michal Orzel
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 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Julien Grall
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Subject: Re: [PATCH v3 08/16] x86/hyperlaunch: Add helpers to locate multiboot
 modules
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On 2025-04-15 08:05, Jan Beulich wrote:
> On 14.04.2025 20:01, Alejandro Vallejo wrote:
>> On Mon Apr 14, 2025 at 4:05 PM BST, Jan Beulich wrote:
>>> On 14.04.2025 15:37, Alejandro Vallejo wrote:
>>>> On Thu Apr 10, 2025 at 11:42 AM BST, Jan Beulich wrote:
>>>>> On 08.04.2025 18:07, Alejandro Vallejo wrote:
>>>>>> +/*
>>>>>> + * Locate a multiboot module given its node offset in the FDT.
>>>>>> + *
>>>>>> + * The module location may be given via either FDT property:
>>>>>> + *     * reg = 
>>>>>> + *         * Mutates `bi` to append the module.
>>>>>> + *     * module-index = 
>>>>>> + *         * Leaves `bi` unchanged.
>>>>>> + *
>>>>>> + * @param fdt           Pointer to the full FDT.
>>>>>> + * @param node          Offset for the module node.
>>>>>> + * @param address_cells Number of 4-octet cells that make up an 
>>>>>> "address".
>>>>>> + * @param size_cells    Number of 4-octet cells that make up a 
>>>>>> "size".
>>>>>> + * @param bi[inout]     Xen's representation of the boot 
>>>>>> parameters.
>>>>>> + * @return              -EINVAL on malformed nodes, otherwise
>>>>>> + *                      index inside `bi->mods`
>>>>>> + */
>>>>>> +int __init fdt_read_multiboot_module(const void *fdt, int node,
>>>>>> +                                     int address_cells, int 
>>>>>> size_cells,
>>>>>> +                                     struct boot_info *bi)
>>>>> 
>>>>> Functions without callers and non-static ones without declarations 
>>>>> are
>>>>> disliked by Misra.
>>>> 
>>>> Can't do much about it if I want them to stand alone in a single 
>>>> patch.
>>>> Otherwise the following ones become quite unwieldy to look at. All I 
>>>> can
>>>> say is that this function becomes static and with a caller on the 
>>>> next
>>>> patch.
>>> 
>>> Which means you need to touch this again anyway. Perhaps we need a 
>>> Misra
>>> deviation for __maybe_unused functions / data, in which case you 
>>> could
>>> use that here and strip it along with making the function static. 
>>> Cc-ing
>>> Bugseng folks.
>> 
>> It's a transient violation, sure. Do we care about transient MISRA
>> violations though? I understand the importance of bisectability, but
>> AUIU MISRA compliance matters to the extent that that the tip is
>> compliant rather than the intermediate steps?
> 
> Thing is that quite a few rules are blocking now. I haven't checked 
> whether
> the one here (already) is; if it isn't, we can't exclude it will be by 
> the
> time this patch is committed. If then the next patch isn't committed
> together with it, we'd face a CI failure.
> 

It's Rule 8.4, and it is indeed blocking. To double check, a scan on a 
push containing this patch should trigger the failure.
You may transitively add an inline deviation comment or just a deviation 
with a configuration (I can help if needed), justified by the subsequent 
addition of static.

>> Another option would be to fold them this patch and the next together
>> after both get their R-by. As I said, I assumed you'd rather see them 
>> in
>> isolation for purposes of review.
> 
> As it looks it's all plain code additions, so reviewability would 
> merely
> mildly suffer from patch size. But afaict there would be no loss of 
> clarity.
> 
>>>>>> +    /* Otherwise location given as a `reg` property. */
>>>>>> +    prop = fdt_get_property(fdt, node, "reg", NULL);
>>>>>> +
>>>>>> +    if ( !prop )
>>>>>> +    {
>>>>>> +        printk("  No location for multiboot,module\n");
>>>>>> +        return -EINVAL;
>>>>>> +    }
>>>>>> +    if ( fdt_get_property(fdt, node, "module-index", NULL) )
>>>>>> +    {
>>>>>> +        printk("  Location of multiboot,module defined multiple 
>>>>>> times\n");
>>>>>> +        return -EINVAL;
>>>>>> +    }
>>>>>> +
>>>>>> +    ret = read_fdt_prop_as_reg(prop, address_cells, size_cells, 
>>>>>> &addr, &size);
>>>>>> +
>>>>>> +    if ( ret < 0 )
>>>>>> +    {
>>>>>> +        printk("  Failed reading reg for multiboot,module\n");
>>>>>> +        return -EINVAL;
>>>>>> +    }
>>>>>> +
>>>>>> +    idx = bi->nr_modules + 1;
>>>>> 
>>>>> This at least looks like an off-by-one. If the addition of 1 is 
>>>>> really
>>>>> intended, I think it needs commenting on.
>>>> 
>>>> Seems to be, yes. The underlying array is a bit bizarre. It's sizes 
>>>> as
>>>> MAX_NR_BOOTMODS + 1, with the first one being the DTB itself. I 
>>>> guess
>>>> the intent was to take it into account, but bi->nr_modules is
>>>> initialised to the number of multiboot modules, so it SHOULD be 
>>>> already
>>>> taking it into account.
>>>> 
>>>> Also, the logic for bounds checking seems... off (because of the + 1 
>>>> I
>>>> mentioned before). Or at least confusing, so I've moved to using
>>>> ARRAY_SIZE(bi->mods) rather than explicitly comparing against
>>>> MAX_NR_BOOTMODS.
>>>> 
>>>> The array is MAX_NR_BOOTMODS + 1 in length, so it's just more 
>>>> cognitive
>>>> load than I'm comfortable with.
>>> 
>>> If I'm not mistaken the +1 is inherited from the modules array we had 
>>> in
>>> the past, where we wanted 1 extra slot for Xen itself. Hence before 
>>> you
>>> move to using ARRAY_SIZE() everywhere it needs to really be clear 
>>> what
>>> the +1 here is used for.
>> 
>> Ew.  Ok, just looked at the code in multiboot_fill_boot_info and 
>> indeed
>> the arrangement is for all multiboot modules to be in front, and Xen 
>> to
>> be appended. But bi->nr_modules only lists multiboot modules, so
>> increasing that value is therefore not enough (or
>> next_boot_module_index() would fail).
>> 
>> I need to have a proper read on how this is all stitched together.  I
>> may simply swap BOOTMOD_XEN with the next entry on append. Though my
>> preference would be to _not_ have Xen as part of the module list to
>> begin with. Before boot_info that was probably a place as good as any,
>> but this would be much better off in a dedicated field.
>> 
>> I don't see much in terms of usage though. Why is it being added at 
>> all?
> 
> For hyperlaunch I fear it's you who needs to answer this question. For
> pre-hyperlaunch it's (primarily?) for consider_modules(), iirc. See two
> of the three comments ahead of its non-recursive invocations.
> 
> Jan

-- 
Nicola Vetrini, B.Sc.
Software Engineer
BUGSENG (https://bugseng.com)
LinkedIn: https://www.linkedin.com/in/nicola-vetrini-a42471253


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Subject: Re: [PATCH v1 10/14] xen/riscv: implementation of aplic and imsic
 operations
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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References: 
 <74a07ed7c596bbcf581010685e01bfdfa19164f5.1744126720.git.oleksii.kurochko@gmail.com>
 <35075d73-ec3c-4e8f-b7ed-657b604904bd@suse.com>
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From: Oleksii Kurochko 
In-Reply-To: <35075d73-ec3c-4e8f-b7ed-657b604904bd@suse.com>

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On 4/15/25 2:46 PM, Jan Beulich wrote:
> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>> Introduce interrupt controller descriptor for host APLIC to describe
>> the low-lovel hardare. It includes implementation of the following functions:
>>   - aplic_irq_startup()
>>   - aplic_irq_shutdown()
>>   - aplic_irq_enable()
>>   - aplic_irq_disable()
>>   - aplic_irq_ack()
>>   - aplic_host_irq_end()
>>   - aplic_set_irq_affinity()
>>
>> As APLIC is used in MSI mode it requires to enable/disable interrupts not
>> only for APLIC but also for IMSIC. Thereby for the purpose of
>> aplic_irq_{enable,disable}() it is introduced imsic_irq_{enable,disable)().
>>
>> For the purpose of aplic_set_irq_affinity() aplic_get_cpu_from_mask() is
>> introduced to get hart id.
>>
>> Also, introduce additional interrupt controller h/w operations and
>> host_irq_type for APLIC:
>>   - aplic_host_irq_type
>>   - aplic_set_irq_priority()
>>   - aplic_set_irq_type()
> Yet these two functions nor the hooks they're used to populate are entirely
> unused here. Since they're also outside of the common IRQ handling machinery,
> it's unclear how one would sanely ack such a change.

They will be called by intc_route_irq_to_xen() from setup_irq() during firt time
the IRQ is setup.

>
>> --- a/xen/arch/riscv/aplic.c
>> +++ b/xen/arch/riscv/aplic.c
>> @@ -15,6 +15,7 @@
>>   #include 
>>   #include 
>>   #include 
>> +#include 
>>   #include 
>>   #include 
>>   
>> @@ -110,9 +111,173 @@ static int __init aplic_init(void)
>>       return 0;
>>   }
>>   
>> -static const struct intc_hw_operations __ro_after_init aplic_ops = {
>> +static void aplic_set_irq_type(struct irq_desc *desc, unsigned int type)
>> +{
>> +    unsigned int irq = desc->irq - 1;
> Why this adjustment by 1 (and yet both items being named "irq")?

Interrupt 0 isn't possible based on the spec:
```
Each of an APLIC’s interrupt sources has a fixed unique identity number 
in the range 1 to N, where N is the total number of sources at the 
APLIC. The number zero is not a valid interrupt identity number at an 
APLIC. The maximum number of interrupt sources an APLIC may support is 
1023. ``` and interrupt 1 will correspond to bit 0 in sourcecfg[] register, interrupt 
2 ->sourcecfg[1] and so on. And that is the reason why we need -1.

>> +            aplic.regs->sourcecfg[irq] = APLIC_SOURCECFG_SM_EDGE_FALL;
>> +            break;
>> +        case IRQ_TYPE_LEVEL_HIGH:
>> +            aplic.regs->sourcecfg[irq] = APLIC_SOURCECFG_SM_LEVEL_HIGH;
>> +            break;
>> +        case IRQ_TYPE_LEVEL_LOW:
>> +            aplic.regs->sourcecfg[irq] = APLIC_SOURCECFG_SM_LEVEL_LOW;
>> +            break;
>> +        default:
>> +            aplic.regs->sourcecfg[irq] = APLIC_SOURCECFG_SM_INACTIVE;
>> +            break;
> Is the default: label legitimate to be reached?

 From the spec:
```
0 Inactive Inactive in this domain (and not delegated) 1 Detached 
Active, detached from the source wire 2–3 — Reserved 4 Edge1 Active, 
edge-sensitive; interrupt asserted on rising edge 5 Edge0 Active, 
edge-sensitive; interrupt asserted on falling edge 6 Level1 Active, 
level-sensitive; interrupt asserted when high 7 Level0 Active, 
level-sensitive; interrupt asserted when low ``` It seems to me like 
APLIC_SOURCECFG_SM_INACTIVE just covers cases (0-3) and inactive IRQ 
pretty safe to as a default value.

>
>> +    }
>> +    spin_unlock(&aplic.lock);
>> +}
>> +
>> +static void aplic_set_irq_priority(struct irq_desc *desc,
>> +                                   unsigned int priority)
>> +{
>> +    /* No priority, do nothing */
>> +}
> Since the function dopes nothing, wouldn't it be better to omit it and have
> the (future) caller check for a NULL pointer ahead of making the (indirect)
> call? Same remark for other handlers (below) which also do nothing.

I thought about that too, but it could be some cases when the stub is introduced
with temporary BUG_ON("unimplemented") inside just to not miss to implement it
when it will be necessary.
If we will have only the caller check then we could miss to implement such stubs.

>
>> +static void aplic_irq_enable(struct irq_desc *desc)
>> +{
>> +    unsigned long flags;
>> +
>> +    /*
>> +     * TODO: Currently, APLIC is supported only with MSI interrupts.
>> +     *       If APLIC without MSI interrupts is required in the future,
>> +     *       this function will need to be updated accordingly.
>> +     */
>> +    ASSERT(aplic.imsic_cfg->is_used);
> Such an extra field, used only for assertions, is pretty odd. Can't you
> use any of the other fields to achieve the same effect?

in aplic_init() there is:
     /* check for associated imsic node */
     rc = dt_property_read_u32(node, "msi-parent", &imsic_phandle);
     if ( !rc )
         panic("%s: IDC mode not supported\n", node->full_name);

So we will have panic() anyway if MSI mode isn't supported. As an option we
can just drop the ASSERT.

Or introduce static variable in aplic.c `aplic_mode`, init it in aplic_init()
and use it in ASSERT().

>
>> +    ASSERT(spin_is_locked(&desc->lock));
> If this lock (which is an IRQ-safe one) is necessarily held, ...
>
>> +    spin_lock_irqsave(&aplic.lock, flags);
> ... you can use just spin_lock() here.
>
>> +    clear_bit(_IRQ_DISABLED, &desc->status);
> Why an atomic bitop when desc is locked? (And yes, I ought to raise the same
> question on Arm code also doing so.)

I haven't thought about that. Likely non-atomic bitop could be used here.

>
> I'm uncertain about this bit setting anyway - on x86 we would only fiddle
> with it for IRQs not in use, not while enabling/disabling one.
>
> In any event this can be done outside of the APLIC-locked region, I think.

Considering that we are doing that under desc->lock, agree we can move that outside
the APLIC-locked region.

>> +    imsic_irq_enable(desc->irq);
>> +
>> +    /* enable interrupt in APLIC */
>> +    aplic.regs->setienum = desc->irq;
> Are you sure you want to use plain assignments for MMIO accesses? I'd have
> expected writel() to be used here. (And only later I realized that I didn't
> spot the same already higher up from here.)

Good point. I have to update that with writel()...

>
>  From the vague understanding I've gained so far: Isn't the APLIC closer to
> the CPU and the IMSIC closer to the device? If so, wouldn't you want to
> enable at the APLIC before enabling at the IMSIC? But of course that also
> depends on what exactly happens in the window while one is already enabled
> and the other is still disabled. (Later) From the code you add to imsic.c
> it looks like it's the other way around, as the IMSIC is accessed through
> CSRs.

 From the AIA spec:
```
An Incoming MSI Controller (IMSIC) is an optional RISC-V hardware component
that is closely coupled with a hart, one IMSIC per hart. An IMSIC receives
and records incoming message-signaled interrupts (MSIs) for a hart, and
signals to the hart when there are pending and enabled interrupts to be
serviced.
```

Based on the figure 2 (Interrupt delivery by MSIs when harts have IMSICs for receiving them)
of AIA spechttps://github.com/riscv/riscv-aia/blob/main/src/intrsWithIMSICs.png
IMSIC is more close to CPU and APLIC is more close to the device. The external interrupt
controller is APLIC and it only sends a MSI message for a CPU.

The logical flow of an interrupt to a hart with an IMSIC would be:
1. A physical interrupt signal arrives at the APLIC.
2. The APLIC, if configured for MSI delivery mode (domaincfg.DM = 1) and if the specific
    interrupt source is active and enabled within its domain (controlled by sourcecfg[i]
    and the global Interrupt Enable bit IE in domaincfg), will generate an MSI.
3. This MSI is then sent to the target hart's IMSIC. The APLIC needs to know the MSI
    target address for each hart, which can be hardwired or configured through registers
    like mmsiaddrcfg and mmsiaddrcfgh.
4. The receiving hart's IMSIC records this MSI as a pending interrupt.
5. If the corresponding interrupt identity is enabled within the IMSIC's interrupt file,
    the IMSIC will signal the hart, typically by setting the MEIP or SEIP bit in the mip
    CSR (or sip CSR).

Generally, I think that the order in which enable interrupts doesn't really matter as
if you were to enable the IMSIC to receive a certain interrupt before the APLIC was
configured to send it (or had a pending interrupt from the device), the IMSIC would
simply be waiting for an MSI that wouldn't arrive.
Similarly, if the APLIC sends an MSI for an interrupt that is not enabled in the IMSIC,
the interrupt would remain pending in the IMSIC but wouldn't trigger an interrupt at
the hart.

IMO, the order which is used now in the code is pretty logical.

Does it make sense?

>
>> +    spin_unlock_irqrestore(&aplic.lock, flags);
>> +}
>> +
>> +static void aplic_irq_disable(struct irq_desc *desc)
>> +{
>> +    unsigned long flags;
>> +
>> +    /*
>> +     * TODO: Currently, APLIC is supported only with MSI interrupts.
>> +     *       If APLIC without MSI interrupts is required in the future,
>> +     *       this function will need to be updated accordingly.
>> +     */
>> +    ASSERT(aplic.imsic_cfg->is_used);
>> +
>> +    ASSERT(spin_is_locked(&desc->lock));
>> +
>> +    spin_lock_irqsave(&aplic.lock, flags);
>> +
>> +    set_bit(_IRQ_DISABLED, &desc->status);
>> +
>> +    /* disable interrupt in APLIC */
>> +    aplic.regs->clrienum = desc->irq;
>> +
>> +    /* disable interrupt in IMSIC */
>> +    imsic_irq_disable(desc->irq);
>> +
>> +    spin_unlock_irqrestore(&aplic.lock, flags);
>> +}
>> +
>> +static unsigned int aplic_irq_startup(struct irq_desc *desc)
>> +{
>> +    aplic_irq_enable(desc);
>> +
>> +    return 0;
>> +}
>> +
>> +static void aplic_irq_shutdown(struct irq_desc *desc)
>> +{
>> +    aplic_irq_disable(desc);
>> +}
> You don't really need a separate hook function here, do you?

With such implementation it is really not needed to have a hook so
I will drop it.

>> +static void aplic_irq_ack(struct irq_desc *desc)
>> +{
>> +    /* nothing to do */
>> +}
>> +
>> +static void aplic_host_irq_end(struct irq_desc *desc)
> What's the "host" in the identifier about?

It was copied that from Arm and my understanding that it means
Xen-related IRQ as they also have:
```
/* XXX different for level vs edge */
static hw_irq_controller gicv2_host_irq_type = {
...
     .end          = gicv2_host_irq_end,
...
};

static hw_irq_controller gicv2_guest_irq_type = {
...
     .end          = gicv2_guest_irq_end,
...
};
```


>
>> +{
>> +    /* nothing to do */
>> +}
>> +
>> +static unsigned int aplic_get_cpu_from_mask(const cpumask_t *cpumask)
>> +{
>> +    unsigned int cpu;
> No real need for this variable?

Yes, it could be dropped.

>
>> +    cpumask_t possible_mask;
>> +
>> +    cpumask_and(&possible_mask, cpumask, &cpu_possible_map);
>> +    cpu = cpumask_any(&possible_mask);
> Why would you use cpu_possible_map here? That includes any offline CPUs.
> I think you need to use cpu_online_map here.

It makes sense, Ill switch to cpu_online_map.

>
>> +    return cpu;
>> +}
>> +
>> +static void aplic_set_irq_affinity(struct irq_desc *desc, const cpumask_t *mask)
>> +{
>> +    unsigned int cpu;
>> +    uint64_t group_index, base_ppn;
>> +    uint32_t hhxw, lhxw ,hhxs, value;
>> +    const struct imsic_config *imsic = aplic.imsic_cfg;
>> +
>> +    /*
>> +     * TODO: Currently, APLIC is supported only with MSI interrupts.
>> +     *       If APLIC without MSI interrupts is required in the future,
>> +     *       this function will need to be updated accordingly.
>> +     */
>> +    ASSERT(aplic.imsic_cfg->is_used);
> Use the local variable you have made yourself?

What do you mean by local here?

>
>> +    ASSERT(!cpumask_empty(mask));
>> +
>> +    spin_lock(&aplic.lock);
> Aiui the lock can be acquired quite a bit later. It ought to be needed only
> around the actual write to the hardware register.
>
>> +    cpu = cpuid_to_hartid(aplic_get_cpu_from_mask(mask));
>> +    hhxw = imsic->group_index_bits;
>> +    lhxw = imsic->hart_index_bits;
>> +    hhxs = imsic->group_index_shift - IMSIC_MMIO_PAGE_SHIFT * 2;
>> +    base_ppn = imsic->msi[cpu].base_addr >> IMSIC_MMIO_PAGE_SHIFT;
>> +
>> +    /* update hart and EEID in the target register */
>> +    group_index = (base_ppn >> (hhxs + 12)) & (BIT(hhxw, UL) - 1);
> What's this magic 12 in here? Not IMSIC_MMIO_PAGE_SHIFT I suppose?

In the AIA spec they are using 12 explicitly:https://github.com/riscv/riscv-aia/blob/main/src/AdvPLIC.adoc#AdvPLIC-MSIAddrs

>> +    unsigned long id = base_id, last_id = base_id + num_id;
>> +
>> +    while ( id < last_id )
>> +    {
>> +        isel = id / __riscv_xlen;
>> +        isel *= __riscv_xlen / IMSIC_EIPx_BITS;
>> +        isel += (pend) ? IMSIC_EIP0 : IMSIC_EIE0;
> Nit: Why the parentheses?
>
>> +        ireg = 0;
>> +        for ( i = id & (__riscv_xlen - 1);
>> +              (id < last_id) && (i < __riscv_xlen);
>> +              i++, id++ )
>> +            ireg |= (1 << i);
> I wonder if this calculation really needs a loop. Afaict it's just a
> consecutive set of bits you mean to set.

Good point. I will double-check.

>
>> +        if ( val )
>> +            imsic_csr_set(isel, ireg);
>> +        else
>> +            imsic_csr_clear(isel, ireg);
>> +    }
>> +}
>> +
>> +void imsic_irq_enable(unsigned int hwirq)
>> +{
>> +    unsigned long flags;
>> +
>> +    spin_lock_irqsave(&imsic_cfg.lock, flags);
>> +    imsic_local_eix_update(hwirq, 1, false, true);
> No subtraction of 1 here? Also, why "hwirq" and not just "irq"?

 From the spec:
```

When an interrupt file supports distinct interrupt identities, valid identity numbers are between 1
and inclusive. The identity numbers within this range are said to be implemented by the interrupt
file; numbers outside this range are not implemented. The number zero is never a valid interrupt
identity.
...

Bit positions in a valid eiek register that don’t correspond to a 
supported interrupt identity (such as bit 0 of eie0) are read-only zeros.


```

So in EIx registers interrupt i corresponds to bit i in comparison wiht APLIC's sourcecfg which starts from 0.

>
>> +    spin_unlock_irqrestore(&imsic_cfg.lock, flags);
>> +}
>> +
>> +void imsic_irq_disable(unsigned int hwirq)
>> +{
>> +    unsigned long flags;
>> +
>> +    spin_lock_irqsave(&imsic_cfg.lock, flags);
>> +    imsic_local_eix_update(hwirq, 1, false, false);
>> +    spin_unlock_irqrestore(&imsic_cfg.lock, flags);
>> +}
>> +
>>   const struct imsic_config *imsic_get_config(void)
>>   {
>>       return &imsic_cfg;
>> @@ -277,6 +333,13 @@ int __init imsic_init(struct dt_device_node *node)
>>           goto imsic_init_err;
>>       }
>>   
>> +    spin_lock_init(&imsic_cfg.lock);
>> +
>> +    /* Enable local interrupt delivery */
>> +    imsic_ids_local_delivery(true);
> What's this? I can't find the function/macro here, nor in patch 08, nor in
> staging.

It is defined in imsic.c:
```
void imsic_ids_local_delivery(bool enable)
{
     if ( enable )
     {
         imsic_csr_write(IMSIC_EITHRESHOLD, IMSIC_ENABLE_EITHRESHOLD);
         imsic_csr_write(IMSIC_EIDELIVERY, IMSIC_ENABLE_EIDELIVERY);
     }
     else
     {
         imsic_csr_write(IMSIC_EITHRESHOLD, IMSIC_DISABLE_EITHRESHOLD);
         imsic_csr_write(IMSIC_EIDELIVERY, IMSIC_DISABLE_EIDELIVERY);
     }
}
```

Thanks for review.

~ Oleksii

--------------pweA2rQvh53q8HL5NREf4qtQ
Content-Type: text/html; charset=UTF-8
Content-Transfer-Encoding: 8bit



  
    
  
  
    


    

    
On 4/15/25 2:46 PM, Jan Beulich wrote:

    

    

      
On 08.04.2025 17:57, Oleksii Kurochko wrote:


      

        
Introduce interrupt controller descriptor for host APLIC to describe
the low-lovel hardare. It includes implementation of the following functions:
 - aplic_irq_startup()
 - aplic_irq_shutdown()
 - aplic_irq_enable()
 - aplic_irq_disable()
 - aplic_irq_ack()
 - aplic_host_irq_end()
 - aplic_set_irq_affinity()

As APLIC is used in MSI mode it requires to enable/disable interrupts not
only for APLIC but also for IMSIC. Thereby for the purpose of
aplic_irq_{enable,disable}() it is introduced imsic_irq_{enable,disable)().

For the purpose of aplic_set_irq_affinity() aplic_get_cpu_from_mask() is
introduced to get hart id.

Also, introduce additional interrupt controller h/w operations and
host_irq_type for APLIC:
 - aplic_host_irq_type
 - aplic_set_irq_priority()
 - aplic_set_irq_type()


      

      
Yet these two functions nor the hooks they're used to populate are entirely
unused here. Since they're also outside of the common IRQ handling machinery,
it's unclear how one would sanely ack such a change.

    

    
They will be called by intc_route_irq_to_xen() from setup_irq() during firt time
the IRQ is setup.



    

      



      

        
--- a/xen/arch/riscv/aplic.c
+++ b/xen/arch/riscv/aplic.c
@@ -15,6 +15,7 @@
 #include <xen/irq.h>
 #include <xen/mm.h>
 #include <xen/sections.h>
+#include <xen/spinlock.h>
 #include <xen/types.h>
 #include <xen/vmap.h>
 
@@ -110,9 +111,173 @@ static int __init aplic_init(void)
     return 0;
 }
 
-static const struct intc_hw_operations __ro_after_init aplic_ops = {
+static void aplic_set_irq_type(struct irq_desc *desc, unsigned int type)
+{
+    unsigned int irq = desc->irq - 1;


      

      
Why this adjustment by 1 (and yet both items being named "irq")?

    

    
Interrupt 0 isn't possible based on the spec:
```
Each of an APLIC’s interrupt sources has a fixed unique identity number in the range 1 to N,
where N is the total number of sources at the APLIC. The number zero is not a valid interrupt
identity number at an APLIC. The maximum number of interrupt sources an APLIC may support
is 1023.
```
and interrupt 1 will correspond to bit 0 in sourcecfg[] register,
interrupt 2 ->sourcecfg[1] and so on. And that is the reason why we need -1.


    

      

        
+            aplic.regs->sourcecfg[irq] = APLIC_SOURCECFG_SM_EDGE_FALL;
+            break;
+        case IRQ_TYPE_LEVEL_HIGH:
+            aplic.regs->sourcecfg[irq] = APLIC_SOURCECFG_SM_LEVEL_HIGH;
+            break;
+        case IRQ_TYPE_LEVEL_LOW:
+            aplic.regs->sourcecfg[irq] = APLIC_SOURCECFG_SM_LEVEL_LOW;
+            break;
+        default:
+            aplic.regs->sourcecfg[irq] = APLIC_SOURCECFG_SM_INACTIVE;
+            break;


      

      
Is the default: label legitimate to be reached?

    

    
From the spec:
```
0 Inactive Inactive in this domain (and not delegated)
1 Detached Active, detached from the source wire
2–3 — Reserved
4 Edge1 Active, edge-sensitive; interrupt asserted on rising edge
5 Edge0 Active, edge-sensitive; interrupt asserted on falling edge
6 Level1 Active, level-sensitive; interrupt asserted when high
7 Level0 Active, level-sensitive; interrupt asserted when low
```

It seems to me like APLIC_SOURCECFG_SM_INACTIVE just covers cases (0-3) and inactive
IRQ pretty safe to as a default value.

    

      



      

        
+    }
+    spin_unlock(&aplic.lock);
+}
+
+static void aplic_set_irq_priority(struct irq_desc *desc,
+                                   unsigned int priority)
+{
+    /* No priority, do nothing */
+}


      

      
Since the function dopes nothing, wouldn't it be better to omit it and have
the (future) caller check for a NULL pointer ahead of making the (indirect)
call? Same remark for other handlers (below) which also do nothing.

    

    
I thought about that too, but it could be some cases when the stub is introduced
with temporary BUG_ON("unimplemented") inside just to not miss to implement it
when it will be necessary.
If we will have only the caller check then we could miss to implement such stubs.



    

      



      

        
+static void aplic_irq_enable(struct irq_desc *desc)
+{
+    unsigned long flags;
+
+    /*
+     * TODO: Currently, APLIC is supported only with MSI interrupts.
+     *       If APLIC without MSI interrupts is required in the future,
+     *       this function will need to be updated accordingly.
+     */
+    ASSERT(aplic.imsic_cfg->is_used);


      

      
Such an extra field, used only for assertions, is pretty odd. Can't you
use any of the other fields to achieve the same effect?

    

    
in aplic_init() there is:
    /* check for associated imsic node */
    rc = dt_property_read_u32(node, "msi-parent", &imsic_phandle);
    if ( !rc )
        panic("%s: IDC mode not supported\n", node->full_name);

So we will have panic() anyway if MSI mode isn't supported. As an option we
can just drop the ASSERT.

Or introduce static variable in aplic.c `aplic_mode`, init it in aplic_init()
and use it in ASSERT().


    

      



      

        
+    ASSERT(spin_is_locked(&desc->lock));


      

      
If this lock (which is an IRQ-safe one) is necessarily held, ...



      

        
+    spin_lock_irqsave(&aplic.lock, flags);


      

      
... you can use just spin_lock() here.



      

        
+    clear_bit(_IRQ_DISABLED, &desc->status);


      

      
Why an atomic bitop when desc is locked? (And yes, I ought to raise the same
question on Arm code also doing so.)

    

    
I haven't thought about that. Likely non-atomic bitop could be used here.


    

      

I'm uncertain about this bit setting anyway - on x86 we would only fiddle
with it for IRQs not in use, not while enabling/disabling one.

In any event this can be done outside of the APLIC-locked region, I think.

    

    
Considering that we are doing that under desc->lock, agree we can move that outside
the APLIC-locked region.


    

      

        
+    imsic_irq_enable(desc->irq);
+
+    /* enable interrupt in APLIC */
+    aplic.regs->setienum = desc->irq;


      

      
Are you sure you want to use plain assignments for MMIO accesses? I'd have
expected writel() to be used here. (And only later I realized that I didn't
spot the same already higher up from here.)

    

    
Good point. I have to update that with writel()...

    

      

>From the vague understanding I've gained so far: Isn't the APLIC closer to
the CPU and the IMSIC closer to the device? If so, wouldn't you want to
enable at the APLIC before enabling at the IMSIC? But of course that also
depends on what exactly happens in the window while one is already enabled
and the other is still disabled. (Later) From the code you add to imsic.c
it looks like it's the other way around, as the IMSIC is accessed through
CSRs.

    

    
From the AIA spec:
```
An Incoming MSI Controller (IMSIC) is an optional RISC-V hardware component
that is closely coupled with a hart, one IMSIC per hart. An IMSIC receives
and records incoming message-signaled interrupts (MSIs) for a hart, and
signals to the hart when there are pending and enabled interrupts to be
serviced.
```

Based on the figure 2 (Interrupt delivery by MSIs when harts have IMSICs for receiving them)
of AIA spec https://github.com/riscv/riscv-aia/blob/main/src/intrsWithIMSICs.png
IMSIC is more close to CPU and APLIC is more close to the device. The external interrupt
controller is APLIC and it only sends a MSI message for a CPU.

The logical flow of an interrupt to a hart with an IMSIC would be:
1. A physical interrupt signal arrives at the APLIC.
2. The APLIC, if configured for MSI delivery mode (domaincfg.DM = 1) and if the specific
   interrupt source is active and enabled within its domain (controlled by sourcecfg[i]
   and the global Interrupt Enable bit IE in domaincfg), will generate an MSI.
3. This MSI is then sent to the target hart's IMSIC. The APLIC needs to know the MSI
   target address for each hart, which can be hardwired or configured through registers
   like mmsiaddrcfg and mmsiaddrcfgh.
4. The receiving hart's IMSIC records this MSI as a pending interrupt.
5. If the corresponding interrupt identity is enabled within the IMSIC's interrupt file,
   the IMSIC will signal the hart, typically by setting the MEIP or SEIP bit in the mip
   CSR (or sip CSR).

Generally, I think that the order in which enable interrupts doesn't really matter as
if you were to enable the IMSIC to receive a certain interrupt before the APLIC was
configured to send it (or had a pending interrupt from the device), the IMSIC would
simply be waiting for an MSI that wouldn't arrive.
Similarly, if the APLIC sends an MSI for an interrupt that is not enabled in the IMSIC,
the interrupt would remain pending in the IMSIC but wouldn't trigger an interrupt at
the hart.

IMO, the order which is used now in the code is pretty logical.

Does it make sense?


    

      



      

        
+    spin_unlock_irqrestore(&aplic.lock, flags);
+}
+
+static void aplic_irq_disable(struct irq_desc *desc)
+{
+    unsigned long flags;
+
+    /*
+     * TODO: Currently, APLIC is supported only with MSI interrupts.
+     *       If APLIC without MSI interrupts is required in the future,
+     *       this function will need to be updated accordingly.
+     */
+    ASSERT(aplic.imsic_cfg->is_used);
+
+    ASSERT(spin_is_locked(&desc->lock));
+
+    spin_lock_irqsave(&aplic.lock, flags);
+
+    set_bit(_IRQ_DISABLED, &desc->status);
+
+    /* disable interrupt in APLIC */
+    aplic.regs->clrienum = desc->irq;
+
+    /* disable interrupt in IMSIC */
+    imsic_irq_disable(desc->irq);
+
+    spin_unlock_irqrestore(&aplic.lock, flags);
+}
+
+static unsigned int aplic_irq_startup(struct irq_desc *desc)
+{
+    aplic_irq_enable(desc);
+
+    return 0;
+}
+
+static void aplic_irq_shutdown(struct irq_desc *desc)
+{
+    aplic_irq_disable(desc);
+}


      

      
You don't really need a separate hook function here, do you?

    

    
With such implementation it is really not needed to have a hook so
I will drop it.



    

      

      

        
+static void aplic_irq_ack(struct irq_desc *desc)
+{
+    /* nothing to do */
+}
+
+static void aplic_host_irq_end(struct irq_desc *desc)


      

      
What's the "host" in the identifier about?

    

    
It was copied that from Arm and my understanding that it means
Xen-related IRQ as they also have:
```
/* XXX different for level vs edge */
static hw_irq_controller gicv2_host_irq_type = {
...
    .end          = gicv2_host_irq_end,
...
};

static hw_irq_controller gicv2_guest_irq_type = {
...
    .end          = gicv2_guest_irq_end,
...
};
```




    

      



      

        
+{
+    /* nothing to do */
+}
+
+static unsigned int aplic_get_cpu_from_mask(const cpumask_t *cpumask)
+{
+    unsigned int cpu;


      

      
No real need for this variable?

    

    
Yes, it could be dropped.



    

      



      

        
+    cpumask_t possible_mask;
+
+    cpumask_and(&possible_mask, cpumask, &cpu_possible_map);
+    cpu = cpumask_any(&possible_mask);


      

      
Why would you use cpu_possible_map here? That includes any offline CPUs.
I think you need to use cpu_online_map here.

    

    
It makes sense, Ill switch to cpu_online_map.



    

      



      

        
+    return cpu;
+}
+
+static void aplic_set_irq_affinity(struct irq_desc *desc, const cpumask_t *mask)
+{
+    unsigned int cpu;
+    uint64_t group_index, base_ppn;
+    uint32_t hhxw, lhxw ,hhxs, value;
+    const struct imsic_config *imsic = aplic.imsic_cfg;
+
+    /*
+     * TODO: Currently, APLIC is supported only with MSI interrupts.
+     *       If APLIC without MSI interrupts is required in the future,
+     *       this function will need to be updated accordingly.
+     */
+    ASSERT(aplic.imsic_cfg->is_used);


      

      
Use the local variable you have made yourself?

    

    
What do you mean by local here?



    

      



      

        
+    ASSERT(!cpumask_empty(mask));
+
+    spin_lock(&aplic.lock);


      

      
Aiui the lock can be acquired quite a bit later. It ought to be needed only
around the actual write to the hardware register.



      

        
+    cpu = cpuid_to_hartid(aplic_get_cpu_from_mask(mask));
+    hhxw = imsic->group_index_bits;
+    lhxw = imsic->hart_index_bits;
+    hhxs = imsic->group_index_shift - IMSIC_MMIO_PAGE_SHIFT * 2;
+    base_ppn = imsic->msi[cpu].base_addr >> IMSIC_MMIO_PAGE_SHIFT;
+
+    /* update hart and EEID in the target register */
+    group_index = (base_ppn >> (hhxs + 12)) & (BIT(hhxw, UL) - 1);


      

      
What's this magic 12 in here? Not IMSIC_MMIO_PAGE_SHIFT I suppose?

    

    
In the AIA spec they are using 12 explicitly: https://github.com/riscv/riscv-aia/blob/main/src/AdvPLIC.adoc#AdvPLIC-MSIAddrs



    

      

        
+    unsigned long id = base_id, last_id = base_id + num_id;
+
+    while ( id < last_id )
+    {
+        isel = id / __riscv_xlen;
+        isel *= __riscv_xlen / IMSIC_EIPx_BITS;
+        isel += (pend) ? IMSIC_EIP0 : IMSIC_EIE0;


      

      
Nit: Why the parentheses?



      

        
+        ireg = 0;
+        for ( i = id & (__riscv_xlen - 1);
+              (id < last_id) && (i < __riscv_xlen);
+              i++, id++ )
+            ireg |= (1 << i);


      

      
I wonder if this calculation really needs a loop. Afaict it's just a
consecutive set of bits you mean to set.

    

    
Good point. I will double-check.



    

      



      

        
+        if ( val )
+            imsic_csr_set(isel, ireg);
+        else
+            imsic_csr_clear(isel, ireg);
+    }
+}
+
+void imsic_irq_enable(unsigned int hwirq)
+{
+    unsigned long flags;
+
+    spin_lock_irqsave(&imsic_cfg.lock, flags);
+    imsic_local_eix_update(hwirq, 1, false, true);


      

      
No subtraction of 1 here? Also, why "hwirq" and not just "irq"?

    

    
From the spec:
```

When an interrupt file supports distinct interrupt identities, valid identity numbers are between 1
and inclusive. The identity numbers within this range are said to be implemented by the interrupt
file; numbers outside this range are not implemented. The number zero is never a valid interrupt
identity.
...

Bit positions in a valid eiek register that don’t correspond to a supported interrupt identity (such as bit 0 of eie0) are read-only zeros.

```

So in EIx registers interrupt i corresponds to bit i in comparison wiht APLIC's sourcecfg which starts from 0.



    

      



      

        
+    spin_unlock_irqrestore(&imsic_cfg.lock, flags);
+}
+
+void imsic_irq_disable(unsigned int hwirq)
+{
+    unsigned long flags;
+
+    spin_lock_irqsave(&imsic_cfg.lock, flags);
+    imsic_local_eix_update(hwirq, 1, false, false);
+    spin_unlock_irqrestore(&imsic_cfg.lock, flags);
+}
+
 const struct imsic_config *imsic_get_config(void)
 {
     return &imsic_cfg;
@@ -277,6 +333,13 @@ int __init imsic_init(struct dt_device_node *node)
         goto imsic_init_err;
     }
 
+    spin_lock_init(&imsic_cfg.lock);
+
+    /* Enable local interrupt delivery */
+    imsic_ids_local_delivery(true);


      

      
What's this? I can't find the function/macro here, nor in patch 08, nor in
staging.

    

    
It is defined in imsic.c:
```
void imsic_ids_local_delivery(bool enable)
{
    if ( enable )
    {
        imsic_csr_write(IMSIC_EITHRESHOLD, IMSIC_ENABLE_EITHRESHOLD);
        imsic_csr_write(IMSIC_EIDELIVERY, IMSIC_ENABLE_EIDELIVERY);
    }
    else
    {
        imsic_csr_write(IMSIC_EITHRESHOLD, IMSIC_DISABLE_EITHRESHOLD);
        imsic_csr_write(IMSIC_EIDELIVERY, IMSIC_DISABLE_EIDELIVERY);
    }
}
```

Thanks for review.

~ Oleksii


  


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From: Jason Andryuk 
To: 
CC: Jason Andryuk , Anthony PERARD
	, Stefano Stabellini 
Subject: [PATCH v5 5/7] tools/init-dom0less: Only seed legacy xenstore grants
Date: Wed, 16 Apr 2025 17:29:09 -0400
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The hardware domain is unable to seed a control domain, but we want the
control domain to use xenstore.  Rely on the hypervisor to seed dom0less
grant table entries for Xenstore, so this seeding is unnecessary.

However, that only works for the new xenstore late init.  The legacy
protocol which uses init-dom0less to populate the page still needs to
seed the grant.

Signed-off-by: Jason Andryuk 
Reviewed-by: Stefano Stabellini 
---
v5:
No change

v4:
Add Stefano R-b
---
 tools/helpers/init-dom0less.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/tools/helpers/init-dom0less.c b/tools/helpers/init-dom0less.c
index 17579fe2e8..91edf17b6c 100644
--- a/tools/helpers/init-dom0less.c
+++ b/tools/helpers/init-dom0less.c
@@ -286,12 +286,12 @@ static int init_domain(struct xs_handle *xsh,
                 xenstore_pfn);
         if (rc < 0)
             return rc;
-    }
 
-    rc = xc_dom_gnttab_seed(xch, info->domid, true,
-                            (xen_pfn_t)-1, xenstore_pfn, 0, 0);
-    if (rc)
-        err(1, "xc_dom_gnttab_seed");
+        rc = xc_dom_gnttab_seed(xch, info->domid, true,
+                                (xen_pfn_t)-1, xenstore_pfn, 0, 0);
+        if (rc)
+               err(1, "xc_dom_gnttab_seed");
+    }
 
     libxl_uuid_generate(&uuid);
     xc_domain_sethandle(xch, info->domid, libxl_uuid_bytearray(&uuid));
-- 
2.49.0



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From: Jason Andryuk 
To: 
CC: Jason Andryuk , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" 
Subject: [PATCH v5 6/7] xen/arm: dom0less use has_dtb local variable
Date: Wed, 16 Apr 2025 17:29:10 -0400
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Store the result of finding a "multiboot,device-tree" node.  This will
simplity adding hardware domain checks.

Signed-off-by: Jason Andryuk 
Reviewed-by: Stefano Stabellini 
---
v5:
No change

v4:
Add Stefano R-b

v3:
New

Could be squashed into the next patch, but this helps make the next one
cleaner.
---
 xen/arch/arm/dom0less-build.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c
index 188ef40b52..50d2d3e4e4 100644
--- a/xen/arch/arm/dom0less-build.c
+++ b/xen/arch/arm/dom0less-build.c
@@ -1033,6 +1033,7 @@ void __init create_domUs(void)
             .grant_opts = XEN_DOMCTL_GRANT_version(opt_gnttab_max_version),
         };
         unsigned int flags = 0U;
+        bool has_dtb = false;
         uint32_t val;
         int rc;
 
@@ -1067,9 +1068,10 @@ void __init create_domUs(void)
              !strcmp(dom0less_iommu, "enabled") )
             iommu = true;
 
-        if ( iommu_enabled &&
-             (iommu || dt_find_compatible_node(node, NULL,
-                                               "multiboot,device-tree")) )
+        if ( dt_find_compatible_node(node, NULL, "multiboot,device-tree") )
+            has_dtb = true;
+
+        if ( iommu_enabled && (iommu || has_dtb) )
             d_cfg.flags |= XEN_DOMCTL_CDF_iommu;
 
         if ( !dt_property_read_u32(node, "nr_spis", &d_cfg.arch.nr_spis) )
-- 
2.49.0



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From: Jason Andryuk 
To: 
CC: Jason Andryuk , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" , Andrew Cooper
	, Anthony PERARD , "Jan
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Subject: [PATCH v5 4/7] xen/arm: dom0less seed xenstore grant table entry
Date: Wed, 16 Apr 2025 17:29:08 -0400
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xenstored maps other domains' xenstore pages.  Currently this relies on
init-dom0less or xl to seed the grants from Dom0.  With split
hardware/control/xenstore domains, this is problematic since we don't
want the hardware domain to be able to map other domains' resources
without their permission.  Instead have the hypervisor seed the grant
table entry for every dom0less domain.  The grant is then accessible as
normal.

C xenstored uses grants, so it can map the xenstore pages from a
non-dom0 xenstore domain.  OCaml xenstored uses foreign mappings, so it
can only run from a privileged domain (dom0).

Add a define to indicate the late alloc xsentore PFN, to better indicate
what is being checked.  Use UINT64_MAX instead of ~0ULL as the HVM_PARAM
field is a uint64_t.  UINT64_MAX is not defined, so add it.

Signed-off-by: Jason Andryuk 
Reviewed-by: Stefano Stabellini 
---
v5:
Add R-b: Stefano

v4:
ASSERT gfn against UINT32_MAX and use < to avoid INVALID_GFN on 32bit
builds
Stefano gave R-b, but holding off addition because of changes
Use IS_ENABLED(CONFIG_GRANT_TABLE) instead of wrapper
Add XENSTORE_PFN_LATE_ALLOC
Add UINT64_MAX

v3:
Expand commit message about C vs. OCaml xenstored.
Remove __init and flags from gnttab_seed_entry()
Change frame to uint32_t
ASSERT gfn fits in a uint32_t
Rebase on mem paging changes

v2:
Tweak commit message
Mark gnttab_seed_entry() __init and put inside CONFIG_DOM0LESS_BOOT
Add ASSERT(!d->creation_finished) and ASSERT(gt->gt_version == 1);
const struct domain & struct grant_table
---
 xen/arch/arm/dom0less-build.c | 10 +++++++++-
 xen/common/grant_table.c      | 14 ++++++++++++++
 xen/include/xen/grant_table.h |  4 ++++
 xen/include/xen/types.h       |  1 +
 4 files changed, 28 insertions(+), 1 deletion(-)

diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c
index bb8cc3be43..188ef40b52 100644
--- a/xen/arch/arm/dom0less-build.c
+++ b/xen/arch/arm/dom0less-build.c
@@ -20,6 +20,8 @@
 #include 
 #include 
 
+#define XENSTORE_PFN_LATE_ALLOC UINT64_MAX
+
 static domid_t __initdata xs_domid = DOMID_INVALID;
 static bool __initdata need_xenstore;
 
@@ -756,7 +758,7 @@ static int __init alloc_xenstore_params(struct kernel_info *kinfo)
 
     if ( (kinfo->dom0less_feature & (DOM0LESS_XENSTORE | DOM0LESS_XS_LEGACY))
                                  == (DOM0LESS_XENSTORE | DOM0LESS_XS_LEGACY) )
-        d->arch.hvm.params[HVM_PARAM_STORE_PFN] = ~0ULL;
+        d->arch.hvm.params[HVM_PARAM_STORE_PFN] = XENSTORE_PFN_LATE_ALLOC;
     else if ( kinfo->dom0less_feature & DOM0LESS_XENSTORE )
     {
         rc = alloc_xenstore_page(d);
@@ -788,6 +790,12 @@ static void __init initialize_domU_xenstore(void)
         rc = alloc_xenstore_evtchn(d);
         if ( rc < 0 )
             panic("%pd: Failed to allocate xenstore_evtchn\n", d);
+
+        if ( gfn != XENSTORE_PFN_LATE_ALLOC && IS_ENABLED(CONFIG_GRANT_TABLE) )
+        {
+            ASSERT(gfn < UINT32_MAX);
+            gnttab_seed_entry(d, GNTTAB_RESERVED_XENSTORE, xs_domid, gfn);
+        }
     }
 }
 
diff --git a/xen/common/grant_table.c b/xen/common/grant_table.c
index 6c77867f8c..e75ff98aff 100644
--- a/xen/common/grant_table.c
+++ b/xen/common/grant_table.c
@@ -4346,6 +4346,20 @@ static void gnttab_usage_print(struct domain *rd)
         printk("no active grant table entries\n");
 }
 
+#ifdef CONFIG_DOM0LESS_BOOT
+void __init gnttab_seed_entry(const struct domain *d, unsigned int idx,
+                              domid_t be_domid, uint32_t frame)
+{
+    const struct grant_table *gt = d->grant_table;
+
+    ASSERT(!d->creation_finished);
+    ASSERT(gt->gt_version == 1);
+    shared_entry_v1(gt, idx).flags = GTF_permit_access;
+    shared_entry_v1(gt, idx).domid = be_domid;
+    shared_entry_v1(gt, idx).frame = frame;
+}
+#endif
+
 static void cf_check gnttab_usage_print_all(unsigned char key)
 {
     struct domain *d;
diff --git a/xen/include/xen/grant_table.h b/xen/include/xen/grant_table.h
index 50edfecfb6..297d7669e9 100644
--- a/xen/include/xen/grant_table.h
+++ b/xen/include/xen/grant_table.h
@@ -33,6 +33,10 @@
 
 struct grant_table;
 
+/* Seed a gnttab entry for Hyperlaunch/dom0less. */
+void gnttab_seed_entry(const struct domain *d, unsigned int idx,
+                       domid_t be_domid, uint32_t frame);
+
 #ifdef CONFIG_GRANT_TABLE
 
 extern unsigned int opt_gnttab_max_version;
diff --git a/xen/include/xen/types.h b/xen/include/xen/types.h
index e8d419b954..73ddccbbd5 100644
--- a/xen/include/xen/types.h
+++ b/xen/include/xen/types.h
@@ -44,6 +44,7 @@ typedef __UINTPTR_TYPE__ uintptr_t;
 #define UINT8_MAX       (255)
 #define UINT16_MAX      (65535)
 #define UINT32_MAX      (4294967295U)
+#define UINT64_MAX      (18446744073709551615ULL)
 
 #define INT_MAX         ((int)(~0U>>1))
 #define INT_MIN         (-INT_MAX - 1)
-- 
2.49.0



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From: Jason Andryuk 
To: 
CC: "Daniel P. Smith" , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" , Andrew Cooper
	, Anthony PERARD , "Jan
 Beulich" , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Jason Andryuk 
Subject: [PATCH v5 1/7] xen: introduce hardware domain create flag
Date: Wed, 16 Apr 2025 17:29:05 -0400
Message-ID: <20250416212911.410946-2-jason.andryuk@amd.com>
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From: "Daniel P. Smith" 

Add and use a new internal create domain flag to specify the hardware
domain.  This removes the hardcoding of domid 0 as the hardware domain.

This allows more flexibility with domain creation.

The assignment of d->cdf is moved later so CDF_hardware is added for the
late_hwdom case.  Also old_hwdom has the flag removed to reflect the
change.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Jason Andryuk 
Reviewed-by: Jan Beulich 
---
v5:
Restore CDF_hardware to old_hwdom on error
Add Jan's R-b
Rebase bd->domid addition

v4:
Move d->cdf assignment later
Remove Jan's R-b

v3:
Or-in CDF_hardware for late hwdom case
Add Jan's R-b

v2:
() around binary &
Only allow late_hwdom for dom0
---
 xen/arch/arm/domain_build.c |  2 +-
 xen/arch/x86/setup.c        |  3 ++-
 xen/common/domain.c         | 19 +++++++++++++++----
 xen/include/xen/domain.h    |  2 ++
 4 files changed, 20 insertions(+), 6 deletions(-)

diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
index 634333cdde..b8f282ff10 100644
--- a/xen/arch/arm/domain_build.c
+++ b/xen/arch/arm/domain_build.c
@@ -2369,7 +2369,7 @@ void __init create_dom0(void)
         .max_maptrack_frames = -1,
         .grant_opts = XEN_DOMCTL_GRANT_version(opt_gnttab_max_version),
     };
-    unsigned int flags = CDF_privileged;
+    unsigned int flags = CDF_privileged | CDF_hardware;
     int rc;
 
     /* The vGIC for DOM0 is exactly emulating the hardware GIC */
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 3c257f0bad..24b36c1a59 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -1011,7 +1011,8 @@ static struct domain *__init create_dom0(struct boot_info *bi)
 
     /* Create initial domain.  Not d0 for pvshim. */
     bd->domid = get_initial_domain_id();
-    d = domain_create(bd->domid, &dom0_cfg, pv_shim ? 0 : CDF_privileged);
+    d = domain_create(bd->domid, &dom0_cfg,
+                      pv_shim ? 0 : CDF_privileged | CDF_hardware);
     if ( IS_ERR(d) )
         panic("Error creating d%u: %ld\n", bd->domid, PTR_ERR(d));
 
diff --git a/xen/common/domain.c b/xen/common/domain.c
index 585fd726a9..abf1969e60 100644
--- a/xen/common/domain.c
+++ b/xen/common/domain.c
@@ -804,9 +804,6 @@ struct domain *domain_create(domid_t domid,
     d->domain_id = domid;
     d->unique_id = get_unique_id();
 
-    /* Holding CDF_* internal flags. */
-    d->cdf = flags;
-
     /* Debug sanity. */
     ASSERT(is_system_domain(d) ? config == NULL : config != NULL);
 
@@ -820,15 +817,25 @@ struct domain *domain_create(domid_t domid,
     d->is_privileged = flags & CDF_privileged;
 
     /* Sort out our idea of is_hardware_domain(). */
-    if ( domid == 0 || domid == hardware_domid )
+    if ( (flags & CDF_hardware) || domid == hardware_domid )
     {
         if ( hardware_domid < 0 || hardware_domid >= DOMID_FIRST_RESERVED )
             panic("The value of hardware_dom must be a valid domain ID\n");
 
+        /* late_hwdom is only allowed for dom0. */
+        if ( hardware_domain && hardware_domain->domain_id )
+            return ERR_PTR(-EINVAL);
+
         old_hwdom = hardware_domain;
         hardware_domain = d;
+        flags |= CDF_hardware;
+        if ( old_hwdom )
+            old_hwdom->cdf &= ~CDF_hardware;
     }
 
+    /* Holding CDF_* internal flags. */
+    d->cdf = flags;
+
     TRACE_TIME(TRC_DOM0_DOM_ADD, d->domain_id);
 
     lock_profile_register_struct(LOCKPROF_TYPE_PERDOM, d, domid);
@@ -973,7 +980,11 @@ struct domain *domain_create(domid_t domid,
 
     d->is_dying = DOMDYING_dead;
     if ( hardware_domain == d )
+    {
+        if ( old_hwdom )
+            old_hwdom->cdf |= CDF_hardware;
         hardware_domain = old_hwdom;
+    }
     atomic_set(&d->refcnt, DOMAIN_DESTROYED);
 
     sched_destroy_domain(d);
diff --git a/xen/include/xen/domain.h b/xen/include/xen/domain.h
index a34daa7d10..e10baf2615 100644
--- a/xen/include/xen/domain.h
+++ b/xen/include/xen/domain.h
@@ -53,6 +53,8 @@ domid_t get_initial_domain_id(void);
 #else
 #define CDF_staticmem            0
 #endif
+/* This is the hardware domain.  Only 1 allowed. */
+#define CDF_hardware             (1U << 3)
 
 #define is_domain_direct_mapped(d) ((d)->cdf & CDF_directmap)
 #define is_domain_using_staticmem(d) ((d)->cdf & CDF_staticmem)
-- 
2.49.0



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From: Jason Andryuk 
To: 
CC: Jason Andryuk , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" , Andrew Cooper
	, Anthony PERARD , "Jan
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Subject: [PATCH v5 7/7] xen/arm: Add capabilities to dom0less
Date: Wed, 16 Apr 2025 17:29:11 -0400
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Add a capabilities property to dom0less to allow building a
disaggregated system.  Only a single hardware domain and single xenstore
domain can be specified.  Multiple control domains are possible.

Introduce bootfdt.h to contain these constants.

When using the hardware or xenstore capabilities, adjust the grant and
event channel limits similar to dom0.

For a hardware domain, disallow specifying "vpl011", "nr_spis",
"multiboot,device-tree" and "passthrough" nodes.  Also, require an IOMMU
when not direct-mapped,

Signed-off-by: Jason Andryuk 
Reviewed-by: Stefano Stabellini 
---
v5:
No change

v4:
Add Stefano R-b

v3:
Specify 32bit integer in booting.txt & s/all all/all/
Panic on !direct-map && !iommu
Panic "multiboot,device-tree" or "passthrough" with hardware domain
Include asm/grant_table.h for CONFIG_GRANT_TABLE=n

v2:
Fix comment style
Make DOMAIN_CAPS_* unsigned
Remove forced directmap & iommu
Require iommu with use of hardware domain
Limit to a single xenstore domain

There is overlap with hyperlaunch.  The numeric values are the same.
Hyperlaunch doesn't expose the values in a public header as done here.
Is this to be expected for dom0less?  It seems most of dom0less isn't in
a header, but just in docs.

Hyperlaunch uses BUILD_CAPS_, but I chose DOMAIN_CAPS_ since there are
domain-level capabilities.

Only a single xenstore and hardware domain make sense.  Hardware domain
receiving all hardware can only have a single domain.

For Xenstore, the logic latches the single xs_domid and uses that for
all domains.  Also, only a single domain can register for VIRQ_DOM_EXC.
---
 docs/misc/arm/device-tree/booting.txt | 11 ++++++
 xen/arch/arm/dom0less-build.c         | 57 +++++++++++++++++++++++++--
 xen/arch/arm/domain.c                 |  3 +-
 xen/include/public/bootfdt.h          | 31 +++++++++++++++
 4 files changed, 98 insertions(+), 4 deletions(-)
 create mode 100644 xen/include/public/bootfdt.h

diff --git a/docs/misc/arm/device-tree/booting.txt b/docs/misc/arm/device-tree/booting.txt
index ac781c9cc8..59fa96a82e 100644
--- a/docs/misc/arm/device-tree/booting.txt
+++ b/docs/misc/arm/device-tree/booting.txt
@@ -167,6 +167,17 @@ with the following properties:
     Refer to docs/misc/cache_coloring.rst for syntax. This option is applicable
     only to Arm64 guests.
 
+- capabilities
+    Optional.  A 32-bit integer representing a bit field of domain capabilities
+    for a disaggregated system.  A traditional dom0 has all of these
+    capabilities, and a domU has none of them.
+
+    0x1 DOMAIN_CAPS_CONTROL  - A privileged, control domain
+    0x2 DOMAIN_CAPS_HARDWARE - The hardware domain - there can be only 1
+    0x4 DOMAIN_CAPS_XENSTORE - The xenstore domain - there can be only 1
+
+    The default is no capabilities.
+
 - vpl011
 
     An empty property to enable/disable a virtual pl011 for the guest to
diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c
index 50d2d3e4e4..a356fc94fc 100644
--- a/xen/arch/arm/dom0less-build.c
+++ b/xen/arch/arm/dom0less-build.c
@@ -12,11 +12,13 @@
 #include 
 #include 
 
+#include 
 #include 
 
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -928,6 +930,8 @@ static int __init construct_domU(struct domain *d,
            d->max_vcpus, mem);
 
     kinfo.vpl011 = dt_property_read_bool(node, "vpl011");
+    if ( kinfo.vpl011 && is_hardware_domain(d) )
+        panic("hardware domain cannot specify vpl011\n");
 
     rc = dt_property_read_string(node, "xen,enhanced", &dom0less_enhanced);
     if ( rc == -EILSEQ ||
@@ -1043,6 +1047,37 @@ void __init create_domUs(void)
         if ( (max_init_domid + 1) >= DOMID_FIRST_RESERVED )
             panic("No more domain IDs available\n");
 
+        if ( dt_property_read_u32(node, "capabilities", &val) )
+        {
+            if ( val & ~DOMAIN_CAPS_MASK )
+                panic("Invalid capabilities (%"PRIx32")\n", val);
+
+            if ( val & DOMAIN_CAPS_CONTROL )
+                flags |= CDF_privileged;
+
+            if ( val & DOMAIN_CAPS_HARDWARE )
+            {
+                if ( hardware_domain )
+                    panic("Only 1 hardware domain can be specified! (%pd)\n",
+                           hardware_domain);
+
+                d_cfg.max_grant_frames = gnttab_dom0_frames();
+                d_cfg.max_evtchn_port = -1;
+                flags |= CDF_hardware;
+                iommu = true;
+            }
+
+            if ( val & DOMAIN_CAPS_XENSTORE )
+            {
+                if ( xs_domid != DOMID_INVALID )
+                    panic("Only 1 xenstore domain can be specified! (%u)\n",
+                          xs_domid);
+
+                d_cfg.flags |= XEN_DOMCTL_CDF_xs_domain;
+                d_cfg.max_evtchn_port = -1;
+            }
+        }
+
         if ( dt_find_property(node, "xen,static-mem", NULL) )
         {
             if ( llc_coloring_enabled )
@@ -1064,12 +1099,26 @@ void __init create_domUs(void)
             panic("Missing property 'cpus' for domain %s\n",
                   dt_node_name(node));
 
-        if ( !dt_property_read_string(node, "passthrough", &dom0less_iommu) &&
-             !strcmp(dom0less_iommu, "enabled") )
-            iommu = true;
+        if ( !dt_property_read_string(node, "passthrough", &dom0less_iommu) )
+        {
+            if ( flags & CDF_hardware )
+                panic("Don't specify passthrough for hardware domain\n");
+
+            if ( !strcmp(dom0less_iommu, "enabled") )
+                iommu = true;
+        }
+
+        if ( (flags & CDF_hardware) && !(flags & CDF_directmap) &&
+             !iommu_enabled )
+            panic("non-direct mapped hardware domain requires iommu\n");
 
         if ( dt_find_compatible_node(node, NULL, "multiboot,device-tree") )
+        {
+            if ( flags & CDF_hardware )
+                panic("\"multiboot,device-tree\" incompatible with hardware domain\n");
+
             has_dtb = true;
+        }
 
         if ( iommu_enabled && (iommu || has_dtb) )
             d_cfg.flags |= XEN_DOMCTL_CDF_iommu;
@@ -1106,6 +1155,8 @@ void __init create_domUs(void)
                 d_cfg.arch.nr_spis = MAX(d_cfg.arch.nr_spis,
                                          vpl011_virq - 32 + 1);
         }
+        else if ( flags & CDF_hardware )
+            panic("nr_spis cannot be specified for hardware domain\n");
 
         /* Get the optional property domain-cpupool */
         cpupool_node = dt_parse_phandle(node, "domain-cpupool", 0);
diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
index 3ba959f866..dc4b4e84c1 100644
--- a/xen/arch/arm/domain.c
+++ b/xen/arch/arm/domain.c
@@ -608,7 +608,8 @@ int arch_sanitise_domain_config(struct xen_domctl_createdomain *config)
 {
     unsigned int max_vcpus;
     unsigned int flags_required = (XEN_DOMCTL_CDF_hvm | XEN_DOMCTL_CDF_hap);
-    unsigned int flags_optional = (XEN_DOMCTL_CDF_iommu | XEN_DOMCTL_CDF_vpmu);
+    unsigned int flags_optional = (XEN_DOMCTL_CDF_iommu | XEN_DOMCTL_CDF_vpmu |
+                                   XEN_DOMCTL_CDF_xs_domain );
     unsigned int sve_vl_bits = sve_decode_vl(config->arch.sve_vl);
 
     if ( (config->flags & ~flags_optional) != flags_required )
diff --git a/xen/include/public/bootfdt.h b/xen/include/public/bootfdt.h
new file mode 100644
index 0000000000..86c46b42a9
--- /dev/null
+++ b/xen/include/public/bootfdt.h
@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Xen Device Tree boot information
+ *
+ * Information for configuring Xen domains created at boot time.
+ */
+
+#ifndef __XEN_PUBLIC_BOOTFDT_H__
+#define __XEN_PUBLIC_BOOTFDT_H__
+
+/*
+ * Domain Capabilities specified in the "capabilities" property.  Use of
+ * this property allows splitting up the monolithic dom0 into separate,
+ * less privileged components.  A regular domU has no capabilities
+ * (which is the default if nothing is specified).  A traditional dom0
+ * has all three capabilities.
+ */
+
+/* Control/Privileged domain capable of affecting other domains. */
+#define DOMAIN_CAPS_CONTROL  (1U << 0)
+/*
+ * Hardware domain controlling physical hardware.  Typically providing
+ * backends to other domains.
+ */
+#define DOMAIN_CAPS_HARDWARE (1U << 1)
+/* Xenstore domain. */
+#define DOMAIN_CAPS_XENSTORE (1U << 2)
+#define DOMAIN_CAPS_MASK     (DOMAIN_CAPS_CONTROL | DOMAIN_CAPS_HARDWARE | \
+                              DOMAIN_CAPS_XENSTORE)
+
+#endif /* __XEN_PUBLIC_BOOTFDT_H__ */
-- 
2.49.0



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From: Jason Andryuk 
To: 
CC: Jason Andryuk , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" 
Subject: [PATCH v5 3/7] xen/arm: dom0less delay xenstore initialization
Date: Wed, 16 Apr 2025 17:29:07 -0400
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To allocate the xenstore event channel and initialize the grant table
entry, the xenstore domid is neeed.  A dom0 is created before the domUs,
so it is normally available through hardware_domain.  With capabilities
and dom0less, the xenstore domain may not be created first.

Keep the population of the page and HVM_PARAM_STORE_PFN in the normal
domain construction, but delay event channel creation and grant seeding
to after all domUs are created.  HVM_PARAM_STORE_PFN now serves as
indication to setup xenstore since the device tree is no longer
immediately available.  0 means no xenstore.  ~0ULL means legacy so only
the event channel needs setup, and any other value means to seed the
page.

dom0 needs to set xs_domid when it is serving as the xenstore domain.

The domain running xenstored needs to be the handler for VIRQ_DOM_EXC,
so set that as well - it otherwise defaults to hardware domain.

Signed-off-by: Jason Andryuk 
Reviewed-by: Stefano Stabellini 
---
v5:
No change

v4:
Add Stefano R-b

v3:
Use uint64_t to check for xenstore pfn read from HVM_PARAM
Rebase after mem paging changes

v2:
Re-order ahead of seeding.
Fix created type in commit message
Change set_xs_domid to set_xs_domain
Set xenstore domain as VIRQ_DOM_EXC handler
---
 xen/arch/arm/dom0less-build.c             | 67 +++++++++++++++++------
 xen/arch/arm/domain_build.c               |  2 +
 xen/arch/arm/include/asm/dom0less-build.h |  2 +
 3 files changed, 53 insertions(+), 18 deletions(-)

diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c
index 7bc6a6c4d7..bb8cc3be43 100644
--- a/xen/arch/arm/dom0less-build.c
+++ b/xen/arch/arm/dom0less-build.c
@@ -20,6 +20,15 @@
 #include 
 #include 
 
+static domid_t __initdata xs_domid = DOMID_INVALID;
+static bool __initdata need_xenstore;
+
+void __init set_xs_domain(struct domain *d)
+{
+    xs_domid = d->domain_id;
+    set_global_virq_handler(d, VIRQ_DOM_EXC);
+}
+
 bool __init is_dom0less_mode(void)
 {
     struct bootmodules *mods = &bootinfo.modules;
@@ -679,7 +688,7 @@ static int __init alloc_xenstore_evtchn(struct domain *d)
     int rc;
 
     alloc.dom = d->domain_id;
-    alloc.remote_dom = hardware_domain->domain_id;
+    alloc.remote_dom = xs_domid;
     rc = evtchn_alloc_unbound(&alloc, 0);
     if ( rc )
     {
@@ -745,16 +754,10 @@ static int __init alloc_xenstore_params(struct kernel_info *kinfo)
     struct domain *d = kinfo->d;
     int rc = 0;
 
-    if ( kinfo->dom0less_feature & (DOM0LESS_XENSTORE | DOM0LESS_XS_LEGACY) )
-    {
-        ASSERT(hardware_domain);
-        rc = alloc_xenstore_evtchn(d);
-        if ( rc < 0 )
-            return rc;
+    if ( (kinfo->dom0less_feature & (DOM0LESS_XENSTORE | DOM0LESS_XS_LEGACY))
+                                 == (DOM0LESS_XENSTORE | DOM0LESS_XS_LEGACY) )
         d->arch.hvm.params[HVM_PARAM_STORE_PFN] = ~0ULL;
-    }
-
-    if ( kinfo->dom0less_feature & DOM0LESS_XENSTORE )
+    else if ( kinfo->dom0less_feature & DOM0LESS_XENSTORE )
     {
         rc = alloc_xenstore_page(d);
         if ( rc < 0 )
@@ -764,6 +767,30 @@ static int __init alloc_xenstore_params(struct kernel_info *kinfo)
     return rc;
 }
 
+static void __init initialize_domU_xenstore(void)
+{
+    struct domain *d;
+
+    if ( xs_domid == DOMID_INVALID )
+        return;
+
+    for_each_domain( d )
+    {
+        uint64_t gfn = d->arch.hvm.params[HVM_PARAM_STORE_PFN];
+        int rc;
+
+        if ( gfn == 0 )
+            continue;
+
+        if ( is_xenstore_domain(d) )
+            continue;
+
+        rc = alloc_xenstore_evtchn(d);
+        if ( rc < 0 )
+            panic("%pd: Failed to allocate xenstore_evtchn\n", d);
+    }
+}
+
 static void __init domain_vcpu_affinity(struct domain *d,
                                         const struct dt_device_node *node)
 {
@@ -899,17 +926,13 @@ static int __init construct_domU(struct domain *d,
          rc == -ENODATA ||
          (rc == 0 && !strcmp(dom0less_enhanced, "enabled")) )
     {
-        if ( hardware_domain )
-            kinfo.dom0less_feature = DOM0LESS_ENHANCED;
-        else
-            panic("At the moment, Xenstore support requires dom0 to be present\n");
+        need_xenstore = true;
+        kinfo.dom0less_feature = DOM0LESS_ENHANCED;
     }
     else if ( rc == 0 && !strcmp(dom0less_enhanced, "legacy") )
     {
-        if ( hardware_domain )
-            kinfo.dom0less_feature = DOM0LESS_ENHANCED_LEGACY;
-        else
-            panic("At the moment, Xenstore support requires dom0 to be present\n");
+        need_xenstore = true;
+        kinfo.dom0less_feature = DOM0LESS_ENHANCED_LEGACY;
     }
     else if ( rc == 0 && !strcmp(dom0less_enhanced, "no-xenstore") )
         kinfo.dom0less_feature = DOM0LESS_ENHANCED_NO_XS;
@@ -1156,7 +1179,15 @@ void __init create_domUs(void)
         if ( rc )
             panic("Could not set up domain %s (rc = %d)\n",
                   dt_node_name(node), rc);
+
+        if ( d_cfg.flags & XEN_DOMCTL_CDF_xs_domain )
+            set_xs_domain(d);
     }
+
+    if ( need_xenstore && xs_domid == DOMID_INVALID )
+        panic("xenstore requested, but xenstore domain not present\n");
+
+    initialize_domU_xenstore();
 }
 
 /*
diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
index 0a329f9f5e..270a6b97e4 100644
--- a/xen/arch/arm/domain_build.c
+++ b/xen/arch/arm/domain_build.c
@@ -2408,6 +2408,8 @@ void __init create_dom0(void)
     rc = construct_dom0(dom0);
     if ( rc )
         panic("Could not set up DOM0 guest OS (rc = %d)\n", rc);
+
+    set_xs_domain(dom0);
 }
 
 /*
diff --git a/xen/arch/arm/include/asm/dom0less-build.h b/xen/arch/arm/include/asm/dom0less-build.h
index 5864944bda..b0e41a1954 100644
--- a/xen/arch/arm/include/asm/dom0less-build.h
+++ b/xen/arch/arm/include/asm/dom0less-build.h
@@ -9,6 +9,7 @@
 
 void create_domUs(void);
 bool is_dom0less_mode(void);
+void set_xs_domain(struct domain *d);
 
 #else /* !CONFIG_DOM0LESS_BOOT */
 
@@ -17,6 +18,7 @@ static inline bool is_dom0less_mode(void)
 {
     return false;
 }
+static inline void set_xs_domain(struct domain *d) {}
 
 #endif /* CONFIG_DOM0LESS_BOOT */
 
-- 
2.49.0



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From: Jason Andryuk 
To: 
CC: Jason Andryuk , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" , Andrew Cooper
	, Anthony PERARD , "Jan
 Beulich" , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	
Subject: [PATCH v5 0/7] ARM split hardware and control domains
Date: Wed, 16 Apr 2025 17:29:04 -0400
Message-ID: <20250416212911.410946-1-jason.andryuk@amd.com>
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This series implements separation of dom0 into separate hardware and
control domains.  It uses the capabilities idea from Hyperlaunch -
hardware, control, and xenstore.  It's been tested with dom1 as
control, dom2 as a domU, and dom3 as hardware and xenstore.

To keep things more managable, this is only the ARM hypervisor changes,
and one associated init-dom0less change.  The series is slightly
re-ordered to move xenstore changes ahead of adding the capabilities.

Setting hardware domain as domid 0 is removed.

v5 is fully reviewed.

I've been unable to run a combined control/xenstore.  Linux console
output stops shortly after the domain determines it should be XS_LOCAL.
I have not investigated further.  An ARM xenstore domain also has
console output stop at seemingly the same place.

Daniel P. Smith (1):
  xen: introduce hardware domain create flag

Jason Andryuk (6):
  xen/arm: dom0less hwdom construction
  xen/arm: dom0less delay xenstore initialization
  xen/arm: dom0less seed xenstore grant table entry
  tools/init-dom0less: Only seed legacy xenstore grants
  xen/arm: dom0less use has_dtb local variable
  xen/arm: Add capabilities to dom0less

 docs/misc/arm/device-tree/booting.txt     |  11 ++
 tools/helpers/init-dom0less.c             |  10 +-
 xen/arch/arm/dom0less-build.c             | 197 ++++++++++++++++------
 xen/arch/arm/domain.c                     |   3 +-
 xen/arch/arm/domain_build.c               |  11 +-
 xen/arch/arm/include/asm/dom0less-build.h |   2 +
 xen/arch/arm/include/asm/domain_build.h   |   3 +-
 xen/arch/x86/setup.c                      |   3 +-
 xen/common/domain.c                       |  19 ++-
 xen/common/grant_table.c                  |  14 ++
 xen/include/public/bootfdt.h              |  31 ++++
 xen/include/xen/domain.h                  |   2 +
 xen/include/xen/grant_table.h             |   4 +
 xen/include/xen/types.h                   |   1 +
 14 files changed, 247 insertions(+), 64 deletions(-)
 create mode 100644 xen/include/public/bootfdt.h

-- 
2.49.0



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From: Jason Andryuk 
To: 
CC: Jason Andryuk , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" 
Subject: [PATCH v5 2/7] xen/arm: dom0less hwdom construction
Date: Wed, 16 Apr 2025 17:29:06 -0400
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When creating a hardware domain, have the dom0less code call
construct_hwdom() which is shared with the dom0 code.  The hardware
domain requires building that best matches the dom0 build path.  Re-use
it to keep them in sync.

The device tree node of the dom0less config is now passed into
construct_hwdom().  dom0 uses /chosen for process_shm while a hwdom will
use the value from its dom0less device tree node.

Signed-off-by: Jason Andryuk 
Reviewed-by: Stefano Stabellini 
---
v5:
Add R-b: Stefano

v3:
Rebase on process_shm_chosen() removal
---
 xen/arch/arm/dom0less-build.c           | 57 ++++++++++++++-----------
 xen/arch/arm/domain_build.c             |  7 +--
 xen/arch/arm/include/asm/domain_build.h |  3 +-
 3 files changed, 39 insertions(+), 28 deletions(-)

diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c
index bd15563750..7bc6a6c4d7 100644
--- a/xen/arch/arm/dom0less-build.c
+++ b/xen/arch/arm/dom0less-build.c
@@ -929,36 +929,45 @@ static int __init construct_domU(struct domain *d,
     /* type must be set before allocate memory */
     d->arch.type = kinfo.type;
 #endif
-    if ( !dt_find_property(node, "xen,static-mem", NULL) )
-        allocate_memory(d, &kinfo);
-    else if ( !is_domain_direct_mapped(d) )
-        allocate_static_memory(d, &kinfo, node);
-    else
-        assign_static_memory_11(d, &kinfo, node);
-
-    rc = process_shm(d, &kinfo, node);
-    if ( rc < 0 )
-        return rc;
-
-    /*
-     * Base address and irq number are needed when creating vpl011 device
-     * tree node in prepare_dtb_domU, so initialization on related variables
-     * shall be done first.
-     */
-    if ( kinfo.vpl011 )
+    if ( is_hardware_domain(d) )
     {
-        rc = domain_vpl011_init(d, NULL);
+        rc = construct_hwdom(&kinfo, node);
         if ( rc < 0 )
             return rc;
     }
+    else
+    {
+        if ( !dt_find_property(node, "xen,static-mem", NULL) )
+            allocate_memory(d, &kinfo);
+        else if ( !is_domain_direct_mapped(d) )
+            allocate_static_memory(d, &kinfo, node);
+        else
+            assign_static_memory_11(d, &kinfo, node);
 
-    rc = prepare_dtb_domU(d, &kinfo);
-    if ( rc < 0 )
-        return rc;
+        rc = process_shm(d, &kinfo, node);
+        if ( rc < 0 )
+            return rc;
 
-    rc = construct_domain(d, &kinfo);
-    if ( rc < 0 )
-        return rc;
+        /*
+         * Base address and irq number are needed when creating vpl011 device
+         * tree node in prepare_dtb_domU, so initialization on related variables
+         * shall be done first.
+         */
+        if ( kinfo.vpl011 )
+        {
+            rc = domain_vpl011_init(d, NULL);
+            if ( rc < 0 )
+                return rc;
+        }
+
+        rc = prepare_dtb_domU(d, &kinfo);
+        if ( rc < 0 )
+            return rc;
+
+        rc = construct_domain(d, &kinfo);
+        if ( rc < 0 )
+            return rc;
+    }
 
     domain_vcpu_affinity(d, node);
 
diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
index b8f282ff10..0a329f9f5e 100644
--- a/xen/arch/arm/domain_build.c
+++ b/xen/arch/arm/domain_build.c
@@ -2305,10 +2305,11 @@ static int __init construct_dom0(struct domain *d)
     if ( rc < 0 )
         return rc;
 
-    return construct_hwdom(&kinfo);
+    return construct_hwdom(&kinfo, NULL);
 }
 
-int __init construct_hwdom(struct kernel_info *kinfo)
+int __init construct_hwdom(struct kernel_info *kinfo,
+                           const struct dt_device_node *node)
 {
     struct domain *d = kinfo->d;
     int rc;
@@ -2327,7 +2328,7 @@ int __init construct_hwdom(struct kernel_info *kinfo)
 
     if ( acpi_disabled )
     {
-        rc = process_shm(d, kinfo, NULL);
+        rc = process_shm(d, kinfo, node);
         if ( rc < 0 )
             return rc;
     }
diff --git a/xen/arch/arm/include/asm/domain_build.h b/xen/arch/arm/include/asm/domain_build.h
index 134290853c..17619c875d 100644
--- a/xen/arch/arm/include/asm/domain_build.h
+++ b/xen/arch/arm/include/asm/domain_build.h
@@ -13,7 +13,8 @@ bool allocate_bank_memory(struct kernel_info *kinfo, gfn_t sgfn,
                           paddr_t tot_size);
 void allocate_memory(struct domain *d, struct kernel_info *kinfo);
 int construct_domain(struct domain *d, struct kernel_info *kinfo);
-int construct_hwdom(struct kernel_info *kinfo);
+int construct_hwdom(struct kernel_info *kinfo,
+                    const struct dt_device_node *node);
 int domain_fdt_begin_node(void *fdt, const char *name, uint64_t unit);
 int make_chosen_node(const struct kernel_info *kinfo);
 int make_cpus_node(const struct domain *d, void *fdt);
-- 
2.49.0



From xen-devel-bounces@lists.xenproject.org Wed Apr 16 21:50:57 2025
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Date: Wed, 16 Apr 2025 14:50:46 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Julien Grall 
cc: Mykyta Poturai , 
    Stefano Stabellini , 
    "xen-devel@lists.xenproject.org" , 
    Bertrand Marquis , 
    Michal Orzel , 
    Volodymyr Babchuk , 
    Rahul Singh 
Subject: Re: [PATCH v2 0/2] Add support for MSI injection on Arm
In-Reply-To: 
Message-ID: 
References:  <98feb427-7da5-47ff-831c-2b4bcb26c4b9@xen.org>  <15938705-ae5e-43c9-826f-d7a8c7425baa@epam.com>
 
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On Wed, 16 Apr 2025, Julien Grall wrote:
> (+ Rahul)
> 
> On 16/04/2025 17:37, Mykyta Poturai wrote:
> > On 16.04.25 01:40, Stefano Stabellini wrote:
> > > On Mon, 14 Apr 2025, Julien Grall wrote:
> > > > Hi Mykyta,
> > > > 
> > > > On 14/04/2025 18:51, Mykyta Poturai wrote:
> > > > > This series adds the base support for MSI injection on Arm. This is
> > > > > needed to streamline virtio-pci interrupt triggering.
> > > > > 
> > > > > With this patches, MSIs can be triggered in guests by issuing the new
> > > > > DM op, inject_msi2. This op is similar to inject_msi, but it allows
> > > > > to specify the source id of the MSI.
> > > > > 
> > > > > We chose the approach of adding a new DM op instead of using the pad
> > > > > field of inject_msi because we have no clear way of distinguishing
> > > > > between set and unset pad fields. New implementations also adds flags
> > > > > field to clearly specify if the SBDF is set.
> > > > > 
> > > > > Patches were tested on QEMU with
> > > > 
> > > > [...]
> > > > 
> > > > > patches for ITS support for DomUs applied.
> > > > 
> > > > This means this series is unusable without external patches. Given this
> > > > is
> > > > adding a new DM operations, I think it would be more sensible to have
> > > > the vITS
> > > > support merged first. Then we can look at merging this series.
> > > 
> > > Hi Mykyta, just checking explicitly with you whether this series
> > > requires vgic-v3-its.c for DomUs?
> > > 
> > > If yes, how far are you from sending the relevant patches to xen-devel?
> > > How many are they?
> > 
> > Hi Stefano,
> > Yes, I am planning to send them together with VPCI MSI support after
> > SMMU patches are merged.
> > 
> > Although the DomU vits itself is only two patches.
> 
> I am assuming this is work in progress patches rather than the one you plan to
> send, correct?
> 
> Asking, because currently there are a few ASSERT(is_hardware_domain(its->d))
> to indicate where changes are likely for the guests. You seem to remove them
> without explaining why or any associated code.
> 
> While I will not ask to have a security support guest vITS from the start. I
> would like some confidence that we are going in the right direction. IOW, I
> would like to see a design document that would explain how we can achieve it.
> Some of the part to consider:
>   * Command queue
>   * LPIs
>   * 1:1 pITS <-> vITS vs one vITS to many pITS
>   * The page-tables are shared between the device and CPU. Are we ok to keep
> the doorbell writable by the CPU?
> 
> There was some discussion in the past about it (I have added Rahul because
> IIRC he was driving the discussion). So most likely, we would need the design
> to be respinned and agreed first.
> 
> Lastly, I see you seem to go down the route of exposing one vITS only. But I
> don't think your patch is sufficient to support multiple pITS (the guest
> doorbell will be mapped to a different host doorbell depending on the guest).

To add to what Julien wrote, one thing is enabling a component with some
limitations, such as lacking a given feature. That might be OK.

A different thing is lack of isolation between VMs, or introducing a new
vehicle for interference, e.g. one VM using vITS causing troubles to
another VM using vITS.

Lack of isolation and interference are not OK. We need to be very
careful and be very aware if there any constraints or limitations we are
hitting against (e.g. size of the command queue) where one VM could
cause a denial of service to another VM because it is exhausting a given
physical resource.


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Date: Wed, 16 Apr 2025 14:54:06 -0700 (PDT)
From: Stefano Stabellini 
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To: Andrew Cooper 
cc: Stefano Stabellini , 
    Xen-devel , 
    =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , 
    Anthony PERARD , 
    Michal Orzel , Doug Goldstein 
Subject: Re: [PATCH v3 2/6] CI: avoid repacking initrd as part of the test
 job
In-Reply-To: <2e2156cc-1bf0-4585-bb31-faca5321fec3@citrix.com>
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References: <20250414110903.2355303-1-andrew.cooper3@citrix.com> <20250414110903.2355303-3-andrew.cooper3@citrix.com>  <2e2156cc-1bf0-4585-bb31-faca5321fec3@citrix.com>
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On Wed, 16 Apr 2025, Andrew Cooper wrote:
> On 16/04/2025 12:48 am, Stefano Stabellini wrote:
> >> diff --git a/automation/scripts/qubes-x86-64.sh b/automation/scripts/qubes-x86-64.sh
> >> index c4be71464246..e2376cb51cb4 100755
> >> --- a/automation/scripts/qubes-x86-64.sh
> >> +++ b/automation/scripts/qubes-x86-64.sh
> >> @@ -164,16 +164,13 @@ ${domU_extra_config}
> >>  "
> >>  
> >>  if [ -n "$domU_check" ]; then
> >> -    # DomU
> >> +    # DomU rootfs
> >> +    cp binaries/rootfs.cpio.gz binaries/domU-rootfs.cpio.gz
> >> +
> >> +    # test-local configuration
> >>      mkdir -p rootfs
> >>      cd rootfs
> >> -    # fakeroot is needed to preserve device nodes in rootless podman container
> >> -    fakeroot -s ../fakeroot-save tar xzf ../binaries/initrd.tar.gz
> >> -    mkdir proc
> >> -    mkdir run
> >> -    mkdir srv
> >> -    mkdir sys
> >> -    rm var/run
> >> +    mkdir -p etc/local.d
> >>      echo "#!/bin/sh
> > I am worried about the drop of fakeroot because the newly created dirs
> > and files we'll have user as owner instead of root.
> >
> > I suggest we fix this for consistency, and cpio -R 0:0 might suffice.
> 
> https://gitlab.com/xen-project/hardware/xen-staging/-/jobs/9737393986#L1087
> 
> It seems to be all root anyway.  I'm not entirely sure why, but it does
> explain why everything is working, given the attempt to have non-root
> containers.

Hi Andrew, thank you for looking into this. I am truly surprised to see
xen.start marked as root.root. Given that it is what we want I will not
complain though :-)
--8323329-364384658-1744840448=:8008--


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Date: Wed, 16 Apr 2025 14:55:21 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Grygorii Strashko 
cc: "xen-devel@lists.xenproject.org" , 
    Stefano Stabellini , 
    Oleksandr Tyshchenko , 
    Alejandro Vallejo 
Subject: Re: [ImageBuilder v2] uboot-script-gen: fix arm64 xen u-boot image
 generation
In-Reply-To: <20250416165014.2263305-1-grygorii_strashko@epam.com>
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On Wed, 16 Apr 2025, Grygorii Strashko wrote:
> From: Grygorii Strashko 
> 
> The current code in generate_uboot_images() does not detect arm64 properly
> and always generates ARM u-boot image, because below command
>  file -L $XEN
> returns string which may contain "Aarch64" or "ARM64", and, in the later
> case, the current code will mistakenly identify Xen binary as "ARM".
> This causes Xen boot issues.
> 
> Fix it by searching for "ARM64|Aarch64" for AArch64 binary detection.
> 
> - mkimage -l xen.ub
> Before:
>  Image Type:   ARM Linux Kernel Image (uncompressed)
> 
> After:
>  Image Type:   AArch64 Linux Kernel Image (uncompressed)
> 
> Signed-off-by: Grygorii Strashko 

Reviewed-by: Stefano Stabellini 


> ---
> changes in v2:
> - check for "Aarch64" in addition to "ARM64"
> 
>  scripts/uboot-script-gen | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/scripts/uboot-script-gen b/scripts/uboot-script-gen
> index 527b70dfdc4b..f3ca787e557f 100755
> --- a/scripts/uboot-script-gen
> +++ b/scripts/uboot-script-gen
> @@ -824,13 +824,13 @@ function linux_config()
>  
>  generate_uboot_images()
>  {
> -    local arch=$(file -L $XEN | grep "ARM")
> +    local arch=$(file -L $XEN | grep -E 'ARM64|Aarch64')
>  
>      if test "$arch"
>      then
> -        arch=arm
> -    else
>          arch=arm64
> +    else
> +        arch=arm
>      fi
>  
>      mkimage -A $arch -T kernel -C none -a $memaddr -e $memaddr -d $XEN "$XEN".ub
> -- 
> 2.34.1
> 


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Date: Wed, 16 Apr 2025 15:03:44 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Grygorii Strashko 
cc: "xen-devel@lists.xenproject.org" , 
    Stefano Stabellini , 
    Oleksandr Tyshchenko , 
    Alejandro Vallejo 
Subject: Re: [ImageBuilder v2] uboot-script-gen: add xen xsm policy loading
 support
In-Reply-To: <20250415070128.1938253-1-grygorii_strashko@epam.com>
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On Tue, 15 Apr 2025, Grygorii Strashko wrote:
> From: Grygorii Strashko 
> 
> This patch adds Xen XSM policy loading support.
> 
> The configuration file XEN_POLICY specifies Xen hypervisor
> XSM policy binary to load.
> 
> Signed-off-by: Grygorii Strashko 
> ---
> changes in v2:
> - fix conditional statements for XEN_POLICY
> - add XSM policy binary check
> 
>  README.md                |  2 ++
>  scripts/uboot-script-gen | 34 ++++++++++++++++++++++++++++++++++
>  2 files changed, 36 insertions(+)
> 
> diff --git a/README.md b/README.md
> index 137abef153ce..9106d2a07302 100644
> --- a/README.md
> +++ b/README.md
> @@ -91,6 +91,8 @@ Where:
>  - XEN specifies the Xen hypervisor binary to load. Note that it has to
>    be a regular Xen binary, not a u-boot binary.
>  
> +- XEN_POLICY specifies the Xen hypervisor XSM policy binary to load.
> +
>  - XEN_COLORS specifies the colors (cache coloring) to be used for Xen
>    and is in the format startcolor-endcolor
>  
> diff --git a/scripts/uboot-script-gen b/scripts/uboot-script-gen
> index c4d26caf5e0e..208eafdecfeb 100755
> --- a/scripts/uboot-script-gen
> +++ b/scripts/uboot-script-gen
> @@ -315,6 +315,15 @@ function xen_device_tree_editing()
>      dt_set "/chosen" "#size-cells" "hex" "0x2"
>      dt_set "/chosen" "xen,xen-bootargs" "str" "$XEN_CMD"
>  
> +    if test -n "$XEN_POLICY" && test "$xen_policy_addr" != "-"
> +    then
> +        local node_name="xen-policy@${xen_policy_addr#0x}"
> +
> +        dt_mknode "/chosen" "$node_name"
> +        dt_set "/chosen/$node_name" "compatible" "str_a" "xen,xsm-policy xen,multiboot-module multiboot,module"
> +        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $xen_policy_addr $xen_policy_size)"
> +    fi
> +
>      if test "$DOM0_KERNEL"
>      then
>          local node_name="dom0@${dom0_kernel_addr#0x}"
> @@ -900,6 +909,15 @@ xen_file_loading()
>      kernel_addr=$memaddr
>      kernel_path=$XEN
>      load_file "$XEN" "host_kernel"
> +
> +    xen_policy_addr="-"
> +    if test -n "$XEN_POLICY"
> +    then
> +        check_file_type "${XEN_POLICY}" "SE Linux policy"
> +        xen_policy_addr=$memaddr
> +        load_file "$XEN_POLICY" "xen_policy"
> +        xen_policy_size=$filesize
> +    fi
>  }
>  
>  linux_file_loading()
> @@ -939,6 +957,22 @@ bitstream_load_and_config()
>  
>  create_its_file_xen()
>  {
> +    if test -n "$XEN_POLICY" && test "$xen_policy_addr" != "-"
> +    then
> +        cat >> "$its_file" <<- EOF
> +        xen_policy {
> +            description = "Xen XSM policy binary";
> +            data = /incbin/("$XEN_POLICY");
> +            type = "kernel";

This should be "firmware". Aside from that, the patch is fine.
If you are OK with it, I can fix it on commit.



> +            arch = "arm64";
> +            os = "linux";
> +            compression = "none";
> +            load = <$xen_policy_addr>;
> +            $fit_algo
> +        };
> +	EOF
> +    fi
> +
>      if test "$DOM0_KERNEL"
>      then
>          if test "$ramdisk_addr" != "-"
> -- 
> 2.34.1
> 


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Date: Wed, 16 Apr 2025 16:03:17 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Michal Orzel 
cc: xen-devel@lists.xenproject.org, Doug Goldstein , 
    Stefano Stabellini 
Subject: Re: [PATCH v2] CI: Add Arm64/Arm32 MPU build jobs
In-Reply-To: <20250416082130.236530-1-michal.orzel@amd.com>
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On Wed, 16 Apr 2025, Michal Orzel wrote:
> Just like for RISCV and PPC, the earlier we enable the CI build the
> better.
> 
> Signed-off-by: Michal Orzel 

Reviewed-by: Stefano Stabellini 


> ---
> Changes in v2:
>  - add Arm32 job given recently committed series
> 
> Pipeline:
> https://gitlab.com/xen-project/people/morzel/xen/-/pipelines/1771015642
> ---
>  automation/gitlab-ci/build.yaml | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
> 
> diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml
> index ac5367874526..ab5211f77e5e 100644
> --- a/automation/gitlab-ci/build.yaml
> +++ b/automation/gitlab-ci/build.yaml
> @@ -379,6 +379,16 @@ debian-bookworm-gcc-arm32-debug-earlyprintk:
>        CONFIG_EARLY_UART_CHOICE_PL011=y
>        CONFIG_EARLY_UART_BASE_ADDRESS=0x9000000
>  
> +debian-bookworm-gcc-arm32-debug-mpu:
> +  extends: .gcc-arm32-cross-build-debug
> +  variables:
> +    CONTAINER: debian:bookworm-arm64v8-arm32-gcc
> +    HYPERVISOR_ONLY: y
> +    EXTRA_XEN_CONFIG: |
> +      CONFIG_XEN_START_ADDRESS=0x0
> +      CONFIG_MPU=y
> +      CONFIG_UNSUPPORTED=y
> +
>  # Arm builds
>  
>  debian-bookworm-gcc-arm64:
> @@ -443,6 +453,16 @@ alpine-3.18-gcc-debug-arm64-earlyprintk:
>        CONFIG_EARLY_UART_CHOICE_PL011=y
>        CONFIG_EARLY_UART_BASE_ADDRESS=0x9000000
>  
> +alpine-3.18-gcc-debug-arm64-mpu:
> +  extends: .gcc-arm64-build-debug
> +  variables:
> +    CONTAINER: alpine:3.18-arm64v8
> +    HYPERVISOR_ONLY: y
> +    EXTRA_XEN_CONFIG: |
> +      CONFIG_XEN_START_ADDRESS=0x0
> +      CONFIG_MPU=y
> +      CONFIG_UNSUPPORTED=y
> +
>  # Yocto test jobs
>  yocto-qemuarm64:
>    extends: .yocto-test-arm64
> -- 
> 2.25.1
> 
> 


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From: Fabian Specht 
To: xen-devel@lists.xenproject.org
Cc: manuel.andreas@tum.de
Subject: x86 emulation bug
Message-ID: 
MIME-Version: 1.0
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--dtn5ecljjtysyige
Content-Type: text/plain; charset=us-ascii
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Dear all,

we discovered a bug in hvm64 x86 Xen. Using the attached xtf test we are
able to trigger an assert in arch/x86/hvm/emulate.c:


if ( (hvmemul_ctxt->ctxt.regs->eflags & X86_EFLAGS_DF) && (reps > 1) )
{
	/*
	 * x86_emulate() clips the repetition count to ensure we don't wrap
	 * the effective-address index register. Hence this assertion holds.
	 */
	ASSERT(offset >= ((reps - 1) * bytes_per_rep));
	okay = hvm_virtual_to_linear_addr(
		seg, reg, offset - (reps - 1) * bytes_per_rep,
		reps * bytes_per_rep, access_type,
		hvmemul_get_seg_reg(x86_seg_cs, hvmemul_ctxt), linear);
	*linear += (reps - 1) * bytes_per_rep;
	if ( hvmemul_ctxt->ctxt.addr_size != 64 )
		*linear = (uint32_t)*linear;
}


If debug mode is not enabled, this will later on result in an integer
underflow, however we were not able to find any severe problems.

The test below will not work with vanilla xtf. To get it working,
we have to edit 'pae_l1_identmap' in arch/x86/hvm/pagetables.S in xtf
from


PAGETABLE_START(pae_l1_identmap)
        .long 0, 0
        .rept PAE_L1_PT_ENTRIES - 1
        .long (PAE_IDX(pae_l1_identmap) << PAE_L1_PT_SHIFT) + _PAGE_LEAF
        .long 0
        .endr
PAGETABLE_END(pae_l1_identmap)


to the following value:


PAGETABLE_START(pae_l1_identmap)
        .quad (0x5564000000) + _PAGE_LEAF
        .rept PAE_L1_PT_ENTRIES - 1
        .long (PAE_IDX(pae_l1_identmap) << PAE_L1_PT_SHIFT) + _PAGE_LEAF
        .long 0
        .endr
PAGETABLE_END(pae_l1_identmap)



We were able to reproduce this bug in several versions including the
most current one at the time of writing this.


Best,
Fabian

--dtn5ecljjtysyige
Content-Type: text/plain; charset=us-ascii
Content-Disposition: attachment; filename="main.c"

/**
 * @file tests/poc/main.c
 * @ref test-poc
 *
 * @page test-poc poc
 *
 * @todo Docs for test-poc
 *
 * @see tests/poc/main.c
 */
#include 

const char test_title[] = "Test poc";

void test_main(void)
{
	printk("Starting up reps offset assert poc!\n");

    asm volatile ( 
        "mov $0xd000f8, %%eax;"
        "mov $0x0, %%rdi;"
        "mov $0x1900000000000000, %%rcx;"
        "std;"
        "rep stos %%eax, %%es:(%%rdi);"
        ::: "memory", "cc", "rax", "rdi", "rcx"
    );

    printk("Unreachable with enabled debug asserts!\n");
    xtf_success(NULL);
    xtf_success(NULL);
}

/*
 * Local variables:
 * mode: C
 * c-file-style: "BSD"
 * c-basic-offset: 4
 * tab-width: 4
 * indent-tabs-mode: nil
 * End:
 */

--dtn5ecljjtysyige--


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Date: Wed, 16 Apr 2025 17:11:51 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: dmkhn@proton.me
cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, 
    cardoe@cardoe.com, marmarek@invisiblethingslab.com, sstabellini@kernel.org, 
    dmukhin@ford.com
Subject: Re: [PATCH v1 4/4] CI: add argo x86 XTF test
In-Reply-To: <20250416053213.921444-5-dmukhin@ford.com>
Message-ID: 
References: <20250416053213.921444-1-dmukhin@ford.com> <20250416053213.921444-5-dmukhin@ford.com>
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On Wed, 16 Apr 2025, dmkhn@proton.me wrote:
> From: Denis Mukhin 
> 
> Introduce new CI job to run x86 XTF argo test under QEMU to smoke test argo
> feature functionality in upstream CI.
> 
> The new job lead time is ~30s, limit max job duration to 60s.
> 
> Signed-off-by: Denis Mukhin 
> ---
>  automation/gitlab-ci/test.yaml        | 9 +++++++++
>  automation/scripts/include/xtf-runner | 7 +++++++
>  2 files changed, 16 insertions(+)
> 
> diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml
> index d6e4a0a622..9001efb45c 100644
> --- a/automation/gitlab-ci/test.yaml
> +++ b/automation/gitlab-ci/test.yaml
> @@ -691,6 +691,15 @@ qemu-smoke-x86-64-gcc-efi:
>    needs:
>      - debian-12-x86_64-gcc-debug
>  
> +qemu-xtf-argo-x86_64-gcc-debug:
> +  extends: .qemu-smoke-x86-64
> +  variables:
> +    TEST_TIMEOUT_OVERRIDE: 60
> +  script:
> +    - ./automation/scripts/qemu-xtf.sh x86-64 pv64 argo 2>&1 | tee ${LOGFILE}
> +  needs:
> +    - alpine-3.18-gcc-debug
> +
>  qemu-smoke-riscv64-gcc:
>    extends: .qemu-riscv64
>    script:
> diff --git a/automation/scripts/include/xtf-runner b/automation/scripts/include/xtf-runner
> index 55b7b34b89..12470b3979 100644
> --- a/automation/scripts/include/xtf-runner
> +++ b/automation/scripts/include/xtf-runner
> @@ -70,6 +70,9 @@ function xtf_build_cmdline()
>      local xtf_variant=$1
>      local xtf_name=$2
>      declare -a cmdline=()
> +    declare -A per_test_args=(
> +        [argo]="argo=1 mac-permissive=1"
> +    )
> +
>      cmdline+=("loglvl=all noreboot console_timestamps=boot")
>      cmdline+=("console=${XEN_CONSOLE}")
> @@ -79,6 +82,10 @@ function xtf_build_cmdline()
>          cmdline+=("dom0-iommu=none dom0=pvh")
>      fi
>  
> +    if [[ -v per_test_args[${xtf_name}] ]]; then
> +        cmdline+=("${per_test_args[${xtf_name}]}")
> +    fi
> +

This is all within the same bash function so I think we could avoid
using the per_test_args array and just do:

if test "$xtf_name"
then
    cmdline+=("argo=1 mac-permissive=1")
fi

The indirection is not required as far as I can tell. I do realize it is
a matter of taste and it works either way so I wouldn't insist.



>      export XEN_CMDLINE="${cmdline[@]}"
>  }
>  
> -- 
> 2.34.1
> 
> 


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Date: Wed, 16 Apr 2025 17:12:55 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: dmkhn@proton.me
cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, 
    cardoe@cardoe.com, marmarek@invisiblethingslab.com, sstabellini@kernel.org, 
    dmukhin@ford.com
Subject: Re: [PATCH v1 3/4] CI: switch arm64 XTF test runner to qemu-xtf.sh
In-Reply-To: <20250416053213.921444-4-dmukhin@ford.com>
Message-ID: 
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On Wed, 16 Apr 2025, dmkhn@proton.me wrote:
> From: Denis Mukhin 
> 
> Hook arm64 QEMU configuration to qemu-xtf.sh and use new script in arm64 CI
> jobs.
> 
> Signed-off-by: Denis Mukhin 

Reviewed-by: Stefano Stabellini 


> ---
>  automation/gitlab-ci/test.yaml                |  4 +-
>  automation/scripts/.gitignore                 |  3 +
>  .../scripts/include/configs/xtf-arm64-config  |  2 +
>  automation/scripts/include/xtf-arm64          | 81 +++++++++++++++++++
>  automation/scripts/qemu-xtf-dom0less-arm64.sh | 68 ----------------
>  5 files changed, 88 insertions(+), 70 deletions(-)
>  create mode 100644 automation/scripts/include/configs/xtf-arm64-config
>  create mode 100644 automation/scripts/include/xtf-arm64
>  delete mode 100755 automation/scripts/qemu-xtf-dom0less-arm64.sh
> 
> diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml
> index ca1e4eb528..d6e4a0a622 100644
> --- a/automation/gitlab-ci/test.yaml
> +++ b/automation/gitlab-ci/test.yaml
> @@ -571,7 +571,7 @@ qemu-smoke-dom0less-arm64-gcc-debug-earlyprintk:
>  qemu-xtf-dom0less-arm64-gcc-hyp-xen-version:
>    extends: .qemu-arm64
>    script:
> -    - ./automation/scripts/qemu-xtf-dom0less-arm64.sh hyp-xen-version 2>&1 | tee ${LOGFILE}
> +    - ./automation/scripts/qemu-xtf.sh arm64 mmu64le hyp-xen-version 2>&1 | tee ${LOGFILE}
>    needs:
>      - alpine-3.18-gcc-arm64
>      - qemu-system-aarch64-6.0.0-arm64-export
> @@ -579,7 +579,7 @@ qemu-xtf-dom0less-arm64-gcc-hyp-xen-version:
>  qemu-xtf-dom0less-arm64-gcc-debug-hyp-xen-version:
>    extends: .qemu-arm64
>    script:
> -    - ./automation/scripts/qemu-xtf-dom0less-arm64.sh hyp-xen-version 2>&1 | tee ${LOGFILE}
> +    - ./automation/scripts/qemu-xtf.sh arm64 mmu64le hyp-xen-version 2>&1 | tee ${LOGFILE}
>    needs:
>      - alpine-3.18-gcc-debug-arm64
>      - qemu-system-aarch64-6.0.0-arm64-export
> diff --git a/automation/scripts/.gitignore b/automation/scripts/.gitignore
> index 2f2d6e1ebd..f853da4d89 100644
> --- a/automation/scripts/.gitignore
> +++ b/automation/scripts/.gitignore
> @@ -1,6 +1,9 @@
>  !include
>  
>  binaries
> +imagebuilder
>  smoke.serial
>  xen
>  xtf*/
> +
> +*.rom
> diff --git a/automation/scripts/include/configs/xtf-arm64-config b/automation/scripts/include/configs/xtf-arm64-config
> new file mode 100644
> index 0000000000..9942740927
> --- /dev/null
> +++ b/automation/scripts/include/configs/xtf-arm64-config
> @@ -0,0 +1,2 @@
> +CONFIG_GICV2=y
> +CONFIG_SBSA_UART=y
> diff --git a/automation/scripts/include/xtf-arm64 b/automation/scripts/include/xtf-arm64
> new file mode 100644
> index 0000000000..68487fe617
> --- /dev/null
> +++ b/automation/scripts/include/xtf-arm64
> @@ -0,0 +1,81 @@
> +#!/bin/bash
> +#
> +# XTF test utilities (arm64).
> +#
> +
> +# Arch-specific environment overrides.
> +function xtf_arch_prepare()
> +{
> +    export FW_PREFIX="${FW_PREFIX:-/usr/lib/u-boot/qemu_arm64/}"
> +    export QEMU_PREFIX="${QEMU_PREFIX:-${WORKDIR}/}"
> +    export XEN_BINARY="${XEN_BINARY:-${WORKDIR}/xen}"
> +    export XEN_CONSOLE="${XEN_CONSOLE:-dtuart}"
> +    export XTF_SRC_BRANCH="${XTF_SRC_BRANCH:-xtf-arm}"
> +    export XTF_SRC_URI="${XTF_SRC_URI:-https://gitlab.com/xen-project/fusa/xtf.git}"
> +    export XTF_SRC_VARIANTS="mmu64le"
> +}
> +
> +# Perform arch-specific XTF environment setup.
> +function xtf_arch_setup()
> +{
> +    # QEMU looks for "efi-virtio.rom" even if it is unneeded
> +    curl -fsSLO https://github.com/qemu/qemu/raw/v5.2.0/pc-bios/efi-virtio.rom
> +
> +    # Crude check for local testing
> +    if [ ! -d imagebuilder/.git ]; then
> +        git clone --depth 1 https://gitlab.com/xen-project/imagebuilder.git
> +    fi
> +
> +    cat > ${WORKDIR}/config < +MEMORY_START="0x40000000"
> +MEMORY_END="0xC0000000"
> +
> +XEN="xen"
> +DEVICE_TREE="virt-gicv2.dtb"
> +
> +XEN_CMD="${XEN_CMDLINE}"
> +
> +DOMU_KERNEL[0]="xtf-test"
> +DOMU_MEM[0]="128"
> +
> +NUM_DOMUS=1
> +
> +LOAD_CMD="tftpb"
> +UBOOT_SOURCE="boot.source"
> +UBOOT_SCRIPT="boot.scr"
> +EOF
> +    cp ${XTF_BINARY} ${WORKDIR}/xtf-test
> +
> +    # Generate virt-gicv2.dtb
> +    ${WORKDIR}/qemu-system-aarch64 \
> +        -machine virtualization=true \
> +        -cpu cortex-a57 \
> +        -machine type=virt \
> +        -m 2048 \
> +        -smp 2 \
> +        -display none \
> +        -machine dumpdtb=${WORKDIR}/virt-gicv2.dtb
> +
> +    # Generate U-Boot environment
> +    bash -x imagebuilder/scripts/uboot-script-gen \
> +        -t tftp \
> +        -d ${WORKDIR}/ \
> +        -c ${WORKDIR}/config
> +
> +    export TEST_CMD="${QEMU_PREFIX}qemu-system-aarch64 \
> +        -machine virtualization=true \
> +        -cpu cortex-a57 \
> +        -machine type=virt \
> +        -no-reboot \
> +        -nographic \
> +        -monitor none \
> +        -serial stdio \
> +        -m 2048 \
> +        -smp 2 \
> +        -device virtio-net-pci,netdev=n0 \
> +        -netdev user,id=n0,tftp=${WORKDIR} \
> +        -bios ${FW_PREFIX}u-boot.bin \
> +    "
> +
> +    export UBOOT_CMD="virtio scan; dhcp; tftpb 0x40000000 boot.scr; source 0x40000000"
> +}
> diff --git a/automation/scripts/qemu-xtf-dom0less-arm64.sh b/automation/scripts/qemu-xtf-dom0less-arm64.sh
> deleted file mode 100755
> index 436f460c3c..0000000000
> --- a/automation/scripts/qemu-xtf-dom0less-arm64.sh
> +++ /dev/null
> @@ -1,68 +0,0 @@
> -#!/bin/bash
> -
> -set -ex -o pipefail
> -
> -# Name of the XTF test
> -xtf_test=$1
> -
> -# Message returned by XTF in case of success
> -passed="Test result: SUCCESS"
> -
> -# XXX QEMU looks for "efi-virtio.rom" even if it is unneeded
> -curl -fsSLO https://github.com/qemu/qemu/raw/v5.2.0/pc-bios/efi-virtio.rom
> -./binaries/qemu-system-aarch64 \
> -   -machine virtualization=true \
> -   -cpu cortex-a57 -machine type=virt \
> -   -m 2048 -smp 2 -display none \
> -   -machine dumpdtb=binaries/virt-gicv2.dtb
> -
> -# XTF
> -# Build a single XTF test passed as a first parameter to the script.
> -# Build XTF with GICv2 support to match Qemu configuration and with SBSA UART
> -# support, so that the test will use an emulated UART for printing messages.
> -# This will allow us to run the test on both debug and non-debug Xen builds.
> -rm -rf xtf
> -git clone https://gitlab.com/xen-project/fusa/xtf.git -b xtf-arm
> -make -C xtf TESTS=tests/${xtf_test} CONFIG_SBSA_UART=y CONFIG_GICV2=y -j$(nproc)
> -cp xtf/tests/${xtf_test}/test-mmu64le-${xtf_test} binaries/xtf-test
> -
> -# ImageBuilder
> -echo 'MEMORY_START="0x40000000"
> -MEMORY_END="0xC0000000"
> -
> -XEN="xen"
> -DEVICE_TREE="virt-gicv2.dtb"
> -
> -XEN_CMD="console=dtuart console_timestamps=boot"
> -
> -DOMU_KERNEL[0]="xtf-test"
> -DOMU_MEM[0]="128"
> -
> -NUM_DOMUS=1
> -
> -LOAD_CMD="tftpb"
> -UBOOT_SOURCE="boot.source"
> -UBOOT_SCRIPT="boot.scr"' > binaries/config
> -
> -rm -rf imagebuilder
> -git clone --depth 1 https://gitlab.com/xen-project/imagebuilder.git
> -bash imagebuilder/scripts/uboot-script-gen -t tftp -d binaries/ -c binaries/config
> -
> -# Run the test
> -rm -f smoke.serial
> -export TEST_CMD="./binaries/qemu-system-aarch64 \
> -    -machine virtualization=true \
> -    -cpu cortex-a57 -machine type=virt \
> -    -m 2048 -monitor none -serial stdio \
> -    -smp 2 \
> -    -no-reboot \
> -    -device virtio-net-pci,netdev=n0 \
> -    -netdev user,id=n0,tftp=binaries \
> -    -bios /usr/lib/u-boot/qemu_arm64/u-boot.bin"
> -
> -export UBOOT_CMD="virtio scan; dhcp; tftpb 0x40000000 boot.scr; source 0x40000000"
> -export BOOT_MSG="Latest ChangeSet: "
> -export TEST_LOG="smoke.serial"
> -export PASSED="${passed}"
> -
> -./automation/scripts/console.exp | sed 's/\r\+$//'
> -- 
> 2.34.1
> 
> 


From xen-devel-bounces@lists.xenproject.org Thu Apr 17 00:14:49 2025
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Date: Wed, 16 Apr 2025 17:14:41 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: dmkhn@proton.me
cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, 
    cardoe@cardoe.com, marmarek@invisiblethingslab.com, sstabellini@kernel.org, 
    dmukhin@ford.com
Subject: Re: [PATCH v1 2/4] CI: switch x86 EFI smoke test runner to
 qemu-xtf.sh
In-Reply-To: <20250416053213.921444-3-dmukhin@ford.com>
Message-ID: 
References: <20250416053213.921444-1-dmukhin@ford.com> <20250416053213.921444-3-dmukhin@ford.com>
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On Wed, 16 Apr 2025, dmkhn@proton.me wrote:
> From: Denis Mukhin 
> 
> Use qemu-xtf.sh for qemu-smoke-x86-64-gcc-efi job.
> 
> Lead time is reduced a bit since not all XTF code base is built, just the
> required test.
> 
> Signed-off-by: Denis Mukhin 
> ---
>  automation/gitlab-ci/test.yaml                |  2 +-
>  .../include/configs/xtf-x86-64-efi-config     |  0
>  automation/scripts/include/xtf-x86-64-efi     | 52 +++++++++++++++++++
>  automation/scripts/qemu-smoke-x86-64-efi.sh   | 43 ---------------
>  4 files changed, 53 insertions(+), 44 deletions(-)
>  create mode 100644 automation/scripts/include/configs/xtf-x86-64-efi-config
>  create mode 100644 automation/scripts/include/xtf-x86-64-efi
>  delete mode 100755 automation/scripts/qemu-smoke-x86-64-efi.sh
> 
> diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml
> index 3adc841335..ca1e4eb528 100644
> --- a/automation/gitlab-ci/test.yaml
> +++ b/automation/gitlab-ci/test.yaml
> @@ -687,7 +687,7 @@ qemu-smoke-x86-64-clang-pvh:
>  qemu-smoke-x86-64-gcc-efi:
>    extends: .qemu-smoke-x86-64
>    script:
> -    - ./automation/scripts/qemu-smoke-x86-64-efi.sh pv 2>&1 | tee ${LOGFILE}
> +    - ./automation/scripts/qemu-xtf.sh x86-64-efi hvm64 example 2>&1 | tee ${LOGFILE}
>    needs:
>      - debian-12-x86_64-gcc-debug
>  
> diff --git a/automation/scripts/include/configs/xtf-x86-64-efi-config b/automation/scripts/include/configs/xtf-x86-64-efi-config
> new file mode 100644
> index 0000000000..e69de29bb2
> diff --git a/automation/scripts/include/xtf-x86-64-efi b/automation/scripts/include/xtf-x86-64-efi
> new file mode 100644
> index 0000000000..79622d5a6c
> --- /dev/null
> +++ b/automation/scripts/include/xtf-x86-64-efi
> @@ -0,0 +1,52 @@
> +#!/bin/bash
> +#
> +# XTF test utilities (x86_64, EFI).
> +#
> +
> +# Arch-specific environment overrides.
> +function xtf_arch_prepare()
> +{
> +    export FW_PREFIX="${FW_PREFIX:-/usr/share/OVMF/}"
> +    export QEMU_PREFIX="${QEMU_PREFIX:-}"
> +    export XEN_BINARY="${XEN_BINARY:-${WORKDIR}/xen.efi}"

Any chance we can avoid using WORKDIR? Or alternatively, we can remove
TOP? Or remove both? :-)

Maybe it is best to keep WORKDIR and remove TOP, I am not sure. I am
just trying to reduce the amount of variables used and that we depend
upon.

I assume you tested the pipeline and it worked, right?


> +    export XEN_CONSOLE="${XEN_CONSOLE:-com1}"
> +    export XTF_SRC_BRANCH="${XTF_SRC_BRANCH:-master}"
> +    export XTF_SRC_URI="${XTF_SRC_URI:-https://xenbits.xen.org/git-http/xtf.git}"
> +    export XTF_SRC_VARIANTS="hvm64 pv64"
> +}
> +
> +# Perform arch-specific XTF environment setup.
> +function xtf_arch_setup()
> +{
> +    local esp_dir="${WORKDIR}/boot-esp"
> +    local efi_dir="${esp_dir}/EFI/BOOT"
> +
> +    # Generate EFI boot environment
> +    mkdir -p ${efi_dir}
> +    cp ${XEN_BINARY} ${efi_dir}/BOOTX64.EFI
> +    cp ${XTF_BINARY} ${efi_dir}/kernel
> +
> +    cat > ${efi_dir}/BOOTX64.cfg < +[global]
> +default=test
> +
> +[test]
> +options=${XEN_CMDLINE}
> +kernel=kernel
> +EOF
> +
> +    # NB: OVMF_CODE.fd is read-only, no need to copy
> +    cp ${FW_PREFIX}OVMF_VARS.fd ${WORKDIR}
> +
> +    export TEST_CMD="${QEMU_PREFIX}qemu-system-x86_64 \
> +        -no-reboot \
> +        -nographic \
> +        -monitor none \
> +        -serial stdio \
> +        -m 512 \
> +        -M q35,kernel-irqchip=split \
> +        -drive if=pflash,format=raw,readonly=on,file=${FW_PREFIX}OVMF_CODE.fd \
> +        -drive if=pflash,format=raw,file=${WORKDIR}/OVMF_VARS.fd \
> +        -drive file=fat:rw:${esp_dir},media=disk,index=0,format=raw \
> +    "
> +}
> diff --git a/automation/scripts/qemu-smoke-x86-64-efi.sh b/automation/scripts/qemu-smoke-x86-64-efi.sh
> deleted file mode 100755
> index 7572722be6..0000000000
> --- a/automation/scripts/qemu-smoke-x86-64-efi.sh
> +++ /dev/null
> @@ -1,43 +0,0 @@
> -#!/bin/bash
> -
> -set -ex -o pipefail
> -
> -# variant should be either pv or pvh
> -variant=$1
> -
> -# Clone and build XTF
> -git clone https://xenbits.xen.org/git-http/xtf.git
> -cd xtf && make -j$(nproc) && cd -
> -
> -case $variant in
> -    pvh) k=test-hvm64-example    extra="dom0-iommu=none dom0=pvh" ;;
> -    *)   k=test-pv64-example     extra= ;;
> -esac
> -
> -mkdir -p boot-esp/EFI/BOOT
> -cp binaries/xen.efi boot-esp/EFI/BOOT/BOOTX64.EFI
> -cp xtf/tests/example/$k boot-esp/EFI/BOOT/kernel
> -
> -cat > boot-esp/EFI/BOOT/BOOTX64.cfg < -[global]
> -default=test
> -
> -[test]
> -options=loglvl=all console=com1 noreboot console_timestamps=boot $extra
> -kernel=kernel
> -EOF
> -
> -cp /usr/share/OVMF/OVMF_CODE.fd OVMF_CODE.fd
> -cp /usr/share/OVMF/OVMF_VARS.fd OVMF_VARS.fd
> -
> -rm -f smoke.serial
> -export TEST_CMD="qemu-system-x86_64 -nographic -M q35,kernel-irqchip=split \
> -        -drive if=pflash,format=raw,readonly=on,file=OVMF_CODE.fd \
> -        -drive if=pflash,format=raw,file=OVMF_VARS.fd \
> -        -drive file=fat:rw:boot-esp,media=disk,index=0,format=raw \
> -        -m 512 -monitor none -serial stdio"
> -
> -export TEST_LOG="smoke.serial"
> -export PASSED="Test result: SUCCESS"
> -
> -./automation/scripts/console.exp | sed 's/\r\+$//'
> -- 
> 2.34.1
> 
> 


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Date: Wed, 16 Apr 2025 17:16:49 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: dmkhn@proton.me
cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, 
    cardoe@cardoe.com, marmarek@invisiblethingslab.com, sstabellini@kernel.org, 
    dmukhin@ford.com
Subject: Re: [PATCH v1 1/4] CI: unify x86 XTF test runner
In-Reply-To: <20250416053213.921444-2-dmukhin@ford.com>
Message-ID: 
References: <20250416053213.921444-1-dmukhin@ford.com> <20250416053213.921444-2-dmukhin@ford.com>
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On Wed, 16 Apr 2025, dmkhn@proton.me wrote:
> From: Denis Mukhin 
> 
> Add test runner script qemu-xtf.sh which is allows any XTF x86 test to be
> easily executed. Test runner is invoked from the qemu-smoke* jobs with the
> hardcoded parameters.
> 
> Each x86 XTF job lead time is reduced a bit since only the test-related code
> is built, not the entire XTF project.
> 
> Add .gitignore to avoid committing test artifacts by mistake.
> 
> Signed-off-by: Denis Mukhin 
> ---
>  automation/gitlab-ci/test.yaml                |   8 +-
>  automation/scripts/.gitignore                 |   6 +
>  .../scripts/include/configs/xtf-x86-64-config |   0
>  automation/scripts/include/xtf-runner         | 134 ++++++++++++++++++
>  automation/scripts/include/xtf-x86-64         |  31 ++++
>  automation/scripts/qemu-smoke-x86-64.sh       |  26 ----
>  automation/scripts/qemu-xtf.sh                |  26 ++++
>  7 files changed, 201 insertions(+), 30 deletions(-)
>  create mode 100644 automation/scripts/.gitignore
>  create mode 100644 automation/scripts/include/configs/xtf-x86-64-config
>  create mode 100644 automation/scripts/include/xtf-runner
>  create mode 100644 automation/scripts/include/xtf-x86-64
>  delete mode 100755 automation/scripts/qemu-smoke-x86-64.sh
>  create mode 100755 automation/scripts/qemu-xtf.sh
> 
> diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml
> index 5ce445b78f..3adc841335 100644
> --- a/automation/gitlab-ci/test.yaml
> +++ b/automation/gitlab-ci/test.yaml
> @@ -659,28 +659,28 @@ qemu-alpine-x86_64-gcc:
>  qemu-smoke-x86-64-gcc:
>    extends: .qemu-smoke-x86-64
>    script:
> -    - ./automation/scripts/qemu-smoke-x86-64.sh pv 2>&1 | tee ${LOGFILE}
> +    - ./automation/scripts/qemu-xtf.sh x86-64 pv64 example 2>&1 | tee ${LOGFILE}
>    needs:
>      - debian-12-x86_64-gcc-debug
>  
>  qemu-smoke-x86-64-clang:
>    extends: .qemu-smoke-x86-64
>    script:
> -    - ./automation/scripts/qemu-smoke-x86-64.sh pv 2>&1 | tee ${LOGFILE}
> +    - ./automation/scripts/qemu-xtf.sh x86-64 pv64 example 2>&1 | tee ${LOGFILE}
>    needs:
>      - debian-12-x86_64-clang-debug
>  
>  qemu-smoke-x86-64-gcc-pvh:
>    extends: .qemu-smoke-x86-64
>    script:
> -    - ./automation/scripts/qemu-smoke-x86-64.sh pvh 2>&1 | tee ${LOGFILE}
> +    - ./automation/scripts/qemu-xtf.sh x86-64 hvm64 example 2>&1 | tee ${LOGFILE}
>    needs:
>      - debian-12-x86_64-gcc-debug
>  
>  qemu-smoke-x86-64-clang-pvh:
>    extends: .qemu-smoke-x86-64
>    script:
> -    - ./automation/scripts/qemu-smoke-x86-64.sh pvh 2>&1 | tee ${LOGFILE}
> +    - ./automation/scripts/qemu-xtf.sh x86-64 hvm64 example 2>&1 | tee ${LOGFILE}
>    needs:
>      - debian-12-x86_64-clang-debug
>  
> diff --git a/automation/scripts/.gitignore b/automation/scripts/.gitignore
> new file mode 100644
> index 0000000000..2f2d6e1ebd
> --- /dev/null
> +++ b/automation/scripts/.gitignore
> @@ -0,0 +1,6 @@
> +!include
> +
> +binaries
> +smoke.serial
> +xen
> +xtf*/

I am not sure this works as intended: I thought the paths are relative
to the location of the .gitignore file, but I could be wrong.


> diff --git a/automation/scripts/include/configs/xtf-x86-64-config b/automation/scripts/include/configs/xtf-x86-64-config
> new file mode 100644
> index 0000000000..e69de29bb2
> diff --git a/automation/scripts/include/xtf-runner b/automation/scripts/include/xtf-runner
> new file mode 100644
> index 0000000000..55b7b34b89
> --- /dev/null
> +++ b/automation/scripts/include/xtf-runner
> @@ -0,0 +1,134 @@
> +#!/bin/bash
> +#
> +# XTF test utilities.
> +#
> +# Environment variables:
> +#   BOOT_MSG: Expected boot message
> +#   FW_PREFIX: Firmware images path including '/' at the end
> +#   PASSED: XTF test printout in case of a pass
> +#   QEMU_PREFIX: QEMU path including '/' at the end
> +#   TEST_LOG: Output log file
> +#   UBOOT_CMD: U-Boot command line
> +#   WORKDIR: Test working directory
> +#   XEN_BINARY: Xen binary location
> +#   XEN_CONSOLE: Xen console device name
> +#   XTF_SRC_CONFIG: XTF config file
> +#   XTF_SRC_BRANCH: XTF branch
> +#   XTF_SRC_URI: XTF source code URI
> +
> +function die()
> +{
> +    set +x
> +    echo "FATAL: $*" >&2
> +    exit 1
> +}
> +
> +[ -z "$TOP" ] && die "\$TOP is not set"
> +
> +# Output log file
> +TEST_LOG="${TEST_LOG:-smoke.serial}"
> +# XTF test printout in case of a pass
> +PASSED="${PASSED:-Test result: SUCCESS}"
> +# Expected boot message
> +BOOT_MSG="${BOOT_MSG:-Latest ChangeSet: }"
> +# Test working directory
> +WORKDIR="${WORKDIR:-binaries}"
> +# XTF source code
> +XTF_SRC_CONFIG="${XTF_CONFIG:-${TOP}/include/configs/xtf-${ARCH}-config}"

Should this be  XTF_SRC_CONFIG="${XTF_SRC_CONFIG:-  ?


> +# Build an XTF test binary.
> +# $1 Test variant.
> +# $2 Test name.
> +function xtf_build_binary()
> +{
> +    local xtf_variant=$1
> +    local xtf_name=$2
> +    local xtf_dir="xtf-${ARCH}"
> +
> +    # Crude check for local testing
> +    if [ ! -d ${xtf_dir}/.git ]; then
> +        git clone ${XTF_SRC_URI} ${xtf_dir} -b ${XTF_SRC_BRANCH}
> +    fi
> +
> +    make \
> +        -C ${xtf_dir} \
> +        -j$(nproc) \
> +        $(tr '\n' ' ' < ${XTF_SRC_CONFIG}) \
> +        TESTS=tests/${xtf_name}
> +
> +    export XTF_NAME="${xtf_name}"
> +    export XTF_VARIANT="${xtf_variant}"
> +    export XTF_WORKDIR="$(readlink -f ${xtf_dir})"
> +    export XTF_BINARY="${XTF_WORKDIR}/tests/${xtf_name}/test-${xtf_variant}-${xtf_name}"
> +}
> +
> +# Build Xen command line for running an XTF test.
> +# $1 Test variant.
> +# $2 Test name.
> +function xtf_build_cmdline()
> +{
> +    local xtf_variant=$1
> +    local xtf_name=$2
> +    declare -a cmdline=()
> +
> +    cmdline+=("loglvl=all noreboot console_timestamps=boot")
> +    cmdline+=("console=${XEN_CONSOLE}")
> +
> +    # NB: OK to have hvm64, which is x86-only variant
> +    if [[ $xtf_variant == "hvm64" ]]; then
> +        cmdline+=("dom0-iommu=none dom0=pvh")
> +    fi
> +
> +    export XEN_CMDLINE="${cmdline[@]}"
> +}
> +
> +# Build an XTF test environment.
> +# $1 Test variant.
> +# $2 Test name.
> +function xtf_build_test()
> +{
> +    local v=$1
> +    local xtf_name=$2
> +    local xtf_variant=""
> +
> +    for x in ${XTF_SRC_VARIANTS}; do
> +        if [[ "${x}" == "${v}" ]]; then
> +            xtf_variant=${v}
> +            break
> +        fi
> +    done
> +    if [[ -z $xtf_variant ]]; then
> +        die "unsupported test variant '$1', supported variants: ${XTF_SRC_VARIANTS}"
> +    fi
> +
> +    xtf_build_binary ${xtf_variant} ${xtf_name}
> +    xtf_build_cmdline ${xtf_variant} ${xtf_name}
> +}
> +
> +# Execute an XTF test.
> +function xtf_run_test()
> +{
> +    rm -f ${TEST_LOG}
> +    export BOOT_MSG PASSED TEST_CMD TEST_LOG UBOOT_CMD
> +    ${TOP}/console.exp | sed 's/\r\+$//'
> +}
> +
> +# Setup environment and run an XTF test.
> +# $1 Test variant.
> +# $2 Test name.
> +function xtf_test()
> +{
> +    # Out: FW_*, QEMU_*, XEN_{BINARY,CONSOLE}, XTF_SRC_*
> +    xtf_arch_prepare
> +
> +    # In: XTF_SRC_*
> +    # OUt: XTF_{BINARY,NAME,VARIANT,WORKDIR} and XEN_CMDLINE
> +    xtf_build_test $@
> +
> +    # In: FW_*, QEMU_*, XTF_*, XEN_*
> +    # Out: BOOT_MSG, PASSED, TEST_{CMD,LOG}, UBOOT_CMD
> +    xtf_arch_setup
> +
> +    # In: BOOT_MSG, PASSED, TEST_{CMD,LOG}, UBOOT_CMD
> +    xtf_run_test
> +}
> diff --git a/automation/scripts/include/xtf-x86-64 b/automation/scripts/include/xtf-x86-64
> new file mode 100644
> index 0000000000..edddf18b38
> --- /dev/null
> +++ b/automation/scripts/include/xtf-x86-64
> @@ -0,0 +1,31 @@
> +#!/bin/bash
> +#
> +# XTF test utilities (x86_64).
> +#
> +
> +# Arch-specific environment overrides.
> +function xtf_arch_prepare()
> +{
> +    export FW_PREFIX="${FW_PREFIX:-}"
> +    export QEMU_PREFIX="${QEMU_PREFIX:-}"

It looks like QEMU_PREFIX is only used within this file (and other
similar files in later patches). If so, maybe for the sake of reducing
global variables and variables in general we could get rid of
QEMU_PREFIX.


> +    export XEN_BINARY="${XEN_BINARY:-${WORKDIR}/xen}"
> +    export XEN_CONSOLE="${XEN_CONSOLE:-com1}"

Instead of XEN_CONSOLE, I'd suggest to have an arch-specific variable
for Xen command line options where we can put the console as well as
other things. However, it is also totally fine as is.

In fact, I think you went above and beyond in terms of generic
abstractions, and I think it would have been OK to go with fewer
variables, and more ad-hoc custom code.


> +    export XTF_SRC_BRANCH="${XTF_SRC_BRANCH:-master}"
> +    export XTF_SRC_URI="${XTF_SRC_URI:-https://xenbits.xen.org/git-http/xtf.git}"
> +    export XTF_SRC_VARIANTS="hvm64 pv64"
> +}
> +
> +# Perform arch-specific XTF environment setup.
> +function xtf_arch_setup()
> +{
> +    export TEST_CMD="${QEMU_PREFIX}qemu-system-x86_64 \
> +        -no-reboot \
> +        -nographic \
> +        -monitor none \
> +        -serial stdio \
> +        -m 512 \
> +        -kernel ${XEN_BINARY} \
> +        -initrd ${XTF_BINARY} \
> +        -append \"${XEN_CMDLINE}\" \
> +    "
> +}
> diff --git a/automation/scripts/qemu-smoke-x86-64.sh b/automation/scripts/qemu-smoke-x86-64.sh
> deleted file mode 100755
> index da0c26cc2f..0000000000
> --- a/automation/scripts/qemu-smoke-x86-64.sh
> +++ /dev/null
> @@ -1,26 +0,0 @@
> -#!/bin/bash
> -
> -set -ex -o pipefail
> -
> -# variant should be either pv or pvh
> -variant=$1
> -
> -# Clone and build XTF
> -git clone https://xenbits.xen.org/git-http/xtf.git
> -cd xtf && make -j$(nproc) && cd -
> -
> -case $variant in
> -    pvh) k=test-hvm64-example    extra="dom0-iommu=none dom0=pvh" ;;
> -    *)   k=test-pv64-example     extra= ;;
> -esac
> -
> -rm -f smoke.serial
> -export TEST_CMD="qemu-system-x86_64 -nographic -kernel binaries/xen \
> -        -initrd xtf/tests/example/$k \
> -        -append \"loglvl=all console=com1 noreboot console_timestamps=boot $extra\" \
> -        -m 512 -monitor none -serial stdio"
> -
> -export TEST_LOG="smoke.serial"
> -export PASSED="Test result: SUCCESS"
> -
> -./automation/scripts/console.exp | sed 's/\r\+$//'
> diff --git a/automation/scripts/qemu-xtf.sh b/automation/scripts/qemu-xtf.sh
> new file mode 100755
> index 0000000000..2e16d4aece
> --- /dev/null
> +++ b/automation/scripts/qemu-xtf.sh
> @@ -0,0 +1,26 @@
> +#!/bin/bash
> +#
> +# XTF test runner (QEMU).
> +#
> +
> +set -e -o pipefail
> +
> +if [ $# -lt 3 ]; then
> +    echo "Usage: $(basename $0) ARCH XTF-VARIANT XTF-NAME"
> +    exit 1
> +fi
> +
> +export ARCH="$1"
> +shift
> +
> +export TOP="$(cd "$(dirname "${BASH_SOURCE[0]}")" &>/dev/null && pwd)"
> +if [ ! -f "${TOP}/include/xtf-${ARCH}" ]; then
> +    echo "unsupported architecture '${ARCH}'" >&2
> +    exit 1
> +fi

This seems a bit complex.. maybe we can assume that we are in xen.git/ ?


> +set -x
> +source ${TOP}/include/xtf-runner
> +source ${TOP}/include/xtf-${ARCH}

So here we could do:

source automation/scripts/include/xtf-runner

? Or is it important to be able to detect and calculate the directory?
If so, why not use TOP=$(pwd) or TOP=${PWD} or TOP=$(dirname "$0")?
By the way, if we need a variable for the top directory I would call it
XEN_ROOT instead of TOP.

I see the patches are using both TOP and WORKDIR, maybe we can get rid
of one of them? This is only a matter of taste but I think it would be
simpler with fewer variables and most of  the others look unavoidable.

Everything else looks OK to me.


> +xtf_test $@
> -- 
> 2.34.1
> 
> 


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Date: Wed, 16 Apr 2025 17:18:38 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Andrew Cooper 
cc: Xen-devel , 
    Anthony PERARD , 
    Michal Orzel , Jan Beulich , 
    Julien Grall , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
    Stefano Stabellini , 
    Volodymyr Babchuk , 
    Bertrand Marquis , 
    Shawn Anastasio , 
    Oleksii Kurochko , 
    "Daniel P . Smith" , 
    Lin Liu 
Subject: Re: [PATCH v6 12/15] arm: Remove asm/byteorder.h
In-Reply-To: <20250416115900.2491661-13-andrew.cooper3@citrix.com>
Message-ID: 
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On Wed, 16 Apr 2025, Andrew Cooper wrote:
> With the common code moved fully onto xen/byteorder.h, clean up the dregs.
> 
> Sort includes in some files while swapping over to xen/byteorder.h.
> 
> No functional change.
> 
> Signed-off-by: Andrew Cooper 


Acked-by: Stefano Stabellini 


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Date: Wed, 16 Apr 2025 17:19:56 -0700 (PDT)
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cc: Xen-devel , 
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    Shawn Anastasio , 
    Oleksii Kurochko , 
    "Daniel P . Smith" , 
    Lin Liu , rahul.singh@arm.com
Subject: Re: [PATCH v6 02/15] drivers/smmu-v3: Fix impending MISRA R20.6
 violation
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+ Rahul

On Wed, 16 Apr 2025, Andrew Cooper wrote:
> cpu_to_le64() is about to become a macro, at which point the #ifdef in the
> middle of it becomes undefined behaviour.
> 
> Use a logcal variable to prepare strtab, where the #ifdef is fine to use.
> 
> No functional change.
> 
> Signed-off-by: Andrew Cooper 
> ---
> CC: Anthony PERARD 
> CC: Michal Orzel 
> CC: Jan Beulich 
> CC: Julien Grall 
> CC: Roger Pau Monné 
> CC: Stefano Stabellini 
> CC: Volodymyr Babchuk 
> CC: Bertrand Marquis 
> CC: Shawn Anastasio 
> CC: Oleksii Kurochko 
> CC: Daniel P. Smith 
> CC: Lin Liu 
> 
> v6:
>  * New
> 
> Eclair log from v5:
>   https://saas.eclairit.com:3787/fs/var/local/eclair/xen-project.ecdf/xen-project/people/andyhhp/xen/ECLAIR_normal/xen-bswap/ARM64/9556392204/PROJECT.ecd;/by_service/MC3A2.R20.6.html
> ---
>  xen/drivers/passthrough/arm/smmu-v3.c | 8 +++++---
>  1 file changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/xen/drivers/passthrough/arm/smmu-v3.c b/xen/drivers/passthrough/arm/smmu-v3.c
> index cee572402203..df162350578c 100644
> --- a/xen/drivers/passthrough/arm/smmu-v3.c
> +++ b/xen/drivers/passthrough/arm/smmu-v3.c
> @@ -722,15 +722,17 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid,
>  	}
>  
>  	if (s2_cfg) {
> -		BUG_ON(ste_live);
> -		dst[2] = cpu_to_le64(
> +		u64 strtab =
>  			 FIELD_PREP(STRTAB_STE_2_S2VMID, s2_cfg->vmid) |
>  			 FIELD_PREP(STRTAB_STE_2_VTCR, s2_cfg->vtcr) |
>  #ifdef __BIG_ENDIAN
>  			 STRTAB_STE_2_S2ENDI |
>  #endif
>  			 STRTAB_STE_2_S2PTW | STRTAB_STE_2_S2AA64 |
> -			 STRTAB_STE_2_S2R);
> +			 STRTAB_STE_2_S2R;
> +
> +		BUG_ON(ste_live);
> +		dst[2] = cpu_to_le64(strtab);
>  
>  		dst[3] = cpu_to_le64(s2_cfg->vttbr & STRTAB_STE_3_S2TTB_MASK);
>  
> -- 
> 2.39.5
> 
--8323329-1510834496-1744849199=:8008--


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Date: Wed, 16 Apr 2025 17:58:35 -0700
From: Jakub Kicinski 
To: Alexey Nepomnyashih 
Cc: Juergen Gross , Stefano Stabellini
 , Oleksandr Tyshchenko
 , "David S. Miller" ,
 Eric Dumazet , Paolo Abeni , Alexei
 Starovoitov , Daniel Borkmann ,
 Jesper Dangaard Brouer , John Fastabend
 , xen-devel@lists.xenproject.org,
 netdev@vger.kernel.org, linux-kernel@vger.kernel.org, bpf@vger.kernel.org,
 lvc-project@linuxtesting.org, stable@vger.kernel.org
Subject: Re: [PATCH] xen-netfront: handle NULL returned by
 xdp_convert_buff_to_frame()
Message-ID: <20250416175835.687a5872@kernel.org>
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On Mon, 14 Apr 2025 18:34:01 +0000 Alexey Nepomnyashih wrote:
>  		get_page(pdata);

Please notice this get_page() here.

>  		xdpf = xdp_convert_buff_to_frame(xdp);
> +		if (unlikely(!xdpf)) {
> +			trace_xdp_exception(queue->info->netdev, prog, act);
> +			break;
> +		}


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Feedback-ID: i1568416f:Fastmail
Date: Thu, 17 Apr 2025 05:12:47 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Frediano Ziglio 
Cc: xen-devel@lists.xenproject.org,
	"Daniel P. Smith" ,
	Jan Beulich ,
	Andrew Cooper 
Subject: Re: [PATCH v7] Avoid crash calling PrintErrMesg from efi_multiboot2
Message-ID: 
References: <20250321103258.37425-1-frediano.ziglio@cloud.com>
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--TCI/ONZ83qF/8yz1
Content-Type: text/plain; protected-headers=v1; charset=utf-8
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Content-Transfer-Encoding: quoted-printable
Date: Thu, 17 Apr 2025 05:12:47 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Frediano Ziglio 
Cc: xen-devel@lists.xenproject.org,
	"Daniel P. Smith" ,
	Jan Beulich ,
	Andrew Cooper 
Subject: Re: [PATCH v7] Avoid crash calling PrintErrMesg from efi_multiboot2

On Fri, Mar 21, 2025 at 10:32:58AM +0000, Frediano Ziglio wrote:
> Although code is compiled with -fpic option data is not position
> independent. This causes data pointer to become invalid if
> code is not relocated properly which is what happens for
> efi_multiboot2 which is called by multiboot entry code.
>=20
> Code tested adding
>    PrintErrMesg(L"Test message", EFI_BUFFER_TOO_SMALL);
> in efi_multiboot2 before calling efi_arch_edd (this function
> can potentially call PrintErrMesg).
>=20
> Before the patch (XenServer installation on Qemu, xen replaced
> with vanilla xen.gz):
>   Booting `XenServer (Serial)'Booting `XenServer (Serial)'
>   Test message: !!!! X64 Exception Type - 0E(#PF - Page-Fault)  CPU Apic =
ID - 00000000 !!!!
>   ExceptionData - 0000000000000000  I:0 R:0 U:0 W:0 P:0 PK:0 SS:0 SGX:0
>   RIP  - 000000007EE21E9A, CS  - 0000000000000038, RFLAGS - 0000000000210=
246
>   RAX  - 000000007FF0C1B5, RCX - 0000000000000050, RDX - 0000000000000010
>   RBX  - 0000000000000000, RSP - 000000007FF0C180, RBP - 000000007FF0C210
>   RSI  - FFFF82D040467CE8, RDI - 0000000000000000
>   R8   - 000000007FF0C1C8, R9  - 000000007FF0C1C0, R10 - 0000000000000000
>   R11  - 0000000000001020, R12 - FFFF82D040467CE8, R13 - 000000007FF0C1B8
>   R14  - 000000007EA33328, R15 - 000000007EA332D8
>   DS   - 0000000000000030, ES  - 0000000000000030, FS  - 0000000000000030
>   GS   - 0000000000000030, SS  - 0000000000000030
>   CR0  - 0000000080010033, CR2 - FFFF82D040467CE8, CR3 - 000000007FC01000
>   CR4  - 0000000000000668, CR8 - 0000000000000000
>   DR0  - 0000000000000000, DR1 - 0000000000000000, DR2 - 0000000000000000
>   DR3  - 0000000000000000, DR6 - 00000000FFFF0FF0, DR7 - 0000000000000400
>   GDTR - 000000007F9DB000 0000000000000047, LDTR - 0000000000000000
>   IDTR - 000000007F48E018 0000000000000FFF,   TR - 0000000000000000
>   FXSAVE_STATE - 000000007FF0BDE0
>   !!!! Find image based on IP(0x7EE21E9A) (No PDB)  (ImageBase=3D00000000=
7EE20000, EntryPoint=3D000000007EE23935) !!!!
>=20
> After the patch:
>   Booting `XenServer (Serial)'Booting `XenServer (Serial)'
>   Test message: Buffer too small
>   BdsDxe: loading Boot0000 "UiApp" from Fv(7CB8BDC9-F8EB-4F34-AAEA-3EE4AF=
6516A1)/FvFile(462CAA21-7614-4503-836E-8AB6F4662331)
>   BdsDxe: starting Boot0000 "UiApp" from Fv(7CB8BDC9-F8EB-4F34-AAEA-3EE4A=
F6516A1)/FvFile(462CAA21-7614-4503-836E-8AB6F4662331)
>=20
> This partially rollback commit 00d5d5ce23e6.
>=20
> Fixes: 9180f5365524 ("x86: add multiboot2 protocol support for EFI platfo=
rms")
> Signed-off-by: Frediano Ziglio 

-no-jump-tables is available since clang 3.9.0 (and since GCC 4.1.0), so
with upgraded base toolchain requirements it's safe to commit this now.

Acked-by: Marek Marczykowski-G=C3=B3recki 

> ---
> Changes since v1:
> - added "Fixes:" tag;
> - fixed cast style change.
>=20
> Changes since v2:
> - wrap long line.
>=20
> Changes since v3:
> - fixed "Fixes:" tag.
>=20
> Changes since v4:
> - use switch instead of tables.
>=20
> Changes since v5:
> - added -fno-jump-tables option.
>=20
> Changes since v6:
> - rebased.
> ---
>  xen/common/efi/boot.c        | 58 ++++++++++++++++++++++++------------
>  xen/common/efi/efi-common.mk |  1 +
>  2 files changed, 40 insertions(+), 19 deletions(-)
>=20
> diff --git a/xen/common/efi/boot.c b/xen/common/efi/boot.c
> index efbec00af9..143b5681ba 100644
> --- a/xen/common/efi/boot.c
> +++ b/xen/common/efi/boot.c
> @@ -287,33 +287,53 @@ static bool __init match_guid(const EFI_GUID *guid1=
, const EFI_GUID *guid2)
>  /* generic routine for printing error messages */
>  static void __init PrintErrMesg(const CHAR16 *mesg, EFI_STATUS ErrCode)
>  {
> -    static const CHAR16* const ErrCodeToStr[] __initconstrel =3D {
> -        [~EFI_ERROR_MASK & EFI_NOT_FOUND]           =3D L"Not found",
> -        [~EFI_ERROR_MASK & EFI_NO_MEDIA]            =3D L"The device has=
 no media",
> -        [~EFI_ERROR_MASK & EFI_MEDIA_CHANGED]       =3D L"Media changed",
> -        [~EFI_ERROR_MASK & EFI_DEVICE_ERROR]        =3D L"Device error",
> -        [~EFI_ERROR_MASK & EFI_VOLUME_CORRUPTED]    =3D L"Volume corrupt=
ed",
> -        [~EFI_ERROR_MASK & EFI_ACCESS_DENIED]       =3D L"Access denied",
> -        [~EFI_ERROR_MASK & EFI_OUT_OF_RESOURCES]    =3D L"Out of resourc=
es",
> -        [~EFI_ERROR_MASK & EFI_VOLUME_FULL]         =3D L"Volume is full=
",
> -        [~EFI_ERROR_MASK & EFI_SECURITY_VIOLATION]  =3D L"Security viola=
tion",
> -        [~EFI_ERROR_MASK & EFI_CRC_ERROR]           =3D L"CRC error",
> -        [~EFI_ERROR_MASK & EFI_COMPROMISED_DATA]    =3D L"Compromised da=
ta",
> -        [~EFI_ERROR_MASK & EFI_BUFFER_TOO_SMALL]    =3D L"Buffer too sma=
ll",
> -    };
> -    EFI_STATUS ErrIdx =3D ErrCode & ~EFI_ERROR_MASK;
> -
>      StdOut =3D StdErr;
>      PrintErr(mesg);
>      PrintErr(L": ");
> =20
> -    if( (ErrIdx < ARRAY_SIZE(ErrCodeToStr)) && ErrCodeToStr[ErrIdx] )
> -        mesg =3D ErrCodeToStr[ErrIdx];
> -    else
> +    switch (ErrCode)
>      {
> +    case EFI_NOT_FOUND:
> +        mesg =3D L"Not found";
> +        break;
> +    case EFI_NO_MEDIA:
> +        mesg =3D L"The device has no media";
> +        break;
> +    case EFI_MEDIA_CHANGED:
> +        mesg =3D L"Media changed";
> +        break;
> +    case EFI_DEVICE_ERROR:
> +        mesg =3D L"Device error";
> +        break;
> +    case EFI_VOLUME_CORRUPTED:
> +        mesg =3D L"Volume corrupted";
> +        break;
> +    case EFI_ACCESS_DENIED:
> +        mesg =3D L"Access denied";
> +        break;
> +    case EFI_OUT_OF_RESOURCES:
> +        mesg =3D L"Out of resources";
> +        break;
> +    case EFI_VOLUME_FULL:
> +        mesg =3D L"Volume is full";
> +        break;
> +    case EFI_SECURITY_VIOLATION:
> +        mesg =3D L"Security violation";
> +        break;
> +    case EFI_CRC_ERROR:
> +        mesg =3D L"CRC error";
> +        break;
> +    case EFI_COMPROMISED_DATA:
> +        mesg =3D L"Compromised data";
> +        break;
> +    case EFI_BUFFER_TOO_SMALL:
> +        mesg =3D L"Buffer too small";
> +        break;
> +    default:
>          PrintErr(L"ErrCode: ");
>          DisplayUint(ErrCode, 0);
>          mesg =3D NULL;
> +        break;
>      }
>      blexit(mesg);
>  }
> diff --git a/xen/common/efi/efi-common.mk b/xen/common/efi/efi-common.mk
> index 23cafcf20c..06b1c19674 100644
> --- a/xen/common/efi/efi-common.mk
> +++ b/xen/common/efi/efi-common.mk
> @@ -2,6 +2,7 @@ EFIOBJ-y :=3D boot.init.o pe.init.o ebmalloc.o runtime.o
>  EFIOBJ-$(CONFIG_COMPAT) +=3D compat.o
> =20
>  CFLAGS-y +=3D -fshort-wchar
> +CFLAGS-y +=3D -fno-jump-tables
>  CFLAGS-y +=3D -iquote $(srctree)/common/efi
>  CFLAGS-y +=3D -iquote $(srcdir)
> =20
> --=20
> 2.43.0
>=20

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Date: Thu, 17 Apr 2025 08:25:41 +0200
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v1 10/14] xen/riscv: implementation of aplic and imsic
 operations
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Romain Caritey , xen-devel@lists.xenproject.org
References: 
 <74a07ed7c596bbcf581010685e01bfdfa19164f5.1744126720.git.oleksii.kurochko@gmail.com>
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From: Jan Beulich 
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On 16.04.2025 21:05, Oleksii Kurochko wrote:
> On 4/15/25 2:46 PM, Jan Beulich wrote:
>> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>>> Introduce interrupt controller descriptor for host APLIC to describe
>>> the low-lovel hardare. It includes implementation of the following functions:
>>>   - aplic_irq_startup()
>>>   - aplic_irq_shutdown()
>>>   - aplic_irq_enable()
>>>   - aplic_irq_disable()
>>>   - aplic_irq_ack()
>>>   - aplic_host_irq_end()
>>>   - aplic_set_irq_affinity()
>>>
>>> As APLIC is used in MSI mode it requires to enable/disable interrupts not
>>> only for APLIC but also for IMSIC. Thereby for the purpose of
>>> aplic_irq_{enable,disable}() it is introduced imsic_irq_{enable,disable)().
>>>
>>> For the purpose of aplic_set_irq_affinity() aplic_get_cpu_from_mask() is
>>> introduced to get hart id.
>>>
>>> Also, introduce additional interrupt controller h/w operations and
>>> host_irq_type for APLIC:
>>>   - aplic_host_irq_type
>>>   - aplic_set_irq_priority()
>>>   - aplic_set_irq_type()
>> Yet these two functions nor the hooks they're used to populate are entirely
>> unused here. Since they're also outside of the common IRQ handling machinery,
>> it's unclear how one would sanely ack such a change.
> 
> They will be called by intc_route_irq_to_xen() from setup_irq() during firt time
> the IRQ is setup.

Perhaps move their introduction to there then? We don't do any Misra checking
yet lon RISC-V, but imo it's still good practice to avoid introducing new
violations, even if only temporarily.

>>> --- a/xen/arch/riscv/aplic.c
>>> +++ b/xen/arch/riscv/aplic.c
>>> @@ -15,6 +15,7 @@
>>>   #include 
>>>   #include 
>>>   #include 
>>> +#include 
>>>   #include 
>>>   #include 
>>>   
>>> @@ -110,9 +111,173 @@ static int __init aplic_init(void)
>>>       return 0;
>>>   }
>>>   
>>> -static const struct intc_hw_operations __ro_after_init aplic_ops = {
>>> +static void aplic_set_irq_type(struct irq_desc *desc, unsigned int type)
>>> +{
>>> +    unsigned int irq = desc->irq - 1;
>> Why this adjustment by 1 (and yet both items being named "irq")?
> 
> Interrupt 0 isn't possible based on the spec:
> ```
> Each of an APLIC’s interrupt sources has a fixed unique identity number 
> in the range 1 to N, where N is the total number of sources at the 
> APLIC. The number zero is not a valid interrupt identity number at an 
> APLIC. The maximum number of interrupt sources an APLIC may support is 
> 1023. ``` and interrupt 1 will correspond to bit 0 in sourcecfg[] register, interrupt 
> 2 ->sourcecfg[1] and so on. And that is the reason why we need -1.

Okay, fine. But what about the part of the question in parentheses?

>>> +            aplic.regs->sourcecfg[irq] = APLIC_SOURCECFG_SM_EDGE_FALL;
>>> +            break;
>>> +        case IRQ_TYPE_LEVEL_HIGH:
>>> +            aplic.regs->sourcecfg[irq] = APLIC_SOURCECFG_SM_LEVEL_HIGH;
>>> +            break;
>>> +        case IRQ_TYPE_LEVEL_LOW:
>>> +            aplic.regs->sourcecfg[irq] = APLIC_SOURCECFG_SM_LEVEL_LOW;
>>> +            break;
>>> +        default:
>>> +            aplic.regs->sourcecfg[irq] = APLIC_SOURCECFG_SM_INACTIVE;
>>> +            break;
>> Is the default: label legitimate to be reached?
> 
>  From the spec:
> ```
> 0 Inactive Inactive in this domain (and not delegated) 1 Detached 
> Active, detached from the source wire 2–3 — Reserved 4 Edge1 Active, 
> edge-sensitive; interrupt asserted on rising edge 5 Edge0 Active, 
> edge-sensitive; interrupt asserted on falling edge 6 Level1 Active, 
> level-sensitive; interrupt asserted when high 7 Level0 Active, 
> level-sensitive; interrupt asserted when low ``` It seems to me like 
> APLIC_SOURCECFG_SM_INACTIVE just covers cases (0-3) and inactive IRQ 
> pretty safe to as a default value.

I fear this doesn't answer my question, which is to a large part related
to the Xen code, and only to some degree to the spec.

>>> +static void aplic_set_irq_priority(struct irq_desc *desc,
>>> +                                   unsigned int priority)
>>> +{
>>> +    /* No priority, do nothing */
>>> +}
>> Since the function dopes nothing, wouldn't it be better to omit it and have
>> the (future) caller check for a NULL pointer ahead of making the (indirect)
>> call? Same remark for other handlers (below) which also do nothing.
> 
> I thought about that too, but it could be some cases when the stub is introduced
> with temporary BUG_ON("unimplemented") inside just to not miss to implement it
> when it will be necessary.
> If we will have only the caller check then we could miss to implement such stubs.

I guess I don't understand the concern.

>>> +static void aplic_irq_enable(struct irq_desc *desc)
>>> +{
>>> +    unsigned long flags;
>>> +
>>> +    /*
>>> +     * TODO: Currently, APLIC is supported only with MSI interrupts.
>>> +     *       If APLIC without MSI interrupts is required in the future,
>>> +     *       this function will need to be updated accordingly.
>>> +     */
>>> +    ASSERT(aplic.imsic_cfg->is_used);
>> Such an extra field, used only for assertions, is pretty odd. Can't you
>> use any of the other fields to achieve the same effect?
> 
> in aplic_init() there is:
>      /* check for associated imsic node */
>      rc = dt_property_read_u32(node, "msi-parent", &imsic_phandle);
>      if ( !rc )
>          panic("%s: IDC mode not supported\n", node->full_name);
> 
> So we will have panic() anyway if MSI mode isn't supported. As an option we
> can just drop the ASSERT.

Since they serve primarily as a reminder where changes would need making,
I'd prefer if they could be kept.

> Or introduce static variable in aplic.c `aplic_mode`, init it in aplic_init()
> and use it in ASSERT().

This would then again be used solely for assertions, aiui? As said, I
think it would be preferable if some already existing indicator could be
used for this purpose.

>>> +    ASSERT(spin_is_locked(&desc->lock));
>> If this lock (which is an IRQ-safe one) is necessarily held, ...
>>
>>> +    spin_lock_irqsave(&aplic.lock, flags);
>> ... you can use just spin_lock() here.
>>
>>> +    clear_bit(_IRQ_DISABLED, &desc->status);
>> Why an atomic bitop when desc is locked? (And yes, I ought to raise the same
>> question on Arm code also doing so.)
> 
> I haven't thought about that. Likely non-atomic bitop could be used here.

And then - does it need to be a bitop? Aiui that's what Arm uses, while x86
doesn't. And I see no reason to use other than plain C operators here. If
Arm was switched, presumably all the redundant (and misnamed) _IRQ_*
constants could go away, with just the IRQ_* ones left.

>> I'm uncertain about this bit setting anyway - on x86 we would only fiddle
>> with it for IRQs not in use, not while enabling/disabling one.

What about this part?

>> In any event this can be done outside of the APLIC-locked region, I think.
> 
> Considering that we are doing that under desc->lock, agree we can move that outside
> the APLIC-locked region.
> 
>>> +    imsic_irq_enable(desc->irq);
>>> +
>>> +    /* enable interrupt in APLIC */
>>> +    aplic.regs->setienum = desc->irq;
>> Are you sure you want to use plain assignments for MMIO accesses? I'd have
>> expected writel() to be used here. (And only later I realized that I didn't
>> spot the same already higher up from here.)
> 
> Good point. I have to update that with writel()...
> 
>>
>>  From the vague understanding I've gained so far: Isn't the APLIC closer to
>> the CPU and the IMSIC closer to the device? If so, wouldn't you want to
>> enable at the APLIC before enabling at the IMSIC? But of course that also
>> depends on what exactly happens in the window while one is already enabled
>> and the other is still disabled. (Later) From the code you add to imsic.c
>> it looks like it's the other way around, as the IMSIC is accessed through
>> CSRs.
> 
>  From the AIA spec:
> ```
> An Incoming MSI Controller (IMSIC) is an optional RISC-V hardware component
> that is closely coupled with a hart, one IMSIC per hart. An IMSIC receives
> and records incoming message-signaled interrupts (MSIs) for a hart, and
> signals to the hart when there are pending and enabled interrupts to be
> serviced.
> ```
> 
> Based on the figure 2 (Interrupt delivery by MSIs when harts have IMSICs for receiving them)
> of AIA spechttps://github.com/riscv/riscv-aia/blob/main/src/intrsWithIMSICs.png
> IMSIC is more close to CPU and APLIC is more close to the device. The external interrupt
> controller is APLIC and it only sends a MSI message for a CPU.
> 
> The logical flow of an interrupt to a hart with an IMSIC would be:
> 1. A physical interrupt signal arrives at the APLIC.
> 2. The APLIC, if configured for MSI delivery mode (domaincfg.DM = 1) and if the specific
>     interrupt source is active and enabled within its domain (controlled by sourcecfg[i]
>     and the global Interrupt Enable bit IE in domaincfg), will generate an MSI.
> 3. This MSI is then sent to the target hart's IMSIC. The APLIC needs to know the MSI
>     target address for each hart, which can be hardwired or configured through registers
>     like mmsiaddrcfg and mmsiaddrcfgh.
> 4. The receiving hart's IMSIC records this MSI as a pending interrupt.
> 5. If the corresponding interrupt identity is enabled within the IMSIC's interrupt file,
>     the IMSIC will signal the hart, typically by setting the MEIP or SEIP bit in the mip
>     CSR (or sip CSR).
> 
> Generally, I think that the order in which enable interrupts doesn't really matter as
> if you were to enable the IMSIC to receive a certain interrupt before the APLIC was
> configured to send it (or had a pending interrupt from the device), the IMSIC would
> simply be waiting for an MSI that wouldn't arrive.
> Similarly, if the APLIC sends an MSI for an interrupt that is not enabled in the IMSIC,
> the interrupt would remain pending in the IMSIC but wouldn't trigger an interrupt at
> the hart.
> 
> IMO, the order which is used now in the code is pretty logical.
> 
> Does it make sense?

Except for the "doesn't really matter" - yes. In a reply to a later patch I
indicated I realized that IMSIC is what's closer to the CPU (and hence later
in the chain of interrupt delivery actions).

>>> +    spin_unlock_irqrestore(&aplic.lock, flags);
>>> +}
>>> +
>>> +static void aplic_irq_disable(struct irq_desc *desc)
>>> +{
>>> +    unsigned long flags;
>>> +
>>> +    /*
>>> +     * TODO: Currently, APLIC is supported only with MSI interrupts.
>>> +     *       If APLIC without MSI interrupts is required in the future,
>>> +     *       this function will need to be updated accordingly.
>>> +     */
>>> +    ASSERT(aplic.imsic_cfg->is_used);
>>> +
>>> +    ASSERT(spin_is_locked(&desc->lock));
>>> +
>>> +    spin_lock_irqsave(&aplic.lock, flags);
>>> +
>>> +    set_bit(_IRQ_DISABLED, &desc->status);
>>> +
>>> +    /* disable interrupt in APLIC */
>>> +    aplic.regs->clrienum = desc->irq;
>>> +
>>> +    /* disable interrupt in IMSIC */
>>> +    imsic_irq_disable(desc->irq);
>>> +
>>> +    spin_unlock_irqrestore(&aplic.lock, flags);
>>> +}
>>> +
>>> +static unsigned int aplic_irq_startup(struct irq_desc *desc)
>>> +{
>>> +    aplic_irq_enable(desc);
>>> +
>>> +    return 0;
>>> +}
>>> +
>>> +static void aplic_irq_shutdown(struct irq_desc *desc)
>>> +{
>>> +    aplic_irq_disable(desc);
>>> +}
>> You don't really need a separate hook function here, do you?
> 
> With such implementation it is really not needed to have a hook so
> I will drop it.
> 
>>> +static void aplic_irq_ack(struct irq_desc *desc)
>>> +{
>>> +    /* nothing to do */
>>> +}
>>> +
>>> +static void aplic_host_irq_end(struct irq_desc *desc)
>> What's the "host" in the identifier about?
> 
> It was copied that from Arm and my understanding that it means
> Xen-related IRQ as they also have:
> ```
> /* XXX different for level vs edge */
> static hw_irq_controller gicv2_host_irq_type = {
> ...
>      .end          = gicv2_host_irq_end,
> ...
> };
> 
> static hw_irq_controller gicv2_guest_irq_type = {
> ...
>      .end          = gicv2_guest_irq_end,
> ...
> };
> ```

And you expect to end up with a similar distinction on RISC-V? There's
nothing like that on x86, just to mention it.

>>> +static void aplic_set_irq_affinity(struct irq_desc *desc, const cpumask_t *mask)
>>> +{
>>> +    unsigned int cpu;
>>> +    uint64_t group_index, base_ppn;
>>> +    uint32_t hhxw, lhxw ,hhxs, value;
>>> +    const struct imsic_config *imsic = aplic.imsic_cfg;
>>> +
>>> +    /*
>>> +     * TODO: Currently, APLIC is supported only with MSI interrupts.
>>> +     *       If APLIC without MSI interrupts is required in the future,
>>> +     *       this function will need to be updated accordingly.
>>> +     */
>>> +    ASSERT(aplic.imsic_cfg->is_used);
>> Use the local variable you have made yourself?
> 
> What do you mean by local here?

Just a few lines up you latch aplic.imsic_cfg into the local "imsic".

>>> +    ASSERT(!cpumask_empty(mask));
>>> +
>>> +    spin_lock(&aplic.lock);
>> Aiui the lock can be acquired quite a bit later. It ought to be needed only
>> around the actual write to the hardware register.
>>
>>> +    cpu = cpuid_to_hartid(aplic_get_cpu_from_mask(mask));
>>> +    hhxw = imsic->group_index_bits;
>>> +    lhxw = imsic->hart_index_bits;
>>> +    hhxs = imsic->group_index_shift - IMSIC_MMIO_PAGE_SHIFT * 2;
>>> +    base_ppn = imsic->msi[cpu].base_addr >> IMSIC_MMIO_PAGE_SHIFT;
>>> +
>>> +    /* update hart and EEID in the target register */
>>> +    group_index = (base_ppn >> (hhxs + 12)) & (BIT(hhxw, UL) - 1);
>> What's this magic 12 in here? Not IMSIC_MMIO_PAGE_SHIFT I suppose?
> 
> In the AIA spec they are using 12 explicitly:https://github.com/riscv/riscv-aia/blob/main/src/AdvPLIC.adoc#AdvPLIC-MSIAddrs

In the spec that's fine, but please make yourself a constant with a suitable
name then, to be used here. Just consider what would happen if we used literal
12 everywhere PAGE_SHIFT was meant.

>>> +void imsic_irq_enable(unsigned int hwirq)
>>> +{
>>> +    unsigned long flags;
>>> +
>>> +    spin_lock_irqsave(&imsic_cfg.lock, flags);
>>> +    imsic_local_eix_update(hwirq, 1, false, true);
>> No subtraction of 1 here? Also, why "hwirq" and not just "irq"?
> 
>  From the spec:
> ```
> 
> When an interrupt file supports distinct interrupt identities, valid identity numbers are between 1
> and inclusive. The identity numbers within this range are said to be implemented by the interrupt
> file; numbers outside this range are not implemented. The number zero is never a valid interrupt
> identity.
> ...
> 
> Bit positions in a valid eiek register that don’t correspond to a 
> supported interrupt identity (such as bit 0 of eie0) are read-only zeros.
> 
> 
> ```
> 
> So in EIx registers interrupt i corresponds to bit i in comparison wiht APLIC's sourcecfg which starts from 0.

Confusing, but what do you do.

>>> @@ -277,6 +333,13 @@ int __init imsic_init(struct dt_device_node *node)
>>>           goto imsic_init_err;
>>>       }
>>>   
>>> +    spin_lock_init(&imsic_cfg.lock);
>>> +
>>> +    /* Enable local interrupt delivery */
>>> +    imsic_ids_local_delivery(true);
>> What's this? I can't find the function/macro here, nor in patch 08, nor in
>> staging.
> 
> It is defined in imsic.c:
> ```
> void imsic_ids_local_delivery(bool enable)
> {
>      if ( enable )
>      {
>          imsic_csr_write(IMSIC_EITHRESHOLD, IMSIC_ENABLE_EITHRESHOLD);
>          imsic_csr_write(IMSIC_EIDELIVERY, IMSIC_ENABLE_EIDELIVERY);
>      }
>      else
>      {
>          imsic_csr_write(IMSIC_EITHRESHOLD, IMSIC_DISABLE_EITHRESHOLD);
>          imsic_csr_write(IMSIC_EIDELIVERY, IMSIC_DISABLE_EIDELIVERY);
>      }
> }
> ```

No, it's not. As noted in the reply to a later patch, it's only introduced
there. Hence the build will break between the two patches.

Jan


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Date: Thu, 17 Apr 2025 10:00:22 +0300
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Subject: Re: [PATCH] xen-netfront: handle NULL returned by
 xdp_convert_buff_to_frame()
To: Jakub Kicinski 
Cc: Juergen Gross ,
 Stefano Stabellini ,
 Oleksandr Tyshchenko ,
 "David S. Miller" , Eric Dumazet ,
 Paolo Abeni , Alexei Starovoitov ,
 Daniel Borkmann ,
 Jesper Dangaard Brouer ,
 John Fastabend , xen-devel@lists.xenproject.org,
 netdev@vger.kernel.org, linux-kernel@vger.kernel.org, bpf@vger.kernel.org,
 lvc-project@linuxtesting.org, stable@vger.kernel.org
References: <20250414183403.265943-1-sdl@nppct.ru>
 <20250416175835.687a5872@kernel.org>
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On 17.04.2025 03:58, Jakub Kicinski wrote:
> On Mon, 14 Apr 2025 18:34:01 +0000 Alexey Nepomnyashih wrote:
>>   		get_page(pdata);
> Please notice this get_page() here.
>
>>   		xdpf = xdp_convert_buff_to_frame(xdp);
>> +		if (unlikely(!xdpf)) {
>> +			trace_xdp_exception(queue->info->netdev, prog, act);
>> +			break;
>> +		}
Do you mean that it would be better to move the get_page(pdata) call lower,
after checking for NULL in xdpf, so that the reference count is only 
increased
after a successful conversion?


From xen-devel-bounces@lists.xenproject.org Thu Apr 17 07:12:11 2025
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Subject: Re: [PATCH] xen-netfront: handle NULL returned by
 xdp_convert_buff_to_frame()
To: Alexey , Jakub Kicinski 
Cc: Stefano Stabellini ,
 Oleksandr Tyshchenko ,
 "David S. Miller" , Eric Dumazet ,
 Paolo Abeni , Alexei Starovoitov ,
 Daniel Borkmann ,
 Jesper Dangaard Brouer ,
 John Fastabend , xen-devel@lists.xenproject.org,
 netdev@vger.kernel.org, linux-kernel@vger.kernel.org, bpf@vger.kernel.org,
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 Oleksandr Tyshchenko ,
 "David S. Miller" , Eric Dumazet ,
 Paolo Abeni , Alexei Starovoitov ,
 Daniel Borkmann ,
 Jesper Dangaard Brouer ,
 John Fastabend , xen-devel@lists.xenproject.org,
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Subject: Re: [PATCH] xen-netfront: handle NULL returned by
 xdp_convert_buff_to_frame()
References: <20250414183403.265943-1-sdl@nppct.ru>
 <20250416175835.687a5872@kernel.org>
 
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Date: Thu, 17 Apr 2025 09:14:54 +0200
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Subject: Re: x86 emulation bug
To: Fabian Specht 
Cc: manuel.andreas@tum.de, xen-devel@lists.xenproject.org
References: 
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From: Jan Beulich 
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On 17.04.2025 00:52, Fabian Specht wrote:
> Dear all,
> 
> we discovered a bug in hvm64 x86 Xen. Using the attached xtf test we are
> able to trigger an assert in arch/x86/hvm/emulate.c:
> 
> 
> if ( (hvmemul_ctxt->ctxt.regs->eflags & X86_EFLAGS_DF) && (reps > 1) )
> {
> 	/*
> 	 * x86_emulate() clips the repetition count to ensure we don't wrap
> 	 * the effective-address index register. Hence this assertion holds.
> 	 */
> 	ASSERT(offset >= ((reps - 1) * bytes_per_rep));
> 	okay = hvm_virtual_to_linear_addr(
> 		seg, reg, offset - (reps - 1) * bytes_per_rep,
> 		reps * bytes_per_rep, access_type,
> 		hvmemul_get_seg_reg(x86_seg_cs, hvmemul_ctxt), linear);
> 	*linear += (reps - 1) * bytes_per_rep;
> 	if ( hvmemul_ctxt->ctxt.addr_size != 64 )
> 		*linear = (uint32_t)*linear;
> }
> 
> 
> If debug mode is not enabled, this will later on result in an integer
> underflow, however we were not able to find any severe problems.
> 
> The test below will not work with vanilla xtf.

Thanks for the report. However, already on Andreas' report on the day before
yesterday I was heavily inclined to ask about details you certainly have
figured out already. I find it odd that you leave to us all re-figuring out.
In this case, for example: Is the specific value you set %eax to relevant?
(Probably not.) Is the specific value you set %rcx to relevant? (Probably
not, but likely some part of it is.) Is the specific value you set %rdi to
relevant? (Probably not, but likely some part of it is. Probably you
setting it to 0 is also why the adjustment below is needed, and using a
different value might permit avoiding that adjustment.) Is it relevant
that you set EFLAGS.DF? (Quite likely.)

Any other investigation results you may have collected would likely also
make our job easier.

Jan

> To get it working,
> we have to edit 'pae_l1_identmap' in arch/x86/hvm/pagetables.S in xtf
> from
> 
> 
> PAGETABLE_START(pae_l1_identmap)
>         .long 0, 0
>         .rept PAE_L1_PT_ENTRIES - 1
>         .long (PAE_IDX(pae_l1_identmap) << PAE_L1_PT_SHIFT) + _PAGE_LEAF
>         .long 0
>         .endr
> PAGETABLE_END(pae_l1_identmap)
> 
> 
> to the following value:
> 
> 
> PAGETABLE_START(pae_l1_identmap)
>         .quad (0x5564000000) + _PAGE_LEAF
>         .rept PAE_L1_PT_ENTRIES - 1
>         .long (PAE_IDX(pae_l1_identmap) << PAE_L1_PT_SHIFT) + _PAGE_LEAF
>         .long 0
>         .endr
> PAGETABLE_END(pae_l1_identmap)
> 
> 
> 
> We were able to reproduce this bug in several versions including the
> most current one at the time of writing this.
> 
> 
> Best,
> Fabian



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Subject: Re: [PATCH v2 8/8] vpci/msix: Add function to clean MSIX resources
To: Jiqian Chen 
Cc: Huang Rui , Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 09.04.2025 08:45, Jiqian Chen wrote:
> --- a/xen/arch/x86/hvm/intercept.c
> +++ b/xen/arch/x86/hvm/intercept.c
> @@ -276,6 +276,50 @@ void register_mmio_handler(struct domain *d,
>      handler->mmio.ops = ops;
>  }
>  
> +void unregister_mmio_handler(struct domain *d,
> +                             const struct hvm_mmio_ops *ops)
> +{
> +    unsigned int i, count = d->arch.hvm.io_handler_count;
> +
> +    ASSERT(d->arch.hvm.io_handler);
> +
> +    if ( !count )
> +        return;
> +
> +    for ( i = 0; i < count; i++ )
> +        if ( d->arch.hvm.io_handler[i].type == IOREQ_TYPE_COPY &&
> +             d->arch.hvm.io_handler[i].mmio.ops == ops )
> +            break;
> +
> +    if ( i == count )
> +        return;
> +
> +    for ( ; i < count - 1; i++ )
> +    {
> +        struct hvm_io_handler *curr = &d->arch.hvm.io_handler[i];
> +        struct hvm_io_handler *next = &d->arch.hvm.io_handler[i + 1];
> +
> +        curr->type = next->type;
> +        curr->ops = next->ops;
> +        if ( next->type == IOREQ_TYPE_COPY )
> +        {
> +            curr->portio.port = 0;
> +            curr->portio.size = 0;
> +            curr->portio.action = 0;
> +            curr->mmio.ops = next->mmio.ops;
> +        }
> +        else
> +        {
> +            curr->mmio.ops = 0;
> +            curr->portio.port = next->portio.port;
> +            curr->portio.size = next->portio.size;
> +            curr->portio.action = next->portio.action;
> +        }
> +    }
> +
> +    d->arch.hvm.io_handler_count--;
> +}

To add on what Roger said: This is inherently non-atomic, so the domain
would need pausing to do such removal in a race-free way. Hence why we
deliberately didn't have such a function so far, aiui. (The removal may
be safe in the specific case you use it helow, but there's nothing here
preventing it from being used elsewhere, without paying attention to
the raciness.)

Jan


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On 14/04/2025 17:56, Oleksii Kurochko wrote:
> There is no any users of handle_device_interrupts() thereby it
> could be dropped.
It reads as if you were dropping a definition. There is no definition, therefore
no users. Prototype was added by accident in:
8d2c3ab18cc1fce46945bd3aa1819a7aea0c564e

> 
> Signed-off-by: Oleksii Kurochko 

With the commit msg updated to be more meaningful:
Reviewed-by: Michal Orzel 

~Michal



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From: "Chen, Jiqian" 
To: Jan Beulich 
CC: "Huang, Ray" , Andrew Cooper
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	, "xen-devel@lists.xenproject.org"
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Subject: Re: [PATCH v2 8/8] vpci/msix: Add function to clean MSIX resources
Thread-Topic: [PATCH v2 8/8] vpci/msix: Add function to clean MSIX resources
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Date: Thu, 17 Apr 2025 07:38:27 +0000
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References: <20250409064528.405573-1-Jiqian.Chen@amd.com>
 <20250409064528.405573-9-Jiqian.Chen@amd.com>
 
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Subject: Re: [PATCH v2 1/4] xen/io: provide helpers for multi size MMIO
 accesses
To: Roger Pau Monne 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <20250415153246.81688-1-roger.pau@citrix.com>
 <20250415153246.81688-2-roger.pau@citrix.com>
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From: Jan Beulich 
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In-Reply-To: <20250415153246.81688-2-roger.pau@citrix.com>
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On 15.04.2025 17:32, Roger Pau Monne wrote:
> @@ -5115,7 +5115,6 @@ static void subpage_mmio_write_emulate(
>  
>      if ( test_bit(offset / MMIO_RO_SUBPAGE_GRAN, entry->ro_elems) )
>      {
> - write_ignored:
>          gprintk(XENLOG_WARNING,
>                  "ignoring write to R/O MMIO 0x%"PRI_mfn"%03x len %u\n",
>                  mfn_x(mfn), offset, len);
> @@ -5131,26 +5130,7 @@ static void subpage_mmio_write_emulate(
>          return;
>      }
>  
> -    addr += offset;
> -    switch ( len )
> -    {
> -    case 1:
> -        writeb(*(const uint8_t*)data, addr);
> -        break;
> -    case 2:
> -        writew(*(const uint16_t*)data, addr);
> -        break;
> -    case 4:
> -        writel(*(const uint32_t*)data, addr);
> -        break;
> -    case 8:
> -        writeq(*(const uint64_t*)data, addr);
> -        break;
> -    default:
> -        /* mmio_ro_emulated_write() already validated the size */
> -        ASSERT_UNREACHABLE();
> -        goto write_ignored;
> -    }
> +    write_mmio(addr + offset, data, len);
>  }

Should probably have noticed this on v1 already: The log message is now lost
for the write-ignored case. It looks easy enough to have the function return
a boolean indicating "done", to retain original behavior here.

Jan


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Subject: Re: [PATCH v2 2/4] x86/hvm: fix handling of accesses to partial r/o
 MMIO pages
To: Roger Pau Monne 
Cc: Andrew Cooper , xen-devel@lists.xenproject.org
References: <20250415153246.81688-1-roger.pau@citrix.com>
 <20250415153246.81688-3-roger.pau@citrix.com>
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From: Jan Beulich 
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On 15.04.2025 17:32, Roger Pau Monne wrote:
> --- a/xen/arch/x86/hvm/emulate.c
> +++ b/xen/arch/x86/hvm/emulate.c
> @@ -370,7 +370,12 @@ static int hvmemul_do_io(
>          /* If there is no suitable backing DM, just ignore accesses */
>          if ( !s )
>          {
> -            if ( is_mmio && is_hardware_domain(currd) )
> +            if ( is_mmio && is_hardware_domain(currd) &&
> +                 /*
> +                  * Do not attempt to fixup accesses to r/o MMIO regions, they
> +                  * are expected to be terminated by the null handler below.
> +                  */
> +                 !rangeset_contains_singleton(mmio_ro_ranges, PFN_DOWN(addr)) )
>              {
>                  /*
>                   * PVH dom0 is likely missing MMIO mappings on the p2m, due to

Doesn't this need limiting to writes, i.e. permitting reads to still be
handled right here?

> --- /dev/null
> +++ b/xen/arch/x86/hvm/mmio.c
> @@ -0,0 +1,100 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * MMIO related routines.
> + *
> + * Copyright (c) 2025 Cloud Software Group
> + */
> +
> +#include 
> +#include 
> +
> +#include 
> +
> +static int cf_check subpage_mmio_accept(struct vcpu *v, unsigned long addr)
> +{
> +    p2m_type_t t;
> +    mfn_t mfn = get_gfn_query_unlocked(v->domain, addr, &t);

Don't you need to use PFN_DOWN() on addr?

> +    return !mfn_eq(mfn, INVALID_MFN) && t == p2m_mmio_direct &&
> +           subpage_mmio_find_page(mfn);
> +}
> +
> +static int cf_check subpage_mmio_read(
> +    struct vcpu *v, unsigned long addr, unsigned int len, unsigned long *data)
> +{
> +    struct domain *d = v->domain;
> +    p2m_type_t t;
> +    mfn_t mfn = get_gfn_query(d, addr, &t);

Same here and further down, and in the write case?

> +    struct subpage_ro_range *entry;
> +    volatile void __iomem *mem;
> +
> +    *data = ~0UL;
> +
> +    if ( mfn_eq(mfn, INVALID_MFN) || t != p2m_mmio_direct )
> +    {
> +        put_gfn(d, addr);
> +        return X86EMUL_RETRY;
> +    }
> +
> +    entry = subpage_mmio_find_page(mfn);
> +    if ( !entry )
> +    {
> +        put_gfn(d, addr);
> +        return X86EMUL_OKAY;
> +    }
> +
> +    mem = subpage_mmio_map_page(entry);
> +    if ( !mem )
> +    {
> +        put_gfn(d, addr);
> +        gprintk(XENLOG_ERR,
> +                "Failed to map page for MMIO read at %#lx -> %#lx\n",
> +                addr, mfn_to_maddr(mfn) + PAGE_OFFSET(addr));
> +        return X86EMUL_OKAY;
> +    }
> +
> +    *data = read_mmio(mem + PAGE_OFFSET(addr), len);

What if this crosses the trailing page boundary? Imo subpage_mmio_accept()
would better reject misaligned accesses (at least until we know we need to
handle such for some obscure reason).

> +    put_gfn(d, addr);
> +    return X86EMUL_OKAY;
> +}

Thinking of it - why do reads need handling here? The guest has read access?
Hmm, yes, read-modify-write operations may take this path. Maybe worth
having a comment here.

> +void register_subpage_ro_handler(struct domain *d)
> +{
> +    static const struct hvm_mmio_ops subpage_mmio_ops = {
> +        .check = subpage_mmio_accept,
> +        .read = subpage_mmio_read,
> +        .write = subpage_mmio_write,
> +    };
> +
> +    register_mmio_handler(d, &subpage_mmio_ops);

Are there any criteria by which we could limit the registration of this
handler?

Jan


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Date: Thu, 17 Apr 2025 09:01:15 +0100
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Subject: Re: x86 emulation bug
To: Jan Beulich , Fabian Specht 
Cc: manuel.andreas@tum.de, xen-devel@lists.xenproject.org
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On 17/04/2025 8:14 am, Jan Beulich wrote:
> On 17.04.2025 00:52, Fabian Specht wrote:
>> Dear all,
>>
>> we discovered a bug in hvm64 x86 Xen. Using the attached xtf test we are
>> able to trigger an assert in arch/x86/hvm/emulate.c:
>>
>>
>> if ( (hvmemul_ctxt->ctxt.regs->eflags & X86_EFLAGS_DF) && (reps > 1) )
>> {
>> 	/*
>> 	 * x86_emulate() clips the repetition count to ensure we don't wrap
>> 	 * the effective-address index register. Hence this assertion holds.
>> 	 */
>> 	ASSERT(offset >= ((reps - 1) * bytes_per_rep));
>> 	okay = hvm_virtual_to_linear_addr(
>> 		seg, reg, offset - (reps - 1) * bytes_per_rep,
>> 		reps * bytes_per_rep, access_type,
>> 		hvmemul_get_seg_reg(x86_seg_cs, hvmemul_ctxt), linear);
>> 	*linear += (reps - 1) * bytes_per_rep;
>> 	if ( hvmemul_ctxt->ctxt.addr_size != 64 )
>> 		*linear = (uint32_t)*linear;
>> }
>>
>>
>> If debug mode is not enabled, this will later on result in an integer
>> underflow, however we were not able to find any severe problems.
>>
>> The test below will not work with vanilla xtf.
> Thanks for the report. However, already on Andreas' report on the day before
> yesterday I was heavily inclined to ask about details you certainly have
> figured out already. I find it odd that you leave to us all re-figuring out.
> In this case, for example: Is the specific value you set %eax to relevant?
> (Probably not.) Is the specific value you set %rcx to relevant? (Probably
> not, but likely some part of it is.) Is the specific value you set %rdi to
> relevant? (Probably not, but likely some part of it is. Probably you
> setting it to 0 is also why the adjustment below is needed, and using a
> different value might permit avoiding that adjustment.) Is it relevant
> that you set EFLAGS.DF? (Quite likely.)
>
> Any other investigation results you may have collected would likely also
> make our job easier.

To add to this, the amount of RAM you create the XTF guest with is very
relevant too, because it changes the behaviour.

E.g. when the guest has 6G of RAM, 0x5564000000 becomes normal RAM.

~Andrew


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Date: Thu, 17 Apr 2025 10:04:26 +0200
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Subject: Re: [PATCH v7] Avoid crash calling PrintErrMesg from efi_multiboot2
To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 ,
 Frediano Ziglio 
Cc: xen-devel@lists.xenproject.org,
 "Daniel P. Smith" ,
 Andrew Cooper 
References: <20250321103258.37425-1-frediano.ziglio@cloud.com>
 
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On 17.04.2025 05:12, Marek Marczykowski-Górecki wrote:
> On Fri, Mar 21, 2025 at 10:32:58AM +0000, Frediano Ziglio wrote:
>> Although code is compiled with -fpic option data is not position
>> independent. This causes data pointer to become invalid if
>> code is not relocated properly which is what happens for
>> efi_multiboot2 which is called by multiboot entry code.
>>
>> Code tested adding
>>    PrintErrMesg(L"Test message", EFI_BUFFER_TOO_SMALL);
>> in efi_multiboot2 before calling efi_arch_edd (this function
>> can potentially call PrintErrMesg).
>>
>> Before the patch (XenServer installation on Qemu, xen replaced
>> with vanilla xen.gz):
>>   Booting `XenServer (Serial)'Booting `XenServer (Serial)'
>>   Test message: !!!! X64 Exception Type - 0E(#PF - Page-Fault)  CPU Apic ID - 00000000 !!!!
>>   ExceptionData - 0000000000000000  I:0 R:0 U:0 W:0 P:0 PK:0 SS:0 SGX:0
>>   RIP  - 000000007EE21E9A, CS  - 0000000000000038, RFLAGS - 0000000000210246
>>   RAX  - 000000007FF0C1B5, RCX - 0000000000000050, RDX - 0000000000000010
>>   RBX  - 0000000000000000, RSP - 000000007FF0C180, RBP - 000000007FF0C210
>>   RSI  - FFFF82D040467CE8, RDI - 0000000000000000
>>   R8   - 000000007FF0C1C8, R9  - 000000007FF0C1C0, R10 - 0000000000000000
>>   R11  - 0000000000001020, R12 - FFFF82D040467CE8, R13 - 000000007FF0C1B8
>>   R14  - 000000007EA33328, R15 - 000000007EA332D8
>>   DS   - 0000000000000030, ES  - 0000000000000030, FS  - 0000000000000030
>>   GS   - 0000000000000030, SS  - 0000000000000030
>>   CR0  - 0000000080010033, CR2 - FFFF82D040467CE8, CR3 - 000000007FC01000
>>   CR4  - 0000000000000668, CR8 - 0000000000000000
>>   DR0  - 0000000000000000, DR1 - 0000000000000000, DR2 - 0000000000000000
>>   DR3  - 0000000000000000, DR6 - 00000000FFFF0FF0, DR7 - 0000000000000400
>>   GDTR - 000000007F9DB000 0000000000000047, LDTR - 0000000000000000
>>   IDTR - 000000007F48E018 0000000000000FFF,   TR - 0000000000000000
>>   FXSAVE_STATE - 000000007FF0BDE0
>>   !!!! Find image based on IP(0x7EE21E9A) (No PDB)  (ImageBase=000000007EE20000, EntryPoint=000000007EE23935) !!!!
>>
>> After the patch:
>>   Booting `XenServer (Serial)'Booting `XenServer (Serial)'
>>   Test message: Buffer too small
>>   BdsDxe: loading Boot0000 "UiApp" from Fv(7CB8BDC9-F8EB-4F34-AAEA-3EE4AF6516A1)/FvFile(462CAA21-7614-4503-836E-8AB6F4662331)
>>   BdsDxe: starting Boot0000 "UiApp" from Fv(7CB8BDC9-F8EB-4F34-AAEA-3EE4AF6516A1)/FvFile(462CAA21-7614-4503-836E-8AB6F4662331)
>>
>> This partially rollback commit 00d5d5ce23e6.
>>
>> Fixes: 9180f5365524 ("x86: add multiboot2 protocol support for EFI platforms")
>> Signed-off-by: Frediano Ziglio 
> 
> -no-jump-tables is available since clang 3.9.0 (and since GCC 4.1.0), so
> with upgraded base toolchain requirements it's safe to commit this now.

And is therefore not eligible for backporting, despite the Fixes: tag.

> Acked-by: Marek Marczykowski-Górecki 

Committed.

Jan


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Date: Thu, 17 Apr 2025 10:07:46 +0200
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Subject: Re: x86 emulation bug
To: Andrew Cooper 
Cc: manuel.andreas@tum.de, xen-devel@lists.xenproject.org,
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On 17.04.2025 10:01, Andrew Cooper wrote:
> On 17/04/2025 8:14 am, Jan Beulich wrote:
>> On 17.04.2025 00:52, Fabian Specht wrote:
>>> Dear all,
>>>
>>> we discovered a bug in hvm64 x86 Xen. Using the attached xtf test we are
>>> able to trigger an assert in arch/x86/hvm/emulate.c:
>>>
>>>
>>> if ( (hvmemul_ctxt->ctxt.regs->eflags & X86_EFLAGS_DF) && (reps > 1) )
>>> {
>>> 	/*
>>> 	 * x86_emulate() clips the repetition count to ensure we don't wrap
>>> 	 * the effective-address index register. Hence this assertion holds.
>>> 	 */
>>> 	ASSERT(offset >= ((reps - 1) * bytes_per_rep));
>>> 	okay = hvm_virtual_to_linear_addr(
>>> 		seg, reg, offset - (reps - 1) * bytes_per_rep,
>>> 		reps * bytes_per_rep, access_type,
>>> 		hvmemul_get_seg_reg(x86_seg_cs, hvmemul_ctxt), linear);
>>> 	*linear += (reps - 1) * bytes_per_rep;
>>> 	if ( hvmemul_ctxt->ctxt.addr_size != 64 )
>>> 		*linear = (uint32_t)*linear;
>>> }
>>>
>>>
>>> If debug mode is not enabled, this will later on result in an integer
>>> underflow, however we were not able to find any severe problems.
>>>
>>> The test below will not work with vanilla xtf.
>> Thanks for the report. However, already on Andreas' report on the day before
>> yesterday I was heavily inclined to ask about details you certainly have
>> figured out already. I find it odd that you leave to us all re-figuring out.
>> In this case, for example: Is the specific value you set %eax to relevant?
>> (Probably not.) Is the specific value you set %rcx to relevant? (Probably
>> not, but likely some part of it is.) Is the specific value you set %rdi to
>> relevant? (Probably not, but likely some part of it is. Probably you
>> setting it to 0 is also why the adjustment below is needed, and using a
>> different value might permit avoiding that adjustment.) Is it relevant
>> that you set EFLAGS.DF? (Quite likely.)
>>
>> Any other investigation results you may have collected would likely also
>> make our job easier.
> 
> To add to this, the amount of RAM you create the XTF guest with is very
> relevant too, because it changes the behaviour.
> 
> E.g. when the guest has 6G of RAM, 0x5564000000 becomes normal RAM.

It's more like 342Gb that would be needed?

Jan


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I'm ok with making dom0less common in principle but I don't know if we should
keep using the word dom0less which we all know is confusing. In one of the
maintainers call we agreed on using "predefined domUs" to denote the concept of
starting domUs at boot in a static way. This was so that we could have a common
name for parts that are common between dom0less and hyperlaunch, while leaving
dom0less/hyperlaunch to denote arch specific bits. We need more opinions here.

On 14/04/2025 17:56, Oleksii Kurochko wrote:
> Move some parts of Arm's Dom0Less code to be reused by other architectures.
> At the moment, RISC-V is going to reuse these parts.
> 
> Move dom0less-build.h from the Arm-specific directory to asm-generic
> as these header is expected to be the same across acrhictectures with
> some updates: add the following declaration of construct_domU(),
> arch_xen_domctl_createdomain() and arch_create_domus() as there are
> some parts which are still architecture-specific.
Why do we need arch_xen_domctl_createdomain() and arch_create_domus()?
FWICS the latter already takes d_cfg as parameter. I think we could get away
with just a single arch specific function called during domU creation to e.g.
cover arch specific DT bindings.

Also, if there are already functions with _domU, use it instead of _domu (i.e.
lowercase) for consistency.

> 
> Introduce HAS_DOM0LESS to provide ability to enable generic Dom0less
> code for an architecture.
> 
> Relocate the CONFIG_DOM0LESS configuration to the common with adding
> "depends on HAS_DOM0LESS" to not break builds for architectures which
> don't support CONFIG_DOM0LESS config, especically it would be useful
> to not provide stubs for  construct_domU(), arch_xen_domctl_createdomain()
> and arch_create_domus() in case of *-randconfig which may set
> CONFIG_DOM0LESS=y.
> 
> Move is_dom0less_mode() function to the common code, as it depends on
> boot modules that are already part of the common code.
> 
> Move create_domUs() function to the common code with some updates:
> - Add function arch_xen_domctl_createdomain() as structure
>   xen_domctl_createdomain may have some arch-spicific information and
>   initialization.
> - Add arch_create_domus() to cover parsing of arch-specific features,
>   for example, SVE (Scalar Vector Extension ) exists only in Arm.
> 
> Signed-off-by: Oleksii Kurochko 
> ---
> Changes in v2:
>  - Convert 'depends on Arm' to 'depends on HAS_DOM0LESS' for
>    CONFIG_DOM0LESS_BOOT.
>  - Change 'default Arm' to 'default y' for CONFIG_DOM0LESS_BOOT as there is
>    dependency on HAS_DOM0LESS.
>  - Introduce HAS_DOM0LESS and enable it for Arm.
>  - Update the commit message.
> ---
>  xen/arch/arm/Kconfig                      |   9 +-
>  xen/arch/arm/dom0less-build.c             | 270 ++++++----------------
>  xen/arch/arm/include/asm/Makefile         |   1 +
>  xen/arch/arm/include/asm/dom0less-build.h |  32 ---
>  xen/common/Kconfig                        |  12 +
>  xen/common/device-tree/Makefile           |   1 +
>  xen/common/device-tree/dom0less-build.c   | 161 +++++++++++++
>  xen/include/asm-generic/dom0less-build.h  |  40 ++++
>  8 files changed, 287 insertions(+), 239 deletions(-)
>  delete mode 100644 xen/arch/arm/include/asm/dom0less-build.h
>  create mode 100644 xen/common/device-tree/dom0less-build.c
>  create mode 100644 xen/include/asm-generic/dom0less-build.h
> 
> diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig
> index 565f288331..060389c3c8 100644
> --- a/xen/arch/arm/Kconfig
> +++ b/xen/arch/arm/Kconfig
> @@ -15,6 +15,7 @@ config ARM
>  	select GENERIC_UART_INIT
>  	select HAS_ALTERNATIVE if HAS_VMAP
>  	select HAS_DEVICE_TREE
> +	select HAS_DOM0LESS
>  	select HAS_UBSAN
>  
>  config ARCH_DEFCONFIG
> @@ -119,14 +120,6 @@ config GICV2
>  	  Driver for the ARM Generic Interrupt Controller v2.
>  	  If unsure, say Y
>  
> -config DOM0LESS_BOOT
> -	bool "Dom0less boot support" if EXPERT
> -	default y
> -	help
> -	  Dom0less boot support enables Xen to create and start domU guests during
> -	  Xen boot without the need of a control domain (Dom0), which could be
> -	  present anyway.
> -
>  config GICV3
>  	bool "GICv3 driver"
>  	depends on !NEW_VGIC
> diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c
> index bd15563750..7ec3f85795 100644
> --- a/xen/arch/arm/dom0less-build.c
> +++ b/xen/arch/arm/dom0less-build.c
> @@ -20,38 +20,6 @@
>  #include 
>  #include 
>  
> -bool __init is_dom0less_mode(void)
> -{
> -    struct bootmodules *mods = &bootinfo.modules;
> -    struct bootmodule *mod;
> -    unsigned int i;
> -    bool dom0found = false;
> -    bool domUfound = false;
> -
> -    /* Look into the bootmodules */
> -    for ( i = 0 ; i < mods->nr_mods ; i++ )
> -    {
> -        mod = &mods->module[i];
> -        /* Find if dom0 and domU kernels are present */
> -        if ( mod->kind == BOOTMOD_KERNEL )
> -        {
> -            if ( mod->domU == false )
> -            {
> -                dom0found = true;
> -                break;
> -            }
> -            else
> -                domUfound = true;
> -        }
> -    }
> -
> -    /*
> -     * If there is no dom0 kernel but at least one domU, then we are in
> -     * dom0less mode
> -     */
> -    return ( !dom0found && domUfound );
> -}
> -
>  #ifdef CONFIG_VGICV2
>  static int __init make_gicv2_domU_node(struct kernel_info *kinfo)
>  {
> @@ -869,8 +837,8 @@ static inline int domain_p2m_set_allocation(struct domain *d, uint64_t mem,
>  }
>  #endif /* CONFIG_ARCH_PAGING_MEMPOOL */
>  
> -static int __init construct_domU(struct domain *d,
> -                                 const struct dt_device_node *node)
> +int __init construct_domU(struct domain *d,
> +                          const struct dt_device_node *node)
>  {
>      struct kernel_info kinfo = KERNEL_INFO_INIT;
>      const char *dom0less_enhanced;
> @@ -965,188 +933,92 @@ static int __init construct_domU(struct domain *d,
>      return alloc_xenstore_params(&kinfo);
>  }
>  
> -void __init create_domUs(void)
> -{
> -    struct dt_device_node *node;
> -    const char *dom0less_iommu;
> -    bool iommu = false;
> -    const struct dt_device_node *cpupool_node,
> -                                *chosen = dt_find_node_by_path("/chosen");
> -    const char *llc_colors_str = NULL;
> -
> -    BUG_ON(chosen == NULL);
> -    dt_for_each_child_node(chosen, node)
> -    {
> -        struct domain *d;
> -        struct xen_domctl_createdomain d_cfg = {
> -            .arch.gic_version = XEN_DOMCTL_CONFIG_GIC_NATIVE,
> -            .flags = XEN_DOMCTL_CDF_hvm | XEN_DOMCTL_CDF_hap,
> -            /*
> -             * The default of 1023 should be sufficient for guests because
> -             * on ARM we don't bind physical interrupts to event channels.
> -             * The only use of the evtchn port is inter-domain communications.
> -             * 1023 is also the default value used in libxl.
> -             */
> -            .max_evtchn_port = 1023,
> -            .max_grant_frames = -1,
> -            .max_maptrack_frames = -1,
> -            .grant_opts = XEN_DOMCTL_GRANT_version(opt_gnttab_max_version),
> -        };
> -        unsigned int flags = 0U;
> -        uint32_t val;
> -        int rc;
> -
> -        if ( !dt_device_is_compatible(node, "xen,domain") )
> -            continue;
> -
> -        if ( (max_init_domid + 1) >= DOMID_FIRST_RESERVED )
> -            panic("No more domain IDs available\n");
> -
> -        if ( dt_find_property(node, "xen,static-mem", NULL) )
> -        {
> -            if ( llc_coloring_enabled )
> -                panic("LLC coloring and static memory are incompatible\n");
> -
> -            flags |= CDF_staticmem;
> -        }
> -
> -        if ( dt_property_read_bool(node, "direct-map") )
> -        {
> -            if ( !(flags & CDF_staticmem) )
> -                panic("direct-map is not valid for domain %s without static allocation.\n",
> -                      dt_node_name(node));
> -
> -            flags |= CDF_directmap;
> -        }
>  
> -        if ( !dt_property_read_u32(node, "cpus", &d_cfg.max_vcpus) )
> -            panic("Missing property 'cpus' for domain %s\n",
> -                  dt_node_name(node));
> -
> -        if ( !dt_property_read_string(node, "passthrough", &dom0less_iommu) &&
> -             !strcmp(dom0less_iommu, "enabled") )
> -            iommu = true;
> +struct xen_domctl_createdomain __init arch_xen_domctl_createdomain(void)
Out of curiosity. Why by value?

> +{
> +    struct xen_domctl_createdomain d_cfg = {
> +        .arch.gic_version = XEN_DOMCTL_CONFIG_GIC_NATIVE,
> +        .flags = XEN_DOMCTL_CDF_hvm | XEN_DOMCTL_CDF_hap,
> +        /*
> +            * The default of 1023 should be sufficient for guests because
> +            * on ARM we don't bind physical interrupts to event channels.
> +            * The only use of the evtchn port is inter-domain communications.
> +            * 1023 is also the default value used in libxl.
> +            */
> +        .max_evtchn_port = 1023,
> +        .max_grant_frames = -1,
> +        .max_maptrack_frames = -1,
> +        .grant_opts = XEN_DOMCTL_GRANT_version(opt_gnttab_max_version),
> +    };
> +
> +    return d_cfg;
> +}
>  
> -        if ( iommu_enabled &&
> -             (iommu || dt_find_compatible_node(node, NULL,
> -                                               "multiboot,device-tree")) )
> -            d_cfg.flags |= XEN_DOMCTL_CDF_iommu;
> +void __init arch_create_domus(struct dt_device_node *node,
> +                       struct xen_domctl_createdomain *d_cfg,
> +                       unsigned int flags)
> +{
> +    uint32_t val;
>  
> -        if ( !dt_property_read_u32(node, "nr_spis", &d_cfg.arch.nr_spis) )
> -        {
> -            int vpl011_virq = GUEST_VPL011_SPI;
> -
> -            d_cfg.arch.nr_spis = VGIC_DEF_NR_SPIS;
> -
> -            /*
> -             * The VPL011 virq is GUEST_VPL011_SPI, unless direct-map is
> -             * set, in which case it'll match the hardware.
> -             *
> -             * Since the domain is not yet created, we can't use
> -             * d->arch.vpl011.irq. So the logic to find the vIRQ has to
> -             * be hardcoded.
> -             * The logic here shall be consistent with the one in
> -             * domain_vpl011_init().
> -             */
> -            if ( flags & CDF_directmap )
> -            {
> -                vpl011_virq = serial_irq(SERHND_DTUART);
> -                if ( vpl011_virq < 0 )
> -                    panic("Error getting IRQ number for this serial port %d\n",
> -                          SERHND_DTUART);
> -            }
> +    if ( !dt_property_read_u32(node, "nr_spis", &d_cfg->arch.nr_spis) )
> +    {
> +        int vpl011_virq = GUEST_VPL011_SPI;
>  
> -            /*
> -             * vpl011 uses one emulated SPI. If vpl011 is requested, make
> -             * sure that we allocate enough SPIs for it.
> -             */
> -            if ( dt_property_read_bool(node, "vpl011") )
> -                d_cfg.arch.nr_spis = MAX(d_cfg.arch.nr_spis,
> -                                         vpl011_virq - 32 + 1);
> -        }
> +        d_cfg->arch.nr_spis = VGIC_DEF_NR_SPIS;
>  
> -        /* Get the optional property domain-cpupool */
> -        cpupool_node = dt_parse_phandle(node, "domain-cpupool", 0);
> -        if ( cpupool_node )
> +        /*
> +         * The VPL011 virq is GUEST_VPL011_SPI, unless direct-map is
> +         * set, in which case it'll match the hardware.
> +         *
> +         * Since the domain is not yet created, we can't use
> +         * d->arch.vpl011.irq. So the logic to find the vIRQ has to
> +         * be hardcoded.
> +         * The logic here shall be consistent with the one in
> +         * domain_vpl011_init().
> +         */
> +        if ( flags & CDF_directmap )
>          {
> -            int pool_id = btcpupools_get_domain_pool_id(cpupool_node);
> -            if ( pool_id < 0 )
> -                panic("Error getting cpupool id from domain-cpupool (%d)\n",
> -                      pool_id);
> -            d_cfg.cpupool_id = pool_id;
> +            vpl011_virq = serial_irq(SERHND_DTUART);
> +            if ( vpl011_virq < 0 )
> +                panic("Error getting IRQ number for this serial port %d\n",
> +                        SERHND_DTUART);
>          }
>  
> -        if ( dt_property_read_u32(node, "max_grant_version", &val) )
> -            d_cfg.grant_opts = XEN_DOMCTL_GRANT_version(val);
> +        /*
> +         * vpl011 uses one emulated SPI. If vpl011 is requested, make
> +         * sure that we allocate enough SPIs for it.
> +         */
> +        if ( dt_property_read_bool(node, "vpl011") )
> +            d_cfg->arch.nr_spis = MAX(d_cfg->arch.nr_spis,
> +                                      vpl011_virq - 32 + 1);
> +    }
>  
> -        if ( dt_property_read_u32(node, "max_grant_frames", &val) )
> -        {
> -            if ( val > INT32_MAX )
> -                panic("max_grant_frames (%"PRIu32") overflow\n", val);
> -            d_cfg.max_grant_frames = val;
> -        }
> +    if ( dt_get_property(node, "sve", &val) )
> +    {
> +#ifdef CONFIG_ARM64_SVE
> +        unsigned int sve_vl_bits;
> +        bool ret = false;
>  
> -        if ( dt_property_read_u32(node, "max_maptrack_frames", &val) )
> +        if ( !val )
>          {
> -            if ( val > INT32_MAX )
> -                panic("max_maptrack_frames (%"PRIu32") overflow\n", val);
> -            d_cfg.max_maptrack_frames = val;
> +            /* Property found with no value, means max HW VL supported */
> +            ret = sve_domctl_vl_param(-1, &sve_vl_bits);
>          }
> -
> -        if ( dt_get_property(node, "sve", &val) )
> +        else
>          {
> -#ifdef CONFIG_ARM64_SVE
> -            unsigned int sve_vl_bits;
> -            bool ret = false;
> -
> -            if ( !val )
> -            {
> -                /* Property found with no value, means max HW VL supported */
> -                ret = sve_domctl_vl_param(-1, &sve_vl_bits);
> -            }
> +            if ( dt_property_read_u32(node, "sve", &val) )
> +                ret = sve_domctl_vl_param(val, &sve_vl_bits);
>              else
> -            {
> -                if ( dt_property_read_u32(node, "sve", &val) )
> -                    ret = sve_domctl_vl_param(val, &sve_vl_bits);
> -                else
> -                    panic("Error reading 'sve' property\n");
> -            }
> +                panic("Error reading 'sve' property\n");
> +        }
>  
> -            if ( ret )
> -                d_cfg.arch.sve_vl = sve_encode_vl(sve_vl_bits);
> -            else
> -                panic("SVE vector length error\n");
> +        if ( ret )
> +            d_cfg->arch.sve_vl = sve_encode_vl(sve_vl_bits);
> +        else
> +            panic("SVE vector length error\n");
>  #else
> -            panic("'sve' property found, but CONFIG_ARM64_SVE not selected\n");
> +        panic("'sve' property found, but CONFIG_ARM64_SVE not selected\n");
>  #endif
> -        }
> -
> -        dt_property_read_string(node, "llc-colors", &llc_colors_str);
> -        if ( !llc_coloring_enabled && llc_colors_str )
> -            panic("'llc-colors' found, but LLC coloring is disabled\n");
> -
> -        /*
> -         * The variable max_init_domid is initialized with zero, so here it's
> -         * very important to use the pre-increment operator to call
> -         * domain_create() with a domid > 0. (domid == 0 is reserved for Dom0)
> -         */
> -        d = domain_create(++max_init_domid, &d_cfg, flags);
> -        if ( IS_ERR(d) )
> -            panic("Error creating domain %s (rc = %ld)\n",
> -                  dt_node_name(node), PTR_ERR(d));
> -
> -        if ( llc_coloring_enabled &&
> -             (rc = domain_set_llc_colors_from_str(d, llc_colors_str)) )
> -            panic("Error initializing LLC coloring for domain %s (rc = %d)\n",
> -                  dt_node_name(node), rc);
> -
> -        d->is_console = true;
> -        dt_device_set_used_by(node, d->domain_id);
> -
> -        rc = construct_domU(d, node);
> -        if ( rc )
> -            panic("Could not set up domain %s (rc = %d)\n",
> -                  dt_node_name(node), rc);
>      }
>  }
>  
> diff --git a/xen/arch/arm/include/asm/Makefile b/xen/arch/arm/include/asm/Makefile
> index 4a4036c951..831c914cce 100644
> --- a/xen/arch/arm/include/asm/Makefile
> +++ b/xen/arch/arm/include/asm/Makefile
> @@ -1,6 +1,7 @@
>  # SPDX-License-Identifier: GPL-2.0-only
>  generic-y += altp2m.h
>  generic-y += device.h
> +generic-y += dom0less-build.h
>  generic-y += hardirq.h
>  generic-y += iocap.h
>  generic-y += paging.h
> diff --git a/xen/arch/arm/include/asm/dom0less-build.h b/xen/arch/arm/include/asm/dom0less-build.h
> deleted file mode 100644
> index 5864944bda..0000000000
> --- a/xen/arch/arm/include/asm/dom0less-build.h
> +++ /dev/null
> @@ -1,32 +0,0 @@
> -/* SPDX-License-Identifier: GPL-2.0-only */
> -
> -#ifndef __ASM_DOM0LESS_BUILD_H_
> -#define __ASM_DOM0LESS_BUILD_H_
> -
> -#include 
> -
> -#ifdef CONFIG_DOM0LESS_BOOT
> -
> -void create_domUs(void);
> -bool is_dom0less_mode(void);
> -
> -#else /* !CONFIG_DOM0LESS_BOOT */
> -
> -static inline void create_domUs(void) {}
> -static inline bool is_dom0less_mode(void)
> -{
> -    return false;
> -}
> -
> -#endif /* CONFIG_DOM0LESS_BOOT */
> -
> -#endif /* __ASM_DOM0LESS_BUILD_H_ */
> -
> -/*
> - * Local variables:
> - * mode: C
> - * c-file-style: "BSD"
> - * c-basic-offset: 4
> - * indent-tabs-mode: nil
> - * End:
> - */
> diff --git a/xen/common/Kconfig b/xen/common/Kconfig
> index 06ae9751aa..2fd79aea5b 100644
> --- a/xen/common/Kconfig
> +++ b/xen/common/Kconfig
> @@ -12,6 +12,15 @@ config CORE_PARKING
>  	bool
>  	depends on NR_CPUS > 1
>  
> +config DOM0LESS_BOOT
> +	bool "Dom0less boot support" if EXPERT
> +	depends on HAS_DOM0LESS
You put dom0less code under device-tree, yet I don't see any of these Kconfig
options being dependent on HAS_DEVICE_TREE. I think this is wrong.

> +	default y
> +	help
> +	  Dom0less boot support enables Xen to create and start domU guests during
> +	  Xen boot without the need of a control domain (Dom0), which could be
> +	  present anyway.
> +
>  config GRANT_TABLE
>  	bool "Grant table support" if EXPERT
>  	default y
> @@ -73,6 +82,9 @@ config HAS_COMPAT
>  config HAS_DEVICE_TREE
>  	bool
>  
> +config HAS_DOM0LESS
> +	bool
> +
>  config HAS_DIT # Data Independent Timing
>  	bool
>  
> diff --git a/xen/common/device-tree/Makefile b/xen/common/device-tree/Makefile
> index 7c549be38a..f3dafc9b81 100644
> --- a/xen/common/device-tree/Makefile
> +++ b/xen/common/device-tree/Makefile
> @@ -1,5 +1,6 @@
>  obj-y += bootfdt.init.o
>  obj-y += bootinfo.init.o
>  obj-y += device-tree.o
> +obj-$(CONFIG_DOM0LESS_BOOT) += dom0less-build.o
>  obj-$(CONFIG_OVERLAY_DTB) += dt-overlay.o
>  obj-y += intc.o
> diff --git a/xen/common/device-tree/dom0less-build.c b/xen/common/device-tree/dom0less-build.c
> new file mode 100644
> index 0000000000..19bfa5e005
> --- /dev/null
> +++ b/xen/common/device-tree/dom0less-build.c
> @@ -0,0 +1,161 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
empty line here please

> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include 
> +
> +#include 
> +#include 
> +
> +bool __init is_dom0less_mode(void)
> +{
> +    struct bootmodules *mods = &bootinfo.modules;
> +    struct bootmodule *mod;
> +    unsigned int i;
> +    bool dom0found = false;
> +    bool domUfound = false;
> +
> +    /* Look into the bootmodules */
> +    for ( i = 0 ; i < mods->nr_mods ; i++ )
> +    {
> +        mod = &mods->module[i];
> +        /* Find if dom0 and domU kernels are present */
> +        if ( mod->kind == BOOTMOD_KERNEL )
> +        {
> +            if ( mod->domU == false )
> +            {
> +                dom0found = true;
> +                break;
> +            }
> +            else
> +                domUfound = true;
> +        }
> +    }
> +
> +    /*
> +     * If there is no dom0 kernel but at least one domU, then we are in
> +     * dom0less mode
> +     */
> +    return ( !dom0found && domUfound );
> +}
> +
> +void __init create_domUs(void)
> +{
> +    struct dt_device_node *node;
> +    const char *dom0less_iommu;
> +    bool iommu = false;
> +    const struct dt_device_node *cpupool_node,
> +                                *chosen = dt_find_node_by_path("/chosen");
> +    const char *llc_colors_str = NULL;
> +
> +    BUG_ON(chosen == NULL);
> +    dt_for_each_child_node(chosen, node)
> +    {
> +        struct domain *d;
> +        struct xen_domctl_createdomain d_cfg = arch_xen_domctl_createdomain();
> +        unsigned int flags = 0U;
> +        uint32_t val;
> +        int rc;
> +
> +        if ( !dt_device_is_compatible(node, "xen,domain") )
> +            continue;
> +
> +        if ( (max_init_domid + 1) >= DOMID_FIRST_RESERVED )
> +            panic("No more domain IDs available\n");
> +
> +        if ( dt_find_property(node, "xen,static-mem", NULL) )
> +        {
> +            if ( llc_coloring_enabled )
> +                panic("LLC coloring and static memory are incompatible\n");
> +
> +            flags |= CDF_staticmem;
> +        }
> +
> +        if ( dt_property_read_bool(node, "direct-map") )
> +        {
> +            if ( !(flags & CDF_staticmem) )
> +                panic("direct-map is not valid for domain %s without static allocation.\n",
> +                      dt_node_name(node));
> +
> +            flags |= CDF_directmap;
> +        }
> +
> +        if ( !dt_property_read_u32(node, "cpus", &d_cfg.max_vcpus) )
> +            panic("Missing property 'cpus' for domain %s\n",
> +                  dt_node_name(node));
> +
> +        if ( !dt_property_read_string(node, "passthrough", &dom0less_iommu) &&
> +             !strcmp(dom0less_iommu, "enabled") )
> +            iommu = true;
> +
> +        if ( iommu_enabled &&
> +             (iommu || dt_find_compatible_node(node, NULL,
> +                                               "multiboot,device-tree")) )
> +            d_cfg.flags |= XEN_DOMCTL_CDF_iommu;
> +
> +        /* Get the optional property domain-cpupool */
> +        cpupool_node = dt_parse_phandle(node, "domain-cpupool", 0);
> +        if ( cpupool_node )
> +        {
> +            int pool_id = btcpupools_get_domain_pool_id(cpupool_node);
> +            if ( pool_id < 0 )
> +                panic("Error getting cpupool id from domain-cpupool (%d)\n",
> +                      pool_id);
> +            d_cfg.cpupool_id = pool_id;
> +        }
> +
> +        if ( dt_property_read_u32(node, "max_grant_version", &val) )
> +            d_cfg.grant_opts = XEN_DOMCTL_GRANT_version(val);
> +
> +        if ( dt_property_read_u32(node, "max_grant_frames", &val) )
> +        {
> +            if ( val > INT32_MAX )
> +                panic("max_grant_frames (%"PRIu32") overflow\n", val);
> +            d_cfg.max_grant_frames = val;
> +        }
> +
> +        if ( dt_property_read_u32(node, "max_maptrack_frames", &val) )
> +        {
> +            if ( val > INT32_MAX )
> +                panic("max_maptrack_frames (%"PRIu32") overflow\n", val);
> +            d_cfg.max_maptrack_frames = val;
> +        }
> +
> +        dt_property_read_string(node, "llc-colors", &llc_colors_str);
> +        if ( !llc_coloring_enabled && llc_colors_str )
> +            panic("'llc-colors' found, but LLC coloring is disabled\n");
> +
> +        arch_create_domus(node, &d_cfg, flags);
> +
> +        /*
> +         * The variable max_init_domid is initialized with zero, so here it's
> +         * very important to use the pre-increment operator to call
> +         * domain_create() with a domid > 0. (domid == 0 is reserved for Dom0)
> +         */
> +        d = domain_create(++max_init_domid, &d_cfg, flags);
> +        if ( IS_ERR(d) )
> +            panic("Error creating domain %s (rc = %ld)\n",
> +                  dt_node_name(node), PTR_ERR(d));
> +
> +        if ( llc_coloring_enabled &&
> +             (rc = domain_set_llc_colors_from_str(d, llc_colors_str)) )
> +            panic("Error initializing LLC coloring for domain %s (rc = %d)\n",
> +                  dt_node_name(node), rc);
> +
> +        d->is_console = true;
> +        dt_device_set_used_by(node, d->domain_id);
> +
> +        rc = construct_domU(d, node);
> +        if ( rc )
> +            panic("Could not set up domain %s (rc = %d)\n",
> +                  dt_node_name(node), rc);
> +    }
> +}
> diff --git a/xen/include/asm-generic/dom0less-build.h b/xen/include/asm-generic/dom0less-build.h
> new file mode 100644
> index 0000000000..a6985bc20a
> --- /dev/null
> +++ b/xen/include/asm-generic/dom0less-build.h
> @@ -0,0 +1,40 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
empty line here please

> +#ifndef __ASM_GENERIC_DOM0LESS_BUILD_H__
> +#define __ASM_GENERIC_DOM0LESS_BUILD_H__
> +
> +#include 
> +
> +#ifdef CONFIG_DOM0LESS_BOOT
> +
> +#include 
> +
> +void create_domUs(void);
> +bool is_dom0less_mode(void);
> +
> +int construct_domU(struct domain *d, const struct dt_device_node *node);
I don't see necessary headers included for these structs
> +
> +struct xen_domctl_createdomain arch_xen_domctl_createdomain(void);
> +void arch_create_domus(struct dt_device_node *node,
> +                       struct xen_domctl_createdomain *d_cfg,
> +                       unsigned int flags);
> +
> +#else /* !CONFIG_DOM0LESS_BOOT */
> +
> +static inline void create_domUs(void) {}
> +static inline bool is_dom0less_mode(void)
> +{
> +    return false;
> +}
> +
> +#endif /* CONFIG_DOM0LESS_BOOT */
> +
> +#endif /* __ASM_GENERIC_DOM0LESS_BUILD_H__ */
> +
> +/*
> + * Local variables:
> + * mode: C
> + * c-file-style: "BSD"
> + * c-basic-offset: 4
> + * indent-tabs-mode: nil
> + * End:
> + */

~Michal



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Subject: Re: [PATCH v2 2/8] xen/common: dom0less: make some parts of Arm's
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To: "Orzel, Michal" ,
 Oleksii Kurochko 
Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
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On 17.04.2025 10:08, Orzel, Michal wrote:
>> --- /dev/null
>> +++ b/xen/include/asm-generic/dom0less-build.h
>> @@ -0,0 +1,40 @@
>> +/* SPDX-License-Identifier: GPL-2.0-only */
> empty line here please
> 
>> +#ifndef __ASM_GENERIC_DOM0LESS_BUILD_H__
>> +#define __ASM_GENERIC_DOM0LESS_BUILD_H__
>> +
>> +#include 
>> +
>> +#ifdef CONFIG_DOM0LESS_BOOT
>> +
>> +#include 
>> +
>> +void create_domUs(void);
>> +bool is_dom0less_mode(void);
>> +
>> +int construct_domU(struct domain *d, const struct dt_device_node *node);
> I don't see necessary headers included for these structs

Just to mention it - it shouldn't be extra headers, but forward decls. We
aim at keeping header dependencies down where possible.

Jan


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To: "xen-devel@lists.xenproject.org" 
Cc: Julien Grall , Stefano Stabellini
 , Volodymyr Babchuk ,
 Bertrand Marquis ,
 Michal Orzel ,
 "consulting@bugseng.com" 
From: Jan Beulich 
Subject: [PATCH] Arm: rename smp_clear_cpu_maps()
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The function has lost all clearing operations. Use the commonly
available name (declared in xen/smp.h), that x86 also uses.

Signed-off-by: Jan Beulich 
---
I would have expected this to also address a Misra violation
(declaration without definition), but I can't spot any rule (having
looked through 8.x in particular) to this effect.

--- a/xen/arch/arm/include/asm/smp.h
+++ b/xen/arch/arm/include/asm/smp.h
@@ -29,7 +29,6 @@ int cpu_up_send_sgi(int cpu);
 extern void init_secondary(void);
 
 extern void smp_init_cpus(void);
-extern void smp_clear_cpu_maps (void);
 extern unsigned int smp_get_max_cpus(void);
 
 #define cpu_physical_id(cpu) cpu_logical_map(cpu)
--- a/xen/arch/arm/setup.c
+++ b/xen/arch/arm/setup.c
@@ -317,7 +317,7 @@ void asmlinkage __init start_xen(unsigne
     /* Initialize traps early allow us to get backtrace when an error occurred */
     init_traps();
 
-    smp_clear_cpu_maps();
+    smp_prepare_boot_cpu();
 
     device_tree_flattened = early_fdt_map(fdt_paddr);
     if ( !device_tree_flattened )
--- a/xen/arch/arm/smpboot.c
+++ b/xen/arch/arm/smpboot.c
@@ -107,8 +107,7 @@ static void remove_cpu_sibling_map(int c
     free_cpumask_var(per_cpu(cpu_core_mask, cpu));
 }
 
-void __init
-smp_clear_cpu_maps (void)
+void __init smp_prepare_boot_cpu(void)
 {
     cpumask_set_cpu(0, &cpu_online_map);
     cpumask_set_cpu(0, &cpu_possible_map);


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On 17.04.25 01:03, Stefano Stabellini wrote:
> On Tue, 15 Apr 2025, Grygorii Strashko wrote:
>> From: Grygorii Strashko 
>>
>> This patch adds Xen XSM policy loading support.
>>
>> The configuration file XEN_POLICY specifies Xen hypervisor
>> XSM policy binary to load.
>>
>> Signed-off-by: Grygorii Strashko 
>> ---
>> changes in v2:
>> - fix conditional statements for XEN_POLICY
>> - add XSM policy binary check
>>
>>   README.md                |  2 ++
>>   scripts/uboot-script-gen | 34 ++++++++++++++++++++++++++++++++++
>>   2 files changed, 36 insertions(+)
>>
>> diff --git a/README.md b/README.md
>> index 137abef153ce..9106d2a07302 100644
>> --- a/README.md
>> +++ b/README.md
>> @@ -91,6 +91,8 @@ Where:
>>   - XEN specifies the Xen hypervisor binary to load. Note that it has to
>>     be a regular Xen binary, not a u-boot binary.
>>   
>> +- XEN_POLICY specifies the Xen hypervisor XSM policy binary to load.
>> +
>>   - XEN_COLORS specifies the colors (cache coloring) to be used for Xen
>>     and is in the format startcolor-endcolor
>>   
>> diff --git a/scripts/uboot-script-gen b/scripts/uboot-script-gen
>> index c4d26caf5e0e..208eafdecfeb 100755
>> --- a/scripts/uboot-script-gen
>> +++ b/scripts/uboot-script-gen
>> @@ -315,6 +315,15 @@ function xen_device_tree_editing()
>>       dt_set "/chosen" "#size-cells" "hex" "0x2"
>>       dt_set "/chosen" "xen,xen-bootargs" "str" "$XEN_CMD"
>>   
>> +    if test -n "$XEN_POLICY" && test "$xen_policy_addr" != "-"
>> +    then
>> +        local node_name="xen-policy@${xen_policy_addr#0x}"
>> +
>> +        dt_mknode "/chosen" "$node_name"
>> +        dt_set "/chosen/$node_name" "compatible" "str_a" "xen,xsm-policy xen,multiboot-module multiboot,module"
>> +        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $xen_policy_addr $xen_policy_size)"
>> +    fi
>> +
>>       if test "$DOM0_KERNEL"
>>       then
>>           local node_name="dom0@${dom0_kernel_addr#0x}"
>> @@ -900,6 +909,15 @@ xen_file_loading()
>>       kernel_addr=$memaddr
>>       kernel_path=$XEN
>>       load_file "$XEN" "host_kernel"
>> +
>> +    xen_policy_addr="-"
>> +    if test -n "$XEN_POLICY"
>> +    then
>> +        check_file_type "${XEN_POLICY}" "SE Linux policy"
>> +        xen_policy_addr=$memaddr
>> +        load_file "$XEN_POLICY" "xen_policy"
>> +        xen_policy_size=$filesize
>> +    fi
>>   }
>>   
>>   linux_file_loading()
>> @@ -939,6 +957,22 @@ bitstream_load_and_config()
>>   
>>   create_its_file_xen()
>>   {
>> +    if test -n "$XEN_POLICY" && test "$xen_policy_addr" != "-"
>> +    then
>> +        cat >> "$its_file" <<- EOF
>> +        xen_policy {
>> +            description = "Xen XSM policy binary";
>> +            data = /incbin/("$XEN_POLICY");
>> +            type = "kernel";
> 
> This should be "firmware". Aside from that, the patch is fine.
> If you are OK with it, I can fix it on commit.
> 

I'm ok. Thank you.

-- 
Best regards,
-grygorii


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Subject: Re: [PATCH v1 11/14] xen/riscv: add external interrupt handling for
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Cc: Alistair Francis ,
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 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Romain Caritey , xen-devel@lists.xenproject.org
References: 
 <1685488b8c1b48149e94bd3625c7b46b78c72e8e.1744126720.git.oleksii.kurochko@gmail.com>
 
Content-Language: en-US
From: Oleksii Kurochko 
In-Reply-To: 

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On 4/15/25 4:42 PM, Jan Beulich wrote:
>
>> +    /* clear the pending bit */
>> +    csr_clear(CSR_SIP, 1UL << IRQ_S_EXT);
>> +
>> +    /* dispatch the interrupt */
>> +    do_IRQ(regs, csr_swap(CSR_STOPEI, 0) >> TOPI_IID_SHIFT);
>> +
>> +    /* enable external interrupts */
>> +    csr_set(CSR_SIE, 1UL << IRQ_S_EXT);
>> +}
> Why does "cause" need passing into here? I realize the function is used ...
>
>> @@ -278,6 +293,7 @@ static const struct intc_hw_operations aplic_ops = {
>>       .host_irq_type       = &aplic_host_irq_type,
>>       .set_irq_priority    = aplic_set_irq_priority,
>>       .set_irq_type        = aplic_set_irq_type,
>> +    .handle_interrupt    = aplic_handle_interrupt,
>>   };
> ... as a hook, yet it's still unclear whether (why) any other such hook
> would need the cause to be passed in.

I don't remember a particular reason, but it could have been dropped. If, for some reason,
the cause is needed in|handle_interrupt()|, it can be retrieved explicitly from a register.

>
>> @@ -33,6 +44,20 @@ do {                            \
>>       csr_clear(CSR_SIREG, v);    \
>>   } while (0)
>>   
>> +void imsic_ids_local_delivery(bool enable)
> __init as long as the sole caller is such?

Yes, it make sense. Also, I noticed some other functions that could be __init in imsic.c (but likely
you mentioned that in the previous patches).

>> --- a/xen/arch/riscv/intc.c
>> +++ b/xen/arch/riscv/intc.c
>> @@ -51,6 +51,13 @@ static void intc_set_irq_priority(struct irq_desc *desc, unsigned int priority)
>>       intc_hw_ops->set_irq_priority(desc, priority);
>>   }
>>   
>> +void intc_handle_external_irqs(unsigned long cause, struct cpu_user_regs *regs)
>> +{
>> +    ASSERT(intc_hw_ops && intc_hw_ops->handle_interrupt);
> I don't view such checks (on every interrupt) as very useful. If you checked
> once early on - okay. But here you gain nothing at all ...
>
>> +    intc_hw_ops->handle_interrupt(cause, regs);
> ... towards the use here, when considering a release build.

I will try to find a better place then.

>
>
>> @@ -83,3 +87,42 @@ void __init init_IRQ(void)
>>       if ( init_irq_data() < 0 )
>>           panic("initialization of IRQ data failed\n");
>>   }
>> +
>> +/* Dispatch an interrupt */
>> +void do_IRQ(struct cpu_user_regs *regs, unsigned int irq)
>> +{
>> +    struct irq_desc *desc = irq_to_desc(irq);
>> +    struct irqaction *action;
>> +
>> +    irq_enter();
>> +
>> +    spin_lock(&desc->lock);
>> +    desc->handler->ack(desc);
>> +
>> +    if ( test_bit(_IRQ_DISABLED, &desc->status) )
>> +        goto out;
>> +
>> +    set_bit(_IRQ_INPROGRESS, &desc->status);
> Same comment as on the earlier patch - atomic bitop when in a suitably
> locked region?

Agree, it could be used non-atomic bitop.

>
>> +    action = desc->action;
>> +
>> +    spin_unlock_irq(&desc->lock);
>> +
>> +#ifndef CONFIG_IRQ_HAS_MULTIPLE_ACTION
> Stolen from Arm? What's this about?

Yes, it is stolen from Arm. I thought that it is a generic one, but the config is defined
inside Arm's config.h.
Then it could be dropped now as I don't know, at the moment, the cases when it is neeeded
to exectute several handler for an irq for RISC-V.

Thanks.

~ Oleksii


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On 4/15/25 4:42 PM, Jan Beulich wrote:

    

      



      

        
+    /* clear the pending bit */
+    csr_clear(CSR_SIP, 1UL << IRQ_S_EXT);
+
+    /* dispatch the interrupt */
+    do_IRQ(regs, csr_swap(CSR_STOPEI, 0) >> TOPI_IID_SHIFT);
+
+    /* enable external interrupts */
+    csr_set(CSR_SIE, 1UL << IRQ_S_EXT);
+}


      

      
Why does "cause" need passing into here? I realize the function is used ...



      

        
@@ -278,6 +293,7 @@ static const struct intc_hw_operations aplic_ops = {
     .host_irq_type       = &aplic_host_irq_type,
     .set_irq_priority    = aplic_set_irq_priority,
     .set_irq_type        = aplic_set_irq_type,
+    .handle_interrupt    = aplic_handle_interrupt,
 };


      

      
... as a hook, yet it's still unclear whether (why) any other such hook
would need the cause to be passed in.

    

    
I don't remember a particular reason, but it could have been dropped. If, for some reason,
the cause is needed in handle_interrupt(), it can be retrieved explicitly from a register.

    

      



      

        
@@ -33,6 +44,20 @@ do {                            \
     csr_clear(CSR_SIREG, v);    \
 } while (0)
 
+void imsic_ids_local_delivery(bool enable)


      

      
__init as long as the sole caller is such?

    

    
Yes, it make sense. Also, I noticed some other functions that could be __init in imsic.c (but likely
you mentioned that in the previous patches).

    

      

        
--- a/xen/arch/riscv/intc.c
+++ b/xen/arch/riscv/intc.c
@@ -51,6 +51,13 @@ static void intc_set_irq_priority(struct irq_desc *desc, unsigned int priority)
     intc_hw_ops->set_irq_priority(desc, priority);
 }
 
+void intc_handle_external_irqs(unsigned long cause, struct cpu_user_regs *regs)
+{
+    ASSERT(intc_hw_ops && intc_hw_ops->handle_interrupt);


      

      
I don't view such checks (on every interrupt) as very useful. If you checked
once early on - okay. But here you gain nothing at all ...



      

        
+    intc_hw_ops->handle_interrupt(cause, regs);


      

      
... towards the use here, when considering a release build.

    

    
I will try to find a better place then.

    

      




      

        
@@ -83,3 +87,42 @@ void __init init_IRQ(void)
     if ( init_irq_data() < 0 )
         panic("initialization of IRQ data failed\n");
 }
+
+/* Dispatch an interrupt */
+void do_IRQ(struct cpu_user_regs *regs, unsigned int irq)
+{
+    struct irq_desc *desc = irq_to_desc(irq);
+    struct irqaction *action;
+
+    irq_enter();
+
+    spin_lock(&desc->lock);
+    desc->handler->ack(desc);
+
+    if ( test_bit(_IRQ_DISABLED, &desc->status) )
+        goto out;
+
+    set_bit(_IRQ_INPROGRESS, &desc->status);


      

      
Same comment as on the earlier patch - atomic bitop when in a suitably
locked region?

    

    
Agree, it could be used non-atomic bitop.



    

      



      

        
+    action = desc->action;
+
+    spin_unlock_irq(&desc->lock);
+
+#ifndef CONFIG_IRQ_HAS_MULTIPLE_ACTION


      

      
Stolen from Arm? What's this about?

    

    
Yes, it is stolen from Arm. I thought that it is a generic one, but the config is defined
inside Arm's config.h.
Then it could be dropped now as I don't know, at the moment, the cases when it is neeeded
to exectute several handler for an irq for RISC-V.

Thanks.

~ Oleksii

    

  


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User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH] xen-netfront: handle NULL returned by
 xdp_convert_buff_to_frame()
To: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= ,
 Jakub Kicinski 
Cc: Stefano Stabellini ,
 Oleksandr Tyshchenko ,
 "David S. Miller" , Eric Dumazet ,
 Paolo Abeni , Alexei Starovoitov ,
 Daniel Borkmann ,
 Jesper Dangaard Brouer ,
 John Fastabend , xen-devel@lists.xenproject.org,
 netdev@vger.kernel.org, linux-kernel@vger.kernel.org, bpf@vger.kernel.org,
 lvc-project@linuxtesting.org, stable@vger.kernel.org
References: <20250414183403.265943-1-sdl@nppct.ru>
 <20250416175835.687a5872@kernel.org>
 
 <0c29a3f9-9e22-4e44-892d-431f06555600@suse.com>
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From: Alexey 
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On 17.04.2025 10:12, Jürgen Groß wrote:
> On 17.04.25 09:00, Alexey wrote:
>>
>> On 17.04.2025 03:58, Jakub Kicinski wrote:
>>> On Mon, 14 Apr 2025 18:34:01 +0000 Alexey Nepomnyashih wrote:
>>>>           get_page(pdata);
>>> Please notice this get_page() here.
>>>
>>>>           xdpf = xdp_convert_buff_to_frame(xdp);
>>>> +        if (unlikely(!xdpf)) {
>>>> +            trace_xdp_exception(queue->info->netdev, prog, act);
>>>> +            break;
>>>> +        }
>> Do you mean that it would be better to move the get_page(pdata) call 
>> lower,
>> after checking for NULL in xdpf, so that the reference count is only 
>> increased
>> after a successful conversion?
>
> I think the error handling here is generally broken (or at least very
> questionable).
>
> I suspect that in case of at least some errors the get_page() is leaking
> even without this new patch.
>
> In case I'm wrong a comment reasoning why there is no leak should be
> added.
>
>
> Juergen

I think pdata is freed in xdp_return_frame_rx_napi() -> __xdp_return()



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Date: Thu, 17 Apr 2025 10:48:42 +0200
From: Nicola Vetrini 
To: Jan Beulich 
Cc: xen-devel@lists.xenproject.org, Julien Grall , Stefano
 Stabellini , Volodymyr Babchuk
 , Bertrand Marquis ,
 Michal Orzel , consulting@bugseng.com
Subject: Re: [PATCH] Arm: rename smp_clear_cpu_maps()
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On 2025-04-17 10:36, Jan Beulich wrote:
> The function has lost all clearing operations. Use the commonly
> available name (declared in xen/smp.h), that x86 also uses.
> 
> Signed-off-by: Jan Beulich 
> ---
> I would have expected this to also address a Misra violation
> (declaration without definition), but I can't spot any rule (having
> looked through 8.x in particular) to this effect.
> 

The rule you are looking for is 8.6: " An identifier with external 
linkage shall have exactly one external definition", which is explicitly 
deviated in Xen to allow declarations that have no definition, 
especially in the case where definitions may be optimized out by the 
compiler or are simply compiled out. I don't recall the specific 
discussion that led to this deviation, but I can dug it up, if needed.

> --- a/xen/arch/arm/include/asm/smp.h
> +++ b/xen/arch/arm/include/asm/smp.h
> @@ -29,7 +29,6 @@ int cpu_up_send_sgi(int cpu);
>  extern void init_secondary(void);
> 
>  extern void smp_init_cpus(void);
> -extern void smp_clear_cpu_maps (void);
>  extern unsigned int smp_get_max_cpus(void);
> 
>  #define cpu_physical_id(cpu) cpu_logical_map(cpu)
> --- a/xen/arch/arm/setup.c
> +++ b/xen/arch/arm/setup.c
> @@ -317,7 +317,7 @@ void asmlinkage __init start_xen(unsigne
>      /* Initialize traps early allow us to get backtrace when an error 
> occurred */
>      init_traps();
> 
> -    smp_clear_cpu_maps();
> +    smp_prepare_boot_cpu();
> 
>      device_tree_flattened = early_fdt_map(fdt_paddr);
>      if ( !device_tree_flattened )
> --- a/xen/arch/arm/smpboot.c
> +++ b/xen/arch/arm/smpboot.c
> @@ -107,8 +107,7 @@ static void remove_cpu_sibling_map(int c
>      free_cpumask_var(per_cpu(cpu_core_mask, cpu));
>  }
> 
> -void __init
> -smp_clear_cpu_maps (void)
> +void __init smp_prepare_boot_cpu(void)
>  {
>      cpumask_set_cpu(0, &cpu_online_map);
>      cpumask_set_cpu(0, &cpu_possible_map);

-- 
Nicola Vetrini, B.Sc.
Software Engineer
BUGSENG (https://bugseng.com)
LinkedIn: https://www.linkedin.com/in/nicola-vetrini-a42471253


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To: Alexey , Jakub Kicinski 
Cc: Stefano Stabellini ,
 Oleksandr Tyshchenko ,
 "David S. Miller" , Eric Dumazet ,
 Paolo Abeni , Alexei Starovoitov ,
 Daniel Borkmann ,
 Jesper Dangaard Brouer ,
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From: Juergen Gross 
To: Alexey , Jakub Kicinski 
Cc: Stefano Stabellini ,
 Oleksandr Tyshchenko ,
 "David S. Miller" , Eric Dumazet ,
 Paolo Abeni , Alexei Starovoitov ,
 Daniel Borkmann ,
 Jesper Dangaard Brouer ,
 John Fastabend , xen-devel@lists.xenproject.org,
 netdev@vger.kernel.org, linux-kernel@vger.kernel.org, bpf@vger.kernel.org,
 lvc-project@linuxtesting.org, stable@vger.kernel.org
Message-ID: 
Subject: Re: [PATCH] xen-netfront: handle NULL returned by
 xdp_convert_buff_to_frame()
References: <20250414183403.265943-1-sdl@nppct.ru>
 <20250416175835.687a5872@kernel.org>
 
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On 17/04/2025 10:36, Jan Beulich wrote:
> The function has lost all clearing operations. Use the commonly
> available name (declared in xen/smp.h), that x86 also uses.
> 
> Signed-off-by: Jan Beulich 
Reviewed-by: Michal Orzel 

~Michal



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH] xen/percpu: NUMA-position the per-CPU area
Date: Thu, 17 Apr 2025 09:53:02 +0100
Message-Id: <20250417085302.2554018-1-andrew.cooper3@citrix.com>
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This seems to have been quite an oversite in Xen's NUMA support, albeit it
probably because NUMA was arch-specific at first.

Take the opportunity to sort the includes.

Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Michal Orzel 
CC: Jan Beulich 
CC: Julien Grall 
CC: Roger Pau Monné 
CC: Stefano Stabellini 

https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1773336913

For the !NUMA case, cpu_to_node() defaults to 0 rather than NUMA_NO_NODE,
making memflags nonzero.  I'm not sure how wise this is, but ARM runs seem
happy with it.
---
 xen/common/percpu.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/xen/common/percpu.c b/xen/common/percpu.c
index c6ecd95a0874..cdd70acbeaf3 100644
--- a/xen/common/percpu.c
+++ b/xen/common/percpu.c
@@ -1,8 +1,9 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-#include 
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
 #include 
 
@@ -27,6 +28,8 @@ void __init percpu_init_areas(void)
 
 static int init_percpu_area(unsigned int cpu)
 {
+    nodeid_t node = cpu_to_node(cpu);
+    unsigned int memflags = node != NUMA_NO_NODE ? MEMF_node(node) : 0;
     char *p;
 
     if ( __per_cpu_offset[cpu] != INVALID_PERCPU_AREA )
@@ -34,7 +37,7 @@ static int init_percpu_area(unsigned int cpu)
                ? 0
                : -EBUSY;
 
-    if ( (p = alloc_xenheap_pages(PERCPU_ORDER, 0)) == NULL )
+    if ( (p = alloc_xenheap_pages(PERCPU_ORDER, memflags)) == NULL )
         return -ENOMEM;
 
     memset(p, 0, __per_cpu_data_end - __per_cpu_start);

base-commit: 7f8c2dd829358406dc9e50d5e386e4d2b20b4303
-- 
2.39.5



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To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Fabian Specht , Manuel Andreas 
From: Jan Beulich 
Subject: [PATCH] x86emul: also clip repetition count for STOS
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Like MOVS, INS, and OUTS, STOS also has a special purpose hook, where
the hook function may legitimately have the same expectation as to the
request not straddling address space start/end.

Fixes: 5dfe4aa4eeb6 ("x86_emulate: Do not request emulation of REP instructions beyond the")
Reported-by: Fabian Specht 
Signed-off-by: Jan Beulich 

--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -2221,7 +2221,7 @@ x86_emulate(
 
         dst.bytes = src.bytes;
         dst.mem.seg = x86_seg_es;
-        dst.mem.off = truncate_ea(_regs.r(di));
+        dst.mem.off = truncate_ea_and_reps(_regs.r(di), nr_reps, dst.bytes);
         if ( (nr_reps == 1) || !ops->rep_stos ||
              ((rc = ops->rep_stos(&src.val,
                                   dst.mem.seg, dst.mem.off, dst.bytes,


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Subject: Re: [PATCH] x86emul: also clip repetition count for STOS
To: Jan Beulich ,
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 Fabian Specht , Manuel Andreas 
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On 17/04/2025 10:05 am, Jan Beulich wrote:
> Like MOVS, INS, and OUTS, STOS also has a special purpose hook, where
> the hook function may legitimately have the same expectation as to the
> request not straddling address space start/end.
>
> Fixes: 5dfe4aa4eeb6 ("x86_emulate: Do not request emulation of REP instructions beyond the")
> Reported-by: Fabian Specht 
> Signed-off-by: Jan Beulich 

Acked-by: Andrew Cooper 


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Subject: Re: [PATCH v1 11/14] xen/riscv: add external interrupt handling for
 hypervisor mode
From: Oleksii Kurochko 
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Romain Caritey , xen-devel@lists.xenproject.org
References: 
 <1685488b8c1b48149e94bd3625c7b46b78c72e8e.1744126720.git.oleksii.kurochko@gmail.com>
 
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On 4/17/25 10:44 AM, Oleksii Kurochko wrote:
>>> +    action = desc->action;
>>> +
>>> +    spin_unlock_irq(&desc->lock);
>>> +
>>> +#ifndef CONFIG_IRQ_HAS_MULTIPLE_ACTION
>> Stolen from Arm? What's this about?
> Yes, it is stolen from Arm. I thought that it is a generic one, but the config is defined
> inside Arm's config.h.
> Then it could be dropped now as I don't know, at the moment, the cases when it is neeeded
> to exectute several handler for an irq for RISC-V.

Probably, IOMMU may setup multiple handler for the same interrupt. I'll double check that.

~ Oleksii

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On 4/17/25 10:44 AM, Oleksii Kurochko
      wrote:

    

    

      
      

        

          
+    action = desc->action;
+
+    spin_unlock_irq(&desc->lock);
+
+#ifndef CONFIG_IRQ_HAS_MULTIPLE_ACTION


        

        
Stolen from Arm? What's this about?

      

      
Yes, it is stolen from Arm. I thought that it is a generic one, but the config is defined
inside Arm's config.h.
Then it could be dropped now as I don't know, at the moment, the cases when it is neeeded
to exectute several handler for an irq for RISC-V.

    

    
Probably, IOMMU may setup multiple handler for the same interrupt. I'll double check that.

~ Oleksii

  


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Subject: Re: [PATCH] Arm: rename smp_clear_cpu_maps()
To: Nicola Vetrini 
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On 17.04.2025 10:48, Nicola Vetrini wrote:
> On 2025-04-17 10:36, Jan Beulich wrote:
>> The function has lost all clearing operations. Use the commonly
>> available name (declared in xen/smp.h), that x86 also uses.
>>
>> Signed-off-by: Jan Beulich 
>> ---
>> I would have expected this to also address a Misra violation
>> (declaration without definition), but I can't spot any rule (having
>> looked through 8.x in particular) to this effect.
> 
> The rule you are looking for is 8.6: " An identifier with external 
> linkage shall have exactly one external definition", which is explicitly 
> deviated in Xen to allow declarations that have no definition, 
> especially in the case where definitions may be optimized out by the 
> compiler or are simply compiled out. I don't recall the specific 
> discussion that led to this deviation, but I can dug it up, if needed.

The respective deviation is imo bogus. Iirc if anything this is about
DCE, which isn't "definition is compiled-out or optimized-out by the
compiler" but "invocation is compiled-out or optimized-out by the
compiler": If the definition was optimized out, there necessarily _is_
a definition in source.

Jan


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On 17.04.2025 10:53, Andrew Cooper wrote:
> This seems to have been quite an oversite in Xen's NUMA support, albeit it

Nit: oversight?

> probably because NUMA was arch-specific at first.
> 
> Take the opportunity to sort the includes.
> 
> Signed-off-by: Andrew Cooper 

Reviewed-by: Jan Beulich 

> For the !NUMA case, cpu_to_node() defaults to 0 rather than NUMA_NO_NODE,
> making memflags nonzero.  I'm not sure how wise this is, but ARM runs seem
> happy with it.

As to Arm: May be worth noting in the commit message that this is unlikely
to have any useful effect when SEPARATE_XENHEAP=y. I guess our only option
to address that (if any Arm32 NUMA systems exist) would be to use vmap().

Jan


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Subject: Re: [PATCH v3] xen/domain: unify domain ID allocation
To: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org,
 michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org,
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On 16.04.2025 08:15, dmkhn@proton.me wrote:
> From: Denis Mukhin 
> 
> Unify the logic of domain ID allocation, so that both the initial domain
> creation and the usage by domctl use the same helper function across
> architectures (Arm and x86).
> 
> Wrap the domain ID allocation as an arch-independent function domid_alloc() in
> common/domain.c.
> 
> Allocation algorithm:
> - If an explicit domain ID is provided, verify its availability and
>   use it if ID is unused;
> - Otherwise, perform an exhaustive search for the first available ID
>   within the [0..DOMID_FIRST_RESERVED) range, excluding hardware_domid.
> 
> Move the is_free_domid() helper closer to domid_alloc(). Simplify
> is_free_domid() by removing the domain ID range check, as the ID is now
> guaranteed to be within the valid range. Additionally, update the predicate to
> return a bool value instead of an int.
> 
> Signed-off-by: Denis Mukhin 

Please can you clarify whether this is intended to be no functional change
(as far as one would be able to observe from the outside)? (It isn't, and
when it isn't, the behavioral change needs justifying. Which I fear you
won't be able to, in which case it needs undoing. Not using the first
unused ID is a deliberate property of the present allocation scheme.)

> ---
>  xen/arch/arm/dom0less-build.c | 19 ++++++++-------
>  xen/arch/arm/domain_build.c   | 19 +++++++++++----
>  xen/arch/x86/setup.c          |  8 +++++--
>  xen/common/domain.c           | 45 +++++++++++++++++++++++++++++++++++
>  xen/common/domctl.c           | 45 ++++-------------------------------
>  xen/include/xen/domain.h      |  2 ++
>  6 files changed, 81 insertions(+), 57 deletions(-)

This suggests it's not clearly an improvement. And I'm heavily inclined
to ask (also considering the above) that this simply be dropped.

> --- a/xen/arch/arm/domain_build.c
> +++ b/xen/arch/arm/domain_build.c
> @@ -2370,6 +2370,7 @@ void __init create_dom0(void)
>          .grant_opts = XEN_DOMCTL_GRANT_version(opt_gnttab_max_version),
>      };
>      unsigned int flags = CDF_privileged;
> +    domid_t domid;
>      int rc;
>  
>      /* The vGIC for DOM0 is exactly emulating the hardware GIC */
> @@ -2394,19 +2395,27 @@ void __init create_dom0(void)
>      if ( !llc_coloring_enabled )
>          flags |= CDF_directmap;
>  
> -    dom0 = domain_create(0, &dom0_cfg, flags);
> +    rc = domid_alloc(get_initial_domain_id());
> +    if ( rc < 0 )
> +        panic("Error allocating domain ID %d (rc = %d)\n",
> +              get_initial_domain_id(), rc);
> +    domid = rc;
> +
> +    dom0 = domain_create(domid, &dom0_cfg, flags);
>      if ( IS_ERR(dom0) )
> -        panic("Error creating domain 0 (rc = %ld)\n", PTR_ERR(dom0));
> +        panic("Error creating domain %d (rc = %ld)\n", domid, PTR_ERR(dom0));

Up to here using domid is okay. However, ...

>      if ( llc_coloring_enabled && (rc = dom0_set_llc_colors(dom0)) )
> -        panic("Error initializing LLC coloring for domain 0 (rc = %d)\n", rc);
> +        panic("Error initializing LLC coloring for domain %d (rc = %d)\n",
> +              domid, rc);
>  
>      if ( alloc_dom0_vcpu0(dom0) == NULL )
> -        panic("Error creating domain 0 vcpu0\n");
> +        panic("Error creating domain %d vcpu0\n", domid);
>  
>      rc = construct_dom0(dom0);
>      if ( rc )
> -        panic("Could not set up DOM0 guest OS (rc = %d)\n", rc);
> +        panic("Could not set up guest OS for domain %d (rc = %d)\n",
> +              domid, rc);
>  }

... these all would better use %pd, when already being touched.

While touching all of these I think you also want to aim at making output
match that %pd or %pv would result in, if they were usable at those places.

> --- a/xen/arch/x86/setup.c
> +++ b/xen/arch/x86/setup.c
> @@ -1009,8 +1009,12 @@ static struct domain *__init create_dom0(struct boot_info *bi)
>      if ( iommu_enabled )
>          dom0_cfg.flags |= XEN_DOMCTL_CDF_iommu;
>  
> -    /* Create initial domain.  Not d0 for pvshim. */
> -    bd->domid = get_initial_domain_id();
> +    /* Allocate initial domain ID. Not d0 for pvshim. */
> +    bd->domid = domid_alloc(get_initial_domain_id());

You're clipping the int return value to domid_t here, and thus ...

> +    if ( bd->domid < 0 )

... this condition will be always false. I'm surprised the compiler didn't
flag this for you.

> --- a/xen/common/domain.c
> +++ b/xen/common/domain.c
> @@ -66,6 +66,51 @@ DEFINE_RCU_READ_LOCK(domlist_read_lock);
>  static struct domain *domain_hash[DOMAIN_HASH_SIZE];
>  struct domain *domain_list;
>  
> +static inline bool is_free_domid(domid_t dom)
> +{
> +    struct domain *d = rcu_lock_domain_by_id(dom);
> +
> +    if ( d )
> +        rcu_unlock_domain(d);
> +
> +    return !d;
> +}
> +
> +/*
> + * Allocate new domain ID based on the hint.
> + *
> + * If hint is outside of valid [0..DOMID_FIRST_RESERVED] range of IDs,

That's [0, DOMID_FIRST_RESERVED), to be unambiguous. In C array initializer
notation it would be [0 ... DOMID_FIRST_RESERVED - 1].

> + * perform an exhaustive search of the first free domain ID excluding
> + * hardware_domid.
> + */
> +int domid_alloc(int hint)

I would have thought that I did comment already on the parameter being plain
int.

> +{
> +    domid_t domid;
> +
> +    if ( hint >= 0 && hint < DOMID_FIRST_RESERVED )
> +    {
> +        if ( !is_free_domid(hint) )
> +            return -EEXIST;
> +
> +        domid = hint;
> +    }
> +    else
> +    {
> +        for ( domid = 0; domid < DOMID_FIRST_RESERVED; domid++ )
> +        {
> +            if ( domid == hardware_domid )
> +                continue;
> +            if ( is_free_domid(domid) )
> +                break;
> +        }
> +
> +        if ( domid == DOMID_FIRST_RESERVED )
> +            return -ENOMEM;

There's no memory allocation here, so why ENOMEM? ENOSPC may already be slightly
better.

Jan


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Subject: Re: [PATCH] xen-netfront: handle NULL returned by
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To: Juergen Gross , Jakub Kicinski 
Cc: Stefano Stabellini ,
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 "David S. Miller" , Eric Dumazet ,
 Paolo Abeni , Alexei Starovoitov ,
 Daniel Borkmann ,
 Jesper Dangaard Brouer ,
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On 17.04.2025 11:51, Juergen Gross wrote:
> On 17.04.25 10:45, Alexey wrote:
>>
>> On 17.04.2025 10:12, Jürgen Groß wrote:
>>> On 17.04.25 09:00, Alexey wrote:
>>>>
>>>> On 17.04.2025 03:58, Jakub Kicinski wrote:
>>>>> On Mon, 14 Apr 2025 18:34:01 +0000 Alexey Nepomnyashih wrote:
>>>>>>           get_page(pdata);
>>>>> Please notice this get_page() here.
>>>>>
>>>>>>           xdpf = xdp_convert_buff_to_frame(xdp);
>>>>>> +        if (unlikely(!xdpf)) {
>>>>>> + trace_xdp_exception(queue->info->netdev, prog, act);
>>>>>> +            break;
>>>>>> +        }
>>>> Do you mean that it would be better to move the get_page(pdata) 
>>>> call lower,
>>>> after checking for NULL in xdpf, so that the reference count is 
>>>> only increased
>>>> after a successful conversion?
>>>
>>> I think the error handling here is generally broken (or at least very
>>> questionable).
>>>
>>> I suspect that in case of at least some errors the get_page() is 
>>> leaking
>>> even without this new patch.
>>>
>>> In case I'm wrong a comment reasoning why there is no leak should be
>>> added.
>>>
>>>
>>> Juergen
>>
>> I think pdata is freed in xdp_return_frame_rx_napi() -> __xdp_return()
>
> Agreed. But what if xennet_xdp_xmit() returns an error < 0?
>
> In this case xdp_return_frame_rx_napi() won't be called.
>
>
> Juergen

Agreed. There is no explicit freed pdata in the calling function
xennet_get_responses(). Without this, the page referenced by pdata
could be leaked.

I suggest:

case XDP_TX: -get_page(pdata); xdpf = xdp_convert_buff_to_frame(xdp); 
+if (unlikely(!xdpf)) { +trace_xdp_exception(queue->info->netdev, prog, 
act); +break; +} +get_page(pdata); err = 
xennet_xdp_xmit(queue->info->netdev, 1, &xdpf, 0); if (unlikely(!err)) 
xdp_return_frame_rx_napi(xdpf); -else if (unlikely(err < 0)) +else if 
(unlikely(err < 0)) { trace_xdp_exception(queue->info->netdev, prog, 
act); +xdp_return_frame_rx_napi(xdpf); +} break; case XDP_REDIRECT: 
get_page(pdata); err = xdp_do_redirect(queue->info->netdev, xdp, prog); 
*need_xdp_flush = true; -if (unlikely(err)) +if (unlikely(err)) { 
trace_xdp_exception(queue->info->netdev, prog, act); 
+__xdp_return(page_address(pdata), &xdp->mem, true, xdp); +} break;

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On 17.04.2025 11:51, Juergen Gross
      wrote:

    

    
On
      17.04.25 10:45, Alexey wrote:
      

      

        

        On 17.04.2025 10:12, Jürgen Groß wrote:
        

        
On 17.04.25 09:00, Alexey wrote:
          

          

            

            On 17.04.2025 03:58, Jakub Kicinski wrote:
            

            
On Mon, 14 Apr 2025 18:34:01 +0000
              Alexey Nepomnyashih wrote:
              

              
          get_page(pdata);
                

              

              Please notice this get_page() here.
              

              

              
          xdpf =
                xdp_convert_buff_to_frame(xdp);
                

                +        if (unlikely(!xdpf)) {
                

                +           
                trace_xdp_exception(queue->info->netdev, prog,
                act);
                

                +            break;
                

                +        }
                

              

            

            Do you mean that it would be better to move the
            get_page(pdata) call lower,
            

            after checking for NULL in xdpf, so that the reference count
            is only increased
            

            after a successful conversion?
            

          

          

          I think the error handling here is generally broken (or at
          least very
          

          questionable).
          

          

          I suspect that in case of at least some errors the get_page()
          is leaking
          

          even without this new patch.
          

          

          In case I'm wrong a comment reasoning why there is no leak
          should be
          

          added.
          

          

          

          Juergen
          

        

        

        I think pdata is freed in xdp_return_frame_rx_napi() ->
        __xdp_return()
        

      

      

      Agreed. But what if xennet_xdp_xmit() returns an error < 0?
      

      

      In this case xdp_return_frame_rx_napi() won't be called.
      

      

      

      Juergen
      

    

    
Agreed. There is no explicit freed pdata in the calling function

      xennet_get_responses(). Without this, the page referenced by pdata

      could be leaked.

    
I suggest:

    
 	case XDP_TX:
-		get_page(pdata);
 		xdpf = xdp_convert_buff_to_frame(xdp);
+		if (unlikely(!xdpf)) {
+			trace_xdp_exception(queue->info->netdev, prog, act);
+			break;
+		}
+		get_page(pdata);
 		err = xennet_xdp_xmit(queue->info->netdev, 1, &xdpf, 0);
 		if (unlikely(!err))
 			xdp_return_frame_rx_napi(xdpf);
-		else if (unlikely(err < 0))
+		else if (unlikely(err < 0)) {
 			trace_xdp_exception(queue->info->netdev, prog, act);
+			xdp_return_frame_rx_napi(xdpf);
+		}
 		break;
 	case XDP_REDIRECT:
 		get_page(pdata);
 		err = xdp_do_redirect(queue->info->netdev, xdp, prog);
 		*need_xdp_flush = true;
-		if (unlikely(err))
+		if (unlikely(err)) {
 			trace_xdp_exception(queue->info->netdev, prog, act);
+			__xdp_return(page_address(pdata), &xdp->mem, true, xdp);
+		}
 		break;

  


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Date: Thu, 17 Apr 2025 12:10:29 +0200
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Subject: Re: [PATCH v1 12/14] xen/riscv: implement setup_irq()
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Romain Caritey , xen-devel@lists.xenproject.org
References: 
 <2bc37c3996978129a5b2c888917307ea32448651.1744126720.git.oleksii.kurochko@gmail.com>
 <47492663-5832-49e7-af4d-ee536206e641@suse.com>
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On 4/15/25 5:55 PM, Jan Beulich wrote
>> +#ifdef CONFIG_IRQ_HAS_MULTIPLE_ACTION
>> +    new->next = desc->action;
>> +    smp_mb();
>> +#endif
>> +
>> +    desc->action = new;
>> +    smp_mb();
> Aren't smp_wmb() sufficient on both places? If not, I think comments
> want adding.

smp_wmb() will be sufficient but I think the barrier could be dropped at all
as __setup_irq() is called only in setup_irq() and __setup_irq() call is wrapped
by spinlock_{un}lock_irqsave() where spinlock_unlock_*() will put barrier.

>
>> +    return 0;
>> +}
>> +
>> +void irq_set_affinity(struct irq_desc *desc, const cpumask_t *cpu_mask)
>> +{
>> +    if ( desc != NULL )
> Can desc really be NULL here?

It can't as irq_desc[] isn't dynamically allocated.

>   Isn't desc->lock required to be held?

It is and it is called in setup_irq() which calls spin_lock_irqsave().
Anyway, I think it could be dropped at all and use 'desc->handler->set_affinity(desc, cpu_mask);'
explicitly in setup_irq().

>> +    spin_lock_irqsave(&desc->lock, flags);
>> +
>> +    disabled = (desc->action == NULL);
>> +
>> +    if ( test_bit(_IRQ_GUEST, &desc->status) )
>> +    {
>> +        spin_unlock_irqrestore(&desc->lock, flags);
>> +        /*
>> +         * TODO: would be nice to have functionality to print which domain owns
>> +         *       an IRQ.
>> +         */
>> +        printk(XENLOG_ERR "ERROR: IRQ %u is already in use by a domain\n", irq);
>> +        return -EBUSY;
>> +    }
>> +
>> +    rc = __setup_irq(desc, irqflags, new);
>> +    if ( rc )
>> +        goto err;
>> +
>> +    /* First time the IRQ is setup */
>> +    if ( disabled )
>> +    {
>> +        /* disable irq by default */
>> +        set_bit(_IRQ_DISABLED, &desc->status);
> Shouldn't this be set when we make it here?

It should be. I'll drop the setting of _IRQ_DISABLED.

>
>> +        /* route interrupt to xen */
>> +        intc_route_irq_to_xen(desc, IRQ_NO_PRIORITY);
>> +
>> +        /*
>> +         * we don't care for now which CPU will receive the
>> +         * interrupt
>> +         *
>> +         * TODO: Handle case where IRQ is setup on different CPU than
>> +         * the targeted CPU and the priority.
>> +         */
>> +        irq_set_affinity(desc, cpumask_of(smp_processor_id()));
>> +        desc->handler->startup(desc);
>> +        /* enable irq */
>> +        clear_bit(_IRQ_DISABLED, &desc->status);
> Now it turns out this is really done twice: Once in aplic_irq_enable(),
> and once here.

Agree, this is a job of *_startup()->*_aplic_irq_enable(). I'll drop that too.

~ Oleksii


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On 4/15/25 5:55 PM, Jan Beulich wrote

    

      

        
+#ifdef CONFIG_IRQ_HAS_MULTIPLE_ACTION
+    new->next = desc->action;
+    smp_mb();
+#endif
+
+    desc->action = new;
+    smp_mb();


      

      
Aren't smp_wmb() sufficient on both places? If not, I think comments
want adding.

    

    
smp_wmb() will be sufficient but I think the barrier could be dropped at all
as __setup_irq() is called only in setup_irq() and __setup_irq() call is wrapped
by spinlock_{un}lock_irqsave() where spinlock_unlock_*() will put barrier.



    

      



      

        
+    return 0;
+}
+
+void irq_set_affinity(struct irq_desc *desc, const cpumask_t *cpu_mask)
+{
+    if ( desc != NULL )


      

      
Can desc really be NULL here?

    

    
It can't as irq_desc[] isn't dynamically allocated.



    

      
 Isn't desc->lock required to be held?

    

    
It is and it is called in setup_irq() which calls spin_lock_irqsave().
Anyway, I think it could be dropped at all and use 'desc->handler->set_affinity(desc, cpu_mask);'
explicitly in setup_irq().


    

      

        
+    spin_lock_irqsave(&desc->lock, flags);
+
+    disabled = (desc->action == NULL);
+
+    if ( test_bit(_IRQ_GUEST, &desc->status) )
+    {
+        spin_unlock_irqrestore(&desc->lock, flags);
+        /*
+         * TODO: would be nice to have functionality to print which domain owns
+         *       an IRQ.
+         */
+        printk(XENLOG_ERR "ERROR: IRQ %u is already in use by a domain\n", irq);
+        return -EBUSY;
+    }
+
+    rc = __setup_irq(desc, irqflags, new);
+    if ( rc )
+        goto err;
+
+    /* First time the IRQ is setup */
+    if ( disabled )
+    {
+        /* disable irq by default */
+        set_bit(_IRQ_DISABLED, &desc->status);


      

      
Shouldn't this be set when we make it here?

    

    
It should be. I'll drop the setting of _IRQ_DISABLED.

    

      



      

        
+        /* route interrupt to xen */
+        intc_route_irq_to_xen(desc, IRQ_NO_PRIORITY);
+
+        /*
+         * we don't care for now which CPU will receive the
+         * interrupt
+         *
+         * TODO: Handle case where IRQ is setup on different CPU than
+         * the targeted CPU and the priority.
+         */
+        irq_set_affinity(desc, cpumask_of(smp_processor_id()));
+        desc->handler->startup(desc);
+        /* enable irq */
+        clear_bit(_IRQ_DISABLED, &desc->status);


      

      
Now it turns out this is really done twice: Once in aplic_irq_enable(),
and once here.

    

    
Agree, this is a job of *_startup()->*_aplic_irq_enable(). I'll drop that too.

~ Oleksii


    


    

  


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Date: Thu, 17 Apr 2025 12:11:59 +0200
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Subject: Re: [PATCH v1 13/14] xen/riscv: initialize interrupt controller
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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References: 
 
 
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From: Oleksii Kurochko 
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On 4/15/25 5:59 PM, Jan Beulich wrote:
> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>> Call intc_init() to do basic initialization steps for APLIC and IMISC.
>>
>> Signed-off-by: Oleksii Kurochko
> Acked-by: Jan Beulich
> yet ...
>
>> --- a/xen/arch/riscv/setup.c
>> +++ b/xen/arch/riscv/setup.c
>> @@ -136,6 +136,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id,
>>   
>>       intc_preinit();
>>   
>> +    intc_init();
>> +
>>       printk("All set up\n");
>>   
>>       machine_halt();
> ... this being everything here I wonder if this can't be folded with the
> patch where the function is introduced.

Sure, it can be folded. I will do that to reduce patch series.

~ Oleksii

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On 4/15/25 5:59 PM, Jan Beulich wrote:

    

    

      
On 08.04.2025 17:57, Oleksii Kurochko wrote:


      

        
Call intc_init() to do basic initialization steps for APLIC and IMISC.

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>


      

      
Acked-by: Jan Beulich <jbeulich@suse.com>
yet ...



      

        
--- a/xen/arch/riscv/setup.c
+++ b/xen/arch/riscv/setup.c
@@ -136,6 +136,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id,
 
     intc_preinit();
 
+    intc_init();
+
     printk("All set up\n");
 
     machine_halt();


      

      
... this being everything here I wonder if this can't be folded with the
patch where the function is introduced.

    

    
Sure, it can be folded. I will do that to reduce patch series.

~ Oleksii


  


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From: Ross Lagerwall 
To: xen-devel@lists.xenproject.org
Cc: Jan Beulich ,
	Ross Lagerwall 
Subject: [PATCH] x86/pmstat: Check size of PMSTAT_get_pxstat buffers
Date: Thu, 17 Apr 2025 11:30:00 +0100
Message-ID: <20250417103000.827661-1-ross.lagerwall@citrix.com>
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Check that the total number of states passed in and hence the size of
buffers is sufficient to avoid writing more than the caller has
allocated.

The interface is not explicit about whether getpx.total is expected to
be set by the caller in this case but since it is always set in
libxenctrl it seems reasonable to check it.

Signed-off-by: Ross Lagerwall 
Fixes: c06a7db0c547 ("X86 and IA64: Update cpufreq statistic logic for supporting both x86 and ia64")
---
 xen/drivers/acpi/pmstat.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/xen/drivers/acpi/pmstat.c b/xen/drivers/acpi/pmstat.c
index c51b9ca358c2..c388b1e9a17a 100644
--- a/xen/drivers/acpi/pmstat.c
+++ b/xen/drivers/acpi/pmstat.c
@@ -104,6 +104,14 @@ int do_get_pm_info(struct xen_sysctl_get_pmstat *op)
         cpufreq_residency_update(op->cpuid, pxpt->u.cur);
 
         ct = pmpt->perf.state_count;
+
+        if ( op->u.getpx.total < ct )
+        {
+            spin_unlock(cpufreq_statistic_lock);
+            ret = -ENOSPC;
+            break;
+        }
+
         if ( copy_to_guest(op->u.getpx.trans_pt, pxpt->u.trans_pt, ct*ct) )
         {
             spin_unlock(cpufreq_statistic_lock);
-- 
2.49.0



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Subject: Re: [PATCH v1 14/14] xen/riscv: add basic UART support
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: 
 <3e96851da8751ac17cbf0cb5a649c0d86259460a.1744126720.git.oleksii.kurochko@gmail.com>
 <49889d22-55b6-4dd4-b497-13b50d19d607@suse.com>
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On 4/15/25 6:03 PM, Jan Beulich wrote:
> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>> --- a/xen/arch/riscv/setup.c
>> +++ b/xen/arch/riscv/setup.c
>> @@ -4,11 +4,16 @@
>>   #include 
>>   #include 
>>   #include 
>> +#include 
>>   #include 
>>   #include 
>>   #include 
>> +#include 
> Why's this one needed?

It isn't needed anymore, just missed to drop.
I thought that it would be needed to test UART working fine by checking if Ctrl+AAA is working.

>
>>   #include 
>> +#include 
>> +#include 
>>   #include 
>> +#include 
>>   #include 
>>   #include 
>>   
>> @@ -73,6 +78,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id,
>>   
>>       remove_identity_mapping();
>>   
>> +    percpu_init_areas();
> I'll trust you that it's needed now, but the addition looks unrelated here,
> and also isn't mentioned as intentional in the description.

I had  this patch when I used polling mode for UART, for this case percpu is used to receive
serial port info:
   struct serial_port *port = this_cpu(poll_port);

So percpu isn't really needed at the current development state. I'll drop this change or as an option
move to separate patch.

>> --- a/xen/drivers/char/Kconfig
>> +++ b/xen/drivers/char/Kconfig
>> @@ -3,7 +3,6 @@ config GENERIC_UART_INIT
>>   
>>   config HAS_NS16550
>>   	bool "NS16550 UART driver" if ARM
>> -	default n if RISCV
>>   	default y
> Just to double-check: Unlike Arm you don't want this to be user-(un)selectable
> on RISC-V?

Thanks for noticing that. I want to have this selectable by user. I will add RISC-V here.

~ Oleksii

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On 4/15/25 6:03 PM, Jan Beulich wrote:

    

    

      
On 08.04.2025 17:57, Oleksii Kurochko wrote:


      

        
--- a/xen/arch/riscv/setup.c
+++ b/xen/arch/riscv/setup.c
@@ -4,11 +4,16 @@
 #include <xen/bug.h>
 #include <xen/bootfdt.h>
 #include <xen/compile.h>
+#include <xen/console.h>
 #include <xen/device_tree.h>
 #include <xen/init.h>
 #include <xen/irq.h>
+#include <xen/keyhandler.h>


      

      
Why's this one needed?

    

    
It isn't needed anymore, just missed to drop.
I thought that it would be needed to test UART working fine by checking if Ctrl+AAA is working.



    

      



      

        
 #include <xen/mm.h>
+#include <xen/percpu.h>
+#include <xen/serial.h>
 #include <xen/shutdown.h>
+#include <xen/timer.h>
 #include <xen/vmap.h>
 #include <xen/xvmalloc.h>
 
@@ -73,6 +78,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id,
 
     remove_identity_mapping();
 
+    percpu_init_areas();


      

      
I'll trust you that it's needed now, but the addition looks unrelated here,
and also isn't mentioned as intentional in the description.

    

    
I had  this patch when I used polling mode for UART, for this case percpu is used to receive
serial port info:
  struct serial_port *port = this_cpu(poll_port);

So percpu isn't really needed at the current development state. I'll drop this change or as an option
move to separate patch.



    

      

      

        
--- a/xen/drivers/char/Kconfig
+++ b/xen/drivers/char/Kconfig
@@ -3,7 +3,6 @@ config GENERIC_UART_INIT
 
 config HAS_NS16550
 	bool "NS16550 UART driver" if ARM
-	default n if RISCV
 	default y


      

      
Just to double-check: Unlike Arm you don't want this to be user-(un)selectable
on RISC-V?

    

    
Thanks for noticing that. I want to have this selectable by user. I will add RISC-V here.

~ Oleksii


  


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Subject: Re: [RFC PATCH v1 13/15] x86/msr: Use the alternatives mechanism to
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To: Francesco Lavra 
Cc: acme@kernel.org, adrian.hunter@intel.com, ajay.kaher@broadcom.com,
        alexander.shishkin@linux.intel.com, andrew.cooper3@citrix.com,
        bcm-kernel-feedback-list@broadcom.com, boris.ostrovsky@oracle.com,
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On 4/14/2025 10:13 AM, Francesco Lavra wrote:
> This works only if this function has been called directly (e.g. via
> `call asm_xen_write_msr`), but doesn't work with alternative call types
> (like indirect calls). Not sure why one might want to use an indirect
> call to invoke asm_xen_write_msr, but this creates a hidden coupling
> between caller and callee.
> I don't have a suggestion on how to get rid of this coupling, other
> than setting ipdelta in _ASM_EXTABLE_FUNC_REWIND() to 0 and adjusting
> the _ASM_EXTABLE_TYPE entries at the call sites to consider the
> instruction that follows the function call (instead of the call
> instruction) as the faulting instruction (which seems pretty ugly, at
> least because what follows the function call could be an instruction
> that might itself fault). But you may want to make this caveat explicit
> in the comment.

Good idea, will state that in the comment.


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Date: Thu, 17 Apr 2025 14:19:36 +0300
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Subject: Re: [PATCH] xen-netfront: handle NULL returned by
 xdp_convert_buff_to_frame()
To: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= ,
 Jakub Kicinski 
Cc: Stefano Stabellini ,
 Oleksandr Tyshchenko ,
 "David S. Miller" , Eric Dumazet ,
 Paolo Abeni , Alexei Starovoitov ,
 Daniel Borkmann ,
 Jesper Dangaard Brouer ,
 John Fastabend , xen-devel@lists.xenproject.org,
 netdev@vger.kernel.org, linux-kernel@vger.kernel.org, bpf@vger.kernel.org,
 lvc-project@linuxtesting.org, stable@vger.kernel.org
References: <20250414183403.265943-1-sdl@nppct.ru>
 <20250416175835.687a5872@kernel.org>
 
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From: Alexey 
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On 17.04.2025 13:23, Jürgen Groß wrote:
> On 17.04.25 12:06, Alexey wrote:
>>
>> On 17.04.2025 11:51, Juergen Gross wrote:
>>> On 17.04.25 10:45, Alexey wrote:
>>>>
>>>> On 17.04.2025 10:12, Jürgen Groß wrote:
>>>>> On 17.04.25 09:00, Alexey wrote:
>>>>>>
>>>>>> On 17.04.2025 03:58, Jakub Kicinski wrote:
>>>>>>> On Mon, 14 Apr 2025 18:34:01 +0000 Alexey Nepomnyashih wrote:
>>>>>>>>           get_page(pdata);
>>>>>>> Please notice this get_page() here.
>>>>>>>
>>>>>>>>           xdpf = xdp_convert_buff_to_frame(xdp);
>>>>>>>> +        if (unlikely(!xdpf)) {
>>>>>>>> + trace_xdp_exception(queue->info->netdev, prog, act);
>>>>>>>> +            break;
>>>>>>>> +        }
>>>>>> Do you mean that it would be better to move the get_page(pdata) 
>>>>>> call lower,
>>>>>> after checking for NULL in xdpf, so that the reference count is 
>>>>>> only increased
>>>>>> after a successful conversion?
>>>>>
>>>>> I think the error handling here is generally broken (or at least very
>>>>> questionable).
>>>>>
>>>>> I suspect that in case of at least some errors the get_page() is 
>>>>> leaking
>>>>> even without this new patch.
>>>>>
>>>>> In case I'm wrong a comment reasoning why there is no leak should be
>>>>> added.
>>>>>
>>>>>
>>>>> Juergen
>>>>
>>>> I think pdata is freed in xdp_return_frame_rx_napi() -> __xdp_return()
>>>
>>> Agreed. But what if xennet_xdp_xmit() returns an error < 0?
>>>
>>> In this case xdp_return_frame_rx_napi() won't be called.
>>>
>>>
>>> Juergen
>>
>> Agreed. There is no explicit freed pdata in the calling function
>> xennet_get_responses(). Without this, the page referenced by pdata
>> could be leaked.
>>
>> I suggest:
>
> Could you please merge the two if () blocks, as they share the
> call of xdp_return_frame_rx_napi() now? Something like:
>
> if (unlikely(err <= 0)) {
>     if (err < 0)
>         trace_xdp_exception(queue->info->netdev, prog, act);
>     xdp_return_frame_rx_napi(xdpf);
> }
>
> Juergen
>
> P.S.: please don't use HTML in emails

I can't do this because xennet_xdp_xmit() can return a value > 0




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Subject: Re: [PATCH v3 08/16] x86/hyperlaunch: Add helpers to locate
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On Wed Apr 16, 2025 at 5:55 PM BST, Nicola Vetrini wrote:
> On 2025-04-15 08:05, Jan Beulich wrote:
>> On 14.04.2025 20:01, Alejandro Vallejo wrote:
>>> On Mon Apr 14, 2025 at 4:05 PM BST, Jan Beulich wrote:
>>>> On 14.04.2025 15:37, Alejandro Vallejo wrote:
>>>>> On Thu Apr 10, 2025 at 11:42 AM BST, Jan Beulich wrote:
>>>>>> Functions without callers and non-static ones without declarations=
=20
>>>>>> are
>>>>>> disliked by Misra.
>>>>>=20
>>>>> Can't do much about it if I want them to stand alone in a single=20
>>>>> patch.
>>>>> Otherwise the following ones become quite unwieldy to look at. All I=
=20
>>>>> can
>>>>> say is that this function becomes static and with a caller on the=20
>>>>> next
>>>>> patch.
>>>>=20
>>>> Which means you need to touch this again anyway. Perhaps we need a=20
>>>> Misra
>>>> deviation for __maybe_unused functions / data, in which case you=20
>>>> could
>>>> use that here and strip it along with making the function static.=20
>>>> Cc-ing
>>>> Bugseng folks.
>>>=20
>>> It's a transient violation, sure. Do we care about transient MISRA
>>> violations though? I understand the importance of bisectability, but
>>> AUIU MISRA compliance matters to the extent that that the tip is
>>> compliant rather than the intermediate steps?
>>=20
>> Thing is that quite a few rules are blocking now. I haven't checked=20
>> whether
>> the one here (already) is; if it isn't, we can't exclude it will be by=
=20
>> the
>> time this patch is committed. If then the next patch isn't committed
>> together with it, we'd face a CI failure.
>>=20
>
> It's Rule 8.4, and it is indeed blocking. To double check, a scan on a=20
> push containing this patch should trigger the failure.
> You may transitively add an inline deviation comment or just a deviation=
=20
> with a configuration (I can help if needed), justified by the subsequent=
=20
> addition of static.

Thanks for the context!

If I'm going to add something and remove it later might as well add the
missing declaration and remove it when static-ifying the function.
Particularly because I don't see a suitable x in SAFE-x-safe to use. (1
or 13 may work, but they hardly reflect what's being done.)

My bad for (mis)assuming transient states merely required bisectability
rather than full MISRA compliance.=20

Cheers,
Alejandro


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Subject: Re: [PATCH v1 12/14] xen/riscv: implement setup_irq()
To: Oleksii Kurochko 
Cc: Alistair Francis ,
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On 17.04.2025 12:10, Oleksii Kurochko wrote:
> On 4/15/25 5:55 PM, Jan Beulich wrote
>>> +        /*
>>> +         * we don't care for now which CPU will receive the
>>> +         * interrupt
>>> +         *
>>> +         * TODO: Handle case where IRQ is setup on different CPU than
>>> +         * the targeted CPU and the priority.
>>> +         */
>>> +        irq_set_affinity(desc, cpumask_of(smp_processor_id()));
>>> +        desc->handler->startup(desc);
>>> +        /* enable irq */
>>> +        clear_bit(_IRQ_DISABLED, &desc->status);
>> Now it turns out this is really done twice: Once in aplic_irq_enable(),
>> and once here.
> 
> Agree, this is a job of *_startup()->*_aplic_irq_enable(). I'll drop that too.

Wait - see my comment there. I think it belongs here, not there.

Jan


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On Tue Apr 15, 2025 at 8:01 AM BST, Grygorii Strashko wrote:
> From: Grygorii Strashko 
>
> This patch adds Xen XSM policy loading support.
>
> The configuration file XEN_POLICY specifies Xen hypervisor
> XSM policy binary to load.
>
> Signed-off-by: Grygorii Strashko 

Reviewed-by: Alejandro Vallejo 

Cheers,
Alejandro


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Subject: Re: [PATCH v1 14/14] xen/riscv: add basic UART support
To: Oleksii Kurochko 
Cc: Alistair Francis ,
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 , Andrew Cooper ,
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On 17.04.2025 12:31, Oleksii Kurochko wrote:
> On 4/15/25 6:03 PM, Jan Beulich wrote:
>> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>>> --- a/xen/drivers/char/Kconfig
>>> +++ b/xen/drivers/char/Kconfig
>>> @@ -3,7 +3,6 @@ config GENERIC_UART_INIT
>>>   
>>>   config HAS_NS16550
>>>   	bool "NS16550 UART driver" if ARM
>>> -	default n if RISCV
>>>   	default y
>> Just to double-check: Unlike Arm you don't want this to be user-(un)selectable
>> on RISC-V?
> 
> Thanks for noticing that. I want to have this selectable by user. I will add RISC-V here.

At which point we may want to consider whether the condition on the prompt
wouldn't better become "!X86".

Jan


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Feedback-ID: i1568416f:Fastmail
Date: Thu, 17 Apr 2025 14:19:49 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Jan Beulich 
Cc: Roger Pau Monne ,
	Andrew Cooper ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH v2 2/4] x86/hvm: fix handling of accesses to partial r/o
 MMIO pages
Message-ID: 
References: <20250415153246.81688-1-roger.pau@citrix.com>
 <20250415153246.81688-3-roger.pau@citrix.com>
 
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Date: Thu, 17 Apr 2025 14:19:49 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Jan Beulich 
Cc: Roger Pau Monne ,
	Andrew Cooper ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH v2 2/4] x86/hvm: fix handling of accesses to partial r/o
 MMIO pages

On Thu, Apr 17, 2025 at 09:57:29AM +0200, Jan Beulich wrote:
> On 15.04.2025 17:32, Roger Pau Monne wrote:
> > +void register_subpage_ro_handler(struct domain *d)
> > +{
> > +    static const struct hvm_mmio_ops subpage_mmio_ops =3D {
> > +        .check =3D subpage_mmio_accept,
> > +        .read =3D subpage_mmio_read,
> > +        .write =3D subpage_mmio_write,
> > +    };
> > +
> > +    register_mmio_handler(d, &subpage_mmio_ops);
>=20
> Are there any criteria by which we could limit the registration of this
> handler?

Yes, see patch 3.

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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From xen-devel-bounces@lists.xenproject.org Thu Apr 17 12:21:51 2025
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From: Alexey Nepomnyashih 
To: Juergen Gross 
Cc: Alexey Nepomnyashih ,
	Stefano Stabellini ,
	Oleksandr Tyshchenko ,
	"David S. Miller" ,
	Eric Dumazet ,
	Jakub Kicinski ,
	Paolo Abeni ,
	Alexei Starovoitov ,
	Daniel Borkmann ,
	Jesper Dangaard Brouer ,
	John Fastabend ,
	xen-devel@lists.xenproject.org,
	netdev@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	bpf@vger.kernel.org,
	lvc-project@linuxtesting.org,
	stable@vger.kernel.org
Subject: [PATCH v2] xen-netfront: handle NULL returned by xdp_convert_buff_to_frame()
Date: Thu, 17 Apr 2025 12:21:17 +0000
Message-ID: <20250417122118.1009824-1-sdl@nppct.ru>
X-Mailer: git-send-email 2.43.0
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The function xdp_convert_buff_to_frame() may return NULL if it fails
to correctly convert the XDP buffer into an XDP frame due to memory
constraints, internal errors, or invalid data. Failing to check for NULL
may lead to a NULL pointer dereference if the result is used later in
processing, potentially causing crashes, data corruption, or undefined
behavior.

On XDP redirect failure, the associated page must be released explicitly
if it was previously retained via get_page(). Failing to do so may result
in a memory leak, as the pages reference count is not decremented.

Found by Linux Verification Center (linuxtesting.org) with SVACE.

Cc: stable@vger.kernel.org # v5.9+
Fixes: 6c5aa6fc4def ("xen networking: add basic XDP support for xen-netfront")
Signed-off-by: Alexey Nepomnyashih 
---
 drivers/net/xen-netfront.c | 19 +++++++++++++------
 1 file changed, 13 insertions(+), 6 deletions(-)

diff --git a/drivers/net/xen-netfront.c b/drivers/net/xen-netfront.c
index 63fe51d0e64d..1d3ff57a6125 100644
--- a/drivers/net/xen-netfront.c
+++ b/drivers/net/xen-netfront.c
@@ -985,20 +985,27 @@ static u32 xennet_run_xdp(struct netfront_queue *queue, struct page *pdata,
 	act = bpf_prog_run_xdp(prog, xdp);
 	switch (act) {
 	case XDP_TX:
-		get_page(pdata);
 		xdpf = xdp_convert_buff_to_frame(xdp);
-		err = xennet_xdp_xmit(queue->info->netdev, 1, &xdpf, 0);
-		if (unlikely(!err))
-			xdp_return_frame_rx_napi(xdpf);
-		else if (unlikely(err < 0))
+		if (unlikely(!xdpf)) {
 			trace_xdp_exception(queue->info->netdev, prog, act);
+			break;
+		}
+		get_page(pdata);
+		err = xennet_xdp_xmit(queue->info->netdev, 1, &xdpf, 0);
+		if (unlikely(err <= 0)) {
+			if (err < 0)
+				trace_xdp_exception(queue->info->netdev, prog, act);
+			xdp_return_frame_rx_napi(xdpf);
+		}
 		break;
 	case XDP_REDIRECT:
 		get_page(pdata);
 		err = xdp_do_redirect(queue->info->netdev, xdp, prog);
 		*need_xdp_flush = true;
-		if (unlikely(err))
+		if (unlikely(err)) {
 			trace_xdp_exception(queue->info->netdev, prog, act);
+			xdp_return_buff(xdp);
+		}
 		break;
 	case XDP_PASS:
 	case XDP_DROP:
-- 
2.43.0



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Date: Thu, 17 Apr 2025 13:29:15 +0100
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CC: "xen-devel@lists.xenproject.org" ,
	Xen-devel 
Subject: Re: [ImageBuilder] uboot-script-gen: fix arm64 xen u-boot image
 generation
From: Alejandro Vallejo 
To: Grygorii Strashko , Stefano Stabellini
	
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On Wed Apr 16, 2025 at 5:10 PM BST, Grygorii Strashko wrote:
>
>
> On 16.04.25 17:26, Alejandro Vallejo wrote:
>> On Wed Apr 16, 2025 at 11:44 AM BST, Grygorii Strashko wrote:
>>>
>>>
>>> On 16.04.25 04:03, Stefano Stabellini wrote:
>>>> On Mon, 14 Apr 2025, Grygorii Strashko wrote:
>>>>> From: Grygorii Strashko 
>>>>>
>>>>> The current code in generate_uboot_images() does not detect arm64 pro=
perly
>>>>> and always generates ARM u-boot image. This causes Xen boot issues.
>>>>>
>>>>> Fix it by searching for "ARM64" for AArch64 binary detection.
>>>>>
>>>>> - mkimage -l xen.ub
>>>>> Before:
>>>>> Image Type:   ARM Linux Kernel Image (uncompressed)
>>>>>
>>>>> After:
>>>>> Image Type:   AArch64 Linux Kernel Image (uncompressed)
>>>>>
>>>>> Signed-off-by: Grygorii Strashko 
>>>>> ---
>>>>>    scripts/uboot-script-gen | 6 +++---
>>>>>    1 file changed, 3 insertions(+), 3 deletions(-)
>>>>>
>>>>> diff --git a/scripts/uboot-script-gen b/scripts/uboot-script-gen
>>>>> index a9f698f00fd1..c4d26caf5e0e 100755
>>>>> --- a/scripts/uboot-script-gen
>>>>> +++ b/scripts/uboot-script-gen
>>>>> @@ -815,13 +815,13 @@ function linux_config()
>>>>>   =20
>>>>>    generate_uboot_images()
>>>>>    {
>>>>> -    local arch=3D$(file -L $XEN | grep "ARM")
>>>>> +    local arch=3D$(file -L $XEN | grep -o "ARM64")
>>>>
>>>> My file -L gives:
>>>>
>>>> for arm32: ARM OpenFirmware [...]
>>>> for arm64: Aarch64
>>>>
>>>> So the ARM64 grep wouldn't work as intended. Is the version of `file'
>>>> that you are using really printing ARM64?
>>>
>>> Hm, yes.
>>>
>>> 	file -L xen
>>> 	xen: Linux kernel ARM64 boot executable Image, little-endian, 4K pages
>>>
>>> 	file -v
>>> 	file-5.41
>>>
>>> u-boot boot command:
>>> 	 bootm 0x4EA00000 - 0x4EE00000
>>>
>>>
>>>    If so, we can do:
>>>>
>>>>     file -L $XEN | grep -E 'ARM64|Aarch64'
>>>
>>> sure. I'll update.
>>=20
>> Missing escape? I think it's needed even with single quotes.
>>=20
>>    file -L $XEN | grep -E 'ARM64\|Aarch64'
>
> No. It's extended regular expressions ("-E") no need for escape.
> Also it works with both '' and "".

Ah, fair enough. My brain escaped the -E :)

Cheers,
Alejandro


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From: Alejandro Vallejo 
To: 
CC: Alejandro Vallejo , Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
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	"Bertrand Marquis" 
Subject: [PATCH v4 00/13] Hyperlaunch device tree for dom0
Date: Thu, 17 Apr 2025 13:48:22 +0100
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Hi,

Here's a new version. Took a while to integrate all the feedback, but
here it is.

v4 pipeline: https://gitlab.com/xen-project/people/agvallejo/xen/-/pipelines/1772300721

v3: https://lore.kernel.org/xen-devel/20250408160802.49870-1-agarciav@amd.com/
v2: https://lore.kernel.org/xen-devel/20241226165740.29812-1-dpsmith@apertussolutions.com/
v1: https://lore.kernel.org/xen-devel/20241123182044.30687-1-dpsmith@apertussolutions.com/

Cheers,
Alejandro

========= Original cover letter:

The Hyperlaunch device tree for dom0 series is the second split out for the
introduction of the Hyperlaunch domain builder logic. These changes focus on
introducing the ability to express a domain configuration that is then used to
populate the struct boot_domain structure for dom0. This ability to express a
domain configuration provides the next step towards a general domain builder.

The splitting of Hyperlaunch into a set of series are twofold, to reduce the
effort in reviewing a much larger series, and to reduce the effort in handling
the knock-on effects to the construction logic from requested review changes.

Alejandro Vallejo (1):
  x86/hyperlaunch: Add helpers to locate multiboot modules

Daniel P. Smith (12):
  x86/boot: add cmdline to struct boot_domain
  kconfig: introduce domain builder config options
  common/hyperlaunch: introduce the domain builder
  x86/hyperlaunch: initial support for hyperlaunch device tree
  x86/hyperlaunch: locate dom0 kernel with hyperlaunch
  x86/hyperlaunch: obtain cmdline from device tree
  x86/hyperlaunch: locate dom0 initrd with hyperlaunch
  x86/hyperlaunch: add domain id parsing to domain config
  x86/hyperlaunch: specify dom0 mode with device tree
  x86/hyperlaunch: add memory parsing to domain config
  x86/hyperlaunch: add max vcpu parsing of hyperlaunch device tree
  x86/hyperlaunch: add capabilities to boot domain

 xen/arch/x86/Kconfig                   |   1 +
 xen/arch/x86/dom0_build.c              |  11 +
 xen/arch/x86/hvm/dom0_build.c          |  31 +-
 xen/arch/x86/include/asm/boot-domain.h |  17 +
 xen/arch/x86/include/asm/bootinfo.h    |  10 +-
 xen/arch/x86/pv/dom0_build.c           |   4 +-
 xen/arch/x86/setup.c                   |  91 +++--
 xen/common/Kconfig                     |   5 +
 xen/common/Makefile                    |   1 +
 xen/common/domain-builder/Kconfig      |  18 +
 xen/common/domain-builder/Makefile     |   2 +
 xen/common/domain-builder/core.c       | 110 ++++++
 xen/common/domain-builder/fdt.c        | 488 +++++++++++++++++++++++++
 xen/common/domain-builder/fdt.h        |  39 ++
 xen/include/xen/domain-builder.h       |  13 +
 xen/include/xen/libfdt/libfdt-xen.h    |  44 +++
 16 files changed, 839 insertions(+), 46 deletions(-)
 create mode 100644 xen/common/domain-builder/Kconfig
 create mode 100644 xen/common/domain-builder/Makefile
 create mode 100644 xen/common/domain-builder/core.c
 create mode 100644 xen/common/domain-builder/fdt.c
 create mode 100644 xen/common/domain-builder/fdt.h
 create mode 100644 xen/include/xen/domain-builder.h

-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Jason Andryuk
	, Alejandro Vallejo 
Subject: [PATCH v4 01/13] x86/boot: add cmdline to struct boot_domain
Date: Thu, 17 Apr 2025 13:48:23 +0100
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From: "Daniel P. Smith" 

Add a container for the "cooked" command line for a domain. This
provides for the backing memory to be directly associated with the
domain being constructed.  This is done in anticipation that the domain
construction path may need to be invoked multiple times, thus ensuring
each instance had a distinct memory allocation.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
---
v4:
  * Manually nullify bd->cmdline before xfree()ing cmdline.
  * const-ify arguments of domain_cmdline_size()
  * Add cmdline_len to pvh_load_kernel()
---
 xen/arch/x86/hvm/dom0_build.c          | 31 ++++++++--------
 xen/arch/x86/include/asm/boot-domain.h |  1 +
 xen/arch/x86/pv/dom0_build.c           |  4 +-
 xen/arch/x86/setup.c                   | 51 ++++++++++++++++++++------
 4 files changed, 57 insertions(+), 30 deletions(-)

diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build.c
index 2a094b3145..49832f921c 100644
--- a/xen/arch/x86/hvm/dom0_build.c
+++ b/xen/arch/x86/hvm/dom0_build.c
@@ -653,7 +653,7 @@ static int __init pvh_load_kernel(
     void *image_start = image_base + image->headroom;
     unsigned long image_len = image->size;
     unsigned long initrd_len = initrd ? initrd->size : 0;
-    const char *cmdline = image->cmdline_pa ? __va(image->cmdline_pa) : NULL;
+    unsigned long cmdline_len = bd->cmdline ? strlen(bd->cmdline) + 1 : 0;
     const char *initrd_cmdline = NULL;
     struct elf_binary elf;
     struct elf_dom_parms parms;
@@ -736,8 +736,7 @@ static int __init pvh_load_kernel(
             initrd = NULL;
     }
 
-    if ( cmdline )
-        extra_space += elf_round_up(&elf, strlen(cmdline) + 1);
+    extra_space += elf_round_up(&elf, cmdline_len);
 
     last_addr = find_memory(d, &elf, extra_space);
     if ( last_addr == INVALID_PADDR )
@@ -778,21 +777,21 @@ static int __init pvh_load_kernel(
     /* Free temporary buffers. */
     free_boot_modules();
 
-    if ( cmdline != NULL )
+    rc = hvm_copy_to_guest_phys(last_addr, bd->cmdline, cmdline_len, v);
+    if ( rc )
     {
-        rc = hvm_copy_to_guest_phys(last_addr, cmdline, strlen(cmdline) + 1, v);
-        if ( rc )
-        {
-            printk("Unable to copy guest command line\n");
-            return rc;
-        }
-        start_info.cmdline_paddr = last_addr;
-        /*
-         * Round up to 32/64 bits (depending on the guest kernel bitness) so
-         * the modlist/start_info is aligned.
-         */
-        last_addr += elf_round_up(&elf, strlen(cmdline) + 1);
+        printk("Unable to copy guest command line\n");
+        return rc;
     }
+
+    start_info.cmdline_paddr = cmdline_len ? last_addr : 0;
+
+    /*
+     * Round up to 32/64 bits (depending on the guest kernel bitness) so
+     * the modlist/start_info is aligned.
+     */
+    last_addr += elf_round_up(&elf, cmdline_len);
+
     if ( initrd != NULL )
     {
         rc = hvm_copy_to_guest_phys(last_addr, &mod, sizeof(mod), v);
diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/include/asm/boot-domain.h
index fcbedda0f0..d7c6042e25 100644
--- a/xen/arch/x86/include/asm/boot-domain.h
+++ b/xen/arch/x86/include/asm/boot-domain.h
@@ -15,6 +15,7 @@ struct boot_domain {
 
     struct boot_module *kernel;
     struct boot_module *module;
+    const char *cmdline;
 
     struct domain *d;
 };
diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c
index b485eea05f..e1b78d47c2 100644
--- a/xen/arch/x86/pv/dom0_build.c
+++ b/xen/arch/x86/pv/dom0_build.c
@@ -972,8 +972,8 @@ static int __init dom0_construct(const struct boot_domain *bd)
     }
 
     memset(si->cmd_line, 0, sizeof(si->cmd_line));
-    if ( image->cmdline_pa )
-        strlcpy((char *)si->cmd_line, __va(image->cmdline_pa), sizeof(si->cmd_line));
+    if ( bd->cmdline )
+        strlcpy((char *)si->cmd_line, bd->cmdline, sizeof(si->cmd_line));
 
 #ifdef CONFIG_VIDEO
     if ( !pv_shim && fill_console_start_info((void *)(si + 1)) )
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 3c257f0bad..4df012460d 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -978,10 +978,30 @@ static unsigned int __init copy_bios_e820(struct e820entry *map, unsigned int li
     return n;
 }
 
-static struct domain *__init create_dom0(struct boot_info *bi)
+static size_t __init domain_cmdline_size(const struct boot_info *bi,
+                                         const struct boot_domain *bd)
 {
-    static char __initdata cmdline[MAX_GUEST_CMDLINE];
+    size_t s = bi->kextra ? strlen(bi->kextra) : 0;
+
+    s += bd->kernel->cmdline_pa ? strlen(__va(bd->kernel->cmdline_pa)) : 0;
 
+    if ( s == 0 )
+        return s;
+
+    /*
+     * Certain parameters from the Xen command line may be added to the dom0
+     * command line. Add additional space for the possible cases along with one
+     * extra char to hold \0.
+     */
+    s += strlen(" noapic") + strlen(" acpi=") + sizeof(acpi_param) + 1;
+
+    return s;
+}
+
+static struct domain *__init create_dom0(struct boot_info *bi)
+{
+    char *cmdline = NULL;
+    size_t cmdline_size;
     struct xen_domctl_createdomain dom0_cfg = {
         .flags = IS_ENABLED(CONFIG_TBOOT) ? XEN_DOMCTL_CDF_s3_integrity : 0,
         .max_evtchn_port = -1,
@@ -1020,20 +1040,24 @@ static struct domain *__init create_dom0(struct boot_info *bi)
     if ( alloc_dom0_vcpu0(d) == NULL )
         panic("Error creating %pdv0\n", d);
 
-    /* Grab the DOM0 command line. */
-    if ( bd->kernel->cmdline_pa || bi->kextra )
+    cmdline_size = domain_cmdline_size(bi, bd);
+    if ( cmdline_size )
     {
+        if ( !(cmdline = xzalloc_array(char, cmdline_size)) )
+            panic("Error allocating cmdline buffer for %pd\n", d);
+
         if ( bd->kernel->cmdline_pa )
-            safe_strcpy(cmdline,
-                        cmdline_cook(__va(bd->kernel->cmdline_pa), bi->loader));
+            strlcpy(cmdline,
+                    cmdline_cook(__va(bd->kernel->cmdline_pa), bi->loader),
+                    cmdline_size);
 
         if ( bi->kextra )
             /* kextra always includes exactly one leading space. */
-            safe_strcat(cmdline, bi->kextra);
+            strlcat(cmdline, bi->kextra, cmdline_size);
 
         /* Append any extra parameters. */
         if ( skip_ioapic_setup && !strstr(cmdline, "noapic") )
-            safe_strcat(cmdline, " noapic");
+            strlcat(cmdline, " noapic", cmdline_size);
 
         if ( (strlen(acpi_param) == 0) && acpi_disabled )
         {
@@ -1043,17 +1067,20 @@ static struct domain *__init create_dom0(struct boot_info *bi)
 
         if ( (strlen(acpi_param) != 0) && !strstr(cmdline, "acpi=") )
         {
-            safe_strcat(cmdline, " acpi=");
-            safe_strcat(cmdline, acpi_param);
+            strlcat(cmdline, " acpi=", cmdline_size);
+            strlcat(cmdline, acpi_param, cmdline_size);
         }
-
-        bd->kernel->cmdline_pa = __pa(cmdline);
+        bd->kernel->cmdline_pa = 0;
+        bd->cmdline = cmdline;
     }
 
     bd->d = d;
     if ( construct_dom0(bd) != 0 )
         panic("Could not construct domain 0\n");
 
+    bd->cmdline = NULL;
+    xfree(cmdline);
+
     return d;
 }
 
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini , "Jason
 Andryuk" , Alejandro Vallejo 
Subject: [PATCH v4 04/13] x86/hyperlaunch: initial support for hyperlaunch device tree
Date: Thu, 17 Apr 2025 13:48:26 +0100
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From: "Daniel P. Smith" 

Add the ability to detect both a formal hyperlaunch device tree or a dom0less
device tree. If the hyperlaunch device tree is found, then count the number of
domain entries, reporting an error if more than one is found.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
---
v4:
  * Panic if we're booting on hyperlaunch, but walking the DTB fails.
  * Remove inconsequential "else" clause in fdt.c
  * Remove stub, as it's not required due to DCE
  * Use min() rather than open-code it
---
 xen/arch/x86/include/asm/bootinfo.h |  1 +
 xen/common/domain-builder/core.c    | 11 +++++
 xen/common/domain-builder/fdt.c     | 63 +++++++++++++++++++++++++++++
 xen/common/domain-builder/fdt.h     |  1 +
 4 files changed, 76 insertions(+)

diff --git a/xen/arch/x86/include/asm/bootinfo.h b/xen/arch/x86/include/asm/bootinfo.h
index 82c2650fcf..1e3d582e45 100644
--- a/xen/arch/x86/include/asm/bootinfo.h
+++ b/xen/arch/x86/include/asm/bootinfo.h
@@ -84,6 +84,7 @@ struct boot_info {
     bool hyperlaunch_enabled;
 
     unsigned int nr_modules;
+    unsigned int nr_domains;
     struct boot_module mods[MAX_NR_BOOTMODS + 1];
     struct boot_domain domains[MAX_NR_BOOTDOMS];
 };
diff --git a/xen/common/domain-builder/core.c b/xen/common/domain-builder/core.c
index a5b21fc179..3b062e85ec 100644
--- a/xen/common/domain-builder/core.c
+++ b/xen/common/domain-builder/core.c
@@ -43,6 +43,17 @@ void __init builder_init(struct boot_info *bi)
             break;
         }
     }
+
+    if ( bi->hyperlaunch_enabled )
+    {
+        int ret;
+
+        printk(XENLOG_INFO "Hyperlaunch configuration:\n");
+        if ( (ret = walk_hyperlaunch_fdt(bi)) < 0 )
+            panic("Walk of device tree failed (%d)\n", ret);
+
+        printk(XENLOG_INFO "  number of domains: %u\n", bi->nr_domains);
+    }
 }
 
 /*
diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
index aaf8c1cc16..b5ff8220da 100644
--- a/xen/common/domain-builder/fdt.c
+++ b/xen/common/domain-builder/fdt.c
@@ -13,6 +13,36 @@
 
 #include "fdt.h"
 
+static int __init find_hyperlaunch_node(const void *fdt)
+{
+    int hv_node = fdt_path_offset(fdt, "/chosen/hypervisor");
+
+    if ( hv_node >= 0 )
+    {
+        /* Anything other than zero indicates no match */
+        if ( fdt_node_check_compatible(fdt, hv_node, "hypervisor,xen") )
+            return -ENODATA;
+
+        return hv_node;
+    }
+    else
+    {
+        /* Look for dom0less config */
+        int node, chosen_node = fdt_path_offset(fdt, "/chosen");
+
+        if ( chosen_node < 0 )
+            return -ENOENT;
+
+        fdt_for_each_subnode(node, fdt, chosen_node)
+        {
+            if ( !fdt_node_check_compatible(fdt, node, "xen,domain") )
+                return chosen_node;
+        }
+    }
+
+    return -ENODATA;
+}
+
 int __init has_hyperlaunch_fdt(const struct boot_info *bi)
 {
     int ret = 0;
@@ -20,7 +50,40 @@ int __init has_hyperlaunch_fdt(const struct boot_info *bi)
 
     if ( !fdt || fdt_check_header(fdt) < 0 )
         ret = -EINVAL;
+    else
+        ret = find_hyperlaunch_node(fdt);
+
+    bootstrap_unmap();
+
+    return min(0, ret);
+}
+
+int __init walk_hyperlaunch_fdt(struct boot_info *bi)
+{
+    int ret = 0, hv_node, node;
+    const void *fdt = bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_IDX]);
+
+    if ( unlikely(!fdt) )
+        return -EINVAL;
+
+    hv_node = find_hyperlaunch_node(fdt);
+    if ( hv_node < 0 )
+    {
+        ret = hv_node;
+        goto err_out;
+    }
+
+    fdt_for_each_subnode(node, fdt, hv_node)
+    {
+        if ( !fdt_node_check_compatible(fdt, node, "xen,domain") )
+            bi->nr_domains++;
+    }
+
+    /* Until multi-domain construction is added, throw an error */
+    if ( bi->nr_domains != 1 )
+        printk(XENLOG_ERR "hyperlaunch only supports dom0 construction\n");
 
+ err_out:
     bootstrap_unmap();
 
     return ret;
diff --git a/xen/common/domain-builder/fdt.h b/xen/common/domain-builder/fdt.h
index 97a45a6ec4..955aead497 100644
--- a/xen/common/domain-builder/fdt.h
+++ b/xen/common/domain-builder/fdt.h
@@ -8,5 +8,6 @@ struct boot_info;
 #define HYPERLAUNCH_MODULE_IDX 0
 
 int has_hyperlaunch_fdt(const struct boot_info *bi);
+int walk_hyperlaunch_fdt(struct boot_info *bi);
 
 #endif /* __XEN_DOMAIN_BUILDER_FDT_H__ */
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini ,
	Alejandro Vallejo 
Subject: [PATCH v4 02/13] kconfig: introduce domain builder config options
Date: Thu, 17 Apr 2025 13:48:24 +0100
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From: "Daniel P. Smith" 

Hyperlaunch domain builder will be the consolidated boot time domain
building logic framework. Introduces the config option to enable this
domain builder to eventually turn on the ability to load the domain
configuration via a flattened device tree.

This is common code, but it's tightly integrated with boot_info, so the
whole builder is gated on CONFIG_HAS_BOOT_INFO, autoselected on x86 only
for the time being.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Alejandro Vallejo 
---
v4:
  * Moved from arch/x86 to common/
  * Present the domain builder submenu for X86 only.
  * s/LIB_DEVICE_TREE/LIBFDT/
  * Reworded Kconfig to be a bit more user-friendly.
  * Dropped Jason's R-by, due to the new Kconfig option.
---
 xen/arch/x86/Kconfig              |  1 +
 xen/common/Kconfig                |  5 +++++
 xen/common/domain-builder/Kconfig | 18 ++++++++++++++++++
 3 files changed, 24 insertions(+)
 create mode 100644 xen/common/domain-builder/Kconfig

diff --git a/xen/arch/x86/Kconfig b/xen/arch/x86/Kconfig
index de2fa37f08..67de2decc5 100644
--- a/xen/arch/x86/Kconfig
+++ b/xen/arch/x86/Kconfig
@@ -15,6 +15,7 @@ config X86
 	select FUNCTION_ALIGNMENT_16B
 	select GENERIC_BUG_FRAME
 	select HAS_ALTERNATIVE
+	select HAS_BOOT_INFO
 	select HAS_COMPAT
 	select HAS_CPUFREQ
 	select HAS_DIT
diff --git a/xen/common/Kconfig b/xen/common/Kconfig
index be28060716..5c9d4eb3ab 100644
--- a/xen/common/Kconfig
+++ b/xen/common/Kconfig
@@ -67,6 +67,9 @@ config GENERIC_BUG_FRAME
 config HAS_ALTERNATIVE
 	bool
 
+config HAS_BOOT_INFO
+	bool
+
 config HAS_COMPAT
 	bool
 
@@ -144,6 +147,8 @@ config STATIC_MEMORY
 
 	  If unsure, say N.
 
+source "common/domain-builder/Kconfig"
+
 menu "Speculative hardening"
 
 config INDIRECT_THUNK
diff --git a/xen/common/domain-builder/Kconfig b/xen/common/domain-builder/Kconfig
new file mode 100644
index 0000000000..5b137e4c2b
--- /dev/null
+++ b/xen/common/domain-builder/Kconfig
@@ -0,0 +1,18 @@
+
+menu "Domain Builder Features"
+depends on HAS_BOOT_INFO
+
+config DOMAIN_BUILDER
+	bool "Domain builder (UNSUPPORTED)" if UNSUPPORTED
+	select LIBFDT
+	help
+	  Xen has a built-in mechanisms to automatically construct domains
+	  (like dom0) during the boot phase. The domain builder is an enhanced
+	  form of that mechanism to enable constructing predefined domains
+	  described on a flattened device tree.
+
+	  This feature is currently experimental.
+
+	  If unsure, say N.
+
+endmenu
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini , "Jason
 Andryuk" , Alejandro Vallejo 
Subject: [PATCH v4 03/13] common/hyperlaunch: introduce the domain builder
Date: Thu, 17 Apr 2025 13:48:25 +0100
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From: "Daniel P. Smith" 

Introduce the domain builder which is capable of consuming a device tree as the
first boot module. If it finds a device tree as the first boot module, it will
set its type to BOOTMOD_FDT. This change only detects the boot module and
continues to boot with slight change to the boot convention that the dom0
kernel is no longer first boot module but is the second.

No functional change intended.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
---
v4:
  * Moved from arch/x86/ to common/
  * gated all of domain-builder/ on CONFIG_BOOT_INFO
  * Hide the domain builder submenu for !X86
  * Factor out the "hyperlaunch_enabled = false" toggle core.c
  * Removed stub inline, as DCE makes it unnecessary
  * Adjusted printks.
---
 xen/arch/x86/include/asm/bootinfo.h |  3 ++
 xen/arch/x86/setup.c                | 17 +++++----
 xen/common/Makefile                 |  1 +
 xen/common/domain-builder/Makefile  |  2 ++
 xen/common/domain-builder/core.c    | 56 +++++++++++++++++++++++++++++
 xen/common/domain-builder/fdt.c     | 37 +++++++++++++++++++
 xen/common/domain-builder/fdt.h     | 12 +++++++
 xen/include/xen/domain-builder.h    |  9 +++++
 8 files changed, 131 insertions(+), 6 deletions(-)
 create mode 100644 xen/common/domain-builder/Makefile
 create mode 100644 xen/common/domain-builder/core.c
 create mode 100644 xen/common/domain-builder/fdt.c
 create mode 100644 xen/common/domain-builder/fdt.h
 create mode 100644 xen/include/xen/domain-builder.h

diff --git a/xen/arch/x86/include/asm/bootinfo.h b/xen/arch/x86/include/asm/bootinfo.h
index 3afc214c17..82c2650fcf 100644
--- a/xen/arch/x86/include/asm/bootinfo.h
+++ b/xen/arch/x86/include/asm/bootinfo.h
@@ -27,6 +27,7 @@ enum bootmod_type {
     BOOTMOD_RAMDISK,
     BOOTMOD_MICROCODE,
     BOOTMOD_XSM_POLICY,
+    BOOTMOD_FDT,
 };
 
 struct boot_module {
@@ -80,6 +81,8 @@ struct boot_info {
     paddr_t memmap_addr;
     size_t memmap_length;
 
+    bool hyperlaunch_enabled;
+
     unsigned int nr_modules;
     struct boot_module mods[MAX_NR_BOOTMODS + 1];
     struct boot_domain domains[MAX_NR_BOOTDOMS];
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 4df012460d..ccc57cc70a 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -5,6 +5,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -1282,9 +1283,12 @@ void asmlinkage __init noreturn __start_xen(void)
                bi->nr_modules);
     }
 
-    /* Dom0 kernel is always first */
-    bi->mods[0].type = BOOTMOD_KERNEL;
-    bi->domains[0].kernel = &bi->mods[0];
+    builder_init(bi);
+
+    /* Find first unknown boot module to use as dom0 kernel */
+    i = first_boot_module_index(bi, BOOTMOD_UNKNOWN);
+    bi->mods[i].type = BOOTMOD_KERNEL;
+    bi->domains[0].kernel = &bi->mods[i];
 
     if ( pvh_boot )
     {
@@ -1467,8 +1471,9 @@ void asmlinkage __init noreturn __start_xen(void)
         xen->size  = __2M_rwdata_end - _stext;
     }
 
-    bi->mods[0].headroom =
-        bzimage_headroom(bootstrap_map_bm(&bi->mods[0]), bi->mods[0].size);
+    bi->domains[0].kernel->headroom =
+        bzimage_headroom(bootstrap_map_bm(bi->domains[0].kernel),
+                         bi->domains[0].kernel->size);
     bootstrap_unmap();
 
 #ifndef highmem_start
@@ -1592,7 +1597,7 @@ void asmlinkage __init noreturn __start_xen(void)
 #endif
     }
 
-    if ( bi->mods[0].headroom && !bi->mods[0].relocated )
+    if ( bi->domains[0].kernel->headroom && !bi->domains[0].kernel->relocated )
         panic("Not enough memory to relocate the dom0 kernel image\n");
     for ( i = 0; i < bi->nr_modules; ++i )
     {
diff --git a/xen/common/Makefile b/xen/common/Makefile
index 98f0873056..565837bc71 100644
--- a/xen/common/Makefile
+++ b/xen/common/Makefile
@@ -11,6 +11,7 @@ obj-$(filter-out $(CONFIG_X86),$(CONFIG_ACPI)) += device.o
 obj-$(CONFIG_HAS_DEVICE_TREE) += device-tree/
 obj-$(CONFIG_IOREQ_SERVER) += dm.o
 obj-y += domain.o
+obj-$(CONFIG_HAS_BOOT_INFO) += domain-builder/
 obj-y += event_2l.o
 obj-y += event_channel.o
 obj-$(CONFIG_EVTCHN_FIFO) += event_fifo.o
diff --git a/xen/common/domain-builder/Makefile b/xen/common/domain-builder/Makefile
new file mode 100644
index 0000000000..b10cd56b28
--- /dev/null
+++ b/xen/common/domain-builder/Makefile
@@ -0,0 +1,2 @@
+obj-$(CONFIG_DOMAIN_BUILDER) += fdt.init.o
+obj-y += core.init.o
diff --git a/xen/common/domain-builder/core.c b/xen/common/domain-builder/core.c
new file mode 100644
index 0000000000..a5b21fc179
--- /dev/null
+++ b/xen/common/domain-builder/core.c
@@ -0,0 +1,56 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (C) 2024, Apertus Solutions, LLC
+ */
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "fdt.h"
+
+void __init builder_init(struct boot_info *bi)
+{
+    bi->hyperlaunch_enabled = false;
+
+    if ( IS_ENABLED(CONFIG_DOMAIN_BUILDER) )
+    {
+        int ret;
+
+        switch ( ret = has_hyperlaunch_fdt(bi) )
+        {
+        case 0:
+            printk(XENLOG_DEBUG "DT found: hyperlaunch\n");
+            bi->hyperlaunch_enabled = true;
+            bi->mods[0].type = BOOTMOD_FDT;
+            break;
+
+        case -EINVAL:
+            /* No DT found */
+            break;
+
+        case -ENOENT:
+        case -ENODATA:
+            printk(XENLOG_DEBUG "DT found: non-hyperlaunch (%d)\n", ret);
+            bi->mods[0].type = BOOTMOD_FDT;
+            break;
+
+        default:
+            printk(XENLOG_ERR "unknown error (%d) checking hyperlaunch DT\n",
+                   ret);
+            break;
+        }
+    }
+}
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * tab-width: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
new file mode 100644
index 0000000000..aaf8c1cc16
--- /dev/null
+++ b/xen/common/domain-builder/fdt.c
@@ -0,0 +1,37 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (C) 2024, Apertus Solutions, LLC
+ */
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "fdt.h"
+
+int __init has_hyperlaunch_fdt(const struct boot_info *bi)
+{
+    int ret = 0;
+    const void *fdt = bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_IDX]);
+
+    if ( !fdt || fdt_check_header(fdt) < 0 )
+        ret = -EINVAL;
+
+    bootstrap_unmap();
+
+    return ret;
+}
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * tab-width: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/common/domain-builder/fdt.h b/xen/common/domain-builder/fdt.h
new file mode 100644
index 0000000000..97a45a6ec4
--- /dev/null
+++ b/xen/common/domain-builder/fdt.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef __XEN_DOMAIN_BUILDER_FDT_H__
+#define __XEN_DOMAIN_BUILDER_FDT_H__
+
+struct boot_info;
+
+/* hyperlaunch fdt is required to be module 0 */
+#define HYPERLAUNCH_MODULE_IDX 0
+
+int has_hyperlaunch_fdt(const struct boot_info *bi);
+
+#endif /* __XEN_DOMAIN_BUILDER_FDT_H__ */
diff --git a/xen/include/xen/domain-builder.h b/xen/include/xen/domain-builder.h
new file mode 100644
index 0000000000..ac2b84775d
--- /dev/null
+++ b/xen/include/xen/domain-builder.h
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef __XEN_DOMAIN_BUILDER_H__
+#define __XEN_DOMAIN_BUILDER_H__
+
+struct boot_info;
+
+void builder_init(struct boot_info *bi);
+
+#endif /* __XEN_DOMAIN_BUILDER_H__ */
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: Alejandro Vallejo , Andrew Cooper
	, Anthony PERARD ,
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 Grall" , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Stefano Stabellini ,
	"Bertrand Marquis" , Jason Andryuk
	
Subject: [PATCH v4 05/13] x86/hyperlaunch: Add helpers to locate multiboot modules
Date: Thu, 17 Apr 2025 13:48:27 +0100
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Hyperlaunch mandates either a reg or module-index DT prop on nodes that
contain `multiboot,module" under their "compatible" prop. This patch
introduces a helper to generically find such index, appending the module
to the list of modules if it wasn't already (i.e: because it's given via
the "reg" prop).

Signed-off-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
---
v4:
  * Remove stray reg prop parser in libfdt-xen.h.
  * Remove fdt32_as_uX accessors.
  * Brough fdt_prop_as_u32() accesor from later patches.
    * So it can be used in place of a hardcoded fdt32_as_u32().
  * Limited MAX_NR_BOOTMODS to INT_MAX.
  * Preserved BOOTMOD_XEN on module append logic.
  * Add missing bounds check to module-index parsed in multiboot module helper.
  * Converted idx variable to uint32_t for better bounds checking.
  * Braces from switch statement to conform to coding style.
  * Added missing XENLOG_X.
  * Print address_cells and size_cells on error parsing reg properties.
  * Added (transient) missing declaration for extern helper.
    * becomes static on the next patch.
---
 xen/common/domain-builder/fdt.c     | 162 ++++++++++++++++++++++++++++
 xen/common/domain-builder/fdt.h     |   2 +
 xen/include/xen/domain-builder.h    |   3 +
 xen/include/xen/libfdt/libfdt-xen.h |  11 ++
 4 files changed, 178 insertions(+)

diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
index b5ff8220da..d73536fed6 100644
--- a/xen/common/domain-builder/fdt.c
+++ b/xen/common/domain-builder/fdt.c
@@ -13,6 +13,168 @@
 
 #include "fdt.h"
 
+/*
+ * Unpacks a "reg" property into its address and size constituents.
+ *
+ * @param prop          Pointer to an FDT "reg" property.
+ * @param address_cells Number of 4-octet cells that make up an "address".
+ * @param size_cells    Number of 4-octet cells that make up a "size".
+ * @param p_addr[out]   Address encoded in the property.
+ * @param p_size[out]   Size encoded in the property.
+ * @returns             -EINVAL on malformed property, 0 otherwise.
+ */
+static int __init read_fdt_prop_as_reg(const struct fdt_property *prop,
+                                       int address_cells, int size_cells,
+                                       uint64_t *p_addr, uint64_t *p_size)
+{
+    const fdt32_t *cell = (const fdt32_t *)prop->data;
+    uint64_t addr, size;
+
+    if ( fdt32_to_cpu(prop->len) !=
+         (address_cells + size_cells) * sizeof(*cell) )
+    {
+        printk(XENLOG_ERR "  cannot read reg %lu+%lu from prop len %u\n",
+            address_cells * sizeof(*cell), size_cells * sizeof(*cell),
+            fdt32_to_cpu(prop->len));
+        return -EINVAL;
+    }
+
+    switch ( address_cells )
+    {
+    case 1:
+        addr = fdt32_to_cpu(*cell);
+        break;
+    case 2:
+        addr = fdt64_to_cpu(*(const fdt64_t *)cell);
+        break;
+    default:
+        printk(XENLOG_ERR "  unsupported address_cells=%d\n", address_cells);
+        return -EINVAL;
+    }
+
+    cell += address_cells;
+    switch ( size_cells )
+    {
+    case 1:
+        size = fdt32_to_cpu(*cell);
+        break;
+    case 2:
+        size = fdt64_to_cpu(*(const fdt64_t *)cell);
+        break;
+    default:
+        printk(XENLOG_ERR "  unsupported size_cells=%d\n", size_cells);
+        return -EINVAL;
+    }
+
+    *p_addr = addr;
+    *p_size = size;
+
+    return 0;
+}
+
+/*
+ * Locate a multiboot module given its node offset in the FDT.
+ *
+ * The module location may be given via either FDT property:
+ *     * reg = 
+ *         * Mutates `bi` to append the module.
+ *     * module-index = 
+ *         * Leaves `bi` unchanged.
+ *
+ * @param fdt           Pointer to the full FDT.
+ * @param node          Offset for the module node.
+ * @param address_cells Number of 4-octet cells that make up an "address".
+ * @param size_cells    Number of 4-octet cells that make up a "size".
+ * @param bi[inout]     Xen's representation of the boot parameters.
+ * @return              -EINVAL on malformed nodes, otherwise
+ *                      index inside `bi->mods`
+ */
+int __init fdt_read_multiboot_module(const void *fdt, int node,
+                                     int address_cells, int size_cells,
+                                     struct boot_info *bi)
+{
+    const struct fdt_property *prop;
+    uint64_t addr, size;
+    int ret;
+    uint32_t idx;
+
+    if ( fdt_node_check_compatible(fdt, node, "multiboot,module") )
+    {
+        printk(XENLOG_ERR "  bad module. multiboot,module not found");
+        return -ENODATA;
+    }
+
+    /* Location given as a `module-index` property. */
+    if ( (prop = fdt_get_property(fdt, node, "module-index", NULL)) )
+    {
+        if ( fdt_get_property(fdt, node, "reg", NULL) )
+        {
+            printk(XENLOG_ERR "  found both reg and module-index for module\n");
+            return -EINVAL;
+        }
+        if ( (ret = fdt_prop_as_u32(prop, &idx)) )
+        {
+            printk(XENLOG_ERR "  bad module-index prop\n");
+            return ret;
+        }
+        if ( idx >= MAX_NR_BOOTMODS )
+        {
+            printk(XENLOG_ERR "  module-index overflow. %s=%u\n",
+                   STR(MAX_NR_BOOTMODS), MAX_NR_BOOTMODS);
+            return -EINVAL;
+        }
+
+        return idx;
+    }
+
+    /* Otherwise location given as a `reg` property. */
+    if ( !(prop = fdt_get_property(fdt, node, "reg", NULL)) )
+    {
+        printk(XENLOG_ERR "  no location for multiboot,module\n");
+        return -EINVAL;
+    }
+    if ( fdt_get_property(fdt, node, "module-index", NULL) )
+    {
+        printk(XENLOG_ERR "  found both reg and module-index for module\n");
+        return -EINVAL;
+    }
+
+    ret = read_fdt_prop_as_reg(prop, address_cells, size_cells, &addr, &size);
+    if ( ret < 0 )
+    {
+        printk(XENLOG_ERR "  failed reading reg for multiboot,module\n");
+        return -EINVAL;
+    }
+
+    idx = bi->nr_modules;
+    if ( idx > MAX_NR_BOOTMODS )
+    {
+        /*
+         * MAX_NR_BOOTMODS must fit in 31 bits so it's representable in the
+         * positive side of an int; for the return value.
+         */
+        BUILD_BUG_ON(MAX_NR_BOOTMODS > (uint64_t)INT_MAX);
+        printk(XENLOG_ERR "  idx=%u exceeds len=%u\n", idx, MAX_NR_BOOTMODS);
+        return -EINVAL;
+    }
+
+    /*
+     * Append new module to the existing list
+     *
+     * Note that bi->nr_modules points to Xen itself, so we must shift it first
+     */
+    bi->nr_modules++;
+    bi->mods[bi->nr_modules] = bi->mods[idx];
+    bi->mods[idx] = (struct boot_module){
+        .start = addr,
+        .size = size,
+    };
+
+    printk(XENLOG_INFO "  module[%u]: addr %lx size %lx\n", idx, addr, size);
+
+    return idx;
+}
+
 static int __init find_hyperlaunch_node(const void *fdt)
 {
     int hv_node = fdt_path_offset(fdt, "/chosen/hypervisor");
diff --git a/xen/common/domain-builder/fdt.h b/xen/common/domain-builder/fdt.h
index 955aead497..8c98a256eb 100644
--- a/xen/common/domain-builder/fdt.h
+++ b/xen/common/domain-builder/fdt.h
@@ -2,6 +2,8 @@
 #ifndef __XEN_DOMAIN_BUILDER_FDT_H__
 #define __XEN_DOMAIN_BUILDER_FDT_H__
 
+#include 
+
 struct boot_info;
 
 /* hyperlaunch fdt is required to be module 0 */
diff --git a/xen/include/xen/domain-builder.h b/xen/include/xen/domain-builder.h
index ac2b84775d..ace6b6875b 100644
--- a/xen/include/xen/domain-builder.h
+++ b/xen/include/xen/domain-builder.h
@@ -5,5 +5,8 @@
 struct boot_info;
 
 void builder_init(struct boot_info *bi);
+int fdt_read_multiboot_module(const void *fdt, int node,
+                              int address_cells, int size_cells,
+                              struct boot_info *bi)
 
 #endif /* __XEN_DOMAIN_BUILDER_H__ */
diff --git a/xen/include/xen/libfdt/libfdt-xen.h b/xen/include/xen/libfdt/libfdt-xen.h
index a5340bc9f4..deafb25d98 100644
--- a/xen/include/xen/libfdt/libfdt-xen.h
+++ b/xen/include/xen/libfdt/libfdt-xen.h
@@ -12,6 +12,17 @@
 #define LIBFDT_XEN_H
 
 #include 
+#include 
+
+static inline int __init fdt_prop_as_u32(
+    const struct fdt_property *prop, uint32_t *val)
+{
+    if ( !prop || fdt32_to_cpu(prop->len) < sizeof(u32) )
+        return -EINVAL;
+
+    *val = fdt32_to_cpu(*(const fdt32_t *)prop->data);
+    return 0;
+}
 
 static inline int fdt_get_mem_rsv_paddr(const void *fdt, int n,
                                         paddr_t *address,
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini , "Jason
 Andryuk" , Alejandro Vallejo 
Subject: [PATCH v4 06/13] x86/hyperlaunch: locate dom0 kernel with hyperlaunch
Date: Thu, 17 Apr 2025 13:48:28 +0100
Message-ID: <20250417124844.11143-7-agarciav@amd.com>
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From: "Daniel P. Smith" 

Look for a subnode of type `multiboot,kernel` within a domain node. If
found, locate it using the multiboot module helper to generically ensure
it lives in the module list. If the bootargs property is present and
there was not an MB1 string, then use the command line from the device
tree definition.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
---
v4:
  * Stop printing on the fallback path of builder_init().
    It's in fact the most common path and just adds noise.
  * Add missing XENLOG_X.
  * Simplified check to log error on nr_domains != 1.
  * s/XENLOG_ERR/XENLOG_WARNING/ on duplicate kernel.
  * Turned foo == 0 into !foo in the "multiboot,kernel" check
---
 xen/arch/x86/setup.c             |  5 ---
 xen/common/domain-builder/core.c |  9 +++++
 xen/common/domain-builder/fdt.c  | 64 ++++++++++++++++++++++++++++++--
 xen/include/xen/domain-builder.h |  3 --
 4 files changed, 70 insertions(+), 11 deletions(-)

diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index ccc57cc70a..4f669f3c60 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -1285,11 +1285,6 @@ void asmlinkage __init noreturn __start_xen(void)
 
     builder_init(bi);
 
-    /* Find first unknown boot module to use as dom0 kernel */
-    i = first_boot_module_index(bi, BOOTMOD_UNKNOWN);
-    bi->mods[i].type = BOOTMOD_KERNEL;
-    bi->domains[0].kernel = &bi->mods[i];
-
     if ( pvh_boot )
     {
         /* pvh_init() already filled in e820_raw */
diff --git a/xen/common/domain-builder/core.c b/xen/common/domain-builder/core.c
index 3b062e85ec..924cb495a3 100644
--- a/xen/common/domain-builder/core.c
+++ b/xen/common/domain-builder/core.c
@@ -54,6 +54,15 @@ void __init builder_init(struct boot_info *bi)
 
         printk(XENLOG_INFO "  number of domains: %u\n", bi->nr_domains);
     }
+    else
+    {
+        /* Find first unknown boot module to use as dom0 kernel */
+        unsigned int i = first_boot_module_index(bi, BOOTMOD_UNKNOWN);
+
+        bi->mods[i].type = BOOTMOD_KERNEL;
+        bi->domains[0].kernel = &bi->mods[i];
+        bi->nr_domains = 1;
+    }
 }
 
 /*
diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
index d73536fed6..1fae6add3b 100644
--- a/xen/common/domain-builder/fdt.c
+++ b/xen/common/domain-builder/fdt.c
@@ -89,9 +89,9 @@ static int __init read_fdt_prop_as_reg(const struct fdt_property *prop,
  * @return              -EINVAL on malformed nodes, otherwise
  *                      index inside `bi->mods`
  */
-int __init fdt_read_multiboot_module(const void *fdt, int node,
-                                     int address_cells, int size_cells,
-                                     struct boot_info *bi)
+static int __init fdt_read_multiboot_module(const void *fdt, int node,
+                                            int address_cells, int size_cells,
+                                            struct boot_info *bi)
 {
     const struct fdt_property *prop;
     uint64_t addr, size;
@@ -175,6 +175,52 @@ int __init fdt_read_multiboot_module(const void *fdt, int node,
     return idx;
 }
 
+static int __init process_domain_node(
+    struct boot_info *bi, const void *fdt, int dom_node)
+{
+    int node;
+    struct boot_domain *bd = &bi->domains[bi->nr_domains];
+    const char *name = fdt_get_name(fdt, dom_node, NULL) ?: "unknown";
+    int address_cells = fdt_address_cells(fdt, dom_node);
+    int size_cells = fdt_size_cells(fdt, dom_node);
+
+    fdt_for_each_subnode(node, fdt, dom_node)
+    {
+        if ( !fdt_node_check_compatible(fdt, node, "multiboot,kernel") )
+        {
+            int idx;
+
+            if ( bd->kernel )
+            {
+                printk(XENLOG_WARNING
+                       "  duplicate kernel for domain %s\n", name);
+                continue;
+            }
+
+            idx = fdt_read_multiboot_module(fdt, node, address_cells,
+                                            size_cells, bi);
+            if ( idx < 0 )
+            {
+                printk(XENLOG_ERR
+                       "  failed processing kernel for domain %s\n", name);
+                return idx;
+            }
+
+            printk(XENLOG_INFO "  kernel: multiboot-index=%d\n", idx);
+            bi->mods[idx].type = BOOTMOD_KERNEL;
+            bd->kernel = &bi->mods[idx];
+        }
+    }
+
+    if ( !bd->kernel )
+    {
+        printk(XENLOG_ERR "error: no kernel assigned to domain\n");
+        return -ENODATA;
+    }
+
+    return 0;
+}
+
 static int __init find_hyperlaunch_node(const void *fdt)
 {
     int hv_node = fdt_path_offset(fdt, "/chosen/hypervisor");
@@ -237,8 +283,20 @@ int __init walk_hyperlaunch_fdt(struct boot_info *bi)
 
     fdt_for_each_subnode(node, fdt, hv_node)
     {
+        if ( bi->nr_domains >= MAX_NR_BOOTDOMS )
+        {
+            printk(XENLOG_WARNING "warning: only creating first %u domains\n",
+                   MAX_NR_BOOTDOMS);
+            break;
+        }
+
         if ( !fdt_node_check_compatible(fdt, node, "xen,domain") )
+        {
+            if ( (ret = process_domain_node(bi, fdt, node)) < 0 )
+                break;
+
             bi->nr_domains++;
+        }
     }
 
     /* Until multi-domain construction is added, throw an error */
diff --git a/xen/include/xen/domain-builder.h b/xen/include/xen/domain-builder.h
index ace6b6875b..ac2b84775d 100644
--- a/xen/include/xen/domain-builder.h
+++ b/xen/include/xen/domain-builder.h
@@ -5,8 +5,5 @@
 struct boot_info;
 
 void builder_init(struct boot_info *bi);
-int fdt_read_multiboot_module(const void *fdt, int node,
-                              int address_cells, int size_cells,
-                              struct boot_info *bi)
 
 #endif /* __XEN_DOMAIN_BUILDER_H__ */
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini , "Jason
 Andryuk" , Alejandro Vallejo 
Subject: [PATCH v4 08/13] x86/hyperlaunch: locate dom0 initrd with hyperlaunch
Date: Thu, 17 Apr 2025 13:48:30 +0100
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From: "Daniel P. Smith" 

Look for a subnode of type `multiboot,ramdisk` within a domain node and
parse via the fdt_read_multiboot_module() helper. After a successful
helper call, the module index is returned and the module is guaranteed
to be in the module list.

Fix unused typo in adjacent comment.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
---
v4:
  * s/XENLOG_ERR/XENLOG_WARNING/ on duplicate ramdisk.
  * Removed stray ")" in printk
  * s/else if/if/ (because of continue)
  * Removed trailing continue
---
 xen/arch/x86/setup.c            |  4 ++--
 xen/common/domain-builder/fdt.c | 25 +++++++++++++++++++++++++
 2 files changed, 27 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 4cae13163b..76ceb5221f 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -2150,11 +2150,11 @@ void asmlinkage __init noreturn __start_xen(void)
      * At this point all capabilities that consume boot modules should have
      * claimed their boot modules. Find the first unclaimed boot module and
      * claim it as the initrd ramdisk. Do a second search to see if there are
-     * any remaining unclaimed boot modules, and report them as unusued initrd
+     * any remaining unclaimed boot modules, and report them as unused initrd
      * candidates.
      */
     initrdidx = first_boot_module_index(bi, BOOTMOD_UNKNOWN);
-    if ( initrdidx < MAX_NR_BOOTMODS )
+    if ( !bi->hyperlaunch_enabled && initrdidx < MAX_NR_BOOTMODS )
     {
         bi->mods[initrdidx].type = BOOTMOD_RAMDISK;
         bi->domains[0].module = &bi->mods[initrdidx];
diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
index 50fde2d007..c0f526a4ce 100644
--- a/xen/common/domain-builder/fdt.c
+++ b/xen/common/domain-builder/fdt.c
@@ -216,6 +216,31 @@ static int __init process_domain_node(
                 bd->kernel->fdt_cmdline = fdt_get_prop_offset(
                     fdt, node, "bootargs", &bd->kernel->cmdline_pa);
         }
+        else if ( !fdt_node_check_compatible(fdt, node, "multiboot,ramdisk") )
+        {
+            int idx;
+
+            if ( bd->module )
+            {
+                printk(XENLOG_WARNING
+                       "Duplicate module for domain %s\n", name);
+                continue;
+            }
+
+            idx = fdt_read_multiboot_module(fdt, node, address_cells,
+                                            size_cells, bi);
+            if ( idx < 0 )
+            {
+                printk(XENLOG_ERR
+                       "  failed processing module for domain %s\n",
+                       name);
+                return -EINVAL;
+            }
+
+            printk(XENLOG_INFO "  module: multiboot-index=%d\n", idx);
+            bi->mods[idx].type = BOOTMOD_RAMDISK;
+            bd->module = &bi->mods[idx];
+        }
     }
 
     if ( !bd->kernel )
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini ,
	Alejandro Vallejo 
Subject: [PATCH v4 09/13] x86/hyperlaunch: add domain id parsing to domain config
Date: Thu, 17 Apr 2025 13:48:31 +0100
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From: "Daniel P. Smith" 

Introduce the ability to specify the desired domain id for the domain
definition. The domain id will be populated in the domid property of the
domain node in the device tree configuration.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Alejandro Vallejo 
---
v4:
  * Add missing newline
  * Adjusted printks
  * Checked domid node against list of outstanding domids.
---
 xen/arch/x86/setup.c            |  5 ++--
 xen/common/domain-builder/fdt.c | 51 ++++++++++++++++++++++++++++++++-
 2 files changed, 53 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 76ceb5221f..04ad2d0937 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -1033,8 +1033,9 @@ static struct domain *__init create_dom0(struct boot_info *bi)
     if ( iommu_enabled )
         dom0_cfg.flags |= XEN_DOMCTL_CDF_iommu;
 
-    /* Create initial domain.  Not d0 for pvshim. */
-    bd->domid = get_initial_domain_id();
+    if ( bd->domid == DOMID_INVALID )
+        /* Create initial domain.  Not d0 for pvshim. */
+        bd->domid = get_initial_domain_id();
     d = domain_create(bd->domid, &dom0_cfg, pv_shim ? 0 : CDF_privileged);
     if ( IS_ERR(d) )
         panic("Error creating d%u: %ld\n", bd->domid, PTR_ERR(d));
diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
index c0f526a4ce..0d3c713041 100644
--- a/xen/common/domain-builder/fdt.c
+++ b/xen/common/domain-builder/fdt.c
@@ -2,6 +2,7 @@
 /*
  * Copyright (C) 2024, Apertus Solutions, LLC
  */
+#include 
 #include 
 #include 
 #include 
@@ -178,12 +179,54 @@ static int __init fdt_read_multiboot_module(const void *fdt, int node,
 static int __init process_domain_node(
     struct boot_info *bi, const void *fdt, int dom_node)
 {
-    int node;
+    int node, property;
     struct boot_domain *bd = &bi->domains[bi->nr_domains];
     const char *name = fdt_get_name(fdt, dom_node, NULL) ?: "unknown";
     int address_cells = fdt_address_cells(fdt, dom_node);
     int size_cells = fdt_size_cells(fdt, dom_node);
 
+    fdt_for_each_property_offset(property, fdt, dom_node)
+    {
+        const struct fdt_property *prop;
+        const char *prop_name;
+        int name_len, rc;
+
+        prop = fdt_get_property_by_offset(fdt, property, NULL);
+        if ( !prop )
+            continue; /* silently skip */
+
+        prop_name = fdt_get_string(fdt, fdt32_to_cpu(prop->nameoff), &name_len);
+
+        if ( !strncmp(prop_name, "domid", name_len) )
+        {
+            uint32_t val = DOMID_INVALID;
+
+            if ( (rc = fdt_prop_as_u32(prop, &val)) )
+            {
+                printk(XENLOG_ERR
+                       "  failed processing domain id for domain %s\n", name);
+                return rc;
+            }
+            if ( val >= DOMID_FIRST_RESERVED )
+            {
+                printk(XENLOG_ERR "  invalid domain id for domain %s\n", name);
+                return -EINVAL;
+            }
+
+            for ( unsigned int i = 0; i < bi->nr_domains; i++ )
+            {
+                if ( bi->domains[i].domid == val )
+                {
+                    printk(XENLOG_ERR "  duplicate id for domain %s\n", name);
+                    return -EINVAL;
+                }
+            }
+
+            bd->domid = val;
+            printk(XENLOG_INFO "  domid: %d\n", bd->domid);
+        }
+    }
+
     fdt_for_each_subnode(node, fdt, dom_node)
     {
         if ( !fdt_node_check_compatible(fdt, node, "multiboot,kernel") )
@@ -249,6 +292,12 @@ static int __init process_domain_node(
         return -ENODATA;
     }
 
+    if ( bd->domid == DOMID_INVALID )
+        bd->domid = get_initial_domain_id();
+    else if ( bd->domid != get_initial_domain_id() )
+        printk(XENLOG_WARNING
+               "Warning: Unsuported boot with missing initial domid\n");
+
     return 0;
 }
 
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini ,
	"Bertrand Marquis" , Jason Andryuk
	, Alejandro Vallejo 
Subject: [PATCH v4 07/13] x86/hyperlaunch: obtain cmdline from device tree
Date: Thu, 17 Apr 2025 13:48:29 +0100
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From: "Daniel P. Smith" 

Add support to read the command line from the hyperlauunch device tree.
The device tree command line is located in the "bootargs" property of the
"multiboot,kernel" node.

A boot loader command line, e.g. a grub module string field, takes
precendence ove the device tree one since it is easier to modify.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
---
v4:
  * Removed __init from header declarations.
  * Removed ifdef guards, as DCE ensures the missing definitions don't
    matter.
  * Removed ifdef guards from new helpers in domain-builder/fdt.c
    * Rely on DCE instead.
  * Restored checks for cmdline_pa being zero.
  * swapped offset and poffset varnames in libfdt-xen.h helper.
  * swapped name and pname varnames in libfdt-xen.h helper.
  * Turned foo == 0  into !foo in libfdt-xen.h helper.
---
 xen/arch/x86/include/asm/bootinfo.h |  6 ++++--
 xen/arch/x86/setup.c                | 10 +++++++--
 xen/common/domain-builder/core.c    | 32 +++++++++++++++++++++++++++++
 xen/common/domain-builder/fdt.c     |  6 ++++++
 xen/common/domain-builder/fdt.h     | 24 ++++++++++++++++++++++
 xen/include/xen/domain-builder.h    |  4 ++++
 xen/include/xen/libfdt/libfdt-xen.h | 23 +++++++++++++++++++++
 7 files changed, 101 insertions(+), 4 deletions(-)

diff --git a/xen/arch/x86/include/asm/bootinfo.h b/xen/arch/x86/include/asm/bootinfo.h
index 1e3d582e45..5b2c93b1ef 100644
--- a/xen/arch/x86/include/asm/bootinfo.h
+++ b/xen/arch/x86/include/asm/bootinfo.h
@@ -35,11 +35,13 @@ struct boot_module {
 
     /*
      * Module State Flags:
-     *   relocated: indicates module has been relocated in memory.
-     *   released:  indicates module's pages have been freed.
+     *   relocated:   indicates module has been relocated in memory.
+     *   released:    indicates module's pages have been freed.
+     *   fdt_cmdline: indicates module's cmdline is in the FDT.
      */
     bool relocated:1;
     bool released:1;
+    bool fdt_cmdline:1;
 
     /*
      * A boot module may need decompressing by Xen.  Headroom is an estimate of
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 4f669f3c60..4cae13163b 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -984,7 +984,10 @@ static size_t __init domain_cmdline_size(const struct boot_info *bi,
 {
     size_t s = bi->kextra ? strlen(bi->kextra) : 0;
 
-    s += bd->kernel->cmdline_pa ? strlen(__va(bd->kernel->cmdline_pa)) : 0;
+    if ( bd->kernel->fdt_cmdline )
+        s += builder_get_cmdline_size(bi, bd->kernel->cmdline_pa);
+    else if ( bd->kernel->cmdline_pa )
+        s += strlen(__va(bd->kernel->cmdline_pa));
 
     if ( s == 0 )
         return s;
@@ -1047,7 +1050,10 @@ static struct domain *__init create_dom0(struct boot_info *bi)
         if ( !(cmdline = xzalloc_array(char, cmdline_size)) )
             panic("Error allocating cmdline buffer for %pd\n", d);
 
-        if ( bd->kernel->cmdline_pa )
+        if ( bd->kernel->fdt_cmdline )
+            builder_get_cmdline(
+                bi, bd->kernel->cmdline_pa, cmdline, cmdline_size);
+        else if ( bd->kernel->cmdline_pa )
             strlcpy(cmdline,
                     cmdline_cook(__va(bd->kernel->cmdline_pa), bi->loader),
                     cmdline_size);
diff --git a/xen/common/domain-builder/core.c b/xen/common/domain-builder/core.c
index 924cb495a3..4b4230f2ff 100644
--- a/xen/common/domain-builder/core.c
+++ b/xen/common/domain-builder/core.c
@@ -8,9 +8,41 @@
 #include 
 
 #include 
+#include 
 
 #include "fdt.h"
 
+size_t __init builder_get_cmdline_size(struct boot_info *bi, int offset)
+{
+    const void *fdt;
+    int size;
+
+    if ( !IS_ENABLED(CONFIG_DOMAIN_BUILDER) )
+        return 0;
+
+    fdt = bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_IDX]);
+    size = fdt_cmdline_prop_size(fdt, offset);
+    bootstrap_unmap();
+
+    return max(0, size);
+}
+
+int __init builder_get_cmdline(
+    struct boot_info *bi, int offset, char *cmdline, size_t size)
+{
+    const void *fdt;
+    int ret;
+
+    if ( !IS_ENABLED(CONFIG_DOMAIN_BUILDER) )
+        return 0;
+
+    fdt = bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_IDX]);
+    ret = fdt_cmdline_prop_copy(fdt, offset, cmdline, size);
+    bootstrap_unmap();
+
+    return ret;
+}
+
 void __init builder_init(struct boot_info *bi)
 {
     bi->hyperlaunch_enabled = false;
diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
index 1fae6add3b..50fde2d007 100644
--- a/xen/common/domain-builder/fdt.c
+++ b/xen/common/domain-builder/fdt.c
@@ -209,6 +209,12 @@ static int __init process_domain_node(
             printk(XENLOG_INFO "  kernel: multiboot-index=%d\n", idx);
             bi->mods[idx].type = BOOTMOD_KERNEL;
             bd->kernel = &bi->mods[idx];
+
+            /* If bootloader didn't set cmdline, see if FDT provides one. */
+            if ( bd->kernel->cmdline_pa &&
+                 !((char *)__va(bd->kernel->cmdline_pa))[0] )
+                bd->kernel->fdt_cmdline = fdt_get_prop_offset(
+                    fdt, node, "bootargs", &bd->kernel->cmdline_pa);
         }
     }
 
diff --git a/xen/common/domain-builder/fdt.h b/xen/common/domain-builder/fdt.h
index 8c98a256eb..d2ae7d5c36 100644
--- a/xen/common/domain-builder/fdt.h
+++ b/xen/common/domain-builder/fdt.h
@@ -9,6 +9,30 @@ struct boot_info;
 /* hyperlaunch fdt is required to be module 0 */
 #define HYPERLAUNCH_MODULE_IDX 0
 
+static inline int __init fdt_cmdline_prop_size(const void *fdt, int offset)
+{
+    int ret;
+
+    fdt_get_property_by_offset(fdt, offset, &ret);
+
+    return ret;
+}
+
+static inline int __init fdt_cmdline_prop_copy(
+    const void *fdt, int offset, char *cmdline, size_t size)
+{
+    int ret;
+    const struct fdt_property *prop =
+        fdt_get_property_by_offset(fdt, offset, &ret);
+
+    if ( ret < 0 )
+        return ret;
+
+    ASSERT(size > ret);
+
+    return strlcpy(cmdline, prop->data, ret);
+}
+
 int has_hyperlaunch_fdt(const struct boot_info *bi);
 int walk_hyperlaunch_fdt(struct boot_info *bi);
 
diff --git a/xen/include/xen/domain-builder.h b/xen/include/xen/domain-builder.h
index ac2b84775d..ac0fd8f60b 100644
--- a/xen/include/xen/domain-builder.h
+++ b/xen/include/xen/domain-builder.h
@@ -4,6 +4,10 @@
 
 struct boot_info;
 
+size_t builder_get_cmdline_size(const struct boot_info *bi, int offset);
+int builder_get_cmdline(const struct boot_info *bi, int offset,
+                               char *cmdline, size_t size);
+
 void builder_init(struct boot_info *bi);
 
 #endif /* __XEN_DOMAIN_BUILDER_H__ */
diff --git a/xen/include/xen/libfdt/libfdt-xen.h b/xen/include/xen/libfdt/libfdt-xen.h
index deafb25d98..afc76e7750 100644
--- a/xen/include/xen/libfdt/libfdt-xen.h
+++ b/xen/include/xen/libfdt/libfdt-xen.h
@@ -24,6 +24,29 @@ static inline int __init fdt_prop_as_u32(
     return 0;
 }
 
+static inline bool __init fdt_get_prop_offset(
+    const void *fdt, int node, const char *pname, unsigned long *poffset)
+{
+    int ret, offset;
+    const char *name;
+
+    fdt_for_each_property_offset(offset, fdt, node)
+    {
+        fdt_getprop_by_offset(fdt, offset, &name, &ret);
+
+        if ( ret < 0 )
+            continue;
+
+        if ( !strcmp(name, pname) )
+        {
+            *poffset = offset;
+            return true;
+        }
+    }
+
+    return false;
+}
+
 static inline int fdt_get_mem_rsv_paddr(const void *fdt, int n,
                                         paddr_t *address,
                                         paddr_t *size)
-- 
2.43.0



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	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini , "Jason
 Andryuk" , Alejandro Vallejo 
Subject: [PATCH v4 10/13] x86/hyperlaunch: specify dom0 mode with device tree
Date: Thu, 17 Apr 2025 13:48:32 +0100
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From: "Daniel P. Smith" 

Enable selecting the mode in which the domain will be built and ran. This
includes:

  - whether it will be either a 32/64 bit domain
  - if it will be run as a PV or HVM domain
  - and if it will require a device model (not applicable for dom0)

In the device tree, this will be represented as a bit map that will be carried
through into struct boot_domain.

Signed-off-by: Daniel P. Smith 
Reviewed-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
---
v4:
  * printk adjustments
  * reject nodes with conflicting mode settings
---
 xen/arch/x86/include/asm/boot-domain.h |  5 +++++
 xen/arch/x86/setup.c                   |  3 ++-
 xen/common/domain-builder/fdt.c        | 21 +++++++++++++++++++++
 3 files changed, 28 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/include/asm/boot-domain.h
index d7c6042e25..e316d4bcde 100644
--- a/xen/arch/x86/include/asm/boot-domain.h
+++ b/xen/arch/x86/include/asm/boot-domain.h
@@ -13,6 +13,11 @@
 struct boot_domain {
     domid_t domid;
 
+                                          /* On     | Off    */
+#define BUILD_MODE_PARAVIRT      (1 << 0) /* PV     | PVH/HVM */
+#define BUILD_MODE_ENABLE_DM     (1 << 1) /* HVM    | PVH     */
+    uint32_t mode;
+
     struct boot_module *kernel;
     struct boot_module *module;
     const char *cmdline;
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 04ad2d0937..05e3d2cf2a 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -1020,7 +1020,8 @@ static struct domain *__init create_dom0(struct boot_info *bi)
     struct boot_domain *bd = &bi->domains[0];
     struct domain *d;
 
-    if ( opt_dom0_pvh )
+    if ( opt_dom0_pvh ||
+         (bi->hyperlaunch_enabled && !(bd->mode & BUILD_MODE_PARAVIRT)) )
     {
         dom0_cfg.flags |= (XEN_DOMCTL_CDF_hvm |
                            ((hvm_hap_supported() && !opt_dom0_shadow) ?
diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
index 0d3c713041..6809c7f917 100644
--- a/xen/common/domain-builder/fdt.c
+++ b/xen/common/domain-builder/fdt.c
@@ -225,6 +225,27 @@ static int __init process_domain_node(
             bd->domid = val;
             printk(XENLOG_INFO "  domid: %d\n", bd->domid);
         }
+        else if ( !strncmp(prop_name, "mode", name_len) )
+        {
+            if ( (rc = fdt_prop_as_u32(prop, &bd->mode)) )
+            {
+                printk(XENLOG_ERR
+                       "  failed processing mode for domain %s\n", name);
+                return rc;
+            }
+
+            if ( (bd->mode & BUILD_MODE_PARAVIRT)  &&
+                 (bd->mode & BUILD_MODE_ENABLE_DM) )
+            {
+                printk(XENLOG_ERR "  mode: invalid (pv+hvm)\n");
+                return -EINVAL;
+            }
+
+            printk(XENLOG_INFO "  mode: %s\n",
+                   (bd->mode & BUILD_MODE_PARAVIRT)  ? "pv"  :
+                   (bd->mode & BUILD_MODE_ENABLE_DM) ? "hvm" :
+                                                       "pvh");
+        }
     }
 
     fdt_for_each_subnode(node, fdt, dom_node)
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini ,
	"Bertrand Marquis" , Jason Andryuk
	, Alejandro Vallejo 
Subject: [PATCH v4 11/13] x86/hyperlaunch: add memory parsing to domain config
Date: Thu, 17 Apr 2025 13:48:33 +0100
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From: "Daniel P. Smith" 

Add three properties, memory, mem-min, and mem-max, to the domain node device
tree parsing to define the memory allocation for a domain. All three fields are
expressed in kb and written as a u64 in the device tree entries.

Signed-off-by: Daniel P. Smith 
Reviewed-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
---
Can't use KB() rather tha SZ_1K, as that's strictly for literals.

v4:
  * Don't override fdt_prop_as_u64() rc on error.
  * Add separate printk statements for each memory prop error.
  * Fix bug setting up dom0_size, dom0_min_size and dom0_max_size
    * Was overriding dom0_size on all 3 paths.
  * Pre-initialise max_pages of all boot_domains to be LONG_MAX, just as
    dom0_max_size.
    * Eventually dom0_max_size drops out in the bigger series, so we
      need that logic to be correct.
---
 xen/arch/x86/dom0_build.c              |  8 ++++++
 xen/arch/x86/include/asm/boot-domain.h |  4 +++
 xen/arch/x86/setup.c                   |  5 +++-
 xen/common/domain-builder/fdt.c        | 36 ++++++++++++++++++++++++++
 xen/include/xen/libfdt/libfdt-xen.h    | 10 +++++++
 5 files changed, 62 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c
index 0b467fd4a4..8db24dbc0a 100644
--- a/xen/arch/x86/dom0_build.c
+++ b/xen/arch/x86/dom0_build.c
@@ -627,6 +627,14 @@ int __init construct_dom0(const struct boot_domain *bd)
 
     process_pending_softirqs();
 
+    /* If param dom0_size was not set and HL config provided memory size */
+    if ( !get_memsize(&dom0_size, ULONG_MAX) && bd->mem_pages )
+        dom0_size.nr_pages = bd->mem_pages;
+    if ( !get_memsize(&dom0_min_size, ULONG_MAX) && bd->min_pages )
+        dom0_min_size.nr_pages = bd->min_pages;
+    if ( !get_memsize(&dom0_max_size, ULONG_MAX) && bd->max_pages )
+        dom0_max_size.nr_pages = bd->max_pages;
+
     if ( is_hvm_domain(d) )
         rc = dom0_construct_pvh(bd);
     else if ( is_pv_domain(d) )
diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/include/asm/boot-domain.h
index e316d4bcde..fa8ea1cc66 100644
--- a/xen/arch/x86/include/asm/boot-domain.h
+++ b/xen/arch/x86/include/asm/boot-domain.h
@@ -18,6 +18,10 @@ struct boot_domain {
 #define BUILD_MODE_ENABLE_DM     (1 << 1) /* HVM    | PVH     */
     uint32_t mode;
 
+    unsigned long mem_pages;
+    unsigned long min_pages;
+    unsigned long max_pages;
+
     struct boot_module *kernel;
     struct boot_module *module;
     const char *cmdline;
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 05e3d2cf2a..455dad454c 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -296,7 +296,10 @@ static const char *cmdline_cook(const char *p, const char *loader_name);
 struct boot_info __initdata xen_boot_info = {
     .loader = "unknown",
     .cmdline = "",
-    .domains = { [0 ... MAX_NR_BOOTDOMS - 1] = { .domid = DOMID_INVALID } },
+    .domains = { [0 ... MAX_NR_BOOTDOMS - 1] = {
+        .domid = DOMID_INVALID,
+        .max_pages = ULONG_MAX,
+    }},
 };
 
 static struct boot_info *__init multiboot_fill_boot_info(
diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
index 6809c7f917..90218d120a 100644
--- a/xen/common/domain-builder/fdt.c
+++ b/xen/common/domain-builder/fdt.c
@@ -7,6 +7,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -246,6 +247,41 @@ static int __init process_domain_node(
                    (bd->mode & BUILD_MODE_ENABLE_DM) ? "hvm" :
                                                        "pvh");
         }
+        else if ( strncmp(prop_name, "memory", name_len) == 0 )
+        {
+            uint64_t kb;
+            if ( (rc = fdt_prop_as_u64(prop, &kb)) )
+            {
+                printk(XENLOG_ERR "  bad \"memory\" prop on domain %s\n", name);
+                return rc;
+            }
+            bd->mem_pages = PFN_DOWN(kb * SZ_1K);
+            printk(XENLOG_ERR "  memory: %lu KiB\n", kb);
+        }
+        else if ( !strncmp(prop_name, "mem-min", name_len) )
+        {
+            uint64_t kb;
+            if ( (rc = fdt_prop_as_u64(prop, &kb)) )
+            {
+                printk(XENLOG_ERR
+                       "  bad \"mem-min\" prop on domain %s\n", name);
+                return rc;
+            }
+            bd->min_pages = PFN_DOWN(kb * SZ_1K);
+            printk(XENLOG_INFO "  min memory: %lu kb\n", kb);
+        }
+        else if ( !strncmp(prop_name, "mem-max", name_len) )
+        {
+            uint64_t kb;
+            if ( (rc = fdt_prop_as_u64(prop, &kb)) )
+            {
+                printk(XENLOG_ERR
+                       "  bad \"mem-max\" prop on domain %s\n", name);
+                return rc;
+            }
+            bd->max_pages = PFN_DOWN(kb * SZ_1K);
+            printk(XENLOG_INFO "  max memory: %lu KiB\n", kb);
+        }
     }
 
     fdt_for_each_subnode(node, fdt, dom_node)
diff --git a/xen/include/xen/libfdt/libfdt-xen.h b/xen/include/xen/libfdt/libfdt-xen.h
index afc76e7750..3054b48a83 100644
--- a/xen/include/xen/libfdt/libfdt-xen.h
+++ b/xen/include/xen/libfdt/libfdt-xen.h
@@ -24,6 +24,16 @@ static inline int __init fdt_prop_as_u32(
     return 0;
 }
 
+static inline int __init fdt_prop_as_u64(
+    const struct fdt_property *prop, uint64_t *val)
+{
+    if ( !prop || fdt32_to_cpu(prop->len) < sizeof(uint64_t) )
+        return -EINVAL;
+
+    *val = fdt64_to_cpu(*(const fdt64_t *)prop->data);
+    return 0;
+}
+
 static inline bool __init fdt_get_prop_offset(
     const void *fdt, int node, const char *pname, unsigned long *poffset)
 {
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini , "Jason
 Andryuk" , Alejandro Vallejo 
Subject: [PATCH v4 12/13] x86/hyperlaunch: add max vcpu parsing of hyperlaunch device tree
Date: Thu, 17 Apr 2025 13:48:34 +0100
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From: "Daniel P. Smith" 

Introduce the `cpus` property, named as such for dom0less compatibility, that
represents the maximum number of vcpus to allocate for a domain. In the device
tree, it will be encoded as a u32 value.

Signed-off-by: Daniel P. Smith 
Reviewed-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
---
v4:
  * s/UINT_MAX/UINT32_MAX/ (cosmetic, but...)
  * s/vpcpus/vcpus/ in commit message.
  * Reworded printk()
---
 xen/arch/x86/dom0_build.c              |  3 +++
 xen/arch/x86/include/asm/boot-domain.h |  2 ++
 xen/common/domain-builder/fdt.c        | 11 +++++++++++
 3 files changed, 16 insertions(+)

diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c
index 8db24dbc0a..f734104c74 100644
--- a/xen/arch/x86/dom0_build.c
+++ b/xen/arch/x86/dom0_build.c
@@ -635,6 +635,9 @@ int __init construct_dom0(const struct boot_domain *bd)
     if ( !get_memsize(&dom0_max_size, ULONG_MAX) && bd->max_pages )
         dom0_max_size.nr_pages = bd->max_pages;
 
+    if ( opt_dom0_max_vcpus_max == UINT_MAX && bd->max_vcpus )
+        opt_dom0_max_vcpus_max = bd->max_vcpus;
+
     if ( is_hvm_domain(d) )
         rc = dom0_construct_pvh(bd);
     else if ( is_pv_domain(d) )
diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/include/asm/boot-domain.h
index fa8ea1cc66..969c02a6ea 100644
--- a/xen/arch/x86/include/asm/boot-domain.h
+++ b/xen/arch/x86/include/asm/boot-domain.h
@@ -22,6 +22,8 @@ struct boot_domain {
     unsigned long min_pages;
     unsigned long max_pages;
 
+    unsigned int max_vcpus;
+
     struct boot_module *kernel;
     struct boot_module *module;
     const char *cmdline;
diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
index 90218d120a..295ab6e8b3 100644
--- a/xen/common/domain-builder/fdt.c
+++ b/xen/common/domain-builder/fdt.c
@@ -282,6 +282,17 @@ static int __init process_domain_node(
             bd->max_pages = PFN_DOWN(kb * SZ_1K);
             printk(XENLOG_INFO "  max memory: %lu KiB\n", kb);
         }
+        else if ( !strncmp(prop_name, "cpus", name_len) )
+        {
+            uint32_t val = UINT32_MAX;
+            if ( (rc = fdt_prop_as_u32(prop, &val)) )
+            {
+                printk(XENLOG_ERR "  bad \"cpus\" prop on domain %s\n", name);
+                return rc;
+            }
+            bd->max_vcpus = val;
+            printk(XENLOG_INFO "  cpus: %d\n", bd->max_vcpus);
+        }
     }
 
     fdt_for_each_subnode(node, fdt, dom_node)
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini , "Jason
 Andryuk" , Alejandro Vallejo 
Subject: [PATCH v4 13/13] x86/hyperlaunch: add capabilities to boot domain
Date: Thu, 17 Apr 2025 13:48:35 +0100
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From: "Daniel P. Smith" 

Introduce the ability to assign capabilities to a domain via its definition in
device tree. The first capability enabled to select is the control domain
capability. The capability property is a bitfield in both the device tree and
`struct boot_domain`.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
---
v4:
  * Dropped Jason's R-by.
  * Refactored caps printinng logic
    * It just wasn't xenlog-compatible as it was.
  * Moved pv_shim check to builder_init, so the capability is just not given.
    * And inlined the create_flags variable now that's tractable.
  * Validated input capabilities after coming out of the DT.
---
 xen/arch/x86/include/asm/boot-domain.h |  5 +++++
 xen/arch/x86/setup.c                   |  3 ++-
 xen/common/domain-builder/core.c       |  2 ++
 xen/common/domain-builder/fdt.c        | 20 ++++++++++++++++++++
 4 files changed, 29 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/include/asm/boot-domain.h
index 969c02a6ea..5c143d82af 100644
--- a/xen/arch/x86/include/asm/boot-domain.h
+++ b/xen/arch/x86/include/asm/boot-domain.h
@@ -13,6 +13,11 @@
 struct boot_domain {
     domid_t domid;
 
+#define BUILD_CAPS_NONE          (0U)
+#define BUILD_CAPS_CONTROL       (1U << 0)
+#define BUILD_CAPS__ALL          BUILD_CAPS_CONTROL
+    uint32_t capabilities;
+
                                           /* On     | Off    */
 #define BUILD_MODE_PARAVIRT      (1 << 0) /* PV     | PVH/HVM */
 #define BUILD_MODE_ENABLE_DM     (1 << 1) /* HVM    | PVH     */
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 455dad454c..3cdd8bc2f9 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -1040,7 +1040,8 @@ static struct domain *__init create_dom0(struct boot_info *bi)
     if ( bd->domid == DOMID_INVALID )
         /* Create initial domain.  Not d0 for pvshim. */
         bd->domid = get_initial_domain_id();
-    d = domain_create(bd->domid, &dom0_cfg, pv_shim ? 0 : CDF_privileged);
+    d = domain_create(bd->domid, &dom0_cfg,
+            (bd->capabilities & BUILD_CAPS_CONTROL) ? CDF_privileged : 0);
     if ( IS_ERR(d) )
         panic("Error creating d%u: %ld\n", bd->domid, PTR_ERR(d));
 
diff --git a/xen/common/domain-builder/core.c b/xen/common/domain-builder/core.c
index 4b4230f2ff..d1a5d6125e 100644
--- a/xen/common/domain-builder/core.c
+++ b/xen/common/domain-builder/core.c
@@ -8,6 +8,7 @@
 #include 
 
 #include 
+#include 
 #include 
 
 #include "fdt.h"
@@ -93,6 +94,7 @@ void __init builder_init(struct boot_info *bi)
 
         bi->mods[i].type = BOOTMOD_KERNEL;
         bi->domains[0].kernel = &bi->mods[i];
+        bi->domains[0].capabilities |= pv_shim ? 0 : BUILD_CAPS_CONTROL;
         bi->nr_domains = 1;
     }
 }
diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
index 295ab6e8b3..3e3a84e2d0 100644
--- a/xen/common/domain-builder/fdt.c
+++ b/xen/common/domain-builder/fdt.c
@@ -293,6 +293,26 @@ static int __init process_domain_node(
             bd->max_vcpus = val;
             printk(XENLOG_INFO "  cpus: %d\n", bd->max_vcpus);
         }
+        else if ( !strncmp(prop_name, "capabilities", name_len) )
+        {
+            if ( (rc = fdt_prop_as_u32(prop, &bd->capabilities)) )
+            {
+                printk(XENLOG_ERR
+                       "  bad \"capabilities\" on domain %s\n", name);
+                return rc;
+            }
+
+            if ( bd->capabilities & ~BUILD_CAPS__ALL )
+            {
+                printk(XENLOG_WARNING "  unknown capabilities: %#x\n",
+                       bd->capabilities & ~BUILD_CAPS__ALL);
+
+                bd->capabilities &= BUILD_CAPS__ALL;
+            }
+
+            printk(XENLOG_INFO "  caps: %s\n",
+                   bd->capabilities & BUILD_CAPS_CONTROL ? "c" : "");
+        }
     }
 
     fdt_for_each_subnode(node, fdt, dom_node)
-- 
2.43.0



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Date: Thu, 17 Apr 2025 14:00:54 +0100
Message-ID: 
Subject: Re: [PATCH v4 00/13] Hyperlaunch device tree for dom0
From: Alejandro Vallejo 
To: Alejandro Vallejo , 
CC: Jan Beulich , Andrew Cooper
	, =?utf-8?q?Roger_Pau_Monn=C3=A9?=
	, Anthony PERARD , "Michal
 Orzel" , Julien Grall , "Stefano
 Stabellini" , Bertrand Marquis
	
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On Thu Apr 17, 2025 at 1:48 PM BST, Alejandro Vallejo wrote:
> Hi,
>
> Here's a new version. Took a while to integrate all the feedback, but
> here it is.
>
> v4 pipeline: https://gitlab.com/xen-project/people/agvallejo/xen/-/pipeli=
nes/1772300721
>
> v3: https://lore.kernel.org/xen-devel/20250408160802.49870-1-agarciav@amd=
.com/
> v2: https://lore.kernel.org/xen-devel/20241226165740.29812-1-dpsmith@aper=
tussolutions.com/
> v1: https://lore.kernel.org/xen-devel/20241123182044.30687-1-dpsmith@aper=
tussolutions.com/
>
> Cheers,
> Alejandro
>
> =3D=3D=3D=3D=3D=3D=3D=3D=3D Original cover letter:
>
> The Hyperlaunch device tree for dom0 series is the second split out for t=
he
> introduction of the Hyperlaunch domain builder logic. These changes focus=
 on
> introducing the ability to express a domain configuration that is then us=
ed to
> populate the struct boot_domain structure for dom0. This ability to expre=
ss a
> domain configuration provides the next step towards a general domain buil=
der.
>
> The splitting of Hyperlaunch into a set of series are twofold, to reduce =
the
> effort in reviewing a much larger series, and to reduce the effort in han=
dling
> the knock-on effects to the construction logic from requested review chan=
ges.
>
> Alejandro Vallejo (1):
>   x86/hyperlaunch: Add helpers to locate multiboot modules
>
> Daniel P. Smith (12):
>   x86/boot: add cmdline to struct boot_domain
>   kconfig: introduce domain builder config options
>   common/hyperlaunch: introduce the domain builder
>   x86/hyperlaunch: initial support for hyperlaunch device tree
>   x86/hyperlaunch: locate dom0 kernel with hyperlaunch
>   x86/hyperlaunch: obtain cmdline from device tree
>   x86/hyperlaunch: locate dom0 initrd with hyperlaunch
>   x86/hyperlaunch: add domain id parsing to domain config
>   x86/hyperlaunch: specify dom0 mode with device tree
>   x86/hyperlaunch: add memory parsing to domain config
>   x86/hyperlaunch: add max vcpu parsing of hyperlaunch device tree
>   x86/hyperlaunch: add capabilities to boot domain
>
>  xen/arch/x86/Kconfig                   |   1 +
>  xen/arch/x86/dom0_build.c              |  11 +
>  xen/arch/x86/hvm/dom0_build.c          |  31 +-
>  xen/arch/x86/include/asm/boot-domain.h |  17 +
>  xen/arch/x86/include/asm/bootinfo.h    |  10 +-
>  xen/arch/x86/pv/dom0_build.c           |   4 +-
>  xen/arch/x86/setup.c                   |  91 +++--
>  xen/common/Kconfig                     |   5 +
>  xen/common/Makefile                    |   1 +
>  xen/common/domain-builder/Kconfig      |  18 +
>  xen/common/domain-builder/Makefile     |   2 +
>  xen/common/domain-builder/core.c       | 110 ++++++
>  xen/common/domain-builder/fdt.c        | 488 +++++++++++++++++++++++++
>  xen/common/domain-builder/fdt.h        |  39 ++
>  xen/include/xen/domain-builder.h       |  13 +
>  xen/include/xen/libfdt/libfdt-xen.h    |  44 +++
>  16 files changed, 839 insertions(+), 46 deletions(-)
>  create mode 100644 xen/common/domain-builder/Kconfig
>  create mode 100644 xen/common/domain-builder/Makefile
>  create mode 100644 xen/common/domain-builder/core.c
>  create mode 100644 xen/common/domain-builder/fdt.c
>  create mode 100644 xen/common/domain-builder/fdt.h
>  create mode 100644 xen/include/xen/domain-builder.h

Bah, I just noticed after sending. The commit messages of the last 10
patches are meant to be common/hyperlaunch. Or just hyperlaunch.

It _is_ effectively still x86-only, but it's living under common.

Cheers,
Alejandro


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Message-ID: <7e73b2ee-45be-42d7-a1f4-9e573448051d@suse.com>
Date: Thu, 17 Apr 2025 15:22:35 +0200
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH] xen-netfront: handle NULL returned by
 xdp_convert_buff_to_frame()
To: Alexey , Jakub Kicinski 
Cc: Stefano Stabellini ,
 Oleksandr Tyshchenko ,
 "David S. Miller" , Eric Dumazet ,
 Paolo Abeni , Alexei Starovoitov ,
 Daniel Borkmann ,
 Jesper Dangaard Brouer ,
 John Fastabend , xen-devel@lists.xenproject.org,
 netdev@vger.kernel.org, linux-kernel@vger.kernel.org, bpf@vger.kernel.org,
 lvc-project@linuxtesting.org, stable@vger.kernel.org
References: <20250414183403.265943-1-sdl@nppct.ru>
 <20250416175835.687a5872@kernel.org>
 
 <0c29a3f9-9e22-4e44-892d-431f06555600@suse.com>
 <452bac2e-2840-4db7-bbf4-c41e94d437a8@nppct.ru>
 
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From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= 
To: Alexey , Jakub Kicinski 
Cc: Stefano Stabellini ,
 Oleksandr Tyshchenko ,
 "David S. Miller" , Eric Dumazet ,
 Paolo Abeni , Alexei Starovoitov ,
 Daniel Borkmann ,
 Jesper Dangaard Brouer ,
 John Fastabend , xen-devel@lists.xenproject.org,
 netdev@vger.kernel.org, linux-kernel@vger.kernel.org, bpf@vger.kernel.org,
 lvc-project@linuxtesting.org, stable@vger.kernel.org
Message-ID: <7e73b2ee-45be-42d7-a1f4-9e573448051d@suse.com>
Subject: Re: [PATCH] xen-netfront: handle NULL returned by
 xdp_convert_buff_to_frame()
References: <20250414183403.265943-1-sdl@nppct.ru>
 <20250416175835.687a5872@kernel.org>
 
 <0c29a3f9-9e22-4e44-892d-431f06555600@suse.com>
 <452bac2e-2840-4db7-bbf4-c41e94d437a8@nppct.ru>
 
 <8264519a-d58a-486e-b3c5-dba400658513@nppct.ru>
 <4679ca25-572b-44aa-bc00-cb9dc1c0080c@suse.com>
 
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Subject: Re: [PATCH] x86/pmstat: Check size of PMSTAT_get_pxstat buffers
To: Ross Lagerwall 
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From: Jan Beulich 
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On 17.04.2025 12:30, Ross Lagerwall wrote:
> --- a/xen/drivers/acpi/pmstat.c
> +++ b/xen/drivers/acpi/pmstat.c
> @@ -104,6 +104,14 @@ int do_get_pm_info(struct xen_sysctl_get_pmstat *op)
>          cpufreq_residency_update(op->cpuid, pxpt->u.cur);
>  
>          ct = pmpt->perf.state_count;
> +
> +        if ( op->u.getpx.total < ct )
> +        {
> +            spin_unlock(cpufreq_statistic_lock);
> +            ret = -ENOSPC;
> +            break;
> +        }

Simply producing an error is not an option imo. See pmstat_get_cx_stat()'s
behavior. Imo the calculation of ct wants to become

        ct = min(pmpt->perf.state_count, op->u.getpx.total);

yet then the copying of the 2-dim array of data becomes more complicated
when ct < pmpt->perf.state_count. An option may be to document that this
array is copied only when the buffer is large enough.

Furthermore I think it would be a good idea to also amend the public header
with IN/OUT annotations for the fields which are input and output (also for
the Cx part, ideally).

And then - doesn't xc_pm_get_pxstat() have a similar issue?

Jan


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Date: Thu, 17 Apr 2025 15:46:51 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Stewart Hildebrand 
Cc: xen-devel@lists.xenproject.org
Subject: Re: [PATCH] vpci/msix: use host msix table address
Message-ID: 
References: <20250415180200.436578-1-stewart.hildebrand@amd.com>
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On Tue, Apr 15, 2025 at 02:01:56PM -0400, Stewart Hildebrand wrote:
> Introduce vmsix_table_host_{addr,base} returning the host physical MSI-X
> table address and base. Use them in update_entry() and get_table().
> 
> Remove stale comment.
> 
> Signed-off-by: Stewart Hildebrand 

Reviewed-by: Roger Pau Monné 

> ---
> I considered adding this tag:
> Fixes: 52ebde3cfae2 ("vpci/header: program p2m with guest BAR view")
> but I left it out since upstream currently only supports identity-mapped
> vPCI.

Hm, not sure.  As you say non-identity mapped vPCI usage is not
supported, so I wouldn't insist in backporting the patch.

Thanks, Roger.


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Date: Thu, 17 Apr 2025 15:59:32 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: Andrew Cooper ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH v2 2/4] x86/hvm: fix handling of accesses to partial r/o
 MMIO pages
Message-ID: 
References: <20250415153246.81688-1-roger.pau@citrix.com>
 <20250415153246.81688-3-roger.pau@citrix.com>
 
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On Thu, Apr 17, 2025 at 09:57:29AM +0200, Jan Beulich wrote:
> On 15.04.2025 17:32, Roger Pau Monne wrote:
> > --- a/xen/arch/x86/hvm/emulate.c
> > +++ b/xen/arch/x86/hvm/emulate.c
> > @@ -370,7 +370,12 @@ static int hvmemul_do_io(
> >          /* If there is no suitable backing DM, just ignore accesses */
> >          if ( !s )
> >          {
> > -            if ( is_mmio && is_hardware_domain(currd) )
> > +            if ( is_mmio && is_hardware_domain(currd) &&
> > +                 /*
> > +                  * Do not attempt to fixup accesses to r/o MMIO regions, they
> > +                  * are expected to be terminated by the null handler below.
> > +                  */
> > +                 !rangeset_contains_singleton(mmio_ro_ranges, PFN_DOWN(addr)) )
> >              {
> >                  /*
> >                   * PVH dom0 is likely missing MMIO mappings on the p2m, due to
> 
> Doesn't this need limiting to writes, i.e. permitting reads to still be
> handled right here?

Oh, I see, yes, it would be fine to attempt to fixup read accesses to
mmio_ro_ranges ranges.

> > --- /dev/null
> > +++ b/xen/arch/x86/hvm/mmio.c
> > @@ -0,0 +1,100 @@
> > +/* SPDX-License-Identifier: GPL-2.0-only */
> > +/*
> > + * MMIO related routines.
> > + *
> > + * Copyright (c) 2025 Cloud Software Group
> > + */
> > +
> > +#include 
> > +#include 
> > +
> > +#include 
> > +
> > +static int cf_check subpage_mmio_accept(struct vcpu *v, unsigned long addr)
> > +{
> > +    p2m_type_t t;
> > +    mfn_t mfn = get_gfn_query_unlocked(v->domain, addr, &t);
> 
> Don't you need to use PFN_DOWN() on addr?
> 
> > +    return !mfn_eq(mfn, INVALID_MFN) && t == p2m_mmio_direct &&
> > +           subpage_mmio_find_page(mfn);
> > +}
> > +
> > +static int cf_check subpage_mmio_read(
> > +    struct vcpu *v, unsigned long addr, unsigned int len, unsigned long *data)
> > +{
> > +    struct domain *d = v->domain;
> > +    p2m_type_t t;
> > +    mfn_t mfn = get_gfn_query(d, addr, &t);
> 
> Same here and further down, and in the write case?

Hm, yes I do.

> > +    struct subpage_ro_range *entry;
> > +    volatile void __iomem *mem;
> > +
> > +    *data = ~0UL;
> > +
> > +    if ( mfn_eq(mfn, INVALID_MFN) || t != p2m_mmio_direct )
> > +    {
> > +        put_gfn(d, addr);
> > +        return X86EMUL_RETRY;
> > +    }
> > +
> > +    entry = subpage_mmio_find_page(mfn);
> > +    if ( !entry )
> > +    {
> > +        put_gfn(d, addr);
> > +        return X86EMUL_OKAY;
> > +    }
> > +
> > +    mem = subpage_mmio_map_page(entry);
> > +    if ( !mem )
> > +    {
> > +        put_gfn(d, addr);
> > +        gprintk(XENLOG_ERR,
> > +                "Failed to map page for MMIO read at %#lx -> %#lx\n",
> > +                addr, mfn_to_maddr(mfn) + PAGE_OFFSET(addr));
> > +        return X86EMUL_OKAY;
> > +    }
> > +
> > +    *data = read_mmio(mem + PAGE_OFFSET(addr), len);
> 
> What if this crosses the trailing page boundary? Imo subpage_mmio_accept()
> would better reject misaligned accesses (at least until we know we need to
> handle such for some obscure reason).

Yes, the previous mmio_ro_emulated_write() did already reject such
accesses.

Thanks, Roger.


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To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper , Julien Grall ,
 Stefano Stabellini ,
 Anthony PERARD ,
 Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Manuel Andreas 
From: Jan Beulich 
Subject: [PATCH] compat/memory: avoid UB shifts in XENMEM_exchange handling
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Add an early basic check, yielding the same error code as the more
thorough on the the main handler would produce.

Fixes: b8a7efe8528a ("Enable compatibility mode operation for HYPERVISOR_memory_op")
Reported-by: Manuel Andreas 
Signed-off-by: Jan Beulich 

--- a/xen/common/compat/memory.c
+++ b/xen/common/compat/memory.c
@@ -161,6 +161,11 @@ int compat_memory_op(unsigned int cmd, X
             if ( copy_from_guest(&cmp.xchg, arg, 1) )
                 return -EFAULT;
 
+            /* Early coarse check, as max_order() isn't available here. */
+            if ( cmp.xchg.in.extent_order >= BITS_PER_INT ||
+                 cmp.xchg.out.extent_order >= BITS_PER_INT )
+                return -EPERM;
+
             order_delta = cmp.xchg.out.extent_order - cmp.xchg.in.extent_order;
             /* Various sanity checks. */
             if ( (cmp.xchg.nr_exchanged > cmp.xchg.in.nr_extents) ||


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Date: Thu, 17 Apr 2025 16:16:42 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel , Julien Grall ,
	Stefano Stabellini ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH v2 1/4] xen/io: provide helpers for multi size MMIO
 accesses
Message-ID: 
References: <20250415153246.81688-1-roger.pau@citrix.com>
 <20250415153246.81688-2-roger.pau@citrix.com>
 <1c4f6304-a272-4fb2-8892-43118d080641@suse.com>
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On Thu, Apr 17, 2025 at 09:43:09AM +0200, Jan Beulich wrote:
> On 15.04.2025 17:32, Roger Pau Monne wrote:
> > @@ -5115,7 +5115,6 @@ static void subpage_mmio_write_emulate(
> >  
> >      if ( test_bit(offset / MMIO_RO_SUBPAGE_GRAN, entry->ro_elems) )
> >      {
> > - write_ignored:
> >          gprintk(XENLOG_WARNING,
> >                  "ignoring write to R/O MMIO 0x%"PRI_mfn"%03x len %u\n",
> >                  mfn_x(mfn), offset, len);
> > @@ -5131,26 +5130,7 @@ static void subpage_mmio_write_emulate(
> >          return;
> >      }
> >  
> > -    addr += offset;
> > -    switch ( len )
> > -    {
> > -    case 1:
> > -        writeb(*(const uint8_t*)data, addr);
> > -        break;
> > -    case 2:
> > -        writew(*(const uint16_t*)data, addr);
> > -        break;
> > -    case 4:
> > -        writel(*(const uint32_t*)data, addr);
> > -        break;
> > -    case 8:
> > -        writeq(*(const uint64_t*)data, addr);
> > -        break;
> > -    default:
> > -        /* mmio_ro_emulated_write() already validated the size */
> > -        ASSERT_UNREACHABLE();
> > -        goto write_ignored;
> > -    }
> > +    write_mmio(addr + offset, data, len);
> >  }
> 
> Should probably have noticed this on v1 already: The log message is now lost
> for the write-ignored case. It looks easy enough to have the function return
> a boolean indicating "done", to retain original behavior here.

Hm, I didn't seem to me the message wants conserving, as it's
unreachable code.  I can try to add again, but we don't print such
message in other cases.

Thanks, Roger.


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Date: Thu, 17 Apr 2025 16:20:58 +0200
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User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v1 03/14] xen/riscv: introduce ioremap()
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: 
 <6d91eeabe2735de93bfcf2a2420e2059a8f35e52.1744126720.git.oleksii.kurochko@gmail.com>
 <84089b6d-efeb-4613-85b9-eb10d11d7338@suse.com>
 
 <6b226b72-11a4-4004-b42d-0e280de83539@suse.com>
Content-Language: en-US
From: Oleksii Kurochko 
In-Reply-To: <6b226b72-11a4-4004-b42d-0e280de83539@suse.com>

This is a multi-part message in MIME format.
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On 4/15/25 1:02 PM, Jan Beulich wrote:
> On 15.04.2025 12:29, Oleksii Kurochko wrote:
>> On 4/10/25 5:13 PM, Jan Beulich wrote:
>>> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>>>> Based on RISC-V unpriviliged spec ( Version 20240411 ):
>>>> ```
>>>> For implementations that conform to the RISC-V Unix Platform Specification,
>>>> I/O devices and DMA operations are required to access memory coherently and
>>>> via strongly ordered I/O channels. Therefore, accesses to regular main memory
>>>> regions that are concurrently accessed by external devices can also use the
>>>> standard synchronization mechanisms. Implementations that do not conform
>>>> to the Unix Platform Specification and/or in which devices do not access
>>>> memory coherently will need to use mechanisms
>>>> (which are currently platform-specific or device-specific) to enforce
>>>> coherency.
>>>>
>>>> I/O regions in the address space should be considered non-cacheable
>>>> regions in the PMAs for those regions. Such regions can be considered coherent
>>>> by the PMA if they are not cached by any agent.
>>>> ```
>>>> and [1]:
>>>> ```
>>>> The current riscv linux implementation requires SOC system to support
>>>> memory coherence between all I/O devices and CPUs. But some SOC systems
>>>> cannot maintain the coherence and they need support cache clean/invalid
>>>> operations to synchronize data.
>>>>
>>>> Current implementation is no problem with SiFive FU540, because FU540
>>>> keeps all IO devices and DMA master devices coherence with CPU. But to a
>>>> traditional SOC vendor, it may already have a stable non-coherency SOC
>>>> system, the need is simply to replace the CPU with RV CPU and rebuild
>>>> the whole system with IO-coherency is very expensive.
>>>> ```
>>>>
>>>> and the fact that all known ( to me ) CPUs that support the H-extension
>>>> and that ones is going to be supported by Xen have memory coherency
>>>> between all I/O devices and CPUs, so it is currently safe to use the
>>>> PAGE_HYPERVISOR attribute.
>>>> However, in cases where a platform does not support memory coherency, it
>>>> should support CMO extensions and Svpbmt. In this scenario, updates to
>>>> ioremap will be necessary.
>>>> For now, a compilation error will be generated to ensure that the need to
>>>> update ioremap() is not overlooked.
>>>>
>>>> [1]https://patchwork.kernel.org/project/linux-riscv/patch/1555947870-23014-1-git-send-email-guoren@kernel.org/
>>> But MMIO access correctness isn't just a matter of coherency. There may not
>>> be any caching involved in most cases, or else you may observe significantly
>>> delayed or even dropped (folded with later ones) writes, and reads may be
>>> serviced from the cache instead of going to actual MMIO. Therefore ...
>>>
>>>> --- a/xen/arch/riscv/Kconfig
>>>> +++ b/xen/arch/riscv/Kconfig
>>>> @@ -15,6 +15,18 @@ config ARCH_DEFCONFIG
>>>>    	string
>>>>    	default "arch/riscv/configs/tiny64_defconfig"
>>>>    
>>>> +config HAS_SVPBMT
>>>> +	bool
>>>> +	help
>>>> +	  This config enables usage of Svpbmt ISA-extension ( Supervisor-mode:
>>>> +	  page-based memory types).
>>>> +
>>>> +	  The memory type for a page contains a combination of attributes
>>>> +	  that indicate the cacheability, idempotency, and ordering
>>>> +	  properties for access to that page.
>>>> +
>>>> +	  The Svpbmt extension is only available on 64-bit cpus.
>>> ... I kind of expect this extension (or anything else that there might be) will need
>>> making use of.
>> In cases where the Svpbmt extension isn't available, PMA (Physical Memory Attributes)
>> is used to control which memory regions are cacheable, non-cacheable, readable, writable,
>> etc. PMA is configured in M-mode by the firmware (e.g., OpenSBI), as is done in Andes
>> cores, or it can be fixed at design time, as in SiFive cores.
> How would things work if there was a need to map a RAM page uncacheable (via
> ioremap() or otherwise)?

My understanding is that Svpbmt is only needed when someone wants to change the memory
attribute of a page set by PMA.

The question is if non-cacheable RAM page is really needed if we have a coherency?

~ Oleksii

--------------0KvSdusqjdNCsCLPd4IIFVZ0
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On 4/15/25 1:02 PM, Jan Beulich wrote:

    

    

      
On 15.04.2025 12:29, Oleksii Kurochko wrote:


      

        
On 4/10/25 5:13 PM, Jan Beulich wrote:


        

          
On 08.04.2025 17:57, Oleksii Kurochko wrote:


          

            
Based on RISC-V unpriviliged spec ( Version 20240411 ):
```
For implementations that conform to the RISC-V Unix Platform Specification,
I/O devices and DMA operations are required to access memory coherently and
via strongly ordered I/O channels. Therefore, accesses to regular main memory
regions that are concurrently accessed by external devices can also use the
standard synchronization mechanisms. Implementations that do not conform
to the Unix Platform Specification and/or in which devices do not access
memory coherently will need to use mechanisms
(which are currently platform-specific or device-specific) to enforce
coherency.

I/O regions in the address space should be considered non-cacheable
regions in the PMAs for those regions. Such regions can be considered coherent
by the PMA if they are not cached by any agent.
```
and [1]:
```
The current riscv linux implementation requires SOC system to support
memory coherence between all I/O devices and CPUs. But some SOC systems
cannot maintain the coherence and they need support cache clean/invalid
operations to synchronize data.

Current implementation is no problem with SiFive FU540, because FU540
keeps all IO devices and DMA master devices coherence with CPU. But to a
traditional SOC vendor, it may already have a stable non-coherency SOC
system, the need is simply to replace the CPU with RV CPU and rebuild
the whole system with IO-coherency is very expensive.
```

and the fact that all known ( to me ) CPUs that support the H-extension
and that ones is going to be supported by Xen have memory coherency
between all I/O devices and CPUs, so it is currently safe to use the
PAGE_HYPERVISOR attribute.
However, in cases where a platform does not support memory coherency, it
should support CMO extensions and Svpbmt. In this scenario, updates to
ioremap will be necessary.
For now, a compilation error will be generated to ensure that the need to
update ioremap() is not overlooked.

[1]https://patchwork.kernel.org/project/linux-riscv/patch/1555947870-23014-1-git-send-email-guoren@kernel.org/


          

          
But MMIO access correctness isn't just a matter of coherency. There may not
be any caching involved in most cases, or else you may observe significantly
delayed or even dropped (folded with later ones) writes, and reads may be
serviced from the cache instead of going to actual MMIO. Therefore ...



          

            
--- a/xen/arch/riscv/Kconfig
+++ b/xen/arch/riscv/Kconfig
@@ -15,6 +15,18 @@ config ARCH_DEFCONFIG
  	string
  	default "arch/riscv/configs/tiny64_defconfig"
  
+config HAS_SVPBMT
+	bool
+	help
+	  This config enables usage of Svpbmt ISA-extension ( Supervisor-mode:
+	  page-based memory types).
+
+	  The memory type for a page contains a combination of attributes
+	  that indicate the cacheability, idempotency, and ordering
+	  properties for access to that page.
+
+	  The Svpbmt extension is only available on 64-bit cpus.


          

          
... I kind of expect this extension (or anything else that there might be) will need
making use of.


        

        
In cases where the Svpbmt extension isn't available, PMA (Physical Memory Attributes)
is used to control which memory regions are cacheable, non-cacheable, readable, writable,
etc. PMA is configured in M-mode by the firmware (e.g., OpenSBI), as is done in Andes
cores, or it can be fixed at design time, as in SiFive cores.


      

      
How would things work if there was a need to map a RAM page uncacheable (via
ioremap() or otherwise)?

    

    
My understanding is that Svpbmt is only needed when someone wants to change the memory
attribute of a page set by PMA.

The question is if non-cacheable RAM page is really needed if we have a coherency?

~ Oleksii


  


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Date: Thu, 17 Apr 2025 16:22:06 +0200
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Subject: Re: [PATCH v2 1/4] xen/io: provide helpers for multi size MMIO
 accesses
To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <20250415153246.81688-1-roger.pau@citrix.com>
 <20250415153246.81688-2-roger.pau@citrix.com>
 <1c4f6304-a272-4fb2-8892-43118d080641@suse.com>
 
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From: Jan Beulich 
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On 17.04.2025 16:16, Roger Pau Monné wrote:
> On Thu, Apr 17, 2025 at 09:43:09AM +0200, Jan Beulich wrote:
>> On 15.04.2025 17:32, Roger Pau Monne wrote:
>>> @@ -5115,7 +5115,6 @@ static void subpage_mmio_write_emulate(
>>>  
>>>      if ( test_bit(offset / MMIO_RO_SUBPAGE_GRAN, entry->ro_elems) )
>>>      {
>>> - write_ignored:
>>>          gprintk(XENLOG_WARNING,
>>>                  "ignoring write to R/O MMIO 0x%"PRI_mfn"%03x len %u\n",
>>>                  mfn_x(mfn), offset, len);
>>> @@ -5131,26 +5130,7 @@ static void subpage_mmio_write_emulate(
>>>          return;
>>>      }
>>>  
>>> -    addr += offset;
>>> -    switch ( len )
>>> -    {
>>> -    case 1:
>>> -        writeb(*(const uint8_t*)data, addr);
>>> -        break;
>>> -    case 2:
>>> -        writew(*(const uint16_t*)data, addr);
>>> -        break;
>>> -    case 4:
>>> -        writel(*(const uint32_t*)data, addr);
>>> -        break;
>>> -    case 8:
>>> -        writeq(*(const uint64_t*)data, addr);
>>> -        break;
>>> -    default:
>>> -        /* mmio_ro_emulated_write() already validated the size */
>>> -        ASSERT_UNREACHABLE();
>>> -        goto write_ignored;
>>> -    }
>>> +    write_mmio(addr + offset, data, len);
>>>  }
>>
>> Should probably have noticed this on v1 already: The log message is now lost
>> for the write-ignored case. It looks easy enough to have the function return
>> a boolean indicating "done", to retain original behavior here.
> 
> Hm, I didn't seem to me the message wants conserving, as it's
> unreachable code.  I can try to add again, but we don't print such
> message in other cases.

This sub-page stuff is special, but I wouldn't mind if we dropped the
message altogether. The "unreachable code" argument is slightly weak,
as it's in particular when the assumption is violated that we would
want to know about it.

Jan


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Subject: Re: [PATCH v19 2/3] vpci: acquire d->pci_lock in I/O handlers
To: Jan Beulich 
CC: Stefano Stabellini , Julien Grall
	, Bertrand Marquis , Michal Orzel
	, Volodymyr Babchuk ,
	Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
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References: <20250415165404.435506-1-stewart.hildebrand@amd.com>
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On 4/16/25 11:27, Jan Beulich wrote:
> On 15.04.2025 18:54, Stewart Hildebrand wrote:
>> In preparation for translating virtual PCI bus topology (where a pdev
>> lookup will be needed in the vPCI I/O handlers), acquire d->pci_lock in
>> the vPCI I/O handlers.
> 
> I find it concerning that the locked regions (it's a domain-wide lock
> after all) are further grown.

Hm. Right. Another approach may be to call
vpci_translate_virtual_device from within locked context of
vpci_{read,write}.


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From: "Teddy Astie" 
Subject: =?utf-8?Q?[PATCH]=20vmx:=20Don't=20open-code=20vmresume/vmlaunch=20instructions?=
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To: security@xenproject.org, xen-devel@lists.xenproject.org
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binutils 2.25 has support for assembling vmresume/vmlaunch
instructions, so we don't need to open-code the byte sequences
for these opcodes anymore.

Signed-off-by: Teddy Astie 
---
 xen/arch/x86/hvm/vmx/entry.S | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/xen/arch/x86/hvm/vmx/entry.S b/xen/arch/x86/hvm/vmx/entry.S
index 6aaeb28a5b..2bfee715b3 100644
--- a/xen/arch/x86/hvm/vmx/entry.S
+++ b/xen/arch/x86/hvm/vmx/entry.S
@@ -21,9 +21,6 @@
 #include 
 #include 
 
-#define VMRESUME     .byte 0x0f,0x01,0xc3
-#define VMLAUNCH     .byte 0x0f,0x01,0xc2
-
 FUNC(vmx_asm_vmexit_handler)
         SAVE_ALL
 
@@ -166,11 +163,11 @@ UNLIKELY_END(realmode)
         jns  .Lvmx_launch
 
 /*.Lvmx_resume:*/
-        VMRESUME
+        vmresume
         jmp  .Lvmx_vmentry_fail
 
 .Lvmx_launch:
-        VMLAUNCH
+        vmlaunch
 
 .Lvmx_vmentry_fail:
         sti
-- 
2.47.2



Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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Subject: Re: [PATCH v1 03/14] xen/riscv: introduce ioremap()
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On 17.04.2025 16:20, Oleksii Kurochko wrote:
> On 4/15/25 1:02 PM, Jan Beulich wrote:
>> On 15.04.2025 12:29, Oleksii Kurochko wrote:
>>> On 4/10/25 5:13 PM, Jan Beulich wrote:
>>>> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>>>>> Based on RISC-V unpriviliged spec ( Version 20240411 ):
>>>>> ```
>>>>> For implementations that conform to the RISC-V Unix Platform Specification,
>>>>> I/O devices and DMA operations are required to access memory coherently and
>>>>> via strongly ordered I/O channels. Therefore, accesses to regular main memory
>>>>> regions that are concurrently accessed by external devices can also use the
>>>>> standard synchronization mechanisms. Implementations that do not conform
>>>>> to the Unix Platform Specification and/or in which devices do not access
>>>>> memory coherently will need to use mechanisms
>>>>> (which are currently platform-specific or device-specific) to enforce
>>>>> coherency.
>>>>>
>>>>> I/O regions in the address space should be considered non-cacheable
>>>>> regions in the PMAs for those regions. Such regions can be considered coherent
>>>>> by the PMA if they are not cached by any agent.
>>>>> ```
>>>>> and [1]:
>>>>> ```
>>>>> The current riscv linux implementation requires SOC system to support
>>>>> memory coherence between all I/O devices and CPUs. But some SOC systems
>>>>> cannot maintain the coherence and they need support cache clean/invalid
>>>>> operations to synchronize data.
>>>>>
>>>>> Current implementation is no problem with SiFive FU540, because FU540
>>>>> keeps all IO devices and DMA master devices coherence with CPU. But to a
>>>>> traditional SOC vendor, it may already have a stable non-coherency SOC
>>>>> system, the need is simply to replace the CPU with RV CPU and rebuild
>>>>> the whole system with IO-coherency is very expensive.
>>>>> ```
>>>>>
>>>>> and the fact that all known ( to me ) CPUs that support the H-extension
>>>>> and that ones is going to be supported by Xen have memory coherency
>>>>> between all I/O devices and CPUs, so it is currently safe to use the
>>>>> PAGE_HYPERVISOR attribute.
>>>>> However, in cases where a platform does not support memory coherency, it
>>>>> should support CMO extensions and Svpbmt. In this scenario, updates to
>>>>> ioremap will be necessary.
>>>>> For now, a compilation error will be generated to ensure that the need to
>>>>> update ioremap() is not overlooked.
>>>>>
>>>>> [1]https://patchwork.kernel.org/project/linux-riscv/patch/1555947870-23014-1-git-send-email-guoren@kernel.org/
>>>> But MMIO access correctness isn't just a matter of coherency. There may not
>>>> be any caching involved in most cases, or else you may observe significantly
>>>> delayed or even dropped (folded with later ones) writes, and reads may be
>>>> serviced from the cache instead of going to actual MMIO. Therefore ...
>>>>
>>>>> --- a/xen/arch/riscv/Kconfig
>>>>> +++ b/xen/arch/riscv/Kconfig
>>>>> @@ -15,6 +15,18 @@ config ARCH_DEFCONFIG
>>>>>    	string
>>>>>    	default "arch/riscv/configs/tiny64_defconfig"
>>>>>    
>>>>> +config HAS_SVPBMT
>>>>> +	bool
>>>>> +	help
>>>>> +	  This config enables usage of Svpbmt ISA-extension ( Supervisor-mode:
>>>>> +	  page-based memory types).
>>>>> +
>>>>> +	  The memory type for a page contains a combination of attributes
>>>>> +	  that indicate the cacheability, idempotency, and ordering
>>>>> +	  properties for access to that page.
>>>>> +
>>>>> +	  The Svpbmt extension is only available on 64-bit cpus.
>>>> ... I kind of expect this extension (or anything else that there might be) will need
>>>> making use of.
>>> In cases where the Svpbmt extension isn't available, PMA (Physical Memory Attributes)
>>> is used to control which memory regions are cacheable, non-cacheable, readable, writable,
>>> etc. PMA is configured in M-mode by the firmware (e.g., OpenSBI), as is done in Andes
>>> cores, or it can be fixed at design time, as in SiFive cores.
>> How would things work if there was a need to map a RAM page uncacheable (via
>> ioremap() or otherwise)?
> 
> My understanding is that Svpbmt is only needed when someone wants to change the memory
> attribute of a page set by PMA.
> 
> The question is if non-cacheable RAM page is really needed if we have a coherency?

Aiui coherency here is among CPUs. Properties of devices in the system are
largely unknown? (Beyond this there may also be special situations in which
one really cares about data going directly to RAM.)

Jan


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From: "Teddy Astie" 
Subject: =?utf-8?Q?Re:=20[PATCH]=20vmx:=20Don't=20open-code=20vmresume/vmlaunch=20instructions?=
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To: xen-devel@lists.xenproject.org, security@xenproject.org
Cc: "Jan Beulich" , "Andrew Cooper" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" 
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Le 17/04/2025 =C3=A0 16:24, Teddy Astie a =C3=A9crit=C2=A0:
> binutils 2.25 has support for assembling vmresume/vmlaunch
> instructions, so we don't need to open-code the byte sequences
> for these opcodes anymore.
> 
> Signed-off-by: Teddy Astie 
> ---
>   xen/arch/x86/hvm/vmx/entry.S | 7 ++-----
>   1 file changed, 2 insertions(+), 5 deletions(-)
> 
> diff --git a/xen/arch/x86/hvm/vmx/entry.S b/xen/arch/x86/hvm/vmx/entry.S
> index 6aaeb28a5b..2bfee715b3 100644
> --- a/xen/arch/x86/hvm/vmx/entry.S
> +++ b/xen/arch/x86/hvm/vmx/entry.S
> @@ -21,9 +21,6 @@
>   #include 
>   #include 
>   
> -#define VMRESUME     .byte 0x0f,0x01,0xc3
> -#define VMLAUNCH     .byte 0x0f,0x01,0xc2
> -
>   FUNC(vmx_asm_vmexit_handler)
>           SAVE_ALL
>   
> @@ -166,11 +163,11 @@ UNLIKELY_END(realmode)
>           jns  .Lvmx_launch
>   
>   /*.Lvmx_resume:*/
> -        VMRESUME
> +        vmresume
>           jmp  .Lvmx_vmentry_fail
>   
>   .Lvmx_launch:
> -        VMLAUNCH
> +        vmlaunch
>   
>   .Lvmx_vmentry_fail:
>           sti

Not a security issue, I sent by mistake to the wrong mailing list.


Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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To: Teddy Astie 
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On 17.04.2025 16:24, Teddy Astie wrote:
> binutils 2.25 has support for assembling vmresume/vmlaunch
> instructions, so we don't need to open-code the byte sequences
> for these opcodes anymore.
> 
> Signed-off-by: Teddy Astie 

Acked-by: Jan Beulich 




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Subject: Re: [PATCH] vmx: Don't open-code vmresume/vmlaunch instructions
To: Teddy Astie , security@xenproject.org,
 xen-devel@lists.xenproject.org
Cc: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 
References: <2d9480b75c80d49952812769f283a220c1753571.1744899753.git.teddy.astie@vates.tech>
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From: Andrew Cooper 
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In-Reply-To: <2d9480b75c80d49952812769f283a220c1753571.1744899753.git.teddy.astie@vates.tech>
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On 17/04/2025 3:24 pm, Teddy Astie wrote:
> binutils 2.25 has support for assembling vmresume/vmlaunch
> instructions, so we don't need to open-code the byte sequences
> for these opcodes anymore.
>
> Signed-off-by: Teddy Astie 

Reviewed-by: Andrew Cooper 


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Subject: Re: [PATCH v2 5/8] asm-generic: move some parts of Arm's
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To: Oleksii Kurochko 
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 , Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Andrew Cooper ,
 Anthony PERARD ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 14.04.2025 17:56, Oleksii Kurochko wrote:
> --- /dev/null
> +++ b/xen/include/xen/fdt-domain-build.h
> @@ -0,0 +1,46 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +#ifndef __XEN_FDT_DOMAIN_BUILD_H__
> +#define __XEN_FDT_DOMAIN_BUILD_H__
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#if __has_include()
> +#   include 
> +#endif

Why is this conditional include needed? There's ...

> +struct domain;
> +struct page_info;
> +struct membanks;
> +
> +typedef bool (*alloc_domheap_mem_cb)(struct domain *d, struct page_info *pg,
> +                                     unsigned int order, void *extra);
> +bool allocate_domheap_memory(struct domain *d, paddr_t tot_size,
> +                             alloc_domheap_mem_cb cb, void *extra);
> +
> +bool allocate_bank_memory(struct kernel_info *kinfo, gfn_t sgfn,
> +                          paddr_t tot_size);
> +void allocate_memory(struct domain *d, struct kernel_info *kinfo);
> +int construct_domain(struct domain *d, struct kernel_info *kinfo);
> +int make_chosen_node(const struct kernel_info *kinfo);
> +int make_cpus_node(const struct domain *d, void *fdt);
> +int make_hypervisor_node(struct domain *d, const struct kernel_info *kinfo,
> +                         int addrcells, int sizecells);
> +int make_memory_node(const struct kernel_info *kinfo, int addrcells,
> +                     int sizecells, const struct membanks *mem);
> +int make_timer_node(const struct kernel_info *kinfo);
> +
> +unsigned int get_allocation_size(paddr_t size);
> +
> +#endif /* __XEN_FDT_DOMAIN_BUILD_H__ */

... nothing here showing any dependency thereon.

Jan


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Date: Thu, 17 Apr 2025 16:37:34 +0200
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v1 03/14] xen/riscv: introduce ioremap()
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: 
 <6d91eeabe2735de93bfcf2a2420e2059a8f35e52.1744126720.git.oleksii.kurochko@gmail.com>
 <84089b6d-efeb-4613-85b9-eb10d11d7338@suse.com>
 
 <6b226b72-11a4-4004-b42d-0e280de83539@suse.com>
 
 
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From: Oleksii Kurochko 
In-Reply-To: 

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--------------rWEM7nMJxlcWUx2paR00MxGY
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On 4/17/25 4:24 PM, Jan Beulich wrote:
> On 17.04.2025 16:20, Oleksii Kurochko wrote:
>> On 4/15/25 1:02 PM, Jan Beulich wrote:
>>> On 15.04.2025 12:29, Oleksii Kurochko wrote:
>>>> On 4/10/25 5:13 PM, Jan Beulich wrote:
>>>>> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>>>>>> Based on RISC-V unpriviliged spec ( Version 20240411 ):
>>>>>> ```
>>>>>> For implementations that conform to the RISC-V Unix Platform Specification,
>>>>>> I/O devices and DMA operations are required to access memory coherently and
>>>>>> via strongly ordered I/O channels. Therefore, accesses to regular main memory
>>>>>> regions that are concurrently accessed by external devices can also use the
>>>>>> standard synchronization mechanisms. Implementations that do not conform
>>>>>> to the Unix Platform Specification and/or in which devices do not access
>>>>>> memory coherently will need to use mechanisms
>>>>>> (which are currently platform-specific or device-specific) to enforce
>>>>>> coherency.
>>>>>>
>>>>>> I/O regions in the address space should be considered non-cacheable
>>>>>> regions in the PMAs for those regions. Such regions can be considered coherent
>>>>>> by the PMA if they are not cached by any agent.
>>>>>> ```
>>>>>> and [1]:
>>>>>> ```
>>>>>> The current riscv linux implementation requires SOC system to support
>>>>>> memory coherence between all I/O devices and CPUs. But some SOC systems
>>>>>> cannot maintain the coherence and they need support cache clean/invalid
>>>>>> operations to synchronize data.
>>>>>>
>>>>>> Current implementation is no problem with SiFive FU540, because FU540
>>>>>> keeps all IO devices and DMA master devices coherence with CPU. But to a
>>>>>> traditional SOC vendor, it may already have a stable non-coherency SOC
>>>>>> system, the need is simply to replace the CPU with RV CPU and rebuild
>>>>>> the whole system with IO-coherency is very expensive.
>>>>>> ```
>>>>>>
>>>>>> and the fact that all known ( to me ) CPUs that support the H-extension
>>>>>> and that ones is going to be supported by Xen have memory coherency
>>>>>> between all I/O devices and CPUs, so it is currently safe to use the
>>>>>> PAGE_HYPERVISOR attribute.
>>>>>> However, in cases where a platform does not support memory coherency, it
>>>>>> should support CMO extensions and Svpbmt. In this scenario, updates to
>>>>>> ioremap will be necessary.
>>>>>> For now, a compilation error will be generated to ensure that the need to
>>>>>> update ioremap() is not overlooked.
>>>>>>
>>>>>> [1]https://patchwork.kernel.org/project/linux-riscv/patch/1555947870-23014-1-git-send-email-guoren@kernel.org/
>>>>> But MMIO access correctness isn't just a matter of coherency. There may not
>>>>> be any caching involved in most cases, or else you may observe significantly
>>>>> delayed or even dropped (folded with later ones) writes, and reads may be
>>>>> serviced from the cache instead of going to actual MMIO. Therefore ...
>>>>>
>>>>>> --- a/xen/arch/riscv/Kconfig
>>>>>> +++ b/xen/arch/riscv/Kconfig
>>>>>> @@ -15,6 +15,18 @@ config ARCH_DEFCONFIG
>>>>>>     	string
>>>>>>     	default "arch/riscv/configs/tiny64_defconfig"
>>>>>>     
>>>>>> +config HAS_SVPBMT
>>>>>> +	bool
>>>>>> +	help
>>>>>> +	  This config enables usage of Svpbmt ISA-extension ( Supervisor-mode:
>>>>>> +	  page-based memory types).
>>>>>> +
>>>>>> +	  The memory type for a page contains a combination of attributes
>>>>>> +	  that indicate the cacheability, idempotency, and ordering
>>>>>> +	  properties for access to that page.
>>>>>> +
>>>>>> +	  The Svpbmt extension is only available on 64-bit cpus.
>>>>> ... I kind of expect this extension (or anything else that there might be) will need
>>>>> making use of.
>>>> In cases where the Svpbmt extension isn't available, PMA (Physical Memory Attributes)
>>>> is used to control which memory regions are cacheable, non-cacheable, readable, writable,
>>>> etc. PMA is configured in M-mode by the firmware (e.g., OpenSBI), as is done in Andes
>>>> cores, or it can be fixed at design time, as in SiFive cores.
>>> How would things work if there was a need to map a RAM page uncacheable (via
>>> ioremap() or otherwise)?
>> My understanding is that Svpbmt is only needed when someone wants to change the memory
>> attribute of a page set by PMA.
>>
>> The question is if non-cacheable RAM page is really needed if we have a coherency?
> Aiui coherency here is among CPUs.

```
For implementations that conform to the RISC-V Unix Platform Specification,
I/O devices and DMA operations are required to access memory coherently and
via strongly ordered I/O channels. Therefore, accesses to regular main memory
regions that are concurrently accessed by external devices can also use the
standard synchronization mechanisms. Implementations that do not conform
to the Unix Platform Specification and/or in which devices do not access
memory coherently will need to use mechanisms
(which are currently platform-specific or device-specific) to enforce
coherency.
```
Based on this from the spec, coherency here is not only among CPUs.


> Properties of devices in the system are
> largely unknown?

Yes, but still not sure what kind of property requires ioremap() which won't work
without Svpmbt. Could you please tell me an example?

> (Beyond this there may also be special situations in which
> one really cares about data going directly to RAM.)

If there are such special cases, I assume that the firmware or hardware (in the case
of fixed PMA) will provide a non-cacheable region. In that case, the user should be
aware of this region and use it for those specific scenarios.

~ Oleksii

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On 4/17/25 4:24 PM, Jan Beulich wrote:

    

    

      
On 17.04.2025 16:20, Oleksii Kurochko wrote:


      

        
On 4/15/25 1:02 PM, Jan Beulich wrote:


        

          
On 15.04.2025 12:29, Oleksii Kurochko wrote:


          

            
On 4/10/25 5:13 PM, Jan Beulich wrote:


            

              
On 08.04.2025 17:57, Oleksii Kurochko wrote:


              

                
Based on RISC-V unpriviliged spec ( Version 20240411 ):
```
For implementations that conform to the RISC-V Unix Platform Specification,
I/O devices and DMA operations are required to access memory coherently and
via strongly ordered I/O channels. Therefore, accesses to regular main memory
regions that are concurrently accessed by external devices can also use the
standard synchronization mechanisms. Implementations that do not conform
to the Unix Platform Specification and/or in which devices do not access
memory coherently will need to use mechanisms
(which are currently platform-specific or device-specific) to enforce
coherency.

I/O regions in the address space should be considered non-cacheable
regions in the PMAs for those regions. Such regions can be considered coherent
by the PMA if they are not cached by any agent.
```
and [1]:
```
The current riscv linux implementation requires SOC system to support
memory coherence between all I/O devices and CPUs. But some SOC systems
cannot maintain the coherence and they need support cache clean/invalid
operations to synchronize data.

Current implementation is no problem with SiFive FU540, because FU540
keeps all IO devices and DMA master devices coherence with CPU. But to a
traditional SOC vendor, it may already have a stable non-coherency SOC
system, the need is simply to replace the CPU with RV CPU and rebuild
the whole system with IO-coherency is very expensive.
```

and the fact that all known ( to me ) CPUs that support the H-extension
and that ones is going to be supported by Xen have memory coherency
between all I/O devices and CPUs, so it is currently safe to use the
PAGE_HYPERVISOR attribute.
However, in cases where a platform does not support memory coherency, it
should support CMO extensions and Svpbmt. In this scenario, updates to
ioremap will be necessary.
For now, a compilation error will be generated to ensure that the need to
update ioremap() is not overlooked.

[1]https://patchwork.kernel.org/project/linux-riscv/patch/1555947870-23014-1-git-send-email-guoren@kernel.org/


              

              
But MMIO access correctness isn't just a matter of coherency. There may not
be any caching involved in most cases, or else you may observe significantly
delayed or even dropped (folded with later ones) writes, and reads may be
serviced from the cache instead of going to actual MMIO. Therefore ...



              

                
--- a/xen/arch/riscv/Kconfig
+++ b/xen/arch/riscv/Kconfig
@@ -15,6 +15,18 @@ config ARCH_DEFCONFIG
   	string
   	default "arch/riscv/configs/tiny64_defconfig"
   
+config HAS_SVPBMT
+	bool
+	help
+	  This config enables usage of Svpbmt ISA-extension ( Supervisor-mode:
+	  page-based memory types).
+
+	  The memory type for a page contains a combination of attributes
+	  that indicate the cacheability, idempotency, and ordering
+	  properties for access to that page.
+
+	  The Svpbmt extension is only available on 64-bit cpus.


              

              
... I kind of expect this extension (or anything else that there might be) will need
making use of.


            

            
In cases where the Svpbmt extension isn't available, PMA (Physical Memory Attributes)
is used to control which memory regions are cacheable, non-cacheable, readable, writable,
etc. PMA is configured in M-mode by the firmware (e.g., OpenSBI), as is done in Andes
cores, or it can be fixed at design time, as in SiFive cores.


          

          
How would things work if there was a need to map a RAM page uncacheable (via
ioremap() or otherwise)?


        

        
My understanding is that Svpbmt is only needed when someone wants to change the memory
attribute of a page set by PMA.

The question is if non-cacheable RAM page is really needed if we have a coherency?


      

      
Aiui coherency here is among CPUs. 

    

    
```
For implementations that conform to the RISC-V Unix Platform Specification,
I/O devices and DMA operations are required to access memory coherently and
via strongly ordered I/O channels. Therefore, accesses to regular main memory
regions that are concurrently accessed by external devices can also use the
standard synchronization mechanisms. Implementations that do not conform
to the Unix Platform Specification and/or in which devices do not access
memory coherently will need to use mechanisms
(which are currently platform-specific or device-specific) to enforce
coherency.
```
Based on this from the spec, coherency here is not only among CPUs.




    

      
Properties of devices in the system are
largely unknown?

    

    
Yes, but still not sure what kind of property requires ioremap() which won't work
without Svpmbt. Could you please tell me an example?



    

      
(Beyond this there may also be special situations in which
one really cares about data going directly to RAM.)

    

    
If there are such special cases, I assume that the firmware or hardware (in the case
of fixed PMA) will provide a non-cacheable region. In that case, the user should be
aware of this region and use it for those specific scenarios.

~ Oleksii


  


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Subject: Re: [PATCH v1 05/14] xen/riscv: introduce platform_get_irq()
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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 Romain Caritey , xen-devel@lists.xenproject.org
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From: Oleksii Kurochko 
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On 4/15/25 1:23 PM, Jan Beulich wrote:
> On 15.04.2025 13:11, Oleksii Kurochko wrote:
>> On 4/10/25 5:35 PM, Jan Beulich wrote:
>>> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>>>> @@ -21,6 +22,22 @@ static struct intc_info __ro_after_init aplic_info = {
>>>>        .hw_version = INTC_APLIC,
>>>>    };
>>>>    
>>>> +static int aplic_irq_xlate(const uint32_t *intspec, unsigned int intsize,
>>> As you start adding functions calling indirectly, please consider adding cf_check
>>> right away, even if right now this has no effect on RISC-V. That'll save you from
>>> going through the entire RISC-V subtree later on to find them all.
>> Sure. I thought that it is a feature for x86 as I haven't seen such attribute for
>> Arm and RISC-V in GCC manuals.
> And that looks to be correct. I was under the (admittedly vague) impression
> Arm64 had something equivalent in hardware, which then merely needs enabling
> in the compiler. Not sure about RISC-V, but seeing the endless flow of
> patches enabling new extensions in binutils, it would perhaps even be
> surprising if nothing along these lines was already in the works somewhere.

You are right, something is already in the work:
-https://github.com/riscv/riscv-cfi
-https://lore.kernel.org/lkml/20230213045351.3945824-1-debug@rivosinc.com/ (interesting that
   they are enabling it for U-mode)


~ Oleksii

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On 4/15/25 1:23 PM, Jan Beulich wrote:

    

    

      
On 15.04.2025 13:11, Oleksii Kurochko wrote:


      

        
On 4/10/25 5:35 PM, Jan Beulich wrote:


        

          
On 08.04.2025 17:57, Oleksii Kurochko wrote:


          

            
@@ -21,6 +22,22 @@ static struct intc_info __ro_after_init aplic_info = {
      .hw_version = INTC_APLIC,
  };
  
+static int aplic_irq_xlate(const uint32_t *intspec, unsigned int intsize,


          

          
As you start adding functions calling indirectly, please consider adding cf_check
right away, even if right now this has no effect on RISC-V. That'll save you from
going through the entire RISC-V subtree later on to find them all.


        

        
Sure. I thought that it is a feature for x86 as I haven't seen such attribute for
Arm and RISC-V in GCC manuals.


      

      
And that looks to be correct. I was under the (admittedly vague) impression
Arm64 had something equivalent in hardware, which then merely needs enabling
in the compiler. Not sure about RISC-V, but seeing the endless flow of
patches enabling new extensions in binutils, it would perhaps even be
surprising if nothing along these lines was already in the works somewhere.

    

    
You are right, something is already in the work:
- https://github.com/riscv/riscv-cfi
- https://lore.kernel.org/lkml/20230213045351.3945824-1-debug@rivosinc.com/ (interesting that
  they are enabling it for U-mode)




    
~ Oleksii


  


--------------izDQ6ZYJOD2yrLpdDKf4c9Fk--


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Subject: Re: [PATCH v2 7/8] xen/common: dom0less: introduce common
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To: Oleksii Kurochko 
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On 14.04.2025 17:56, Oleksii Kurochko wrote:
> --- a/xen/include/xen/fdt-domain-build.h
> +++ b/xen/include/xen/fdt-domain-build.h
> @@ -5,6 +5,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  
>  #if __has_include()
> @@ -32,7 +33,37 @@ int make_memory_node(const struct kernel_info *kinfo, int addrcells,
>                       int sizecells, const struct membanks *mem);
>  int make_timer_node(const struct kernel_info *kinfo);
>  
> -unsigned int get_allocation_size(paddr_t size);
> +
> +static inline int get_allocation_size(paddr_t size)
> +{
> +    /*
> +     * get_order_from_bytes returns the order greater than or equal to
> +     * the given size, but we need less than or equal. Adding one to
> +     * the size pushes an evenly aligned size into the next order, so
> +     * we can then unconditionally subtract 1 from the order which is
> +     * returned.
> +     */
> +    return get_order_from_bytes(size + 1) - 1;
> +}
> +
> +typedef unsigned long (*copy_to_guest_phys_cb)(struct domain *d,
> +                                               paddr_t gpa,
> +                                               void *buf,

This very much looks like the latest now, when the code is made common,
it wants to be const void *. Even if this may require another prereq
patch.

However, instead of using a function pointer, couldn't the now common
code call copy_to_guest_phys_flush_dcache() conditionally upon
IS_ENABLED(CONFIG_)? Or provide a weak
copy_to_guest_phys_flush_dcache() which would simply call
copy_to_guest_phys()?

Jan


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Date: Thu, 17 Apr 2025 16:49:34 +0200
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Subject: Re: [PATCH v1 03/14] xen/riscv: introduce ioremap()
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: 
 <6d91eeabe2735de93bfcf2a2420e2059a8f35e52.1744126720.git.oleksii.kurochko@gmail.com>
 <84089b6d-efeb-4613-85b9-eb10d11d7338@suse.com>
 
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On 17.04.2025 16:37, Oleksii Kurochko wrote:
> 
> On 4/17/25 4:24 PM, Jan Beulich wrote:
>> On 17.04.2025 16:20, Oleksii Kurochko wrote:
>>> On 4/15/25 1:02 PM, Jan Beulich wrote:
>>>> On 15.04.2025 12:29, Oleksii Kurochko wrote:
>>>>> On 4/10/25 5:13 PM, Jan Beulich wrote:
>>>>>> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>>>>>>> Based on RISC-V unpriviliged spec ( Version 20240411 ):
>>>>>>> ```
>>>>>>> For implementations that conform to the RISC-V Unix Platform Specification,
>>>>>>> I/O devices and DMA operations are required to access memory coherently and
>>>>>>> via strongly ordered I/O channels. Therefore, accesses to regular main memory
>>>>>>> regions that are concurrently accessed by external devices can also use the
>>>>>>> standard synchronization mechanisms. Implementations that do not conform
>>>>>>> to the Unix Platform Specification and/or in which devices do not access
>>>>>>> memory coherently will need to use mechanisms
>>>>>>> (which are currently platform-specific or device-specific) to enforce
>>>>>>> coherency.
>>>>>>>
>>>>>>> I/O regions in the address space should be considered non-cacheable
>>>>>>> regions in the PMAs for those regions. Such regions can be considered coherent
>>>>>>> by the PMA if they are not cached by any agent.
>>>>>>> ```
>>>>>>> and [1]:
>>>>>>> ```
>>>>>>> The current riscv linux implementation requires SOC system to support
>>>>>>> memory coherence between all I/O devices and CPUs. But some SOC systems
>>>>>>> cannot maintain the coherence and they need support cache clean/invalid
>>>>>>> operations to synchronize data.
>>>>>>>
>>>>>>> Current implementation is no problem with SiFive FU540, because FU540
>>>>>>> keeps all IO devices and DMA master devices coherence with CPU. But to a
>>>>>>> traditional SOC vendor, it may already have a stable non-coherency SOC
>>>>>>> system, the need is simply to replace the CPU with RV CPU and rebuild
>>>>>>> the whole system with IO-coherency is very expensive.
>>>>>>> ```
>>>>>>>
>>>>>>> and the fact that all known ( to me ) CPUs that support the H-extension
>>>>>>> and that ones is going to be supported by Xen have memory coherency
>>>>>>> between all I/O devices and CPUs, so it is currently safe to use the
>>>>>>> PAGE_HYPERVISOR attribute.
>>>>>>> However, in cases where a platform does not support memory coherency, it
>>>>>>> should support CMO extensions and Svpbmt. In this scenario, updates to
>>>>>>> ioremap will be necessary.
>>>>>>> For now, a compilation error will be generated to ensure that the need to
>>>>>>> update ioremap() is not overlooked.
>>>>>>>
>>>>>>> [1]https://patchwork.kernel.org/project/linux-riscv/patch/1555947870-23014-1-git-send-email-guoren@kernel.org/
>>>>>> But MMIO access correctness isn't just a matter of coherency. There may not
>>>>>> be any caching involved in most cases, or else you may observe significantly
>>>>>> delayed or even dropped (folded with later ones) writes, and reads may be
>>>>>> serviced from the cache instead of going to actual MMIO. Therefore ...
>>>>>>
>>>>>>> --- a/xen/arch/riscv/Kconfig
>>>>>>> +++ b/xen/arch/riscv/Kconfig
>>>>>>> @@ -15,6 +15,18 @@ config ARCH_DEFCONFIG
>>>>>>>     	string
>>>>>>>     	default "arch/riscv/configs/tiny64_defconfig"
>>>>>>>     
>>>>>>> +config HAS_SVPBMT
>>>>>>> +	bool
>>>>>>> +	help
>>>>>>> +	  This config enables usage of Svpbmt ISA-extension ( Supervisor-mode:
>>>>>>> +	  page-based memory types).
>>>>>>> +
>>>>>>> +	  The memory type for a page contains a combination of attributes
>>>>>>> +	  that indicate the cacheability, idempotency, and ordering
>>>>>>> +	  properties for access to that page.
>>>>>>> +
>>>>>>> +	  The Svpbmt extension is only available on 64-bit cpus.
>>>>>> ... I kind of expect this extension (or anything else that there might be) will need
>>>>>> making use of.
>>>>> In cases where the Svpbmt extension isn't available, PMA (Physical Memory Attributes)
>>>>> is used to control which memory regions are cacheable, non-cacheable, readable, writable,
>>>>> etc. PMA is configured in M-mode by the firmware (e.g., OpenSBI), as is done in Andes
>>>>> cores, or it can be fixed at design time, as in SiFive cores.
>>>> How would things work if there was a need to map a RAM page uncacheable (via
>>>> ioremap() or otherwise)?
>>> My understanding is that Svpbmt is only needed when someone wants to change the memory
>>> attribute of a page set by PMA.
>>>
>>> The question is if non-cacheable RAM page is really needed if we have a coherency?
>> Aiui coherency here is among CPUs.
> 
> ```
> For implementations that conform to the RISC-V Unix Platform Specification,
> I/O devices and DMA operations are required to access memory coherently and
> via strongly ordered I/O channels. Therefore, accesses to regular main memory
> regions that are concurrently accessed by external devices can also use the
> standard synchronization mechanisms. Implementations that do not conform
> to the Unix Platform Specification and/or in which devices do not access
> memory coherently will need to use mechanisms
> (which are currently platform-specific or device-specific) to enforce
> coherency.
> ```
> Based on this from the spec, coherency here is not only among CPUs.
> 
> 
>> Properties of devices in the system are
>> largely unknown?
> 
> Yes, but still not sure what kind of property requires ioremap() which won't work
> without Svpmbt. Could you please tell me an example?

Well, above you said they all need to access memory coherently. That's the
"property" I was referring to.

>> (Beyond this there may also be special situations in which
>> one really cares about data going directly to RAM.)
> 
> If there are such special cases, I assume that the firmware or hardware (in the case
> of fixed PMA) will provide a non-cacheable region.

How could they? Firmware may be unaware of specific properties of specific
devices a user adds to a system.

Jan

> In that case, the user should be
> aware of this region and use it for those specific scenarios.
> 
> ~ Oleksii
> 



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Subject: Re: [PATCH v4 01/13] x86/boot: add cmdline to struct boot_domain
To: Alejandro Vallejo 
Cc: "Daniel P. Smith" ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Jason Andryuk , xen-devel@lists.xenproject.org
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On 17.04.2025 14:48, Alejandro Vallejo wrote:
> From: "Daniel P. Smith" 
> 
> Add a container for the "cooked" command line for a domain. This
> provides for the backing memory to be directly associated with the
> domain being constructed.  This is done in anticipation that the domain
> construction path may need to be invoked multiple times, thus ensuring
> each instance had a distinct memory allocation.
> 
> Signed-off-by: Daniel P. Smith 
> Signed-off-by: Jason Andryuk 
> Signed-off-by: Alejandro Vallejo 

Acked-by: Jan Beulich 
preferably with ...

> --- a/xen/arch/x86/hvm/dom0_build.c
> +++ b/xen/arch/x86/hvm/dom0_build.c
> @@ -653,7 +653,7 @@ static int __init pvh_load_kernel(
>      void *image_start = image_base + image->headroom;
>      unsigned long image_len = image->size;
>      unsigned long initrd_len = initrd ? initrd->size : 0;
> -    const char *cmdline = image->cmdline_pa ? __va(image->cmdline_pa) : NULL;
> +    unsigned long cmdline_len = bd->cmdline ? strlen(bd->cmdline) + 1 : 0;

... this becoming either size_t (as you have it elsewhere) or unsigned int.
Happy to make the adjustment while committing, so long as you agree with
either of the suggested variants.

Jan


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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Stefano Stabellini ,
	Michal Orzel ,
	Doug Goldstein ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Jason Andryuk ,
	"Daniel P . Smith" 
Subject: [PATCH] Update to latest Argo
Date: Thu, 17 Apr 2025 15:55:02 +0100
Message-Id: <20250417145502.2565165-1-andrew.cooper3@citrix.com>
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The bugfixes I submitted during commit 36500bcb5e24 ("Overhaul how Argo is
built and packged") have now been merged.

Update the version used, and drop the -Wno-error workaround.

Link: https://github.com/OpenXT/linux-xen-argo/pull/21
Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Stefano Stabellini 
CC: Michal Orzel 
CC: Doug Goldstein 
CC: Marek Marczykowski-Górecki 
CC: Jason Andryuk 
CC: Daniel P. Smith 
---
 .gitlab-ci.yml        | 2 +-
 scripts/build-argo.sh | 1 -
 2 files changed, 1 insertion(+), 2 deletions(-)

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 74335363d5ed..dcf76db6ec62 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -61,7 +61,7 @@ linux-6.6.56-x86_64:
   script: ./scripts/build-linux.sh
   variables:
     LINUX_VERSION: 6.6.56
-    ARGO_SHA: "705a7a8a624b42e13e655d3042059b8a85cdf6a3"
+    ARGO_SHA: "cf73819cacc945baca1a7421e5836d1bd481739b"
     ARGOEXEC_SHA: "d900429f6640acc6f68a3d3a4c945d7da60625d8"
 
 microcode-x86:
diff --git a/scripts/build-argo.sh b/scripts/build-argo.sh
index ef7057d847d4..cd01078a3f39 100755
--- a/scripts/build-argo.sh
+++ b/scripts/build-argo.sh
@@ -20,7 +20,6 @@ git -C "${WORKDIR}/linux-xen-argo" switch --detach FETCH_HEAD
 make -j$(nproc) -C "linux-${LINUX_VERSION}" \
      M="${WORKDIR}/linux-xen-argo/argo-linux" \
      KBUILD_MODPOST_WARN=1 \
-     CFLAGS_MODULE="-Wno-error" \
      modules
 install -D -m644 "${WORKDIR}/linux-xen-argo/argo-linux/xen-argo.ko" \
      "${ARGODIR}/lib/modules/${LINUX_VERSION}/updates/xen-argo.ko"
-- 
2.39.5



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From: Juergen Gross 
To: torvalds@linux-foundation.org
Cc: linux-kernel@vger.kernel.org,
	xen-devel@lists.xenproject.org,
	sstabellini@kernel.org
Subject: [GIT PULL] xen: branch for v6.15-rc3
Date: Thu, 17 Apr 2025 16:58:31 +0200
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Linus,

Please git pull the following tag:

 git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip.git for-linus-6.15a-rc3-tag

xen: branch for v6.15-rc3

It contains just a single fix for the Xen multicall driver avoiding
a percpu variable referencing initdata by its initializer.


Thanks.

Juergen

 arch/x86/xen/multicalls.c | 26 ++++++++++++++------------
 arch/x86/xen/smp_pv.c     |  1 -
 arch/x86/xen/xen-ops.h    |  3 ---
 3 files changed, 14 insertions(+), 16 deletions(-)

Juergen Gross (1):
      xen: fix multicall debug feature


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Subject: Re: [PATCH v4 02/13] kconfig: introduce domain builder config options
To: Alejandro Vallejo 
Cc: "Daniel P. Smith" ,
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 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 17.04.2025 14:48, Alejandro Vallejo wrote:
> --- /dev/null
> +++ b/xen/common/domain-builder/Kconfig
> @@ -0,0 +1,18 @@
> +
> +menu "Domain Builder Features"
> +depends on HAS_BOOT_INFO

That is, what's going to further be added here will not ...

> +config DOMAIN_BUILDER

...depend on this, but just on HAS_BOOT_INFO? Seems not very likely, but
I'll be looking forward to learn what the plans are.

Also, if the entire contents here is to depend on HAS_BOOT_INFO, can't
the "source" line pulling in this Kconfig be put inside "if HAS_BOOT_INFO"?
That would centralize definition and use of that symbol to a single file.

> +	bool "Domain builder (UNSUPPORTED)" if UNSUPPORTED
> +	select LIBFDT
> +	help
> +	  Xen has a built-in mechanisms to automatically construct domains
> +	  (like dom0) during the boot phase. The domain builder is an enhanced
> +	  form of that mechanism to enable constructing predefined domains
> +	  described on a flattened device tree.

I'm not a native speaker, but (perhaps because of that) "on" here reads
odd. More logical to me would be "by" or "via".

Jan


From xen-devel-bounces@lists.xenproject.org Thu Apr 17 15:12:40 2025
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On 14.04.2025 09:40, Penny Zheng wrote:
> AMD cpufreq cores will be intialized in two modes, legacy P-state mode,
> and CPPC mode. So "init" flag shall be extracted from specific
> "struct xen_processor_perf", and placed in the common
> "struct processor_pminfo".

The code change is certainly acceptable, as being largely mechanical.
However, the above doesn't explain _why_ we need that change. There's
probably a little more connection that needs making between that's
there and what you mean to add.

Jan


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Date: Thu, 17 Apr 2025 17:21:37 +0200
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Subject: Re: [PATCH v1 09/14] xen/riscv: aplic_init() implementation
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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References: 
 <1d023045be49ae93d41d552f9c9a79972fa4e84b.1744126720.git.oleksii.kurochko@gmail.com>
 
 
 
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From: Oleksii Kurochko 
In-Reply-To: 

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On 4/16/25 12:30 PM, Jan Beulich wrote:
> On 16.04.2025 12:15, Oleksii Kurochko wrote:
>> On 4/14/25 12:04 PM, Jan Beulich wrote:
>>> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>>>> +    rc = dt_property_read_u32(node, "msi-parent", &imsic_phandle);
>>>> +    if ( !rc )
>>>> +        panic("%s: IDC mode not supported\n", node->full_name);
>>>> +
>>>> +    imsic_node = dt_find_node_by_phandle(imsic_phandle);
>>>> +    if ( !imsic_node )
>>>> +        panic("%s: unable to find IMSIC node\n", node->full_name);
>>>> +
>>>> +    /* check imsic mode */
>>>> +    rc = dt_property_read_u32_array(imsic_node, "interrupts-extended",
>>>> +                                    irq_range, ARRAY_SIZE(irq_range));
>>>> +    if ( rc && (rc != -EOVERFLOW) )
>>>> +        panic("%s: unable to find interrupt-extended in %s node\n",
>>>> +               node->full_name, imsic_node->full_name);
>>> Why exactly is EOVERFLOW tolerable here?
>> QEMU generates two IMSIC device tree nodes: one for M-mode and one for S-mode.
>> For the hypervisor, we don’t really care about the M-mode IMSIC node — we're only
>> interested in the S-mode IMSIC node.
>>
>> The IMSIC node includes this information in the|"interrupts-extended"| property,
>> which has the following format:
>>     interrupt-extended = {, },...
>> The number of such|| pairs depends on the number of CPUs the platform has.
>>
>> For our purposes, to determine whether the IMSIC node corresponds to M-mode or not, it’s sufficient to read only the first pair and check the mode like this:
>>
>>     if ( irq_range[1] == IRQ_M_EXT )
>>
>> Thereby dt_property_read_u32_array() will return -EOVERFLOW in the case when a platfrom
>> has more then one CPU as we passed irq_range[2] as an argument but the amount of values
>> in "interrupts-extended" property will be (2 * CPUS_NUM).
>>
>> I can update the comment above dt_property_read_u32_array() for more clearness.
> Yet my question remains: Why would it be okay to ignore the remaining entries,
> and hence accept -EOVERFLOW as kind-of-success?

Because for other entries the IMSIC mode will be the same and the difference will be only in
interrupt controller's phandle which we don't care about in this function and cares only about
in imisic_init(), look at usage of imsic_get_parent_hartid().

>
>>>> +    aplic.regs = ioremap(paddr, size);
>>>> +    if ( !aplic.regs )
>>>> +        panic("%s: unable to map\n", node->full_name);
>>>> +
>>>> +    /* Setup initial state APLIC interrupts */
>>>> +    aplic_init_hw_interrupts();
>>>> +
>>>> +    return 0;
>>>> +}
>>>> +
>>>> +static const struct intc_hw_operations __ro_after_init aplic_ops = {
>>> const or __ro_after_init?
>> What’s wrong with using both?|const| ensures the variable can't be changed at compile time,
>> while|__ro_after_init| makes it read-only at runtime after initialization is complete.
> No, const makes it read-only at compile- and run-time.__ro_after_init,
> putting the item into a special section, makes it writable at init-time.
> Due to the const, the compiler wouldn't emit any writes. But we can
> also avoid stray writes by having the item live in .rodata.

Oh, right, `const` will add the variable to .rodata.
Then I think it is enough to have `const` as aplic_ops is going to be initialized once and
then only read will happen.

>
>> Probably,|__initconst| would be a better fit:
>>     static const struct intc_hw_operations __initconst aplic_ops = {
>>
>> Or even|__initconstrel|, since the|struct intc_hw_operations| contains pointers.
> Well, if this variable isn't accessed post-init, sure. That seems pretty
> unlikely though, considering it contains pointers to hook functions.

Sure, .init section is going to be freed after init-time.

~ Oleksii


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On 4/16/25 12:30 PM, Jan Beulich wrote:

    

    

      
On 16.04.2025 12:15, Oleksii Kurochko wrote:


      

        
On 4/14/25 12:04 PM, Jan Beulich wrote:


        

          
On 08.04.2025 17:57, Oleksii Kurochko wrote:


          

            
+    rc = dt_property_read_u32(node, "msi-parent", &imsic_phandle);
+    if ( !rc )
+        panic("%s: IDC mode not supported\n", node->full_name);
+
+    imsic_node = dt_find_node_by_phandle(imsic_phandle);
+    if ( !imsic_node )
+        panic("%s: unable to find IMSIC node\n", node->full_name);
+
+    /* check imsic mode */
+    rc = dt_property_read_u32_array(imsic_node, "interrupts-extended",
+                                    irq_range, ARRAY_SIZE(irq_range));
+    if ( rc && (rc != -EOVERFLOW) )
+        panic("%s: unable to find interrupt-extended in %s node\n",
+               node->full_name, imsic_node->full_name);


          

          
Why exactly is EOVERFLOW tolerable here?


        

        
QEMU generates two IMSIC device tree nodes: one for M-mode and one for S-mode.
For the hypervisor, we don’t really care about the M-mode IMSIC node — we're only
interested in the S-mode IMSIC node.

The IMSIC node includes this information in the|"interrupts-extended"| property,
which has the following format:
   interrupt-extended = {<interrupt-controller-phandle>, <machine_mode>},...
The number of such|<phandle, mode>| pairs depends on the number of CPUs the platform has.

For our purposes, to determine whether the IMSIC node corresponds to M-mode or not, it’s sufficient to read only the first pair and check the mode like this:

   if ( irq_range[1] == IRQ_M_EXT )

Thereby dt_property_read_u32_array() will return -EOVERFLOW in the case when a platfrom
has more then one CPU as we passed irq_range[2] as an argument but the amount of values
in "interrupts-extended" property will be (2 * CPUS_NUM).

I can update the comment above dt_property_read_u32_array() for more clearness.


      

      
Yet my question remains: Why would it be okay to ignore the remaining entries,
and hence accept -EOVERFLOW as kind-of-success?

    

    
Because for other entries the IMSIC mode will be the same and the difference will be only in
interrupt controller's phandle which we don't care about in this function and cares only about
in imisic_init(), look at usage of imsic_get_parent_hartid().



    

      



      

        

          

            
+    aplic.regs = ioremap(paddr, size);
+    if ( !aplic.regs )
+        panic("%s: unable to map\n", node->full_name);
+
+    /* Setup initial state APLIC interrupts */
+    aplic_init_hw_interrupts();
+
+    return 0;
+}
+
+static const struct intc_hw_operations __ro_after_init aplic_ops = {


          

          
const or __ro_after_init?


        

        
What’s wrong with using both?|const| ensures the variable can't be changed at compile time,
while|__ro_after_init| makes it read-only at runtime after initialization is complete.


      

      
No, const makes it read-only at compile- and run-time.__ro_after_init,
putting the item into a special section, makes it writable at init-time.
Due to the const, the compiler wouldn't emit any writes. But we can
also avoid stray writes by having the item live in .rodata.

    

    
Oh, right, `const` will add the variable to .rodata.
Then I think it is enough to have `const` as aplic_ops is going to be initialized once and
then only read will happen.



    

      



      

        
Probably,|__initconst| would be a better fit:
   static const struct intc_hw_operations __initconst aplic_ops = {

Or even|__initconstrel|, since the|struct intc_hw_operations| contains pointers.


      

      
Well, if this variable isn't accessed post-init, sure. That seems pretty
unlikely though, considering it contains pointers to hook functions.

    

    
Sure, .init section is going to be freed after init-time.

~ Oleksii

    

  


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Message-ID: <8b87f6c4-ebc7-4d13-8fe6-a56df6b76523@suse.com>
Date: Thu, 17 Apr 2025 17:22:46 +0200
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v4 07/15] xen/cpufreq: fix core frequency calculation for
 AMD Family 1Ah CPUs
To: Penny Zheng 
Cc: ray.huang@amd.com, Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 xen-devel@lists.xenproject.org
References: <20250414074056.3696888-1-Penny.Zheng@amd.com>
 <20250414074056.3696888-8-Penny.Zheng@amd.com>
Content-Language: en-US
From: Jan Beulich 
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In-Reply-To: <20250414074056.3696888-8-Penny.Zheng@amd.com>
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 7bit

On 14.04.2025 09:40, Penny Zheng wrote:
> AMD Family 1Ah CPU needs a different COF(Core Operating Frequency) formula,
> due to a change in the PStateDef MSR layout in AMD Family 1Ah.
> In AMD Family 1Ah, Core current operating frequency in MHz is calculated as
> follows:
>     CoreCOF = Core::X86::Msr::PStateDef[CpuFid[11:0]] * 5MHz
> 
> We introduce a helper amd_parse_freq() to parse cpu min/nominal/max core
> frequency from PstateDef register, to replace the original macro FREQ(v).
> amd_parse_freq() is declared as const, as it mainly consists of mathematical
> conputation.
> 
> Signed-off-by: Penny Zheng 

As to the title: I don't think "fix" is appropriate here. Or else I'd expect
a Fixes: tag to be there, which I think would be hard for you to fish out
(as the earlier changes here weren't broken; information on Fam1A simply
wasn't available at the time).

> --- a/xen/arch/x86/cpu/amd.c
> +++ b/xen/arch/x86/cpu/amd.c
> @@ -56,6 +56,9 @@ bool __initdata amd_virt_spec_ctrl;
>  
>  static bool __read_mostly fam17_c6_disabled;
>  
> +static uint64_t attr_const amd_parse_freq(unsigned char c, uint64_t value);

Why is this declaration needed?

> +#define INVAL_FREQ_MHZ  ~(uint64_t)0

This may want to move down, ahead of the function. And the expansion wants
to be wrapped in parentheses.

> @@ -570,12 +573,35 @@ static void amd_get_topology(struct cpuinfo_x86 *c)
>                                                            : c->cpu_core_id);
>  }
>  
> +static uint64_t amd_parse_freq(unsigned char c, uint64_t value)

Considering how it's used, does "value" need to be any wider than unsigned
int? What about the return type?

I also think the first argument would better be unsigned int, and would
better be named e.g. "family".

> +{
> +	uint64_t freq = INVAL_FREQ_MHZ;
> +
> +	switch (c) {
> +	case 0x10 ... 0x16:
> +		freq = (((value & 0x3f) + 0x10) * 100) >> ((value >> 6) & 7);
> +		break;
> +	case 0x17 ... 0x19:
> +		freq = ((value & 0xff) * 25 * 8) / ((value >> 8) & 0x3f);
> +		break;
> +	case 0x1A:
> +		freq = (value & 0xfff) * 5;
> +		break;
> +	default:

Nit: Blank lines please between non-fall-through case blocks.

> +		printk(XENLOG_ERR
> +		       "Unsupported cpu familly %c on cpufreq parsing", c);

Nit: family

Jan


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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Julien Grall ,
	Stefano Stabellini 
Subject: [PATCH v3 1/4] xen/io: provide helpers for multi size MMIO accesses
Date: Thu, 17 Apr 2025 17:25:11 +0200
Message-ID: <20250417152514.13702-2-roger.pau@citrix.com>
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Several handlers have the same necessity of reading or writing from or to
an MMIO region using 1, 2, 4 or 8 bytes accesses.  So far this has been
open-coded in the function itself.  Instead provide a new set of handlers
that encapsulate the accesses.

Since the added helpers are not architecture specific, introduce a new
generic io.h header.

No functional change intended.

Signed-off-by: Roger Pau Monné 
---
Changes since v2:
 - Keep error message when handling non-allowed access sizes.

Changes since v1:
 - Limit {read,write}q() to 64bit architectures.
 - Always have a default case in switch statement.
---
 xen/arch/x86/hvm/vmsi.c | 47 ++-------------------------
 xen/arch/x86/mm.c       | 30 +++++-------------
 xen/drivers/vpci/msix.c | 47 ++-------------------------
 xen/include/xen/io.h    | 70 +++++++++++++++++++++++++++++++++++++++++
 4 files changed, 83 insertions(+), 111 deletions(-)
 create mode 100644 xen/include/xen/io.h

diff --git a/xen/arch/x86/hvm/vmsi.c b/xen/arch/x86/hvm/vmsi.c
index fd83abb929ec..61b89834d97d 100644
--- a/xen/arch/x86/hvm/vmsi.c
+++ b/xen/arch/x86/hvm/vmsi.c
@@ -24,6 +24,7 @@
  * Will be merged it with virtual IOAPIC logic, since most is the same
 */
 
+#include 
 #include 
 #include 
 #include 
@@ -304,28 +305,7 @@ static void adjacent_read(
 
     hwaddr = fix_to_virt(fixmap_idx) + PAGE_OFFSET(address);
 
-    switch ( len )
-    {
-    case 1:
-        *pval = readb(hwaddr);
-        break;
-
-    case 2:
-        *pval = readw(hwaddr);
-        break;
-
-    case 4:
-        *pval = readl(hwaddr);
-        break;
-
-    case 8:
-        *pval = readq(hwaddr);
-        break;
-
-    default:
-        ASSERT_UNREACHABLE();
-        break;
-    }
+    *pval = read_mmio(hwaddr, len);
 }
 
 static void adjacent_write(
@@ -344,28 +324,7 @@ static void adjacent_write(
 
     hwaddr = fix_to_virt(fixmap_idx) + PAGE_OFFSET(address);
 
-    switch ( len )
-    {
-    case 1:
-        writeb(val, hwaddr);
-        break;
-
-    case 2:
-        writew(val, hwaddr);
-        break;
-
-    case 4:
-        writel(val, hwaddr);
-        break;
-
-    case 8:
-        writeq(val, hwaddr);
-        break;
-
-    default:
-        ASSERT_UNREACHABLE();
-        break;
-    }
+    write_mmio(hwaddr, val, len);
 }
 
 static int cf_check msixtbl_read(
diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 1cf236516789..8baac132b484 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -95,6 +95,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -116,7 +117,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -5102,7 +5102,7 @@ static void __iomem *subpage_mmio_map_page(
 static void subpage_mmio_write_emulate(
     mfn_t mfn,
     unsigned int offset,
-    const void *data,
+    unsigned long data,
     unsigned int len)
 {
     struct subpage_ro_range *entry;
@@ -5131,26 +5131,8 @@ static void subpage_mmio_write_emulate(
         return;
     }
 
-    addr += offset;
-    switch ( len )
-    {
-    case 1:
-        writeb(*(const uint8_t*)data, addr);
-        break;
-    case 2:
-        writew(*(const uint16_t*)data, addr);
-        break;
-    case 4:
-        writel(*(const uint32_t*)data, addr);
-        break;
-    case 8:
-        writeq(*(const uint64_t*)data, addr);
-        break;
-    default:
-        /* mmio_ro_emulated_write() already validated the size */
-        ASSERT_UNREACHABLE();
+    if ( !write_mmio(addr + offset, data, len) )
         goto write_ignored;
-    }
 }
 
 #ifdef CONFIG_HVM
@@ -5185,18 +5167,20 @@ int cf_check mmio_ro_emulated_write(
     struct x86_emulate_ctxt *ctxt)
 {
     struct mmio_ro_emulate_ctxt *mmio_ro_ctxt = ctxt->data;
+    unsigned long data = 0;
 
     /* Only allow naturally-aligned stores at the original %cr2 address. */
     if ( ((bytes | offset) & (bytes - 1)) || !bytes ||
-         offset != mmio_ro_ctxt->cr2 )
+         offset != mmio_ro_ctxt->cr2 || bytes > sizeof(data) )
     {
         gdprintk(XENLOG_WARNING, "bad access (cr2=%lx, addr=%lx, bytes=%u)\n",
                 mmio_ro_ctxt->cr2, offset, bytes);
         return X86EMUL_UNHANDLEABLE;
     }
 
+    memcpy(&data, p_data, bytes);
     subpage_mmio_write_emulate(mmio_ro_ctxt->mfn, PAGE_OFFSET(offset),
-                               p_data, bytes);
+                               data, bytes);
 
     return X86EMUL_OKAY;
 }
diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c
index 6bd8c55bb48e..6455f2a03a01 100644
--- a/xen/drivers/vpci/msix.c
+++ b/xen/drivers/vpci/msix.c
@@ -17,6 +17,7 @@
  * License along with this program; If not, see .
  */
 
+#include 
 #include 
 #include 
 
@@ -344,28 +345,7 @@ static int adjacent_read(const struct domain *d, const struct vpci_msix *msix,
         return X86EMUL_OKAY;
     }
 
-    switch ( len )
-    {
-    case 1:
-        *data = readb(mem + PAGE_OFFSET(addr));
-        break;
-
-    case 2:
-        *data = readw(mem + PAGE_OFFSET(addr));
-        break;
-
-    case 4:
-        *data = readl(mem + PAGE_OFFSET(addr));
-        break;
-
-    case 8:
-        *data = readq(mem + PAGE_OFFSET(addr));
-        break;
-
-    default:
-        ASSERT_UNREACHABLE();
-        break;
-    }
+    *data = read_mmio(mem + PAGE_OFFSET(addr), len);
     spin_unlock(&vpci->lock);
 
     return X86EMUL_OKAY;
@@ -493,28 +473,7 @@ static int adjacent_write(const struct domain *d, const struct vpci_msix *msix,
         return X86EMUL_OKAY;
     }
 
-    switch ( len )
-    {
-    case 1:
-        writeb(data, mem + PAGE_OFFSET(addr));
-        break;
-
-    case 2:
-        writew(data, mem + PAGE_OFFSET(addr));
-        break;
-
-    case 4:
-        writel(data, mem + PAGE_OFFSET(addr));
-        break;
-
-    case 8:
-        writeq(data, mem + PAGE_OFFSET(addr));
-        break;
-
-    default:
-        ASSERT_UNREACHABLE();
-        break;
-    }
+    write_mmio(mem + PAGE_OFFSET(addr), data, len);
     spin_unlock(&vpci->lock);
 
     return X86EMUL_OKAY;
diff --git a/xen/include/xen/io.h b/xen/include/xen/io.h
new file mode 100644
index 000000000000..164a20c5d7b5
--- /dev/null
+++ b/xen/include/xen/io.h
@@ -0,0 +1,70 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * IO related routines.
+ *
+ * Copyright (c) 2025 Cloud Software Group
+ */
+#ifndef XEN_IO_H
+#define XEN_IO_H
+
+#include 
+
+#include 
+
+static inline unsigned long read_mmio(const volatile void __iomem *mem,
+                                      unsigned int size)
+{
+    switch ( size )
+    {
+    case 1:
+        return readb(mem);
+
+    case 2:
+        return readw(mem);
+
+    case 4:
+        return readl(mem);
+
+#ifdef CONFIG_64BIT
+    case 8:
+        return readq(mem);
+#endif
+
+    default:
+        ASSERT_UNREACHABLE();
+        return ~0UL;
+    }
+}
+
+static inline bool write_mmio(volatile void __iomem *mem, unsigned long data,
+                              unsigned int size)
+{
+    switch ( size )
+    {
+    case 1:
+        writeb(data, mem);
+        break;
+
+    case 2:
+        writew(data, mem);
+        break;
+
+    case 4:
+        writel(data, mem);
+        break;
+
+#ifdef CONFIG_64BIT
+    case 8:
+        writeq(data, mem);
+        break;
+#endif
+
+    default:
+        ASSERT_UNREACHABLE();
+        return false;
+    }
+
+    return true;
+}
+
+#endif /* XEN_IO_H */
-- 
2.48.1



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper 
Subject: [PATCH v3 3/4] x86/hvm: only register the r/o subpage ops when needed
Date: Thu, 17 Apr 2025 17:25:13 +0200
Message-ID: <20250417152514.13702-4-roger.pau@citrix.com>
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MMIO operation handlers can be expensive to process, hence attempt to
register only those that will be needed by the domain.

Subpage r/o MMIO regions are added exclusively at boot, further limit their
addition to strictly before the initial domain gets created, so by the time
initial domain creation happens Xen knows whether subpage is required or
not.  This allows only registering the MMIO handler when there are
subpage regions to handle.

Signed-off-by: Roger Pau Monné 
Reviewed-by: Jan Beulich 
---
Could possibly be part of the previous patch, but strictly speaking is an
improvement, as even before the previous patch subpage r/o was always
called even when no subpage regions are registered.
---
 xen/arch/x86/hvm/hvm.c        |  3 ++-
 xen/arch/x86/include/asm/mm.h |  1 +
 xen/arch/x86/mm.c             | 16 ++++++++++++++++
 3 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index 6b998387e3d8..4cb2e13046d1 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -692,7 +692,8 @@ int hvm_domain_initialise(struct domain *d,
 
     register_portio_handler(d, XEN_HVM_DEBUGCONS_IOPORT, 1, hvm_print_line);
 
-    register_subpage_ro_handler(d);
+    if ( subpage_ro_active() )
+        register_subpage_ro_handler(d);
 
     if ( hvm_tsc_scaling_supported )
         d->arch.hvm.tsc_scaling_ratio = hvm_default_tsc_scaling_ratio;
diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h
index c2e9ef6e5023..aeb8ebcf2d56 100644
--- a/xen/arch/x86/include/asm/mm.h
+++ b/xen/arch/x86/include/asm/mm.h
@@ -561,6 +561,7 @@ struct subpage_ro_range {
     void __iomem *mapped;
     DECLARE_BITMAP(ro_elems, PAGE_SIZE / MMIO_RO_SUBPAGE_GRAN);
 };
+bool subpage_ro_active(void);
 struct subpage_ro_range *subpage_mmio_find_page(mfn_t mfn);
 void __iomem *subpage_mmio_map_page(struct subpage_ro_range *entry);
 void subpage_mmio_write_emulate(
diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 927beb6f07aa..0e29bab03a95 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -4922,6 +4922,11 @@ long arch_memory_op(unsigned long cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
     return rc;
 }
 
+bool subpage_ro_active(void)
+{
+    return !list_empty(&subpage_ro_ranges);
+}
+
 struct subpage_ro_range *subpage_mmio_find_page(mfn_t mfn)
 {
     struct subpage_ro_range *entry;
@@ -5011,6 +5016,17 @@ int __init subpage_mmio_ro_add(
          !IS_ALIGNED(size, MMIO_RO_SUBPAGE_GRAN) )
         return -EINVAL;
 
+    /*
+     * Force all r/o subregions to be registered before initial domain
+     * creation, so that the emulation handlers can be added only when there
+     * are pages registered.
+     */
+    if ( system_state >= SYS_STATE_smp_boot )
+    {
+        ASSERT_UNREACHABLE();
+        return -EILSEQ;
+    }
+
     if ( !size )
         return 0;
 
-- 
2.48.1



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        Thu, 17 Apr 2025 08:26:39 -0700 (PDT)
From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper 
Subject: [PATCH v3 4/4] x86/mm: move mmio_ro_emulated_write() to PV only file
Date: Thu, 17 Apr 2025 17:25:14 +0200
Message-ID: <20250417152514.13702-5-roger.pau@citrix.com>
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mmio_ro_emulated_write() is only used in pv/ro-page-fault.c, move the
function to that file and make it static.

No functional change intended.

Signed-off-by: Roger Pau Monné 
Reviewed-by: Jan Beulich 
---
 xen/arch/x86/include/asm/mm.h   | 12 ------------
 xen/arch/x86/mm.c               | 26 -------------------------
 xen/arch/x86/pv/ro-page-fault.c | 34 +++++++++++++++++++++++++++++++++
 3 files changed, 34 insertions(+), 38 deletions(-)

diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h
index aeb8ebcf2d56..2665daa6f74f 100644
--- a/xen/arch/x86/include/asm/mm.h
+++ b/xen/arch/x86/include/asm/mm.h
@@ -542,18 +542,6 @@ void memguard_unguard_stack(void *p);
 int subpage_mmio_ro_add(paddr_t start, size_t size);
 bool subpage_mmio_write_accept(mfn_t mfn, unsigned long gla);
 
-struct mmio_ro_emulate_ctxt {
-        unsigned long cr2;
-        /* Used only for mmcfg case */
-        unsigned int seg, bdf;
-        /* Used only for non-mmcfg case */
-        mfn_t mfn;
-};
-
-int cf_check mmio_ro_emulated_write(
-    enum x86_segment seg, unsigned long offset, void *p_data,
-    unsigned int bytes, struct x86_emulate_ctxt *ctxt);
-
 /* r/o MMIO subpage access handlers. */
 struct subpage_ro_range {
     struct list_head list;
diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 0e29bab03a95..9ac855f998dc 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -5144,32 +5144,6 @@ void subpage_mmio_write_emulate(
         goto write_ignored;
 }
 
-int cf_check mmio_ro_emulated_write(
-    enum x86_segment seg,
-    unsigned long offset,
-    void *p_data,
-    unsigned int bytes,
-    struct x86_emulate_ctxt *ctxt)
-{
-    struct mmio_ro_emulate_ctxt *mmio_ro_ctxt = ctxt->data;
-    unsigned long data = 0;
-
-    /* Only allow naturally-aligned stores at the original %cr2 address. */
-    if ( ((bytes | offset) & (bytes - 1)) || !bytes ||
-         offset != mmio_ro_ctxt->cr2 || bytes > sizeof(data) )
-    {
-        gdprintk(XENLOG_WARNING, "bad access (cr2=%lx, addr=%lx, bytes=%u)\n",
-                mmio_ro_ctxt->cr2, offset, bytes);
-        return X86EMUL_UNHANDLEABLE;
-    }
-
-    memcpy(&data, p_data, bytes);
-    subpage_mmio_write_emulate(mmio_ro_ctxt->mfn, PAGE_OFFSET(offset),
-                               data, bytes);
-
-    return X86EMUL_OKAY;
-}
-
 /*
  * For these PTE APIs, the caller must follow the alloc-map-unmap-free
  * lifecycle, which means explicitly mapping the PTE pages before accessing
diff --git a/xen/arch/x86/pv/ro-page-fault.c b/xen/arch/x86/pv/ro-page-fault.c
index 11b01c479e43..3dd795288379 100644
--- a/xen/arch/x86/pv/ro-page-fault.c
+++ b/xen/arch/x86/pv/ro-page-fault.c
@@ -298,6 +298,14 @@ static int ptwr_do_page_fault(struct x86_emulate_ctxt *ctxt,
  * fault handling for read-only MMIO pages
  */
 
+struct mmio_ro_emulate_ctxt {
+    unsigned long cr2;
+    /* Used only for mmcfg case */
+    unsigned int seg, bdf;
+    /* Used only for non-mmcfg case */
+    mfn_t mfn;
+};
+
 static int cf_check mmcfg_intercept_write(
     enum x86_segment seg,
     unsigned long offset,
@@ -329,6 +337,32 @@ static int cf_check mmcfg_intercept_write(
     return X86EMUL_OKAY;
 }
 
+static int cf_check mmio_ro_emulated_write(
+    enum x86_segment seg,
+    unsigned long offset,
+    void *p_data,
+    unsigned int bytes,
+    struct x86_emulate_ctxt *ctxt)
+{
+    struct mmio_ro_emulate_ctxt *mmio_ro_ctxt = ctxt->data;
+    unsigned long data = 0;
+
+    /* Only allow naturally-aligned stores at the original %cr2 address. */
+    if ( ((bytes | offset) & (bytes - 1)) || !bytes ||
+         offset != mmio_ro_ctxt->cr2 || bytes > sizeof(data) )
+    {
+        gdprintk(XENLOG_WARNING, "bad access (cr2=%lx, addr=%lx, bytes=%u)\n",
+                mmio_ro_ctxt->cr2, offset, bytes);
+        return X86EMUL_UNHANDLEABLE;
+    }
+
+    memcpy(&data, p_data, bytes);
+    subpage_mmio_write_emulate(mmio_ro_ctxt->mfn, PAGE_OFFSET(offset),
+                               data, bytes);
+
+    return X86EMUL_OKAY;
+}
+
 static const struct x86_emulate_ops mmio_ro_emulate_ops = {
     .read       = x86emul_unhandleable_rw,
     .insn_fetch = ptwr_emulated_insn_fetch,
-- 
2.48.1



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Julien Grall ,
	Stefano Stabellini 
Subject: [PATCH v3 0/4] xen/x86: fix implementation of subpage r/o MMIO
Date: Thu, 17 Apr 2025 17:25:10 +0200
Message-ID: <20250417152514.13702-1-roger.pau@citrix.com>
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Hello,

Following series include some bugfixes and improvements to the handling
of subpage r/o MMIO accesses.

Patch 1 introduces a helper to reduce code duplication when performing
MMIO accesses.

Patch 2 is a bugfix for using subpage in HVM guest, and patch 3 is an
optimization to only register the HVM subpage handler when needed.

Finally patch 4 moves some PV only code to a PV specific file.

Thanks, Roger.

Roger Pau Monne (4):
  xen/io: provide helpers for multi size MMIO accesses
  x86/hvm: fix handling of accesses to partial r/o MMIO pages
  x86/hvm: only register the r/o subpage ops when needed
  x86/mm: move mmio_ro_emulated_write() to PV only file

 xen/arch/x86/hvm/Makefile              |   1 +
 xen/arch/x86/hvm/emulate.c             |  54 ++---------
 xen/arch/x86/hvm/hvm.c                 |  18 ++--
 xen/arch/x86/hvm/mmio.c                | 125 +++++++++++++++++++++++++
 xen/arch/x86/hvm/vmsi.c                |  47 +---------
 xen/arch/x86/include/asm/hvm/emulate.h |   1 -
 xen/arch/x86/include/asm/hvm/io.h      |   3 +
 xen/arch/x86/include/asm/mm.h          |  21 +++--
 xen/arch/x86/mm.c                      | 101 +++++---------------
 xen/arch/x86/pv/ro-page-fault.c        |  34 +++++++
 xen/drivers/vpci/msix.c                |  47 +---------
 xen/include/xen/io.h                   |  70 ++++++++++++++
 12 files changed, 289 insertions(+), 233 deletions(-)
 create mode 100644 xen/arch/x86/hvm/mmio.c
 create mode 100644 xen/include/xen/io.h

-- 
2.48.1



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper 
Subject: [PATCH v3 2/4] x86/hvm: fix handling of accesses to partial r/o MMIO pages
Date: Thu, 17 Apr 2025 17:25:12 +0200
Message-ID: <20250417152514.13702-3-roger.pau@citrix.com>
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The current logic to handle accesses to MMIO pages partially read-only is
based on the (now removed) logic used to handle accesses to the r/o MMCFG
region(s) for PVH v1 dom0.  However that has issues when running on AMD
hardware, as in that case the guest linear address that triggered the fault
is not provided as part of the VM exit.  This caused
mmio_ro_emulated_write() to always fail before calling
subpage_mmio_write_emulate() when running on AMD and called from an HVM
context.

Take a different approach and convert the handling of partial read-only
MMIO page accesses into an HVM MMIO ops handler, as that's the more natural
way to handle this kind of emulation for HVM domains.

This allows getting rid of hvm_emulate_one_mmio() and it's single call site
in hvm_hap_nested_page_fault().  As part of the fix r/o MMIO accesses are
now handled by handle_mmio_with_translation(), re-using the same logic that
was used for other read-only types part of p2m_is_discard_write().  The
usage of emulation for faulting p2m_mmio_direct types is limited to
addresses in the r/o MMIO range. The page present check is dropped as type
p2m_mmio_direct must have the present bit set in the PTE.

Note a small adjustment is needed to the `pf-fixup` dom0 PVH logic: avoid
attempting to fixup faults resulting from write accesses to read-only MMIO
regions, as handling of those accesses is now done by handle_mmio().

Fixes: 33c19df9a5a0 ('x86/PCI: intercept accesses to RO MMIO from dom0s in HVM containers')
Signed-off-by: Roger Pau Monné 
---
Changes since v2:
 - Attempt to fixup read access to r/o MMIO regions for dom0 PVH.
 - Use PFN_DOWN() with get_gfn_query().
 - Reject unaligned accesses.
 - Add comment about the need to handle reads.

Changes since v1:
 - Introduce hvm/mmio.c to place the r/o MMIO handlers.
 - Add comment about pf-fixup and r/o MMIO range checking.
 - Expand commit message about dropping the PTE present check and usage of
   the emulator.
 - Return X86EMUL_OKAY in the read handler if the MMIO region is not found.
 - Check the faulting address is in the mmio_ro_ranges before sending for
   emulation.
---
 xen/arch/x86/hvm/Makefile              |   1 +
 xen/arch/x86/hvm/emulate.c             |  54 ++---------
 xen/arch/x86/hvm/hvm.c                 |  17 ++--
 xen/arch/x86/hvm/mmio.c                | 125 +++++++++++++++++++++++++
 xen/arch/x86/include/asm/hvm/emulate.h |   1 -
 xen/arch/x86/include/asm/hvm/io.h      |   3 +
 xen/arch/x86/include/asm/mm.h          |  12 +++
 xen/arch/x86/mm.c                      |  37 +-------
 8 files changed, 160 insertions(+), 90 deletions(-)
 create mode 100644 xen/arch/x86/hvm/mmio.c

diff --git a/xen/arch/x86/hvm/Makefile b/xen/arch/x86/hvm/Makefile
index 4c1fa5c6c2bf..6ec2c8f2db56 100644
--- a/xen/arch/x86/hvm/Makefile
+++ b/xen/arch/x86/hvm/Makefile
@@ -15,6 +15,7 @@ obj-y += intercept.o
 obj-y += io.o
 obj-y += ioreq.o
 obj-y += irq.o
+obj-y += mmio.o
 obj-y += monitor.o
 obj-y += mtrr.o
 obj-y += nestedhvm.o
diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c
index 79c180b408ac..65b41b964df0 100644
--- a/xen/arch/x86/hvm/emulate.c
+++ b/xen/arch/x86/hvm/emulate.c
@@ -370,7 +370,15 @@ static int hvmemul_do_io(
         /* If there is no suitable backing DM, just ignore accesses */
         if ( !s )
         {
-            if ( is_mmio && is_hardware_domain(currd) )
+            if ( is_mmio && is_hardware_domain(currd) &&
+                 /*
+                  * Do not attempt to fixup write accesses to r/o MMIO regions,
+                  * they are expected to be terminated by the null handler
+                  * below.
+                  */
+                 (!rangeset_contains_singleton(mmio_ro_ranges,
+                                               PFN_DOWN(addr)) ||
+                  dir == IOREQ_READ) )
             {
                 /*
                  * PVH dom0 is likely missing MMIO mappings on the p2m, due to
@@ -2859,50 +2867,6 @@ int hvm_emulate_one(
     return _hvm_emulate_one(hvmemul_ctxt, &hvm_emulate_ops, completion);
 }
 
-int hvm_emulate_one_mmio(unsigned long mfn, unsigned long gla)
-{
-    static const struct x86_emulate_ops hvm_ro_emulate_ops_mmio = {
-        .read       = x86emul_unhandleable_rw,
-        .insn_fetch = hvmemul_insn_fetch,
-        .write      = mmio_ro_emulated_write,
-        .validate   = hvmemul_validate,
-    };
-    struct mmio_ro_emulate_ctxt mmio_ro_ctxt = { .cr2 = gla, .mfn = _mfn(mfn) };
-    struct hvm_emulate_ctxt ctxt;
-    unsigned int seg, bdf;
-    int rc;
-
-    if ( pci_ro_mmcfg_decode(mfn, &seg, &bdf) )
-    {
-        /* Should be always handled by vPCI for PVH dom0. */
-        gdprintk(XENLOG_ERR, "unhandled MMCFG access for %pp\n",
-                 &PCI_SBDF(seg, bdf));
-        ASSERT_UNREACHABLE();
-        return X86EMUL_UNHANDLEABLE;
-    }
-
-    hvm_emulate_init_once(&ctxt, x86_insn_is_mem_write,
-                          guest_cpu_user_regs());
-    ctxt.ctxt.data = &mmio_ro_ctxt;
-
-    switch ( rc = _hvm_emulate_one(&ctxt, &hvm_ro_emulate_ops_mmio,
-                                   VIO_no_completion) )
-    {
-    case X86EMUL_UNHANDLEABLE:
-    case X86EMUL_UNIMPLEMENTED:
-        hvm_dump_emulation_state(XENLOG_G_WARNING, "r/o MMIO", &ctxt, rc);
-        break;
-    case X86EMUL_EXCEPTION:
-        hvm_inject_event(&ctxt.ctxt.event);
-        /* fallthrough */
-    default:
-        hvm_emulate_writeback(&ctxt);
-        break;
-    }
-
-    return rc;
-}
-
 void hvm_emulate_one_vm_event(enum emul_kind kind, unsigned int trapnr,
     unsigned int errcode)
 {
diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index 6f1174c5127e..6b998387e3d8 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -8,6 +8,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -35,7 +36,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -692,6 +692,8 @@ int hvm_domain_initialise(struct domain *d,
 
     register_portio_handler(d, XEN_HVM_DEBUGCONS_IOPORT, 1, hvm_print_line);
 
+    register_subpage_ro_handler(d);
+
     if ( hvm_tsc_scaling_supported )
         d->arch.hvm.tsc_scaling_ratio = hvm_default_tsc_scaling_ratio;
 
@@ -1981,7 +1983,10 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned long gla,
      */
     if ( (p2mt == p2m_mmio_dm) ||
          (npfec.write_access &&
-          (p2m_is_discard_write(p2mt) || (p2mt == p2m_ioreq_server))) )
+          (p2m_is_discard_write(p2mt) || (p2mt == p2m_ioreq_server) ||
+           /* MMIO entries can be r/o if the target mfn is in mmio_ro_ranges. */
+           (p2mt == p2m_mmio_direct &&
+            rangeset_contains_singleton(mmio_ro_ranges, mfn_x(mfn))))) )
     {
         if ( !handle_mmio_with_translation(gla, gfn, npfec) )
             hvm_inject_hw_exception(X86_EXC_GP, 0);
@@ -2033,14 +2038,6 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned long gla,
         goto out_put_gfn;
     }
 
-    if ( (p2mt == p2m_mmio_direct) && npfec.write_access && npfec.present &&
-         (is_hardware_domain(currd) || subpage_mmio_write_accept(mfn, gla)) &&
-         (hvm_emulate_one_mmio(mfn_x(mfn), gla) == X86EMUL_OKAY) )
-    {
-        rc = 1;
-        goto out_put_gfn;
-    }
-
     /* If we fell through, the vcpu will retry now that access restrictions have
      * been removed. It may fault again if the p2m entry type still requires so.
      * Otherwise, this is an error condition. */
diff --git a/xen/arch/x86/hvm/mmio.c b/xen/arch/x86/hvm/mmio.c
new file mode 100644
index 000000000000..88e9d0c65d89
--- /dev/null
+++ b/xen/arch/x86/hvm/mmio.c
@@ -0,0 +1,125 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * MMIO related routines.
+ *
+ * Copyright (c) 2025 Cloud Software Group
+ */
+
+#include 
+#include 
+
+#include 
+
+static int cf_check subpage_mmio_accept(struct vcpu *v, unsigned long addr)
+{
+    p2m_type_t t;
+    mfn_t mfn = get_gfn_query_unlocked(v->domain, PFN_DOWN(addr), &t);
+
+    return !mfn_eq(mfn, INVALID_MFN) && t == p2m_mmio_direct &&
+           subpage_mmio_find_page(mfn);
+}
+
+/*
+ * The guest has read access to those regions, and consequently read accesses
+ * shouldn't fault.  However read-modify-write operations may take this path,
+ * so handling of reads is necessary.
+ */
+static int cf_check subpage_mmio_read(
+    struct vcpu *v, unsigned long addr, unsigned int len, unsigned long *data)
+{
+    struct domain *d = v->domain;
+    unsigned long gfn = PFN_DOWN(addr);
+    p2m_type_t t;
+    mfn_t mfn;
+    struct subpage_ro_range *entry;
+    volatile void __iomem *mem;
+
+    *data = ~0UL;
+
+    if ( !IS_ALIGNED(len | addr, len) )
+    {
+        gprintk(XENLOG_ERR,
+                "ignoring unaligned read to r/o MMIO subpage %#lx size %u\n",
+                addr, len);
+        return X86EMUL_OKAY;
+    }
+
+    mfn = get_gfn_query(d, gfn, &t);
+    if ( mfn_eq(mfn, INVALID_MFN) || t != p2m_mmio_direct )
+    {
+        put_gfn(d, gfn);
+        return X86EMUL_RETRY;
+    }
+
+    entry = subpage_mmio_find_page(mfn);
+    if ( !entry )
+    {
+        put_gfn(d, gfn);
+        return X86EMUL_OKAY;
+    }
+
+    mem = subpage_mmio_map_page(entry);
+    if ( !mem )
+    {
+        put_gfn(d, gfn);
+        gprintk(XENLOG_ERR,
+                "Failed to map page for MMIO read at %#lx -> %#lx\n",
+                addr, mfn_to_maddr(mfn) + PAGE_OFFSET(addr));
+        return X86EMUL_OKAY;
+    }
+
+    *data = read_mmio(mem + PAGE_OFFSET(addr), len);
+
+    put_gfn(d, gfn);
+    return X86EMUL_OKAY;
+}
+
+static int cf_check subpage_mmio_write(
+    struct vcpu *v, unsigned long addr, unsigned int len, unsigned long data)
+{
+    struct domain *d = v->domain;
+    unsigned long gfn = PFN_DOWN(addr);
+    p2m_type_t t;
+    mfn_t mfn;
+
+    if ( !IS_ALIGNED(len | addr, len) )
+    {
+        gprintk(XENLOG_ERR,
+                "ignoring unaligned write to r/o MMIO subpage %#lx size %u\n",
+                addr, len);
+        return X86EMUL_OKAY;
+    }
+
+    mfn = get_gfn_query(d, gfn, &t);
+    if ( mfn_eq(mfn, INVALID_MFN) || t != p2m_mmio_direct )
+    {
+        put_gfn(d, gfn);
+        return X86EMUL_RETRY;
+    }
+
+    subpage_mmio_write_emulate(mfn, PAGE_OFFSET(addr), data, len);
+
+    put_gfn(d, gfn);
+    return X86EMUL_OKAY;
+}
+
+void register_subpage_ro_handler(struct domain *d)
+{
+    static const struct hvm_mmio_ops subpage_mmio_ops = {
+        .check = subpage_mmio_accept,
+        .read = subpage_mmio_read,
+        .write = subpage_mmio_write,
+    };
+
+    register_mmio_handler(d, &subpage_mmio_ops);
+}
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * tab-width: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/arch/x86/include/asm/hvm/emulate.h b/xen/arch/x86/include/asm/hvm/emulate.h
index c7a2d2a5be4e..178ac32e151f 100644
--- a/xen/arch/x86/include/asm/hvm/emulate.h
+++ b/xen/arch/x86/include/asm/hvm/emulate.h
@@ -86,7 +86,6 @@ void hvmemul_cancel(struct vcpu *v);
 struct segment_register *hvmemul_get_seg_reg(
     enum x86_segment seg,
     struct hvm_emulate_ctxt *hvmemul_ctxt);
-int hvm_emulate_one_mmio(unsigned long mfn, unsigned long gla);
 
 static inline bool handle_mmio(void)
 {
diff --git a/xen/arch/x86/include/asm/hvm/io.h b/xen/arch/x86/include/asm/hvm/io.h
index 565bad300d20..c12f099a037c 100644
--- a/xen/arch/x86/include/asm/hvm/io.h
+++ b/xen/arch/x86/include/asm/hvm/io.h
@@ -135,6 +135,9 @@ void destroy_vpci_mmcfg(struct domain *d);
 /* Remove MMCFG regions from a domain ->iomem_caps. */
 int vpci_mmcfg_deny_access(struct domain *d);
 
+/* r/o MMIO subpage access handler. */
+void register_subpage_ro_handler(struct domain *d);
+
 #endif /* __ASM_X86_HVM_IO_H__ */
 
 
diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h
index a1bc8cc27451..c2e9ef6e5023 100644
--- a/xen/arch/x86/include/asm/mm.h
+++ b/xen/arch/x86/include/asm/mm.h
@@ -554,6 +554,18 @@ int cf_check mmio_ro_emulated_write(
     enum x86_segment seg, unsigned long offset, void *p_data,
     unsigned int bytes, struct x86_emulate_ctxt *ctxt);
 
+/* r/o MMIO subpage access handlers. */
+struct subpage_ro_range {
+    struct list_head list;
+    mfn_t mfn;
+    void __iomem *mapped;
+    DECLARE_BITMAP(ro_elems, PAGE_SIZE / MMIO_RO_SUBPAGE_GRAN);
+};
+struct subpage_ro_range *subpage_mmio_find_page(mfn_t mfn);
+void __iomem *subpage_mmio_map_page(struct subpage_ro_range *entry);
+void subpage_mmio_write_emulate(
+    mfn_t mfn, unsigned int offset, unsigned long data, unsigned int len);
+
 int audit_adjust_pgtables(struct domain *d, int dir, int noisy);
 
 extern int pagefault_by_memadd(unsigned long addr, struct cpu_user_regs *regs);
diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 8baac132b484..927beb6f07aa 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -157,13 +157,6 @@ struct rangeset *__read_mostly mmio_ro_ranges;
 static uint32_t __ro_after_init base_disallow_mask;
 
 /* Handling sub-page read-only MMIO regions */
-struct subpage_ro_range {
-    struct list_head list;
-    mfn_t mfn;
-    void __iomem *mapped;
-    DECLARE_BITMAP(ro_elems, PAGE_SIZE / MMIO_RO_SUBPAGE_GRAN);
-};
-
 static LIST_HEAD_RO_AFTER_INIT(subpage_ro_ranges);
 static DEFINE_SPINLOCK(subpage_ro_lock);
 
@@ -4929,7 +4922,7 @@ long arch_memory_op(unsigned long cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
     return rc;
 }
 
-static struct subpage_ro_range *subpage_mmio_find_page(mfn_t mfn)
+struct subpage_ro_range *subpage_mmio_find_page(mfn_t mfn)
 {
     struct subpage_ro_range *entry;
 
@@ -5074,7 +5067,7 @@ int __init subpage_mmio_ro_add(
     return rc;
 }
 
-static void __iomem *subpage_mmio_map_page(
+void __iomem *subpage_mmio_map_page(
     struct subpage_ro_range *entry)
 {
     void __iomem *mapped_page;
@@ -5099,7 +5092,7 @@ static void __iomem *subpage_mmio_map_page(
     return entry->mapped;
 }
 
-static void subpage_mmio_write_emulate(
+void subpage_mmio_write_emulate(
     mfn_t mfn,
     unsigned int offset,
     unsigned long data,
@@ -5135,30 +5128,6 @@ static void subpage_mmio_write_emulate(
         goto write_ignored;
 }
 
-#ifdef CONFIG_HVM
-bool subpage_mmio_write_accept(mfn_t mfn, unsigned long gla)
-{
-    unsigned int offset = PAGE_OFFSET(gla);
-    const struct subpage_ro_range *entry;
-
-    entry = subpage_mmio_find_page(mfn);
-    if ( !entry )
-        return false;
-
-    if ( !test_bit(offset / MMIO_RO_SUBPAGE_GRAN, entry->ro_elems) )
-    {
-        /*
-         * We don't know the write size at this point yet, so it could be
-         * an unaligned write, but accept it here anyway and deal with it
-         * later.
-         */
-        return true;
-    }
-
-    return false;
-}
-#endif
-
 int cf_check mmio_ro_emulated_write(
     enum x86_segment seg,
     unsigned long offset,
-- 
2.48.1



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Date: Thu, 17 Apr 2025 17:30:39 +0200
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Subject: Re: [PATCH v1 09/14] xen/riscv: aplic_init() implementation
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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References: 
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On 17.04.2025 17:21, Oleksii Kurochko wrote:
> 
> On 4/16/25 12:30 PM, Jan Beulich wrote:
>> On 16.04.2025 12:15, Oleksii Kurochko wrote:
>>> On 4/14/25 12:04 PM, Jan Beulich wrote:
>>>> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>>>>> +    rc = dt_property_read_u32(node, "msi-parent", &imsic_phandle);
>>>>> +    if ( !rc )
>>>>> +        panic("%s: IDC mode not supported\n", node->full_name);
>>>>> +
>>>>> +    imsic_node = dt_find_node_by_phandle(imsic_phandle);
>>>>> +    if ( !imsic_node )
>>>>> +        panic("%s: unable to find IMSIC node\n", node->full_name);
>>>>> +
>>>>> +    /* check imsic mode */
>>>>> +    rc = dt_property_read_u32_array(imsic_node, "interrupts-extended",
>>>>> +                                    irq_range, ARRAY_SIZE(irq_range));
>>>>> +    if ( rc && (rc != -EOVERFLOW) )
>>>>> +        panic("%s: unable to find interrupt-extended in %s node\n",
>>>>> +               node->full_name, imsic_node->full_name);
>>>> Why exactly is EOVERFLOW tolerable here?
>>> QEMU generates two IMSIC device tree nodes: one for M-mode and one for S-mode.
>>> For the hypervisor, we don’t really care about the M-mode IMSIC node — we're only
>>> interested in the S-mode IMSIC node.
>>>
>>> The IMSIC node includes this information in the|"interrupts-extended"| property,
>>> which has the following format:
>>>     interrupt-extended = {, },...
>>> The number of such|| pairs depends on the number of CPUs the platform has.
>>>
>>> For our purposes, to determine whether the IMSIC node corresponds to M-mode or not, it’s sufficient to read only the first pair and check the mode like this:
>>>
>>>     if ( irq_range[1] == IRQ_M_EXT )
>>>
>>> Thereby dt_property_read_u32_array() will return -EOVERFLOW in the case when a platfrom
>>> has more then one CPU as we passed irq_range[2] as an argument but the amount of values
>>> in "interrupts-extended" property will be (2 * CPUS_NUM).
>>>
>>> I can update the comment above dt_property_read_u32_array() for more clearness.
>> Yet my question remains: Why would it be okay to ignore the remaining entries,
>> and hence accept -EOVERFLOW as kind-of-success?
> 
> Because for other entries the IMSIC mode will be the same and the difference will be only in
> interrupt controller's phandle

And we can blindly take this for granted? Would you mind extending the
comment that's there to include this aspect?

Jan

> which we don't care about in this function and cares only about
> in imisic_init(), look at usage of imsic_get_parent_hartid().



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Subject: Re: [PATCH v3 1/4] xen/io: provide helpers for multi size MMIO
 accesses
To: Roger Pau Monne 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <20250417152514.13702-1-roger.pau@citrix.com>
 <20250417152514.13702-2-roger.pau@citrix.com>
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On 17.04.2025 17:25, Roger Pau Monne wrote:
> Several handlers have the same necessity of reading or writing from or to
> an MMIO region using 1, 2, 4 or 8 bytes accesses.  So far this has been
> open-coded in the function itself.  Instead provide a new set of handlers
> that encapsulate the accesses.
> 
> Since the added helpers are not architecture specific, introduce a new
> generic io.h header.
> 
> No functional change intended.
> 
> Signed-off-by: Roger Pau Monné 

Reviewed-by: Jan Beulich 




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Subject: Re: [PATCH v3 2/4] x86/hvm: fix handling of accesses to partial r/o
 MMIO pages
To: Roger Pau Monne 
Cc: Andrew Cooper , xen-devel@lists.xenproject.org
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On 17.04.2025 17:25, Roger Pau Monne wrote:
> --- a/xen/arch/x86/hvm/emulate.c
> +++ b/xen/arch/x86/hvm/emulate.c
> @@ -370,7 +370,15 @@ static int hvmemul_do_io(
>          /* If there is no suitable backing DM, just ignore accesses */
>          if ( !s )
>          {
> -            if ( is_mmio && is_hardware_domain(currd) )
> +            if ( is_mmio && is_hardware_domain(currd) &&
> +                 /*
> +                  * Do not attempt to fixup write accesses to r/o MMIO regions,
> +                  * they are expected to be terminated by the null handler
> +                  * below.
> +                  */
> +                 (!rangeset_contains_singleton(mmio_ro_ranges,
> +                                               PFN_DOWN(addr)) ||
> +                  dir == IOREQ_READ) )

These two would better be swapped, for the cheap one to be done first.

> --- /dev/null
> +++ b/xen/arch/x86/hvm/mmio.c
> @@ -0,0 +1,125 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * MMIO related routines.
> + *
> + * Copyright (c) 2025 Cloud Software Group
> + */
> +
> +#include 
> +#include 
> +
> +#include 
> +
> +static int cf_check subpage_mmio_accept(struct vcpu *v, unsigned long addr)
> +{
> +    p2m_type_t t;
> +    mfn_t mfn = get_gfn_query_unlocked(v->domain, PFN_DOWN(addr), &t);
> +
> +    return !mfn_eq(mfn, INVALID_MFN) && t == p2m_mmio_direct &&
> +           subpage_mmio_find_page(mfn);
> +}
> +
> +/*
> + * The guest has read access to those regions, and consequently read accesses
> + * shouldn't fault.  However read-modify-write operations may take this path,
> + * so handling of reads is necessary.
> + */
> +static int cf_check subpage_mmio_read(
> +    struct vcpu *v, unsigned long addr, unsigned int len, unsigned long *data)
> +{
> +    struct domain *d = v->domain;
> +    unsigned long gfn = PFN_DOWN(addr);
> +    p2m_type_t t;
> +    mfn_t mfn;
> +    struct subpage_ro_range *entry;
> +    volatile void __iomem *mem;
> +
> +    *data = ~0UL;
> +
> +    if ( !IS_ALIGNED(len | addr, len) )

What's the point of doing the | ? len can't be misaligned with itself?

> --- a/xen/arch/x86/include/asm/mm.h
> +++ b/xen/arch/x86/include/asm/mm.h
> @@ -554,6 +554,18 @@ int cf_check mmio_ro_emulated_write(
>      enum x86_segment seg, unsigned long offset, void *p_data,
>      unsigned int bytes, struct x86_emulate_ctxt *ctxt);
>  
> +/* r/o MMIO subpage access handlers. */
> +struct subpage_ro_range {
> +    struct list_head list;
> +    mfn_t mfn;
> +    void __iomem *mapped;
> +    DECLARE_BITMAP(ro_elems, PAGE_SIZE / MMIO_RO_SUBPAGE_GRAN);
> +};
> +struct subpage_ro_range *subpage_mmio_find_page(mfn_t mfn);
> +void __iomem *subpage_mmio_map_page(struct subpage_ro_range *entry);

I notice you didn't move the __iomem, which - as indicated - I agree with,
but Andrew didn't. Did you sort this with him privately?

Jan


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Subject: Re: [PATCH v4 02/13] kconfig: introduce domain builder config options
To: Jan Beulich , Alejandro Vallejo 
CC: "Daniel P. Smith" , Andrew Cooper
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On 2025-04-17 11:00, Jan Beulich wrote:
> On 17.04.2025 14:48, Alejandro Vallejo wrote:
>> --- /dev/null
>> +++ b/xen/common/domain-builder/Kconfig

>> +	bool "Domain builder (UNSUPPORTED)" if UNSUPPORTED
>> +	select LIBFDT
>> +	help
>> +	  Xen has a built-in mechanisms to automatically construct domains
>> +	  (like dom0) during the boot phase. The domain builder is an enhanced
>> +	  form of that mechanism to enable constructing predefined domains
>> +	  described on a flattened device tree.
> 
> I'm not a native speaker, but (perhaps because of that) "on" here reads
> odd. More logical to me would be "by" or "via".

Yes, "by" is better.

The description is a little backwards - it should state what it is 
first.  Maybe:

Support for constructing predefined domains described by a flattened 
device tree.  This allows constructing multiple domains at boot time 
instead of being limited to a single dom0.

Regards,
Jason


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From: Ayan Kumar Halder 
To: 
CC: Ayan Kumar Halder , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" 
Subject: [PATCH v1] xen/arm: AArch32-V8R: Add MPU register definitions
Date: Thu, 17 Apr 2025 16:55:11 +0100
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Add the definitions for HPRBAR<0..31>, HPRLAR<0..31> and HPRENR.
The definitions are taken from ARM DDI 0568A.c ID110520, E2.2.3 HPRBAR,
E2.2.4 HPRENR and E2.2.6 HPRLAR.

Introduce pr_t typedef which is a structure having the prbar and prlar members,
each being structured as the registers of the AArch32-V8R architecture.
This is the arm32 equivalent of
"arm/mpu: Introduce MPU memory region map structure".

Signed-off-by: Ayan Kumar Halder 
---
This patch should be applied after
"[PATCH v3 0/7] First chunk for Arm R82 and MPU support" in order to enable
compilation for AArch32.

 xen/arch/arm/include/asm/arm32/mpu.h  |  59 +++++++++++
 xen/arch/arm/include/asm/mpu.h        |   4 +
 xen/arch/arm/include/asm/mpu/cpregs.h | 135 ++++++++++++++++++++++++++
 3 files changed, 198 insertions(+)
 create mode 100644 xen/arch/arm/include/asm/arm32/mpu.h

diff --git a/xen/arch/arm/include/asm/arm32/mpu.h b/xen/arch/arm/include/asm/arm32/mpu.h
new file mode 100644
index 0000000000..4aabd93479
--- /dev/null
+++ b/xen/arch/arm/include/asm/arm32/mpu.h
@@ -0,0 +1,59 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * mpu.h: Arm Memory Protection Unit definitions for aarch64.
+ */
+
+#ifndef __ARM_ARM32_MPU_H
+#define __ARM_ARM32_MPU_H
+
+#define XN_EL2_ENABLED  0x1
+
+#ifndef __ASSEMBLY__
+
+/* Hypervisor Protection Region Base Address Register */
+typedef union {
+    struct {
+        unsigned int xn:1;       /* Execute-Never */
+        unsigned int ap:2;       /* Acess Permission */
+        unsigned int sh:2;       /* Sharebility */
+        unsigned int res0:1;     /* Reserved as 0 */
+        unsigned int base:26;    /* Base Address */
+    } reg;
+    uint32_t bits;
+} prbar_t;
+
+/* Hypervisor Protection Region Limit Address Register */
+typedef union {
+    struct {
+        unsigned int en:1;     /* Region enable */
+        unsigned int ai:3;     /* Memory Attribute Index */
+        /*
+         * There is no actual ns bit in hardware. It is used here for
+         * compatibility with Armr64 code. Thus, we are reusing a res0 bit for ns.
+         */
+        unsigned int ns:1;     /* Reserved 0 by hardware */
+        unsigned int res0:1;   /* Reserved 0 by hardware */
+        unsigned int limit:26;  /* Limit Address */
+    } reg;
+    uint32_t bits;
+} prlar_t;
+
+/* Protection Region */
+typedef struct {
+    prbar_t prbar;
+    prlar_t prlar;
+    uint64_t p2m_type;          /* Used to store p2m types. */
+} pr_t;
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __ARM_ARM32_MPU_H */
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h
index 77d0566f97..67127149c0 100644
--- a/xen/arch/arm/include/asm/mpu.h
+++ b/xen/arch/arm/include/asm/mpu.h
@@ -8,8 +8,12 @@
 
 #if defined(CONFIG_ARM_64)
 # include 
+#elif defined(CONFIG_ARM_32)
+# include 
 #endif
 
+#define PRENR_MASK  GENMASK(31, 0)
+
 #define MPU_REGION_SHIFT  6
 #define MPU_REGION_ALIGN  (_AC(1, UL) << MPU_REGION_SHIFT)
 #define MPU_REGION_MASK   (~(MPU_REGION_ALIGN - 1))
diff --git a/xen/arch/arm/include/asm/mpu/cpregs.h b/xen/arch/arm/include/asm/mpu/cpregs.h
index d5cd0e04d5..7cf52aa09a 100644
--- a/xen/arch/arm/include/asm/mpu/cpregs.h
+++ b/xen/arch/arm/include/asm/mpu/cpregs.h
@@ -6,18 +6,153 @@
 /* CP15 CR0: MPU Type Register */
 #define HMPUIR          p15,4,c0,c0,4
 
+/* CP15 CR6: Protection Region Enable Register */
+#define HPRENR          p15,4,c6,c1,1
+
 /* CP15 CR6: MPU Protection Region Base/Limit/Select Address Register */
 #define HPRSELR         p15,4,c6,c2,1
 #define HPRBAR          p15,4,c6,c3,0
 #define HPRLAR          p15,4,c6,c8,1
 
+/* CP15 CR6: MPU Protection Region Base/Limit Address Register */
+#define HPRBAR0         p15,4,c6,c8,0
+#define HPRLAR0         p15,4,c6,c8,1
+#define HPRBAR1         p15,4,c6,c8,4
+#define HPRLAR1         p15,4,c6,c8,5
+#define HPRBAR2         p15,4,c6,c9,0
+#define HPRLAR2         p15,4,c6,c9,1
+#define HPRBAR3         p15,4,c6,c9,4
+#define HPRLAR3         p15,4,c6,c9,5
+#define HPRBAR4         p15,4,c6,c10,0
+#define HPRLAR4         p15,4,c6,c10,1
+#define HPRBAR5         p15,4,c6,c10,4
+#define HPRLAR5         p15,4,c6,c10,5
+#define HPRBAR6         p15,4,c6,c11,0
+#define HPRLAR6         p15,4,c6,c11,1
+#define HPRBAR7         p15,4,c6,c11,4
+#define HPRLAR7         p15,4,c6,c11,5
+#define HPRBAR8         p15,4,c6,c12,0
+#define HPRLAR8         p15,4,c6,c12,1
+#define HPRBAR9         p15,4,c6,c12,4
+#define HPRLAR9         p15,4,c6,c12,5
+#define HPRBAR10        p15,4,c6,c13,0
+#define HPRLAR10        p15,4,c6,c13,1
+#define HPRBAR11        p15,4,c6,c13,4
+#define HPRLAR11        p15,4,c6,c13,5
+#define HPRBAR12        p15,4,c6,c14,0
+#define HPRLAR12        p15,4,c6,c14,1
+#define HPRBAR13        p15,4,c6,c14,4
+#define HPRLAR13        p15,4,c6,c14,5
+#define HPRBAR14        p15,4,c6,c15,0
+#define HPRLAR14        p15,4,c6,c15,1
+#define HPRBAR15        p15,4,c6,c15,4
+#define HPRLAR15        p15,4,c6,c15,5
+#define HPRBAR16        p15,5,c6,c8,0
+#define HPRLAR16        p15,5,c6,c8,1
+#define HPRBAR17        p15,5,c6,c8,4
+#define HPRLAR17        p15,5,c6,c8,5
+#define HPRBAR18        p15,5,c6,c9,0
+#define HPRLAR18        p15,5,c6,c9,1
+#define HPRBAR19        p15,5,c6,c9,4
+#define HPRLAR19        p15,5,c6,c9,5
+#define HPRBAR20        p15,5,c6,c10,0
+#define HPRLAR20        p15,5,c6,c10,1
+#define HPRBAR21        p15,5,c6,c10,4
+#define HPRLAR21        p15,5,c6,c10,5
+#define HPRBAR22        p15,5,c6,c11,0
+#define HPRLAR22        p15,5,c6,c11,1
+#define HPRBAR23        p15,5,c6,c11,4
+#define HPRLAR23        p15,5,c6,c11,5
+#define HPRBAR24        p15,5,c6,c12,0
+#define HPRLAR24        p15,5,c6,c12,1
+#define HPRBAR25        p15,5,c6,c12,4
+#define HPRLAR25        p15,5,c6,c12,5
+#define HPRBAR26        p15,5,c6,c13,0
+#define HPRLAR26        p15,5,c6,c13,1
+#define HPRBAR27        p15,5,c6,c13,4
+#define HPRLAR27        p15,5,c6,c13,5
+#define HPRBAR28        p15,5,c6,c14,0
+#define HPRLAR28        p15,5,c6,c14,1
+#define HPRBAR29        p15,5,c6,c14,4
+#define HPRLAR29        p15,5,c6,c14,5
+#define HPRBAR30        p15,5,c6,c15,0
+#define HPRLAR30        p15,5,c6,c15,1
+#define HPRBAR31        p15,5,c6,c15,4
+#define HPRLAR31        p15,5,c6,c15,5
+
 /* Aliases of AArch64 names for use in common code */
 #ifdef CONFIG_ARM_32
 /* Alphabetically... */
 #define MPUIR_EL2       HMPUIR
 #define PRBAR_EL2       HPRBAR
+#define PRBAR0_EL2      HPRBAR0
+#define PRBAR1_EL2      HPRBAR1
+#define PRBAR2_EL2      HPRBAR2
+#define PRBAR3_EL2      HPRBAR3
+#define PRBAR4_EL2      HPRBAR4
+#define PRBAR5_EL2      HPRBAR5
+#define PRBAR6_EL2      HPRBAR6
+#define PRBAR7_EL2      HPRBAR7
+#define PRBAR8_EL2      HPRBAR8
+#define PRBAR9_EL2      HPRBAR9
+#define PRBAR10_EL2     HPRBAR10
+#define PRBAR11_EL2     HPRBAR11
+#define PRBAR12_EL2     HPRBAR12
+#define PRBAR13_EL2     HPRBAR13
+#define PRBAR14_EL2     HPRBAR14
+#define PRBAR15_EL2     HPRBAR15
+#define PRBAR16_EL2     HPRBAR16
+#define PRBAR17_EL2     HPRBAR17
+#define PRBAR18_EL2     HPRBAR18
+#define PRBAR19_EL2     HPRBAR19
+#define PRBAR20_EL2     HPRBAR20
+#define PRBAR21_EL2     HPRBAR21
+#define PRBAR22_EL2     HPRBAR22
+#define PRBAR23_EL2     HPRBAR23
+#define PRBAR24_EL2     HPRBAR24
+#define PRBAR25_EL2     HPRBAR25
+#define PRBAR26_EL2     HPRBAR26
+#define PRBAR27_EL2     HPRBAR27
+#define PRBAR28_EL2     HPRBAR28
+#define PRBAR29_EL2     HPRBAR29
+#define PRBAR30_EL2     HPRBAR30
+#define PRBAR31_EL2     HPRBAR31
+#define PRENR_EL2       HPRENR
 #define PRLAR_EL2       HPRLAR
+#define PRLAR0_EL2      HPRLAR0
+#define PRLAR1_EL2      HPRLAR1
+#define PRLAR2_EL2      HPRLAR2
+#define PRLAR3_EL2      HPRLAR3
+#define PRLAR4_EL2      HPRLAR4
+#define PRLAR5_EL2      HPRLAR5
+#define PRLAR6_EL2      HPRLAR6
+#define PRLAR7_EL2      HPRLAR7
+#define PRLAR8_EL2      HPRLAR8
+#define PRLAR9_EL2      HPRLAR9
+#define PRLAR10_EL2     HPRLAR10
+#define PRLAR11_EL2     HPRLAR11
+#define PRLAR12_EL2     HPRLAR12
+#define PRLAR13_EL2     HPRLAR13
+#define PRLAR14_EL2     HPRLAR14
+#define PRLAR15_EL2     HPRLAR15
+#define PRLAR16_EL2     HPRLAR16
+#define PRLAR17_EL2     HPRLAR17
+#define PRLAR18_EL2     HPRLAR18
+#define PRLAR19_EL2     HPRLAR19
+#define PRLAR20_EL2     HPRLAR20
+#define PRLAR21_EL2     HPRLAR21
+#define PRLAR22_EL2     HPRLAR22
+#define PRLAR23_EL2     HPRLAR23
+#define PRLAR24_EL2     HPRLAR24
+#define PRLAR25_EL2     HPRLAR25
+#define PRLAR26_EL2     HPRLAR26
+#define PRLAR27_EL2     HPRLAR27
+#define PRLAR28_EL2     HPRLAR28
+#define PRLAR29_EL2     HPRLAR29
+#define PRLAR30_EL2     HPRLAR30
+#define PRLAR31_EL2     HPRLAR31
 #define PRSELR_EL2      HPRSELR
+
 #endif /* CONFIG_ARM_32 */
 
 #endif /* __ARM_MPU_CPREGS_H */
-- 
2.25.1



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Date: Thu, 17 Apr 2025 17:06:25 +0100
Message-ID: 
CC: "Daniel P. Smith" , Andrew Cooper
	, =?utf-8?q?Roger_Pau_Monn=C3=A9?=
	, Jason Andryuk ,
	
Subject: Re: [PATCH v4 01/13] x86/boot: add cmdline to struct boot_domain
From: Alejandro Vallejo 
To: Jan Beulich 
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References: <20250417124844.11143-1-agarciav@amd.com>
 <20250417124844.11143-2-agarciav@amd.com>
 
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On Thu Apr 17, 2025 at 3:54 PM BST, Jan Beulich wrote:
> On 17.04.2025 14:48, Alejandro Vallejo wrote:
>> From: "Daniel P. Smith" 
>>=20
>> Add a container for the "cooked" command line for a domain. This
>> provides for the backing memory to be directly associated with the
>> domain being constructed.  This is done in anticipation that the domain
>> construction path may need to be invoked multiple times, thus ensuring
>> each instance had a distinct memory allocation.
>>=20
>> Signed-off-by: Daniel P. Smith 
>> Signed-off-by: Jason Andryuk 
>> Signed-off-by: Alejandro Vallejo 
>
> Acked-by: Jan Beulich 

Thanks,

> preferably with ...
>
>> --- a/xen/arch/x86/hvm/dom0_build.c
>> +++ b/xen/arch/x86/hvm/dom0_build.c
>> @@ -653,7 +653,7 @@ static int __init pvh_load_kernel(
>>      void *image_start =3D image_base + image->headroom;
>>      unsigned long image_len =3D image->size;
>>      unsigned long initrd_len =3D initrd ? initrd->size : 0;
>> -    const char *cmdline =3D image->cmdline_pa ? __va(image->cmdline_pa)=
 : NULL;
>> +    unsigned long cmdline_len =3D bd->cmdline ? strlen(bd->cmdline) + 1=
 : 0;
>
> ... this becoming either size_t (as you have it elsewhere) or unsigned in=
t.
> Happy to make the adjustment while committing, so long as you agree with
> either of the suggested variants.
>
> Jan

Yes, sounds good. I'd rather it be size_t seeing as it's the output type
of strlen()

Cheers,
Alejandro


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From: Oleksii Kurochko 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
	Alistair Francis ,
	Bob Eshleman ,
	Connor Davis ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v5] xen/riscv: Increase XEN_VIRT_SIZE
Date: Thu, 17 Apr 2025 18:08:23 +0200
Message-ID: <9fbb5e1389b84bed2e95f99e4c383d0215c7a524.1744889185.git.oleksii.kurochko@gmail.com>
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A randconfig job failed with the following issue:
  riscv64-linux-gnu-ld: Xen too large for early-boot assumptions

The reason is that enabling the UBSAN config increased the size of
the Xen binary.

Increase XEN_VIRT_SIZE to reserve enough space, allowing both UBSAN
and GCOV to be enabled together, with some slack for future growth.

Additionally, add checks to verify that XEN_VIRT_START is 1GB-aligned
and XEN_VIRT_SIZE is 2MB-aligned to reduce the number of page tables
needed for the initial mapping. In the future, when 2MB mappings are
used for .text (rx), .rodata (r), and .data (rw), this will also help
reduce TLB pressure.

Reported-by: Andrew Cooper 
Signed-off-by: Oleksii Kurochko 
---
Changes in v5:
 - Introduce build_assertions() instead of open-code BUILD_BUG_ON().
 - Update the comment message above PGTBL_INITIAL_COUNT.
 - Add BUILD_BUG_ON() to check that XEN_VIRT_SIZE <= GB(1).
---
Changes in v4:
 - Move is_init_section() to xen/sections.h. Add const for
   declaration of `p` variable inside is_init_section() and
   for the cast.
 - Update the comment above ASSERT() with .init* section range:
   s/[__init_begin, __init_end]/[__init_begin, __init_end).
 - Update ASSERT condition:
   s/"system_state != SYS_STATE_active"/"system_state < SYS_STATE_active".
 - Drop MB after XEN_VIRT_SIZE in the comment above PGTBL_INITIAL_COUNT
   as XEN_VIRT_SIZE expands to MB(16).
 - Fix typos:
   s/separetely/separately
   s/indenity/identity
 - Add lost L0 table for identity mapping to PGTBL_INITIAL_COUNT.
 - Move checks to alignment checks of XEN_VIRT_SIZE and XEN_VIRT_SIZE
   closer to the definition of PGTBL_INITIAL_COUNT.
 - Update the commit message.
---
Changes in v3:
 - Add ASSERT which checks .init* sections range. When Xen ends boot
   init* sections are going to be released.
 - Introduce is_init_section() macros.
 - Correct fixmap end address in RISCV-64 layour table.
 - Update ASSERT() which checks that `va` is in Xen virtual address
   range and drop BUILD_BUG_ON() as it isn't necessary anymore with
   the way how the ASSERT() looks now.
 - Add ASSERT() which checks that XEN_VIRT_START is 1gb aligned and
   add ASSERT() which checks that XEN_VIRT_SIZE is 2mb aligned.
   It helps us to reduce an amount of PGTBL_INITIAL_COUNT.
 - Update PGTBL_INITIAL_COUNT and the comment above.
 - Update the commit message.
---
Changes in v2:
 - Incerease XEN_VIRT_SIZE to 16 Mb to cover also the case if 2M mappings will
   be used for .text (rx), .rodata(r), and .data (rw).
 - Update layout table in config.h.
 - s/xen_virt_starn_vpn/xen_virt_start_vpn
 - Update BUILD_BUG_ON(... != MB(8)) check to "... > GB(1)".
 - Update definition of PGTBL_INITIAL_COUNT and the comment above.
---
 xen/arch/riscv/include/asm/config.h |  8 +++----
 xen/arch/riscv/include/asm/mm.h     | 15 +++++++++---
 xen/arch/riscv/mm.c                 | 37 ++++++++++++++++++++++-------
 xen/include/xen/sections.h          |  4 ++++
 4 files changed, 48 insertions(+), 16 deletions(-)

diff --git a/xen/arch/riscv/include/asm/config.h b/xen/arch/riscv/include/asm/config.h
index 7141bd9e46..5eba626f27 100644
--- a/xen/arch/riscv/include/asm/config.h
+++ b/xen/arch/riscv/include/asm/config.h
@@ -41,11 +41,11 @@
  * Start addr          | End addr         | Slot       | area description
  * ============================================================================
  *                   .....                 L2 511          Unused
- *  0xffffffffc0a00000  0xffffffffc0bfffff L2 511          Fixmap
+ *  0xffffffffc1800000  0xffffffffc19fffff L2 511          Fixmap
  *                   ..... ( 2 MB gap )
- *  0xffffffffc0400000  0xffffffffc07fffff L2 511          FDT
+ *  0xffffffffc1200000  0xffffffffc15fffff L2 511          FDT
  *                   ..... ( 2 MB gap )
- *  0xffffffffc0000000  0xffffffffc01fffff L2 511          Xen
+ *  0xffffffffc0000000  0xffffffffc0ffffff L2 511          Xen
  *                   .....                 L2 510          Unused
  *  0x3200000000        0x7f7fffffff       L2 200-509      Direct map
  *                   .....                 L2 199          Unused
@@ -78,7 +78,7 @@
 
 #define GAP_SIZE                MB(2)
 
-#define XEN_VIRT_SIZE           MB(2)
+#define XEN_VIRT_SIZE           MB(16)
 
 #define BOOT_FDT_VIRT_START     (XEN_VIRT_START + XEN_VIRT_SIZE + GAP_SIZE)
 #define BOOT_FDT_VIRT_SIZE      MB(4)
diff --git a/xen/arch/riscv/include/asm/mm.h b/xen/arch/riscv/include/asm/mm.h
index 4035cd400a..ef8b35d7c2 100644
--- a/xen/arch/riscv/include/asm/mm.h
+++ b/xen/arch/riscv/include/asm/mm.h
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -43,13 +44,21 @@ static inline void *maddr_to_virt(paddr_t ma)
  */
 static inline unsigned long virt_to_maddr(unsigned long va)
 {
+    const unsigned long xen_size = (unsigned long)(_end - _start);
+    const unsigned long xen_virt_start = _AC(XEN_VIRT_START, UL);
+    const unsigned long xen_virt_end = xen_virt_start + xen_size - 1;
+
     if ((va >= DIRECTMAP_VIRT_START) &&
         (va <= DIRECTMAP_VIRT_END))
         return directmapoff_to_maddr(va - directmap_virt_start);
 
-    BUILD_BUG_ON(XEN_VIRT_SIZE != MB(2));
-    ASSERT((va >> (PAGETABLE_ORDER + PAGE_SHIFT)) ==
-           (_AC(XEN_VIRT_START, UL) >> (PAGETABLE_ORDER + PAGE_SHIFT)));
+    ASSERT((va >= xen_virt_start) && (va <= xen_virt_end));
+
+    /*
+    * The .init* sections will be freed when Xen completes booting,
+    * so the [__init_begin, __init_end) range must be excluded.
+    */
+    ASSERT((system_state < SYS_STATE_active) || !is_init_section(va));
 
     /* phys_offset = load_start - XEN_VIRT_START */
     return phys_offset + va;
diff --git a/xen/arch/riscv/mm.c b/xen/arch/riscv/mm.c
index f2bf279bac..d3ece9f132 100644
--- a/xen/arch/riscv/mm.c
+++ b/xen/arch/riscv/mm.c
@@ -31,20 +31,39 @@ unsigned long __ro_after_init phys_offset; /* = load_start - XEN_VIRT_START */
 #define LOAD_TO_LINK(addr) ((unsigned long)(addr) - phys_offset)
 
 /*
- * It is expected that Xen won't be more then 2 MB.
+ * It is expected that Xen won't be more then XEN_VIRT_SIZE.
  * The check in xen.lds.S guarantees that.
- * At least 3 page tables (in case of Sv39 ) are needed to cover 2 MB.
- * One for each page level table with PAGE_SIZE = 4 Kb.
  *
- * One L0 page table can cover 2 MB(512 entries of one page table * PAGE_SIZE).
+ * Root page table is shared with the initial mapping and is declared
+ * separately (look at stage1_pgtbl_root), so it isn't taken into account
+ * in PGTBL_INITIAL_COUNT.
  *
- * It might be needed one more page table in case when Xen load address
- * isn't 2 MB aligned.
+ * An amount of page tables between root page table and L0 page table
+ * (in the case of Sv39 it covers L1 table):
+ *   (CONFIG_PAGING_LEVELS - 2) are needed for an identity mapping and
+ *   the same amount are needed for Xen.
  *
- * CONFIG_PAGING_LEVELS page tables are needed for the identity mapping,
- * except that the root page table is shared with the initial mapping
+ * An amount of L0 page tables:
+ *   (512 entries of one L0 page table covers 2MB == 1<> XEN_PT_LEVEL_SHIFT(1) are needed for Xen and
+ *   one L0 is needed for identity mapping.
  */
-#define PGTBL_INITIAL_COUNT ((CONFIG_PAGING_LEVELS - 1) * 2 + 1)
+#define PGTBL_INITIAL_COUNT ((CONFIG_PAGING_LEVELS - 2) * 2 + \
+                             (XEN_VIRT_SIZE >> XEN_PT_LEVEL_SHIFT(1)) + 1)
+
+/*
+ * Modifying these checks may require updating PGTBL_INITIAL_COUNT.
+ *
+ * If XEN_VIRT_{START,SIZE} are not properly aligned and XEN_VIRT_SIZE > GB(1),
+ * additional L1 and L0 page tables are required.
+ */
+static void __init __maybe_unused build_assertions(void)
+{
+    BUILD_BUG_ON(!IS_ALIGNED(XEN_VIRT_START, GB(1)));
+    BUILD_BUG_ON(!IS_ALIGNED(XEN_VIRT_SIZE, MB(2)));
+
+    BUILD_BUG_ON(XEN_VIRT_SIZE > GB(1));
+}
 
 pte_t __section(".bss.page_aligned") __aligned(PAGE_SIZE)
 stage1_pgtbl_root[PAGETABLE_ENTRIES];
diff --git a/xen/include/xen/sections.h b/xen/include/xen/sections.h
index f2fac8d7fa..fe49d7d0e6 100644
--- a/xen/include/xen/sections.h
+++ b/xen/include/xen/sections.h
@@ -7,6 +7,10 @@
 
 /* SAF-0-safe */
 extern char __init_begin[], __init_end[];
+#define is_init_section(p) ({                           \
+    const char *p_ = (const char *)(unsigned long)(p);  \
+    (p_ >= __init_begin) && (p_ < __init_end);          \
+})
 
 /*
  * Some data is expected to be written rarely (if at all).
-- 
2.49.0



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Message-ID: <0d01646b-83e3-4a02-b365-d149d2664e73@citrix.com>
Date: Thu, 17 Apr 2025 17:08:37 +0100
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Subject: Re: [PATCH v1] x86/vmx: Rework __vmread()/vmread_safe()/vmr()
To: dmkhn@proton.me, xen-devel@lists.xenproject.org
Cc: jbeulich@suse.com, roger.pau@citrix.com, dmukhin@ford.com
References: <20250408011454.2274613-1-dmukhin@ford.com>
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In-Reply-To: <20250408011454.2274613-1-dmukhin@ford.com>
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On 08/04/2025 2:15 am, dmkhn@proton.me wrote:
> From: Denis Mukhin 
>
> Use `asm goto()` in vmread_safe() to simplify the error handling logic.
>
> Update __vmread() to return `unsigned long` as per suggestion in [1].
> Rename __vmread() to vmread_unsafe() to match the behavior.
> Update all call sites everywhere. Drop `UNLIKELY_*()`.
>
> Group all vmread*() calls close to each other in vmx.h
>
> Rename internal vmr*() to vmread*().
>
> [1] https://lore.kernel.org/xen-devel/c452a1d7-4a57-4c5f-8a83-36a74ff228ec@citrix.com/
>
> Signed-off-by: Denis Mukhin 
> ---
> Link to CI: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines/1756781092
> ---
>  xen/arch/x86/cpu/vpmu_intel.c          |   3 +-
>  xen/arch/x86/hvm/vmx/intr.c            |  26 +--
>  xen/arch/x86/hvm/vmx/realmode.c        |   2 +-
>  xen/arch/x86/hvm/vmx/vmcs.c            | 160 ++++++++++---------
>  xen/arch/x86/hvm/vmx/vmx.c             | 209 +++++++++++--------------
>  xen/arch/x86/hvm/vmx/vvmx.c            |  43 +++--
>  xen/arch/x86/include/asm/domain.h      |   2 +-
>  xen/arch/x86/include/asm/hvm/vmx/vmx.h |  69 ++++----
>  8 files changed, 235 insertions(+), 279 deletions(-)

This is why I suggested not to convert everything in one go.  It's now a
patch doing multiple complicated things, and is proportionally harder to
review.

For everyone in public, it is especially daft that we have __vmread()
which is void and (if it doesn't BUG()) will pass it's return value by
pointer.  It leads to very unergonomic logic.

Start by just implementing vmread(), and updating __vmread() and
vmwrite_safe() to use it.  You cannot use asm goto() for vmread()
because of the no-outputs constraint that we still need to follow.

Then, in a separate patch, you can do simple conversion such as ...

>
> diff --git a/xen/arch/x86/cpu/vpmu_intel.c b/xen/arch/x86/cpu/vpmu_intel.c
> index 7ce98ee42e..9c93d1f28c 100644
> --- a/xen/arch/x86/cpu/vpmu_intel.c
> +++ b/xen/arch/x86/cpu/vpmu_intel.c
> @@ -796,8 +796,7 @@ static int cf_check core2_vpmu_do_interrupt(void)
>      else
>      {
>          /* No PMC overflow but perhaps a Trace Message interrupt. */
> -        __vmread(GUEST_IA32_DEBUGCTL, &msr_content);
> -        if ( !(msr_content & IA32_DEBUGCTLMSR_TR) )
> +        if ( !(vmread_unsafe(GUEST_IA32_DEBUGCTL) & IA32_DEBUGCTLMSR_TR) )
>              return 0;
>      }
>  

... this to vmread().  

Splitting the patch makes a substantial difference to review-ability,
because patch 1 is "is this new helper implemented correctly?", and
patch 2 is "is this boilerplate rearrangement no overall change?".

For vmr(), I'd start by just wrapping vmread().  It's debugging logic
where brevity is important.

> diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm/domain.h
> index 6b877e33a1..ffe9acd75d 100644
> --- a/xen/arch/x86/include/asm/domain.h
> +++ b/xen/arch/x86/include/asm/domain.h
> @@ -595,7 +595,7 @@ struct arch_vcpu
>  
>      /* Debug registers. */
>      unsigned long dr[4];
> -    unsigned long dr7; /* Ideally int, but __vmread() needs long. */
> +    unsigned long dr7; /* Ideally int, but vmread_unsafe() needs unsigned long. */
>      unsigned int dr6;

This comment was left as a hint, and you've just addressed the problem
forcing it to stay unsigned long.

Changing dr7 should be in a separate patch too.

~Andrew


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Subject: Re: [PATCH] Update to latest Argo
To: Andrew Cooper , Xen-devel
	
CC: Anthony PERARD , Stefano Stabellini
	, Michal Orzel , Doug Goldstein
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On 2025-04-17 10:55, Andrew Cooper wrote:
> The bugfixes I submitted during commit 36500bcb5e24 ("Overhaul how Argo is
> built and packged") have now been merged.
> 
> Update the version used, and drop the -Wno-error workaround.
> 
> Link: https://github.com/OpenXT/linux-xen-argo/pull/21
> Signed-off-by: Andrew Cooper 

Reviewed-by: Jason Andryuk 


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Date: Thu, 17 Apr 2025 17:18:20 +0100
Message-ID: 
CC: "Daniel P. Smith" , Andrew Cooper
	, =?utf-8?q?Roger_Pau_Monn=C3=A9?=
	, Anthony PERARD , "Michal
 Orzel" , Julien Grall , "Stefano
 Stabellini" , 
Subject: Re: [PATCH v4 02/13] kconfig: introduce domain builder config
 options
From: Alejandro Vallejo 
To: Jan Beulich 
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On Thu Apr 17, 2025 at 4:00 PM BST, Jan Beulich wrote:
> On 17.04.2025 14:48, Alejandro Vallejo wrote:
>> --- /dev/null
>> +++ b/xen/common/domain-builder/Kconfig
>> @@ -0,0 +1,18 @@
>> +
>> +menu "Domain Builder Features"
>> +depends on HAS_BOOT_INFO
>
> That is, what's going to further be added here will not ...
>
>> +config DOMAIN_BUILDER
>
> ...depend on this, but just on HAS_BOOT_INFO? Seems not very likely, but
> I'll be looking forward to learn what the plans are.

CONFIG_HAS_BOOT_INFO has nothing to do with future plans.  The domain
builder is tightly integrated with the boot_info infrastructure and
cannot be used (or linked) unless the arch-specific definitions are
present. It cannot function without it. And this movement from arch/ to
common/ forces this new Kconfig to gate core.c on boot_info existing
(because it's in asm/bootinfo.h atm). I _COULD_ also move the boot_info
elsewhere, but without a drive to actually use it, that seems a bit
pointless.

HAS_BOOT_INFO && !DOMAIN_BUILDER still links core.c, because that
contains the common initialiser for boot_info.

>
> Also, if the entire contents here is to depend on HAS_BOOT_INFO, can't
> the "source" line pulling in this Kconfig be put inside "if HAS_BOOT_INFO=
"?
> That would centralize definition and use of that symbol to a single file.

Sure.

>
>> +	bool "Domain builder (UNSUPPORTED)" if UNSUPPORTED
>> +	select LIBFDT
>> +	help
>> +	  Xen has a built-in mechanisms to automatically construct domains
>> +	  (like dom0) during the boot phase. The domain builder is an enhanced
>> +	  form of that mechanism to enable constructing predefined domains
>> +	  described on a flattened device tree.
>
> I'm not a native speaker, but (perhaps because of that) "on" here reads
> odd. More logical to me would be "by" or "via".
>
> Jan

Yes, you're right. I just felt the previous help wasn't very helpful
unless you knew in advance what you were toggling. Jason's more concrete
suggestion in the following reply sounds reasonable too, so I'll just
copy that on resend.

Cheers,
Alejandro


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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper 
Subject: [PATCH] x86/intel: workaround several MONITOR/MWAIT errata
Date: Thu, 17 Apr 2025 18:19:13 +0200
Message-ID: <20250417161913.14661-1-roger.pau@citrix.com>
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There are several errata on Intel regarding the usage of the MONITOR/MWAIT
instructions, all having in common that stores to the monitored region
might not wake up the CPU.

Fix them by forcing the sending of an IPI for the affected models.

The Ice Lake issue has been reproduced internally on XenServer hardware,
and the fix does seem to prevent it.  The symptom was APs getting stuck in
the idle loop immediately after bring up, which in turn prevented the BSP
from making progress.  This would happen before the watchdog was
initialized, and hence the whole system would get stuck.

Signed-off-by: Roger Pau Monné 
---
Apollo and Lunar Lake fixes have not been tested, due to lack of hardware.
---
 xen/arch/x86/acpi/cpu_idle.c     |  6 +++++
 xen/arch/x86/cpu/intel.c         | 41 +++++++++++++++++++++++++++++++-
 xen/arch/x86/include/asm/mwait.h |  3 +++
 3 files changed, 49 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/acpi/cpu_idle.c b/xen/arch/x86/acpi/cpu_idle.c
index 420198406def..f8f11f3c31e4 100644
--- a/xen/arch/x86/acpi/cpu_idle.c
+++ b/xen/arch/x86/acpi/cpu_idle.c
@@ -441,8 +441,14 @@ void cpuidle_wakeup_mwait(cpumask_t *mask)
     cpumask_andnot(mask, mask, &target);
 }
 
+/* Force sending of a wakeup IPI regardless of mwait usage. */
+bool force_mwait_ipi_wakeup __read_mostly;
+
 bool arch_skip_send_event_check(unsigned int cpu)
 {
+    if ( force_mwait_ipi_wakeup )
+        return false;
+
     /*
      * This relies on softirq_pending() and mwait_wakeup() to access data
      * on the same cache line.
diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c
index 6a680ba38dc9..9d7c6ea297a9 100644
--- a/xen/arch/x86/cpu/intel.c
+++ b/xen/arch/x86/cpu/intel.c
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -368,7 +369,6 @@ static void probe_c3_errata(const struct cpuinfo_x86 *c)
         INTEL_FAM6_MODEL(0x25),
         { }
     };
-#undef INTEL_FAM6_MODEL
 
     /* Serialized by the AP bringup code. */
     if ( max_cstate > 1 && (c->apicid & (c->x86_num_siblings - 1)) &&
@@ -380,6 +380,43 @@ static void probe_c3_errata(const struct cpuinfo_x86 *c)
     }
 }
 
+/*
+ * APL30: One use of the MONITOR/MWAIT instruction pair is to allow a logical
+ * processor to wait in a sleep state until a store to the armed address range
+ * occurs. Due to this erratum, stores to the armed address range may not
+ * trigger MWAIT to resume execution.
+ *
+ * ICX143: Under complex microarchitectural conditions, a monitor that is armed
+ * with the MWAIT instruction may not be triggered, leading to a processor
+ * hang.
+ *
+ * LNL030: Problem P-cores may not exit power state Core C6 on monitor hit.
+ *
+ * Force the sending of an IPI in those cases.
+ */
+static void probe_mwait_errata(void)
+{
+    static const struct x86_cpu_id models[] = {
+        /* Apollo Lake */
+        INTEL_FAM6_MODEL(0x5C),
+        /* Ice Lake */
+        INTEL_FAM6_MODEL(0x6A),
+        INTEL_FAM6_MODEL(0x6C),
+        /* Lunar Lake */
+        INTEL_FAM6_MODEL(0xBD),
+        { }
+    };
+#undef INTEL_FAM6_MODEL
+
+    if ( boot_cpu_has(X86_FEATURE_MONITOR) && !force_mwait_ipi_wakeup &&
+         x86_match_cpu(models) )
+    {
+        printk(XENLOG_WARNING
+               "Forcing IPI MWAIT wakeup due to CPU erratum\n");
+        force_mwait_ipi_wakeup = true;
+    }
+}
+
 /*
  * P4 Xeon errata 037 workaround.
  * Hardware prefetcher may cause stale data to be loaded into the cache.
@@ -406,6 +443,8 @@ static void Intel_errata_workarounds(struct cpuinfo_x86 *c)
 		__set_bit(X86_FEATURE_CLFLUSH_MONITOR, c->x86_capability);
 
 	probe_c3_errata(c);
+	if (c == &boot_cpu_data)
+		probe_mwait_errata();
 }
 
 
diff --git a/xen/arch/x86/include/asm/mwait.h b/xen/arch/x86/include/asm/mwait.h
index 000a692f6d19..c52cd3f51011 100644
--- a/xen/arch/x86/include/asm/mwait.h
+++ b/xen/arch/x86/include/asm/mwait.h
@@ -13,6 +13,9 @@
 
 #define MWAIT_ECX_INTERRUPT_BREAK	0x1
 
+/* Force sending of a wakeup IPI regardless of mwait usage. */
+extern bool force_mwait_ipi_wakeup;
+
 void mwait_idle_with_hints(unsigned int eax, unsigned int ecx);
 #ifdef CONFIG_INTEL
 bool mwait_pc10_supported(void);
-- 
2.48.1



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Date: Thu, 17 Apr 2025 18:23:44 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: Andrew Cooper ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH v3 2/4] x86/hvm: fix handling of accesses to partial r/o
 MMIO pages
Message-ID: 
References: <20250417152514.13702-1-roger.pau@citrix.com>
 <20250417152514.13702-3-roger.pau@citrix.com>
 
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On Thu, Apr 17, 2025 at 05:38:54PM +0200, Jan Beulich wrote:
> On 17.04.2025 17:25, Roger Pau Monne wrote:
> > --- a/xen/arch/x86/hvm/emulate.c
> > +++ b/xen/arch/x86/hvm/emulate.c
> > @@ -370,7 +370,15 @@ static int hvmemul_do_io(
> >          /* If there is no suitable backing DM, just ignore accesses */
> >          if ( !s )
> >          {
> > -            if ( is_mmio && is_hardware_domain(currd) )
> > +            if ( is_mmio && is_hardware_domain(currd) &&
> > +                 /*
> > +                  * Do not attempt to fixup write accesses to r/o MMIO regions,
> > +                  * they are expected to be terminated by the null handler
> > +                  * below.
> > +                  */
> > +                 (!rangeset_contains_singleton(mmio_ro_ranges,
> > +                                               PFN_DOWN(addr)) ||
> > +                  dir == IOREQ_READ) )
> 
> These two would better be swapped, for the cheap one to be done first.

Can swap, thanks for pointing out.

> > --- /dev/null
> > +++ b/xen/arch/x86/hvm/mmio.c
> > @@ -0,0 +1,125 @@
> > +/* SPDX-License-Identifier: GPL-2.0-only */
> > +/*
> > + * MMIO related routines.
> > + *
> > + * Copyright (c) 2025 Cloud Software Group
> > + */
> > +
> > +#include 
> > +#include 
> > +
> > +#include 
> > +
> > +static int cf_check subpage_mmio_accept(struct vcpu *v, unsigned long addr)
> > +{
> > +    p2m_type_t t;
> > +    mfn_t mfn = get_gfn_query_unlocked(v->domain, PFN_DOWN(addr), &t);
> > +
> > +    return !mfn_eq(mfn, INVALID_MFN) && t == p2m_mmio_direct &&
> > +           subpage_mmio_find_page(mfn);
> > +}
> > +
> > +/*
> > + * The guest has read access to those regions, and consequently read accesses
> > + * shouldn't fault.  However read-modify-write operations may take this path,
> > + * so handling of reads is necessary.
> > + */
> > +static int cf_check subpage_mmio_read(
> > +    struct vcpu *v, unsigned long addr, unsigned int len, unsigned long *data)
> > +{
> > +    struct domain *d = v->domain;
> > +    unsigned long gfn = PFN_DOWN(addr);
> > +    p2m_type_t t;
> > +    mfn_t mfn;
> > +    struct subpage_ro_range *entry;
> > +    volatile void __iomem *mem;
> > +
> > +    *data = ~0UL;
> > +
> > +    if ( !IS_ALIGNED(len | addr, len) )
> 
> What's the point of doing the | ? len can't be misaligned with itself?

Hm, it's the same form that's used in mmio_ro_emulated_write(), I
assumed it was to catch illegal access lengths, like 3.

> > --- a/xen/arch/x86/include/asm/mm.h
> > +++ b/xen/arch/x86/include/asm/mm.h
> > @@ -554,6 +554,18 @@ int cf_check mmio_ro_emulated_write(
> >      enum x86_segment seg, unsigned long offset, void *p_data,
> >      unsigned int bytes, struct x86_emulate_ctxt *ctxt);
> >  
> > +/* r/o MMIO subpage access handlers. */
> > +struct subpage_ro_range {
> > +    struct list_head list;
> > +    mfn_t mfn;
> > +    void __iomem *mapped;
> > +    DECLARE_BITMAP(ro_elems, PAGE_SIZE / MMIO_RO_SUBPAGE_GRAN);
> > +};
> > +struct subpage_ro_range *subpage_mmio_find_page(mfn_t mfn);
> > +void __iomem *subpage_mmio_map_page(struct subpage_ro_range *entry);
> 
> I notice you didn't move the __iomem, which - as indicated - I agree with,
> but Andrew didn't. Did you sort this with him privately?

I will raise with him, seeing as he didn't reply to your last email, I
assumed he was OK with the reasoning?

Thanks, Roger.


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To: Jan Beulich , "xen-devel@lists.xenproject.org"
	
CC: Andrew Cooper , Julien Grall ,
	Stefano Stabellini , Anthony PERARD
	, Michal Orzel ,
	=?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Manuel Andreas
	
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On 2025-04-17 10:08, Jan Beulich wrote:
> Add an early basic check, yielding the same error code as the more
> thorough on the the main handler would produce.

"as the more thorough check in the main handler"...

> Fixes: b8a7efe8528a ("Enable compatibility mode operation for HYPERVISOR_memory_op")
> Reported-by: Manuel Andreas 
> Signed-off-by: Jan Beulich 

With that:

Reviewed-by: Jason Andryuk 


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Date: Thu, 17 Apr 2025 19:07:19 +0200
From: Fabian Specht 
To: Jan Beulich 
Cc: manuel.andreas@tum.de, xen-devel@lists.xenproject.org
Subject: Re: x86 emulation bug
Message-ID: 
References: 
 <910868c1-fc90-49ec-bd06-3ff638ff0c1d@suse.com>
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> Thanks for the report. However, already on Andreas' report on the day before
> yesterday I was heavily inclined to ask about details you certainly have
> figured out already. I find it odd that you leave to us all re-figuring out.
> In this case, for example: Is the specific value you set %eax to relevant?
> (Probably not.) Is the specific value you set %rcx to relevant? (Probably
> not, but likely some part of it is.) Is the specific value you set %rdi to
> relevant? (Probably not, but likely some part of it is. Probably you
> setting it to 0 is also why the adjustment below is needed, and using a
> different value might permit avoiding that adjustment.) Is it relevant
> that you set EFLAGS.DF? (Quite likely.)
> 
> Any other investigation results you may have collected would likely also
> make our job easier.

I understand that. We did not actually dig that deep into the bug, so
there was not that much we could've shared to be honest. Also, we are
currently busy with a paper, so our main intention was to report the
bugs as quickly as possible and get the paper done before the deadline :)
However, I'll remember it for the next time!

Fabian


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On 07/04/2025 4:48 pm, Jan Beulich wrote:
> On 07.04.2025 17:35, Andrew Cooper wrote:
>> Unlike the WRMSR side, we can't use asm goto() unconditionally, because our
>> toolchain baseline doesn't support asm goto with outputs.
> Is there actually a benefit we gain from now needing to maintain two different
> pieces of logic fulfilling the same purpose?

IMO, yes.  Besides getting rid of .fixup/unlikely, the code generation
is better-enough to warrant it, including getting the common path
correct (the referenced labels are all considered cold).

e.g. for this change, we go from:

    xor    %esi,%esi
    rdmsr
    test   %esi,%esi
    jne    
    and    $0xfffffffe,%edx
    wrmsr

(note the forward branch) to simply:

    rdmsr
    and    $0xfffffffe,%edx
    wrmsr

because the exception table redirect is directly into init_amd.cold, and
we don't have to hold `int err` in a register across the asm() block.

This is an intentionally simple example to get the infrastructure in,
but vmread() will definitely benefit.

>
>> Also, there's a different errata workaround we'll need if we want to use asm
>> goto() with "+" constraints:
>>
>> config CC_HAS_ASM_GOTO_TIED_OUTPUT
>> 	depends on CC_HAS_ASM_GOTO_OUTPUT
>> 	# Detect buggy gcc and clang, fixed in gcc-11 clang-14.
>> 	def_bool $(success,echo 'int foo(int *x) { asm goto (".long (%l[bar]) - .": "+m"(*x) ::: bar); return *x; bar: return 0; }' | $CC -x c - -c -o /dev/null)
>>
>> I'm tempted to put it in straight away, lest we forget about it.
> Perhaps best if we really want to go this route. Yet then - why "TIED"? Isn't
> "tied" the term they use when referring to an earlier operand by using a
> digit (or the operand's name in square brackets)?

This is straight from Linux.  I've not looked at the issue in detail.

>
>> --- a/xen/Kconfig
>> +++ b/xen/Kconfig
>> @@ -41,6 +41,20 @@ config CC_SPLIT_SECTIONS
>>  config CC_HAS_UBSAN
>>  	def_bool $(cc-option,-fsanitize=undefined)
>>  
>> +# Fixed in GCC 14, 13.3, 12.4 and 11.5
>> +# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113921
>> +config GCC_ASM_GOTO_OUTPUT_BROKEN
>> +	bool
>> +	depends on CC_IS_GCC
>> +	default y if GCC_VERSION < 110500
>> +	default y if GCC_VERSION >= 120000 && GCC_VERSION < 120400
>> +	default y if GCC_VERSION >= 130000 && GCC_VERSION < 130300
> Unlike for pre-release versions (x.0.y) I view this as problematic. Distros
> are likely to have backported the fix before the minor releases took place.
> Or they may have backported without ever meaning to follow later minor
> releases. We'd needlessly exclude them here. Imo ...
>
>> +config CC_HAS_ASM_GOTO_OUTPUT
>> +	def_bool y
>> +	depends on !GCC_ASM_GOTO_OUTPUT_BROKEN
>> +	depends on $(success,echo 'int foo(int x) { asm goto ("": "=r"(x) ::: bar); return x; bar: return 0; }' | $(CC) -x c - -c -o /dev/null)
> ... the only option is to actually probe for support as well as the (non-)
> buggy-ness.

There is no sensible way to probe.  It compiles fine, but (AIUI) fails
to spill registers correctly on some paths, which also makes it very
sensitive to other optimisations.

~Andrew


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From: Greg Kroah-Hartman 
To: stable@vger.kernel.org
Cc: Greg Kroah-Hartman ,
	patches@lists.linux.dev,
	Juergen Gross ,
	Stefano Stabellini ,
	Oleksandr Tyshchenko ,
	xen-devel@lists.xenproject.org,
	Kees Cook ,
	Sasha Levin 
Subject: [PATCH 6.14 065/449] xen/mcelog: Add __nonstring annotations for unterminated strings
Date: Thu, 17 Apr 2025 19:45:53 +0200
Message-ID: <20250417175120.603518294@linuxfoundation.org>
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6.14-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Kees Cook 

[ Upstream commit 1c3dfc7c6b0f551fdca3f7c1f1e4c73be8adb17d ]

When a character array without a terminating NUL character has a static
initializer, GCC 15's -Wunterminated-string-initialization will only
warn if the array lacks the "nonstring" attribute[1]. Mark the arrays
with __nonstring to and correctly identify the char array as "not a C
string" and thereby eliminate the warning.

Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117178 [1]
Cc: Juergen Gross 
Cc: Stefano Stabellini 
Cc: Oleksandr Tyshchenko 
Cc: xen-devel@lists.xenproject.org
Signed-off-by: Kees Cook 
Acked-by: Juergen Gross 
Message-ID: <20250310222234.work.473-kees@kernel.org>
Signed-off-by: Juergen Gross 
Signed-off-by: Sasha Levin 
---
 include/xen/interface/xen-mca.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/xen/interface/xen-mca.h b/include/xen/interface/xen-mca.h
index 464aa6b3a5f92..1c9afbe8cc260 100644
--- a/include/xen/interface/xen-mca.h
+++ b/include/xen/interface/xen-mca.h
@@ -372,7 +372,7 @@ struct xen_mce {
 #define XEN_MCE_LOG_LEN 32
 
 struct xen_mce_log {
-	char signature[12]; /* "MACHINECHECK" */
+	char signature[12] __nonstring; /* "MACHINECHECK" */
 	unsigned len;	    /* = XEN_MCE_LOG_LEN */
 	unsigned next;
 	unsigned flags;
-- 
2.39.5





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From: Greg Kroah-Hartman 
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Cc: Greg Kroah-Hartman ,
	patches@lists.linux.dev,
	Juergen Gross ,
	Stefano Stabellini ,
	Oleksandr Tyshchenko ,
	xen-devel@lists.xenproject.org,
	Kees Cook ,
	Sasha Levin 
Subject: [PATCH 6.13 056/414] xen/mcelog: Add __nonstring annotations for unterminated strings
Date: Thu, 17 Apr 2025 19:46:54 +0200
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6.13-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Kees Cook 

[ Upstream commit 1c3dfc7c6b0f551fdca3f7c1f1e4c73be8adb17d ]

When a character array without a terminating NUL character has a static
initializer, GCC 15's -Wunterminated-string-initialization will only
warn if the array lacks the "nonstring" attribute[1]. Mark the arrays
with __nonstring to and correctly identify the char array as "not a C
string" and thereby eliminate the warning.

Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117178 [1]
Cc: Juergen Gross 
Cc: Stefano Stabellini 
Cc: Oleksandr Tyshchenko 
Cc: xen-devel@lists.xenproject.org
Signed-off-by: Kees Cook 
Acked-by: Juergen Gross 
Message-ID: <20250310222234.work.473-kees@kernel.org>
Signed-off-by: Juergen Gross 
Signed-off-by: Sasha Levin 
---
 include/xen/interface/xen-mca.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/xen/interface/xen-mca.h b/include/xen/interface/xen-mca.h
index 464aa6b3a5f92..1c9afbe8cc260 100644
--- a/include/xen/interface/xen-mca.h
+++ b/include/xen/interface/xen-mca.h
@@ -372,7 +372,7 @@ struct xen_mce {
 #define XEN_MCE_LOG_LEN 32
 
 struct xen_mce_log {
-	char signature[12]; /* "MACHINECHECK" */
+	char signature[12] __nonstring; /* "MACHINECHECK" */
 	unsigned len;	    /* = XEN_MCE_LOG_LEN */
 	unsigned next;
 	unsigned flags;
-- 
2.39.5





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Date: Thu, 17 Apr 2025 18:34:13 +0000
To: Stefano Stabellini 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, cardoe@cardoe.com, marmarek@invisiblethingslab.com, dmukhin@ford.com
Subject: Re: [PATCH v1 2/4] CI: switch x86 EFI smoke test runner to qemu-xtf.sh
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On Wed, Apr 16, 2025 at 05:14:41PM -0700, Stefano Stabellini wrote:
> On Wed, 16 Apr 2025, dmkhn@proton.me wrote:
> > From: Denis Mukhin 
> >
> > Use qemu-xtf.sh for qemu-smoke-x86-64-gcc-efi job.
> >
> > Lead time is reduced a bit since not all XTF code base is built, just t=
he
> > required test.
> >
> > Signed-off-by: Denis Mukhin 
> > ---
> >  automation/gitlab-ci/test.yaml                |  2 +-
> >  .../include/configs/xtf-x86-64-efi-config     |  0
> >  automation/scripts/include/xtf-x86-64-efi     | 52 +++++++++++++++++++
> >  automation/scripts/qemu-smoke-x86-64-efi.sh   | 43 ---------------
> >  4 files changed, 53 insertions(+), 44 deletions(-)
> >  create mode 100644 automation/scripts/include/configs/xtf-x86-64-efi-c=
onfig
> >  create mode 100644 automation/scripts/include/xtf-x86-64-efi
> >  delete mode 100755 automation/scripts/qemu-smoke-x86-64-efi.sh
> >
> > diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test=
.yaml
> > index 3adc841335..ca1e4eb528 100644
> > --- a/automation/gitlab-ci/test.yaml
> > +++ b/automation/gitlab-ci/test.yaml
> > @@ -687,7 +687,7 @@ qemu-smoke-x86-64-clang-pvh:
> >  qemu-smoke-x86-64-gcc-efi:
> >    extends: .qemu-smoke-x86-64
> >    script:
> > -    - ./automation/scripts/qemu-smoke-x86-64-efi.sh pv 2>&1 | tee ${LO=
GFILE}
> > +    - ./automation/scripts/qemu-xtf.sh x86-64-efi hvm64 example 2>&1 |=
 tee ${LOGFILE}
> >    needs:
> >      - debian-12-x86_64-gcc-debug
> >
> > diff --git a/automation/scripts/include/configs/xtf-x86-64-efi-config b=
/automation/scripts/include/configs/xtf-x86-64-efi-config
> > new file mode 100644
> > index 0000000000..e69de29bb2
> > diff --git a/automation/scripts/include/xtf-x86-64-efi b/automation/scr=
ipts/include/xtf-x86-64-efi
> > new file mode 100644
> > index 0000000000..79622d5a6c
> > --- /dev/null
> > +++ b/automation/scripts/include/xtf-x86-64-efi
> > @@ -0,0 +1,52 @@
> > +#!/bin/bash
> > +#
> > +# XTF test utilities (x86_64, EFI).
> > +#
> > +
> > +# Arch-specific environment overrides.
> > +function xtf_arch_prepare()
> > +{
> > +    export FW_PREFIX=3D"${FW_PREFIX:-/usr/share/OVMF/}"
> > +    export QEMU_PREFIX=3D"${QEMU_PREFIX:-}"
> > +    export XEN_BINARY=3D"${XEN_BINARY:-${WORKDIR}/xen.efi}"
>=20
> Any chance we can avoid using WORKDIR? Or alternatively, we can remove
> TOP? Or remove both? :-)

Yeah, it grew a bit convoluted, but I decided to give it a try to collect
opinions.

Thanks for the feedback!

These two variables have different meanings:

- WORKDIR is a scratch location for keeping artifacts like DTB,
  EFI config, imagebuilder config.

- TOP (looks like at the very least needs a better name) is the helper
  variable pointint to the location of automation/scripts.
 =20
>=20
> Maybe it is best to keep WORKDIR and remove TOP, I am not sure. I am
> just trying to reduce the amount of variables used and that we depend
> upon.

I think it should be easy to drop TOP.

>=20
> I assume you tested the pipeline and it worked, right?

Yes, the pipeline is green:

  https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines/1770437024

>=20
>=20
> > +    export XEN_CONSOLE=3D"${XEN_CONSOLE:-com1}"
> > +    export XTF_SRC_BRANCH=3D"${XTF_SRC_BRANCH:-master}"
> > +    export XTF_SRC_URI=3D"${XTF_SRC_URI:-https://xenbits.xen.org/git-h=
ttp/xtf.git}"
> > +    export XTF_SRC_VARIANTS=3D"hvm64 pv64"
> > +}
> > +
> > +# Perform arch-specific XTF environment setup.
> > +function xtf_arch_setup()
> > +{
> > +    local esp_dir=3D"${WORKDIR}/boot-esp"
> > +    local efi_dir=3D"${esp_dir}/EFI/BOOT"
> > +
> > +    # Generate EFI boot environment
> > +    mkdir -p ${efi_dir}
> > +    cp ${XEN_BINARY} ${efi_dir}/BOOTX64.EFI
> > +    cp ${XTF_BINARY} ${efi_dir}/kernel
> > +
> > +    cat > ${efi_dir}/BOOTX64.cfg < > +[global]
> > +default=3Dtest
> > +
> > +[test]
> > +options=3D${XEN_CMDLINE}
> > +kernel=3Dkernel
> > +EOF
> > +
> > +    # NB: OVMF_CODE.fd is read-only, no need to copy
> > +    cp ${FW_PREFIX}OVMF_VARS.fd ${WORKDIR}
> > +
> > +    export TEST_CMD=3D"${QEMU_PREFIX}qemu-system-x86_64 \
> > +        -no-reboot \
> > +        -nographic \
> > +        -monitor none \
> > +        -serial stdio \
> > +        -m 512 \
> > +        -M q35,kernel-irqchip=3Dsplit \
> > +        -drive if=3Dpflash,format=3Draw,readonly=3Don,file=3D${FW_PREF=
IX}OVMF_CODE.fd \
> > +        -drive if=3Dpflash,format=3Draw,file=3D${WORKDIR}/OVMF_VARS.fd=
 \
> > +        -drive file=3Dfat:rw:${esp_dir},media=3Ddisk,index=3D0,format=
=3Draw \
> > +    "
> > +}
> > diff --git a/automation/scripts/qemu-smoke-x86-64-efi.sh b/automation/s=
cripts/qemu-smoke-x86-64-efi.sh
> > deleted file mode 100755
> > index 7572722be6..0000000000
> > --- a/automation/scripts/qemu-smoke-x86-64-efi.sh
> > +++ /dev/null
> > @@ -1,43 +0,0 @@
> > -#!/bin/bash
> > -
> > -set -ex -o pipefail
> > -
> > -# variant should be either pv or pvh
> > -variant=3D$1
> > -
> > -# Clone and build XTF
> > -git clone https://xenbits.xen.org/git-http/xtf.git
> > -cd xtf && make -j$(nproc) && cd -
> > -
> > -case $variant in
> > -    pvh) k=3Dtest-hvm64-example    extra=3D"dom0-iommu=3Dnone dom0=3Dp=
vh" ;;
> > -    *)   k=3Dtest-pv64-example     extra=3D ;;
> > -esac
> > -
> > -mkdir -p boot-esp/EFI/BOOT
> > -cp binaries/xen.efi boot-esp/EFI/BOOT/BOOTX64.EFI
> > -cp xtf/tests/example/$k boot-esp/EFI/BOOT/kernel
> > -
> > -cat > boot-esp/EFI/BOOT/BOOTX64.cfg < > -[global]
> > -default=3Dtest
> > -
> > -[test]
> > -options=3Dloglvl=3Dall console=3Dcom1 noreboot console_timestamps=3Dbo=
ot $extra
> > -kernel=3Dkernel
> > -EOF
> > -
> > -cp /usr/share/OVMF/OVMF_CODE.fd OVMF_CODE.fd
> > -cp /usr/share/OVMF/OVMF_VARS.fd OVMF_VARS.fd
> > -
> > -rm -f smoke.serial
> > -export TEST_CMD=3D"qemu-system-x86_64 -nographic -M q35,kernel-irqchip=
=3Dsplit \
> > -        -drive if=3Dpflash,format=3Draw,readonly=3Don,file=3DOVMF_CODE=
.fd \
> > -        -drive if=3Dpflash,format=3Draw,file=3DOVMF_VARS.fd \
> > -        -drive file=3Dfat:rw:boot-esp,media=3Ddisk,index=3D0,format=3D=
raw \
> > -        -m 512 -monitor none -serial stdio"
> > -
> > -export TEST_LOG=3D"smoke.serial"
> > -export PASSED=3D"Test result: SUCCESS"
> > -
> > -./automation/scripts/console.exp | sed 's/\r\+$//'
> > --
> > 2.34.1
> >
> >



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Message-ID: <3930d99e-d35c-4170-be09-01abc7be51df@citrix.com>
Date: Thu, 17 Apr 2025 19:34:56 +0100
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Subject: Re: [PATCH] compat/memory: avoid UB shifts in XENMEM_exchange
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To: Jan Beulich ,
 "xen-devel@lists.xenproject.org" 
Cc: Julien Grall , Stefano Stabellini
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On 17/04/2025 3:08 pm, Jan Beulich wrote:
> Add an early basic check, yielding the same error code as the more
> thorough on the the main handler would produce.
>
> Fixes: b8a7efe8528a ("Enable compatibility mode operation for HYPERVISOR_memory_op")
> Reported-by: Manuel Andreas 
> Signed-off-by: Jan Beulich 

Reviewed-by: Andrew Cooper 


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Date: Thu, 17 Apr 2025 18:37:56 +0000
To: Stefano Stabellini 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, cardoe@cardoe.com, marmarek@invisiblethingslab.com, dmukhin@ford.com
Subject: Re: [PATCH v1 4/4] CI: add argo x86 XTF test
Message-ID: 
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References: <20250416053213.921444-1-dmukhin@ford.com> <20250416053213.921444-5-dmukhin@ford.com> 
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On Wed, Apr 16, 2025 at 05:11:51PM -0700, Stefano Stabellini wrote:
> On Wed, 16 Apr 2025, dmkhn@proton.me wrote:
> > From: Denis Mukhin 
> >
> > Introduce new CI job to run x86 XTF argo test under QEMU to smoke test =
argo
> > feature functionality in upstream CI.
> >
> > The new job lead time is ~30s, limit max job duration to 60s.
> >
> > Signed-off-by: Denis Mukhin 
> > ---
> >  automation/gitlab-ci/test.yaml        | 9 +++++++++
> >  automation/scripts/include/xtf-runner | 7 +++++++
> >  2 files changed, 16 insertions(+)
> >
> > diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test=
.yaml
> > index d6e4a0a622..9001efb45c 100644
> > --- a/automation/gitlab-ci/test.yaml
> > +++ b/automation/gitlab-ci/test.yaml
> > @@ -691,6 +691,15 @@ qemu-smoke-x86-64-gcc-efi:
> >    needs:
> >      - debian-12-x86_64-gcc-debug
> >
> > +qemu-xtf-argo-x86_64-gcc-debug:
> > +  extends: .qemu-smoke-x86-64
> > +  variables:
> > +    TEST_TIMEOUT_OVERRIDE: 60
> > +  script:
> > +    - ./automation/scripts/qemu-xtf.sh x86-64 pv64 argo 2>&1 | tee ${L=
OGFILE}
> > +  needs:
> > +    - alpine-3.18-gcc-debug
> > +
> >  qemu-smoke-riscv64-gcc:
> >    extends: .qemu-riscv64
> >    script:
> > diff --git a/automation/scripts/include/xtf-runner b/automation/scripts=
/include/xtf-runner
> > index 55b7b34b89..12470b3979 100644
> > --- a/automation/scripts/include/xtf-runner
> > +++ b/automation/scripts/include/xtf-runner
> > @@ -70,6 +70,9 @@ function xtf_build_cmdline()
> >      local xtf_variant=3D$1
> >      local xtf_name=3D$2
> >      declare -a cmdline=3D()
> > +    declare -A per_test_args=3D(
> > +        [argo]=3D"argo=3D1 mac-permissive=3D1"
> > +    )
> > +
> >      cmdline+=3D("loglvl=3Dall noreboot console_timestamps=3Dboot")
> >      cmdline+=3D("console=3D${XEN_CONSOLE}")
> > @@ -79,6 +82,10 @@ function xtf_build_cmdline()
> >          cmdline+=3D("dom0-iommu=3Dnone dom0=3Dpvh")
> >      fi
> >
> > +    if [[ -v per_test_args[${xtf_name}] ]]; then
> > +        cmdline+=3D("${per_test_args[${xtf_name}]}")
> > +    fi
> > +
>=20
> This is all within the same bash function so I think we could avoid
> using the per_test_args array and just do:
>=20
> if test "$xtf_name"
> then
>     cmdline+=3D("argo=3D1 mac-permissive=3D1")
> fi
>=20
> The indirection is not required as far as I can tell. I do realize it is
> a matter of taste and it works either way so I wouldn't insist.

Some XTFs may need special configuration.
I added this to be a placeholder for test-specific Xen run-time configurati=
on.

>=20
>=20
>=20
> >      export XEN_CMDLINE=3D"${cmdline[@]}"
> >  }
> >
> > --
> > 2.34.1
> >
> >



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From: Greg Kroah-Hartman 
To: stable@vger.kernel.org
Cc: Greg Kroah-Hartman ,
	patches@lists.linux.dev,
	Juergen Gross ,
	Stefano Stabellini ,
	Oleksandr Tyshchenko ,
	xen-devel@lists.xenproject.org,
	Kees Cook ,
	Sasha Levin 
Subject: [PATCH 6.12 057/393] xen/mcelog: Add __nonstring annotations for unterminated strings
Date: Thu, 17 Apr 2025 19:47:46 +0200
Message-ID: <20250417175109.882985709@linuxfoundation.org>
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6.12-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Kees Cook 

[ Upstream commit 1c3dfc7c6b0f551fdca3f7c1f1e4c73be8adb17d ]

When a character array without a terminating NUL character has a static
initializer, GCC 15's -Wunterminated-string-initialization will only
warn if the array lacks the "nonstring" attribute[1]. Mark the arrays
with __nonstring to and correctly identify the char array as "not a C
string" and thereby eliminate the warning.

Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117178 [1]
Cc: Juergen Gross 
Cc: Stefano Stabellini 
Cc: Oleksandr Tyshchenko 
Cc: xen-devel@lists.xenproject.org
Signed-off-by: Kees Cook 
Acked-by: Juergen Gross 
Message-ID: <20250310222234.work.473-kees@kernel.org>
Signed-off-by: Juergen Gross 
Signed-off-by: Sasha Levin 
---
 include/xen/interface/xen-mca.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/xen/interface/xen-mca.h b/include/xen/interface/xen-mca.h
index 464aa6b3a5f92..1c9afbe8cc260 100644
--- a/include/xen/interface/xen-mca.h
+++ b/include/xen/interface/xen-mca.h
@@ -372,7 +372,7 @@ struct xen_mce {
 #define XEN_MCE_LOG_LEN 32
 
 struct xen_mce_log {
-	char signature[12]; /* "MACHINECHECK" */
+	char signature[12] __nonstring; /* "MACHINECHECK" */
 	unsigned len;	    /* = XEN_MCE_LOG_LEN */
 	unsigned next;
 	unsigned flags;
-- 
2.39.5





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To: Stefano Stabellini 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, cardoe@cardoe.com, marmarek@invisiblethingslab.com, dmukhin@ford.com
Subject: Re: [PATCH v1 1/4] CI: unify x86 XTF test runner
Message-ID: 
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On Wed, Apr 16, 2025 at 05:16:49PM -0700, Stefano Stabellini wrote:
> On Wed, 16 Apr 2025, dmkhn@proton.me wrote:
> > From: Denis Mukhin 
> >
> > Add test runner script qemu-xtf.sh which is allows any XTF x86 test to =
be
> > easily executed. Test runner is invoked from the qemu-smoke* jobs with =
the
> > hardcoded parameters.
> >
> > Each x86 XTF job lead time is reduced a bit since only the test-related=
 code
> > is built, not the entire XTF project.
> >
> > Add .gitignore to avoid committing test artifacts by mistake.
> >
> > Signed-off-by: Denis Mukhin 
> > ---
> >  automation/gitlab-ci/test.yaml                |   8 +-
> >  automation/scripts/.gitignore                 |   6 +
> >  .../scripts/include/configs/xtf-x86-64-config |   0
> >  automation/scripts/include/xtf-runner         | 134 ++++++++++++++++++
> >  automation/scripts/include/xtf-x86-64         |  31 ++++
> >  automation/scripts/qemu-smoke-x86-64.sh       |  26 ----
> >  automation/scripts/qemu-xtf.sh                |  26 ++++
> >  7 files changed, 201 insertions(+), 30 deletions(-)
> >  create mode 100644 automation/scripts/.gitignore
> >  create mode 100644 automation/scripts/include/configs/xtf-x86-64-confi=
g
> >  create mode 100644 automation/scripts/include/xtf-runner
> >  create mode 100644 automation/scripts/include/xtf-x86-64
> >  delete mode 100755 automation/scripts/qemu-smoke-x86-64.sh
> >  create mode 100755 automation/scripts/qemu-xtf.sh
> >
> > diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test=
.yaml
> > index 5ce445b78f..3adc841335 100644
> > --- a/automation/gitlab-ci/test.yaml
> > +++ b/automation/gitlab-ci/test.yaml
> > @@ -659,28 +659,28 @@ qemu-alpine-x86_64-gcc:
> >  qemu-smoke-x86-64-gcc:
> >    extends: .qemu-smoke-x86-64
> >    script:
> > -    - ./automation/scripts/qemu-smoke-x86-64.sh pv 2>&1 | tee ${LOGFIL=
E}
> > +    - ./automation/scripts/qemu-xtf.sh x86-64 pv64 example 2>&1 | tee =
${LOGFILE}
> >    needs:
> >      - debian-12-x86_64-gcc-debug
> >
> >  qemu-smoke-x86-64-clang:
> >    extends: .qemu-smoke-x86-64
> >    script:
> > -    - ./automation/scripts/qemu-smoke-x86-64.sh pv 2>&1 | tee ${LOGFIL=
E}
> > +    - ./automation/scripts/qemu-xtf.sh x86-64 pv64 example 2>&1 | tee =
${LOGFILE}
> >    needs:
> >      - debian-12-x86_64-clang-debug
> >
> >  qemu-smoke-x86-64-gcc-pvh:
> >    extends: .qemu-smoke-x86-64
> >    script:
> > -    - ./automation/scripts/qemu-smoke-x86-64.sh pvh 2>&1 | tee ${LOGFI=
LE}
> > +    - ./automation/scripts/qemu-xtf.sh x86-64 hvm64 example 2>&1 | tee=
 ${LOGFILE}
> >    needs:
> >      - debian-12-x86_64-gcc-debug
> >
> >  qemu-smoke-x86-64-clang-pvh:
> >    extends: .qemu-smoke-x86-64
> >    script:
> > -    - ./automation/scripts/qemu-smoke-x86-64.sh pvh 2>&1 | tee ${LOGFI=
LE}
> > +    - ./automation/scripts/qemu-xtf.sh x86-64 hvm64 example 2>&1 | tee=
 ${LOGFILE}
> >    needs:
> >      - debian-12-x86_64-clang-debug
> >
> > diff --git a/automation/scripts/.gitignore b/automation/scripts/.gitign=
ore
> > new file mode 100644
> > index 0000000000..2f2d6e1ebd
> > --- /dev/null
> > +++ b/automation/scripts/.gitignore
> > @@ -0,0 +1,6 @@
> > +!include
> > +
> > +binaries
> > +smoke.serial
> > +xen
> > +xtf*/
>=20
> I am not sure this works as intended: I thought the paths are relative
> to the location of the .gitignore file, but I could be wrong.

git allows .gitignore at any level in the source tree so that lenghty
paths could be avoided.

>=20
>=20
> > diff --git a/automation/scripts/include/configs/xtf-x86-64-config b/aut=
omation/scripts/include/configs/xtf-x86-64-config
> > new file mode 100644
> > index 0000000000..e69de29bb2
> > diff --git a/automation/scripts/include/xtf-runner b/automation/scripts=
/include/xtf-runner
> > new file mode 100644
> > index 0000000000..55b7b34b89
> > --- /dev/null
> > +++ b/automation/scripts/include/xtf-runner
> > @@ -0,0 +1,134 @@
> > +#!/bin/bash
> > +#
> > +# XTF test utilities.
> > +#
> > +# Environment variables:
> > +#   BOOT_MSG: Expected boot message
> > +#   FW_PREFIX: Firmware images path including '/' at the end
> > +#   PASSED: XTF test printout in case of a pass
> > +#   QEMU_PREFIX: QEMU path including '/' at the end
> > +#   TEST_LOG: Output log file
> > +#   UBOOT_CMD: U-Boot command line
> > +#   WORKDIR: Test working directory
> > +#   XEN_BINARY: Xen binary location
> > +#   XEN_CONSOLE: Xen console device name
> > +#   XTF_SRC_CONFIG: XTF config file
> > +#   XTF_SRC_BRANCH: XTF branch
> > +#   XTF_SRC_URI: XTF source code URI
> > +
> > +function die()
> > +{
> > +    set +x
> > +    echo "FATAL: $*" >&2
> > +    exit 1
> > +}
> > +
> > +[ -z "$TOP" ] && die "\$TOP is not set"
> > +
> > +# Output log file
> > +TEST_LOG=3D"${TEST_LOG:-smoke.serial}"
> > +# XTF test printout in case of a pass
> > +PASSED=3D"${PASSED:-Test result: SUCCESS}"
> > +# Expected boot message
> > +BOOT_MSG=3D"${BOOT_MSG:-Latest ChangeSet: }"
> > +# Test working directory
> > +WORKDIR=3D"${WORKDIR:-binaries}"
> > +# XTF source code
> > +XTF_SRC_CONFIG=3D"${XTF_CONFIG:-${TOP}/include/configs/xtf-${ARCH}-con=
fig}"
>=20
> Should this be  XTF_SRC_CONFIG=3D"${XTF_SRC_CONFIG:-  ?

Thanks for the catch!

>=20
>=20
> > +# Build an XTF test binary.
> > +# $1 Test variant.
> > +# $2 Test name.
> > +function xtf_build_binary()
> > +{
> > +    local xtf_variant=3D$1
> > +    local xtf_name=3D$2
> > +    local xtf_dir=3D"xtf-${ARCH}"
> > +
> > +    # Crude check for local testing
> > +    if [ ! -d ${xtf_dir}/.git ]; then
> > +        git clone ${XTF_SRC_URI} ${xtf_dir} -b ${XTF_SRC_BRANCH}
> > +    fi
> > +
> > +    make \
> > +        -C ${xtf_dir} \
> > +        -j$(nproc) \
> > +        $(tr '\n' ' ' < ${XTF_SRC_CONFIG}) \
> > +        TESTS=3Dtests/${xtf_name}
> > +
> > +    export XTF_NAME=3D"${xtf_name}"
> > +    export XTF_VARIANT=3D"${xtf_variant}"
> > +    export XTF_WORKDIR=3D"$(readlink -f ${xtf_dir})"
> > +    export XTF_BINARY=3D"${XTF_WORKDIR}/tests/${xtf_name}/test-${xtf_v=
ariant}-${xtf_name}"
> > +}
> > +
> > +# Build Xen command line for running an XTF test.
> > +# $1 Test variant.
> > +# $2 Test name.
> > +function xtf_build_cmdline()
> > +{
> > +    local xtf_variant=3D$1
> > +    local xtf_name=3D$2
> > +    declare -a cmdline=3D()
> > +
> > +    cmdline+=3D("loglvl=3Dall noreboot console_timestamps=3Dboot")
> > +    cmdline+=3D("console=3D${XEN_CONSOLE}")
> > +
> > +    # NB: OK to have hvm64, which is x86-only variant
> > +    if [[ $xtf_variant =3D=3D "hvm64" ]]; then
> > +        cmdline+=3D("dom0-iommu=3Dnone dom0=3Dpvh")
> > +    fi
> > +
> > +    export XEN_CMDLINE=3D"${cmdline[@]}"
> > +}
> > +
> > +# Build an XTF test environment.
> > +# $1 Test variant.
> > +# $2 Test name.
> > +function xtf_build_test()
> > +{
> > +    local v=3D$1
> > +    local xtf_name=3D$2
> > +    local xtf_variant=3D""
> > +
> > +    for x in ${XTF_SRC_VARIANTS}; do
> > +        if [[ "${x}" =3D=3D "${v}" ]]; then
> > +            xtf_variant=3D${v}
> > +            break
> > +        fi
> > +    done
> > +    if [[ -z $xtf_variant ]]; then
> > +        die "unsupported test variant '$1', supported variants: ${XTF_=
SRC_VARIANTS}"
> > +    fi
> > +
> > +    xtf_build_binary ${xtf_variant} ${xtf_name}
> > +    xtf_build_cmdline ${xtf_variant} ${xtf_name}
> > +}
> > +
> > +# Execute an XTF test.
> > +function xtf_run_test()
> > +{
> > +    rm -f ${TEST_LOG}
> > +    export BOOT_MSG PASSED TEST_CMD TEST_LOG UBOOT_CMD
> > +    ${TOP}/console.exp | sed 's/\r\+$//'
> > +}
> > +
> > +# Setup environment and run an XTF test.
> > +# $1 Test variant.
> > +# $2 Test name.
> > +function xtf_test()
> > +{
> > +    # Out: FW_*, QEMU_*, XEN_{BINARY,CONSOLE}, XTF_SRC_*
> > +    xtf_arch_prepare
> > +
> > +    # In: XTF_SRC_*
> > +    # OUt: XTF_{BINARY,NAME,VARIANT,WORKDIR} and XEN_CMDLINE
> > +    xtf_build_test $@
> > +
> > +    # In: FW_*, QEMU_*, XTF_*, XEN_*
> > +    # Out: BOOT_MSG, PASSED, TEST_{CMD,LOG}, UBOOT_CMD
> > +    xtf_arch_setup
> > +
> > +    # In: BOOT_MSG, PASSED, TEST_{CMD,LOG}, UBOOT_CMD
> > +    xtf_run_test
> > +}
> > diff --git a/automation/scripts/include/xtf-x86-64 b/automation/scripts=
/include/xtf-x86-64
> > new file mode 100644
> > index 0000000000..edddf18b38
> > --- /dev/null
> > +++ b/automation/scripts/include/xtf-x86-64
> > @@ -0,0 +1,31 @@
> > +#!/bin/bash
> > +#
> > +# XTF test utilities (x86_64).
> > +#
> > +
> > +# Arch-specific environment overrides.
> > +function xtf_arch_prepare()
> > +{
> > +    export FW_PREFIX=3D"${FW_PREFIX:-}"
> > +    export QEMU_PREFIX=3D"${QEMU_PREFIX:-}"
>=20
> It looks like QEMU_PREFIX is only used within this file (and other
> similar files in later patches). If so, maybe for the sake of reducing
> global variables and variables in general we could get rid of
> QEMU_PREFIX.

Turned out that Arm and x86 CI jobs use different paths to QEMU binaries.
dev host may have some other location, that's why I parameterized QEMU
location.

>=20
>=20
> > +    export XEN_BINARY=3D"${XEN_BINARY:-${WORKDIR}/xen}"
> > +    export XEN_CONSOLE=3D"${XEN_CONSOLE:-com1}"
>=20
> Instead of XEN_CONSOLE, I'd suggest to have an arch-specific variable
> for Xen command line options where we can put the console as well as
> other things. However, it is also totally fine as is.

I initially did that, but then there's a big portion of command line parame=
ters
which is shared across all supported architectures, with console=3D pointin=
g to
arch-specific console device.

I will add arch-specific variable and drop XEN_CONSOLE.

>=20
> In fact, I think you went above and beyond in terms of generic
> abstractions, and I think it would have been OK to go with fewer
> variables, and more ad-hoc custom code.
>=20
>=20
> > +    export XTF_SRC_BRANCH=3D"${XTF_SRC_BRANCH:-master}"
> > +    export XTF_SRC_URI=3D"${XTF_SRC_URI:-https://xenbits.xen.org/git-h=
ttp/xtf.git}"
> > +    export XTF_SRC_VARIANTS=3D"hvm64 pv64"
> > +}
> > +
> > +# Perform arch-specific XTF environment setup.
> > +function xtf_arch_setup()
> > +{
> > +    export TEST_CMD=3D"${QEMU_PREFIX}qemu-system-x86_64 \
> > +        -no-reboot \
> > +        -nographic \
> > +        -monitor none \
> > +        -serial stdio \
> > +        -m 512 \
> > +        -kernel ${XEN_BINARY} \
> > +        -initrd ${XTF_BINARY} \
> > +        -append \"${XEN_CMDLINE}\" \
> > +    "
> > +}
> > diff --git a/automation/scripts/qemu-smoke-x86-64.sh b/automation/scrip=
ts/qemu-smoke-x86-64.sh
> > deleted file mode 100755
> > index da0c26cc2f..0000000000
> > --- a/automation/scripts/qemu-smoke-x86-64.sh
> > +++ /dev/null
> > @@ -1,26 +0,0 @@
> > -#!/bin/bash
> > -
> > -set -ex -o pipefail
> > -
> > -# variant should be either pv or pvh
> > -variant=3D$1
> > -
> > -# Clone and build XTF
> > -git clone https://xenbits.xen.org/git-http/xtf.git
> > -cd xtf && make -j$(nproc) && cd -
> > -
> > -case $variant in
> > -    pvh) k=3Dtest-hvm64-example    extra=3D"dom0-iommu=3Dnone dom0=3Dp=
vh" ;;
> > -    *)   k=3Dtest-pv64-example     extra=3D ;;
> > -esac
> > -
> > -rm -f smoke.serial
> > -export TEST_CMD=3D"qemu-system-x86_64 -nographic -kernel binaries/xen =
\
> > -        -initrd xtf/tests/example/$k \
> > -        -append \"loglvl=3Dall console=3Dcom1 noreboot console_timesta=
mps=3Dboot $extra\" \
> > -        -m 512 -monitor none -serial stdio"
> > -
> > -export TEST_LOG=3D"smoke.serial"
> > -export PASSED=3D"Test result: SUCCESS"
> > -
> > -./automation/scripts/console.exp | sed 's/\r\+$//'
> > diff --git a/automation/scripts/qemu-xtf.sh b/automation/scripts/qemu-x=
tf.sh
> > new file mode 100755
> > index 0000000000..2e16d4aece
> > --- /dev/null
> > +++ b/automation/scripts/qemu-xtf.sh
> > @@ -0,0 +1,26 @@
> > +#!/bin/bash
> > +#
> > +# XTF test runner (QEMU).
> > +#
> > +
> > +set -e -o pipefail
> > +
> > +if [ $# -lt 3 ]; then
> > +    echo "Usage: $(basename $0) ARCH XTF-VARIANT XTF-NAME"
> > +    exit 1
> > +fi
> > +
> > +export ARCH=3D"$1"
> > +shift
> > +
> > +export TOP=3D"$(cd "$(dirname "${BASH_SOURCE[0]}")" &>/dev/null && pwd=
)"
> > +if [ ! -f "${TOP}/include/xtf-${ARCH}" ]; then
> > +    echo "unsupported architecture '${ARCH}'" >&2
> > +    exit 1
> > +fi
>=20
> This seems a bit complex.. maybe we can assume that we are in xen.git/ ?

Will do that.


>=20
>=20
> > +set -x
> > +source ${TOP}/include/xtf-runner
> > +source ${TOP}/include/xtf-${ARCH}
>=20
> So here we could do:
>=20
> source automation/scripts/include/xtf-runner
>=20
> ? Or is it important to be able to detect and calculate the directory?
> If so, why not use TOP=3D$(pwd) or TOP=3D${PWD} or TOP=3D$(dirname "$0")?
> By the way, if we need a variable for the top directory I would call it
> XEN_ROOT instead of TOP.
>=20
> I see the patches are using both TOP and WORKDIR, maybe we can get rid
> of one of them? This is only a matter of taste but I think it would be
> simpler with fewer variables and most of  the others look unavoidable.

I will try to eliminate TOP uses.

>=20
> Everything else looks OK to me.
>=20
>=20
> > +xtf_test $@
> > --
> > 2.34.1
> >
> >



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Date: Thu, 17 Apr 2025 18:51:05 +0000
To: Stefano Stabellini 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, cardoe@cardoe.com, marmarek@invisiblethingslab.com, dmukhin@ford.com
Subject: Re: [PATCH v1 3/4] CI: switch arm64 XTF test runner to qemu-xtf.sh
Message-ID: 
In-Reply-To: 
References: <20250416053213.921444-1-dmukhin@ford.com> <20250416053213.921444-4-dmukhin@ford.com> 
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On Wed, Apr 16, 2025 at 05:12:55PM -0700, Stefano Stabellini wrote:
> On Wed, 16 Apr 2025, dmkhn@proton.me wrote:
> > From: Denis Mukhin 
> >
> > Hook arm64 QEMU configuration to qemu-xtf.sh and use new script in arm6=
4 CI
> > jobs.
> >
> > Signed-off-by: Denis Mukhin 
>=20
> Reviewed-by: Stefano Stabellini 

Thanks!

>=20
>=20
> > ---
> >  automation/gitlab-ci/test.yaml                |  4 +-
> >  automation/scripts/.gitignore                 |  3 +
> >  .../scripts/include/configs/xtf-arm64-config  |  2 +
> >  automation/scripts/include/xtf-arm64          | 81 +++++++++++++++++++
> >  automation/scripts/qemu-xtf-dom0less-arm64.sh | 68 ----------------
> >  5 files changed, 88 insertions(+), 70 deletions(-)
> >  create mode 100644 automation/scripts/include/configs/xtf-arm64-config
> >  create mode 100644 automation/scripts/include/xtf-arm64
> >  delete mode 100755 automation/scripts/qemu-xtf-dom0less-arm64.sh
> >
> > diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test=
.yaml
> > index ca1e4eb528..d6e4a0a622 100644
> > --- a/automation/gitlab-ci/test.yaml
> > +++ b/automation/gitlab-ci/test.yaml
> > @@ -571,7 +571,7 @@ qemu-smoke-dom0less-arm64-gcc-debug-earlyprintk:
> >  qemu-xtf-dom0less-arm64-gcc-hyp-xen-version:
> >    extends: .qemu-arm64
> >    script:
> > -    - ./automation/scripts/qemu-xtf-dom0less-arm64.sh hyp-xen-version =
2>&1 | tee ${LOGFILE}
> > +    - ./automation/scripts/qemu-xtf.sh arm64 mmu64le hyp-xen-version 2=
>&1 | tee ${LOGFILE}
> >    needs:
> >      - alpine-3.18-gcc-arm64
> >      - qemu-system-aarch64-6.0.0-arm64-export
> > @@ -579,7 +579,7 @@ qemu-xtf-dom0less-arm64-gcc-hyp-xen-version:
> >  qemu-xtf-dom0less-arm64-gcc-debug-hyp-xen-version:
> >    extends: .qemu-arm64
> >    script:
> > -    - ./automation/scripts/qemu-xtf-dom0less-arm64.sh hyp-xen-version =
2>&1 | tee ${LOGFILE}
> > +    - ./automation/scripts/qemu-xtf.sh arm64 mmu64le hyp-xen-version 2=
>&1 | tee ${LOGFILE}
> >    needs:
> >      - alpine-3.18-gcc-debug-arm64
> >      - qemu-system-aarch64-6.0.0-arm64-export
> > diff --git a/automation/scripts/.gitignore b/automation/scripts/.gitign=
ore
> > index 2f2d6e1ebd..f853da4d89 100644
> > --- a/automation/scripts/.gitignore
> > +++ b/automation/scripts/.gitignore
> > @@ -1,6 +1,9 @@
> >  !include
> >
> >  binaries
> > +imagebuilder
> >  smoke.serial
> >  xen
> >  xtf*/
> > +
> > +*.rom
> > diff --git a/automation/scripts/include/configs/xtf-arm64-config b/auto=
mation/scripts/include/configs/xtf-arm64-config
> > new file mode 100644
> > index 0000000000..9942740927
> > --- /dev/null
> > +++ b/automation/scripts/include/configs/xtf-arm64-config
> > @@ -0,0 +1,2 @@
> > +CONFIG_GICV2=3Dy
> > +CONFIG_SBSA_UART=3Dy
> > diff --git a/automation/scripts/include/xtf-arm64 b/automation/scripts/=
include/xtf-arm64
> > new file mode 100644
> > index 0000000000..68487fe617
> > --- /dev/null
> > +++ b/automation/scripts/include/xtf-arm64
> > @@ -0,0 +1,81 @@
> > +#!/bin/bash
> > +#
> > +# XTF test utilities (arm64).
> > +#
> > +
> > +# Arch-specific environment overrides.
> > +function xtf_arch_prepare()
> > +{
> > +    export FW_PREFIX=3D"${FW_PREFIX:-/usr/lib/u-boot/qemu_arm64/}"
> > +    export QEMU_PREFIX=3D"${QEMU_PREFIX:-${WORKDIR}/}"
> > +    export XEN_BINARY=3D"${XEN_BINARY:-${WORKDIR}/xen}"
> > +    export XEN_CONSOLE=3D"${XEN_CONSOLE:-dtuart}"
> > +    export XTF_SRC_BRANCH=3D"${XTF_SRC_BRANCH:-xtf-arm}"
> > +    export XTF_SRC_URI=3D"${XTF_SRC_URI:-https://gitlab.com/xen-projec=
t/fusa/xtf.git}"
> > +    export XTF_SRC_VARIANTS=3D"mmu64le"
> > +}
> > +
> > +# Perform arch-specific XTF environment setup.
> > +function xtf_arch_setup()
> > +{
> > +    # QEMU looks for "efi-virtio.rom" even if it is unneeded
> > +    curl -fsSLO https://github.com/qemu/qemu/raw/v5.2.0/pc-bios/efi-vi=
rtio.rom
> > +
> > +    # Crude check for local testing
> > +    if [ ! -d imagebuilder/.git ]; then
> > +        git clone --depth 1 https://gitlab.com/xen-project/imagebuilde=
r.git
> > +    fi
> > +
> > +    cat > ${WORKDIR}/config < > +MEMORY_START=3D"0x40000000"
> > +MEMORY_END=3D"0xC0000000"
> > +
> > +XEN=3D"xen"
> > +DEVICE_TREE=3D"virt-gicv2.dtb"
> > +
> > +XEN_CMD=3D"${XEN_CMDLINE}"
> > +
> > +DOMU_KERNEL[0]=3D"xtf-test"
> > +DOMU_MEM[0]=3D"128"
> > +
> > +NUM_DOMUS=3D1
> > +
> > +LOAD_CMD=3D"tftpb"
> > +UBOOT_SOURCE=3D"boot.source"
> > +UBOOT_SCRIPT=3D"boot.scr"
> > +EOF
> > +    cp ${XTF_BINARY} ${WORKDIR}/xtf-test
> > +
> > +    # Generate virt-gicv2.dtb
> > +    ${WORKDIR}/qemu-system-aarch64 \
> > +        -machine virtualization=3Dtrue \
> > +        -cpu cortex-a57 \
> > +        -machine type=3Dvirt \
> > +        -m 2048 \
> > +        -smp 2 \
> > +        -display none \
> > +        -machine dumpdtb=3D${WORKDIR}/virt-gicv2.dtb
> > +
> > +    # Generate U-Boot environment
> > +    bash -x imagebuilder/scripts/uboot-script-gen \
> > +        -t tftp \
> > +        -d ${WORKDIR}/ \
> > +        -c ${WORKDIR}/config
> > +
> > +    export TEST_CMD=3D"${QEMU_PREFIX}qemu-system-aarch64 \
> > +        -machine virtualization=3Dtrue \
> > +        -cpu cortex-a57 \
> > +        -machine type=3Dvirt \
> > +        -no-reboot \
> > +        -nographic \
> > +        -monitor none \
> > +        -serial stdio \
> > +        -m 2048 \
> > +        -smp 2 \
> > +        -device virtio-net-pci,netdev=3Dn0 \
> > +        -netdev user,id=3Dn0,tftp=3D${WORKDIR} \
> > +        -bios ${FW_PREFIX}u-boot.bin \
> > +    "
> > +
> > +    export UBOOT_CMD=3D"virtio scan; dhcp; tftpb 0x40000000 boot.scr; =
source 0x40000000"
> > +}
> > diff --git a/automation/scripts/qemu-xtf-dom0less-arm64.sh b/automation=
/scripts/qemu-xtf-dom0less-arm64.sh
> > deleted file mode 100755
> > index 436f460c3c..0000000000
> > --- a/automation/scripts/qemu-xtf-dom0less-arm64.sh
> > +++ /dev/null
> > @@ -1,68 +0,0 @@
> > -#!/bin/bash
> > -
> > -set -ex -o pipefail
> > -
> > -# Name of the XTF test
> > -xtf_test=3D$1
> > -
> > -# Message returned by XTF in case of success
> > -passed=3D"Test result: SUCCESS"
> > -
> > -# XXX QEMU looks for "efi-virtio.rom" even if it is unneeded
> > -curl -fsSLO https://github.com/qemu/qemu/raw/v5.2.0/pc-bios/efi-virtio=
.rom
> > -./binaries/qemu-system-aarch64 \
> > -   -machine virtualization=3Dtrue \
> > -   -cpu cortex-a57 -machine type=3Dvirt \
> > -   -m 2048 -smp 2 -display none \
> > -   -machine dumpdtb=3Dbinaries/virt-gicv2.dtb
> > -
> > -# XTF
> > -# Build a single XTF test passed as a first parameter to the script.
> > -# Build XTF with GICv2 support to match Qemu configuration and with SB=
SA UART
> > -# support, so that the test will use an emulated UART for printing mes=
sages.
> > -# This will allow us to run the test on both debug and non-debug Xen b=
uilds.
> > -rm -rf xtf
> > -git clone https://gitlab.com/xen-project/fusa/xtf.git -b xtf-arm
> > -make -C xtf TESTS=3Dtests/${xtf_test} CONFIG_SBSA_UART=3Dy CONFIG_GICV=
2=3Dy -j$(nproc)
> > -cp xtf/tests/${xtf_test}/test-mmu64le-${xtf_test} binaries/xtf-test
> > -
> > -# ImageBuilder
> > -echo 'MEMORY_START=3D"0x40000000"
> > -MEMORY_END=3D"0xC0000000"
> > -
> > -XEN=3D"xen"
> > -DEVICE_TREE=3D"virt-gicv2.dtb"
> > -
> > -XEN_CMD=3D"console=3Ddtuart console_timestamps=3Dboot"
> > -
> > -DOMU_KERNEL[0]=3D"xtf-test"
> > -DOMU_MEM[0]=3D"128"
> > -
> > -NUM_DOMUS=3D1
> > -
> > -LOAD_CMD=3D"tftpb"
> > -UBOOT_SOURCE=3D"boot.source"
> > -UBOOT_SCRIPT=3D"boot.scr"' > binaries/config
> > -
> > -rm -rf imagebuilder
> > -git clone --depth 1 https://gitlab.com/xen-project/imagebuilder.git
> > -bash imagebuilder/scripts/uboot-script-gen -t tftp -d binaries/ -c bin=
aries/config
> > -
> > -# Run the test
> > -rm -f smoke.serial
> > -export TEST_CMD=3D"./binaries/qemu-system-aarch64 \
> > -    -machine virtualization=3Dtrue \
> > -    -cpu cortex-a57 -machine type=3Dvirt \
> > -    -m 2048 -monitor none -serial stdio \
> > -    -smp 2 \
> > -    -no-reboot \
> > -    -device virtio-net-pci,netdev=3Dn0 \
> > -    -netdev user,id=3Dn0,tftp=3Dbinaries \
> > -    -bios /usr/lib/u-boot/qemu_arm64/u-boot.bin"
> > -
> > -export UBOOT_CMD=3D"virtio scan; dhcp; tftpb 0x40000000 boot.scr; sour=
ce 0x40000000"
> > -export BOOT_MSG=3D"Latest ChangeSet: "
> > -export TEST_LOG=3D"smoke.serial"
> > -export PASSED=3D"${passed}"
> > -
> > -./automation/scripts/console.exp | sed 's/\r\+$//'
> > --
> > 2.34.1
> >
> >



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Subject: Re: [GIT PULL] xen: branch for v6.15-rc3
From: pr-tracker-bot@kernel.org
In-Reply-To: <20250417145831.23359-1-jgross@suse.com>
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To: Juergen Gross 
Cc: torvalds@linux-foundation.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, sstabellini@kernel.org

The pull request you sent on Thu, 17 Apr 2025 16:58:31 +0200:

> git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip.git for-linus-6.15a-rc3-tag

has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/85a9793e769e2af692d341a2b3935703eac65328

Thank you!

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Subject: Re: [PATCH v6 13/15] ppc: Drop asm/byteorder.h
To: Andrew Cooper ,
 Xen-devel 
Cc: Anthony PERARD ,
 Michal Orzel , Jan Beulich ,
 Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Stefano Stabellini ,
 Volodymyr Babchuk ,
 Bertrand Marquis ,
 Oleksii Kurochko ,
 "Daniel P . Smith" ,
 Lin Liu 
References: <20250416115900.2491661-1-andrew.cooper3@citrix.com>
 <20250416115900.2491661-14-andrew.cooper3@citrix.com>
Content-Language: en-US
From: Shawn Anastasio 
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Hi Andrew,

On 4/16/25 6:58 AM, Andrew Cooper wrote:
> With the common code moved fully onto xen/byteorder.h, clean up the dregs.
> 
> Signed-off-by: Andrew Cooper 

For PPC:

Reviewed-by: Shawn Anastasio 

Thanks,
Shawn


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Subject: Re: [PATCH v1] xen/arm: AArch32-V8R: Add MPU register definitions
Content-Language: en-GB
To: Ayan Kumar Halder ,
 xen-devel@lists.xenproject.org
Cc: Stefano Stabellini ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk 
References: <20250417155511.1854081-1-ayan.kumar.halder@amd.com>
From: Julien Grall 
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Hi Ayan,

On 18/04/2025 00:55, Ayan Kumar Halder wrote:
> Add the definitions for HPRBAR<0..31>, HPRLAR<0..31> and HPRENR.
> The definitions are taken from ARM DDI 0568A.c ID110520, E2.2.3 HPRBAR,
> E2.2.4 HPRENR and E2.2.6 HPRLAR.
> 
> Introduce pr_t typedef which is a structure having the prbar and prlar members,
> each being structured as the registers of the AArch32-V8R architecture.
> This is the arm32 equivalent of
> "arm/mpu: Introduce MPU memory region map structure".
> 
> Signed-off-by: Ayan Kumar Halder 
> ---
> This patch should be applied after
> "[PATCH v3 0/7] First chunk for Arm R82 and MPU support" in order to enable
> compilation for AArch32.
> 
>   xen/arch/arm/include/asm/arm32/mpu.h  |  59 +++++++++++
>   xen/arch/arm/include/asm/mpu.h        |   4 +
>   xen/arch/arm/include/asm/mpu/cpregs.h | 135 ++++++++++++++++++++++++++
>   3 files changed, 198 insertions(+)
>   create mode 100644 xen/arch/arm/include/asm/arm32/mpu.h
> 
> diff --git a/xen/arch/arm/include/asm/arm32/mpu.h b/xen/arch/arm/include/asm/arm32/mpu.h
> new file mode 100644
> index 0000000000..4aabd93479
> --- /dev/null
> +++ b/xen/arch/arm/include/asm/arm32/mpu.h
> @@ -0,0 +1,59 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * mpu.h: Arm Memory Protection Unit definitions for aarch64.
> + */
> +
> +#ifndef __ARM_ARM32_MPU_H
> +#define __ARM_ARM32_MPU_H
> +
> +#define XN_EL2_ENABLED  0x1

I understand the define is introduced in Luca's patch, but this a bit 
non-descriptive... Can we find a better name? Maybe by adding the name 
of the register and some documentation?

> +
> +#ifndef __ASSEMBLY__
> +
> +/* Hypervisor Protection Region Base Address Register */
> +typedef union {
> +    struct {
> +        unsigned int xn:1;       /* Execute-Never */
> +        unsigned int ap:2;       /* Acess Permission */
> +        unsigned int sh:2;       /* Sharebility */
> +        unsigned int res0:1;     /* Reserved as 0 */
> +        unsigned int base:26;    /* Base Address */
> +    } reg;
> +    uint32_t bits;
> +} prbar_t;
> +
> +/* Hypervisor Protection Region Limit Address Register */
> +typedef union {
> +    struct {
> +        unsigned int en:1;     /* Region enable */
> +        unsigned int ai:3;     /* Memory Attribute Index */
> +        /*
> +         * There is no actual ns bit in hardware. It is used here for
> +         * compatibility with Armr64 code. Thus, we are reusing a res0 bit for ns.

typo: Arm64.

> +         */

Hmmmm, this would mean someone may mistakenly set the bit to 0 by 
mistake. If the field is always meant to be 0 on arm64, then I would 
consider to name is res0 on arm64 with an explanation.

This would make clear the bit is not supposed to have a value other than 0.

> +        unsigned int ns:1;     /* Reserved 0 by hardware */
> +        unsigned int res0:1;   /* Reserved 0 by hardware */
> +        unsigned int limit:26;  /* Limit Address */

NIT: Can we align the comments?

> +    } reg;
> +    uint32_t bits;
> +} prlar_t;
> +
> +/* Protection Region */
> +typedef struct {
> +    prbar_t prbar;
> +    prlar_t prlar;
> +    uint64_t p2m_type;          /* Used to store p2m types. */
> +} pr_t;

This looks to be common with arm64. If so, I would prefer if the 
structure is in a common header.

> +
> +#endif /* __ASSEMBLY__ */
> +
> +#endif /* __ARM_ARM32_MPU_H */
> +
> +/*
> + * Local variables:
> + * mode: C
> + * c-file-style: "BSD"
> + * c-basic-offset: 4
> + * indent-tabs-mode: nil
> + * End:
> + */
> diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h
> index 77d0566f97..67127149c0 100644
> --- a/xen/arch/arm/include/asm/mpu.h
> +++ b/xen/arch/arm/include/asm/mpu.h
> @@ -8,8 +8,12 @@
>   
>   #if defined(CONFIG_ARM_64)
>   # include 
> +#elif defined(CONFIG_ARM_32)
> +# include 
>   #endif
>   
> +#define PRENR_MASK  GENMASK(31, 0)
> +
>   #define MPU_REGION_SHIFT  6
>   #define MPU_REGION_ALIGN  (_AC(1, UL) << MPU_REGION_SHIFT)
>   #define MPU_REGION_MASK   (~(MPU_REGION_ALIGN - 1))
> diff --git a/xen/arch/arm/include/asm/mpu/cpregs.h b/xen/arch/arm/include/asm/mpu/cpregs.h
> index d5cd0e04d5..7cf52aa09a 100644
> --- a/xen/arch/arm/include/asm/mpu/cpregs.h
> +++ b/xen/arch/arm/include/asm/mpu/cpregs.h
> @@ -6,18 +6,153 @@
>   /* CP15 CR0: MPU Type Register */
>   #define HMPUIR          p15,4,c0,c0,4
>   
> +/* CP15 CR6: Protection Region Enable Register */
> +#define HPRENR          p15,4,c6,c1,1
> +
>   /* CP15 CR6: MPU Protection Region Base/Limit/Select Address Register */
>   #define HPRSELR         p15,4,c6,c2,1
>   #define HPRBAR          p15,4,c6,c3,0
>   #define HPRLAR          p15,4,c6,c8,1
>   
> +/* CP15 CR6: MPU Protection Region Base/Limit Address Register */
> +#define HPRBAR0         p15,4,c6,c8,0
> +#define HPRLAR0         p15,4,c6,c8,1
> +#define HPRBAR1         p15,4,c6,c8,4
> +#define HPRLAR1         p15,4,c6,c8,5
> +#define HPRBAR2         p15,4,c6,c9,0
> +#define HPRLAR2         p15,4,c6,c9,1
> +#define HPRBAR3         p15,4,c6,c9,4
> +#define HPRLAR3         p15,4,c6,c9,5
> +#define HPRBAR4         p15,4,c6,c10,0
> +#define HPRLAR4         p15,4,c6,c10,1
> +#define HPRBAR5         p15,4,c6,c10,4
> +#define HPRLAR5         p15,4,c6,c10,5
> +#define HPRBAR6         p15,4,c6,c11,0
> +#define HPRLAR6         p15,4,c6,c11,1
> +#define HPRBAR7         p15,4,c6,c11,4
> +#define HPRLAR7         p15,4,c6,c11,5
> +#define HPRBAR8         p15,4,c6,c12,0
> +#define HPRLAR8         p15,4,c6,c12,1
> +#define HPRBAR9         p15,4,c6,c12,4
> +#define HPRLAR9         p15,4,c6,c12,5
> +#define HPRBAR10        p15,4,c6,c13,0
> +#define HPRLAR10        p15,4,c6,c13,1
> +#define HPRBAR11        p15,4,c6,c13,4
> +#define HPRLAR11        p15,4,c6,c13,5
> +#define HPRBAR12        p15,4,c6,c14,0
> +#define HPRLAR12        p15,4,c6,c14,1
> +#define HPRBAR13        p15,4,c6,c14,4
> +#define HPRLAR13        p15,4,c6,c14,5
> +#define HPRBAR14        p15,4,c6,c15,0
> +#define HPRLAR14        p15,4,c6,c15,1
> +#define HPRBAR15        p15,4,c6,c15,4
> +#define HPRLAR15        p15,4,c6,c15,5
> +#define HPRBAR16        p15,5,c6,c8,0
> +#define HPRLAR16        p15,5,c6,c8,1
> +#define HPRBAR17        p15,5,c6,c8,4
> +#define HPRLAR17        p15,5,c6,c8,5
> +#define HPRBAR18        p15,5,c6,c9,0
> +#define HPRLAR18        p15,5,c6,c9,1
> +#define HPRBAR19        p15,5,c6,c9,4
> +#define HPRLAR19        p15,5,c6,c9,5
> +#define HPRBAR20        p15,5,c6,c10,0
> +#define HPRLAR20        p15,5,c6,c10,1
> +#define HPRBAR21        p15,5,c6,c10,4
> +#define HPRLAR21        p15,5,c6,c10,5
> +#define HPRBAR22        p15,5,c6,c11,0
> +#define HPRLAR22        p15,5,c6,c11,1
> +#define HPRBAR23        p15,5,c6,c11,4
> +#define HPRLAR23        p15,5,c6,c11,5
> +#define HPRBAR24        p15,5,c6,c12,0
> +#define HPRLAR24        p15,5,c6,c12,1
> +#define HPRBAR25        p15,5,c6,c12,4
> +#define HPRLAR25        p15,5,c6,c12,5
> +#define HPRBAR26        p15,5,c6,c13,0
> +#define HPRLAR26        p15,5,c6,c13,1
> +#define HPRBAR27        p15,5,c6,c13,4
> +#define HPRLAR27        p15,5,c6,c13,5
> +#define HPRBAR28        p15,5,c6,c14,0
> +#define HPRLAR28        p15,5,c6,c14,1
> +#define HPRBAR29        p15,5,c6,c14,4
> +#define HPRLAR29        p15,5,c6,c14,5
> +#define HPRBAR30        p15,5,c6,c15,0
> +#define HPRLAR30        p15,5,c6,c15,1
> +#define HPRBAR31        p15,5,c6,c15,4
> +#define HPRLAR31        p15,5,c6,c15,5

NIT: Is there any way we could generate the values using macros?

> +
>   /* Aliases of AArch64 names for use in common code */
>   #ifdef CONFIG_ARM_32
>   /* Alphabetically... */
>   #define MPUIR_EL2       HMPUIR
>   #define PRBAR_EL2       HPRBAR
> +#define PRBAR0_EL2      HPRBAR0

AFAIU, the alias will be mainly used in the macro generate
the switch. Rather than open-coding all the PR*AR_EL2, can we
provide two macros PR{B, L}AR_N that will be implemented as
HPR{B,L}AR##n for arm32 and PR{B,L}AR##n for arm64?

>   #define PRSELR_EL2      HPRSELR
> +
>   #endif /* CONFIG_ARM_32 */
>   
>   #endif /* __ARM_MPU_CPREGS_H */

Cheers,

-- 
Julien Grall



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From: Harshvardhan Jha 
To: jgross@suse.com, sstabellini@kernel.org, boris.ostrovsky@oracle.com
Cc: harshvardhan.j.jha@oracle.com, xen-devel@lists.xenproject.org,
        iommu@lists.linux-foundation.org, iommu@lists.linux.dev,
        stable@vger.kernel.org
Subject: [PATCH 5.15.y v2 1/1] xen/swiotlb: relax alignment requirements
Date: Thu, 17 Apr 2025 22:47:26 -0700
Message-ID: <20250418054726.2442674-2-harshvardhan.j.jha@oracle.com>
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[ Upstream commit 85fcb57c983f423180ba6ec5d0034242da05cc54 ]

When mapping a buffer for DMA via .map_page or .map_sg DMA operations,
there is no need to check the machine frames to be aligned according
to the mapped areas size. All what is needed in these cases is that the
buffer is contiguous at machine level.

So carve out the alignment check from range_straddles_page_boundary()
and move it to a helper called by xen_swiotlb_alloc_coherent() and
xen_swiotlb_free_coherent() directly.

Fixes: 9f40ec84a797 ("xen/swiotlb: add alignment check for dma buffers")
Signed-off-by: Harshvardhan Jha 
---
 drivers/xen/swiotlb-xen.c | 18 +++++++++++-------
 1 file changed, 11 insertions(+), 7 deletions(-)

diff --git a/drivers/xen/swiotlb-xen.c b/drivers/xen/swiotlb-xen.c
index 0392841a822fa..65da97be06285 100644
--- a/drivers/xen/swiotlb-xen.c
+++ b/drivers/xen/swiotlb-xen.c
@@ -75,19 +75,21 @@ static inline phys_addr_t xen_dma_to_phys(struct device *dev,
 	return xen_bus_to_phys(dev, dma_to_phys(dev, dma_addr));
 }
 
+static inline bool range_requires_alignment(phys_addr_t p, size_t size)
+{
+	phys_addr_t algn = 1ULL << (get_order(size) + PAGE_SHIFT);
+	phys_addr_t bus_addr = pfn_to_bfn(XEN_PFN_DOWN(p)) << XEN_PAGE_SHIFT;
+
+	return IS_ALIGNED(p, algn) && !IS_ALIGNED(bus_addr, algn);
+}
+
 static inline int range_straddles_page_boundary(phys_addr_t p, size_t size)
 {
 	unsigned long next_bfn, xen_pfn = XEN_PFN_DOWN(p);
 	unsigned int i, nr_pages = XEN_PFN_UP(xen_offset_in_page(p) + size);
-	phys_addr_t algn = 1ULL << (get_order(size) + PAGE_SHIFT);
 
 	next_bfn = pfn_to_bfn(xen_pfn);
 
-	/* If buffer is physically aligned, ensure DMA alignment. */
-	if (IS_ALIGNED(p, algn) &&
-	    !IS_ALIGNED((phys_addr_t)next_bfn << XEN_PAGE_SHIFT, algn))
-		return 1;
-
 	for (i = 1; i < nr_pages; i++)
 		if (pfn_to_bfn(++xen_pfn) != ++next_bfn)
 			return 1;
@@ -306,7 +308,8 @@ xen_swiotlb_alloc_coherent(struct device *hwdev, size_t size,
 	phys = dma_to_phys(hwdev, *dma_handle);
 	dev_addr = xen_phys_to_dma(hwdev, phys);
 	if (((dev_addr + size - 1 <= dma_mask)) &&
-	    !range_straddles_page_boundary(phys, size))
+	    !range_straddles_page_boundary(phys, size) &&
+	    !range_requires_alignment(phys, size))
 		*dma_handle = dev_addr;
 	else {
 		if (xen_create_contiguous_region(phys, order,
@@ -347,6 +350,7 @@ xen_swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
 
 	if (!WARN_ON((dev_addr + size - 1 > dma_mask) ||
 		     range_straddles_page_boundary(phys, size)) &&
+	    !range_requires_alignment(phys, size) &&
 	    TestClearPageXenRemapped(page))
 		xen_destroy_contiguous_region(phys, order);
 
-- 
2.47.1



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From: Harshvardhan Jha 
To: jgross@suse.com, sstabellini@kernel.org, boris.ostrovsky@oracle.com
Cc: harshvardhan.j.jha@oracle.com, xen-devel@lists.xenproject.org,
        iommu@lists.linux-foundation.org, iommu@lists.linux.dev,
        stable@vger.kernel.org
Subject: [PATCH 5.15.y v2 0/1] Manual Backport of 099606a7b2d5 to 5.15
Date: Thu, 17 Apr 2025 22:47:25 -0700
Message-ID: <20250418054726.2442674-1-harshvardhan.j.jha@oracle.com>
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The patch 099606a7b2d5 didn't cleanly apply to 5.15 due to the
significant difference in codebases.

I've tried to manually bring it back to 5.15 via some minor conflict
resolution but also invoking the newly introduced API using inverted
logic as the conditional statements present in 5.15 are the opposite of
those in 6.1 xen/swiotlib.

Harshvardhan Jha (1):
  xen/swiotlb: relax alignment requirements

 drivers/xen/swiotlb-xen.c | 18 +++++++++++-------
 1 file changed, 11 insertions(+), 7 deletions(-)

-- 
2.47.1



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From: Bertrand Marquis 
To: Andrew Cooper 
CC: Xen-devel , Anthony PERARD
	, Michal Orzel , Jan Beulich
	, Julien Grall ,
	=?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= , Stefano
 Stabellini , Volodymyr Babchuk
	, Shawn Anastasio
	, Oleksii Kurochko
	, "Daniel P . Smith"
	, Lin Liu , Rahul Singh
	
Subject: Re: [PATCH v6 02/15] drivers/smmu-v3: Fix impending MISRA R20.6
 violation
Thread-Topic: [PATCH v6 02/15] drivers/smmu-v3: Fix impending MISRA R20.6
 violation
Thread-Index: AQHbrsb4h7zxEPTLGky/jys+D4v1IrOo+KwA
Date: Fri, 18 Apr 2025 06:28:46 +0000
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 <20250416115900.2491661-3-andrew.cooper3@citrix.com>
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From: Uros Bizjak 
To: x86@kernel.org,
	linux-video@atrey.karlin.mff.cuni.cz,
	xen-devel@lists.xenproject.org,
	linux-pm@vger.kernel.org,
	linux-kernel@vger.kernel.org
Cc: Uros Bizjak ,
	Thomas Gleixner ,
	Ingo Molnar ,
	Borislav Petkov ,
	Dave Hansen ,
	"H. Peter Anvin" ,
	Juergen Gross ,
	Boris Ostrovsky ,
	"Rafael J. Wysocki" ,
	Pavel Machek 
Subject: [PATCH -tip v2 2/2] x86/asm: Remove semicolon from "rep" prefixes
Date: Fri, 18 Apr 2025 09:13:51 +0200
Message-ID: <20250418071437.4144391-2-ubizjak@gmail.com>
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Minimum version of binutils required to compile the kernel is 2.25.
This version correctly handles the "rep" prefixes, so it is possible
to remove the semicolon, which was used to support ancient versions
of GNU as.

Due to the semicolon, the compiler considers "rep; insn" (or its
alternate "rep\n\tinsn" form) as two separate instructions. Removing
the semicolon makes asm length calculations more accurate, consequently
making scheduling and inlining decisions of the compiler more accurate.

Removing the semicolon also enables assembler checks involving "rep"
prefixes. Trying to assemble e.g. "rep addl %eax, %ebx" results in:

  Error: invalid instruction `add' after `rep'

Signed-off-by: Uros Bizjak 
Cc: Thomas Gleixner 
Cc: Ingo Molnar 
Cc: Borislav Petkov 
Cc: Dave Hansen 
Cc: "H. Peter Anvin" 
Cc: Juergen Gross 
Cc: Boris Ostrovsky 
Cc: "Rafael J. Wysocki" 
Cc: Pavel Machek 
---
v2: Split the patch from the previous version.
---
 arch/x86/include/asm/io.h            |  6 +++---
 arch/x86/include/asm/string_32.h     | 15 ++++++---------
 arch/x86/kernel/head_32.S            |  8 +++-----
 arch/x86/kernel/relocate_kernel_32.S |  6 +++---
 arch/x86/kernel/relocate_kernel_64.S |  6 +++---
 arch/x86/lib/iomem.c                 |  2 +-
 arch/x86/lib/string_32.c             | 17 ++++++-----------
 arch/x86/lib/strstr_32.c             |  6 ++----
 arch/x86/lib/usercopy_32.c           | 18 +++++++++---------
 arch/x86/platform/pvh/head.S         |  3 +--
 arch/x86/power/hibernate_asm_32.S    |  3 +--
 arch/x86/power/hibernate_asm_64.S    |  3 +--
 12 files changed, 39 insertions(+), 54 deletions(-)

diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h
index e889c3bab5a2..ca309a3227c7 100644
--- a/arch/x86/include/asm/io.h
+++ b/arch/x86/include/asm/io.h
@@ -217,7 +217,7 @@ void memset_io(volatile void __iomem *, int, size_t);
 static inline void __iowrite32_copy(void __iomem *to, const void *from,
 				    size_t count)
 {
-	asm volatile("rep ; movsl"
+	asm volatile("rep movsl"
 		     : "=&c"(count), "=&D"(to), "=&S"(from)
 		     : "0"(count), "1"(to), "2"(from)
 		     : "memory");
@@ -282,7 +282,7 @@ static inline void outs##bwl(u16 port, const void *addr, unsigned long count) \
 			count--;					\
 		}							\
 	} else {							\
-		asm volatile("rep; outs" #bwl				\
+		asm volatile("rep outs" #bwl				\
 			     : "+S"(addr), "+c"(count)			\
 			     : "d"(port) : "memory");			\
 	}								\
@@ -298,7 +298,7 @@ static inline void ins##bwl(u16 port, void *addr, unsigned long count)	\
 			count--;					\
 		}							\
 	} else {							\
-		asm volatile("rep; ins" #bwl				\
+		asm volatile("rep ins" #bwl				\
 			     : "+D"(addr), "+c"(count)			\
 			     : "d"(port) : "memory");			\
 	}								\
diff --git a/arch/x86/include/asm/string_32.h b/arch/x86/include/asm/string_32.h
index 32c0d981a82a..e9cce169bb4c 100644
--- a/arch/x86/include/asm/string_32.h
+++ b/arch/x86/include/asm/string_32.h
@@ -33,11 +33,11 @@ extern size_t strlen(const char *s);
 static __always_inline void *__memcpy(void *to, const void *from, size_t n)
 {
 	int d0, d1, d2;
-	asm volatile("rep ; movsl\n\t"
+	asm volatile("rep movsl\n\t"
 		     "movl %4,%%ecx\n\t"
 		     "andl $3,%%ecx\n\t"
 		     "jz 1f\n\t"
-		     "rep ; movsb\n\t"
+		     "rep movsb\n\t"
 		     "1:"
 		     : "=&c" (d0), "=&D" (d1), "=&S" (d2)
 		     : "0" (n / 4), "g" (n), "1" ((long)to), "2" ((long)from)
@@ -89,7 +89,7 @@ static __always_inline void *__constant_memcpy(void *to, const void *from,
 	if (n >= 5 * 4) {
 		/* large block: use rep prefix */
 		int ecx;
-		asm volatile("rep ; movsl"
+		asm volatile("rep movsl"
 			     : "=&c" (ecx), "=&D" (edi), "=&S" (esi)
 			     : "0" (n / 4), "1" (edi), "2" (esi)
 			     : "memory"
@@ -165,8 +165,7 @@ extern void *memchr(const void *cs, int c, size_t count);
 static inline void *__memset_generic(void *s, char c, size_t count)
 {
 	int d0, d1;
-	asm volatile("rep\n\t"
-		     "stosb"
+	asm volatile("rep stosb"
 		     : "=&c" (d0), "=&D" (d1)
 		     : "a" (c), "1" (s), "0" (count)
 		     : "memory");
@@ -199,8 +198,7 @@ extern void *memset(void *, int, size_t);
 static inline void *memset16(uint16_t *s, uint16_t v, size_t n)
 {
 	int d0, d1;
-	asm volatile("rep\n\t"
-		     "stosw"
+	asm volatile("rep stosw"
 		     : "=&c" (d0), "=&D" (d1)
 		     : "a" (v), "1" (s), "0" (n)
 		     : "memory");
@@ -211,8 +209,7 @@ static inline void *memset16(uint16_t *s, uint16_t v, size_t n)
 static inline void *memset32(uint32_t *s, uint32_t v, size_t n)
 {
 	int d0, d1;
-	asm volatile("rep\n\t"
-		     "stosl"
+	asm volatile("rep stosl"
 		     : "=&c" (d0), "=&D" (d1)
 		     : "a" (v), "1" (s), "0" (n)
 		     : "memory");
diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
index 2e42056d2306..76743dfad6ab 100644
--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -86,7 +86,7 @@ SYM_CODE_START(startup_32)
 	movl $pa(__bss_stop),%ecx
 	subl %edi,%ecx
 	shrl $2,%ecx
-	rep ; stosl
+	rep stosl
 /*
  * Copy bootup parameters out of the way.
  * Note: %esi still has the pointer to the real-mode data.
@@ -98,15 +98,13 @@ SYM_CODE_START(startup_32)
 	movl $pa(boot_params),%edi
 	movl $(PARAM_SIZE/4),%ecx
 	cld
-	rep
-	movsl
+	rep movsl
 	movl pa(boot_params) + NEW_CL_POINTER,%esi
 	andl %esi,%esi
 	jz 1f			# No command line
 	movl $pa(boot_command_line),%edi
 	movl $(COMMAND_LINE_SIZE/4),%ecx
-	rep
-	movsl
+	rep movsl
 1:
 
 #ifdef CONFIG_OLPC
diff --git a/arch/x86/kernel/relocate_kernel_32.S b/arch/x86/kernel/relocate_kernel_32.S
index c7c4b1917336..57276f134d12 100644
--- a/arch/x86/kernel/relocate_kernel_32.S
+++ b/arch/x86/kernel/relocate_kernel_32.S
@@ -263,17 +263,17 @@ SYM_CODE_START_LOCAL_NOALIGN(swap_pages)
 
 	movl	%edx, %edi
 	movl    $1024, %ecx
-	rep ; movsl
+	rep movsl
 
 	movl	%ebp, %edi
 	movl	%eax, %esi
 	movl	$1024, %ecx
-	rep ; movsl
+	rep movsl
 
 	movl	%eax, %edi
 	movl	%edx, %esi
 	movl	$1024, %ecx
-	rep ; movsl
+	rep movsl
 
 	lea	PAGE_SIZE(%ebp), %esi
 	jmp     0b
diff --git a/arch/x86/kernel/relocate_kernel_64.S b/arch/x86/kernel/relocate_kernel_64.S
index 3062cb3efc44..1d6355227bf6 100644
--- a/arch/x86/kernel/relocate_kernel_64.S
+++ b/arch/x86/kernel/relocate_kernel_64.S
@@ -363,20 +363,20 @@ SYM_CODE_START_LOCAL_NOALIGN(swap_pages)
 	/* copy source page to swap page */
 	movq	kexec_pa_swap_page(%rip), %rdi
 	movl	$512, %ecx
-	rep ; movsq
+	rep movsq
 
 	/* copy destination page to source page */
 	movq	%rax, %rdi
 	movq	%rdx, %rsi
 	movl	$512, %ecx
-	rep ; movsq
+	rep movsq
 
 	/* copy swap page to destination page */
 	movq	%rdx, %rdi
 	movq	kexec_pa_swap_page(%rip), %rsi
 .Lnoswap:
 	movl	$512, %ecx
-	rep ; movsq
+	rep movsq
 
 	lea	PAGE_SIZE(%rax), %rsi
 	jmp	.Lloop
diff --git a/arch/x86/lib/iomem.c b/arch/x86/lib/iomem.c
index 5eecb45d05d5..c20e04764edc 100644
--- a/arch/x86/lib/iomem.c
+++ b/arch/x86/lib/iomem.c
@@ -10,7 +10,7 @@
 static __always_inline void rep_movs(void *to, const void *from, size_t n)
 {
 	unsigned long d0, d1, d2;
-	asm volatile("rep ; movsl\n\t"
+	asm volatile("rep movsl\n\t"
 		     "testb $2,%b4\n\t"
 		     "je 1f\n\t"
 		     "movsw\n"
diff --git a/arch/x86/lib/string_32.c b/arch/x86/lib/string_32.c
index 53b3f202267c..f87ec24fa579 100644
--- a/arch/x86/lib/string_32.c
+++ b/arch/x86/lib/string_32.c
@@ -40,8 +40,7 @@ char *strncpy(char *dest, const char *src, size_t count)
 		"stosb\n\t"
 		"testb %%al,%%al\n\t"
 		"jne 1b\n\t"
-		"rep\n\t"
-		"stosb\n"
+		"rep stosb\n"
 		"2:"
 		: "=&S" (d0), "=&D" (d1), "=&c" (d2), "=&a" (d3)
 		: "0" (src), "1" (dest), "2" (count) : "memory");
@@ -54,8 +53,7 @@ EXPORT_SYMBOL(strncpy);
 char *strcat(char *dest, const char *src)
 {
 	int d0, d1, d2, d3;
-	asm volatile("repne\n\t"
-		"scasb\n\t"
+	asm volatile("repne scasb\n\t"
 		"decl %1\n"
 		"1:\tlodsb\n\t"
 		"stosb\n\t"
@@ -72,8 +70,7 @@ EXPORT_SYMBOL(strcat);
 char *strncat(char *dest, const char *src, size_t count)
 {
 	int d0, d1, d2, d3;
-	asm volatile("repne\n\t"
-		"scasb\n\t"
+	asm volatile("repne scasb\n\t"
 		"decl %1\n\t"
 		"movl %8,%3\n"
 		"1:\tdecl %3\n\t"
@@ -167,8 +164,7 @@ size_t strlen(const char *s)
 {
 	int d0;
 	size_t res;
-	asm volatile("repne\n\t"
-		"scasb"
+	asm volatile("repne scasb"
 		: "=c" (res), "=&D" (d0)
 		: "1" (s), "a" (0), "0" (0xffffffffu)
 		: "memory");
@@ -184,8 +180,7 @@ void *memchr(const void *cs, int c, size_t count)
 	void *res;
 	if (!count)
 		return NULL;
-	asm volatile("repne\n\t"
-		"scasb\n\t"
+	asm volatile("repne scasb\n\t"
 		"je 1f\n\t"
 		"movl $1,%0\n"
 		"1:\tdecl %0"
@@ -202,7 +197,7 @@ void *memscan(void *addr, int c, size_t size)
 {
 	if (!size)
 		return addr;
-	asm volatile("repnz; scasb\n\t"
+	asm volatile("repnz scasb\n\t"
 	    "jnz 1f\n\t"
 	    "dec %%edi\n"
 	    "1:"
diff --git a/arch/x86/lib/strstr_32.c b/arch/x86/lib/strstr_32.c
index 38f37df056f7..28267985e85f 100644
--- a/arch/x86/lib/strstr_32.c
+++ b/arch/x86/lib/strstr_32.c
@@ -8,16 +8,14 @@ int	d0, d1;
 register char *__res;
 __asm__ __volatile__(
 	"movl %6,%%edi\n\t"
-	"repne\n\t"
-	"scasb\n\t"
+	"repne scasb\n\t"
 	"notl %%ecx\n\t"
 	"decl %%ecx\n\t"	/* NOTE! This also sets Z if searchstring='' */
 	"movl %%ecx,%%edx\n"
 	"1:\tmovl %6,%%edi\n\t"
 	"movl %%esi,%%eax\n\t"
 	"movl %%edx,%%ecx\n\t"
-	"repe\n\t"
-	"cmpsb\n\t"
+	"repe cmpsb\n\t"
 	"je 2f\n\t"		/* also works for empty string, see above */
 	"xchgl %%eax,%%esi\n\t"
 	"incl %%esi\n\t"
diff --git a/arch/x86/lib/usercopy_32.c b/arch/x86/lib/usercopy_32.c
index 422257c350c6..f6f436f1d573 100644
--- a/arch/x86/lib/usercopy_32.c
+++ b/arch/x86/lib/usercopy_32.c
@@ -38,9 +38,9 @@ do {									\
 	might_fault();							\
 	__asm__ __volatile__(						\
 		ASM_STAC "\n"						\
-		"0:	rep; stosl\n"					\
+		"0:	rep stosl\n"					\
 		"	movl %2,%0\n"					\
-		"1:	rep; stosb\n"					\
+		"1:	rep stosb\n"					\
 		"2: " ASM_CLAC "\n"					\
 		_ASM_EXTABLE_TYPE_REG(0b, 2b, EX_TYPE_UCOPY_LEN4, %2)	\
 		_ASM_EXTABLE_UA(1b, 2b)					\
@@ -140,9 +140,9 @@ __copy_user_intel(void __user *to, const void *from, unsigned long size)
 		       "       shrl  $2, %0\n"
 		       "       andl  $3, %%eax\n"
 		       "       cld\n"
-		       "99:    rep; movsl\n"
+		       "99:    rep movsl\n"
 		       "36:    movl %%eax, %0\n"
-		       "37:    rep; movsb\n"
+		       "37:    rep movsb\n"
 		       "100:\n"
 		       _ASM_EXTABLE_UA(1b, 100b)
 		       _ASM_EXTABLE_UA(2b, 100b)
@@ -242,9 +242,9 @@ static unsigned long __copy_user_intel_nocache(void *to,
 	       "        shrl  $2, %0\n"
 	       "        andl $3, %%eax\n"
 	       "        cld\n"
-	       "6:      rep; movsl\n"
+	       "6:      rep movsl\n"
 	       "        movl %%eax,%0\n"
-	       "7:      rep; movsb\n"
+	       "7:      rep movsb\n"
 	       "8:\n"
 	       _ASM_EXTABLE_UA(0b, 8b)
 	       _ASM_EXTABLE_UA(1b, 8b)
@@ -293,14 +293,14 @@ do {									\
 		"	negl %0\n"					\
 		"	andl $7,%0\n"					\
 		"	subl %0,%3\n"					\
-		"4:	rep; movsb\n"					\
+		"4:	rep movsb\n"					\
 		"	movl %3,%0\n"					\
 		"	shrl $2,%0\n"					\
 		"	andl $3,%3\n"					\
 		"	.align 2,0x90\n"				\
-		"0:	rep; movsl\n"					\
+		"0:	rep movsl\n"					\
 		"	movl %3,%0\n"					\
-		"1:	rep; movsb\n"					\
+		"1:	rep movsb\n"					\
 		"2:\n"							\
 		_ASM_EXTABLE_TYPE_REG(4b, 2b, EX_TYPE_UCOPY_LEN1, %3)	\
 		_ASM_EXTABLE_TYPE_REG(0b, 2b, EX_TYPE_UCOPY_LEN4, %3)	\
diff --git a/arch/x86/platform/pvh/head.S b/arch/x86/platform/pvh/head.S
index cfa18ec7d55f..1d78e5631bb8 100644
--- a/arch/x86/platform/pvh/head.S
+++ b/arch/x86/platform/pvh/head.S
@@ -87,8 +87,7 @@ SYM_CODE_START(pvh_start_xen)
 	mov %ebx, %esi
 	movl rva(pvh_start_info_sz)(%ebp), %ecx
 	shr $2,%ecx
-	rep
-	movsl
+	rep movsl
 
 	leal rva(early_stack_end)(%ebp), %esp
 
diff --git a/arch/x86/power/hibernate_asm_32.S b/arch/x86/power/hibernate_asm_32.S
index 5606a15cf9a1..fb910d9f8471 100644
--- a/arch/x86/power/hibernate_asm_32.S
+++ b/arch/x86/power/hibernate_asm_32.S
@@ -69,8 +69,7 @@ copy_loop:
 	movl	pbe_orig_address(%edx), %edi
 
 	movl	$(PAGE_SIZE >> 2), %ecx
-	rep
-	movsl
+	rep movsl
 
 	movl	pbe_next(%edx), %edx
 	jmp	copy_loop
diff --git a/arch/x86/power/hibernate_asm_64.S b/arch/x86/power/hibernate_asm_64.S
index 66f066b8feda..c73be0a02a6c 100644
--- a/arch/x86/power/hibernate_asm_64.S
+++ b/arch/x86/power/hibernate_asm_64.S
@@ -138,8 +138,7 @@ SYM_FUNC_START(core_restore_code)
 	movq	pbe_address(%rdx), %rsi
 	movq	pbe_orig_address(%rdx), %rdi
 	movq	$(PAGE_SIZE >> 3), %rcx
-	rep
-	movsq
+	rep movsq
 
 	/* progress to the next pbe */
 	movq	pbe_next(%rdx), %rdx
-- 
2.49.0



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        Fri, 18 Apr 2025 00:14:41 -0700 (PDT)
From: Uros Bizjak 
To: x86@kernel.org,
	linux-video@atrey.karlin.mff.cuni.cz,
	xen-devel@lists.xenproject.org,
	linux-pm@vger.kernel.org,
	linux-kernel@vger.kernel.org
Cc: Uros Bizjak ,
	Thomas Gleixner ,
	Ingo Molnar ,
	Borislav Petkov ,
	Dave Hansen ,
	"H. Peter Anvin" ,
	Martin Mares 
Subject: [PATCH -tip v2 1/2] x86/boot: Remove semicolon from "rep" prefixes
Date: Fri, 18 Apr 2025 09:13:50 +0200
Message-ID: <20250418071437.4144391-1-ubizjak@gmail.com>
X-Mailer: git-send-email 2.49.0
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Minimum version of binutils required to compile the kernel is 2.25.
This version correctly handles the "rep" prefixes, so it is possible
to remove the semicolon, which was used to support ancient versions
of GNU as.

Due to the semicolon, the compiler considers "rep; insn" (or its
alternate "rep\n\tinsn" form) as two separate instructions. Removing
the semicolon makes asm length calculations more accurate, consequently
making scheduling and inlining decisions of the compiler more accurate.

Removing the semicolon also enables assembler checks involving "rep"
prefixes. Trying to assemble e.g. "rep addl %eax, %ebx" results in:

  Error: invalid instruction `add' after `rep'

Signed-off-by: Uros Bizjak 
Cc: Thomas Gleixner 
Cc: Ingo Molnar 
Cc: Borislav Petkov 
Cc: Dave Hansen 
Cc: "H. Peter Anvin" 
Cc: Martin Mares 
---
v2: Split the patch from the previous version.
---
 arch/x86/boot/bioscall.S          | 4 ++--
 arch/x86/boot/boot.h              | 4 ++--
 arch/x86/boot/compressed/string.c | 8 ++++----
 arch/x86/boot/copy.S              | 8 ++++----
 arch/x86/boot/header.S            | 2 +-
 arch/x86/boot/string.c            | 2 +-
 arch/x86/boot/video.c             | 2 +-
 7 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/arch/x86/boot/bioscall.S b/arch/x86/boot/bioscall.S
index aa9b96457584..cf4a6155714e 100644
--- a/arch/x86/boot/bioscall.S
+++ b/arch/x86/boot/bioscall.S
@@ -32,7 +32,7 @@ intcall:
 	movw	%dx, %si
 	movw	%sp, %di
 	movw	$11, %cx
-	rep; movsl
+	rep movsl
 
 	/* Pop full state from the stack */
 	popal
@@ -67,7 +67,7 @@ intcall:
 	jz	4f
 	movw	%sp, %si
 	movw	$11, %cx
-	rep; movsl
+	rep movsl
 4:	addw	$44, %sp
 
 	/* Restore state and return */
diff --git a/arch/x86/boot/boot.h b/arch/x86/boot/boot.h
index 38f17a1e1e36..f3771a6373c7 100644
--- a/arch/x86/boot/boot.h
+++ b/arch/x86/boot/boot.h
@@ -155,14 +155,14 @@ static inline void wrgs32(u32 v, addr_t addr)
 static inline bool memcmp_fs(const void *s1, addr_t s2, size_t len)
 {
 	bool diff;
-	asm volatile("fs; repe; cmpsb" CC_SET(nz)
+	asm volatile("fs repe cmpsb" CC_SET(nz)
 		     : CC_OUT(nz) (diff), "+D" (s1), "+S" (s2), "+c" (len));
 	return diff;
 }
 static inline bool memcmp_gs(const void *s1, addr_t s2, size_t len)
 {
 	bool diff;
-	asm volatile("gs; repe; cmpsb" CC_SET(nz)
+	asm volatile("gs repe cmpsb" CC_SET(nz)
 		     : CC_OUT(nz) (diff), "+D" (s1), "+S" (s2), "+c" (len));
 	return diff;
 }
diff --git a/arch/x86/boot/compressed/string.c b/arch/x86/boot/compressed/string.c
index 81fc1eaa3229..9af19d9614cb 100644
--- a/arch/x86/boot/compressed/string.c
+++ b/arch/x86/boot/compressed/string.c
@@ -15,9 +15,9 @@ static void *____memcpy(void *dest, const void *src, size_t n)
 {
 	int d0, d1, d2;
 	asm volatile(
-		"rep ; movsl\n\t"
+		"rep movsl\n\t"
 		"movl %4,%%ecx\n\t"
-		"rep ; movsb\n\t"
+		"rep movsb"
 		: "=&c" (d0), "=&D" (d1), "=&S" (d2)
 		: "0" (n >> 2), "g" (n & 3), "1" (dest), "2" (src)
 		: "memory");
@@ -29,9 +29,9 @@ static void *____memcpy(void *dest, const void *src, size_t n)
 {
 	long d0, d1, d2;
 	asm volatile(
-		"rep ; movsq\n\t"
+		"rep movsq\n\t"
 		"movq %4,%%rcx\n\t"
-		"rep ; movsb\n\t"
+		"rep movsb"
 		: "=&c" (d0), "=&D" (d1), "=&S" (d2)
 		: "0" (n >> 3), "g" (n & 7), "1" (dest), "2" (src)
 		: "memory");
diff --git a/arch/x86/boot/copy.S b/arch/x86/boot/copy.S
index 6afd05e819d2..3973a67cd04e 100644
--- a/arch/x86/boot/copy.S
+++ b/arch/x86/boot/copy.S
@@ -22,10 +22,10 @@ SYM_FUNC_START_NOALIGN(memcpy)
 	movw	%dx, %si
 	pushw	%cx
 	shrw	$2, %cx
-	rep; movsl
+	rep movsl
 	popw	%cx
 	andw	$3, %cx
-	rep; movsb
+	rep movsb
 	popw	%di
 	popw	%si
 	retl
@@ -38,10 +38,10 @@ SYM_FUNC_START_NOALIGN(memset)
 	imull	$0x01010101,%eax
 	pushw	%cx
 	shrw	$2, %cx
-	rep; stosl
+	rep stosl
 	popw	%cx
 	andw	$3, %cx
-	rep; stosb
+	rep stosb
 	popw	%di
 	retl
 SYM_FUNC_END(memset)
diff --git a/arch/x86/boot/header.S b/arch/x86/boot/header.S
index b5c79f43359b..9cb91421b4e4 100644
--- a/arch/x86/boot/header.S
+++ b/arch/x86/boot/header.S
@@ -585,7 +585,7 @@ start_of_setup:
 	xorl	%eax, %eax
 	subw	%di, %cx
 	shrw	$2, %cx
-	rep; stosl
+	rep stosl
 
 # Jump to C code (should not return)
 	calll	main
diff --git a/arch/x86/boot/string.c b/arch/x86/boot/string.c
index 84f7a883ce1e..f35369bb14c5 100644
--- a/arch/x86/boot/string.c
+++ b/arch/x86/boot/string.c
@@ -32,7 +32,7 @@
 int memcmp(const void *s1, const void *s2, size_t len)
 {
 	bool diff;
-	asm("repe; cmpsb" CC_SET(nz)
+	asm("repe cmpsb" CC_SET(nz)
 	    : CC_OUT(nz) (diff), "+D" (s1), "+S" (s2), "+c" (len));
 	return diff;
 }
diff --git a/arch/x86/boot/video.c b/arch/x86/boot/video.c
index f2e96905b3fe..0641c8c46aee 100644
--- a/arch/x86/boot/video.c
+++ b/arch/x86/boot/video.c
@@ -292,7 +292,7 @@ static void restore_screen(void)
 			     "shrw %%cx ; "
 			     "jnc 1f ; "
 			     "stosw \n\t"
-			     "1: rep;stosl ; "
+			     "1: rep stosl ; "
 			     "popw %%es"
 			     : "+D" (dst), "+c" (npad)
 			     : "bdS" (video_segment),
-- 
2.49.0



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From: "Penny, Zheng" 
To: Jan Beulich 
CC: "Huang, Ray" , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, "Orzel, Michal" , Volodymyr
 Babchuk , Andrew Cooper
	, Anthony PERARD ,
	=?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= , Alistair Francis
	, Bob Eshleman , Connor
 Davis , Oleksii Kurochko ,
	"Stabellini, Stefano" , Sergiy Kibrik
	, "xen-devel@lists.xenproject.org"
	
Subject: RE: [PATCH v2 18/19] xen/sysctl: wrap around arch-specific
 arch_do_sysctl
Thread-Topic: [PATCH v2 18/19] xen/sysctl: wrap around arch-specific
 arch_do_sysctl
Thread-Index: AQHbnhOEhC4MbJSWBkeJErel9AvRkLOO7ZUAgBpaesA=
Date: Fri, 18 Apr 2025 09:46:31 +0000
Message-ID:
 
References: <20250326055053.3313146-1-Penny.Zheng@amd.com>
 <20250326055053.3313146-19-Penny.Zheng@amd.com>
 <33b166be-21db-473e-a59a-3779436c0494@suse.com>
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In-Reply-To: <20250418071437.4144391-1-ubizjak@gmail.com>
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On 18/04/2025 8:13 am, Uros Bizjak wrote:
> diff --git a/arch/x86/boot/video.c b/arch/x86/boot/video.c
> index f2e96905b3fe..0641c8c46aee 100644
> --- a/arch/x86/boot/video.c
> +++ b/arch/x86/boot/video.c
> @@ -292,7 +292,7 @@ static void restore_screen(void)
>  			     "shrw %%cx ; "
>  			     "jnc 1f ; "
>  			     "stosw \n\t"
> -			     "1: rep;stosl ; "
> +			     "1: rep stosl ; "
>  			     "popw %%es"

Doesn't this one still need a separator between STOSL and POPW ?

~Andrew


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Date: Fri, 18 Apr 2025 12:43:28 +0200
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v1 10/14] xen/riscv: implementation of aplic and imsic
 operations
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Romain Caritey , xen-devel@lists.xenproject.org
References: 
 <74a07ed7c596bbcf581010685e01bfdfa19164f5.1744126720.git.oleksii.kurochko@gmail.com>
 <3426df1b-938a-4d20-a533-dd6695473db0@suse.com>
Content-Language: en-US
From: Oleksii Kurochko 
In-Reply-To: <3426df1b-938a-4d20-a533-dd6695473db0@suse.com>

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On 4/15/25 4:53 PM, Jan Beulich wrote:
> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>> --- a/xen/arch/riscv/imsic.c
>> +++ b/xen/arch/riscv/imsic.c
>> @@ -14,12 +14,68 @@
>>   #include 
>>   #include 
>>   #include 
>> +#include 
>>   #include 
>>   
>>   #include 
>>   
>>   static struct imsic_config imsic_cfg;
>>   
>> +#define imsic_csr_set(c, v)     \
>> +do {                            \
>> +    csr_write(CSR_SISELECT, c); \
>> +    csr_set(CSR_SIREG, v);      \
>> +} while (0)
>> +
>> +#define imsic_csr_clear(c, v)   \
>> +do {                            \
>> +    csr_write(CSR_SISELECT, c); \
>> +    csr_clear(CSR_SIREG, v);    \
>> +} while (0)
> Coming back to these (the later patch adds one more here): How expensive are
> these CSR writes? IOW would it perhaps make sense to maintain a local cache
> of the last written SISELECT value, to avoid writing the same one again if
> the same windowed register needs accessing twice in a row?

CSRs belong to the HART, so access to them is very fast.

~ Oleksii

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On 4/15/25 4:53 PM, Jan Beulich wrote:

    

    

      
On 08.04.2025 17:57, Oleksii Kurochko wrote:


      

        
--- a/xen/arch/riscv/imsic.c
+++ b/xen/arch/riscv/imsic.c
@@ -14,12 +14,68 @@
 #include <xen/errno.h>
 #include <xen/init.h>
 #include <xen/macros.h>
+#include <xen/spinlock.h>
 #include <xen/xmalloc.h>
 
 #include <asm/imsic.h>
 
 static struct imsic_config imsic_cfg;
 
+#define imsic_csr_set(c, v)     \
+do {                            \
+    csr_write(CSR_SISELECT, c); \
+    csr_set(CSR_SIREG, v);      \
+} while (0)
+
+#define imsic_csr_clear(c, v)   \
+do {                            \
+    csr_write(CSR_SISELECT, c); \
+    csr_clear(CSR_SIREG, v);    \
+} while (0)


      

      
Coming back to these (the later patch adds one more here): How expensive are
these CSR writes? IOW would it perhaps make sense to maintain a local cache
of the last written SISELECT value, to avoid writing the same one again if
the same windowed register needs accessing twice in a row?

    

    
CSRs belong to the HART, so access to them is very fast.

    
~ Oleksii


  


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Subject: Re: [PATCH TEST-ARTEFACTS 0/8] Cleanup and Linux ARM64 support
From: David Woodhouse 
To: Alejandro Vallejo , Andrew Cooper
 , Jason Andryuk ,
 Xen-devel 
Cc: Roger Pau =?ISO-8859-1?Q?Monn=E9?= , Stefano
 Stabellini , Michal Orzel ,
 Marek =?ISO-8859-1?Q?Marczykowski-G=F3recki?=
 , Anthony PERARD
 ,  Juergen Gross , Xen-devel
 
Date: Fri, 18 Apr 2025 11:58:32 +0100
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On Thu, 2025-04-10 at 19:28 +0100, Alejandro Vallejo wrote:
> The cutoff point is bcf0e2fda80c6("x86/xen: remove hypercall page").
>=20
> Together with Jason's observation it would seem that Linux doesn't guess
> the correct instruction (or not early enough) when running as PVH dom0.
> On PV it's just "syscall", but on PVH it's a tad more complicated.
>=20

I never understood why we did it this way anyway.

All this bogus complexity to do early detection of AMD vs. Intel and
use the right trap instruction, when we could have just continued to
use the proper Xen hypercall page at early boot.

After all, if you don't know what kind of CPU you're on, you *also*
haven't enabled CET or any other fancy return-tracking stuff yet. Just
fill in your own hypercall page *then*, instead. And then you can free
the original one.

Much simpler, much less fragile, and less prone to other potential
breakage from 64-bit latching side-effect that we forgot Xen does when
the guest sets the hypercall page.

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From: Uros Bizjak 
Date: Fri, 18 Apr 2025 13:15:37 +0200
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Message-ID: 
Subject: Re: [PATCH -tip v2 1/2] x86/boot: Remove semicolon from "rep" prefixes
To: Andrew Cooper 
Cc: x86@kernel.org, linux-video@atrey.karlin.mff.cuni.cz, 
	xen-devel@lists.xenproject.org, linux-pm@vger.kernel.org, 
	linux-kernel@vger.kernel.org, Thomas Gleixner , 
	Ingo Molnar , Borislav Petkov , 
	Dave Hansen , "H. Peter Anvin" , Martin Mares 
Content-Type: text/plain; charset="UTF-8"
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On Fri, Apr 18, 2025 at 12:24=E2=80=AFPM Andrew Cooper
 wrote:
>
> On 18/04/2025 8:13 am, Uros Bizjak wrote:
> > diff --git a/arch/x86/boot/video.c b/arch/x86/boot/video.c
> > index f2e96905b3fe..0641c8c46aee 100644
> > --- a/arch/x86/boot/video.c
> > +++ b/arch/x86/boot/video.c
> > @@ -292,7 +292,7 @@ static void restore_screen(void)
> >                            "shrw %%cx ; "
> >                            "jnc 1f ; "
> >                            "stosw \n\t"
> > -                          "1: rep;stosl ; "
> > +                          "1: rep stosl ; "
> >                            "popw %%es"
>
> Doesn't this one still need a separator between STOSL and POPW ?

";" is a separator as well.

Uros.


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Subject: Re: [PATCH -tip v2 1/2] x86/boot: Remove semicolon from "rep"
 prefixes
To: Uros Bizjak 
Cc: x86@kernel.org, linux-video@atrey.karlin.mff.cuni.cz,
 xen-devel@lists.xenproject.org, linux-pm@vger.kernel.org,
 linux-kernel@vger.kernel.org, Thomas Gleixner ,
 Ingo Molnar , Borislav Petkov ,
 Dave Hansen , "H. Peter Anvin" ,
 Martin Mares 
References: <20250418071437.4144391-1-ubizjak@gmail.com>
 <50bf962c-2c9e-46a2-bbac-cba9cf229e79@citrix.com>
 
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From: Andrew Cooper 
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On 18/04/2025 12:15 pm, Uros Bizjak wrote:
> On Fri, Apr 18, 2025 at 12:24 PM Andrew Cooper
>  wrote:
>> On 18/04/2025 8:13 am, Uros Bizjak wrote:
>>> diff --git a/arch/x86/boot/video.c b/arch/x86/boot/video.c
>>> index f2e96905b3fe..0641c8c46aee 100644
>>> --- a/arch/x86/boot/video.c
>>> +++ b/arch/x86/boot/video.c
>>> @@ -292,7 +292,7 @@ static void restore_screen(void)
>>>                            "shrw %%cx ; "
>>>                            "jnc 1f ; "
>>>                            "stosw \n\t"
>>> -                          "1: rep;stosl ; "
>>> +                          "1: rep stosl ; "
>>>                            "popw %%es"
>> Doesn't this one still need a separator between STOSL and POPW ?
> ";" is a separator as well.

Yes, it is.  I've clearly not had enough coffee yet.  Sorry for the noise.

~Andrew


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Subject: Re: [PATCH v1 09/14] xen/riscv: aplic_init() implementation
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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References: 
 <1d023045be49ae93d41d552f9c9a79972fa4e84b.1744126720.git.oleksii.kurochko@gmail.com>
 
 
 
 
 <2795e63a-fc37-4ab9-8348-ab2f609f1734@suse.com>
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From: Oleksii Kurochko 
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On 4/17/25 5:30 PM, Jan Beulich wrote:
> On 17.04.2025 17:21, Oleksii Kurochko wrote:
>> On 4/16/25 12:30 PM, Jan Beulich wrote:
>>> On 16.04.2025 12:15, Oleksii Kurochko wrote:
>>>> On 4/14/25 12:04 PM, Jan Beulich wrote:
>>>>> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>>>>>> +    rc = dt_property_read_u32(node, "msi-parent", &imsic_phandle);
>>>>>> +    if ( !rc )
>>>>>> +        panic("%s: IDC mode not supported\n", node->full_name);
>>>>>> +
>>>>>> +    imsic_node = dt_find_node_by_phandle(imsic_phandle);
>>>>>> +    if ( !imsic_node )
>>>>>> +        panic("%s: unable to find IMSIC node\n", node->full_name);
>>>>>> +
>>>>>> +    /* check imsic mode */
>>>>>> +    rc = dt_property_read_u32_array(imsic_node, "interrupts-extended",
>>>>>> +                                    irq_range, ARRAY_SIZE(irq_range));
>>>>>> +    if ( rc && (rc != -EOVERFLOW) )
>>>>>> +        panic("%s: unable to find interrupt-extended in %s node\n",
>>>>>> +               node->full_name, imsic_node->full_name);
>>>>> Why exactly is EOVERFLOW tolerable here?
>>>> QEMU generates two IMSIC device tree nodes: one for M-mode and one for S-mode.
>>>> For the hypervisor, we don’t really care about the M-mode IMSIC node — we're only
>>>> interested in the S-mode IMSIC node.
>>>>
>>>> The IMSIC node includes this information in the|"interrupts-extended"| property,
>>>> which has the following format:
>>>>      interrupt-extended = {, },...
>>>> The number of such|| pairs depends on the number of CPUs the platform has.
>>>>
>>>> For our purposes, to determine whether the IMSIC node corresponds to M-mode or not, it’s sufficient to read only the first pair and check the mode like this:
>>>>
>>>>      if ( irq_range[1] == IRQ_M_EXT )
>>>>
>>>> Thereby dt_property_read_u32_array() will return -EOVERFLOW in the case when a platfrom
>>>> has more then one CPU as we passed irq_range[2] as an argument but the amount of values
>>>> in "interrupts-extended" property will be (2 * CPUS_NUM).
>>>>
>>>> I can update the comment above dt_property_read_u32_array() for more clearness.
>>> Yet my question remains: Why would it be okay to ignore the remaining entries,
>>> and hence accept -EOVERFLOW as kind-of-success?
>> Because for other entries the IMSIC mode will be the same and the difference will be only in
>> interrupt controller's phandle
> And we can blindly take this for granted? Would you mind extending the
> comment that's there to include this aspect?

I tried to compile dtc with different modes in interrupt-extends and compilation doesn't failed, so
it's not really granted.
Just to be sure, I'll check all items of interrupts-extend not just the first one.

~ Oleksii

>> which we don't care about in this function and cares only about
>> in imisic_init(), look at usage of imsic_get_parent_hartid().
--------------FPk9gRSiKMP70wNvdX0HCAms
Content-Type: text/html; charset=UTF-8
Content-Transfer-Encoding: 8bit



  
    
  
  
    


    

    
On 4/17/25 5:30 PM, Jan Beulich wrote:

    

    

      
On 17.04.2025 17:21, Oleksii Kurochko wrote:


      

        
On 4/16/25 12:30 PM, Jan Beulich wrote:


        

          
On 16.04.2025 12:15, Oleksii Kurochko wrote:


          

            
On 4/14/25 12:04 PM, Jan Beulich wrote:


            

              
On 08.04.2025 17:57, Oleksii Kurochko wrote:


              

                
+    rc = dt_property_read_u32(node, "msi-parent", &imsic_phandle);
+    if ( !rc )
+        panic("%s: IDC mode not supported\n", node->full_name);
+
+    imsic_node = dt_find_node_by_phandle(imsic_phandle);
+    if ( !imsic_node )
+        panic("%s: unable to find IMSIC node\n", node->full_name);
+
+    /* check imsic mode */
+    rc = dt_property_read_u32_array(imsic_node, "interrupts-extended",
+                                    irq_range, ARRAY_SIZE(irq_range));
+    if ( rc && (rc != -EOVERFLOW) )
+        panic("%s: unable to find interrupt-extended in %s node\n",
+               node->full_name, imsic_node->full_name);


              

              
Why exactly is EOVERFLOW tolerable here?


            

            
QEMU generates two IMSIC device tree nodes: one for M-mode and one for S-mode.
For the hypervisor, we don’t really care about the M-mode IMSIC node — we're only
interested in the S-mode IMSIC node.

The IMSIC node includes this information in the|"interrupts-extended"| property,
which has the following format:
    interrupt-extended = {<interrupt-controller-phandle>, <machine_mode>},...
The number of such|<phandle, mode>| pairs depends on the number of CPUs the platform has.

For our purposes, to determine whether the IMSIC node corresponds to M-mode or not, it’s sufficient to read only the first pair and check the mode like this:

    if ( irq_range[1] == IRQ_M_EXT )

Thereby dt_property_read_u32_array() will return -EOVERFLOW in the case when a platfrom
has more then one CPU as we passed irq_range[2] as an argument but the amount of values
in "interrupts-extended" property will be (2 * CPUS_NUM).

I can update the comment above dt_property_read_u32_array() for more clearness.


          

          
Yet my question remains: Why would it be okay to ignore the remaining entries,
and hence accept -EOVERFLOW as kind-of-success?


        

        
Because for other entries the IMSIC mode will be the same and the difference will be only in
interrupt controller's phandle


      

      
And we can blindly take this for granted? Would you mind extending the
comment that's there to include this aspect?

    

    
I tried to compile dtc with different modes in interrupt-extends and compilation doesn't failed, so
it's not really granted.
Just to be sure, I'll check all items of interrupts-extend not just the first one.

~ Oleksii



    

      

        
which we don't care about in this function and cares only about
in imisic_init(), look at usage of imsic_get_parent_hartid().


      

      

    

  


--------------FPk9gRSiKMP70wNvdX0HCAms--


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From: Bertrand Marquis 
To: Andrew Cooper 
CC: Xen-devel , Lin Liu ,
	Anthony PERARD , Michal Orzel
	, Jan Beulich , Julien Grall
	, =?iso-8859-1?Q?Roger_Pau_Monn=E9?= ,
	Stefano Stabellini , Volodymyr Babchuk
	, Shawn Anastasio
	, Oleksii Kurochko
	, "Daniel P . Smith"
	
Subject: Re: [PATCH v6 04/15] xen/device-tree: Remove use of *_to_cpup()
 helpers
Thread-Topic: [PATCH v6 04/15] xen/device-tree: Remove use of *_to_cpup()
 helpers
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Date: Fri, 18 Apr 2025 13:34:49 +0000
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 <20250416115900.2491661-5-andrew.cooper3@citrix.com>
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Hi Andrew,

> On 16 Apr 2025, at 13:58, Andrew Cooper  wrote=
:
>=20
> From: Lin Liu 
>=20
> These wrappers simply hide a deference, which adds to the cognitive compl=
exity
> of reading the code.  As such, they're not going to be included in the ne=
w
> byteswap infrastructure.
>=20
> No functional change.
>=20
> Signed-off-by: Lin Liu 
> Signed-off-by: Andrew Cooper 

Acked-by: Bertrand Marquis 

Cheers
Bertrand



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From: "Teddy Astie" 
Subject: =?utf-8?Q?[RFC=20PATCH=202/4]=20x86/hvm:=20Consider=20phyaddr=5Fabi=20when=20copying=20from/to=20guest=20memory?=
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Signed-off-by: Teddy Astie 
---
 xen/arch/x86/hvm/hvm.c | 17 ++++++++++++++---
 1 file changed, 14 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index 6f1174c512..5923166b9b 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -3499,7 +3499,11 @@ unsigned int copy_to_user_hvm(void *to, const void *from, unsigned int len)
         return 0;
     }
 
-    rc = hvm_copy_to_guest_linear((unsigned long)to, from, len, 0, NULL);
+    if ( is_hvm_physaddr_abi(current->domain) )    
+        rc = hvm_copy_to_guest_phys((unsigned long)to, from, len, current);
+    else
+        rc = hvm_copy_to_guest_linear((unsigned long)to, from, len, 0, NULL);
+
     return rc ? len : 0; /* fake a copy_to_user() return code */
 }
 
@@ -3513,7 +3517,10 @@ unsigned int clear_user_hvm(void *to, unsigned int len)
         return 0;
     }
 
-    rc = hvm_copy_to_guest_linear((unsigned long)to, NULL, len, 0, NULL);
+    if ( is_hvm_physaddr_abi(current->domain) )
+        rc = hvm_copy_to_guest_phys((unsigned long)to, NULL, len, current);
+    else
+        rc = hvm_copy_to_guest_linear((unsigned long)to, NULL, len, 0, NULL);
 
     return rc ? len : 0; /* fake a clear_user() return code */
 }
@@ -3528,7 +3535,11 @@ unsigned int copy_from_user_hvm(void *to, const void *from, unsigned int len)
         return 0;
     }
 
-    rc = hvm_copy_from_guest_linear(to, (unsigned long)from, len, 0, NULL);
+    if ( is_hvm_physaddr_abi(current->domain) )
+        rc = hvm_copy_from_guest_phys(to, (unsigned long)from, len);
+    else
+        rc = hvm_copy_from_guest_linear(to, (unsigned long)from, len, 0, NULL);
+
     return rc ? len : 0; /* fake a copy_from_user() return code */
 }
 
-- 
2.47.2



Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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From: "Teddy Astie" 
Subject: =?utf-8?Q?[RFC=20PATCH=200/4]=20Physical=20address=20hypercall=20ABI=20("HVMv2")?=
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In current HVM mode, when a hypercall references a structure in guest memory,
it is passed to the hypervisor as its "linear address" (e.g virtual address for
the x86 long mode).
One of the caveats is that this linear address (GVA) is generally not directly
usable by the Xen and needs to be translated from GVA to GPA then HPA. This
implies a complex and potentially expensive lookup of the pagetables inside the
guest. This can be significant, especially if the P2M cannot use efficiently
superpages (or with e.g XSA-304).

This proposal introduce a new mode where all addresses used for hypercalls are
GPADDR instead of GVADDR, therefore, looking up the HPA related to this GPA
only needs a P2M lookup and not looking through the inside-guest pagetables.

This mode is opt-in and must be enabled explicitely by the toolstack.

This is also mandatory for confidential-computing guests (e.g SEV) where the
guest pagetable are not visible to the hypervisor.

In a synthetic xtf-based hypercall benchmark (VCPUOP_get_runstate_info loop),
it gives broadly a 30% overhead reduction when tested on a AMD EPYC 9124.

This serie only implement support for x86 yet this ABI is also meaningful for
other architectures as well.
A separate patch for adding support in Linux is planned.

Teddy Astie (4):
  xen: Introduce physaddr_abi CDF flag
  x86/hvm: Consider phyaddr_abi when copying from/to guest memory
  x86/public: Expose physaddr_abi through Xen HVM CPUID leaf
  libxl: Add support for enabling physaddr_abi

 tools/include/libxl.h               |  5 +++++
 tools/libs/light/libxl_create.c     |  4 ++++
 tools/libs/light/libxl_types.idl    |  1 +
 tools/xl/xl_parse.c                 |  1 +
 xen/arch/x86/cpuid.c                |  3 +++
 xen/arch/x86/hvm/hvm.c              | 17 ++++++++++++++---
 xen/common/domain.c                 | 10 +++++++++-
 xen/include/public/arch-x86/cpuid.h |  2 ++
 xen/include/public/domctl.h         |  4 +++-
 xen/include/xen/sched.h             |  6 ++++++
 10 files changed, 48 insertions(+), 5 deletions(-)

-- 
2.47.2



Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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From: "Teddy Astie" 
Subject: =?utf-8?Q?[RFC=20PATCH=201/4]=20xen:=20Introduce=20physaddr=5Fabi=20CDF=20flag?=
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To: xen-devel@lists.xenproject.org
Cc: "Teddy Astie" , "Andrew Cooper" , "Anthony PERARD" , "Michal Orzel" , "Jan Beulich" , "Julien Grall" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Stefano Stabellini" 
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Introduce the physaddr_abi flag to indicate that the guest uses
physical addresses (gpaddr) instead of virtual addresses when
performing hypercalls.

Signed-off-by: Teddy Astie 
---
 xen/common/domain.c         | 10 +++++++++-
 xen/include/public/domctl.h |  4 +++-
 xen/include/xen/sched.h     |  6 ++++++
 3 files changed, 18 insertions(+), 2 deletions(-)

diff --git a/xen/common/domain.c b/xen/common/domain.c
index 585fd726a9..1a1e51c32d 100644
--- a/xen/common/domain.c
+++ b/xen/common/domain.c
@@ -716,12 +716,14 @@ static int sanitise_domain_config(struct xen_domctl_createdomain *config)
     bool hap = config->flags & XEN_DOMCTL_CDF_hap;
     bool iommu = config->flags & XEN_DOMCTL_CDF_iommu;
     bool vpmu = config->flags & XEN_DOMCTL_CDF_vpmu;
+    bool physaddr_abi = config->flags & XEN_DOMCTL_CDF_physaddr_abi;
 
     if ( config->flags &
          ~(XEN_DOMCTL_CDF_hvm | XEN_DOMCTL_CDF_hap |
            XEN_DOMCTL_CDF_s3_integrity | XEN_DOMCTL_CDF_oos_off |
            XEN_DOMCTL_CDF_xs_domain | XEN_DOMCTL_CDF_iommu |
-           XEN_DOMCTL_CDF_nested_virt | XEN_DOMCTL_CDF_vpmu) )
+           XEN_DOMCTL_CDF_nested_virt | XEN_DOMCTL_CDF_vpmu |
+           XEN_DOMCTL_CDF_physaddr_abi) )
     {
         dprintk(XENLOG_INFO, "Unknown CDF flags %#x\n", config->flags);
         return -EINVAL;
@@ -745,6 +747,12 @@ static int sanitise_domain_config(struct xen_domctl_createdomain *config)
         return -EINVAL;
     }
 
+    if ( physaddr_abi && !hvm )
+    {
+        dprintk(XENLOG_INFO, "Physical address ABI requested for non-HVM guest");
+        return -EINVAL;
+    }
+
     if ( iommu )
     {
         if ( config->iommu_opts & ~XEN_DOMCTL_IOMMU_no_sharept )
diff --git a/xen/include/public/domctl.h b/xen/include/public/domctl.h
index 5b2063eed9..3a77efe673 100644
--- a/xen/include/public/domctl.h
+++ b/xen/include/public/domctl.h
@@ -66,9 +66,11 @@ struct xen_domctl_createdomain {
 #define XEN_DOMCTL_CDF_nested_virt    (1U << _XEN_DOMCTL_CDF_nested_virt)
 /* Should we expose the vPMU to the guest? */
 #define XEN_DOMCTL_CDF_vpmu           (1U << 7)
+/* Do the guest use physical addresses for hypercalls ? */
+#define XEN_DOMCTL_CDF_physaddr_abi   (1U << 8)
 
 /* Max XEN_DOMCTL_CDF_* constant.  Used for ABI checking. */
-#define XEN_DOMCTL_CDF_MAX XEN_DOMCTL_CDF_vpmu
+#define XEN_DOMCTL_CDF_MAX XEN_DOMCTL_CDF_physaddr_abi
 
     uint32_t flags;
 
diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h
index 559d201e0c..a29c63c737 100644
--- a/xen/include/xen/sched.h
+++ b/xen/include/xen/sched.h
@@ -1201,6 +1201,12 @@ static always_inline bool hap_enabled(const struct domain *d)
         evaluate_nospec(d->options & XEN_DOMCTL_CDF_hap);
 }
 
+static always_inline bool is_hvm_physaddr_abi(const struct domain *d)
+{
+    return IS_ENABLED(CONFIG_HVM) &&
+        evaluate_nospec(d->options & XEN_DOMCTL_CDF_physaddr_abi);
+}
+
 static inline bool is_hwdom_pinned_vcpu(const struct vcpu *v)
 {
     return (is_hardware_domain(v->domain) &&
-- 
2.47.2



Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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From: "Teddy Astie" 
Subject: =?utf-8?Q?[RFC=20PATCH=204/4]=20libxl:=20Add=20support=20for=20enabling=20physaddr=5Fabi?=
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Signed-off-by: Teddy Astie 
---
 tools/include/libxl.h            | 5 +++++
 tools/libs/light/libxl_create.c  | 4 ++++
 tools/libs/light/libxl_types.idl | 1 +
 tools/xl/xl_parse.c              | 1 +
 4 files changed, 11 insertions(+)

diff --git a/tools/include/libxl.h b/tools/include/libxl.h
index b7ad7735ca..6af9a658c9 100644
--- a/tools/include/libxl.h
+++ b/tools/include/libxl.h
@@ -178,6 +178,11 @@
  */
 #define LIBXL_HAVE_BUILDINFO_EVENT_CHANNELS 1
 
+/*
+ * The libxl_domain_build_info has physaddr_abi field.
+ */
+#define LIBXL_HAVE_BUILDINFO_PHYS_ADDR_ABI 1
+
 /*
  * libxl_domain_build_info has the u.hvm.ms_vm_genid field.
  */
diff --git a/tools/libs/light/libxl_create.c b/tools/libs/light/libxl_create.c
index e03599ea99..43e8c18768 100644
--- a/tools/libs/light/libxl_create.c
+++ b/tools/libs/light/libxl_create.c
@@ -466,6 +466,7 @@ int libxl__domain_build_info_setdefault(libxl__gc *gc,
 
         libxl_defbool_setdefault(&b_info->apic,                     true);
         libxl_defbool_setdefault(&b_info->nested_hvm,               false);
+        libxl_defbool_setdefault(&b_info->physaddr_abi,             false);
     }
 
     if (b_info->max_grant_version == LIBXL_MAX_GRANT_DEFAULT) {
@@ -662,6 +663,9 @@ int libxl__domain_make(libxl__gc *gc, libxl_domain_config *d_config,
 
             if ( libxl_defbool_val(b_info->nested_hvm) )
                 create.flags |= XEN_DOMCTL_CDF_nested_virt;
+
+            if (libxl_defbool_val(b_info->physaddr_abi))
+                create.flags |= XEN_DOMCTL_CDF_physaddr_abi;
         }
 
         if (libxl_defbool_val(b_info->vpmu))
diff --git a/tools/libs/light/libxl_types.idl b/tools/libs/light/libxl_types.idl
index 9bb2969931..d02e84471b 100644
--- a/tools/libs/light/libxl_types.idl
+++ b/tools/libs/light/libxl_types.idl
@@ -637,6 +637,7 @@ libxl_domain_build_info = Struct("domain_build_info",[
     ("nested_hvm",       libxl_defbool),
     ("apic",             libxl_defbool),
     ("dm_restrict",      libxl_defbool),
+    ("physaddr_abi",     libxl_defbool),
     ("tee",              libxl_tee_type),
     ("u", KeyedUnion(None, libxl_domain_type, "type",
                 [("hvm", Struct(None, [("firmware",         string),
diff --git a/tools/xl/xl_parse.c b/tools/xl/xl_parse.c
index 089a88935a..bd674684fa 100644
--- a/tools/xl/xl_parse.c
+++ b/tools/xl/xl_parse.c
@@ -1803,6 +1803,7 @@ void parse_config_data(const char *config_source,
     }
 
     xlu_cfg_get_defbool(config, "nestedhvm", &b_info->nested_hvm, 0);
+    xlu_cfg_get_defbool(config, "physaddr_abi", &b_info->physaddr_abi, 0);
 
     switch(b_info->type) {
     case LIBXL_DOMAIN_TYPE_HVM:
-- 
2.47.2



Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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From: "Teddy Astie" 
Subject: =?utf-8?Q?[RFC=20PATCH=203/4]=20x86/public:=20Expose=20physaddr=5Fabi=20through=20Xen=20HVM=20CPUID=20leaf?=
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The guest needs to know this information before attempting to make a hypercall
(especially ones to fetch XENFEAT_*).

Signed-off-by: Teddy Astie 
---
 xen/arch/x86/cpuid.c                | 3 +++
 xen/include/public/arch-x86/cpuid.h | 2 ++
 2 files changed, 5 insertions(+)

diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c
index 8dc68945f7..a721499920 100644
--- a/xen/arch/x86/cpuid.c
+++ b/xen/arch/x86/cpuid.c
@@ -153,6 +153,9 @@ static void cpuid_hypervisor_leaves(const struct vcpu *v, uint32_t leaf,
          */
         res->a |= XEN_HVM_CPUID_UPCALL_VECTOR;
 
+        /* Indicate if the guest uses the physical addresses hypercall ABI. */
+        if ( is_hvm_physaddr_abi(v->domain) )
+            res->a |= XEN_HVM_CPUID_PHYS_ADDR_ABI;
         break;
 
     case 5: /* PV-specific parameters */
diff --git a/xen/include/public/arch-x86/cpuid.h b/xen/include/public/arch-x86/cpuid.h
index 3bb0dd249f..b8ceb833d7 100644
--- a/xen/include/public/arch-x86/cpuid.h
+++ b/xen/include/public/arch-x86/cpuid.h
@@ -106,6 +106,8 @@
  * bound to event channels.
  */
 #define XEN_HVM_CPUID_UPCALL_VECTOR    (1u << 6)
+/* Hypercalls are using physical addresses instead of linear ones. */
+#define XEN_HVM_CPUID_PHYS_ADDR_ABI    (1u << 7)
 
 /*
  * Leaf 6 (0x40000x05)
-- 
2.47.2



Teddy Astie | Vates XCP-ng Developer

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech



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CC: Stefano Stabellini , Bertrand Marquis
	, Michal Orzel , Volodymyr
 Babchuk 
Subject: RE: [PATCH v1] xen/arm: AArch32-V8R: Add MPU register definitions
Thread-Topic: [PATCH v1] xen/arm: AArch32-V8R: Add MPU register definitions
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Date: Fri, 18 Apr 2025 15:00:47 +0000
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Hello all,
This is my first post to xen-devel. Since I'm new, let me give a brief intr=
o about "Why?"

1. I am interested in easing the ongoing burden of repeatedly obtaining saf=
ety
certification for Xen for eventual use in high assurance operational *syste=
ms*.
Call this an evergreen certification effort.

2. When I read the ISO26262 and avionics cert standards, I note that there =
is a system
architecture (it has its own "System V" lifecycle) that encompasses a set-o=
f-n
hardware items (e.g. fabricated SoC analysis and also FPGA soft IP developm=
ent) and
also a set-of-m software items (e.g., bootloader, hypervisor, guest OSes, a=
pps, containers,
etc.). For high assurance, we must evaluate the entire system and not just =
some of its items.

3. Also from the standards the govern the lifecycle and processes for devel=
oping
high assurance systems, hardware, and software, maintaining (automated) bid=
irectional
requirements identifier traceability from safety requirements "down" (i.e.,=
 through
levels of requirements decomposition, into *-architecture level designs, in=
to software
unit designs, into software unit code, and into software verification tests=
 at the unit,
library, module / architecture, and system level. From my perspective, ther=
e's a lot
riding on these requirements IDs. I would guess that many in this community
would feel concerned about dumping many (hundreds?) of requirements IDs
directly into the Xen code base, even if these were located within comments=
.

4. Because of 1, 2, and 3 (above), when I look to understand Xen requiremen=
ts sources,
my first pass is to remember that Xen is just one software item, and it wil=
l need to accept
integration requirements flowing in from the system (i.e., via KConfig sett=
ings and Device
Tree / SDT language) and also from the core types that it relies upon (i.e.=
, scoped down
to the operationally-deployed core types including Arm Cortex-R52 during bo=
ot,
but extending to co-processors it uses and then to IO devices that are used=
, etc.)
Finally, sometimes other software items flow requirements into Xen, e.g., w=
hen
Linux  paravirtualization or virtio implementations are scoped-in.

In summary, finding an agreeable way to embed requirements IDs into the Xen
source code seems essential to me, so that we can achieve evergreen high
assurance certifications for Xen.

Proposal 1: Rather than start by adding many requirements IDs into comments=
,
we might instead start out by using a less-impactful approach.
I propose that we could hand-pick some C data types (CDTs) that were known =
to be
critically important to Xen's high assurance, and simply (re)name these CDT=
s,
for example, structs and unions.

This proposal is to adopt a naming convention for handpicked safety-relevan=
t
CDTs, starting with the first two identified below.

For example in this patch, e.g. in xen/arch/arm/include/asm/arm32/mpu.h,
two CDT structs convey the bitfield requirements from the new MPU co-proces=
sors.
Specifically, in the typedefs "prbar_t" and "prlar_t" no struct tag (name) =
is used
for either of the bitfield struct. I propose adding struct tag names to bot=
h, and
then leveraging these struct tag names as requirements IDs.

Suggested Naming Convention:
 (a) E.g., For prbar_t, tag its bitfield struct with the name "PRBAR_BF"
 (b) E.g., For prlar_t, tag its bitfied struct with the name "PRLAR_BF"
 (c) Proposed bitfield struct naming convention: _BF
 (d) Going forward, for bitfield structs that flow-in safety-relevant
  requirements from the core's Technical Reference Manual (TRM)
  and registers, to use the suffix "_BF" to identify these structs. And
  to faithfully reuse the TRM's name for the register.  (application to str=
ucts)
(e) Going forward, for unions that wrap "_BF" structs, to name any
  union member name corresponding to the "_BF" as "bf" and any
  union member name corresponding to the whole as "whole".
  (application to unions that immediately wrap "_BF" structs)

The benefits of systematically following these naming conventions will be:
1) Even simple tools like grep -R can find all "_BF" requirements IDs that =
flow from
    hardware registers that have been handpicked due to their safety-releva=
nce.
2) Any CDT-parsing tool such as Doxygen, etc., can automatically find and t=
race
   all usages of "_BF" structs at several levels
   (a) Dependent structs such as "pr_t" can be automatically traced "up" to
   their "_BF" ancestor CDTs.
   (b) C function argument CDTs can be automatically traced up to any
   ancestor "_BF" CDTs, with the implication that the function may be safet=
y-relevant
   because it accesses one or more "_BF" CDTs.
   (c) Simple pointer-to-CDT usages should not obscure any facts that
   either the ".bf.*" (accessing a safety-relevant bitfield by name) or the
  ".whole" (accessing the entire register contents by value) were accessed.
3) This convention will naturally allow the new "_BF" requirements IDs
to flow into all future use / access of these safety-relevant registers, in=
cluding
future verification tests.
4) Also, it will naturally allow the new "_BF" requirements IDs
to be traced "up" into the TRM and automatically de-reference the semantics
and usage and safety-relevant notes about the bitfield, the register, and t=
he
larger context of use for that register (e.g., at which instruction will th=
e PMU's
enforcement of "HPRBAR10" / "p15,4,c6,c13,0" be activated?)
5) The xen-devel community may find that using this naming convention
provides an easier on-ramp to "start seeing safety and high assurance."
This is because engineers who read any future C source code,
or review any future patch series will see that specific lines in that C so=
urce code
are indelibly tattooed when they refer to a safety-relevant register. Wheth=
er any
line of code access the "_BF" register in part or in whole, that will becom=
e explicitly visible.
The goal is to raise community awareness by flagging access / use.

Thank you!

Sincerely,
--mark

-----Original Message-----
From: Xen-devel  On Behalf Of Julie=
n Grall
Sent: Thursday, April 17, 2025 11:55 PM
To: Ayan Kumar Halder ; xen-devel@lists.xenproje=
ct.org
Cc: Stefano Stabellini ; Bertrand Marquis ; Michal Orzel ; Volodymyr Babchuk <=
Volodymyr_Babchuk@epam.com>
Subject: Re: [PATCH v1] xen/arm: AArch32-V8R: Add MPU register definitions

[You don't often get email from julien@xen.org. Learn why this is important=
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Hi Ayan,

On 18/04/2025 00:55, Ayan Kumar Halder wrote:
> Add the definitions for HPRBAR<0..31>, HPRLAR<0..31> and HPRENR.
> The definitions are taken from ARM DDI 0568A.c ID110520, E2.2.3
> HPRBAR,
> E2.2.4 HPRENR and E2.2.6 HPRLAR.
>
> Introduce pr_t typedef which is a structure having the prbar and prlar
> members, each being structured as the registers of the AArch32-V8R archit=
ecture.
> This is the arm32 equivalent of
> "arm/mpu: Introduce MPU memory region map structure".
>
> Signed-off-by: Ayan Kumar Halder 
> ---
> This patch should be applied after
> "[PATCH v3 0/7] First chunk for Arm R82 and MPU support" in order to
> enable compilation for AArch32.
>
>   xen/arch/arm/include/asm/arm32/mpu.h  |  59 +++++++++++
>   xen/arch/arm/include/asm/mpu.h        |   4 +
>   xen/arch/arm/include/asm/mpu/cpregs.h | 135 ++++++++++++++++++++++++++
>   3 files changed, 198 insertions(+)
>   create mode 100644 xen/arch/arm/include/asm/arm32/mpu.h
>
> diff --git a/xen/arch/arm/include/asm/arm32/mpu.h
> b/xen/arch/arm/include/asm/arm32/mpu.h
> new file mode 100644
> index 0000000000..4aabd93479
> --- /dev/null
> +++ b/xen/arch/arm/include/asm/arm32/mpu.h
> @@ -0,0 +1,59 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * mpu.h: Arm Memory Protection Unit definitions for aarch64.
> + */
> +
> +#ifndef __ARM_ARM32_MPU_H
> +#define __ARM_ARM32_MPU_H
> +
> +#define XN_EL2_ENABLED  0x1

I understand the define is introduced in Luca's patch, but this a bit non-d=
escriptive... Can we find a better name? Maybe by adding the name of the re=
gister and some documentation?

> +
> +#ifndef __ASSEMBLY__
> +
> +/* Hypervisor Protection Region Base Address Register */ typedef
> +union {
> +    struct {
> +        unsigned int xn:1;       /* Execute-Never */
> +        unsigned int ap:2;       /* Acess Permission */
> +        unsigned int sh:2;       /* Sharebility */
> +        unsigned int res0:1;     /* Reserved as 0 */
> +        unsigned int base:26;    /* Base Address */
> +    } reg;
> +    uint32_t bits;
> +} prbar_t;
> +
> +/* Hypervisor Protection Region Limit Address Register */ typedef
> +union {
> +    struct {
> +        unsigned int en:1;     /* Region enable */
> +        unsigned int ai:3;     /* Memory Attribute Index */
> +        /*
> +         * There is no actual ns bit in hardware. It is used here for
> +         * compatibility with Armr64 code. Thus, we are reusing a res0 b=
it for ns.

typo: Arm64.

> +         */

Hmmmm, this would mean someone may mistakenly set the bit to 0 by mistake. =
If the field is always meant to be 0 on arm64, then I would consider to nam=
e is res0 on arm64 with an explanation.

This would make clear the bit is not supposed to have a value other than 0.

> +        unsigned int ns:1;     /* Reserved 0 by hardware */
> +        unsigned int res0:1;   /* Reserved 0 by hardware */
> +        unsigned int limit:26;  /* Limit Address */

NIT: Can we align the comments?

> +    } reg;
> +    uint32_t bits;
> +} prlar_t;
> +
> +/* Protection Region */
> +typedef struct {
> +    prbar_t prbar;
> +    prlar_t prlar;
> +    uint64_t p2m_type;          /* Used to store p2m types. */
> +} pr_t;

This looks to be common with arm64. If so, I would prefer if the structure =
is in a common header.

> +
> +#endif /* __ASSEMBLY__ */
> +
> +#endif /* __ARM_ARM32_MPU_H */
> +
> +/*
> + * Local variables:
> + * mode: C
> + * c-file-style: "BSD"
> + * c-basic-offset: 4
> + * indent-tabs-mode: nil
> + * End:
> + */
> diff --git a/xen/arch/arm/include/asm/mpu.h
> b/xen/arch/arm/include/asm/mpu.h index 77d0566f97..67127149c0 100644
> --- a/xen/arch/arm/include/asm/mpu.h
> +++ b/xen/arch/arm/include/asm/mpu.h
> @@ -8,8 +8,12 @@
>
>   #if defined(CONFIG_ARM_64)
>   # include 
> +#elif defined(CONFIG_ARM_32)
> +# include 
>   #endif
>
> +#define PRENR_MASK  GENMASK(31, 0)
> +
>   #define MPU_REGION_SHIFT  6
>   #define MPU_REGION_ALIGN  (_AC(1, UL) << MPU_REGION_SHIFT)
>   #define MPU_REGION_MASK   (~(MPU_REGION_ALIGN - 1))
> diff --git a/xen/arch/arm/include/asm/mpu/cpregs.h
> b/xen/arch/arm/include/asm/mpu/cpregs.h
> index d5cd0e04d5..7cf52aa09a 100644
> --- a/xen/arch/arm/include/asm/mpu/cpregs.h
> +++ b/xen/arch/arm/include/asm/mpu/cpregs.h
> @@ -6,18 +6,153 @@
>   /* CP15 CR0: MPU Type Register */
>   #define HMPUIR          p15,4,c0,c0,4
>
> +/* CP15 CR6: Protection Region Enable Register */
> +#define HPRENR          p15,4,c6,c1,1
> +
>   /* CP15 CR6: MPU Protection Region Base/Limit/Select Address Register *=
/
>   #define HPRSELR         p15,4,c6,c2,1
>   #define HPRBAR          p15,4,c6,c3,0
>   #define HPRLAR          p15,4,c6,c8,1
>
> +/* CP15 CR6: MPU Protection Region Base/Limit Address Register */
> +#define HPRBAR0         p15,4,c6,c8,0
> +#define HPRLAR0         p15,4,c6,c8,1
> +#define HPRBAR1         p15,4,c6,c8,4
> +#define HPRLAR1         p15,4,c6,c8,5
> +#define HPRBAR2         p15,4,c6,c9,0
> +#define HPRLAR2         p15,4,c6,c9,1
> +#define HPRBAR3         p15,4,c6,c9,4
> +#define HPRLAR3         p15,4,c6,c9,5
> +#define HPRBAR4         p15,4,c6,c10,0
> +#define HPRLAR4         p15,4,c6,c10,1
> +#define HPRBAR5         p15,4,c6,c10,4
> +#define HPRLAR5         p15,4,c6,c10,5
> +#define HPRBAR6         p15,4,c6,c11,0
> +#define HPRLAR6         p15,4,c6,c11,1
> +#define HPRBAR7         p15,4,c6,c11,4
> +#define HPRLAR7         p15,4,c6,c11,5
> +#define HPRBAR8         p15,4,c6,c12,0
> +#define HPRLAR8         p15,4,c6,c12,1
> +#define HPRBAR9         p15,4,c6,c12,4
> +#define HPRLAR9         p15,4,c6,c12,5
> +#define HPRBAR10        p15,4,c6,c13,0
> +#define HPRLAR10        p15,4,c6,c13,1
> +#define HPRBAR11        p15,4,c6,c13,4
> +#define HPRLAR11        p15,4,c6,c13,5
> +#define HPRBAR12        p15,4,c6,c14,0
> +#define HPRLAR12        p15,4,c6,c14,1
> +#define HPRBAR13        p15,4,c6,c14,4
> +#define HPRLAR13        p15,4,c6,c14,5
> +#define HPRBAR14        p15,4,c6,c15,0
> +#define HPRLAR14        p15,4,c6,c15,1
> +#define HPRBAR15        p15,4,c6,c15,4
> +#define HPRLAR15        p15,4,c6,c15,5
> +#define HPRBAR16        p15,5,c6,c8,0
> +#define HPRLAR16        p15,5,c6,c8,1
> +#define HPRBAR17        p15,5,c6,c8,4
> +#define HPRLAR17        p15,5,c6,c8,5
> +#define HPRBAR18        p15,5,c6,c9,0
> +#define HPRLAR18        p15,5,c6,c9,1
> +#define HPRBAR19        p15,5,c6,c9,4
> +#define HPRLAR19        p15,5,c6,c9,5
> +#define HPRBAR20        p15,5,c6,c10,0
> +#define HPRLAR20        p15,5,c6,c10,1
> +#define HPRBAR21        p15,5,c6,c10,4
> +#define HPRLAR21        p15,5,c6,c10,5
> +#define HPRBAR22        p15,5,c6,c11,0
> +#define HPRLAR22        p15,5,c6,c11,1
> +#define HPRBAR23        p15,5,c6,c11,4
> +#define HPRLAR23        p15,5,c6,c11,5
> +#define HPRBAR24        p15,5,c6,c12,0
> +#define HPRLAR24        p15,5,c6,c12,1
> +#define HPRBAR25        p15,5,c6,c12,4
> +#define HPRLAR25        p15,5,c6,c12,5
> +#define HPRBAR26        p15,5,c6,c13,0
> +#define HPRLAR26        p15,5,c6,c13,1
> +#define HPRBAR27        p15,5,c6,c13,4
> +#define HPRLAR27        p15,5,c6,c13,5
> +#define HPRBAR28        p15,5,c6,c14,0
> +#define HPRLAR28        p15,5,c6,c14,1
> +#define HPRBAR29        p15,5,c6,c14,4
> +#define HPRLAR29        p15,5,c6,c14,5
> +#define HPRBAR30        p15,5,c6,c15,0
> +#define HPRLAR30        p15,5,c6,c15,1
> +#define HPRBAR31        p15,5,c6,c15,4
> +#define HPRLAR31        p15,5,c6,c15,5

NIT: Is there any way we could generate the values using macros?

> +
>   /* Aliases of AArch64 names for use in common code */
>   #ifdef CONFIG_ARM_32
>   /* Alphabetically... */
>   #define MPUIR_EL2       HMPUIR
>   #define PRBAR_EL2       HPRBAR
> +#define PRBAR0_EL2      HPRBAR0

AFAIU, the alias will be mainly used in the macro generate the switch. Rath=
er than open-coding all the PR*AR_EL2, can we provide two macros PR{B, L}AR=
_N that will be implemented as HPR{B,L}AR##n for arm32 and PR{B,L}AR##n for=
 arm64?

>   #define PRSELR_EL2      HPRSELR
> +
>   #endif /* CONFIG_ARM_32 */
>
>   #endif /* __ARM_MPU_CPREGS_H */

Cheers,

--
Julien Grall


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On 4/7/25 13:02, Stewart Hildebrand wrote:
> On 3/30/25 17:59, Julien Grall wrote:
>> Hi Stewart,
>>
>> I realize this series is at v18, but there are a few bits security-wise
>> that concerns me. They don't have to be handled now because vPCI is
>> still in tech preview. But we probably want to keep track of any issues
>> if this hasn't yet been done in the code.
> 
> No worries, we want to get this right. Thank you for taking a look.
> 
>> On 25/03/2025 17:27, Stewart Hildebrand wrote:
>>> diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c
>>> index 1e6aa5d799b9..49c9444195d7 100644
>>> --- a/xen/drivers/vpci/vpci.c
>>> +++ b/xen/drivers/vpci/vpci.c
>>> @@ -81,6 +81,32 @@ static int assign_virtual_sbdf(struct pci_dev *pdev)
>>>       return 0;
>>>   }
>>>   +/*
>>> + * Find the physical device which is mapped to the virtual device
>>> + * and translate virtual SBDF to the physical one.
>>> + */
>>> +bool vpci_translate_virtual_device(struct domain *d, pci_sbdf_t *sbdf)
>>> +{
>>> +    const struct pci_dev *pdev;
>>> +
>>> +    ASSERT(!is_hardware_domain(d));
>>> +    read_lock(&d->pci_lock);
>>> +
>>> +    for_each_pdev ( d, pdev )
>>
>> I can't remember whether this was discussed before (there is no
>> indication in the commit message). What's the maximum number of PCI
>> devices supported? Do we limit it?
>>
>> Asking because iterating through the list could end up to be quite
>> expensive.
> 
> 32. See xen/include/xen/vpci.h:
> #define VPCI_MAX_VIRT_DEV       (PCI_SLOT(~0) + 1)
> 
>> Also, not a change for this patch, but it seems vcpi_{read,write} will
>> also do another lookup. This is quite innefficient. We should consider
>> return a pdev and use it for vcpi_{read,write}.
> 
> Hm. Right. Indeed, a future consideration.
> 
>>> +    {
>>> +        if ( pdev->vpci && (pdev->vpci->guest_sbdf.sbdf == sbdf->sbdf) )
>>> +        {
>>> +            /* Replace guest SBDF with the physical one. */
>>> +            *sbdf = pdev->sbdf;
>>> +            read_unlock(&d->pci_lock);
>>> +            return true;
>>> +        }
>>> +    }
>>> +
>>> +    read_unlock(&d->pci_lock);
>>
>> At the point this is unlocked, what prevent the sbdf to be detached from
>> the domain?
> 
> Nothing.
> 
>> If nothing, would this mean the domain can access something it should
>> not?
> 
> Yep. I have a patch in the works to acquire the lock in the I/O
> handlers. I would prefer doing this in a pre-patch so that we don't
> temporarily introduce the race condition.

I spoke too soon. If the pdev were deassigned right after dropping the
lock here, the access would get rejected in the 2nd pdev lookup inside
vpci_{read,write}, due to the pdev not belonging to the domain any more.

In hindsight, moving the lock (as I did in v19) was not strictly
necessary. Anyway, this can all be simplified by calling
vpci_translate_virtual_device() from within vpci_{read,write}. I'll send
v20 with this approach, then we can decide if we like v18 or v20 better.

>>> +    return false;
>>> +}
>>> +
>>>   #endif /* CONFIG_HAS_VPCI_GUEST_SUPPORT */
>>>     void vpci_deassign_device(struct pci_dev *pdev)
>>> diff --git a/xen/include/xen/vpci.h b/xen/include/xen/vpci.h
>>> index 807401b2eaa2..e355329913ef 100644
>>> --- a/xen/include/xen/vpci.h
>>> +++ b/xen/include/xen/vpci.h
>>> @@ -311,6 +311,18 @@ static inline int __must_check vpci_reset_device(struct pci_dev *pdev)
>>>       return vpci_assign_device(pdev);
>>>   }
>>>   +#ifdef CONFIG_HAS_VPCI_GUEST_SUPPORT
>>> +bool vpci_translate_virtual_device(struct domain *d, pci_sbdf_t *sbdf);
>>> +#else
>>> +static inline bool vpci_translate_virtual_device(struct domain *d,
>>> +                                                 pci_sbdf_t *sbdf)
>>> +{
>>> +    ASSERT_UNREACHABLE();
>>> +
>>> +    return false;
>>> +}
>>> +#endif
>>> +
>>>   #endif
>>>     /*
> 
> 



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From: Stewart Hildebrand 
To: 
CC: Stewart Hildebrand , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Anthony PERARD , "Jiqian
 Chen" , Mykyta Poturai 
Subject: [PATCH v20 0/2] PCI devices passthrough on Arm, part 3
Date: Fri, 18 Apr 2025 14:58:35 -0400
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This is next version of vPCI rework. Aim of this series is to prepare
ground for introducing PCI support on ARM platform.

in v20:
 - drop ("vpci: acquire d->pci_lock in I/O handlers") as it was
   unnecessary

in v19:
 - ("xen/arm: check read handler behavior") is ready to be committed
 - add ("vpci: acquire d->pci_lock in I/O handlers")

in v18:
 - address warning in vpci test suite

in v17:
 - add ("xen/arm: check read handler behavior")
 - drop ("xen/arm: account IO handlers for emulated PCI MSI-X") as it
   should wait for future work
 - drop committed patches

in v16:
 - minor updates - see individual patches

in v15:
 - reorder so ("arm/vpci: honor access size when returning an error")
   comes first

in v14:
 - drop first 9 patches as they were committed
 - updated ("vpci/header: emulate PCI_COMMAND register for guests")

in v13:
 - drop ("xen/arm: vpci: permit access to guest vpci space") as it was
   unnecessary

in v12:
 - I (Stewart) coordinated with Volodomyr to send this whole series. So,
   add my (Stewart) Signed-off-by to all patches.
 - The biggest change is to re-work the PCI_COMMAND register patch.
   Additional feedback has also been addressed - see individual patches.
 - Drop ("pci: msi: pass pdev to pci_enable_msi() function") and
   ("pci: introduce per-domain PCI rwlock") as they were committed
 - Rename ("rangeset: add rangeset_empty() function")
       to ("rangeset: add rangeset_purge() function")
 - Rename ("vpci/header: rework exit path in init_bars")
       to ("vpci/header: rework exit path in init_header()")

in v11:
 - Added my (Volodymyr) Signed-off-by tag to all patches
 - Patch "vpci/header: emulate PCI_COMMAND register for guests" is in
   intermediate state, because it was agreed to rework it once Stewart's
   series on register handling are in.
 - Addressed comments, please see patch descriptions for details.

in v10:

 - Removed patch ("xen/arm: vpci: check guest range"), proper fix
   for the issue is part of ("vpci/header: emulate PCI_COMMAND
   register for guests")
 - Removed patch ("pci/header: reset the command register when adding
   devices")
 - Added patch ("rangeset: add rangeset_empty() function") because
   this function is needed in ("vpci/header: handle p2m range sets
   per BAR")
 - Added ("vpci/header: handle p2m range sets per BAR") which addressed
   an issue discovered by Andrii Chepurnyi during virtio integration
 - Added ("pci: msi: pass pdev to pci_enable_msi() function"), which is
   prereq for ("pci: introduce per-domain PCI rwlock")
 - Fixed "Since v9/v8/... " comments in changelogs to reduce confusion.
   I left "Since" entries for older versions, because they were added
   by original author of the patches.

in v9:

v9 includes addressed commentes from a previous one. Also it
introduces a couple patches from Stewart. This patches are related to
vPCI use on ARM. Patch "vpci/header: rework exit path in init_bars"
was factored-out from "vpci/header: handle p2m range sets per BAR".

in v8:

The biggest change from previous, mistakenly named, v7 series is how
locking is implemented. Instead of d->vpci_rwlock we introduce
d->pci_lock which has broader scope, as it protects not only domain's
vpci state, but domain's list of PCI devices as well.

As we discussed in IRC with Roger, it is not feasible to rework all
the existing code to use the new lock right away. It was agreed that
any write access to d->pdev_list will be protected by **both**
d->pci_lock in write mode and pcidevs_lock(). Read access on other
hand should be protected by either d->pci_lock in read mode or
pcidevs_lock(). It is expected that existing code will use
pcidevs_lock() and new users will use new rw lock. Of course, this
does not mean that new users shall not use pcidevs_lock() when it is
appropriate.

Changes from previous versions are described in each separate patch.

Oleksandr Andrushchenko (1):
  vpci: translate virtual PCI bus topology for guests

Stewart Hildebrand (1):
  xen/arm: check read handler behavior

 tools/tests/vpci/emul.h |  2 +-
 xen/arch/arm/io.c       |  2 ++
 xen/arch/arm/vpci.c     |  4 +++
 xen/drivers/vpci/vpci.c | 73 +++++++++++++++++++++++++++++++++++++----
 4 files changed, 73 insertions(+), 8 deletions(-)


base-commit: 64cf7a80a17a017a6b88ea17c7f490e42baefcca
-- 
2.49.0



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From: Stewart Hildebrand 
To: 
CC: Stewart Hildebrand , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Julien Grall 
Subject: [PATCH v20 1/2] xen/arm: check read handler behavior
Date: Fri, 18 Apr 2025 14:58:36 -0400
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We expect mmio read handlers to leave the bits above the access size
zeroed. Add an ASSERT to check this aspect of read handler behavior.

Suggested-by: Roger Pau Monné 
Signed-off-by: Stewart Hildebrand 
Acked-by: Julien Grall 
---
There's no need to wait for the rest of the series to commit this patch.

v19->v20:
* no change

v18->v19:
* add Julien's A-b
* s/GENMASK_ULL/GENMASK/

v17->v18:
* no change

v16->v17:
* new patch

See https://lore.kernel.org/xen-devel/bc6660ef-59f1-4514-9792-067d987e3fbc@xen.org/

Also see 7db7bd0f319f ("arm/vpci: honor access size when returning an error")

Also see xen/arch/arm/ioreq.c:handle_ioserv()
---
 xen/arch/arm/io.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/xen/arch/arm/io.c b/xen/arch/arm/io.c
index 653428e16c1f..5a4b0e8f25c6 100644
--- a/xen/arch/arm/io.c
+++ b/xen/arch/arm/io.c
@@ -37,6 +37,8 @@ static enum io_state handle_read(const struct mmio_handler *handler,
     if ( !handler->ops->read(v, info, &r, handler->priv) )
         return IO_ABORT;
 
+    ASSERT((r & ~GENMASK((1U << info->dabt.size) * 8 - 1, 0)) == 0);
+
     r = sign_extend(dabt, r);
 
     set_user_reg(regs, dabt.reg, r);
-- 
2.49.0



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From: Stewart Hildebrand 
To: 
CC: Oleksandr Andrushchenko ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , "Stewart
 Hildebrand" , Anthony PERARD
	, Stefano Stabellini ,
	Julien Grall , Bertrand Marquis ,
	Michal Orzel , Volodymyr Babchuk
	, Jiqian Chen , "Mykyta
 Poturai" , Volodymyr Babchuk
	
Subject: [PATCH v20 2/2] vpci: translate virtual PCI bus topology for guests
Date: Fri, 18 Apr 2025 14:58:37 -0400
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From: Oleksandr Andrushchenko 

There are two originators for the PCI configuration space access:
1. The domain that owns physical host bridge: MMIO handlers are
there so we can update vPCI register handlers with the values
written by the hardware domain, e.g. physical view of the registers
vs guest's view on the configuration space.
2. Guest access to the passed through PCI devices: we need to properly
map virtual bus topology to the physical one, e.g. pass the configuration
space access to the corresponding physical devices.

In vpci_read(), use the access size to create a mask so as to not set
any bits above the access size when returning an error.

Signed-off-by: Oleksandr Andrushchenko 
Signed-off-by: Volodymyr Babchuk 
Signed-off-by: Stewart Hildebrand 
---
In v20:
* call translate_virtual_device() from within locked context of
  vpci_{read,write}
* update commit message
In v19:
* move locking to pre-patch
In v18:
* address warning in vpci test suite
In v17:
* move lock to inside vpci_translate_virtual_device()
* acks were previously given for Arm [0] and vPCI [1], but since it was
  two releases ago and the patch has changed, I didn't pick them up

[0] https://lore.kernel.org/xen-devel/4afe33f2-72e6-4755-98ce-d7f9da374e90@xen.org/
[1] https://lore.kernel.org/xen-devel/Zk70udmiriruMt0r@macbook/

In v15:
- base on top of ("arm/vpci: honor access size when returning an error")
In v11:
- Fixed format issues
- Added ASSERT_UNREACHABLE() to the dummy implementation of
vpci_translate_virtual_device()
- Moved variable in vpci_sbdf_from_gpa(), now it is easier to follow
the logic in the function
Since v9:
- Commend about required lock replaced with ASSERT()
- Style fixes
- call to vpci_translate_virtual_device folded into vpci_sbdf_from_gpa
Since v8:
- locks moved out of vpci_translate_virtual_device()
Since v6:
- add pcidevs locking to vpci_translate_virtual_device
- update wrt to the new locking scheme
Since v5:
- add vpci_translate_virtual_device for #ifndef CONFIG_HAS_VPCI_GUEST_SUPPORT
  case to simplify ifdefery
- add ASSERT(!is_hardware_domain(d)); to vpci_translate_virtual_device
- reset output register on failed virtual SBDF translation
Since v4:
- indentation fixes
- constify struct domain
- updated commit message
- updates to the new locking scheme (pdev->vpci_lock)
Since v3:
- revisit locking
- move code to vpci.c
Since v2:
 - pass struct domain instead of struct vcpu
 - constify arguments where possible
 - gate relevant code with CONFIG_HAS_VPCI_GUEST_SUPPORT
New in v2
---
 tools/tests/vpci/emul.h |  2 +-
 xen/arch/arm/vpci.c     |  4 +++
 xen/drivers/vpci/vpci.c | 73 +++++++++++++++++++++++++++++++++++++----
 3 files changed, 71 insertions(+), 8 deletions(-)

diff --git a/tools/tests/vpci/emul.h b/tools/tests/vpci/emul.h
index da446bba86b4..dd048cffbf9d 100644
--- a/tools/tests/vpci/emul.h
+++ b/tools/tests/vpci/emul.h
@@ -89,7 +89,7 @@ typedef union {
 
 #define __hwdom_init
 
-#define is_hardware_domain(d) ((void)(d), false)
+#define is_hardware_domain(d) ((void)(d), true)
 
 #define has_vpci(d) true
 
diff --git a/xen/arch/arm/vpci.c b/xen/arch/arm/vpci.c
index b63a356bb4a8..618ddb7f6547 100644
--- a/xen/arch/arm/vpci.c
+++ b/xen/arch/arm/vpci.c
@@ -34,6 +34,8 @@ static int vpci_mmio_read(struct vcpu *v, mmio_info_t *info,
     /* data is needed to prevent a pointer cast on 32bit */
     unsigned long data;
 
+    ASSERT(!bridge == !is_hardware_domain(v->domain));
+
     if ( vpci_ecam_read(sbdf, ECAM_REG_OFFSET(info->gpa),
                         1U << info->dabt.size, &data) )
     {
@@ -52,6 +54,8 @@ static int vpci_mmio_write(struct vcpu *v, mmio_info_t *info,
     struct pci_host_bridge *bridge = p;
     pci_sbdf_t sbdf = vpci_sbdf_from_gpa(bridge, info->gpa);
 
+    ASSERT(!bridge == !is_hardware_domain(v->domain));
+
     return vpci_ecam_write(sbdf, ECAM_REG_OFFSET(info->gpa),
                            1U << info->dabt.size, r);
 }
diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c
index 1e6aa5d799b9..fc409f3fc346 100644
--- a/xen/drivers/vpci/vpci.c
+++ b/xen/drivers/vpci/vpci.c
@@ -174,6 +174,41 @@ int vpci_assign_device(struct pci_dev *pdev)
 }
 #endif /* __XEN__ */
 
+#ifdef CONFIG_HAS_VPCI_GUEST_SUPPORT
+/*
+ * Find the physical device which is mapped to the virtual device
+ * and translate virtual SBDF to the physical one.
+ */
+static const struct pci_dev *translate_virtual_device(const struct domain *d,
+                                                      pci_sbdf_t *sbdf)
+{
+    const struct pci_dev *pdev;
+
+    ASSERT(!is_hardware_domain(d));
+    ASSERT(rw_is_locked(&d->pci_lock));
+
+    for_each_pdev ( d, pdev )
+    {
+        if ( pdev->vpci && (pdev->vpci->guest_sbdf.sbdf == sbdf->sbdf) )
+        {
+            /* Replace guest SBDF with the physical one. */
+            *sbdf = pdev->sbdf;
+            return pdev;
+        }
+    }
+
+    return NULL;
+}
+#else
+static const struct pci_dev *translate_virtual_device(const struct domain *d,
+                                                      pci_sbdf_t *sbdf)
+{
+    ASSERT_UNREACHABLE();
+
+    return NULL;
+}
+#endif /* CONFIG_HAS_VPCI_GUEST_SUPPORT */
+
 static int vpci_register_cmp(const struct vpci_register *r1,
                              const struct vpci_register *r2)
 {
@@ -438,7 +473,7 @@ uint32_t vpci_read(pci_sbdf_t sbdf, unsigned int reg, unsigned int size)
     const struct pci_dev *pdev;
     const struct vpci_register *r;
     unsigned int data_offset = 0;
-    uint32_t data = ~(uint32_t)0;
+    uint32_t data = 0xffffffffU >> (32 - 8 * size);
 
     if ( !size )
     {
@@ -453,9 +488,21 @@ uint32_t vpci_read(pci_sbdf_t sbdf, unsigned int reg, unsigned int size)
      * pci_lock is sufficient.
      */
     read_lock(&d->pci_lock);
-    pdev = pci_get_pdev(d, sbdf);
-    if ( !pdev && is_hardware_domain(d) )
-        pdev = pci_get_pdev(dom_xen, sbdf);
+    if ( is_hardware_domain(d) )
+    {
+        pdev = pci_get_pdev(d, sbdf);
+        if ( !pdev )
+            pdev = pci_get_pdev(dom_xen, sbdf);
+    }
+    else
+    {
+        pdev = translate_virtual_device(d, &sbdf);
+        if ( !pdev )
+        {
+            read_unlock(&d->pci_lock);
+            return data;
+        }
+    }
     if ( !pdev || !pdev->vpci )
     {
         read_unlock(&d->pci_lock);
@@ -571,9 +618,21 @@ void vpci_write(pci_sbdf_t sbdf, unsigned int reg, unsigned int size,
      * are modifying BARs, so there is a room for improvement.
      */
     write_lock(&d->pci_lock);
-    pdev = pci_get_pdev(d, sbdf);
-    if ( !pdev && is_hardware_domain(d) )
-        pdev = pci_get_pdev(dom_xen, sbdf);
+    if ( is_hardware_domain(d) )
+    {
+        pdev = pci_get_pdev(d, sbdf);
+        if ( !pdev )
+            pdev = pci_get_pdev(dom_xen, sbdf);
+    }
+    else
+    {
+        pdev = translate_virtual_device(d, &sbdf);
+        if ( !pdev )
+        {
+            write_unlock(&d->pci_lock);
+            return;
+        }
+    }
     if ( !pdev || !pdev->vpci )
     {
         /* Ignore writes to read-only devices, which have no ->vpci. */
-- 
2.49.0



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From: Jason Andryuk 
To: 
CC: Jason Andryuk , Juergen Gross ,
	Julien Grall , Anthony PERARD 
Subject: [PATCH] xenstored: Remove setjmp.h
Date: Fri, 18 Apr 2025 16:59:33 -0400
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Use of setjmp/longjmp as removed in 2006, but the include remained.
Remove it now.

Fixes: 1bac3b49cd ("Import the current version of talloc...")
Signed-off-by: Jason Andryuk 
---
I truncated the Fixes above.  The full line is:
Fixes: 1bac3b49cd ("Import the current version of talloc from the Samba 3 source base.  This gives us greater confidence that our talloc implementation is "known good".  Remove the OOM handling from consider_message: talloc_set_fail_handler is no longer supported.")
---
 tools/xenstored/core.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/tools/xenstored/core.c b/tools/xenstored/core.c
index 91b2530e5c..835402af81 100644
--- a/tools/xenstored/core.c
+++ b/tools/xenstored/core.c
@@ -35,7 +35,6 @@
 #include 
 #include 
 #include 
-#include 
 
 #include 
 #include 
-- 
2.49.0



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From: Jason Andryuk 
To: 
CC: Jason Andryuk , Anthony PERARD
	, Juergen Gross 
Subject: [PATCH v2 1/2] tools/libxl: Skip invalid IRQs
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A PCI device's irq field is an 8-bit number.  A value of 0xff indicates
that the device IRQ is not connected.  Additionally, the Linux ACPI code
can convert these 0xff values to IRQ_NOTCONNECTED(0x80000000) because
"0x80000000 is guaranteed to be outside the available range of
interrupts and easy to distinguish from other possible incorrect
values."  When the hypercall to assign that IRQ fails, device
passthrough as a whole fails.

Add checking for a valid IRQ and skip the IRQ handling for PCI devices
outside that range.  This allows for passthrough of devices without
legacy IRQs.

Signed-off-by: Jason Andryuk 
---
v2:
Remove () from around fscanf()
---
 tools/libs/light/libxl_pci.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/tools/libs/light/libxl_pci.c b/tools/libs/light/libxl_pci.c
index 1647fd6f47..6ddcdef6ad 100644
--- a/tools/libs/light/libxl_pci.c
+++ b/tools/libs/light/libxl_pci.c
@@ -26,6 +26,9 @@
 #define PCI_BDF_XSPATH         "%04x-%02x-%02x-%01x"
 #define PCI_PT_QDEV_ID         "pci-pt-%02x_%02x.%01x"
 
+/* PCI Interrupt Line is an 8-bit value, 0xff means disconnected. */
+#define PCI_IRQ_LINE_LIMIT     0xff
+
 static unsigned int pci_encode_bdf(libxl_device_pci *pci)
 {
     unsigned int value;
@@ -1495,7 +1498,7 @@ static void pci_add_dm_done(libxl__egc *egc,
             LOGED(ERROR, domainid, "Couldn't open %s", sysfs_path);
             goto out_no_irq;
         }
-        if ((fscanf(f, "%u", &irq) == 1) && irq) {
+        if (fscanf(f, "%u", &irq) == 1 && irq > 0 && irq < PCI_IRQ_LINE_LIMIT) {
             r = xc_physdev_map_pirq(ctx->xch, domid, irq, &irq);
             if (r < 0) {
                 LOGED(ERROR, domainid, "xc_physdev_map_pirq irq=%d (error=%d)",
@@ -2257,7 +2260,7 @@ skip_bar:
             goto skip_legacy_irq;
         }
 
-        if ((fscanf(f, "%u", &irq) == 1) && irq) {
+        if (fscanf(f, "%u", &irq) == 1 && irq > 0 && irq < PCI_IRQ_LINE_LIMIT) {
             rc = xc_physdev_unmap_pirq(ctx->xch, domid, irq);
             if (rc < 0) {
                 /*
-- 
2.49.0



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From: Jason Andryuk 
To: 
CC: Jason Andryuk , Anthony PERARD
	, Juergen Gross 
Subject: [PATCH v2 0/2] libxl: Skip invalid IRQs
Date: Fri, 18 Apr 2025 17:05:48 -0400
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Allow assigning devices without a legacy IRQ.
v2 adds patch 2 to switch to unsigned int.

Jason Andryuk (2):
  tools/libxl: Skip invalid IRQs
  tools/libxl: Switch irq to unsigned int

 tools/libs/light/libxl_pci.c | 23 ++++++++++++++---------
 1 file changed, 14 insertions(+), 9 deletions(-)

-- 
2.49.0



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From: Jason Andryuk 
To: 
CC: Jason Andryuk , Anthony PERARD
	, Juergen Gross 
Subject: [PATCH v2 2/2] tools/libxl: Switch irq to unsigned int
Date: Fri, 18 Apr 2025 17:05:50 -0400
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The PCI device irq is read with fscanf(%u).  Switch the irq variable to
unsigned int to match.

Linux driver/pci/pci-sysfs.c:irq_show() uses %u to print the value.

However, unsigned int irq doesn't compile because of:
error: pointer targets in passing argument 4 of 'xc_physdev_map_pirq' differ in signedness [-Werror=pointer-sign]

Add int pirq to provide the desired type instead of re-using irq.

Signed-off-by: Jason Andryuk 
---
v2:
New
---
 tools/libs/light/libxl_pci.c | 16 +++++++++-------
 1 file changed, 9 insertions(+), 7 deletions(-)

diff --git a/tools/libs/light/libxl_pci.c b/tools/libs/light/libxl_pci.c
index 6ddcdef6ad..a8460fb3ec 100644
--- a/tools/libs/light/libxl_pci.c
+++ b/tools/libs/light/libxl_pci.c
@@ -1420,8 +1420,8 @@ static void pci_add_dm_done(libxl__egc *egc,
     char *sysfs_path;
     FILE *f;
     unsigned long long start, end, flags, size;
-    int irq, i;
-    int r;
+    unsigned int irq;
+    int i, r;
     uint32_t flag = XEN_DOMCTL_DEV_RDM_RELAXED;
     uint32_t domainid = domid;
     bool isstubdom = libxl_is_stubdom(ctx, domid, &domainid);
@@ -1499,7 +1499,9 @@ static void pci_add_dm_done(libxl__egc *egc,
             goto out_no_irq;
         }
         if (fscanf(f, "%u", &irq) == 1 && irq > 0 && irq < PCI_IRQ_LINE_LIMIT) {
-            r = xc_physdev_map_pirq(ctx->xch, domid, irq, &irq);
+            int pirq = irq;
+
+            r = xc_physdev_map_pirq(ctx->xch, domid, irq, &pirq);
             if (r < 0) {
                 LOGED(ERROR, domainid, "xc_physdev_map_pirq irq=%d (error=%d)",
                     irq, r);
@@ -1507,10 +1509,10 @@ static void pci_add_dm_done(libxl__egc *egc,
                 rc = ERROR_FAIL;
                 goto out;
             }
-            r = xc_domain_irq_permission(ctx->xch, domid, irq, 1);
+            r = xc_domain_irq_permission(ctx->xch, domid, pirq, 1);
             if (r < 0) {
                 LOGED(ERROR, domainid,
-                    "xc_domain_irq_permission irq=%d (error=%d)", irq, r);
+                    "xc_domain_irq_permission irq=%d (error=%d)", pirq, r);
                 fclose(f);
                 rc = ERROR_FAIL;
                 goto out;
@@ -2182,8 +2184,8 @@ static void pci_remove_detached(libxl__egc *egc,
 {
     STATE_AO_GC(prs->aodev->ao);
     libxl_ctx *ctx = libxl__gc_owner(gc);
-    unsigned int start = 0, end = 0, flags = 0, size = 0;
-    int  irq = 0, i, stubdomid = 0;
+    unsigned int start = 0, end = 0, flags = 0, size = 0, irq = 0;
+    int i, stubdomid = 0;
     const char *sysfs_path;
     FILE *f;
     uint32_t domainid = prs->domid;
-- 
2.49.0



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Date: Fri, 18 Apr 2025 21:16:27 +0000
To: Alejandro Vallejo 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, "Daniel P. Smith" , Jan Beulich , Andrew Cooper , =?utf-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk 
Subject: Re: [PATCH v4 01/13] x86/boot: add cmdline to struct boot_domain
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On Thu, Apr 17, 2025 at 01:48:23PM +0100, Alejandro Vallejo wrote:
> From: "Daniel P. Smith" 
>=20
> Add a container for the "cooked" command line for a domain. This
> provides for the backing memory to be directly associated with the
> domain being constructed.  This is done in anticipation that the domain
> construction path may need to be invoked multiple times, thus ensuring
> each instance had a distinct memory allocation.
>=20
> Signed-off-by: Daniel P. Smith 
> Signed-off-by: Jason Andryuk 
> Signed-off-by: Alejandro Vallejo 


Reviewed-by: Denis Mukhin 

> ---
> v4:
>   * Manually nullify bd->cmdline before xfree()ing cmdline.
>   * const-ify arguments of domain_cmdline_size()
>   * Add cmdline_len to pvh_load_kernel()
> ---
>  xen/arch/x86/hvm/dom0_build.c          | 31 ++++++++--------
>  xen/arch/x86/include/asm/boot-domain.h |  1 +
>  xen/arch/x86/pv/dom0_build.c           |  4 +-
>  xen/arch/x86/setup.c                   | 51 ++++++++++++++++++++------
>  4 files changed, 57 insertions(+), 30 deletions(-)
>=20
> diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build.=
c
> index 2a094b3145..49832f921c 100644
> --- a/xen/arch/x86/hvm/dom0_build.c
> +++ b/xen/arch/x86/hvm/dom0_build.c
> @@ -653,7 +653,7 @@ static int __init pvh_load_kernel(
>      void *image_start =3D image_base + image->headroom;
>      unsigned long image_len =3D image->size;
>      unsigned long initrd_len =3D initrd ? initrd->size : 0;
> -    const char *cmdline =3D image->cmdline_pa ? __va(image->cmdline_pa) =
: NULL;
> +    unsigned long cmdline_len =3D bd->cmdline ? strlen(bd->cmdline) + 1 =
: 0;
>      const char *initrd_cmdline =3D NULL;
>      struct elf_binary elf;
>      struct elf_dom_parms parms;
> @@ -736,8 +736,7 @@ static int __init pvh_load_kernel(
>              initrd =3D NULL;
>      }
>=20
> -    if ( cmdline )
> -        extra_space +=3D elf_round_up(&elf, strlen(cmdline) + 1);
> +    extra_space +=3D elf_round_up(&elf, cmdline_len);
>=20
>      last_addr =3D find_memory(d, &elf, extra_space);
>      if ( last_addr =3D=3D INVALID_PADDR )
> @@ -778,21 +777,21 @@ static int __init pvh_load_kernel(
>      /* Free temporary buffers. */
>      free_boot_modules();
>=20
> -    if ( cmdline !=3D NULL )
> +    rc =3D hvm_copy_to_guest_phys(last_addr, bd->cmdline, cmdline_len, v=
);
> +    if ( rc )
>      {
> -        rc =3D hvm_copy_to_guest_phys(last_addr, cmdline, strlen(cmdline=
) + 1, v);
> -        if ( rc )
> -        {
> -            printk("Unable to copy guest command line\n");
> -            return rc;
> -        }
> -        start_info.cmdline_paddr =3D last_addr;
> -        /*
> -         * Round up to 32/64 bits (depending on the guest kernel bitness=
) so
> -         * the modlist/start_info is aligned.
> -         */
> -        last_addr +=3D elf_round_up(&elf, strlen(cmdline) + 1);
> +        printk("Unable to copy guest command line\n");

Side note: I think it makes sense to add domain ID to all printouts in
pvh_load_kernel(). E.g. block under elf_xen_parse() logs domain ID.

> +        return rc;
>      }
> +
> +    start_info.cmdline_paddr =3D cmdline_len ? last_addr : 0;
> +
> +    /*
> +     * Round up to 32/64 bits (depending on the guest kernel bitness) so
> +     * the modlist/start_info is aligned.
> +     */
> +    last_addr +=3D elf_round_up(&elf, cmdline_len);
> +
>      if ( initrd !=3D NULL )
>      {
>          rc =3D hvm_copy_to_guest_phys(last_addr, &mod, sizeof(mod), v);
> diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/includ=
e/asm/boot-domain.h
> index fcbedda0f0..d7c6042e25 100644
> --- a/xen/arch/x86/include/asm/boot-domain.h
> +++ b/xen/arch/x86/include/asm/boot-domain.h
> @@ -15,6 +15,7 @@ struct boot_domain {
>=20
>      struct boot_module *kernel;
>      struct boot_module *module;
> +    const char *cmdline;
>=20
>      struct domain *d;
>  };
> diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c
> index b485eea05f..e1b78d47c2 100644
> --- a/xen/arch/x86/pv/dom0_build.c
> +++ b/xen/arch/x86/pv/dom0_build.c
> @@ -972,8 +972,8 @@ static int __init dom0_construct(const struct boot_do=
main *bd)
>      }
>=20
>      memset(si->cmd_line, 0, sizeof(si->cmd_line));
> -    if ( image->cmdline_pa )
> -        strlcpy((char *)si->cmd_line, __va(image->cmdline_pa), sizeof(si=
->cmd_line));
> +    if ( bd->cmdline )
> +        strlcpy((char *)si->cmd_line, bd->cmdline, sizeof(si->cmd_line))=
;
>=20
>  #ifdef CONFIG_VIDEO
>      if ( !pv_shim && fill_console_start_info((void *)(si + 1)) )
> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
> index 3c257f0bad..4df012460d 100644
> --- a/xen/arch/x86/setup.c
> +++ b/xen/arch/x86/setup.c
> @@ -978,10 +978,30 @@ static unsigned int __init copy_bios_e820(struct e8=
20entry *map, unsigned int li
>      return n;
>  }
>=20
> -static struct domain *__init create_dom0(struct boot_info *bi)
> +static size_t __init domain_cmdline_size(const struct boot_info *bi,
> +                                         const struct boot_domain *bd)
>  {
> -    static char __initdata cmdline[MAX_GUEST_CMDLINE];
> +    size_t s =3D bi->kextra ? strlen(bi->kextra) : 0;
> +
> +    s +=3D bd->kernel->cmdline_pa ? strlen(__va(bd->kernel->cmdline_pa))=
 : 0;
>=20
> +    if ( s =3D=3D 0 )
> +        return s;
> +
> +    /*
> +     * Certain parameters from the Xen command line may be added to the =
dom0
> +     * command line. Add additional space for the possible cases along w=
ith one
> +     * extra char to hold \0.
> +     */
> +    s +=3D strlen(" noapic") + strlen(" acpi=3D") + sizeof(acpi_param) +=
 1;
> +
> +    return s;
> +}
> +
> +static struct domain *__init create_dom0(struct boot_info *bi)
> +{
> +    char *cmdline =3D NULL;
> +    size_t cmdline_size;
>      struct xen_domctl_createdomain dom0_cfg =3D {
>          .flags =3D IS_ENABLED(CONFIG_TBOOT) ? XEN_DOMCTL_CDF_s3_integrit=
y : 0,
>          .max_evtchn_port =3D -1,
> @@ -1020,20 +1040,24 @@ static struct domain *__init create_dom0(struct b=
oot_info *bi)
>      if ( alloc_dom0_vcpu0(d) =3D=3D NULL )
>          panic("Error creating %pdv0\n", d);
>=20
> -    /* Grab the DOM0 command line. */
> -    if ( bd->kernel->cmdline_pa || bi->kextra )
> +    cmdline_size =3D domain_cmdline_size(bi, bd);
> +    if ( cmdline_size )
>      {
> +        if ( !(cmdline =3D xzalloc_array(char, cmdline_size)) )
> +            panic("Error allocating cmdline buffer for %pd\n", d);
> +
>          if ( bd->kernel->cmdline_pa )
> -            safe_strcpy(cmdline,
> -                        cmdline_cook(__va(bd->kernel->cmdline_pa), bi->l=
oader));
> +            strlcpy(cmdline,
> +                    cmdline_cook(__va(bd->kernel->cmdline_pa), bi->loade=
r),
> +                    cmdline_size);
>=20
>          if ( bi->kextra )
>              /* kextra always includes exactly one leading space. */
> -            safe_strcat(cmdline, bi->kextra);
> +            strlcat(cmdline, bi->kextra, cmdline_size);
>=20
>          /* Append any extra parameters. */
>          if ( skip_ioapic_setup && !strstr(cmdline, "noapic") )
> -            safe_strcat(cmdline, " noapic");
> +            strlcat(cmdline, " noapic", cmdline_size);
>=20
>          if ( (strlen(acpi_param) =3D=3D 0) && acpi_disabled )
>          {
> @@ -1043,17 +1067,20 @@ static struct domain *__init create_dom0(struct b=
oot_info *bi)
>=20
>          if ( (strlen(acpi_param) !=3D 0) && !strstr(cmdline, "acpi=3D") =
)
>          {
> -            safe_strcat(cmdline, " acpi=3D");
> -            safe_strcat(cmdline, acpi_param);
> +            strlcat(cmdline, " acpi=3D", cmdline_size);
> +            strlcat(cmdline, acpi_param, cmdline_size);
>          }
> -
> -        bd->kernel->cmdline_pa =3D __pa(cmdline);
> +        bd->kernel->cmdline_pa =3D 0;
> +        bd->cmdline =3D cmdline;
>      }
>=20
>      bd->d =3D d;
>      if ( construct_dom0(bd) !=3D 0 )
>          panic("Could not construct domain 0\n");
>=20
> +    bd->cmdline =3D NULL;
> +    xfree(cmdline);
> +
>      return d;
>  }
>=20
> --
> 2.43.0
>=20
>=20



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Date: Fri, 18 Apr 2025 21:55:29 +0000
To: Alejandro Vallejo 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, "Daniel P. Smith" , Jan Beulich , Andrew Cooper , =?utf-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Jason Andryuk 
Subject: Re: [PATCH v4 03/13] common/hyperlaunch: introduce the domain builder
Message-ID: 
In-Reply-To: <20250417124844.11143-4-agarciav@amd.com>
References: <20250417124844.11143-1-agarciav@amd.com> <20250417124844.11143-4-agarciav@amd.com>
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On Thu, Apr 17, 2025 at 01:48:25PM +0100, Alejandro Vallejo wrote:
> From: "Daniel P. Smith" 
>=20
> Introduce the domain builder which is capable of consuming a device tree =
as the
> first boot module. If it finds a device tree as the first boot module, it=
 will
> set its type to BOOTMOD_FDT. This change only detects the boot module and
> continues to boot with slight change to the boot convention that the dom0
> kernel is no longer first boot module but is the second.
>=20
> No functional change intended.
>=20
> Signed-off-by: Daniel P. Smith 
> Signed-off-by: Jason Andryuk 
> Signed-off-by: Alejandro Vallejo 
> ---
> v4:
>   * Moved from arch/x86/ to common/
>   * gated all of domain-builder/ on CONFIG_BOOT_INFO
>   * Hide the domain builder submenu for !X86
>   * Factor out the "hyperlaunch_enabled =3D false" toggle core.c
>   * Removed stub inline, as DCE makes it unnecessary
>   * Adjusted printks.
> ---
>  xen/arch/x86/include/asm/bootinfo.h |  3 ++
>  xen/arch/x86/setup.c                | 17 +++++----
>  xen/common/Makefile                 |  1 +
>  xen/common/domain-builder/Makefile  |  2 ++
>  xen/common/domain-builder/core.c    | 56 +++++++++++++++++++++++++++++
>  xen/common/domain-builder/fdt.c     | 37 +++++++++++++++++++
>  xen/common/domain-builder/fdt.h     | 12 +++++++
>  xen/include/xen/domain-builder.h    |  9 +++++
>  8 files changed, 131 insertions(+), 6 deletions(-)
>  create mode 100644 xen/common/domain-builder/Makefile
>  create mode 100644 xen/common/domain-builder/core.c
>  create mode 100644 xen/common/domain-builder/fdt.c
>  create mode 100644 xen/common/domain-builder/fdt.h
>  create mode 100644 xen/include/xen/domain-builder.h
>=20
> diff --git a/xen/arch/x86/include/asm/bootinfo.h b/xen/arch/x86/include/a=
sm/bootinfo.h
> index 3afc214c17..82c2650fcf 100644
> --- a/xen/arch/x86/include/asm/bootinfo.h
> +++ b/xen/arch/x86/include/asm/bootinfo.h
> @@ -27,6 +27,7 @@ enum bootmod_type {
>      BOOTMOD_RAMDISK,
>      BOOTMOD_MICROCODE,
>      BOOTMOD_XSM_POLICY,
> +    BOOTMOD_FDT,
>  };
>=20
>  struct boot_module {
> @@ -80,6 +81,8 @@ struct boot_info {
>      paddr_t memmap_addr;
>      size_t memmap_length;
>=20
> +    bool hyperlaunch_enabled;
> +
>      unsigned int nr_modules;
>      struct boot_module mods[MAX_NR_BOOTMODS + 1];
>      struct boot_domain domains[MAX_NR_BOOTDOMS];
> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
> index 4df012460d..ccc57cc70a 100644
> --- a/xen/arch/x86/setup.c
> +++ b/xen/arch/x86/setup.c
> @@ -5,6 +5,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -1282,9 +1283,12 @@ void asmlinkage __init noreturn __start_xen(void)
>                 bi->nr_modules);
>      }
>=20
> -    /* Dom0 kernel is always first */
> -    bi->mods[0].type =3D BOOTMOD_KERNEL;
> -    bi->domains[0].kernel =3D &bi->mods[0];
> +    builder_init(bi);
> +
> +    /* Find first unknown boot module to use as dom0 kernel */
> +    i =3D first_boot_module_index(bi, BOOTMOD_UNKNOWN);
> +    bi->mods[i].type =3D BOOTMOD_KERNEL;
> +    bi->domains[0].kernel =3D &bi->mods[i];

Nit: perhaps add convenience aliases for bi->domains[0] (e.g. dom0) and=20
for bi->mods[0] (e.g. mod)?

>=20
>      if ( pvh_boot )
>      {
> @@ -1467,8 +1471,9 @@ void asmlinkage __init noreturn __start_xen(void)
>          xen->size  =3D __2M_rwdata_end - _stext;
>      }
>=20
> -    bi->mods[0].headroom =3D
> -        bzimage_headroom(bootstrap_map_bm(&bi->mods[0]), bi->mods[0].siz=
e);
> +    bi->domains[0].kernel->headroom =3D
> +        bzimage_headroom(bootstrap_map_bm(bi->domains[0].kernel),
> +                         bi->domains[0].kernel->size);
>      bootstrap_unmap();
>=20
>  #ifndef highmem_start
> @@ -1592,7 +1597,7 @@ void asmlinkage __init noreturn __start_xen(void)
>  #endif
>      }
>=20
> -    if ( bi->mods[0].headroom && !bi->mods[0].relocated )
> +    if ( bi->domains[0].kernel->headroom && !bi->domains[0].kernel->relo=
cated )
>          panic("Not enough memory to relocate the dom0 kernel image\n");
>      for ( i =3D 0; i < bi->nr_modules; ++i )
>      {
> diff --git a/xen/common/Makefile b/xen/common/Makefile
> index 98f0873056..565837bc71 100644
> --- a/xen/common/Makefile
> +++ b/xen/common/Makefile
> @@ -11,6 +11,7 @@ obj-$(filter-out $(CONFIG_X86),$(CONFIG_ACPI)) +=3D dev=
ice.o
>  obj-$(CONFIG_HAS_DEVICE_TREE) +=3D device-tree/
>  obj-$(CONFIG_IOREQ_SERVER) +=3D dm.o
>  obj-y +=3D domain.o
> +obj-$(CONFIG_HAS_BOOT_INFO) +=3D domain-builder/
>  obj-y +=3D event_2l.o
>  obj-y +=3D event_channel.o
>  obj-$(CONFIG_EVTCHN_FIFO) +=3D event_fifo.o
> diff --git a/xen/common/domain-builder/Makefile b/xen/common/domain-build=
er/Makefile
> new file mode 100644
> index 0000000000..b10cd56b28
> --- /dev/null
> +++ b/xen/common/domain-builder/Makefile
> @@ -0,0 +1,2 @@
> +obj-$(CONFIG_DOMAIN_BUILDER) +=3D fdt.init.o
> +obj-y +=3D core.init.o
> diff --git a/xen/common/domain-builder/core.c b/xen/common/domain-builder=
/core.c
> new file mode 100644
> index 0000000000..a5b21fc179
> --- /dev/null
> +++ b/xen/common/domain-builder/core.c
> @@ -0,0 +1,56 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Copyright (C) 2024, Apertus Solutions, LLC
> + */
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include 
> +
> +#include "fdt.h"
> +
> +void __init builder_init(struct boot_info *bi)
> +{
> +    bi->hyperlaunch_enabled =3D false;
> +
> +    if ( IS_ENABLED(CONFIG_DOMAIN_BUILDER) )

I would re-organize the code to remove one level of indentation, e.g.:

       if ( !IS_ENABLED(CONFIG_DOMAIN_BUILDER) )
            return;

       switch ( ret =3D has_hyperlaunch_fdt(bi) )
       ...

or even add #ifdef CONFIG_DOMAIN_BUILDER for builder_init() in the header f=
ile.

What do you think?

> +    {
> +        int ret;
> +
> +        switch ( ret =3D has_hyperlaunch_fdt(bi) )
> +        {
> +        case 0:
> +            printk(XENLOG_DEBUG "DT found: hyperlaunch\n");
> +            bi->hyperlaunch_enabled =3D true;
> +            bi->mods[0].type =3D BOOTMOD_FDT;
> +            break;
> +
> +        case -EINVAL:
> +            /* No DT found */
> +            break;
> +
> +        case -ENOENT:
> +        case -ENODATA:

Looks like this code accounts for the follow on change: current implementat=
ion
only returns -EINVAL or 0.

Is it possible to convert has_hyperlaunch_fdt() to a simple predicate?

> +            printk(XENLOG_DEBUG "DT found: non-hyperlaunch (%d)\n", ret)=
;
> +            bi->mods[0].type =3D BOOTMOD_FDT;
> +            break;
> +
> +        default:
> +            printk(XENLOG_ERR "unknown error (%d) checking hyperlaunch D=
T\n",
> +                   ret);
> +            break;
> +        }
> +    }
> +}
> +
> +/*
> + * Local variables:
> + * mode: C
> + * c-file-style: "BSD"
> + * c-basic-offset: 4
> + * tab-width: 4
> + * indent-tabs-mode: nil
> + * End:
> + */
> diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/=
fdt.c
> new file mode 100644
> index 0000000000..aaf8c1cc16
> --- /dev/null
> +++ b/xen/common/domain-builder/fdt.c
> @@ -0,0 +1,37 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Copyright (C) 2024, Apertus Solutions, LLC
> + */
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include 
> +#include 
> +#include 
> +
> +#include "fdt.h"
> +
> +int __init has_hyperlaunch_fdt(const struct boot_info *bi)

I think the function can return `bool` in current patch.

> +{
> +    int ret =3D 0;
> +    const void *fdt =3D bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_ID=
X]);
> +
> +    if ( !fdt || fdt_check_header(fdt) < 0 )
> +        ret =3D -EINVAL;
> +
> +    bootstrap_unmap();
> +
> +    return ret;
> +}
> +
> +/*
> + * Local variables:
> + * mode: C
> + * c-file-style: "BSD"
> + * c-basic-offset: 4
> + * tab-width: 4
> + * indent-tabs-mode: nil
> + * End:
> + */
> diff --git a/xen/common/domain-builder/fdt.h b/xen/common/domain-builder/=
fdt.h
> new file mode 100644
> index 0000000000..97a45a6ec4
> --- /dev/null
> +++ b/xen/common/domain-builder/fdt.h
> @@ -0,0 +1,12 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +#ifndef __XEN_DOMAIN_BUILDER_FDT_H__
> +#define __XEN_DOMAIN_BUILDER_FDT_H__
> +
> +struct boot_info;
> +
> +/* hyperlaunch fdt is required to be module 0 */
> +#define HYPERLAUNCH_MODULE_IDX 0
> +
> +int has_hyperlaunch_fdt(const struct boot_info *bi);
> +
> +#endif /* __XEN_DOMAIN_BUILDER_FDT_H__ */
> diff --git a/xen/include/xen/domain-builder.h b/xen/include/xen/domain-bu=
ilder.h
> new file mode 100644
> index 0000000000..ac2b84775d
> --- /dev/null
> +++ b/xen/include/xen/domain-builder.h
> @@ -0,0 +1,9 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +#ifndef __XEN_DOMAIN_BUILDER_H__
> +#define __XEN_DOMAIN_BUILDER_H__
> +
> +struct boot_info;
> +
> +void builder_init(struct boot_info *bi);
> +
> +#endif /* __XEN_DOMAIN_BUILDER_H__ */
> --
> 2.43.0
>=20
>=20



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Date: Fri, 18 Apr 2025 22:11:15 +0000
To: Alejandro Vallejo 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, "Daniel P. Smith" , Jan Beulich , Andrew Cooper , =?utf-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Jason Andryuk 
Subject: Re: [PATCH v4 04/13] x86/hyperlaunch: initial support for hyperlaunch device tree
Message-ID: 
In-Reply-To: <20250417124844.11143-5-agarciav@amd.com>
References: <20250417124844.11143-1-agarciav@amd.com> <20250417124844.11143-5-agarciav@amd.com>
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On Thu, Apr 17, 2025 at 01:48:26PM +0100, Alejandro Vallejo wrote:
> From: "Daniel P. Smith" 
>=20
> Add the ability to detect both a formal hyperlaunch device tree or a dom0=
less
> device tree. If the hyperlaunch device tree is found, then count the numb=
er of
> domain entries, reporting an error if more than one is found.
>=20
> Signed-off-by: Daniel P. Smith 
> Signed-off-by: Jason Andryuk 
> Signed-off-by: Alejandro Vallejo 
> ---
> v4:
>   * Panic if we're booting on hyperlaunch, but walking the DTB fails.
>   * Remove inconsequential "else" clause in fdt.c
>   * Remove stub, as it's not required due to DCE
>   * Use min() rather than open-code it
> ---
>  xen/arch/x86/include/asm/bootinfo.h |  1 +
>  xen/common/domain-builder/core.c    | 11 +++++
>  xen/common/domain-builder/fdt.c     | 63 +++++++++++++++++++++++++++++
>  xen/common/domain-builder/fdt.h     |  1 +
>  4 files changed, 76 insertions(+)
>=20
> diff --git a/xen/arch/x86/include/asm/bootinfo.h b/xen/arch/x86/include/a=
sm/bootinfo.h
> index 82c2650fcf..1e3d582e45 100644
> --- a/xen/arch/x86/include/asm/bootinfo.h
> +++ b/xen/arch/x86/include/asm/bootinfo.h
> @@ -84,6 +84,7 @@ struct boot_info {
>      bool hyperlaunch_enabled;
>=20
>      unsigned int nr_modules;
> +    unsigned int nr_domains;
>      struct boot_module mods[MAX_NR_BOOTMODS + 1];
>      struct boot_domain domains[MAX_NR_BOOTDOMS];
>  };
> diff --git a/xen/common/domain-builder/core.c b/xen/common/domain-builder=
/core.c
> index a5b21fc179..3b062e85ec 100644
> --- a/xen/common/domain-builder/core.c
> +++ b/xen/common/domain-builder/core.c
> @@ -43,6 +43,17 @@ void __init builder_init(struct boot_info *bi)
>              break;
>          }
>      }
> +
> +    if ( bi->hyperlaunch_enabled )
> +    {
> +        int ret;
> +
> +        printk(XENLOG_INFO "Hyperlaunch configuration:\n");
> +        if ( (ret =3D walk_hyperlaunch_fdt(bi)) < 0 )
> +            panic("Walk of device tree failed (%d)\n", ret);
> +
> +        printk(XENLOG_INFO "  number of domains: %u\n", bi->nr_domains);
> +    }
>  }
>=20
>  /*
> diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/=
fdt.c
> index aaf8c1cc16..b5ff8220da 100644
> --- a/xen/common/domain-builder/fdt.c
> +++ b/xen/common/domain-builder/fdt.c
> @@ -13,6 +13,36 @@
>=20
>  #include "fdt.h"
>=20
> +static int __init find_hyperlaunch_node(const void *fdt)
> +{
> +    int hv_node =3D fdt_path_offset(fdt, "/chosen/hypervisor");
> +
> +    if ( hv_node >=3D 0 )
> +    {
> +        /* Anything other than zero indicates no match */
> +        if ( fdt_node_check_compatible(fdt, hv_node, "hypervisor,xen") )
> +            return -ENODATA;
> +
> +        return hv_node;
> +    }
> +    else
> +    {
> +        /* Look for dom0less config */
> +        int node, chosen_node =3D fdt_path_offset(fdt, "/chosen");
> +
> +        if ( chosen_node < 0 )
> +            return -ENOENT;
> +
> +        fdt_for_each_subnode(node, fdt, chosen_node)
> +        {
> +            if ( !fdt_node_check_compatible(fdt, node, "xen,domain") )
> +                return chosen_node;
> +        }
> +    }
> +
> +    return -ENODATA;
> +}
> +
>  int __init has_hyperlaunch_fdt(const struct boot_info *bi)
>  {
>      int ret =3D 0;
> @@ -20,7 +50,40 @@ int __init has_hyperlaunch_fdt(const struct boot_info =
*bi)
>=20
>      if ( !fdt || fdt_check_header(fdt) < 0 )
>          ret =3D -EINVAL;
> +    else
> +        ret =3D find_hyperlaunch_node(fdt);
> +
> +    bootstrap_unmap();
> +
> +    return min(0, ret);
> +}
> +
> +int __init walk_hyperlaunch_fdt(struct boot_info *bi)
> +{
> +    int ret =3D 0, hv_node, node;
> +    const void *fdt =3D bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_ID=
X]);
> +
> +    if ( unlikely(!fdt) )
> +        return -EINVAL;

I think this check can be converted to ASSERT() since walk_hyperlaunch_fdt(=
)
will be called after has_hyperlaunch_fdt() where condition is checked.

> +
> +    hv_node =3D find_hyperlaunch_node(fdt);
> +    if ( hv_node < 0 )
> +    {
> +        ret =3D hv_node;
> +        goto err_out;
> +    }
> +
> +    fdt_for_each_subnode(node, fdt, hv_node)
> +    {
> +        if ( !fdt_node_check_compatible(fdt, node, "xen,domain") )
> +            bi->nr_domains++;
> +    }
> +
> +    /* Until multi-domain construction is added, throw an error */
> +    if ( bi->nr_domains !=3D 1 )
> +        printk(XENLOG_ERR "hyperlaunch only supports dom0 construction\n=
");
>=20
> + err_out:
>      bootstrap_unmap();
>=20
>      return ret;
> diff --git a/xen/common/domain-builder/fdt.h b/xen/common/domain-builder/=
fdt.h
> index 97a45a6ec4..955aead497 100644
> --- a/xen/common/domain-builder/fdt.h
> +++ b/xen/common/domain-builder/fdt.h
> @@ -8,5 +8,6 @@ struct boot_info;
>  #define HYPERLAUNCH_MODULE_IDX 0
>=20
>  int has_hyperlaunch_fdt(const struct boot_info *bi);
> +int walk_hyperlaunch_fdt(struct boot_info *bi);
>=20
>  #endif /* __XEN_DOMAIN_BUILDER_FDT_H__ */
> --
> 2.43.0
>=20
>=20



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Date: Fri, 18 Apr 2025 22:30:07 +0000
To: Alejandro Vallejo 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?utf-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Bertrand Marquis , Jason Andryuk 
Subject: Re: [PATCH v4 05/13] x86/hyperlaunch: Add helpers to locate multiboot modules
Message-ID: 
In-Reply-To: <20250417124844.11143-6-agarciav@amd.com>
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On Thu, Apr 17, 2025 at 01:48:27PM +0100, Alejandro Vallejo wrote:
> Hyperlaunch mandates either a reg or module-index DT prop on nodes that
> contain `multiboot,module" under their "compatible" prop. This patch
> introduces a helper to generically find such index, appending the module
> to the list of modules if it wasn't already (i.e: because it's given via
> the "reg" prop).
>=20
> Signed-off-by: Jason Andryuk 
> Signed-off-by: Alejandro Vallejo 
> ---
> v4:
>   * Remove stray reg prop parser in libfdt-xen.h.
>   * Remove fdt32_as_uX accessors.
>   * Brough fdt_prop_as_u32() accesor from later patches.
>     * So it can be used in place of a hardcoded fdt32_as_u32().
>   * Limited MAX_NR_BOOTMODS to INT_MAX.
>   * Preserved BOOTMOD_XEN on module append logic.
>   * Add missing bounds check to module-index parsed in multiboot module h=
elper.
>   * Converted idx variable to uint32_t for better bounds checking.
>   * Braces from switch statement to conform to coding style.
>   * Added missing XENLOG_X.
>   * Print address_cells and size_cells on error parsing reg properties.
>   * Added (transient) missing declaration for extern helper.
>     * becomes static on the next patch.
> ---
>  xen/common/domain-builder/fdt.c     | 162 ++++++++++++++++++++++++++++
>  xen/common/domain-builder/fdt.h     |   2 +
>  xen/include/xen/domain-builder.h    |   3 +
>  xen/include/xen/libfdt/libfdt-xen.h |  11 ++
>  4 files changed, 178 insertions(+)
>=20
> diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/=
fdt.c
> index b5ff8220da..d73536fed6 100644
> --- a/xen/common/domain-builder/fdt.c
> +++ b/xen/common/domain-builder/fdt.c
> @@ -13,6 +13,168 @@
>=20
>  #include "fdt.h"
>=20
> +/*
> + * Unpacks a "reg" property into its address and size constituents.
> + *
> + * @param prop          Pointer to an FDT "reg" property.
> + * @param address_cells Number of 4-octet cells that make up an "address=
".
> + * @param size_cells    Number of 4-octet cells that make up a "size".
> + * @param p_addr[out]   Address encoded in the property.
> + * @param p_size[out]   Size encoded in the property.
> + * @returns             -EINVAL on malformed property, 0 otherwise.
> + */
> +static int __init read_fdt_prop_as_reg(const struct fdt_property *prop,

I would do s/read_fdt_prop_as_reg/fdt_prop_as_reg/ similar to fdt_prop_as_u=
32()
below.

> +                                       int address_cells, int size_cells=
,
> +                                       uint64_t *p_addr, uint64_t *p_siz=
e)
> +{
> +    const fdt32_t *cell =3D (const fdt32_t *)prop->data;
> +    uint64_t addr, size;
> +
> +    if ( fdt32_to_cpu(prop->len) !=3D
> +         (address_cells + size_cells) * sizeof(*cell) )
> +    {
> +        printk(XENLOG_ERR "  cannot read reg %lu+%lu from prop len %u\n"=
,
> +            address_cells * sizeof(*cell), size_cells * sizeof(*cell),
> +            fdt32_to_cpu(prop->len));
> +        return -EINVAL;
> +    }
> +
> +    switch ( address_cells )
> +    {
> +    case 1:
> +        addr =3D fdt32_to_cpu(*cell);
> +        break;
> +    case 2:
> +        addr =3D fdt64_to_cpu(*(const fdt64_t *)cell);
> +        break;
> +    default:
> +        printk(XENLOG_ERR "  unsupported address_cells=3D%d\n", address_=
cells);
> +        return -EINVAL;
> +    }
> +
> +    cell +=3D address_cells;
> +    switch ( size_cells )
> +    {
> +    case 1:
> +        size =3D fdt32_to_cpu(*cell);
> +        break;
> +    case 2:
> +        size =3D fdt64_to_cpu(*(const fdt64_t *)cell);
> +        break;
> +    default:
> +        printk(XENLOG_ERR "  unsupported size_cells=3D%d\n", size_cells)=
;
> +        return -EINVAL;
> +    }
> +
> +    *p_addr =3D addr;
> +    *p_size =3D size;
> +
> +    return 0;
> +}
> +
> +/*
> + * Locate a multiboot module given its node offset in the FDT.
> + *
> + * The module location may be given via either FDT property:
> + *     * reg =3D 
> + *         * Mutates `bi` to append the module.
> + *     * module-index =3D 
> + *         * Leaves `bi` unchanged.
> + *
> + * @param fdt           Pointer to the full FDT.
> + * @param node          Offset for the module node.
> + * @param address_cells Number of 4-octet cells that make up an "address=
".
> + * @param size_cells    Number of 4-octet cells that make up a "size".
> + * @param bi[inout]     Xen's representation of the boot parameters.
> + * @return              -EINVAL on malformed nodes, otherwise
> + *                      index inside `bi->mods`
> + */
> +int __init fdt_read_multiboot_module(const void *fdt, int node,
> +                                     int address_cells, int size_cells,
> +                                     struct boot_info *bi)
> +{
> +    const struct fdt_property *prop;
> +    uint64_t addr, size;
> +    int ret;
> +    uint32_t idx;
> +
> +    if ( fdt_node_check_compatible(fdt, node, "multiboot,module") )
> +    {
> +        printk(XENLOG_ERR "  bad module. multiboot,module not found");
> +        return -ENODATA;
> +    }
> +
> +    /* Location given as a `module-index` property. */
> +    if ( (prop =3D fdt_get_property(fdt, node, "module-index", NULL)) )
> +    {
> +        if ( fdt_get_property(fdt, node, "reg", NULL) )
> +        {
> +            printk(XENLOG_ERR "  found both reg and module-index for mod=
ule\n");
> +            return -EINVAL;
> +        }
> +        if ( (ret =3D fdt_prop_as_u32(prop, &idx)) )
> +        {
> +            printk(XENLOG_ERR "  bad module-index prop\n");
> +            return ret;
> +        }
> +        if ( idx >=3D MAX_NR_BOOTMODS )
> +        {
> +            printk(XENLOG_ERR "  module-index overflow. %s=3D%u\n",
> +                   STR(MAX_NR_BOOTMODS), MAX_NR_BOOTMODS);
> +            return -EINVAL;
> +        }
> +
> +        return idx;
> +    }
> +
> +    /* Otherwise location given as a `reg` property. */
> +    if ( !(prop =3D fdt_get_property(fdt, node, "reg", NULL)) )
> +    {
> +        printk(XENLOG_ERR "  no location for multiboot,module\n");
> +        return -EINVAL;
> +    }
> +    if ( fdt_get_property(fdt, node, "module-index", NULL) )
> +    {
> +        printk(XENLOG_ERR "  found both reg and module-index for module\=
n");
> +        return -EINVAL;
> +    }
> +
> +    ret =3D read_fdt_prop_as_reg(prop, address_cells, size_cells, &addr,=
 &size);
> +    if ( ret < 0 )
> +    {
> +        printk(XENLOG_ERR "  failed reading reg for multiboot,module\n")=
;
> +        return -EINVAL;
> +    }
> +
> +    idx =3D bi->nr_modules;
> +    if ( idx > MAX_NR_BOOTMODS )
> +    {
> +        /*
> +         * MAX_NR_BOOTMODS must fit in 31 bits so it's representable in =
the
> +         * positive side of an int; for the return value.
> +         */
> +        BUILD_BUG_ON(MAX_NR_BOOTMODS > (uint64_t)INT_MAX);
> +        printk(XENLOG_ERR "  idx=3D%u exceeds len=3D%u\n", idx, MAX_NR_B=
OOTMODS);
> +        return -EINVAL;
> +    }
> +
> +    /*
> +     * Append new module to the existing list
> +     *
> +     * Note that bi->nr_modules points to Xen itself, so we must shift i=
t first
> +     */
> +    bi->nr_modules++;
> +    bi->mods[bi->nr_modules] =3D bi->mods[idx];
> +    bi->mods[idx] =3D (struct boot_module){
> +        .start =3D addr,
> +        .size =3D size,
> +    };
> +
> +    printk(XENLOG_INFO "  module[%u]: addr %lx size %lx\n", idx, addr, s=
ize);
> +
> +    return idx;
> +}
> +
>  static int __init find_hyperlaunch_node(const void *fdt)
>  {
>      int hv_node =3D fdt_path_offset(fdt, "/chosen/hypervisor");
> diff --git a/xen/common/domain-builder/fdt.h b/xen/common/domain-builder/=
fdt.h
> index 955aead497..8c98a256eb 100644
> --- a/xen/common/domain-builder/fdt.h
> +++ b/xen/common/domain-builder/fdt.h
> @@ -2,6 +2,8 @@
>  #ifndef __XEN_DOMAIN_BUILDER_FDT_H__
>  #define __XEN_DOMAIN_BUILDER_FDT_H__
>=20
> +#include 
> +
>  struct boot_info;
>=20
>  /* hyperlaunch fdt is required to be module 0 */
> diff --git a/xen/include/xen/domain-builder.h b/xen/include/xen/domain-bu=
ilder.h
> index ac2b84775d..ace6b6875b 100644
> --- a/xen/include/xen/domain-builder.h
> +++ b/xen/include/xen/domain-builder.h
> @@ -5,5 +5,8 @@
>  struct boot_info;
>=20
>  void builder_init(struct boot_info *bi);
> +int fdt_read_multiboot_module(const void *fdt, int node,
> +                              int address_cells, int size_cells,
> +                              struct boot_info *bi)
>=20
>  #endif /* __XEN_DOMAIN_BUILDER_H__ */
> diff --git a/xen/include/xen/libfdt/libfdt-xen.h b/xen/include/xen/libfdt=
/libfdt-xen.h
> index a5340bc9f4..deafb25d98 100644
> --- a/xen/include/xen/libfdt/libfdt-xen.h
> +++ b/xen/include/xen/libfdt/libfdt-xen.h
> @@ -12,6 +12,17 @@
>  #define LIBFDT_XEN_H
>=20
>  #include 
> +#include 
> +
> +static inline int __init fdt_prop_as_u32(
> +    const struct fdt_property *prop, uint32_t *val)
> +{
> +    if ( !prop || fdt32_to_cpu(prop->len) < sizeof(u32) )
> +        return -EINVAL;
> +
> +    *val =3D fdt32_to_cpu(*(const fdt32_t *)prop->data);
> +    return 0;
> +}

My understanding is domain builder establishes its own shims around libfdt =
so
libfdt is kept unmodified and it is easier to pick up libfdt updates.

So, IMO, this function should reside in xen/common/domain-builder/fdt.c

Thoughts?

>=20
>  static inline int fdt_get_mem_rsv_paddr(const void *fdt, int n,
>                                          paddr_t *address,
> --
> 2.43.0
>=20
>=20



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Date: Fri, 18 Apr 2025 22:39:23 +0000
To: Alejandro Vallejo 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, "Daniel P. Smith" , Jan Beulich , Andrew Cooper , =?utf-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Jason Andryuk 
Subject: Re: [PATCH v4 06/13] x86/hyperlaunch: locate dom0 kernel with hyperlaunch
Message-ID: 
In-Reply-To: <20250417124844.11143-7-agarciav@amd.com>
References: <20250417124844.11143-1-agarciav@amd.com> <20250417124844.11143-7-agarciav@amd.com>
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On Thu, Apr 17, 2025 at 01:48:28PM +0100, Alejandro Vallejo wrote:
> From: "Daniel P. Smith" 
>=20
> Look for a subnode of type `multiboot,kernel` within a domain node. If
> found, locate it using the multiboot module helper to generically ensure
> it lives in the module list. If the bootargs property is present and
> there was not an MB1 string, then use the command line from the device
> tree definition.
>=20
> Signed-off-by: Daniel P. Smith 
> Signed-off-by: Jason Andryuk 
> Signed-off-by: Alejandro Vallejo 
> ---
> v4:
>   * Stop printing on the fallback path of builder_init().
>     It's in fact the most common path and just adds noise.
>   * Add missing XENLOG_X.
>   * Simplified check to log error on nr_domains !=3D 1.
>   * s/XENLOG_ERR/XENLOG_WARNING/ on duplicate kernel.
>   * Turned foo =3D=3D 0 into !foo in the "multiboot,kernel" check
> ---
>  xen/arch/x86/setup.c             |  5 ---
>  xen/common/domain-builder/core.c |  9 +++++
>  xen/common/domain-builder/fdt.c  | 64 ++++++++++++++++++++++++++++++--
>  xen/include/xen/domain-builder.h |  3 --
>  4 files changed, 70 insertions(+), 11 deletions(-)
>=20
> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
> index ccc57cc70a..4f669f3c60 100644
> --- a/xen/arch/x86/setup.c
> +++ b/xen/arch/x86/setup.c
> @@ -1285,11 +1285,6 @@ void asmlinkage __init noreturn __start_xen(void)
>=20
>      builder_init(bi);
>=20
> -    /* Find first unknown boot module to use as dom0 kernel */
> -    i =3D first_boot_module_index(bi, BOOTMOD_UNKNOWN);
> -    bi->mods[i].type =3D BOOTMOD_KERNEL;
> -    bi->domains[0].kernel =3D &bi->mods[i];
> -
>      if ( pvh_boot )
>      {
>          /* pvh_init() already filled in e820_raw */
> diff --git a/xen/common/domain-builder/core.c b/xen/common/domain-builder=
/core.c
> index 3b062e85ec..924cb495a3 100644
> --- a/xen/common/domain-builder/core.c
> +++ b/xen/common/domain-builder/core.c
> @@ -54,6 +54,15 @@ void __init builder_init(struct boot_info *bi)
>=20
>          printk(XENLOG_INFO "  number of domains: %u\n", bi->nr_domains);
>      }
> +    else
> +    {
> +        /* Find first unknown boot module to use as dom0 kernel */
> +        unsigned int i =3D first_boot_module_index(bi, BOOTMOD_UNKNOWN);
> +
> +        bi->mods[i].type =3D BOOTMOD_KERNEL;
> +        bi->domains[0].kernel =3D &bi->mods[i];
> +        bi->nr_domains =3D 1;
> +    }
>  }
>=20
>  /*
> diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/=
fdt.c
> index d73536fed6..1fae6add3b 100644
> --- a/xen/common/domain-builder/fdt.c
> +++ b/xen/common/domain-builder/fdt.c
> @@ -89,9 +89,9 @@ static int __init read_fdt_prop_as_reg(const struct fdt=
_property *prop,
>   * @return              -EINVAL on malformed nodes, otherwise
>   *                      index inside `bi->mods`
>   */
> -int __init fdt_read_multiboot_module(const void *fdt, int node,
> -                                     int address_cells, int size_cells,
> -                                     struct boot_info *bi)
> +static int __init fdt_read_multiboot_module(const void *fdt, int node,
> +                                            int address_cells, int size_=
cells,
> +                                            struct boot_info *bi)
>  {
>      const struct fdt_property *prop;
>      uint64_t addr, size;
> @@ -175,6 +175,52 @@ int __init fdt_read_multiboot_module(const void *fdt=
, int node,
>      return idx;
>  }
>=20
> +static int __init process_domain_node(
> +    struct boot_info *bi, const void *fdt, int dom_node)
> +{
> +    int node;
> +    struct boot_domain *bd =3D &bi->domains[bi->nr_domains];
> +    const char *name =3D fdt_get_name(fdt, dom_node, NULL) ?: "unknown";
> +    int address_cells =3D fdt_address_cells(fdt, dom_node);
> +    int size_cells =3D fdt_size_cells(fdt, dom_node);
> +
> +    fdt_for_each_subnode(node, fdt, dom_node)
> +    {
> +        if ( !fdt_node_check_compatible(fdt, node, "multiboot,kernel") )

Suggest to restructure the code to reduce levels of indentation, e.g.:

           int idx;

           if ( fdt_node_check_compatible(fdt, node, "multiboot,kernel") )
               continue;

           if ( bd->kernel )
              ...


> +        {
> +            int idx;
> +
> +            if ( bd->kernel )
> +            {
> +                printk(XENLOG_WARNING
> +                       "  duplicate kernel for domain %s\n", name);
> +                continue;
> +            }
> +
> +            idx =3D fdt_read_multiboot_module(fdt, node, address_cells,
> +                                            size_cells, bi);
> +            if ( idx < 0 )
> +            {
> +                printk(XENLOG_ERR
> +                       "  failed processing kernel for domain %s\n", nam=
e);
> +                return idx;
> +            }
> +
> +            printk(XENLOG_INFO "  kernel: multiboot-index=3D%d\n", idx);
> +            bi->mods[idx].type =3D BOOTMOD_KERNEL;
> +            bd->kernel =3D &bi->mods[idx];
> +        }
> +    }
> +
> +    if ( !bd->kernel )
> +    {
> +        printk(XENLOG_ERR "error: no kernel assigned to domain\n");

Add domain name printout similar to above logging?

> +        return -ENODATA;
> +    }
> +
> +    return 0;
> +}
> +
>  static int __init find_hyperlaunch_node(const void *fdt)
>  {
>      int hv_node =3D fdt_path_offset(fdt, "/chosen/hypervisor");
> @@ -237,8 +283,20 @@ int __init walk_hyperlaunch_fdt(struct boot_info *bi=
)
>=20
>      fdt_for_each_subnode(node, fdt, hv_node)
>      {
> +        if ( bi->nr_domains >=3D MAX_NR_BOOTDOMS )
> +        {
> +            printk(XENLOG_WARNING "warning: only creating first %u domai=
ns\n",
> +                   MAX_NR_BOOTDOMS);
> +            break;
> +        }
> +
>          if ( !fdt_node_check_compatible(fdt, node, "xen,domain") )
> +        {
> +            if ( (ret =3D process_domain_node(bi, fdt, node)) < 0 )
> +                break;
> +
>              bi->nr_domains++;
> +        }
>      }
>=20
>      /* Until multi-domain construction is added, throw an error */
> diff --git a/xen/include/xen/domain-builder.h b/xen/include/xen/domain-bu=
ilder.h
> index ace6b6875b..ac2b84775d 100644
> --- a/xen/include/xen/domain-builder.h
> +++ b/xen/include/xen/domain-builder.h
> @@ -5,8 +5,5 @@
>  struct boot_info;
>=20
>  void builder_init(struct boot_info *bi);
> -int fdt_read_multiboot_module(const void *fdt, int node,
> -                              int address_cells, int size_cells,
> -                              struct boot_info *bi)
>=20
>  #endif /* __XEN_DOMAIN_BUILDER_H__ */
> --
> 2.43.0
>=20
>=20



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Message-ID: <43ce15d8-bf94-4b3c-9c2e-d1121476056f@xen.org>
Date: Sat, 19 Apr 2025 07:50:57 +0900
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH] xenstored: Remove setjmp.h
Content-Language: en-GB
To: Jason Andryuk , xen-devel@lists.xenproject.org
Cc: Juergen Gross ,
 Anthony PERARD 
References: <20250418205933.542150-1-jason.andryuk@amd.com>
From: Julien Grall 
In-Reply-To: <20250418205933.542150-1-jason.andryuk@amd.com>
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Hi Jason,

On 19/04/2025 05:59, Jason Andryuk wrote:
> Use of setjmp/longjmp as removed in 2006, but the include remained.
> Remove it now.
> 
> Fixes: 1bac3b49cd ("Import the current version of talloc...")

The subject truncation is ok however for the commit ID, we are expecting 
12 characters (see docs/process/sending-patches.pandoc).


> Signed-off-by: Jason Andryuk 

With the remark above addressed (can be fixed on commit):

Reviewed-by: Julien Grall 

> ---
> I truncated the Fixes above.  The full line is:
> Fixes: 1bac3b49cd ("Import the current version of talloc from the Samba 3 source base.  This gives us greater confidence that our talloc implementation is "known good".  Remove the OOM handling from consider_message: talloc_set_fail_handler is no longer supported.")
 > --->   tools/xenstored/core.c | 1 -
>   1 file changed, 1 deletion(-)
> 
> diff --git a/tools/xenstored/core.c b/tools/xenstored/core.c
> index 91b2530e5c..835402af81 100644
> --- a/tools/xenstored/core.c
> +++ b/tools/xenstored/core.c
> @@ -35,7 +35,6 @@
>   #include 
>   #include 
>   #include 
> -#include 
>   
>   #include 
>   #include 

Cheers,

-- 
Julien Grall



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Date: Fri, 18 Apr 2025 22:53:54 +0000
To: Alejandro Vallejo 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, "Daniel P. Smith" , Jan Beulich , Andrew Cooper , =?utf-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Bertrand Marquis , Jason Andryuk 
Subject: Re: [PATCH v4 07/13] x86/hyperlaunch: obtain cmdline from device tree
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On Thu, Apr 17, 2025 at 01:48:29PM +0100, Alejandro Vallejo wrote:
> From: "Daniel P. Smith" 
>=20
> Add support to read the command line from the hyperlauunch device tree.
> The device tree command line is located in the "bootargs" property of the
> "multiboot,kernel" node.
>=20
> A boot loader command line, e.g. a grub module string field, takes
> precendence ove the device tree one since it is easier to modify.

              ^^ over

Also, I would explain the command line parsing rules in the code commentary=
 for
domain_cmdline_size() below.

>=20
> Signed-off-by: Daniel P. Smith 
> Signed-off-by: Jason Andryuk 
> Signed-off-by: Alejandro Vallejo 
> ---
> v4:
>   * Removed __init from header declarations.
>   * Removed ifdef guards, as DCE ensures the missing definitions don't
>     matter.
>   * Removed ifdef guards from new helpers in domain-builder/fdt.c
>     * Rely on DCE instead.
>   * Restored checks for cmdline_pa being zero.
>   * swapped offset and poffset varnames in libfdt-xen.h helper.
>   * swapped name and pname varnames in libfdt-xen.h helper.
>   * Turned foo =3D=3D 0  into !foo in libfdt-xen.h helper.
> ---
>  xen/arch/x86/include/asm/bootinfo.h |  6 ++++--
>  xen/arch/x86/setup.c                | 10 +++++++--
>  xen/common/domain-builder/core.c    | 32 +++++++++++++++++++++++++++++
>  xen/common/domain-builder/fdt.c     |  6 ++++++
>  xen/common/domain-builder/fdt.h     | 24 ++++++++++++++++++++++
>  xen/include/xen/domain-builder.h    |  4 ++++
>  xen/include/xen/libfdt/libfdt-xen.h | 23 +++++++++++++++++++++
>  7 files changed, 101 insertions(+), 4 deletions(-)
>=20
> diff --git a/xen/arch/x86/include/asm/bootinfo.h b/xen/arch/x86/include/a=
sm/bootinfo.h
> index 1e3d582e45..5b2c93b1ef 100644
> --- a/xen/arch/x86/include/asm/bootinfo.h
> +++ b/xen/arch/x86/include/asm/bootinfo.h
> @@ -35,11 +35,13 @@ struct boot_module {
>=20
>      /*
>       * Module State Flags:
> -     *   relocated: indicates module has been relocated in memory.
> -     *   released:  indicates module's pages have been freed.
> +     *   relocated:   indicates module has been relocated in memory.
> +     *   released:    indicates module's pages have been freed.
> +     *   fdt_cmdline: indicates module's cmdline is in the FDT.
>       */
>      bool relocated:1;
>      bool released:1;
> +    bool fdt_cmdline:1;
>=20
>      /*
>       * A boot module may need decompressing by Xen.  Headroom is an esti=
mate of
> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
> index 4f669f3c60..4cae13163b 100644
> --- a/xen/arch/x86/setup.c
> +++ b/xen/arch/x86/setup.c
> @@ -984,7 +984,10 @@ static size_t __init domain_cmdline_size(const struc=
t boot_info *bi,
>  {
>      size_t s =3D bi->kextra ? strlen(bi->kextra) : 0;
>=20
> -    s +=3D bd->kernel->cmdline_pa ? strlen(__va(bd->kernel->cmdline_pa))=
 : 0;
> +    if ( bd->kernel->fdt_cmdline )
> +        s +=3D builder_get_cmdline_size(bi, bd->kernel->cmdline_pa);
> +    else if ( bd->kernel->cmdline_pa )
> +        s +=3D strlen(__va(bd->kernel->cmdline_pa));
>=20
>      if ( s =3D=3D 0 )
>          return s;
> @@ -1047,7 +1050,10 @@ static struct domain *__init create_dom0(struct bo=
ot_info *bi)
>          if ( !(cmdline =3D xzalloc_array(char, cmdline_size)) )
>              panic("Error allocating cmdline buffer for %pd\n", d);
>=20
> -        if ( bd->kernel->cmdline_pa )
> +        if ( bd->kernel->fdt_cmdline )
> +            builder_get_cmdline(
> +                bi, bd->kernel->cmdline_pa, cmdline, cmdline_size);
> +        else if ( bd->kernel->cmdline_pa )
>              strlcpy(cmdline,
>                      cmdline_cook(__va(bd->kernel->cmdline_pa), bi->loade=
r),
>                      cmdline_size);
> diff --git a/xen/common/domain-builder/core.c b/xen/common/domain-builder=
/core.c
> index 924cb495a3..4b4230f2ff 100644
> --- a/xen/common/domain-builder/core.c
> +++ b/xen/common/domain-builder/core.c
> @@ -8,9 +8,41 @@
>  #include 
>=20
>  #include 
> +#include 
>=20
>  #include "fdt.h"
>=20
> +size_t __init builder_get_cmdline_size(struct boot_info *bi, int offset)
> +{
> +    const void *fdt;
> +    int size;
> +
> +    if ( !IS_ENABLED(CONFIG_DOMAIN_BUILDER) )
> +        return 0;
> +
> +    fdt =3D bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_IDX]);
> +    size =3D fdt_cmdline_prop_size(fdt, offset);
> +    bootstrap_unmap();
> +
> +    return max(0, size);
> +}
> +
> +int __init builder_get_cmdline(
> +    struct boot_info *bi, int offset, char *cmdline, size_t size)
> +{
> +    const void *fdt;
> +    int ret;
> +
> +    if ( !IS_ENABLED(CONFIG_DOMAIN_BUILDER) )
> +        return 0;
> +
> +    fdt =3D bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_IDX]);
> +    ret =3D fdt_cmdline_prop_copy(fdt, offset, cmdline, size);
> +    bootstrap_unmap();
> +
> +    return ret;
> +}
> +
>  void __init builder_init(struct boot_info *bi)
>  {
>      bi->hyperlaunch_enabled =3D false;
> diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/=
fdt.c
> index 1fae6add3b..50fde2d007 100644
> --- a/xen/common/domain-builder/fdt.c
> +++ b/xen/common/domain-builder/fdt.c
> @@ -209,6 +209,12 @@ static int __init process_domain_node(
>              printk(XENLOG_INFO "  kernel: multiboot-index=3D%d\n", idx);
>              bi->mods[idx].type =3D BOOTMOD_KERNEL;
>              bd->kernel =3D &bi->mods[idx];
> +
> +            /* If bootloader didn't set cmdline, see if FDT provides one=
. */
> +            if ( bd->kernel->cmdline_pa &&
> +                 !((char *)__va(bd->kernel->cmdline_pa))[0] )
> +                bd->kernel->fdt_cmdline =3D fdt_get_prop_offset(
> +                    fdt, node, "bootargs", &bd->kernel->cmdline_pa);
>          }
>      }
>=20
> diff --git a/xen/common/domain-builder/fdt.h b/xen/common/domain-builder/=
fdt.h
> index 8c98a256eb..d2ae7d5c36 100644
> --- a/xen/common/domain-builder/fdt.h
> +++ b/xen/common/domain-builder/fdt.h
> @@ -9,6 +9,30 @@ struct boot_info;
>  /* hyperlaunch fdt is required to be module 0 */
>  #define HYPERLAUNCH_MODULE_IDX 0
>=20
> +static inline int __init fdt_cmdline_prop_size(const void *fdt, int offs=
et)
> +{
> +    int ret;
> +
> +    fdt_get_property_by_offset(fdt, offset, &ret);

Perhaps something like

       (void)fdt_get_property_by_offset...

since there's no need to check the return value?

> +
> +    return ret;
> +}
> +
> +static inline int __init fdt_cmdline_prop_copy(
> +    const void *fdt, int offset, char *cmdline, size_t size)
> +{
> +    int ret;
> +    const struct fdt_property *prop =3D
> +        fdt_get_property_by_offset(fdt, offset, &ret);
> +
> +    if ( ret < 0 )
> +        return ret;
> +
> +    ASSERT(size > ret);
> +
> +    return strlcpy(cmdline, prop->data, ret);
> +}
> +
>  int has_hyperlaunch_fdt(const struct boot_info *bi);
>  int walk_hyperlaunch_fdt(struct boot_info *bi);
>=20
> diff --git a/xen/include/xen/domain-builder.h b/xen/include/xen/domain-bu=
ilder.h
> index ac2b84775d..ac0fd8f60b 100644
> --- a/xen/include/xen/domain-builder.h
> +++ b/xen/include/xen/domain-builder.h
> @@ -4,6 +4,10 @@
>=20
>  struct boot_info;
>=20
> +size_t builder_get_cmdline_size(const struct boot_info *bi, int offset);
> +int builder_get_cmdline(const struct boot_info *bi, int offset,
> +                               char *cmdline, size_t size);
> +
>  void builder_init(struct boot_info *bi);
>=20
>  #endif /* __XEN_DOMAIN_BUILDER_H__ */
> diff --git a/xen/include/xen/libfdt/libfdt-xen.h b/xen/include/xen/libfdt=
/libfdt-xen.h
> index deafb25d98..afc76e7750 100644
> --- a/xen/include/xen/libfdt/libfdt-xen.h
> +++ b/xen/include/xen/libfdt/libfdt-xen.h
> @@ -24,6 +24,29 @@ static inline int __init fdt_prop_as_u32(
>      return 0;
>  }
>=20
> +static inline bool __init fdt_get_prop_offset(
> +    const void *fdt, int node, const char *pname, unsigned long *poffset=
)
> +{
> +    int ret, offset;
> +    const char *name;
> +
> +    fdt_for_each_property_offset(offset, fdt, node)
> +    {
> +        fdt_getprop_by_offset(fdt, offset, &name, &ret);

Add

           (void)fdt_get_property_by_offset...

here as well?

> +
> +        if ( ret < 0 )
> +            continue;
> +
> +        if ( !strcmp(name, pname) )
> +        {
> +            *poffset =3D offset;
> +            return true;
> +        }
> +    }
> +
> +    return false;
> +}
> +
>  static inline int fdt_get_mem_rsv_paddr(const void *fdt, int n,
>                                          paddr_t *address,
>                                          paddr_t *size)
> --
> 2.43.0
>=20
>=20



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Date: Fri, 18 Apr 2025 22:58:36 +0000
To: Alejandro Vallejo 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, "Daniel P. Smith" , Jan Beulich , Andrew Cooper , =?utf-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Jason Andryuk 
Subject: Re: [PATCH v4 08/13] x86/hyperlaunch: locate dom0 initrd with hyperlaunch
Message-ID: 
In-Reply-To: <20250417124844.11143-9-agarciav@amd.com>
References: <20250417124844.11143-1-agarciav@amd.com> <20250417124844.11143-9-agarciav@amd.com>
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On Thu, Apr 17, 2025 at 01:48:30PM +0100, Alejandro Vallejo wrote:
> From: "Daniel P. Smith" 
>=20
> Look for a subnode of type `multiboot,ramdisk` within a domain node and
> parse via the fdt_read_multiboot_module() helper. After a successful
> helper call, the module index is returned and the module is guaranteed
> to be in the module list.
>=20
> Fix unused typo in adjacent comment.
>=20
> Signed-off-by: Daniel P. Smith 
> Signed-off-by: Jason Andryuk 
> Signed-off-by: Alejandro Vallejo 
> ---
> v4:
>   * s/XENLOG_ERR/XENLOG_WARNING/ on duplicate ramdisk.
>   * Removed stray ")" in printk
>   * s/else if/if/ (because of continue)
>   * Removed trailing continue
> ---
>  xen/arch/x86/setup.c            |  4 ++--
>  xen/common/domain-builder/fdt.c | 25 +++++++++++++++++++++++++
>  2 files changed, 27 insertions(+), 2 deletions(-)
>=20
> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
> index 4cae13163b..76ceb5221f 100644
> --- a/xen/arch/x86/setup.c
> +++ b/xen/arch/x86/setup.c
> @@ -2150,11 +2150,11 @@ void asmlinkage __init noreturn __start_xen(void)
>       * At this point all capabilities that consume boot modules should h=
ave
>       * claimed their boot modules. Find the first unclaimed boot module =
and
>       * claim it as the initrd ramdisk. Do a second search to see if ther=
e are
> -     * any remaining unclaimed boot modules, and report them as unusued =
initrd
> +     * any remaining unclaimed boot modules, and report them as unused i=
nitrd
>       * candidates.
>       */
>      initrdidx =3D first_boot_module_index(bi, BOOTMOD_UNKNOWN);
> -    if ( initrdidx < MAX_NR_BOOTMODS )
> +    if ( !bi->hyperlaunch_enabled && initrdidx < MAX_NR_BOOTMODS )
>      {
>          bi->mods[initrdidx].type =3D BOOTMOD_RAMDISK;
>          bi->domains[0].module =3D &bi->mods[initrdidx];
> diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/=
fdt.c
> index 50fde2d007..c0f526a4ce 100644
> --- a/xen/common/domain-builder/fdt.c
> +++ b/xen/common/domain-builder/fdt.c
> @@ -216,6 +216,31 @@ static int __init process_domain_node(
>                  bd->kernel->fdt_cmdline =3D fdt_get_prop_offset(
>                      fdt, node, "bootargs", &bd->kernel->cmdline_pa);
>          }
> +        else if ( !fdt_node_check_compatible(fdt, node, "multiboot,ramdi=
sk") )
> +        {
> +            int idx;
> +
> +            if ( bd->module )
> +            {
> +                printk(XENLOG_WARNING
> +                       "Duplicate module for domain %s\n", name);
> +                continue;
> +            }
> +
> +            idx =3D fdt_read_multiboot_module(fdt, node, address_cells,
> +                                            size_cells, bi);
> +            if ( idx < 0 )
> +            {
> +                printk(XENLOG_ERR
> +                       "  failed processing module for domain %s\n",
> +                       name);
> +                return -EINVAL;

Propagate fdt_read_multiboot_module()'s error to the caller, i.e.:

                   return idx;

?

> +            }
> +
> +            printk(XENLOG_INFO "  module: multiboot-index=3D%d\n", idx);
> +            bi->mods[idx].type =3D BOOTMOD_RAMDISK;
> +            bd->module =3D &bi->mods[idx];
> +        }
>      }
>=20
>      if ( !bd->kernel )
> --
> 2.43.0
>=20
>=20



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Date: Fri, 18 Apr 2025 23:08:28 +0000
To: Alejandro Vallejo 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, "Daniel P. Smith" , Jan Beulich , Andrew Cooper , =?utf-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini 
Subject: Re: [PATCH v4 09/13] x86/hyperlaunch: add domain id parsing to domain config
Message-ID: 
In-Reply-To: <20250417124844.11143-10-agarciav@amd.com>
References: <20250417124844.11143-1-agarciav@amd.com> <20250417124844.11143-10-agarciav@amd.com>
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On Thu, Apr 17, 2025 at 01:48:31PM +0100, Alejandro Vallejo wrote:
> From: "Daniel P. Smith" 
>=20
> Introduce the ability to specify the desired domain id for the domain
> definition. The domain id will be populated in the domid property of the
> domain node in the device tree configuration.
>=20
> Signed-off-by: Daniel P. Smith 
> Signed-off-by: Alejandro Vallejo 
> ---
> v4:
>   * Add missing newline
>   * Adjusted printks
>   * Checked domid node against list of outstanding domids.
> ---
>  xen/arch/x86/setup.c            |  5 ++--
>  xen/common/domain-builder/fdt.c | 51 ++++++++++++++++++++++++++++++++-
>  2 files changed, 53 insertions(+), 3 deletions(-)
>=20
> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
> index 76ceb5221f..04ad2d0937 100644
> --- a/xen/arch/x86/setup.c
> +++ b/xen/arch/x86/setup.c
> @@ -1033,8 +1033,9 @@ static struct domain *__init create_dom0(struct boo=
t_info *bi)
>      if ( iommu_enabled )
>          dom0_cfg.flags |=3D XEN_DOMCTL_CDF_iommu;
>=20
> -    /* Create initial domain.  Not d0 for pvshim. */
> -    bd->domid =3D get_initial_domain_id();
> +    if ( bd->domid =3D=3D DOMID_INVALID )
> +        /* Create initial domain.  Not d0 for pvshim. */
> +        bd->domid =3D get_initial_domain_id();
>      d =3D domain_create(bd->domid, &dom0_cfg, pv_shim ? 0 : CDF_privileg=
ed);
>      if ( IS_ERR(d) )
>          panic("Error creating d%u: %ld\n", bd->domid, PTR_ERR(d));
> diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/=
fdt.c
> index c0f526a4ce..0d3c713041 100644
> --- a/xen/common/domain-builder/fdt.c
> +++ b/xen/common/domain-builder/fdt.c
> @@ -2,6 +2,7 @@
>  /*
>   * Copyright (C) 2024, Apertus Solutions, LLC
>   */
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -178,12 +179,54 @@ static int __init fdt_read_multiboot_module(const v=
oid *fdt, int node,
>  static int __init process_domain_node(
>      struct boot_info *bi, const void *fdt, int dom_node)
>  {
> -    int node;
> +    int node, property;
>      struct boot_domain *bd =3D &bi->domains[bi->nr_domains];
>      const char *name =3D fdt_get_name(fdt, dom_node, NULL) ?: "unknown";
>      int address_cells =3D fdt_address_cells(fdt, dom_node);
>      int size_cells =3D fdt_size_cells(fdt, dom_node);
>=20
> +    fdt_for_each_property_offset(property, fdt, dom_node)
> +    {
> +        const struct fdt_property *prop;
> +        const char *prop_name;
> +        int name_len, rc;
> +
> +        prop =3D fdt_get_property_by_offset(fdt, property, NULL);
> +        if ( !prop )
> +            continue; /* silently skip */
> +
> +        prop_name =3D fdt_get_string(fdt, fdt32_to_cpu(prop->nameoff), &=
name_len);
> +
> +        if ( !strncmp(prop_name, "domid", name_len) )
> +        {
> +            uint32_t val =3D DOMID_INVALID;
> +
> +            if ( (rc =3D fdt_prop_as_u32(prop, &val)) )
> +            {
> +                printk(XENLOG_ERR
> +                       "  failed processing domain id for domain %s\n", =
name);
> +                return rc;
> +            }
> +            if ( val >=3D DOMID_FIRST_RESERVED )
> +            {
> +                printk(XENLOG_ERR "  invalid domain id for domain %s\n",=
 name);
> +                return -EINVAL;
> +            }
> +
> +            for ( unsigned int i =3D 0; i < bi->nr_domains; i++ )
> +            {
> +                if ( bi->domains[i].domid =3D=3D val )
> +                {
> +                    printk(XENLOG_ERR "  duplicate id for domain %s\n", =
name);
> +                    return -EINVAL;
> +                }
> +            }
> +
> +            bd->domid =3D val;
> +            printk(XENLOG_INFO "  domid: %d\n", bd->domid);
> +        }
> +    }
> +
>      fdt_for_each_subnode(node, fdt, dom_node)
>      {
>          if ( !fdt_node_check_compatible(fdt, node, "multiboot,kernel") )
> @@ -249,6 +292,12 @@ static int __init process_domain_node(
>          return -ENODATA;
>      }
>=20
> +    if ( bd->domid =3D=3D DOMID_INVALID )
> +        bd->domid =3D get_initial_domain_id();
> +    else if ( bd->domid !=3D get_initial_domain_id() )
> +        printk(XENLOG_WARNING
> +               "Warning: Unsuported boot with missing initial domid\n");

s/Unsuported/Unsupported/

Also, add bd->domid to the printout?

> +
>      return 0;
>  }
>=20
> --
> 2.43.0
>=20
>=20



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Date: Fri, 18 Apr 2025 23:10:05 +0000
To: Alejandro Vallejo 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, "Daniel P. Smith" , Jan Beulich , Andrew Cooper , =?utf-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Jason Andryuk 
Subject: Re: [PATCH v4 10/13] x86/hyperlaunch: specify dom0 mode with device tree
Message-ID: 
In-Reply-To: <20250417124844.11143-11-agarciav@amd.com>
References: <20250417124844.11143-1-agarciav@amd.com> <20250417124844.11143-11-agarciav@amd.com>
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On Thu, Apr 17, 2025 at 01:48:32PM +0100, Alejandro Vallejo wrote:
> From: "Daniel P. Smith" 
>=20
> Enable selecting the mode in which the domain will be built and ran. This
> includes:
>=20
>   - whether it will be either a 32/64 bit domain
>   - if it will be run as a PV or HVM domain
>   - and if it will require a device model (not applicable for dom0)
>=20
> In the device tree, this will be represented as a bit map that will be ca=
rried
> through into struct boot_domain.
>=20
> Signed-off-by: Daniel P. Smith 
> Reviewed-by: Jason Andryuk 
> Signed-off-by: Alejandro Vallejo 

Reviewed-by: Denis Mukhin 

> ---
> v4:
>   * printk adjustments
>   * reject nodes with conflicting mode settings
> ---
>  xen/arch/x86/include/asm/boot-domain.h |  5 +++++
>  xen/arch/x86/setup.c                   |  3 ++-
>  xen/common/domain-builder/fdt.c        | 21 +++++++++++++++++++++
>  3 files changed, 28 insertions(+), 1 deletion(-)
>=20
> diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/includ=
e/asm/boot-domain.h
> index d7c6042e25..e316d4bcde 100644
> --- a/xen/arch/x86/include/asm/boot-domain.h
> +++ b/xen/arch/x86/include/asm/boot-domain.h
> @@ -13,6 +13,11 @@
>  struct boot_domain {
>      domid_t domid;
>=20
> +                                          /* On     | Off    */
> +#define BUILD_MODE_PARAVIRT      (1 << 0) /* PV     | PVH/HVM */
> +#define BUILD_MODE_ENABLE_DM     (1 << 1) /* HVM    | PVH     */
> +    uint32_t mode;
> +
>      struct boot_module *kernel;
>      struct boot_module *module;
>      const char *cmdline;
> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
> index 04ad2d0937..05e3d2cf2a 100644
> --- a/xen/arch/x86/setup.c
> +++ b/xen/arch/x86/setup.c
> @@ -1020,7 +1020,8 @@ static struct domain *__init create_dom0(struct boo=
t_info *bi)
>      struct boot_domain *bd =3D &bi->domains[0];
>      struct domain *d;
>=20
> -    if ( opt_dom0_pvh )
> +    if ( opt_dom0_pvh ||
> +         (bi->hyperlaunch_enabled && !(bd->mode & BUILD_MODE_PARAVIRT)) =
)
>      {
>          dom0_cfg.flags |=3D (XEN_DOMCTL_CDF_hvm |
>                             ((hvm_hap_supported() && !opt_dom0_shadow) ?
> diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/=
fdt.c
> index 0d3c713041..6809c7f917 100644
> --- a/xen/common/domain-builder/fdt.c
> +++ b/xen/common/domain-builder/fdt.c
> @@ -225,6 +225,27 @@ static int __init process_domain_node(
>              bd->domid =3D val;
>              printk(XENLOG_INFO "  domid: %d\n", bd->domid);
>          }
> +        else if ( !strncmp(prop_name, "mode", name_len) )
> +        {
> +            if ( (rc =3D fdt_prop_as_u32(prop, &bd->mode)) )
> +            {
> +                printk(XENLOG_ERR
> +                       "  failed processing mode for domain %s\n", name)=
;
> +                return rc;
> +            }
> +
> +            if ( (bd->mode & BUILD_MODE_PARAVIRT)  &&
> +                 (bd->mode & BUILD_MODE_ENABLE_DM) )
> +            {
> +                printk(XENLOG_ERR "  mode: invalid (pv+hvm)\n");
> +                return -EINVAL;
> +            }
> +
> +            printk(XENLOG_INFO "  mode: %s\n",
> +                   (bd->mode & BUILD_MODE_PARAVIRT)  ? "pv"  :
> +                   (bd->mode & BUILD_MODE_ENABLE_DM) ? "hvm" :
> +                                                       "pvh");
> +        }
>      }
>=20
>      fdt_for_each_subnode(node, fdt, dom_node)
> --
> 2.43.0
>=20
>=20



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Date: Fri, 18 Apr 2025 23:21:10 +0000
To: Alejandro Vallejo 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, "Daniel P. Smith" , Jan Beulich , Andrew Cooper , =?utf-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Bertrand Marquis , Jason Andryuk 
Subject: Re: [PATCH v4 11/13] x86/hyperlaunch: add memory parsing to domain config
Message-ID: 
In-Reply-To: <20250417124844.11143-12-agarciav@amd.com>
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On Thu, Apr 17, 2025 at 01:48:33PM +0100, Alejandro Vallejo wrote:
> From: "Daniel P. Smith" 
>=20
> Add three properties, memory, mem-min, and mem-max, to the domain node de=
vice
> tree parsing to define the memory allocation for a domain. All three fiel=
ds are
> expressed in kb and written as a u64 in the device tree entries.
>=20
> Signed-off-by: Daniel P. Smith 
> Reviewed-by: Jason Andryuk 
> Signed-off-by: Alejandro Vallejo 
> ---
> Can't use KB() rather tha SZ_1K, as that's strictly for literals.

Oh, that's right! Thanks!

>=20
> v4:
>   * Don't override fdt_prop_as_u64() rc on error.
>   * Add separate printk statements for each memory prop error.
>   * Fix bug setting up dom0_size, dom0_min_size and dom0_max_size
>     * Was overriding dom0_size on all 3 paths.
>   * Pre-initialise max_pages of all boot_domains to be LONG_MAX, just as
>     dom0_max_size.
>     * Eventually dom0_max_size drops out in the bigger series, so we
>       need that logic to be correct.
> ---
>  xen/arch/x86/dom0_build.c              |  8 ++++++
>  xen/arch/x86/include/asm/boot-domain.h |  4 +++
>  xen/arch/x86/setup.c                   |  5 +++-
>  xen/common/domain-builder/fdt.c        | 36 ++++++++++++++++++++++++++
>  xen/include/xen/libfdt/libfdt-xen.h    | 10 +++++++
>  5 files changed, 62 insertions(+), 1 deletion(-)
>=20
> diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c
> index 0b467fd4a4..8db24dbc0a 100644
> --- a/xen/arch/x86/dom0_build.c
> +++ b/xen/arch/x86/dom0_build.c
> @@ -627,6 +627,14 @@ int __init construct_dom0(const struct boot_domain *=
bd)
>=20
>      process_pending_softirqs();
>=20
> +    /* If param dom0_size was not set and HL config provided memory size=
 */
> +    if ( !get_memsize(&dom0_size, ULONG_MAX) && bd->mem_pages )
> +        dom0_size.nr_pages =3D bd->mem_pages;
> +    if ( !get_memsize(&dom0_min_size, ULONG_MAX) && bd->min_pages )
> +        dom0_min_size.nr_pages =3D bd->min_pages;
> +    if ( !get_memsize(&dom0_max_size, ULONG_MAX) && bd->max_pages )
> +        dom0_max_size.nr_pages =3D bd->max_pages;
> +
>      if ( is_hvm_domain(d) )
>          rc =3D dom0_construct_pvh(bd);
>      else if ( is_pv_domain(d) )
> diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/includ=
e/asm/boot-domain.h
> index e316d4bcde..fa8ea1cc66 100644
> --- a/xen/arch/x86/include/asm/boot-domain.h
> +++ b/xen/arch/x86/include/asm/boot-domain.h
> @@ -18,6 +18,10 @@ struct boot_domain {
>  #define BUILD_MODE_ENABLE_DM     (1 << 1) /* HVM    | PVH     */
>      uint32_t mode;
>=20
> +    unsigned long mem_pages;
> +    unsigned long min_pages;
> +    unsigned long max_pages;
> +
>      struct boot_module *kernel;
>      struct boot_module *module;
>      const char *cmdline;
> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
> index 05e3d2cf2a..455dad454c 100644
> --- a/xen/arch/x86/setup.c
> +++ b/xen/arch/x86/setup.c
> @@ -296,7 +296,10 @@ static const char *cmdline_cook(const char *p, const=
 char *loader_name);
>  struct boot_info __initdata xen_boot_info =3D {
>      .loader =3D "unknown",
>      .cmdline =3D "",
> -    .domains =3D { [0 ... MAX_NR_BOOTDOMS - 1] =3D { .domid =3D DOMID_IN=
VALID } },
> +    .domains =3D { [0 ... MAX_NR_BOOTDOMS - 1] =3D {
> +        .domid =3D DOMID_INVALID,
> +        .max_pages =3D ULONG_MAX,
> +    }},
>  };
>=20
>  static struct boot_info *__init multiboot_fill_boot_info(
> diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/=
fdt.c
> index 6809c7f917..90218d120a 100644
> --- a/xen/common/domain-builder/fdt.c
> +++ b/xen/common/domain-builder/fdt.c
> @@ -7,6 +7,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>=20
>  #include 
>  #include 
> @@ -246,6 +247,41 @@ static int __init process_domain_node(
>                     (bd->mode & BUILD_MODE_ENABLE_DM) ? "hvm" :
>                                                         "pvh");
>          }
> +        else if ( strncmp(prop_name, "memory", name_len) =3D=3D 0 )

Use !strncmp(...) like in the below code?

> +        {
> +            uint64_t kb;
> +            if ( (rc =3D fdt_prop_as_u64(prop, &kb)) )
> +            {
> +                printk(XENLOG_ERR "  bad \"memory\" prop on domain %s\n"=
, name);
> +                return rc;
> +            }
> +            bd->mem_pages =3D PFN_DOWN(kb * SZ_1K);
> +            printk(XENLOG_ERR "  memory: %lu KiB\n", kb);
> +        }
> +        else if ( !strncmp(prop_name, "mem-min", name_len) )
> +        {
> +            uint64_t kb;
> +            if ( (rc =3D fdt_prop_as_u64(prop, &kb)) )
> +            {
> +                printk(XENLOG_ERR
> +                       "  bad \"mem-min\" prop on domain %s\n", name);
> +                return rc;
> +            }
> +            bd->min_pages =3D PFN_DOWN(kb * SZ_1K);
> +            printk(XENLOG_INFO "  min memory: %lu kb\n", kb);
> +        }
> +        else if ( !strncmp(prop_name, "mem-max", name_len) )
> +        {
> +            uint64_t kb;
> +            if ( (rc =3D fdt_prop_as_u64(prop, &kb)) )
> +            {
> +                printk(XENLOG_ERR
> +                       "  bad \"mem-max\" prop on domain %s\n", name);
> +                return rc;
> +            }
> +            bd->max_pages =3D PFN_DOWN(kb * SZ_1K);
> +            printk(XENLOG_INFO "  max memory: %lu KiB\n", kb);
> +        }
>      }
>=20
>      fdt_for_each_subnode(node, fdt, dom_node)
> diff --git a/xen/include/xen/libfdt/libfdt-xen.h b/xen/include/xen/libfdt=
/libfdt-xen.h
> index afc76e7750..3054b48a83 100644
> --- a/xen/include/xen/libfdt/libfdt-xen.h
> +++ b/xen/include/xen/libfdt/libfdt-xen.h
> @@ -24,6 +24,16 @@ static inline int __init fdt_prop_as_u32(
>      return 0;
>  }
>=20
> +static inline int __init fdt_prop_as_u64(
> +    const struct fdt_property *prop, uint64_t *val)
> +{
> +    if ( !prop || fdt32_to_cpu(prop->len) < sizeof(uint64_t) )
> +        return -EINVAL;
> +
> +    *val =3D fdt64_to_cpu(*(const fdt64_t *)prop->data);
> +    return 0;
> +}

Perhaps move the call to common/domain-builder/fdt.c?

> +
>  static inline bool __init fdt_get_prop_offset(
>      const void *fdt, int node, const char *pname, unsigned long *poffset=
)
>  {
> --
> 2.43.0
>=20
>=20



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Date: Fri, 18 Apr 2025 23:22:21 +0000
To: Alejandro Vallejo 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, "Daniel P. Smith" , Jan Beulich , Andrew Cooper , =?utf-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Jason Andryuk 
Subject: Re: [PATCH v4 12/13] x86/hyperlaunch: add max vcpu parsing of hyperlaunch device tree
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References: <20250417124844.11143-1-agarciav@amd.com> <20250417124844.11143-13-agarciav@amd.com>
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On Thu, Apr 17, 2025 at 01:48:34PM +0100, Alejandro Vallejo wrote:
> From: "Daniel P. Smith" 
>=20
> Introduce the `cpus` property, named as such for dom0less compatibility, =
that
> represents the maximum number of vcpus to allocate for a domain. In the d=
evice
> tree, it will be encoded as a u32 value.
>=20
> Signed-off-by: Daniel P. Smith 
> Reviewed-by: Jason Andryuk 
> Signed-off-by: Alejandro Vallejo 

Reviewed-by: Denis Mukhin 

> ---
> v4:
>   * s/UINT_MAX/UINT32_MAX/ (cosmetic, but...)
>   * s/vpcpus/vcpus/ in commit message.
>   * Reworded printk()
> ---
>  xen/arch/x86/dom0_build.c              |  3 +++
>  xen/arch/x86/include/asm/boot-domain.h |  2 ++
>  xen/common/domain-builder/fdt.c        | 11 +++++++++++
>  3 files changed, 16 insertions(+)
>=20
> diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c
> index 8db24dbc0a..f734104c74 100644
> --- a/xen/arch/x86/dom0_build.c
> +++ b/xen/arch/x86/dom0_build.c
> @@ -635,6 +635,9 @@ int __init construct_dom0(const struct boot_domain *b=
d)
>      if ( !get_memsize(&dom0_max_size, ULONG_MAX) && bd->max_pages )
>          dom0_max_size.nr_pages =3D bd->max_pages;
>=20
> +    if ( opt_dom0_max_vcpus_max =3D=3D UINT_MAX && bd->max_vcpus )
> +        opt_dom0_max_vcpus_max =3D bd->max_vcpus;
> +
>      if ( is_hvm_domain(d) )
>          rc =3D dom0_construct_pvh(bd);
>      else if ( is_pv_domain(d) )
> diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/includ=
e/asm/boot-domain.h
> index fa8ea1cc66..969c02a6ea 100644
> --- a/xen/arch/x86/include/asm/boot-domain.h
> +++ b/xen/arch/x86/include/asm/boot-domain.h
> @@ -22,6 +22,8 @@ struct boot_domain {
>      unsigned long min_pages;
>      unsigned long max_pages;
>=20
> +    unsigned int max_vcpus;
> +
>      struct boot_module *kernel;
>      struct boot_module *module;
>      const char *cmdline;
> diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/=
fdt.c
> index 90218d120a..295ab6e8b3 100644
> --- a/xen/common/domain-builder/fdt.c
> +++ b/xen/common/domain-builder/fdt.c
> @@ -282,6 +282,17 @@ static int __init process_domain_node(
>              bd->max_pages =3D PFN_DOWN(kb * SZ_1K);
>              printk(XENLOG_INFO "  max memory: %lu KiB\n", kb);
>          }
> +        else if ( !strncmp(prop_name, "cpus", name_len) )
> +        {
> +            uint32_t val =3D UINT32_MAX;
> +            if ( (rc =3D fdt_prop_as_u32(prop, &val)) )
> +            {
> +                printk(XENLOG_ERR "  bad \"cpus\" prop on domain %s\n", =
name);
> +                return rc;
> +            }
> +            bd->max_vcpus =3D val;
> +            printk(XENLOG_INFO "  cpus: %d\n", bd->max_vcpus);
> +        }
>      }
>=20
>      fdt_for_each_subnode(node, fdt, dom_node)
> --
> 2.43.0
>=20
>=20



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Date: Fri, 18 Apr 2025 23:24:20 +0000
To: Alejandro Vallejo 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, "Daniel P. Smith" , Jan Beulich , Andrew Cooper , =?utf-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Jason Andryuk 
Subject: Re: [PATCH v4 13/13] x86/hyperlaunch: add capabilities to boot domain
Message-ID: 
In-Reply-To: <20250417124844.11143-14-agarciav@amd.com>
References: <20250417124844.11143-1-agarciav@amd.com> <20250417124844.11143-14-agarciav@amd.com>
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On Thu, Apr 17, 2025 at 01:48:35PM +0100, Alejandro Vallejo wrote:
> From: "Daniel P. Smith" 
>=20
> Introduce the ability to assign capabilities to a domain via its definiti=
on in
> device tree. The first capability enabled to select is the control domain
> capability. The capability property is a bitfield in both the device tree=
 and
> `struct boot_domain`.
>=20
> Signed-off-by: Daniel P. Smith 
> Signed-off-by: Jason Andryuk 
> Signed-off-by: Alejandro Vallejo 

Reviewed-by: Denis Mukhin 

> ---
> v4:
>   * Dropped Jason's R-by.
>   * Refactored caps printinng logic
>     * It just wasn't xenlog-compatible as it was.
>   * Moved pv_shim check to builder_init, so the capability is just not gi=
ven.
>     * And inlined the create_flags variable now that's tractable.
>   * Validated input capabilities after coming out of the DT.
> ---
>  xen/arch/x86/include/asm/boot-domain.h |  5 +++++
>  xen/arch/x86/setup.c                   |  3 ++-
>  xen/common/domain-builder/core.c       |  2 ++
>  xen/common/domain-builder/fdt.c        | 20 ++++++++++++++++++++
>  4 files changed, 29 insertions(+), 1 deletion(-)
>=20
> diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/includ=
e/asm/boot-domain.h
> index 969c02a6ea..5c143d82af 100644
> --- a/xen/arch/x86/include/asm/boot-domain.h
> +++ b/xen/arch/x86/include/asm/boot-domain.h
> @@ -13,6 +13,11 @@
>  struct boot_domain {
>      domid_t domid;
>=20
> +#define BUILD_CAPS_NONE          (0U)
> +#define BUILD_CAPS_CONTROL       (1U << 0)
> +#define BUILD_CAPS__ALL          BUILD_CAPS_CONTROL
> +    uint32_t capabilities;
> +
>                                            /* On     | Off    */
>  #define BUILD_MODE_PARAVIRT      (1 << 0) /* PV     | PVH/HVM */
>  #define BUILD_MODE_ENABLE_DM     (1 << 1) /* HVM    | PVH     */
> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
> index 455dad454c..3cdd8bc2f9 100644
> --- a/xen/arch/x86/setup.c
> +++ b/xen/arch/x86/setup.c
> @@ -1040,7 +1040,8 @@ static struct domain *__init create_dom0(struct boo=
t_info *bi)
>      if ( bd->domid =3D=3D DOMID_INVALID )
>          /* Create initial domain.  Not d0 for pvshim. */
>          bd->domid =3D get_initial_domain_id();
> -    d =3D domain_create(bd->domid, &dom0_cfg, pv_shim ? 0 : CDF_privileg=
ed);
> +    d =3D domain_create(bd->domid, &dom0_cfg,
> +            (bd->capabilities & BUILD_CAPS_CONTROL) ? CDF_privileged : 0=
);
>      if ( IS_ERR(d) )
>          panic("Error creating d%u: %ld\n", bd->domid, PTR_ERR(d));
>=20
> diff --git a/xen/common/domain-builder/core.c b/xen/common/domain-builder=
/core.c
> index 4b4230f2ff..d1a5d6125e 100644
> --- a/xen/common/domain-builder/core.c
> +++ b/xen/common/domain-builder/core.c
> @@ -8,6 +8,7 @@
>  #include 
>=20
>  #include 
> +#include 
>  #include 
>=20
>  #include "fdt.h"
> @@ -93,6 +94,7 @@ void __init builder_init(struct boot_info *bi)
>=20
>          bi->mods[i].type =3D BOOTMOD_KERNEL;
>          bi->domains[0].kernel =3D &bi->mods[i];
> +        bi->domains[0].capabilities |=3D pv_shim ? 0 : BUILD_CAPS_CONTRO=
L;
>          bi->nr_domains =3D 1;
>      }
>  }
> diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/=
fdt.c
> index 295ab6e8b3..3e3a84e2d0 100644
> --- a/xen/common/domain-builder/fdt.c
> +++ b/xen/common/domain-builder/fdt.c
> @@ -293,6 +293,26 @@ static int __init process_domain_node(
>              bd->max_vcpus =3D val;
>              printk(XENLOG_INFO "  cpus: %d\n", bd->max_vcpus);
>          }
> +        else if ( !strncmp(prop_name, "capabilities", name_len) )
> +        {
> +            if ( (rc =3D fdt_prop_as_u32(prop, &bd->capabilities)) )
> +            {
> +                printk(XENLOG_ERR
> +                       "  bad \"capabilities\" on domain %s\n", name);
> +                return rc;
> +            }
> +
> +            if ( bd->capabilities & ~BUILD_CAPS__ALL )
> +            {
> +                printk(XENLOG_WARNING "  unknown capabilities: %#x\n",
> +                       bd->capabilities & ~BUILD_CAPS__ALL);
> +
> +                bd->capabilities &=3D BUILD_CAPS__ALL;
> +            }
> +
> +            printk(XENLOG_INFO "  caps: %s\n",
> +                   bd->capabilities & BUILD_CAPS_CONTROL ? "c" : "");
> +        }
>      }
>=20
>      fdt_for_each_subnode(node, fdt, dom_node)
> --
> 2.43.0
>=20
>=20



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Date: Fri, 18 Apr 2025 16:39:04 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Aleksandr Partanen 
cc: qemu-devel@nongnu.org, Stefano Stabellini , 
    "Edgar E. Iglesias" , 
    xen-devel@lists.xenproject.org, Paul Durrant , 
    Anthony PERARD 
Subject: Re: [PATCH] xen: mapcache: Fix finding matching entry
In-Reply-To: <20250410144604.214977-1-alex.pentagrid@gmail.com>
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On Thu, 10 Apr 2025, Aleksandr Partanen wrote:
> If we have request without lock and hit unlocked or invalid
> entry during the search, we remap it immediately,
> even if we have matching entry in next entries in bucket.
> This leads to duplication of mappings of the same size,
> and to possibility of selecting the wrong element
> during invalidation and underflow it's entry->lock counter
> 
> Signed-off-by: Aleksandr Partanen 

Hi Aleksandr, thanks for the patch, it looks correct to me.

Reviewed-by: Stefano Stabellini 


Edgar, would you be able to give it a look as well to make sure?


> ---
>  hw/xen/xen-mapcache.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/hw/xen/xen-mapcache.c b/hw/xen/xen-mapcache.c
> index 698b5c53ed..2c8f861fdb 100644
> --- a/hw/xen/xen-mapcache.c
> +++ b/hw/xen/xen-mapcache.c
> @@ -376,12 +376,12 @@ tryagain:
>  
>      entry = &mc->entry[address_index % mc->nr_buckets];
>  
> -    while (entry && (lock || entry->lock) && entry->vaddr_base &&
> -            (entry->paddr_index != address_index || entry->size != cache_size ||
> +    while (entry && (!entry->vaddr_base ||
> +            entry->paddr_index != address_index || entry->size != cache_size ||
>               !test_bits(address_offset >> XC_PAGE_SHIFT,
>                   test_bit_size >> XC_PAGE_SHIFT,
>                   entry->valid_mapping))) {
> -        if (!free_entry && !entry->lock) {
> +        if (!free_entry && (!entry->lock || !entry->vaddr_base)) {
>              free_entry = entry;
>              free_pentry = pentry;
>          }
> -- 
> 2.39.5
> 


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To: Volodymyr Babchuk 
cc: "xen-devel@lists.xenproject.org" , 
    Andrew Cooper , 
    Anthony PERARD , 
    Michal Orzel , Jan Beulich , 
    Julien Grall , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
    Stefano Stabellini 
Subject: Re: [PATCH v5] xen: debug: gcov: add condition coverage support
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On Wed, 9 Apr 2025, Volodymyr Babchuk wrote:
> Condition coverage, also known as MC/DC (modified condition/decision
> coverage) is a coverage metric that tracks separate outcomes in
> boolean expressions.
> 
> This patch adds CONFIG_CONDITION_COVERAGE option to enable MC/DC for
> GCC. Clang is not supported right now because Xen can't emit version
> 10 of LLVM profile data, where MC/DC support was added.
> 
> Also, use the opportunity to convert COV_FLAGS to cov-cflags-y, which
> reduces amount of ifeqs in Rules.mk. Otherwise this patch had to add
> another nesting level with "ifeq ($(CONFIG_CONDITION_COVERAGE),y)".
> 
> Signed-off-by: Volodymyr Babchuk 

Reviewed-by: Stefano Stabellini 


> ---
> Changes in v5:
>  - cov-flags-y -> cov-cflags-y
>  - Clarified why Clang is not supported right now
> 
> Changes in v4:
>  - Slight formatting fixes
>  - COV_FLAGS  -> cov-flags-y
> 
> Changes in v3:
>  - Introduced CC_HAS_MCDC that checks if compiler supports
>    required feature
> 
> Changes in v2:
>  - Move gcc version check from .c file to Rules.mk (I can't find
>    an easy way to check GCC version at Kconfig level)
>  - Check for gcc 14, not gcc 14.1
> ---
>  xen/Kconfig       |  4 ++++
>  xen/Kconfig.debug |  9 +++++++++
>  xen/Rules.mk      | 14 +++++++-------
>  3 files changed, 20 insertions(+), 7 deletions(-)
> 
> diff --git a/xen/Kconfig b/xen/Kconfig
> index 2128f0ccfc..3a723db8ea 100644
> --- a/xen/Kconfig
> +++ b/xen/Kconfig
> @@ -41,6 +41,10 @@ config CC_SPLIT_SECTIONS
>  config CC_HAS_UBSAN
>  	def_bool $(cc-option,-fsanitize=undefined)
>  
> +# Compiler supports -fcondition-coverage aka MC/DC
> +config CC_HAS_MCDC
> +	def_bool $(cc-option,-fcondition-coverage)
> +
>  # Set code alignment.
>  #
>  # Allow setting on a boolean basis, and then convert such selection to an
> diff --git a/xen/Kconfig.debug b/xen/Kconfig.debug
> index f7cc5ffaab..f89cbd823b 100644
> --- a/xen/Kconfig.debug
> +++ b/xen/Kconfig.debug
> @@ -44,6 +44,15 @@ config COVERAGE
>  
>  	  If unsure, say N here.
>  
> +config CONDITION_COVERAGE
> +	bool "Condition coverage support"
> +	depends on COVERAGE && CC_HAS_MCDC
> +	help
> +	  Enable condition coverage support. Used for collecting MC/DC
> +	  (Modified Condition/Decision Coverage) metrics.
> +
> +	  If unsure, say N here.
> +
>  config DEBUG_LOCK_PROFILE
>  	bool "Lock Profiling"
>  	select DEBUG_LOCKS
> diff --git a/xen/Rules.mk b/xen/Rules.mk
> index d759cccee3..da21850926 100644
> --- a/xen/Rules.mk
> +++ b/xen/Rules.mk
> @@ -29,6 +29,7 @@ targets :=
>  subdir-y :=
>  CFLAGS-y :=
>  AFLAGS-y :=
> +cov-cflags-y :=
>  nocov-y :=
>  noubsan-y :=
>  
> @@ -133,19 +134,18 @@ $(filter %.init.o,$(obj-y) $(obj-bin-y) $(extra-y)): CFLAGS-y += -DINIT_SECTIONS
>  
>  non-init-objects = $(filter-out %.init.o, $(obj-y) $(obj-bin-y) $(extra-y))
>  
> -ifeq ($(CONFIG_COVERAGE),y)
>  ifeq ($(CONFIG_CC_IS_CLANG),y)
> -    COV_FLAGS := -fprofile-instr-generate -fcoverage-mapping
> +    cov-cflags-$(CONFIG_COVERAGE) := -fprofile-instr-generate -fcoverage-mapping
>  else
> -    COV_FLAGS := -fprofile-arcs -ftest-coverage
> +    cov-cflags-$(CONFIG_COVERAGE) := -fprofile-arcs -ftest-coverage
> +    cov-cflags-$(CONFIG_CONDITION_COVERAGE) += -fcondition-coverage
>  endif
>  
> -# Reset COV_FLAGS in cases where an objects has another one as prerequisite
> +# Reset cov-cflags-y in cases where an objects has another one as prerequisite
>  $(nocov-y) $(filter %.init.o, $(obj-y) $(obj-bin-y) $(extra-y)): \
> -    COV_FLAGS :=
> +    cov-cflags-y :=
>  
> -$(non-init-objects): _c_flags += $(COV_FLAGS)
> -endif
> +$(non-init-objects): _c_flags += $(cov-cflags-y)
>  
>  ifeq ($(CONFIG_UBSAN),y)
>  # Any -fno-sanitize= options need to come after any -fsanitize= options
> -- 
> 2.48.1
> 


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Date: Fri, 18 Apr 2025 17:19:48 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Mykyta Poturai 
cc: "xen-devel@lists.xenproject.org" , 
    Oleksandr Andrushchenko , 
    Stefano Stabellini , Julien Grall , 
    Bertrand Marquis , 
    Michal Orzel , 
    Volodymyr Babchuk 
Subject: Re: [PATCH v3 3/4] xen/arm: add support for PCI child bus
In-Reply-To: <24a9ed02f049d3187a14a0c0ad847ff97d346b79.1744203405.git.mykyta_poturai@epam.com>
Message-ID: 
References:  <24a9ed02f049d3187a14a0c0ad847ff97d346b79.1744203405.git.mykyta_poturai@epam.com>
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On Wed, 9 Apr 2025, Mykyta Poturai wrote:
> From: Oleksandr Andrushchenko 
> 
> PCI host bridges often have different ways to access the root and child
> bus configuration spaces. One of the examples is Designware's host bridge
> and its multiple clones [1].
> 
> Linux kernel implements this by instantiating a child bus when device
> drivers provide not only the usual pci_ops to access ECAM space (this is
> the case for the generic host bridge), but also means to access the child
> bus which has a dedicated configuration space and own implementation for
> accessing the bus, e.g. child_ops.
> 
> For Xen it is not feasible to fully implement PCI bus infrastructure as
> Linux kernel does, but still child bus can be supported.
> 
> Add support for the PCI child bus which includes the following changes:
> - introduce bus mapping functions depending on SBDF
> - assign bus start and end for the child bus and re-configure the same for
>   the parent (root) bus
> - make pci_find_host_bridge be aware of multiple busses behind the same bridge
> - update pci_host_bridge_mappings, so it also doesn't map to guest the memory
>   spaces belonging to the child bus
> - make pci_host_common_probe accept one more pci_ops structure for the child bus
> - install MMIO handlers for the child bus
> - re-work vpci_mmio_{write|read} with parent and child approach in mind
> 
> [1] https://elixir.bootlin.com/linux/v5.15/source/drivers/pci/controller/dwc
> 
> Signed-off-by: Oleksandr Andrushchenko 
> Signed-off-by: Mykyta Poturai 
> ---
> v2->v3:
> * no change
> 
> v1->v2:
> * fixed compilation issues
> ---
>  xen/arch/arm/include/asm/pci.h      | 12 +++-
>  xen/arch/arm/pci/ecam.c             | 17 ++++--
>  xen/arch/arm/pci/pci-access.c       | 37 +++++++++++--
>  xen/arch/arm/pci/pci-host-common.c  | 86 +++++++++++++++++++++++------
>  xen/arch/arm/pci/pci-host-generic.c |  2 +-
>  xen/arch/arm/pci/pci-host-zynqmp.c  |  2 +-
>  xen/arch/arm/vpci.c                 | 83 ++++++++++++++++++++++------
>  7 files changed, 192 insertions(+), 47 deletions(-)
> 
> diff --git a/xen/arch/arm/include/asm/pci.h b/xen/arch/arm/include/asm/pci.h
> index 3d2ca9b5b0..addec31791 100644
> --- a/xen/arch/arm/include/asm/pci.h
> +++ b/xen/arch/arm/include/asm/pci.h
> @@ -67,6 +67,9 @@ struct pci_host_bridge {
>      uint16_t segment;                /* Segment number */
>      struct pci_config_window* cfg;   /* Pointer to the bridge config window */
>      const struct pci_ops *ops;
> +    /* Child bus */
> +    struct pci_config_window *child_cfg;
> +    const struct pci_ops *child_ops;
>      void *priv;                      /* Private data of the bridge. */
>  };
>  
> @@ -96,14 +99,19 @@ struct pci_ecam_ops {
>  /* Default ECAM ops */
>  extern const struct pci_ecam_ops pci_generic_ecam_ops;
>  
> -struct pci_host_bridge *pci_host_common_probe(struct dt_device_node *dev,
> -                                              const struct pci_ecam_ops *ops);
> +struct pci_host_bridge *
> +pci_host_common_probe(struct dt_device_node *dev,
> +                      const struct pci_ecam_ops *ops,
> +                      const struct pci_ecam_ops *child_ops);
>  int pci_generic_config_read(struct pci_host_bridge *bridge, pci_sbdf_t sbdf,
>                              uint32_t reg, uint32_t len, uint32_t *value);
>  int pci_generic_config_write(struct pci_host_bridge *bridge, pci_sbdf_t sbdf,
>                               uint32_t reg, uint32_t len, uint32_t value);
>  void __iomem *pci_ecam_map_bus(struct pci_host_bridge *bridge,
>                                 pci_sbdf_t sbdf, uint32_t where);
> +void __iomem *pci_ecam_map_bus_generic(const struct pci_config_window *cfg,
> +                                       const struct pci_ecam_ops *ops,
> +                                       pci_sbdf_t sbdf, uint32_t where);
>  bool pci_ecam_need_p2m_hwdom_mapping(struct domain *d,
>                                       struct pci_host_bridge *bridge,
>                                       uint64_t addr);
> diff --git a/xen/arch/arm/pci/ecam.c b/xen/arch/arm/pci/ecam.c
> index 3987f96b01..ad0b2c35f9 100644
> --- a/xen/arch/arm/pci/ecam.c
> +++ b/xen/arch/arm/pci/ecam.c
> @@ -20,12 +20,10 @@
>  /*
>   * Function to implement the pci_ops->map_bus method.
>   */
> -void __iomem *pci_ecam_map_bus(struct pci_host_bridge *bridge,
> -                               pci_sbdf_t sbdf, uint32_t where)
> +void __iomem *pci_ecam_map_bus_generic(const struct pci_config_window *cfg,
> +                                       const struct pci_ecam_ops *ops,
> +                                       pci_sbdf_t sbdf, uint32_t where)
>  {
> -    const struct pci_config_window *cfg = bridge->cfg;
> -    const struct pci_ecam_ops *ops =
> -        container_of(bridge->ops, const struct pci_ecam_ops, pci_ops);
>      unsigned int devfn_shift = ops->bus_shift - 8;
>      void __iomem *base;
>      unsigned int busn = sbdf.bus;
> @@ -39,6 +37,15 @@ void __iomem *pci_ecam_map_bus(struct pci_host_bridge *bridge,
>      return base + (sbdf.devfn << devfn_shift) + where;
>  }
>  
> +void __iomem *pci_ecam_map_bus(struct pci_host_bridge *bridge, pci_sbdf_t sbdf,
> +                               uint32_t where)
> +{
> +    const struct pci_ecam_ops *ops =
> +        container_of(bridge->ops, const struct pci_ecam_ops, pci_ops);
> +
> +    return pci_ecam_map_bus_generic(bridge->cfg, ops, sbdf, where);
> +}

It doesn't look like this change is necessary? It doesn't seem that
pci_ecam_map_bus_generic is used anywhere?


>  bool __init pci_ecam_need_p2m_hwdom_mapping(struct domain *d,
>                                              struct pci_host_bridge *bridge,
>                                              uint64_t addr)
> diff --git a/xen/arch/arm/pci/pci-access.c b/xen/arch/arm/pci/pci-access.c
> index 9f9aac43d7..cc4787f2b5 100644
> --- a/xen/arch/arm/pci/pci-access.c
> +++ b/xen/arch/arm/pci/pci-access.c
> @@ -18,10 +18,31 @@
>  #define INVALID_VALUE (~0U)
>  #define PCI_ERR_VALUE(len) GENMASK(0, len * 8)
>  
> +static const struct pci_ops *get_ops(struct pci_host_bridge *bridge,
> +                                     pci_sbdf_t sbdf)
> +{
> +    if ( bridge->child_ops )
> +    {
> +        struct pci_config_window *cfg = bridge->child_cfg;
> +
> +        if ( (sbdf.bus >= cfg->busn_start) && (sbdf.bus <= cfg->busn_end) )
> +            return bridge->child_ops;
> +    }
> +    return bridge->ops;
> +}
> +
> +static void __iomem *map_bus(struct pci_host_bridge *bridge, pci_sbdf_t sbdf,
> +                             uint32_t reg)

NIT: I would do static inline here


> +{
> +    const struct pci_ops *ops = get_ops(bridge, sbdf);
> +
> +    return ops->map_bus(bridge, sbdf, reg);
> +}
> +
>  int pci_generic_config_read(struct pci_host_bridge *bridge, pci_sbdf_t sbdf,
>                              uint32_t reg, uint32_t len, uint32_t *value)
>  {
> -    void __iomem *addr = bridge->ops->map_bus(bridge, sbdf, reg);
> +    void __iomem *addr = map_bus(bridge, sbdf, reg);
>  
>      if ( !addr )
>      {
> @@ -50,7 +71,7 @@ int pci_generic_config_read(struct pci_host_bridge *bridge, pci_sbdf_t sbdf,
>  int pci_generic_config_write(struct pci_host_bridge *bridge, pci_sbdf_t sbdf,
>                               uint32_t reg, uint32_t len, uint32_t value)
>  {
> -    void __iomem *addr = bridge->ops->map_bus(bridge, sbdf, reg);
> +    void __iomem *addr = map_bus(bridge, sbdf, reg);
>  
>      if ( !addr )
>          return -ENODEV;
> @@ -78,14 +99,16 @@ static uint32_t pci_config_read(pci_sbdf_t sbdf, unsigned int reg,
>  {
>      uint32_t val = PCI_ERR_VALUE(len);
>      struct pci_host_bridge *bridge = pci_find_host_bridge(sbdf.seg, sbdf.bus);
> +    const struct pci_ops *ops;
>  
>      if ( unlikely(!bridge) )
>          return val;
>  
> -    if ( unlikely(!bridge->ops->read) )
> +    ops = get_ops(bridge, sbdf);
> +    if ( unlikely(!ops->read) )
>          return val;
>  
> -    bridge->ops->read(bridge, sbdf, reg, len, &val);
> +    ops->read(bridge, sbdf, reg, len, &val);
>  
>      return val;
>  }
> @@ -94,14 +117,16 @@ static void pci_config_write(pci_sbdf_t sbdf, unsigned int reg,
>                               unsigned int len, uint32_t val)
>  {
>      struct pci_host_bridge *bridge = pci_find_host_bridge(sbdf.seg, sbdf.bus);
> +    const struct pci_ops *ops;
>  
>      if ( unlikely(!bridge) )
>          return;
>  
> -    if ( unlikely(!bridge->ops->write) )
> +    ops = get_ops(bridge, sbdf);
> +    if ( unlikely(!ops->write) )
>          return;
>  
> -    bridge->ops->write(bridge, sbdf, reg, len, val);
> +    ops->write(bridge, sbdf, reg, len, val);
>  }
>  
>  /*
> diff --git a/xen/arch/arm/pci/pci-host-common.c b/xen/arch/arm/pci/pci-host-common.c
> index 7ce9675551..2b058b5f5e 100644
> --- a/xen/arch/arm/pci/pci-host-common.c
> +++ b/xen/arch/arm/pci/pci-host-common.c
> @@ -57,17 +57,12 @@ static void pci_ecam_free(struct pci_config_window *cfg)
>      xfree(cfg);
>  }
>  
> -static struct pci_config_window * __init
> -gen_pci_init(struct dt_device_node *dev, const struct pci_ecam_ops *ops)
> +static void __init gen_pci_init_bus_range(struct dt_device_node *dev,
> +                                          struct pci_host_bridge *bridge,
> +                                          struct pci_config_window *cfg)
>  {
> -    int err, cfg_reg_idx;
>      u32 bus_range[2];
> -    paddr_t addr, size;
> -    struct pci_config_window *cfg;
> -
> -    cfg = xzalloc(struct pci_config_window);
> -    if ( !cfg )
> -        return NULL;
> +    int err;
>  
>      err = dt_property_read_u32_array(dev, "bus-range", bus_range,
>                                       ARRAY_SIZE(bus_range));
> @@ -82,6 +77,36 @@ gen_pci_init(struct dt_device_node *dev, const struct pci_ecam_ops *ops)
>          if ( cfg->busn_end > cfg->busn_start + 0xff )
>              cfg->busn_end = cfg->busn_start + 0xff;
>      }
> +}
> +
> +static void __init gen_pci_init_bus_range_child(struct dt_device_node *dev,
> +                                                struct pci_host_bridge *bridge,
> +                                                struct pci_config_window *cfg)
> +{
> +    cfg->busn_start = bridge->cfg->busn_start + 1;
> +    cfg->busn_end = bridge->cfg->busn_end;
> +    bridge->cfg->busn_end = bridge->cfg->busn_start;
> +
> +    printk(XENLOG_INFO "Root bus end updated: [bus %x-%x]\n",
> +           bridge->cfg->busn_start, bridge->cfg->busn_end);
> +}
> +
> +static struct pci_config_window *__init
> +gen_pci_init(struct dt_device_node *dev, struct pci_host_bridge *bridge,
> +             const struct pci_ecam_ops *ops,
> +             void (*init_bus_range)(struct dt_device_node *dev,
> +                                    struct pci_host_bridge *bridge,
> +                                    struct pci_config_window *cfg))
> +{
> +    int err, cfg_reg_idx;
> +    paddr_t addr, size;
> +    struct pci_config_window *cfg;
> +
> +    cfg = xzalloc(struct pci_config_window);
> +    if ( !cfg )
> +        return NULL;
> +
> +    init_bus_range(dev, bridge, cfg);
>  
>      if ( ops->cfg_reg_index )
>      {
> @@ -208,8 +233,10 @@ static int pci_bus_find_domain_nr(struct dt_device_node *dev)
>      return domain;
>  }
>  
> -struct pci_host_bridge *pci_host_common_probe(struct dt_device_node *dev,
> -                                              const struct pci_ecam_ops *ops)
> +struct pci_host_bridge *
> +pci_host_common_probe(struct dt_device_node *dev,
> +                      const struct pci_ecam_ops *ops,
> +                      const struct pci_ecam_ops *child_ops)
>  {
>      struct pci_host_bridge *bridge;
>      struct pci_config_window *cfg;
> @@ -224,7 +251,7 @@ struct pci_host_bridge *pci_host_common_probe(struct dt_device_node *dev,
>          return ERR_PTR(-ENOMEM);
>  
>      /* Parse and map our Configuration Space windows */
> -    cfg = gen_pci_init(dev, ops);
> +    cfg = gen_pci_init(dev, bridge, ops, gen_pci_init_bus_range);
>      if ( !cfg )
>      {
>          err = -ENOMEM;
> @@ -242,10 +269,29 @@ struct pci_host_bridge *pci_host_common_probe(struct dt_device_node *dev,
>          BUG();
>      }
>      bridge->segment = domain;
> +
> +    if ( child_ops )
> +    {
> +        /* Parse and map child's Configuration Space windows */
> +        cfg = gen_pci_init(dev, bridge, child_ops,
> +                           gen_pci_init_bus_range_child);
> +        if ( !cfg )
> +        {
> +            err = -ENOMEM;
> +            goto err_child;
> +        }
> +
> +        bridge->child_cfg = cfg;
> +        bridge->child_ops = &child_ops->pci_ops;
> +    }
> +
>      pci_add_host_bridge(bridge);
>  
>      return bridge;
>  
> +err_child:
> +    xfree(bridge->cfg);
> +
>  err_exit:
>      xfree(bridge);
>  
> @@ -280,9 +326,12 @@ struct pci_host_bridge *pci_find_host_bridge(uint16_t segment, uint8_t bus)
>      {
>          if ( bridge->segment != segment )
>              continue;
> -        if ( (bus < bridge->cfg->busn_start) || (bus > bridge->cfg->busn_end) )
> -            continue;
> -        return bridge;
> +        if ( bridge->child_cfg && (bus >= bridge->child_cfg->busn_start) &&
> +             (bus <= bridge->child_cfg->busn_end) )
> +            return bridge;
> +        if ( (bus >= bridge->cfg->busn_start) &&
> +             (bus <= bridge->cfg->busn_end) )
> +            return bridge;
>      }
>  
>      return NULL;
> @@ -348,6 +397,7 @@ int __init pci_host_bridge_mappings(struct domain *d)
>      {
>          const struct dt_device_node *dev = bridge->dt_node;
>          unsigned int i;
> +        bool need_mapping;
>  
>          for ( i = 0; i < dt_number_of_address(dev); i++ )
>          {
> @@ -363,7 +413,11 @@ int __init pci_host_bridge_mappings(struct domain *d)
>                  return err;
>              }
>  
> -            if ( bridge->ops->need_p2m_hwdom_mapping(d, bridge, addr) )
> +            need_mapping = bridge->ops->need_p2m_hwdom_mapping(d, bridge, addr);
> +            if ( need_mapping && bridge->child_ops )
> +                need_mapping =
> +                    bridge->child_ops->need_p2m_hwdom_mapping(d, bridge, addr);

Is this because the child bus address range is always a subset of the
parent address range?

If not, we would need to check either of them independently (|| instead
of &&).


> +            if ( need_mapping )
>              {
>                  err = map_range_to_domain(dev, addr, size, &mr_data);
>                  if ( err )
> diff --git a/xen/arch/arm/pci/pci-host-generic.c b/xen/arch/arm/pci/pci-host-generic.c
> index a6ffbda174..47cf144831 100644
> --- a/xen/arch/arm/pci/pci-host-generic.c
> +++ b/xen/arch/arm/pci/pci-host-generic.c
> @@ -29,7 +29,7 @@ static const struct dt_device_match __initconstrel gen_pci_dt_match[] =
>  static int __init pci_host_generic_probe(struct dt_device_node *dev,
>                                           const void *data)
>  {
> -    return PTR_RET(pci_host_common_probe(dev, &pci_generic_ecam_ops));
> +    return PTR_RET(pci_host_common_probe(dev, &pci_generic_ecam_ops, NULL));
>  }
>  
>  DT_DEVICE_START(pci_gen, "PCI HOST GENERIC", DEVICE_PCI_HOSTBRIDGE)
> diff --git a/xen/arch/arm/pci/pci-host-zynqmp.c b/xen/arch/arm/pci/pci-host-zynqmp.c
> index a38f2e019e..75d1235aaf 100644
> --- a/xen/arch/arm/pci/pci-host-zynqmp.c
> +++ b/xen/arch/arm/pci/pci-host-zynqmp.c
> @@ -47,7 +47,7 @@ static const struct dt_device_match __initconstrel nwl_pcie_dt_match[] =
>  static int __init pci_host_generic_probe(struct dt_device_node *dev,
>                                           const void *data)
>  {
> -    return PTR_RET(pci_host_common_probe(dev, &nwl_pcie_ops));
> +    return PTR_RET(pci_host_common_probe(dev, &nwl_pcie_ops, NULL));
>  }
>  
>  DT_DEVICE_START(pci_gen, "PCI HOST ZYNQMP", DEVICE_PCI_HOSTBRIDGE)
> diff --git a/xen/arch/arm/vpci.c b/xen/arch/arm/vpci.c
> index b63a356bb4..468aee1db7 100644
> --- a/xen/arch/arm/vpci.c
> +++ b/xen/arch/arm/vpci.c
> @@ -8,15 +8,17 @@
>  #include 
>  
>  static pci_sbdf_t vpci_sbdf_from_gpa(const struct pci_host_bridge *bridge,
> -                                     paddr_t gpa)
> +                                     paddr_t gpa, bool use_root)
>  {
>      pci_sbdf_t sbdf;
>  
>      if ( bridge )
>      {
> -        sbdf.sbdf = VPCI_ECAM_BDF(gpa - bridge->cfg->phys_addr);
> +        const struct pci_config_window *cfg = use_root ? bridge->cfg
> +                                                       : bridge->child_cfg;
> +        sbdf.sbdf = VPCI_ECAM_BDF(gpa - cfg->phys_addr);
>          sbdf.seg = bridge->segment;
> -        sbdf.bus += bridge->cfg->busn_start;
> +        sbdf.bus += cfg->busn_start;
>      }
>      else
>          sbdf.sbdf = VPCI_ECAM_BDF(gpa - GUEST_VPCI_ECAM_BASE);
> @@ -24,11 +26,9 @@ static pci_sbdf_t vpci_sbdf_from_gpa(const struct pci_host_bridge *bridge,
>      return sbdf;
>  }
>  
> -static int vpci_mmio_read(struct vcpu *v, mmio_info_t *info,
> -                          register_t *r, void *p)
> +static int vpci_mmio_read(struct vcpu *v, mmio_info_t *info, register_t *r,
> +                          pci_sbdf_t sbdf)
>  {
> -    struct pci_host_bridge *bridge = p;
> -    pci_sbdf_t sbdf = vpci_sbdf_from_gpa(bridge, info->gpa);
>      const unsigned int access_size = (1U << info->dabt.size) * 8;
>      const register_t invalid = GENMASK_ULL(access_size - 1, 0);
>      /* data is needed to prevent a pointer cast on 32bit */
> @@ -46,31 +46,78 @@ static int vpci_mmio_read(struct vcpu *v, mmio_info_t *info,
>      return 0;
>  }
>  
> -static int vpci_mmio_write(struct vcpu *v, mmio_info_t *info,
> -                           register_t r, void *p)
> +static int vpci_mmio_read_root(struct vcpu *v, mmio_info_t *info, register_t *r,
> +                               void *p)
> +{
> +    struct pci_host_bridge *bridge = p;
> +    pci_sbdf_t sbdf = vpci_sbdf_from_gpa(bridge, info->gpa, true);
> +
> +    return vpci_mmio_read(v, info, r, sbdf);
> +}
> +
> +static int vpci_mmio_read_child(struct vcpu *v, mmio_info_t *info,
> +                                register_t *r, void *p)
>  {
>      struct pci_host_bridge *bridge = p;
> -    pci_sbdf_t sbdf = vpci_sbdf_from_gpa(bridge, info->gpa);
> +    pci_sbdf_t sbdf = vpci_sbdf_from_gpa(bridge, info->gpa, false);
> +
> +    return vpci_mmio_read(v, info, r, sbdf);
> +}
>  
> +static int vpci_mmio_write(struct vcpu *v, mmio_info_t *info, register_t r,
> +                           pci_sbdf_t sbdf)
> +{
>      return vpci_ecam_write(sbdf, ECAM_REG_OFFSET(info->gpa),
>                             1U << info->dabt.size, r);
>  }
>  
> +static int vpci_mmio_write_root(struct vcpu *v, mmio_info_t *info, register_t r,
> +                                void *p)
> +{
> +    struct pci_host_bridge *bridge = p;
> +    pci_sbdf_t sbdf = vpci_sbdf_from_gpa(bridge, info->gpa, true);
> +
> +    return vpci_mmio_write(v, info, r, sbdf);
> +}
> +
> +static int vpci_mmio_write_child(struct vcpu *v, mmio_info_t *info,
> +                                 register_t r, void *p)
> +{
> +    struct pci_host_bridge *bridge = p;
> +    pci_sbdf_t sbdf = vpci_sbdf_from_gpa(bridge, info->gpa, false);
> +
> +    return vpci_mmio_write(v, info, r, sbdf);
> +}
> +
>  static const struct mmio_handler_ops vpci_mmio_handler = {
> -    .read  = vpci_mmio_read,
> -    .write = vpci_mmio_write,
> +    .read = vpci_mmio_read_root,
> +    .write = vpci_mmio_write_root,
> +};
> +
> +static const struct mmio_handler_ops vpci_mmio_handler_child = {
> +    .read = vpci_mmio_read_child,
> +    .write = vpci_mmio_write_child,
>  };
>  
>  static int vpci_setup_mmio_handler_cb(struct domain *d,
>                                        struct pci_host_bridge *bridge)
>  {
>      struct pci_config_window *cfg = bridge->cfg;
> +    int count = 1;
>  
>      register_mmio_handler(d, &vpci_mmio_handler,
>                            cfg->phys_addr, cfg->size, bridge);
>  
> -    /* We have registered a single MMIO handler. */
> -    return 1;
> +    if ( bridge->child_ops )
> +    {
> +        struct pci_config_window *cfg = bridge->child_cfg;
> +
> +        register_mmio_handler(d, &vpci_mmio_handler_child, cfg->phys_addr,
> +                              cfg->size, bridge);
> +        count++;
> +    }
> +
> +    return count;
>  }
>  
>  int domain_vpci_init(struct domain *d)
> @@ -101,8 +148,12 @@ int domain_vpci_init(struct domain *d)
>  static int vpci_get_num_handlers_cb(struct domain *d,
>                                      struct pci_host_bridge *bridge)
>  {
> -    /* Each bridge has a single MMIO handler for the configuration space. */
> -    return 1;
> +    int count = 1;
> +
> +    if ( bridge->child_cfg )
> +        count++;
> +
> +    return count;
>  }
>  
>  unsigned int domain_vpci_get_num_mmio_handlers(struct domain *d)
> -- 
> 2.34.1
> 


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Date: Fri, 18 Apr 2025 17:19:57 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Mykyta Poturai 
cc: "xen-devel@lists.xenproject.org" , 
    Oleksandr Andrushchenko , 
    Stefano Stabellini , Julien Grall , 
    Bertrand Marquis , 
    Michal Orzel , 
    Volodymyr Babchuk 
Subject: Re: [PATCH v3 1/4] xen/arm: allow PCI host bridge to have private
 data
In-Reply-To: 
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On Wed, 9 Apr 2025, Mykyta Poturai wrote:
> From: Oleksandr Andrushchenko 
> 
> Some of the PCI host bridges require private data. Add priv field
> to struct pci_host_bridge, so such bridges may populate it with
> their private data.
> 
> Signed-off-by: Oleksandr Andrushchenko 
> Signed-off-by: Mykyta Poturai 

Reviewed-by: Stefano Stabellini 


> ---
> v2->v3:
> * removed priv allocation from common code
> 
> v1->v2:
> * no change
> ---
>  xen/arch/arm/include/asm/pci.h | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/xen/arch/arm/include/asm/pci.h b/xen/arch/arm/include/asm/pci.h
> index 7f77226c9b..a87672d834 100644
> --- a/xen/arch/arm/include/asm/pci.h
> +++ b/xen/arch/arm/include/asm/pci.h
> @@ -66,6 +66,7 @@ struct pci_host_bridge {
>      uint16_t segment;                /* Segment number */
>      struct pci_config_window* cfg;   /* Pointer to the bridge config window */
>      const struct pci_ops *ops;
> +    void *priv;                      /* Private data of the bridge. */
>  };
>  
>  struct pci_ops {
> -- 
> 2.34.1
> 


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Date: Fri, 18 Apr 2025 17:20:05 -0700 (PDT)
From: Stefano Stabellini 
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To: Mykyta Poturai 
cc: "xen-devel@lists.xenproject.org" , 
    Oleksandr Andrushchenko , 
    Stefano Stabellini , Julien Grall , 
    Bertrand Marquis , 
    Michal Orzel , 
    Volodymyr Babchuk 
Subject: Re: [PATCH v3 2/4] xen/arm: make pci_host_common_probe return the
 bridge
In-Reply-To: <0abee55bcc632ba1be356461e22eca2ceb11dadd.1744203405.git.mykyta_poturai@epam.com>
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On Wed, 9 Apr 2025, Mykyta Poturai wrote:
> From: Oleksandr Andrushchenko 
> 
> Some of the PCI host bridges require additional processing during the
> probe phase. For that they need to access struct bridge of the probed
> host, so return pointer to the new bridge from pci_host_common_probe.
> 
> Signed-off-by: Oleksandr Andrushchenko 
> Signed-off-by: Mykyta Poturai 
> ---
> v2->v3:
> * no change
> 
> v1->v2:
> * no change
> ---
>  xen/arch/arm/include/asm/pci.h      |  5 +++--
>  xen/arch/arm/pci/pci-host-common.c  | 10 +++++-----
>  xen/arch/arm/pci/pci-host-generic.c |  2 +-
>  xen/arch/arm/pci/pci-host-zynqmp.c  |  2 +-
>  4 files changed, 10 insertions(+), 9 deletions(-)
> 
> diff --git a/xen/arch/arm/include/asm/pci.h b/xen/arch/arm/include/asm/pci.h
> index a87672d834..3d2ca9b5b0 100644
> --- a/xen/arch/arm/include/asm/pci.h
> +++ b/xen/arch/arm/include/asm/pci.h
> @@ -18,6 +18,7 @@
>  #ifdef CONFIG_HAS_PCI
>  
>  #include 
> +#include 
>  
>  #define pci_to_dev(pcidev) (&(pcidev)->arch.dev)
>  
> @@ -95,8 +96,8 @@ struct pci_ecam_ops {
>  /* Default ECAM ops */
>  extern const struct pci_ecam_ops pci_generic_ecam_ops;
>  
> -int pci_host_common_probe(struct dt_device_node *dev,
> -                          const struct pci_ecam_ops *ops);
> +struct pci_host_bridge *pci_host_common_probe(struct dt_device_node *dev,
> +                                              const struct pci_ecam_ops *ops);
>  int pci_generic_config_read(struct pci_host_bridge *bridge, pci_sbdf_t sbdf,
>                              uint32_t reg, uint32_t len, uint32_t *value);
>  int pci_generic_config_write(struct pci_host_bridge *bridge, pci_sbdf_t sbdf,
> diff --git a/xen/arch/arm/pci/pci-host-common.c b/xen/arch/arm/pci/pci-host-common.c
> index c0faf0f436..7ce9675551 100644
> --- a/xen/arch/arm/pci/pci-host-common.c
> +++ b/xen/arch/arm/pci/pci-host-common.c
> @@ -208,8 +208,8 @@ static int pci_bus_find_domain_nr(struct dt_device_node *dev)
>      return domain;
>  }
>  
> -int pci_host_common_probe(struct dt_device_node *dev,
> -                          const struct pci_ecam_ops *ops)
> +struct pci_host_bridge *pci_host_common_probe(struct dt_device_node *dev,
> +                                              const struct pci_ecam_ops *ops)
>  {
>      struct pci_host_bridge *bridge;
>      struct pci_config_window *cfg;
> @@ -221,7 +221,7 @@ int pci_host_common_probe(struct dt_device_node *dev,
>  
>      bridge = pci_alloc_host_bridge();
>      if ( !bridge )
> -        return -ENOMEM;
> +        return ERR_PTR(-ENOMEM);

There is a return 0 just above that needs to be changed to return NULL.


>      /* Parse and map our Configuration Space windows */
>      cfg = gen_pci_init(dev, ops);
> @@ -244,12 +244,12 @@ int pci_host_common_probe(struct dt_device_node *dev,
>      bridge->segment = domain;
>      pci_add_host_bridge(bridge);
>  
> -    return 0;
> +    return bridge;
>  
>  err_exit:
>      xfree(bridge);
>  
> -    return err;
> +    return ERR_PTR(err);
>  }
>  
>  /*
> diff --git a/xen/arch/arm/pci/pci-host-generic.c b/xen/arch/arm/pci/pci-host-generic.c
> index 46de6e43cc..a6ffbda174 100644
> --- a/xen/arch/arm/pci/pci-host-generic.c
> +++ b/xen/arch/arm/pci/pci-host-generic.c
> @@ -29,7 +29,7 @@ static const struct dt_device_match __initconstrel gen_pci_dt_match[] =
>  static int __init pci_host_generic_probe(struct dt_device_node *dev,
>                                           const void *data)
>  {
> -    return pci_host_common_probe(dev, &pci_generic_ecam_ops);
> +    return PTR_RET(pci_host_common_probe(dev, &pci_generic_ecam_ops));
>  }
>  
>  DT_DEVICE_START(pci_gen, "PCI HOST GENERIC", DEVICE_PCI_HOSTBRIDGE)
> diff --git a/xen/arch/arm/pci/pci-host-zynqmp.c b/xen/arch/arm/pci/pci-host-zynqmp.c
> index 101edb8593..a38f2e019e 100644
> --- a/xen/arch/arm/pci/pci-host-zynqmp.c
> +++ b/xen/arch/arm/pci/pci-host-zynqmp.c
> @@ -47,7 +47,7 @@ static const struct dt_device_match __initconstrel nwl_pcie_dt_match[] =
>  static int __init pci_host_generic_probe(struct dt_device_node *dev,
>                                           const void *data)
>  {
> -    return pci_host_common_probe(dev, &nwl_pcie_ops);
> +    return PTR_RET(pci_host_common_probe(dev, &nwl_pcie_ops));
>  }
>  
>  DT_DEVICE_START(pci_gen, "PCI HOST ZYNQMP", DEVICE_PCI_HOSTBRIDGE)
> -- 
> 2.34.1
> 


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Date: Sat, 19 Apr 2025 01:03:47 +0000
To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, cardoe@cardoe.com, marmarek@invisiblethingslab.com, sstabellini@kernel.org, dmukhin@ford.com
Subject: [PATCH v2 1/4] CI: unify x86 XTF test runner
Message-ID: <20250419010319.2572518-2-dmukhin@ford.com>
In-Reply-To: <20250419010319.2572518-1-dmukhin@ford.com>
References: <20250419010319.2572518-1-dmukhin@ford.com>
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From: Denis Mukhin 

Add test runner script qemu-xtf.sh which is allows any XTF x86 test to be
easily executed. Test runner is invoked from the qemu-smoke* jobs with the
hardcoded parameters.

Each x86 XTF job lead time is reduced a bit since only the test-related cod=
e
is built, not the entire XTF project.

Add .gitignore to avoid committing test artifacts by mistake.

Signed-off-by: Denis Mukhin 
---
Changes since v2:
- removed TOP
- dropped XEN_CONSOLE in favor of XEN_CMDLINE
- fixup for XTF_SRC_CONFIG
---
 automation/gitlab-ci/test.yaml                |   8 +-
 automation/scripts/.gitignore                 |   6 +
 .../scripts/include/configs/xtf-x86-64-config |   0
 automation/scripts/include/xtf-runner         | 131 ++++++++++++++++++
 automation/scripts/include/xtf-x86-64         |  31 +++++
 automation/scripts/qemu-smoke-x86-64.sh       |  26 ----
 automation/scripts/qemu-xtf.sh                |  28 ++++
 7 files changed, 200 insertions(+), 30 deletions(-)
 create mode 100644 automation/scripts/.gitignore
 create mode 100644 automation/scripts/include/configs/xtf-x86-64-config
 create mode 100644 automation/scripts/include/xtf-runner
 create mode 100644 automation/scripts/include/xtf-x86-64
 delete mode 100755 automation/scripts/qemu-smoke-x86-64.sh
 create mode 100755 automation/scripts/qemu-xtf.sh

diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yam=
l
index 5ce445b78f..3adc841335 100644
--- a/automation/gitlab-ci/test.yaml
+++ b/automation/gitlab-ci/test.yaml
@@ -659,28 +659,28 @@ qemu-alpine-x86_64-gcc:
 qemu-smoke-x86-64-gcc:
   extends: .qemu-smoke-x86-64
   script:
-    - ./automation/scripts/qemu-smoke-x86-64.sh pv 2>&1 | tee ${LOGFILE}
+    - ./automation/scripts/qemu-xtf.sh x86-64 pv64 example 2>&1 | tee ${LO=
GFILE}
   needs:
     - debian-12-x86_64-gcc-debug
=20
 qemu-smoke-x86-64-clang:
   extends: .qemu-smoke-x86-64
   script:
-    - ./automation/scripts/qemu-smoke-x86-64.sh pv 2>&1 | tee ${LOGFILE}
+    - ./automation/scripts/qemu-xtf.sh x86-64 pv64 example 2>&1 | tee ${LO=
GFILE}
   needs:
     - debian-12-x86_64-clang-debug
=20
 qemu-smoke-x86-64-gcc-pvh:
   extends: .qemu-smoke-x86-64
   script:
-    - ./automation/scripts/qemu-smoke-x86-64.sh pvh 2>&1 | tee ${LOGFILE}
+    - ./automation/scripts/qemu-xtf.sh x86-64 hvm64 example 2>&1 | tee ${L=
OGFILE}
   needs:
     - debian-12-x86_64-gcc-debug
=20
 qemu-smoke-x86-64-clang-pvh:
   extends: .qemu-smoke-x86-64
   script:
-    - ./automation/scripts/qemu-smoke-x86-64.sh pvh 2>&1 | tee ${LOGFILE}
+    - ./automation/scripts/qemu-xtf.sh x86-64 hvm64 example 2>&1 | tee ${L=
OGFILE}
   needs:
     - debian-12-x86_64-clang-debug
=20
diff --git a/automation/scripts/.gitignore b/automation/scripts/.gitignore
new file mode 100644
index 0000000000..2f2d6e1ebd
--- /dev/null
+++ b/automation/scripts/.gitignore
@@ -0,0 +1,6 @@
+!include
+
+binaries
+smoke.serial
+xen
+xtf*/
diff --git a/automation/scripts/include/configs/xtf-x86-64-config b/automat=
ion/scripts/include/configs/xtf-x86-64-config
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/automation/scripts/include/xtf-runner b/automation/scripts/inc=
lude/xtf-runner
new file mode 100644
index 0000000000..320eb65dc8
--- /dev/null
+++ b/automation/scripts/include/xtf-runner
@@ -0,0 +1,131 @@
+#!/bin/bash
+#
+# XTF test utilities.
+#
+# Environment variables:
+#   BOOT_MSG: Expected boot message
+#   FW_PREFIX: Firmware images path including '/' at the end
+#   PASSED: XTF test printout in case of a pass
+#   QEMU_PREFIX: QEMU path including '/' at the end
+#   TEST_LOG: Output log file
+#   UBOOT_CMD: U-Boot command line
+#   WORKDIR: Test working directory
+#   XEN_BINARY: Xen binary location
+#   XEN_CONSOLE: Xen console device name
+#   XTF_SRC_CONFIG: XTF config file
+#   XTF_SRC_BRANCH: XTF branch
+#   XTF_SRC_URI: XTF source code URI
+
+# Output log file
+TEST_LOG=3D"${TEST_LOG:-${XEN_ROOT}/smoke.serial}"
+# XTF test printout in case of a pass
+PASSED=3D"${PASSED:-Test result: SUCCESS}"
+# Expected boot message
+BOOT_MSG=3D"${BOOT_MSG:-Latest ChangeSet: }"
+# Test working directory
+WORKDIR=3D"${WORKDIR:-${XEN_ROOT}/binaries}"
+# XTF source code
+XTF_SRC_CONFIG=3D"${XTF_SRC_CONFIG:-include/configs/xtf-${ARCH}-config}"
+
+function die()
+{
+    set +x
+    echo "FATAL: $*" >&2
+    exit 1
+}
+
+# Build an XTF test binary.
+# $1 Test variant.
+# $2 Test name.
+function xtf_build_binary()
+{
+    local xtf_variant=3D$1
+    local xtf_name=3D$2
+    local xtf_dir=3D"xtf-${ARCH}"
+
+    # Crude check for local testing
+    if [ ! -d ${xtf_dir} ]; then
+        git clone ${XTF_SRC_URI} ${xtf_dir} -b ${XTF_SRC_BRANCH}
+    fi
+
+    make \
+        -C ${xtf_dir} \
+        -j$(nproc) \
+        $(tr '\n' ' ' < ${XTF_SRC_CONFIG}) \
+        TESTS=3Dtests/${xtf_name}
+
+    export XTF_NAME=3D"${xtf_name}"
+    export XTF_VARIANT=3D"${xtf_variant}"
+    export XTF_WORKDIR=3D"$(readlink -f ${xtf_dir})"
+    export XTF_BINARY=3D"${XTF_WORKDIR}/tests/${xtf_name}/test-${xtf_varia=
nt}-${xtf_name}"
+}
+
+# Build Xen command line for running an XTF test.
+# $1 Test variant.
+# $2 Test name.
+function xtf_build_cmdline()
+{
+    local xtf_variant=3D$1
+    local xtf_name=3D$2
+    declare -a cmdline=3D()
+
+    cmdline+=3D("${XEN_CMDLINE}")
+
+    # NB: OK to have hvm64, which is x86-only variant
+    if [[ $xtf_variant =3D=3D "hvm64" ]]; then
+        cmdline+=3D("dom0-iommu=3Dnone dom0=3Dpvh")
+    fi
+
+    export XEN_CMDLINE=3D"${cmdline[@]}"
+}
+
+# Build an XTF test environment.
+# $1 Test variant.
+# $2 Test name.
+function xtf_build_test()
+{
+    local v=3D$1
+    local xtf_name=3D$2
+    local xtf_variant=3D""
+
+    for x in ${XTF_SRC_VARIANTS}; do
+        if [[ "${x}" =3D=3D "${v}" ]]; then
+            xtf_variant=3D${v}
+            break
+        fi
+    done
+    if [[ -z $xtf_variant ]]; then
+        die "unsupported test variant '$1', supported variants: ${XTF_SRC_=
VARIANTS}"
+    fi
+
+    xtf_build_binary ${xtf_variant} ${xtf_name}
+    xtf_build_cmdline ${xtf_variant} ${xtf_name}
+}
+
+# Execute an XTF test.
+function xtf_run_test()
+{
+    rm -f ${TEST_LOG}
+    export BOOT_MSG PASSED TEST_CMD TEST_LOG UBOOT_CMD
+    ./console.exp | sed 's/\r\+$//'
+}
+
+# Setup environment and run an XTF test.
+# $1 Test variant.
+# $2 Test name.
+function xtf_test()
+{
+    # Out: FW_*, QEMU_*, XEN_{BINARY,CONSOLE}, XTF_SRC_*
+    xtf_arch_prepare
+
+    # In: XTF_SRC_*
+    # OUt: XTF_{BINARY,NAME,VARIANT,WORKDIR} and XEN_CMDLINE
+    xtf_build_test $@
+
+    # In: FW_*, QEMU_*, XTF_*, XEN_*
+    # Out: BOOT_MSG, PASSED, TEST_{CMD,LOG}, UBOOT_CMD
+    xtf_arch_setup
+
+    # In: BOOT_MSG, PASSED, TEST_{CMD,LOG}, UBOOT_CMD
+    xtf_run_test
+}
diff --git a/automation/scripts/include/xtf-x86-64 b/automation/scripts/inc=
lude/xtf-x86-64
new file mode 100644
index 0000000000..b1b0cc201e
--- /dev/null
+++ b/automation/scripts/include/xtf-x86-64
@@ -0,0 +1,31 @@
+#!/bin/bash
+#
+# XTF test utilities (x86_64).
+#
+
+# Arch-specific environment overrides.
+function xtf_arch_prepare()
+{
+    export FW_PREFIX=3D"${FW_PREFIX:-}"
+    export QEMU_PREFIX=3D"${QEMU_PREFIX:-}"
+    export XEN_BINARY=3D"${XEN_BINARY:-${WORKDIR}/xen}"
+    export XEN_CMDLINE=3D"${XEN_CMDLINE:-loglvl=3Dall noreboot console_tim=
estamps=3Dboot console=3Dcom1}"
+    export XTF_SRC_BRANCH=3D"${XTF_SRC_BRANCH:-master}"
+    export XTF_SRC_URI=3D"${XTF_SRC_URI:-https://xenbits.xen.org/git-http/=
xtf.git}"
+    export XTF_SRC_VARIANTS=3D"hvm64 pv64"
+}
+
+# Perform arch-specific XTF environment setup.
+function xtf_arch_setup()
+{
+    export TEST_CMD=3D"${QEMU_PREFIX}qemu-system-x86_64 \
+        -no-reboot \
+        -nographic \
+        -monitor none \
+        -serial stdio \
+        -m 512 \
+        -kernel ${XEN_BINARY} \
+        -initrd ${XTF_BINARY} \
+        -append \"${XEN_CMDLINE}\" \
+    "
+}
diff --git a/automation/scripts/qemu-smoke-x86-64.sh b/automation/scripts/q=
emu-smoke-x86-64.sh
deleted file mode 100755
index da0c26cc2f..0000000000
--- a/automation/scripts/qemu-smoke-x86-64.sh
+++ /dev/null
@@ -1,26 +0,0 @@
-#!/bin/bash
-
-set -ex -o pipefail
-
-# variant should be either pv or pvh
-variant=3D$1
-
-# Clone and build XTF
-git clone https://xenbits.xen.org/git-http/xtf.git
-cd xtf && make -j$(nproc) && cd -
-
-case $variant in
-    pvh) k=3Dtest-hvm64-example    extra=3D"dom0-iommu=3Dnone dom0=3Dpvh" =
;;
-    *)   k=3Dtest-pv64-example     extra=3D ;;
-esac
-
-rm -f smoke.serial
-export TEST_CMD=3D"qemu-system-x86_64 -nographic -kernel binaries/xen \
-        -initrd xtf/tests/example/$k \
-        -append \"loglvl=3Dall console=3Dcom1 noreboot console_timestamps=
=3Dboot $extra\" \
-        -m 512 -monitor none -serial stdio"
-
-export TEST_LOG=3D"smoke.serial"
-export PASSED=3D"Test result: SUCCESS"
-
-./automation/scripts/console.exp | sed 's/\r\+$//'
diff --git a/automation/scripts/qemu-xtf.sh b/automation/scripts/qemu-xtf.s=
h
new file mode 100755
index 0000000000..55c221b36d
--- /dev/null
+++ b/automation/scripts/qemu-xtf.sh
@@ -0,0 +1,28 @@
+#!/bin/bash
+#
+# XTF test runner (QEMU).
+#
+
+set -e -o pipefail
+
+if [ $# -lt 3 ]; then
+    echo "Usage: $(basename $0) ARCH XTF-VARIANT XTF-NAME"
+    exit 0
+fi
+
+export ARCH=3D"$1"
+shift
+
+set -x
+
+export XEN_ROOT=3D"${PWD}"
+cd $(dirname $0)
+
+source include/xtf-runner
+
+if [ ! -f "include/xtf-${ARCH}" ]; then
+    die "unsupported architecture '${ARCH}'"
+fi
+source include/xtf-${ARCH}
+
+xtf_test $@
--=20
2.34.1




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Date: Sat, 19 Apr 2025 01:03:42 +0000
To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, cardoe@cardoe.com, marmarek@invisiblethingslab.com, sstabellini@kernel.org, dmukhin@ford.com
Subject: [PATCH v2 0/4] CI: updates to XTF CI runners
Message-ID: <20250419010319.2572518-1-dmukhin@ford.com>
Feedback-ID: 123220910:user:proton
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The series started from adding new argo XTF CI job and ended up with updati=
ng
all XTF runners and related CI jobs.

It unifies the XTF runner scripts so that it is possible to use one script =
for
executing any XTF test under QEMU. That simplifies running XTFs locally and=
 in
CI.

Patch 1 reworks x86 XTF runner.
Patch 2 reworks x86 EFI XTF.
Patch 3 reworks Arm64 XTF runner.
Patch 4 adds new argo x86 XTF CI job.

CI run: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines/17760=
14231

Denis Mukhin (4):
  CI: unify x86 XTF test runner
  CI: switch x86 EFI smoke test runner to qemu-xtf.sh
  CI: switch arm64 XTF test runner to qemu-xtf.sh
  CI: add argo x86 XTF test

 automation/gitlab-ci/test.yaml                |  23 ++-
 automation/scripts/.gitignore                 |   9 ++
 .../scripts/include/configs/xtf-arm64-config  |   2 +
 .../scripts/include/configs/xtf-x86-64-config |   0
 .../include/configs/xtf-x86-64-efi-config     |   0
 automation/scripts/include/xtf-arm64          |  81 ++++++++++
 automation/scripts/include/xtf-runner         | 138 ++++++++++++++++++
 automation/scripts/include/xtf-x86-64         |  31 ++++
 automation/scripts/include/xtf-x86-64-efi     |  52 +++++++
 automation/scripts/qemu-smoke-x86-64-efi.sh   |  43 ------
 automation/scripts/qemu-smoke-x86-64.sh       |  26 ----
 automation/scripts/qemu-xtf-dom0less-arm64.sh |  68 ---------
 automation/scripts/qemu-xtf.sh                |  28 ++++
 13 files changed, 357 insertions(+), 144 deletions(-)
 create mode 100644 automation/scripts/.gitignore
 create mode 100644 automation/scripts/include/configs/xtf-arm64-config
 create mode 100644 automation/scripts/include/configs/xtf-x86-64-config
 create mode 100644 automation/scripts/include/configs/xtf-x86-64-efi-confi=
g
 create mode 100644 automation/scripts/include/xtf-arm64
 create mode 100644 automation/scripts/include/xtf-runner
 create mode 100644 automation/scripts/include/xtf-x86-64
 create mode 100644 automation/scripts/include/xtf-x86-64-efi
 delete mode 100755 automation/scripts/qemu-smoke-x86-64-efi.sh
 delete mode 100755 automation/scripts/qemu-smoke-x86-64.sh
 delete mode 100755 automation/scripts/qemu-xtf-dom0less-arm64.sh
 create mode 100755 automation/scripts/qemu-xtf.sh

--=20
2.34.1




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Date: Sat, 19 Apr 2025 01:03:51 +0000
To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, cardoe@cardoe.com, marmarek@invisiblethingslab.com, sstabellini@kernel.org, dmukhin@ford.com
Subject: [PATCH v2 2/4] CI: switch x86 EFI smoke test runner to qemu-xtf.sh
Message-ID: <20250419010319.2572518-3-dmukhin@ford.com>
In-Reply-To: <20250419010319.2572518-1-dmukhin@ford.com>
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From: Denis Mukhin 

Use qemu-xtf.sh for qemu-smoke-x86-64-gcc-efi job.

Lead time is reduced a bit since not all XTF code base is built, just the
required test.

Signed-off-by: Denis Mukhin 
---
Changes since v2:
- removed TOP
- dropped XEN_CONSOLE in favor of XEN_CMDLINE
---
 automation/gitlab-ci/test.yaml                |  2 +-
 .../include/configs/xtf-x86-64-efi-config     |  0
 automation/scripts/include/xtf-x86-64-efi     | 52 +++++++++++++++++++
 automation/scripts/qemu-smoke-x86-64-efi.sh   | 43 ---------------
 4 files changed, 53 insertions(+), 44 deletions(-)
 create mode 100644 automation/scripts/include/configs/xtf-x86-64-efi-confi=
g
 create mode 100644 automation/scripts/include/xtf-x86-64-efi
 delete mode 100755 automation/scripts/qemu-smoke-x86-64-efi.sh

diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yam=
l
index 3adc841335..ca1e4eb528 100644
--- a/automation/gitlab-ci/test.yaml
+++ b/automation/gitlab-ci/test.yaml
@@ -687,7 +687,7 @@ qemu-smoke-x86-64-clang-pvh:
 qemu-smoke-x86-64-gcc-efi:
   extends: .qemu-smoke-x86-64
   script:
-    - ./automation/scripts/qemu-smoke-x86-64-efi.sh pv 2>&1 | tee ${LOGFIL=
E}
+    - ./automation/scripts/qemu-xtf.sh x86-64-efi hvm64 example 2>&1 | tee=
 ${LOGFILE}
   needs:
     - debian-12-x86_64-gcc-debug
=20
diff --git a/automation/scripts/include/configs/xtf-x86-64-efi-config b/aut=
omation/scripts/include/configs/xtf-x86-64-efi-config
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/automation/scripts/include/xtf-x86-64-efi b/automation/scripts=
/include/xtf-x86-64-efi
new file mode 100644
index 0000000000..e0d821b3f6
--- /dev/null
+++ b/automation/scripts/include/xtf-x86-64-efi
@@ -0,0 +1,52 @@
+#!/bin/bash
+#
+# XTF test utilities (x86_64, EFI).
+#
+
+# Arch-specific environment overrides.
+function xtf_arch_prepare()
+{
+    export FW_PREFIX=3D"${FW_PREFIX:-/usr/share/OVMF/}"
+    export QEMU_PREFIX=3D"${QEMU_PREFIX:-}"
+    export XEN_BINARY=3D"${XEN_BINARY:-${WORKDIR}/xen.efi}"
+    export XEN_CMDLINE=3D"${XEN_CMDLINE:-loglvl=3Dall noreboot console_tim=
estamps=3Dboot console=3Dcom1}"
+    export XTF_SRC_BRANCH=3D"${XTF_SRC_BRANCH:-master}"
+    export XTF_SRC_URI=3D"${XTF_SRC_URI:-https://xenbits.xen.org/git-http/=
xtf.git}"
+    export XTF_SRC_VARIANTS=3D"hvm64 pv64"
+}
+
+# Perform arch-specific XTF environment setup.
+function xtf_arch_setup()
+{
+    local esp_dir=3D"${WORKDIR}/boot-esp"
+    local efi_dir=3D"${esp_dir}/EFI/BOOT"
+
+    # Generate EFI boot environment
+    mkdir -p ${efi_dir}
+    cp ${XEN_BINARY} ${efi_dir}/BOOTX64.EFI
+    cp ${XTF_BINARY} ${efi_dir}/kernel
+
+    cat > ${efi_dir}/BOOTX64.cfg < boot-esp/EFI/BOOT/BOOTX64.cfg <
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Date: Sat, 19 Apr 2025 01:03:57 +0000
To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, cardoe@cardoe.com, marmarek@invisiblethingslab.com, sstabellini@kernel.org, dmukhin@ford.com
Subject: [PATCH v2 3/4] CI: switch arm64 XTF test runner to qemu-xtf.sh
Message-ID: <20250419010319.2572518-4-dmukhin@ford.com>
In-Reply-To: <20250419010319.2572518-1-dmukhin@ford.com>
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From: Denis Mukhin 

Hook arm64 QEMU configuration to qemu-xtf.sh and use new script in arm64 CI
jobs.

Signed-off-by: Denis Mukhin 
Reviewed-by: Stefano Stabellini 
---
Changes since v2:
- removed TOP
- dropped XEN_CONSOLE in favor of XEN_CMDLINE
- I kept Stefano's R-b since the change was trivial
---
 automation/gitlab-ci/test.yaml                |  4 +-
 automation/scripts/.gitignore                 |  3 +
 .../scripts/include/configs/xtf-arm64-config  |  2 +
 automation/scripts/include/xtf-arm64          | 81 +++++++++++++++++++
 automation/scripts/qemu-xtf-dom0less-arm64.sh | 68 ----------------
 5 files changed, 88 insertions(+), 70 deletions(-)
 create mode 100644 automation/scripts/include/configs/xtf-arm64-config
 create mode 100644 automation/scripts/include/xtf-arm64
 delete mode 100755 automation/scripts/qemu-xtf-dom0less-arm64.sh

diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yam=
l
index ca1e4eb528..d6e4a0a622 100644
--- a/automation/gitlab-ci/test.yaml
+++ b/automation/gitlab-ci/test.yaml
@@ -571,7 +571,7 @@ qemu-smoke-dom0less-arm64-gcc-debug-earlyprintk:
 qemu-xtf-dom0less-arm64-gcc-hyp-xen-version:
   extends: .qemu-arm64
   script:
-    - ./automation/scripts/qemu-xtf-dom0less-arm64.sh hyp-xen-version 2>&1=
 | tee ${LOGFILE}
+    - ./automation/scripts/qemu-xtf.sh arm64 mmu64le hyp-xen-version 2>&1 =
| tee ${LOGFILE}
   needs:
     - alpine-3.18-gcc-arm64
     - qemu-system-aarch64-6.0.0-arm64-export
@@ -579,7 +579,7 @@ qemu-xtf-dom0less-arm64-gcc-hyp-xen-version:
 qemu-xtf-dom0less-arm64-gcc-debug-hyp-xen-version:
   extends: .qemu-arm64
   script:
-    - ./automation/scripts/qemu-xtf-dom0less-arm64.sh hyp-xen-version 2>&1=
 | tee ${LOGFILE}
+    - ./automation/scripts/qemu-xtf.sh arm64 mmu64le hyp-xen-version 2>&1 =
| tee ${LOGFILE}
   needs:
     - alpine-3.18-gcc-debug-arm64
     - qemu-system-aarch64-6.0.0-arm64-export
diff --git a/automation/scripts/.gitignore b/automation/scripts/.gitignore
index 2f2d6e1ebd..f853da4d89 100644
--- a/automation/scripts/.gitignore
+++ b/automation/scripts/.gitignore
@@ -1,6 +1,9 @@
 !include
=20
 binaries
+imagebuilder
 smoke.serial
 xen
 xtf*/
+
+*.rom
diff --git a/automation/scripts/include/configs/xtf-arm64-config b/automati=
on/scripts/include/configs/xtf-arm64-config
new file mode 100644
index 0000000000..9942740927
--- /dev/null
+++ b/automation/scripts/include/configs/xtf-arm64-config
@@ -0,0 +1,2 @@
+CONFIG_GICV2=3Dy
+CONFIG_SBSA_UART=3Dy
diff --git a/automation/scripts/include/xtf-arm64 b/automation/scripts/incl=
ude/xtf-arm64
new file mode 100644
index 0000000000..1a318b7aa0
--- /dev/null
+++ b/automation/scripts/include/xtf-arm64
@@ -0,0 +1,81 @@
+#!/bin/bash
+#
+# XTF test utilities (arm64).
+#
+
+# Arch-specific environment overrides.
+function xtf_arch_prepare()
+{
+    export FW_PREFIX=3D"${FW_PREFIX:-/usr/lib/u-boot/qemu_arm64/}"
+    export QEMU_PREFIX=3D"${QEMU_PREFIX:-${WORKDIR}/}"
+    export XEN_BINARY=3D"${XEN_BINARY:-${WORKDIR}/xen}"
+    export XEN_CMDLINE=3D"${XEN_CMDLINE:-loglvl=3Dall noreboot console_tim=
estamps=3Dboot console=3Ddtuart}"
+    export XTF_SRC_BRANCH=3D"${XTF_SRC_BRANCH:-xtf-arm}"
+    export XTF_SRC_URI=3D"${XTF_SRC_URI:-https://gitlab.com/xen-project/fu=
sa/xtf.git}"
+    export XTF_SRC_VARIANTS=3D"mmu64le"
+}
+
+# Perform arch-specific XTF environment setup.
+function xtf_arch_setup()
+{
+    # QEMU looks for "efi-virtio.rom" even if it is unneeded
+    curl -fsSLO https://github.com/qemu/qemu/raw/v5.2.0/pc-bios/efi-virtio=
.rom
+
+    # Crude check for local testing
+    if [ ! -d imagebuilder ]; then
+        git clone --depth 1 https://gitlab.com/xen-project/imagebuilder.gi=
t
+    fi
+
+    cat > ${WORKDIR}/config < binaries/config
-
-rm -rf imagebuilder
-git clone --depth 1 https://gitlab.com/xen-project/imagebuilder.git
-bash imagebuilder/scripts/uboot-script-gen -t tftp -d binaries/ -c binarie=
s/config
-
-# Run the test
-rm -f smoke.serial
-export TEST_CMD=3D"./binaries/qemu-system-aarch64 \
-    -machine virtualization=3Dtrue \
-    -cpu cortex-a57 -machine type=3Dvirt \
-    -m 2048 -monitor none -serial stdio \
-    -smp 2 \
-    -no-reboot \
-    -device virtio-net-pci,netdev=3Dn0 \
-    -netdev user,id=3Dn0,tftp=3Dbinaries \
-    -bios /usr/lib/u-boot/qemu_arm64/u-boot.bin"
-
-export UBOOT_CMD=3D"virtio scan; dhcp; tftpb 0x40000000 boot.scr; source 0=
x40000000"
-export BOOT_MSG=3D"Latest ChangeSet: "
-export TEST_LOG=3D"smoke.serial"
-export PASSED=3D"${passed}"
-
-./automation/scripts/console.exp | sed 's/\r\+$//'
--=20
2.34.1




From xen-devel-bounces@lists.xenproject.org Sat Apr 19 01:04:12 2025
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Date: Sat, 19 Apr 2025 01:04:03 +0000
To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, cardoe@cardoe.com, marmarek@invisiblethingslab.com, sstabellini@kernel.org, dmukhin@ford.com
Subject: [PATCH v2 4/4] CI: add argo x86 XTF test
Message-ID: <20250419010319.2572518-5-dmukhin@ford.com>
In-Reply-To: <20250419010319.2572518-1-dmukhin@ford.com>
References: <20250419010319.2572518-1-dmukhin@ford.com>
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From: Denis Mukhin 

Introduce new CI job to run x86 XTF argo test under QEMU to smoke test argo
feature functionality in upstream CI.

The new job lead time is ~30s, limit max job duration to 60s.

Signed-off-by: Denis Mukhin 
---
Depends on
   https://lore.kernel.org/xen-devel/20250416050443.919751-1-dmukhin@ford.c=
om/
---
 automation/gitlab-ci/test.yaml        | 9 +++++++++
 automation/scripts/include/xtf-runner | 7 +++++++
 2 files changed, 16 insertions(+)

diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yam=
l
index d6e4a0a622..9001efb45c 100644
--- a/automation/gitlab-ci/test.yaml
+++ b/automation/gitlab-ci/test.yaml
@@ -691,6 +691,15 @@ qemu-smoke-x86-64-gcc-efi:
   needs:
     - debian-12-x86_64-gcc-debug
=20
+qemu-xtf-argo-x86_64-gcc-debug:
+  extends: .qemu-smoke-x86-64
+  variables:
+    TEST_TIMEOUT_OVERRIDE: 60
+  script:
+    - ./automation/scripts/qemu-xtf.sh x86-64 pv64 argo 2>&1 | tee ${LOGFI=
LE}
+  needs:
+    - alpine-3.18-gcc-debug
+
 qemu-smoke-riscv64-gcc:
   extends: .qemu-riscv64
   script:
diff --git a/automation/scripts/include/xtf-runner b/automation/scripts/inc=
lude/xtf-runner
index 320eb65dc8..b7fea52dad 100644
--- a/automation/scripts/include/xtf-runner
+++ b/automation/scripts/include/xtf-runner
@@ -68,6 +68,9 @@ function xtf_build_cmdline()
     local xtf_variant=3D$1
     local xtf_name=3D$2
     declare -a cmdline=3D()
+    declare -A per_test_args=3D(
+        [argo]=3D"argo=3D1 mac-permissive=3D1"
+    )
=20
     cmdline+=3D("${XEN_CMDLINE}")
=20
@@ -76,6 +79,10 @@ function xtf_build_cmdline()
         cmdline+=3D("dom0-iommu=3Dnone dom0=3Dpvh")
     fi
=20
+    if [[ -v per_test_args[${xtf_name}] ]]; then
+        cmdline+=3D("${per_test_args[${xtf_name}]}")
+    fi
+
     export XEN_CMDLINE=3D"${cmdline[@]}"
 }
=20
--=20
2.34.1




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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 02/38] x86/hyperlaunch: correct the naming of domain ramdisk field
Date: Sat, 19 Apr 2025 18:07:44 -0400
Message-Id: <20250419220820.4234-3-dpsmith@apertussolutions.com>
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The ramdisk field was incorrectly renamed to module without providing a sound
justification. Doing so creates an unnecessary indirection that can cause more
confusion than utility. The only way the field is populated is via a match of a
boot module of type BOOTMOD_RAMDISK. All usages of the field are cast into a
variables named initrd. The attempt to generalize the field name under the
guise that it could be multiplexed for other module types did so without a
valid usage. The result is there is no consideration of how that multiplexing
would even work or be deconflict with the simultaneous presence of a ramdisk.

Moving the field name back to ramdisk to make the current code flow logical. At
a later time should there be a use case that arises where additional modules
need to be passed to a domain, a more appropriate framework will be crafted
that will like be more complicated than just renaming the field to something
other than ramdisk.

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/domain-builder/fdt.c      | 4 ++--
 xen/arch/x86/hvm/dom0_build.c          | 2 +-
 xen/arch/x86/include/asm/boot-domain.h | 2 +-
 xen/arch/x86/pv/dom0_build.c           | 2 +-
 xen/arch/x86/setup.c                   | 2 +-
 5 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/xen/arch/x86/domain-builder/fdt.c b/xen/arch/x86/domain-builder/fdt.c
index dbfbcffb0a9c..d2a7e010ea77 100644
--- a/xen/arch/x86/domain-builder/fdt.c
+++ b/xen/arch/x86/domain-builder/fdt.c
@@ -310,7 +310,7 @@ static int __init process_domain_node(
         {
             int idx;
 
-            if ( bd->module )
+            if ( bd->ramdisk )
             {
                 printk(XENLOG_ERR "Duplicate ramdisk module for domain %s)\n",
                        name);
@@ -328,7 +328,7 @@ static int __init process_domain_node(
 
             printk("  ramdisk: boot module %d\n", idx);
             bi->mods[idx].type = BOOTMOD_RAMDISK;
-            bd->module = &bi->mods[idx];
+            bd->ramdisk = &bi->mods[idx];
 
             continue;
         }
diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build.c
index ebad5a49b8d4..176b253d3c61 100644
--- a/xen/arch/x86/hvm/dom0_build.c
+++ b/xen/arch/x86/hvm/dom0_build.c
@@ -648,7 +648,7 @@ static int __init pvh_load_kernel(
 {
     struct domain *d = bd->d;
     struct boot_module *image = bd->kernel;
-    struct boot_module *initrd = bd->module;
+    struct boot_module *initrd = bd->ramdisk;
     void *image_base = bootstrap_map_bm(image);
     void *image_start = image_base + image->headroom;
     unsigned long image_len = image->size;
diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/include/asm/boot-domain.h
index 29a7d806de1a..b0f956cd734e 100644
--- a/xen/arch/x86/include/asm/boot-domain.h
+++ b/xen/arch/x86/include/asm/boot-domain.h
@@ -29,7 +29,7 @@ struct boot_domain {
     unsigned int max_vcpus;
 
     struct boot_module *kernel;
-    struct boot_module *module;
+    struct boot_module *ramdisk;
     const char *cmdline;
 
     struct domain *d;
diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c
index e1b78d47c218..3b2baf057b75 100644
--- a/xen/arch/x86/pv/dom0_build.c
+++ b/xen/arch/x86/pv/dom0_build.c
@@ -375,7 +375,7 @@ static int __init dom0_construct(const struct boot_domain *bd)
     struct vcpu *v = d->vcpu[0];
 
     struct boot_module *image = bd->kernel;
-    struct boot_module *initrd = bd->module;
+    struct boot_module *initrd = bd->ramdisk;
     void *image_base;
     unsigned long image_len;
     void *image_start;
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 1e7bbc415e1d..6a939ccede3f 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -2165,7 +2165,7 @@ void asmlinkage __init noreturn __start_xen(void)
     if ( !bi->hyperlaunch_enabled && initrdidx < MAX_NR_BOOTMODS )
     {
         bi->mods[initrdidx].type = BOOTMOD_RAMDISK;
-        bi->domains[0].module = &bi->mods[initrdidx];
+        bi->domains[0].ramdisk = &bi->mods[initrdidx];
         if ( first_boot_module_index(bi, BOOTMOD_UNKNOWN) < MAX_NR_BOOTMODS )
             printk(XENLOG_WARNING
                    "Multiple initrd candidates, picking module #%u\n",
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [RFC 01/38] maintainers: add new section for hyperlaunch
Date: Sat, 19 Apr 2025 18:07:43 -0400
Message-Id: <20250419220820.4234-2-dpsmith@apertussolutions.com>
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Add new section to MAINTAINERS for hyperlaunch, including the files
specifically added to this point under the hyperlaunch work.

Signed-off-by: Daniel P. Smith 
---
 MAINTAINERS | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index c11b82eca98f..7de671efe512 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -343,6 +343,15 @@ F:	tools/misc/xenhypfs.c
 F:	xen/common/hypfs.c
 F:	xen/include/xen/hypfs.h
 
+HYPERLAUNCH
+M:	Daniel P. Smith 
+M:	Christopher Clark 
+S:	Supported
+F:	xen/x86/domain-builder/
+F:	xen/x86/include/asm/bootinfo.h
+F:	xen/x86/include/asm/boot-domain.h
+F:	xen/x86/include/asm/domain-builder.h
+
 IMX8QM/QXP SUPPORT
 R:	John Ernberg 
 F:	xen/arch/arm/platforms/imx8qm.c
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	christopher.w.clark@gmail.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com
Subject: [RFC 00/38] Hyperlaunch domain builder
Date: Sat, 19 Apr 2025 18:07:42 -0400
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NOTE: Sending this series as an RFC as it is a follow-on to the hyperlaunch
dom0 device tree series going through rounds of review right now. This specific
iteration is based off of v3 with the exception of one fix found here and
already incorporated into v4.

The Hyperlaunch domain builder series is the third split out for the
introduction of the Hyperlaunch domain builder logic. These changes focus on
introducing the ability to create multiple PVH domains at boot. The definition
for those domains will come from the Device Tree capability introduced in the
dom0 device tree series.

Documentation on Hyperlaunch:
https://wiki.xenproject.org/wiki/Hyperlaunch

Original Hyperlaunch v1 patch series:
https://lists.xenproject.org/archives/html/xen-devel/2022-07/msg00345.html

V/r,
Daniel P. Smith

Daniel P. Smith (38):
  maintainers: add new section for hyperlaunch
  x86/hyperlaunch: correct the naming of domain ramdisk field
  x86/hyperlaunch: convert max vcpu determination to domain builder
  x86/hyperlaunch: convert vcpu0 creation to domain builder
  x86/hyperlaunch: move dom0 cpuid policy behind capability check
  x86/hyperlaunch: add hardware domain capability support
  x86/hyperlaunch: introduce pvh domain builder
  x86/hyperlaunch: move initial hwdom setup to dom_construct_pvh
  x86/boot: convert dom0 page calculation to use boot domain
  x86/boot: refactor dom0 page calculation
  x86/boot: generalize paging pages calculation
  x86/boot: generalize compute number of domain pages
  x86/hyperlaunch: move page computation to domain builder
  x86/hyperlaunch: move pvh p2m init to domain builder
  x86/hyperlaunch: move iommu init to domain builder
  x86/boot: move and rename sched_setup_dom0_vcpus
  x86/hyperlaunch: move pvh_setup_cpus to domain builder
  x86/boot: rename pvh acpi setup function
  x86/hyperlaunch: add domu memory map construction
  x86/hyperlaunch: move populating p2m under domain builder
  x86/hyperlaunch: move remaining pvh dom0 construction
  x86/hyperlaunch: relocate pvh_steal_ram to domain builder
  x86/hyperlaunch: add domu acpi construction
  x86/boot: export command line processing
  x86/hyperlaunch: convert create_dom0 to arch_create_dom
  x86/hyperlaunch: remove dom0-isms from arch_create_dom
  x86/hyperlaunch: introduce domain builder general dom creation
  x86/hyperlaunch: add xenstore boot capabilities flag
  x86/hyperlaunch: allocate console for domu
  x86/hyperlaunch: allocate xenstore for domu
  x86/hyperlaunch: move boot module discard to domain builder
  x86/hyperlaunch: introduce concept of core domains
  x86/boot: refactor bzimage parser to be re-enterant
  x86/hyperlaunch: introduce multidomain kconfig option
  x86/hyperlaunch: add multidomain construction logic
  x86/hyperlaunch: enable unpausing mulitple domains
  x86/hyperlaunch: generalize domid assignment
  tools: introduce hyperlaunch domain late init

 .gitignore                                |    1 +
 MAINTAINERS                               |    9 +
 tools/helpers/Makefile                    |   12 +
 tools/helpers/late-init-domains.c         |  364 +++++++
 tools/helpers/late-init-domains.h         |   18 +
 tools/helpers/xs-helpers.c                |  117 +++
 tools/helpers/xs-helpers.h                |   26 +
 xen/arch/x86/bzimage.c                    |   38 +-
 xen/arch/x86/dom0_build.c                 |  120 +--
 xen/arch/x86/domain-builder/Kconfig       |   12 +
 xen/arch/x86/domain-builder/Makefile      |    1 +
 xen/arch/x86/domain-builder/core.c        |  127 ++-
 xen/arch/x86/domain-builder/domain.c      |  421 ++++++++
 xen/arch/x86/domain-builder/fdt.c         |   37 +-
 xen/arch/x86/hvm/Makefile                 |    1 +
 xen/arch/x86/hvm/dom0_build.c             |  600 +-----------
 xen/arch/x86/hvm/dom_build.c              | 1063 +++++++++++++++++++++
 xen/arch/x86/include/asm/boot-domain.h    |   21 +-
 xen/arch/x86/include/asm/bootinfo.h       |   28 +-
 xen/arch/x86/include/asm/bzimage.h        |    5 +-
 xen/arch/x86/include/asm/dom0_build.h     |   19 +-
 xen/arch/x86/include/asm/domain-builder.h |   29 +
 xen/arch/x86/include/asm/setup.h          |    4 +-
 xen/arch/x86/pv/dom0_build.c              |   19 +-
 xen/arch/x86/setup.c                      |  207 +---
 xen/common/sched/core.c                   |   12 -
 xen/include/xen/sched.h                   |    1 -
 27 files changed, 2412 insertions(+), 900 deletions(-)
 create mode 100644 tools/helpers/late-init-domains.c
 create mode 100644 tools/helpers/late-init-domains.h
 create mode 100644 tools/helpers/xs-helpers.c
 create mode 100644 tools/helpers/xs-helpers.h
 create mode 100644 xen/arch/x86/domain-builder/domain.c
 create mode 100644 xen/arch/x86/hvm/dom_build.c

-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 03/38] x86/hyperlaunch: convert max vcpu determination to domain builder
Date: Sat, 19 Apr 2025 18:07:45 -0400
Message-Id: <20250419220820.4234-4-dpsmith@apertussolutions.com>
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The domain configuration may request more vcpus than are present in the system.
For dom0, the function dom0_max_vcpus() was used to clamp down to physically
available vcpus. Here we are introducing a generalized version,
dom_max_vcpus(), that takes a boot domain and sets the max vcpus based on the
lesser of the requested max and the available vcpus.

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/domain-builder/Makefile      |  1 +
 xen/arch/x86/domain-builder/domain.c      | 38 +++++++++++++++++++++++
 xen/arch/x86/include/asm/domain-builder.h |  1 +
 xen/arch/x86/setup.c                      |  4 +--
 4 files changed, 42 insertions(+), 2 deletions(-)
 create mode 100644 xen/arch/x86/domain-builder/domain.c

diff --git a/xen/arch/x86/domain-builder/Makefile b/xen/arch/x86/domain-builder/Makefile
index b10cd56b286b..67024b5cb213 100644
--- a/xen/arch/x86/domain-builder/Makefile
+++ b/xen/arch/x86/domain-builder/Makefile
@@ -1,2 +1,3 @@
 obj-$(CONFIG_DOMAIN_BUILDER) += fdt.init.o
 obj-y += core.init.o
+obj-y += domain.init.o
diff --git a/xen/arch/x86/domain-builder/domain.c b/xen/arch/x86/domain-builder/domain.c
new file mode 100644
index 000000000000..f2277b9e3cf3
--- /dev/null
+++ b/xen/arch/x86/domain-builder/domain.c
@@ -0,0 +1,38 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (C) 2024, Apertus Solutions, LLC
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+unsigned int __init dom_max_vcpus(struct boot_domain *bd)
+{
+    unsigned int limit = bd->mode & BUILD_MODE_PARAVIRT ?
+                                    MAX_VIRT_CPUS : HVM_MAX_VCPUS;
+
+    if ( bd->capabilities & BUILD_CAPS_CONTROL )
+        limit = dom0_max_vcpus();
+    else
+        limit = min(limit,
+                    (uint32_t)cpumask_weight(cpupool_valid_cpus(cpupool0)));
+
+    if ( bd->max_vcpus == 0 || bd->max_vcpus > limit )
+        bd->max_vcpus = limit;
+
+    return bd->max_vcpus;
+}
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * tab-width: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/arch/x86/include/asm/domain-builder.h b/xen/arch/x86/include/asm/domain-builder.h
index 7518b6ddf3b9..f37f73e2255b 100644
--- a/xen/arch/x86/include/asm/domain-builder.h
+++ b/xen/arch/x86/include/asm/domain-builder.h
@@ -8,5 +8,6 @@ int __init builder_get_cmdline(
     struct boot_info *bi, int offset, char *cmdline, size_t size);
 
 void builder_init(struct boot_info *bi);
+unsigned int dom_max_vcpus(struct boot_domain *bd);
 
 #endif
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 6a939ccede3f..86bbd7c72ccd 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -1010,18 +1010,18 @@ static struct domain *__init create_dom0(struct boot_info *bi)
     char *cmdline = NULL;
     size_t cmdline_size;
     unsigned int create_flags = 0;
+    struct boot_domain *bd = &bi->domains[0];
     struct xen_domctl_createdomain dom0_cfg = {
         .flags = IS_ENABLED(CONFIG_TBOOT) ? XEN_DOMCTL_CDF_s3_integrity : 0,
         .max_evtchn_port = -1,
         .max_grant_frames = -1,
         .max_maptrack_frames = -1,
         .grant_opts = XEN_DOMCTL_GRANT_version(opt_gnttab_max_version),
-        .max_vcpus = dom0_max_vcpus(),
+        .max_vcpus = dom_max_vcpus(bd),
         .arch = {
             .misc_flags = opt_dom0_msr_relaxed ? XEN_X86_MSR_RELAXED : 0,
         },
     };
-    struct boot_domain *bd = &bi->domains[0];
     struct domain *d;
 
     if ( opt_dom0_pvh ||
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 11/38] x86/boot: generalize paging pages calculation
Date: Sat, 19 Apr 2025 18:07:53 -0400
Message-Id: <20250419220820.4234-12-dpsmith@apertussolutions.com>
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Modeling after libxl__get_required_paging_memory(), refactor
dom0_paging_pages() to calculate the number of paging pages required for a
domain that is not the control or hardware domain. As the function is being
refactored, rename to dom_paging_pages() and move under the domain builder.

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/dom0_build.c                 | 17 +----------------
 xen/arch/x86/domain-builder/domain.c      | 20 ++++++++++++++++++++
 xen/arch/x86/hvm/dom0_build.c             |  3 ++-
 xen/arch/x86/include/asm/dom0_build.h     |  3 ---
 xen/arch/x86/include/asm/domain-builder.h |  3 +++
 xen/arch/x86/pv/dom0_build.c              |  3 ++-
 6 files changed, 28 insertions(+), 21 deletions(-)

diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c
index a007e424bbe3..1413e8c634a7 100644
--- a/xen/arch/x86/dom0_build.c
+++ b/xen/arch/x86/dom0_build.c
@@ -305,21 +305,6 @@ boolean_param("ro-hpet", ro_hpet);
 
 unsigned int __initdata dom0_memflags = MEMF_no_dma|MEMF_exact_node;
 
-unsigned long __init dom0_paging_pages(const struct domain *d,
-                                       unsigned long nr_pages)
-{
-    /* Keep in sync with libxl__get_required_paging_memory(). */
-    unsigned long memkb = nr_pages * (PAGE_SIZE / 1024);
-
-    memkb = 4 * (256 * d->max_vcpus +
-                 (is_pv_domain(d) ? opt_dom0_shadow || opt_pv_l1tf_hwdom
-                                  : 1 + opt_dom0_shadow) *
-                 (memkb / 1024));
-
-    return DIV_ROUND_UP(memkb, 1024) << (20 - PAGE_SHIFT);
-}
-
-
 /*
  * If allocation isn't specified, reserve 1/16th of available memory for
  * things like DMA buffers. This reservation is clamped to a maximum of 128MB.
@@ -431,7 +416,7 @@ unsigned long __init dom0_compute_nr_pages(
          */
         calculate_dom0_pages(bd, avail);
 
-        cpu_pages = dom0_paging_pages(d, bd->mem_pages);
+        cpu_pages = dom_paging_pages(bd, bd->mem_pages);
 
         if ( !iommu_use_hap_pt(d) )
             avail -= cpu_pages;
diff --git a/xen/arch/x86/domain-builder/domain.c b/xen/arch/x86/domain-builder/domain.c
index 619d36ea0b87..87f538ae26c5 100644
--- a/xen/arch/x86/domain-builder/domain.c
+++ b/xen/arch/x86/domain-builder/domain.c
@@ -10,6 +10,26 @@
 
 #include 
 #include 
+#include 
+#include 
+
+unsigned long __init dom_paging_pages(
+    const struct boot_domain *bd, unsigned long nr_pages)
+{
+    /* Keep in sync with libxl__get_required_paging_memory(). */
+    unsigned long memkb = bd->mem_pages * (PAGE_SIZE / 1024);
+    unsigned long factor = 0;
+
+    if ( bd->capabilities & (BUILD_CAPS_CONTROL | BUILD_CAPS_HARDWARE) )
+        factor = is_pv_domain(bd->d) ? opt_dom0_shadow || opt_pv_l1tf_hwdom
+                                     : 1 + opt_dom0_shadow;
+    else
+        factor = !is_pv_domain(bd->d) + !paging_mode_hap(bd->d);
+
+    memkb = 4 * (256 * bd->d->max_vcpus + (factor * (memkb / 1024)));
+
+    return DIV_ROUND_UP(memkb, 1024) << (20 - PAGE_SHIFT);
+}
 
 unsigned int __init dom_max_vcpus(struct boot_domain *bd)
 {
diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build.c
index a818a9a772ed..d3ad90348a1f 100644
--- a/xen/arch/x86/hvm/dom0_build.c
+++ b/xen/arch/x86/hvm/dom0_build.c
@@ -19,6 +19,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -406,7 +407,7 @@ static void __init pvh_init_p2m(struct boot_domain *bd)
     pvh_setup_e820(bd->d, nr_pages);
     do {
         preempted = false;
-        paging_set_allocation(bd->d, dom0_paging_pages(bd->d, nr_pages),
+        paging_set_allocation(bd->d, dom_paging_pages(bd, nr_pages),
                               &preempted);
         process_pending_softirqs();
     } while ( preempted );
diff --git a/xen/arch/x86/include/asm/dom0_build.h b/xen/arch/x86/include/asm/dom0_build.h
index dcf71c032a17..81717b49b4ae 100644
--- a/xen/arch/x86/include/asm/dom0_build.h
+++ b/xen/arch/x86/include/asm/dom0_build.h
@@ -19,9 +19,6 @@ unsigned long dom0_compute_nr_pages(
 int dom0_construct_pv(struct boot_domain *bd);
 int dom0_construct_pvh(struct boot_domain *bd);
 
-unsigned long dom0_paging_pages(const struct domain *d,
-                                unsigned long nr_pages);
-
 void dom0_update_physmap(bool compat, unsigned long pfn,
                          unsigned long mfn, unsigned long vphysmap_s);
 
diff --git a/xen/arch/x86/include/asm/domain-builder.h b/xen/arch/x86/include/asm/domain-builder.h
index ccfa4bd82acd..8b0b224eba41 100644
--- a/xen/arch/x86/include/asm/domain-builder.h
+++ b/xen/arch/x86/include/asm/domain-builder.h
@@ -8,6 +8,9 @@ int __init builder_get_cmdline(
     struct boot_info *bi, int offset, char *cmdline, size_t size);
 
 void builder_init(struct boot_info *bi);
+
+unsigned long dom_paging_pages(
+    const struct boot_domain *d, unsigned long nr_pages);
 unsigned int dom_max_vcpus(struct boot_domain *bd);
 struct vcpu *alloc_dom_vcpu0(struct boot_domain *bd);
 
diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c
index 350a60b1e8fd..f8844b858082 100644
--- a/xen/arch/x86/pv/dom0_build.c
+++ b/xen/arch/x86/pv/dom0_build.c
@@ -17,6 +17,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -1043,7 +1044,7 @@ static int __init dom0_construct(struct boot_domain *bd)
     {
         bool preempted;
 
-        nr_pt_pages = dom0_paging_pages(d, nr_pages);
+        nr_pt_pages = dom_paging_pages(bd, nr_pages);
 
         do {
             preempted = false;
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 10/38] x86/boot: refactor dom0 page calculation
Date: Sat, 19 Apr 2025 18:07:52 -0400
Message-Id: <20250419220820.4234-11-dpsmith@apertussolutions.com>
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Caution is needed when dom0 is being constructed as PV using an older kernel
that does not have the elf note XEN_ELFNOTE_INIT_P2M. The logic for handling
this situation is embedded directly and takes into account whether dom0 memory
parameters were specified using the negative allocation syntax. To prepare for
generalizing domain page allocation, isolate this logic to a separate handling
function.

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/dom0_build.c | 76 +++++++++++++++++++++------------------
 1 file changed, 41 insertions(+), 35 deletions(-)

diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c
index 658d81ab598c..a007e424bbe3 100644
--- a/xen/arch/x86/dom0_build.c
+++ b/xen/arch/x86/dom0_build.c
@@ -353,12 +353,50 @@ static void __init calculate_dom0_pages(
     bd->mem_pages = nr_pages;
 }
 
+static void __init dom0_pv_restrict_pages(
+    struct boot_domain *bd, struct elf_dom_parms *parms)
+{
+    if ( (parms->p2m_base == UNSET_ADDR) && !memsize_gt_zero(&dom0_size) &&
+         (!memsize_gt_zero(&dom0_min_size) || (bd->mem_pages > bd->min_pages)) )
+    {
+        /*
+         * Legacy Linux kernels (i.e. such without a XEN_ELFNOTE_INIT_P2M
+         * note) require that there is enough virtual space beyond the initial
+         * allocation to set up their initial page tables. This space is
+         * roughly the same size as the p2m table, so make sure the initial
+         * allocation doesn't consume more than about half the space that's
+         * available between params.virt_base and the address space end.
+         */
+        unsigned long vstart, vend, end;
+        unsigned long initrd_len = bd->ramdisk ? bd->ramdisk->size : 0;
+        size_t sizeof_long = is_pv_32bit_domain(bd->d) ? sizeof(int) : sizeof(long);
+
+        vstart = parms->virt_base;
+        vend = round_pgup(parms->virt_kend);
+        if ( !parms->unmapped_initrd )
+            vend += round_pgup(initrd_len);
+        end = vend + bd->mem_pages * sizeof_long;
+
+        if ( end > vstart )
+            end += end - vstart;
+        if ( end <= vstart ||
+             (sizeof_long < sizeof(end) && end > (1UL << (8 * sizeof_long))) )
+        {
+            end = sizeof_long >= sizeof(end) ? 0 : 1UL << (8 * sizeof_long);
+            bd->mem_pages = (end - vend) / (2 * sizeof_long);
+            if ( memsize_gt_zero(&dom0_min_size) &&
+                 bd->mem_pages < bd->min_pages )
+                bd->mem_pages = bd->min_pages;
+            printk("Dom0 memory clipped to %lu pages\n", bd->mem_pages);
+        }
+    }
+}
+
 unsigned long __init dom0_compute_nr_pages(
     struct boot_domain *bd, struct elf_dom_parms *parms)
 {
     nodeid_t node;
     struct domain *d = bd->d;
-    unsigned long initrd_len = bd->ramdisk ? bd->ramdisk->size : 0;
     unsigned long avail = 0, iommu_pages = 0;
 
     for_each_node_mask ( node, dom0_nodes )
@@ -404,40 +442,8 @@ unsigned long __init dom0_compute_nr_pages(
     /* Clamp according to min/max limits and available memory (final). */
     calculate_dom0_pages(bd, avail);
 
-    if ( is_pv_domain(d) &&
-         (parms->p2m_base == UNSET_ADDR) && !memsize_gt_zero(&dom0_size) &&
-         (!memsize_gt_zero(&dom0_min_size) || (bd->mem_pages > bd->min_pages)) )
-    {
-        /*
-         * Legacy Linux kernels (i.e. such without a XEN_ELFNOTE_INIT_P2M
-         * note) require that there is enough virtual space beyond the initial
-         * allocation to set up their initial page tables. This space is
-         * roughly the same size as the p2m table, so make sure the initial
-         * allocation doesn't consume more than about half the space that's
-         * available between params.virt_base and the address space end.
-         */
-        unsigned long vstart, vend, end;
-        size_t sizeof_long = is_pv_32bit_domain(d) ? sizeof(int) : sizeof(long);
-
-        vstart = parms->virt_base;
-        vend = round_pgup(parms->virt_kend);
-        if ( !parms->unmapped_initrd )
-            vend += round_pgup(initrd_len);
-        end = vend + bd->mem_pages * sizeof_long;
-
-        if ( end > vstart )
-            end += end - vstart;
-        if ( end <= vstart ||
-             (sizeof_long < sizeof(end) && end > (1UL << (8 * sizeof_long))) )
-        {
-            end = sizeof_long >= sizeof(end) ? 0 : 1UL << (8 * sizeof_long);
-            bd->mem_pages = (end - vend) / (2 * sizeof_long);
-            if ( memsize_gt_zero(&dom0_min_size) &&
-                 bd->mem_pages < bd->min_pages )
-                bd->mem_pages = bd->min_pages;
-            printk("Dom0 memory clipped to %lu pages\n", bd->mem_pages);
-        }
-    }
+    if ( is_pv_domain(d) )
+        dom0_pv_restrict_pages(bd, parms);
 
     d->max_pages = min_t(unsigned long, bd->max_pages, UINT_MAX);
 
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 06/38] x86/hyperlaunch: add hardware domain capability support
Date: Sat, 19 Apr 2025 18:07:48 -0400
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Introduce a capability flag to the capabilities property of a domain node in
the hyperlaunch device tree. In the domain construction, use the capability
flag to determine if CDF_hardware should be set on the domain config.

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/domain-builder/core.c     | 3 ++-
 xen/arch/x86/domain-builder/fdt.c      | 2 ++
 xen/arch/x86/include/asm/boot-domain.h | 1 +
 xen/arch/x86/setup.c                   | 8 ++++++--
 4 files changed, 11 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/domain-builder/core.c b/xen/arch/x86/domain-builder/core.c
index 6ab4e6fe5333..8d137ecaaf84 100644
--- a/xen/arch/x86/domain-builder/core.c
+++ b/xen/arch/x86/domain-builder/core.c
@@ -96,7 +96,8 @@ void __init builder_init(struct boot_info *bi)
         i = first_boot_module_index(bi, BOOTMOD_UNKNOWN);
         bi->mods[i].type = BOOTMOD_KERNEL;
         bi->domains[0].kernel = &bi->mods[i];
-        bi->domains[0].capabilities |= BUILD_CAPS_CONTROL;
+        bi->domains[0].capabilities |=
+            (BUILD_CAPS_CONTROL | BUILD_CAPS_HARDWARE);
         bi->nr_domains = 1;
     }
 }
diff --git a/xen/arch/x86/domain-builder/fdt.c b/xen/arch/x86/domain-builder/fdt.c
index d2a7e010ea77..1af58ed4eb86 100644
--- a/xen/arch/x86/domain-builder/fdt.c
+++ b/xen/arch/x86/domain-builder/fdt.c
@@ -267,6 +267,8 @@ static int __init process_domain_node(
             printk("  caps: ");
             if ( bd->capabilities & BUILD_CAPS_CONTROL )
                 printk("c");
+            if ( bd->capabilities & BUILD_CAPS_HARDWARE )
+                printk(" h");
             printk("\n");
         }
     }
diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/include/asm/boot-domain.h
index b0f956cd734e..18d144de2fea 100644
--- a/xen/arch/x86/include/asm/boot-domain.h
+++ b/xen/arch/x86/include/asm/boot-domain.h
@@ -15,6 +15,7 @@ struct boot_domain {
 
 #define BUILD_CAPS_NONE          (0)
 #define BUILD_CAPS_CONTROL       (1 << 0)
+#define BUILD_CAPS_HARDWARE      (1 << 1)
     uint32_t capabilities;
 
                                           /* On     | Off    */
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 41e46f05a520..760262ea3d4c 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -1035,8 +1035,12 @@ static struct domain *__init create_dom0(struct boot_info *bi)
             XEN_X86_EMU_LAPIC | XEN_X86_EMU_IOAPIC | XEN_X86_EMU_VPCI;
     }
 
-    if ( iommu_enabled )
-        dom0_cfg.flags |= XEN_DOMCTL_CDF_iommu;
+    if ( bd->capabilities & BUILD_CAPS_HARDWARE )
+    {
+        create_flags |= CDF_hardware;
+        if ( iommu_enabled )
+            dom0_cfg.flags |= XEN_DOMCTL_CDF_iommu;
+    }
 
     if ( bd->domid == DOMID_INVALID )
         /* Create initial domain.  Not d0 for pvshim. */
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 04/38] x86/hyperlaunch: convert vcpu0 creation to domain builder
Date: Sat, 19 Apr 2025 18:07:46 -0400
Message-Id: <20250419220820.4234-5-dpsmith@apertussolutions.com>
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Convert alloc_dom0_vcpu0() to dom0_set_affinity(), making it only set up the
node affinity based on command line parameters passed. At the same time,
introduce alloc_dom_vcpu0() as the replacement for alloc_dom0_vcpu(). Then have
alloc_dom_vcpu0() call dom0_set_affinity() when the boot domain is the control
domain, otherwise set the affinity to auto.

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/dom0_build.c                 |  4 +---
 xen/arch/x86/domain-builder/domain.c      | 11 +++++++++++
 xen/arch/x86/include/asm/dom0_build.h     |  2 ++
 xen/arch/x86/include/asm/domain-builder.h |  1 +
 xen/arch/x86/setup.c                      |  5 +++--
 5 files changed, 18 insertions(+), 5 deletions(-)

diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c
index 7b3e31a08f7d..77386cd1e20c 100644
--- a/xen/arch/x86/dom0_build.c
+++ b/xen/arch/x86/dom0_build.c
@@ -254,12 +254,10 @@ unsigned int __init dom0_max_vcpus(void)
     return max_vcpus;
 }
 
-struct vcpu *__init alloc_dom0_vcpu0(struct domain *dom0)
+void __init dom0_set_affinity(struct domain *dom0)
 {
     dom0->node_affinity = dom0_nodes;
     dom0->auto_node_affinity = !dom0_nr_pxms;
-
-    return vcpu_create(dom0, 0);
 }
 
 #ifdef CONFIG_SHADOW_PAGING
diff --git a/xen/arch/x86/domain-builder/domain.c b/xen/arch/x86/domain-builder/domain.c
index f2277b9e3cf3..619d36ea0b87 100644
--- a/xen/arch/x86/domain-builder/domain.c
+++ b/xen/arch/x86/domain-builder/domain.c
@@ -9,6 +9,7 @@
 #include 
 
 #include 
+#include 
 
 unsigned int __init dom_max_vcpus(struct boot_domain *bd)
 {
@@ -27,6 +28,16 @@ unsigned int __init dom_max_vcpus(struct boot_domain *bd)
     return bd->max_vcpus;
 }
 
+struct vcpu *__init alloc_dom_vcpu0(struct boot_domain *bd)
+{
+    if ( bd->capabilities & BUILD_CAPS_CONTROL )
+        dom0_set_affinity(bd->d);
+    else
+        bd->d->auto_node_affinity = true;
+
+    return vcpu_create(bd->d, 0);
+}
+
 /*
  * Local variables:
  * mode: C
diff --git a/xen/arch/x86/include/asm/dom0_build.h b/xen/arch/x86/include/asm/dom0_build.h
index ff021c24af9d..426def4115ce 100644
--- a/xen/arch/x86/include/asm/dom0_build.h
+++ b/xen/arch/x86/include/asm/dom0_build.h
@@ -8,6 +8,8 @@
 
 extern unsigned int dom0_memflags;
 
+void dom0_set_affinity(struct domain *dom0);
+
 unsigned long dom0_compute_nr_pages(struct domain *d,
                                     struct elf_dom_parms *parms,
                                     unsigned long initrd_len);
diff --git a/xen/arch/x86/include/asm/domain-builder.h b/xen/arch/x86/include/asm/domain-builder.h
index f37f73e2255b..dd47e9ac0dc6 100644
--- a/xen/arch/x86/include/asm/domain-builder.h
+++ b/xen/arch/x86/include/asm/domain-builder.h
@@ -9,5 +9,6 @@ int __init builder_get_cmdline(
 
 void builder_init(struct boot_info *bi);
 unsigned int dom_max_vcpus(struct boot_domain *bd);
+struct vcpu *alloc_dom_vcpu0(struct boot_domain *bd);
 
 #endif
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 86bbd7c72ccd..8ba9d592ed5a 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -1048,9 +1048,11 @@ static struct domain *__init create_dom0(struct boot_info *bi)
     if ( IS_ERR(d) )
         panic("Error creating d%u: %ld\n", bd->domid, PTR_ERR(d));
 
+    bd->d = d;
+
     init_dom0_cpuid_policy(d);
 
-    if ( alloc_dom0_vcpu0(d) == NULL )
+    if ( alloc_dom_vcpu0(bd) == NULL )
         panic("Error creating %pd vcpu 0\n", d);
 
     cmdline_size = domain_cmdline_size(bi, bd);
@@ -1090,7 +1092,6 @@ static struct domain *__init create_dom0(struct boot_info *bi)
         bd->cmdline = cmdline;
     }
 
-    bd->d = d;
     if ( construct_dom0(bd) != 0 )
         panic("Could not construct domain 0\n");
 
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 09/38] x86/boot: convert dom0 page calculation to use boot domain
Date: Sat, 19 Apr 2025 18:07:51 -0400
Message-Id: <20250419220820.4234-10-dpsmith@apertussolutions.com>
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This commit seeks to rework the dom0_compute_nr_pages() function to consume a
boot domain structure that may contain requested memory pages, min pages, max
pages, and the reference for the initrd. With the passing of the boot domain
struct, the initrd_size parameter is dropped. This takes into account the PVH
case, where the value 0 was passed, which is safe as initrd_size is only used
behind the is_pv_domain() check.

It introduces the calculate_dom0_pages() function that handles the command line
override of the memory pages, min pages, and max pages values. The function
also applies a clamping of memory pages to the min/max pages value.

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/dom0_build.c             | 62 ++++++++++++++++-----------
 xen/arch/x86/hvm/dom0_build.c         | 12 +++---
 xen/arch/x86/include/asm/dom0_build.h | 10 ++---
 xen/arch/x86/pv/dom0_build.c          |  6 +--
 4 files changed, 51 insertions(+), 39 deletions(-)

diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c
index 08fde953a1e0..658d81ab598c 100644
--- a/xen/arch/x86/dom0_build.c
+++ b/xen/arch/x86/dom0_build.c
@@ -330,16 +330,37 @@ static unsigned long __init default_nr_pages(unsigned long avail)
                             : min(avail / 16, 128UL << (20 - PAGE_SHIFT)));
 }
 
-unsigned long __init dom0_compute_nr_pages(
-    struct domain *d, struct elf_dom_parms *parms, unsigned long initrd_len)
+static void __init calculate_dom0_pages(
+    struct boot_domain *bd, unsigned long avail)
 {
-    nodeid_t node;
-    unsigned long avail = 0, nr_pages, min_pages, max_pages, iommu_pages = 0;
+    unsigned long nr_pages = bd->mem_pages ?: default_nr_pages(avail);
 
     /* The ordering of operands is to work around a clang5 issue. */
     if ( CONFIG_DOM0_MEM[0] && !dom0_mem_set )
         parse_dom0_mem(CONFIG_DOM0_MEM);
 
+    if ( dom0_mem_set )
+    {
+        nr_pages = get_memsize(&dom0_size, avail) ?: default_nr_pages(avail);
+        bd->min_pages = get_memsize(&dom0_min_size, avail);
+        bd->max_pages = get_memsize(&dom0_max_size, avail);
+    }
+
+    nr_pages = max(nr_pages, bd->min_pages);
+    nr_pages = min(nr_pages, bd->max_pages);
+    nr_pages = min(nr_pages, avail);
+
+    bd->mem_pages = nr_pages;
+}
+
+unsigned long __init dom0_compute_nr_pages(
+    struct boot_domain *bd, struct elf_dom_parms *parms)
+{
+    nodeid_t node;
+    struct domain *d = bd->d;
+    unsigned long initrd_len = bd->ramdisk ? bd->ramdisk->size : 0;
+    unsigned long avail = 0, iommu_pages = 0;
+
     for_each_node_mask ( node, dom0_nodes )
         avail += avail_domheap_pages_region(node, 0, 0) +
                  initial_images_nrpages(node);
@@ -366,17 +387,13 @@ unsigned long __init dom0_compute_nr_pages(
     {
         unsigned long cpu_pages;
 
-        nr_pages = get_memsize(&dom0_size, avail) ?: default_nr_pages(avail);
-
         /*
          * Clamp according to min/max limits and available memory
          * (preliminary).
          */
-        nr_pages = max(nr_pages, get_memsize(&dom0_min_size, avail));
-        nr_pages = min(nr_pages, get_memsize(&dom0_max_size, avail));
-        nr_pages = min(nr_pages, avail);
+        calculate_dom0_pages(bd, avail);
 
-        cpu_pages = dom0_paging_pages(d, nr_pages);
+        cpu_pages = dom0_paging_pages(d, bd->mem_pages);
 
         if ( !iommu_use_hap_pt(d) )
             avail -= cpu_pages;
@@ -384,18 +401,12 @@ unsigned long __init dom0_compute_nr_pages(
             avail -= cpu_pages - iommu_pages;
     }
 
-    nr_pages = get_memsize(&dom0_size, avail) ?: default_nr_pages(avail);
-    min_pages = get_memsize(&dom0_min_size, avail);
-    max_pages = get_memsize(&dom0_max_size, avail);
-
     /* Clamp according to min/max limits and available memory (final). */
-    nr_pages = max(nr_pages, min_pages);
-    nr_pages = min(nr_pages, max_pages);
-    nr_pages = min(nr_pages, avail);
+    calculate_dom0_pages(bd, avail);
 
     if ( is_pv_domain(d) &&
          (parms->p2m_base == UNSET_ADDR) && !memsize_gt_zero(&dom0_size) &&
-         (!memsize_gt_zero(&dom0_min_size) || (nr_pages > min_pages)) )
+         (!memsize_gt_zero(&dom0_min_size) || (bd->mem_pages > bd->min_pages)) )
     {
         /*
          * Legacy Linux kernels (i.e. such without a XEN_ELFNOTE_INIT_P2M
@@ -412,7 +423,7 @@ unsigned long __init dom0_compute_nr_pages(
         vend = round_pgup(parms->virt_kend);
         if ( !parms->unmapped_initrd )
             vend += round_pgup(initrd_len);
-        end = vend + nr_pages * sizeof_long;
+        end = vend + bd->mem_pages * sizeof_long;
 
         if ( end > vstart )
             end += end - vstart;
@@ -420,16 +431,17 @@ unsigned long __init dom0_compute_nr_pages(
              (sizeof_long < sizeof(end) && end > (1UL << (8 * sizeof_long))) )
         {
             end = sizeof_long >= sizeof(end) ? 0 : 1UL << (8 * sizeof_long);
-            nr_pages = (end - vend) / (2 * sizeof_long);
-            if ( memsize_gt_zero(&dom0_min_size) && nr_pages < min_pages )
-                nr_pages = min_pages;
-            printk("Dom0 memory clipped to %lu pages\n", nr_pages);
+            bd->mem_pages = (end - vend) / (2 * sizeof_long);
+            if ( memsize_gt_zero(&dom0_min_size) &&
+                 bd->mem_pages < bd->min_pages )
+                bd->mem_pages = bd->min_pages;
+            printk("Dom0 memory clipped to %lu pages\n", bd->mem_pages);
         }
     }
 
-    d->max_pages = min_t(unsigned long, max_pages, UINT_MAX);
+    d->max_pages = min_t(unsigned long, bd->max_pages, UINT_MAX);
 
-    return nr_pages;
+    return bd->mem_pages;
 }
 
 static void __init process_dom0_ioports_disable(struct domain *dom0)
diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build.c
index b4ffebdde00e..a818a9a772ed 100644
--- a/xen/arch/x86/hvm/dom0_build.c
+++ b/xen/arch/x86/hvm/dom0_build.c
@@ -398,15 +398,15 @@ static __init void pvh_setup_e820(struct domain *d, unsigned long nr_pages)
     ASSERT(cur_pages == nr_pages);
 }
 
-static void __init pvh_init_p2m(struct domain *d)
+static void __init pvh_init_p2m(struct boot_domain *bd)
 {
-    unsigned long nr_pages = dom0_compute_nr_pages(d, NULL, 0);
+    unsigned long nr_pages = dom0_compute_nr_pages(bd, NULL);
     bool preempted;
 
-    pvh_setup_e820(d, nr_pages);
+    pvh_setup_e820(bd->d, nr_pages);
     do {
         preempted = false;
-        paging_set_allocation(d, dom0_paging_pages(d, nr_pages),
+        paging_set_allocation(bd->d, dom0_paging_pages(bd->d, nr_pages),
                               &preempted);
         process_pending_softirqs();
     } while ( preempted );
@@ -1312,7 +1312,7 @@ static int __init pvh_setup_acpi(struct domain *d, paddr_t start_info)
     return 0;
 }
 
-int __init dom0_construct_pvh(const struct boot_domain *bd)
+int __init dom0_construct_pvh(struct boot_domain *bd)
 {
     paddr_t entry, start_info;
     struct domain *d = bd->d;
@@ -1323,7 +1323,7 @@ int __init dom0_construct_pvh(const struct boot_domain *bd)
      * be done before the iommu initializion, since iommu initialization code
      * will likely add mappings required by devices to the p2m (ie: RMRRs).
      */
-    pvh_init_p2m(d);
+    pvh_init_p2m(bd);
 
     iommu_hwdom_init(d);
 
diff --git a/xen/arch/x86/include/asm/dom0_build.h b/xen/arch/x86/include/asm/dom0_build.h
index 426def4115ce..dcf71c032a17 100644
--- a/xen/arch/x86/include/asm/dom0_build.h
+++ b/xen/arch/x86/include/asm/dom0_build.h
@@ -10,14 +10,14 @@ extern unsigned int dom0_memflags;
 
 void dom0_set_affinity(struct domain *dom0);
 
-unsigned long dom0_compute_nr_pages(struct domain *d,
-                                    struct elf_dom_parms *parms,
-                                    unsigned long initrd_len);
 int dom0_setup_permissions(struct domain *d);
 
 struct boot_domain;
-int dom0_construct_pv(const struct boot_domain *bd);
-int dom0_construct_pvh(const struct boot_domain *bd);
+unsigned long dom0_compute_nr_pages(
+    struct boot_domain *bd, struct elf_dom_parms *parms);
+
+int dom0_construct_pv(struct boot_domain *bd);
+int dom0_construct_pvh(struct boot_domain *bd);
 
 unsigned long dom0_paging_pages(const struct domain *d,
                                 unsigned long nr_pages);
diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c
index 3b2baf057b75..350a60b1e8fd 100644
--- a/xen/arch/x86/pv/dom0_build.c
+++ b/xen/arch/x86/pv/dom0_build.c
@@ -355,7 +355,7 @@ static struct page_info * __init alloc_chunk(struct domain *d,
     return page;
 }
 
-static int __init dom0_construct(const struct boot_domain *bd)
+static int __init dom0_construct(struct boot_domain *bd)
 {
     unsigned int i;
     int rc, order, machine;
@@ -503,7 +503,7 @@ static int __init dom0_construct(const struct boot_domain *bd)
         }
     }
 
-    nr_pages = dom0_compute_nr_pages(d, &parms, initrd_len);
+    nr_pages = dom0_compute_nr_pages(bd, &parms);
 
 #ifdef CONFIG_PV32
     if ( elf_32bit(&elf) )
@@ -1070,7 +1070,7 @@ out:
     return rc;
 }
 
-int __init dom0_construct_pv(const struct boot_domain *bd)
+int __init dom0_construct_pv(struct boot_domain *bd)
 {
     unsigned long cr4 = read_cr4();
     int rc;
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 07/38] x86/hyperlaunch: introduce pvh domain builder
Date: Sat, 19 Apr 2025 18:07:49 -0400
Message-Id: <20250419220820.4234-8-dpsmith@apertussolutions.com>
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Introduce dom_construct_pvh() as a wrapper around dom0_construct_pvh(). This
function will be expanded as dom0 specific construction functions are
generalized.

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/dom0_build.c                 |  5 ++--
 xen/arch/x86/hvm/Makefile                 |  1 +
 xen/arch/x86/hvm/dom_build.c              | 31 +++++++++++++++++++++++
 xen/arch/x86/include/asm/domain-builder.h |  2 ++
 xen/arch/x86/include/asm/setup.h          |  2 +-
 5 files changed, 38 insertions(+), 3 deletions(-)
 create mode 100644 xen/arch/x86/hvm/dom_build.c

diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c
index 77386cd1e20c..08fde953a1e0 100644
--- a/xen/arch/x86/dom0_build.c
+++ b/xen/arch/x86/dom0_build.c
@@ -15,6 +15,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -613,7 +614,7 @@ int __init dom0_setup_permissions(struct domain *d)
     return rc;
 }
 
-int __init construct_dom0(const struct boot_domain *bd)
+int __init construct_dom0(struct boot_domain *bd)
 {
     int rc;
     const struct domain *d = bd->d;
@@ -637,7 +638,7 @@ int __init construct_dom0(const struct boot_domain *bd)
         opt_dom0_max_vcpus_max = bd->max_vcpus;
 
     if ( is_hvm_domain(d) )
-        rc = dom0_construct_pvh(bd);
+        rc = dom_construct_pvh(bd);
     else if ( is_pv_domain(d) )
         rc = dom0_construct_pv(bd);
     else
diff --git a/xen/arch/x86/hvm/Makefile b/xen/arch/x86/hvm/Makefile
index 4c1fa5c6c2bf..2c1662b66897 100644
--- a/xen/arch/x86/hvm/Makefile
+++ b/xen/arch/x86/hvm/Makefile
@@ -5,6 +5,7 @@ obj-y += viridian/
 obj-y += asid.o
 obj-y += dm.o
 obj-bin-y += dom0_build.init.o
+obj-bin-y += dom_build.init.o
 obj-y += domain.o
 obj-y += emulate.o
 obj-$(CONFIG_GRANT_TABLE) += grant_table.o
diff --git a/xen/arch/x86/hvm/dom_build.c b/xen/arch/x86/hvm/dom_build.c
new file mode 100644
index 000000000000..7206815d64a9
--- /dev/null
+++ b/xen/arch/x86/hvm/dom_build.c
@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * hvm/dom_build.c
+ *
+ * Dom builder for PVH guest.
+ *
+ * Copyright (C) 2017 Citrix Systems R&D
+ * Copyright (C) 2024 Apertus Solutions, LLC
+ */
+
+#include 
+
+#include 
+#include 
+
+int __init dom_construct_pvh(struct boot_domain *bd)
+{
+    printk(XENLOG_INFO "*** Building a PVH Dom%d ***\n", bd->domid);
+
+    return dom0_construct_pvh(bd);
+}
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * tab-width: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/arch/x86/include/asm/domain-builder.h b/xen/arch/x86/include/asm/domain-builder.h
index dd47e9ac0dc6..ccfa4bd82acd 100644
--- a/xen/arch/x86/include/asm/domain-builder.h
+++ b/xen/arch/x86/include/asm/domain-builder.h
@@ -11,4 +11,6 @@ void builder_init(struct boot_info *bi);
 unsigned int dom_max_vcpus(struct boot_domain *bd);
 struct vcpu *alloc_dom_vcpu0(struct boot_domain *bd);
 
+int dom_construct_pvh(struct boot_domain *bd);
+
 #endif
diff --git a/xen/arch/x86/include/asm/setup.h b/xen/arch/x86/include/asm/setup.h
index ac34c698551e..b517da6144de 100644
--- a/xen/arch/x86/include/asm/setup.h
+++ b/xen/arch/x86/include/asm/setup.h
@@ -27,7 +27,7 @@ void subarch_init_memory(void);
 void init_IRQ(void);
 
 struct boot_domain;
-int construct_dom0(const struct boot_domain *bd);
+int construct_dom0(struct boot_domain *bd);
 
 void setup_io_bitmap(struct domain *d);
 
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 12/38] x86/boot: generalize compute number of domain pages
Date: Sat, 19 Apr 2025 18:07:54 -0400
Message-Id: <20250419220820.4234-13-dpsmith@apertussolutions.com>
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The amount of pages for a domain to be allocated is based on the physical nodes
a domain may be scheduled. For dom0, this can be restricted down from available
nodes via the dom0_nodes command line parameter.

Refactor dom0_compute_nr_pages() such that only apply the dom0_nodes
restriction only if the domain has the control domain or hardware domain
capability flag set. In doing so, also rename the function to
dom_compute_nr_pages().

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/dom0_build.c             | 16 +++++++++++++---
 xen/arch/x86/hvm/dom0_build.c         |  2 +-
 xen/arch/x86/include/asm/dom0_build.h |  2 +-
 xen/arch/x86/pv/dom0_build.c          |  2 +-
 4 files changed, 16 insertions(+), 6 deletions(-)

diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c
index 1413e8c634a7..53ab1afbaa1f 100644
--- a/xen/arch/x86/dom0_build.c
+++ b/xen/arch/x86/dom0_build.c
@@ -377,14 +377,23 @@ static void __init dom0_pv_restrict_pages(
     }
 }
 
-unsigned long __init dom0_compute_nr_pages(
+unsigned long __init dom_compute_nr_pages(
     struct boot_domain *bd, struct elf_dom_parms *parms)
 {
     nodeid_t node;
+    nodemask_t nodes = { 0 };
     struct domain *d = bd->d;
     unsigned long avail = 0, iommu_pages = 0;
 
-    for_each_node_mask ( node, dom0_nodes )
+    nodes_or(nodes, nodes, node_online_map);
+
+    /* If building dom0 or hwdom, apply command line restriction. */
+    if ( bd->capabilities & (BUILD_CAPS_CONTROL | BUILD_CAPS_HARDWARE) )
+        nodes_and(nodes, nodes, dom0_nodes);
+
+    ASSERT(nodes_weight(nodes) != 0);
+
+    for_each_node_mask ( node, nodes )
         avail += avail_domheap_pages_region(node, 0, 0) +
                  initial_images_nrpages(node);
 
@@ -396,7 +405,8 @@ unsigned long __init dom0_compute_nr_pages(
         avail -= d->max_vcpus - 1;
 
     /* Reserve memory for iommu_dom0_init() (rough estimate). */
-    if ( is_iommu_enabled(d) && !iommu_hwdom_passthrough )
+    if ( is_hardware_domain(d) && is_iommu_enabled(d)
+         && !iommu_hwdom_passthrough )
     {
         unsigned int s;
 
diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build.c
index d3ad90348a1f..f59af0e72810 100644
--- a/xen/arch/x86/hvm/dom0_build.c
+++ b/xen/arch/x86/hvm/dom0_build.c
@@ -401,7 +401,7 @@ static __init void pvh_setup_e820(struct domain *d, unsigned long nr_pages)
 
 static void __init pvh_init_p2m(struct boot_domain *bd)
 {
-    unsigned long nr_pages = dom0_compute_nr_pages(bd, NULL);
+    unsigned long nr_pages = dom_compute_nr_pages(bd, NULL);
     bool preempted;
 
     pvh_setup_e820(bd->d, nr_pages);
diff --git a/xen/arch/x86/include/asm/dom0_build.h b/xen/arch/x86/include/asm/dom0_build.h
index 81717b49b4ae..7275bcf9ba6b 100644
--- a/xen/arch/x86/include/asm/dom0_build.h
+++ b/xen/arch/x86/include/asm/dom0_build.h
@@ -13,7 +13,7 @@ void dom0_set_affinity(struct domain *dom0);
 int dom0_setup_permissions(struct domain *d);
 
 struct boot_domain;
-unsigned long dom0_compute_nr_pages(
+unsigned long dom_compute_nr_pages(
     struct boot_domain *bd, struct elf_dom_parms *parms);
 
 int dom0_construct_pv(struct boot_domain *bd);
diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c
index f8844b858082..ad4d1cc3520c 100644
--- a/xen/arch/x86/pv/dom0_build.c
+++ b/xen/arch/x86/pv/dom0_build.c
@@ -504,7 +504,7 @@ static int __init dom0_construct(struct boot_domain *bd)
         }
     }
 
-    nr_pages = dom0_compute_nr_pages(bd, &parms);
+    nr_pages = dom_compute_nr_pages(bd, &parms);
 
 #ifdef CONFIG_PV32
     if ( elf_32bit(&elf) )
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 08/38] x86/hyperlaunch: move initial hwdom setup to dom_construct_pvh
Date: Sat, 19 Apr 2025 18:07:50 -0400
Message-Id: <20250419220820.4234-9-dpsmith@apertussolutions.com>
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Relocate the initial block of hwdom setup code from dom0_construct_pvh() over
to dom_construct_pvh().

No functional change.

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/hvm/dom0_build.c | 44 ------------------------------
 xen/arch/x86/hvm/dom_build.c  | 50 +++++++++++++++++++++++++++++++++++
 2 files changed, 50 insertions(+), 44 deletions(-)

diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build.c
index 176b253d3c61..b4ffebdde00e 100644
--- a/xen/arch/x86/hvm/dom0_build.c
+++ b/xen/arch/x86/hvm/dom0_build.c
@@ -1312,56 +1312,12 @@ static int __init pvh_setup_acpi(struct domain *d, paddr_t start_info)
     return 0;
 }
 
-static void __hwdom_init pvh_setup_mmcfg(struct domain *d)
-{
-    unsigned int i;
-    int rc;
-
-    for ( i = 0; i < pci_mmcfg_config_num; i++ )
-    {
-        rc = register_vpci_mmcfg_handler(d, pci_mmcfg_config[i].address,
-                                         pci_mmcfg_config[i].start_bus_number,
-                                         pci_mmcfg_config[i].end_bus_number,
-                                         pci_mmcfg_config[i].pci_segment);
-        if ( rc )
-            printk("Unable to setup MMCFG handler at %#lx for segment %u\n",
-                   pci_mmcfg_config[i].address,
-                   pci_mmcfg_config[i].pci_segment);
-    }
-}
-
 int __init dom0_construct_pvh(const struct boot_domain *bd)
 {
     paddr_t entry, start_info;
     struct domain *d = bd->d;
     int rc;
 
-    printk(XENLOG_INFO "*** Building a PVH Dom%d ***\n", d->domain_id);
-
-    if ( bd->kernel == NULL )
-        panic("Missing kernel boot module for %pd construction\n", d);
-
-    if ( is_hardware_domain(d) )
-    {
-        /*
-         * MMCFG initialization must be performed before setting domain
-         * permissions, as the MCFG areas must not be part of the domain IOMEM
-         * accessible regions.
-         */
-        pvh_setup_mmcfg(d);
-
-        /*
-         * Setup permissions early so that calls to add MMIO regions to the
-         * p2m as part of vPCI setup don't fail due to permission checks.
-         */
-        rc = dom0_setup_permissions(d);
-        if ( rc )
-        {
-            printk("%pd unable to setup permissions: %d\n", d, rc);
-            return rc;
-        }
-    }
-
     /*
      * Craft dom0 physical memory map and set the paging allocation. This must
      * be done before the iommu initializion, since iommu initialization code
diff --git a/xen/arch/x86/hvm/dom_build.c b/xen/arch/x86/hvm/dom_build.c
index 7206815d64a9..b6e534226434 100644
--- a/xen/arch/x86/hvm/dom_build.c
+++ b/xen/arch/x86/hvm/dom_build.c
@@ -8,15 +8,65 @@
  * Copyright (C) 2024 Apertus Solutions, LLC
  */
 
+#include 
 #include 
+#include 
+
+#include 
 
 #include 
 #include 
+#include 
+#include 
+
+static void __hwdom_init pvh_setup_mmcfg(struct domain *d)
+{
+    unsigned int i;
+    int rc;
+
+    for ( i = 0; i < pci_mmcfg_config_num; i++ )
+    {
+        rc = register_vpci_mmcfg_handler(d, pci_mmcfg_config[i].address,
+                                         pci_mmcfg_config[i].start_bus_number,
+                                         pci_mmcfg_config[i].end_bus_number,
+                                         pci_mmcfg_config[i].pci_segment);
+        if ( rc )
+            printk("Unable to setup MMCFG handler at %#lx for segment %u\n",
+                   pci_mmcfg_config[i].address,
+                   pci_mmcfg_config[i].pci_segment);
+    }
+}
 
 int __init dom_construct_pvh(struct boot_domain *bd)
 {
+    int rc;
+
     printk(XENLOG_INFO "*** Building a PVH Dom%d ***\n", bd->domid);
 
+    if ( bd->kernel == NULL )
+        panic("Missing kernel boot module for %pd construction\n", bd->d);
+
+    if ( is_hardware_domain(bd->d) )
+    {
+        /*
+         * MMCFG initialization must be performed before setting domain
+         * permissions, as the MCFG areas must not be part of the domain IOMEM
+         * accessible regions.
+         */
+        pvh_setup_mmcfg(bd->d);
+
+        /*
+         * Setup permissions early so that calls to add MMIO regions to the
+         * p2m as part of vPCI setup don't fail due to permission checks.
+         */
+        rc = dom0_setup_permissions(bd->d);
+        if ( rc )
+        {
+            printk("%pd unable to setup permissions: %d\n", bd->d, rc);
+            return rc;
+        }
+    }
+
     return dom0_construct_pvh(bd);
 }
 
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 05/38] x86/hyperlaunch: move dom0 cpuid policy behind capability check
Date: Sat, 19 Apr 2025 18:07:47 -0400
Message-Id: <20250419220820.4234-6-dpsmith@apertussolutions.com>
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To incrementally convert create_dom0() into being a generalized domain
construction function, move the dom0 specific cpuid policy behind the control
domain capability.

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/setup.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 8ba9d592ed5a..41e46f05a520 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -1050,7 +1050,8 @@ static struct domain *__init create_dom0(struct boot_info *bi)
 
     bd->d = d;
 
-    init_dom0_cpuid_policy(d);
+    if ( bd->capabilities & BUILD_CAPS_CONTROL )
+        init_dom0_cpuid_policy(bd->d);
 
     if ( alloc_dom_vcpu0(bd) == NULL )
         panic("Error creating %pd vcpu 0\n", d);
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 13/38] x86/hyperlaunch: move page computation to domain builder
Date: Sat, 19 Apr 2025 18:07:55 -0400
Message-Id: <20250419220820.4234-14-dpsmith@apertussolutions.com>
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The function dom_compute_nr_pages() is being moved to the domain builder. For
this to happen, the variable dom0_nodes, and the functions
calculate_dom0_pages() and dom0_pv_restrict_pages() must be exported.

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/dom0_build.c                 | 75 +----------------------
 xen/arch/x86/domain-builder/domain.c      | 70 +++++++++++++++++++++
 xen/arch/x86/include/asm/dom0_build.h     |  4 +-
 xen/arch/x86/include/asm/domain-builder.h |  5 ++
 4 files changed, 81 insertions(+), 73 deletions(-)

diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c
index 53ab1afbaa1f..e488a204372b 100644
--- a/xen/arch/x86/dom0_build.c
+++ b/xen/arch/x86/dom0_build.c
@@ -209,7 +209,7 @@ static int __init cf_check parse_dom0_nodes(const char *s)
 custom_param("dom0_nodes", parse_dom0_nodes);
 
 cpumask_t __initdata dom0_cpus;
-static nodemask_t __initdata dom0_nodes;
+nodemask_t __initdata dom0_nodes;
 
 unsigned int __init dom0_max_vcpus(void)
 {
@@ -315,8 +315,7 @@ static unsigned long __init default_nr_pages(unsigned long avail)
                             : min(avail / 16, 128UL << (20 - PAGE_SHIFT)));
 }
 
-static void __init calculate_dom0_pages(
-    struct boot_domain *bd, unsigned long avail)
+void __init calculate_dom0_pages(struct boot_domain *bd, unsigned long avail)
 {
     unsigned long nr_pages = bd->mem_pages ?: default_nr_pages(avail);
 
@@ -338,7 +337,7 @@ static void __init calculate_dom0_pages(
     bd->mem_pages = nr_pages;
 }
 
-static void __init dom0_pv_restrict_pages(
+void __init dom0_pv_restrict_pages(
     struct boot_domain *bd, struct elf_dom_parms *parms)
 {
     if ( (parms->p2m_base == UNSET_ADDR) && !memsize_gt_zero(&dom0_size) &&
@@ -377,74 +376,6 @@ static void __init dom0_pv_restrict_pages(
     }
 }
 
-unsigned long __init dom_compute_nr_pages(
-    struct boot_domain *bd, struct elf_dom_parms *parms)
-{
-    nodeid_t node;
-    nodemask_t nodes = { 0 };
-    struct domain *d = bd->d;
-    unsigned long avail = 0, iommu_pages = 0;
-
-    nodes_or(nodes, nodes, node_online_map);
-
-    /* If building dom0 or hwdom, apply command line restriction. */
-    if ( bd->capabilities & (BUILD_CAPS_CONTROL | BUILD_CAPS_HARDWARE) )
-        nodes_and(nodes, nodes, dom0_nodes);
-
-    ASSERT(nodes_weight(nodes) != 0);
-
-    for_each_node_mask ( node, nodes )
-        avail += avail_domheap_pages_region(node, 0, 0) +
-                 initial_images_nrpages(node);
-
-    /* Reserve memory for further dom0 vcpu-struct allocations... */
-    avail -= (d->max_vcpus - 1UL)
-             << get_order_from_bytes(sizeof(struct vcpu));
-    /* ...and compat_l4's, if needed. */
-    if ( is_pv_32bit_domain(d) )
-        avail -= d->max_vcpus - 1;
-
-    /* Reserve memory for iommu_dom0_init() (rough estimate). */
-    if ( is_hardware_domain(d) && is_iommu_enabled(d)
-         && !iommu_hwdom_passthrough )
-    {
-        unsigned int s;
-
-        for ( s = 9; s < BITS_PER_LONG; s += 9 )
-            iommu_pages += max_pdx >> s;
-
-        avail -= iommu_pages;
-    }
-
-    if ( paging_mode_enabled(d) || opt_dom0_shadow || opt_pv_l1tf_hwdom )
-    {
-        unsigned long cpu_pages;
-
-        /*
-         * Clamp according to min/max limits and available memory
-         * (preliminary).
-         */
-        calculate_dom0_pages(bd, avail);
-
-        cpu_pages = dom_paging_pages(bd, bd->mem_pages);
-
-        if ( !iommu_use_hap_pt(d) )
-            avail -= cpu_pages;
-        else if ( cpu_pages > iommu_pages )
-            avail -= cpu_pages - iommu_pages;
-    }
-
-    /* Clamp according to min/max limits and available memory (final). */
-    calculate_dom0_pages(bd, avail);
-
-    if ( is_pv_domain(d) )
-        dom0_pv_restrict_pages(bd, parms);
-
-    d->max_pages = min_t(unsigned long, bd->max_pages, UINT_MAX);
-
-    return bd->mem_pages;
-}
-
 static void __init process_dom0_ioports_disable(struct domain *dom0)
 {
     unsigned long io_from, io_to;
diff --git a/xen/arch/x86/domain-builder/domain.c b/xen/arch/x86/domain-builder/domain.c
index 87f538ae26c5..bdb4d9745ff2 100644
--- a/xen/arch/x86/domain-builder/domain.c
+++ b/xen/arch/x86/domain-builder/domain.c
@@ -6,6 +6,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
 
 #include 
@@ -31,6 +33,74 @@ unsigned long __init dom_paging_pages(
     return DIV_ROUND_UP(memkb, 1024) << (20 - PAGE_SHIFT);
 }
 
+unsigned long __init dom_compute_nr_pages(
+    struct boot_domain *bd, struct elf_dom_parms *parms)
+{
+    nodeid_t node;
+    nodemask_t nodes = { 0 };
+    struct domain *d = bd->d;
+    unsigned long avail = 0, iommu_pages = 0;
+
+    nodes_or(nodes, nodes, node_online_map);
+
+    /* If building dom0 or hwdom, apply command line restriction. */
+    if ( bd->capabilities & (BUILD_CAPS_CONTROL | BUILD_CAPS_HARDWARE) )
+        nodes_and(nodes, nodes, dom0_nodes);
+
+    ASSERT(nodes_weight(nodes) != 0);
+
+    for_each_node_mask ( node, nodes )
+        avail += avail_domheap_pages_region(node, 0, 0) +
+                 initial_images_nrpages(node);
+
+    /* Reserve memory for further dom0 vcpu-struct allocations... */
+    avail -= (d->max_vcpus - 1UL)
+             << get_order_from_bytes(sizeof(struct vcpu));
+    /* ...and compat_l4's, if needed. */
+    if ( is_pv_32bit_domain(d) )
+        avail -= d->max_vcpus - 1;
+
+    /* Reserve memory for iommu_dom0_init() (rough estimate). */
+    if ( is_hardware_domain(d) && is_iommu_enabled(d)
+         && !iommu_hwdom_passthrough )
+    {
+        unsigned int s;
+
+        for ( s = 9; s < BITS_PER_LONG; s += 9 )
+            iommu_pages += max_pdx >> s;
+
+        avail -= iommu_pages;
+    }
+
+    if ( paging_mode_enabled(d) || opt_dom0_shadow || opt_pv_l1tf_hwdom )
+    {
+        unsigned long cpu_pages;
+
+        /*
+         * Clamp according to min/max limits and available memory
+         * (preliminary).
+         */
+        calculate_dom0_pages(bd, avail);
+
+        cpu_pages = dom_paging_pages(bd, bd->mem_pages);
+
+        if ( !iommu_use_hap_pt(d) )
+            avail -= cpu_pages;
+        else if ( cpu_pages > iommu_pages )
+            avail -= cpu_pages - iommu_pages;
+    }
+
+    /* Clamp according to min/max limits and available memory (final). */
+    calculate_dom0_pages(bd, avail);
+
+    if ( is_pv_domain(d) )
+        dom0_pv_restrict_pages(bd, parms);
+
+    d->max_pages = min_t(unsigned long, bd->max_pages, UINT_MAX);
+
+    return bd->mem_pages;
+}
+
 unsigned int __init dom_max_vcpus(struct boot_domain *bd)
 {
     unsigned int limit = bd->mode & BUILD_MODE_PARAVIRT ?
diff --git a/xen/arch/x86/include/asm/dom0_build.h b/xen/arch/x86/include/asm/dom0_build.h
index 7275bcf9ba6b..43a402af15b7 100644
--- a/xen/arch/x86/include/asm/dom0_build.h
+++ b/xen/arch/x86/include/asm/dom0_build.h
@@ -7,13 +7,15 @@
 #include 
 
 extern unsigned int dom0_memflags;
+extern nodemask_t dom0_nodes;
 
 void dom0_set_affinity(struct domain *dom0);
 
 int dom0_setup_permissions(struct domain *d);
 
 struct boot_domain;
-unsigned long dom_compute_nr_pages(
+void calculate_dom0_pages(struct boot_domain *bd, unsigned long avail);
+void dom0_pv_restrict_pages(
     struct boot_domain *bd, struct elf_dom_parms *parms);
 
 int dom0_construct_pv(struct boot_domain *bd);
diff --git a/xen/arch/x86/include/asm/domain-builder.h b/xen/arch/x86/include/asm/domain-builder.h
index 8b0b224eba41..f9b11e06ceb8 100644
--- a/xen/arch/x86/include/asm/domain-builder.h
+++ b/xen/arch/x86/include/asm/domain-builder.h
@@ -11,6 +11,11 @@ void builder_init(struct boot_info *bi);
 
 unsigned long dom_paging_pages(
     const struct boot_domain *d, unsigned long nr_pages);
+
+struct elf_dom_parms;
+unsigned long dom_compute_nr_pages(
+    struct boot_domain *bd, struct elf_dom_parms *parms);
+
 unsigned int dom_max_vcpus(struct boot_domain *bd);
 struct vcpu *alloc_dom_vcpu0(struct boot_domain *bd);
 
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 28/38] x86/hyperlaunch: add xenstore boot capabilities flag
Date: Sat, 19 Apr 2025 18:08:10 -0400
Message-Id: <20250419220820.4234-29-dpsmith@apertussolutions.com>
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Add the ability to designate a domain as the Xenstore domain via the
hyperlaunch configuration.

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/domain-builder/core.c     | 2 +-
 xen/arch/x86/domain-builder/domain.c   | 2 ++
 xen/arch/x86/domain-builder/fdt.c      | 2 ++
 xen/arch/x86/include/asm/boot-domain.h | 1 +
 4 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/domain-builder/core.c b/xen/arch/x86/domain-builder/core.c
index 2f0b8bd82c3a..e21f5efbfe62 100644
--- a/xen/arch/x86/domain-builder/core.c
+++ b/xen/arch/x86/domain-builder/core.c
@@ -98,7 +98,7 @@ void __init builder_init(struct boot_info *bi)
         bi->mods[i].type = BOOTMOD_KERNEL;
         bi->domains[0].kernel = &bi->mods[i];
         bi->domains[0].capabilities |=
-            (BUILD_CAPS_CONTROL | BUILD_CAPS_HARDWARE);
+            (BUILD_CAPS_CONTROL | BUILD_CAPS_HARDWARE | BUILD_CAPS_XENSTORE);
         bi->nr_domains = 1;
     }
 }
diff --git a/xen/arch/x86/domain-builder/domain.c b/xen/arch/x86/domain-builder/domain.c
index 13f99111a3a9..c1b2e011aaa0 100644
--- a/xen/arch/x86/domain-builder/domain.c
+++ b/xen/arch/x86/domain-builder/domain.c
@@ -250,6 +250,8 @@ struct domain *__init arch_create_dom(
     if ( bd->domid == DOMID_INVALID )
         /* Create initial domain.  Not d0 for pvshim. */
         bd->domid = get_initial_domain_id();
+    if ( bd->capabilities & BUILD_CAPS_XENSTORE )
+        dom_cfg.flags |= XEN_DOMCTL_CDF_xs_domain;
     if ( bd->capabilities & BUILD_CAPS_CONTROL )
         create_flags |= CDF_privileged | CDF_hardware;
     d = domain_create(bd->domid, &dom_cfg,
diff --git a/xen/arch/x86/domain-builder/fdt.c b/xen/arch/x86/domain-builder/fdt.c
index 1af58ed4eb86..9c6c0ae09a24 100644
--- a/xen/arch/x86/domain-builder/fdt.c
+++ b/xen/arch/x86/domain-builder/fdt.c
@@ -269,6 +269,8 @@ static int __init process_domain_node(
                 printk("c");
             if ( bd->capabilities & BUILD_CAPS_HARDWARE )
                 printk(" h");
+            if ( bd->capabilities & BUILD_CAPS_XENSTORE )
+                printk(" x");
             printk("\n");
         }
     }
diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/include/asm/boot-domain.h
index 18d144de2fea..32f1f8fbc4e8 100644
--- a/xen/arch/x86/include/asm/boot-domain.h
+++ b/xen/arch/x86/include/asm/boot-domain.h
@@ -16,6 +16,7 @@ struct boot_domain {
 #define BUILD_CAPS_NONE          (0)
 #define BUILD_CAPS_CONTROL       (1 << 0)
 #define BUILD_CAPS_HARDWARE      (1 << 1)
+#define BUILD_CAPS_XENSTORE      (1 << 2)
     uint32_t capabilities;
 
                                           /* On     | Off    */
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 34/38] x86/hyperlaunch: introduce multidomain kconfig option
Date: Sat, 19 Apr 2025 18:08:16 -0400
Message-Id: <20250419220820.4234-35-dpsmith@apertussolutions.com>
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This adds the MULTIDOMAIN_BUILDER kconfig option that will be used to enable
the domain construction path to be called multiple times. With the idea of
being able to construct multiple domains now introduced, rename construct_dom0()
to construct_dom().

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/dom0_build.c            |  9 +++++----
 xen/arch/x86/domain-builder/Kconfig  | 12 ++++++++++++
 xen/arch/x86/domain-builder/domain.c |  2 +-
 xen/arch/x86/include/asm/bootinfo.h  |  2 +-
 xen/arch/x86/include/asm/setup.h     |  2 +-
 5 files changed, 20 insertions(+), 7 deletions(-)

diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c
index e488a204372b..8c8cb08a6f7e 100644
--- a/xen/arch/x86/dom0_build.c
+++ b/xen/arch/x86/dom0_build.c
@@ -558,15 +558,16 @@ int __init dom0_setup_permissions(struct domain *d)
     return rc;
 }
 
-int __init construct_dom0(struct boot_domain *bd)
+int __init construct_dom(struct boot_domain *bd)
 {
     int rc;
     const struct domain *d = bd->d;
 
     /* Sanity! */
-    BUG_ON(!pv_shim && d->domain_id != 0);
-    BUG_ON(d->vcpu[0] == NULL);
-    BUG_ON(d->vcpu[0]->is_initialised);
+    if ( ! IS_ENABLED(CONFIG_MULTIDOMAIN_BUILDER) )
+        BUG_ON(!pv_shim && bd->d->domain_id != 0);
+    BUG_ON(bd->d->vcpu[0] == NULL);
+    BUG_ON(bd->d->vcpu[0]->is_initialised);
 
     process_pending_softirqs();
 
diff --git a/xen/arch/x86/domain-builder/Kconfig b/xen/arch/x86/domain-builder/Kconfig
index 51d549c20df3..05d7859e6b53 100644
--- a/xen/arch/x86/domain-builder/Kconfig
+++ b/xen/arch/x86/domain-builder/Kconfig
@@ -12,4 +12,16 @@ config DOMAIN_BUILDER
 
 	  If unsure, say N.
 
+config MULTIDOMAIN_BUILDER
+	bool "Multiple domain building (UNSUPPORTED)" if UNSUPPORTED
+	depends on DOMAIN_BUILDER
+	default n
+	help
+      Enables the domain builder capability to build multiple domains
+	  using a flattened device tree.
+
+	  This feature is currently experimental.
+
+	  If unsure, say N.
+
 endmenu
diff --git a/xen/arch/x86/domain-builder/domain.c b/xen/arch/x86/domain-builder/domain.c
index b413a87cc9c9..919df1ffb1c3 100644
--- a/xen/arch/x86/domain-builder/domain.c
+++ b/xen/arch/x86/domain-builder/domain.c
@@ -399,7 +399,7 @@ struct domain *__init arch_create_dom(
     if ( !(bd->capabilities & BUILD_CAPS_HARDWARE) )
         alloc_console_evtchn(bi, bd);
 
-    if ( construct_dom0(bd) != 0 )
+    if ( construct_dom(bd) != 0 )
         panic("Could not construct domain 0\n");
 
     XFREE(cmdline);
diff --git a/xen/arch/x86/include/asm/bootinfo.h b/xen/arch/x86/include/asm/bootinfo.h
index 430ae08cf5ef..298cff303673 100644
--- a/xen/arch/x86/include/asm/bootinfo.h
+++ b/xen/arch/x86/include/asm/bootinfo.h
@@ -17,7 +17,7 @@
 #define MAX_NR_BOOTMODS 63
 
 /* Max number of boot domains that Xen can construct */
-#define MAX_NR_BOOTDOMS 1
+#define MAX_NR_BOOTDOMS 64
 
 /* Boot module binary type / purpose */
 enum bootmod_type {
diff --git a/xen/arch/x86/include/asm/setup.h b/xen/arch/x86/include/asm/setup.h
index 4b8fbdc67e05..3f6850d40d04 100644
--- a/xen/arch/x86/include/asm/setup.h
+++ b/xen/arch/x86/include/asm/setup.h
@@ -27,7 +27,7 @@ void subarch_init_memory(void);
 void init_IRQ(void);
 
 struct boot_domain;
-int construct_dom0(struct boot_domain *bd);
+int construct_dom(struct boot_domain *bd);
 
 const char *cmdline_cook(const char *p, const char *loader_name);
 
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 32/38] x86/hyperlaunch: introduce concept of core domains
Date: Sat, 19 Apr 2025 18:08:14 -0400
Message-Id: <20250419220820.4234-33-dpsmith@apertussolutions.com>
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When constructing domU, and specifically the event channels for their console
and xenstore event channels, the domid for the backing domain must be known.
Therefore, the control, hardware, and xenstore domains are deemed as core
domains, and must be constructed before any of the other domains.

This commit introduces the build_core_domains() function that will ensure the
core domains are constructed first.

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/domain-builder/core.c     | 68 ++++++++++++++++++++++++--
 xen/arch/x86/include/asm/boot-domain.h |  2 +
 2 files changed, 66 insertions(+), 4 deletions(-)

diff --git a/xen/arch/x86/domain-builder/core.c b/xen/arch/x86/domain-builder/core.c
index 901efce62a61..f693aa46d278 100644
--- a/xen/arch/x86/domain-builder/core.c
+++ b/xen/arch/x86/domain-builder/core.c
@@ -103,18 +103,78 @@ void __init builder_init(struct boot_info *bi)
     }
 }
 
+static int  __init build_core_domains(struct boot_info *bi)
+{
+    int count = 0;
+    struct boot_domain *bd;
+    int hw, cd, xs;
+
+    cd = first_boot_domain_index(bi, BUILD_CAPS_CONTROL);
+    if ( cd > MAX_NR_BOOTDOMS )
+        printk(XENLOG_WARNING "No control domain was defined\n");
+    else
+    {
+        bd = &bi->domains[cd];
+
+        arch_create_dom(bi, bd);
+        if ( bd->d )
+        {
+            bd->constructed = true;
+            count++;
+        }
+    }
+
+    hw = first_boot_domain_index(bi, BUILD_CAPS_HARDWARE);
+    if ( hw > MAX_NR_BOOTDOMS )
+        printk(XENLOG_WARNING "No hardware domain was defined\n");
+    else
+    {
+        if ( hw != cd )
+        {
+            bd = &bi->domains[hw];
+
+            arch_create_dom(bi, bd);
+            if ( bd->d )
+            {
+                bd->constructed = true;
+                count++;
+            }
+        }
+    }
+
+    xs = first_boot_domain_index(bi, BUILD_CAPS_XENSTORE);
+    if ( xs > MAX_NR_BOOTDOMS )
+        printk(XENLOG_WARNING "No xenstore domain was defined\n");
+    else
+    {
+        if ( xs != cd && xs != hw )
+        {
+            bd = &bi->domains[xs];
+
+            arch_create_dom(bi, bd);
+            if ( bd->d )
+            {
+                bd->constructed = true;
+                count++;
+            }
+        }
+    }
+
+    return count;
+}
+
 unsigned int __init builder_create_domains(struct boot_info *bi)
 {
     unsigned int build_count = 0;
     struct boot_domain *bd = &bi->domains[0];
 
+    if ( bi->nr_domains == 0 )
+        panic("%s: no domains defined\n", __func__);
+
     if ( bd->kernel == NULL && bd->capabilities & BUILD_CAPS_CONTROL )
         panic("%s: control domain missing kernel\n", __func__);
 
-
-    arch_create_dom(bi, bd);
-    if ( bd->d )
-        build_count++;
+    build_count = build_core_domains(bi);
 
     /* Free temporary buffers. */
     free_boot_modules();
diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/include/asm/boot-domain.h
index df2bfa0c94fa..a574f4941ed3 100644
--- a/xen/arch/x86/include/asm/boot-domain.h
+++ b/xen/arch/x86/include/asm/boot-domain.h
@@ -42,6 +42,8 @@ struct boot_domain {
         xen_pfn_t gfn;
         evtchn_port_t evtchn;
     } console, store;
+
+    bool constructed;
 };
 
 #endif
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 31/38] x86/hyperlaunch: move boot module discard to domain builder
Date: Sat, 19 Apr 2025 18:08:13 -0400
Message-Id: <20250419220820.4234-32-dpsmith@apertussolutions.com>
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Relocate the call to discard boot modules from inside the domain
construction logic to the top level domain builder. This will
ensure modules are not discarded until after all domains have been
constructed.

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/domain-builder/core.c | 5 ++++-
 xen/arch/x86/hvm/dom_build.c       | 3 ---
 xen/arch/x86/pv/dom0_build.c       | 3 ---
 3 files changed, 4 insertions(+), 7 deletions(-)

diff --git a/xen/arch/x86/domain-builder/core.c b/xen/arch/x86/domain-builder/core.c
index e21f5efbfe62..901efce62a61 100644
--- a/xen/arch/x86/domain-builder/core.c
+++ b/xen/arch/x86/domain-builder/core.c
@@ -8,8 +8,8 @@
 #include 
 
 #include 
-#include 
 #include 
+#include 
 
 #include "fdt.h"
 
@@ -116,6 +116,9 @@ unsigned int __init builder_create_domains(struct boot_info *bi)
     if ( bd->d )
         build_count++;
 
+    /* Free temporary buffers. */
+    free_boot_modules();
+
     return build_count;
 }
 
diff --git a/xen/arch/x86/hvm/dom_build.c b/xen/arch/x86/hvm/dom_build.c
index 2798542e5483..a847c2cb16d9 100644
--- a/xen/arch/x86/hvm/dom_build.c
+++ b/xen/arch/x86/hvm/dom_build.c
@@ -854,9 +854,6 @@ static int __init pvh_load_kernel(
         last_addr = ROUNDUP(last_addr, PAGE_SIZE);
     }
 
-    /* Free temporary buffers. */
-    free_boot_modules();
-
     if ( bd->cmdline )
     {
         rc = hvm_copy_to_guest_phys(last_addr, bd->cmdline,
diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c
index c3d269438313..8d941ff4486e 100644
--- a/xen/arch/x86/pv/dom0_build.c
+++ b/xen/arch/x86/pv/dom0_build.c
@@ -865,9 +865,6 @@ static int __init dom0_construct(struct boot_domain *bd)
         init_hypercall_page(d, _p(parms.virt_hypercall));
     }
 
-    /* Free temporary buffers. */
-    free_boot_modules();
-
     /* Set up start info area. */
     si = (start_info_t *)vstartinfo_start;
     clear_page(si);
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [RFC 38/38] tools: introduce hyperlaunch domain late init
Date: Sat, 19 Apr 2025 18:08:20 -0400
Message-Id: <20250419220820.4234-39-dpsmith@apertussolutions.com>
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The late domain init helper is a helper tool for late setup of Xenstore for a
domain that was created by the hypervisor using hyperlaunch.

Signed-off-by: Daniel P. Smith 
---
 .gitignore                        |   1 +
 tools/helpers/Makefile            |  12 +
 tools/helpers/late-init-domains.c | 364 ++++++++++++++++++++++++++++++
 tools/helpers/late-init-domains.h |  18 ++
 tools/helpers/xs-helpers.c        | 117 ++++++++++
 tools/helpers/xs-helpers.h        |  26 +++
 6 files changed, 538 insertions(+)
 create mode 100644 tools/helpers/late-init-domains.c
 create mode 100644 tools/helpers/late-init-domains.h
 create mode 100644 tools/helpers/xs-helpers.c
 create mode 100644 tools/helpers/xs-helpers.h

diff --git a/.gitignore b/.gitignore
index 53f5df000383..7b0c390dbe0d 100644
--- a/.gitignore
+++ b/.gitignore
@@ -122,6 +122,7 @@ tools/flask/utils/flask-label-pci
 tools/helpers/init-dom0less
 tools/helpers/init-xenstore-domain
 tools/helpers/xen-init-dom0
+tools/helpers/late-init-domains
 tools/hotplug/common/hotplugpath.sh
 tools/hotplug/FreeBSD/rc.d/xencommons
 tools/hotplug/FreeBSD/rc.d/xendriverdomain
diff --git a/tools/helpers/Makefile b/tools/helpers/Makefile
index 09590eb5b6f0..26fa079e8b1f 100644
--- a/tools/helpers/Makefile
+++ b/tools/helpers/Makefile
@@ -14,6 +14,7 @@ ifeq ($(CONFIG_ARM),y)
 TARGETS += init-dom0less
 endif
 endif
+TARGETS += late-init-domains
 
 XEN_INIT_DOM0_OBJS = xen-init-dom0.o init-dom-json.o
 $(XEN_INIT_DOM0_OBJS): CFLAGS += $(CFLAGS_libxentoollog)
@@ -39,6 +40,14 @@ $(INIT_DOM0LESS_OBJS): CFLAGS += $(CFLAGS_libxenctrl)
 $(INIT_DOM0LESS_OBJS): CFLAGS += $(CFLAGS_libxenevtchn)
 init-dom0less: LDLIBS += $(call xenlibs-ldlibs,ctrl evtchn toollog store light guest foreignmemory)
 
+LATE_INIT_DOMAINS_OBJS = late-init-domains.o xs-helpers.o init-dom-json.o
+$(LATE_INIT_DOMAINS_OBJS): CFLAGS += $(CFLAGS_libxentoollog)
+$(LATE_INIT_DOMAINS_OBJS): CFLAGS += $(CFLAGS_libxenguest)
+$(LATE_INIT_DOMAINS_OBJS): CFLAGS += $(CFLAGS_libxenlight)
+$(LATE_INIT_DOMAINS_OBJS): CFLAGS += $(CFLAGS_libxenctrl)
+$(LATE_INIT_DOMAINS_OBJS): CFLAGS += $(CFLAGS_libxenstore)
+late-init-domains: LDLIBS += $(call xenlibs-ldlibs,ctrl toollog store light guest)
+
 .PHONY: all
 all: $(TARGETS)
 
@@ -51,6 +60,9 @@ init-xenstore-domain: $(INIT_XENSTORE_DOMAIN_OBJS)
 init-dom0less: $(INIT_DOM0LESS_OBJS)
 	$(CC) $(LDFLAGS) -o $@ $(INIT_DOM0LESS_OBJS) $(LDLIBS) $(APPEND_LDFLAGS)
 
+late-init-domains: $(LATE_INIT_DOMAINS_OBJS)
+	$(CC) $(LDFLAGS) -o $@ $(LATE_INIT_DOMAINS_OBJS) $(LDLIBS)  $(APPEND_LDFLAGS)
+
 .PHONY: install
 install: all
 	$(INSTALL_DIR) $(DESTDIR)$(LIBEXEC_BIN)
diff --git a/tools/helpers/late-init-domains.c b/tools/helpers/late-init-domains.c
new file mode 100644
index 000000000000..06911d2e93d1
--- /dev/null
+++ b/tools/helpers/late-init-domains.c
@@ -0,0 +1,364 @@
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "init-dom-json.h"
+#include "late-init-domains.h"
+#include "xs-helpers.h"
+
+static struct option options[] = {
+    { "console", 0, NULL, 'c' },
+    { "xenstore", 1, NULL, 'x' },
+    { "force", 0, NULL, 'f' },
+    { "verbose", 0, NULL, 'v' },
+    { "help", 0, NULL, 'h' },
+    { NULL, 0, NULL, 0 }
+};
+
+static void usage(void)
+{
+    fprintf(stderr,
+"Usage:\n"
+"\n"
+"late-init-domains \n"
+"\n"
+"where options may include:\n"
+"\n"
+"  --console     configure the console\n"
+"  --xenstore     domain id of the xenstore domain\n"
+"  --force                  force domain introduction even if xenstore entries exist\n"
+"  -v[v[v]]                 verbosity constructing xenstore tree\n"
+"  --help                   help message\n");
+}
+
+#define XS_DOM_PERM(x, d, k, v)                                             \
+    ret = do_xs_write_dom_with_perm(x, d, k, v, perms, num_perms);          \
+    if ( ret != 0 ) return ret                                              \
+
+#define XS_DIR_PERM(x, p, k, v)                                             \
+    ret = do_xs_write_dir_node_with_perm(x, p, k, v, perms, num_perms);     \
+    if ( ret != 0 ) return ret                                              \
+
+static int pages_from_hvm_params(
+    struct xc_interface_core *xch, libxl_dominfo *info,
+    struct system_pages *pgs)
+{
+    int ret;
+    domid_t domid = info->domid;
+
+    ret = xc_hvm_param_get(xch, domid, HVM_PARAM_STORE_EVTCHN,
+                           &pgs->store.evtchn);
+    if (ret != 0) {
+        fprintf(stderr, "err: failed to get dom%d store evtchn\n", domid);
+        return ret;
+    }
+
+    ret = xc_hvm_param_get(xch, domid, HVM_PARAM_STORE_PFN,
+                           &pgs->store.pfn);
+    if (ret < 0) {
+        fprintf(stderr, "err: failed to get dom%d store pfn\n", domid);
+        return ret;
+    }
+
+    if ( pgs->console.enabled )
+    {
+        ret = xc_hvm_param_get(xch, domid, HVM_PARAM_CONSOLE_EVTCHN,
+                              &pgs->console.evtchn);
+        if (ret != 0) {
+            fprintf(stderr, "warn: console for dom%d not configured\n", domid);
+            pgs->console.evtchn = pgs->console.pfn = 0;
+            return 0;
+        }
+
+        ret = xc_hvm_param_get(xch, domid, HVM_PARAM_CONSOLE_PFN,
+                               &pgs->console.pfn);
+        if (ret < 0) {
+            fprintf(stderr, "warn: console for dom%d not configured\n", domid);
+            pgs->console.evtchn = pgs->console.pfn = 0;
+            return 0;
+        }
+    }
+
+    return 0;
+}
+
+static int create_xs_entries(
+    struct xs_handle *xsh, struct system_pages *pgs, libxl_dominfo *di)
+{
+    char path[128], value[16];
+    struct xs_permissions perms[2] = {
+        {.id = pgs->store.be_domid, .perms = XS_PERM_NONE},
+        {.id = di->domid, .perms = XS_PERM_READ},
+    };
+    uint32_t num_perms = (sizeof(perms) / sizeof((perms)[0]));
+    int ret = 0;
+
+    while ( do_xs_start_transaction(xsh) == 0 )
+    {
+        XS_DOM_PERM(xsh, di->domid, "", "");
+
+        snprintf(value, 16, "%d", di->domid);
+        XS_DOM_PERM(xsh, di->domid, "domid", value);
+
+        XS_DOM_PERM(xsh, di->domid, "memory", "");
+        snprintf(value, 16, "%" PRIu64, di->current_memkb);
+        XS_DOM_PERM(xsh, di->domid, "memory/target", value);
+
+        snprintf(value, 16, "%" PRIu64, di->max_memkb);
+        XS_DOM_PERM(xsh, di->domid, "memory/static-max", value);
+
+        XS_DOM_PERM(xsh, di->domid, "store", "");
+        snprintf(value, 16, "%" PRIu64, pgs->store.evtchn);
+        XS_DOM_PERM(xsh, di->domid, "store/port", value);
+
+        snprintf(value, 16, "%" PRIu64, pgs->store.pfn);
+        XS_DOM_PERM(xsh, di->domid, "store/ring-ref", value);
+
+        if ( pgs->console.enabled && pgs->console.evtchn )
+        {
+            char be_path[64], fe_path[64];
+
+            snprintf(fe_path, 64, "/local/domain/%d/console", di->domid);
+            snprintf(be_path, 64, "/local/domain/%d/backend/console/%d/0",
+                     pgs->console.be_domid, di->domid);
+
+            /* Backend entries */
+            XS_DIR_PERM(xsh, be_path, "", "");
+            snprintf(value, 16, "%d", di->domid);
+            XS_DIR_PERM(xsh, be_path, "frontend-id", value);
+            XS_DIR_PERM(xsh, be_path, "frontend", fe_path);
+            XS_DIR_PERM(xsh, be_path, "online", "1");
+            XS_DIR_PERM(xsh, be_path, "protocol", "vt100");
+
+            snprintf(value, 16, "%d", XenbusStateInitialising);
+            XS_DIR_PERM(xsh, be_path, "state", value);
+
+            /* Frontend entries */
+            XS_DOM_PERM(xsh, di->domid, "console", "");
+            snprintf(value, 16, "%d", pgs->console.be_domid);
+            XS_DIR_PERM(xsh, fe_path, "backend", be_path);
+            XS_DIR_PERM(xsh, fe_path, "backend-id", value);
+            XS_DIR_PERM(xsh, fe_path, "limit", "1048576");
+            XS_DIR_PERM(xsh, fe_path, "type", "xenconsoled");
+            XS_DIR_PERM(xsh, fe_path, "output", "pty");
+            XS_DIR_PERM(xsh, fe_path, "tty", "");
+
+            snprintf(value, 16, "%" PRIu64, pgs->console.evtchn);
+            XS_DIR_PERM(xsh, fe_path, "port", value);
+
+            snprintf(value, 16, "%" PRIu64, pgs->console.pfn);
+            XS_DIR_PERM(xsh, fe_path, "ring-ref", value);
+
+        }
+
+        snprintf(path, 128, "/libxl/%u", di->domid);
+        switch ( di->domain_type )
+        {
+        case LIBXL_DOMAIN_TYPE_PV:
+            XS_DIR_PERM(xsh, path, "type", "pv");
+            break;
+        case LIBXL_DOMAIN_TYPE_PVH:
+            XS_DIR_PERM(xsh, path, "type", "pvh");
+            break;
+        case LIBXL_DOMAIN_TYPE_HVM:
+            XS_DIR_PERM(xsh, path, "type", "hvm");
+            break;
+        default:
+            break;
+        }
+
+        ret = do_xs_end_transaction(xsh);
+        switch ( ret )
+        {
+        case 0:
+            break; /* proceed to loop break */
+        case -EAGAIN:
+            continue; /* try again */
+        default:
+            return ret; /* failed */
+        }
+
+        break;
+    }
+
+    return ret;
+}
+
+static bool init_domain(
+    struct xc_interface_core *xch, struct xs_handle *xsh,
+    struct system_pages *pgs, libxl_dominfo *di)
+{
+    xen_pfn_t con_pfn = 0L;
+    /*xc_dom_gnttab_seed will do nothing if front == back */
+    uint32_t con_domid = di->domid;
+    bool is_hvm = (di->domain_type == LIBXL_DOMAIN_TYPE_HVM ||
+                   di->domain_type == LIBXL_DOMAIN_TYPE_PVH);
+    int ret;
+
+    if ( (ret = pages_from_hvm_params(xch, di, pgs)) != 0 )
+    {
+        fprintf(stderr, "error(%d): unable to fetch dom%d system pages\n", ret,
+                di->domid);
+        return false;
+    }
+
+    if ( pgs->console.enabled && pgs->console.evtchn )
+    {
+        con_domid = pgs->console.be_domid;
+        con_pfn = pgs->console.pfn;
+    }
+
+    ret = xc_dom_gnttab_seed(xch, di->domid, is_hvm, con_pfn,
+            pgs->store.pfn, con_domid, pgs->store.be_domid);
+    if ( ret != 0 )
+    {
+        fprintf(stderr, "error (%d) setting up grant tables for dom%d\n",
+                ret, di->domid);
+        return false;
+    }
+
+    libxl_uuid_generate(&di->uuid);
+    xc_domain_sethandle(xch, di->domid,
+                        libxl_uuid_bytearray(&di->uuid));
+
+    if ( (ret = gen_stub_json_config(di->domid, &di->uuid)) != 0 )
+        fprintf(stderr, "warn(%d): unable generate dom%d json stub\n", ret,
+                di->domid);
+
+    if ( (ret = create_xs_entries(xsh, pgs, di)) != 0 )
+    {
+        fprintf(stderr, "error(%d): unable create dom%d xenstore entries\n",
+                ret, di->domid);
+        return false;
+    }
+
+    if ( !xs_introduce_domain(xsh, di->domid, pgs->store.pfn,
+                              pgs->store.evtchn) )
+    {
+        fprintf(stderr, "error introducing dom%d\n", di->domid);
+        return false;
+    }
+
+    return true;
+}
+
+int main(int argc, char** argv)
+{
+    int opt, ret, i, nb_vm = 0, count = 0;
+    bool force = false;
+    struct xs_handle *xsh = NULL;
+    struct xc_interface_core *xch = NULL;
+    xentoollog_level minmsglevel = XTL_PROGRESS;
+    xentoollog_logger *logger = NULL;
+    libxl_dominfo *info = NULL;
+    libxl_ctx *ctx;
+    struct system_pages pages = { {0} };
+
+    while ( (opt = getopt_long(argc, argv, "c:x:fv", options, NULL)) != -1 )
+    {
+        switch ( opt )
+        {
+        case 'c':
+            pages.console.be_domid = strtol(optarg, NULL, 10);
+            pages.console.enabled = true;
+            break;
+        case 'x':
+            pages.store.be_domid = strtol(optarg, NULL, 10);
+            break;
+        case 'f':
+            force = true;
+            break;
+        case 'v':
+            if ( minmsglevel > 1 )
+                minmsglevel--;
+            break;
+        case 'h':
+            usage();
+            return 0;
+        default:
+            usage();
+            return 2;
+        }
+    }
+
+    if ( optind != argc )
+    {
+        usage();
+        return 1;
+    }
+
+    logger = (xentoollog_logger *)xtl_createlogger_stdiostream(stderr,
+                                                               minmsglevel, 0);
+
+    xsh = xs_open(0);
+    xch = xc_interface_open(0, 0, 0);
+    if ( xsh == NULL || xch == NULL )
+    {
+        fprintf(stderr, "error: unable to connect to xs and/or xc interface\n");
+        ret = 1;
+        goto out;
+    }
+
+    ret = libxl_ctx_alloc(&ctx, LIBXL_VERSION, 0, NULL);
+    if (ret) {
+        fprintf(stderr, "cannot init xl context\n");
+        goto out;
+    }
+
+    info = libxl_list_domain(ctx, &nb_vm);
+    if (!info) {
+        fprintf(stderr, "libxl_list_vm failed.\n");
+        ret = 1;
+        goto out;
+    }
+
+    for (i = 0; i < nb_vm; i++) {
+        domid_t domid = info[i].domid;
+
+        /* Don't need to check for Dom0 */
+        if (!domid)
+            continue;
+
+        if ( xs_is_domain_introduced(xsh, domid) )
+        {
+            if ( !force )
+                continue;
+
+            fprintf(stderr, "warning: re-introducting domain %d\n", domid);
+        }
+
+        if ( init_domain(xch, xsh, &pages, &info[i]) )
+            count++;
+    }
+
+    printf("initialized %d out of %d domains\n", count, nb_vm);
+
+    ret = 0;
+
+out:
+    if ( info )
+        libxl_dominfo_list_free(info, nb_vm);
+
+    if ( xsh )
+        xs_close(xsh);
+
+    if ( xch )
+        xc_interface_close(xch);
+
+    if ( logger )
+        xtl_logger_destroy(logger);
+
+    return ret;
+}
diff --git a/tools/helpers/late-init-domains.h b/tools/helpers/late-init-domains.h
new file mode 100644
index 000000000000..8d071ef82ea0
--- /dev/null
+++ b/tools/helpers/late-init-domains.h
@@ -0,0 +1,18 @@
+#ifndef __LATE_INIT_PV_H
+#define __LATE_INIT_PV_H
+
+struct system_pages {
+    struct {
+        uint16_t be_domid;
+        uint64_t evtchn;
+        uint64_t pfn;
+    } store;
+    struct {
+        bool enabled;
+        uint16_t be_domid;
+        uint64_t evtchn;
+        uint64_t pfn;
+    } console;
+};
+
+#endif
diff --git a/tools/helpers/xs-helpers.c b/tools/helpers/xs-helpers.c
new file mode 100644
index 000000000000..a4d2bebbbd54
--- /dev/null
+++ b/tools/helpers/xs-helpers.c
@@ -0,0 +1,117 @@
+
+#include 
+#include 
+#include 
+#include 
+
+#define MAX_XS_PAATH 100
+
+static xs_transaction_t t_id = XBT_NULL;
+
+int do_xs_start_transaction(struct xs_handle *xsh)
+{
+    t_id = xs_transaction_start(xsh);
+    if (t_id == XBT_NULL)
+        return -errno;
+
+    return 0;
+}
+
+int do_xs_end_transaction(struct xs_handle *xsh)
+{
+    if ( t_id == XBT_NULL )
+        return -EINVAL;
+
+    if (!xs_transaction_end(xsh, t_id, false))
+        return -errno;
+
+    return 0;
+}
+
+int do_xs_write(struct xs_handle *xsh, char *path, char *val)
+{
+    if ( !xs_write(xsh, t_id, path, val, strlen(val)) )
+    {
+        fprintf(stderr, "failed write: %s\n", path);
+        return -errno;
+    }
+
+    return 0;
+}
+
+int do_xs_perms(
+    struct xs_handle *xsh, char *path, struct xs_permissions *perms,
+    uint32_t num_perms)
+{
+    if ( !xs_set_permissions(xsh, t_id, path, perms, num_perms) )
+    {
+        fprintf(stderr, "failed set perm: %s\n", path);
+        return -errno;
+    }
+
+    return 0;
+}
+
+int do_xs_write_dir_node_with_perm(
+    struct xs_handle *xsh, char *dir, char *node, char *val,
+    struct xs_permissions *perms, uint32_t num_perms)
+{
+    char full_path[MAX_XS_PAATH];
+    int ret = 0;
+
+    /*
+     * mainly for creating a value holding node, but
+     * also support creating directory nodes.
+     */
+    if ( strlen(node) != 0 )
+        snprintf(full_path, MAX_XS_PAATH, "%s/%s", dir, node);
+    else
+        snprintf(full_path, MAX_XS_PAATH, "%s", dir);
+
+    ret = do_xs_write(xsh, full_path, val);
+    if ( ret < 0 )
+        return ret;
+
+    if ( perms != NULL && num_perms > 0 )
+        ret = do_xs_perms(xsh, full_path, perms, num_perms);
+
+    return ret;
+}
+
+int do_xs_write_dir_node(
+    struct xs_handle *xsh, char *dir, char *node, char *val)
+{
+    return do_xs_write_dir_node_with_perm(xsh, dir, node, val, NULL, 0);
+}
+
+int do_xs_write_dom_with_perm(
+    struct xs_handle *xsh, uint32_t domid, char *path, char *val,
+    struct xs_permissions *perms, uint32_t num_perms)
+{
+    char full_path[MAX_XS_PAATH];
+    int ret = 0;
+
+    /*
+     * mainly for creating a value holding node, but
+     * also support creating directory nodes.
+     */
+    if ( strlen(path) != 0 )
+        snprintf(full_path, MAX_XS_PAATH, "/local/domain/%d/%s", domid, path);
+    else
+        snprintf(full_path, MAX_XS_PAATH, "/local/domain/%d", domid);
+
+    ret = do_xs_write(xsh, full_path, val);
+    if ( ret < 0 )
+        return ret;
+
+    if ( perms != NULL && num_perms > 0 )
+        ret = do_xs_perms(xsh, full_path, perms, num_perms);
+
+    return ret;
+}
+
+int do_xs_write_dom(
+    struct xs_handle *xsh, uint32_t domid, char *path, char *val)
+{
+    return do_xs_write_dom_with_perm(xsh, domid, path, val, NULL, 0);
+}
diff --git a/tools/helpers/xs-helpers.h b/tools/helpers/xs-helpers.h
new file mode 100644
index 000000000000..89585637d4bb
--- /dev/null
+++ b/tools/helpers/xs-helpers.h
@@ -0,0 +1,26 @@
+#ifndef __XS_HELPERS_H
+#define __XS_HELPERS_H
+
+#include 
+
+int do_xs_start_transaction(struct xs_handle *xsh);
+int do_xs_end_transaction(struct xs_handle *xsh);
+
+int do_xs_write(struct xs_handle *xsh, char *path, char *val);
+int do_xs_perms(
+    struct xs_handle *xsh, char *path, struct xs_permissions *perms,
+    uint32_t num_perms);
+
+int do_xs_write_dir_node_with_perm(
+    struct xs_handle *xsh, char *dir, char *node, char *val,
+    struct xs_permissions *perms, uint32_t num_perms);
+int do_xs_write_dir_node(
+    struct xs_handle *xsh, char *dir, char *node, char *val);
+
+int do_xs_write_dom_with_perm(
+    struct xs_handle *xsh, uint32_t domid, char *path, char *val,
+    struct xs_permissions *perms, uint32_t num_perms);
+int do_xs_write_dom(
+    struct xs_handle *xsh, uint32_t domid, char *path, char *val);
+
+#endif
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 29/38] x86/hyperlaunch: allocate console for domu
Date: Sat, 19 Apr 2025 18:08:11 -0400
Message-Id: <20250419220820.4234-30-dpsmith@apertussolutions.com>
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In-Reply-To: <20250419220820.4234-1-dpsmith@apertussolutions.com>
References: <20250419220820.4234-1-dpsmith@apertussolutions.com>
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During domU construction, a page of memory and an event channel must be setup
for the console connection. In this commit, a page from the special page region
of domU is setup as the console page along with an event channel. The page
address and event channel are published in the HVM parameters, so they may be
published in Xenstore once it is online.

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/domain-builder/domain.c   | 56 ++++++++++++++++++++++++++
 xen/arch/x86/hvm/dom_build.c           | 34 ++++++++++++++++
 xen/arch/x86/include/asm/boot-domain.h |  7 ++++
 3 files changed, 97 insertions(+)

diff --git a/xen/arch/x86/domain-builder/domain.c b/xen/arch/x86/domain-builder/domain.c
index c1b2e011aaa0..7ce069a57c5d 100644
--- a/xen/arch/x86/domain-builder/domain.c
+++ b/xen/arch/x86/domain-builder/domain.c
@@ -6,6 +6,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -187,6 +188,58 @@ void __init alloc_dom_vcpus(struct domain *d)
     domain_update_node_affinity(d);
 }
 
+static int __init alloc_dom_evtchn(
+    const struct boot_domain *d, const struct boot_domain *r,
+    evtchn_alloc_unbound_t *ec)
+{
+    int rc;
+
+    ec->dom = d->domid;
+    ec->remote_dom = r->domid;
+
+    rc = evtchn_alloc_unbound(ec, 0);
+    if ( rc )
+    {
+        printk(XENLOG_WARNING "Failed allocating event channel for %pd\n",
+               d->d);
+        return rc;
+    }
+
+    return 0;
+}
+
+static int __init alloc_console_evtchn(
+    const struct boot_info *bi, struct boot_domain *bd)
+{
+    evtchn_alloc_unbound_t evtchn_req;
+    const struct boot_domain *hwdom;
+    int idx, rc;
+
+    idx = first_boot_domain_index(bi, BUILD_CAPS_HARDWARE);
+    if ( idx < 0 )
+    {
+        printk(XENLOG_WARNING "No backing hardware domain for %pd console\n",
+               bd->d);
+        return -EINVAL;
+    }
+
+    if ( bi->domains[idx].d )
+        hwdom = &bi->domains[idx];
+    else
+    {
+        printk(XENLOG_WARNING "Hardware domain for %pd console not constructed\n",
+               bd->d);
+        return -EINVAL;
+    }
+
+    if ( (rc = alloc_dom_evtchn(bd, hwdom, &evtchn_req)) < 0 )
+        return rc;
+
+    bd->console.evtchn = evtchn_req.port;
+
+    return 0;
+}
+
 static size_t __init domain_cmdline_size(
     struct boot_info *bi, struct boot_domain *bd)
 {
@@ -309,6 +362,9 @@ struct domain *__init arch_create_dom(
         bd->cmdline = cmdline;
     }
 
+   if ( !(bd->capabilities & BUILD_CAPS_HARDWARE) )
+       alloc_console_evtchn(bi, bd);
+
     if ( construct_dom0(bd) != 0 )
         panic("Could not construct domain 0\n");
 
diff --git a/xen/arch/x86/hvm/dom_build.c b/xen/arch/x86/hvm/dom_build.c
index c482d5c2d974..934ae138e58f 100644
--- a/xen/arch/x86/hvm/dom_build.c
+++ b/xen/arch/x86/hvm/dom_build.c
@@ -9,6 +9,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -19,6 +20,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -899,6 +901,35 @@ static int __init pvh_load_kernel(
     return 0;
 }
 
+static int __init alloc_console_page(struct boot_domain *bd)
+{
+    paddr_t con_addr = special_pfn(SPECIALPAGE_CONSOLE) << PAGE_SHIFT;
+    uint32_t fields[4] = { 0 };
+
+    if ( !port_is_valid(bd->d, bd->console.evtchn) )
+    {
+        printk("No event channel available for %pd console\n", bd->d);
+        return -EINVAL;
+    }
+
+    /*
+     * Clear the xencons_interface fields that are located after a 1024 rx and
+     * a 2048 tx buffer, 3072 bytes.
+     */
+    if ( hvm_copy_to_guest_phys(con_addr + 3072, fields, sizeof(fields),
+                                bd->d->vcpu[0]) )
+    {
+        printk("Unable to set xenstore connection state\n");
+        return -EFAULT;
+    }
+
+    bd->console.gfn = PFN_DOWN(con_addr);
+    bd->d->arch.hvm.params[HVM_PARAM_CONSOLE_PFN] = bd->console.gfn;
+    bd->d->arch.hvm.params[HVM_PARAM_CONSOLE_EVTCHN] = bd->console.evtchn;
+
+    return 0;
+}
+
 int __init dom_construct_pvh(struct boot_domain *bd)
 {
     paddr_t entry, start_info;
@@ -975,6 +1006,9 @@ int __init dom_construct_pvh(struct boot_domain *bd)
         return rc;
     }
 
+    if ( !is_hardware_domain(bd->d) )
+        alloc_console_page(bd);
+
     if ( opt_dom0_verbose )
     {
         printk("Dom%u memory map:\n", bd->domid);
diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/include/asm/boot-domain.h
index 32f1f8fbc4e8..cb6e1fab23ba 100644
--- a/xen/arch/x86/include/asm/boot-domain.h
+++ b/xen/arch/x86/include/asm/boot-domain.h
@@ -5,6 +5,9 @@
  * Copyright (c) 2024 Christopher Clark 
  */
 
+#include 
+#include 
+
 #ifndef __XEN_X86_BOOTDOMAIN_H__
 #define __XEN_X86_BOOTDOMAIN_H__
 
@@ -35,6 +38,10 @@ struct boot_domain {
     const char *cmdline;
 
     struct domain *d;
+    struct {
+        xen_pfn_t gfn;
+        evtchn_port_t evtchn;
+    } console;
 };
 
 #endif
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 22/38] x86/hyperlaunch: relocate pvh_steal_ram to domain builder
Date: Sat, 19 Apr 2025 18:08:04 -0400
Message-Id: <20250419220820.4234-23-dpsmith@apertussolutions.com>
X-Mailer: git-send-email 2.30.2
In-Reply-To: <20250419220820.4234-1-dpsmith@apertussolutions.com>
References: <20250419220820.4234-1-dpsmith@apertussolutions.com>
MIME-Version: 1.0
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The function pvh_steal_ram() is not pvh specific and can be used on any HVM
domain. Move to the domain builder and rename to hvm_steal_ram.

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/hvm/dom0_build.c             | 106 +++-------------------
 xen/arch/x86/hvm/dom_build.c              |  84 +++++++++++++++++
 xen/arch/x86/include/asm/domain-builder.h |   7 ++
 3 files changed, 102 insertions(+), 95 deletions(-)

diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build.c
index 23b46ef86c9f..11dfc54f5ab2 100644
--- a/xen/arch/x86/hvm/dom0_build.c
+++ b/xen/arch/x86/hvm/dom0_build.c
@@ -182,90 +182,6 @@ int __init pvh_populate_memory_range(
     return 0;
 }
 
-/* Steal RAM from the end of a memory region. */
-static int __init pvh_steal_ram(struct domain *d, unsigned long size,
-                                unsigned long align, paddr_t limit,
-                                paddr_t *addr)
-{
-    unsigned int i = d->arch.nr_e820;
-
-    /*
-     * Alignment 0 should be set to 1, so it doesn't wrap around in the
-     * calculations below.
-     */
-    align = align ? : 1;
-    while ( i-- )
-    {
-        struct e820entry *entry = &d->arch.e820[i];
-
-        if ( entry->type != E820_RAM || entry->addr + entry->size > limit )
-            continue;
-
-        *addr = (entry->addr + entry->size - size) & ~(align - 1);
-        if ( *addr < entry->addr ||
-             /* Don't steal from the low 1MB due to the copying done there. */
-             *addr < MB(1) )
-            continue;
-
-        entry->size = *addr - entry->addr;
-        return 0;
-    }
-
-    return -ENOMEM;
-}
-
-/* NB: memory map must be sorted at all times for this to work correctly. */
-static int __init pvh_add_mem_range(struct domain *d, uint64_t s, uint64_t e,
-                                    unsigned int type)
-{
-    struct e820entry *map;
-    unsigned int i;
-
-    for ( i = 0; i < d->arch.nr_e820; i++ )
-    {
-        uint64_t rs = d->arch.e820[i].addr;
-        uint64_t re = rs + d->arch.e820[i].size;
-
-        if ( rs == e && d->arch.e820[i].type == type )
-        {
-            d->arch.e820[i].addr = s;
-            return 0;
-        }
-
-        if ( re == s && d->arch.e820[i].type == type &&
-             (i + 1 == d->arch.nr_e820 || d->arch.e820[i + 1].addr >= e) )
-        {
-            d->arch.e820[i].size += e - s;
-            return 0;
-        }
-
-        if ( rs >= e )
-            break;
-
-        if ( re > s )
-            return -EEXIST;
-    }
-
-    map = xzalloc_array(struct e820entry, d->arch.nr_e820 + 1);
-    if ( !map )
-    {
-        printk(XENLOG_WARNING "E820: out of memory to add region\n");
-        return -ENOMEM;
-    }
-
-    memcpy(map, d->arch.e820, i * sizeof(*d->arch.e820));
-    memcpy(map + i + 1, d->arch.e820 + i,
-           (d->arch.nr_e820 - i) * sizeof(*d->arch.e820));
-    map[i].addr = s;
-    map[i].size = e - s;
-    map[i].type = type;
-    xfree(d->arch.e820);
-    d->arch.e820 = map;
-    d->arch.nr_e820++;
-
-    return 0;
-}
-
 static int __init pvh_setup_vmx_realmode_helpers(struct domain *d)
 {
     uint32_t rc, *ident_pt;
@@ -279,14 +195,14 @@ static int __init pvh_setup_vmx_realmode_helpers(struct domain *d)
      * TSS structure (which accounts for the first 104b) doesn't cross
      * a page boundary.
      */
-    if ( !pvh_steal_ram(d, HVM_VM86_TSS_SIZE, 128, GB(4), &gaddr) )
+    if ( !hvm_steal_ram(d, HVM_VM86_TSS_SIZE, 128, GB(4), &gaddr) )
     {
         if ( hvm_copy_to_guest_phys(gaddr, NULL, HVM_VM86_TSS_SIZE, v) !=
              HVMTRANS_okay )
             printk("Unable to zero VM86 TSS area\n");
         d->arch.hvm.params[HVM_PARAM_VM86_TSS_SIZED] =
             VM86_TSS_UPDATED | ((uint64_t)HVM_VM86_TSS_SIZE << 32) | gaddr;
-        if ( pvh_add_mem_range(d, gaddr, gaddr + HVM_VM86_TSS_SIZE,
+        if ( hvm_add_mem_range(d, gaddr, gaddr + HVM_VM86_TSS_SIZE,
                                E820_RESERVED) )
             printk("Unable to set VM86 TSS as reserved in the memory map\n");
     }
@@ -294,7 +210,7 @@ static int __init pvh_setup_vmx_realmode_helpers(struct domain *d)
         printk("Unable to allocate VM86 TSS area\n");
 
     /* Steal some more RAM for the identity page tables. */
-    if ( pvh_steal_ram(d, PAGE_SIZE, PAGE_SIZE, GB(4), &gaddr) )
+    if ( hvm_steal_ram(d, PAGE_SIZE, PAGE_SIZE, GB(4), &gaddr) )
     {
         printk("Unable to find memory to stash the identity page tables\n");
         return -ENOMEM;
@@ -316,7 +232,7 @@ static int __init pvh_setup_vmx_realmode_helpers(struct domain *d)
     unmap_domain_page(ident_pt);
     put_page(mfn_to_page(mfn));
     d->arch.hvm.params[HVM_PARAM_IDENT_PT] = gaddr;
-    if ( pvh_add_mem_range(d, gaddr, gaddr + PAGE_SIZE, E820_RESERVED) )
+    if ( hvm_add_mem_range(d, gaddr, gaddr + PAGE_SIZE, E820_RESERVED) )
             printk("Unable to set identity page tables as reserved in the memory map\n");
 
     return 0;
@@ -581,7 +497,7 @@ static int __init pvh_setup_acpi_madt(struct domain *d, paddr_t *addr)
     madt->header.checksum -= acpi_tb_checksum(ACPI_CAST_PTR(u8, madt), size);
 
     /* Place the new MADT in guest memory space. */
-    if ( pvh_steal_ram(d, size, 0, GB(4), addr) )
+    if ( hvm_steal_ram(d, size, 0, GB(4), addr) )
     {
         printk("Unable to steal guest RAM for MADT\n");
         rc = -ENOMEM;
@@ -589,7 +505,7 @@ static int __init pvh_setup_acpi_madt(struct domain *d, paddr_t *addr)
     }
 
     /* Mark this region as E820_ACPI. */
-    if ( pvh_add_mem_range(d, *addr, *addr + size, E820_ACPI) )
+    if ( hvm_add_mem_range(d, *addr, *addr + size, E820_ACPI) )
         printk("Unable to add MADT region to memory map\n");
 
     rc = hvm_copy_to_guest_phys(*addr, madt, size, d->vcpu[0]);
@@ -769,7 +685,7 @@ static int __init pvh_setup_acpi_xsdt(struct domain *d, paddr_t madt_addr,
     xsdt->header.checksum -= acpi_tb_checksum(ACPI_CAST_PTR(u8, xsdt), size);
 
     /* Place the new XSDT in guest memory space. */
-    if ( pvh_steal_ram(d, size, 0, GB(4), addr) )
+    if ( hvm_steal_ram(d, size, 0, GB(4), addr) )
     {
         printk("Unable to find guest RAM for XSDT\n");
         rc = -ENOMEM;
@@ -777,7 +693,7 @@ static int __init pvh_setup_acpi_xsdt(struct domain *d, paddr_t madt_addr,
     }
 
     /* Mark this region as E820_ACPI. */
-    if ( pvh_add_mem_range(d, *addr, *addr + size, E820_ACPI) )
+    if ( hvm_add_mem_range(d, *addr, *addr + size, E820_ACPI) )
         printk("Unable to add XSDT region to memory map\n");
 
     rc = hvm_copy_to_guest_phys(*addr, xsdt, size, d->vcpu[0]);
@@ -823,7 +739,7 @@ int __init dom0_pvh_setup_acpi(struct domain *d, paddr_t start_info)
         if ( strncmp(sig, ACPI_SIG_MADT, ACPI_NAME_SIZE)
              ? pvh_acpi_table_allowed(sig, addr, size)
              : !acpi_memory_banned(addr, size) )
-             pvh_add_mem_range(d, addr, addr + size, E820_ACPI);
+             hvm_add_mem_range(d, addr, addr + size, E820_ACPI);
     }
 
     /* Identity map ACPI e820 regions. */
@@ -892,14 +808,14 @@ int __init dom0_pvh_setup_acpi(struct domain *d, paddr_t start_info)
      * the native RSDT, and should not be used for the Dom0 kernel's boot
      * purposes (we keep it visible for post boot access).
      */
-    if ( pvh_steal_ram(d, sizeof(rsdp), 0, GB(4), &rsdp_paddr) )
+    if ( hvm_steal_ram(d, sizeof(rsdp), 0, GB(4), &rsdp_paddr) )
     {
         printk("Unable to allocate guest RAM for RSDP\n");
         return -ENOMEM;
     }
 
     /* Mark this region as E820_ACPI. */
-    if ( pvh_add_mem_range(d, rsdp_paddr, rsdp_paddr + sizeof(rsdp),
+    if ( hvm_add_mem_range(d, rsdp_paddr, rsdp_paddr + sizeof(rsdp),
                            E820_ACPI) )
         printk("Unable to add RSDP region to memory map\n");
 
diff --git a/xen/arch/x86/hvm/dom_build.c b/xen/arch/x86/hvm/dom_build.c
index 2e47ca489a71..f997f293f329 100644
--- a/xen/arch/x86/hvm/dom_build.c
+++ b/xen/arch/x86/hvm/dom_build.c
@@ -278,6 +278,38 @@ static int __init hvm_populate_p2m(struct domain *d)
     return 0;
 }
 
+/* Steal RAM from the end of a memory region. */
+int __init hvm_steal_ram(
+    struct domain *d, unsigned long size, unsigned long align, paddr_t limit,
+    paddr_t *addr)
+{
+    unsigned int i = d->arch.nr_e820;
+
+    /*
+     * Alignment 0 should be set to 1, so it doesn't wrap around in the
+     * calculations below.
+     */
+    align = align ? : 1;
+    while ( i-- )
+    {
+        struct e820entry *entry = &d->arch.e820[i];
+
+        if ( entry->type != E820_RAM || entry->addr + entry->size > limit )
+            continue;
+
+        *addr = (entry->addr + entry->size - size) & ~(align - 1);
+        if ( *addr < entry->addr ||
+             /* Don't steal from the low 1MB due to the copying done there. */
+             *addr < MB(1) )
+            continue;
+
+        entry->size = *addr - entry->addr;
+        return 0;
+    }
+
+    return -ENOMEM;
+}
+
 static paddr_t __init find_memory(
     const struct domain *d, const struct elf_binary *elf, size_t size)
 {
@@ -324,6 +356,58 @@ static paddr_t __init find_memory(
     return INVALID_PADDR;
 }
 
+/* NB: memory map must be sorted at all times for this to work correctly. */
+int __init hvm_add_mem_range(
+    struct domain *d, uint64_t s, uint64_t e, unsigned int type)
+{
+    struct e820entry *map;
+    unsigned int i;
+
+    for ( i = 0; i < d->arch.nr_e820; i++ )
+    {
+        uint64_t rs = d->arch.e820[i].addr;
+        uint64_t re = rs + d->arch.e820[i].size;
+
+        if ( rs == e && d->arch.e820[i].type == type )
+        {
+            d->arch.e820[i].addr = s;
+            return 0;
+        }
+
+        if ( re == s && d->arch.e820[i].type == type &&
+             (i + 1 == d->arch.nr_e820 || d->arch.e820[i + 1].addr >= e) )
+        {
+            d->arch.e820[i].size += e - s;
+            return 0;
+        }
+
+        if ( rs >= e )
+            break;
+
+        if ( re > s )
+            return -EEXIST;
+    }
+
+    map = xzalloc_array(struct e820entry, d->arch.nr_e820 + 1);
+    if ( !map )
+    {
+        printk(XENLOG_WARNING "E820: out of memory to add region\n");
+        return -ENOMEM;
+    }
+
+    memcpy(map, d->arch.e820, i * sizeof(*d->arch.e820));
+    memcpy(map + i + 1, d->arch.e820 + i,
+           (d->arch.nr_e820 - i) * sizeof(*d->arch.e820));
+    map[i].addr = s;
+    map[i].size = e - s;
+    map[i].type = type;
+    xfree(d->arch.e820);
+    d->arch.e820 = map;
+    d->arch.nr_e820++;
+
+    return 0;
+}
+
 static bool __init check_load_address(
     const struct domain *d, const struct elf_binary *elf)
 {
diff --git a/xen/arch/x86/include/asm/domain-builder.h b/xen/arch/x86/include/asm/domain-builder.h
index fa6fa60841ab..ee91edc3c4d1 100644
--- a/xen/arch/x86/include/asm/domain-builder.h
+++ b/xen/arch/x86/include/asm/domain-builder.h
@@ -9,10 +9,17 @@ int __init builder_get_cmdline(
 
 void builder_init(struct boot_info *bi);
 
+int hvm_add_mem_range(
+    struct domain *d, uint64_t s, uint64_t e, unsigned int type);
+
 int hvm_setup_cpus(struct domain *d, paddr_t entry, paddr_t start_info);
 int pvh_populate_memory_range(
     struct domain *d, unsigned long start, unsigned long nr_pages);
 
+int hvm_steal_ram(
+    struct domain *d, unsigned long size, unsigned long align, paddr_t limit,
+    paddr_t *addr);
+
 unsigned long dom_paging_pages(
     const struct boot_domain *d, unsigned long nr_pages);
 
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 24/38] x86/boot: export command line processing
Date: Sat, 19 Apr 2025 18:08:06 -0400
Message-Id: <20250419220820.4234-25-dpsmith@apertussolutions.com>
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Export the function cmdline_cook() so that it can be called outside of setup.c.

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/include/asm/setup.h | 2 ++
 xen/arch/x86/setup.c             | 4 +---
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/include/asm/setup.h b/xen/arch/x86/include/asm/setup.h
index b517da6144de..4b8fbdc67e05 100644
--- a/xen/arch/x86/include/asm/setup.h
+++ b/xen/arch/x86/include/asm/setup.h
@@ -29,6 +29,8 @@ void init_IRQ(void);
 struct boot_domain;
 int construct_dom0(struct boot_domain *bd);
 
+const char *cmdline_cook(const char *p, const char *loader_name);
+
 void setup_io_bitmap(struct domain *d);
 
 extern struct boot_info xen_boot_info;
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 760262ea3d4c..0c9f1cd98faa 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -291,8 +291,6 @@ static int __init cf_check parse_acpi_param(const char *s)
 }
 custom_param("acpi", parse_acpi_param);
 
-static const char *cmdline_cook(const char *p, const char *loader_name);
-
 struct boot_info __initdata xen_boot_info = {
     .loader = "unknown",
     .cmdline = "",
@@ -950,7 +948,7 @@ static bool __init loader_is_grub2(const char *loader_name)
  *
  * Always returns a pointer within @p.
  */
-static const char *__init cmdline_cook(const char *p, const char *loader_name)
+const char *__init cmdline_cook(const char *p, const char *loader_name)
 {
     /* Strip leading whitespace. */
     while ( *p == ' ' )
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
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	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 26/38] x86/hyperlaunch: remove dom0-isms from arch_create_dom
Date: Sat, 19 Apr 2025 18:08:08 -0400
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Removes the dom0 naming from variables and isolates control/hardware
domain specific logic behind capabilities check.

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/domain-builder/domain.c | 47 +++++++++++++++-------------
 1 file changed, 26 insertions(+), 21 deletions(-)

diff --git a/xen/arch/x86/domain-builder/domain.c b/xen/arch/x86/domain-builder/domain.c
index a82c02250b4c..13f99111a3a9 100644
--- a/xen/arch/x86/domain-builder/domain.c
+++ b/xen/arch/x86/domain-builder/domain.c
@@ -216,7 +216,7 @@ struct domain *__init arch_create_dom(
     char *cmdline = NULL;
     size_t cmdline_size;
     unsigned int create_flags = 0;
-    struct xen_domctl_createdomain dom0_cfg = {
+    struct xen_domctl_createdomain dom_cfg = {
         .flags = IS_ENABLED(CONFIG_TBOOT) ? XEN_DOMCTL_CDF_s3_integrity : 0,
         .max_evtchn_port = -1,
         .max_grant_frames = -1,
@@ -232,11 +232,11 @@ struct domain *__init arch_create_dom(
     if ( opt_dom0_pvh ||
          (bi->hyperlaunch_enabled && !(bd->mode & BUILD_MODE_PARAVIRT)) )
     {
-        dom0_cfg.flags |= (XEN_DOMCTL_CDF_hvm |
+        dom_cfg.flags |= (XEN_DOMCTL_CDF_hvm |
                            ((hvm_hap_supported() && !opt_dom0_shadow) ?
                             XEN_DOMCTL_CDF_hap : 0));
 
-        dom0_cfg.arch.emulation_flags |=
+        dom_cfg.arch.emulation_flags |=
             XEN_X86_EMU_LAPIC | XEN_X86_EMU_IOAPIC | XEN_X86_EMU_VPCI;
     }
 
@@ -244,7 +244,7 @@ struct domain *__init arch_create_dom(
     {
         create_flags |= CDF_hardware;
         if ( iommu_enabled )
-            dom0_cfg.flags |= XEN_DOMCTL_CDF_iommu;
+            dom_cfg.flags |= XEN_DOMCTL_CDF_iommu;
     }
 
     if ( bd->domid == DOMID_INVALID )
@@ -252,7 +252,7 @@ struct domain *__init arch_create_dom(
         bd->domid = get_initial_domain_id();
     if ( bd->capabilities & BUILD_CAPS_CONTROL )
         create_flags |= CDF_privileged | CDF_hardware;
-    d = domain_create(bd->domid, &dom0_cfg,
+    d = domain_create(bd->domid, &dom_cfg,
                       pv_shim ? 0 : create_flags);
     if ( IS_ERR(d) )
         panic("Error creating d%u: %ld\n", bd->domid, PTR_ERR(d));
@@ -279,25 +279,30 @@ struct domain *__init arch_create_dom(
                     cmdline_cook(__va(bd->kernel->cmdline_pa),bi->loader),
                     cmdline_size);
 
-        if ( bi->kextra )
-            /* kextra always includes exactly one leading space. */
-            strlcat(cmdline, bi->kextra, cmdline_size);
-
-        /* Append any extra parameters. */
-        if ( skip_ioapic_setup && !strstr(cmdline, "noapic") )
-            strlcat(cmdline, " noapic", cmdline_size);
-
-        if ( (strlen(acpi_param) == 0) && acpi_disabled )
+        /* Params from Xen cmd line apply only to control/hardware doms */
+        if ( bd->capabilities & (BUILD_CAPS_CONTROL | BUILD_CAPS_HARDWARE) )
         {
-            printk("ACPI is disabled, notifying Domain 0 (acpi=off)\n");
-            safe_strcpy(acpi_param, "off");
+            if ( bi->kextra )
+                /* kextra always includes exactly one leading space. */
+                strlcat(cmdline, bi->kextra, cmdline_size);
+
+            /* Append any extra parameters. */
+            if ( skip_ioapic_setup && !strstr(cmdline, "noapic") )
+                strlcat(cmdline, " noapic", cmdline_size);
+
+            if ( (strlen(acpi_param) == 0) && acpi_disabled )
+            {
+                printk("ACPI is disabled, notifying Domain 0 (acpi=off)\n");
+                safe_strcpy(acpi_param, "off");
+            }
+
+            if ( (strlen(acpi_param) != 0) && !strstr(cmdline, "acpi=") )
+            {
+                strlcat(cmdline, " acpi=", cmdline_size);
+                strlcat(cmdline, acpi_param, cmdline_size);
+            }
         }
 
-        if ( (strlen(acpi_param) != 0) && !strstr(cmdline, "acpi=") )
-        {
-            strlcat(cmdline, " acpi=", cmdline_size);
-            strlcat(cmdline, acpi_param, cmdline_size);
-        }
         bd->kernel->cmdline_pa = 0;
         bd->cmdline = cmdline;
     }
-- 
2.30.2



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	wlvnhsyy04dECXKN9abDi/wvafFhLXHoQEitgkpo=
From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 25/38] x86/hyperlaunch: convert create_dom0 to arch_create_dom
Date: Sat, 19 Apr 2025 18:08:07 -0400
Message-Id: <20250419220820.4234-26-dpsmith@apertussolutions.com>
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The only consumer of the function domain_cmdline_size() and the acpi_param
parameter is create_dom(). It is therefore reasonable to move
domain_cmdline_size() and the acpi_param parameter along with its parsing code
at the same time as create_dom0() is moved under the domain builder. While
moving create_dom0(), rename it to arch_create_dom() as the function is now
generalized.

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/domain-builder/Makefile      |   2 +-
 xen/arch/x86/domain-builder/domain.c      | 172 ++++++++++++++++++++++
 xen/arch/x86/include/asm/domain-builder.h |   3 +
 xen/arch/x86/setup.c                      | 167 +--------------------
 4 files changed, 177 insertions(+), 167 deletions(-)

diff --git a/xen/arch/x86/domain-builder/Makefile b/xen/arch/x86/domain-builder/Makefile
index 67024b5cb213..cefe20abd2e6 100644
--- a/xen/arch/x86/domain-builder/Makefile
+++ b/xen/arch/x86/domain-builder/Makefile
@@ -1,3 +1,3 @@
 obj-$(CONFIG_DOMAIN_BUILDER) += fdt.init.o
 obj-y += core.init.o
-obj-y += domain.init.o
+obj-y += domain.o
diff --git a/xen/arch/x86/domain-builder/domain.c b/xen/arch/x86/domain-builder/domain.c
index 764a1af4acd3..a82c02250b4c 100644
--- a/xen/arch/x86/domain-builder/domain.c
+++ b/xen/arch/x86/domain-builder/domain.c
@@ -5,16 +5,65 @@
 
 #include 
 #include 
+#include 
+#include 
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
+#include 
 #include 
+#include 
+#include 
 #include 
+#include 
 #include 
 
+bool __read_mostly acpi_disabled;
+bool __initdata acpi_force;
+static char __initdata acpi_param[10] = "";
+
+static int __init cf_check parse_acpi_param(const char *s)
+{
+    /* Interpret the parameter for use within Xen. */
+    if ( !parse_bool(s, NULL) )
+    {
+        disable_acpi();
+    }
+    else if ( !strcmp(s, "force") )
+    {
+        acpi_force = true;
+        acpi_ht = 1;
+        acpi_disabled = false;
+    }
+    else if ( !strcmp(s, "ht") )
+    {
+        if ( !acpi_force )
+            disable_acpi();
+        acpi_ht = 1;
+    }
+    else if ( !strcmp(s, "noirq") )
+    {
+        acpi_noirq_set();
+    }
+    else if ( !strcmp(s, "verbose") )
+    {
+        opt_acpi_verbose = true;
+        return 0;
+    }
+    else
+        return -EINVAL;
+
+    /* Save the parameter so it can be propagated to domain0. */
+    safe_strcpy(acpi_param, s);
+
+    return 0;
+}
+custom_param("acpi", parse_acpi_param);
+
 unsigned long __init dom_paging_pages(
     const struct boot_domain *bd, unsigned long nr_pages)
 {
@@ -138,6 +187,129 @@ void __init alloc_dom_vcpus(struct domain *d)
     domain_update_node_affinity(d);
 }
 
+static size_t __init domain_cmdline_size(
+    struct boot_info *bi, struct boot_domain *bd)
+{
+    size_t s = bi->kextra ? strlen(bi->kextra) : 0;
+
+    if ( bd->kernel->fdt_cmdline )
+        s += builder_get_cmdline_size(bi, bd->kernel->cmdline_pa);
+    else
+        s += strlen(__va(bd->kernel->cmdline_pa));
+
+    if ( s == 0 )
+        return s;
+
+    /*
+     * Certain parameters from the Xen command line may be added to the dom0
+     * command line. Add additional space for the possible cases along with one
+     * extra char to hold \0.
+     */
+    s += strlen(" noapic") + strlen(" acpi=") + sizeof(acpi_param) + 1;
+
+    return s;
+}
+
+struct domain *__init arch_create_dom(
+    struct boot_info *bi, struct boot_domain *bd)
+{
+    char *cmdline = NULL;
+    size_t cmdline_size;
+    unsigned int create_flags = 0;
+    struct xen_domctl_createdomain dom0_cfg = {
+        .flags = IS_ENABLED(CONFIG_TBOOT) ? XEN_DOMCTL_CDF_s3_integrity : 0,
+        .max_evtchn_port = -1,
+        .max_grant_frames = -1,
+        .max_maptrack_frames = -1,
+        .grant_opts = XEN_DOMCTL_GRANT_version(opt_gnttab_max_version),
+        .max_vcpus = dom_max_vcpus(bd),
+        .arch = {
+            .misc_flags = opt_dom0_msr_relaxed ? XEN_X86_MSR_RELAXED : 0,
+        },
+    };
+    struct domain *d;
+
+    if ( opt_dom0_pvh ||
+         (bi->hyperlaunch_enabled && !(bd->mode & BUILD_MODE_PARAVIRT)) )
+    {
+        dom0_cfg.flags |= (XEN_DOMCTL_CDF_hvm |
+                           ((hvm_hap_supported() && !opt_dom0_shadow) ?
+                            XEN_DOMCTL_CDF_hap : 0));
+
+        dom0_cfg.arch.emulation_flags |=
+            XEN_X86_EMU_LAPIC | XEN_X86_EMU_IOAPIC | XEN_X86_EMU_VPCI;
+    }
+
+    if ( bd->capabilities & BUILD_CAPS_HARDWARE )
+    {
+        create_flags |= CDF_hardware;
+        if ( iommu_enabled )
+            dom0_cfg.flags |= XEN_DOMCTL_CDF_iommu;
+    }
+
+    if ( bd->domid == DOMID_INVALID )
+        /* Create initial domain.  Not d0 for pvshim. */
+        bd->domid = get_initial_domain_id();
+    if ( bd->capabilities & BUILD_CAPS_CONTROL )
+        create_flags |= CDF_privileged | CDF_hardware;
+    d = domain_create(bd->domid, &dom0_cfg,
+                      pv_shim ? 0 : create_flags);
+    if ( IS_ERR(d) )
+        panic("Error creating d%u: %ld\n", bd->domid, PTR_ERR(d));
+
+    bd->d = d;
+
+    if ( bd->capabilities & BUILD_CAPS_CONTROL )
+        init_dom0_cpuid_policy(bd->d);
+
+    if ( alloc_dom_vcpu0(bd) == NULL )
+        panic("Error creating %pd vcpu 0\n", d);
+
+    cmdline_size = domain_cmdline_size(bi, bd);
+    if ( cmdline_size )
+    {
+        if ( !(cmdline = xzalloc_array(char, cmdline_size)) )
+            panic("Error allocating cmdline buffer for %pd\n", d);
+
+        if ( bd->kernel->fdt_cmdline )
+            builder_get_cmdline(
+                bi, bd->kernel->cmdline_pa, cmdline, cmdline_size);
+        else
+            strlcpy(cmdline,
+                    cmdline_cook(__va(bd->kernel->cmdline_pa),bi->loader),
+                    cmdline_size);
+
+        if ( bi->kextra )
+            /* kextra always includes exactly one leading space. */
+            strlcat(cmdline, bi->kextra, cmdline_size);
+
+        /* Append any extra parameters. */
+        if ( skip_ioapic_setup && !strstr(cmdline, "noapic") )
+            strlcat(cmdline, " noapic", cmdline_size);
+
+        if ( (strlen(acpi_param) == 0) && acpi_disabled )
+        {
+            printk("ACPI is disabled, notifying Domain 0 (acpi=off)\n");
+            safe_strcpy(acpi_param, "off");
+        }
+
+        if ( (strlen(acpi_param) != 0) && !strstr(cmdline, "acpi=") )
+        {
+            strlcat(cmdline, " acpi=", cmdline_size);
+            strlcat(cmdline, acpi_param, cmdline_size);
+        }
+        bd->kernel->cmdline_pa = 0;
+        bd->cmdline = cmdline;
+    }
+
+    if ( construct_dom0(bd) != 0 )
+        panic("Could not construct domain 0\n");
+
+    XFREE(cmdline);
+
+    return d;
+}
+
 /*
  * Local variables:
  * mode: C
diff --git a/xen/arch/x86/include/asm/domain-builder.h b/xen/arch/x86/include/asm/domain-builder.h
index ee91edc3c4d1..ccab02c3a1fd 100644
--- a/xen/arch/x86/include/asm/domain-builder.h
+++ b/xen/arch/x86/include/asm/domain-builder.h
@@ -9,6 +9,9 @@ int __init builder_get_cmdline(
 
 void builder_init(struct boot_info *bi);
 
+struct domain *arch_create_dom(
+    struct boot_info *bi, struct boot_domain *bd);
+
 int hvm_add_mem_range(
     struct domain *d, uint64_t s, uint64_t e, unsigned int type);
 
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 0c9f1cd98faa..8f956b6eca4f 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -249,48 +249,6 @@ static int __init cf_check parse_smap_param(const char *s)
 }
 custom_param("smap", parse_smap_param);
 
-bool __read_mostly acpi_disabled;
-bool __initdata acpi_force;
-static char __initdata acpi_param[10] = "";
-
-static int __init cf_check parse_acpi_param(const char *s)
-{
-    /* Interpret the parameter for use within Xen. */
-    if ( !parse_bool(s, NULL) )
-    {
-        disable_acpi();
-    }
-    else if ( !strcmp(s, "force") )
-    {
-        acpi_force = true;
-        acpi_ht = 1;
-        acpi_disabled = false;
-    }
-    else if ( !strcmp(s, "ht") )
-    {
-        if ( !acpi_force )
-            disable_acpi();
-        acpi_ht = 1;
-    }
-    else if ( !strcmp(s, "noirq") )
-    {
-        acpi_noirq_set();
-    }
-    else if ( !strcmp(s, "verbose") )
-    {
-        opt_acpi_verbose = true;
-        return 0;
-    }
-    else
-        return -EINVAL;
-
-    /* Save the parameter so it can be propagated to domain0. */
-    safe_strcpy(acpi_param, s);
-
-    return 0;
-}
-custom_param("acpi", parse_acpi_param);
-
 struct boot_info __initdata xen_boot_info = {
     .loader = "unknown",
     .cmdline = "",
@@ -980,129 +938,6 @@ static unsigned int __init copy_bios_e820(struct e820entry *map, unsigned int li
     return n;
 }
 
-static size_t __init domain_cmdline_size(
-    struct boot_info *bi, struct boot_domain *bd)
-{
-    size_t s = bi->kextra ? strlen(bi->kextra) : 0;
-
-    if ( bd->kernel->fdt_cmdline )
-        s += builder_get_cmdline_size(bi, bd->kernel->cmdline_pa);
-    else
-        s += strlen(__va(bd->kernel->cmdline_pa));
-
-    if ( s == 0 )
-        return s;
-
-    /*
-     * Certain parameters from the Xen command line may be added to the dom0
-     * command line. Add additional space for the possible cases along with one
-     * extra char to hold \0.
-     */
-    s += strlen(" noapic") + strlen(" acpi=") + sizeof(acpi_param) + 1;
-
-    return s;
-}
-
-static struct domain *__init create_dom0(struct boot_info *bi)
-{
-    char *cmdline = NULL;
-    size_t cmdline_size;
-    unsigned int create_flags = 0;
-    struct boot_domain *bd = &bi->domains[0];
-    struct xen_domctl_createdomain dom0_cfg = {
-        .flags = IS_ENABLED(CONFIG_TBOOT) ? XEN_DOMCTL_CDF_s3_integrity : 0,
-        .max_evtchn_port = -1,
-        .max_grant_frames = -1,
-        .max_maptrack_frames = -1,
-        .grant_opts = XEN_DOMCTL_GRANT_version(opt_gnttab_max_version),
-        .max_vcpus = dom_max_vcpus(bd),
-        .arch = {
-            .misc_flags = opt_dom0_msr_relaxed ? XEN_X86_MSR_RELAXED : 0,
-        },
-    };
-    struct domain *d;
-
-    if ( opt_dom0_pvh ||
-         (bi->hyperlaunch_enabled && !(bd->mode & BUILD_MODE_PARAVIRT)) )
-    {
-        dom0_cfg.flags |= (XEN_DOMCTL_CDF_hvm |
-                           ((hvm_hap_supported() && !opt_dom0_shadow) ?
-                            XEN_DOMCTL_CDF_hap : 0));
-
-        dom0_cfg.arch.emulation_flags |=
-            XEN_X86_EMU_LAPIC | XEN_X86_EMU_IOAPIC | XEN_X86_EMU_VPCI;
-    }
-
-    if ( bd->capabilities & BUILD_CAPS_HARDWARE )
-    {
-        create_flags |= CDF_hardware;
-        if ( iommu_enabled )
-            dom0_cfg.flags |= XEN_DOMCTL_CDF_iommu;
-    }
-
-    if ( bd->domid == DOMID_INVALID )
-        /* Create initial domain.  Not d0 for pvshim. */
-        bd->domid = get_initial_domain_id();
-    if ( bd->capabilities & BUILD_CAPS_CONTROL )
-        create_flags |= CDF_privileged | CDF_hardware;
-    d = domain_create(bd->domid, &dom0_cfg,
-                      pv_shim ? 0 : create_flags);
-    if ( IS_ERR(d) )
-        panic("Error creating d%u: %ld\n", bd->domid, PTR_ERR(d));
-
-    bd->d = d;
-
-    if ( bd->capabilities & BUILD_CAPS_CONTROL )
-        init_dom0_cpuid_policy(bd->d);
-
-    if ( alloc_dom_vcpu0(bd) == NULL )
-        panic("Error creating %pd vcpu 0\n", d);
-
-    cmdline_size = domain_cmdline_size(bi, bd);
-    if ( cmdline_size )
-    {
-        if ( !(cmdline = xzalloc_array(char, cmdline_size)) )
-            panic("Error allocating cmdline buffer for %pd\n", d);
-
-        if ( bd->kernel->fdt_cmdline )
-            builder_get_cmdline(
-                bi, bd->kernel->cmdline_pa, cmdline, cmdline_size);
-        else
-            strlcpy(cmdline,
-                    cmdline_cook(__va(bd->kernel->cmdline_pa),bi->loader),
-                    cmdline_size);
-
-        if ( bi->kextra )
-            /* kextra always includes exactly one leading space. */
-            strlcat(cmdline, bi->kextra, cmdline_size);
-
-        /* Append any extra parameters. */
-        if ( skip_ioapic_setup && !strstr(cmdline, "noapic") )
-            strlcat(cmdline, " noapic", cmdline_size);
-
-        if ( (strlen(acpi_param) == 0) && acpi_disabled )
-        {
-            printk("ACPI is disabled, notifying Domain 0 (acpi=off)\n");
-            safe_strcpy(acpi_param, "off");
-        }
-
-        if ( (strlen(acpi_param) != 0) && !strstr(cmdline, "acpi=") )
-        {
-            strlcat(cmdline, " acpi=", cmdline_size);
-            strlcat(cmdline, acpi_param, cmdline_size);
-        }
-        bd->kernel->cmdline_pa = 0;
-        bd->cmdline = cmdline;
-    }
-
-    if ( construct_dom0(bd) != 0 )
-        panic("Could not construct domain 0\n");
-
-    XFREE(cmdline);
-
-    return d;
-}
-
 /* How much of the directmap is prebuilt at compile time. */
 #define PREBUILT_MAP_LIMIT (1 << L2_PAGETABLE_SHIFT)
 
@@ -2180,7 +2015,7 @@ void asmlinkage __init noreturn __start_xen(void)
      * We're going to setup domain0 using the module(s) that we stashed safely
      * above our heap. The second module, if present, is an initrd ramdisk.
      */
-    dom0 = create_dom0(bi);
+    dom0 = arch_create_dom(bi, &bi->domains[0]);
     if ( !dom0 )
         panic("Could not set up DOM0 guest OS\n");
 
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 17/38] x86/hyperlaunch: move pvh_setup_cpus to domain builder
Date: Sat, 19 Apr 2025 18:07:59 -0400
Message-Id: <20250419220820.4234-18-dpsmith@apertussolutions.com>
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The function pvh_setup_cpus() is a very general function that is usable by all
HVM domains, not just PVH. As such, renaming to hvm_setup_cpus during move.

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/hvm/dom0_build.c             | 45 +----------------------
 xen/arch/x86/hvm/dom_build.c              | 45 +++++++++++++++++++++++
 xen/arch/x86/include/asm/domain-builder.h |  2 +
 3 files changed, 48 insertions(+), 44 deletions(-)

diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build.c
index 2ed2d5fd7326..a3b6afc5318a 100644
--- a/xen/arch/x86/hvm/dom0_build.c
+++ b/xen/arch/x86/hvm/dom0_build.c
@@ -808,49 +808,6 @@ static int __init pvh_load_kernel(
     return 0;
 }
 
-static int __init pvh_setup_cpus(struct domain *d, paddr_t entry,
-                                 paddr_t start_info)
-{
-    struct vcpu *v = d->vcpu[0];
-    int rc;
-    /*
-     * This sets the vCPU state according to the state described in
-     * docs/misc/pvh.pandoc.
-     */
-    vcpu_hvm_context_t cpu_ctx = {
-        .mode = VCPU_HVM_MODE_32B,
-        .cpu_regs.x86_32.ebx = start_info,
-        .cpu_regs.x86_32.eip = entry,
-        .cpu_regs.x86_32.cr0 = X86_CR0_PE | X86_CR0_ET,
-        .cpu_regs.x86_32.cs_limit = ~0u,
-        .cpu_regs.x86_32.ds_limit = ~0u,
-        .cpu_regs.x86_32.es_limit = ~0u,
-        .cpu_regs.x86_32.ss_limit = ~0u,
-        .cpu_regs.x86_32.tr_limit = 0x67,
-        .cpu_regs.x86_32.cs_ar = 0xc9b,
-        .cpu_regs.x86_32.ds_ar = 0xc93,
-        .cpu_regs.x86_32.es_ar = 0xc93,
-        .cpu_regs.x86_32.ss_ar = 0xc93,
-        .cpu_regs.x86_32.tr_ar = 0x8b,
-    };
-
-    alloc_dom_vcpus(d);
-
-    rc = arch_set_info_hvm_guest(v, &cpu_ctx);
-    if ( rc )
-    {
-        printk("Unable to setup Dom0 BSP context: %d\n", rc);
-        return rc;
-    }
-
-    update_domain_wallclock_time(d);
-
-    v->is_initialised = 1;
-    clear_bit(_VPF_down, &v->pause_flags);
-
-    return 0;
-}
-
 static int __init cf_check acpi_count_intr_ovr(
     struct acpi_subtable_header *header, const unsigned long end)
 {
@@ -1319,7 +1276,7 @@ int __init dom0_construct_pvh(struct boot_domain *bd)
         return rc;
     }
 
-    rc = pvh_setup_cpus(d, entry, start_info);
+    rc = hvm_setup_cpus(bd->d, entry, start_info);
     if ( rc )
     {
         printk("Failed to setup Dom0 CPUs: %d\n", rc);
diff --git a/xen/arch/x86/hvm/dom_build.c b/xen/arch/x86/hvm/dom_build.c
index 7fa007a6926d..078e42447b0a 100644
--- a/xen/arch/x86/hvm/dom_build.c
+++ b/xen/arch/x86/hvm/dom_build.c
@@ -16,6 +16,8 @@
 
 #include 
 
+#include 
+
 #include 
 #include 
 #include 
@@ -55,6 +57,49 @@ static void __init pvh_init_p2m(struct boot_domain *bd)
     } while ( preempted );
 }
 
+int __init hvm_setup_cpus(
+    struct domain *d, paddr_t entry, paddr_t start_info)
+{
+    struct vcpu *v = d->vcpu[0];
+    int rc;
+    /*
+     * This sets the vCPU state according to the state described in
+     * docs/misc/pvh.pandoc.
+     */
+    vcpu_hvm_context_t cpu_ctx = {
+        .mode = VCPU_HVM_MODE_32B,
+        .cpu_regs.x86_32.ebx = start_info,
+        .cpu_regs.x86_32.eip = entry,
+        .cpu_regs.x86_32.cr0 = X86_CR0_PE | X86_CR0_ET,
+        .cpu_regs.x86_32.cs_limit = ~0u,
+        .cpu_regs.x86_32.ds_limit = ~0u,
+        .cpu_regs.x86_32.es_limit = ~0u,
+        .cpu_regs.x86_32.ss_limit = ~0u,
+        .cpu_regs.x86_32.tr_limit = 0x67,
+        .cpu_regs.x86_32.cs_ar = 0xc9b,
+        .cpu_regs.x86_32.ds_ar = 0xc93,
+        .cpu_regs.x86_32.es_ar = 0xc93,
+        .cpu_regs.x86_32.ss_ar = 0xc93,
+        .cpu_regs.x86_32.tr_ar = 0x8b,
+    };
+
+    alloc_dom_vcpus(d);
+
+    rc = arch_set_info_hvm_guest(v, &cpu_ctx);
+    if ( rc )
+    {
+        printk("Unable to setup %pd BSP context: %d\n", d, rc);
+        return rc;
+    }
+
+    update_domain_wallclock_time(d);
+
+    v->is_initialised = 1;
+    clear_bit(_VPF_down, &v->pause_flags);
+
+    return 0;
+}
+
 int __init dom_construct_pvh(struct boot_domain *bd)
 {
     int rc;
diff --git a/xen/arch/x86/include/asm/domain-builder.h b/xen/arch/x86/include/asm/domain-builder.h
index af0a24b4edf5..7bc2fbe66bc2 100644
--- a/xen/arch/x86/include/asm/domain-builder.h
+++ b/xen/arch/x86/include/asm/domain-builder.h
@@ -9,6 +9,8 @@ int __init builder_get_cmdline(
 
 void builder_init(struct boot_info *bi);
 
+int hvm_setup_cpus(struct domain *d, paddr_t entry, paddr_t start_info);
+
 unsigned long dom_paging_pages(
     const struct boot_domain *d, unsigned long nr_pages);
 
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 21/38] x86/hyperlaunch: move remaining pvh dom0 construction
Date: Sat, 19 Apr 2025 18:08:03 -0400
Message-Id: <20250419220820.4234-22-dpsmith@apertussolutions.com>
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Move pvh_load_kernel() and its helper functions to the domain builder. With
this move, it is now possible to move the remaining logic of
dom0_construct_pvh() to the domain builder. With all the logic moved, the
function can be dropped.

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/hvm/dom0_build.c         | 365 --------------------------
 xen/arch/x86/hvm/dom_build.c          | 362 ++++++++++++++++++++++++-
 xen/arch/x86/include/asm/dom0_build.h |   1 -
 3 files changed, 361 insertions(+), 367 deletions(-)

diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build.c
index 73ce33fb17f1..23b46ef86c9f 100644
--- a/xen/arch/x86/hvm/dom0_build.c
+++ b/xen/arch/x86/hvm/dom0_build.c
@@ -478,335 +478,6 @@ int __init dom0_pvh_populate_p2m(struct domain *d)
 #undef MB1_PAGES
 }
 
-static paddr_t __init find_memory(
-    const struct domain *d, const struct elf_binary *elf, size_t size)
-{
-    paddr_t kernel_start = (paddr_t)elf->dest_base & PAGE_MASK;
-    paddr_t kernel_end = ROUNDUP((paddr_t)elf->dest_base + elf->dest_size,
-                                 PAGE_SIZE);
-    unsigned int i;
-
-    /*
-     * The memory map is sorted and all RAM regions starts and sizes are
-     * aligned to page boundaries.
-     */
-    for ( i = 0; i < d->arch.nr_e820; i++ )
-    {
-        paddr_t start, end = d->arch.e820[i].addr + d->arch.e820[i].size;
-
-        /* Don't use memory below 1MB, as it could overwrite BDA/EBDA/IBFT. */
-        if ( end <= MB(1) || d->arch.e820[i].type != E820_RAM )
-            continue;
-
-        start = MAX(ROUNDUP(d->arch.e820[i].addr, PAGE_SIZE), MB(1));
-
-        ASSERT(IS_ALIGNED(start, PAGE_SIZE) && IS_ALIGNED(end, PAGE_SIZE));
-
-        /*
-         * NB: Even better would be to use rangesets to determine a suitable
-         * range, in particular in case a kernel requests multiple heavily
-         * discontiguous regions (which right now we fold all into one big
-         * region).
-         */
-        if ( end <= kernel_start || start >= kernel_end )
-        {
-            /* No overlap, just check whether the region is large enough. */
-            if ( end - start >= size )
-                return start;
-        }
-        /* Deal with the kernel already being loaded in the region. */
-        else if ( kernel_start > start && kernel_start - start >= size )
-            return start;
-        else if ( kernel_end < end && end - kernel_end >= size )
-            return kernel_end;
-    }
-
-    return INVALID_PADDR;
-}
-
-static bool __init check_load_address(
-    const struct domain *d, const struct elf_binary *elf)
-{
-    paddr_t kernel_start = (uintptr_t)elf->dest_base;
-    paddr_t kernel_end = kernel_start + elf->dest_size;
-    unsigned int i;
-
-    /* Relies on a sorted memory map with adjacent entries merged. */
-    for ( i = 0; i < d->arch.nr_e820; i++ )
-    {
-        paddr_t start = d->arch.e820[i].addr;
-        paddr_t end = start + d->arch.e820[i].size;
-
-        if ( start >= kernel_end )
-            return false;
-
-        if ( d->arch.e820[i].type == E820_RAM &&
-             start <= kernel_start &&
-             end >= kernel_end )
-            return true;
-    }
-
-    return false;
-}
-
-/* Find an e820 RAM region that fits the kernel at a suitable alignment. */
-static paddr_t __init find_kernel_memory(
-    const struct domain *d, struct elf_binary *elf,
-    const struct elf_dom_parms *parms)
-{
-    paddr_t kernel_size = elf->dest_size;
-    unsigned int align;
-    unsigned int i;
-
-    if ( parms->phys_align != UNSET_ADDR32 )
-        align = parms->phys_align;
-    else if ( elf->palign >= PAGE_SIZE )
-        align = elf->palign;
-    else
-        align = MB(2);
-
-    /* Search backwards to find the highest address. */
-    for ( i = d->arch.nr_e820; i--; )
-    {
-        paddr_t start = d->arch.e820[i].addr;
-        paddr_t end = start + d->arch.e820[i].size;
-        paddr_t kstart, kend;
-
-        if ( d->arch.e820[i].type != E820_RAM ||
-             d->arch.e820[i].size < kernel_size )
-            continue;
-
-        if ( start > parms->phys_max )
-            continue;
-
-        if ( end - 1 > parms->phys_max )
-            end = parms->phys_max + 1;
-
-        kstart = (end - kernel_size) & ~(align - 1);
-        kend = kstart + kernel_size;
-
-        if ( kstart < parms->phys_min )
-            return 0;
-
-        if ( kstart >= start && kend <= end )
-            return kstart;
-    }
-
-    return 0;
-}
-
-/* Check the kernel load address, and adjust if necessary and possible. */
-static bool __init check_and_adjust_load_address(
-    const struct domain *d, struct elf_binary *elf, struct elf_dom_parms *parms)
-{
-    paddr_t reloc_base;
-
-    if ( check_load_address(d, elf) )
-        return true;
-
-    if ( !parms->phys_reloc )
-    {
-        printk("%pd kernel: Address conflict and not relocatable\n", d);
-        return false;
-    }
-
-    reloc_base = find_kernel_memory(d, elf, parms);
-    if ( !reloc_base )
-    {
-        printk("%pd kernel: Failed find a load address\n", d);
-        return false;
-    }
-
-    if ( opt_dom0_verbose )
-        printk("%pd kernel: Moving [%p, %p] -> [%"PRIpaddr", %"PRIpaddr"]\n", d,
-               elf->dest_base, elf->dest_base + elf->dest_size - 1,
-               reloc_base, reloc_base + elf->dest_size - 1);
-
-    parms->phys_entry =
-        reloc_base + (parms->phys_entry - (uintptr_t)elf->dest_base);
-    elf->dest_base = (char *)reloc_base;
-
-    return true;
-}
-
-static int __init pvh_load_kernel(
-    const struct boot_domain *bd, paddr_t *entry, paddr_t *start_info_addr)
-{
-    struct domain *d = bd->d;
-    struct boot_module *image = bd->kernel;
-    struct boot_module *initrd = bd->ramdisk;
-    void *image_base = bootstrap_map_bm(image);
-    void *image_start = image_base + image->headroom;
-    unsigned long image_len = image->size;
-    unsigned long initrd_len = initrd ? initrd->size : 0;
-    const char *initrd_cmdline = NULL;
-    struct elf_binary elf;
-    struct elf_dom_parms parms;
-    size_t extra_space;
-    paddr_t last_addr;
-    struct hvm_start_info start_info = { 0 };
-    struct hvm_modlist_entry mod = { 0 };
-    struct vcpu *v = d->vcpu[0];
-    int rc;
-
-    if ( (rc = bzimage_parse(image_base, &image_start, &image_len)) != 0 )
-    {
-        printk("Error trying to detect bz compressed kernel\n");
-        return rc;
-    }
-
-    if ( (rc = elf_init(&elf, image_start, image_len)) != 0 )
-    {
-        printk("Unable to init ELF\n");
-        return rc;
-    }
-    if ( opt_dom0_verbose )
-        elf_set_verbose(&elf);
-    elf_parse_binary(&elf);
-    if ( (rc = elf_xen_parse(&elf, &parms, true)) != 0 )
-    {
-        printk("Unable to parse kernel for ELFNOTES\n");
-        if ( elf_check_broken(&elf) )
-            printk("%pd kernel: broken ELF: %s\n", d, elf_check_broken(&elf));
-        return rc;
-    }
-
-    if ( parms.phys_entry == UNSET_ADDR32 )
-    {
-        printk("Unable to find XEN_ELFNOTE_PHYS32_ENTRY address\n");
-        return -EINVAL;
-    }
-
-    /* Copy the OS image and free temporary buffer. */
-    elf.dest_base = (void *)(parms.virt_kstart - parms.virt_base);
-    elf.dest_size = parms.virt_kend - parms.virt_kstart;
-
-    if ( !check_and_adjust_load_address(d, &elf, &parms) )
-        return -ENOSPC;
-
-    elf_set_vcpu(&elf, v);
-    rc = elf_load_binary(&elf);
-    if ( rc < 0 )
-    {
-        printk("Failed to load kernel: %d\n", rc);
-        if ( elf_check_broken(&elf) )
-            printk("%pd kernel: broken ELF: %s\n", d, elf_check_broken(&elf));
-        return rc;
-    }
-
-    /*
-     * Find a RAM region big enough (and that doesn't overlap with the loaded
-     * kernel) in order to load the initrd and the metadata. Note it could be
-     * split into smaller allocations, done as a single region in order to
-     * simplify it.
-     */
-    extra_space = sizeof(start_info);
-
-    if ( initrd )
-    {
-        size_t initrd_space = elf_round_up(&elf, initrd_len);
-
-        if ( initrd->cmdline_pa )
-        {
-            initrd_cmdline = __va(initrd->cmdline_pa);
-            if ( !*initrd_cmdline )
-                initrd_cmdline = NULL;
-        }
-        if ( initrd_cmdline )
-            initrd_space += strlen(initrd_cmdline) + 1;
-
-        if ( initrd_space )
-            extra_space += ROUNDUP(initrd_space, PAGE_SIZE) + sizeof(mod);
-        else
-            initrd = NULL;
-    }
-
-    if ( bd->cmdline )
-        extra_space += elf_round_up(&elf, strlen(bd->cmdline) + 1);
-
-    last_addr = find_memory(d, &elf, extra_space);
-    if ( last_addr == INVALID_PADDR )
-    {
-        printk("Unable to find a memory region to load initrd and metadata\n");
-        return -ENOMEM;
-    }
-
-    if ( initrd != NULL )
-    {
-        rc = hvm_copy_to_guest_phys(last_addr, __va(initrd->start),
-                                    initrd_len, v);
-        if ( rc )
-        {
-            printk("Unable to copy initrd to guest\n");
-            return rc;
-        }
-
-        mod.paddr = last_addr;
-        mod.size = initrd_len;
-        last_addr += elf_round_up(&elf, initrd_len);
-        if ( initrd_cmdline )
-        {
-            size_t len = strlen(initrd_cmdline) + 1;
-
-            rc = hvm_copy_to_guest_phys(last_addr, initrd_cmdline, len, v);
-            if ( rc )
-            {
-                printk("Unable to copy module command line\n");
-                return rc;
-            }
-            mod.cmdline_paddr = last_addr;
-            last_addr += len;
-        }
-        last_addr = ROUNDUP(last_addr, PAGE_SIZE);
-    }
-
-    /* Free temporary buffers. */
-    free_boot_modules();
-
-    if ( bd->cmdline )
-    {
-        rc = hvm_copy_to_guest_phys(last_addr, bd->cmdline,
-                                    strlen(bd->cmdline) + 1, v);
-        if ( rc )
-        {
-            printk("Unable to copy guest command line\n");
-            return rc;
-        }
-        start_info.cmdline_paddr = last_addr;
-        /*
-         * Round up to 32/64 bits (depending on the guest kernel bitness) so
-         * the modlist/start_info is aligned.
-         */
-        last_addr += elf_round_up(&elf, strlen(bd->cmdline) + 1);
-    }
-    if ( initrd != NULL )
-    {
-        rc = hvm_copy_to_guest_phys(last_addr, &mod, sizeof(mod), v);
-        if ( rc )
-        {
-            printk("Unable to copy guest modules\n");
-            return rc;
-        }
-        start_info.modlist_paddr = last_addr;
-        start_info.nr_modules = 1;
-        last_addr += sizeof(mod);
-    }
-
-    start_info.magic = XEN_HVM_START_MAGIC_VALUE;
-    start_info.flags = SIF_PRIVILEGED | SIF_INITDOMAIN;
-    rc = hvm_copy_to_guest_phys(last_addr, &start_info, sizeof(start_info), v);
-    if ( rc )
-    {
-        printk("Unable to copy start info to guest\n");
-        return rc;
-    }
-
-    *entry = parms.phys_entry;
-    *start_info_addr = last_addr;
-
-    return 0;
-}
-
 static int __init cf_check acpi_count_intr_ovr(
     struct acpi_subtable_header *header, const unsigned long end)
 {
@@ -1255,42 +926,6 @@ int __init dom0_pvh_setup_acpi(struct domain *d, paddr_t start_info)
     return 0;
 }
 
-int __init dom0_construct_pvh(struct boot_domain *bd)
-{
-    paddr_t entry, start_info;
-    struct domain *d = bd->d;
-    int rc;
-
-    rc = pvh_load_kernel(bd, &entry, &start_info);
-    if ( rc )
-    {
-        printk("Failed to load Dom0 kernel\n");
-        return rc;
-    }
-
-    rc = hvm_setup_cpus(bd->d, entry, start_info);
-    if ( rc )
-    {
-        printk("Failed to setup Dom0 CPUs: %d\n", rc);
-        return rc;
-    }
-
-    rc = dom0_pvh_setup_acpi(bd->d, start_info);
-    if ( rc )
-    {
-        printk("Failed to setup Dom0 ACPI tables: %d\n", rc);
-        return rc;
-    }
-
-    if ( opt_dom0_verbose )
-    {
-        printk("Dom%u memory map:\n", d->domain_id);
-        print_e820_memory_map(d->arch.e820, d->arch.nr_e820);
-    }
-
-    return 0;
-}
-
 /*
  * Local variables:
  * mode: C
diff --git a/xen/arch/x86/hvm/dom_build.c b/xen/arch/x86/hvm/dom_build.c
index 9421dc431ba9..2e47ca489a71 100644
--- a/xen/arch/x86/hvm/dom_build.c
+++ b/xen/arch/x86/hvm/dom_build.c
@@ -16,10 +16,12 @@
 
 #include 
 
+#include 
 #include 
 #include 
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -276,8 +278,338 @@ static int __init hvm_populate_p2m(struct domain *d)
     return 0;
 }
 
+static paddr_t __init find_memory(
+    const struct domain *d, const struct elf_binary *elf, size_t size)
+{
+    paddr_t kernel_start = (paddr_t)elf->dest_base & PAGE_MASK;
+    paddr_t kernel_end = ROUNDUP((paddr_t)elf->dest_base + elf->dest_size,
+                                 PAGE_SIZE);
+    unsigned int i;
+
+    /*
+     * The memory map is sorted and all RAM regions starts and sizes are
+     * aligned to page boundaries.
+     */
+    for ( i = 0; i < d->arch.nr_e820; i++ )
+    {
+        paddr_t start, end = d->arch.e820[i].addr + d->arch.e820[i].size;
+
+        /* Don't use memory below 1MB, as it could overwrite BDA/EBDA/IBFT. */
+        if ( end <= MB(1) || d->arch.e820[i].type != E820_RAM )
+            continue;
+
+        start = MAX(ROUNDUP(d->arch.e820[i].addr, PAGE_SIZE), MB(1));
+
+        ASSERT(IS_ALIGNED(start, PAGE_SIZE) && IS_ALIGNED(end, PAGE_SIZE));
+
+        /*
+         * NB: Even better would be to use rangesets to determine a suitable
+         * range, in particular in case a kernel requests multiple heavily
+         * discontiguous regions (which right now we fold all into one big
+         * region).
+         */
+        if ( end <= kernel_start || start >= kernel_end )
+        {
+            /* No overlap, just check whether the region is large enough. */
+            if ( end - start >= size )
+                return start;
+        }
+        /* Deal with the kernel already being loaded in the region. */
+        else if ( kernel_start > start && kernel_start - start >= size )
+            return start;
+        else if ( kernel_end < end && end - kernel_end >= size )
+            return kernel_end;
+    }
+
+    return INVALID_PADDR;
+}
+
+static bool __init check_load_address(
+    const struct domain *d, const struct elf_binary *elf)
+{
+    paddr_t kernel_start = (uintptr_t)elf->dest_base;
+    paddr_t kernel_end = kernel_start + elf->dest_size;
+    unsigned int i;
+
+    /* Relies on a sorted memory map with adjacent entries merged. */
+    for ( i = 0; i < d->arch.nr_e820; i++ )
+    {
+        paddr_t start = d->arch.e820[i].addr;
+        paddr_t end = start + d->arch.e820[i].size;
+
+        if ( start >= kernel_end )
+            return false;
+
+        if ( d->arch.e820[i].type == E820_RAM &&
+             start <= kernel_start &&
+             end >= kernel_end )
+            return true;
+    }
+
+    return false;
+}
+
+/* Find an e820 RAM region that fits the kernel at a suitable alignment. */
+static paddr_t __init find_kernel_memory(
+    const struct domain *d, struct elf_binary *elf,
+    const struct elf_dom_parms *parms)
+{
+    paddr_t kernel_size = elf->dest_size;
+    unsigned int align;
+    unsigned int i;
+
+    if ( parms->phys_align != UNSET_ADDR32 )
+        align = parms->phys_align;
+    else if ( elf->palign >= PAGE_SIZE )
+        align = elf->palign;
+    else
+        align = MB(2);
+
+    /* Search backwards to find the highest address. */
+    for ( i = d->arch.nr_e820; i--; )
+    {
+        paddr_t start = d->arch.e820[i].addr;
+        paddr_t end = start + d->arch.e820[i].size;
+        paddr_t kstart, kend;
+
+        if ( d->arch.e820[i].type != E820_RAM ||
+             d->arch.e820[i].size < kernel_size )
+            continue;
+
+        if ( start > parms->phys_max )
+            continue;
+
+        if ( end - 1 > parms->phys_max )
+            end = parms->phys_max + 1;
+
+        kstart = (end - kernel_size) & ~(align - 1);
+        kend = kstart + kernel_size;
+
+        if ( kstart < parms->phys_min )
+            return 0;
+
+        if ( kstart >= start && kend <= end )
+            return kstart;
+    }
+
+    return 0;
+}
+
+/* Check the kernel load address, and adjust if necessary and possible. */
+static bool __init check_and_adjust_load_address(
+    const struct domain *d, struct elf_binary *elf, struct elf_dom_parms *parms)
+{
+    paddr_t reloc_base;
+
+    if ( check_load_address(d, elf) )
+        return true;
+
+    if ( !parms->phys_reloc )
+    {
+        printk("%pd kernel: Address conflict and not relocatable\n", d);
+        return false;
+    }
+
+    reloc_base = find_kernel_memory(d, elf, parms);
+    if ( !reloc_base )
+    {
+        printk("%pd kernel: Failed find a load address\n", d);
+        return false;
+    }
+
+    if ( opt_dom0_verbose )
+        printk("%pd kernel: Moving [%p, %p] -> [%"PRIpaddr", %"PRIpaddr"]\n", d,
+               elf->dest_base, elf->dest_base + elf->dest_size - 1,
+               reloc_base, reloc_base + elf->dest_size - 1);
+
+    parms->phys_entry =
+        reloc_base + (parms->phys_entry - (uintptr_t)elf->dest_base);
+    elf->dest_base = (char *)reloc_base;
+
+    return true;
+}
+
+static int __init pvh_load_kernel(
+    const struct boot_domain *bd, paddr_t *entry, paddr_t *start_info_addr)
+{
+    struct domain *d = bd->d;
+    struct boot_module *image = bd->kernel;
+    struct boot_module *initrd = bd->ramdisk;
+    void *image_base = bootstrap_map_bm(image);
+    void *image_start = image_base + image->headroom;
+    unsigned long image_len = image->size;
+    unsigned long initrd_len = initrd ? initrd->size : 0;
+    const char *initrd_cmdline = NULL;
+    struct elf_binary elf;
+    struct elf_dom_parms parms;
+    size_t extra_space;
+    paddr_t last_addr;
+    struct hvm_start_info start_info = { 0 };
+    struct hvm_modlist_entry mod = { 0 };
+    struct vcpu *v = d->vcpu[0];
+    int rc;
+
+    if ( (rc = bzimage_parse(image_base, &image_start, &image_len)) != 0 )
+    {
+        printk("Error trying to detect bz compressed kernel\n");
+        return rc;
+    }
+
+    if ( (rc = elf_init(&elf, image_start, image_len)) != 0 )
+    {
+        printk("Unable to init ELF\n");
+        return rc;
+    }
+    if ( opt_dom0_verbose )
+        elf_set_verbose(&elf);
+    elf_parse_binary(&elf);
+    if ( (rc = elf_xen_parse(&elf, &parms, true)) != 0 )
+    {
+        printk("Unable to parse kernel for ELFNOTES\n");
+        if ( elf_check_broken(&elf) )
+            printk("%pd kernel: broken ELF: %s\n", d, elf_check_broken(&elf));
+        return rc;
+    }
+
+    if ( parms.phys_entry == UNSET_ADDR32 )
+    {
+        printk("Unable to find XEN_ELFNOTE_PHYS32_ENTRY address\n");
+        return -EINVAL;
+    }
+
+    /* Copy the OS image and free temporary buffer. */
+    elf.dest_base = (void *)(parms.virt_kstart - parms.virt_base);
+    elf.dest_size = parms.virt_kend - parms.virt_kstart;
+
+    if ( !check_and_adjust_load_address(d, &elf, &parms) )
+        return -ENOSPC;
+
+    elf_set_vcpu(&elf, v);
+    rc = elf_load_binary(&elf);
+    if ( rc < 0 )
+    {
+        printk("Failed to load kernel: %d\n", rc);
+        if ( elf_check_broken(&elf) )
+            printk("%pd kernel: broken ELF: %s\n", d, elf_check_broken(&elf));
+        return rc;
+    }
+
+    /*
+     * Find a RAM region big enough (and that doesn't overlap with the loaded
+     * kernel) in order to load the initrd and the metadata. Note it could be
+     * split into smaller allocations, done as a single region in order to
+     * simplify it.
+     */
+    extra_space = sizeof(start_info);
+
+    if ( initrd )
+    {
+        size_t initrd_space = elf_round_up(&elf, initrd_len);
+
+        if ( initrd->cmdline_pa )
+        {
+            initrd_cmdline = __va(initrd->cmdline_pa);
+            if ( !*initrd_cmdline )
+                initrd_cmdline = NULL;
+        }
+        if ( initrd_cmdline )
+            initrd_space += strlen(initrd_cmdline) + 1;
+
+        if ( initrd_space )
+            extra_space += ROUNDUP(initrd_space, PAGE_SIZE) + sizeof(mod);
+        else
+            initrd = NULL;
+    }
+
+    if ( bd->cmdline )
+        extra_space += elf_round_up(&elf, strlen(bd->cmdline) + 1);
+
+    last_addr = find_memory(d, &elf, extra_space);
+    if ( last_addr == INVALID_PADDR )
+    {
+        printk("Unable to find a memory region to load initrd and metadata\n");
+        return -ENOMEM;
+    }
+
+    if ( initrd != NULL )
+    {
+        rc = hvm_copy_to_guest_phys(last_addr, __va(initrd->start),
+                                    initrd_len, v);
+        if ( rc )
+        {
+            printk("Unable to copy initrd to guest\n");
+            return rc;
+        }
+
+        mod.paddr = last_addr;
+        mod.size = initrd_len;
+        last_addr += elf_round_up(&elf, initrd_len);
+        if ( initrd_cmdline )
+        {
+            size_t len = strlen(initrd_cmdline) + 1;
+
+            rc = hvm_copy_to_guest_phys(last_addr, initrd_cmdline, len, v);
+            if ( rc )
+            {
+                printk("Unable to copy module command line\n");
+                return rc;
+            }
+            mod.cmdline_paddr = last_addr;
+            last_addr += len;
+        }
+        last_addr = ROUNDUP(last_addr, PAGE_SIZE);
+    }
+
+    /* Free temporary buffers. */
+    free_boot_modules();
+
+    if ( bd->cmdline )
+    {
+        rc = hvm_copy_to_guest_phys(last_addr, bd->cmdline,
+                                    strlen(bd->cmdline) + 1, v);
+        if ( rc )
+        {
+            printk("Unable to copy guest command line\n");
+            return rc;
+        }
+        start_info.cmdline_paddr = last_addr;
+        /*
+         * Round up to 32/64 bits (depending on the guest kernel bitness) so
+         * the modlist/start_info is aligned.
+         */
+        last_addr += elf_round_up(&elf, strlen(bd->cmdline) + 1);
+    }
+    if ( initrd != NULL )
+    {
+        rc = hvm_copy_to_guest_phys(last_addr, &mod, sizeof(mod), v);
+        if ( rc )
+        {
+            printk("Unable to copy guest modules\n");
+            return rc;
+        }
+        start_info.modlist_paddr = last_addr;
+        start_info.nr_modules = 1;
+        last_addr += sizeof(mod);
+    }
+
+    start_info.magic = XEN_HVM_START_MAGIC_VALUE;
+    start_info.flags = SIF_PRIVILEGED | SIF_INITDOMAIN;
+    rc = hvm_copy_to_guest_phys(last_addr, &start_info, sizeof(start_info), v);
+    if ( rc )
+    {
+        printk("Unable to copy start info to guest\n");
+        return rc;
+    }
+
+    *entry = parms.phys_entry;
+    *start_info_addr = last_addr;
+
+    return 0;
+}
+
 int __init dom_construct_pvh(struct boot_domain *bd)
 {
+    paddr_t entry, start_info;
     int rc;
 
     printk(XENLOG_INFO "*** Building a PVH Dom%d ***\n", bd->domid);
@@ -327,7 +659,35 @@ int __init dom_construct_pvh(struct boot_domain *bd)
         return rc;
     }
 
-    return dom0_construct_pvh(bd);
+    rc = pvh_load_kernel(bd, &entry, &start_info);
+    if ( rc )
+    {
+        printk("Failed to load Dom0 kernel\n");
+        return rc;
+    }
+
+    rc = hvm_setup_cpus(bd->d, entry, start_info);
+    if ( rc )
+    {
+        printk("Failed to setup Dom0 CPUs: %d\n", rc);
+        return rc;
+    }
+
+    rc = dom0_pvh_setup_acpi(bd->d, start_info);
+    if ( rc )
+    {
+        printk("Failed to setup Dom0 ACPI tables: %d\n", rc);
+        return rc;
+    }
+
+    if ( opt_dom0_verbose )
+    {
+        printk("Dom%u memory map:\n", bd->domid);
+        print_e820_memory_map(bd->d->arch.e820, bd->d->arch.nr_e820);
+    }
+
+    printk("WARNING: PVH is an experimental mode with limited functionality\n");
+    return 0;
 }
 
 /*
diff --git a/xen/arch/x86/include/asm/dom0_build.h b/xen/arch/x86/include/asm/dom0_build.h
index 3819b3f4e7a4..6947aaa1dce3 100644
--- a/xen/arch/x86/include/asm/dom0_build.h
+++ b/xen/arch/x86/include/asm/dom0_build.h
@@ -24,7 +24,6 @@ int dom0_pvh_setup_acpi(struct domain *d, paddr_t start_info);
 int dom0_pvh_populate_p2m(struct domain *d);
 
 int dom0_construct_pv(struct boot_domain *bd);
-int dom0_construct_pvh(struct boot_domain *bd);
 
 void dom0_update_physmap(bool compat, unsigned long pfn,
                          unsigned long mfn, unsigned long vphysmap_s);
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 27/38] x86/hyperlaunch: introduce domain builder general dom creation
Date: Sat, 19 Apr 2025 18:08:09 -0400
Message-Id: <20250419220820.4234-28-dpsmith@apertussolutions.com>
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Introduce the builder_create_domains() function that provides the domain
construciton abstraction for the hyperlaunch domain builder.

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/domain-builder/core.c        | 17 +++++++++++++++
 xen/arch/x86/include/asm/bootinfo.h       | 26 +++++++++++++++++++++++
 xen/arch/x86/include/asm/domain-builder.h |  1 +
 xen/arch/x86/setup.c                      | 23 +++++++++++++++++---
 4 files changed, 64 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/domain-builder/core.c b/xen/arch/x86/domain-builder/core.c
index 8d137ecaaf84..2f0b8bd82c3a 100644
--- a/xen/arch/x86/domain-builder/core.c
+++ b/xen/arch/x86/domain-builder/core.c
@@ -9,6 +9,7 @@
 
 #include 
 #include 
+#include 
 
 #include "fdt.h"
 
@@ -102,6 +103,22 @@ void __init builder_init(struct boot_info *bi)
     }
 }
 
+unsigned int __init builder_create_domains(struct boot_info *bi)
+{
+    unsigned int build_count = 0;
+    struct boot_domain *bd = &bi->domains[0];
+
+    if ( bd->kernel == NULL && bd->capabilities & BUILD_CAPS_CONTROL )
+        panic("%s: control domain missing kernel\n", __func__);
+
+
+    arch_create_dom(bi, bd);
+    if ( bd->d )
+        build_count++;
+
+    return build_count;
+}
+
 /*
  * Local variables:
  * mode: C
diff --git a/xen/arch/x86/include/asm/bootinfo.h b/xen/arch/x86/include/asm/bootinfo.h
index 5b2c93b1ef9e..430ae08cf5ef 100644
--- a/xen/arch/x86/include/asm/bootinfo.h
+++ b/xen/arch/x86/include/asm/bootinfo.h
@@ -132,6 +132,32 @@ static inline unsigned int __init next_boot_module_index(
           (i) <= (b)->nr_modules;                       \
           (i) = next_boot_module_index(b, t, i + 1) )
 
+/*
+ * next_boot_domain_index:
+ *     Finds the next boot domain with capability cap, starting at array index
+ *     start.
+ *
+ * Returns:
+ *      Success - index in boot_domains array
+ *      Failure - a value greater than MAX_NR_BOOTDOMS
+ */
+static inline unsigned int __init next_boot_domain_index(
+    const struct boot_info *bi, uint32_t cap, unsigned int start)
+{
+    int i;
+
+    for ( i = start; i < bi->nr_domains; i++ )
+    {
+        if ( bi->domains[i].capabilities & cap )
+            return i;
+    }
+
+    return MAX_NR_BOOTDOMS + 1;
+}
+
+#define first_boot_domain_index(bi, cap)              \
+    next_boot_domain_index(bi, cap, 0)
+
 #endif /* X86_BOOTINFO_H */
 
 /*
diff --git a/xen/arch/x86/include/asm/domain-builder.h b/xen/arch/x86/include/asm/domain-builder.h
index ccab02c3a1fd..5dc5661bec07 100644
--- a/xen/arch/x86/include/asm/domain-builder.h
+++ b/xen/arch/x86/include/asm/domain-builder.h
@@ -8,6 +8,7 @@ int __init builder_get_cmdline(
     struct boot_info *bi, int offset, char *cmdline, size_t size);
 
 void builder_init(struct boot_info *bi);
+unsigned int builder_create_domains(struct boot_info *bi);
 
 struct domain *arch_create_dom(
     struct boot_info *bi, struct boot_domain *bd);
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 8f956b6eca4f..da5a8e8d8ed3 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -2015,9 +2015,26 @@ void asmlinkage __init noreturn __start_xen(void)
      * We're going to setup domain0 using the module(s) that we stashed safely
      * above our heap. The second module, if present, is an initrd ramdisk.
      */
-    dom0 = arch_create_dom(bi, &bi->domains[0]);
-    if ( !dom0 )
-        panic("Could not set up DOM0 guest OS\n");
+    ret = builder_create_domains(bi);
+    if ( ret <= 0 )
+        panic("Could not set up boot-time domains\n");
+    else
+        printk(XENLOG_INFO "Constructed %d boot-time domains\n", ret);
+
+    /* Selection order: hardware domain, control domain, first domain */
+    i = first_boot_domain_index(bi, BUILD_CAPS_HARDWARE);
+    if ( i >= MAX_NR_BOOTDOMS )
+    {
+        i = first_boot_domain_index(bi, BUILD_CAPS_CONTROL);
+        if ( i >= MAX_NR_BOOTDOMS )
+        {
+            printk(XENLOG_WARNING
+                   "A hwdom/ctrldom not detected, using 0th domain\n");
+            i = 0;
+        }
+    }
+
+    dom0 = bi->domains[i].d;
 
     heap_init_late();
 
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 30/38] x86/hyperlaunch: allocate xenstore for domu
Date: Sat, 19 Apr 2025 18:08:12 -0400
Message-Id: <20250419220820.4234-31-dpsmith@apertussolutions.com>
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During domU construction, a page of memory and an event channel must be setup
for xenstore connection. In this commit, a page from the special page region of
domU is setup as the xenstore page along with an event channel. The page
address and event channel are published in the HVM parameters, so the domain
can be announced to Xenstore.

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/domain-builder/domain.c   | 38 ++++++++++++++++++++++++--
 xen/arch/x86/hvm/dom_build.c           | 32 ++++++++++++++++++++++
 xen/arch/x86/include/asm/boot-domain.h |  2 +-
 3 files changed, 69 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/domain-builder/domain.c b/xen/arch/x86/domain-builder/domain.c
index 7ce069a57c5d..b413a87cc9c9 100644
--- a/xen/arch/x86/domain-builder/domain.c
+++ b/xen/arch/x86/domain-builder/domain.c
@@ -240,6 +240,38 @@ static int __init alloc_console_evtchn(
     return 0;
 }
 
+static int __init alloc_store_evtchn(
+    const struct boot_info *bi, struct boot_domain *bd)
+{
+    evtchn_alloc_unbound_t evtchn_req;
+    const struct boot_domain *xsdom;
+    int idx, rc;
+
+    idx = first_boot_domain_index(bi, BUILD_CAPS_XENSTORE);
+    if ( idx < 0 )
+    {
+        printk(XENLOG_WARNING "No backing xenstore domain for %pdv\n",
+               bd->d);
+        return -EINVAL;
+    }
+
+    if ( bi->domains[idx].d )
+        xsdom = &bi->domains[idx];
+    else
+    {
+        printk(XENLOG_WARNING "Xenstore domain for %pd console not constructed\n",
+               bd->d);
+        return -EINVAL;
+    }
+
+    if ( (rc = alloc_dom_evtchn(bd, xsdom, &evtchn_req)) < 0 )
+        return rc;
+
+    bd->store.evtchn = evtchn_req.port;
+
+    return 0;
+}
+
 static size_t __init domain_cmdline_size(
     struct boot_info *bi, struct boot_domain *bd)
 {
@@ -362,8 +394,10 @@ struct domain *__init arch_create_dom(
         bd->cmdline = cmdline;
     }
 
-   if ( !(bd->capabilities & BUILD_CAPS_HARDWARE) )
-       alloc_console_evtchn(bi, bd);
+    if ( !(bd->capabilities & BUILD_CAPS_XENSTORE) )
+        alloc_store_evtchn(bi, bd);
+    if ( !(bd->capabilities & BUILD_CAPS_HARDWARE) )
+        alloc_console_evtchn(bi, bd);
 
     if ( construct_dom0(bd) != 0 )
         panic("Could not construct domain 0\n");
diff --git a/xen/arch/x86/hvm/dom_build.c b/xen/arch/x86/hvm/dom_build.c
index 934ae138e58f..2798542e5483 100644
--- a/xen/arch/x86/hvm/dom_build.c
+++ b/xen/arch/x86/hvm/dom_build.c
@@ -930,6 +930,35 @@ static int __init alloc_console_page(struct boot_domain *bd)
     return 0;
 }
 
+static int __init alloc_xenstore_page(struct boot_domain *bd)
+{
+    paddr_t xs_addr = special_pfn(SPECIALPAGE_XENSTORE) << PAGE_SHIFT;
+    uint32_t fields[7] = { 0, 0, 0, 0, 0, 1, 0};
+
+    if ( !port_is_valid(bd->d, bd->store.evtchn) )
+    {
+        printk("No event channel available for %pd xenstore\n", bd->d);
+        return -EINVAL;
+    }
+
+    /*
+     * Set connection field to XENSTORE_RECONNECT, where the
+     * xenstore_domain_interface fields are located after the 2 1024 buffers
+     */
+    if ( hvm_copy_to_guest_phys(xs_addr + 2048, fields, sizeof(fields),
+                                bd->d->vcpu[0]) )
+    {
+        printk("Unable to set xenstore connection state\n");
+        return -EFAULT;
+    }
+
+    bd->store.gfn = gfn_x(gaddr_to_gfn(xs_addr));
+    bd->d->arch.hvm.params[HVM_PARAM_STORE_PFN] = bd->store.gfn;
+    bd->d->arch.hvm.params[HVM_PARAM_STORE_EVTCHN] = bd->store.evtchn;
+
+    return 0;
+}
+
 int __init dom_construct_pvh(struct boot_domain *bd)
 {
     paddr_t entry, start_info;
@@ -1009,6 +1038,9 @@ int __init dom_construct_pvh(struct boot_domain *bd)
     if ( !is_hardware_domain(bd->d) )
         alloc_console_page(bd);
 
+    if ( !is_xenstore_domain(bd->d) )
+        alloc_xenstore_page(bd);
+
     if ( opt_dom0_verbose )
     {
         printk("Dom%u memory map:\n", bd->domid);
diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/include/asm/boot-domain.h
index cb6e1fab23ba..df2bfa0c94fa 100644
--- a/xen/arch/x86/include/asm/boot-domain.h
+++ b/xen/arch/x86/include/asm/boot-domain.h
@@ -41,7 +41,7 @@ struct boot_domain {
     struct {
         xen_pfn_t gfn;
         evtchn_port_t evtchn;
-    } console;
+    } console, store;
 };
 
 #endif
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 20/38] x86/hyperlaunch: move populating p2m under domain builder
Date: Sat, 19 Apr 2025 18:08:02 -0400
Message-Id: <20250419220820.4234-21-dpsmith@apertussolutions.com>
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Introduce hvm_populate_p2m() for populating domU p2m maps. Rename
pvh_populate_p2m() to dom0_pvh_populate_p2m() and export it. With these
adjustments, move the calls to populate the p2m maps under domain builder.

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/hvm/dom0_build.c             | 14 ++------
 xen/arch/x86/hvm/dom_build.c              | 39 +++++++++++++++++++++++
 xen/arch/x86/include/asm/dom0_build.h     |  1 +
 xen/arch/x86/include/asm/domain-builder.h |  2 ++
 4 files changed, 45 insertions(+), 11 deletions(-)

diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build.c
index 8ea4c7bd2792..73ce33fb17f1 100644
--- a/xen/arch/x86/hvm/dom0_build.c
+++ b/xen/arch/x86/hvm/dom0_build.c
@@ -88,9 +88,8 @@ static int __init modify_identity_mmio(struct domain *d, unsigned long pfn,
 }
 
 /* Populate a HVM memory range using the biggest possible order. */
-static int __init pvh_populate_memory_range(struct domain *d,
-                                            unsigned long start,
-                                            unsigned long nr_pages)
+int __init pvh_populate_memory_range(
+    struct domain *d, unsigned long start, unsigned long nr_pages)
 {
     static const struct {
         unsigned long align;
@@ -399,7 +398,7 @@ void __init dom0_pvh_setup_e820(struct domain *d, unsigned long nr_pages)
     ASSERT(cur_pages == nr_pages);
 }
 
-static int __init pvh_populate_p2m(struct domain *d)
+int __init dom0_pvh_populate_p2m(struct domain *d)
 {
     struct vcpu *v = d->vcpu[0];
     unsigned int i;
@@ -1262,13 +1261,6 @@ int __init dom0_construct_pvh(struct boot_domain *bd)
     struct domain *d = bd->d;
     int rc;
 
-    rc = pvh_populate_p2m(d);
-    if ( rc )
-    {
-        printk("Failed to setup Dom0 physical memory map\n");
-        return rc;
-    }
-
     rc = pvh_load_kernel(bd, &entry, &start_info);
     if ( rc )
     {
diff --git a/xen/arch/x86/hvm/dom_build.c b/xen/arch/x86/hvm/dom_build.c
index 658d3d170e64..9421dc431ba9 100644
--- a/xen/arch/x86/hvm/dom_build.c
+++ b/xen/arch/x86/hvm/dom_build.c
@@ -23,6 +23,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
 #include 
 
@@ -247,6 +249,33 @@ int __init hvm_setup_cpus(
     return 0;
 }
 
+static int __init hvm_populate_p2m(struct domain *d)
+{
+    unsigned int i;
+
+    /* Populate memory map. */
+    for ( i = 0; i < d->arch.nr_e820; i++ )
+    {
+        int rc;
+        unsigned long addr, size;
+
+        if ( d->arch.e820[i].type != E820_RAM &&
+             d->arch.e820[i].type != E820_ACPI &&
+             PFN_DOWN(d->arch.e820[i].addr) != START_SPECIAL_REGION )
+                continue;
+
+        addr = PFN_DOWN(d->arch.e820[i].addr);
+        size = PFN_DOWN(d->arch.e820[i].size);
+
+        rc = pvh_populate_memory_range(d, addr, size);
+        if ( rc )
+            return rc;
+
+    }
+
+    return 0;
+}
+
 int __init dom_construct_pvh(struct boot_domain *bd)
 {
     int rc;
@@ -288,6 +317,16 @@ int __init dom_construct_pvh(struct boot_domain *bd)
     if ( is_hardware_domain(bd->d) )
         iommu_hwdom_init(bd->d);
 
+    if ( is_control_domain(bd->d) || is_hardware_domain(bd->d) )
+        rc = dom0_pvh_populate_p2m(bd->d);
+    else
+        rc = hvm_populate_p2m(bd->d);
+    if ( rc )
+    {
+        printk("Failed to setup HVM/PVH %pd physical memory map\n", bd->d);
+        return rc;
+    }
+
     return dom0_construct_pvh(bd);
 }
 
diff --git a/xen/arch/x86/include/asm/dom0_build.h b/xen/arch/x86/include/asm/dom0_build.h
index 36f563bd9d5b..3819b3f4e7a4 100644
--- a/xen/arch/x86/include/asm/dom0_build.h
+++ b/xen/arch/x86/include/asm/dom0_build.h
@@ -21,6 +21,7 @@ void dom0_pv_restrict_pages(
 void dom0_pvh_setup_e820(struct domain *d, unsigned long nr_pages);
 
 int dom0_pvh_setup_acpi(struct domain *d, paddr_t start_info);
+int dom0_pvh_populate_p2m(struct domain *d);
 
 int dom0_construct_pv(struct boot_domain *bd);
 int dom0_construct_pvh(struct boot_domain *bd);
diff --git a/xen/arch/x86/include/asm/domain-builder.h b/xen/arch/x86/include/asm/domain-builder.h
index 7bc2fbe66bc2..fa6fa60841ab 100644
--- a/xen/arch/x86/include/asm/domain-builder.h
+++ b/xen/arch/x86/include/asm/domain-builder.h
@@ -10,6 +10,8 @@ int __init builder_get_cmdline(
 void builder_init(struct boot_info *bi);
 
 int hvm_setup_cpus(struct domain *d, paddr_t entry, paddr_t start_info);
+int pvh_populate_memory_range(
+    struct domain *d, unsigned long start, unsigned long nr_pages);
 
 unsigned long dom_paging_pages(
     const struct boot_domain *d, unsigned long nr_pages);
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 23/38] x86/hyperlaunch: add domu acpi construction
Date: Sat, 19 Apr 2025 18:08:05 -0400
Message-Id: <20250419220820.4234-24-dpsmith@apertussolutions.com>
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Introduce hvm_setup_acpi() that will construct an APCI table for a general HVM
domU guest.

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/hvm/dom_build.c | 213 ++++++++++++++++++++++++++++++++++-
 1 file changed, 212 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/hvm/dom_build.c b/xen/arch/x86/hvm/dom_build.c
index f997f293f329..c482d5c2d974 100644
--- a/xen/arch/x86/hvm/dom_build.c
+++ b/xen/arch/x86/hvm/dom_build.c
@@ -408,6 +408,214 @@ int __init hvm_add_mem_range(
     return 0;
 }
 
+static int __init hvm_setup_acpi_madt(
+    struct domain *d, struct acpi_table_madt *madt)
+{
+    struct acpi_table_header *table;
+    struct acpi_madt_local_apic *lapic;
+    acpi_status status;
+    unsigned long size = hvm_size_acpi_madt(d);
+    int i;
+
+    /* Copy the native MADT table header. */
+    status = acpi_get_table(ACPI_SIG_MADT, 0, &table);
+    if ( !ACPI_SUCCESS(status) )
+    {
+        printk("Failed to get MADT ACPI table, aborting.\n");
+        return -EINVAL;
+    }
+    madt->header = *table;
+    madt->address = APIC_DEFAULT_PHYS_BASE;
+    /*
+     * NB: this is currently set to 4, which is the revision in the ACPI
+     * spec 6.1. Sadly ACPICA doesn't provide revision numbers for the
+     * tables described in the headers.
+     */
+    madt->header.revision = min_t(unsigned char, table->revision, 4);
+
+    lapic = (void *)(madt + 1);
+
+    for ( i = 0; i < d->max_vcpus; i++ )
+    {
+        lapic->header.type = ACPI_MADT_TYPE_LOCAL_APIC;
+        lapic->header.length = sizeof(*lapic);
+        lapic->id = i * 2;
+        lapic->processor_id = i;
+        lapic->lapic_flags = ACPI_MADT_ENABLED;
+
+        lapic++;
+    }
+
+    madt->header.length = size;
+    /*
+     * Calling acpi_tb_checksum here is a layering violation, but
+     * introducing a wrapper for such simple usage seems overkill.
+     */
+    madt->header.checksum -= acpi_tb_checksum(ACPI_CAST_PTR(u8, madt), size);
+
+    return 0;
+}
+
+static int __init hvm_setup_acpi_xsdt(
+    struct domain *d, struct acpi_table_xsdt *xsdt, paddr_t madt_addr)
+{
+    struct acpi_table_header *table;
+    struct acpi_table_rsdp *rsdp;
+    unsigned long size = hvm_size_acpi_xsdt(d);
+    paddr_t xsdt_paddr;
+
+    /*
+     * Restore original DMAR table signature, we are going to filter it from
+     * the new XSDT that is presented to the guest, so it is no longer
+     * necessary to have it's signature zapped.
+     */
+    acpi_dmar_reinstate();
+
+    /* Copy the native XSDT table header. */
+    rsdp = acpi_os_map_memory(acpi_os_get_root_pointer(), sizeof(*rsdp));
+    if ( !rsdp )
+    {
+        printk("Unable to map RSDP\n");
+        return -EINVAL;
+    }
+    xsdt_paddr = rsdp->xsdt_physical_address;
+    acpi_os_unmap_memory(rsdp, sizeof(*rsdp));
+    table = acpi_os_map_memory(xsdt_paddr, sizeof(*table));
+    if ( !table )
+    {
+        printk("Unable to map XSDT\n");
+        return -EINVAL;
+    }
+    xsdt->header = *table;
+    acpi_os_unmap_memory(table, sizeof(*table));
+
+    /* Add the custom MADT. */
+    xsdt->table_offset_entry[0] = madt_addr;
+
+    xsdt->header.revision = 1;
+    xsdt->header.length = size;
+    /*
+     * Calling acpi_tb_checksum here is a layering violation, but
+     * introducing a wrapper for such simple usage seems overkill.
+     */
+    xsdt->header.checksum -= acpi_tb_checksum(ACPI_CAST_PTR(u8, xsdt), size);
+
+    return 0;
+}
+
+static int __init hvm_alloc_acpi_region(
+    struct domain *d, void **region, unsigned long size, paddr_t *addr)
+{
+    int i;
+
+    *addr = 0;
+
+    for ( i = 0; i < d->arch.nr_e820; i++ )
+    {
+        if ( d->arch.e820[i].type == E820_ACPI )
+        {
+            if ( d->arch.e820[i].size < size )
+                break;
+
+            *addr = d->arch.e820[i].addr;
+            break;
+        }
+    }
+
+    /* The e820 setup did not allocate ACPI region, steal one instead. */
+    if ( *addr == 0 )
+    {
+        if ( hvm_steal_ram(d, size, 0, GB(4), addr) )
+        {
+            printk("Unable to allocate guest RAM for RSDP\n");
+            return -ENOMEM;
+        }
+        if ( hvm_add_mem_range(d, *addr, *addr + size, E820_ACPI) )
+        {
+            printk("Unable to add RSDP region to memory map\n");
+            return -EFAULT;
+        }
+    }
+
+    *region = xzalloc_bytes(size);
+    if ( !region )
+        return -ENOMEM;
+
+    return 0;
+}
+
+static int __init hvm_setup_acpi(struct domain *d, paddr_t start_info)
+{
+    paddr_t rsdp_paddr, xsdt_paddr, madt_paddr;
+    struct acpi_table_rsdp *rsdp;
+    unsigned long size = hvm_size_acpi_region(d);
+    void *table;
+    int rc;
+
+    rc = hvm_alloc_acpi_region(d, &table, size, &rsdp_paddr);
+    if ( rc < 0 )
+        return rc;
+
+    /* RSDP */
+    rsdp = table;
+    xsdt_paddr = rsdp_paddr + sizeof(struct acpi_table_rsdp);
+
+    *rsdp = (struct acpi_table_rsdp){
+        .signature = ACPI_SIG_RSDP,
+        .revision = 2,
+        .length = sizeof(struct acpi_table_rsdp),
+        .oem_id = "XenHL\0", /* Xen Hyperlaunch */
+        .xsdt_physical_address = xsdt_paddr,
+    };
+
+    rsdp->checksum -= acpi_tb_checksum(ACPI_CAST_PTR(u8, rsdp),
+                                       ACPI_RSDP_REV0_SIZE);
+    rsdp->extended_checksum -= acpi_tb_checksum(ACPI_CAST_PTR(u8, rsdp),
+                                                sizeof(*rsdp));
+
+    /* XSDT */
+    table += sizeof(struct acpi_table_rsdp);
+    madt_paddr = xsdt_paddr + hvm_size_acpi_xsdt(d);
+
+    rc = hvm_setup_acpi_xsdt(d, table, madt_paddr);
+    if ( rc )
+    {
+        printk("Unable to construct XSDT\n");
+        goto out;
+    }
+
+
+    /* MADT */
+    table += hvm_size_acpi_xsdt(d);
+    rc = hvm_setup_acpi_madt(d, table);
+    if ( rc )
+    {
+        printk("Unable to construct MADT\n");
+        goto out;
+    }
+
+    /* Copy ACPI region into guest memory. */
+    rc = hvm_copy_to_guest_phys(rsdp_paddr, rsdp, size, d->vcpu[0]);
+    if ( rc )
+    {
+        printk("Unable to copy RSDP into guest memory\n");
+        goto out;
+    }
+
+    /* Copy RSDP address to start_info. */
+    rc = hvm_copy_to_guest_phys(
+        start_info + offsetof(struct hvm_start_info, rsdp_paddr), &rsdp_paddr,
+        sizeof(((struct hvm_start_info *) 0)->rsdp_paddr), d->vcpu[0]);
+    if ( rc )
+        printk("Unable to copy RSDP address to start info\n");
+
+ out:
+    if ( rsdp )
+        xfree(rsdp);
+
+    return rc;
+}
+
 static bool __init check_load_address(
     const struct domain *d, const struct elf_binary *elf)
 {
@@ -757,7 +965,10 @@ int __init dom_construct_pvh(struct boot_domain *bd)
         return rc;
     }
 
-    rc = dom0_pvh_setup_acpi(bd->d, start_info);
+    if ( is_control_domain(bd->d) || is_hardware_domain(bd->d) )
+        rc = dom0_pvh_setup_acpi(bd->d, start_info);
+    else
+        rc = hvm_setup_acpi(bd->d, start_info);
     if ( rc )
     {
         printk("Failed to setup Dom0 ACPI tables: %d\n", rc);
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 19/38] x86/hyperlaunch: add domu memory map construction
Date: Sat, 19 Apr 2025 18:08:01 -0400
Message-Id: <20250419220820.4234-20-dpsmith@apertussolutions.com>
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Introduce hvm_setup_e820() that will build the e820 memory map for a general
domU. To populate the ACPI entry, ACPI table size helpers are introduced. A
conditional is added to the domain builder to select between calling
hvm_setup_e820() and dom0_pvh_setup_e820() depending on if it is building dom0
or a domU.

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/hvm/dom_build.c | 149 ++++++++++++++++++++++++++++++++++-
 1 file changed, 148 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/hvm/dom_build.c b/xen/arch/x86/hvm/dom_build.c
index 078e42447b0a..658d3d170e64 100644
--- a/xen/arch/x86/hvm/dom_build.c
+++ b/xen/arch/x86/hvm/dom_build.c
@@ -16,6 +16,7 @@
 
 #include 
 
+#include 
 #include 
 
 #include 
@@ -43,12 +44,158 @@ static void __hwdom_init pvh_setup_mmcfg(struct domain *d)
     }
 }
 
+static unsigned long __init hvm_size_acpi_madt(struct domain *d)
+{
+    unsigned long size = sizeof(struct acpi_table_madt);
+
+    size += sizeof(struct acpi_madt_local_apic) * d->max_vcpus;
+
+    return size;
+}
+
+static unsigned long __init hvm_size_acpi_xsdt(struct domain *d)
+{
+    unsigned long size = sizeof(struct acpi_table_xsdt);
+    /* Only adding the MADT table to the XSDT. */
+    unsigned int num_tables = 1;
+
+    /*
+     * No need to add or subtract anything because struct acpi_table_xsdt
+     * includes one array slot already.
+     */
+    size += num_tables * sizeof(uint64_t);
+
+    return size;
+}
+
+static unsigned long __init hvm_size_acpi_region(struct domain *d)
+{
+    unsigned long size = sizeof(struct acpi_table_rsdp);
+
+    size += hvm_size_acpi_xsdt(d);
+    size += hvm_size_acpi_madt(d);
+
+    return ROUNDUP(size, PAGE_SIZE);
+}
+
+/* From xenguest lib */
+#define END_SPECIAL_REGION   0xff000U
+#define NR_SPECIAL_PAGES     8
+#define START_SPECIAL_REGION (END_SPECIAL_REGION - NR_SPECIAL_PAGES)
+
+#define SPECIALPAGE_PAGING   0
+#define SPECIALPAGE_ACCESS   1
+#define SPECIALPAGE_SHARING  2
+#define SPECIALPAGE_BUFIOREQ 3
+#define SPECIALPAGE_XENSTORE 4
+#define SPECIALPAGE_IOREQ    5
+#define SPECIALPAGE_IDENT_PT 6
+#define SPECIALPAGE_CONSOLE  7
+#define special_pfn(x)       (START_SPECIAL_REGION + (x))
+
+/*
+ * Allocation scheme, derived from xenlight/xenguest:
+ *
+ *                                  |  <4G MMIO Hole  |
+ * [ Low Mem ][ RDM Mem ][ >1M Mem ][ ACPI ][ Special ][ High Mem ]
+ *
+ */
+static void __init hvm_setup_e820(struct domain *d, unsigned long nr_pages)
+{
+    const uint32_t lowmem_reserved_base = 0x9e000;
+    const uint32_t rdm_base = 0xa0000, rdm_size = 0x60;
+    unsigned long low_pages, ext_pages, mmio_pages, acpi_pages, high_pages = 0;
+    unsigned long max_ext_pages = (HVM_BELOW_4G_MMIO_START - MB(1)) >> PAGE_SHIFT,
+                  page_count = 0;
+    unsigned nr = 0, e820_entries = 5;
+
+    /* low pages: below 1MB */
+    low_pages = lowmem_reserved_base >> PAGE_SHIFT;
+    if ( low_pages > nr_pages )
+        panic("Insufficient memory for HVM/PVH domain (%pd)\n", d);
+
+    acpi_pages = hvm_size_acpi_region(d) >> PAGE_SHIFT;
+    mmio_pages = acpi_pages + NR_SPECIAL_PAGES;
+
+    /* ext pages: from 1MB to mmio hole */
+    ext_pages = nr_pages - (low_pages + mmio_pages);
+    if ( ext_pages > max_ext_pages )
+        ext_pages = max_ext_pages;
+
+    /* high pages: above 4GB */
+    if ( nr_pages > (low_pages + mmio_pages + ext_pages) )
+        high_pages = nr_pages - (low_pages + mmio_pages + ext_pages);
+
+    /* If we should have a highmem range, add one more e820 entry */
+    if ( high_pages )
+        e820_entries++;
+
+    ASSERT(e820_entries < E820MAX);
+
+    d->arch.e820 = xzalloc_array(struct e820entry, e820_entries);
+    if ( !d->arch.e820 )
+        panic("Unable to allocate memory for boot domain e820 map\n");
+
+    /* usable: Low memory */
+    d->arch.e820[nr].addr = 0x000000;
+    d->arch.e820[nr].size = low_pages << PAGE_SHIFT;
+    d->arch.e820[nr].type = E820_RAM;
+    page_count += d->arch.e820[nr].size >> PAGE_SHIFT;
+    nr++;
+
+    /* reserved: lowmem reserved device memory */
+    d->arch.e820[nr].addr = rdm_base;
+    d->arch.e820[nr].size = rdm_size;
+    d->arch.e820[nr].type = E820_RESERVED;
+    nr++;
+
+    /* usable: extended memory from 1MB */
+    d->arch.e820[nr].addr = 0x100000;
+    d->arch.e820[nr].size = ext_pages << PAGE_SHIFT;
+    d->arch.e820[nr].type = E820_RAM;
+    page_count += d->arch.e820[nr].size >> PAGE_SHIFT;
+    nr++;
+
+    /* reserved: ACPI entry, ACPI_INFO_PHYSICAL_ADDRESS */
+    d->arch.e820[nr].addr = 0xFC000000;
+    d->arch.e820[nr].size = acpi_pages << PAGE_SHIFT;
+    d->arch.e820[nr].type = E820_ACPI;
+    page_count += d->arch.e820[nr].size >> PAGE_SHIFT;
+    nr++;
+
+    /* reserved: HVM special pages, X86_HVM_END_SPECIAL_REGION */
+    d->arch.e820[nr].addr = START_SPECIAL_REGION << PAGE_SHIFT;
+    d->arch.e820[nr].size = NR_SPECIAL_PAGES << PAGE_SHIFT;
+    d->arch.e820[nr].type = E820_RESERVED;
+    page_count += d->arch.e820[nr].size >> PAGE_SHIFT;
+    nr++;
+
+    /* usable: highmem */
+    if ( high_pages )
+    {
+        d->arch.e820[nr].addr = 0x100000000;
+        d->arch.e820[nr].size = high_pages << PAGE_SHIFT;
+        d->arch.e820[nr].type = E820_RAM;
+        page_count += d->arch.e820[nr].size >> PAGE_SHIFT;
+        nr++;
+    }
+
+    d->arch.nr_e820 = nr;
+
+    ASSERT(nr == e820_entries);
+    ASSERT(nr_pages == page_count);
+}
+
 static void __init pvh_init_p2m(struct boot_domain *bd)
 {
     unsigned long nr_pages = dom_compute_nr_pages(bd, NULL);
     bool preempted;
 
-    dom0_pvh_setup_e820(bd->d, nr_pages);
+    if ( bd->capabilities & (BUILD_CAPS_CONTROL | BUILD_CAPS_HARDWARE) )
+        dom0_pvh_setup_e820(bd->d, nr_pages);
+    else
+        hvm_setup_e820(bd->d, nr_pages);
+
     do {
         preempted = false;
         paging_set_allocation(bd->d, dom_paging_pages(bd, nr_pages),
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 14/38] x86/hyperlaunch: move pvh p2m init to domain builder
Date: Sat, 19 Apr 2025 18:07:56 -0400
Message-Id: <20250419220820.4234-15-dpsmith@apertussolutions.com>
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Generalize pvh_init_p2m() for use on domU and relocate under the domain
builder. To support moving the function, dom0_pvh_setup_e820() was exported.

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/hvm/dom0_build.c         | 23 +----------------------
 xen/arch/x86/hvm/dom_build.c          | 25 +++++++++++++++++++++++++
 xen/arch/x86/include/asm/dom0_build.h |  2 ++
 3 files changed, 28 insertions(+), 22 deletions(-)

diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build.c
index f59af0e72810..4a371dfd66d7 100644
--- a/xen/arch/x86/hvm/dom0_build.c
+++ b/xen/arch/x86/hvm/dom0_build.c
@@ -323,7 +323,7 @@ static int __init pvh_setup_vmx_realmode_helpers(struct domain *d)
     return 0;
 }
 
-static __init void pvh_setup_e820(struct domain *d, unsigned long nr_pages)
+void __init dom0_pvh_setup_e820(struct domain *d, unsigned long nr_pages)
 {
     struct e820entry *entry, *entry_guest;
     unsigned int i;
@@ -399,20 +399,6 @@ static __init void pvh_setup_e820(struct domain *d, unsigned long nr_pages)
     ASSERT(cur_pages == nr_pages);
 }
 
-static void __init pvh_init_p2m(struct boot_domain *bd)
-{
-    unsigned long nr_pages = dom_compute_nr_pages(bd, NULL);
-    bool preempted;
-
-    pvh_setup_e820(bd->d, nr_pages);
-    do {
-        preempted = false;
-        paging_set_allocation(bd->d, dom_paging_pages(bd, nr_pages),
-                              &preempted);
-        process_pending_softirqs();
-    } while ( preempted );
-}
-
 static int __init pvh_populate_p2m(struct domain *d)
 {
     struct vcpu *v = d->vcpu[0];
@@ -1319,13 +1305,6 @@ int __init dom0_construct_pvh(struct boot_domain *bd)
     struct domain *d = bd->d;
     int rc;
 
-    /*
-     * Craft dom0 physical memory map and set the paging allocation. This must
-     * be done before the iommu initializion, since iommu initialization code
-     * will likely add mappings required by devices to the p2m (ie: RMRRs).
-     */
-    pvh_init_p2m(bd);
-
     iommu_hwdom_init(d);
 
     rc = pvh_populate_p2m(d);
diff --git a/xen/arch/x86/hvm/dom_build.c b/xen/arch/x86/hvm/dom_build.c
index b6e534226434..05064ae9ba96 100644
--- a/xen/arch/x86/hvm/dom_build.c
+++ b/xen/arch/x86/hvm/dom_build.c
@@ -10,13 +10,16 @@
 
 #include 
 #include 
+#include 
 #include 
 
 #include 
 
 #include 
 #include 
+#include 
 #include 
+#include 
 #include 
 
 static void __hwdom_init pvh_setup_mmcfg(struct domain *d)
@@ -37,6 +40,20 @@ static void __hwdom_init pvh_setup_mmcfg(struct domain *d)
     }
 }
 
+static void __init pvh_init_p2m(struct boot_domain *bd)
+{
+    unsigned long nr_pages = dom_compute_nr_pages(bd, NULL);
+    bool preempted;
+
+    dom0_pvh_setup_e820(bd->d, nr_pages);
+    do {
+        preempted = false;
+        paging_set_allocation(bd->d, dom_paging_pages(bd, nr_pages),
+                              &preempted);
+        process_pending_softirqs();
+    } while ( preempted );
+}
+
 int __init dom_construct_pvh(struct boot_domain *bd)
 {
     int rc;
@@ -67,6 +84,14 @@ int __init dom_construct_pvh(struct boot_domain *bd)
         }
     }
 
+    /*
+     * Craft domain physical memory map and set the paging allocation. This
+     * must be done before the iommu initializion, since iommu initialization
+     * code will likely add mappings required by devices to the p2m (ie:
+     * RMRRs).
+     */
+    pvh_init_p2m(bd);
+
     return dom0_construct_pvh(bd);
 }
 
diff --git a/xen/arch/x86/include/asm/dom0_build.h b/xen/arch/x86/include/asm/dom0_build.h
index 43a402af15b7..e5debd5adf9f 100644
--- a/xen/arch/x86/include/asm/dom0_build.h
+++ b/xen/arch/x86/include/asm/dom0_build.h
@@ -18,6 +18,8 @@ void calculate_dom0_pages(struct boot_domain *bd, unsigned long avail);
 void dom0_pv_restrict_pages(
     struct boot_domain *bd, struct elf_dom_parms *parms);
 
+void dom0_pvh_setup_e820(struct domain *d, unsigned long nr_pages);
+
 int dom0_construct_pv(struct boot_domain *bd);
 int dom0_construct_pvh(struct boot_domain *bd);
 
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 36/38] x86/hyperlaunch: enable unpausing mulitple domains
Date: Sat, 19 Apr 2025 18:08:18 -0400
Message-Id: <20250419220820.4234-37-dpsmith@apertussolutions.com>
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This commit enables the domain builder to unpause all domains
that have been flagged to start on boot.

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/domain-builder/core.c        | 20 ++++++++++++++++++++
 xen/arch/x86/include/asm/boot-domain.h    |  8 +++++---
 xen/arch/x86/include/asm/domain-builder.h |  1 +
 xen/arch/x86/setup.c                      |  8 +++++++-
 4 files changed, 33 insertions(+), 4 deletions(-)

diff --git a/xen/arch/x86/domain-builder/core.c b/xen/arch/x86/domain-builder/core.c
index 2712703e17e6..fa01b8390a23 100644
--- a/xen/arch/x86/domain-builder/core.c
+++ b/xen/arch/x86/domain-builder/core.c
@@ -6,6 +6,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -206,6 +207,25 @@ unsigned int __init builder_create_domains(struct boot_info *bi)
     return build_count;
 }
 
+int __init builder_unpause_domains(struct boot_info *bi)
+{
+    int i, count = 0;
+
+    for ( i = 0; i < bi->nr_domains; i++ )
+    {
+        struct boot_domain *bd = &bi->domains[i];
+
+        if ( bd->capabilities & BUILD_CAPS_HARDWARE ||
+             bd->mode & BUILD_MODE_START_ON_BOOT )
+        {
+            domain_unpause_by_systemcontroller(bd->d);
+            count++;
+        }
+    }
+
+    return count;
+}
+
 /*
  * Local variables:
  * mode: C
diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/include/asm/boot-domain.h
index a574f4941ed3..b592aef84b27 100644
--- a/xen/arch/x86/include/asm/boot-domain.h
+++ b/xen/arch/x86/include/asm/boot-domain.h
@@ -22,9 +22,11 @@ struct boot_domain {
 #define BUILD_CAPS_XENSTORE      (1 << 2)
     uint32_t capabilities;
 
-                                          /* On     | Off    */
-#define BUILD_MODE_PARAVIRT      (1 << 0) /* PV     | PVH/HVM */
-#define BUILD_MODE_ENABLE_DM     (1 << 1) /* HVM    | PVH     */
+                                          /* On       | Off     */
+#define BUILD_MODE_PARAVIRT      (1 << 0) /* PV       | PVH/HVM */
+#define BUILD_MODE_ENABLE_DM     (1 << 1) /* HVM      | PVH     */
+#define BUILD_MODE_LONG          (1 << 2) /* 64 BIT   | 32 BIT  */
+#define BUILD_MODE_START_ON_BOOT (1 << 3) /* UNPAUSED | PAUSED  */
     uint32_t mode;
 
     unsigned long mem_pages;
diff --git a/xen/arch/x86/include/asm/domain-builder.h b/xen/arch/x86/include/asm/domain-builder.h
index 5dc5661bec07..df55cf52460c 100644
--- a/xen/arch/x86/include/asm/domain-builder.h
+++ b/xen/arch/x86/include/asm/domain-builder.h
@@ -9,6 +9,7 @@ int __init builder_get_cmdline(
 
 void builder_init(struct boot_info *bi);
 unsigned int builder_create_domains(struct boot_info *bi);
+int builder_unpause_domains(struct boot_info *bi);
 
 struct domain *arch_create_dom(
     struct boot_info *bi, struct boot_domain *bd);
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 09b1fc94426d..ba0dd427c81b 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -787,6 +787,7 @@ static inline bool using_2M_mapping(void)
 
 static void noreturn init_done(void)
 {
+    struct boot_info *bi = &xen_boot_info;
     void *va;
     unsigned long start, end;
     int err;
@@ -800,7 +801,12 @@ static void noreturn init_done(void)
     if ( IS_ENABLED(CONFIG_SELF_TESTS) && cpu_has_xen_shstk )
         stub_selftest();
 
-    domain_unpause_by_systemcontroller(dom0);
+    err = builder_unpause_domains(bi);
+    if ( err == 0 )
+        panic("domain builder: failed to schedule any domain to start\n");
+    else
+        printk("domain builder: unpaused %d of %d domains at boot\n", err,
+               bi->nr_domains);
 
     /* MUST be done prior to removing .init data. */
     unregister_init_virtual_region();
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 18/38] x86/boot: rename pvh acpi setup function
Date: Sat, 19 Apr 2025 18:08:00 -0400
Message-Id: <20250419220820.4234-19-dpsmith@apertussolutions.com>
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The function pvh_setup_acpi() is dom0 specific, renaming it to
dom0_pvh_setup_acpi(). Now export the function so that it may be called by the
domain builder.

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/hvm/dom0_build.c         | 4 ++--
 xen/arch/x86/include/asm/dom0_build.h | 2 ++
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build.c
index a3b6afc5318a..8ea4c7bd2792 100644
--- a/xen/arch/x86/hvm/dom0_build.c
+++ b/xen/arch/x86/hvm/dom0_build.c
@@ -1125,7 +1125,7 @@ static int __init pvh_setup_acpi_xsdt(struct domain *d, paddr_t madt_addr,
     return rc;
 }
 
-static int __init pvh_setup_acpi(struct domain *d, paddr_t start_info)
+int __init dom0_pvh_setup_acpi(struct domain *d, paddr_t start_info)
 {
     unsigned long pfn, nr_pages;
     paddr_t madt_paddr, xsdt_paddr, rsdp_paddr;
@@ -1283,7 +1283,7 @@ int __init dom0_construct_pvh(struct boot_domain *bd)
         return rc;
     }
 
-    rc = pvh_setup_acpi(d, start_info);
+    rc = dom0_pvh_setup_acpi(bd->d, start_info);
     if ( rc )
     {
         printk("Failed to setup Dom0 ACPI tables: %d\n", rc);
diff --git a/xen/arch/x86/include/asm/dom0_build.h b/xen/arch/x86/include/asm/dom0_build.h
index e5debd5adf9f..36f563bd9d5b 100644
--- a/xen/arch/x86/include/asm/dom0_build.h
+++ b/xen/arch/x86/include/asm/dom0_build.h
@@ -20,6 +20,8 @@ void dom0_pv_restrict_pages(
 
 void dom0_pvh_setup_e820(struct domain *d, unsigned long nr_pages);
 
+int dom0_pvh_setup_acpi(struct domain *d, paddr_t start_info);
+
 int dom0_construct_pv(struct boot_domain *bd);
 int dom0_construct_pvh(struct boot_domain *bd);
 
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Anthony PERARD ,
	Michal Orzel ,
	Julien Grall ,
	Stefano Stabellini ,
	Dario Faggioli ,
	Juergen Gross ,
	George Dunlap 
Subject: [RFC 16/38] x86/boot: move and rename sched_setup_dom0_vcpus
Date: Sat, 19 Apr 2025 18:07:58 -0400
Message-Id: <20250419220820.4234-17-dpsmith@apertussolutions.com>
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Relocated the function sched_setup_dom0_vcpus(), which was protected by an
ifdef CONFIG_X86, from common/sched to the hyperlaunch domain builder. Rename
it to alloc_dom_vcpus() to better reflect the purpose of the function.

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/domain-builder/domain.c      | 10 ++++++++++
 xen/arch/x86/hvm/dom0_build.c             |  2 +-
 xen/arch/x86/include/asm/domain-builder.h |  1 +
 xen/arch/x86/pv/dom0_build.c              |  2 +-
 xen/common/sched/core.c                   | 12 ------------
 xen/include/xen/sched.h                   |  1 -
 6 files changed, 13 insertions(+), 15 deletions(-)

diff --git a/xen/arch/x86/domain-builder/domain.c b/xen/arch/x86/domain-builder/domain.c
index bdb4d9745ff2..764a1af4acd3 100644
--- a/xen/arch/x86/domain-builder/domain.c
+++ b/xen/arch/x86/domain-builder/domain.c
@@ -128,6 +128,16 @@ struct vcpu *__init alloc_dom_vcpu0(struct boot_domain *bd)
     return vcpu_create(bd->d, 0);
 }
 
+void __init alloc_dom_vcpus(struct domain *d)
+{
+    unsigned int i;
+
+    for ( i = 1; i < d->max_vcpus; i++ )
+        vcpu_create(d, i);
+
+    domain_update_node_affinity(d);
+}
+
 /*
  * Local variables:
  * mode: C
diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build.c
index a68474b7856a..2ed2d5fd7326 100644
--- a/xen/arch/x86/hvm/dom0_build.c
+++ b/xen/arch/x86/hvm/dom0_build.c
@@ -834,7 +834,7 @@ static int __init pvh_setup_cpus(struct domain *d, paddr_t entry,
         .cpu_regs.x86_32.tr_ar = 0x8b,
     };
 
-    sched_setup_dom0_vcpus(d);
+    alloc_dom_vcpus(d);
 
     rc = arch_set_info_hvm_guest(v, &cpu_ctx);
     if ( rc )
diff --git a/xen/arch/x86/include/asm/domain-builder.h b/xen/arch/x86/include/asm/domain-builder.h
index f9b11e06ceb8..af0a24b4edf5 100644
--- a/xen/arch/x86/include/asm/domain-builder.h
+++ b/xen/arch/x86/include/asm/domain-builder.h
@@ -18,6 +18,7 @@ unsigned long dom_compute_nr_pages(
 
 unsigned int dom_max_vcpus(struct boot_domain *bd);
 struct vcpu *alloc_dom_vcpu0(struct boot_domain *bd);
+void alloc_dom_vcpus(struct domain *d);
 
 int dom_construct_pvh(struct boot_domain *bd);
 
diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c
index ad4d1cc3520c..c3d269438313 100644
--- a/xen/arch/x86/pv/dom0_build.c
+++ b/xen/arch/x86/pv/dom0_build.c
@@ -827,7 +827,7 @@ static int __init dom0_construct(struct boot_domain *bd)
 
     printk("Dom%u has maximum %u VCPUs\n", d->domain_id, d->max_vcpus);
 
-    sched_setup_dom0_vcpus(d);
+    alloc_dom_vcpus(d);
 
     d->arch.paging.mode = 0;
 
diff --git a/xen/common/sched/core.c b/xen/common/sched/core.c
index 9043414290a8..d679d766a4b6 100644
--- a/xen/common/sched/core.c
+++ b/xen/common/sched/core.c
@@ -3479,18 +3479,6 @@ void wait(void)
     schedule();
 }
 
-#ifdef CONFIG_X86
-void __init sched_setup_dom0_vcpus(struct domain *d)
-{
-    unsigned int i;
-
-    for ( i = 1; i < d->max_vcpus; i++ )
-        vcpu_create(d, i);
-
-    domain_update_node_affinity(d);
-}
-#endif
-
 #ifdef CONFIG_COMPAT
 #include "compat.c"
 #endif
diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h
index 559d201e0c7e..4f184cd76206 100644
--- a/xen/include/xen/sched.h
+++ b/xen/include/xen/sched.h
@@ -1084,7 +1084,6 @@ static inline bool sched_has_urgent_vcpu(void)
 }
 
 void vcpu_set_periodic_timer(struct vcpu *v, s_time_t value);
-void sched_setup_dom0_vcpus(struct domain *d);
 int vcpu_temporary_affinity(struct vcpu *v, unsigned int cpu, uint8_t reason);
 int vcpu_set_hard_affinity(struct vcpu *v, const cpumask_t *affinity);
 int vcpu_affinity_domctl(struct domain *d, uint32_t cmd,
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 37/38] x86/hyperlaunch: generalize domid assignment
Date: Sat, 19 Apr 2025 18:08:19 -0400
Message-Id: <20250419220820.4234-38-dpsmith@apertussolutions.com>
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Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/domain-builder/fdt.c | 29 +++++++++++++++++++++++++++--
 1 file changed, 27 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/domain-builder/fdt.c b/xen/arch/x86/domain-builder/fdt.c
index 9c6c0ae09a24..543a0c92adb4 100644
--- a/xen/arch/x86/domain-builder/fdt.c
+++ b/xen/arch/x86/domain-builder/fdt.c
@@ -15,6 +15,21 @@
 
 #include "fdt.h"
 
+#define MAX_DOMID  DOMID_FIRST_RESERVED
+static __initdata DECLARE_BITMAP(domid_alloc, MAX_DOMID);
+
+static domid_t find_next_domid(void)
+{
+    unsigned long n = find_next_zero_bit(domid_alloc, MAX_DOMID, 1);
+
+    if ( n == MAX_DOMID )
+        return DOMID_INVALID;
+
+    set_bit(n, domid_alloc);
+
+    return (domid_t) n;
+}
+
 /*
  * Unpacks a "reg" property into its address and size constituents.
  *
@@ -186,11 +201,21 @@ static int __init process_domain_node(
                 printk("  failed processing domain id for domain %s\n", name);
                 return -EINVAL;
             }
+
             if ( val >= DOMID_FIRST_RESERVED )
             {
-                printk("  invalid domain id for domain %s\n", name);
-                return -EINVAL;
+                if ( (val = find_next_domid()) == DOMID_INVALID )
+                {
+                    printk("  unable to allocate domid for domain %s\n", name);
+                    return -EFAULT;
+                }
             }
+            else if ( test_and_set_bit(val, domid_alloc) )
+            {
+                printk(XENLOG_ERR "ERR: domid (%d) already assigned\n", val);
+                return -EFAULT;
+            }
+
             bd->domid = (domid_t)val;
             printk("  domid: %d\n", bd->domid);
         }
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 35/38] x86/hyperlaunch: add multidomain construction logic
Date: Sat, 19 Apr 2025 18:08:17 -0400
Message-Id: <20250419220820.4234-36-dpsmith@apertussolutions.com>
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Introduce the logic to loop over boot_info->domains and construct
each valid entry in the array.

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/domain-builder/core.c   | 32 ++++++++++++++++++++++++----
 xen/arch/x86/domain-builder/domain.c |  7 ++++--
 xen/arch/x86/hvm/dom_build.c         |  5 ++++-
 xen/arch/x86/setup.c                 | 11 ++++++----
 4 files changed, 44 insertions(+), 11 deletions(-)

diff --git a/xen/arch/x86/domain-builder/core.c b/xen/arch/x86/domain-builder/core.c
index f693aa46d278..2712703e17e6 100644
--- a/xen/arch/x86/domain-builder/core.c
+++ b/xen/arch/x86/domain-builder/core.c
@@ -166,16 +166,40 @@ static int  __init build_core_domains(struct boot_info *bi)
 unsigned int __init builder_create_domains(struct boot_info *bi)
 {
     unsigned int build_count = 0;
-    struct boot_domain *bd = &bi->domains[0];
+    int i;
 
     if ( bi->nr_domains == 0 )
         panic("%s: no domains defined\n", __func__);
 
-    if ( bd->kernel == NULL && bd->capabilities & BUILD_CAPS_CONTROL )
-        panic("%s: control domain missing kernel\n", __func__);
-
     build_count = build_core_domains(bi);
 
+    if ( ! IS_ENABLED(CONFIG_MULTIDOMAIN_BUILDER) )
+        goto out;
+
+    for ( i = 0; i < bi->nr_domains; i++ )
+    {
+        struct boot_domain *bd = &bi->domains[i];
+
+        if ( bd->constructed )
+            continue;
+
+        if ( bd->mode & BUILD_MODE_PARAVIRT )
+        {
+            printk(XENLOG_WARNING "don't support PV DomU, skipping %d\n", i);
+            continue;
+        }
+
+        arch_create_dom(bi, bd);
+        if ( bd->d )
+        {
+            bd->constructed = true;
+            build_count++;
+        }
+        else
+            printk(XENLOG_WARNING "failed to construct build domain %d\n", i);
+    }
+
+ out:
     /* Free temporary buffers. */
     free_boot_modules();
 
diff --git a/xen/arch/x86/domain-builder/domain.c b/xen/arch/x86/domain-builder/domain.c
index 919df1ffb1c3..7f5bee0dc759 100644
--- a/xen/arch/x86/domain-builder/domain.c
+++ b/xen/arch/x86/domain-builder/domain.c
@@ -321,8 +321,11 @@ struct domain *__init arch_create_dom(
                            ((hvm_hap_supported() && !opt_dom0_shadow) ?
                             XEN_DOMCTL_CDF_hap : 0));
 
-        dom_cfg.arch.emulation_flags |=
-            XEN_X86_EMU_LAPIC | XEN_X86_EMU_IOAPIC | XEN_X86_EMU_VPCI;
+        if ( bd->capabilities & BUILD_CAPS_HARDWARE )
+            dom_cfg.arch.emulation_flags |=
+                XEN_X86_EMU_LAPIC | XEN_X86_EMU_IOAPIC | XEN_X86_EMU_VPCI;
+        else
+            dom_cfg.arch.emulation_flags |= X86_EMU_LAPIC;
     }
 
     if ( bd->capabilities & BUILD_CAPS_HARDWARE )
diff --git a/xen/arch/x86/hvm/dom_build.c b/xen/arch/x86/hvm/dom_build.c
index 4f614aea34c3..db7bf9a6934a 100644
--- a/xen/arch/x86/hvm/dom_build.c
+++ b/xen/arch/x86/hvm/dom_build.c
@@ -885,7 +885,10 @@ static int __init pvh_load_kernel(
     }
 
     start_info.magic = XEN_HVM_START_MAGIC_VALUE;
-    start_info.flags = SIF_PRIVILEGED | SIF_INITDOMAIN;
+    if ( is_control_domain(d) )
+        start_info.flags = SIF_PRIVILEGED;
+    if ( is_hardware_domain(d) )
+        start_info.flags = SIF_INITDOMAIN;
     rc = hvm_copy_to_guest_phys(last_addr, &start_info, sizeof(start_info), v);
     if ( rc )
     {
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index da5a8e8d8ed3..09b1fc94426d 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -1319,10 +1319,13 @@ void asmlinkage __init noreturn __start_xen(void)
         xen->size  = __2M_rwdata_end - _stext;
     }
 
-    bi->domains[0].kernel->headroom =
-        bzimage_headroom(bootstrap_map_bm(bi->domains[0].kernel),
-                         bi->domains[0].kernel->size);
-    bootstrap_unmap();
+    for ( i = 0; i < bi->nr_domains; i++ )
+    {
+        bi->domains[i].kernel->headroom =
+            bzimage_headroom(bootstrap_map_bm(bi->domains[i].kernel),
+                             bi->domains[i].kernel->size);
+        bootstrap_unmap();
+    }
 
 #ifndef highmem_start
     /* Don't allow split below 4Gb. */
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 33/38] x86/boot: refactor bzimage parser to be re-enterant
Date: Sat, 19 Apr 2025 18:08:15 -0400
Message-Id: <20250419220820.4234-34-dpsmith@apertussolutions.com>
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The bzimage logic uses the unit global orig_image_len to hold the original
module length for the kernel when the headroom is calculated. It then uses
orig_image_len to locate the start of the bzimage when the expansion is done.
This is an issue when more than one bzimage is processed by the headroom
calculation logic, as it will leave orig_image_len set to the length of the
last bzimage it processed.

The boot module work introduced storing the headroom size on a per module
basis. By passing in the headroom from the boot module, orig_image_len is no
longer needed to locate the beginning of the bzimage after the allocated
headroom. The bzimage functions are reworked as such, allowing the removal of
orig_image_len and enabling them to be reused by multiple kernel boot modules.

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/bzimage.c             | 38 ++++++++++++++++++------------
 xen/arch/x86/hvm/dom_build.c       |  3 ++-
 xen/arch/x86/include/asm/bzimage.h |  5 ++--
 xen/arch/x86/pv/dom0_build.c       |  3 ++-
 4 files changed, 30 insertions(+), 19 deletions(-)

diff --git a/xen/arch/x86/bzimage.c b/xen/arch/x86/bzimage.c
index 66f648f311e4..32f0360d25b4 100644
--- a/xen/arch/x86/bzimage.c
+++ b/xen/arch/x86/bzimage.c
@@ -68,8 +68,6 @@ static __init int bzimage_check(struct setup_header *hdr, unsigned long len)
     return 1;
 }
 
-static unsigned long __initdata orig_image_len;
-
 unsigned long __init bzimage_headroom(void *image_start,
                                       unsigned long image_length)
 {
@@ -90,7 +88,6 @@ unsigned long __init bzimage_headroom(void *image_start,
     if ( elf_is_elfbinary(image_start, image_length) )
         return 0;
 
-    orig_image_len = image_length;
     headroom = output_length(image_start, image_length);
     if (gzip_check(image_start, image_length))
     {
@@ -103,13 +100,20 @@ unsigned long __init bzimage_headroom(void *image_start,
     return headroom;
 }
 
-int __init bzimage_parse(void *image_base, void **image_start,
-                         unsigned long *image_len)
+int __init bzimage_parse(
+    void *image_base, void **image_start, unsigned long headroom,
+    unsigned long *image_len)
 {
     struct setup_header *hdr = (struct setup_header *)(*image_start);
     int err = bzimage_check(hdr, *image_len);
-    unsigned long output_len;
-
+    unsigned long module_len = *image_len;
+
+    /*
+     * Variable err will have one of three values:
+     *   -  < 0: a error occurred trying to inspect the contents
+     *   -  > 0: the image is a bzImage
+     *   - == 0: not a bzImage, could be raw elf or elf.gz (vmlinuz.gz)
+     */
     if ( err < 0 )
         return err;
 
@@ -118,21 +122,25 @@ int __init bzimage_parse(void *image_base, void **image_start,
         *image_start += (hdr->setup_sects + 1) * 512 + hdr->payload_offset;
         *image_len = hdr->payload_length;
     }
-
-    if ( elf_is_elfbinary(*image_start, *image_len) )
-        return 0;
+    else
+    {
+        if ( elf_is_elfbinary(*image_start, *image_len) )
+            return 0;
+        else
+            *image_len = *image_len - headroom;
+    }
 
     BUG_ON(!(image_base < *image_start));
 
-    output_len = output_length(*image_start, orig_image_len);
-
-    if ( (err = perform_gunzip(image_base, *image_start, orig_image_len)) > 0 )
-        err = decompress(*image_start, orig_image_len, image_base);
+    if ( (err = perform_gunzip(image_base, *image_start, *image_len)) > 0 )
+        err = decompress(*image_start, *image_len, image_base);
 
     if ( !err )
     {
+        printk(XENLOG_ERR "%s(%d): decompression failed, reseting image start and len\n",
+               __func__, err);
         *image_start = image_base;
-        *image_len = output_len;
+        *image_len = module_len;
     }
 
     return err > 0 ? 0 : err;
diff --git a/xen/arch/x86/hvm/dom_build.c b/xen/arch/x86/hvm/dom_build.c
index a847c2cb16d9..4f614aea34c3 100644
--- a/xen/arch/x86/hvm/dom_build.c
+++ b/xen/arch/x86/hvm/dom_build.c
@@ -743,7 +743,8 @@ static int __init pvh_load_kernel(
     struct vcpu *v = d->vcpu[0];
     int rc;
 
-    if ( (rc = bzimage_parse(image_base, &image_start, &image_len)) != 0 )
+    if ( (rc = bzimage_parse(image_base, &image_start, image->headroom,
+                             &image_len)) != 0 )
     {
         printk("Error trying to detect bz compressed kernel\n");
         return rc;
diff --git a/xen/arch/x86/include/asm/bzimage.h b/xen/arch/x86/include/asm/bzimage.h
index 7ed69d39103d..24c7d4b8eb68 100644
--- a/xen/arch/x86/include/asm/bzimage.h
+++ b/xen/arch/x86/include/asm/bzimage.h
@@ -5,7 +5,8 @@
 
 unsigned long bzimage_headroom(void *image_start, unsigned long image_length);
 
-int bzimage_parse(void *image_base, void **image_start,
-                  unsigned long *image_len);
+int bzimage_parse(
+    void *image_base, void **image_start, unsigned long headroom,
+    unsigned long *image_len);
 
 #endif /* __X86_BZIMAGE_H__ */
diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c
index 8d941ff4486e..8b02f62892d4 100644
--- a/xen/arch/x86/pv/dom0_build.c
+++ b/xen/arch/x86/pv/dom0_build.c
@@ -427,7 +427,8 @@ static int __init dom0_construct(struct boot_domain *bd)
 
     d->max_pages = ~0U;
 
-    if ( (rc = bzimage_parse(image_base, &image_start, &image_len)) != 0 )
+    if ( (rc = bzimage_parse(image_base, &image_start, bd->kernel->headroom,
+                             &image_len)) != 0 )
         return rc;
 
     if ( (rc = elf_init(&elf, image_start, image_len)) != 0 )
-- 
2.30.2



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From: "Daniel P. Smith" 
To: xen-devel@lists.xenproject.org
Cc: "Daniel P. Smith" ,
	jason.andryuk@amd.com,
	stefano.stabellini@amd.com,
	agarciav@amd.com,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [RFC 15/38] x86/hyperlaunch: move iommu init to domain builder
Date: Sat, 19 Apr 2025 18:07:57 -0400
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Move invocation of iommu_hwdom_init() to dom_construct_pvh() and guard it
with a hardware domain check.

Signed-off-by: Daniel P. Smith 
---
 xen/arch/x86/hvm/dom0_build.c | 2 --
 xen/arch/x86/hvm/dom_build.c  | 4 ++++
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build.c
index 4a371dfd66d7..a68474b7856a 100644
--- a/xen/arch/x86/hvm/dom0_build.c
+++ b/xen/arch/x86/hvm/dom0_build.c
@@ -1305,8 +1305,6 @@ int __init dom0_construct_pvh(struct boot_domain *bd)
     struct domain *d = bd->d;
     int rc;
 
-    iommu_hwdom_init(d);
-
     rc = pvh_populate_p2m(d);
     if ( rc )
     {
diff --git a/xen/arch/x86/hvm/dom_build.c b/xen/arch/x86/hvm/dom_build.c
index 05064ae9ba96..7fa007a6926d 100644
--- a/xen/arch/x86/hvm/dom_build.c
+++ b/xen/arch/x86/hvm/dom_build.c
@@ -9,6 +9,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -92,6 +93,9 @@ int __init dom_construct_pvh(struct boot_domain *bd)
      */
     pvh_init_p2m(bd);
 
+    if ( is_hardware_domain(bd->d) )
+        iommu_hwdom_init(bd->d);
+
     return dom0_construct_pvh(bd);
 }
 
-- 
2.30.2



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In-Reply-To: <43ce15d8-bf94-4b3c-9c2e-d1121476056f@xen.org>
From: Jason Andryuk 
Date: Sun, 20 Apr 2025 10:14:16 -0400
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Message-ID: 
Subject: Re: [PATCH] xenstored: Remove setjmp.h
To: Julien Grall 
Cc: Jason Andryuk , xen-devel@lists.xenproject.org, 
	Juergen Gross , Anthony PERARD 
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On Fri, Apr 18, 2025 at 6:51=E2=80=AFPM Julien Grall  wrote=
:
>
> Hi Jason,
>
> On 19/04/2025 05:59, Jason Andryuk wrote:
> > Use of setjmp/longjmp as removed in 2006, but the include remained.

Whoops, this should be "was removed".

> > Remove it now.
> >
> > Fixes: 1bac3b49cd ("Import the current version of talloc...")
>
> The subject truncation is ok however for the commit ID, we are expecting
> 12 characters (see docs/process/sending-patches.pandoc).

Sorry about that.  I used `--pretty=3Dfixes`, but I guess I have it
misconfigured on that machine.

The 12 character ID is:
1bac3b49cdd4

>
> > Signed-off-by: Jason Andryuk 
>
> With the remark above addressed (can be fixed on commit):
>
> Reviewed-by: Julien Grall 

Thanks,
Jason


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From: Jiqian Chen 
To: 
CC: Huang Rui , Jiqian Chen ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v3 03/11] vpci/header: Emulate legacy capability list for dom0
Date: Mon, 21 Apr 2025 14:18:55 +0800
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Current logic of emulating legacy capability list is only for domU.
So, expand it to emulate for dom0 too. Then it will be easy to hide
a capability whose initialization fails in a function.

Signed-off-by: Jiqian Chen 
---
cc: "Roger Pau Monné" 
---
v2->v3 changes:
* Not to add handler of PCI_CAP_LIST_ID when domain is dom0.

v1->v2 changes:
new patch.

Best regards,
Jiqian Chen.
---
 xen/drivers/vpci/header.c | 25 ++++++++++++++-----------
 1 file changed, 14 insertions(+), 11 deletions(-)

diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c
index 3e9b44454b43..c98cd211d9d7 100644
--- a/xen/drivers/vpci/header.c
+++ b/xen/drivers/vpci/header.c
@@ -749,9 +749,9 @@ static int vpci_init_capability_list(struct pci_dev *pdev)
 {
     int rc;
     bool mask_cap_list = false;
+    bool is_hwdom = is_hardware_domain(pdev->domain);
 
-    if ( !is_hardware_domain(pdev->domain) &&
-         pci_conf_read16(pdev->sbdf, PCI_STATUS) & PCI_STATUS_CAP_LIST )
+    if ( pci_conf_read16(pdev->sbdf, PCI_STATUS) & PCI_STATUS_CAP_LIST )
     {
         /* Only expose capabilities to the guest that vPCI can handle. */
         unsigned int next, ttl = 48;
@@ -759,10 +759,11 @@ static int vpci_init_capability_list(struct pci_dev *pdev)
             PCI_CAP_ID_MSI,
             PCI_CAP_ID_MSIX,
         };
+        const unsigned int *caps = is_hwdom ? NULL : supported_caps;
+        const unsigned int n = is_hwdom ? 0 : ARRAY_SIZE(supported_caps);
 
         next = pci_find_next_cap_ttl(pdev->sbdf, PCI_CAPABILITY_LIST,
-                                     supported_caps,
-                                     ARRAY_SIZE(supported_caps), &ttl);
+                                     caps, n, &ttl);
 
         rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL,
                                PCI_CAPABILITY_LIST, 1,
@@ -772,7 +773,7 @@ static int vpci_init_capability_list(struct pci_dev *pdev)
 
         next &= ~3;
 
-        if ( !next )
+        if ( !next && !is_hwdom )
             /*
              * If we don't have any supported capabilities to expose to the
              * guest, mask the PCI_STATUS_CAP_LIST bit in the status
@@ -786,13 +787,15 @@ static int vpci_init_capability_list(struct pci_dev *pdev)
 
             next = pci_find_next_cap_ttl(pdev->sbdf,
                                          pos + PCI_CAP_LIST_NEXT,
-                                         supported_caps,
-                                         ARRAY_SIZE(supported_caps), &ttl);
+                                         caps, n, &ttl);
 
-            rc = vpci_add_register(pdev->vpci, vpci_hw_read8, NULL,
-                                   pos + PCI_CAP_LIST_ID, 1, NULL);
-            if ( rc )
-                return rc;
+            if ( !is_hwdom )
+            {
+                rc = vpci_add_register(pdev->vpci, vpci_hw_read8, NULL,
+                                       pos + PCI_CAP_LIST_ID, 1, NULL);
+                if ( rc )
+                    return rc;
+            }
 
             rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL,
                                    pos + PCI_CAP_LIST_NEXT, 1,
-- 
2.34.1



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From: Jiqian Chen 
To: 
CC: Huang Rui , Jiqian Chen , "Andrew
 Cooper" , Anthony PERARD
	, Michal Orzel , Jan Beulich
	, Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , "Stefano
 Stabellini" 
Subject: [PATCH v3 00/11] Support hiding capability when its initialization fails
Date: Mon, 21 Apr 2025 14:18:52 +0800
Message-ID: <20250421061903.1542652-1-Jiqian.Chen@amd.com>
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Hi,

This series is to
emulate legacy and extended capability list for dom0, including patch #1, #2, #3, #4.
hide legacy and extended capability when its initialization fails, including patch #5, #6, #7.
remove all related registers and other resources when initializing capability fails, including patch #8, #9, #10, #11.

Best regards,
Jiqian Chen.
---
cc: Andrew Cooper 
cc: Anthony PERARD 
cc: Michal Orzel 
cc: Jan Beulich 
cc: Julien Grall 
cc: "Roger Pau Monné" 
cc: Stefano Stabellini 
---
Jiqian Chen (11):
  vpci/header: Move emulating cap list logic into new function
  driver/pci: Get next capability without passing caps
  vpci/header: Emulate legacy capability list for dom0
  vpci/header: Emulate extended capability list for dom0
  vpci: Refactor REGISTER_VPCI_INIT
  vpci: Hide legacy capability when it fails to initialize
  vpci: Hide extended capability when it fails to initialize
  vpci: Refactor vpci_remove_register to remove matched registers
  vpci/rebar: Remove registers when init_rebar() fails
  vpci/msi: Free MSI resources when init_msi() fails
  vpci/msix: Add function to clean MSIX resources

 tools/tests/vpci/main.c    |   4 +-
 xen/drivers/pci/pci.c      |   3 +
 xen/drivers/vpci/header.c  | 174 +++++++++++++---------
 xen/drivers/vpci/msi.c     |  28 +++-
 xen/drivers/vpci/msix.c    |  27 +++-
 xen/drivers/vpci/rebar.c   |  35 +++--
 xen/drivers/vpci/vpci.c    | 290 ++++++++++++++++++++++++++++++++-----
 xen/include/xen/pci_regs.h |   1 +
 xen/include/xen/vpci.h     |  34 +++--
 xen/include/xen/xen.lds.h  |   2 +-
 10 files changed, 459 insertions(+), 139 deletions(-)

-- 
2.34.1



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From: Jiqian Chen 
To: 
CC: Huang Rui , Jiqian Chen ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v3 06/11] vpci: Hide legacy capability when it fails to initialize
Date: Mon, 21 Apr 2025 14:18:58 +0800
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When vpci fails to initialize a legacy capability of device, it just
return error instead of catching and processing exception. That makes
the entire device unusable.

So, add new a function to hide legacy capability when initialization
fails. And remove the failed legacy capability from the vpci emulated
legacy capability list.

Signed-off-by: Jiqian Chen 
---
cc: "Roger Pau Monné" 
---
v2->v3 changes:
* Separated from the last version patch "vpci: Hide capability when it fails to initialize"
* Whole implementation changed because last version is wrong.
  This version adds a new helper function vpci_get_register() and uses it to get
  target handler and previous handler from vpci->handlers, then remove the target.

v1->v2 changes:
* Removed the "priorities" of initializing capabilities since it isn't used anymore.
* Added new function vpci_capability_mask() and vpci_ext_capability_mask() to
  remove failed capability from list.
* Called vpci_make_msix_hole() in the end of init_msix().

Best regards,
Jiqian Chen.
---
 xen/drivers/vpci/vpci.c | 133 +++++++++++++++++++++++++++++++++-------
 1 file changed, 112 insertions(+), 21 deletions(-)

diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c
index 5474b66668c1..f97c7cc460a0 100644
--- a/xen/drivers/vpci/vpci.c
+++ b/xen/drivers/vpci/vpci.c
@@ -35,6 +35,22 @@ struct vpci_register {
     uint32_t rsvdz_mask;
 };
 
+static int vpci_register_cmp(const struct vpci_register *r1,
+                             const struct vpci_register *r2)
+{
+    /* Return 0 if registers overlap. */
+    if ( r1->offset < r2->offset + r2->size &&
+         r2->offset < r1->offset + r1->size )
+        return 0;
+    if ( r1->offset < r2->offset )
+        return -1;
+    if ( r1->offset > r2->offset )
+        return 1;
+
+    ASSERT_UNREACHABLE();
+    return 0;
+}
+
 #ifdef __XEN__
 extern vpci_capability_t *const __start_vpci_array[];
 extern vpci_capability_t *const __end_vpci_array[];
@@ -83,7 +99,91 @@ static int assign_virtual_sbdf(struct pci_dev *pdev)
 
 #endif /* CONFIG_HAS_VPCI_GUEST_SUPPORT */
 
-static int vpci_init_capabilities(struct pci_dev *pdev)
+static struct vpci_register *vpci_get_register(struct vpci *vpci,
+                                               const unsigned int offset,
+                                               const unsigned int size)
+{
+    const struct vpci_register r = { .offset = offset, .size = size };
+    struct vpci_register *rm;
+
+    ASSERT(spin_is_locked(&vpci->lock));
+    list_for_each_entry ( rm, &vpci->handlers, node )
+    {
+        int cmp = vpci_register_cmp(&r, rm);
+
+        if ( !cmp && rm->offset == offset && rm->size == size )
+            return rm;
+        if ( cmp <= 0 )
+            break;
+    }
+
+    return NULL;
+}
+
+static struct vpci_register *vpci_get_previous_cap_register
+                (struct vpci *vpci, const unsigned int offset)
+{
+    uint32_t next;
+    struct vpci_register *r;
+
+    if ( offset < 0x40 )
+        return NULL;
+
+    r = vpci_get_register(vpci, PCI_CAPABILITY_LIST, 1);
+    ASSERT(r);
+
+    next = (uint32_t)(uintptr_t)r->private;
+    while ( next >= 0x40 && next != offset )
+    {
+        r = vpci_get_register(vpci, next + PCI_CAP_LIST_NEXT, 1);
+        ASSERT(r);
+        next = (uint32_t)(uintptr_t)r->private;
+    }
+
+    if ( next < 0x40 )
+        return NULL;
+
+    return r;
+}
+
+static void vpci_capability_mask(struct pci_dev *pdev,
+                                 const unsigned int cap)
+{
+    const unsigned int offset = pci_find_cap_offset(pdev->sbdf, cap);
+    struct vpci_register *prev_next_r, *next_r;
+    struct vpci *vpci = pdev->vpci;
+
+    spin_lock(&vpci->lock);
+    next_r = vpci_get_register(vpci, offset + PCI_CAP_LIST_NEXT, 1);
+    if ( !next_r )
+    {
+        spin_unlock(&vpci->lock);
+        return;
+    }
+
+    prev_next_r = vpci_get_previous_cap_register(vpci, offset);
+    ASSERT(prev_next_r);
+
+    prev_next_r->private = next_r->private;
+
+    if ( !is_hardware_domain(pdev->domain) )
+    {
+        struct vpci_register *id_r =
+            vpci_get_register(vpci, offset + PCI_CAP_LIST_ID, 1);
+
+        ASSERT(id_r);
+        /* PCI_CAP_LIST_ID register of target capability */
+        list_del(&id_r->node);
+        xfree(id_r);
+    }
+
+    /* PCI_CAP_LIST_NEXT register of target capability */
+    list_del(&next_r->node);
+    spin_unlock(&vpci->lock);
+    xfree(next_r);
+}
+
+static void vpci_init_capabilities(struct pci_dev *pdev)
 {
     for ( unsigned int i = 0; i < NUM_VPCI_INIT; i++ )
     {
@@ -107,10 +207,17 @@ static int vpci_init_capabilities(struct pci_dev *pdev)
         rc = capability->init(pdev);
 
         if ( rc )
-            return rc;
+        {
+            if ( capability->fini )
+                capability->fini(pdev);
+
+            printk(XENLOG_WARNING "%pd %pp: %s cap %u init fail rc=%d, mask it\n",
+                   pdev->domain, &pdev->sbdf,
+                   is_ext ? "extended" : "legacy", cap, rc);
+            if ( !is_ext )
+                vpci_capability_mask(pdev, cap);
+        }
     }
-
-    return 0;
 }
 
 void vpci_deassign_device(struct pci_dev *pdev)
@@ -192,7 +299,7 @@ int vpci_assign_device(struct pci_dev *pdev)
     if ( rc )
         goto out;
 
-    rc = vpci_init_capabilities(pdev);
+    vpci_init_capabilities(pdev);
 
  out:
     if ( rc )
@@ -202,22 +309,6 @@ int vpci_assign_device(struct pci_dev *pdev)
 }
 #endif /* __XEN__ */
 
-static int vpci_register_cmp(const struct vpci_register *r1,
-                             const struct vpci_register *r2)
-{
-    /* Return 0 if registers overlap. */
-    if ( r1->offset < r2->offset + r2->size &&
-         r2->offset < r1->offset + r1->size )
-        return 0;
-    if ( r1->offset < r2->offset )
-        return -1;
-    if ( r1->offset > r2->offset )
-        return 1;
-
-    ASSERT_UNREACHABLE();
-    return 0;
-}
-
 /* Dummy hooks, writes are ignored, reads return 1's */
 static uint32_t cf_check vpci_ignored_read(
     const struct pci_dev *pdev, unsigned int reg, void *data)
-- 
2.34.1



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From: Jiqian Chen 
To: 
CC: Huang Rui , Jiqian Chen ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v3 07/11] vpci: Hide extended capability when it fails to initialize
Date: Mon, 21 Apr 2025 14:18:59 +0800
Message-ID: <20250421061903.1542652-8-Jiqian.Chen@amd.com>
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When vpci fails to initialize a extended capability of device for dom0,
it just return error instead of catching and processing exception. That
makes the entire device unusable.

So, add new a function to hide extended capability when initialization
fails. And remove the failed extended capability handler from vpci
extended capability list.

Signed-off-by: Jiqian Chen 
---
cc: "Roger Pau Monné" 
---
v2->v3 changes:
* Separated from the last version patch "vpci: Hide capability when it fails to initialize".
* Whole implementation changed because last version is wrong.
  This version gets target handler and previous handler from vpci->handlers, then remove the target.
* Note: a case in function vpci_ext_capability_mask() needs to be discussed,
  because it may change the offset of next capability when the offset of target
  capability is 0x100U(the first extended capability), my implementation is just to
  ignore and let hardware to handle the target capability.

v1->v2 changes:
* Removed the "priorities" of initializing capabilities since it isn't used anymore.
* Added new function vpci_capability_mask() and vpci_ext_capability_mask() to
  remove failed capability from list.
* Called vpci_make_msix_hole() in the end of init_msix().

Best regards,
Jiqian Chen.
---
 xen/drivers/vpci/vpci.c    | 79 ++++++++++++++++++++++++++++++++++++++
 xen/include/xen/pci_regs.h |  1 +
 2 files changed, 80 insertions(+)

diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c
index f97c7cc460a0..8ff5169bdd18 100644
--- a/xen/drivers/vpci/vpci.c
+++ b/xen/drivers/vpci/vpci.c
@@ -183,6 +183,83 @@ static void vpci_capability_mask(struct pci_dev *pdev,
     xfree(next_r);
 }
 
+static struct vpci_register *vpci_get_previous_ext_cap_register
+                (struct vpci *vpci, const unsigned int offset)
+{
+    uint32_t header;
+    unsigned int pos = PCI_CFG_SPACE_SIZE;
+    struct vpci_register *r;
+
+    if ( offset <= PCI_CFG_SPACE_SIZE )
+        return NULL;
+
+    r = vpci_get_register(vpci, pos, 4);
+    ASSERT(r);
+
+    header = (uint32_t)(uintptr_t)r->private;
+    pos = PCI_EXT_CAP_NEXT(header);
+    while ( pos > PCI_CFG_SPACE_SIZE && pos != offset )
+    {
+        r = vpci_get_register(vpci, pos, 4);
+        ASSERT(r);
+        header = (uint32_t)(uintptr_t)r->private;
+        pos = PCI_EXT_CAP_NEXT(header);
+    }
+
+    if ( pos <= PCI_CFG_SPACE_SIZE )
+        return NULL;
+
+    return r;
+}
+
+static void vpci_ext_capability_mask(struct pci_dev *pdev,
+                                     const unsigned int cap)
+{
+    const unsigned int offset = pci_find_ext_capability(pdev->sbdf, cap);
+    struct vpci_register *rm, *prev_r;
+    struct vpci *vpci = pdev->vpci;
+    uint32_t header, pre_header;
+
+    spin_lock(&vpci->lock);
+    rm = vpci_get_register(vpci, offset, 4);
+    if ( !rm )
+    {
+        spin_unlock(&vpci->lock);
+        return;
+    }
+
+    header = (uint32_t)(uintptr_t)rm->private;
+    if ( offset == PCI_CFG_SPACE_SIZE )
+    {
+        if ( PCI_EXT_CAP_NEXT(header) <= PCI_CFG_SPACE_SIZE )
+            rm->private = (void *)(uintptr_t)0;
+        else
+            /*
+             * Else case needs to remove the capability in position 0x100U and
+             * moves the next capability to be in position 0x100U, that would
+             * cause the offset of next capability in vpci different from the
+             * hardware, then cause error accesses, so just ignore it here and
+             * hope hardware would handle the capability well.
+            */
+            printk(XENLOG_ERR "%pd %pp: ext cap %u is first cap, can't mask it\n",
+                   pdev->domain, &pdev->sbdf, cap);
+        spin_unlock(&vpci->lock);
+        return;
+    }
+
+    prev_r = vpci_get_previous_ext_cap_register(vpci, offset);
+    ASSERT(prev_r);
+
+    pre_header = (uint32_t)(uintptr_t)prev_r->private;
+    prev_r->private = (void *)(uintptr_t)((pre_header &
+                                           ~PCI_EXT_CAP_NEXT_MASK) |
+                                          (header & PCI_EXT_CAP_NEXT_MASK));
+
+    list_del(&rm->node);
+    spin_unlock(&vpci->lock);
+    xfree(rm);
+}
+
 static void vpci_init_capabilities(struct pci_dev *pdev)
 {
     for ( unsigned int i = 0; i < NUM_VPCI_INIT; i++ )
@@ -216,6 +293,8 @@ static void vpci_init_capabilities(struct pci_dev *pdev)
                    is_ext ? "extended" : "legacy", cap, rc);
             if ( !is_ext )
                 vpci_capability_mask(pdev, cap);
+            else
+                vpci_ext_capability_mask(pdev, cap);
         }
     }
 }
diff --git a/xen/include/xen/pci_regs.h b/xen/include/xen/pci_regs.h
index 27b4f44eedf3..5fe6653fded4 100644
--- a/xen/include/xen/pci_regs.h
+++ b/xen/include/xen/pci_regs.h
@@ -449,6 +449,7 @@
 #define PCI_EXT_CAP_ID(header)		((header) & 0x0000ffff)
 #define PCI_EXT_CAP_VER(header)		(((header) >> 16) & 0xf)
 #define PCI_EXT_CAP_NEXT(header)	(((header) >> 20) & 0xffc)
+#define PCI_EXT_CAP_NEXT_MASK		0xFFC00000U
 
 #define PCI_EXT_CAP_ID_ERR	1
 #define PCI_EXT_CAP_ID_VC	2
-- 
2.34.1



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From: Jiqian Chen 
To: 
CC: Huang Rui , Jiqian Chen ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v3 01/11] vpci/header: Move emulating cap list logic into new function
Date: Mon, 21 Apr 2025 14:18:53 +0800
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No functional changes.
Follow-on changes will benifit from this.

Signed-off-by: Jiqian Chen 
---
cc: "Roger Pau Monné" 
---
v2->v3 changes:
new patch.

Best regards,
Jiqian Chen.
---
 xen/drivers/vpci/header.c | 138 ++++++++++++++++++++------------------
 1 file changed, 73 insertions(+), 65 deletions(-)

diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c
index ef6c965c081c..3e9b44454b43 100644
--- a/xen/drivers/vpci/header.c
+++ b/xen/drivers/vpci/header.c
@@ -745,6 +745,75 @@ static int bar_add_rangeset(const struct pci_dev *pdev, struct vpci_bar *bar,
     return !bar->mem ? -ENOMEM : 0;
 }
 
+static int vpci_init_capability_list(struct pci_dev *pdev)
+{
+    int rc;
+    bool mask_cap_list = false;
+
+    if ( !is_hardware_domain(pdev->domain) &&
+         pci_conf_read16(pdev->sbdf, PCI_STATUS) & PCI_STATUS_CAP_LIST )
+    {
+        /* Only expose capabilities to the guest that vPCI can handle. */
+        unsigned int next, ttl = 48;
+        static const unsigned int supported_caps[] = {
+            PCI_CAP_ID_MSI,
+            PCI_CAP_ID_MSIX,
+        };
+
+        next = pci_find_next_cap_ttl(pdev->sbdf, PCI_CAPABILITY_LIST,
+                                     supported_caps,
+                                     ARRAY_SIZE(supported_caps), &ttl);
+
+        rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL,
+                               PCI_CAPABILITY_LIST, 1,
+                               (void *)(uintptr_t)next);
+        if ( rc )
+            return rc;
+
+        next &= ~3;
+
+        if ( !next )
+            /*
+             * If we don't have any supported capabilities to expose to the
+             * guest, mask the PCI_STATUS_CAP_LIST bit in the status
+             * register.
+             */
+            mask_cap_list = true;
+
+        while ( next && ttl )
+        {
+            unsigned int pos = next;
+
+            next = pci_find_next_cap_ttl(pdev->sbdf,
+                                         pos + PCI_CAP_LIST_NEXT,
+                                         supported_caps,
+                                         ARRAY_SIZE(supported_caps), &ttl);
+
+            rc = vpci_add_register(pdev->vpci, vpci_hw_read8, NULL,
+                                   pos + PCI_CAP_LIST_ID, 1, NULL);
+            if ( rc )
+                return rc;
+
+            rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL,
+                                   pos + PCI_CAP_LIST_NEXT, 1,
+                                   (void *)(uintptr_t)next);
+            if ( rc )
+                return rc;
+
+            next &= ~3;
+        }
+    }
+
+    /* Utilize rsvdp_mask to hide PCI_STATUS_CAP_LIST from the guest. */
+    return vpci_add_register_mask(pdev->vpci, vpci_hw_read16, vpci_hw_write16,
+                                  PCI_STATUS, 2, NULL,
+                                  PCI_STATUS_RO_MASK &
+                                    ~(mask_cap_list ? PCI_STATUS_CAP_LIST : 0),
+                                  PCI_STATUS_RW1C_MASK,
+                                  mask_cap_list ? PCI_STATUS_CAP_LIST : 0,
+                                  PCI_STATUS_RSVDZ_MASK);
+}
+
 static int cf_check init_header(struct pci_dev *pdev)
 {
     uint16_t cmd;
@@ -753,7 +822,6 @@ static int cf_check init_header(struct pci_dev *pdev)
     struct vpci_header *header = &pdev->vpci->header;
     struct vpci_bar *bars = header->bars;
     int rc;
-    bool mask_cap_list = false;
     bool is_hwdom = is_hardware_domain(pdev->domain);
 
     ASSERT(rw_is_write_locked(&pdev->domain->pci_lock));
@@ -794,61 +862,12 @@ static int cf_check init_header(struct pci_dev *pdev)
     if ( rc )
         return rc;
 
+    rc = vpci_init_capability_list(pdev);
+    if ( rc )
+        return rc;
+
     if ( !is_hwdom )
     {
-        if ( pci_conf_read16(pdev->sbdf, PCI_STATUS) & PCI_STATUS_CAP_LIST )
-        {
-            /* Only expose capabilities to the guest that vPCI can handle. */
-            unsigned int next, ttl = 48;
-            static const unsigned int supported_caps[] = {
-                PCI_CAP_ID_MSI,
-                PCI_CAP_ID_MSIX,
-            };
-
-            next = pci_find_next_cap_ttl(pdev->sbdf, PCI_CAPABILITY_LIST,
-                                         supported_caps,
-                                         ARRAY_SIZE(supported_caps), &ttl);
-
-            rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL,
-                                   PCI_CAPABILITY_LIST, 1,
-                                   (void *)(uintptr_t)next);
-            if ( rc )
-                return rc;
-
-            next &= ~3;
-
-            if ( !next )
-                /*
-                 * If we don't have any supported capabilities to expose to the
-                 * guest, mask the PCI_STATUS_CAP_LIST bit in the status
-                 * register.
-                 */
-                mask_cap_list = true;
-
-            while ( next && ttl )
-            {
-                unsigned int pos = next;
-
-                next = pci_find_next_cap_ttl(pdev->sbdf,
-                                             pos + PCI_CAP_LIST_NEXT,
-                                             supported_caps,
-                                             ARRAY_SIZE(supported_caps), &ttl);
-
-                rc = vpci_add_register(pdev->vpci, vpci_hw_read8, NULL,
-                                       pos + PCI_CAP_LIST_ID, 1, NULL);
-                if ( rc )
-                    return rc;
-
-                rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL,
-                                       pos + PCI_CAP_LIST_NEXT, 1,
-                                       (void *)(uintptr_t)next);
-                if ( rc )
-                    return rc;
-
-                next &= ~3;
-            }
-        }
-
         /* Extended capabilities read as zero, write ignore */
         rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL, 0x100, 4,
                                (void *)0);
@@ -856,17 +875,6 @@ static int cf_check init_header(struct pci_dev *pdev)
             return rc;
     }
 
-    /* Utilize rsvdp_mask to hide PCI_STATUS_CAP_LIST from the guest. */
-    rc = vpci_add_register_mask(pdev->vpci, vpci_hw_read16, vpci_hw_write16,
-                                PCI_STATUS, 2, NULL,
-                                PCI_STATUS_RO_MASK &
-                                    ~(mask_cap_list ? PCI_STATUS_CAP_LIST : 0),
-                                PCI_STATUS_RW1C_MASK,
-                                mask_cap_list ? PCI_STATUS_CAP_LIST : 0,
-                                PCI_STATUS_RSVDZ_MASK);
-    if ( rc )
-        return rc;
-
     if ( pdev->ignore_bars )
         return 0;
 
-- 
2.34.1



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From: Jiqian Chen 
To: 
CC: Huang Rui , Jiqian Chen ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Andrew Cooper
	, Anthony PERARD ,
	Michal Orzel , Jan Beulich , "Julien
 Grall" , Stefano Stabellini 
Subject: [PATCH v3 05/11] vpci: Refactor REGISTER_VPCI_INIT
Date: Mon, 21 Apr 2025 14:18:57 +0800
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Refactor REGISTER_VPCI_INIT to contain more capability specific
information, this is benifit for follow-on changes to hide capability
which initialization fails.

What's more, change the definition of init_header() since it is
not a capability and it is needed for all devices' PCI config space.

Note:
Call vpci_make_msix_hole() in the end of init_msix() since the
change of sequence of init_header() and init_msix().
The fini hook will be implemented in follow-on changes.

Signed-off-by: Jiqian Chen 
---
cc: "Roger Pau Monné" 
cc: Andrew Cooper 
cc: Anthony PERARD 
cc: Michal Orzel 
cc: Jan Beulich 
cc: Julien Grall 
cc: Stefano Stabellini 
---
v2->v3 changes:
* This is separated from patch "vpci: Hide capability when it fails to initialize" of v2.
* Delete __maybe_unused attribute of "out" in function vpci_assign_devic().
* Rename REGISTER_VPCI_EXTEND_CAP to REGISTER_VPCI_EXTENDED_CAP.

v1->v2 changes:
* Removed the "priorities" of initializing capabilities since it isn't used anymore.
* Added new function vpci_capability_mask() and vpci_ext_capability_mask() to remove failed capability from list.
* Called vpci_make_msix_hole() in the end of init_msix().

Best regards,
Jiqian Chen.
---
 xen/drivers/vpci/header.c |  3 +--
 xen/drivers/vpci/msi.c    |  2 +-
 xen/drivers/vpci/msix.c   |  8 +++++--
 xen/drivers/vpci/rebar.c  |  2 +-
 xen/drivers/vpci/vpci.c   | 48 +++++++++++++++++++++++++++++++--------
 xen/include/xen/vpci.h    | 28 ++++++++++++++++-------
 xen/include/xen/xen.lds.h |  2 +-
 7 files changed, 68 insertions(+), 25 deletions(-)

diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c
index ee94ad8e5037..afe4bcdfcb30 100644
--- a/xen/drivers/vpci/header.c
+++ b/xen/drivers/vpci/header.c
@@ -842,7 +842,7 @@ static int vpci_init_ext_capability_list(struct pci_dev *pdev)
     return 0;
 }
 
-static int cf_check init_header(struct pci_dev *pdev)
+int vpci_init_header(struct pci_dev *pdev)
 {
     uint16_t cmd;
     uint64_t addr, size;
@@ -1038,7 +1038,6 @@ static int cf_check init_header(struct pci_dev *pdev)
     pci_conf_write16(pdev->sbdf, PCI_COMMAND, cmd);
     return rc;
 }
-REGISTER_VPCI_INIT(init_header, VPCI_PRIORITY_MIDDLE);
 
 /*
  * Local variables:
diff --git a/xen/drivers/vpci/msi.c b/xen/drivers/vpci/msi.c
index 66e5a8a116be..ea7dc0c060ea 100644
--- a/xen/drivers/vpci/msi.c
+++ b/xen/drivers/vpci/msi.c
@@ -270,7 +270,7 @@ static int cf_check init_msi(struct pci_dev *pdev)
 
     return 0;
 }
-REGISTER_VPCI_INIT(init_msi, VPCI_PRIORITY_LOW);
+REGISTER_VPCI_LEGACY_CAP(PCI_CAP_ID_MSI, init_msi, NULL);
 
 void vpci_dump_msi(void)
 {
diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c
index 6bd8c55bb48e..0228ffd9fda9 100644
--- a/xen/drivers/vpci/msix.c
+++ b/xen/drivers/vpci/msix.c
@@ -751,9 +751,13 @@ static int cf_check init_msix(struct pci_dev *pdev)
     pdev->vpci->msix = msix;
     list_add(&msix->next, &d->arch.hvm.msix_tables);
 
-    return 0;
+    spin_lock(&pdev->vpci->lock);
+    rc = vpci_make_msix_hole(pdev);
+    spin_unlock(&pdev->vpci->lock);
+
+    return rc;
 }
-REGISTER_VPCI_INIT(init_msix, VPCI_PRIORITY_HIGH);
+REGISTER_VPCI_LEGACY_CAP(PCI_CAP_ID_MSIX, init_msix, NULL);
 
 /*
  * Local variables:
diff --git a/xen/drivers/vpci/rebar.c b/xen/drivers/vpci/rebar.c
index 793937449af7..026f8f7972d9 100644
--- a/xen/drivers/vpci/rebar.c
+++ b/xen/drivers/vpci/rebar.c
@@ -118,7 +118,7 @@ static int cf_check init_rebar(struct pci_dev *pdev)
 
     return 0;
 }
-REGISTER_VPCI_INIT(init_rebar, VPCI_PRIORITY_LOW);
+REGISTER_VPCI_EXTENDED_CAP(PCI_EXT_CAP_ID_REBAR, init_rebar, NULL);
 
 /*
  * Local variables:
diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c
index 3349b98389b8..5474b66668c1 100644
--- a/xen/drivers/vpci/vpci.c
+++ b/xen/drivers/vpci/vpci.c
@@ -36,8 +36,8 @@ struct vpci_register {
 };
 
 #ifdef __XEN__
-extern vpci_register_init_t *const __start_vpci_array[];
-extern vpci_register_init_t *const __end_vpci_array[];
+extern vpci_capability_t *const __start_vpci_array[];
+extern vpci_capability_t *const __end_vpci_array[];
 #define NUM_VPCI_INIT (__end_vpci_array - __start_vpci_array)
 
 #ifdef CONFIG_HAS_VPCI_GUEST_SUPPORT
@@ -83,6 +83,36 @@ static int assign_virtual_sbdf(struct pci_dev *pdev)
 
 #endif /* CONFIG_HAS_VPCI_GUEST_SUPPORT */
 
+static int vpci_init_capabilities(struct pci_dev *pdev)
+{
+    for ( unsigned int i = 0; i < NUM_VPCI_INIT; i++ )
+    {
+        const vpci_capability_t *capability = __start_vpci_array[i];
+        const unsigned int cap = capability->id;
+        const bool is_ext = capability->is_ext;
+        unsigned int pos;
+        int rc;
+
+        if ( !is_hardware_domain(pdev->domain) && is_ext )
+            continue;
+
+        if ( !is_ext )
+            pos = pci_find_cap_offset(pdev->sbdf, cap);
+        else
+            pos = pci_find_ext_capability(pdev->sbdf, cap);
+
+        if ( !pos || !capability->init )
+            continue;
+
+        rc = capability->init(pdev);
+
+        if ( rc )
+            return rc;
+    }
+
+    return 0;
+}
+
 void vpci_deassign_device(struct pci_dev *pdev)
 {
     unsigned int i;
@@ -128,7 +158,6 @@ void vpci_deassign_device(struct pci_dev *pdev)
 
 int vpci_assign_device(struct pci_dev *pdev)
 {
-    unsigned int i;
     const unsigned long *ro_map;
     int rc = 0;
 
@@ -159,14 +188,13 @@ int vpci_assign_device(struct pci_dev *pdev)
         goto out;
 #endif
 
-    for ( i = 0; i < NUM_VPCI_INIT; i++ )
-    {
-        rc = __start_vpci_array[i](pdev);
-        if ( rc )
-            break;
-    }
+    rc = vpci_init_header(pdev);
+    if ( rc )
+        goto out;
+
+    rc = vpci_init_capabilities(pdev);
 
- out: __maybe_unused;
+ out:
     if ( rc )
         vpci_deassign_device(pdev);
 
diff --git a/xen/include/xen/vpci.h b/xen/include/xen/vpci.h
index 9d47b8c1a50e..8e815b418b7d 100644
--- a/xen/include/xen/vpci.h
+++ b/xen/include/xen/vpci.h
@@ -13,11 +13,12 @@ typedef uint32_t vpci_read_t(const struct pci_dev *pdev, unsigned int reg,
 typedef void vpci_write_t(const struct pci_dev *pdev, unsigned int reg,
                           uint32_t val, void *data);
 
-typedef int vpci_register_init_t(struct pci_dev *dev);
-
-#define VPCI_PRIORITY_HIGH      "1"
-#define VPCI_PRIORITY_MIDDLE    "5"
-#define VPCI_PRIORITY_LOW       "9"
+typedef struct {
+    unsigned int id;
+    bool is_ext;
+    int (*init)(struct pci_dev *pdev);
+    void (*fini)(struct pci_dev *pdev);
+} vpci_capability_t;
 
 #define VPCI_ECAM_BDF(addr)     (((addr) & 0x0ffff000) >> 12)
 
@@ -29,9 +30,20 @@ typedef int vpci_register_init_t(struct pci_dev *dev);
  */
 #define VPCI_MAX_VIRT_DEV       (PCI_SLOT(~0) + 1)
 
-#define REGISTER_VPCI_INIT(x, p)                \
-  static vpci_register_init_t *const x##_entry  \
-               __used_section(".data.vpci." p) = (x)
+#define REGISTER_VPCI_CAP(cap, x, y, ext) \
+  static vpci_capability_t x##_t = { \
+        .id = (cap), \
+        .init = (x), \
+        .fini = (y), \
+        .is_ext = (ext), \
+  }; \
+  static vpci_capability_t *const x##_entry  \
+               __used_section(".data.vpci.") = &(x##_t)
+
+#define REGISTER_VPCI_LEGACY_CAP(cap, x, y) REGISTER_VPCI_CAP(cap, x, y, false)
+#define REGISTER_VPCI_EXTENDED_CAP(cap, x, y) REGISTER_VPCI_CAP(cap, x, y, true)
+
+int __must_check vpci_init_header(struct pci_dev *pdev);
 
 /* Assign vPCI to device by adding handlers. */
 int __must_check vpci_assign_device(struct pci_dev *pdev);
diff --git a/xen/include/xen/xen.lds.h b/xen/include/xen/xen.lds.h
index 16a9b1ba03db..c73222112dd3 100644
--- a/xen/include/xen/xen.lds.h
+++ b/xen/include/xen/xen.lds.h
@@ -187,7 +187,7 @@
 #define VPCI_ARRAY               \
        . = ALIGN(POINTER_ALIGN); \
        __start_vpci_array = .;   \
-       *(SORT(.data.vpci.*))     \
+       *(.data.vpci.*)     \
        __end_vpci_array = .;
 #else
 #define VPCI_ARRAY
-- 
2.34.1



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From: Jiqian Chen 
To: 
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	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v3 04/11] vpci/header: Emulate extended capability list for dom0
Date: Mon, 21 Apr 2025 14:18:56 +0800
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Add a new function to emulate extended capability list for dom0,
and call it in init_header(). So that it will be easy to hide a
extended capability whose initialization fails.

As for the extended capability list of domU, just move the logic
into above function and keep hiding it for domU.

Signed-off-by: Jiqian Chen 
---
cc: "Roger Pau Monné" 
---
v2->v3 changes:
* In vpci_init_ext_capability_list(), when domain is domU, directly return after adding a handler(hiding all extended capability for domU).
* In vpci_init_ext_capability_list(), change condition to be "while ( pos >= 0x100U && ttl-- )" instead of "while ( pos && ttl-- )".
* Add new function vpci_hw_write32, and pass it to extended capability handler for dom0.

v1->v2 changes:
new patch

Best regards,
Jiqian Chen.
---
 xen/drivers/vpci/header.c | 36 ++++++++++++++++++++++++++++--------
 xen/drivers/vpci/vpci.c   |  6 ++++++
 xen/include/xen/vpci.h    |  2 ++
 3 files changed, 36 insertions(+), 8 deletions(-)

diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c
index c98cd211d9d7..ee94ad8e5037 100644
--- a/xen/drivers/vpci/header.c
+++ b/xen/drivers/vpci/header.c
@@ -817,6 +817,31 @@ static int vpci_init_capability_list(struct pci_dev *pdev)
                                   PCI_STATUS_RSVDZ_MASK);
 }
 
+static int vpci_init_ext_capability_list(struct pci_dev *pdev)
+{
+    unsigned int pos = PCI_CFG_SPACE_SIZE, ttl = 480;
+
+    if ( !is_hardware_domain(pdev->domain) )
+        /* Extended capabilities read as zero, write ignore for guest */
+        return vpci_add_register(pdev->vpci, vpci_read_val, NULL,
+                                 pos, 4, (void *)0);
+
+    while ( pos >= PCI_CFG_SPACE_SIZE && ttl-- )
+    {
+        uint32_t header = pci_conf_read32(pdev->sbdf, pos);
+        int rc;
+
+        rc = vpci_add_register(pdev->vpci, vpci_read_val, vpci_hw_write32,
+                               pos, 4, (void *)(uintptr_t)header);
+        if ( rc )
+            return rc;
+
+        pos = PCI_EXT_CAP_NEXT(header);
+    }
+
+    return 0;
+}
+
 static int cf_check init_header(struct pci_dev *pdev)
 {
     uint16_t cmd;
@@ -869,14 +894,9 @@ static int cf_check init_header(struct pci_dev *pdev)
     if ( rc )
         return rc;
 
-    if ( !is_hwdom )
-    {
-        /* Extended capabilities read as zero, write ignore */
-        rc = vpci_add_register(pdev->vpci, vpci_read_val, NULL, 0x100, 4,
-                               (void *)0);
-        if ( rc )
-            return rc;
-    }
+    rc = vpci_init_ext_capability_list(pdev);
+    if ( rc )
+        return rc;
 
     if ( pdev->ignore_bars )
         return 0;
diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c
index 1e6aa5d799b9..3349b98389b8 100644
--- a/xen/drivers/vpci/vpci.c
+++ b/xen/drivers/vpci/vpci.c
@@ -232,6 +232,12 @@ void cf_check vpci_hw_write16(
     pci_conf_write16(pdev->sbdf, reg, val);
 }
 
+void cf_check vpci_hw_write32(
+    const struct pci_dev *pdev, unsigned int reg, uint32_t val, void *data)
+{
+    pci_conf_write32(pdev->sbdf, reg, val);
+}
+
 int vpci_add_register_mask(struct vpci *vpci, vpci_read_t *read_handler,
                            vpci_write_t *write_handler, unsigned int offset,
                            unsigned int size, void *data, uint32_t ro_mask,
diff --git a/xen/include/xen/vpci.h b/xen/include/xen/vpci.h
index 807401b2eaa2..9d47b8c1a50e 100644
--- a/xen/include/xen/vpci.h
+++ b/xen/include/xen/vpci.h
@@ -78,6 +78,8 @@ uint32_t cf_check vpci_hw_read32(
     const struct pci_dev *pdev, unsigned int reg, void *data);
 void cf_check vpci_hw_write16(
     const struct pci_dev *pdev, unsigned int reg, uint32_t val, void *data);
+void cf_check vpci_hw_write32(
+    const struct pci_dev *pdev, unsigned int reg, uint32_t val, void *data);
 
 /*
  * Check for pending vPCI operations on this vcpu. Returns true if the vcpu
-- 
2.34.1



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From: Jiqian Chen 
To: 
CC: Huang Rui , Jiqian Chen ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	
Subject: [PATCH v3 08/11] vpci: Refactor vpci_remove_register to remove matched registers
Date: Mon, 21 Apr 2025 14:19:00 +0800
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vpci_remove_register() only supports removing a register in a time,
but the follow-on changes need to remove all registers within a
range. And vpci_remove_register() is only used for test currently.
So, refactor it to support removing all matched registers in a
calling time.

And it is no matter to remove a non exist register, so remove the
__must_check prefix.

Signed-off-by: Jiqian Chen 
---
cc: "Roger Pau Monné" 
cc: Anthony PERARD 
---
v2->v3 changes:
* Add new check to return error if registers overlap but not inside range.

v1->v2 changes:
new patch

Best regards,
Jiqian Chen.
---
 tools/tests/vpci/main.c |  4 ++--
 xen/drivers/vpci/vpci.c | 34 ++++++++++++++++++++--------------
 xen/include/xen/vpci.h  |  4 ++--
 3 files changed, 24 insertions(+), 18 deletions(-)

diff --git a/tools/tests/vpci/main.c b/tools/tests/vpci/main.c
index 33223db3eb77..ca72877d60cd 100644
--- a/tools/tests/vpci/main.c
+++ b/tools/tests/vpci/main.c
@@ -132,10 +132,10 @@ static void vpci_write32_mask(const struct pci_dev *pdev, unsigned int reg,
                                   rsvdz_mask))
 
 #define VPCI_REMOVE_REG(off, size)                                          \
-    assert(!vpci_remove_register(test_pdev.vpci, off, size))
+    assert(!vpci_remove_registers(test_pdev.vpci, off, size))
 
 #define VPCI_REMOVE_INVALID_REG(off, size)                                  \
-    assert(vpci_remove_register(test_pdev.vpci, off, size))
+    assert(vpci_remove_registers(test_pdev.vpci, off, size))
 
 /* Read a 32b register using all possible sizes. */
 void multiread4_check(unsigned int reg, uint32_t val)
diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c
index 8ff5169bdd18..904770628a2a 100644
--- a/xen/drivers/vpci/vpci.c
+++ b/xen/drivers/vpci/vpci.c
@@ -497,34 +497,40 @@ int vpci_add_register_mask(struct vpci *vpci, vpci_read_t *read_handler,
     return 0;
 }
 
-int vpci_remove_register(struct vpci *vpci, unsigned int offset,
-                         unsigned int size)
+int vpci_remove_registers(struct vpci *vpci, unsigned int start,
+                          unsigned int size)
 {
-    const struct vpci_register r = { .offset = offset, .size = size };
     struct vpci_register *rm;
+    unsigned int end = start + size;
 
     spin_lock(&vpci->lock);
     list_for_each_entry ( rm, &vpci->handlers, node )
     {
-        int cmp = vpci_register_cmp(&r, rm);
-
-        /*
-         * NB: do not use a switch so that we can use break to
-         * get out of the list loop earlier if required.
-         */
-        if ( !cmp && rm->offset == offset && rm->size == size )
+        /* Remove rm if rm is inside the range. */
+        if ( rm->offset >= start && rm->offset + rm->size <= end )
         {
+            struct vpci_register *prev =
+                list_entry(rm->node.prev, struct vpci_register, node);
+
             list_del(&rm->node);
-            spin_unlock(&vpci->lock);
             xfree(rm);
-            return 0;
+            rm = prev;
+            continue;
         }
-        if ( cmp <= 0 )
+
+        /* Return error if registers overlap but not inside. */
+        if ( rm->offset + rm->size > start && rm->offset < end )
+        {
+            spin_unlock(&vpci->lock);
+            return -EINVAL;
+        }
+
+        if ( start < rm->offset )
             break;
     }
     spin_unlock(&vpci->lock);
 
-    return -ENOENT;
+    return 0;
 }
 
 /* Wrappers for performing reads/writes to the underlying hardware. */
diff --git a/xen/include/xen/vpci.h b/xen/include/xen/vpci.h
index 8e815b418b7d..4e226331fdf3 100644
--- a/xen/include/xen/vpci.h
+++ b/xen/include/xen/vpci.h
@@ -69,8 +69,8 @@ static inline int __must_check vpci_add_register(struct vpci *vpci,
                                   size, data, 0, 0, 0, 0);
 }
 
-int __must_check vpci_remove_register(struct vpci *vpci, unsigned int offset,
-                                      unsigned int size);
+int vpci_remove_registers(struct vpci *vpci, unsigned int start,
+                          unsigned int size);
 
 /* Generic read/write handlers for the PCI config space. */
 uint32_t vpci_read(pci_sbdf_t sbdf, unsigned int reg, unsigned int size);
-- 
2.34.1



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From: Jiqian Chen 
To: 
CC: Huang Rui , Jiqian Chen , "Andrew
 Cooper" , Anthony PERARD
	, Michal Orzel , Jan Beulich
	, Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , "Stefano
 Stabellini" 
Subject: [PATCH v3 02/11] driver/pci: Get next capability without passing caps
Date: Mon, 21 Apr 2025 14:18:54 +0800
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Modify function pci_find_next_cap_ttl to support returning position
of next capability when size "n" is zero.

That can help caller to get next capability offset if caller just
has a information of current capability offset.

That will be used in a follow-on change.

Signed-off-by: Jiqian Chen 
---
cc: Andrew Cooper 
cc: Anthony PERARD 
cc: Michal Orzel 
cc: Jan Beulich 
cc: Julien Grall 
cc: "Roger Pau Monné" 
cc: Stefano Stabellini 
---
v2->v3 changes:
* Only check if n == 0 and add assertion for array "caps".
* Not to change pci_find_next_cap_ttl definition.

v1->v2 changes:
new patch.

Best regards,
Jiqian Chen.
---
 xen/drivers/pci/pci.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/xen/drivers/pci/pci.c b/xen/drivers/pci/pci.c
index edf5b9f7ae9f..804f4e1e6066 100644
--- a/xen/drivers/pci/pci.c
+++ b/xen/drivers/pci/pci.c
@@ -55,6 +55,9 @@ unsigned int pci_find_next_cap_ttl(pci_sbdf_t sbdf, unsigned int pos,
 
         if ( id == 0xff )
             break;
+        if ( n == 0 )
+            return pos;
+        ASSERT(caps);
         for ( i = 0; i < n; i++ )
         {
             if ( id == caps[i] )
-- 
2.34.1



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From: Jiqian Chen 
To: 
CC: Huang Rui , Jiqian Chen ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v3 10/11] vpci/msi: Free MSI resources when init_msi() fails
Date: Mon, 21 Apr 2025 14:19:02 +0800
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When init_msi() fails, the previous new changes will hide MSI
capability, it can't rely on vpci_deassign_device() to remove
all MSI related resources anymore, those resources must be
cleaned up in failure path of init_msi.

To do that, add a new function to free MSI resources.

Signed-off-by: Jiqian Chen 
---
cc: "Roger Pau Monné" 
---
v2->v3 changes:
* Remove all fail path, and use fini_msi() hook instead.
* Change the method to calculating the size of msi registers.

v1->v2 changes:
* Added a new function fini_msi to free all MSI resources instead of using an array to record registered registers.

Best regards,
Jiqian Chen.
---
 xen/drivers/vpci/msi.c | 28 +++++++++++++++++++++++++++-
 1 file changed, 27 insertions(+), 1 deletion(-)

diff --git a/xen/drivers/vpci/msi.c b/xen/drivers/vpci/msi.c
index ea7dc0c060ea..18b06b789827 100644
--- a/xen/drivers/vpci/msi.c
+++ b/xen/drivers/vpci/msi.c
@@ -193,6 +193,32 @@ static void cf_check mask_write(
     msi->mask = val;
 }
 
+static void fini_msi(struct pci_dev *pdev)
+{
+    unsigned int end, size;
+    struct vpci *vpci = pdev->vpci;
+    const unsigned int msi_pos = pdev->msi_pos;
+
+    if ( !msi_pos || !vpci->msi )
+        return;
+
+    if ( vpci->msi->masking )
+        end = msi_pending_bits_reg(msi_pos, vpci->msi->address64);
+    else
+        end = msi_mask_bits_reg(msi_pos, vpci->msi->address64) - 2;
+
+    size = end - msi_control_reg(msi_pos);
+
+    /*
+     * Remove all possible registered registers except capability ID
+     * register if guest and next capability pointer register, which
+     * will be removed in mask function.
+     */
+    vpci_remove_registers(vpci, msi_control_reg(msi_pos), size);
+    xfree(vpci->msi);
+    vpci->msi = NULL;
+}
+
 static int cf_check init_msi(struct pci_dev *pdev)
 {
     unsigned int pos = pdev->msi_pos;
@@ -270,7 +296,7 @@ static int cf_check init_msi(struct pci_dev *pdev)
 
     return 0;
 }
-REGISTER_VPCI_LEGACY_CAP(PCI_CAP_ID_MSI, init_msi, NULL);
+REGISTER_VPCI_LEGACY_CAP(PCI_CAP_ID_MSI, init_msi, fini_msi);
 
 void vpci_dump_msi(void)
 {
-- 
2.34.1



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From: Jiqian Chen 
To: 
CC: Huang Rui , Jiqian Chen ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v3 09/11] vpci/rebar: Remove registers when init_rebar() fails
Date: Mon, 21 Apr 2025 14:19:01 +0800
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When init_rebar() fails, the previous new changes will hide Rebar
capability, it can't rely on vpci_deassign_device() to remove all
Rebar related registers anymore, those registers must be removed
fini_rebar().

To do that, call vpci_remove_registers() to remove all possible
registered registers.

Signed-off-by: Jiqian Chen 
---
cc: "Roger Pau Monné" 
---
v2->v3 changes:
* Use fini_rebar() to remove all register instead of in the failure path of init_rebar();

v1->v2 changes:
* Called vpci_remove_registers() to remove all possible registered registers instead of using a array to record all registered register.

Best regards,
Jiqian Chen.
---
 xen/drivers/vpci/rebar.c | 35 ++++++++++++++++++++++++-----------
 1 file changed, 24 insertions(+), 11 deletions(-)

diff --git a/xen/drivers/vpci/rebar.c b/xen/drivers/vpci/rebar.c
index 026f8f7972d9..325090afb0f8 100644
--- a/xen/drivers/vpci/rebar.c
+++ b/xen/drivers/vpci/rebar.c
@@ -49,6 +49,26 @@ static void cf_check rebar_ctrl_write(const struct pci_dev *pdev,
     bar->guest_addr = bar->addr;
 }
 
+static void fini_rebar(struct pci_dev *pdev)
+{
+    uint32_t ctrl;
+    unsigned int nbars;
+    unsigned int rebar_offset = pci_find_ext_capability(pdev->sbdf,
+                                                        PCI_EXT_CAP_ID_REBAR);
+
+    if ( !rebar_offset || !is_hardware_domain(pdev->domain) )
+        return;
+
+    ctrl = pci_conf_read32(pdev->sbdf, rebar_offset + PCI_REBAR_CTRL(0));
+    nbars = MASK_EXTR(ctrl, PCI_REBAR_CTRL_NBAR_MASK);
+    /*
+     * Remove all possible registered registers except header.
+     * Header register will be removed in mask function.
+     */
+    vpci_remove_registers(pdev->vpci, rebar_offset + PCI_REBAR_CAP(0),
+                          PCI_REBAR_CTRL(nbars - 1));
+}
+
 static int cf_check init_rebar(struct pci_dev *pdev)
 {
     uint32_t ctrl;
@@ -80,7 +100,7 @@ static int cf_check init_rebar(struct pci_dev *pdev)
         {
             printk(XENLOG_ERR "%pd %pp: too big BAR number %u in REBAR_CTRL\n",
                    pdev->domain, &pdev->sbdf, index);
-            continue;
+            return -EINVAL;
         }
 
         bar = &pdev->vpci->header.bars[index];
@@ -88,7 +108,7 @@ static int cf_check init_rebar(struct pci_dev *pdev)
         {
             printk(XENLOG_ERR "%pd %pp: BAR%u is not in memory space\n",
                    pdev->domain, &pdev->sbdf, index);
-            continue;
+            return -EINVAL;
         }
 
         rc = vpci_add_register(pdev->vpci, vpci_hw_read32, rebar_ctrl_write,
@@ -97,14 +117,7 @@ static int cf_check init_rebar(struct pci_dev *pdev)
         {
             printk(XENLOG_ERR "%pd %pp: BAR%u fail to add reg of REBAR_CTRL rc=%d\n",
                    pdev->domain, &pdev->sbdf, index, rc);
-            /*
-             * Ideally we would hide the ReBar capability on error, but code
-             * for doing so still needs to be written. Use continue instead
-             * to keep any already setup register hooks, as returning an
-             * error will cause the hardware domain to get unmediated access
-             * to all device registers.
-             */
-            continue;
+            return rc;
         }
 
         bar->resizable_sizes =
@@ -118,7 +131,7 @@ static int cf_check init_rebar(struct pci_dev *pdev)
 
     return 0;
 }
-REGISTER_VPCI_EXTENDED_CAP(PCI_EXT_CAP_ID_REBAR, init_rebar, NULL);
+REGISTER_VPCI_EXTENDED_CAP(PCI_EXT_CAP_ID_REBAR, init_rebar, fini_rebar);
 
 /*
  * Local variables:
-- 
2.34.1



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From: Jiqian Chen 
To: 
CC: Huang Rui , Jiqian Chen ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v3 11/11] vpci/msix: Add function to clean MSIX resources
Date: Mon, 21 Apr 2025 14:19:03 +0800
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When init_msix() fails, it needs to clean all MSIX resources.
So, add a new function to do that.

Signed-off-by: Jiqian Chen 
---
cc: "Roger Pau Monné" 
---
v2->v3 changes:
* Remove unnecessary clean operations in fini_msix().

v1->v2 changes:
new patch.

Best regards,
Jiqian Chen.
---
 xen/drivers/vpci/msix.c | 21 ++++++++++++++++++++-
 1 file changed, 20 insertions(+), 1 deletion(-)

diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c
index 0228ffd9fda9..e322c260f6bc 100644
--- a/xen/drivers/vpci/msix.c
+++ b/xen/drivers/vpci/msix.c
@@ -703,6 +703,25 @@ int vpci_make_msix_hole(const struct pci_dev *pdev)
     return 0;
 }
 
+static void fini_msix(struct pci_dev *pdev)
+{
+    struct vpci *vpci = pdev->vpci;
+    unsigned int msix_pos = pdev->msix_pos;
+
+    if ( !msix_pos || !vpci->msix )
+        return;
+
+    list_del(&vpci->msix->next);
+
+    for ( unsigned int i = 0; i < ARRAY_SIZE(vpci->msix->table); i++ )
+        if ( vpci->msix->table[i] )
+            iounmap(vpci->msix->table[i]);
+
+    vpci_remove_registers(vpci, msix_control_reg(msix_pos), 2);
+    xfree(vpci->msix);
+    vpci->msix = NULL;
+}
+
 static int cf_check init_msix(struct pci_dev *pdev)
 {
     struct domain *d = pdev->domain;
@@ -757,7 +776,7 @@ static int cf_check init_msix(struct pci_dev *pdev)
 
     return rc;
 }
-REGISTER_VPCI_LEGACY_CAP(PCI_CAP_ID_MSIX, init_msix, NULL);
+REGISTER_VPCI_LEGACY_CAP(PCI_CAP_ID_MSIX, init_msix, fini_msix);
 
 /*
  * Local variables:
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , Stefano Stabellini ,
	Andrew Cooper , Anthony PERARD
	, Michal Orzel , Jan Beulich
	, Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , "Stefano
 Stabellini" , Sergiy Kibrik ,
	Penny Zheng 
Subject: [PATCH v3 02/20] xen: introduce CONFIG_SYSCTL
Date: Mon, 21 Apr 2025 15:37:05 +0800
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From: Stefano Stabellini 

We introduce a new Kconfig CONFIG_SYSCTL, which shall only be disabled
on some dom0less systems, to reduce Xen footprint.

Signed-off-by: Stefano Stabellini 
Signed-off-by: Sergiy Kibrik 
Signed-off-by: Penny Zheng 
---
v2 -> v3:
- remove "intend to" in commit message
---
 xen/common/Kconfig | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/xen/common/Kconfig b/xen/common/Kconfig
index be28060716..d89e9ede77 100644
--- a/xen/common/Kconfig
+++ b/xen/common/Kconfig
@@ -581,4 +581,15 @@ config BUDDY_ALLOCATOR_SIZE
 	  Amount of memory reserved for the buddy allocator to serve Xen heap,
 	  working alongside the colored one.
 
+menu "Supported hypercall interfaces"
+	visible if EXPERT
+
+config SYSCTL
+	bool "Enable sysctl hypercall"
+	default y
+	help
+	  This option shall only be disabled on some dom0less systems,
+	  to reduce Xen footprint.
+endmenu
+
 endmenu
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , Penny Zheng , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini 
Subject: [PATCH v3 01/20] xen/x86: remove "depends on !PV_SHIM_EXCLUSIVE"
Date: Mon, 21 Apr 2025 15:37:04 +0800
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Remove all "depends on !PV_SHIM_EXCLUSIVE" (also the functionally
equivalent "if !...") in Kconfig file, since negative dependancy will badly
affect allyesconfig.
This commit is based on "x86: provide an inverted Kconfig control for
shim-exclusive mode"[1]

[1] https://lists.xen.org/archives/html/xen-devel/2023-03/msg00040.html

Signed-off-by: Penny Zheng 
Reviewed-by: Stefano Stabellini 
---
v2 -> v3:
- remove comment for PV_SHIM_EXCLUSIVE
---
 xen/arch/x86/Kconfig      | 4 ----
 xen/arch/x86/hvm/Kconfig  | 1 -
 xen/drivers/video/Kconfig | 4 ++--
 3 files changed, 2 insertions(+), 7 deletions(-)

diff --git a/xen/arch/x86/Kconfig b/xen/arch/x86/Kconfig
index de2fa37f08..29a8b4b35c 100644
--- a/xen/arch/x86/Kconfig
+++ b/xen/arch/x86/Kconfig
@@ -138,7 +138,6 @@ config XEN_IBT
 
 config SHADOW_PAGING
 	bool "Shadow Paging"
-	default !PV_SHIM_EXCLUSIVE
 	depends on PV || HVM
 	help
 
@@ -170,7 +169,6 @@ config BIGMEM
 config TBOOT
 	bool "Xen tboot support (UNSUPPORTED)"
 	depends on INTEL && UNSUPPORTED
-	default !PV_SHIM_EXCLUSIVE
 	select CRYPTO
 	help
 	  Allows support for Trusted Boot using the Intel(R) Trusted Execution
@@ -283,7 +281,6 @@ config PV_SHIM_EXCLUSIVE
 
 	  If unsure, say N.
 
-if !PV_SHIM_EXCLUSIVE
 
 config HYPERV_GUEST
 	bool "Hyper-V Guest"
@@ -293,7 +290,6 @@ config HYPERV_GUEST
 
 	  If unsure, say N.
 
-endif
 
 config REQUIRE_NX
 	bool "Require NX (No eXecute) support"
diff --git a/xen/arch/x86/hvm/Kconfig b/xen/arch/x86/hvm/Kconfig
index 2def0f98e2..b903764bda 100644
--- a/xen/arch/x86/hvm/Kconfig
+++ b/xen/arch/x86/hvm/Kconfig
@@ -1,6 +1,5 @@
 menuconfig HVM
 	bool "HVM support"
-	depends on !PV_SHIM_EXCLUSIVE
 	default !PV_SHIM
 	select COMPAT
 	select IOREQ_SERVER
diff --git a/xen/drivers/video/Kconfig b/xen/drivers/video/Kconfig
index 245030beea..66ee1e7c9c 100644
--- a/xen/drivers/video/Kconfig
+++ b/xen/drivers/video/Kconfig
@@ -3,10 +3,10 @@ config VIDEO
 	bool
 
 config VGA
-	bool "VGA support" if !PV_SHIM_EXCLUSIVE
+	bool "VGA support"
 	select VIDEO
 	depends on X86
-	default y if !PV_SHIM_EXCLUSIVE
+	default y
 	help
 	  Enable VGA output for the Xen hypervisor.
 
-- 
2.34.1



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From: Penny Zheng 
To: , 
CC: , Penny Zheng , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini , "Daniel
 P. Smith" , Dario Faggioli
	, Juergen Gross , George Dunlap
	, Nathan Studer , "Stewart
 Hildebrand" , Bertrand Marquis ,
	Volodymyr Babchuk , Alistair Francis
	, Bob Eshleman , "Connor
 Davis" , Oleksii Kurochko 
Subject: [PATCH v3 00/20] xen: introduce CONFIG_SYSCTL
Date: Mon, 21 Apr 2025 15:37:03 +0800
Message-ID: <20250421073723.3863060-1-Penny.Zheng@amd.com>
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It can be beneficial for some dom0less systems to further reduce Xen footprint
and disable some hypercalls handling code, which may not to be used & required
in such systems. Each hypercall has a separate option to keep configuration
flexible.

Options to disable hypercalls:
- sysctl
- domctl
- hvm
- physdev
- platform

This patch serie is only focusing on introducing CONFIG_SYSCTL. Different
options will be covered in different patch serie.

Features, like LIVEPATCH, Overlay DTB, which fully rely on sysctl op, are also
being wrapped with proper CONFIG_SYSCTL, to reduce Xen footprint as much as
possible.

It is based on Stefano Stabellini's commit "xen: introduce kconfig options to
disable hypercalls"(
https://lore.kernel.org/xen-devel/20241219092917.3006174-1-Sergiy_Kibrik@epam.com)

Penny Zheng (18):
  xen/x86: remove "depends on !PV_SHIM_EXCLUSIVE"
  xen/xsm: wrap around xsm_sysctl with CONFIG_SYSCTL
  xen/sysctl: wrap around XEN_SYSCTL_readconsole
  xen/sysctl: make CONFIG_TRACEBUFFER depend on CONFIG_SYSCTL
  xen/sysctl: wrap around XEN_SYSCTL_sched_id
  xen/sysctl: wrap around XEN_SYSCTL_perfc_op
  xen/sysctl: wrap around XEN_SYSCTL_lockprof_op
  xen/pmstat: consolidate code into pmstat.c
  xen/pmstat: introduce CONFIG_PM_OP
  xen/sysctl: introduce CONFIG_PM_STATS
  xen/sysctl: wrap around XEN_SYSCTL_page_offline_op
  xen/sysctl: wrap around XEN_SYSCTL_cpupool_op
  xen/sysctl: wrap around XEN_SYSCTL_scheduler_op
  xen: make avail_domheap_pages() inlined into get_outstanding_claims()
  xen/sysctl: wrap around XEN_SYSCTL_physinfo
  xen/sysctl: make CONFIG_COVERAGE depend on CONFIG_SYSCTL
  xen/sysctl: make CONFIG_LIVEPATCH depend on CONFIG_SYSCTL
  xen/sysctl: wrap around arch-specific arch_do_sysctl

Stefano Stabellini (2):
  xen: introduce CONFIG_SYSCTL
  xen/sysctl: wrap around sysctl hypercall

 xen/Kconfig.debug                            |   2 +-
 xen/arch/arm/Kconfig                         |   1 +
 xen/arch/arm/Makefile                        |   2 +-
 xen/arch/riscv/stubs.c                       |   2 +
 xen/arch/x86/Kconfig                         |   4 -
 xen/arch/x86/Makefile                        |   2 +-
 xen/arch/x86/acpi/cpu_idle.c                 |   2 +
 xen/arch/x86/acpi/cpufreq/hwp.c              |   6 +
 xen/arch/x86/acpi/cpufreq/powernow.c         |   4 +
 xen/arch/x86/hvm/Kconfig                     |   1 -
 xen/arch/x86/psr.c                           |  18 +
 xen/common/Kconfig                           |  29 +-
 xen/common/Makefile                          |   2 +-
 xen/common/page_alloc.c                      |  55 +-
 xen/common/perfc.c                           |   2 +
 xen/common/sched/arinc653.c                  |   6 +
 xen/common/sched/core.c                      |   4 +
 xen/common/sched/cpupool.c                   |   8 +
 xen/common/sched/credit.c                    |   4 +
 xen/common/sched/credit2.c                   |   4 +
 xen/common/sched/private.h                   |   4 +
 xen/common/spinlock.c                        |   2 +
 xen/common/sysctl.c                          |   7 +-
 xen/drivers/acpi/Makefile                    |   3 +-
 xen/drivers/acpi/pm_op.c                     | 409 ++++++++++++++
 xen/drivers/acpi/pmstat.c                    | 559 ++++++-------------
 xen/drivers/char/console.c                   |   2 +
 xen/drivers/cpufreq/cpufreq.c                |  31 +
 xen/drivers/cpufreq/cpufreq_misc_governors.c |   2 +
 xen/drivers/cpufreq/cpufreq_ondemand.c       |   2 +
 xen/drivers/cpufreq/utility.c                | 203 -------
 xen/drivers/video/Kconfig                    |   4 +-
 xen/include/acpi/cpufreq/cpufreq.h           |   5 -
 xen/include/acpi/cpufreq/processor_perf.h    |  14 +-
 xen/include/hypercall-defs.c                 |   8 +-
 xen/include/xen/mm.h                         |   1 -
 xen/include/xsm/xsm.h                        |  18 +
 xen/xsm/dummy.c                              |   6 +
 xen/xsm/flask/hooks.c                        |  14 +
 39 files changed, 804 insertions(+), 648 deletions(-)
 create mode 100644 xen/drivers/acpi/pm_op.c

-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , Penny Zheng , Andrew Cooper
	, Anthony PERARD ,
	Michal Orzel , Jan Beulich , "Julien
 Grall" , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Stefano Stabellini , "Daniel
 P. Smith" 
Subject: [PATCH v3 04/20] xen/sysctl: wrap around XEN_SYSCTL_readconsole
Date: Mon, 21 Apr 2025 15:37:07 +0800
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The following functions is to deal with XEN_SYSCTL_readconsole sub-op, and
shall be wrapped:
- xsm_readconsole
- read_console_ring

Signed-off-by: Penny Zheng 
Reviewed-by: Stefano Stabellini 
---
v2 -> v3:
- move #endif up ahead of the blank line
---
 xen/common/sysctl.c        | 2 ++
 xen/drivers/char/console.c | 2 ++
 xen/include/xsm/xsm.h      | 4 ++++
 xen/xsm/dummy.c            | 2 +-
 xen/xsm/flask/hooks.c      | 4 ++--
 5 files changed, 11 insertions(+), 3 deletions(-)

diff --git a/xen/common/sysctl.c b/xen/common/sysctl.c
index c2d99ae12e..814f153a23 100644
--- a/xen/common/sysctl.c
+++ b/xen/common/sysctl.c
@@ -58,6 +58,7 @@ long do_sysctl(XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)
 
     switch ( op->cmd )
     {
+#ifdef CONFIG_SYSCTL
     case XEN_SYSCTL_readconsole:
         ret = xsm_readconsole(XSM_HOOK, op->u.readconsole.clear);
         if ( ret )
@@ -65,6 +66,7 @@ long do_sysctl(XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)
 
         ret = read_console_ring(&op->u.readconsole);
         break;
+#endif /* CONFIG_SYSCTL */
 
     case XEN_SYSCTL_tbuf_op:
         ret = tb_control(&op->u.tbuf_op);
diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c
index c3150fbdb7..64f7e146a7 100644
--- a/xen/drivers/char/console.c
+++ b/xen/drivers/char/console.c
@@ -336,6 +336,7 @@ static void conring_puts(const char *str, size_t len)
         conringc = conringp - conring_size;
 }
 
+#ifdef CONFIG_SYSCTL
 long read_console_ring(struct xen_sysctl_readconsole *op)
 {
     XEN_GUEST_HANDLE_PARAM(char) str;
@@ -378,6 +379,7 @@ long read_console_ring(struct xen_sysctl_readconsole *op)
 
     return 0;
 }
+#endif /* CONFIG_SYSCTL */
 
 
 /*
diff --git a/xen/include/xsm/xsm.h b/xen/include/xsm/xsm.h
index 22e2429f52..042a99449f 100644
--- a/xen/include/xsm/xsm.h
+++ b/xen/include/xsm/xsm.h
@@ -270,7 +270,11 @@ static inline int xsm_sysctl(xsm_default_t def, int cmd)
 
 static inline int xsm_readconsole(xsm_default_t def, uint32_t clear)
 {
+#ifdef CONFIG_SYSCTL
     return alternative_call(xsm_ops.readconsole, clear);
+#else
+    return -EOPNOTSUPP;
+#endif
 }
 
 static inline int xsm_evtchn_unbound(
diff --git a/xen/xsm/dummy.c b/xen/xsm/dummy.c
index 93a0665ecc..cd0e844fcf 100644
--- a/xen/xsm/dummy.c
+++ b/xen/xsm/dummy.c
@@ -24,8 +24,8 @@ static const struct xsm_ops __initconst_cf_clobber dummy_ops = {
     .domctl                        = xsm_domctl,
 #ifdef CONFIG_SYSCTL
     .sysctl                        = xsm_sysctl,
-#endif
     .readconsole                   = xsm_readconsole,
+#endif
 
     .evtchn_unbound                = xsm_evtchn_unbound,
     .evtchn_interdomain            = xsm_evtchn_interdomain,
diff --git a/xen/xsm/flask/hooks.c b/xen/xsm/flask/hooks.c
index 3a43e5a1d6..df7e10775b 100644
--- a/xen/xsm/flask/hooks.c
+++ b/xen/xsm/flask/hooks.c
@@ -934,7 +934,6 @@ static int cf_check flask_sysctl(int cmd)
         return avc_unknown_permission("sysctl", cmd);
     }
 }
-#endif /* CONFIG_SYSCTL */
 
 static int cf_check flask_readconsole(uint32_t clear)
 {
@@ -945,6 +944,7 @@ static int cf_check flask_readconsole(uint32_t clear)
 
     return domain_has_xen(current->domain, perms);
 }
+#endif /* CONFIG_SYSCTL */
 
 static inline uint32_t resource_to_perm(uint8_t access)
 {
@@ -1888,8 +1888,8 @@ static const struct xsm_ops __initconst_cf_clobber flask_ops = {
     .domctl = flask_domctl,
 #ifdef CONFIG_SYSCTL
     .sysctl = flask_sysctl,
-#endif
     .readconsole = flask_readconsole,
+#endif
 
     .evtchn_unbound = flask_evtchn_unbound,
     .evtchn_interdomain = flask_evtchn_interdomain,
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , Penny Zheng , "Daniel P. Smith"
	, Stefano Stabellini 
Subject: [PATCH v3 03/20] xen/xsm: wrap around xsm_sysctl with CONFIG_SYSCTL
Date: Mon, 21 Apr 2025 15:37:06 +0800
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As function xsm_sysctl() is solely invoked in sysctl.c, we need to
wrap around it with CONFIG_SYSCTL

Signed-off-by: Penny Zheng 
Reviewed-by: Stefano Stabellini 
---
 xen/include/xsm/xsm.h | 4 ++++
 xen/xsm/dummy.c       | 2 ++
 xen/xsm/flask/hooks.c | 4 ++++
 3 files changed, 10 insertions(+)

diff --git a/xen/include/xsm/xsm.h b/xen/include/xsm/xsm.h
index 24acc16125..22e2429f52 100644
--- a/xen/include/xsm/xsm.h
+++ b/xen/include/xsm/xsm.h
@@ -261,7 +261,11 @@ static inline int xsm_domctl(xsm_default_t def, struct domain *d,
 
 static inline int xsm_sysctl(xsm_default_t def, int cmd)
 {
+#ifdef CONFIG_SYSCTL
     return alternative_call(xsm_ops.sysctl, cmd);
+#else
+    return -EOPNOTSUPP;
+#endif
 }
 
 static inline int xsm_readconsole(xsm_default_t def, uint32_t clear)
diff --git a/xen/xsm/dummy.c b/xen/xsm/dummy.c
index 93fbfc43cc..93a0665ecc 100644
--- a/xen/xsm/dummy.c
+++ b/xen/xsm/dummy.c
@@ -22,7 +22,9 @@ static const struct xsm_ops __initconst_cf_clobber dummy_ops = {
     .sysctl_scheduler_op           = xsm_sysctl_scheduler_op,
     .set_target                    = xsm_set_target,
     .domctl                        = xsm_domctl,
+#ifdef CONFIG_SYSCTL
     .sysctl                        = xsm_sysctl,
+#endif
     .readconsole                   = xsm_readconsole,
 
     .evtchn_unbound                = xsm_evtchn_unbound,
diff --git a/xen/xsm/flask/hooks.c b/xen/xsm/flask/hooks.c
index 6a53487ea4..3a43e5a1d6 100644
--- a/xen/xsm/flask/hooks.c
+++ b/xen/xsm/flask/hooks.c
@@ -856,6 +856,7 @@ static int cf_check flask_domctl(struct domain *d, unsigned int cmd,
     }
 }
 
+#ifdef CONFIG_SYSCTL
 static int cf_check flask_sysctl(int cmd)
 {
     switch ( cmd )
@@ -933,6 +934,7 @@ static int cf_check flask_sysctl(int cmd)
         return avc_unknown_permission("sysctl", cmd);
     }
 }
+#endif /* CONFIG_SYSCTL */
 
 static int cf_check flask_readconsole(uint32_t clear)
 {
@@ -1884,7 +1886,9 @@ static const struct xsm_ops __initconst_cf_clobber flask_ops = {
     .sysctl_scheduler_op = flask_sysctl_scheduler_op,
     .set_target = flask_set_target,
     .domctl = flask_domctl,
+#ifdef CONFIG_SYSCTL
     .sysctl = flask_sysctl,
+#endif
     .readconsole = flask_readconsole,
 
     .evtchn_unbound = flask_evtchn_unbound,
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , Penny Zheng , Andrew Cooper
	, Anthony PERARD ,
	Michal Orzel , Jan Beulich , "Julien
 Grall" , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Stefano Stabellini 
Subject: [PATCH v3 05/20] xen/sysctl: make CONFIG_TRACEBUFFER depend on CONFIG_SYSCTL
Date: Mon, 21 Apr 2025 15:37:08 +0800
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Users could only access trace buffers via hypercal XEN_SYSCTL_tbuf_op,
so this commit makes CONFIG_TRACEBUFFER depend on CONFIG_SYSCTL

Signed-off-by: Penny Zheng 
Reviewed-by: Stefano Stabellini 
---
 xen/common/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/xen/common/Kconfig b/xen/common/Kconfig
index d89e9ede77..9cccc37232 100644
--- a/xen/common/Kconfig
+++ b/xen/common/Kconfig
@@ -549,6 +549,7 @@ config DTB_FILE
 config TRACEBUFFER
 	bool "Enable tracing infrastructure" if EXPERT
 	default y
+	depends on SYSCTL
 	help
 	  Enable tracing infrastructure and pre-defined tracepoints within Xen.
 	  This will allow live information about Xen's execution and performance
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , Penny Zheng , Dario Faggioli
	, Juergen Gross , George Dunlap
	, Andrew Cooper , "Anthony
 PERARD" , Michal Orzel ,
	"Jan Beulich" , Julien Grall ,
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 Stabellini" 
Subject: [PATCH v3 06/20] xen/sysctl: wrap around XEN_SYSCTL_sched_id
Date: Mon, 21 Apr 2025 15:37:09 +0800
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The following function shall be wrapped:
- scheduler_id

Signed-off-by: Penny Zheng 
Reviewed-by: Stefano Stabellini 
---
v2 -> v3:
- move #endif up ahead of the blank line
---
 xen/common/sched/core.c | 2 ++
 xen/common/sysctl.c     | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/xen/common/sched/core.c b/xen/common/sched/core.c
index 9043414290..13fdf57e57 100644
--- a/xen/common/sched/core.c
+++ b/xen/common/sched/core.c
@@ -2069,11 +2069,13 @@ long do_set_timer_op(s_time_t timeout)
     return 0;
 }
 
+#ifdef CONFIG_SYSCTL
 /* scheduler_id - fetch ID of current scheduler */
 int scheduler_id(void)
 {
     return operations.sched_id;
 }
+#endif
 
 /* Adjust scheduling parameter for a given domain. */
 long sched_adjust(struct domain *d, struct xen_domctl_scheduler_op *op)
diff --git a/xen/common/sysctl.c b/xen/common/sysctl.c
index 814f153a23..b644347b40 100644
--- a/xen/common/sysctl.c
+++ b/xen/common/sysctl.c
@@ -72,9 +72,11 @@ long do_sysctl(XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)
         ret = tb_control(&op->u.tbuf_op);
         break;
 
+#ifdef CONFIG_SYSCTL
     case XEN_SYSCTL_sched_id:
         op->u.sched_id.sched_id = scheduler_id();
         break;
+#endif /* CONFIG_SYSCTL */
 
     case XEN_SYSCTL_getdomaininfolist:
     { 
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , Penny Zheng , Andrew Cooper
	, Anthony PERARD ,
	Michal Orzel , Jan Beulich , "Julien
 Grall" , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Stefano Stabellini 
Subject: [PATCH v3 07/20] xen/sysctl: wrap around XEN_SYSCTL_perfc_op
Date: Mon, 21 Apr 2025 15:37:10 +0800
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perfc_control() and perfc_copy_info() are responsible for providing control
of perf counters via XEN_SYSCTL_perfc_op in DOM0, so they both shall
be wrapped.

Signed-off-by: Penny Zheng 
Reviewed-by: Stefano Stabellini 
---
 xen/common/perfc.c  | 2 ++
 xen/common/sysctl.c | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/xen/common/perfc.c b/xen/common/perfc.c
index 8302b7cf6d..0f3b89af2c 100644
--- a/xen/common/perfc.c
+++ b/xen/common/perfc.c
@@ -149,6 +149,7 @@ void cf_check perfc_reset(unsigned char key)
     }
 }
 
+#ifdef CONFIG_SYSCTL
 static struct xen_sysctl_perfc_desc perfc_d[NR_PERFCTRS];
 static xen_sysctl_perfc_val_t *perfc_vals;
 static unsigned int      perfc_nbr_vals;
@@ -265,6 +266,7 @@ int perfc_control(struct xen_sysctl_perfc_op *pc)
 
     return rc;
 }
+#endif /* CONFIG_SYSCTL */
 
 /*
  * Local variables:
diff --git a/xen/common/sysctl.c b/xen/common/sysctl.c
index b644347b40..608e159571 100644
--- a/xen/common/sysctl.c
+++ b/xen/common/sysctl.c
@@ -117,11 +117,13 @@ long do_sysctl(XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)
     }
     break;
 
+#ifdef CONFIG_SYSCTL
 #ifdef CONFIG_PERF_COUNTERS
     case XEN_SYSCTL_perfc_op:
         ret = perfc_control(&op->u.perfc_op);
         break;
 #endif
+#endif /* CONFIG_SYSCTL */
 
 #ifdef CONFIG_DEBUG_LOCK_PROFILE
     case XEN_SYSCTL_lockprof_op:
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , Penny Zheng , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" , Andrew Cooper
	, Anthony PERARD , "Jan
 Beulich" , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Alistair Francis , "Bob
 Eshleman" , Connor Davis ,
	Oleksii Kurochko 
Subject: [PATCH v3 16/20] xen/sysctl: wrap around XEN_SYSCTL_physinfo
Date: Mon, 21 Apr 2025 15:37:19 +0800
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The following functions are only used to deal with XEN_SYSCTL_physinfo,
then they shall be wrapped:
- arch_do_physinfo
- get_outstanding_claims

Signed-off-by: Penny Zheng 
Reviewed-by: Stefano Stabellini 
Acked-by: Jan Beulich 
---
v1 -> v2:
- no need to wrap declaration
- add transient #ifdef in sysctl.c for correct compilation
---
v2 -> v3:
- move #endif up ahead of the blank line
---
 xen/arch/arm/sysctl.c   | 2 ++
 xen/arch/riscv/stubs.c  | 2 ++
 xen/arch/x86/sysctl.c   | 2 ++
 xen/common/page_alloc.c | 2 ++
 xen/common/sysctl.c     | 2 +-
 5 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/xen/arch/arm/sysctl.c b/xen/arch/arm/sysctl.c
index 32cab4feff..2d350b700a 100644
--- a/xen/arch/arm/sysctl.c
+++ b/xen/arch/arm/sysctl.c
@@ -15,6 +15,7 @@
 #include 
 #include 
 
+#ifdef CONFIG_SYSCTL
 void arch_do_physinfo(struct xen_sysctl_physinfo *pi)
 {
     pi->capabilities |= XEN_SYSCTL_PHYSCAP_hvm | XEN_SYSCTL_PHYSCAP_hap;
@@ -22,6 +23,7 @@ void arch_do_physinfo(struct xen_sysctl_physinfo *pi)
     pi->arch_capabilities |= MASK_INSR(sve_encode_vl(get_sys_vl_len()),
                                        XEN_SYSCTL_PHYSCAP_ARM_SVE_MASK);
 }
+#endif
 
 long arch_do_sysctl(struct xen_sysctl *sysctl,
                     XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)
diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c
index 83416d3350..295456d0c8 100644
--- a/xen/arch/riscv/stubs.c
+++ b/xen/arch/riscv/stubs.c
@@ -321,10 +321,12 @@ long arch_do_sysctl(struct xen_sysctl *sysctl,
     BUG_ON("unimplemented");
 }
 
+#ifdef CONFIG_SYSCTL
 void arch_do_physinfo(struct xen_sysctl_physinfo *pi)
 {
     BUG_ON("unimplemented");
 }
+#endif /* CONFIG_SYSCTL */
 
 /* p2m.c */
 
diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c
index 1b04947516..f64addbe2b 100644
--- a/xen/arch/x86/sysctl.c
+++ b/xen/arch/x86/sysctl.c
@@ -91,6 +91,7 @@ static long cf_check smt_up_down_helper(void *data)
     return ret;
 }
 
+#ifdef CONFIG_SYSCTL
 void arch_do_physinfo(struct xen_sysctl_physinfo *pi)
 {
     memcpy(pi->hw_cap, boot_cpu_data.x86_capability,
@@ -104,6 +105,7 @@ void arch_do_physinfo(struct xen_sysctl_physinfo *pi)
     if ( IS_ENABLED(CONFIG_SHADOW_PAGING) )
         pi->capabilities |= XEN_SYSCTL_PHYSCAP_shadow;
 }
+#endif /* CONFIG_SYSCTL */
 
 long arch_do_sysctl(
     struct xen_sysctl *sysctl, XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)
diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c
index 5803a1ef4e..36424a9245 100644
--- a/xen/common/page_alloc.c
+++ b/xen/common/page_alloc.c
@@ -601,6 +601,7 @@ out:
     return ret;
 }
 
+#ifdef CONFIG_SYSCTL
 void get_outstanding_claims(uint64_t *free_pages, uint64_t *outstanding_pages)
 {
     spin_lock(&heap_lock);
@@ -608,6 +609,7 @@ void get_outstanding_claims(uint64_t *free_pages, uint64_t *outstanding_pages)
     *free_pages = avail_heap_pages(MEMZONE_XEN + 1, NR_ZONES - 1, -1);
     spin_unlock(&heap_lock);
 }
+#endif /* CONFIG_SYSCTL */
 
 static bool __read_mostly first_node_initialised;
 #ifndef CONFIG_SEPARATE_XENHEAP
diff --git a/xen/common/sysctl.c b/xen/common/sysctl.c
index 200e0a0488..b4feb07e60 100644
--- a/xen/common/sysctl.c
+++ b/xen/common/sysctl.c
@@ -260,7 +260,6 @@ long do_sysctl(XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)
     case XEN_SYSCTL_scheduler_op:
         ret = sched_adjust_global(&op->u.scheduler_op);
         break;
-#endif /* CONFIG_SYSCTL */
 
     case XEN_SYSCTL_physinfo:
     {
@@ -303,6 +302,7 @@ long do_sysctl(XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)
             ret = -EFAULT;
     }
     break;
+#endif /* CONFIG_SYSCTL */
 
     case XEN_SYSCTL_numainfo:
     {
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , Penny Zheng , Andrew Cooper
	, Anthony PERARD ,
	Michal Orzel , Jan Beulich , "Julien
 Grall" , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Stefano Stabellini 
Subject: [PATCH v3 18/20] xen/sysctl: make CONFIG_LIVEPATCH depend on CONFIG_SYSCTL
Date: Mon, 21 Apr 2025 15:37:21 +0800
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LIVEPATCH mechanism relies on LIVEPATCH_SYSCTL hypercall, so CONFIG_LIVEPATCH
shall depend on CONFIG_SYSCTL

Signed-off-by: Penny Zheng 
Reviewed-by: Stefano Stabellini 
---
v1 -> v2:
- commit message refactor
---
 xen/common/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/common/Kconfig b/xen/common/Kconfig
index d8e242eebc..db6f75fae5 100644
--- a/xen/common/Kconfig
+++ b/xen/common/Kconfig
@@ -457,7 +457,7 @@ config CRYPTO
 config LIVEPATCH
 	bool "Live patching support"
 	default X86
-	depends on "$(XEN_HAS_BUILD_ID)" = "y"
+	depends on "$(XEN_HAS_BUILD_ID)" = "y" && SYSCTL
 	select CC_SPLIT_SECTIONS
 	help
 	  Allows a running Xen hypervisor to be dynamically patched using
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , Stefano Stabellini ,
	Andrew Cooper , Anthony PERARD
	, Michal Orzel , Jan Beulich
	, Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , "Stefano
 Stabellini" , Sergiy Kibrik ,
	Penny Zheng 
Subject: [PATCH v3 20/20] xen/sysctl: wrap around sysctl hypercall
Date: Mon, 21 Apr 2025 15:37:23 +0800
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From: Stefano Stabellini 

Wrap sysctl hypercall def and sysctl.o with CONFIG_SYSCTL, and since
PV_SHIM_EXCLUSIVE needs sorting as a prereq in the future, we move
them out of PV_SHIM_EXCLUSIVE condition at the same time.

We also need to remove all transient "#ifdef CONFIG_SYSCTL"-s in sysctl.c.

Signed-off-by: Stefano Stabellini 
Signed-off-by: Sergiy Kibrik 
Signed-off-by: Penny Zheng 
---
v1 -> v2:
- remove all transient "#ifdef CONFIG_SYSCTL"-s in sysctl.c
---
v2 -> v3:
- move out of CONFIG_PV_SHIM_EXCLUSIVE condition
---
 xen/common/Makefile          |  2 +-
 xen/common/sysctl.c          | 12 ------------
 xen/include/hypercall-defs.c |  8 ++++++--
 3 files changed, 7 insertions(+), 15 deletions(-)

diff --git a/xen/common/Makefile b/xen/common/Makefile
index 98f0873056..15ab048244 100644
--- a/xen/common/Makefile
+++ b/xen/common/Makefile
@@ -49,6 +49,7 @@ obj-y += spinlock.o
 obj-$(CONFIG_STACK_PROTECTOR) += stack-protector.o
 obj-y += stop_machine.o
 obj-y += symbols.o
+obj-$(CONFIG_SYSCTL) += sysctl.o
 obj-y += tasklet.o
 obj-y += time.o
 obj-y += timer.o
@@ -70,7 +71,6 @@ obj-$(CONFIG_COMPAT) += $(addprefix compat/,domain.o memory.o multicall.o xlat.o
 ifneq ($(CONFIG_PV_SHIM_EXCLUSIVE),y)
 obj-y += domctl.o
 obj-$(CONFIG_VM_EVENT) += monitor.o
-obj-y += sysctl.o
 endif
 
 extra-y := symbols-dummy.o
diff --git a/xen/common/sysctl.c b/xen/common/sysctl.c
index 85a1adacdd..08174a924d 100644
--- a/xen/common/sysctl.c
+++ b/xen/common/sysctl.c
@@ -58,7 +58,6 @@ long do_sysctl(XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)
 
     switch ( op->cmd )
     {
-#ifdef CONFIG_SYSCTL
     case XEN_SYSCTL_readconsole:
         ret = xsm_readconsole(XSM_HOOK, op->u.readconsole.clear);
         if ( ret )
@@ -66,17 +65,14 @@ long do_sysctl(XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)
 
         ret = read_console_ring(&op->u.readconsole);
         break;
-#endif /* CONFIG_SYSCTL */
 
     case XEN_SYSCTL_tbuf_op:
         ret = tb_control(&op->u.tbuf_op);
         break;
 
-#ifdef CONFIG_SYSCTL
     case XEN_SYSCTL_sched_id:
         op->u.sched_id.sched_id = scheduler_id();
         break;
-#endif /* CONFIG_SYSCTL */
 
     case XEN_SYSCTL_getdomaininfolist:
     { 
@@ -117,7 +113,6 @@ long do_sysctl(XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)
     }
     break;
 
-#ifdef CONFIG_SYSCTL
 #ifdef CONFIG_PERF_COUNTERS
     case XEN_SYSCTL_perfc_op:
         ret = perfc_control(&op->u.perfc_op);
@@ -129,7 +124,6 @@ long do_sysctl(XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)
         ret = spinlock_profile_control(&op->u.lockprof_op);
         break;
 #endif
-#endif /* CONFIG_SYSCTL */
 
     case XEN_SYSCTL_debug_keys:
     {
@@ -191,7 +185,6 @@ long do_sysctl(XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)
         break;
 #endif /* CONFIG_PM_OP */
 
-#ifdef CONFIG_SYSCTL
     case XEN_SYSCTL_page_offline_op:
     {
         uint32_t *status, *ptr;
@@ -302,7 +295,6 @@ long do_sysctl(XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)
             ret = -EFAULT;
     }
     break;
-#endif /* CONFIG_SYSCTL */
 
     case XEN_SYSCTL_numainfo:
     {
@@ -493,11 +485,7 @@ long do_sysctl(XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)
         break;
 
     default:
-#ifdef CONFIG_SYSCTL
         ret = arch_do_sysctl(op, u_sysctl);
-#else
-        ret = -EOPNOTSUPP;
-#endif
         copyback = 0;
         break;
     }
diff --git a/xen/include/hypercall-defs.c b/xen/include/hypercall-defs.c
index 7720a29ade..c1081d87a2 100644
--- a/xen/include/hypercall-defs.c
+++ b/xen/include/hypercall-defs.c
@@ -194,8 +194,10 @@ kexec_op(unsigned long op, void *uarg)
 #ifdef CONFIG_IOREQ_SERVER
 dm_op(domid_t domid, unsigned int nr_bufs, xen_dm_op_buf_t *bufs)
 #endif
-#ifndef CONFIG_PV_SHIM_EXCLUSIVE
+#ifdef CONFIG_SYSCTL
 sysctl(xen_sysctl_t *u_sysctl)
+#endif
+#ifndef CONFIG_PV_SHIM_EXCLUSIVE
 domctl(xen_domctl_t *u_domctl)
 paging_domctl_cont(xen_domctl_t *u_domctl)
 platform_op(xen_platform_op_t *u_xenpf_op)
@@ -273,8 +275,10 @@ physdev_op                         compat   do       hvm      hvm      do_arm
 #ifdef CONFIG_HVM
 hvm_op                             do       do       do       do       do
 #endif
-#ifndef CONFIG_PV_SHIM_EXCLUSIVE
+#ifdef CONFIG_SYSCTL
 sysctl                             do       do       do       do       do
+#endif
+#ifndef CONFIG_PV_SHIM_EXCLUSIVE
 domctl                             do       do       do       do       do
 #endif
 #ifdef CONFIG_KEXEC
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , Penny Zheng , Jan Beulich
	, Stefano Stabellini 
Subject: [PATCH v3 09/20] xen/pmstat: consolidate code into pmstat.c
Date: Mon, 21 Apr 2025 15:37:12 +0800
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We move the following functions into drivers/acpi/pmstat.c, as they
are all designed for performance statistic:
- cpufreq_residency_update
- cpufreq_statistic_reset
- cpufreq_statistic_update
- cpufreq_statistic_init
- cpufreq_statistic_exit
Consequently, variable "cpufreq_statistic_data" and "cpufreq_statistic_lock"
shall become static.
We also move out acpi_set_pdc_bits(), as it is the handler for sub-hypercall
XEN_PM_PDC, and shall stay with the other handlers together in
drivers/cpufreq/cpufreq.c.

Various style corrections shall be applied at the same time while moving these
functions, including:
- brace for if() and for() shall live at a seperate line
- add extra space before and after bracket of if() and for()
- use array notation
- convert uint32_t into unsigned int
- convert u32 into uint32_t

Signed-off-by: Penny Zheng 
Reviewed-by: Stefano Stabellini 
---
v2 -> v3:
- brace for if() and for() shall live at a seperate line
- use array notation
- convert uint32_t into unsigned int
---
 xen/drivers/acpi/pmstat.c                 | 202 ++++++++++++++++++----
 xen/drivers/cpufreq/cpufreq.c             |  31 ++++
 xen/drivers/cpufreq/utility.c             | 162 -----------------
 xen/include/acpi/cpufreq/cpufreq.h        |   2 -
 xen/include/acpi/cpufreq/processor_perf.h |   4 -
 5 files changed, 201 insertions(+), 200 deletions(-)

diff --git a/xen/drivers/acpi/pmstat.c b/xen/drivers/acpi/pmstat.c
index c51b9ca358..abfdc45cc2 100644
--- a/xen/drivers/acpi/pmstat.c
+++ b/xen/drivers/acpi/pmstat.c
@@ -41,7 +41,176 @@
 #include 
 #include 
 
-DEFINE_PER_CPU_READ_MOSTLY(struct pm_px *, cpufreq_statistic_data);
+static DEFINE_PER_CPU_READ_MOSTLY(struct pm_px *, cpufreq_statistic_data);
+
+static DEFINE_PER_CPU(spinlock_t, cpufreq_statistic_lock);
+
+/*********************************************************************
+ *                    Px STATISTIC INFO                              *
+ *********************************************************************/
+
+static void cpufreq_residency_update(unsigned int cpu, uint8_t state)
+{
+    uint64_t now, total_idle_ns;
+    int64_t delta;
+    struct pm_px *pxpt = per_cpu(cpufreq_statistic_data, cpu);
+
+    total_idle_ns = get_cpu_idle_time(cpu);
+    now = NOW();
+
+    delta = (now - pxpt->prev_state_wall) -
+            (total_idle_ns - pxpt->prev_idle_wall);
+
+    if ( likely(delta >= 0) )
+        pxpt->u.pt[state].residency += delta;
+
+    pxpt->prev_state_wall = now;
+    pxpt->prev_idle_wall = total_idle_ns;
+}
+
+void cpufreq_statistic_update(unsigned int cpu, uint8_t from, uint8_t to)
+{
+    struct pm_px *pxpt;
+    const struct processor_pminfo *pmpt = processor_pminfo[cpu];
+    spinlock_t *cpufreq_statistic_lock =
+               &per_cpu(cpufreq_statistic_lock, cpu);
+
+    spin_lock(cpufreq_statistic_lock);
+
+    pxpt = per_cpu(cpufreq_statistic_data, cpu);
+    if ( !pxpt || !pmpt )
+    {
+        spin_unlock(cpufreq_statistic_lock);
+        return;
+    }
+
+    pxpt->u.last = from;
+    pxpt->u.cur = to;
+    pxpt->u.pt[to].count++;
+
+    cpufreq_residency_update(cpu, from);
+
+    pxpt->u.trans_pt[from * pmpt->perf.state_count + to]++;
+
+    spin_unlock(cpufreq_statistic_lock);
+}
+
+int cpufreq_statistic_init(unsigned int cpu)
+{
+    unsigned int i, count;
+    struct pm_px *pxpt;
+    const struct processor_pminfo *pmpt = processor_pminfo[cpu];
+    spinlock_t *cpufreq_statistic_lock = &per_cpu(cpufreq_statistic_lock, cpu);
+
+    spin_lock_init(cpufreq_statistic_lock);
+
+    if ( !pmpt )
+        return -EINVAL;
+
+    spin_lock(cpufreq_statistic_lock);
+
+    pxpt = per_cpu(cpufreq_statistic_data, cpu);
+    if ( pxpt )
+    {
+        spin_unlock(cpufreq_statistic_lock);
+        return 0;
+    }
+
+    count = pmpt->perf.state_count;
+
+    pxpt = xzalloc(struct pm_px);
+    if ( !pxpt )
+    {
+        spin_unlock(cpufreq_statistic_lock);
+        return -ENOMEM;
+    }
+    per_cpu(cpufreq_statistic_data, cpu) = pxpt;
+
+    pxpt->u.trans_pt = xzalloc_array(uint64_t, count * count);
+    if ( !pxpt->u.trans_pt )
+    {
+        xfree(pxpt);
+        spin_unlock(cpufreq_statistic_lock);
+        return -ENOMEM;
+    }
+
+    pxpt->u.pt = xzalloc_array(struct pm_px_val, count);
+    if ( !pxpt->u.pt )
+    {
+        xfree(pxpt->u.trans_pt);
+        xfree(pxpt);
+        spin_unlock(cpufreq_statistic_lock);
+        return -ENOMEM;
+    }
+
+    pxpt->u.total = pmpt->perf.state_count;
+    pxpt->u.usable = pmpt->perf.state_count - pmpt->perf.platform_limit;
+
+    for ( i = 0; i < pmpt->perf.state_count; i++ )
+        pxpt->u.pt[i].freq = pmpt->perf.states[i].core_frequency;
+
+    pxpt->prev_state_wall = NOW();
+    pxpt->prev_idle_wall = get_cpu_idle_time(cpu);
+
+    spin_unlock(cpufreq_statistic_lock);
+
+    return 0;
+}
+
+void cpufreq_statistic_exit(unsigned int cpu)
+{
+    struct pm_px *pxpt;
+    spinlock_t *cpufreq_statistic_lock = &per_cpu(cpufreq_statistic_lock, cpu);
+
+    spin_lock(cpufreq_statistic_lock);
+
+    pxpt = per_cpu(cpufreq_statistic_data, cpu);
+    if ( !pxpt )
+    {
+        spin_unlock(cpufreq_statistic_lock);
+        return;
+    }
+
+    xfree(pxpt->u.trans_pt);
+    xfree(pxpt->u.pt);
+    xfree(pxpt);
+    per_cpu(cpufreq_statistic_data, cpu) = NULL;
+
+    spin_unlock(cpufreq_statistic_lock);
+}
+
+static void cpufreq_statistic_reset(unsigned int cpu)
+{
+    unsigned int i, j, count;
+    struct pm_px *pxpt;
+    const struct processor_pminfo *pmpt = processor_pminfo[cpu];
+    spinlock_t *cpufreq_statistic_lock = &per_cpu(cpufreq_statistic_lock, cpu);
+
+    spin_lock(cpufreq_statistic_lock);
+
+    pxpt = per_cpu(cpufreq_statistic_data, cpu);
+    if ( !pmpt || !pxpt || !pxpt->u.pt || !pxpt->u.trans_pt )
+    {
+        spin_unlock(cpufreq_statistic_lock);
+        return;
+    }
+
+    count = pmpt->perf.state_count;
+
+    for ( i = 0; i < count; i++ )
+    {
+        pxpt->u.pt[i].residency = 0;
+        pxpt->u.pt[i].count = 0;
+
+        for ( j = 0; j < count; j++ )
+            pxpt->u.trans_pt[i * count + j] = 0;
+    }
+
+    pxpt->prev_state_wall = NOW();
+    pxpt->prev_idle_wall = get_cpu_idle_time(cpu);
+
+    spin_unlock(cpufreq_statistic_lock);
+}
 
 /*
  * Get PM statistic info
@@ -518,34 +687,3 @@ int do_pm_op(struct xen_sysctl_pm_op *op)
 
     return ret;
 }
-
-int acpi_set_pdc_bits(uint32_t acpi_id, XEN_GUEST_HANDLE(uint32) pdc)
-{
-    u32 bits[3];
-    int ret;
-
-    if ( copy_from_guest(bits, pdc, 2) )
-        ret = -EFAULT;
-    else if ( bits[0] != ACPI_PDC_REVISION_ID || !bits[1] )
-        ret = -EINVAL;
-    else if ( copy_from_guest_offset(bits + 2, pdc, 2, 1) )
-        ret = -EFAULT;
-    else
-    {
-        u32 mask = 0;
-
-        if ( xen_processor_pmbits & XEN_PROCESSOR_PM_CX )
-            mask |= ACPI_PDC_C_MASK | ACPI_PDC_SMP_C1PT;
-        if ( xen_processor_pmbits & XEN_PROCESSOR_PM_PX )
-            mask |= ACPI_PDC_P_MASK | ACPI_PDC_SMP_C1PT;
-        if ( xen_processor_pmbits & XEN_PROCESSOR_PM_TX )
-            mask |= ACPI_PDC_T_MASK | ACPI_PDC_SMP_C1PT;
-        bits[2] &= (ACPI_PDC_C_MASK | ACPI_PDC_P_MASK | ACPI_PDC_T_MASK |
-                    ACPI_PDC_SMP_C1PT) & ~mask;
-        ret = arch_acpi_set_pdc_bits(acpi_id, bits, mask);
-    }
-    if ( !ret && __copy_to_guest_offset(pdc, 2, bits + 2, 1) )
-        ret = -EFAULT;
-
-    return ret;
-}
diff --git a/xen/drivers/cpufreq/cpufreq.c b/xen/drivers/cpufreq/cpufreq.c
index 19e2992335..c2d777e0ec 100644
--- a/xen/drivers/cpufreq/cpufreq.c
+++ b/xen/drivers/cpufreq/cpufreq.c
@@ -588,6 +588,37 @@ out:
     return ret;
 }
 
+int acpi_set_pdc_bits(unsigned int acpi_id, XEN_GUEST_HANDLE(uint32) pdc)
+{
+    uint32_t bits[3];
+    int ret;
+
+    if ( copy_from_guest(bits, pdc, 2) )
+        ret = -EFAULT;
+    else if ( bits[0] != ACPI_PDC_REVISION_ID || !bits[1] )
+        ret = -EINVAL;
+    else if ( copy_from_guest_offset(bits + 2, pdc, 2, 1) )
+        ret = -EFAULT;
+    else
+    {
+        uint32_t mask = 0;
+
+        if ( xen_processor_pmbits & XEN_PROCESSOR_PM_CX )
+            mask |= ACPI_PDC_C_MASK | ACPI_PDC_SMP_C1PT;
+        if ( xen_processor_pmbits & XEN_PROCESSOR_PM_PX )
+            mask |= ACPI_PDC_P_MASK | ACPI_PDC_SMP_C1PT;
+        if ( xen_processor_pmbits & XEN_PROCESSOR_PM_TX )
+            mask |= ACPI_PDC_T_MASK | ACPI_PDC_SMP_C1PT;
+        bits[2] &= (ACPI_PDC_C_MASK | ACPI_PDC_P_MASK | ACPI_PDC_T_MASK |
+                    ACPI_PDC_SMP_C1PT) & ~mask;
+        ret = arch_acpi_set_pdc_bits(acpi_id, bits, mask);
+    }
+    if ( !ret && __copy_to_guest_offset(pdc, 2, bits + 2, 1) )
+        ret = -EFAULT;
+
+    return ret;
+}
+
 static void cpufreq_cmdline_common_para(struct cpufreq_policy *new_policy)
 {
     if (usr_max_freq)
diff --git a/xen/drivers/cpufreq/utility.c b/xen/drivers/cpufreq/utility.c
index e690a484f1..723045b240 100644
--- a/xen/drivers/cpufreq/utility.c
+++ b/xen/drivers/cpufreq/utility.c
@@ -35,168 +35,6 @@ struct cpufreq_driver __read_mostly cpufreq_driver;
 struct processor_pminfo *__read_mostly processor_pminfo[NR_CPUS];
 DEFINE_PER_CPU_READ_MOSTLY(struct cpufreq_policy *, cpufreq_cpu_policy);
 
-DEFINE_PER_CPU(spinlock_t, cpufreq_statistic_lock);
-
-/*********************************************************************
- *                    Px STATISTIC INFO                              *
- *********************************************************************/
-
-void cpufreq_residency_update(unsigned int cpu, uint8_t state)
-{
-    uint64_t now, total_idle_ns;
-    int64_t delta;
-    struct pm_px *pxpt = per_cpu(cpufreq_statistic_data, cpu);
-
-    total_idle_ns = get_cpu_idle_time(cpu);
-    now = NOW();
-
-    delta = (now - pxpt->prev_state_wall) - 
-            (total_idle_ns - pxpt->prev_idle_wall);
-
-    if ( likely(delta >= 0) )
-        pxpt->u.pt[state].residency += delta;
-
-    pxpt->prev_state_wall = now;
-    pxpt->prev_idle_wall = total_idle_ns;
-}
-
-void cpufreq_statistic_update(unsigned int cpu, uint8_t from, uint8_t to)
-{
-    struct pm_px *pxpt;
-    struct processor_pminfo *pmpt = processor_pminfo[cpu];
-    spinlock_t *cpufreq_statistic_lock = 
-               &per_cpu(cpufreq_statistic_lock, cpu);
-
-    spin_lock(cpufreq_statistic_lock);
-
-    pxpt = per_cpu(cpufreq_statistic_data, cpu);
-    if ( !pxpt || !pmpt ) {
-        spin_unlock(cpufreq_statistic_lock);
-        return;
-    }
-
-    pxpt->u.last = from;
-    pxpt->u.cur = to;
-    pxpt->u.pt[to].count++;
-
-    cpufreq_residency_update(cpu, from);
-
-    (*(pxpt->u.trans_pt + from * pmpt->perf.state_count + to))++;
-
-    spin_unlock(cpufreq_statistic_lock);
-}
-
-int cpufreq_statistic_init(unsigned int cpu)
-{
-    uint32_t i, count;
-    struct pm_px *pxpt;
-    const struct processor_pminfo *pmpt = processor_pminfo[cpu];
-    spinlock_t *cpufreq_statistic_lock = &per_cpu(cpufreq_statistic_lock, cpu);
-
-    spin_lock_init(cpufreq_statistic_lock);
-
-    if ( !pmpt )
-        return -EINVAL;
-
-    spin_lock(cpufreq_statistic_lock);
-
-    pxpt = per_cpu(cpufreq_statistic_data, cpu);
-    if ( pxpt ) {
-        spin_unlock(cpufreq_statistic_lock);
-        return 0;
-    }
-
-    count = pmpt->perf.state_count;
-
-    pxpt = xzalloc(struct pm_px);
-    if ( !pxpt ) {
-        spin_unlock(cpufreq_statistic_lock);
-        return -ENOMEM;
-    }
-    per_cpu(cpufreq_statistic_data, cpu) = pxpt;
-
-    pxpt->u.trans_pt = xzalloc_array(uint64_t, count * count);
-    if (!pxpt->u.trans_pt) {
-        xfree(pxpt);
-        spin_unlock(cpufreq_statistic_lock);
-        return -ENOMEM;
-    }
-
-    pxpt->u.pt = xzalloc_array(struct pm_px_val, count);
-    if (!pxpt->u.pt) {
-        xfree(pxpt->u.trans_pt);
-        xfree(pxpt);
-        spin_unlock(cpufreq_statistic_lock);
-        return -ENOMEM;
-    }
-
-    pxpt->u.total = pmpt->perf.state_count;
-    pxpt->u.usable = pmpt->perf.state_count - pmpt->perf.platform_limit;
-
-    for (i=0; i < pmpt->perf.state_count; i++)
-        pxpt->u.pt[i].freq = pmpt->perf.states[i].core_frequency;
-
-    pxpt->prev_state_wall = NOW();
-    pxpt->prev_idle_wall = get_cpu_idle_time(cpu);
-
-    spin_unlock(cpufreq_statistic_lock);
-
-    return 0;
-}
-
-void cpufreq_statistic_exit(unsigned int cpu)
-{
-    struct pm_px *pxpt;
-    spinlock_t *cpufreq_statistic_lock = &per_cpu(cpufreq_statistic_lock, cpu);
-
-    spin_lock(cpufreq_statistic_lock);
-
-    pxpt = per_cpu(cpufreq_statistic_data, cpu);
-    if (!pxpt) {
-        spin_unlock(cpufreq_statistic_lock);
-        return;
-    }
-
-    xfree(pxpt->u.trans_pt);
-    xfree(pxpt->u.pt);
-    xfree(pxpt);
-    per_cpu(cpufreq_statistic_data, cpu) = NULL;
-
-    spin_unlock(cpufreq_statistic_lock);
-}
-
-void cpufreq_statistic_reset(unsigned int cpu)
-{
-    uint32_t i, j, count;
-    struct pm_px *pxpt;
-    const struct processor_pminfo *pmpt = processor_pminfo[cpu];
-    spinlock_t *cpufreq_statistic_lock = &per_cpu(cpufreq_statistic_lock, cpu);
-
-    spin_lock(cpufreq_statistic_lock);
-
-    pxpt = per_cpu(cpufreq_statistic_data, cpu);
-    if ( !pmpt || !pxpt || !pxpt->u.pt || !pxpt->u.trans_pt ) {
-        spin_unlock(cpufreq_statistic_lock);
-        return;
-    }
-
-    count = pmpt->perf.state_count;
-
-    for (i=0; i < count; i++) {
-        pxpt->u.pt[i].residency = 0;
-        pxpt->u.pt[i].count = 0;
-
-        for (j=0; j < count; j++)
-            *(pxpt->u.trans_pt + i*count + j) = 0;
-    }
-
-    pxpt->prev_state_wall = NOW();
-    pxpt->prev_idle_wall = get_cpu_idle_time(cpu);
-
-    spin_unlock(cpufreq_statistic_lock);
-}
-
-
 /*********************************************************************
  *                   FREQUENCY TABLE HELPERS                         *
  *********************************************************************/
diff --git a/xen/include/acpi/cpufreq/cpufreq.h b/xen/include/acpi/cpufreq/cpufreq.h
index a3c84143af..241117a9af 100644
--- a/xen/include/acpi/cpufreq/cpufreq.h
+++ b/xen/include/acpi/cpufreq/cpufreq.h
@@ -20,8 +20,6 @@
 
 #include "processor_perf.h"
 
-DECLARE_PER_CPU(spinlock_t, cpufreq_statistic_lock);
-
 extern bool cpufreq_verbose;
 
 enum cpufreq_xen_opt {
diff --git a/xen/include/acpi/cpufreq/processor_perf.h b/xen/include/acpi/cpufreq/processor_perf.h
index 301104e16f..6de43f8602 100644
--- a/xen/include/acpi/cpufreq/processor_perf.h
+++ b/xen/include/acpi/cpufreq/processor_perf.h
@@ -9,11 +9,9 @@
 
 unsigned int powernow_register_driver(void);
 unsigned int get_measured_perf(unsigned int cpu, unsigned int flag);
-void cpufreq_residency_update(unsigned int cpu, uint8_t state);
 void cpufreq_statistic_update(unsigned int cpu, uint8_t from, uint8_t to);
 int  cpufreq_statistic_init(unsigned int cpu);
 void cpufreq_statistic_exit(unsigned int cpu);
-void cpufreq_statistic_reset(unsigned int cpu);
 
 int  cpufreq_limit_change(unsigned int cpu);
 
@@ -56,7 +54,5 @@ struct pm_px {
     uint64_t prev_idle_wall;
 };
 
-DECLARE_PER_CPU(struct pm_px *, cpufreq_statistic_data);
-
 int cpufreq_cpu_init(unsigned int cpu);
 #endif /* __XEN_PROCESSOR_PM_H__ */
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , Penny Zheng , Andrew Cooper
	, Anthony PERARD ,
	Michal Orzel , Jan Beulich , "Julien
 Grall" , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Stefano Stabellini 
Subject: [PATCH v3 15/20] xen: make avail_domheap_pages() inlined into get_outstanding_claims()
Date: Mon, 21 Apr 2025 15:37:18 +0800
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Function avail_domheap_pages() is only invoked by get_outstanding_claims(),
so it could be inlined into get_outstanding_claims().
Move up avail_heap_pages() to avoid declaration before
get_outstanding_claims().

Signed-off-by: Penny Zheng 
Reviewed-by: Stefano Stabellini 
---
v1 -> v2:
- let avail_domheap_pages() being inlined into its sole caller
- move up avail_heap_pages()
---
v2 -> v3:
- change the title
---
 xen/common/page_alloc.c | 51 ++++++++++++++++++-----------------------
 xen/include/xen/mm.h    |  1 -
 2 files changed, 22 insertions(+), 30 deletions(-)

diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c
index cc2ad4423a..5803a1ef4e 100644
--- a/xen/common/page_alloc.c
+++ b/xen/common/page_alloc.c
@@ -488,6 +488,27 @@ static long total_avail_pages;
 static DEFINE_SPINLOCK(heap_lock);
 static long outstanding_claims; /* total outstanding claims by all domains */
 
+static unsigned long avail_heap_pages(
+    unsigned int zone_lo, unsigned int zone_hi, unsigned int node)
+{
+    unsigned int i, zone;
+    unsigned long free_pages = 0;
+
+    if ( zone_hi >= NR_ZONES )
+        zone_hi = NR_ZONES - 1;
+
+    for_each_online_node(i)
+    {
+        if ( !avail[i] )
+            continue;
+        for ( zone = zone_lo; zone <= zone_hi; zone++ )
+            if ( (node == -1) || (node == i) )
+                free_pages += avail[i][zone];
+    }
+
+    return free_pages;
+}
+
 unsigned long domain_adjust_tot_pages(struct domain *d, long pages)
 {
     ASSERT(rspin_is_locked(&d->page_alloc_lock));
@@ -584,7 +605,7 @@ void get_outstanding_claims(uint64_t *free_pages, uint64_t *outstanding_pages)
 {
     spin_lock(&heap_lock);
     *outstanding_pages = outstanding_claims;
-    *free_pages =  avail_domheap_pages();
+    *free_pages = avail_heap_pages(MEMZONE_XEN + 1, NR_ZONES - 1, -1);
     spin_unlock(&heap_lock);
 }
 
@@ -1964,27 +1985,6 @@ static void init_heap_pages(
     }
 }
 
-static unsigned long avail_heap_pages(
-    unsigned int zone_lo, unsigned int zone_hi, unsigned int node)
-{
-    unsigned int i, zone;
-    unsigned long free_pages = 0;
-
-    if ( zone_hi >= NR_ZONES )
-        zone_hi = NR_ZONES - 1;
-
-    for_each_online_node(i)
-    {
-        if ( !avail[i] )
-            continue;
-        for ( zone = zone_lo; zone <= zone_hi; zone++ )
-            if ( (node == -1) || (node == i) )
-                free_pages += avail[i][zone];
-    }
-
-    return free_pages;
-}
-
 /*************************
  * COLORED SIDE-ALLOCATOR
  *
@@ -2795,13 +2795,6 @@ unsigned long avail_domheap_pages_region(
     return avail_heap_pages(zone_lo, zone_hi, node);
 }
 
-unsigned long avail_domheap_pages(void)
-{
-    return avail_heap_pages(MEMZONE_XEN + 1,
-                            NR_ZONES - 1,
-                            -1);
-}
-
 unsigned long avail_node_heap_pages(unsigned int nodeid)
 {
     return avail_heap_pages(MEMZONE_XEN, NR_ZONES -1, nodeid);
diff --git a/xen/include/xen/mm.h b/xen/include/xen/mm.h
index ae1c48a615..eda57486cf 100644
--- a/xen/include/xen/mm.h
+++ b/xen/include/xen/mm.h
@@ -140,7 +140,6 @@ struct page_info *alloc_domheap_pages(
 void free_domheap_pages(struct page_info *pg, unsigned int order);
 unsigned long avail_domheap_pages_region(
     unsigned int node, unsigned int min_width, unsigned int max_width);
-unsigned long avail_domheap_pages(void);
 unsigned long avail_node_heap_pages(unsigned int nodeid);
 #define alloc_domheap_page(d,f) (alloc_domheap_pages(d,0,f))
 #define free_domheap_page(p)  (free_domheap_pages(p,0))
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , Penny Zheng , Andrew Cooper
	, Anthony PERARD ,
	Michal Orzel , Jan Beulich , "Julien
 Grall" , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Stefano Stabellini 
Subject: [PATCH v3 08/20] xen/sysctl: wrap around XEN_SYSCTL_lockprof_op
Date: Mon, 21 Apr 2025 15:37:11 +0800
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The following function is only to serve spinlock profiling via
XEN_SYSCTL_lockprof_op, so it shall be wrapped:
- spinlock_profile_control

Signed-off-by: Penny Zheng 
Reviewed-by: Stefano Stabellini 
---
v2 -> v3:
- add the blank line
---
 xen/common/spinlock.c | 2 ++
 xen/common/sysctl.c   | 3 ++-
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/xen/common/spinlock.c b/xen/common/spinlock.c
index 38caa10a2e..0389293b09 100644
--- a/xen/common/spinlock.c
+++ b/xen/common/spinlock.c
@@ -690,6 +690,7 @@ void cf_check spinlock_profile_reset(unsigned char key)
     spinlock_profile_iterate(spinlock_profile_reset_elem, NULL);
 }
 
+#ifdef CONFIG_SYSCTL
 typedef struct {
     struct xen_sysctl_lockprof_op *pc;
     int                      rc;
@@ -749,6 +750,7 @@ int spinlock_profile_control(struct xen_sysctl_lockprof_op *pc)
 
     return rc;
 }
+#endif /* CONFIG_SYSCTL */
 
 void _lock_profile_register_struct(
     int32_t type, struct lock_profile_qhead *qhead, int32_t idx)
diff --git a/xen/common/sysctl.c b/xen/common/sysctl.c
index 608e159571..2fe76362b1 100644
--- a/xen/common/sysctl.c
+++ b/xen/common/sysctl.c
@@ -123,13 +123,14 @@ long do_sysctl(XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)
         ret = perfc_control(&op->u.perfc_op);
         break;
 #endif
-#endif /* CONFIG_SYSCTL */
 
 #ifdef CONFIG_DEBUG_LOCK_PROFILE
     case XEN_SYSCTL_lockprof_op:
         ret = spinlock_profile_control(&op->u.lockprof_op);
         break;
 #endif
+#endif /* CONFIG_SYSCTL */
+
     case XEN_SYSCTL_debug_keys:
     {
         char c;
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , Penny Zheng , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini 
Subject: [PATCH v3 11/20] xen/sysctl: introduce CONFIG_PM_STATS
Date: Mon, 21 Apr 2025 15:37:14 +0800
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We introduce a new Kconfig CONFIG_PM_STATS for wrapping all operations
regarding performance management statistics.
The major codes reside in xen/drivers/acpi/pmstat.c, including the
pm-statistic-related sysctl op: do_get_pm_info().
CONFIG_PM_STATS also shall depend on CONFIG_SYSCTL

Signed-off-by: Penny Zheng 
---
v1 -> v2:
- rename to CONFIG_PM_STATS
- fix indention and stray semicolon
- make code movements into a new commit
- No need to wrap inline functions and declarations
---
v2 -> v3:
- sepearte functions related to do_pm_op() into a new commit
- both braces shall be moved to the line with the closing parenthesis
---
 xen/arch/x86/acpi/cpu_idle.c              |  2 ++
 xen/common/Kconfig                        |  8 ++++++++
 xen/common/sysctl.c                       |  4 ++--
 xen/drivers/acpi/Makefile                 |  2 +-
 xen/include/acpi/cpufreq/processor_perf.h | 10 ++++++++++
 5 files changed, 23 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/acpi/cpu_idle.c b/xen/arch/x86/acpi/cpu_idle.c
index 420198406d..b537ac4cd6 100644
--- a/xen/arch/x86/acpi/cpu_idle.c
+++ b/xen/arch/x86/acpi/cpu_idle.c
@@ -1487,6 +1487,7 @@ static void amd_cpuidle_init(struct acpi_processor_power *power)
         vendor_override = -1;
 }
 
+#ifdef CONFIG_PM_STATS
 uint32_t pmstat_get_cx_nr(unsigned int cpu)
 {
     return processor_powers[cpu] ? processor_powers[cpu]->count : 0;
@@ -1606,6 +1607,7 @@ int pmstat_reset_cx_stat(unsigned int cpu)
 {
     return 0;
 }
+#endif /* CONFIG_PM_STATS */
 
 void cpuidle_disable_deep_cstate(void)
 {
diff --git a/xen/common/Kconfig b/xen/common/Kconfig
index ca1f692487..d8e242eebc 100644
--- a/xen/common/Kconfig
+++ b/xen/common/Kconfig
@@ -600,4 +600,12 @@ config PM_OP
 	help
 	  This option shall enable userspace performance management control
 	  to do power/performance analyzing and tuning.
+
+config PM_STATS
+	bool "Enable Performance Management Statistics"
+	depends on ACPI && HAS_CPUFREQ && SYSCTL
+	default y
+	help
+	  Enable collection of performance management statistics to aid in
+	  analyzing and tuning power/performance characteristics of the system
 endmenu
diff --git a/xen/common/sysctl.c b/xen/common/sysctl.c
index 4ab827b694..baaad3bd42 100644
--- a/xen/common/sysctl.c
+++ b/xen/common/sysctl.c
@@ -177,11 +177,11 @@ long do_sysctl(XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)
         op->u.availheap.avail_bytes <<= PAGE_SHIFT;
         break;
 
-#if defined (CONFIG_ACPI) && defined (CONFIG_HAS_CPUFREQ)
+#ifdef CONFIG_PM_STATS
     case XEN_SYSCTL_get_pmstat:
         ret = do_get_pm_info(&op->u.get_pmstat);
         break;
-#endif
+#endif /* CONFIG_PM_STATS */
 
 #ifdef CONFIG_PM_OP
     case XEN_SYSCTL_pm_op:
diff --git a/xen/drivers/acpi/Makefile b/xen/drivers/acpi/Makefile
index e1f84a4468..b52b006100 100644
--- a/xen/drivers/acpi/Makefile
+++ b/xen/drivers/acpi/Makefile
@@ -5,7 +5,7 @@ obj-$(CONFIG_X86) += apei/
 obj-bin-y += tables.init.o
 obj-$(CONFIG_ACPI_NUMA) += numa.o
 obj-y += osl.o
-obj-$(CONFIG_HAS_CPUFREQ) += pmstat.o
+obj-$(CONFIG_PM_STATS) += pmstat.o
 obj-$(CONFIG_PM_OP) += pm_op.o
 
 obj-$(CONFIG_X86) += hwregs.o
diff --git a/xen/include/acpi/cpufreq/processor_perf.h b/xen/include/acpi/cpufreq/processor_perf.h
index 6de43f8602..a9a3b7a372 100644
--- a/xen/include/acpi/cpufreq/processor_perf.h
+++ b/xen/include/acpi/cpufreq/processor_perf.h
@@ -9,9 +9,19 @@
 
 unsigned int powernow_register_driver(void);
 unsigned int get_measured_perf(unsigned int cpu, unsigned int flag);
+#ifdef CONFIG_PM_STATS
 void cpufreq_statistic_update(unsigned int cpu, uint8_t from, uint8_t to);
 int  cpufreq_statistic_init(unsigned int cpu);
 void cpufreq_statistic_exit(unsigned int cpu);
+#else
+static inline void cpufreq_statistic_update(unsigned int cpu, uint8_t from,
+                                            uint8_t to) {}
+static inline int cpufreq_statistic_init(unsigned int cpu)
+{
+    return 0;
+}
+static inline void cpufreq_statistic_exit(unsigned int cpu) {}
+#endif /* CONFIG_PM_STATS */
 
 int  cpufreq_limit_change(unsigned int cpu);
 
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , Penny Zheng , Andrew Cooper
	, Anthony PERARD ,
	Michal Orzel , Jan Beulich , "Julien
 Grall" , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Stefano Stabellini , "Daniel
 P. Smith" 
Subject: [PATCH v3 12/20] xen/sysctl: wrap around XEN_SYSCTL_page_offline_op
Date: Mon, 21 Apr 2025 15:37:15 +0800
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The following functions are only to deal with XEN_SYSCTL_page_offline_op,
then shall be wrapped:
- xsm_page_offline
- online_page
- query_page_offline

Signed-off-by: Penny Zheng 
Reviewed-by: Stefano Stabellini 
---
v1 -> v2:
- add transient #ifdef in sysctl.c for correct compilation
- no need to wrap declarations
- place the #ifdef inside the function body to have less redundancy
---
 xen/common/page_alloc.c | 2 ++
 xen/common/sysctl.c     | 2 ++
 xen/include/xsm/xsm.h   | 6 ++++++
 xen/xsm/dummy.c         | 2 ++
 xen/xsm/flask/hooks.c   | 6 ++++++
 5 files changed, 18 insertions(+)

diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c
index bd4538c28d..cc2ad4423a 100644
--- a/xen/common/page_alloc.c
+++ b/xen/common/page_alloc.c
@@ -1758,6 +1758,7 @@ int offline_page(mfn_t mfn, int broken, uint32_t *status)
     return 0;
 }
 
+#ifdef CONFIG_SYSCTL
 /*
  * Online the memory.
  *   The caller should make sure end_pfn <= max_page,
@@ -1842,6 +1843,7 @@ int query_page_offline(mfn_t mfn, uint32_t *status)
 
     return 0;
 }
+#endif /* CONFIG_SYSCTL */
 
 /*
  * This function should only be called with valid pages from the same NUMA
diff --git a/xen/common/sysctl.c b/xen/common/sysctl.c
index baaad3bd42..504e3516c3 100644
--- a/xen/common/sysctl.c
+++ b/xen/common/sysctl.c
@@ -191,6 +191,7 @@ long do_sysctl(XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)
         break;
 #endif /* CONFIG_PM_OP */
 
+#ifdef CONFIG_SYSCTL
     case XEN_SYSCTL_page_offline_op:
     {
         uint32_t *status, *ptr;
@@ -251,6 +252,7 @@ long do_sysctl(XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)
         copyback = 0;
     }
     break;
+#endif /* CONFIG_SYSCTL */
 
     case XEN_SYSCTL_cpupool_op:
         ret = cpupool_do_sysctl(&op->u.cpupool_op);
diff --git a/xen/include/xsm/xsm.h b/xen/include/xsm/xsm.h
index 042a99449f..5ac99904c4 100644
--- a/xen/include/xsm/xsm.h
+++ b/xen/include/xsm/xsm.h
@@ -138,7 +138,9 @@ struct xsm_ops {
     int (*resource_setup_gsi)(int gsi);
     int (*resource_setup_misc)(void);
 
+#ifdef CONFIG_SYSCTL
     int (*page_offline)(uint32_t cmd);
+#endif
     int (*hypfs_op)(void);
 
     long (*do_xsm_op)(XEN_GUEST_HANDLE_PARAM(void) op);
@@ -597,7 +599,11 @@ static inline int xsm_resource_setup_misc(xsm_default_t def)
 
 static inline int xsm_page_offline(xsm_default_t def, uint32_t cmd)
 {
+#ifdef CONFIG_SYSCTL
     return alternative_call(xsm_ops.page_offline, cmd);
+#else
+    return -EOPNOTSUPP;
+#endif
 }
 
 static inline int xsm_hypfs_op(xsm_default_t def)
diff --git a/xen/xsm/dummy.c b/xen/xsm/dummy.c
index cd0e844fcf..d46413ad8c 100644
--- a/xen/xsm/dummy.c
+++ b/xen/xsm/dummy.c
@@ -96,7 +96,9 @@ static const struct xsm_ops __initconst_cf_clobber dummy_ops = {
     .resource_setup_gsi            = xsm_resource_setup_gsi,
     .resource_setup_misc           = xsm_resource_setup_misc,
 
+#ifdef CONFIG_SYSCTL
     .page_offline                  = xsm_page_offline,
+#endif
     .hypfs_op                      = xsm_hypfs_op,
     .hvm_param                     = xsm_hvm_param,
     .hvm_param_altp2mhvm           = xsm_hvm_param_altp2mhvm,
diff --git a/xen/xsm/flask/hooks.c b/xen/xsm/flask/hooks.c
index df7e10775b..45c12aa662 100644
--- a/xen/xsm/flask/hooks.c
+++ b/xen/xsm/flask/hooks.c
@@ -1206,10 +1206,12 @@ static int cf_check flask_resource_unplug_core(void)
     return avc_current_has_perm(SECINITSID_DOMXEN, SECCLASS_RESOURCE, RESOURCE__UNPLUG, NULL);
 }
 
+#ifdef CONFIG_SYSCTL
 static int flask_resource_use_core(void)
 {
     return avc_current_has_perm(SECINITSID_DOMXEN, SECCLASS_RESOURCE, RESOURCE__USE, NULL);
 }
+#endif /* CONFIG_SYSCTL */
 
 static int cf_check flask_resource_plug_pci(uint32_t machine_bdf)
 {
@@ -1274,6 +1276,7 @@ static int cf_check flask_resource_setup_misc(void)
     return avc_current_has_perm(SECINITSID_XEN, SECCLASS_RESOURCE, RESOURCE__SETUP, NULL);
 }
 
+#ifdef CONFIG_SYSCTL
 static inline int cf_check flask_page_offline(uint32_t cmd)
 {
     switch ( cmd )
@@ -1288,6 +1291,7 @@ static inline int cf_check flask_page_offline(uint32_t cmd)
         return avc_unknown_permission("page_offline", cmd);
     }
 }
+#endif /* CONFIG_SYSCTL */
 
 static inline int cf_check flask_hypfs_op(void)
 {
@@ -1948,7 +1952,9 @@ static const struct xsm_ops __initconst_cf_clobber flask_ops = {
     .resource_setup_gsi = flask_resource_setup_gsi,
     .resource_setup_misc = flask_resource_setup_misc,
 
+#ifdef CONFIG_SYSCTL
     .page_offline = flask_page_offline,
+#endif
     .hypfs_op = flask_hypfs_op,
     .hvm_param = flask_hvm_param,
     .hvm_param_altp2mhvm = flask_hvm_param_altp2mhvm,
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , Penny Zheng , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini 
Subject: [PATCH v3 10/20] xen/pmstat: introduce CONFIG_PM_OP
Date: Mon, 21 Apr 2025 15:37:13 +0800
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We move the following functions into a new file drivers/acpi/pm_op.c, as
they are all more fitting in performance controling and only called by
do_pm_op():
 - get_cpufreq_para()
 - set_cpufreq_para()
 - set_cpufreq_gov()
 - set_cpufreq_cppc()
 - cpufreq_driver_getavg()
 - cpufreq_update_turbo()
 - cpufreq_get_turbo_status()
We introduce a new Kconfig CONFIG_PM_OP to wrap the new file.

Also, although the following helpers are only called by do_pm_op(), they have
dependency on local variable, we wrap them with CONFIG_PM_OP in place:
 - write_userspace_scaling_setspeed()
 - write_ondemand_sampling_rate()
 - write_ondemand_up_threshold()
 - get_cpufreq_ondemand_para()
 - cpufreq_driver.update()
 - get_hwp_para()
Various style corrections shall be applied at the same time while moving these
functions, including:
 - add extra space before and after bracket of if() and switch()
 - fix indentation

Signed-off-by: Penny Zheng 
---
v2 -> v3
- new commit
---
 xen/arch/x86/acpi/cpufreq/hwp.c              |   6 +
 xen/arch/x86/acpi/cpufreq/powernow.c         |   4 +
 xen/common/Kconfig                           |   7 +
 xen/common/sysctl.c                          |   4 +-
 xen/drivers/acpi/Makefile                    |   1 +
 xen/drivers/acpi/pm_op.c                     | 409 +++++++++++++++++++
 xen/drivers/acpi/pmstat.c                    | 357 ----------------
 xen/drivers/cpufreq/cpufreq_misc_governors.c |   2 +
 xen/drivers/cpufreq/cpufreq_ondemand.c       |   2 +
 xen/drivers/cpufreq/utility.c                |  41 --
 xen/include/acpi/cpufreq/cpufreq.h           |   3 -
 11 files changed, 434 insertions(+), 402 deletions(-)
 create mode 100644 xen/drivers/acpi/pm_op.c

diff --git a/xen/arch/x86/acpi/cpufreq/hwp.c b/xen/arch/x86/acpi/cpufreq/hwp.c
index d5fa3d47ca..e4c09244ab 100644
--- a/xen/arch/x86/acpi/cpufreq/hwp.c
+++ b/xen/arch/x86/acpi/cpufreq/hwp.c
@@ -466,6 +466,7 @@ static int cf_check hwp_cpufreq_cpu_exit(struct cpufreq_policy *policy)
     return 0;
 }
 
+#ifdef CONFIG_PM_OP
 /*
  * The SDM reads like turbo should be disabled with MSR_IA32_PERF_CTL and
  * PERF_CTL_TURBO_DISENGAGE, but that does not seem to actually work, at least
@@ -508,6 +509,7 @@ static int cf_check hwp_cpufreq_update(unsigned int cpu, struct cpufreq_policy *
 
     return per_cpu(hwp_drv_data, cpu)->ret;
 }
+#endif /* CONFIG_PM_OP */
 
 static const struct cpufreq_driver __initconst_cf_clobber
 hwp_cpufreq_driver = {
@@ -516,9 +518,12 @@ hwp_cpufreq_driver = {
     .target = hwp_cpufreq_target,
     .init   = hwp_cpufreq_cpu_init,
     .exit   = hwp_cpufreq_cpu_exit,
+#ifdef CONFIG_PM_OP
     .update = hwp_cpufreq_update,
+#endif
 };
 
+#ifdef CONFIG_PM_OP
 int get_hwp_para(unsigned int cpu,
                  struct xen_cppc_para *cppc_para)
 {
@@ -639,6 +644,7 @@ int set_hwp_para(struct cpufreq_policy *policy,
 
     return hwp_cpufreq_target(policy, 0, 0);
 }
+#endif /* CONFIG_PM_OP */
 
 int __init hwp_register_driver(void)
 {
diff --git a/xen/arch/x86/acpi/cpufreq/powernow.c b/xen/arch/x86/acpi/cpufreq/powernow.c
index 69364e1855..12fca45b45 100644
--- a/xen/arch/x86/acpi/cpufreq/powernow.c
+++ b/xen/arch/x86/acpi/cpufreq/powernow.c
@@ -49,6 +49,7 @@ static void cf_check transition_pstate(void *pstate)
     wrmsrl(MSR_PSTATE_CTRL, *(unsigned int *)pstate);
 }
 
+#ifdef CONFIG_PM_OP
 static void cf_check update_cpb(void *data)
 {
     struct cpufreq_policy *policy = data;
@@ -77,6 +78,7 @@ static int cf_check powernow_cpufreq_update(
 
     return 0;
 }
+#endif /* CONFIG_PM_OP */
 
 static int cf_check powernow_cpufreq_target(
     struct cpufreq_policy *policy,
@@ -324,7 +326,9 @@ powernow_cpufreq_driver = {
     .target = powernow_cpufreq_target,
     .init   = powernow_cpufreq_cpu_init,
     .exit   = powernow_cpufreq_cpu_exit,
+#ifdef CONFIG_PM_OP
     .update = powernow_cpufreq_update
+#endif
 };
 
 unsigned int __init powernow_register_driver(void)
diff --git a/xen/common/Kconfig b/xen/common/Kconfig
index 9cccc37232..ca1f692487 100644
--- a/xen/common/Kconfig
+++ b/xen/common/Kconfig
@@ -593,4 +593,11 @@ config SYSCTL
 	  to reduce Xen footprint.
 endmenu
 
+config PM_OP
+	bool "Enable Performance Management Operation"
+	depends on ACPI && HAS_CPUFREQ && SYSCTL
+	default y
+	help
+	  This option shall enable userspace performance management control
+	  to do power/performance analyzing and tuning.
 endmenu
diff --git a/xen/common/sysctl.c b/xen/common/sysctl.c
index 2fe76362b1..4ab827b694 100644
--- a/xen/common/sysctl.c
+++ b/xen/common/sysctl.c
@@ -181,13 +181,15 @@ long do_sysctl(XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)
     case XEN_SYSCTL_get_pmstat:
         ret = do_get_pm_info(&op->u.get_pmstat);
         break;
+#endif
 
+#ifdef CONFIG_PM_OP
     case XEN_SYSCTL_pm_op:
         ret = do_pm_op(&op->u.pm_op);
         if ( ret == -EAGAIN )
             copyback = 1;
         break;
-#endif
+#endif /* CONFIG_PM_OP */
 
     case XEN_SYSCTL_page_offline_op:
     {
diff --git a/xen/drivers/acpi/Makefile b/xen/drivers/acpi/Makefile
index 2fc5230253..e1f84a4468 100644
--- a/xen/drivers/acpi/Makefile
+++ b/xen/drivers/acpi/Makefile
@@ -6,6 +6,7 @@ obj-bin-y += tables.init.o
 obj-$(CONFIG_ACPI_NUMA) += numa.o
 obj-y += osl.o
 obj-$(CONFIG_HAS_CPUFREQ) += pmstat.o
+obj-$(CONFIG_PM_OP) += pm_op.o
 
 obj-$(CONFIG_X86) += hwregs.o
 obj-$(CONFIG_X86) += reboot.o
diff --git a/xen/drivers/acpi/pm_op.c b/xen/drivers/acpi/pm_op.c
new file mode 100644
index 0000000000..3123cb9556
--- /dev/null
+++ b/xen/drivers/acpi/pm_op.c
@@ -0,0 +1,409 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+/*
+ * 1. Get PM parameter
+ * 2. Provide user PM control
+ */
+static int cpufreq_update_turbo(unsigned int cpu, int new_state)
+{
+    struct cpufreq_policy *policy;
+    int curr_state;
+    int ret = 0;
+
+    if ( new_state != CPUFREQ_TURBO_ENABLED &&
+         new_state != CPUFREQ_TURBO_DISABLED )
+        return -EINVAL;
+
+    policy = per_cpu(cpufreq_cpu_policy, cpu);
+    if ( !policy )
+        return -EACCES;
+
+    if ( policy->turbo == CPUFREQ_TURBO_UNSUPPORTED )
+        return -EOPNOTSUPP;
+
+    curr_state = policy->turbo;
+    if ( curr_state == new_state )
+        return 0;
+
+    policy->turbo = new_state;
+    if ( cpufreq_driver.update )
+    {
+        ret = alternative_call(cpufreq_driver.update, cpu, policy);
+        if ( ret )
+            policy->turbo = curr_state;
+    }
+
+    return ret;
+}
+
+static int cpufreq_get_turbo_status(unsigned int cpu)
+{
+    struct cpufreq_policy *policy;
+
+    policy = per_cpu(cpufreq_cpu_policy, cpu);
+    return policy && policy->turbo == CPUFREQ_TURBO_ENABLED;
+}
+
+static int read_scaling_available_governors(char *scaling_available_governors,
+                                            unsigned int size)
+{
+    unsigned int i = 0;
+    struct cpufreq_governor *t;
+
+    if ( !scaling_available_governors )
+        return -EINVAL;
+
+    list_for_each_entry(t, &cpufreq_governor_list, governor_list)
+    {
+        i += scnprintf(&scaling_available_governors[i],
+                       CPUFREQ_NAME_LEN, "%s ", t->name);
+        if ( i > size )
+            return -EINVAL;
+    }
+    scaling_available_governors[i-1] = '\0';
+
+    return 0;
+}
+
+static int get_cpufreq_para(struct xen_sysctl_pm_op *op)
+{
+    uint32_t ret = 0;
+    const struct processor_pminfo *pmpt;
+    struct cpufreq_policy *policy;
+    uint32_t gov_num = 0;
+    uint32_t *data;
+    char     *scaling_available_governors;
+    struct list_head *pos;
+    unsigned int cpu, i = 0;
+
+    pmpt = processor_pminfo[op->cpuid];
+    policy = per_cpu(cpufreq_cpu_policy, op->cpuid);
+
+    if ( !pmpt || !pmpt->perf.states ||
+         !policy || !policy->governor )
+        return -EINVAL;
+
+    list_for_each(pos, &cpufreq_governor_list)
+        gov_num++;
+
+    if ( (op->u.get_para.cpu_num  != cpumask_weight(policy->cpus)) ||
+         (op->u.get_para.freq_num != pmpt->perf.state_count)    ||
+         (op->u.get_para.gov_num  != gov_num) )
+    {
+        op->u.get_para.cpu_num =  cpumask_weight(policy->cpus);
+        op->u.get_para.freq_num = pmpt->perf.state_count;
+        op->u.get_para.gov_num  = gov_num;
+        return -EAGAIN;
+    }
+
+    if ( !(data = xzalloc_array(uint32_t,
+                                max(op->u.get_para.cpu_num,
+                                    op->u.get_para.freq_num))) )
+        return -ENOMEM;
+
+    for_each_cpu(cpu, policy->cpus)
+        data[i++] = cpu;
+    ret = copy_to_guest(op->u.get_para.affected_cpus,
+                        data, op->u.get_para.cpu_num);
+
+    for ( i = 0; i < op->u.get_para.freq_num; i++ )
+        data[i] = pmpt->perf.states[i].core_frequency * 1000;
+    ret += copy_to_guest(op->u.get_para.scaling_available_frequencies,
+                         data, op->u.get_para.freq_num);
+
+    xfree(data);
+    if ( ret )
+        return -EFAULT;
+
+    op->u.get_para.cpuinfo_cur_freq =
+        cpufreq_driver.get ? alternative_call(cpufreq_driver.get, op->cpuid)
+                           : policy->cur;
+    op->u.get_para.cpuinfo_max_freq = policy->cpuinfo.max_freq;
+    op->u.get_para.cpuinfo_min_freq = policy->cpuinfo.min_freq;
+    op->u.get_para.turbo_enabled = cpufreq_get_turbo_status(op->cpuid);
+
+    if ( cpufreq_driver.name[0] )
+        strlcpy(op->u.get_para.scaling_driver,
+                cpufreq_driver.name, CPUFREQ_NAME_LEN);
+    else
+        strlcpy(op->u.get_para.scaling_driver, "Unknown", CPUFREQ_NAME_LEN);
+
+    if ( IS_ENABLED(CONFIG_INTEL) &&
+         !strncmp(op->u.get_para.scaling_driver, XEN_HWP_DRIVER_NAME,
+                  CPUFREQ_NAME_LEN) )
+        ret = get_hwp_para(policy->cpu, &op->u.get_para.u.cppc_para);
+    else
+    {
+        if ( !(scaling_available_governors =
+               xzalloc_array(char, gov_num * CPUFREQ_NAME_LEN)) )
+            return -ENOMEM;
+        if ( (ret = read_scaling_available_governors(
+                        scaling_available_governors,
+                        (gov_num * CPUFREQ_NAME_LEN *
+                         sizeof(*scaling_available_governors)))) )
+        {
+            xfree(scaling_available_governors);
+            return ret;
+        }
+        ret = copy_to_guest(op->u.get_para.scaling_available_governors,
+                            scaling_available_governors,
+                            gov_num * CPUFREQ_NAME_LEN);
+        xfree(scaling_available_governors);
+        if ( ret )
+            return -EFAULT;
+
+        op->u.get_para.u.s.scaling_cur_freq = policy->cur;
+        op->u.get_para.u.s.scaling_max_freq = policy->max;
+        op->u.get_para.u.s.scaling_min_freq = policy->min;
+
+        if ( policy->governor->name[0] )
+            strlcpy(op->u.get_para.u.s.scaling_governor,
+                    policy->governor->name, CPUFREQ_NAME_LEN);
+        else
+            strlcpy(op->u.get_para.u.s.scaling_governor, "Unknown",
+                    CPUFREQ_NAME_LEN);
+
+        /* governor specific para */
+        if ( !strncasecmp(op->u.get_para.u.s.scaling_governor,
+                          "userspace", CPUFREQ_NAME_LEN) )
+            op->u.get_para.u.s.u.userspace.scaling_setspeed = policy->cur;
+
+        if ( !strncasecmp(op->u.get_para.u.s.scaling_governor,
+                          "ondemand", CPUFREQ_NAME_LEN) )
+            ret = get_cpufreq_ondemand_para(
+                &op->u.get_para.u.s.u.ondemand.sampling_rate_max,
+                &op->u.get_para.u.s.u.ondemand.sampling_rate_min,
+                &op->u.get_para.u.s.u.ondemand.sampling_rate,
+                &op->u.get_para.u.s.u.ondemand.up_threshold);
+    }
+
+    return ret;
+}
+
+static int set_cpufreq_gov(struct xen_sysctl_pm_op *op)
+{
+    struct cpufreq_policy new_policy, *old_policy;
+
+    old_policy = per_cpu(cpufreq_cpu_policy, op->cpuid);
+    if ( !old_policy )
+        return -EINVAL;
+
+    memcpy(&new_policy, old_policy, sizeof(struct cpufreq_policy));
+
+    new_policy.governor = __find_governor(op->u.set_gov.scaling_governor);
+    if ( new_policy.governor == NULL )
+        return -EINVAL;
+
+    return __cpufreq_set_policy(old_policy, &new_policy);
+}
+
+static int set_cpufreq_para(struct xen_sysctl_pm_op *op)
+{
+    int ret = 0;
+    struct cpufreq_policy *policy;
+
+    policy = per_cpu(cpufreq_cpu_policy, op->cpuid);
+
+    if ( !policy || !policy->governor )
+        return -EINVAL;
+
+    if ( hwp_active() )
+        return -EOPNOTSUPP;
+
+    switch( op->u.set_para.ctrl_type )
+    {
+    case SCALING_MAX_FREQ:
+    {
+        struct cpufreq_policy new_policy;
+
+        memcpy(&new_policy, policy, sizeof(struct cpufreq_policy));
+        new_policy.max = op->u.set_para.ctrl_value;
+        ret = __cpufreq_set_policy(policy, &new_policy);
+
+        break;
+    }
+
+    case SCALING_MIN_FREQ:
+    {
+        struct cpufreq_policy new_policy;
+
+        memcpy(&new_policy, policy, sizeof(struct cpufreq_policy));
+        new_policy.min = op->u.set_para.ctrl_value;
+        ret = __cpufreq_set_policy(policy, &new_policy);
+
+        break;
+    }
+
+    case SCALING_SETSPEED:
+    {
+        unsigned int freq =op->u.set_para.ctrl_value;
+
+        if ( !strncasecmp(policy->governor->name,
+                          "userspace", CPUFREQ_NAME_LEN) )
+            ret = write_userspace_scaling_setspeed(op->cpuid, freq);
+        else
+            ret = -EINVAL;
+
+        break;
+    }
+
+    case SAMPLING_RATE:
+    {
+        unsigned int sampling_rate = op->u.set_para.ctrl_value;
+
+        if ( !strncasecmp(policy->governor->name,
+                          "ondemand", CPUFREQ_NAME_LEN) )
+            ret = write_ondemand_sampling_rate(sampling_rate);
+        else
+            ret = -EINVAL;
+
+        break;
+    }
+
+    case UP_THRESHOLD:
+    {
+        unsigned int up_threshold = op->u.set_para.ctrl_value;
+
+        if ( !strncasecmp(policy->governor->name,
+                          "ondemand", CPUFREQ_NAME_LEN) )
+            ret = write_ondemand_up_threshold(up_threshold);
+        else
+            ret = -EINVAL;
+
+        break;
+    }
+
+    default:
+        ret = -EINVAL;
+        break;
+    }
+
+    return ret;
+}
+
+static int set_cpufreq_cppc(struct xen_sysctl_pm_op *op)
+{
+    struct cpufreq_policy *policy = per_cpu(cpufreq_cpu_policy, op->cpuid);
+
+    if ( !policy || !policy->governor )
+        return -ENOENT;
+
+    if ( !hwp_active() )
+        return -EOPNOTSUPP;
+
+    return set_hwp_para(policy, &op->u.set_cppc);
+}
+
+int do_pm_op(struct xen_sysctl_pm_op *op)
+{
+    int ret = 0;
+    const struct processor_pminfo *pmpt;
+
+    switch ( op->cmd )
+    {
+    case XEN_SYSCTL_pm_op_set_sched_opt_smt:
+    {
+        uint32_t saved_value = sched_smt_power_savings;
+
+        if ( op->cpuid != 0 )
+            return -EINVAL;
+        sched_smt_power_savings = !!op->u.set_sched_opt_smt;
+        op->u.set_sched_opt_smt = saved_value;
+        return 0;
+    }
+
+    case XEN_SYSCTL_pm_op_get_max_cstate:
+        BUILD_BUG_ON(XEN_SYSCTL_CX_UNLIMITED != UINT_MAX);
+        if ( op->cpuid == 0 )
+            op->u.get_max_cstate = acpi_get_cstate_limit();
+        else if ( op->cpuid == 1 )
+            op->u.get_max_cstate = acpi_get_csubstate_limit();
+        else
+            ret = -EINVAL;
+        return ret;
+
+    case XEN_SYSCTL_pm_op_set_max_cstate:
+        if ( op->cpuid == 0 )
+            acpi_set_cstate_limit(op->u.set_max_cstate);
+        else if ( op->cpuid == 1 )
+            acpi_set_csubstate_limit(op->u.set_max_cstate);
+        else
+            ret = -EINVAL;
+        return ret;
+    }
+
+    if ( op->cpuid >= nr_cpu_ids || !cpu_online(op->cpuid) )
+        return -EINVAL;
+    pmpt = processor_pminfo[op->cpuid];
+
+    switch ( op->cmd & PM_PARA_CATEGORY_MASK )
+    {
+    case CPUFREQ_PARA:
+        if ( !(xen_processor_pmbits & XEN_PROCESSOR_PM_PX) )
+            return -ENODEV;
+        if ( !pmpt || !(pmpt->perf.init & XEN_PX_INIT) )
+            return -EINVAL;
+        break;
+    }
+
+    switch ( op->cmd )
+    {
+    case GET_CPUFREQ_PARA:
+    {
+        ret = get_cpufreq_para(op);
+        break;
+    }
+
+    case SET_CPUFREQ_GOV:
+    {
+        ret = set_cpufreq_gov(op);
+        break;
+    }
+
+    case SET_CPUFREQ_PARA:
+    {
+        ret = set_cpufreq_para(op);
+        break;
+    }
+
+    case SET_CPUFREQ_CPPC:
+        ret = set_cpufreq_cppc(op);
+        break;
+
+    case GET_CPUFREQ_AVGFREQ:
+    {
+        op->u.get_avgfreq = cpufreq_driver_getavg(op->cpuid, USR_GETAVG);
+        break;
+    }
+
+    case XEN_SYSCTL_pm_op_enable_turbo:
+    {
+        ret = cpufreq_update_turbo(op->cpuid, CPUFREQ_TURBO_ENABLED);
+        break;
+    }
+
+    case XEN_SYSCTL_pm_op_disable_turbo:
+    {
+        ret = cpufreq_update_turbo(op->cpuid, CPUFREQ_TURBO_DISABLED);
+        break;
+    }
+
+    default:
+        printk("not defined sub-hypercall @ do_pm_op\n");
+        ret = -ENOSYS;
+        break;
+    }
+
+    return ret;
+}
diff --git a/xen/drivers/acpi/pmstat.c b/xen/drivers/acpi/pmstat.c
index abfdc45cc2..61b60e59a2 100644
--- a/xen/drivers/acpi/pmstat.c
+++ b/xen/drivers/acpi/pmstat.c
@@ -330,360 +330,3 @@ int do_get_pm_info(struct xen_sysctl_get_pmstat *op)
 
     return ret;
 }
-
-/*
- * 1. Get PM parameter
- * 2. Provide user PM control
- */
-static int read_scaling_available_governors(char *scaling_available_governors,
-                                            unsigned int size)
-{
-    unsigned int i = 0;
-    struct cpufreq_governor *t;
-
-    if ( !scaling_available_governors )
-        return -EINVAL;
-
-    list_for_each_entry(t, &cpufreq_governor_list, governor_list)
-    {
-        i += scnprintf(&scaling_available_governors[i],
-                       CPUFREQ_NAME_LEN, "%s ", t->name);
-        if ( i > size )
-            return -EINVAL;
-    }
-    scaling_available_governors[i-1] = '\0';
-
-    return 0;
-}
-
-static int get_cpufreq_para(struct xen_sysctl_pm_op *op)
-{
-    uint32_t ret = 0;
-    const struct processor_pminfo *pmpt;
-    struct cpufreq_policy *policy;
-    uint32_t gov_num = 0;
-    uint32_t *data;
-    char     *scaling_available_governors;
-    struct list_head *pos;
-    unsigned int cpu, i = 0;
-
-    pmpt = processor_pminfo[op->cpuid];
-    policy = per_cpu(cpufreq_cpu_policy, op->cpuid);
-
-    if ( !pmpt || !pmpt->perf.states ||
-         !policy || !policy->governor )
-        return -EINVAL;
-
-    list_for_each(pos, &cpufreq_governor_list)
-        gov_num++;
-
-    if ( (op->u.get_para.cpu_num  != cpumask_weight(policy->cpus)) ||
-         (op->u.get_para.freq_num != pmpt->perf.state_count)    ||
-         (op->u.get_para.gov_num  != gov_num) )
-    {
-        op->u.get_para.cpu_num =  cpumask_weight(policy->cpus);
-        op->u.get_para.freq_num = pmpt->perf.state_count;
-        op->u.get_para.gov_num  = gov_num;
-        return -EAGAIN;
-    }
-
-    if ( !(data = xzalloc_array(uint32_t,
-                                max(op->u.get_para.cpu_num,
-                                    op->u.get_para.freq_num))) )
-        return -ENOMEM;
-
-    for_each_cpu(cpu, policy->cpus)
-        data[i++] = cpu;
-    ret = copy_to_guest(op->u.get_para.affected_cpus,
-                        data, op->u.get_para.cpu_num);
-
-    for ( i = 0; i < op->u.get_para.freq_num; i++ )
-        data[i] = pmpt->perf.states[i].core_frequency * 1000;
-    ret += copy_to_guest(op->u.get_para.scaling_available_frequencies,
-                         data, op->u.get_para.freq_num);
-
-    xfree(data);
-    if ( ret )
-        return -EFAULT;
-
-    op->u.get_para.cpuinfo_cur_freq =
-        cpufreq_driver.get ? alternative_call(cpufreq_driver.get, op->cpuid)
-                           : policy->cur;
-    op->u.get_para.cpuinfo_max_freq = policy->cpuinfo.max_freq;
-    op->u.get_para.cpuinfo_min_freq = policy->cpuinfo.min_freq;
-    op->u.get_para.turbo_enabled = cpufreq_get_turbo_status(op->cpuid);
-
-    if ( cpufreq_driver.name[0] )
-        strlcpy(op->u.get_para.scaling_driver,
-            cpufreq_driver.name, CPUFREQ_NAME_LEN);
-    else
-        strlcpy(op->u.get_para.scaling_driver, "Unknown", CPUFREQ_NAME_LEN);
-
-    if ( IS_ENABLED(CONFIG_INTEL) &&
-         !strncmp(op->u.get_para.scaling_driver, XEN_HWP_DRIVER_NAME,
-                  CPUFREQ_NAME_LEN) )
-        ret = get_hwp_para(policy->cpu, &op->u.get_para.u.cppc_para);
-    else
-    {
-        if ( !(scaling_available_governors =
-               xzalloc_array(char, gov_num * CPUFREQ_NAME_LEN)) )
-            return -ENOMEM;
-        if ( (ret = read_scaling_available_governors(
-                        scaling_available_governors,
-                        (gov_num * CPUFREQ_NAME_LEN *
-                         sizeof(*scaling_available_governors)))) )
-        {
-            xfree(scaling_available_governors);
-            return ret;
-        }
-        ret = copy_to_guest(op->u.get_para.scaling_available_governors,
-                            scaling_available_governors,
-                            gov_num * CPUFREQ_NAME_LEN);
-        xfree(scaling_available_governors);
-        if ( ret )
-            return -EFAULT;
-
-        op->u.get_para.u.s.scaling_cur_freq = policy->cur;
-        op->u.get_para.u.s.scaling_max_freq = policy->max;
-        op->u.get_para.u.s.scaling_min_freq = policy->min;
-
-        if ( policy->governor->name[0] )
-            strlcpy(op->u.get_para.u.s.scaling_governor,
-                policy->governor->name, CPUFREQ_NAME_LEN);
-        else
-            strlcpy(op->u.get_para.u.s.scaling_governor, "Unknown",
-                    CPUFREQ_NAME_LEN);
-
-        /* governor specific para */
-        if ( !strncasecmp(op->u.get_para.u.s.scaling_governor,
-                          "userspace", CPUFREQ_NAME_LEN) )
-            op->u.get_para.u.s.u.userspace.scaling_setspeed = policy->cur;
-
-        if ( !strncasecmp(op->u.get_para.u.s.scaling_governor,
-                          "ondemand", CPUFREQ_NAME_LEN) )
-            ret = get_cpufreq_ondemand_para(
-                &op->u.get_para.u.s.u.ondemand.sampling_rate_max,
-                &op->u.get_para.u.s.u.ondemand.sampling_rate_min,
-                &op->u.get_para.u.s.u.ondemand.sampling_rate,
-                &op->u.get_para.u.s.u.ondemand.up_threshold);
-    }
-
-    return ret;
-}
-
-static int set_cpufreq_gov(struct xen_sysctl_pm_op *op)
-{
-    struct cpufreq_policy new_policy, *old_policy;
-
-    old_policy = per_cpu(cpufreq_cpu_policy, op->cpuid);
-    if ( !old_policy )
-        return -EINVAL;
-
-    memcpy(&new_policy, old_policy, sizeof(struct cpufreq_policy));
-
-    new_policy.governor = __find_governor(op->u.set_gov.scaling_governor);
-    if (new_policy.governor == NULL)
-        return -EINVAL;
-
-    return __cpufreq_set_policy(old_policy, &new_policy);
-}
-
-static int set_cpufreq_para(struct xen_sysctl_pm_op *op)
-{
-    int ret = 0;
-    struct cpufreq_policy *policy;
-
-    policy = per_cpu(cpufreq_cpu_policy, op->cpuid);
-
-    if ( !policy || !policy->governor )
-        return -EINVAL;
-
-    if ( hwp_active() )
-        return -EOPNOTSUPP;
-
-    switch(op->u.set_para.ctrl_type)
-    {
-    case SCALING_MAX_FREQ:
-    {
-        struct cpufreq_policy new_policy;
-
-        memcpy(&new_policy, policy, sizeof(struct cpufreq_policy));
-        new_policy.max = op->u.set_para.ctrl_value;
-        ret = __cpufreq_set_policy(policy, &new_policy);
-
-        break;
-    }
-
-    case SCALING_MIN_FREQ:
-    {
-        struct cpufreq_policy new_policy;
-
-        memcpy(&new_policy, policy, sizeof(struct cpufreq_policy));
-        new_policy.min = op->u.set_para.ctrl_value;
-        ret = __cpufreq_set_policy(policy, &new_policy);
-
-        break;
-    }
-
-    case SCALING_SETSPEED:
-    {
-        unsigned int freq =op->u.set_para.ctrl_value;
-
-        if ( !strncasecmp(policy->governor->name,
-                          "userspace", CPUFREQ_NAME_LEN) )
-            ret = write_userspace_scaling_setspeed(op->cpuid, freq);
-        else
-            ret = -EINVAL;
-
-        break;
-    }
-
-    case SAMPLING_RATE:
-    {
-        unsigned int sampling_rate = op->u.set_para.ctrl_value;
-
-        if ( !strncasecmp(policy->governor->name,
-                          "ondemand", CPUFREQ_NAME_LEN) )
-            ret = write_ondemand_sampling_rate(sampling_rate);
-        else
-            ret = -EINVAL;
-
-        break;
-    }
-
-    case UP_THRESHOLD:
-    {
-        unsigned int up_threshold = op->u.set_para.ctrl_value;
-
-        if ( !strncasecmp(policy->governor->name,
-                          "ondemand", CPUFREQ_NAME_LEN) )
-            ret = write_ondemand_up_threshold(up_threshold);
-        else
-            ret = -EINVAL;
-
-        break;
-    }
-
-    default:
-        ret = -EINVAL;
-        break;
-    }
-
-    return ret;
-}
-
-static int set_cpufreq_cppc(struct xen_sysctl_pm_op *op)
-{
-    struct cpufreq_policy *policy = per_cpu(cpufreq_cpu_policy, op->cpuid);
-
-    if ( !policy || !policy->governor )
-        return -ENOENT;
-
-    if ( !hwp_active() )
-        return -EOPNOTSUPP;
-
-    return set_hwp_para(policy, &op->u.set_cppc);
-}
-
-int do_pm_op(struct xen_sysctl_pm_op *op)
-{
-    int ret = 0;
-    const struct processor_pminfo *pmpt;
-
-    switch ( op->cmd )
-    {
-    case XEN_SYSCTL_pm_op_set_sched_opt_smt:
-    {
-        uint32_t saved_value = sched_smt_power_savings;
-
-        if ( op->cpuid != 0 )
-            return -EINVAL;
-        sched_smt_power_savings = !!op->u.set_sched_opt_smt;
-        op->u.set_sched_opt_smt = saved_value;
-        return 0;
-    }
-
-    case XEN_SYSCTL_pm_op_get_max_cstate:
-        BUILD_BUG_ON(XEN_SYSCTL_CX_UNLIMITED != UINT_MAX);
-        if ( op->cpuid == 0 )
-            op->u.get_max_cstate = acpi_get_cstate_limit();
-        else if ( op->cpuid == 1 )
-            op->u.get_max_cstate = acpi_get_csubstate_limit();
-        else
-            ret = -EINVAL;
-        return ret;
-
-    case XEN_SYSCTL_pm_op_set_max_cstate:
-        if ( op->cpuid == 0 )
-            acpi_set_cstate_limit(op->u.set_max_cstate);
-        else if ( op->cpuid == 1 )
-            acpi_set_csubstate_limit(op->u.set_max_cstate);
-        else
-            ret = -EINVAL;
-        return ret;
-    }
-
-    if ( op->cpuid >= nr_cpu_ids || !cpu_online(op->cpuid) )
-        return -EINVAL;
-    pmpt = processor_pminfo[op->cpuid];
-
-    switch ( op->cmd & PM_PARA_CATEGORY_MASK )
-    {
-    case CPUFREQ_PARA:
-        if ( !(xen_processor_pmbits & XEN_PROCESSOR_PM_PX) )
-            return -ENODEV;
-        if ( !pmpt || !(pmpt->perf.init & XEN_PX_INIT) )
-            return -EINVAL;
-        break;
-    }
-
-    switch ( op->cmd )
-    {
-    case GET_CPUFREQ_PARA:
-    {
-        ret = get_cpufreq_para(op);
-        break;
-    }
-
-    case SET_CPUFREQ_GOV:
-    {
-        ret = set_cpufreq_gov(op);
-        break;
-    }
-
-    case SET_CPUFREQ_PARA:
-    {
-        ret = set_cpufreq_para(op);
-        break;
-    }
-
-    case SET_CPUFREQ_CPPC:
-        ret = set_cpufreq_cppc(op);
-        break;
-
-    case GET_CPUFREQ_AVGFREQ:
-    {
-        op->u.get_avgfreq = cpufreq_driver_getavg(op->cpuid, USR_GETAVG);
-        break;
-    }
-
-    case XEN_SYSCTL_pm_op_enable_turbo:
-    {
-        ret = cpufreq_update_turbo(op->cpuid, CPUFREQ_TURBO_ENABLED);
-        break;
-    }
-
-    case XEN_SYSCTL_pm_op_disable_turbo:
-    {
-        ret = cpufreq_update_turbo(op->cpuid, CPUFREQ_TURBO_DISABLED);
-        break;
-    }
-
-    default:
-        printk("not defined sub-hypercall @ do_pm_op\n");
-        ret = -ENOSYS;
-        break;
-    }
-
-    return ret;
-}
diff --git a/xen/drivers/cpufreq/cpufreq_misc_governors.c b/xen/drivers/cpufreq/cpufreq_misc_governors.c
index 0327fad23b..e5cb9ab02f 100644
--- a/xen/drivers/cpufreq/cpufreq_misc_governors.c
+++ b/xen/drivers/cpufreq/cpufreq_misc_governors.c
@@ -64,6 +64,7 @@ static int cf_check cpufreq_governor_userspace(
     return ret;
 }
 
+#ifdef CONFIG_PM_OP
 int write_userspace_scaling_setspeed(unsigned int cpu, unsigned int freq)
 {
     struct cpufreq_policy *policy;
@@ -80,6 +81,7 @@ int write_userspace_scaling_setspeed(unsigned int cpu, unsigned int freq)
 
     return __cpufreq_driver_target(policy, freq, CPUFREQ_RELATION_L);
 }
+#endif /* CONFIG_PM_OP */
 
 static bool __init cf_check
 cpufreq_userspace_handle_option(const char *name, const char *val)
diff --git a/xen/drivers/cpufreq/cpufreq_ondemand.c b/xen/drivers/cpufreq/cpufreq_ondemand.c
index 06cfc88d30..0126a3f5d9 100644
--- a/xen/drivers/cpufreq/cpufreq_ondemand.c
+++ b/xen/drivers/cpufreq/cpufreq_ondemand.c
@@ -57,6 +57,7 @@ static struct dbs_tuners {
 
 static DEFINE_PER_CPU(struct timer, dbs_timer);
 
+#ifdef CONFIG_PM_OP
 int write_ondemand_sampling_rate(unsigned int sampling_rate)
 {
     if ( (sampling_rate > MAX_SAMPLING_RATE / MICROSECS(1)) ||
@@ -93,6 +94,7 @@ int get_cpufreq_ondemand_para(uint32_t *sampling_rate_max,
 
     return 0;
 }
+#endif /* CONFIG_PM_OP */
 
 static void dbs_check_cpu(struct cpu_dbs_info_s *this_dbs_info)
 {
diff --git a/xen/drivers/cpufreq/utility.c b/xen/drivers/cpufreq/utility.c
index 723045b240..987c3b5929 100644
--- a/xen/drivers/cpufreq/utility.c
+++ b/xen/drivers/cpufreq/utility.c
@@ -224,47 +224,6 @@ int cpufreq_driver_getavg(unsigned int cpu, unsigned int flag)
     return policy->cur;
 }
 
-int cpufreq_update_turbo(unsigned int cpu, int new_state)
-{
-    struct cpufreq_policy *policy;
-    int curr_state;
-    int ret = 0;
-
-    if (new_state != CPUFREQ_TURBO_ENABLED &&
-        new_state != CPUFREQ_TURBO_DISABLED)
-        return -EINVAL;
-
-    policy = per_cpu(cpufreq_cpu_policy, cpu);
-    if (!policy)
-        return -EACCES;
-
-    if (policy->turbo == CPUFREQ_TURBO_UNSUPPORTED)
-        return -EOPNOTSUPP;
-
-    curr_state = policy->turbo;
-    if (curr_state == new_state)
-        return 0;
-
-    policy->turbo = new_state;
-    if (cpufreq_driver.update)
-    {
-        ret = alternative_call(cpufreq_driver.update, cpu, policy);
-        if (ret)
-            policy->turbo = curr_state;
-    }
-
-    return ret;
-}
-
-
-int cpufreq_get_turbo_status(unsigned int cpu)
-{
-    struct cpufreq_policy *policy;
-
-    policy = per_cpu(cpufreq_cpu_policy, cpu);
-    return policy && policy->turbo == CPUFREQ_TURBO_ENABLED;
-}
-
 /*********************************************************************
  *                 POLICY                                            *
  *********************************************************************/
diff --git a/xen/include/acpi/cpufreq/cpufreq.h b/xen/include/acpi/cpufreq/cpufreq.h
index 241117a9af..0742aa9f44 100644
--- a/xen/include/acpi/cpufreq/cpufreq.h
+++ b/xen/include/acpi/cpufreq/cpufreq.h
@@ -143,9 +143,6 @@ extern int cpufreq_driver_getavg(unsigned int cpu, unsigned int flag);
 #define CPUFREQ_TURBO_UNSUPPORTED   0
 #define CPUFREQ_TURBO_ENABLED       1
 
-int cpufreq_update_turbo(unsigned int cpu, int new_state);
-int cpufreq_get_turbo_status(unsigned int cpu);
-
 static inline int
 __cpufreq_governor(struct cpufreq_policy *policy, unsigned int event)
 {
-- 
2.34.1



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From: Penny Zheng 
To: , 
CC: , Penny Zheng , Nathan Studer
	, Stewart Hildebrand , "Dario
 Faggioli" , Juergen Gross , George
 Dunlap , Andrew Cooper ,
	"Anthony PERARD" , Michal Orzel
	, "Jan Beulich" , Julien Grall
	, =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, "Stefano Stabellini" ,
	"Daniel P. Smith" 
Subject: [PATCH v3 14/20] xen/sysctl: wrap around XEN_SYSCTL_scheduler_op
Date: Mon, 21 Apr 2025 15:37:17 +0800
Message-ID: <20250421073723.3863060-15-Penny.Zheng@amd.com>
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Function sched_adjust_global is designed for XEN_SYSCTL_scheduler_op, so
itself and its calling flow, like .adjust_global, shall all be wrapped.

Signed-off-by: Penny Zheng 
Reviewed-by: Stefano Stabellini 
Acked-by: Stewart Hildebrand  #a653
---
v1 -> v2:
- no need to wrap declarations
- add transient #ifdef in sysctl.c for correct compilation
---
v2 -> v3
- move #endif up ahead of the blank line
---
 xen/common/sched/arinc653.c | 6 ++++++
 xen/common/sched/core.c     | 2 ++
 xen/common/sched/credit.c   | 4 ++++
 xen/common/sched/credit2.c  | 4 ++++
 xen/common/sched/private.h  | 4 ++++
 xen/common/sysctl.c         | 2 +-
 xen/include/xsm/xsm.h       | 4 ++++
 xen/xsm/dummy.c             | 2 ++
 xen/xsm/flask/hooks.c       | 4 ++++
 9 files changed, 31 insertions(+), 1 deletion(-)

diff --git a/xen/common/sched/arinc653.c b/xen/common/sched/arinc653.c
index 432ccfe662..3c014c9934 100644
--- a/xen/common/sched/arinc653.c
+++ b/xen/common/sched/arinc653.c
@@ -220,6 +220,7 @@ static void update_schedule_units(const struct scheduler *ops)
                       SCHED_PRIV(ops)->schedule[i].unit_id);
 }
 
+#ifdef CONFIG_SYSCTL
 /**
  * This function is called by the adjust_global scheduler hook to put
  * in place a new ARINC653 schedule.
@@ -334,6 +335,7 @@ arinc653_sched_get(
 
     return 0;
 }
+#endif /* CONFIG_SYSCTL */
 
 /**************************************************************************
  * Scheduler callback functions                                           *
@@ -653,6 +655,7 @@ a653_switch_sched(struct scheduler *new_ops, unsigned int cpu,
     return &sr->_lock;
 }
 
+#ifdef CONFIG_SYSCTL
 /**
  * Xen scheduler callback function to perform a global (not domain-specific)
  * adjustment. It is used by the ARINC 653 scheduler to put in place a new
@@ -692,6 +695,7 @@ a653sched_adjust_global(const struct scheduler *ops,
 
     return rc;
 }
+#endif /* CONFIG_SYSCTL */
 
 /**
  * This structure defines our scheduler for Xen.
@@ -726,7 +730,9 @@ static const struct scheduler sched_arinc653_def = {
     .switch_sched   = a653_switch_sched,
 
     .adjust         = NULL,
+#ifdef CONFIG_SYSCTL
     .adjust_global  = a653sched_adjust_global,
+#endif
 
     .dump_settings  = NULL,
     .dump_cpu_state = NULL,
diff --git a/xen/common/sched/core.c b/xen/common/sched/core.c
index 13fdf57e57..ea95dea65a 100644
--- a/xen/common/sched/core.c
+++ b/xen/common/sched/core.c
@@ -2112,6 +2112,7 @@ long sched_adjust(struct domain *d, struct xen_domctl_scheduler_op *op)
     return ret;
 }
 
+#ifdef CONFIG_SYSCTL
 long sched_adjust_global(struct xen_sysctl_scheduler_op *op)
 {
     struct cpupool *pool;
@@ -2140,6 +2141,7 @@ long sched_adjust_global(struct xen_sysctl_scheduler_op *op)
 
     return rc;
 }
+#endif /* CONFIG_SYSCTL */
 
 static void vcpu_periodic_timer_work_locked(struct vcpu *v)
 {
diff --git a/xen/common/sched/credit.c b/xen/common/sched/credit.c
index a6bb321e7d..6dcf6b2c8b 100644
--- a/xen/common/sched/credit.c
+++ b/xen/common/sched/credit.c
@@ -1256,6 +1256,7 @@ __csched_set_tslice(struct csched_private *prv, unsigned int timeslice_ms)
     prv->credit = prv->credits_per_tslice * prv->ncpus;
 }
 
+#ifdef CONFIG_SYSCTL
 static int cf_check
 csched_sys_cntl(const struct scheduler *ops,
                         struct xen_sysctl_scheduler_op *sc)
@@ -1298,6 +1299,7 @@ csched_sys_cntl(const struct scheduler *ops,
     out:
     return rc;
 }
+#endif /* CONFIG_SYSCTL */
 
 static void *cf_check
 csched_alloc_domdata(const struct scheduler *ops, struct domain *dom)
@@ -2288,7 +2290,9 @@ static const struct scheduler sched_credit_def = {
 
     .adjust         = csched_dom_cntl,
     .adjust_affinity= csched_aff_cntl,
+#ifdef CONFIG_SYSCTL
     .adjust_global  = csched_sys_cntl,
+#endif
 
     .pick_resource  = csched_res_pick,
     .do_schedule    = csched_schedule,
diff --git a/xen/common/sched/credit2.c b/xen/common/sched/credit2.c
index 0a83f23725..0b3b61df57 100644
--- a/xen/common/sched/credit2.c
+++ b/xen/common/sched/credit2.c
@@ -3131,6 +3131,7 @@ csched2_aff_cntl(const struct scheduler *ops, struct sched_unit *unit,
         __clear_bit(__CSFLAG_pinned, &svc->flags);
 }
 
+#ifdef CONFIG_SYSCTL
 static int cf_check csched2_sys_cntl(
     const struct scheduler *ops, struct xen_sysctl_scheduler_op *sc)
 {
@@ -3162,6 +3163,7 @@ static int cf_check csched2_sys_cntl(
 
     return 0;
 }
+#endif /* CONFIG_SYSCTL */
 
 static void *cf_check
 csched2_alloc_domdata(const struct scheduler *ops, struct domain *dom)
@@ -4232,7 +4234,9 @@ static const struct scheduler sched_credit2_def = {
 
     .adjust         = csched2_dom_cntl,
     .adjust_affinity= csched2_aff_cntl,
+#ifdef CONFIG_SYSCTL
     .adjust_global  = csched2_sys_cntl,
+#endif
 
     .pick_resource  = csched2_res_pick,
     .migrate        = csched2_unit_migrate,
diff --git a/xen/common/sched/private.h b/xen/common/sched/private.h
index c0e7c96d24..d6884550cd 100644
--- a/xen/common/sched/private.h
+++ b/xen/common/sched/private.h
@@ -356,8 +356,10 @@ struct scheduler {
                                     struct sched_unit *unit,
                                     const struct cpumask *hard,
                                     const struct cpumask *soft);
+#ifdef CONFIG_SYSCTL
     int          (*adjust_global)  (const struct scheduler *ops,
                                     struct xen_sysctl_scheduler_op *sc);
+#endif
     void         (*dump_settings)  (const struct scheduler *ops);
     void         (*dump_cpu_state) (const struct scheduler *ops, int cpu);
     void         (*move_timers)    (const struct scheduler *ops,
@@ -510,11 +512,13 @@ static inline int sched_adjust_dom(const struct scheduler *s, struct domain *d,
     return s->adjust ? s->adjust(s, d, op) : 0;
 }
 
+#ifdef CONFIG_SYSCTL
 static inline int sched_adjust_cpupool(const struct scheduler *s,
                                        struct xen_sysctl_scheduler_op *op)
 {
     return s->adjust_global ? s->adjust_global(s, op) : 0;
 }
+#endif
 
 static inline void sched_move_timers(const struct scheduler *s,
                                      struct sched_resource *sr)
diff --git a/xen/common/sysctl.c b/xen/common/sysctl.c
index 767e0b7389..200e0a0488 100644
--- a/xen/common/sysctl.c
+++ b/xen/common/sysctl.c
@@ -256,11 +256,11 @@ long do_sysctl(XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)
     case XEN_SYSCTL_cpupool_op:
         ret = cpupool_do_sysctl(&op->u.cpupool_op);
         break;
-#endif /* CONFIG_SYSCTL */
 
     case XEN_SYSCTL_scheduler_op:
         ret = sched_adjust_global(&op->u.scheduler_op);
         break;
+#endif /* CONFIG_SYSCTL */
 
     case XEN_SYSCTL_physinfo:
     {
diff --git a/xen/include/xsm/xsm.h b/xen/include/xsm/xsm.h
index 5ac99904c4..6e1789c314 100644
--- a/xen/include/xsm/xsm.h
+++ b/xen/include/xsm/xsm.h
@@ -57,7 +57,9 @@ struct xsm_ops {
     int (*domain_create)(struct domain *d, uint32_t ssidref);
     int (*getdomaininfo)(struct domain *d);
     int (*domctl_scheduler_op)(struct domain *d, int op);
+#ifdef CONFIG_SYSCTL
     int (*sysctl_scheduler_op)(int op);
+#endif
     int (*set_target)(struct domain *d, struct domain *e);
     int (*domctl)(struct domain *d, unsigned int cmd, uint32_t ssidref);
     int (*sysctl)(int cmd);
@@ -244,10 +246,12 @@ static inline int xsm_domctl_scheduler_op(
     return alternative_call(xsm_ops.domctl_scheduler_op, d, cmd);
 }
 
+#ifdef CONFIG_SYSCTL
 static inline int xsm_sysctl_scheduler_op(xsm_default_t def, int cmd)
 {
     return alternative_call(xsm_ops.sysctl_scheduler_op, cmd);
 }
+#endif
 
 static inline int xsm_set_target(
     xsm_default_t def, struct domain *d, struct domain *e)
diff --git a/xen/xsm/dummy.c b/xen/xsm/dummy.c
index d46413ad8c..8d44f5bfb6 100644
--- a/xen/xsm/dummy.c
+++ b/xen/xsm/dummy.c
@@ -19,7 +19,9 @@ static const struct xsm_ops __initconst_cf_clobber dummy_ops = {
     .domain_create                 = xsm_domain_create,
     .getdomaininfo                 = xsm_getdomaininfo,
     .domctl_scheduler_op           = xsm_domctl_scheduler_op,
+#ifdef CONFIG_SYSCTL
     .sysctl_scheduler_op           = xsm_sysctl_scheduler_op,
+#endif
     .set_target                    = xsm_set_target,
     .domctl                        = xsm_domctl,
 #ifdef CONFIG_SYSCTL
diff --git a/xen/xsm/flask/hooks.c b/xen/xsm/flask/hooks.c
index 45c12aa662..a7cb33a718 100644
--- a/xen/xsm/flask/hooks.c
+++ b/xen/xsm/flask/hooks.c
@@ -626,6 +626,7 @@ static int cf_check flask_domctl_scheduler_op(struct domain *d, int op)
     }
 }
 
+#ifdef CONFIG_SYSCTL
 static int cf_check flask_sysctl_scheduler_op(int op)
 {
     switch ( op )
@@ -640,6 +641,7 @@ static int cf_check flask_sysctl_scheduler_op(int op)
         return avc_unknown_permission("sysctl_scheduler_op", op);
     }
 }
+#endif /* CONFIG_SYSCTL */
 
 static int cf_check flask_set_target(struct domain *d, struct domain *t)
 {
@@ -1887,7 +1889,9 @@ static const struct xsm_ops __initconst_cf_clobber flask_ops = {
     .domain_create = flask_domain_create,
     .getdomaininfo = flask_getdomaininfo,
     .domctl_scheduler_op = flask_domctl_scheduler_op,
+#ifdef CONFIG_SYSCTL
     .sysctl_scheduler_op = flask_sysctl_scheduler_op,
+#endif
     .set_target = flask_set_target,
     .domctl = flask_domctl,
 #ifdef CONFIG_SYSCTL
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , Penny Zheng , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , "Volodymyr
 Babchuk" , Andrew Cooper
	, Anthony PERARD , "Jan
 Beulich" , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Alistair Francis , "Bob
 Eshleman" , Connor Davis ,
	Oleksii Kurochko , Stefano Stabellini
	, Sergiy Kibrik 
Subject: [PATCH v3 19/20] xen/sysctl: wrap around arch-specific arch_do_sysctl
Date: Mon, 21 Apr 2025 15:37:22 +0800
Message-ID: <20250421073723.3863060-20-Penny.Zheng@amd.com>
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Function arch_do_sysctl is to perform arch-specific sysctl op.
Some functions, like psr_get_info for x86, DTB overlay support for arm,
are solely available through sysctl op, then they all shall be wrapped
with CONFIG_SYSCTL

Also, remove all #ifdef CONFIG_SYSCTL-s in arch-specific sysctl.c, as
we put the guardian in Makefile for the whole file.
Since PV_SHIM_EXCLUSIVE needs sorting as a prereq in the future, we move
obj-$(CONFIG_SYSCTL) += sysctl.o out of PV_SHIM_EXCLUSIVE condition.

Signed-off-by: Stefano Stabellini 
Signed-off-by: Sergiy Kibrik 
Signed-off-by: Penny Zheng 
---
- use "depends on" for config OVERLAY_DTB
- no need to wrap declaration
- add transient #ifdef in sysctl.c for correct compilation
---
v2 -> v3
- move obj-$(CONFIG_SYSCTL) += sysctl.o out of PV_SHIM_EXCLUSIVE condition
- move copyback out of #ifdef
- add #else process for default label
---
 xen/arch/arm/Kconfig   |  1 +
 xen/arch/arm/Makefile  |  2 +-
 xen/arch/arm/sysctl.c  |  2 --
 xen/arch/riscv/stubs.c |  2 +-
 xen/arch/x86/Makefile  |  2 +-
 xen/arch/x86/psr.c     | 18 ++++++++++++++++++
 xen/arch/x86/sysctl.c  |  2 --
 xen/common/sysctl.c    |  4 ++++
 8 files changed, 26 insertions(+), 7 deletions(-)

diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig
index da8a406f5a..9ac015b0cd 100644
--- a/xen/arch/arm/Kconfig
+++ b/xen/arch/arm/Kconfig
@@ -144,6 +144,7 @@ config HAS_ITS
 
 config OVERLAY_DTB
 	bool "DTB overlay support (UNSUPPORTED)" if UNSUPPORTED
+	depends on SYSCTL
 	help
 	  Dynamic addition/removal of Xen device tree nodes using a dtbo.
 
diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile
index 4837ad467a..7c6015b84d 100644
--- a/xen/arch/arm/Makefile
+++ b/xen/arch/arm/Makefile
@@ -54,7 +54,7 @@ obj-y += smpboot.o
 obj-$(CONFIG_STATIC_EVTCHN) += static-evtchn.init.o
 obj-$(CONFIG_STATIC_MEMORY) += static-memory.init.o
 obj-$(CONFIG_STATIC_SHM) += static-shmem.init.o
-obj-y += sysctl.o
+obj-$(CONFIG_SYSCTL) += sysctl.o
 obj-y += time.o
 obj-y += traps.o
 obj-y += vcpreg.o
diff --git a/xen/arch/arm/sysctl.c b/xen/arch/arm/sysctl.c
index 2d350b700a..32cab4feff 100644
--- a/xen/arch/arm/sysctl.c
+++ b/xen/arch/arm/sysctl.c
@@ -15,7 +15,6 @@
 #include 
 #include 
 
-#ifdef CONFIG_SYSCTL
 void arch_do_physinfo(struct xen_sysctl_physinfo *pi)
 {
     pi->capabilities |= XEN_SYSCTL_PHYSCAP_hvm | XEN_SYSCTL_PHYSCAP_hap;
@@ -23,7 +22,6 @@ void arch_do_physinfo(struct xen_sysctl_physinfo *pi)
     pi->arch_capabilities |= MASK_INSR(sve_encode_vl(get_sys_vl_len()),
                                        XEN_SYSCTL_PHYSCAP_ARM_SVE_MASK);
 }
-#endif
 
 long arch_do_sysctl(struct xen_sysctl *sysctl,
                     XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)
diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c
index 295456d0c8..cb9b90591a 100644
--- a/xen/arch/riscv/stubs.c
+++ b/xen/arch/riscv/stubs.c
@@ -315,13 +315,13 @@ unsigned long raw_copy_from_guest(void *to, const void __user *from,
 
 /* sysctl.c */
 
+#ifdef CONFIG_SYSCTL
 long arch_do_sysctl(struct xen_sysctl *sysctl,
                     XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)
 {
     BUG_ON("unimplemented");
 }
 
-#ifdef CONFIG_SYSCTL
 void arch_do_physinfo(struct xen_sysctl_physinfo *pi)
 {
     BUG_ON("unimplemented");
diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
index f59c9665fd..1602f4fd21 100644
--- a/xen/arch/x86/Makefile
+++ b/xen/arch/x86/Makefile
@@ -64,6 +64,7 @@ obj-y += smpboot.o
 obj-y += spec_ctrl.o
 obj-y += srat.o
 obj-y += string.o
+obj-$(CONFIG_SYSCTL) += sysctl.o
 obj-y += time.o
 obj-y += traps-setup.o
 obj-y += traps.o
@@ -79,7 +80,6 @@ ifneq ($(CONFIG_PV_SHIM_EXCLUSIVE),y)
 obj-y += domctl.o
 obj-y += platform_hypercall.o
 obj-$(CONFIG_COMPAT) += x86_64/platform_hypercall.o
-obj-y += sysctl.o
 endif
 
 extra-y += asm-macros.i
diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c
index 5815a35335..499d320e61 100644
--- a/xen/arch/x86/psr.c
+++ b/xen/arch/x86/psr.c
@@ -133,9 +133,11 @@ static const struct feat_props {
      */
     enum psr_type alt_type;
 
+#ifdef CONFIG_SYSCTL
     /* get_feat_info is used to return feature HW info through sysctl. */
     bool (*get_feat_info)(const struct feat_node *feat,
                           uint32_t data[], unsigned int array_len);
+#endif
 
     /* write_msr is used to write out feature MSR register. */
     void (*write_msr)(unsigned int cos, uint32_t val, enum psr_type type);
@@ -418,6 +420,7 @@ static bool mba_init_feature(const struct cpuid_leaf *regs,
     return true;
 }
 
+#ifdef CONFIG_SYSCTL
 static bool cf_check cat_get_feat_info(
     const struct feat_node *feat, uint32_t data[], unsigned int array_len)
 {
@@ -430,6 +433,7 @@ static bool cf_check cat_get_feat_info(
 
     return true;
 }
+#endif /* CONFIG_SYSCTL */
 
 /* L3 CAT props */
 static void cf_check l3_cat_write_msr(
@@ -442,11 +446,14 @@ static const struct feat_props l3_cat_props = {
     .cos_num = 1,
     .type[0] = PSR_TYPE_L3_CBM,
     .alt_type = PSR_TYPE_UNKNOWN,
+#ifdef CONFIG_SYSCTL
     .get_feat_info = cat_get_feat_info,
+#endif
     .write_msr = l3_cat_write_msr,
     .sanitize = cat_check_cbm,
 };
 
+#ifdef CONFIG_SYSCTL
 /* L3 CDP props */
 static bool cf_check l3_cdp_get_feat_info(
     const struct feat_node *feat, uint32_t data[], uint32_t array_len)
@@ -458,6 +465,7 @@ static bool cf_check l3_cdp_get_feat_info(
 
     return true;
 }
+#endif /* CONFIG_SYSCTL */
 
 static void cf_check l3_cdp_write_msr(
     unsigned int cos, uint32_t val, enum psr_type type)
@@ -473,7 +481,9 @@ static const struct feat_props l3_cdp_props = {
     .type[0] = PSR_TYPE_L3_DATA,
     .type[1] = PSR_TYPE_L3_CODE,
     .alt_type = PSR_TYPE_L3_CBM,
+#ifdef CONFIG_SYSCTL
     .get_feat_info = l3_cdp_get_feat_info,
+#endif
     .write_msr = l3_cdp_write_msr,
     .sanitize = cat_check_cbm,
 };
@@ -489,11 +499,14 @@ static const struct feat_props l2_cat_props = {
     .cos_num = 1,
     .type[0] = PSR_TYPE_L2_CBM,
     .alt_type = PSR_TYPE_UNKNOWN,
+#ifdef CONFIG_SYSCTL
     .get_feat_info = cat_get_feat_info,
+#endif
     .write_msr = l2_cat_write_msr,
     .sanitize = cat_check_cbm,
 };
 
+#ifdef CONFIG_SYSCTL
 /* MBA props */
 static bool cf_check mba_get_feat_info(
     const struct feat_node *feat, uint32_t data[], unsigned int array_len)
@@ -508,6 +521,7 @@ static bool cf_check mba_get_feat_info(
 
     return true;
 }
+#endif /* CONFIG_SYSCTL */
 
 static void cf_check mba_write_msr(
     unsigned int cos, uint32_t val, enum psr_type type)
@@ -545,7 +559,9 @@ static const struct feat_props mba_props = {
     .cos_num = 1,
     .type[0] = PSR_TYPE_MBA_THRTL,
     .alt_type = PSR_TYPE_UNKNOWN,
+#ifdef CONFIG_SYSCTL
     .get_feat_info = mba_get_feat_info,
+#endif
     .write_msr = mba_write_msr,
     .sanitize = mba_sanitize_thrtl,
 };
@@ -808,6 +824,7 @@ static struct psr_socket_info *get_socket_info(unsigned int socket)
     return socket_info + socket;
 }
 
+#ifdef CONFIG_SYSCTL
 int psr_get_info(unsigned int socket, enum psr_type type,
                  uint32_t data[], unsigned int array_len)
 {
@@ -839,6 +856,7 @@ int psr_get_info(unsigned int socket, enum psr_type type,
 
     return -EINVAL;
 }
+#endif /* CONFIG_SYSCTL */
 
 int psr_get_val(struct domain *d, unsigned int socket,
                 uint32_t *val, enum psr_type type)
diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c
index f64addbe2b..1b04947516 100644
--- a/xen/arch/x86/sysctl.c
+++ b/xen/arch/x86/sysctl.c
@@ -91,7 +91,6 @@ static long cf_check smt_up_down_helper(void *data)
     return ret;
 }
 
-#ifdef CONFIG_SYSCTL
 void arch_do_physinfo(struct xen_sysctl_physinfo *pi)
 {
     memcpy(pi->hw_cap, boot_cpu_data.x86_capability,
@@ -105,7 +104,6 @@ void arch_do_physinfo(struct xen_sysctl_physinfo *pi)
     if ( IS_ENABLED(CONFIG_SHADOW_PAGING) )
         pi->capabilities |= XEN_SYSCTL_PHYSCAP_shadow;
 }
-#endif /* CONFIG_SYSCTL */
 
 long arch_do_sysctl(
     struct xen_sysctl *sysctl, XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)
diff --git a/xen/common/sysctl.c b/xen/common/sysctl.c
index b4feb07e60..85a1adacdd 100644
--- a/xen/common/sysctl.c
+++ b/xen/common/sysctl.c
@@ -493,7 +493,11 @@ long do_sysctl(XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)
         break;
 
     default:
+#ifdef CONFIG_SYSCTL
         ret = arch_do_sysctl(op, u_sysctl);
+#else
+        ret = -EOPNOTSUPP;
+#endif
         copyback = 0;
         break;
     }
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , Penny Zheng , Andrew Cooper
	, Anthony PERARD ,
	Michal Orzel , Jan Beulich , "Julien
 Grall" , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Stefano Stabellini 
Subject: [PATCH v3 17/20] xen/sysctl: make CONFIG_COVERAGE depend on CONFIG_SYSCTL
Date: Mon, 21 Apr 2025 15:37:20 +0800
Message-ID: <20250421073723.3863060-18-Penny.Zheng@amd.com>
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All coverage-related op shall be wrapped around with CONFIG_SYSCTL,
so this commit makes CONFIG_COVERAGE depend on CONFIG_SYSCTL.

Signed-off-by: Penny Zheng 
Reviewed-by: Stefano Stabellini 
---
v1 -> v2:
- commit message refactor
---
 xen/Kconfig.debug | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/Kconfig.debug b/xen/Kconfig.debug
index f7cc5ffaab..84d26b3f46 100644
--- a/xen/Kconfig.debug
+++ b/xen/Kconfig.debug
@@ -37,7 +37,7 @@ config SELF_TESTS
 
 config COVERAGE
 	bool "Code coverage support"
-	depends on !LIVEPATCH
+	depends on !LIVEPATCH && SYSCTL
 	select SUPPRESS_DUPLICATE_SYMBOL_WARNINGS if !ENFORCE_UNIQUE_SYMBOLS
 	help
 	  Enable code coverage support.
-- 
2.34.1



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From: Penny Zheng 
To: 
CC: , Penny Zheng , Dario Faggioli
	, Juergen Gross , George Dunlap
	, Andrew Cooper , "Anthony
 PERARD" , Michal Orzel ,
	"Jan Beulich" , Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , "Stefano
 Stabellini" 
Subject: [PATCH v3 13/20] xen/sysctl: wrap around XEN_SYSCTL_cpupool_op
Date: Mon, 21 Apr 2025 15:37:16 +0800
Message-ID: <20250421073723.3863060-14-Penny.Zheng@amd.com>
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Function cpupool_do_sysctl is designed for doing cpupool related sysctl
operations, and shall be wrapped.

The following static functions are only called by cpupool_do_sysctl(), then
shall be wrapped too:
- cpupool_get_next_by_id
- cpupool_destroy
- cpupool_unassign_cpu_helper
- cpupool_unassign_cpu

Signed-off-by: Penny Zheng 
Reviewed-by: Stefano Stabellini 
---
v1 -> v2:
- no need to wrap declaration
- add transient #ifdef in sysctl.c for correct compilation
---
v2 -> v3
- move #endif up ahead of the blank line
---
 xen/common/sched/cpupool.c | 8 ++++++++
 xen/common/sysctl.c        | 2 +-
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/xen/common/sched/cpupool.c b/xen/common/sched/cpupool.c
index 3d02c7b706..f5459c2779 100644
--- a/xen/common/sched/cpupool.c
+++ b/xen/common/sched/cpupool.c
@@ -241,10 +241,12 @@ struct cpupool *cpupool_get_by_id(unsigned int poolid)
     return __cpupool_get_by_id(poolid, true);
 }
 
+#ifdef CONFIG_SYSCTL
 static struct cpupool *cpupool_get_next_by_id(unsigned int poolid)
 {
     return __cpupool_get_by_id(poolid, false);
 }
+#endif /* CONFIG_SYSCTL */
 
 void cpupool_put(struct cpupool *pool)
 {
@@ -352,6 +354,7 @@ static struct cpupool *cpupool_create(unsigned int poolid,
 
     return ERR_PTR(ret);
 }
+#ifdef CONFIG_SYSCTL
 /*
  * destroys the given cpupool
  * returns 0 on success, 1 else
@@ -379,6 +382,7 @@ static int cpupool_destroy(struct cpupool *c)
     debugtrace_printk("cpupool_destroy(pool=%u)\n", c->cpupool_id);
     return 0;
 }
+#endif /* CONFIG_SYSCTL */
 
 /*
  * Move domain to another cpupool
@@ -568,6 +572,7 @@ static int cpupool_unassign_cpu_start(struct cpupool *c, unsigned int cpu)
     return ret;
 }
 
+#ifdef CONFIG_SYSCTL
 static long cf_check cpupool_unassign_cpu_helper(void *info)
 {
     struct cpupool *c = info;
@@ -633,6 +638,7 @@ static int cpupool_unassign_cpu(struct cpupool *c, unsigned int cpu)
     }
     return continue_hypercall_on_cpu(work_cpu, cpupool_unassign_cpu_helper, c);
 }
+#endif /* CONFIG_SYSCTL */
 
 /*
  * add a new domain to a cpupool
@@ -810,6 +816,7 @@ static void cpupool_cpu_remove_forced(unsigned int cpu)
     rcu_read_unlock(&sched_res_rculock);
 }
 
+#ifdef CONFIG_SYSCTL
 /*
  * do cpupool related sysctl operations
  */
@@ -975,6 +982,7 @@ int cpupool_do_sysctl(struct xen_sysctl_cpupool_op *op)
 
     return ret;
 }
+#endif /* CONFIG_SYSCTL */
 
 unsigned int cpupool_get_id(const struct domain *d)
 {
diff --git a/xen/common/sysctl.c b/xen/common/sysctl.c
index 504e3516c3..767e0b7389 100644
--- a/xen/common/sysctl.c
+++ b/xen/common/sysctl.c
@@ -252,11 +252,11 @@ long do_sysctl(XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)
         copyback = 0;
     }
     break;
-#endif /* CONFIG_SYSCTL */
 
     case XEN_SYSCTL_cpupool_op:
         ret = cpupool_do_sysctl(&op->u.cpupool_op);
         break;
+#endif /* CONFIG_SYSCTL */
 
     case XEN_SYSCTL_scheduler_op:
         ret = sched_adjust_global(&op->u.scheduler_op);
-- 
2.34.1



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From: REIMA ISHII 
Date: Tue, 22 Apr 2025 02:53:49 +0900
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Message-ID: 
Subject: Re: [BUG] Nested Virtualization Bug on x86-64 AMD CPU
To: Andrew Cooper 
Cc: xen-devel@lists.xenproject.org, 
	Takahiro Shinagawa 
Content-Type: multipart/alternative; boundary="00000000000091ce4206334d8dec"

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I am writing to follow up on the bug report I sent, regarding a BUG()
triggered in Xen when performing a nested VMRUN with CR0.PG=3D0 in Long
Mode. The issue was discussed with Andrew Cooper at that time, and I
would like to check if there have been any updates or plans for
addressing this issue.

To briefly recap:
- The problem occurs when an L1 hypervisor, while in 64-bit mode,
executes VMRUN with CR0.PG=3D0 in VMCB12, targeting a 64-bit L2 guest.
- Instead of raising VMEXIT_INVALID, the system encounters a BUG() at
`nsvm_vmcb_guest_intercepts_exitcode`.
- VMEXIT reason observed was 0x402 (AVIC_NOACCEL), although Xen does not
support AVIC.

Andrew pointed out that this could indicate either a missing validity
check (as the state LMA=3D1 && PG=3D0 is invalid) or possible memory
corruption.

Given that this issue could potentially allow a guest VM to trigger a
hypervisor panic, I believe it might be worth formally recognizing and
addressing.
May I kindly ask if this has been acknowledged as a bug internally, or
if there are any plans to handle this case safely (e.g., raising
VMEXIT_INVALID instead of BUG()) in future Xen releases?

Thank you very much for your time


On Wed, Dec 6, 2023 at 12:05=E2=80=AFPM Reima ISHII 
wrote:

> Thank you for your prompt response.
>
> On Tue, Dec 5, 2023 at 11:43=E2=80=AFPM Andrew Cooper 
> wrote:
> > Who is still in 64-bit mode ?
> >
> > It is legal for a 64-bit L1 to VMRUN into a 32-bit L2 with PG=3D0.
> >
> > But I'm guessing that you mean L2 is also 64-bit, and we're clearing PG=
,
> > thus creating an illegal state (LMA=3D1 && PG=3D0) in VMCB12.
> >
> > And yes, in that case (virtual) VMRUN at L1 ought to fail with
> > VMEXIT_INVALID.
>
> Yes, you are correct in your understanding. This issue is triggered by
> VMRUN execution to 64-bit L2 guests, when CR0.PG is cleared in VMCB12.
> Contrary to the expected behavior where a VMRUN at L1 should fail with
> VMEXIT_INVALID, the VMRUN does not fail but instead, the system
> encounters a BUG().
>
> > As an incidental observation, that function is particularly absurd and
> > the two switches should be merged.
> >
> > VMExit reason 0x402 is AVIC_NOACCEL and Xen has no support for AVIC in
> > the slightest right now.  i.e. Xen shouldn't have AVIC active in the
> > VMCB, and should never any AVIC related VMExits.
> >
> > It is possible that we've got memory corruption, and have accidentally
> > activated AVIC in the VMCB.
>
> The idea of potential memory corruption activating AVIC in the VMCB is
> certainly an interesting perspective. While I'm not sure how exactly
> such memory corruption could occur, the suggestion does provide a
> compelling explanation for the VMExit reason 0x402 (AVIC_NOACCEL),
> particularly considering Xen's current lack of AVIC support.
>
> > But, is this by any chance all running nested under KVM in your fuzzer?
>
> No, KVM was not used. The issue was observed on a Xen hypervisor's
> domU HVM running directly on the hardware. Within the guest HVM, a
> simple custom hypervisor was utilized.
>
> --
> Graduate School of Information Science and Technology, The University of
> Tokyo
> Reima Ishii
> ishiir@g.ecc.u-tokyo.ac.jp
>


--=20
=E6=9D=B1=E4=BA=AC=E5=A4=A7=E5=AD=A6=E5=A4=A7=E5=AD=A6=E9=99=A2 =E6=83=85=
=E5=A0=B1=E7=90=86=E5=B7=A5=E5=AD=A6=E7=B3=BB=E7=A0=94=E7=A9=B6=E7=A7=91 =
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=94=BB =E4=BF=AE=E5=A3=AB2=E5=B9=B4
=E7=9F=B3=E4=BA=95=E7=8E=B2=E7=9C=9F
ishiir@g.ecc.u-tokyo.ac.jp

--00000000000091ce4206334d8dec
Content-Type: text/html; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable


I am writing to follow up on the bug report I sent, regard=
ing a BUG()
triggered in Xen when performing a nested VMRUN with CR0.PG=3D0 in Long
Mode. The issue was discussed =
with Andrew Cooper at that time, and I
would like to check if there have=
 been any updates or plans for
addressing this issue.

To briefly =
recap:
- The problem occurs when an L1 hypervisor, while in 64-bit mode,=

executes VMRUN with CR0.PG=3D0 in VMCB12,=
 targeting a 64-bit L2 guest.
- Instead of raising VMEXIT_INVALID, the s=
ystem encounters a BUG() at
`nsvm_vmcb_guest_intercepts_exitcode`.
- =
VMEXIT reason observed was 0x402 (AVIC_NOACCEL), although Xen does not
s=
upport AVIC.

Andrew pointed out that this could indicate either a mi=
ssing validity
check (as the state LMA=3D1 && PG=3D0 is invalid)=
 or possible memory
corruption.

Given that this issue could poten=
tially allow a guest VM to trigger a
hypervisor panic, I believe it migh=
t be worth formally recognizing and
addressing.
May I kindly ask if t=
his has been acknowledged as a bug internally, or
if there are any plans=
 to handle this case safely (e.g., raising
VMEXIT_INVALID instead of BUG=
()) in future Xen releases?

Thank you very much for your time
<=
br>
On Wed, Dec 6, 2023 at 12:05=E2=80=AFPM Reima ISHII <=
ishiir@g.ecc.u-tokyo.ac.jp> wrote:
Tha=
nk you for your prompt response.



On Tue, Dec 5, 2023 at 11:43=E2=80=AFPM Andrew Cooper <andrew.cooper3@citrix.com=
> wrote:

> Who is still in 64-bit mode ?

>

> It is legal for a 64-bit L1 to VMRUN into a 32-bit L2 with PG=3D0.

>

> But I'm guessing that you mean L2 is also 64-bit, and we're cl=
earing PG,

> thus creating an illegal state (LMA=3D1 && PG=3D0) in VMCB12.<=
br>
>

> And yes, in that case (virtual) VMRUN at L1 ought to fail with

> VMEXIT_INVALID.



Yes, you are correct in your understanding. This issue is triggered by

VMRUN execution to 64-bit L2 guests, when CR0.PG is cleared in VMCB12.

Contrary to the expected behavior where a VMRUN at L1 should fail with

VMEXIT_INVALID, the VMRUN does not fail but instead, the system

encounters a BUG().



> As an incidental observation, that function is particularly absurd and=


> the two switches should be merged.

>

> VMExit reason 0x402 is AVIC_NOACCEL and Xen has no support for AVIC in=


> the slightest right now.=C2=A0 i.e. Xen shouldn't have AVIC active=
 in the

> VMCB, and should never any AVIC related VMExits.

>

> It is possible that we've got memory corruption, and have accident=
ally

> activated AVIC in the VMCB.



The idea of potential memory corruption activating AVIC in the VMCB is

certainly an interesting perspective. While I'm not sure how exactly
such memory corruption could occur, the suggestion does provide a

compelling explanation for the VMExit reason 0x402 (AVIC_NOACCEL),

particularly considering Xen's current lack of AVIC support.



> But, is this by any chance all running nested under KVM in your fuzzer=
?



No, KVM was not used. The issue was observed on a Xen hypervisor's

domU HVM running directly on the hardware. Within the guest HVM, a

simple custom hypervisor was utilized.



-- 

Graduate School of Information Science and Technology, The University of To=
kyo

Reima Ishii

ishiir@g.ec=
c.u-tokyo.ac.jp




-- 
=E6=9D=B1=E4=BA=AC=E5=A4=A7=E5=AD=A6=E5=A4=A7=E5=AD=A6=
=E9=99=A2 =E6=83=85=E5=A0=B1=E7=90=86=E5=B7=A5=E5=AD=A6=E7=B3=BB=E7=A0=94=
=E7=A9=B6=E7=A7=91 =E3=82=B7=E3=82=B9=E3=83=86=E3=83=A0=E6=83=85=E5=A0=B1=
=E5=AD=A6=E5=B0=82=E6=94=BB =E4=BF=AE=E5=A3=AB2=E5=B9=B4
=E7=9F=
=B3=E4=BA=95=E7=8E=B2=E7=9C=9F


--00000000000091ce4206334d8dec--


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From: REIMA ISHII 
Date: Tue, 22 Apr 2025 02:59:58 +0900
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Message-ID: 
Subject: Re: [BUG] Assertion failure with vmcb->_vintr.fields.vgif in nested SVM
To: xen-devel@lists.xenproject.org
Cc: Takahiro Shinagawa 
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Content-Transfer-Encoding: quoted-printable

Hi,
I would like to follow up on the bug report I sent regarding a nested
SVM issue in Xen, where an invalid CR4 value in VMCB12 leads to an
assertion failure during VMRUN.

As I haven't seen any updates or feedback, I wanted to kindly check if
this issue has been acknowledged internally, or if there are any plans
for addressing this case in future releases.

Since this issue can potentially cause a hypervisor panic, I believe it
would be valuable to handle this safely.

Thank you for your time


On Mon, Nov 13, 2023 at 4:36=E2=80=AFPM Reima ISHII  wrote:
>
> Hi Xen Development Team,
>
> I am reporting a potential bug in the nested SVM implementation of the
> Xen hypervisor, observed under specific conditions in a DomU HVM
> guest.
>
> L1 on the DomU HVM guest sets a bit in CR4 of the VMCB12 save area
> that is not part of hvm_cr4_guest_valid_bits and performs a VMRUN.
> Subsequently, hvm_set_cr4 on the xen hypervisor fails and
> nsvm_vcpu_vmexit_inject causes an assertion failure.
>
> The environment is as follows:
> - Xen Version: Xen-4.18-unstable (commit
> 290f82375d828ef93f831a5ef028f1283aa1ea47)
> - Architecture: x86_64 (AMD)
>
> The potential impact on system stability and release builds remains
> uncertain, but this issue might pose a problem and merits attention
> for improved robustness in nested virtualization scenarios.
>
> (XEN) arch/x86/hvm/svm/nestedsvm.c:554:d1v0 hvm_set_cr4 failed, rc: 2
> (XEN) d1v0[nsvm_vmcb_prepare4vmrun]: CR4: invalid value 0x20020 (valid
> 0x750fff, rejected 0x20000)
> (XEN) arch/x86/hvm/svm/nestedsvm.c:658:d1v0 virtual vmcb invalid
> (XEN) arch/x86/hvm/svm/nestedsvm.c:729:d1v0 prepare4vmrun failed, ret =3D=
 1
> (XEN) arch/x86/hvm/svm/nestedsvm.c:768:d1v0 inject VMEXIT(INVALID)
> (XEN) Assertion 'vmcb->_vintr.fields.vgif =3D=3D 0' failed at
> arch/x86/hvm/svm/nestedsvm.c:799
> (XEN) Debugging connection not set up.
> (XEN) ----[ Xen-4.18-unstable  x86_64  debug=3Dy gcov=3Dy  Tainted:   C  =
  ]----
> (XEN) CPU:    2
> (XEN) RIP:    e008:[] nsvm_vcpu_switch+0x34e/0x502
> (XEN) RFLAGS: 0000000000010202   CONTEXT: hypervisor (d1v0)
> (XEN) rax: ffff830839677000   rbx: ffff83083967b000   rcx: 00000000000000=
30
> (XEN) rdx: 0000000000000000   rsi: 0000000000000003   rdi: ffff83083967b0=
00
> (XEN) rbp: ffff83083abb7ee8   rsp: ffff83083abb7ed0   r8:  00000000000000=
10
> (XEN) r9:  0000000000750fff   r10: 0000000000040000   r11: 00000000000000=
00
> (XEN) r12: ffff83083abb7ef8   r13: ffffffffffffffff   r14: 00000000000000=
00
> (XEN) r15: 0000000000000000   cr0: 000000008005003b   cr4: 0000000000f506=
e0
> (XEN) cr3: 00000008397bb000   cr2: 0000000000000000
> (XEN) fsb: 0000000000000000   gsb: 0000000000000000   gss: 00000000000000=
00
> (XEN) ds: 0000   es: 0000   fs: 0033   gs: 0033   ss: 0000   cs: e008
> (XEN) Xen code around  (nsvm_vcpu_switch+0x34e/0x502):
> (XEN)  48 83 05 7a c5 3b 00 01 <0f> 0b 48 83 05 78 c5 3b 00 01 48 83 05 6=
0 c5 3b
> (XEN) Xen stack trace from rsp=3Dffff83083abb7ed0:
> (XEN)    ffff83083967b000 0000000000000000 0000000000000000 00007cf7c5448=
0e7
> (XEN)    ffff82d0402a49d6 0000000000000000 0000000000000000 0000000000000=
000
> (XEN)    0000000000000000 0000000000126000 0000000000000000 0000000000000=
000
> (XEN)    0000000000000000 0000000000000000 0000000000000000 0000000000126=
000
> (XEN)    0000000000000000 0000000000000000 0000000000000000 000000000012a=
f30
> (XEN)    0000beef0000beef 00000000001056f3 000000bf0000beef 0000000000000=
002
> (XEN)    000000000012af60 000000000000beef 800000083abfbeef 800000083abfb=
eef
> (XEN)    800000083abfbeef 800000083abfbeef 0000e01000000002 ffff83083967b=
000
> (XEN)    00000037fa582000 0000000000f506e0 0000000000000000 0000000000000=
000
> (XEN)    8000030300000000 800000083abff100
> (XEN) Xen call trace:
> (XEN)    [] R nsvm_vcpu_switch+0x34e/0x502
> (XEN)    [] F svm_asm_do_resume+0x16/0x187
> (XEN)
> (XEN) debugtrace_dump() global buffer starting
> 1 cpupool_create(pool=3D0,sched=3D6)
> 2 Created cpupool 0 with scheduler SMP Credit Scheduler rev2 (credit2)
> 3 cpupool_add_domain(dom=3D0,pool=3D0) n_dom 1 rc 0
> 4-14 p2m: p2m_alloc_table(): allocating p2m table
> 15 cpupool_add_domain(dom=3D1,pool=3D0) n_dom 2 rc 0
> (XEN) wrap: 0
> (XEN) debugtrace_dump() global buffer finished
> (XEN)
> (XEN) ****************************************
> (XEN) Panic on CPU 2:
> (XEN) Assertion 'vmcb->_vintr.fields.vgif =3D=3D 0' failed at
> arch/x86/hvm/svm/nestedsvm.c:799
> (XEN) ****************************************
>
> Thanks,
>
> --
> Graduate School of Information Science and Technology, The University of =
Tokyo
> Reima Ishii
> ishiir@g.ecc.u-tokyo.ac.jp



--=20
Graduate School of Information Science and Technology, The University of To=
kyo
Reima Ishii
ishiir@g.ecc.u-tokyo.ac.jp


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Date: Mon, 21 Apr 2025 20:52:37 +0100
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Subject: Re: [BUG] Assertion failure with vmcb->_vintr.fields.vgif in nested
 SVM
To: xen-devel@lists.xenproject.org, REIMA ISHII 
References: 
 
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From: Andrew Cooper 
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Cc: Takahiro Shinagawa 
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On 21/04/2025 6:59 pm, REIMA ISHII wrote:
> Hi,
> I would like to follow up on the bug report I sent regarding a nested
> SVM issue in Xen, where an invalid CR4 value in VMCB12 leads to an
> assertion failure during VMRUN.
>
> As I haven't seen any updates or feedback, I wanted to kindly check if
> this issue has been acknowledged internally, or if there are any plans
> for addressing this case in future releases.
>
> Since this issue can potentially cause a hypervisor panic, I believe it
> would be valuable to handle this safely.
>
> Thank you for your time

Sorry, both issues fell between the cracks.

I've opened https://gitlab.com/xen-project/xen/-/issues/215 and so it
doesn't get lost again.

> On Mon, Nov 13, 2023 at 4:36 PM Reima ISHII  wrote:
>> Hi Xen Development Team,
>>
>> I am reporting a potential bug in the nested SVM implementation of the
>> Xen hypervisor, observed under specific conditions in a DomU HVM
>> guest.
>>
>> L1 on the DomU HVM guest sets a bit in CR4 of the VMCB12 save area
>> that is not part of hvm_cr4_guest_valid_bits and performs a VMRUN.
>> Subsequently, hvm_set_cr4 on the xen hypervisor fails and
>> nsvm_vcpu_vmexit_inject causes an assertion failure.
>>
>> The environment is as follows:
>> - Xen Version: Xen-4.18-unstable (commit
>> 290f82375d828ef93f831a5ef028f1283aa1ea47)
>> - Architecture: x86_64 (AMD)
>>
>> The potential impact on system stability and release builds remains
>> uncertain, but this issue might pose a problem and merits attention
>> for improved robustness in nested virtualization scenarios.
>>
>> (XEN) arch/x86/hvm/svm/nestedsvm.c:554:d1v0 hvm_set_cr4 failed, rc: 2
>> (XEN) d1v0[nsvm_vmcb_prepare4vmrun]: CR4: invalid value 0x20020 (valid
>> 0x750fff, rejected 0x20000)
>> (XEN) arch/x86/hvm/svm/nestedsvm.c:658:d1v0 virtual vmcb invalid
>> (XEN) arch/x86/hvm/svm/nestedsvm.c:729:d1v0 prepare4vmrun failed, ret = 1
>> (XEN) arch/x86/hvm/svm/nestedsvm.c:768:d1v0 inject VMEXIT(INVALID)
>> (XEN) Assertion 'vmcb->_vintr.fields.vgif == 0' failed at
>> arch/x86/hvm/svm/nestedsvm.c:799
>> (XEN) Debugging connection not set up.
>> (XEN) ----[ Xen-4.18-unstable  x86_64  debug=y gcov=y  Tainted:   C    ]----
>> (XEN) CPU:    2
>> (XEN) RIP:    e008:[] nsvm_vcpu_switch+0x34e/0x502
>> (XEN) RFLAGS: 0000000000010202   CONTEXT: hypervisor (d1v0)
>> (XEN) rax: ffff830839677000   rbx: ffff83083967b000   rcx: 0000000000000030
>> (XEN) rdx: 0000000000000000   rsi: 0000000000000003   rdi: ffff83083967b000
>> (XEN) rbp: ffff83083abb7ee8   rsp: ffff83083abb7ed0   r8:  0000000000000010
>> (XEN) r9:  0000000000750fff   r10: 0000000000040000   r11: 0000000000000000
>> (XEN) r12: ffff83083abb7ef8   r13: ffffffffffffffff   r14: 0000000000000000
>> (XEN) r15: 0000000000000000   cr0: 000000008005003b   cr4: 0000000000f506e0
>> (XEN) cr3: 00000008397bb000   cr2: 0000000000000000
>> (XEN) fsb: 0000000000000000   gsb: 0000000000000000   gss: 0000000000000000
>> (XEN) ds: 0000   es: 0000   fs: 0033   gs: 0033   ss: 0000   cs: e008
>> (XEN) Xen code around  (nsvm_vcpu_switch+0x34e/0x502):
>> (XEN)  48 83 05 7a c5 3b 00 01 <0f> 0b 48 83 05 78 c5 3b 00 01 48 83 05 60 c5 3b
>> (XEN) Xen stack trace from rsp=ffff83083abb7ed0:
>> (XEN)    ffff83083967b000 0000000000000000 0000000000000000 00007cf7c54480e7
>> (XEN)    ffff82d0402a49d6 0000000000000000 0000000000000000 0000000000000000
>> (XEN)    0000000000000000 0000000000126000 0000000000000000 0000000000000000
>> (XEN)    0000000000000000 0000000000000000 0000000000000000 0000000000126000
>> (XEN)    0000000000000000 0000000000000000 0000000000000000 000000000012af30
>> (XEN)    0000beef0000beef 00000000001056f3 000000bf0000beef 0000000000000002
>> (XEN)    000000000012af60 000000000000beef 800000083abfbeef 800000083abfbeef
>> (XEN)    800000083abfbeef 800000083abfbeef 0000e01000000002 ffff83083967b000
>> (XEN)    00000037fa582000 0000000000f506e0 0000000000000000 0000000000000000
>> (XEN)    8000030300000000 800000083abff100
>> (XEN) Xen call trace:
>> (XEN)    [] R nsvm_vcpu_switch+0x34e/0x502
>> (XEN)    [] F svm_asm_do_resume+0x16/0x187
>> (XEN)
>> (XEN) debugtrace_dump() global buffer starting
>> 1 cpupool_create(pool=0,sched=6)
>> 2 Created cpupool 0 with scheduler SMP Credit Scheduler rev2 (credit2)
>> 3 cpupool_add_domain(dom=0,pool=0) n_dom 1 rc 0
>> 4-14 p2m: p2m_alloc_table(): allocating p2m table
>> 15 cpupool_add_domain(dom=1,pool=0) n_dom 2 rc 0
>> (XEN) wrap: 0
>> (XEN) debugtrace_dump() global buffer finished
>> (XEN)
>> (XEN) ****************************************
>> (XEN) Panic on CPU 2:
>> (XEN) Assertion 'vmcb->_vintr.fields.vgif == 0' failed at
>> arch/x86/hvm/svm/nestedsvm.c:799
>> (XEN) ****************************************

This is fun.  The ASSERT() is incorrect, but that's also not the real
issue here.

The real bug is trying to raise #GP in the virtual vmentry path because
of bad control register state.  It should trigger a virtual vmexit
reporting VMEXIT_INVALID.

As for the ASSERT(), (v)GIF blocks external interrupts (inc INIT, NMI
and any #MC which can be delayed).  It does not block exceptions, so a
#GP ought to be able to be injected like this.


The real issue here is the reuse of the helpers for main `MOV CR`.  They
simply don't behave correctly for nested virt. 

Unfortunately, this is going to be quite complicated to fix.  I have no
idea when I'm going to have enough time to look into this.

~Andrew


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Subject: Re: [BUG] Nested Virtualization Bug on x86-64 AMD CPU
To: REIMA ISHII 
Cc: xen-devel@lists.xenproject.org,
 Takahiro Shinagawa 
References: 
 <1415ddc9-81f3-4d50-b735-7e44a7f656d5@citrix.com>
 
 
Content-Language: en-GB
From: Andrew Cooper 
Autocrypt: addr=andrew.cooper3@citrix.com; keydata=
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In-Reply-To: 
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On 21/04/2025 6:53 pm, REIMA ISHII wrote:
> I am writing to follow up on the bug report I sent, regarding a BUG()
> triggered in Xen when performing a nested VMRUN with CR0.PG
> =0 in Long
> Mode. The issue was discussed with Andrew Cooper at that time, and I
> would like to check if there have been any updates or plans for
> addressing this issue.
>
> To briefly recap:
> - The problem occurs when an L1 hypervisor, while in 64-bit mode,
> executes VMRUN with CR0.PG =0 in VMCB12, targeting a
> 64-bit L2 guest.
> - Instead of raising VMEXIT_INVALID, the system encounters a BUG() at
> `nsvm_vmcb_guest_intercepts_exitcode`.
> - VMEXIT reason observed was 0x402 (AVIC_NOACCEL), although Xen does not
> support AVIC.
>
> Andrew pointed out that this could indicate either a missing validity
> check (as the state LMA=1 && PG=0 is invalid) or possible memory
> corruption.
>
> Given that this issue could potentially allow a guest VM to trigger a
> hypervisor panic, I believe it might be worth formally recognizing and
> addressing.
> May I kindly ask if this has been acknowledged as a bug internally, or
> if there are any plans to handle this case safely (e.g., raising
> VMEXIT_INVALID instead of BUG()) in future Xen releases?
>
> Thank you very much for your time

Sorry, also fell between the cracks.  I've opened
https://gitlab.com/xen-project/xen/-/issues/216

Again, no idea when I'll have time to look into this.

~Andrew


From xen-devel-bounces@lists.xenproject.org Mon Apr 21 20:39:39 2025
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Date: Mon, 21 Apr 2025 13:39:21 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: dmkhn@proton.me
cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, 
    cardoe@cardoe.com, marmarek@invisiblethingslab.com, sstabellini@kernel.org, 
    dmukhin@ford.com
Subject: Re: [PATCH v2 1/4] CI: unify x86 XTF test runner
In-Reply-To: <20250419010319.2572518-2-dmukhin@ford.com>
Message-ID: 
References: <20250419010319.2572518-1-dmukhin@ford.com> <20250419010319.2572518-2-dmukhin@ford.com>
User-Agent: Alpine 2.22 (DEB 394 2020-01-19)
MIME-Version: 1.0
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On Sat, 19 Apr 2025, dmkhn@proton.me wrote:
> From: Denis Mukhin 
> 
> Add test runner script qemu-xtf.sh which is allows any XTF x86 test to be
> easily executed. Test runner is invoked from the qemu-smoke* jobs with the
> hardcoded parameters.
> 
> Each x86 XTF job lead time is reduced a bit since only the test-related code
> is built, not the entire XTF project.
> 
> Add .gitignore to avoid committing test artifacts by mistake.
> 
> Signed-off-by: Denis Mukhin 
> ---
> Changes since v2:
> - removed TOP
> - dropped XEN_CONSOLE in favor of XEN_CMDLINE
> - fixup for XTF_SRC_CONFIG

Much better!


> ---
>  automation/gitlab-ci/test.yaml                |   8 +-
>  automation/scripts/.gitignore                 |   6 +
>  .../scripts/include/configs/xtf-x86-64-config |   0
>  automation/scripts/include/xtf-runner         | 131 ++++++++++++++++++
>  automation/scripts/include/xtf-x86-64         |  31 +++++
>  automation/scripts/qemu-smoke-x86-64.sh       |  26 ----
>  automation/scripts/qemu-xtf.sh                |  28 ++++
>  7 files changed, 200 insertions(+), 30 deletions(-)
>  create mode 100644 automation/scripts/.gitignore
>  create mode 100644 automation/scripts/include/configs/xtf-x86-64-config
>  create mode 100644 automation/scripts/include/xtf-runner
>  create mode 100644 automation/scripts/include/xtf-x86-64
>  delete mode 100755 automation/scripts/qemu-smoke-x86-64.sh
>  create mode 100755 automation/scripts/qemu-xtf.sh
> 
> diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml
> index 5ce445b78f..3adc841335 100644
> --- a/automation/gitlab-ci/test.yaml
> +++ b/automation/gitlab-ci/test.yaml
> @@ -659,28 +659,28 @@ qemu-alpine-x86_64-gcc:
>  qemu-smoke-x86-64-gcc:
>    extends: .qemu-smoke-x86-64
>    script:
> -    - ./automation/scripts/qemu-smoke-x86-64.sh pv 2>&1 | tee ${LOGFILE}
> +    - ./automation/scripts/qemu-xtf.sh x86-64 pv64 example 2>&1 | tee ${LOGFILE}
>    needs:
>      - debian-12-x86_64-gcc-debug
>  
>  qemu-smoke-x86-64-clang:
>    extends: .qemu-smoke-x86-64
>    script:
> -    - ./automation/scripts/qemu-smoke-x86-64.sh pv 2>&1 | tee ${LOGFILE}
> +    - ./automation/scripts/qemu-xtf.sh x86-64 pv64 example 2>&1 | tee ${LOGFILE}
>    needs:
>      - debian-12-x86_64-clang-debug
>  
>  qemu-smoke-x86-64-gcc-pvh:
>    extends: .qemu-smoke-x86-64
>    script:
> -    - ./automation/scripts/qemu-smoke-x86-64.sh pvh 2>&1 | tee ${LOGFILE}
> +    - ./automation/scripts/qemu-xtf.sh x86-64 hvm64 example 2>&1 | tee ${LOGFILE}
>    needs:
>      - debian-12-x86_64-gcc-debug
>  
>  qemu-smoke-x86-64-clang-pvh:
>    extends: .qemu-smoke-x86-64
>    script:
> -    - ./automation/scripts/qemu-smoke-x86-64.sh pvh 2>&1 | tee ${LOGFILE}
> +    - ./automation/scripts/qemu-xtf.sh x86-64 hvm64 example 2>&1 | tee ${LOGFILE}
>    needs:
>      - debian-12-x86_64-clang-debug
>  
> diff --git a/automation/scripts/.gitignore b/automation/scripts/.gitignore
> new file mode 100644
> index 0000000000..2f2d6e1ebd
> --- /dev/null
> +++ b/automation/scripts/.gitignore
> @@ -0,0 +1,6 @@
> +!include

Why !include ?


> +binaries
> +smoke.serial
> +xen
> +xtf*/
> diff --git a/automation/scripts/include/configs/xtf-x86-64-config b/automation/scripts/include/configs/xtf-x86-64-config
> new file mode 100644
> index 0000000000..e69de29bb2
> diff --git a/automation/scripts/include/xtf-runner b/automation/scripts/include/xtf-runner
> new file mode 100644
> index 0000000000..320eb65dc8
> --- /dev/null
> +++ b/automation/scripts/include/xtf-runner
> @@ -0,0 +1,131 @@
> +#!/bin/bash
> +#
> +# XTF test utilities.
> +#
> +# Environment variables:
> +#   BOOT_MSG: Expected boot message
> +#   FW_PREFIX: Firmware images path including '/' at the end
> +#   PASSED: XTF test printout in case of a pass
> +#   QEMU_PREFIX: QEMU path including '/' at the end
> +#   TEST_LOG: Output log file
> +#   UBOOT_CMD: U-Boot command line
> +#   WORKDIR: Test working directory
> +#   XEN_BINARY: Xen binary location
> +#   XEN_CONSOLE: Xen console device name
> +#   XTF_SRC_CONFIG: XTF config file
> +#   XTF_SRC_BRANCH: XTF branch
> +#   XTF_SRC_URI: XTF source code URI
> +
> +# Output log file
> +TEST_LOG="${TEST_LOG:-${XEN_ROOT}/smoke.serial}"
> +# XTF test printout in case of a pass
> +PASSED="${PASSED:-Test result: SUCCESS}"
> +# Expected boot message
> +BOOT_MSG="${BOOT_MSG:-Latest ChangeSet: }"
> +# Test working directory
> +WORKDIR="${WORKDIR:-${XEN_ROOT}/binaries}"
> +# XTF source code
> +XTF_SRC_CONFIG="${XTF_SRC_CONFIG:-include/configs/xtf-${ARCH}-config}"
> +
> +function die()
> +{
> +    set +x
> +    echo "FATAL: $*" >&2
> +    exit 1
> +}
> +
> +# Build an XTF test binary.
> +# $1 Test variant.
> +# $2 Test name.
> +function xtf_build_binary()
> +{
> +    local xtf_variant=$1
> +    local xtf_name=$2
> +    local xtf_dir="xtf-${ARCH}"
> +
> +    # Crude check for local testing
> +    if [ ! -d ${xtf_dir} ]; then
> +        git clone ${XTF_SRC_URI} ${xtf_dir} -b ${XTF_SRC_BRANCH}
> +    fi
> +
> +    make \
> +        -C ${xtf_dir} \
> +        -j$(nproc) \
> +        $(tr '\n' ' ' < ${XTF_SRC_CONFIG}) \
> +        TESTS=tests/${xtf_name}
> +
> +    export XTF_NAME="${xtf_name}"
> +    export XTF_VARIANT="${xtf_variant}"
> +    export XTF_WORKDIR="$(readlink -f ${xtf_dir})"
> +    export XTF_BINARY="${XTF_WORKDIR}/tests/${xtf_name}/test-${xtf_variant}-${xtf_name}"
> +}
> +
> +# Build Xen command line for running an XTF test.
> +# $1 Test variant.
> +# $2 Test name.
> +function xtf_build_cmdline()
> +{
> +    local xtf_variant=$1
> +    local xtf_name=$2
> +    declare -a cmdline=()
> +
> +    cmdline+=("${XEN_CMDLINE}")
> +
> +    # NB: OK to have hvm64, which is x86-only variant
> +    if [[ $xtf_variant == "hvm64" ]]; then
> +        cmdline+=("dom0-iommu=none dom0=pvh")
> +    fi
> +
> +    export XEN_CMDLINE="${cmdline[@]}"
> +}
> +
> +# Build an XTF test environment.
> +# $1 Test variant.
> +# $2 Test name.
> +function xtf_build_test()
> +{
> +    local v=$1
> +    local xtf_name=$2
> +    local xtf_variant=""
> +
> +    for x in ${XTF_SRC_VARIANTS}; do
> +        if [[ "${x}" == "${v}" ]]; then
> +            xtf_variant=${v}
> +            break
> +        fi
> +    done
> +    if [[ -z $xtf_variant ]]; then
> +        die "unsupported test variant '$1', supported variants: ${XTF_SRC_VARIANTS}"
> +    fi
> +
> +    xtf_build_binary ${xtf_variant} ${xtf_name}
> +    xtf_build_cmdline ${xtf_variant} ${xtf_name}
> +}
> +
> +# Execute an XTF test.
> +function xtf_run_test()
> +{
> +    rm -f ${TEST_LOG}
> +    export BOOT_MSG PASSED TEST_CMD TEST_LOG UBOOT_CMD
> +    ./console.exp | sed 's/\r\+$//'
> +}
> +
> +# Setup environment and run an XTF test.
> +# $1 Test variant.
> +# $2 Test name.
> +function xtf_test()
> +{
> +    # Out: FW_*, QEMU_*, XEN_{BINARY,CONSOLE}, XTF_SRC_*
> +    xtf_arch_prepare
> +
> +    # In: XTF_SRC_*
> +    # OUt: XTF_{BINARY,NAME,VARIANT,WORKDIR} and XEN_CMDLINE
> +    xtf_build_test $@
> +
> +    # In: FW_*, QEMU_*, XTF_*, XEN_*
> +    # Out: BOOT_MSG, PASSED, TEST_{CMD,LOG}, UBOOT_CMD
> +    xtf_arch_setup
> +
> +    # In: BOOT_MSG, PASSED, TEST_{CMD,LOG}, UBOOT_CMD
> +    xtf_run_test
> +}
> diff --git a/automation/scripts/include/xtf-x86-64 b/automation/scripts/include/xtf-x86-64
> new file mode 100644
> index 0000000000..b1b0cc201e
> --- /dev/null
> +++ b/automation/scripts/include/xtf-x86-64
> @@ -0,0 +1,31 @@
> +#!/bin/bash
> +#
> +# XTF test utilities (x86_64).
> +#
> +
> +# Arch-specific environment overrides.
> +function xtf_arch_prepare()
> +{
> +    export FW_PREFIX="${FW_PREFIX:-}"
> +    export QEMU_PREFIX="${QEMU_PREFIX:-}"
> +    export XEN_BINARY="${XEN_BINARY:-${WORKDIR}/xen}"
> +    export XEN_CMDLINE="${XEN_CMDLINE:-loglvl=all noreboot console_timestamps=boot console=com1}"
> +    export XTF_SRC_BRANCH="${XTF_SRC_BRANCH:-master}"
> +    export XTF_SRC_URI="${XTF_SRC_URI:-https://xenbits.xen.org/git-http/xtf.git}"
> +    export XTF_SRC_VARIANTS="hvm64 pv64"
> +}
> +
> +# Perform arch-specific XTF environment setup.
> +function xtf_arch_setup()
> +{
> +    export TEST_CMD="${QEMU_PREFIX}qemu-system-x86_64 \
> +        -no-reboot \
> +        -nographic \
> +        -monitor none \
> +        -serial stdio \
> +        -m 512 \
> +        -kernel ${XEN_BINARY} \
> +        -initrd ${XTF_BINARY} \
> +        -append \"${XEN_CMDLINE}\" \
> +    "
> +}
> diff --git a/automation/scripts/qemu-smoke-x86-64.sh b/automation/scripts/qemu-smoke-x86-64.sh
> deleted file mode 100755
> index da0c26cc2f..0000000000
> --- a/automation/scripts/qemu-smoke-x86-64.sh
> +++ /dev/null
> @@ -1,26 +0,0 @@
> -#!/bin/bash
> -
> -set -ex -o pipefail
> -
> -# variant should be either pv or pvh
> -variant=$1
> -
> -# Clone and build XTF
> -git clone https://xenbits.xen.org/git-http/xtf.git
> -cd xtf && make -j$(nproc) && cd -
> -
> -case $variant in
> -    pvh) k=test-hvm64-example    extra="dom0-iommu=none dom0=pvh" ;;
> -    *)   k=test-pv64-example     extra= ;;
> -esac
> -
> -rm -f smoke.serial
> -export TEST_CMD="qemu-system-x86_64 -nographic -kernel binaries/xen \
> -        -initrd xtf/tests/example/$k \
> -        -append \"loglvl=all console=com1 noreboot console_timestamps=boot $extra\" \
> -        -m 512 -monitor none -serial stdio"
> -
> -export TEST_LOG="smoke.serial"
> -export PASSED="Test result: SUCCESS"
> -
> -./automation/scripts/console.exp | sed 's/\r\+$//'
> diff --git a/automation/scripts/qemu-xtf.sh b/automation/scripts/qemu-xtf.sh
> new file mode 100755
> index 0000000000..55c221b36d
> --- /dev/null
> +++ b/automation/scripts/qemu-xtf.sh
> @@ -0,0 +1,28 @@
> +#!/bin/bash
> +#
> +# XTF test runner (QEMU).
> +#
> +
> +set -e -o pipefail
> +
> +if [ $# -lt 3 ]; then
> +    echo "Usage: $(basename $0) ARCH XTF-VARIANT XTF-NAME"
> +    exit 0
> +fi
> +
> +export ARCH="$1"
> +shift
> +
> +set -x
> +
> +export XEN_ROOT="${PWD}"
> +cd $(dirname $0)
> +
> +source include/xtf-runner
> +
> +if [ ! -f "include/xtf-${ARCH}" ]; then
> +    die "unsupported architecture '${ARCH}'"
> +fi
> +source include/xtf-${ARCH}
> +
> +xtf_test $@
> -- 
> 2.34.1
> 
> 


From xen-devel-bounces@lists.xenproject.org Mon Apr 21 20:39:39 2025
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Date: Mon, 21 Apr 2025 13:39:32 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: dmkhn@proton.me
cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, 
    cardoe@cardoe.com, marmarek@invisiblethingslab.com, sstabellini@kernel.org, 
    dmukhin@ford.com
Subject: Re: [PATCH v2 2/4] CI: switch x86 EFI smoke test runner to
 qemu-xtf.sh
In-Reply-To: <20250419010319.2572518-3-dmukhin@ford.com>
Message-ID: 
References: <20250419010319.2572518-1-dmukhin@ford.com> <20250419010319.2572518-3-dmukhin@ford.com>
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On Sat, 19 Apr 2025, dmkhn@proton.me wrote:
> From: Denis Mukhin 
> 
> Use qemu-xtf.sh for qemu-smoke-x86-64-gcc-efi job.
> 
> Lead time is reduced a bit since not all XTF code base is built, just the
> required test.
> 
> Signed-off-by: Denis Mukhin 
> ---
> Changes since v2:
> - removed TOP
> - dropped XEN_CONSOLE in favor of XEN_CMDLINE
> ---
>  automation/gitlab-ci/test.yaml                |  2 +-
>  .../include/configs/xtf-x86-64-efi-config     |  0
>  automation/scripts/include/xtf-x86-64-efi     | 52 +++++++++++++++++++
>  automation/scripts/qemu-smoke-x86-64-efi.sh   | 43 ---------------
>  4 files changed, 53 insertions(+), 44 deletions(-)
>  create mode 100644 automation/scripts/include/configs/xtf-x86-64-efi-config
>  create mode 100644 automation/scripts/include/xtf-x86-64-efi
>  delete mode 100755 automation/scripts/qemu-smoke-x86-64-efi.sh
> 
> diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml
> index 3adc841335..ca1e4eb528 100644
> --- a/automation/gitlab-ci/test.yaml
> +++ b/automation/gitlab-ci/test.yaml
> @@ -687,7 +687,7 @@ qemu-smoke-x86-64-clang-pvh:
>  qemu-smoke-x86-64-gcc-efi:
>    extends: .qemu-smoke-x86-64
>    script:
> -    - ./automation/scripts/qemu-smoke-x86-64-efi.sh pv 2>&1 | tee ${LOGFILE}
> +    - ./automation/scripts/qemu-xtf.sh x86-64-efi hvm64 example 2>&1 | tee ${LOGFILE}

Isn't it supposed to be pv64 as variant of the test to match what we had
before?


>    needs:
>      - debian-12-x86_64-gcc-debug
>  
> diff --git a/automation/scripts/include/configs/xtf-x86-64-efi-config b/automation/scripts/include/configs/xtf-x86-64-efi-config
> new file mode 100644
> index 0000000000..e69de29bb2
> diff --git a/automation/scripts/include/xtf-x86-64-efi b/automation/scripts/include/xtf-x86-64-efi
> new file mode 100644
> index 0000000000..e0d821b3f6
> --- /dev/null
> +++ b/automation/scripts/include/xtf-x86-64-efi
> @@ -0,0 +1,52 @@
> +#!/bin/bash
> +#
> +# XTF test utilities (x86_64, EFI).
> +#
> +
> +# Arch-specific environment overrides.
> +function xtf_arch_prepare()
> +{
> +    export FW_PREFIX="${FW_PREFIX:-/usr/share/OVMF/}"
> +    export QEMU_PREFIX="${QEMU_PREFIX:-}"
> +    export XEN_BINARY="${XEN_BINARY:-${WORKDIR}/xen.efi}"
> +    export XEN_CMDLINE="${XEN_CMDLINE:-loglvl=all noreboot console_timestamps=boot console=com1}"
> +    export XTF_SRC_BRANCH="${XTF_SRC_BRANCH:-master}"
> +    export XTF_SRC_URI="${XTF_SRC_URI:-https://xenbits.xen.org/git-http/xtf.git}"
> +    export XTF_SRC_VARIANTS="hvm64 pv64"
> +}
> +
> +# Perform arch-specific XTF environment setup.
> +function xtf_arch_setup()
> +{
> +    local esp_dir="${WORKDIR}/boot-esp"
> +    local efi_dir="${esp_dir}/EFI/BOOT"
> +
> +    # Generate EFI boot environment
> +    mkdir -p ${efi_dir}
> +    cp ${XEN_BINARY} ${efi_dir}/BOOTX64.EFI
> +    cp ${XTF_BINARY} ${efi_dir}/kernel
> +
> +    cat > ${efi_dir}/BOOTX64.cfg < +[global]
> +default=test
> +
> +[test]
> +options=${XEN_CMDLINE}
> +kernel=kernel
> +EOF
> +
> +    # NB: OVMF_CODE.fd is read-only, no need to copy
> +    cp ${FW_PREFIX}OVMF_VARS.fd ${WORKDIR}
> +
> +    export TEST_CMD="${QEMU_PREFIX}qemu-system-x86_64 \
> +        -no-reboot \
> +        -nographic \
> +        -monitor none \
> +        -serial stdio \
> +        -m 512 \
> +        -M q35,kernel-irqchip=split \
> +        -drive if=pflash,format=raw,readonly=on,file=${FW_PREFIX}OVMF_CODE.fd \
> +        -drive if=pflash,format=raw,file=${WORKDIR}/OVMF_VARS.fd \
> +        -drive file=fat:rw:${esp_dir},media=disk,index=0,format=raw \
> +    "
> +}
> diff --git a/automation/scripts/qemu-smoke-x86-64-efi.sh b/automation/scripts/qemu-smoke-x86-64-efi.sh
> deleted file mode 100755
> index 7572722be6..0000000000
> --- a/automation/scripts/qemu-smoke-x86-64-efi.sh
> +++ /dev/null
> @@ -1,43 +0,0 @@
> -#!/bin/bash
> -
> -set -ex -o pipefail
> -
> -# variant should be either pv or pvh
> -variant=$1
> -
> -# Clone and build XTF
> -git clone https://xenbits.xen.org/git-http/xtf.git
> -cd xtf && make -j$(nproc) && cd -
> -
> -case $variant in
> -    pvh) k=test-hvm64-example    extra="dom0-iommu=none dom0=pvh" ;;
> -    *)   k=test-pv64-example     extra= ;;
> -esac
> -
> -mkdir -p boot-esp/EFI/BOOT
> -cp binaries/xen.efi boot-esp/EFI/BOOT/BOOTX64.EFI
> -cp xtf/tests/example/$k boot-esp/EFI/BOOT/kernel
> -
> -cat > boot-esp/EFI/BOOT/BOOTX64.cfg < -[global]
> -default=test
> -
> -[test]
> -options=loglvl=all console=com1 noreboot console_timestamps=boot $extra
> -kernel=kernel
> -EOF
> -
> -cp /usr/share/OVMF/OVMF_CODE.fd OVMF_CODE.fd
> -cp /usr/share/OVMF/OVMF_VARS.fd OVMF_VARS.fd
> -
> -rm -f smoke.serial
> -export TEST_CMD="qemu-system-x86_64 -nographic -M q35,kernel-irqchip=split \
> -        -drive if=pflash,format=raw,readonly=on,file=OVMF_CODE.fd \
> -        -drive if=pflash,format=raw,file=OVMF_VARS.fd \
> -        -drive file=fat:rw:boot-esp,media=disk,index=0,format=raw \
> -        -m 512 -monitor none -serial stdio"
> -
> -export TEST_LOG="smoke.serial"
> -export PASSED="Test result: SUCCESS"
> -
> -./automation/scripts/console.exp | sed 's/\r\+$//'
> -- 
> 2.34.1
> 
> 


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Date: Mon, 21 Apr 2025 13:39:38 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: dmkhn@proton.me
cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, 
    cardoe@cardoe.com, marmarek@invisiblethingslab.com, sstabellini@kernel.org, 
    dmukhin@ford.com
Subject: Re: [PATCH v2 4/4] CI: add argo x86 XTF test
In-Reply-To: <20250419010319.2572518-5-dmukhin@ford.com>
Message-ID: 
References: <20250419010319.2572518-1-dmukhin@ford.com> <20250419010319.2572518-5-dmukhin@ford.com>
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On Sat, 19 Apr 2025, dmkhn@proton.me wrote:
> From: Denis Mukhin 
> 
> Introduce new CI job to run x86 XTF argo test under QEMU to smoke test argo
> feature functionality in upstream CI.
> 
> The new job lead time is ~30s, limit max job duration to 60s.
> 
> Signed-off-by: Denis Mukhin 

Reviewed-by: Stefano Stabellini 


> ---
> Depends on
>    https://lore.kernel.org/xen-devel/20250416050443.919751-1-dmukhin@ford.com/
> ---
>  automation/gitlab-ci/test.yaml        | 9 +++++++++
>  automation/scripts/include/xtf-runner | 7 +++++++
>  2 files changed, 16 insertions(+)
> 
> diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml
> index d6e4a0a622..9001efb45c 100644
> --- a/automation/gitlab-ci/test.yaml
> +++ b/automation/gitlab-ci/test.yaml
> @@ -691,6 +691,15 @@ qemu-smoke-x86-64-gcc-efi:
>    needs:
>      - debian-12-x86_64-gcc-debug
>  
> +qemu-xtf-argo-x86_64-gcc-debug:
> +  extends: .qemu-smoke-x86-64
> +  variables:
> +    TEST_TIMEOUT_OVERRIDE: 60
> +  script:
> +    - ./automation/scripts/qemu-xtf.sh x86-64 pv64 argo 2>&1 | tee ${LOGFILE}
> +  needs:
> +    - alpine-3.18-gcc-debug
> +
>  qemu-smoke-riscv64-gcc:
>    extends: .qemu-riscv64
>    script:
> diff --git a/automation/scripts/include/xtf-runner b/automation/scripts/include/xtf-runner
> index 320eb65dc8..b7fea52dad 100644
> --- a/automation/scripts/include/xtf-runner
> +++ b/automation/scripts/include/xtf-runner
> @@ -68,6 +68,9 @@ function xtf_build_cmdline()
>      local xtf_variant=$1
>      local xtf_name=$2
>      declare -a cmdline=()
> +    declare -A per_test_args=(
> +        [argo]="argo=1 mac-permissive=1"
> +    )
>  
>      cmdline+=("${XEN_CMDLINE}")
>  
> @@ -76,6 +79,10 @@ function xtf_build_cmdline()
>          cmdline+=("dom0-iommu=none dom0=pvh")
>      fi
>  
> +    if [[ -v per_test_args[${xtf_name}] ]]; then
> +        cmdline+=("${per_test_args[${xtf_name}]}")
> +    fi
> +
>      export XEN_CMDLINE="${cmdline[@]}"
>  }
>  
> -- 
> 2.34.1
> 
> 


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Date: Mon, 21 Apr 2025 13:54:58 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Penny Zheng 
cc: xen-devel@lists.xenproject.org, ray.huang@amd.com, 
    Stefano Stabellini , 
    Andrew Cooper , 
    Anthony PERARD , 
    Michal Orzel , Jan Beulich , 
    Julien Grall , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
    Stefano Stabellini , 
    Sergiy Kibrik 
Subject: Re: [PATCH v3 02/20] xen: introduce CONFIG_SYSCTL
In-Reply-To: <20250421073723.3863060-3-Penny.Zheng@amd.com>
Message-ID: 
References: <20250421073723.3863060-1-Penny.Zheng@amd.com> <20250421073723.3863060-3-Penny.Zheng@amd.com>
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On Mon, 21 Apr 2025, Penny Zheng wrote:
> From: Stefano Stabellini 
> 
> We introduce a new Kconfig CONFIG_SYSCTL, which shall only be disabled
> on some dom0less systems, to reduce Xen footprint.
> 
> Signed-off-by: Stefano Stabellini 
> Signed-off-by: Sergiy Kibrik 
> Signed-off-by: Penny Zheng 

Reviewed-by: Stefano Stabellini 


> ---
> v2 -> v3:
> - remove "intend to" in commit message
> ---
>  xen/common/Kconfig | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/xen/common/Kconfig b/xen/common/Kconfig
> index be28060716..d89e9ede77 100644
> --- a/xen/common/Kconfig
> +++ b/xen/common/Kconfig
> @@ -581,4 +581,15 @@ config BUDDY_ALLOCATOR_SIZE
>  	  Amount of memory reserved for the buddy allocator to serve Xen heap,
>  	  working alongside the colored one.
>  
> +menu "Supported hypercall interfaces"
> +	visible if EXPERT
> +
> +config SYSCTL
> +	bool "Enable sysctl hypercall"
> +	default y
> +	help
> +	  This option shall only be disabled on some dom0less systems,
> +	  to reduce Xen footprint.
> +endmenu
> +
>  endmenu
> -- 
> 2.34.1
> 


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Date: Mon, 21 Apr 2025 14:09:16 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Penny Zheng 
cc: xen-devel@lists.xenproject.org, ray.huang@amd.com, 
    Jan Beulich , Andrew Cooper , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
    Anthony PERARD , 
    Michal Orzel , Julien Grall , 
    Stefano Stabellini 
Subject: Re: [PATCH v3 10/20] xen/pmstat: introduce CONFIG_PM_OP
In-Reply-To: <20250421073723.3863060-11-Penny.Zheng@amd.com>
Message-ID: 
References: <20250421073723.3863060-1-Penny.Zheng@amd.com> <20250421073723.3863060-11-Penny.Zheng@amd.com>
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On Mon, 21 Apr 2025, Penny Zheng wrote:
> We move the following functions into a new file drivers/acpi/pm_op.c, as
> they are all more fitting in performance controling and only called by
> do_pm_op():
>  - get_cpufreq_para()
>  - set_cpufreq_para()
>  - set_cpufreq_gov()
>  - set_cpufreq_cppc()
>  - cpufreq_driver_getavg()
>  - cpufreq_update_turbo()
>  - cpufreq_get_turbo_status()
> We introduce a new Kconfig CONFIG_PM_OP to wrap the new file.
> 
> Also, although the following helpers are only called by do_pm_op(), they have
> dependency on local variable, we wrap them with CONFIG_PM_OP in place:
>  - write_userspace_scaling_setspeed()
>  - write_ondemand_sampling_rate()
>  - write_ondemand_up_threshold()
>  - get_cpufreq_ondemand_para()
>  - cpufreq_driver.update()
>  - get_hwp_para()
> Various style corrections shall be applied at the same time while moving these
> functions, including:
>  - add extra space before and after bracket of if() and switch()
>  - fix indentation
> 
> Signed-off-by: Penny Zheng 

I manually checked the code movement for correctness

Reviewed-by: Stefano Stabellini 



> ---
> v2 -> v3
> - new commit
> ---
>  xen/arch/x86/acpi/cpufreq/hwp.c              |   6 +
>  xen/arch/x86/acpi/cpufreq/powernow.c         |   4 +
>  xen/common/Kconfig                           |   7 +
>  xen/common/sysctl.c                          |   4 +-
>  xen/drivers/acpi/Makefile                    |   1 +
>  xen/drivers/acpi/pm_op.c                     | 409 +++++++++++++++++++
>  xen/drivers/acpi/pmstat.c                    | 357 ----------------
>  xen/drivers/cpufreq/cpufreq_misc_governors.c |   2 +
>  xen/drivers/cpufreq/cpufreq_ondemand.c       |   2 +
>  xen/drivers/cpufreq/utility.c                |  41 --
>  xen/include/acpi/cpufreq/cpufreq.h           |   3 -
>  11 files changed, 434 insertions(+), 402 deletions(-)
>  create mode 100644 xen/drivers/acpi/pm_op.c
> 
> diff --git a/xen/arch/x86/acpi/cpufreq/hwp.c b/xen/arch/x86/acpi/cpufreq/hwp.c
> index d5fa3d47ca..e4c09244ab 100644
> --- a/xen/arch/x86/acpi/cpufreq/hwp.c
> +++ b/xen/arch/x86/acpi/cpufreq/hwp.c
> @@ -466,6 +466,7 @@ static int cf_check hwp_cpufreq_cpu_exit(struct cpufreq_policy *policy)
>      return 0;
>  }
>  
> +#ifdef CONFIG_PM_OP
>  /*
>   * The SDM reads like turbo should be disabled with MSR_IA32_PERF_CTL and
>   * PERF_CTL_TURBO_DISENGAGE, but that does not seem to actually work, at least
> @@ -508,6 +509,7 @@ static int cf_check hwp_cpufreq_update(unsigned int cpu, struct cpufreq_policy *
>  
>      return per_cpu(hwp_drv_data, cpu)->ret;
>  }
> +#endif /* CONFIG_PM_OP */
>  
>  static const struct cpufreq_driver __initconst_cf_clobber
>  hwp_cpufreq_driver = {
> @@ -516,9 +518,12 @@ hwp_cpufreq_driver = {
>      .target = hwp_cpufreq_target,
>      .init   = hwp_cpufreq_cpu_init,
>      .exit   = hwp_cpufreq_cpu_exit,
> +#ifdef CONFIG_PM_OP
>      .update = hwp_cpufreq_update,
> +#endif
>  };
>  
> +#ifdef CONFIG_PM_OP
>  int get_hwp_para(unsigned int cpu,
>                   struct xen_cppc_para *cppc_para)
>  {
> @@ -639,6 +644,7 @@ int set_hwp_para(struct cpufreq_policy *policy,
>  
>      return hwp_cpufreq_target(policy, 0, 0);
>  }
> +#endif /* CONFIG_PM_OP */
>  
>  int __init hwp_register_driver(void)
>  {
> diff --git a/xen/arch/x86/acpi/cpufreq/powernow.c b/xen/arch/x86/acpi/cpufreq/powernow.c
> index 69364e1855..12fca45b45 100644
> --- a/xen/arch/x86/acpi/cpufreq/powernow.c
> +++ b/xen/arch/x86/acpi/cpufreq/powernow.c
> @@ -49,6 +49,7 @@ static void cf_check transition_pstate(void *pstate)
>      wrmsrl(MSR_PSTATE_CTRL, *(unsigned int *)pstate);
>  }
>  
> +#ifdef CONFIG_PM_OP
>  static void cf_check update_cpb(void *data)
>  {
>      struct cpufreq_policy *policy = data;
> @@ -77,6 +78,7 @@ static int cf_check powernow_cpufreq_update(
>  
>      return 0;
>  }
> +#endif /* CONFIG_PM_OP */
>  
>  static int cf_check powernow_cpufreq_target(
>      struct cpufreq_policy *policy,
> @@ -324,7 +326,9 @@ powernow_cpufreq_driver = {
>      .target = powernow_cpufreq_target,
>      .init   = powernow_cpufreq_cpu_init,
>      .exit   = powernow_cpufreq_cpu_exit,
> +#ifdef CONFIG_PM_OP
>      .update = powernow_cpufreq_update
> +#endif
>  };
>  
>  unsigned int __init powernow_register_driver(void)
> diff --git a/xen/common/Kconfig b/xen/common/Kconfig
> index 9cccc37232..ca1f692487 100644
> --- a/xen/common/Kconfig
> +++ b/xen/common/Kconfig
> @@ -593,4 +593,11 @@ config SYSCTL
>  	  to reduce Xen footprint.
>  endmenu
>  
> +config PM_OP
> +	bool "Enable Performance Management Operation"
> +	depends on ACPI && HAS_CPUFREQ && SYSCTL
> +	default y
> +	help
> +	  This option shall enable userspace performance management control
> +	  to do power/performance analyzing and tuning.
>  endmenu
> diff --git a/xen/common/sysctl.c b/xen/common/sysctl.c
> index 2fe76362b1..4ab827b694 100644
> --- a/xen/common/sysctl.c
> +++ b/xen/common/sysctl.c
> @@ -181,13 +181,15 @@ long do_sysctl(XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)
>      case XEN_SYSCTL_get_pmstat:
>          ret = do_get_pm_info(&op->u.get_pmstat);
>          break;
> +#endif
>  
> +#ifdef CONFIG_PM_OP
>      case XEN_SYSCTL_pm_op:
>          ret = do_pm_op(&op->u.pm_op);
>          if ( ret == -EAGAIN )
>              copyback = 1;
>          break;
> -#endif
> +#endif /* CONFIG_PM_OP */
>  
>      case XEN_SYSCTL_page_offline_op:
>      {
> diff --git a/xen/drivers/acpi/Makefile b/xen/drivers/acpi/Makefile
> index 2fc5230253..e1f84a4468 100644
> --- a/xen/drivers/acpi/Makefile
> +++ b/xen/drivers/acpi/Makefile
> @@ -6,6 +6,7 @@ obj-bin-y += tables.init.o
>  obj-$(CONFIG_ACPI_NUMA) += numa.o
>  obj-y += osl.o
>  obj-$(CONFIG_HAS_CPUFREQ) += pmstat.o
> +obj-$(CONFIG_PM_OP) += pm_op.o
>  
>  obj-$(CONFIG_X86) += hwregs.o
>  obj-$(CONFIG_X86) += reboot.o
> diff --git a/xen/drivers/acpi/pm_op.c b/xen/drivers/acpi/pm_op.c
> new file mode 100644
> index 0000000000..3123cb9556
> --- /dev/null
> +++ b/xen/drivers/acpi/pm_op.c
> @@ -0,0 +1,409 @@
> +/* SPDX-License-Identifier: GPL-2.0-or-later */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include 
> +#include 
> +#include 
> +
> +/*
> + * 1. Get PM parameter
> + * 2. Provide user PM control
> + */
> +static int cpufreq_update_turbo(unsigned int cpu, int new_state)
> +{
> +    struct cpufreq_policy *policy;
> +    int curr_state;
> +    int ret = 0;
> +
> +    if ( new_state != CPUFREQ_TURBO_ENABLED &&
> +         new_state != CPUFREQ_TURBO_DISABLED )
> +        return -EINVAL;
> +
> +    policy = per_cpu(cpufreq_cpu_policy, cpu);
> +    if ( !policy )
> +        return -EACCES;
> +
> +    if ( policy->turbo == CPUFREQ_TURBO_UNSUPPORTED )
> +        return -EOPNOTSUPP;
> +
> +    curr_state = policy->turbo;
> +    if ( curr_state == new_state )
> +        return 0;
> +
> +    policy->turbo = new_state;
> +    if ( cpufreq_driver.update )
> +    {
> +        ret = alternative_call(cpufreq_driver.update, cpu, policy);
> +        if ( ret )
> +            policy->turbo = curr_state;
> +    }
> +
> +    return ret;
> +}
> +
> +static int cpufreq_get_turbo_status(unsigned int cpu)
> +{
> +    struct cpufreq_policy *policy;
> +
> +    policy = per_cpu(cpufreq_cpu_policy, cpu);
> +    return policy && policy->turbo == CPUFREQ_TURBO_ENABLED;
> +}
> +
> +static int read_scaling_available_governors(char *scaling_available_governors,
> +                                            unsigned int size)
> +{
> +    unsigned int i = 0;
> +    struct cpufreq_governor *t;
> +
> +    if ( !scaling_available_governors )
> +        return -EINVAL;
> +
> +    list_for_each_entry(t, &cpufreq_governor_list, governor_list)
> +    {
> +        i += scnprintf(&scaling_available_governors[i],
> +                       CPUFREQ_NAME_LEN, "%s ", t->name);
> +        if ( i > size )
> +            return -EINVAL;
> +    }
> +    scaling_available_governors[i-1] = '\0';
> +
> +    return 0;
> +}
> +
> +static int get_cpufreq_para(struct xen_sysctl_pm_op *op)
> +{
> +    uint32_t ret = 0;
> +    const struct processor_pminfo *pmpt;
> +    struct cpufreq_policy *policy;
> +    uint32_t gov_num = 0;
> +    uint32_t *data;
> +    char     *scaling_available_governors;
> +    struct list_head *pos;
> +    unsigned int cpu, i = 0;
> +
> +    pmpt = processor_pminfo[op->cpuid];
> +    policy = per_cpu(cpufreq_cpu_policy, op->cpuid);
> +
> +    if ( !pmpt || !pmpt->perf.states ||
> +         !policy || !policy->governor )
> +        return -EINVAL;
> +
> +    list_for_each(pos, &cpufreq_governor_list)
> +        gov_num++;
> +
> +    if ( (op->u.get_para.cpu_num  != cpumask_weight(policy->cpus)) ||
> +         (op->u.get_para.freq_num != pmpt->perf.state_count)    ||
> +         (op->u.get_para.gov_num  != gov_num) )
> +    {
> +        op->u.get_para.cpu_num =  cpumask_weight(policy->cpus);
> +        op->u.get_para.freq_num = pmpt->perf.state_count;
> +        op->u.get_para.gov_num  = gov_num;
> +        return -EAGAIN;
> +    }
> +
> +    if ( !(data = xzalloc_array(uint32_t,
> +                                max(op->u.get_para.cpu_num,
> +                                    op->u.get_para.freq_num))) )
> +        return -ENOMEM;
> +
> +    for_each_cpu(cpu, policy->cpus)
> +        data[i++] = cpu;
> +    ret = copy_to_guest(op->u.get_para.affected_cpus,
> +                        data, op->u.get_para.cpu_num);
> +
> +    for ( i = 0; i < op->u.get_para.freq_num; i++ )
> +        data[i] = pmpt->perf.states[i].core_frequency * 1000;
> +    ret += copy_to_guest(op->u.get_para.scaling_available_frequencies,
> +                         data, op->u.get_para.freq_num);
> +
> +    xfree(data);
> +    if ( ret )
> +        return -EFAULT;
> +
> +    op->u.get_para.cpuinfo_cur_freq =
> +        cpufreq_driver.get ? alternative_call(cpufreq_driver.get, op->cpuid)
> +                           : policy->cur;
> +    op->u.get_para.cpuinfo_max_freq = policy->cpuinfo.max_freq;
> +    op->u.get_para.cpuinfo_min_freq = policy->cpuinfo.min_freq;
> +    op->u.get_para.turbo_enabled = cpufreq_get_turbo_status(op->cpuid);
> +
> +    if ( cpufreq_driver.name[0] )
> +        strlcpy(op->u.get_para.scaling_driver,
> +                cpufreq_driver.name, CPUFREQ_NAME_LEN);
> +    else
> +        strlcpy(op->u.get_para.scaling_driver, "Unknown", CPUFREQ_NAME_LEN);
> +
> +    if ( IS_ENABLED(CONFIG_INTEL) &&
> +         !strncmp(op->u.get_para.scaling_driver, XEN_HWP_DRIVER_NAME,
> +                  CPUFREQ_NAME_LEN) )
> +        ret = get_hwp_para(policy->cpu, &op->u.get_para.u.cppc_para);
> +    else
> +    {
> +        if ( !(scaling_available_governors =
> +               xzalloc_array(char, gov_num * CPUFREQ_NAME_LEN)) )
> +            return -ENOMEM;
> +        if ( (ret = read_scaling_available_governors(
> +                        scaling_available_governors,
> +                        (gov_num * CPUFREQ_NAME_LEN *
> +                         sizeof(*scaling_available_governors)))) )
> +        {
> +            xfree(scaling_available_governors);
> +            return ret;
> +        }
> +        ret = copy_to_guest(op->u.get_para.scaling_available_governors,
> +                            scaling_available_governors,
> +                            gov_num * CPUFREQ_NAME_LEN);
> +        xfree(scaling_available_governors);
> +        if ( ret )
> +            return -EFAULT;
> +
> +        op->u.get_para.u.s.scaling_cur_freq = policy->cur;
> +        op->u.get_para.u.s.scaling_max_freq = policy->max;
> +        op->u.get_para.u.s.scaling_min_freq = policy->min;
> +
> +        if ( policy->governor->name[0] )
> +            strlcpy(op->u.get_para.u.s.scaling_governor,
> +                    policy->governor->name, CPUFREQ_NAME_LEN);
> +        else
> +            strlcpy(op->u.get_para.u.s.scaling_governor, "Unknown",
> +                    CPUFREQ_NAME_LEN);
> +
> +        /* governor specific para */
> +        if ( !strncasecmp(op->u.get_para.u.s.scaling_governor,
> +                          "userspace", CPUFREQ_NAME_LEN) )
> +            op->u.get_para.u.s.u.userspace.scaling_setspeed = policy->cur;
> +
> +        if ( !strncasecmp(op->u.get_para.u.s.scaling_governor,
> +                          "ondemand", CPUFREQ_NAME_LEN) )
> +            ret = get_cpufreq_ondemand_para(
> +                &op->u.get_para.u.s.u.ondemand.sampling_rate_max,
> +                &op->u.get_para.u.s.u.ondemand.sampling_rate_min,
> +                &op->u.get_para.u.s.u.ondemand.sampling_rate,
> +                &op->u.get_para.u.s.u.ondemand.up_threshold);
> +    }
> +
> +    return ret;
> +}
> +
> +static int set_cpufreq_gov(struct xen_sysctl_pm_op *op)
> +{
> +    struct cpufreq_policy new_policy, *old_policy;
> +
> +    old_policy = per_cpu(cpufreq_cpu_policy, op->cpuid);
> +    if ( !old_policy )
> +        return -EINVAL;
> +
> +    memcpy(&new_policy, old_policy, sizeof(struct cpufreq_policy));
> +
> +    new_policy.governor = __find_governor(op->u.set_gov.scaling_governor);
> +    if ( new_policy.governor == NULL )
> +        return -EINVAL;
> +
> +    return __cpufreq_set_policy(old_policy, &new_policy);
> +}
> +
> +static int set_cpufreq_para(struct xen_sysctl_pm_op *op)
> +{
> +    int ret = 0;
> +    struct cpufreq_policy *policy;
> +
> +    policy = per_cpu(cpufreq_cpu_policy, op->cpuid);
> +
> +    if ( !policy || !policy->governor )
> +        return -EINVAL;
> +
> +    if ( hwp_active() )
> +        return -EOPNOTSUPP;
> +
> +    switch( op->u.set_para.ctrl_type )
> +    {
> +    case SCALING_MAX_FREQ:
> +    {
> +        struct cpufreq_policy new_policy;
> +
> +        memcpy(&new_policy, policy, sizeof(struct cpufreq_policy));
> +        new_policy.max = op->u.set_para.ctrl_value;
> +        ret = __cpufreq_set_policy(policy, &new_policy);
> +
> +        break;
> +    }
> +
> +    case SCALING_MIN_FREQ:
> +    {
> +        struct cpufreq_policy new_policy;
> +
> +        memcpy(&new_policy, policy, sizeof(struct cpufreq_policy));
> +        new_policy.min = op->u.set_para.ctrl_value;
> +        ret = __cpufreq_set_policy(policy, &new_policy);
> +
> +        break;
> +    }
> +
> +    case SCALING_SETSPEED:
> +    {
> +        unsigned int freq =op->u.set_para.ctrl_value;
> +
> +        if ( !strncasecmp(policy->governor->name,
> +                          "userspace", CPUFREQ_NAME_LEN) )
> +            ret = write_userspace_scaling_setspeed(op->cpuid, freq);
> +        else
> +            ret = -EINVAL;
> +
> +        break;
> +    }
> +
> +    case SAMPLING_RATE:
> +    {
> +        unsigned int sampling_rate = op->u.set_para.ctrl_value;
> +
> +        if ( !strncasecmp(policy->governor->name,
> +                          "ondemand", CPUFREQ_NAME_LEN) )
> +            ret = write_ondemand_sampling_rate(sampling_rate);
> +        else
> +            ret = -EINVAL;
> +
> +        break;
> +    }
> +
> +    case UP_THRESHOLD:
> +    {
> +        unsigned int up_threshold = op->u.set_para.ctrl_value;
> +
> +        if ( !strncasecmp(policy->governor->name,
> +                          "ondemand", CPUFREQ_NAME_LEN) )
> +            ret = write_ondemand_up_threshold(up_threshold);
> +        else
> +            ret = -EINVAL;
> +
> +        break;
> +    }
> +
> +    default:
> +        ret = -EINVAL;
> +        break;
> +    }
> +
> +    return ret;
> +}
> +
> +static int set_cpufreq_cppc(struct xen_sysctl_pm_op *op)
> +{
> +    struct cpufreq_policy *policy = per_cpu(cpufreq_cpu_policy, op->cpuid);
> +
> +    if ( !policy || !policy->governor )
> +        return -ENOENT;
> +
> +    if ( !hwp_active() )
> +        return -EOPNOTSUPP;
> +
> +    return set_hwp_para(policy, &op->u.set_cppc);
> +}
> +
> +int do_pm_op(struct xen_sysctl_pm_op *op)
> +{
> +    int ret = 0;
> +    const struct processor_pminfo *pmpt;
> +
> +    switch ( op->cmd )
> +    {
> +    case XEN_SYSCTL_pm_op_set_sched_opt_smt:
> +    {
> +        uint32_t saved_value = sched_smt_power_savings;
> +
> +        if ( op->cpuid != 0 )
> +            return -EINVAL;
> +        sched_smt_power_savings = !!op->u.set_sched_opt_smt;
> +        op->u.set_sched_opt_smt = saved_value;
> +        return 0;
> +    }
> +
> +    case XEN_SYSCTL_pm_op_get_max_cstate:
> +        BUILD_BUG_ON(XEN_SYSCTL_CX_UNLIMITED != UINT_MAX);
> +        if ( op->cpuid == 0 )
> +            op->u.get_max_cstate = acpi_get_cstate_limit();
> +        else if ( op->cpuid == 1 )
> +            op->u.get_max_cstate = acpi_get_csubstate_limit();
> +        else
> +            ret = -EINVAL;
> +        return ret;
> +
> +    case XEN_SYSCTL_pm_op_set_max_cstate:
> +        if ( op->cpuid == 0 )
> +            acpi_set_cstate_limit(op->u.set_max_cstate);
> +        else if ( op->cpuid == 1 )
> +            acpi_set_csubstate_limit(op->u.set_max_cstate);
> +        else
> +            ret = -EINVAL;
> +        return ret;
> +    }
> +
> +    if ( op->cpuid >= nr_cpu_ids || !cpu_online(op->cpuid) )
> +        return -EINVAL;
> +    pmpt = processor_pminfo[op->cpuid];
> +
> +    switch ( op->cmd & PM_PARA_CATEGORY_MASK )
> +    {
> +    case CPUFREQ_PARA:
> +        if ( !(xen_processor_pmbits & XEN_PROCESSOR_PM_PX) )
> +            return -ENODEV;
> +        if ( !pmpt || !(pmpt->perf.init & XEN_PX_INIT) )
> +            return -EINVAL;
> +        break;
> +    }
> +
> +    switch ( op->cmd )
> +    {
> +    case GET_CPUFREQ_PARA:
> +    {
> +        ret = get_cpufreq_para(op);
> +        break;
> +    }
> +
> +    case SET_CPUFREQ_GOV:
> +    {
> +        ret = set_cpufreq_gov(op);
> +        break;
> +    }
> +
> +    case SET_CPUFREQ_PARA:
> +    {
> +        ret = set_cpufreq_para(op);
> +        break;
> +    }
> +
> +    case SET_CPUFREQ_CPPC:
> +        ret = set_cpufreq_cppc(op);
> +        break;
> +
> +    case GET_CPUFREQ_AVGFREQ:
> +    {
> +        op->u.get_avgfreq = cpufreq_driver_getavg(op->cpuid, USR_GETAVG);
> +        break;
> +    }
> +
> +    case XEN_SYSCTL_pm_op_enable_turbo:
> +    {
> +        ret = cpufreq_update_turbo(op->cpuid, CPUFREQ_TURBO_ENABLED);
> +        break;
> +    }
> +
> +    case XEN_SYSCTL_pm_op_disable_turbo:
> +    {
> +        ret = cpufreq_update_turbo(op->cpuid, CPUFREQ_TURBO_DISABLED);
> +        break;
> +    }
> +
> +    default:
> +        printk("not defined sub-hypercall @ do_pm_op\n");
> +        ret = -ENOSYS;
> +        break;
> +    }
> +
> +    return ret;
> +}
> diff --git a/xen/drivers/acpi/pmstat.c b/xen/drivers/acpi/pmstat.c
> index abfdc45cc2..61b60e59a2 100644
> --- a/xen/drivers/acpi/pmstat.c
> +++ b/xen/drivers/acpi/pmstat.c
> @@ -330,360 +330,3 @@ int do_get_pm_info(struct xen_sysctl_get_pmstat *op)
>  
>      return ret;
>  }
> -
> -/*
> - * 1. Get PM parameter
> - * 2. Provide user PM control
> - */
> -static int read_scaling_available_governors(char *scaling_available_governors,
> -                                            unsigned int size)
> -{
> -    unsigned int i = 0;
> -    struct cpufreq_governor *t;
> -
> -    if ( !scaling_available_governors )
> -        return -EINVAL;
> -
> -    list_for_each_entry(t, &cpufreq_governor_list, governor_list)
> -    {
> -        i += scnprintf(&scaling_available_governors[i],
> -                       CPUFREQ_NAME_LEN, "%s ", t->name);
> -        if ( i > size )
> -            return -EINVAL;
> -    }
> -    scaling_available_governors[i-1] = '\0';
> -
> -    return 0;
> -}
> -
> -static int get_cpufreq_para(struct xen_sysctl_pm_op *op)
> -{
> -    uint32_t ret = 0;
> -    const struct processor_pminfo *pmpt;
> -    struct cpufreq_policy *policy;
> -    uint32_t gov_num = 0;
> -    uint32_t *data;
> -    char     *scaling_available_governors;
> -    struct list_head *pos;
> -    unsigned int cpu, i = 0;
> -
> -    pmpt = processor_pminfo[op->cpuid];
> -    policy = per_cpu(cpufreq_cpu_policy, op->cpuid);
> -
> -    if ( !pmpt || !pmpt->perf.states ||
> -         !policy || !policy->governor )
> -        return -EINVAL;
> -
> -    list_for_each(pos, &cpufreq_governor_list)
> -        gov_num++;
> -
> -    if ( (op->u.get_para.cpu_num  != cpumask_weight(policy->cpus)) ||
> -         (op->u.get_para.freq_num != pmpt->perf.state_count)    ||
> -         (op->u.get_para.gov_num  != gov_num) )
> -    {
> -        op->u.get_para.cpu_num =  cpumask_weight(policy->cpus);
> -        op->u.get_para.freq_num = pmpt->perf.state_count;
> -        op->u.get_para.gov_num  = gov_num;
> -        return -EAGAIN;
> -    }
> -
> -    if ( !(data = xzalloc_array(uint32_t,
> -                                max(op->u.get_para.cpu_num,
> -                                    op->u.get_para.freq_num))) )
> -        return -ENOMEM;
> -
> -    for_each_cpu(cpu, policy->cpus)
> -        data[i++] = cpu;
> -    ret = copy_to_guest(op->u.get_para.affected_cpus,
> -                        data, op->u.get_para.cpu_num);
> -
> -    for ( i = 0; i < op->u.get_para.freq_num; i++ )
> -        data[i] = pmpt->perf.states[i].core_frequency * 1000;
> -    ret += copy_to_guest(op->u.get_para.scaling_available_frequencies,
> -                         data, op->u.get_para.freq_num);
> -
> -    xfree(data);
> -    if ( ret )
> -        return -EFAULT;
> -
> -    op->u.get_para.cpuinfo_cur_freq =
> -        cpufreq_driver.get ? alternative_call(cpufreq_driver.get, op->cpuid)
> -                           : policy->cur;
> -    op->u.get_para.cpuinfo_max_freq = policy->cpuinfo.max_freq;
> -    op->u.get_para.cpuinfo_min_freq = policy->cpuinfo.min_freq;
> -    op->u.get_para.turbo_enabled = cpufreq_get_turbo_status(op->cpuid);
> -
> -    if ( cpufreq_driver.name[0] )
> -        strlcpy(op->u.get_para.scaling_driver,
> -            cpufreq_driver.name, CPUFREQ_NAME_LEN);
> -    else
> -        strlcpy(op->u.get_para.scaling_driver, "Unknown", CPUFREQ_NAME_LEN);
> -
> -    if ( IS_ENABLED(CONFIG_INTEL) &&
> -         !strncmp(op->u.get_para.scaling_driver, XEN_HWP_DRIVER_NAME,
> -                  CPUFREQ_NAME_LEN) )
> -        ret = get_hwp_para(policy->cpu, &op->u.get_para.u.cppc_para);
> -    else
> -    {
> -        if ( !(scaling_available_governors =
> -               xzalloc_array(char, gov_num * CPUFREQ_NAME_LEN)) )
> -            return -ENOMEM;
> -        if ( (ret = read_scaling_available_governors(
> -                        scaling_available_governors,
> -                        (gov_num * CPUFREQ_NAME_LEN *
> -                         sizeof(*scaling_available_governors)))) )
> -        {
> -            xfree(scaling_available_governors);
> -            return ret;
> -        }
> -        ret = copy_to_guest(op->u.get_para.scaling_available_governors,
> -                            scaling_available_governors,
> -                            gov_num * CPUFREQ_NAME_LEN);
> -        xfree(scaling_available_governors);
> -        if ( ret )
> -            return -EFAULT;
> -
> -        op->u.get_para.u.s.scaling_cur_freq = policy->cur;
> -        op->u.get_para.u.s.scaling_max_freq = policy->max;
> -        op->u.get_para.u.s.scaling_min_freq = policy->min;
> -
> -        if ( policy->governor->name[0] )
> -            strlcpy(op->u.get_para.u.s.scaling_governor,
> -                policy->governor->name, CPUFREQ_NAME_LEN);
> -        else
> -            strlcpy(op->u.get_para.u.s.scaling_governor, "Unknown",
> -                    CPUFREQ_NAME_LEN);
> -
> -        /* governor specific para */
> -        if ( !strncasecmp(op->u.get_para.u.s.scaling_governor,
> -                          "userspace", CPUFREQ_NAME_LEN) )
> -            op->u.get_para.u.s.u.userspace.scaling_setspeed = policy->cur;
> -
> -        if ( !strncasecmp(op->u.get_para.u.s.scaling_governor,
> -                          "ondemand", CPUFREQ_NAME_LEN) )
> -            ret = get_cpufreq_ondemand_para(
> -                &op->u.get_para.u.s.u.ondemand.sampling_rate_max,
> -                &op->u.get_para.u.s.u.ondemand.sampling_rate_min,
> -                &op->u.get_para.u.s.u.ondemand.sampling_rate,
> -                &op->u.get_para.u.s.u.ondemand.up_threshold);
> -    }
> -
> -    return ret;
> -}
> -
> -static int set_cpufreq_gov(struct xen_sysctl_pm_op *op)
> -{
> -    struct cpufreq_policy new_policy, *old_policy;
> -
> -    old_policy = per_cpu(cpufreq_cpu_policy, op->cpuid);
> -    if ( !old_policy )
> -        return -EINVAL;
> -
> -    memcpy(&new_policy, old_policy, sizeof(struct cpufreq_policy));
> -
> -    new_policy.governor = __find_governor(op->u.set_gov.scaling_governor);
> -    if (new_policy.governor == NULL)
> -        return -EINVAL;
> -
> -    return __cpufreq_set_policy(old_policy, &new_policy);
> -}
> -
> -static int set_cpufreq_para(struct xen_sysctl_pm_op *op)
> -{
> -    int ret = 0;
> -    struct cpufreq_policy *policy;
> -
> -    policy = per_cpu(cpufreq_cpu_policy, op->cpuid);
> -
> -    if ( !policy || !policy->governor )
> -        return -EINVAL;
> -
> -    if ( hwp_active() )
> -        return -EOPNOTSUPP;
> -
> -    switch(op->u.set_para.ctrl_type)
> -    {
> -    case SCALING_MAX_FREQ:
> -    {
> -        struct cpufreq_policy new_policy;
> -
> -        memcpy(&new_policy, policy, sizeof(struct cpufreq_policy));
> -        new_policy.max = op->u.set_para.ctrl_value;
> -        ret = __cpufreq_set_policy(policy, &new_policy);
> -
> -        break;
> -    }
> -
> -    case SCALING_MIN_FREQ:
> -    {
> -        struct cpufreq_policy new_policy;
> -
> -        memcpy(&new_policy, policy, sizeof(struct cpufreq_policy));
> -        new_policy.min = op->u.set_para.ctrl_value;
> -        ret = __cpufreq_set_policy(policy, &new_policy);
> -
> -        break;
> -    }
> -
> -    case SCALING_SETSPEED:
> -    {
> -        unsigned int freq =op->u.set_para.ctrl_value;
> -
> -        if ( !strncasecmp(policy->governor->name,
> -                          "userspace", CPUFREQ_NAME_LEN) )
> -            ret = write_userspace_scaling_setspeed(op->cpuid, freq);
> -        else
> -            ret = -EINVAL;
> -
> -        break;
> -    }
> -
> -    case SAMPLING_RATE:
> -    {
> -        unsigned int sampling_rate = op->u.set_para.ctrl_value;
> -
> -        if ( !strncasecmp(policy->governor->name,
> -                          "ondemand", CPUFREQ_NAME_LEN) )
> -            ret = write_ondemand_sampling_rate(sampling_rate);
> -        else
> -            ret = -EINVAL;
> -
> -        break;
> -    }
> -
> -    case UP_THRESHOLD:
> -    {
> -        unsigned int up_threshold = op->u.set_para.ctrl_value;
> -
> -        if ( !strncasecmp(policy->governor->name,
> -                          "ondemand", CPUFREQ_NAME_LEN) )
> -            ret = write_ondemand_up_threshold(up_threshold);
> -        else
> -            ret = -EINVAL;
> -
> -        break;
> -    }
> -
> -    default:
> -        ret = -EINVAL;
> -        break;
> -    }
> -
> -    return ret;
> -}
> -
> -static int set_cpufreq_cppc(struct xen_sysctl_pm_op *op)
> -{
> -    struct cpufreq_policy *policy = per_cpu(cpufreq_cpu_policy, op->cpuid);
> -
> -    if ( !policy || !policy->governor )
> -        return -ENOENT;
> -
> -    if ( !hwp_active() )
> -        return -EOPNOTSUPP;
> -
> -    return set_hwp_para(policy, &op->u.set_cppc);
> -}
> -
> -int do_pm_op(struct xen_sysctl_pm_op *op)
> -{
> -    int ret = 0;
> -    const struct processor_pminfo *pmpt;
> -
> -    switch ( op->cmd )
> -    {
> -    case XEN_SYSCTL_pm_op_set_sched_opt_smt:
> -    {
> -        uint32_t saved_value = sched_smt_power_savings;
> -
> -        if ( op->cpuid != 0 )
> -            return -EINVAL;
> -        sched_smt_power_savings = !!op->u.set_sched_opt_smt;
> -        op->u.set_sched_opt_smt = saved_value;
> -        return 0;
> -    }
> -
> -    case XEN_SYSCTL_pm_op_get_max_cstate:
> -        BUILD_BUG_ON(XEN_SYSCTL_CX_UNLIMITED != UINT_MAX);
> -        if ( op->cpuid == 0 )
> -            op->u.get_max_cstate = acpi_get_cstate_limit();
> -        else if ( op->cpuid == 1 )
> -            op->u.get_max_cstate = acpi_get_csubstate_limit();
> -        else
> -            ret = -EINVAL;
> -        return ret;
> -
> -    case XEN_SYSCTL_pm_op_set_max_cstate:
> -        if ( op->cpuid == 0 )
> -            acpi_set_cstate_limit(op->u.set_max_cstate);
> -        else if ( op->cpuid == 1 )
> -            acpi_set_csubstate_limit(op->u.set_max_cstate);
> -        else
> -            ret = -EINVAL;
> -        return ret;
> -    }
> -
> -    if ( op->cpuid >= nr_cpu_ids || !cpu_online(op->cpuid) )
> -        return -EINVAL;
> -    pmpt = processor_pminfo[op->cpuid];
> -
> -    switch ( op->cmd & PM_PARA_CATEGORY_MASK )
> -    {
> -    case CPUFREQ_PARA:
> -        if ( !(xen_processor_pmbits & XEN_PROCESSOR_PM_PX) )
> -            return -ENODEV;
> -        if ( !pmpt || !(pmpt->perf.init & XEN_PX_INIT) )
> -            return -EINVAL;
> -        break;
> -    }
> -
> -    switch ( op->cmd )
> -    {
> -    case GET_CPUFREQ_PARA:
> -    {
> -        ret = get_cpufreq_para(op);
> -        break;
> -    }
> -
> -    case SET_CPUFREQ_GOV:
> -    {
> -        ret = set_cpufreq_gov(op);
> -        break;
> -    }
> -
> -    case SET_CPUFREQ_PARA:
> -    {
> -        ret = set_cpufreq_para(op);
> -        break;
> -    }
> -
> -    case SET_CPUFREQ_CPPC:
> -        ret = set_cpufreq_cppc(op);
> -        break;
> -
> -    case GET_CPUFREQ_AVGFREQ:
> -    {
> -        op->u.get_avgfreq = cpufreq_driver_getavg(op->cpuid, USR_GETAVG);
> -        break;
> -    }
> -
> -    case XEN_SYSCTL_pm_op_enable_turbo:
> -    {
> -        ret = cpufreq_update_turbo(op->cpuid, CPUFREQ_TURBO_ENABLED);
> -        break;
> -    }
> -
> -    case XEN_SYSCTL_pm_op_disable_turbo:
> -    {
> -        ret = cpufreq_update_turbo(op->cpuid, CPUFREQ_TURBO_DISABLED);
> -        break;
> -    }
> -
> -    default:
> -        printk("not defined sub-hypercall @ do_pm_op\n");
> -        ret = -ENOSYS;
> -        break;
> -    }
> -
> -    return ret;
> -}
> diff --git a/xen/drivers/cpufreq/cpufreq_misc_governors.c b/xen/drivers/cpufreq/cpufreq_misc_governors.c
> index 0327fad23b..e5cb9ab02f 100644
> --- a/xen/drivers/cpufreq/cpufreq_misc_governors.c
> +++ b/xen/drivers/cpufreq/cpufreq_misc_governors.c
> @@ -64,6 +64,7 @@ static int cf_check cpufreq_governor_userspace(
>      return ret;
>  }
>  
> +#ifdef CONFIG_PM_OP
>  int write_userspace_scaling_setspeed(unsigned int cpu, unsigned int freq)
>  {
>      struct cpufreq_policy *policy;
> @@ -80,6 +81,7 @@ int write_userspace_scaling_setspeed(unsigned int cpu, unsigned int freq)
>  
>      return __cpufreq_driver_target(policy, freq, CPUFREQ_RELATION_L);
>  }
> +#endif /* CONFIG_PM_OP */
>  
>  static bool __init cf_check
>  cpufreq_userspace_handle_option(const char *name, const char *val)
> diff --git a/xen/drivers/cpufreq/cpufreq_ondemand.c b/xen/drivers/cpufreq/cpufreq_ondemand.c
> index 06cfc88d30..0126a3f5d9 100644
> --- a/xen/drivers/cpufreq/cpufreq_ondemand.c
> +++ b/xen/drivers/cpufreq/cpufreq_ondemand.c
> @@ -57,6 +57,7 @@ static struct dbs_tuners {
>  
>  static DEFINE_PER_CPU(struct timer, dbs_timer);
>  
> +#ifdef CONFIG_PM_OP
>  int write_ondemand_sampling_rate(unsigned int sampling_rate)
>  {
>      if ( (sampling_rate > MAX_SAMPLING_RATE / MICROSECS(1)) ||
> @@ -93,6 +94,7 @@ int get_cpufreq_ondemand_para(uint32_t *sampling_rate_max,
>  
>      return 0;
>  }
> +#endif /* CONFIG_PM_OP */
>  
>  static void dbs_check_cpu(struct cpu_dbs_info_s *this_dbs_info)
>  {
> diff --git a/xen/drivers/cpufreq/utility.c b/xen/drivers/cpufreq/utility.c
> index 723045b240..987c3b5929 100644
> --- a/xen/drivers/cpufreq/utility.c
> +++ b/xen/drivers/cpufreq/utility.c
> @@ -224,47 +224,6 @@ int cpufreq_driver_getavg(unsigned int cpu, unsigned int flag)
>      return policy->cur;
>  }
>  
> -int cpufreq_update_turbo(unsigned int cpu, int new_state)
> -{
> -    struct cpufreq_policy *policy;
> -    int curr_state;
> -    int ret = 0;
> -
> -    if (new_state != CPUFREQ_TURBO_ENABLED &&
> -        new_state != CPUFREQ_TURBO_DISABLED)
> -        return -EINVAL;
> -
> -    policy = per_cpu(cpufreq_cpu_policy, cpu);
> -    if (!policy)
> -        return -EACCES;
> -
> -    if (policy->turbo == CPUFREQ_TURBO_UNSUPPORTED)
> -        return -EOPNOTSUPP;
> -
> -    curr_state = policy->turbo;
> -    if (curr_state == new_state)
> -        return 0;
> -
> -    policy->turbo = new_state;
> -    if (cpufreq_driver.update)
> -    {
> -        ret = alternative_call(cpufreq_driver.update, cpu, policy);
> -        if (ret)
> -            policy->turbo = curr_state;
> -    }
> -
> -    return ret;
> -}
> -
> -
> -int cpufreq_get_turbo_status(unsigned int cpu)
> -{
> -    struct cpufreq_policy *policy;
> -
> -    policy = per_cpu(cpufreq_cpu_policy, cpu);
> -    return policy && policy->turbo == CPUFREQ_TURBO_ENABLED;
> -}
> -
>  /*********************************************************************
>   *                 POLICY                                            *
>   *********************************************************************/
> diff --git a/xen/include/acpi/cpufreq/cpufreq.h b/xen/include/acpi/cpufreq/cpufreq.h
> index 241117a9af..0742aa9f44 100644
> --- a/xen/include/acpi/cpufreq/cpufreq.h
> +++ b/xen/include/acpi/cpufreq/cpufreq.h
> @@ -143,9 +143,6 @@ extern int cpufreq_driver_getavg(unsigned int cpu, unsigned int flag);
>  #define CPUFREQ_TURBO_UNSUPPORTED   0
>  #define CPUFREQ_TURBO_ENABLED       1
>  
> -int cpufreq_update_turbo(unsigned int cpu, int new_state);
> -int cpufreq_get_turbo_status(unsigned int cpu);
> -
>  static inline int
>  __cpufreq_governor(struct cpufreq_policy *policy, unsigned int event)
>  {
> -- 
> 2.34.1
> 


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Date: Mon, 21 Apr 2025 14:12:46 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Penny Zheng 
cc: xen-devel@lists.xenproject.org, ray.huang@amd.com, 
    Jan Beulich , Andrew Cooper , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
    Anthony PERARD , 
    Michal Orzel , Julien Grall , 
    Stefano Stabellini 
Subject: Re: [PATCH v3 11/20] xen/sysctl: introduce CONFIG_PM_STATS
In-Reply-To: <20250421073723.3863060-12-Penny.Zheng@amd.com>
Message-ID: 
References: <20250421073723.3863060-1-Penny.Zheng@amd.com> <20250421073723.3863060-12-Penny.Zheng@amd.com>
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On Mon, 21 Apr 2025, Penny Zheng wrote:
> We introduce a new Kconfig CONFIG_PM_STATS for wrapping all operations
> regarding performance management statistics.
> The major codes reside in xen/drivers/acpi/pmstat.c, including the
> pm-statistic-related sysctl op: do_get_pm_info().
> CONFIG_PM_STATS also shall depend on CONFIG_SYSCTL
> 
> Signed-off-by: Penny Zheng 

Reviewed-by: Stefano Stabellini 


> ---
> v1 -> v2:
> - rename to CONFIG_PM_STATS
> - fix indention and stray semicolon
> - make code movements into a new commit
> - No need to wrap inline functions and declarations
> ---
> v2 -> v3:
> - sepearte functions related to do_pm_op() into a new commit
> - both braces shall be moved to the line with the closing parenthesis
> ---
>  xen/arch/x86/acpi/cpu_idle.c              |  2 ++
>  xen/common/Kconfig                        |  8 ++++++++
>  xen/common/sysctl.c                       |  4 ++--
>  xen/drivers/acpi/Makefile                 |  2 +-
>  xen/include/acpi/cpufreq/processor_perf.h | 10 ++++++++++
>  5 files changed, 23 insertions(+), 3 deletions(-)
> 
> diff --git a/xen/arch/x86/acpi/cpu_idle.c b/xen/arch/x86/acpi/cpu_idle.c
> index 420198406d..b537ac4cd6 100644
> --- a/xen/arch/x86/acpi/cpu_idle.c
> +++ b/xen/arch/x86/acpi/cpu_idle.c
> @@ -1487,6 +1487,7 @@ static void amd_cpuidle_init(struct acpi_processor_power *power)
>          vendor_override = -1;
>  }
>  
> +#ifdef CONFIG_PM_STATS
>  uint32_t pmstat_get_cx_nr(unsigned int cpu)
>  {
>      return processor_powers[cpu] ? processor_powers[cpu]->count : 0;
> @@ -1606,6 +1607,7 @@ int pmstat_reset_cx_stat(unsigned int cpu)
>  {
>      return 0;
>  }
> +#endif /* CONFIG_PM_STATS */
>  
>  void cpuidle_disable_deep_cstate(void)
>  {
> diff --git a/xen/common/Kconfig b/xen/common/Kconfig
> index ca1f692487..d8e242eebc 100644
> --- a/xen/common/Kconfig
> +++ b/xen/common/Kconfig
> @@ -600,4 +600,12 @@ config PM_OP
>  	help
>  	  This option shall enable userspace performance management control
>  	  to do power/performance analyzing and tuning.
> +
> +config PM_STATS
> +	bool "Enable Performance Management Statistics"
> +	depends on ACPI && HAS_CPUFREQ && SYSCTL
> +	default y
> +	help
> +	  Enable collection of performance management statistics to aid in
> +	  analyzing and tuning power/performance characteristics of the system
>  endmenu
> diff --git a/xen/common/sysctl.c b/xen/common/sysctl.c
> index 4ab827b694..baaad3bd42 100644
> --- a/xen/common/sysctl.c
> +++ b/xen/common/sysctl.c
> @@ -177,11 +177,11 @@ long do_sysctl(XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)
>          op->u.availheap.avail_bytes <<= PAGE_SHIFT;
>          break;
>  
> -#if defined (CONFIG_ACPI) && defined (CONFIG_HAS_CPUFREQ)
> +#ifdef CONFIG_PM_STATS
>      case XEN_SYSCTL_get_pmstat:
>          ret = do_get_pm_info(&op->u.get_pmstat);
>          break;
> -#endif
> +#endif /* CONFIG_PM_STATS */
>  
>  #ifdef CONFIG_PM_OP
>      case XEN_SYSCTL_pm_op:
> diff --git a/xen/drivers/acpi/Makefile b/xen/drivers/acpi/Makefile
> index e1f84a4468..b52b006100 100644
> --- a/xen/drivers/acpi/Makefile
> +++ b/xen/drivers/acpi/Makefile
> @@ -5,7 +5,7 @@ obj-$(CONFIG_X86) += apei/
>  obj-bin-y += tables.init.o
>  obj-$(CONFIG_ACPI_NUMA) += numa.o
>  obj-y += osl.o
> -obj-$(CONFIG_HAS_CPUFREQ) += pmstat.o
> +obj-$(CONFIG_PM_STATS) += pmstat.o
>  obj-$(CONFIG_PM_OP) += pm_op.o
>  
>  obj-$(CONFIG_X86) += hwregs.o
> diff --git a/xen/include/acpi/cpufreq/processor_perf.h b/xen/include/acpi/cpufreq/processor_perf.h
> index 6de43f8602..a9a3b7a372 100644
> --- a/xen/include/acpi/cpufreq/processor_perf.h
> +++ b/xen/include/acpi/cpufreq/processor_perf.h
> @@ -9,9 +9,19 @@
>  
>  unsigned int powernow_register_driver(void);
>  unsigned int get_measured_perf(unsigned int cpu, unsigned int flag);
> +#ifdef CONFIG_PM_STATS
>  void cpufreq_statistic_update(unsigned int cpu, uint8_t from, uint8_t to);
>  int  cpufreq_statistic_init(unsigned int cpu);
>  void cpufreq_statistic_exit(unsigned int cpu);
> +#else
> +static inline void cpufreq_statistic_update(unsigned int cpu, uint8_t from,
> +                                            uint8_t to) {}
> +static inline int cpufreq_statistic_init(unsigned int cpu)
> +{
> +    return 0;
> +}
> +static inline void cpufreq_statistic_exit(unsigned int cpu) {}
> +#endif /* CONFIG_PM_STATS */
>  
>  int  cpufreq_limit_change(unsigned int cpu);
>  
> -- 
> 2.34.1
> 


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Date: Mon, 21 Apr 2025 14:19:55 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Penny Zheng 
cc: xen-devel@lists.xenproject.org, ray.huang@amd.com, 
    Stefano Stabellini , Julien Grall , 
    Bertrand Marquis , 
    Michal Orzel , 
    Volodymyr Babchuk , 
    Andrew Cooper , 
    Anthony PERARD , 
    Jan Beulich , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
    Alistair Francis , 
    Bob Eshleman , 
    Connor Davis , 
    Oleksii Kurochko , 
    Stefano Stabellini , 
    Sergiy Kibrik 
Subject: Re: [PATCH v3 19/20] xen/sysctl: wrap around arch-specific
 arch_do_sysctl
In-Reply-To: <20250421073723.3863060-20-Penny.Zheng@amd.com>
Message-ID: 
References: <20250421073723.3863060-1-Penny.Zheng@amd.com> <20250421073723.3863060-20-Penny.Zheng@amd.com>
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On Mon, 21 Apr 2025, Penny Zheng wrote:
> Function arch_do_sysctl is to perform arch-specific sysctl op.
> Some functions, like psr_get_info for x86, DTB overlay support for arm,
> are solely available through sysctl op, then they all shall be wrapped
> with CONFIG_SYSCTL
> 
> Also, remove all #ifdef CONFIG_SYSCTL-s in arch-specific sysctl.c, as
> we put the guardian in Makefile for the whole file.
> Since PV_SHIM_EXCLUSIVE needs sorting as a prereq in the future, we move
> obj-$(CONFIG_SYSCTL) += sysctl.o out of PV_SHIM_EXCLUSIVE condition.
> 
> Signed-off-by: Stefano Stabellini 
> Signed-off-by: Sergiy Kibrik 
> Signed-off-by: Penny Zheng 

Reviewed-by: Stefano Stabellini 


> ---
> - use "depends on" for config OVERLAY_DTB
> - no need to wrap declaration
> - add transient #ifdef in sysctl.c for correct compilation
> ---
> v2 -> v3
> - move obj-$(CONFIG_SYSCTL) += sysctl.o out of PV_SHIM_EXCLUSIVE condition
> - move copyback out of #ifdef
> - add #else process for default label



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Date: Mon, 21 Apr 2025 14:21:56 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Penny Zheng 
cc: xen-devel@lists.xenproject.org, ray.huang@amd.com, 
    Stefano Stabellini , 
    Andrew Cooper , 
    Anthony PERARD , 
    Michal Orzel , Jan Beulich , 
    Julien Grall , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
    Stefano Stabellini , 
    Sergiy Kibrik 
Subject: Re: [PATCH v3 20/20] xen/sysctl: wrap around sysctl hypercall
In-Reply-To: <20250421073723.3863060-21-Penny.Zheng@amd.com>
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On Mon, 21 Apr 2025, Penny Zheng wrote:
> From: Stefano Stabellini 
> 
> Wrap sysctl hypercall def and sysctl.o with CONFIG_SYSCTL, and since
> PV_SHIM_EXCLUSIVE needs sorting as a prereq in the future, we move
> them out of PV_SHIM_EXCLUSIVE condition at the same time.
> 
> We also need to remove all transient "#ifdef CONFIG_SYSCTL"-s in sysctl.c.
> 
> Signed-off-by: Stefano Stabellini 
> Signed-off-by: Sergiy Kibrik 
> Signed-off-by: Penny Zheng 

Reviewed-by: Stefano Stabellini 


> ---
> v1 -> v2:
> - remove all transient "#ifdef CONFIG_SYSCTL"-s in sysctl.c
> ---
> v2 -> v3:
> - move out of CONFIG_PV_SHIM_EXCLUSIVE condition
> ---
>  xen/common/Makefile          |  2 +-
>  xen/common/sysctl.c          | 12 ------------
>  xen/include/hypercall-defs.c |  8 ++++++--
>  3 files changed, 7 insertions(+), 15 deletions(-)



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Date: Mon, 21 Apr 2025 16:37:25 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Jan Beulich 
cc: Mykyta Poturai , 
    Oleksandr Tyshchenko , 
    Stefano Stabellini , Julien Grall , 
    Bertrand Marquis , 
    Michal Orzel , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
    Stewart Hildebrand , 
    "xen-devel@lists.xenproject.org" 
Subject: Re: [PATCH v9 2/8] iommu/arm: Introduce iommu_add_dt_pci_sideband_ids
 API
In-Reply-To: <634cecb8-1452-4cbe-9b3d-98554a5e4df8@suse.com>
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References:  <95d779f00127defa37f3c5056c762ea0da47fc53.1741958647.git.mykyta_poturai@epam.com>  <710bfddb-6ce3-4b11-bcd8-91f17d4f5be2@epam.com>
 <9a0ac3c1-e448-4acd-a471-d8d8e14fbc44@suse.com> <8df846ba-2ec7-467a-a097-0b9c2e4f51dc@epam.com> <634cecb8-1452-4cbe-9b3d-98554a5e4df8@suse.com>
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On Thu, 20 Mar 2025, Jan Beulich wrote:
> On 20.03.2025 11:47, Mykyta Poturai wrote:
> > On 19.03.25 17:28, Jan Beulich wrote:
> >> On 19.03.2025 16:21, Mykyta Poturai wrote:
> >>> On 17.03.25 16:56, Jan Beulich wrote:
> >>>> On 14.03.2025 14:34, Mykyta Poturai wrote:
> >>>>> From: Oleksandr Tyshchenko 
> >>>>>
> >>>>> The main purpose of this patch is to add a way to register PCI device
> >>>>> (which is behind the IOMMU) using the generic PCI-IOMMU DT bindings [1]
> >>>>> before assigning that device to a domain.
> >>>>>
> >>>>> This behaves similarly to the existing iommu_add_dt_device API, except it
> >>>>> handles PCI devices, and it is to be invoked from the add_device hook in the
> >>>>> SMMU driver.
> >>>>>
> >>>>> The function dt_map_id to translate an ID through a downstream mapping
> >>>>> (which is also suitable for mapping Requester ID) was borrowed from Linux
> >>>>> (v5.10-rc6) and updated according to the Xen code base.
> >>>>>
> >>>>> [1] https://www.kernel.org/doc/Documentation/devicetree/bindings/pci/pci-iommu.txt
> >>>>>
> >>>>> Signed-off-by: Oleksandr Tyshchenko 
> >>>>> Signed-off-by: Stewart Hildebrand 
> >>>>> Signed-off-by: Mykyta Poturai 
> >>>>> ---
> >>>>> Regarding pci_for_each_dma_alias question: getting host bridge node
> >>>>> directly seems like a simpler solution with the same result. AFAIU
> >>>>> with pci_for_each_dma_alias in linux we would arrive to the host brige
> >>>>> node anyway, but also try to call dt_map_id for each device along the
> >>>>> way. I am not sure why exactly it is done this way in linux, as
> >>>>> according to the pci-iommu.txt, iommu-map node can only be present in
> >>>>> the PCI root.
> >>>>>
> >>>>> v8->v9:
> >>>>> * replace DT_NO_IOMMU with 1
> >>>>> * guard iommu_add_pci_sideband_ids with CONFIG_ARM
> >>>>
> >>>> I fear I'm confused: Isn't this contradicting ...
> >>>>
> >>>>> v7->v8:
> >>>>> * ENOSYS->EOPNOTSUPP
> >>>>> * move iommu_add_pci_sideband_ids to iommu.c to fix x86 build
> >>>>
> >>>> ... this earlier change? Really, with there being no caller, I can't see
> >>>> why there could be any build issue here affecting only x86. Except for
> >>>> Misra complaining about unreachable code being introduced, which I'm sure
> >>>> I said before should be avoided.
> >>>
> >>> The original reason for moving this function was the conflicting ACPI
> >>> and EFI headers, I described it in V8 comments here[1].
> >>>
> >>>>
> >>>>> --- a/xen/drivers/passthrough/iommu.c
> >>>>> +++ b/xen/drivers/passthrough/iommu.c
> >>>>> @@ -20,6 +20,7 @@
> >>>>>    #include 
> >>>>>    #include 
> >>>>>    #include 
> >>>>> +#include 
> >>>>>    #include 
> >>>>>
> >>>>>    #ifdef CONFIG_X86
> >>>>> @@ -744,6 +745,20 @@ int __init iommu_get_extra_reserved_device_memory(iommu_grdm_t *func,
> >>>>>        return 0;
> >>>>>    }
> >>>>>
> >>>>> +#ifdef CONFIG_ARM
> >>>>
> >>>> I realize we have CONFIG_X86 here as well (visible even in context of the
> >>>> earlier hunk. Yet then the goal ought to be to reduce these anomalies, not
> >>>> add new ones. Since I don't have a clear picture of what's wanted, I'm also
> >>>> in trouble suggesting any alternative, I'm afraid.
> >>>
> >>> Here is a short summary:
> >>>
> >>> The main problem is that we need this function somewhere, but there is
> >>> no good place for it. It is only called on ARM for now but it's not
> >>> ARM-specific by nature and can be eventually used on other platforms as
> >>> well. It can't be just dropped because of the effort to support the
> >>> co-existence of DT and ACPI. It also can't be declared as a static
> >>> function because it requires the inclusion of  for
> >>> acpi_disabled define, which leads to build errors[1]. And without ifdef
> >>> guards it would be a MISRA violation.
> >>
> >> An abridged version of this ought to go in the patch description, I think.
> >> This is special, so it needs calling out.
> >>
> >> As to the placement - would making an entirely new .c file possibly help?
> >> (Then, instead of in the patch description, maybe the special aspect could
> >> be put in a code comment at the top of the file.)
> > 
> > It seems to me creating a new file would be overkill for one small 
> > function. I considered moving it to xen/drivers/passthrough/arm/iommu.c 
> > to reduce ifdefs but I feared it would suggest that it is arch-specific 
> > a bit too strongly. So maybe move it there after all if you think it 
> > would be better?
> 
> Well - with "#ifdef CONFIG_ARM" around it's Arm-specific too, isn't it?
> IOW - either have a proper (even if simple) abstraction, or perhaps indeed
> put it there (if that's also okay with the Arm maintainers).

I am OK with that


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Date: Mon, 21 Apr 2025 16:50:43 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Mykyta Poturai 
cc: "xen-devel@lists.xenproject.org" , 
    Stewart Hildebrand , 
    Stefano Stabellini , Julien Grall , 
    Bertrand Marquis , 
    Michal Orzel 
Subject: Re: [PATCH v9 3/8] iommu/arm: iommu_add_dt_pci_sideband_ids phantom
 handling
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On Fri, 14 Mar 2025, Mykyta Poturai wrote:
> From: Stewart Hildebrand 
> 
> Handle phantom functions in iommu_add_dt_pci_sideband_ids(). Each phantom
> function will have a unique requestor ID (RID)/BDF. On ARM, we need to
> map/translate the RID/BDF to an AXI stream ID for each phantom function
> according to the pci-iommu device tree mapping [1]. The RID/BDF -> AXI stream ID
> mapping in DT could allow phantom devices (i.e. devices with phantom functions)
> to use different AXI stream IDs based on the (phantom) function.
> 
> [1] https://www.kernel.org/doc/Documentation/devicetree/bindings/pci/pci-iommu.txt
> 
> Signed-off-by: Stewart Hildebrand 

Reviewed-by: Stefano Stabellini 


> ---
> v8->v9:
> * replace DT_NO_IOMMU with 1
> 
> v7->v8:
> * no change
> 
> v6->v7:
> * no change
> 
> v5->v6:
> * no change
> 
> v4->v5:
> * no change
> 
> v3->v4:
> * s/iommu_dt_pci_map_id/dt_map_id/
> 
> v2->v3:
> * new patch title (was: iommu/arm: iommu_add_dt_pci_device phantom handling)
> * rework loop to reduce duplication
> * s/iommu_fwspec_free(pci_to_dev(pdev))/iommu_fwspec_free(dev)/
> 
> v1->v2:
> * new patch
> 
> ---
> TODO: investigate Jan's comment [2]
> [2] https://lore.kernel.org/xen-devel/806a2978-19fb-4d31-ab6a-35ea7317c8de@suse.com/
> ---
>  xen/drivers/passthrough/device_tree.c | 33 ++++++++++++++++-----------
>  1 file changed, 20 insertions(+), 13 deletions(-)
> 
> diff --git a/xen/drivers/passthrough/device_tree.c b/xen/drivers/passthrough/device_tree.c
> index 37e1437b65..f5850a2607 100644
> --- a/xen/drivers/passthrough/device_tree.c
> +++ b/xen/drivers/passthrough/device_tree.c
> @@ -169,6 +169,7 @@ int iommu_add_dt_pci_sideband_ids(struct pci_dev *pdev)
>      struct device *dev = pci_to_dev(pdev);
>      const struct dt_device_node *np;
>      int rc;
> +    unsigned int devfn = pdev->devfn;
>  
>      if ( !iommu_enabled )
>          return 1;
> @@ -183,21 +184,27 @@ int iommu_add_dt_pci_sideband_ids(struct pci_dev *pdev)
>      if ( !np )
>          return -ENODEV;
>  
> -    /*
> -     * According to the Documentation/devicetree/bindings/pci/pci-iommu.txt
> -     * from Linux.
> -     */
> -    rc = dt_map_id(np, PCI_BDF(pdev->bus, pdev->devfn), "iommu-map",
> -                   "iommu-map-mask", &iommu_spec.np, iommu_spec.args);
> -    if ( rc )
> -        return (rc == -ENODEV) ? 1 : rc;
> +    do {
> +        /*
> +         * According to the Documentation/devicetree/bindings/pci/pci-iommu.txt
> +         * from Linux.
> +         */
> +        rc = dt_map_id(np, PCI_BDF(pdev->bus, devfn), "iommu-map",
> +                       "iommu-map-mask", &iommu_spec.np, iommu_spec.args);
> +        if ( rc )
> +            return (rc == -ENODEV) ? 1 : rc;
>  
> -    rc = iommu_dt_xlate(dev, &iommu_spec, ops);
> -    if ( rc < 0 )
> -    {
> -        iommu_fwspec_free(dev);
> -        return -EINVAL;
> +        rc = iommu_dt_xlate(dev, &iommu_spec, ops);
> +        if ( rc < 0 )
> +        {
> +            iommu_fwspec_free(dev);
> +            return -EINVAL;
> +        }
> +
> +        devfn += pdev->phantom_stride;
>      }
> +    while ( (devfn != pdev->devfn) &&
> +            (PCI_SLOT(devfn) == PCI_SLOT(pdev->devfn)) );
>  
>      return rc;
>  }
> -- 
> 2.34.1
> 


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Date: Mon, 21 Apr 2025 17:18:42 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Mykyta Poturai 
cc: "xen-devel@lists.xenproject.org" , 
    Oleksandr Andrushchenko , 
    Julien Grall , Rahul Singh , 
    Stefano Stabellini , 
    Bertrand Marquis , 
    Michal Orzel , 
    Volodymyr Babchuk , 
    Oleksandr Tyshchenko , 
    Stewart Hildebrand 
Subject: Re: [PATCH v9 4/8] xen/arm: smmuv2: Add PCI devices support for
 SMMUv2
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On Fri, 14 Mar 2025, Mykyta Poturai wrote:
> From: Oleksandr Andrushchenko 
> 
> Implement support for PCI devices in the SMMU driver. Make arm_smmu_master
> structure to hold a pointer to the device to allow it to hold PCI devices.
> Trigger iommu-map parsing when new PCI device is added. Add checks to
> assign/deassign functions to ensure PCI devices are handled correctly.
> Implement basic quarantining.
> 
> All pci devices are automatically assigned to hardware domain if it exists
> to ensure it can probe them.
> 
> TODO:
> Implement scratch page quarantining support.
> 
> Signed-off-by: Oleksandr Tyshchenko 
> Signed-off-by: Oleksandr Andrushchenko 
> Signed-off-by: Stewart Hildebrand 
> Signed-off-by: Mykyta Poturai 
> ---
> v8->v9:
> * no change
> 
> v7->v8:
> * no change
> 
> v6->v7:
> * use d->pci_lock in arm_smmu_assign_dev()
> * remove !is_hardware_domain and pdev->domain == d checks in assign to
>   support future dom0less use case when dom0 is using vPCI
> * remove stale todo in dev_get_dev_node
> * don't print ""
> * remove redundant dt_device_is_protected check
> * remove assign/deassing prints
> * change assign logic to remove reassign reimplementation
> * check if pdev->domain exists before assigning to it
> * explain pdev->devfn check
> * make reassign check stricter and update comment
> 
> v5->v6:
> * check for hardware_domain == NULL (dom0less test case)
> * locking: assign pdev->domain before list_add()
> 
> v4->v5:
> * assign device to pdev->domain (usually dom0) by default in add_device() hook
> * deassign from hwdom
> * rebase on top of ("dynamic node programming using overlay dtbo") series
> * remove TODO in comment about device prints
> * add TODO regarding locking
> * fixup after dropping ("xen/arm: Move is_protected flag to struct device")
> 
> v3->v4:
> * add new device_is_protected check in add_device hook to match SMMUv3 and
>   IPMMU-VMSA drivers
> 
> v2->v3:
> * invoke iommu_add_pci_sideband_ids() from add_device hook
> 
> v1->v2:
> * ignore add_device/assign_device/reassign_device calls for phantom functions
>   (i.e. devfn != pdev->devfn)
> 
> downstream->v1:
> * wrap unused function in #ifdef 0
> * remove the remove_device() stub since it was submitted separately to the list
>   [XEN][PATCH v6 12/19] xen/smmu: Add remove_device callback for smmu_iommu ops
>   https://lists.xenproject.org/archives/html/xen-devel/2023-05/msg00204.html
> * arm_smmu_(de)assign_dev: return error instead of crashing system
> * update condition in arm_smmu_reassign_dev
> * style fixup
> * add && !is_hardware_domain(d) into condition in arm_smmu_assign_dev()
> 
> (cherry picked from commit 0c11a7f65f044c26d87d1e27ac6283ef1f9cfb7a from
>  the downstream branch spider-master from
>  https://github.com/xen-troops/xen.git)
> ---
>  xen/drivers/passthrough/arm/smmu.c | 190 ++++++++++++++++++++++-------
>  1 file changed, 147 insertions(+), 43 deletions(-)
> 
> diff --git a/xen/drivers/passthrough/arm/smmu.c b/xen/drivers/passthrough/arm/smmu.c
> index 03d22bce1e..cfddcbb1ad 100644
> --- a/xen/drivers/passthrough/arm/smmu.c
> +++ b/xen/drivers/passthrough/arm/smmu.c
> @@ -132,11 +132,21 @@ enum irqreturn {
>  
>  typedef enum irqreturn irqreturn_t;
>  
> -/* Device logger functions
> - * TODO: Handle PCI
> - */
> -#define dev_print(dev, lvl, fmt, ...)						\
> -	 printk(lvl "smmu: %s: " fmt, dt_node_full_name(dev_to_dt(dev)), ## __VA_ARGS__)
> +/* Device logger functions */
> +#ifndef CONFIG_HAS_PCI
> +#define dev_print(dev, lvl, fmt, ...)    \
> +    printk(lvl "smmu: %s: " fmt, dev_name(dev), ## __VA_ARGS__)
> +#else
> +#define dev_print(dev, lvl, fmt, ...) ({                                \
> +    if ( !dev_is_pci((dev)) )                                           \
> +        printk(lvl "smmu: %s: " fmt, dev_name((dev)), ## __VA_ARGS__);  \
> +    else                                                                \
> +    {                                                                   \
> +        struct pci_dev *pdev = dev_to_pci((dev));                       \
> +        printk(lvl "smmu: %pp: " fmt, &pdev->sbdf, ## __VA_ARGS__);     \
> +    }                                                                   \
> +})
> +#endif
>  
>  #define dev_dbg(dev, fmt, ...) dev_print(dev, XENLOG_DEBUG, fmt, ## __VA_ARGS__)
>  #define dev_notice(dev, fmt, ...) dev_print(dev, XENLOG_INFO, fmt, ## __VA_ARGS__)
> @@ -188,6 +198,7 @@ static void __iomem *devm_ioremap_resource(struct device *dev,
>   * Xen: PCI functions
>   * TODO: It should be implemented when PCI will be supported
>   */
> +#if 0 /* unused */
>  #define to_pci_dev(dev)	(NULL)
>  static inline int pci_for_each_dma_alias(struct pci_dev *pdev,
>  					 int (*fn) (struct pci_dev *pdev,
> @@ -197,6 +208,7 @@ static inline int pci_for_each_dma_alias(struct pci_dev *pdev,
>  	BUG();
>  	return 0;
>  }
> +#endif

I think we should remove them if they are not used.


>  /* Xen: misc */
>  #define PHYS_MASK_SHIFT		PADDR_BITS
> @@ -631,7 +643,7 @@ struct arm_smmu_master_cfg {
>  	for (i = 0; idx = (cfg)->smendx[i], (i) < (num); ++(i))
>  
>  struct arm_smmu_master {
> -	struct device_node		*of_node;
> +	struct device			*dev;
>  	struct rb_node			node;
>  	struct arm_smmu_master_cfg	cfg;
>  };
> @@ -723,7 +735,7 @@ arm_smmu_get_fwspec(struct arm_smmu_master_cfg *cfg)
>  {
>  	struct arm_smmu_master *master = container_of(cfg,
>  			                                      struct arm_smmu_master, cfg);
> -	return dev_iommu_fwspec_get(&master->of_node->dev);
> +	return dev_iommu_fwspec_get(master->dev);
>  }
>  
>  static void parse_driver_options(struct arm_smmu_device *smmu)
> @@ -742,21 +754,11 @@ static void parse_driver_options(struct arm_smmu_device *smmu)
>  
>  static struct device_node *dev_get_dev_node(struct device *dev)
>  {
> -#if 0 /* Xen: TODO: Add support for PCI */
> -	if (dev_is_pci(dev)) {
> -		struct pci_bus *bus = to_pci_dev(dev)->bus;
> -
> -		while (!pci_is_root_bus(bus))
> -			bus = bus->parent;
> -		return bus->bridge->parent->of_node;
> -	}
> -#endif
> -
>  	return dev->of_node;
>  }
>  
>  static struct arm_smmu_master *find_smmu_master(struct arm_smmu_device *smmu,
> -						struct device_node *dev_node)
> +						struct device *dev)
>  {
>  	struct rb_node *node = smmu->masters.rb_node;
>  
> @@ -765,9 +767,9 @@ static struct arm_smmu_master *find_smmu_master(struct arm_smmu_device *smmu,
>  
>  		master = container_of(node, struct arm_smmu_master, node);
>  
> -		if (dev_node < master->of_node)
> +		if (dev < master->dev)
>  			node = node->rb_left;
> -		else if (dev_node > master->of_node)
> +		else if (dev > master->dev)
>  			node = node->rb_right;
>  		else
>  			return master;
> @@ -802,9 +804,9 @@ static int insert_smmu_master(struct arm_smmu_device *smmu,
>  			= container_of(*new, struct arm_smmu_master, node);
>  
>  		parent = *new;
> -		if (master->of_node < this->of_node)
> +		if (master->dev < this->dev)
>  			new = &((*new)->rb_left);
> -		else if (master->of_node > this->of_node)
> +		else if (master->dev > this->dev)
>  			new = &((*new)->rb_right);
>  		else
>  			return -EEXIST;
> @@ -836,28 +838,30 @@ static int arm_smmu_dt_add_device_legacy(struct arm_smmu_device *smmu,
>  	struct arm_smmu_master *master;
>  	struct device_node *dev_node = dev_get_dev_node(dev);
>  
> -	master = find_smmu_master(smmu, dev_node);
> +	master = find_smmu_master(smmu, dev);
>  	if (master) {
>  		dev_err(dev,
> -			"rejecting multiple registrations for master device %s\n",
> -			dev_node->name);
> +			"rejecting multiple registrations for master device\n");
>  		return -EBUSY;
>  	}
>  
>  	master = devm_kzalloc(dev, sizeof(*master), GFP_KERNEL);
>  	if (!master)
>  		return -ENOMEM;
> -	master->of_node = dev_node;
> +	master->dev = dev;
>  
> -	/* Xen: Let Xen know that the device is protected by an SMMU */
> -	dt_device_set_protected(dev_node);
> +	if ( !dev_is_pci(dev) )
> +	{
> +		/* Xen: Let Xen know that the device is protected by an SMMU */
> +		dt_device_set_protected(dev_node);
> +	}
>  
>  	for (i = 0; i < fwspec->num_ids; ++i) {
>  		if (!(smmu->features & ARM_SMMU_FEAT_STREAM_MATCH) &&
>  		     (fwspec->ids[i] >= smmu->num_mapping_groups)) {
>  			dev_err(dev,
> -				"stream ID for master device %s greater than maximum allowed (%d)\n",
> -				dev_node->name, smmu->num_mapping_groups);
> +				"SMMU stream ID %d is greater than maximum allowed (%d)\n",
> +				fwspec->ids[i], smmu->num_mapping_groups);
>  			return -ERANGE;
>  		}
>  		master->cfg.smendx[i] = INVALID_SMENDX;
> @@ -872,7 +876,7 @@ static int arm_smmu_dt_remove_device_legacy(struct arm_smmu_device *smmu,
>  	struct device_node *dev_node = dev_get_dev_node(dev);
>  	int ret;
>  
> -	master = find_smmu_master(smmu, dev_node);
> +	master = find_smmu_master(smmu, dev);
>  	if (master == NULL) {
>  		dev_err(dev,
>  			"No registrations found for master device %s\n",
> @@ -884,8 +888,9 @@ static int arm_smmu_dt_remove_device_legacy(struct arm_smmu_device *smmu,
>  	if (ret)
>  		return ret;
>  
> -	/* Protected by dt_host_lock and dtdevs_lock as caller holds these locks. */
> -	dev_node->is_protected = false;
> +	if ( !dev_is_pci(dev) )
> +		/* Protected by dt_host_lock and dtdevs_lock as caller holds these locks. */
> +		dev_node->is_protected = false;
>  
>  	kfree(master);
>  	return 0;
> @@ -914,6 +919,12 @@ static int register_smmu_master(struct arm_smmu_device *smmu,
>  					     fwspec);
>  }
>  
> +/* Forward declaration */
> +static int arm_smmu_assign_dev(struct domain *d, u8 devfn,
> +			       struct device *dev, u32 flag);
> +static int arm_smmu_deassign_dev(struct domain *d, uint8_t devfn,
> +				 struct device *dev);
> +
>  /*
>   * The driver which supports generic IOMMU DT bindings must have this
>   * callback implemented.
> @@ -938,6 +949,23 @@ static int arm_smmu_dt_add_device_generic(u8 devfn, struct device *dev)
>  {
>  	struct arm_smmu_device *smmu;
>  	struct iommu_fwspec *fwspec;
> +	int ret;
> +
> +#ifdef CONFIG_HAS_PCI
> +	if ( dev_is_pci(dev) )
> +	{
> +		struct pci_dev *pdev = dev_to_pci(dev);
> +		int ret;
> +
> +		/* Ignore calls for phantom functions */
> +		if ( devfn != pdev->devfn )
> +			return 0;
> +
> +		ret = iommu_add_pci_sideband_ids(pdev);
> +		if ( ret < 0 )
> +			iommu_fwspec_free(dev);

Should we return here in case of errors?


> +	}
> +#endif
>  
>  	fwspec = dev_iommu_fwspec_get(dev);
>  	if (fwspec == NULL)
> @@ -947,7 +975,25 @@ static int arm_smmu_dt_add_device_generic(u8 devfn, struct device *dev)
>  	if (smmu == NULL)
>  		return -ENXIO;
>  
> -	return arm_smmu_dt_add_device_legacy(smmu, dev, fwspec);
> +	ret = arm_smmu_dt_add_device_legacy(smmu, dev, fwspec);
> +	if ( ret )
> +		return ret;
> +
> +#ifdef CONFIG_HAS_PCI
> +	if ( dev_is_pci(dev) )
> +	{
> +		struct pci_dev *pdev = dev_to_pci(dev);
> +
> +		/*
> +		 * During PHYSDEVOP_pci_device_add, Xen does not assign the
> +		 * device, so we must do it here.
> +		 */
> +		if ( pdev->domain )
> +			ret = arm_smmu_assign_dev(pdev->domain, devfn, dev, 0);
> +	}
> +#endif
> +
> +	return ret;
>  }
>  
>  static int arm_smmu_dt_xlate_generic(struct device *dev,
> @@ -970,11 +1016,10 @@ static struct arm_smmu_device *find_smmu_for_device(struct device *dev)
>  {
>  	struct arm_smmu_device *smmu;
>  	struct arm_smmu_master *master = NULL;
> -	struct device_node *dev_node = dev_get_dev_node(dev);
>  
>  	spin_lock(&arm_smmu_devices_lock);
>  	list_for_each_entry(smmu, &arm_smmu_devices, list) {
> -		master = find_smmu_master(smmu, dev_node);
> +		master = find_smmu_master(smmu, dev);
>  		if (master)
>  			break;
>  	}
> @@ -2066,6 +2111,7 @@ static bool arm_smmu_capable(enum iommu_cap cap)
>  }
>  #endif
>  
> +#if 0 /* Not used */
>  static int __arm_smmu_get_pci_sid(struct pci_dev *pdev, u16 alias, void *data)
>  {
>  	*((u16 *)data) = alias;
> @@ -2076,6 +2122,7 @@ static void __arm_smmu_release_pci_iommudata(void *data)
>  {
>  	kfree(data);
>  }
> +#endif
>  
>  static int arm_smmu_add_device(struct device *dev)
>  {
> @@ -2083,12 +2130,13 @@ static int arm_smmu_add_device(struct device *dev)
>  	struct arm_smmu_master_cfg *cfg;
>  	struct iommu_group *group;
>  	void (*releasefn)(void *data) = NULL;
> -	int ret;
>  
>  	smmu = find_smmu_for_device(dev);
>  	if (!smmu)
>  		return -ENODEV;
>  
> +	/* There is no need to distinguish here, thanks to PCI-IOMMU DT bindings */

Let's remove this code then. This driver deviated too much from the
Linux original anyway to worry about the ability to update the code


> +#if 0
>  	if (dev_is_pci(dev)) {
>  		struct pci_dev *pdev = to_pci_dev(dev);
>  		struct iommu_fwspec *fwspec;
> @@ -2113,10 +2161,12 @@ static int arm_smmu_add_device(struct device *dev)
>  				       &fwspec->ids[0]);
>  		releasefn = __arm_smmu_release_pci_iommudata;
>  		cfg->smmu = smmu;
> -	} else {
> +	} else
> +#endif
> +	{
>  		struct arm_smmu_master *master;
>  
> -		master = find_smmu_master(smmu, dev->of_node);
> +		master = find_smmu_master(smmu, dev);
>  		if (!master) {
>  			return -ENODEV;
>  		}
> @@ -2784,6 +2834,42 @@ static int arm_smmu_assign_dev(struct domain *d, u8 devfn,
>  			return -ENOMEM;
>  	}
>  
> +#ifdef CONFIG_HAS_PCI
> +	if ( dev_is_pci(dev) )
> +	{
> +		struct pci_dev *pdev = dev_to_pci(dev);
> +
> +		/* Ignore calls for phantom functions */
> +		if ( devfn != pdev->devfn )
> +			return 0;
> +
> +		ASSERT(pcidevs_locked());
> +
> +		write_lock(&pdev->domain->pci_lock);
> +		list_del(&pdev->domain_list);
> +		write_unlock(&pdev->domain->pci_lock);
> +
> +		pdev->domain = d;
> +
> +		write_lock(&d->pci_lock);
> +		list_add(&pdev->domain_list, &d->pdev_list);
> +		write_unlock(&d->pci_lock);
> +
> +		/* dom_io is used as a sentinel for quarantined devices */
> +		if ( d == dom_io )
> +		{
> +			struct iommu_domain *domain = dev_iommu_domain(dev);
> +			if ( !iommu_quarantine )
> +				return 0;
> +
> +			if ( domain && domain->priv )
> +				arm_smmu_deassign_dev(domain->priv->cfg.domain, devfn, dev);
> +
> +			return 0;
> +		}
> +	}
> +#endif
> +
>  	if (!dev_iommu_group(dev)) {
>  		ret = arm_smmu_add_device(dev);
>  		if (ret)
> @@ -2833,11 +2919,27 @@ out:
>  	return ret;
>  }
>  
> -static int arm_smmu_deassign_dev(struct domain *d, struct device *dev)
> +static int arm_smmu_deassign_dev(struct domain *d, uint8_t devfn,
> +				 struct device *dev)
>  {
>  	struct iommu_domain *domain = dev_iommu_domain(dev);
>  	struct arm_smmu_xen_domain *xen_domain;
>  
> +#ifdef CONFIG_HAS_PCI
> +	if ( dev_is_pci(dev) )
> +	{
> +		struct pci_dev *pdev = dev_to_pci(dev);
> +
> +		/* Ignore calls for phantom functions */
> +		if ( devfn != pdev->devfn )
> +			return 0;
> +
> +		/* dom_io is used as a sentinel for quarantined devices */
> +		if ( d == dom_io )
> +			return 0;
> +	}
> +#endif
> +
>  	xen_domain = dom_iommu(d)->arch.priv;
>  
>  	if (!domain || domain->priv->cfg.domain != d) {
> @@ -2864,14 +2966,16 @@ static int arm_smmu_reassign_dev(struct domain *s, struct domain *t,
>  {
>  	int ret = 0;
>  
> -	/* Don't allow remapping on other domain than hwdom */
> -	if ( t && !is_hardware_domain(t) )
> +	/* Don't allow remapping on other domain than hwdom
> +	 * or dom_io for PCI devices
> +	 */
> +	if ( t && !is_hardware_domain(t) && (t != dom_io || !dev_is_pci(dev)) )
>  		return -EPERM;
>  
>  	if (t == s)
>  		return 0;
>  
> -	ret = arm_smmu_deassign_dev(s, dev);
> +	ret = arm_smmu_deassign_dev(s, devfn, dev);
>  	if (ret)
>  		return ret;
>  
> -- 
> 2.34.1
> 


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Date: Mon, 21 Apr 2025 17:20:56 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Mykyta Poturai 
cc: "xen-devel@lists.xenproject.org" , 
    Rahul Singh , 
    Bertrand Marquis , 
    Stefano Stabellini , Julien Grall , 
    Michal Orzel , 
    Volodymyr Babchuk , 
    Stewart Hildebrand 
Subject: Re: [PATCH v9 5/8] xen/arm: smmuv3: Add PCI devices support for
 SMMUv3
In-Reply-To: <96dd4cb828377a5a09881ddb5ee5ded1df3dde1e.1741958647.git.mykyta_poturai@epam.com>
Message-ID: 
References:  <96dd4cb828377a5a09881ddb5ee5ded1df3dde1e.1741958647.git.mykyta_poturai@epam.com>
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On Fri, 14 Mar 2025, Mykyta Poturai wrote:
> From: Rahul Singh 
> 
> Implement support for PCI devices in the SMMU driver. Trigger iommu-map
> parsing when new PCI device is added. Add checks to assign/deassign
> functions to ensure PCI devices are handled correctly. Implement basic
> quarantining.
> 
> All pci devices are automatically assigned to hardware domain if it exists
> to ensure it can probe them.
> 
> TODO:
> Implement scratch page quarantining support.
> 
> Signed-off-by: Rahul Singh 
> Signed-off-by: Stewart Hildebrand 
> Signed-off-by: Mykyta Poturai 
> ---
> v8->v9:
> * no change
> 
> v7->v8:
> * no change
> 
> v6->v7:
> * address TODO: use d->pci_lock in arm_smmu_assign_dev()
> * remove !is_hardware_domain and pdev->domain == d checks in assign to
>   support future dom0less use case when dom0 is using vPCI
> * check if pdev->domain exists before assigning to it
> * don't print ""
> * change assign logic to remove reassign reimplementation
> * explain pdev->devfn check
> * make reassign check stricter and update comment
> 
> v5->v6:
> * check for hardware_domain == NULL (dom0less test case)
> * locking: assign pdev->domain before list_add()
> 
> v4->v5:
> * deassign from hwdom
> * add TODO regarding locking
> * fixup after dropping ("xen/arm: Move is_protected flag to struct device")
> 
> v3->v4:
> * no change
> 
> v2->v3:
> * rebase
> * invoke iommu_add_pci_sideband_ids() from add_device hook
> 
> v1->v2:
> * ignore add_device/assign_device/reassign_device calls for phantom functions
>   (i.e. devfn != pdev->devfn)
> 
> downstream->v1:
> * rebase
> * move 2 replacements of s/dt_device_set_protected(dev_to_dt(dev))/device_set_protected(dev)/
>   from this commit to ("xen/arm: Move is_protected flag to struct device")
>   so as to not break ability to bisect
> * adjust patch title (remove stray space)
> * arm_smmu_(de)assign_dev: return error instead of crashing system
> * remove arm_smmu_remove_device() stub
> * update condition in arm_smmu_reassign_dev
> * style fixup
> 
> (cherry picked from commit 7ed6c3ab250d899fe6e893a514278e406a2893e8 from
>  the downstream branch poc/pci-passthrough from
>  https://gitlab.com/xen-project/people/bmarquis/xen-arm-poc.git)
> ---
>  xen/drivers/passthrough/arm/smmu-v3.c | 117 +++++++++++++++++++++++---
>  1 file changed, 106 insertions(+), 11 deletions(-)
> 
> diff --git a/xen/drivers/passthrough/arm/smmu-v3.c b/xen/drivers/passthrough/arm/smmu-v3.c
> index cee5724022..9c7c13f800 100644
> --- a/xen/drivers/passthrough/arm/smmu-v3.c
> +++ b/xen/drivers/passthrough/arm/smmu-v3.c
> @@ -1467,14 +1467,35 @@ static bool arm_smmu_sid_in_range(struct arm_smmu_device *smmu, u32 sid)
>  }
>  /* Forward declaration */
>  static struct arm_smmu_device *arm_smmu_get_by_dev(const struct device *dev);
> +static int arm_smmu_assign_dev(struct domain *d, u8 devfn, struct device *dev,
> +			       u32 flag);
> +static int arm_smmu_deassign_dev(struct domain *d, uint8_t devfn,
> +				 struct device *dev);
>  
>  static int arm_smmu_add_device(u8 devfn, struct device *dev)
>  {
>  	int i, ret;
>  	struct arm_smmu_device *smmu;
>  	struct arm_smmu_master *master;
> -	struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
> +	struct iommu_fwspec *fwspec;
> +
> +#ifdef CONFIG_HAS_PCI
> +	if ( dev_is_pci(dev) )
> +	{
> +		struct pci_dev *pdev = dev_to_pci(dev);
> +		int ret;
> +				
> +		/* Ignore calls for phantom functions */
> +		if ( devfn != pdev->devfn )
> +			return 0;
> +
> +		ret = iommu_add_pci_sideband_ids(pdev);
> +		if ( ret < 0 )
> +			iommu_fwspec_free(dev);

Do we need to return on error?


> +	}
> +#endif
>  
> +	fwspec = dev_iommu_fwspec_get(dev);
>  	if (!fwspec)
>  		return -ENODEV;
>  
> @@ -1519,17 +1540,38 @@ static int arm_smmu_add_device(u8 devfn, struct device *dev)
>  	 */
>  	arm_smmu_enable_pasid(master);
>  
> -	if (dt_device_is_protected(dev_to_dt(dev))) {
> -		dev_err(dev, "Already added to SMMUv3\n");
> -		return -EEXIST;
> -	}
> +	if ( !dev_is_pci(dev) )
> +	{
> +		if (dt_device_is_protected(dev_to_dt(dev))) {
> +			dev_err(dev, "Already added to SMMUv3\n");
> +			return -EEXIST;
> +		}
>  
> -	/* Let Xen know that the master device is protected by an IOMMU. */
> -	dt_device_set_protected(dev_to_dt(dev));
> +		/* Let Xen know that the master device is protected by an IOMMU. */
> +		dt_device_set_protected(dev_to_dt(dev));
> +	}
>  
>  	dev_info(dev, "Added master device (SMMUv3 %s StreamIds %u)\n",
>  			dev_name(fwspec->iommu_dev), fwspec->num_ids);
>  
> +#ifdef CONFIG_HAS_PCI
> +	if ( dev_is_pci(dev) )
> +	{
> +		struct pci_dev *pdev = dev_to_pci(dev);
> +
> +		/*
> +		 * During PHYSDEVOP_pci_device_add, Xen does not assign the
> +		 * device, so we must do it here.
> +		 */
> +		if ( pdev->domain )
> +		{
> +			ret = arm_smmu_assign_dev(pdev->domain, devfn, dev, 0);
> +			if (ret)
> +				goto err_free_master;
> +		}
> +	}
> +#endif
> +
>  	return 0;
>  
>  err_free_master:
> @@ -2622,6 +2664,42 @@ static int arm_smmu_assign_dev(struct domain *d, u8 devfn,
>  	struct arm_smmu_domain *smmu_domain;
>  	struct arm_smmu_xen_domain *xen_domain = dom_iommu(d)->arch.priv;
>  
> +#ifdef CONFIG_HAS_PCI
> +	if ( dev_is_pci(dev) )
> +	{
> +		struct pci_dev *pdev = dev_to_pci(dev);
> +
> +		/* Ignore calls for phantom functions */
> +		if ( devfn != pdev->devfn )
> +			return 0;
> +
> +		ASSERT(pcidevs_locked());
> +
> +		write_lock(&pdev->domain->pci_lock);
> +		list_del(&pdev->domain_list);
> +		write_unlock(&pdev->domain->pci_lock);
> +
> +		pdev->domain = d;
> +
> +		write_lock(&d->pci_lock);
> +		list_add(&pdev->domain_list, &d->pdev_list);
> +		write_unlock(&d->pci_lock);
> +
> +		/* dom_io is used as a sentinel for quarantined devices */
> +		if ( d == dom_io )
> +		{
> +			struct arm_smmu_master *master = dev_iommu_priv_get(dev);
> +			if ( !iommu_quarantine )
> +				return 0;
> +
> +			if ( master && master->domain )
> +				arm_smmu_deassign_dev(master->domain->d, devfn, dev);
> +
> +			return 0;
> +		}
> +	}
> +#endif
> +
>  	spin_lock(&xen_domain->lock);
>  
>  	/*
> @@ -2655,7 +2733,7 @@ out:
>  	return ret;
>  }
>  
> -static int arm_smmu_deassign_dev(struct domain *d, struct device *dev)
> +static int arm_smmu_deassign_dev(struct domain *d, uint8_t devfn, struct device *dev)
>  {
>  	struct iommu_domain *io_domain = arm_smmu_get_domain(d, dev);
>  	struct arm_smmu_xen_domain *xen_domain = dom_iommu(d)->arch.priv;
> @@ -2667,6 +2745,21 @@ static int arm_smmu_deassign_dev(struct domain *d, struct device *dev)
>  		return -ESRCH;
>  	}
>  
> +#ifdef CONFIG_HAS_PCI
> +	if ( dev_is_pci(dev) )
> +	{
> +		struct pci_dev *pdev = dev_to_pci(dev);
> +
> +		/* Ignore calls for phantom functions */
> +		if ( devfn != pdev->devfn )
> +			return 0;
> +
> +		/* dom_io is used as a sentinel for quarantined devices */
> +		if ( d == dom_io )
> +			return 0;
> +	}
> +#endif
> +
>  	spin_lock(&xen_domain->lock);
>  
>  	arm_smmu_detach_dev(master);
> @@ -2685,14 +2778,16 @@ static int arm_smmu_reassign_dev(struct domain *s, struct domain *t,
>  {
>  	int ret = 0;
>  
> -	/* Don't allow remapping on other domain than hwdom */
> -	if ( t && !is_hardware_domain(t) )
> +	/* Don't allow remapping on other domain than hwdom
> +	 * or dom_io for PCI devices
> +	 */
> +	if ( t && !is_hardware_domain(t) && (t != dom_io || !dev_is_pci(dev)) )
>  		return -EPERM;
>  
>  	if (t == s)
>  		return 0;
>  
> -	ret = arm_smmu_deassign_dev(s, dev);
> +	ret = arm_smmu_deassign_dev(s, devfn, dev);
>  	if (ret)
>  		return ret;
>  
> -- 
> 2.34.1
> 


From xen-devel-bounces@lists.xenproject.org Tue Apr 22 00:25:25 2025
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Date: Mon, 21 Apr 2025 17:25:10 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Mykyta Poturai 
cc: "xen-devel@lists.xenproject.org" , 
    Stewart Hildebrand , 
    Stefano Stabellini , Julien Grall , 
    Bertrand Marquis , 
    Michal Orzel , 
    Volodymyr Babchuk , 
    Andrew Cooper , 
    Anthony PERARD , 
    Jan Beulich , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
Subject: Re: [PATCH v9 7/8] xen/arm: enable dom0 to use PCI devices with
 pci-passthrough=no
In-Reply-To: <132afbca390edd6e9fd7b1ffacf6c5aff0d29aa7.1741958647.git.mykyta_poturai@epam.com>
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References:  <132afbca390edd6e9fd7b1ffacf6c5aff0d29aa7.1741958647.git.mykyta_poturai@epam.com>
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On Fri, 14 Mar 2025, Mykyta Poturai wrote:
> From: Stewart Hildebrand 
> 
> Enable the use of IOMMU + PCI in dom0 without having to specify
> "pci-passthrough=yes". We rely on dom0 to initialize the PCI controller
> and perform a PHYSDEVOP_pci_device_add call to add each device to SMMU.
> 
> Enable pci_init() for initializing Xen's internal PCI subsystem, and
> allow PHYSDEVOP_pci_device_add when pci-passthrough is disabled.
> 
> Signed-off-by: Stewart Hildebrand 
> Signed-off-by: Mykyta Poturai 
> ---
> hmm. Since
>   dec9e02f3190 ("xen: avoid generation of stub  header")
> Should we also move is_pci_passthrough_enabled() back to xen/arch/arm/include/asm/pci.h ?
> Not sure if PPC/RISC-V will plan on using this check.
> 
> v8-v9:
> * move iommu_enabled check inside is_pci_passthrough_enabled()
> 
> v7->v8:
> * bring back x86 definition of is_pci_passthrough_enabled()
> 
> v6->v7:
> * remove x86 definition of is_pci_passthrough_enabled()
> * update comments
> * make pci_physdev_op checks stricter
> 
> v5->v6:
> * new patch - this effectively replaces
>   ("Revert "xen/arm: Add cmdline boot option "pci-passthrough = """)
> ---
>  xen/arch/arm/domain_build.c    |  2 +-
>  xen/arch/arm/include/asm/pci.h |  5 +----
>  xen/arch/arm/pci/pci.c         | 11 ++++++++++-
>  xen/arch/x86/include/asm/pci.h |  2 +-
>  xen/drivers/pci/physdev.c      |  4 ++--
>  xen/include/xen/pci.h          |  2 +-
>  6 files changed, 16 insertions(+), 10 deletions(-)
> 
> diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
> index 7b47abade1..fbd6db9438 100644
> --- a/xen/arch/arm/domain_build.c
> +++ b/xen/arch/arm/domain_build.c
> @@ -526,7 +526,7 @@ static int __init handle_linux_pci_domain(struct kernel_info *kinfo,
>      uint16_t segment;
>      int res;
>  
> -    if ( !is_pci_passthrough_enabled() )
> +    if ( !is_pci_passthrough_enabled(false) )
>          return 0;
>  
>      if ( !dt_device_type_is_equal(node, "pci") )
> diff --git a/xen/arch/arm/include/asm/pci.h b/xen/arch/arm/include/asm/pci.h
> index 7f77226c9b..3ae85b4666 100644
> --- a/xen/arch/arm/include/asm/pci.h
> +++ b/xen/arch/arm/include/asm/pci.h
> @@ -111,10 +111,7 @@ pci_find_host_bridge_node(const struct pci_dev *pdev);
>  int pci_get_host_bridge_segment(const struct dt_device_node *node,
>                                  uint16_t *segment);
>  
> -static always_inline bool is_pci_passthrough_enabled(void)
> -{
> -    return pci_passthrough_enabled;
> -}
> +bool is_pci_passthrough_enabled(bool dom0);
>  
>  void arch_pci_init_pdev(struct pci_dev *pdev);
>  
> diff --git a/xen/arch/arm/pci/pci.c b/xen/arch/arm/pci/pci.c
> index 78b97beaef..79bb8728a4 100644
> --- a/xen/arch/arm/pci/pci.c
> +++ b/xen/arch/arm/pci/pci.c
> @@ -16,9 +16,18 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  
> +bool is_pci_passthrough_enabled(bool dom0)
> +{
> +    if ( dom0 )
> +        return pci_passthrough_enabled || iommu_enabled;

Could this be written as:

    if ( is_hardware_domain(current->domain) )
        return pci_passthrough_enabled || iommu_enabled;

If so, then I think it would be better, if not:

Reviewed-by: Stefano Stabellini 



> +    return pci_passthrough_enabled;
> +}
> +
>  /*
>   * PIRQ event channels are not supported on Arm, so nothing to do.
>   */
> @@ -85,7 +94,7 @@ static int __init pci_init(void)
>       * Enable PCI passthrough when has been enabled explicitly
>       * (pci-passthrough=on).
>       */
> -    if ( !pci_passthrough_enabled )
> +    if ( !is_pci_passthrough_enabled(true) )
>          return 0;
>  
>      pci_segments_init();
> diff --git a/xen/arch/x86/include/asm/pci.h b/xen/arch/x86/include/asm/pci.h
> index fd5480d67d..bffeaa507d 100644
> --- a/xen/arch/x86/include/asm/pci.h
> +++ b/xen/arch/x86/include/asm/pci.h
> @@ -50,7 +50,7 @@ extern int pci_mmcfg_config_num;
>  extern struct acpi_mcfg_allocation *pci_mmcfg_config;
>  
>  /* Unlike ARM, PCI passthrough is always enabled for x86. */
> -static always_inline bool is_pci_passthrough_enabled(void)
> +static always_inline bool is_pci_passthrough_enabled(__maybe_unused bool dom0)
>  {
>      return true;
>  }
> diff --git a/xen/drivers/pci/physdev.c b/xen/drivers/pci/physdev.c
> index 0161a85e1e..18448b94b3 100644
> --- a/xen/drivers/pci/physdev.c
> +++ b/xen/drivers/pci/physdev.c
> @@ -19,7 +19,7 @@ ret_t pci_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
>          struct pci_dev_info pdev_info;
>          nodeid_t node = NUMA_NO_NODE;
>  
> -        if ( !is_pci_passthrough_enabled() )
> +        if ( !is_pci_passthrough_enabled(true) )
>              return -EOPNOTSUPP;
>  
>          ret = -EFAULT;
> @@ -57,7 +57,7 @@ ret_t pci_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
>      case PHYSDEVOP_pci_device_remove: {
>          struct physdev_pci_device dev;
>  
> -        if ( !is_pci_passthrough_enabled() )
> +        if ( !is_pci_passthrough_enabled(true) )
>              return -EOPNOTSUPP;
>  
>          ret = -EFAULT;
> diff --git a/xen/include/xen/pci.h b/xen/include/xen/pci.h
> index f784e91160..c4a49cf584 100644
> --- a/xen/include/xen/pci.h
> +++ b/xen/include/xen/pci.h
> @@ -74,7 +74,7 @@ typedef union {
>  
>  struct arch_pci_dev { };
>  
> -static inline bool is_pci_passthrough_enabled(void)
> +static inline bool is_pci_passthrough_enabled(__maybe_unused bool dom0)
>  {
>      return false;
>  }
> -- 
> 2.34.1
> 


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Date: Mon, 21 Apr 2025 17:31:56 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Mykyta Poturai 
cc: "xen-devel@lists.xenproject.org" , 
    Rahul Singh , 
    Stefano Stabellini , Julien Grall , 
    Bertrand Marquis , 
    Michal Orzel , 
    Volodymyr Babchuk , 
    Stewart Hildebrand 
Subject: Re: [PATCH v9 8/8] xen/arm: Map ITS doorbell register to IOMMU page
 tables
In-Reply-To: 
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References:  
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On Fri, 14 Mar 2025, Mykyta Poturai wrote:
> From: Rahul Singh 
> 
> When ITS is enabled and PCI devices that are behind an SMMU generate an
> MSI interrupt, SMMU fault will be observed as there is currently no
> mapping in p2m table for the ITS translation register (GITS_TRANSLATER).
> 
> A mapping is required in the iommu page tables so that the device can
> generate the MSI interrupt writing to the GITS_TRANSLATER register.
> 
> The GITS_TRANSLATER register is a 32-bit register, and there is nothing
> else in a page containing it, so map that page.
> 
> Signed-off-by: Rahul Singh 
> Signed-off-by: Stewart Hildebrand 
> Signed-off-by: Mykyta Poturai 
> ---
> This patch was originally picked up from [1], and commit description
> loosely borrowed from [2].
> 
> Example SMMUv3 fault (qemu-system-aarch64 virt model), ITS base 0x8080000:
> 
> (XEN) SMMUv3: /smmuv3@9050000: event 0x10 received:
> (XEN) SMMUv3: /smmuv3@9050000:  0x0000000800000010
> (XEN) SMMUv3: /smmuv3@9050000:  0x0000008000000000
> (XEN) SMMUv3: /smmuv3@9050000:  0x0000000008090040
> (XEN) SMMUv3: /smmuv3@9050000:  0x0000000000000000
> 
> Example SMMUv2 fault (AMD/Xilinx Versal), ITS base 0xf9020000:
> 
> (XEN) smmu: /axi/smmu@fd800000: Unhandled context fault: fsr=0x402, iova=0xf9030040, fsynr=0x12, cb=0
> 
> v8->v9:
> * no changes
> 
> v7->v8:
> * no changes
> 
> v6->v7:
> * add tlb flush after mapping
> * style: update formatting
> * revert back to printk with XENLOG_G_ERR
> 
> v5->v6:
> * switch to iommu_map() interface
> * fix page_count argument
> * style fixup
> * use gprintk instead of printk
> * add my Signed-off-by
> * move to vgic_v3_its_init_virtual()
> 
> v4->v5:
> * new patch
> 
> [1] https://lists.xenproject.org/archives/html/xen-devel/2023-07/msg00483.html
> [2] https://gitlab.com/xen-project/people/bmarquis/xen-arm-poc/-/commit/6232a0d53377009bb7fbc3c3ab81d0153734be6b
> ---
>  xen/arch/arm/vgic-v3-its.c | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
> 
> diff --git a/xen/arch/arm/vgic-v3-its.c b/xen/arch/arm/vgic-v3-its.c
> index c65c1dbf52..376254f206 100644
> --- a/xen/arch/arm/vgic-v3-its.c
> +++ b/xen/arch/arm/vgic-v3-its.c
> @@ -1478,6 +1478,26 @@ static int vgic_v3_its_init_virtual(struct domain *d, paddr_t guest_addr,
>  
>      register_mmio_handler(d, &vgic_its_mmio_handler, guest_addr, SZ_64K, its);
>  
> +    if ( is_iommu_enabled(its->d) )
> +    {
> +        mfn_t mfn = maddr_to_mfn(its->doorbell_address);
> +        unsigned int flush_flags = 0;
> +        int ret = iommu_map(its->d, _dfn(mfn_x(mfn)), mfn, 1, IOMMUF_writable,
> +                            &flush_flags);

Should this be:

        int ret = iommu_map(its->d, _dfn(PFN_DOWN(its->doorbell_address)), mfn, 1, IOMMUF_writable,
                            &flush_flags);

?


> +        if ( ret < 0 )
> +        {
> +            printk(XENLOG_G_ERR
> +                    "GICv3: Map ITS translation register for %pd failed.\n",
> +                    its->d);
> +            return ret;
> +        }
> +
> +        ret = iommu_iotlb_flush(its->d, _dfn(mfn_x(mfn)), 1, flush_flags);

And this:

       ret = iommu_iotlb_flush(its->d, _dfn(PFN_DOWN(its->doorbell_address)), 1, flush_flags);

?

The original code in this patch assumes that the mapping is 1:1 but
actually its->doorbell_address is set to guest_addr +
ITS_DOORBELL_OFFSET and could potentially be not 1:1 ?

> +        if ( ret < 0 )
> +            return ret;
> +    }
> +
>      /* Register the virtual ITS to be able to clean it up later. */
>      list_add_tail(&its->vits_list, &d->arch.vgic.vits_list);
>  
> -- 
> 2.34.1
> 


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Date: Mon, 21 Apr 2025 17:39:58 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Mykyta Poturai 
cc: "xen-devel@lists.xenproject.org" , 
    Oleksandr Tyshchenko , 
    Stefano Stabellini , Julien Grall , 
    Bertrand Marquis , 
    Michal Orzel , 
    Stewart Hildebrand , 
    Julien Grall 
Subject: Re: [PATCH v9 1/8] iommu/arm: Add iommu_dt_xlate()
In-Reply-To: 
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On Fri, 14 Mar 2025, Mykyta Poturai wrote:
> From: Oleksandr Tyshchenko 
> 
> Move code for processing DT IOMMU specifier to a separate helper.
> This helper will be re-used for adding PCI devices by the subsequent
> patches as we will need exact the same actions for processing
> DT PCI-IOMMU specifier.
> 
> Signed-off-by: Oleksandr Tyshchenko 
> Signed-off-by: Stewart Hildebrand 
> Signed-off-by: Mykyta Poturai 
> Reviewed-by: Julien Grall 

Committed


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Date: Tue, 22 Apr 2025 01:15:53 +0000
To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, jbeulich@suse.com, roger.pau@citrix.com, dmukhin@ford.com
Subject: [PATCH v2] x86/vmx: Update __vmread() signature
Message-ID: <20250422011530.3010312-1-dmukhin@ford.com>
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From: Denis Mukhin 

Current implementation of __vmread() returns the result via pointer argumen=
t
which leads to having excess code in some places.

Update the signature of __vmread() to return `unsigned long` and drop the
pointer argument as per suggestion in [1].

Update all call sites everywhere in the VT-x code.

[1] https://lore.kernel.org/xen-devel/c452a1d7-4a57-4c5f-8a83-36a74ff228ec@=
citrix.com/

Signed-off-by: Denis Mukhin 
---
bloat-o-meter reports:
add/remove: 0/0 grow/shrink: 2/3 up/down: 8/-28 (-20)
Function                                     old     new   delta
vmx_vmexit_handler                          7000    7005      +5
nvmx_hap_walk_L1_p2m                         258     261      +3
vmx_do_resume                                485     484      -1
shadow_to_vvmcs_bulk                         304     294     -10
vvmcs_to_shadow_bulk                         296     279     -17
Total: Before=3D3540972, After=3D3540952, chg -0.00%

Changes since v1:
- Limited the scope of the change to __vmread() signature change only
- Link to v1: https://lore.kernel.org/xen-devel/20250408011454.2274613-1-dm=
ukhin@ford.com/
- Link to CI: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines=
/1778785297
---
 xen/arch/x86/cpu/vpmu_intel.c          |   3 +-
 xen/arch/x86/hvm/vmx/intr.c            |  26 +---
 xen/arch/x86/hvm/vmx/realmode.c        |   2 +-
 xen/arch/x86/hvm/vmx/vmcs.c            |  11 +-
 xen/arch/x86/hvm/vmx/vmx.c             | 208 +++++++++++--------------
 xen/arch/x86/hvm/vmx/vvmx.c            |  43 +++--
 xen/arch/x86/include/asm/hvm/vmx/vmx.h |  19 +--
 7 files changed, 132 insertions(+), 180 deletions(-)

diff --git a/xen/arch/x86/cpu/vpmu_intel.c b/xen/arch/x86/cpu/vpmu_intel.c
index 7ce98ee42e..3c08448ba4 100644
--- a/xen/arch/x86/cpu/vpmu_intel.c
+++ b/xen/arch/x86/cpu/vpmu_intel.c
@@ -796,8 +796,7 @@ static int cf_check core2_vpmu_do_interrupt(void)
     else
     {
         /* No PMC overflow but perhaps a Trace Message interrupt. */
-        __vmread(GUEST_IA32_DEBUGCTL, &msr_content);
-        if ( !(msr_content & IA32_DEBUGCTLMSR_TR) )
+        if ( !(__vmread(GUEST_IA32_DEBUGCTL) & IA32_DEBUGCTLMSR_TR) )
             return 0;
     }
=20
diff --git a/xen/arch/x86/hvm/vmx/intr.c b/xen/arch/x86/hvm/vmx/intr.c
index 91b407e6bc..9e9217e8b6 100644
--- a/xen/arch/x86/hvm/vmx/intr.c
+++ b/xen/arch/x86/hvm/vmx/intr.c
@@ -63,9 +63,8 @@ static void vmx_enable_intr_window(struct vcpu *v, struct=
 hvm_intack intack)
=20
     if ( unlikely(tb_init_done) )
     {
-        unsigned long intr;
+        unsigned long intr =3D __vmread(VM_ENTRY_INTR_INFO);
=20
-        __vmread(VM_ENTRY_INTR_INFO, &intr);
         TRACE(TRC_HVM_INTR_WINDOW, intack.vector, intack.source,
               (intr & INTR_INFO_VALID_MASK) ? intr & 0xff : -1);
     }
@@ -81,9 +80,8 @@ static void vmx_enable_intr_window(struct vcpu *v, struct=
 hvm_intack intack)
          * we may immediately vmexit and hance make no progress!
          * (see SDM 3B 21.3, "Other Causes of VM Exits").
          */
-        unsigned long intr_shadow;
+        unsigned long intr_shadow =3D __vmread(GUEST_INTERRUPTIBILITY_INFO=
);
=20
-        __vmread(GUEST_INTERRUPTIBILITY_INFO, &intr_shadow);
         if ( intr_shadow & VMX_INTR_SHADOW_STI )
         {
             /* Having both STI-blocking and MOV-SS-blocking fails vmentry.=
 */
@@ -144,14 +142,8 @@ enum hvm_intblk cf_check nvmx_intr_blocked(struct vcpu=
 *v)
         if ( nvcpu->nv_vmexit_pending ||
              nvcpu->nv_vmswitch_in_progress )
             r =3D hvm_intblk_rflags_ie;
-        else
-        {
-            unsigned long intr_info;
-
-            __vmread(VM_ENTRY_INTR_INFO, &intr_info);
-            if ( intr_info & INTR_INFO_VALID_MASK )
-                r =3D hvm_intblk_rflags_ie;
-        }
+        else if ( __vmread(VM_ENTRY_INTR_INFO) & INTR_INFO_VALID_MASK )
+            r =3D hvm_intblk_rflags_ie;
     }
     else if ( nvcpu->nv_vmentry_pending )
         r =3D hvm_intblk_rflags_ie;
@@ -253,8 +245,6 @@ void asmlinkage vmx_intr_assist(void)
     pt_vector =3D pt_update_irq(v);
=20
     do {
-        unsigned long intr_info;
-
         intack =3D hvm_vcpu_has_pending_irq(v);
         if ( likely(intack.source =3D=3D hvm_intsrc_none) )
             goto out;
@@ -275,8 +265,7 @@ void asmlinkage vmx_intr_assist(void)
                 goto out;
             }
=20
-            __vmread(VM_ENTRY_INTR_INFO, &intr_info);
-            if ( intr_info & INTR_INFO_VALID_MASK )
+            if ( __vmread(VM_ENTRY_INTR_INFO) & INTR_INFO_VALID_MASK )
             {
                 if ( (intack.source =3D=3D hvm_intsrc_pic) ||
                      (intack.source =3D=3D hvm_intsrc_nmi) ||
@@ -299,8 +288,7 @@ void asmlinkage vmx_intr_assist(void)
         }
         else
         {
-            __vmread(VM_ENTRY_INTR_INFO, &intr_info);
-            if ( intr_info & INTR_INFO_VALID_MASK )
+            if ( __vmread(VM_ENTRY_INTR_INFO) & INTR_INFO_VALID_MASK )
             {
                 vmx_enable_intr_window(v, intack);
                 goto out;
@@ -377,7 +365,7 @@ void asmlinkage vmx_intr_assist(void)
         }
=20
         /* we need update the RVI field */
-        __vmread(GUEST_INTR_STATUS, &status);
+        status =3D __vmread(GUEST_INTR_STATUS);
         status &=3D ~VMX_GUEST_INTR_STATUS_SUBFIELD_BITMASK;
         status |=3D VMX_GUEST_INTR_STATUS_SUBFIELD_BITMASK &
                     intack.vector;
diff --git a/xen/arch/x86/hvm/vmx/realmode.c b/xen/arch/x86/hvm/vmx/realmod=
e.c
index ff44ddcfa6..ee7a3570ec 100644
--- a/xen/arch/x86/hvm/vmx/realmode.c
+++ b/xen/arch/x86/hvm/vmx/realmode.c
@@ -159,7 +159,7 @@ void vmx_realmode(struct cpu_user_regs *regs)
     unsigned int emulations =3D 0;
=20
     /* Get-and-clear VM_ENTRY_INTR_INFO. */
-    __vmread(VM_ENTRY_INTR_INFO, &intr_info);
+    intr_info =3D __vmread(VM_ENTRY_INTR_INFO);
     if ( intr_info & INTR_INFO_VALID_MASK )
         __vmwrite(VM_ENTRY_INTR_INFO, 0);
=20
diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c
index a44475ae15..c2e4410f89 100644
--- a/xen/arch/x86/hvm/vmx/vmcs.c
+++ b/xen/arch/x86/hvm/vmx/vmcs.c
@@ -1031,7 +1031,7 @@ u64 virtual_vmcs_vmread(const struct vcpu *v, u32 vmc=
s_encoding)
     u64 res;
=20
     virtual_vmcs_enter(v);
-    __vmread(vmcs_encoding, &res);
+    res =3D __vmread(vmcs_encoding);
     virtual_vmcs_exit(v);
=20
     return res;
@@ -1691,7 +1691,7 @@ void vmx_vcpu_flush_pml_buffer(struct vcpu *v)
=20
     vmx_vmcs_enter(v);
=20
-    __vmread(GUEST_PML_INDEX, &pml_idx);
+    pml_idx =3D __vmread(GUEST_PML_INDEX);
=20
     /* Do nothing if PML buffer is empty. */
     if ( pml_idx =3D=3D (NR_PML_ENTRIES - 1) )
@@ -1874,9 +1874,8 @@ void vmx_destroy_vmcs(struct vcpu *v)
 void vmx_vmentry_failure(void)
 {
     struct vcpu *curr =3D current;
-    unsigned long error;
+    unsigned long error =3D __vmread(VM_INSTRUCTION_ERROR);
=20
-    __vmread(VM_INSTRUCTION_ERROR, &error);
     gprintk(XENLOG_ERR, "VM%s error: %#lx\n",
             curr->arch.hvm.vmx.launched ? "RESUME" : "LAUNCH", error);
=20
@@ -1905,7 +1904,6 @@ void cf_check vmx_do_resume(void)
 {
     struct vcpu *v =3D current;
     bool debug_state;
-    unsigned long host_cr4;
=20
     if ( v->arch.hvm.vmx.active_cpu =3D=3D smp_processor_id() )
         vmx_vmcs_reload(v);
@@ -1957,8 +1955,7 @@ void cf_check vmx_do_resume(void)
     hvm_do_resume(v);
=20
     /* Sync host CR4 in case its value has changed. */
-    __vmread(HOST_CR4, &host_cr4);
-    if ( host_cr4 !=3D read_cr4() )
+    if ( __vmread(HOST_CR4) !=3D read_cr4() )
         __vmwrite(HOST_CR4, read_cr4());
=20
     reset_stack_and_jump(vmx_asm_do_vmentry);
diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c
index 4883bd823d..a95d46f019 100644
--- a/xen/arch/x86/hvm/vmx/vmx.c
+++ b/xen/arch/x86/hvm/vmx/vmx.c
@@ -902,7 +902,7 @@ int cf_check vmx_guest_x86_mode(struct vcpu *v)
         return X86_MODE_REAL;
     if ( unlikely(guest_cpu_user_regs()->eflags & X86_EFLAGS_VM) )
         return X86_MODE_VM86;
-    __vmread(GUEST_CS_AR_BYTES, &cs_ar_bytes);
+    cs_ar_bytes =3D __vmread(GUEST_CS_AR_BYTES);
     if ( hvm_long_mode_active(v) &&
          likely(cs_ar_bytes & X86_SEG_AR_CS_LM_ACTIVE) )
         return X86_MODE_64BIT;
@@ -926,7 +926,7 @@ static void vmx_save_dr(struct vcpu *v)
     v->arch.dr[3] =3D read_debugreg(3);
     v->arch.dr6   =3D read_debugreg(6);
     /* DR7 must be saved as it is used by vmx_restore_dr(). */
-    __vmread(GUEST_DR7, &v->arch.dr7);
+    v->arch.dr7 =3D __vmread(GUEST_DR7);
 }
=20
 static void __restore_debug_registers(struct vcpu *v)
@@ -963,17 +963,17 @@ static void vmx_vmcs_save(struct vcpu *v, struct hvm_=
hw_cpu *c)
=20
     vmx_vmcs_enter(v);
=20
-    __vmread(GUEST_SYSENTER_CS, &c->sysenter_cs);
-    __vmread(GUEST_SYSENTER_ESP, &c->sysenter_esp);
-    __vmread(GUEST_SYSENTER_EIP, &c->sysenter_eip);
+    c->sysenter_cs =3D __vmread(GUEST_SYSENTER_CS);
+    c->sysenter_esp =3D __vmread(GUEST_SYSENTER_ESP);
+    c->sysenter_eip =3D __vmread(GUEST_SYSENTER_EIP);
=20
-    __vmread(VM_ENTRY_INTR_INFO, &ev);
+    ev =3D __vmread(VM_ENTRY_INTR_INFO);
     if ( (ev & INTR_INFO_VALID_MASK) &&
          hvm_event_needs_reinjection(MASK_EXTR(ev, INTR_INFO_INTR_TYPE_MAS=
K),
                                      ev & INTR_INFO_VECTOR_MASK) )
     {
         c->pending_event =3D ev;
-        __vmread(VM_ENTRY_EXCEPTION_ERROR_CODE, &ev);
+        ev =3D __vmread(VM_ENTRY_EXCEPTION_ERROR_CODE);
         c->error_code =3D ev;
     }
=20
@@ -1197,11 +1197,7 @@ static void cf_check vmx_ctxt_switch_to(struct vcpu =
*v)
=20
 unsigned int vmx_get_cpl(void)
 {
-    unsigned long attr;
-
-    __vmread(GUEST_SS_AR_BYTES, &attr);
-
-    return MASK_EXTR(attr, X86_SEG_AR_DPL);
+    return MASK_EXTR(__vmread(GUEST_SS_AR_BYTES), X86_SEG_AR_DPL);
 }
=20
 static unsigned int cf_check _vmx_get_cpl(struct vcpu *v)
@@ -1271,14 +1267,14 @@ static void cf_check vmx_get_segment_register(
         fallthrough;
=20
     case x86_seg_es ... x86_seg_gs:
-        __vmread(GUEST_SEG_SELECTOR(tmp_seg), &sel);
-        __vmread(GUEST_SEG_AR_BYTES(tmp_seg), &attr);
+        sel =3D __vmread(GUEST_SEG_SELECTOR(tmp_seg));
+        attr =3D __vmread(GUEST_SEG_AR_BYTES(tmp_seg));
         fallthrough;
=20
     case x86_seg_gdtr:
     case x86_seg_idtr:
-        __vmread(GUEST_SEG_LIMIT(tmp_seg),    &limit);
-        __vmread(GUEST_SEG_BASE(tmp_seg),     ®->base);
+        limit =3D __vmread(GUEST_SEG_LIMIT(tmp_seg));
+        reg->base =3D __vmread(GUEST_SEG_BASE(tmp_seg));
         break;
=20
     default:
@@ -1436,7 +1432,7 @@ static int cf_check vmx_get_guest_pat(struct vcpu *v,=
 u64 *gpat)
         return 0;
=20
     vmx_vmcs_enter(v);
-    __vmread(GUEST_PAT, gpat);
+    *gpat =3D __vmread(GUEST_PAT);
     vmx_vmcs_exit(v);
     return 1;
 }
@@ -1555,11 +1551,7 @@ static void cf_check vmx_init_hypercall_page(void *p=
)
=20
 static unsigned int cf_check vmx_get_interrupt_shadow(struct vcpu *v)
 {
-    unsigned long intr_shadow;
-
-    __vmread(GUEST_INTERRUPTIBILITY_INFO, &intr_shadow);
-
-    return intr_shadow;
+    return __vmread(GUEST_INTERRUPTIBILITY_INFO);
 }
=20
 static void cf_check vmx_set_interrupt_shadow(
@@ -1573,12 +1565,12 @@ static void cf_check vmx_get_nonreg_state(struct vc=
pu *v,
 {
     vmx_vmcs_enter(v);
=20
-    __vmread(GUEST_ACTIVITY_STATE, &nrs->vmx.activity_state);
-    __vmread(GUEST_INTERRUPTIBILITY_INFO, &nrs->vmx.interruptibility_info)=
;
-    __vmread(GUEST_PENDING_DBG_EXCEPTIONS, &nrs->vmx.pending_dbg);
+    nrs->vmx.activity_state =3D __vmread(GUEST_ACTIVITY_STATE);
+    nrs->vmx.interruptibility_info =3D __vmread(GUEST_INTERRUPTIBILITY_INF=
O);
+    nrs->vmx.pending_dbg =3D __vmread(GUEST_PENDING_DBG_EXCEPTIONS);
=20
     if ( cpu_has_vmx_virtual_intr_delivery )
-        __vmread(GUEST_INTR_STATUS, &nrs->vmx.interrupt_status);
+        nrs->vmx.interrupt_status =3D __vmread(GUEST_INTR_STATUS);
=20
     vmx_vmcs_exit(v);
 }
@@ -1896,7 +1888,7 @@ static void cf_check vmx_update_guest_efer(struct vcp=
u *v)
      * The intended guest running mode is derived from VM_ENTRY_IA32E_MODE=
,
      * which (architecturally) is the guest's LMA setting.
      */
-    __vmread(VM_ENTRY_CONTROLS, &entry_ctls);
+    entry_ctls =3D __vmread(VM_ENTRY_CONTROLS);
=20
     entry_ctls &=3D ~VM_ENTRY_IA32E_MODE;
     if ( guest_efer & EFER_LMA )
@@ -2063,9 +2055,10 @@ static void cf_check vmx_inject_event(const struct x=
86_event *event)
         {
             unsigned long val;
=20
-            __vmread(GUEST_DR7, &val);
+            val =3D __vmread(GUEST_DR7);
             __vmwrite(GUEST_DR7, val & ~DR_GENERAL_DETECT);
-            __vmread(GUEST_IA32_DEBUGCTL, &val);
+
+            val =3D __vmread(GUEST_IA32_DEBUGCTL);
             __vmwrite(GUEST_IA32_DEBUGCTL, val & ~IA32_DEBUGCTLMSR_LBR);
         }
         if ( cpu_has_monitor_trap_flag )
@@ -2089,7 +2082,7 @@ static void cf_check vmx_inject_event(const struct x8=
6_event *event)
     if ( nestedhvm_vcpu_in_guestmode(curr) )
         intr_info =3D vcpu_2_nvmx(curr).intr.intr_info;
     else
-        __vmread(VM_ENTRY_INTR_INFO, &intr_info);
+        intr_info =3D __vmread(VM_ENTRY_INTR_INFO);
=20
     if ( unlikely(intr_info & INTR_INFO_VALID_MASK) &&
          (MASK_EXTR(intr_info, INTR_INFO_INTR_TYPE_MASK) =3D=3D X86_ET_HW_=
EXC) )
@@ -2125,12 +2118,9 @@ static void cf_check vmx_inject_event(const struct x=
86_event *event)
=20
 static bool cf_check vmx_event_pending(const struct vcpu *v)
 {
-    unsigned long intr_info;
-
     ASSERT(v =3D=3D current);
-    __vmread(VM_ENTRY_INTR_INFO, &intr_info);
=20
-    return intr_info & INTR_INFO_VALID_MASK;
+    return __vmread(VM_ENTRY_INTR_INFO) & INTR_INFO_VALID_MASK;
 }
=20
 static void cf_check vmx_set_info_guest(struct vcpu *v)
@@ -2149,7 +2139,7 @@ static void cf_check vmx_set_info_guest(struct vcpu *=
v)
      * to set the GUEST_PENDING_DBG_EXCEPTIONS.BS here incurs
      * immediately vmexit and hence make no progress.
      */
-    __vmread(GUEST_INTERRUPTIBILITY_INFO, &intr_shadow);
+    intr_shadow =3D __vmread(GUEST_INTERRUPTIBILITY_INFO);
     if ( v->domain->debugger_attached &&
          (v->arch.user_regs.eflags & X86_EFLAGS_TF) &&
          (intr_shadow & VMX_INTR_SHADOW_STI) )
@@ -2178,7 +2168,7 @@ static u8 set_svi(int isr)
     if ( isr < 0 )
         isr =3D 0;
=20
-    __vmread(GUEST_INTR_STATUS, &status);
+    status =3D __vmread(GUEST_INTR_STATUS);
     old =3D status >> VMX_GUEST_INTR_STATUS_SVI_OFFSET;
     if ( isr !=3D old )
     {
@@ -2518,9 +2508,9 @@ static bool cf_check vmx_vcpu_emulate_ve(struct vcpu =
*v)
     veinfo->eptp_index =3D vcpu_altp2m(v).p2midx;
=20
     vmx_vmcs_enter(v);
-    __vmread(EXIT_QUALIFICATION, &veinfo->exit_qualification);
-    __vmread(GUEST_LINEAR_ADDRESS, &veinfo->gla);
-    __vmread(GUEST_PHYSICAL_ADDRESS, &veinfo->gpa);
+    veinfo->exit_qualification =3D __vmread(EXIT_QUALIFICATION);
+    veinfo->gla =3D __vmread(GUEST_LINEAR_ADDRESS);
+    veinfo->gpa =3D __vmread(GUEST_PHYSICAL_ADDRESS);
     vmx_vmcs_exit(v);
=20
     hvm_inject_hw_exception(X86_EXC_VE,
@@ -2541,8 +2531,8 @@ static bool cf_check vmx_get_pending_event(
     unsigned long intr_info, error_code;
=20
     vmx_vmcs_enter(v);
-    __vmread(VM_ENTRY_INTR_INFO, &intr_info);
-    __vmread(VM_ENTRY_EXCEPTION_ERROR_CODE, &error_code);
+    intr_info =3D __vmread(VM_ENTRY_INTR_INFO);
+    error_code =3D __vmread(VM_ENTRY_EXCEPTION_ERROR_CODE);
     vmx_vmcs_exit(v);
=20
     if ( !(intr_info & INTR_INFO_VALID_MASK) )
@@ -2739,11 +2729,11 @@ static uint64_t cf_check vmx_get_reg(struct vcpu *v=
, unsigned int reg)
     {
     case MSR_SPEC_CTRL:
         ASSERT(cpu_has_vmx_virt_spec_ctrl);
-        __vmread(SPEC_CTRL_SHADOW, &val);
+        val =3D __vmread(SPEC_CTRL_SHADOW);
         break;
=20
     case MSR_IA32_BNDCFGS:
-        __vmread(GUEST_BNDCFGS, &val);
+        val =3D __vmread(GUEST_BNDCFGS);
         break;
=20
     default:
@@ -3161,9 +3151,9 @@ void __init vmx_fill_funcs(void)
  */
 static int get_instruction_length(void)
 {
-    unsigned long len;
+    /* Safe: callers audited */
+    unsigned long len =3D __vmread(VM_EXIT_INSTRUCTION_LEN);
=20
-    __vmread(VM_EXIT_INSTRUCTION_LEN, &len); /* Safe: callers audited */
     BUG_ON((len < 1) || (len > MAX_INST_LEN));
     return len;
 }
@@ -3176,7 +3166,7 @@ void update_guest_eip(void)
     regs->rip +=3D get_instruction_length(); /* Safe: callers audited */
     regs->eflags &=3D ~X86_EFLAGS_RF;
=20
-    __vmread(GUEST_INTERRUPTIBILITY_INFO, &x);
+    x =3D __vmread(GUEST_INTERRUPTIBILITY_INFO);
     if ( x & (VMX_INTR_SHADOW_STI | VMX_INTR_SHADOW_MOV_SS) )
     {
         x &=3D ~(VMX_INTR_SHADOW_STI | VMX_INTR_SHADOW_MOV_SS);
@@ -3424,21 +3414,21 @@ static int cf_check vmx_msr_read_intercept(
     switch ( msr )
     {
     case MSR_IA32_SYSENTER_CS:
-        __vmread(GUEST_SYSENTER_CS, msr_content);
+        *msr_content =3D __vmread(GUEST_SYSENTER_CS);
         break;
     case MSR_IA32_SYSENTER_ESP:
-        __vmread(GUEST_SYSENTER_ESP, msr_content);
+        *msr_content =3D __vmread(GUEST_SYSENTER_ESP);
         break;
     case MSR_IA32_SYSENTER_EIP:
-        __vmread(GUEST_SYSENTER_EIP, msr_content);
+        *msr_content =3D __vmread(GUEST_SYSENTER_EIP);
         break;
=20
     case MSR_FS_BASE:
-        __vmread(GUEST_FS_BASE, msr_content);
+        *msr_content =3D __vmread(GUEST_FS_BASE);
         break;
=20
     case MSR_GS_BASE:
-        __vmread(GUEST_GS_BASE, msr_content);
+        *msr_content =3D __vmread(GUEST_GS_BASE);
         break;
=20
     case MSR_SHADOW_GS_BASE:
@@ -3462,7 +3452,7 @@ static int cf_check vmx_msr_read_intercept(
         break;
=20
     case MSR_IA32_DEBUGCTLMSR:
-        __vmread(GUEST_IA32_DEBUGCTL, msr_content);
+        *msr_content =3D __vmread(GUEST_IA32_DEBUGCTL);
         break;
=20
     case MSR_IA32_VMX_BASIC...MSR_IA32_VMX_VMFUNC:
@@ -3828,7 +3818,7 @@ static void vmx_do_extint(struct cpu_user_regs *regs)
 {
     unsigned long vector;
=20
-    __vmread(VM_EXIT_INTR_INFO, &vector);
+    vector =3D __vmread(VM_EXIT_INTR_INFO);
     BUG_ON(!(vector & INTR_INFO_VALID_MASK));
=20
     vector &=3D INTR_INFO_VECTOR_MASK;
@@ -3893,7 +3883,7 @@ static void ept_handle_violation(ept_qual_t q, paddr_=
t gpa)
=20
     if ( q.gla_valid )
     {
-        __vmread(GUEST_LINEAR_ADDRESS, &gla);
+        gla =3D __vmread(GUEST_LINEAR_ADDRESS);
         npfec.gla_valid =3D 1;
         if( q.gla_fault )
             npfec.kind =3D npfec_kind_with_gla;
@@ -3944,7 +3934,7 @@ static void vmx_failed_vmentry(unsigned int exit_reas=
on,
     struct vcpu *curr =3D current;
=20
     printk("%pv vmentry failure (reason %#x): ", curr, exit_reason);
-    __vmread(EXIT_QUALIFICATION, &exit_qualification);
+    exit_qualification =3D __vmread(EXIT_QUALIFICATION);
     switch ( failed_vmentry_reason )
     {
     case EXIT_REASON_INVALID_GUEST_STATE:
@@ -4001,13 +3991,12 @@ void vmx_enter_realmode(struct cpu_user_regs *regs)
=20
 static int vmx_handle_eoi_write(void)
 {
-    unsigned long exit_qualification;
+    unsigned long exit_qualification =3D __vmread(EXIT_QUALIFICATION);
=20
     /*
      * 1. Must be a linear access data write.
      * 2. Data write must be to the EOI register.
      */
-    __vmread(EXIT_QUALIFICATION, &exit_qualification);
     if ( (((exit_qualification >> 12) & 0xf) =3D=3D 1) &&
          ((exit_qualification & 0xfff) =3D=3D APIC_EOI) )
     {
@@ -4033,21 +4022,14 @@ static void vmx_propagate_intr(unsigned long intr)
         .vector =3D MASK_EXTR(intr, INTR_INFO_VECTOR_MASK),
         .type =3D MASK_EXTR(intr, INTR_INFO_INTR_TYPE_MASK),
     };
-    unsigned long tmp;
=20
     if ( intr & INTR_INFO_DELIVER_CODE_MASK )
-    {
-        __vmread(VM_EXIT_INTR_ERROR_CODE, &tmp);
-        event.error_code =3D tmp;
-    }
+        event.error_code =3D __vmread(VM_EXIT_INTR_ERROR_CODE);
     else
         event.error_code =3D X86_EVENT_NO_EC;
=20
     if ( event.type >=3D X86_ET_SW_INT )
-    {
-        __vmread(VM_EXIT_INSTRUCTION_LEN, &tmp);
-        event.insn_len =3D tmp;
-    }
+        event.insn_len =3D __vmread(VM_EXIT_INSTRUCTION_LEN);
     else
         event.insn_len =3D 0;
=20
@@ -4071,7 +4053,7 @@ static void vmx_idtv_reinject(unsigned long idtv_info=
)
             {
                 unsigned long ec;
=20
-                __vmread(IDT_VECTORING_ERROR_CODE, &ec);
+                ec =3D __vmread(IDT_VECTORING_ERROR_CODE);
                 __vmwrite(VM_ENTRY_EXCEPTION_ERROR_CODE, ec);
             }
         }
@@ -4086,7 +4068,7 @@ static void vmx_idtv_reinject(unsigned long idtv_info=
)
         {
             unsigned long intr_info;
=20
-            __vmread(GUEST_INTERRUPTIBILITY_INFO, &intr_info);
+            intr_info =3D __vmread(GUEST_INTERRUPTIBILITY_INFO);
             __vmwrite(GUEST_INTERRUPTIBILITY_INFO,
                       intr_info & ~VMX_INTR_SHADOW_NMI);
         }
@@ -4111,8 +4093,8 @@ static void vmx_handle_descriptor_access(uint32_t exi=
t_reason)
     uint64_t exit_qualification;
     unsigned int desc;
=20
-    __vmread(EXIT_QUALIFICATION, &exit_qualification);
-    __vmread(VMX_INSTRUCTION_INFO, &instr_info);
+    exit_qualification =3D __vmread(EXIT_QUALIFICATION);
+    instr_info =3D __vmread(VMX_INSTRUCTION_INFO);
=20
     if ( exit_reason =3D=3D EXIT_REASON_ACCESS_GDTR_OR_IDTR )
     {
@@ -4137,7 +4119,7 @@ static int vmx_handle_apic_write(void)
     unsigned long exit_qualification;
=20
     ASSERT(cpu_has_vmx_apic_reg_virt);
-    __vmread(EXIT_QUALIFICATION, &exit_qualification);
+    exit_qualification =3D __vmread(EXIT_QUALIFICATION);
=20
     return vlapic_apicv_write(current, exit_qualification & 0xfff);
 }
@@ -4146,7 +4128,7 @@ static void undo_nmis_unblocked_by_iret(void)
 {
     unsigned long guest_info;
=20
-    __vmread(GUEST_INTERRUPTIBILITY_INFO, &guest_info);
+    guest_info =3D __vmread(GUEST_INTERRUPTIBILITY_INFO);
     __vmwrite(GUEST_INTERRUPTIBILITY_INFO,
               guest_info | VMX_INTR_SHADOW_NMI);
 }
@@ -4159,12 +4141,12 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_=
regs *regs)
     struct vcpu *v =3D current;
     struct domain *currd =3D v->domain;
=20
-    __vmread(GUEST_RIP,    ®s->rip);
-    __vmread(GUEST_RSP,    ®s->rsp);
-    __vmread(GUEST_RFLAGS, ®s->rflags);
+    regs->rip =3D __vmread(GUEST_RIP);
+    regs->rsp =3D __vmread(GUEST_RSP);
+    regs->rflags =3D __vmread(GUEST_RFLAGS);
=20
     if ( hvm_long_mode_active(v) )
-        __vmread(GUEST_CS_AR_BYTES, &cs_ar_bytes);
+        cs_ar_bytes =3D __vmread(GUEST_CS_AR_BYTES);
=20
     hvm_sanitize_regs_fields(regs, !(cs_ar_bytes & X86_SEG_AR_CS_LM_ACTIVE=
));
=20
@@ -4174,17 +4156,17 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_=
regs *regs)
          * Xen allows the guest to modify some CR4 bits directly, update c=
ached
          * values to match.
          */
-        __vmread(GUEST_CR4, &v->arch.hvm.hw_cr[4]);
+        v->arch.hvm.hw_cr[4] =3D __vmread(GUEST_CR4);
         v->arch.hvm.guest_cr[4] &=3D v->arch.hvm.vmx.cr4_host_mask;
         v->arch.hvm.guest_cr[4] |=3D (v->arch.hvm.hw_cr[4] &
                                     ~v->arch.hvm.vmx.cr4_host_mask);
=20
-        __vmread(GUEST_CR3, &v->arch.hvm.hw_cr[3]);
+        v->arch.hvm.hw_cr[3] =3D __vmread(GUEST_CR3);
         if ( vmx_unrestricted_guest(v) || hvm_paging_enabled(v) )
             v->arch.hvm.guest_cr[3] =3D v->arch.hvm.hw_cr[3];
     }
=20
-    __vmread(VM_EXIT_REASON, &exit_reason);
+    exit_reason =3D __vmread(VM_EXIT_REASON);
=20
     if ( hvm_long_mode_active(v) )
         TRACE_TIME(TRC_HVM_VMX_EXIT64, exit_reason, regs->rip, regs->rip >=
> 32);
@@ -4200,7 +4182,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
         vmx_do_extint(regs);
         break;
     case EXIT_REASON_EXCEPTION_NMI:
-        __vmread(VM_EXIT_INTR_INFO, &intr_info);
+        intr_info =3D __vmread(VM_EXIT_INTR_INFO);
         BUG_ON(!(intr_info & INTR_INFO_VALID_MASK));
         vector =3D intr_info & INTR_INFO_VECTOR_MASK;
         if ( vector =3D=3D X86_EXC_MC )
@@ -4237,12 +4219,12 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_=
regs *regs)
=20
         if ( v->arch.hvm.vmx.secondary_exec_control &
             SECONDARY_EXEC_ENABLE_VIRT_EXCEPTIONS )
-            __vmread(EPTP_INDEX, &idx);
+        {
+            idx =3D __vmread(EPTP_INDEX);
+        }
         else
         {
-            unsigned long eptp;
-
-            __vmread(EPT_POINTER, &eptp);
+            unsigned long eptp =3D __vmread(EPT_POINTER);
=20
             if ( (idx =3D p2m_find_altp2m_by_eptp(v->domain, eptp)) =3D=3D
                  INVALID_ALTP2M )
@@ -4259,10 +4241,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_r=
egs *regs)
=20
     if ( unlikely(currd->arch.monitor.vmexit_enabled) )
     {
-        int rc;
-
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
-        rc =3D hvm_monitor_vmexit(exit_reason, exit_qualification);
+        int rc =3D hvm_monitor_vmexit(exit_reason, __vmread(EXIT_QUALIFICA=
TION));
         if ( rc < 0 )
             goto exit_and_crash;
         if ( rc )
@@ -4327,7 +4306,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
=20
     hvm_maybe_deassert_evtchn_irq();
=20
-    __vmread(IDT_VECTORING_INFO, &idtv_info);
+    idtv_info =3D __vmread(IDT_VECTORING_INFO);
     if ( exit_reason !=3D EXIT_REASON_TASK_SWITCH )
         vmx_idtv_reinject(idtv_info);
=20
@@ -4362,7 +4341,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
              * Updates DR6 where debugger can peek (See 3B 23.2.1,
              * Table 23-1, "Exit Qualification for Debug Exceptions").
              */
-            __vmread(EXIT_QUALIFICATION, &exit_qualification);
+            exit_qualification =3D __vmread(EXIT_QUALIFICATION);
             TRACE(TRC_HVM_TRAP_DEBUG, exit_qualification);
             __restore_debug_registers(v);
             write_debugreg(6, exit_qualification | DR_STATUS_RESERVED_ONE)=
;
@@ -4388,29 +4367,25 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_=
regs *regs)
              */
             if ( unlikely(regs->eflags & X86_EFLAGS_TF) )
             {
-                unsigned long int_info;
-
-                __vmread(GUEST_INTERRUPTIBILITY_INFO, &int_info);
+                unsigned long int_info =3D __vmread(GUEST_INTERRUPTIBILITY=
_INFO);
=20
                 if ( int_info & (VMX_INTR_SHADOW_STI | VMX_INTR_SHADOW_MOV=
_SS) )
                 {
-                    unsigned long pending_dbg;
+                    unsigned long exc =3D __vmread(GUEST_PENDING_DBG_EXCEP=
TIONS);
=20
-                    __vmread(GUEST_PENDING_DBG_EXCEPTIONS, &pending_dbg);
-                    __vmwrite(GUEST_PENDING_DBG_EXCEPTIONS,
-                              pending_dbg | DR_STEP);
+                    __vmwrite(GUEST_PENDING_DBG_EXCEPTIONS, exc | DR_STEP)=
;
                 }
             }
=20
             if ( !v->domain->debugger_attached )
             {
                 unsigned long insn_len =3D 0;
-                int rc;
                 unsigned long trap_type =3D MASK_EXTR(intr_info,
                                                     INTR_INFO_INTR_TYPE_MA=
SK);
+                int rc;
=20
                 if ( trap_type >=3D X86_ET_SW_INT )
-                    __vmread(VM_EXIT_INSTRUCTION_LEN, &insn_len);
+                    insn_len =3D __vmread(VM_EXIT_INSTRUCTION_LEN);
=20
                 rc =3D hvm_monitor_debug(regs->rip,
                                        HVM_MONITOR_DEBUG_EXCEPTION,
@@ -4428,10 +4403,9 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_r=
egs *regs)
             TRACE(TRC_HVM_TRAP, vector);
             if ( !v->domain->debugger_attached )
             {
-                unsigned long insn_len;
+                unsigned long insn_len =3D __vmread(VM_EXIT_INSTRUCTION_LE=
N);
                 int rc;
=20
-                __vmread(VM_EXIT_INSTRUCTION_LEN, &insn_len);
                 rc =3D hvm_monitor_debug(regs->rip,
                                        HVM_MONITOR_SOFTWARE_BREAKPOINT,
                                        X86_ET_SW_EXC,
@@ -4454,8 +4428,8 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
             vmx_fpu_dirty_intercept();
             break;
         case X86_EXC_PF:
-            __vmread(EXIT_QUALIFICATION, &exit_qualification);
-            __vmread(VM_EXIT_INTR_ERROR_CODE, &ecode);
+            exit_qualification =3D __vmread(EXIT_QUALIFICATION);
+            ecode =3D __vmread(VM_EXIT_INTR_ERROR_CODE);
             regs->error_code =3D ecode;
=20
             HVM_DBG_LOG(DBG_LEVEL_VMMU,
@@ -4522,7 +4496,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
         };
         unsigned int inst_len, source;
=20
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        exit_qualification =3D __vmread(EXIT_QUALIFICATION);
         source =3D (exit_qualification >> 30) & 3;
         /* Vectored event should fill in interrupt information. */
         WARN_ON((source =3D=3D 3) && !(idtv_info & INTR_INFO_VALID_MASK));
@@ -4536,9 +4510,9 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
                      > 3)) /* IntrType > 3? */
             ? get_instruction_length() /* Safe: SDM 3B 23.2.4 */ : 0;
         if ( (source =3D=3D 3) && (idtv_info & INTR_INFO_DELIVER_CODE_MASK=
) )
-            __vmread(IDT_VECTORING_ERROR_CODE, &ecode);
+            ecode =3D __vmread(IDT_VECTORING_ERROR_CODE);
         else
-             ecode =3D -1;
+            ecode =3D -1;
=20
         hvm_task_switch(exit_qualification, reasons[source], ecode, inst_l=
en,
                         0 /* EFLAGS.RF already updated. */);
@@ -4565,7 +4539,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
         break;
     case EXIT_REASON_INVLPG:
         update_guest_eip(); /* Safe: INVLPG */
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        exit_qualification =3D __vmread(EXIT_QUALIFICATION);
         vmx_invlpg_intercept(exit_qualification);
         break;
     case EXIT_REASON_RDTSCP:
@@ -4591,13 +4565,13 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_=
regs *regs)
=20
     case EXIT_REASON_CR_ACCESS:
     {
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        exit_qualification =3D __vmread(EXIT_QUALIFICATION);
         if ( vmx_cr_access(exit_qualification) =3D=3D X86EMUL_OKAY )
             update_guest_eip(); /* Safe: MOV Cn, LMSW, CLTS */
         break;
     }
     case EXIT_REASON_DR_ACCESS:
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        exit_qualification =3D __vmread(EXIT_QUALIFICATION);
         vmx_dr_access(exit_qualification, regs);
         break;
     case EXIT_REASON_MSR_READ:
@@ -4671,7 +4645,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
         break;
=20
     case EXIT_REASON_EOI_INDUCED:
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        exit_qualification =3D __vmread(EXIT_QUALIFICATION);
=20
         ASSERT(cpu_has_vmx_virtual_intr_delivery);
=20
@@ -4695,7 +4669,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
         unsigned int bytes;
         int rc;
=20
-        __vmread(EXIT_QUALIFICATION, &io_qual.raw);
+        io_qual.raw =3D __vmread(EXIT_QUALIFICATION);
         bytes =3D io_qual.size + 1;
=20
         rc =3D hvm_monitor_io(io_qual.port, bytes, io_qual.in, io_qual.str=
);
@@ -4728,10 +4702,9 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_r=
egs *regs)
=20
     case EXIT_REASON_EPT_VIOLATION:
     {
-        paddr_t gpa;
+        paddr_t gpa =3D __vmread(GUEST_PHYSICAL_ADDRESS);
=20
-        __vmread(GUEST_PHYSICAL_ADDRESS, &gpa);
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        exit_qualification =3D __vmread(EXIT_QUALIFICATION);
=20
         if ( unlikely(exit_qualification & INTR_INFO_NMI_UNBLOCKED_BY_IRET=
) &&
              !(idtv_info & INTR_INFO_VALID_MASK) )
@@ -4743,9 +4716,8 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
=20
     case EXIT_REASON_EPT_MISCONFIG:
     {
-        paddr_t gpa;
+        paddr_t gpa =3D __vmread(GUEST_PHYSICAL_ADDRESS);
=20
-        __vmread(GUEST_PHYSICAL_ADDRESS, &gpa);
         if ( !ept_handle_misconfig(gpa) )
             goto exit_and_crash;
         break;
@@ -4781,7 +4753,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
         break;
=20
     case EXIT_REASON_PML_FULL:
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        exit_qualification =3D __vmread(EXIT_QUALIFICATION);
=20
         if ( unlikely(exit_qualification & INTR_INFO_NMI_UNBLOCKED_BY_IRET=
) &&
              !(idtv_info & INTR_INFO_VALID_MASK) )
@@ -4804,7 +4776,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
         break;
=20
     case EXIT_REASON_NOTIFY:
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        exit_qualification =3D __vmread(EXIT_QUALIFICATION);
=20
         if ( unlikely(exit_qualification & NOTIFY_VM_CONTEXT_INVALID) )
         {
diff --git a/xen/arch/x86/hvm/vmx/vvmx.c b/xen/arch/x86/hvm/vmx/vvmx.c
index ceb5e5a322..09be4f3602 100644
--- a/xen/arch/x86/hvm/vmx/vvmx.c
+++ b/xen/arch/x86/hvm/vmx/vvmx.c
@@ -400,8 +400,7 @@ static int decode_vmx_inst(struct cpu_user_regs *regs,
     unsigned long base, index, seg_base, disp, offset;
     int scale, size;
=20
-    __vmread(VMX_INSTRUCTION_INFO, &offset);
-    info.word =3D offset;
+    info.word =3D __vmread(VMX_INSTRUCTION_INFO);
=20
     if ( info.fields.memreg ) {
         decode->type =3D VMX_INST_MEMREG_TYPE_REG;
@@ -428,7 +427,7 @@ static int decode_vmx_inst(struct cpu_user_regs *regs,
=20
         scale =3D 1 << info.fields.scaling;
=20
-        __vmread(EXIT_QUALIFICATION, &disp);
+        disp =3D __vmread(EXIT_QUALIFICATION);
=20
         size =3D 1 << (info.fields.addr_size + 1);
=20
@@ -997,7 +996,7 @@ static void vvmcs_to_shadow_bulk(struct vcpu *v, unsign=
ed int n,
=20
     virtual_vmcs_enter(v);
     for ( i =3D 0; i < n; i++ )
-        __vmread(field[i], &value[i]);
+        value[i] =3D __vmread(field[i]);
     virtual_vmcs_exit(v);
=20
     for ( i =3D 0; i < n; i++ )
@@ -1012,7 +1011,7 @@ fallback:
=20
 static inline void shadow_to_vvmcs(const struct vcpu *v, unsigned int fiel=
d)
 {
-    unsigned long value;
+    unsigned long value =3D 0;
=20
     if ( vmread_safe(field, &value) =3D=3D 0 )
         set_vvmcs(v, field, value);
@@ -1036,7 +1035,7 @@ static void shadow_to_vvmcs_bulk(struct vcpu *v, unsi=
gned int n,
     }
=20
     for ( i =3D 0; i < n; i++ )
-        __vmread(field[i], &value[i]);
+        value[i] =3D __vmread(field[i]);
=20
     virtual_vmcs_enter(v);
     for ( i =3D 0; i < n; i++ )
@@ -1405,7 +1404,7 @@ static void nvmx_update_apicv(struct vcpu *v)
     }
     else
        /* Keep previous SVI if there's any. */
-       __vmread(GUEST_INTR_STATUS, &status);
+       status =3D __vmread(GUEST_INTR_STATUS);
=20
     rvi =3D vlapic_has_pending_irq(v);
     if ( rvi !=3D -1 )
@@ -1687,7 +1686,6 @@ static int nvmx_handle_vmresume(struct cpu_user_regs =
*regs)
     bool launched;
     struct vcpu *v =3D current;
     struct nestedvmx *nvmx =3D &vcpu_2_nvmx(v);
-    unsigned long intr_shadow;
     int rc;
=20
     if ( !vvmcx_valid(v) )
@@ -1696,8 +1694,7 @@ static int nvmx_handle_vmresume(struct cpu_user_regs =
*regs)
         return X86EMUL_OKAY;       =20
     }
=20
-    __vmread(GUEST_INTERRUPTIBILITY_INFO, &intr_shadow);
-    if ( intr_shadow & VMX_INTR_SHADOW_MOV_SS )
+    if ( __vmread(GUEST_INTERRUPTIBILITY_INFO) & VMX_INTR_SHADOW_MOV_SS )
     {
         vmfail_valid(regs, VMX_INSN_VMENTRY_BLOCKED_BY_MOV_SS);
         return X86EMUL_OKAY;
@@ -1723,7 +1720,6 @@ static int nvmx_handle_vmlaunch(struct cpu_user_regs =
*regs)
     bool launched;
     struct vcpu *v =3D current;
     struct nestedvmx *nvmx =3D &vcpu_2_nvmx(v);
-    unsigned long intr_shadow;
     int rc;
=20
     if ( !vvmcx_valid(v) )
@@ -1732,8 +1728,7 @@ static int nvmx_handle_vmlaunch(struct cpu_user_regs =
*regs)
         return X86EMUL_OKAY;
     }
=20
-    __vmread(GUEST_INTERRUPTIBILITY_INFO, &intr_shadow);
-    if ( intr_shadow & VMX_INTR_SHADOW_MOV_SS )
+    if ( __vmread(GUEST_INTERRUPTIBILITY_INFO) & VMX_INTR_SHADOW_MOV_SS )
     {
         vmfail_valid(regs, VMX_INSN_VMENTRY_BLOCKED_BY_MOV_SS);
         return X86EMUL_OKAY;
@@ -2355,7 +2350,7 @@ int cf_check nvmx_hap_walk_L1_p2m(
=20
     vmx_vmcs_enter(v);
=20
-    __vmread(EXIT_QUALIFICATION, &exit_qual);
+    exit_qual =3D __vmread(EXIT_QUALIFICATION);
     rc =3D nept_translate_l2ga(v, L2_gpa, page_order, rwx_rights, &gfn, p2=
m_acc,
                              &exit_qual, &exit_reason);
     switch ( rc )
@@ -2391,7 +2386,7 @@ void nvmx_idtv_handling(void)
     struct nestedvcpu *nvcpu =3D &vcpu_nestedhvm(v);
     unsigned long idtv_info, reason;
=20
-    __vmread(IDT_VECTORING_INFO, &idtv_info);
+    idtv_info =3D __vmread(IDT_VECTORING_INFO);
     if ( likely(!(idtv_info & INTR_INFO_VALID_MASK)) )
         return;
=20
@@ -2399,7 +2394,7 @@ void nvmx_idtv_handling(void)
      * If L0 can solve the fault that causes idt vectoring, it should
      * be reinjected, otherwise, pass to L1.
      */
-    __vmread(VM_EXIT_REASON, &reason);
+    reason =3D __vmread(VM_EXIT_REASON);
     if ( (uint16_t)reason !=3D EXIT_REASON_EPT_VIOLATION ?
          !(nvmx->intr.intr_info & INTR_INFO_VALID_MASK) :
          !nvcpu->nv_vmexit_pending )
@@ -2407,7 +2402,7 @@ void nvmx_idtv_handling(void)
         __vmwrite(VM_ENTRY_INTR_INFO, idtv_info & ~INTR_INFO_RESVD_BITS_MA=
SK);
         if ( idtv_info & INTR_INFO_DELIVER_CODE_MASK )
         {
-            __vmread(IDT_VECTORING_ERROR_CODE, &reason);
+            reason =3D __vmread(IDT_VECTORING_ERROR_CODE);
             __vmwrite(VM_ENTRY_EXCEPTION_ERROR_CODE, reason);
         }
         /*
@@ -2418,7 +2413,7 @@ void nvmx_idtv_handling(void)
          * This means EXIT_INSTRUCTION_LEN is always valid here, for
          * software interrupts both injected by L1, and generated in L2.
          */
-        __vmread(VM_EXIT_INSTRUCTION_LEN, &reason);
+        reason =3D __vmread(VM_EXIT_INSTRUCTION_LEN);
         __vmwrite(VM_ENTRY_INSTRUCTION_LEN, reason);
    }
 }
@@ -2452,7 +2447,7 @@ int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs=
,
         u64 exec_bitmap;
         int vector;
=20
-        __vmread(VM_EXIT_INTR_INFO, &intr_info);
+        intr_info =3D __vmread(VM_EXIT_INTR_INFO);
         vector =3D intr_info & INTR_INFO_VECTOR_MASK;
         /*
          * decided by L0 and L1 exception bitmap, if the vetor is set by
@@ -2531,7 +2526,7 @@ int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs=
,
             unsigned long qual;
             u16 port, size;
=20
-            __vmread(EXIT_QUALIFICATION, &qual);
+            qual =3D __vmread(EXIT_QUALIFICATION);
             port =3D qual >> 16;
             size =3D (qual & 7) + 1;
             do {
@@ -2638,7 +2633,7 @@ int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs=
,
         cr_access_qual_t qual;
         u32 mask =3D 0;
=20
-        __vmread(EXIT_QUALIFICATION, &qual.raw);
+        qual.raw =3D __vmread(EXIT_QUALIFICATION);
         /* also according to guest exec_control */
         ctrl =3D __n2_exec_control(v);
=20
@@ -2680,7 +2675,7 @@ int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs=
,
                 {
                     u64 cr0_gh_mask =3D get_vvmcs(v, CR0_GUEST_HOST_MASK);
=20
-                    __vmread(CR0_READ_SHADOW, &old_val);
+                    old_val =3D __vmread(CR0_READ_SHADOW);
                     changed_bits =3D old_val ^ val;
                     if ( changed_bits & cr0_gh_mask )
                         nvcpu->nv_vmexit_pending =3D 1;
@@ -2696,7 +2691,7 @@ int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs=
,
                 {
                     u64 cr4_gh_mask =3D get_vvmcs(v, CR4_GUEST_HOST_MASK);
=20
-                    __vmread(CR4_READ_SHADOW, &old_val);
+                    old_val =3D __vmread(CR4_READ_SHADOW);
                     changed_bits =3D old_val ^ val;
                     if ( changed_bits & cr4_gh_mask )
                         nvcpu->nv_vmexit_pending =3D 1;
@@ -2732,7 +2727,7 @@ int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs=
,
             {
                 u64 cr0_gh_mask =3D get_vvmcs(v, CR0_GUEST_HOST_MASK);
=20
-                __vmread(CR0_READ_SHADOW, &old_val);
+                old_val =3D __vmread(CR0_READ_SHADOW);
                 old_val &=3D X86_CR0_PE|X86_CR0_MP|X86_CR0_EM|X86_CR0_TS;
                 val =3D qual.lmsw_data &
                       (X86_CR0_PE|X86_CR0_MP|X86_CR0_EM|X86_CR0_TS);
diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmx.h b/xen/arch/x86/include/=
asm/hvm/vmx/vmx.h
index 33d3d43a38..fbbf9acce8 100644
--- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h
+++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h
@@ -320,16 +320,20 @@ static always_inline void __vmpclear(u64 addr)
     BUG();
 }
=20
-static always_inline void __vmread(unsigned long field, unsigned long *val=
ue)
+static always_inline unsigned long __vmread(unsigned long field)
 {
-    asm volatile ( "vmread %1, %0\n\t"
+    unsigned long value;
+
+    asm volatile ( "vmread %[field], %[value]\n\t"
                    /* CF=3D=3D1 or ZF=3D=3D1 --> BUG() */
                    UNLIKELY_START(be, vmread)
                    _ASM_BUGFRAME_TEXT(0)
                    UNLIKELY_END_SECTION
-                   : "=3Drm" (*value)
-                   : "r" (field),
+                   : [value] "=3Drm" (value)
+                   : [field] "r" (field),
                      _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, =
0) );
+
+    return value;
 }
=20
 static always_inline void __vmwrite(unsigned long field, unsigned long val=
ue)
@@ -363,7 +367,7 @@ static inline enum vmx_insn_errno vmread_safe(unsigned =
long field,
     if ( unlikely(fail_invalid) )
         ret =3D VMX_INSN_FAIL_INVALID;
     else if ( unlikely(fail_valid) )
-        __vmread(VM_INSTRUCTION_ERROR, &ret);
+        ret =3D __vmread(VM_INSTRUCTION_ERROR);
=20
     return ret;
 }
@@ -371,8 +375,6 @@ static inline enum vmx_insn_errno vmread_safe(unsigned =
long field,
 static inline enum vmx_insn_errno vmwrite_safe(unsigned long field,
                                                unsigned long value)
 {
-    unsigned long ret;
-
     asm goto ( "vmwrite %[value], %[field]\n\t"
                "jc %l[vmfail_invalid]\n\t"
                "jz %l[vmfail_error]"
@@ -386,8 +388,7 @@ static inline enum vmx_insn_errno vmwrite_safe(unsigned=
 long field,
     return VMX_INSN_FAIL_INVALID;
=20
  vmfail_error:
-    __vmread(VM_INSTRUCTION_ERROR, &ret);
-    return ret;
+    return __vmread(VM_INSTRUCTION_ERROR);
 }
=20
 static always_inline void __invept(unsigned long type, uint64_t eptp)
--=20
2.34.1




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Subject: Re: [PATCH] compat/memory: avoid UB shifts in XENMEM_exchange
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To: Jason Andryuk 
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On 17.04.2025 18:50, Jason Andryuk wrote:
> On 2025-04-17 10:08, Jan Beulich wrote:
>> Add an early basic check, yielding the same error code as the more
>> thorough on the the main handler would produce.
> 
> "as the more thorough check in the main handler"...

I had already correct the typo ("on" when "one" was meant).

>> Fixes: b8a7efe8528a ("Enable compatibility mode operation for HYPERVISOR_memory_op")
>> Reported-by: Manuel Andreas 
>> Signed-off-by: Jan Beulich 
> 
> With that:
> 
> Reviewed-by: Jason Andryuk 

Thanks.

Jan


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On 17.04.2025 18:23, Roger Pau Monné wrote:
> On Thu, Apr 17, 2025 at 05:38:54PM +0200, Jan Beulich wrote:
>> On 17.04.2025 17:25, Roger Pau Monne wrote:
>>> --- /dev/null
>>> +++ b/xen/arch/x86/hvm/mmio.c
>>> @@ -0,0 +1,125 @@
>>> +/* SPDX-License-Identifier: GPL-2.0-only */
>>> +/*
>>> + * MMIO related routines.
>>> + *
>>> + * Copyright (c) 2025 Cloud Software Group
>>> + */
>>> +
>>> +#include 
>>> +#include 
>>> +
>>> +#include 
>>> +
>>> +static int cf_check subpage_mmio_accept(struct vcpu *v, unsigned long addr)
>>> +{
>>> +    p2m_type_t t;
>>> +    mfn_t mfn = get_gfn_query_unlocked(v->domain, PFN_DOWN(addr), &t);
>>> +
>>> +    return !mfn_eq(mfn, INVALID_MFN) && t == p2m_mmio_direct &&
>>> +           subpage_mmio_find_page(mfn);
>>> +}
>>> +
>>> +/*
>>> + * The guest has read access to those regions, and consequently read accesses
>>> + * shouldn't fault.  However read-modify-write operations may take this path,
>>> + * so handling of reads is necessary.
>>> + */
>>> +static int cf_check subpage_mmio_read(
>>> +    struct vcpu *v, unsigned long addr, unsigned int len, unsigned long *data)
>>> +{
>>> +    struct domain *d = v->domain;
>>> +    unsigned long gfn = PFN_DOWN(addr);
>>> +    p2m_type_t t;
>>> +    mfn_t mfn;
>>> +    struct subpage_ro_range *entry;
>>> +    volatile void __iomem *mem;
>>> +
>>> +    *data = ~0UL;
>>> +
>>> +    if ( !IS_ALIGNED(len | addr, len) )
>>
>> What's the point of doing the | ? len can't be misaligned with itself?
> 
> Hm, it's the same form that's used in mmio_ro_emulated_write(), I
> assumed it was to catch illegal access lengths, like 3.

Oh, I see. But that's not using IS_ALIGNED(), and imo validly so, despite the
apparent open-coding. IS_ALIGNED() requires the 2nd argument to be a power of
two. The combined check there is folding the power-of-2 one with the is-
aligned one.

Jan


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Subject: Re: [PATCH v2 18/19] xen/sysctl: wrap around arch-specific
 arch_do_sysctl
To: "Penny, Zheng" 
Cc: "Huang, Ray" ,
 Stefano Stabellini , Julien Grall ,
 Bertrand Marquis ,
 "Orzel, Michal" ,
 Volodymyr Babchuk ,
 Andrew Cooper ,
 Anthony PERARD ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Oleksii Kurochko ,
 "Stabellini, Stefano" ,
 Sergiy Kibrik ,
 "xen-devel@lists.xenproject.org" 
References: <20250326055053.3313146-1-Penny.Zheng@amd.com>
 <20250326055053.3313146-19-Penny.Zheng@amd.com>
 <33b166be-21db-473e-a59a-3779436c0494@suse.com>
 
Content-Language: en-US
From: Jan Beulich 
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On 18.04.2025 11:46, Penny, Zheng wrote:
> [Public]
> 
> Hi，
> 
>> -----Original Message-----
>> From: Jan Beulich 
>> Sent: Tuesday, April 1, 2025 10:47 PM
>> To: Penny, Zheng 
>> Cc: Huang, Ray ; Stefano Stabellini
>> ; Julien Grall ; Bertrand Marquis
>> ; Orzel, Michal ;
>> Volodymyr Babchuk ; Andrew Cooper
>> ; Anthony PERARD ;
>> Roger Pau Monné ; Alistair Francis
>> ; Bob Eshleman ;
>> Connor Davis ; Oleksii Kurochko
>> ; Stabellini, Stefano
>> ; Sergiy Kibrik ; xen-
>> devel@lists.xenproject.org
>> Subject: Re: [PATCH v2 18/19] xen/sysctl: wrap around arch-specific
>> arch_do_sysctl
>>
>> On 26.03.2025 06:50, Penny Zheng wrote:
>>> Function arch_do_sysctl is to perform arch-specific sysctl op.
>>> Some functions, like psr_get_info for x86, DTB overlay support for
>>> arm, are solely available through sysctl op, then they all shall be
>>> wrapped with CONFIG_SYSCTL Also, remove all #ifdef CONFIG_SYSCTL-s in
>>> arch-specific sysctl.c, as we put the guardian in Makefile for the
>>> whole file.
>>>
>>> Signed-off-by: Stefano Stabellini 
>>> Signed-off-by: Sergiy Kibrik 
>>> Signed-off-by: Penny Zheng 
>>> ---
>>> - use "depends on" for config OVERLAY_DTB
>>> - no need to wrap declaration
>>> - add transient #ifdef in sysctl.c for correct compilation
>>> ---
>>>  xen/arch/arm/Kconfig   |  1 +
>>>  xen/arch/arm/Makefile  |  2 +-
>>>  xen/arch/arm/sysctl.c  |  2 --
>>>  xen/arch/riscv/stubs.c |  2 +-
>>>  xen/arch/x86/Makefile  |  2 +-
>>>  xen/arch/x86/psr.c     | 18 ++++++++++++++++++
>>>  xen/arch/x86/sysctl.c  |  2 --
>>>  xen/common/sysctl.c    |  2 ++
>>>  8 files changed, 24 insertions(+), 7 deletions(-)
>>>
>>> diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig index
>>> ffdff1f0a3..aa1b4a6e6b 100644
>>> --- a/xen/arch/arm/Kconfig
>>> +++ b/xen/arch/arm/Kconfig
>>> @@ -141,6 +141,7 @@ config HAS_ITS
>>>
>>>  config OVERLAY_DTB
>>>     bool "DTB overlay support (UNSUPPORTED)" if UNSUPPORTED
>>> +   depends on SYSCTL
>>>     help
>>>       Dynamic addition/removal of Xen device tree nodes using a dtbo.
>>>
>>> diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile index
>>> 4837ad467a..7c6015b84d 100644
>>> --- a/xen/arch/arm/Makefile
>>> +++ b/xen/arch/arm/Makefile
>>> @@ -54,7 +54,7 @@ obj-y += smpboot.o
>>>  obj-$(CONFIG_STATIC_EVTCHN) += static-evtchn.init.o
>>>  obj-$(CONFIG_STATIC_MEMORY) += static-memory.init.o
>>>  obj-$(CONFIG_STATIC_SHM) += static-shmem.init.o -obj-y += sysctl.o
>>> +obj-$(CONFIG_SYSCTL) += sysctl.o
>>>  obj-y += time.o
>>>  obj-y += traps.o
>>>  obj-y += vcpreg.o
>>> diff --git a/xen/arch/arm/sysctl.c b/xen/arch/arm/sysctl.c index
>>> 2d350b700a..32cab4feff 100644
>>> --- a/xen/arch/arm/sysctl.c
>>> +++ b/xen/arch/arm/sysctl.c
>>> @@ -15,7 +15,6 @@
>>>  #include 
>>>  #include 
>>>
>>> -#ifdef CONFIG_SYSCTL
>>>  void arch_do_physinfo(struct xen_sysctl_physinfo *pi)  {
>>>      pi->capabilities |= XEN_SYSCTL_PHYSCAP_hvm |
>>> XEN_SYSCTL_PHYSCAP_hap; @@ -23,7 +22,6 @@ void
>> arch_do_physinfo(struct xen_sysctl_physinfo *pi)
>>>      pi->arch_capabilities |= MASK_INSR(sve_encode_vl(get_sys_vl_len()),
>>>
>>> XEN_SYSCTL_PHYSCAP_ARM_SVE_MASK);  } -#endif
>>>
>>>  long arch_do_sysctl(struct xen_sysctl *sysctl,
>>>                      XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)
>>> diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c index
>>> 7b3f748886..ae865e1972 100644
>>> --- a/xen/arch/riscv/stubs.c
>>> +++ b/xen/arch/riscv/stubs.c
>>> @@ -322,13 +322,13 @@ unsigned long raw_copy_from_guest(void *to,
>>> const void __user *from,
>>>
>>>  /* sysctl.c */
>>>
>>> +#ifdef CONFIG_SYSCTL
>>>  long arch_do_sysctl(struct xen_sysctl *sysctl,
>>>                      XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)  {
>>>      BUG_ON("unimplemented");
>>>  }
>>>
>>> -#ifdef CONFIG_SYSCTL
>>>  void arch_do_physinfo(struct xen_sysctl_physinfo *pi)  {
>>>      BUG_ON("unimplemented");
>>> diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile index
>>> f59c9665fd..837eafcbc0 100644
>>> --- a/xen/arch/x86/Makefile
>>> +++ b/xen/arch/x86/Makefile
>>> @@ -79,7 +79,7 @@ ifneq ($(CONFIG_PV_SHIM_EXCLUSIVE),y)  obj-y +=
>>> domctl.o  obj-y += platform_hypercall.o
>>>  obj-$(CONFIG_COMPAT) += x86_64/platform_hypercall.o -obj-y +=
>>> sysctl.o
>>> +obj-$(CONFIG_SYSCTL) += sysctl.o
>>>  endif
>>
>> I think I had indicated before that this shouldn't stay inside the conditional, but
>> move back up. Whether that is to happen here or while addressing my respective
>> comment on patch 01 I can't easily tell.
> 
> We want that "PV_SHIM_EXCLUSIVE likely wants / needs sorting as
> a prereq anyway", does the prereq here mean that prereq in kconfig,
> something like
> ```
> config SYSCTL
>       depends on xxx
> ```

I'm sorry, but I fear I can't interpret what you're saying (possibly asking).

>>> --- a/xen/common/sysctl.c
>>> +++ b/xen/common/sysctl.c
>>> @@ -490,8 +490,10 @@ long
>> do_sysctl(XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)
>>>          break;
>>>
>>>      default:
>>> +#ifdef CONFIG_SYSCTL
>>>          ret = arch_do_sysctl(op, u_sysctl);
>>>          copyback = 0;
>>> +#endif
>>>          break;
>>>      }
>>
>> This isn't enough. "ret" is 0 when reaching the default: label, but may not stay 0 for
>> the return from the function. I understand (expect) this is going to be dropped
>> again in the next patch, but even if only transiently needed this should be kept
>> correct imo. Things might be different if patch 02 introduced the option without a
>> prompt, i.e. always enabled. Then all the #ifdef-ary added up to here would be
>> merely syntactic sugar. In fact in that case you could omit all the transient #ifdef
>> that the last patch is going to remove again. Please consider going that route.
>>
>> Otherwise I think the #endif also needs moving up, for copyback to still be cleared
>> here.
>>
> 
> I'll change it to as follows to complement case for CONFIG_SYSCTL==n, plz correct me if I understand wrongly here:
> ```
>       default:
> +#ifdef CONFIG_SYSCTL
>          ret = arch_do_sysctl(op, u_sysctl);
> +#else
> +        ret = -EOPNOTSUPP;
> +#endif
>          copyback = 0;
>          break;
> ```

This is an option, yes, yet I'd like my other outline to be taken into consideration,
too (for imo resulting in less churn overall).

Jan


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On 17.04.2025 18:18, Alejandro Vallejo wrote:
> On Thu Apr 17, 2025 at 4:00 PM BST, Jan Beulich wrote:
>> On 17.04.2025 14:48, Alejandro Vallejo wrote:
>>> --- /dev/null
>>> +++ b/xen/common/domain-builder/Kconfig
>>> @@ -0,0 +1,18 @@
>>> +
>>> +menu "Domain Builder Features"
>>> +depends on HAS_BOOT_INFO
>>
>> That is, what's going to further be added here will not ...
>>
>>> +config DOMAIN_BUILDER
>>
>> ...depend on this, but just on HAS_BOOT_INFO? Seems not very likely, but
>> I'll be looking forward to learn what the plans are.
> 
> CONFIG_HAS_BOOT_INFO has nothing to do with future plans.  The domain
> builder is tightly integrated with the boot_info infrastructure and
> cannot be used (or linked) unless the arch-specific definitions are
> present. It cannot function without it. And this movement from arch/ to
> common/ forces this new Kconfig to gate core.c on boot_info existing
> (because it's in asm/bootinfo.h atm). I _COULD_ also move the boot_info
> elsewhere, but without a drive to actually use it, that seems a bit
> pointless.
> 
> HAS_BOOT_INFO && !DOMAIN_BUILDER still links core.c, because that
> contains the common initialiser for boot_info.

Which, as voiced earlier, I have reservations against. The entire
domain-builder/ sub-tree would imo better not be recursed into when
DOMAIN_BUILDER=n.

Jan


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Date: Tue, 22 Apr 2025 09:02:13 +0200
MIME-Version: 1.0
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Subject: Re: [PATCH v1 10/14] xen/riscv: implementation of aplic and imsic
 operations
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Romain Caritey , xen-devel@lists.xenproject.org
References: 
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On 18.04.2025 12:43, Oleksii Kurochko wrote:
> 
> On 4/15/25 4:53 PM, Jan Beulich wrote:
>> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>>> --- a/xen/arch/riscv/imsic.c
>>> +++ b/xen/arch/riscv/imsic.c
>>> @@ -14,12 +14,68 @@
>>>   #include 
>>>   #include 
>>>   #include 
>>> +#include 
>>>   #include 
>>>   
>>>   #include 
>>>   
>>>   static struct imsic_config imsic_cfg;
>>>   
>>> +#define imsic_csr_set(c, v)     \
>>> +do {                            \
>>> +    csr_write(CSR_SISELECT, c); \
>>> +    csr_set(CSR_SIREG, v);      \
>>> +} while (0)
>>> +
>>> +#define imsic_csr_clear(c, v)   \
>>> +do {                            \
>>> +    csr_write(CSR_SISELECT, c); \
>>> +    csr_clear(CSR_SIREG, v);    \
>>> +} while (0)
>> Coming back to these (the later patch adds one more here): How expensive are
>> these CSR writes? IOW would it perhaps make sense to maintain a local cache
>> of the last written SISELECT value, to avoid writing the same one again if
>> the same windowed register needs accessing twice in a row?
> 
> CSRs belong to the HART, so access to them is very fast.

Can you back this by any data? I view CSRs as somewhat similar to x86'es MSRs,
and access (writes in particular) to some of them is rather slow.

Jan


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Subject: Re: [RFC PATCH 0/4] Physical address hypercall ABI ("HVMv2")
To: Teddy Astie 
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On 18.04.2025 16:18, Teddy Astie wrote:
> In current HVM mode, when a hypercall references a structure in guest memory,
> it is passed to the hypervisor as its "linear address" (e.g virtual address for
> the x86 long mode).
> One of the caveats is that this linear address (GVA) is generally not directly
> usable by the Xen and needs to be translated from GVA to GPA then HPA. This
> implies a complex and potentially expensive lookup of the pagetables inside the
> guest. This can be significant, especially if the P2M cannot use efficiently
> superpages (or with e.g XSA-304).
> 
> This proposal introduce a new mode where all addresses used for hypercalls are
> GPADDR instead of GVADDR, therefore, looking up the HPA related to this GPA
> only needs a P2M lookup and not looking through the inside-guest pagetables.
> 
> This mode is opt-in and must be enabled explicitely by the toolstack.

Which I view as a severe downside (leaving aside the PVH Dom0 aspect): This way
a guest needs to be converted all in one go. While doable, it'll be increasingly
risky with the size of the guest kernel code base.

A prior proposal of mine was to add an indicator to hypercall numbers (e.g. to
set the top bit there), to indicate which of the two models a particular
hypercall invocation uses.

Aiui Andrew had yet different (albeit also never spelled out) plans.

Jan



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Subject: Re: [PATCH v20 2/2] vpci: translate virtual PCI bus topology for
 guests
To: Stewart Hildebrand 
Cc: Oleksandr Andrushchenko ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Anthony PERARD ,
 Stefano Stabellini , Julien Grall ,
 Bertrand Marquis ,
 Michal Orzel ,
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On 18.04.2025 20:58, Stewart Hildebrand wrote:
> --- a/xen/drivers/vpci/vpci.c
> +++ b/xen/drivers/vpci/vpci.c
> @@ -174,6 +174,41 @@ int vpci_assign_device(struct pci_dev *pdev)
>  }
>  #endif /* __XEN__ */
>  
> +#ifdef CONFIG_HAS_VPCI_GUEST_SUPPORT
> +/*
> + * Find the physical device which is mapped to the virtual device
> + * and translate virtual SBDF to the physical one.
> + */
> +static const struct pci_dev *translate_virtual_device(const struct domain *d,
> +                                                      pci_sbdf_t *sbdf)
> +{
> +    const struct pci_dev *pdev;
> +
> +    ASSERT(!is_hardware_domain(d));
> +    ASSERT(rw_is_locked(&d->pci_lock));
> +
> +    for_each_pdev ( d, pdev )
> +    {
> +        if ( pdev->vpci && (pdev->vpci->guest_sbdf.sbdf == sbdf->sbdf) )
> +        {
> +            /* Replace guest SBDF with the physical one. */
> +            *sbdf = pdev->sbdf;
> +            return pdev;
> +        }
> +    }
> +
> +    return NULL;
> +}
> +#else
> +static const struct pci_dev *translate_virtual_device(const struct domain *d,
> +                                                      pci_sbdf_t *sbdf)
> +{
> +    ASSERT_UNREACHABLE();
> +
> +    return NULL;
> +}
> +#endif /* CONFIG_HAS_VPCI_GUEST_SUPPORT */

I'm not a maintainer of this code, but if I was I'd strictly request that the
#ifdef move inside the function, to limit redundancy. Even the "return NULL"
is common between both forms.

Jan


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Subject: Re: [PATCH v2] x86/vmx: Update __vmread() signature
To: dmkhn@proton.me, xen-devel@lists.xenproject.org
Cc: andrew.cooper3@citrix.com, roger.pau@citrix.com, dmukhin@ford.com
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On 22.04.2025 03:15, dmkhn@proton.me wrote:
> From: Denis Mukhin 
> 
> Current implementation of __vmread() returns the result via pointer argument
> which leads to having excess code in some places.
> 
> Update the signature of __vmread() to return `unsigned long` and drop the
> pointer argument as per suggestion in [1].
> 
> Update all call sites everywhere in the VT-x code.

You did read Andrew's reply to v1 before posting v2, didn't you?

Jan


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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
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        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
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        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
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Subject: [RFC PATCH v2 06/34] x86/msr: Use the alternatives mechanism to read PMC
Date: Tue, 22 Apr 2025 01:21:47 -0700
Message-ID: <20250422082216.1954310-7-xin@zytor.com>
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To eliminate the indirect call overhead introduced by the pv_ops API,
use the alternatives mechanism to read PMC:

    1) When built with !CONFIG_XEN_PV, X86_FEATURE_XENPV becomes a
       disabled feature, preventing the Xen PMC read code from being
       built and ensuring the native code is executed unconditionally.

    2) When built with CONFIG_XEN_PV:

       2.1) If not running on the Xen hypervisor (!X86_FEATURE_XENPV),
            the kernel runtime binary is patched to unconditionally
            jump to the native PMC read code.

       2.2) If running on the Xen hypervisor (X86_FEATURE_XENPV), the
            kernel runtime binary is patched to unconditionally jump
            to the Xen PMC read code.

Consequently, remove the pv_ops PMC read API.

Signed-off-by: Xin Li (Intel) 
---
 arch/x86/include/asm/msr.h            | 31 ++++++++++++++++++++-------
 arch/x86/include/asm/paravirt.h       |  5 -----
 arch/x86/include/asm/paravirt_types.h |  2 --
 arch/x86/kernel/paravirt.c            |  1 -
 arch/x86/xen/enlighten_pv.c           |  2 --
 drivers/net/vmxnet3/vmxnet3_drv.c     |  2 +-
 6 files changed, 24 insertions(+), 19 deletions(-)

diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 01dc8e61ef97..33cf506e2fd6 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -8,6 +8,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -73,6 +74,10 @@ static inline void do_trace_read_msr(u32 msr, u64 val, int failed) {}
 static inline void do_trace_rdpmc(u32 msr, u64 val, int failed) {}
 #endif
 
+#ifdef CONFIG_XEN_PV
+extern u64 xen_read_pmc(int counter);
+#endif
+
 /*
  * __rdmsr() and __wrmsr() are the two primitives which are the bare minimum MSR
  * accessors and should not have any tracing or other functionality piggybacking
@@ -170,16 +175,32 @@ native_write_msr_safe(u32 msr, u32 low, u32 high)
 extern int rdmsr_safe_regs(u32 regs[8]);
 extern int wrmsr_safe_regs(u32 regs[8]);
 
-static inline u64 native_read_pmc(int counter)
+static __always_inline u64 native_rdpmcq(int counter)
 {
 	DECLARE_ARGS(val, low, high);
 
-	asm volatile("rdpmc" : EAX_EDX_RET(val, low, high) : "c" (counter));
+	asm_inline volatile("rdpmc" : EAX_EDX_RET(val, low, high) : "c" (counter));
+
 	if (tracepoint_enabled(rdpmc))
 		do_trace_rdpmc(counter, EAX_EDX_VAL(val, low, high), 0);
+
 	return EAX_EDX_VAL(val, low, high);
 }
 
+static __always_inline u64 rdpmcq(int counter)
+{
+#ifdef CONFIG_XEN_PV
+	if (cpu_feature_enabled(X86_FEATURE_XENPV))
+		return xen_read_pmc(counter);
+#endif
+
+	/*
+	 * 1) When built with !CONFIG_XEN_PV.
+	 * 2) When built with CONFIG_XEN_PV but not running on Xen hypervisor.
+	 */
+	return native_rdpmcq(counter);
+}
+
 #ifdef CONFIG_PARAVIRT_XXL
 #include 
 #else
@@ -233,12 +254,6 @@ static inline int rdmsrq_safe(u32 msr, u64 *p)
 	*p = native_read_msr_safe(msr, &err);
 	return err;
 }
-
-static __always_inline u64 rdpmcq(int counter)
-{
-	return native_read_pmc(counter);
-}
-
 #endif	/* !CONFIG_PARAVIRT_XXL */
 
 /* Instruction opcode for WRMSRNS supported in binutils >= 2.40 */
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index 590824916394..c7689f5f70d6 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -239,11 +239,6 @@ static inline int rdmsrq_safe(unsigned msr, u64 *p)
 	return err;
 }
 
-static __always_inline u64 rdpmcq(int counter)
-{
-	return PVOP_CALL1(u64, cpu.read_pmc, counter);
-}
-
 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
 {
 	PVOP_VCALL2(cpu.alloc_ldt, ldt, entries);
diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/paravirt_types.h
index 631c306ce1ff..475f508531d6 100644
--- a/arch/x86/include/asm/paravirt_types.h
+++ b/arch/x86/include/asm/paravirt_types.h
@@ -101,8 +101,6 @@ struct pv_cpu_ops {
 	u64 (*read_msr_safe)(unsigned int msr, int *err);
 	int (*write_msr_safe)(unsigned int msr, unsigned low, unsigned high);
 
-	u64 (*read_pmc)(int counter);
-
 	void (*start_context_switch)(struct task_struct *prev);
 	void (*end_context_switch)(struct task_struct *next);
 #endif
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
index 1ccd05d8999f..28d195ad7514 100644
--- a/arch/x86/kernel/paravirt.c
+++ b/arch/x86/kernel/paravirt.c
@@ -132,7 +132,6 @@ struct paravirt_patch_template pv_ops = {
 	.cpu.write_msr		= native_write_msr,
 	.cpu.read_msr_safe	= native_read_msr_safe,
 	.cpu.write_msr_safe	= native_write_msr_safe,
-	.cpu.read_pmc		= native_read_pmc,
 	.cpu.load_tr_desc	= native_load_tr_desc,
 	.cpu.set_ldt		= native_set_ldt,
 	.cpu.load_gdt		= native_load_gdt,
diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c
index 846b5737d320..9fbe187aff00 100644
--- a/arch/x86/xen/enlighten_pv.c
+++ b/arch/x86/xen/enlighten_pv.c
@@ -1236,8 +1236,6 @@ static const typeof(pv_ops) xen_cpu_ops __initconst = {
 		.read_msr_safe = xen_read_msr_safe,
 		.write_msr_safe = xen_write_msr_safe,
 
-		.read_pmc = xen_read_pmc,
-
 		.load_tr_desc = paravirt_nop,
 		.set_ldt = xen_set_ldt,
 		.load_gdt = xen_load_gdt,
diff --git a/drivers/net/vmxnet3/vmxnet3_drv.c b/drivers/net/vmxnet3/vmxnet3_drv.c
index 7edd0b5e0e77..8af3b4d7ef4d 100644
--- a/drivers/net/vmxnet3/vmxnet3_drv.c
+++ b/drivers/net/vmxnet3/vmxnet3_drv.c
@@ -151,7 +151,7 @@ static u64
 vmxnet3_get_cycles(int pmc)
 {
 #ifdef CONFIG_X86
-	return native_read_pmc(pmc);
+	return native_rdpmcq(pmc);
 #else
 	return 0;
 #endif
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
        pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com
Subject: [RFC PATCH v2 09/34] x86/msr: Add the native_rdmsrq() helper
Date: Tue, 22 Apr 2025 01:21:50 -0700
Message-ID: <20250422082216.1954310-10-xin@zytor.com>
X-Mailer: git-send-email 2.49.0
In-Reply-To: <20250422082216.1954310-1-xin@zytor.com>
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__rdmsr() is the lowest-level primitive MSR read API, implemented in
assembly code and returning an MSR value in a u64 integer, on top of
which a convenience wrapper native_rdmsr() is defined to return an MSR
value in two u32 integers.  For some reason, native_rdmsrq() is not
defined and __rdmsr() is directly used when it needs to return an MSR
value in a u64 integer.

Add the native_rdmsrq() helper, which is simply an alias of __rdmsr(),
to make native_rdmsr() and native_rdmsrq() a pair of MSR read APIs.

Signed-off-by: Xin Li (Intel) 
---

Change in v2:
* Split into two changes and add the native_rdmsrl() helper in the
  first one with a proper explanation (Ingo).
---
 arch/x86/include/asm/msr.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index b50cbd3299b3..2ab8effea4cd 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -112,6 +112,11 @@ do {							\
 	(void)((val2) = (u32)(__val >> 32));		\
 } while (0)
 
+static __always_inline u64 native_rdmsrq(u32 msr)
+{
+	return __rdmsr(msr);
+}
+
 #define native_wrmsr(msr, low, high)			\
 	__wrmsr(msr, low, high)
 
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
        pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com
Subject: [RFC PATCH v2 03/34] x86/msr: Rename rdpmcl() to rdpmcq()
Date: Tue, 22 Apr 2025 01:21:44 -0700
Message-ID: <20250422082216.1954310-4-xin@zytor.com>
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Signed-off-by: Xin Li (Intel) 
---
 arch/x86/events/amd/uncore.c              |  2 +-
 arch/x86/events/core.c                    |  2 +-
 arch/x86/events/intel/core.c              |  4 ++--
 arch/x86/events/intel/ds.c                |  2 +-
 arch/x86/include/asm/msr.h                |  2 +-
 arch/x86/include/asm/paravirt.h           |  2 +-
 arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 12 ++++++------
 7 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/arch/x86/events/amd/uncore.c b/arch/x86/events/amd/uncore.c
index f231e1078e51..b9933ab3116c 100644
--- a/arch/x86/events/amd/uncore.c
+++ b/arch/x86/events/amd/uncore.c
@@ -152,7 +152,7 @@ static void amd_uncore_read(struct perf_event *event)
 	if (hwc->event_base_rdpmc < 0)
 		rdmsrq(hwc->event_base, new);
 	else
-		rdpmcl(hwc->event_base_rdpmc, new);
+		rdpmcq(hwc->event_base_rdpmc, new);
 
 	local64_set(&hwc->prev_count, new);
 	delta = (new << COUNTER_SHIFT) - (prev << COUNTER_SHIFT);
diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
index d390472f6c10..3da1f0b3446c 100644
--- a/arch/x86/events/core.c
+++ b/arch/x86/events/core.c
@@ -139,7 +139,7 @@ u64 x86_perf_event_update(struct perf_event *event)
 	 */
 	prev_raw_count = local64_read(&hwc->prev_count);
 	do {
-		rdpmcl(hwc->event_base_rdpmc, new_raw_count);
+		rdpmcq(hwc->event_base_rdpmc, new_raw_count);
 	} while (!local64_try_cmpxchg(&hwc->prev_count,
 				      &prev_raw_count, new_raw_count));
 
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 1aed31514869..ba623e6cae1b 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -2739,12 +2739,12 @@ static u64 intel_update_topdown_event(struct perf_event *event, int metric_end,
 
 	if (!val) {
 		/* read Fixed counter 3 */
-		rdpmcl((3 | INTEL_PMC_FIXED_RDPMC_BASE), slots);
+		rdpmcq((3 | INTEL_PMC_FIXED_RDPMC_BASE), slots);
 		if (!slots)
 			return 0;
 
 		/* read PERF_METRICS */
-		rdpmcl(INTEL_PMC_FIXED_RDPMC_METRICS, metrics);
+		rdpmcq(INTEL_PMC_FIXED_RDPMC_METRICS, metrics);
 	} else {
 		slots = val[0];
 		metrics = val[1];
diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
index f33395c2e925..4074567219de 100644
--- a/arch/x86/events/intel/ds.c
+++ b/arch/x86/events/intel/ds.c
@@ -2279,7 +2279,7 @@ intel_pmu_save_and_restart_reload(struct perf_event *event, int count)
 	WARN_ON(this_cpu_read(cpu_hw_events.enabled));
 
 	prev_raw_count = local64_read(&hwc->prev_count);
-	rdpmcl(hwc->event_base_rdpmc, new_raw_count);
+	rdpmcq(hwc->event_base_rdpmc, new_raw_count);
 	local64_set(&hwc->prev_count, new_raw_count);
 
 	/*
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index e05466e486fc..ed32637b1df6 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -234,7 +234,7 @@ static inline int rdmsrq_safe(u32 msr, u64 *p)
 	return err;
 }
 
-#define rdpmcl(counter, val) ((val) = native_read_pmc(counter))
+#define rdpmcq(counter, val) ((val) = native_read_pmc(counter))
 
 #endif	/* !CONFIG_PARAVIRT_XXL */
 
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index c4dedb984735..63ca099f8368 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -244,7 +244,7 @@ static inline u64 paravirt_read_pmc(int counter)
 	return PVOP_CALL1(u64, cpu.read_pmc, counter);
 }
 
-#define rdpmcl(counter, val) ((val) = paravirt_read_pmc(counter))
+#define rdpmcq(counter, val) ((val) = paravirt_read_pmc(counter))
 
 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
 {
diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
index 26c354bdea07..a5e21f44b0ca 100644
--- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
+++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
@@ -1019,8 +1019,8 @@ static int measure_residency_fn(struct perf_event_attr *miss_attr,
 	 * used in L1 cache, second to capture accurate value that does not
 	 * include cache misses incurred because of instruction loads.
 	 */
-	rdpmcl(hit_pmcnum, hits_before);
-	rdpmcl(miss_pmcnum, miss_before);
+	rdpmcq(hit_pmcnum, hits_before);
+	rdpmcq(miss_pmcnum, miss_before);
 	/*
 	 * From SDM: Performing back-to-back fast reads are not guaranteed
 	 * to be monotonic.
@@ -1028,8 +1028,8 @@ static int measure_residency_fn(struct perf_event_attr *miss_attr,
 	 * before proceeding.
 	 */
 	rmb();
-	rdpmcl(hit_pmcnum, hits_before);
-	rdpmcl(miss_pmcnum, miss_before);
+	rdpmcq(hit_pmcnum, hits_before);
+	rdpmcq(miss_pmcnum, miss_before);
 	/*
 	 * Use LFENCE to ensure all previous instructions are retired
 	 * before proceeding.
@@ -1051,8 +1051,8 @@ static int measure_residency_fn(struct perf_event_attr *miss_attr,
 	 * before proceeding.
 	 */
 	rmb();
-	rdpmcl(hit_pmcnum, hits_after);
-	rdpmcl(miss_pmcnum, miss_after);
+	rdpmcq(hit_pmcnum, hits_after);
+	rdpmcq(miss_pmcnum, miss_after);
 	/*
 	 * Use LFENCE to ensure all previous instructions are retired
 	 * before proceeding.
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
        pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com
Subject: [RFC PATCH v2 14/34] x86/msr: refactor pv_cpu_ops.write_msr{_safe}()
Date: Tue, 22 Apr 2025 01:21:55 -0700
Message-ID: <20250422082216.1954310-15-xin@zytor.com>
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An MSR value is represented as a 64-bit unsigned integer, with existing
MSR instructions storing it in EDX:EAX as two 32-bit segments.

The new immediate form MSR instructions, however, utilize a 64-bit
general-purpose register to store the MSR value.  To unify the usage of
all MSR instructions, let the default MSR access APIs accept an MSR
value as a single 64-bit argument instead of two 32-bit segments.

The dual 32-bit APIs are still available as convenient wrappers over the
APIs that handle an MSR value as a single 64-bit argument.

The following illustrates the updated derivation of the MSR write APIs:

                 __wrmsrq(u32 msr, u64 val)
                   /                  \
                  /                    \
           native_wrmsrq(msr, val)    native_wrmsr(msr, low, high)
                 |
                 |
           native_write_msr(msr, val)
                /          \
               /            \
       wrmsrq(msr, val)    wrmsr(msr, low, high)

When CONFIG_PARAVIRT is enabled, wrmsrq() and wrmsr() are defined on top
of paravirt_write_msr():

            paravirt_write_msr(u32 msr, u64 val)
               /             \
              /               \
          wrmsrq(msr, val)    wrmsr(msr, low, high)

paravirt_write_msr() invokes cpu.write_msr(msr, val), an indirect layer
of pv_ops MSR write call:

    If on native:

            cpu.write_msr = native_write_msr

    If on Xen:

            cpu.write_msr = xen_write_msr

Therefore, refactor pv_cpu_ops.write_msr{_safe}() to accept an MSR value
in a single u64 argument, replacing the current dual u32 arguments.

No functional change intended.

Signed-off-by: Xin Li (Intel) 
---

Change in v2:
* Spell out the reason why use a single u64 argument to pass the MSR
  value in the lowest level APIs (Andrew Cooper).
---
 arch/x86/include/asm/msr.h            | 35 ++++++++++++---------------
 arch/x86/include/asm/paravirt.h       | 27 +++++++++++----------
 arch/x86/include/asm/paravirt_types.h |  4 +--
 arch/x86/kernel/kvmclock.c            |  2 +-
 arch/x86/kvm/svm/svm.c                | 15 +++---------
 arch/x86/xen/enlighten_pv.c           | 29 +++++++++-------------
 6 files changed, 46 insertions(+), 66 deletions(-)

diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 2ab8effea4cd..dd1114053173 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -97,12 +97,12 @@ static __always_inline u64 __rdmsr(u32 msr)
 	return EAX_EDX_VAL(val, low, high);
 }
 
-static __always_inline void __wrmsr(u32 msr, u32 low, u32 high)
+static __always_inline void __wrmsrq(u32 msr, u64 val)
 {
 	asm volatile("1: wrmsr\n"
 		     "2:\n"
 		     _ASM_EXTABLE_TYPE(1b, 2b, EX_TYPE_WRMSR)
-		     : : "c" (msr), "a"(low), "d" (high) : "memory");
+		     : : "c" (msr), "a" ((u32)val), "d" ((u32)(val >> 32)) : "memory");
 }
 
 #define native_rdmsr(msr, val1, val2)			\
@@ -118,11 +118,10 @@ static __always_inline u64 native_rdmsrq(u32 msr)
 }
 
 #define native_wrmsr(msr, low, high)			\
-	__wrmsr(msr, low, high)
+	__wrmsrq((msr), (u64)(high) << 32 | (low))
 
 #define native_wrmsrq(msr, val)				\
-	__wrmsr((msr), (u32)((u64)(val)),		\
-		       (u32)((u64)(val) >> 32))
+	__wrmsrq((msr), (val))
 
 static inline u64 native_read_msr(u32 msr)
 {
@@ -151,11 +150,8 @@ static inline u64 native_read_msr_safe(u32 msr, int *err)
 }
 
 /* Can be uninlined because referenced by paravirt */
-static inline void notrace
-native_write_msr(u32 msr, u32 low, u32 high)
+static inline void notrace native_write_msr(u32 msr, u64 val)
 {
-	u64 val = (u64)high << 32 | low;
-
 	native_wrmsrq(msr, val);
 
 	if (tracepoint_enabled(write_msr))
@@ -163,8 +159,7 @@ native_write_msr(u32 msr, u32 low, u32 high)
 }
 
 /* Can be uninlined because referenced by paravirt */
-static inline int notrace
-native_write_msr_safe(u32 msr, u32 low, u32 high)
+static inline int notrace native_write_msr_safe(u32 msr, u64 val)
 {
 	int err;
 
@@ -172,10 +167,10 @@ native_write_msr_safe(u32 msr, u32 low, u32 high)
 		     "2:\n\t"
 		     _ASM_EXTABLE_TYPE_REG(1b, 2b, EX_TYPE_WRMSR_SAFE, %[err])
 		     : [err] "=a" (err)
-		     : "c" (msr), "0" (low), "d" (high)
+		     : "c" (msr), "0" ((u32)val), "d" ((u32)(val >> 32))
 		     : "memory");
 	if (tracepoint_enabled(write_msr))
-		do_trace_write_msr(msr, ((u64)high << 32 | low), err);
+		do_trace_write_msr(msr, val, err);
 	return err;
 }
 
@@ -227,7 +222,7 @@ do {								\
 
 static inline void wrmsr(u32 msr, u32 low, u32 high)
 {
-	native_write_msr(msr, low, high);
+	native_write_msr(msr, (u64)high << 32 | low);
 }
 
 #define rdmsrq(msr, val)			\
@@ -235,13 +230,13 @@ static inline void wrmsr(u32 msr, u32 low, u32 high)
 
 static inline void wrmsrq(u32 msr, u64 val)
 {
-	native_write_msr(msr, (u32)(val & 0xffffffffULL), (u32)(val >> 32));
+	native_write_msr(msr, val);
 }
 
 /* wrmsr with exception handling */
-static inline int wrmsr_safe(u32 msr, u32 low, u32 high)
+static inline int wrmsrq_safe(u32 msr, u64 val)
 {
-	return native_write_msr_safe(msr, low, high);
+	return native_write_msr_safe(msr, val);
 }
 
 /* rdmsr with exception handling */
@@ -279,11 +274,11 @@ static __always_inline void wrmsrns(u32 msr, u64 val)
 }
 
 /*
- * 64-bit version of wrmsr_safe():
+ * Dual u32 version of wrmsrq_safe():
  */
-static inline int wrmsrq_safe(u32 msr, u64 val)
+static inline int wrmsr_safe(u32 msr, u32 low, u32 high)
 {
-	return wrmsr_safe(msr, (u32)val,  (u32)(val >> 32));
+	return wrmsrq_safe(msr, (u64)high << 32 | low);
 }
 
 struct msr __percpu *msrs_alloc(void);
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index c7689f5f70d6..1bd1dad8da5a 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -180,10 +180,9 @@ static inline u64 paravirt_read_msr(unsigned msr)
 	return PVOP_CALL1(u64, cpu.read_msr, msr);
 }
 
-static inline void paravirt_write_msr(unsigned msr,
-				      unsigned low, unsigned high)
+static inline void paravirt_write_msr(u32 msr, u64 val)
 {
-	PVOP_VCALL3(cpu.write_msr, msr, low, high);
+	PVOP_VCALL2(cpu.write_msr, msr, val);
 }
 
 static inline u64 paravirt_read_msr_safe(unsigned msr, int *err)
@@ -191,10 +190,9 @@ static inline u64 paravirt_read_msr_safe(unsigned msr, int *err)
 	return PVOP_CALL2(u64, cpu.read_msr_safe, msr, err);
 }
 
-static inline int paravirt_write_msr_safe(unsigned msr,
-					  unsigned low, unsigned high)
+static inline int paravirt_write_msr_safe(u32 msr, u64 val)
 {
-	return PVOP_CALL3(int, cpu.write_msr_safe, msr, low, high);
+	return PVOP_CALL2(int, cpu.write_msr_safe, msr, val);
 }
 
 #define rdmsr(msr, val1, val2)			\
@@ -204,22 +202,25 @@ do {						\
 	val2 = _l >> 32;			\
 } while (0)
 
-#define wrmsr(msr, val1, val2)			\
-do {						\
-	paravirt_write_msr(msr, val1, val2);	\
-} while (0)
+static __always_inline void wrmsr(u32 msr, u32 low, u32 high)
+{
+	paravirt_write_msr(msr, (u64)high << 32 | low);
+}
 
 #define rdmsrq(msr, val)			\
 do {						\
 	val = paravirt_read_msr(msr);		\
 } while (0)
 
-static inline void wrmsrq(unsigned msr, u64 val)
+static inline void wrmsrq(u32 msr, u64 val)
 {
-	wrmsr(msr, (u32)val, (u32)(val>>32));
+	paravirt_write_msr(msr, val);
 }
 
-#define wrmsr_safe(msr, a, b)	paravirt_write_msr_safe(msr, a, b)
+static inline int wrmsrq_safe(u32 msr, u64 val)
+{
+	return paravirt_write_msr_safe(msr, val)
+}
 
 /* rdmsr with exception handling */
 #define rdmsr_safe(msr, a, b)				\
diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/paravirt_types.h
index 475f508531d6..91b3423d36ce 100644
--- a/arch/x86/include/asm/paravirt_types.h
+++ b/arch/x86/include/asm/paravirt_types.h
@@ -92,14 +92,14 @@ struct pv_cpu_ops {
 
 	/* Unsafe MSR operations.  These will warn or panic on failure. */
 	u64 (*read_msr)(unsigned int msr);
-	void (*write_msr)(unsigned int msr, unsigned low, unsigned high);
+	void (*write_msr)(u32 msr, u64 val);
 
 	/*
 	 * Safe MSR operations.
 	 * read sets err to 0 or -EIO.  write returns 0 or -EIO.
 	 */
 	u64 (*read_msr_safe)(unsigned int msr, int *err);
-	int (*write_msr_safe)(unsigned int msr, unsigned low, unsigned high);
+	int (*write_msr_safe)(u32 msr, u64 val);
 
 	void (*start_context_switch)(struct task_struct *prev);
 	void (*end_context_switch)(struct task_struct *next);
diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c
index 0af797930ccb..ca0a49eeac4a 100644
--- a/arch/x86/kernel/kvmclock.c
+++ b/arch/x86/kernel/kvmclock.c
@@ -196,7 +196,7 @@ static void kvm_setup_secondary_clock(void)
 void kvmclock_disable(void)
 {
 	if (msr_kvm_system_time)
-		native_write_msr(msr_kvm_system_time, 0, 0);
+		native_write_msr(msr_kvm_system_time, 0);
 }
 
 static void __init kvmclock_init_mem(void)
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index 67657b3a36ce..4ef9978dce70 100644
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -475,7 +475,6 @@ static void svm_inject_exception(struct kvm_vcpu *vcpu)
 
 static void svm_init_erratum_383(void)
 {
-	u32 low, high;
 	int err;
 	u64 val;
 
@@ -489,10 +488,7 @@ static void svm_init_erratum_383(void)
 
 	val |= (1ULL << 47);
 
-	low  = lower_32_bits(val);
-	high = upper_32_bits(val);
-
-	native_write_msr_safe(MSR_AMD64_DC_CFG, low, high);
+	native_write_msr_safe(MSR_AMD64_DC_CFG, val);
 
 	erratum_383_found = true;
 }
@@ -2167,17 +2163,12 @@ static bool is_erratum_383(void)
 
 	/* Clear MCi_STATUS registers */
 	for (i = 0; i < 6; ++i)
-		native_write_msr_safe(MSR_IA32_MCx_STATUS(i), 0, 0);
+		native_write_msr_safe(MSR_IA32_MCx_STATUS(i), 0);
 
 	value = native_read_msr_safe(MSR_IA32_MCG_STATUS, &err);
 	if (!err) {
-		u32 low, high;
-
 		value &= ~(1ULL << 2);
-		low    = lower_32_bits(value);
-		high   = upper_32_bits(value);
-
-		native_write_msr_safe(MSR_IA32_MCG_STATUS, low, high);
+		native_write_msr_safe(MSR_IA32_MCG_STATUS, value);
 	}
 
 	/* Flush tlb to evict multi-match entries */
diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c
index 9a89cb29fa35..052f68c92111 100644
--- a/arch/x86/xen/enlighten_pv.c
+++ b/arch/x86/xen/enlighten_pv.c
@@ -1111,10 +1111,8 @@ static u64 xen_do_read_msr(unsigned int msr, int *err)
 	return val;
 }
 
-static void set_seg(u32 which, u32 low, u32 high)
+static void set_seg(u32 which, u64 base)
 {
-	u64 base = ((u64)high << 32) | low;
-
 	if (HYPERVISOR_set_segment_base(which, base))
 		WARN(1, "Xen set_segment_base(%u, %llx) failed\n", which, base);
 }
@@ -1124,23 +1122,21 @@ static void set_seg(u32 which, u32 low, u32 high)
  * With err == NULL write_msr() semantics are selected.
  * Supplying an err pointer requires err to be pre-initialized with 0.
  */
-static void xen_do_write_msr(unsigned int msr, unsigned int low,
-			     unsigned int high, int *err)
+static void xen_do_write_msr(u32 msr, u64 val, int *err)
 {
-	u64 val;
 	bool emulated;
 
 	switch (msr) {
 	case MSR_FS_BASE:
-		set_seg(SEGBASE_FS, low, high);
+		set_seg(SEGBASE_FS, val);
 		break;
 
 	case MSR_KERNEL_GS_BASE:
-		set_seg(SEGBASE_GS_USER, low, high);
+		set_seg(SEGBASE_GS_USER, val);
 		break;
 
 	case MSR_GS_BASE:
-		set_seg(SEGBASE_GS_KERNEL, low, high);
+		set_seg(SEGBASE_GS_KERNEL, val);
 		break;
 
 	case MSR_STAR:
@@ -1156,15 +1152,13 @@ static void xen_do_write_msr(unsigned int msr, unsigned int low,
 		break;
 
 	default:
-		val = (u64)high << 32 | low;
-
 		if (pmu_msr_chk_emulated(msr, &val, false, &emulated) && emulated)
 			return;
 
 		if (err)
-			*err = native_write_msr_safe(msr, low, high);
+			*err = native_write_msr_safe(msr, val);
 		else
-			native_write_msr(msr, low, high);
+			native_write_msr(msr, val);
 	}
 }
 
@@ -1173,12 +1167,11 @@ static u64 xen_read_msr_safe(unsigned int msr, int *err)
 	return xen_do_read_msr(msr, err);
 }
 
-static int xen_write_msr_safe(unsigned int msr, unsigned int low,
-			      unsigned int high)
+static int xen_write_msr_safe(u32 msr, u64 val)
 {
 	int err = 0;
 
-	xen_do_write_msr(msr, low, high, &err);
+	xen_do_write_msr(msr, val, &err);
 
 	return err;
 }
@@ -1190,11 +1183,11 @@ static u64 xen_read_msr(unsigned int msr)
 	return xen_do_read_msr(msr, xen_msr_safe ? &err : NULL);
 }
 
-static void xen_write_msr(unsigned int msr, unsigned low, unsigned high)
+static void xen_write_msr(u32 msr, u64 val)
 {
 	int err;
 
-	xen_do_write_msr(msr, low, high, xen_msr_safe ? &err : NULL);
+	xen_do_write_msr(msr, val, xen_msr_safe ? &err : NULL);
 }
 
 /* This is called once we have the cpu_possible_mask */
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
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        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com
Subject: [RFC PATCH v2 18/34] x86/opcode: Add immediate form MSR instructions
Date: Tue, 22 Apr 2025 01:21:59 -0700
Message-ID: <20250422082216.1954310-19-xin@zytor.com>
X-Mailer: git-send-email 2.49.0
In-Reply-To: <20250422082216.1954310-1-xin@zytor.com>
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Add the instruction opcodes used by the immediate form WRMSRNS/RDMSR
to x86-opcode-map.

Signed-off-by: Xin Li (Intel) 
---
 arch/x86/lib/x86-opcode-map.txt       | 5 +++--
 tools/arch/x86/lib/x86-opcode-map.txt | 5 +++--
 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/x86/lib/x86-opcode-map.txt b/arch/x86/lib/x86-opcode-map.txt
index caedb3ef6688..e64f52321d6d 100644
--- a/arch/x86/lib/x86-opcode-map.txt
+++ b/arch/x86/lib/x86-opcode-map.txt
@@ -839,7 +839,7 @@ f1: MOVBE My,Gy | MOVBE Mw,Gw (66) | CRC32 Gd,Ey (F2) | CRC32 Gd,Ew (66&F2)
 f2: ANDN Gy,By,Ey (v)
 f3: Grp17 (1A)
 f5: BZHI Gy,Ey,By (v) | PEXT Gy,By,Ey (F3),(v) | PDEP Gy,By,Ey (F2),(v) | WRUSSD/Q My,Gy (66)
-f6: ADCX Gy,Ey (66) | ADOX Gy,Ey (F3) | MULX By,Gy,rDX,Ey (F2),(v) | WRSSD/Q My,Gy
+f6: ADCX Gy,Ey (66) | ADOX Gy,Ey (F3) | MULX By,Gy,rDX,Ey (F2),(v) | WRSSD/Q My,Gy | RDMSR Rq,Gq (F2),(11B) | WRMSRNS Gq,Rq (F3),(11B)
 f7: BEXTR Gy,Ey,By (v) | SHLX Gy,Ey,By (66),(v) | SARX Gy,Ey,By (F3),(v) | SHRX Gy,Ey,By (F2),(v)
 f8: MOVDIR64B Gv,Mdqq (66) | ENQCMD Gv,Mdqq (F2) | ENQCMDS Gv,Mdqq (F3) | URDMSR Rq,Gq (F2),(11B) | UWRMSR Gq,Rq (F3),(11B)
 f9: MOVDIRI My,Gy
@@ -1014,7 +1014,7 @@ f1: CRC32 Gy,Ey (es) | CRC32 Gy,Ey (66),(es) | INVVPID Gy,Mdq (F3),(ev)
 f2: INVPCID Gy,Mdq (F3),(ev)
 f4: TZCNT Gv,Ev (es) | TZCNT Gv,Ev (66),(es)
 f5: LZCNT Gv,Ev (es) | LZCNT Gv,Ev (66),(es)
-f6: Grp3_1 Eb (1A),(ev)
+f6: Grp3_1 Eb (1A),(ev) | RDMSR Rq,Gq (F2),(11B),(ev) | WRMSRNS Gq,Rq (F3),(11B),(ev)
 f7: Grp3_2 Ev (1A),(es)
 f8: MOVDIR64B Gv,Mdqq (66),(ev) | ENQCMD Gv,Mdqq (F2),(ev) | ENQCMDS Gv,Mdqq (F3),(ev) | URDMSR Rq,Gq (F2),(11B),(ev) | UWRMSR Gq,Rq (F3),(11B),(ev)
 f9: MOVDIRI My,Gy (ev)
@@ -1103,6 +1103,7 @@ EndTable
 Table: VEX map 7
 Referrer:
 AVXcode: 7
+f6: RDMSR Rq,Id (F2),(v1),(11B) | WRMSRNS Id,Rq (F3),(v1),(11B)
 f8: URDMSR Rq,Id (F2),(v1),(11B) | UWRMSR Id,Rq (F3),(v1),(11B)
 EndTable
 
diff --git a/tools/arch/x86/lib/x86-opcode-map.txt b/tools/arch/x86/lib/x86-opcode-map.txt
index caedb3ef6688..e64f52321d6d 100644
--- a/tools/arch/x86/lib/x86-opcode-map.txt
+++ b/tools/arch/x86/lib/x86-opcode-map.txt
@@ -839,7 +839,7 @@ f1: MOVBE My,Gy | MOVBE Mw,Gw (66) | CRC32 Gd,Ey (F2) | CRC32 Gd,Ew (66&F2)
 f2: ANDN Gy,By,Ey (v)
 f3: Grp17 (1A)
 f5: BZHI Gy,Ey,By (v) | PEXT Gy,By,Ey (F3),(v) | PDEP Gy,By,Ey (F2),(v) | WRUSSD/Q My,Gy (66)
-f6: ADCX Gy,Ey (66) | ADOX Gy,Ey (F3) | MULX By,Gy,rDX,Ey (F2),(v) | WRSSD/Q My,Gy
+f6: ADCX Gy,Ey (66) | ADOX Gy,Ey (F3) | MULX By,Gy,rDX,Ey (F2),(v) | WRSSD/Q My,Gy | RDMSR Rq,Gq (F2),(11B) | WRMSRNS Gq,Rq (F3),(11B)
 f7: BEXTR Gy,Ey,By (v) | SHLX Gy,Ey,By (66),(v) | SARX Gy,Ey,By (F3),(v) | SHRX Gy,Ey,By (F2),(v)
 f8: MOVDIR64B Gv,Mdqq (66) | ENQCMD Gv,Mdqq (F2) | ENQCMDS Gv,Mdqq (F3) | URDMSR Rq,Gq (F2),(11B) | UWRMSR Gq,Rq (F3),(11B)
 f9: MOVDIRI My,Gy
@@ -1014,7 +1014,7 @@ f1: CRC32 Gy,Ey (es) | CRC32 Gy,Ey (66),(es) | INVVPID Gy,Mdq (F3),(ev)
 f2: INVPCID Gy,Mdq (F3),(ev)
 f4: TZCNT Gv,Ev (es) | TZCNT Gv,Ev (66),(es)
 f5: LZCNT Gv,Ev (es) | LZCNT Gv,Ev (66),(es)
-f6: Grp3_1 Eb (1A),(ev)
+f6: Grp3_1 Eb (1A),(ev) | RDMSR Rq,Gq (F2),(11B),(ev) | WRMSRNS Gq,Rq (F3),(11B),(ev)
 f7: Grp3_2 Ev (1A),(es)
 f8: MOVDIR64B Gv,Mdqq (66),(ev) | ENQCMD Gv,Mdqq (F2),(ev) | ENQCMDS Gv,Mdqq (F3),(ev) | URDMSR Rq,Gq (F2),(11B),(ev) | UWRMSR Gq,Rq (F3),(11B),(ev)
 f9: MOVDIRI My,Gy (ev)
@@ -1103,6 +1103,7 @@ EndTable
 Table: VEX map 7
 Referrer:
 AVXcode: 7
+f6: RDMSR Rq,Id (F2),(v1),(11B) | WRMSRNS Id,Rq (F3),(v1),(11B)
 f8: URDMSR Rq,Id (F2),(v1),(11B) | UWRMSR Id,Rq (F3),(v1),(11B)
 EndTable
 
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
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Subject: [RFC PATCH v2 05/34] x86/msr: Return u64 consistently in Xen PMC read functions
Date: Tue, 22 Apr 2025 01:21:46 -0700
Message-ID: <20250422082216.1954310-6-xin@zytor.com>
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The pv_ops PMC read API is defined as:
        u64 (*read_pmc)(int counter);

But Xen PMC read functions return unsigned long long, make them
return u64 consistently.

Signed-off-by: Xin Li (Intel) 
---
 arch/x86/xen/pmu.c     | 6 +++---
 arch/x86/xen/xen-ops.h | 2 +-
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/x86/xen/pmu.c b/arch/x86/xen/pmu.c
index f06987b0efc3..9c1682af620a 100644
--- a/arch/x86/xen/pmu.c
+++ b/arch/x86/xen/pmu.c
@@ -346,7 +346,7 @@ bool pmu_msr_write(unsigned int msr, uint32_t low, uint32_t high, int *err)
 	return true;
 }
 
-static unsigned long long xen_amd_read_pmc(int counter)
+static u64 xen_amd_read_pmc(int counter)
 {
 	struct xen_pmu_amd_ctxt *ctxt;
 	uint64_t *counter_regs;
@@ -366,7 +366,7 @@ static unsigned long long xen_amd_read_pmc(int counter)
 	return counter_regs[counter];
 }
 
-static unsigned long long xen_intel_read_pmc(int counter)
+static u64 xen_intel_read_pmc(int counter)
 {
 	struct xen_pmu_intel_ctxt *ctxt;
 	uint64_t *fixed_counters;
@@ -396,7 +396,7 @@ static unsigned long long xen_intel_read_pmc(int counter)
 	return arch_cntr_pair[counter].counter;
 }
 
-unsigned long long xen_read_pmc(int counter)
+u64 xen_read_pmc(int counter)
 {
 	if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
 		return xen_amd_read_pmc(counter);
diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h
index 25e318ef27d6..dc886c3cc24d 100644
--- a/arch/x86/xen/xen-ops.h
+++ b/arch/x86/xen/xen-ops.h
@@ -274,7 +274,7 @@ static inline void xen_pmu_finish(int cpu) {}
 bool pmu_msr_read(unsigned int msr, uint64_t *val, int *err);
 bool pmu_msr_write(unsigned int msr, uint32_t low, uint32_t high, int *err);
 int pmu_apic_update(uint32_t reg);
-unsigned long long xen_read_pmc(int counter);
+u64 xen_read_pmc(int counter);
 
 #ifdef CONFIG_SMP
 
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
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Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
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Subject: [RFC PATCH v2 13/34] x86/xen/msr: Remove the error pointer argument from set_reg()
Date: Tue, 22 Apr 2025 01:21:54 -0700
Message-ID: <20250422082216.1954310-14-xin@zytor.com>
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set_reg() is used to write the following MSRs on Xen:

    MSR_FS_BASE
    MSR_KERNEL_GS_BASE
    MSR_GS_BASE

But none of these MSRs are written using any MSR write safe API.
Therefore there is no need to pass an error pointer argument to
set_reg() for returning an error code to be used in MSR safe APIs.

Remove the error pointer argument.

Signed-off-by: Xin Li (Intel) 
---
 arch/x86/xen/enlighten_pv.c | 16 +++++-----------
 1 file changed, 5 insertions(+), 11 deletions(-)

diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c
index b5a8bceb5f56..9a89cb29fa35 100644
--- a/arch/x86/xen/enlighten_pv.c
+++ b/arch/x86/xen/enlighten_pv.c
@@ -1111,17 +1111,11 @@ static u64 xen_do_read_msr(unsigned int msr, int *err)
 	return val;
 }
 
-static void set_seg(unsigned int which, unsigned int low, unsigned int high,
-		    int *err)
+static void set_seg(u32 which, u32 low, u32 high)
 {
 	u64 base = ((u64)high << 32) | low;
 
-	if (HYPERVISOR_set_segment_base(which, base) == 0)
-		return;
-
-	if (err)
-		*err = -EIO;
-	else
+	if (HYPERVISOR_set_segment_base(which, base))
 		WARN(1, "Xen set_segment_base(%u, %llx) failed\n", which, base);
 }
 
@@ -1138,15 +1132,15 @@ static void xen_do_write_msr(unsigned int msr, unsigned int low,
 
 	switch (msr) {
 	case MSR_FS_BASE:
-		set_seg(SEGBASE_FS, low, high, err);
+		set_seg(SEGBASE_FS, low, high);
 		break;
 
 	case MSR_KERNEL_GS_BASE:
-		set_seg(SEGBASE_GS_USER, low, high, err);
+		set_seg(SEGBASE_GS_USER, low, high);
 		break;
 
 	case MSR_GS_BASE:
-		set_seg(SEGBASE_GS_KERNEL, low, high, err);
+		set_seg(SEGBASE_GS_KERNEL, low, high);
 		break;
 
 	case MSR_STAR:
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
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        haiyangz@microsoft.com, decui@microsoft.com
Subject: [RFC PATCH v2 04/34] x86/msr: Convert rdpmcq() into a function
Date: Tue, 22 Apr 2025 01:21:45 -0700
Message-ID: <20250422082216.1954310-5-xin@zytor.com>
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Signed-off-by: Xin Li (Intel) 
---
 arch/x86/events/amd/uncore.c              |  2 +-
 arch/x86/events/core.c                    |  2 +-
 arch/x86/events/intel/core.c              |  4 ++--
 arch/x86/events/intel/ds.c                |  2 +-
 arch/x86/include/asm/msr.h                |  5 ++++-
 arch/x86/include/asm/paravirt.h           |  4 +---
 arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 12 ++++++------
 7 files changed, 16 insertions(+), 15 deletions(-)

diff --git a/arch/x86/events/amd/uncore.c b/arch/x86/events/amd/uncore.c
index b9933ab3116c..f2601c662783 100644
--- a/arch/x86/events/amd/uncore.c
+++ b/arch/x86/events/amd/uncore.c
@@ -152,7 +152,7 @@ static void amd_uncore_read(struct perf_event *event)
 	if (hwc->event_base_rdpmc < 0)
 		rdmsrq(hwc->event_base, new);
 	else
-		rdpmcq(hwc->event_base_rdpmc, new);
+		new = rdpmcq(hwc->event_base_rdpmc);
 
 	local64_set(&hwc->prev_count, new);
 	delta = (new << COUNTER_SHIFT) - (prev << COUNTER_SHIFT);
diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
index 3da1f0b3446c..0a3939b9965e 100644
--- a/arch/x86/events/core.c
+++ b/arch/x86/events/core.c
@@ -139,7 +139,7 @@ u64 x86_perf_event_update(struct perf_event *event)
 	 */
 	prev_raw_count = local64_read(&hwc->prev_count);
 	do {
-		rdpmcq(hwc->event_base_rdpmc, new_raw_count);
+		new_raw_count = rdpmcq(hwc->event_base_rdpmc);
 	} while (!local64_try_cmpxchg(&hwc->prev_count,
 				      &prev_raw_count, new_raw_count));
 
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index ba623e6cae1b..4370d0d86013 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -2739,12 +2739,12 @@ static u64 intel_update_topdown_event(struct perf_event *event, int metric_end,
 
 	if (!val) {
 		/* read Fixed counter 3 */
-		rdpmcq((3 | INTEL_PMC_FIXED_RDPMC_BASE), slots);
+		slots = rdpmcq(3 | INTEL_PMC_FIXED_RDPMC_BASE);
 		if (!slots)
 			return 0;
 
 		/* read PERF_METRICS */
-		rdpmcq(INTEL_PMC_FIXED_RDPMC_METRICS, metrics);
+		metrics = rdpmcq(INTEL_PMC_FIXED_RDPMC_METRICS);
 	} else {
 		slots = val[0];
 		metrics = val[1];
diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
index 4074567219de..845439fd9c03 100644
--- a/arch/x86/events/intel/ds.c
+++ b/arch/x86/events/intel/ds.c
@@ -2279,7 +2279,7 @@ intel_pmu_save_and_restart_reload(struct perf_event *event, int count)
 	WARN_ON(this_cpu_read(cpu_hw_events.enabled));
 
 	prev_raw_count = local64_read(&hwc->prev_count);
-	rdpmcq(hwc->event_base_rdpmc, new_raw_count);
+	new_raw_count = rdpmcq(hwc->event_base_rdpmc);
 	local64_set(&hwc->prev_count, new_raw_count);
 
 	/*
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index ed32637b1df6..01dc8e61ef97 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -234,7 +234,10 @@ static inline int rdmsrq_safe(u32 msr, u64 *p)
 	return err;
 }
 
-#define rdpmcq(counter, val) ((val) = native_read_pmc(counter))
+static __always_inline u64 rdpmcq(int counter)
+{
+	return native_read_pmc(counter);
+}
 
 #endif	/* !CONFIG_PARAVIRT_XXL */
 
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index 63ca099f8368..590824916394 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -239,13 +239,11 @@ static inline int rdmsrq_safe(unsigned msr, u64 *p)
 	return err;
 }
 
-static inline u64 paravirt_read_pmc(int counter)
+static __always_inline u64 rdpmcq(int counter)
 {
 	return PVOP_CALL1(u64, cpu.read_pmc, counter);
 }
 
-#define rdpmcq(counter, val) ((val) = paravirt_read_pmc(counter))
-
 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
 {
 	PVOP_VCALL2(cpu.alloc_ldt, ldt, entries);
diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
index a5e21f44b0ca..276ffab194f6 100644
--- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
+++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
@@ -1019,8 +1019,8 @@ static int measure_residency_fn(struct perf_event_attr *miss_attr,
 	 * used in L1 cache, second to capture accurate value that does not
 	 * include cache misses incurred because of instruction loads.
 	 */
-	rdpmcq(hit_pmcnum, hits_before);
-	rdpmcq(miss_pmcnum, miss_before);
+	hits_before = rdpmcq(hit_pmcnum);
+	miss_before = rdpmcq(miss_pmcnum);
 	/*
 	 * From SDM: Performing back-to-back fast reads are not guaranteed
 	 * to be monotonic.
@@ -1028,8 +1028,8 @@ static int measure_residency_fn(struct perf_event_attr *miss_attr,
 	 * before proceeding.
 	 */
 	rmb();
-	rdpmcq(hit_pmcnum, hits_before);
-	rdpmcq(miss_pmcnum, miss_before);
+	hits_before = rdpmcq(hit_pmcnum);
+	miss_before = rdpmcq(miss_pmcnum);
 	/*
 	 * Use LFENCE to ensure all previous instructions are retired
 	 * before proceeding.
@@ -1051,8 +1051,8 @@ static int measure_residency_fn(struct perf_event_attr *miss_attr,
 	 * before proceeding.
 	 */
 	rmb();
-	rdpmcq(hit_pmcnum, hits_after);
-	rdpmcq(miss_pmcnum, miss_after);
+	hits_after = rdpmcq(hit_pmcnum);
+	miss_after = rdpmcq(miss_pmcnum);
 	/*
 	 * Use LFENCE to ensure all previous instructions are retired
 	 * before proceeding.
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
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Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
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        haiyangz@microsoft.com, decui@microsoft.com
Subject: [RFC PATCH v2 12/34] x86/msr: Remove pmu_msr_{read,write}()
Date: Tue, 22 Apr 2025 01:21:53 -0700
Message-ID: <20250422082216.1954310-13-xin@zytor.com>
X-Mailer: git-send-email 2.49.0
In-Reply-To: <20250422082216.1954310-1-xin@zytor.com>
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As pmu_msr_{read,write}() are now wrappers of pmu_msr_chk_emulated(),
remove them and use pmu_msr_chk_emulated() directly.

While at it, convert the data type of MSR index to u32 in functions
called in pmu_msr_chk_emulated().

Suggested-by: H. Peter Anvin (Intel) 
Signed-off-by: Xin Li (Intel) 
---
 arch/x86/xen/enlighten_pv.c | 17 ++++++++++-------
 arch/x86/xen/pmu.c          | 24 ++++--------------------
 arch/x86/xen/xen-ops.h      |  3 +--
 3 files changed, 15 insertions(+), 29 deletions(-)

diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c
index 1418758b57ff..b5a8bceb5f56 100644
--- a/arch/x86/xen/enlighten_pv.c
+++ b/arch/x86/xen/enlighten_pv.c
@@ -1089,8 +1089,9 @@ static void xen_write_cr4(unsigned long cr4)
 static u64 xen_do_read_msr(unsigned int msr, int *err)
 {
 	u64 val = 0;	/* Avoid uninitialized value for safe variant. */
+	bool emulated;
 
-	if (pmu_msr_read(msr, &val, err))
+	if (pmu_msr_chk_emulated(msr, &val, true, &emulated) && emulated)
 		return val;
 
 	if (err)
@@ -1133,6 +1134,7 @@ static void xen_do_write_msr(unsigned int msr, unsigned int low,
 			     unsigned int high, int *err)
 {
 	u64 val;
+	bool emulated;
 
 	switch (msr) {
 	case MSR_FS_BASE:
@@ -1162,12 +1164,13 @@ static void xen_do_write_msr(unsigned int msr, unsigned int low,
 	default:
 		val = (u64)high << 32 | low;
 
-		if (!pmu_msr_write(msr, val)) {
-			if (err)
-				*err = native_write_msr_safe(msr, low, high);
-			else
-				native_write_msr(msr, low, high);
-		}
+		if (pmu_msr_chk_emulated(msr, &val, false, &emulated) && emulated)
+			return;
+
+		if (err)
+			*err = native_write_msr_safe(msr, low, high);
+		else
+			native_write_msr(msr, low, high);
 	}
 }
 
diff --git a/arch/x86/xen/pmu.c b/arch/x86/xen/pmu.c
index 95caae97a394..afb02f43ee3f 100644
--- a/arch/x86/xen/pmu.c
+++ b/arch/x86/xen/pmu.c
@@ -128,7 +128,7 @@ static inline uint32_t get_fam15h_addr(u32 addr)
 	return addr;
 }
 
-static inline bool is_amd_pmu_msr(unsigned int msr)
+static bool is_amd_pmu_msr(u32 msr)
 {
 	if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD &&
 	    boot_cpu_data.x86_vendor != X86_VENDOR_HYGON)
@@ -194,8 +194,7 @@ static bool is_intel_pmu_msr(u32 msr_index, int *type, int *index)
 	}
 }
 
-static bool xen_intel_pmu_emulate(unsigned int msr, u64 *val, int type,
-				  int index, bool is_read)
+static bool xen_intel_pmu_emulate(u32 msr, u64 *val, int type, int index, bool is_read)
 {
 	uint64_t *reg = NULL;
 	struct xen_pmu_intel_ctxt *ctxt;
@@ -257,7 +256,7 @@ static bool xen_intel_pmu_emulate(unsigned int msr, u64 *val, int type,
 	return false;
 }
 
-static bool xen_amd_pmu_emulate(unsigned int msr, u64 *val, bool is_read)
+static bool xen_amd_pmu_emulate(u32 msr, u64 *val, bool is_read)
 {
 	uint64_t *reg = NULL;
 	int i, off = 0;
@@ -298,8 +297,7 @@ static bool xen_amd_pmu_emulate(unsigned int msr, u64 *val, bool is_read)
 	return false;
 }
 
-static bool pmu_msr_chk_emulated(unsigned int msr, uint64_t *val, bool is_read,
-				 bool *emul)
+bool pmu_msr_chk_emulated(u32 msr, u64 *val, bool is_read, bool *emul)
 {
 	int type, index = 0;
 
@@ -313,20 +311,6 @@ static bool pmu_msr_chk_emulated(unsigned int msr, uint64_t *val, bool is_read,
 	return true;
 }
 
-bool pmu_msr_read(u32 msr, u64 *val)
-{
-	bool emulated;
-
-	return pmu_msr_chk_emulated(msr, val, true, &emulated) && emulated;
-}
-
-bool pmu_msr_write(u32 msr, u64 val)
-{
-	bool emulated;
-
-	return pmu_msr_chk_emulated(msr, &val, false, &emulated) && emulated;
-}
-
 static u64 xen_amd_read_pmc(int counter)
 {
 	struct xen_pmu_amd_ctxt *ctxt;
diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h
index a1875e10be31..fde9f9d7415f 100644
--- a/arch/x86/xen/xen-ops.h
+++ b/arch/x86/xen/xen-ops.h
@@ -271,8 +271,7 @@ void xen_pmu_finish(int cpu);
 static inline void xen_pmu_init(int cpu) {}
 static inline void xen_pmu_finish(int cpu) {}
 #endif
-bool pmu_msr_read(u32 msr, u64 *val);
-bool pmu_msr_write(u32 msr, u64 val);
+bool pmu_msr_chk_emulated(u32 msr, u64 *val, bool is_read, bool *emul);
 int pmu_apic_update(uint32_t reg);
 u64 xen_read_pmc(int counter);
 
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
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        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com
Subject: [RFC PATCH v2 08/34] x86/msr: Convert a native_wrmsr() use to native_wrmsrq()
Date: Tue, 22 Apr 2025 01:21:49 -0700
Message-ID: <20250422082216.1954310-9-xin@zytor.com>
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Convert a native_wrmsr() use to native_wrmsrq() to zap meaningless type
conversions when a u64 MSR value is splitted into two u32.

Signed-off-by: Xin Li (Intel) 
---
 arch/x86/include/asm/sev-internal.h | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/arch/x86/include/asm/sev-internal.h b/arch/x86/include/asm/sev-internal.h
index 73cb774c3639..9da509e52e11 100644
--- a/arch/x86/include/asm/sev-internal.h
+++ b/arch/x86/include/asm/sev-internal.h
@@ -101,12 +101,7 @@ static inline u64 sev_es_rd_ghcb_msr(void)
 
 static __always_inline void sev_es_wr_ghcb_msr(u64 val)
 {
-	u32 low, high;
-
-	low  = (u32)(val);
-	high = (u32)(val >> 32);
-
-	native_wrmsr(MSR_AMD64_SEV_ES_GHCB, low, high);
+	native_wrmsrq(MSR_AMD64_SEV_ES_GHCB, val);
 }
 
 enum es_result sev_es_ghcb_hv_call(struct ghcb *ghcb,
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
        pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com
Subject: [RFC PATCH v2 01/34] x86/msr: Move rdtsc{,_ordered}() to 
Date: Tue, 22 Apr 2025 01:21:42 -0700
Message-ID: <20250422082216.1954310-2-xin@zytor.com>
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In-Reply-To: <20250422082216.1954310-1-xin@zytor.com>
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Relocate rdtsc{,_ordered}() from  to , and
subsequently remove the inclusion of  in .
Consequently,  must be included in several source files
that previously did not require it.

Signed-off-by: Xin Li (Intel) 
---
 arch/x86/boot/startup/sme.c                   |  1 +
 arch/x86/events/msr.c                         |  3 +
 arch/x86/events/perf_event.h                  |  1 +
 arch/x86/events/probe.c                       |  2 +
 arch/x86/hyperv/ivm.c                         |  1 +
 arch/x86/include/asm/fred.h                   |  1 +
 arch/x86/include/asm/microcode.h              |  2 +
 arch/x86/include/asm/mshyperv.h               |  1 +
 arch/x86/include/asm/msr.h                    | 55 +-------------
 arch/x86/include/asm/suspend_32.h             |  1 +
 arch/x86/include/asm/suspend_64.h             |  1 +
 arch/x86/include/asm/switch_to.h              |  2 +
 arch/x86/include/asm/tsc.h                    | 76 ++++++++++++++++++-
 arch/x86/kernel/cpu/resctrl/pseudo_lock.c     |  1 +
 arch/x86/kernel/fpu/xstate.h                  |  1 +
 arch/x86/kernel/hpet.c                        |  1 +
 arch/x86/kernel/process_64.c                  |  1 +
 arch/x86/kernel/trace_clock.c                 |  2 +-
 arch/x86/kernel/tsc_sync.c                    |  1 +
 arch/x86/lib/kaslr.c                          |  2 +-
 arch/x86/realmode/init.c                      |  1 +
 drivers/acpi/processor_perflib.c              |  1 +
 drivers/acpi/processor_throttling.c           |  3 +-
 drivers/cpufreq/amd-pstate-ut.c               |  2 +
 drivers/hwmon/hwmon-vid.c                     |  4 +
 drivers/net/vmxnet3/vmxnet3_drv.c             |  4 +
 .../intel/speed_select_if/isst_if_common.c    |  1 +
 drivers/platform/x86/intel/turbo_max_3.c      |  1 +
 28 files changed, 115 insertions(+), 58 deletions(-)

diff --git a/arch/x86/boot/startup/sme.c b/arch/x86/boot/startup/sme.c
index 5738b31c8e60..591d6a4d2e59 100644
--- a/arch/x86/boot/startup/sme.c
+++ b/arch/x86/boot/startup/sme.c
@@ -44,6 +44,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #define PGD_FLAGS		_KERNPG_TABLE_NOENC
 #define P4D_FLAGS		_KERNPG_TABLE_NOENC
diff --git a/arch/x86/events/msr.c b/arch/x86/events/msr.c
index 8970ecef87c5..c39e49cecace 100644
--- a/arch/x86/events/msr.c
+++ b/arch/x86/events/msr.c
@@ -3,6 +3,9 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+
 #include "probe.h"
 
 enum perf_msr_id {
diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h
index b29b452b1187..53ef48b4c65c 100644
--- a/arch/x86/events/perf_event.h
+++ b/arch/x86/events/perf_event.h
@@ -17,6 +17,7 @@
 #include 
 #include 
 #include 
+#include 
 
 /* To enable MSR tracing please use the generic trace points. */
 
diff --git a/arch/x86/events/probe.c b/arch/x86/events/probe.c
index fda35cf25528..bb719d0d3f0b 100644
--- a/arch/x86/events/probe.c
+++ b/arch/x86/events/probe.c
@@ -2,6 +2,8 @@
 #include 
 #include 
 #include 
+
+#include 
 #include "probe.h"
 
 static umode_t
diff --git a/arch/x86/hyperv/ivm.c b/arch/x86/hyperv/ivm.c
index 1b8a2415183b..8209de792388 100644
--- a/arch/x86/hyperv/ivm.c
+++ b/arch/x86/hyperv/ivm.c
@@ -22,6 +22,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #ifdef CONFIG_AMD_MEM_ENCRYPT
diff --git a/arch/x86/include/asm/fred.h b/arch/x86/include/asm/fred.h
index 2a29e5216881..12b34d5b2953 100644
--- a/arch/x86/include/asm/fred.h
+++ b/arch/x86/include/asm/fred.h
@@ -9,6 +9,7 @@
 #include 
 
 #include 
+#include 
 #include 
 
 /*
diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h
index 263ea3dd0001..107a1aaa211b 100644
--- a/arch/x86/include/asm/microcode.h
+++ b/arch/x86/include/asm/microcode.h
@@ -2,6 +2,8 @@
 #ifndef _ASM_X86_MICROCODE_H
 #define _ASM_X86_MICROCODE_H
 
+#include 
+
 struct cpu_signature {
 	unsigned int sig;
 	unsigned int pf;
diff --git a/arch/x86/include/asm/mshyperv.h b/arch/x86/include/asm/mshyperv.h
index bab5ccfc60a7..15d00dace70f 100644
--- a/arch/x86/include/asm/mshyperv.h
+++ b/arch/x86/include/asm/mshyperv.h
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 /*
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 2ccc78ebc3d7..2caa13830e11 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -12,6 +12,7 @@
 #include 
 #include 
 
+#include 
 #include 
 
 struct msr_info {
@@ -169,60 +170,6 @@ native_write_msr_safe(u32 msr, u32 low, u32 high)
 extern int rdmsr_safe_regs(u32 regs[8]);
 extern int wrmsr_safe_regs(u32 regs[8]);
 
-/**
- * rdtsc() - returns the current TSC without ordering constraints
- *
- * rdtsc() returns the result of RDTSC as a 64-bit integer.  The
- * only ordering constraint it supplies is the ordering implied by
- * "asm volatile": it will put the RDTSC in the place you expect.  The
- * CPU can and will speculatively execute that RDTSC, though, so the
- * results can be non-monotonic if compared on different CPUs.
- */
-static __always_inline u64 rdtsc(void)
-{
-	DECLARE_ARGS(val, low, high);
-
-	asm volatile("rdtsc" : EAX_EDX_RET(val, low, high));
-
-	return EAX_EDX_VAL(val, low, high);
-}
-
-/**
- * rdtsc_ordered() - read the current TSC in program order
- *
- * rdtsc_ordered() returns the result of RDTSC as a 64-bit integer.
- * It is ordered like a load to a global in-memory counter.  It should
- * be impossible to observe non-monotonic rdtsc_unordered() behavior
- * across multiple CPUs as long as the TSC is synced.
- */
-static __always_inline u64 rdtsc_ordered(void)
-{
-	DECLARE_ARGS(val, low, high);
-
-	/*
-	 * The RDTSC instruction is not ordered relative to memory
-	 * access.  The Intel SDM and the AMD APM are both vague on this
-	 * point, but empirically an RDTSC instruction can be
-	 * speculatively executed before prior loads.  An RDTSC
-	 * immediately after an appropriate barrier appears to be
-	 * ordered as a normal load, that is, it provides the same
-	 * ordering guarantees as reading from a global memory location
-	 * that some other imaginary CPU is updating continuously with a
-	 * time stamp.
-	 *
-	 * Thus, use the preferred barrier on the respective CPU, aiming for
-	 * RDTSCP as the default.
-	 */
-	asm volatile(ALTERNATIVE_2("rdtsc",
-				   "lfence; rdtsc", X86_FEATURE_LFENCE_RDTSC,
-				   "rdtscp", X86_FEATURE_RDTSCP)
-			: EAX_EDX_RET(val, low, high)
-			/* RDTSCP clobbers ECX with MSR_TSC_AUX. */
-			:: "ecx");
-
-	return EAX_EDX_VAL(val, low, high);
-}
-
 static inline u64 native_read_pmc(int counter)
 {
 	DECLARE_ARGS(val, low, high);
diff --git a/arch/x86/include/asm/suspend_32.h b/arch/x86/include/asm/suspend_32.h
index d8416b3bf832..e8e5aab06255 100644
--- a/arch/x86/include/asm/suspend_32.h
+++ b/arch/x86/include/asm/suspend_32.h
@@ -9,6 +9,7 @@
 
 #include 
 #include 
+#include 
 
 /* image of the saved processor state */
 struct saved_context {
diff --git a/arch/x86/include/asm/suspend_64.h b/arch/x86/include/asm/suspend_64.h
index 54df06687d83..b512f9665f78 100644
--- a/arch/x86/include/asm/suspend_64.h
+++ b/arch/x86/include/asm/suspend_64.h
@@ -9,6 +9,7 @@
 
 #include 
 #include 
+#include 
 
 /*
  * Image of the saved processor state, used by the low level ACPI suspend to
diff --git a/arch/x86/include/asm/switch_to.h b/arch/x86/include/asm/switch_to.h
index 75248546403d..4f21df7af715 100644
--- a/arch/x86/include/asm/switch_to.h
+++ b/arch/x86/include/asm/switch_to.h
@@ -52,6 +52,8 @@ do {									\
 } while (0)
 
 #ifdef CONFIG_X86_32
+#include 
+
 static inline void refresh_sysenter_cs(struct thread_struct *thread)
 {
 	/* Only happens when SEP is enabled, no need to test "SEP"arately: */
diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h
index 94408a784c8e..13335a130edf 100644
--- a/arch/x86/include/asm/tsc.h
+++ b/arch/x86/include/asm/tsc.h
@@ -7,7 +7,81 @@
 
 #include 
 #include 
-#include 
+
+/*
+ * both i386 and x86_64 returns 64-bit value in edx:eax, but gcc's "A"
+ * constraint has different meanings. For i386, "A" means exactly
+ * edx:eax, while for x86_64 it doesn't mean rdx:rax or edx:eax. Instead,
+ * it means rax *or* rdx.
+ */
+#ifdef CONFIG_X86_64
+/* Using 64-bit values saves one instruction clearing the high half of low */
+#define DECLARE_ARGS(val, low, high)	unsigned long low, high
+#define EAX_EDX_VAL(val, low, high)	((low) | (high) << 32)
+#define EAX_EDX_RET(val, low, high)	"=a" (low), "=d" (high)
+#else
+#define DECLARE_ARGS(val, low, high)	u64 val
+#define EAX_EDX_VAL(val, low, high)	(val)
+#define EAX_EDX_RET(val, low, high)	"=A" (val)
+#endif
+
+/**
+ * rdtsc() - returns the current TSC without ordering constraints
+ *
+ * rdtsc() returns the result of RDTSC as a 64-bit integer.  The
+ * only ordering constraint it supplies is the ordering implied by
+ * "asm volatile": it will put the RDTSC in the place you expect.  The
+ * CPU can and will speculatively execute that RDTSC, though, so the
+ * results can be non-monotonic if compared on different CPUs.
+ */
+static __always_inline u64 rdtsc(void)
+{
+	DECLARE_ARGS(val, low, high);
+
+	asm volatile("rdtsc" : EAX_EDX_RET(val, low, high));
+
+	return EAX_EDX_VAL(val, low, high);
+}
+
+/**
+ * rdtsc_ordered() - read the current TSC in program order
+ *
+ * rdtsc_ordered() returns the result of RDTSC as a 64-bit integer.
+ * It is ordered like a load to a global in-memory counter.  It should
+ * be impossible to observe non-monotonic rdtsc_unordered() behavior
+ * across multiple CPUs as long as the TSC is synced.
+ */
+static __always_inline u64 rdtsc_ordered(void)
+{
+	DECLARE_ARGS(val, low, high);
+
+	/*
+	 * The RDTSC instruction is not ordered relative to memory
+	 * access.  The Intel SDM and the AMD APM are both vague on this
+	 * point, but empirically an RDTSC instruction can be
+	 * speculatively executed before prior loads.  An RDTSC
+	 * immediately after an appropriate barrier appears to be
+	 * ordered as a normal load, that is, it provides the same
+	 * ordering guarantees as reading from a global memory location
+	 * that some other imaginary CPU is updating continuously with a
+	 * time stamp.
+	 *
+	 * Thus, use the preferred barrier on the respective CPU, aiming for
+	 * RDTSCP as the default.
+	 */
+	asm volatile(ALTERNATIVE_2("rdtsc",
+				   "lfence; rdtsc", X86_FEATURE_LFENCE_RDTSC,
+				   "rdtscp", X86_FEATURE_RDTSCP)
+			: EAX_EDX_RET(val, low, high)
+			/* RDTSCP clobbers ECX with MSR_TSC_AUX. */
+			:: "ecx");
+
+	return EAX_EDX_VAL(val, low, high);
+}
+
+#undef DECLARE_ARGS
+#undef EAX_EDX_VAL
+#undef EAX_EDX_RET
 
 /*
  * Standard way to access the cycle counter.
diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
index 2a82eb6a0376..26c354bdea07 100644
--- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
+++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
@@ -25,6 +25,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "../../events/perf_event.h" /* For X86_CONFIG() */
 #include "internal.h"
diff --git a/arch/x86/kernel/fpu/xstate.h b/arch/x86/kernel/fpu/xstate.h
index a3b7dcbdb060..52ce19289989 100644
--- a/arch/x86/kernel/fpu/xstate.h
+++ b/arch/x86/kernel/fpu/xstate.h
@@ -5,6 +5,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #ifdef CONFIG_X86_64
 DECLARE_PER_CPU(u64, xfd_state);
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index cc5d12232216..c9982a7c9536 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #undef  pr_fmt
 #define pr_fmt(fmt) "hpet: " fmt
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index 24e1ccf22912..cfa9c031de91 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -57,6 +57,7 @@
 #include 
 #include 
 #include 
+#include 
 #ifdef CONFIG_IA32_EMULATION
 /* Not included via unistd.h */
 #include 
diff --git a/arch/x86/kernel/trace_clock.c b/arch/x86/kernel/trace_clock.c
index b8e7abe00b06..708d61743d15 100644
--- a/arch/x86/kernel/trace_clock.c
+++ b/arch/x86/kernel/trace_clock.c
@@ -4,7 +4,7 @@
  */
 #include 
 #include 
-#include 
+#include 
 
 /*
  * trace_clock_x86_tsc(): A clock that is just the cycle counter.
diff --git a/arch/x86/kernel/tsc_sync.c b/arch/x86/kernel/tsc_sync.c
index f1c7a86dbf49..ec3aa340d351 100644
--- a/arch/x86/kernel/tsc_sync.c
+++ b/arch/x86/kernel/tsc_sync.c
@@ -21,6 +21,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 struct tsc_adjust {
diff --git a/arch/x86/lib/kaslr.c b/arch/x86/lib/kaslr.c
index a58f451a7dd3..b5893928d55c 100644
--- a/arch/x86/lib/kaslr.c
+++ b/arch/x86/lib/kaslr.c
@@ -8,7 +8,7 @@
  */
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
diff --git a/arch/x86/realmode/init.c b/arch/x86/realmode/init.c
index 263787b4800c..ed5c63c0b4e5 100644
--- a/arch/x86/realmode/init.c
+++ b/arch/x86/realmode/init.c
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 struct real_mode_header *real_mode_header;
diff --git a/drivers/acpi/processor_perflib.c b/drivers/acpi/processor_perflib.c
index 53996f1a2d80..64b8d1e19594 100644
--- a/drivers/acpi/processor_perflib.c
+++ b/drivers/acpi/processor_perflib.c
@@ -20,6 +20,7 @@
 #include 
 #ifdef CONFIG_X86
 #include 
+#include 
 #endif
 
 #define ACPI_PROCESSOR_FILE_PERFORMANCE	"performance"
diff --git a/drivers/acpi/processor_throttling.c b/drivers/acpi/processor_throttling.c
index 00d045e5f524..8482e9a8a7aa 100644
--- a/drivers/acpi/processor_throttling.c
+++ b/drivers/acpi/processor_throttling.c
@@ -18,9 +18,10 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
-#include 
+#include 
 
 /* ignore_tpc:
  *  0 -> acpi processor driver doesn't ignore _TPC values
diff --git a/drivers/cpufreq/amd-pstate-ut.c b/drivers/cpufreq/amd-pstate-ut.c
index 707fa81c749f..c8d031b297d2 100644
--- a/drivers/cpufreq/amd-pstate-ut.c
+++ b/drivers/cpufreq/amd-pstate-ut.c
@@ -31,6 +31,8 @@
 
 #include 
 
+#include 
+
 #include "amd-pstate.h"
 
 
diff --git a/drivers/hwmon/hwmon-vid.c b/drivers/hwmon/hwmon-vid.c
index 6d1175a51832..2df4956296ed 100644
--- a/drivers/hwmon/hwmon-vid.c
+++ b/drivers/hwmon/hwmon-vid.c
@@ -15,6 +15,10 @@
 #include 
 #include 
 
+#ifdef CONFIG_X86
+#include 
+#endif
+
 /*
  * Common code for decoding VID pins.
  *
diff --git a/drivers/net/vmxnet3/vmxnet3_drv.c b/drivers/net/vmxnet3/vmxnet3_drv.c
index 3df6aabc7e33..7edd0b5e0e77 100644
--- a/drivers/net/vmxnet3/vmxnet3_drv.c
+++ b/drivers/net/vmxnet3/vmxnet3_drv.c
@@ -27,6 +27,10 @@
 #include 
 #include 
 
+#ifdef CONFIG_X86
+#include 
+#endif
+
 #include "vmxnet3_int.h"
 #include "vmxnet3_xdp.h"
 
diff --git a/drivers/platform/x86/intel/speed_select_if/isst_if_common.c b/drivers/platform/x86/intel/speed_select_if/isst_if_common.c
index 44dcd165b4c0..8a5713593811 100644
--- a/drivers/platform/x86/intel/speed_select_if/isst_if_common.c
+++ b/drivers/platform/x86/intel/speed_select_if/isst_if_common.c
@@ -21,6 +21,7 @@
 
 #include 
 #include 
+#include 
 
 #include "isst_if_common.h"
 
diff --git a/drivers/platform/x86/intel/turbo_max_3.c b/drivers/platform/x86/intel/turbo_max_3.c
index 7e538bbd5b50..b5af3e91ba04 100644
--- a/drivers/platform/x86/intel/turbo_max_3.c
+++ b/drivers/platform/x86/intel/turbo_max_3.c
@@ -17,6 +17,7 @@
 
 #include 
 #include 
+#include 
 
 #define MSR_OC_MAILBOX			0x150
 #define MSR_OC_MAILBOX_CMD_OFFSET	32
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
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        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
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        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com
Subject: [RFC PATCH v2 19/34] x86/extable: Add support for immediate form MSR instructions
Date: Tue, 22 Apr 2025 01:22:00 -0700
Message-ID: <20250422082216.1954310-20-xin@zytor.com>
X-Mailer: git-send-email 2.49.0
In-Reply-To: <20250422082216.1954310-1-xin@zytor.com>
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Signed-off-by: Xin Li (Intel) 
---
 arch/x86/include/asm/msr.h | 18 ++++++++++++++++++
 arch/x86/mm/extable.c      | 39 +++++++++++++++++++++++++++++++++-----
 2 files changed, 52 insertions(+), 5 deletions(-)

diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index c955339be9c9..8f7a67b1c61c 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -78,6 +78,24 @@ static inline void do_trace_rdpmc(u32 msr, u64 val, int failed) {}
 extern u64 xen_read_pmc(int counter);
 #endif
 
+/*
+ * Called only from an MSR fault handler, the instruction pointer points to
+ * the MSR access instruction that caused the fault.
+ */
+static __always_inline bool is_msr_imm_insn(void *ip)
+{
+	/*
+	 * A full decoder for immediate form MSR instructions appears excessive.
+	 */
+#ifdef CONFIG_X86_64
+	const u8 msr_imm_insn_prefix[] = { 0xc4, 0xe7 };
+
+	return !memcmp(ip, msr_imm_insn_prefix, sizeof(msr_imm_insn_prefix));
+#else
+	return false;
+#endif
+}
+
 /*
  * __rdmsr() and __wrmsr() are the two primitives which are the bare minimum MSR
  * accessors and should not have any tracing or other functionality piggybacking
diff --git a/arch/x86/mm/extable.c b/arch/x86/mm/extable.c
index bf8dab18be97..f1743babafc8 100644
--- a/arch/x86/mm/extable.c
+++ b/arch/x86/mm/extable.c
@@ -167,23 +167,52 @@ static bool ex_handler_uaccess(const struct exception_table_entry *fixup,
 static bool ex_handler_msr(const struct exception_table_entry *fixup,
 			   struct pt_regs *regs, bool wrmsr, bool safe, int reg)
 {
+	bool imm_insn = is_msr_imm_insn((void *)regs->ip);
+	u32 msr;
+
+	if (imm_insn)
+		/*
+		 * The 32-bit immediate specifying a MSR is encoded into
+		 * byte 5 ~ 8 of an immediate form MSR instruction.
+		 */
+		msr = *(u32 *)(regs->ip + 5);
+	else
+		msr = (u32)regs->cx;
+
 	if (__ONCE_LITE_IF(!safe && wrmsr)) {
-		pr_warn("unchecked MSR access error: WRMSR to 0x%x (tried to write 0x%08x%08x) at rIP: 0x%lx (%pS)\n",
-			(unsigned int)regs->cx, (unsigned int)regs->dx,
-			(unsigned int)regs->ax,  regs->ip, (void *)regs->ip);
+		/*
+		 * To maintain consistency with existing RDMSR and WRMSR(NS) instructions,
+		 * the register operand for immediate form MSR instructions is ALWAYS
+		 * encoded as RAX in  for reading or writing the MSR value.
+		 */
+		u64 msr_val = regs->ax;
+
+		if (!imm_insn) {
+			/*
+			 * On processors that support the Intel 64 architecture, the
+			 * high-order 32 bits of each of RAX and RDX are ignored.
+			 */
+			msr_val &= 0xffffffff;
+			msr_val |= (u64)regs->dx << 32;
+		}
+
+		pr_warn("unchecked MSR access error: WRMSR to 0x%x (tried to write 0x%016llx) at rIP: 0x%lx (%pS)\n",
+			msr, msr_val, regs->ip, (void *)regs->ip);
 		show_stack_regs(regs);
 	}
 
 	if (__ONCE_LITE_IF(!safe && !wrmsr)) {
 		pr_warn("unchecked MSR access error: RDMSR from 0x%x at rIP: 0x%lx (%pS)\n",
-			(unsigned int)regs->cx, regs->ip, (void *)regs->ip);
+			msr, regs->ip, (void *)regs->ip);
 		show_stack_regs(regs);
 	}
 
 	if (!wrmsr) {
 		/* Pretend that the read succeeded and returned 0. */
 		regs->ax = 0;
-		regs->dx = 0;
+
+		if (!imm_insn)
+			regs->dx = 0;
 	}
 
 	if (safe)
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
        pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com
Subject: [RFC PATCH v2 10/34] x86/msr: Convert __rdmsr() uses to native_rdmsrq() uses
Date: Tue, 22 Apr 2025 01:21:51 -0700
Message-ID: <20250422082216.1954310-11-xin@zytor.com>
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__rdmsr() is the lowest level primitive MSR read API, and its direct
use is NOT preferred.  Use its wrapper function native_rdmsrq() instead.

No functional change intended.

This change also prepares for using the alternatives mechanism to access
MSRs: uses of native_rdmsr{,q}() don't need to change, but the approaches
how they perform MSR operations are binary patched during boot time upon
availability of MSR instructions.

Signed-off-by: Xin Li (Intel) 
---
 arch/x86/boot/startup/sme.c               | 4 ++--
 arch/x86/events/amd/brs.c                 | 2 +-
 arch/x86/hyperv/hv_vtl.c                  | 4 ++--
 arch/x86/hyperv/ivm.c                     | 2 +-
 arch/x86/include/asm/mshyperv.h           | 2 +-
 arch/x86/include/asm/sev-internal.h       | 2 +-
 arch/x86/kernel/cpu/common.c              | 2 +-
 arch/x86/kernel/cpu/mce/core.c            | 4 ++--
 arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 2 +-
 arch/x86/kvm/vmx/vmx.c                    | 4 ++--
 10 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/arch/x86/boot/startup/sme.c b/arch/x86/boot/startup/sme.c
index 591d6a4d2e59..5e147bf5a0a8 100644
--- a/arch/x86/boot/startup/sme.c
+++ b/arch/x86/boot/startup/sme.c
@@ -524,7 +524,7 @@ void __head sme_enable(struct boot_params *bp)
 	me_mask = 1UL << (ebx & 0x3f);
 
 	/* Check the SEV MSR whether SEV or SME is enabled */
-	sev_status = msr = __rdmsr(MSR_AMD64_SEV);
+	sev_status = msr = native_rdmsrq(MSR_AMD64_SEV);
 	feature_mask = (msr & MSR_AMD64_SEV_ENABLED) ? AMD_SEV_BIT : AMD_SME_BIT;
 
 	/*
@@ -555,7 +555,7 @@ void __head sme_enable(struct boot_params *bp)
 			return;
 
 		/* For SME, check the SYSCFG MSR */
-		msr = __rdmsr(MSR_AMD64_SYSCFG);
+		msr = native_rdmsrq(MSR_AMD64_SYSCFG);
 		if (!(msr & MSR_AMD64_SYSCFG_MEM_ENCRYPT))
 			return;
 	}
diff --git a/arch/x86/events/amd/brs.c b/arch/x86/events/amd/brs.c
index 3f5ecfd80d1e..06f35a6b58a5 100644
--- a/arch/x86/events/amd/brs.c
+++ b/arch/x86/events/amd/brs.c
@@ -49,7 +49,7 @@ static __always_inline void set_debug_extn_cfg(u64 val)
 
 static __always_inline u64 get_debug_extn_cfg(void)
 {
-	return __rdmsr(MSR_AMD_DBG_EXTN_CFG);
+	return native_rdmsrq(MSR_AMD_DBG_EXTN_CFG);
 }
 
 static bool __init amd_brs_detect(void)
diff --git a/arch/x86/hyperv/hv_vtl.c b/arch/x86/hyperv/hv_vtl.c
index 13242ed8ff16..c6343e699154 100644
--- a/arch/x86/hyperv/hv_vtl.c
+++ b/arch/x86/hyperv/hv_vtl.c
@@ -149,11 +149,11 @@ static int hv_vtl_bringup_vcpu(u32 target_vp_index, int cpu, u64 eip_ignored)
 	input->vp_context.rip = rip;
 	input->vp_context.rsp = rsp;
 	input->vp_context.rflags = 0x0000000000000002;
-	input->vp_context.efer = __rdmsr(MSR_EFER);
+	input->vp_context.efer = native_rdmsrq(MSR_EFER);
 	input->vp_context.cr0 = native_read_cr0();
 	input->vp_context.cr3 = __native_read_cr3();
 	input->vp_context.cr4 = native_read_cr4();
-	input->vp_context.msr_cr_pat = __rdmsr(MSR_IA32_CR_PAT);
+	input->vp_context.msr_cr_pat = native_rdmsrq(MSR_IA32_CR_PAT);
 	input->vp_context.idtr.limit = idt_ptr.size;
 	input->vp_context.idtr.base = idt_ptr.address;
 	input->vp_context.gdtr.limit = gdt_ptr.size;
diff --git a/arch/x86/hyperv/ivm.c b/arch/x86/hyperv/ivm.c
index 8209de792388..09a165a3c41e 100644
--- a/arch/x86/hyperv/ivm.c
+++ b/arch/x86/hyperv/ivm.c
@@ -111,7 +111,7 @@ u64 hv_ghcb_hypercall(u64 control, void *input, void *output, u32 input_size)
 
 static inline u64 rd_ghcb_msr(void)
 {
-	return __rdmsr(MSR_AMD64_SEV_ES_GHCB);
+	return native_rdmsrq(MSR_AMD64_SEV_ES_GHCB);
 }
 
 static inline void wr_ghcb_msr(u64 val)
diff --git a/arch/x86/include/asm/mshyperv.h b/arch/x86/include/asm/mshyperv.h
index 15d00dace70f..778444310cfb 100644
--- a/arch/x86/include/asm/mshyperv.h
+++ b/arch/x86/include/asm/mshyperv.h
@@ -305,7 +305,7 @@ void hv_set_non_nested_msr(unsigned int reg, u64 value);
 
 static __always_inline u64 hv_raw_get_msr(unsigned int reg)
 {
-	return __rdmsr(reg);
+	return native_rdmsrq(reg);
 }
 
 #else /* CONFIG_HYPERV */
diff --git a/arch/x86/include/asm/sev-internal.h b/arch/x86/include/asm/sev-internal.h
index 9da509e52e11..d259bcec220a 100644
--- a/arch/x86/include/asm/sev-internal.h
+++ b/arch/x86/include/asm/sev-internal.h
@@ -96,7 +96,7 @@ int svsm_perform_call_protocol(struct svsm_call *call);
 
 static inline u64 sev_es_rd_ghcb_msr(void)
 {
-	return __rdmsr(MSR_AMD64_SEV_ES_GHCB);
+	return native_rdmsrq(MSR_AMD64_SEV_ES_GHCB);
 }
 
 static __always_inline void sev_es_wr_ghcb_msr(u64 val)
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index de1a25217053..10da3da5b81f 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -164,7 +164,7 @@ static void ppin_init(struct cpuinfo_x86 *c)
 
 	/* Is the enable bit set? */
 	if (val & 2UL) {
-		c->ppin = __rdmsr(info->msr_ppin);
+		c->ppin = native_rdmsrq(info->msr_ppin);
 		set_cpu_cap(c, info->feature);
 		return;
 	}
diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
index 1ae75ec7ac95..32286bad75e6 100644
--- a/arch/x86/kernel/cpu/mce/core.c
+++ b/arch/x86/kernel/cpu/mce/core.c
@@ -121,7 +121,7 @@ void mce_prep_record_common(struct mce *m)
 {
 	m->cpuid	= cpuid_eax(1);
 	m->cpuvendor	= boot_cpu_data.x86_vendor;
-	m->mcgcap	= __rdmsr(MSR_IA32_MCG_CAP);
+	m->mcgcap	= native_rdmsrq(MSR_IA32_MCG_CAP);
 	/* need the internal __ version to avoid deadlocks */
 	m->time		= __ktime_get_real_seconds();
 }
@@ -1298,7 +1298,7 @@ static noinstr bool mce_check_crashing_cpu(void)
 	    (crashing_cpu != -1 && crashing_cpu != cpu)) {
 		u64 mcgstatus;
 
-		mcgstatus = __rdmsr(MSR_IA32_MCG_STATUS);
+		mcgstatus = native_rdmsrq(MSR_IA32_MCG_STATUS);
 
 		if (boot_cpu_data.x86_vendor == X86_VENDOR_ZHAOXIN) {
 			if (mcgstatus & MCG_STATUS_LMCES)
diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
index 9ab033d6856a..185317c6b509 100644
--- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
+++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
@@ -482,7 +482,7 @@ int resctrl_arch_pseudo_lock_fn(void *_plr)
 	 * the buffer and evict pseudo-locked memory read earlier from the
 	 * cache.
 	 */
-	saved_msr = __rdmsr(MSR_MISC_FEATURE_CONTROL);
+	saved_msr = native_rdmsrq(MSR_MISC_FEATURE_CONTROL);
 	native_wrmsrq(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits);
 	closid_p = this_cpu_read(pqr_state.cur_closid);
 	rmid_p = this_cpu_read(pqr_state.cur_rmid);
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index 1547bfacd40f..e73c1d5ba6c4 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -380,7 +380,7 @@ static __always_inline void vmx_disable_fb_clear(struct vcpu_vmx *vmx)
 	if (!vmx->disable_fb_clear)
 		return;
 
-	msr = __rdmsr(MSR_IA32_MCU_OPT_CTRL);
+	msr = native_rdmsrq(MSR_IA32_MCU_OPT_CTRL);
 	msr |= FB_CLEAR_DIS;
 	native_wrmsrq(MSR_IA32_MCU_OPT_CTRL, msr);
 	/* Cache the MSR value to avoid reading it later */
@@ -7307,7 +7307,7 @@ void noinstr vmx_spec_ctrl_restore_host(struct vcpu_vmx *vmx,
 		return;
 
 	if (flags & VMX_RUN_SAVE_SPEC_CTRL)
-		vmx->spec_ctrl = __rdmsr(MSR_IA32_SPEC_CTRL);
+		vmx->spec_ctrl = native_rdmsrq(MSR_IA32_SPEC_CTRL);
 
 	/*
 	 * If the guest/host SPEC_CTRL values differ, restore the host value.
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
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        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
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        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com
Subject: [RFC PATCH v2 16/34] x86/msr: Change function type of native_read_msr_safe()
Date: Tue, 22 Apr 2025 01:21:57 -0700
Message-ID: <20250422082216.1954310-17-xin@zytor.com>
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Change function type of native_read_msr_safe() to

    int native_read_msr_safe(u32 msr, u64 *val)

to make it the same as the type of native_write_msr_safe().

Signed-off-by: Xin Li (Intel) 
---
 arch/x86/include/asm/msr.h            | 21 +++++++++++----------
 arch/x86/include/asm/paravirt_types.h |  4 ++--
 arch/x86/kvm/svm/svm.c                | 19 +++++++------------
 arch/x86/xen/enlighten_pv.c           |  9 ++++++---
 arch/x86/xen/pmu.c                    | 14 ++++++++------
 5 files changed, 34 insertions(+), 33 deletions(-)

diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index dd1114053173..c955339be9c9 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -135,18 +135,22 @@ static inline u64 native_read_msr(u32 msr)
 	return val;
 }
 
-static inline u64 native_read_msr_safe(u32 msr, int *err)
+static inline int native_read_msr_safe(u32 msr, u64 *p)
 {
+	int err;
 	DECLARE_ARGS(val, low, high);
 
 	asm volatile("1: rdmsr ; xor %[err],%[err]\n"
 		     "2:\n\t"
 		     _ASM_EXTABLE_TYPE_REG(1b, 2b, EX_TYPE_RDMSR_SAFE, %[err])
-		     : [err] "=r" (*err), EAX_EDX_RET(val, low, high)
+		     : [err] "=r" (err), EAX_EDX_RET(val, low, high)
 		     : "c" (msr));
 	if (tracepoint_enabled(read_msr))
-		do_trace_read_msr(msr, EAX_EDX_VAL(val, low, high), *err);
-	return EAX_EDX_VAL(val, low, high);
+		do_trace_read_msr(msr, EAX_EDX_VAL(val, low, high), err);
+
+	*p = EAX_EDX_VAL(val, low, high);
+
+	return err;
 }
 
 /* Can be uninlined because referenced by paravirt */
@@ -242,8 +246,8 @@ static inline int wrmsrq_safe(u32 msr, u64 val)
 /* rdmsr with exception handling */
 #define rdmsr_safe(msr, low, high)				\
 ({								\
-	int __err;						\
-	u64 __val = native_read_msr_safe((msr), &__err);	\
+	u64 __val;						\
+	int __err = native_read_msr_safe((msr), &__val);	\
 	(*low) = (u32)__val;					\
 	(*high) = (u32)(__val >> 32);				\
 	__err;							\
@@ -251,10 +255,7 @@ static inline int wrmsrq_safe(u32 msr, u64 val)
 
 static inline int rdmsrq_safe(u32 msr, u64 *p)
 {
-	int err;
-
-	*p = native_read_msr_safe(msr, &err);
-	return err;
+	return native_read_msr_safe(msr, p);
 }
 #endif	/* !CONFIG_PARAVIRT_XXL */
 
diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/paravirt_types.h
index 91b3423d36ce..d2db38c32bc5 100644
--- a/arch/x86/include/asm/paravirt_types.h
+++ b/arch/x86/include/asm/paravirt_types.h
@@ -96,9 +96,9 @@ struct pv_cpu_ops {
 
 	/*
 	 * Safe MSR operations.
-	 * read sets err to 0 or -EIO.  write returns 0 or -EIO.
+	 * Returns 0 or -EIO.
 	 */
-	u64 (*read_msr_safe)(unsigned int msr, int *err);
+	int (*read_msr_safe)(unsigned int msr, u64 *val);
 	int (*write_msr_safe)(u32 msr, u64 val);
 
 	void (*start_context_switch)(struct task_struct *prev);
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index 4ef9978dce70..838606f784c9 100644
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -475,15 +475,13 @@ static void svm_inject_exception(struct kvm_vcpu *vcpu)
 
 static void svm_init_erratum_383(void)
 {
-	int err;
 	u64 val;
 
 	if (!static_cpu_has_bug(X86_BUG_AMD_TLB_MMATCH))
 		return;
 
 	/* Use _safe variants to not break nested virtualization */
-	val = native_read_msr_safe(MSR_AMD64_DC_CFG, &err);
-	if (err)
+	if (native_read_msr_safe(MSR_AMD64_DC_CFG, &val))
 		return;
 
 	val |= (1ULL << 47);
@@ -648,13 +646,12 @@ static int svm_enable_virtualization_cpu(void)
 	 * erratum is present everywhere).
 	 */
 	if (cpu_has(&boot_cpu_data, X86_FEATURE_OSVW)) {
-		uint64_t len, status = 0;
+		u64 len, status = 0;
 		int err;
 
-		len = native_read_msr_safe(MSR_AMD64_OSVW_ID_LENGTH, &err);
+		err = native_read_msr_safe(MSR_AMD64_OSVW_ID_LENGTH, &len);
 		if (!err)
-			status = native_read_msr_safe(MSR_AMD64_OSVW_STATUS,
-						      &err);
+			err = native_read_msr_safe(MSR_AMD64_OSVW_STATUS, &status);
 
 		if (err)
 			osvw_status = osvw_len = 0;
@@ -2145,14 +2142,13 @@ static int ac_interception(struct kvm_vcpu *vcpu)
 
 static bool is_erratum_383(void)
 {
-	int err, i;
+	int i;
 	u64 value;
 
 	if (!erratum_383_found)
 		return false;
 
-	value = native_read_msr_safe(MSR_IA32_MC0_STATUS, &err);
-	if (err)
+	if (native_read_msr_safe(MSR_IA32_MC0_STATUS, &value))
 		return false;
 
 	/* Bit 62 may or may not be set for this mce */
@@ -2165,8 +2161,7 @@ static bool is_erratum_383(void)
 	for (i = 0; i < 6; ++i)
 		native_write_msr_safe(MSR_IA32_MCx_STATUS(i), 0);
 
-	value = native_read_msr_safe(MSR_IA32_MCG_STATUS, &err);
-	if (!err) {
+	if (!native_read_msr_safe(MSR_IA32_MCG_STATUS, &value)) {
 		value &= ~(1ULL << 2);
 		native_write_msr_safe(MSR_IA32_MCG_STATUS, value);
 	}
diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c
index 052f68c92111..195e6501a000 100644
--- a/arch/x86/xen/enlighten_pv.c
+++ b/arch/x86/xen/enlighten_pv.c
@@ -1095,7 +1095,7 @@ static u64 xen_do_read_msr(unsigned int msr, int *err)
 		return val;
 
 	if (err)
-		val = native_read_msr_safe(msr, err);
+		*err = native_read_msr_safe(msr, &val);
 	else
 		val = native_read_msr(msr);
 
@@ -1162,9 +1162,12 @@ static void xen_do_write_msr(u32 msr, u64 val, int *err)
 	}
 }
 
-static u64 xen_read_msr_safe(unsigned int msr, int *err)
+static int xen_read_msr_safe(unsigned int msr, u64 *val)
 {
-	return xen_do_read_msr(msr, err);
+	int err;
+
+	*val = xen_do_read_msr(msr, &err);
+	return err;
 }
 
 static int xen_write_msr_safe(u32 msr, u64 val)
diff --git a/arch/x86/xen/pmu.c b/arch/x86/xen/pmu.c
index afb02f43ee3f..ee908dfcff48 100644
--- a/arch/x86/xen/pmu.c
+++ b/arch/x86/xen/pmu.c
@@ -319,11 +319,12 @@ static u64 xen_amd_read_pmc(int counter)
 	uint8_t xenpmu_flags = get_xenpmu_flags();
 
 	if (!xenpmu_data || !(xenpmu_flags & XENPMU_IRQ_PROCESSING)) {
-		uint32_t msr;
-		int err;
+		u32 msr;
+		u64 val;
 
 		msr = amd_counters_base + (counter * amd_msr_step);
-		return native_read_msr_safe(msr, &err);
+		native_read_msr_safe(msr, &val);
+		return val;
 	}
 
 	ctxt = &xenpmu_data->pmu.c.amd;
@@ -340,15 +341,16 @@ static u64 xen_intel_read_pmc(int counter)
 	uint8_t xenpmu_flags = get_xenpmu_flags();
 
 	if (!xenpmu_data || !(xenpmu_flags & XENPMU_IRQ_PROCESSING)) {
-		uint32_t msr;
-		int err;
+		u32 msr;
+		u64 val;
 
 		if (counter & (1 << INTEL_PMC_TYPE_SHIFT))
 			msr = MSR_CORE_PERF_FIXED_CTR0 + (counter & 0xffff);
 		else
 			msr = MSR_IA32_PERFCTR0 + counter;
 
-		return native_read_msr_safe(msr, &err);
+		native_read_msr_safe(msr, &val);
+		return val;
 	}
 
 	ctxt = &xenpmu_data->pmu.c.intel;
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
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        haiyangz@microsoft.com, decui@microsoft.com
Subject: [RFC PATCH v2 11/34] x86/msr: Remove calling native_{read,write}_msr{,_safe}() in pmu_msr_{read,write}()
Date: Tue, 22 Apr 2025 01:21:52 -0700
Message-ID: <20250422082216.1954310-12-xin@zytor.com>
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hpa found that pmu_msr_write() is actually a completely pointless
function [1]: all it does is shuffle some arguments, then calls
pmu_msr_chk_emulated() and if it returns true AND the emulated flag
is clear then does *exactly the same thing* that the calling code
would have done if pmu_msr_write() itself had returned true.  And
pmu_msr_read() does the equivalent stupidity.

Remove the calls to native_{read,write}_msr{,_safe}() within
pmu_msr_{read,write}().  Instead reuse the existing calling code
that decides whether to call native_{read,write}_msr{,_safe}() based
on the return value from pmu_msr_{read,write}().  Consequently,
eliminate the need to pass an error pointer to pmu_msr_{read,write}().

While at it, refactor pmu_msr_write() to take the MSR value as a u64
argument, replacing the current dual u32 arguments, because the dual
u32 arguments were only used to call native_write_msr{,_safe}(), which
has now been removed.

[1]: https://lore.kernel.org/lkml/0ec48b84-d158-47c6-b14c-3563fd14bcc4@zytor.com/

Suggested-by: H. Peter Anvin (Intel) 
Sign-off-by: Xin Li (Intel) 
---
 arch/x86/xen/enlighten_pv.c |  6 +++++-
 arch/x86/xen/pmu.c          | 27 ++++-----------------------
 arch/x86/xen/xen-ops.h      |  4 ++--
 3 files changed, 11 insertions(+), 26 deletions(-)

diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c
index 9fbe187aff00..1418758b57ff 100644
--- a/arch/x86/xen/enlighten_pv.c
+++ b/arch/x86/xen/enlighten_pv.c
@@ -1132,6 +1132,8 @@ static void set_seg(unsigned int which, unsigned int low, unsigned int high,
 static void xen_do_write_msr(unsigned int msr, unsigned int low,
 			     unsigned int high, int *err)
 {
+	u64 val;
+
 	switch (msr) {
 	case MSR_FS_BASE:
 		set_seg(SEGBASE_FS, low, high, err);
@@ -1158,7 +1160,9 @@ static void xen_do_write_msr(unsigned int msr, unsigned int low,
 		break;
 
 	default:
-		if (!pmu_msr_write(msr, low, high, err)) {
+		val = (u64)high << 32 | low;
+
+		if (!pmu_msr_write(msr, val)) {
 			if (err)
 				*err = native_write_msr_safe(msr, low, high);
 			else
diff --git a/arch/x86/xen/pmu.c b/arch/x86/xen/pmu.c
index 9c1682af620a..95caae97a394 100644
--- a/arch/x86/xen/pmu.c
+++ b/arch/x86/xen/pmu.c
@@ -313,37 +313,18 @@ static bool pmu_msr_chk_emulated(unsigned int msr, uint64_t *val, bool is_read,
 	return true;
 }
 
-bool pmu_msr_read(unsigned int msr, uint64_t *val, int *err)
+bool pmu_msr_read(u32 msr, u64 *val)
 {
 	bool emulated;
 
-	if (!pmu_msr_chk_emulated(msr, val, true, &emulated))
-		return false;
-
-	if (!emulated) {
-		*val = err ? native_read_msr_safe(msr, err)
-			   : native_read_msr(msr);
-	}
-
-	return true;
+	return pmu_msr_chk_emulated(msr, val, true, &emulated) && emulated;
 }
 
-bool pmu_msr_write(unsigned int msr, uint32_t low, uint32_t high, int *err)
+bool pmu_msr_write(u32 msr, u64 val)
 {
-	uint64_t val = ((uint64_t)high << 32) | low;
 	bool emulated;
 
-	if (!pmu_msr_chk_emulated(msr, &val, false, &emulated))
-		return false;
-
-	if (!emulated) {
-		if (err)
-			*err = native_write_msr_safe(msr, low, high);
-		else
-			native_write_msr(msr, low, high);
-	}
-
-	return true;
+	return pmu_msr_chk_emulated(msr, &val, false, &emulated) && emulated;
 }
 
 static u64 xen_amd_read_pmc(int counter)
diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h
index dc886c3cc24d..a1875e10be31 100644
--- a/arch/x86/xen/xen-ops.h
+++ b/arch/x86/xen/xen-ops.h
@@ -271,8 +271,8 @@ void xen_pmu_finish(int cpu);
 static inline void xen_pmu_init(int cpu) {}
 static inline void xen_pmu_finish(int cpu) {}
 #endif
-bool pmu_msr_read(unsigned int msr, uint64_t *val, int *err);
-bool pmu_msr_write(unsigned int msr, uint32_t low, uint32_t high, int *err);
+bool pmu_msr_read(u32 msr, u64 *val);
+bool pmu_msr_write(u32 msr, u64 val);
 int pmu_apic_update(uint32_t reg);
 u64 xen_read_pmc(int counter);
 
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
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Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
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        haiyangz@microsoft.com, decui@microsoft.com
Subject: [RFC PATCH v2 23/34] x86/extable: Remove new dead code in ex_handler_msr()
Date: Tue, 22 Apr 2025 01:22:04 -0700
Message-ID: <20250422082216.1954310-24-xin@zytor.com>
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The MSR read APIs no longer expect RAX or EDX:EAX to be cleared upon
returning from #GP caused by MSR read instructions.

The MSR safe APIs no longer assume -EIO being returned in a register
from #GP caused by MSR instructions.

Remove new dead code due to above changes.

Signed-off-by: Xin Li (Intel) 
---
 arch/x86/mm/extable.c | 21 +++++----------------
 1 file changed, 5 insertions(+), 16 deletions(-)

diff --git a/arch/x86/mm/extable.c b/arch/x86/mm/extable.c
index 6bf4c2a43c2c..ea3fe7f32772 100644
--- a/arch/x86/mm/extable.c
+++ b/arch/x86/mm/extable.c
@@ -165,7 +165,7 @@ static bool ex_handler_uaccess(const struct exception_table_entry *fixup,
 }
 
 static bool ex_handler_msr(const struct exception_table_entry *fixup,
-			   struct pt_regs *regs, bool wrmsr, bool safe, int reg)
+			   struct pt_regs *regs, bool wrmsr, bool safe)
 {
 	bool imm_insn = is_msr_imm_insn((void *)regs->ip);
 	u32 msr;
@@ -207,17 +207,6 @@ static bool ex_handler_msr(const struct exception_table_entry *fixup,
 		show_stack_regs(regs);
 	}
 
-	if (!wrmsr) {
-		/* Pretend that the read succeeded and returned 0. */
-		regs->ax = 0;
-
-		if (!imm_insn)
-			regs->dx = 0;
-	}
-
-	if (safe)
-		*pt_regs_nr(regs, reg) = -EIO;
-
 	return ex_handler_default(fixup, regs);
 }
 
@@ -395,13 +384,13 @@ int fixup_exception(struct pt_regs *regs, int trapnr, unsigned long error_code,
 		case EX_TYPE_BPF:
 			return ex_handler_bpf(e, regs);
 		case EX_TYPE_WRMSR:
-			return ex_handler_msr(e, regs, true, false, reg);
+			return ex_handler_msr(e, regs, true, false);
 		case EX_TYPE_RDMSR:
-			return ex_handler_msr(e, regs, false, false, reg);
+			return ex_handler_msr(e, regs, false, false);
 		case EX_TYPE_WRMSR_SAFE:
-			return ex_handler_msr(e, regs, true, true, reg);
+			return ex_handler_msr(e, regs, true, true);
 		case EX_TYPE_RDMSR_SAFE:
-			return ex_handler_msr(e, regs, false, true, reg);
+			return ex_handler_msr(e, regs, false, true);
 		case EX_TYPE_WRMSR_IN_MCE:
 			ex_handler_msr_mce(regs, true);
 			break;
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
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        haiyangz@microsoft.com, decui@microsoft.com
Subject: [RFC PATCH v2 15/34] x86/msr: Replace wrmsr(msr, low, 0) with wrmsrq(msr, low)
Date: Tue, 22 Apr 2025 01:21:56 -0700
Message-ID: <20250422082216.1954310-16-xin@zytor.com>
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Signed-off-by: Xin Li (Intel) 
---
 arch/x86/hyperv/hv_apic.c                 | 6 +++---
 arch/x86/include/asm/apic.h               | 2 +-
 arch/x86/include/asm/switch_to.h          | 2 +-
 arch/x86/kernel/cpu/amd.c                 | 2 +-
 arch/x86/kernel/cpu/common.c              | 8 ++++----
 arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 4 ++--
 arch/x86/kernel/cpu/resctrl/rdtgroup.c    | 2 +-
 arch/x86/kernel/cpu/umwait.c              | 4 ++--
 arch/x86/kernel/kvm.c                     | 2 +-
 9 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/arch/x86/hyperv/hv_apic.c b/arch/x86/hyperv/hv_apic.c
index c450e67cb0a4..4d617ee59377 100644
--- a/arch/x86/hyperv/hv_apic.c
+++ b/arch/x86/hyperv/hv_apic.c
@@ -75,10 +75,10 @@ static void hv_apic_write(u32 reg, u32 val)
 {
 	switch (reg) {
 	case APIC_EOI:
-		wrmsr(HV_X64_MSR_EOI, val, 0);
+		wrmsrq(HV_X64_MSR_EOI, val);
 		break;
 	case APIC_TASKPRI:
-		wrmsr(HV_X64_MSR_TPR, val, 0);
+		wrmsrq(HV_X64_MSR_TPR, val);
 		break;
 	default:
 		native_apic_mem_write(reg, val);
@@ -92,7 +92,7 @@ static void hv_apic_eoi_write(void)
 	if (hvp && (xchg(&hvp->apic_assist, 0) & 0x1))
 		return;
 
-	wrmsr(HV_X64_MSR_EOI, APIC_EOI_ACK, 0);
+	wrmsrq(HV_X64_MSR_EOI, APIC_EOI_ACK);
 }
 
 static bool cpu_is_self(int cpu)
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index 0174dd548327..68e10e30fe9b 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -209,7 +209,7 @@ static inline void native_apic_msr_write(u32 reg, u32 v)
 	    reg == APIC_LVR)
 		return;
 
-	wrmsr(APIC_BASE_MSR + (reg >> 4), v, 0);
+	wrmsrq(APIC_BASE_MSR + (reg >> 4), v);
 }
 
 static inline void native_apic_msr_eoi(void)
diff --git a/arch/x86/include/asm/switch_to.h b/arch/x86/include/asm/switch_to.h
index 4f21df7af715..499b1c15cc8b 100644
--- a/arch/x86/include/asm/switch_to.h
+++ b/arch/x86/include/asm/switch_to.h
@@ -61,7 +61,7 @@ static inline void refresh_sysenter_cs(struct thread_struct *thread)
 		return;
 
 	this_cpu_write(cpu_tss_rw.x86_tss.ss1, thread->sysenter_cs);
-	wrmsr(MSR_IA32_SYSENTER_CS, thread->sysenter_cs, 0);
+	wrmsrq(MSR_IA32_SYSENTER_CS, thread->sysenter_cs);
 }
 #endif
 
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 1f7925e45b46..6132a3c529cc 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -1206,7 +1206,7 @@ void amd_set_dr_addr_mask(unsigned long mask, unsigned int dr)
 	if (per_cpu(amd_dr_addr_mask, cpu)[dr] == mask)
 		return;
 
-	wrmsr(amd_msr_dr_addr_masks[dr], mask, 0);
+	wrmsrq(amd_msr_dr_addr_masks[dr], mask);
 	per_cpu(amd_dr_addr_mask, cpu)[dr] = mask;
 }
 
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 10da3da5b81f..99d8a8c15ba5 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -2019,9 +2019,9 @@ void enable_sep_cpu(void)
 	 */
 
 	tss->x86_tss.ss1 = __KERNEL_CS;
-	wrmsr(MSR_IA32_SYSENTER_CS, tss->x86_tss.ss1, 0);
-	wrmsr(MSR_IA32_SYSENTER_ESP, (unsigned long)(cpu_entry_stack(cpu) + 1), 0);
-	wrmsr(MSR_IA32_SYSENTER_EIP, (unsigned long)entry_SYSENTER_32, 0);
+	wrmsrq(MSR_IA32_SYSENTER_CS, tss->x86_tss.ss1);
+	wrmsrq(MSR_IA32_SYSENTER_ESP, (unsigned long)(cpu_entry_stack(cpu) + 1));
+	wrmsrq(MSR_IA32_SYSENTER_EIP, (unsigned long)entry_SYSENTER_32);
 
 	put_cpu();
 }
@@ -2235,7 +2235,7 @@ static inline void setup_getcpu(int cpu)
 	struct desc_struct d = { };
 
 	if (boot_cpu_has(X86_FEATURE_RDTSCP) || boot_cpu_has(X86_FEATURE_RDPID))
-		wrmsr(MSR_TSC_AUX, cpudata, 0);
+		wrmsrq(MSR_TSC_AUX, cpudata);
 
 	/* Store CPU and node number in limit. */
 	d.limit0 = cpudata;
diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
index 185317c6b509..cc534a83f19d 100644
--- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
+++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
@@ -905,7 +905,7 @@ int resctrl_arch_measure_cycles_lat_fn(void *_plr)
 	 * Disable hardware prefetchers.
 	 */
 	rdmsr(MSR_MISC_FEATURE_CONTROL, saved_low, saved_high);
-	wrmsr(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits, 0x0);
+	wrmsrq(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits);
 	mem_r = READ_ONCE(plr->kmem);
 	/*
 	 * Dummy execute of the time measurement to load the needed
@@ -1001,7 +1001,7 @@ static int measure_residency_fn(struct perf_event_attr *miss_attr,
 	 * Disable hardware prefetchers.
 	 */
 	rdmsr(MSR_MISC_FEATURE_CONTROL, saved_low, saved_high);
-	wrmsr(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits, 0x0);
+	wrmsrq(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits);
 
 	/* Initialize rest of local variables */
 	/*
diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c
index f4a2ee2a6404..73ed83f1dff8 100644
--- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c
+++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c
@@ -1707,7 +1707,7 @@ void resctrl_arch_mon_event_config_write(void *_config_info)
 		pr_warn_once("Invalid event id %d\n", config_info->evtid);
 		return;
 	}
-	wrmsr(MSR_IA32_EVT_CFG_BASE + index, config_info->mon_config, 0);
+	wrmsrq(MSR_IA32_EVT_CFG_BASE + index, config_info->mon_config);
 }
 
 static void mbm_config_write_domain(struct rdt_resource *r,
diff --git a/arch/x86/kernel/cpu/umwait.c b/arch/x86/kernel/cpu/umwait.c
index 0050eae153bb..933fcd7ff250 100644
--- a/arch/x86/kernel/cpu/umwait.c
+++ b/arch/x86/kernel/cpu/umwait.c
@@ -33,7 +33,7 @@ static DEFINE_MUTEX(umwait_lock);
 static void umwait_update_control_msr(void * unused)
 {
 	lockdep_assert_irqs_disabled();
-	wrmsr(MSR_IA32_UMWAIT_CONTROL, READ_ONCE(umwait_control_cached), 0);
+	wrmsrq(MSR_IA32_UMWAIT_CONTROL, READ_ONCE(umwait_control_cached));
 }
 
 /*
@@ -71,7 +71,7 @@ static int umwait_cpu_offline(unsigned int cpu)
 	 * the original control MSR value in umwait_init(). So there
 	 * is no race condition here.
 	 */
-	wrmsr(MSR_IA32_UMWAIT_CONTROL, orig_umwait_control_cached, 0);
+	wrmsrq(MSR_IA32_UMWAIT_CONTROL, orig_umwait_control_cached);
 
 	return 0;
 }
diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c
index 44a45df7200a..bc9d21d7395f 100644
--- a/arch/x86/kernel/kvm.c
+++ b/arch/x86/kernel/kvm.c
@@ -399,7 +399,7 @@ static void kvm_disable_steal_time(void)
 	if (!has_steal_clock)
 		return;
 
-	wrmsr(MSR_KVM_STEAL_TIME, 0, 0);
+	wrmsrq(MSR_KVM_STEAL_TIME, 0);
 }
 
 static u64 kvm_steal_clock(int cpu)
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
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        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
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        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com
Subject: [RFC PATCH v2 22/34] x86/msr: Utilize the alternatives mechanism to read MSR
Date: Tue, 22 Apr 2025 01:22:03 -0700
Message-ID: <20250422082216.1954310-23-xin@zytor.com>
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In-Reply-To: <20250422082216.1954310-1-xin@zytor.com>
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To eliminate the indirect call overhead introduced by the pv_ops API,
utilize the alternatives mechanism to read MSR:

    1) When built with !CONFIG_XEN_PV, X86_FEATURE_XENPV becomes a
       disabled feature, preventing the Xen code from being built
       and ensuring the native code is executed unconditionally.

    2) When built with CONFIG_XEN_PV:

       2.1) If not running on the Xen hypervisor (!X86_FEATURE_XENPV),
            the kernel runtime binary is patched to unconditionally
            jump to the native MSR read code.

       2.2) If running on the Xen hypervisor (X86_FEATURE_XENPV), the
            kernel runtime binary is patched to unconditionally jump
            to the Xen MSR read code.

The alternatives mechanism is also used to choose the new immediate
form MSR read instruction when it's available.

Consequently, remove the pv_ops MSR read APIs and the Xen callbacks.

Suggested-by: H. Peter Anvin (Intel) 
Signed-off-by: Xin Li (Intel) 
---
 arch/x86/include/asm/msr.h            | 277 +++++++++++++++++++-------
 arch/x86/include/asm/paravirt.h       |  40 ----
 arch/x86/include/asm/paravirt_types.h |   9 -
 arch/x86/kernel/paravirt.c            |   2 -
 arch/x86/xen/enlighten_pv.c           |  48 ++---
 arch/x86/xen/xen-asm.S                |  49 +++++
 arch/x86/xen/xen-ops.h                |   7 +
 7 files changed, 279 insertions(+), 153 deletions(-)

diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index bd3bdb3c3d23..5271cb002b23 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -75,6 +75,7 @@ static inline void do_trace_rdpmc(u32 msr, u64 val, int failed) {}
 #endif
 
 #ifdef CONFIG_XEN_PV
+extern void asm_xen_read_msr(void);
 extern void asm_xen_write_msr(void);
 extern u64 xen_read_pmc(int counter);
 #endif
@@ -88,6 +89,8 @@ extern u64 xen_read_pmc(int counter);
 
 /* The GNU Assembler (Gas) with Binutils 2.41 adds the .insn directive support */
 #if defined(CONFIG_AS_IS_GNU) && CONFIG_AS_VERSION >= 24100
+#define ASM_RDMSR_IMM			\
+	" .insn VEX.128.F2.M7.W0 0xf6 /0, %[msr]%{:u32}, %[val]\n\t"
 #define ASM_WRMSRNS_IMM			\
 	" .insn VEX.128.F3.M7.W0 0xf6 /0, %[val], %[msr]%{:u32}\n\t"
 #else
@@ -97,10 +100,17 @@ extern u64 xen_read_pmc(int counter);
  * The register operand is encoded as %rax because all uses of the immediate
  * form MSR access instructions reference %rax as the register operand.
  */
+#define ASM_RDMSR_IMM			\
+	" .byte 0xc4,0xe7,0x7b,0xf6,0xc0; .long %c[msr]"
 #define ASM_WRMSRNS_IMM			\
 	" .byte 0xc4,0xe7,0x7a,0xf6,0xc0; .long %c[msr]"
 #endif
 
+#define RDMSR_AND_SAVE_RESULT		\
+	"rdmsr\n\t"			\
+	"shl $0x20, %%rdx\n\t"		\
+	"or %%rdx, %%rax\n\t"
+
 #define PREPARE_RDX_FOR_WRMSR		\
 	"mov %%rax, %%rdx\n\t"		\
 	"shr $0x20, %%rdx\n\t"
@@ -127,35 +137,135 @@ static __always_inline bool is_msr_imm_insn(void *ip)
 #endif
 }
 
-static __always_inline u64 __rdmsr(u32 msr)
+/*
+ * There are two sets of APIs for MSR accesses: native APIs and generic APIs.
+ * Native MSR APIs execute MSR instructions directly, regardless of whether the
+ * CPU is paravirtualized or native.  Generic MSR APIs determine the appropriate
+ * MSR access method at runtime, allowing them to be used generically on both
+ * paravirtualized and native CPUs.
+ *
+ * When the compiler can determine the MSR number at compile time, the APIs
+ * with the suffix _constant() are used to enable the immediate form MSR
+ * instructions when available.  The APIs with the suffix _variable() are
+ * used when the MSR number is not known until run time.
+ *
+ * Below is a diagram illustrating the derivation of the MSR read APIs:
+ *
+ *      __native_rdmsrq_variable()    __native_rdmsrq_constant()
+ *                         \           /
+ *                          \         /
+ *                         __native_rdmsrq()   -----------------------
+ *                            /     \                                |
+ *                           /       \                               |
+ *               native_rdmsrq()    native_read_msr_safe()           |
+ *                   /    \                                          |
+ *                  /      \                                         |
+ *      native_rdmsr()    native_read_msr()                          |
+ *                                                                   |
+ *                                                                   |
+ *                                                                   |
+ *                    __xenpv_rdmsrq()                               |
+ *                         |                                         |
+ *                         |                                         |
+ *                      __rdmsrq()   <--------------------------------
+ *                       /    \
+ *                      /      \
+ *                 rdmsrq()   rdmsrq_safe()
+ *                    /          \
+ *                   /            \
+ *                rdmsr()        rdmsr_safe()
+ */
+
+static __always_inline bool __native_rdmsrq_variable(u32 msr, u64 *val, int type)
 {
-	DECLARE_ARGS(val, low, high);
+#ifdef CONFIG_X86_64
+	BUILD_BUG_ON(__builtin_constant_p(msr));
 
-	asm volatile("1: rdmsr\n"
-		     "2:\n"
-		     _ASM_EXTABLE_TYPE(1b, 2b, EX_TYPE_RDMSR)
-		     : EAX_EDX_RET(val, low, high) : "c" (msr));
+	asm_inline volatile goto(
+		"1:\n"
+		RDMSR_AND_SAVE_RESULT
+		_ASM_EXTABLE_TYPE(1b, %l[badmsr], %c[type])	/* For RDMSR */
 
-	return EAX_EDX_VAL(val, low, high);
+		: [val] "=a" (*val)
+		: "c" (msr), [type] "i" (type)
+		: "rdx"
+		: badmsr);
+#else
+	asm_inline volatile goto(
+		"1: rdmsr\n\t"
+		_ASM_EXTABLE_TYPE(1b, %l[badmsr], %c[type])	/* For RDMSR */
+
+		: "=A" (*val)
+		: "c" (msr), [type] "i" (type)
+		:
+		: badmsr);
+#endif
+
+	return false;
+
+badmsr:
+	*val = 0;
+
+	return true;
 }
 
-#define native_rdmsr(msr, val1, val2)			\
-do {							\
-	u64 __val = __rdmsr((msr));			\
-	(void)((val1) = (u32)__val);			\
-	(void)((val2) = (u32)(__val >> 32));		\
-} while (0)
+#ifdef CONFIG_X86_64
+static __always_inline bool __native_rdmsrq_constant(u32 msr, u64 *val, int type)
+{
+	BUILD_BUG_ON(!__builtin_constant_p(msr));
+
+	asm_inline volatile goto(
+		"1:\n"
+		ALTERNATIVE("mov %[msr], %%ecx\n\t"
+			    "2:\n"
+			    RDMSR_AND_SAVE_RESULT,
+			    ASM_RDMSR_IMM,
+			    X86_FEATURE_MSR_IMM)
+		_ASM_EXTABLE_TYPE(1b, %l[badmsr], %c[type])	/* For RDMSR immediate */
+		_ASM_EXTABLE_TYPE(2b, %l[badmsr], %c[type])	/* For RDMSR */
+
+		: [val] "=a" (*val)
+		: [msr] "i" (msr), [type] "i" (type)
+		: "ecx", "rdx"
+		: badmsr);
+
+	return false;
+
+badmsr:
+	*val = 0;
+
+	return true;
+}
+#endif
+
+static __always_inline bool __native_rdmsrq(u32 msr, u64 *val, int type)
+{
+#ifdef CONFIG_X86_64
+	if (__builtin_constant_p(msr))
+		return __native_rdmsrq_constant(msr, val, type);
+#endif
+
+	return __native_rdmsrq_variable(msr, val, type);
+}
 
 static __always_inline u64 native_rdmsrq(u32 msr)
 {
-	return __rdmsr(msr);
+	u64 val = 0;
+
+	__native_rdmsrq(msr, &val, EX_TYPE_RDMSR);
+	return val;
 }
 
+#define native_rdmsr(msr, low, high)			\
+do {							\
+	u64 __val = native_rdmsrq(msr);			\
+	(void)((low) = (u32)__val);			\
+	(void)((high) = (u32)(__val >> 32));		\
+} while (0)
+
 static inline u64 native_read_msr(u32 msr)
 {
-	u64 val;
-
-	val = __rdmsr(msr);
+	u64 val = native_rdmsrq(msr);
 
 	if (tracepoint_enabled(read_msr))
 		do_trace_read_msr(msr, val, 0);
@@ -163,36 +273,91 @@ static inline u64 native_read_msr(u32 msr)
 	return val;
 }
 
-static inline int native_read_msr_safe(u32 msr, u64 *p)
+static inline int native_read_msr_safe(u32 msr, u64 *val)
 {
 	int err;
-	DECLARE_ARGS(val, low, high);
 
-	asm volatile("1: rdmsr ; xor %[err],%[err]\n"
-		     "2:\n\t"
-		     _ASM_EXTABLE_TYPE_REG(1b, 2b, EX_TYPE_RDMSR_SAFE, %[err])
-		     : [err] "=r" (err), EAX_EDX_RET(val, low, high)
-		     : "c" (msr));
-	if (tracepoint_enabled(read_msr))
-		do_trace_read_msr(msr, EAX_EDX_VAL(val, low, high), err);
+	err = __native_rdmsrq(msr, val, EX_TYPE_RDMSR_SAFE) ? -EIO : 0;
 
-	*p = EAX_EDX_VAL(val, low, high);
+	if (tracepoint_enabled(read_msr))
+		do_trace_read_msr(msr, *val, err);
 
 	return err;
 }
 
+#ifdef CONFIG_XEN_PV
+/* No plan to support immediate form MSR instructions in Xen */
+static __always_inline bool __xenpv_rdmsrq(u32 msr, u64 *val, int type)
+{
+	asm_inline volatile goto(
+		"1: call asm_xen_read_msr\n\t"
+		_ASM_EXTABLE_TYPE(1b, %l[badmsr], %c[type])	/* For CALL */
+
+		: [val] "=a" (*val), ASM_CALL_CONSTRAINT
+		: "c" (msr), [type] "i" (type)
+		: "rdx"
+		: badmsr);
+
+	return false;
+
+badmsr:
+	*val = 0;
+
+	return true;
+}
+#endif
+
+static __always_inline bool __rdmsrq(u32 msr, u64 *val, int type)
+{
+	bool ret;
+
+#ifdef CONFIG_XEN_PV
+	if (cpu_feature_enabled(X86_FEATURE_XENPV))
+		return __xenpv_rdmsrq(msr, val, type);
+#endif
+
+	/*
+	 * 1) When built with !CONFIG_XEN_PV.
+	 * 2) When built with CONFIG_XEN_PV but not running on Xen hypervisor.
+	 */
+	ret = __native_rdmsrq(msr, val, type);
+
+	if (tracepoint_enabled(read_msr))
+		do_trace_read_msr(msr, *val, ret ? -EIO : 0);
+
+	return ret;
+}
+
+#define rdmsrq(msr, val)				\
+do {							\
+	u64 ___val = 0;					\
+	__rdmsrq((msr), &___val, EX_TYPE_RDMSR);	\
+	(val) = ___val;					\
+} while (0)
+
+#define rdmsr(msr, low, high)				\
+do {							\
+	u64 __val = 0;					\
+	rdmsrq((msr), __val);				\
+	(void)((low) = (u32)__val);			\
+	(void)((high) = (u32)(__val >> 32));		\
+} while (0)
+
+static __always_inline int rdmsrq_safe(u32 msr, u64 *val)
+{
+	return __rdmsrq(msr, val, EX_TYPE_RDMSR_SAFE) ? -EIO : 0;
+}
+
+#define rdmsr_safe(msr, low, high)			\
+({							\
+	u64 __val = 0;					\
+	int __err = rdmsrq_safe((msr), &__val);		\
+	(*low) = (u32)__val;				\
+	(*high) = (u32)(__val >> 32);			\
+	__err;						\
+})
+
 /*
- * There are two sets of APIs for MSR accesses: native APIs and generic APIs.
- * Native MSR APIs execute MSR instructions directly, regardless of whether the
- * CPU is paravirtualized or native.  Generic MSR APIs determine the appropriate
- * MSR access method at runtime, allowing them to be used generically on both
- * paravirtualized and native CPUs.
- *
- * When the compiler can determine the MSR number at compile time, the APIs
- * with the suffix _constant() are used to enable the immediate form MSR
- * instructions when available.  The APIs with the suffix _variable() are
- * used when the MSR number is not known until run time.
- *
  * Below is a diagram illustrating the derivation of the MSR write APIs:
  *
  *      __native_wrmsrq_variable()    __native_wrmsrq_constant()
@@ -420,42 +585,6 @@ static __always_inline u64 rdpmcq(int counter)
 	return native_rdpmcq(counter);
 }
 
-#ifdef CONFIG_PARAVIRT_XXL
-#include 
-#else
-#include 
-/*
- * Access to machine-specific registers (available on 586 and better only)
- * Note: the rd* operations modify the parameters directly (without using
- * pointer indirection), this allows gcc to optimize better
- */
-
-#define rdmsr(msr, low, high)					\
-do {								\
-	u64 __val = native_read_msr((msr));			\
-	(void)((low) = (u32)__val);				\
-	(void)((high) = (u32)(__val >> 32));			\
-} while (0)
-
-#define rdmsrq(msr, val)			\
-	((val) = native_read_msr((msr)))
-
-/* rdmsr with exception handling */
-#define rdmsr_safe(msr, low, high)				\
-({								\
-	u64 __val;						\
-	int __err = native_read_msr_safe((msr), &__val);	\
-	(*low) = (u32)__val;					\
-	(*high) = (u32)(__val >> 32);				\
-	__err;							\
-})
-
-static inline int rdmsrq_safe(u32 msr, u64 *p)
-{
-	return native_read_msr_safe(msr, p);
-}
-#endif	/* !CONFIG_PARAVIRT_XXL */
-
 struct msr __percpu *msrs_alloc(void);
 void msrs_free(struct msr __percpu *msrs);
 int msr_set_bit(u32 msr, u8 bit);
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index 6634f6cf801f..e248a77b719f 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -175,46 +175,6 @@ static inline void __write_cr4(unsigned long x)
 	PVOP_VCALL1(cpu.write_cr4, x);
 }
 
-static inline u64 paravirt_read_msr(unsigned msr)
-{
-	return PVOP_CALL1(u64, cpu.read_msr, msr);
-}
-
-static inline u64 paravirt_read_msr_safe(unsigned msr, int *err)
-{
-	return PVOP_CALL2(u64, cpu.read_msr_safe, msr, err);
-}
-
-#define rdmsr(msr, val1, val2)			\
-do {						\
-	u64 _l = paravirt_read_msr(msr);	\
-	val1 = (u32)_l;				\
-	val2 = _l >> 32;			\
-} while (0)
-
-#define rdmsrq(msr, val)			\
-do {						\
-	val = paravirt_read_msr(msr);		\
-} while (0)
-
-/* rdmsr with exception handling */
-#define rdmsr_safe(msr, a, b)				\
-({							\
-	int _err;					\
-	u64 _l = paravirt_read_msr_safe(msr, &_err);	\
-	(*a) = (u32)_l;					\
-	(*b) = _l >> 32;				\
-	_err;						\
-})
-
-static inline int rdmsrq_safe(unsigned msr, u64 *p)
-{
-	int err;
-
-	*p = paravirt_read_msr_safe(msr, &err);
-	return err;
-}
-
 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
 {
 	PVOP_VCALL2(cpu.alloc_ldt, ldt, entries);
diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/paravirt_types.h
index 18bb0e5bd22f..ae31ecf08933 100644
--- a/arch/x86/include/asm/paravirt_types.h
+++ b/arch/x86/include/asm/paravirt_types.h
@@ -90,15 +90,6 @@ struct pv_cpu_ops {
 	void (*cpuid)(unsigned int *eax, unsigned int *ebx,
 		      unsigned int *ecx, unsigned int *edx);
 
-	/* Unsafe MSR operations.  These will warn or panic on failure. */
-	u64 (*read_msr)(unsigned int msr);
-
-	/*
-	 * Safe MSR operations.
-	 * Returns 0 or -EIO.
-	 */
-	int (*read_msr_safe)(unsigned int msr, u64 *val);
-
 	void (*start_context_switch)(struct task_struct *prev);
 	void (*end_context_switch)(struct task_struct *next);
 #endif
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
index 62bf66f61821..9f5eb8a78040 100644
--- a/arch/x86/kernel/paravirt.c
+++ b/arch/x86/kernel/paravirt.c
@@ -128,8 +128,6 @@ struct paravirt_patch_template pv_ops = {
 	.cpu.read_cr0		= native_read_cr0,
 	.cpu.write_cr0		= native_write_cr0,
 	.cpu.write_cr4		= native_write_cr4,
-	.cpu.read_msr		= native_read_msr,
-	.cpu.read_msr_safe	= native_read_msr_safe,
 	.cpu.load_tr_desc	= native_load_tr_desc,
 	.cpu.set_ldt		= native_set_ldt,
 	.cpu.load_gdt		= native_load_gdt,
diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c
index 4672de7fc084..267e241b9236 100644
--- a/arch/x86/xen/enlighten_pv.c
+++ b/arch/x86/xen/enlighten_pv.c
@@ -1086,19 +1086,26 @@ static void xen_write_cr4(unsigned long cr4)
 	native_write_cr4(cr4);
 }
 
-static u64 xen_do_read_msr(unsigned int msr, int *err)
+/*
+ * Return true in xen_rdmsr_ret_type to indicate the requested MSR read has
+ * been done successfully.
+ */
+struct xen_rdmsr_ret_type xen_read_msr(u32 msr)
 {
-	u64 val = 0;	/* Avoid uninitialized value for safe variant. */
-	bool emulated;
+	struct xen_rdmsr_ret_type ret;
 
-	if (pmu_msr_chk_emulated(msr, &val, true, &emulated) && emulated)
-		return val;
+	ret.done = true;
 
-	if (err)
-		*err = native_read_msr_safe(msr, &val);
-	else
-		val = native_read_msr(msr);
+	if (pmu_msr_chk_emulated(msr, &ret.val, true, &ret.done) && ret.done)
+		return ret;
+
+	ret.val = 0;
+	ret.done = false;
+	return ret;
+}
 
+u64 xen_read_msr_fixup(u32 msr, u64 val)
+{
 	switch (msr) {
 	case MSR_IA32_APICBASE:
 		val &= ~X2APIC_ENABLE;
@@ -1107,7 +1114,11 @@ static u64 xen_do_read_msr(unsigned int msr, int *err)
 		else
 			val &= ~MSR_IA32_APICBASE_BSP;
 		break;
+
+	default:
+		break;
 	}
+
 	return val;
 }
 
@@ -1159,21 +1170,6 @@ bool xen_write_msr(u32 msr, u64 val)
 	}
 }
 
-static int xen_read_msr_safe(unsigned int msr, u64 *val)
-{
-	int err;
-
-	*val = xen_do_read_msr(msr, &err);
-	return err;
-}
-
-static u64 xen_read_msr(unsigned int msr)
-{
-	int err;
-
-	return xen_do_read_msr(msr, xen_msr_safe ? &err : NULL);
-}
-
 /* This is called once we have the cpu_possible_mask */
 void __init xen_setup_vcpu_info_placement(void)
 {
@@ -1208,10 +1204,6 @@ static const typeof(pv_ops) xen_cpu_ops __initconst = {
 
 		.write_cr4 = xen_write_cr4,
 
-		.read_msr = xen_read_msr,
-
-		.read_msr_safe = xen_read_msr_safe,
-
 		.load_tr_desc = paravirt_nop,
 		.set_ldt = xen_set_ldt,
 		.load_gdt = xen_load_gdt,
diff --git a/arch/x86/xen/xen-asm.S b/arch/x86/xen/xen-asm.S
index eecce47fbe49..62270ef85c56 100644
--- a/arch/x86/xen/xen-asm.S
+++ b/arch/x86/xen/xen-asm.S
@@ -406,3 +406,52 @@ SYM_CODE_END(xen_entry_SYSCALL_compat)
 	RET
 SYM_FUNC_END(asm_xen_write_msr)
 EXPORT_SYMBOL_GPL(asm_xen_write_msr)
+
+/*
+ * MSR number in %ecx, MSR value will be returned in %rax.
+ *
+ * The prototype of the Xen C code:
+ * 	struct { u64 val, bool done } xen_read_msr(u32 msr)
+ */
+SYM_FUNC_START(asm_xen_read_msr)
+	ENDBR
+	FRAME_BEGIN
+	XEN_SAVE_CALLEE_REGS_FOR_MSR
+	mov %ecx, %edi		/* MSR number */
+	call xen_read_msr
+	test %dl, %dl		/* %dl=1, i.e., ZF=0, meaning successfully done */
+	XEN_RESTORE_CALLEE_REGS_FOR_MSR
+	jnz 2f
+
+	/*
+	 * Falls through to the native RDMSR instruction if xen_read_msr() failed,
+	 * i.e., the MSR access should be executed natively, which will trigger a
+	 * #GP fault...
+	 */
+1:	rdmsr
+
+	/*
+	 * Note, #GP on RDMSR is reflected to the caller of this function through
+	 * EX_TYPE_FUNC_REWIND, which enforces a coupling between the caller and
+	 * callee, IOW the callee is able to calculate the address of the CALL
+	 * instruction in the caller that invoked it.
+	 *
+	 * The top of the stack points directly at the return address;
+	 * back up by 5 bytes (length of the CALL instruction in the caller) from
+	 * the return address.
+	 */
+	_ASM_EXTABLE_FUNC_REWIND(1b, -5, FRAME_OFFSET / (BITS_PER_LONG / 8))
+
+	shl $0x20, %rdx
+	or %rdx, %rax
+
+	XEN_SAVE_CALLEE_REGS_FOR_MSR
+	mov %ecx, %edi
+	mov %rax, %rsi
+	call xen_read_msr_fixup
+	XEN_RESTORE_CALLEE_REGS_FOR_MSR
+
+2:	FRAME_END
+	RET
+SYM_FUNC_END(asm_xen_read_msr)
+EXPORT_SYMBOL_GPL(asm_xen_read_msr)
diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h
index 56712242262a..483526ec13c6 100644
--- a/arch/x86/xen/xen-ops.h
+++ b/arch/x86/xen/xen-ops.h
@@ -146,7 +146,14 @@ __visible unsigned long xen_read_cr2_direct(void);
 /* These are not functions, and cannot be called normally */
 __visible void xen_iret(void);
 
+struct xen_rdmsr_ret_type {
+	u64 val;
+	bool done;
+};
+
 extern bool xen_write_msr(u32 msr, u64 val);
+extern struct xen_rdmsr_ret_type xen_read_msr(u32 msr);
+extern u64 xen_read_msr_fixup(u32 msr, u64 val);
 
 extern int xen_panic_handler_init(void);
 
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
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Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
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        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com
Subject: [RFC PATCH v2 17/34] x86/cpufeatures: Add a CPU feature bit for MSR immediate form instructions
Date: Tue, 22 Apr 2025 01:21:58 -0700
Message-ID: <20250422082216.1954310-18-xin@zytor.com>
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The immediate form of MSR access instructions are primarily motivated
by performance, not code size: by having the MSR number in an immediate,
it is available *much* earlier in the pipeline, which allows the
hardware much more leeway about how a particular MSR is handled.

Use a scattered CPU feature bit for MSR immediate form instructions.

Suggested-by: Borislav Petkov (AMD) 
Signed-off-by: Xin Li (Intel) 
---
 arch/x86/include/asm/cpufeatures.h | 1 +
 arch/x86/kernel/cpu/scattered.c    | 1 +
 2 files changed, 2 insertions(+)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 7642310276a8..1dc6dc794018 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -482,6 +482,7 @@
 #define X86_FEATURE_AMD_WORKLOAD_CLASS	(21*32+ 7) /* Workload Classification */
 #define X86_FEATURE_PREFER_YMM		(21*32+ 8) /* Avoid ZMM registers due to downclocking */
 #define X86_FEATURE_APX			(21*32+ 9) /* Advanced Performance Extensions */
+#define X86_FEATURE_MSR_IMM		(21*32+10) /* MSR immediate form instructions */
 
 /*
  * BUG word(s)
diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
index dbf6d71bdf18..c63ddbf35a71 100644
--- a/arch/x86/kernel/cpu/scattered.c
+++ b/arch/x86/kernel/cpu/scattered.c
@@ -27,6 +27,7 @@ static const struct cpuid_bit cpuid_bits[] = {
 	{ X86_FEATURE_APERFMPERF,		CPUID_ECX,  0, 0x00000006, 0 },
 	{ X86_FEATURE_EPB,			CPUID_ECX,  3, 0x00000006, 0 },
 	{ X86_FEATURE_INTEL_PPIN,		CPUID_EBX,  0, 0x00000007, 1 },
+	{ X86_FEATURE_MSR_IMM,			CPUID_ECX,  5, 0x00000007, 1 },
 	{ X86_FEATURE_APX,			CPUID_EDX, 21, 0x00000007, 1 },
 	{ X86_FEATURE_RRSBA_CTRL,		CPUID_EDX,  2, 0x00000007, 2 },
 	{ X86_FEATURE_BHI_CTRL,			CPUID_EDX,  4, 0x00000007, 2 },
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
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Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
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        haiyangz@microsoft.com, decui@microsoft.com
Subject: [RFC PATCH v2 07/34] x86/msr: Convert __wrmsr() uses to native_wrmsr{,q}() uses
Date: Tue, 22 Apr 2025 01:21:48 -0700
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__wrmsr() is the lowest level primitive MSR write API, and its direct
use is NOT preferred.  Use its wrapper function native_wrmsrq() instead.

No functional change intended.

This change also prepares for using the alternatives mechanism to access
MSRs: uses of native_wrmsr{,q}() don't need to change, but the approaches
how they perform MSR operations are binary patched during boot time upon
availability of MSR instructions.

Signed-off-by: Xin Li (Intel) 
---

Change in v2:
* Use native_wrmsr() where natural [rmid_p, closid_p] high/lo parameters
  can be used, without the shift-uglification (Ingo).
---
 arch/x86/events/amd/brs.c                 | 2 +-
 arch/x86/include/asm/apic.h               | 2 +-
 arch/x86/include/asm/msr.h                | 6 ++++--
 arch/x86/kernel/cpu/mce/core.c            | 2 +-
 arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 6 +++---
 5 files changed, 10 insertions(+), 8 deletions(-)

diff --git a/arch/x86/events/amd/brs.c b/arch/x86/events/amd/brs.c
index ec4e8a4cace4..3f5ecfd80d1e 100644
--- a/arch/x86/events/amd/brs.c
+++ b/arch/x86/events/amd/brs.c
@@ -44,7 +44,7 @@ static inline unsigned int brs_to(int idx)
 static __always_inline void set_debug_extn_cfg(u64 val)
 {
 	/* bits[4:3] must always be set to 11b */
-	__wrmsr(MSR_AMD_DBG_EXTN_CFG, val | 3ULL << 3, val >> 32);
+	native_wrmsrq(MSR_AMD_DBG_EXTN_CFG, val | 3ULL << 3);
 }
 
 static __always_inline u64 get_debug_extn_cfg(void)
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index 1c136f54651c..0174dd548327 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -214,7 +214,7 @@ static inline void native_apic_msr_write(u32 reg, u32 v)
 
 static inline void native_apic_msr_eoi(void)
 {
-	__wrmsr(APIC_BASE_MSR + (APIC_EOI >> 4), APIC_EOI_ACK, 0);
+	native_wrmsrq(APIC_BASE_MSR + (APIC_EOI >> 4), APIC_EOI_ACK);
 }
 
 static inline u32 native_apic_msr_read(u32 reg)
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 33cf506e2fd6..b50cbd3299b3 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -149,10 +149,12 @@ static inline u64 native_read_msr_safe(u32 msr, int *err)
 static inline void notrace
 native_write_msr(u32 msr, u32 low, u32 high)
 {
-	__wrmsr(msr, low, high);
+	u64 val = (u64)high << 32 | low;
+
+	native_wrmsrq(msr, val);
 
 	if (tracepoint_enabled(write_msr))
-		do_trace_write_msr(msr, ((u64)high << 32 | low), 0);
+		do_trace_write_msr(msr, val, 0);
 }
 
 /* Can be uninlined because referenced by paravirt */
diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
index 255927f0284e..1ae75ec7ac95 100644
--- a/arch/x86/kernel/cpu/mce/core.c
+++ b/arch/x86/kernel/cpu/mce/core.c
@@ -1306,7 +1306,7 @@ static noinstr bool mce_check_crashing_cpu(void)
 		}
 
 		if (mcgstatus & MCG_STATUS_RIPV) {
-			__wrmsr(MSR_IA32_MCG_STATUS, 0, 0);
+			native_wrmsrq(MSR_IA32_MCG_STATUS, 0);
 			return true;
 		}
 	}
diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
index 276ffab194f6..9ab033d6856a 100644
--- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
+++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
@@ -483,7 +483,7 @@ int resctrl_arch_pseudo_lock_fn(void *_plr)
 	 * cache.
 	 */
 	saved_msr = __rdmsr(MSR_MISC_FEATURE_CONTROL);
-	__wrmsr(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits, 0x0);
+	native_wrmsrq(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits);
 	closid_p = this_cpu_read(pqr_state.cur_closid);
 	rmid_p = this_cpu_read(pqr_state.cur_rmid);
 	mem_r = plr->kmem;
@@ -495,7 +495,7 @@ int resctrl_arch_pseudo_lock_fn(void *_plr)
 	 * pseudo-locked followed by reading of kernel memory to load it
 	 * into the cache.
 	 */
-	__wrmsr(MSR_IA32_PQR_ASSOC, rmid_p, plr->closid);
+	native_wrmsr(MSR_IA32_PQR_ASSOC, rmid_p, plr->closid);
 
 	/*
 	 * Cache was flushed earlier. Now access kernel memory to read it
@@ -532,7 +532,7 @@ int resctrl_arch_pseudo_lock_fn(void *_plr)
 	 * Critical section end: restore closid with capacity bitmask that
 	 * does not overlap with pseudo-locked region.
 	 */
-	__wrmsr(MSR_IA32_PQR_ASSOC, rmid_p, closid_p);
+	native_wrmsr(MSR_IA32_PQR_ASSOC, rmid_p, closid_p);
 
 	/* Re-enable the hardware prefetcher(s) */
 	wrmsrq(MSR_MISC_FEATURE_CONTROL, saved_msr);
-- 
2.49.0



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Date: Tue, 22 Apr 2025 10:26:37 +0200
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Subject: Re: [PATCH] x86/intel: workaround several MONITOR/MWAIT errata
To: Roger Pau Monne 
Cc: Andrew Cooper , xen-devel@lists.xenproject.org
References: <20250417161913.14661-1-roger.pau@citrix.com>
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On 17.04.2025 18:19, Roger Pau Monne wrote:
> --- a/xen/arch/x86/acpi/cpu_idle.c
> +++ b/xen/arch/x86/acpi/cpu_idle.c
> @@ -441,8 +441,14 @@ void cpuidle_wakeup_mwait(cpumask_t *mask)
>      cpumask_andnot(mask, mask, &target);
>  }
>  
> +/* Force sending of a wakeup IPI regardless of mwait usage. */
> +bool force_mwait_ipi_wakeup __read_mostly;

Nit: Annotation between type and identifier, please.

> @@ -380,6 +380,43 @@ static void probe_c3_errata(const struct cpuinfo_x86 *c)
>      }
>  }
>  
> +/*
> + * APL30: One use of the MONITOR/MWAIT instruction pair is to allow a logical
> + * processor to wait in a sleep state until a store to the armed address range
> + * occurs. Due to this erratum, stores to the armed address range may not
> + * trigger MWAIT to resume execution.
> + *
> + * ICX143: Under complex microarchitectural conditions, a monitor that is armed
> + * with the MWAIT instruction may not be triggered, leading to a processor
> + * hang.
> + *
> + * LNL030: Problem P-cores may not exit power state Core C6 on monitor hit.

I didn't manage to spot all three spec updates; none of these have a ucode fix,
hence permitting the workaround to be avoided?

Since CPX is 3rd Gen Xeon Scalable just like ICX is, I'm surprised that one's
unaffected. The most recent spec update there is a year old than ICX'es, so
may simply be too old to include the erratum?

Sunny Cove is used by further Icelake models - they're known to be unaffected?

> + * Force the sending of an IPI in those cases.
> + */
> +static void probe_mwait_errata(void)
> +{
> +    static const struct x86_cpu_id models[] = {
> +        /* Apollo Lake */
> +        INTEL_FAM6_MODEL(0x5C),
> +        /* Ice Lake */
> +        INTEL_FAM6_MODEL(0x6A),
> +        INTEL_FAM6_MODEL(0x6C),
> +        /* Lunar Lake */
> +        INTEL_FAM6_MODEL(0xBD),

Use identifiers from intel-family.h here?

> +        { }
> +    };
> +#undef INTEL_FAM6_MODEL
> +
> +    if ( boot_cpu_has(X86_FEATURE_MONITOR) && !force_mwait_ipi_wakeup &&
> +         x86_match_cpu(models) )
> +    {
> +        printk(XENLOG_WARNING
> +               "Forcing IPI MWAIT wakeup due to CPU erratum\n");
> +        force_mwait_ipi_wakeup = true;
> +    }
> +}

Do we really need to cater for asymmetric systems? IOW can't we do this once
on the BSP? Otherwise - why the use of boot_cpu_has() here? Oh, wait ...

> @@ -406,6 +443,8 @@ static void Intel_errata_workarounds(struct cpuinfo_x86 *c)
>  		__set_bit(X86_FEATURE_CLFLUSH_MONITOR, c->x86_capability);
>  
>  	probe_c3_errata(c);
> +	if (c == &boot_cpu_data)
> +		probe_mwait_errata();
>  }

..., you do this for the BSP only. Then why's the function not __init and
the global variable not __ro_after_init (and models[] __initconst)?

(Later) Except that this path is also taken for S3 resume, from
recheck_cpu_features(). This shouldn't alter the variable value anymore,
though. A disagreement ought to result in recheck_cpu_features() to
report failure. (Imo perhaps better to avoid the call above during resume.)

Jan


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        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
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        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com
Subject: [RFC PATCH v2 33/34] x86/msr: Move the ARGS macros after the MSR read/write APIs
Date: Tue, 22 Apr 2025 01:22:14 -0700
Message-ID: <20250422082216.1954310-34-xin@zytor.com>
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Since the ARGS macros are no longer used in the MSR read/write API
implementation, move them after their definitions.

Signed-off-by: Xin Li (Intel) 
---
 arch/x86/include/asm/msr.h | 38 +++++++++++++++++++++-----------------
 1 file changed, 21 insertions(+), 17 deletions(-)

diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index b4447ba4d6c2..be593a15a838 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -38,23 +38,6 @@ struct saved_msrs {
 	struct saved_msr *array;
 };
 
-/*
- * both i386 and x86_64 returns 64-bit value in edx:eax, but gcc's "A"
- * constraint has different meanings. For i386, "A" means exactly
- * edx:eax, while for x86_64 it doesn't mean rdx:rax or edx:eax. Instead,
- * it means rax *or* rdx.
- */
-#ifdef CONFIG_X86_64
-/* Using 64-bit values saves one instruction clearing the high half of low */
-#define DECLARE_ARGS(val, low, high)	unsigned long low, high
-#define EAX_EDX_VAL(val, low, high)	((low) | (high) << 32)
-#define EAX_EDX_RET(val, low, high)	"=a" (low), "=d" (high)
-#else
-#define DECLARE_ARGS(val, low, high)	u64 val
-#define EAX_EDX_VAL(val, low, high)	(val)
-#define EAX_EDX_RET(val, low, high)	"=A" (val)
-#endif
-
 /*
  * Be very careful with includes. This header is prone to include loops.
  */
@@ -559,6 +542,23 @@ static __always_inline int wrmsr_safe(u32 msr, u32 low, u32 high)
 extern int rdmsr_safe_regs(u32 regs[8]);
 extern int wrmsr_safe_regs(u32 regs[8]);
 
+/*
+ * both i386 and x86_64 returns 64-bit value in edx:eax, but gcc's "A"
+ * constraint has different meanings. For i386, "A" means exactly
+ * edx:eax, while for x86_64 it doesn't mean rdx:rax or edx:eax. Instead,
+ * it means rax *or* rdx.
+ */
+#ifdef CONFIG_X86_64
+/* Using 64-bit values saves one instruction clearing the high half of low */
+#define DECLARE_ARGS(val, low, high)	unsigned long low, high
+#define EAX_EDX_VAL(val, low, high)	((low) | (high) << 32)
+#define EAX_EDX_RET(val, low, high)	"=a" (low), "=d" (high)
+#else
+#define DECLARE_ARGS(val, low, high)	u64 val
+#define EAX_EDX_VAL(val, low, high)	(val)
+#define EAX_EDX_RET(val, low, high)	"=A" (val)
+#endif
+
 static __always_inline u64 native_rdpmcq(int counter)
 {
 	DECLARE_ARGS(val, low, high);
@@ -571,6 +571,10 @@ static __always_inline u64 native_rdpmcq(int counter)
 	return EAX_EDX_VAL(val, low, high);
 }
 
+#undef DECLARE_ARGS
+#undef EAX_EDX_VAL
+#undef EAX_EDX_RET
+
 static __always_inline u64 rdpmcq(int counter)
 {
 #ifdef CONFIG_XEN_PV
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
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        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
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        haiyangz@microsoft.com, decui@microsoft.com
Subject: [RFC PATCH v2 32/34] x86/msr: Rename native_read_msr_safe() to native_rdmsrq_safe()
Date: Tue, 22 Apr 2025 01:22:13 -0700
Message-ID: <20250422082216.1954310-33-xin@zytor.com>
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Signed-off-by: Xin Li (Intel) 
---
 arch/x86/include/asm/msr.h |  4 ++--
 arch/x86/kvm/svm/svm.c     | 10 +++++-----
 arch/x86/xen/pmu.c         |  4 ++--
 3 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 4c7aa9e7fbac..b4447ba4d6c2 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -157,7 +157,7 @@ static __always_inline bool is_msr_imm_insn(void *ip)
  *                         __native_rdmsrq()   -----------------------
  *                            /     \                                |
  *                           /       \                               |
- *        native_rdmsrq_no_trace()    native_read_msr_safe()         |
+ *        native_rdmsrq_no_trace()    native_rdmsrq_safe()           |
  *                   /      \                                        |
  *                  /        \                                       |
  * native_rdmsr_no_trace()    native_rdmsrq()                        |
@@ -273,7 +273,7 @@ static inline u64 native_rdmsrq(u32 msr)
 	return val;
 }
 
-static inline int native_read_msr_safe(u32 msr, u64 *val)
+static inline int native_rdmsrq_safe(u32 msr, u64 *val)
 {
 	int err;
 
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index 01dd3cd20730..251fd9366b35 100644
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -481,7 +481,7 @@ static void svm_init_erratum_383(void)
 		return;
 
 	/* Use _safe variants to not break nested virtualization */
-	if (native_read_msr_safe(MSR_AMD64_DC_CFG, &val))
+	if (native_rdmsrq_safe(MSR_AMD64_DC_CFG, &val))
 		return;
 
 	val |= (1ULL << 47);
@@ -649,9 +649,9 @@ static int svm_enable_virtualization_cpu(void)
 		u64 len, status = 0;
 		int err;
 
-		err = native_read_msr_safe(MSR_AMD64_OSVW_ID_LENGTH, &len);
+		err = native_rdmsrq_safe(MSR_AMD64_OSVW_ID_LENGTH, &len);
 		if (!err)
-			err = native_read_msr_safe(MSR_AMD64_OSVW_STATUS, &status);
+			err = native_rdmsrq_safe(MSR_AMD64_OSVW_STATUS, &status);
 
 		if (err)
 			osvw_status = osvw_len = 0;
@@ -2148,7 +2148,7 @@ static bool is_erratum_383(void)
 	if (!erratum_383_found)
 		return false;
 
-	if (native_read_msr_safe(MSR_IA32_MC0_STATUS, &value))
+	if (native_rdmsrq_safe(MSR_IA32_MC0_STATUS, &value))
 		return false;
 
 	/* Bit 62 may or may not be set for this mce */
@@ -2161,7 +2161,7 @@ static bool is_erratum_383(void)
 	for (i = 0; i < 6; ++i)
 		native_wrmsrq_safe(MSR_IA32_MCx_STATUS(i), 0);
 
-	if (!native_read_msr_safe(MSR_IA32_MCG_STATUS, &value)) {
+	if (!native_rdmsrq_safe(MSR_IA32_MCG_STATUS, &value)) {
 		value &= ~(1ULL << 2);
 		native_wrmsrq_safe(MSR_IA32_MCG_STATUS, value);
 	}
diff --git a/arch/x86/xen/pmu.c b/arch/x86/xen/pmu.c
index ee908dfcff48..66d2c6fc7bfa 100644
--- a/arch/x86/xen/pmu.c
+++ b/arch/x86/xen/pmu.c
@@ -323,7 +323,7 @@ static u64 xen_amd_read_pmc(int counter)
 		u64 val;
 
 		msr = amd_counters_base + (counter * amd_msr_step);
-		native_read_msr_safe(msr, &val);
+		native_rdmsrq_safe(msr, &val);
 		return val;
 	}
 
@@ -349,7 +349,7 @@ static u64 xen_intel_read_pmc(int counter)
 		else
 			msr = MSR_IA32_PERFCTR0 + counter;
 
-		native_read_msr_safe(msr, &val);
+		native_rdmsrq_safe(msr, &val);
 		return val;
 	}
 
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
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        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com
Subject: [RFC PATCH v2 21/34] x86/msr: Utilize the alternatives mechanism to write MSR
Date: Tue, 22 Apr 2025 01:22:02 -0700
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The story started from tglx's reply in [1]:

  For actual performance relevant code the current PV ops mechanics
  are a horrorshow when the op defaults to the native instruction.

  look at wrmsrl():

  wrmsrl(msr, val
   wrmsr(msr, (u32)val, (u32)val >> 32))
    paravirt_write_msr(msr, low, high)
      PVOP_VCALL3(cpu.write_msr, msr, low, high)

  Which results in

	mov	$msr, %edi
	mov	$val, %rdx
	mov	%edx, %esi
	shr	$0x20, %rdx
	call	native_write_msr

  and native_write_msr() does at minimum:

	mov    %edi,%ecx
	mov    %esi,%eax
	wrmsr
	ret

  In the worst case 'ret' is going through the return thunk. Not to
  talk about function prologues and whatever.

  This becomes even more silly for trivial instructions like STI/CLI
  or in the worst case paravirt_nop().

  The call makes only sense, when the native default is an actual
  function, but for the trivial cases it's a blatant engineering
  trainwreck.

Later a consensus was reached to utilize the alternatives mechanism to
eliminate the indirect call overhead introduced by the pv_ops APIs:

    1) When built with !CONFIG_XEN_PV, X86_FEATURE_XENPV becomes a
       disabled feature, preventing the Xen code from being built
       and ensuring the native code is executed unconditionally.

    2) When built with CONFIG_XEN_PV:

       2.1) If not running on the Xen hypervisor (!X86_FEATURE_XENPV),
            the kernel runtime binary is patched to unconditionally
            jump to the native MSR write code.

       2.2) If running on the Xen hypervisor (X86_FEATURE_XENPV), the
            kernel runtime binary is patched to unconditionally jump
            to the Xen MSR write code.

The alternatives mechanism is also used to choose the new immediate
form MSR write instruction when it's available.

Consequently, remove the pv_ops MSR write APIs and the Xen callbacks.

[1]: https://lore.kernel.org/lkml/87y1h81ht4.ffs@tglx/

Originally-by: H. Peter Anvin (Intel) 
Signed-off-by: Xin Li (Intel) 
---
 arch/x86/include/asm/fred.h           |   2 +-
 arch/x86/include/asm/msr.h            | 294 ++++++++++++++++++++------
 arch/x86/include/asm/paravirt.h       |  25 ---
 arch/x86/include/asm/paravirt_types.h |   2 -
 arch/x86/kernel/paravirt.c            |   2 -
 arch/x86/xen/enlighten_pv.c           |  41 +---
 arch/x86/xen/xen-asm.S                |  64 ++++++
 arch/x86/xen/xen-ops.h                |   2 +
 8 files changed, 302 insertions(+), 130 deletions(-)

diff --git a/arch/x86/include/asm/fred.h b/arch/x86/include/asm/fred.h
index 12b34d5b2953..8ae4429e5401 100644
--- a/arch/x86/include/asm/fred.h
+++ b/arch/x86/include/asm/fred.h
@@ -101,7 +101,7 @@ static __always_inline void fred_update_rsp0(void)
 	unsigned long rsp0 = (unsigned long) task_stack_page(current) + THREAD_SIZE;
 
 	if (cpu_feature_enabled(X86_FEATURE_FRED) && (__this_cpu_read(fred_rsp0) != rsp0)) {
-		wrmsrns(MSR_IA32_FRED_RSP0, rsp0);
+		native_wrmsrq(MSR_IA32_FRED_RSP0, rsp0);
 		__this_cpu_write(fred_rsp0, rsp0);
 	}
 }
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 8f7a67b1c61c..bd3bdb3c3d23 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -75,9 +75,40 @@ static inline void do_trace_rdpmc(u32 msr, u64 val, int failed) {}
 #endif
 
 #ifdef CONFIG_XEN_PV
+extern void asm_xen_write_msr(void);
 extern u64 xen_read_pmc(int counter);
 #endif
 
+/* The GNU Assembler (Gas) with Binutils 2.40 adds WRMSRNS support */
+#if defined(CONFIG_AS_IS_GNU) && CONFIG_AS_VERSION >= 24000
+#define ASM_WRMSRNS		"wrmsrns"
+#else
+#define ASM_WRMSRNS		_ASM_BYTES(0x0f,0x01,0xc6)
+#endif
+
+/* The GNU Assembler (Gas) with Binutils 2.41 adds the .insn directive support */
+#if defined(CONFIG_AS_IS_GNU) && CONFIG_AS_VERSION >= 24100
+#define ASM_WRMSRNS_IMM			\
+	" .insn VEX.128.F3.M7.W0 0xf6 /0, %[val], %[msr]%{:u32}\n\t"
+#else
+/*
+ * Note, clang also doesn't support the .insn directive.
+ *
+ * The register operand is encoded as %rax because all uses of the immediate
+ * form MSR access instructions reference %rax as the register operand.
+ */
+#define ASM_WRMSRNS_IMM			\
+	" .byte 0xc4,0xe7,0x7a,0xf6,0xc0; .long %c[msr]"
+#endif
+
+#define PREPARE_RDX_FOR_WRMSR		\
+	"mov %%rax, %%rdx\n\t"		\
+	"shr $0x20, %%rdx\n\t"
+
+#define PREPARE_RCX_RDX_FOR_WRMSR	\
+	"mov %[msr], %%ecx\n\t"		\
+	PREPARE_RDX_FOR_WRMSR
+
 /*
  * Called only from an MSR fault handler, the instruction pointer points to
  * the MSR access instruction that caused the fault.
@@ -96,13 +127,6 @@ static __always_inline bool is_msr_imm_insn(void *ip)
 #endif
 }
 
-/*
- * __rdmsr() and __wrmsr() are the two primitives which are the bare minimum MSR
- * accessors and should not have any tracing or other functionality piggybacking
- * on them - those are *purely* for accessing MSRs and nothing more. So don't even
- * think of extending them - you will be slapped with a stinking trout or a frozen
- * shark will reach you, wherever you are! You've been warned.
- */
 static __always_inline u64 __rdmsr(u32 msr)
 {
 	DECLARE_ARGS(val, low, high);
@@ -115,14 +139,6 @@ static __always_inline u64 __rdmsr(u32 msr)
 	return EAX_EDX_VAL(val, low, high);
 }
 
-static __always_inline void __wrmsrq(u32 msr, u64 val)
-{
-	asm volatile("1: wrmsr\n"
-		     "2:\n"
-		     _ASM_EXTABLE_TYPE(1b, 2b, EX_TYPE_WRMSR)
-		     : : "c" (msr), "a" ((u32)val), "d" ((u32)(val >> 32)) : "memory");
-}
-
 #define native_rdmsr(msr, val1, val2)			\
 do {							\
 	u64 __val = __rdmsr((msr));			\
@@ -135,12 +151,6 @@ static __always_inline u64 native_rdmsrq(u32 msr)
 	return __rdmsr(msr);
 }
 
-#define native_wrmsr(msr, low, high)			\
-	__wrmsrq((msr), (u64)(high) << 32 | (low))
-
-#define native_wrmsrq(msr, val)				\
-	__wrmsrq((msr), (val))
-
 static inline u64 native_read_msr(u32 msr)
 {
 	u64 val;
@@ -171,7 +181,132 @@ static inline int native_read_msr_safe(u32 msr, u64 *p)
 	return err;
 }
 
-/* Can be uninlined because referenced by paravirt */
+/*
+ * There are two sets of APIs for MSR accesses: native APIs and generic APIs.
+ * Native MSR APIs execute MSR instructions directly, regardless of whether the
+ * CPU is paravirtualized or native.  Generic MSR APIs determine the appropriate
+ * MSR access method at runtime, allowing them to be used generically on both
+ * paravirtualized and native CPUs.
+ *
+ * When the compiler can determine the MSR number at compile time, the APIs
+ * with the suffix _constant() are used to enable the immediate form MSR
+ * instructions when available.  The APIs with the suffix _variable() are
+ * used when the MSR number is not known until run time.
+ *
+ * Below is a diagram illustrating the derivation of the MSR write APIs:
+ *
+ *      __native_wrmsrq_variable()    __native_wrmsrq_constant()
+ *                         \           /
+ *                          \         /
+ *                         __native_wrmsrq()   -----------------------
+ *                            /     \                                |
+ *                           /       \                               |
+ *               native_wrmsrq()    native_write_msr_safe()          |
+ *                   /    \                                          |
+ *                  /      \                                         |
+ *      native_wrmsr()    native_write_msr()                         |
+ *                                                                   |
+ *                                                                   |
+ *                                                                   |
+ *                   __xenpv_wrmsrq()                                |
+ *                         |                                         |
+ *                         |                                         |
+ *                      __wrmsrq()   <--------------------------------
+ *                       /    \
+ *                      /      \
+ *                 wrmsrq()   wrmsrq_safe()
+ *                    /          \
+ *                   /            \
+ *                wrmsr()        wrmsr_safe()
+ */
+
+/*
+ * Non-serializing WRMSR, when available.
+ *
+ * Otherwise, it falls back to a serializing WRMSR.
+ */
+static __always_inline bool __native_wrmsrq_variable(u32 msr, u64 val, int type)
+{
+#ifdef CONFIG_X86_64
+	BUILD_BUG_ON(__builtin_constant_p(msr));
+#endif
+
+	/*
+	 * WRMSR is 2 bytes.  WRMSRNS is 3 bytes.  Pad WRMSR with a redundant
+	 * DS prefix to avoid a trailing NOP.
+	 */
+	asm_inline volatile goto(
+		"1:\n"
+		ALTERNATIVE("ds wrmsr",
+			    ASM_WRMSRNS,
+			    X86_FEATURE_WRMSRNS)
+		_ASM_EXTABLE_TYPE(1b, %l[badmsr], %c[type])
+
+		:
+		: "c" (msr), "a" ((u32)val), "d" ((u32)(val >> 32)), [type] "i" (type)
+		: "memory"
+		: badmsr);
+
+	return false;
+
+badmsr:
+	return true;
+}
+
+#ifdef CONFIG_X86_64
+/*
+ * Non-serializing WRMSR or its immediate form, when available.
+ *
+ * Otherwise, it falls back to a serializing WRMSR.
+ */
+static __always_inline bool __native_wrmsrq_constant(u32 msr, u64 val, int type)
+{
+	BUILD_BUG_ON(!__builtin_constant_p(msr));
+
+	asm_inline volatile goto(
+		"1:\n"
+		ALTERNATIVE_2(PREPARE_RCX_RDX_FOR_WRMSR
+			      "2: ds wrmsr",
+			      PREPARE_RCX_RDX_FOR_WRMSR
+			      ASM_WRMSRNS,
+			      X86_FEATURE_WRMSRNS,
+			      ASM_WRMSRNS_IMM,
+			      X86_FEATURE_MSR_IMM)
+		_ASM_EXTABLE_TYPE(1b, %l[badmsr], %c[type])	/* For WRMSRNS immediate */
+		_ASM_EXTABLE_TYPE(2b, %l[badmsr], %c[type])	/* For WRMSR(NS) */
+
+		:
+		: [val] "a" (val), [msr] "i" (msr), [type] "i" (type)
+		: "memory", "ecx", "rdx"
+		: badmsr);
+
+	return false;
+
+badmsr:
+	return true;
+}
+#endif
+
+static __always_inline bool __native_wrmsrq(u32 msr, u64 val, int type)
+{
+#ifdef CONFIG_X86_64
+	if (__builtin_constant_p(msr))
+		return __native_wrmsrq_constant(msr, val, type);
+#endif
+
+	return __native_wrmsrq_variable(msr, val, type);
+}
+
+static __always_inline void native_wrmsrq(u32 msr, u64 val)
+{
+	__native_wrmsrq(msr, val, EX_TYPE_WRMSR);
+}
+
+static __always_inline void native_wrmsr(u32 msr, u32 low, u32 high)
+{
+	native_wrmsrq(msr, (u64)high << 32 | low);
+}
+
 static inline void notrace native_write_msr(u32 msr, u64 val)
 {
 	native_wrmsrq(msr, val);
@@ -180,22 +315,82 @@ static inline void notrace native_write_msr(u32 msr, u64 val)
 		do_trace_write_msr(msr, val, 0);
 }
 
-/* Can be uninlined because referenced by paravirt */
 static inline int notrace native_write_msr_safe(u32 msr, u64 val)
 {
-	int err;
+	int err = __native_wrmsrq(msr, val, EX_TYPE_WRMSR_SAFE) ? -EIO : 0;
 
-	asm volatile("1: wrmsr ; xor %[err],%[err]\n"
-		     "2:\n\t"
-		     _ASM_EXTABLE_TYPE_REG(1b, 2b, EX_TYPE_WRMSR_SAFE, %[err])
-		     : [err] "=a" (err)
-		     : "c" (msr), "0" ((u32)val), "d" ((u32)(val >> 32))
-		     : "memory");
 	if (tracepoint_enabled(write_msr))
 		do_trace_write_msr(msr, val, err);
+
 	return err;
 }
 
+#ifdef CONFIG_XEN_PV
+/* No plan to support immediate form MSR instructions in Xen */
+static __always_inline bool __xenpv_wrmsrq(u32 msr, u64 val, int type)
+{
+	asm_inline volatile goto(
+		"call asm_xen_write_msr\n\t"
+		"jnz 2f\n\t"
+		ALTERNATIVE("1: ds wrmsr",
+			    ASM_WRMSRNS,
+			    X86_FEATURE_WRMSRNS)
+		"2:\n"
+		_ASM_EXTABLE_TYPE(1b, %l[badmsr], %c[type])	/* For WRMSR(NS) */
+
+		: ASM_CALL_CONSTRAINT
+		: "a" (val), "c" (msr), [type] "i" (type)
+		: "memory", "rdx"
+		: badmsr);
+
+	return false;
+
+badmsr:
+	return true;
+}
+#endif
+
+static __always_inline bool __wrmsrq(u32 msr, u64 val, int type)
+{
+	bool ret;
+
+#ifdef CONFIG_XEN_PV
+	if (cpu_feature_enabled(X86_FEATURE_XENPV))
+		return __xenpv_wrmsrq(msr, val, type);
+#endif
+
+	/*
+	 * 1) When built with !CONFIG_XEN_PV.
+	 * 2) When built with CONFIG_XEN_PV but not running on Xen hypervisor.
+	 */
+	ret = __native_wrmsrq(msr, val, type);
+
+	if (tracepoint_enabled(write_msr))
+		do_trace_write_msr(msr, val, ret ? -EIO : 0);
+
+	return ret;
+}
+
+static __always_inline void wrmsrq(u32 msr, u64 val)
+{
+	__wrmsrq(msr, val, EX_TYPE_WRMSR);
+}
+
+static __always_inline void wrmsr(u32 msr, u32 low, u32 high)
+{
+	wrmsrq(msr, (u64)high << 32 | low);
+}
+
+static __always_inline int wrmsrq_safe(u32 msr, u64 val)
+{
+	return __wrmsrq(msr, val, EX_TYPE_WRMSR_SAFE) ? -EIO : 0;
+}
+
+static __always_inline int wrmsr_safe(u32 msr, u32 low, u32 high)
+{
+	return wrmsrq_safe(msr, (u64)high << 32 | low);
+}
+
 extern int rdmsr_safe_regs(u32 regs[8]);
 extern int wrmsr_safe_regs(u32 regs[8]);
 
@@ -242,25 +437,9 @@ do {								\
 	(void)((high) = (u32)(__val >> 32));			\
 } while (0)
 
-static inline void wrmsr(u32 msr, u32 low, u32 high)
-{
-	native_write_msr(msr, (u64)high << 32 | low);
-}
-
 #define rdmsrq(msr, val)			\
 	((val) = native_read_msr((msr)))
 
-static inline void wrmsrq(u32 msr, u64 val)
-{
-	native_write_msr(msr, val);
-}
-
-/* wrmsr with exception handling */
-static inline int wrmsrq_safe(u32 msr, u64 val)
-{
-	return native_write_msr_safe(msr, val);
-}
-
 /* rdmsr with exception handling */
 #define rdmsr_safe(msr, low, high)				\
 ({								\
@@ -277,29 +456,6 @@ static inline int rdmsrq_safe(u32 msr, u64 *p)
 }
 #endif	/* !CONFIG_PARAVIRT_XXL */
 
-/* Instruction opcode for WRMSRNS supported in binutils >= 2.40 */
-#define WRMSRNS _ASM_BYTES(0x0f,0x01,0xc6)
-
-/* Non-serializing WRMSR, when available.  Falls back to a serializing WRMSR. */
-static __always_inline void wrmsrns(u32 msr, u64 val)
-{
-	/*
-	 * WRMSR is 2 bytes.  WRMSRNS is 3 bytes.  Pad WRMSR with a redundant
-	 * DS prefix to avoid a trailing NOP.
-	 */
-	asm volatile("1: " ALTERNATIVE("ds wrmsr", WRMSRNS, X86_FEATURE_WRMSRNS)
-		     "2: " _ASM_EXTABLE_TYPE(1b, 2b, EX_TYPE_WRMSR)
-		     : : "c" (msr), "a" ((u32)val), "d" ((u32)(val >> 32)));
-}
-
-/*
- * Dual u32 version of wrmsrq_safe():
- */
-static inline int wrmsr_safe(u32 msr, u32 low, u32 high)
-{
-	return wrmsrq_safe(msr, (u64)high << 32 | low);
-}
-
 struct msr __percpu *msrs_alloc(void);
 void msrs_free(struct msr __percpu *msrs);
 int msr_set_bit(u32 msr, u8 bit);
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index 1bd1dad8da5a..6634f6cf801f 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -180,21 +180,11 @@ static inline u64 paravirt_read_msr(unsigned msr)
 	return PVOP_CALL1(u64, cpu.read_msr, msr);
 }
 
-static inline void paravirt_write_msr(u32 msr, u64 val)
-{
-	PVOP_VCALL2(cpu.write_msr, msr, val);
-}
-
 static inline u64 paravirt_read_msr_safe(unsigned msr, int *err)
 {
 	return PVOP_CALL2(u64, cpu.read_msr_safe, msr, err);
 }
 
-static inline int paravirt_write_msr_safe(u32 msr, u64 val)
-{
-	return PVOP_CALL2(int, cpu.write_msr_safe, msr, val);
-}
-
 #define rdmsr(msr, val1, val2)			\
 do {						\
 	u64 _l = paravirt_read_msr(msr);	\
@@ -202,26 +192,11 @@ do {						\
 	val2 = _l >> 32;			\
 } while (0)
 
-static __always_inline void wrmsr(u32 msr, u32 low, u32 high)
-{
-	paravirt_write_msr(msr, (u64)high << 32 | low);
-}
-
 #define rdmsrq(msr, val)			\
 do {						\
 	val = paravirt_read_msr(msr);		\
 } while (0)
 
-static inline void wrmsrq(u32 msr, u64 val)
-{
-	paravirt_write_msr(msr, val);
-}
-
-static inline int wrmsrq_safe(u32 msr, u64 val)
-{
-	return paravirt_write_msr_safe(msr, val)
-}
-
 /* rdmsr with exception handling */
 #define rdmsr_safe(msr, a, b)				\
 ({							\
diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/paravirt_types.h
index d2db38c32bc5..18bb0e5bd22f 100644
--- a/arch/x86/include/asm/paravirt_types.h
+++ b/arch/x86/include/asm/paravirt_types.h
@@ -92,14 +92,12 @@ struct pv_cpu_ops {
 
 	/* Unsafe MSR operations.  These will warn or panic on failure. */
 	u64 (*read_msr)(unsigned int msr);
-	void (*write_msr)(u32 msr, u64 val);
 
 	/*
 	 * Safe MSR operations.
 	 * Returns 0 or -EIO.
 	 */
 	int (*read_msr_safe)(unsigned int msr, u64 *val);
-	int (*write_msr_safe)(u32 msr, u64 val);
 
 	void (*start_context_switch)(struct task_struct *prev);
 	void (*end_context_switch)(struct task_struct *next);
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
index 28d195ad7514..62bf66f61821 100644
--- a/arch/x86/kernel/paravirt.c
+++ b/arch/x86/kernel/paravirt.c
@@ -129,9 +129,7 @@ struct paravirt_patch_template pv_ops = {
 	.cpu.write_cr0		= native_write_cr0,
 	.cpu.write_cr4		= native_write_cr4,
 	.cpu.read_msr		= native_read_msr,
-	.cpu.write_msr		= native_write_msr,
 	.cpu.read_msr_safe	= native_read_msr_safe,
-	.cpu.write_msr_safe	= native_write_msr_safe,
 	.cpu.load_tr_desc	= native_load_tr_desc,
 	.cpu.set_ldt		= native_set_ldt,
 	.cpu.load_gdt		= native_load_gdt,
diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c
index 195e6501a000..4672de7fc084 100644
--- a/arch/x86/xen/enlighten_pv.c
+++ b/arch/x86/xen/enlighten_pv.c
@@ -1118,26 +1118,26 @@ static void set_seg(u32 which, u64 base)
 }
 
 /*
- * Support write_msr_safe() and write_msr() semantics.
- * With err == NULL write_msr() semantics are selected.
- * Supplying an err pointer requires err to be pre-initialized with 0.
+ * Return true to indicate the requested MSR write has been done successfully,
+ * otherwise return false to have the calling MSR write primitives in msr.h to
+ * fail.
  */
-static void xen_do_write_msr(u32 msr, u64 val, int *err)
+bool xen_write_msr(u32 msr, u64 val)
 {
 	bool emulated;
 
 	switch (msr) {
 	case MSR_FS_BASE:
 		set_seg(SEGBASE_FS, val);
-		break;
+		return true;
 
 	case MSR_KERNEL_GS_BASE:
 		set_seg(SEGBASE_GS_USER, val);
-		break;
+		return true;
 
 	case MSR_GS_BASE:
 		set_seg(SEGBASE_GS_KERNEL, val);
-		break;
+		return true;
 
 	case MSR_STAR:
 	case MSR_CSTAR:
@@ -1149,16 +1149,13 @@ static void xen_do_write_msr(u32 msr, u64 val, int *err)
 		/* Fast syscall setup is all done in hypercalls, so
 		   these are all ignored.  Stub them out here to stop
 		   Xen console noise. */
-		break;
+		return true;
 
 	default:
 		if (pmu_msr_chk_emulated(msr, &val, false, &emulated) && emulated)
-			return;
+			return true;
 
-		if (err)
-			*err = native_write_msr_safe(msr, val);
-		else
-			native_write_msr(msr, val);
+		return false;
 	}
 }
 
@@ -1170,15 +1167,6 @@ static int xen_read_msr_safe(unsigned int msr, u64 *val)
 	return err;
 }
 
-static int xen_write_msr_safe(u32 msr, u64 val)
-{
-	int err = 0;
-
-	xen_do_write_msr(msr, val, &err);
-
-	return err;
-}
-
 static u64 xen_read_msr(unsigned int msr)
 {
 	int err;
@@ -1186,13 +1174,6 @@ static u64 xen_read_msr(unsigned int msr)
 	return xen_do_read_msr(msr, xen_msr_safe ? &err : NULL);
 }
 
-static void xen_write_msr(u32 msr, u64 val)
-{
-	int err;
-
-	xen_do_write_msr(msr, val, xen_msr_safe ? &err : NULL);
-}
-
 /* This is called once we have the cpu_possible_mask */
 void __init xen_setup_vcpu_info_placement(void)
 {
@@ -1228,10 +1209,8 @@ static const typeof(pv_ops) xen_cpu_ops __initconst = {
 		.write_cr4 = xen_write_cr4,
 
 		.read_msr = xen_read_msr,
-		.write_msr = xen_write_msr,
 
 		.read_msr_safe = xen_read_msr_safe,
-		.write_msr_safe = xen_write_msr_safe,
 
 		.load_tr_desc = paravirt_nop,
 		.set_ldt = xen_set_ldt,
diff --git a/arch/x86/xen/xen-asm.S b/arch/x86/xen/xen-asm.S
index 461bb1526502..eecce47fbe49 100644
--- a/arch/x86/xen/xen-asm.S
+++ b/arch/x86/xen/xen-asm.S
@@ -342,3 +342,67 @@ SYM_CODE_END(xen_entry_SYSENTER_compat)
 SYM_CODE_END(xen_entry_SYSCALL_compat)
 
 #endif	/* CONFIG_IA32_EMULATION */
+
+/*
+ * To leverage the alternatives mechanism and eliminate the overhead of Xen
+ * MSR and PMU counter access on native systems, as well as to enable new MSR
+ * instructions based on their availability, assembly trampoline functions
+ * are introduced when CONFIG_XEN_PV is enabled.
+ *
+ * Since these trampoline functions are invoked without saving callee registers,
+ * they must save the callee registers and the frame pointer.
+ */
+.macro XEN_SAVE_CALLEE_REGS_FOR_MSR
+	push %rcx
+	push %rdi
+	push %rsi
+	push %r8
+	push %r9
+	push %r10
+	push %r11
+.endm
+
+.macro XEN_RESTORE_CALLEE_REGS_FOR_MSR
+	pop %r11
+	pop %r10
+	pop %r9
+	pop %r8
+	pop %rsi
+	pop %rdi
+	pop %rcx
+.endm
+
+/*
+ * MSR number in %ecx, MSR value in %rax.
+ *
+ * %edx is set up to match %rax >> 32 like the native stub
+ * is expected to do
+ *
+ * Let xen_write_msr() return 'false' if the MSR access should
+ * be executed natively, IOW, 'true' means it has done the job.
+ *
+ * 	bool xen_write_msr(u32 msr, u64 value)
+ *
+ * If ZF=1 then this will fall down to the actual native WRMSR[NS]
+ * instruction.
+ *
+ * This also removes the need for Xen to maintain different safe and
+ * unsafe MSR routines, as the difference is handled by the same
+ * trap handler as is used natively.
+ */
+ SYM_FUNC_START(asm_xen_write_msr)
+	ENDBR
+	FRAME_BEGIN
+	push %rax		/* Save in case of native fallback */
+	XEN_SAVE_CALLEE_REGS_FOR_MSR
+	mov %ecx, %edi		/* MSR number */
+	mov %rax, %rsi		/* MSR data */
+	call xen_write_msr
+	test %al, %al		/* %al=1, i.e., ZF=0, means successfully done */
+	XEN_RESTORE_CALLEE_REGS_FOR_MSR
+	mov 4(%rsp), %edx	/* Set up %edx for native execution */
+	pop %rax
+	FRAME_END
+	RET
+SYM_FUNC_END(asm_xen_write_msr)
+EXPORT_SYMBOL_GPL(asm_xen_write_msr)
diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h
index fde9f9d7415f..56712242262a 100644
--- a/arch/x86/xen/xen-ops.h
+++ b/arch/x86/xen/xen-ops.h
@@ -146,6 +146,8 @@ __visible unsigned long xen_read_cr2_direct(void);
 /* These are not functions, and cannot be called normally */
 __visible void xen_iret(void);
 
+extern bool xen_write_msr(u32 msr, u64 val);
+
 extern int xen_panic_handler_init(void);
 
 int xen_cpuhp_setup(int (*cpu_up_prepare_cb)(unsigned int),
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
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Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
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        haiyangz@microsoft.com, decui@microsoft.com
Subject: [RFC PATCH v2 31/34] x86/msr: Rename native_read_msr() to native_rdmsrq()
Date: Tue, 22 Apr 2025 01:22:12 -0700
Message-ID: <20250422082216.1954310-32-xin@zytor.com>
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Signed-off-by: Xin Li (Intel) 
---
 arch/x86/hyperv/ivm.c      | 2 +-
 arch/x86/include/asm/msr.h | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/x86/hyperv/ivm.c b/arch/x86/hyperv/ivm.c
index dfddf522e838..8860c6c0f013 100644
--- a/arch/x86/hyperv/ivm.c
+++ b/arch/x86/hyperv/ivm.c
@@ -319,7 +319,7 @@ int hv_snp_boot_ap(u32 cpu, unsigned long start_ip)
 	asm volatile("movl %%ds, %%eax;" : "=a" (vmsa->ds.selector));
 	hv_populate_vmcb_seg(vmsa->ds, vmsa->gdtr.base);
 
-	vmsa->efer = native_read_msr(MSR_EFER);
+	vmsa->efer = native_rdmsrq(MSR_EFER);
 
 	vmsa->cr4 = native_read_cr4();
 	vmsa->cr3 = __native_read_cr3();
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index dfaac42b6258..4c7aa9e7fbac 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -160,7 +160,7 @@ static __always_inline bool is_msr_imm_insn(void *ip)
  *        native_rdmsrq_no_trace()    native_read_msr_safe()         |
  *                   /      \                                        |
  *                  /        \                                       |
- * native_rdmsr_no_trace()    native_read_msr()                      |
+ * native_rdmsr_no_trace()    native_rdmsrq()                        |
  *                                                                   |
  *                                                                   |
  *                                                                   |
@@ -263,7 +263,7 @@ do {							\
 	(void)((high) = (u32)(__val >> 32));		\
 } while (0)
 
-static inline u64 native_read_msr(u32 msr)
+static inline u64 native_rdmsrq(u32 msr)
 {
 	u64 val = native_rdmsrq_no_trace(msr);
 
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
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Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
        pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com
Subject: [RFC PATCH v2 26/34] x86/msr: Rename native_wrmsr() to native_wrmsr_no_trace()
Date: Tue, 22 Apr 2025 01:22:07 -0700
Message-ID: <20250422082216.1954310-27-xin@zytor.com>
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native_wrmsr() doesn't do trace thus can be used in noinstr context,
rename it to native_wrmsr_no_trace() to make it explicit.

Signed-off-by: Xin Li (Intel) 
---
 arch/x86/include/asm/msr.h                | 8 ++++----
 arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 4 ++--
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index d130bdeed3ce..2a62a899f7a5 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -367,9 +367,9 @@ static __always_inline int rdmsrq_safe(u32 msr, u64 *val)
  *                            /     \                                |
  *                           /       \                               |
  *        native_wrmsrq_no_trace()    native_write_msr_safe()        |
- *                   /    \                                          |
- *                  /      \                                         |
- *      native_wrmsr()    native_write_msr()                         |
+ *                   /        \                                      |
+ *                  /          \                                     |
+ * native_wrmsr_no_trace()    native_write_msr()                     |
  *                                                                   |
  *                                                                   |
  *                                                                   |
@@ -467,7 +467,7 @@ static __always_inline void native_wrmsrq_no_trace(u32 msr, u64 val)
 	__native_wrmsrq(msr, val, EX_TYPE_WRMSR);
 }
 
-static __always_inline void native_wrmsr(u32 msr, u32 low, u32 high)
+static __always_inline void native_wrmsr_no_trace(u32 msr, u32 low, u32 high)
 {
 	native_wrmsrq_no_trace(msr, (u64)high << 32 | low);
 }
diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
index e970a0de894f..184bc1b3fb02 100644
--- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
+++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
@@ -495,7 +495,7 @@ int resctrl_arch_pseudo_lock_fn(void *_plr)
 	 * pseudo-locked followed by reading of kernel memory to load it
 	 * into the cache.
 	 */
-	native_wrmsr(MSR_IA32_PQR_ASSOC, rmid_p, plr->closid);
+	native_wrmsr_no_trace(MSR_IA32_PQR_ASSOC, rmid_p, plr->closid);
 
 	/*
 	 * Cache was flushed earlier. Now access kernel memory to read it
@@ -532,7 +532,7 @@ int resctrl_arch_pseudo_lock_fn(void *_plr)
 	 * Critical section end: restore closid with capacity bitmask that
 	 * does not overlap with pseudo-locked region.
 	 */
-	native_wrmsr(MSR_IA32_PQR_ASSOC, rmid_p, closid_p);
+	native_wrmsr_no_trace(MSR_IA32_PQR_ASSOC, rmid_p, closid_p);
 
 	/* Re-enable the hardware prefetcher(s) */
 	wrmsrq(MSR_MISC_FEATURE_CONTROL, saved_msr);
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
        pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com
Subject: [RFC PATCH v2 27/34] x86/msr: Rename native_write_msr() to native_wrmsrq()
Date: Tue, 22 Apr 2025 01:22:08 -0700
Message-ID: <20250422082216.1954310-28-xin@zytor.com>
X-Mailer: git-send-email 2.49.0
In-Reply-To: <20250422082216.1954310-1-xin@zytor.com>
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Signed-off-by: Xin Li (Intel) 
---
 arch/x86/include/asm/msr.h | 4 ++--
 arch/x86/kernel/kvmclock.c | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 2a62a899f7a5..72a1c3301d46 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -369,7 +369,7 @@ static __always_inline int rdmsrq_safe(u32 msr, u64 *val)
  *        native_wrmsrq_no_trace()    native_write_msr_safe()        |
  *                   /        \                                      |
  *                  /          \                                     |
- * native_wrmsr_no_trace()    native_write_msr()                     |
+ * native_wrmsr_no_trace()    native_wrmsrq()                        |
  *                                                                   |
  *                                                                   |
  *                                                                   |
@@ -472,7 +472,7 @@ static __always_inline void native_wrmsr_no_trace(u32 msr, u32 low, u32 high)
 	native_wrmsrq_no_trace(msr, (u64)high << 32 | low);
 }
 
-static inline void notrace native_write_msr(u32 msr, u64 val)
+static inline void notrace native_wrmsrq(u32 msr, u64 val)
 {
 	native_wrmsrq_no_trace(msr, val);
 
diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c
index ca0a49eeac4a..36417fed7f18 100644
--- a/arch/x86/kernel/kvmclock.c
+++ b/arch/x86/kernel/kvmclock.c
@@ -196,7 +196,7 @@ static void kvm_setup_secondary_clock(void)
 void kvmclock_disable(void)
 {
 	if (msr_kvm_system_time)
-		native_write_msr(msr_kvm_system_time, 0);
+		native_wrmsrq(msr_kvm_system_time, 0);
 }
 
 static void __init kvmclock_init_mem(void)
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
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        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
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Subject: [RFC PATCH v2 34/34] x86/msr: Convert native_rdmsr_no_trace() uses to native_rdmsrq_no_trace() uses
Date: Tue, 22 Apr 2025 01:22:15 -0700
Message-ID: <20250422082216.1954310-35-xin@zytor.com>
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In-Reply-To: <20250422082216.1954310-1-xin@zytor.com>
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Convert native_rdmsr_no_trace() uses to native_rdmsrq_no_trace() uses
cleanly with the use of struct msr, and remove native_rdmsr_no_trace().

Signed-off-by: Xin Li (Intel) 
---
 arch/x86/include/asm/microcode.h      |  6 +++---
 arch/x86/include/asm/msr.h            | 13 +++----------
 arch/x86/kernel/cpu/microcode/amd.c   |  8 ++------
 arch/x86/kernel/cpu/microcode/core.c  |  4 ++--
 arch/x86/kernel/cpu/microcode/intel.c |  6 +++---
 5 files changed, 13 insertions(+), 24 deletions(-)

diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h
index d581fdaf1f36..1d9641349744 100644
--- a/arch/x86/include/asm/microcode.h
+++ b/arch/x86/include/asm/microcode.h
@@ -61,7 +61,7 @@ static inline int intel_microcode_get_datasize(struct microcode_header_intel *hd
 
 static inline u32 intel_get_microcode_revision(void)
 {
-	u32 rev, dummy;
+	struct msr val;
 
 	native_wrmsrq_no_trace(MSR_IA32_UCODE_REV, 0);
 
@@ -69,9 +69,9 @@ static inline u32 intel_get_microcode_revision(void)
 	native_cpuid_eax(1);
 
 	/* get the current revision from MSR 0x8B */
-	native_rdmsr_no_trace(MSR_IA32_UCODE_REV, dummy, rev);
+	val.q = native_rdmsrq_no_trace(MSR_IA32_UCODE_REV);
 
-	return rev;
+	return val.h;
 }
 #endif /* !CONFIG_CPU_SUP_INTEL */
 
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index be593a15a838..aebcd846af3e 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -141,9 +141,9 @@ static __always_inline bool is_msr_imm_insn(void *ip)
  *                            /     \                                |
  *                           /       \                               |
  *        native_rdmsrq_no_trace()    native_rdmsrq_safe()           |
- *                   /      \                                        |
- *                  /        \                                       |
- * native_rdmsr_no_trace()    native_rdmsrq()                        |
+ *               /                                                   |
+ *              /                                                    |
+ *      native_rdmsrq()                                              |
  *                                                                   |
  *                                                                   |
  *                                                                   |
@@ -239,13 +239,6 @@ static __always_inline u64 native_rdmsrq_no_trace(u32 msr)
 	return val;
 }
 
-#define native_rdmsr_no_trace(msr, low, high)		\
-do {							\
-	u64 __val = native_rdmsrq_no_trace(msr);	\
-	(void)((low) = (u32)__val);			\
-	(void)((high) = (u32)(__val >> 32));		\
-} while (0)
-
 static inline u64 native_rdmsrq(u32 msr)
 {
 	u64 val = native_rdmsrq_no_trace(msr);
diff --git a/arch/x86/kernel/cpu/microcode/amd.c b/arch/x86/kernel/cpu/microcode/amd.c
index f1f275ddab57..b4d66e79089c 100644
--- a/arch/x86/kernel/cpu/microcode/amd.c
+++ b/arch/x86/kernel/cpu/microcode/amd.c
@@ -254,11 +254,7 @@ static bool verify_sha256_digest(u32 patch_id, u32 cur_rev, const u8 *data, unsi
 
 static u32 get_patch_level(void)
 {
-	u32 rev, dummy __always_unused;
-
-	native_rdmsr_no_trace(MSR_AMD64_PATCH_LEVEL, rev, dummy);
-
-	return rev;
+	return native_rdmsrq_no_trace(MSR_AMD64_PATCH_LEVEL);
 }
 
 static union cpuid_1_eax ucode_rev_to_cpuid(unsigned int val)
@@ -835,7 +831,7 @@ static struct ucode_patch *find_patch(unsigned int cpu)
 
 void reload_ucode_amd(unsigned int cpu)
 {
-	u32 rev, dummy __always_unused;
+	u32 rev;
 	struct microcode_amd *mc;
 	struct ucode_patch *p;
 
diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/microcode/core.c
index 9bda8fd987ab..81b264373d3e 100644
--- a/arch/x86/kernel/cpu/microcode/core.c
+++ b/arch/x86/kernel/cpu/microcode/core.c
@@ -81,10 +81,10 @@ struct early_load_data early_data;
  */
 static bool amd_check_current_patch_level(void)
 {
-	u32 lvl, dummy, i;
+	u32 lvl, i;
 	u32 *levels;
 
-	native_rdmsr_no_trace(MSR_AMD64_PATCH_LEVEL, lvl, dummy);
+	lvl = native_rdmsrq_no_trace(MSR_AMD64_PATCH_LEVEL);
 
 	levels = final_levels;
 
diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c
index c0307b1ad63d..1b484214f3ee 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -75,11 +75,11 @@ void intel_collect_cpu_info(struct cpu_signature *sig)
 	sig->rev = intel_get_microcode_revision();
 
 	if (IFM(x86_family(sig->sig), x86_model(sig->sig)) >= INTEL_PENTIUM_III_DESCHUTES) {
-		unsigned int val[2];
+		struct msr val;
 
 		/* get processor flags from MSR 0x17 */
-		native_rdmsr_no_trace(MSR_IA32_PLATFORM_ID, val[0], val[1]);
-		sig->pf = 1 << ((val[1] >> 18) & 7);
+		val.q = native_rdmsrq_no_trace(MSR_IA32_PLATFORM_ID);
+		sig->pf = 1 << ((val.h >> 18) & 7);
 	}
 }
 EXPORT_SYMBOL_GPL(intel_collect_cpu_info);
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
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        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com
Subject: [RFC PATCH v2 25/34] x86/msr: Rename native_wrmsrq() to native_wrmsrq_no_trace()
Date: Tue, 22 Apr 2025 01:22:06 -0700
Message-ID: <20250422082216.1954310-26-xin@zytor.com>
X-Mailer: git-send-email 2.49.0
In-Reply-To: <20250422082216.1954310-1-xin@zytor.com>
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native_wrmsrq() doesn't do trace thus can be used in noinstr context,
rename it to native_wrmsrq_no_trace() to make it explicit.

Signed-off-by: Xin Li (Intel) 
---
 arch/x86/events/amd/brs.c                 | 2 +-
 arch/x86/hyperv/ivm.c                     | 2 +-
 arch/x86/include/asm/apic.h               | 2 +-
 arch/x86/include/asm/fred.h               | 2 +-
 arch/x86/include/asm/microcode.h          | 2 +-
 arch/x86/include/asm/msr.h                | 8 ++++----
 arch/x86/include/asm/sev-internal.h       | 2 +-
 arch/x86/include/asm/spec-ctrl.h          | 2 +-
 arch/x86/kernel/cpu/mce/core.c            | 2 +-
 arch/x86/kernel/cpu/microcode/amd.c       | 2 +-
 arch/x86/kernel/cpu/microcode/intel.c     | 2 +-
 arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 2 +-
 arch/x86/kvm/vmx/vmx.c                    | 8 ++++----
 13 files changed, 19 insertions(+), 19 deletions(-)

diff --git a/arch/x86/events/amd/brs.c b/arch/x86/events/amd/brs.c
index 06f35a6b58a5..0153616a97cd 100644
--- a/arch/x86/events/amd/brs.c
+++ b/arch/x86/events/amd/brs.c
@@ -44,7 +44,7 @@ static inline unsigned int brs_to(int idx)
 static __always_inline void set_debug_extn_cfg(u64 val)
 {
 	/* bits[4:3] must always be set to 11b */
-	native_wrmsrq(MSR_AMD_DBG_EXTN_CFG, val | 3ULL << 3);
+	native_wrmsrq_no_trace(MSR_AMD_DBG_EXTN_CFG, val | 3ULL << 3);
 }
 
 static __always_inline u64 get_debug_extn_cfg(void)
diff --git a/arch/x86/hyperv/ivm.c b/arch/x86/hyperv/ivm.c
index 09a165a3c41e..821609af5bd2 100644
--- a/arch/x86/hyperv/ivm.c
+++ b/arch/x86/hyperv/ivm.c
@@ -116,7 +116,7 @@ static inline u64 rd_ghcb_msr(void)
 
 static inline void wr_ghcb_msr(u64 val)
 {
-	native_wrmsrq(MSR_AMD64_SEV_ES_GHCB, val);
+	native_wrmsrq_no_trace(MSR_AMD64_SEV_ES_GHCB, val);
 }
 
 static enum es_result hv_ghcb_hv_call(struct ghcb *ghcb, u64 exit_code,
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index 68e10e30fe9b..442127c3e1f5 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -214,7 +214,7 @@ static inline void native_apic_msr_write(u32 reg, u32 v)
 
 static inline void native_apic_msr_eoi(void)
 {
-	native_wrmsrq(APIC_BASE_MSR + (APIC_EOI >> 4), APIC_EOI_ACK);
+	native_wrmsrq_no_trace(APIC_BASE_MSR + (APIC_EOI >> 4), APIC_EOI_ACK);
 }
 
 static inline u32 native_apic_msr_read(u32 reg)
diff --git a/arch/x86/include/asm/fred.h b/arch/x86/include/asm/fred.h
index 8ae4429e5401..3a58545415d9 100644
--- a/arch/x86/include/asm/fred.h
+++ b/arch/x86/include/asm/fred.h
@@ -101,7 +101,7 @@ static __always_inline void fred_update_rsp0(void)
 	unsigned long rsp0 = (unsigned long) task_stack_page(current) + THREAD_SIZE;
 
 	if (cpu_feature_enabled(X86_FEATURE_FRED) && (__this_cpu_read(fred_rsp0) != rsp0)) {
-		native_wrmsrq(MSR_IA32_FRED_RSP0, rsp0);
+		native_wrmsrq_no_trace(MSR_IA32_FRED_RSP0, rsp0);
 		__this_cpu_write(fred_rsp0, rsp0);
 	}
 }
diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h
index 107a1aaa211b..da482f430d80 100644
--- a/arch/x86/include/asm/microcode.h
+++ b/arch/x86/include/asm/microcode.h
@@ -63,7 +63,7 @@ static inline u32 intel_get_microcode_revision(void)
 {
 	u32 rev, dummy;
 
-	native_wrmsrq(MSR_IA32_UCODE_REV, 0);
+	native_wrmsrq_no_trace(MSR_IA32_UCODE_REV, 0);
 
 	/* As documented in the SDM: Do a CPUID 1 here */
 	native_cpuid_eax(1);
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 5271cb002b23..d130bdeed3ce 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -366,7 +366,7 @@ static __always_inline int rdmsrq_safe(u32 msr, u64 *val)
  *                         __native_wrmsrq()   -----------------------
  *                            /     \                                |
  *                           /       \                               |
- *               native_wrmsrq()    native_write_msr_safe()          |
+ *        native_wrmsrq_no_trace()    native_write_msr_safe()        |
  *                   /    \                                          |
  *                  /      \                                         |
  *      native_wrmsr()    native_write_msr()                         |
@@ -462,19 +462,19 @@ static __always_inline bool __native_wrmsrq(u32 msr, u64 val, int type)
 	return __native_wrmsrq_variable(msr, val, type);
 }
 
-static __always_inline void native_wrmsrq(u32 msr, u64 val)
+static __always_inline void native_wrmsrq_no_trace(u32 msr, u64 val)
 {
 	__native_wrmsrq(msr, val, EX_TYPE_WRMSR);
 }
 
 static __always_inline void native_wrmsr(u32 msr, u32 low, u32 high)
 {
-	native_wrmsrq(msr, (u64)high << 32 | low);
+	native_wrmsrq_no_trace(msr, (u64)high << 32 | low);
 }
 
 static inline void notrace native_write_msr(u32 msr, u64 val)
 {
-	native_wrmsrq(msr, val);
+	native_wrmsrq_no_trace(msr, val);
 
 	if (tracepoint_enabled(write_msr))
 		do_trace_write_msr(msr, val, 0);
diff --git a/arch/x86/include/asm/sev-internal.h b/arch/x86/include/asm/sev-internal.h
index d259bcec220a..7eb030702435 100644
--- a/arch/x86/include/asm/sev-internal.h
+++ b/arch/x86/include/asm/sev-internal.h
@@ -101,7 +101,7 @@ static inline u64 sev_es_rd_ghcb_msr(void)
 
 static __always_inline void sev_es_wr_ghcb_msr(u64 val)
 {
-	native_wrmsrq(MSR_AMD64_SEV_ES_GHCB, val);
+	native_wrmsrq_no_trace(MSR_AMD64_SEV_ES_GHCB, val);
 }
 
 enum es_result sev_es_ghcb_hv_call(struct ghcb *ghcb,
diff --git a/arch/x86/include/asm/spec-ctrl.h b/arch/x86/include/asm/spec-ctrl.h
index 00b7e0398210..8cf69849bbbe 100644
--- a/arch/x86/include/asm/spec-ctrl.h
+++ b/arch/x86/include/asm/spec-ctrl.h
@@ -84,7 +84,7 @@ static inline u64 ssbd_tif_to_amd_ls_cfg(u64 tifn)
 static __always_inline void __update_spec_ctrl(u64 val)
 {
 	__this_cpu_write(x86_spec_ctrl_current, val);
-	native_wrmsrq(MSR_IA32_SPEC_CTRL, val);
+	native_wrmsrq_no_trace(MSR_IA32_SPEC_CTRL, val);
 }
 
 #ifdef CONFIG_SMP
diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
index b854a60238de..bd3cb984ccb9 100644
--- a/arch/x86/kernel/cpu/mce/core.c
+++ b/arch/x86/kernel/cpu/mce/core.c
@@ -1321,7 +1321,7 @@ static noinstr bool mce_check_crashing_cpu(void)
 		}
 
 		if (mcgstatus & MCG_STATUS_RIPV) {
-			native_wrmsrq(MSR_IA32_MCG_STATUS, 0);
+			native_wrmsrq_no_trace(MSR_IA32_MCG_STATUS, 0);
 			return true;
 		}
 	}
diff --git a/arch/x86/kernel/cpu/microcode/amd.c b/arch/x86/kernel/cpu/microcode/amd.c
index 1798a6c027f8..41c553396500 100644
--- a/arch/x86/kernel/cpu/microcode/amd.c
+++ b/arch/x86/kernel/cpu/microcode/amd.c
@@ -607,7 +607,7 @@ static bool __apply_microcode_amd(struct microcode_amd *mc, u32 *cur_rev,
 	if (!verify_sha256_digest(mc->hdr.patch_id, *cur_rev, (const u8 *)p_addr, psize))
 		return false;
 
-	native_wrmsrq(MSR_AMD64_PATCH_LOADER, p_addr);
+	native_wrmsrq_no_trace(MSR_AMD64_PATCH_LOADER, p_addr);
 
 	if (x86_family(bsp_cpuid_1_eax) == 0x17) {
 		unsigned long p_addr_end = p_addr + psize - 1;
diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c
index 86e1047f738f..26e13dc4cedd 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -320,7 +320,7 @@ static enum ucode_state __apply_microcode(struct ucode_cpu_info *uci,
 	}
 
 	/* write microcode via MSR 0x79 */
-	native_wrmsrq(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits);
+	native_wrmsrq_no_trace(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits);
 
 	rev = intel_get_microcode_revision();
 	if (rev != mc->hdr.rev)
diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
index cc534a83f19d..e970a0de894f 100644
--- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
+++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
@@ -483,7 +483,7 @@ int resctrl_arch_pseudo_lock_fn(void *_plr)
 	 * cache.
 	 */
 	saved_msr = native_rdmsrq(MSR_MISC_FEATURE_CONTROL);
-	native_wrmsrq(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits);
+	native_wrmsrq_no_trace(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits);
 	closid_p = this_cpu_read(pqr_state.cur_closid);
 	rmid_p = this_cpu_read(pqr_state.cur_rmid);
 	mem_r = plr->kmem;
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index e73c1d5ba6c4..b53575dee64a 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -382,7 +382,7 @@ static __always_inline void vmx_disable_fb_clear(struct vcpu_vmx *vmx)
 
 	msr = native_rdmsrq(MSR_IA32_MCU_OPT_CTRL);
 	msr |= FB_CLEAR_DIS;
-	native_wrmsrq(MSR_IA32_MCU_OPT_CTRL, msr);
+	native_wrmsrq_no_trace(MSR_IA32_MCU_OPT_CTRL, msr);
 	/* Cache the MSR value to avoid reading it later */
 	vmx->msr_ia32_mcu_opt_ctrl = msr;
 }
@@ -393,7 +393,7 @@ static __always_inline void vmx_enable_fb_clear(struct vcpu_vmx *vmx)
 		return;
 
 	vmx->msr_ia32_mcu_opt_ctrl &= ~FB_CLEAR_DIS;
-	native_wrmsrq(MSR_IA32_MCU_OPT_CTRL, vmx->msr_ia32_mcu_opt_ctrl);
+	native_wrmsrq_no_trace(MSR_IA32_MCU_OPT_CTRL, vmx->msr_ia32_mcu_opt_ctrl);
 }
 
 static void vmx_update_fb_clear_dis(struct kvm_vcpu *vcpu, struct vcpu_vmx *vmx)
@@ -6745,7 +6745,7 @@ static noinstr void vmx_l1d_flush(struct kvm_vcpu *vcpu)
 	vcpu->stat.l1d_flush++;
 
 	if (static_cpu_has(X86_FEATURE_FLUSH_L1D)) {
-		native_wrmsrq(MSR_IA32_FLUSH_CMD, L1D_FLUSH);
+		native_wrmsrq_no_trace(MSR_IA32_FLUSH_CMD, L1D_FLUSH);
 		return;
 	}
 
@@ -7318,7 +7318,7 @@ void noinstr vmx_spec_ctrl_restore_host(struct vcpu_vmx *vmx,
 	 */
 	if (cpu_feature_enabled(X86_FEATURE_KERNEL_IBRS) ||
 	    vmx->spec_ctrl != hostval)
-		native_wrmsrq(MSR_IA32_SPEC_CTRL, hostval);
+		native_wrmsrq_no_trace(MSR_IA32_SPEC_CTRL, hostval);
 
 	barrier_nospec();
 }
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
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        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com
Subject: [RFC PATCH v2 24/34] x86/mce: Use native MSR API __native_{wr,rd}msrq()
Date: Tue, 22 Apr 2025 01:22:05 -0700
Message-ID: <20250422082216.1954310-25-xin@zytor.com>
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In-Reply-To: <20250422082216.1954310-1-xin@zytor.com>
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Use native MSR API __native_{wr,rd}msrq() instead of MSR assemely.

Signed-off-by: Xin Li (Intel) 
---
 arch/x86/kernel/cpu/mce/core.c | 55 +++++++++++++++++++++-------------
 1 file changed, 35 insertions(+), 20 deletions(-)

diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
index 32286bad75e6..b854a60238de 100644
--- a/arch/x86/kernel/cpu/mce/core.c
+++ b/arch/x86/kernel/cpu/mce/core.c
@@ -370,13 +370,40 @@ static int msr_to_offset(u32 msr)
 
 void ex_handler_msr_mce(struct pt_regs *regs, bool wrmsr)
 {
+	bool imm_insn = is_msr_imm_insn((void *)regs->ip);
+	u32 msr;
+
+	if (imm_insn)
+		/*
+		 * The 32-bit immediate specifying a MSR is encoded into
+		 * byte 5 ~ 8 of an immediate form MSR instruction.
+		 */
+		msr = *(u32 *)(regs->ip + 5);
+	else
+		msr = (u32)regs->cx;
+
 	if (wrmsr) {
-		pr_emerg("MSR access error: WRMSR to 0x%x (tried to write 0x%08x%08x) at rIP: 0x%lx (%pS)\n",
-			 (unsigned int)regs->cx, (unsigned int)regs->dx, (unsigned int)regs->ax,
-			 regs->ip, (void *)regs->ip);
+		/*
+		 * To maintain consistency with existing RDMSR and WRMSR(NS) instructions,
+		 * the register operand for immediate form MSR instructions is ALWAYS
+		 * encoded as RAX in  for reading or writing the MSR value.
+		 */
+		u64 msr_val = regs->ax;
+
+		if (!imm_insn) {
+			/*
+			 * On processors that support the Intel 64 architecture, the
+			 * high-order 32 bits of each of RAX and RDX are ignored.
+			 */
+			msr_val &= 0xffffffff;
+			msr_val |= (u64)regs->dx << 32;
+		}
+
+		pr_emerg("MSR access error: WRMSR to 0x%x (tried to write 0x%016llx) at rIP: 0x%lx (%pS)\n",
+			 msr, msr_val, regs->ip, (void *)regs->ip);
 	} else {
 		pr_emerg("MSR access error: RDMSR from 0x%x at rIP: 0x%lx (%pS)\n",
-			 (unsigned int)regs->cx, regs->ip, (void *)regs->ip);
+			 msr, regs->ip, (void *)regs->ip);
 	}
 
 	show_stack_regs(regs);
@@ -390,7 +417,7 @@ void ex_handler_msr_mce(struct pt_regs *regs, bool wrmsr)
 /* MSR access wrappers used for error injection */
 noinstr u64 mce_rdmsrq(u32 msr)
 {
-	DECLARE_ARGS(val, low, high);
+	u64 val;
 
 	if (__this_cpu_read(injectm.finished)) {
 		int offset;
@@ -414,19 +441,13 @@ noinstr u64 mce_rdmsrq(u32 msr)
 	 * architectural violation and needs to be reported to hw vendor. Panic
 	 * the box to not allow any further progress.
 	 */
-	asm volatile("1: rdmsr\n"
-		     "2:\n"
-		     _ASM_EXTABLE_TYPE(1b, 2b, EX_TYPE_RDMSR_IN_MCE)
-		     : EAX_EDX_RET(val, low, high) : "c" (msr));
+	__native_rdmsrq(msr, &val, EX_TYPE_RDMSR_IN_MCE);
 
-
-	return EAX_EDX_VAL(val, low, high);
+	return val;
 }
 
 static noinstr void mce_wrmsrq(u32 msr, u64 v)
 {
-	u32 low, high;
-
 	if (__this_cpu_read(injectm.finished)) {
 		int offset;
 
@@ -441,14 +462,8 @@ static noinstr void mce_wrmsrq(u32 msr, u64 v)
 		return;
 	}
 
-	low  = (u32)v;
-	high = (u32)(v >> 32);
-
 	/* See comment in mce_rdmsrq() */
-	asm volatile("1: wrmsr\n"
-		     "2:\n"
-		     _ASM_EXTABLE_TYPE(1b, 2b, EX_TYPE_WRMSR_IN_MCE)
-		     : : "c" (msr), "a"(low), "d" (high) : "memory");
+	__native_wrmsrq(msr, v, EX_TYPE_WRMSR_IN_MCE);
 }
 
 /*
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
        pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com
Subject: [RFC PATCH v2 00/34] MSR refactor with new MSR instructions support
Date: Tue, 22 Apr 2025 01:21:41 -0700
Message-ID: <20250422082216.1954310-1-xin@zytor.com>
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Obviously the existing MSR code and the pv_ops MSR access APIs need some
love: https://lore.kernel.org/lkml/87y1h81ht4.ffs@tglx/

hpa has started a discussion about how to refactor it last October:
https://lore.kernel.org/lkml/7a4de623-ecda-4369-a7ae-0c43ef328177@zytor.com/

The consensus so far is to utilize the alternatives mechanism to eliminate
the Xen MSR access overhead on native systems and enable new MSR instructions
based on their availability.

To achieve this, a code refactor is required:

Patch 1 relocates rdtsc{,_ordered}() from  to  and
removes the inclusion of  in .  As a result,
 must now be explicitly included in several source files where
it was previously included implicitly through .

Patches 2 ~ 6 refactor the code to use the alternatives mechanism to read
PMC.

Patches 7 ~ 16 unify and simplify the MSR API definitions and usages.

Patches 17 ~ 19 add basic support for immediate form MSR instructions,
e.g., its CPU feature bit and opcode.

Patch 20 adds a new exception type to allow a function call inside an
alternative for instruction emulation to "kick back" the exception into
the alternatives pattern, possibly invoking a different exception handling
pattern there, or at least indicating the "real" location of the fault.

patches 21 and 22 refactor the code to use the alternatives mechanism to
read and write MSR.

Patches 23 ~ 34 are afterwards cleanups.


H. Peter Anvin (Intel) (1):
  x86/extable: Implement EX_TYPE_FUNC_REWIND

Xin Li (Intel) (33):
  x86/msr: Move rdtsc{,_ordered}() to 
  x86/msr: Remove rdpmc()
  x86/msr: Rename rdpmcl() to rdpmcq()
  x86/msr: Convert rdpmcq() into a function
  x86/msr: Return u64 consistently in Xen PMC read functions
  x86/msr: Use the alternatives mechanism to read PMC
  x86/msr: Convert __wrmsr() uses to native_wrmsr{,q}() uses
  x86/msr: Convert a native_wrmsr() use to native_wrmsrq()
  x86/msr: Add the native_rdmsrq() helper
  x86/msr: Convert __rdmsr() uses to native_rdmsrq() uses
  x86/msr: Remove calling native_{read,write}_msr{,_safe}() in
    pmu_msr_{read,write}()
  x86/msr: Remove pmu_msr_{read,write}()
  x86/xen/msr: Remove the error pointer argument from set_reg()
  x86/msr: refactor pv_cpu_ops.write_msr{_safe}()
  x86/msr: Replace wrmsr(msr, low, 0) with wrmsrq(msr, low)
  x86/msr: Change function type of native_read_msr_safe()
  x86/cpufeatures: Add a CPU feature bit for MSR immediate form
    instructions
  x86/opcode: Add immediate form MSR instructions
  x86/extable: Add support for immediate form MSR instructions
  x86/msr: Utilize the alternatives mechanism to write MSR
  x86/msr: Utilize the alternatives mechanism to read MSR
  x86/extable: Remove new dead code in ex_handler_msr()
  x86/mce: Use native MSR API __native_{wr,rd}msrq()
  x86/msr: Rename native_wrmsrq() to native_wrmsrq_no_trace()
  x86/msr: Rename native_wrmsr() to native_wrmsr_no_trace()
  x86/msr: Rename native_write_msr() to native_wrmsrq()
  x86/msr: Rename native_write_msr_safe() to native_wrmsrq_safe()
  x86/msr: Rename native_rdmsrq() to native_rdmsrq_no_trace()
  x86/msr: Rename native_rdmsr() to native_rdmsr_no_trace()
  x86/msr: Rename native_read_msr() to native_rdmsrq()
  x86/msr: Rename native_read_msr_safe() to native_rdmsrq_safe()
  x86/msr: Move the ARGS macros after the MSR read/write APIs
  x86/msr: Convert native_rdmsr_no_trace() uses to
    native_rdmsrq_no_trace() uses

 arch/x86/boot/startup/sme.c                   |   5 +-
 arch/x86/events/amd/brs.c                     |   4 +-
 arch/x86/events/amd/uncore.c                  |   2 +-
 arch/x86/events/core.c                        |   2 +-
 arch/x86/events/intel/core.c                  |   4 +-
 arch/x86/events/intel/ds.c                    |   2 +-
 arch/x86/events/msr.c                         |   3 +
 arch/x86/events/perf_event.h                  |   1 +
 arch/x86/events/probe.c                       |   2 +
 arch/x86/hyperv/hv_apic.c                     |   6 +-
 arch/x86/hyperv/hv_vtl.c                      |   4 +-
 arch/x86/hyperv/ivm.c                         |   7 +-
 arch/x86/include/asm/apic.h                   |   4 +-
 arch/x86/include/asm/asm.h                    |   6 +
 arch/x86/include/asm/cpufeatures.h            |   1 +
 arch/x86/include/asm/extable_fixup_types.h    |   1 +
 arch/x86/include/asm/fred.h                   |   3 +-
 arch/x86/include/asm/microcode.h              |  10 +-
 arch/x86/include/asm/mshyperv.h               |   3 +-
 arch/x86/include/asm/msr.h                    | 637 ++++++++++++------
 arch/x86/include/asm/paravirt.h               |  78 ---
 arch/x86/include/asm/paravirt_types.h         |  13 -
 arch/x86/include/asm/sev-internal.h           |   9 +-
 arch/x86/include/asm/spec-ctrl.h              |   2 +-
 arch/x86/include/asm/suspend_32.h             |   1 +
 arch/x86/include/asm/suspend_64.h             |   1 +
 arch/x86/include/asm/switch_to.h              |   4 +-
 arch/x86/include/asm/tsc.h                    |  76 ++-
 arch/x86/kernel/cpu/amd.c                     |   2 +-
 arch/x86/kernel/cpu/common.c                  |  10 +-
 arch/x86/kernel/cpu/mce/core.c                |  61 +-
 arch/x86/kernel/cpu/microcode/amd.c           |  10 +-
 arch/x86/kernel/cpu/microcode/core.c          |   4 +-
 arch/x86/kernel/cpu/microcode/intel.c         |   8 +-
 arch/x86/kernel/cpu/resctrl/pseudo_lock.c     |  25 +-
 arch/x86/kernel/cpu/resctrl/rdtgroup.c        |   2 +-
 arch/x86/kernel/cpu/scattered.c               |   1 +
 arch/x86/kernel/cpu/umwait.c                  |   4 +-
 arch/x86/kernel/fpu/xstate.h                  |   1 +
 arch/x86/kernel/hpet.c                        |   1 +
 arch/x86/kernel/kvm.c                         |   2 +-
 arch/x86/kernel/kvmclock.c                    |   2 +-
 arch/x86/kernel/paravirt.c                    |   5 -
 arch/x86/kernel/process_64.c                  |   1 +
 arch/x86/kernel/trace_clock.c                 |   2 +-
 arch/x86/kernel/tsc_sync.c                    |   1 +
 arch/x86/kvm/svm/svm.c                        |  34 +-
 arch/x86/kvm/vmx/vmx.c                        |  12 +-
 arch/x86/lib/kaslr.c                          |   2 +-
 arch/x86/lib/x86-opcode-map.txt               |   5 +-
 arch/x86/mm/extable.c                         | 181 +++--
 arch/x86/realmode/init.c                      |   1 +
 arch/x86/xen/enlighten_pv.c                   | 112 ++-
 arch/x86/xen/pmu.c                            |  63 +-
 arch/x86/xen/xen-asm.S                        | 113 ++++
 arch/x86/xen/xen-ops.h                        |  14 +-
 drivers/acpi/processor_perflib.c              |   1 +
 drivers/acpi/processor_throttling.c           |   3 +-
 drivers/cpufreq/amd-pstate-ut.c               |   2 +
 drivers/hwmon/hwmon-vid.c                     |   4 +
 drivers/net/vmxnet3/vmxnet3_drv.c             |   6 +-
 .../intel/speed_select_if/isst_if_common.c    |   1 +
 drivers/platform/x86/intel/turbo_max_3.c      |   1 +
 tools/arch/x86/lib/x86-opcode-map.txt         |   5 +-
 64 files changed, 988 insertions(+), 605 deletions(-)


base-commit: f30a0c0d2b08b355c01392538de8fc872387cb2b
-- 
2.49.0



From xen-devel-bounces@lists.xenproject.org Tue Apr 22 08:33:38 2025
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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
        pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com
Subject: [RFC PATCH v2 30/34] x86/msr: Rename native_rdmsr() to native_rdmsr_no_trace()
Date: Tue, 22 Apr 2025 01:22:11 -0700
Message-ID: <20250422082216.1954310-31-xin@zytor.com>
X-Mailer: git-send-email 2.49.0
In-Reply-To: <20250422082216.1954310-1-xin@zytor.com>
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native_rdmsr() doesn't do trace thus can be used in noinstr context,
rename it to native_rdmsr_no_trace() to make it explicit.

Signed-off-by: Xin Li (Intel) 
---
 arch/x86/include/asm/microcode.h      | 2 +-
 arch/x86/include/asm/msr.h            | 8 ++++----
 arch/x86/kernel/cpu/microcode/amd.c   | 2 +-
 arch/x86/kernel/cpu/microcode/core.c  | 2 +-
 arch/x86/kernel/cpu/microcode/intel.c | 2 +-
 5 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h
index da482f430d80..d581fdaf1f36 100644
--- a/arch/x86/include/asm/microcode.h
+++ b/arch/x86/include/asm/microcode.h
@@ -69,7 +69,7 @@ static inline u32 intel_get_microcode_revision(void)
 	native_cpuid_eax(1);
 
 	/* get the current revision from MSR 0x8B */
-	native_rdmsr(MSR_IA32_UCODE_REV, dummy, rev);
+	native_rdmsr_no_trace(MSR_IA32_UCODE_REV, dummy, rev);
 
 	return rev;
 }
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 050d750a5ab7..dfaac42b6258 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -158,9 +158,9 @@ static __always_inline bool is_msr_imm_insn(void *ip)
  *                            /     \                                |
  *                           /       \                               |
  *        native_rdmsrq_no_trace()    native_read_msr_safe()         |
- *                   /    \                                          |
- *                  /      \                                         |
- *      native_rdmsr()    native_read_msr()                          |
+ *                   /      \                                        |
+ *                  /        \                                       |
+ * native_rdmsr_no_trace()    native_read_msr()                      |
  *                                                                   |
  *                                                                   |
  *                                                                   |
@@ -256,7 +256,7 @@ static __always_inline u64 native_rdmsrq_no_trace(u32 msr)
 	return val;
 }
 
-#define native_rdmsr(msr, low, high)			\
+#define native_rdmsr_no_trace(msr, low, high)		\
 do {							\
 	u64 __val = native_rdmsrq_no_trace(msr);	\
 	(void)((low) = (u32)__val);			\
diff --git a/arch/x86/kernel/cpu/microcode/amd.c b/arch/x86/kernel/cpu/microcode/amd.c
index 41c553396500..f1f275ddab57 100644
--- a/arch/x86/kernel/cpu/microcode/amd.c
+++ b/arch/x86/kernel/cpu/microcode/amd.c
@@ -256,7 +256,7 @@ static u32 get_patch_level(void)
 {
 	u32 rev, dummy __always_unused;
 
-	native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
+	native_rdmsr_no_trace(MSR_AMD64_PATCH_LEVEL, rev, dummy);
 
 	return rev;
 }
diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/microcode/core.c
index b3658d11e7b6..9bda8fd987ab 100644
--- a/arch/x86/kernel/cpu/microcode/core.c
+++ b/arch/x86/kernel/cpu/microcode/core.c
@@ -84,7 +84,7 @@ static bool amd_check_current_patch_level(void)
 	u32 lvl, dummy, i;
 	u32 *levels;
 
-	native_rdmsr(MSR_AMD64_PATCH_LEVEL, lvl, dummy);
+	native_rdmsr_no_trace(MSR_AMD64_PATCH_LEVEL, lvl, dummy);
 
 	levels = final_levels;
 
diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c
index 26e13dc4cedd..c0307b1ad63d 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -78,7 +78,7 @@ void intel_collect_cpu_info(struct cpu_signature *sig)
 		unsigned int val[2];
 
 		/* get processor flags from MSR 0x17 */
-		native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
+		native_rdmsr_no_trace(MSR_IA32_PLATFORM_ID, val[0], val[1]);
 		sig->pf = 1 << ((val[1] >> 18) & 7);
 	}
 }
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
        pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com
Subject: [RFC PATCH v2 28/34] x86/msr: Rename native_write_msr_safe() to native_wrmsrq_safe()
Date: Tue, 22 Apr 2025 01:22:09 -0700
Message-ID: <20250422082216.1954310-29-xin@zytor.com>
X-Mailer: git-send-email 2.49.0
In-Reply-To: <20250422082216.1954310-1-xin@zytor.com>
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MIME-Version: 1.0
Content-Transfer-Encoding: 8bit

Signed-off-by: Xin Li (Intel) 
---
 arch/x86/include/asm/msr.h | 4 ++--
 arch/x86/kvm/svm/svm.c     | 6 +++---
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 72a1c3301d46..a1c63bed14be 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -366,7 +366,7 @@ static __always_inline int rdmsrq_safe(u32 msr, u64 *val)
  *                         __native_wrmsrq()   -----------------------
  *                            /     \                                |
  *                           /       \                               |
- *        native_wrmsrq_no_trace()    native_write_msr_safe()        |
+ *        native_wrmsrq_no_trace()    native_wrmsrq_safe()           |
  *                   /        \                                      |
  *                  /          \                                     |
  * native_wrmsr_no_trace()    native_wrmsrq()                        |
@@ -480,7 +480,7 @@ static inline void notrace native_wrmsrq(u32 msr, u64 val)
 		do_trace_write_msr(msr, val, 0);
 }
 
-static inline int notrace native_write_msr_safe(u32 msr, u64 val)
+static inline int notrace native_wrmsrq_safe(u32 msr, u64 val)
 {
 	int err = __native_wrmsrq(msr, val, EX_TYPE_WRMSR_SAFE) ? -EIO : 0;
 
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index 838606f784c9..01dd3cd20730 100644
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -486,7 +486,7 @@ static void svm_init_erratum_383(void)
 
 	val |= (1ULL << 47);
 
-	native_write_msr_safe(MSR_AMD64_DC_CFG, val);
+	native_wrmsrq_safe(MSR_AMD64_DC_CFG, val);
 
 	erratum_383_found = true;
 }
@@ -2159,11 +2159,11 @@ static bool is_erratum_383(void)
 
 	/* Clear MCi_STATUS registers */
 	for (i = 0; i < 6; ++i)
-		native_write_msr_safe(MSR_IA32_MCx_STATUS(i), 0);
+		native_wrmsrq_safe(MSR_IA32_MCx_STATUS(i), 0);
 
 	if (!native_read_msr_safe(MSR_IA32_MCG_STATUS, &value)) {
 		value &= ~(1ULL << 2);
-		native_write_msr_safe(MSR_IA32_MCG_STATUS, value);
+		native_wrmsrq_safe(MSR_IA32_MCG_STATUS, value);
 	}
 
 	/* Flush tlb to evict multi-match entries */
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
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Subject: [RFC PATCH v2 29/34] x86/msr: Rename native_rdmsrq() to native_rdmsrq_no_trace()
Date: Tue, 22 Apr 2025 01:22:10 -0700
Message-ID: <20250422082216.1954310-30-xin@zytor.com>
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native_rdmsrq() doesn't do trace thus can be used in noinstr context,
rename it to native_rdmsrq_no_trace() to make it explicit.

Signed-off-by: Xin Li (Intel) 
---
 arch/x86/boot/startup/sme.c               | 4 ++--
 arch/x86/events/amd/brs.c                 | 2 +-
 arch/x86/hyperv/hv_vtl.c                  | 4 ++--
 arch/x86/hyperv/ivm.c                     | 2 +-
 arch/x86/include/asm/mshyperv.h           | 2 +-
 arch/x86/include/asm/msr.h                | 8 ++++----
 arch/x86/include/asm/sev-internal.h       | 2 +-
 arch/x86/kernel/cpu/common.c              | 2 +-
 arch/x86/kernel/cpu/mce/core.c            | 4 ++--
 arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 2 +-
 arch/x86/kvm/vmx/vmx.c                    | 4 ++--
 11 files changed, 18 insertions(+), 18 deletions(-)

diff --git a/arch/x86/boot/startup/sme.c b/arch/x86/boot/startup/sme.c
index 5e147bf5a0a8..859d92ad91a4 100644
--- a/arch/x86/boot/startup/sme.c
+++ b/arch/x86/boot/startup/sme.c
@@ -524,7 +524,7 @@ void __head sme_enable(struct boot_params *bp)
 	me_mask = 1UL << (ebx & 0x3f);
 
 	/* Check the SEV MSR whether SEV or SME is enabled */
-	sev_status = msr = native_rdmsrq(MSR_AMD64_SEV);
+	sev_status = msr = native_rdmsrq_no_trace(MSR_AMD64_SEV);
 	feature_mask = (msr & MSR_AMD64_SEV_ENABLED) ? AMD_SEV_BIT : AMD_SME_BIT;
 
 	/*
@@ -555,7 +555,7 @@ void __head sme_enable(struct boot_params *bp)
 			return;
 
 		/* For SME, check the SYSCFG MSR */
-		msr = native_rdmsrq(MSR_AMD64_SYSCFG);
+		msr = native_rdmsrq_no_trace(MSR_AMD64_SYSCFG);
 		if (!(msr & MSR_AMD64_SYSCFG_MEM_ENCRYPT))
 			return;
 	}
diff --git a/arch/x86/events/amd/brs.c b/arch/x86/events/amd/brs.c
index 0153616a97cd..0623b6d775fb 100644
--- a/arch/x86/events/amd/brs.c
+++ b/arch/x86/events/amd/brs.c
@@ -49,7 +49,7 @@ static __always_inline void set_debug_extn_cfg(u64 val)
 
 static __always_inline u64 get_debug_extn_cfg(void)
 {
-	return native_rdmsrq(MSR_AMD_DBG_EXTN_CFG);
+	return native_rdmsrq_no_trace(MSR_AMD_DBG_EXTN_CFG);
 }
 
 static bool __init amd_brs_detect(void)
diff --git a/arch/x86/hyperv/hv_vtl.c b/arch/x86/hyperv/hv_vtl.c
index c6343e699154..9e41e380ad26 100644
--- a/arch/x86/hyperv/hv_vtl.c
+++ b/arch/x86/hyperv/hv_vtl.c
@@ -149,11 +149,11 @@ static int hv_vtl_bringup_vcpu(u32 target_vp_index, int cpu, u64 eip_ignored)
 	input->vp_context.rip = rip;
 	input->vp_context.rsp = rsp;
 	input->vp_context.rflags = 0x0000000000000002;
-	input->vp_context.efer = native_rdmsrq(MSR_EFER);
+	input->vp_context.efer = native_rdmsrq_no_trace(MSR_EFER);
 	input->vp_context.cr0 = native_read_cr0();
 	input->vp_context.cr3 = __native_read_cr3();
 	input->vp_context.cr4 = native_read_cr4();
-	input->vp_context.msr_cr_pat = native_rdmsrq(MSR_IA32_CR_PAT);
+	input->vp_context.msr_cr_pat = native_rdmsrq_no_trace(MSR_IA32_CR_PAT);
 	input->vp_context.idtr.limit = idt_ptr.size;
 	input->vp_context.idtr.base = idt_ptr.address;
 	input->vp_context.gdtr.limit = gdt_ptr.size;
diff --git a/arch/x86/hyperv/ivm.c b/arch/x86/hyperv/ivm.c
index 821609af5bd2..dfddf522e838 100644
--- a/arch/x86/hyperv/ivm.c
+++ b/arch/x86/hyperv/ivm.c
@@ -111,7 +111,7 @@ u64 hv_ghcb_hypercall(u64 control, void *input, void *output, u32 input_size)
 
 static inline u64 rd_ghcb_msr(void)
 {
-	return native_rdmsrq(MSR_AMD64_SEV_ES_GHCB);
+	return native_rdmsrq_no_trace(MSR_AMD64_SEV_ES_GHCB);
 }
 
 static inline void wr_ghcb_msr(u64 val)
diff --git a/arch/x86/include/asm/mshyperv.h b/arch/x86/include/asm/mshyperv.h
index 778444310cfb..ab94221ff38d 100644
--- a/arch/x86/include/asm/mshyperv.h
+++ b/arch/x86/include/asm/mshyperv.h
@@ -305,7 +305,7 @@ void hv_set_non_nested_msr(unsigned int reg, u64 value);
 
 static __always_inline u64 hv_raw_get_msr(unsigned int reg)
 {
-	return native_rdmsrq(reg);
+	return native_rdmsrq_no_trace(reg);
 }
 
 #else /* CONFIG_HYPERV */
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index a1c63bed14be..050d750a5ab7 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -157,7 +157,7 @@ static __always_inline bool is_msr_imm_insn(void *ip)
  *                         __native_rdmsrq()   -----------------------
  *                            /     \                                |
  *                           /       \                               |
- *               native_rdmsrq()    native_read_msr_safe()           |
+ *        native_rdmsrq_no_trace()    native_read_msr_safe()         |
  *                   /    \                                          |
  *                  /      \                                         |
  *      native_rdmsr()    native_read_msr()                          |
@@ -248,7 +248,7 @@ static __always_inline bool __native_rdmsrq(u32 msr, u64 *val, int type)
 	return __native_rdmsrq_variable(msr, val, type);
 }
 
-static __always_inline u64 native_rdmsrq(u32 msr)
+static __always_inline u64 native_rdmsrq_no_trace(u32 msr)
 {
 	u64 val = 0;
 
@@ -258,14 +258,14 @@ static __always_inline u64 native_rdmsrq(u32 msr)
 
 #define native_rdmsr(msr, low, high)			\
 do {							\
-	u64 __val = native_rdmsrq(msr);			\
+	u64 __val = native_rdmsrq_no_trace(msr);	\
 	(void)((low) = (u32)__val);			\
 	(void)((high) = (u32)(__val >> 32));		\
 } while (0)
 
 static inline u64 native_read_msr(u32 msr)
 {
-	u64 val = native_rdmsrq(msr);
+	u64 val = native_rdmsrq_no_trace(msr);
 
 	if (tracepoint_enabled(read_msr))
 		do_trace_read_msr(msr, val, 0);
diff --git a/arch/x86/include/asm/sev-internal.h b/arch/x86/include/asm/sev-internal.h
index 7eb030702435..743da9fc7454 100644
--- a/arch/x86/include/asm/sev-internal.h
+++ b/arch/x86/include/asm/sev-internal.h
@@ -96,7 +96,7 @@ int svsm_perform_call_protocol(struct svsm_call *call);
 
 static inline u64 sev_es_rd_ghcb_msr(void)
 {
-	return native_rdmsrq(MSR_AMD64_SEV_ES_GHCB);
+	return native_rdmsrq_no_trace(MSR_AMD64_SEV_ES_GHCB);
 }
 
 static __always_inline void sev_es_wr_ghcb_msr(u64 val)
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 99d8a8c15ba5..9d2de568cb96 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -164,7 +164,7 @@ static void ppin_init(struct cpuinfo_x86 *c)
 
 	/* Is the enable bit set? */
 	if (val & 2UL) {
-		c->ppin = native_rdmsrq(info->msr_ppin);
+		c->ppin = native_rdmsrq_no_trace(info->msr_ppin);
 		set_cpu_cap(c, info->feature);
 		return;
 	}
diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
index bd3cb984ccb9..9f7538b9d2fa 100644
--- a/arch/x86/kernel/cpu/mce/core.c
+++ b/arch/x86/kernel/cpu/mce/core.c
@@ -121,7 +121,7 @@ void mce_prep_record_common(struct mce *m)
 {
 	m->cpuid	= cpuid_eax(1);
 	m->cpuvendor	= boot_cpu_data.x86_vendor;
-	m->mcgcap	= native_rdmsrq(MSR_IA32_MCG_CAP);
+	m->mcgcap	= native_rdmsrq_no_trace(MSR_IA32_MCG_CAP);
 	/* need the internal __ version to avoid deadlocks */
 	m->time		= __ktime_get_real_seconds();
 }
@@ -1313,7 +1313,7 @@ static noinstr bool mce_check_crashing_cpu(void)
 	    (crashing_cpu != -1 && crashing_cpu != cpu)) {
 		u64 mcgstatus;
 
-		mcgstatus = native_rdmsrq(MSR_IA32_MCG_STATUS);
+		mcgstatus = native_rdmsrq_no_trace(MSR_IA32_MCG_STATUS);
 
 		if (boot_cpu_data.x86_vendor == X86_VENDOR_ZHAOXIN) {
 			if (mcgstatus & MCG_STATUS_LMCES)
diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
index 184bc1b3fb02..819c07a23c6d 100644
--- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
+++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
@@ -482,7 +482,7 @@ int resctrl_arch_pseudo_lock_fn(void *_plr)
 	 * the buffer and evict pseudo-locked memory read earlier from the
 	 * cache.
 	 */
-	saved_msr = native_rdmsrq(MSR_MISC_FEATURE_CONTROL);
+	saved_msr = native_rdmsrq_no_trace(MSR_MISC_FEATURE_CONTROL);
 	native_wrmsrq_no_trace(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits);
 	closid_p = this_cpu_read(pqr_state.cur_closid);
 	rmid_p = this_cpu_read(pqr_state.cur_rmid);
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index b53575dee64a..cdbbfa0b9851 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -380,7 +380,7 @@ static __always_inline void vmx_disable_fb_clear(struct vcpu_vmx *vmx)
 	if (!vmx->disable_fb_clear)
 		return;
 
-	msr = native_rdmsrq(MSR_IA32_MCU_OPT_CTRL);
+	msr = native_rdmsrq_no_trace(MSR_IA32_MCU_OPT_CTRL);
 	msr |= FB_CLEAR_DIS;
 	native_wrmsrq_no_trace(MSR_IA32_MCU_OPT_CTRL, msr);
 	/* Cache the MSR value to avoid reading it later */
@@ -7307,7 +7307,7 @@ void noinstr vmx_spec_ctrl_restore_host(struct vcpu_vmx *vmx,
 		return;
 
 	if (flags & VMX_RUN_SAVE_SPEC_CTRL)
-		vmx->spec_ctrl = native_rdmsrq(MSR_IA32_SPEC_CTRL);
+		vmx->spec_ctrl = native_rdmsrq_no_trace(MSR_IA32_SPEC_CTRL);
 
 	/*
 	 * If the guest/host SPEC_CTRL values differ, restore the host value.
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
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        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com
Subject: [RFC PATCH v2 20/34] x86/extable: Implement EX_TYPE_FUNC_REWIND
Date: Tue, 22 Apr 2025 01:22:01 -0700
Message-ID: <20250422082216.1954310-21-xin@zytor.com>
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From: "H. Peter Anvin (Intel)" 

Add a new exception type, which allows emulating an exception as if it
had happened at or near the call site of a function.  This allows a
function call inside an alternative for instruction emulation to "kick
back" the exception into the alternatives pattern, possibly invoking a
different exception handling pattern there, or at least indicating the
"real" location of the fault.

Signed-off-by: H. Peter Anvin (Intel) 
Signed-off-by: Xin Li (Intel) 
---
 arch/x86/include/asm/asm.h                 |   6 +
 arch/x86/include/asm/extable_fixup_types.h |   1 +
 arch/x86/mm/extable.c                      | 135 +++++++++++++--------
 3 files changed, 91 insertions(+), 51 deletions(-)

diff --git a/arch/x86/include/asm/asm.h b/arch/x86/include/asm/asm.h
index a9f07799e337..722340d7c1af 100644
--- a/arch/x86/include/asm/asm.h
+++ b/arch/x86/include/asm/asm.h
@@ -243,5 +243,11 @@ register unsigned long current_stack_pointer asm(_ASM_SP);
 #define _ASM_EXTABLE_FAULT(from, to)				\
 	_ASM_EXTABLE_TYPE(from, to, EX_TYPE_FAULT)
 
+#define _ASM_EXTABLE_FUNC_REWIND(from, ipdelta, spdelta)	\
+	_ASM_EXTABLE_TYPE(from, from /* unused */,		\
+			  EX_TYPE_FUNC_REWIND |			\
+			  EX_DATA_REG(spdelta) |		\
+			  EX_DATA_IMM(ipdelta))
+
 #endif /* __KERNEL__ */
 #endif /* _ASM_X86_ASM_H */
diff --git a/arch/x86/include/asm/extable_fixup_types.h b/arch/x86/include/asm/extable_fixup_types.h
index 906b0d5541e8..9cd1cea45052 100644
--- a/arch/x86/include/asm/extable_fixup_types.h
+++ b/arch/x86/include/asm/extable_fixup_types.h
@@ -67,5 +67,6 @@
 #define	EX_TYPE_ZEROPAD			20 /* longword load with zeropad on fault */
 
 #define	EX_TYPE_ERETU			21
+#define	EX_TYPE_FUNC_REWIND		22
 
 #endif
diff --git a/arch/x86/mm/extable.c b/arch/x86/mm/extable.c
index f1743babafc8..6bf4c2a43c2c 100644
--- a/arch/x86/mm/extable.c
+++ b/arch/x86/mm/extable.c
@@ -319,6 +319,27 @@ static bool ex_handler_eretu(const struct exception_table_entry *fixup,
 }
 #endif
 
+/*
+ * Emulate a fault taken at the call site of a function.
+ *
+ * The combined reg and flags field are used as an unsigned number of
+ * machine words to pop off the stack before the return address, then
+ * the signed imm field is used as a delta from the return IP address.
+ */
+static bool ex_handler_func_rewind(struct pt_regs *regs, int data)
+{
+	const long ipdelta = FIELD_GET(EX_DATA_IMM_MASK, data);
+	const unsigned long pops = FIELD_GET(EX_DATA_REG_MASK | EX_DATA_FLAG_MASK, data);
+	unsigned long *sp;
+
+	sp = (unsigned long *)regs->sp;
+	sp += pops;
+	regs->ip = *sp++ + ipdelta;
+	regs->sp = (unsigned long)sp;
+
+	return true;
+}
+
 int ex_get_fixup_type(unsigned long ip)
 {
 	const struct exception_table_entry *e = search_exception_tables(ip);
@@ -331,6 +352,7 @@ int fixup_exception(struct pt_regs *regs, int trapnr, unsigned long error_code,
 {
 	const struct exception_table_entry *e;
 	int type, reg, imm;
+	bool again;
 
 #ifdef CONFIG_PNPBIOS
 	if (unlikely(SEGMENT_IS_PNP_CODE(regs->cs))) {
@@ -346,60 +368,71 @@ int fixup_exception(struct pt_regs *regs, int trapnr, unsigned long error_code,
 	}
 #endif
 
-	e = search_exception_tables(regs->ip);
-	if (!e)
-		return 0;
-
-	type = FIELD_GET(EX_DATA_TYPE_MASK, e->data);
-	reg  = FIELD_GET(EX_DATA_REG_MASK,  e->data);
-	imm  = FIELD_GET(EX_DATA_IMM_MASK,  e->data);
-
-	switch (type) {
-	case EX_TYPE_DEFAULT:
-	case EX_TYPE_DEFAULT_MCE_SAFE:
-		return ex_handler_default(e, regs);
-	case EX_TYPE_FAULT:
-	case EX_TYPE_FAULT_MCE_SAFE:
-		return ex_handler_fault(e, regs, trapnr);
-	case EX_TYPE_UACCESS:
-		return ex_handler_uaccess(e, regs, trapnr, fault_addr);
-	case EX_TYPE_CLEAR_FS:
-		return ex_handler_clear_fs(e, regs);
-	case EX_TYPE_FPU_RESTORE:
-		return ex_handler_fprestore(e, regs);
-	case EX_TYPE_BPF:
-		return ex_handler_bpf(e, regs);
-	case EX_TYPE_WRMSR:
-		return ex_handler_msr(e, regs, true, false, reg);
-	case EX_TYPE_RDMSR:
-		return ex_handler_msr(e, regs, false, false, reg);
-	case EX_TYPE_WRMSR_SAFE:
-		return ex_handler_msr(e, regs, true, true, reg);
-	case EX_TYPE_RDMSR_SAFE:
-		return ex_handler_msr(e, regs, false, true, reg);
-	case EX_TYPE_WRMSR_IN_MCE:
-		ex_handler_msr_mce(regs, true);
-		break;
-	case EX_TYPE_RDMSR_IN_MCE:
-		ex_handler_msr_mce(regs, false);
-		break;
-	case EX_TYPE_POP_REG:
-		regs->sp += sizeof(long);
-		fallthrough;
-	case EX_TYPE_IMM_REG:
-		return ex_handler_imm_reg(e, regs, reg, imm);
-	case EX_TYPE_FAULT_SGX:
-		return ex_handler_sgx(e, regs, trapnr);
-	case EX_TYPE_UCOPY_LEN:
-		return ex_handler_ucopy_len(e, regs, trapnr, fault_addr, reg, imm);
-	case EX_TYPE_ZEROPAD:
-		return ex_handler_zeropad(e, regs, fault_addr);
+	do {
+		e = search_exception_tables(regs->ip);
+		if (!e)
+			return 0;
+
+		again = false;
+
+		type = FIELD_GET(EX_DATA_TYPE_MASK, e->data);
+		reg  = FIELD_GET(EX_DATA_REG_MASK,  e->data);
+		imm  = FIELD_GET(EX_DATA_IMM_MASK,  e->data);
+
+		switch (type) {
+		case EX_TYPE_DEFAULT:
+		case EX_TYPE_DEFAULT_MCE_SAFE:
+			return ex_handler_default(e, regs);
+		case EX_TYPE_FAULT:
+		case EX_TYPE_FAULT_MCE_SAFE:
+			return ex_handler_fault(e, regs, trapnr);
+		case EX_TYPE_UACCESS:
+			return ex_handler_uaccess(e, regs, trapnr, fault_addr);
+		case EX_TYPE_CLEAR_FS:
+			return ex_handler_clear_fs(e, regs);
+		case EX_TYPE_FPU_RESTORE:
+			return ex_handler_fprestore(e, regs);
+		case EX_TYPE_BPF:
+			return ex_handler_bpf(e, regs);
+		case EX_TYPE_WRMSR:
+			return ex_handler_msr(e, regs, true, false, reg);
+		case EX_TYPE_RDMSR:
+			return ex_handler_msr(e, regs, false, false, reg);
+		case EX_TYPE_WRMSR_SAFE:
+			return ex_handler_msr(e, regs, true, true, reg);
+		case EX_TYPE_RDMSR_SAFE:
+			return ex_handler_msr(e, regs, false, true, reg);
+		case EX_TYPE_WRMSR_IN_MCE:
+			ex_handler_msr_mce(regs, true);
+			break;
+		case EX_TYPE_RDMSR_IN_MCE:
+			ex_handler_msr_mce(regs, false);
+			break;
+		case EX_TYPE_POP_REG:
+			regs->sp += sizeof(long);
+			fallthrough;
+		case EX_TYPE_IMM_REG:
+			return ex_handler_imm_reg(e, regs, reg, imm);
+		case EX_TYPE_FAULT_SGX:
+			return ex_handler_sgx(e, regs, trapnr);
+		case EX_TYPE_UCOPY_LEN:
+			return ex_handler_ucopy_len(e, regs, trapnr, fault_addr, reg, imm);
+		case EX_TYPE_ZEROPAD:
+			return ex_handler_zeropad(e, regs, fault_addr);
 #ifdef CONFIG_X86_FRED
-	case EX_TYPE_ERETU:
-		return ex_handler_eretu(e, regs, error_code);
+		case EX_TYPE_ERETU:
+			return ex_handler_eretu(e, regs, error_code);
 #endif
-	}
+		case EX_TYPE_FUNC_REWIND:
+			again = ex_handler_func_rewind(regs, e->data);
+			break;
+		default:
+			break;	/* Will BUG() */
+		}
+	} while (again);
+
 	BUG();
+	return 0;
 }
 
 extern unsigned int early_recursion_flag;
-- 
2.49.0



From xen-devel-bounces@lists.xenproject.org Tue Apr 22 08:34:34 2025
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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
        pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com
Subject: [RFC PATCH v2 02/34] x86/msr: Remove rdpmc()
Date: Tue, 22 Apr 2025 01:21:43 -0700
Message-ID: <20250422082216.1954310-3-xin@zytor.com>
X-Mailer: git-send-email 2.49.0
In-Reply-To: <20250422082216.1954310-1-xin@zytor.com>
References: <20250422082216.1954310-1-xin@zytor.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit

rdpmc() is not used anywhere, remove it.

Signed-off-by: Xin Li (Intel) 
---
 arch/x86/include/asm/msr.h      | 7 -------
 arch/x86/include/asm/paravirt.h | 7 -------
 2 files changed, 14 deletions(-)

diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 2caa13830e11..e05466e486fc 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -234,13 +234,6 @@ static inline int rdmsrq_safe(u32 msr, u64 *p)
 	return err;
 }
 
-#define rdpmc(counter, low, high)			\
-do {							\
-	u64 _l = native_read_pmc((counter));		\
-	(low)  = (u32)_l;				\
-	(high) = (u32)(_l >> 32);			\
-} while (0)
-
 #define rdpmcl(counter, val) ((val) = native_read_pmc(counter))
 
 #endif	/* !CONFIG_PARAVIRT_XXL */
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index 86a77528792d..c4dedb984735 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -244,13 +244,6 @@ static inline u64 paravirt_read_pmc(int counter)
 	return PVOP_CALL1(u64, cpu.read_pmc, counter);
 }
 
-#define rdpmc(counter, low, high)		\
-do {						\
-	u64 _l = paravirt_read_pmc(counter);	\
-	low = (u32)_l;				\
-	high = _l >> 32;			\
-} while (0)
-
 #define rdpmcl(counter, val) ((val) = paravirt_read_pmc(counter))
 
 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
-- 
2.49.0



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MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [RFC PATCH v2 06/34] x86/msr: Use the alternatives mechanism to
 read PMC
To: "Xin Li (Intel)" , linux-kernel@vger.kernel.org,
 kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
 linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
 linux-pm@vger.kernel.org, linux-edac@vger.kernel.org,
 xen-devel@lists.xenproject.org, linux-acpi@vger.kernel.org,
 linux-hwmon@vger.kernel.org, netdev@vger.kernel.org,
 platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
 dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, acme@kernel.org,
 andrew.cooper3@citrix.com, peterz@infradead.org, namhyung@kernel.org,
 mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org,
 irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
 wei.liu@kernel.org, ajay.kaher@broadcom.com,
 bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
 pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
 luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
 haiyangz@microsoft.com, decui@microsoft.com
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-7-xin@zytor.com>
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To: "Xin Li (Intel)" , linux-kernel@vger.kernel.org,
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Message-ID: 
Subject: Re: [RFC PATCH v2 06/34] x86/msr: Use the alternatives mechanism to
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To: "Xin Li (Intel)" , linux-kernel@vger.kernel.org,
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Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
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Message-ID: <72f5c841-f710-42a6-8236-fdf2a8e4c8dc@suse.com>
Subject: Re: [RFC PATCH v2 05/34] x86/msr: Return u64 consistently in Xen PMC
 read functions
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-6-xin@zytor.com>
In-Reply-To: <20250422082216.1954310-6-xin@zytor.com>

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Date: Tue, 22 Apr 2025 10:40:59 +0200
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Subject: Re: [PATCH v1 03/14] xen/riscv: introduce ioremap()
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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References: 
 <6d91eeabe2735de93bfcf2a2420e2059a8f35e52.1744126720.git.oleksii.kurochko@gmail.com>
 <84089b6d-efeb-4613-85b9-eb10d11d7338@suse.com>
 
 <6b226b72-11a4-4004-b42d-0e280de83539@suse.com>
 
 
 <7d5356a5-53b7-4d1b-82ff-bc6f81a2f445@gmail.com>
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In-Reply-To: <6f50dea4-60e6-46b0-9363-d943ba553334@suse.com>

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On 4/17/25 4:49 PM, Jan Beulich wrote:
> On 17.04.2025 16:37, Oleksii Kurochko wrote:
>> On 4/17/25 4:24 PM, Jan Beulich wrote:
>>> On 17.04.2025 16:20, Oleksii Kurochko wrote:
>>>> On 4/15/25 1:02 PM, Jan Beulich wrote:
>>>>> On 15.04.2025 12:29, Oleksii Kurochko wrote:
>>>>>> On 4/10/25 5:13 PM, Jan Beulich wrote:
>>>>>>> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>>>>>>>> Based on RISC-V unpriviliged spec ( Version 20240411 ):
>>>>>>>> ```
>>>>>>>> For implementations that conform to the RISC-V Unix Platform Specification,
>>>>>>>> I/O devices and DMA operations are required to access memory coherently and
>>>>>>>> via strongly ordered I/O channels. Therefore, accesses to regular main memory
>>>>>>>> regions that are concurrently accessed by external devices can also use the
>>>>>>>> standard synchronization mechanisms. Implementations that do not conform
>>>>>>>> to the Unix Platform Specification and/or in which devices do not access
>>>>>>>> memory coherently will need to use mechanisms
>>>>>>>> (which are currently platform-specific or device-specific) to enforce
>>>>>>>> coherency.
>>>>>>>>
>>>>>>>> I/O regions in the address space should be considered non-cacheable
>>>>>>>> regions in the PMAs for those regions. Such regions can be considered coherent
>>>>>>>> by the PMA if they are not cached by any agent.
>>>>>>>> ```
>>>>>>>> and [1]:
>>>>>>>> ```
>>>>>>>> The current riscv linux implementation requires SOC system to support
>>>>>>>> memory coherence between all I/O devices and CPUs. But some SOC systems
>>>>>>>> cannot maintain the coherence and they need support cache clean/invalid
>>>>>>>> operations to synchronize data.
>>>>>>>>
>>>>>>>> Current implementation is no problem with SiFive FU540, because FU540
>>>>>>>> keeps all IO devices and DMA master devices coherence with CPU. But to a
>>>>>>>> traditional SOC vendor, it may already have a stable non-coherency SOC
>>>>>>>> system, the need is simply to replace the CPU with RV CPU and rebuild
>>>>>>>> the whole system with IO-coherency is very expensive.
>>>>>>>> ```
>>>>>>>>
>>>>>>>> and the fact that all known ( to me ) CPUs that support the H-extension
>>>>>>>> and that ones is going to be supported by Xen have memory coherency
>>>>>>>> between all I/O devices and CPUs, so it is currently safe to use the
>>>>>>>> PAGE_HYPERVISOR attribute.
>>>>>>>> However, in cases where a platform does not support memory coherency, it
>>>>>>>> should support CMO extensions and Svpbmt. In this scenario, updates to
>>>>>>>> ioremap will be necessary.
>>>>>>>> For now, a compilation error will be generated to ensure that the need to
>>>>>>>> update ioremap() is not overlooked.
>>>>>>>>
>>>>>>>> [1]https://patchwork.kernel.org/project/linux-riscv/patch/1555947870-23014-1-git-send-email-guoren@kernel.org/
>>>>>>> But MMIO access correctness isn't just a matter of coherency. There may not
>>>>>>> be any caching involved in most cases, or else you may observe significantly
>>>>>>> delayed or even dropped (folded with later ones) writes, and reads may be
>>>>>>> serviced from the cache instead of going to actual MMIO. Therefore ...
>>>>>>>
>>>>>>>> --- a/xen/arch/riscv/Kconfig
>>>>>>>> +++ b/xen/arch/riscv/Kconfig
>>>>>>>> @@ -15,6 +15,18 @@ config ARCH_DEFCONFIG
>>>>>>>>      	string
>>>>>>>>      	default "arch/riscv/configs/tiny64_defconfig"
>>>>>>>>      
>>>>>>>> +config HAS_SVPBMT
>>>>>>>> +	bool
>>>>>>>> +	help
>>>>>>>> +	  This config enables usage of Svpbmt ISA-extension ( Supervisor-mode:
>>>>>>>> +	  page-based memory types).
>>>>>>>> +
>>>>>>>> +	  The memory type for a page contains a combination of attributes
>>>>>>>> +	  that indicate the cacheability, idempotency, and ordering
>>>>>>>> +	  properties for access to that page.
>>>>>>>> +
>>>>>>>> +	  The Svpbmt extension is only available on 64-bit cpus.
>>>>>>> ... I kind of expect this extension (or anything else that there might be) will need
>>>>>>> making use of.
>>>>>> In cases where the Svpbmt extension isn't available, PMA (Physical Memory Attributes)
>>>>>> is used to control which memory regions are cacheable, non-cacheable, readable, writable,
>>>>>> etc. PMA is configured in M-mode by the firmware (e.g., OpenSBI), as is done in Andes
>>>>>> cores, or it can be fixed at design time, as in SiFive cores.
>>>>> How would things work if there was a need to map a RAM page uncacheable (via
>>>>> ioremap() or otherwise)?
>>>> My understanding is that Svpbmt is only needed when someone wants to change the memory
>>>> attribute of a page set by PMA.
>>>>
>>>> The question is if non-cacheable RAM page is really needed if we have a coherency?
>>> Aiui coherency here is among CPUs.
>> ```
>> For implementations that conform to the RISC-V Unix Platform Specification,
>> I/O devices and DMA operations are required to access memory coherently and
>> via strongly ordered I/O channels. Therefore, accesses to regular main memory
>> regions that are concurrently accessed by external devices can also use the
>> standard synchronization mechanisms. Implementations that do not conform
>> to the Unix Platform Specification and/or in which devices do not access
>> memory coherently will need to use mechanisms
>> (which are currently platform-specific or device-specific) to enforce
>> coherency.
>> ```
>> Based on this from the spec, coherency here is not only among CPUs.
>>
>>
>>> Properties of devices in the system are
>>> largely unknown?
>> Yes, but still not sure what kind of property requires ioremap() which won't work
>> without Svpmbt. Could you please tell me an example?
> Well, above you said they all need to access memory coherently. That's the
> "property" I was referring to.

Do you mean that device could have a property which tell that it would like to have non-cachable
region used for that? I haven't seen such property in device tree files.

Do we have in Xen cases when Xen wants to have map part of RAM as non-cachebale and it is only the
one option?

I am also thinking why it can't be used cachable region + barrier (if we don't have memory coherency
for everything).

Anyway, if it isn't an option to have mapped cacheble region + barrier then there is no any choice
and the support of Svpmbt is required.

>
>>> (Beyond this there may also be special situations in which
>>> one really cares about data going directly to RAM.)
>> If there are such special cases, I assume that the firmware or hardware (in the case
>> of fixed PMA) will provide a non-cacheable region.
> How could they? Firmware may be unaware of specific properties of specific
> devices a user adds to a system.

(this is not real case, just thoughts) Firmware could by default provide part of RAM as
non-cacheable region and then hypervisor/kernel use this region for allocation. But I agree
that it isn't the best thing to manage that.


~ Oleksii

>> In that case, the user should be
>> aware of this region and use it for those specific scenarios.
>>
>> ~ Oleksii
>>
--------------Ho6TGRJ0d0m5hKpEbce6puvQ
Content-Type: text/html; charset=UTF-8
Content-Transfer-Encoding: 7bit



  
    
  
  
    


    

    
On 4/17/25 4:49 PM, Jan Beulich wrote:

    

    

      
On 17.04.2025 16:37, Oleksii Kurochko wrote:


      

        
On 4/17/25 4:24 PM, Jan Beulich wrote:


        

          
On 17.04.2025 16:20, Oleksii Kurochko wrote:


          

            
On 4/15/25 1:02 PM, Jan Beulich wrote:


            

              
On 15.04.2025 12:29, Oleksii Kurochko wrote:


              

                
On 4/10/25 5:13 PM, Jan Beulich wrote:


                

                  
On 08.04.2025 17:57, Oleksii Kurochko wrote:


                  

                    
Based on RISC-V unpriviliged spec ( Version 20240411 ):
```
For implementations that conform to the RISC-V Unix Platform Specification,
I/O devices and DMA operations are required to access memory coherently and
via strongly ordered I/O channels. Therefore, accesses to regular main memory
regions that are concurrently accessed by external devices can also use the
standard synchronization mechanisms. Implementations that do not conform
to the Unix Platform Specification and/or in which devices do not access
memory coherently will need to use mechanisms
(which are currently platform-specific or device-specific) to enforce
coherency.

I/O regions in the address space should be considered non-cacheable
regions in the PMAs for those regions. Such regions can be considered coherent
by the PMA if they are not cached by any agent.
```
and [1]:
```
The current riscv linux implementation requires SOC system to support
memory coherence between all I/O devices and CPUs. But some SOC systems
cannot maintain the coherence and they need support cache clean/invalid
operations to synchronize data.

Current implementation is no problem with SiFive FU540, because FU540
keeps all IO devices and DMA master devices coherence with CPU. But to a
traditional SOC vendor, it may already have a stable non-coherency SOC
system, the need is simply to replace the CPU with RV CPU and rebuild
the whole system with IO-coherency is very expensive.
```

and the fact that all known ( to me ) CPUs that support the H-extension
and that ones is going to be supported by Xen have memory coherency
between all I/O devices and CPUs, so it is currently safe to use the
PAGE_HYPERVISOR attribute.
However, in cases where a platform does not support memory coherency, it
should support CMO extensions and Svpbmt. In this scenario, updates to
ioremap will be necessary.
For now, a compilation error will be generated to ensure that the need to
update ioremap() is not overlooked.

[1]https://patchwork.kernel.org/project/linux-riscv/patch/1555947870-23014-1-git-send-email-guoren@kernel.org/


                  

                  
But MMIO access correctness isn't just a matter of coherency. There may not
be any caching involved in most cases, or else you may observe significantly
delayed or even dropped (folded with later ones) writes, and reads may be
serviced from the cache instead of going to actual MMIO. Therefore ...



                  

                    
--- a/xen/arch/riscv/Kconfig
+++ b/xen/arch/riscv/Kconfig
@@ -15,6 +15,18 @@ config ARCH_DEFCONFIG
    	string
    	default "arch/riscv/configs/tiny64_defconfig"
    
+config HAS_SVPBMT
+	bool
+	help
+	  This config enables usage of Svpbmt ISA-extension ( Supervisor-mode:
+	  page-based memory types).
+
+	  The memory type for a page contains a combination of attributes
+	  that indicate the cacheability, idempotency, and ordering
+	  properties for access to that page.
+
+	  The Svpbmt extension is only available on 64-bit cpus.


                  

                  
... I kind of expect this extension (or anything else that there might be) will need
making use of.


                

                
In cases where the Svpbmt extension isn't available, PMA (Physical Memory Attributes)
is used to control which memory regions are cacheable, non-cacheable, readable, writable,
etc. PMA is configured in M-mode by the firmware (e.g., OpenSBI), as is done in Andes
cores, or it can be fixed at design time, as in SiFive cores.


              

              
How would things work if there was a need to map a RAM page uncacheable (via
ioremap() or otherwise)?


            

            
My understanding is that Svpbmt is only needed when someone wants to change the memory
attribute of a page set by PMA.

The question is if non-cacheable RAM page is really needed if we have a coherency?


          

          
Aiui coherency here is among CPUs.


        

        
```
For implementations that conform to the RISC-V Unix Platform Specification,
I/O devices and DMA operations are required to access memory coherently and
via strongly ordered I/O channels. Therefore, accesses to regular main memory
regions that are concurrently accessed by external devices can also use the
standard synchronization mechanisms. Implementations that do not conform
to the Unix Platform Specification and/or in which devices do not access
memory coherently will need to use mechanisms
(which are currently platform-specific or device-specific) to enforce
coherency.
```
Based on this from the spec, coherency here is not only among CPUs.




        

          
Properties of devices in the system are
largely unknown?


        

        
Yes, but still not sure what kind of property requires ioremap() which won't work
without Svpmbt. Could you please tell me an example?


      

      
Well, above you said they all need to access memory coherently. That's the
"property" I was referring to.

    

    
Do you mean that device could have a property which tell that it would like to have non-cachable
region used for that? I haven't seen such property in device tree files.

Do we have in Xen cases when Xen wants to have map part of RAM as non-cachebale and it is only the
one option?

I am also thinking why it can't be used cachable region + barrier (if we don't have memory coherency
for everything).

Anyway, if it isn't an option to have mapped cacheble region + barrier then there is no any choice
and the support of Svpmbt is required.



    

      



      

        

          
(Beyond this there may also be special situations in which
one really cares about data going directly to RAM.)


        

        
If there are such special cases, I assume that the firmware or hardware (in the case
of fixed PMA) will provide a non-cacheable region.


      

      
How could they? Firmware may be unaware of specific properties of specific
devices a user adds to a system.

    

    
(this is not real case, just thoughts) Firmware could by default provide part of RAM as
non-cacheable region and then hypervisor/kernel use this region for allocation. But I agree
that it isn't the best thing to manage that.


~ Oleksii

    

      

        
In that case, the user should be
aware of this region and use it for those specific scenarios.

~ Oleksii



      

      

    

  


--------------Ho6TGRJ0d0m5hKpEbce6puvQ--


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From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= 
To: "Xin Li (Intel)" , linux-kernel@vger.kernel.org,
 kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
 linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
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 xen-devel@lists.xenproject.org, linux-acpi@vger.kernel.org,
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Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
 dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, acme@kernel.org,
 andrew.cooper3@citrix.com, peterz@infradead.org, namhyung@kernel.org,
 mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org,
 irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
 wei.liu@kernel.org, ajay.kaher@broadcom.com,
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 haiyangz@microsoft.com, decui@microsoft.com
Message-ID: <91f9217a-cc2d-4a6e-bada-290312f73d82@suse.com>
Subject: Re: [RFC PATCH v2 22/34] x86/msr: Utilize the alternatives mechanism
 to read MSR
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-23-xin@zytor.com>
In-Reply-To: <20250422082216.1954310-23-xin@zytor.com>

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Subject: Re: [PATCH] x86/AMD: Convert rdmsr_amd_safe() to use asm goto()
To: Andrew Cooper 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Xen-devel 
References: <20250407153510.1863243-1-andrew.cooper3@citrix.com>
 <1df6b4c9-7309-49cd-8046-019d94139c57@suse.com>
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From: Jan Beulich 
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On 17.04.2025 19:24, Andrew Cooper wrote:
> On 07/04/2025 4:48 pm, Jan Beulich wrote:
>> On 07.04.2025 17:35, Andrew Cooper wrote:
>>> Unlike the WRMSR side, we can't use asm goto() unconditionally, because our
>>> toolchain baseline doesn't support asm goto with outputs.
>> Is there actually a benefit we gain from now needing to maintain two different
>> pieces of logic fulfilling the same purpose?
> 
> IMO, yes.  Besides getting rid of .fixup/unlikely, the code generation
> is better-enough to warrant it, including getting the common path
> correct (the referenced labels are all considered cold).
> 
> e.g. for this change, we go from:
> 
>     xor    %esi,%esi
>     rdmsr
>     test   %esi,%esi
>     jne    
>     and    $0xfffffffe,%edx
>     wrmsr
> 
> (note the forward branch) to simply:
> 
>     rdmsr
>     and    $0xfffffffe,%edx
>     wrmsr
> 
> because the exception table redirect is directly into init_amd.cold, and
> we don't have to hold `int err` in a register across the asm() block.
> 
> This is an intentionally simple example to get the infrastructure in,
> but vmread() will definitely benefit.
> 
>>
>>> Also, there's a different errata workaround we'll need if we want to use asm
>>> goto() with "+" constraints:
>>>
>>> config CC_HAS_ASM_GOTO_TIED_OUTPUT
>>> 	depends on CC_HAS_ASM_GOTO_OUTPUT
>>> 	# Detect buggy gcc and clang, fixed in gcc-11 clang-14.
>>> 	def_bool $(success,echo 'int foo(int *x) { asm goto (".long (%l[bar]) - .": "+m"(*x) ::: bar); return *x; bar: return 0; }' | $CC -x c - -c -o /dev/null)
>>>
>>> I'm tempted to put it in straight away, lest we forget about it.
>> Perhaps best if we really want to go this route. Yet then - why "TIED"? Isn't
>> "tied" the term they use when referring to an earlier operand by using a
>> digit (or the operand's name in square brackets)?
> 
> This is straight from Linux.  I've not looked at the issue in detail.

So what I see is that Sean in Linux commit 1aa0e8b144b6 uses this term also
in the description. I'm unconvinced it's correct, though. Gcc doc doesn't
call the "+" modifier anything special, and it calls the numeric constraints
(for which "+" can be a shorthand in certain cases) "matching constraint".

We can of course sort the naming in the eventual patch pulling in that
behavior, yet I'd like to suggest already now that we don't blindly follow
Linux'es naming (unless the choice can be backed by some doc reference).

>>> --- a/xen/Kconfig
>>> +++ b/xen/Kconfig
>>> @@ -41,6 +41,20 @@ config CC_SPLIT_SECTIONS
>>>  config CC_HAS_UBSAN
>>>  	def_bool $(cc-option,-fsanitize=undefined)
>>>  
>>> +# Fixed in GCC 14, 13.3, 12.4 and 11.5
>>> +# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113921
>>> +config GCC_ASM_GOTO_OUTPUT_BROKEN
>>> +	bool
>>> +	depends on CC_IS_GCC
>>> +	default y if GCC_VERSION < 110500
>>> +	default y if GCC_VERSION >= 120000 && GCC_VERSION < 120400
>>> +	default y if GCC_VERSION >= 130000 && GCC_VERSION < 130300
>> Unlike for pre-release versions (x.0.y) I view this as problematic. Distros
>> are likely to have backported the fix before the minor releases took place.
>> Or they may have backported without ever meaning to follow later minor
>> releases. We'd needlessly exclude them here. Imo ...
>>
>>> +config CC_HAS_ASM_GOTO_OUTPUT
>>> +	def_bool y
>>> +	depends on !GCC_ASM_GOTO_OUTPUT_BROKEN
>>> +	depends on $(success,echo 'int foo(int x) { asm goto ("": "=r"(x) ::: bar); return x; bar: return 0; }' | $(CC) -x c - -c -o /dev/null)
>> ... the only option is to actually probe for support as well as the (non-)
>> buggy-ness.
> 
> There is no sensible way to probe.  It compiles fine, but (AIUI) fails
> to spill registers correctly on some paths, which also makes it very
> sensitive to other optimisations.

Hmm, okay, Linux commit f2f6a8e88717 kind of suggests that there might have
been more issues in gcc. Really I can't help the impression that the issue
still wasn't fully understood, and hence may re-surface in another context.
In which case I guess I agree the above is the best we can do for the time
being, until we learn of further breakage:
Reviewed-by: Jan Beulich 

Jan


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Subject: Re: [PATCH v2] xen-netfront: handle NULL returned by
 xdp_convert_buff_to_frame()
From: patchwork-bot+netdevbpf@kernel.org
Message-Id: 
 <174531300924.1477965.13156830298760999777.git-patchwork-notify@kernel.org>
Date: Tue, 22 Apr 2025 09:10:09 +0000
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To: Alexey Nepomnyashih 
Cc: jgross@suse.com, sstabellini@kernel.org, oleksandr_tyshchenko@epam.com,
 davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com,
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Hello:

This patch was applied to netdev/net.git (main)
by Jakub Kicinski :

On Thu, 17 Apr 2025 12:21:17 +0000 you wrote:
> The function xdp_convert_buff_to_frame() may return NULL if it fails
> to correctly convert the XDP buffer into an XDP frame due to memory
> constraints, internal errors, or invalid data. Failing to check for NULL
> may lead to a NULL pointer dereference if the result is used later in
> processing, potentially causing crashes, data corruption, or undefined
> behavior.
> 
> [...]

Here is the summary with links:
  - [v2] xen-netfront: handle NULL returned by xdp_convert_buff_to_frame()
    https://git.kernel.org/netdev/net/c/cc3628dcd851

You are awesome, thank you!
-- 
Deet-doot-dot, I am a bot.
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On 4/22/2025 1:38 AM, Jürgen Groß wrote:
> On 22.04.25 10:21, Xin Li (Intel) wrote:
>> To eliminate the indirect call overhead introduced by the pv_ops API,
>> use the alternatives mechanism to read PMC:
> 
> Which indirect call overhead? The indirect call is patched via the
> alternative mechanism to a direct one.
> 

See below.


>>
>>      1) When built with !CONFIG_XEN_PV, X86_FEATURE_XENPV becomes a
>>         disabled feature, preventing the Xen PMC read code from being
>>         built and ensuring the native code is executed unconditionally.
> 
> Without CONFIG_XEN_PV CONFIG_PARAVIRT_XXL is not selected, resulting in
> native code anyway.

Yes, this is kept in this patch, but in a little different way.

> 
>>
>>      2) When built with CONFIG_XEN_PV:
>>
>>         2.1) If not running on the Xen hypervisor (!X86_FEATURE_XENPV),
>>              the kernel runtime binary is patched to unconditionally
>>              jump to the native PMC read code.
>>
>>         2.2) If running on the Xen hypervisor (X86_FEATURE_XENPV), the
>>              kernel runtime binary is patched to unconditionally jump
>>              to the Xen PMC read code.
>>
>> Consequently, remove the pv_ops PMC read API.
> 
> I don't see the value of this patch.
> 
> It adds more #ifdef and code lines without any real gain.
> 
> In case the x86 maintainers think it is still worth it, I won't object.

I think we want to totally bypass pv_ops in the case 2.1).

Do you mean the indirect call is patched to call native code *directly*
for 2.1?  I don't know it, can you please elaborate?

AFAIK, Xen PV has been the sole user of pv_ops for nearly 20 years. This
raises significant doubts about whether pv_ops provides Linux with the
value of being a well-abstracted "CPU" or "Platform".  And the x86
maintainers have said that it's a maintenance nightmare.

Thanks!
     Xin


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Subject: Re: [PATCH v1 03/14] xen/riscv: introduce ioremap()
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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References: 
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On 22.04.2025 10:40, Oleksii Kurochko wrote:
> 
> On 4/17/25 4:49 PM, Jan Beulich wrote:
>> On 17.04.2025 16:37, Oleksii Kurochko wrote:
>>> On 4/17/25 4:24 PM, Jan Beulich wrote:
>>>> On 17.04.2025 16:20, Oleksii Kurochko wrote:
>>>>> On 4/15/25 1:02 PM, Jan Beulich wrote:
>>>>>> On 15.04.2025 12:29, Oleksii Kurochko wrote:
>>>>>>> On 4/10/25 5:13 PM, Jan Beulich wrote:
>>>>>>>> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>>>>>>>>> Based on RISC-V unpriviliged spec ( Version 20240411 ):
>>>>>>>>> ```
>>>>>>>>> For implementations that conform to the RISC-V Unix Platform Specification,
>>>>>>>>> I/O devices and DMA operations are required to access memory coherently and
>>>>>>>>> via strongly ordered I/O channels. Therefore, accesses to regular main memory
>>>>>>>>> regions that are concurrently accessed by external devices can also use the
>>>>>>>>> standard synchronization mechanisms. Implementations that do not conform
>>>>>>>>> to the Unix Platform Specification and/or in which devices do not access
>>>>>>>>> memory coherently will need to use mechanisms
>>>>>>>>> (which are currently platform-specific or device-specific) to enforce
>>>>>>>>> coherency.
>>>>>>>>>
>>>>>>>>> I/O regions in the address space should be considered non-cacheable
>>>>>>>>> regions in the PMAs for those regions. Such regions can be considered coherent
>>>>>>>>> by the PMA if they are not cached by any agent.
>>>>>>>>> ```
>>>>>>>>> and [1]:
>>>>>>>>> ```
>>>>>>>>> The current riscv linux implementation requires SOC system to support
>>>>>>>>> memory coherence between all I/O devices and CPUs. But some SOC systems
>>>>>>>>> cannot maintain the coherence and they need support cache clean/invalid
>>>>>>>>> operations to synchronize data.
>>>>>>>>>
>>>>>>>>> Current implementation is no problem with SiFive FU540, because FU540
>>>>>>>>> keeps all IO devices and DMA master devices coherence with CPU. But to a
>>>>>>>>> traditional SOC vendor, it may already have a stable non-coherency SOC
>>>>>>>>> system, the need is simply to replace the CPU with RV CPU and rebuild
>>>>>>>>> the whole system with IO-coherency is very expensive.
>>>>>>>>> ```
>>>>>>>>>
>>>>>>>>> and the fact that all known ( to me ) CPUs that support the H-extension
>>>>>>>>> and that ones is going to be supported by Xen have memory coherency
>>>>>>>>> between all I/O devices and CPUs, so it is currently safe to use the
>>>>>>>>> PAGE_HYPERVISOR attribute.
>>>>>>>>> However, in cases where a platform does not support memory coherency, it
>>>>>>>>> should support CMO extensions and Svpbmt. In this scenario, updates to
>>>>>>>>> ioremap will be necessary.
>>>>>>>>> For now, a compilation error will be generated to ensure that the need to
>>>>>>>>> update ioremap() is not overlooked.
>>>>>>>>>
>>>>>>>>> [1]https://patchwork.kernel.org/project/linux-riscv/patch/1555947870-23014-1-git-send-email-guoren@kernel.org/
>>>>>>>> But MMIO access correctness isn't just a matter of coherency. There may not
>>>>>>>> be any caching involved in most cases, or else you may observe significantly
>>>>>>>> delayed or even dropped (folded with later ones) writes, and reads may be
>>>>>>>> serviced from the cache instead of going to actual MMIO. Therefore ...
>>>>>>>>
>>>>>>>>> --- a/xen/arch/riscv/Kconfig
>>>>>>>>> +++ b/xen/arch/riscv/Kconfig
>>>>>>>>> @@ -15,6 +15,18 @@ config ARCH_DEFCONFIG
>>>>>>>>>      	string
>>>>>>>>>      	default "arch/riscv/configs/tiny64_defconfig"
>>>>>>>>>      
>>>>>>>>> +config HAS_SVPBMT
>>>>>>>>> +	bool
>>>>>>>>> +	help
>>>>>>>>> +	  This config enables usage of Svpbmt ISA-extension ( Supervisor-mode:
>>>>>>>>> +	  page-based memory types).
>>>>>>>>> +
>>>>>>>>> +	  The memory type for a page contains a combination of attributes
>>>>>>>>> +	  that indicate the cacheability, idempotency, and ordering
>>>>>>>>> +	  properties for access to that page.
>>>>>>>>> +
>>>>>>>>> +	  The Svpbmt extension is only available on 64-bit cpus.
>>>>>>>> ... I kind of expect this extension (or anything else that there might be) will need
>>>>>>>> making use of.
>>>>>>> In cases where the Svpbmt extension isn't available, PMA (Physical Memory Attributes)
>>>>>>> is used to control which memory regions are cacheable, non-cacheable, readable, writable,
>>>>>>> etc. PMA is configured in M-mode by the firmware (e.g., OpenSBI), as is done in Andes
>>>>>>> cores, or it can be fixed at design time, as in SiFive cores.
>>>>>> How would things work if there was a need to map a RAM page uncacheable (via
>>>>>> ioremap() or otherwise)?
>>>>> My understanding is that Svpbmt is only needed when someone wants to change the memory
>>>>> attribute of a page set by PMA.
>>>>>
>>>>> The question is if non-cacheable RAM page is really needed if we have a coherency?
>>>> Aiui coherency here is among CPUs.
>>> ```
>>> For implementations that conform to the RISC-V Unix Platform Specification,
>>> I/O devices and DMA operations are required to access memory coherently and
>>> via strongly ordered I/O channels. Therefore, accesses to regular main memory
>>> regions that are concurrently accessed by external devices can also use the
>>> standard synchronization mechanisms. Implementations that do not conform
>>> to the Unix Platform Specification and/or in which devices do not access
>>> memory coherently will need to use mechanisms
>>> (which are currently platform-specific or device-specific) to enforce
>>> coherency.
>>> ```
>>> Based on this from the spec, coherency here is not only among CPUs.
>>>
>>>
>>>> Properties of devices in the system are
>>>> largely unknown?
>>> Yes, but still not sure what kind of property requires ioremap() which won't work
>>> without Svpmbt. Could you please tell me an example?
>> Well, above you said they all need to access memory coherently. That's the
>> "property" I was referring to.
> 
> Do you mean that device could have a property which tell that it would like to have non-cachable
> region used for that? I haven't seen such property in device tree files.
> 
> Do we have in Xen cases when Xen wants to have map part of RAM as non-cachebale and it is only the
> one option?

On x86 we have the case that IOMMUs may access memory non-coherently. This is
particular means that IOMMU page table updates (which necessarily live in RAM)
need to be done quite carefully. As it's all our code, we deal with the
situation by issuing cache flushes, avoiding the need for UC mappings.

Graphics engines may have similar constraints, aiui. With the driver code not
being part of Xen, we wouldn't be able to use a similar "simplification" there.
UC mappings would be pretty much unavoidable.

> I am also thinking why it can't be used cachable region + barrier (if we don't have memory coherency
> for everything).

Not sure what exactly you're asking here (if anything). An answer would very
likely depend on the specific kind of barrier you're thinking about. The
question would be what, if any, effect a barrier would have on the cache(s).

> Anyway, if it isn't an option to have mapped cacheble region + barrier then there is no any choice
> and the support of Svpmbt is required.

Quite possible.

Jan


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Message-ID: <7fea6158-9b7d-4bfb-b709-729266803c32@zytor.com>
Date: Tue, 22 Apr 2025 02:20:32 -0700
MIME-Version: 1.0
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Subject: Re: [RFC PATCH v2 22/34] x86/msr: Utilize the alternatives mechanism
 to read MSR
To: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= ,
        linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, andrew.cooper3@citrix.com, peterz@infradead.org,
        namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
        pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-23-xin@zytor.com>
 <91f9217a-cc2d-4a6e-bada-290312f73d82@suse.com>
Content-Language: en-US
From: Xin Li 
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On 4/22/2025 1:59 AM, Jürgen Groß wrote:
> On 22.04.25 10:22, Xin Li (Intel) wrote:
>> To eliminate the indirect call overhead introduced by the pv_ops API,
>> utilize the alternatives mechanism to read MSR:
>>
>>      1) When built with !CONFIG_XEN_PV, X86_FEATURE_XENPV becomes a
>>         disabled feature, preventing the Xen code from being built
>>         and ensuring the native code is executed unconditionally.
>>
>>      2) When built with CONFIG_XEN_PV:
>>
>>         2.1) If not running on the Xen hypervisor (!X86_FEATURE_XENPV),
>>              the kernel runtime binary is patched to unconditionally
>>              jump to the native MSR read code.
>>
>>         2.2) If running on the Xen hypervisor (X86_FEATURE_XENPV), the
>>              kernel runtime binary is patched to unconditionally jump
>>              to the Xen MSR read code.
>>
>> The alternatives mechanism is also used to choose the new immediate
>> form MSR read instruction when it's available.
>>
>> Consequently, remove the pv_ops MSR read APIs and the Xen callbacks.
> 
> Same as the comment to patch 5: there is no indirect call overhead after
> the system has come up.
> 

Please check https://lore.kernel.org/lkml/87y1h81ht4.ffs@tglx/.

And it's was also mentioned in the previous patch:

https://lore.kernel.org/lkml/20250422082216.1954310-22-xin@zytor.com/

Please let me know what I have missed.

Thanks!
     Xin




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Date: Tue, 22 Apr 2025 11:28:10 +0200
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Subject: Re: [RFC PATCH v2 06/34] x86/msr: Use the alternatives mechanism to
 read PMC
To: Xin Li , linux-kernel@vger.kernel.org,
 kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
 linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
 linux-pm@vger.kernel.org, linux-edac@vger.kernel.org,
 xen-devel@lists.xenproject.org, linux-acpi@vger.kernel.org,
 linux-hwmon@vger.kernel.org, netdev@vger.kernel.org,
 platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
 dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, acme@kernel.org,
 andrew.cooper3@citrix.com, peterz@infradead.org, namhyung@kernel.org,
 mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org,
 irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
 wei.liu@kernel.org, ajay.kaher@broadcom.com,
 bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
 pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
 luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
 haiyangz@microsoft.com, decui@microsoft.com
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-7-xin@zytor.com>
 
 
Content-Language: en-US
From: Juergen Gross 
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From: Juergen Gross 
To: Xin Li , linux-kernel@vger.kernel.org,
 kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
 linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
 linux-pm@vger.kernel.org, linux-edac@vger.kernel.org,
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 linux-hwmon@vger.kernel.org, netdev@vger.kernel.org,
 platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
 dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, acme@kernel.org,
 andrew.cooper3@citrix.com, peterz@infradead.org, namhyung@kernel.org,
 mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org,
 irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
 wei.liu@kernel.org, ajay.kaher@broadcom.com,
 bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
 pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
 luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
 haiyangz@microsoft.com, decui@microsoft.com
Message-ID: 
Subject: Re: [RFC PATCH v2 06/34] x86/msr: Use the alternatives mechanism to
 read PMC
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-7-xin@zytor.com>
 
 
In-Reply-To: 

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Subject: Re: [PATCH v5] xen/riscv: Increase XEN_VIRT_SIZE
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 17.04.2025 18:08, Oleksii Kurochko wrote:
> A randconfig job failed with the following issue:
>   riscv64-linux-gnu-ld: Xen too large for early-boot assumptions
> 
> The reason is that enabling the UBSAN config increased the size of
> the Xen binary.
> 
> Increase XEN_VIRT_SIZE to reserve enough space, allowing both UBSAN
> and GCOV to be enabled together, with some slack for future growth.
> 
> Additionally, add checks to verify that XEN_VIRT_START is 1GB-aligned
> and XEN_VIRT_SIZE is 2MB-aligned to reduce the number of page tables
> needed for the initial mapping. In the future, when 2MB mappings are
> used for .text (rx), .rodata (r), and .data (rw), this will also help
> reduce TLB pressure.
> 
> Reported-by: Andrew Cooper 
> Signed-off-by: Oleksii Kurochko 

Acked-by: Jan Beulich 




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Subject: Re: [RFC PATCH v2 21/34] x86/msr: Utilize the alternatives mechanism
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To: "Xin Li (Intel)" , linux-kernel@vger.kernel.org,
 kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
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 <20250422082216.1954310-22-xin@zytor.com>
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Date: Tue, 22 Apr 2025 11:57:57 +0200
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Subject: Re: [RFC PATCH v2 22/34] x86/msr: Utilize the alternatives mechanism
 to read MSR
To: Xin Li , linux-kernel@vger.kernel.org,
 kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
 linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
 linux-pm@vger.kernel.org, linux-edac@vger.kernel.org,
 xen-devel@lists.xenproject.org, linux-acpi@vger.kernel.org,
 linux-hwmon@vger.kernel.org, netdev@vger.kernel.org,
 platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
 dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, acme@kernel.org,
 andrew.cooper3@citrix.com, peterz@infradead.org, namhyung@kernel.org,
 mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org,
 irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
 wei.liu@kernel.org, ajay.kaher@broadcom.com,
 bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
 pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
 luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
 haiyangz@microsoft.com, decui@microsoft.com
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-23-xin@zytor.com>
 <91f9217a-cc2d-4a6e-bada-290312f73d82@suse.com>
 <7fea6158-9b7d-4bfb-b709-729266803c32@zytor.com>
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From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= 
To: Xin Li , linux-kernel@vger.kernel.org,
 kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
 linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
 linux-pm@vger.kernel.org, linux-edac@vger.kernel.org,
 xen-devel@lists.xenproject.org, linux-acpi@vger.kernel.org,
 linux-hwmon@vger.kernel.org, netdev@vger.kernel.org,
 platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
 dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, acme@kernel.org,
 andrew.cooper3@citrix.com, peterz@infradead.org, namhyung@kernel.org,
 mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org,
 irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
 wei.liu@kernel.org, ajay.kaher@broadcom.com,
 bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
 pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
 luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
 haiyangz@microsoft.com, decui@microsoft.com
Message-ID: <6046a6d0-bae3-41bb-9960-82c403f62476@suse.com>
Subject: Re: [RFC PATCH v2 22/34] x86/msr: Utilize the alternatives mechanism
 to read MSR
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-23-xin@zytor.com>
 <91f9217a-cc2d-4a6e-bada-290312f73d82@suse.com>
 <7fea6158-9b7d-4bfb-b709-729266803c32@zytor.com>
In-Reply-To: <7fea6158-9b7d-4bfb-b709-729266803c32@zytor.com>

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Subject: Re: [PATCH] x86/intel: workaround several MONITOR/MWAIT errata
To: Jan Beulich , Roger Pau Monne 
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On 22/04/2025 9:26 am, Jan Beulich wrote:
> On 17.04.2025 18:19, Roger Pau Monne wrote:
>> @@ -380,6 +380,43 @@ static void probe_c3_errata(const struct cpuinfo_x86 *c)
>>      }
>>  }
>>  
>> +/*
>> + * APL30: One use of the MONITOR/MWAIT instruction pair is to allow a logical
>> + * processor to wait in a sleep state until a store to the armed address range
>> + * occurs. Due to this erratum, stores to the armed address range may not
>> + * trigger MWAIT to resume execution.
>> + *
>> + * ICX143: Under complex microarchitectural conditions, a monitor that is armed
>> + * with the MWAIT instruction may not be triggered, leading to a processor
>> + * hang.
>> + *
>> + * LNL030: Problem P-cores may not exit power state Core C6 on monitor hit.
> I didn't manage to spot all three spec updates; none of these have a ucode fix,
> hence permitting the workaround to be avoided?
>
> Since CPX is 3rd Gen Xeon Scalable just like ICX is, I'm surprised that one's
> unaffected. The most recent spec update there is a year old than ICX'es, so
> may simply be too old to include the erratum?

CPX being "3rd generation" is especially creative marketing.  It's
literally another stepping of SKX/CLX with some extra AVX512
instructions, so is an entire "tock" away from ICX.

> Sunny Cove is used by further Icelake models - they're known to be unaffected?

ICX143 is specific to the server design.  It doesn't affect the client
design.

~Andrew


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From: Frediano Ziglio 
Date: Tue, 22 Apr 2025 11:40:44 +0100
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Message-ID: 
Subject: Re: [PATCH] x86/intel: workaround several MONITOR/MWAIT errata
To: Roger Pau Monne 
Cc: xen-devel@lists.xenproject.org, Jan Beulich , 
	Andrew Cooper 
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On Thu, Apr 17, 2025 at 5:19=E2=80=AFPM Roger Pau Monne  wrote:
>
> There are several errata on Intel regarding the usage of the MONITOR/MWAI=
T
> instructions, all having in common that stores to the monitored region
> might not wake up the CPU.
>
> Fix them by forcing the sending of an IPI for the affected models.
>
> The Ice Lake issue has been reproduced internally on XenServer hardware,
> and the fix does seem to prevent it.  The symptom was APs getting stuck i=
n
> the idle loop immediately after bring up, which in turn prevented the BSP
> from making progress.  This would happen before the watchdog was
> initialized, and hence the whole system would get stuck.
>
> Signed-off-by: Roger Pau Monn=C3=A9 
> ---
> Apollo and Lunar Lake fixes have not been tested, due to lack of hardware=
.
> ---
>  xen/arch/x86/acpi/cpu_idle.c     |  6 +++++
>  xen/arch/x86/cpu/intel.c         | 41 +++++++++++++++++++++++++++++++-
>  xen/arch/x86/include/asm/mwait.h |  3 +++
>  3 files changed, 49 insertions(+), 1 deletion(-)
>
> diff --git a/xen/arch/x86/acpi/cpu_idle.c b/xen/arch/x86/acpi/cpu_idle.c
> index 420198406def..f8f11f3c31e4 100644
> --- a/xen/arch/x86/acpi/cpu_idle.c
> +++ b/xen/arch/x86/acpi/cpu_idle.c
> @@ -441,8 +441,14 @@ void cpuidle_wakeup_mwait(cpumask_t *mask)
>      cpumask_andnot(mask, mask, &target);
>  }
>
> +/* Force sending of a wakeup IPI regardless of mwait usage. */
> +bool force_mwait_ipi_wakeup __read_mostly;
> +
>  bool arch_skip_send_event_check(unsigned int cpu)
>  {
> +    if ( force_mwait_ipi_wakeup )
> +        return false;
> +
>      /*
>       * This relies on softirq_pending() and mwait_wakeup() to access dat=
a
>       * on the same cache line.
> diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c
> index 6a680ba38dc9..9d7c6ea297a9 100644
> --- a/xen/arch/x86/cpu/intel.c
> +++ b/xen/arch/x86/cpu/intel.c
> @@ -8,6 +8,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -368,7 +369,6 @@ static void probe_c3_errata(const struct cpuinfo_x86 =
*c)
>          INTEL_FAM6_MODEL(0x25),
>          { }
>      };
> -#undef INTEL_FAM6_MODEL
>
>      /* Serialized by the AP bringup code. */
>      if ( max_cstate > 1 && (c->apicid & (c->x86_num_siblings - 1)) &&
> @@ -380,6 +380,43 @@ static void probe_c3_errata(const struct cpuinfo_x86=
 *c)
>      }
>  }
>
> +/*
> + * APL30: One use of the MONITOR/MWAIT instruction pair is to allow a lo=
gical
> + * processor to wait in a sleep state until a store to the armed address=
 range
> + * occurs. Due to this erratum, stores to the armed address range may no=
t
> + * trigger MWAIT to resume execution.
> + *
> + * ICX143: Under complex microarchitectural conditions, a monitor that i=
s armed
> + * with the MWAIT instruction may not be triggered, leading to a process=
or
> + * hang.
> + *
> + * LNL030: Problem P-cores may not exit power state Core C6 on monitor h=
it.
> + *
> + * Force the sending of an IPI in those cases.
> + */
> +static void probe_mwait_errata(void)
> +{
> +    static const struct x86_cpu_id models[] =3D {
> +        /* Apollo Lake */
> +        INTEL_FAM6_MODEL(0x5C),
> +        /* Ice Lake */
> +        INTEL_FAM6_MODEL(0x6A),
> +        INTEL_FAM6_MODEL(0x6C),

Intel patch for Linux only adds model 0x6a, not 0x6c. Did we manage to
reproduce on 0x6c? Which patch is more correct? Surely we are on the
safer side.

> +        /* Lunar Lake */
> +        INTEL_FAM6_MODEL(0xBD),
> +        { }
> +    };
> +#undef INTEL_FAM6_MODEL
> +
> +    if ( boot_cpu_has(X86_FEATURE_MONITOR) && !force_mwait_ipi_wakeup &&
> +         x86_match_cpu(models) )
> +    {
> +        printk(XENLOG_WARNING
> +               "Forcing IPI MWAIT wakeup due to CPU erratum\n");
> +        force_mwait_ipi_wakeup =3D true;
> +    }
> +}
> +
>  /*
>   * P4 Xeon errata 037 workaround.
>   * Hardware prefetcher may cause stale data to be loaded into the cache.
> @@ -406,6 +443,8 @@ static void Intel_errata_workarounds(struct cpuinfo_x=
86 *c)
>                 __set_bit(X86_FEATURE_CLFLUSH_MONITOR, c->x86_capability)=
;
>
>         probe_c3_errata(c);
> +       if (c =3D=3D &boot_cpu_data)
> +               probe_mwait_errata();
>  }
>
>
> diff --git a/xen/arch/x86/include/asm/mwait.h b/xen/arch/x86/include/asm/=
mwait.h
> index 000a692f6d19..c52cd3f51011 100644
> --- a/xen/arch/x86/include/asm/mwait.h
> +++ b/xen/arch/x86/include/asm/mwait.h
> @@ -13,6 +13,9 @@
>
>  #define MWAIT_ECX_INTERRUPT_BREAK      0x1
>
> +/* Force sending of a wakeup IPI regardless of mwait usage. */
> +extern bool force_mwait_ipi_wakeup;
> +
>  void mwait_idle_with_hints(unsigned int eax, unsigned int ecx);
>  #ifdef CONFIG_INTEL
>  bool mwait_pc10_supported(void);

Frediano


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Message-ID: <04d46a38-e7bb-4059-87b4-3f262575a8e5@citrix.com>
Date: Tue, 22 Apr 2025 11:42:39 +0100
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH] x86/AMD: Convert rdmsr_amd_safe() to use asm goto()
To: Jan Beulich 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Xen-devel 
References: <20250407153510.1863243-1-andrew.cooper3@citrix.com>
 <1df6b4c9-7309-49cd-8046-019d94139c57@suse.com>
 <06c64f49-a70e-48c3-8480-f2ed9ac4a001@citrix.com>
 <7794150f-4a43-4ec8-bd9e-ee439cbf722c@suse.com>
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From: Andrew Cooper 
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On 22/04/2025 10:07 am, Jan Beulich wrote:
> On 17.04.2025 19:24, Andrew Cooper wrote:
>> On 07/04/2025 4:48 pm, Jan Beulich wrote:
>>> On 07.04.2025 17:35, Andrew Cooper wrote:
>>>> Unlike the WRMSR side, we can't use asm goto() unconditionally, because our
>>>> toolchain baseline doesn't support asm goto with outputs.
>>> Is there actually a benefit we gain from now needing to maintain two different
>>> pieces of logic fulfilling the same purpose?
>> IMO, yes.  Besides getting rid of .fixup/unlikely, the code generation
>> is better-enough to warrant it, including getting the common path
>> correct (the referenced labels are all considered cold).
>>
>> e.g. for this change, we go from:
>>
>>     xor    %esi,%esi
>>     rdmsr
>>     test   %esi,%esi
>>     jne    
>>     and    $0xfffffffe,%edx
>>     wrmsr
>>
>> (note the forward branch) to simply:
>>
>>     rdmsr
>>     and    $0xfffffffe,%edx
>>     wrmsr
>>
>> because the exception table redirect is directly into init_amd.cold, and
>> we don't have to hold `int err` in a register across the asm() block.
>>
>> This is an intentionally simple example to get the infrastructure in,
>> but vmread() will definitely benefit.
>>
>>>> Also, there's a different errata workaround we'll need if we want to use asm
>>>> goto() with "+" constraints:
>>>>
>>>> config CC_HAS_ASM_GOTO_TIED_OUTPUT
>>>> 	depends on CC_HAS_ASM_GOTO_OUTPUT
>>>> 	# Detect buggy gcc and clang, fixed in gcc-11 clang-14.
>>>> 	def_bool $(success,echo 'int foo(int *x) { asm goto (".long (%l[bar]) - .": "+m"(*x) ::: bar); return *x; bar: return 0; }' | $CC -x c - -c -o /dev/null)
>>>>
>>>> I'm tempted to put it in straight away, lest we forget about it.
>>> Perhaps best if we really want to go this route. Yet then - why "TIED"? Isn't
>>> "tied" the term they use when referring to an earlier operand by using a
>>> digit (or the operand's name in square brackets)?
>> This is straight from Linux.  I've not looked at the issue in detail.
> So what I see is that Sean in Linux commit 1aa0e8b144b6 uses this term also
> in the description. I'm unconvinced it's correct, though. Gcc doc doesn't
> call the "+" modifier anything special, and it calls the numeric constraints
> (for which "+" can be a shorthand in certain cases) "matching constraint".
>
> We can of course sort the naming in the eventual patch pulling in that
> behavior, yet I'd like to suggest already now that we don't blindly follow
> Linux'es naming (unless the choice can be backed by some doc reference).

In the meantime, I found
https://clang.llvm.org/docs/LanguageExtensions.html#asm-goto-with-output-constraints

"When using tied-outputs (i.e. outputs that are inputs and outputs, not
just outputs) with the +r constraint"

So Clang does name this case specifically as tied outputs.

>
>>>> --- a/xen/Kconfig
>>>> +++ b/xen/Kconfig
>>>> @@ -41,6 +41,20 @@ config CC_SPLIT_SECTIONS
>>>>  config CC_HAS_UBSAN
>>>>  	def_bool $(cc-option,-fsanitize=undefined)
>>>>  
>>>> +# Fixed in GCC 14, 13.3, 12.4 and 11.5
>>>> +# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113921
>>>> +config GCC_ASM_GOTO_OUTPUT_BROKEN
>>>> +	bool
>>>> +	depends on CC_IS_GCC
>>>> +	default y if GCC_VERSION < 110500
>>>> +	default y if GCC_VERSION >= 120000 && GCC_VERSION < 120400
>>>> +	default y if GCC_VERSION >= 130000 && GCC_VERSION < 130300
>>> Unlike for pre-release versions (x.0.y) I view this as problematic. Distros
>>> are likely to have backported the fix before the minor releases took place.
>>> Or they may have backported without ever meaning to follow later minor
>>> releases. We'd needlessly exclude them here. Imo ...
>>>
>>>> +config CC_HAS_ASM_GOTO_OUTPUT
>>>> +	def_bool y
>>>> +	depends on !GCC_ASM_GOTO_OUTPUT_BROKEN
>>>> +	depends on $(success,echo 'int foo(int x) { asm goto ("": "=r"(x) ::: bar); return x; bar: return 0; }' | $(CC) -x c - -c -o /dev/null)
>>> ... the only option is to actually probe for support as well as the (non-)
>>> buggy-ness.
>> There is no sensible way to probe.  It compiles fine, but (AIUI) fails
>> to spill registers correctly on some paths, which also makes it very
>> sensitive to other optimisations.
> Hmm, okay, Linux commit f2f6a8e88717 kind of suggests that there might have
> been more issues in gcc. Really I can't help the impression that the issue
> still wasn't fully understood, and hence may re-surface in another context.
> In which case I guess I agree the above is the best we can do for the time
> being, until we learn of further breakage:
> Reviewed-by: Jan Beulich 

Thanks.

~Andrew


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Subject: Re: [PATCH] x86/intel: workaround several MONITOR/MWAIT errata
To: Frediano Ziglio ,
 Roger Pau Monne 
Cc: xen-devel@lists.xenproject.org, Jan Beulich 
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On 22/04/2025 11:40 am, Frediano Ziglio wrote:
> On Thu, Apr 17, 2025 at 5:19 PM Roger Pau Monne  wrote:
>> diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c
>> index 6a680ba38dc9..9d7c6ea297a9 100644
>> --- a/xen/arch/x86/cpu/intel.c
>> +++ b/xen/arch/x86/cpu/intel.c
>> @@ -380,6 +380,43 @@ static void probe_c3_errata(const struct cpuinfo_x86 *c)
>>      }
>>  }
>>
>> +/*
>> + * APL30: One use of the MONITOR/MWAIT instruction pair is to allow a logical
>> + * processor to wait in a sleep state until a store to the armed address range
>> + * occurs. Due to this erratum, stores to the armed address range may not
>> + * trigger MWAIT to resume execution.
>> + *
>> + * ICX143: Under complex microarchitectural conditions, a monitor that is armed
>> + * with the MWAIT instruction may not be triggered, leading to a processor
>> + * hang.
>> + *
>> + * LNL030: Problem P-cores may not exit power state Core C6 on monitor hit.
>> + *
>> + * Force the sending of an IPI in those cases.
>> + */
>> +static void probe_mwait_errata(void)
>> +{
>> +    static const struct x86_cpu_id models[] = {
>> +        /* Apollo Lake */
>> +        INTEL_FAM6_MODEL(0x5C),
>> +        /* Ice Lake */
>> +        INTEL_FAM6_MODEL(0x6A),
>> +        INTEL_FAM6_MODEL(0x6C),
> Intel patch for Linux only adds model 0x6a, not 0x6c. Did we manage to
> reproduce on 0x6c? Which patch is more correct? Surely we are on the
> safer side.

It only affects 0x6a, but I can't go into why.  Now that Linux is
picking up this workaround, we should follow Dave Hansen managed to get
out of Intel's internal bugtracker on the matter.

~Andrew


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To: "Xin Li (Intel)" , linux-kernel@vger.kernel.org,
 kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
 linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
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Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
 dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, acme@kernel.org,
 andrew.cooper3@citrix.com, peterz@infradead.org, namhyung@kernel.org,
 mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org,
 irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
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 pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
 luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
 haiyangz@microsoft.com, decui@microsoft.com
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-23-xin@zytor.com>
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From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= 
To: "Xin Li (Intel)" , linux-kernel@vger.kernel.org,
 kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
 linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
 linux-pm@vger.kernel.org, linux-edac@vger.kernel.org,
 xen-devel@lists.xenproject.org, linux-acpi@vger.kernel.org,
 linux-hwmon@vger.kernel.org, netdev@vger.kernel.org,
 platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
 dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, acme@kernel.org,
 andrew.cooper3@citrix.com, peterz@infradead.org, namhyung@kernel.org,
 mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org,
 irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
 wei.liu@kernel.org, ajay.kaher@broadcom.com,
 bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
 pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
 luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
 haiyangz@microsoft.com, decui@microsoft.com
Message-ID: <080351cb-6c3d-4540-953d-6205f1ff0745@suse.com>
Subject: Re: [RFC PATCH v2 22/34] x86/msr: Utilize the alternatives mechanism
 to read MSR
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-23-xin@zytor.com>
In-Reply-To: <20250422082216.1954310-23-xin@zytor.com>

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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH] xen/link: Include .debug_str_offsets in DWARF2_DEBUG_SECTIONS
Date: Tue, 22 Apr 2025 12:32:47 +0100
Message-Id: <20250422113247.1285339-1-andrew.cooper3@citrix.com>
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Building Xen with Clang-17 yields the following warning:

  ld: warning: orphan section `.debug_str_offsets' from `prelink.o' being placed in section `.debug_str_offsets'
  ld: ./.xen.efi.0xffff82d040000000.0:/4: section below image base
  ld: ./.xen.efi.0xffff82d040000000.1:/4: section below image base
  ld: warning: orphan section `.debug_str_offsets' from `prelink.o' being placed in section `.debug_str_offsets'
  ld: xen.efi:/4: section below image base

Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Michal Orzel 
CC: Jan Beulich 
CC: Julien Grall 
CC: Roger Pau Monné 
CC: Stefano Stabellini 
---
 xen/include/xen/xen.lds.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/xen/include/xen/xen.lds.h b/xen/include/xen/xen.lds.h
index 16a9b1ba03db..bf75e22953bc 100644
--- a/xen/include/xen/xen.lds.h
+++ b/xen/include/xen/xen.lds.h
@@ -56,6 +56,7 @@
   DECL_DEBUG2(.debug_info, .gnu.linkonce.wi.*, 1) \
   DECL_DEBUG(.debug_types, 1)                     \
   DECL_DEBUG(.debug_str, 1)                       \
+  DECL_DEBUG(.debug_str_offsets, 1)               \
   DECL_DEBUG2(.debug_line, .debug_line.*, 1)      \
   DECL_DEBUG(.debug_line_str, 1)                  \
   DECL_DEBUG(.debug_names, 4)                     \
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH] x86/alternative: Clean up headers
Date: Tue, 22 Apr 2025 12:33:07 +0100
Message-Id: <20250422113307.1285890-1-andrew.cooper3@citrix.com>
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alternative.h doesn't need lib.h now that macros.h exists.  Futhermore, STR()
is already the prevailing style, so convert the final __stringify() to drop
stringify.h too.

No functional change.

Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
CC: Roger Pau Monné 
---
 xen/arch/x86/include/asm/alternative.h | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/include/asm/alternative.h b/xen/arch/x86/include/asm/alternative.h
index 38472fb58e2d..7326ad942836 100644
--- a/xen/arch/x86/include/asm/alternative.h
+++ b/xen/arch/x86/include/asm/alternative.h
@@ -4,8 +4,10 @@
 #ifdef __ASSEMBLY__
 #include 
 #else
-#include 
-#include 
+
+#include 
+#include 
+
 #include 
 #include 
 
@@ -65,7 +67,7 @@ extern void alternative_branches(void);
         " .endif\n"                                                     \
         " .long .LXEN%=_orig_s - .\n"             /* label           */ \
         " .long " alt_repl_s(num)" - .\n"         /* new instruction */ \
-        " .word " __stringify(feature) "\n"       /* feature bit     */ \
+        " .word " STR(feature) "\n"               /* feature bit     */ \
         " .byte " alt_orig_len "\n"               /* source len      */ \
         " .byte " alt_repl_len(num) "\n"          /* replacement len */ \
         " .byte " alt_pad_len "\n"                /* padding len     */ \
-- 
2.39.5



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        Tue, 22 Apr 2025 04:35:13 -0700 (PDT)
From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH] xen: Drop CONFIG_CC_HAS_UBSAN
Date: Tue, 22 Apr 2025 12:35:09 +0100
Message-Id: <20250422113509.1286581-1-andrew.cooper3@citrix.com>
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All supported toolchains now have it.

Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Michal Orzel 
CC: Jan Beulich 
CC: Julien Grall 
CC: Roger Pau Monné 
CC: Stefano Stabellini 
---
 xen/Kconfig       | 4 ----
 xen/Kconfig.debug | 2 +-
 2 files changed, 1 insertion(+), 5 deletions(-)

diff --git a/xen/Kconfig b/xen/Kconfig
index 2128f0ccfc0b..72fdb8376087 100644
--- a/xen/Kconfig
+++ b/xen/Kconfig
@@ -37,10 +37,6 @@ config CC_HAS_VISIBILITY_ATTRIBUTE
 config CC_SPLIT_SECTIONS
 	bool
 
-# Compiler supports -fsanitize=undefined
-config CC_HAS_UBSAN
-	def_bool $(cc-option,-fsanitize=undefined)
-
 # Set code alignment.
 #
 # Allow setting on a boolean basis, and then convert such selection to an
diff --git a/xen/Kconfig.debug b/xen/Kconfig.debug
index f7cc5ffaabd7..c4a8d86912e0 100644
--- a/xen/Kconfig.debug
+++ b/xen/Kconfig.debug
@@ -98,7 +98,7 @@ config SCRUB_DEBUG
 
 config UBSAN
 	bool "Undefined behaviour sanitizer"
-	depends on HAS_UBSAN && CC_HAS_UBSAN
+	depends on HAS_UBSAN
 	help
 	  Enable undefined behaviour sanitizer. It uses compiler to insert code
 	  snippets so that undefined behaviours in C are detected during runtime.
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH] xen: Drop CONFIG_CC_HAS_VISIBILITY_ATTRIBUTE
Date: Tue, 22 Apr 2025 12:35:37 +0100
Message-Id: <20250422113537.1286981-1-andrew.cooper3@citrix.com>
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All supported toolchains now have it.

Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Michal Orzel 
CC: Jan Beulich 
CC: Julien Grall 
CC: Roger Pau Monné 
CC: Stefano Stabellini 
---
 xen/Kconfig                | 4 ----
 xen/include/xen/compiler.h | 2 --
 2 files changed, 6 deletions(-)

diff --git a/xen/Kconfig b/xen/Kconfig
index 72fdb8376087..ae1c401a981e 100644
--- a/xen/Kconfig
+++ b/xen/Kconfig
@@ -29,10 +29,6 @@ config LD_IS_GNU
 config LD_IS_LLVM
 	def_bool $(success,$(LD) --version | head -n 1 | grep -q "^LLD")
 
-# -fvisibility=hidden reduces -fpic cost, if it's available
-config CC_HAS_VISIBILITY_ATTRIBUTE
-	def_bool $(cc-option,-fvisibility=hidden)
-
 # Use -f{function,data}-sections compiler parameters
 config CC_SPLIT_SECTIONS
 	bool
diff --git a/xen/include/xen/compiler.h b/xen/include/xen/compiler.h
index 38b8fa3d386d..c68fab189154 100644
--- a/xen/include/xen/compiler.h
+++ b/xen/include/xen/compiler.h
@@ -17,10 +17,8 @@
 
 #endif /* Compiler checks. */
 
-#ifdef CONFIG_CC_HAS_VISIBILITY_ATTRIBUTE
 /* Results in more efficient PIC code (no indirections through GOT or PLT). */
 #pragma GCC visibility push(hidden)
-#endif
 
 #define barrier()     __asm__ __volatile__("": : :"memory")
 
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Julien Grall ,
	Volodymyr Babchuk ,
	Bertrand Marquis ,
	Michal Orzel 
Subject: [PATCH] xen: Use asm inline when available for alternatives
Date: Tue, 22 Apr 2025 12:39:57 +0100
Message-Id: <20250422113957.1289290-1-andrew.cooper3@citrix.com>
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Compilers estimate the size of an asm() block for inlining purposes.

Constructs such as ALTERNATIVE appear large due to the metadata, depsite often
only being a handful of instructions.  asm inline() overrides the estimation
to identify the block as being small.

This has a substantial impact on inlining decisions, expected to be for the
better given that the compiler has a more accurate picture to work with.

Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Julien Grall 
CC: Volodymyr Babchuk 
CC: Bertrand Marquis 
CC: Michal Orzel 
---
 xen/Kconfig                               |  4 +++
 xen/arch/arm/include/asm/alternative.h    |  4 +--
 xen/arch/arm/include/asm/arm64/flushtlb.h |  4 +--
 xen/arch/arm/include/asm/arm64/io.h       | 43 ++++++++++++++---------
 xen/arch/arm/include/asm/cpuerrata.h      |  8 ++---
 xen/arch/arm/include/asm/cpufeature.h     |  8 ++---
 xen/arch/arm/include/asm/page.h           | 12 ++++---
 xen/arch/arm/include/asm/processor.h      |  7 ++--
 xen/arch/arm/include/asm/sysregs.h        | 10 +++---
 xen/arch/arm/mmu/p2m.c                    |  3 +-
 xen/arch/x86/include/asm/alternative.h    | 36 ++++++++++---------
 xen/include/xen/compiler.h                | 14 ++++++++
 12 files changed, 95 insertions(+), 58 deletions(-)

diff --git a/xen/Kconfig b/xen/Kconfig
index ae1c401a981e..ab4ab42ae987 100644
--- a/xen/Kconfig
+++ b/xen/Kconfig
@@ -29,6 +29,10 @@ config LD_IS_GNU
 config LD_IS_LLVM
 	def_bool $(success,$(LD) --version | head -n 1 | grep -q "^LLD")
 
+config CC_HAS_ASM_INLINE
+	# GCC >= 9, Clang >= 11
+	def_bool $(success,echo 'void foo(void) { asm inline (""); }' | $(CC) -x c - -c -o /dev/null)
+
 # Use -f{function,data}-sections compiler parameters
 config CC_SPLIT_SECTIONS
 	bool
diff --git a/xen/arch/arm/include/asm/alternative.h b/xen/arch/arm/include/asm/alternative.h
index 22477d9497a3..1563f03a0f5a 100644
--- a/xen/arch/arm/include/asm/alternative.h
+++ b/xen/arch/arm/include/asm/alternative.h
@@ -209,9 +209,9 @@ alternative_endif
 #endif  /*  __ASSEMBLY__  */
 
 /*
- * Usage: asm(ALTERNATIVE(oldinstr, newinstr, feature));
+ * Usage: asm_inline (ALTERNATIVE(oldinstr, newinstr, feature));
  *
- * Usage: asm(ALTERNATIVE(oldinstr, newinstr, feature, CONFIG_FOO));
+ * Usage: asm_inline (ALTERNATIVE(oldinstr, newinstr, feature, CONFIG_FOO));
  * N.B. If CONFIG_FOO is specified, but not selected, the whole block
  *      will be omitted, including oldinstr.
  */
diff --git a/xen/arch/arm/include/asm/arm64/flushtlb.h b/xen/arch/arm/include/asm/arm64/flushtlb.h
index 45642201d147..3b99c11b50d1 100644
--- a/xen/arch/arm/include/asm/arm64/flushtlb.h
+++ b/xen/arch/arm/include/asm/arm64/flushtlb.h
@@ -31,7 +31,7 @@
 #define TLB_HELPER(name, tlbop, sh)              \
 static inline void name(void)                    \
 {                                                \
-    asm volatile(                                \
+    asm_inline volatile (                        \
         "dsb  "  # sh  "st;"                     \
         "tlbi "  # tlbop  ";"                    \
         ALTERNATIVE(                             \
@@ -55,7 +55,7 @@ static inline void name(void)                    \
 #define TLB_HELPER_VA(name, tlbop)               \
 static inline void name(vaddr_t va)              \
 {                                                \
-    asm volatile(                                \
+    asm_inline volatile (                        \
         "tlbi "  # tlbop  ", %0;"                \
         ALTERNATIVE(                             \
             "nop; nop;",                         \
diff --git a/xen/arch/arm/include/asm/arm64/io.h b/xen/arch/arm/include/asm/arm64/io.h
index 7d5959877759..ac90b729c44d 100644
--- a/xen/arch/arm/include/asm/arm64/io.h
+++ b/xen/arch/arm/include/asm/arm64/io.h
@@ -51,40 +51,51 @@ static inline void __raw_writeq(u64 val, volatile void __iomem *addr)
 static inline u8 __raw_readb(const volatile void __iomem *addr)
 {
         u8 val;
-        asm volatile(ALTERNATIVE("ldrb %w0, [%1]",
-                                 "ldarb %w0, [%1]",
-                                 ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
-                     : "=r" (val) : "r" (addr));
+
+        asm_inline volatile (
+            ALTERNATIVE("ldrb %w0, [%1]",
+                        "ldarb %w0, [%1]",
+                        ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
+            : "=r" (val) : "r" (addr) );
+
         return val;
 }
 
 static inline u16 __raw_readw(const volatile void __iomem *addr)
 {
         u16 val;
-        asm volatile(ALTERNATIVE("ldrh %w0, [%1]",
-                                 "ldarh %w0, [%1]",
-                                 ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
-                     : "=r" (val) : "r" (addr));
+        asm_inline volatile (
+            ALTERNATIVE("ldrh %w0, [%1]",
+                        "ldarh %w0, [%1]",
+                        ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
+            : "=r" (val) : "r" (addr) );
+
         return val;
 }
 
 static inline u32 __raw_readl(const volatile void __iomem *addr)
 {
         u32 val;
-        asm volatile(ALTERNATIVE("ldr %w0, [%1]",
-                                 "ldar %w0, [%1]",
-                                 ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
-                     : "=r" (val) : "r" (addr));
+
+        asm_inline volatile (
+            ALTERNATIVE("ldr %w0, [%1]",
+                        "ldar %w0, [%1]",
+                        ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
+            : "=r" (val) : "r" (addr) );
+
         return val;
 }
 
 static inline u64 __raw_readq(const volatile void __iomem *addr)
 {
         u64 val;
-        asm volatile(ALTERNATIVE("ldr %0, [%1]",
-                                 "ldar %0, [%1]",
-                                 ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
-                     : "=r" (val) : "r" (addr));
+
+        asm_inline volatile (
+            ALTERNATIVE("ldr %0, [%1]",
+                        "ldar %0, [%1]",
+                        ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
+            : "=r" (val) : "r" (addr) );
+
         return val;
 }
 
diff --git a/xen/arch/arm/include/asm/cpuerrata.h b/xen/arch/arm/include/asm/cpuerrata.h
index 8d7e7b9375bd..1799a16d7e7f 100644
--- a/xen/arch/arm/include/asm/cpuerrata.h
+++ b/xen/arch/arm/include/asm/cpuerrata.h
@@ -16,10 +16,10 @@ static inline bool check_workaround_##erratum(void)             \
     {                                                           \
         register_t ret;                                         \
                                                                 \
-        asm volatile (ALTERNATIVE("mov %0, #0",                 \
-                                  "mov %0, #1",                 \
-                                  feature)                      \
-                      : "=r" (ret));                            \
+        asm_inline volatile (                                   \
+            ALTERNATIVE("mov %0, #0",                           \
+                        "mov %0, #1", feature)                  \
+            : "=r" (ret) );                                     \
                                                                 \
         return unlikely(ret);                                   \
     }                                                           \
diff --git a/xen/arch/arm/include/asm/cpufeature.h b/xen/arch/arm/include/asm/cpufeature.h
index 50297e53d90e..b6df18801166 100644
--- a/xen/arch/arm/include/asm/cpufeature.h
+++ b/xen/arch/arm/include/asm/cpufeature.h
@@ -102,10 +102,10 @@ static inline bool cpus_have_cap(unsigned int num)
 #define cpus_have_const_cap(num) ({                 \
         register_t __ret;                           \
                                                     \
-        asm volatile (ALTERNATIVE("mov %0, #0",     \
-                                  "mov %0, #1",     \
-                                  num)              \
-                      : "=r" (__ret));              \
+        asm_inline volatile (                       \
+            ALTERNATIVE("mov %0, #0",               \
+                        "mov %0, #1", num)          \
+            : "=r" (__ret) );                       \
                                                     \
         unlikely(__ret);                            \
         })
diff --git a/xen/arch/arm/include/asm/page.h b/xen/arch/arm/include/asm/page.h
index 69f817d1e68a..27bc96b9f401 100644
--- a/xen/arch/arm/include/asm/page.h
+++ b/xen/arch/arm/include/asm/page.h
@@ -176,7 +176,8 @@ static inline int invalidate_dcache_va_range(const void *p, unsigned long size)
     {
         size -= dcache_line_bytes - ((uintptr_t)p & cacheline_mask);
         p = (void *)((uintptr_t)p & ~cacheline_mask);
-        asm volatile (__clean_and_invalidate_dcache_one(0) : : "r" (p));
+        asm_inline volatile (
+            __clean_and_invalidate_dcache_one(0) :: "r" (p) );
         p += dcache_line_bytes;
     }
 
@@ -185,7 +186,8 @@ static inline int invalidate_dcache_va_range(const void *p, unsigned long size)
         asm volatile (__invalidate_dcache_one(0) : : "r" (p + idx));
 
     if ( size > 0 )
-        asm volatile (__clean_and_invalidate_dcache_one(0) : : "r" (p + idx));
+        asm_inline volatile (
+            __clean_and_invalidate_dcache_one(0) :: "r" (p + idx) );
 
     dsb(sy);           /* So we know the flushes happen before continuing */
 
@@ -209,7 +211,7 @@ static inline int clean_dcache_va_range(const void *p, unsigned long size)
     p = (void *)((uintptr_t)p & ~cacheline_mask);
     for ( ; size >= dcache_line_bytes;
             idx += dcache_line_bytes, size -= dcache_line_bytes )
-        asm volatile (__clean_dcache_one(0) : : "r" (p + idx));
+        asm_inline volatile ( __clean_dcache_one(0) : : "r" (p + idx) );
     dsb(sy);           /* So we know the flushes happen before continuing */
     /* ARM callers assume that dcache_* functions cannot fail. */
     return 0;
@@ -247,7 +249,7 @@ static inline int clean_and_invalidate_dcache_va_range
     if ( sizeof(x) > MIN_CACHELINE_BYTES || sizeof(x) > alignof(x) )    \
         clean_dcache_va_range(_p, sizeof(x));                           \
     else                                                                \
-        asm volatile (                                                  \
+        asm_inline volatile (                                           \
             "dsb sy;"   /* Finish all earlier writes */                 \
             __clean_dcache_one(0)                                       \
             "dsb sy;"   /* Finish flush before continuing */            \
@@ -259,7 +261,7 @@ static inline int clean_and_invalidate_dcache_va_range
     if ( sizeof(x) > MIN_CACHELINE_BYTES || sizeof(x) > alignof(x) )    \
         clean_and_invalidate_dcache_va_range(_p, sizeof(x));            \
     else                                                                \
-        asm volatile (                                                  \
+        asm_inline volatile (                                           \
             "dsb sy;"   /* Finish all earlier writes */                 \
             __clean_and_invalidate_dcache_one(0)                        \
             "dsb sy;"   /* Finish flush before continuing */            \
diff --git a/xen/arch/arm/include/asm/processor.h b/xen/arch/arm/include/asm/processor.h
index 60b587db697f..9cbc4f911061 100644
--- a/xen/arch/arm/include/asm/processor.h
+++ b/xen/arch/arm/include/asm/processor.h
@@ -607,9 +607,10 @@ register_t get_default_cptr_flags(void);
 #define SYNCHRONIZE_SERROR(feat)                                  \
     do {                                                          \
         ASSERT(local_abort_is_enabled());                         \
-        asm volatile(ALTERNATIVE("dsb sy; isb",                   \
-                                 "nop; nop", feat)                \
-                                 : : : "memory");                 \
+        asm_inline volatile (                                     \
+            ALTERNATIVE("dsb sy; isb",                            \
+                        "nop; nop", feat)                         \
+            ::: "memory" );                                       \
     } while (0)
 
 /*
diff --git a/xen/arch/arm/include/asm/sysregs.h b/xen/arch/arm/include/asm/sysregs.h
index 61e30c9e517c..5c2d362be3d8 100644
--- a/xen/arch/arm/include/asm/sysregs.h
+++ b/xen/arch/arm/include/asm/sysregs.h
@@ -22,11 +22,13 @@ static inline register_t read_sysreg_par(void)
      * DMB SY before and after accessing it, as part of the workaround for the
      * errata 1508412.
      */
-    asm volatile(ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412,
-                 CONFIG_ARM64_ERRATUM_1508412));
+    asm_inline volatile (
+        ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412,
+                    CONFIG_ARM64_ERRATUM_1508412) );
     par_el1 = READ_SYSREG64(PAR_EL1);
-    asm volatile(ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412,
-                 CONFIG_ARM64_ERRATUM_1508412));
+    asm_inline volatile (
+        ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412,
+                    CONFIG_ARM64_ERRATUM_1508412) );
 
     return par_el1;
 }
diff --git a/xen/arch/arm/mmu/p2m.c b/xen/arch/arm/mmu/p2m.c
index 7642dbc7c55b..d96078f547d5 100644
--- a/xen/arch/arm/mmu/p2m.c
+++ b/xen/arch/arm/mmu/p2m.c
@@ -228,7 +228,8 @@ void p2m_restore_state(struct vcpu *n)
      * registers associated to EL1/EL0 translations regime have been
      * synchronized.
      */
-    asm volatile(ALTERNATIVE("nop", "isb", ARM64_WORKAROUND_AT_SPECULATE));
+    asm_inline volatile (
+        ALTERNATIVE("nop", "isb", ARM64_WORKAROUND_AT_SPECULATE) );
     WRITE_SYSREG64(p2m->vttbr, VTTBR_EL2);
 
     last_vcpu_ran = &p2m->last_vcpu_ran[smp_processor_id()];
diff --git a/xen/arch/x86/include/asm/alternative.h b/xen/arch/x86/include/asm/alternative.h
index 38472fb58e2d..4c8be51d0e23 100644
--- a/xen/arch/x86/include/asm/alternative.h
+++ b/xen/arch/x86/include/asm/alternative.h
@@ -116,12 +116,13 @@ extern void alternative_branches(void);
  * without volatile and memory clobber.
  */
 #define alternative(oldinstr, newinstr, feature)                        \
-        asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) : : : "memory")
+    asm_inline volatile ( ALTERNATIVE(oldinstr, newinstr, feature)      \
+                          ::: "memory" )
 
 #define alternative_2(oldinstr, newinstr1, feature1, newinstr2, feature2) \
-	asm volatile (ALTERNATIVE_2(oldinstr, newinstr1, feature1,	\
-				    newinstr2, feature2)		\
-		      : : : "memory")
+    asm_inline volatile ( ALTERNATIVE_2(oldinstr, newinstr1, feature1,  \
+                                        newinstr2, feature2)            \
+                          ::: "memory" )
 
 /*
  * Alternative inline assembly with input.
@@ -133,14 +134,14 @@ extern void alternative_branches(void);
  * If you use variable sized constraints like "m" or "g" in the
  * replacement make sure to pad to the worst case length.
  */
-#define alternative_input(oldinstr, newinstr, feature, input...)	\
-	asm volatile (ALTERNATIVE(oldinstr, newinstr, feature)		\
-		      : : input)
+#define alternative_input(oldinstr, newinstr, feature, input...)        \
+    asm_inline volatile ( ALTERNATIVE(oldinstr, newinstr, feature)      \
+                          :: input )
 
 /* Like alternative_input, but with a single output argument */
-#define alternative_io(oldinstr, newinstr, feature, output, input...)	\
-	asm volatile (ALTERNATIVE(oldinstr, newinstr, feature)		\
-		      : output : input)
+#define alternative_io(oldinstr, newinstr, feature, output, input...)   \
+    asm_inline volatile ( ALTERNATIVE(oldinstr, newinstr, feature)      \
+                          : output : input )
 
 /*
  * This is similar to alternative_io. But it has two features and
@@ -150,11 +151,11 @@ extern void alternative_branches(void);
  * Otherwise, if CPU has feature1, newinstr1 is used.
  * Otherwise, oldinstr is used.
  */
-#define alternative_io_2(oldinstr, newinstr1, feature1, newinstr2,	\
-			 feature2, output, input...)			\
-	asm volatile(ALTERNATIVE_2(oldinstr, newinstr1, feature1,	\
-				   newinstr2, feature2)			\
-		     : output : input)
+#define alternative_io_2(oldinstr, newinstr1, feature1, newinstr2,      \
+                         feature2, output, input...)                    \
+    asm_inline volatile ( ALTERNATIVE_2(oldinstr, newinstr1, feature1,  \
+                                        newinstr2, feature2)            \
+                          : output : input )
 
 /* Use this macro(s) if you need more than one output parameter. */
 #define ASM_OUTPUT2(a...) a
@@ -234,8 +235,9 @@ extern void alternative_branches(void);
     rettype ret_;                                                  \
     register unsigned long r10_ asm("r10");                        \
     register unsigned long r11_ asm("r11");                        \
-    asm volatile (ALTERNATIVE("call *%c[addr](%%rip)", "call .",   \
-                              X86_FEATURE_ALWAYS)                  \
+    asm_inline volatile (                                          \
+        ALTERNATIVE("call *%c[addr](%%rip)", "call .",             \
+                    X86_FEATURE_ALWAYS)                            \
                   : ALT_CALL ## n ## _OUT, "=a" (ret_),            \
                     "=r" (r10_), "=r" (r11_) ASM_CALL_CONSTRAINT   \
                   : [addr] "i" (&(func)), "g" (func)               \
diff --git a/xen/include/xen/compiler.h b/xen/include/xen/compiler.h
index c68fab189154..d9b133016bb6 100644
--- a/xen/include/xen/compiler.h
+++ b/xen/include/xen/compiler.h
@@ -53,6 +53,20 @@
 #define unreachable() __builtin_unreachable()
 #endif
 
+/*
+ * Compilers estimate the size of an asm() block for inlining purposes.
+ * Constructs such as ALTERNATIVE appear large due to the metadata, depsite
+ * often only being a handful of instructions.  asm inline() overrides the
+ * estimation to identify the block as being small.
+ *
+ * Note: __inline is needed to avoid getting caught up in INIT_SECTIONS_ONLY.
+ */
+#if CONFIG_CC_HAS_ASM_INLINE
+# define asm_inline asm __inline
+#else
+# define asm_inline asm
+#endif
+
 /*
  * Add the pseudo keyword 'fallthrough' so case statement blocks
  * must end with any of these keywords:
-- 
2.39.5



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        Tue, 22 Apr 2025 04:41:37 -0700 (PDT)
From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Julien Grall ,
	Volodymyr Babchuk ,
	Bertrand Marquis ,
	Michal Orzel 
Subject: [PATCH] xen: Consistently use alignof()
Date: Tue, 22 Apr 2025 12:41:34 +0100
Message-Id: <20250422114134.1291254-1-andrew.cooper3@citrix.com>
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We have a mix of all 3 spellings in Xen, as well as having compatibility in
compiler.h for older C standards.

Remove the use of __alignof() and __alignof__(), which reduced code volume a
little.

No functional change.

Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Julien Grall 
CC: Volodymyr Babchuk 
CC: Bertrand Marquis 
CC: Michal Orzel 

x86_emulate.c and compat-build-header.py still use __alignof() because they
have code used outside of Xen.

The compiler.h compatibilty checks for < C11, whereas it was C23 when they
became keywords.  Nothing seems to mind, so I've left it alone.
---
 xen/arch/x86/xstate.c                |  4 ++--
 xen/common/coverage/gcc_3_4.c        |  4 ++--
 xen/common/device-tree/device-tree.c |  8 ++++----
 xen/include/xen/config.h             |  2 +-
 xen/include/xen/percpu.h             |  2 +-
 xen/include/xen/xmalloc.h            | 16 ++++++++--------
 xen/include/xen/xvmalloc.h           | 16 ++++++++--------
 7 files changed, 26 insertions(+), 26 deletions(-)

diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c
index 3d249518a1b7..d423bf7978da 100644
--- a/xen/arch/x86/xstate.c
+++ b/xen/arch/x86/xstate.c
@@ -542,8 +542,8 @@ int xstate_alloc_save_area(struct vcpu *v)
     }
 
     /* XSAVE/XRSTOR requires the save area be 64-byte-boundary aligned. */
-    BUILD_BUG_ON(__alignof(*save_area) < 64);
-    save_area = _xvzalloc(size, __alignof(*save_area));
+    BUILD_BUG_ON(alignof(*save_area) < 64);
+    save_area = _xvzalloc(size, alignof(*save_area));
     if ( save_area == NULL )
         return -ENOMEM;
 
diff --git a/xen/common/coverage/gcc_3_4.c b/xen/common/coverage/gcc_3_4.c
index 3631f4bc2535..393e3c866d74 100644
--- a/xen/common/coverage/gcc_3_4.c
+++ b/xen/common/coverage/gcc_3_4.c
@@ -199,8 +199,8 @@ static size_t get_fn_size(const struct gcov_info *info)
 
     size = sizeof(struct gcov_fn_info) + num_counter_active(info) *
         sizeof(unsigned int);
-    if ( __alignof__(struct gcov_fn_info) > sizeof(unsigned int) )
-        size = ROUNDUP(size, __alignof__(struct gcov_fn_info));
+    if ( alignof(struct gcov_fn_info) > sizeof(unsigned int) )
+        size = ROUNDUP(size, alignof(struct gcov_fn_info));
     return size;
 }
 
diff --git a/xen/common/device-tree/device-tree.c b/xen/common/device-tree/device-tree.c
index 90fee2ba0315..e4dea4b42a1d 100644
--- a/xen/common/device-tree/device-tree.c
+++ b/xen/common/device-tree/device-tree.c
@@ -1885,7 +1885,7 @@ static unsigned long unflatten_dt_node(const void *fdt,
     }
 
     np = unflatten_dt_alloc(&mem, sizeof(struct dt_device_node) + allocl,
-                            __alignof__(struct dt_device_node));
+                            alignof(struct dt_device_node));
     if ( allnextpp )
     {
         memset(np, 0, sizeof(*np));
@@ -1963,7 +1963,7 @@ static unsigned long unflatten_dt_node(const void *fdt,
             has_name = 1;
         l = strlen(pname) + 1;
         pp = unflatten_dt_alloc(&mem, sizeof(struct dt_property),
-                                __alignof__(struct dt_property));
+                                alignof(struct dt_property));
         if ( allnextpp )
         {
             /* We accept flattened tree phandles either in
@@ -2010,7 +2010,7 @@ static unsigned long unflatten_dt_node(const void *fdt,
             pa = p1;
         sz = (pa - ps) + 1;
         pp = unflatten_dt_alloc(&mem, sizeof(struct dt_property) + sz,
-                                __alignof__(struct dt_property));
+                                alignof(struct dt_property));
         if ( allnextpp )
         {
             pp->name = "name";
@@ -2088,7 +2088,7 @@ int unflatten_device_tree(const void *fdt, struct dt_device_node **mynodes)
     dt_dprintk("  size is %#lx allocating...\n", size);
 
     /* Allocate memory for the expanded device tree */
-    mem = (unsigned long)_xmalloc (size + 4, __alignof__(struct dt_device_node));
+    mem = (unsigned long)_xmalloc(size + 4, alignof(struct dt_device_node));
     if ( !mem )
         return -ENOMEM;
 
diff --git a/xen/include/xen/config.h b/xen/include/xen/config.h
index 1d7195066c08..479c3bac8925 100644
--- a/xen/include/xen/config.h
+++ b/xen/include/xen/config.h
@@ -105,7 +105,7 @@
 #define BITS_PER_LONG   (BITS_PER_BYTE * BYTES_PER_LONG)
 #define BITS_PER_LLONG  (BITS_PER_BYTE * __SIZEOF_LONG_LONG__)
 
-/* It is assumed that sizeof(void *) == __alignof(void *) */
+/* It is assumed that sizeof(void *) == alignof(void *) */
 #define POINTER_ALIGN   __SIZEOF_POINTER__
 
 #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
diff --git a/xen/include/xen/percpu.h b/xen/include/xen/percpu.h
index e7f585c7ed69..62a6259b2bc1 100644
--- a/xen/include/xen/percpu.h
+++ b/xen/include/xen/percpu.h
@@ -18,7 +18,7 @@
 
 #define DEFINE_PER_CPU_PAGE_ALIGNED(type, name) \
     typedef char name ## _chk_t \
-        [BUILD_BUG_ON_ZERO(__alignof(type) & (PAGE_SIZE - 1))]; \
+        [BUILD_BUG_ON_ZERO(alignof(type) & (PAGE_SIZE - 1))]; \
     __DEFINE_PER_CPU(__section(".bss.percpu.page_aligned"), \
                      type, _ ## name)
 
diff --git a/xen/include/xen/xmalloc.h b/xen/include/xen/xmalloc.h
index f0412fb4e021..b7616c3b9038 100644
--- a/xen/include/xen/xmalloc.h
+++ b/xen/include/xen/xmalloc.h
@@ -13,8 +13,8 @@
  */
 
 /* Allocate space for typed object. */
-#define xmalloc(_type) ((_type *)_xmalloc(sizeof(_type), __alignof__(_type)))
-#define xzalloc(_type) ((_type *)_xzalloc(sizeof(_type), __alignof__(_type)))
+#define xmalloc(_type) ((_type *)_xmalloc(sizeof(_type), alignof(_type)))
+#define xzalloc(_type) ((_type *)_xzalloc(sizeof(_type), alignof(_type)))
 
 /*
  * Allocate space for a typed object and copy an existing instance.
@@ -34,24 +34,24 @@
 
 /* Allocate space for array of typed objects. */
 #define xmalloc_array(_type, _num) \
-    ((_type *)_xmalloc_array(sizeof(_type), __alignof__(_type), _num))
+    ((_type *)_xmalloc_array(sizeof(_type), alignof(_type), _num))
 #define xzalloc_array(_type, _num) \
-    ((_type *)_xzalloc_array(sizeof(_type), __alignof__(_type), _num))
+    ((_type *)_xzalloc_array(sizeof(_type), alignof(_type), _num))
 #define xrealloc_array(_ptr, _num)                                  \
     ((typeof(_ptr))_xrealloc_array(_ptr, sizeof(typeof(*(_ptr))),   \
-                                   __alignof__(typeof(*(_ptr))), _num))
+                                   alignof(typeof(*(_ptr))), _num))
 
 /* Allocate space for a structure with a flexible array of typed objects. */
 #define xzalloc_flex_struct(type, field, nr) \
-    ((type *)_xzalloc(offsetof(type, field[nr]), __alignof__(type)))
+    ((type *)_xzalloc(offsetof(type, field[nr]), alignof(type)))
 
 #define xmalloc_flex_struct(type, field, nr) \
-    ((type *)_xmalloc(offsetof(type, field[nr]), __alignof__(type)))
+    ((type *)_xmalloc(offsetof(type, field[nr]), alignof(type)))
 
 /* Re-allocate space for a structure with a flexible array of typed objects. */
 #define xrealloc_flex_struct(ptr, field, nr)                           \
     ((typeof(ptr))_xrealloc(ptr, offsetof(typeof(*(ptr)), field[nr]),  \
-                            __alignof__(typeof(*(ptr)))))
+                            alignof(typeof(*(ptr)))))
 
 /* Allocate untyped storage. */
 #define xmalloc_bytes(_bytes) _xmalloc(_bytes, SMP_CACHE_BYTES)
diff --git a/xen/include/xen/xvmalloc.h b/xen/include/xen/xvmalloc.h
index 7686d49f8154..d2288c175814 100644
--- a/xen/include/xen/xvmalloc.h
+++ b/xen/include/xen/xvmalloc.h
@@ -10,13 +10,13 @@
  */
 
 /* Allocate space for typed object. */
-#define xvmalloc(_type) ((_type *)_xvmalloc(sizeof(_type), __alignof__(_type)))
-#define xvzalloc(_type) ((_type *)_xvzalloc(sizeof(_type), __alignof__(_type)))
+#define xvmalloc(_type) ((_type *)_xvmalloc(sizeof(_type), alignof(_type)))
+#define xvzalloc(_type) ((_type *)_xvzalloc(sizeof(_type), alignof(_type)))
 
 /* Allocate space for a typed object and copy an existing instance. */
 #define xvmemdup(ptr)                                          \
 ({                                                             \
-    void *p_ = _xvmalloc(sizeof(*(ptr)), __alignof__(*(ptr))); \
+    void *p_ = _xvmalloc(sizeof(*(ptr)), alignof(*(ptr))); \
     if ( p_ )                                                  \
         memcpy(p_, ptr, sizeof(*(ptr)));                       \
     (typeof(*(ptr)) *)p_;                                      \
@@ -24,21 +24,21 @@
 
 /* Allocate space for array of typed objects. */
 #define xvmalloc_array(_type, _num) \
-    ((_type *)_xvmalloc_array(sizeof(_type), __alignof__(_type), _num))
+    ((_type *)_xvmalloc_array(sizeof(_type), alignof(_type), _num))
 #define xvzalloc_array(_type, _num) \
-    ((_type *)_xvzalloc_array(sizeof(_type), __alignof__(_type), _num))
+    ((_type *)_xvzalloc_array(sizeof(_type), alignof(_type), _num))
 
 /* Allocate space for a structure with a flexible array of typed objects. */
 #define xvzalloc_flex_struct(type, field, nr) \
-    ((type *)_xvzalloc(offsetof(type, field[nr]), __alignof__(type)))
+    ((type *)_xvzalloc(offsetof(type, field[nr]), alignof(type)))
 
 #define xvmalloc_flex_struct(type, field, nr) \
-    ((type *)_xvmalloc(offsetof(type, field[nr]), __alignof__(type)))
+    ((type *)_xvmalloc(offsetof(type, field[nr]), alignof(type)))
 
 /* Re-allocate space for a structure with a flexible array of typed objects. */
 #define xvrealloc_flex_struct(ptr, field, nr)                          \
     ((typeof(ptr))_xvrealloc(ptr, offsetof(typeof(*(ptr)), field[nr]), \
-                             __alignof__(typeof(*(ptr)))))
+                             alignof(typeof(*(ptr)))))
 
 #ifdef CONFIG_HAS_VMAP
 
-- 
2.39.5



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To: Andrew Cooper 
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On 22.04.2025 13:32, Andrew Cooper wrote:
> --- a/xen/include/xen/xen.lds.h
> +++ b/xen/include/xen/xen.lds.h
> @@ -56,6 +56,7 @@
>    DECL_DEBUG2(.debug_info, .gnu.linkonce.wi.*, 1) \
>    DECL_DEBUG(.debug_types, 1)                     \
>    DECL_DEBUG(.debug_str, 1)                       \
> +  DECL_DEBUG(.debug_str_offsets, 1)               \

The alignment wants to be at least 4. I don't think it needs to be 8, as
I don't expect us to require a 64-bit Dwarf container any time soon. Then:
Reviewed-by: Jan Beulich 

Jan


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On 22.04.2025 13:33, Andrew Cooper wrote:
> alternative.h doesn't need lib.h now that macros.h exists.  Futhermore, STR()
> is already the prevailing style, so convert the final __stringify() to drop
> stringify.h too.
> 
> No functional change.
> 
> Signed-off-by: Andrew Cooper 

Acked-by: Jan Beulich 




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Subject: Re: [PATCH] xen: Use asm inline when available for alternatives
To: Andrew Cooper 
Cc: Xen-devel , Jan Beulich , 
	=?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
	Stefano Stabellini , Julien Grall , 
	Volodymyr Babchuk , Bertrand Marquis , 
	Michal Orzel 
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On Tue, Apr 22, 2025 at 12:40=E2=80=AFPM Andrew Cooper
 wrote:
>
> Compilers estimate the size of an asm() block for inlining purposes.
>
> Constructs such as ALTERNATIVE appear large due to the metadata, depsite =
often
> only being a handful of instructions.  asm inline() overrides the estimat=
ion
> to identify the block as being small.
>
> This has a substantial impact on inlining decisions, expected to be for t=
he
> better given that the compiler has a more accurate picture to work with.
>
> Signed-off-by: Andrew Cooper 
> ---
> CC: Jan Beulich 
> CC: Roger Pau Monn=C3=A9 
> CC: Stefano Stabellini 
> CC: Julien Grall 
> CC: Volodymyr Babchuk 
> CC: Bertrand Marquis 
> CC: Michal Orzel 
> ---
>  xen/Kconfig                               |  4 +++
>  xen/arch/arm/include/asm/alternative.h    |  4 +--
>  xen/arch/arm/include/asm/arm64/flushtlb.h |  4 +--
>  xen/arch/arm/include/asm/arm64/io.h       | 43 ++++++++++++++---------
>  xen/arch/arm/include/asm/cpuerrata.h      |  8 ++---
>  xen/arch/arm/include/asm/cpufeature.h     |  8 ++---
>  xen/arch/arm/include/asm/page.h           | 12 ++++---
>  xen/arch/arm/include/asm/processor.h      |  7 ++--
>  xen/arch/arm/include/asm/sysregs.h        | 10 +++---
>  xen/arch/arm/mmu/p2m.c                    |  3 +-
>  xen/arch/x86/include/asm/alternative.h    | 36 ++++++++++---------
>  xen/include/xen/compiler.h                | 14 ++++++++
>  12 files changed, 95 insertions(+), 58 deletions(-)
>
> diff --git a/xen/Kconfig b/xen/Kconfig
> index ae1c401a981e..ab4ab42ae987 100644
> --- a/xen/Kconfig
> +++ b/xen/Kconfig
> @@ -29,6 +29,10 @@ config LD_IS_GNU
>  config LD_IS_LLVM
>         def_bool $(success,$(LD) --version | head -n 1 | grep -q "^LLD")
>
> +config CC_HAS_ASM_INLINE
> +       # GCC >=3D 9, Clang >=3D 11
> +       def_bool $(success,echo 'void foo(void) { asm inline (""); }' | $=
(CC) -x c - -c -o /dev/null)
> +

Why not check for "asm __inline" instead of "asm inline" ? The
asm_inline macro below uses "asm __inline".
They are mainly synonyms but it would look more coherent.

>  # Use -f{function,data}-sections compiler parameters
>  config CC_SPLIT_SECTIONS
>         bool
> diff --git a/xen/arch/arm/include/asm/alternative.h b/xen/arch/arm/includ=
e/asm/alternative.h
> index 22477d9497a3..1563f03a0f5a 100644
> --- a/xen/arch/arm/include/asm/alternative.h
> +++ b/xen/arch/arm/include/asm/alternative.h
> @@ -209,9 +209,9 @@ alternative_endif
>  #endif  /*  __ASSEMBLY__  */
>
>  /*
> - * Usage: asm(ALTERNATIVE(oldinstr, newinstr, feature));
> + * Usage: asm_inline (ALTERNATIVE(oldinstr, newinstr, feature));
>   *
> - * Usage: asm(ALTERNATIVE(oldinstr, newinstr, feature, CONFIG_FOO));
> + * Usage: asm_inline (ALTERNATIVE(oldinstr, newinstr, feature, CONFIG_FO=
O));
>   * N.B. If CONFIG_FOO is specified, but not selected, the whole block
>   *      will be omitted, including oldinstr.
>   */
> diff --git a/xen/arch/arm/include/asm/arm64/flushtlb.h b/xen/arch/arm/inc=
lude/asm/arm64/flushtlb.h
> index 45642201d147..3b99c11b50d1 100644
> --- a/xen/arch/arm/include/asm/arm64/flushtlb.h
> +++ b/xen/arch/arm/include/asm/arm64/flushtlb.h
> @@ -31,7 +31,7 @@
>  #define TLB_HELPER(name, tlbop, sh)              \
>  static inline void name(void)                    \
>  {                                                \
> -    asm volatile(                                \
> +    asm_inline volatile (                        \
>          "dsb  "  # sh  "st;"                     \
>          "tlbi "  # tlbop  ";"                    \
>          ALTERNATIVE(                             \
> @@ -55,7 +55,7 @@ static inline void name(void)                    \
>  #define TLB_HELPER_VA(name, tlbop)               \
>  static inline void name(vaddr_t va)              \
>  {                                                \
> -    asm volatile(                                \
> +    asm_inline volatile (                        \
>          "tlbi "  # tlbop  ", %0;"                \
>          ALTERNATIVE(                             \
>              "nop; nop;",                         \
> diff --git a/xen/arch/arm/include/asm/arm64/io.h b/xen/arch/arm/include/a=
sm/arm64/io.h
> index 7d5959877759..ac90b729c44d 100644
> --- a/xen/arch/arm/include/asm/arm64/io.h
> +++ b/xen/arch/arm/include/asm/arm64/io.h
> @@ -51,40 +51,51 @@ static inline void __raw_writeq(u64 val, volatile voi=
d __iomem *addr)
>  static inline u8 __raw_readb(const volatile void __iomem *addr)
>  {
>          u8 val;
> -        asm volatile(ALTERNATIVE("ldrb %w0, [%1]",
> -                                 "ldarb %w0, [%1]",
> -                                 ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
> -                     : "=3Dr" (val) : "r" (addr));
> +
> +        asm_inline volatile (
> +            ALTERNATIVE("ldrb %w0, [%1]",
> +                        "ldarb %w0, [%1]",
> +                        ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
> +            : "=3Dr" (val) : "r" (addr) );
> +
>          return val;
>  }
>
>  static inline u16 __raw_readw(const volatile void __iomem *addr)
>  {
>          u16 val;
> -        asm volatile(ALTERNATIVE("ldrh %w0, [%1]",
> -                                 "ldarh %w0, [%1]",
> -                                 ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
> -                     : "=3Dr" (val) : "r" (addr));
> +        asm_inline volatile (
> +            ALTERNATIVE("ldrh %w0, [%1]",
> +                        "ldarh %w0, [%1]",
> +                        ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
> +            : "=3Dr" (val) : "r" (addr) );
> +
>          return val;
>  }
>
>  static inline u32 __raw_readl(const volatile void __iomem *addr)
>  {
>          u32 val;
> -        asm volatile(ALTERNATIVE("ldr %w0, [%1]",
> -                                 "ldar %w0, [%1]",
> -                                 ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
> -                     : "=3Dr" (val) : "r" (addr));
> +
> +        asm_inline volatile (
> +            ALTERNATIVE("ldr %w0, [%1]",
> +                        "ldar %w0, [%1]",
> +                        ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
> +            : "=3Dr" (val) : "r" (addr) );
> +
>          return val;
>  }
>
>  static inline u64 __raw_readq(const volatile void __iomem *addr)
>  {
>          u64 val;
> -        asm volatile(ALTERNATIVE("ldr %0, [%1]",
> -                                 "ldar %0, [%1]",
> -                                 ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
> -                     : "=3Dr" (val) : "r" (addr));
> +
> +        asm_inline volatile (
> +            ALTERNATIVE("ldr %0, [%1]",
> +                        "ldar %0, [%1]",
> +                        ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
> +            : "=3Dr" (val) : "r" (addr) );
> +
>          return val;
>  }
>
> diff --git a/xen/arch/arm/include/asm/cpuerrata.h b/xen/arch/arm/include/=
asm/cpuerrata.h
> index 8d7e7b9375bd..1799a16d7e7f 100644
> --- a/xen/arch/arm/include/asm/cpuerrata.h
> +++ b/xen/arch/arm/include/asm/cpuerrata.h
> @@ -16,10 +16,10 @@ static inline bool check_workaround_##erratum(void)  =
           \
>      {                                                           \
>          register_t ret;                                         \
>                                                                  \
> -        asm volatile (ALTERNATIVE("mov %0, #0",                 \
> -                                  "mov %0, #1",                 \
> -                                  feature)                      \
> -                      : "=3Dr" (ret));                            \
> +        asm_inline volatile (                                   \
> +            ALTERNATIVE("mov %0, #0",                           \
> +                        "mov %0, #1", feature)                  \
> +            : "=3Dr" (ret) );                                     \
>                                                                  \
>          return unlikely(ret);                                   \
>      }                                                           \
> diff --git a/xen/arch/arm/include/asm/cpufeature.h b/xen/arch/arm/include=
/asm/cpufeature.h
> index 50297e53d90e..b6df18801166 100644
> --- a/xen/arch/arm/include/asm/cpufeature.h
> +++ b/xen/arch/arm/include/asm/cpufeature.h
> @@ -102,10 +102,10 @@ static inline bool cpus_have_cap(unsigned int num)
>  #define cpus_have_const_cap(num) ({                 \
>          register_t __ret;                           \
>                                                      \
> -        asm volatile (ALTERNATIVE("mov %0, #0",     \
> -                                  "mov %0, #1",     \
> -                                  num)              \
> -                      : "=3Dr" (__ret));              \
> +        asm_inline volatile (                       \
> +            ALTERNATIVE("mov %0, #0",               \
> +                        "mov %0, #1", num)          \
> +            : "=3Dr" (__ret) );                       \
>                                                      \
>          unlikely(__ret);                            \
>          })
> diff --git a/xen/arch/arm/include/asm/page.h b/xen/arch/arm/include/asm/p=
age.h
> index 69f817d1e68a..27bc96b9f401 100644
> --- a/xen/arch/arm/include/asm/page.h
> +++ b/xen/arch/arm/include/asm/page.h
> @@ -176,7 +176,8 @@ static inline int invalidate_dcache_va_range(const vo=
id *p, unsigned long size)
>      {
>          size -=3D dcache_line_bytes - ((uintptr_t)p & cacheline_mask);
>          p =3D (void *)((uintptr_t)p & ~cacheline_mask);
> -        asm volatile (__clean_and_invalidate_dcache_one(0) : : "r" (p));
> +        asm_inline volatile (
> +            __clean_and_invalidate_dcache_one(0) :: "r" (p) );
>          p +=3D dcache_line_bytes;
>      }
>
> @@ -185,7 +186,8 @@ static inline int invalidate_dcache_va_range(const vo=
id *p, unsigned long size)
>          asm volatile (__invalidate_dcache_one(0) : : "r" (p + idx));
>
>      if ( size > 0 )
> -        asm volatile (__clean_and_invalidate_dcache_one(0) : : "r" (p + =
idx));
> +        asm_inline volatile (
> +            __clean_and_invalidate_dcache_one(0) :: "r" (p + idx) );
>
>      dsb(sy);           /* So we know the flushes happen before continuin=
g */
>
> @@ -209,7 +211,7 @@ static inline int clean_dcache_va_range(const void *p=
, unsigned long size)
>      p =3D (void *)((uintptr_t)p & ~cacheline_mask);
>      for ( ; size >=3D dcache_line_bytes;
>              idx +=3D dcache_line_bytes, size -=3D dcache_line_bytes )
> -        asm volatile (__clean_dcache_one(0) : : "r" (p + idx));
> +        asm_inline volatile ( __clean_dcache_one(0) : : "r" (p + idx) );
>      dsb(sy);           /* So we know the flushes happen before continuin=
g */
>      /* ARM callers assume that dcache_* functions cannot fail. */
>      return 0;
> @@ -247,7 +249,7 @@ static inline int clean_and_invalidate_dcache_va_rang=
e
>      if ( sizeof(x) > MIN_CACHELINE_BYTES || sizeof(x) > alignof(x) )    =
\
>          clean_dcache_va_range(_p, sizeof(x));                           =
\
>      else                                                                =
\
> -        asm volatile (                                                  =
\
> +        asm_inline volatile (                                           =
\
>              "dsb sy;"   /* Finish all earlier writes */                 =
\
>              __clean_dcache_one(0)                                       =
\
>              "dsb sy;"   /* Finish flush before continuing */            =
\
> @@ -259,7 +261,7 @@ static inline int clean_and_invalidate_dcache_va_rang=
e
>      if ( sizeof(x) > MIN_CACHELINE_BYTES || sizeof(x) > alignof(x) )    =
\
>          clean_and_invalidate_dcache_va_range(_p, sizeof(x));            =
\
>      else                                                                =
\
> -        asm volatile (                                                  =
\
> +        asm_inline volatile (                                           =
\
>              "dsb sy;"   /* Finish all earlier writes */                 =
\
>              __clean_and_invalidate_dcache_one(0)                        =
\
>              "dsb sy;"   /* Finish flush before continuing */            =
\
> diff --git a/xen/arch/arm/include/asm/processor.h b/xen/arch/arm/include/=
asm/processor.h
> index 60b587db697f..9cbc4f911061 100644
> --- a/xen/arch/arm/include/asm/processor.h
> +++ b/xen/arch/arm/include/asm/processor.h
> @@ -607,9 +607,10 @@ register_t get_default_cptr_flags(void);
>  #define SYNCHRONIZE_SERROR(feat)                                  \
>      do {                                                          \
>          ASSERT(local_abort_is_enabled());                         \
> -        asm volatile(ALTERNATIVE("dsb sy; isb",                   \
> -                                 "nop; nop", feat)                \
> -                                 : : : "memory");                 \
> +        asm_inline volatile (                                     \
> +            ALTERNATIVE("dsb sy; isb",                            \
> +                        "nop; nop", feat)                         \
> +            ::: "memory" );                                       \
>      } while (0)
>
>  /*
> diff --git a/xen/arch/arm/include/asm/sysregs.h b/xen/arch/arm/include/as=
m/sysregs.h
> index 61e30c9e517c..5c2d362be3d8 100644
> --- a/xen/arch/arm/include/asm/sysregs.h
> +++ b/xen/arch/arm/include/asm/sysregs.h
> @@ -22,11 +22,13 @@ static inline register_t read_sysreg_par(void)
>       * DMB SY before and after accessing it, as part of the workaround f=
or the
>       * errata 1508412.
>       */
> -    asm volatile(ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412,
> -                 CONFIG_ARM64_ERRATUM_1508412));
> +    asm_inline volatile (
> +        ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412,
> +                    CONFIG_ARM64_ERRATUM_1508412) );
>      par_el1 =3D READ_SYSREG64(PAR_EL1);
> -    asm volatile(ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412,
> -                 CONFIG_ARM64_ERRATUM_1508412));
> +    asm_inline volatile (
> +        ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412,
> +                    CONFIG_ARM64_ERRATUM_1508412) );
>
>      return par_el1;
>  }
> diff --git a/xen/arch/arm/mmu/p2m.c b/xen/arch/arm/mmu/p2m.c
> index 7642dbc7c55b..d96078f547d5 100644
> --- a/xen/arch/arm/mmu/p2m.c
> +++ b/xen/arch/arm/mmu/p2m.c
> @@ -228,7 +228,8 @@ void p2m_restore_state(struct vcpu *n)
>       * registers associated to EL1/EL0 translations regime have been
>       * synchronized.
>       */
> -    asm volatile(ALTERNATIVE("nop", "isb", ARM64_WORKAROUND_AT_SPECULATE=
));
> +    asm_inline volatile (
> +        ALTERNATIVE("nop", "isb", ARM64_WORKAROUND_AT_SPECULATE) );
>      WRITE_SYSREG64(p2m->vttbr, VTTBR_EL2);
>
>      last_vcpu_ran =3D &p2m->last_vcpu_ran[smp_processor_id()];
> diff --git a/xen/arch/x86/include/asm/alternative.h b/xen/arch/x86/includ=
e/asm/alternative.h
> index 38472fb58e2d..4c8be51d0e23 100644
> --- a/xen/arch/x86/include/asm/alternative.h
> +++ b/xen/arch/x86/include/asm/alternative.h
> @@ -116,12 +116,13 @@ extern void alternative_branches(void);
>   * without volatile and memory clobber.
>   */
>  #define alternative(oldinstr, newinstr, feature)                        =
\
> -        asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) : : : "me=
mory")
> +    asm_inline volatile ( ALTERNATIVE(oldinstr, newinstr, feature)      =
\
> +                          ::: "memory" )
>
>  #define alternative_2(oldinstr, newinstr1, feature1, newinstr2, feature2=
) \
> -       asm volatile (ALTERNATIVE_2(oldinstr, newinstr1, feature1,      \
> -                                   newinstr2, feature2)                \
> -                     : : : "memory")
> +    asm_inline volatile ( ALTERNATIVE_2(oldinstr, newinstr1, feature1,  =
\
> +                                        newinstr2, feature2)            =
\
> +                          ::: "memory" )
>
>  /*
>   * Alternative inline assembly with input.
> @@ -133,14 +134,14 @@ extern void alternative_branches(void);
>   * If you use variable sized constraints like "m" or "g" in the
>   * replacement make sure to pad to the worst case length.
>   */
> -#define alternative_input(oldinstr, newinstr, feature, input...)       \
> -       asm volatile (ALTERNATIVE(oldinstr, newinstr, feature)          \
> -                     : : input)
> +#define alternative_input(oldinstr, newinstr, feature, input...)        =
\
> +    asm_inline volatile ( ALTERNATIVE(oldinstr, newinstr, feature)      =
\
> +                          :: input )
>
>  /* Like alternative_input, but with a single output argument */
> -#define alternative_io(oldinstr, newinstr, feature, output, input...)  \
> -       asm volatile (ALTERNATIVE(oldinstr, newinstr, feature)          \
> -                     : output : input)
> +#define alternative_io(oldinstr, newinstr, feature, output, input...)   =
\
> +    asm_inline volatile ( ALTERNATIVE(oldinstr, newinstr, feature)      =
\
> +                          : output : input )
>
>  /*
>   * This is similar to alternative_io. But it has two features and
> @@ -150,11 +151,11 @@ extern void alternative_branches(void);
>   * Otherwise, if CPU has feature1, newinstr1 is used.
>   * Otherwise, oldinstr is used.
>   */
> -#define alternative_io_2(oldinstr, newinstr1, feature1, newinstr2,     \
> -                        feature2, output, input...)                    \
> -       asm volatile(ALTERNATIVE_2(oldinstr, newinstr1, feature1,       \
> -                                  newinstr2, feature2)                 \
> -                    : output : input)
> +#define alternative_io_2(oldinstr, newinstr1, feature1, newinstr2,      =
\
> +                         feature2, output, input...)                    =
\
> +    asm_inline volatile ( ALTERNATIVE_2(oldinstr, newinstr1, feature1,  =
\
> +                                        newinstr2, feature2)            =
\
> +                          : output : input )
>
>  /* Use this macro(s) if you need more than one output parameter. */
>  #define ASM_OUTPUT2(a...) a
> @@ -234,8 +235,9 @@ extern void alternative_branches(void);
>      rettype ret_;                                                  \
>      register unsigned long r10_ asm("r10");                        \
>      register unsigned long r11_ asm("r11");                        \
> -    asm volatile (ALTERNATIVE("call *%c[addr](%%rip)", "call .",   \
> -                              X86_FEATURE_ALWAYS)                  \
> +    asm_inline volatile (                                          \
> +        ALTERNATIVE("call *%c[addr](%%rip)", "call .",             \
> +                    X86_FEATURE_ALWAYS)                            \
>                    : ALT_CALL ## n ## _OUT, "=3Da" (ret_),            \
>                      "=3Dr" (r10_), "=3Dr" (r11_) ASM_CALL_CONSTRAINT   \
>                    : [addr] "i" (&(func)), "g" (func)               \
> diff --git a/xen/include/xen/compiler.h b/xen/include/xen/compiler.h
> index c68fab189154..d9b133016bb6 100644
> --- a/xen/include/xen/compiler.h
> +++ b/xen/include/xen/compiler.h
> @@ -53,6 +53,20 @@
>  #define unreachable() __builtin_unreachable()
>  #endif
>
> +/*
> + * Compilers estimate the size of an asm() block for inlining purposes.
> + * Constructs such as ALTERNATIVE appear large due to the metadata, deps=
ite
> + * often only being a handful of instructions.  asm inline() overrides t=
he
> + * estimation to identify the block as being small.
> + *
> + * Note: __inline is needed to avoid getting caught up in INIT_SECTIONS_=
ONLY.
> + */
> +#if CONFIG_CC_HAS_ASM_INLINE
> +# define asm_inline asm __inline

Here ^^^

> +#else
> +# define asm_inline asm
> +#endif
> +
>  /*
>   * Add the pseudo keyword 'fallthrough' so case statement blocks
>   * must end with any of these keywords:

Frediano


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On 4/20/25 05:36, Jürgen Groß wrote:
> On 20.04.25 00:07, Daniel P. Smith wrote:
>> Relocated the function sched_setup_dom0_vcpus(), which was protected 
>> by an
>> ifdef CONFIG_X86, from common/sched to the hyperlaunch domain builder. 
>> Rename
>> it to alloc_dom_vcpus() to better reflect the purpose of the function.
> 
> I'd be in favor naming it domain_vcpus_create().

Yah, that's a much better name.

v/r,
dps



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Subject: Re: [PATCH] xen: Drop CONFIG_CC_HAS_UBSAN
To: Andrew Cooper 
Cc: Anthony PERARD ,
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On 22.04.2025 13:35, Andrew Cooper wrote:
> All supported toolchains now have it.
> 
> Signed-off-by: Andrew Cooper 

Acked-by: Jan Beulich 




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Subject: Re: [PATCH] xen: Drop CONFIG_CC_HAS_VISIBILITY_ATTRIBUTE
To: Andrew Cooper 
Cc: Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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 Xen-devel 
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On 22.04.2025 13:35, Andrew Cooper wrote:
> All supported toolchains now have it.
> 
> Signed-off-by: Andrew Cooper 

Acked-by: Jan Beulich 




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Subject: Re: [PATCH] xen: Use asm inline when available for alternatives
To: Andrew Cooper 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , Julien Grall ,
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On 22.04.2025 13:39, Andrew Cooper wrote:
> Compilers estimate the size of an asm() block for inlining purposes.
> 
> Constructs such as ALTERNATIVE appear large due to the metadata, depsite often
> only being a handful of instructions.  asm inline() overrides the estimation
> to identify the block as being small.
> 
> This has a substantial impact on inlining decisions, expected to be for the
> better given that the compiler has a more accurate picture to work with.
> 
> Signed-off-by: Andrew Cooper 

So this is effectively a generalized version of
https://lists.xen.org/archives/html/xen-devel/2022-08/msg00712.html
with ...

> --- a/xen/Kconfig
> +++ b/xen/Kconfig
> @@ -29,6 +29,10 @@ config LD_IS_GNU
>  config LD_IS_LLVM
>  	def_bool $(success,$(LD) --version | head -n 1 | grep -q "^LLD")
>  
> +config CC_HAS_ASM_INLINE
> +	# GCC >= 9, Clang >= 11
> +	def_bool $(success,echo 'void foo(void) { asm inline (""); }' | $(CC) -x c - -c -o /dev/null)

... detection once again done in Kconfig (only). I don't think I had any
feedback there; I'm hence having a hard time seeing why I should now like
this any better than mine was liked.

In any event it's clearly increasingly necessary that we finally get the
detection aspect settled.

Jan


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Subject: Re: [PATCH] xen: Consistently use alignof()
To: Andrew Cooper 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , Julien Grall ,
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On 22.04.2025 13:41, Andrew Cooper wrote:
> We have a mix of all 3 spellings in Xen, as well as having compatibility in
> compiler.h for older C standards.
> 
> Remove the use of __alignof() and __alignof__(), which reduced code volume a
> little.
> 
> No functional change.
> 
> Signed-off-by: Andrew Cooper 

Acked-by: Jan Beulich 
as it seems sufficiently unlikely that ...

> ---
>  xen/arch/x86/xstate.c                |  4 ++--
>  xen/common/coverage/gcc_3_4.c        |  4 ++--
>  xen/common/device-tree/device-tree.c |  8 ++++----
>  xen/include/xen/config.h             |  2 +-
>  xen/include/xen/percpu.h             |  2 +-
>  xen/include/xen/xmalloc.h            | 16 ++++++++--------
>  xen/include/xen/xvmalloc.h           | 16 ++++++++--------
>  7 files changed, 26 insertions(+), 26 deletions(-)

... the headers here might want re-using from outside of xen/. As mentioned
on Matrix the other day when a question was raised about asm() vs its
similar alternative spellings, I think it's generally a good idea to keep
headers tidy of possible name space conflicts. Just that for the ones
touched here this seems pretty unimportant.

Jan


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Message-ID: <7856ff9f-3cd8-4591-930e-9c9d43cedcd7@gmail.com>
Date: Tue, 22 Apr 2025 16:31:14 +0200
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v2 1/8] xen/arm: drop declaration of
 handle_device_interrupts()
To: "Orzel, Michal" , xen-devel@lists.xenproject.org
Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
 Volodymyr Babchuk 
References: 
 
 
Content-Language: en-US
From: Oleksii Kurochko 
In-Reply-To: 

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On 4/17/25 9:38 AM, Orzel, Michal wrote:
>
> On 14/04/2025 17:56, Oleksii Kurochko wrote:
>> There is no any users of handle_device_interrupts() thereby it
>> could be dropped.
> It reads as if you were dropping a definition. There is no definition, therefore
> no users. Prototype was added by accident in:
> 8d2c3ab18cc1fce46945bd3aa1819a7aea0c564e

I will reword it to:
  There is no definition of handle_device_interrupts() thereby it could be dropped.

Should I add Fixes tag to mention that it was added by accident in
8d2c3ab18cc1fce46945bd3aa1819a7aea0c564e? Or it will be enough just to mention that
in the commit message?

>
>> Signed-off-by: Oleksii Kurochko
> With the commit msg updated to be more meaningful:
> Reviewed-by: Michal Orzel

Thanks.

~ Oleksii

--------------VFPEvqbyl7lOVLOcFbd0TO8o
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On 4/17/25 9:38 AM, Orzel, Michal
      wrote:

    

    

      

On 14/04/2025 17:56, Oleksii Kurochko wrote:


      

        
There is no any users of handle_device_interrupts() thereby it
could be dropped.


      

      
It reads as if you were dropping a definition. There is no definition, therefore
no users. Prototype was added by accident in:
8d2c3ab18cc1fce46945bd3aa1819a7aea0c564e

    

    
I will reword it to:
 There is no definition of handle_device_interrupts() thereby it could be dropped.

Should I add Fixes tag to mention that it was added by accident in 
8d2c3ab18cc1fce46945bd3aa1819a7aea0c564e? Or it will be enough just to mention that
in the commit message?



    

      



      

        
Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>


      

      
With the commit msg updated to be more meaningful:
Reviewed-by: Michal Orzel <michal.orzel@amd.com>

    

    
Thanks.

~ Oleksii

  


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On 22/04/2025 16:31, Oleksii Kurochko wrote:
> 
> On 4/17/25 9:38 AM, Orzel, Michal wrote:
>> On 14/04/2025 17:56, Oleksii Kurochko wrote:
>>> There is no any users of handle_device_interrupts() thereby it
>>> could be dropped.
>> It reads as if you were dropping a definition. There is no definition, therefore
>> no users. Prototype was added by accident in:
>> 8d2c3ab18cc1fce46945bd3aa1819a7aea0c564e
> 
> I will reword it to:
>  There is no definition of handle_device_interrupts() thereby it could be dropped.
> 
> Should I add Fixes tag to mention that it was added by accident in 
> 8d2c3ab18cc1fce46945bd3aa1819a7aea0c564e? Or it will be enough just to mention that
> in the commit message?
No need for Fixes tag.

~Michal

> 
>>> Signed-off-by: Oleksii Kurochko 
>> With the commit msg updated to be more meaningful:
>> Reviewed-by: Michal Orzel 
> 
> Thanks.
> 
> ~ Oleksii
> 



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Date: Tue, 22 Apr 2025 15:42:00 +0100
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Subject: Re: [PATCH] xen/link: Include .debug_str_offsets in
 DWARF2_DEBUG_SECTIONS
To: Jan Beulich 
Cc: Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Xen-devel 
References: <20250422113247.1285339-1-andrew.cooper3@citrix.com>
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On 22/04/2025 1:13 pm, Jan Beulich wrote:
> On 22.04.2025 13:32, Andrew Cooper wrote:
>> --- a/xen/include/xen/xen.lds.h
>> +++ b/xen/include/xen/xen.lds.h
>> @@ -56,6 +56,7 @@
>>    DECL_DEBUG2(.debug_info, .gnu.linkonce.wi.*, 1) \
>>    DECL_DEBUG(.debug_types, 1)                     \
>>    DECL_DEBUG(.debug_str, 1)                       \
>> +  DECL_DEBUG(.debug_str_offsets, 1)               \
> The alignment wants to be at least 4.

I checked before making this patch, and Clang uses alignment 1 on the
section:

> [8134] .debug_str_offsets PROGBITS        0000000000000000 16fe11d
> 21c868 00      0   0  1
> [8135] .rela.debug_str_offsets RELA       0000000000000000 2089e08
> ca6b60 18   I 8136 8134  8

Is there an official spec on the matter?

~Andrew


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On 22.04.2025 16:42, Andrew Cooper wrote:
> On 22/04/2025 1:13 pm, Jan Beulich wrote:
>> On 22.04.2025 13:32, Andrew Cooper wrote:
>>> --- a/xen/include/xen/xen.lds.h
>>> +++ b/xen/include/xen/xen.lds.h
>>> @@ -56,6 +56,7 @@
>>>    DECL_DEBUG2(.debug_info, .gnu.linkonce.wi.*, 1) \
>>>    DECL_DEBUG(.debug_types, 1)                     \
>>>    DECL_DEBUG(.debug_str, 1)                       \
>>> +  DECL_DEBUG(.debug_str_offsets, 1)               \
>> The alignment wants to be at least 4.
> 
> I checked before making this patch, and Clang uses alignment 1 on the
> section:
> 
>> [8134] .debug_str_offsets PROGBITS        0000000000000000 16fe11d
>> 21c868 00      0   0  1

Oh, I'm surprised. The table holding 4- (or 8-) byte values, it should
have better alignment already in object files, I would think. Feels like
a bug / oversight in Clang.

>> [8135] .rela.debug_str_offsets RELA       0000000000000000 2089e08
>> ca6b60 18   I 8136 8134  8
> 
> Is there an official spec on the matter?

I did look through the Dwarf5 spec, but could find any detail of this
kind there.

Jan


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On 10.04.2025 09:45, Jan Beulich wrote:
> With us now reading the full combined optional and NT headers, the
> subsequent reading of (and seeking to) NT header fields is wrong. Since
> PE32 and PE32+ NT headers are different anyway (beyond the image base
> oddity extending across both headers), switch to using a union. This
> allows to fetch the image base more directly then.
> 
> Additionally add checking to map_section(), which would have caught at
> least the wrong (zero) image size that we previously used.
> 
> Fixes: f7f42accbbbb ("x86/efi: Use generic PE/COFF structures")
> Reported-by: Roger Pau Monné 
> Signed-off-by: Jan Beulich 

May I ask for an ack (or otherwise) please?

Jan


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To: Jan Beulich ,
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On 4/10/25 03:45, Jan Beulich wrote:
> With us now reading the full combined optional and NT headers, the
> subsequent reading of (and seeking to) NT header fields is wrong. Since
> PE32 and PE32+ NT headers are different anyway (beyond the image base
> oddity extending across both headers), switch to using a union. This
> allows to fetch the image base more directly then.
> 
> Additionally add checking to map_section(), which would have caught at
> least the wrong (zero) image size that we previously used.
> 
> Fixes: f7f42accbbbb ("x86/efi: Use generic PE/COFF structures")
> Reported-by: Roger Pau Monné 
> Signed-off-by: Jan Beulich 
> ---

Acked-by: Daniel P. Smith 


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On Tue, Apr 22, 2025, Xin Li (Intel) wrote:
> base-commit: f30a0c0d2b08b355c01392538de8fc872387cb2b

This commit doesn't exist in Linus' tree or the tip tree, and the series doesn't
apply cleanly on any of the "obvious" choices.  Reviewing a 34 patches series
without being able to apply it is a wee bit difficult...


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Subject: [PATCH 02/21] include/xen/slr_table.h: Secure Launch Resource Table definitions
Date: Tue, 22 Apr 2025 18:06:36 +0300
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The file provides constants, structures and several helper functions for
parsing SLRT.

Signed-off-by: Sergii Dmytruk 
---
 xen/include/xen/slr_table.h | 274 ++++++++++++++++++++++++++++++++++++
 1 file changed, 274 insertions(+)
 create mode 100644 xen/include/xen/slr_table.h

diff --git a/xen/include/xen/slr_table.h b/xen/include/xen/slr_table.h
new file mode 100644
index 0000000000..e9dbac5d0a
--- /dev/null
+++ b/xen/include/xen/slr_table.h
@@ -0,0 +1,274 @@
+/* SPDX-License-Identifier: GPL-3.0-or-later */
+
+/*
+ *  Copyright (C) 2023  Oracle and/or its affiliates.
+ *
+ *  Secure Launch Resource Table definitions
+ */
+
+#ifndef _SLR_TABLE_H
+#define _SLR_TABLE_H
+
+#include 
+
+#define UEFI_SLR_TABLE_GUID \
+    { 0x877a9b2a, 0x0385, 0x45d1, { 0xa0, 0x34, 0x9d, 0xac, 0x9c, 0x9e, 0x56, 0x5f } }
+
+/* SLR table header values */
+#define SLR_TABLE_MAGIC         0x4452544d
+#define SLR_TABLE_REVISION      1
+
+/* Current revisions for the policy and UEFI config */
+#define SLR_POLICY_REVISION         1
+#define SLR_UEFI_CONFIG_REVISION    1
+
+/* SLR defined architectures */
+#define SLR_INTEL_TXT   1
+#define SLR_AMD_SKINIT  2
+
+/* SLR defined bootloaders */
+#define SLR_BOOTLOADER_INVALID  0
+#define SLR_BOOTLOADER_GRUB     1
+
+/* Log formats */
+#define SLR_DRTM_TPM12_LOG      1
+#define SLR_DRTM_TPM20_LOG      2
+
+/* DRTM Policy Entry Flags */
+#define SLR_POLICY_FLAG_MEASURED    0x1
+#define SLR_POLICY_IMPLICIT_SIZE    0x2
+
+/* Array Lengths */
+#define TPM_EVENT_INFO_LENGTH       32
+#define TXT_VARIABLE_MTRRS_LENGTH   32
+
+/* Tags */
+#define SLR_ENTRY_INVALID       0x0000
+#define SLR_ENTRY_DL_INFO       0x0001
+#define SLR_ENTRY_LOG_INFO      0x0002
+#define SLR_ENTRY_DRTM_POLICY   0x0003
+#define SLR_ENTRY_INTEL_INFO    0x0004
+#define SLR_ENTRY_AMD_INFO      0x0005
+#define SLR_ENTRY_ARM_INFO      0x0006
+#define SLR_ENTRY_UEFI_INFO     0x0007
+#define SLR_ENTRY_UEFI_CONFIG   0x0008
+#define SLR_ENTRY_END           0xffff
+
+/* Entity Types */
+#define SLR_ET_UNSPECIFIED        0x0000
+#define SLR_ET_SLRT               0x0001
+#define SLR_ET_BOOT_PARAMS        0x0002
+#define SLR_ET_SETUP_DATA         0x0003
+#define SLR_ET_CMDLINE            0x0004
+#define SLR_ET_UEFI_MEMMAP        0x0005
+#define SLR_ET_RAMDISK            0x0006
+#define SLR_ET_MULTIBOOT2_INFO    0x0007
+#define SLR_ET_MULTIBOOT2_MODULE  0x0008
+#define SLR_ET_TXT_OS2MLE         0x0010
+#define SLR_ET_UNUSED             0xffff
+
+/*
+ * Primary SLR Table Header
+ */
+struct slr_table
+{
+    uint32_t magic;
+    uint16_t revision;
+    uint16_t architecture;
+    uint32_t size;
+    uint32_t max_size;
+    /* entries[] */
+} __packed;
+
+/*
+ * Common SLRT Table Header
+ */
+struct slr_entry_hdr
+{
+    uint32_t tag;
+    uint32_t size;
+} __packed;
+
+/*
+ * Boot loader context
+ */
+struct slr_bl_context
+{
+    uint16_t bootloader;
+    uint16_t reserved[3];
+    uint64_t context;
+} __packed;
+
+/*
+ * Prototype of a function pointed to by slr_entry_dl_info::dl_handler.
+ */
+typedef void (*dl_handler_func)(struct slr_bl_context *bl_context);
+
+/*
+ * DRTM Dynamic Launch Configuration
+ */
+struct slr_entry_dl_info
+{
+    struct slr_entry_hdr hdr;
+    uint64_t dce_size;
+    uint64_t dce_base;
+    uint64_t dlme_size;
+    uint64_t dlme_base;
+    uint64_t dlme_entry;
+    struct slr_bl_context bl_context;
+    uint64_t dl_handler;
+} __packed;
+
+/*
+ * TPM Log Information
+ */
+struct slr_entry_log_info
+{
+    struct slr_entry_hdr hdr;
+    uint16_t format;
+    uint16_t reserved;
+    uint32_t size;
+    uint64_t addr;
+} __packed;
+
+/*
+ * DRTM Measurement Entry
+ */
+struct slr_policy_entry
+{
+    uint16_t pcr;
+    uint16_t entity_type;
+    uint16_t flags;
+    uint16_t reserved;
+    uint64_t size;
+    uint64_t entity;
+    char evt_info[TPM_EVENT_INFO_LENGTH];
+} __packed;
+
+/*
+ * DRTM Measurement Policy
+ */
+struct slr_entry_policy
+{
+    struct slr_entry_hdr hdr;
+    uint16_t reserved[2];
+    uint16_t revision;
+    uint16_t nr_entries;
+    struct slr_policy_entry policy_entries[];
+} __packed;
+
+/*
+ * Secure Launch defined MTRR saving structures
+ */
+struct slr_txt_mtrr_pair
+{
+    uint64_t mtrr_physbase;
+    uint64_t mtrr_physmask;
+} __packed;
+
+struct slr_txt_mtrr_state
+{
+    uint64_t default_mem_type;
+    uint64_t mtrr_vcnt;
+    struct slr_txt_mtrr_pair mtrr_pair[TXT_VARIABLE_MTRRS_LENGTH];
+} __packed;
+
+/*
+ * Intel TXT Info table
+ */
+struct slr_entry_intel_info
+{
+    struct slr_entry_hdr hdr;
+    uint64_t boot_params_base;
+    uint64_t txt_heap;
+    uint64_t saved_misc_enable_msr;
+    struct slr_txt_mtrr_state saved_bsp_mtrrs;
+} __packed;
+
+/*
+ * AMD SKINIT Info table
+ */
+struct slr_entry_amd_info
+{
+    struct slr_entry_hdr hdr;
+    uint64_t next;
+    uint32_t type;
+    uint32_t len;
+    uint64_t slrt_size;
+    uint64_t slrt_base;
+    uint64_t boot_params_base;
+    uint16_t psp_version;
+    uint16_t reserved[3];
+} __packed;
+
+/*
+ * ARM DRTM Info table
+ */
+struct slr_entry_arm_info
+{
+    struct slr_entry_hdr hdr;
+} __packed;
+
+/*
+ * UEFI config measurement entry
+ */
+struct slr_uefi_cfg_entry
+{
+    uint16_t pcr;
+    uint16_t reserved;
+    uint32_t size;
+    uint64_t cfg; /* address or value */
+    char evt_info[TPM_EVENT_INFO_LENGTH];
+} __packed;
+
+struct slr_entry_uefi_config
+{
+    struct slr_entry_hdr hdr;
+    uint16_t reserved[2];
+    uint16_t revision;
+    uint16_t nr_entries;
+    struct slr_uefi_cfg_entry uefi_cfg_entries[];
+} __packed;
+
+static inline void *
+slr_end_of_entries(struct slr_table *table)
+{
+    return (uint8_t *)table + table->size;
+}
+
+static inline struct slr_entry_hdr *
+slr_next_entry(struct slr_table *table, struct slr_entry_hdr *curr)
+{
+    struct slr_entry_hdr *next = (struct slr_entry_hdr *)
+                                 ((uint8_t *)curr + curr->size);
+
+    if ( (void *)next >= slr_end_of_entries(table) )
+        return NULL;
+    if ( next->tag == SLR_ENTRY_END )
+        return NULL;
+
+    return next;
+}
+
+static inline struct slr_entry_hdr *
+slr_next_entry_by_tag (struct slr_table *table,
+                       struct slr_entry_hdr *entry,
+                       uint16_t tag)
+{
+    if ( !entry ) /* Start from the beginning */
+        entry = (struct slr_entry_hdr *)((uint8_t *)table + sizeof(*table));
+
+    for ( ; ; )
+    {
+        if ( entry->tag == tag )
+            return entry;
+
+        entry = slr_next_entry(table, entry);
+        if ( !entry )
+            return NULL;
+    }
+
+    return NULL;
+}
+
+#endif /* _SLR_TABLE_H */
-- 
2.49.0



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To: xen-devel@lists.xenproject.org
Cc: Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Lukasz Hawrylko ,
	"Daniel P. Smith" ,
	=?UTF-8?q?Mateusz=20M=C3=B3wka?= ,
	Anthony PERARD ,
	Michal Orzel ,
	Julien Grall ,
	Stefano Stabellini ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	trenchboot-devel@googlegroups.com
Subject: [PATCH 00/21] x86: Trenchboot Secure Launch DRTM (Xen)
Date: Tue, 22 Apr 2025 18:06:34 +0300
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The aim of the [TrenchBoot] project is to provide an implementation of
DRTM that is generic enough to cover various use cases:
 - Intel TXT and AMD SKINIT on x86 CPUs
 - legacy and UEFI boot
 - TPM1.2 and TPM2.0
 - (in the future) DRTM on Arm CPUs

DRTM is a version of a measured launch that starts on request rather
than at the start of a boot cycle.  One of its advantages is in not
including the firmware in the chain of trust.

Xen already supports DRTM via [tboot] which targets Intel TXT only.
tboot employs encapsulates some of the DRTM details within itself while
with TrenchBoot Xen (or Linux) is meant to be a self-contained payload
for a TrenchBoot-enabled bootloader (think GRUB).  The one exception is
that UEFI case requires calling back into bootloader to initiate DRTM,
which is necessary to give Xen a chance of querying all the information
it needs from the firmware before performing DRTM start.

>From reading the above tboot might seem like a more abstracted, but the
reality is that the payload needs to have DRTM-specific knowledge either
way.  TrenchBoot in principle allows coming up with independent
implementations of bootloaders and payloads that are compatible with
each other.

The "x86/boot: choose AP stack based on APIC ID" patch is shared with
[Parallelize AP bring-up] series which is required here because Intel
TXT always releases all APs simultaneously.  The rest of the patches are
unique.

-----

[TrenchBoot]: https://trenchboot.org/
[tboot]: https://sourceforge.net/p/tboot/wiki/Home/
[Parallelize AP bring-up]: https://lore.kernel.org/xen-devel/cover.1699982111.git.krystian.hebel@3mdeb.com/

-----

Kacper Stojek (2):
  x86/boot: add MLE header and new entry point
  xen/arch/x86: reserve TXT memory

Krystian Hebel (7):
  x86/include/asm/intel_txt.h: constants and accessors for TXT registers
    and heap
  x86/boot/slaunch_early: early TXT checks and boot data retrieval
  x86/intel_txt.c: restore boot MTRRs
  lib/sha1.c: add file
  x86/tpm.c: code for early hashing and extending PCRs (for TPM1.2)
  x86/boot: choose AP stack based on APIC ID
  x86/smpboot.c: TXT AP bringup

Michał Żygowski (2):
  x86/hvm: Check for VMX in SMX when slaunch active
  x86/cpu: report SMX, TXT and SKINIT capabilities

Sergii Dmytruk (10):
  include/xen/slr_table.h: Secure Launch Resource Table definitions
  x86/boot/slaunch_early: implement early initialization
  x86/mtrr: expose functions for pausing caching
  lib/sha256.c: add file
  x86/tpm.c: support extending PCRs of TPM2.0
  x86/tpm.c: implement event log for TPM2.0
  arch/x86: process DRTM policy
  x86/boot: find MBI and SLRT on AMD
  arch/x86: support slaunch with AMD SKINIT
  x86/slaunch: support EFI boot

 .gitignore                                  |    1 +
 docs/hypervisor-guide/x86/how-xen-boots.rst |    7 +
 xen/arch/x86/Makefile                       |   12 +-
 xen/arch/x86/boot/Makefile                  |   10 +-
 xen/arch/x86/boot/head.S                    |  250 +++++
 xen/arch/x86/boot/slaunch_early.c           |  105 ++
 xen/arch/x86/boot/trampoline.S              |   40 +-
 xen/arch/x86/boot/x86_64.S                  |   42 +-
 xen/arch/x86/cpu/amd.c                      |   14 +
 xen/arch/x86/cpu/cpu.h                      |    1 +
 xen/arch/x86/cpu/hygon.c                    |    1 +
 xen/arch/x86/cpu/intel.c                    |   44 +
 xen/arch/x86/cpu/mtrr/generic.c             |   51 +-
 xen/arch/x86/e820.c                         |    5 +
 xen/arch/x86/efi/efi-boot.h                 |   90 +-
 xen/arch/x86/efi/fixmlehdr.c                |  122 +++
 xen/arch/x86/hvm/vmx/vmcs.c                 |    3 +-
 xen/arch/x86/include/asm/apicdef.h          |    4 +
 xen/arch/x86/include/asm/intel_txt.h        |  452 ++++++++
 xen/arch/x86/include/asm/mm.h               |    3 +
 xen/arch/x86/include/asm/msr-index.h        |    3 +
 xen/arch/x86/include/asm/mtrr.h             |    8 +
 xen/arch/x86/include/asm/processor.h        |    1 +
 xen/arch/x86/include/asm/slaunch.h          |   91 ++
 xen/arch/x86/include/asm/tpm.h              |   19 +
 xen/arch/x86/intel_txt.c                    |  177 ++++
 xen/arch/x86/setup.c                        |   32 +-
 xen/arch/x86/slaunch.c                      |  464 ++++++++
 xen/arch/x86/smpboot.c                      |   57 +
 xen/arch/x86/tboot.c                        |   20 +-
 xen/arch/x86/tpm.c                          | 1057 +++++++++++++++++++
 xen/common/efi/boot.c                       |    4 +
 xen/common/efi/runtime.c                    |    1 +
 xen/include/xen/efi.h                       |    1 +
 xen/include/xen/sha1.h                      |   12 +
 xen/include/xen/sha256.h                    |   12 +
 xen/include/xen/slr_table.h                 |  274 +++++
 xen/lib/Makefile                            |    2 +
 xen/lib/sha1.c                              |  240 +++++
 xen/lib/sha256.c                            |  238 +++++
 40 files changed, 3914 insertions(+), 56 deletions(-)
 create mode 100644 xen/arch/x86/boot/slaunch_early.c
 create mode 100644 xen/arch/x86/efi/fixmlehdr.c
 create mode 100644 xen/arch/x86/include/asm/intel_txt.h
 create mode 100644 xen/arch/x86/include/asm/slaunch.h
 create mode 100644 xen/arch/x86/include/asm/tpm.h
 create mode 100644 xen/arch/x86/intel_txt.c
 create mode 100644 xen/arch/x86/slaunch.c
 create mode 100644 xen/arch/x86/tpm.c
 create mode 100644 xen/include/xen/sha1.h
 create mode 100644 xen/include/xen/sha256.h
 create mode 100644 xen/include/xen/slr_table.h
 create mode 100644 xen/lib/sha1.c
 create mode 100644 xen/lib/sha256.c


base-commit: df68a4cb7ed9418f0c5af56a717714b5280737e4
prerequisite-patch-id: 1c3014908bc6e1a5cab8de609270efdb1c412335
prerequisite-patch-id: 850544a1f9639283f2269ea75b630400dd1976aa
prerequisite-patch-id: 69e042a46f8ac0e3f85853e77082caf250719a8d
prerequisite-patch-id: d6c6d27bbe8ff2f5d96852a6eed72a4c99b61356
-- 
2.49.0



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To: xen-devel@lists.xenproject.org
Cc: Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Lukasz Hawrylko ,
	"Daniel P. Smith" ,
	=?UTF-8?q?Mateusz=20M=C3=B3wka?= ,
	trenchboot-devel@googlegroups.com
Subject: [PATCH 01/21] x86/include/asm/intel_txt.h: constants and accessors for TXT registers and heap
Date: Tue, 22 Apr 2025 18:06:35 +0300
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From: Krystian Hebel 

The file contains TXT register spaces base address, registers offsets,
error codes and inline functions for accessing structures stored on
TXT heap.

Signed-off-by: Krystian Hebel 
Signed-off-by: Sergii Dmytruk 
---
 xen/arch/x86/include/asm/intel_txt.h | 272 +++++++++++++++++++++++++++
 xen/arch/x86/tboot.c                 |  20 +-
 2 files changed, 274 insertions(+), 18 deletions(-)
 create mode 100644 xen/arch/x86/include/asm/intel_txt.h

diff --git a/xen/arch/x86/include/asm/intel_txt.h b/xen/arch/x86/include/asm/intel_txt.h
new file mode 100644
index 0000000000..2cc6eb5be9
--- /dev/null
+++ b/xen/arch/x86/include/asm/intel_txt.h
@@ -0,0 +1,272 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+/*
+ * TXT configuration registers (offsets from TXT_{PUB, PRIV}_CONFIG_REGS_BASE)
+ */
+#define TXT_PUB_CONFIG_REGS_BASE        0xfed30000
+#define TXT_PRIV_CONFIG_REGS_BASE       0xfed20000
+
+/*
+ * The same set of registers is exposed twice (with different permissions) and
+ * they are allocated continuously with page alignment.
+ */
+#define NR_TXT_CONFIG_SIZE \
+    (TXT_PUB_CONFIG_REGS_BASE - TXT_PRIV_CONFIG_REGS_BASE)
+
+/* Offsets from pub/priv config space. */
+#define TXTCR_STS                       0x0000
+#define TXTCR_ESTS                      0x0008
+#define TXTCR_ERRORCODE                 0x0030
+#define TXTCR_CMD_RESET                 0x0038
+#define TXTCR_CMD_CLOSE_PRIVATE         0x0048
+#define TXTCR_DIDVID                    0x0110
+#define TXTCR_VER_EMIF                  0x0200
+#define TXTCR_CMD_UNLOCK_MEM_CONFIG     0x0218
+#define TXTCR_SINIT_BASE                0x0270
+#define TXTCR_SINIT_SIZE                0x0278
+#define TXTCR_MLE_JOIN                  0x0290
+#define TXTCR_HEAP_BASE                 0x0300
+#define TXTCR_HEAP_SIZE                 0x0308
+#define TXTCR_SCRATCHPAD                0x0378
+#define TXTCR_CMD_OPEN_LOCALITY1        0x0380
+#define TXTCR_CMD_CLOSE_LOCALITY1       0x0388
+#define TXTCR_CMD_OPEN_LOCALITY2        0x0390
+#define TXTCR_CMD_CLOSE_LOCALITY2       0x0398
+#define TXTCR_CMD_SECRETS               0x08e0
+#define TXTCR_CMD_NO_SECRETS            0x08e8
+#define TXTCR_E2STS                     0x08f0
+
+/*
+ * Secure Launch Defined Error Codes used in MLE-initiated TXT resets.
+ *
+ * TXT Specification
+ * Appendix I ACM Error Codes
+ */
+#define SLAUNCH_ERROR_GENERIC                0xc0008001
+#define SLAUNCH_ERROR_TPM_INIT               0xc0008002
+#define SLAUNCH_ERROR_TPM_INVALID_LOG20      0xc0008003
+#define SLAUNCH_ERROR_TPM_LOGGING_FAILED     0xc0008004
+#define SLAUNCH_ERROR_REGION_STRADDLE_4GB    0xc0008005
+#define SLAUNCH_ERROR_TPM_EXTEND             0xc0008006
+#define SLAUNCH_ERROR_MTRR_INV_VCNT          0xc0008007
+#define SLAUNCH_ERROR_MTRR_INV_DEF_TYPE      0xc0008008
+#define SLAUNCH_ERROR_MTRR_INV_BASE          0xc0008009
+#define SLAUNCH_ERROR_MTRR_INV_MASK          0xc000800a
+#define SLAUNCH_ERROR_MSR_INV_MISC_EN        0xc000800b
+#define SLAUNCH_ERROR_INV_AP_INTERRUPT       0xc000800c
+#define SLAUNCH_ERROR_INTEGER_OVERFLOW       0xc000800d
+#define SLAUNCH_ERROR_HEAP_WALK              0xc000800e
+#define SLAUNCH_ERROR_HEAP_MAP               0xc000800f
+#define SLAUNCH_ERROR_REGION_ABOVE_4GB       0xc0008010
+#define SLAUNCH_ERROR_HEAP_INVALID_DMAR      0xc0008011
+#define SLAUNCH_ERROR_HEAP_DMAR_SIZE         0xc0008012
+#define SLAUNCH_ERROR_HEAP_DMAR_MAP          0xc0008013
+#define SLAUNCH_ERROR_HI_PMR_BASE            0xc0008014
+#define SLAUNCH_ERROR_HI_PMR_SIZE            0xc0008015
+#define SLAUNCH_ERROR_LO_PMR_BASE            0xc0008016
+#define SLAUNCH_ERROR_LO_PMR_SIZE            0xc0008017
+#define SLAUNCH_ERROR_LO_PMR_MLE             0xc0008018
+#define SLAUNCH_ERROR_INITRD_TOO_BIG         0xc0008019
+#define SLAUNCH_ERROR_HEAP_ZERO_OFFSET       0xc000801a
+#define SLAUNCH_ERROR_WAKE_BLOCK_TOO_SMALL   0xc000801b
+#define SLAUNCH_ERROR_MLE_BUFFER_OVERLAP     0xc000801c
+#define SLAUNCH_ERROR_BUFFER_BEYOND_PMR      0xc000801d
+#define SLAUNCH_ERROR_OS_SINIT_BAD_VERSION   0xc000801e
+#define SLAUNCH_ERROR_EVENTLOG_MAP           0xc000801f
+#define SLAUNCH_ERROR_TPM_NUMBER_ALGS        0xc0008020
+#define SLAUNCH_ERROR_TPM_UNKNOWN_DIGEST     0xc0008021
+#define SLAUNCH_ERROR_TPM_INVALID_EVENT      0xc0008022
+
+#define SLAUNCH_BOOTLOADER_MAGIC             0x4c534254
+
+#ifndef __ASSEMBLY__
+
+/* Need to differentiate between pre- and post paging enabled. */
+#ifdef __EARLY_SLAUNCH__
+#include 
+#define _txt(x) _p(x)
+#else
+#include 
+#include    // __va()
+#define _txt(x) __va(x)
+#endif
+
+/*
+ * Always use private space as some of registers are either read-only or not
+ * present in public space.
+ */
+static inline uint64_t read_txt_reg(int reg_no)
+{
+    volatile uint64_t *reg = _txt(TXT_PRIV_CONFIG_REGS_BASE + reg_no);
+    return *reg;
+}
+
+static inline void write_txt_reg(int reg_no, uint64_t val)
+{
+    volatile uint64_t *reg = _txt(TXT_PRIV_CONFIG_REGS_BASE + reg_no);
+    *reg = val;
+    /* This serves as TXT register barrier */
+    (void)read_txt_reg(TXTCR_ESTS);
+}
+
+static inline void txt_reset(uint32_t error)
+{
+    write_txt_reg(TXTCR_ERRORCODE, error);
+    write_txt_reg(TXTCR_CMD_NO_SECRETS, 1);
+    write_txt_reg(TXTCR_CMD_UNLOCK_MEM_CONFIG, 1);
+    write_txt_reg(TXTCR_CMD_RESET, 1);
+    while (1);
+}
+
+/*
+ * Secure Launch defined OS/MLE TXT Heap table
+ */
+struct txt_os_mle_data {
+    uint32_t version;
+    uint32_t reserved;
+    uint64_t slrt;
+    uint64_t txt_info;
+    uint32_t ap_wake_block;
+    uint32_t ap_wake_block_size;
+    uint8_t mle_scratch[64];
+} __packed;
+
+/*
+ * TXT specification defined BIOS data TXT Heap table
+ */
+struct txt_bios_data {
+    uint32_t version; /* Currently 5 for TPM 1.2 and 6 for TPM 2.0 */
+    uint32_t bios_sinit_size;
+    uint64_t reserved1;
+    uint64_t reserved2;
+    uint32_t num_logical_procs;
+    /* Versions >= 3 && < 5 */
+    uint32_t sinit_flags;
+    /* Versions >= 5 with updates in version 6 */
+    uint32_t mle_flags;
+    /* Versions >= 4 */
+    /* Ext Data Elements */
+} __packed;
+
+/*
+ * TXT specification defined OS/SINIT TXT Heap table
+ */
+struct txt_os_sinit_data {
+    uint32_t version;       /* Currently 6 for TPM 1.2 and 7 for TPM 2.0 */
+    uint32_t flags;         /* Reserved in version 6 */
+    uint64_t mle_ptab;
+    uint64_t mle_size;
+    uint64_t mle_hdr_base;
+    uint64_t vtd_pmr_lo_base;
+    uint64_t vtd_pmr_lo_size;
+    uint64_t vtd_pmr_hi_base;
+    uint64_t vtd_pmr_hi_size;
+    uint64_t lcp_po_base;
+    uint64_t lcp_po_size;
+    uint32_t capabilities;
+    /* Version = 5 */
+    uint64_t efi_rsdt_ptr;  /* RSD*P* in versions >= 6 */
+    /* Versions >= 6 */
+    /* Ext Data Elements */
+} __packed;
+
+/*
+ * TXT specification defined SINIT/MLE TXT Heap table
+ */
+struct txt_sinit_mle_data {
+    uint32_t version;  /* Current values are 6 through 9 */
+    /* Versions <= 8, fields until lcp_policy_control must be 0 for >= 9 */
+    uint8_t bios_acm_id[20];
+    uint32_t edx_senter_flags;
+    uint64_t mseg_valid;
+    uint8_t sinit_hash[20];
+    uint8_t mle_hash[20];
+    uint8_t stm_hash[20];
+    uint8_t lcp_policy_hash[20];
+    uint32_t lcp_policy_control;
+    /* Versions >= 7 */
+    uint32_t rlp_wakeup_addr;
+    uint32_t reserved;
+    uint32_t num_of_sinit_mdrs;
+    uint32_t sinit_mdrs_table_offset;
+    uint32_t sinit_vtd_dmar_table_size;
+    uint32_t sinit_vtd_dmar_table_offset;
+    /* Versions >= 8 */
+    uint32_t processor_scrtm_status;
+    /* Versions >= 9 */
+    /* Ext Data Elements */
+} __packed;
+
+/*
+ * Functions to extract data from the Intel TXT Heap Memory. The layout
+ * of the heap is as follows:
+ *  +------------------------------------+
+ *  | Size of Bios Data table (uint64_t) |
+ *  +------------------------------------+
+ *  | Bios Data table                    |
+ *  +------------------------------------+
+ *  | Size of OS MLE table (uint64_t)    |
+ *  +------------------------------------+
+ *  | OS MLE table                       |
+ *  +--------------------------------    +
+ *  | Size of OS SINIT table (uint64_t)  |
+ *  +------------------------------------+
+ *  | OS SINIT table                     |
+ *  +------------------------------------+
+ *  | Size of SINIT MLE table (uint64_t) |
+ *  +------------------------------------+
+ *  | SINIT MLE table                    |
+ *  +------------------------------------+
+ *
+ *  NOTE: the table size fields include the 8 byte size field itself.
+ */
+static inline uint64_t txt_bios_data_size(void *heap)
+{
+    return *((uint64_t *)heap) - sizeof(uint64_t);
+}
+
+static inline void *txt_bios_data_start(void *heap)
+{
+    return heap + sizeof(uint64_t);
+}
+
+static inline uint64_t txt_os_mle_data_size(void *heap)
+{
+    return *((uint64_t *)(txt_bios_data_start(heap) +
+                          txt_bios_data_size(heap))) -
+        sizeof(uint64_t);
+}
+
+static inline void *txt_os_mle_data_start(void *heap)
+{
+    return txt_bios_data_start(heap) + txt_bios_data_size(heap) +
+        sizeof(uint64_t);
+}
+
+static inline uint64_t txt_os_sinit_data_size(void *heap)
+{
+    return *((uint64_t *)(txt_os_mle_data_start(heap) +
+                          txt_os_mle_data_size(heap))) -
+        sizeof(uint64_t);
+}
+
+static inline void *txt_os_sinit_data_start(void *heap)
+{
+    return txt_os_mle_data_start(heap) + txt_os_mle_data_size(heap) +
+        sizeof(uint64_t);
+}
+
+static inline uint64_t txt_sinit_mle_data_size(void *heap)
+{
+    return *((uint64_t *)(txt_os_sinit_data_start(heap) +
+                          txt_os_sinit_data_size(heap))) -
+        sizeof(uint64_t);
+}
+
+static inline void *txt_sinit_mle_data_start(void *heap)
+{
+    return txt_os_sinit_data_start(heap) + txt_os_sinit_data_size(heap) +
+        sizeof(uint64_t);
+}
+
+#endif /* __ASSEMBLY__ */
diff --git a/xen/arch/x86/tboot.c b/xen/arch/x86/tboot.c
index d5db60d335..f68354c374 100644
--- a/xen/arch/x86/tboot.c
+++ b/xen/arch/x86/tboot.c
@@ -15,6 +15,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 
@@ -35,23 +36,6 @@ static uint64_t __initdata sinit_base, __initdata sinit_size;
 
 static bool __ro_after_init is_vtd;
 
-/*
- * TXT configuration registers (offsets from TXT_{PUB, PRIV}_CONFIG_REGS_BASE)
- */
-
-#define TXT_PUB_CONFIG_REGS_BASE       0xfed30000
-#define TXT_PRIV_CONFIG_REGS_BASE      0xfed20000
-
-/* # pages for each config regs space - used by fixmap */
-#define NR_TXT_CONFIG_PAGES     ((TXT_PUB_CONFIG_REGS_BASE -                \
-                                  TXT_PRIV_CONFIG_REGS_BASE) >> PAGE_SHIFT)
-
-/* offsets from pub/priv config space */
-#define TXTCR_SINIT_BASE            0x0270
-#define TXTCR_SINIT_SIZE            0x0278
-#define TXTCR_HEAP_BASE             0x0300
-#define TXTCR_HEAP_SIZE             0x0308
-
 #define SHA1_SIZE      20
 typedef uint8_t   sha1_hash_t[SHA1_SIZE];
 
@@ -409,7 +393,7 @@ int __init tboot_protect_mem_regions(void)
 
     /* TXT Private Space */
     rc = e820_change_range_type(&e820, TXT_PRIV_CONFIG_REGS_BASE,
-                 TXT_PRIV_CONFIG_REGS_BASE + NR_TXT_CONFIG_PAGES * PAGE_SIZE,
+                 TXT_PRIV_CONFIG_REGS_BASE + NR_TXT_CONFIG_SIZE,
                  E820_RESERVED, E820_UNUSABLE);
     if ( !rc )
         return 0;
-- 
2.49.0



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From: Sergii Dmytruk 
To: xen-devel@lists.xenproject.org
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	trenchboot-devel@googlegroups.com
Subject: [PATCH 03/21] x86/boot: add MLE header and new entry point
Date: Tue, 22 Apr 2025 18:06:37 +0300
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From: Kacper Stojek 

Signed-off-by: Kacper Stojek 
Signed-off-by: Krystian Hebel 
Signed-off-by: Sergii Dmytruk 
---
 docs/hypervisor-guide/x86/how-xen-boots.rst |  5 ++
 xen/arch/x86/boot/head.S                    | 53 +++++++++++++++++++++
 2 files changed, 58 insertions(+)

diff --git a/docs/hypervisor-guide/x86/how-xen-boots.rst b/docs/hypervisor-guide/x86/how-xen-boots.rst
index 8b3229005c..050fe9c61f 100644
--- a/docs/hypervisor-guide/x86/how-xen-boots.rst
+++ b/docs/hypervisor-guide/x86/how-xen-boots.rst
@@ -55,6 +55,11 @@ If ``CONFIG_PVH_GUEST`` was selected at build time, an Elf note is included
 which indicates the ability to use the PVH boot protocol, and registers
 ``__pvh_start`` as the entrypoint, entered in 32bit mode.
 
+A combination of Multiboot 2 and MLE headers is used to implement DRTM for
+legacy (BIOS) boot. The separate entry point is used mainly to differentiate
+from other kinds of boots. It moves a magic number to EAX before jumping into
+common startup code.
+
 
 xen.gz
 ~~~~~~
diff --git a/xen/arch/x86/boot/head.S b/xen/arch/x86/boot/head.S
index 77bb7a9e21..cd951ad2dc 100644
--- a/xen/arch/x86/boot/head.S
+++ b/xen/arch/x86/boot/head.S
@@ -4,6 +4,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -126,6 +127,25 @@ multiboot2_header:
         .size multiboot2_header, . - multiboot2_header
         .type multiboot2_header, @object
 
+        .balign 16
+mle_header:
+        .long   0x9082ac5a  /* UUID0 */
+        .long   0x74a7476f  /* UUID1 */
+        .long   0xa2555c0f  /* UUID2 */
+        .long   0x42b651cb  /* UUID3 */
+        .long   0x00000034  /* MLE header size */
+        .long   0x00020002  /* MLE version 2.2 */
+        .long   (slaunch_stub_entry - start)  /* Linear entry point of MLE (SINIT virt. address) */
+        .long   0x00000000  /* First valid page of MLE */
+        .long   0x00000000  /* Offset within binary of first byte of MLE */
+        .long   (_end - start)  /* Offset within binary of last byte + 1 of MLE */
+        .long   0x00000723  /* Bit vector of MLE-supported capabilities */
+        .long   0x00000000  /* Starting linear address of command line (unused) */
+        .long   0x00000000  /* Ending linear address of command line (unused) */
+
+        .size mle_header, .-mle_header
+        .type mle_header, @object
+
         .section .init.rodata, "a", @progbits
 
 .Lbad_cpu_msg: .asciz "ERR: Not a 64-bit CPU!"
@@ -332,6 +352,38 @@ cs32_switch:
         /* Jump to earlier loaded address. */
         jmp     *%edi
 
+        /*
+         * Entry point for TrenchBoot Secure Launch on Intel TXT platforms.
+         *
+         * CPU is in 32b protected mode with paging disabled. On entry:
+         * - %ebx = %eip = MLE entry point,
+         * - stack pointer is undefined,
+         * - CS is flat 4GB code segment,
+         * - DS, ES, SS, FS and GS are undefined according to TXT SDG, but this
+         *   would make it impossible to initialize GDTR, because GDT base must
+         *   be relocated in the descriptor, which requires write access that
+         *   CS doesn't provide. Instead we have to assume that DS is set by
+         *   SINIT ACM as flat 4GB data segment.
+         *
+         * Additional restrictions:
+         * - some MSRs are partially cleared, among them IA32_MISC_ENABLE, so
+         *   some capabilities might be reported as disabled even if they are
+         *   supported by CPU
+         * - interrupts (including NMIs and SMIs) are disabled and must be
+         *   enabled later
+         * - trying to enter real mode results in reset
+         * - APs must be brought up by MONITOR or GETSEC[WAKEUP], depending on
+         *   which is supported by a given SINIT ACM
+         */
+slaunch_stub_entry:
+        /* Calculate the load base address. */
+        mov     %ebx, %esi
+        sub     $sym_offs(slaunch_stub_entry), %esi
+
+        /* Mark Secure Launch boot protocol and jump to common entry. */
+        mov     $SLAUNCH_BOOTLOADER_MAGIC, %eax
+        jmp     .Lset_stack
+
 #ifdef CONFIG_PVH_GUEST
 ELFNOTE(Xen, XEN_ELFNOTE_PHYS32_ENTRY, .long sym_offs(__pvh_start))
 
@@ -371,6 +423,7 @@ __start:
         /* Restore the clobbered field. */
         mov     %edx, (%ebx)
 
+.Lset_stack:
         /* Set up stack. */
         lea     STACK_SIZE - CPUINFO_sizeof + sym_esi(cpu0_stack), %esp
 
-- 
2.49.0



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From: Sergii Dmytruk 
To: xen-devel@lists.xenproject.org
Cc: Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	trenchboot-devel@googlegroups.com
Subject: [PATCH 04/21] x86/boot/slaunch_early: implement early initialization
Date: Tue, 22 Apr 2025 18:06:38 +0300
Message-ID: <0e67e075eeba3c78c0db55f65caa233f94c38d78.1745172094.git.sergii.dmytruk@3mdeb.com>
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Make head.S invoke a C function to retrieve MBI and SLRT addresses in a
platform-specific way.  This is also the place to perform sanity checks
of DRTM.

Signed-off-by: Krystian Hebel 
Signed-off-by: Sergii Dmytruk 
---
 xen/arch/x86/Makefile                |  1 +
 xen/arch/x86/boot/Makefile           |  5 +++-
 xen/arch/x86/boot/head.S             | 43 ++++++++++++++++++++++++++++
 xen/arch/x86/boot/slaunch_early.c    | 41 ++++++++++++++++++++++++++
 xen/arch/x86/include/asm/intel_txt.h | 16 +++++++++++
 xen/arch/x86/include/asm/slaunch.h   | 19 ++++++++++++
 xen/arch/x86/slaunch.c               | 26 +++++++++++++++++
 7 files changed, 150 insertions(+), 1 deletion(-)
 create mode 100644 xen/arch/x86/boot/slaunch_early.c
 create mode 100644 xen/arch/x86/include/asm/slaunch.h
 create mode 100644 xen/arch/x86/slaunch.c

diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
index f59c9665fd..571cad160d 100644
--- a/xen/arch/x86/Makefile
+++ b/xen/arch/x86/Makefile
@@ -59,6 +59,7 @@ obj-$(CONFIG_COMPAT) += x86_64/physdev.o
 obj-$(CONFIG_X86_PSR) += psr.o
 obj-y += setup.o
 obj-y += shutdown.o
+obj-y += slaunch.o
 obj-y += smp.o
 obj-y += smpboot.o
 obj-y += spec_ctrl.o
diff --git a/xen/arch/x86/boot/Makefile b/xen/arch/x86/boot/Makefile
index be91a5757a..d0015f7d19 100644
--- a/xen/arch/x86/boot/Makefile
+++ b/xen/arch/x86/boot/Makefile
@@ -5,6 +5,7 @@ obj-bin-y += $(obj64)
 obj32 := cmdline.32.o
 obj32 += reloc.32.o
 obj32 += reloc-trampoline.32.o
+obj32 += slaunch_early.32.o
 
 obj64 := reloc-trampoline.o
 
@@ -28,6 +29,8 @@ $(obj32): XEN_CFLAGS := $(CFLAGS_x86_32) -fpic
 $(obj)/%.32.o: $(src)/%.c FORCE
 	$(call if_changed_rule,cc_o_c)
 
+$(obj)/slaunch_early.32.o: XEN_CFLAGS += -D__EARLY_SLAUNCH__
+
 orphan-handling-$(call ld-option,--orphan-handling=error) := --orphan-handling=error
 LDFLAGS_DIRECT-$(call ld-option,--warn-rwx-segments) := --no-warn-rwx-segments
 LDFLAGS_DIRECT += $(LDFLAGS_DIRECT-y)
@@ -81,7 +84,7 @@ cmd_combine = \
               --bin1      $(obj)/built-in-32.base.bin \
               --bin2      $(obj)/built-in-32.offset.bin \
               --map       $(obj)/built-in-32.base.map \
-              --exports   cmdline_parse_early,reloc,reloc_trampoline32 \
+              --exports   cmdline_parse_early,reloc,reloc_trampoline32,slaunch_early_init \
               --output    $@
 
 targets += built-in-32.S
diff --git a/xen/arch/x86/boot/head.S b/xen/arch/x86/boot/head.S
index cd951ad2dc..e522a36305 100644
--- a/xen/arch/x86/boot/head.S
+++ b/xen/arch/x86/boot/head.S
@@ -472,6 +472,10 @@ __start:
         /* Bootloaders may set multiboot{1,2}.mem_lower to a nonzero value. */
         xor     %edx,%edx
 
+        /* Check for TrenchBoot slaunch bootloader. */
+        cmp     $SLAUNCH_BOOTLOADER_MAGIC, %eax
+        je      .Lslaunch_proto
+
         /* Check for Multiboot2 bootloader. */
         cmp     $MULTIBOOT2_BOOTLOADER_MAGIC,%eax
         je      .Lmultiboot2_proto
@@ -487,6 +491,45 @@ __start:
         cmovnz  MB_mem_lower(%ebx),%edx
         jmp     trampoline_bios_setup
 
+.Lslaunch_proto:
+        /*
+         * Upon reaching here, CPU state mostly matches the one setup by the
+         * bootloader with ESP, ESI and EDX being clobbered above.
+         */
+
+        /* Save information that TrenchBoot slaunch was used. */
+        movb    $1, sym_esi(slaunch_active)
+
+        /*
+         * Prepare space for output parameter of slaunch_early_init(), which is
+         * a structure of two uint32_t fields.
+         */
+        sub     $8, %esp
+
+        push    %esp                             /* pointer to output structure */
+        lea     sym_offs(__2M_rwdata_end), %ecx  /* end of target image */
+        lea     sym_offs(_start), %edx           /* target base address */
+        mov     %esi, %eax                       /* load base address */
+        /*
+         * slaunch_early_init(load/eax, tgt/edx, tgt_end/ecx, ret/stk) using
+         * fastcall calling convention.
+         */
+        call    slaunch_early_init
+        add     $4, %esp                         /* pop the fourth parameter */
+
+        /* Move outputs of slaunch_early_init() from stack into registers. */
+        pop     %eax  /* physical MBI address */
+        pop     %edx  /* physical SLRT address */
+
+        /* Save physical address of SLRT for C code. */
+        mov     %edx, sym_esi(slaunch_slrt)
+
+        /* Store MBI address in EBX where MB2 code expects it. */
+        mov     %eax, %ebx
+
+        /* Move magic number expected by Multiboot 2 to EAX and fall through. */
+        movl    $MULTIBOOT2_BOOTLOADER_MAGIC, %eax
+
 .Lmultiboot2_proto:
         /* Skip Multiboot2 information fixed part. */
         lea     (MB2_fixed_sizeof+MULTIBOOT2_TAG_ALIGN-1)(%ebx),%ecx
diff --git a/xen/arch/x86/boot/slaunch_early.c b/xen/arch/x86/boot/slaunch_early.c
new file mode 100644
index 0000000000..177267248f
--- /dev/null
+++ b/xen/arch/x86/boot/slaunch_early.c
@@ -0,0 +1,41 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * Copyright (c) 2022-2025 3mdeb Sp. z o.o. All rights reserved.
+ */
+
+#include 
+#include 
+#include 
+
+struct early_init_results
+{
+    uint32_t mbi_pa;
+    uint32_t slrt_pa;
+} __packed;
+
+void slaunch_early_init(uint32_t load_base_addr,
+                        uint32_t tgt_base_addr,
+                        uint32_t tgt_end_addr,
+                        struct early_init_results *result)
+{
+    void *txt_heap;
+    struct txt_os_mle_data *os_mle;
+    struct slr_table *slrt;
+    struct slr_entry_intel_info *intel_info;
+
+    txt_heap = txt_init();
+    os_mle = txt_os_mle_data_start(txt_heap);
+
+    result->slrt_pa = os_mle->slrt;
+    result->mbi_pa = 0;
+
+    slrt = (struct slr_table *)(uintptr_t)os_mle->slrt;
+
+    intel_info = (struct slr_entry_intel_info *)
+        slr_next_entry_by_tag(slrt, NULL, SLR_ENTRY_INTEL_INFO);
+    if ( intel_info == NULL || intel_info->hdr.size != sizeof(*intel_info) )
+        return;
+
+    result->mbi_pa = intel_info->boot_params_base;
+}
diff --git a/xen/arch/x86/include/asm/intel_txt.h b/xen/arch/x86/include/asm/intel_txt.h
index 2cc6eb5be9..b973640c56 100644
--- a/xen/arch/x86/include/asm/intel_txt.h
+++ b/xen/arch/x86/include/asm/intel_txt.h
@@ -269,4 +269,20 @@ static inline void *txt_sinit_mle_data_start(void *heap)
         sizeof(uint64_t);
 }
 
+static inline void *txt_init(void)
+{
+    void *txt_heap;
+
+    /* Clear the TXT error register for a clean start of the day. */
+    write_txt_reg(TXTCR_ERRORCODE, 0);
+
+    txt_heap = _p(read_txt_reg(TXTCR_HEAP_BASE));
+
+    if ( txt_os_mle_data_size(txt_heap) < sizeof(struct txt_os_mle_data) ||
+         txt_os_sinit_data_size(txt_heap) < sizeof(struct txt_os_sinit_data) )
+        txt_reset(SLAUNCH_ERROR_GENERIC);
+
+    return txt_heap;
+}
+
 #endif /* __ASSEMBLY__ */
diff --git a/xen/arch/x86/include/asm/slaunch.h b/xen/arch/x86/include/asm/slaunch.h
new file mode 100644
index 0000000000..08cc2657f0
--- /dev/null
+++ b/xen/arch/x86/include/asm/slaunch.h
@@ -0,0 +1,19 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * Copyright (c) 2022-2025 3mdeb Sp. z o.o. All rights reserved.
+ */
+
+#ifndef _ASM_X86_SLAUNCH_H_
+#define _ASM_X86_SLAUNCH_H_
+
+#include 
+
+extern bool slaunch_active;
+
+/*
+ * Retrieves pointer to SLRT.  Checks table's validity and maps it as necessary.
+ */
+struct slr_table *slaunch_get_slrt(void);
+
+#endif /* _ASM_X86_SLAUNCH_H_ */
diff --git a/xen/arch/x86/slaunch.c b/xen/arch/x86/slaunch.c
new file mode 100644
index 0000000000..0404084b02
--- /dev/null
+++ b/xen/arch/x86/slaunch.c
@@ -0,0 +1,26 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * Copyright (c) 2022-2025 3mdeb Sp. z o.o. All rights reserved.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/*
+ * These variables are assigned to by the code near Xen's entry point.
+ * slaunch_slrt is not declared in slaunch.h to facilitate accessing the
+ * variable through slaunch_get_slrt().
+ */
+bool __initdata slaunch_active;
+uint32_t __initdata slaunch_slrt; /* physical address */
+
+/* Using slaunch_active in head.S assumes it's a single byte in size, so enforce
+ * this assumption. */
+static void __maybe_unused compile_time_checks(void)
+{
+    BUILD_BUG_ON(sizeof(slaunch_active) != 1);
+}
-- 
2.49.0



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Cc: Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	trenchboot-devel@googlegroups.com
Subject: [PATCH 05/21] x86/boot/slaunch_early: early TXT checks and boot data retrieval
Date: Tue, 22 Apr 2025 18:06:39 +0300
Message-ID: <86c2de54e0ebcd1632b921c56858cc77eba51ee1.1745172094.git.sergii.dmytruk@3mdeb.com>
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From: Krystian Hebel 

The tests validate that important parts of memory are protected against
DMA attacks, including Xen and MBI. Modules can be tested later, when it
is possible to report issues to a user before invoking TXT reset.

TPM event log validation is temporarily disabled due to an issue with
its allocation by bootloader (GRUB) which will need to be modified to
address this. Ultimately event log will also have to be validated early
as it is used immediately after these tests to hold MBI measurements.
See larger comment in txt_verify_pmr_ranges().

Signed-off-by: Krystian Hebel 
Signed-off-by: Sergii Dmytruk 
---
 xen/arch/x86/boot/slaunch_early.c    |   6 ++
 xen/arch/x86/include/asm/intel_txt.h | 111 +++++++++++++++++++++++++++
 2 files changed, 117 insertions(+)

diff --git a/xen/arch/x86/boot/slaunch_early.c b/xen/arch/x86/boot/slaunch_early.c
index 177267248f..af8aa29ae0 100644
--- a/xen/arch/x86/boot/slaunch_early.c
+++ b/xen/arch/x86/boot/slaunch_early.c
@@ -22,10 +22,13 @@ void slaunch_early_init(uint32_t load_base_addr,
     void *txt_heap;
     struct txt_os_mle_data *os_mle;
     struct slr_table *slrt;
+    struct txt_os_sinit_data *os_sinit;
     struct slr_entry_intel_info *intel_info;
+    uint32_t size = tgt_end_addr - tgt_base_addr;
 
     txt_heap = txt_init();
     os_mle = txt_os_mle_data_start(txt_heap);
+    os_sinit = txt_os_sinit_data_start(txt_heap);
 
     result->slrt_pa = os_mle->slrt;
     result->mbi_pa = 0;
@@ -38,4 +41,7 @@ void slaunch_early_init(uint32_t load_base_addr,
         return;
 
     result->mbi_pa = intel_info->boot_params_base;
+
+    txt_verify_pmr_ranges(os_mle, os_sinit, intel_info,
+                          load_base_addr, tgt_base_addr, size);
 }
diff --git a/xen/arch/x86/include/asm/intel_txt.h b/xen/arch/x86/include/asm/intel_txt.h
index b973640c56..7170baf6fb 100644
--- a/xen/arch/x86/include/asm/intel_txt.h
+++ b/xen/arch/x86/include/asm/intel_txt.h
@@ -81,6 +81,8 @@
 
 #ifndef __ASSEMBLY__
 
+#include 
+
 /* Need to differentiate between pre- and post paging enabled. */
 #ifdef __EARLY_SLAUNCH__
 #include 
@@ -285,4 +287,113 @@ static inline void *txt_init(void)
     return txt_heap;
 }
 
+static inline int is_in_pmr(struct txt_os_sinit_data *os_sinit, uint64_t base,
+                            uint32_t size, int check_high)
+{
+    /* Check for size overflow. */
+    if ( base + size < base )
+        txt_reset(SLAUNCH_ERROR_INTEGER_OVERFLOW);
+
+    /* Low range always starts at 0, so its size is also end address. */
+    if ( base >= os_sinit->vtd_pmr_lo_base &&
+         base + size <= os_sinit->vtd_pmr_lo_size )
+        return 1;
+
+    if ( check_high && os_sinit->vtd_pmr_hi_size != 0 )
+    {
+        if ( os_sinit->vtd_pmr_hi_base + os_sinit->vtd_pmr_hi_size <
+             os_sinit->vtd_pmr_hi_size )
+            txt_reset(SLAUNCH_ERROR_INTEGER_OVERFLOW);
+        if ( base >= os_sinit->vtd_pmr_hi_base &&
+             base + size <= os_sinit->vtd_pmr_hi_base +
+                            os_sinit->vtd_pmr_hi_size )
+            return 1;
+    }
+
+    return 0;
+}
+
+static inline void txt_verify_pmr_ranges(struct txt_os_mle_data *os_mle,
+                                         struct txt_os_sinit_data *os_sinit,
+                                         struct slr_entry_intel_info *info,
+                                         uint32_t load_base_addr,
+                                         uint32_t tgt_base_addr,
+                                         uint32_t xen_size)
+{
+    int check_high_pmr = 0;
+
+    /* Verify the value of the low PMR base. It should always be 0. */
+    if ( os_sinit->vtd_pmr_lo_base != 0 )
+        txt_reset(SLAUNCH_ERROR_LO_PMR_BASE);
+
+    /*
+     * Low PMR size should not be 0 on current platforms. There is an ongoing
+     * transition to TPR-based DMA protection instead of PMR-based; this is not
+     * yet supported by the code.
+     */
+    if ( os_sinit->vtd_pmr_lo_size == 0 )
+        txt_reset(SLAUNCH_ERROR_LO_PMR_SIZE);
+
+    /* Check if regions overlap. Treat regions with no hole between as error. */
+    if ( os_sinit->vtd_pmr_hi_size != 0 &&
+         os_sinit->vtd_pmr_hi_base <= os_sinit->vtd_pmr_lo_size )
+        txt_reset(SLAUNCH_ERROR_HI_PMR_BASE);
+
+    /* All regions accessed by 32b code must be below 4G. */
+    if ( os_sinit->vtd_pmr_hi_base + os_sinit->vtd_pmr_hi_size <=
+         0x100000000ull )
+        check_high_pmr = 1;
+
+    /*
+     * ACM checks that TXT heap and MLE memory is protected against DMA. We have
+     * to check if MBI and whole Xen memory is protected. The latter is done in
+     * case bootloader failed to set whole image as MLE and to make sure that
+     * both pre- and post-relocation code is protected.
+     */
+
+    /* Check if all of Xen before relocation is covered by PMR. */
+    if ( !is_in_pmr(os_sinit, load_base_addr, xen_size, check_high_pmr) )
+        txt_reset(SLAUNCH_ERROR_LO_PMR_MLE);
+
+    /* Check if all of Xen after relocation is covered by PMR. */
+    if ( load_base_addr != tgt_base_addr &&
+         !is_in_pmr(os_sinit, tgt_base_addr, xen_size, check_high_pmr) )
+        txt_reset(SLAUNCH_ERROR_LO_PMR_MLE);
+
+    /*
+     * If present, check that MBI is covered by PMR. MBI starts with 'uint32_t
+     * total_size'.
+     */
+    if ( info->boot_params_base != 0 &&
+         !is_in_pmr(os_sinit, info->boot_params_base,
+                    *(uint32_t *)(uintptr_t)info->boot_params_base,
+                    check_high_pmr) )
+        txt_reset(SLAUNCH_ERROR_BUFFER_BEYOND_PMR);
+
+    /* Check if TPM event log (if present) is covered by PMR. */
+    /*
+     * FIXME: currently commented out as GRUB allocates it in a hole between
+     * PMR and reserved RAM, due to 2MB resolution of PMR. There are no other
+     * easy-to-use DMA protection mechanisms that would allow to protect that
+     * part of memory. TPR (TXT DMA Protection Range) gives 1MB resolution, but
+     * it still wouldn't be enough.
+     *
+     * One possible solution would be for GRUB to allocate log at lower address,
+     * but this would further increase memory space fragmentation. Another
+     * option is to align PMR up instead of down, making PMR cover part of
+     * reserved region, but it is unclear what the consequences may be.
+     *
+     * In tboot this issue was resolved by reserving leftover chunks of memory
+     * in e820 and/or UEFI memory map. This is also a valid solution, but would
+     * require more changes to GRUB than the ones listed above, as event log is
+     * allocated much earlier than PMRs.
+     */
+    /*
+    if ( os_mle->evtlog_addr != 0 && os_mle->evtlog_size != 0 &&
+         !is_in_pmr(os_sinit, os_mle->evtlog_addr, os_mle->evtlog_size,
+                    check_high_pmr) )
+        txt_reset(SLAUNCH_ERROR_BUFFER_BEYOND_PMR);
+    */
+}
+
 #endif /* __ASSEMBLY__ */
-- 
2.49.0



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From: Sergii Dmytruk 
To: xen-devel@lists.xenproject.org
Cc: Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	trenchboot-devel@googlegroups.com
Subject: [PATCH 06/21] xen/arch/x86: reserve TXT memory
Date: Tue, 22 Apr 2025 18:06:40 +0300
Message-ID: <39d9839d4cb3bafbe7b43f91d472c50cce1e720f.1745172094.git.sergii.dmytruk@3mdeb.com>
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From: Kacper Stojek 

TXT heap, SINIT and TXT private space are marked as reserved or unused
in e820 to protect from unintended uses.

Signed-off-by: Kacper Stojek 
Signed-off-by: Krystian Hebel 
Signed-off-by: Michał Żygowski 
Signed-off-by: Sergii Dmytruk 
---
 xen/arch/x86/Makefile                |   1 +
 xen/arch/x86/include/asm/intel_txt.h |   6 ++
 xen/arch/x86/include/asm/mm.h        |   3 +
 xen/arch/x86/include/asm/slaunch.h   |  44 ++++++++++++
 xen/arch/x86/intel_txt.c             | 102 +++++++++++++++++++++++++++
 xen/arch/x86/setup.c                 |  10 ++-
 xen/arch/x86/slaunch.c               |  96 +++++++++++++++++++++++++
 7 files changed, 259 insertions(+), 3 deletions(-)
 create mode 100644 xen/arch/x86/intel_txt.c

diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
index 571cad160d..cae548f7e9 100644
--- a/xen/arch/x86/Makefile
+++ b/xen/arch/x86/Makefile
@@ -40,6 +40,7 @@ obj-$(CONFIG_GDBSX) += gdbsx.o
 obj-y += hypercall.o
 obj-y += i387.o
 obj-y += i8259.o
+obj-y += intel_txt.o
 obj-y += io_apic.o
 obj-$(CONFIG_LIVEPATCH) += alternative.o livepatch.o
 obj-y += msi.o
diff --git a/xen/arch/x86/include/asm/intel_txt.h b/xen/arch/x86/include/asm/intel_txt.h
index 7170baf6fb..85ef9f6245 100644
--- a/xen/arch/x86/include/asm/intel_txt.h
+++ b/xen/arch/x86/include/asm/intel_txt.h
@@ -396,4 +396,10 @@ static inline void txt_verify_pmr_ranges(struct txt_os_mle_data *os_mle,
     */
 }
 
+/* Prepares for accesses to TXT-specific memory. */
+void txt_map_mem_regions(void);
+
+/* Marks TXT-specific memory as used to avoid its corruption. */
+void txt_reserve_mem_regions(void);
+
 #endif /* __ASSEMBLY__ */
diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h
index a1bc8cc274..061cb12a5b 100644
--- a/xen/arch/x86/include/asm/mm.h
+++ b/xen/arch/x86/include/asm/mm.h
@@ -106,6 +106,9 @@
 #define _PGC_need_scrub   _PGC_allocated
 #define PGC_need_scrub    PGC_allocated
 
+/* How much of the directmap is prebuilt at compile time. */
+#define PREBUILT_MAP_LIMIT (1 << L2_PAGETABLE_SHIFT)
+
 #ifndef CONFIG_BIGMEM
 /*
  * This definition is solely for the use in struct page_info (and
diff --git a/xen/arch/x86/include/asm/slaunch.h b/xen/arch/x86/include/asm/slaunch.h
index 08cc2657f0..78d3c8bf37 100644
--- a/xen/arch/x86/include/asm/slaunch.h
+++ b/xen/arch/x86/include/asm/slaunch.h
@@ -7,13 +7,57 @@
 #ifndef _ASM_X86_SLAUNCH_H_
 #define _ASM_X86_SLAUNCH_H_
 
+#include 
 #include 
 
 extern bool slaunch_active;
 
+/*
+ * evt_log is assigned a physical address and the caller must map it to
+ * virtual, if needed.
+ */
+static inline void find_evt_log(struct slr_table *slrt, void **evt_log,
+                                uint32_t *evt_log_size)
+{
+    struct slr_entry_log_info *log_info;
+
+    log_info = (struct slr_entry_log_info *)
+        slr_next_entry_by_tag(slrt, NULL, SLR_ENTRY_LOG_INFO);
+    if ( log_info != NULL )
+    {
+        *evt_log = _p(log_info->addr);
+        *evt_log_size = log_info->size;
+    }
+    else
+    {
+        *evt_log = NULL;
+        *evt_log_size = 0;
+    }
+}
+
 /*
  * Retrieves pointer to SLRT.  Checks table's validity and maps it as necessary.
  */
 struct slr_table *slaunch_get_slrt(void);
 
+/*
+ * Prepares for accesses to essential data structures setup by boot environment.
+ */
+void slaunch_map_mem_regions(void);
+
+/* Marks regions of memory as used to avoid their corruption. */
+void slaunch_reserve_mem_regions(void);
+
+/*
+ * This helper function is used to map memory using L2 page tables by aligning
+ * mapped regions to 2MB. This way page allocator (which at this point isn't
+ * yet initialized) isn't needed for creating new L1 mappings. The function
+ * also checks and skips memory already mapped by the prebuilt tables.
+ *
+ * There is no unmap_l2() because the function is meant to be used by the code
+ * that accesses DRTM-related memory soon after which Xen rebuilds memory maps,
+ * effectively dropping all existing mappings.
+ */
+int slaunch_map_l2(unsigned long paddr, unsigned long size);
+
 #endif /* _ASM_X86_SLAUNCH_H_ */
diff --git a/xen/arch/x86/intel_txt.c b/xen/arch/x86/intel_txt.c
new file mode 100644
index 0000000000..4a4e404007
--- /dev/null
+++ b/xen/arch/x86/intel_txt.c
@@ -0,0 +1,102 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * Copyright (c) 2022-2025 3mdeb Sp. z o.o. All rights reserved.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static uint64_t __initdata txt_heap_base, txt_heap_size;
+
+void __init txt_map_mem_regions(void)
+{
+    int rc;
+
+    rc = slaunch_map_l2(TXT_PRIV_CONFIG_REGS_BASE, NR_TXT_CONFIG_SIZE);
+    BUG_ON(rc != 0);
+
+    txt_heap_base = read_txt_reg(TXTCR_HEAP_BASE);
+    BUG_ON(txt_heap_base == 0);
+
+    txt_heap_size = read_txt_reg(TXTCR_HEAP_SIZE);
+    BUG_ON(txt_heap_size == 0);
+
+    rc = slaunch_map_l2(txt_heap_base, txt_heap_size);
+    BUG_ON(rc != 0);
+}
+
+/* Mark RAM region as RESERVED if it isn't marked that way already. */
+static int __init mark_ram_as(struct e820map *e820, uint64_t start,
+                              uint64_t end, uint32_t type)
+{
+    unsigned int i;
+    uint32_t from_type = E820_RAM;
+
+    for ( i = 0; i < e820->nr_map; i++ )
+    {
+        uint64_t rs = e820->map[i].addr;
+        uint64_t re = rs + e820->map[i].size;
+        if ( start >= rs && end <= re )
+            break;
+    }
+
+    /*
+     * Allow the range to be unlisted since we're only preventing RAM from
+     * use.
+     */
+    if ( i == e820->nr_map )
+        return 1;
+
+    /*
+     * e820_change_range_type() fails if the range is already marked with the
+     * desired type. Don't consider it an error if firmware has done it for us.
+     */
+    if ( e820->map[i].type == type )
+        return 1;
+
+    /* E820_ACPI or E820_NVS are really unexpected, but others are fine. */
+    if ( e820->map[i].type == E820_RESERVED ||
+         e820->map[i].type == E820_UNUSABLE )
+        from_type = e820->map[i].type;
+
+    return e820_change_range_type(e820, start, end, from_type, type);
+}
+
+void __init txt_reserve_mem_regions(void)
+{
+    int rc;
+    uint64_t sinit_base, sinit_size;
+
+    /* TXT Heap */
+    BUG_ON(txt_heap_base == 0);
+    printk("SLAUNCH: reserving TXT heap (%#lx - %#lx)\n", txt_heap_base,
+           txt_heap_base + txt_heap_size);
+    rc = mark_ram_as(&e820_raw, txt_heap_base, txt_heap_base + txt_heap_size,
+                     E820_RESERVED);
+    BUG_ON(rc == 0);
+
+    sinit_base = read_txt_reg(TXTCR_SINIT_BASE);
+    BUG_ON(sinit_base == 0);
+
+    sinit_size = read_txt_reg(TXTCR_SINIT_SIZE);
+    BUG_ON(sinit_size == 0);
+
+    /* SINIT */
+    printk("SLAUNCH: reserving SINIT memory (%#lx - %#lx)\n", sinit_base,
+           sinit_base + sinit_size);
+    rc = mark_ram_as(&e820_raw, sinit_base, sinit_base + sinit_size,
+                     E820_RESERVED);
+    BUG_ON(rc == 0);
+
+    /* TXT Private Space */
+    rc = mark_ram_as(&e820_raw, TXT_PRIV_CONFIG_REGS_BASE,
+                     TXT_PRIV_CONFIG_REGS_BASE + NR_TXT_CONFIG_SIZE,
+                     E820_UNUSABLE);
+    BUG_ON(rc == 0);
+}
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 24b36c1a59..403d976449 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -52,6 +52,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -1058,9 +1059,6 @@ static struct domain *__init create_dom0(struct boot_info *bi)
     return d;
 }
 
-/* How much of the directmap is prebuilt at compile time. */
-#define PREBUILT_MAP_LIMIT (1 << L2_PAGETABLE_SHIFT)
-
 void asmlinkage __init noreturn __start_xen(void)
 {
     const char *memmap_type = NULL;
@@ -1396,6 +1394,12 @@ void asmlinkage __init noreturn __start_xen(void)
 #endif
     }
 
+    if ( slaunch_active )
+    {
+        slaunch_map_mem_regions();
+        slaunch_reserve_mem_regions();
+    }
+
     /* Sanitise the raw E820 map to produce a final clean version. */
     max_page = raw_max_page = init_e820(memmap_type, &e820_raw);
 
diff --git a/xen/arch/x86/slaunch.c b/xen/arch/x86/slaunch.c
index 0404084b02..20e277cc5c 100644
--- a/xen/arch/x86/slaunch.c
+++ b/xen/arch/x86/slaunch.c
@@ -7,7 +7,11 @@
 #include 
 #include 
 #include 
+#include 
 #include 
+#include 
+#include 
+#include 
 #include 
 
 /*
@@ -24,3 +28,95 @@ static void __maybe_unused compile_time_checks(void)
 {
     BUILD_BUG_ON(sizeof(slaunch_active) != 1);
 }
+
+struct slr_table *__init slaunch_get_slrt(void)
+{
+    static struct slr_table *slrt;
+
+    if (slrt == NULL) {
+        int rc;
+
+        slrt = __va(slaunch_slrt);
+
+        rc = slaunch_map_l2(slaunch_slrt, PAGE_SIZE);
+        BUG_ON(rc != 0);
+
+        if ( slrt->magic != SLR_TABLE_MAGIC )
+            panic("SLRT has invalid magic value: %#08x!\n", slrt->magic);
+        /* XXX: are newer revisions allowed? */
+        if ( slrt->revision != SLR_TABLE_REVISION )
+            panic("SLRT is of unsupported revision: %#04x!\n", slrt->revision);
+        if ( slrt->architecture != SLR_INTEL_TXT )
+            panic("SLRT is for unexpected architecture: %#04x!\n",
+                  slrt->architecture);
+        if ( slrt->size > slrt->max_size )
+            panic("SLRT is larger than its max size: %#08x > %#08x!\n",
+                  slrt->size, slrt->max_size);
+
+        if ( slrt->size > PAGE_SIZE )
+        {
+            rc = slaunch_map_l2(slaunch_slrt, slrt->size);
+            BUG_ON(rc != 0);
+        }
+    }
+
+    return slrt;
+}
+
+void __init slaunch_map_mem_regions(void)
+{
+    void *evt_log_addr;
+    uint32_t evt_log_size;
+
+    /* Vendor-specific part. */
+    txt_map_mem_regions();
+
+    find_evt_log(slaunch_get_slrt(), &evt_log_addr, &evt_log_size);
+    if ( evt_log_addr != NULL )
+    {
+        int rc = slaunch_map_l2((uintptr_t)evt_log_addr, evt_log_size);
+        BUG_ON(rc != 0);
+    }
+}
+
+void __init slaunch_reserve_mem_regions(void)
+{
+    int rc;
+
+    void *evt_log_addr;
+    uint32_t evt_log_size;
+
+    /* Vendor-specific part. */
+    txt_reserve_mem_regions();
+
+    find_evt_log(slaunch_get_slrt(), &evt_log_addr, &evt_log_size);
+    if ( evt_log_addr != NULL )
+    {
+        printk("SLAUNCH: reserving event log (%#lx - %#lx)\n",
+               (uint64_t)evt_log_addr,
+               (uint64_t)evt_log_addr + evt_log_size);
+        rc = reserve_e820_ram(&e820_raw, (uint64_t)evt_log_addr,
+                              (uint64_t)evt_log_addr + evt_log_size);
+        BUG_ON(rc == 0);
+    }
+}
+
+int __init slaunch_map_l2(unsigned long paddr, unsigned long size)
+{
+    unsigned long aligned_paddr = paddr & ~((1ULL << L2_PAGETABLE_SHIFT) - 1);
+    unsigned long pages = ((paddr + size) - aligned_paddr);
+    pages = ROUNDUP(pages, 1ULL << L2_PAGETABLE_SHIFT) >> PAGE_SHIFT;
+
+    if ( aligned_paddr + pages * PAGE_SIZE <= PREBUILT_MAP_LIMIT )
+        return 0;
+
+    if ( aligned_paddr < PREBUILT_MAP_LIMIT )
+    {
+        pages -= (PREBUILT_MAP_LIMIT - aligned_paddr) >> PAGE_SHIFT;
+        aligned_paddr = PREBUILT_MAP_LIMIT;
+    }
+
+    return map_pages_to_xen((uintptr_t)__va(aligned_paddr),
+                            maddr_to_mfn(aligned_paddr),
+                            pages, PAGE_HYPERVISOR);
+}
-- 
2.49.0



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Cc: Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	trenchboot-devel@googlegroups.com
Subject: [PATCH 07/21] x86/mtrr: expose functions for pausing caching
Date: Tue, 22 Apr 2025 18:06:41 +0300
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This allows the functionality to be reused by other units that need to
update MTRRs.

This also gets rid of a static variable.

Signed-off-by: Sergii Dmytruk 
---
 xen/arch/x86/cpu/mtrr/generic.c | 51 ++++++++++++++++-----------------
 xen/arch/x86/include/asm/mtrr.h |  8 ++++++
 2 files changed, 33 insertions(+), 26 deletions(-)

diff --git a/xen/arch/x86/cpu/mtrr/generic.c b/xen/arch/x86/cpu/mtrr/generic.c
index c587e9140e..2a8dd1d8ff 100644
--- a/xen/arch/x86/cpu/mtrr/generic.c
+++ b/xen/arch/x86/cpu/mtrr/generic.c
@@ -396,9 +396,7 @@ static bool set_mtrr_var_ranges(unsigned int index, struct mtrr_var_range *vr)
 	return changed;
 }
 
-static uint64_t deftype;
-
-static unsigned long set_mtrr_state(void)
+static unsigned long set_mtrr_state(uint64_t *deftype)
 /*  [SUMMARY] Set the MTRR state for this CPU.
      The MTRR state information to read.
      Some relevant CPU context.
@@ -416,14 +414,12 @@ static unsigned long set_mtrr_state(void)
 	if (mtrr_state.have_fixed && set_fixed_ranges(mtrr_state.fixed_ranges))
 		change_mask |= MTRR_CHANGE_MASK_FIXED;
 
-	/*  Set_mtrr_restore restores the old value of MTRRdefType,
-	   so to set it we fiddle with the saved value  */
-	if ((deftype & 0xff) != mtrr_state.def_type
-	    || MASK_EXTR(deftype, MTRRdefType_E) != mtrr_state.enabled
-	    || MASK_EXTR(deftype, MTRRdefType_FE) != mtrr_state.fixed_enabled) {
-		deftype = (deftype & ~0xcff) | mtrr_state.def_type |
-		          MASK_INSR(mtrr_state.enabled, MTRRdefType_E) |
-		          MASK_INSR(mtrr_state.fixed_enabled, MTRRdefType_FE);
+	if ((*deftype & 0xff) != mtrr_state.def_type
+	    || MASK_EXTR(*deftype, MTRRdefType_E) != mtrr_state.enabled
+	    || MASK_EXTR(*deftype, MTRRdefType_FE) != mtrr_state.fixed_enabled) {
+		*deftype = (*deftype & ~0xcff) | mtrr_state.def_type |
+		           MASK_INSR(mtrr_state.enabled, MTRRdefType_E) |
+		           MASK_INSR(mtrr_state.fixed_enabled, MTRRdefType_FE);
 		change_mask |= MTRR_CHANGE_MASK_DEFTYPE;
 	}
 
@@ -440,9 +436,10 @@ static DEFINE_SPINLOCK(set_atomicity_lock);
  * has been called.
  */
 
-static bool prepare_set(void)
+struct mtrr_pausing_state mtrr_pause_caching(void)
 {
 	unsigned long cr4;
+	struct mtrr_pausing_state state;
 
 	/*  Note that this is not ideal, since the cache is only flushed/disabled
 	   for this CPU while the MTRRs are changed, but changing this requires
@@ -462,7 +459,9 @@ static bool prepare_set(void)
 	alternative("wbinvd", "", X86_FEATURE_XEN_SELFSNOOP);
 
 	cr4 = read_cr4();
-	if (cr4 & X86_CR4_PGE)
+	state.pge = cr4 & X86_CR4_PGE;
+
+	if (state.pge)
 		write_cr4(cr4 & ~X86_CR4_PGE);
 	else if (use_invpcid)
 		invpcid_flush_all();
@@ -470,27 +469,27 @@ static bool prepare_set(void)
 		write_cr3(read_cr3());
 
 	/*  Save MTRR state */
-	rdmsrl(MSR_MTRRdefType, deftype);
+	rdmsrl(MSR_MTRRdefType, state.def_type);
 
 	/*  Disable MTRRs, and set the default type to uncached  */
-	mtrr_wrmsr(MSR_MTRRdefType, deftype & ~0xcff);
+	mtrr_wrmsr(MSR_MTRRdefType, state.def_type & ~0xcff);
 
 	/* Again, only flush caches if we have to. */
 	alternative("wbinvd", "", X86_FEATURE_XEN_SELFSNOOP);
 
-	return cr4 & X86_CR4_PGE;
+	return state;
 }
 
-static void post_set(bool pge)
+void mtrr_resume_caching(struct mtrr_pausing_state state)
 {
 	/* Intel (P6) standard MTRRs */
-	mtrr_wrmsr(MSR_MTRRdefType, deftype);
+	mtrr_wrmsr(MSR_MTRRdefType, state.def_type);
 
 	/*  Enable caches  */
 	write_cr0(read_cr0() & ~X86_CR0_CD);
 
 	/*  Reenable CR4.PGE (also flushes the TLB) */
-	if (pge)
+	if (state.pge)
 		write_cr4(read_cr4() | X86_CR4_PGE);
 	else if (use_invpcid)
 		invpcid_flush_all();
@@ -504,15 +503,15 @@ void mtrr_set_all(void)
 {
 	unsigned long mask, count;
 	unsigned long flags;
-	bool pge;
+	struct mtrr_pausing_state pausing_state;
 
 	local_irq_save(flags);
-	pge = prepare_set();
+	pausing_state = mtrr_pause_caching();
 
 	/* Actually set the state */
-	mask = set_mtrr_state();
+	mask = set_mtrr_state(&pausing_state.def_type);
 
-	post_set(pge);
+	mtrr_resume_caching(pausing_state);
 	local_irq_restore(flags);
 
 	/*  Use the atomic bitops to update the global mask  */
@@ -537,12 +536,12 @@ void mtrr_set(
 {
 	unsigned long flags;
 	struct mtrr_var_range *vr;
-	bool pge;
+	struct mtrr_pausing_state pausing_state;
 
 	vr = &mtrr_state.var_ranges[reg];
 
 	local_irq_save(flags);
-	pge = prepare_set();
+	pausing_state = mtrr_pause_caching();
 
 	if (size == 0) {
 		/* The invalid bit is kept in the mask, so we simply clear the
@@ -563,7 +562,7 @@ void mtrr_set(
 		mtrr_wrmsr(MSR_IA32_MTRR_PHYSMASK(reg), vr->mask);
 	}
 
-	post_set(pge);
+	mtrr_resume_caching(pausing_state);
 	local_irq_restore(flags);
 }
 
diff --git a/xen/arch/x86/include/asm/mtrr.h b/xen/arch/x86/include/asm/mtrr.h
index 25d442659d..82ea427ba0 100644
--- a/xen/arch/x86/include/asm/mtrr.h
+++ b/xen/arch/x86/include/asm/mtrr.h
@@ -66,6 +66,14 @@ extern uint8_t pat_type_2_pte_flags(uint8_t pat_type);
 extern void mtrr_aps_sync_begin(void);
 extern void mtrr_aps_sync_end(void);
 
+struct mtrr_pausing_state {
+	bool pge;
+	uint64_t def_type;
+};
+
+extern struct mtrr_pausing_state mtrr_pause_caching(void);
+extern void mtrr_resume_caching(struct mtrr_pausing_state state);
+
 extern bool mtrr_var_range_msr_set(struct domain *d, struct mtrr_state *m,
                                    uint32_t msr, uint64_t msr_content);
 extern bool mtrr_fix_range_msr_set(struct domain *d, struct mtrr_state *m,
-- 
2.49.0



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From: Sergii Dmytruk 
To: xen-devel@lists.xenproject.org
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	trenchboot-devel@googlegroups.com
Subject: [PATCH 09/21] lib/sha1.c: add file
Date: Tue, 22 Apr 2025 18:06:43 +0300
Message-ID: <8dec423182ed60e2233ed87d98066fed6dc20caf.1745172094.git.sergii.dmytruk@3mdeb.com>
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From: Krystian Hebel 

The code comes from [1] and is licensed under GPL-2.0 license.
It's a combination of:
 - include/crypto/sha1.h
 - include/crypto/sha1_base.h
 - lib/crypto/sha1.c
 - crypto/sha1_generic.c

Changes:
 - includes
 - formatting
 - renames and splicing of some trivial functions that are called once
 - dropping of `int` return values (only zero was ever returned)
 - getting rid of references to `struct shash_desc`

[1]: https://github.com/torvalds/linux/tree/afdab700f65e14070d8ab92175544b1c62b8bf03

Signed-off-by: Sergii Dmytruk 
Signed-off-by: Krystian Hebel 
---
 xen/include/xen/sha1.h |  12 +++
 xen/lib/Makefile       |   1 +
 xen/lib/sha1.c         | 240 +++++++++++++++++++++++++++++++++++++++++
 3 files changed, 253 insertions(+)
 create mode 100644 xen/include/xen/sha1.h
 create mode 100644 xen/lib/sha1.c

diff --git a/xen/include/xen/sha1.h b/xen/include/xen/sha1.h
new file mode 100644
index 0000000000..752dfdf827
--- /dev/null
+++ b/xen/include/xen/sha1.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef __XEN_SHA1_H
+#define __XEN_SHA1_H
+
+#include 
+
+#define SHA1_DIGEST_SIZE  20
+
+void sha1_hash(const u8 *data, unsigned int len, u8 *out);
+
+#endif /* !__XEN_SHA1_H */
diff --git a/xen/lib/Makefile b/xen/lib/Makefile
index 76dc86fab0..0d5774b8d7 100644
--- a/xen/lib/Makefile
+++ b/xen/lib/Makefile
@@ -38,6 +38,7 @@ lib-y += strtoll.o
 lib-y += strtoul.o
 lib-y += strtoull.o
 lib-$(CONFIG_X86) += x86-generic-hweightl.o
+lib-$(CONFIG_X86) += sha1.o
 lib-$(CONFIG_X86) += xxhash32.o
 lib-$(CONFIG_X86) += xxhash64.o
 
diff --git a/xen/lib/sha1.c b/xen/lib/sha1.c
new file mode 100644
index 0000000000..a11822519d
--- /dev/null
+++ b/xen/lib/sha1.c
@@ -0,0 +1,240 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * SHA1 routine optimized to do word accesses rather than byte accesses,
+ * and to avoid unnecessary copies into the context array.
+ *
+ * This was based on the git SHA1 implementation.
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+/*
+ * If you have 32 registers or more, the compiler can (and should)
+ * try to change the array[] accesses into registers. However, on
+ * machines with less than ~25 registers, that won't really work,
+ * and at least gcc will make an unholy mess of it.
+ *
+ * So to avoid that mess which just slows things down, we force
+ * the stores to memory to actually happen (we might be better off
+ * with a 'W(t)=(val);asm("":"+m" (W(t))' there instead, as
+ * suggested by Artur Skawina - that will also make gcc unable to
+ * try to do the silly "optimize away loads" part because it won't
+ * see what the value will be).
+ *
+ * Ben Herrenschmidt reports that on PPC, the C version comes close
+ * to the optimized asm with this (ie on PPC you don't want that
+ * 'volatile', since there are lots of registers).
+ *
+ * On ARM we get the best code generation by forcing a full memory barrier
+ * between each SHA_ROUND, otherwise gcc happily get wild with spilling and
+ * the stack frame size simply explode and performance goes down the drain.
+ */
+
+#ifdef CONFIG_X86
+  #define setW(x, val) (*(volatile uint32_t *)&W(x) = (val))
+#elif defined(CONFIG_ARM)
+  #define setW(x, val) do { W(x) = (val); __asm__("":::"memory"); } while ( 0 )
+#else
+  #define setW(x, val) (W(x) = (val))
+#endif
+
+/* This "rolls" over the 512-bit array */
+#define W(x) (array[(x) & 15])
+
+/*
+ * Where do we get the source from? The first 16 iterations get it from
+ * the input data, the next mix it from the 512-bit array.
+ */
+#define SHA_SRC(t) get_unaligned_be32((uint32_t *)data + t)
+#define SHA_MIX(t) rol32(W(t + 13) ^ W(t + 8) ^ W(t + 2) ^ W(t), 1)
+
+#define SHA_ROUND(t, input, fn, constant, A, B, C, D, E) do { \
+        uint32_t TEMP = input(t); setW(t, TEMP);              \
+        E += TEMP + rol32(A, 5) + (fn) + (constant);          \
+        B = ror32(B, 2);                                      \
+        TEMP = E; E = D; D = C; C = B; B = A; A = TEMP;       \
+    } while ( 0 )
+
+#define T_0_15(t, A, B, C, D, E)  \
+        SHA_ROUND(t, SHA_SRC, (((C ^ D) & B) ^ D), 0x5a827999, A, B, C, D, E)
+#define T_16_19(t, A, B, C, D, E) \
+        SHA_ROUND(t, SHA_MIX, (((C ^ D) & B) ^ D), 0x5a827999, A, B, C, D, E)
+#define T_20_39(t, A, B, C, D, E) \
+        SHA_ROUND(t, SHA_MIX, (B ^ C ^ D), 0x6ed9eba1, A, B, C, D, E)
+#define T_40_59(t, A, B, C, D, E)                                             \
+        SHA_ROUND(t, SHA_MIX, ((B & C) + (D & (B ^ C))), 0x8f1bbcdc, A, B, C, \
+                  D, E)
+#define T_60_79(t, A, B, C, D, E) \
+        SHA_ROUND(t, SHA_MIX, (B ^ C ^ D), 0xca62c1d6, A, B, C, D, E)
+
+#define SHA1_BLOCK_SIZE         64
+#define SHA1_WORKSPACE_WORDS    16
+
+struct sha1_state {
+    uint32_t state[SHA1_DIGEST_SIZE / 4];
+    uint64_t count;
+    uint8_t buffer[SHA1_BLOCK_SIZE];
+};
+
+typedef void sha1_block_fn(struct sha1_state *sst, const uint8_t *src, int blocks);
+
+/**
+ * sha1_transform - single block SHA1 transform (deprecated)
+ *
+ * @digest: 160 bit digest to update
+ * @data:   512 bits of data to hash
+ * @array:  16 words of workspace (see note)
+ *
+ * This function executes SHA-1's internal compression function.  It updates the
+ * 160-bit internal state (@digest) with a single 512-bit data block (@data).
+ *
+ * Don't use this function.  SHA-1 is no longer considered secure.  And even if
+ * you do have to use SHA-1, this isn't the correct way to hash something with
+ * SHA-1 as this doesn't handle padding and finalization.
+ *
+ * Note: If the hash is security sensitive, the caller should be sure
+ * to clear the workspace. This is left to the caller to avoid
+ * unnecessary clears between chained hashing operations.
+ */
+void sha1_transform(uint32_t *digest, const uint8_t *data, uint32_t *array)
+{
+    uint32_t A, B, C, D, E;
+    unsigned int i = 0;
+
+    A = digest[0];
+    B = digest[1];
+    C = digest[2];
+    D = digest[3];
+    E = digest[4];
+
+    /* Round 1 - iterations 0-16 take their input from 'data' */
+    for ( ; i < 16; ++i )
+        T_0_15(i, A, B, C, D, E);
+
+    /* Round 1 - tail. Input from 512-bit mixing array */
+    for ( ; i < 20; ++i )
+        T_16_19(i, A, B, C, D, E);
+
+    /* Round 2 */
+    for ( ; i < 40; ++i )
+        T_20_39(i, A, B, C, D, E);
+
+    /* Round 3 */
+    for ( ; i < 60; ++i )
+        T_40_59(i, A, B, C, D, E);
+
+    /* Round 4 */
+    for ( ; i < 80; ++i )
+        T_60_79(i, A, B, C, D, E);
+
+    digest[0] += A;
+    digest[1] += B;
+    digest[2] += C;
+    digest[3] += D;
+    digest[4] += E;
+}
+
+static void sha1_init(struct sha1_state *sctx)
+{
+    sctx->state[0] = 0x67452301UL;
+    sctx->state[1] = 0xefcdab89UL;
+    sctx->state[2] = 0x98badcfeUL;
+    sctx->state[3] = 0x10325476UL;
+    sctx->state[4] = 0xc3d2e1f0UL;
+    sctx->count = 0;
+}
+
+static void sha1_do_update(struct sha1_state *sctx,
+                           const uint8_t *data,
+                           unsigned int len,
+                           sha1_block_fn *block_fn)
+{
+    unsigned int partial = sctx->count % SHA1_BLOCK_SIZE;
+
+    sctx->count += len;
+
+    if ( unlikely((partial + len) >= SHA1_BLOCK_SIZE) )
+    {
+        int blocks;
+
+        if ( partial )
+        {
+            int p = SHA1_BLOCK_SIZE - partial;
+
+            memcpy(sctx->buffer + partial, data, p);
+            data += p;
+            len -= p;
+
+            block_fn(sctx, sctx->buffer, 1);
+        }
+
+        blocks = len / SHA1_BLOCK_SIZE;
+        len %= SHA1_BLOCK_SIZE;
+
+        if ( blocks )
+        {
+            block_fn(sctx, data, blocks);
+            data += blocks * SHA1_BLOCK_SIZE;
+        }
+        partial = 0;
+    }
+    if ( len )
+        memcpy(sctx->buffer + partial, data, len);
+}
+
+static void sha1_do_finalize(struct sha1_state *sctx, sha1_block_fn *block_fn)
+{
+    const int bit_offset = SHA1_BLOCK_SIZE - sizeof(__be64);
+    __be64 *bits = (__be64 *)(sctx->buffer + bit_offset);
+    unsigned int partial = sctx->count % SHA1_BLOCK_SIZE;
+
+    sctx->buffer[partial++] = 0x80;
+    if ( partial > bit_offset )
+    {
+        memset(sctx->buffer + partial, 0x0, SHA1_BLOCK_SIZE - partial);
+        partial = 0;
+
+        block_fn(sctx, sctx->buffer, 1);
+    }
+
+    memset(sctx->buffer + partial, 0x0, bit_offset - partial);
+    *bits = cpu_to_be64(sctx->count << 3);
+    block_fn(sctx, sctx->buffer, 1);
+}
+
+static void sha1_finish(struct sha1_state *sctx, uint8_t *out)
+{
+    __be32 *digest = (__be32 *)out;
+    int i;
+
+    for ( i = 0; i < SHA1_DIGEST_SIZE / sizeof(__be32); i++ )
+        put_unaligned_be32(sctx->state[i], digest++);
+
+    memset(sctx, 0, sizeof(*sctx));
+}
+
+static void sha1_generic_block_fn(struct sha1_state *sctx, const uint8_t *src,
+                                  int blocks)
+{
+    uint32_t temp[SHA1_WORKSPACE_WORDS];
+
+    while ( blocks-- )
+    {
+        sha1_transform(sctx->state, src, temp);
+        src += SHA1_BLOCK_SIZE;
+    }
+    memset(temp, 0, sizeof(temp));
+}
+
+void sha1_hash(const uint8_t *data, unsigned int len, uint8_t *out)
+{
+    struct sha1_state sctx;
+
+    sha1_init(&sctx);
+    sha1_do_update(&sctx, data, len, sha1_generic_block_fn);
+    sha1_do_finalize(&sctx, sha1_generic_block_fn);
+    sha1_finish(&sctx, out);
+}
-- 
2.49.0



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Date: Tue, 22 Apr 2025 08:09:34 -0700
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Subject: Re: [RFC PATCH v2 10/34] x86/msr: Convert __rdmsr() uses to
 native_rdmsrq() uses
From: Sean Christopherson 
To: "Xin Li (Intel)" 
Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, 
	linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org, 
	virtualization@lists.linux.dev, linux-pm@vger.kernel.org, 
	linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org, 
	linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org, 
	netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org, 
	tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, 
	dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, acme@kernel.org, 
	jgross@suse.com, andrew.cooper3@citrix.com, peterz@infradead.org, 
	namhyung@kernel.org, mark.rutland@arm.com, alexander.shishkin@linux.intel.com, 
	jolsa@kernel.org, irogers@google.com, adrian.hunter@intel.com, 
	kan.liang@linux.intel.com, wei.liu@kernel.org, ajay.kaher@broadcom.com, 
	bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com, 
	pbonzini@redhat.com, vkuznets@redhat.com, luto@kernel.org, 
	boris.ostrovsky@oracle.com, kys@microsoft.com, haiyangz@microsoft.com, 
	decui@microsoft.com
Content-Type: text/plain; charset="us-ascii"

On Tue, Apr 22, 2025, Xin Li (Intel) wrote:
> __rdmsr() is the lowest level primitive MSR read API, and its direct
> use is NOT preferred.

Doesn't mean it's wrong.

> Use its wrapper function native_rdmsrq() instead.

...

> diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
> index 1547bfacd40f..e73c1d5ba6c4 100644
> --- a/arch/x86/kvm/vmx/vmx.c
> +++ b/arch/x86/kvm/vmx/vmx.c
> @@ -380,7 +380,7 @@ static __always_inline void vmx_disable_fb_clear(struct vcpu_vmx *vmx)
>  	if (!vmx->disable_fb_clear)
>  		return;
>  
> -	msr = __rdmsr(MSR_IA32_MCU_OPT_CTRL);
> +	msr = native_rdmsrq(MSR_IA32_MCU_OPT_CTRL);
>  	msr |= FB_CLEAR_DIS;
>  	native_wrmsrq(MSR_IA32_MCU_OPT_CTRL, msr);
>  	/* Cache the MSR value to avoid reading it later */
> @@ -7307,7 +7307,7 @@ void noinstr vmx_spec_ctrl_restore_host(struct vcpu_vmx *vmx,
>  		return;
>  
>  	if (flags & VMX_RUN_SAVE_SPEC_CTRL)
> -		vmx->spec_ctrl = __rdmsr(MSR_IA32_SPEC_CTRL);
> +		vmx->spec_ctrl = native_rdmsrq(MSR_IA32_SPEC_CTRL);

And what guarantees that native_rdmsrq() won't have tracing?  Ugh, a later patch
renames native_rdmsrq() => native_rdmsrq_no_trace().

I really don't like this.  It makes simple and obvious code:

	vmx->spec_ctrl = __rdmsr(MSR_IA32_SPEC_CTRL);

so much harder to read:

	vmx->spec_ctrl = native_rdmsrq_no_trace(MSR_IA32_SPEC_CTRL);

and does so in a way that is difficult to review, e.g. I have to peek ahead to
understand that this is even ok.

I strongly prefer that we find a way to not require such verbose APIs, especially
if KVM ends up using native variants throughout.  Xen PV is supposed to be the
odd one out, yet native code is what suffers.  Blech.


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From: Sergii Dmytruk 
To: xen-devel@lists.xenproject.org
Cc: Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	trenchboot-devel@googlegroups.com
Subject: [PATCH 16/21] x86/smpboot.c: TXT AP bringup
Date: Tue, 22 Apr 2025 18:06:50 +0300
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From: Krystian Hebel 

On Intel TXT, APs are started in one of two ways, depending on ACM
which reports it in its information table. In both cases, all APs are
started simultaneously after BSP requests them to do so. Two possible
ways are:
- GETSEC[WAKEUP] instruction,
- MONITOR address.

GETSEC[WAKEUP] requires versions >= 7 of SINIT to MLE Data, but there is
no clear mapping of that version with regard to processor family and
it's not known which CPUs actually use it. It could have been designed
for TXT support on CPUs that lack MONITOR/MWAIT, because GETSEC[WAKEUP]
seems to be more complicated, in software and hardware alike.

This patch implements only MONITOR approach, GETSEC[WAKEUP] support will
be added later once more details and means of testing are available and
if there is a practical need for it.

With this patch, every AP goes through assembly part, and only when in
start_secondary() in C they re-enter MONITOR/MWAIT iff they are not the
AP that was asked to boot. The same address is reused for simplicity,
and on next wakeup call APs don't have to go through assembly part
again (GDT, paging, stack setting).

Signed-off-by: Krystian Hebel 
Signed-off-by: Sergii Dmytruk 
---
 xen/arch/x86/boot/trampoline.S       | 19 +++++++++-
 xen/arch/x86/include/asm/intel_txt.h |  6 +++
 xen/arch/x86/include/asm/processor.h |  1 +
 xen/arch/x86/smpboot.c               | 57 ++++++++++++++++++++++++++++
 4 files changed, 82 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/boot/trampoline.S b/xen/arch/x86/boot/trampoline.S
index ed593acc46..5989d3a69a 100644
--- a/xen/arch/x86/boot/trampoline.S
+++ b/xen/arch/x86/boot/trampoline.S
@@ -58,6 +58,16 @@ GLOBAL(entry_SIPI16)
         ljmpl   $BOOT_CS32,$bootsym_rel(trampoline_protmode_entry,6)
 
         .code32
+GLOBAL(txt_ap_entry)
+        /*
+         * APs enter here in protected mode without paging. GDT is set in JOIN
+         * structure, it points to trampoline_gdt. Interrupts are disabled by
+         * TXT (including NMI and SMI), so IDT doesn't matter at this point.
+         * The only missing point is telling that we are AP by saving non-zero
+         * value in EBX.
+         */
+        mov     $1, %ebx
+
 trampoline_protmode_entry:
         /* Set up a few descriptors: on entry only CS is guaranteed good. */
         mov     $BOOT_DS,%eax
@@ -143,7 +153,7 @@ start64:
         .word   0
 idt_48: .word   0, 0, 0 # base = limit = 0
 
-trampoline_gdt:
+GLOBAL(trampoline_gdt)
         .word   0                  /* 0x0000: unused (reused for GDTR) */
 gdt_48:
         .word   .Ltrampoline_gdt_end - trampoline_gdt - 1
@@ -154,6 +164,13 @@ gdt_48:
         .quad   0x00cf93000000ffff /* 0x0018: ring 0 data */
         .quad   0x00009b000000ffff /* 0x0020: real-mode code @ BOOT_TRAMPOLINE */
         .quad   0x000093000000ffff /* 0x0028: real-mode data @ BOOT_TRAMPOLINE */
+        /*
+         * Intel TXT requires these two in exact order. This isn't compatible
+         * with order required by syscall, so we have duplicated entries...
+         * If order ever changes, update selector numbers in asm/intel_txt.h.
+         */
+        .quad   0x00cf9b000000ffff /* 0x0030: ring 0 code, 32-bit mode */
+        .quad   0x00cf93000000ffff /* 0x0038: ring 0 data */
 .Ltrampoline_gdt_end:
 
         /* Relocations for trampoline Real Mode segments. */
diff --git a/xen/arch/x86/include/asm/intel_txt.h b/xen/arch/x86/include/asm/intel_txt.h
index 0a36ef66d1..af997c9da6 100644
--- a/xen/arch/x86/include/asm/intel_txt.h
+++ b/xen/arch/x86/include/asm/intel_txt.h
@@ -79,6 +79,9 @@
 
 #define SLAUNCH_BOOTLOADER_MAGIC             0x4c534254
 
+#define TXT_AP_BOOT_CS                  0x0030
+#define TXT_AP_BOOT_DS                  0x0038
+
 #ifndef __ASSEMBLY__
 
 #include 
@@ -93,6 +96,9 @@
 #define _txt(x) __va(x)
 #endif
 
+extern char txt_ap_entry[];
+extern uint32_t trampoline_gdt[];
+
 /*
  * Always use private space as some of registers are either read-only or not
  * present in public space.
diff --git a/xen/arch/x86/include/asm/processor.h b/xen/arch/x86/include/asm/processor.h
index 75af7ea3c4..9957e3cb9e 100644
--- a/xen/arch/x86/include/asm/processor.h
+++ b/xen/arch/x86/include/asm/processor.h
@@ -473,6 +473,7 @@ void set_in_mcu_opt_ctrl(uint32_t mask, uint32_t val);
 enum ap_boot_method {
     AP_BOOT_NORMAL,
     AP_BOOT_SKINIT,
+    AP_BOOT_TXT,
 };
 extern enum ap_boot_method ap_boot_method;
 
diff --git a/xen/arch/x86/smpboot.c b/xen/arch/x86/smpboot.c
index 54207e6d88..1ff26761ab 100644
--- a/xen/arch/x86/smpboot.c
+++ b/xen/arch/x86/smpboot.c
@@ -29,6 +29,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -37,6 +38,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -325,6 +327,29 @@ void asmlinkage start_secondary(void *unused)
      */
     unsigned int cpu = booting_cpu;
 
+    if ( ap_boot_method == AP_BOOT_TXT ) {
+        uint64_t misc_enable;
+        uint32_t my_apicid;
+        struct txt_sinit_mle_data *sinit_mle =
+              txt_sinit_mle_data_start(__va(read_txt_reg(TXTCR_HEAP_BASE)));
+
+        /* TXT released us with MONITOR disabled in IA32_MISC_ENABLE. */
+        rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable);
+        wrmsrl(MSR_IA32_MISC_ENABLE,
+               misc_enable | MSR_IA32_MISC_ENABLE_MONITOR_ENABLE);
+
+        /* get_apic_id() reads from x2APIC if it thinks it is enabled. */
+        x2apic_ap_setup();
+        my_apicid = get_apic_id();
+
+        while ( my_apicid != x86_cpu_to_apicid[cpu] ) {
+            asm volatile ("monitor; xor %0,%0; mwait"
+                          :: "a"(__va(sinit_mle->rlp_wakeup_addr)), "c"(0),
+                          "d"(0) : "memory");
+            cpu = booting_cpu;
+        }
+    }
+
     /* Critical region without IDT or TSS.  Any fault is deadly! */
 
     set_current(idle_vcpu[cpu]);
@@ -421,6 +446,28 @@ void asmlinkage start_secondary(void *unused)
     startup_cpu_idle_loop();
 }
 
+static int wake_aps_in_txt(void)
+{
+    struct txt_sinit_mle_data *sinit_mle =
+              txt_sinit_mle_data_start(__va(read_txt_reg(TXTCR_HEAP_BASE)));
+    uint32_t *wakeup_addr = __va(sinit_mle->rlp_wakeup_addr);
+
+    uint32_t join[4] = {
+        trampoline_gdt[1],               /* GDT limit */
+        bootsym_phys(trampoline_gdt),    /* GDT base */
+        TXT_AP_BOOT_CS,                  /* CS selector, DS = CS+8 */
+        bootsym_phys(txt_ap_entry)       /* EIP */
+    };
+
+    write_txt_reg(TXTCR_MLE_JOIN, __pa(join));
+
+    smp_mb();
+
+    *wakeup_addr = 1;
+
+    return 0;
+}
+
 static int wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
 {
     unsigned long send_status = 0, accept_status = 0;
@@ -443,6 +490,9 @@ static int wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
     if ( tboot_in_measured_env() && !tboot_wake_ap(phys_apicid, start_eip) )
         return 0;
 
+    if ( ap_boot_method == AP_BOOT_TXT )
+        return wake_aps_in_txt();
+
     /*
      * Be paranoid about clearing APIC errors.
      */
@@ -1150,6 +1200,13 @@ static struct notifier_block cpu_smpboot_nfb = {
 
 void __init smp_prepare_cpus(void)
 {
+    /*
+     * If the platform is performing a Secure Launch via TXT, secondary
+     * CPUs (APs) will need to be woken up in a TXT-specific way.
+     */
+    if ( slaunch_active && boot_cpu_data.x86_vendor == X86_VENDOR_INTEL )
+        ap_boot_method = AP_BOOT_TXT;
+
     register_cpu_notifier(&cpu_smpboot_nfb);
 
     mtrr_aps_sync_begin();
-- 
2.49.0



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Subject: [PATCH 21/21] x86/cpu: report SMX, TXT and SKINIT capabilities
Date: Tue, 22 Apr 2025 18:06:55 +0300
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From: Michał Żygowski 

Report TXT capabilities so that dom0 can query the Intel TXT or AMD
SKINIT support information using xl dmesg.

Signed-off-by: Michał Żygowski 
Signed-off-by: Sergii Dmytruk 
---
 xen/arch/x86/cpu/amd.c               | 14 +++++++++
 xen/arch/x86/cpu/cpu.h               |  1 +
 xen/arch/x86/cpu/hygon.c             |  1 +
 xen/arch/x86/cpu/intel.c             | 44 ++++++++++++++++++++++++++++
 xen/arch/x86/include/asm/intel_txt.h |  5 ++++
 5 files changed, 65 insertions(+)

diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c
index ce4e1df710..8be135dbc1 100644
--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -671,6 +671,19 @@ void amd_log_freq(const struct cpuinfo_x86 *c)
 #undef FREQ
 }
 
+void amd_log_skinit(const struct cpuinfo_x86 *c)
+{
+    /* Run only on BSP to report the capability only once */
+    if ( smp_processor_id() )
+        return;
+
+    printk("CPU: SKINIT capability ");
+    if ( !test_bit(X86_FEATURE_SKINIT, &boot_cpu_data.x86_capability) )
+        printk("not supported\n");
+    else
+        printk("supported\n");
+}
+
 void cf_check early_init_amd(struct cpuinfo_x86 *c)
 {
 	if (c == &boot_cpu_data)
@@ -1320,6 +1333,7 @@ static void cf_check init_amd(struct cpuinfo_x86 *c)
 	check_syscfg_dram_mod_en();
 
 	amd_log_freq(c);
+	amd_log_skinit(c);
 }
 
 const struct cpu_dev __initconst_cf_clobber amd_cpu_dev = {
diff --git a/xen/arch/x86/cpu/cpu.h b/xen/arch/x86/cpu/cpu.h
index 8be65e975a..5bcf118a93 100644
--- a/xen/arch/x86/cpu/cpu.h
+++ b/xen/arch/x86/cpu/cpu.h
@@ -20,6 +20,7 @@ extern bool detect_extended_topology(struct cpuinfo_x86 *c);
 
 void cf_check early_init_amd(struct cpuinfo_x86 *c);
 void amd_log_freq(const struct cpuinfo_x86 *c);
+void amd_log_skinit(const struct cpuinfo_x86 *c);
 void amd_init_lfence(struct cpuinfo_x86 *c);
 void amd_init_ssbd(const struct cpuinfo_x86 *c);
 void amd_init_spectral_chicken(void);
diff --git a/xen/arch/x86/cpu/hygon.c b/xen/arch/x86/cpu/hygon.c
index f7508cc8fc..6ebb8b5fab 100644
--- a/xen/arch/x86/cpu/hygon.c
+++ b/xen/arch/x86/cpu/hygon.c
@@ -85,6 +85,7 @@ static void cf_check init_hygon(struct cpuinfo_x86 *c)
 	}
 
 	amd_log_freq(c);
+	amd_log_skinit(c);
 }
 
 const struct cpu_dev __initconst_cf_clobber hygon_cpu_dev = {
diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c
index 6a680ba38d..618bd5540e 100644
--- a/xen/arch/x86/cpu/intel.c
+++ b/xen/arch/x86/cpu/intel.c
@@ -13,6 +13,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "cpu.h"
 
@@ -571,6 +572,47 @@ static void init_intel_perf(struct cpuinfo_x86 *c)
     }
 }
 
+/*
+ * Print out the SMX and TXT capabilties, so that dom0 can determine if the
+ * system is DRTM-capable.
+ */
+static void intel_log_smx_txt(struct cpuinfo_x86 *c)
+{
+    unsigned long cr4_val, getsec_caps;
+
+    /* Run only on BSP to report the SMX/TXT caps only once */
+    if ( smp_processor_id() )
+        return;
+
+    printk("CPU: SMX capability ");
+    if ( !test_bit(X86_FEATURE_SMX, &boot_cpu_data.x86_capability) )
+    {
+        printk("not supported\n");
+        return;
+    }
+    printk("supported\n");
+
+    /* Can't run GETSEC without VMX and SMX */
+    if ( !test_bit(X86_FEATURE_VMX, &boot_cpu_data.x86_capability) )
+        return;
+
+    cr4_val = read_cr4();
+    if ( !(cr4_val & X86_CR4_SMXE) )
+        write_cr4(cr4_val | X86_CR4_SMXE);
+
+    asm volatile ("getsec\n"
+        : "=a" (getsec_caps)
+        : "a" (GETSEC_CAPABILITIES), "b" (0) :);
+
+    if ( getsec_caps & GETSEC_CAP_TXT_CHIPSET )
+        printk("Chipset supports TXT\n");
+    else
+        printk("Chipset does not support TXT\n");
+
+    if ( !(cr4_val & X86_CR4_SMXE) )
+        write_cr4(cr4_val & ~X86_CR4_SMXE);
+}
+
 static void cf_check init_intel(struct cpuinfo_x86 *c)
 {
 	/* Detect the extended topology information if available */
@@ -585,6 +627,8 @@ static void cf_check init_intel(struct cpuinfo_x86 *c)
 		detect_ht(c);
 	}
 
+	intel_log_smx_txt(c);
+
 	/* Work around errata */
 	Intel_errata_workarounds(c);
 
diff --git a/xen/arch/x86/include/asm/intel_txt.h b/xen/arch/x86/include/asm/intel_txt.h
index af997c9da6..76ec651b11 100644
--- a/xen/arch/x86/include/asm/intel_txt.h
+++ b/xen/arch/x86/include/asm/intel_txt.h
@@ -82,6 +82,11 @@
 #define TXT_AP_BOOT_CS                  0x0030
 #define TXT_AP_BOOT_DS                  0x0038
 
+/* EAX value for GETSEC leaf functions. Intel SDM: GETSEC[CAPABILITIES] */
+#define GETSEC_CAPABILITIES             0
+/* Intel SDM: GETSEC Capability Result Encoding */
+#define GETSEC_CAP_TXT_CHIPSET          1
+
 #ifndef __ASSEMBLY__
 
 #include 
-- 
2.49.0



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From: Sergii Dmytruk 
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	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	trenchboot-devel@googlegroups.com
Subject: [PATCH 15/21] x86/boot: choose AP stack based on APIC ID
Date: Tue, 22 Apr 2025 18:06:49 +0300
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From: Krystian Hebel 

This is made as the first step of making parallel AP bring-up possible.
It should be enough for pre-C code.

Parallel AP bring-up is necessary because TXT by design releases all APs
at once. In addition to that it reduces number of IPIs (and more
importantly, delays between them) required to start all logical
processors. This results in significant reduction of boot time, even
when DRTM is not used, with performance gain growing with the number of
logical CPUs.

Signed-off-by: Krystian Hebel 
Signed-off-by: Sergii Dmytruk 
---
 xen/arch/x86/boot/head.S             |  1 +
 xen/arch/x86/boot/trampoline.S       | 21 +++++++++++++++++++++
 xen/arch/x86/boot/x86_64.S           | 28 +++++++++++++++++++++++++++-
 xen/arch/x86/include/asm/apicdef.h   |  4 ++++
 xen/arch/x86/include/asm/msr-index.h |  3 +++
 xen/arch/x86/setup.c                 |  7 +++++++
 6 files changed, 63 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/boot/head.S b/xen/arch/x86/boot/head.S
index 0b7903070a..419bf58d5c 100644
--- a/xen/arch/x86/boot/head.S
+++ b/xen/arch/x86/boot/head.S
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
diff --git a/xen/arch/x86/boot/trampoline.S b/xen/arch/x86/boot/trampoline.S
index a92e399fbe..ed593acc46 100644
--- a/xen/arch/x86/boot/trampoline.S
+++ b/xen/arch/x86/boot/trampoline.S
@@ -71,6 +71,27 @@ trampoline_protmode_entry:
         mov     $X86_CR4_PAE,%ecx
         mov     %ecx,%cr4
 
+        /*
+         * Get APIC ID while we're in non-paged mode. Start by checking if
+         * x2APIC is enabled.
+         */
+        mov     $MSR_APIC_BASE, %ecx
+        rdmsr
+        test    $APIC_BASE_EXTD, %eax
+        jnz     .Lx2apic
+
+        /* Not x2APIC, read from MMIO */
+        and     $APIC_BASE_ADDR_MASK, %eax
+        mov     APIC_ID(%eax), %esp
+        shr     $24, %esp
+        jmp     1f
+
+.Lx2apic:
+        mov     $(MSR_X2APIC_FIRST + (APIC_ID >> MSR_X2APIC_SHIFT)), %ecx
+        rdmsr
+        mov     %eax, %esp
+1:
+
         /* Load pagetable base register. */
         mov     $sym_offs(idle_pg_table),%eax
         add     bootsym_rel(trampoline_xen_phys_start,4,%eax)
diff --git a/xen/arch/x86/boot/x86_64.S b/xen/arch/x86/boot/x86_64.S
index 08ae97e261..ac33576d8f 100644
--- a/xen/arch/x86/boot/x86_64.S
+++ b/xen/arch/x86/boot/x86_64.S
@@ -15,7 +15,33 @@ ENTRY(__high_start)
         mov     $XEN_MINIMAL_CR4,%rcx
         mov     %rcx,%cr4
 
-        mov     stack_start(%rip),%rsp
+        test    %ebx,%ebx
+        cmovz   stack_start(%rip), %rsp
+        jz      .L_stack_set
+
+        /* APs only: get stack base from APIC ID saved in %esp. */
+        mov     $-1, %rax
+        lea     x86_cpu_to_apicid(%rip), %rcx
+1:
+        add     $1, %rax
+        cmp     $NR_CPUS, %eax
+        jb      2f
+        hlt
+2:
+        cmp     %esp, (%rcx, %rax, 4)
+        jne     1b
+
+        /* %eax is now Xen CPU index. */
+        lea     stack_base(%rip), %rcx
+        mov     (%rcx, %rax, 8), %rsp
+
+        test    %rsp,%rsp
+        jnz     1f
+        hlt
+1:
+        add     $(STACK_SIZE - CPUINFO_sizeof), %rsp
+
+.L_stack_set:
 
         /* Reset EFLAGS (subsumes CLI and CLD). */
         pushq   $0
diff --git a/xen/arch/x86/include/asm/apicdef.h b/xen/arch/x86/include/asm/apicdef.h
index 63dab01dde..e093a2aa3c 100644
--- a/xen/arch/x86/include/asm/apicdef.h
+++ b/xen/arch/x86/include/asm/apicdef.h
@@ -121,6 +121,10 @@
 
 #define MAX_IO_APICS 128
 
+#ifndef __ASSEMBLY__
+
 extern bool x2apic_enabled;
 
+#endif /* !__ASSEMBLY__ */
+
 #endif
diff --git a/xen/arch/x86/include/asm/msr-index.h b/xen/arch/x86/include/asm/msr-index.h
index 22d9e76e55..794cf44abe 100644
--- a/xen/arch/x86/include/asm/msr-index.h
+++ b/xen/arch/x86/include/asm/msr-index.h
@@ -169,6 +169,9 @@
 #define MSR_X2APIC_FIRST                    0x00000800
 #define MSR_X2APIC_LAST                     0x000008ff
 
+/* MSR offset can be obtained by shifting MMIO offset this number of bits to the right. */
+#define MSR_X2APIC_SHIFT                    4
+
 #define MSR_X2APIC_TPR                      0x00000808
 #define MSR_X2APIC_PPR                      0x0000080a
 #define MSR_X2APIC_EOI                      0x0000080b
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 403d976449..c6ebdc3c6b 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -2068,6 +2068,7 @@ void asmlinkage __init noreturn __start_xen(void)
      */
     if ( !pv_shim )
     {
+        /* Separate loop to make parallel AP bringup possible. */
         for_each_present_cpu ( i )
         {
             /* Set up cpu_to_node[]. */
@@ -2075,6 +2076,12 @@ void asmlinkage __init noreturn __start_xen(void)
             /* Set up node_to_cpumask based on cpu_to_node[]. */
             numa_add_cpu(i);
 
+            if ( stack_base[i] == NULL )
+                stack_base[i] = cpu_alloc_stack(i);
+        }
+
+        for_each_present_cpu ( i )
+        {
             if ( (park_offline_cpus || num_online_cpus() < max_cpus) &&
                  !cpu_online(i) )
             {
-- 
2.49.0



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Subject: [PATCH 12/21] x86/tpm.c: support extending PCRs of TPM2.0
Date: Tue, 22 Apr 2025 18:06:46 +0300
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SHA1 and SHA256 are hard-coded here, but their support by the TPM is
checked.  Addition of event log for TPM2.0 will generalize the code
further.

Signed-off-by: Sergii Dmytruk 
---
 xen/arch/x86/tpm.c | 465 +++++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 453 insertions(+), 12 deletions(-)

diff --git a/xen/arch/x86/tpm.c b/xen/arch/x86/tpm.c
index 8cf836d0df..9d20cff94e 100644
--- a/xen/arch/x86/tpm.c
+++ b/xen/arch/x86/tpm.c
@@ -5,6 +5,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -30,6 +31,15 @@ struct slr_table *slaunch_get_slrt(void)
  * other part of Xen.  Providing implementation of builtin functions in this
  * case is necessary if compiler chooses to not use an inline builtin.
  */
+void *memset(void *dest, int c, size_t n)
+{
+    uint8_t *d = dest;
+
+    while ( n-- )
+        *d++ = c;
+
+    return dest;
+}
 void *memcpy(void *dest, const void *src, size_t n)
 {
     const uint8_t *s = src;
@@ -65,6 +75,7 @@ void *memcpy(void *dest, const void *src, size_t n)
 
 #define swap16(x)       __builtin_bswap16(x)
 #define swap32(x)       __builtin_bswap32(x)
+#define memset(s, c, n) __builtin_memset(s, c, n)
 #define memcpy(d, s, n) __builtin_memcpy(d, s, n)
 
 static inline volatile uint32_t tis_read32(unsigned reg)
@@ -146,14 +157,15 @@ static inline bool is_tpm12(void)
             (tis_read32(TPM_STS_(0)) & TPM_FAMILY_MASK) == 0);
 }
 
-/****************************** TPM1.2 specific *******************************/
-#define TPM_ORD_Extend              0x00000014
-#define TPM_ORD_SHA1Start           0x000000A0
-#define TPM_ORD_SHA1Update          0x000000A1
-#define TPM_ORD_SHA1CompleteExtend  0x000000A3
+/****************************** TPM1.2 & TPM2.0 *******************************/
 
-#define TPM_TAG_RQU_COMMAND         0x00C1
-#define TPM_TAG_RSP_COMMAND         0x00C4
+/*
+ * TPM1.2 is required to support commands of up to 1101 bytes, vendors rarely
+ * go above that. Limit maximum size of block of data to be hashed to 1024.
+ *
+ * TPM2.0 should support hashing of at least 1024 bytes.
+ */
+#define MAX_HASH_BLOCK      1024
 
 /* All fields of following structs are big endian. */
 struct tpm_cmd_hdr {
@@ -168,6 +180,17 @@ struct tpm_rsp_hdr {
     uint32_t    returnCode;
 } __packed;
 
+/****************************** TPM1.2 specific *******************************/
+
+#define TPM_ORD_Extend              0x00000014
+#define TPM_ORD_SHA1Start           0x000000A0
+#define TPM_ORD_SHA1Update          0x000000A1
+#define TPM_ORD_SHA1CompleteExtend  0x000000A3
+
+#define TPM_TAG_RQU_COMMAND         0x00C1
+#define TPM_TAG_RSP_COMMAND         0x00C4
+
+/* All fields of following structs are big endian. */
 struct extend_cmd {
     struct tpm_cmd_hdr h;
     uint32_t pcrNum;
@@ -233,11 +256,6 @@ struct txt_ev_log_container_12 {
 };
 
 #ifdef __EARLY_SLAUNCH__
-/*
- * TPM1.2 is required to support commands of up to 1101 bytes, vendors rarely
- * go above that. Limit maximum size of block of data to be hashed to 1024.
- */
-#define MAX_HASH_BLOCK      1024
 #define CMD_RSP_BUF_SIZE    (sizeof(struct sha1_update_cmd) + MAX_HASH_BLOCK)
 
 union cmd_rsp {
@@ -393,6 +411,400 @@ static void *create_log_event12(struct txt_ev_log_container_12 *evt_log,
 
 /************************** end of TPM1.2 specific ****************************/
 
+/****************************** TPM2.0 specific *******************************/
+
+/*
+ * These constants are for TPM2.0 but don't have a distinct prefix to match
+ * names in the specification.
+ */
+
+#define TPM_HT_PCR   0x00
+
+#define TPM_RH_NULL  0x40000007
+#define TPM_RS_PW    0x40000009
+
+#define HR_SHIFT     24
+#define HR_PCR       (TPM_HT_PCR << HR_SHIFT)
+
+#define TPM_ST_NO_SESSIONS  0x8001
+#define TPM_ST_SESSIONS     0x8002
+
+#define TPM_ALG_SHA1        0x0004
+#define TPM_ALG_SHA256      0x000b
+#define TPM_ALG_NULL        0x0010
+
+#define TPM2_PCR_Extend                 0x00000182
+#define TPM2_PCR_HashSequenceStart      0x00000186
+#define TPM2_PCR_SequenceUpdate         0x0000015C
+#define TPM2_PCR_EventSequenceComplete  0x00000185
+
+#define PUT_BYTES(p, bytes, size)  do {  \
+        memcpy((p), (bytes), (size));    \
+        (p) += (size);                   \
+    } while ( 0 )
+
+#define PUT_16BIT(p, data) do {          \
+        *(uint16_t *)(p) = swap16(data); \
+        (p) += 2;                        \
+    } while ( 0 )
+
+/* All fields of following structs are big endian. */
+struct tpm2_session_header {
+    uint32_t handle;
+    uint16_t nonceSize;
+    uint8_t nonce[0];
+    uint8_t attrs;
+    uint16_t hmacSize;
+    uint8_t hmac[0];
+} __packed;
+
+struct tpm2_extend_cmd {
+    struct tpm_cmd_hdr h;
+    uint32_t pcrHandle;
+    uint32_t sessionHdrSize;
+    struct tpm2_session_header pcrSession;
+    uint32_t hashCount;
+    uint8_t hashes[0];
+} __packed;
+
+struct tpm2_extend_rsp {
+    struct tpm_rsp_hdr h;
+} __packed;
+
+struct tpm2_sequence_start_cmd {
+    struct tpm_cmd_hdr h;
+    uint16_t hmacSize;
+    uint8_t hmac[0];
+    uint16_t hashAlg;
+} __packed;
+
+struct tpm2_sequence_start_rsp {
+    struct tpm_rsp_hdr h;
+    uint32_t sequenceHandle;
+} __packed;
+
+struct tpm2_sequence_update_cmd {
+    struct tpm_cmd_hdr h;
+    uint32_t sequenceHandle;
+    uint32_t sessionHdrSize;
+    struct tpm2_session_header session;
+    uint16_t dataSize;
+    uint8_t data[0];
+} __packed;
+
+struct tpm2_sequence_update_rsp {
+    struct tpm_rsp_hdr h;
+} __packed;
+
+struct tpm2_sequence_complete_cmd {
+    struct tpm_cmd_hdr h;
+    uint32_t pcrHandle;
+    uint32_t sequenceHandle;
+    uint32_t sessionHdrSize;
+    struct tpm2_session_header pcrSession;
+    struct tpm2_session_header sequenceSession;
+    uint16_t dataSize;
+    uint8_t data[0];
+} __packed;
+
+struct tpm2_sequence_complete_rsp {
+    struct tpm_rsp_hdr h;
+    uint32_t paramSize;
+    uint32_t hashCount;
+    uint8_t hashes[0];
+    /*
+     * Each hash is represented as:
+     * struct {
+     *     uint16_t hashAlg;
+     *     uint8_t hash[size of hashAlg];
+     * };
+     */
+} __packed;
+
+/*
+ * These two structure are for convenience, they don't correspond to anything in
+ * any spec.
+ */
+struct tpm2_log_hash {
+    uint16_t alg;  /* TPM_ALG_* */
+    uint16_t size;
+    uint8_t *data; /* Non-owning reference to a buffer inside log entry. */
+};
+/* Should be more than enough for now and awhile in the future. */
+#define MAX_HASH_COUNT 8
+struct tpm2_log_hashes {
+    uint32_t count;
+    struct tpm2_log_hash hashes[MAX_HASH_COUNT];
+};
+
+#ifdef __EARLY_SLAUNCH__
+
+union tpm2_cmd_rsp {
+    uint8_t b[sizeof(struct tpm2_sequence_update_cmd) + MAX_HASH_BLOCK];
+    struct tpm_cmd_hdr c;
+    struct tpm_rsp_hdr r;
+    struct tpm2_sequence_start_cmd start_c;
+    struct tpm2_sequence_start_rsp start_r;
+    struct tpm2_sequence_update_cmd update_c;
+    struct tpm2_sequence_update_rsp update_r;
+    struct tpm2_sequence_complete_cmd finish_c;
+    struct tpm2_sequence_complete_rsp finish_r;
+};
+
+static uint32_t tpm2_hash_extend(unsigned loc, const uint8_t *buf,
+                                 unsigned size, unsigned pcr,
+                                 struct tpm2_log_hashes *log_hashes)
+{
+    uint32_t seq_handle;
+    unsigned max_bytes = MAX_HASH_BLOCK;
+
+    union tpm2_cmd_rsp cmd_rsp;
+    unsigned o_size;
+    unsigned i;
+    uint8_t *p;
+    uint32_t rc;
+
+    cmd_rsp.start_c = (struct tpm2_sequence_start_cmd) {
+        .h.tag = swap16(TPM_ST_NO_SESSIONS),
+        .h.paramSize = swap32(sizeof(cmd_rsp.start_c)),
+        .h.ordinal = swap32(TPM2_PCR_HashSequenceStart),
+        .hashAlg = swap16(TPM_ALG_NULL), /* Compute all supported hashes. */
+    };
+
+    request_locality(loc);
+
+    o_size = sizeof(cmd_rsp);
+    send_cmd(loc, cmd_rsp.b, swap32(cmd_rsp.c.paramSize), &o_size);
+
+    if ( cmd_rsp.r.tag == swap16(TPM_ST_NO_SESSIONS) &&
+         cmd_rsp.r.paramSize == swap32(10) )
+    {
+        rc = swap32(cmd_rsp.r.returnCode);
+        if ( rc != 0 )
+            goto error;
+    }
+
+    seq_handle = swap32(cmd_rsp.start_r.sequenceHandle);
+
+    while ( size > 64 )
+    {
+        if ( size < max_bytes )
+            max_bytes = size & ~(64 - 1);
+
+        cmd_rsp.update_c = (struct tpm2_sequence_update_cmd) {
+            .h.tag = swap16(TPM_ST_SESSIONS),
+            .h.paramSize = swap32(sizeof(cmd_rsp.update_c) + max_bytes),
+            .h.ordinal = swap32(TPM2_PCR_SequenceUpdate),
+            .sequenceHandle = swap32(seq_handle),
+            .sessionHdrSize = swap32(sizeof(struct tpm2_session_header)),
+            .session.handle = swap32(TPM_RS_PW),
+            .dataSize = swap16(max_bytes),
+        };
+
+        memcpy(cmd_rsp.update_c.data, buf, max_bytes);
+
+        o_size = sizeof(cmd_rsp);
+        send_cmd(loc, cmd_rsp.b, swap32(cmd_rsp.c.paramSize), &o_size);
+
+        if ( cmd_rsp.r.tag == swap16(TPM_ST_NO_SESSIONS) &&
+             cmd_rsp.r.paramSize == swap32(10) )
+        {
+            rc = swap32(cmd_rsp.r.returnCode);
+            if ( rc != 0 )
+                goto error;
+        }
+
+        size -= max_bytes;
+        buf += max_bytes;
+    }
+
+    cmd_rsp.finish_c = (struct tpm2_sequence_complete_cmd) {
+        .h.tag = swap16(TPM_ST_SESSIONS),
+        .h.paramSize = swap32(sizeof(cmd_rsp.finish_c) + size),
+        .h.ordinal = swap32(TPM2_PCR_EventSequenceComplete),
+        .pcrHandle = swap32(HR_PCR + pcr),
+        .sequenceHandle = swap32(seq_handle),
+        .sessionHdrSize = swap32(sizeof(struct tpm2_session_header)*2),
+        .pcrSession.handle = swap32(TPM_RS_PW),
+        .sequenceSession.handle = swap32(TPM_RS_PW),
+        .dataSize = swap16(size),
+    };
+
+    memcpy(cmd_rsp.finish_c.data, buf, size);
+
+    o_size = sizeof(cmd_rsp);
+    send_cmd(loc, cmd_rsp.b, swap32(cmd_rsp.c.paramSize), &o_size);
+
+    if ( cmd_rsp.r.tag == swap16(TPM_ST_NO_SESSIONS) &&
+         cmd_rsp.r.paramSize == swap32(10) )
+    {
+        rc = swap32(cmd_rsp.r.returnCode);
+        if ( rc != 0 )
+            goto error;
+    }
+
+    p = cmd_rsp.finish_r.hashes;
+    for ( i = 0; i < swap32(cmd_rsp.finish_r.hashCount); ++i )
+    {
+        unsigned j;
+        uint16_t hash_type;
+
+        hash_type = swap16(*(uint16_t *)p);
+        p += sizeof(uint16_t);
+
+        for ( j = 0; j < log_hashes->count; ++j )
+        {
+            struct tpm2_log_hash *hash = &log_hashes->hashes[j];
+            if ( hash->alg == hash_type )
+            {
+                memcpy(hash->data, p, hash->size);
+                p += hash->size;
+                break;
+            }
+        }
+
+        if ( j == log_hashes->count )
+            /* Can't continue parsing without knowing hash size. */
+            break;
+    }
+
+    rc = 0;
+
+error:
+    relinquish_locality(loc);
+    return rc;
+}
+
+#else
+
+union tpm2_cmd_rsp {
+    /* Enough space for multiple hashes. */
+    uint8_t b[sizeof(struct tpm2_extend_cmd) + 1024];
+    struct tpm_cmd_hdr c;
+    struct tpm_rsp_hdr r;
+    struct tpm2_extend_cmd extend_c;
+    struct tpm2_extend_rsp extend_r;
+};
+
+static uint32_t tpm20_pcr_extend(unsigned loc, uint32_t pcr_handle,
+                                 const struct tpm2_log_hashes *log_hashes)
+{
+    union tpm2_cmd_rsp cmd_rsp;
+    unsigned o_size;
+    unsigned i;
+    uint8_t *p;
+
+    cmd_rsp.extend_c = (struct tpm2_extend_cmd) {
+        .h.tag = swap16(TPM_ST_SESSIONS),
+        .h.ordinal = swap32(TPM2_PCR_Extend),
+        .pcrHandle = swap32(pcr_handle),
+        .sessionHdrSize = swap32(sizeof(struct tpm2_session_header)),
+        .pcrSession.handle = swap32(TPM_RS_PW),
+        .hashCount = swap32(log_hashes->count),
+    };
+
+    p = cmd_rsp.extend_c.hashes;
+    for ( i = 0; i < log_hashes->count; ++i )
+    {
+        const struct tpm2_log_hash *hash = &log_hashes->hashes[i];
+
+        if ( p + sizeof(uint16_t) + hash->size > &cmd_rsp.b[sizeof(cmd_rsp)] )
+        {
+            printk(XENLOG_ERR "Hit TPM message size implementation limit: %ld\n",
+                   sizeof(cmd_rsp));
+            return -1;
+        }
+
+        *(uint16_t *)p = swap16(hash->alg);
+        p += sizeof(uint16_t);
+
+        memcpy(p, hash->data, hash->size);
+        p += hash->size;
+    }
+
+    /* Fill in command size (size of the whole buffer). */
+    cmd_rsp.extend_c.h.paramSize = swap32(sizeof(cmd_rsp.extend_c) +
+                                          (p - cmd_rsp.extend_c.hashes)),
+
+    o_size = sizeof(cmd_rsp);
+    send_cmd(loc, cmd_rsp.b, swap32(cmd_rsp.c.paramSize), &o_size);
+
+    return swap32(cmd_rsp.r.returnCode);
+}
+
+static bool tpm_supports_hash(unsigned loc, const struct tpm2_log_hash *hash)
+{
+    uint32_t rc;
+    struct tpm2_log_hashes hashes = {
+        .count = 1,
+        .hashes[0] = *hash,
+    };
+
+    /*
+     * This is a valid way of checking hash support, using it to not implement
+     * TPM2_GetCapability().
+     */
+    rc = tpm20_pcr_extend(loc, /*pcr_handle=*/TPM_RH_NULL, &hashes);
+
+    return rc == 0;
+}
+
+static uint32_t tpm2_hash_extend(unsigned loc, const uint8_t *buf,
+                                 unsigned size, unsigned pcr,
+                                 const struct tpm2_log_hashes *log_hashes)
+{
+    uint32_t rc;
+    unsigned i;
+    struct tpm2_log_hashes supported_hashes = {0};
+
+    request_locality(loc);
+
+    for ( i = 0; i < log_hashes->count; ++i )
+    {
+        const struct tpm2_log_hash *hash = &log_hashes->hashes[i];
+        if ( !tpm_supports_hash(loc, hash) )
+        {
+            printk(XENLOG_WARNING "Skipped hash unsupported by TPM: %d\n",
+                   hash->alg);
+            continue;
+        }
+
+        if ( hash->alg == TPM_ALG_SHA1 )
+        {
+            sha1_hash(buf, size, hash->data);
+        }
+        else if ( hash->alg == TPM_ALG_SHA256 )
+        {
+            sha256_hash(buf, size, hash->data);
+        }
+        else
+        {
+            /* This is called "OneDigest" in TXT Software Development Guide. */
+            memset(hash->data, 0, size);
+            hash->data[0] = 1;
+        }
+
+        if ( supported_hashes.count == MAX_HASH_COUNT )
+        {
+            printk(XENLOG_ERR "Hit hash count implementation limit: %d\n",
+                   MAX_HASH_COUNT);
+            return -1;
+        }
+
+        supported_hashes.hashes[supported_hashes.count] = *hash;
+        ++supported_hashes.count;
+    }
+
+    rc = tpm20_pcr_extend(loc, HR_PCR + pcr, &supported_hashes);
+    relinquish_locality(loc);
+
+    return rc;
+}
+
+#endif /* __EARLY_SLAUNCH__ */
+
+/************************** end of TPM2.0 specific ****************************/
+
 void tpm_hash_extend(unsigned loc, unsigned pcr, const uint8_t *buf,
                      unsigned size, uint32_t type, const uint8_t *log_data,
                      unsigned log_data_size)
@@ -419,6 +831,35 @@ void tpm_hash_extend(unsigned loc, unsigned pcr, const uint8_t *buf,
         {
 #ifndef __EARLY_SLAUNCH__
             printk(XENLOG_ERR "Extending PCR%u failed\n", pcr);
+#endif
+        }
+    } else {
+        uint8_t sha1_digest[SHA1_DIGEST_SIZE];
+        uint8_t sha256_digest[SHA256_DIGEST_SIZE];
+        uint32_t rc;
+
+        struct tpm2_log_hashes log_hashes = {
+            .count = 2,
+            .hashes = {
+                {
+                    .alg = TPM_ALG_SHA1,
+                    .size = SHA1_DIGEST_SIZE,
+                    .data = sha1_digest,
+                },
+                {
+                    .alg = TPM_ALG_SHA256,
+                    .size = SHA256_DIGEST_SIZE,
+                    .data = sha256_digest,
+                },
+            },
+        };
+
+        rc = tpm2_hash_extend(loc, buf, size, pcr, &log_hashes);
+        if ( rc != 0 )
+        {
+#ifndef __EARLY_SLAUNCH__
+            printk(XENLOG_ERR "Extending PCR%u failed with TPM error: 0x%08x\n",
+                   pcr, rc);
 #endif
         }
     }
-- 
2.49.0



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Date: Tue, 22 Apr 2025 17:08:26 +0200
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Subject: Re: [PATCH v2 2/8] xen/common: dom0less: make some parts of Arm's
 CONFIG_DOM0LESS common
To: "Orzel, Michal" , xen-devel@lists.xenproject.org
Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
 Volodymyr Babchuk ,
 Andrew Cooper ,
 Anthony PERARD , Jan Beulich ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
References: 
 
 <6e0ec1f3-08e5-475f-8d66-f3814e047760@amd.com>
Content-Language: en-US
From: Oleksii Kurochko 
In-Reply-To: <6e0ec1f3-08e5-475f-8d66-f3814e047760@amd.com>

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On 4/17/25 10:08 AM, Orzel, Michal wrote:
> I'm ok with making dom0less common in principle but I don't know if we should
> keep using the word dom0less which we all know is confusing. In one of the
> maintainers call we agreed on using "predefined domUs" to denote the concept of
> starting domUs at boot in a static way. This was so that we could have a common
> name for parts that are common between dom0less and hyperlaunch, while leaving
> dom0less/hyperlaunch to denote arch specific bits. We need more opinions here.
>
> On 14/04/2025 17:56, Oleksii Kurochko wrote:
>> Move some parts of Arm's Dom0Less code to be reused by other architectures.
>> At the moment, RISC-V is going to reuse these parts.
>>
>> Move dom0less-build.h from the Arm-specific directory to asm-generic
>> as these header is expected to be the same across acrhictectures with
>> some updates: add the following declaration of construct_domU(),
>> arch_xen_domctl_createdomain() and arch_create_domus() as there are
>> some parts which are still architecture-specific.
> Why do we need arch_xen_domctl_createdomain() and arch_create_domus()?
> FWICS the latter already takes d_cfg as parameter. I think we could get away
> with just a single arch specific function called during domU creation to e.g.
> cover arch specific DT bindings.

Agree, arch_xen_domctl_createdomain() could be dropped and we can live only with
arch_create_domus(). I'll drop it.

>
> Also, if there are already functions with _domU, use it instead of _domu (i.e.
> lowercase) for consistency.

Sure, I'll align the names.

>
>> Introduce HAS_DOM0LESS to provide ability to enable generic Dom0less
>> code for an architecture.
>>
>> Relocate the CONFIG_DOM0LESS configuration to the common with adding
>> "depends on HAS_DOM0LESS" to not break builds for architectures which
>> don't support CONFIG_DOM0LESS config, especically it would be useful
>> to not provide stubs for  construct_domU(), arch_xen_domctl_createdomain()
>> and arch_create_domus() in case of *-randconfig which may set
>> CONFIG_DOM0LESS=y.
>>
>> Move is_dom0less_mode() function to the common code, as it depends on
>> boot modules that are already part of the common code.
>>
>> Move create_domUs() function to the common code with some updates:
>> - Add function arch_xen_domctl_createdomain() as structure
>>    xen_domctl_createdomain may have some arch-spicific information and
>>    initialization.
>> - Add arch_create_domus() to cover parsing of arch-specific features,
>>    for example, SVE (Scalar Vector Extension ) exists only in Arm.
>>
>> Signed-off-by: Oleksii Kurochko
>> ---
>> Changes in v2:
>>   - Convert 'depends on Arm' to 'depends on HAS_DOM0LESS' for
>>     CONFIG_DOM0LESS_BOOT.
>>   - Change 'default Arm' to 'default y' for CONFIG_DOM0LESS_BOOT as there is
>>     dependency on HAS_DOM0LESS.
>>   - Introduce HAS_DOM0LESS and enable it for Arm.
>>   - Update the commit message.
>> ---
>>   xen/arch/arm/Kconfig                      |   9 +-
>>   xen/arch/arm/dom0less-build.c             | 270 ++++++----------------
>>   xen/arch/arm/include/asm/Makefile         |   1 +
>>   xen/arch/arm/include/asm/dom0less-build.h |  32 ---
>>   xen/common/Kconfig                        |  12 +
>>   xen/common/device-tree/Makefile           |   1 +
>>   xen/common/device-tree/dom0less-build.c   | 161 +++++++++++++
>>   xen/include/asm-generic/dom0less-build.h  |  40 ++++
>>   8 files changed, 287 insertions(+), 239 deletions(-)
>>   delete mode 100644 xen/arch/arm/include/asm/dom0less-build.h
>>   create mode 100644 xen/common/device-tree/dom0less-build.c
>>   create mode 100644 xen/include/asm-generic/dom0less-build.h
>>
>> diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig
>> index 565f288331..060389c3c8 100644
>> --- a/xen/arch/arm/Kconfig
>> +++ b/xen/arch/arm/Kconfig
>> @@ -15,6 +15,7 @@ config ARM
>>   	select GENERIC_UART_INIT
>>   	select HAS_ALTERNATIVE if HAS_VMAP
>>   	select HAS_DEVICE_TREE
>> +	select HAS_DOM0LESS
>>   	select HAS_UBSAN
>>   
>>   config ARCH_DEFCONFIG
>> @@ -119,14 +120,6 @@ config GICV2
>>   	  Driver for the ARM Generic Interrupt Controller v2.
>>   	  If unsure, say Y
>>   
>> -config DOM0LESS_BOOT
>> -	bool "Dom0less boot support" if EXPERT
>> -	default y
>> -	help
>> -	  Dom0less boot support enables Xen to create and start domU guests during
>> -	  Xen boot without the need of a control domain (Dom0), which could be
>> -	  present anyway.
>> -
>>   config GICV3
>>   	bool "GICv3 driver"
>>   	depends on !NEW_VGIC
>> diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c
>> index bd15563750..7ec3f85795 100644
>> --- a/xen/arch/arm/dom0less-build.c
>> +++ b/xen/arch/arm/dom0less-build.c
>> @@ -20,38 +20,6 @@
>>   #include 
>>   #include 
>>   
>> -bool __init is_dom0less_mode(void)
>> -{
>> -    struct bootmodules *mods = &bootinfo.modules;
>> -    struct bootmodule *mod;
>> -    unsigned int i;
>> -    bool dom0found = false;
>> -    bool domUfound = false;
>> -
>> -    /* Look into the bootmodules */
>> -    for ( i = 0 ; i < mods->nr_mods ; i++ )
>> -    {
>> -        mod = &mods->module[i];
>> -        /* Find if dom0 and domU kernels are present */
>> -        if ( mod->kind == BOOTMOD_KERNEL )
>> -        {
>> -            if ( mod->domU == false )
>> -            {
>> -                dom0found = true;
>> -                break;
>> -            }
>> -            else
>> -                domUfound = true;
>> -        }
>> -    }
>> -
>> -    /*
>> -     * If there is no dom0 kernel but at least one domU, then we are in
>> -     * dom0less mode
>> -     */
>> -    return ( !dom0found && domUfound );
>> -}
>> -
>>   #ifdef CONFIG_VGICV2
>>   static int __init make_gicv2_domU_node(struct kernel_info *kinfo)
>>   {
>> @@ -869,8 +837,8 @@ static inline int domain_p2m_set_allocation(struct domain *d, uint64_t mem,
>>   }
>>   #endif /* CONFIG_ARCH_PAGING_MEMPOOL */
>>   
>> -static int __init construct_domU(struct domain *d,
>> -                                 const struct dt_device_node *node)
>> +int __init construct_domU(struct domain *d,
>> +                          const struct dt_device_node *node)
>>   {
>>       struct kernel_info kinfo = KERNEL_INFO_INIT;
>>       const char *dom0less_enhanced;
>> @@ -965,188 +933,92 @@ static int __init construct_domU(struct domain *d,
>>       return alloc_xenstore_params(&kinfo);
>>   }
>>   
>> -void __init create_domUs(void)
>> -{
>> -    struct dt_device_node *node;
>> -    const char *dom0less_iommu;
>> -    bool iommu = false;
>> -    const struct dt_device_node *cpupool_node,
>> -                                *chosen = dt_find_node_by_path("/chosen");
>> -    const char *llc_colors_str = NULL;
>> -
>> -    BUG_ON(chosen == NULL);
>> -    dt_for_each_child_node(chosen, node)
>> -    {
>> -        struct domain *d;
>> -        struct xen_domctl_createdomain d_cfg = {
>> -            .arch.gic_version = XEN_DOMCTL_CONFIG_GIC_NATIVE,
>> -            .flags = XEN_DOMCTL_CDF_hvm | XEN_DOMCTL_CDF_hap,
>> -            /*
>> -             * The default of 1023 should be sufficient for guests because
>> -             * on ARM we don't bind physical interrupts to event channels.
>> -             * The only use of the evtchn port is inter-domain communications.
>> -             * 1023 is also the default value used in libxl.
>> -             */
>> -            .max_evtchn_port = 1023,
>> -            .max_grant_frames = -1,
>> -            .max_maptrack_frames = -1,
>> -            .grant_opts = XEN_DOMCTL_GRANT_version(opt_gnttab_max_version),
>> -        };
>> -        unsigned int flags = 0U;
>> -        uint32_t val;
>> -        int rc;
>> -
>> -        if ( !dt_device_is_compatible(node, "xen,domain") )
>> -            continue;
>> -
>> -        if ( (max_init_domid + 1) >= DOMID_FIRST_RESERVED )
>> -            panic("No more domain IDs available\n");
>> -
>> -        if ( dt_find_property(node, "xen,static-mem", NULL) )
>> -        {
>> -            if ( llc_coloring_enabled )
>> -                panic("LLC coloring and static memory are incompatible\n");
>> -
>> -            flags |= CDF_staticmem;
>> -        }
>> -
>> -        if ( dt_property_read_bool(node, "direct-map") )
>> -        {
>> -            if ( !(flags & CDF_staticmem) )
>> -                panic("direct-map is not valid for domain %s without static allocation.\n",
>> -                      dt_node_name(node));
>> -
>> -            flags |= CDF_directmap;
>> -        }
>>   
>> -        if ( !dt_property_read_u32(node, "cpus", &d_cfg.max_vcpus) )
>> -            panic("Missing property 'cpus' for domain %s\n",
>> -                  dt_node_name(node));
>> -
>> -        if ( !dt_property_read_string(node, "passthrough", &dom0less_iommu) &&
>> -             !strcmp(dom0less_iommu, "enabled") )
>> -            iommu = true;
>> +struct xen_domctl_createdomain __init arch_xen_domctl_createdomain(void)
> Out of curiosity. Why by value?

Just bad design. I planned to update that in the next patch version before you noticed that
it could be droppped, at all.

But it should be safe as I expected that RVO will be used based on dissassembler:
002ccf88 :
   2ccf88:       e16d41f0        strd    r4, [sp, #-16]!
   2ccf8c:       e58db008        str     fp, [sp, #8]
   2ccf90:       e58de00c        str     lr, [sp, #12]
   2ccf94:       e28db00c        add     fp, sp, #12
   2ccf98:       e1a04000        mov     r4, r0
   2ccf9c:       e3a02048        mov     r2, #72 @ 0x48
   2ccfa0:       e3a01000        mov     r1, #0
   2ccfa4:       ebfe6da5        bl      268640 
   2ccfa8:       e30b32b4        movw    r3, #45748      @ 0xb2b4
   2ccfac:       e340302a        movt    r3, #42 @ 0x2a
   2ccfb0:       e5933000        ldr     r3, [r3]
   2ccfb4:       e203300f        and     r3, r3, #15
   2ccfb8:       e3a02003        mov     r2, #3
   2ccfbc:       e5842014        str     r2, [r4, #20]
   2ccfc0:       e30023ff        movw    r2, #1023       @ 0x3ff
   2ccfc4:       e5842020        str     r2, [r4, #32]
   2ccfc8:       e3e02000        mvn     r2, #0
   2ccfcc:       e5842024        str     r2, [r4, #36]   @ 0x24
   2ccfd0:       e5842028        str     r2, [r4, #40]   @ 0x28
   2ccfd4:       e584302c        str     r3, [r4, #44]   @ 0x2c
   2ccfd8:       e1a00004        mov     r0, r4
   2ccfdc:       e24bd00c        sub     sp, fp, #12
   2ccfe0:       e1cd40d0        ldrd    r4, [sp]
   2ccfe4:       e59db008        ldr     fp, [sp, #8]
   2ccfe8:       e28dd00c        add     sp, sp, #12
   2ccfec:       e49df004        pop     {pc}            @ (ldr pc, [sp], #4
So, basically, it is transformed to void arch_xen_domctl_createdomain(struct xen_domctl_createdomain *ret) by compiler.
If I'm not mistaken something. It was pretty long time ago when I used Arm assembly.

>
>> +{
>> +    struct xen_domctl_createdomain d_cfg = {
>> +        .arch.gic_version = XEN_DOMCTL_CONFIG_GIC_NATIVE,
>> +        .flags = XEN_DOMCTL_CDF_hvm | XEN_DOMCTL_CDF_hap,
>> +        /*
>> +            * The default of 1023 should be sufficient for guests because
>> +            * on ARM we don't bind physical interrupts to event channels.
>> +            * The only use of the evtchn port is inter-domain communications.
>> +            * 1023 is also the default value used in libxl.
>> +            */
>> +        .max_evtchn_port = 1023,
>> +        .max_grant_frames = -1,
>> +        .max_maptrack_frames = -1,
>> +        .grant_opts = XEN_DOMCTL_GRANT_version(opt_gnttab_max_version),
>> +    };
>> +
>> +    return d_cfg;
>> +}
>>   
>> -        if ( iommu_enabled &&
>> -             (iommu || dt_find_compatible_node(node, NULL,
>> -                                               "multiboot,device-tree")) )
>> -            d_cfg.flags |= XEN_DOMCTL_CDF_iommu;
>> +void __init arch_create_domus(struct dt_device_node *node,
>> +                       struct xen_domctl_createdomain *d_cfg,
>> +                       unsigned int flags)
>> +{
>> +    uint32_t val;
>>   
>> -        if ( !dt_property_read_u32(node, "nr_spis", &d_cfg.arch.nr_spis) )
>> -        {
>> -            int vpl011_virq = GUEST_VPL011_SPI;
>> -
>> -            d_cfg.arch.nr_spis = VGIC_DEF_NR_SPIS;
>> -
>> -            /*
>> -             * The VPL011 virq is GUEST_VPL011_SPI, unless direct-map is
>> -             * set, in which case it'll match the hardware.
>> -             *
>> -             * Since the domain is not yet created, we can't use
>> -             * d->arch.vpl011.irq. So the logic to find the vIRQ has to
>> -             * be hardcoded.
>> -             * The logic here shall be consistent with the one in
>> -             * domain_vpl011_init().
>> -             */
>> -            if ( flags & CDF_directmap )
>> -            {
>> -                vpl011_virq = serial_irq(SERHND_DTUART);
>> -                if ( vpl011_virq < 0 )
>> -                    panic("Error getting IRQ number for this serial port %d\n",
>> -                          SERHND_DTUART);
>> -            }
>> +    if ( !dt_property_read_u32(node, "nr_spis", &d_cfg->arch.nr_spis) )
>> +    {
>> +        int vpl011_virq = GUEST_VPL011_SPI;
>>   
>> -            /*
>> -             * vpl011 uses one emulated SPI. If vpl011 is requested, make
>> -             * sure that we allocate enough SPIs for it.
>> -             */
>> -            if ( dt_property_read_bool(node, "vpl011") )
>> -                d_cfg.arch.nr_spis = MAX(d_cfg.arch.nr_spis,
>> -                                         vpl011_virq - 32 + 1);
>> -        }
>> +        d_cfg->arch.nr_spis = VGIC_DEF_NR_SPIS;
>>   
>> -        /* Get the optional property domain-cpupool */
>> -        cpupool_node = dt_parse_phandle(node, "domain-cpupool", 0);
>> -        if ( cpupool_node )
>> +        /*
>> +         * The VPL011 virq is GUEST_VPL011_SPI, unless direct-map is
>> +         * set, in which case it'll match the hardware.
>> +         *
>> +         * Since the domain is not yet created, we can't use
>> +         * d->arch.vpl011.irq. So the logic to find the vIRQ has to
>> +         * be hardcoded.
>> +         * The logic here shall be consistent with the one in
>> +         * domain_vpl011_init().
>> +         */
>> +        if ( flags & CDF_directmap )
>>           {
>> -            int pool_id = btcpupools_get_domain_pool_id(cpupool_node);
>> -            if ( pool_id < 0 )
>> -                panic("Error getting cpupool id from domain-cpupool (%d)\n",
>> -                      pool_id);
>> -            d_cfg.cpupool_id = pool_id;
>> +            vpl011_virq = serial_irq(SERHND_DTUART);
>> +            if ( vpl011_virq < 0 )
>> +                panic("Error getting IRQ number for this serial port %d\n",
>> +                        SERHND_DTUART);
>>           }
>>   
>> -        if ( dt_property_read_u32(node, "max_grant_version", &val) )
>> -            d_cfg.grant_opts = XEN_DOMCTL_GRANT_version(val);
>> +        /*
>> +         * vpl011 uses one emulated SPI. If vpl011 is requested, make
>> +         * sure that we allocate enough SPIs for it.
>> +         */
>> +        if ( dt_property_read_bool(node, "vpl011") )
>> +            d_cfg->arch.nr_spis = MAX(d_cfg->arch.nr_spis,
>> +                                      vpl011_virq - 32 + 1);
>> +    }
>>   
>> -        if ( dt_property_read_u32(node, "max_grant_frames", &val) )
>> -        {
>> -            if ( val > INT32_MAX )
>> -                panic("max_grant_frames (%"PRIu32") overflow\n", val);
>> -            d_cfg.max_grant_frames = val;
>> -        }
>> +    if ( dt_get_property(node, "sve", &val) )
>> +    {
>> +#ifdef CONFIG_ARM64_SVE
>> +        unsigned int sve_vl_bits;
>> +        bool ret = false;
>>   
>> -        if ( dt_property_read_u32(node, "max_maptrack_frames", &val) )
>> +        if ( !val )
>>           {
>> -            if ( val > INT32_MAX )
>> -                panic("max_maptrack_frames (%"PRIu32") overflow\n", val);
>> -            d_cfg.max_maptrack_frames = val;
>> +            /* Property found with no value, means max HW VL supported */
>> +            ret = sve_domctl_vl_param(-1, &sve_vl_bits);
>>           }
>> -
>> -        if ( dt_get_property(node, "sve", &val) )
>> +        else
>>           {
>> -#ifdef CONFIG_ARM64_SVE
>> -            unsigned int sve_vl_bits;
>> -            bool ret = false;
>> -
>> -            if ( !val )
>> -            {
>> -                /* Property found with no value, means max HW VL supported */
>> -                ret = sve_domctl_vl_param(-1, &sve_vl_bits);
>> -            }
>> +            if ( dt_property_read_u32(node, "sve", &val) )
>> +                ret = sve_domctl_vl_param(val, &sve_vl_bits);
>>               else
>> -            {
>> -                if ( dt_property_read_u32(node, "sve", &val) )
>> -                    ret = sve_domctl_vl_param(val, &sve_vl_bits);
>> -                else
>> -                    panic("Error reading 'sve' property\n");
>> -            }
>> +                panic("Error reading 'sve' property\n");
>> +        }
>>   
>> -            if ( ret )
>> -                d_cfg.arch.sve_vl = sve_encode_vl(sve_vl_bits);
>> -            else
>> -                panic("SVE vector length error\n");
>> +        if ( ret )
>> +            d_cfg->arch.sve_vl = sve_encode_vl(sve_vl_bits);
>> +        else
>> +            panic("SVE vector length error\n");
>>   #else
>> -            panic("'sve' property found, but CONFIG_ARM64_SVE not selected\n");
>> +        panic("'sve' property found, but CONFIG_ARM64_SVE not selected\n");
>>   #endif
>> -        }
>> -
>> -        dt_property_read_string(node, "llc-colors", &llc_colors_str);
>> -        if ( !llc_coloring_enabled && llc_colors_str )
>> -            panic("'llc-colors' found, but LLC coloring is disabled\n");
>> -
>> -        /*
>> -         * The variable max_init_domid is initialized with zero, so here it's
>> -         * very important to use the pre-increment operator to call
>> -         * domain_create() with a domid > 0. (domid == 0 is reserved for Dom0)
>> -         */
>> -        d = domain_create(++max_init_domid, &d_cfg, flags);
>> -        if ( IS_ERR(d) )
>> -            panic("Error creating domain %s (rc = %ld)\n",
>> -                  dt_node_name(node), PTR_ERR(d));
>> -
>> -        if ( llc_coloring_enabled &&
>> -             (rc = domain_set_llc_colors_from_str(d, llc_colors_str)) )
>> -            panic("Error initializing LLC coloring for domain %s (rc = %d)\n",
>> -                  dt_node_name(node), rc);
>> -
>> -        d->is_console = true;
>> -        dt_device_set_used_by(node, d->domain_id);
>> -
>> -        rc = construct_domU(d, node);
>> -        if ( rc )
>> -            panic("Could not set up domain %s (rc = %d)\n",
>> -                  dt_node_name(node), rc);
>>       }
>>   }
>>   
>> diff --git a/xen/arch/arm/include/asm/Makefile b/xen/arch/arm/include/asm/Makefile
>> index 4a4036c951..831c914cce 100644
>> --- a/xen/arch/arm/include/asm/Makefile
>> +++ b/xen/arch/arm/include/asm/Makefile
>> @@ -1,6 +1,7 @@
>>   # SPDX-License-Identifier: GPL-2.0-only
>>   generic-y += altp2m.h
>>   generic-y += device.h
>> +generic-y += dom0less-build.h
>>   generic-y += hardirq.h
>>   generic-y += iocap.h
>>   generic-y += paging.h
>> diff --git a/xen/arch/arm/include/asm/dom0less-build.h b/xen/arch/arm/include/asm/dom0less-build.h
>> deleted file mode 100644
>> index 5864944bda..0000000000
>> --- a/xen/arch/arm/include/asm/dom0less-build.h
>> +++ /dev/null
>> @@ -1,32 +0,0 @@
>> -/* SPDX-License-Identifier: GPL-2.0-only */
>> -
>> -#ifndef __ASM_DOM0LESS_BUILD_H_
>> -#define __ASM_DOM0LESS_BUILD_H_
>> -
>> -#include 
>> -
>> -#ifdef CONFIG_DOM0LESS_BOOT
>> -
>> -void create_domUs(void);
>> -bool is_dom0less_mode(void);
>> -
>> -#else /* !CONFIG_DOM0LESS_BOOT */
>> -
>> -static inline void create_domUs(void) {}
>> -static inline bool is_dom0less_mode(void)
>> -{
>> -    return false;
>> -}
>> -
>> -#endif /* CONFIG_DOM0LESS_BOOT */
>> -
>> -#endif /* __ASM_DOM0LESS_BUILD_H_ */
>> -
>> -/*
>> - * Local variables:
>> - * mode: C
>> - * c-file-style: "BSD"
>> - * c-basic-offset: 4
>> - * indent-tabs-mode: nil
>> - * End:
>> - */
>> diff --git a/xen/common/Kconfig b/xen/common/Kconfig
>> index 06ae9751aa..2fd79aea5b 100644
>> --- a/xen/common/Kconfig
>> +++ b/xen/common/Kconfig
>> @@ -12,6 +12,15 @@ config CORE_PARKING
>>   	bool
>>   	depends on NR_CPUS > 1
>>   
>> +config DOM0LESS_BOOT
>> +	bool "Dom0less boot support" if EXPERT
>> +	depends on HAS_DOM0LESS
> You put dom0less code under device-tree, yet I don't see any of these Kconfig
> options being dependent on HAS_DEVICE_TREE. I think this is wrong.

Agree, HAS_DEVICE_TREE should be as a dependency here.

>> +#ifndef __ASM_GENERIC_DOM0LESS_BUILD_H__
>> +#define __ASM_GENERIC_DOM0LESS_BUILD_H__
>> +
>> +#include 
>> +
>> +#ifdef CONFIG_DOM0LESS_BOOT
>> +
>> +#include 
>> +
>> +void create_domUs(void);
>> +bool is_dom0less_mode(void);
>> +
>> +int construct_domU(struct domain *d, const struct dt_device_node *node);
> I don't see necessary headers included for these structs

I will use forward declarations for that.

Thanks for review.

~ Oleksii

--------------FjK0MV04SamkBxU0ZExrOsUE
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On 4/17/25 10:08 AM, Orzel, Michal
      wrote:

    

    

      
I'm ok with making dom0less common in principle but I don't know if we should
keep using the word dom0less which we all know is confusing. In one of the
maintainers call we agreed on using "predefined domUs" to denote the concept of
starting domUs at boot in a static way. This was so that we could have a common
name for parts that are common between dom0less and hyperlaunch, while leaving
dom0less/hyperlaunch to denote arch specific bits. We need more opinions here.

On 14/04/2025 17:56, Oleksii Kurochko wrote:


      

        
Move some parts of Arm's Dom0Less code to be reused by other architectures.
At the moment, RISC-V is going to reuse these parts.

Move dom0less-build.h from the Arm-specific directory to asm-generic
as these header is expected to be the same across acrhictectures with
some updates: add the following declaration of construct_domU(),
arch_xen_domctl_createdomain() and arch_create_domus() as there are
some parts which are still architecture-specific.


      

      
Why do we need arch_xen_domctl_createdomain() and arch_create_domus()?
FWICS the latter already takes d_cfg as parameter. I think we could get away
with just a single arch specific function called during domU creation to e.g.
cover arch specific DT bindings.

    

    
Agree, arch_xen_domctl_createdomain() could be dropped and we can live only with
arch_create_domus(). I'll drop it.


    

      

Also, if there are already functions with _domU, use it instead of _domu (i.e.
lowercase) for consistency.

    

    
Sure, I'll align the names.



    

      



      

        
Introduce HAS_DOM0LESS to provide ability to enable generic Dom0less
code for an architecture.

Relocate the CONFIG_DOM0LESS configuration to the common with adding
"depends on HAS_DOM0LESS" to not break builds for architectures which
don't support CONFIG_DOM0LESS config, especically it would be useful
to not provide stubs for  construct_domU(), arch_xen_domctl_createdomain()
and arch_create_domus() in case of *-randconfig which may set
CONFIG_DOM0LESS=y.

Move is_dom0less_mode() function to the common code, as it depends on
boot modules that are already part of the common code.

Move create_domUs() function to the common code with some updates:
- Add function arch_xen_domctl_createdomain() as structure
  xen_domctl_createdomain may have some arch-spicific information and
  initialization.
- Add arch_create_domus() to cover parsing of arch-specific features,
  for example, SVE (Scalar Vector Extension ) exists only in Arm.

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
Changes in v2:
 - Convert 'depends on Arm' to 'depends on HAS_DOM0LESS' for
   CONFIG_DOM0LESS_BOOT.
 - Change 'default Arm' to 'default y' for CONFIG_DOM0LESS_BOOT as there is
   dependency on HAS_DOM0LESS.
 - Introduce HAS_DOM0LESS and enable it for Arm.
 - Update the commit message.
---
 xen/arch/arm/Kconfig                      |   9 +-
 xen/arch/arm/dom0less-build.c             | 270 ++++++----------------
 xen/arch/arm/include/asm/Makefile         |   1 +
 xen/arch/arm/include/asm/dom0less-build.h |  32 ---
 xen/common/Kconfig                        |  12 +
 xen/common/device-tree/Makefile           |   1 +
 xen/common/device-tree/dom0less-build.c   | 161 +++++++++++++
 xen/include/asm-generic/dom0less-build.h  |  40 ++++
 8 files changed, 287 insertions(+), 239 deletions(-)
 delete mode 100644 xen/arch/arm/include/asm/dom0less-build.h
 create mode 100644 xen/common/device-tree/dom0less-build.c
 create mode 100644 xen/include/asm-generic/dom0less-build.h

diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig
index 565f288331..060389c3c8 100644
--- a/xen/arch/arm/Kconfig
+++ b/xen/arch/arm/Kconfig
@@ -15,6 +15,7 @@ config ARM
 	select GENERIC_UART_INIT
 	select HAS_ALTERNATIVE if HAS_VMAP
 	select HAS_DEVICE_TREE
+	select HAS_DOM0LESS
 	select HAS_UBSAN
 
 config ARCH_DEFCONFIG
@@ -119,14 +120,6 @@ config GICV2
 	  Driver for the ARM Generic Interrupt Controller v2.
 	  If unsure, say Y
 
-config DOM0LESS_BOOT
-	bool "Dom0less boot support" if EXPERT
-	default y
-	help
-	  Dom0less boot support enables Xen to create and start domU guests during
-	  Xen boot without the need of a control domain (Dom0), which could be
-	  present anyway.
-
 config GICV3
 	bool "GICv3 driver"
 	depends on !NEW_VGIC
diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c
index bd15563750..7ec3f85795 100644
--- a/xen/arch/arm/dom0less-build.c
+++ b/xen/arch/arm/dom0less-build.c
@@ -20,38 +20,6 @@
 #include <asm/static-memory.h>
 #include <asm/static-shmem.h>
 
-bool __init is_dom0less_mode(void)
-{
-    struct bootmodules *mods = &bootinfo.modules;
-    struct bootmodule *mod;
-    unsigned int i;
-    bool dom0found = false;
-    bool domUfound = false;
-
-    /* Look into the bootmodules */
-    for ( i = 0 ; i < mods->nr_mods ; i++ )
-    {
-        mod = &mods->module[i];
-        /* Find if dom0 and domU kernels are present */
-        if ( mod->kind == BOOTMOD_KERNEL )
-        {
-            if ( mod->domU == false )
-            {
-                dom0found = true;
-                break;
-            }
-            else
-                domUfound = true;
-        }
-    }
-
-    /*
-     * If there is no dom0 kernel but at least one domU, then we are in
-     * dom0less mode
-     */
-    return ( !dom0found && domUfound );
-}
-
 #ifdef CONFIG_VGICV2
 static int __init make_gicv2_domU_node(struct kernel_info *kinfo)
 {
@@ -869,8 +837,8 @@ static inline int domain_p2m_set_allocation(struct domain *d, uint64_t mem,
 }
 #endif /* CONFIG_ARCH_PAGING_MEMPOOL */
 
-static int __init construct_domU(struct domain *d,
-                                 const struct dt_device_node *node)
+int __init construct_domU(struct domain *d,
+                          const struct dt_device_node *node)
 {
     struct kernel_info kinfo = KERNEL_INFO_INIT;
     const char *dom0less_enhanced;
@@ -965,188 +933,92 @@ static int __init construct_domU(struct domain *d,
     return alloc_xenstore_params(&kinfo);
 }
 
-void __init create_domUs(void)
-{
-    struct dt_device_node *node;
-    const char *dom0less_iommu;
-    bool iommu = false;
-    const struct dt_device_node *cpupool_node,
-                                *chosen = dt_find_node_by_path("/chosen");
-    const char *llc_colors_str = NULL;
-
-    BUG_ON(chosen == NULL);
-    dt_for_each_child_node(chosen, node)
-    {
-        struct domain *d;
-        struct xen_domctl_createdomain d_cfg = {
-            .arch.gic_version = XEN_DOMCTL_CONFIG_GIC_NATIVE,
-            .flags = XEN_DOMCTL_CDF_hvm | XEN_DOMCTL_CDF_hap,
-            /*
-             * The default of 1023 should be sufficient for guests because
-             * on ARM we don't bind physical interrupts to event channels.
-             * The only use of the evtchn port is inter-domain communications.
-             * 1023 is also the default value used in libxl.
-             */
-            .max_evtchn_port = 1023,
-            .max_grant_frames = -1,
-            .max_maptrack_frames = -1,
-            .grant_opts = XEN_DOMCTL_GRANT_version(opt_gnttab_max_version),
-        };
-        unsigned int flags = 0U;
-        uint32_t val;
-        int rc;
-
-        if ( !dt_device_is_compatible(node, "xen,domain") )
-            continue;
-
-        if ( (max_init_domid + 1) >= DOMID_FIRST_RESERVED )
-            panic("No more domain IDs available\n");
-
-        if ( dt_find_property(node, "xen,static-mem", NULL) )
-        {
-            if ( llc_coloring_enabled )
-                panic("LLC coloring and static memory are incompatible\n");
-
-            flags |= CDF_staticmem;
-        }
-
-        if ( dt_property_read_bool(node, "direct-map") )
-        {
-            if ( !(flags & CDF_staticmem) )
-                panic("direct-map is not valid for domain %s without static allocation.\n",
-                      dt_node_name(node));
-
-            flags |= CDF_directmap;
-        }
 
-        if ( !dt_property_read_u32(node, "cpus", &d_cfg.max_vcpus) )
-            panic("Missing property 'cpus' for domain %s\n",
-                  dt_node_name(node));
-
-        if ( !dt_property_read_string(node, "passthrough", &dom0less_iommu) &&
-             !strcmp(dom0less_iommu, "enabled") )
-            iommu = true;
+struct xen_domctl_createdomain __init arch_xen_domctl_createdomain(void)


      

      
Out of curiosity. Why by value?

    

    
Just bad design. I planned to update that in the next patch version before you noticed that
it could be droppped, at all.

But it should be safe as I expected that RVO will be used based on dissassembler:
002ccf88 <arch_xen_domctl_createdomain>:
  2ccf88:       e16d41f0        strd    r4, [sp, #-16]!
  2ccf8c:       e58db008        str     fp, [sp, #8]
  2ccf90:       e58de00c        str     lr, [sp, #12]
  2ccf94:       e28db00c        add     fp, sp, #12
  2ccf98:       e1a04000        mov     r4, r0
  2ccf9c:       e3a02048        mov     r2, #72 @ 0x48
  2ccfa0:       e3a01000        mov     r1, #0
  2ccfa4:       ebfe6da5        bl      268640 <memset>
  2ccfa8:       e30b32b4        movw    r3, #45748      @ 0xb2b4
  2ccfac:       e340302a        movt    r3, #42 @ 0x2a
  2ccfb0:       e5933000        ldr     r3, [r3]
  2ccfb4:       e203300f        and     r3, r3, #15
  2ccfb8:       e3a02003        mov     r2, #3
  2ccfbc:       e5842014        str     r2, [r4, #20]
  2ccfc0:       e30023ff        movw    r2, #1023       @ 0x3ff
  2ccfc4:       e5842020        str     r2, [r4, #32]
  2ccfc8:       e3e02000        mvn     r2, #0
  2ccfcc:       e5842024        str     r2, [r4, #36]   @ 0x24
  2ccfd0:       e5842028        str     r2, [r4, #40]   @ 0x28
  2ccfd4:       e584302c        str     r3, [r4, #44]   @ 0x2c
  2ccfd8:       e1a00004        mov     r0, r4
  2ccfdc:       e24bd00c        sub     sp, fp, #12
  2ccfe0:       e1cd40d0        ldrd    r4, [sp]
  2ccfe4:       e59db008        ldr     fp, [sp, #8]
  2ccfe8:       e28dd00c        add     sp, sp, #12
  2ccfec:       e49df004        pop     {pc}            @ (ldr pc, [sp], #4
So, basically, it is transformed to void arch_xen_domctl_createdomain(struct xen_domctl_createdomain *ret) by compiler.
If I'm not mistaken something. It was pretty long time ago when I used Arm assembly.



    

      



      

        
+{
+    struct xen_domctl_createdomain d_cfg = {
+        .arch.gic_version = XEN_DOMCTL_CONFIG_GIC_NATIVE,
+        .flags = XEN_DOMCTL_CDF_hvm | XEN_DOMCTL_CDF_hap,
+        /*
+            * The default of 1023 should be sufficient for guests because
+            * on ARM we don't bind physical interrupts to event channels.
+            * The only use of the evtchn port is inter-domain communications.
+            * 1023 is also the default value used in libxl.
+            */
+        .max_evtchn_port = 1023,
+        .max_grant_frames = -1,
+        .max_maptrack_frames = -1,
+        .grant_opts = XEN_DOMCTL_GRANT_version(opt_gnttab_max_version),
+    };
+
+    return d_cfg;
+}
 
-        if ( iommu_enabled &&
-             (iommu || dt_find_compatible_node(node, NULL,
-                                               "multiboot,device-tree")) )
-            d_cfg.flags |= XEN_DOMCTL_CDF_iommu;
+void __init arch_create_domus(struct dt_device_node *node,
+                       struct xen_domctl_createdomain *d_cfg,
+                       unsigned int flags)
+{
+    uint32_t val;
 
-        if ( !dt_property_read_u32(node, "nr_spis", &d_cfg.arch.nr_spis) )
-        {
-            int vpl011_virq = GUEST_VPL011_SPI;
-
-            d_cfg.arch.nr_spis = VGIC_DEF_NR_SPIS;
-
-            /*
-             * The VPL011 virq is GUEST_VPL011_SPI, unless direct-map is
-             * set, in which case it'll match the hardware.
-             *
-             * Since the domain is not yet created, we can't use
-             * d->arch.vpl011.irq. So the logic to find the vIRQ has to
-             * be hardcoded.
-             * The logic here shall be consistent with the one in
-             * domain_vpl011_init().
-             */
-            if ( flags & CDF_directmap )
-            {
-                vpl011_virq = serial_irq(SERHND_DTUART);
-                if ( vpl011_virq < 0 )
-                    panic("Error getting IRQ number for this serial port %d\n",
-                          SERHND_DTUART);
-            }
+    if ( !dt_property_read_u32(node, "nr_spis", &d_cfg->arch.nr_spis) )
+    {
+        int vpl011_virq = GUEST_VPL011_SPI;
 
-            /*
-             * vpl011 uses one emulated SPI. If vpl011 is requested, make
-             * sure that we allocate enough SPIs for it.
-             */
-            if ( dt_property_read_bool(node, "vpl011") )
-                d_cfg.arch.nr_spis = MAX(d_cfg.arch.nr_spis,
-                                         vpl011_virq - 32 + 1);
-        }
+        d_cfg->arch.nr_spis = VGIC_DEF_NR_SPIS;
 
-        /* Get the optional property domain-cpupool */
-        cpupool_node = dt_parse_phandle(node, "domain-cpupool", 0);
-        if ( cpupool_node )
+        /*
+         * The VPL011 virq is GUEST_VPL011_SPI, unless direct-map is
+         * set, in which case it'll match the hardware.
+         *
+         * Since the domain is not yet created, we can't use
+         * d->arch.vpl011.irq. So the logic to find the vIRQ has to
+         * be hardcoded.
+         * The logic here shall be consistent with the one in
+         * domain_vpl011_init().
+         */
+        if ( flags & CDF_directmap )
         {
-            int pool_id = btcpupools_get_domain_pool_id(cpupool_node);
-            if ( pool_id < 0 )
-                panic("Error getting cpupool id from domain-cpupool (%d)\n",
-                      pool_id);
-            d_cfg.cpupool_id = pool_id;
+            vpl011_virq = serial_irq(SERHND_DTUART);
+            if ( vpl011_virq < 0 )
+                panic("Error getting IRQ number for this serial port %d\n",
+                        SERHND_DTUART);
         }
 
-        if ( dt_property_read_u32(node, "max_grant_version", &val) )
-            d_cfg.grant_opts = XEN_DOMCTL_GRANT_version(val);
+        /*
+         * vpl011 uses one emulated SPI. If vpl011 is requested, make
+         * sure that we allocate enough SPIs for it.
+         */
+        if ( dt_property_read_bool(node, "vpl011") )
+            d_cfg->arch.nr_spis = MAX(d_cfg->arch.nr_spis,
+                                      vpl011_virq - 32 + 1);
+    }
 
-        if ( dt_property_read_u32(node, "max_grant_frames", &val) )
-        {
-            if ( val > INT32_MAX )
-                panic("max_grant_frames (%"PRIu32") overflow\n", val);
-            d_cfg.max_grant_frames = val;
-        }
+    if ( dt_get_property(node, "sve", &val) )
+    {
+#ifdef CONFIG_ARM64_SVE
+        unsigned int sve_vl_bits;
+        bool ret = false;
 
-        if ( dt_property_read_u32(node, "max_maptrack_frames", &val) )
+        if ( !val )
         {
-            if ( val > INT32_MAX )
-                panic("max_maptrack_frames (%"PRIu32") overflow\n", val);
-            d_cfg.max_maptrack_frames = val;
+            /* Property found with no value, means max HW VL supported */
+            ret = sve_domctl_vl_param(-1, &sve_vl_bits);
         }
-
-        if ( dt_get_property(node, "sve", &val) )
+        else
         {
-#ifdef CONFIG_ARM64_SVE
-            unsigned int sve_vl_bits;
-            bool ret = false;
-
-            if ( !val )
-            {
-                /* Property found with no value, means max HW VL supported */
-                ret = sve_domctl_vl_param(-1, &sve_vl_bits);
-            }
+            if ( dt_property_read_u32(node, "sve", &val) )
+                ret = sve_domctl_vl_param(val, &sve_vl_bits);
             else
-            {
-                if ( dt_property_read_u32(node, "sve", &val) )
-                    ret = sve_domctl_vl_param(val, &sve_vl_bits);
-                else
-                    panic("Error reading 'sve' property\n");
-            }
+                panic("Error reading 'sve' property\n");
+        }
 
-            if ( ret )
-                d_cfg.arch.sve_vl = sve_encode_vl(sve_vl_bits);
-            else
-                panic("SVE vector length error\n");
+        if ( ret )
+            d_cfg->arch.sve_vl = sve_encode_vl(sve_vl_bits);
+        else
+            panic("SVE vector length error\n");
 #else
-            panic("'sve' property found, but CONFIG_ARM64_SVE not selected\n");
+        panic("'sve' property found, but CONFIG_ARM64_SVE not selected\n");
 #endif
-        }
-
-        dt_property_read_string(node, "llc-colors", &llc_colors_str);
-        if ( !llc_coloring_enabled && llc_colors_str )
-            panic("'llc-colors' found, but LLC coloring is disabled\n");
-
-        /*
-         * The variable max_init_domid is initialized with zero, so here it's
-         * very important to use the pre-increment operator to call
-         * domain_create() with a domid > 0. (domid == 0 is reserved for Dom0)
-         */
-        d = domain_create(++max_init_domid, &d_cfg, flags);
-        if ( IS_ERR(d) )
-            panic("Error creating domain %s (rc = %ld)\n",
-                  dt_node_name(node), PTR_ERR(d));
-
-        if ( llc_coloring_enabled &&
-             (rc = domain_set_llc_colors_from_str(d, llc_colors_str)) )
-            panic("Error initializing LLC coloring for domain %s (rc = %d)\n",
-                  dt_node_name(node), rc);
-
-        d->is_console = true;
-        dt_device_set_used_by(node, d->domain_id);
-
-        rc = construct_domU(d, node);
-        if ( rc )
-            panic("Could not set up domain %s (rc = %d)\n",
-                  dt_node_name(node), rc);
     }
 }
 
diff --git a/xen/arch/arm/include/asm/Makefile b/xen/arch/arm/include/asm/Makefile
index 4a4036c951..831c914cce 100644
--- a/xen/arch/arm/include/asm/Makefile
+++ b/xen/arch/arm/include/asm/Makefile
@@ -1,6 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0-only
 generic-y += altp2m.h
 generic-y += device.h
+generic-y += dom0less-build.h
 generic-y += hardirq.h
 generic-y += iocap.h
 generic-y += paging.h
diff --git a/xen/arch/arm/include/asm/dom0less-build.h b/xen/arch/arm/include/asm/dom0less-build.h
deleted file mode 100644
index 5864944bda..0000000000
--- a/xen/arch/arm/include/asm/dom0less-build.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#ifndef __ASM_DOM0LESS_BUILD_H_
-#define __ASM_DOM0LESS_BUILD_H_
-
-#include <xen/stdbool.h>
-
-#ifdef CONFIG_DOM0LESS_BOOT
-
-void create_domUs(void);
-bool is_dom0less_mode(void);
-
-#else /* !CONFIG_DOM0LESS_BOOT */
-
-static inline void create_domUs(void) {}
-static inline bool is_dom0less_mode(void)
-{
-    return false;
-}
-
-#endif /* CONFIG_DOM0LESS_BOOT */
-
-#endif /* __ASM_DOM0LESS_BUILD_H_ */
-
-/*
- * Local variables:
- * mode: C
- * c-file-style: "BSD"
- * c-basic-offset: 4
- * indent-tabs-mode: nil
- * End:
- */
diff --git a/xen/common/Kconfig b/xen/common/Kconfig
index 06ae9751aa..2fd79aea5b 100644
--- a/xen/common/Kconfig
+++ b/xen/common/Kconfig
@@ -12,6 +12,15 @@ config CORE_PARKING
 	bool
 	depends on NR_CPUS > 1
 
+config DOM0LESS_BOOT
+	bool "Dom0less boot support" if EXPERT
+	depends on HAS_DOM0LESS


      

      
You put dom0less code under device-tree, yet I don't see any of these Kconfig
options being dependent on HAS_DEVICE_TREE. I think this is wrong.

    

    
Agree, HAS_DEVICE_TREE should be as a dependency here.

    

      

        
+#ifndef __ASM_GENERIC_DOM0LESS_BUILD_H__
+#define __ASM_GENERIC_DOM0LESS_BUILD_H__
+
+#include <xen/stdbool.h>
+
+#ifdef CONFIG_DOM0LESS_BOOT
+
+#include <public/domctl.h>
+
+void create_domUs(void);
+bool is_dom0less_mode(void);
+
+int construct_domU(struct domain *d, const struct dt_device_node *node);


      

      
I don't see necessary headers included for these structs

    

    
I will use forward declarations for that.

Thanks for review.

~ Oleksii

  


--------------FjK0MV04SamkBxU0ZExrOsUE--


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	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	trenchboot-devel@googlegroups.com
Subject: [PATCH 17/21] arch/x86: process DRTM policy
Date: Tue, 22 Apr 2025 18:06:51 +0300
Message-ID: <94b9a4fe07cdc021565152b11660f891481fec41.1745172094.git.sergii.dmytruk@3mdeb.com>
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Go through entires in the DRTM policy of SLRT to hash and extend data
that they describe into corresponding PCRs.

Addresses are being zeroed on measuring platform-specific data to
prevent measurements from changing when the only thing that has changed
is an address.  Addresses can vary due to bootloader, firmware or user
doing something differently or just if GRUB gets bigger in size due to
inclusion of more modules and ends up offsetting newly allocated memory.

Signed-off-by: Krystian Hebel 
Signed-off-by: Sergii Dmytruk 
---
 xen/arch/x86/include/asm/slaunch.h |  14 ++
 xen/arch/x86/setup.c               |  15 ++
 xen/arch/x86/slaunch.c             | 213 +++++++++++++++++++++++++++++
 3 files changed, 242 insertions(+)

diff --git a/xen/arch/x86/include/asm/slaunch.h b/xen/arch/x86/include/asm/slaunch.h
index b9b50f20c6..5cfd9e95af 100644
--- a/xen/arch/x86/include/asm/slaunch.h
+++ b/xen/arch/x86/include/asm/slaunch.h
@@ -24,6 +24,8 @@
 #define DLE_EVTYPE_SLAUNCH_START   (DLE_EVTYPE_BASE + 0x103)
 #define DLE_EVTYPE_SLAUNCH_END     (DLE_EVTYPE_BASE + 0x104)
 
+struct boot_info;
+
 extern bool slaunch_active;
 
 /*
@@ -62,6 +64,18 @@ void slaunch_map_mem_regions(void);
 /* Marks regions of memory as used to avoid their corruption. */
 void slaunch_reserve_mem_regions(void);
 
+/* Measures essential parts of SLR table before making use of them. */
+void slaunch_measure_slrt(void);
+
+/*
+ * Takes measurements of DRTM policy entries except for MBI and SLRT which
+ * should have been measured by the time this is called. Also performs sanity
+ * checks of the policy and panics on failure. In particular, the function
+ * verifies that DRTM is consistent with modules obtained from MultibootInfo
+ * (MBI) and written to struct boot_info in setup.c.
+ */
+void slaunch_process_drtm_policy(const struct boot_info *bi);
+
 /*
  * This helper function is used to map memory using L2 page tables by aligning
  * mapped regions to 2MB. This way page allocator (which at this point isn't
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index c6ebdc3c6b..b62e23b29e 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -1397,6 +1397,13 @@ void asmlinkage __init noreturn __start_xen(void)
     if ( slaunch_active )
     {
         slaunch_map_mem_regions();
+
+        /*
+         * SLRT needs to be measured here because it is used by init_e820(), the
+         * rest is measured slightly below by slaunch_process_drtm_policy().
+         */
+        slaunch_measure_slrt();
+
         slaunch_reserve_mem_regions();
     }
 
@@ -1418,6 +1425,14 @@ void asmlinkage __init noreturn __start_xen(void)
     /* Create a temporary copy of the E820 map. */
     memcpy(&boot_e820, &e820, sizeof(e820));
 
+    /*
+     * Process all yet unmeasured DRTM entries after E820 initialization to not
+     * do this while memory is uncached (too slow). This must also happen before
+     * modules are relocated or used.
+     */
+    if ( slaunch_active )
+        slaunch_process_drtm_policy(bi);
+
     /* Early kexec reservation (explicit static start address). */
     nr_pages = 0;
     for ( i = 0; i < e820.nr_map; i++ )
diff --git a/xen/arch/x86/slaunch.c b/xen/arch/x86/slaunch.c
index 7b13b0a852..772971119a 100644
--- a/xen/arch/x86/slaunch.c
+++ b/xen/arch/x86/slaunch.c
@@ -9,9 +9,11 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -106,6 +108,217 @@ void __init slaunch_reserve_mem_regions(void)
     }
 }
 
+void __init slaunch_measure_slrt(void)
+{
+    struct slr_table *slrt = slaunch_get_slrt();
+
+    if ( slrt->revision == 1 )
+    {
+        /*
+         * In revision one of the SLRT, only platform-specific info table is
+         * measured.
+         */
+        struct slr_entry_intel_info tmp;
+        struct slr_entry_intel_info *entry;
+
+        entry = (struct slr_entry_intel_info *)
+            slr_next_entry_by_tag(slrt, NULL, SLR_ENTRY_INTEL_INFO);
+        if ( entry == NULL )
+            panic("SLRT is missing Intel-specific information!\n");
+
+        tmp = *entry;
+        tmp.boot_params_base = 0;
+        tmp.txt_heap = 0;
+
+        tpm_hash_extend(DRTM_LOC, DRTM_DATA_PCR, (uint8_t *)&tmp,
+                        sizeof(tmp), DLE_EVTYPE_SLAUNCH, NULL, 0);
+    }
+    else
+    {
+        /*
+         * slaunch_get_slrt() checks that the revision is valid, so we must not get
+         * here unless the code is wrong.
+         */
+        panic("Unhandled SLRT revision: %d!\n", slrt->revision);
+    }
+}
+
+static struct slr_entry_policy *__init slr_get_policy(struct slr_table *slrt)
+{
+    struct slr_entry_policy *policy;
+
+    policy = (struct slr_entry_policy *)
+        slr_next_entry_by_tag(slrt, NULL, SLR_ENTRY_DRTM_POLICY);
+    if (policy == NULL)
+        panic("SLRT is missing DRTM policy!\n");
+
+    /* XXX: are newer revisions allowed? */
+    if ( policy->revision != SLR_POLICY_REVISION )
+        panic("DRTM policy in SLRT is of unsupported revision: %#04x!\n",
+              slrt->revision);
+
+    return policy;
+}
+
+static void __init
+check_slrt_policy_entry(struct slr_policy_entry *policy_entry,
+                        int idx,
+                        struct slr_table *slrt)
+{
+    if ( policy_entry->entity_type != SLR_ET_SLRT )
+        panic("Expected DRTM policy entry #%d to describe SLRT, got %#04x!\n",
+              idx, policy_entry->entity_type);
+    if ( policy_entry->pcr != DRTM_DATA_PCR )
+        panic("SLRT was measured to PCR-%d instead of PCR-%d!\n", DRTM_DATA_PCR,
+              policy_entry->pcr);
+    if ( policy_entry->entity != (uint64_t)__pa(slrt) )
+        panic("SLRT address (%#08lx) differs from its DRTM entry (%#08lx)\n",
+              __pa(slrt), policy_entry->entity);
+}
+
+/* Returns number of policy entries that were already measured. */
+static unsigned int __init
+check_drtm_policy(struct slr_table *slrt,
+                  struct slr_entry_policy *policy,
+                  struct slr_policy_entry *policy_entry,
+                  const struct boot_info *bi)
+{
+    uint32_t i;
+    uint32_t num_mod_entries;
+
+    if ( policy->nr_entries < 2 )
+        panic("DRTM policy in SLRT contains less than 2 entries (%d)!\n",
+              policy->nr_entries);
+
+    /*
+     * MBI policy entry must be the first one, so that measuring order matches
+     * policy order.
+     */
+    if ( policy_entry[0].entity_type != SLR_ET_MULTIBOOT2_INFO )
+        panic("First entry of DRTM policy in SLRT is not MBI: %#04x!\n",
+              policy_entry[0].entity_type);
+    if ( policy_entry[0].pcr != DRTM_DATA_PCR )
+        panic("MBI was measured to %d instead of %d PCR!\n", DRTM_DATA_PCR,
+              policy_entry[0].pcr);
+
+    /* SLRT policy entry must be the second one. */
+    check_slrt_policy_entry(&policy_entry[1], 1, slrt);
+
+    for ( i = 0; i < bi->nr_modules; i++ )
+    {
+        uint16_t j;
+        const struct boot_module *mod = &bi->mods[i];
+
+        if (mod->relocated || mod->released)
+        {
+            panic("Multiboot module \"%s\" (at %d) was consumed before measurement\n",
+                  (const char *)__va(mod->cmdline_pa), i);
+        }
+
+        for ( j = 2; j < policy->nr_entries; j++ )
+        {
+            if ( policy_entry[j].entity_type != SLR_ET_MULTIBOOT2_MODULE )
+                continue;
+
+            if ( policy_entry[j].entity == mod->start &&
+                 policy_entry[j].size == mod->size )
+                break;
+        }
+
+        if ( j >= policy->nr_entries )
+        {
+            panic("Couldn't find Multiboot module \"%s\" (at %d) in DRTM of Secure Launch\n",
+                  (const char *)__va(mod->cmdline_pa), i);
+        }
+    }
+
+    num_mod_entries = 0;
+    for ( i = 0; i < policy->nr_entries; i++ )
+    {
+        if ( policy_entry[i].entity_type == SLR_ET_MULTIBOOT2_MODULE )
+            num_mod_entries++;
+    }
+
+    if ( bi->nr_modules != num_mod_entries )
+    {
+        panic("Unexpected number of Multiboot modules: %d instead of %d\n",
+              (int)bi->nr_modules, (int)num_mod_entries);
+    }
+
+    /*
+     * MBI was measured in tpm_extend_mbi().
+     * SLRT was measured in tpm_measure_slrt().
+     */
+    return 2;
+}
+
+void __init slaunch_process_drtm_policy(const struct boot_info *bi)
+{
+    struct slr_table *slrt;
+    struct slr_entry_policy *policy;
+    struct slr_policy_entry *policy_entry;
+    uint16_t i;
+    unsigned int measured;
+
+    slrt = slaunch_get_slrt();
+
+    policy = slr_get_policy(slrt);
+    policy_entry = (struct slr_policy_entry *)
+        ((uint8_t *)policy + sizeof(*policy));
+
+    measured = check_drtm_policy(slrt, policy, policy_entry, bi);
+    for ( i = 0; i < measured; i++ )
+        policy_entry[i].flags |= SLR_POLICY_FLAG_MEASURED;
+
+    for ( i = measured; i < policy->nr_entries; i++ )
+    {
+        int rc;
+        uint64_t start = policy_entry[i].entity;
+        uint64_t size = policy_entry[i].size;
+
+        /* No already measured entries are expected here. */
+        if ( policy_entry[i].flags & SLR_POLICY_FLAG_MEASURED )
+            panic("DRTM entry at %d was measured out of order!\n", i);
+
+        switch ( policy_entry[i].entity_type )
+        {
+        case SLR_ET_MULTIBOOT2_INFO:
+            panic("Duplicated MBI entry in DRTM of Secure Launch at %d\n", i);
+        case SLR_ET_SLRT:
+            panic("Duplicated SLRT entry in DRTM of Secure Launch at %d\n", i);
+
+        case SLR_ET_UNSPECIFIED:
+        case SLR_ET_BOOT_PARAMS:
+        case SLR_ET_SETUP_DATA:
+        case SLR_ET_CMDLINE:
+        case SLR_ET_UEFI_MEMMAP:
+        case SLR_ET_RAMDISK:
+        case SLR_ET_MULTIBOOT2_MODULE:
+        case SLR_ET_TXT_OS2MLE:
+            /* Measure this entry below. */
+            break;
+
+        case SLR_ET_UNUSED:
+            /* Skip this entry. */
+            continue;
+        }
+
+        if ( policy_entry[i].flags & SLR_POLICY_IMPLICIT_SIZE )
+            panic("Unexpected implicitly-sized DRTM entry of Secure Launch at %d (type %d, info: %s)\n",
+                  i, policy_entry[i].entity_type, policy_entry[i].evt_info);
+
+        rc = slaunch_map_l2(start, size);
+        BUG_ON(rc != 0);
+
+        tpm_hash_extend(DRTM_LOC, policy_entry[i].pcr, __va(start), size,
+                        DLE_EVTYPE_SLAUNCH, (uint8_t *)policy_entry[i].evt_info,
+                        strnlen(policy_entry[i].evt_info,
+                                TPM_EVENT_INFO_LENGTH));
+
+        policy_entry[i].flags |= SLR_POLICY_FLAG_MEASURED;
+    }
+}
+
 int __init slaunch_map_l2(unsigned long paddr, unsigned long size)
 {
     unsigned long aligned_paddr = paddr & ~((1ULL << L2_PAGETABLE_SHIFT) - 1);
-- 
2.49.0



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To: xen-devel@lists.xenproject.org
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	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	trenchboot-devel@googlegroups.com
Subject: [PATCH 13/21] x86/hvm: Check for VMX in SMX when slaunch active
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From: Michał Żygowski 

Check whther IA32_FEATURE_CONTROL has the proper bits enabled to run
VMX in SMX when slaunch is active.

Signed-off-by: Michał Żygowski 
---
 xen/arch/x86/hvm/vmx/vmcs.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c
index a44475ae15..ef38903775 100644
--- a/xen/arch/x86/hvm/vmx/vmcs.c
+++ b/xen/arch/x86/hvm/vmx/vmcs.c
@@ -30,6 +30,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -724,7 +725,7 @@ static int _vmx_cpu_up(bool bsp)
     bios_locked = !!(eax & IA32_FEATURE_CONTROL_LOCK);
     if ( bios_locked )
     {
-        if ( !(eax & (tboot_in_measured_env()
+        if ( !(eax & (tboot_in_measured_env() || slaunch_active
                       ? IA32_FEATURE_CONTROL_ENABLE_VMXON_INSIDE_SMX
                       : IA32_FEATURE_CONTROL_ENABLE_VMXON_OUTSIDE_SMX)) )
         {
-- 
2.49.0



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From: Sergii Dmytruk 
To: xen-devel@lists.xenproject.org
Cc: Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	trenchboot-devel@googlegroups.com
Subject: [PATCH 19/21] arch/x86: support slaunch with AMD SKINIT
Date: Tue, 22 Apr 2025 18:06:53 +0300
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This mostly involves not running Intel-specific code when on AMD.

There are only a few new AMD-specific implementation details:
 - finding SLB start and size and then mapping and reserving it in e820
 - managing offset for adding the next TPM log entry (TXT-compatible
   data prepared by SKL is stored inside of vendor data field within TCG
   header)

Signed-off-by: Krystian Hebel 
Signed-off-by: Sergii Dmytruk 
---
 xen/arch/x86/e820.c    |  2 +-
 xen/arch/x86/slaunch.c | 90 ++++++++++++++++++++++++++++++++++--------
 xen/arch/x86/tpm.c     | 68 ++++++++++++++++++++++++++++++-
 3 files changed, 141 insertions(+), 19 deletions(-)

diff --git a/xen/arch/x86/e820.c b/xen/arch/x86/e820.c
index d105d1918a..177c428883 100644
--- a/xen/arch/x86/e820.c
+++ b/xen/arch/x86/e820.c
@@ -444,7 +444,7 @@ static uint64_t __init mtrr_top_of_ram(void)
     ASSERT(paddr_bits);
     addr_mask = ((1ULL << paddr_bits) - 1) & PAGE_MASK;
 
-    if ( slaunch_active )
+    if ( slaunch_active && boot_cpu_data.x86_vendor == X86_VENDOR_INTEL )
         txt_restore_mtrrs(e820_verbose);
 
     rdmsrl(MSR_MTRRcap, mtrr_cap);
diff --git a/xen/arch/x86/slaunch.c b/xen/arch/x86/slaunch.c
index 772971119a..51a488a8e0 100644
--- a/xen/arch/x86/slaunch.c
+++ b/xen/arch/x86/slaunch.c
@@ -17,6 +17,10 @@
 #include 
 #include 
 
+/* SLB is 64k, 64k-aligned */
+#define SKINIT_SLB_SIZE   0x10000
+#define SKINIT_SLB_ALIGN  0x10000
+
 /*
  * These variables are assigned to by the code near Xen's entry point.
  * slaunch_slrt is not declared in slaunch.h to facilitate accessing the
@@ -38,6 +42,8 @@ struct slr_table *__init slaunch_get_slrt(void)
 
     if (slrt == NULL) {
         int rc;
+        bool intel_cpu = (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL);
+        uint16_t slrt_architecture = intel_cpu ? SLR_INTEL_TXT : SLR_AMD_SKINIT;
 
         slrt = __va(slaunch_slrt);
 
@@ -49,9 +55,9 @@ struct slr_table *__init slaunch_get_slrt(void)
         /* XXX: are newer revisions allowed? */
         if ( slrt->revision != SLR_TABLE_REVISION )
             panic("SLRT is of unsupported revision: %#04x!\n", slrt->revision);
-        if ( slrt->architecture != SLR_INTEL_TXT )
-            panic("SLRT is for unexpected architecture: %#04x!\n",
-                  slrt->architecture);
+        if ( slrt->architecture != slrt_architecture )
+            panic("SLRT is for unexpected architecture: %#04x != %#04x!\n",
+                  slrt->architecture, slrt_architecture);
         if ( slrt->size > slrt->max_size )
             panic("SLRT is larger than its max size: %#08x > %#08x!\n",
                   slrt->size, slrt->max_size);
@@ -66,6 +72,23 @@ struct slr_table *__init slaunch_get_slrt(void)
     return slrt;
 }
 
+static uint32_t __init get_slb_start(void)
+{
+    /*
+     * The runtime computation relies on size being a power of 2 and equal to
+     * alignment. Make sure these assumptions hold.
+     */
+    BUILD_BUG_ON(SKINIT_SLB_SIZE != SKINIT_SLB_ALIGN);
+    BUILD_BUG_ON(SKINIT_SLB_SIZE == 0);
+    BUILD_BUG_ON((SKINIT_SLB_SIZE & (SKINIT_SLB_SIZE - 1)) != 0);
+
+    /*
+     * Rounding any address within SLB down to alignment gives SLB base and
+     * SLRT is inside SLB on AMD.
+     */
+    return slaunch_slrt & ~(SKINIT_SLB_SIZE - 1);
+}
+
 void __init slaunch_map_mem_regions(void)
 {
     int rc;
@@ -76,7 +99,10 @@ void __init slaunch_map_mem_regions(void)
     BUG_ON(rc != 0);
 
     /* Vendor-specific part. */
-    txt_map_mem_regions();
+    if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL )
+        txt_map_mem_regions();
+    else if ( boot_cpu_data.x86_vendor == X86_VENDOR_AMD )
+        slaunch_map_l2(get_slb_start(), SKINIT_SLB_SIZE);
 
     find_evt_log(slaunch_get_slrt(), &evt_log_addr, &evt_log_size);
     if ( evt_log_addr != NULL )
@@ -94,7 +120,18 @@ void __init slaunch_reserve_mem_regions(void)
     uint32_t evt_log_size;
 
     /* Vendor-specific part. */
-    txt_reserve_mem_regions();
+    if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL )
+    {
+        txt_reserve_mem_regions();
+    }
+    else if ( boot_cpu_data.x86_vendor == X86_VENDOR_AMD )
+    {
+        uint64_t slb_start = get_slb_start();
+        uint64_t slb_end = slb_start + SKINIT_SLB_SIZE;
+        printk("SLAUNCH: reserving SLB (%#lx - %#lx)\n", slb_start, slb_end);
+        rc = reserve_e820_ram(&e820_raw, slb_start, slb_end);
+        BUG_ON(rc == 0);
+    }
 
     find_evt_log(slaunch_get_slrt(), &evt_log_addr, &evt_log_size);
     if ( evt_log_addr != NULL )
@@ -118,20 +155,41 @@ void __init slaunch_measure_slrt(void)
          * In revision one of the SLRT, only platform-specific info table is
          * measured.
          */
-        struct slr_entry_intel_info tmp;
-        struct slr_entry_intel_info *entry;
+        if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL )
+        {
+            struct slr_entry_intel_info tmp;
+            struct slr_entry_intel_info *entry;
+
+            entry = (struct slr_entry_intel_info *)
+                slr_next_entry_by_tag(slrt, NULL, SLR_ENTRY_INTEL_INFO);
+            if ( entry == NULL )
+                panic("SLRT is missing Intel-specific information!\n");
 
-        entry = (struct slr_entry_intel_info *)
-            slr_next_entry_by_tag(slrt, NULL, SLR_ENTRY_INTEL_INFO);
-        if ( entry == NULL )
-            panic("SLRT is missing Intel-specific information!\n");
+            tmp = *entry;
+            tmp.boot_params_base = 0;
+            tmp.txt_heap = 0;
 
-        tmp = *entry;
-        tmp.boot_params_base = 0;
-        tmp.txt_heap = 0;
+            tpm_hash_extend(DRTM_LOC, DRTM_DATA_PCR, (uint8_t *)&tmp,
+                            sizeof(tmp), DLE_EVTYPE_SLAUNCH, NULL, 0);
+        }
+        else if ( boot_cpu_data.x86_vendor == X86_VENDOR_AMD )
+        {
+            struct slr_entry_amd_info tmp;
+            struct slr_entry_amd_info *entry;
+
+            entry = (struct slr_entry_amd_info *)
+                slr_next_entry_by_tag(slrt, NULL, SLR_ENTRY_AMD_INFO);
+            if ( entry == NULL )
+                panic("SLRT is missing AMD-specific information!\n");
 
-        tpm_hash_extend(DRTM_LOC, DRTM_DATA_PCR, (uint8_t *)&tmp,
-                        sizeof(tmp), DLE_EVTYPE_SLAUNCH, NULL, 0);
+            tmp = *entry;
+            tmp.next = 0;
+            tmp.slrt_base = 0;
+            tmp.boot_params_base = 0;
+
+            tpm_hash_extend(DRTM_LOC, DRTM_DATA_PCR, (uint8_t *)&tmp,
+                            sizeof(tmp), DLE_EVTYPE_SLAUNCH, NULL, 0);
+        }
     }
     else
     {
diff --git a/xen/arch/x86/tpm.c b/xen/arch/x86/tpm.c
index c51bd9b496..8562296681 100644
--- a/xen/arch/x86/tpm.c
+++ b/xen/arch/x86/tpm.c
@@ -10,6 +10,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #ifdef __EARLY_SLAUNCH__
 
@@ -51,11 +52,31 @@ void *memcpy(void *dest, const void *src, size_t n)
     return dest;
 }
 
+static bool is_amd_cpu(void)
+{
+    /*
+     * asm/processor.h can't be included in early code, which means neither
+     * cpuid() function nor boot_cpu_data can be used here.
+     */
+    uint32_t eax, ebx, ecx, edx;
+    asm volatile ( "cpuid"
+          : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
+          : "0" (0), "c" (0) );
+    return ebx == X86_VENDOR_AMD_EBX
+        && ecx == X86_VENDOR_AMD_ECX
+        && edx == X86_VENDOR_AMD_EDX;
+}
+
 #else   /* __EARLY_SLAUNCH__ */
 
 #include 
 #include 
 
+static bool is_amd_cpu(void)
+{
+    return boot_cpu_data.x86_vendor == X86_VENDOR_AMD;
+}
+
 #endif  /* __EARLY_SLAUNCH__ */
 
 #define TPM_LOC_REG(loc, reg)   (0x1000 * (loc) + (reg))
@@ -242,6 +263,21 @@ struct TPM12_PCREvent {
     uint8_t Data[];
 };
 
+struct tpm1_spec_id_event {
+    uint32_t pcrIndex;
+    uint32_t eventType;
+    uint8_t digest[20];
+    uint32_t eventSize;
+    uint8_t signature[16];
+    uint32_t platformClass;
+    uint8_t specVersionMinor;
+    uint8_t specVersionMajor;
+    uint8_t specErrata;
+    uint8_t uintnSize;
+    uint8_t vendorInfoSize;
+    uint8_t vendorInfo[0];  /* variable number of members */
+} __packed;
+
 struct txt_ev_log_container_12 {
     char        Signature[20];      /* "TXT Event Container", null-terminated */
     uint8_t     Reserved[12];
@@ -385,6 +421,16 @@ static void *create_log_event12(struct txt_ev_log_container_12 *evt_log,
 {
     struct TPM12_PCREvent *new_entry;
 
+    if ( is_amd_cpu() )
+    {
+        /*
+         * On AMD, TXT-compatible structure is stored as vendor data of
+         * TCG-defined event log header.
+         */
+        struct tpm1_spec_id_event *spec_id = (void *)evt_log;
+        evt_log = (struct txt_ev_log_container_12 *)&spec_id->vendorInfo[0];
+    }
+
     new_entry = (void *)(((uint8_t *)evt_log) + evt_log->NextEventOffset);
 
     /*
@@ -833,11 +879,29 @@ static uint32_t tpm2_hash_extend(unsigned loc, const uint8_t *buf,
 
 #endif /* __EARLY_SLAUNCH__ */
 
-static struct heap_event_log_pointer_element2_1 *find_evt_log_ext_data(void)
+static struct heap_event_log_pointer_element2_1 *
+find_evt_log_ext_data(struct tpm2_spec_id_event *evt_log)
 {
     struct txt_os_sinit_data *os_sinit;
     struct txt_ext_data_element *ext_data;
 
+    if ( is_amd_cpu() )
+    {
+        /*
+         * Event log pointer is defined by TXT specification, but
+         * secure-kernel-loader provides a compatible structure in vendor data
+         * of the log.
+         */
+        const uint8_t *data_size =
+            (void *)&evt_log->digestSizes[evt_log->digestCount];
+
+        if ( *data_size != sizeof(struct heap_event_log_pointer_element2_1) )
+            return NULL;
+
+        /* Vendor data directly follows one-byte size. */
+        return (void *)(data_size + 1);
+    }
+
     os_sinit = txt_os_sinit_data_start(__va(read_txt_reg(TXTCR_HEAP_BASE)));
     ext_data = (void *)((uint8_t *)os_sinit + sizeof(*os_sinit));
 
@@ -871,7 +935,7 @@ create_log_event20(struct tpm2_spec_id_event *evt_log, uint32_t evt_log_size,
     unsigned i;
     uint8_t *p;
 
-    log_ext_data = find_evt_log_ext_data();
+    log_ext_data = find_evt_log_ext_data(evt_log);
     if ( log_ext_data == NULL )
         return log_hashes;
 
-- 
2.49.0



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From: Sergii Dmytruk 
To: xen-devel@lists.xenproject.org
Cc: Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	trenchboot-devel@googlegroups.com
Subject: [PATCH 14/21] x86/tpm.c: implement event log for TPM2.0
Date: Tue, 22 Apr 2025 18:06:48 +0300
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Signed-off-by: Sergii Dmytruk 
---
 xen/arch/x86/include/asm/intel_txt.h |  33 ++++++
 xen/arch/x86/tpm.c                   | 169 ++++++++++++++++++++++-----
 2 files changed, 175 insertions(+), 27 deletions(-)

diff --git a/xen/arch/x86/include/asm/intel_txt.h b/xen/arch/x86/include/asm/intel_txt.h
index 9083260cf9..0a36ef66d1 100644
--- a/xen/arch/x86/include/asm/intel_txt.h
+++ b/xen/arch/x86/include/asm/intel_txt.h
@@ -199,6 +199,39 @@ struct txt_sinit_mle_data {
     /* Ext Data Elements */
 } __packed;
 
+/* Types of extended data. */
+#define TXT_HEAP_EXTDATA_TYPE_END                    0
+#define TXT_HEAP_EXTDATA_TYPE_BIOS_SPEC_VER          1
+#define TXT_HEAP_EXTDATA_TYPE_ACM                    2
+#define TXT_HEAP_EXTDATA_TYPE_STM                    3
+#define TXT_HEAP_EXTDATA_TYPE_CUSTOM                 4
+#define TXT_HEAP_EXTDATA_TYPE_MADT                   6
+#define TXT_HEAP_EXTDATA_TYPE_EVENT_LOG_POINTER2_1   8
+#define TXT_HEAP_EXTDATA_TYPE_MCFG                   9
+#define TXT_HEAP_EXTDATA_TYPE_TPR_REQ               13
+#define TXT_HEAP_EXTDATA_TYPE_DTPR                  14
+#define TXT_HEAP_EXTDATA_TYPE_CEDT                  15
+
+/*
+ * Self-describing data structure that is used for extensions to TXT heap
+ * tables.
+ */
+struct txt_ext_data_element {
+    uint32_t type;   /* One of TXT_HEAP_EXTDATA_TYPE_*. */
+    uint32_t size;
+    uint8_t data[0]; /* size bytes. */
+} __packed;
+
+/*
+ * Extended data describing TPM 2.0 log.
+ */
+struct heap_event_log_pointer_element2_1 {
+    uint64_t physical_address;
+    uint32_t allocated_event_container_size;
+    uint32_t first_record_offset;
+    uint32_t next_record_offset;
+} __packed;
+
 /*
  * Functions to extract data from the Intel TXT Heap Memory. The layout
  * of the heap is as follows:
diff --git a/xen/arch/x86/tpm.c b/xen/arch/x86/tpm.c
index 9d20cff94e..c51bd9b496 100644
--- a/xen/arch/x86/tpm.c
+++ b/xen/arch/x86/tpm.c
@@ -537,6 +537,44 @@ struct tpm2_log_hashes {
     struct tpm2_log_hash hashes[MAX_HASH_COUNT];
 };
 
+struct tpm2_pcr_event_header {
+    uint32_t pcrIndex;
+    uint32_t eventType;
+    uint32_t digestCount;
+    uint8_t digests[0];
+    /*
+     * Each hash is represented as:
+     * struct {
+     *     uint16_t hashAlg;
+     *     uint8_t hash[size of hashAlg];
+     * };
+     */
+    /* uint32_t eventSize; */
+    /* uint8_t event[0]; */
+} __packed;
+
+struct tpm2_digest_sizes {
+    uint16_t algId;
+    uint16_t digestSize;
+} __packed;
+
+struct tpm2_spec_id_event {
+    uint32_t pcrIndex;
+    uint32_t eventType;
+    uint8_t digest[20];
+    uint32_t eventSize;
+    uint8_t signature[16];
+    uint32_t platformClass;
+    uint8_t specVersionMinor;
+    uint8_t specVersionMajor;
+    uint8_t specErrata;
+    uint8_t uintnSize;
+    uint32_t digestCount;
+    struct tpm2_digest_sizes digestSizes[0]; /* variable number of members */
+    /* uint8_t vendorInfoSize; */
+    /* uint8_t vendorInfo[vendorInfoSize]; */
+} __packed;
+
 #ifdef __EARLY_SLAUNCH__
 
 union tpm2_cmd_rsp {
@@ -770,19 +808,11 @@ static uint32_t tpm2_hash_extend(unsigned loc, const uint8_t *buf,
         }
 
         if ( hash->alg == TPM_ALG_SHA1 )
-        {
             sha1_hash(buf, size, hash->data);
-        }
         else if ( hash->alg == TPM_ALG_SHA256 )
-        {
             sha256_hash(buf, size, hash->data);
-        }
         else
-        {
-            /* This is called "OneDigest" in TXT Software Development Guide. */
-            memset(hash->data, 0, size);
-            hash->data[0] = 1;
-        }
+            /* create_log_event20() took care of initializing the digest. */;
 
         if ( supported_hashes.count == MAX_HASH_COUNT )
         {
@@ -803,6 +833,102 @@ static uint32_t tpm2_hash_extend(unsigned loc, const uint8_t *buf,
 
 #endif /* __EARLY_SLAUNCH__ */
 
+static struct heap_event_log_pointer_element2_1 *find_evt_log_ext_data(void)
+{
+    struct txt_os_sinit_data *os_sinit;
+    struct txt_ext_data_element *ext_data;
+
+    os_sinit = txt_os_sinit_data_start(__va(read_txt_reg(TXTCR_HEAP_BASE)));
+    ext_data = (void *)((uint8_t *)os_sinit + sizeof(*os_sinit));
+
+    /*
+     * Find TXT_HEAP_EXTDATA_TYPE_EVENT_LOG_POINTER2_1 which is necessary to
+     * know where to put the next entry.
+     */
+    while ( ext_data->type != TXT_HEAP_EXTDATA_TYPE_END )
+    {
+        if ( ext_data->type == TXT_HEAP_EXTDATA_TYPE_EVENT_LOG_POINTER2_1 )
+            break;
+        ext_data = (void *)&ext_data->data[ext_data->size];
+    }
+
+    if ( ext_data->type == TXT_HEAP_EXTDATA_TYPE_END )
+        return NULL;
+
+    return (void *)&ext_data->data[0];
+}
+
+static struct tpm2_log_hashes
+create_log_event20(struct tpm2_spec_id_event *evt_log, uint32_t evt_log_size,
+                   uint32_t pcr, uint32_t type, const uint8_t *data,
+                   unsigned data_size)
+{
+    struct tpm2_log_hashes log_hashes = {0};
+
+    struct heap_event_log_pointer_element2_1 *log_ext_data;
+    struct tpm2_pcr_event_header *new_entry;
+    uint32_t entry_size;
+    unsigned i;
+    uint8_t *p;
+
+    log_ext_data = find_evt_log_ext_data();
+    if ( log_ext_data == NULL )
+        return log_hashes;
+
+    entry_size = sizeof(*new_entry);
+    for ( i = 0; i < evt_log->digestCount; ++i )
+    {
+        entry_size += sizeof(uint16_t); /* hash type */
+        entry_size += evt_log->digestSizes[i].digestSize;
+    }
+    entry_size += sizeof(uint32_t); /* data size field */
+    entry_size += data_size;
+
+    /*
+     * Check if there is enough space left for new entry.
+     * Note: it is possible to introduce a gap in event log if entry with big
+     * data_size is followed by another entry with smaller data. Maybe we should
+     * cap the event log size in such case?
+     */
+    if ( log_ext_data->next_record_offset + entry_size > evt_log_size )
+        return log_hashes;
+
+    new_entry = (void *)((uint8_t *)evt_log + log_ext_data->next_record_offset);
+    log_ext_data->next_record_offset += entry_size;
+
+    new_entry->pcrIndex = pcr;
+    new_entry->eventType = type;
+    new_entry->digestCount = evt_log->digestCount;
+
+    p = &new_entry->digests[0];
+    for ( i = 0; i < evt_log->digestCount; ++i )
+    {
+        uint16_t alg = evt_log->digestSizes[i].algId;
+        uint16_t size = evt_log->digestSizes[i].digestSize;
+
+        *(uint16_t *)p = alg;
+        p += sizeof(uint16_t);
+
+        log_hashes.hashes[i].alg = alg;
+        log_hashes.hashes[i].size = size;
+        log_hashes.hashes[i].data = p;
+        p += size;
+
+        /* This is called "OneDigest" in TXT Software Development Guide. */
+        memset(log_hashes.hashes[i].data, 0, size);
+        log_hashes.hashes[i].data[0] = 1;
+    }
+    log_hashes.count = evt_log->digestCount;
+
+    *(uint32_t *)p = data_size;
+    p += sizeof(uint32_t);
+
+    if ( data && data_size > 0 )
+        memcpy(p, data, data_size);
+
+    return log_hashes;
+}
+
 /************************** end of TPM2.0 specific ****************************/
 
 void tpm_hash_extend(unsigned loc, unsigned pcr, const uint8_t *buf,
@@ -833,26 +959,15 @@ void tpm_hash_extend(unsigned loc, unsigned pcr, const uint8_t *buf,
             printk(XENLOG_ERR "Extending PCR%u failed\n", pcr);
 #endif
         }
-    } else {
-        uint8_t sha1_digest[SHA1_DIGEST_SIZE];
-        uint8_t sha256_digest[SHA256_DIGEST_SIZE];
+    }
+    else
+    {
         uint32_t rc;
 
-        struct tpm2_log_hashes log_hashes = {
-            .count = 2,
-            .hashes = {
-                {
-                    .alg = TPM_ALG_SHA1,
-                    .size = SHA1_DIGEST_SIZE,
-                    .data = sha1_digest,
-                },
-                {
-                    .alg = TPM_ALG_SHA256,
-                    .size = SHA256_DIGEST_SIZE,
-                    .data = sha256_digest,
-                },
-            },
-        };
+        struct tpm2_spec_id_event *evt_log = evt_log_addr;
+        struct tpm2_log_hashes log_hashes =
+            create_log_event20(evt_log, evt_log_size, pcr, type, log_data,
+                               log_data_size);
 
         rc = tpm2_hash_extend(loc, buf, size, pcr, &log_hashes);
         if ( rc != 0 )
-- 
2.49.0



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	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	trenchboot-devel@googlegroups.com
Subject: [PATCH 11/21] x86/tpm.c: code for early hashing and extending PCRs (for TPM1.2)
Date: Tue, 22 Apr 2025 18:06:45 +0300
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From: Krystian Hebel 

This file is built twice: for early 32b mode without paging to measure
MBI and for 64b code to measure dom0 kernel and initramfs. Since MBI
is small, the first case uses TPM to do the hashing. Kernel and
initramfs on the other hand are too big, sending them to the TPM would
take multiple minutes.

Signed-off-by: Krystian Hebel 
Signed-off-by: Sergii Dmytruk 
---
 xen/arch/x86/Makefile              |   1 +
 xen/arch/x86/boot/Makefile         |   7 +-
 xen/arch/x86/boot/head.S           |   3 +
 xen/arch/x86/include/asm/slaunch.h |  14 +
 xen/arch/x86/include/asm/tpm.h     |  19 ++
 xen/arch/x86/slaunch.c             |   7 +-
 xen/arch/x86/tpm.c                 | 437 +++++++++++++++++++++++++++++
 7 files changed, 486 insertions(+), 2 deletions(-)
 create mode 100644 xen/arch/x86/include/asm/tpm.h
 create mode 100644 xen/arch/x86/tpm.c

diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
index cae548f7e9..7d1027a50f 100644
--- a/xen/arch/x86/Makefile
+++ b/xen/arch/x86/Makefile
@@ -67,6 +67,7 @@ obj-y += spec_ctrl.o
 obj-y += srat.o
 obj-y += string.o
 obj-y += time.o
+obj-y += tpm.o
 obj-y += traps-setup.o
 obj-y += traps.o
 obj-$(CONFIG_INTEL) += tsx.o
diff --git a/xen/arch/x86/boot/Makefile b/xen/arch/x86/boot/Makefile
index d0015f7d19..ab37ab1fb7 100644
--- a/xen/arch/x86/boot/Makefile
+++ b/xen/arch/x86/boot/Makefile
@@ -6,6 +6,7 @@ obj32 := cmdline.32.o
 obj32 += reloc.32.o
 obj32 += reloc-trampoline.32.o
 obj32 += slaunch_early.32.o
+obj32 += tpm_early.32.o
 
 obj64 := reloc-trampoline.o
 
@@ -31,6 +32,10 @@ $(obj)/%.32.o: $(src)/%.c FORCE
 
 $(obj)/slaunch_early.32.o: XEN_CFLAGS += -D__EARLY_SLAUNCH__
 
+$(obj)/tpm_early.32.o: XEN_CFLAGS += -D__EARLY_SLAUNCH__
+$(obj)/tpm_early.32.o: $(src)/../tpm.c FORCE
+	$(call if_changed_rule,cc_o_c)
+
 orphan-handling-$(call ld-option,--orphan-handling=error) := --orphan-handling=error
 LDFLAGS_DIRECT-$(call ld-option,--warn-rwx-segments) := --no-warn-rwx-segments
 LDFLAGS_DIRECT += $(LDFLAGS_DIRECT-y)
@@ -84,7 +89,7 @@ cmd_combine = \
               --bin1      $(obj)/built-in-32.base.bin \
               --bin2      $(obj)/built-in-32.offset.bin \
               --map       $(obj)/built-in-32.base.map \
-              --exports   cmdline_parse_early,reloc,reloc_trampoline32,slaunch_early_init \
+              --exports   cmdline_parse_early,reloc,reloc_trampoline32,slaunch_early_init,tpm_extend_mbi \
               --output    $@
 
 targets += built-in-32.S
diff --git a/xen/arch/x86/boot/head.S b/xen/arch/x86/boot/head.S
index e522a36305..0b7903070a 100644
--- a/xen/arch/x86/boot/head.S
+++ b/xen/arch/x86/boot/head.S
@@ -527,6 +527,9 @@ __start:
         /* Store MBI address in EBX where MB2 code expects it. */
         mov     %eax, %ebx
 
+        /* tpm_extend_mbi(mbi/eax, slrt/edx) using fastcall. */
+        call    tpm_extend_mbi
+
         /* Move magic number expected by Multiboot 2 to EAX and fall through. */
         movl    $MULTIBOOT2_BOOTLOADER_MAGIC, %eax
 
diff --git a/xen/arch/x86/include/asm/slaunch.h b/xen/arch/x86/include/asm/slaunch.h
index 78d3c8bf37..b9b50f20c6 100644
--- a/xen/arch/x86/include/asm/slaunch.h
+++ b/xen/arch/x86/include/asm/slaunch.h
@@ -10,6 +10,20 @@
 #include 
 #include 
 
+#define DRTM_LOC                   2
+#define DRTM_CODE_PCR              17
+#define DRTM_DATA_PCR              18
+
+/*
+ * Secure Launch event log entry types. The TXT specification defines the base
+ * event value as 0x400 for DRTM values, use it regardless of the DRTM for
+ * consistency.
+ */
+#define DLE_EVTYPE_BASE            0x400
+#define DLE_EVTYPE_SLAUNCH         (DLE_EVTYPE_BASE + 0x102)
+#define DLE_EVTYPE_SLAUNCH_START   (DLE_EVTYPE_BASE + 0x103)
+#define DLE_EVTYPE_SLAUNCH_END     (DLE_EVTYPE_BASE + 0x104)
+
 extern bool slaunch_active;
 
 /*
diff --git a/xen/arch/x86/include/asm/tpm.h b/xen/arch/x86/include/asm/tpm.h
new file mode 100644
index 0000000000..d46eba673c
--- /dev/null
+++ b/xen/arch/x86/include/asm/tpm.h
@@ -0,0 +1,19 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * Copyright (c) 2022-2025 3mdeb Sp. z o.o. All rights reserved.
+ */
+
+#ifndef _ASM_X86_TPM_H_
+#define _ASM_X86_TPM_H_
+
+#include 
+
+#define TPM_TIS_BASE  0xFED40000
+#define TPM_TIS_SIZE  0x00010000
+
+void tpm_hash_extend(unsigned loc, unsigned pcr, const uint8_t *buf,
+                     unsigned size, uint32_t type, const uint8_t *log_data,
+                     unsigned log_data_size);
+
+#endif /* _ASM_X86_TPM_H_ */
diff --git a/xen/arch/x86/slaunch.c b/xen/arch/x86/slaunch.c
index 20e277cc5c..7b13b0a852 100644
--- a/xen/arch/x86/slaunch.c
+++ b/xen/arch/x86/slaunch.c
@@ -13,6 +13,7 @@
 #include 
 #include 
 #include 
+#include 
 
 /*
  * These variables are assigned to by the code near Xen's entry point.
@@ -65,16 +66,20 @@ struct slr_table *__init slaunch_get_slrt(void)
 
 void __init slaunch_map_mem_regions(void)
 {
+    int rc;
     void *evt_log_addr;
     uint32_t evt_log_size;
 
+    rc = slaunch_map_l2(TPM_TIS_BASE, TPM_TIS_SIZE);
+    BUG_ON(rc != 0);
+
     /* Vendor-specific part. */
     txt_map_mem_regions();
 
     find_evt_log(slaunch_get_slrt(), &evt_log_addr, &evt_log_size);
     if ( evt_log_addr != NULL )
     {
-        int rc = slaunch_map_l2((uintptr_t)evt_log_addr, evt_log_size);
+        rc = slaunch_map_l2((uintptr_t)evt_log_addr, evt_log_size);
         BUG_ON(rc != 0);
     }
 }
diff --git a/xen/arch/x86/tpm.c b/xen/arch/x86/tpm.c
new file mode 100644
index 0000000000..8cf836d0df
--- /dev/null
+++ b/xen/arch/x86/tpm.c
@@ -0,0 +1,437 @@
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * Copyright (c) 2022-2025 3mdeb Sp. z o.o. All rights reserved.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#ifdef __EARLY_SLAUNCH__
+
+#ifdef __va
+#error "__va defined in non-paged mode!"
+#endif
+
+#define __va(x)     _p(x)
+
+/* Implementation of slaunch_get_slrt() for early TPM code. */
+static uint32_t slrt_location;
+struct slr_table *slaunch_get_slrt(void)
+{
+    return __va(slrt_location);
+}
+
+/*
+ * The code is being compiled as a standalone binary without linking to any
+ * other part of Xen.  Providing implementation of builtin functions in this
+ * case is necessary if compiler chooses to not use an inline builtin.
+ */
+void *memcpy(void *dest, const void *src, size_t n)
+{
+    const uint8_t *s = src;
+    uint8_t *d = dest;
+
+    while ( n-- )
+        *d++ = *s++;
+
+    return dest;
+}
+
+#else   /* __EARLY_SLAUNCH__ */
+
+#include 
+#include 
+
+#endif  /* __EARLY_SLAUNCH__ */
+
+#define TPM_LOC_REG(loc, reg)   (0x1000 * (loc) + (reg))
+
+#define TPM_ACCESS_(x)          TPM_LOC_REG(x, 0x00)
+#define ACCESS_REQUEST_USE       (1 << 1)
+#define ACCESS_ACTIVE_LOCALITY   (1 << 5)
+#define TPM_INTF_CAPABILITY_(x) TPM_LOC_REG(x, 0x14)
+#define INTF_VERSION_MASK        0x70000000
+#define TPM_STS_(x)             TPM_LOC_REG(x, 0x18)
+#define TPM_FAMILY_MASK          0x0C000000
+#define STS_DATA_AVAIL           (1 << 4)
+#define STS_TPM_GO               (1 << 5)
+#define STS_COMMAND_READY        (1 << 6)
+#define STS_VALID                (1 << 7)
+#define TPM_DATA_FIFO_(x)       TPM_LOC_REG(x, 0x24)
+
+#define swap16(x)       __builtin_bswap16(x)
+#define swap32(x)       __builtin_bswap32(x)
+#define memcpy(d, s, n) __builtin_memcpy(d, s, n)
+
+static inline volatile uint32_t tis_read32(unsigned reg)
+{
+    return *(volatile uint32_t *)__va(TPM_TIS_BASE + reg);
+}
+
+static inline volatile uint8_t tis_read8(unsigned reg)
+{
+    return *(volatile uint8_t *)__va(TPM_TIS_BASE + reg);
+}
+
+static inline void tis_write8(unsigned reg, uint8_t val)
+{
+    *(volatile uint8_t *)__va(TPM_TIS_BASE + reg) = val;
+}
+
+static inline void request_locality(unsigned loc)
+{
+    tis_write8(TPM_ACCESS_(loc), ACCESS_REQUEST_USE);
+    /* Check that locality was actually activated. */
+    while ( (tis_read8(TPM_ACCESS_(loc)) & ACCESS_ACTIVE_LOCALITY) == 0 );
+}
+
+static inline void relinquish_locality(unsigned loc)
+{
+    tis_write8(TPM_ACCESS_(loc), ACCESS_ACTIVE_LOCALITY);
+}
+
+static void send_cmd(unsigned loc, uint8_t *buf, unsigned i_size,
+                     unsigned *o_size)
+{
+    /*
+     * Value of "data available" bit counts only when "valid" field is set as
+     * well.
+     */
+    const unsigned data_avail = STS_VALID | STS_DATA_AVAIL;
+
+    unsigned i;
+
+    /* Make sure TPM can accept a command. */
+    if ( (tis_read8(TPM_STS_(loc)) & STS_COMMAND_READY) == 0 )
+    {
+        /* Abort current command. */
+        tis_write8(TPM_STS_(loc), STS_COMMAND_READY);
+        /* Wait until TPM is ready for a new one. */
+        while ( (tis_read8(TPM_STS_(loc)) & STS_COMMAND_READY) == 0 );
+    }
+
+    for ( i = 0; i < i_size; i++ )
+        tis_write8(TPM_DATA_FIFO_(loc), buf[i]);
+
+    tis_write8(TPM_STS_(loc), STS_TPM_GO);
+
+    /* Wait for the first byte of response. */
+    while ( (tis_read8(TPM_STS_(loc)) & data_avail) != data_avail);
+
+    for ( i = 0; i < *o_size && tis_read8(TPM_STS_(loc)) & data_avail; i++ )
+        buf[i] = tis_read8(TPM_DATA_FIFO_(loc));
+
+    if ( i < *o_size )
+        *o_size = i;
+
+    tis_write8(TPM_STS_(loc), STS_COMMAND_READY);
+}
+
+static inline bool is_tpm12(void)
+{
+    /*
+     * If one of these conditions is true:
+     *  - INTF_CAPABILITY_x.interfaceVersion is 0 (TIS <= 1.21)
+     *  - INTF_CAPABILITY_x.interfaceVersion is 2 (TIS == 1.3)
+     *  - STS_x.tpmFamily is 0
+     * we're dealing with TPM1.2.
+     */
+    uint32_t intf_version = tis_read32(TPM_INTF_CAPABILITY_(0))
+                          & INTF_VERSION_MASK;
+    return (intf_version == 0x00000000 || intf_version == 0x20000000 ||
+            (tis_read32(TPM_STS_(0)) & TPM_FAMILY_MASK) == 0);
+}
+
+/****************************** TPM1.2 specific *******************************/
+#define TPM_ORD_Extend              0x00000014
+#define TPM_ORD_SHA1Start           0x000000A0
+#define TPM_ORD_SHA1Update          0x000000A1
+#define TPM_ORD_SHA1CompleteExtend  0x000000A3
+
+#define TPM_TAG_RQU_COMMAND         0x00C1
+#define TPM_TAG_RSP_COMMAND         0x00C4
+
+/* All fields of following structs are big endian. */
+struct tpm_cmd_hdr {
+    uint16_t    tag;
+    uint32_t    paramSize;
+    uint32_t    ordinal;
+} __packed;
+
+struct tpm_rsp_hdr {
+    uint16_t    tag;
+    uint32_t    paramSize;
+    uint32_t    returnCode;
+} __packed;
+
+struct extend_cmd {
+    struct tpm_cmd_hdr h;
+    uint32_t pcrNum;
+    uint8_t inDigest[SHA1_DIGEST_SIZE];
+} __packed;
+
+struct extend_rsp {
+    struct tpm_rsp_hdr h;
+    uint8_t outDigest[SHA1_DIGEST_SIZE];
+} __packed;
+
+struct sha1_start_cmd {
+    struct tpm_cmd_hdr h;
+} __packed;
+
+struct sha1_start_rsp {
+    struct tpm_rsp_hdr h;
+    uint32_t maxNumBytes;
+} __packed;
+
+struct sha1_update_cmd {
+    struct tpm_cmd_hdr h;
+    uint32_t numBytes;          /* Must be a multiple of 64 */
+    uint8_t hashData[];
+} __packed;
+
+struct sha1_update_rsp {
+    struct tpm_rsp_hdr h;
+} __packed;
+
+struct sha1_complete_extend_cmd {
+    struct tpm_cmd_hdr h;
+    uint32_t pcrNum;
+    uint32_t hashDataSize;      /* 0-64, inclusive */
+    uint8_t hashData[];
+} __packed;
+
+struct sha1_complete_extend_rsp {
+    struct tpm_rsp_hdr h;
+    uint8_t hashValue[SHA1_DIGEST_SIZE];
+    uint8_t outDigest[SHA1_DIGEST_SIZE];
+} __packed;
+
+struct TPM12_PCREvent {
+    uint32_t PCRIndex;
+    uint32_t Type;
+    uint8_t Digest[SHA1_DIGEST_SIZE];
+    uint32_t Size;
+    uint8_t Data[];
+};
+
+struct txt_ev_log_container_12 {
+    char        Signature[20];      /* "TXT Event Container", null-terminated */
+    uint8_t     Reserved[12];
+    uint8_t     ContainerVerMajor;
+    uint8_t     ContainerVerMinor;
+    uint8_t     PCREventVerMajor;
+    uint8_t     PCREventVerMinor;
+    uint32_t    ContainerSize;      /* Allocated size */
+    uint32_t    PCREventsOffset;
+    uint32_t    NextEventOffset;
+    struct TPM12_PCREvent   PCREvents[];
+};
+
+#ifdef __EARLY_SLAUNCH__
+/*
+ * TPM1.2 is required to support commands of up to 1101 bytes, vendors rarely
+ * go above that. Limit maximum size of block of data to be hashed to 1024.
+ */
+#define MAX_HASH_BLOCK      1024
+#define CMD_RSP_BUF_SIZE    (sizeof(struct sha1_update_cmd) + MAX_HASH_BLOCK)
+
+union cmd_rsp {
+    struct sha1_start_cmd start_c;
+    struct sha1_start_rsp start_r;
+    struct sha1_update_cmd update_c;
+    struct sha1_update_rsp update_r;
+    struct sha1_complete_extend_cmd finish_c;
+    struct sha1_complete_extend_rsp finish_r;
+    uint8_t buf[CMD_RSP_BUF_SIZE];
+};
+
+/* Returns true on success. */
+static bool tpm12_hash_extend(unsigned loc, const uint8_t *buf, unsigned size,
+                              unsigned pcr, uint8_t *out_digest)
+{
+    union cmd_rsp cmd_rsp;
+    unsigned max_bytes = MAX_HASH_BLOCK;
+    unsigned o_size = sizeof(cmd_rsp);
+    bool success = false;
+
+    request_locality(loc);
+
+    cmd_rsp.start_c = (struct sha1_start_cmd) {
+        .h.tag = swap16(TPM_TAG_RQU_COMMAND),
+        .h.paramSize = swap32(sizeof(struct sha1_start_cmd)),
+        .h.ordinal = swap32(TPM_ORD_SHA1Start),
+    };
+
+    send_cmd(loc, cmd_rsp.buf, sizeof(struct sha1_start_cmd), &o_size);
+    if ( o_size < sizeof(struct sha1_start_rsp) )
+        goto error;
+
+    if ( max_bytes > swap32(cmd_rsp.start_r.maxNumBytes) )
+        max_bytes = swap32(cmd_rsp.start_r.maxNumBytes);
+
+    while ( size > 64 )
+    {
+        if ( size < max_bytes )
+            max_bytes = size & ~(64 - 1);
+
+        o_size = sizeof(cmd_rsp);
+
+        cmd_rsp.update_c = (struct sha1_update_cmd){
+            .h.tag = swap16(TPM_TAG_RQU_COMMAND),
+            .h.paramSize = swap32(sizeof(struct sha1_update_cmd) + max_bytes),
+            .h.ordinal = swap32(TPM_ORD_SHA1Update),
+            .numBytes = swap32(max_bytes),
+        };
+        memcpy(cmd_rsp.update_c.hashData, buf, max_bytes);
+
+        send_cmd(loc, cmd_rsp.buf, sizeof(struct sha1_update_cmd) + max_bytes,
+                 &o_size);
+        if ( o_size < sizeof(struct sha1_update_rsp) )
+            goto error;
+
+        size -= max_bytes;
+        buf += max_bytes;
+    }
+
+    o_size = sizeof(cmd_rsp);
+
+    cmd_rsp.finish_c = (struct sha1_complete_extend_cmd) {
+        .h.tag = swap16(TPM_TAG_RQU_COMMAND),
+        .h.paramSize = swap32(sizeof(struct sha1_complete_extend_cmd) + size),
+        .h.ordinal = swap32(TPM_ORD_SHA1CompleteExtend),
+        .pcrNum = swap32(pcr),
+        .hashDataSize = swap32(size),
+    };
+    memcpy(cmd_rsp.finish_c.hashData, buf, size);
+
+    send_cmd(loc, cmd_rsp.buf, sizeof(struct sha1_complete_extend_cmd) + size,
+             &o_size);
+    if ( o_size < sizeof(struct sha1_complete_extend_rsp) )
+        goto error;
+
+    if ( out_digest != NULL )
+        memcpy(out_digest, cmd_rsp.finish_r.hashValue, SHA1_DIGEST_SIZE);
+
+    success = true;
+
+error:
+    relinquish_locality(loc);
+    return success;
+}
+
+#else
+
+union cmd_rsp {
+    struct extend_cmd extend_c;
+    struct extend_rsp extend_r;
+};
+
+/* Returns true on success. */
+static bool tpm12_hash_extend(unsigned loc, const uint8_t *buf, unsigned size,
+                              unsigned pcr, uint8_t *out_digest)
+{
+    union cmd_rsp cmd_rsp;
+    unsigned o_size = sizeof(cmd_rsp);
+
+    sha1_hash(buf, size, out_digest);
+
+    request_locality(loc);
+
+    cmd_rsp.extend_c = (struct extend_cmd) {
+        .h.tag = swap16(TPM_TAG_RQU_COMMAND),
+        .h.paramSize = swap32(sizeof(struct extend_cmd)),
+        .h.ordinal = swap32(TPM_ORD_Extend),
+        .pcrNum = swap32(pcr),
+    };
+
+    memcpy(cmd_rsp.extend_c.inDigest, out_digest, SHA1_DIGEST_SIZE);
+
+    send_cmd(loc, (uint8_t *)&cmd_rsp, sizeof(struct extend_cmd), &o_size);
+
+    relinquish_locality(loc);
+
+    return (o_size >= sizeof(struct extend_rsp));
+}
+
+#endif /* __EARLY_SLAUNCH__ */
+
+static void *create_log_event12(struct txt_ev_log_container_12 *evt_log,
+                                uint32_t evt_log_size, uint32_t pcr,
+                                uint32_t type, const uint8_t *data,
+                                unsigned data_size)
+{
+    struct TPM12_PCREvent *new_entry;
+
+    new_entry = (void *)(((uint8_t *)evt_log) + evt_log->NextEventOffset);
+
+    /*
+     * Check if there is enough space left for new entry.
+     * Note: it is possible to introduce a gap in event log if entry with big
+     * data_size is followed by another entry with smaller data. Maybe we should
+     * cap the event log size in such case?
+     */
+    if ( evt_log->NextEventOffset + sizeof(struct TPM12_PCREvent) + data_size
+         > evt_log_size )
+        return NULL;
+
+    evt_log->NextEventOffset += sizeof(struct TPM12_PCREvent) + data_size;
+
+    new_entry->PCRIndex = pcr;
+    new_entry->Type = type;
+    new_entry->Size = data_size;
+
+    if ( data && data_size > 0 )
+        memcpy(new_entry->Data, data, data_size);
+
+    return new_entry->Digest;
+}
+
+/************************** end of TPM1.2 specific ****************************/
+
+void tpm_hash_extend(unsigned loc, unsigned pcr, const uint8_t *buf,
+                     unsigned size, uint32_t type, const uint8_t *log_data,
+                     unsigned log_data_size)
+{
+    void *evt_log_addr;
+    uint32_t evt_log_size;
+
+    find_evt_log(slaunch_get_slrt(), &evt_log_addr, &evt_log_size);
+    evt_log_addr = __va((uintptr_t)evt_log_addr);
+
+    if ( is_tpm12() )
+    {
+        uint8_t sha1_digest[SHA1_DIGEST_SIZE];
+
+        struct txt_ev_log_container_12 *evt_log = evt_log_addr;
+        void *entry_digest = create_log_event12(evt_log, evt_log_size, pcr,
+                                                type, log_data, log_data_size);
+
+        /* We still need to write computed hash somewhere. */
+        if ( entry_digest == NULL )
+            entry_digest = sha1_digest;
+
+        if ( !tpm12_hash_extend(loc, buf, size, pcr, entry_digest) )
+        {
+#ifndef __EARLY_SLAUNCH__
+            printk(XENLOG_ERR "Extending PCR%u failed\n", pcr);
+#endif
+        }
+    }
+}
+
+#ifdef __EARLY_SLAUNCH__
+void tpm_extend_mbi(uint32_t *mbi, uint32_t slrt_pa)
+{
+    /* Need this to implement slaunch_get_slrt() for early TPM code. */
+    slrt_location = slrt_pa;
+
+    /* MBI starts with uint32_t total_size. */
+    tpm_hash_extend(DRTM_LOC, DRTM_DATA_PCR, (uint8_t *)mbi, *mbi,
+                    DLE_EVTYPE_SLAUNCH, NULL, 0);
+}
+#endif
-- 
2.49.0



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The code comes from [1] and is licensed under GPL-2.0 or later version
of the license.  It's a combination of:
 - include/crypto/sha2.h
 - include/crypto/sha256_base.h
 - lib/crypto/sha256.c
 - crypto/sha256_generic.c

Changes:
 - includes
 - formatting
 - renames and splicing of some trivial functions that are called once
 - dropping of `int` return values (only zero was ever returned)
 - getting rid of references to `struct shash_desc`

[1]: https://github.com/torvalds/linux/tree/afdab700f65e14070d8ab92175544b1c62b8bf03

Signed-off-by: Sergii Dmytruk 
Signed-off-by: Krystian Hebel 
---
 xen/include/xen/sha256.h |  12 ++
 xen/lib/Makefile         |   1 +
 xen/lib/sha256.c         | 238 +++++++++++++++++++++++++++++++++++++++
 3 files changed, 251 insertions(+)
 create mode 100644 xen/include/xen/sha256.h
 create mode 100644 xen/lib/sha256.c

diff --git a/xen/include/xen/sha256.h b/xen/include/xen/sha256.h
new file mode 100644
index 0000000000..703eddc198
--- /dev/null
+++ b/xen/include/xen/sha256.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef __XEN_SHA256_H
+#define __XEN_SHA256_H
+
+#include 
+
+#define SHA256_DIGEST_SIZE  32
+
+void sha256_hash(const u8 *data, unsigned int len, u8 *out);
+
+#endif /* !__XEN_SHA256_H */
diff --git a/xen/lib/Makefile b/xen/lib/Makefile
index 0d5774b8d7..c7a8d1bb02 100644
--- a/xen/lib/Makefile
+++ b/xen/lib/Makefile
@@ -39,6 +39,7 @@ lib-y += strtoul.o
 lib-y += strtoull.o
 lib-$(CONFIG_X86) += x86-generic-hweightl.o
 lib-$(CONFIG_X86) += sha1.o
+lib-$(CONFIG_X86) += sha256.o
 lib-$(CONFIG_X86) += xxhash32.o
 lib-$(CONFIG_X86) += xxhash64.o
 
diff --git a/xen/lib/sha256.c b/xen/lib/sha256.c
new file mode 100644
index 0000000000..369a52af80
--- /dev/null
+++ b/xen/lib/sha256.c
@@ -0,0 +1,238 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * SHA-256, as specified in
+ * http://csrc.nist.gov/groups/STM/cavp/documents/shs/sha256-384-512.pdf
+ *
+ * SHA-256 code by Jean-Luc Cooke .
+ *
+ * Copyright (c) Jean-Luc Cooke 
+ * Copyright (c) Andrew McDonald 
+ * Copyright (c) 2002 James Morris 
+ * Copyright (c) 2014 Red Hat Inc.
+ */
+
+#include 
+#include 
+#include 
+
+#define SHA256_BLOCK_SIZE 64
+
+struct sha256_state {
+    uint32_t state[SHA256_DIGEST_SIZE / 4];
+    uint64_t count;
+    uint8_t buf[SHA256_BLOCK_SIZE];
+};
+
+typedef void sha256_block_fn(struct sha256_state *sst, uint8_t const *src,
+                             int blocks);
+
+static const uint32_t SHA256_K[] = {
+    0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5,
+    0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5,
+    0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3,
+    0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174,
+    0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc,
+    0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da,
+    0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7,
+    0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967,
+    0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13,
+    0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85,
+    0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3,
+    0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070,
+    0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5,
+    0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3,
+    0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208,
+    0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2,
+};
+
+static uint32_t Ch(uint32_t x, uint32_t y, uint32_t z)
+{
+    return z ^ (x & (y ^ z));
+}
+
+static uint32_t Maj(uint32_t x, uint32_t y, uint32_t z)
+{
+    return (x & y) | (z & (x | y));
+}
+
+#define e0(x)       (ror32(x, 2) ^ ror32(x, 13) ^ ror32(x, 22))
+#define e1(x)       (ror32(x, 6) ^ ror32(x, 11) ^ ror32(x, 25))
+#define s0(x)       (ror32(x, 7) ^ ror32(x, 18) ^ (x >> 3))
+#define s1(x)       (ror32(x, 17) ^ ror32(x, 19) ^ (x >> 10))
+
+static void LOAD_OP(int I, uint32_t *W, const uint8_t *input)
+{
+    W[I] = get_unaligned_be32((uint32_t *)input + I);
+}
+
+static void BLEND_OP(int I, uint32_t *W)
+{
+    W[I] = s1(W[I - 2]) + W[I - 7] + s0(W[I - 15]) + W[I - 16];
+}
+
+#define SHA256_ROUND(i, a, b, c, d, e, f, g, h) do {       \
+        uint32_t t1, t2;                                   \
+        t1 = h + e1(e) + Ch(e, f, g) + SHA256_K[i] + W[i]; \
+        t2 = e0(a) + Maj(a, b, c);                         \
+        d += t1;                                           \
+        h = t1 + t2;                                       \
+    } while ( 0 )
+
+static void sha256_init(struct sha256_state *sctx)
+{
+    sctx->state[0] = 0x6a09e667UL;
+    sctx->state[1] = 0xbb67ae85UL;
+    sctx->state[2] = 0x3c6ef372UL;
+    sctx->state[3] = 0xa54ff53aUL;
+    sctx->state[4] = 0x510e527fUL;
+    sctx->state[5] = 0x9b05688cUL;
+    sctx->state[6] = 0x1f83d9abUL;
+    sctx->state[7] = 0x5be0cd19UL;
+    sctx->count = 0;
+}
+
+static void sha256_do_update(struct sha256_state *sctx,
+                             const uint8_t *data,
+                             unsigned int len,
+                             sha256_block_fn *block_fn)
+{
+    unsigned int partial = sctx->count % SHA256_BLOCK_SIZE;
+
+    sctx->count += len;
+
+    if ( unlikely((partial + len) >= SHA256_BLOCK_SIZE) )
+    {
+        int blocks;
+
+        if ( partial )
+        {
+            int p = SHA256_BLOCK_SIZE - partial;
+
+            memcpy(sctx->buf + partial, data, p);
+            data += p;
+            len -= p;
+
+            block_fn(sctx, sctx->buf, 1);
+        }
+
+        blocks = len / SHA256_BLOCK_SIZE;
+        len %= SHA256_BLOCK_SIZE;
+
+        if ( blocks )
+        {
+            block_fn(sctx, data, blocks);
+            data += blocks * SHA256_BLOCK_SIZE;
+        }
+        partial = 0;
+    }
+    if ( len )
+        memcpy(sctx->buf + partial, data, len);
+}
+
+static void sha256_do_finalize(struct sha256_state *sctx,
+                               sha256_block_fn *block_fn)
+{
+    const int bit_offset = SHA256_BLOCK_SIZE - sizeof(__be64);
+    __be64 *bits = (__be64 *)(sctx->buf + bit_offset);
+    unsigned int partial = sctx->count % SHA256_BLOCK_SIZE;
+
+    sctx->buf[partial++] = 0x80;
+    if ( partial > bit_offset )
+    {
+        memset(sctx->buf + partial, 0x0, SHA256_BLOCK_SIZE - partial);
+        partial = 0;
+
+        block_fn(sctx, sctx->buf, 1);
+    }
+
+    memset(sctx->buf + partial, 0x0, bit_offset - partial);
+    *bits = cpu_to_be64(sctx->count << 3);
+    block_fn(sctx, sctx->buf, 1);
+}
+
+static void sha256_finish(struct sha256_state *sctx, uint8_t *out,
+                          unsigned int digest_size)
+{
+    __be32 *digest = (__be32 *)out;
+    int i;
+
+    for ( i = 0; digest_size > 0; i++, digest_size -= sizeof(__be32) )
+        put_unaligned_be32(sctx->state[i], digest++);
+
+    memset(sctx, 0, sizeof(*sctx));
+}
+
+static void sha256_transform(uint32_t *state, const uint8_t *input, uint32_t *W)
+{
+    uint32_t a, b, c, d, e, f, g, h;
+    int i;
+
+    /* load the input */
+    for ( i = 0; i < 16; i += 8 )
+    {
+        LOAD_OP(i + 0, W, input);
+        LOAD_OP(i + 1, W, input);
+        LOAD_OP(i + 2, W, input);
+        LOAD_OP(i + 3, W, input);
+        LOAD_OP(i + 4, W, input);
+        LOAD_OP(i + 5, W, input);
+        LOAD_OP(i + 6, W, input);
+        LOAD_OP(i + 7, W, input);
+    }
+
+    /* now blend */
+    for ( i = 16; i < 64; i += 8 )
+    {
+        BLEND_OP(i + 0, W);
+        BLEND_OP(i + 1, W);
+        BLEND_OP(i + 2, W);
+        BLEND_OP(i + 3, W);
+        BLEND_OP(i + 4, W);
+        BLEND_OP(i + 5, W);
+        BLEND_OP(i + 6, W);
+        BLEND_OP(i + 7, W);
+    }
+
+    /* load the state into our registers */
+    a = state[0]; b = state[1]; c = state[2]; d = state[3];
+    e = state[4]; f = state[5]; g = state[6]; h = state[7];
+
+    /* now iterate */
+    for ( i = 0; i < 64; i += 8 )
+    {
+        SHA256_ROUND(i + 0, a, b, c, d, e, f, g, h);
+        SHA256_ROUND(i + 1, h, a, b, c, d, e, f, g);
+        SHA256_ROUND(i + 2, g, h, a, b, c, d, e, f);
+        SHA256_ROUND(i + 3, f, g, h, a, b, c, d, e);
+        SHA256_ROUND(i + 4, e, f, g, h, a, b, c, d);
+        SHA256_ROUND(i + 5, d, e, f, g, h, a, b, c);
+        SHA256_ROUND(i + 6, c, d, e, f, g, h, a, b);
+        SHA256_ROUND(i + 7, b, c, d, e, f, g, h, a);
+    }
+
+    state[0] += a; state[1] += b; state[2] += c; state[3] += d;
+    state[4] += e; state[5] += f; state[6] += g; state[7] += h;
+}
+
+static void sha256_transform_blocks(struct sha256_state *sctx,
+                                    const uint8_t *input, int blocks)
+{
+    uint32_t W[64];
+
+    do {
+        sha256_transform(sctx->state, input, W);
+        input += SHA256_BLOCK_SIZE;
+    } while ( --blocks );
+
+    memset(W, 0, sizeof(W));
+}
+
+void sha256_hash(const uint8_t *data, unsigned int len, uint8_t *out)
+{
+    struct sha256_state sctx;
+
+    sha256_init(&sctx);
+    sha256_do_update(&sctx, data, len, sha256_transform_blocks);
+    sha256_do_finalize(&sctx, sha256_transform_blocks);
+    sha256_finish(&sctx, out, SHA256_DIGEST_SIZE);
+}
-- 
2.49.0



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	trenchboot-devel@googlegroups.com
Subject: [PATCH 20/21] x86/slaunch: support EFI boot
Date: Tue, 22 Apr 2025 18:06:54 +0300
Message-ID: <279c33f1d0d05884d57944cff86fc92b8ab98b26.1745172094.git.sergii.dmytruk@3mdeb.com>
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When running on an EFI-enabled system, Xen needs to have access to Boot
Services in order to initialize itself properly and reach a state in
which a dom0 kernel can operate without issues.

This means that DRTM must be started in the middle of Xen's
initialization process.  This effect is achieved via a callback into
bootloader (GRUB) which is responsible for initiating DRTM and
continuing Xen's initialization process.  The latter is done by
branching in Slaunch entry point on a flag to switch back into long mode
before calling the same function which Xen would execute as the next
step without DRTM.

Signed-off-by: Krystian Hebel 
Signed-off-by: Sergii Dmytruk 
---
 .gitignore                                  |   1 +
 docs/hypervisor-guide/x86/how-xen-boots.rst |  10 +-
 xen/arch/x86/Makefile                       |   9 +-
 xen/arch/x86/boot/head.S                    | 124 ++++++++++++++++++++
 xen/arch/x86/boot/x86_64.S                  |  14 ++-
 xen/arch/x86/efi/efi-boot.h                 |  90 +++++++++++++-
 xen/arch/x86/efi/fixmlehdr.c                | 122 +++++++++++++++++++
 xen/arch/x86/slaunch.c                      |  74 +++++++++++-
 xen/common/efi/boot.c                       |   4 +
 xen/common/efi/runtime.c                    |   1 +
 xen/include/xen/efi.h                       |   1 +
 11 files changed, 437 insertions(+), 13 deletions(-)
 create mode 100644 xen/arch/x86/efi/fixmlehdr.c

diff --git a/.gitignore b/.gitignore
index 53f5df0003..dab829d7e1 100644
--- a/.gitignore
+++ b/.gitignore
@@ -201,6 +201,7 @@ xen/.xen.elf32
 xen/System.map
 xen/arch/x86/efi.lds
 xen/arch/x86/efi/check.efi
+xen/arch/x86/efi/fixmlehdr
 xen/arch/x86/efi/mkreloc
 xen/arch/x86/include/asm/asm-macros.h
 xen/arch/*/xen.lds
diff --git a/docs/hypervisor-guide/x86/how-xen-boots.rst b/docs/hypervisor-guide/x86/how-xen-boots.rst
index 050fe9c61f..63f81a8198 100644
--- a/docs/hypervisor-guide/x86/how-xen-boots.rst
+++ b/docs/hypervisor-guide/x86/how-xen-boots.rst
@@ -55,10 +55,12 @@ If ``CONFIG_PVH_GUEST`` was selected at build time, an Elf note is included
 which indicates the ability to use the PVH boot protocol, and registers
 ``__pvh_start`` as the entrypoint, entered in 32bit mode.
 
-A combination of Multiboot 2 and MLE headers is used to implement DRTM for
-legacy (BIOS) boot. The separate entry point is used mainly to differentiate
-from other kinds of boots. It moves a magic number to EAX before jumping into
-common startup code.
+A combination of Multiboot 2 and MLE headers is used to implement DRTM. The
+separate entry point is used mainly to differentiate from other kinds of boots.
+For a legacy (BIOS) boot, it moves a magic number to EAX before jumping into
+common startup code.  For a EFI boot, it resumes execution of Xen.efi which was
+paused by handing control to a part of a bootloader responsible for initiating
+DRTM sequence.
 
 
 xen.gz
diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile
index 7d1027a50f..af4dd16f8a 100644
--- a/xen/arch/x86/Makefile
+++ b/xen/arch/x86/Makefile
@@ -90,6 +90,7 @@ extra-y += xen.lds
 
 hostprogs-y += boot/mkelf32
 hostprogs-y += efi/mkreloc
+hostprogs-y += efi/fixmlehdr
 
 $(obj)/efi/mkreloc: HOSTCFLAGS += -I$(srctree)/include
 
@@ -141,6 +142,10 @@ $(TARGET): $(TARGET)-syms $(efi-y) $(obj)/boot/mkelf32
 
 CFLAGS-$(XEN_BUILD_EFI) += -DXEN_BUILD_EFI
 
+ifeq ($(XEN_BUILD_EFI),y)
+XEN_AFLAGS += -DXEN_BUILD_EFI
+endif
+
 $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds
 	$(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds -N $< $(build_id_linker) \
 	    $(objtree)/common/symbols-dummy.o -o $(dot-target).0
@@ -210,7 +215,7 @@ note_file_option ?= $(note_file)
 
 extra-$(XEN_BUILD_PE) += efi.lds
 ifeq ($(XEN_BUILD_PE),y)
-$(TARGET).efi: $(objtree)/prelink.o $(note_file) $(obj)/efi.lds $(obj)/efi/relocs-dummy.o $(obj)/efi/mkreloc
+$(TARGET).efi: $(objtree)/prelink.o $(note_file) $(obj)/efi.lds $(obj)/efi/relocs-dummy.o $(obj)/efi/mkreloc $(obj)/efi/fixmlehdr
 ifeq ($(CONFIG_DEBUG_INFO),y)
 	$(if $(filter --strip-debug,$(EFI_LDFLAGS)),echo,:) "Will strip debug info from $(@F)"
 endif
@@ -237,6 +242,8 @@ endif
 	$(LD) $(call EFI_LDFLAGS,$(VIRT_BASE)) -T $(obj)/efi.lds -N $< \
 	      $(dot-target).1r.o $(dot-target).1s.o $(orphan-handling-y) \
 	      $(note_file_option) -o $@
+	# take image offset into account
+	$(obj)/efi/fixmlehdr $@ $(XEN_IMG_OFFSET)
 	$(NM) -pa --format=sysv $@ \
 		| $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \
 		> $@.map
diff --git a/xen/arch/x86/boot/head.S b/xen/arch/x86/boot/head.S
index 3184b6883a..27b63fae32 100644
--- a/xen/arch/x86/boot/head.S
+++ b/xen/arch/x86/boot/head.S
@@ -397,6 +397,12 @@ slaunch_stub_entry:
         mov     %ebx, %esi
         sub     $sym_offs(slaunch_stub_entry), %esi
 
+#ifdef XEN_BUILD_EFI
+        /* If the flag is already set, then Xen should continue execution. */
+        cmpb    $0, sym_esi(slaunch_active)
+        jne     slaunch_efi_jumpback
+#endif
+
         /* On AMD, %ebp holds the base address of SLB, save it for later. */
         mov     %ebp, %ebx
 
@@ -836,6 +842,124 @@ trampoline_setup:
         /* Jump into the relocated trampoline. */
         lret
 
+#ifdef XEN_BUILD_EFI
+
+        /*
+         * The state matches that of slaunch_stub_entry above, but with %esi
+         * already initialized.
+         */
+slaunch_efi_jumpback:
+        lea     STACK_SIZE - CPUINFO_sizeof + sym_esi(cpu0_stack), %esp
+
+        /* Prepare gdt and segments. */
+        add     %esi, sym_esi(gdt_boot_base)
+        lgdt    sym_esi(gdt_boot_descr)
+
+        mov     $BOOT_DS, %ecx
+        mov     %ecx, %ds
+        mov     %ecx, %es
+        mov     %ecx, %ss
+
+        push    $BOOT_CS32
+        lea     sym_esi(.Lgdt_is_set),%edx
+        push    %edx
+        lret
+.Lgdt_is_set:
+
+        /*
+         * Stash TSC as above because it was zeroed on jumping into bootloader
+         * to not interfere with measurements.
+         */
+        rdtsc
+        mov     %eax,     sym_esi(boot_tsc_stamp)
+        mov     %edx, 4 + sym_esi(boot_tsc_stamp)
+
+        /*
+         * Clear the pagetables before the use. We are loaded below 4GiB and
+         * this avoids the need for writing to higher dword of each entry.
+         * Additionally, this ensures those dwords are actually zero and the
+         * mappings aren't manipulated from outside.
+         */
+        lea     sym_esi(bootmap_start), %edi
+        lea     sym_esi(bootmap_end), %ecx
+        sub     %edi, %ecx
+        xor     %eax, %eax
+        shr     $2, %ecx
+        rep stosl
+
+        /* 1x L1 page, 512 entries mapping total of 2M. */
+        lea     sym_esi(l1_bootmap), %edi
+        mov     $512, %ecx
+        mov     $(__PAGE_HYPERVISOR + 512 * PAGE_SIZE), %edx
+.Lfill_l1_identmap:
+        sub     $PAGE_SIZE, %edx
+        /* Loop runs for ecx=[512..1] for entries [511..0], hence -8. */
+        mov     %edx, -8(%edi,%ecx,8)
+        loop    .Lfill_l1_identmap
+
+        /* 4x L2 pages, each page mapping 1G of RAM. */
+        lea     sym_esi(l2_bootmap), %edi
+        /* 1st entry points to L1. */
+        lea     (sym_offs(l1_bootmap) + __PAGE_HYPERVISOR)(%esi), %edx
+        mov     %edx, (%edi)
+        /* Other entries are 2MB pages. */
+        mov     $(4 * 512 - 1), %ecx
+        /*
+         * Value below should be 4GB + flags, which wouldn't fit in 32b
+         * register. To avoid warning from the assembler, 4GB is skipped here.
+         * Substitution in first iteration makes the value roll over and point
+         * to 4GB - 2MB + flags.
+         */
+        mov     $(_PAGE_PSE + __PAGE_HYPERVISOR), %edx
+.Lfill_l2_identmap:
+        sub     $(1 << L2_PAGETABLE_SHIFT), %edx
+        /* Loop runs for ecx=[2047..1] for entries [2047..1]. */
+        mov     %edx, (%edi,%ecx,8)
+        loop    .Lfill_l2_identmap
+
+        /* 1x L3 page, mapping the 4x L2 pages. */
+        lea     sym_esi(l3_bootmap), %edi
+        mov     $4, %ecx
+        lea     (sym_offs(l2_bootmap) + 4 * PAGE_SIZE + __PAGE_HYPERVISOR)(%esi), %edx
+.Lfill_l3_identmap:
+        sub     $PAGE_SIZE, %edx
+        /* Loop runs for ecx=[4..1] for entries [3..0], hence -8. */
+        mov     %edx, -8(%edi,%ecx,8)
+        loop    .Lfill_l3_identmap
+
+        /* 1x L4 page, mapping the L3 page. */
+        lea     (sym_offs(l3_bootmap) + __PAGE_HYPERVISOR)(%esi), %edx
+        mov     %edx, sym_esi(l4_bootmap)
+
+        /* Restore CR4, PAE must be enabled before IA-32e mode */
+        mov     %cr4, %ecx
+        or      $X86_CR4_PAE, %ecx
+        mov     %ecx, %cr4
+
+        /* Load PML4 table location into PT base register */
+        lea     sym_esi(l4_bootmap), %eax
+        mov     %eax, %cr3
+
+        /* Enable IA-32e mode and paging */
+        mov     $MSR_EFER, %ecx
+        rdmsr
+        or      $EFER_LME >> 8, %ah
+        wrmsr
+
+        mov     %cr0, %eax
+        or      $X86_CR0_PG | X86_CR0_NE | X86_CR0_TS | X86_CR0_MP, %eax
+        mov     %eax, %cr0
+
+        /* Now in IA-32e compatibility mode, use lret to jump to 64b mode */
+        lea     sym_esi(start_xen_from_efi), %ecx
+        push    $BOOT_CS64
+        push    %ecx
+        lret
+
+.global start_xen_from_efi
+
+#endif /* XEN_BUILD_EFI */
+
 ENTRY(trampoline_start)
 #include "trampoline.S"
 ENTRY(trampoline_end)
diff --git a/xen/arch/x86/boot/x86_64.S b/xen/arch/x86/boot/x86_64.S
index ac33576d8f..67896f5fe5 100644
--- a/xen/arch/x86/boot/x86_64.S
+++ b/xen/arch/x86/boot/x86_64.S
@@ -221,14 +221,22 @@ GLOBAL(__page_tables_end)
 /* Init pagetables. Enough page directories to map into 4GB. */
         .section .init.data, "aw", @progbits
 
-DATA_LOCAL(l1_bootmap, PAGE_SIZE)
+bootmap_start:
+
+DATA_LOCAL(l1_bootmap, PAGE_SIZE) /* 1x L1 page, mapping 2M of RAM. */
         .fill L1_PAGETABLE_ENTRIES, 8, 0
 END(l1_bootmap)
 
-DATA(l2_bootmap, PAGE_SIZE)
+DATA(l2_bootmap, PAGE_SIZE) /* 4x L2 pages, each mapping 1G of RAM. */
         .fill 4 * L2_PAGETABLE_ENTRIES, 8, 0
 END(l2_bootmap)
 
-DATA(l3_bootmap, PAGE_SIZE)
+DATA(l3_bootmap, PAGE_SIZE) /* 1x L3 page, mapping the 4x L2 pages. */
         .fill L3_PAGETABLE_ENTRIES, 8, 0
 END(l3_bootmap)
+
+DATA_LOCAL(l4_bootmap, PAGE_SIZE) /* 1x L4 page, mapping the L3 page. */
+        .fill L4_PAGETABLE_ENTRIES, 8, 0
+END(l4_bootmap)
+
+bootmap_end:
diff --git a/xen/arch/x86/efi/efi-boot.h b/xen/arch/x86/efi/efi-boot.h
index 1d8902a9a7..1cfb4582d4 100644
--- a/xen/arch/x86/efi/efi-boot.h
+++ b/xen/arch/x86/efi/efi-boot.h
@@ -5,6 +5,12 @@
  */
 #include 
 
+/*
+ * Tell  to access TXT registers without address translation
+ * which has not yet been set up.
+ */
+#define __EARLY_SLAUNCH__
+
 #include 
 #include 
 #include 
@@ -13,8 +19,11 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 static struct file __initdata ucode;
+static uint64_t __initdata xen_image_size;
 static multiboot_info_t __initdata mbi = {
     .flags = MBI_MODULES | MBI_LOADERNAME
 };
@@ -230,10 +239,29 @@ static void __init efi_arch_pre_exit_boot(void)
     }
 }
 
-static void __init noreturn efi_arch_post_exit_boot(void)
+void __init noreturn start_xen_from_efi(void)
 {
     u64 cr4 = XEN_MINIMAL_CR4 & ~X86_CR4_PGE, efer;
 
+    if ( slaunch_active )
+    {
+        struct slr_table *slrt = (struct slr_table *)efi.slr;
+        struct slr_entry_intel_info *intel_info;
+
+        intel_info = (struct slr_entry_intel_info *)
+            slr_next_entry_by_tag(slrt, NULL, SLR_ENTRY_INTEL_INFO);
+        if ( intel_info != NULL )
+        {
+            void *txt_heap = txt_init();
+            struct txt_os_mle_data *os_mle = txt_os_mle_data_start(txt_heap);
+            struct txt_os_sinit_data *os_sinit =
+                txt_os_sinit_data_start(txt_heap);
+
+            txt_verify_pmr_ranges(os_mle, os_sinit, intel_info, xen_phys_start,
+                                  xen_phys_start, xen_image_size);
+        }
+    }
+
     efi_arch_relocate_image(__XEN_VIRT_START - xen_phys_start);
     memcpy(_p(trampoline_phys), trampoline_start, cfg.size);
 
@@ -279,6 +307,65 @@ static void __init noreturn efi_arch_post_exit_boot(void)
     unreachable();
 }
 
+extern uint32_t slaunch_slrt;
+
+static void __init attempt_secure_launch(void)
+{
+    struct slr_table *slrt;
+    struct slr_entry_dl_info *dlinfo;
+    dl_handler_func handler_callback;
+
+    /* The presence of this table indicates a Secure Launch boot. */
+    slrt = (struct slr_table *)efi.slr;
+    if ( efi.slr == EFI_INVALID_TABLE_ADDR || slrt->magic != SLR_TABLE_MAGIC ||
+         slrt->revision != SLR_TABLE_REVISION )
+        return;
+
+    /* Avoid calls into firmware after DRTM. */
+    __clear_bit(EFI_RS, &efi_flags);
+
+    /*
+     * Make measurements less sensitive to hardware-specific details.
+     *
+     * Intentionally leaving efi_ct and efi_num_ct intact.
+     */
+    efi_ih = 0;
+    efi_bs = NULL;
+    efi_bs_revision = 0;
+    efi_rs = NULL;
+    efi_version = 0;
+    efi_fw_vendor = NULL;
+    efi_fw_revision = 0;
+    StdOut = NULL;
+    StdErr = NULL;
+    boot_tsc_stamp = 0;
+
+    slaunch_active = true;
+    slaunch_slrt = efi.slr;
+
+    /* Jump through DL stub to initiate Secure Launch. */
+    dlinfo = (struct slr_entry_dl_info *)
+        slr_next_entry_by_tag(slrt, NULL, SLR_ENTRY_DL_INFO);
+
+    handler_callback = (dl_handler_func)dlinfo->dl_handler;
+    handler_callback(&dlinfo->bl_context);
+
+    unreachable();
+}
+
+static void __init noreturn efi_arch_post_exit_boot(void)
+{
+    /*
+     * If Secure Launch happens, attempt_secure_launch() doesn't return and
+     * start_xen_from_efi() is invoked after DRTM has been initiated.
+     * Otherwise, attempt_secure_launch() returns and execution continues as
+     * usual.
+     */
+    attempt_secure_launch();
+
+    start_xen_from_efi();
+}
+
 static void __init efi_arch_cfg_file_early(const EFI_LOADED_IMAGE *image,
                                            EFI_FILE_HANDLE dir_handle,
                                            const char *section)
@@ -775,6 +862,7 @@ static void __init efi_arch_halt(void)
 static void __init efi_arch_load_addr_check(const EFI_LOADED_IMAGE *loaded_image)
 {
     xen_phys_start = (UINTN)loaded_image->ImageBase;
+    xen_image_size = loaded_image->ImageSize;
     if ( (xen_phys_start + loaded_image->ImageSize - 1) >> 32 )
         blexit(L"Xen must be loaded below 4Gb.");
     if ( xen_phys_start & ((1 << L2_PAGETABLE_SHIFT) - 1) )
diff --git a/xen/arch/x86/efi/fixmlehdr.c b/xen/arch/x86/efi/fixmlehdr.c
new file mode 100644
index 0000000000..d443f3d75d
--- /dev/null
+++ b/xen/arch/x86/efi/fixmlehdr.c
@@ -0,0 +1,122 @@
+#include 
+#include 
+#include 
+#include 
+
+#define PREFIX_SIZE (4*1024)
+
+struct mle_header
+{
+    uint8_t uuid[16];
+    uint32_t header_len;
+    uint32_t version;
+    uint32_t entry_point;
+    uint32_t first_valid_page;
+    uint32_t mle_start;
+    uint32_t mle_end;
+    uint32_t capabilities;
+    uint32_t cmdline_start;
+    uint32_t cmdline_end;
+} __attribute__ ((packed));
+
+static const uint8_t MLE_HEADER_UUID[] = {
+    0x5a, 0xac, 0x82, 0x90, 0x6f, 0x47, 0xa7, 0x74,
+    0x0f, 0x5c, 0x55, 0xa2, 0xcb, 0x51, 0xb6, 0x42
+};
+
+int main(int argc, char *argv[])
+{
+    FILE *fp;
+    struct mle_header header;
+    int i;
+    char *end_ptr;
+    long long correction;
+    const char *file_path;
+
+    if ( argc != 3 )
+    {
+        fprintf(stderr, "Usage: %s  \n", argv[0]);
+        return 1;
+    }
+
+    correction = strtoll(argv[2], &end_ptr, 0);
+    if ( *end_ptr != '\0' )
+    {
+        fprintf(stderr, "Failed to parse '%s' as a number\n", argv[2]);
+        return 1;
+    }
+    if ( correction < INT32_MIN  )
+    {
+        fprintf(stderr, "Correction '%s' is too small\n", argv[2]);
+        return 1;
+    }
+    if ( correction > INT32_MAX  )
+    {
+        fprintf(stderr, "Correction '%s' is too large\n", argv[2]);
+        return 1;
+    }
+
+    file_path = argv[1];
+
+    fp = fopen(file_path, "r+");
+    if ( fp == NULL )
+    {
+        fprintf(stderr, "Failed to open %s\n", file_path);
+        return 1;
+    }
+
+    for ( i = 0; i < PREFIX_SIZE; i += 16 )
+    {
+        uint8_t bytes[16];
+
+        if ( fread(bytes, sizeof(bytes), 1, fp) != 1 )
+        {
+            fprintf(stderr, "Failed to find MLE header in %s\n", file_path);
+            goto fail;
+        }
+
+        if ( memcmp(bytes, MLE_HEADER_UUID, 16) == 0 )
+        {
+            break;
+        }
+    }
+
+    if ( i >= PREFIX_SIZE )
+    {
+        fprintf(stderr, "Failed to find MLE header in %s\n", file_path);
+        goto fail;
+    }
+
+    if ( fseek(fp, -16, SEEK_CUR) )
+    {
+        fprintf(stderr, "Failed to seek back to MLE header in %s\n", file_path);
+        goto fail;
+    }
+
+    if ( fread(&header, sizeof(header), 1, fp) != 1 )
+    {
+        fprintf(stderr, "Failed to read MLE header from %s\n", file_path);
+        goto fail;
+    }
+
+    if ( fseek(fp, -(int)sizeof(header), SEEK_CUR) )
+    {
+        fprintf(stderr, "Failed to seek back again to MLE header in %s\n",
+                file_path);
+        goto fail;
+    }
+
+    header.entry_point += correction;
+
+    if ( fwrite(&header, sizeof(header), 1, fp) != 1 )
+    {
+        fprintf(stderr, "Failed to write MLE header in %s\n", file_path);
+        goto fail;
+    }
+
+    return 0;
+
+fail:
+    fclose(fp);
+    return 1;
+}
diff --git a/xen/arch/x86/slaunch.c b/xen/arch/x86/slaunch.c
index 51a488a8e0..a4b7d00da5 100644
--- a/xen/arch/x86/slaunch.c
+++ b/xen/arch/x86/slaunch.c
@@ -5,6 +5,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -243,10 +244,23 @@ check_drtm_policy(struct slr_table *slrt,
 {
     uint32_t i;
     uint32_t num_mod_entries;
+    int min_entries;
 
-    if ( policy->nr_entries < 2 )
-        panic("DRTM policy in SLRT contains less than 2 entries (%d)!\n",
-              policy->nr_entries);
+    min_entries = efi_enabled(EFI_BOOT) ? 1 : 2;
+    if ( policy->nr_entries < min_entries )
+    {
+        panic("DRTM policy in SLRT contains less than %d entries (%d)!\n",
+              min_entries, policy->nr_entries);
+    }
+
+    if ( efi_enabled(EFI_BOOT) )
+    {
+        check_slrt_policy_entry(&policy_entry[0], 0, slrt);
+        /* SLRT was measured in tpm_measure_slrt(). */
+        return 1;
+    }
+
+    /* This must be legacy MultiBoot2 boot. */
 
     /*
      * MBI policy entry must be the first one, so that measuring order matches
@@ -315,6 +329,7 @@ void __init slaunch_process_drtm_policy(const struct boot_info *bi)
     struct slr_table *slrt;
     struct slr_entry_policy *policy;
     struct slr_policy_entry *policy_entry;
+    int rc;
     uint16_t i;
     unsigned int measured;
 
@@ -330,7 +345,6 @@ void __init slaunch_process_drtm_policy(const struct boot_info *bi)
 
     for ( i = measured; i < policy->nr_entries; i++ )
     {
-        int rc;
         uint64_t start = policy_entry[i].entity;
         uint64_t size = policy_entry[i].size;
 
@@ -375,6 +389,58 @@ void __init slaunch_process_drtm_policy(const struct boot_info *bi)
 
         policy_entry[i].flags |= SLR_POLICY_FLAG_MEASURED;
     }
+
+    /*
+     * On x86 EFI platforms Xen reads its command-line options and kernel/initrd
+     * from configuration files (several can be chained). Bootloader can't know
+     * contents of the configuration beforehand without parsing it, so there
+     * will be no corresponding policy entries. Instead, measure command-line
+     * and all modules here.
+     */
+    if ( efi_enabled(EFI_BOOT) )
+    {
+#define LOG_DATA(str) (uint8_t *)(str), (sizeof(str) - 1)
+
+        tpm_hash_extend(DRTM_LOC, DRTM_DATA_PCR,
+                        (const uint8_t *)bi->cmdline, strlen(bi->cmdline),
+                        DLE_EVTYPE_SLAUNCH, LOG_DATA("Xen's command line"));
+
+        for ( i = 0; i < bi->nr_modules; i++ )
+        {
+            const struct boot_module *mod = &bi->mods[i];
+
+            paddr_t string = mod->cmdline_pa;
+            paddr_t start = mod->start;
+            size_t size = mod->size;
+
+            if ( mod->relocated || mod->released )
+            {
+                panic("A module \"%s\" (#%d) was consumed before measurement\n",
+                      (const char *)__va(string), i);
+            }
+
+            /*
+             * Measuring module's name separately because module's command-line
+             * parameters are appended to its name when present.
+             *
+             * 2 MiB is minimally mapped size and it should more than suffice.
+             */
+            rc = slaunch_map_l2(string, 2 * 1024 * 1024);
+            BUG_ON(rc != 0);
+
+            tpm_hash_extend(DRTM_LOC, DRTM_DATA_PCR,
+                            __va(string), strlen(__va(string)),
+                            DLE_EVTYPE_SLAUNCH, LOG_DATA("MB module string"));
+
+            rc = slaunch_map_l2(start, size);
+            BUG_ON(rc != 0);
+
+            tpm_hash_extend(DRTM_LOC, DRTM_CODE_PCR, __va(start), size,
+                            DLE_EVTYPE_SLAUNCH, LOG_DATA("MB module"));
+        }
+
+#undef LOG_DATA
+    }
 }
 
 int __init slaunch_map_l2(unsigned long paddr, unsigned long size)
diff --git a/xen/common/efi/boot.c b/xen/common/efi/boot.c
index 143b5681ba..eb4ce6991a 100644
--- a/xen/common/efi/boot.c
+++ b/xen/common/efi/boot.c
@@ -19,6 +19,7 @@
 #if EFI_PAGE_SIZE != PAGE_SIZE
 # error Cannot use xen/pfn.h here!
 #endif
+#include 
 #include 
 #include 
 #ifdef CONFIG_X86
@@ -1004,6 +1005,7 @@ static void __init efi_tables(void)
         static EFI_GUID __initdata mps_guid = MPS_TABLE_GUID;
         static EFI_GUID __initdata smbios_guid = SMBIOS_TABLE_GUID;
         static EFI_GUID __initdata smbios3_guid = SMBIOS3_TABLE_GUID;
+        static EFI_GUID __initdata slr_guid = UEFI_SLR_TABLE_GUID;
 
         if ( match_guid(&acpi2_guid, &efi_ct[i].VendorGuid) )
             efi.acpi20 = (unsigned long)efi_ct[i].VendorTable;
@@ -1015,6 +1017,8 @@ static void __init efi_tables(void)
             efi.smbios = (unsigned long)efi_ct[i].VendorTable;
         if ( match_guid(&smbios3_guid, &efi_ct[i].VendorGuid) )
             efi.smbios3 = (unsigned long)efi_ct[i].VendorTable;
+        if ( match_guid(&slr_guid, &efi_ct[i].VendorGuid) )
+            efi.slr = (unsigned long)efi_ct[i].VendorTable;
         if ( match_guid(&esrt_guid, &efi_ct[i].VendorGuid) )
             esrt = (UINTN)efi_ct[i].VendorTable;
     }
diff --git a/xen/common/efi/runtime.c b/xen/common/efi/runtime.c
index 7e1fce291d..e1b339f162 100644
--- a/xen/common/efi/runtime.c
+++ b/xen/common/efi/runtime.c
@@ -70,6 +70,7 @@ struct efi __read_mostly efi = {
 	.mps    = EFI_INVALID_TABLE_ADDR,
 	.smbios = EFI_INVALID_TABLE_ADDR,
 	.smbios3 = EFI_INVALID_TABLE_ADDR,
+	.slr    = EFI_INVALID_TABLE_ADDR,
 };
 
 const struct efi_pci_rom *__read_mostly efi_pci_roms;
diff --git a/xen/include/xen/efi.h b/xen/include/xen/efi.h
index 160804e294..614dfce66a 100644
--- a/xen/include/xen/efi.h
+++ b/xen/include/xen/efi.h
@@ -19,6 +19,7 @@ struct efi {
     unsigned long acpi20;       /* ACPI table (ACPI 2.0) */
     unsigned long smbios;       /* SM BIOS table */
     unsigned long smbios3;      /* SMBIOS v3 table */
+    unsigned long slr;          /* SLR table */
 };
 
 extern struct efi efi;
-- 
2.49.0



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	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	trenchboot-devel@googlegroups.com
Subject: [PATCH 18/21] x86/boot: find MBI and SLRT on AMD
Date: Tue, 22 Apr 2025 18:06:52 +0300
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Use slr_entry_amd_info::boot_params_base on AMD with SKINIT to get MBI
location.

Another thing of interest is the location of SLRT which is bootloader's
data after SKL.

Signed-off-by: Krystian Hebel 
Signed-off-by: Sergii Dmytruk 
---
 xen/arch/x86/boot/head.S          | 38 ++++++++++++++++----
 xen/arch/x86/boot/slaunch_early.c | 58 +++++++++++++++++++++++++++++++
 2 files changed, 90 insertions(+), 6 deletions(-)

diff --git a/xen/arch/x86/boot/head.S b/xen/arch/x86/boot/head.S
index 419bf58d5c..3184b6883a 100644
--- a/xen/arch/x86/boot/head.S
+++ b/xen/arch/x86/boot/head.S
@@ -354,10 +354,12 @@ cs32_switch:
         jmp     *%edi
 
         /*
-         * Entry point for TrenchBoot Secure Launch on Intel TXT platforms.
+         * Entry point for TrenchBoot Secure Launch, common for Intel TXT and
+         * AMD Secure Startup, but state is slightly different.
          *
+         * On Intel:
          * CPU is in 32b protected mode with paging disabled. On entry:
-         * - %ebx = %eip = MLE entry point,
+         * - %ebx = %eip = this entry point,
          * - stack pointer is undefined,
          * - CS is flat 4GB code segment,
          * - DS, ES, SS, FS and GS are undefined according to TXT SDG, but this
@@ -375,13 +377,34 @@ cs32_switch:
          * - trying to enter real mode results in reset
          * - APs must be brought up by MONITOR or GETSEC[WAKEUP], depending on
          *   which is supported by a given SINIT ACM
+         *
+         * On AMD (as implemented by TrenchBoot's SKL):
+         * CPU is in 32b protected mode with paging disabled. On entry:
+         * - %ebx = %eip = this entry point,
+         * - %ebp holds base address of SKL
+         * - stack pointer is treated as undefined for parity with TXT,
+         * - CS is flat 4GB code segment,
+         * - DS, ES, SS are flat 4GB data segments, but treated as undefined for
+         *   parity with TXT.
+         *
+         * Additional restrictions:
+         * - interrupts (including NMIs and SMIs) are disabled and must be
+         *   enabled later
+         * - APs must be brought up by SIPI without an INIT
          */
 slaunch_stub_entry:
         /* Calculate the load base address. */
         mov     %ebx, %esi
         sub     $sym_offs(slaunch_stub_entry), %esi
 
-        /* Mark Secure Launch boot protocol and jump to common entry. */
+        /* On AMD, %ebp holds the base address of SLB, save it for later. */
+        mov     %ebp, %ebx
+
+        /*
+         * Mark Secure Launch boot protocol and jump to common entry. Note that
+         * all general purpose registers except %ebx and %esi are clobbered
+         * between here and .Lslaunch_proto.
+         */
         mov     $SLAUNCH_BOOTLOADER_MAGIC, %eax
         jmp     .Lset_stack
 
@@ -508,15 +531,18 @@ __start:
         sub     $8, %esp
 
         push    %esp                             /* pointer to output structure */
+        push    %ebx                             /* Slaunch parameter on AMD */
         lea     sym_offs(__2M_rwdata_end), %ecx  /* end of target image */
         lea     sym_offs(_start), %edx           /* target base address */
         mov     %esi, %eax                       /* load base address */
         /*
-         * slaunch_early_init(load/eax, tgt/edx, tgt_end/ecx, ret/stk) using
-         * fastcall calling convention.
+         * slaunch_early_init(load/eax, tgt/edx, tgt_end/ecx,
+         *                     slaunch/stk, ret/stk)
+         *
+         * Uses fastcall calling convention.
          */
         call    slaunch_early_init
-        add     $4, %esp                         /* pop the fourth parameter */
+        add     $8, %esp                         /* pop last two parameters */
 
         /* Move outputs of slaunch_early_init() from stack into registers. */
         pop     %eax  /* physical MBI address */
diff --git a/xen/arch/x86/boot/slaunch_early.c b/xen/arch/x86/boot/slaunch_early.c
index af8aa29ae0..d53faf8ab0 100644
--- a/xen/arch/x86/boot/slaunch_early.c
+++ b/xen/arch/x86/boot/slaunch_early.c
@@ -7,6 +7,20 @@
 #include 
 #include 
 #include 
+#include 
+
+/*
+ * The AMD-defined structure layout for the SLB. The last two fields are
+ * SL-specific.
+ */
+struct skinit_sl_header
+{
+    uint16_t skl_entry_point;
+    uint16_t length;
+    uint8_t reserved[62];
+    uint16_t skl_info_offset;
+    uint16_t bootloader_data_offset;
+} __packed;
 
 struct early_init_results
 {
@@ -14,9 +28,25 @@ struct early_init_results
     uint32_t slrt_pa;
 } __packed;
 
+static bool is_intel_cpu(void)
+{
+    /*
+     * asm/processor.h can't be included in early code, which means neither
+     * cpuid() function nor boot_cpu_data can be used here.
+     */
+    uint32_t eax, ebx, ecx, edx;
+    asm volatile ( "cpuid"
+          : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
+          : "0" (0), "c" (0) );
+    return ebx == X86_VENDOR_INTEL_EBX
+        && ecx == X86_VENDOR_INTEL_ECX
+        && edx == X86_VENDOR_INTEL_EDX;
+}
+
 void slaunch_early_init(uint32_t load_base_addr,
                         uint32_t tgt_base_addr,
                         uint32_t tgt_end_addr,
+                        uint32_t slaunch_param,
                         struct early_init_results *result)
 {
     void *txt_heap;
@@ -26,6 +56,34 @@ void slaunch_early_init(uint32_t load_base_addr,
     struct slr_entry_intel_info *intel_info;
     uint32_t size = tgt_end_addr - tgt_base_addr;
 
+    if ( !is_intel_cpu() )
+    {
+        /*
+         * Not an Intel CPU. Currently the only other option is AMD with SKINIT
+         * and secure-kernel-loader (SKL).
+         */
+        struct slr_entry_amd_info *amd_info;
+        const struct skinit_sl_header *sl_header = (void *)slaunch_param;
+
+        /*
+         * slaunch_param holds a physical address of SLB.
+         * Bootloader's data is SLRT.
+         */
+        result->slrt_pa = slaunch_param + sl_header->bootloader_data_offset;
+        result->mbi_pa = 0;
+
+        slrt = (struct slr_table *)(uintptr_t)result->slrt_pa;
+
+        amd_info = (struct slr_entry_amd_info *)
+            slr_next_entry_by_tag(slrt, NULL, SLR_ENTRY_AMD_INFO);
+        /* Basic checks only, SKL checked and consumed the rest. */
+        if ( amd_info == NULL || amd_info->hdr.size != sizeof(*amd_info) )
+            return;
+
+        result->mbi_pa = amd_info->boot_params_base;
+        return;
+    }
+
     txt_heap = txt_init();
     os_mle = txt_os_mle_data_start(txt_heap);
     os_sinit = txt_os_sinit_data_start(txt_heap);
-- 
2.49.0



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	Andrew Cooper ,
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	trenchboot-devel@googlegroups.com
Subject: [PATCH 08/21] x86/intel_txt.c: restore boot MTRRs
Date: Tue, 22 Apr 2025 18:06:42 +0300
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From: Krystian Hebel 

In preparation for TXT SENTER call, GRUB had to modify MTRR settings
to be UC for everything except SINIT ACM. Old values are restored
from SLRT where they were saved by the bootloader.

Signed-off-by: Krystian Hebel 
Signed-off-by: Michał Żygowski 
Signed-off-by: Sergii Dmytruk 
---
 xen/arch/x86/e820.c                  |  5 ++
 xen/arch/x86/include/asm/intel_txt.h |  3 ++
 xen/arch/x86/intel_txt.c             | 75 ++++++++++++++++++++++++++++
 3 files changed, 83 insertions(+)

diff --git a/xen/arch/x86/e820.c b/xen/arch/x86/e820.c
index ca577c0bde..d105d1918a 100644
--- a/xen/arch/x86/e820.c
+++ b/xen/arch/x86/e820.c
@@ -11,6 +11,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 /*
  * opt_mem: Limit maximum address of physical RAM.
@@ -442,6 +444,9 @@ static uint64_t __init mtrr_top_of_ram(void)
     ASSERT(paddr_bits);
     addr_mask = ((1ULL << paddr_bits) - 1) & PAGE_MASK;
 
+    if ( slaunch_active )
+        txt_restore_mtrrs(e820_verbose);
+
     rdmsrl(MSR_MTRRcap, mtrr_cap);
     rdmsrl(MSR_MTRRdefType, mtrr_def);
 
diff --git a/xen/arch/x86/include/asm/intel_txt.h b/xen/arch/x86/include/asm/intel_txt.h
index 85ef9f6245..9083260cf9 100644
--- a/xen/arch/x86/include/asm/intel_txt.h
+++ b/xen/arch/x86/include/asm/intel_txt.h
@@ -402,4 +402,7 @@ void txt_map_mem_regions(void);
 /* Marks TXT-specific memory as used to avoid its corruption. */
 void txt_reserve_mem_regions(void);
 
+/* Restores original MTRR values saved by a bootloader before starting DRTM. */
+void txt_restore_mtrrs(bool e820_verbose);
+
 #endif /* __ASSEMBLY__ */
diff --git a/xen/arch/x86/intel_txt.c b/xen/arch/x86/intel_txt.c
index 4a4e404007..8ffcab0e61 100644
--- a/xen/arch/x86/intel_txt.c
+++ b/xen/arch/x86/intel_txt.c
@@ -10,6 +10,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
 
 static uint64_t __initdata txt_heap_base, txt_heap_size;
@@ -100,3 +102,76 @@ void __init txt_reserve_mem_regions(void)
                      E820_UNUSABLE);
     BUG_ON(rc == 0);
 }
+
+void __init txt_restore_mtrrs(bool e820_verbose)
+{
+    struct slr_entry_intel_info *intel_info;
+    uint64_t mtrr_cap, mtrr_def, base, mask;
+    unsigned int i;
+    uint64_t def_type;
+    struct mtrr_pausing_state pausing_state;
+
+    rdmsrl(MSR_MTRRcap, mtrr_cap);
+    rdmsrl(MSR_MTRRdefType, mtrr_def);
+
+    if ( e820_verbose )
+    {
+        printk("MTRRs set previously for SINIT ACM:\n");
+        printk(" MTRR cap: %"PRIx64" type: %"PRIx64"\n", mtrr_cap, mtrr_def);
+
+        for ( i = 0; i < (uint8_t)mtrr_cap; i++ )
+        {
+            rdmsrl(MSR_IA32_MTRR_PHYSBASE(i), base);
+            rdmsrl(MSR_IA32_MTRR_PHYSMASK(i), mask);
+
+            printk(" MTRR[%d]: base %"PRIx64" mask %"PRIx64"\n",
+                   i, base, mask);
+        }
+    }
+
+    intel_info = (struct slr_entry_intel_info *)
+        slr_next_entry_by_tag(slaunch_get_slrt(), NULL, SLR_ENTRY_INTEL_INFO);
+
+    if ( (mtrr_cap & 0xFF) != intel_info->saved_bsp_mtrrs.mtrr_vcnt )
+    {
+        printk("Bootloader saved %ld MTRR values, but there should be %ld\n",
+               intel_info->saved_bsp_mtrrs.mtrr_vcnt, mtrr_cap & 0xFF);
+        /* Choose the smaller one to be on the safe side. */
+        mtrr_cap = (mtrr_cap & 0xFF) > intel_info->saved_bsp_mtrrs.mtrr_vcnt ?
+                   intel_info->saved_bsp_mtrrs.mtrr_vcnt : mtrr_cap;
+    }
+
+    def_type = intel_info->saved_bsp_mtrrs.default_mem_type;
+    pausing_state = mtrr_pause_caching();
+
+    for ( i = 0; i < (uint8_t)mtrr_cap; i++ )
+    {
+        base = intel_info->saved_bsp_mtrrs.mtrr_pair[i].mtrr_physbase;
+        mask = intel_info->saved_bsp_mtrrs.mtrr_pair[i].mtrr_physmask;
+        wrmsrl(MSR_IA32_MTRR_PHYSBASE(i), base);
+        wrmsrl(MSR_IA32_MTRR_PHYSMASK(i), mask);
+    }
+
+    pausing_state.def_type = def_type;
+    mtrr_resume_caching(pausing_state);
+
+    if ( e820_verbose )
+    {
+        printk("Restored MTRRs:\n"); /* Printed by caller, mtrr_top_of_ram(). */
+
+        /* If MTRRs are not enabled or WB is not a default type, MTRRs won't be printed */
+        if ( !test_bit(11, &def_type) || ((uint8_t)def_type == X86_MT_WB) )
+        {
+            for ( i = 0; i < (uint8_t)mtrr_cap; i++ )
+            {
+                rdmsrl(MSR_IA32_MTRR_PHYSBASE(i), base);
+                rdmsrl(MSR_IA32_MTRR_PHYSMASK(i), mask);
+                printk(" MTRR[%d]: base %"PRIx64" mask %"PRIx64"\n",
+                       i, base, mask);
+            }
+        }
+    }
+
+    /* Restore IA32_MISC_ENABLES */
+    wrmsrl(MSR_IA32_MISC_ENABLE, intel_info->saved_misc_enable_msr);
+}
-- 
2.49.0



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Subject: Re: [PATCH 00/21] x86: Trenchboot Secure Launch DRTM (Xen)
To: Sergii Dmytruk 
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 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 22.04.2025 17:06, Sergii Dmytruk wrote:
> Kacper Stojek (2):
>   x86/boot: add MLE header and new entry point
>   xen/arch/x86: reserve TXT memory
> 
> Krystian Hebel (7):
>   x86/include/asm/intel_txt.h: constants and accessors for TXT registers
>     and heap
>   x86/boot/slaunch_early: early TXT checks and boot data retrieval
>   x86/intel_txt.c: restore boot MTRRs
>   lib/sha1.c: add file
>   x86/tpm.c: code for early hashing and extending PCRs (for TPM1.2)
>   x86/boot: choose AP stack based on APIC ID
>   x86/smpboot.c: TXT AP bringup
> 
> Michał Żygowski (2):
>   x86/hvm: Check for VMX in SMX when slaunch active
>   x86/cpu: report SMX, TXT and SKINIT capabilities
> 
> Sergii Dmytruk (10):
>   include/xen/slr_table.h: Secure Launch Resource Table definitions
>   x86/boot/slaunch_early: implement early initialization
>   x86/mtrr: expose functions for pausing caching
>   lib/sha256.c: add file
>   x86/tpm.c: support extending PCRs of TPM2.0
>   x86/tpm.c: implement event log for TPM2.0
>   arch/x86: process DRTM policy
>   x86/boot: find MBI and SLRT on AMD
>   arch/x86: support slaunch with AMD SKINIT
>   x86/slaunch: support EFI boot
> 
>  .gitignore                                  |    1 +
>  docs/hypervisor-guide/x86/how-xen-boots.rst |    7 +
>  xen/arch/x86/Makefile                       |   12 +-
>  xen/arch/x86/boot/Makefile                  |   10 +-
>  xen/arch/x86/boot/head.S                    |  250 +++++
>  xen/arch/x86/boot/slaunch_early.c           |  105 ++
>  xen/arch/x86/boot/trampoline.S              |   40 +-
>  xen/arch/x86/boot/x86_64.S                  |   42 +-
>  xen/arch/x86/cpu/amd.c                      |   14 +
>  xen/arch/x86/cpu/cpu.h                      |    1 +
>  xen/arch/x86/cpu/hygon.c                    |    1 +
>  xen/arch/x86/cpu/intel.c                    |   44 +
>  xen/arch/x86/cpu/mtrr/generic.c             |   51 +-
>  xen/arch/x86/e820.c                         |    5 +
>  xen/arch/x86/efi/efi-boot.h                 |   90 +-
>  xen/arch/x86/efi/fixmlehdr.c                |  122 +++
>  xen/arch/x86/hvm/vmx/vmcs.c                 |    3 +-
>  xen/arch/x86/include/asm/apicdef.h          |    4 +
>  xen/arch/x86/include/asm/intel_txt.h        |  452 ++++++++
>  xen/arch/x86/include/asm/mm.h               |    3 +
>  xen/arch/x86/include/asm/msr-index.h        |    3 +
>  xen/arch/x86/include/asm/mtrr.h             |    8 +
>  xen/arch/x86/include/asm/processor.h        |    1 +
>  xen/arch/x86/include/asm/slaunch.h          |   91 ++
>  xen/arch/x86/include/asm/tpm.h              |   19 +
>  xen/arch/x86/intel_txt.c                    |  177 ++++
>  xen/arch/x86/setup.c                        |   32 +-
>  xen/arch/x86/slaunch.c                      |  464 ++++++++
>  xen/arch/x86/smpboot.c                      |   57 +
>  xen/arch/x86/tboot.c                        |   20 +-
>  xen/arch/x86/tpm.c                          | 1057 +++++++++++++++++++
>  xen/common/efi/boot.c                       |    4 +
>  xen/common/efi/runtime.c                    |    1 +
>  xen/include/xen/efi.h                       |    1 +
>  xen/include/xen/sha1.h                      |   12 +
>  xen/include/xen/sha256.h                    |   12 +
>  xen/include/xen/slr_table.h                 |  274 +++++
>  xen/lib/Makefile                            |    2 +
>  xen/lib/sha1.c                              |  240 +++++
>  xen/lib/sha256.c                            |  238 +++++
>  40 files changed, 3914 insertions(+), 56 deletions(-)
>  create mode 100644 xen/arch/x86/boot/slaunch_early.c
>  create mode 100644 xen/arch/x86/efi/fixmlehdr.c
>  create mode 100644 xen/arch/x86/include/asm/intel_txt.h
>  create mode 100644 xen/arch/x86/include/asm/slaunch.h
>  create mode 100644 xen/arch/x86/include/asm/tpm.h
>  create mode 100644 xen/arch/x86/intel_txt.c
>  create mode 100644 xen/arch/x86/slaunch.c
>  create mode 100644 xen/arch/x86/tpm.c
>  create mode 100644 xen/include/xen/sha1.h
>  create mode 100644 xen/include/xen/sha256.h
>  create mode 100644 xen/include/xen/slr_table.h

Just one basic nit right here: In the names of new files you add, please
prefer dashes over underscores.

Jan


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Subject: Re: [PATCH v2 5/8] asm-generic: move some parts of Arm's
 domain_build.h to common
To: Jan Beulich 
Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Andrew Cooper ,
 Anthony PERARD ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 4/17/25 4:36 PM, Jan Beulich wrote:
> On 14.04.2025 17:56, Oleksii Kurochko wrote:
>> --- /dev/null
>> +++ b/xen/include/xen/fdt-domain-build.h
>> @@ -0,0 +1,46 @@
>> +/* SPDX-License-Identifier: GPL-2.0-only */
>> +#ifndef __XEN_FDT_DOMAIN_BUILD_H__
>> +#define __XEN_FDT_DOMAIN_BUILD_H__
>> +
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +
>> +#if __has_include()
>> +#   include 
>> +#endif
> Why is this conditional include needed? There's ...

To use everywhere just the generic header xen/fdt-domain-build.h instead of both
xen/fdt-domain-build.h and .

~ Oleksii

>
>> +struct domain;
>> +struct page_info;
>> +struct membanks;
>> +
>> +typedef bool (*alloc_domheap_mem_cb)(struct domain *d, struct page_info *pg,
>> +                                     unsigned int order, void *extra);
>> +bool allocate_domheap_memory(struct domain *d, paddr_t tot_size,
>> +                             alloc_domheap_mem_cb cb, void *extra);
>> +
>> +bool allocate_bank_memory(struct kernel_info *kinfo, gfn_t sgfn,
>> +                          paddr_t tot_size);
>> +void allocate_memory(struct domain *d, struct kernel_info *kinfo);
>> +int construct_domain(struct domain *d, struct kernel_info *kinfo);
>> +int make_chosen_node(const struct kernel_info *kinfo);
>> +int make_cpus_node(const struct domain *d, void *fdt);
>> +int make_hypervisor_node(struct domain *d, const struct kernel_info *kinfo,
>> +                         int addrcells, int sizecells);
>> +int make_memory_node(const struct kernel_info *kinfo, int addrcells,
>> +                     int sizecells, const struct membanks *mem);
>> +int make_timer_node(const struct kernel_info *kinfo);
>> +
>> +unsigned int get_allocation_size(paddr_t size);
>> +
>> +#endif /* __XEN_FDT_DOMAIN_BUILD_H__ */
> ... nothing here showing any dependency thereon.
>
> Jan
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On 4/17/25 4:36 PM, Jan Beulich wrote:

    

    

      
On 14.04.2025 17:56, Oleksii Kurochko wrote:


      

        
--- /dev/null
+++ b/xen/include/xen/fdt-domain-build.h
@@ -0,0 +1,46 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef __XEN_FDT_DOMAIN_BUILD_H__
+#define __XEN_FDT_DOMAIN_BUILD_H__
+
+#include <xen/bootfdt.h>
+#include <xen/device_tree.h>
+#include <xen/fdt-kernel.h>
+#include <xen/types.h>
+
+#if __has_include(<asm/domain_build.h>)
+#   include <asm/domain_build.h>
+#endif


      

      
Why is this conditional include needed? There's ...

    

    
To use everywhere just the generic header xen/fdt-domain-build.h instead of both
xen/fdt-domain-build.h and <asm/domain_build.h>.

~ Oleksii


    

      



      

        
+struct domain;
+struct page_info;
+struct membanks;
+
+typedef bool (*alloc_domheap_mem_cb)(struct domain *d, struct page_info *pg,
+                                     unsigned int order, void *extra);
+bool allocate_domheap_memory(struct domain *d, paddr_t tot_size,
+                             alloc_domheap_mem_cb cb, void *extra);
+
+bool allocate_bank_memory(struct kernel_info *kinfo, gfn_t sgfn,
+                          paddr_t tot_size);
+void allocate_memory(struct domain *d, struct kernel_info *kinfo);
+int construct_domain(struct domain *d, struct kernel_info *kinfo);
+int make_chosen_node(const struct kernel_info *kinfo);
+int make_cpus_node(const struct domain *d, void *fdt);
+int make_hypervisor_node(struct domain *d, const struct kernel_info *kinfo,
+                         int addrcells, int sizecells);
+int make_memory_node(const struct kernel_info *kinfo, int addrcells,
+                     int sizecells, const struct membanks *mem);
+int make_timer_node(const struct kernel_info *kinfo);
+
+unsigned int get_allocation_size(paddr_t size);
+
+#endif /* __XEN_FDT_DOMAIN_BUILD_H__ */


      

      
... nothing here showing any dependency thereon.

Jan


    

  


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Subject: Re: [PATCH v2 7/8] xen/common: dom0less: introduce common
 domain-build.c
To: Jan Beulich 
Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Andrew Cooper ,
 Anthony PERARD ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 4/17/25 4:45 PM, Jan Beulich wrote:
> On 14.04.2025 17:56, Oleksii Kurochko wrote:
>> --- a/xen/include/xen/fdt-domain-build.h
>> +++ b/xen/include/xen/fdt-domain-build.h
>> @@ -5,6 +5,7 @@
>>   #include 
>>   #include 
>>   #include 
>> +#include 
>>   #include 
>>   
>>   #if __has_include()
>> @@ -32,7 +33,37 @@ int make_memory_node(const struct kernel_info *kinfo, int addrcells,
>>                        int sizecells, const struct membanks *mem);
>>   int make_timer_node(const struct kernel_info *kinfo);
>>   
>> -unsigned int get_allocation_size(paddr_t size);
>> +
>> +static inline int get_allocation_size(paddr_t size)
>> +{
>> +    /*
>> +     * get_order_from_bytes returns the order greater than or equal to
>> +     * the given size, but we need less than or equal. Adding one to
>> +     * the size pushes an evenly aligned size into the next order, so
>> +     * we can then unconditionally subtract 1 from the order which is
>> +     * returned.
>> +     */
>> +    return get_order_from_bytes(size + 1) - 1;
>> +}
>> +
>> +typedef unsigned long (*copy_to_guest_phys_cb)(struct domain *d,
>> +                                               paddr_t gpa,
>> +                                               void *buf,
> This very much looks like the latest now, when the code is made common,
> it wants to be const void *. Even if this may require another prereq
> patch.
>
> However, instead of using a function pointer, couldn't the now common
> code call copy_to_guest_phys_flush_dcache() conditionally upon
> IS_ENABLED(CONFIG_)?

I thought about having IS_ENABLED(CONFIG_ARM) as, at the moment, this is necessary to
be called only for Arm as guest domain on Arm could be ran with cache disabled so to be sure
that DTB, kernel and initrd is fully in RAM this function should be called.

For RISC-V, it isn't possible case as guest domain won't run with cache disabled.

> Or provide a weak
> copy_to_guest_phys_flush_dcache() which would simply call
> copy_to_guest_phys()?

Could it be a weak function with empty implementation?
Is copy_to_guest_phys() implemented for other archs?


~ Oleksii

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On 4/17/25 4:45 PM, Jan Beulich wrote:

    

    

      
On 14.04.2025 17:56, Oleksii Kurochko wrote:


      

        
--- a/xen/include/xen/fdt-domain-build.h
+++ b/xen/include/xen/fdt-domain-build.h
@@ -5,6 +5,7 @@
 #include <xen/bootfdt.h>
 #include <xen/device_tree.h>
 #include <xen/fdt-kernel.h>
+#include <xen/mm.h>
 #include <xen/types.h>
 
 #if __has_include(<asm/domain_build.h>)
@@ -32,7 +33,37 @@ int make_memory_node(const struct kernel_info *kinfo, int addrcells,
                      int sizecells, const struct membanks *mem);
 int make_timer_node(const struct kernel_info *kinfo);
 
-unsigned int get_allocation_size(paddr_t size);
+
+static inline int get_allocation_size(paddr_t size)
+{
+    /*
+     * get_order_from_bytes returns the order greater than or equal to
+     * the given size, but we need less than or equal. Adding one to
+     * the size pushes an evenly aligned size into the next order, so
+     * we can then unconditionally subtract 1 from the order which is
+     * returned.
+     */
+    return get_order_from_bytes(size + 1) - 1;
+}
+
+typedef unsigned long (*copy_to_guest_phys_cb)(struct domain *d,
+                                               paddr_t gpa,
+                                               void *buf,


      

      
This very much looks like the latest now, when the code is made common,
it wants to be const void *. Even if this may require another prereq
patch.

However, instead of using a function pointer, couldn't the now common
code call copy_to_guest_phys_flush_dcache() conditionally upon
IS_ENABLED(CONFIG_<whatever>)? 

    

    
I thought about having IS_ENABLED(CONFIG_ARM) as, at the moment, this is necessary to
be called only for Arm as guest domain on Arm could be ran with cache disabled so to be sure
that DTB, kernel and initrd is fully in RAM this function should be called.

For RISC-V, it isn't possible case as guest domain won't run with cache disabled.


    

      
Or provide a weak
copy_to_guest_phys_flush_dcache() which would simply call
copy_to_guest_phys()?

    

    
Could it be a weak function with empty implementation?
Is copy_to_guest_phys() implemented for other archs?


~ Oleksii

  


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Date: Tue, 22 Apr 2025 17:36:22 +0200
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User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH 09/21] lib/sha1.c: add file
To: Sergii Dmytruk ,
 Krystian Hebel 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 trenchboot-devel@googlegroups.com, xen-devel@lists.xenproject.org
References: 
 <8dec423182ed60e2233ed87d98066fed6dc20caf.1745172094.git.sergii.dmytruk@3mdeb.com>
Content-Language: en-US
From: Jan Beulich 
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On 22.04.2025 17:06, Sergii Dmytruk wrote:
> From: Krystian Hebel 
> 
> The code comes from [1] and is licensed under GPL-2.0 license.
> It's a combination of:
>  - include/crypto/sha1.h
>  - include/crypto/sha1_base.h
>  - lib/crypto/sha1.c
>  - crypto/sha1_generic.c
> 
> Changes:
>  - includes
>  - formatting
>  - renames and splicing of some trivial functions that are called once
>  - dropping of `int` return values (only zero was ever returned)
>  - getting rid of references to `struct shash_desc`

Since you did move the code to (largely) Xen style, a few further requests
in that direction:

> --- /dev/null
> +++ b/xen/include/xen/sha1.h
> @@ -0,0 +1,12 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +
> +#ifndef __XEN_SHA1_H
> +#define __XEN_SHA1_H
> +
> +#include 
> +
> +#define SHA1_DIGEST_SIZE  20
> +
> +void sha1_hash(const u8 *data, unsigned int len, u8 *out);

uint8_t please in both instances here, and more generally {,u}int_t
in place of {s,u}.

> --- a/xen/lib/Makefile
> +++ b/xen/lib/Makefile
> @@ -38,6 +38,7 @@ lib-y += strtoll.o
>  lib-y += strtoul.o
>  lib-y += strtoull.o
>  lib-$(CONFIG_X86) += x86-generic-hweightl.o
> +lib-$(CONFIG_X86) += sha1.o

Please obey to alphabetic sorting.

> --- /dev/null
> +++ b/xen/lib/sha1.c
> @@ -0,0 +1,240 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * SHA1 routine optimized to do word accesses rather than byte accesses,
> + * and to avoid unnecessary copies into the context array.
> + *
> + * This was based on the git SHA1 implementation.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +/*
> + * If you have 32 registers or more, the compiler can (and should)
> + * try to change the array[] accesses into registers. However, on
> + * machines with less than ~25 registers, that won't really work,
> + * and at least gcc will make an unholy mess of it.
> + *
> + * So to avoid that mess which just slows things down, we force
> + * the stores to memory to actually happen (we might be better off
> + * with a 'W(t)=(val);asm("":"+m" (W(t))' there instead, as
> + * suggested by Artur Skawina - that will also make gcc unable to
> + * try to do the silly "optimize away loads" part because it won't
> + * see what the value will be).
> + *
> + * Ben Herrenschmidt reports that on PPC, the C version comes close
> + * to the optimized asm with this (ie on PPC you don't want that
> + * 'volatile', since there are lots of registers).
> + *
> + * On ARM we get the best code generation by forcing a full memory barrier
> + * between each SHA_ROUND, otherwise gcc happily get wild with spilling and
> + * the stack frame size simply explode and performance goes down the drain.
> + */
> +
> +#ifdef CONFIG_X86
> +  #define setW(x, val) (*(volatile uint32_t *)&W(x) = (val))

The # of pre-processor directives generally wants to be in the first column.

> +#elif defined(CONFIG_ARM)
> +  #define setW(x, val) do { W(x) = (val); __asm__("":::"memory"); } while ( 0 )

__asm__ ( "" ::: "memory" );

as far as style goes. But then I see no need to open-code barrier().

> +#else
> +  #define setW(x, val) (W(x) = (val))
> +#endif
> +
> +/* This "rolls" over the 512-bit array */
> +#define W(x) (array[(x) & 15])
> +
> +/*
> + * Where do we get the source from? The first 16 iterations get it from
> + * the input data, the next mix it from the 512-bit array.
> + */
> +#define SHA_SRC(t) get_unaligned_be32((uint32_t *)data + t)
> +#define SHA_MIX(t) rol32(W(t + 13) ^ W(t + 8) ^ W(t + 2) ^ W(t), 1)

I fear Misra isn't going to like the lack of parenthesization of macro
arguments used in expressions. This looks to be an issue with most
macros here.

> +#define SHA_ROUND(t, input, fn, constant, A, B, C, D, E) do { \
> +        uint32_t TEMP = input(t); setW(t, TEMP);              \
> +        E += TEMP + rol32(A, 5) + (fn) + (constant);          \
> +        B = ror32(B, 2);                                      \
> +        TEMP = E; E = D; D = C; C = B; B = A; A = TEMP;       \
> +    } while ( 0 )
> +
> +#define T_0_15(t, A, B, C, D, E)  \
> +        SHA_ROUND(t, SHA_SRC, (((C ^ D) & B) ^ D), 0x5a827999, A, B, C, D, E)
> +#define T_16_19(t, A, B, C, D, E) \
> +        SHA_ROUND(t, SHA_MIX, (((C ^ D) & B) ^ D), 0x5a827999, A, B, C, D, E)
> +#define T_20_39(t, A, B, C, D, E) \
> +        SHA_ROUND(t, SHA_MIX, (B ^ C ^ D), 0x6ed9eba1, A, B, C, D, E)
> +#define T_40_59(t, A, B, C, D, E)                                             \
> +        SHA_ROUND(t, SHA_MIX, ((B & C) + (D & (B ^ C))), 0x8f1bbcdc, A, B, C, \
> +                  D, E)
> +#define T_60_79(t, A, B, C, D, E) \
> +        SHA_ROUND(t, SHA_MIX, (B ^ C ^ D), 0xca62c1d6, A, B, C, D, E)
> +
> +#define SHA1_BLOCK_SIZE         64
> +#define SHA1_WORKSPACE_WORDS    16
> +
> +struct sha1_state {
> +    uint32_t state[SHA1_DIGEST_SIZE / 4];
> +    uint64_t count;
> +    uint8_t buffer[SHA1_BLOCK_SIZE];
> +};
> +
> +typedef void sha1_block_fn(struct sha1_state *sst, const uint8_t *src, int blocks);

Please respect line length restrictions. The use of plain int here also looks
questionable, as just from the name that parameter looks like it can't have a
negative argument passed for it. This will want adjusting elsewhere as well.

> +/**
> + * sha1_transform - single block SHA1 transform (deprecated)
> + *
> + * @digest: 160 bit digest to update
> + * @data:   512 bits of data to hash
> + * @array:  16 words of workspace (see note)
> + *
> + * This function executes SHA-1's internal compression function.  It updates the
> + * 160-bit internal state (@digest) with a single 512-bit data block (@data).
> + *
> + * Don't use this function.  SHA-1 is no longer considered secure.  And even if
> + * you do have to use SHA-1, this isn't the correct way to hash something with
> + * SHA-1 as this doesn't handle padding and finalization.
> + *
> + * Note: If the hash is security sensitive, the caller should be sure
> + * to clear the workspace. This is left to the caller to avoid
> + * unnecessary clears between chained hashing operations.
> + */
> +void sha1_transform(uint32_t *digest, const uint8_t *data, uint32_t *array)

You add no declaration of this function in the header. Should it be static?
This would also help with the "Don't use ..." part of the comment.

Jan


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Subject: Re: [PATCH v2 7/8] xen/common: dom0less: introduce common
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From: Oleksii Kurochko 
To: Jan Beulich 
Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
 Michal Orzel ,
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 Anthony PERARD ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 4/22/25 5:26 PM, Oleksii Kurochko wrote:
>
>
> On 4/17/25 4:45 PM, Jan Beulich wrote:
>> On 14.04.2025 17:56, Oleksii Kurochko wrote:
>>> --- a/xen/include/xen/fdt-domain-build.h
>>> +++ b/xen/include/xen/fdt-domain-build.h
>>> @@ -5,6 +5,7 @@
>>>   #include 
>>>   #include 
>>>   #include 
>>> +#include 
>>>   #include 
>>>   
>>>   #if __has_include()
>>> @@ -32,7 +33,37 @@ int make_memory_node(const struct kernel_info *kinfo, int addrcells,
>>>                        int sizecells, const struct membanks *mem);
>>>   int make_timer_node(const struct kernel_info *kinfo);
>>>   
>>> -unsigned int get_allocation_size(paddr_t size);
>>> +
>>> +static inline int get_allocation_size(paddr_t size)
>>> +{
>>> +    /*
>>> +     * get_order_from_bytes returns the order greater than or equal to
>>> +     * the given size, but we need less than or equal. Adding one to
>>> +     * the size pushes an evenly aligned size into the next order, so
>>> +     * we can then unconditionally subtract 1 from the order which is
>>> +     * returned.
>>> +     */
>>> +    return get_order_from_bytes(size + 1) - 1;
>>> +}
>>> +
>>> +typedef unsigned long (*copy_to_guest_phys_cb)(struct domain *d,
>>> +                                               paddr_t gpa,
>>> +                                               void *buf,
>> This very much looks like the latest now, when the code is made common,
>> it wants to be const void *. Even if this may require another prereq
>> patch.
>>
>> However, instead of using a function pointer, couldn't the now common
>> code call copy_to_guest_phys_flush_dcache() conditionally upon
>> IS_ENABLED(CONFIG_)?
> I thought about having IS_ENABLED(CONFIG_ARM) as, at the moment, this is necessary to
> be called only for Arm as guest domain on Arm could be ran with cache disabled so to be sure
> that DTB, kernel and initrd is fully in RAM this function should be called.
>
> For RISC-V, it isn't possible case as guest domain won't run with cache disabled.

Here I meant flush_dcache() part of copy_to_guest_phys_flush_dcache().

~ Oleksii

>> Or provide a weak
>> copy_to_guest_phys_flush_dcache() which would simply call
>> copy_to_guest_phys()?
> Could it be a weak function with empty implementation?
> Is copy_to_guest_phys() implemented for other archs?

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On 4/22/25 5:26 PM, Oleksii Kurochko
      wrote:

    

    

      
      


      

      
On 4/17/25 4:45 PM, Jan Beulich
        wrote:

      

      

        
On 14.04.2025 17:56, Oleksii Kurochko wrote:


        

          
--- a/xen/include/xen/fdt-domain-build.h
+++ b/xen/include/xen/fdt-domain-build.h
@@ -5,6 +5,7 @@
 #include <xen/bootfdt.h>
 #include <xen/device_tree.h>
 #include <xen/fdt-kernel.h>
+#include <xen/mm.h>
 #include <xen/types.h>
 
 #if __has_include(<asm/domain_build.h>)
@@ -32,7 +33,37 @@ int make_memory_node(const struct kernel_info *kinfo, int addrcells,
                      int sizecells, const struct membanks *mem);
 int make_timer_node(const struct kernel_info *kinfo);
 
-unsigned int get_allocation_size(paddr_t size);
+
+static inline int get_allocation_size(paddr_t size)
+{
+    /*
+     * get_order_from_bytes returns the order greater than or equal to
+     * the given size, but we need less than or equal. Adding one to
+     * the size pushes an evenly aligned size into the next order, so
+     * we can then unconditionally subtract 1 from the order which is
+     * returned.
+     */
+    return get_order_from_bytes(size + 1) - 1;
+}
+
+typedef unsigned long (*copy_to_guest_phys_cb)(struct domain *d,
+                                               paddr_t gpa,
+                                               void *buf,


        

        
This very much looks like the latest now, when the code is made common,
it wants to be const void *. Even if this may require another prereq
patch.

However, instead of using a function pointer, couldn't the now common
code call copy_to_guest_phys_flush_dcache() conditionally upon
IS_ENABLED(CONFIG_<whatever>)? 

      

      
I thought about having IS_ENABLED(CONFIG_ARM) as, at the moment, this is necessary to
be called only for Arm as guest domain on Arm could be ran with cache disabled so to be sure
that DTB, kernel and initrd is fully in RAM this function should be called.

For RISC-V, it isn't possible case as guest domain won't run with cache disabled.

    

    
Here I meant flush_dcache() part of copy_to_guest_phys_flush_dcache().

~ Oleksii


    

      

      

        
Or provide a weak
copy_to_guest_phys_flush_dcache() which would simply call
copy_to_guest_phys()?

      

      
Could it be a weak function with empty implementation?
Is copy_to_guest_phys() implemented for other archs?

    

    

  


--------------SnOcsL6gdKBY7OSz5IHvCJ8M--


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On 22/04/2025 4:06 pm, Sergii Dmytruk wrote:
>  xen/include/xen/sha256.h |  12 ++
>  xen/lib/Makefile         |   1 +
>  xen/lib/sha256.c         | 238 +++++++++++++++++++++++++++++++++++++++
>  3 files changed, 251 insertions(+)
>  create mode 100644 xen/include/xen/sha256.h
>  create mode 100644 xen/lib/sha256.c

I added SHA2 a little while back, derived from the Trenchboot tree.

See 372af524411f5a013bcb0b117073d8d07c026563 (and a few follow-up fixes).

It should have everything needed, but we can adjust if necessary.

We need to integrate SHA1 in a similar way.  Xen now has various MISRA
requirements to adhere to, which requires some adjustments, but I can
advise if it isn't clear from the sha2 work I already did.

~Andrew


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Subject: Re: [PATCH 10/21] lib/sha256.c: add file
To: Sergii Dmytruk 
Cc: Andrew Cooper ,
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 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 22.04.2025 17:06, Sergii Dmytruk wrote:
> The code comes from [1] and is licensed under GPL-2.0 or later version
> of the license.  It's a combination of:
>  - include/crypto/sha2.h
>  - include/crypto/sha256_base.h
>  - lib/crypto/sha256.c
>  - crypto/sha256_generic.c
> 
> Changes:
>  - includes
>  - formatting
>  - renames and splicing of some trivial functions that are called once
>  - dropping of `int` return values (only zero was ever returned)
>  - getting rid of references to `struct shash_desc`
> 
> [1]: https://github.com/torvalds/linux/tree/afdab700f65e14070d8ab92175544b1c62b8bf03
> 
> Signed-off-by: Sergii Dmytruk 
> Signed-off-by: Krystian Hebel 

Most comments just give on patch 09 apply here as well.

Jan


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Subject: Re: [PATCH v2 5/8] asm-generic: move some parts of Arm's
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On 22.04.2025 17:12, Oleksii Kurochko wrote:
> On 4/17/25 4:36 PM, Jan Beulich wrote:
>> On 14.04.2025 17:56, Oleksii Kurochko wrote:
>>> --- /dev/null
>>> +++ b/xen/include/xen/fdt-domain-build.h
>>> @@ -0,0 +1,46 @@
>>> +/* SPDX-License-Identifier: GPL-2.0-only */
>>> +#ifndef __XEN_FDT_DOMAIN_BUILD_H__
>>> +#define __XEN_FDT_DOMAIN_BUILD_H__
>>> +
>>> +#include 
>>> +#include 
>>> +#include 
>>> +#include 
>>> +
>>> +#if __has_include()
>>> +#   include 
>>> +#endif
>> Why is this conditional include needed? There's ...
> 
> To use everywhere just the generic header xen/fdt-domain-build.h instead of both
> xen/fdt-domain-build.h and .

But elsewhere we're actively trying to remove dependencies between headers.

Jan


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Date: Tue, 22 Apr 2025 17:53:23 +0200
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Subject: Re: [PATCH v2 7/8] xen/common: dom0less: introduce common
 domain-build.c
To: Oleksii Kurochko 
Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Andrew Cooper ,
 Anthony PERARD ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 xen-devel@lists.xenproject.org
References: 
 <9dbf651ce177a7292f80879373e86a51305f216e.1744626032.git.oleksii.kurochko@gmail.com>
 
 <6010658f-9e29-40d9-902c-890cb27a2a4b@gmail.com>
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From: Jan Beulich 
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On 22.04.2025 17:26, Oleksii Kurochko wrote:
> 
> On 4/17/25 4:45 PM, Jan Beulich wrote:
>> On 14.04.2025 17:56, Oleksii Kurochko wrote:
>>> --- a/xen/include/xen/fdt-domain-build.h
>>> +++ b/xen/include/xen/fdt-domain-build.h
>>> @@ -5,6 +5,7 @@
>>>   #include 
>>>   #include 
>>>   #include 
>>> +#include 
>>>   #include 
>>>   
>>>   #if __has_include()
>>> @@ -32,7 +33,37 @@ int make_memory_node(const struct kernel_info *kinfo, int addrcells,
>>>                        int sizecells, const struct membanks *mem);
>>>   int make_timer_node(const struct kernel_info *kinfo);
>>>   
>>> -unsigned int get_allocation_size(paddr_t size);
>>> +
>>> +static inline int get_allocation_size(paddr_t size)
>>> +{
>>> +    /*
>>> +     * get_order_from_bytes returns the order greater than or equal to
>>> +     * the given size, but we need less than or equal. Adding one to
>>> +     * the size pushes an evenly aligned size into the next order, so
>>> +     * we can then unconditionally subtract 1 from the order which is
>>> +     * returned.
>>> +     */
>>> +    return get_order_from_bytes(size + 1) - 1;
>>> +}
>>> +
>>> +typedef unsigned long (*copy_to_guest_phys_cb)(struct domain *d,
>>> +                                               paddr_t gpa,
>>> +                                               void *buf,
>> This very much looks like the latest now, when the code is made common,
>> it wants to be const void *. Even if this may require another prereq
>> patch.
>>
>> However, instead of using a function pointer, couldn't the now common
>> code call copy_to_guest_phys_flush_dcache() conditionally upon
>> IS_ENABLED(CONFIG_)?
> 
> I thought about having IS_ENABLED(CONFIG_ARM) as, at the moment, this is necessary to
> be called only for Arm as guest domain on Arm could be ran with cache disabled so to be sure
> that DTB, kernel and initrd is fully in RAM this function should be called.
> 
> For RISC-V, it isn't possible case as guest domain won't run with cache disabled.
> 
>> Or provide a weak
>> copy_to_guest_phys_flush_dcache() which would simply call
>> copy_to_guest_phys()?
> 
> Could it be a weak function with empty implementation?

Not really, no, as the fallback has to work for the case where cache
management isn't explicitly necessary.

> Is copy_to_guest_phys() implemented for other archs?

What "other" are you thinking about here? An arch wanting to use this
code would need to provide one. But x86, for example, isn't going to
build this code aiui, and hence has no need for such a function. We
have hvm_copy_to_guest_phys() there.

Hmm, but I notice only now that Arm has no plain copy_to_guest_phys().
This certainly breaks the fallback idea I had outlined. So perhaps I
should recommend that you stick to the function pointer approach for
now, unless Arm folks come up with any good suggestion. (I notice PPC
has a (stub) copy_to_guest_phys_flush_dcache(), too; it's unclear to
me whether that's really needed there, or whether it isn't more like
RISC-V in this regard.)

Jan


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Date: Tue, 22 Apr 2025 17:59:13 +0200
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Subject: Re: [PATCH v3 02/11] driver/pci: Get next capability without passing
 caps
To: Jiqian Chen 
Cc: Huang Rui , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <20250421061903.1542652-1-Jiqian.Chen@amd.com>
 <20250421061903.1542652-3-Jiqian.Chen@amd.com>
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On 21.04.2025 08:18, Jiqian Chen wrote:
> Modify function pci_find_next_cap_ttl to support returning position
> of next capability when size "n" is zero.
> 
> That can help caller to get next capability offset if caller just
> has a information of current capability offset.
> 
> That will be used in a follow-on change.
> 
> Signed-off-by: Jiqian Chen 

Acked-by: Jan Beulich 
albeit ...

> --- a/xen/drivers/pci/pci.c
> +++ b/xen/drivers/pci/pci.c
> @@ -55,6 +55,9 @@ unsigned int pci_find_next_cap_ttl(pci_sbdf_t sbdf, unsigned int pos,
>  
>          if ( id == 0xff )
>              break;
> +        if ( n == 0 )
> +            return pos;
> +        ASSERT(caps);
>          for ( i = 0; i < n; i++ )
>          {
>              if ( id == caps[i] )

... blank lines around you insertion might have been nice. I may take the
liberty of adding them while committing.

Jan


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Subject: Re: [PATCH v3 03/11] vpci/header: Emulate legacy capability list for
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To: Jiqian Chen 
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On 21.04.2025 08:18, Jiqian Chen wrote:
> @@ -759,10 +759,11 @@ static int vpci_init_capability_list(struct pci_dev *pdev)
>              PCI_CAP_ID_MSI,
>              PCI_CAP_ID_MSIX,
>          };
> +        const unsigned int *caps = is_hwdom ? NULL : supported_caps;
> +        const unsigned int n = is_hwdom ? 0 : ARRAY_SIZE(supported_caps);
>  
>          next = pci_find_next_cap_ttl(pdev->sbdf, PCI_CAPABILITY_LIST,
> -                                     supported_caps,
> -                                     ARRAY_SIZE(supported_caps), &ttl);
> +                                     caps, n, &ttl);

As per the v3 adjustment to patch 02, you can pass supported_caps here in
all cases. Only n needs to be zero for the hwdom case.

Jan


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Subject: Re: [PATCH v3 05/11] vpci: Refactor REGISTER_VPCI_INIT
To: Jiqian Chen 
Cc: Huang Rui , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <20250421061903.1542652-1-Jiqian.Chen@amd.com>
 <20250421061903.1542652-6-Jiqian.Chen@amd.com>
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From: Jan Beulich 
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On 21.04.2025 08:18, Jiqian Chen wrote:
> Refactor REGISTER_VPCI_INIT to contain more capability specific
> information, this is benifit for follow-on changes to hide capability
> which initialization fails.
> 
> What's more, change the definition of init_header() since it is
> not a capability and it is needed for all devices' PCI config space.
> 
> Note:
> Call vpci_make_msix_hole() in the end of init_msix() since the
> change of sequence of init_header() and init_msix().
> The fini hook will be implemented in follow-on changes.
> 
> Signed-off-by: Jiqian Chen 

>From the description I can't derive the need for ...

> --- a/xen/include/xen/xen.lds.h
> +++ b/xen/include/xen/xen.lds.h
> @@ -187,7 +187,7 @@
>  #define VPCI_ARRAY               \
>         . = ALIGN(POINTER_ALIGN); \
>         __start_vpci_array = .;   \
> -       *(SORT(.data.vpci.*))     \
> +       *(.data.vpci.*)     \
>         __end_vpci_array = .;
>  #else
>  #define VPCI_ARRAY

... this change.

Jan


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Subject: Re: [PATCH v3 07/11] vpci: Hide extended capability when it fails to
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To: Jiqian Chen 
Cc: Huang Rui , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , xen-devel@lists.xenproject.org
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On 21.04.2025 08:18, Jiqian Chen wrote:
> --- a/xen/include/xen/pci_regs.h
> +++ b/xen/include/xen/pci_regs.h
> @@ -449,6 +449,7 @@
>  #define PCI_EXT_CAP_ID(header)		((header) & 0x0000ffff)
>  #define PCI_EXT_CAP_VER(header)		(((header) >> 16) & 0xf)
>  #define PCI_EXT_CAP_NEXT(header)	(((header) >> 20) & 0xffc)
> +#define PCI_EXT_CAP_NEXT_MASK		0xFFC00000U

To avoid introducing redundancy, imo this addition calls for

#define PCI_EXT_CAP_NEXT(header)	MASK_EXTR(header, PCI_EXT_CAP_NEXT_MASK)

now.

Jan


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From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, cardoe@cardoe.com, marmarek@invisiblethingslab.com, sstabellini@kernel.org, dmukhin@ford.com
Subject: [PATCH v3 0/4] CI: updates to XTF CI runners
Message-ID: <20250422161819.2089738-1-dmukhin@ford.com>
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The series started from adding new argo XTF CI job and ended up with updati=
ng
all XTF runners and related CI jobs.

It unifies the XTF runner scripts so that it is possible to use one script =
for
executing any XTF test under QEMU. That simplifies running XTFs locally and=
 in
CI.

Patch 1 reworks x86 XTF runner.
Patch 2 reworks x86 EFI XTF.
Patch 3 reworks Arm64 XTF runner.
Patch 4 adds new argo x86 XTF CI job.

CI run: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines/17788=
12896

Denis Mukhin (4):
  CI: unify x86 XTF test runner
  CI: switch x86 EFI smoke test runner to qemu-xtf.sh
  CI: switch arm64 XTF test runner to qemu-xtf.sh
  CI: add argo x86 XTF test

 automation/gitlab-ci/test.yaml                |  23 ++-
 automation/scripts/.gitignore                 |   6 +
 .../scripts/include/configs/xtf-arm64-config  |   2 +
 .../scripts/include/configs/xtf-x86-64-config |   0
 .../include/configs/xtf-x86-64-efi-config     |   0
 automation/scripts/include/xtf-arm64          |  81 ++++++++++
 automation/scripts/include/xtf-runner         | 138 ++++++++++++++++++
 automation/scripts/include/xtf-x86-64         |  31 ++++
 automation/scripts/include/xtf-x86-64-efi     |  52 +++++++
 automation/scripts/qemu-smoke-x86-64-efi.sh   |  43 ------
 automation/scripts/qemu-smoke-x86-64.sh       |  26 ----
 automation/scripts/qemu-xtf-dom0less-arm64.sh |  68 ---------
 automation/scripts/qemu-xtf.sh                |  28 ++++
 13 files changed, 354 insertions(+), 144 deletions(-)
 create mode 100644 automation/scripts/.gitignore
 create mode 100644 automation/scripts/include/configs/xtf-arm64-config
 create mode 100644 automation/scripts/include/configs/xtf-x86-64-config
 create mode 100644 automation/scripts/include/configs/xtf-x86-64-efi-confi=
g
 create mode 100644 automation/scripts/include/xtf-arm64
 create mode 100644 automation/scripts/include/xtf-runner
 create mode 100644 automation/scripts/include/xtf-x86-64
 create mode 100644 automation/scripts/include/xtf-x86-64-efi
 delete mode 100755 automation/scripts/qemu-smoke-x86-64-efi.sh
 delete mode 100755 automation/scripts/qemu-smoke-x86-64.sh
 delete mode 100755 automation/scripts/qemu-xtf-dom0less-arm64.sh
 create mode 100755 automation/scripts/qemu-xtf.sh

--=20
2.34.1




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Date: Tue, 22 Apr 2025 16:18:48 +0000
To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, cardoe@cardoe.com, marmarek@invisiblethingslab.com, sstabellini@kernel.org, dmukhin@ford.com
Subject: [PATCH v3 1/4] CI: unify x86 XTF test runner
Message-ID: <20250422161819.2089738-2-dmukhin@ford.com>
In-Reply-To: <20250422161819.2089738-1-dmukhin@ford.com>
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From: Denis Mukhin 

Add test runner script qemu-xtf.sh which is allows any XTF x86 test to be
easily executed. Test runner is invoked from the qemu-smoke* jobs with the
hardcoded parameters.

Each x86 XTF job lead time is reduced a bit since only the test-related cod=
e
is built, not the entire XTF project.

Add .gitignore to avoid committing test artifacts by mistake.

Signed-off-by: Denis Mukhin 
---
Changes v2->v3:
- fixes for .gitignore
---
 automation/gitlab-ci/test.yaml                |   8 +-
 automation/scripts/.gitignore                 |   3 +
 .../scripts/include/configs/xtf-x86-64-config |   0
 automation/scripts/include/xtf-runner         | 131 ++++++++++++++++++
 automation/scripts/include/xtf-x86-64         |  31 +++++
 automation/scripts/qemu-smoke-x86-64.sh       |  26 ----
 automation/scripts/qemu-xtf.sh                |  28 ++++
 7 files changed, 197 insertions(+), 30 deletions(-)
 create mode 100644 automation/scripts/.gitignore
 create mode 100644 automation/scripts/include/configs/xtf-x86-64-config
 create mode 100644 automation/scripts/include/xtf-runner
 create mode 100644 automation/scripts/include/xtf-x86-64
 delete mode 100755 automation/scripts/qemu-smoke-x86-64.sh
 create mode 100755 automation/scripts/qemu-xtf.sh

diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yam=
l
index 5ce445b78f..3adc841335 100644
--- a/automation/gitlab-ci/test.yaml
+++ b/automation/gitlab-ci/test.yaml
@@ -659,28 +659,28 @@ qemu-alpine-x86_64-gcc:
 qemu-smoke-x86-64-gcc:
   extends: .qemu-smoke-x86-64
   script:
-    - ./automation/scripts/qemu-smoke-x86-64.sh pv 2>&1 | tee ${LOGFILE}
+    - ./automation/scripts/qemu-xtf.sh x86-64 pv64 example 2>&1 | tee ${LO=
GFILE}
   needs:
     - debian-12-x86_64-gcc-debug
=20
 qemu-smoke-x86-64-clang:
   extends: .qemu-smoke-x86-64
   script:
-    - ./automation/scripts/qemu-smoke-x86-64.sh pv 2>&1 | tee ${LOGFILE}
+    - ./automation/scripts/qemu-xtf.sh x86-64 pv64 example 2>&1 | tee ${LO=
GFILE}
   needs:
     - debian-12-x86_64-clang-debug
=20
 qemu-smoke-x86-64-gcc-pvh:
   extends: .qemu-smoke-x86-64
   script:
-    - ./automation/scripts/qemu-smoke-x86-64.sh pvh 2>&1 | tee ${LOGFILE}
+    - ./automation/scripts/qemu-xtf.sh x86-64 hvm64 example 2>&1 | tee ${L=
OGFILE}
   needs:
     - debian-12-x86_64-gcc-debug
=20
 qemu-smoke-x86-64-clang-pvh:
   extends: .qemu-smoke-x86-64
   script:
-    - ./automation/scripts/qemu-smoke-x86-64.sh pvh 2>&1 | tee ${LOGFILE}
+    - ./automation/scripts/qemu-xtf.sh x86-64 hvm64 example 2>&1 | tee ${L=
OGFILE}
   needs:
     - debian-12-x86_64-clang-debug
=20
diff --git a/automation/scripts/.gitignore b/automation/scripts/.gitignore
new file mode 100644
index 0000000000..310a577bef
--- /dev/null
+++ b/automation/scripts/.gitignore
@@ -0,0 +1,3 @@
+/binaries/
+/smoke.serial
+/xtf-*/
diff --git a/automation/scripts/include/configs/xtf-x86-64-config b/automat=
ion/scripts/include/configs/xtf-x86-64-config
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/automation/scripts/include/xtf-runner b/automation/scripts/inc=
lude/xtf-runner
new file mode 100644
index 0000000000..320eb65dc8
--- /dev/null
+++ b/automation/scripts/include/xtf-runner
@@ -0,0 +1,131 @@
+#!/bin/bash
+#
+# XTF test utilities.
+#
+# Environment variables:
+#   BOOT_MSG: Expected boot message
+#   FW_PREFIX: Firmware images path including '/' at the end
+#   PASSED: XTF test printout in case of a pass
+#   QEMU_PREFIX: QEMU path including '/' at the end
+#   TEST_LOG: Output log file
+#   UBOOT_CMD: U-Boot command line
+#   WORKDIR: Test working directory
+#   XEN_BINARY: Xen binary location
+#   XEN_CONSOLE: Xen console device name
+#   XTF_SRC_CONFIG: XTF config file
+#   XTF_SRC_BRANCH: XTF branch
+#   XTF_SRC_URI: XTF source code URI
+
+# Output log file
+TEST_LOG=3D"${TEST_LOG:-${XEN_ROOT}/smoke.serial}"
+# XTF test printout in case of a pass
+PASSED=3D"${PASSED:-Test result: SUCCESS}"
+# Expected boot message
+BOOT_MSG=3D"${BOOT_MSG:-Latest ChangeSet: }"
+# Test working directory
+WORKDIR=3D"${WORKDIR:-${XEN_ROOT}/binaries}"
+# XTF source code
+XTF_SRC_CONFIG=3D"${XTF_SRC_CONFIG:-include/configs/xtf-${ARCH}-config}"
+
+function die()
+{
+    set +x
+    echo "FATAL: $*" >&2
+    exit 1
+}
+
+# Build an XTF test binary.
+# $1 Test variant.
+# $2 Test name.
+function xtf_build_binary()
+{
+    local xtf_variant=3D$1
+    local xtf_name=3D$2
+    local xtf_dir=3D"xtf-${ARCH}"
+
+    # Crude check for local testing
+    if [ ! -d ${xtf_dir} ]; then
+        git clone ${XTF_SRC_URI} ${xtf_dir} -b ${XTF_SRC_BRANCH}
+    fi
+
+    make \
+        -C ${xtf_dir} \
+        -j$(nproc) \
+        $(tr '\n' ' ' < ${XTF_SRC_CONFIG}) \
+        TESTS=3Dtests/${xtf_name}
+
+    export XTF_NAME=3D"${xtf_name}"
+    export XTF_VARIANT=3D"${xtf_variant}"
+    export XTF_WORKDIR=3D"$(readlink -f ${xtf_dir})"
+    export XTF_BINARY=3D"${XTF_WORKDIR}/tests/${xtf_name}/test-${xtf_varia=
nt}-${xtf_name}"
+}
+
+# Build Xen command line for running an XTF test.
+# $1 Test variant.
+# $2 Test name.
+function xtf_build_cmdline()
+{
+    local xtf_variant=3D$1
+    local xtf_name=3D$2
+    declare -a cmdline=3D()
+
+    cmdline+=3D("${XEN_CMDLINE}")
+
+    # NB: OK to have hvm64, which is x86-only variant
+    if [[ $xtf_variant =3D=3D "hvm64" ]]; then
+        cmdline+=3D("dom0-iommu=3Dnone dom0=3Dpvh")
+    fi
+
+    export XEN_CMDLINE=3D"${cmdline[@]}"
+}
+
+# Build an XTF test environment.
+# $1 Test variant.
+# $2 Test name.
+function xtf_build_test()
+{
+    local v=3D$1
+    local xtf_name=3D$2
+    local xtf_variant=3D""
+
+    for x in ${XTF_SRC_VARIANTS}; do
+        if [[ "${x}" =3D=3D "${v}" ]]; then
+            xtf_variant=3D${v}
+            break
+        fi
+    done
+    if [[ -z $xtf_variant ]]; then
+        die "unsupported test variant '$1', supported variants: ${XTF_SRC_=
VARIANTS}"
+    fi
+
+    xtf_build_binary ${xtf_variant} ${xtf_name}
+    xtf_build_cmdline ${xtf_variant} ${xtf_name}
+}
+
+# Execute an XTF test.
+function xtf_run_test()
+{
+    rm -f ${TEST_LOG}
+    export BOOT_MSG PASSED TEST_CMD TEST_LOG UBOOT_CMD
+    ./console.exp | sed 's/\r\+$//'
+}
+
+# Setup environment and run an XTF test.
+# $1 Test variant.
+# $2 Test name.
+function xtf_test()
+{
+    # Out: FW_*, QEMU_*, XEN_{BINARY,CONSOLE}, XTF_SRC_*
+    xtf_arch_prepare
+
+    # In: XTF_SRC_*
+    # OUt: XTF_{BINARY,NAME,VARIANT,WORKDIR} and XEN_CMDLINE
+    xtf_build_test $@
+
+    # In: FW_*, QEMU_*, XTF_*, XEN_*
+    # Out: BOOT_MSG, PASSED, TEST_{CMD,LOG}, UBOOT_CMD
+    xtf_arch_setup
+
+    # In: BOOT_MSG, PASSED, TEST_{CMD,LOG}, UBOOT_CMD
+    xtf_run_test
+}
diff --git a/automation/scripts/include/xtf-x86-64 b/automation/scripts/inc=
lude/xtf-x86-64
new file mode 100644
index 0000000000..b1b0cc201e
--- /dev/null
+++ b/automation/scripts/include/xtf-x86-64
@@ -0,0 +1,31 @@
+#!/bin/bash
+#
+# XTF test utilities (x86_64).
+#
+
+# Arch-specific environment overrides.
+function xtf_arch_prepare()
+{
+    export FW_PREFIX=3D"${FW_PREFIX:-}"
+    export QEMU_PREFIX=3D"${QEMU_PREFIX:-}"
+    export XEN_BINARY=3D"${XEN_BINARY:-${WORKDIR}/xen}"
+    export XEN_CMDLINE=3D"${XEN_CMDLINE:-loglvl=3Dall noreboot console_tim=
estamps=3Dboot console=3Dcom1}"
+    export XTF_SRC_BRANCH=3D"${XTF_SRC_BRANCH:-master}"
+    export XTF_SRC_URI=3D"${XTF_SRC_URI:-https://xenbits.xen.org/git-http/=
xtf.git}"
+    export XTF_SRC_VARIANTS=3D"hvm64 pv64"
+}
+
+# Perform arch-specific XTF environment setup.
+function xtf_arch_setup()
+{
+    export TEST_CMD=3D"${QEMU_PREFIX}qemu-system-x86_64 \
+        -no-reboot \
+        -nographic \
+        -monitor none \
+        -serial stdio \
+        -m 512 \
+        -kernel ${XEN_BINARY} \
+        -initrd ${XTF_BINARY} \
+        -append \"${XEN_CMDLINE}\" \
+    "
+}
diff --git a/automation/scripts/qemu-smoke-x86-64.sh b/automation/scripts/q=
emu-smoke-x86-64.sh
deleted file mode 100755
index da0c26cc2f..0000000000
--- a/automation/scripts/qemu-smoke-x86-64.sh
+++ /dev/null
@@ -1,26 +0,0 @@
-#!/bin/bash
-
-set -ex -o pipefail
-
-# variant should be either pv or pvh
-variant=3D$1
-
-# Clone and build XTF
-git clone https://xenbits.xen.org/git-http/xtf.git
-cd xtf && make -j$(nproc) && cd -
-
-case $variant in
-    pvh) k=3Dtest-hvm64-example    extra=3D"dom0-iommu=3Dnone dom0=3Dpvh" =
;;
-    *)   k=3Dtest-pv64-example     extra=3D ;;
-esac
-
-rm -f smoke.serial
-export TEST_CMD=3D"qemu-system-x86_64 -nographic -kernel binaries/xen \
-        -initrd xtf/tests/example/$k \
-        -append \"loglvl=3Dall console=3Dcom1 noreboot console_timestamps=
=3Dboot $extra\" \
-        -m 512 -monitor none -serial stdio"
-
-export TEST_LOG=3D"smoke.serial"
-export PASSED=3D"Test result: SUCCESS"
-
-./automation/scripts/console.exp | sed 's/\r\+$//'
diff --git a/automation/scripts/qemu-xtf.sh b/automation/scripts/qemu-xtf.s=
h
new file mode 100755
index 0000000000..55c221b36d
--- /dev/null
+++ b/automation/scripts/qemu-xtf.sh
@@ -0,0 +1,28 @@
+#!/bin/bash
+#
+# XTF test runner (QEMU).
+#
+
+set -e -o pipefail
+
+if [ $# -lt 3 ]; then
+    echo "Usage: $(basename $0) ARCH XTF-VARIANT XTF-NAME"
+    exit 0
+fi
+
+export ARCH=3D"$1"
+shift
+
+set -x
+
+export XEN_ROOT=3D"${PWD}"
+cd $(dirname $0)
+
+source include/xtf-runner
+
+if [ ! -f "include/xtf-${ARCH}" ]; then
+    die "unsupported architecture '${ARCH}'"
+fi
+source include/xtf-${ARCH}
+
+xtf_test $@
--=20
2.34.1




From xen-devel-bounces@lists.xenproject.org Tue Apr 22 16:19:03 2025
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Date: Tue, 22 Apr 2025 16:18:53 +0000
To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, cardoe@cardoe.com, marmarek@invisiblethingslab.com, sstabellini@kernel.org, dmukhin@ford.com
Subject: [PATCH v3 2/4] CI: switch x86 EFI smoke test runner to qemu-xtf.sh
Message-ID: <20250422161819.2089738-3-dmukhin@ford.com>
In-Reply-To: <20250422161819.2089738-1-dmukhin@ford.com>
References: <20250422161819.2089738-1-dmukhin@ford.com>
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From: Denis Mukhin 

Use qemu-xtf.sh for qemu-smoke-x86-64-gcc-efi job.

Lead time is reduced a bit since not all XTF code base is built, just the
required test.

Signed-off-by: Denis Mukhin 
---
Changes v2->v3:
- use pv64 variant for EFI job
---
 automation/gitlab-ci/test.yaml                |  2 +-
 .../include/configs/xtf-x86-64-efi-config     |  0
 automation/scripts/include/xtf-x86-64-efi     | 52 +++++++++++++++++++
 automation/scripts/qemu-smoke-x86-64-efi.sh   | 43 ---------------
 4 files changed, 53 insertions(+), 44 deletions(-)
 create mode 100644 automation/scripts/include/configs/xtf-x86-64-efi-confi=
g
 create mode 100644 automation/scripts/include/xtf-x86-64-efi
 delete mode 100755 automation/scripts/qemu-smoke-x86-64-efi.sh

diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yam=
l
index 3adc841335..1d89575b24 100644
--- a/automation/gitlab-ci/test.yaml
+++ b/automation/gitlab-ci/test.yaml
@@ -687,7 +687,7 @@ qemu-smoke-x86-64-clang-pvh:
 qemu-smoke-x86-64-gcc-efi:
   extends: .qemu-smoke-x86-64
   script:
-    - ./automation/scripts/qemu-smoke-x86-64-efi.sh pv 2>&1 | tee ${LOGFIL=
E}
+    - ./automation/scripts/qemu-xtf.sh x86-64-efi pv64 example 2>&1 | tee =
${LOGFILE}
   needs:
     - debian-12-x86_64-gcc-debug
=20
diff --git a/automation/scripts/include/configs/xtf-x86-64-efi-config b/aut=
omation/scripts/include/configs/xtf-x86-64-efi-config
new file mode 100644
index 0000000000..e69de29bb2
diff --git a/automation/scripts/include/xtf-x86-64-efi b/automation/scripts=
/include/xtf-x86-64-efi
new file mode 100644
index 0000000000..e0d821b3f6
--- /dev/null
+++ b/automation/scripts/include/xtf-x86-64-efi
@@ -0,0 +1,52 @@
+#!/bin/bash
+#
+# XTF test utilities (x86_64, EFI).
+#
+
+# Arch-specific environment overrides.
+function xtf_arch_prepare()
+{
+    export FW_PREFIX=3D"${FW_PREFIX:-/usr/share/OVMF/}"
+    export QEMU_PREFIX=3D"${QEMU_PREFIX:-}"
+    export XEN_BINARY=3D"${XEN_BINARY:-${WORKDIR}/xen.efi}"
+    export XEN_CMDLINE=3D"${XEN_CMDLINE:-loglvl=3Dall noreboot console_tim=
estamps=3Dboot console=3Dcom1}"
+    export XTF_SRC_BRANCH=3D"${XTF_SRC_BRANCH:-master}"
+    export XTF_SRC_URI=3D"${XTF_SRC_URI:-https://xenbits.xen.org/git-http/=
xtf.git}"
+    export XTF_SRC_VARIANTS=3D"hvm64 pv64"
+}
+
+# Perform arch-specific XTF environment setup.
+function xtf_arch_setup()
+{
+    local esp_dir=3D"${WORKDIR}/boot-esp"
+    local efi_dir=3D"${esp_dir}/EFI/BOOT"
+
+    # Generate EFI boot environment
+    mkdir -p ${efi_dir}
+    cp ${XEN_BINARY} ${efi_dir}/BOOTX64.EFI
+    cp ${XTF_BINARY} ${efi_dir}/kernel
+
+    cat > ${efi_dir}/BOOTX64.cfg < boot-esp/EFI/BOOT/BOOTX64.cfg <
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Date: Tue, 22 Apr 2025 16:18:59 +0000
To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, cardoe@cardoe.com, marmarek@invisiblethingslab.com, sstabellini@kernel.org, dmukhin@ford.com
Subject: [PATCH v3 3/4] CI: switch arm64 XTF test runner to qemu-xtf.sh
Message-ID: <20250422161819.2089738-4-dmukhin@ford.com>
In-Reply-To: <20250422161819.2089738-1-dmukhin@ford.com>
References: <20250422161819.2089738-1-dmukhin@ford.com>
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From: Denis Mukhin 

Hook arm64 QEMU configuration to qemu-xtf.sh and use new script in arm64 CI
jobs.

Signed-off-by: Denis Mukhin 
Reviewed-by: Stefano Stabellini 
---
Changes v2->v3:
- .gitignore fixup
- Kept Stefano's R-b since the change was trivial
---
 automation/gitlab-ci/test.yaml                |  4 +-
 automation/scripts/.gitignore                 |  3 +
 .../scripts/include/configs/xtf-arm64-config  |  2 +
 automation/scripts/include/xtf-arm64          | 81 +++++++++++++++++++
 automation/scripts/qemu-xtf-dom0less-arm64.sh | 68 ----------------
 5 files changed, 88 insertions(+), 70 deletions(-)
 create mode 100644 automation/scripts/include/configs/xtf-arm64-config
 create mode 100644 automation/scripts/include/xtf-arm64
 delete mode 100755 automation/scripts/qemu-xtf-dom0less-arm64.sh

diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yam=
l
index 1d89575b24..a603d4039a 100644
--- a/automation/gitlab-ci/test.yaml
+++ b/automation/gitlab-ci/test.yaml
@@ -571,7 +571,7 @@ qemu-smoke-dom0less-arm64-gcc-debug-earlyprintk:
 qemu-xtf-dom0less-arm64-gcc-hyp-xen-version:
   extends: .qemu-arm64
   script:
-    - ./automation/scripts/qemu-xtf-dom0less-arm64.sh hyp-xen-version 2>&1=
 | tee ${LOGFILE}
+    - ./automation/scripts/qemu-xtf.sh arm64 mmu64le hyp-xen-version 2>&1 =
| tee ${LOGFILE}
   needs:
     - alpine-3.18-gcc-arm64
     - qemu-system-aarch64-6.0.0-arm64-export
@@ -579,7 +579,7 @@ qemu-xtf-dom0less-arm64-gcc-hyp-xen-version:
 qemu-xtf-dom0less-arm64-gcc-debug-hyp-xen-version:
   extends: .qemu-arm64
   script:
-    - ./automation/scripts/qemu-xtf-dom0less-arm64.sh hyp-xen-version 2>&1=
 | tee ${LOGFILE}
+    - ./automation/scripts/qemu-xtf.sh arm64 mmu64le hyp-xen-version 2>&1 =
| tee ${LOGFILE}
   needs:
     - alpine-3.18-gcc-debug-arm64
     - qemu-system-aarch64-6.0.0-arm64-export
diff --git a/automation/scripts/.gitignore b/automation/scripts/.gitignore
index 310a577bef..a01b533c60 100644
--- a/automation/scripts/.gitignore
+++ b/automation/scripts/.gitignore
@@ -1,3 +1,6 @@
 /binaries/
+/imagebuilder/
 /smoke.serial
 /xtf-*/
+
+*.rom
diff --git a/automation/scripts/include/configs/xtf-arm64-config b/automati=
on/scripts/include/configs/xtf-arm64-config
new file mode 100644
index 0000000000..9942740927
--- /dev/null
+++ b/automation/scripts/include/configs/xtf-arm64-config
@@ -0,0 +1,2 @@
+CONFIG_GICV2=3Dy
+CONFIG_SBSA_UART=3Dy
diff --git a/automation/scripts/include/xtf-arm64 b/automation/scripts/incl=
ude/xtf-arm64
new file mode 100644
index 0000000000..1a318b7aa0
--- /dev/null
+++ b/automation/scripts/include/xtf-arm64
@@ -0,0 +1,81 @@
+#!/bin/bash
+#
+# XTF test utilities (arm64).
+#
+
+# Arch-specific environment overrides.
+function xtf_arch_prepare()
+{
+    export FW_PREFIX=3D"${FW_PREFIX:-/usr/lib/u-boot/qemu_arm64/}"
+    export QEMU_PREFIX=3D"${QEMU_PREFIX:-${WORKDIR}/}"
+    export XEN_BINARY=3D"${XEN_BINARY:-${WORKDIR}/xen}"
+    export XEN_CMDLINE=3D"${XEN_CMDLINE:-loglvl=3Dall noreboot console_tim=
estamps=3Dboot console=3Ddtuart}"
+    export XTF_SRC_BRANCH=3D"${XTF_SRC_BRANCH:-xtf-arm}"
+    export XTF_SRC_URI=3D"${XTF_SRC_URI:-https://gitlab.com/xen-project/fu=
sa/xtf.git}"
+    export XTF_SRC_VARIANTS=3D"mmu64le"
+}
+
+# Perform arch-specific XTF environment setup.
+function xtf_arch_setup()
+{
+    # QEMU looks for "efi-virtio.rom" even if it is unneeded
+    curl -fsSLO https://github.com/qemu/qemu/raw/v5.2.0/pc-bios/efi-virtio=
.rom
+
+    # Crude check for local testing
+    if [ ! -d imagebuilder ]; then
+        git clone --depth 1 https://gitlab.com/xen-project/imagebuilder.gi=
t
+    fi
+
+    cat > ${WORKDIR}/config < binaries/config
-
-rm -rf imagebuilder
-git clone --depth 1 https://gitlab.com/xen-project/imagebuilder.git
-bash imagebuilder/scripts/uboot-script-gen -t tftp -d binaries/ -c binarie=
s/config
-
-# Run the test
-rm -f smoke.serial
-export TEST_CMD=3D"./binaries/qemu-system-aarch64 \
-    -machine virtualization=3Dtrue \
-    -cpu cortex-a57 -machine type=3Dvirt \
-    -m 2048 -monitor none -serial stdio \
-    -smp 2 \
-    -no-reboot \
-    -device virtio-net-pci,netdev=3Dn0 \
-    -netdev user,id=3Dn0,tftp=3Dbinaries \
-    -bios /usr/lib/u-boot/qemu_arm64/u-boot.bin"
-
-export UBOOT_CMD=3D"virtio scan; dhcp; tftpb 0x40000000 boot.scr; source 0=
x40000000"
-export BOOT_MSG=3D"Latest ChangeSet: "
-export TEST_LOG=3D"smoke.serial"
-export PASSED=3D"${passed}"
-
-./automation/scripts/console.exp | sed 's/\r\+$//'
--=20
2.34.1




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Date: Tue, 22 Apr 2025 16:19:06 +0000
To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, cardoe@cardoe.com, marmarek@invisiblethingslab.com, sstabellini@kernel.org, dmukhin@ford.com
Subject: [PATCH v3 4/4] CI: add argo x86 XTF test
Message-ID: <20250422161819.2089738-5-dmukhin@ford.com>
In-Reply-To: <20250422161819.2089738-1-dmukhin@ford.com>
References: <20250422161819.2089738-1-dmukhin@ford.com>
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From: Denis Mukhin 

Introduce new CI job to run x86 XTF argo test under QEMU to smoke test argo
feature functionality in upstream CI.

The new job lead time is ~30s, limit max job duration to 60s.

Signed-off-by: Denis Mukhin 
Reviewed-by: Stefano Stabellini 
---
Changes v2->v3:
- Added Stefano's R-b
---
 automation/gitlab-ci/test.yaml        | 9 +++++++++
 automation/scripts/include/xtf-runner | 7 +++++++
 2 files changed, 16 insertions(+)

diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yam=
l
index a603d4039a..eba41f4048 100644
--- a/automation/gitlab-ci/test.yaml
+++ b/automation/gitlab-ci/test.yaml
@@ -691,6 +691,15 @@ qemu-smoke-x86-64-gcc-efi:
   needs:
     - debian-12-x86_64-gcc-debug
=20
+qemu-xtf-argo-x86_64-gcc-debug:
+  extends: .qemu-smoke-x86-64
+  variables:
+    TEST_TIMEOUT_OVERRIDE: 60
+  script:
+    - ./automation/scripts/qemu-xtf.sh x86-64 pv64 argo 2>&1 | tee ${LOGFI=
LE}
+  needs:
+    - alpine-3.18-gcc-debug
+
 qemu-smoke-riscv64-gcc:
   extends: .qemu-riscv64
   script:
diff --git a/automation/scripts/include/xtf-runner b/automation/scripts/inc=
lude/xtf-runner
index 320eb65dc8..b7fea52dad 100644
--- a/automation/scripts/include/xtf-runner
+++ b/automation/scripts/include/xtf-runner
@@ -68,6 +68,9 @@ function xtf_build_cmdline()
     local xtf_variant=3D$1
     local xtf_name=3D$2
     declare -a cmdline=3D()
+    declare -A per_test_args=3D(
+        [argo]=3D"argo=3D1 mac-permissive=3D1"
+    )
=20
     cmdline+=3D("${XEN_CMDLINE}")
=20
@@ -76,6 +79,10 @@ function xtf_build_cmdline()
         cmdline+=3D("dom0-iommu=3Dnone dom0=3Dpvh")
     fi
=20
+    if [[ -v per_test_args[${xtf_name}] ]]; then
+        cmdline+=3D("${per_test_args[${xtf_name}]}")
+    fi
+
     export XEN_CMDLINE=3D"${cmdline[@]}"
 }
=20
--=20
2.34.1




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Date: Tue, 22 Apr 2025 16:28:55 +0000
To: Stefano Stabellini 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, cardoe@cardoe.com, marmarek@invisiblethingslab.com, dmukhin@ford.com
Subject: Re: [PATCH v2 1/4] CI: unify x86 XTF test runner
Message-ID: 
In-Reply-To: 
References: <20250419010319.2572518-1-dmukhin@ford.com> <20250419010319.2572518-2-dmukhin@ford.com> 
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On Mon, Apr 21, 2025 at 01:39:21PM -0700, Stefano Stabellini wrote:
> On Sat, 19 Apr 2025, dmkhn@proton.me wrote:
> > From: Denis Mukhin 
> >
> > Add test runner script qemu-xtf.sh which is allows any XTF x86 test to =
be
> > easily executed. Test runner is invoked from the qemu-smoke* jobs with =
the
> > hardcoded parameters.
> >
> > Each x86 XTF job lead time is reduced a bit since only the test-related=
 code
> > is built, not the entire XTF project.
> >
> > Add .gitignore to avoid committing test artifacts by mistake.
> >
> > Signed-off-by: Denis Mukhin 
> > ---
> > Changes since v2:
> > - removed TOP
> > - dropped XEN_CONSOLE in favor of XEN_CMDLINE
> > - fixup for XTF_SRC_CONFIG
>=20
> Much better!
>=20
>=20
> > ---
> >  automation/gitlab-ci/test.yaml                |   8 +-
> >  automation/scripts/.gitignore                 |   6 +
> >  .../scripts/include/configs/xtf-x86-64-config |   0
> >  automation/scripts/include/xtf-runner         | 131 ++++++++++++++++++
> >  automation/scripts/include/xtf-x86-64         |  31 +++++
> >  automation/scripts/qemu-smoke-x86-64.sh       |  26 ----
> >  automation/scripts/qemu-xtf.sh                |  28 ++++
> >  7 files changed, 200 insertions(+), 30 deletions(-)
> >  create mode 100644 automation/scripts/.gitignore
> >  create mode 100644 automation/scripts/include/configs/xtf-x86-64-confi=
g
> >  create mode 100644 automation/scripts/include/xtf-runner
> >  create mode 100644 automation/scripts/include/xtf-x86-64
> >  delete mode 100755 automation/scripts/qemu-smoke-x86-64.sh
> >  create mode 100755 automation/scripts/qemu-xtf.sh
> >
> > diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test=
.yaml
> > index 5ce445b78f..3adc841335 100644
> > --- a/automation/gitlab-ci/test.yaml
> > +++ b/automation/gitlab-ci/test.yaml
> > @@ -659,28 +659,28 @@ qemu-alpine-x86_64-gcc:
> >  qemu-smoke-x86-64-gcc:
> >    extends: .qemu-smoke-x86-64
> >    script:
> > -    - ./automation/scripts/qemu-smoke-x86-64.sh pv 2>&1 | tee ${LOGFIL=
E}
> > +    - ./automation/scripts/qemu-xtf.sh x86-64 pv64 example 2>&1 | tee =
${LOGFILE}
> >    needs:
> >      - debian-12-x86_64-gcc-debug
> >
> >  qemu-smoke-x86-64-clang:
> >    extends: .qemu-smoke-x86-64
> >    script:
> > -    - ./automation/scripts/qemu-smoke-x86-64.sh pv 2>&1 | tee ${LOGFIL=
E}
> > +    - ./automation/scripts/qemu-xtf.sh x86-64 pv64 example 2>&1 | tee =
${LOGFILE}
> >    needs:
> >      - debian-12-x86_64-clang-debug
> >
> >  qemu-smoke-x86-64-gcc-pvh:
> >    extends: .qemu-smoke-x86-64
> >    script:
> > -    - ./automation/scripts/qemu-smoke-x86-64.sh pvh 2>&1 | tee ${LOGFI=
LE}
> > +    - ./automation/scripts/qemu-xtf.sh x86-64 hvm64 example 2>&1 | tee=
 ${LOGFILE}
> >    needs:
> >      - debian-12-x86_64-gcc-debug
> >
> >  qemu-smoke-x86-64-clang-pvh:
> >    extends: .qemu-smoke-x86-64
> >    script:
> > -    - ./automation/scripts/qemu-smoke-x86-64.sh pvh 2>&1 | tee ${LOGFI=
LE}
> > +    - ./automation/scripts/qemu-xtf.sh x86-64 hvm64 example 2>&1 | tee=
 ${LOGFILE}
> >    needs:
> >      - debian-12-x86_64-clang-debug
> >
> > diff --git a/automation/scripts/.gitignore b/automation/scripts/.gitign=
ore
> > new file mode 100644
> > index 0000000000..2f2d6e1ebd
> > --- /dev/null
> > +++ b/automation/scripts/.gitignore
> > @@ -0,0 +1,6 @@
> > +!include
>=20
> Why !include ?

Forgot to clean this up, thanks.
In my local environment, I test like the following:

  cd automation/scripts
  WORKDIR=3D... ./qemu-xtf.sh x86-64 pv64 example

The XTF runner script will clone XTF repo at automation/scripts/xtf-$ARCH
which will clash with include/xtf-$ARCH fragments.

Fixed in v3.

>=20
>=20
> > +binaries
> > +smoke.serial
> > +xen
> > +xtf*/
> > diff --git a/automation/scripts/include/configs/xtf-x86-64-config b/aut=
omation/scripts/include/configs/xtf-x86-64-config
> > new file mode 100644
> > index 0000000000..e69de29bb2
> > diff --git a/automation/scripts/include/xtf-runner b/automation/scripts=
/include/xtf-runner
> > new file mode 100644
> > index 0000000000..320eb65dc8
> > --- /dev/null
> > +++ b/automation/scripts/include/xtf-runner
> > @@ -0,0 +1,131 @@
> > +#!/bin/bash
> > +#
> > +# XTF test utilities.
> > +#
> > +# Environment variables:
> > +#   BOOT_MSG: Expected boot message
> > +#   FW_PREFIX: Firmware images path including '/' at the end
> > +#   PASSED: XTF test printout in case of a pass
> > +#   QEMU_PREFIX: QEMU path including '/' at the end
> > +#   TEST_LOG: Output log file
> > +#   UBOOT_CMD: U-Boot command line
> > +#   WORKDIR: Test working directory
> > +#   XEN_BINARY: Xen binary location
> > +#   XEN_CONSOLE: Xen console device name
> > +#   XTF_SRC_CONFIG: XTF config file
> > +#   XTF_SRC_BRANCH: XTF branch
> > +#   XTF_SRC_URI: XTF source code URI
> > +
> > +# Output log file
> > +TEST_LOG=3D"${TEST_LOG:-${XEN_ROOT}/smoke.serial}"
> > +# XTF test printout in case of a pass
> > +PASSED=3D"${PASSED:-Test result: SUCCESS}"
> > +# Expected boot message
> > +BOOT_MSG=3D"${BOOT_MSG:-Latest ChangeSet: }"
> > +# Test working directory
> > +WORKDIR=3D"${WORKDIR:-${XEN_ROOT}/binaries}"
> > +# XTF source code
> > +XTF_SRC_CONFIG=3D"${XTF_SRC_CONFIG:-include/configs/xtf-${ARCH}-config=
}"
> > +
> > +function die()
> > +{
> > +    set +x
> > +    echo "FATAL: $*" >&2
> > +    exit 1
> > +}
> > +
> > +# Build an XTF test binary.
> > +# $1 Test variant.
> > +# $2 Test name.
> > +function xtf_build_binary()
> > +{
> > +    local xtf_variant=3D$1
> > +    local xtf_name=3D$2
> > +    local xtf_dir=3D"xtf-${ARCH}"
> > +
> > +    # Crude check for local testing
> > +    if [ ! -d ${xtf_dir} ]; then
> > +        git clone ${XTF_SRC_URI} ${xtf_dir} -b ${XTF_SRC_BRANCH}
> > +    fi
> > +
> > +    make \
> > +        -C ${xtf_dir} \
> > +        -j$(nproc) \
> > +        $(tr '\n' ' ' < ${XTF_SRC_CONFIG}) \
> > +        TESTS=3Dtests/${xtf_name}
> > +
> > +    export XTF_NAME=3D"${xtf_name}"
> > +    export XTF_VARIANT=3D"${xtf_variant}"
> > +    export XTF_WORKDIR=3D"$(readlink -f ${xtf_dir})"
> > +    export XTF_BINARY=3D"${XTF_WORKDIR}/tests/${xtf_name}/test-${xtf_v=
ariant}-${xtf_name}"
> > +}
> > +
> > +# Build Xen command line for running an XTF test.
> > +# $1 Test variant.
> > +# $2 Test name.
> > +function xtf_build_cmdline()
> > +{
> > +    local xtf_variant=3D$1
> > +    local xtf_name=3D$2
> > +    declare -a cmdline=3D()
> > +
> > +    cmdline+=3D("${XEN_CMDLINE}")
> > +
> > +    # NB: OK to have hvm64, which is x86-only variant
> > +    if [[ $xtf_variant =3D=3D "hvm64" ]]; then
> > +        cmdline+=3D("dom0-iommu=3Dnone dom0=3Dpvh")
> > +    fi
> > +
> > +    export XEN_CMDLINE=3D"${cmdline[@]}"
> > +}
> > +
> > +# Build an XTF test environment.
> > +# $1 Test variant.
> > +# $2 Test name.
> > +function xtf_build_test()
> > +{
> > +    local v=3D$1
> > +    local xtf_name=3D$2
> > +    local xtf_variant=3D""
> > +
> > +    for x in ${XTF_SRC_VARIANTS}; do
> > +        if [[ "${x}" =3D=3D "${v}" ]]; then
> > +            xtf_variant=3D${v}
> > +            break
> > +        fi
> > +    done
> > +    if [[ -z $xtf_variant ]]; then
> > +        die "unsupported test variant '$1', supported variants: ${XTF_=
SRC_VARIANTS}"
> > +    fi
> > +
> > +    xtf_build_binary ${xtf_variant} ${xtf_name}
> > +    xtf_build_cmdline ${xtf_variant} ${xtf_name}
> > +}
> > +
> > +# Execute an XTF test.
> > +function xtf_run_test()
> > +{
> > +    rm -f ${TEST_LOG}
> > +    export BOOT_MSG PASSED TEST_CMD TEST_LOG UBOOT_CMD
> > +    ./console.exp | sed 's/\r\+$//'
> > +}
> > +
> > +# Setup environment and run an XTF test.
> > +# $1 Test variant.
> > +# $2 Test name.
> > +function xtf_test()
> > +{
> > +    # Out: FW_*, QEMU_*, XEN_{BINARY,CONSOLE}, XTF_SRC_*
> > +    xtf_arch_prepare
> > +
> > +    # In: XTF_SRC_*
> > +    # OUt: XTF_{BINARY,NAME,VARIANT,WORKDIR} and XEN_CMDLINE
> > +    xtf_build_test $@
> > +
> > +    # In: FW_*, QEMU_*, XTF_*, XEN_*
> > +    # Out: BOOT_MSG, PASSED, TEST_{CMD,LOG}, UBOOT_CMD
> > +    xtf_arch_setup
> > +
> > +    # In: BOOT_MSG, PASSED, TEST_{CMD,LOG}, UBOOT_CMD
> > +    xtf_run_test
> > +}
> > diff --git a/automation/scripts/include/xtf-x86-64 b/automation/scripts=
/include/xtf-x86-64
> > new file mode 100644
> > index 0000000000..b1b0cc201e
> > --- /dev/null
> > +++ b/automation/scripts/include/xtf-x86-64
> > @@ -0,0 +1,31 @@
> > +#!/bin/bash
> > +#
> > +# XTF test utilities (x86_64).
> > +#
> > +
> > +# Arch-specific environment overrides.
> > +function xtf_arch_prepare()
> > +{
> > +    export FW_PREFIX=3D"${FW_PREFIX:-}"
> > +    export QEMU_PREFIX=3D"${QEMU_PREFIX:-}"
> > +    export XEN_BINARY=3D"${XEN_BINARY:-${WORKDIR}/xen}"
> > +    export XEN_CMDLINE=3D"${XEN_CMDLINE:-loglvl=3Dall noreboot console=
_timestamps=3Dboot console=3Dcom1}"
> > +    export XTF_SRC_BRANCH=3D"${XTF_SRC_BRANCH:-master}"
> > +    export XTF_SRC_URI=3D"${XTF_SRC_URI:-https://xenbits.xen.org/git-h=
ttp/xtf.git}"
> > +    export XTF_SRC_VARIANTS=3D"hvm64 pv64"
> > +}
> > +
> > +# Perform arch-specific XTF environment setup.
> > +function xtf_arch_setup()
> > +{
> > +    export TEST_CMD=3D"${QEMU_PREFIX}qemu-system-x86_64 \
> > +        -no-reboot \
> > +        -nographic \
> > +        -monitor none \
> > +        -serial stdio \
> > +        -m 512 \
> > +        -kernel ${XEN_BINARY} \
> > +        -initrd ${XTF_BINARY} \
> > +        -append \"${XEN_CMDLINE}\" \
> > +    "
> > +}
> > diff --git a/automation/scripts/qemu-smoke-x86-64.sh b/automation/scrip=
ts/qemu-smoke-x86-64.sh
> > deleted file mode 100755
> > index da0c26cc2f..0000000000
> > --- a/automation/scripts/qemu-smoke-x86-64.sh
> > +++ /dev/null
> > @@ -1,26 +0,0 @@
> > -#!/bin/bash
> > -
> > -set -ex -o pipefail
> > -
> > -# variant should be either pv or pvh
> > -variant=3D$1
> > -
> > -# Clone and build XTF
> > -git clone https://xenbits.xen.org/git-http/xtf.git
> > -cd xtf && make -j$(nproc) && cd -
> > -
> > -case $variant in
> > -    pvh) k=3Dtest-hvm64-example    extra=3D"dom0-iommu=3Dnone dom0=3Dp=
vh" ;;
> > -    *)   k=3Dtest-pv64-example     extra=3D ;;
> > -esac
> > -
> > -rm -f smoke.serial
> > -export TEST_CMD=3D"qemu-system-x86_64 -nographic -kernel binaries/xen =
\
> > -        -initrd xtf/tests/example/$k \
> > -        -append \"loglvl=3Dall console=3Dcom1 noreboot console_timesta=
mps=3Dboot $extra\" \
> > -        -m 512 -monitor none -serial stdio"
> > -
> > -export TEST_LOG=3D"smoke.serial"
> > -export PASSED=3D"Test result: SUCCESS"
> > -
> > -./automation/scripts/console.exp | sed 's/\r\+$//'
> > diff --git a/automation/scripts/qemu-xtf.sh b/automation/scripts/qemu-x=
tf.sh
> > new file mode 100755
> > index 0000000000..55c221b36d
> > --- /dev/null
> > +++ b/automation/scripts/qemu-xtf.sh
> > @@ -0,0 +1,28 @@
> > +#!/bin/bash
> > +#
> > +# XTF test runner (QEMU).
> > +#
> > +
> > +set -e -o pipefail
> > +
> > +if [ $# -lt 3 ]; then
> > +    echo "Usage: $(basename $0) ARCH XTF-VARIANT XTF-NAME"
> > +    exit 0
> > +fi
> > +
> > +export ARCH=3D"$1"
> > +shift
> > +
> > +set -x
> > +
> > +export XEN_ROOT=3D"${PWD}"
> > +cd $(dirname $0)
> > +
> > +source include/xtf-runner
> > +
> > +if [ ! -f "include/xtf-${ARCH}" ]; then
> > +    die "unsupported architecture '${ARCH}'"
> > +fi
> > +source include/xtf-${ARCH}
> > +
> > +xtf_test $@
> > --
> > 2.34.1
> >
> >



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Date: Tue, 22 Apr 2025 16:29:42 +0000
To: Stefano Stabellini 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, cardoe@cardoe.com, marmarek@invisiblethingslab.com, dmukhin@ford.com
Subject: Re: [PATCH v2 2/4] CI: switch x86 EFI smoke test runner to qemu-xtf.sh
Message-ID: 
In-Reply-To: 
References: <20250419010319.2572518-1-dmukhin@ford.com> <20250419010319.2572518-3-dmukhin@ford.com> 
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On Mon, Apr 21, 2025 at 01:39:32PM -0700, Stefano Stabellini wrote:
> On Sat, 19 Apr 2025, dmkhn@proton.me wrote:
> > From: Denis Mukhin 
> >
> > Use qemu-xtf.sh for qemu-smoke-x86-64-gcc-efi job.
> >
> > Lead time is reduced a bit since not all XTF code base is built, just t=
he
> > required test.
> >
> > Signed-off-by: Denis Mukhin 
> > ---
> > Changes since v2:
> > - removed TOP
> > - dropped XEN_CONSOLE in favor of XEN_CMDLINE
> > ---
> >  automation/gitlab-ci/test.yaml                |  2 +-
> >  .../include/configs/xtf-x86-64-efi-config     |  0
> >  automation/scripts/include/xtf-x86-64-efi     | 52 +++++++++++++++++++
> >  automation/scripts/qemu-smoke-x86-64-efi.sh   | 43 ---------------
> >  4 files changed, 53 insertions(+), 44 deletions(-)
> >  create mode 100644 automation/scripts/include/configs/xtf-x86-64-efi-c=
onfig
> >  create mode 100644 automation/scripts/include/xtf-x86-64-efi
> >  delete mode 100755 automation/scripts/qemu-smoke-x86-64-efi.sh
> >
> > diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test=
.yaml
> > index 3adc841335..ca1e4eb528 100644
> > --- a/automation/gitlab-ci/test.yaml
> > +++ b/automation/gitlab-ci/test.yaml
> > @@ -687,7 +687,7 @@ qemu-smoke-x86-64-clang-pvh:
> >  qemu-smoke-x86-64-gcc-efi:
> >    extends: .qemu-smoke-x86-64
> >    script:
> > -    - ./automation/scripts/qemu-smoke-x86-64-efi.sh pv 2>&1 | tee ${LO=
GFILE}
> > +    - ./automation/scripts/qemu-xtf.sh x86-64-efi hvm64 example 2>&1 |=
 tee ${LOGFILE}
>=20
> Isn't it supposed to be pv64 as variant of the test to match what we had
> before?

Yes, that should be pv64; thanks!

>=20
>=20
> >    needs:
> >      - debian-12-x86_64-gcc-debug
> >
> > diff --git a/automation/scripts/include/configs/xtf-x86-64-efi-config b=
/automation/scripts/include/configs/xtf-x86-64-efi-config
> > new file mode 100644
> > index 0000000000..e69de29bb2
> > diff --git a/automation/scripts/include/xtf-x86-64-efi b/automation/scr=
ipts/include/xtf-x86-64-efi
> > new file mode 100644
> > index 0000000000..e0d821b3f6
> > --- /dev/null
> > +++ b/automation/scripts/include/xtf-x86-64-efi
> > @@ -0,0 +1,52 @@
> > +#!/bin/bash
> > +#
> > +# XTF test utilities (x86_64, EFI).
> > +#
> > +
> > +# Arch-specific environment overrides.
> > +function xtf_arch_prepare()
> > +{
> > +    export FW_PREFIX=3D"${FW_PREFIX:-/usr/share/OVMF/}"
> > +    export QEMU_PREFIX=3D"${QEMU_PREFIX:-}"
> > +    export XEN_BINARY=3D"${XEN_BINARY:-${WORKDIR}/xen.efi}"
> > +    export XEN_CMDLINE=3D"${XEN_CMDLINE:-loglvl=3Dall noreboot console=
_timestamps=3Dboot console=3Dcom1}"
> > +    export XTF_SRC_BRANCH=3D"${XTF_SRC_BRANCH:-master}"
> > +    export XTF_SRC_URI=3D"${XTF_SRC_URI:-https://xenbits.xen.org/git-h=
ttp/xtf.git}"
> > +    export XTF_SRC_VARIANTS=3D"hvm64 pv64"
> > +}
> > +
> > +# Perform arch-specific XTF environment setup.
> > +function xtf_arch_setup()
> > +{
> > +    local esp_dir=3D"${WORKDIR}/boot-esp"
> > +    local efi_dir=3D"${esp_dir}/EFI/BOOT"
> > +
> > +    # Generate EFI boot environment
> > +    mkdir -p ${efi_dir}
> > +    cp ${XEN_BINARY} ${efi_dir}/BOOTX64.EFI
> > +    cp ${XTF_BINARY} ${efi_dir}/kernel
> > +
> > +    cat > ${efi_dir}/BOOTX64.cfg < > +[global]
> > +default=3Dtest
> > +
> > +[test]
> > +options=3D${XEN_CMDLINE}
> > +kernel=3Dkernel
> > +EOF
> > +
> > +    # NB: OVMF_CODE.fd is read-only, no need to copy
> > +    cp ${FW_PREFIX}OVMF_VARS.fd ${WORKDIR}
> > +
> > +    export TEST_CMD=3D"${QEMU_PREFIX}qemu-system-x86_64 \
> > +        -no-reboot \
> > +        -nographic \
> > +        -monitor none \
> > +        -serial stdio \
> > +        -m 512 \
> > +        -M q35,kernel-irqchip=3Dsplit \
> > +        -drive if=3Dpflash,format=3Draw,readonly=3Don,file=3D${FW_PREF=
IX}OVMF_CODE.fd \
> > +        -drive if=3Dpflash,format=3Draw,file=3D${WORKDIR}/OVMF_VARS.fd=
 \
> > +        -drive file=3Dfat:rw:${esp_dir},media=3Ddisk,index=3D0,format=
=3Draw \
> > +    "
> > +}
> > diff --git a/automation/scripts/qemu-smoke-x86-64-efi.sh b/automation/s=
cripts/qemu-smoke-x86-64-efi.sh
> > deleted file mode 100755
> > index 7572722be6..0000000000
> > --- a/automation/scripts/qemu-smoke-x86-64-efi.sh
> > +++ /dev/null
> > @@ -1,43 +0,0 @@
> > -#!/bin/bash
> > -
> > -set -ex -o pipefail
> > -
> > -# variant should be either pv or pvh
> > -variant=3D$1
> > -
> > -# Clone and build XTF
> > -git clone https://xenbits.xen.org/git-http/xtf.git
> > -cd xtf && make -j$(nproc) && cd -
> > -
> > -case $variant in
> > -    pvh) k=3Dtest-hvm64-example    extra=3D"dom0-iommu=3Dnone dom0=3Dp=
vh" ;;
> > -    *)   k=3Dtest-pv64-example     extra=3D ;;
> > -esac
> > -
> > -mkdir -p boot-esp/EFI/BOOT
> > -cp binaries/xen.efi boot-esp/EFI/BOOT/BOOTX64.EFI
> > -cp xtf/tests/example/$k boot-esp/EFI/BOOT/kernel
> > -
> > -cat > boot-esp/EFI/BOOT/BOOTX64.cfg < > -[global]
> > -default=3Dtest
> > -
> > -[test]
> > -options=3Dloglvl=3Dall console=3Dcom1 noreboot console_timestamps=3Dbo=
ot $extra
> > -kernel=3Dkernel
> > -EOF
> > -
> > -cp /usr/share/OVMF/OVMF_CODE.fd OVMF_CODE.fd
> > -cp /usr/share/OVMF/OVMF_VARS.fd OVMF_VARS.fd
> > -
> > -rm -f smoke.serial
> > -export TEST_CMD=3D"qemu-system-x86_64 -nographic -M q35,kernel-irqchip=
=3Dsplit \
> > -        -drive if=3Dpflash,format=3Draw,readonly=3Don,file=3DOVMF_CODE=
.fd \
> > -        -drive if=3Dpflash,format=3Draw,file=3DOVMF_VARS.fd \
> > -        -drive file=3Dfat:rw:boot-esp,media=3Ddisk,index=3D0,format=3D=
raw \
> > -        -m 512 -monitor none -serial stdio"
> > -
> > -export TEST_LOG=3D"smoke.serial"
> > -export PASSED=3D"Test result: SUCCESS"
> > -
> > -./automation/scripts/console.exp | sed 's/\r\+$//'
> > --
> > 2.34.1
> >
> >



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Subject: Re: [PATCH 00/21] x86: Trenchboot Secure Launch DRTM (Xen)
To: Sergii Dmytruk , xen-devel@lists.xenproject.org
Cc: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
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On 22/04/2025 4:06 pm, Sergii Dmytruk wrote:
> The aim of the [TrenchBoot] project is to provide an implementation of
> DRTM that is generic enough to cover various use cases:
>  - Intel TXT and AMD SKINIT on x86 CPUs
>  - legacy and UEFI boot
>  - TPM1.2 and TPM2.0
>  - (in the future) DRTM on Arm CPUs
>
> DRTM is a version of a measured launch that starts on request rather
> than at the start of a boot cycle.  One of its advantages is in not
> including the firmware in the chain of trust.
>
> Xen already supports DRTM via [tboot] which targets Intel TXT only.
> tboot employs encapsulates some of the DRTM details within itself while
> with TrenchBoot Xen (or Linux) is meant to be a self-contained payload
> for a TrenchBoot-enabled bootloader (think GRUB).  The one exception is
> that UEFI case requires calling back into bootloader to initiate DRTM,
> which is necessary to give Xen a chance of querying all the information
> it needs from the firmware before performing DRTM start.
>
> From reading the above tboot might seem like a more abstracted, but the
> reality is that the payload needs to have DRTM-specific knowledge either
> way.  TrenchBoot in principle allows coming up with independent
> implementations of bootloaders and payloads that are compatible with
> each other.
>
> The "x86/boot: choose AP stack based on APIC ID" patch is shared with
> [Parallelize AP bring-up] series which is required here because Intel
> TXT always releases all APs simultaneously.  The rest of the patches are
> unique.

I've stripped out the sha2 patch and fixed up to use the existing sha2,
then kicked off some CI testing:

https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1780285393
https://cirrus-ci.com/build/5452335868018688

When the dust has settled, I'll talk you through the failures.

~Andrew


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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Stefano Stabellini ,
	Julien Grall ,
	Volodymyr Babchuk ,
	Bertrand Marquis ,
	Michal Orzel 
Subject: [PATCH] arm/alternative: Drop unused includes of asm/alternative.h
Date: Tue, 22 Apr 2025 18:30:58 +0100
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No functional change.

Signed-off-by: Andrew Cooper 
---
CC: Stefano Stabellini 
CC: Julien Grall 
CC: Volodymyr Babchuk 
CC: Bertrand Marquis 
CC: Michal Orzel 
---
 xen/arch/arm/arm64/cache.S | 2 --
 xen/arch/arm/domain.c      | 1 -
 2 files changed, 3 deletions(-)

diff --git a/xen/arch/arm/arm64/cache.S b/xen/arch/arm/arm64/cache.S
index 66ed85f73503..c0a8ca163a47 100644
--- a/xen/arch/arm/arm64/cache.S
+++ b/xen/arch/arm/arm64/cache.S
@@ -19,8 +19,6 @@
  * along with this program.  If not, see .
  */
 
-#include 
-
 /*
  * dcache_line_size - get the minimum D-cache line size from the CTR register.
  */
diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
index dc4b4e84c1c3..23cf8729f1d7 100644
--- a/xen/arch/arm/domain.c
+++ b/xen/arch/arm/domain.c
@@ -12,7 +12,6 @@
 #include 
 #include 
 
-#include 
 #include 
 #include 
 #include 
-- 
2.39.5



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Subject: Re: [RFC PATCH v2 00/34] MSR refactor with new MSR instructions
 support
To: Sean Christopherson 
Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org,
        tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
        pbonzini@redhat.com, vkuznets@redhat.com, luto@kernel.org,
        boris.ostrovsky@oracle.com, kys@microsoft.com, haiyangz@microsoft.com,
        decui@microsoft.com
References: <20250422082216.1954310-1-xin@zytor.com>
 
Content-Language: en-US
From: Xin Li 
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On 4/22/2025 8:03 AM, Sean Christopherson wrote:
> On Tue, Apr 22, 2025, Xin Li (Intel) wrote:
>> base-commit: f30a0c0d2b08b355c01392538de8fc872387cb2b
> 
> This commit doesn't exist in Linus' tree or the tip tree, and the series doesn't
> apply cleanly on any of the "obvious" choices.  Reviewing a 34 patches series
> without being able to apply it is a wee bit difficult...
> 

$ git show f30a0c0d2b08b355c01392538de8fc872387cb2b
commit f30a0c0d2b08b355c01392538de8fc872387cb2b
Merge: 49b517e68cf7 e396dd85172c
Author: Ingo Molnar 
Date:   Tue Apr 22 08:37:32 2025 +0200

     Merge branch into tip/master: 'x86/sev'

      # New commits in x86/sev:
         e396dd85172c ("x86/sev: Register tpm-svsm platform device")
         93b7c6b3ce91 ("tpm: Add SNP SVSM vTPM driver")
         b2849b072366 ("svsm: Add header with SVSM_VTPM_CMD helpers")
         770de678bc28 ("x86/sev: Add SVSM vTPM probe/send_command 
functions")

     Signed-off-by: Ingo Molnar 


You probably need to git pull from the tip tree :-)


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From: "Luck, Tony" 
To: Xin Li , Sean Christopherson 
CC: "linux-kernel@vger.kernel.org" ,
	"kvm@vger.kernel.org" ,
	"linux-perf-users@vger.kernel.org" ,
	"linux-hyperv@vger.kernel.org" ,
	"virtualization@lists.linux.dev" ,
	"linux-pm@vger.kernel.org" ,
	"linux-edac@vger.kernel.org" ,
	"xen-devel@lists.xenproject.org" ,
	"linux-acpi@vger.kernel.org" ,
	"linux-hwmon@vger.kernel.org" ,
	"netdev@vger.kernel.org" ,
	"platform-driver-x86@vger.kernel.org" ,
	"tglx@linutronix.de" , "mingo@redhat.com"
	, "bp@alien8.de" ,
	"dave.hansen@linux.intel.com" , "x86@kernel.org"
	, "hpa@zytor.com" , "acme@kernel.org"
	, "jgross@suse.com" ,
	"andrew.cooper3@citrix.com" ,
	"peterz@infradead.org" , "namhyung@kernel.org"
	, "mark.rutland@arm.com" ,
	"alexander.shishkin@linux.intel.com" ,
	"jolsa@kernel.org" , "irogers@google.com"
	, "Hunter, Adrian" ,
	"kan.liang@linux.intel.com" , "wei.liu@kernel.org"
	, "ajay.kaher@broadcom.com" ,
	"bcm-kernel-feedback-list@broadcom.com"
	, "pbonzini@redhat.com"
	, "vkuznets@redhat.com" ,
	"luto@kernel.org" , "Ostrovsky, Boris"
	, "kys@microsoft.com" ,
	"haiyangz@microsoft.com" , "Cui, Dexuan"
	
Subject: RE: [RFC PATCH v2 00/34] MSR refactor with new MSR instructions
 support
Thread-Topic: [RFC PATCH v2 00/34] MSR refactor with new MSR instructions
 support
Thread-Index: AQHbs1/RMUZdzVvoTE+K/82snKlUebOvyIiAgAAvBoCAAAKQYA==
Date: Tue, 22 Apr 2025 18:05:41 +0000
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References: <20250422082216.1954310-1-xin@zytor.com>
 
 
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 hTct/RRCL+Bkq/uq/sFR4tq3pL95ZSZIYnkgr8l9DAyf8wljFsgRNwJyJBs72HvvyxdsKg2KIuS
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 65TYBKG8XCEkwzfCM8uZuNR6aNGocTt3foxC/gBMXc3TA==

On Tue, Apr 22, 2025 at 05:23:30PM +0200, Jan Beulich wrote:
> Just one basic nit right here: In the names of new files you add, please
> prefer dashes over underscores.

I wasn't aware of this preference, will be updated in the next version.

> Jan


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Date: Tue, 22 Apr 2025 21:01:04 +0200
From: Nicola Vetrini 
To: Andrew Cooper 
Cc: Sergii Dmytruk ,
 xen-devel@lists.xenproject.org, Jan Beulich ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Lukasz Hawrylko
 , "Daniel P. Smith" ,
 =?UTF-8?Q?Mateusz_M=C3=B3wka?= , Anthony PERARD
 , Michal Orzel , Julien
 Grall , Stefano Stabellini ,
 =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 , trenchboot-devel@googlegroups.com
Subject: Re: [PATCH 00/21] x86: Trenchboot Secure Launch DRTM (Xen)
In-Reply-To: <744934f4-f56f-4dc7-bccb-c32f2829d1da@citrix.com>
References: 
 <744934f4-f56f-4dc7-bccb-c32f2829d1da@citrix.com>
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On 2025-04-22 19:14, Andrew Cooper wrote:
> On 22/04/2025 4:06 pm, Sergii Dmytruk wrote:
>> The aim of the [TrenchBoot] project is to provide an implementation of
>> DRTM that is generic enough to cover various use cases:
>>  - Intel TXT and AMD SKINIT on x86 CPUs
>>  - legacy and UEFI boot
>>  - TPM1.2 and TPM2.0
>>  - (in the future) DRTM on Arm CPUs
>> 
>> DRTM is a version of a measured launch that starts on request rather
>> than at the start of a boot cycle.  One of its advantages is in not
>> including the firmware in the chain of trust.
>> 
>> Xen already supports DRTM via [tboot] which targets Intel TXT only.
>> tboot employs encapsulates some of the DRTM details within itself 
>> while
>> with TrenchBoot Xen (or Linux) is meant to be a self-contained payload
>> for a TrenchBoot-enabled bootloader (think GRUB).  The one exception 
>> is
>> that UEFI case requires calling back into bootloader to initiate DRTM,
>> which is necessary to give Xen a chance of querying all the 
>> information
>> it needs from the firmware before performing DRTM start.
>> 
>> From reading the above tboot might seem like a more abstracted, but 
>> the
>> reality is that the payload needs to have DRTM-specific knowledge 
>> either
>> way.  TrenchBoot in principle allows coming up with independent
>> implementations of bootloaders and payloads that are compatible with
>> each other.
>> 
>> The "x86/boot: choose AP stack based on APIC ID" patch is shared with
>> [Parallelize AP bring-up] series which is required here because Intel
>> TXT always releases all APs simultaneously.  The rest of the patches 
>> are
>> unique.
> 
> I've stripped out the sha2 patch and fixed up to use the existing sha2,
> then kicked off some CI testing:
> 
> https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1780285393
> https://cirrus-ci.com/build/5452335868018688
> 
> When the dust has settled, I'll talk you through the failures.
> 

Accidental use of C18 here

https://saas.eclairit.com:3787/fs/var/local/eclair/xen-project.ecdf/xen-project/hardware/xen-staging/ECLAIR_normal/andrew/tb-v1.1/X86_64/9791028023/PROJECT.ecd;/by_service/MC3A2.D1.1.html

> ~Andrew

-- 
Nicola Vetrini, B.Sc.
Software Engineer
BUGSENG (https://bugseng.com)
LinkedIn: https://www.linkedin.com/in/nicola-vetrini-a42471253


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Date: Tue, 22 Apr 2025 12:18:12 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Andrew Cooper 
cc: Xen-devel , 
    Stefano Stabellini , Julien Grall , 
    Volodymyr Babchuk , 
    Bertrand Marquis , 
    Michal Orzel 
Subject: Re: [PATCH] arm/alternative: Drop unused includes of
 asm/alternative.h
In-Reply-To: <20250422173058.1459730-1-andrew.cooper3@citrix.com>
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On Tue, 22 Apr 2025, Andrew Cooper wrote:
> No functional change.
> 
> Signed-off-by: Andrew Cooper 

Acked-by: Stefano Stabellini 


> ---
> CC: Stefano Stabellini 
> CC: Julien Grall 
> CC: Volodymyr Babchuk 
> CC: Bertrand Marquis 
> CC: Michal Orzel 
> ---
>  xen/arch/arm/arm64/cache.S | 2 --
>  xen/arch/arm/domain.c      | 1 -
>  2 files changed, 3 deletions(-)
> 
> diff --git a/xen/arch/arm/arm64/cache.S b/xen/arch/arm/arm64/cache.S
> index 66ed85f73503..c0a8ca163a47 100644
> --- a/xen/arch/arm/arm64/cache.S
> +++ b/xen/arch/arm/arm64/cache.S
> @@ -19,8 +19,6 @@
>   * along with this program.  If not, see .
>   */
>  
> -#include 
> -
>  /*
>   * dcache_line_size - get the minimum D-cache line size from the CTR register.
>   */
> diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
> index dc4b4e84c1c3..23cf8729f1d7 100644
> --- a/xen/arch/arm/domain.c
> +++ b/xen/arch/arm/domain.c
> @@ -12,7 +12,6 @@
>  #include 
>  #include 
>  
> -#include 
>  #include 
>  #include 
>  #include 
> -- 
> 2.39.5
> 


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Date: Tue, 22 Apr 2025 21:44:57 +0200
From: Ingo Molnar 
To: "Luck, Tony" 
Cc: Xin Li , Sean Christopherson ,
	"linux-kernel@vger.kernel.org" ,
	"kvm@vger.kernel.org" ,
	"linux-perf-users@vger.kernel.org" ,
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	"x86@kernel.org" , "hpa@zytor.com" ,
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	"Hunter, Adrian" ,
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	"Ostrovsky, Boris" ,
	"kys@microsoft.com" ,
	"haiyangz@microsoft.com" ,
	"Cui, Dexuan" 
Subject: Re: [RFC PATCH v2 00/34] MSR refactor with new MSR instructions
 support
Message-ID: 
References: <20250422082216.1954310-1-xin@zytor.com>
 
 
 
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* Luck, Tony  wrote:

> > >> base-commit: f30a0c0d2b08b355c01392538de8fc872387cb2b
> > >
> > > This commit doesn't exist in Linus' tree or the tip tree, and the series doesn't
> > > apply cleanly on any of the "obvious" choices.  Reviewing a 34 patches series
> > > without being able to apply it is a wee bit difficult...
> > >
> >
> > $ git show f30a0c0d2b08b355c01392538de8fc872387cb2b
> > commit f30a0c0d2b08b355c01392538de8fc872387cb2b
> > Merge: 49b517e68cf7 e396dd85172c
> > Author: Ingo Molnar 
> > Date:   Tue Apr 22 08:37:32 2025 +0200
> >
> >      Merge branch into tip/master: 'x86/sev'
> >
> >       # New commits in x86/sev:
> >          e396dd85172c ("x86/sev: Register tpm-svsm platform device")
> >          93b7c6b3ce91 ("tpm: Add SNP SVSM vTPM driver")
> >          b2849b072366 ("svsm: Add header with SVSM_VTPM_CMD helpers")
> >          770de678bc28 ("x86/sev: Add SVSM vTPM probe/send_command
> > functions")
> >
> >      Signed-off-by: Ingo Molnar 
> >
> >
> > You probably need to git pull from the tip tree :-)
> 
> If possible, you should avoid basing a series on tip/master as it 
> gets recreated frequently by merging all the topic branches. The SHA1 
> is here today, gone tomorrow.

Correct, although for x86 patch submissions via email it's not wrong: 
what applies today will likely apply tomorrow as well, regardless of 
the SHA1 change. :-)

> If your changes only depend on one TIP topic branch, base on that and 
> mention in the cover letter (as well as the SHA1 supplied from git 
> format-patches --base=xxx).

Yeah, the main dependency this series has is tip:x86/msr I believe:

  git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/msr

Which SHA1's should be stable at this point.

Thanks,

	Ingo



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Date: Tue, 22 Apr 2025 12:46:28 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Andrew Cooper 
cc: Xen-devel , 
    Jan Beulich , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
    Stefano Stabellini , Julien Grall , 
    Volodymyr Babchuk , 
    Bertrand Marquis , 
    Michal Orzel 
Subject: Re: [PATCH] xen: Use asm inline when available for alternatives
In-Reply-To: <20250422113957.1289290-1-andrew.cooper3@citrix.com>
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On Tue, 22 Apr 2025, Andrew Cooper wrote:
> Compilers estimate the size of an asm() block for inlining purposes.
> 
> Constructs such as ALTERNATIVE appear large due to the metadata, depsite often
> only being a handful of instructions.  asm inline() overrides the estimation
> to identify the block as being small.
> 
> This has a substantial impact on inlining decisions, expected to be for the
> better given that the compiler has a more accurate picture to work with.
> 
> Signed-off-by: Andrew Cooper 

Hi Andrew,

If we are going to use asm_inline, please add a note to
docs/misra/C-language-toolchain.rst where we keep record of all the
language extensions we use.




> ---
> CC: Jan Beulich 
> CC: Roger Pau Monné 
> CC: Stefano Stabellini 
> CC: Julien Grall 
> CC: Volodymyr Babchuk 
> CC: Bertrand Marquis 
> CC: Michal Orzel 
> ---
>  xen/Kconfig                               |  4 +++
>  xen/arch/arm/include/asm/alternative.h    |  4 +--
>  xen/arch/arm/include/asm/arm64/flushtlb.h |  4 +--
>  xen/arch/arm/include/asm/arm64/io.h       | 43 ++++++++++++++---------
>  xen/arch/arm/include/asm/cpuerrata.h      |  8 ++---
>  xen/arch/arm/include/asm/cpufeature.h     |  8 ++---
>  xen/arch/arm/include/asm/page.h           | 12 ++++---
>  xen/arch/arm/include/asm/processor.h      |  7 ++--
>  xen/arch/arm/include/asm/sysregs.h        | 10 +++---
>  xen/arch/arm/mmu/p2m.c                    |  3 +-
>  xen/arch/x86/include/asm/alternative.h    | 36 ++++++++++---------
>  xen/include/xen/compiler.h                | 14 ++++++++
>  12 files changed, 95 insertions(+), 58 deletions(-)
> 
> diff --git a/xen/Kconfig b/xen/Kconfig
> index ae1c401a981e..ab4ab42ae987 100644
> --- a/xen/Kconfig
> +++ b/xen/Kconfig
> @@ -29,6 +29,10 @@ config LD_IS_GNU
>  config LD_IS_LLVM
>  	def_bool $(success,$(LD) --version | head -n 1 | grep -q "^LLD")
>  
> +config CC_HAS_ASM_INLINE
> +	# GCC >= 9, Clang >= 11
> +	def_bool $(success,echo 'void foo(void) { asm inline (""); }' | $(CC) -x c - -c -o /dev/null)
> +
>  # Use -f{function,data}-sections compiler parameters
>  config CC_SPLIT_SECTIONS
>  	bool
> diff --git a/xen/arch/arm/include/asm/alternative.h b/xen/arch/arm/include/asm/alternative.h
> index 22477d9497a3..1563f03a0f5a 100644
> --- a/xen/arch/arm/include/asm/alternative.h
> +++ b/xen/arch/arm/include/asm/alternative.h
> @@ -209,9 +209,9 @@ alternative_endif
>  #endif  /*  __ASSEMBLY__  */
>  
>  /*
> - * Usage: asm(ALTERNATIVE(oldinstr, newinstr, feature));
> + * Usage: asm_inline (ALTERNATIVE(oldinstr, newinstr, feature));
>   *
> - * Usage: asm(ALTERNATIVE(oldinstr, newinstr, feature, CONFIG_FOO));
> + * Usage: asm_inline (ALTERNATIVE(oldinstr, newinstr, feature, CONFIG_FOO));
>   * N.B. If CONFIG_FOO is specified, but not selected, the whole block
>   *      will be omitted, including oldinstr.
>   */
> diff --git a/xen/arch/arm/include/asm/arm64/flushtlb.h b/xen/arch/arm/include/asm/arm64/flushtlb.h
> index 45642201d147..3b99c11b50d1 100644
> --- a/xen/arch/arm/include/asm/arm64/flushtlb.h
> +++ b/xen/arch/arm/include/asm/arm64/flushtlb.h
> @@ -31,7 +31,7 @@
>  #define TLB_HELPER(name, tlbop, sh)              \
>  static inline void name(void)                    \
>  {                                                \
> -    asm volatile(                                \
> +    asm_inline volatile (                        \
>          "dsb  "  # sh  "st;"                     \
>          "tlbi "  # tlbop  ";"                    \
>          ALTERNATIVE(                             \
> @@ -55,7 +55,7 @@ static inline void name(void)                    \
>  #define TLB_HELPER_VA(name, tlbop)               \
>  static inline void name(vaddr_t va)              \
>  {                                                \
> -    asm volatile(                                \
> +    asm_inline volatile (                        \
>          "tlbi "  # tlbop  ", %0;"                \
>          ALTERNATIVE(                             \
>              "nop; nop;",                         \
> diff --git a/xen/arch/arm/include/asm/arm64/io.h b/xen/arch/arm/include/asm/arm64/io.h
> index 7d5959877759..ac90b729c44d 100644
> --- a/xen/arch/arm/include/asm/arm64/io.h
> +++ b/xen/arch/arm/include/asm/arm64/io.h
> @@ -51,40 +51,51 @@ static inline void __raw_writeq(u64 val, volatile void __iomem *addr)
>  static inline u8 __raw_readb(const volatile void __iomem *addr)
>  {
>          u8 val;
> -        asm volatile(ALTERNATIVE("ldrb %w0, [%1]",
> -                                 "ldarb %w0, [%1]",
> -                                 ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
> -                     : "=r" (val) : "r" (addr));
> +
> +        asm_inline volatile (
> +            ALTERNATIVE("ldrb %w0, [%1]",
> +                        "ldarb %w0, [%1]",
> +                        ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
> +            : "=r" (val) : "r" (addr) );
> +
>          return val;
>  }
>  
>  static inline u16 __raw_readw(const volatile void __iomem *addr)
>  {
>          u16 val;
> -        asm volatile(ALTERNATIVE("ldrh %w0, [%1]",
> -                                 "ldarh %w0, [%1]",
> -                                 ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
> -                     : "=r" (val) : "r" (addr));
> +        asm_inline volatile (
> +            ALTERNATIVE("ldrh %w0, [%1]",
> +                        "ldarh %w0, [%1]",
> +                        ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
> +            : "=r" (val) : "r" (addr) );
> +
>          return val;
>  }
>  
>  static inline u32 __raw_readl(const volatile void __iomem *addr)
>  {
>          u32 val;
> -        asm volatile(ALTERNATIVE("ldr %w0, [%1]",
> -                                 "ldar %w0, [%1]",
> -                                 ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
> -                     : "=r" (val) : "r" (addr));
> +
> +        asm_inline volatile (
> +            ALTERNATIVE("ldr %w0, [%1]",
> +                        "ldar %w0, [%1]",
> +                        ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
> +            : "=r" (val) : "r" (addr) );
> +
>          return val;
>  }
>  
>  static inline u64 __raw_readq(const volatile void __iomem *addr)
>  {
>          u64 val;
> -        asm volatile(ALTERNATIVE("ldr %0, [%1]",
> -                                 "ldar %0, [%1]",
> -                                 ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
> -                     : "=r" (val) : "r" (addr));
> +
> +        asm_inline volatile (
> +            ALTERNATIVE("ldr %0, [%1]",
> +                        "ldar %0, [%1]",
> +                        ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
> +            : "=r" (val) : "r" (addr) );
> +
>          return val;
>  }
>  
> diff --git a/xen/arch/arm/include/asm/cpuerrata.h b/xen/arch/arm/include/asm/cpuerrata.h
> index 8d7e7b9375bd..1799a16d7e7f 100644
> --- a/xen/arch/arm/include/asm/cpuerrata.h
> +++ b/xen/arch/arm/include/asm/cpuerrata.h
> @@ -16,10 +16,10 @@ static inline bool check_workaround_##erratum(void)             \
>      {                                                           \
>          register_t ret;                                         \
>                                                                  \
> -        asm volatile (ALTERNATIVE("mov %0, #0",                 \
> -                                  "mov %0, #1",                 \
> -                                  feature)                      \
> -                      : "=r" (ret));                            \
> +        asm_inline volatile (                                   \
> +            ALTERNATIVE("mov %0, #0",                           \
> +                        "mov %0, #1", feature)                  \
> +            : "=r" (ret) );                                     \
>                                                                  \
>          return unlikely(ret);                                   \
>      }                                                           \
> diff --git a/xen/arch/arm/include/asm/cpufeature.h b/xen/arch/arm/include/asm/cpufeature.h
> index 50297e53d90e..b6df18801166 100644
> --- a/xen/arch/arm/include/asm/cpufeature.h
> +++ b/xen/arch/arm/include/asm/cpufeature.h
> @@ -102,10 +102,10 @@ static inline bool cpus_have_cap(unsigned int num)
>  #define cpus_have_const_cap(num) ({                 \
>          register_t __ret;                           \
>                                                      \
> -        asm volatile (ALTERNATIVE("mov %0, #0",     \
> -                                  "mov %0, #1",     \
> -                                  num)              \
> -                      : "=r" (__ret));              \
> +        asm_inline volatile (                       \
> +            ALTERNATIVE("mov %0, #0",               \
> +                        "mov %0, #1", num)          \
> +            : "=r" (__ret) );                       \
>                                                      \
>          unlikely(__ret);                            \
>          })
> diff --git a/xen/arch/arm/include/asm/page.h b/xen/arch/arm/include/asm/page.h
> index 69f817d1e68a..27bc96b9f401 100644
> --- a/xen/arch/arm/include/asm/page.h
> +++ b/xen/arch/arm/include/asm/page.h
> @@ -176,7 +176,8 @@ static inline int invalidate_dcache_va_range(const void *p, unsigned long size)
>      {
>          size -= dcache_line_bytes - ((uintptr_t)p & cacheline_mask);
>          p = (void *)((uintptr_t)p & ~cacheline_mask);
> -        asm volatile (__clean_and_invalidate_dcache_one(0) : : "r" (p));
> +        asm_inline volatile (
> +            __clean_and_invalidate_dcache_one(0) :: "r" (p) );
>          p += dcache_line_bytes;
>      }
>  
> @@ -185,7 +186,8 @@ static inline int invalidate_dcache_va_range(const void *p, unsigned long size)
>          asm volatile (__invalidate_dcache_one(0) : : "r" (p + idx));
>  
>      if ( size > 0 )
> -        asm volatile (__clean_and_invalidate_dcache_one(0) : : "r" (p + idx));
> +        asm_inline volatile (
> +            __clean_and_invalidate_dcache_one(0) :: "r" (p + idx) );
>  
>      dsb(sy);           /* So we know the flushes happen before continuing */
>  
> @@ -209,7 +211,7 @@ static inline int clean_dcache_va_range(const void *p, unsigned long size)
>      p = (void *)((uintptr_t)p & ~cacheline_mask);
>      for ( ; size >= dcache_line_bytes;
>              idx += dcache_line_bytes, size -= dcache_line_bytes )
> -        asm volatile (__clean_dcache_one(0) : : "r" (p + idx));
> +        asm_inline volatile ( __clean_dcache_one(0) : : "r" (p + idx) );
>      dsb(sy);           /* So we know the flushes happen before continuing */
>      /* ARM callers assume that dcache_* functions cannot fail. */
>      return 0;
> @@ -247,7 +249,7 @@ static inline int clean_and_invalidate_dcache_va_range
>      if ( sizeof(x) > MIN_CACHELINE_BYTES || sizeof(x) > alignof(x) )    \
>          clean_dcache_va_range(_p, sizeof(x));                           \
>      else                                                                \
> -        asm volatile (                                                  \
> +        asm_inline volatile (                                           \
>              "dsb sy;"   /* Finish all earlier writes */                 \
>              __clean_dcache_one(0)                                       \
>              "dsb sy;"   /* Finish flush before continuing */            \
> @@ -259,7 +261,7 @@ static inline int clean_and_invalidate_dcache_va_range
>      if ( sizeof(x) > MIN_CACHELINE_BYTES || sizeof(x) > alignof(x) )    \
>          clean_and_invalidate_dcache_va_range(_p, sizeof(x));            \
>      else                                                                \
> -        asm volatile (                                                  \
> +        asm_inline volatile (                                           \
>              "dsb sy;"   /* Finish all earlier writes */                 \
>              __clean_and_invalidate_dcache_one(0)                        \
>              "dsb sy;"   /* Finish flush before continuing */            \
> diff --git a/xen/arch/arm/include/asm/processor.h b/xen/arch/arm/include/asm/processor.h
> index 60b587db697f..9cbc4f911061 100644
> --- a/xen/arch/arm/include/asm/processor.h
> +++ b/xen/arch/arm/include/asm/processor.h
> @@ -607,9 +607,10 @@ register_t get_default_cptr_flags(void);
>  #define SYNCHRONIZE_SERROR(feat)                                  \
>      do {                                                          \
>          ASSERT(local_abort_is_enabled());                         \
> -        asm volatile(ALTERNATIVE("dsb sy; isb",                   \
> -                                 "nop; nop", feat)                \
> -                                 : : : "memory");                 \
> +        asm_inline volatile (                                     \
> +            ALTERNATIVE("dsb sy; isb",                            \
> +                        "nop; nop", feat)                         \
> +            ::: "memory" );                                       \
>      } while (0)
>  
>  /*
> diff --git a/xen/arch/arm/include/asm/sysregs.h b/xen/arch/arm/include/asm/sysregs.h
> index 61e30c9e517c..5c2d362be3d8 100644
> --- a/xen/arch/arm/include/asm/sysregs.h
> +++ b/xen/arch/arm/include/asm/sysregs.h
> @@ -22,11 +22,13 @@ static inline register_t read_sysreg_par(void)
>       * DMB SY before and after accessing it, as part of the workaround for the
>       * errata 1508412.
>       */
> -    asm volatile(ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412,
> -                 CONFIG_ARM64_ERRATUM_1508412));
> +    asm_inline volatile (
> +        ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412,
> +                    CONFIG_ARM64_ERRATUM_1508412) );
>      par_el1 = READ_SYSREG64(PAR_EL1);
> -    asm volatile(ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412,
> -                 CONFIG_ARM64_ERRATUM_1508412));
> +    asm_inline volatile (
> +        ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412,
> +                    CONFIG_ARM64_ERRATUM_1508412) );
>  
>      return par_el1;
>  }
> diff --git a/xen/arch/arm/mmu/p2m.c b/xen/arch/arm/mmu/p2m.c
> index 7642dbc7c55b..d96078f547d5 100644
> --- a/xen/arch/arm/mmu/p2m.c
> +++ b/xen/arch/arm/mmu/p2m.c
> @@ -228,7 +228,8 @@ void p2m_restore_state(struct vcpu *n)
>       * registers associated to EL1/EL0 translations regime have been
>       * synchronized.
>       */
> -    asm volatile(ALTERNATIVE("nop", "isb", ARM64_WORKAROUND_AT_SPECULATE));
> +    asm_inline volatile (
> +        ALTERNATIVE("nop", "isb", ARM64_WORKAROUND_AT_SPECULATE) );
>      WRITE_SYSREG64(p2m->vttbr, VTTBR_EL2);
>  
>      last_vcpu_ran = &p2m->last_vcpu_ran[smp_processor_id()];
> diff --git a/xen/arch/x86/include/asm/alternative.h b/xen/arch/x86/include/asm/alternative.h
> index 38472fb58e2d..4c8be51d0e23 100644
> --- a/xen/arch/x86/include/asm/alternative.h
> +++ b/xen/arch/x86/include/asm/alternative.h
> @@ -116,12 +116,13 @@ extern void alternative_branches(void);
>   * without volatile and memory clobber.
>   */
>  #define alternative(oldinstr, newinstr, feature)                        \
> -        asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) : : : "memory")
> +    asm_inline volatile ( ALTERNATIVE(oldinstr, newinstr, feature)      \
> +                          ::: "memory" )
>  
>  #define alternative_2(oldinstr, newinstr1, feature1, newinstr2, feature2) \
> -	asm volatile (ALTERNATIVE_2(oldinstr, newinstr1, feature1,	\
> -				    newinstr2, feature2)		\
> -		      : : : "memory")
> +    asm_inline volatile ( ALTERNATIVE_2(oldinstr, newinstr1, feature1,  \
> +                                        newinstr2, feature2)            \
> +                          ::: "memory" )
>  
>  /*
>   * Alternative inline assembly with input.
> @@ -133,14 +134,14 @@ extern void alternative_branches(void);
>   * If you use variable sized constraints like "m" or "g" in the
>   * replacement make sure to pad to the worst case length.
>   */
> -#define alternative_input(oldinstr, newinstr, feature, input...)	\
> -	asm volatile (ALTERNATIVE(oldinstr, newinstr, feature)		\
> -		      : : input)
> +#define alternative_input(oldinstr, newinstr, feature, input...)        \
> +    asm_inline volatile ( ALTERNATIVE(oldinstr, newinstr, feature)      \
> +                          :: input )
>  
>  /* Like alternative_input, but with a single output argument */
> -#define alternative_io(oldinstr, newinstr, feature, output, input...)	\
> -	asm volatile (ALTERNATIVE(oldinstr, newinstr, feature)		\
> -		      : output : input)
> +#define alternative_io(oldinstr, newinstr, feature, output, input...)   \
> +    asm_inline volatile ( ALTERNATIVE(oldinstr, newinstr, feature)      \
> +                          : output : input )
>  
>  /*
>   * This is similar to alternative_io. But it has two features and
> @@ -150,11 +151,11 @@ extern void alternative_branches(void);
>   * Otherwise, if CPU has feature1, newinstr1 is used.
>   * Otherwise, oldinstr is used.
>   */
> -#define alternative_io_2(oldinstr, newinstr1, feature1, newinstr2,	\
> -			 feature2, output, input...)			\
> -	asm volatile(ALTERNATIVE_2(oldinstr, newinstr1, feature1,	\
> -				   newinstr2, feature2)			\
> -		     : output : input)
> +#define alternative_io_2(oldinstr, newinstr1, feature1, newinstr2,      \
> +                         feature2, output, input...)                    \
> +    asm_inline volatile ( ALTERNATIVE_2(oldinstr, newinstr1, feature1,  \
> +                                        newinstr2, feature2)            \
> +                          : output : input )
>  
>  /* Use this macro(s) if you need more than one output parameter. */
>  #define ASM_OUTPUT2(a...) a
> @@ -234,8 +235,9 @@ extern void alternative_branches(void);
>      rettype ret_;                                                  \
>      register unsigned long r10_ asm("r10");                        \
>      register unsigned long r11_ asm("r11");                        \
> -    asm volatile (ALTERNATIVE("call *%c[addr](%%rip)", "call .",   \
> -                              X86_FEATURE_ALWAYS)                  \
> +    asm_inline volatile (                                          \
> +        ALTERNATIVE("call *%c[addr](%%rip)", "call .",             \
> +                    X86_FEATURE_ALWAYS)                            \
>                    : ALT_CALL ## n ## _OUT, "=a" (ret_),            \
>                      "=r" (r10_), "=r" (r11_) ASM_CALL_CONSTRAINT   \
>                    : [addr] "i" (&(func)), "g" (func)               \
> diff --git a/xen/include/xen/compiler.h b/xen/include/xen/compiler.h
> index c68fab189154..d9b133016bb6 100644
> --- a/xen/include/xen/compiler.h
> +++ b/xen/include/xen/compiler.h
> @@ -53,6 +53,20 @@
>  #define unreachable() __builtin_unreachable()
>  #endif
>  
> +/*
> + * Compilers estimate the size of an asm() block for inlining purposes.
> + * Constructs such as ALTERNATIVE appear large due to the metadata, depsite
> + * often only being a handful of instructions.  asm inline() overrides the
> + * estimation to identify the block as being small.
> + *
> + * Note: __inline is needed to avoid getting caught up in INIT_SECTIONS_ONLY.
> + */
> +#if CONFIG_CC_HAS_ASM_INLINE
> +# define asm_inline asm __inline
> +#else
> +# define asm_inline asm
> +#endif
> +
>  /*
>   * Add the pseudo keyword 'fallthrough' so case statement blocks
>   * must end with any of these keywords:
> -- 
> 2.39.5
> 
--8323329-1665946697-1745351093=:785180--


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Message-ID: 
Subject: Re: [RFC PATCH v2 00/34] MSR refactor with new MSR instructions support
From: Sean Christopherson 
To: Ingo Molnar 
Cc: Tony Luck , Xin Li , 
	"linux-kernel@vger.kernel.org" , "kvm@vger.kernel.org" , 
	"linux-perf-users@vger.kernel.org" , 
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On Tue, Apr 22, 2025, Ingo Molnar wrote:
> 
> * Luck, Tony  wrote:
> 
> > > >> base-commit: f30a0c0d2b08b355c01392538de8fc872387cb2b
> > > >
> > > > This commit doesn't exist in Linus' tree or the tip tree, and the series doesn't
> > > > apply cleanly on any of the "obvious" choices.  Reviewing a 34 patches series
> > > > without being able to apply it is a wee bit difficult...
> > > >
> > >
> > > $ git show f30a0c0d2b08b355c01392538de8fc872387cb2b
> > > commit f30a0c0d2b08b355c01392538de8fc872387cb2b
> > > Merge: 49b517e68cf7 e396dd85172c
> > > Author: Ingo Molnar 
> > > Date:   Tue Apr 22 08:37:32 2025 +0200
> > >
> > >      Merge branch into tip/master: 'x86/sev'
> > >
> > >       # New commits in x86/sev:
> > >          e396dd85172c ("x86/sev: Register tpm-svsm platform device")
> > >          93b7c6b3ce91 ("tpm: Add SNP SVSM vTPM driver")
> > >          b2849b072366 ("svsm: Add header with SVSM_VTPM_CMD helpers")
> > >          770de678bc28 ("x86/sev: Add SVSM vTPM probe/send_command
> > > functions")
> > >
> > >      Signed-off-by: Ingo Molnar 
> > >
> > >
> > > You probably need to git pull from the tip tree :-)
> > 
> > If possible, you should avoid basing a series on tip/master as it 
> > gets recreated frequently by merging all the topic branches. The SHA1 
> > is here today, gone tomorrow.
> 
> Correct, although for x86 patch submissions via email it's not wrong: 
> what applies today will likely apply tomorrow as well, regardless of 
> the SHA1 change. :-)

Yeah, but as Tony pointed out, when using base commit that may be ephemeral, then
the cover letter needs to call out the tree+branch.  This series applies on the
current tip/master, but there was nothing to clue me into that fact.


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Subject: Re: [PATCH] xen: Use asm inline when available for alternatives
To: Stefano Stabellini 
Cc: Xen-devel ,
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On 22/04/2025 8:46 pm, Stefano Stabellini wrote:
> On Tue, 22 Apr 2025, Andrew Cooper wrote:
>> Compilers estimate the size of an asm() block for inlining purposes.
>>
>> Constructs such as ALTERNATIVE appear large due to the metadata, depsite often
>> only being a handful of instructions.  asm inline() overrides the estimation
>> to identify the block as being small.
>>
>> This has a substantial impact on inlining decisions, expected to be for the
>> better given that the compiler has a more accurate picture to work with.
>>
>> Signed-off-by: Andrew Cooper 
> Hi Andrew,
>
> If we are going to use asm_inline, please add a note to
> docs/misra/C-language-toolchain.rst where we keep record of all the
> language extensions we use.

It's just asm(), and that's already discussed.

I'm not sure what else you think is warranted.

~Andrew


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Date: Tue, 22 Apr 2025 12:58:50 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Andrew Cooper 
cc: Stefano Stabellini , 
    Xen-devel , 
    Jan Beulich , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
    Julien Grall , 
    Volodymyr Babchuk , 
    Bertrand Marquis , 
    Michal Orzel 
Subject: Re: [PATCH] xen: Use asm inline when available for alternatives
In-Reply-To: <0570b0ed-607c-49fa-b82e-29ffac60f873@citrix.com>
Message-ID: 
References: <20250422113957.1289290-1-andrew.cooper3@citrix.com>  <0570b0ed-607c-49fa-b82e-29ffac60f873@citrix.com>
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On Tue, 22 Apr 2025, Andrew Cooper wrote:
> On 22/04/2025 8:46 pm, Stefano Stabellini wrote:
> > On Tue, 22 Apr 2025, Andrew Cooper wrote:
> >> Compilers estimate the size of an asm() block for inlining purposes.
> >>
> >> Constructs such as ALTERNATIVE appear large due to the metadata, depsite often
> >> only being a handful of instructions.  asm inline() overrides the estimation
> >> to identify the block as being small.
> >>
> >> This has a substantial impact on inlining decisions, expected to be for the
> >> better given that the compiler has a more accurate picture to work with.
> >>
> >> Signed-off-by: Andrew Cooper 
> > Hi Andrew,
> >
> > If we are going to use asm_inline, please add a note to
> > docs/misra/C-language-toolchain.rst where we keep record of all the
> > language extensions we use.
> 
> It's just asm(), and that's already discussed.
> 
> I'm not sure what else you think is warranted.


If it is just asm() then there is nothing to do. We only need to
document extensions to the language, nothing else. Many of them are
already documented under docs/misra/C-language-toolchain.rst (see for
instance asm and __asm__).

I see the critical part of the patch for this question is:

> +#if CONFIG_CC_HAS_ASM_INLINE
> +# define asm_inline asm __inline
> +#else
> +# define asm_inline asm
> +#endif

it looks like __inline is an extension ?


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Date: Tue, 22 Apr 2025 22:01:09 +0200
From: Nicola Vetrini 
To: Stefano Stabellini 
Cc: Andrew Cooper , Xen-devel
 , Jan Beulich ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Julien Grall
 , Volodymyr Babchuk , Bertrand
 Marquis , Michal Orzel 
Subject: Re: [PATCH] xen: Use asm inline when available for alternatives
In-Reply-To: 
References: <20250422113957.1289290-1-andrew.cooper3@citrix.com>
 
 <0570b0ed-607c-49fa-b82e-29ffac60f873@citrix.com>
 
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On 2025-04-22 21:58, Stefano Stabellini wrote:
> On Tue, 22 Apr 2025, Andrew Cooper wrote:
>> On 22/04/2025 8:46 pm, Stefano Stabellini wrote:
>> > On Tue, 22 Apr 2025, Andrew Cooper wrote:
>> >> Compilers estimate the size of an asm() block for inlining purposes.
>> >>
>> >> Constructs such as ALTERNATIVE appear large due to the metadata, depsite often
>> >> only being a handful of instructions.  asm inline() overrides the estimation
>> >> to identify the block as being small.
>> >>
>> >> This has a substantial impact on inlining decisions, expected to be for the
>> >> better given that the compiler has a more accurate picture to work with.
>> >>
>> >> Signed-off-by: Andrew Cooper 
>> > Hi Andrew,
>> >
>> > If we are going to use asm_inline, please add a note to
>> > docs/misra/C-language-toolchain.rst where we keep record of all the
>> > language extensions we use.
>> 
>> It's just asm(), and that's already discussed.
>> 
>> I'm not sure what else you think is warranted.
> 
> 
> If it is just asm() then there is nothing to do. We only need to
> document extensions to the language, nothing else. Many of them are
> already documented under docs/misra/C-language-toolchain.rst (see for
> instance asm and __asm__).
> 
> I see the critical part of the patch for this question is:
> 
>> +#if CONFIG_CC_HAS_ASM_INLINE
>> +# define asm_inline asm __inline
>> +#else
>> +# define asm_inline asm
>> +#endif
> 
> it looks like __inline is an extension ?

I see. It was added to the tool configuration, but not there in the rst 
(__inline__ as well), hence why there are no CI failures.

-- 
Nicola Vetrini, B.Sc.
Software Engineer
BUGSENG (https://bugseng.com)
LinkedIn: https://www.linkedin.com/in/nicola-vetrini-a42471253


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Date: Tue, 22 Apr 2025 13:02:49 -0700 (PDT)
From: Stefano Stabellini 
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To: Nicola Vetrini 
cc: Stefano Stabellini , 
    Andrew Cooper , 
    Xen-devel , 
    Jan Beulich , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
    Julien Grall , 
    Volodymyr Babchuk , 
    Bertrand Marquis , 
    Michal Orzel 
Subject: Re: [PATCH] xen: Use asm inline when available for alternatives
In-Reply-To: 
Message-ID: 
References: <20250422113957.1289290-1-andrew.cooper3@citrix.com>  <0570b0ed-607c-49fa-b82e-29ffac60f873@citrix.com> 
 
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On Tue, 22 Apr 2025, Nicola Vetrini wrote:
> On 2025-04-22 21:58, Stefano Stabellini wrote:
> > On Tue, 22 Apr 2025, Andrew Cooper wrote:
> > > On 22/04/2025 8:46 pm, Stefano Stabellini wrote:
> > > > On Tue, 22 Apr 2025, Andrew Cooper wrote:
> > > >> Compilers estimate the size of an asm() block for inlining purposes.
> > > >>
> > > >> Constructs such as ALTERNATIVE appear large due to the metadata,
> > > depsite often
> > > >> only being a handful of instructions.  asm inline() overrides the
> > > estimation
> > > >> to identify the block as being small.
> > > >>
> > > >> This has a substantial impact on inlining decisions, expected to be for
> > > the
> > > >> better given that the compiler has a more accurate picture to work
> > > with.
> > > >>
> > > >> Signed-off-by: Andrew Cooper 
> > > > Hi Andrew,
> > > >
> > > > If we are going to use asm_inline, please add a note to
> > > > docs/misra/C-language-toolchain.rst where we keep record of all the
> > > > language extensions we use.
> > > 
> > > It's just asm(), and that's already discussed.
> > > 
> > > I'm not sure what else you think is warranted.
> > 
> > 
> > If it is just asm() then there is nothing to do. We only need to
> > document extensions to the language, nothing else. Many of them are
> > already documented under docs/misra/C-language-toolchain.rst (see for
> > instance asm and __asm__).
> > 
> > I see the critical part of the patch for this question is:
> > 
> > > +#if CONFIG_CC_HAS_ASM_INLINE
> > > +# define asm_inline asm __inline
> > > +#else
> > > +# define asm_inline asm
> > > +#endif
> > 
> > it looks like __inline is an extension ?
> 
> I see. It was added to the tool configuration, but not there in the rst
> (__inline__ as well), hence why there are no CI failures.

I see __inline__|__inline in toolchain.ecl. Nicola, would you be up for
sending a small patch to docs/misra/C-language-toolchain.rst to add them?


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Date: Tue, 22 Apr 2025 21:03:55 +0100
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Subject: Re: [PATCH] xen: Use asm inline when available for alternatives
To: Stefano Stabellini 
Cc: Xen-devel ,
 Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Julien Grall ,
 Volodymyr Babchuk ,
 Bertrand Marquis ,
 Michal Orzel 
References: <20250422113957.1289290-1-andrew.cooper3@citrix.com>
 
 <0570b0ed-607c-49fa-b82e-29ffac60f873@citrix.com>
 
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From: Andrew Cooper 
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On 22/04/2025 8:58 pm, Stefano Stabellini wrote:
> On Tue, 22 Apr 2025, Andrew Cooper wrote:
>> On 22/04/2025 8:46 pm, Stefano Stabellini wrote:
>>> On Tue, 22 Apr 2025, Andrew Cooper wrote:
>>>> Compilers estimate the size of an asm() block for inlining purposes.
>>>>
>>>> Constructs such as ALTERNATIVE appear large due to the metadata, depsite often
>>>> only being a handful of instructions.  asm inline() overrides the estimation
>>>> to identify the block as being small.
>>>>
>>>> This has a substantial impact on inlining decisions, expected to be for the
>>>> better given that the compiler has a more accurate picture to work with.
>>>>
>>>> Signed-off-by: Andrew Cooper 
>>> Hi Andrew,
>>>
>>> If we are going to use asm_inline, please add a note to
>>> docs/misra/C-language-toolchain.rst where we keep record of all the
>>> language extensions we use.
>> It's just asm(), and that's already discussed.
>>
>> I'm not sure what else you think is warranted.
>
> If it is just asm() then there is nothing to do. We only need to
> document extensions to the language, nothing else. Many of them are
> already documented under docs/misra/C-language-toolchain.rst (see for
> instance asm and __asm__).
>
> I see the critical part of the patch for this question is:
>
>> +#if CONFIG_CC_HAS_ASM_INLINE
>> +# define asm_inline asm __inline
>> +#else
>> +# define asm_inline asm
>> +#endif
> it looks like __inline is an extension ?

That's just inline.  (It's an alternative spelling, and we discuss those
too.)

The reason it's not plain "asm inline" is because of the (deviated)
"#define inline inline __init", where an eventual "asm inline __init
(..." is a syntax error.

~Andrew


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Date: Tue, 22 Apr 2025 22:08:53 +0200
From: Nicola Vetrini 
To: Stefano Stabellini 
Cc: Andrew Cooper , Xen-devel
 , Jan Beulich ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Julien Grall
 , Volodymyr Babchuk , Bertrand
 Marquis , Michal Orzel 
Subject: Re: [PATCH] xen: Use asm inline when available for alternatives
In-Reply-To: 
References: <20250422113957.1289290-1-andrew.cooper3@citrix.com>
 
 <0570b0ed-607c-49fa-b82e-29ffac60f873@citrix.com>
 
 
 
Message-ID: <60e776075c8861f825ef2589b9053792@bugseng.com>
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On 2025-04-22 22:02, Stefano Stabellini wrote:
> On Tue, 22 Apr 2025, Nicola Vetrini wrote:
>> On 2025-04-22 21:58, Stefano Stabellini wrote:
>> > On Tue, 22 Apr 2025, Andrew Cooper wrote:
>> > > On 22/04/2025 8:46 pm, Stefano Stabellini wrote:
>> > > > On Tue, 22 Apr 2025, Andrew Cooper wrote:
>> > > >> Compilers estimate the size of an asm() block for inlining purposes.
>> > > >>
>> > > >> Constructs such as ALTERNATIVE appear large due to the metadata,
>> > > depsite often
>> > > >> only being a handful of instructions.  asm inline() overrides the
>> > > estimation
>> > > >> to identify the block as being small.
>> > > >>
>> > > >> This has a substantial impact on inlining decisions, expected to be for
>> > > the
>> > > >> better given that the compiler has a more accurate picture to work
>> > > with.
>> > > >>
>> > > >> Signed-off-by: Andrew Cooper 
>> > > > Hi Andrew,
>> > > >
>> > > > If we are going to use asm_inline, please add a note to
>> > > > docs/misra/C-language-toolchain.rst where we keep record of all the
>> > > > language extensions we use.
>> > >
>> > > It's just asm(), and that's already discussed.
>> > >
>> > > I'm not sure what else you think is warranted.
>> >
>> >
>> > If it is just asm() then there is nothing to do. We only need to
>> > document extensions to the language, nothing else. Many of them are
>> > already documented under docs/misra/C-language-toolchain.rst (see for
>> > instance asm and __asm__).
>> >
>> > I see the critical part of the patch for this question is:
>> >
>> > > +#if CONFIG_CC_HAS_ASM_INLINE
>> > > +# define asm_inline asm __inline
>> > > +#else
>> > > +# define asm_inline asm
>> > > +#endif
>> >
>> > it looks like __inline is an extension ?
>> 
>> I see. It was added to the tool configuration, but not there in the 
>> rst
>> (__inline__ as well), hence why there are no CI failures.
> 
> I see __inline__|__inline in toolchain.ecl. Nicola, would you be up for
> sending a small patch to docs/misra/C-language-toolchain.rst to add 
> them?

Yes, no problem. I'll take the occasion to see whether there are other 
gaps. Perhaps there's a clever way to ensure these files do not go out 
of sync?

-- 
Nicola Vetrini, B.Sc.
Software Engineer
BUGSENG (https://bugseng.com)
LinkedIn: https://www.linkedin.com/in/nicola-vetrini-a42471253


From xen-devel-bounces@lists.xenproject.org Tue Apr 22 20:12:35 2025
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Date: Tue, 22 Apr 2025 13:12:22 -0700 (PDT)
From: Stefano Stabellini 
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To: Nicola Vetrini 
cc: Stefano Stabellini , 
    Andrew Cooper , 
    Xen-devel , 
    Jan Beulich , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
    Julien Grall , 
    Volodymyr Babchuk , 
    Bertrand Marquis , 
    Michal Orzel 
Subject: Re: [PATCH] xen: Use asm inline when available for alternatives
In-Reply-To: <60e776075c8861f825ef2589b9053792@bugseng.com>
Message-ID: 
References: <20250422113957.1289290-1-andrew.cooper3@citrix.com>  <0570b0ed-607c-49fa-b82e-29ffac60f873@citrix.com> 
   <60e776075c8861f825ef2589b9053792@bugseng.com>
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On Tue, 22 Apr 2025, Nicola Vetrini wrote:
> On 2025-04-22 22:02, Stefano Stabellini wrote:
> > On Tue, 22 Apr 2025, Nicola Vetrini wrote:
> > > On 2025-04-22 21:58, Stefano Stabellini wrote:
> > > > On Tue, 22 Apr 2025, Andrew Cooper wrote:
> > > > > On 22/04/2025 8:46 pm, Stefano Stabellini wrote:
> > > > > > On Tue, 22 Apr 2025, Andrew Cooper wrote:
> > > > > >> Compilers estimate the size of an asm() block for inlining
> > > purposes.
> > > > > >>
> > > > > >> Constructs such as ALTERNATIVE appear large due to the metadata,
> > > > > depsite often
> > > > > >> only being a handful of instructions.  asm inline() overrides the
> > > > > estimation
> > > > > >> to identify the block as being small.
> > > > > >>
> > > > > >> This has a substantial impact on inlining decisions, expected to be
> > > for
> > > > > the
> > > > > >> better given that the compiler has a more accurate picture to work
> > > > > with.
> > > > > >>
> > > > > >> Signed-off-by: Andrew Cooper 
> > > > > > Hi Andrew,
> > > > > >
> > > > > > If we are going to use asm_inline, please add a note to
> > > > > > docs/misra/C-language-toolchain.rst where we keep record of all the
> > > > > > language extensions we use.
> > > > >
> > > > > It's just asm(), and that's already discussed.
> > > > >
> > > > > I'm not sure what else you think is warranted.
> > > >
> > > >
> > > > If it is just asm() then there is nothing to do. We only need to
> > > > document extensions to the language, nothing else. Many of them are
> > > > already documented under docs/misra/C-language-toolchain.rst (see for
> > > > instance asm and __asm__).
> > > >
> > > > I see the critical part of the patch for this question is:
> > > >
> > > > > +#if CONFIG_CC_HAS_ASM_INLINE
> > > > > +# define asm_inline asm __inline
> > > > > +#else
> > > > > +# define asm_inline asm
> > > > > +#endif
> > > >
> > > > it looks like __inline is an extension ?
> > > 
> > > I see. It was added to the tool configuration, but not there in the rst
> > > (__inline__ as well), hence why there are no CI failures.
> > 
> > I see __inline__|__inline in toolchain.ecl. Nicola, would you be up for
> > sending a small patch to docs/misra/C-language-toolchain.rst to add them?
> 
> Yes, no problem. I'll take the occasion to see whether there are other gaps.

Thanks!


> Perhaps there's a clever way to ensure these files do not go out of sync?

It would take a bit of work, but we could have the list of extensions in
json (like exclude-list.json or safe.json), then we could generate both
C-language-toolchain.rst and toolchain.ecl from the json file.


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Cc: Anthony PERARD ,
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In-Reply-To: <1cf5d940e666b2b292fc84ed1fbb8a95cd57f027.1745172094.git.sergii.dmytruk@3mdeb.com>
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On 22/04/2025 4:06 pm, Sergii Dmytruk wrote:
> diff --git a/xen/include/xen/slr_table.h b/xen/include/xen/slr_table.h
> new file mode 100644
> index 0000000000..e9dbac5d0a
> --- /dev/null
> +++ b/xen/include/xen/slr_table.h
> @@ -0,0 +1,274 @@
> +/* SPDX-License-Identifier: GPL-3.0-or-later */

I'm sorry, but we cannot accept this submission.

Xen is GPL-2-only, and can only accept source code compatible with this
license.  Everything else in this series appears to be compatible (and
therefore is fine), but this patch is not.

~Andrew


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Subject: Re: [RFC 03/38] x86/hyperlaunch: convert max vcpu determination to
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To: "Daniel P. Smith" ,
	
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On 2025-04-19 18:07, Daniel P. Smith wrote:
> The domain configuration may request more vcpus than are present in the system.
> For dom0, the function dom0_max_vcpus() was used to clamp down to physically
> available vcpus. Here we are introducing a generalized version,
> dom_max_vcpus(), that takes a boot domain and sets the max vcpus based on the
> lesser of the requested max and the available vcpus.
> 
> Signed-off-by: Daniel P. Smith 
> ---

> diff --git a/xen/arch/x86/domain-builder/domain.c b/xen/arch/x86/domain-builder/domain.c
> new file mode 100644
> index 000000000000..f2277b9e3cf3
> --- /dev/null
> +++ b/xen/arch/x86/domain-builder/domain.c
> @@ -0,0 +1,38 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Copyright (C) 2024, Apertus Solutions, LLC
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include 
> +
> +unsigned int __init dom_max_vcpus(struct boot_domain *bd)
> +{
> +    unsigned int limit = bd->mode & BUILD_MODE_PARAVIRT ?
> +                                    MAX_VIRT_CPUS : HVM_MAX_VCPUS;
> +
> +    if ( bd->capabilities & BUILD_CAPS_CONTROL )

I added xen/include/public/bootfdt.h with DOMAIN_CAPS_CONTROL and the 
other capabilities to provide common values.

> +        limit = dom0_max_vcpus();

dom0_max_vcpus() applies Xen's dom0_max_vcpus command line option.  That 
is desirable for a traditional dom0.  For a disaggregated, Hyperlaunch 
system, I'm not sure it's appropriate.  Considering there can multiple 
control domains, it's more questionable.

Might it be better to only apply Xen "dom0" command line options to 
non-hyperlaunch dom0?  Or a domain with all of 
BUILD_CAPS_CONTROL/HARDWARE/XENSTORE?

I guess it could stay as-is, but it seems unusual.

Regards,
Jason


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Date: Tue, 22 Apr 2025 13:46:14 -0700
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH 02/21] include/xen/slr_table.h: Secure Launch Resource
 Table definitions
To: Sergii Dmytruk , xen-devel@lists.xenproject.org
Cc: Andrew Cooper ,
        Anthony PERARD ,
        Michal Orzel , Jan Beulich ,
        Julien Grall ,
        =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 ,
        Stefano Stabellini ,
        trenchboot-devel@googlegroups.com
References: 
 <1cf5d940e666b2b292fc84ed1fbb8a95cd57f027.1745172094.git.sergii.dmytruk@3mdeb.com>
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From: ross.philipson@oracle.com
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On 4/22/25 8:06 AM, Sergii Dmytruk wrote:
> The file provides constants, structures and several helper functions for
> parsing SLRT.
> 
> Signed-off-by: Sergii Dmytruk 
> ---
>   xen/include/xen/slr_table.h | 274 ++++++++++++++++++++++++++++++++++++
>   1 file changed, 274 insertions(+)
>   create mode 100644 xen/include/xen/slr_table.h
> 
> diff --git a/xen/include/xen/slr_table.h b/xen/include/xen/slr_table.h
> new file mode 100644
> index 0000000000..e9dbac5d0a
> --- /dev/null
> +++ b/xen/include/xen/slr_table.h
> @@ -0,0 +1,274 @@
> +/* SPDX-License-Identifier: GPL-3.0-or-later */
> +
> +/*
> + *  Copyright (C) 2023  Oracle and/or its affiliates.
> + *
> + *  Secure Launch Resource Table definitions
> + */
> +
> +#ifndef _SLR_TABLE_H
> +#define _SLR_TABLE_H
> +
> +#include 
> +
> +#define UEFI_SLR_TABLE_GUID \
> +    { 0x877a9b2a, 0x0385, 0x45d1, { 0xa0, 0x34, 0x9d, 0xac, 0x9c, 0x9e, 0x56, 0x5f } }
> +
> +/* SLR table header values */
> +#define SLR_TABLE_MAGIC         0x4452544d
> +#define SLR_TABLE_REVISION      1
> +
> +/* Current revisions for the policy and UEFI config */
> +#define SLR_POLICY_REVISION         1
> +#define SLR_UEFI_CONFIG_REVISION    1
> +
> +/* SLR defined architectures */
> +#define SLR_INTEL_TXT   1
> +#define SLR_AMD_SKINIT  2
> +
> +/* SLR defined bootloaders */
> +#define SLR_BOOTLOADER_INVALID  0
> +#define SLR_BOOTLOADER_GRUB     1
> +
> +/* Log formats */
> +#define SLR_DRTM_TPM12_LOG      1
> +#define SLR_DRTM_TPM20_LOG      2
> +
> +/* DRTM Policy Entry Flags */
> +#define SLR_POLICY_FLAG_MEASURED    0x1
> +#define SLR_POLICY_IMPLICIT_SIZE    0x2
> +
> +/* Array Lengths */
> +#define TPM_EVENT_INFO_LENGTH       32
> +#define TXT_VARIABLE_MTRRS_LENGTH   32
> +
> +/* Tags */
> +#define SLR_ENTRY_INVALID       0x0000
> +#define SLR_ENTRY_DL_INFO       0x0001
> +#define SLR_ENTRY_LOG_INFO      0x0002
> +#define SLR_ENTRY_DRTM_POLICY   0x0003
> +#define SLR_ENTRY_INTEL_INFO    0x0004
> +#define SLR_ENTRY_AMD_INFO      0x0005
> +#define SLR_ENTRY_ARM_INFO      0x0006
> +#define SLR_ENTRY_UEFI_INFO     0x0007
> +#define SLR_ENTRY_UEFI_CONFIG   0x0008
> +#define SLR_ENTRY_END           0xffff
> +
> +/* Entity Types */
> +#define SLR_ET_UNSPECIFIED        0x0000
> +#define SLR_ET_SLRT               0x0001
> +#define SLR_ET_BOOT_PARAMS        0x0002
> +#define SLR_ET_SETUP_DATA         0x0003
> +#define SLR_ET_CMDLINE            0x0004
> +#define SLR_ET_UEFI_MEMMAP        0x0005
> +#define SLR_ET_RAMDISK            0x0006
> +#define SLR_ET_MULTIBOOT2_INFO    0x0007
> +#define SLR_ET_MULTIBOOT2_MODULE  0x0008
> +#define SLR_ET_TXT_OS2MLE         0x0010
> +#define SLR_ET_UNUSED             0xffff
> +
> +/*
> + * Primary SLR Table Header
> + */
> +struct slr_table
> +{
> +    uint32_t magic;
> +    uint16_t revision;
> +    uint16_t architecture;
> +    uint32_t size;
> +    uint32_t max_size;
> +    /* entries[] */
> +} __packed;
> +
> +/*
> + * Common SLRT Table Header
> + */
> +struct slr_entry_hdr
> +{
> +    uint32_t tag;
> +    uint32_t size;
> +} __packed;
> +
> +/*
> + * Boot loader context
> + */
> +struct slr_bl_context
> +{
> +    uint16_t bootloader;
> +    uint16_t reserved[3];
> +    uint64_t context;
> +} __packed;
> +
> +/*
> + * Prototype of a function pointed to by slr_entry_dl_info::dl_handler.
> + */
> +typedef void (*dl_handler_func)(struct slr_bl_context *bl_context);
> +
> +/*
> + * DRTM Dynamic Launch Configuration
> + */
> +struct slr_entry_dl_info
> +{
> +    struct slr_entry_hdr hdr;
> +    uint64_t dce_size;
> +    uint64_t dce_base;
> +    uint64_t dlme_size;
> +    uint64_t dlme_base;
> +    uint64_t dlme_entry;
> +    struct slr_bl_context bl_context;
> +    uint64_t dl_handler;
> +} __packed;
> +
> +/*
> + * TPM Log Information
> + */
> +struct slr_entry_log_info
> +{
> +    struct slr_entry_hdr hdr;
> +    uint16_t format;
> +    uint16_t reserved;
> +    uint32_t size;
> +    uint64_t addr;
> +} __packed;
> +
> +/*
> + * DRTM Measurement Entry
> + */
> +struct slr_policy_entry
> +{
> +    uint16_t pcr;
> +    uint16_t entity_type;
> +    uint16_t flags;
> +    uint16_t reserved;
> +    uint64_t size;
> +    uint64_t entity;
> +    char evt_info[TPM_EVENT_INFO_LENGTH];
> +} __packed;
> +
> +/*
> + * DRTM Measurement Policy
> + */
> +struct slr_entry_policy
> +{
> +    struct slr_entry_hdr hdr;
> +    uint16_t reserved[2];
> +    uint16_t revision;
> +    uint16_t nr_entries;
> +    struct slr_policy_entry policy_entries[];
> +} __packed;
> +
> +/*
> + * Secure Launch defined MTRR saving structures
> + */
> +struct slr_txt_mtrr_pair
> +{
> +    uint64_t mtrr_physbase;
> +    uint64_t mtrr_physmask;
> +} __packed;
> +
> +struct slr_txt_mtrr_state
> +{
> +    uint64_t default_mem_type;
> +    uint64_t mtrr_vcnt;
> +    struct slr_txt_mtrr_pair mtrr_pair[TXT_VARIABLE_MTRRS_LENGTH];
> +} __packed;
> +
> +/*
> + * Intel TXT Info table
> + */
> +struct slr_entry_intel_info
> +{
> +    struct slr_entry_hdr hdr;
> +    uint64_t boot_params_base;
> +    uint64_t txt_heap;
> +    uint64_t saved_misc_enable_msr;
> +    struct slr_txt_mtrr_state saved_bsp_mtrrs;
> +} __packed;
> +
> +/*
> + * AMD SKINIT Info table
> + */
> +struct slr_entry_amd_info
> +{
> +    struct slr_entry_hdr hdr;
> +    uint64_t next;
> +    uint32_t type;
> +    uint32_t len;
> +    uint64_t slrt_size;
> +    uint64_t slrt_base;
> +    uint64_t boot_params_base;
> +    uint16_t psp_version;
> +    uint16_t reserved[3];
> +} __packed;
> +
> +/*
> + * ARM DRTM Info table
> + */
> +struct slr_entry_arm_info
> +{
> +    struct slr_entry_hdr hdr;
> +} __packed;

You can probably ditch this for now.

> +
> +/*
> + * UEFI config measurement entry
> + */
> +struct slr_uefi_cfg_entry
> +{
> +    uint16_t pcr;
> +    uint16_t reserved;
> +    uint32_t size;
> +    uint64_t cfg; /* address or value */
> +    char evt_info[TPM_EVENT_INFO_LENGTH];
> +} __packed;
> +
> +struct slr_entry_uefi_config
> +{
> +    struct slr_entry_hdr hdr;
> +    uint16_t reserved[2];
> +    uint16_t revision;
> +    uint16_t nr_entries;
> +    struct slr_uefi_cfg_entry uefi_cfg_entries[];
> +} __packed;
> +
> +static inline void *
> +slr_end_of_entries(struct slr_table *table)
> +{
> +    return (uint8_t *)table + table->size;
> +}
> +
> +static inline struct slr_entry_hdr *
> +slr_next_entry(struct slr_table *table, struct slr_entry_hdr *curr)
> +{
> +    struct slr_entry_hdr *next = (struct slr_entry_hdr *)
> +                                 ((uint8_t *)curr + curr->size);
> +
> +    if ( (void *)next >= slr_end_of_entries(table) )
> +        return NULL;
> +    if ( next->tag == SLR_ENTRY_END )
> +        return NULL;
> +
> +    return next;
> +}
> +
> +static inline struct slr_entry_hdr *
> +slr_next_entry_by_tag (struct slr_table *table,
> +                       struct slr_entry_hdr *entry,
> +                       uint16_t tag)
> +{
> +    if ( !entry ) /* Start from the beginning */
> +        entry = (struct slr_entry_hdr *)((uint8_t *)table + sizeof(*table));
> +
> +    for ( ; ; )
> +    {
> +        if ( entry->tag == tag )
> +            return entry;
> +
> +        entry = slr_next_entry(table, entry);
> +        if ( !entry )
> +            return NULL;
> +    }
> +
> +    return NULL;
> +}

I am surprised you did not need the slr_add_entry() function. How do you 
add entries to the SLRT?

Thanks
Ross

> +
> +#endif /* _SLR_TABLE_H */



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Date: Tue, 22 Apr 2025 13:54:06 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: dmkhn@proton.me
cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, 
    cardoe@cardoe.com, marmarek@invisiblethingslab.com, sstabellini@kernel.org, 
    dmukhin@ford.com
Subject: Re: [PATCH v3 0/4] CI: updates to XTF CI runners
In-Reply-To: <20250422161819.2089738-1-dmukhin@ford.com>
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On Tue, 22 Apr 2025, dmkhn@proton.me wrote:

> The series started from adding new argo XTF CI job and ended up with updating
> all XTF runners and related CI jobs.
> 
> It unifies the XTF runner scripts so that it is possible to use one script for
> executing any XTF test under QEMU. That simplifies running XTFs locally and in
> CI.
> 
> Patch 1 reworks x86 XTF runner.
> Patch 2 reworks x86 EFI XTF.
> Patch 3 reworks Arm64 XTF runner.
> Patch 4 adds new argo x86 XTF CI job.

I committed the first 3 patches. For the last patch, I take we need to
wait for the argo test to land in XTF?


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Date: Tue, 22 Apr 2025 21:54:15 +0000
To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com
Subject: [PATCH v4] xen/domain: unify domain ID allocation
Message-ID: <20250422215322.521464-1-dmukhin@ford.com>
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From: Denis Mukhin 

Currently, hypervisor code has two different non-system domain ID allocatio=
n
algorithms:

  (a) Arm port allocates IDs sequentially based on max_init_domid;

  (b) x86 has another algorithm implementation embedded into
      XEN_DOMCTL_createdomain; does not use max_init_domid, but does simila=
r
      thing wrt sequentially allocating IDs.

It makes sense to have a common helper code for such task across architectu=
res
(Arm and x86).

Wrap the domain ID allocation as an arch-independent function domid_alloc()=
 in
common/domain.c.

Allocation algorithm:
- If an explicit domain ID is provided, verify its availability and
  use it if ID is unused;
- Otherwise, perform an exhaustive search starting from the end of the used
  domain ID range, excluding hardware_domid.

Move the is_free_domid() helper closer to domid_alloc(). Simplify
is_free_domid() by removing the domain ID range check, as the ID is now
guaranteed to be within the valid range. Additionally, update the predicate=
 to
return a bool value instead of an int.

No functional change intended.

Signed-off-by: Denis Mukhin 
---
Changes v3->v4:
- fixed the behavior of domctl ID allocator to match the original behavior
  in case of exhaustive search
- use domid_t input argument in domid_alloc()
- use DOMID_INVALID as an indicator of performing an exhaustive search
- use DOMID_INVALID as an indicator of allocator failure
- use %pd formatting for domain ID printouts in the modified code
- some comments fixups
- Link to v2: https://lore.kernel.org/xen-devel/20250416061509.934220-1-dmu=
khin@ford.com/
- CI run: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines/178=
0576277=20
---
 xen/arch/arm/dom0less-build.c | 17 ++++++------
 xen/arch/arm/domain_build.c   | 17 ++++++++----
 xen/arch/x86/setup.c          | 11 +++++---
 xen/common/domain.c           | 51 +++++++++++++++++++++++++++++++++++
 xen/common/domctl.c           | 41 +++-------------------------
 xen/include/xen/domain.h      |  2 ++
 6 files changed, 84 insertions(+), 55 deletions(-)

diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c
index a356fc94fc..61e01b7306 100644
--- a/xen/arch/arm/dom0less-build.c
+++ b/xen/arch/arm/dom0less-build.c
@@ -1038,15 +1038,13 @@ void __init create_domUs(void)
         };
         unsigned int flags =3D 0U;
         bool has_dtb =3D false;
+        domid_t domid;
         uint32_t val;
         int rc;
=20
         if ( !dt_device_is_compatible(node, "xen,domain") )
             continue;
=20
-        if ( (max_init_domid + 1) >=3D DOMID_FIRST_RESERVED )
-            panic("No more domain IDs available\n");
-
         if ( dt_property_read_u32(node, "capabilities", &val) )
         {
             if ( val & ~DOMAIN_CAPS_MASK )
@@ -1218,12 +1216,13 @@ void __init create_domUs(void)
         if ( !llc_coloring_enabled && llc_colors_str )
             panic("'llc-colors' found, but LLC coloring is disabled\n");
=20
-        /*
-         * The variable max_init_domid is initialized with zero, so here i=
t's
-         * very important to use the pre-increment operator to call
-         * domain_create() with a domid > 0. (domid =3D=3D 0 is reserved f=
or Dom0)
-         */
-        d =3D domain_create(++max_init_domid, &d_cfg, flags);
+        domid =3D domid_alloc(DOMID_INVALID);
+        if ( domid =3D=3D DOMID_INVALID )
+            panic("Error allocating ID for domain %s\n", dt_node_name(node=
));
+        if ( max_init_domid < domid )
+            max_init_domid =3D domid;
+
+        d =3D domain_create(domid, &d_cfg, flags);
         if ( IS_ERR(d) )
             panic("Error creating domain %s (rc =3D %ld)\n",
                   dt_node_name(node), PTR_ERR(d));
diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
index 270a6b97e4..fe968dd66b 100644
--- a/xen/arch/arm/domain_build.c
+++ b/xen/arch/arm/domain_build.c
@@ -2371,6 +2371,7 @@ void __init create_dom0(void)
         .grant_opts =3D XEN_DOMCTL_GRANT_version(opt_gnttab_max_version),
     };
     unsigned int flags =3D CDF_privileged | CDF_hardware;
+    domid_t domid;
     int rc;
=20
     /* The vGIC for DOM0 is exactly emulating the hardware GIC */
@@ -2395,19 +2396,25 @@ void __init create_dom0(void)
     if ( !llc_coloring_enabled )
         flags |=3D CDF_directmap;
=20
-    dom0 =3D domain_create(0, &dom0_cfg, flags);
+    domid =3D domid_alloc(get_initial_domain_id());
+    if ( domid =3D=3D  DOMID_INVALID )
+        panic("Error allocating domain ID %d\n", get_initial_domain_id());
+
+    dom0 =3D domain_create(domid, &dom0_cfg, flags);
     if ( IS_ERR(dom0) )
-        panic("Error creating domain 0 (rc =3D %ld)\n", PTR_ERR(dom0));
+        panic("Error creating domain %d (rc =3D %ld)\n", domid, PTR_ERR(do=
m0));
=20
     if ( llc_coloring_enabled && (rc =3D dom0_set_llc_colors(dom0)) )
-        panic("Error initializing LLC coloring for domain 0 (rc =3D %d)\n"=
, rc);
+        panic("Error initializing LLC coloring for domain %pd (rc =3D %d)\=
n",
+              dom0, rc);
=20
     if ( alloc_dom0_vcpu0(dom0) =3D=3D NULL )
-        panic("Error creating domain 0 vcpu0\n");
+        panic("Error creating domain %pdv0\n", dom0);
=20
     rc =3D construct_dom0(dom0);
     if ( rc )
-        panic("Could not set up DOM0 guest OS (rc =3D %d)\n", rc);
+        panic("Could not set up guest OS for domain %pd (rc =3D %d)\n",
+              dom0, rc);
=20
     set_xs_domain(dom0);
 }
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 24b36c1a59..e61c023085 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -1009,8 +1009,11 @@ static struct domain *__init create_dom0(struct boot=
_info *bi)
     if ( iommu_enabled )
         dom0_cfg.flags |=3D XEN_DOMCTL_CDF_iommu;
=20
-    /* Create initial domain.  Not d0 for pvshim. */
-    bd->domid =3D get_initial_domain_id();
+    /* Allocate initial domain ID. Not d0 for pvshim. */
+    bd->domid =3D domid_alloc(get_initial_domain_id());
+    if ( bd->domid =3D=3D DOMID_INVALID )
+        panic("Error allocating domain ID %d\n", get_initial_domain_id());
+
     d =3D domain_create(bd->domid, &dom0_cfg,
                       pv_shim ? 0 : CDF_privileged | CDF_hardware);
     if ( IS_ERR(d) )
@@ -1038,7 +1041,7 @@ static struct domain *__init create_dom0(struct boot_=
info *bi)
=20
         if ( (strlen(acpi_param) =3D=3D 0) && acpi_disabled )
         {
-            printk("ACPI is disabled, notifying Domain 0 (acpi=3Doff)\n");
+            printk("ACPI is disabled, notifying domain %pd (acpi=3Doff)\n"=
, d);
             safe_strcpy(acpi_param, "off");
         }
=20
@@ -1053,7 +1056,7 @@ static struct domain *__init create_dom0(struct boot_=
info *bi)
=20
     bd->d =3D d;
     if ( construct_dom0(bd) !=3D 0 )
-        panic("Could not construct domain 0\n");
+        panic("Could not construct domain %pd\n", d);
=20
     return d;
 }
diff --git a/xen/common/domain.c b/xen/common/domain.c
index abf1969e60..7c0f7a4990 100644
--- a/xen/common/domain.c
+++ b/xen/common/domain.c
@@ -66,6 +66,57 @@ DEFINE_RCU_READ_LOCK(domlist_read_lock);
 static struct domain *domain_hash[DOMAIN_HASH_SIZE];
 struct domain *domain_list;
=20
+/* Domain ID allocator */
+static unsigned int domid_last;
+
+static inline bool is_free_domid(domid_t dom)
+{
+    struct domain *d =3D rcu_lock_domain_by_id(dom);
+
+    if ( d )
+        rcu_unlock_domain(d);
+
+    return !d;
+}
+
+/*
+ * Allocate new domain ID based on the hint.
+ *
+ * If hint is outside of valid [0..DOMID_FIRST_RESERVED - 1] range of IDs,
+ * perform an exhaustive search starting from the end of the used domain I=
D
+ * range, excluding hardware_domid.
+ */
+domid_t domid_alloc(domid_t hint)
+{
+    domid_t domid =3D DOMID_INVALID;
+
+    if ( hint < DOMID_FIRST_RESERVED )
+    {
+        /* Exact match. */
+        if ( is_free_domid(hint) )
+            domid =3D hint;
+    }
+    else
+    {
+        for ( domid =3D domid_last + 1; domid !=3D domid_last; domid++ )
+        {
+            if ( domid =3D=3D DOMID_FIRST_RESERVED )
+                domid =3D 0;
+
+            if ( domid =3D=3D hardware_domid )
+                continue;
+
+            if ( is_free_domid(domid) )
+                break;
+        }
+
+        if ( domid !=3D domid_last )
+            domid_last =3D domid;
+    }
+
+    return domid;
+}
+
 /*
  * Insert a domain into the domlist/hash.  This allows the domain to be lo=
oked
  * up by domid, and therefore to be the subject of hypercalls/etc.
diff --git a/xen/common/domctl.c b/xen/common/domctl.c
index bfe2e1f9f0..2e02139660 100644
--- a/xen/common/domctl.c
+++ b/xen/common/domctl.c
@@ -49,20 +49,6 @@ static int xenctl_bitmap_to_nodemask(nodemask_t *nodemas=
k,
                                    MAX_NUMNODES);
 }
=20
-static inline int is_free_domid(domid_t dom)
-{
-    struct domain *d;
-
-    if ( dom >=3D DOMID_FIRST_RESERVED )
-        return 0;
-
-    if ( (d =3D rcu_lock_domain_by_id(dom)) =3D=3D NULL )
-        return 1;
-
-    rcu_unlock_domain(d);
-    return 0;
-}
-
 void getdomaininfo(struct domain *d, struct xen_domctl_getdomaininfo *info=
)
 {
     struct vcpu *v;
@@ -421,34 +407,15 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u=
_domctl)
=20
     case XEN_DOMCTL_createdomain:
     {
-        domid_t        dom;
-        static domid_t rover =3D 0;
+        domid_t domid =3D domid_alloc(op->domain);
=20
-        dom =3D op->domain;
-        if ( (dom > 0) && (dom < DOMID_FIRST_RESERVED) )
+        if ( domid =3D=3D DOMID_INVALID )
         {
             ret =3D -EEXIST;
-            if ( !is_free_domid(dom) )
-                break;
-        }
-        else
-        {
-            for ( dom =3D rover + 1; dom !=3D rover; dom++ )
-            {
-                if ( dom =3D=3D DOMID_FIRST_RESERVED )
-                    dom =3D 1;
-                if ( is_free_domid(dom) )
-                    break;
-            }
-
-            ret =3D -ENOMEM;
-            if ( dom =3D=3D rover )
-                break;
-
-            rover =3D dom;
+            break;
         }
=20
-        d =3D domain_create(dom, &op->u.createdomain, false);
+        d =3D domain_create(domid, &op->u.createdomain, false);
         if ( IS_ERR(d) )
         {
             ret =3D PTR_ERR(d);
diff --git a/xen/include/xen/domain.h b/xen/include/xen/domain.h
index e10baf2615..43e9411fc0 100644
--- a/xen/include/xen/domain.h
+++ b/xen/include/xen/domain.h
@@ -38,6 +38,8 @@ void arch_get_domain_info(const struct domain *d,
=20
 domid_t get_initial_domain_id(void);
=20
+domid_t domid_alloc(domid_t hint);
+
 /* CDF_* constant. Internal flags for domain creation. */
 /* Is this a privileged domain? */
 #define CDF_privileged           (1U << 0)
--=20
2.34.1




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Date: Tue, 22 Apr 2025 21:59:30 +0000
To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, jbeulich@suse.com, roger.pau@citrix.com, dmukhin@ford.com
Subject: [PATCH v3] x86/vmx: Update __vmread() signature
Message-ID: <20250422215833.522007-1-dmukhin@ford.com>
Feedback-ID: 123220910:user:proton
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From: Denis Mukhin 

Current implementation of __vmread() returns the result via pointer argumen=
t
which leads to having excess code in some places.

Update the signature of __vmread() to return `unsigned long` and drop the
pointer argument as per suggestion in [1].

Rename __vmread() to vmread() as per suggestion in [2].

Update all call sites everywhere in the VT-x code.

[1] https://lore.kernel.org/xen-devel/c452a1d7-4a57-4c5f-8a83-36a74ff228ec@=
citrix.com/
[2] https://lore.kernel.org/xen-devel/0d01646b-83e3-4a02-b365-d149d2664e73@=
citrix.com/

Signed-off-by: Denis Mukhin 
---
Changes v2->v3:
- renamed __vmread() to vmread() as per suggestion in [2]
- Link to v2: https://lore.kernel.org/xen-devel/20250422011530.3010312-1-dm=
ukhin@ford.com/
- CI run: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines/178=
0259753
---
 docs/misra/function-macro-properties.json |   2 +-
 xen/arch/x86/cpu/vpmu_intel.c             |   3 +-
 xen/arch/x86/hvm/vmx/intr.c               |  26 +--
 xen/arch/x86/hvm/vmx/realmode.c           |   2 +-
 xen/arch/x86/hvm/vmx/vmcs.c               |  11 +-
 xen/arch/x86/hvm/vmx/vmx.c                | 210 ++++++++++------------
 xen/arch/x86/hvm/vmx/vvmx.c               |  43 ++---
 xen/arch/x86/include/asm/domain.h         |   2 +-
 xen/arch/x86/include/asm/hvm/vmx/vmx.h    |  19 +-
 9 files changed, 135 insertions(+), 183 deletions(-)

diff --git a/docs/misra/function-macro-properties.json b/docs/misra/functio=
n-macro-properties.json
index 74058297b5..10b436e758 100644
--- a/docs/misra/function-macro-properties.json
+++ b/docs/misra/function-macro-properties.json
@@ -154,7 +154,7 @@
       },
       {
          "type": "function",
-         "value": "^__vmread.*$",
+         "value": "^vmread.*$",
          "properties":{
             "pointee_write": "2=3Dalways",
             "pointee_read": "2=3Dnever",
diff --git a/xen/arch/x86/cpu/vpmu_intel.c b/xen/arch/x86/cpu/vpmu_intel.c
index 7ce98ee42e..7860b7c055 100644
--- a/xen/arch/x86/cpu/vpmu_intel.c
+++ b/xen/arch/x86/cpu/vpmu_intel.c
@@ -796,8 +796,7 @@ static int cf_check core2_vpmu_do_interrupt(void)
     else
     {
         /* No PMC overflow but perhaps a Trace Message interrupt. */
-        __vmread(GUEST_IA32_DEBUGCTL, &msr_content);
-        if ( !(msr_content & IA32_DEBUGCTLMSR_TR) )
+        if ( !(vmread(GUEST_IA32_DEBUGCTL) & IA32_DEBUGCTLMSR_TR) )
             return 0;
     }
=20
diff --git a/xen/arch/x86/hvm/vmx/intr.c b/xen/arch/x86/hvm/vmx/intr.c
index 91b407e6bc..07b0811fd5 100644
--- a/xen/arch/x86/hvm/vmx/intr.c
+++ b/xen/arch/x86/hvm/vmx/intr.c
@@ -63,9 +63,8 @@ static void vmx_enable_intr_window(struct vcpu *v, struct=
 hvm_intack intack)
=20
     if ( unlikely(tb_init_done) )
     {
-        unsigned long intr;
+        unsigned long intr =3D vmread(VM_ENTRY_INTR_INFO);
=20
-        __vmread(VM_ENTRY_INTR_INFO, &intr);
         TRACE(TRC_HVM_INTR_WINDOW, intack.vector, intack.source,
               (intr & INTR_INFO_VALID_MASK) ? intr & 0xff : -1);
     }
@@ -81,9 +80,8 @@ static void vmx_enable_intr_window(struct vcpu *v, struct=
 hvm_intack intack)
          * we may immediately vmexit and hance make no progress!
          * (see SDM 3B 21.3, "Other Causes of VM Exits").
          */
-        unsigned long intr_shadow;
+        unsigned long intr_shadow =3D vmread(GUEST_INTERRUPTIBILITY_INFO);
=20
-        __vmread(GUEST_INTERRUPTIBILITY_INFO, &intr_shadow);
         if ( intr_shadow & VMX_INTR_SHADOW_STI )
         {
             /* Having both STI-blocking and MOV-SS-blocking fails vmentry.=
 */
@@ -144,14 +142,8 @@ enum hvm_intblk cf_check nvmx_intr_blocked(struct vcpu=
 *v)
         if ( nvcpu->nv_vmexit_pending ||
              nvcpu->nv_vmswitch_in_progress )
             r =3D hvm_intblk_rflags_ie;
-        else
-        {
-            unsigned long intr_info;
-
-            __vmread(VM_ENTRY_INTR_INFO, &intr_info);
-            if ( intr_info & INTR_INFO_VALID_MASK )
-                r =3D hvm_intblk_rflags_ie;
-        }
+        else if ( vmread(VM_ENTRY_INTR_INFO) & INTR_INFO_VALID_MASK )
+            r =3D hvm_intblk_rflags_ie;
     }
     else if ( nvcpu->nv_vmentry_pending )
         r =3D hvm_intblk_rflags_ie;
@@ -253,8 +245,6 @@ void asmlinkage vmx_intr_assist(void)
     pt_vector =3D pt_update_irq(v);
=20
     do {
-        unsigned long intr_info;
-
         intack =3D hvm_vcpu_has_pending_irq(v);
         if ( likely(intack.source =3D=3D hvm_intsrc_none) )
             goto out;
@@ -275,8 +265,7 @@ void asmlinkage vmx_intr_assist(void)
                 goto out;
             }
=20
-            __vmread(VM_ENTRY_INTR_INFO, &intr_info);
-            if ( intr_info & INTR_INFO_VALID_MASK )
+            if ( vmread(VM_ENTRY_INTR_INFO) & INTR_INFO_VALID_MASK )
             {
                 if ( (intack.source =3D=3D hvm_intsrc_pic) ||
                      (intack.source =3D=3D hvm_intsrc_nmi) ||
@@ -299,8 +288,7 @@ void asmlinkage vmx_intr_assist(void)
         }
         else
         {
-            __vmread(VM_ENTRY_INTR_INFO, &intr_info);
-            if ( intr_info & INTR_INFO_VALID_MASK )
+            if ( vmread(VM_ENTRY_INTR_INFO) & INTR_INFO_VALID_MASK )
             {
                 vmx_enable_intr_window(v, intack);
                 goto out;
@@ -377,7 +365,7 @@ void asmlinkage vmx_intr_assist(void)
         }
=20
         /* we need update the RVI field */
-        __vmread(GUEST_INTR_STATUS, &status);
+        status =3D vmread(GUEST_INTR_STATUS);
         status &=3D ~VMX_GUEST_INTR_STATUS_SUBFIELD_BITMASK;
         status |=3D VMX_GUEST_INTR_STATUS_SUBFIELD_BITMASK &
                     intack.vector;
diff --git a/xen/arch/x86/hvm/vmx/realmode.c b/xen/arch/x86/hvm/vmx/realmod=
e.c
index ff44ddcfa6..40cbc273d0 100644
--- a/xen/arch/x86/hvm/vmx/realmode.c
+++ b/xen/arch/x86/hvm/vmx/realmode.c
@@ -159,7 +159,7 @@ void vmx_realmode(struct cpu_user_regs *regs)
     unsigned int emulations =3D 0;
=20
     /* Get-and-clear VM_ENTRY_INTR_INFO. */
-    __vmread(VM_ENTRY_INTR_INFO, &intr_info);
+    intr_info =3D vmread(VM_ENTRY_INTR_INFO);
     if ( intr_info & INTR_INFO_VALID_MASK )
         __vmwrite(VM_ENTRY_INTR_INFO, 0);
=20
diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c
index a44475ae15..2386e67d28 100644
--- a/xen/arch/x86/hvm/vmx/vmcs.c
+++ b/xen/arch/x86/hvm/vmx/vmcs.c
@@ -1031,7 +1031,7 @@ u64 virtual_vmcs_vmread(const struct vcpu *v, u32 vmc=
s_encoding)
     u64 res;
=20
     virtual_vmcs_enter(v);
-    __vmread(vmcs_encoding, &res);
+    res =3D vmread(vmcs_encoding);
     virtual_vmcs_exit(v);
=20
     return res;
@@ -1691,7 +1691,7 @@ void vmx_vcpu_flush_pml_buffer(struct vcpu *v)
=20
     vmx_vmcs_enter(v);
=20
-    __vmread(GUEST_PML_INDEX, &pml_idx);
+    pml_idx =3D vmread(GUEST_PML_INDEX);
=20
     /* Do nothing if PML buffer is empty. */
     if ( pml_idx =3D=3D (NR_PML_ENTRIES - 1) )
@@ -1874,9 +1874,8 @@ void vmx_destroy_vmcs(struct vcpu *v)
 void vmx_vmentry_failure(void)
 {
     struct vcpu *curr =3D current;
-    unsigned long error;
+    unsigned long error =3D vmread(VM_INSTRUCTION_ERROR);
=20
-    __vmread(VM_INSTRUCTION_ERROR, &error);
     gprintk(XENLOG_ERR, "VM%s error: %#lx\n",
             curr->arch.hvm.vmx.launched ? "RESUME" : "LAUNCH", error);
=20
@@ -1905,7 +1904,6 @@ void cf_check vmx_do_resume(void)
 {
     struct vcpu *v =3D current;
     bool debug_state;
-    unsigned long host_cr4;
=20
     if ( v->arch.hvm.vmx.active_cpu =3D=3D smp_processor_id() )
         vmx_vmcs_reload(v);
@@ -1957,8 +1955,7 @@ void cf_check vmx_do_resume(void)
     hvm_do_resume(v);
=20
     /* Sync host CR4 in case its value has changed. */
-    __vmread(HOST_CR4, &host_cr4);
-    if ( host_cr4 !=3D read_cr4() )
+    if ( vmread(HOST_CR4) !=3D read_cr4() )
         __vmwrite(HOST_CR4, read_cr4());
=20
     reset_stack_and_jump(vmx_asm_do_vmentry);
diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c
index 4883bd823d..272b3144d1 100644
--- a/xen/arch/x86/hvm/vmx/vmx.c
+++ b/xen/arch/x86/hvm/vmx/vmx.c
@@ -902,7 +902,7 @@ int cf_check vmx_guest_x86_mode(struct vcpu *v)
         return X86_MODE_REAL;
     if ( unlikely(guest_cpu_user_regs()->eflags & X86_EFLAGS_VM) )
         return X86_MODE_VM86;
-    __vmread(GUEST_CS_AR_BYTES, &cs_ar_bytes);
+    cs_ar_bytes =3D vmread(GUEST_CS_AR_BYTES);
     if ( hvm_long_mode_active(v) &&
          likely(cs_ar_bytes & X86_SEG_AR_CS_LM_ACTIVE) )
         return X86_MODE_64BIT;
@@ -926,7 +926,7 @@ static void vmx_save_dr(struct vcpu *v)
     v->arch.dr[3] =3D read_debugreg(3);
     v->arch.dr6   =3D read_debugreg(6);
     /* DR7 must be saved as it is used by vmx_restore_dr(). */
-    __vmread(GUEST_DR7, &v->arch.dr7);
+    v->arch.dr7 =3D vmread(GUEST_DR7);
 }
=20
 static void __restore_debug_registers(struct vcpu *v)
@@ -952,7 +952,7 @@ static void __restore_debug_registers(struct vcpu *v)
  */
 static void vmx_restore_dr(struct vcpu *v)
 {
-    /* NB. __vmread() is not usable here, so we cannot read from the VMCS.=
 */
+    /* NB. vmread() is not usable here, so we cannot read from the VMCS. *=
/
     if ( unlikely(v->arch.dr7 & DR7_ACTIVE_MASK) )
         __restore_debug_registers(v);
 }
@@ -963,17 +963,17 @@ static void vmx_vmcs_save(struct vcpu *v, struct hvm_=
hw_cpu *c)
=20
     vmx_vmcs_enter(v);
=20
-    __vmread(GUEST_SYSENTER_CS, &c->sysenter_cs);
-    __vmread(GUEST_SYSENTER_ESP, &c->sysenter_esp);
-    __vmread(GUEST_SYSENTER_EIP, &c->sysenter_eip);
+    c->sysenter_cs =3D vmread(GUEST_SYSENTER_CS);
+    c->sysenter_esp =3D vmread(GUEST_SYSENTER_ESP);
+    c->sysenter_eip =3D vmread(GUEST_SYSENTER_EIP);
=20
-    __vmread(VM_ENTRY_INTR_INFO, &ev);
+    ev =3D vmread(VM_ENTRY_INTR_INFO);
     if ( (ev & INTR_INFO_VALID_MASK) &&
          hvm_event_needs_reinjection(MASK_EXTR(ev, INTR_INFO_INTR_TYPE_MAS=
K),
                                      ev & INTR_INFO_VECTOR_MASK) )
     {
         c->pending_event =3D ev;
-        __vmread(VM_ENTRY_EXCEPTION_ERROR_CODE, &ev);
+        ev =3D vmread(VM_ENTRY_EXCEPTION_ERROR_CODE);
         c->error_code =3D ev;
     }
=20
@@ -1197,11 +1197,7 @@ static void cf_check vmx_ctxt_switch_to(struct vcpu =
*v)
=20
 unsigned int vmx_get_cpl(void)
 {
-    unsigned long attr;
-
-    __vmread(GUEST_SS_AR_BYTES, &attr);
-
-    return MASK_EXTR(attr, X86_SEG_AR_DPL);
+    return MASK_EXTR(vmread(GUEST_SS_AR_BYTES), X86_SEG_AR_DPL);
 }
=20
 static unsigned int cf_check _vmx_get_cpl(struct vcpu *v)
@@ -1271,14 +1267,14 @@ static void cf_check vmx_get_segment_register(
         fallthrough;
=20
     case x86_seg_es ... x86_seg_gs:
-        __vmread(GUEST_SEG_SELECTOR(tmp_seg), &sel);
-        __vmread(GUEST_SEG_AR_BYTES(tmp_seg), &attr);
+        sel =3D vmread(GUEST_SEG_SELECTOR(tmp_seg));
+        attr =3D vmread(GUEST_SEG_AR_BYTES(tmp_seg));
         fallthrough;
=20
     case x86_seg_gdtr:
     case x86_seg_idtr:
-        __vmread(GUEST_SEG_LIMIT(tmp_seg),    &limit);
-        __vmread(GUEST_SEG_BASE(tmp_seg),     ®->base);
+        limit =3D vmread(GUEST_SEG_LIMIT(tmp_seg));
+        reg->base =3D vmread(GUEST_SEG_BASE(tmp_seg));
         break;
=20
     default:
@@ -1436,7 +1432,7 @@ static int cf_check vmx_get_guest_pat(struct vcpu *v,=
 u64 *gpat)
         return 0;
=20
     vmx_vmcs_enter(v);
-    __vmread(GUEST_PAT, gpat);
+    *gpat =3D vmread(GUEST_PAT);
     vmx_vmcs_exit(v);
     return 1;
 }
@@ -1555,11 +1551,7 @@ static void cf_check vmx_init_hypercall_page(void *p=
)
=20
 static unsigned int cf_check vmx_get_interrupt_shadow(struct vcpu *v)
 {
-    unsigned long intr_shadow;
-
-    __vmread(GUEST_INTERRUPTIBILITY_INFO, &intr_shadow);
-
-    return intr_shadow;
+    return vmread(GUEST_INTERRUPTIBILITY_INFO);
 }
=20
 static void cf_check vmx_set_interrupt_shadow(
@@ -1573,12 +1565,12 @@ static void cf_check vmx_get_nonreg_state(struct vc=
pu *v,
 {
     vmx_vmcs_enter(v);
=20
-    __vmread(GUEST_ACTIVITY_STATE, &nrs->vmx.activity_state);
-    __vmread(GUEST_INTERRUPTIBILITY_INFO, &nrs->vmx.interruptibility_info)=
;
-    __vmread(GUEST_PENDING_DBG_EXCEPTIONS, &nrs->vmx.pending_dbg);
+    nrs->vmx.activity_state =3D vmread(GUEST_ACTIVITY_STATE);
+    nrs->vmx.interruptibility_info =3D vmread(GUEST_INTERRUPTIBILITY_INFO)=
;
+    nrs->vmx.pending_dbg =3D vmread(GUEST_PENDING_DBG_EXCEPTIONS);
=20
     if ( cpu_has_vmx_virtual_intr_delivery )
-        __vmread(GUEST_INTR_STATUS, &nrs->vmx.interrupt_status);
+        nrs->vmx.interrupt_status =3D vmread(GUEST_INTR_STATUS);
=20
     vmx_vmcs_exit(v);
 }
@@ -1896,7 +1888,7 @@ static void cf_check vmx_update_guest_efer(struct vcp=
u *v)
      * The intended guest running mode is derived from VM_ENTRY_IA32E_MODE=
,
      * which (architecturally) is the guest's LMA setting.
      */
-    __vmread(VM_ENTRY_CONTROLS, &entry_ctls);
+    entry_ctls =3D vmread(VM_ENTRY_CONTROLS);
=20
     entry_ctls &=3D ~VM_ENTRY_IA32E_MODE;
     if ( guest_efer & EFER_LMA )
@@ -2063,9 +2055,10 @@ static void cf_check vmx_inject_event(const struct x=
86_event *event)
         {
             unsigned long val;
=20
-            __vmread(GUEST_DR7, &val);
+            val =3D vmread(GUEST_DR7);
             __vmwrite(GUEST_DR7, val & ~DR_GENERAL_DETECT);
-            __vmread(GUEST_IA32_DEBUGCTL, &val);
+
+            val =3D vmread(GUEST_IA32_DEBUGCTL);
             __vmwrite(GUEST_IA32_DEBUGCTL, val & ~IA32_DEBUGCTLMSR_LBR);
         }
         if ( cpu_has_monitor_trap_flag )
@@ -2089,7 +2082,7 @@ static void cf_check vmx_inject_event(const struct x8=
6_event *event)
     if ( nestedhvm_vcpu_in_guestmode(curr) )
         intr_info =3D vcpu_2_nvmx(curr).intr.intr_info;
     else
-        __vmread(VM_ENTRY_INTR_INFO, &intr_info);
+        intr_info =3D vmread(VM_ENTRY_INTR_INFO);
=20
     if ( unlikely(intr_info & INTR_INFO_VALID_MASK) &&
          (MASK_EXTR(intr_info, INTR_INFO_INTR_TYPE_MASK) =3D=3D X86_ET_HW_=
EXC) )
@@ -2125,12 +2118,9 @@ static void cf_check vmx_inject_event(const struct x=
86_event *event)
=20
 static bool cf_check vmx_event_pending(const struct vcpu *v)
 {
-    unsigned long intr_info;
-
     ASSERT(v =3D=3D current);
-    __vmread(VM_ENTRY_INTR_INFO, &intr_info);
=20
-    return intr_info & INTR_INFO_VALID_MASK;
+    return vmread(VM_ENTRY_INTR_INFO) & INTR_INFO_VALID_MASK;
 }
=20
 static void cf_check vmx_set_info_guest(struct vcpu *v)
@@ -2149,7 +2139,7 @@ static void cf_check vmx_set_info_guest(struct vcpu *=
v)
      * to set the GUEST_PENDING_DBG_EXCEPTIONS.BS here incurs
      * immediately vmexit and hence make no progress.
      */
-    __vmread(GUEST_INTERRUPTIBILITY_INFO, &intr_shadow);
+    intr_shadow =3D vmread(GUEST_INTERRUPTIBILITY_INFO);
     if ( v->domain->debugger_attached &&
          (v->arch.user_regs.eflags & X86_EFLAGS_TF) &&
          (intr_shadow & VMX_INTR_SHADOW_STI) )
@@ -2178,7 +2168,7 @@ static u8 set_svi(int isr)
     if ( isr < 0 )
         isr =3D 0;
=20
-    __vmread(GUEST_INTR_STATUS, &status);
+    status =3D vmread(GUEST_INTR_STATUS);
     old =3D status >> VMX_GUEST_INTR_STATUS_SVI_OFFSET;
     if ( isr !=3D old )
     {
@@ -2518,9 +2508,9 @@ static bool cf_check vmx_vcpu_emulate_ve(struct vcpu =
*v)
     veinfo->eptp_index =3D vcpu_altp2m(v).p2midx;
=20
     vmx_vmcs_enter(v);
-    __vmread(EXIT_QUALIFICATION, &veinfo->exit_qualification);
-    __vmread(GUEST_LINEAR_ADDRESS, &veinfo->gla);
-    __vmread(GUEST_PHYSICAL_ADDRESS, &veinfo->gpa);
+    veinfo->exit_qualification =3D vmread(EXIT_QUALIFICATION);
+    veinfo->gla =3D vmread(GUEST_LINEAR_ADDRESS);
+    veinfo->gpa =3D vmread(GUEST_PHYSICAL_ADDRESS);
     vmx_vmcs_exit(v);
=20
     hvm_inject_hw_exception(X86_EXC_VE,
@@ -2541,8 +2531,8 @@ static bool cf_check vmx_get_pending_event(
     unsigned long intr_info, error_code;
=20
     vmx_vmcs_enter(v);
-    __vmread(VM_ENTRY_INTR_INFO, &intr_info);
-    __vmread(VM_ENTRY_EXCEPTION_ERROR_CODE, &error_code);
+    intr_info =3D vmread(VM_ENTRY_INTR_INFO);
+    error_code =3D vmread(VM_ENTRY_EXCEPTION_ERROR_CODE);
     vmx_vmcs_exit(v);
=20
     if ( !(intr_info & INTR_INFO_VALID_MASK) )
@@ -2739,11 +2729,11 @@ static uint64_t cf_check vmx_get_reg(struct vcpu *v=
, unsigned int reg)
     {
     case MSR_SPEC_CTRL:
         ASSERT(cpu_has_vmx_virt_spec_ctrl);
-        __vmread(SPEC_CTRL_SHADOW, &val);
+        val =3D vmread(SPEC_CTRL_SHADOW);
         break;
=20
     case MSR_IA32_BNDCFGS:
-        __vmread(GUEST_BNDCFGS, &val);
+        val =3D vmread(GUEST_BNDCFGS);
         break;
=20
     default:
@@ -3161,9 +3151,9 @@ void __init vmx_fill_funcs(void)
  */
 static int get_instruction_length(void)
 {
-    unsigned long len;
+    /* Safe: callers audited */
+    unsigned long len =3D vmread(VM_EXIT_INSTRUCTION_LEN);
=20
-    __vmread(VM_EXIT_INSTRUCTION_LEN, &len); /* Safe: callers audited */
     BUG_ON((len < 1) || (len > MAX_INST_LEN));
     return len;
 }
@@ -3176,7 +3166,7 @@ void update_guest_eip(void)
     regs->rip +=3D get_instruction_length(); /* Safe: callers audited */
     regs->eflags &=3D ~X86_EFLAGS_RF;
=20
-    __vmread(GUEST_INTERRUPTIBILITY_INFO, &x);
+    x =3D vmread(GUEST_INTERRUPTIBILITY_INFO);
     if ( x & (VMX_INTR_SHADOW_STI | VMX_INTR_SHADOW_MOV_SS) )
     {
         x &=3D ~(VMX_INTR_SHADOW_STI | VMX_INTR_SHADOW_MOV_SS);
@@ -3424,21 +3414,21 @@ static int cf_check vmx_msr_read_intercept(
     switch ( msr )
     {
     case MSR_IA32_SYSENTER_CS:
-        __vmread(GUEST_SYSENTER_CS, msr_content);
+        *msr_content =3D vmread(GUEST_SYSENTER_CS);
         break;
     case MSR_IA32_SYSENTER_ESP:
-        __vmread(GUEST_SYSENTER_ESP, msr_content);
+        *msr_content =3D vmread(GUEST_SYSENTER_ESP);
         break;
     case MSR_IA32_SYSENTER_EIP:
-        __vmread(GUEST_SYSENTER_EIP, msr_content);
+        *msr_content =3D vmread(GUEST_SYSENTER_EIP);
         break;
=20
     case MSR_FS_BASE:
-        __vmread(GUEST_FS_BASE, msr_content);
+        *msr_content =3D vmread(GUEST_FS_BASE);
         break;
=20
     case MSR_GS_BASE:
-        __vmread(GUEST_GS_BASE, msr_content);
+        *msr_content =3D vmread(GUEST_GS_BASE);
         break;
=20
     case MSR_SHADOW_GS_BASE:
@@ -3462,7 +3452,7 @@ static int cf_check vmx_msr_read_intercept(
         break;
=20
     case MSR_IA32_DEBUGCTLMSR:
-        __vmread(GUEST_IA32_DEBUGCTL, msr_content);
+        *msr_content =3D vmread(GUEST_IA32_DEBUGCTL);
         break;
=20
     case MSR_IA32_VMX_BASIC...MSR_IA32_VMX_VMFUNC:
@@ -3828,7 +3818,7 @@ static void vmx_do_extint(struct cpu_user_regs *regs)
 {
     unsigned long vector;
=20
-    __vmread(VM_EXIT_INTR_INFO, &vector);
+    vector =3D vmread(VM_EXIT_INTR_INFO);
     BUG_ON(!(vector & INTR_INFO_VALID_MASK));
=20
     vector &=3D INTR_INFO_VECTOR_MASK;
@@ -3893,7 +3883,7 @@ static void ept_handle_violation(ept_qual_t q, paddr_=
t gpa)
=20
     if ( q.gla_valid )
     {
-        __vmread(GUEST_LINEAR_ADDRESS, &gla);
+        gla =3D vmread(GUEST_LINEAR_ADDRESS);
         npfec.gla_valid =3D 1;
         if( q.gla_fault )
             npfec.kind =3D npfec_kind_with_gla;
@@ -3944,7 +3934,7 @@ static void vmx_failed_vmentry(unsigned int exit_reas=
on,
     struct vcpu *curr =3D current;
=20
     printk("%pv vmentry failure (reason %#x): ", curr, exit_reason);
-    __vmread(EXIT_QUALIFICATION, &exit_qualification);
+    exit_qualification =3D vmread(EXIT_QUALIFICATION);
     switch ( failed_vmentry_reason )
     {
     case EXIT_REASON_INVALID_GUEST_STATE:
@@ -4001,13 +3991,12 @@ void vmx_enter_realmode(struct cpu_user_regs *regs)
=20
 static int vmx_handle_eoi_write(void)
 {
-    unsigned long exit_qualification;
+    unsigned long exit_qualification =3D vmread(EXIT_QUALIFICATION);
=20
     /*
      * 1. Must be a linear access data write.
      * 2. Data write must be to the EOI register.
      */
-    __vmread(EXIT_QUALIFICATION, &exit_qualification);
     if ( (((exit_qualification >> 12) & 0xf) =3D=3D 1) &&
          ((exit_qualification & 0xfff) =3D=3D APIC_EOI) )
     {
@@ -4033,21 +4022,14 @@ static void vmx_propagate_intr(unsigned long intr)
         .vector =3D MASK_EXTR(intr, INTR_INFO_VECTOR_MASK),
         .type =3D MASK_EXTR(intr, INTR_INFO_INTR_TYPE_MASK),
     };
-    unsigned long tmp;
=20
     if ( intr & INTR_INFO_DELIVER_CODE_MASK )
-    {
-        __vmread(VM_EXIT_INTR_ERROR_CODE, &tmp);
-        event.error_code =3D tmp;
-    }
+        event.error_code =3D vmread(VM_EXIT_INTR_ERROR_CODE);
     else
         event.error_code =3D X86_EVENT_NO_EC;
=20
     if ( event.type >=3D X86_ET_SW_INT )
-    {
-        __vmread(VM_EXIT_INSTRUCTION_LEN, &tmp);
-        event.insn_len =3D tmp;
-    }
+        event.insn_len =3D vmread(VM_EXIT_INSTRUCTION_LEN);
     else
         event.insn_len =3D 0;
=20
@@ -4071,7 +4053,7 @@ static void vmx_idtv_reinject(unsigned long idtv_info=
)
             {
                 unsigned long ec;
=20
-                __vmread(IDT_VECTORING_ERROR_CODE, &ec);
+                ec =3D vmread(IDT_VECTORING_ERROR_CODE);
                 __vmwrite(VM_ENTRY_EXCEPTION_ERROR_CODE, ec);
             }
         }
@@ -4086,7 +4068,7 @@ static void vmx_idtv_reinject(unsigned long idtv_info=
)
         {
             unsigned long intr_info;
=20
-            __vmread(GUEST_INTERRUPTIBILITY_INFO, &intr_info);
+            intr_info =3D vmread(GUEST_INTERRUPTIBILITY_INFO);
             __vmwrite(GUEST_INTERRUPTIBILITY_INFO,
                       intr_info & ~VMX_INTR_SHADOW_NMI);
         }
@@ -4111,8 +4093,8 @@ static void vmx_handle_descriptor_access(uint32_t exi=
t_reason)
     uint64_t exit_qualification;
     unsigned int desc;
=20
-    __vmread(EXIT_QUALIFICATION, &exit_qualification);
-    __vmread(VMX_INSTRUCTION_INFO, &instr_info);
+    exit_qualification =3D vmread(EXIT_QUALIFICATION);
+    instr_info =3D vmread(VMX_INSTRUCTION_INFO);
=20
     if ( exit_reason =3D=3D EXIT_REASON_ACCESS_GDTR_OR_IDTR )
     {
@@ -4137,7 +4119,7 @@ static int vmx_handle_apic_write(void)
     unsigned long exit_qualification;
=20
     ASSERT(cpu_has_vmx_apic_reg_virt);
-    __vmread(EXIT_QUALIFICATION, &exit_qualification);
+    exit_qualification =3D vmread(EXIT_QUALIFICATION);
=20
     return vlapic_apicv_write(current, exit_qualification & 0xfff);
 }
@@ -4146,7 +4128,7 @@ static void undo_nmis_unblocked_by_iret(void)
 {
     unsigned long guest_info;
=20
-    __vmread(GUEST_INTERRUPTIBILITY_INFO, &guest_info);
+    guest_info =3D vmread(GUEST_INTERRUPTIBILITY_INFO);
     __vmwrite(GUEST_INTERRUPTIBILITY_INFO,
               guest_info | VMX_INTR_SHADOW_NMI);
 }
@@ -4159,12 +4141,12 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_=
regs *regs)
     struct vcpu *v =3D current;
     struct domain *currd =3D v->domain;
=20
-    __vmread(GUEST_RIP,    ®s->rip);
-    __vmread(GUEST_RSP,    ®s->rsp);
-    __vmread(GUEST_RFLAGS, ®s->rflags);
+    regs->rip =3D vmread(GUEST_RIP);
+    regs->rsp =3D vmread(GUEST_RSP);
+    regs->rflags =3D vmread(GUEST_RFLAGS);
=20
     if ( hvm_long_mode_active(v) )
-        __vmread(GUEST_CS_AR_BYTES, &cs_ar_bytes);
+        cs_ar_bytes =3D vmread(GUEST_CS_AR_BYTES);
=20
     hvm_sanitize_regs_fields(regs, !(cs_ar_bytes & X86_SEG_AR_CS_LM_ACTIVE=
));
=20
@@ -4174,17 +4156,17 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_=
regs *regs)
          * Xen allows the guest to modify some CR4 bits directly, update c=
ached
          * values to match.
          */
-        __vmread(GUEST_CR4, &v->arch.hvm.hw_cr[4]);
+        v->arch.hvm.hw_cr[4] =3D vmread(GUEST_CR4);
         v->arch.hvm.guest_cr[4] &=3D v->arch.hvm.vmx.cr4_host_mask;
         v->arch.hvm.guest_cr[4] |=3D (v->arch.hvm.hw_cr[4] &
                                     ~v->arch.hvm.vmx.cr4_host_mask);
=20
-        __vmread(GUEST_CR3, &v->arch.hvm.hw_cr[3]);
+        v->arch.hvm.hw_cr[3] =3D vmread(GUEST_CR3);
         if ( vmx_unrestricted_guest(v) || hvm_paging_enabled(v) )
             v->arch.hvm.guest_cr[3] =3D v->arch.hvm.hw_cr[3];
     }
=20
-    __vmread(VM_EXIT_REASON, &exit_reason);
+    exit_reason =3D vmread(VM_EXIT_REASON);
=20
     if ( hvm_long_mode_active(v) )
         TRACE_TIME(TRC_HVM_VMX_EXIT64, exit_reason, regs->rip, regs->rip >=
> 32);
@@ -4200,7 +4182,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
         vmx_do_extint(regs);
         break;
     case EXIT_REASON_EXCEPTION_NMI:
-        __vmread(VM_EXIT_INTR_INFO, &intr_info);
+        intr_info =3D vmread(VM_EXIT_INTR_INFO);
         BUG_ON(!(intr_info & INTR_INFO_VALID_MASK));
         vector =3D intr_info & INTR_INFO_VECTOR_MASK;
         if ( vector =3D=3D X86_EXC_MC )
@@ -4237,12 +4219,12 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_=
regs *regs)
=20
         if ( v->arch.hvm.vmx.secondary_exec_control &
             SECONDARY_EXEC_ENABLE_VIRT_EXCEPTIONS )
-            __vmread(EPTP_INDEX, &idx);
+        {
+            idx =3D vmread(EPTP_INDEX);
+        }
         else
         {
-            unsigned long eptp;
-
-            __vmread(EPT_POINTER, &eptp);
+            unsigned long eptp =3D vmread(EPT_POINTER);
=20
             if ( (idx =3D p2m_find_altp2m_by_eptp(v->domain, eptp)) =3D=3D
                  INVALID_ALTP2M )
@@ -4259,10 +4241,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_r=
egs *regs)
=20
     if ( unlikely(currd->arch.monitor.vmexit_enabled) )
     {
-        int rc;
-
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
-        rc =3D hvm_monitor_vmexit(exit_reason, exit_qualification);
+        int rc =3D hvm_monitor_vmexit(exit_reason, vmread(EXIT_QUALIFICATI=
ON));
         if ( rc < 0 )
             goto exit_and_crash;
         if ( rc )
@@ -4327,7 +4306,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
=20
     hvm_maybe_deassert_evtchn_irq();
=20
-    __vmread(IDT_VECTORING_INFO, &idtv_info);
+    idtv_info =3D vmread(IDT_VECTORING_INFO);
     if ( exit_reason !=3D EXIT_REASON_TASK_SWITCH )
         vmx_idtv_reinject(idtv_info);
=20
@@ -4362,7 +4341,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
              * Updates DR6 where debugger can peek (See 3B 23.2.1,
              * Table 23-1, "Exit Qualification for Debug Exceptions").
              */
-            __vmread(EXIT_QUALIFICATION, &exit_qualification);
+            exit_qualification =3D vmread(EXIT_QUALIFICATION);
             TRACE(TRC_HVM_TRAP_DEBUG, exit_qualification);
             __restore_debug_registers(v);
             write_debugreg(6, exit_qualification | DR_STATUS_RESERVED_ONE)=
;
@@ -4388,29 +4367,25 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_=
regs *regs)
              */
             if ( unlikely(regs->eflags & X86_EFLAGS_TF) )
             {
-                unsigned long int_info;
-
-                __vmread(GUEST_INTERRUPTIBILITY_INFO, &int_info);
+                unsigned long int_info =3D vmread(GUEST_INTERRUPTIBILITY_I=
NFO);
=20
                 if ( int_info & (VMX_INTR_SHADOW_STI | VMX_INTR_SHADOW_MOV=
_SS) )
                 {
-                    unsigned long pending_dbg;
+                    unsigned long exc =3D vmread(GUEST_PENDING_DBG_EXCEPTI=
ONS);
=20
-                    __vmread(GUEST_PENDING_DBG_EXCEPTIONS, &pending_dbg);
-                    __vmwrite(GUEST_PENDING_DBG_EXCEPTIONS,
-                              pending_dbg | DR_STEP);
+                    __vmwrite(GUEST_PENDING_DBG_EXCEPTIONS, exc | DR_STEP)=
;
                 }
             }
=20
             if ( !v->domain->debugger_attached )
             {
                 unsigned long insn_len =3D 0;
-                int rc;
                 unsigned long trap_type =3D MASK_EXTR(intr_info,
                                                     INTR_INFO_INTR_TYPE_MA=
SK);
+                int rc;
=20
                 if ( trap_type >=3D X86_ET_SW_INT )
-                    __vmread(VM_EXIT_INSTRUCTION_LEN, &insn_len);
+                    insn_len =3D vmread(VM_EXIT_INSTRUCTION_LEN);
=20
                 rc =3D hvm_monitor_debug(regs->rip,
                                        HVM_MONITOR_DEBUG_EXCEPTION,
@@ -4428,10 +4403,9 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_r=
egs *regs)
             TRACE(TRC_HVM_TRAP, vector);
             if ( !v->domain->debugger_attached )
             {
-                unsigned long insn_len;
+                unsigned long insn_len =3D vmread(VM_EXIT_INSTRUCTION_LEN)=
;
                 int rc;
=20
-                __vmread(VM_EXIT_INSTRUCTION_LEN, &insn_len);
                 rc =3D hvm_monitor_debug(regs->rip,
                                        HVM_MONITOR_SOFTWARE_BREAKPOINT,
                                        X86_ET_SW_EXC,
@@ -4454,8 +4428,8 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
             vmx_fpu_dirty_intercept();
             break;
         case X86_EXC_PF:
-            __vmread(EXIT_QUALIFICATION, &exit_qualification);
-            __vmread(VM_EXIT_INTR_ERROR_CODE, &ecode);
+            exit_qualification =3D vmread(EXIT_QUALIFICATION);
+            ecode =3D vmread(VM_EXIT_INTR_ERROR_CODE);
             regs->error_code =3D ecode;
=20
             HVM_DBG_LOG(DBG_LEVEL_VMMU,
@@ -4522,7 +4496,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
         };
         unsigned int inst_len, source;
=20
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        exit_qualification =3D vmread(EXIT_QUALIFICATION);
         source =3D (exit_qualification >> 30) & 3;
         /* Vectored event should fill in interrupt information. */
         WARN_ON((source =3D=3D 3) && !(idtv_info & INTR_INFO_VALID_MASK));
@@ -4536,9 +4510,9 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
                      > 3)) /* IntrType > 3? */
             ? get_instruction_length() /* Safe: SDM 3B 23.2.4 */ : 0;
         if ( (source =3D=3D 3) && (idtv_info & INTR_INFO_DELIVER_CODE_MASK=
) )
-            __vmread(IDT_VECTORING_ERROR_CODE, &ecode);
+            ecode =3D vmread(IDT_VECTORING_ERROR_CODE);
         else
-             ecode =3D -1;
+            ecode =3D -1;
=20
         hvm_task_switch(exit_qualification, reasons[source], ecode, inst_l=
en,
                         0 /* EFLAGS.RF already updated. */);
@@ -4565,7 +4539,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
         break;
     case EXIT_REASON_INVLPG:
         update_guest_eip(); /* Safe: INVLPG */
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        exit_qualification =3D vmread(EXIT_QUALIFICATION);
         vmx_invlpg_intercept(exit_qualification);
         break;
     case EXIT_REASON_RDTSCP:
@@ -4591,13 +4565,13 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_=
regs *regs)
=20
     case EXIT_REASON_CR_ACCESS:
     {
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        exit_qualification =3D vmread(EXIT_QUALIFICATION);
         if ( vmx_cr_access(exit_qualification) =3D=3D X86EMUL_OKAY )
             update_guest_eip(); /* Safe: MOV Cn, LMSW, CLTS */
         break;
     }
     case EXIT_REASON_DR_ACCESS:
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        exit_qualification =3D vmread(EXIT_QUALIFICATION);
         vmx_dr_access(exit_qualification, regs);
         break;
     case EXIT_REASON_MSR_READ:
@@ -4671,7 +4645,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
         break;
=20
     case EXIT_REASON_EOI_INDUCED:
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        exit_qualification =3D vmread(EXIT_QUALIFICATION);
=20
         ASSERT(cpu_has_vmx_virtual_intr_delivery);
=20
@@ -4695,7 +4669,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
         unsigned int bytes;
         int rc;
=20
-        __vmread(EXIT_QUALIFICATION, &io_qual.raw);
+        io_qual.raw =3D vmread(EXIT_QUALIFICATION);
         bytes =3D io_qual.size + 1;
=20
         rc =3D hvm_monitor_io(io_qual.port, bytes, io_qual.in, io_qual.str=
);
@@ -4728,10 +4702,9 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_r=
egs *regs)
=20
     case EXIT_REASON_EPT_VIOLATION:
     {
-        paddr_t gpa;
+        paddr_t gpa =3D vmread(GUEST_PHYSICAL_ADDRESS);
=20
-        __vmread(GUEST_PHYSICAL_ADDRESS, &gpa);
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        exit_qualification =3D vmread(EXIT_QUALIFICATION);
=20
         if ( unlikely(exit_qualification & INTR_INFO_NMI_UNBLOCKED_BY_IRET=
) &&
              !(idtv_info & INTR_INFO_VALID_MASK) )
@@ -4743,9 +4716,8 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
=20
     case EXIT_REASON_EPT_MISCONFIG:
     {
-        paddr_t gpa;
+        paddr_t gpa =3D vmread(GUEST_PHYSICAL_ADDRESS);
=20
-        __vmread(GUEST_PHYSICAL_ADDRESS, &gpa);
         if ( !ept_handle_misconfig(gpa) )
             goto exit_and_crash;
         break;
@@ -4781,7 +4753,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
         break;
=20
     case EXIT_REASON_PML_FULL:
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        exit_qualification =3D vmread(EXIT_QUALIFICATION);
=20
         if ( unlikely(exit_qualification & INTR_INFO_NMI_UNBLOCKED_BY_IRET=
) &&
              !(idtv_info & INTR_INFO_VALID_MASK) )
@@ -4804,7 +4776,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
         break;
=20
     case EXIT_REASON_NOTIFY:
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        exit_qualification =3D vmread(EXIT_QUALIFICATION);
=20
         if ( unlikely(exit_qualification & NOTIFY_VM_CONTEXT_INVALID) )
         {
diff --git a/xen/arch/x86/hvm/vmx/vvmx.c b/xen/arch/x86/hvm/vmx/vvmx.c
index ceb5e5a322..ab1c4631ab 100644
--- a/xen/arch/x86/hvm/vmx/vvmx.c
+++ b/xen/arch/x86/hvm/vmx/vvmx.c
@@ -400,8 +400,7 @@ static int decode_vmx_inst(struct cpu_user_regs *regs,
     unsigned long base, index, seg_base, disp, offset;
     int scale, size;
=20
-    __vmread(VMX_INSTRUCTION_INFO, &offset);
-    info.word =3D offset;
+    info.word =3D vmread(VMX_INSTRUCTION_INFO);
=20
     if ( info.fields.memreg ) {
         decode->type =3D VMX_INST_MEMREG_TYPE_REG;
@@ -428,7 +427,7 @@ static int decode_vmx_inst(struct cpu_user_regs *regs,
=20
         scale =3D 1 << info.fields.scaling;
=20
-        __vmread(EXIT_QUALIFICATION, &disp);
+        disp =3D vmread(EXIT_QUALIFICATION);
=20
         size =3D 1 << (info.fields.addr_size + 1);
=20
@@ -997,7 +996,7 @@ static void vvmcs_to_shadow_bulk(struct vcpu *v, unsign=
ed int n,
=20
     virtual_vmcs_enter(v);
     for ( i =3D 0; i < n; i++ )
-        __vmread(field[i], &value[i]);
+        value[i] =3D vmread(field[i]);
     virtual_vmcs_exit(v);
=20
     for ( i =3D 0; i < n; i++ )
@@ -1012,7 +1011,7 @@ fallback:
=20
 static inline void shadow_to_vvmcs(const struct vcpu *v, unsigned int fiel=
d)
 {
-    unsigned long value;
+    unsigned long value =3D 0;
=20
     if ( vmread_safe(field, &value) =3D=3D 0 )
         set_vvmcs(v, field, value);
@@ -1036,7 +1035,7 @@ static void shadow_to_vvmcs_bulk(struct vcpu *v, unsi=
gned int n,
     }
=20
     for ( i =3D 0; i < n; i++ )
-        __vmread(field[i], &value[i]);
+        value[i] =3D vmread(field[i]);
=20
     virtual_vmcs_enter(v);
     for ( i =3D 0; i < n; i++ )
@@ -1405,7 +1404,7 @@ static void nvmx_update_apicv(struct vcpu *v)
     }
     else
        /* Keep previous SVI if there's any. */
-       __vmread(GUEST_INTR_STATUS, &status);
+       status =3D vmread(GUEST_INTR_STATUS);
=20
     rvi =3D vlapic_has_pending_irq(v);
     if ( rvi !=3D -1 )
@@ -1687,7 +1686,6 @@ static int nvmx_handle_vmresume(struct cpu_user_regs =
*regs)
     bool launched;
     struct vcpu *v =3D current;
     struct nestedvmx *nvmx =3D &vcpu_2_nvmx(v);
-    unsigned long intr_shadow;
     int rc;
=20
     if ( !vvmcx_valid(v) )
@@ -1696,8 +1694,7 @@ static int nvmx_handle_vmresume(struct cpu_user_regs =
*regs)
         return X86EMUL_OKAY;       =20
     }
=20
-    __vmread(GUEST_INTERRUPTIBILITY_INFO, &intr_shadow);
-    if ( intr_shadow & VMX_INTR_SHADOW_MOV_SS )
+    if ( vmread(GUEST_INTERRUPTIBILITY_INFO) & VMX_INTR_SHADOW_MOV_SS )
     {
         vmfail_valid(regs, VMX_INSN_VMENTRY_BLOCKED_BY_MOV_SS);
         return X86EMUL_OKAY;
@@ -1723,7 +1720,6 @@ static int nvmx_handle_vmlaunch(struct cpu_user_regs =
*regs)
     bool launched;
     struct vcpu *v =3D current;
     struct nestedvmx *nvmx =3D &vcpu_2_nvmx(v);
-    unsigned long intr_shadow;
     int rc;
=20
     if ( !vvmcx_valid(v) )
@@ -1732,8 +1728,7 @@ static int nvmx_handle_vmlaunch(struct cpu_user_regs =
*regs)
         return X86EMUL_OKAY;
     }
=20
-    __vmread(GUEST_INTERRUPTIBILITY_INFO, &intr_shadow);
-    if ( intr_shadow & VMX_INTR_SHADOW_MOV_SS )
+    if ( vmread(GUEST_INTERRUPTIBILITY_INFO) & VMX_INTR_SHADOW_MOV_SS )
     {
         vmfail_valid(regs, VMX_INSN_VMENTRY_BLOCKED_BY_MOV_SS);
         return X86EMUL_OKAY;
@@ -2355,7 +2350,7 @@ int cf_check nvmx_hap_walk_L1_p2m(
=20
     vmx_vmcs_enter(v);
=20
-    __vmread(EXIT_QUALIFICATION, &exit_qual);
+    exit_qual =3D vmread(EXIT_QUALIFICATION);
     rc =3D nept_translate_l2ga(v, L2_gpa, page_order, rwx_rights, &gfn, p2=
m_acc,
                              &exit_qual, &exit_reason);
     switch ( rc )
@@ -2391,7 +2386,7 @@ void nvmx_idtv_handling(void)
     struct nestedvcpu *nvcpu =3D &vcpu_nestedhvm(v);
     unsigned long idtv_info, reason;
=20
-    __vmread(IDT_VECTORING_INFO, &idtv_info);
+    idtv_info =3D vmread(IDT_VECTORING_INFO);
     if ( likely(!(idtv_info & INTR_INFO_VALID_MASK)) )
         return;
=20
@@ -2399,7 +2394,7 @@ void nvmx_idtv_handling(void)
      * If L0 can solve the fault that causes idt vectoring, it should
      * be reinjected, otherwise, pass to L1.
      */
-    __vmread(VM_EXIT_REASON, &reason);
+    reason =3D vmread(VM_EXIT_REASON);
     if ( (uint16_t)reason !=3D EXIT_REASON_EPT_VIOLATION ?
          !(nvmx->intr.intr_info & INTR_INFO_VALID_MASK) :
          !nvcpu->nv_vmexit_pending )
@@ -2407,7 +2402,7 @@ void nvmx_idtv_handling(void)
         __vmwrite(VM_ENTRY_INTR_INFO, idtv_info & ~INTR_INFO_RESVD_BITS_MA=
SK);
         if ( idtv_info & INTR_INFO_DELIVER_CODE_MASK )
         {
-            __vmread(IDT_VECTORING_ERROR_CODE, &reason);
+            reason =3D vmread(IDT_VECTORING_ERROR_CODE);
             __vmwrite(VM_ENTRY_EXCEPTION_ERROR_CODE, reason);
         }
         /*
@@ -2418,7 +2413,7 @@ void nvmx_idtv_handling(void)
          * This means EXIT_INSTRUCTION_LEN is always valid here, for
          * software interrupts both injected by L1, and generated in L2.
          */
-        __vmread(VM_EXIT_INSTRUCTION_LEN, &reason);
+        reason =3D vmread(VM_EXIT_INSTRUCTION_LEN);
         __vmwrite(VM_ENTRY_INSTRUCTION_LEN, reason);
    }
 }
@@ -2452,7 +2447,7 @@ int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs=
,
         u64 exec_bitmap;
         int vector;
=20
-        __vmread(VM_EXIT_INTR_INFO, &intr_info);
+        intr_info =3D vmread(VM_EXIT_INTR_INFO);
         vector =3D intr_info & INTR_INFO_VECTOR_MASK;
         /*
          * decided by L0 and L1 exception bitmap, if the vetor is set by
@@ -2531,7 +2526,7 @@ int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs=
,
             unsigned long qual;
             u16 port, size;
=20
-            __vmread(EXIT_QUALIFICATION, &qual);
+            qual =3D vmread(EXIT_QUALIFICATION);
             port =3D qual >> 16;
             size =3D (qual & 7) + 1;
             do {
@@ -2638,7 +2633,7 @@ int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs=
,
         cr_access_qual_t qual;
         u32 mask =3D 0;
=20
-        __vmread(EXIT_QUALIFICATION, &qual.raw);
+        qual.raw =3D vmread(EXIT_QUALIFICATION);
         /* also according to guest exec_control */
         ctrl =3D __n2_exec_control(v);
=20
@@ -2680,7 +2675,7 @@ int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs=
,
                 {
                     u64 cr0_gh_mask =3D get_vvmcs(v, CR0_GUEST_HOST_MASK);
=20
-                    __vmread(CR0_READ_SHADOW, &old_val);
+                    old_val =3D vmread(CR0_READ_SHADOW);
                     changed_bits =3D old_val ^ val;
                     if ( changed_bits & cr0_gh_mask )
                         nvcpu->nv_vmexit_pending =3D 1;
@@ -2696,7 +2691,7 @@ int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs=
,
                 {
                     u64 cr4_gh_mask =3D get_vvmcs(v, CR4_GUEST_HOST_MASK);
=20
-                    __vmread(CR4_READ_SHADOW, &old_val);
+                    old_val =3D vmread(CR4_READ_SHADOW);
                     changed_bits =3D old_val ^ val;
                     if ( changed_bits & cr4_gh_mask )
                         nvcpu->nv_vmexit_pending =3D 1;
@@ -2732,7 +2727,7 @@ int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs=
,
             {
                 u64 cr0_gh_mask =3D get_vvmcs(v, CR0_GUEST_HOST_MASK);
=20
-                __vmread(CR0_READ_SHADOW, &old_val);
+                old_val =3D vmread(CR0_READ_SHADOW);
                 old_val &=3D X86_CR0_PE|X86_CR0_MP|X86_CR0_EM|X86_CR0_TS;
                 val =3D qual.lmsw_data &
                       (X86_CR0_PE|X86_CR0_MP|X86_CR0_EM|X86_CR0_TS);
diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm/d=
omain.h
index 5fc1d1e5d0..3a24668773 100644
--- a/xen/arch/x86/include/asm/domain.h
+++ b/xen/arch/x86/include/asm/domain.h
@@ -595,7 +595,7 @@ struct arch_vcpu
=20
     /* Debug registers. */
     unsigned long dr[4];
-    unsigned long dr7; /* Ideally int, but __vmread() needs long. */
+    unsigned long dr7; /* Ideally int, but vmread() needs long. */
     unsigned int dr6;
=20
     /* other state */
diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmx.h b/xen/arch/x86/include/=
asm/hvm/vmx/vmx.h
index 33d3d43a38..8bdb042988 100644
--- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h
+++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h
@@ -320,16 +320,20 @@ static always_inline void __vmpclear(u64 addr)
     BUG();
 }
=20
-static always_inline void __vmread(unsigned long field, unsigned long *val=
ue)
+static always_inline unsigned long vmread(unsigned long field)
 {
-    asm volatile ( "vmread %1, %0\n\t"
+    unsigned long value;
+
+    asm volatile ( "vmread %[field], %[value]\n\t"
                    /* CF=3D=3D1 or ZF=3D=3D1 --> BUG() */
                    UNLIKELY_START(be, vmread)
                    _ASM_BUGFRAME_TEXT(0)
                    UNLIKELY_END_SECTION
-                   : "=3Drm" (*value)
-                   : "r" (field),
+                   : [value] "=3Drm" (value)
+                   : [field] "r" (field),
                      _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, =
0) );
+
+    return value;
 }
=20
 static always_inline void __vmwrite(unsigned long field, unsigned long val=
ue)
@@ -363,7 +367,7 @@ static inline enum vmx_insn_errno vmread_safe(unsigned =
long field,
     if ( unlikely(fail_invalid) )
         ret =3D VMX_INSN_FAIL_INVALID;
     else if ( unlikely(fail_valid) )
-        __vmread(VM_INSTRUCTION_ERROR, &ret);
+        ret =3D vmread(VM_INSTRUCTION_ERROR);
=20
     return ret;
 }
@@ -371,8 +375,6 @@ static inline enum vmx_insn_errno vmread_safe(unsigned =
long field,
 static inline enum vmx_insn_errno vmwrite_safe(unsigned long field,
                                                unsigned long value)
 {
-    unsigned long ret;
-
     asm goto ( "vmwrite %[value], %[field]\n\t"
                "jc %l[vmfail_invalid]\n\t"
                "jz %l[vmfail_error]"
@@ -386,8 +388,7 @@ static inline enum vmx_insn_errno vmwrite_safe(unsigned=
 long field,
     return VMX_INSN_FAIL_INVALID;
=20
  vmfail_error:
-    __vmread(VM_INSTRUCTION_ERROR, &ret);
-    return ret;
+    return vmread(VM_INSTRUCTION_ERROR);
 }
=20
 static always_inline void __invept(unsigned long type, uint64_t eptp)
--=20
2.34.1




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Date: Tue, 22 Apr 2025 22:01:54 +0000
To: Stefano Stabellini 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, cardoe@cardoe.com, marmarek@invisiblethingslab.com, dmukhin@ford.com
Subject: Re: [PATCH v3 0/4] CI: updates to XTF CI runners
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References: <20250422161819.2089738-1-dmukhin@ford.com> 
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On Tue, Apr 22, 2025 at 01:54:06PM -0700, Stefano Stabellini wrote:
> On Tue, 22 Apr 2025, dmkhn@proton.me wrote:
>=20
> > The series started from adding new argo XTF CI job and ended up with up=
dating
> > all XTF runners and related CI jobs.
> >
> > It unifies the XTF runner scripts so that it is possible to use one scr=
ipt for
> > executing any XTF test under QEMU. That simplifies running XTFs locally=
 and in
> > CI.
> >
> > Patch 1 reworks x86 XTF runner.
> > Patch 2 reworks x86 EFI XTF.
> > Patch 3 reworks Arm64 XTF runner.
> > Patch 4 adds new argo x86 XTF CI job.
>=20
> I committed the first 3 patches. For the last patch, I take we need to
> wait for the argo test to land in XTF?

Thanks!

Yes, we need argo XTF test.



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Date: Tue, 22 Apr 2025 22:11:59 +0000
To: Jan Beulich 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, roger.pau@citrix.com, dmukhin@ford.com
Subject: Re: [PATCH v2] x86/vmx: Update __vmread() signature
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References: <20250422011530.3010312-1-dmukhin@ford.com> 
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On Tue, Apr 22, 2025 at 09:56:00AM +0200, Jan Beulich wrote:
> On 22.04.2025 03:15, dmkhn@proton.me wrote:
> > From: Denis Mukhin 
> >
> > Current implementation of __vmread() returns the result via pointer arg=
ument
> > which leads to having excess code in some places.
> >
> > Update the signature of __vmread() to return `unsigned long` and drop t=
he
> > pointer argument as per suggestion in [1].
> >
> > Update all call sites everywhere in the VT-x code.
>=20
> You did read Andrew's reply to v1 before posting v2, didn't you?

I missed to address the function name change request, posted v3:
  https://lore.kernel.org/xen-devel/20250422215833.522007-1-dmukhin@ford.co=
m/

>=20
> Jan



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Date: Wed, 23 Apr 2025 01:15:08 +0300
From: Sergii Dmytruk 
To: Jan Beulich 
Cc: Krystian Hebel ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel , Julien Grall ,
	Roger Pau =?iso-8859-1?Q?Monn=E9?= ,
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	trenchboot-devel@googlegroups.com, xen-devel@lists.xenproject.org
Subject: Re: [PATCH 09/21] lib/sha1.c: add file
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On Tue, Apr 22, 2025 at 05:36:22PM +0200, Jan Beulich wrote:
> On 22.04.2025 17:06, Sergii Dmytruk wrote:
> > From: Krystian Hebel 
> >
> > The code comes from [1] and is licensed under GPL-2.0 license.
> > It's a combination of:
> >  - include/crypto/sha1.h
> >  - include/crypto/sha1_base.h
> >  - lib/crypto/sha1.c
> >  - crypto/sha1_generic.c
> >
> > Changes:
> >  - includes
> >  - formatting
> >  - renames and splicing of some trivial functions that are called once
> >  - dropping of `int` return values (only zero was ever returned)
> >  - getting rid of references to `struct shash_desc`
>
> Since you did move the code to (largely) Xen style, a few further requests
> in that direction:

Rewriting the patch due to a comment by Andrew Cooper obsoletes most of
your comments, but thanks for them anyway.

>
> Jan


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Date: Tue, 22 Apr 2025 22:17:33 +0000
To: Jan Beulich 
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com, xen-devel@lists.xenproject.org
Subject: Re: [PATCH v3] xen/domain: unify domain ID allocation
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On Thu, Apr 17, 2025 at 11:47:07AM +0200, Jan Beulich wrote:
> On 16.04.2025 08:15, dmkhn@proton.me wrote:
> > From: Denis Mukhin 
> >
> > Unify the logic of domain ID allocation, so that both the initial domai=
n
> > creation and the usage by domctl use the same helper function across
> > architectures (Arm and x86).
> >
> > Wrap the domain ID allocation as an arch-independent function domid_all=
oc() in
> > common/domain.c.
> >
> > Allocation algorithm:
> > - If an explicit domain ID is provided, verify its availability and
> >   use it if ID is unused;
> > - Otherwise, perform an exhaustive search for the first available ID
> >   within the [0..DOMID_FIRST_RESERVED) range, excluding hardware_domid.
> >
> > Move the is_free_domid() helper closer to domid_alloc(). Simplify
> > is_free_domid() by removing the domain ID range check, as the ID is now
> > guaranteed to be within the valid range. Additionally, update the predi=
cate to
> > return a bool value instead of an int.
> >
> > Signed-off-by: Denis Mukhin 
>=20
> Please can you clarify whether this is intended to be no functional chang=
e
> (as far as one would be able to observe from the outside)? (It isn't, and
> when it isn't, the behavioral change needs justifying. Which I fear you
> won't be able to, in which case it needs undoing. Not using the first
> unused ID is a deliberate property of the present allocation scheme.)

Reverted the algorithm to the original one (v4).
Thanks for review!

>=20
> > ---
> >  xen/arch/arm/dom0less-build.c | 19 ++++++++-------
> >  xen/arch/arm/domain_build.c   | 19 +++++++++++----
> >  xen/arch/x86/setup.c          |  8 +++++--
> >  xen/common/domain.c           | 45 +++++++++++++++++++++++++++++++++++
> >  xen/common/domctl.c           | 45 ++++-------------------------------
> >  xen/include/xen/domain.h      |  2 ++
> >  6 files changed, 81 insertions(+), 57 deletions(-)
>=20
> This suggests it's not clearly an improvement. And I'm heavily inclined
> to ask (also considering the above) that this simply be dropped.
>=20
> > --- a/xen/arch/arm/domain_build.c
> > +++ b/xen/arch/arm/domain_build.c
> > @@ -2370,6 +2370,7 @@ void __init create_dom0(void)
> >          .grant_opts =3D XEN_DOMCTL_GRANT_version(opt_gnttab_max_versio=
n),
> >      };
> >      unsigned int flags =3D CDF_privileged;
> > +    domid_t domid;
> >      int rc;
> >
> >      /* The vGIC for DOM0 is exactly emulating the hardware GIC */
> > @@ -2394,19 +2395,27 @@ void __init create_dom0(void)
> >      if ( !llc_coloring_enabled )
> >          flags |=3D CDF_directmap;
> >
> > -    dom0 =3D domain_create(0, &dom0_cfg, flags);
> > +    rc =3D domid_alloc(get_initial_domain_id());
> > +    if ( rc < 0 )
> > +        panic("Error allocating domain ID %d (rc =3D %d)\n",
> > +              get_initial_domain_id(), rc);
> > +    domid =3D rc;
> > +
> > +    dom0 =3D domain_create(domid, &dom0_cfg, flags);
> >      if ( IS_ERR(dom0) )
> > -        panic("Error creating domain 0 (rc =3D %ld)\n", PTR_ERR(dom0))=
;
> > +        panic("Error creating domain %d (rc =3D %ld)\n", domid, PTR_ER=
R(dom0));
>=20
> Up to here using domid is okay. However, ...
>=20
> >      if ( llc_coloring_enabled && (rc =3D dom0_set_llc_colors(dom0)) )
> > -        panic("Error initializing LLC coloring for domain 0 (rc =3D %d=
)\n", rc);
> > +        panic("Error initializing LLC coloring for domain %d (rc =3D %=
d)\n",
> > +              domid, rc);
> >
> >      if ( alloc_dom0_vcpu0(dom0) =3D=3D NULL )
> > -        panic("Error creating domain 0 vcpu0\n");
> > +        panic("Error creating domain %d vcpu0\n", domid);
> >
> >      rc =3D construct_dom0(dom0);
> >      if ( rc )
> > -        panic("Could not set up DOM0 guest OS (rc =3D %d)\n", rc);
> > +        panic("Could not set up guest OS for domain %d (rc =3D %d)\n",
> > +              domid, rc);
> >  }
>=20
> ... these all would better use %pd, when already being touched.
>=20
> While touching all of these I think you also want to aim at making output
> match that %pd or %pv would result in, if they were usable at those place=
s.
>=20
> > --- a/xen/arch/x86/setup.c
> > +++ b/xen/arch/x86/setup.c
> > @@ -1009,8 +1009,12 @@ static struct domain *__init create_dom0(struct =
boot_info *bi)
> >      if ( iommu_enabled )
> >          dom0_cfg.flags |=3D XEN_DOMCTL_CDF_iommu;
> >
> > -    /* Create initial domain.  Not d0 for pvshim. */
> > -    bd->domid =3D get_initial_domain_id();
> > +    /* Allocate initial domain ID. Not d0 for pvshim. */
> > +    bd->domid =3D domid_alloc(get_initial_domain_id());
>=20
> You're clipping the int return value to domid_t here, and thus ...
>=20
> > +    if ( bd->domid < 0 )
>=20
> ... this condition will be always false. I'm surprised the compiler didn'=
t
> flag this for you.
>=20
> > --- a/xen/common/domain.c
> > +++ b/xen/common/domain.c
> > @@ -66,6 +66,51 @@ DEFINE_RCU_READ_LOCK(domlist_read_lock);
> >  static struct domain *domain_hash[DOMAIN_HASH_SIZE];
> >  struct domain *domain_list;
> >
> > +static inline bool is_free_domid(domid_t dom)
> > +{
> > +    struct domain *d =3D rcu_lock_domain_by_id(dom);
> > +
> > +    if ( d )
> > +        rcu_unlock_domain(d);
> > +
> > +    return !d;
> > +}
> > +
> > +/*
> > + * Allocate new domain ID based on the hint.
> > + *
> > + * If hint is outside of valid [0..DOMID_FIRST_RESERVED] range of IDs,
>=20
> That's [0, DOMID_FIRST_RESERVED), to be unambiguous. In C array initializ=
er
> notation it would be [0 ... DOMID_FIRST_RESERVED - 1].
>=20
> > + * perform an exhaustive search of the first free domain ID excluding
> > + * hardware_domid.
> > + */
> > +int domid_alloc(int hint)
>=20
> I would have thought that I did comment already on the parameter being pl=
ain
> int.
>=20
> > +{
> > +    domid_t domid;
> > +
> > +    if ( hint >=3D 0 && hint < DOMID_FIRST_RESERVED )
> > +    {
> > +        if ( !is_free_domid(hint) )
> > +            return -EEXIST;
> > +
> > +        domid =3D hint;
> > +    }
> > +    else
> > +    {
> > +        for ( domid =3D 0; domid < DOMID_FIRST_RESERVED; domid++ )
> > +        {
> > +            if ( domid =3D=3D hardware_domid )
> > +                continue;
> > +            if ( is_free_domid(domid) )
> > +                break;
> > +        }
> > +
> > +        if ( domid =3D=3D DOMID_FIRST_RESERVED )
> > +            return -ENOMEM;
>=20
> There's no memory allocation here, so why ENOMEM? ENOSPC may already be s=
lightly
> better.
>=20
> Jan



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From: Sergii Dmytruk 
To: Andrew Cooper 
Cc: xen-devel@lists.xenproject.org,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich , Julien Grall ,
	Roger Pau =?iso-8859-1?Q?Monn=E9?= ,
	Stefano Stabellini ,
	trenchboot-devel@googlegroups.com
Subject: Re: [PATCH 10/21] lib/sha256.c: add file
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References: 
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On Tue, Apr 22, 2025 at 04:37:10PM +0100, Andrew Cooper wrote:
> On 22/04/2025 4:06 pm, Sergii Dmytruk wrote:
> >  xen/include/xen/sha256.h |  12 ++
> >  xen/lib/Makefile         |   1 +
> >  xen/lib/sha256.c         | 238 +++++++++++++++++++++++++++++++++++++++
> >  3 files changed, 251 insertions(+)
> >  create mode 100644 xen/include/xen/sha256.h
> >  create mode 100644 xen/lib/sha256.c
> 
> I added SHA2 a little while back, derived from the Trenchboot tree.
> 
> See 372af524411f5a013bcb0b117073d8d07c026563 (and a few follow-up fixes).
> 
> It should have everything needed, but we can adjust if necessary.
> 
> We need to integrate SHA1 in a similar way. Xen now has various MISRA
> requirements to adhere to, which requires some adjustments, but I can
> advise if it isn't clear from the sha2 work I already did.
> 
> ~Andrew

Oh, I actually checked for existing hash implementations before sending
the patches...  Need to remove untracked files which made it hard to see
the new file.

Thanks, I think I figured out the modifications you've made for SHA256
and almost done getting rid of macros for SHA1.


From xen-devel-bounces@lists.xenproject.org Tue Apr 22 22:50:01 2025
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Date: Tue, 22 Apr 2025 22:49:30 +0000
To: Jan Beulich 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com
Subject: Re: [PATCH v1 2/3] x86/domain: add helpers to simplify emulation flags management
Message-ID: 
In-Reply-To: 
References: <20250401005224.461325-1-dmukhin@ford.com> <20250401005224.461325-3-dmukhin@ford.com> 
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On Tue, Apr 08, 2025 at 05:23:17PM +0200, Jan Beulich wrote:
> On 01.04.2025 02:52, dmkhn@proton.me wrote:
> > From: Denis Mukhin 
> >
> > Introduce XEN_X86_EMU_BASELINE and XEN_X86_EMU_OPTIONAL to simplify
> > d->arch.emulation_flags management in the code.
>=20
> If the simplification is limited to ...
>=20
> > --- a/tools/python/xen/lowlevel/xc/xc.c
> > +++ b/tools/python/xen/lowlevel/xc/xc.c
> > @@ -159,9 +159,7 @@ static PyObject *pyxc_domain_create(XcObject *self,
> >
> >  #if defined (__i386) || defined(__x86_64__)
> >      if ( config.flags & XEN_DOMCTL_CDF_hvm )
> > -        config.arch.emulation_flags =3D XEN_X86_EMU_ALL &
> > -                                      ~(XEN_X86_EMU_VPCI |
> > -                                        XEN_X86_EMU_USE_PIRQ);
> > +        config.arch.emulation_flags =3D XEN_X86_EMU_BASELINE;
> >  #elif defined (__arm__) || defined(__aarch64__)
> >      config.arch.gic_version =3D XEN_DOMCTL_CONFIG_GIC_NATIVE;
> >  #else
>=20
> ... just this, I'm not convinced that's worth introducing yet two more it=
ems
> into the namespace.

Sorry, it took me a while to get back to the series.

The X86_EMU_BASELINE mask is used in two places: in the toolstack (xc.c) an=
d
in domain.c, emulation_flags_ok(), so adding a new flag may require updates
in two places.

Perhaps it will be better to merge this patch 2 with patch 3 to highlight t=
hat?=20

>=20
> > --- a/xen/include/public/arch-x86/xen.h
> > +++ b/xen/include/public/arch-x86/xen.h
> > @@ -290,6 +290,13 @@ struct xen_arch_domainconfig {
> >                                       XEN_X86_EMU_VGA | XEN_X86_EMU_IOM=
MU |   \
> >                                       XEN_X86_EMU_PIT | XEN_X86_EMU_USE=
_PIRQ |\
> >                                       XEN_X86_EMU_VPCI)
> > +
> > +#define XEN_X86_EMU_OPTIONAL        (XEN_X86_EMU_VPCI | \
> > +                                     XEN_X86_EMU_USE_PIRQ)
> > +
> > +#define XEN_X86_EMU_BASELINE        (XEN_X86_EMU_ALL & ~XEN_X86_EMU_OP=
TIONAL)
> > +
> > +    /* Hardware emulation flags. */
> >      uint32_t emulation_flags;
>=20
> The comment isn't quite accurate here (and hence perhaps also not in the
> earlier patch): XEN_X86_EMU_USE_PIRQ isn't exactly about emulation of any=
thing
> hardware-ish.
>=20
> Jan



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Date: Tue, 22 Apr 2025 23:37:47 +0000
To: Jan Beulich 
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com, xen-devel@lists.xenproject.org
Subject: Re: [PATCH v1 3/3] xen/domain: rewrite emulation_flags_ok()
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References: <20250401005224.461325-1-dmukhin@ford.com> <20250401005224.461325-4-dmukhin@ford.com> 
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On Tue, Apr 08, 2025 at 05:34:27PM +0200, Jan Beulich wrote:
> On 01.04.2025 02:52, dmkhn@proton.me wrote:
> > From: Denis Mukhin 
> >
> > Rewrite emulation_flags_ok() using XEN_X86_EMU_{OPTIONAL,BASELINE}
> > to simplify future modifications.
> >
> > Signed-off-by: Denis Mukhin 
> > ---
> > Came in the context of NS16550 emulator v3 series:
> >   https://lore.kernel.org/xen-devel/20250103-vuart-ns8250-v3-v1-0-c5d36=
b31d66c@ford.com/
> >
> > After modifying emulation_flags_ok() with a new NS16550 vUART
> > configuration switch passed from the toolstack for the HVM
> > case, I decided to look into how to improve emulation_flags_ok().
> > ---
> >  xen/arch/x86/domain.c | 29 +++++++++++------------------
> >  1 file changed, 11 insertions(+), 18 deletions(-)
>=20
> There is a readability win, yes.
>=20
> > --- a/xen/arch/x86/domain.c
> > +++ b/xen/arch/x86/domain.c
> > @@ -750,25 +750,18 @@ static bool emulation_flags_ok(const struct domai=
n *d, uint32_t emflags)
> >      BUILD_BUG_ON(X86_EMU_ALL !=3D XEN_X86_EMU_ALL);
> >  #endif
> >
> > -    if ( is_hvm_domain(d) )
> > -    {
> > -        if ( is_hardware_domain(d) &&
> > -             emflags !=3D (X86_EMU_VPCI | X86_EMU_LAPIC | X86_EMU_IOAP=
IC) )
> > -            return false;
> > -        if ( !is_hardware_domain(d) &&
> > -             /* HVM PIRQ feature is user-selectable. */
> > -             (emflags & ~X86_EMU_USE_PIRQ) !=3D
> > -             (X86_EMU_ALL & ~(X86_EMU_VPCI | X86_EMU_USE_PIRQ)) &&
> > -             emflags !=3D X86_EMU_LAPIC )
> > -            return false;
> > -    }
> > -    else if ( emflags !=3D 0 && emflags !=3D X86_EMU_PIT )
> > -    {
> > -        /* PV or classic PVH. */
> > -        return false;
> > -    }
> > +    /* PV or classic PVH */
> > +    if ( !is_hvm_domain(d) )
> > +        return emflags =3D=3D 0 || emflags =3D=3D XEN_X86_EMU_PIT;
>=20
> What's "classic PVH" here? This got to be PVHv1, which is dead. As you to=
uch /
> move such a comment, you want to adjust it so it's at least no longer sta=
le.

Looks like the comment should say "PV".

>=20
> > -    return true;
> > +    /* HVM */
> > +    if ( is_hardware_domain(d) )
> > +        return emflags =3D=3D (XEN_X86_EMU_LAPIC |
> > +                           XEN_X86_EMU_IOAPIC |
> > +                           XEN_X86_EMU_VPCI);
> > +
> > +    return (emflags & ~XEN_X86_EMU_OPTIONAL) =3D=3D XEN_X86_EMU_BASELI=
NE ||
> > +            emflags =3D=3D XEN_X86_EMU_LAPIC;
>=20
> There was a comment about X86_EMU_USE_PIRQ being optional, which you've l=
ost
> together with (only) that (i.e. not at the same time including vPCI) opti=
onality.
>=20
> Furthermore you move from X86_EMU_* namespace to XEN_X86_EMU_* one withou=
t even
> mentioning that (and the reason to do so) in the description. Aiui the fu=
nction
> deliberately uses the internal names, not the public interface ones.
>=20
> Jan



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH 5/8] x86/altcall: Introduce new simpler scheme
Date: Wed, 23 Apr 2025 02:02:34 +0100
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Encoding altcalls as regular alternatives leads to an unreasonable amount of
complexity in _apply_alternatives().

Introduce apply_alt_calls(), and an .alt_call_sites section which simply
tracks the source address (relative, to save on space).  That's literally all
that is needed in order to devirtualise the function pointers.

apply_alt_calls() is mostly as per _apply_alternatives(), except the size is
known to be 6 bytes.  Drop the logic for JMP *RIPREL, as there's no support
for tailcall optimisations, nor a feasbile plan on how to introduce support.
Pad with a redundant prefix to avoid needing a separate NOP on the end.

Wire it up in nmi_apply_alternatives(), although the section is empty at this
juncture so nothing happens in practice.

Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
CC: Roger Pau Monné 

Finding a 6-byte UD instruction that is distinct from ud2 turns out to be
quite challengning.  The easy way involves a length changing prefix, which is
best avoided.  Suggestions for alternative patterns welcome.

---
 xen/arch/x86/alternative.c                  | 94 +++++++++++++++++++++
 xen/arch/x86/include/asm/alternative-call.h |  7 ++
 xen/arch/x86/xen.lds.S                      |  4 +
 3 files changed, 105 insertions(+)

diff --git a/xen/arch/x86/alternative.c b/xen/arch/x86/alternative.c
index 4b9f8d860153..f6594e21a14c 100644
--- a/xen/arch/x86/alternative.c
+++ b/xen/arch/x86/alternative.c
@@ -388,6 +388,92 @@ static int init_or_livepatch _apply_alternatives(struct alt_instr *start,
     return 0;
 }
 
+/*
+ * At build time, alternative calls are emitted as:
+ *   ff 15 xx xx xx xx  =>  call *disp32(%rip)
+ *
+ * During boot, we devirtualise by editing to:
+ *   2e e8 xx xx xx xx  =>  cs call disp32
+ *
+ * or, if the function pointer is still NULL, poison to:
+ *   0f 0b 0f 0b 0f 0b  =>  ud2a (x3)
+ */
+static int init_or_livepatch apply_alt_calls(
+    const struct alt_call *start, const struct alt_call *end)
+{
+    const struct alt_call *a;
+
+    for ( a = start; a < end; a++ )
+    {
+        const uint8_t *dest;
+        uint8_t buf[6], *orig = ALT_CALL_PTR(a);
+        long disp;
+
+        /* It's likely that this won't change, but check just to be safe. */
+        BUILD_BUG_ON(ALT_CALL_LEN(a) != 6);
+
+        if ( orig[0] != 0xff || orig[1] != 0x15 )
+        {
+            printk(XENLOG_ERR
+                   "Altcall for %ps [%6ph] not CALL *RIPREL\n",
+                   orig, orig);
+            return -EINVAL;
+        }
+
+        disp = *(int32_t *)(orig + 2);
+        dest = *(const void **)(orig + 6 + disp);
+
+        if ( dest )
+        {
+            /*
+             * When building for CET-IBT, all function pointer targets
+             * should have an endbr64 instruction.
+             *
+             * If this is not the case, leave a warning because
+             * something is probably wrong with the build.  A CET-IBT
+             * enabled system might have exploded already.
+             *
+             * Otherwise, skip the endbr64 instruction.  This is a
+             * marginal perf improvement which saves on instruction
+             * decode bandwidth.
+             */
+            if ( IS_ENABLED(CONFIG_XEN_IBT) )
+            {
+                if ( is_endbr64(dest) )
+                    dest += ENDBR64_LEN;
+                else
+                    printk(XENLOG_WARNING
+                           "Altcall %ps dest %ps has no endbr64\n",
+                           orig, dest);
+            }
+
+            disp = dest - (orig + 6);
+            ASSERT(disp == (int32_t)disp);
+
+            buf[0] = 0x2e;
+            buf[1] = 0xe8;
+            *(int32_t *)(buf + 2) = disp;
+        }
+        else
+        {
+            /*
+             * The function pointer is still NULL.  Seal the whole call, as
+             * it's not used.
+             */
+            buf[0] = 0x0f;
+            buf[1] = 0x0b;
+            buf[2] = 0x0f;
+            buf[3] = 0x0b;
+            buf[4] = 0x0f;
+            buf[5] = 0x0b;
+        }
+
+        text_poke(orig, buf, sizeof(buf));
+    }
+
+    return 0;
+}
+
 #ifdef CONFIG_LIVEPATCH
 int apply_alternatives(struct alt_instr *start, struct alt_instr *end)
 {
@@ -401,6 +487,7 @@ static unsigned int __initdata alt_todo;
 static unsigned int __initdata alt_done;
 
 extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
+extern struct alt_call __alt_call_sites_start[], __alt_call_sites_end[];
 
 /*
  * At boot time, we patch alternatives in NMI context.  This means that the
@@ -435,6 +522,13 @@ static int __init cf_check nmi_apply_alternatives(
         if ( rc )
             panic("Unable to apply alternatives: %d\n", rc);
 
+        if ( alt_todo & ALT_CALLS )
+        {
+            rc = apply_alt_calls(__alt_call_sites_start, __alt_call_sites_end);
+            if ( rc )
+                panic("Unable to apply alternative calls: %d\n", rc);
+        }
+
         /*
          * Reinstate perms on .text to be RX.  This also cleans out the dirty
          * bits, which matters when CET Shstk is active.
diff --git a/xen/arch/x86/include/asm/alternative-call.h b/xen/arch/x86/include/asm/alternative-call.h
index 828ea32a9625..49a04a7cc45b 100644
--- a/xen/arch/x86/include/asm/alternative-call.h
+++ b/xen/arch/x86/include/asm/alternative-call.h
@@ -4,6 +4,13 @@
 
 #include 
 
+/* Simply the relative position of the source call. */
+struct alt_call {
+    int32_t offset;
+};
+#define ALT_CALL_PTR(a) ((void *)&(a)->offset + (a)->offset)
+#define ALT_CALL_LEN(a) (6)
+
 /*
  * Machinery to allow converting indirect to direct calls, when the called
  * function is determined once at boot and later never changed.
diff --git a/xen/arch/x86/xen.lds.S b/xen/arch/x86/xen.lds.S
index d4dd6434c466..53bafc98a536 100644
--- a/xen/arch/x86/xen.lds.S
+++ b/xen/arch/x86/xen.lds.S
@@ -260,6 +260,10 @@ SECTIONS
         __alt_instructions = .;
         *(.altinstructions)
         __alt_instructions_end = .;
+        . = ALIGN(4);
+        __alt_call_sites_start = .;
+        *(.alt_call_sites)
+        __alt_call_sites_end = .;
 
        LOCK_PROFILE_DATA
 
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH 2/8] x86/altcall: Rename alternative_branches() to boot_apply_alt_calls()
Date: Wed, 23 Apr 2025 02:02:31 +0100
Message-Id: <20250423010237.1528582-3-andrew.cooper3@citrix.com>
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The alternatives APIs are not great; rename alternative_branches() to be more
precise.  Centralise the declaration in xen/alternative-call.h, in the
expectation that x86 won't be the only user in the long term.

No functional change.

Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
CC: Roger Pau Monné 
---
 xen/arch/x86/alternative.c             |  2 +-
 xen/arch/x86/include/asm/alternative.h |  1 -
 xen/arch/x86/setup.c                   |  3 ++-
 xen/include/xen/alternative-call.h     | 10 +++++++++-
 4 files changed, 12 insertions(+), 4 deletions(-)

diff --git a/xen/arch/x86/alternative.c b/xen/arch/x86/alternative.c
index 1ba35cb9ede9..d1a3b7ea7ca6 100644
--- a/xen/arch/x86/alternative.c
+++ b/xen/arch/x86/alternative.c
@@ -493,7 +493,7 @@ void __init alternative_instructions(void)
     _alternative_instructions(false);
 }
 
-void __init alternative_branches(void)
+void __init boot_apply_alt_calls(void)
 {
     local_irq_disable();
     _alternative_instructions(true);
diff --git a/xen/arch/x86/include/asm/alternative.h b/xen/arch/x86/include/asm/alternative.h
index 2d2ace97f794..29c3d724b07f 100644
--- a/xen/arch/x86/include/asm/alternative.h
+++ b/xen/arch/x86/include/asm/alternative.h
@@ -29,7 +29,6 @@ extern void add_nops(void *insns, unsigned int len);
 /* Similar to alternative_instructions except it can be run with IRQs enabled. */
 extern int apply_alternatives(struct alt_instr *start, struct alt_instr *end);
 extern void alternative_instructions(void);
-extern void alternative_branches(void);
 
 #define alt_orig_len       "(.LXEN%=_orig_e - .LXEN%=_orig_s)"
 #define alt_pad_len        "(.LXEN%=_orig_p - .LXEN%=_orig_e)"
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index cf1ea040dd90..25189541244d 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -1,4 +1,5 @@
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -2082,7 +2083,7 @@ void asmlinkage __init noreturn __start_xen(void)
 
     do_presmp_initcalls();
 
-    alternative_branches();
+    boot_apply_alt_calls();
 
     /*
      * NB: when running as a PV shim VCPUOP_up/down is wired to the shim
diff --git a/xen/include/xen/alternative-call.h b/xen/include/xen/alternative-call.h
index 39339c3f0f76..3c855bfa44f5 100644
--- a/xen/include/xen/alternative-call.h
+++ b/xen/include/xen/alternative-call.h
@@ -17,6 +17,8 @@
  *   generation requirements are to emit a function pointer call at build
  *   time, and stash enough metadata to simplify the call at boot once the
  *   implementation has been resolved.
+ * - Implement boot_apply_alt_calls() to convert the function pointer calls
+ *   into direct calls on boot.
  * - Select ALTERNATIVE_CALL in Kconfig.
  *
  * To use:
@@ -57,7 +59,13 @@
 # define __alt_call_maybe_initdata __initdata
 #endif
 
-#else
+/*
+ * Devirtualise the alternative_{,v}call()'s on boot.  Convert still-NULL
+ * function pointers into traps.
+ */
+void boot_apply_alt_calls(void);
+
+#else /* CONFIG_ALTERNATIVE_CALL */
 
 #define alternative_call(func, args...)  (func)(args)
 #define alternative_vcall(func, args...) (func)(args)
-- 
2.39.5



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        Tue, 22 Apr 2025 18:02:44 -0700 (PDT)
From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	"consulting @ bugseng . com" ,
	Nicola Vetrini 
Subject: [PATCH 1/8] x86/altcall: Split alternative-call.h out of alternative.h
Date: Wed, 23 Apr 2025 02:02:30 +0100
Message-Id: <20250423010237.1528582-2-andrew.cooper3@citrix.com>
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... in preparation for changing how they're implemented.

Update the MISRA deviations with the new path.

No functional change.

Signed-off-by: Andrew Cooper 
---
CC: Anthony PERARD 
CC: Michal Orzel 
CC: Jan Beulich 
CC: Julien Grall 
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: consulting@bugseng.com 
CC: Nicola Vetrini 

In terms of naming, while tailcalls can technically be jumps, they're still
usually reasoned about as being calls.

It appears that everywhere else which needs alternative_{v,}call() gets it
transitively through hvm.h
---
 .../eclair_analysis/ECLAIR/deviations.ecl     |   4 +-
 .../asm/{alternative.h => alternative-call.h} | 171 +-----------
 xen/arch/x86/include/asm/alternative.h        | 262 ------------------
 xen/arch/x86/include/asm/hvm/hvm.h            |   2 +-
 xen/common/core_parking.c                     |   4 +-
 xen/include/xen/alternative-call.h            |  10 +-
 6 files changed, 16 insertions(+), 437 deletions(-)
 copy xen/arch/x86/include/asm/{alternative.h => alternative-call.h} (64%)

diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/automation/eclair_analysis/ECLAIR/deviations.ecl
index 2c8fb9271391..9c67358d4663 100644
--- a/automation/eclair_analysis/ECLAIR/deviations.ecl
+++ b/automation/eclair_analysis/ECLAIR/deviations.ecl
@@ -414,8 +414,8 @@ of the short-circuit evaluation strategy of such logical operators."
 -doc_end
 
 -doc_begin="Macros alternative_v?call[0-9] use sizeof and typeof to check that the argument types match the corresponding parameter ones."
--config=MC3A2.R13.6,reports+={deliberate,"any_area(any_loc(any_exp(macro(^alternative_vcall[0-9]$))&&file(^xen/arch/x86/include/asm/alternative\\.h*$)))"}
--config=B.UNEVALEFF,reports+={deliberate,"any_area(any_loc(any_exp(macro(^alternative_v?call[0-9]$))&&file(^xen/arch/x86/include/asm/alterantive\\.h*$)))"}
+-config=MC3A2.R13.6,reports+={deliberate,"any_area(any_loc(any_exp(macro(^alternative_vcall[0-9]$))&&file(^xen/arch/x86/include/asm/alternative-call\\.h*$)))"}
+-config=B.UNEVALEFF,reports+={deliberate,"any_area(any_loc(any_exp(macro(^alternative_v?call[0-9]$))&&file(^xen/arch/x86/include/asm/alterantive-call\\.h*$)))"}
 -doc_end
 
 -doc_begin="Anything, no matter how complicated, inside the BUILD_BUG_ON macro is subject to a compile-time evaluation without relevant side effects."
diff --git a/xen/arch/x86/include/asm/alternative.h b/xen/arch/x86/include/asm/alternative-call.h
similarity index 64%
copy from xen/arch/x86/include/asm/alternative.h
copy to xen/arch/x86/include/asm/alternative-call.h
index 7326ad942836..828ea32a9625 100644
--- a/xen/arch/x86/include/asm/alternative.h
+++ b/xen/arch/x86/include/asm/alternative-call.h
@@ -1,165 +1,8 @@
-#ifndef __X86_ALTERNATIVE_H__
-#define __X86_ALTERNATIVE_H__
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef X86_ALTERNATIVE_CALL_H
+#define X86_ALTERNATIVE_CALL_H
 
-#ifdef __ASSEMBLY__
-#include 
-#else
-
-#include 
-#include 
-
-#include 
-#include 
-
-struct __packed alt_instr {
-    int32_t  orig_offset;   /* original instruction */
-    int32_t  repl_offset;   /* offset to replacement instruction */
-    uint16_t cpuid;         /* cpuid bit set for replacement */
-    uint8_t  orig_len;      /* length of original instruction */
-    uint8_t  repl_len;      /* length of new instruction */
-    uint8_t  pad_len;       /* length of build-time padding */
-    uint8_t  priv;          /* Private, for use by apply_alternatives() */
-};
-
-#define __ALT_PTR(a,f)      ((uint8_t *)((void *)&(a)->f + (a)->f))
-#define ALT_ORIG_PTR(a)     __ALT_PTR(a, orig_offset)
-#define ALT_REPL_PTR(a)     __ALT_PTR(a, repl_offset)
-
-extern void add_nops(void *insns, unsigned int len);
-/* Similar to alternative_instructions except it can be run with IRQs enabled. */
-extern int apply_alternatives(struct alt_instr *start, struct alt_instr *end);
-extern void alternative_instructions(void);
-extern void alternative_branches(void);
-
-#define alt_orig_len       "(.LXEN%=_orig_e - .LXEN%=_orig_s)"
-#define alt_pad_len        "(.LXEN%=_orig_p - .LXEN%=_orig_e)"
-#define alt_total_len      "(.LXEN%=_orig_p - .LXEN%=_orig_s)"
-#define alt_repl_s(num)    ".LXEN%=_repl_s"#num
-#define alt_repl_e(num)    ".LXEN%=_repl_e"#num
-#define alt_repl_len(num)  "(" alt_repl_e(num) " - " alt_repl_s(num) ")"
-
-/*
- * GAS's idea of true is sometimes 1 and sometimes -1, while Clang's idea
- * was consistently 1 up to 6.x (it matches GAS's now).  Transform it to
- * uniformly 1.
- */
-#define AS_TRUE(x) "((" x ") & 1)"
-
-#define as_max(a, b) "(("a") ^ ((("a") ^ ("b")) & -("AS_TRUE("("a") < ("b")")")))"
-
-#define OLDINSTR(oldinstr, padding)                              \
-    ".LXEN%=_orig_s:\n\t" oldinstr "\n .LXEN%=_orig_e:\n\t"      \
-    ".LXEN%=_diff = " padding "\n\t"                             \
-    "mknops ("AS_TRUE(".LXEN%=_diff > 0")" * .LXEN%=_diff)\n\t"  \
-    ".LXEN%=_orig_p:\n\t"
-
-#define OLDINSTR_1(oldinstr, n1)                                 \
-    OLDINSTR(oldinstr, alt_repl_len(n1) "-" alt_orig_len)
-
-#define OLDINSTR_2(oldinstr, n1, n2)                             \
-    OLDINSTR(oldinstr,                                           \
-             as_max(alt_repl_len(n1),                            \
-                    alt_repl_len(n2)) "-" alt_orig_len)
-
-#define ALTINSTR_ENTRY(feature, num)                                    \
-        " .if " STR(feature) " >= " STR(NCAPINTS * 32) "\n"             \
-        " .error \"alternative feature outside of featureset range\"\n" \
-        " .endif\n"                                                     \
-        " .long .LXEN%=_orig_s - .\n"             /* label           */ \
-        " .long " alt_repl_s(num)" - .\n"         /* new instruction */ \
-        " .word " STR(feature) "\n"               /* feature bit     */ \
-        " .byte " alt_orig_len "\n"               /* source len      */ \
-        " .byte " alt_repl_len(num) "\n"          /* replacement len */ \
-        " .byte " alt_pad_len "\n"                /* padding len     */ \
-        " .byte 0\n"                              /* priv            */
-
-#define DISCARD_ENTRY(num)                        /* repl <= total */   \
-        " .byte 0xff + (" alt_repl_len(num) ") - (" alt_total_len ")\n"
-
-#define ALTINSTR_REPLACEMENT(newinstr, num)       /* replacement */     \
-        alt_repl_s(num)":\n\t" newinstr "\n" alt_repl_e(num) ":\n\t"
-
-/* alternative assembly primitive: */
-#define ALTERNATIVE(oldinstr, newinstr, feature)                        \
-        OLDINSTR_1(oldinstr, 1)                                         \
-        ".pushsection .altinstructions, \"a\", @progbits\n"             \
-        ALTINSTR_ENTRY(feature, 1)                                      \
-        ".section .discard, \"a\", @progbits\n"                         \
-        ".byte " alt_total_len "\n" /* total_len <= 255 */              \
-        DISCARD_ENTRY(1)                                                \
-        ".section .altinstr_replacement, \"ax\", @progbits\n"           \
-        ALTINSTR_REPLACEMENT(newinstr, 1)                               \
-        ".popsection\n"
-
-#define ALTERNATIVE_2(oldinstr, newinstr1, feature1, newinstr2, feature2) \
-        OLDINSTR_2(oldinstr, 1, 2)                                      \
-        ".pushsection .altinstructions, \"a\", @progbits\n"             \
-        ALTINSTR_ENTRY(feature1, 1)                                     \
-        ALTINSTR_ENTRY(feature2, 2)                                     \
-        ".section .discard, \"a\", @progbits\n"                         \
-        ".byte " alt_total_len "\n" /* total_len <= 255 */              \
-        DISCARD_ENTRY(1)                                                \
-        DISCARD_ENTRY(2)                                                \
-        ".section .altinstr_replacement, \"ax\", @progbits\n"           \
-        ALTINSTR_REPLACEMENT(newinstr1, 1)                              \
-        ALTINSTR_REPLACEMENT(newinstr2, 2)                              \
-        ".popsection\n"
-
-/*
- * Alternative instructions for different CPU types or capabilities.
- *
- * This allows to use optimized instructions even on generic binary
- * kernels.
- *
- * length of oldinstr must be longer or equal the length of newinstr
- * It can be padded with nops as needed.
- *
- * For non barrier like inlines please define new variants
- * without volatile and memory clobber.
- */
-#define alternative(oldinstr, newinstr, feature)                        \
-        asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) : : : "memory")
-
-#define alternative_2(oldinstr, newinstr1, feature1, newinstr2, feature2) \
-	asm volatile (ALTERNATIVE_2(oldinstr, newinstr1, feature1,	\
-				    newinstr2, feature2)		\
-		      : : : "memory")
-
-/*
- * Alternative inline assembly with input.
- *
- * Pecularities:
- * No memory clobber here.
- * Argument numbers start with 1.
- * Best is to use constraints that are fixed size (like (%1) ... "r")
- * If you use variable sized constraints like "m" or "g" in the
- * replacement make sure to pad to the worst case length.
- */
-#define alternative_input(oldinstr, newinstr, feature, input...)	\
-	asm volatile (ALTERNATIVE(oldinstr, newinstr, feature)		\
-		      : : input)
-
-/* Like alternative_input, but with a single output argument */
-#define alternative_io(oldinstr, newinstr, feature, output, input...)	\
-	asm volatile (ALTERNATIVE(oldinstr, newinstr, feature)		\
-		      : output : input)
-
-/*
- * This is similar to alternative_io. But it has two features and
- * respective instructions.
- *
- * If CPU has feature2, newinstr2 is used.
- * Otherwise, if CPU has feature1, newinstr1 is used.
- * Otherwise, oldinstr is used.
- */
-#define alternative_io_2(oldinstr, newinstr1, feature1, newinstr2,	\
-			 feature2, output, input...)			\
-	asm volatile(ALTERNATIVE_2(oldinstr, newinstr1, feature1,	\
-				   newinstr2, feature2)			\
-		     : output : input)
-
-/* Use this macro(s) if you need more than one output parameter. */
-#define ASM_OUTPUT2(a...) a
+#include 
 
 /*
  * Machinery to allow converting indirect to direct calls, when the called
@@ -303,7 +146,7 @@ extern void alternative_branches(void);
 })
 
 #define alternative_call3(func, arg1, arg2, arg3) ({     \
-    typeof(arg1) v1_ = (arg1);                            \
+    typeof(arg1) v1_ = (arg1);                           \
     typeof(arg2) v2_ = (arg2);                           \
     typeof(arg3) v3_ = (arg3);                           \
     ALT_CALL_ARG(v1_, 1);                                \
@@ -423,6 +266,4 @@ extern void alternative_branches(void);
 #define alternative_call(func, args...) \
     alternative_call_(count_args(args))(func, ## args)
 
-#endif /*  !__ASSEMBLY__  */
-
-#endif /* __X86_ALTERNATIVE_H__ */
+#endif /* X86_ALTERNATIVE_CALL_H */
diff --git a/xen/arch/x86/include/asm/alternative.h b/xen/arch/x86/include/asm/alternative.h
index 7326ad942836..2d2ace97f794 100644
--- a/xen/arch/x86/include/asm/alternative.h
+++ b/xen/arch/x86/include/asm/alternative.h
@@ -161,268 +161,6 @@ extern void alternative_branches(void);
 /* Use this macro(s) if you need more than one output parameter. */
 #define ASM_OUTPUT2(a...) a
 
-/*
- * Machinery to allow converting indirect to direct calls, when the called
- * function is determined once at boot and later never changed.
- */
-
-#define ALT_CALL_arg1 "rdi"
-#define ALT_CALL_arg2 "rsi"
-#define ALT_CALL_arg3 "rdx"
-#define ALT_CALL_arg4 "rcx"
-#define ALT_CALL_arg5 "r8"
-#define ALT_CALL_arg6 "r9"
-
-#ifdef CONFIG_CC_IS_CLANG
-/*
- * Clang doesn't follow the psABI and doesn't truncate parameter values at the
- * callee.  This can lead to bad code being generated when using alternative
- * calls.
- *
- * Workaround it by using a temporary intermediate variable that's zeroed
- * before being assigned the parameter value, as that forces clang to zero the
- * register at the caller.
- *
- * This has been reported upstream:
- * https://github.com/llvm/llvm-project/issues/12579
- * https://github.com/llvm/llvm-project/issues/82598
- */
-#define ALT_CALL_ARG(arg, n)                                            \
-    register unsigned long a ## n ## _ asm ( ALT_CALL_arg ## n ) = ({   \
-        unsigned long tmp = 0;                                          \
-        BUILD_BUG_ON(sizeof(arg) > sizeof(unsigned long));              \
-        *(typeof(arg) *)&tmp = (arg);                                   \
-        tmp;                                                            \
-    })
-#else
-#define ALT_CALL_ARG(arg, n) \
-    register typeof(arg) a ## n ## _ asm ( ALT_CALL_arg ## n ) = \
-        ({ BUILD_BUG_ON(sizeof(arg) > sizeof(void *)); (arg); })
-#endif
-#define ALT_CALL_NO_ARG(n) \
-    register unsigned long a ## n ## _ asm ( ALT_CALL_arg ## n )
-
-#define ALT_CALL_NO_ARG6 ALT_CALL_NO_ARG(6)
-#define ALT_CALL_NO_ARG5 ALT_CALL_NO_ARG(5); ALT_CALL_NO_ARG6
-#define ALT_CALL_NO_ARG4 ALT_CALL_NO_ARG(4); ALT_CALL_NO_ARG5
-#define ALT_CALL_NO_ARG3 ALT_CALL_NO_ARG(3); ALT_CALL_NO_ARG4
-#define ALT_CALL_NO_ARG2 ALT_CALL_NO_ARG(2); ALT_CALL_NO_ARG3
-#define ALT_CALL_NO_ARG1 ALT_CALL_NO_ARG(1); ALT_CALL_NO_ARG2
-
-/*
- * Unfortunately ALT_CALL_NO_ARG() above can't use a fake initializer (to
- * suppress "uninitialized variable" warnings), as various versions of gcc
- * older than 8.1 fall on the nose in various ways with that (always because
- * of some other construct elsewhere in the same function needing to use the
- * same hard register). Otherwise the asm() below could uniformly use "+r"
- * output constraints, making unnecessary all these ALT_CALL_OUT macros.
- */
-#define ALT_CALL0_OUT "=r" (a1_), "=r" (a2_), "=r" (a3_), \
-                      "=r" (a4_), "=r" (a5_), "=r" (a6_)
-#define ALT_CALL1_OUT "+r" (a1_), "=r" (a2_), "=r" (a3_), \
-                      "=r" (a4_), "=r" (a5_), "=r" (a6_)
-#define ALT_CALL2_OUT "+r" (a1_), "+r" (a2_), "=r" (a3_), \
-                      "=r" (a4_), "=r" (a5_), "=r" (a6_)
-#define ALT_CALL3_OUT "+r" (a1_), "+r" (a2_), "+r" (a3_), \
-                      "=r" (a4_), "=r" (a5_), "=r" (a6_)
-#define ALT_CALL4_OUT "+r" (a1_), "+r" (a2_), "+r" (a3_), \
-                      "+r" (a4_), "=r" (a5_), "=r" (a6_)
-#define ALT_CALL5_OUT "+r" (a1_), "+r" (a2_), "+r" (a3_), \
-                      "+r" (a4_), "+r" (a5_), "=r" (a6_)
-#define ALT_CALL6_OUT "+r" (a1_), "+r" (a2_), "+r" (a3_), \
-                      "+r" (a4_), "+r" (a5_), "+r" (a6_)
-
-#define alternative_callN(n, rettype, func) ({                     \
-    rettype ret_;                                                  \
-    register unsigned long r10_ asm("r10");                        \
-    register unsigned long r11_ asm("r11");                        \
-    asm volatile (ALTERNATIVE("call *%c[addr](%%rip)", "call .",   \
-                              X86_FEATURE_ALWAYS)                  \
-                  : ALT_CALL ## n ## _OUT, "=a" (ret_),            \
-                    "=r" (r10_), "=r" (r11_) ASM_CALL_CONSTRAINT   \
-                  : [addr] "i" (&(func)), "g" (func)               \
-                  : "memory" );                                    \
-    ret_;                                                          \
-})
-
-#define alternative_vcall0(func) ({             \
-    ALT_CALL_NO_ARG1;                           \
-    (void)sizeof(func());                       \
-    (void)alternative_callN(0, int, func);      \
-})
-
-#define alternative_call0(func) ({              \
-    ALT_CALL_NO_ARG1;                           \
-    alternative_callN(0, typeof(func()), func); \
-})
-
-#define alternative_vcall1(func, arg) ({           \
-    typeof(arg) v1_ = (arg);                       \
-    ALT_CALL_ARG(v1_, 1);                          \
-    ALT_CALL_NO_ARG2;                              \
-    (void)sizeof(func(arg));                       \
-    (void)alternative_callN(1, int, func);         \
-})
-
-#define alternative_call1(func, arg) ({            \
-    typeof(arg) v1_ = (arg);                       \
-    ALT_CALL_ARG(v1_, 1);                          \
-    ALT_CALL_NO_ARG2;                              \
-    alternative_callN(1, typeof(func(arg)), func); \
-})
-
-#define alternative_vcall2(func, arg1, arg2) ({           \
-    typeof(arg1) v1_ = (arg1);                            \
-    typeof(arg2) v2_ = (arg2);                            \
-    ALT_CALL_ARG(v1_, 1);                                 \
-    ALT_CALL_ARG(v2_, 2);                                 \
-    ALT_CALL_NO_ARG3;                                     \
-    (void)sizeof(func(arg1, arg2));                       \
-    (void)alternative_callN(2, int, func);                \
-})
-
-#define alternative_call2(func, arg1, arg2) ({            \
-    typeof(arg1) v1_ = (arg1);                            \
-    typeof(arg2) v2_ = (arg2);                            \
-    ALT_CALL_ARG(v1_, 1);                                 \
-    ALT_CALL_ARG(v2_, 2);                                 \
-    ALT_CALL_NO_ARG3;                                     \
-    alternative_callN(2, typeof(func(arg1, arg2)), func); \
-})
-
-#define alternative_vcall3(func, arg1, arg2, arg3) ({    \
-    typeof(arg1) v1_ = (arg1);                           \
-    typeof(arg2) v2_ = (arg2);                           \
-    typeof(arg3) v3_ = (arg3);                           \
-    ALT_CALL_ARG(v1_, 1);                                \
-    ALT_CALL_ARG(v2_, 2);                                \
-    ALT_CALL_ARG(v3_, 3);                                \
-    ALT_CALL_NO_ARG4;                                    \
-    (void)sizeof(func(arg1, arg2, arg3));                \
-    (void)alternative_callN(3, int, func);               \
-})
-
-#define alternative_call3(func, arg1, arg2, arg3) ({     \
-    typeof(arg1) v1_ = (arg1);                            \
-    typeof(arg2) v2_ = (arg2);                           \
-    typeof(arg3) v3_ = (arg3);                           \
-    ALT_CALL_ARG(v1_, 1);                                \
-    ALT_CALL_ARG(v2_, 2);                                \
-    ALT_CALL_ARG(v3_, 3);                                \
-    ALT_CALL_NO_ARG4;                                    \
-    alternative_callN(3, typeof(func(arg1, arg2, arg3)), \
-                      func);                             \
-})
-
-#define alternative_vcall4(func, arg1, arg2, arg3, arg4) ({ \
-    typeof(arg1) v1_ = (arg1);                              \
-    typeof(arg2) v2_ = (arg2);                              \
-    typeof(arg3) v3_ = (arg3);                              \
-    typeof(arg4) v4_ = (arg4);                              \
-    ALT_CALL_ARG(v1_, 1);                                   \
-    ALT_CALL_ARG(v2_, 2);                                   \
-    ALT_CALL_ARG(v3_, 3);                                   \
-    ALT_CALL_ARG(v4_, 4);                                   \
-    ALT_CALL_NO_ARG5;                                       \
-    (void)sizeof(func(arg1, arg2, arg3, arg4));             \
-    (void)alternative_callN(4, int, func);                  \
-})
-
-#define alternative_call4(func, arg1, arg2, arg3, arg4) ({  \
-    typeof(arg1) v1_ = (arg1);                              \
-    typeof(arg2) v2_ = (arg2);                              \
-    typeof(arg3) v3_ = (arg3);                              \
-    typeof(arg4) v4_ = (arg4);                              \
-    ALT_CALL_ARG(v1_, 1);                                   \
-    ALT_CALL_ARG(v2_, 2);                                   \
-    ALT_CALL_ARG(v3_, 3);                                   \
-    ALT_CALL_ARG(v4_, 4);                                   \
-    ALT_CALL_NO_ARG5;                                       \
-    alternative_callN(4, typeof(func(arg1, arg2,            \
-                                     arg3, arg4)),          \
-                      func);                                \
-})
-
-#define alternative_vcall5(func, arg1, arg2, arg3, arg4, arg5) ({ \
-    typeof(arg1) v1_ = (arg1);                                    \
-    typeof(arg2) v2_ = (arg2);                                    \
-    typeof(arg3) v3_ = (arg3);                                    \
-    typeof(arg4) v4_ = (arg4);                                    \
-    typeof(arg5) v5_ = (arg5);                                    \
-    ALT_CALL_ARG(v1_, 1);                                         \
-    ALT_CALL_ARG(v2_, 2);                                         \
-    ALT_CALL_ARG(v3_, 3);                                         \
-    ALT_CALL_ARG(v4_, 4);                                         \
-    ALT_CALL_ARG(v5_, 5);                                         \
-    ALT_CALL_NO_ARG6;                                             \
-    (void)sizeof(func(arg1, arg2, arg3, arg4, arg5));             \
-    (void)alternative_callN(5, int, func);                        \
-})
-
-#define alternative_call5(func, arg1, arg2, arg3, arg4, arg5) ({  \
-    typeof(arg1) v1_ = (arg1);                                    \
-    typeof(arg2) v2_ = (arg2);                                    \
-    typeof(arg3) v3_ = (arg3);                                    \
-    typeof(arg4) v4_ = (arg4);                                    \
-    typeof(arg5) v5_ = (arg5);                                    \
-    ALT_CALL_ARG(v1_, 1);                                         \
-    ALT_CALL_ARG(v2_, 2);                                         \
-    ALT_CALL_ARG(v3_, 3);                                         \
-    ALT_CALL_ARG(v4_, 4);                                         \
-    ALT_CALL_ARG(v5_, 5);                                         \
-    ALT_CALL_NO_ARG6;                                             \
-    alternative_callN(5, typeof(func(arg1, arg2, arg3,            \
-                                     arg4, arg5)),                \
-                      func);                                      \
-})
-
-#define alternative_vcall6(func, arg1, arg2, arg3, arg4, arg5, arg6) ({ \
-    typeof(arg1) v1_ = (arg1);                                          \
-    typeof(arg2) v2_ = (arg2);                                          \
-    typeof(arg3) v3_ = (arg3);                                          \
-    typeof(arg4) v4_ = (arg4);                                          \
-    typeof(arg5) v5_ = (arg5);                                          \
-    typeof(arg6) v6_ = (arg6);                                          \
-    ALT_CALL_ARG(v1_, 1);                                               \
-    ALT_CALL_ARG(v2_, 2);                                               \
-    ALT_CALL_ARG(v3_, 3);                                               \
-    ALT_CALL_ARG(v4_, 4);                                               \
-    ALT_CALL_ARG(v5_, 5);                                               \
-    ALT_CALL_ARG(v6_, 6);                                               \
-    (void)sizeof(func(arg1, arg2, arg3, arg4, arg5, arg6));             \
-    (void)alternative_callN(6, int, func);                              \
-})
-
-#define alternative_call6(func, arg1, arg2, arg3, arg4, arg5, arg6) ({  \
-    typeof(arg1) v1_ = (arg1);                                          \
-    typeof(arg2) v2_ = (arg2);                                          \
-    typeof(arg3) v3_ = (arg3);                                          \
-    typeof(arg4) v4_ = (arg4);                                          \
-    typeof(arg5) v5_ = (arg5);                                          \
-    typeof(arg6) v6_ = (arg6);                                          \
-    ALT_CALL_ARG(v1_, 1);                                               \
-    ALT_CALL_ARG(v2_, 2);                                               \
-    ALT_CALL_ARG(v3_, 3);                                               \
-    ALT_CALL_ARG(v4_, 4);                                               \
-    ALT_CALL_ARG(v5_, 5);                                               \
-    ALT_CALL_ARG(v6_, 6);                                               \
-    alternative_callN(6, typeof(func(arg1, arg2, arg3,                  \
-                                     arg4, arg5, arg6)),                \
-                      func);                                            \
-})
-
-#define alternative_vcall__(nr) alternative_vcall ## nr
-#define alternative_call__(nr)  alternative_call ## nr
-
-#define alternative_vcall_(nr) alternative_vcall__(nr)
-#define alternative_call_(nr)  alternative_call__(nr)
-
-#define alternative_vcall(func, args...) \
-    alternative_vcall_(count_args(args))(func, ## args)
-
-#define alternative_call(func, args...) \
-    alternative_call_(count_args(args))(func, ## args)
-
 #endif /*  !__ASSEMBLY__  */
 
 #endif /* __X86_ALTERNATIVE_H__ */
diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/hvm/hvm.h
index 963e8201130a..bf8bc2e100bd 100644
--- a/xen/arch/x86/include/asm/hvm/hvm.h
+++ b/xen/arch/x86/include/asm/hvm/hvm.h
@@ -9,9 +9,9 @@
 #ifndef __ASM_X86_HVM_HVM_H__
 #define __ASM_X86_HVM_HVM_H__
 
+#include 
 #include 
 
-#include 
 #include 
 #include 
 #include 
diff --git a/xen/common/core_parking.c b/xen/common/core_parking.c
index a970ffeab8c3..7d6a18cdcf4c 100644
--- a/xen/common/core_parking.c
+++ b/xen/common/core_parking.c
@@ -15,10 +15,10 @@
  *  General Public License for more details.
  */
 
-#include 
+#include 
 #include 
-#include 
 #include 
+#include 
 #include 
 
 #include 
diff --git a/xen/include/xen/alternative-call.h b/xen/include/xen/alternative-call.h
index 62672b732431..39339c3f0f76 100644
--- a/xen/include/xen/alternative-call.h
+++ b/xen/include/xen/alternative-call.h
@@ -13,10 +13,10 @@
  *
  * For architectures to support:
  *
- * - Implement alternative_{,v}call() in asm/alternative.h.  Code generation
- *   requirements are to emit a function pointer call at build time, and stash
- *   enough metadata to simplify the call at boot once the implementation has
- *   been resolved.
+ * - Implement alternative_{,v}call() in asm/alternative-call.h.  Code
+ *   generation requirements are to emit a function pointer call at build
+ *   time, and stash enough metadata to simplify the call at boot once the
+ *   implementation has been resolved.
  * - Select ALTERNATIVE_CALL in Kconfig.
  *
  * To use:
@@ -48,7 +48,7 @@
 
 #ifdef CONFIG_ALTERNATIVE_CALL
 
-#include 
+#include 
 
 #ifdef CONFIG_LIVEPATCH
 /* Must keep for livepatches to resolve alternative calls. */
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH 4/8] x86/alternatives: Factor seal_endbr64() out of _apply_alternatives()
Date: Wed, 23 Apr 2025 02:02:33 +0100
Message-Id: <20250423010237.1528582-5-andrew.cooper3@citrix.com>
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We are going to need to reposition the call in a change with several moving
parts.

No functional change.

Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
CC: Roger Pau Monné 
---
 xen/arch/x86/alternative.c | 70 ++++++++++++++++++++++----------------
 1 file changed, 40 insertions(+), 30 deletions(-)

diff --git a/xen/arch/x86/alternative.c b/xen/arch/x86/alternative.c
index 9aa591b364a4..4b9f8d860153 100644
--- a/xen/arch/x86/alternative.c
+++ b/xen/arch/x86/alternative.c
@@ -162,6 +162,44 @@ text_poke(void *addr, const void *opcode, size_t len)
 extern void *const __initdata_cf_clobber_start[];
 extern void *const __initdata_cf_clobber_end[];
 
+/*
+ * In CET-IBT enabled builds, clobber endbr64 instructions after altcall has
+ * finished optimising all indirect branches to direct ones.
+ */
+static void __init seal_endbr64(void)
+{
+    void *const *val;
+    unsigned int clobbered = 0;
+
+    if ( !cpu_has_xen_ibt )
+        return;
+
+    /*
+     * This is some minor structure (ab)use.  We walk the entire contents
+     * of .init.{ro,}data.cf_clobber as if it were an array of pointers.
+     *
+     * If the pointer points into .text, and at an endbr64 instruction,
+     * nop out the endbr64.  This causes the pointer to no longer be a
+     * legal indirect branch target under CET-IBT.  This is a
+     * defence-in-depth measure, to reduce the options available to an
+     * adversary who has managed to hijack a function pointer.
+     */
+    for ( val = __initdata_cf_clobber_start;
+          val < __initdata_cf_clobber_end;
+          val++ )
+    {
+        void *ptr = *val;
+
+        if ( !is_kernel_text(ptr) || !is_endbr64(ptr) )
+            continue;
+
+        place_endbr64_poison(ptr);
+        clobbered++;
+    }
+
+    printk("altcall: Optimised away %u endbr64 instructions\n", clobbered);
+}
+
 /*
  * Replace instructions with better alternatives for this CPU type.
  * This runs before SMP is initialized to avoid SMP problems with
@@ -344,36 +382,8 @@ static int init_or_livepatch _apply_alternatives(struct alt_instr *start,
      * Clobber endbr64 instructions now that altcall has finished optimising
      * all indirect branches to direct ones.
      */
-    if ( force && cpu_has_xen_ibt && system_state < SYS_STATE_active )
-    {
-        void *const *val;
-        unsigned int clobbered = 0;
-
-        /*
-         * This is some minor structure (ab)use.  We walk the entire contents
-         * of .init.{ro,}data.cf_clobber as if it were an array of pointers.
-         *
-         * If the pointer points into .text, and at an endbr64 instruction,
-         * nop out the endbr64.  This causes the pointer to no longer be a
-         * legal indirect branch target under CET-IBT.  This is a
-         * defence-in-depth measure, to reduce the options available to an
-         * adversary who has managed to hijack a function pointer.
-         */
-        for ( val = __initdata_cf_clobber_start;
-              val < __initdata_cf_clobber_end;
-              val++ )
-        {
-            void *ptr = *val;
-
-            if ( !is_kernel_text(ptr) || !is_endbr64(ptr) )
-                continue;
-
-            place_endbr64_poison(ptr);
-            clobbered++;
-        }
-
-        printk("altcall: Optimised away %u endbr64 instructions\n", clobbered);
-    }
+    if ( force && system_state < SYS_STATE_active )
+        seal_endbr64();
 
     return 0;
 }
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH 3/8] x86/alternatives: Rework information passing into nmi_apply_alternatives()
Date: Wed, 23 Apr 2025 02:02:32 +0100
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nmi_apply_alternatives() is soon going to need to dispatch to multiple
functions, and a force parameter is not a good way of passing information.

Introduce ALT_INSNS and ALT_CALLS to pass in at the top level to select the
operation(s) desired.  They represent what will happen when we've separated
the altcalls out of the general alternative instructions infrastructure,
although in the short term we still need to synthesise the force parameter for
_apply_alternatives().

Move two externs to reduce their scope a little.

No functional change.

Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
CC: Roger Pau Monné 
---
 xen/arch/x86/alternative.c | 16 +++++++++-------
 1 file changed, 9 insertions(+), 7 deletions(-)

diff --git a/xen/arch/x86/alternative.c b/xen/arch/x86/alternative.c
index d1a3b7ea7ca6..9aa591b364a4 100644
--- a/xen/arch/x86/alternative.c
+++ b/xen/arch/x86/alternative.c
@@ -19,8 +19,6 @@
 
 #define MAX_PATCH_LEN (255-1)
 
-extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
-
 #ifdef K8_NOP1
 static const unsigned char k8nops[] init_or_livepatch_const = {
     K8_NOP1,
@@ -387,9 +385,13 @@ int apply_alternatives(struct alt_instr *start, struct alt_instr *end)
 }
 #endif
 
+#define ALT_INSNS (1U << 0)
+#define ALT_CALLS (1U << 1)
 static unsigned int __initdata alt_todo;
 static unsigned int __initdata alt_done;
 
+extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
+
 /*
  * At boot time, we patch alternatives in NMI context.  This means that the
  * active NMI-shadow will defer any further NMIs, removing the slim race
@@ -419,7 +421,7 @@ static int __init cf_check nmi_apply_alternatives(
         flush_local(FLUSH_TLB_GLOBAL);
 
         rc = _apply_alternatives(__alt_instructions, __alt_instructions_end,
-                                 alt_done);
+                                 alt_todo == ALT_CALLS);
         if ( rc )
             panic("Unable to apply alternatives: %d\n", rc);
 
@@ -442,7 +444,7 @@ static int __init cf_check nmi_apply_alternatives(
  * This routine is called with local interrupt disabled and used during
  * bootup.
  */
-static void __init _alternative_instructions(bool force)
+static void __init _alternative_instructions(unsigned int what)
 {
     unsigned int i;
     nmi_callback_t *saved_nmi_callback;
@@ -460,7 +462,7 @@ static void __init _alternative_instructions(bool force)
     ASSERT(!local_irq_is_enabled());
 
     /* Set what operation to perform /before/ setting the callback. */
-    alt_todo = 1u << force;
+    alt_todo = what;
     barrier();
 
     /*
@@ -490,12 +492,12 @@ static void __init _alternative_instructions(bool force)
 void __init alternative_instructions(void)
 {
     arch_init_ideal_nops();
-    _alternative_instructions(false);
+    _alternative_instructions(ALT_INSNS);
 }
 
 void __init boot_apply_alt_calls(void)
 {
     local_irq_disable();
-    _alternative_instructions(true);
+    _alternative_instructions(ALT_CALLS);
     local_irq_enable();
 }
-- 
2.39.5



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        Tue, 22 Apr 2025 18:02:42 -0700 (PDT)
From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	"consulting @ bugseng . com" ,
	Nicola Vetrini ,
	Ross Lagerwall 
Subject: [PATCH 0/8] x86/altcall: Switch to a simpler scheme
Date: Wed, 23 Apr 2025 02:02:29 +0100
Message-Id: <20250423010237.1528582-1-andrew.cooper3@citrix.com>
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See patch 7 for details.  This simplifies _apply_alternatives() specifically
by removing a special and quite complicated case, and encodes the metadata
about altcalls differently and more efficiently.

https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1780872355

Andrew Cooper (8):
  x86/altcall: Split alternative-call.h out of alternative.h
  x86/altcall: Rename alternative_branches() to boot_apply_alt_calls()
  x86/alternatives: Rework information passing into
    nmi_apply_alternatives()
  x86/alternatives: Factor seal_endbr64() out of _apply_alternatives()
  x86/altcall: Introduce new simpler scheme
  xen/livepatch: Support new altcall scheme
  x86/altcall: Switch to simpler scheme
  x86/alternatives: Simplify _apply_alternatives() now altcall is
    separate

 .../eclair_analysis/ECLAIR/deviations.ecl     |   4 +-
 xen/arch/x86/alternative.c                    | 267 ++++++++++--------
 .../asm/{alternative.h => alternative-call.h} | 179 +-----------
 xen/arch/x86/include/asm/alternative.h        | 263 -----------------
 xen/arch/x86/include/asm/hvm/hvm.h            |   2 +-
 xen/arch/x86/setup.c                          |   3 +-
 xen/arch/x86/xen.lds.S                        |   4 +
 xen/common/core_parking.c                     |   4 +-
 xen/common/livepatch.c                        |  58 ++++
 xen/include/xen/alternative-call.h            |  24 +-
 10 files changed, 252 insertions(+), 556 deletions(-)
 copy xen/arch/x86/include/asm/{alternative.h => alternative-call.h} (63%)

-- 
2.39.5



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        Tue, 22 Apr 2025 18:02:52 -0700 (PDT)
From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Ross Lagerwall 
Subject: [PATCH 6/8] xen/livepatch: Support new altcall scheme
Date: Wed, 23 Apr 2025 02:02:35 +0100
Message-Id: <20250423010237.1528582-7-andrew.cooper3@citrix.com>
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The new altcall scheme uses an .alt_call_sites section.  Wire this up in very
much the same way as the .altinstructions section, although there is less
sanity checking necessary.

Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
CC: Roger Pau Monné 
CC: Ross Lagerwall 
---
 xen/arch/x86/alternative.c         |  6 ++++
 xen/common/livepatch.c             | 58 ++++++++++++++++++++++++++++++
 xen/include/xen/alternative-call.h |  8 +++--
 3 files changed, 70 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/alternative.c b/xen/arch/x86/alternative.c
index f6594e21a14c..22af224f08f7 100644
--- a/xen/arch/x86/alternative.c
+++ b/xen/arch/x86/alternative.c
@@ -479,6 +479,12 @@ int apply_alternatives(struct alt_instr *start, struct alt_instr *end)
 {
     return _apply_alternatives(start, end, true);
 }
+
+int livepatch_apply_alt_calls(const struct alt_call *start,
+                              const struct alt_call *end)
+{
+    return apply_alt_calls(start, end);
+}
 #endif
 
 #define ALT_INSNS (1U << 0)
diff --git a/xen/common/livepatch.c b/xen/common/livepatch.c
index 6ce77bf021b7..be9b7e367553 100644
--- a/xen/common/livepatch.c
+++ b/xen/common/livepatch.c
@@ -905,6 +905,64 @@ static int prepare_payload(struct payload *payload,
 #endif
     }
 
+    sec = livepatch_elf_sec_by_name(elf, ".alt_call_sites");
+    if ( sec )
+    {
+#ifdef CONFIG_ALTERNATIVE_CALL
+        const struct alt_call *a, *start, *end;
+
+        if ( !section_ok(elf, sec, sizeof(*a)) )
+            return -EINVAL;
+
+        /* Tolerate an empty .alt_call_sites section... */
+        if ( sec->sec->sh_size == 0 )
+            goto alt_call_done;
+
+        /* ... but otherwise, there needs to be something to alter... */
+        if ( payload->text_size == 0 )
+        {
+            printk(XENLOG_ERR LIVEPATCH "%s Alternative calls provided, but no .text\n",
+                   elf->name);
+            return -EINVAL;
+        }
+
+        start = sec->addr;
+        end = sec->addr + sec->sec->sh_size;
+
+        for ( a = start; a < end; a++ )
+        {
+            const void *orig = ALT_CALL_PTR(a);
+            size_t len = ALT_CALL_LEN(a);
+
+            /* orig must be fully within .text. */
+            if ( orig       < payload->text_addr ||
+                 len        > payload->text_size ||
+                 orig + len > payload->text_addr + payload->text_size )
+            {
+                printk(XENLOG_ERR LIVEPATCH
+                       "%s: Alternative call %p+%#zx outside payload text %p+%#zx\n",
+                       elf->name, orig, len,
+                       payload->text_addr, payload->text_size);
+                return -EINVAL;
+            }
+        }
+
+        rc = livepatch_apply_alt_calls(start, end);
+        if ( rc )
+        {
+            printk(XENLOG_ERR LIVEPATCH "%s: Applying alternative calls failed: %d\n",
+                   elf->name, rc);
+            return rc;
+        }
+
+    alt_call_done:;
+#else /* CONFIG_ALTERNATIVE_CALL */
+        printk(XENLOG_ERR LIVEPATCH "%s: Alternative calls not supported\n",
+               elf->name);
+        return -EOPNOTSUPP;
+#endif /* !CONFIG_ALTERNATIVE_CALL */
+    }
+
     sec = livepatch_elf_sec_by_name(elf, ".ex_table");
     if ( sec )
     {
diff --git a/xen/include/xen/alternative-call.h b/xen/include/xen/alternative-call.h
index 3c855bfa44f5..767c2149bce7 100644
--- a/xen/include/xen/alternative-call.h
+++ b/xen/include/xen/alternative-call.h
@@ -17,8 +17,8 @@
  *   generation requirements are to emit a function pointer call at build
  *   time, and stash enough metadata to simplify the call at boot once the
  *   implementation has been resolved.
- * - Implement boot_apply_alt_calls() to convert the function pointer calls
- *   into direct calls on boot.
+ * - Implement {boot,livepatch}_apply_alt_calls() to convert the function
+ *   pointer calls into direct calls on boot/livepatch.
  * - Select ALTERNATIVE_CALL in Kconfig.
  *
  * To use:
@@ -65,6 +65,10 @@
  */
 void boot_apply_alt_calls(void);
 
+/* As per boot_apply_alt_calls() but for a livepatch. */
+int livepatch_apply_alt_calls(const struct alt_call *start,
+                              const struct alt_call *end);
+
 #else /* CONFIG_ALTERNATIVE_CALL */
 
 #define alternative_call(func, args...)  (func)(args)
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH 7/8] x86/altcall: Switch to simpler scheme
Date: Wed, 23 Apr 2025 02:02:36 +0100
Message-Id: <20250423010237.1528582-8-andrew.cooper3@citrix.com>
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With all the infrastructure in place, switch from using ALTERNATIVE() to
simply populating .alt_call_sites.

Before, _apply_alternatives() would devirtualise in two passes; the first
being opportunistic, and the second (signified by the force parameter) sealing
any call with a still-NULL function pointer.

Now, all devirtualising is performed together, at the point in time of the
second pass previously.  The call to seal_endbr64() needs delaying until after
apply_alt_calls() is complete, or we have a narrow window with real indirect
branches and no ENDBR64 instructions.

Under the hood, the following changes are happening:

  Section                Old size   New size   Change (%)
  .alt_call_sites               0    0x00730   +0x0730
  .altinstructions        0x1350a    0x11fe0   -0x152a (-7%)
  .altinstr_replacement   0x015f2    0x00e35   -0x07bd (-23%)

The changes aren't quite equal because inlining is affected by the smaller
asm() block.  Nevertheless, the metadata is held in 1/3 of the space, and
there are no CALL instructions held in the replacement section any more.

No functional change.

Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
CC: Roger Pau Monné 
---
 xen/arch/x86/alternative.c                  | 9 ++-------
 xen/arch/x86/include/asm/alternative-call.h | 9 ++++++---
 2 files changed, 8 insertions(+), 10 deletions(-)

diff --git a/xen/arch/x86/alternative.c b/xen/arch/x86/alternative.c
index 22af224f08f7..047bfc6e424b 100644
--- a/xen/arch/x86/alternative.c
+++ b/xen/arch/x86/alternative.c
@@ -378,13 +378,6 @@ static int init_or_livepatch _apply_alternatives(struct alt_instr *start,
         text_poke(orig, buf, total_len);
     }
 
-    /*
-     * Clobber endbr64 instructions now that altcall has finished optimising
-     * all indirect branches to direct ones.
-     */
-    if ( force && system_state < SYS_STATE_active )
-        seal_endbr64();
-
     return 0;
 }
 
@@ -533,6 +526,8 @@ static int __init cf_check nmi_apply_alternatives(
             rc = apply_alt_calls(__alt_call_sites_start, __alt_call_sites_end);
             if ( rc )
                 panic("Unable to apply alternative calls: %d\n", rc);
+
+            seal_endbr64();
         }
 
         /*
diff --git a/xen/arch/x86/include/asm/alternative-call.h b/xen/arch/x86/include/asm/alternative-call.h
index 49a04a7cc45b..bbc49a5274d9 100644
--- a/xen/arch/x86/include/asm/alternative-call.h
+++ b/xen/arch/x86/include/asm/alternative-call.h
@@ -2,7 +2,8 @@
 #ifndef X86_ALTERNATIVE_CALL_H
 #define X86_ALTERNATIVE_CALL_H
 
-#include 
+#include 
+#include 
 
 /* Simply the relative position of the source call. */
 struct alt_call {
@@ -86,8 +87,10 @@ struct alt_call {
     rettype ret_;                                                  \
     register unsigned long r10_ asm("r10");                        \
     register unsigned long r11_ asm("r11");                        \
-    asm volatile (ALTERNATIVE("call *%c[addr](%%rip)", "call .",   \
-                              X86_FEATURE_ALWAYS)                  \
+    asm volatile ("1: call *%c[addr](%%rip)\n\t"                   \
+                  ".pushsection .alt_call_sites, \"a\", @progbits\n\t"  \
+                  ".long 1b - .\n\t"                               \
+                  ".popsection"                                    \
                   : ALT_CALL ## n ## _OUT, "=a" (ret_),            \
                     "=r" (r10_), "=r" (r11_) ASM_CALL_CONSTRAINT   \
                   : [addr] "i" (&(func)), "g" (func)               \
-- 
2.39.5



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        Tue, 22 Apr 2025 18:02:54 -0700 (PDT)
From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH 8/8] x86/alternatives: Simplify _apply_alternatives() now altcall is separate
Date: Wed, 23 Apr 2025 02:02:37 +0100
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With altcall handled separately, the special case in _apply_alternatives() is
unused and can be dropped.  The force parameter (used to signify the seal
pass) can be removed too.

In turn, nmi_apply_alternatives() no longer needs to call
_apply_alternatives() on the second pass.

No functional change.

Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
CC: Roger Pau Monné 
---
 xen/arch/x86/alternative.c | 94 ++++----------------------------------
 1 file changed, 10 insertions(+), 84 deletions(-)

diff --git a/xen/arch/x86/alternative.c b/xen/arch/x86/alternative.c
index 047bfc6e424b..43b009888c02 100644
--- a/xen/arch/x86/alternative.c
+++ b/xen/arch/x86/alternative.c
@@ -206,14 +206,9 @@ static void __init seal_endbr64(void)
  * self modifying code. This implies that asymmetric systems where
  * APs have less capabilities than the boot processor are not handled.
  * Tough. Make sure you disable such features by hand.
- *
- * The caller will set the "force" argument to true for the final
- * invocation, such that no CALLs/JMPs to NULL pointers will be left
- * around. See also the further comment below.
  */
 static int init_or_livepatch _apply_alternatives(struct alt_instr *start,
-                                                 struct alt_instr *end,
-                                                 bool force)
+                                                 struct alt_instr *end)
 {
     struct alt_instr *a, *base;
 
@@ -274,10 +269,7 @@ static int init_or_livepatch _apply_alternatives(struct alt_instr *start,
 
         /* Skip patch sites already handled during the first pass. */
         if ( a->priv )
-        {
-            ASSERT(force);
             continue;
-        }
 
         /* If there is no replacement to make, see about optimising the nops. */
         if ( !boot_cpu_has(a->cpuid) )
@@ -301,76 +293,7 @@ static int init_or_livepatch _apply_alternatives(struct alt_instr *start,
 
         /* 0xe8/0xe9 are relative branches; fix the offset. */
         if ( a->repl_len >= 5 && (*buf & 0xfe) == 0xe8 )
-        {
-            /*
-             * Detect the special case of indirect-to-direct branch patching:
-             * - replacement is a direct CALL/JMP (opcodes 0xE8/0xE9; already
-             *   checked above),
-             * - replacement's displacement is -5 (pointing back at the very
-             *   insn, which makes no sense in a real replacement insn),
-             * - original is an indirect CALL/JMP (opcodes 0xFF/2 or 0xFF/4)
-             *   using RIP-relative addressing.
-             * Some branch destinations may still be NULL when we come here
-             * the first time. Defer patching of those until the post-presmp-
-             * initcalls re-invocation (with force set to true). If at that
-             * point the branch destination is still NULL, insert "UD2; UD0"
-             * (for ease of recognition) instead of CALL/JMP.
-             */
-            if ( a->cpuid == X86_FEATURE_ALWAYS &&
-                 *(int32_t *)(buf + 1) == -5 &&
-                 a->orig_len >= 6 &&
-                 orig[0] == 0xff &&
-                 orig[1] == (*buf & 1 ? 0x25 : 0x15) )
-            {
-                long disp = *(int32_t *)(orig + 2);
-                const uint8_t *dest = *(void **)(orig + 6 + disp);
-
-                if ( dest )
-                {
-                    /*
-                     * When building for CET-IBT, all function pointer targets
-                     * should have an endbr64 instruction.
-                     *
-                     * If this is not the case, leave a warning because
-                     * something is probably wrong with the build.  A CET-IBT
-                     * enabled system might have exploded already.
-                     *
-                     * Otherwise, skip the endbr64 instruction.  This is a
-                     * marginal perf improvement which saves on instruction
-                     * decode bandwidth.
-                     */
-                    if ( IS_ENABLED(CONFIG_XEN_IBT) )
-                    {
-                        if ( is_endbr64(dest) )
-                            dest += ENDBR64_LEN;
-                        else
-                            printk(XENLOG_WARNING
-                                   "altcall %ps dest %ps has no endbr64\n",
-                                   orig, dest);
-                    }
-
-                    disp = dest - (orig + 5);
-                    ASSERT(disp == (int32_t)disp);
-                    *(int32_t *)(buf + 1) = disp;
-                }
-                else if ( force )
-                {
-                    buf[0] = 0x0f;
-                    buf[1] = 0x0b;
-                    buf[2] = 0x0f;
-                    buf[3] = 0xff;
-                    buf[4] = 0xff;
-                }
-                else
-                    continue;
-            }
-            else if ( force && system_state < SYS_STATE_active )
-                ASSERT_UNREACHABLE();
-            else
-                *(int32_t *)(buf + 1) += repl - orig;
-        }
-        else if ( force && system_state < SYS_STATE_active  )
-            ASSERT_UNREACHABLE();
+            *(int32_t *)(buf + 1) += repl - orig;
 
         a->priv = 1;
 
@@ -470,7 +393,7 @@ static int init_or_livepatch apply_alt_calls(
 #ifdef CONFIG_LIVEPATCH
 int apply_alternatives(struct alt_instr *start, struct alt_instr *end)
 {
-    return _apply_alternatives(start, end, true);
+    return _apply_alternatives(start, end);
 }
 
 int livepatch_apply_alt_calls(const struct alt_call *start,
@@ -516,10 +439,13 @@ static int __init cf_check nmi_apply_alternatives(
                                  PAGE_HYPERVISOR_RWX);
         flush_local(FLUSH_TLB_GLOBAL);
 
-        rc = _apply_alternatives(__alt_instructions, __alt_instructions_end,
-                                 alt_todo == ALT_CALLS);
-        if ( rc )
-            panic("Unable to apply alternatives: %d\n", rc);
+        if ( alt_todo & ALT_INSNS )
+        {
+            rc = _apply_alternatives(__alt_instructions,
+                                     __alt_instructions_end);
+            if ( rc )
+                panic("Unable to apply alternatives: %d\n", rc);
+        }
 
         if ( alt_todo & ALT_CALLS )
         {
-- 
2.39.5



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From: "Chen, Jiqian" 
To: Jan Beulich 
CC: "Huang, Ray" , Andrew Cooper
	, Anthony PERARD ,
	"Orzel, Michal" , Julien Grall ,
	=?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= , Stefano
 Stabellini , "xen-devel@lists.xenproject.org"
	, "Chen, Jiqian" 
Subject: Re: [PATCH v3 02/11] driver/pci: Get next capability without passing
 caps
Thread-Topic: [PATCH v3 02/11] driver/pci: Get next capability without passing
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Thread-Index: AQHbsoVXQBbkP7I+H0O+xO6/Zu2wRbOv2fGAgAE+FAA=
Date: Wed, 23 Apr 2025 03:13:16 +0000
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References: <20250421061903.1542652-1-Jiqian.Chen@amd.com>
 <20250421061903.1542652-3-Jiqian.Chen@amd.com>
 
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From: "Chen, Jiqian" 
To: Jan Beulich 
CC: =?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= ,
	"xen-devel@lists.xenproject.org" , "Huang,
 Ray" , "Chen, Jiqian" 
Subject: Re: [PATCH v3 03/11] vpci/header: Emulate legacy capability list for
 dom0
Thread-Topic: [PATCH v3 03/11] vpci/header: Emulate legacy capability list for
 dom0
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Date: Wed, 23 Apr 2025 03:31:16 +0000
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References: <20250421061903.1542652-1-Jiqian.Chen@amd.com>
 <20250421061903.1542652-4-Jiqian.Chen@amd.com>
 
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From: "Chen, Jiqian" 
To: Jan Beulich 
CC: "Huang, Ray" , =?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?=
	, Andrew Cooper , Anthony
 PERARD , "Orzel, Michal" ,
	Julien Grall , Stefano Stabellini ,
	"xen-devel@lists.xenproject.org" , "Chen,
 Jiqian" 
Subject: Re: [PATCH v3 05/11] vpci: Refactor REGISTER_VPCI_INIT
Thread-Topic: [PATCH v3 05/11] vpci: Refactor REGISTER_VPCI_INIT
Thread-Index: AQHbsoVaTdJd8UN3wUOnIdqQLAHMILOv2xuAgAFJegA=
Date: Wed, 23 Apr 2025 03:49:37 +0000
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References: <20250421061903.1542652-1-Jiqian.Chen@amd.com>
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To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
From: Jan Beulich 
Subject: [PATCH] x86emul: adjust BSF/BSR behavior as to EFLAGS
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SDM revision 087 points out that apparently as of quite some time ago on
Intel hardware BSF and BSR may alter all arithmetic flags, not just ZF.
Because of the inconsistency (and because documentation doesn't look to
be quite right about PF), best we can do is simply take the flag values
from what the processor produces, just like we do for various other
arithmetic insns. (Note also that AMD and Intel have always been
disagreeing on arithmetic flags other than ZF.)

Signed-off-by: Jan Beulich 
---
Since I happened to look at it, I wonder whether for e.g. SHLD/SHRD we
wouldn't be better off using _emulate_2op_SrcV_nobyte() as well; we
already do so in x86_emul_rmw(), after all.

--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -5268,16 +5268,14 @@ x86_emulate(
         break;
 
     case X86EMUL_OPC(0x0f, 0xbc): /* bsf or tzcnt */
-    {
-        bool zf;
-
-        asm ( "bsf %2,%0" ASM_FLAG_OUT(, "; setz %1")
-              : "=r" (dst.val), ASM_FLAG_OUT("=@ccz", "=qm") (zf)
-              : "rm" (src.val) );
-        _regs.eflags &= ~X86_EFLAGS_ZF;
         if ( (vex.pfx == vex_f3) && vcpu_has_bmi1() )
         {
-            _regs.eflags &= ~X86_EFLAGS_CF;
+            bool zf;
+
+            asm ( "bsf %2,%0" ASM_FLAG_OUT(, "; setz %1")
+                  : "=r" (dst.val), ASM_FLAG_OUT("=@ccz", "=qm") (zf)
+                  : "rm" (src.val) );
+            _regs.eflags &= ~(X86_EFLAGS_ZF | X86_EFLAGS_CF);
             if ( zf )
             {
                 _regs.eflags |= X86_EFLAGS_CF;
@@ -5286,25 +5284,23 @@ x86_emulate(
             else if ( !dst.val )
                 _regs.eflags |= X86_EFLAGS_ZF;
         }
-        else if ( zf )
+        else
         {
-            _regs.eflags |= X86_EFLAGS_ZF;
-            dst.type = OP_NONE;
+            emulate_2op_SrcV_srcmem("bsf", src, dst, _regs.eflags);
+            if ( _regs.eflags & X86_EFLAGS_ZF )
+                dst.type = OP_NONE;
         }
         break;
-    }
 
     case X86EMUL_OPC(0x0f, 0xbd): /* bsr or lzcnt */
-    {
-        bool zf;
-
-        asm ( "bsr %2,%0" ASM_FLAG_OUT(, "; setz %1")
-              : "=r" (dst.val), ASM_FLAG_OUT("=@ccz", "=qm") (zf)
-              : "rm" (src.val) );
-        _regs.eflags &= ~X86_EFLAGS_ZF;
         if ( (vex.pfx == vex_f3) && vcpu_has_lzcnt() )
         {
-            _regs.eflags &= ~X86_EFLAGS_CF;
+            bool zf;
+
+            asm ( "bsr %2,%0" ASM_FLAG_OUT(, "; setz %1")
+                  : "=r" (dst.val), ASM_FLAG_OUT("=@ccz", "=qm") (zf)
+                  : "rm" (src.val) );
+            _regs.eflags &= ~(X86_EFLAGS_ZF | X86_EFLAGS_CF);
             if ( zf )
             {
                 _regs.eflags |= X86_EFLAGS_CF;
@@ -5317,13 +5313,13 @@ x86_emulate(
                     _regs.eflags |= X86_EFLAGS_ZF;
             }
         }
-        else if ( zf )
+        else
         {
-            _regs.eflags |= X86_EFLAGS_ZF;
-            dst.type = OP_NONE;
+            emulate_2op_SrcV_srcmem("bsr", src, dst, _regs.eflags);
+            if ( _regs.eflags & X86_EFLAGS_ZF )
+                dst.type = OP_NONE;
         }
         break;
-    }
 
     case X86EMUL_OPC(0x0f, 0xbe): /* movsx rm8,r{16,32,64} */
         /* Recompute DstReg as we may have decoded AH/BH/CH/DH. */


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To: Stefano Stabellini ,
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 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Bertrand Marquis 
References: <790f9cae9a75b9f29554943c08abb6537647644e.1745364478.git.victorm.lira@amd.com>
 
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On 23.04.2025 01:51, Stefano Stabellini wrote:
> On Tue, 22 Apr 2025, victorm.lira@amd.com wrote:
>> From: Nicola Vetrini 
>>
>> MISRA C Rules 21.1 ("#define and #undef shall not be used on a
>> reserved identifier or reserved macro name") and R21.2 ("A reserved
>> identifier or reserved macro name shall not be declared") violations
>> are not problematic for Xen, as it does not use the C or POSIX
>> libraries.
>>
>> Xen uses -fno-builtin and -nostdinc to ensure this, but there are still
>> __builtin_* functions from the compiler that are available so
>> a deviation is formulated for all identifiers not starting with
>> "__builtin_".
>>
>> The missing text of a deviation for Rule 21.2 is added to
>> docs/misra/deviations.rst.
>>
>> To avoid regressions, tag both rules as clean and add them to the
>> monitored set.
>>
>> Signed-off-by: Nicola Vetrini 
>> Signed-off-by: Federico Serafini 
>> Signed-off-by: Victor Lira 
> 
> This makes sense and it is noncontroversial.
> 
> Reviewed-by: Stefano Stabellini 

This entire series will apparently need re-sending, as the list address
was typo-ed. Patches need to be on the list before going in (with perhaps
the sole exception being XSA fixes).

Jan


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Subject: Re: [PATCH 1/3] misra: add deviation for rules 21.1 and 21.2
To: victorm.lira@amd.com
Cc: Nicola Vetrini ,
 Federico Serafini ,
 Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Bertrand Marquis ,
 "xen-devel@lists.xenproject.org" 
References: <790f9cae9a75b9f29554943c08abb6537647644e.1745364478.git.victorm.lira@amd.com>
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On 23.04.2025 01:43, victorm.lira@amd.com wrote:
> From: Nicola Vetrini 
> 
> MISRA C Rules 21.1 ("#define and #undef shall not be used on a
> reserved identifier or reserved macro name") and R21.2 ("A reserved
> identifier or reserved macro name shall not be declared") violations
> are not problematic for Xen, as it does not use the C or POSIX
> libraries.

In the course of all the Misra discussions it was pointed out more than
once that it's not just the titles which matter, but also the
"Amplification" text. While the latter two of the three bullet points
applying to both rules clearly are library-centric, the first one isn't.
In that light it's entirely unclear to me how ...

> Xen uses -fno-builtin and -nostdinc to ensure this, but there are still
> __builtin_* functions from the compiler that are available so
> a deviation is formulated for all identifiers not starting with
> "__builtin_".
> 
> The missing text of a deviation for Rule 21.2 is added to
> docs/misra/deviations.rst.
> 
> To avoid regressions, tag both rules as clean and add them to the
> monitored set.

... our code base could be anywhere near clean towards these two rules.

(Unlike I would normally do, I'm leaving the entire patch in context, so
on the list - lacking the submission - it'll be visible in its entirety.)

Jan

> Signed-off-by: Nicola Vetrini 
> Signed-off-by: Federico Serafini 
> Signed-off-by: Victor Lira 
> ---
> Cc: Andrew Cooper 
> Cc: Anthony PERARD 
> Cc: Michal Orzel 
> Cc: Jan Beulich 
> Cc: Julien Grall 
> Cc: Roger Pau Monné 
> Cc: Stefano Stabellini 
> Cc: Nicola Vetrini 
> Cc: Federico Serafini 
> Cc: Bertrand Marquis 
> ---
>  .../eclair_analysis/ECLAIR/deviations.ecl     |  9 ++++++-
>  .../eclair_analysis/ECLAIR/monitored.ecl      |  2 ++
>  automation/eclair_analysis/ECLAIR/tagging.ecl |  2 ++
>  docs/misra/deviations.rst                     | 26 ++++++++++++++++++-
>  4 files changed, 37 insertions(+), 2 deletions(-)
> 
> diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/automation/eclair_analysis/ECLAIR/deviations.ecl
> index 2c8fb92713..ffa23b53b7 100644
> --- a/automation/eclair_analysis/ECLAIR/deviations.ecl
> +++ b/automation/eclair_analysis/ECLAIR/deviations.ecl
> @@ -639,8 +639,15 @@ in the expansion."
>  # Series 21.
>  #
> 
> +-doc_begin="Xen does not use C and POSIX libraries:
> +identifiers reserved by these libraries can be used safely, except for those
> +beginning with '__builtin_'."
> +-config=MC3A2.R21.1,macros={safe, "!^__builtin_.*$"}
> +-config=MC3A2.R21.2,declarations={safe, "!^__builtin_.*$"}
> +-doc_end
> +
>  -doc_begin="or, and and xor are reserved identifiers because they constitute alternate
> -spellings for the corresponding operators (they are defined as macros by iso646.h).
> +spellings for the corresponding logical operators (as defined in header 'iso646.h').
>  However, Xen doesn't use standard library headers, so there is no risk of overlap."
>  -config=MC3A2.R21.2,reports+={safe, "any_area(stmt(ref(kind(label)&&^(or|and|xor|not)$)))"}
>  -doc_end
> diff --git a/automation/eclair_analysis/ECLAIR/monitored.ecl b/automation/eclair_analysis/ECLAIR/monitored.ecl
> index 8351996ec8..da229a0d84 100644
> --- a/automation/eclair_analysis/ECLAIR/monitored.ecl
> +++ b/automation/eclair_analysis/ECLAIR/monitored.ecl
> @@ -79,6 +79,8 @@
>  -enable=MC3A2.R20.12
>  -enable=MC3A2.R20.13
>  -enable=MC3A2.R20.14
> +-enable=MC3A2.R21.1
> +-enable=MC3A2.R21.2
>  -enable=MC3A2.R21.3
>  -enable=MC3A2.R21.4
>  -enable=MC3A2.R21.5
> diff --git a/automation/eclair_analysis/ECLAIR/tagging.ecl b/automation/eclair_analysis/ECLAIR/tagging.ecl
> index 1d078d8905..3292bf751e 100644
> --- a/automation/eclair_analysis/ECLAIR/tagging.ecl
> +++ b/automation/eclair_analysis/ECLAIR/tagging.ecl
> @@ -88,6 +88,8 @@ MC3A2.R20.11||
>  MC3A2.R20.12||
>  MC3A2.R20.13||
>  MC3A2.R20.14||
> +MC3A2.R21.1||
> +MC3A2.R21.2||
>  MC3A2.R21.3||
>  MC3A2.R21.4||
>  MC3A2.R21.5||
> diff --git a/docs/misra/deviations.rst b/docs/misra/deviations.rst
> index fe0b1e10a2..d116aca7b9 100644
> --- a/docs/misra/deviations.rst
> +++ b/docs/misra/deviations.rst
> @@ -587,7 +587,31 @@ Deviations related to MISRA C:2012 Rules:
>         construct is deviated only in Translation Units that present a violation
>         of the Rule due to uses of this macro.
>       - Tagged as `deliberate` for ECLAIR.
> -
> +
> +   * - R21.1
> +     - Rule 21.1 reports identifiers reserved for the C and POSIX standard
> +       libraries. Xen does not use such libraries and all translation units
> +       are compiled with option `-nostdinc`, therefore there is no reason to
> +       avoid to use `#define` or `#undef` on such identifiers except for those
> +       beginning with `__builtin_` for which compilers may perform (wrong)
> +       optimizations.
> +     - Tagged as `safe` for ECLAIR.
> +
> +   * - R21.2
> +     - Rule 21.2 reports identifiers reserved for the C and POSIX standard
> +       libraries. Xen does not use such libraries and all translation units
> +       are compiled with option `-nostdinc`, therefore there is no reason to
> +       avoid declaring such identifiers except for those beginning with
> +       `__builtin_` for which compilers may perform (wrong) optimizations.
> +     - Tagged as `safe` for ECLAIR.
> +
> +   * - R21.2
> +     - `or`, `and` and `xor` are reserved identifiers because they constitute
> +       alternate spellings for the corresponding logical operators
> +       (as defined in Standard Library header `\`). Xen does not use
> +       Standard library headers, so there is no risk of overlap.
> +     - Tagged as `safe` for ECLAIR.
> +
>     * - R21.9
>       - Xen does not use the `bsearch` and `qsort` functions provided by the C
>         Standard Library, but provides in source form its own implementation,
> --
> 2.47.0



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Date: Wed, 23 Apr 2025 08:44:50 +0200
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Subject: Re: [PATCH 2/3] misra: add deviation of Rule 5.5
To: victorm.lira@amd.com, Federico Serafini 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Nicola Vetrini ,
 Bertrand Marquis ,
 "xen-devel@lists.xenproject.org" 
References: <790f9cae9a75b9f29554943c08abb6537647644e.1745364478.git.victorm.lira@amd.com>
 <56fb2180c59a9d6bbc7b983dd8bfd6a2122e405c.1745364478.git.victorm.lira@amd.com>
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On 23.04.2025 01:43, victorm.lira@amd.com wrote:
> From: Federico Serafini 
> 
> MISRA C Rule 5.5 states that:
> "Identifiers shall be distinct from macro names".
> 
> A common pattern in Xen is to have a function-like macro that acts as a
> "wrapper" for the function to be called:
> before calling the function, the macro adds additional checks or
> increase/decrease the number of parameters depending on the
> configuration.
> 
> Update ECLAIR configuration and deviations.rst.
> 
> Signed-off-by: Federico Serafini 
> Signed-off-by: Victor Lira 
> ---
> Cc: Andrew Cooper 
> Cc: Anthony PERARD 
> Cc: Michal Orzel 
> Cc: Jan Beulich 
> Cc: Julien Grall 
> Cc: Roger Pau Monné 
> Cc: Stefano Stabellini 
> Cc: Nicola Vetrini 
> Cc: Federico Serafini 
> Cc: Bertrand Marquis 
> ---
>  automation/eclair_analysis/ECLAIR/deviations.ecl | 8 ++++++++
>  docs/misra/deviations.rst                        | 8 ++++++++
>  2 files changed, 16 insertions(+)
> 
> diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/automation/eclair_analysis/ECLAIR/deviations.ecl
> index ffa23b53b7..303b06203a 100644
> --- a/automation/eclair_analysis/ECLAIR/deviations.ecl
> +++ b/automation/eclair_analysis/ECLAIR/deviations.ecl
> @@ -114,6 +114,14 @@ it defines would (in the common case) be already defined. Peer reviewed by the c
>  -config=MC3A2.R5.5,reports+={deliberate, "any_area(decl(kind(function))||any_loc(macro(name(memcpy||memset||memmove))))&&any_area(any_loc(file(^xen/common/libelf/libelf-private\\.h$)))"}
>  -doc_end
> 
> +-doc_begin="Clashes between function-like macros and function names are
> +deliberate since a common pattern in Xen is to have a function-like macro
> +that acts as a \"wrapper\" for the function to be called:
> +before calling the function, the macro adds additional checks or
> +increase/decrease the number of parameters depending on the configuration."
> +-config=MC3A2.R5.5,reports+={deliberate, "all_area(macro(function_like())||decl(kind(function)))"}
> +-doc_end
> +
>  -doc_begin="The type \"ret_t\" is deliberately defined multiple times,
>  depending on the guest."
>  -config=MC3A2.R5.6,reports+={deliberate,"any_area(any_loc(text(^.*ret_t.*$)))"}
> diff --git a/docs/misra/deviations.rst b/docs/misra/deviations.rst
> index d116aca7b9..a93ef1ff44 100644
> --- a/docs/misra/deviations.rst
> +++ b/docs/misra/deviations.rst
> @@ -130,6 +130,14 @@ Deviations related to MISRA C:2012 Rules:
>         memmove.
>       - Tagged as `deliberate` for ECLAIR.
> 
> +   * - R5.5
> +     - Clashes between function-like macros and function names are
> +       deliberate

They may or may not be deliberate, depending on context. I don't think it's a
good move to deviate this more widely than necessary. If I get the expression
above (in deviations.ecl) right, even

void func1(int);
void func2(int);

#define func1() func2(0)
#define func2() func1(0)

would be deviated, which I don't think we want. Especially when, in a less
contrived scenario, the clash may not easily be visible.

Jan

> since a common pattern in Xen is to have a function-like
> +       macro that acts as a "wrapper" for the function to be called:
> +       before calling the function, the macro adds additional checks or
> +       increase/decrease the number of parameters depending on the configuration.
> +     - Tagged as `deliberate` for ECLAIR.
> +
>     * - R5.6
>       - The type ret_t is deliberately defined multiple times depending on the
>         type of guest to service.
> --
> 2.47.0



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Subject: Re: [PATCH 3/3] misra: add deviation of Rule 10.1 for unary minus
To: victorm.lira@amd.com, Nicola Vetrini 
Cc: Federico Serafini ,
 Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Bertrand Marquis ,
 "xen-devel@lists.xenproject.org" 
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On 23.04.2025 01:43, victorm.lira@amd.com wrote:
> From: Nicola Vetrini 
> 
> The unary minus operator applied to an unsigned quantity has
> a semantics (wrap around) that is well-known to all Xen developers.
> Thus, this operation is deemed safe.

Please, as you have it in the other two patches, can the rule title be
reproduced in such patches? As it stands, without mentioning the doc
version either, someone finding this later on may be left with a pretty
wide ambiguity as to what's meant.

> No functional change.
> 
> Signed-off-by: Nicola Vetrini 
> Signed-off-by: Federico Serafini 
> Signed-off-by: Victor Lira 
> ---
> Cc: Andrew Cooper 
> Cc: Anthony PERARD 
> Cc: Michal Orzel 
> Cc: Jan Beulich 
> Cc: Julien Grall 
> Cc: Roger Pau Monné 
> Cc: Stefano Stabellini 
> Cc: Nicola Vetrini 
> Cc: Federico Serafini 
> Cc: Bertrand Marquis 
> ---
>  automation/eclair_analysis/ECLAIR/deviations.ecl | 6 ++++++
>  docs/misra/deviations.rst                        | 6 ++++++
>  2 files changed, 12 insertions(+)
> 
> diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/automation/eclair_analysis/ECLAIR/deviations.ecl
> index 303b06203a..2cfce850bd 100644
> --- a/automation/eclair_analysis/ECLAIR/deviations.ecl
> +++ b/automation/eclair_analysis/ECLAIR/deviations.ecl
> @@ -347,6 +347,12 @@ constant expressions are required.\""
>    "any()"}
>  -doc_end
> 
> +-doc_begin="Unary minus operations on non-negative integers have a semantics (wrap around) that is well-known to all Xen developers."

Why "non-negative"? A variable of type "int" holding a non-negative value is,
aiui, well within the bounds of the rule here. It's unsigned types where the
use of unary minus would constitute a violation. You actually say so ...

> +-config=MC3A2.R10.1,etypes+={safe,
> +  "stmt(node(unary_operator)&&operator(minus))",
> +  "src_expr(definitely_in(0..))"}
> +-doc_end
> +
>  #
>  # Series 11
>  #
> diff --git a/docs/misra/deviations.rst b/docs/misra/deviations.rst
> index a93ef1ff44..8c1f97358a 100644
> --- a/docs/misra/deviations.rst
> +++ b/docs/misra/deviations.rst
> @@ -321,6 +321,12 @@ Deviations related to MISRA C:2012 Rules:
>         If no bits are set, 0 is returned.
>       - Tagged as `safe` for ECLAIR.
> 
> +   * - R10.1
> +     - Applying the unary minus operator to an unsigned quantity has a
> +       semantics (wrap around) that is well-known to all Xen developers.
> +       For this reason, the operation is safe.
> +     - Tagged as `safe` for ECLAIR.

... here, just that this one's getting blurred by using "quantity" when
"type" is meant. Imo we need to be pretty precise here, using terminology
that's used by the standard or the Misra rules, and not anything "coming
close enough" in someone's perception.

Jan


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Subject: Re: [PATCH v2] x86/vmx: Update __vmread() signature
To: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com,
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On 23.04.2025 00:11, dmkhn@proton.me wrote:
> On Tue, Apr 22, 2025 at 09:56:00AM +0200, Jan Beulich wrote:
>> On 22.04.2025 03:15, dmkhn@proton.me wrote:
>>> From: Denis Mukhin 
>>>
>>> Current implementation of __vmread() returns the result via pointer argument
>>> which leads to having excess code in some places.
>>>
>>> Update the signature of __vmread() to return `unsigned long` and drop the
>>> pointer argument as per suggestion in [1].
>>>
>>> Update all call sites everywhere in the VT-x code.
>>
>> You did read Andrew's reply to v1 before posting v2, didn't you?
> 
> I missed to address the function name change request, posted v3:
>   https://lore.kernel.org/xen-devel/20250422215833.522007-1-dmukhin@ford.com/

That was only part of what was asked for. Andrew also gave a pretty clear outline
of how to avoid the need to touch all use sites in one single patch. Plus he
explained why it's better to do this in smaller steps.

Jan


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On 23.04.2025 00:49, dmkhn@proton.me wrote:
> On Tue, Apr 08, 2025 at 05:23:17PM +0200, Jan Beulich wrote:
>> On 01.04.2025 02:52, dmkhn@proton.me wrote:
>>> From: Denis Mukhin 
>>>
>>> Introduce XEN_X86_EMU_BASELINE and XEN_X86_EMU_OPTIONAL to simplify
>>> d->arch.emulation_flags management in the code.
>>
>> If the simplification is limited to ...
>>
>>> --- a/tools/python/xen/lowlevel/xc/xc.c
>>> +++ b/tools/python/xen/lowlevel/xc/xc.c
>>> @@ -159,9 +159,7 @@ static PyObject *pyxc_domain_create(XcObject *self,
>>>
>>>  #if defined (__i386) || defined(__x86_64__)
>>>      if ( config.flags & XEN_DOMCTL_CDF_hvm )
>>> -        config.arch.emulation_flags = XEN_X86_EMU_ALL &
>>> -                                      ~(XEN_X86_EMU_VPCI |
>>> -                                        XEN_X86_EMU_USE_PIRQ);
>>> +        config.arch.emulation_flags = XEN_X86_EMU_BASELINE;
>>>  #elif defined (__arm__) || defined(__aarch64__)
>>>      config.arch.gic_version = XEN_DOMCTL_CONFIG_GIC_NATIVE;
>>>  #else
>>
>> ... just this, I'm not convinced that's worth introducing yet two more items
>> into the namespace.
> 
> Sorry, it took me a while to get back to the series.
> 
> The X86_EMU_BASELINE mask is used in two places: in the toolstack (xc.c) and
> in domain.c, emulation_flags_ok(), so adding a new flag may require updates
> in two places.

Which may be even desirable in this case, so effects can be properly considered
at both sites. I wouldn't take it for given that the two will forever need to
stay in full sync.

Jan


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On 23.04.2025 05:31, Chen, Jiqian wrote:
> On 2025/4/23 00:01, Jan Beulich wrote:
>> On 21.04.2025 08:18, Jiqian Chen wrote:
>>> @@ -759,10 +759,11 @@ static int vpci_init_capability_list(struct pci_dev *pdev)
>>>              PCI_CAP_ID_MSI,
>>>              PCI_CAP_ID_MSIX,
>>>          };
>>> +        const unsigned int *caps = is_hwdom ? NULL : supported_caps;
>>> +        const unsigned int n = is_hwdom ? 0 : ARRAY_SIZE(supported_caps);
>>>  
>>>          next = pci_find_next_cap_ttl(pdev->sbdf, PCI_CAPABILITY_LIST,
>>> -                                     supported_caps,
>>> -                                     ARRAY_SIZE(supported_caps), &ttl);
>>> +                                     caps, n, &ttl);
>>
>> As per the v3 adjustment to patch 02, you can pass supported_caps here in
>> all cases. Only n needs to be zero for the hwdom case.
> Oh, right. I will change in next version.

And, at the risk of stating the obvious, a brief comment might be a good
idea here.

Jan


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Subject: Re: [PATCH v3 05/11] vpci: Refactor REGISTER_VPCI_INIT
To: "Chen, Jiqian" 
Cc: "Huang, Ray" , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
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References: <20250421061903.1542652-1-Jiqian.Chen@amd.com>
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On 23.04.2025 05:49, Chen, Jiqian wrote:
> On 2025/4/23 00:03, Jan Beulich wrote:
>> On 21.04.2025 08:18, Jiqian Chen wrote:
>>> Refactor REGISTER_VPCI_INIT to contain more capability specific
>>> information, this is benifit for follow-on changes to hide capability
>>> which initialization fails.
>>>
>>> What's more, change the definition of init_header() since it is
>>> not a capability and it is needed for all devices' PCI config space.
>>>
>>> Note:
>>> Call vpci_make_msix_hole() in the end of init_msix() since the
>>> change of sequence of init_header() and init_msix().
>>> The fini hook will be implemented in follow-on changes.
>>>
>>> Signed-off-by: Jiqian Chen 
>>
>> From the description I can't derive the need for ...
>>
>>> --- a/xen/include/xen/xen.lds.h
>>> +++ b/xen/include/xen/xen.lds.h
>>> @@ -187,7 +187,7 @@
>>>  #define VPCI_ARRAY               \
>>>         . = ALIGN(POINTER_ALIGN); \
>>>         __start_vpci_array = .;   \
>>> -       *(SORT(.data.vpci.*))     \
>>> +       *(.data.vpci.*)     \
>>>         __end_vpci_array = .;
>>>  #else
>>>  #define VPCI_ARRAY
>>
>> ... this change.
> As I understand this, this is used for initializing all capabilities according to priority before.
> That is msix > header > other capabilities.
> My patch removes the priority and initializing all capabilities doesn't depend on priority anymore.
> So I think this is not needed anymore.

Perhaps, but the word "priority" doesn't even appear in the description. So
yes, ...

> Do you mean I should add some explanation in the commit message?

... there's something to add there. But there's also the question of why the
change doesn't go further: With the SORT() dropped, what's the trailing .*
in the section name for? That's apparently connected to the puzzling

+  static vpci_capability_t *const x##_entry  \
+               __used_section(".data.vpci.") = &(x##_t)

What's the trailing dot for here?

(As a nit - I also don't see why x##_t would need parenthesizing when
x##_entry doesn't. Is there another Misra gem which makes this necessary?)

Jan


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On 4/22/2025 2:28 AM, Juergen Gross wrote:
> 
> I have worked rather hard to make it less intrusive, especially by removing
> the paravirt specific code patching (now all done via alternative patching)
> and by removing 32-bit Xen PV mode.

I looked at the optimization, and it is a nice improvement.


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Subject: Re: [PATCH 1/8] x86/altcall: Split alternative-call.h out of
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To: Andrew Cooper 
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On 23.04.2025 03:02, Andrew Cooper wrote:
> ... in preparation for changing how they're implemented.
> 
> Update the MISRA deviations with the new path.
> 
> No functional change.
> 
> Signed-off-by: Andrew Cooper 

Acked-by: Jan Beulich 




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Subject: Re: [PATCH 2/8] x86/altcall: Rename alternative_branches() to
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To: Andrew Cooper 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 23.04.2025 03:02, Andrew Cooper wrote:
> The alternatives APIs are not great; rename alternative_branches() to be more
> precise.  Centralise the declaration in xen/alternative-call.h, in the
> expectation that x86 won't be the only user in the long term.
> 
> No functional change.
> 
> Signed-off-by: Andrew Cooper 

Acked-by: Jan Beulich 




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Subject: Re: [PATCH 3/8] x86/alternatives: Rework information passing into
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To: Andrew Cooper 
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On 23.04.2025 03:02, Andrew Cooper wrote:
> nmi_apply_alternatives() is soon going to need to dispatch to multiple
> functions, and a force parameter is not a good way of passing information.
> 
> Introduce ALT_INSNS and ALT_CALLS to pass in at the top level to select the
> operation(s) desired.  They represent what will happen when we've separated
> the altcalls out of the general alternative instructions infrastructure,
> although in the short term we still need to synthesise the force parameter for
> _apply_alternatives().
> 
> Move two externs to reduce their scope a little.
> 
> No functional change.
> 
> Signed-off-by: Andrew Cooper 

Reviewed-by: Jan Beulich 




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Subject: Re: [PATCH 4/8] x86/alternatives: Factor seal_endbr64() out of
 _apply_alternatives()
To: Andrew Cooper 
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On 23.04.2025 03:02, Andrew Cooper wrote:
> We are going to need to reposition the call in a change with several moving
> parts.
> 
> No functional change.
> 
> Signed-off-by: Andrew Cooper 

Acked-by: Jan Beulich 




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Date: Wed, 23 Apr 2025 10:16:26 +0200
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Subject: Re: [PATCH 5/8] x86/altcall: Introduce new simpler scheme
To: Andrew Cooper 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Xen-devel 
References: <20250423010237.1528582-1-andrew.cooper3@citrix.com>
 <20250423010237.1528582-6-andrew.cooper3@citrix.com>
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On 23.04.2025 03:02, Andrew Cooper wrote:
> Encoding altcalls as regular alternatives leads to an unreasonable amount of
> complexity in _apply_alternatives().
> 
> Introduce apply_alt_calls(), and an .alt_call_sites section which simply
> tracks the source address (relative, to save on space).  That's literally all
> that is needed in order to devirtualise the function pointers.
> 
> apply_alt_calls() is mostly as per _apply_alternatives(), except the size is
> known to be 6 bytes.  Drop the logic for JMP *RIPREL, as there's no support
> for tailcall optimisations, nor a feasbile plan on how to introduce support.
> Pad with a redundant prefix to avoid needing a separate NOP on the end.
> 
> Wire it up in nmi_apply_alternatives(), although the section is empty at this
> juncture so nothing happens in practice.
> 
> Signed-off-by: Andrew Cooper 

Reviewed-by: Jan Beulich 

> Finding a 6-byte UD instruction that is distinct from ud2 turns out to be
> quite challengning.  The easy way involves a length changing prefix, which is
> best avoided.  Suggestions for alternative patterns welcome.

(Intel syntax, sorry.)

	ud0	edi, [edi+edi-1]
	ud1	edi, [edi+edi-1]

	ud0	edi, cs:[rdi+rdi-1]
	ud1	edi, cs:[rdi+rdi-1]

Jan


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From: "Chen, Jiqian" 
To: Jan Beulich 
CC: =?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= , Andrew Cooper
	, Anthony PERARD ,
	"Orzel, Michal" , Julien Grall ,
	Stefano Stabellini , "xen-devel@lists.xenproject.org"
	, "Huang, Ray" , "Chen,
 Jiqian" 
Subject: Re: [PATCH v3 05/11] vpci: Refactor REGISTER_VPCI_INIT
Thread-Topic: [PATCH v3 05/11] vpci: Refactor REGISTER_VPCI_INIT
Thread-Index: AQHbsoVaTdJd8UN3wUOnIdqQLAHMILOv2xuAgAFJegD//7tXgIAAj7oA
Date: Wed, 23 Apr 2025 08:17:08 +0000
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References: <20250421061903.1542652-1-Jiqian.Chen@amd.com>
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On 23.04.2025 03:02, Andrew Cooper wrote:
> The new altcall scheme uses an .alt_call_sites section.  Wire this up in very
> much the same way as the .altinstructions section, although there is less
> sanity checking necessary.
> 
> Signed-off-by: Andrew Cooper 

Reviewed-by: Jan Beulich 




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Date: Wed, 23 Apr 2025 10:21:30 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: Andrew Cooper ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH v3 2/4] x86/hvm: fix handling of accesses to partial r/o
 MMIO pages
Message-ID: 
References: <20250417152514.13702-1-roger.pau@citrix.com>
 <20250417152514.13702-3-roger.pau@citrix.com>
 
 
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On Tue, Apr 22, 2025 at 08:46:13AM +0200, Jan Beulich wrote:
> On 17.04.2025 18:23, Roger Pau Monné wrote:
> > On Thu, Apr 17, 2025 at 05:38:54PM +0200, Jan Beulich wrote:
> >> On 17.04.2025 17:25, Roger Pau Monne wrote:
> >>> --- /dev/null
> >>> +++ b/xen/arch/x86/hvm/mmio.c
> >>> @@ -0,0 +1,125 @@
> >>> +/* SPDX-License-Identifier: GPL-2.0-only */
> >>> +/*
> >>> + * MMIO related routines.
> >>> + *
> >>> + * Copyright (c) 2025 Cloud Software Group
> >>> + */
> >>> +
> >>> +#include 
> >>> +#include 
> >>> +
> >>> +#include 
> >>> +
> >>> +static int cf_check subpage_mmio_accept(struct vcpu *v, unsigned long addr)
> >>> +{
> >>> +    p2m_type_t t;
> >>> +    mfn_t mfn = get_gfn_query_unlocked(v->domain, PFN_DOWN(addr), &t);
> >>> +
> >>> +    return !mfn_eq(mfn, INVALID_MFN) && t == p2m_mmio_direct &&
> >>> +           subpage_mmio_find_page(mfn);
> >>> +}
> >>> +
> >>> +/*
> >>> + * The guest has read access to those regions, and consequently read accesses
> >>> + * shouldn't fault.  However read-modify-write operations may take this path,
> >>> + * so handling of reads is necessary.
> >>> + */
> >>> +static int cf_check subpage_mmio_read(
> >>> +    struct vcpu *v, unsigned long addr, unsigned int len, unsigned long *data)
> >>> +{
> >>> +    struct domain *d = v->domain;
> >>> +    unsigned long gfn = PFN_DOWN(addr);
> >>> +    p2m_type_t t;
> >>> +    mfn_t mfn;
> >>> +    struct subpage_ro_range *entry;
> >>> +    volatile void __iomem *mem;
> >>> +
> >>> +    *data = ~0UL;
> >>> +
> >>> +    if ( !IS_ALIGNED(len | addr, len) )
> >>
> >> What's the point of doing the | ? len can't be misaligned with itself?
> > 
> > Hm, it's the same form that's used in mmio_ro_emulated_write(), I
> > assumed it was to catch illegal access lengths, like 3.
> 
> Oh, I see. But that's not using IS_ALIGNED(), and imo validly so, despite the
> apparent open-coding. IS_ALIGNED() requires the 2nd argument to be a power of
> two. The combined check there is folding the power-of-2 one with the is-
> aligned one.

Do you think it's worth keeping those checks then?  I could do:

if ( len & (len - 1) || len > 8 || !IS_ALIGNED(addr, len) )

As a possibly more complete and easier to parse check?

Thanks, Roger.


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Subject: Re: [PATCH v3 2/4] x86/hvm: fix handling of accesses to partial r/o
 MMIO pages
To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
Cc: Andrew Cooper , xen-devel@lists.xenproject.org
References: <20250417152514.13702-1-roger.pau@citrix.com>
 <20250417152514.13702-3-roger.pau@citrix.com>
 
 
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On 23.04.2025 10:21, Roger Pau Monné wrote:
> On Tue, Apr 22, 2025 at 08:46:13AM +0200, Jan Beulich wrote:
>> On 17.04.2025 18:23, Roger Pau Monné wrote:
>>> On Thu, Apr 17, 2025 at 05:38:54PM +0200, Jan Beulich wrote:
>>>> On 17.04.2025 17:25, Roger Pau Monne wrote:
>>>>> --- /dev/null
>>>>> +++ b/xen/arch/x86/hvm/mmio.c
>>>>> @@ -0,0 +1,125 @@
>>>>> +/* SPDX-License-Identifier: GPL-2.0-only */
>>>>> +/*
>>>>> + * MMIO related routines.
>>>>> + *
>>>>> + * Copyright (c) 2025 Cloud Software Group
>>>>> + */
>>>>> +
>>>>> +#include 
>>>>> +#include 
>>>>> +
>>>>> +#include 
>>>>> +
>>>>> +static int cf_check subpage_mmio_accept(struct vcpu *v, unsigned long addr)
>>>>> +{
>>>>> +    p2m_type_t t;
>>>>> +    mfn_t mfn = get_gfn_query_unlocked(v->domain, PFN_DOWN(addr), &t);
>>>>> +
>>>>> +    return !mfn_eq(mfn, INVALID_MFN) && t == p2m_mmio_direct &&
>>>>> +           subpage_mmio_find_page(mfn);
>>>>> +}
>>>>> +
>>>>> +/*
>>>>> + * The guest has read access to those regions, and consequently read accesses
>>>>> + * shouldn't fault.  However read-modify-write operations may take this path,
>>>>> + * so handling of reads is necessary.
>>>>> + */
>>>>> +static int cf_check subpage_mmio_read(
>>>>> +    struct vcpu *v, unsigned long addr, unsigned int len, unsigned long *data)
>>>>> +{
>>>>> +    struct domain *d = v->domain;
>>>>> +    unsigned long gfn = PFN_DOWN(addr);
>>>>> +    p2m_type_t t;
>>>>> +    mfn_t mfn;
>>>>> +    struct subpage_ro_range *entry;
>>>>> +    volatile void __iomem *mem;
>>>>> +
>>>>> +    *data = ~0UL;
>>>>> +
>>>>> +    if ( !IS_ALIGNED(len | addr, len) )
>>>>
>>>> What's the point of doing the | ? len can't be misaligned with itself?
>>>
>>> Hm, it's the same form that's used in mmio_ro_emulated_write(), I
>>> assumed it was to catch illegal access lengths, like 3.
>>
>> Oh, I see. But that's not using IS_ALIGNED(), and imo validly so, despite the
>> apparent open-coding. IS_ALIGNED() requires the 2nd argument to be a power of
>> two. The combined check there is folding the power-of-2 one with the is-
>> aligned one.
> 
> Do you think it's worth keeping those checks then?

Yes, I think we should be as strict as possible in what we (try to) emulate.

>  I could do:
> 
> if ( len & (len - 1) || len > 8 || !IS_ALIGNED(addr, len) )
> 
> As a possibly more complete and easier to parse check?

If you dislike the form mmio_ro_emulated_write() uses, sure. However, you
will want to check len to be non-zero, while I'm unsure you need to check
len > 8 - mmio_ro_emulated_write() doesn't have such. Albeit - perhaps
wrongly so; we'd end at the ASSERT_UNREACHABLE() in
subpage_mmio_write_emulate() if a wider store was used. I guess I ought to
make a patch there, and you want to keep the "len > 8".

Jan


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 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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From: Jan Beulich 
Subject: [PATCH] x86: constrain sub-page access length in
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Without doing so we could trigger the ASSERT_UNREACHABLE() in
subpage_mmio_write_emulate(). A comment there actually says this
validation would already have been done ...

Fixes: 8847d6e23f97 ("x86/mm: add API for marking only part of a MMIO page read only")
Signed-off-by: Jan Beulich 
---
Alternatively we could drop comment and assertion from
subpage_mmio_write_emulate().

--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -5195,8 +5195,9 @@ int cf_check mmio_ro_emulated_write(
         return X86EMUL_UNHANDLEABLE;
     }
 
-    subpage_mmio_write_emulate(mmio_ro_ctxt->mfn, PAGE_OFFSET(offset),
-                               p_data, bytes);
+    if ( bytes <= 8 )
+        subpage_mmio_write_emulate(mmio_ro_ctxt->mfn, PAGE_OFFSET(offset),
+                                   p_data, bytes);
 
     return X86EMUL_OKAY;
 }


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Subject: Re: [PATCH] x86/intel: workaround several MONITOR/MWAIT errata
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References: <20250417161913.14661-1-roger.pau@citrix.com>
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On Tue, Apr 22, 2025 at 10:26:37AM +0200, Jan Beulich wrote:
> On 17.04.2025 18:19, Roger Pau Monne wrote:
> > @@ -380,6 +380,43 @@ static void probe_c3_errata(const struct cpuinfo_x86 *c)
> >      }
> >  }
> >  
> > +/*
> > + * APL30: One use of the MONITOR/MWAIT instruction pair is to allow a logical
> > + * processor to wait in a sleep state until a store to the armed address range
> > + * occurs. Due to this erratum, stores to the armed address range may not
> > + * trigger MWAIT to resume execution.
> > + *
> > + * ICX143: Under complex microarchitectural conditions, a monitor that is armed
> > + * with the MWAIT instruction may not be triggered, leading to a processor
> > + * hang.
> > + *
> > + * LNL030: Problem P-cores may not exit power state Core C6 on monitor hit.
> 
> I didn't manage to spot all three spec updates; none of these have a ucode fix,
> hence permitting the workaround to be avoided?
> 
> Since CPX is 3rd Gen Xeon Scalable just like ICX is, I'm surprised that one's
> unaffected. The most recent spec update there is a year old than ICX'es, so
> may simply be too old to include the erratum?
> 
> Sunny Cove is used by further Icelake models - they're known to be unaffected?

FWIW, client IceLake also seems to be unaffected, so I don't really
know.  So far I've only found this issue in the ICX spec update.  The
fix for Linux limits this further to model 106 only.

> > + * Force the sending of an IPI in those cases.
> > + */
> > +static void probe_mwait_errata(void)
> > +{
> > +    static const struct x86_cpu_id models[] = {
> > +        /* Apollo Lake */
> > +        INTEL_FAM6_MODEL(0x5C),
> > +        /* Ice Lake */
> > +        INTEL_FAM6_MODEL(0x6A),
> > +        INTEL_FAM6_MODEL(0x6C),
> > +        /* Lunar Lake */
> > +        INTEL_FAM6_MODEL(0xBD),
> 
> Use identifiers from intel-family.h here?

Sure.

> > +        { }
> > +    };
> > +#undef INTEL_FAM6_MODEL
> > +
> > +    if ( boot_cpu_has(X86_FEATURE_MONITOR) && !force_mwait_ipi_wakeup &&
> > +         x86_match_cpu(models) )
> > +    {
> > +        printk(XENLOG_WARNING
> > +               "Forcing IPI MWAIT wakeup due to CPU erratum\n");
> > +        force_mwait_ipi_wakeup = true;
> > +    }
> > +}
> 
> Do we really need to cater for asymmetric systems? IOW can't we do this once
> on the BSP? Otherwise - why the use of boot_cpu_has() here? Oh, wait ...
> 
> > @@ -406,6 +443,8 @@ static void Intel_errata_workarounds(struct cpuinfo_x86 *c)
> >  		__set_bit(X86_FEATURE_CLFLUSH_MONITOR, c->x86_capability);
> >  
> >  	probe_c3_errata(c);
> > +	if (c == &boot_cpu_data)
> > +		probe_mwait_errata();
> >  }
> 
> ..., you do this for the BSP only. Then why's the function not __init and
> the global variable not __ro_after_init (and models[] __initconst)?
> 
> (Later) Except that this path is also taken for S3 resume, from
> recheck_cpu_features(). This shouldn't alter the variable value anymore,
> though. A disagreement ought to result in recheck_cpu_features() to
> report failure. (Imo perhaps better to avoid the call above during resume.)

I did consider to limit the call based on system_state, wasn't sure
whether that would be more churn than help.

LNL030 has a reference to: "It may be possible for the BIOS to contain
a workaround for this erratum." so wasn't fully sure we wouldn't need
to check for this in all cores if there's some firmware fix for it
that Xen could identify.

Thanks, Roger.


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Date: Wed, 23 Apr 2025 10:52:18 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: Andrew Cooper ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH v3 2/4] x86/hvm: fix handling of accesses to partial r/o
 MMIO pages
Message-ID: 
References: <20250417152514.13702-1-roger.pau@citrix.com>
 <20250417152514.13702-3-roger.pau@citrix.com>
 
 
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On Wed, Apr 23, 2025 at 10:32:33AM +0200, Jan Beulich wrote:
> On 23.04.2025 10:21, Roger Pau Monné wrote:
> > On Tue, Apr 22, 2025 at 08:46:13AM +0200, Jan Beulich wrote:
> >> On 17.04.2025 18:23, Roger Pau Monné wrote:
> >>> On Thu, Apr 17, 2025 at 05:38:54PM +0200, Jan Beulich wrote:
> >>>> On 17.04.2025 17:25, Roger Pau Monne wrote:
> >>>>> --- /dev/null
> >>>>> +++ b/xen/arch/x86/hvm/mmio.c
> >>>>> @@ -0,0 +1,125 @@
> >>>>> +/* SPDX-License-Identifier: GPL-2.0-only */
> >>>>> +/*
> >>>>> + * MMIO related routines.
> >>>>> + *
> >>>>> + * Copyright (c) 2025 Cloud Software Group
> >>>>> + */
> >>>>> +
> >>>>> +#include 
> >>>>> +#include 
> >>>>> +
> >>>>> +#include 
> >>>>> +
> >>>>> +static int cf_check subpage_mmio_accept(struct vcpu *v, unsigned long addr)
> >>>>> +{
> >>>>> +    p2m_type_t t;
> >>>>> +    mfn_t mfn = get_gfn_query_unlocked(v->domain, PFN_DOWN(addr), &t);
> >>>>> +
> >>>>> +    return !mfn_eq(mfn, INVALID_MFN) && t == p2m_mmio_direct &&
> >>>>> +           subpage_mmio_find_page(mfn);
> >>>>> +}
> >>>>> +
> >>>>> +/*
> >>>>> + * The guest has read access to those regions, and consequently read accesses
> >>>>> + * shouldn't fault.  However read-modify-write operations may take this path,
> >>>>> + * so handling of reads is necessary.
> >>>>> + */
> >>>>> +static int cf_check subpage_mmio_read(
> >>>>> +    struct vcpu *v, unsigned long addr, unsigned int len, unsigned long *data)
> >>>>> +{
> >>>>> +    struct domain *d = v->domain;
> >>>>> +    unsigned long gfn = PFN_DOWN(addr);
> >>>>> +    p2m_type_t t;
> >>>>> +    mfn_t mfn;
> >>>>> +    struct subpage_ro_range *entry;
> >>>>> +    volatile void __iomem *mem;
> >>>>> +
> >>>>> +    *data = ~0UL;
> >>>>> +
> >>>>> +    if ( !IS_ALIGNED(len | addr, len) )
> >>>>
> >>>> What's the point of doing the | ? len can't be misaligned with itself?
> >>>
> >>> Hm, it's the same form that's used in mmio_ro_emulated_write(), I
> >>> assumed it was to catch illegal access lengths, like 3.
> >>
> >> Oh, I see. But that's not using IS_ALIGNED(), and imo validly so, despite the
> >> apparent open-coding. IS_ALIGNED() requires the 2nd argument to be a power of
> >> two. The combined check there is folding the power-of-2 one with the is-
> >> aligned one.
> > 
> > Do you think it's worth keeping those checks then?
> 
> Yes, I think we should be as strict as possible in what we (try to) emulate.
> 
> >  I could do:
> > 
> > if ( len & (len - 1) || len > 8 || !IS_ALIGNED(addr, len) )
> > 
> > As a possibly more complete and easier to parse check?
> 
> If you dislike the form mmio_ro_emulated_write() uses, sure. However, you
> will want to check len to be non-zero, while I'm unsure you need to check
> len > 8 - mmio_ro_emulated_write() doesn't have such. Albeit - perhaps
> wrongly so; we'd end at the ASSERT_UNREACHABLE() in
> subpage_mmio_write_emulate() if a wider store was used. I guess I ought to
> make a patch there, and you want to keep the "len > 8".

OK, let me send v4 with those adjustments then.

Thanks, Roger.


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On 4/22/2025 2:57 AM, Jürgen Groß wrote:
> On 22.04.25 10:22, Xin Li (Intel) wrote:
>> The story started from tglx's reply in [1]:
>>
>>    For actual performance relevant code the current PV ops mechanics
>>    are a horrorshow when the op defaults to the native instruction.
>>
>>    look at wrmsrl():
>>
>>    wrmsrl(msr, val
>>     wrmsr(msr, (u32)val, (u32)val >> 32))
>>      paravirt_write_msr(msr, low, high)
>>        PVOP_VCALL3(cpu.write_msr, msr, low, high)
>>
>>    Which results in
>>
>>     mov    $msr, %edi
>>     mov    $val, %rdx
>>     mov    %edx, %esi
>>     shr    $0x20, %rdx
>>     call    native_write_msr
>>
>>    and native_write_msr() does at minimum:
>>
>>     mov    %edi,%ecx
>>     mov    %esi,%eax
>>     wrmsr
>>     ret
>>
>>    In the worst case 'ret' is going through the return thunk. Not to
>>    talk about function prologues and whatever.
>>
>>    This becomes even more silly for trivial instructions like STI/CLI
>>    or in the worst case paravirt_nop().
> 
> This is nonsense.
> 
> In the non-Xen case the initial indirect call is directly replaced with
> STI/CLI via alternative patching, while for Xen it is replaced by a direct
> call.
> 
> The paravirt_nop() case is handled in alt_replace_call() by replacing the
> indirect call with a nop in case the target of the call was paravirt_nop()
> (which is in fact no_func()).
> 
>>
>>    The call makes only sense, when the native default is an actual
>>    function, but for the trivial cases it's a blatant engineering
>>    trainwreck.
> 
> The trivial cases are all handled as stated above: a direct replacement
> instruction is placed at the indirect call position.

The above comment was given in 2023 IIRC, and you have addressed it.

> 
>> Later a consensus was reached to utilize the alternatives mechanism to
>> eliminate the indirect call overhead introduced by the pv_ops APIs:
>>
>>      1) When built with !CONFIG_XEN_PV, X86_FEATURE_XENPV becomes a
>>         disabled feature, preventing the Xen code from being built
>>         and ensuring the native code is executed unconditionally.
> 
> This is the case today already. There is no need for any change to have
> this in place.
> 
>>
>>      2) When built with CONFIG_XEN_PV:
>>
>>         2.1) If not running on the Xen hypervisor (!X86_FEATURE_XENPV),
>>              the kernel runtime binary is patched to unconditionally
>>              jump to the native MSR write code.
>>
>>         2.2) If running on the Xen hypervisor (X86_FEATURE_XENPV), the
>>              kernel runtime binary is patched to unconditionally jump
>>              to the Xen MSR write code.
> 
> I can't see what is different here compared to today's state.
> 
>>
>> The alternatives mechanism is also used to choose the new immediate
>> form MSR write instruction when it's available.
> 
> Yes, this needs to be added.
> 
>> Consequently, remove the pv_ops MSR write APIs and the Xen callbacks.
> 
> I still don't see a major difference to today's solution.

The existing code generates:

     ...
     bf e0 06 00 00          mov    $0x6e0,%edi
     89 d6                   mov    %edx,%esi
     48 c1 ea 20             shr    $0x20,%rdx
     ff 15 07 48 8c 01       call   *0x18c4807(%rip)  # 
     31 c0                   xor    %eax,%eax
     ...

And on native, the indirect call instruction is patched to a direct call
as you mentioned:

     ...
     bf e0 06 00 00          mov    $0x6e0,%edi
     89 d6                   mov    %edx,%esi
     48 c1 ea 20             shr    $0x20,%rdx
     e8 60 3e 01 00          call   <{native,xen}_write_msr> # direct
     90                      nop
     31 c0                   xor    %eax,%eax
     ...


This patch set generates assembly w/o CALL on native:

     ...
     e9 e6 22 c6 01          jmp    1f   # on native or nop on Xen
     b9 e0 06 00 00          mov    $0x6e0,%ecx
     e8 91 d4 fa ff          call   ffffffff8134ee80 
     e9 a4 9f eb 00          jmp    ffffffff8225b9a0 <__x86_return_thunk>
         ...
1:  b9 e0 06 00 00          mov    $0x6e0,%ecx   # immediate form here
     48 89 c2                mov    %rax,%rdx
     48 c1 ea 20             shr    $0x20,%rdx
     3e 0f 30                ds wrmsr
     ...

It's not a major change, but when it is patched to use the immediate 
form MSR write instruction, it's straightforwardly streamlined.

> 
> Only the "paravirt" term has been eliminated.

Yes.

But a PV guest doesn't operate at the highest privilege level, which
means MSR instructions typically result in a #GP fault.  I actually 
think the pv_ops MSR APIs are unnecessary because of this inherent
limitation.

Looking at the Xen MSR code, except PMU and just a few MSRs, it falls
back to executes native MSR instructions.  As MSR instructions trigger
#GP, Xen takes control and handles them in 2 ways:

   1) emulate (or ignore) a MSR operation and skip the guest instruction.

   2) inject the #GP back to guest OS and let its #GP handler handle it.
      But Linux MSR exception handler just ignores the MSR instruction
      (MCE MSR exception will panic).

So why not let Xen handle all the details which it already tries to do?
(Linux w/ such a change may not be able to run on old Xen hypervisors.)

BTW, if performance is a concern, writes to MSR_KERNEL_GS_BASE and
MSR_GS_BASE anyway are hpyercalls into Xen.

Thanks!
     Xin


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Subject: Re: [PATCH] x86/intel: workaround several MONITOR/MWAIT errata
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On 23.04.2025 10:45, Roger Pau Monné wrote:
> On Tue, Apr 22, 2025 at 10:26:37AM +0200, Jan Beulich wrote:
>> On 17.04.2025 18:19, Roger Pau Monne wrote:
>>> @@ -380,6 +380,43 @@ static void probe_c3_errata(const struct cpuinfo_x86 *c)
>>>      }
>>>  }
>>>  
>>> +/*
>>> + * APL30: One use of the MONITOR/MWAIT instruction pair is to allow a logical
>>> + * processor to wait in a sleep state until a store to the armed address range
>>> + * occurs. Due to this erratum, stores to the armed address range may not
>>> + * trigger MWAIT to resume execution.
>>> + *
>>> + * ICX143: Under complex microarchitectural conditions, a monitor that is armed
>>> + * with the MWAIT instruction may not be triggered, leading to a processor
>>> + * hang.
>>> + *
>>> + * LNL030: Problem P-cores may not exit power state Core C6 on monitor hit.
>>
>> I didn't manage to spot all three spec updates; none of these have a ucode fix,
>> hence permitting the workaround to be avoided?
>>
>> Since CPX is 3rd Gen Xeon Scalable just like ICX is, I'm surprised that one's
>> unaffected. The most recent spec update there is a year old than ICX'es, so
>> may simply be too old to include the erratum?
>>
>> Sunny Cove is used by further Icelake models - they're known to be unaffected?
> 
> FWIW, client IceLake also seems to be unaffected, so I don't really
> know.  So far I've only found this issue in the ICX spec update.  The
> fix for Linux limits this further to model 106 only.
> 
>>> + * Force the sending of an IPI in those cases.
>>> + */
>>> +static void probe_mwait_errata(void)
>>> +{
>>> +    static const struct x86_cpu_id models[] = {
>>> +        /* Apollo Lake */
>>> +        INTEL_FAM6_MODEL(0x5C),
>>> +        /* Ice Lake */
>>> +        INTEL_FAM6_MODEL(0x6A),
>>> +        INTEL_FAM6_MODEL(0x6C),
>>> +        /* Lunar Lake */
>>> +        INTEL_FAM6_MODEL(0xBD),
>>
>> Use identifiers from intel-family.h here?
> 
> Sure.
> 
>>> +        { }
>>> +    };
>>> +#undef INTEL_FAM6_MODEL
>>> +
>>> +    if ( boot_cpu_has(X86_FEATURE_MONITOR) && !force_mwait_ipi_wakeup &&
>>> +         x86_match_cpu(models) )
>>> +    {
>>> +        printk(XENLOG_WARNING
>>> +               "Forcing IPI MWAIT wakeup due to CPU erratum\n");
>>> +        force_mwait_ipi_wakeup = true;
>>> +    }
>>> +}
>>
>> Do we really need to cater for asymmetric systems? IOW can't we do this once
>> on the BSP? Otherwise - why the use of boot_cpu_has() here? Oh, wait ...
>>
>>> @@ -406,6 +443,8 @@ static void Intel_errata_workarounds(struct cpuinfo_x86 *c)
>>>  		__set_bit(X86_FEATURE_CLFLUSH_MONITOR, c->x86_capability);
>>>  
>>>  	probe_c3_errata(c);
>>> +	if (c == &boot_cpu_data)
>>> +		probe_mwait_errata();
>>>  }
>>
>> ..., you do this for the BSP only. Then why's the function not __init and
>> the global variable not __ro_after_init (and models[] __initconst)?
>>
>> (Later) Except that this path is also taken for S3 resume, from
>> recheck_cpu_features(). This shouldn't alter the variable value anymore,
>> though. A disagreement ought to result in recheck_cpu_features() to
>> report failure. (Imo perhaps better to avoid the call above during resume.)
> 
> I did consider to limit the call based on system_state, wasn't sure
> whether that would be more churn than help.

The fundamental expectation is that such aspects don't changes across
S3. I'd suggest to add the extra check, but I wouldn't insist; what I'd
like to see is the variable becoming __ro_after_init, though (whichever
way this is being arranged for).

> LNL030 has a reference to: "It may be possible for the BIOS to contain
> a workaround for this erratum." so wasn't fully sure we wouldn't need
> to check for this in all cores if there's some firmware fix for it
> that Xen could identify.

Usually this means a ucode update (occasionally it may also be a chipset
config that firmware can fiddle with), in which case we wouldn't
normally (i.e. unless in critical situations) add a workaround at all.

Jan


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Subject: Re: [PATCH 7/8] x86/altcall: Switch to simpler scheme
To: Andrew Cooper 
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On 23.04.2025 03:02, Andrew Cooper wrote:
> --- a/xen/arch/x86/alternative.c
> +++ b/xen/arch/x86/alternative.c
> @@ -378,13 +378,6 @@ static int init_or_livepatch _apply_alternatives(struct alt_instr *start,
>          text_poke(orig, buf, total_len);
>      }
>  
> -    /*
> -     * Clobber endbr64 instructions now that altcall has finished optimising
> -     * all indirect branches to direct ones.
> -     */
> -    if ( force && system_state < SYS_STATE_active )
> -        seal_endbr64();
> -
>      return 0;
>  }
>  
> @@ -533,6 +526,8 @@ static int __init cf_check nmi_apply_alternatives(
>              rc = apply_alt_calls(__alt_call_sites_start, __alt_call_sites_end);
>              if ( rc )
>                  panic("Unable to apply alternative calls: %d\n", rc);
> +
> +            seal_endbr64();
>          }

Are you deliberately losing the comment? Other than this:
Reviewed-by: Jan Beulich 

Jan


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Subject: Re: [PATCH 8/8] x86/alternatives: Simplify _apply_alternatives() now
 altcall is separate
To: Andrew Cooper 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Xen-devel 
References: <20250423010237.1528582-1-andrew.cooper3@citrix.com>
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On 23.04.2025 03:02, Andrew Cooper wrote:
> With altcall handled separately, the special case in _apply_alternatives() is
> unused and can be dropped.  The force parameter (used to signify the seal
> pass) can be removed too.
> 
> In turn, nmi_apply_alternatives() no longer needs to call
> _apply_alternatives() on the second pass.
> 
> No functional change.
> 
> Signed-off-by: Andrew Cooper 

Reviewed-by: Jan Beulich 




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On 4/22/2025 4:12 AM, Jürgen Groß wrote:
>> +
>> +static __always_inline bool __rdmsrq(u32 msr, u64 *val, int type)
>> +{
>> +    bool ret;
>> +
>> +#ifdef CONFIG_XEN_PV
>> +    if (cpu_feature_enabled(X86_FEATURE_XENPV))
>> +        return __xenpv_rdmsrq(msr, val, type);
> 
> I don't think this will work for the Xen PV case.

Well, I have been testing the code on xen-4.17 coming with Ubuntu
24.04.2 LTS :)

> 
> X86_FEATURE_XENPV is set only after the first MSR is being read.

No matter whether the code works or not, good catch!

> 
> This can be fixed by setting the feature earlier, but it shows that the
> paravirt feature has its benefits in such cases.

See my other reply to let Xen handle all the details.

Plus the code actually works, I would actually argue the opposite :-P





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Date: Wed, 23 Apr 2025 11:07:44 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: "xen-devel@lists.xenproject.org" ,
	Andrew Cooper ,
	Marek Marczykowski 
Subject: Re: [PATCH] x86: constrain sub-page access length in
 mmio_ro_emulated_write()
Message-ID: 
References: <570ad3f2-7f3b-4579-a000-c85d27e8bf77@suse.com>
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In-Reply-To: <570ad3f2-7f3b-4579-a000-c85d27e8bf77@suse.com>

On Wed, Apr 23, 2025 at 10:43:56AM +0200, Jan Beulich wrote:
> Without doing so we could trigger the ASSERT_UNREACHABLE() in
> subpage_mmio_write_emulate(). A comment there actually says this
> validation would already have been done ...
> 
> Fixes: 8847d6e23f97 ("x86/mm: add API for marking only part of a MMIO page read only")
> Signed-off-by: Jan Beulich 
> ---
> Alternatively we could drop comment and assertion from
> subpage_mmio_write_emulate().

I think I prefer this as it fits better with my patch to unify the
open-coded MMIO accessors, which does have an ASSERT_UNREACHABLE() for
unhandled sizes.  The return there is anyway too late IMO, as we have
possibly already mapped the page when there's no need for it.

> --- a/xen/arch/x86/mm.c
> +++ b/xen/arch/x86/mm.c
> @@ -5195,8 +5195,9 @@ int cf_check mmio_ro_emulated_write(
>          return X86EMUL_UNHANDLEABLE;
>      }
>  
> -    subpage_mmio_write_emulate(mmio_ro_ctxt->mfn, PAGE_OFFSET(offset),
> -                               p_data, bytes);
> +    if ( bytes <= 8 )
> +        subpage_mmio_write_emulate(mmio_ro_ctxt->mfn, PAGE_OFFSET(offset),
> +                                   p_data, bytes);

Should we print a debug message here saying the write is possibly
unhandled due to the access size if subpage r/o is enabled?

You might want to re-use the subpage_ro_active() I introduce to limit
the printing of the message.

Thanks, Roger.


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Subject: Re: [PATCH 7/8] x86/altcall: Switch to simpler scheme
To: Jan Beulich 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Xen-devel 
References: <20250423010237.1528582-1-andrew.cooper3@citrix.com>
 <20250423010237.1528582-8-andrew.cooper3@citrix.com>
 
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On 23/04/2025 10:01 am, Jan Beulich wrote:
> On 23.04.2025 03:02, Andrew Cooper wrote:
>> --- a/xen/arch/x86/alternative.c
>> +++ b/xen/arch/x86/alternative.c
>> @@ -378,13 +378,6 @@ static int init_or_livepatch _apply_alternatives(struct alt_instr *start,
>>          text_poke(orig, buf, total_len);
>>      }
>>  
>> -    /*
>> -     * Clobber endbr64 instructions now that altcall has finished optimising
>> -     * all indirect branches to direct ones.
>> -     */
>> -    if ( force && system_state < SYS_STATE_active )
>> -        seal_endbr64();
>> -
>>      return 0;
>>  }
>>  
>> @@ -533,6 +526,8 @@ static int __init cf_check nmi_apply_alternatives(
>>              rc = apply_alt_calls(__alt_call_sites_start, __alt_call_sites_end);
>>              if ( rc )
>>                  panic("Unable to apply alternative calls: %d\n", rc);
>> +
>> +            seal_endbr64();
>>          }
> Are you deliberately losing the comment?

Yes, counterbalancing the comment gained in patch 4.

>  Other than this:
> Reviewed-by: Jan Beulich 

Thanks,

~Andrew


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Subject: Re: [RFC PATCH v2 10/34] x86/msr: Convert __rdmsr() uses to
 native_rdmsrq() uses
To: Sean Christopherson 
Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org,
        tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
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        boris.ostrovsky@oracle.com, kys@microsoft.com, haiyangz@microsoft.com,
        decui@microsoft.com
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-11-xin@zytor.com> 
Content-Language: en-US
From: Xin Li 
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On 4/22/2025 8:09 AM, Sean Christopherson wrote:
> On Tue, Apr 22, 2025, Xin Li (Intel) wrote:
>> __rdmsr() is the lowest level primitive MSR read API, and its direct
>> use is NOT preferred.
> 
> Doesn't mean it's wrong.

I wouldn't go so far as to claim that it's wrong :-)

>> Use its wrapper function native_rdmsrq() instead.

The current code exhibits a somewhat haphazard use of MSR APIs, so I
wanted to clarify which API to employ in specific situations with
verbose function naming.

Here is an example that Boris had to fix the use of MSR APIs:

https://web.git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=f980f9c31a923e9040dee0bc679a5f5b09e61f40

> 
> ...
> 
>> diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
>> index 1547bfacd40f..e73c1d5ba6c4 100644
>> --- a/arch/x86/kvm/vmx/vmx.c
>> +++ b/arch/x86/kvm/vmx/vmx.c
>> @@ -380,7 +380,7 @@ static __always_inline void vmx_disable_fb_clear(struct vcpu_vmx *vmx)
>>   	if (!vmx->disable_fb_clear)
>>   		return;
>>   
>> -	msr = __rdmsr(MSR_IA32_MCU_OPT_CTRL);
>> +	msr = native_rdmsrq(MSR_IA32_MCU_OPT_CTRL);
>>   	msr |= FB_CLEAR_DIS;
>>   	native_wrmsrq(MSR_IA32_MCU_OPT_CTRL, msr);
>>   	/* Cache the MSR value to avoid reading it later */
>> @@ -7307,7 +7307,7 @@ void noinstr vmx_spec_ctrl_restore_host(struct vcpu_vmx *vmx,
>>   		return;
>>   
>>   	if (flags & VMX_RUN_SAVE_SPEC_CTRL)
>> -		vmx->spec_ctrl = __rdmsr(MSR_IA32_SPEC_CTRL);
>> +		vmx->spec_ctrl = native_rdmsrq(MSR_IA32_SPEC_CTRL);
> 
> And what guarantees that native_rdmsrq() won't have tracing?  Ugh, a later patch
> renames native_rdmsrq() => native_rdmsrq_no_trace().
> 
> I really don't like this.  It makes simple and obvious code:
> 
> 	vmx->spec_ctrl = __rdmsr(MSR_IA32_SPEC_CTRL);
> 
> so much harder to read:
> 
> 	vmx->spec_ctrl = native_rdmsrq_no_trace(MSR_IA32_SPEC_CTRL);
> 
> and does so in a way that is difficult to review, e.g. I have to peek ahead to
> understand that this is even ok.
> 
> I strongly prefer that we find a way to not require such verbose APIs, especially
> if KVM ends up using native variants throughout.  Xen PV is supposed to be the
> odd one out, yet native code is what suffers.  Blech.

Will try to figure out how to name the APIs.

One reason I chose verbose names is that short names are in use and
renaming needs to touch a lot of files (and not fun at all).

Thanks!
     Xin



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Subject: Re: [PATCH] x86emul: adjust BSF/BSR behavior as to EFLAGS
To: Jan Beulich ,
 "xen-devel@lists.xenproject.org" 
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On 23/04/2025 7:13 am, Jan Beulich wrote:
> SDM revision 087 points out that apparently as of quite some time ago on
> Intel hardware BSF and BSR may alter all arithmetic flags, not just ZF.
> Because of the inconsistency (and because documentation doesn't look to
> be quite right about PF), best we can do is simply take the flag values
> from what the processor produces, just like we do for various other
> arithmetic insns. (Note also that AMD and Intel have always been
> disagreeing on arithmetic flags other than ZF.)

The new footnote Intel have added about "older processors" does match
AMD, saying "unmodified".

I think it's clear now that Intel and AMD behaviour was the same
originally, except AMD wrote "unmodified" and Intel wrote "undefined",
and Intel used this flexibility to alter the behaviour.

>
> Signed-off-by: Jan Beulich 
> ---
> Since I happened to look at it, I wonder whether for e.g. SHLD/SHRD we
> wouldn't be better off using _emulate_2op_SrcV_nobyte() as well; we
> already do so in x86_emul_rmw(), after all.

Probably a good move.

>
> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
> @@ -5268,16 +5268,14 @@ x86_emulate(
>          break;
>  
>      case X86EMUL_OPC(0x0f, 0xbc): /* bsf or tzcnt */
> -    {
> -        bool zf;
> -
> -        asm ( "bsf %2,%0" ASM_FLAG_OUT(, "; setz %1")
> -              : "=r" (dst.val), ASM_FLAG_OUT("=@ccz", "=qm") (zf)
> -              : "rm" (src.val) );
> -        _regs.eflags &= ~X86_EFLAGS_ZF;
>          if ( (vex.pfx == vex_f3) && vcpu_has_bmi1() )
>          {
> -            _regs.eflags &= ~X86_EFLAGS_CF;
> +            bool zf;
> +
> +            asm ( "bsf %2,%0" ASM_FLAG_OUT(, "; setz %1")
> +                  : "=r" (dst.val), ASM_FLAG_OUT("=@ccz", "=qm") (zf)
> +                  : "rm" (src.val) );
> +            _regs.eflags &= ~(X86_EFLAGS_ZF | X86_EFLAGS_CF);
>              if ( zf )
>              {
>                  _regs.eflags |= X86_EFLAGS_CF;
> @@ -5286,25 +5284,23 @@ x86_emulate(
>              else if ( !dst.val )
>                  _regs.eflags |= X86_EFLAGS_ZF;
>          }
> -        else if ( zf )
> +        else
>          {
> -            _regs.eflags |= X86_EFLAGS_ZF;
> -            dst.type = OP_NONE;
> +            emulate_2op_SrcV_srcmem("bsf", src, dst, _regs.eflags);
> +            if ( _regs.eflags & X86_EFLAGS_ZF )
> +                dst.type = OP_NONE;

On Intel, BSF/BSR writes back the destination register.  Notably, it
gets 0 extended per normal rules, which is why you have to be extra
careful when using the trick of preloading it with -1; the result must
be interpreted as (int) even over a 64bit operation.

This needs an amd_like() qualification to override dst.type.  This
aspect genuinely is different between them.  Alternatively, we might be
able to set the operand size always to 64 and write back the entire
register as the processor gave to us, but I'm not sure if that will have
effects elsewhere.

Finally, I'm wary leaving TZCNT/LZCNT using the old logic.  Despite the
absence of an update in 087, I find it unlikely that they behave
differently WRT flags (specifically, I severely doubt they've got
differing circuitry).

I'd suggest giving them the same fully-emulated treatment as BSF/BSR.

~Andrew


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From: Mykyta Poturai 
To: "xen-devel@lists.xenproject.org" 
CC: Oleksandr Andrushchenko , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Michal Orzel ,
	Volodymyr Babchuk , Mykyta Poturai
	
Subject: [PATCH v4 4/4] xen/arm: add support for R-Car Gen4 PCI host
 controller
Thread-Topic: [PATCH v4 4/4] xen/arm: add support for R-Car Gen4 PCI host
 controller
Thread-Index: AQHbtD/+f1IljlTzAkG+gkmGFEbJEA==
Date: Wed, 23 Apr 2025 11:08:08 +0000
Message-ID:
 <98c8e00a77800e8b1163ab1efa9a60f1bced0fb9.1745402473.git.mykyta_poturai@epam.com>
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From: Oleksandr Andrushchenko 

Add support for Renesas R-Car Gen4 PCI host controller, specifically
targeting the S4 and V4H SoCs. The implementation includes configuration
read/write operations for both root and child buses. For accessing the
child bus, iATU is used for address translation.

Code common to all DesignWare PCI host controllers is located in a
separate file to allow for easy reuse in other DesignWare-based PCI
host controllers.

Signed-off-by: Oleksandr Andrushchenko 
Signed-off-by: Mykyta Poturai 
---
v3->v4:
* no changes

v2->v3:
* move priv allocation to dw_pcie_host_probe

v1->v2:
* move designware code in a separate file
---
 xen/arch/arm/pci/Makefile         |   2 +
 xen/arch/arm/pci/pci-designware.c | 403 ++++++++++++++++++++++++++++++
 xen/arch/arm/pci/pci-designware.h | 102 ++++++++
 xen/arch/arm/pci/pci-host-rcar4.c | 103 ++++++++
 4 files changed, 610 insertions(+)
 create mode 100644 xen/arch/arm/pci/pci-designware.c
 create mode 100644 xen/arch/arm/pci/pci-designware.h
 create mode 100644 xen/arch/arm/pci/pci-host-rcar4.c

diff --git a/xen/arch/arm/pci/Makefile b/xen/arch/arm/pci/Makefile
index 1d045ade01..ca6135e282 100644
--- a/xen/arch/arm/pci/Makefile
+++ b/xen/arch/arm/pci/Makefile
@@ -4,3 +4,5 @@ obj-y +=3D pci-host-generic.o
 obj-y +=3D pci-host-common.o
 obj-y +=3D ecam.o
 obj-y +=3D pci-host-zynqmp.o
+obj-y +=3D pci-designware.o
+obj-y +=3D pci-host-rcar4.o
diff --git a/xen/arch/arm/pci/pci-designware.c b/xen/arch/arm/pci/pci-desig=
nware.c
new file mode 100644
index 0000000000..dcbd07ced3
--- /dev/null
+++ b/xen/arch/arm/pci/pci-designware.c
@@ -0,0 +1,403 @@
+/*
+ * Based on Linux drivers/pci/controller/pci-host-common.c
+ * Based on Linux drivers/pci/controller/pci-host-generic.c
+ * Based on xen/arch/arm/pci/pci-host-generic.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ */
+
+#include 
+#include 
+
+#include "pci-designware.h"
+/**
+ * upper_32_bits - return bits 32-63 of a number
+ * @n: the number we're accessing
+ *
+ * A basic shift-right of a 64- or 32-bit quantity.  Use this to suppress
+ * the "right shift count >=3D width of type" warning when that quantity i=
s
+ * 32-bits.
+ */
+#define upper_32_bits(n) ((uint32_t)(((n) >> 16) >> 16))
+
+/**
+ * lower_32_bits - return bits 0-31 of a number
+ * @n: the number we're accessing
+ */
+#define lower_32_bits(n) ((uint32_t)((n) & 0xffffffff))
+
+static int dw_pcie_read(void __iomem *addr, int size, uint32_t *val)
+{
+    if ( !IS_ALIGNED((uintptr_t)addr, size) )
+    {
+        *val =3D 0;
+        return PCIBIOS_BAD_REGISTER_NUMBER;
+    }
+
+    if ( size =3D=3D 4 )
+        *val =3D readl(addr);
+    else if ( size =3D=3D 2 )
+        *val =3D readw(addr);
+    else if ( size =3D=3D 1 )
+        *val =3D readb(addr);
+    else
+    {
+        *val =3D 0;
+        return PCIBIOS_BAD_REGISTER_NUMBER;
+    }
+
+    return PCIBIOS_SUCCESSFUL;
+}
+
+static int dw_pcie_write(void __iomem *addr, int size, uint32_t val)
+{
+    if ( !IS_ALIGNED((uintptr_t)addr, size) )
+        return PCIBIOS_BAD_REGISTER_NUMBER;
+
+    if ( size =3D=3D 4 )
+        writel(val, addr);
+    else if ( size =3D=3D 2 )
+        writew(val, addr);
+    else if ( size =3D=3D 1 )
+        writeb(val, addr);
+    else
+        return PCIBIOS_BAD_REGISTER_NUMBER;
+
+    return PCIBIOS_SUCCESSFUL;
+}
+
+static uint32_t dw_pcie_read_dbi(struct pci_host_bridge *bridge, uint32_t =
reg,
+                                 size_t size)
+{
+    void __iomem *addr =3D bridge->cfg->win + reg;
+    uint32_t val;
+
+    dw_pcie_read(addr, size, &val);
+    return val;
+}
+
+static void dw_pcie_write_dbi(struct pci_host_bridge *bridge, uint32_t reg=
,
+                              size_t size, uint32_t val)
+{
+    void __iomem *addr =3D bridge->cfg->win + reg;
+
+    dw_pcie_write(addr, size, val);
+}
+
+static uint32_t dw_pcie_readl_dbi(struct pci_host_bridge *bridge, uint32_t=
 reg)
+{
+    return dw_pcie_read_dbi(bridge, reg, sizeof(uint32_t));
+}
+
+static void dw_pcie_writel_dbi(struct pci_host_bridge *pci, uint32_t reg,
+                               uint32_t val)
+{
+    dw_pcie_write_dbi(pci, reg, sizeof(uint32_t), val);
+}
+
+static void dw_pcie_read_iatu_unroll_enabled(struct pci_host_bridge *bridg=
e)
+{
+    struct dw_pcie_priv *priv =3D bridge->priv;
+    uint32_t val;
+
+    val =3D dw_pcie_readl_dbi(bridge, PCIE_ATU_VIEWPORT);
+    if ( val =3D=3D 0xffffffff )
+        priv->iatu_unroll_enabled =3D true;
+
+    printk(XENLOG_DEBUG "%s iATU unroll: %sabled\n",
+           dt_node_full_name(bridge->dt_node),
+           priv->iatu_unroll_enabled ? "en" : "dis");
+}
+
+static uint32_t dw_pcie_readl_atu(struct pci_host_bridge *pci, uint32_t re=
g)
+{
+    struct dw_pcie_priv *priv =3D pci->priv;
+    int ret;
+    uint32_t val;
+
+    ret =3D dw_pcie_read(priv->atu_base + reg, 4, &val);
+    if ( ret )
+        printk(XENLOG_ERR "Read ATU address failed\n");
+
+    return val;
+}
+
+static void dw_pcie_writel_atu(struct pci_host_bridge *pci, uint32_t reg,
+                               uint32_t val)
+{
+    struct dw_pcie_priv *priv =3D pci->priv;
+    int ret;
+
+    ret =3D dw_pcie_write(priv->atu_base + reg, 4, val);
+    if ( ret )
+        printk(XENLOG_ERR "Write ATU address failed\n");
+}
+
+static uint32_t dw_pcie_readl_ob_unroll(struct pci_host_bridge *pci,
+                                        uint32_t index, uint32_t reg)
+{
+    uint32_t offset =3D PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(index);
+
+    return dw_pcie_readl_atu(pci, offset + reg);
+}
+
+static void dw_pcie_writel_ob_unroll(struct pci_host_bridge *pci,
+                                     uint32_t index, uint32_t reg, uint32_=
t val)
+{
+    uint32_t offset =3D PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(index);
+
+    dw_pcie_writel_atu(pci, offset + reg, val);
+}
+
+static uint32_t dw_pcie_enable_ecrc(uint32_t val)
+{
+    ASSERT_UNREACHABLE();
+    return 0;
+}
+
+static void dw_pcie_prog_outbound_atu_unroll(struct pci_host_bridge *pci,
+                                             uint8_t func_no, int index,
+                                             int type, uint64_t cpu_addr,
+                                             uint64_t pci_addr, uint64_t s=
ize)
+{
+    struct dw_pcie_priv *priv =3D pci->priv;
+    uint32_t retries, val;
+    uint64_t limit_addr =3D cpu_addr + size - 1;
+
+    dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_LOWER_BASE,
+                             lower_32_bits(cpu_addr));
+    dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_UPPER_BASE,
+                             upper_32_bits(cpu_addr));
+    dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_LOWER_LIMIT,
+                             lower_32_bits(limit_addr));
+    dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_UPPER_LIMIT,
+                             upper_32_bits(limit_addr));
+    dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_LOWER_TARGET,
+                             lower_32_bits(pci_addr));
+    dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_UPPER_TARGET,
+                             upper_32_bits(pci_addr));
+    val =3D type | PCIE_ATU_FUNC_NUM(func_no);
+    val =3D upper_32_bits(size - 1) ? val | PCIE_ATU_INCREASE_REGION_SIZE =
: val;
+    if ( priv->version =3D=3D 0x490A )
+        val =3D dw_pcie_enable_ecrc(val);
+    dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_REGION_CTRL1, val);
+    dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_REGION_CTRL2,
+                             PCIE_ATU_ENABLE);
+
+    /*
+     * Make sure ATU enable takes effect before any subsequent config
+     * and I/O accesses.
+     */
+    for ( retries =3D 0; retries < LINK_WAIT_MAX_IATU_RETRIES; retries++ )
+    {
+        val =3D dw_pcie_readl_ob_unroll(pci, index, PCIE_ATU_UNR_REGION_CT=
RL2);
+        if ( val & PCIE_ATU_ENABLE )
+            return;
+
+        mdelay(LINK_WAIT_IATU);
+    }
+    printk(XENLOG_ERR "Outbound iATU is not being enabled\n");
+}
+
+static void __dw_pcie_prog_outbound_atu(struct pci_host_bridge *pci,
+                                        uint8_t func_no, int index, int ty=
pe,
+                                        uint64_t cpu_addr, uint64_t pci_ad=
dr,
+                                        uint64_t size)
+{
+    struct dw_pcie_priv *priv =3D pci->priv;
+    uint32_t retries, val;
+
+    if ( priv->iatu_unroll_enabled )
+    {
+        dw_pcie_prog_outbound_atu_unroll(pci, func_no, index, type, cpu_ad=
dr,
+                                         pci_addr, size);
+        return;
+    }
+
+    dw_pcie_writel_dbi(pci, PCIE_ATU_VIEWPORT,
+                       PCIE_ATU_REGION_OUTBOUND | index);
+    dw_pcie_writel_dbi(pci, PCIE_ATU_LOWER_BASE, lower_32_bits(cpu_addr));
+    dw_pcie_writel_dbi(pci, PCIE_ATU_UPPER_BASE, upper_32_bits(cpu_addr));
+    dw_pcie_writel_dbi(pci, PCIE_ATU_LIMIT, lower_32_bits(cpu_addr + size =
- 1));
+    if ( priv->version >=3D 0x460A )
+        dw_pcie_writel_dbi(pci, PCIE_ATU_UPPER_LIMIT,
+                           upper_32_bits(cpu_addr + size - 1));
+    dw_pcie_writel_dbi(pci, PCIE_ATU_LOWER_TARGET, lower_32_bits(pci_addr)=
);
+    dw_pcie_writel_dbi(pci, PCIE_ATU_UPPER_TARGET, upper_32_bits(pci_addr)=
);
+    val =3D type | PCIE_ATU_FUNC_NUM(func_no);
+    val =3D ((upper_32_bits(size - 1)) && (priv->version >=3D 0x460A))
+              ? val | PCIE_ATU_INCREASE_REGION_SIZE
+              : val;
+    if ( priv->version =3D=3D 0x490A )
+        val =3D dw_pcie_enable_ecrc(val);
+    dw_pcie_writel_dbi(pci, PCIE_ATU_CR1, val);
+    dw_pcie_writel_dbi(pci, PCIE_ATU_CR2, PCIE_ATU_ENABLE);
+
+    /*
+     * Make sure ATU enable takes effect before any subsequent config
+     * and I/O accesses.
+     */
+    for ( retries =3D 0; retries < LINK_WAIT_MAX_IATU_RETRIES; retries++ )
+    {
+        val =3D dw_pcie_readl_dbi(pci, PCIE_ATU_CR2);
+        if ( val & PCIE_ATU_ENABLE )
+            return;
+
+        mdelay(LINK_WAIT_IATU);
+    }
+    printk(XENLOG_ERR "Outbound iATU is not being enabled\n");
+}
+
+static void dw_pcie_prog_outbound_atu(struct pci_host_bridge *pci, int ind=
ex,
+                                      int type, uint64_t cpu_addr,
+                                      uint64_t pci_addr, uint64_t size)
+{
+    __dw_pcie_prog_outbound_atu(pci, 0, index, type, cpu_addr, pci_addr, s=
ize);
+}
+
+void dw_pcie_set_version(struct pci_host_bridge *bridge, unsigned int vers=
ion)
+{
+    struct dw_pcie_priv *priv =3D bridge->priv;
+
+    priv->version =3D version;
+}
+
+void __iomem *dw_pcie_child_map_bus(struct pci_host_bridge *bridge,
+                                    pci_sbdf_t sbdf, uint32_t where)
+{
+    uint32_t busdev;
+
+    busdev =3D PCIE_ATU_BUS(sbdf.bus) | PCIE_ATU_DEV(PCI_SLOT(sbdf.devfn))=
 |
+             PCIE_ATU_FUNC(PCI_FUNC(sbdf.devfn));
+
+    /* FIXME: Parent is the root bus, so use PCIE_ATU_TYPE_CFG0. */
+    dw_pcie_prog_outbound_atu(bridge, PCIE_ATU_REGION_INDEX1,
+                              PCIE_ATU_TYPE_CFG0, bridge->child_cfg->phys_=
addr,
+                              busdev, bridge->child_cfg->size);
+
+    return bridge->child_cfg->win + where;
+}
+
+int dw_pcie_child_config_read(struct pci_host_bridge *bridge, pci_sbdf_t s=
bdf,
+                              uint32_t reg, uint32_t len, uint32_t *value)
+{
+    struct dw_pcie_priv *priv =3D bridge->priv;
+    int ret;
+
+    /*
+     * FIXME: we cannot read iATU settings at the early initialization
+     * (probe) as the host's HW is not yet initialized at that phase.
+     * This read operation is the very first thing Domain-0 will do
+     * during its initialization, so take this opportunity and read
+     * iATU setting now.
+     */
+    if ( unlikely(!priv->iatu_unroll_initilized) )
+    {
+        dw_pcie_read_iatu_unroll_enabled(bridge);
+        priv->iatu_unroll_initilized =3D true;
+    }
+
+    ret =3D pci_generic_config_read(bridge, sbdf, reg, len, value);
+    if ( !ret && (priv->num_viewport <=3D 2) )
+        dw_pcie_prog_outbound_atu(bridge, PCIE_ATU_REGION_INDEX1,
+                                  PCIE_ATU_TYPE_IO,
+                                  bridge->child_cfg->phys_addr, 0,
+                                  bridge->child_cfg->size);
+
+    return ret;
+}
+
+int dw_pcie_child_config_write(struct pci_host_bridge *bridge, pci_sbdf_t =
sbdf,
+                               uint32_t reg, uint32_t len, uint32_t value)
+{
+    struct dw_pcie_priv *priv =3D bridge->priv;
+    int ret;
+
+    ret =3D pci_generic_config_write(bridge, sbdf, reg, len, value);
+    if ( !ret && (priv->num_viewport <=3D 2) )
+        dw_pcie_prog_outbound_atu(bridge, PCIE_ATU_REGION_INDEX1,
+                                  PCIE_ATU_TYPE_IO,
+                                  bridge->child_cfg->phys_addr, 0,
+                                  bridge->child_cfg->size);
+    return ret;
+}
+
+bool __init dw_pcie_child_need_p2m_hwdom_mapping(struct domain *d,
+                                                 struct pci_host_bridge *b=
ridge,
+                                                 uint64_t addr)
+{
+    struct pci_config_window *cfg =3D bridge->child_cfg;
+
+    /*
+     * We do not want ECAM address space to be mapped in Domain-0's p2m,
+     * so we can trap access to it.
+     */
+    return cfg->phys_addr !=3D addr;
+}
+
+struct pci_host_bridge *__init
+dw_pcie_host_probe(struct dt_device_node *dev, const void *data,
+                   const struct pci_ecam_ops *ops,
+                   const struct pci_ecam_ops *child_ops)
+{
+    struct pci_host_bridge *bridge;
+    struct dw_pcie_priv *priv;
+
+    paddr_t atu_phys_addr;
+    paddr_t atu_size;
+    int atu_idx, ret;
+
+    bridge =3D pci_host_common_probe(dev, ops, child_ops);
+    if ( IS_ERR(bridge) )
+        return bridge;
+
+    priv =3D xzalloc_bytes(sizeof(struct dw_pcie_priv));
+    if ( !priv )
+        return ERR_PTR(-ENOMEM);
+
+    bridge->priv =3D priv;
+
+    atu_idx =3D dt_property_match_string(dev, "reg-names", "atu");
+    if ( atu_idx < 0 )
+    {
+        printk(XENLOG_ERR "Cannot find \"atu\" range index in device tree\=
n");
+        return ERR_PTR(atu_idx);
+    }
+    ret =3D dt_device_get_address(dev, atu_idx, &atu_phys_addr, &atu_size)=
;
+    if ( ret )
+    {
+        printk(XENLOG_ERR "Cannot find \"atu\" range in device tree\n");
+        return ERR_PTR(ret);
+    }
+    printk("iATU at [mem 0x%" PRIpaddr "-0x%" PRIpaddr "]\n", atu_phys_add=
r,
+           atu_phys_addr + atu_size - 1);
+    priv->atu_base =3D ioremap_nocache(atu_phys_addr, atu_size);
+    if ( !priv->atu_base )
+    {
+        printk(XENLOG_ERR "iATU ioremap failed\n");
+        return ERR_PTR(ENXIO);
+    }
+
+    if ( !dt_property_read_u32(dev, "num-viewport", &priv->num_viewport) )
+        priv->num_viewport =3D 2;
+
+    /*
+     * FIXME: we cannot read iATU unroll enable now as the host bridge's
+     * HW is not yet initialized by Domain-0: leave it for later.
+     */
+
+    printk(XENLOG_INFO "%s number of view ports: %d\n", dt_node_full_name(=
dev),
+           priv->num_viewport);
+
+    return bridge;
+}
diff --git a/xen/arch/arm/pci/pci-designware.h b/xen/arch/arm/pci/pci-desig=
nware.h
new file mode 100644
index 0000000000..a15ba9a329
--- /dev/null
+++ b/xen/arch/arm/pci/pci-designware.h
@@ -0,0 +1,102 @@
+/*
+ * Based on Linux drivers/pci/controller/pci-host-common.c
+ * Based on Linux drivers/pci/controller/pci-host-generic.c
+ * Based on xen/arch/arm/pci/pci-host-generic.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ */
+
+#include 
+#include 
+
+#ifndef __PCI_DESIGNWARE_H__
+#define __PCI_DESIGNWARE_H__
+
+#define PCIBIOS_SUCCESSFUL              0x00
+#define PCIBIOS_BAD_REGISTER_NUMBER     0x87
+
+#define PCIE_ATU_VIEWPORT               0x900
+#define PCIE_ATU_REGION_OUTBOUND        0
+#define PCIE_ATU_CR1                    0x904
+#define PCIE_ATU_INCREASE_REGION_SIZE   BIT(13, UL)
+#define PCIE_ATU_CR2                    0x908
+#define PCIE_ATU_ENABLE                 BIT(31, UL)
+#define PCIE_ATU_LOWER_BASE             0x90C
+#define PCIE_ATU_UPPER_BASE             0x910
+#define PCIE_ATU_LIMIT                  0x914
+#define PCIE_ATU_LOWER_TARGET           0x918
+#define PCIE_ATU_UPPER_TARGET           0x91C
+#define PCIE_ATU_UPPER_LIMIT            0x924
+
+#define PCIE_ATU_REGION_INDEX1  0x1
+#define PCIE_ATU_TYPE_IO        0x2
+#define PCIE_ATU_TYPE_CFG0      0x4
+
+#define FIELD_PREP(_mask, _val) \
+    (((typeof(_mask))(_val) << (ffs64(_mask) - 1)) & (_mask))
+
+#define PCIE_ATU_BUS(x)         FIELD_PREP(GENMASK(31, 24), x)
+#define PCIE_ATU_DEV(x)         FIELD_PREP(GENMASK(23, 19), x)
+#define PCIE_ATU_FUNC(x)        FIELD_PREP(GENMASK(18, 16), x)
+
+/* Register address builder */
+#define PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(region) \
+    ((region) << 9)
+
+/*
+ * iATU Unroll-specific register definitions
+ * From 4.80 core version the address translation will be made by unroll
+ */
+#define PCIE_ATU_UNR_REGION_CTRL1       0x00
+#define PCIE_ATU_UNR_REGION_CTRL2       0x04
+#define PCIE_ATU_UNR_LOWER_BASE         0x08
+#define PCIE_ATU_UNR_UPPER_BASE         0x0C
+#define PCIE_ATU_UNR_LOWER_LIMIT        0x10
+#define PCIE_ATU_UNR_LOWER_TARGET       0x14
+#define PCIE_ATU_UNR_UPPER_TARGET       0x18
+#define PCIE_ATU_UNR_UPPER_LIMIT        0x20
+
+#define PCIE_ATU_FUNC_NUM(pf)           ((pf) << 20)
+
+/* Parameters for the waiting for iATU enabled routine */
+#define LINK_WAIT_MAX_IATU_RETRIES      5
+#define LINK_WAIT_IATU                  9
+
+struct dw_pcie_priv {
+    uint32_t num_viewport;
+    bool iatu_unroll_initilized;
+    bool iatu_unroll_enabled;
+    void __iomem *atu_base;
+    unsigned int version;
+};
+
+void dw_pcie_set_version(struct pci_host_bridge *bridge, unsigned int vers=
ion);
+
+void __iomem *dw_pcie_child_map_bus(struct pci_host_bridge *bridge,
+                                    pci_sbdf_t sbdf, uint32_t where);
+
+int dw_pcie_child_config_read(struct pci_host_bridge *bridge, pci_sbdf_t s=
bdf,
+                              uint32_t reg, uint32_t len, uint32_t *value)=
;
+
+int dw_pcie_child_config_write(struct pci_host_bridge *bridge, pci_sbdf_t =
sbdf,
+                               uint32_t reg, uint32_t len, uint32_t value)=
;
+
+bool __init dw_pcie_child_need_p2m_hwdom_mapping(struct domain *d,
+                                                 struct pci_host_bridge *b=
ridge,
+                                                 uint64_t addr);
+
+struct pci_host_bridge *__init
+dw_pcie_host_probe(struct dt_device_node *dev, const void *data,
+                   const struct pci_ecam_ops *ops,
+                   const struct pci_ecam_ops *child_ops);
+#endif /* __PCI_DESIGNWARE_H__ */
diff --git a/xen/arch/arm/pci/pci-host-rcar4.c b/xen/arch/arm/pci/pci-host-=
rcar4.c
new file mode 100644
index 0000000000..cae1b4254d
--- /dev/null
+++ b/xen/arch/arm/pci/pci-host-rcar4.c
@@ -0,0 +1,103 @@
+/*
+ * Based on Linux drivers/pci/controller/pci-host-common.c
+ * Based on Linux drivers/pci/controller/pci-host-generic.c
+ * Based on xen/arch/arm/pci/pci-host-generic.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ */
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "pci-designware.h"
+
+#define RCAR4_DWC_VERSION       0x520A
+
+/*
+ * PCI host bridges often have different ways to access the root and child
+ * bus config spaces:
+ *   "dbi"   : the aperture where root port's own configuration registers
+ *             are available.
+ *   "config": child's configuration space
+ *   "atu"   : iATU registers for DWC version 4.80 or later
+ */
+static int __init rcar4_cfg_reg_index(struct dt_device_node *np)
+{
+    return dt_property_match_string(np, "reg-names", "dbi");
+}
+
+static int __init rcar4_child_cfg_reg_index(struct dt_device_node *np)
+{
+    return dt_property_match_string(np, "reg-names", "config");
+}
+
+/* ECAM ops */
+const struct pci_ecam_ops rcar4_pcie_ops =3D {
+    .bus_shift  =3D 20,
+    .cfg_reg_index =3D rcar4_cfg_reg_index,
+    .pci_ops    =3D {
+        .map_bus                =3D pci_ecam_map_bus,
+        .read                   =3D pci_generic_config_read,
+        .write                  =3D pci_generic_config_write,
+        .need_p2m_hwdom_mapping =3D pci_ecam_need_p2m_hwdom_mapping,
+    }
+};
+
+const struct pci_ecam_ops rcar4_pcie_child_ops =3D {
+    .bus_shift  =3D 20,
+    .cfg_reg_index =3D rcar4_child_cfg_reg_index,
+    .pci_ops    =3D {
+        .map_bus                =3D dw_pcie_child_map_bus,
+        .read                   =3D dw_pcie_child_config_read,
+        .write                  =3D dw_pcie_child_config_write,
+        .need_p2m_hwdom_mapping =3D dw_pcie_child_need_p2m_hwdom_mapping,
+    }
+};
+
+static const struct dt_device_match __initconstrel rcar4_pcie_dt_match[] =
=3D {
+    { .compatible =3D "renesas,r8a779f0-pcie" },
+    { .compatible =3D "renesas,r8a779g0-pcie" },
+    {},
+};
+
+static int __init pci_host_generic_probe(struct dt_device_node *dev,
+                                         const void *data)
+{
+    struct pci_host_bridge *bridge;
+
+    bridge =3D dw_pcie_host_probe(dev, data, &rcar4_pcie_ops,
+                                &rcar4_pcie_child_ops);
+
+    dw_pcie_set_version(bridge, RCAR4_DWC_VERSION);
+
+    return 0;
+}
+
+DT_DEVICE_START(pci_gen, "PCI HOST R-CAR GEN4", DEVICE_PCI_HOSTBRIDGE)
+.dt_match =3D rcar4_pcie_dt_match,
+.init =3D pci_host_generic_probe,
+DT_DEVICE_END
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * tab-width: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
--=20
2.34.1


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From: Mykyta Poturai 
To: "xen-devel@lists.xenproject.org" 
CC: Oleksandr Andrushchenko , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Michal Orzel ,
	Volodymyr Babchuk , Mykyta Poturai
	
Subject: [PATCH v4 2/4] xen/arm: make pci_host_common_probe return the bridge
Thread-Topic: [PATCH v4 2/4] xen/arm: make pci_host_common_probe return the
 bridge
Thread-Index: AQHbtD/9bY1r1kpO5kCnx2GColGe6g==
Date: Wed, 23 Apr 2025 11:08:07 +0000
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From: Oleksandr Andrushchenko 

Some of the PCI host bridges require additional processing during the
probe phase. For that they need to access struct bridge of the probed
host, so return pointer to the new bridge from pci_host_common_probe.

Signed-off-by: Oleksandr Andrushchenko 
Signed-off-by: Mykyta Poturai 
---
v3->v4:
* change return 0 to return NULL

v2->v3:
* no change

v1->v2:
* no change
---
 xen/arch/arm/include/asm/pci.h      |  5 +++--
 xen/arch/arm/pci/pci-host-common.c  | 12 ++++++------
 xen/arch/arm/pci/pci-host-generic.c |  2 +-
 xen/arch/arm/pci/pci-host-zynqmp.c  |  2 +-
 4 files changed, 11 insertions(+), 10 deletions(-)

diff --git a/xen/arch/arm/include/asm/pci.h b/xen/arch/arm/include/asm/pci.=
h
index a87672d834..3d2ca9b5b0 100644
--- a/xen/arch/arm/include/asm/pci.h
+++ b/xen/arch/arm/include/asm/pci.h
@@ -18,6 +18,7 @@
 #ifdef CONFIG_HAS_PCI
=20
 #include 
+#include 
=20
 #define pci_to_dev(pcidev) (&(pcidev)->arch.dev)
=20
@@ -95,8 +96,8 @@ struct pci_ecam_ops {
 /* Default ECAM ops */
 extern const struct pci_ecam_ops pci_generic_ecam_ops;
=20
-int pci_host_common_probe(struct dt_device_node *dev,
-                          const struct pci_ecam_ops *ops);
+struct pci_host_bridge *pci_host_common_probe(struct dt_device_node *dev,
+                                              const struct pci_ecam_ops *o=
ps);
 int pci_generic_config_read(struct pci_host_bridge *bridge, pci_sbdf_t sbd=
f,
                             uint32_t reg, uint32_t len, uint32_t *value);
 int pci_generic_config_write(struct pci_host_bridge *bridge, pci_sbdf_t sb=
df,
diff --git a/xen/arch/arm/pci/pci-host-common.c b/xen/arch/arm/pci/pci-host=
-common.c
index c0faf0f436..53953d4895 100644
--- a/xen/arch/arm/pci/pci-host-common.c
+++ b/xen/arch/arm/pci/pci-host-common.c
@@ -208,8 +208,8 @@ static int pci_bus_find_domain_nr(struct dt_device_node=
 *dev)
     return domain;
 }
=20
-int pci_host_common_probe(struct dt_device_node *dev,
-                          const struct pci_ecam_ops *ops)
+struct pci_host_bridge *pci_host_common_probe(struct dt_device_node *dev,
+                                              const struct pci_ecam_ops *o=
ps)
 {
     struct pci_host_bridge *bridge;
     struct pci_config_window *cfg;
@@ -217,11 +217,11 @@ int pci_host_common_probe(struct dt_device_node *dev,
     int domain;
=20
     if ( dt_device_for_passthrough(dev) )
-        return 0;
+        return NULL;
=20
     bridge =3D pci_alloc_host_bridge();
     if ( !bridge )
-        return -ENOMEM;
+        return ERR_PTR(-ENOMEM);
=20
     /* Parse and map our Configuration Space windows */
     cfg =3D gen_pci_init(dev, ops);
@@ -244,12 +244,12 @@ int pci_host_common_probe(struct dt_device_node *dev,
     bridge->segment =3D domain;
     pci_add_host_bridge(bridge);
=20
-    return 0;
+    return bridge;
=20
 err_exit:
     xfree(bridge);
=20
-    return err;
+    return ERR_PTR(err);
 }
=20
 /*
diff --git a/xen/arch/arm/pci/pci-host-generic.c b/xen/arch/arm/pci/pci-hos=
t-generic.c
index 46de6e43cc..a6ffbda174 100644
--- a/xen/arch/arm/pci/pci-host-generic.c
+++ b/xen/arch/arm/pci/pci-host-generic.c
@@ -29,7 +29,7 @@ static const struct dt_device_match __initconstrel gen_pc=
i_dt_match[] =3D
 static int __init pci_host_generic_probe(struct dt_device_node *dev,
                                          const void *data)
 {
-    return pci_host_common_probe(dev, &pci_generic_ecam_ops);
+    return PTR_RET(pci_host_common_probe(dev, &pci_generic_ecam_ops));
 }
=20
 DT_DEVICE_START(pci_gen, "PCI HOST GENERIC", DEVICE_PCI_HOSTBRIDGE)
diff --git a/xen/arch/arm/pci/pci-host-zynqmp.c b/xen/arch/arm/pci/pci-host=
-zynqmp.c
index 101edb8593..a38f2e019e 100644
--- a/xen/arch/arm/pci/pci-host-zynqmp.c
+++ b/xen/arch/arm/pci/pci-host-zynqmp.c
@@ -47,7 +47,7 @@ static const struct dt_device_match __initconstrel nwl_pc=
ie_dt_match[] =3D
 static int __init pci_host_generic_probe(struct dt_device_node *dev,
                                          const void *data)
 {
-    return pci_host_common_probe(dev, &nwl_pcie_ops);
+    return PTR_RET(pci_host_common_probe(dev, &nwl_pcie_ops));
 }
=20
 DT_DEVICE_START(pci_gen, "PCI HOST ZYNQMP", DEVICE_PCI_HOSTBRIDGE)
--=20
2.34.1


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To: "xen-devel@lists.xenproject.org" 
CC: Mykyta Poturai , Stefano Stabellini
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	, Michal Orzel , Volodymyr
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Subject: [PATCH v4 0/4] Add support for R-Car Gen4 PCI host controller
Thread-Topic: [PATCH v4 0/4] Add support for R-Car Gen4 PCI host controller
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This series adds support for R-Car Gen4 PCI host controller.

To fully support the controller, the following changes were made:
- Generic mechanism to support PCI child buses is added.
- Private data for PCI host bridge and means to access it are added.

The series was tested as a part of the pci-passthrough patches[1] and
build-tested standalone with enabled HAS_PCI and HAS_VPCI.

[1] https://github.com/Deedone/xen/tree/pci_passthrough_wip

v3->v4:
* rebase
* see individual patches

v2->v3:
* dropped patches related to ATU programming delay
* improved formatting

v1->v2:
* see individual patches

Oleksandr Andrushchenko (4):
  xen/arm: allow PCI host bridge to have private data
  xen/arm: make pci_host_common_probe return the bridge
  xen/arm: add support for PCI child bus
  xen/arm: add support for R-Car Gen4 PCI host controller

 xen/arch/arm/include/asm/pci.h      |  11 +-
 xen/arch/arm/pci/Makefile           |   2 +
 xen/arch/arm/pci/pci-access.c       |  37 ++-
 xen/arch/arm/pci/pci-designware.c   | 403 ++++++++++++++++++++++++++++
 xen/arch/arm/pci/pci-designware.h   | 102 +++++++
 xen/arch/arm/pci/pci-host-common.c  |  94 +++++--
 xen/arch/arm/pci/pci-host-generic.c |   2 +-
 xen/arch/arm/pci/pci-host-rcar4.c   | 103 +++++++
 xen/arch/arm/pci/pci-host-zynqmp.c  |   2 +-
 xen/arch/arm/vpci.c                 |  83 ++++--
 10 files changed, 793 insertions(+), 46 deletions(-)
 create mode 100644 xen/arch/arm/pci/pci-designware.c
 create mode 100644 xen/arch/arm/pci/pci-designware.h
 create mode 100644 xen/arch/arm/pci/pci-host-rcar4.c

--=20
2.34.1


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From: Mykyta Poturai 
To: "xen-devel@lists.xenproject.org" 
CC: Oleksandr Andrushchenko , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Michal Orzel ,
	Volodymyr Babchuk , Mykyta Poturai
	
Subject: [PATCH v4 3/4] xen/arm: add support for PCI child bus
Thread-Topic: [PATCH v4 3/4] xen/arm: add support for PCI child bus
Thread-Index: AQHbtD/+iEx0Vt7ta06YeE/e+t9zSw==
Date: Wed, 23 Apr 2025 11:08:07 +0000
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 <79bbb6705638445526bbd1fa299b7bfd0d087462.1745402473.git.mykyta_poturai@epam.com>
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From: Oleksandr Andrushchenko 

PCI host bridges often have different ways to access the root and child
bus configuration spaces. One of the examples is Designware's host bridge
and its multiple clones [1].

Linux kernel implements this by instantiating a child bus when device
drivers provide not only the usual pci_ops to access ECAM space (this is
the case for the generic host bridge), but also means to access the child
bus which has a dedicated configuration space and own implementation for
accessing the bus, e.g. child_ops.

For Xen it is not feasible to fully implement PCI bus infrastructure as
Linux kernel does, but still child bus can be supported.

Add support for the PCI child bus which includes the following changes:
- introduce bus mapping functions depending on SBDF
- assign bus start and end for the child bus and re-configure the same for
  the parent (root) bus
- make pci_find_host_bridge be aware of multiple busses behind the same bri=
dge
- update pci_host_bridge_mappings, so it also doesn't map to guest the memo=
ry
  spaces belonging to the child bus
- make pci_host_common_probe accept one more pci_ops structure for the chil=
d bus
- install MMIO handlers for the child bus
- re-work vpci_mmio_{write|read} with parent and child approach in mind

[1] https://elixir.bootlin.com/linux/v5.15/source/drivers/pci/controller/dw=
c

Signed-off-by: Oleksandr Andrushchenko 
Signed-off-by: Mykyta Poturai 
---
v3->v4:
* remove changes to pci_ecam_map_bus
* make map_bus inline
* fix logic error in pci_host_bridge_mappings

v2->v3:
* no change

v1->v2:
* fixed compilation issues
---
 xen/arch/arm/include/asm/pci.h      |  9 ++-
 xen/arch/arm/pci/pci-access.c       | 37 +++++++++++--
 xen/arch/arm/pci/pci-host-common.c  | 86 +++++++++++++++++++++++------
 xen/arch/arm/pci/pci-host-generic.c |  2 +-
 xen/arch/arm/pci/pci-host-zynqmp.c  |  2 +-
 xen/arch/arm/vpci.c                 | 83 ++++++++++++++++++++++------
 6 files changed, 177 insertions(+), 42 deletions(-)

diff --git a/xen/arch/arm/include/asm/pci.h b/xen/arch/arm/include/asm/pci.=
h
index 3d2ca9b5b0..94ec63f3c8 100644
--- a/xen/arch/arm/include/asm/pci.h
+++ b/xen/arch/arm/include/asm/pci.h
@@ -67,6 +67,9 @@ struct pci_host_bridge {
     uint16_t segment;                /* Segment number */
     struct pci_config_window* cfg;   /* Pointer to the bridge config windo=
w */
     const struct pci_ops *ops;
+    /* Child bus */
+    struct pci_config_window *child_cfg;
+    const struct pci_ops *child_ops;
     void *priv;                      /* Private data of the bridge. */
 };
=20
@@ -96,8 +99,10 @@ struct pci_ecam_ops {
 /* Default ECAM ops */
 extern const struct pci_ecam_ops pci_generic_ecam_ops;
=20
-struct pci_host_bridge *pci_host_common_probe(struct dt_device_node *dev,
-                                              const struct pci_ecam_ops *o=
ps);
+struct pci_host_bridge *
+pci_host_common_probe(struct dt_device_node *dev,
+                      const struct pci_ecam_ops *ops,
+                      const struct pci_ecam_ops *child_ops);
 int pci_generic_config_read(struct pci_host_bridge *bridge, pci_sbdf_t sbd=
f,
                             uint32_t reg, uint32_t len, uint32_t *value);
 int pci_generic_config_write(struct pci_host_bridge *bridge, pci_sbdf_t sb=
df,
diff --git a/xen/arch/arm/pci/pci-access.c b/xen/arch/arm/pci/pci-access.c
index 9f9aac43d7..91271973fb 100644
--- a/xen/arch/arm/pci/pci-access.c
+++ b/xen/arch/arm/pci/pci-access.c
@@ -18,10 +18,31 @@
 #define INVALID_VALUE (~0U)
 #define PCI_ERR_VALUE(len) GENMASK(0, len * 8)
=20
+static const struct pci_ops *get_ops(struct pci_host_bridge *bridge,
+                                     pci_sbdf_t sbdf)
+{
+    if ( bridge->child_ops )
+    {
+        struct pci_config_window *cfg =3D bridge->child_cfg;
+
+        if ( (sbdf.bus >=3D cfg->busn_start) && (sbdf.bus <=3D cfg->busn_e=
nd) )
+            return bridge->child_ops;
+    }
+    return bridge->ops;
+}
+
+static inline void __iomem *map_bus(struct pci_host_bridge *bridge, pci_sb=
df_t sbdf,
+                             uint32_t reg)
+{
+    const struct pci_ops *ops =3D get_ops(bridge, sbdf);
+
+    return ops->map_bus(bridge, sbdf, reg);
+}
+
 int pci_generic_config_read(struct pci_host_bridge *bridge, pci_sbdf_t sbd=
f,
                             uint32_t reg, uint32_t len, uint32_t *value)
 {
-    void __iomem *addr =3D bridge->ops->map_bus(bridge, sbdf, reg);
+    void __iomem *addr =3D map_bus(bridge, sbdf, reg);
=20
     if ( !addr )
     {
@@ -50,7 +71,7 @@ int pci_generic_config_read(struct pci_host_bridge *bridg=
e, pci_sbdf_t sbdf,
 int pci_generic_config_write(struct pci_host_bridge *bridge, pci_sbdf_t sb=
df,
                              uint32_t reg, uint32_t len, uint32_t value)
 {
-    void __iomem *addr =3D bridge->ops->map_bus(bridge, sbdf, reg);
+    void __iomem *addr =3D map_bus(bridge, sbdf, reg);
=20
     if ( !addr )
         return -ENODEV;
@@ -78,14 +99,16 @@ static uint32_t pci_config_read(pci_sbdf_t sbdf, unsign=
ed int reg,
 {
     uint32_t val =3D PCI_ERR_VALUE(len);
     struct pci_host_bridge *bridge =3D pci_find_host_bridge(sbdf.seg, sbdf=
.bus);
+    const struct pci_ops *ops;
=20
     if ( unlikely(!bridge) )
         return val;
=20
-    if ( unlikely(!bridge->ops->read) )
+    ops =3D get_ops(bridge, sbdf);
+    if ( unlikely(!ops->read) )
         return val;
=20
-    bridge->ops->read(bridge, sbdf, reg, len, &val);
+    ops->read(bridge, sbdf, reg, len, &val);
=20
     return val;
 }
@@ -94,14 +117,16 @@ static void pci_config_write(pci_sbdf_t sbdf, unsigned=
 int reg,
                              unsigned int len, uint32_t val)
 {
     struct pci_host_bridge *bridge =3D pci_find_host_bridge(sbdf.seg, sbdf=
.bus);
+    const struct pci_ops *ops;
=20
     if ( unlikely(!bridge) )
         return;
=20
-    if ( unlikely(!bridge->ops->write) )
+    ops =3D get_ops(bridge, sbdf);
+    if ( unlikely(!ops->write) )
         return;
=20
-    bridge->ops->write(bridge, sbdf, reg, len, val);
+    ops->write(bridge, sbdf, reg, len, val);
 }
=20
 /*
diff --git a/xen/arch/arm/pci/pci-host-common.c b/xen/arch/arm/pci/pci-host=
-common.c
index 53953d4895..1d0dc1b4bd 100644
--- a/xen/arch/arm/pci/pci-host-common.c
+++ b/xen/arch/arm/pci/pci-host-common.c
@@ -57,17 +57,12 @@ static void pci_ecam_free(struct pci_config_window *cfg=
)
     xfree(cfg);
 }
=20
-static struct pci_config_window * __init
-gen_pci_init(struct dt_device_node *dev, const struct pci_ecam_ops *ops)
+static void __init gen_pci_init_bus_range(struct dt_device_node *dev,
+                                          struct pci_host_bridge *bridge,
+                                          struct pci_config_window *cfg)
 {
-    int err, cfg_reg_idx;
     u32 bus_range[2];
-    paddr_t addr, size;
-    struct pci_config_window *cfg;
-
-    cfg =3D xzalloc(struct pci_config_window);
-    if ( !cfg )
-        return NULL;
+    int err;
=20
     err =3D dt_property_read_u32_array(dev, "bus-range", bus_range,
                                      ARRAY_SIZE(bus_range));
@@ -82,6 +77,36 @@ gen_pci_init(struct dt_device_node *dev, const struct pc=
i_ecam_ops *ops)
         if ( cfg->busn_end > cfg->busn_start + 0xff )
             cfg->busn_end =3D cfg->busn_start + 0xff;
     }
+}
+
+static void __init gen_pci_init_bus_range_child(struct dt_device_node *dev=
,
+                                                struct pci_host_bridge *br=
idge,
+                                                struct pci_config_window *=
cfg)
+{
+    cfg->busn_start =3D bridge->cfg->busn_start + 1;
+    cfg->busn_end =3D bridge->cfg->busn_end;
+    bridge->cfg->busn_end =3D bridge->cfg->busn_start;
+
+    printk(XENLOG_INFO "Root bus end updated: [bus %x-%x]\n",
+           bridge->cfg->busn_start, bridge->cfg->busn_end);
+}
+
+static struct pci_config_window *__init
+gen_pci_init(struct dt_device_node *dev, struct pci_host_bridge *bridge,
+             const struct pci_ecam_ops *ops,
+             void (*init_bus_range)(struct dt_device_node *dev,
+                                    struct pci_host_bridge *bridge,
+                                    struct pci_config_window *cfg))
+{
+    int err, cfg_reg_idx;
+    paddr_t addr, size;
+    struct pci_config_window *cfg;
+
+    cfg =3D xzalloc(struct pci_config_window);
+    if ( !cfg )
+        return NULL;
+
+    init_bus_range(dev, bridge, cfg);
=20
     if ( ops->cfg_reg_index )
     {
@@ -208,8 +233,10 @@ static int pci_bus_find_domain_nr(struct dt_device_nod=
e *dev)
     return domain;
 }
=20
-struct pci_host_bridge *pci_host_common_probe(struct dt_device_node *dev,
-                                              const struct pci_ecam_ops *o=
ps)
+struct pci_host_bridge *
+pci_host_common_probe(struct dt_device_node *dev,
+                      const struct pci_ecam_ops *ops,
+                      const struct pci_ecam_ops *child_ops)
 {
     struct pci_host_bridge *bridge;
     struct pci_config_window *cfg;
@@ -224,7 +251,7 @@ struct pci_host_bridge *pci_host_common_probe(struct dt=
_device_node *dev,
         return ERR_PTR(-ENOMEM);
=20
     /* Parse and map our Configuration Space windows */
-    cfg =3D gen_pci_init(dev, ops);
+    cfg =3D gen_pci_init(dev, bridge, ops, gen_pci_init_bus_range);
     if ( !cfg )
     {
         err =3D -ENOMEM;
@@ -242,10 +269,29 @@ struct pci_host_bridge *pci_host_common_probe(struct =
dt_device_node *dev,
         BUG();
     }
     bridge->segment =3D domain;
+
+    if ( child_ops )
+    {
+        /* Parse and map child's Configuration Space windows */
+        cfg =3D gen_pci_init(dev, bridge, child_ops,
+                           gen_pci_init_bus_range_child);
+        if ( !cfg )
+        {
+            err =3D -ENOMEM;
+            goto err_child;
+        }
+
+        bridge->child_cfg =3D cfg;
+        bridge->child_ops =3D &child_ops->pci_ops;
+    }
+
     pci_add_host_bridge(bridge);
=20
     return bridge;
=20
+err_child:
+    xfree(bridge->cfg);
+
 err_exit:
     xfree(bridge);
=20
@@ -280,9 +326,12 @@ struct pci_host_bridge *pci_find_host_bridge(uint16_t =
segment, uint8_t bus)
     {
         if ( bridge->segment !=3D segment )
             continue;
-        if ( (bus < bridge->cfg->busn_start) || (bus > bridge->cfg->busn_e=
nd) )
-            continue;
-        return bridge;
+        if ( bridge->child_cfg && (bus >=3D bridge->child_cfg->busn_start)=
 &&
+             (bus <=3D bridge->child_cfg->busn_end) )
+            return bridge;
+        if ( (bus >=3D bridge->cfg->busn_start) &&
+             (bus <=3D bridge->cfg->busn_end) )
+            return bridge;
     }
=20
     return NULL;
@@ -348,6 +397,7 @@ int __init pci_host_bridge_mappings(struct domain *d)
     {
         const struct dt_device_node *dev =3D bridge->dt_node;
         unsigned int i;
+        bool need_mapping;
=20
         for ( i =3D 0; i < dt_number_of_address(dev); i++ )
         {
@@ -363,7 +413,11 @@ int __init pci_host_bridge_mappings(struct domain *d)
                 return err;
             }
=20
-            if ( bridge->ops->need_p2m_hwdom_mapping(d, bridge, addr) )
+            need_mapping =3D bridge->ops->need_p2m_hwdom_mapping(d, bridge=
, addr);
+            if ( need_mapping || bridge->child_ops )
+                need_mapping =3D
+                    bridge->child_ops->need_p2m_hwdom_mapping(d, bridge, a=
ddr);
+            if ( need_mapping )
             {
                 err =3D map_range_to_domain(dev, addr, size, &mr_data);
                 if ( err )
diff --git a/xen/arch/arm/pci/pci-host-generic.c b/xen/arch/arm/pci/pci-hos=
t-generic.c
index a6ffbda174..47cf144831 100644
--- a/xen/arch/arm/pci/pci-host-generic.c
+++ b/xen/arch/arm/pci/pci-host-generic.c
@@ -29,7 +29,7 @@ static const struct dt_device_match __initconstrel gen_pc=
i_dt_match[] =3D
 static int __init pci_host_generic_probe(struct dt_device_node *dev,
                                          const void *data)
 {
-    return PTR_RET(pci_host_common_probe(dev, &pci_generic_ecam_ops));
+    return PTR_RET(pci_host_common_probe(dev, &pci_generic_ecam_ops, NULL)=
);
 }
=20
 DT_DEVICE_START(pci_gen, "PCI HOST GENERIC", DEVICE_PCI_HOSTBRIDGE)
diff --git a/xen/arch/arm/pci/pci-host-zynqmp.c b/xen/arch/arm/pci/pci-host=
-zynqmp.c
index a38f2e019e..75d1235aaf 100644
--- a/xen/arch/arm/pci/pci-host-zynqmp.c
+++ b/xen/arch/arm/pci/pci-host-zynqmp.c
@@ -47,7 +47,7 @@ static const struct dt_device_match __initconstrel nwl_pc=
ie_dt_match[] =3D
 static int __init pci_host_generic_probe(struct dt_device_node *dev,
                                          const void *data)
 {
-    return PTR_RET(pci_host_common_probe(dev, &nwl_pcie_ops));
+    return PTR_RET(pci_host_common_probe(dev, &nwl_pcie_ops, NULL));
 }
=20
 DT_DEVICE_START(pci_gen, "PCI HOST ZYNQMP", DEVICE_PCI_HOSTBRIDGE)
diff --git a/xen/arch/arm/vpci.c b/xen/arch/arm/vpci.c
index b63a356bb4..468aee1db7 100644
--- a/xen/arch/arm/vpci.c
+++ b/xen/arch/arm/vpci.c
@@ -8,15 +8,17 @@
 #include 
=20
 static pci_sbdf_t vpci_sbdf_from_gpa(const struct pci_host_bridge *bridge,
-                                     paddr_t gpa)
+                                     paddr_t gpa, bool use_root)
 {
     pci_sbdf_t sbdf;
=20
     if ( bridge )
     {
-        sbdf.sbdf =3D VPCI_ECAM_BDF(gpa - bridge->cfg->phys_addr);
+        const struct pci_config_window *cfg =3D use_root ? bridge->cfg
+                                                       : bridge->child_cfg=
;
+        sbdf.sbdf =3D VPCI_ECAM_BDF(gpa - cfg->phys_addr);
         sbdf.seg =3D bridge->segment;
-        sbdf.bus +=3D bridge->cfg->busn_start;
+        sbdf.bus +=3D cfg->busn_start;
     }
     else
         sbdf.sbdf =3D VPCI_ECAM_BDF(gpa - GUEST_VPCI_ECAM_BASE);
@@ -24,11 +26,9 @@ static pci_sbdf_t vpci_sbdf_from_gpa(const struct pci_ho=
st_bridge *bridge,
     return sbdf;
 }
=20
-static int vpci_mmio_read(struct vcpu *v, mmio_info_t *info,
-                          register_t *r, void *p)
+static int vpci_mmio_read(struct vcpu *v, mmio_info_t *info, register_t *r=
,
+                          pci_sbdf_t sbdf)
 {
-    struct pci_host_bridge *bridge =3D p;
-    pci_sbdf_t sbdf =3D vpci_sbdf_from_gpa(bridge, info->gpa);
     const unsigned int access_size =3D (1U << info->dabt.size) * 8;
     const register_t invalid =3D GENMASK_ULL(access_size - 1, 0);
     /* data is needed to prevent a pointer cast on 32bit */
@@ -46,31 +46,78 @@ static int vpci_mmio_read(struct vcpu *v, mmio_info_t *=
info,
     return 0;
 }
=20
-static int vpci_mmio_write(struct vcpu *v, mmio_info_t *info,
-                           register_t r, void *p)
+static int vpci_mmio_read_root(struct vcpu *v, mmio_info_t *info, register=
_t *r,
+                               void *p)
+{
+    struct pci_host_bridge *bridge =3D p;
+    pci_sbdf_t sbdf =3D vpci_sbdf_from_gpa(bridge, info->gpa, true);
+
+    return vpci_mmio_read(v, info, r, sbdf);
+}
+
+static int vpci_mmio_read_child(struct vcpu *v, mmio_info_t *info,
+                                register_t *r, void *p)
 {
     struct pci_host_bridge *bridge =3D p;
-    pci_sbdf_t sbdf =3D vpci_sbdf_from_gpa(bridge, info->gpa);
+    pci_sbdf_t sbdf =3D vpci_sbdf_from_gpa(bridge, info->gpa, false);
+
+    return vpci_mmio_read(v, info, r, sbdf);
+}
=20
+static int vpci_mmio_write(struct vcpu *v, mmio_info_t *info, register_t r=
,
+                           pci_sbdf_t sbdf)
+{
     return vpci_ecam_write(sbdf, ECAM_REG_OFFSET(info->gpa),
                            1U << info->dabt.size, r);
 }
=20
+static int vpci_mmio_write_root(struct vcpu *v, mmio_info_t *info, registe=
r_t r,
+                                void *p)
+{
+    struct pci_host_bridge *bridge =3D p;
+    pci_sbdf_t sbdf =3D vpci_sbdf_from_gpa(bridge, info->gpa, true);
+
+    return vpci_mmio_write(v, info, r, sbdf);
+}
+
+static int vpci_mmio_write_child(struct vcpu *v, mmio_info_t *info,
+                                 register_t r, void *p)
+{
+    struct pci_host_bridge *bridge =3D p;
+    pci_sbdf_t sbdf =3D vpci_sbdf_from_gpa(bridge, info->gpa, false);
+
+    return vpci_mmio_write(v, info, r, sbdf);
+}
+
 static const struct mmio_handler_ops vpci_mmio_handler =3D {
-    .read  =3D vpci_mmio_read,
-    .write =3D vpci_mmio_write,
+    .read =3D vpci_mmio_read_root,
+    .write =3D vpci_mmio_write_root,
+};
+
+static const struct mmio_handler_ops vpci_mmio_handler_child =3D {
+    .read =3D vpci_mmio_read_child,
+    .write =3D vpci_mmio_write_child,
 };
=20
 static int vpci_setup_mmio_handler_cb(struct domain *d,
                                       struct pci_host_bridge *bridge)
 {
     struct pci_config_window *cfg =3D bridge->cfg;
+    int count =3D 1;
=20
     register_mmio_handler(d, &vpci_mmio_handler,
                           cfg->phys_addr, cfg->size, bridge);
=20
-    /* We have registered a single MMIO handler. */
-    return 1;
+    if ( bridge->child_ops )
+    {
+        struct pci_config_window *cfg =3D bridge->child_cfg;
+
+        register_mmio_handler(d, &vpci_mmio_handler_child, cfg->phys_addr,
+                              cfg->size, bridge);
+        count++;
+    }
+
+    return count;
 }
=20
 int domain_vpci_init(struct domain *d)
@@ -101,8 +148,12 @@ int domain_vpci_init(struct domain *d)
 static int vpci_get_num_handlers_cb(struct domain *d,
                                     struct pci_host_bridge *bridge)
 {
-    /* Each bridge has a single MMIO handler for the configuration space. =
*/
-    return 1;
+    int count =3D 1;
+
+    if ( bridge->child_cfg )
+        count++;
+
+    return count;
 }
=20
 unsigned int domain_vpci_get_num_mmio_handlers(struct domain *d)
--=20
2.34.1


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From: Mykyta Poturai 
To: "xen-devel@lists.xenproject.org" 
CC: Oleksandr Andrushchenko , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Michal Orzel ,
	Volodymyr Babchuk , Mykyta Poturai
	
Subject: [PATCH v4 1/4] xen/arm: allow PCI host bridge to have private data
Thread-Topic: [PATCH v4 1/4] xen/arm: allow PCI host bridge to have private
 data
Thread-Index: AQHbtD/95pRG14vO602uhsMByi23ZA==
Date: Wed, 23 Apr 2025 11:08:06 +0000
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 <960fdc040bf621a60d494fa44f99c344ced33770.1745402473.git.mykyta_poturai@epam.com>
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From: Oleksandr Andrushchenko 

Some of the PCI host bridges require private data. Add priv field
to struct pci_host_bridge, so such bridges may populate it with
their private data.

Signed-off-by: Oleksandr Andrushchenko 
Signed-off-by: Mykyta Poturai 
Reviewed-by: Stefano Stabellini 
---
v3->v4:
* Added Stefano's RB

v2->v3:
* removed priv allocation from common code

v1->v2:
* no change
---
 xen/arch/arm/include/asm/pci.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/xen/arch/arm/include/asm/pci.h b/xen/arch/arm/include/asm/pci.=
h
index 7f77226c9b..a87672d834 100644
--- a/xen/arch/arm/include/asm/pci.h
+++ b/xen/arch/arm/include/asm/pci.h
@@ -66,6 +66,7 @@ struct pci_host_bridge {
     uint16_t segment;                /* Segment number */
     struct pci_config_window* cfg;   /* Pointer to the bridge config windo=
w */
     const struct pci_ops *ops;
+    void *priv;                      /* Private data of the bridge. */
 };
=20
 struct pci_ops {
--=20
2.34.1


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Subject: Re: [PATCH] x86emul: adjust BSF/BSR behavior as to EFLAGS
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On 23.04.2025 11:49, Andrew Cooper wrote:
> On 23/04/2025 7:13 am, Jan Beulich wrote:
>> SDM revision 087 points out that apparently as of quite some time ago on
>> Intel hardware BSF and BSR may alter all arithmetic flags, not just ZF.
>> Because of the inconsistency (and because documentation doesn't look to
>> be quite right about PF), best we can do is simply take the flag values
>> from what the processor produces, just like we do for various other
>> arithmetic insns. (Note also that AMD and Intel have always been
>> disagreeing on arithmetic flags other than ZF.)
> 
> The new footnote Intel have added about "older processors" does match
> AMD, saying "unmodified".
> 
> I think it's clear now that Intel and AMD behaviour was the same
> originally, except AMD wrote "unmodified" and Intel wrote "undefined",
> and Intel used this flexibility to alter the behaviour.

Except it isn't - U in AMD's nomenclature is "undefined", not "unmodified"
(and despite what you wrote above I hope you agree that the two mean
different things). Unmodified flag entries are simply blank.

>> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
>> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
>> @@ -5268,16 +5268,14 @@ x86_emulate(
>>          break;
>>  
>>      case X86EMUL_OPC(0x0f, 0xbc): /* bsf or tzcnt */
>> -    {
>> -        bool zf;
>> -
>> -        asm ( "bsf %2,%0" ASM_FLAG_OUT(, "; setz %1")
>> -              : "=r" (dst.val), ASM_FLAG_OUT("=@ccz", "=qm") (zf)
>> -              : "rm" (src.val) );
>> -        _regs.eflags &= ~X86_EFLAGS_ZF;
>>          if ( (vex.pfx == vex_f3) && vcpu_has_bmi1() )
>>          {
>> -            _regs.eflags &= ~X86_EFLAGS_CF;
>> +            bool zf;
>> +
>> +            asm ( "bsf %2,%0" ASM_FLAG_OUT(, "; setz %1")
>> +                  : "=r" (dst.val), ASM_FLAG_OUT("=@ccz", "=qm") (zf)
>> +                  : "rm" (src.val) );
>> +            _regs.eflags &= ~(X86_EFLAGS_ZF | X86_EFLAGS_CF);
>>              if ( zf )
>>              {
>>                  _regs.eflags |= X86_EFLAGS_CF;
>> @@ -5286,25 +5284,23 @@ x86_emulate(
>>              else if ( !dst.val )
>>                  _regs.eflags |= X86_EFLAGS_ZF;
>>          }
>> -        else if ( zf )
>> +        else
>>          {
>> -            _regs.eflags |= X86_EFLAGS_ZF;
>> -            dst.type = OP_NONE;
>> +            emulate_2op_SrcV_srcmem("bsf", src, dst, _regs.eflags);
>> +            if ( _regs.eflags & X86_EFLAGS_ZF )
>> +                dst.type = OP_NONE;
> 
> On Intel, BSF/BSR writes back the destination register.  Notably, it
> gets 0 extended per normal rules,

That's also only on "older processors", as per the other footnote.

> which is why you have to be extra
> careful when using the trick of preloading it with -1; the result must
> be interpreted as (int) even over a 64bit operation.
> 
> This needs an amd_like() qualification to override dst.type.  This
> aspect genuinely is different between them.  Alternatively, we might be
> able to set the operand size always to 64 and write back the entire
> register as the processor gave to us, but I'm not sure if that will have
> effects elsewhere.

Besides (as per above), amd_like() not covering all cases, this would
then further need special treatment for 16-bit opsize. Plus promoting
to 64-bit would require manually clipping the result to 5 bits when
the original size wants 64-bit. That's imo far more complications
than gains.

Further, this patch is really about EFLAGS only; the OP_NONE was there
already before.

> Finally, I'm wary leaving TZCNT/LZCNT using the old logic.  Despite the
> absence of an update in 087, I find it unlikely that they behave
> differently WRT flags (specifically, I severely doubt they've got
> differing circuitry).

They do, I checked. Iirc I even mentioned on Matrix that I'm surprised
by the difference.

> I'd suggest giving them the same fully-emulated treatment as BSF/BSR.

But we're emulating them as the correct insn even if the respective
feature flag isn't set in the host policy. I don't want to break that,
so doing as you suggest would mean further bifurcating the handling
(to deal with the two different cases of what underlying hardware we
run on). This feels like unnecessary extra complexity to me.

Jan


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Date: Wed, 23 Apr 2025 13:16:49 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Jan Beulich ,
	Ross Lagerwall 
Subject: Re: [PATCH 6/8] xen/livepatch: Support new altcall scheme
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In-Reply-To: <20250423010237.1528582-7-andrew.cooper3@citrix.com>

On Wed, Apr 23, 2025 at 02:02:35AM +0100, Andrew Cooper wrote:
> The new altcall scheme uses an .alt_call_sites section.  Wire this up in very
> much the same way as the .altinstructions section, although there is less
> sanity checking necessary.
> 
> Signed-off-by: Andrew Cooper 

Reviewed-by: Roger Pau Monné 

One nit/comment below.

> ---
> CC: Jan Beulich 
> CC: Roger Pau Monné 
> CC: Ross Lagerwall 
> ---
>  xen/arch/x86/alternative.c         |  6 ++++
>  xen/common/livepatch.c             | 58 ++++++++++++++++++++++++++++++
>  xen/include/xen/alternative-call.h |  8 +++--
>  3 files changed, 70 insertions(+), 2 deletions(-)
> 
> diff --git a/xen/arch/x86/alternative.c b/xen/arch/x86/alternative.c
> index f6594e21a14c..22af224f08f7 100644
> --- a/xen/arch/x86/alternative.c
> +++ b/xen/arch/x86/alternative.c
> @@ -479,6 +479,12 @@ int apply_alternatives(struct alt_instr *start, struct alt_instr *end)
>  {
>      return _apply_alternatives(start, end, true);
>  }
> +
> +int livepatch_apply_alt_calls(const struct alt_call *start,
> +                              const struct alt_call *end)
> +{
> +    return apply_alt_calls(start, end);
> +}
>  #endif
>  
>  #define ALT_INSNS (1U << 0)
> diff --git a/xen/common/livepatch.c b/xen/common/livepatch.c
> index 6ce77bf021b7..be9b7e367553 100644
> --- a/xen/common/livepatch.c
> +++ b/xen/common/livepatch.c
> @@ -905,6 +905,64 @@ static int prepare_payload(struct payload *payload,
>  #endif
>      }
>  
> +    sec = livepatch_elf_sec_by_name(elf, ".alt_call_sites");
> +    if ( sec )
> +    {
> +#ifdef CONFIG_ALTERNATIVE_CALL
> +        const struct alt_call *a, *start, *end;
> +
> +        if ( !section_ok(elf, sec, sizeof(*a)) )
> +            return -EINVAL;
> +
> +        /* Tolerate an empty .alt_call_sites section... */
> +        if ( sec->sec->sh_size == 0 )

You could possibly move this check to the outer `if` condition, and
avoid the alt_call_done label?

As even in the !CONFIG_ALTERNATIVE_CALL case skipping an empty section
would be OK.

Thanks, Roger.


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Date: Wed, 23 Apr 2025 12:22:39 +0100
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Subject: Re: [PATCH v4] xen/domain: unify domain ID allocation
Content-Language: en-GB
To: dmkhn@proton.me, xen-devel@lists.xenproject.org
Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com,
 michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org,
 dmukhin@ford.com
References: <20250422215322.521464-1-dmukhin@ford.com>
From: Julien Grall 
In-Reply-To: <20250422215322.521464-1-dmukhin@ford.com>
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Hi Denis,

On 22/04/2025 22:54, dmkhn@proton.me wrote:
> From: Denis Mukhin 
> 
> Currently, hypervisor code has two different non-system domain ID allocation
> algorithms:
> 
>    (a) Arm port allocates IDs sequentially based on max_init_domid;
> 
>    (b) x86 has another algorithm implementation embedded into
>        XEN_DOMCTL_createdomain; does not use max_init_domid, but does similar
>        thing wrt sequentially allocating IDs.

I am a bit confused with this statement. This is implying the code is 
only used by x86. However, XEN_DOMCTL_createdomain is common code and 
used by Arm when creating domains from the toolstack. Can you clarify? 
With this in mind...

> 
> It makes sense to have a common helper code for such task across architectures
> (Arm and x86).

... the unification is effectively between dom0less domU allocation and 
the toolstack domU allocation.

> 
> Wrap the domain ID allocation as an arch-independent function domid_alloc() in
> common/domain.c.
> 
> Allocation algorithm:
> - If an explicit domain ID is provided, verify its availability and
>    use it if ID is unused;
> - Otherwise, perform an exhaustive search starting from the end of the used
>    domain ID range, excluding hardware_domid.
> 
> Move the is_free_domid() helper closer to domid_alloc(). Simplify
> is_free_domid() by removing the domain ID range check, as the ID is now
> guaranteed to be within the valid range. Additionally, update the predicate to
> return a bool value instead of an int.
> 
> No functional change intended.
> 
> Signed-off-by: Denis Mukhin 
> ---
> Changes v3->v4:
> - fixed the behavior of domctl ID allocator to match the original behavior
>    in case of exhaustive search
> - use domid_t input argument in domid_alloc()
> - use DOMID_INVALID as an indicator of performing an exhaustive search
> - use DOMID_INVALID as an indicator of allocator failure
> - use %pd formatting for domain ID printouts in the modified code
> - some comments fixups
> - Link to v2: https://lore.kernel.org/xen-devel/20250416061509.934220-1-dmukhin@ford.com/
> - CI run: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines/1780576277
> ---
>   xen/arch/arm/dom0less-build.c | 17 ++++++------
>   xen/arch/arm/domain_build.c   | 17 ++++++++----
>   xen/arch/x86/setup.c          | 11 +++++---
>   xen/common/domain.c           | 51 +++++++++++++++++++++++++++++++++++
>   xen/common/domctl.c           | 41 +++-------------------------
>   xen/include/xen/domain.h      |  2 ++
>   6 files changed, 84 insertions(+), 55 deletions(-)
> 
> diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c
> index a356fc94fc..61e01b7306 100644
> --- a/xen/arch/arm/dom0less-build.c
> +++ b/xen/arch/arm/dom0less-build.c
> @@ -1038,15 +1038,13 @@ void __init create_domUs(void)
>           };
>           unsigned int flags = 0U;
>           bool has_dtb = false;
> +        domid_t domid;
>           uint32_t val;
>           int rc;
>   
>           if ( !dt_device_is_compatible(node, "xen,domain") )
>               continue;
>   
> -        if ( (max_init_domid + 1) >= DOMID_FIRST_RESERVED )
> -            panic("No more domain IDs available\n");
> -
>           if ( dt_property_read_u32(node, "capabilities", &val) )
>           {
>               if ( val & ~DOMAIN_CAPS_MASK )
> @@ -1218,12 +1216,13 @@ void __init create_domUs(void)
>           if ( !llc_coloring_enabled && llc_colors_str )
>               panic("'llc-colors' found, but LLC coloring is disabled\n");
>   
> -        /*
> -         * The variable max_init_domid is initialized with zero, so here it's
> -         * very important to use the pre-increment operator to call
> -         * domain_create() with a domid > 0. (domid == 0 is reserved for Dom0)
> -         */
> -        d = domain_create(++max_init_domid, &d_cfg, flags);
> +        domid = domid_alloc(DOMID_INVALID);
> +        if ( domid == DOMID_INVALID )
> +            panic("Error allocating ID for domain %s\n", dt_node_name(node));
> +        if ( max_init_domid < domid )
> +            max_init_domid = domid;

While I think it is a good idea to have a single way to allocate domain 
IDs, I am a bit concerned of the change for dom0less domUs. By 
introducing domid_alloc(), it will now be easier to change the behavior 
of the domain ID allocation without realizing the impact for dom0less 
domUs (max_init_domid is mainly used to limit the loop when switching 
consoles).

I think we need to document explicitely in domid_alloc() that some 
callers specifically rely on the existing allocation scheme. So we need 
to be careful when changing it.

> +
> +        d = domain_create(domid, &d_cfg, flags);
>           if ( IS_ERR(d) )
>               panic("Error creating domain %s (rc = %ld)\n",
>                     dt_node_name(node), PTR_ERR(d));
> diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
> index 270a6b97e4..fe968dd66b 100644
> --- a/xen/arch/arm/domain_build.c
> +++ b/xen/arch/arm/domain_build.c
> @@ -2371,6 +2371,7 @@ void __init create_dom0(void)
>           .grant_opts = XEN_DOMCTL_GRANT_version(opt_gnttab_max_version),
>       };
>       unsigned int flags = CDF_privileged | CDF_hardware;
> +    domid_t domid;
>       int rc;
>   
>       /* The vGIC for DOM0 is exactly emulating the hardware GIC */
> @@ -2395,19 +2396,25 @@ void __init create_dom0(void)
>       if ( !llc_coloring_enabled )
>           flags |= CDF_directmap;
>   
> -    dom0 = domain_create(0, &dom0_cfg, flags);
> +    domid = domid_alloc(get_initial_domain_id());

This is technically a change of behavior for Arm if the hardware_domid 
is not 0. I think we need to using 0 here. If you want to change the 
behavior, then this should be a separate patch with a proper explanation.

> +    if ( domid ==  DOMID_INVALID )
> +        panic("Error allocating domain ID %d\n", get_initial_domain_id());
> +
> +    dom0 = domain_create(domid, &dom0_cfg, flags);
>       if ( IS_ERR(dom0) )
> -        panic("Error creating domain 0 (rc = %ld)\n", PTR_ERR(dom0));
> +        panic("Error creating domain %d (rc = %ld)\n", domid, PTR_ERR(dom0));
>   
>       if ( llc_coloring_enabled && (rc = dom0_set_llc_colors(dom0)) )
> -        panic("Error initializing LLC coloring for domain 0 (rc = %d)\n", rc);
> +        panic("Error initializing LLC coloring for domain %pd (rc = %d)\n",
> +              dom0, rc);
>   
>       if ( alloc_dom0_vcpu0(dom0) == NULL )
> -        panic("Error creating domain 0 vcpu0\n");
> +        panic("Error creating domain %pdv0\n", dom0);
>   
>       rc = construct_dom0(dom0);
>       if ( rc )
> -        panic("Could not set up DOM0 guest OS (rc = %d)\n", rc);
> +        panic("Could not set up guest OS for domain %pd (rc = %d)\n",
> +              dom0, rc);
>   
>       set_xs_domain(dom0);
>   }
> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
> index 24b36c1a59..e61c023085 100644
> --- a/xen/arch/x86/setup.c
> +++ b/xen/arch/x86/setup.c
> @@ -1009,8 +1009,11 @@ static struct domain *__init create_dom0(struct boot_info *bi)
>       if ( iommu_enabled )
>           dom0_cfg.flags |= XEN_DOMCTL_CDF_iommu;
>   
> -    /* Create initial domain.  Not d0 for pvshim. */
> -    bd->domid = get_initial_domain_id();
> +    /* Allocate initial domain ID. Not d0 for pvshim. */
> +    bd->domid = domid_alloc(get_initial_domain_id());
> +    if ( bd->domid == DOMID_INVALID )
> +        panic("Error allocating domain ID %d\n", get_initial_domain_id());
> +
>       d = domain_create(bd->domid, &dom0_cfg,
>                         pv_shim ? 0 : CDF_privileged | CDF_hardware);
>       if ( IS_ERR(d) )
> @@ -1038,7 +1041,7 @@ static struct domain *__init create_dom0(struct boot_info *bi)
>   
>           if ( (strlen(acpi_param) == 0) && acpi_disabled )
>           {
> -            printk("ACPI is disabled, notifying Domain 0 (acpi=off)\n");
> +            printk("ACPI is disabled, notifying domain %pd (acpi=off)\n", d);
>               safe_strcpy(acpi_param, "off");
>           }
>   
> @@ -1053,7 +1056,7 @@ static struct domain *__init create_dom0(struct boot_info *bi)
>   
>       bd->d = d;
>       if ( construct_dom0(bd) != 0 )
> -        panic("Could not construct domain 0\n");
> +        panic("Could not construct domain %pd\n", d);
>   
>       return d;
>   }
> diff --git a/xen/common/domain.c b/xen/common/domain.c
> index abf1969e60..7c0f7a4990 100644
> --- a/xen/common/domain.c
> +++ b/xen/common/domain.c
> @@ -66,6 +66,57 @@ DEFINE_RCU_READ_LOCK(domlist_read_lock);
>   static struct domain *domain_hash[DOMAIN_HASH_SIZE];
>   struct domain *domain_list;
>   
> +/* Domain ID allocator */
> +static unsigned int domid_last;
> +
> +static inline bool is_free_domid(domid_t dom)
> +{
> +    struct domain *d = rcu_lock_domain_by_id(dom);
> +
> +    if ( d )
> +        rcu_unlock_domain(d);
> +
> +    return !d;
> +}
> +
> +/*
> + * Allocate new domain ID based on the hint.

Maybe clarify this should not be used for system domains?

> + *
> + * If hint is outside of valid [0..DOMID_FIRST_RESERVED - 1] range of IDs,
> + * perform an exhaustive search starting from the end of the used domain ID
> + * range, excluding hardware_domid.
> + */
> +domid_t domid_alloc(domid_t hint)

 From the name, my naive expectation is a second call to domid_alloc() 
(whether concurrent or not) would return a different domid. However, 
AFAICT, this is not the case.

I am in two mind whether this is the right interface to have. I think 
the minimum would be to clarify the expectation from the callers.

> +{
> +    domid_t domid = DOMID_INVALID;
> +
> +    if ( hint < DOMID_FIRST_RESERVED )
> +    {
> +        /* Exact match. */
> +        if ( is_free_domid(hint) )
> +            domid = hint;
> +    }
> +    else
> +    {
> +        for ( domid = domid_last + 1; domid != domid_last; domid++ )
> +        {
> +            if ( domid == DOMID_FIRST_RESERVED )
> +                domid = 0;
> +
> +            if ( domid == hardware_domid )
> +                continue;
> +
> +            if ( is_free_domid(domid) )
> +                break;
> +        }
> +
> +        if ( domid != domid_last )
> +            domid_last = domid;
> +    }
> +
> +    return domid;
> +}
> +
>   /*
>    * Insert a domain into the domlist/hash.  This allows the domain to be looked
>    * up by domid, and therefore to be the subject of hypercalls/etc.
> diff --git a/xen/common/domctl.c b/xen/common/domctl.c
> index bfe2e1f9f0..2e02139660 100644
> --- a/xen/common/domctl.c
> +++ b/xen/common/domctl.c
> @@ -49,20 +49,6 @@ static int xenctl_bitmap_to_nodemask(nodemask_t *nodemask,
>                                      MAX_NUMNODES);
>   }
>   
> -static inline int is_free_domid(domid_t dom)
> -{
> -    struct domain *d;
> -
> -    if ( dom >= DOMID_FIRST_RESERVED )
> -        return 0;
> -
> -    if ( (d = rcu_lock_domain_by_id(dom)) == NULL )
> -        return 1;
> -
> -    rcu_unlock_domain(d);
> -    return 0;
> -}
> -
>   void getdomaininfo(struct domain *d, struct xen_domctl_getdomaininfo *info)
>   {
>       struct vcpu *v;
> @@ -421,34 +407,15 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl)
>   
>       case XEN_DOMCTL_createdomain:
>       {
> -        domid_t        dom;
> -        static domid_t rover = 0;
> +        domid_t domid = domid_alloc(op->domain);
>   
> -        dom = op->domain;
> -        if ( (dom > 0) && (dom < DOMID_FIRST_RESERVED) )
> +        if ( domid == DOMID_INVALID )
>           {
>               ret = -EEXIST;
> -            if ( !is_free_domid(dom) )
> -                break;
> -        }
> -        else
> -        {
> -            for ( dom = rover + 1; dom != rover; dom++ )
> -            {
> -                if ( dom == DOMID_FIRST_RESERVED )
> -                    dom = 1;
> -                if ( is_free_domid(dom) )
> -                    break;
> -            }
> -
> -            ret = -ENOMEM;
> -            if ( dom == rover )
> -                break;
> -
> -            rover = dom;
> +            break;
>           }
>   
> -        d = domain_create(dom, &op->u.createdomain, false);
> +        d = domain_create(domid, &op->u.createdomain, false);
>           if ( IS_ERR(d) )
>           {
>               ret = PTR_ERR(d);
> diff --git a/xen/include/xen/domain.h b/xen/include/xen/domain.h
> index e10baf2615..43e9411fc0 100644
> --- a/xen/include/xen/domain.h
> +++ b/xen/include/xen/domain.h
> @@ -38,6 +38,8 @@ void arch_get_domain_info(const struct domain *d,
>   
>   domid_t get_initial_domain_id(void);
>   
> +domid_t domid_alloc(domid_t hint);
> +
>   /* CDF_* constant. Internal flags for domain creation. */
>   /* Is this a privileged domain? */
>   #define CDF_privileged           (1U << 0)

Cheers,

-- 
Julien Grall



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper 
Subject: [PATCH v2] x86/intel: workaround several MONITOR/MWAIT errata
Date: Wed, 23 Apr 2025 13:32:15 +0200
Message-ID: <20250423113215.80755-1-roger.pau@citrix.com>
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There are several errata on Intel regarding the usage of the MONITOR/MWAIT
instructions, all having in common that stores to the monitored region
might not wake up the CPU.

Fix them by forcing the sending of an IPI for the affected models.

The Ice Lake issue has been reproduced internally on XenServer hardware,
and the fix does seem to prevent it.  The symptom was APs getting stuck in
the idle loop immediately after bring up, which in turn prevented the BSP
from making progress.  This would happen before the watchdog was
initialized, and hence the whole system would get stuck.

Signed-off-by: Roger Pau Monné 
---
Apollo and Lunar Lake fixes have not been tested, due to lack of hardware.
---
Changes since v1:
 - Only probe for the errata at boot.
 - Use Intel model names instead of raw values.
 - Make force_mwait_ipi_wakeup __ro_after_init.
---
 xen/arch/x86/acpi/cpu_idle.c     |  6 ++++++
 xen/arch/x86/cpu/intel.c         | 36 +++++++++++++++++++++++++++++++-
 xen/arch/x86/include/asm/mwait.h |  3 +++
 3 files changed, 44 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/acpi/cpu_idle.c b/xen/arch/x86/acpi/cpu_idle.c
index 420198406def..1dbf15b01ed7 100644
--- a/xen/arch/x86/acpi/cpu_idle.c
+++ b/xen/arch/x86/acpi/cpu_idle.c
@@ -441,8 +441,14 @@ void cpuidle_wakeup_mwait(cpumask_t *mask)
     cpumask_andnot(mask, mask, &target);
 }
 
+/* Force sending of a wakeup IPI regardless of mwait usage. */
+bool __ro_after_init force_mwait_ipi_wakeup;
+
 bool arch_skip_send_event_check(unsigned int cpu)
 {
+    if ( force_mwait_ipi_wakeup )
+        return false;
+
     /*
      * This relies on softirq_pending() and mwait_wakeup() to access data
      * on the same cache line.
diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c
index 6a680ba38dc9..6c8377d08428 100644
--- a/xen/arch/x86/cpu/intel.c
+++ b/xen/arch/x86/cpu/intel.c
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -368,7 +369,6 @@ static void probe_c3_errata(const struct cpuinfo_x86 *c)
         INTEL_FAM6_MODEL(0x25),
         { }
     };
-#undef INTEL_FAM6_MODEL
 
     /* Serialized by the AP bringup code. */
     if ( max_cstate > 1 && (c->apicid & (c->x86_num_siblings - 1)) &&
@@ -380,6 +380,38 @@ static void probe_c3_errata(const struct cpuinfo_x86 *c)
     }
 }
 
+/*
+ * APL30: One use of the MONITOR/MWAIT instruction pair is to allow a logical
+ * processor to wait in a sleep state until a store to the armed address range
+ * occurs. Due to this erratum, stores to the armed address range may not
+ * trigger MWAIT to resume execution.
+ *
+ * ICX143: Under complex microarchitectural conditions, a monitor that is armed
+ * with the MWAIT instruction may not be triggered, leading to a processor
+ * hang.
+ *
+ * LNL030: Problem P-cores may not exit power state Core C6 on monitor hit.
+ *
+ * Force the sending of an IPI in those cases.
+ */
+static void __init probe_mwait_errata(void)
+{
+    static const struct x86_cpu_id models[] = {
+        INTEL_FAM6_MODEL(INTEL_FAM6_ATOM_GOLDMONT), /* APL30  */
+        INTEL_FAM6_MODEL(INTEL_FAM6_ICELAKE_X),     /* ICX143 */
+        INTEL_FAM6_MODEL(INTEL_FAM6_LUNARLAKE_M),   /* LNL030 */
+        { }
+    };
+#undef INTEL_FAM6_MODEL
+
+    if ( boot_cpu_has(X86_FEATURE_MONITOR) && x86_match_cpu(models) )
+    {
+        printk(XENLOG_WARNING
+               "Forcing IPI MWAIT wakeup due to CPU erratum\n");
+        force_mwait_ipi_wakeup = true;
+    }
+}
+
 /*
  * P4 Xeon errata 037 workaround.
  * Hardware prefetcher may cause stale data to be loaded into the cache.
@@ -406,6 +438,8 @@ static void Intel_errata_workarounds(struct cpuinfo_x86 *c)
 		__set_bit(X86_FEATURE_CLFLUSH_MONITOR, c->x86_capability);
 
 	probe_c3_errata(c);
+	if (system_state < SYS_STATE_active && c == &boot_cpu_data)
+		probe_mwait_errata();
 }
 
 
diff --git a/xen/arch/x86/include/asm/mwait.h b/xen/arch/x86/include/asm/mwait.h
index 000a692f6d19..c52cd3f51011 100644
--- a/xen/arch/x86/include/asm/mwait.h
+++ b/xen/arch/x86/include/asm/mwait.h
@@ -13,6 +13,9 @@
 
 #define MWAIT_ECX_INTERRUPT_BREAK	0x1
 
+/* Force sending of a wakeup IPI regardless of mwait usage. */
+extern bool force_mwait_ipi_wakeup;
+
 void mwait_idle_with_hints(unsigned int eax, unsigned int ecx);
 #ifdef CONFIG_INTEL
 bool mwait_pc10_supported(void);
-- 
2.48.1



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On Fri Apr 18, 2025 at 10:16 PM BST, dmkhn wrote:
> On Thu, Apr 17, 2025 at 01:48:23PM +0100, Alejandro Vallejo wrote:
>> From: "Daniel P. Smith" 
>>=20
>> Add a container for the "cooked" command line for a domain. This
>> provides for the backing memory to be directly associated with the
>> domain being constructed.  This is done in anticipation that the domain
>> construction path may need to be invoked multiple times, thus ensuring
>> each instance had a distinct memory allocation.
>>=20
>> Signed-off-by: Daniel P. Smith 
>> Signed-off-by: Jason Andryuk 
>> Signed-off-by: Alejandro Vallejo 
>
>
> Reviewed-by: Denis Mukhin 

Thanks

>> diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build=
.c
>> index 2a094b3145..49832f921c 100644
>> --- a/xen/arch/x86/hvm/dom0_build.c
>> +++ b/xen/arch/x86/hvm/dom0_build.c
>> @@ -778,21 +777,21 @@ static int __init pvh_load_kernel(
>>      /* Free temporary buffers. */
>>      free_boot_modules();
>>=20
>> -    if ( cmdline !=3D NULL )
>> +    rc =3D hvm_copy_to_guest_phys(last_addr, bd->cmdline, cmdline_len, =
v);
>> +    if ( rc )
>>      {
>> -        rc =3D hvm_copy_to_guest_phys(last_addr, cmdline, strlen(cmdlin=
e) + 1, v);
>> -        if ( rc )
>> -        {
>> -            printk("Unable to copy guest command line\n");
>> -            return rc;
>> -        }
>> -        start_info.cmdline_paddr =3D last_addr;
>> -        /*
>> -         * Round up to 32/64 bits (depending on the guest kernel bitnes=
s) so
>> -         * the modlist/start_info is aligned.
>> -         */
>> -        last_addr +=3D elf_round_up(&elf, strlen(cmdline) + 1);
>> +        printk("Unable to copy guest command line\n");
>
> Side note: I think it makes sense to add domain ID to all printouts in
> pvh_load_kernel(). E.g. block under elf_xen_parse() logs domain ID.

Sounds sensible and easy enough. Sure.

Cheers,
Alejandro


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Date: Wed, 23 Apr 2025 13:44:51 +0200
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Subject: Re: [PATCH v1 08/14] xen/riscv: imsic_init() implementation
To: Jan Beulich 
References: 
 <09e0fcd64f97062441a68102ead520b818150fe9.1744126720.git.oleksii.kurochko@gmail.com>
 <78fa2ed0-57a2-4990-bc9c-8fa52e41420a@suse.com>
 
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Content-Language: en-US
From: Oleksii Kurochko 
Cc: xen-devel@lists.xenproject.org,
 Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini 
In-Reply-To: <9a13c625-cd33-485d-a91f-9f005522b5a4@suse.com>

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On 4/16/25 8:31 AM, Jan Beulich wrote:
>>>> +    }
>>>> +
>>>> +    imsic_cfg.base_addr = base_addr;
>>>> +    imsic_cfg.base_addr &= ~(BIT(imsic_cfg.guest_index_bits +
>>>> +                   imsic_cfg.hart_index_bits +
>>>> +                   IMSIC_MMIO_PAGE_SHIFT, UL) - 1);
>>>> +    imsic_cfg.base_addr &= ~((BIT(imsic_cfg.group_index_bits, UL) - 1) <<
>>>> +                   imsic_cfg.group_index_shift);
>>> Besides indentation being bogus here, why is it that you need to mask bits
>>> off of the value read from DT? Wouldn't the expectation be that you get back
>>> the true base address?
>> The group index is used to differentiate between clusters/groups. For
>> example, consider two clusters: - Cluster 1 with cpu0 and cpu1 - Cluster
>> 2 with cpu2 and cpu3 Then, the reg property in the IMSIC node will
>> include two entries: reg = <0x0 0xd100000 0x0 0x20000>, <0x0 0x2d100000
>> 0x0 0x20000>; riscv,guest-index-bits = <3>; riscv,hart-index-bits = <2>;
>> riscv,group-index-bits = <1>; riscv,group-index-shift = <29>; In this
>> example: The group index is 1 bit wide (group-index-bits = <1>), It is
>> located at bit 29 (group-index-shift = <29>) of the address.
>>
>> so imsic_cfg.group_index_bits will be used to distinguish clusters, but
>> they must have
>>
>> the same base address and this is the reason why the mask is applied.
> Well, yes, but that doesn't answer my question. All of what you say makes
> sense for the loop elsewhere retrieving all the addresses. Here you
> retrieved only the first of them, and in your example no masking would be
> needed here either. To re-phrase my question: Can the address observed in
> the first entry be other than the lowest one across the set of all
> entries?

It doesn't mentioned explicitly in riscv,imsiscs binding that reg property
is sorted.
I can write:
   reg = <0x0 0x2d100000 0x0 0x20000>,<0x0 0xd100000 0x0 0x20000>;
And a dtc compiler will compile.

> If not, can there be bits set across all entries that need
> masking off from all of them?

I think that other bits (Hart Index and Guest Index) excepts base address
bits are 0 in dts, but it doesn't guarantee explicitly by IMSIC's dts bindinding.

>
>>>> --- /dev/null
>>>> +++ b/xen/arch/riscv/include/asm/imsic.h
>>>> @@ -0,0 +1,66 @@
>>>> +/* SPDX-License-Identifier: MIT */
>>>> +
>>>> +/*
>>>> + * xen/arch/riscv/imsic.h
>>>> + *
>>>> + * RISC-V Incoming MSI Controller support
>>>> + *
>>>> + * (c) 2023 Microchip Technology Inc.
>>>> + */
>>>> +
>>>> +#ifndef ASM__RISCV__IMSIC_H
>>>> +#define ASM__RISCV__IMSIC_H
>>>> +
>>>> +#include 
>>>> +
>>>> +#define IMSIC_MMIO_PAGE_SHIFT   12
>>>> +#define IMSIC_MMIO_PAGE_SZ      (1UL << IMSIC_MMIO_PAGE_SHIFT)
>>>> +
>>>> +#define IMSIC_MIN_ID            63
>>>> +#define IMSIC_MAX_ID            2048
>>>> +
>>>> +struct imsic_msi {
>>>> +    paddr_t base_addr;
>>>> +    unsigned long offset;
>>>> +};
>>>> +
>>>> +struct imsic_mmios {
>>>> +    paddr_t base_addr;
>>>> +    unsigned long size;
>>>> +    bool harts[NR_CPUS];
>>> An array of bool - won't a bitmap do here? Even then I wouldn't be overly
>>> happy to see it dimensioned by NR_CPUS.
>> Bitmap will fit here well. But for DECLARE_BITMAP() is necessary the size
>> of bitmap so NR_CPUS should be used again.
>> Could you please remind me why it isn't good to use it?
>> Because NR_CPUS not always equal to an amount of physical cpus?
> "Not equal" wouldn't be overly problematic. But NR_CPUS=4000 and the actual
> number of CPUs being 4 would be wasteful in general. More when its wider
> than a bit that's needed per CPU, but where would you draw the line if you
> permitted use of NR_CPUS here?

Hard to say. It seems it will be just better to use apporoach you suggested below.

Thanks.

~ Oleksii

>
>> Should I use non-static version of bitmap declaration? (if we have such...)
> That's simply "unsigned long *" then, or - at the tail of a dynamically
> allocated struct - possibly unsigned long[].
>
>>>> +};
>>>> +
>>>> +struct imsic_config {
>>>> +    /* base address */
>>>> +    paddr_t base_addr;
>>>> +
>>>> +    /* Bits representing Guest index, HART index, and Group index */
>>>> +    unsigned int guest_index_bits;
>>>> +    unsigned int hart_index_bits;
>>>> +    unsigned int group_index_bits;
>>>> +    unsigned int group_index_shift;
>>>> +
>>>> +    /* imsic phandle */
>>>> +    unsigned int phandle;
>>>> +
>>>> +    /* number of parent irq */
>>>> +    unsigned int nr_parent_irqs;
>>>> +
>>>> +    /* number off interrupt identities */
>>>> +    unsigned int nr_ids;
>>>> +
>>>> +    /* mmios */
>>>> +    unsigned int nr_mmios;
>>>> +    struct imsic_mmios *mmios;
>>>> +
>>>> +    /* MSI */
>>>> +    struct imsic_msi msi[NR_CPUS];
>>> You surely can avoid wasting perhaps a lot of memory by allocating this
>>> based on the number of CPUs in use?
>> It make sense. I'll allocate then this dynamically.
> Or, as per above, when put at the tail and the struct itself is
> dynamically allocated, use struct imsic_msi[]. We even have dedicated
> xmalloc() flavors for this kind of allocation.
>
> Jan
--------------OrBOZ4ftxDt0AfC0M38iDzUz
Content-Type: text/html; charset=UTF-8
Content-Transfer-Encoding: 7bit



  
    
  
  
    


    

    
On 4/16/25 8:31 AM, Jan Beulich wrote:

    

      

        

          

            
+    }
+
+    imsic_cfg.base_addr = base_addr;
+    imsic_cfg.base_addr &= ~(BIT(imsic_cfg.guest_index_bits +
+                   imsic_cfg.hart_index_bits +
+                   IMSIC_MMIO_PAGE_SHIFT, UL) - 1);
+    imsic_cfg.base_addr &= ~((BIT(imsic_cfg.group_index_bits, UL) - 1) <<
+                   imsic_cfg.group_index_shift);


          

          
Besides indentation being bogus here, why is it that you need to mask bits
off of the value read from DT? Wouldn't the expectation be that you get back
the true base address?


        

        
The group index is used to differentiate between clusters/groups. For 
example, consider two clusters: - Cluster 1 with cpu0 and cpu1 - Cluster 
2 with cpu2 and cpu3 Then, the reg property in the IMSIC node will 
include two entries: reg = <0x0 0xd100000 0x0 0x20000>, <0x0 0x2d100000 
0x0 0x20000>; riscv,guest-index-bits = <3>; riscv,hart-index-bits = <2>; 
riscv,group-index-bits = <1>; riscv,group-index-shift = <29>; In this 
example: The group index is 1 bit wide (group-index-bits = <1>), It is 
located at bit 29 (group-index-shift = <29>) of the address.

so imsic_cfg.group_index_bits will be used to distinguish clusters, but 
they must have

the same base address and this is the reason why the mask is applied.


      

      
Well, yes, but that doesn't answer my question. All of what you say makes
sense for the loop elsewhere retrieving all the addresses. Here you
retrieved only the first of them, and in your example no masking would be
needed here either. To re-phrase my question: Can the address observed in
the first entry be other than the lowest one across the set of all
entries? 

    

    
It doesn't mentioned explicitly in riscv,imsiscs binding that reg property
is sorted. 
I can write:
  reg = <0x0 0x2d100000 0x0 0x20000>,<0x0 0xd100000 0x0 0x20000>;
And a dtc compiler will compile.



    

      
If not, can there be bits set across all entries that need
masking off from all of them?

    

    
I think that other bits (Hart Index and Guest Index) excepts base address
bits are 0 in dts, but it doesn't guarantee explicitly by IMSIC's dts bindinding.



    

      



      

        

          

            
--- /dev/null
+++ b/xen/arch/riscv/include/asm/imsic.h
@@ -0,0 +1,66 @@
+/* SPDX-License-Identifier: MIT */
+
+/*
+ * xen/arch/riscv/imsic.h
+ *
+ * RISC-V Incoming MSI Controller support
+ *
+ * (c) 2023 Microchip Technology Inc.
+ */
+
+#ifndef ASM__RISCV__IMSIC_H
+#define ASM__RISCV__IMSIC_H
+
+#include <xen/types.h>
+
+#define IMSIC_MMIO_PAGE_SHIFT   12
+#define IMSIC_MMIO_PAGE_SZ      (1UL << IMSIC_MMIO_PAGE_SHIFT)
+
+#define IMSIC_MIN_ID            63
+#define IMSIC_MAX_ID            2048
+
+struct imsic_msi {
+    paddr_t base_addr;
+    unsigned long offset;
+};
+
+struct imsic_mmios {
+    paddr_t base_addr;
+    unsigned long size;
+    bool harts[NR_CPUS];


          

          
An array of bool - won't a bitmap do here? Even then I wouldn't be overly
happy to see it dimensioned by NR_CPUS.


        

        
Bitmap will fit here well. But for DECLARE_BITMAP() is necessary the size
of bitmap so NR_CPUS should be used again.
Could you please remind me why it isn't good to use it?
Because NR_CPUS not always equal to an amount of physical cpus?


      

      
"Not equal" wouldn't be overly problematic. But NR_CPUS=4000 and the actual
number of CPUs being 4 would be wasteful in general. More when its wider
than a bit that's needed per CPU, but where would you draw the line if you
permitted use of NR_CPUS here?

    

    
Hard to say. It seems it will be just better to use apporoach you suggested below.

Thanks.

~ Oleksii


    

      



      

        
Should I use non-static version of bitmap declaration? (if we have such...)


      

      
That's simply "unsigned long *" then, or - at the tail of a dynamically
allocated struct - possibly unsigned long[].



      

        

          

            
+};
+
+struct imsic_config {
+    /* base address */
+    paddr_t base_addr;
+
+    /* Bits representing Guest index, HART index, and Group index */
+    unsigned int guest_index_bits;
+    unsigned int hart_index_bits;
+    unsigned int group_index_bits;
+    unsigned int group_index_shift;
+
+    /* imsic phandle */
+    unsigned int phandle;
+
+    /* number of parent irq */
+    unsigned int nr_parent_irqs;
+
+    /* number off interrupt identities */
+    unsigned int nr_ids;
+
+    /* mmios */
+    unsigned int nr_mmios;
+    struct imsic_mmios *mmios;
+
+    /* MSI */
+    struct imsic_msi msi[NR_CPUS];


          

          
You surely can avoid wasting perhaps a lot of memory by allocating this
based on the number of CPUs in use?


        

        
It make sense. I'll allocate then this dynamically.


      

      
Or, as per above, when put at the tail and the struct itself is
dynamically allocated, use struct imsic_msi[]. We even have dedicated
xmalloc() flavors for this kind of allocation.

Jan


    

  


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Date: Wed, 23 Apr 2025 12:52:58 +0100
Message-ID: 
CC: , "Daniel P. Smith"
	, Jan Beulich , "Andrew
 Cooper" , =?utf-8?q?Roger_Pau_Monn=C3=A9?=
	, Anthony PERARD , "Michal
 Orzel" , Julien Grall , "Stefano
 Stabellini" , Jason Andryuk 
Subject: Re: [PATCH v4 03/13] common/hyperlaunch: introduce the domain
 builder
From: Alejandro Vallejo 
To: 
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On Fri Apr 18, 2025 at 10:55 PM BST, dmkhn wrote:
> On Thu, Apr 17, 2025 at 01:48:25PM +0100, Alejandro Vallejo wrote:
>> From: "Daniel P. Smith" 
>>=20
>> Introduce the domain builder which is capable of consuming a device tree=
 as the
>> first boot module. If it finds a device tree as the first boot module, i=
t will
>> set its type to BOOTMOD_FDT. This change only detects the boot module an=
d
>> continues to boot with slight change to the boot convention that the dom=
0
>> kernel is no longer first boot module but is the second.
>>=20
>> No functional change intended.
>>=20
>> Signed-off-by: Daniel P. Smith 
>> Signed-off-by: Jason Andryuk 
>> Signed-off-by: Alejandro Vallejo 
>> ---
>> v4:
>>   * Moved from arch/x86/ to common/
>>   * gated all of domain-builder/ on CONFIG_BOOT_INFO
>>   * Hide the domain builder submenu for !X86
>>   * Factor out the "hyperlaunch_enabled =3D false" toggle core.c
>>   * Removed stub inline, as DCE makes it unnecessary
>>   * Adjusted printks.
>> ---
>>  xen/arch/x86/include/asm/bootinfo.h |  3 ++
>>  xen/arch/x86/setup.c                | 17 +++++----
>>  xen/common/Makefile                 |  1 +
>>  xen/common/domain-builder/Makefile  |  2 ++
>>  xen/common/domain-builder/core.c    | 56 +++++++++++++++++++++++++++++
>>  xen/common/domain-builder/fdt.c     | 37 +++++++++++++++++++
>>  xen/common/domain-builder/fdt.h     | 12 +++++++
>>  xen/include/xen/domain-builder.h    |  9 +++++
>>  8 files changed, 131 insertions(+), 6 deletions(-)
>>  create mode 100644 xen/common/domain-builder/Makefile
>>  create mode 100644 xen/common/domain-builder/core.c
>>  create mode 100644 xen/common/domain-builder/fdt.c
>>  create mode 100644 xen/common/domain-builder/fdt.h
>>  create mode 100644 xen/include/xen/domain-builder.h
>>=20
>> diff --git a/xen/arch/x86/include/asm/bootinfo.h b/xen/arch/x86/include/=
asm/bootinfo.h
>> index 3afc214c17..82c2650fcf 100644
>> --- a/xen/arch/x86/include/asm/bootinfo.h
>> +++ b/xen/arch/x86/include/asm/bootinfo.h
>> @@ -27,6 +27,7 @@ enum bootmod_type {
>>      BOOTMOD_RAMDISK,
>>      BOOTMOD_MICROCODE,
>>      BOOTMOD_XSM_POLICY,
>> +    BOOTMOD_FDT,
>>  };
>>=20
>>  struct boot_module {
>> @@ -80,6 +81,8 @@ struct boot_info {
>>      paddr_t memmap_addr;
>>      size_t memmap_length;
>>=20
>> +    bool hyperlaunch_enabled;
>> +
>>      unsigned int nr_modules;
>>      struct boot_module mods[MAX_NR_BOOTMODS + 1];
>>      struct boot_domain domains[MAX_NR_BOOTDOMS];
>> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
>> index 4df012460d..ccc57cc70a 100644
>> --- a/xen/arch/x86/setup.c
>> +++ b/xen/arch/x86/setup.c
>> @@ -5,6 +5,7 @@
>>  #include 
>>  #include 
>>  #include 
>> +#include 
>>  #include 
>>  #include 
>>  #include 
>> @@ -1282,9 +1283,12 @@ void asmlinkage __init noreturn __start_xen(void)
>>                 bi->nr_modules);
>>      }
>>=20
>> -    /* Dom0 kernel is always first */
>> -    bi->mods[0].type =3D BOOTMOD_KERNEL;
>> -    bi->domains[0].kernel =3D &bi->mods[0];
>> +    builder_init(bi);
>> +
>> +    /* Find first unknown boot module to use as dom0 kernel */
>> +    i =3D first_boot_module_index(bi, BOOTMOD_UNKNOWN);
>> +    bi->mods[i].type =3D BOOTMOD_KERNEL;
>> +    bi->domains[0].kernel =3D &bi->mods[i];
>
> Nit: perhaps add convenience aliases for bi->domains[0] (e.g. dom0) and=
=20
> for bi->mods[0] (e.g. mod)?

Inside the boot_info? As in separate aliasing pointers into the arrays?
I'd rather not. It'd be dangerous on systems without an actual dom0.

The PV shim comes to mind, but other configurations might arise in the
future where no domain holds the id of 0.

>
>>=20
>>      if ( pvh_boot )
>>      {
>> @@ -1467,8 +1471,9 @@ void asmlinkage __init noreturn __start_xen(void)
>>          xen->size  =3D __2M_rwdata_end - _stext;
>>      }
>>=20
>> -    bi->mods[0].headroom =3D
>> -        bzimage_headroom(bootstrap_map_bm(&bi->mods[0]), bi->mods[0].si=
ze);
>> +    bi->domains[0].kernel->headroom =3D
>> +        bzimage_headroom(bootstrap_map_bm(bi->domains[0].kernel),
>> +                         bi->domains[0].kernel->size);
>>      bootstrap_unmap();
>>=20
>>  #ifndef highmem_start
>> @@ -1592,7 +1597,7 @@ void asmlinkage __init noreturn __start_xen(void)
>>  #endif
>>      }
>>=20
>> -    if ( bi->mods[0].headroom && !bi->mods[0].relocated )
>> +    if ( bi->domains[0].kernel->headroom && !bi->domains[0].kernel->rel=
ocated )
>>          panic("Not enough memory to relocate the dom0 kernel image\n");
>>      for ( i =3D 0; i < bi->nr_modules; ++i )
>>      {
>> diff --git a/xen/common/Makefile b/xen/common/Makefile
>> index 98f0873056..565837bc71 100644
>> --- a/xen/common/Makefile
>> +++ b/xen/common/Makefile
>> @@ -11,6 +11,7 @@ obj-$(filter-out $(CONFIG_X86),$(CONFIG_ACPI)) +=3D de=
vice.o
>>  obj-$(CONFIG_HAS_DEVICE_TREE) +=3D device-tree/
>>  obj-$(CONFIG_IOREQ_SERVER) +=3D dm.o
>>  obj-y +=3D domain.o
>> +obj-$(CONFIG_HAS_BOOT_INFO) +=3D domain-builder/
>>  obj-y +=3D event_2l.o
>>  obj-y +=3D event_channel.o
>>  obj-$(CONFIG_EVTCHN_FIFO) +=3D event_fifo.o
>> diff --git a/xen/common/domain-builder/Makefile b/xen/common/domain-buil=
der/Makefile
>> new file mode 100644
>> index 0000000000..b10cd56b28
>> --- /dev/null
>> +++ b/xen/common/domain-builder/Makefile
>> @@ -0,0 +1,2 @@
>> +obj-$(CONFIG_DOMAIN_BUILDER) +=3D fdt.init.o
>> +obj-y +=3D core.init.o
>> diff --git a/xen/common/domain-builder/core.c b/xen/common/domain-builde=
r/core.c
>> new file mode 100644
>> index 0000000000..a5b21fc179
>> --- /dev/null
>> +++ b/xen/common/domain-builder/core.c
>> @@ -0,0 +1,56 @@
>> +/* SPDX-License-Identifier: GPL-2.0-only */
>> +/*
>> + * Copyright (C) 2024, Apertus Solutions, LLC
>> + */
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +
>> +#include 
>> +
>> +#include "fdt.h"
>> +
>> +void __init builder_init(struct boot_info *bi)
>> +{
>> +    bi->hyperlaunch_enabled =3D false;
>> +
>> +    if ( IS_ENABLED(CONFIG_DOMAIN_BUILDER) )
>
> I would re-organize the code to remove one level of indentation, e.g.:
>
>        if ( !IS_ENABLED(CONFIG_DOMAIN_BUILDER) )
>             return;
>
>        switch ( ret =3D has_hyperlaunch_fdt(bi) )
>        ...
>
> or even add #ifdef CONFIG_DOMAIN_BUILDER for builder_init() in the header=
 file.
>
> What do you think?

In this patch it sounds good, but a later patch adds more stuff at the
tail of the function that must not be skipped, so it wouldn't work
as-is.

Another matter is whether this function could be skipped in the "no-fdt"
case, and it probably could. But I do know the longer series (big RFC
from Daniel) adds more common logic present when !CONFIG_DOMAIN_BUILDER,
so I'm reticent to deviate too much from it to avoid rebasing headaches.

>
>> +    {
>> +        int ret;
>> +
>> +        switch ( ret =3D has_hyperlaunch_fdt(bi) )
>> +        {
>> +        case 0:
>> +            printk(XENLOG_DEBUG "DT found: hyperlaunch\n");
>> +            bi->hyperlaunch_enabled =3D true;
>> +            bi->mods[0].type =3D BOOTMOD_FDT;
>> +            break;
>> +
>> +        case -EINVAL:
>> +            /* No DT found */
>> +            break;
>> +
>> +        case -ENOENT:
>> +        case -ENODATA:
>
> Looks like this code accounts for the follow on change: current implement=
ation
> only returns -EINVAL or 0.
>
> Is it possible to convert has_hyperlaunch_fdt() to a simple predicate?

The function is a misnomer and it ought to change to return an
enumerated type instead where it returns FDT_HYPERLAUNCH, FDT_DOM0LESS,
FDT_UNKNOWN or NO_FDT. Using error codes for identification is a tad too
hacky.

Cheers,
Alejandro


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Date: Wed, 23 Apr 2025 12:54:18 +0100
Message-ID: 
CC: , "Daniel P. Smith"
	, Jan Beulich , "Andrew
 Cooper" , =?utf-8?q?Roger_Pau_Monn=C3=A9?=
	, Anthony PERARD , "Michal
 Orzel" , Julien Grall , "Stefano
 Stabellini" , Jason Andryuk 
Subject: Re: [PATCH v4 04/13] x86/hyperlaunch: initial support for
 hyperlaunch device tree
From: Alejandro Vallejo 
To: 
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On Fri Apr 18, 2025 at 11:11 PM BST, dmkhn wrote:
> On Thu, Apr 17, 2025 at 01:48:26PM +0100, Alejandro Vallejo wrote:
>> From: "Daniel P. Smith" 
>>=20
>> Add the ability to detect both a formal hyperlaunch device tree or a dom=
0less
>> device tree. If the hyperlaunch device tree is found, then count the num=
ber of
>> domain entries, reporting an error if more than one is found.
>>=20
>> Signed-off-by: Daniel P. Smith 
>> Signed-off-by: Jason Andryuk 
>> Signed-off-by: Alejandro Vallejo 
>> ---
>> v4:
>>   * Panic if we're booting on hyperlaunch, but walking the DTB fails.
>>   * Remove inconsequential "else" clause in fdt.c
>>   * Remove stub, as it's not required due to DCE
>>   * Use min() rather than open-code it
>> ---
>>  xen/arch/x86/include/asm/bootinfo.h |  1 +
>>  xen/common/domain-builder/core.c    | 11 +++++
>>  xen/common/domain-builder/fdt.c     | 63 +++++++++++++++++++++++++++++
>>  xen/common/domain-builder/fdt.h     |  1 +
>>  4 files changed, 76 insertions(+)
>>=20
>> diff --git a/xen/arch/x86/include/asm/bootinfo.h b/xen/arch/x86/include/=
asm/bootinfo.h
>> index 82c2650fcf..1e3d582e45 100644
>> --- a/xen/arch/x86/include/asm/bootinfo.h
>> +++ b/xen/arch/x86/include/asm/bootinfo.h
>> @@ -84,6 +84,7 @@ struct boot_info {
>>      bool hyperlaunch_enabled;
>>=20
>>      unsigned int nr_modules;
>> +    unsigned int nr_domains;
>>      struct boot_module mods[MAX_NR_BOOTMODS + 1];
>>      struct boot_domain domains[MAX_NR_BOOTDOMS];
>>  };
>> diff --git a/xen/common/domain-builder/core.c b/xen/common/domain-builde=
r/core.c
>> index a5b21fc179..3b062e85ec 100644
>> --- a/xen/common/domain-builder/core.c
>> +++ b/xen/common/domain-builder/core.c
>> @@ -43,6 +43,17 @@ void __init builder_init(struct boot_info *bi)
>>              break;
>>          }
>>      }
>> +
>> +    if ( bi->hyperlaunch_enabled )
>> +    {
>> +        int ret;
>> +
>> +        printk(XENLOG_INFO "Hyperlaunch configuration:\n");
>> +        if ( (ret =3D walk_hyperlaunch_fdt(bi)) < 0 )
>> +            panic("Walk of device tree failed (%d)\n", ret);
>> +
>> +        printk(XENLOG_INFO "  number of domains: %u\n", bi->nr_domains)=
;
>> +    }
>>  }
>>=20
>>  /*
>> diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder=
/fdt.c
>> index aaf8c1cc16..b5ff8220da 100644
>> --- a/xen/common/domain-builder/fdt.c
>> +++ b/xen/common/domain-builder/fdt.c
>> @@ -13,6 +13,36 @@
>>=20
>>  #include "fdt.h"
>>=20
>> +static int __init find_hyperlaunch_node(const void *fdt)
>> +{
>> +    int hv_node =3D fdt_path_offset(fdt, "/chosen/hypervisor");
>> +
>> +    if ( hv_node >=3D 0 )
>> +    {
>> +        /* Anything other than zero indicates no match */
>> +        if ( fdt_node_check_compatible(fdt, hv_node, "hypervisor,xen") =
)
>> +            return -ENODATA;
>> +
>> +        return hv_node;
>> +    }
>> +    else
>> +    {
>> +        /* Look for dom0less config */
>> +        int node, chosen_node =3D fdt_path_offset(fdt, "/chosen");
>> +
>> +        if ( chosen_node < 0 )
>> +            return -ENOENT;
>> +
>> +        fdt_for_each_subnode(node, fdt, chosen_node)
>> +        {
>> +            if ( !fdt_node_check_compatible(fdt, node, "xen,domain") )
>> +                return chosen_node;
>> +        }
>> +    }
>> +
>> +    return -ENODATA;
>> +}
>> +
>>  int __init has_hyperlaunch_fdt(const struct boot_info *bi)
>>  {
>>      int ret =3D 0;
>> @@ -20,7 +50,40 @@ int __init has_hyperlaunch_fdt(const struct boot_info=
 *bi)
>>=20
>>      if ( !fdt || fdt_check_header(fdt) < 0 )
>>          ret =3D -EINVAL;
>> +    else
>> +        ret =3D find_hyperlaunch_node(fdt);
>> +
>> +    bootstrap_unmap();
>> +
>> +    return min(0, ret);
>> +}
>> +
>> +int __init walk_hyperlaunch_fdt(struct boot_info *bi)
>> +{
>> +    int ret =3D 0, hv_node, node;
>> +    const void *fdt =3D bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_I=
DX]);
>> +
>> +    if ( unlikely(!fdt) )
>> +        return -EINVAL;
>
> I think this check can be converted to ASSERT() since walk_hyperlaunch_fd=
t()
> will be called after has_hyperlaunch_fdt() where condition is checked.

True that.

Cheers,
Alejandro


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Date: Wed, 23 Apr 2025 13:04:19 +0100
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Subject: Re: [PATCH 6/8] xen/livepatch: Support new altcall scheme
To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
Cc: Xen-devel ,
 Jan Beulich , Ross Lagerwall 
References: <20250423010237.1528582-1-andrew.cooper3@citrix.com>
 <20250423010237.1528582-7-andrew.cooper3@citrix.com>
 
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From: Andrew Cooper 
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On 23/04/2025 12:16 pm, Roger Pau Monné wrote:
> On Wed, Apr 23, 2025 at 02:02:35AM +0100, Andrew Cooper wrote:
>> The new altcall scheme uses an .alt_call_sites section.  Wire this up in very
>> much the same way as the .altinstructions section, although there is less
>> sanity checking necessary.
>>
>> Signed-off-by: Andrew Cooper 
> Reviewed-by: Roger Pau Monné 

Thanks.

>
> One nit/comment below.
>
>> ---
>> CC: Jan Beulich 
>> CC: Roger Pau Monné 
>> CC: Ross Lagerwall 
>> ---
>>  xen/arch/x86/alternative.c         |  6 ++++
>>  xen/common/livepatch.c             | 58 ++++++++++++++++++++++++++++++
>>  xen/include/xen/alternative-call.h |  8 +++--
>>  3 files changed, 70 insertions(+), 2 deletions(-)
>>
>> diff --git a/xen/arch/x86/alternative.c b/xen/arch/x86/alternative.c
>> index f6594e21a14c..22af224f08f7 100644
>> --- a/xen/arch/x86/alternative.c
>> +++ b/xen/arch/x86/alternative.c
>> @@ -479,6 +479,12 @@ int apply_alternatives(struct alt_instr *start, struct alt_instr *end)
>>  {
>>      return _apply_alternatives(start, end, true);
>>  }
>> +
>> +int livepatch_apply_alt_calls(const struct alt_call *start,
>> +                              const struct alt_call *end)
>> +{
>> +    return apply_alt_calls(start, end);
>> +}
>>  #endif
>>  
>>  #define ALT_INSNS (1U << 0)
>> diff --git a/xen/common/livepatch.c b/xen/common/livepatch.c
>> index 6ce77bf021b7..be9b7e367553 100644
>> --- a/xen/common/livepatch.c
>> +++ b/xen/common/livepatch.c
>> @@ -905,6 +905,64 @@ static int prepare_payload(struct payload *payload,
>>  #endif
>>      }
>>  
>> +    sec = livepatch_elf_sec_by_name(elf, ".alt_call_sites");
>> +    if ( sec )
>> +    {
>> +#ifdef CONFIG_ALTERNATIVE_CALL
>> +        const struct alt_call *a, *start, *end;
>> +
>> +        if ( !section_ok(elf, sec, sizeof(*a)) )
>> +            return -EINVAL;
>> +
>> +        /* Tolerate an empty .alt_call_sites section... */
>> +        if ( sec->sec->sh_size == 0 )
> You could possibly move this check to the outer `if` condition, and
> avoid the alt_call_done label?
>
> As even in the !CONFIG_ALTERNATIVE_CALL case skipping an empty section
> would be OK.

.altinstructions is like this.  It was put in as part of e74360e4ba4a, I
believe because it was decided that an empty section wasn't wanted.

We can revisit the decision, but the logic should be consistent.

~Andrew


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Date: Wed, 23 Apr 2025 13:12:03 +0100
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CC: , Andrew Cooper
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Subject: Re: [PATCH v4 05/13] x86/hyperlaunch: Add helpers to locate
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On Fri Apr 18, 2025 at 11:30 PM BST, dmkhn wrote:
> On Thu, Apr 17, 2025 at 01:48:27PM +0100, Alejandro Vallejo wrote:
>> Hyperlaunch mandates either a reg or module-index DT prop on nodes that
>> contain `multiboot,module" under their "compatible" prop. This patch
>> introduces a helper to generically find such index, appending the module
>> to the list of modules if it wasn't already (i.e: because it's given via
>> the "reg" prop).
>>=20
>> Signed-off-by: Jason Andryuk 
>> Signed-off-by: Alejandro Vallejo 
>> ---
>> v4:
>>   * Remove stray reg prop parser in libfdt-xen.h.
>>   * Remove fdt32_as_uX accessors.
>>   * Brough fdt_prop_as_u32() accesor from later patches.
>>     * So it can be used in place of a hardcoded fdt32_as_u32().
>>   * Limited MAX_NR_BOOTMODS to INT_MAX.
>>   * Preserved BOOTMOD_XEN on module append logic.
>>   * Add missing bounds check to module-index parsed in multiboot module =
helper.
>>   * Converted idx variable to uint32_t for better bounds checking.
>>   * Braces from switch statement to conform to coding style.
>>   * Added missing XENLOG_X.
>>   * Print address_cells and size_cells on error parsing reg properties.
>>   * Added (transient) missing declaration for extern helper.
>>     * becomes static on the next patch.
>> ---
>>  xen/common/domain-builder/fdt.c     | 162 ++++++++++++++++++++++++++++
>>  xen/common/domain-builder/fdt.h     |   2 +
>>  xen/include/xen/domain-builder.h    |   3 +
>>  xen/include/xen/libfdt/libfdt-xen.h |  11 ++
>>  4 files changed, 178 insertions(+)
>>=20
>> diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder=
/fdt.c
>> index b5ff8220da..d73536fed6 100644
>> --- a/xen/common/domain-builder/fdt.c
>> +++ b/xen/common/domain-builder/fdt.c
>> @@ -13,6 +13,168 @@
>>=20
>>  #include "fdt.h"
>>=20
>> +/*
>> + * Unpacks a "reg" property into its address and size constituents.
>> + *
>> + * @param prop          Pointer to an FDT "reg" property.
>> + * @param address_cells Number of 4-octet cells that make up an "addres=
s".
>> + * @param size_cells    Number of 4-octet cells that make up a "size".
>> + * @param p_addr[out]   Address encoded in the property.
>> + * @param p_size[out]   Size encoded in the property.
>> + * @returns             -EINVAL on malformed property, 0 otherwise.
>> + */
>> +static int __init read_fdt_prop_as_reg(const struct fdt_property *prop,
>
> I would do s/read_fdt_prop_as_reg/fdt_prop_as_reg/ similar to fdt_prop_as=
_u32()
> below.

Yes, that sounds better.

>
>> +                                       int address_cells, int size_cell=
s,
>> +                                       uint64_t *p_addr, uint64_t *p_si=
ze)
>> +{
>> +    const fdt32_t *cell =3D (const fdt32_t *)prop->data;
>> +    uint64_t addr, size;
>> +
>> +    if ( fdt32_to_cpu(prop->len) !=3D
>> +         (address_cells + size_cells) * sizeof(*cell) )
>> +    {
>> +        printk(XENLOG_ERR "  cannot read reg %lu+%lu from prop len %u\n=
",
>> +            address_cells * sizeof(*cell), size_cells * sizeof(*cell),
>> +            fdt32_to_cpu(prop->len));
>> +        return -EINVAL;
>> +    }
>> +
>> +    switch ( address_cells )
>> +    {
>> +    case 1:
>> +        addr =3D fdt32_to_cpu(*cell);
>> +        break;
>> +    case 2:
>> +        addr =3D fdt64_to_cpu(*(const fdt64_t *)cell);
>> +        break;
>> +    default:
>> +        printk(XENLOG_ERR "  unsupported address_cells=3D%d\n", address=
_cells);
>> +        return -EINVAL;
>> +    }
>> +
>> +    cell +=3D address_cells;
>> +    switch ( size_cells )
>> +    {
>> +    case 1:
>> +        size =3D fdt32_to_cpu(*cell);
>> +        break;
>> +    case 2:
>> +        size =3D fdt64_to_cpu(*(const fdt64_t *)cell);
>> +        break;
>> +    default:
>> +        printk(XENLOG_ERR "  unsupported size_cells=3D%d\n", size_cells=
);
>> +        return -EINVAL;
>> +    }
>> +
>> +    *p_addr =3D addr;
>> +    *p_size =3D size;
>> +
>> +    return 0;
>> +}
>> +
>> +/*
>> + * Locate a multiboot module given its node offset in the FDT.
>> + *
>> + * The module location may be given via either FDT property:
>> + *     * reg =3D 
>> + *         * Mutates `bi` to append the module.
>> + *     * module-index =3D 
>> + *         * Leaves `bi` unchanged.
>> + *
>> + * @param fdt           Pointer to the full FDT.
>> + * @param node          Offset for the module node.
>> + * @param address_cells Number of 4-octet cells that make up an "addres=
s".
>> + * @param size_cells    Number of 4-octet cells that make up a "size".
>> + * @param bi[inout]     Xen's representation of the boot parameters.
>> + * @return              -EINVAL on malformed nodes, otherwise
>> + *                      index inside `bi->mods`
>> + */
>> +int __init fdt_read_multiboot_module(const void *fdt, int node,
>> +                                     int address_cells, int size_cells,
>> +                                     struct boot_info *bi)
>> +{
>> +    const struct fdt_property *prop;
>> +    uint64_t addr, size;
>> +    int ret;
>> +    uint32_t idx;
>> +
>> +    if ( fdt_node_check_compatible(fdt, node, "multiboot,module") )
>> +    {
>> +        printk(XENLOG_ERR "  bad module. multiboot,module not found");
>> +        return -ENODATA;
>> +    }
>> +
>> +    /* Location given as a `module-index` property. */
>> +    if ( (prop =3D fdt_get_property(fdt, node, "module-index", NULL)) )
>> +    {
>> +        if ( fdt_get_property(fdt, node, "reg", NULL) )
>> +        {
>> +            printk(XENLOG_ERR "  found both reg and module-index for mo=
dule\n");
>> +            return -EINVAL;
>> +        }
>> +        if ( (ret =3D fdt_prop_as_u32(prop, &idx)) )
>> +        {
>> +            printk(XENLOG_ERR "  bad module-index prop\n");
>> +            return ret;
>> +        }
>> +        if ( idx >=3D MAX_NR_BOOTMODS )
>> +        {
>> +            printk(XENLOG_ERR "  module-index overflow. %s=3D%u\n",
>> +                   STR(MAX_NR_BOOTMODS), MAX_NR_BOOTMODS);
>> +            return -EINVAL;
>> +        }
>> +
>> +        return idx;
>> +    }
>> +
>> +    /* Otherwise location given as a `reg` property. */
>> +    if ( !(prop =3D fdt_get_property(fdt, node, "reg", NULL)) )
>> +    {
>> +        printk(XENLOG_ERR "  no location for multiboot,module\n");
>> +        return -EINVAL;
>> +    }
>> +    if ( fdt_get_property(fdt, node, "module-index", NULL) )
>> +    {
>> +        printk(XENLOG_ERR "  found both reg and module-index for module=
\n");
>> +        return -EINVAL;
>> +    }
>> +
>> +    ret =3D read_fdt_prop_as_reg(prop, address_cells, size_cells, &addr=
, &size);
>> +    if ( ret < 0 )
>> +    {
>> +        printk(XENLOG_ERR "  failed reading reg for multiboot,module\n"=
);
>> +        return -EINVAL;
>> +    }
>> +
>> +    idx =3D bi->nr_modules;
>> +    if ( idx > MAX_NR_BOOTMODS )
>> +    {
>> +        /*
>> +         * MAX_NR_BOOTMODS must fit in 31 bits so it's representable in=
 the
>> +         * positive side of an int; for the return value.
>> +         */
>> +        BUILD_BUG_ON(MAX_NR_BOOTMODS > (uint64_t)INT_MAX);
>> +        printk(XENLOG_ERR "  idx=3D%u exceeds len=3D%u\n", idx, MAX_NR_=
BOOTMODS);
>> +        return -EINVAL;
>> +    }
>> +
>> +    /*
>> +     * Append new module to the existing list
>> +     *
>> +     * Note that bi->nr_modules points to Xen itself, so we must shift =
it first
>> +     */
>> +    bi->nr_modules++;
>> +    bi->mods[bi->nr_modules] =3D bi->mods[idx];
>> +    bi->mods[idx] =3D (struct boot_module){
>> +        .start =3D addr,
>> +        .size =3D size,
>> +    };
>> +
>> +    printk(XENLOG_INFO "  module[%u]: addr %lx size %lx\n", idx, addr, =
size);
>> +
>> +    return idx;
>> +}
>> +
>>  static int __init find_hyperlaunch_node(const void *fdt)
>>  {
>>      int hv_node =3D fdt_path_offset(fdt, "/chosen/hypervisor");
>> diff --git a/xen/common/domain-builder/fdt.h b/xen/common/domain-builder=
/fdt.h
>> index 955aead497..8c98a256eb 100644
>> --- a/xen/common/domain-builder/fdt.h
>> +++ b/xen/common/domain-builder/fdt.h
>> @@ -2,6 +2,8 @@
>>  #ifndef __XEN_DOMAIN_BUILDER_FDT_H__
>>  #define __XEN_DOMAIN_BUILDER_FDT_H__
>>=20
>> +#include 
>> +
>>  struct boot_info;
>>=20
>>  /* hyperlaunch fdt is required to be module 0 */
>> diff --git a/xen/include/xen/domain-builder.h b/xen/include/xen/domain-b=
uilder.h
>> index ac2b84775d..ace6b6875b 100644
>> --- a/xen/include/xen/domain-builder.h
>> +++ b/xen/include/xen/domain-builder.h
>> @@ -5,5 +5,8 @@
>>  struct boot_info;
>>=20
>>  void builder_init(struct boot_info *bi);
>> +int fdt_read_multiboot_module(const void *fdt, int node,
>> +                              int address_cells, int size_cells,
>> +                              struct boot_info *bi)
>>=20
>>  #endif /* __XEN_DOMAIN_BUILDER_H__ */
>> diff --git a/xen/include/xen/libfdt/libfdt-xen.h b/xen/include/xen/libfd=
t/libfdt-xen.h
>> index a5340bc9f4..deafb25d98 100644
>> --- a/xen/include/xen/libfdt/libfdt-xen.h
>> +++ b/xen/include/xen/libfdt/libfdt-xen.h
>> @@ -12,6 +12,17 @@
>>  #define LIBFDT_XEN_H
>>=20
>>  #include 
>> +#include 
>> +
>> +static inline int __init fdt_prop_as_u32(
>> +    const struct fdt_property *prop, uint32_t *val)
>> +{
>> +    if ( !prop || fdt32_to_cpu(prop->len) < sizeof(u32) )
>> +        return -EINVAL;
>> +
>> +    *val =3D fdt32_to_cpu(*(const fdt32_t *)prop->data);
>> +    return 0;
>> +}
>
> My understanding is domain builder establishes its own shims around libfd=
t so
> libfdt is kept unmodified and it is easier to pick up libfdt updates.
>
> So, IMO, this function should reside in xen/common/domain-builder/fdt.c
>
> Thoughts?

Ugh. Too much code motion is not good for your head. I did mean to move
them all (I mentioned it in an earlier response to Jan, I think). Will
do for good this time.

Cheers,
Alejandro


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Date: Wed, 23 Apr 2025 13:16:43 +0100
Message-ID: 
From: Alejandro Vallejo 
To: 
CC: , "Daniel P. Smith"
	, Jan Beulich , "Andrew
 Cooper" , =?utf-8?q?Roger_Pau_Monn=C3=A9?=
	, Anthony PERARD , "Michal
 Orzel" , Julien Grall , "Stefano
 Stabellini" , Jason Andryuk 
Subject: Re: [PATCH v4 06/13] x86/hyperlaunch: locate dom0 kernel with
 hyperlaunch
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References: <20250417124844.11143-1-agarciav@amd.com>
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On Fri Apr 18, 2025 at 11:39 PM BST, dmkhn wrote:
> On Thu, Apr 17, 2025 at 01:48:28PM +0100, Alejandro Vallejo wrote:
>> From: "Daniel P. Smith" 
>>=20
>> Look for a subnode of type `multiboot,kernel` within a domain node. If
>> found, locate it using the multiboot module helper to generically ensure
>> it lives in the module list. If the bootargs property is present and
>> there was not an MB1 string, then use the command line from the device
>> tree definition.
>>=20
>> Signed-off-by: Daniel P. Smith 
>> Signed-off-by: Jason Andryuk 
>> Signed-off-by: Alejandro Vallejo 
>> ---
>> v4:
>>   * Stop printing on the fallback path of builder_init().
>>     It's in fact the most common path and just adds noise.
>>   * Add missing XENLOG_X.
>>   * Simplified check to log error on nr_domains !=3D 1.
>>   * s/XENLOG_ERR/XENLOG_WARNING/ on duplicate kernel.
>>   * Turned foo =3D=3D 0 into !foo in the "multiboot,kernel" check
>> ---
>>  xen/arch/x86/setup.c             |  5 ---
>>  xen/common/domain-builder/core.c |  9 +++++
>>  xen/common/domain-builder/fdt.c  | 64 ++++++++++++++++++++++++++++++--
>>  xen/include/xen/domain-builder.h |  3 --
>>  4 files changed, 70 insertions(+), 11 deletions(-)
>>=20
>> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
>> index ccc57cc70a..4f669f3c60 100644
>> --- a/xen/arch/x86/setup.c
>> +++ b/xen/arch/x86/setup.c
>> @@ -1285,11 +1285,6 @@ void asmlinkage __init noreturn __start_xen(void)
>>=20
>>      builder_init(bi);
>>=20
>> -    /* Find first unknown boot module to use as dom0 kernel */
>> -    i =3D first_boot_module_index(bi, BOOTMOD_UNKNOWN);
>> -    bi->mods[i].type =3D BOOTMOD_KERNEL;
>> -    bi->domains[0].kernel =3D &bi->mods[i];
>> -
>>      if ( pvh_boot )
>>      {
>>          /* pvh_init() already filled in e820_raw */
>> diff --git a/xen/common/domain-builder/core.c b/xen/common/domain-builde=
r/core.c
>> index 3b062e85ec..924cb495a3 100644
>> --- a/xen/common/domain-builder/core.c
>> +++ b/xen/common/domain-builder/core.c
>> @@ -54,6 +54,15 @@ void __init builder_init(struct boot_info *bi)
>>=20
>>          printk(XENLOG_INFO "  number of domains: %u\n", bi->nr_domains)=
;
>>      }
>> +    else
>> +    {
>> +        /* Find first unknown boot module to use as dom0 kernel */
>> +        unsigned int i =3D first_boot_module_index(bi, BOOTMOD_UNKNOWN)=
;
>> +
>> +        bi->mods[i].type =3D BOOTMOD_KERNEL;
>> +        bi->domains[0].kernel =3D &bi->mods[i];
>> +        bi->nr_domains =3D 1;
>> +    }
>>  }
>>=20
>>  /*
>> diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder=
/fdt.c
>> index d73536fed6..1fae6add3b 100644
>> --- a/xen/common/domain-builder/fdt.c
>> +++ b/xen/common/domain-builder/fdt.c
>> @@ -89,9 +89,9 @@ static int __init read_fdt_prop_as_reg(const struct fd=
t_property *prop,
>>   * @return              -EINVAL on malformed nodes, otherwise
>>   *                      index inside `bi->mods`
>>   */
>> -int __init fdt_read_multiboot_module(const void *fdt, int node,
>> -                                     int address_cells, int size_cells,
>> -                                     struct boot_info *bi)
>> +static int __init fdt_read_multiboot_module(const void *fdt, int node,
>> +                                            int address_cells, int size=
_cells,
>> +                                            struct boot_info *bi)
>>  {
>>      const struct fdt_property *prop;
>>      uint64_t addr, size;
>> @@ -175,6 +175,52 @@ int __init fdt_read_multiboot_module(const void *fd=
t, int node,
>>      return idx;
>>  }
>>=20
>> +static int __init process_domain_node(
>> +    struct boot_info *bi, const void *fdt, int dom_node)
>> +{
>> +    int node;
>> +    struct boot_domain *bd =3D &bi->domains[bi->nr_domains];
>> +    const char *name =3D fdt_get_name(fdt, dom_node, NULL) ?: "unknown"=
;
>> +    int address_cells =3D fdt_address_cells(fdt, dom_node);
>> +    int size_cells =3D fdt_size_cells(fdt, dom_node);
>> +
>> +    fdt_for_each_subnode(node, fdt, dom_node)
>> +    {
>> +        if ( !fdt_node_check_compatible(fdt, node, "multiboot,kernel") =
)
>
> Suggest to restructure the code to reduce levels of indentation, e.g.:
>
>            int idx;
>
>            if ( fdt_node_check_compatible(fdt, node, "multiboot,kernel") =
)
>                continue;
>
>            if ( bd->kernel )
>               ...
>

This hunk checking for "multiboot,kernel" is part of an if-elseif in a
later patch that also checks for "multiboot,ramdisk", so we can't just
do an early continue here without forcing a bigger diff later on.

>
>> +        {
>> +            int idx;
>> +
>> +            if ( bd->kernel )
>> +            {
>> +                printk(XENLOG_WARNING
>> +                       "  duplicate kernel for domain %s\n", name);
>> +                continue;
>> +            }
>> +
>> +            idx =3D fdt_read_multiboot_module(fdt, node, address_cells,
>> +                                            size_cells, bi);
>> +            if ( idx < 0 )
>> +            {
>> +                printk(XENLOG_ERR
>> +                       "  failed processing kernel for domain %s\n", na=
me);
>> +                return idx;
>> +            }
>> +
>> +            printk(XENLOG_INFO "  kernel: multiboot-index=3D%d\n", idx)=
;
>> +            bi->mods[idx].type =3D BOOTMOD_KERNEL;
>> +            bd->kernel =3D &bi->mods[idx];
>> +        }
>> +    }
>> +
>> +    if ( !bd->kernel )
>> +    {
>> +        printk(XENLOG_ERR "error: no kernel assigned to domain\n");
>
> Add domain name printout similar to above logging?

Good point.

Cheers,
Alejandro


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On 23.04.2025 13:09, Jan Beulich wrote:
> On 23.04.2025 11:49, Andrew Cooper wrote:
>> On 23/04/2025 7:13 am, Jan Beulich wrote:
>>> @@ -5286,25 +5284,23 @@ x86_emulate(
>>>              else if ( !dst.val )
>>>                  _regs.eflags |= X86_EFLAGS_ZF;
>>>          }
>>> -        else if ( zf )
>>> +        else
>>>          {
>>> -            _regs.eflags |= X86_EFLAGS_ZF;
>>> -            dst.type = OP_NONE;
>>> +            emulate_2op_SrcV_srcmem("bsf", src, dst, _regs.eflags);
>>> +            if ( _regs.eflags & X86_EFLAGS_ZF )
>>> +                dst.type = OP_NONE;
>>
>> On Intel, BSF/BSR writes back the destination register.  Notably, it
>> gets 0 extended per normal rules,
> 
> That's also only on "older processors", as per the other footnote.
> 
>> which is why you have to be extra
>> careful when using the trick of preloading it with -1; the result must
>> be interpreted as (int) even over a 64bit operation.
>>
>> This needs an amd_like() qualification to override dst.type.  This
>> aspect genuinely is different between them.  Alternatively, we might be
>> able to set the operand size always to 64 and write back the entire
>> register as the processor gave to us, but I'm not sure if that will have
>> effects elsewhere.
> 
> Besides (as per above), amd_like() not covering all cases, this would
> then further need special treatment for 16-bit opsize. Plus promoting
> to 64-bit would require manually clipping the result to 5 bits when
> the original size wants 64-bit. That's imo far more complications
> than gains.

I guess I viewed this as more complicated than it is: We'd merely need
to zero-extend the source operand from opsize to 64 bits. The one
uncertainty there would be whether the undefined arithmetic flags
couldn't be dependent on operand size.

Tangential to this: Software having probed for the specific behavior of
the two insns (EFLAGS and/or destination register setting for a zero
source) will break when migrated. Therefore in principle we ought to
prevent such migrations. Thoughts there?

Jan


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Feedback-ID: i1568416f:Fastmail
Date: Wed, 23 Apr 2025 14:41:59 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Julien Grall 
Cc: xen-devel ,
	Juergen Gross 
Subject: Re: NULL pointer dereference in xenbus_thread->...
Message-ID: 
References: 
 
 
 <0f8c0e27-e60d-4e64-bc8a-6cb407c67ab2@xen.org>
 
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Date: Wed, 23 Apr 2025 14:41:59 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Julien Grall 
Cc: xen-devel ,
	Juergen Gross 
Subject: Re: NULL pointer dereference in xenbus_thread->...

On Sat, Jun 01, 2024 at 12:48:33AM +0200, Marek Marczykowski-G=C3=B3recki w=
rote:
> On Tue, Mar 26, 2024 at 11:00:50AM +0000, Julien Grall wrote:
> > Hi Marek,
> >=20
> > +Juergen for visibility
> >=20
> > When sending a bug report, I would suggest to CC relevant people as
> > otherwise it can get lost (not may people monitors Xen devel if they ar=
e not
> > CCed).
> >=20
> > Cheers,
> >=20
> > On 25/03/2024 16:17, Marek Marczykowski-G=C3=B3recki wrote:
> > > On Sun, Oct 22, 2023 at 04:14:30PM +0200, Marek Marczykowski-G=C3=B3r=
ecki wrote:
> > > > On Mon, Aug 28, 2023 at 11:50:36PM +0200, Marek Marczykowski-G=C3=
=B3recki wrote:
> > > > > Hi,
> > > > >=20
> > > > > I've noticed in Qubes's CI failure like this:
> > > > >=20
> > > > > [  871.271292] BUG: kernel NULL pointer dereference, address: 000=
0000000000000
> > > > > [  871.275290] #PF: supervisor read access in kernel mode
> > > > > [  871.277282] #PF: error_code(0x0000) - not-present page
> > > > > [  871.279182] PGD 106fdb067 P4D 106fdb067 PUD 106fdc067 PMD 0
> > > > > [  871.281071] Oops: 0000 [#1] PREEMPT SMP NOPTI
> > > > > [  871.282698] CPU: 1 PID: 28 Comm: xenbus Not tainted 6.1.43-1.q=
ubes.fc37.x86_64 #1
> > > > > [  871.285222] Hardware name: QEMU Standard PC (i440FX + PIIX, 19=
96), BIOS rel-1.16.0-0-gd239552-rebuilt.opensuse.org 04/01/2014
> > > > > [  871.288883] RIP: e030:__wake_up_common+0x4c/0x180
> > > > > [  871.292838] Code: 24 0c 89 4c 24 08 4d 85 c9 74 0a 41 f6 01 04=
 0f 85 a3 00 00 00 48 8b 43 08 4c 8d 40 e8 48 83 c3 08 49 8d 40 18 48 39 c3=
 74 5b <49> 8b 40 18 31 ed 4c 8d 70 e8 45 8b 28 41 f6 c5 04 75 5f 49 8b 40
> > > > > [  871.299776] RSP: e02b:ffffc900400f7e10 EFLAGS: 00010082
> > > > > [  871.301656] RAX: 0000000000000000 RBX: ffff88810541ce98 RCX: 0=
000000000000000
> > > > > [  871.304255] RDX: 0000000000000001 RSI: 0000000000000003 RDI: f=
fff88810541ce90
> > > > > [  871.306714] RBP: ffffc900400f0280 R08: ffffffffffffffe8 R09: f=
fffc900400f7e68
> > > > > [  871.309937] R10: 0000000000007ff0 R11: ffff888100ad3000 R12: f=
fffc900400f7e68
> > > > > [  871.312326] R13: 0000000000000000 R14: 0000000000000000 R15: 0=
000000000000000
> > > > > [  871.314647] FS:  0000000000000000(0000) GS:ffff88813ff00000(00=
00) knlGS:0000000000000000
> > > > > [  871.317677] CS:  10000e030 DS: 0000 ES: 0000 CR0: 000000008005=
0033
> > > > > [  871.319644] CR2: 0000000000000000 CR3: 00000001067fe000 CR4: 0=
000000000040660
> > > > > [  871.321973] Call Trace:
> > > > > [  871.322782]  
> > > > > [  871.323494]  ? show_trace_log_lvl+0x1d3/0x2ef
> > > > > [  871.324901]  ? show_trace_log_lvl+0x1d3/0x2ef
> > > > > [  871.326310]  ? show_trace_log_lvl+0x1d3/0x2ef
> > > > > [  871.327721]  ? __wake_up_common_lock+0x82/0xd0
> > > > > [  871.329147]  ? __die_body.cold+0x8/0xd
> > > > > [  871.330378]  ? page_fault_oops+0x163/0x1a0
> > > > > [  871.331691]  ? exc_page_fault+0x70/0x170
> > > > > [  871.332946]  ? asm_exc_page_fault+0x22/0x30
> > > > > [  871.334454]  ? __wake_up_common+0x4c/0x180
> > > > > [  871.335777]  __wake_up_common_lock+0x82/0xd0
> > > > > [  871.337183]  ? process_writes+0x240/0x240
> > > > > [  871.338461]  process_msg+0x18e/0x2f0
> > > > > [  871.339627]  xenbus_thread+0x165/0x1c0
> > > > > [  871.340830]  ? cpuusage_read+0x10/0x10
> > > > > [  871.342032]  kthread+0xe9/0x110
> > > > > [  871.343317]  ? kthread_complete_and_exit+0x20/0x20
> > > > > [  871.345020]  ret_from_fork+0x22/0x30
> > > > > [  871.346239]  
> > > > > [  871.347060] Modules linked in: snd_hda_codec_generic ledtrig_a=
udio snd_hda_intel snd_intel_dspcfg snd_intel_sdw_acpi snd_hda_codec snd_hd=
a_core snd_hwdep snd_seq snd_seq_device joydev snd_pcm intel_rapl_msr ppdev=
 intel_rapl_common snd_timer pcspkr e1000e snd soundcore i2c_piix4 parport_=
pc parport loop fuse xenfs dm_crypt crct10dif_pclmul crc32_pclmul crc32c_in=
tel polyval_clmulni polyval_generic floppy ghash_clmulni_intel sha512_ssse3=
 serio_raw virtio_scsi virtio_console bochs xhci_pci xhci_pci_renesas xhci_=
hcd qemu_fw_cfg drm_vram_helper drm_ttm_helper ttm ata_generic pata_acpi xe=
n_privcmd xen_pciback xen_blkback xen_gntalloc xen_gntdev xen_evtchn scsi_d=
h_rdac scsi_dh_emc scsi_dh_alua uinput dm_multipath
> > > > > [  871.368892] CR2: 0000000000000000
> > > > > [  871.370160] ---[ end trace 0000000000000000 ]---
> > > > > [  871.371719] RIP: e030:__wake_up_common+0x4c/0x180
> > > > > [  871.373273] Code: 24 0c 89 4c 24 08 4d 85 c9 74 0a 41 f6 01 04=
 0f 85 a3 00 00 00 48 8b 43 08 4c 8d 40 e8 48 83 c3 08 49 8d 40 18 48 39 c3=
 74 5b <49> 8b 40 18 31 ed 4c 8d 70 e8 45 8b 28 41 f6 c5 04 75 5f 49 8b 40
> > > > > [  871.379866] RSP: e02b:ffffc900400f7e10 EFLAGS: 00010082
> > > > > [  871.381689] RAX: 0000000000000000 RBX: ffff88810541ce98 RCX: 0=
000000000000000
> > > > > [  871.383971] RDX: 0000000000000001 RSI: 0000000000000003 RDI: f=
fff88810541ce90
> > > > > [  871.386235] RBP: ffffc900400f0280 R08: ffffffffffffffe8 R09: f=
fffc900400f7e68
> > > > > [  871.388521] R10: 0000000000007ff0 R11: ffff888100ad3000 R12: f=
fffc900400f7e68
> > > > > [  871.390789] R13: 0000000000000000 R14: 0000000000000000 R15: 0=
000000000000000
> > > > > [  871.393101] FS:  0000000000000000(0000) GS:ffff88813ff00000(00=
00) knlGS:0000000000000000
> > > > > [  871.395671] CS:  10000e030 DS: 0000 ES: 0000 CR0: 000000008005=
0033
> > > > > [  871.397863] CR2: 0000000000000000 CR3: 00000001067fe000 CR4: 0=
000000000040660
> > > > > [  871.400441] Kernel panic - not syncing: Fatal exception
> > > > > [  871.402171] Kernel Offset: disabled
> > > > > (XEN) Hardware Dom0 crashed: rebooting machine in 5 seconds.
> > > > >=20
> > > > > It isn't the first time I see similar crash, but I can't really
> > > > > reproduce it reliably. Restarted test usually passes.
> > > > > Note this is Xen nested in KVM, so it could very well be some odd=
ity
> > > > > about nested virt, although looking at the stack trace, it's unli=
kely
> > > > > and more likely some race condition hit only on slower system.
> > > >=20
> > > > Recently I've got the same crash on a real system in domU too. And =
also
> > > > on nested on newer kernel 6.1.57 (here it happened in dom0). So, th=
is is
> > > > still an issue and affects not only nested case :/
> > > >=20
> > > > > Unfortunately I don't have symbols for this kernel handy, but the=
re is a
> > > > > single wake_up() call in process_writes(), so it shouldn't be an =
issue.
> > > > >=20
> > > > > Any ideas?
> > > > >=20
> > > > > Full log at https://openqa.qubes-os.org/tests/80779/logfile?filen=
ame=3Dserial0.txt
> > > >=20
> > > > More links at https://github.com/QubesOS/qubes-issues/issues/8638,
> > > > including more recent stack trace.
> > >=20
> > > Happens on 6.1.75 too (new stack trace I've added to the issue above,
> > > but it's pretty similar).
>=20
> Recently I've got a report from another user about similar issue, on
> 6.6.29 this time. I also still encounter this issue once a month or so,
> but the user claims they get it much more often:
> https://github.com/QubesOS/qubes-issues/issues/8638#issuecomment-21354198=
96
> The extra conditions reported by the user are:
> - old AMD system (KGPE-D16 with Opteron 6282 SE) requiring
>   `spec-ctrl=3Dibpb-entry=3Dno-pv` to remain usable=20
> - Whonix domU, which has a bunch of sysctl parameters changed, listed
>   at:
>   - https://github.com/Kicksecure/security-misc
>   - https://github.com/Kicksecure/security-misc/blob/master/usr/lib/sysct=
l.d/990-security-misc.conf
>   (unsure which are relevant, maybe `vm.swappiness=3D1`?)

I've got some more report confirming it's still happening on Linux
6.12.18. Is there anything I can do to help fixing this? Maybe ask users
to enable some extra logging?

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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On 23.04.2025 11:07, Roger Pau Monné wrote:
> On Wed, Apr 23, 2025 at 10:43:56AM +0200, Jan Beulich wrote:
>> Without doing so we could trigger the ASSERT_UNREACHABLE() in
>> subpage_mmio_write_emulate(). A comment there actually says this
>> validation would already have been done ...
>>
>> Fixes: 8847d6e23f97 ("x86/mm: add API for marking only part of a MMIO page read only")
>> Signed-off-by: Jan Beulich 
>> ---
>> Alternatively we could drop comment and assertion from
>> subpage_mmio_write_emulate().
> 
> I think I prefer this as it fits better with my patch to unify the
> open-coded MMIO accessors, which does have an ASSERT_UNREACHABLE() for
> unhandled sizes.  The return there is anyway too late IMO, as we have
> possibly already mapped the page when there's no need for it.

FTAOD with "this" you mean the patch as is, not the alternative?

>> --- a/xen/arch/x86/mm.c
>> +++ b/xen/arch/x86/mm.c
>> @@ -5195,8 +5195,9 @@ int cf_check mmio_ro_emulated_write(
>>          return X86EMUL_UNHANDLEABLE;
>>      }
>>  
>> -    subpage_mmio_write_emulate(mmio_ro_ctxt->mfn, PAGE_OFFSET(offset),
>> -                               p_data, bytes);
>> +    if ( bytes <= 8 )
>> +        subpage_mmio_write_emulate(mmio_ro_ctxt->mfn, PAGE_OFFSET(offset),
>> +                                   p_data, bytes);
> 
> Should we print a debug message here saying the write is possibly
> unhandled due to the access size if subpage r/o is enabled?
> 
> You might want to re-use the subpage_ro_active() I introduce to limit
> the printing of the message.

That would be too broad for my taste. I've used subpage_mmio_find_page()
instead.

Jan


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On Fri Apr 18, 2025 at 11:53 PM BST, dmkhn wrote:
> On Thu, Apr 17, 2025 at 01:48:29PM +0100, Alejandro Vallejo wrote:
>> From: "Daniel P. Smith" 
>>=20
>> Add support to read the command line from the hyperlauunch device tree.
>> The device tree command line is located in the "bootargs" property of th=
e
>> "multiboot,kernel" node.
>>=20
>> A boot loader command line, e.g. a grub module string field, takes
>> precendence ove the device tree one since it is easier to modify.
>
>               ^^ over

Oops. yes.

>
> Also, I would explain the command line parsing rules in the code commenta=
ry for
> domain_cmdline_size() below.

As in, also state the contents of the commit message in the function
header?

>
>>=20
>> Signed-off-by: Daniel P. Smith 
>> Signed-off-by: Jason Andryuk 
>> Signed-off-by: Alejandro Vallejo 
>> ---
>> v4:
>>   * Removed __init from header declarations.
>>   * Removed ifdef guards, as DCE ensures the missing definitions don't
>>     matter.
>>   * Removed ifdef guards from new helpers in domain-builder/fdt.c
>>     * Rely on DCE instead.
>>   * Restored checks for cmdline_pa being zero.
>>   * swapped offset and poffset varnames in libfdt-xen.h helper.
>>   * swapped name and pname varnames in libfdt-xen.h helper.
>>   * Turned foo =3D=3D 0  into !foo in libfdt-xen.h helper.
>> ---
>>  xen/arch/x86/include/asm/bootinfo.h |  6 ++++--
>>  xen/arch/x86/setup.c                | 10 +++++++--
>>  xen/common/domain-builder/core.c    | 32 +++++++++++++++++++++++++++++
>>  xen/common/domain-builder/fdt.c     |  6 ++++++
>>  xen/common/domain-builder/fdt.h     | 24 ++++++++++++++++++++++
>>  xen/include/xen/domain-builder.h    |  4 ++++
>>  xen/include/xen/libfdt/libfdt-xen.h | 23 +++++++++++++++++++++
>>  7 files changed, 101 insertions(+), 4 deletions(-)
>>=20
>> diff --git a/xen/arch/x86/include/asm/bootinfo.h b/xen/arch/x86/include/=
asm/bootinfo.h
>> index 1e3d582e45..5b2c93b1ef 100644
>> --- a/xen/arch/x86/include/asm/bootinfo.h
>> +++ b/xen/arch/x86/include/asm/bootinfo.h
>> @@ -35,11 +35,13 @@ struct boot_module {
>>=20
>>      /*
>>       * Module State Flags:
>> -     *   relocated: indicates module has been relocated in memory.
>> -     *   released:  indicates module's pages have been freed.
>> +     *   relocated:   indicates module has been relocated in memory.
>> +     *   released:    indicates module's pages have been freed.
>> +     *   fdt_cmdline: indicates module's cmdline is in the FDT.
>>       */
>>      bool relocated:1;
>>      bool released:1;
>> +    bool fdt_cmdline:1;
>>=20
>>      /*
>>       * A boot module may need decompressing by Xen.  Headroom is an est=
imate of
>> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
>> index 4f669f3c60..4cae13163b 100644
>> --- a/xen/arch/x86/setup.c
>> +++ b/xen/arch/x86/setup.c
>> @@ -984,7 +984,10 @@ static size_t __init domain_cmdline_size(const stru=
ct boot_info *bi,
>>  {
>>      size_t s =3D bi->kextra ? strlen(bi->kextra) : 0;
>>=20
>> -    s +=3D bd->kernel->cmdline_pa ? strlen(__va(bd->kernel->cmdline_pa)=
) : 0;
>> +    if ( bd->kernel->fdt_cmdline )
>> +        s +=3D builder_get_cmdline_size(bi, bd->kernel->cmdline_pa);
>> +    else if ( bd->kernel->cmdline_pa )
>> +        s +=3D strlen(__va(bd->kernel->cmdline_pa));
>>=20
>>      if ( s =3D=3D 0 )
>>          return s;
>> @@ -1047,7 +1050,10 @@ static struct domain *__init create_dom0(struct b=
oot_info *bi)
>>          if ( !(cmdline =3D xzalloc_array(char, cmdline_size)) )
>>              panic("Error allocating cmdline buffer for %pd\n", d);
>>=20
>> -        if ( bd->kernel->cmdline_pa )
>> +        if ( bd->kernel->fdt_cmdline )
>> +            builder_get_cmdline(
>> +                bi, bd->kernel->cmdline_pa, cmdline, cmdline_size);
>> +        else if ( bd->kernel->cmdline_pa )
>>              strlcpy(cmdline,
>>                      cmdline_cook(__va(bd->kernel->cmdline_pa), bi->load=
er),
>>                      cmdline_size);
>> diff --git a/xen/common/domain-builder/core.c b/xen/common/domain-builde=
r/core.c
>> index 924cb495a3..4b4230f2ff 100644
>> --- a/xen/common/domain-builder/core.c
>> +++ b/xen/common/domain-builder/core.c
>> @@ -8,9 +8,41 @@
>>  #include 
>>=20
>>  #include 
>> +#include 
>>=20
>>  #include "fdt.h"
>>=20
>> +size_t __init builder_get_cmdline_size(struct boot_info *bi, int offset=
)
>> +{
>> +    const void *fdt;
>> +    int size;
>> +
>> +    if ( !IS_ENABLED(CONFIG_DOMAIN_BUILDER) )
>> +        return 0;
>> +
>> +    fdt =3D bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_IDX]);
>> +    size =3D fdt_cmdline_prop_size(fdt, offset);
>> +    bootstrap_unmap();
>> +
>> +    return max(0, size);
>> +}
>> +
>> +int __init builder_get_cmdline(
>> +    struct boot_info *bi, int offset, char *cmdline, size_t size)
>> +{
>> +    const void *fdt;
>> +    int ret;
>> +
>> +    if ( !IS_ENABLED(CONFIG_DOMAIN_BUILDER) )
>> +        return 0;
>> +
>> +    fdt =3D bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_IDX]);
>> +    ret =3D fdt_cmdline_prop_copy(fdt, offset, cmdline, size);
>> +    bootstrap_unmap();
>> +
>> +    return ret;
>> +}
>> +
>>  void __init builder_init(struct boot_info *bi)
>>  {
>>      bi->hyperlaunch_enabled =3D false;
>> diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder=
/fdt.c
>> index 1fae6add3b..50fde2d007 100644
>> --- a/xen/common/domain-builder/fdt.c
>> +++ b/xen/common/domain-builder/fdt.c
>> @@ -209,6 +209,12 @@ static int __init process_domain_node(
>>              printk(XENLOG_INFO "  kernel: multiboot-index=3D%d\n", idx)=
;
>>              bi->mods[idx].type =3D BOOTMOD_KERNEL;
>>              bd->kernel =3D &bi->mods[idx];
>> +
>> +            /* If bootloader didn't set cmdline, see if FDT provides on=
e. */
>> +            if ( bd->kernel->cmdline_pa &&
>> +                 !((char *)__va(bd->kernel->cmdline_pa))[0] )
>> +                bd->kernel->fdt_cmdline =3D fdt_get_prop_offset(
>> +                    fdt, node, "bootargs", &bd->kernel->cmdline_pa);
>>          }
>>      }
>>=20
>> diff --git a/xen/common/domain-builder/fdt.h b/xen/common/domain-builder=
/fdt.h
>> index 8c98a256eb..d2ae7d5c36 100644
>> --- a/xen/common/domain-builder/fdt.h
>> +++ b/xen/common/domain-builder/fdt.h
>> @@ -9,6 +9,30 @@ struct boot_info;
>>  /* hyperlaunch fdt is required to be module 0 */
>>  #define HYPERLAUNCH_MODULE_IDX 0
>>=20
>> +static inline int __init fdt_cmdline_prop_size(const void *fdt, int off=
set)
>> +{
>> +    int ret;
>> +
>> +    fdt_get_property_by_offset(fdt, offset, &ret);
>
> Perhaps something like
>
>        (void)fdt_get_property_by_offset...
>
> since there's no need to check the return value?

I vaguely seem to remember doing something like that a few years ago
(because it does show intent and many linters require it) and being told
not to. But maybe I misremember. I'm definitely happy to use that
convention here and later unless someone pushes back for some reason.

Cheers,
Alejandro


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Date: Wed, 23 Apr 2025 14:01:54 +0100
Message-ID: 
To: 
CC: , "Daniel P. Smith"
	, Jan Beulich , "Andrew
 Cooper" , =?utf-8?q?Roger_Pau_Monn=C3=A9?=
	, Anthony PERARD , "Michal
 Orzel" , Julien Grall , "Stefano
 Stabellini" , Jason Andryuk 
Subject: Re: [PATCH v4 08/13] x86/hyperlaunch: locate dom0 initrd with
 hyperlaunch
From: Alejandro Vallejo 
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On Fri Apr 18, 2025 at 11:58 PM BST, dmkhn wrote:
> On Thu, Apr 17, 2025 at 01:48:30PM +0100, Alejandro Vallejo wrote:
>> From: "Daniel P. Smith" 
>>=20
>> Look for a subnode of type `multiboot,ramdisk` within a domain node and
>> parse via the fdt_read_multiboot_module() helper. After a successful
>> helper call, the module index is returned and the module is guaranteed
>> to be in the module list.
>>=20
>> Fix unused typo in adjacent comment.
>>=20
>> Signed-off-by: Daniel P. Smith 
>> Signed-off-by: Jason Andryuk 
>> Signed-off-by: Alejandro Vallejo 
>> ---
>> v4:
>>   * s/XENLOG_ERR/XENLOG_WARNING/ on duplicate ramdisk.
>>   * Removed stray ")" in printk
>>   * s/else if/if/ (because of continue)
>>   * Removed trailing continue
>> ---
>>  xen/arch/x86/setup.c            |  4 ++--
>>  xen/common/domain-builder/fdt.c | 25 +++++++++++++++++++++++++
>>  2 files changed, 27 insertions(+), 2 deletions(-)
>>=20
>> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
>> index 4cae13163b..76ceb5221f 100644
>> --- a/xen/arch/x86/setup.c
>> +++ b/xen/arch/x86/setup.c
>> @@ -2150,11 +2150,11 @@ void asmlinkage __init noreturn __start_xen(void=
)
>>       * At this point all capabilities that consume boot modules should =
have
>>       * claimed their boot modules. Find the first unclaimed boot module=
 and
>>       * claim it as the initrd ramdisk. Do a second search to see if the=
re are
>> -     * any remaining unclaimed boot modules, and report them as unusued=
 initrd
>> +     * any remaining unclaimed boot modules, and report them as unused =
initrd
>>       * candidates.
>>       */
>>      initrdidx =3D first_boot_module_index(bi, BOOTMOD_UNKNOWN);
>> -    if ( initrdidx < MAX_NR_BOOTMODS )
>> +    if ( !bi->hyperlaunch_enabled && initrdidx < MAX_NR_BOOTMODS )
>>      {
>>          bi->mods[initrdidx].type =3D BOOTMOD_RAMDISK;
>>          bi->domains[0].module =3D &bi->mods[initrdidx];
>> diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder=
/fdt.c
>> index 50fde2d007..c0f526a4ce 100644
>> --- a/xen/common/domain-builder/fdt.c
>> +++ b/xen/common/domain-builder/fdt.c
>> @@ -216,6 +216,31 @@ static int __init process_domain_node(
>>                  bd->kernel->fdt_cmdline =3D fdt_get_prop_offset(
>>                      fdt, node, "bootargs", &bd->kernel->cmdline_pa);
>>          }
>> +        else if ( !fdt_node_check_compatible(fdt, node, "multiboot,ramd=
isk") )
>> +        {
>> +            int idx;
>> +
>> +            if ( bd->module )
>> +            {
>> +                printk(XENLOG_WARNING
>> +                       "Duplicate module for domain %s\n", name);
>> +                continue;
>> +            }
>> +
>> +            idx =3D fdt_read_multiboot_module(fdt, node, address_cells,
>> +                                            size_cells, bi);
>> +            if ( idx < 0 )
>> +            {
>> +                printk(XENLOG_ERR
>> +                       "  failed processing module for domain %s\n",
>> +                       name);
>> +                return -EINVAL;
>
> Propagate fdt_read_multiboot_module()'s error to the caller, i.e.:
>
>                    return idx;

Sure

Cheers,
Alejandro


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Date: Wed, 23 Apr 2025 14:03:00 +0100
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Subject: Re: [PATCH v4 09/13] x86/hyperlaunch: add domain id parsing to
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On Sat Apr 19, 2025 at 12:08 AM BST, dmkhn wrote:
> On Thu, Apr 17, 2025 at 01:48:31PM +0100, Alejandro Vallejo wrote:
>> From: "Daniel P. Smith" 
>>=20
>> Introduce the ability to specify the desired domain id for the domain
>> definition. The domain id will be populated in the domid property of the
>> domain node in the device tree configuration.
>>=20
>> Signed-off-by: Daniel P. Smith 
>> Signed-off-by: Alejandro Vallejo 
>> ---
>> v4:
>>   * Add missing newline
>>   * Adjusted printks
>>   * Checked domid node against list of outstanding domids.
>> ---
>>  xen/arch/x86/setup.c            |  5 ++--
>>  xen/common/domain-builder/fdt.c | 51 ++++++++++++++++++++++++++++++++-
>>  2 files changed, 53 insertions(+), 3 deletions(-)
>>=20
>> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
>> index 76ceb5221f..04ad2d0937 100644
>> --- a/xen/arch/x86/setup.c
>> +++ b/xen/arch/x86/setup.c
>> @@ -1033,8 +1033,9 @@ static struct domain *__init create_dom0(struct bo=
ot_info *bi)
>>      if ( iommu_enabled )
>>          dom0_cfg.flags |=3D XEN_DOMCTL_CDF_iommu;
>>=20
>> -    /* Create initial domain.  Not d0 for pvshim. */
>> -    bd->domid =3D get_initial_domain_id();
>> +    if ( bd->domid =3D=3D DOMID_INVALID )
>> +        /* Create initial domain.  Not d0 for pvshim. */
>> +        bd->domid =3D get_initial_domain_id();
>>      d =3D domain_create(bd->domid, &dom0_cfg, pv_shim ? 0 : CDF_privile=
ged);
>>      if ( IS_ERR(d) )
>>          panic("Error creating d%u: %ld\n", bd->domid, PTR_ERR(d));
>> diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder=
/fdt.c
>> index c0f526a4ce..0d3c713041 100644
>> --- a/xen/common/domain-builder/fdt.c
>> +++ b/xen/common/domain-builder/fdt.c
>> @@ -2,6 +2,7 @@
>>  /*
>>   * Copyright (C) 2024, Apertus Solutions, LLC
>>   */
>> +#include 
>>  #include 
>>  #include 
>>  #include 
>> @@ -178,12 +179,54 @@ static int __init fdt_read_multiboot_module(const =
void *fdt, int node,
>>  static int __init process_domain_node(
>>      struct boot_info *bi, const void *fdt, int dom_node)
>>  {
>> -    int node;
>> +    int node, property;
>>      struct boot_domain *bd =3D &bi->domains[bi->nr_domains];
>>      const char *name =3D fdt_get_name(fdt, dom_node, NULL) ?: "unknown"=
;
>>      int address_cells =3D fdt_address_cells(fdt, dom_node);
>>      int size_cells =3D fdt_size_cells(fdt, dom_node);
>>=20
>> +    fdt_for_each_property_offset(property, fdt, dom_node)
>> +    {
>> +        const struct fdt_property *prop;
>> +        const char *prop_name;
>> +        int name_len, rc;
>> +
>> +        prop =3D fdt_get_property_by_offset(fdt, property, NULL);
>> +        if ( !prop )
>> +            continue; /* silently skip */
>> +
>> +        prop_name =3D fdt_get_string(fdt, fdt32_to_cpu(prop->nameoff), =
&name_len);
>> +
>> +        if ( !strncmp(prop_name, "domid", name_len) )
>> +        {
>> +            uint32_t val =3D DOMID_INVALID;
>> +
>> +            if ( (rc =3D fdt_prop_as_u32(prop, &val)) )
>> +            {
>> +                printk(XENLOG_ERR
>> +                       "  failed processing domain id for domain %s\n",=
 name);
>> +                return rc;
>> +            }
>> +            if ( val >=3D DOMID_FIRST_RESERVED )
>> +            {
>> +                printk(XENLOG_ERR "  invalid domain id for domain %s\n"=
, name);
>> +                return -EINVAL;
>> +            }
>> +
>> +            for ( unsigned int i =3D 0; i < bi->nr_domains; i++ )
>> +            {
>> +                if ( bi->domains[i].domid =3D=3D val )
>> +                {
>> +                    printk(XENLOG_ERR "  duplicate id for domain %s\n",=
 name);
>> +                    return -EINVAL;
>> +                }
>> +            }
>> +
>> +            bd->domid =3D val;
>> +            printk(XENLOG_INFO "  domid: %d\n", bd->domid);
>> +        }
>> +    }
>> +
>>      fdt_for_each_subnode(node, fdt, dom_node)
>>      {
>>          if ( !fdt_node_check_compatible(fdt, node, "multiboot,kernel") =
)
>> @@ -249,6 +292,12 @@ static int __init process_domain_node(
>>          return -ENODATA;
>>      }
>>=20
>> +    if ( bd->domid =3D=3D DOMID_INVALID )
>> +        bd->domid =3D get_initial_domain_id();
>> +    else if ( bd->domid !=3D get_initial_domain_id() )
>> +        printk(XENLOG_WARNING
>> +               "Warning: Unsuported boot with missing initial domid\n")=
;
>
> s/Unsuported/Unsupported/

Ack

>
> Also, add bd->domid to the printout?

Yes, I'll do a rundown of the error strings and ensure they have
identifying tokens.

Cheers,
Alejandro


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MIME-Version: 1.0
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Subject: Re: [PATCH v2] x86/intel: workaround several MONITOR/MWAIT errata
To: Roger Pau Monne 
Cc: Andrew Cooper , xen-devel@lists.xenproject.org
References: <20250423113215.80755-1-roger.pau@citrix.com>
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On 23.04.2025 13:32, Roger Pau Monne wrote:
> There are several errata on Intel regarding the usage of the MONITOR/MWAIT
> instructions, all having in common that stores to the monitored region
> might not wake up the CPU.
> 
> Fix them by forcing the sending of an IPI for the affected models.
> 
> The Ice Lake issue has been reproduced internally on XenServer hardware,
> and the fix does seem to prevent it.  The symptom was APs getting stuck in
> the idle loop immediately after bring up, which in turn prevented the BSP
> from making progress.  This would happen before the watchdog was
> initialized, and hence the whole system would get stuck.
> 
> Signed-off-by: Roger Pau Monné 

Acked-by: Jan Beulich 
with a nit and an entirely optional suggestion:

> @@ -380,6 +380,38 @@ static void probe_c3_errata(const struct cpuinfo_x86 *c)
>      }
>  }
>  
> +/*
> + * APL30: One use of the MONITOR/MWAIT instruction pair is to allow a logical
> + * processor to wait in a sleep state until a store to the armed address range
> + * occurs. Due to this erratum, stores to the armed address range may not
> + * trigger MWAIT to resume execution.
> + *
> + * ICX143: Under complex microarchitectural conditions, a monitor that is armed
> + * with the MWAIT instruction may not be triggered, leading to a processor
> + * hang.
> + *
> + * LNL030: Problem P-cores may not exit power state Core C6 on monitor hit.
> + *
> + * Force the sending of an IPI in those cases.
> + */
> +static void __init probe_mwait_errata(void)
> +{
> +    static const struct x86_cpu_id models[] = {

__initconst

> @@ -406,6 +438,8 @@ static void Intel_errata_workarounds(struct cpuinfo_x86 *c)
>  		__set_bit(X86_FEATURE_CLFLUSH_MONITOR, c->x86_capability);
>  
>  	probe_c3_errata(c);
> +	if (system_state < SYS_STATE_active && c == &boot_cpu_data)
> +		probe_mwait_errata();
>  }

You could simplify the condition by using just system_state < SYS_STATE_smp_boot
(without any &&), I think.

Jan


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Subject: Re: [PATCH v4 11/13] x86/hyperlaunch: add memory parsing to domain
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On Sat Apr 19, 2025 at 12:21 AM BST, dmkhn wrote:
> On Thu, Apr 17, 2025 at 01:48:33PM +0100, Alejandro Vallejo wrote:
>> From: "Daniel P. Smith" 
>>=20
>> Add three properties, memory, mem-min, and mem-max, to the domain node d=
evice
>> tree parsing to define the memory allocation for a domain. All three fie=
lds are
>> expressed in kb and written as a u64 in the device tree entries.
>>=20
>> Signed-off-by: Daniel P. Smith 
>> Reviewed-by: Jason Andryuk 
>> Signed-off-by: Alejandro Vallejo 
>> ---
>> Can't use KB() rather tha SZ_1K, as that's strictly for literals.
>
> Oh, that's right! Thanks!
>
>>=20
>> v4:
>>   * Don't override fdt_prop_as_u64() rc on error.
>>   * Add separate printk statements for each memory prop error.
>>   * Fix bug setting up dom0_size, dom0_min_size and dom0_max_size
>>     * Was overriding dom0_size on all 3 paths.
>>   * Pre-initialise max_pages of all boot_domains to be LONG_MAX, just as
>>     dom0_max_size.
>>     * Eventually dom0_max_size drops out in the bigger series, so we
>>       need that logic to be correct.
>> ---
>>  xen/arch/x86/dom0_build.c              |  8 ++++++
>>  xen/arch/x86/include/asm/boot-domain.h |  4 +++
>>  xen/arch/x86/setup.c                   |  5 +++-
>>  xen/common/domain-builder/fdt.c        | 36 ++++++++++++++++++++++++++
>>  xen/include/xen/libfdt/libfdt-xen.h    | 10 +++++++
>>  5 files changed, 62 insertions(+), 1 deletion(-)
>>=20
>> diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c
>> index 0b467fd4a4..8db24dbc0a 100644
>> --- a/xen/arch/x86/dom0_build.c
>> +++ b/xen/arch/x86/dom0_build.c
>> @@ -627,6 +627,14 @@ int __init construct_dom0(const struct boot_domain =
*bd)
>>=20
>>      process_pending_softirqs();
>>=20
>> +    /* If param dom0_size was not set and HL config provided memory siz=
e */
>> +    if ( !get_memsize(&dom0_size, ULONG_MAX) && bd->mem_pages )
>> +        dom0_size.nr_pages =3D bd->mem_pages;
>> +    if ( !get_memsize(&dom0_min_size, ULONG_MAX) && bd->min_pages )
>> +        dom0_min_size.nr_pages =3D bd->min_pages;
>> +    if ( !get_memsize(&dom0_max_size, ULONG_MAX) && bd->max_pages )
>> +        dom0_max_size.nr_pages =3D bd->max_pages;
>> +
>>      if ( is_hvm_domain(d) )
>>          rc =3D dom0_construct_pvh(bd);
>>      else if ( is_pv_domain(d) )
>> diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/inclu=
de/asm/boot-domain.h
>> index e316d4bcde..fa8ea1cc66 100644
>> --- a/xen/arch/x86/include/asm/boot-domain.h
>> +++ b/xen/arch/x86/include/asm/boot-domain.h
>> @@ -18,6 +18,10 @@ struct boot_domain {
>>  #define BUILD_MODE_ENABLE_DM     (1 << 1) /* HVM    | PVH     */
>>      uint32_t mode;
>>=20
>> +    unsigned long mem_pages;
>> +    unsigned long min_pages;
>> +    unsigned long max_pages;
>> +
>>      struct boot_module *kernel;
>>      struct boot_module *module;
>>      const char *cmdline;
>> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
>> index 05e3d2cf2a..455dad454c 100644
>> --- a/xen/arch/x86/setup.c
>> +++ b/xen/arch/x86/setup.c
>> @@ -296,7 +296,10 @@ static const char *cmdline_cook(const char *p, cons=
t char *loader_name);
>>  struct boot_info __initdata xen_boot_info =3D {
>>      .loader =3D "unknown",
>>      .cmdline =3D "",
>> -    .domains =3D { [0 ... MAX_NR_BOOTDOMS - 1] =3D { .domid =3D DOMID_I=
NVALID } },
>> +    .domains =3D { [0 ... MAX_NR_BOOTDOMS - 1] =3D {
>> +        .domid =3D DOMID_INVALID,
>> +        .max_pages =3D ULONG_MAX,
>> +    }},
>>  };
>>=20
>>  static struct boot_info *__init multiboot_fill_boot_info(
>> diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder=
/fdt.c
>> index 6809c7f917..90218d120a 100644
>> --- a/xen/common/domain-builder/fdt.c
>> +++ b/xen/common/domain-builder/fdt.c
>> @@ -7,6 +7,7 @@
>>  #include 
>>  #include 
>>  #include 
>> +#include 
>>=20
>>  #include 
>>  #include 
>> @@ -246,6 +247,41 @@ static int __init process_domain_node(
>>                     (bd->mode & BUILD_MODE_ENABLE_DM) ? "hvm" :
>>                                                         "pvh");
>>          }
>> +        else if ( strncmp(prop_name, "memory", name_len) =3D=3D 0 )
>
> Use !strncmp(...) like in the below code?

Sure

>
>> +        {
>> +            uint64_t kb;
>> +            if ( (rc =3D fdt_prop_as_u64(prop, &kb)) )
>> +            {
>> +                printk(XENLOG_ERR "  bad \"memory\" prop on domain %s\n=
", name);
>> +                return rc;
>> +            }
>> +            bd->mem_pages =3D PFN_DOWN(kb * SZ_1K);
>> +            printk(XENLOG_ERR "  memory: %lu KiB\n", kb);
>> +        }
>> +        else if ( !strncmp(prop_name, "mem-min", name_len) )
>> +        {
>> +            uint64_t kb;
>> +            if ( (rc =3D fdt_prop_as_u64(prop, &kb)) )
>> +            {
>> +                printk(XENLOG_ERR
>> +                       "  bad \"mem-min\" prop on domain %s\n", name);
>> +                return rc;
>> +            }
>> +            bd->min_pages =3D PFN_DOWN(kb * SZ_1K);
>> +            printk(XENLOG_INFO "  min memory: %lu kb\n", kb);
>> +        }
>> +        else if ( !strncmp(prop_name, "mem-max", name_len) )
>> +        {
>> +            uint64_t kb;
>> +            if ( (rc =3D fdt_prop_as_u64(prop, &kb)) )
>> +            {
>> +                printk(XENLOG_ERR
>> +                       "  bad \"mem-max\" prop on domain %s\n", name);
>> +                return rc;
>> +            }
>> +            bd->max_pages =3D PFN_DOWN(kb * SZ_1K);
>> +            printk(XENLOG_INFO "  max memory: %lu KiB\n", kb);
>> +        }
>>      }
>>=20
>>      fdt_for_each_subnode(node, fdt, dom_node)
>> diff --git a/xen/include/xen/libfdt/libfdt-xen.h b/xen/include/xen/libfd=
t/libfdt-xen.h
>> index afc76e7750..3054b48a83 100644
>> --- a/xen/include/xen/libfdt/libfdt-xen.h
>> +++ b/xen/include/xen/libfdt/libfdt-xen.h
>> @@ -24,6 +24,16 @@ static inline int __init fdt_prop_as_u32(
>>      return 0;
>>  }
>>=20
>> +static inline int __init fdt_prop_as_u64(
>> +    const struct fdt_property *prop, uint64_t *val)
>> +{
>> +    if ( !prop || fdt32_to_cpu(prop->len) < sizeof(uint64_t) )
>> +        return -EINVAL;
>> +
>> +    *val =3D fdt64_to_cpu(*(const fdt64_t *)prop->data);
>> +    return 0;
>> +}
>
> Perhaps move the call to common/domain-builder/fdt.c?

Yes, all new additions to that header ought to have gone to fdt.c
instead. That was my original intent, but then didn't go through with
everything.

Cheers,
Alejandro


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Date: Wed, 23 Apr 2025 14:07:51 +0100
Message-ID: 
Subject: Re: [PATCH v4 13/13] x86/hyperlaunch: add capabilities to boot
 domain
From: Alejandro Vallejo 
To: 
CC: , "Daniel P. Smith"
	, Jan Beulich , "Andrew
 Cooper" , =?utf-8?q?Roger_Pau_Monn=C3=A9?=
	, Anthony PERARD , "Michal
 Orzel" , Julien Grall , "Stefano
 Stabellini" , Jason Andryuk 
X-Mailer: aerc 0.20.1
References: <20250417124844.11143-1-agarciav@amd.com>
 <20250417124844.11143-14-agarciav@amd.com> 
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On Sat Apr 19, 2025 at 12:24 AM BST, dmkhn wrote:
> On Thu, Apr 17, 2025 at 01:48:35PM +0100, Alejandro Vallejo wrote:
>> From: "Daniel P. Smith" 
>>=20
>> Introduce the ability to assign capabilities to a domain via its definit=
ion in
>> device tree. The first capability enabled to select is the control domai=
n
>> capability. The capability property is a bitfield in both the device tre=
e and
>> `struct boot_domain`.
>>=20
>> Signed-off-by: Daniel P. Smith 
>> Signed-off-by: Jason Andryuk 
>> Signed-off-by: Alejandro Vallejo 
>
> Reviewed-by: Denis Mukhin 

Thanks

Though now that CDF_hardware has been introduced to staging, this will have=
 to
change to introduce BUILD_CAPS_HARDWARE as well.

Cheers,
Alejandro


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Subject: Re: [PATCH v4 07/13] x86/hyperlaunch: obtain cmdline from device tree
To: Alejandro Vallejo , dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org,
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On 23.04.2025 15:01, Alejandro Vallejo wrote:
> On Fri Apr 18, 2025 at 11:53 PM BST, dmkhn wrote:
>> On Thu, Apr 17, 2025 at 01:48:29PM +0100, Alejandro Vallejo wrote:
>>> --- a/xen/common/domain-builder/fdt.h
>>> +++ b/xen/common/domain-builder/fdt.h
>>> @@ -9,6 +9,30 @@ struct boot_info;
>>>  /* hyperlaunch fdt is required to be module 0 */
>>>  #define HYPERLAUNCH_MODULE_IDX 0
>>>
>>> +static inline int __init fdt_cmdline_prop_size(const void *fdt, int offset)
>>> +{
>>> +    int ret;
>>> +
>>> +    fdt_get_property_by_offset(fdt, offset, &ret);
>>
>> Perhaps something like
>>
>>        (void)fdt_get_property_by_offset...
>>
>> since there's no need to check the return value?
> 
> I vaguely seem to remember doing something like that a few years ago
> (because it does show intent and many linters require it) and being told
> not to. But maybe I misremember. I'm definitely happy to use that
> convention here and later unless someone pushes back for some reason.

Unless we settle on the need for such for Misra's sake, I'd like to ask
to avoid them. We generally try to avoid casts as much as possible. We
then also shouldn't add ones like suggested here.

Jan


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Subject: Re: [PATCH v2] x86/intel: workaround several MONITOR/MWAIT errata
To: Roger Pau Monne , xen-devel@lists.xenproject.org
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On 23/04/2025 12:32 pm, Roger Pau Monne wrote:
> There are several errata on Intel regarding the usage of the MONITOR/MWAIT
> instructions, all having in common that stores to the monitored region
> might not wake up the CPU.
>
> Fix them by forcing the sending of an IPI for the affected models.
>
> The Ice Lake issue has been reproduced internally on XenServer hardware,
> and the fix does seem to prevent it.  The symptom was APs getting stuck in
> the idle loop immediately after bring up, which in turn prevented the BSP
> from making progress.  This would happen before the watchdog was
> initialized, and hence the whole system would get stuck.
>
> Signed-off-by: Roger Pau Monné 
> ---
> Apollo and Lunar Lake fixes have not been tested, due to lack of hardware.

Acked-by: Andrew Cooper 

> diff --git a/xen/arch/x86/acpi/cpu_idle.c b/xen/arch/x86/acpi/cpu_idle.c
> index 420198406def..1dbf15b01ed7 100644
> --- a/xen/arch/x86/acpi/cpu_idle.c
> +++ b/xen/arch/x86/acpi/cpu_idle.c
> @@ -441,8 +441,14 @@ void cpuidle_wakeup_mwait(cpumask_t *mask)
>      cpumask_andnot(mask, mask, &target);
>  }
>  
> +/* Force sending of a wakeup IPI regardless of mwait usage. */
> +bool __ro_after_init force_mwait_ipi_wakeup;
> +
>  bool arch_skip_send_event_check(unsigned int cpu)
>  {
> +    if ( force_mwait_ipi_wakeup )
> +        return false;
> +

I don't especially like this.  The callers are a loop over all CPUs, and
this can't be inlined/simplified automatically.

But, lets get the fix in place first.  Optimising comes later.

~Andrew


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Date: Wed, 23 Apr 2025 15:19:11 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: "xen-devel@lists.xenproject.org" ,
	Andrew Cooper ,
	Marek Marczykowski 
Subject: Re: [PATCH] x86: constrain sub-page access length in
 mmio_ro_emulated_write()
Message-ID: 
References: <570ad3f2-7f3b-4579-a000-c85d27e8bf77@suse.com>
 
 <7d0afeda-d2c0-4360-bbf6-99a466e8f013@suse.com>
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On Wed, Apr 23, 2025 at 02:58:28PM +0200, Jan Beulich wrote:
> On 23.04.2025 11:07, Roger Pau Monné wrote:
> > On Wed, Apr 23, 2025 at 10:43:56AM +0200, Jan Beulich wrote:
> >> Without doing so we could trigger the ASSERT_UNREACHABLE() in
> >> subpage_mmio_write_emulate(). A comment there actually says this
> >> validation would already have been done ...
> >>
> >> Fixes: 8847d6e23f97 ("x86/mm: add API for marking only part of a MMIO page read only")
> >> Signed-off-by: Jan Beulich 
> >> ---
> >> Alternatively we could drop comment and assertion from
> >> subpage_mmio_write_emulate().
> > 
> > I think I prefer this as it fits better with my patch to unify the
> > open-coded MMIO accessors, which does have an ASSERT_UNREACHABLE() for
> > unhandled sizes.  The return there is anyway too late IMO, as we have
> > possibly already mapped the page when there's no need for it.
> 
> FTAOD with "this" you mean the patch as is, not the alternative?

Yes, sorry, "this" => "this patch".

> >> --- a/xen/arch/x86/mm.c
> >> +++ b/xen/arch/x86/mm.c
> >> @@ -5195,8 +5195,9 @@ int cf_check mmio_ro_emulated_write(
> >>          return X86EMUL_UNHANDLEABLE;
> >>      }
> >>  
> >> -    subpage_mmio_write_emulate(mmio_ro_ctxt->mfn, PAGE_OFFSET(offset),
> >> -                               p_data, bytes);
> >> +    if ( bytes <= 8 )
> >> +        subpage_mmio_write_emulate(mmio_ro_ctxt->mfn, PAGE_OFFSET(offset),
> >> +                                   p_data, bytes);
> > 
> > Should we print a debug message here saying the write is possibly
> > unhandled due to the access size if subpage r/o is enabled?
> > 
> > You might want to re-use the subpage_ro_active() I introduce to limit
> > the printing of the message.
> 
> That would be too broad for my taste. I've used subpage_mmio_find_page()

Hm, yes, that's likely more expensive, but certainly more accurate.
Given the context here the extra logic doesn't matter much.

Thanks, Roger.


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Subject: Re: [RFC PATCH v2 10/34] x86/msr: Convert __rdmsr() uses to
 native_rdmsrq() uses
From: Sean Christopherson 
To: Xin Li 
Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, 
	linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org, 
	virtualization@lists.linux.dev, linux-pm@vger.kernel.org, 
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On Wed, Apr 23, 2025, Xin Li wrote:
> On 4/22/2025 8:09 AM, Sean Christopherson wrote:
> > I strongly prefer that we find a way to not require such verbose APIs, especially
> > if KVM ends up using native variants throughout.  Xen PV is supposed to be the
> > odd one out, yet native code is what suffers.  Blech.
> 
> Will try to figure out how to name the APIs.
> 
> One reason I chose verbose names is that short names are in use and
> renaming needs to touch a lot of files (and not fun at all).

Yeah, I've looked at modifying rdmsrl() to "return" a value more than once, and
ran away screaming every time.

But since you're already doing a pile of renames, IMO this is the perfect time to
do an aggressive cleanup.


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Subject: Re: [PATCH 00/21] x86: Trenchboot Secure Launch DRTM (Xen)
From: Andrew Cooper 
To: Sergii Dmytruk , xen-devel@lists.xenproject.org
Cc: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Lukasz Hawrylko ,
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On 22/04/2025 6:14 pm, Andrew Cooper wrote:
> I've stripped out the sha2 patch and fixed up to use the existing sha2,
> then kicked off some CI testing:
>
> https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1780285393
> https://cirrus-ci.com/build/5452335868018688
>
> When the dust has settled, I'll talk you through the failures.

And here we go.  Interestingly, the FreeBSD testing was entirely happy,
and that is the rare way around.

For Gitlab, there are several areas.

First, for MISRA.  In the job logs, you want the "Browse current
reports:" link which will give you full details, but it's all pretty
simple stuff.

kbl-suspend-x86-64-gcc-debug is a real S3 test on KabyLake hardware,
which appears to have gone to sleep and never woken up.  (More likely,
crashed on wakeup before we got the console up).  The AlderLake
equivalent test seems to be happy, as well as the AMD ones.

For the build issues, there are quite a few.

debian-12-x86_64-gcc-ibt is special, using an out-of-tree patch for
CET-IBT safety.  tl;dr function pointer callees need a cf_check
annotation.  But, all the failures here are from sha1, and from bits
which I don't think want to survive into the final form.

Other common failures seem to be:

    # take image offset into account
    arch/x86/efi/fixmlehdr xen.efi 0x200000
    Failed to find MLE header in xen.efi
    arch/x86/Makefile:220: recipe for target 'xen.efi' failed
    make[3]: *** [xen.efi] Error 1

~Andrew


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Subject: Re: [RFC PATCH v2 10/34] x86/msr: Convert __rdmsr() uses to
 native_rdmsrq() uses
To: Xin Li , Sean Christopherson 
Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
 linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
 virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
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 dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, acme@kernel.org,
 jgross@suse.com, andrew.cooper3@citrix.com, peterz@infradead.org,
 namhyung@kernel.org, mark.rutland@arm.com,
 alexander.shishkin@linux.intel.com, jolsa@kernel.org, irogers@google.com,
 adrian.hunter@intel.com, kan.liang@linux.intel.com, wei.liu@kernel.org,
 ajay.kaher@broadcom.com, bcm-kernel-feedback-list@broadcom.com,
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 luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
 haiyangz@microsoft.com, decui@microsoft.com
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-11-xin@zytor.com> 
 <7527f09c-7163-4276-b9a4-edac6c8217ae@zytor.com>
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On 4/23/25 02:27, Xin Li wrote:
> One reason I chose verbose names is that short names are in use and
> renaming needs to touch a lot of files (and not fun at all).

This series is getting *WAY* too big.

Could you please peel the renaming stuff out and we can get it applied
independently of the new instruction gunk?


From xen-devel-bounces@lists.xenproject.org Wed Apr 23 14:08:43 2025
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Date: Wed, 23 Apr 2025 16:08:34 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Andrew Cooper 
Cc: xen-devel@lists.xenproject.org, Jan Beulich 
Subject: Re: [PATCH v2] x86/intel: workaround several MONITOR/MWAIT errata
Message-ID: 
References: <20250423113215.80755-1-roger.pau@citrix.com>
 
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On Wed, Apr 23, 2025 at 02:13:01PM +0100, Andrew Cooper wrote:
> On 23/04/2025 12:32 pm, Roger Pau Monne wrote:
> > There are several errata on Intel regarding the usage of the MONITOR/MWAIT
> > instructions, all having in common that stores to the monitored region
> > might not wake up the CPU.
> >
> > Fix them by forcing the sending of an IPI for the affected models.
> >
> > The Ice Lake issue has been reproduced internally on XenServer hardware,
> > and the fix does seem to prevent it.  The symptom was APs getting stuck in
> > the idle loop immediately after bring up, which in turn prevented the BSP
> > from making progress.  This would happen before the watchdog was
> > initialized, and hence the whole system would get stuck.
> >
> > Signed-off-by: Roger Pau Monné 
> > ---
> > Apollo and Lunar Lake fixes have not been tested, due to lack of hardware.
> 
> Acked-by: Andrew Cooper 
> 
> > diff --git a/xen/arch/x86/acpi/cpu_idle.c b/xen/arch/x86/acpi/cpu_idle.c
> > index 420198406def..1dbf15b01ed7 100644
> > --- a/xen/arch/x86/acpi/cpu_idle.c
> > +++ b/xen/arch/x86/acpi/cpu_idle.c
> > @@ -441,8 +441,14 @@ void cpuidle_wakeup_mwait(cpumask_t *mask)
> >      cpumask_andnot(mask, mask, &target);
> >  }
> >  
> > +/* Force sending of a wakeup IPI regardless of mwait usage. */
> > +bool __ro_after_init force_mwait_ipi_wakeup;
> > +
> >  bool arch_skip_send_event_check(unsigned int cpu)
> >  {
> > +    if ( force_mwait_ipi_wakeup )
> > +        return false;
> > +
> 
> I don't especially like this.  The callers are a loop over all CPUs, and
> this can't be inlined/simplified automatically.

Hm, I can look into this later, I can make maybe turn
arch_skip_send_event_check into an inline.  Let me get this
committed first.

Thanks, Roger.


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Message-ID: <4caedcaf-793a-4371-a8db-50723dcdbad4@intel.com>
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Subject: Re: [RFC PATCH v2 01/34] x86/msr: Move rdtsc{,_ordered}() to
 
To: "Xin Li (Intel)" , linux-kernel@vger.kernel.org,
 kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
 linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
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Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
 dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, acme@kernel.org,
 jgross@suse.com, andrew.cooper3@citrix.com, peterz@infradead.org,
 namhyung@kernel.org, mark.rutland@arm.com,
 alexander.shishkin@linux.intel.com, jolsa@kernel.org, irogers@google.com,
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 seanjc@google.com, luto@kernel.org, boris.ostrovsky@oracle.com,
 kys@microsoft.com, haiyangz@microsoft.com, decui@microsoft.com
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-2-xin@zytor.com>
From: Dave Hansen 
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On 4/22/25 01:21, Xin Li (Intel) wrote:
> Relocate rdtsc{,_ordered}() from  to , and
> subsequently remove the inclusion of  in .
> Consequently,  must be included in several source files
> that previously did not require it.

I know it's mildly obvious but could you please add a problem statement
to these changelogs, even if it's just one little sentence?

	For some reason, there are some TSC-related functions in the
	MSR header even though there is a tsc.h header.

	Relocate rdtsc{,_ordered}() and	subsequently remove the
	inclusion of  in . Consequently,
	 must be included in several source files that
	previously did not require it.

But I agree with the concept, so with this fixed:

Acked-by: Dave Hansen 


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Subject: Re: [RFC PATCH v2 02/34] x86/msr: Remove rdpmc()
To: "Xin Li (Intel)" , linux-kernel@vger.kernel.org,
 kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
 linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
 linux-pm@vger.kernel.org, linux-edac@vger.kernel.org,
 xen-devel@lists.xenproject.org, linux-acpi@vger.kernel.org,
 linux-hwmon@vger.kernel.org, netdev@vger.kernel.org,
 platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
 dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, acme@kernel.org,
 jgross@suse.com, andrew.cooper3@citrix.com, peterz@infradead.org,
 namhyung@kernel.org, mark.rutland@arm.com,
 alexander.shishkin@linux.intel.com, jolsa@kernel.org, irogers@google.com,
 adrian.hunter@intel.com, kan.liang@linux.intel.com, wei.liu@kernel.org,
 ajay.kaher@broadcom.com, bcm-kernel-feedback-list@broadcom.com,
 tony.luck@intel.com, pbonzini@redhat.com, vkuznets@redhat.com,
 seanjc@google.com, luto@kernel.org, boris.ostrovsky@oracle.com,
 kys@microsoft.com, haiyangz@microsoft.com, decui@microsoft.com
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-3-xin@zytor.com>
From: Dave Hansen 
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On 4/22/25 01:21, Xin Li (Intel) wrote:
> rdpmc() is not used anywhere, remove it.

I'm not sure it was *ever* used (at least since git started). Thanks for
finding this.

Acked-by: Dave Hansen 



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Subject: Re: [RFC PATCH v2 03/34] x86/msr: Rename rdpmcl() to rdpmcq()
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On 4/22/25 01:21, Xin Li (Intel) wrote:
> Signed-off-by: Xin Li (Intel) 

We had a non-trivial discussion about the l=>q renames. Please at least
include a sentence or two about those discussions.

For the code:

Acked-by: Dave Hansen 


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Subject: Re: [RFC PATCH v2 04/34] x86/msr: Convert rdpmcq() into a function
To: "Xin Li (Intel)" , linux-kernel@vger.kernel.org,
 kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
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On 4/22/25 01:21, Xin Li (Intel) wrote:
> Signed-off-by: Xin Li (Intel) 

Code: good.  No changelog: bad.

Once there's some semblance of a changelog:

Acked-by: Dave Hansen 


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Subject: Re: [RFC PATCH v2 03/34] x86/msr: Rename rdpmcl() to rdpmcq()
From: Sean Christopherson 
To: "Xin Li (Intel)" 
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On Tue, Apr 22, 2025, Xin Li (Intel) wrote:
> Signed-off-by: Xin Li (Intel) 
> ---
>  arch/x86/events/amd/uncore.c              |  2 +-
>  arch/x86/events/core.c                    |  2 +-
>  arch/x86/events/intel/core.c              |  4 ++--
>  arch/x86/events/intel/ds.c                |  2 +-
>  arch/x86/include/asm/msr.h                |  2 +-
>  arch/x86/include/asm/paravirt.h           |  2 +-
>  arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 12 ++++++------
>  7 files changed, 13 insertions(+), 13 deletions(-)
> 
> diff --git a/arch/x86/events/amd/uncore.c b/arch/x86/events/amd/uncore.c
> index f231e1078e51..b9933ab3116c 100644
> --- a/arch/x86/events/amd/uncore.c
> +++ b/arch/x86/events/amd/uncore.c
> @@ -152,7 +152,7 @@ static void amd_uncore_read(struct perf_event *event)
>  	if (hwc->event_base_rdpmc < 0)
>  		rdmsrq(hwc->event_base, new);
>  	else
> -		rdpmcl(hwc->event_base_rdpmc, new);
> +		rdpmcq(hwc->event_base_rdpmc, new);

Now that rdpmc() is gone, i.e. rdpmcl/rdpmcq() is the only helper, why not simply
rename rdpmcl() => rdpmc()?  I see no point in adding a 'q' qualifier; it doesn't
disambiguate anything and IMO is pure noise.


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On Tue, Apr 22, 2025 at 09:23:02PM +0100, Andrew Cooper wrote:
> On 22/04/2025 4:06 pm, Sergii Dmytruk wrote:
> > diff --git a/xen/include/xen/slr_table.h b/xen/include/xen/slr_table.h
> > new file mode 100644
> > index 0000000000..e9dbac5d0a
> > --- /dev/null
> > +++ b/xen/include/xen/slr_table.h
> > @@ -0,0 +1,274 @@
> > +/* SPDX-License-Identifier: GPL-3.0-or-later */
>
> I'm sorry, but we cannot accept this submission.
>
> Xen is GPL-2-only, and can only accept source code compatible with this
> license. Everything else in this series appears to be compatible (and
> therefore is fine), but this patch is not.
>
> ~Andrew

I think the license comes from GRUB's version which is GPL-3-or-later
while the original Linux header file is GPL-2.  Linux patches is really
the source here.  I don't think anything prevents use of the header
under GPL-2, so I'll change the license in v2.  Adding Ross Philipson to
CC as the original author of both Linux and GRUB versions just in case.


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Date: Wed, 23 Apr 2025 17:47:52 +0300
From: Sergii Dmytruk 
To: ross.philipson@oracle.com
Cc: xen-devel@lists.xenproject.org,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich , Julien Grall ,
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Subject: Re: [PATCH 02/21] include/xen/slr_table.h: Secure Launch Resource
 Table definitions
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On Tue, Apr 22, 2025 at 01:46:14PM -0700, ross.philipson@oracle.com wrote:
> > +
> > +/*
> > + * ARM DRTM Info table
> > + */
> > +struct slr_entry_arm_info
> > +{
> > +    struct slr_entry_hdr hdr;
> > +} __packed;
>
> You can probably ditch this for now.

Right, it has no value at this point.

> I am surprised you did not need the slr_add_entry() function. How do you add
> entries to the SLRT?

Xen doesn't add any SLRT entries.  It's also the final consumer of the
SLRT, at least at the moment, so no need to update something that won't
be used again.

> Thanks
> Ross


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Date: Wed, 23 Apr 2025 16:51:23 +0200
From: Anthony PERARD 
To: Jason Andryuk 
Cc: xen-devel@lists.xenproject.org,
	Anthony PERARD ,
	Juergen Gross 
Subject: Re: [PATCH v2 1/2] tools/libxl: Skip invalid IRQs
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On Fri, Apr 18, 2025 at 05:05:49PM -0400, Jason Andryuk wrote:
> A PCI device's irq field is an 8-bit number.  A value of 0xff indicates
> that the device IRQ is not connected.  Additionally, the Linux ACPI code
> can convert these 0xff values to IRQ_NOTCONNECTED(0x80000000) because
> "0x80000000 is guaranteed to be outside the available range of
> interrupts and easy to distinguish from other possible incorrect
> values."  When the hypercall to assign that IRQ fails, device
> passthrough as a whole fails.
> 
> Add checking for a valid IRQ and skip the IRQ handling for PCI devices
> outside that range.  This allows for passthrough of devices without
> legacy IRQs.
> 
> Signed-off-by: Jason Andryuk 

Reviewed-by: Anthony PERARD 

Thanks,

-- 
Anthony PERARD


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From: Greg Kroah-Hartman 
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	patches@lists.linux.dev,
	Juergen Gross ,
	Stefano Stabellini ,
	Oleksandr Tyshchenko ,
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	Kees Cook ,
	Sasha Levin 
Subject: [PATCH 6.1 025/291] xen/mcelog: Add __nonstring annotations for unterminated strings
Date: Wed, 23 Apr 2025 16:40:14 +0200
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6.1-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Kees Cook 

[ Upstream commit 1c3dfc7c6b0f551fdca3f7c1f1e4c73be8adb17d ]

When a character array without a terminating NUL character has a static
initializer, GCC 15's -Wunterminated-string-initialization will only
warn if the array lacks the "nonstring" attribute[1]. Mark the arrays
with __nonstring to and correctly identify the char array as "not a C
string" and thereby eliminate the warning.

Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117178 [1]
Cc: Juergen Gross 
Cc: Stefano Stabellini 
Cc: Oleksandr Tyshchenko 
Cc: xen-devel@lists.xenproject.org
Signed-off-by: Kees Cook 
Acked-by: Juergen Gross 
Message-ID: <20250310222234.work.473-kees@kernel.org>
Signed-off-by: Juergen Gross 
Signed-off-by: Sasha Levin 
---
 include/xen/interface/xen-mca.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/xen/interface/xen-mca.h b/include/xen/interface/xen-mca.h
index 464aa6b3a5f92..1c9afbe8cc260 100644
--- a/include/xen/interface/xen-mca.h
+++ b/include/xen/interface/xen-mca.h
@@ -372,7 +372,7 @@ struct xen_mce {
 #define XEN_MCE_LOG_LEN 32
 
 struct xen_mce_log {
-	char signature[12]; /* "MACHINECHECK" */
+	char signature[12] __nonstring; /* "MACHINECHECK" */
 	unsigned len;	    /* = XEN_MCE_LOG_LEN */
 	unsigned next;
 	unsigned flags;
-- 
2.39.5



um: ntf-flags
       -
-        name: type
+        name: ndm-type
         type: u8
         enum: rtm-type
   -
-- 
2.39.5





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From: Greg Kroah-Hartman 
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Cc: Greg Kroah-Hartman ,
	patches@lists.linux.dev,
	Juergen Gross ,
	Stefano Stabellini ,
	Oleksandr Tyshchenko ,
	xen-devel@lists.xenproject.org,
	Kees Cook ,
	Sasha Levin 
Subject: [PATCH 6.6 045/393] xen/mcelog: Add __nonstring annotations for unterminated strings
Date: Wed, 23 Apr 2025 16:39:01 +0200
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6.6-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Kees Cook 

[ Upstream commit 1c3dfc7c6b0f551fdca3f7c1f1e4c73be8adb17d ]

When a character array without a terminating NUL character has a static
initializer, GCC 15's -Wunterminated-string-initialization will only
warn if the array lacks the "nonstring" attribute[1]. Mark the arrays
with __nonstring to and correctly identify the char array as "not a C
string" and thereby eliminate the warning.

Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117178 [1]
Cc: Juergen Gross 
Cc: Stefano Stabellini 
Cc: Oleksandr Tyshchenko 
Cc: xen-devel@lists.xenproject.org
Signed-off-by: Kees Cook 
Acked-by: Juergen Gross 
Message-ID: <20250310222234.work.473-kees@kernel.org>
Signed-off-by: Juergen Gross 
Signed-off-by: Sasha Levin 
---
 include/xen/interface/xen-mca.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/xen/interface/xen-mca.h b/include/xen/interface/xen-mca.h
index 464aa6b3a5f92..1c9afbe8cc260 100644
--- a/include/xen/interface/xen-mca.h
+++ b/include/xen/interface/xen-mca.h
@@ -372,7 +372,7 @@ struct xen_mce {
 #define XEN_MCE_LOG_LEN 32
 
 struct xen_mce_log {
-	char signature[12]; /* "MACHINECHECK" */
+	char signature[12] __nonstring; /* "MACHINECHECK" */
 	unsigned len;	    /* = XEN_MCE_LOG_LEN */
 	unsigned next;
 	unsigned flags;
-- 
2.39.5





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Date: Wed, 23 Apr 2025 16:59:10 +0200
From: Anthony PERARD 
To: Jason Andryuk 
Cc: xen-devel@lists.xenproject.org,
	Anthony PERARD ,
	Juergen Gross 
Subject: Re: [PATCH v2 2/2] tools/libxl: Switch irq to unsigned int
Message-ID: 
References: <20250418210550.542456-1-jason.andryuk@amd.com>
 <20250418210550.542456-3-jason.andryuk@amd.com>
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In-Reply-To: <20250418210550.542456-3-jason.andryuk@amd.com>

On Fri, Apr 18, 2025 at 05:05:50PM -0400, Jason Andryuk wrote:
> The PCI device irq is read with fscanf(%u).  Switch the irq variable to
> unsigned int to match.
> 
> Linux driver/pci/pci-sysfs.c:irq_show() uses %u to print the value.
> 
> However, unsigned int irq doesn't compile because of:
> error: pointer targets in passing argument 4 of 'xc_physdev_map_pirq' differ in signedness [-Werror=pointer-sign]
> 
> Add int pirq to provide the desired type instead of re-using irq.
> 
> Signed-off-by: Jason Andryuk 

Reviewed-by: Anthony PERARD 

Thanks,

-- 
Anthony PERARD


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Subject: Re: [RFC PATCH v2 03/34] x86/msr: Rename rdpmcl() to rdpmcq()
To: Sean Christopherson , "Xin Li (Intel)" 
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References: <20250422082216.1954310-1-xin@zytor.com>
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On 4/23/25 07:28, Sean Christopherson wrote:
> Now that rdpmc() is gone, i.e. rdpmcl/rdpmcq() is the only helper, why not simply
> rename rdpmcl() => rdpmc()?  I see no point in adding a 'q' qualifier; it doesn't
> disambiguate anything and IMO is pure noise.

That makes total sense to me.


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Subject: Re: [RFC PATCH v2 08/34] x86/msr: Convert a native_wrmsr() use to
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To: "Xin Li (Intel)" , linux-kernel@vger.kernel.org,
 kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
 linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
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 jgross@suse.com, andrew.cooper3@citrix.com, peterz@infradead.org,
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References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-9-xin@zytor.com>
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On 4/22/25 01:21, Xin Li (Intel) wrote:
>  static __always_inline void sev_es_wr_ghcb_msr(u64 val)
>  {
> -	u32 low, high;
> -
> -	low  = (u32)(val);
> -	high = (u32)(val >> 32);
> -
> -	native_wrmsr(MSR_AMD64_SEV_ES_GHCB, low, high);
> +	native_wrmsrq(MSR_AMD64_SEV_ES_GHCB, val);
>  }

A note on ordering: Had this been a native_wrmsr()=>__wrmsr()
conversion, it could be sucked into the tree easily before the big
__wrmsr()=>native_wrmsrq() conversion.

Yeah, you'd have to base the big rename on top of this. But with a
series this big, I'd prioritize whatever gets it trimmed down.


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Subject: Re: [RFC PATCH v2 21/34] x86/msr: Utilize the alternatives mechanism
 to write MSR
To: Xin Li , linux-kernel@vger.kernel.org,
 kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
 linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
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Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
 dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, acme@kernel.org,
 andrew.cooper3@citrix.com, peterz@infradead.org, namhyung@kernel.org,
 mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org,
 irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
 wei.liu@kernel.org, ajay.kaher@broadcom.com,
 bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
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 haiyangz@microsoft.com, decui@microsoft.com
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-22-xin@zytor.com>
 
 
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Subject: Re: [RFC PATCH v2 21/34] x86/msr: Utilize the alternatives mechanism
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 <20250422082216.1954310-22-xin@zytor.com>
 
 
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--------------0DTyIjBeblppipV7B0zRSAr0
Content-Type: application/pgp-keys; name="OpenPGP_0xB0DE9DD628BF132F.asc"
Content-Disposition: attachment; filename="OpenPGP_0xB0DE9DD628BF132F.asc"
Content-Description: OpenPGP public key
Content-Transfer-Encoding: quoted-printable

-----BEGIN PGP PUBLIC KEY BLOCK-----

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Date: Wed, 23 Apr 2025 18:11:10 +0200
MIME-Version: 1.0
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Subject: Re: [RFC PATCH v2 22/34] x86/msr: Utilize the alternatives mechanism
 to read MSR
To: Xin Li , linux-kernel@vger.kernel.org,
 kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
 linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
 linux-pm@vger.kernel.org, linux-edac@vger.kernel.org,
 xen-devel@lists.xenproject.org, linux-acpi@vger.kernel.org,
 linux-hwmon@vger.kernel.org, netdev@vger.kernel.org,
 platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
 dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, acme@kernel.org,
 andrew.cooper3@citrix.com, peterz@infradead.org, namhyung@kernel.org,
 mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org,
 irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
 wei.liu@kernel.org, ajay.kaher@broadcom.com,
 bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
 pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
 luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
 haiyangz@microsoft.com, decui@microsoft.com
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-23-xin@zytor.com>
 <080351cb-6c3d-4540-953d-6205f1ff0745@suse.com>
 <7899fcd9-3492-49d3-8097-a3ddefaaeef0@zytor.com>
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To: Xin Li , linux-kernel@vger.kernel.org,
 kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
 linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
 linux-pm@vger.kernel.org, linux-edac@vger.kernel.org,
 xen-devel@lists.xenproject.org, linux-acpi@vger.kernel.org,
 linux-hwmon@vger.kernel.org, netdev@vger.kernel.org,
 platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
 dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, acme@kernel.org,
 andrew.cooper3@citrix.com, peterz@infradead.org, namhyung@kernel.org,
 mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org,
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 luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
 haiyangz@microsoft.com, decui@microsoft.com
Message-ID: <281505d5-7459-4903-887e-dc78a4c1fce4@suse.com>
Subject: Re: [RFC PATCH v2 22/34] x86/msr: Utilize the alternatives mechanism
 to read MSR
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-23-xin@zytor.com>
 <080351cb-6c3d-4540-953d-6205f1ff0745@suse.com>
 <7899fcd9-3492-49d3-8097-a3ddefaaeef0@zytor.com>
In-Reply-To: <7899fcd9-3492-49d3-8097-a3ddefaaeef0@zytor.com>

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Date: Wed, 23 Apr 2025 18:48:19 +0200
From: "Edgar E. Iglesias" 
To: Stefano Stabellini 
Cc: Aleksandr Partanen , qemu-devel@nongnu.org,
	xen-devel@lists.xenproject.org, Paul Durrant ,
	Anthony PERARD 
Subject: Re: [PATCH] xen: mapcache: Fix finding matching entry
Message-ID: 
References: <20250410144604.214977-1-alex.pentagrid@gmail.com>
 
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User-Agent: Mutt/2.2.14+84 (2efcabc4) (2025-03-23)

On Fri, Apr 18, 2025 at 04:39:04PM -0700, Stefano Stabellini wrote:
> On Thu, 10 Apr 2025, Aleksandr Partanen wrote:
> > If we have request without lock and hit unlocked or invalid
> > entry during the search, we remap it immediately,
> > even if we have matching entry in next entries in bucket.
> > This leads to duplication of mappings of the same size,
> > and to possibility of selecting the wrong element
> > during invalidation and underflow it's entry->lock counter
> > 
> > Signed-off-by: Aleksandr Partanen 
> 
> Hi Aleksandr, thanks for the patch, it looks correct to me.
> 
> Reviewed-by: Stefano Stabellini 
> 
> 
> Edgar, would you be able to give it a look as well to make sure?


Looks good to me too, thanks!

Reviewed-by: Edgar E. Iglesias 




> 
> 
> > ---
> >  hw/xen/xen-mapcache.c | 6 +++---
> >  1 file changed, 3 insertions(+), 3 deletions(-)
> > 
> > diff --git a/hw/xen/xen-mapcache.c b/hw/xen/xen-mapcache.c
> > index 698b5c53ed..2c8f861fdb 100644
> > --- a/hw/xen/xen-mapcache.c
> > +++ b/hw/xen/xen-mapcache.c
> > @@ -376,12 +376,12 @@ tryagain:
> >  
> >      entry = &mc->entry[address_index % mc->nr_buckets];
> >  
> > -    while (entry && (lock || entry->lock) && entry->vaddr_base &&
> > -            (entry->paddr_index != address_index || entry->size != cache_size ||
> > +    while (entry && (!entry->vaddr_base ||
> > +            entry->paddr_index != address_index || entry->size != cache_size ||
> >               !test_bits(address_offset >> XC_PAGE_SHIFT,
> >                   test_bit_size >> XC_PAGE_SHIFT,
> >                   entry->valid_mapping))) {
> > -        if (!free_entry && !entry->lock) {
> > +        if (!free_entry && (!entry->lock || !entry->vaddr_base)) {
> >              free_entry = entry;
> >              free_pentry = pentry;
> >          }
> > -- 
> > 2.39.5
> > 


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        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
        pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-2-xin@zytor.com>
 <4caedcaf-793a-4371-a8db-50723dcdbad4@intel.com>
Content-Language: en-US
From: Xin Li 
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On 4/23/2025 7:13 AM, Dave Hansen wrote:
> On 4/22/25 01:21, Xin Li (Intel) wrote:
>> Relocate rdtsc{,_ordered}() from  to , and
>> subsequently remove the inclusion of  in .
>> Consequently,  must be included in several source files
>> that previously did not require it.
> 
> I know it's mildly obvious but could you please add a problem statement
> to these changelogs, even if it's just one little sentence?

So "ALWAYS make a changelog a complete story", right?

And that would be helpful for long term maintainability.

> 
> 	For some reason, there are some TSC-related functions in the
> 	MSR header even though there is a tsc.h header.
> 
> 	Relocate rdtsc{,_ordered}() and	subsequently remove the
> 	inclusion of  in . Consequently,
> 	 must be included in several source files that
> 	previously did not require it.
> 
> But I agree with the concept, so with this fixed:

TBH, I did hesitate to touch so many files just to include msr.h.

But because tsc.h doesn't reference any MSR definitions, it doesn't make 
sense to include msr.h in tsc.h.  I still did the big changes.

> 
> Acked-by: Dave Hansen 

Thank you very much!


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Subject: Re: [RFC PATCH v2 03/34] x86/msr: Rename rdpmcl() to rdpmcq()
To: Dave Hansen ,
        Sean Christopherson 
Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
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        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org,
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        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
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        boris.ostrovsky@oracle.com, kys@microsoft.com, haiyangz@microsoft.com,
        decui@microsoft.com
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-4-xin@zytor.com> 
 <6211378e-955b-47f4-8688-ec93728f0087@intel.com>
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On 4/23/2025 8:06 AM, Dave Hansen wrote:
> On 4/23/25 07:28, Sean Christopherson wrote:
>> Now that rdpmc() is gone, i.e. rdpmcl/rdpmcq() is the only helper, why not simply
>> rename rdpmcl() => rdpmc()?  I see no point in adding a 'q' qualifier; it doesn't
>> disambiguate anything and IMO is pure noise.
> 
> That makes total sense to me.
> 

Unable to argue with two maintainers on a simple naming ;), so will make
the change.


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        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
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        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
        pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-9-xin@zytor.com>
 <2932db03-164a-447e-92cf-1ef6c35c15a4@intel.com>
Content-Language: en-US
From: Xin Li 
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In-Reply-To: <2932db03-164a-447e-92cf-1ef6c35c15a4@intel.com>
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On 4/23/2025 8:51 AM, Dave Hansen wrote:
> On 4/22/25 01:21, Xin Li (Intel) wrote:
>>   static __always_inline void sev_es_wr_ghcb_msr(u64 val)
>>   {
>> -	u32 low, high;
>> -
>> -	low  = (u32)(val);
>> -	high = (u32)(val >> 32);
>> -
>> -	native_wrmsr(MSR_AMD64_SEV_ES_GHCB, low, high);
>> +	native_wrmsrq(MSR_AMD64_SEV_ES_GHCB, val);
>>   }
> 
> A note on ordering: Had this been a native_wrmsr()=>__wrmsr()
> conversion, it could be sucked into the tree easily before the big
> __wrmsr()=>native_wrmsrq() conversion.
> 
> Yeah, you'd have to base the big rename on top of this. But with a
> series this big, I'd prioritize whatever gets it trimmed down.

Okay, I will focus on cleanup first.


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To: Sergii Dmytruk 
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On 4/23/25 7:47 AM, Sergii Dmytruk wrote:
> On Tue, Apr 22, 2025 at 01:46:14PM -0700, ross.philipson@oracle.com wrote:
>>> +
>>> +/*
>>> + * ARM DRTM Info table
>>> + */
>>> +struct slr_entry_arm_info
>>> +{
>>> +    struct slr_entry_hdr hdr;
>>> +} __packed;
>>
>> You can probably ditch this for now.
> 
> Right, it has no value at this point.
> 
>> I am surprised you did not need the slr_add_entry() function. How do you add
>> entries to the SLRT?
> 
> Xen doesn't add any SLRT entries.  It's also the final consumer of the
> SLRT, at least at the moment, so no need to update something that won't
> be used again.

Ahh right. The Linux version allows the policy to be updated by the EFI 
stub but you are not doing that.

Thanks
Ross

> 
>> Thanks
>> Ross



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From: Nicola Vetrini 

MISRA C Rule 10.1 states:
"Operands shall not be of an inappropriate essential type"

The unary minus operator applied to an unsigned quantity has
a semantics (wrap around) that is well-known to all Xen developers.
Thus, this operation is deemed safe.

No functional change.

Signed-off-by: Nicola Vetrini 
Signed-off-by: Federico Serafini 
Signed-off-by: Victor Lira 
---
Changes v1:
- add rule title to commit message
---
Cc: Andrew Cooper 
Cc: Anthony PERARD 
Cc: Michal Orzel 
Cc: Jan Beulich 
Cc: Julien Grall 
Cc: Roger Pau Monné 
Cc: Stefano Stabellini 
Cc: Nicola Vetrini 
Cc: Federico Serafini 
Cc: Bertrand Marquis 
---
 automation/eclair_analysis/ECLAIR/deviations.ecl | 6 ++++++
 docs/misra/deviations.rst                        | 6 ++++++
 2 files changed, 12 insertions(+)

diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/automation/eclair_analysis/ECLAIR/deviations.ecl
index 303b06203a..2cfce850bd 100644
--- a/automation/eclair_analysis/ECLAIR/deviations.ecl
+++ b/automation/eclair_analysis/ECLAIR/deviations.ecl
@@ -347,6 +347,12 @@ constant expressions are required.\""
   "any()"}
 -doc_end

+-doc_begin="Unary minus operations on non-negative integers have a semantics (wrap around) that is well-known to all Xen developers."
+-config=MC3A2.R10.1,etypes+={safe,
+  "stmt(node(unary_operator)&&operator(minus))",
+  "src_expr(definitely_in(0..))"}
+-doc_end
+
 #
 # Series 11
 #
diff --git a/docs/misra/deviations.rst b/docs/misra/deviations.rst
index cfdd1a9838..c5897e31c5 100644
--- a/docs/misra/deviations.rst
+++ b/docs/misra/deviations.rst
@@ -321,6 +321,12 @@ Deviations related to MISRA C:2012 Rules:
        If no bits are set, 0 is returned.
      - Tagged as `safe` for ECLAIR.

+   * - R10.1
+     - Applying the unary minus operator to an unsigned quantity has a
+       semantics (wrap around) that is well-known to all Xen developers.
+       For this reason, the operation is safe.
+     - Tagged as `safe` for ECLAIR.
+
    * - R11.1
      - The conversion from a function pointer to unsigned long or (void \*) does
        not lose any information, provided that the target type has enough bits
--
2.47.0


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	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , "Stefano
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Subject: [PATCH v1] misra: add deviation for rules 21.1 and 21.2
Date: Wed, 23 Apr 2025 10:54:27 -0700
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From: Nicola Vetrini 

MISRA C Rules 21.1 ("#define and #undef shall not be used on a
reserved identifier or reserved macro name") and R21.2 ("A reserved
identifier or reserved macro name shall not be declared") violations
are not problematic for Xen, as it does not use the C or POSIX
libraries.

Xen uses -fno-builtin and -nostdinc to ensure this, but there are still
__builtin_* functions from the compiler that are available so
a deviation is formulated for all identifiers not starting with
"__builtin_".

The missing text of a deviation for Rule 21.2 is added to
docs/misra/deviations.rst.

To avoid regressions, tag both rules as clean and add them to the
monitored set.

Signed-off-by: Nicola Vetrini 
Signed-off-by: Federico Serafini 
Signed-off-by: Victor Lira 
---
Cc: Andrew Cooper 
Cc: Anthony PERARD 
Cc: Michal Orzel 
Cc: Jan Beulich 
Cc: Julien Grall 
Cc: Roger Pau Monné 
Cc: Stefano Stabellini 
Cc: Nicola Vetrini 
Cc: Federico Serafini 
Cc: Bertrand Marquis 
---
 .../eclair_analysis/ECLAIR/deviations.ecl     |  9 ++++++-
 .../eclair_analysis/ECLAIR/monitored.ecl      |  2 ++
 automation/eclair_analysis/ECLAIR/tagging.ecl |  2 ++
 docs/misra/deviations.rst                     | 26 ++++++++++++++++++-
 4 files changed, 37 insertions(+), 2 deletions(-)

diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/automation/eclair_analysis/ECLAIR/deviations.ecl
index 2c8fb92713..ffa23b53b7 100644
--- a/automation/eclair_analysis/ECLAIR/deviations.ecl
+++ b/automation/eclair_analysis/ECLAIR/deviations.ecl
@@ -639,8 +639,15 @@ in the expansion."
 # Series 21.
 #

+-doc_begin="Xen does not use C and POSIX libraries:
+identifiers reserved by these libraries can be used safely, except for those
+beginning with '__builtin_'."
+-config=MC3A2.R21.1,macros={safe, "!^__builtin_.*$"}
+-config=MC3A2.R21.2,declarations={safe, "!^__builtin_.*$"}
+-doc_end
+
 -doc_begin="or, and and xor are reserved identifiers because they constitute alternate
-spellings for the corresponding operators (they are defined as macros by iso646.h).
+spellings for the corresponding logical operators (as defined in header 'iso646.h').
 However, Xen doesn't use standard library headers, so there is no risk of overlap."
 -config=MC3A2.R21.2,reports+={safe, "any_area(stmt(ref(kind(label)&&^(or|and|xor|not)$)))"}
 -doc_end
diff --git a/automation/eclair_analysis/ECLAIR/monitored.ecl b/automation/eclair_analysis/ECLAIR/monitored.ecl
index 8351996ec8..da229a0d84 100644
--- a/automation/eclair_analysis/ECLAIR/monitored.ecl
+++ b/automation/eclair_analysis/ECLAIR/monitored.ecl
@@ -79,6 +79,8 @@
 -enable=MC3A2.R20.12
 -enable=MC3A2.R20.13
 -enable=MC3A2.R20.14
+-enable=MC3A2.R21.1
+-enable=MC3A2.R21.2
 -enable=MC3A2.R21.3
 -enable=MC3A2.R21.4
 -enable=MC3A2.R21.5
diff --git a/automation/eclair_analysis/ECLAIR/tagging.ecl b/automation/eclair_analysis/ECLAIR/tagging.ecl
index 1d078d8905..3292bf751e 100644
--- a/automation/eclair_analysis/ECLAIR/tagging.ecl
+++ b/automation/eclair_analysis/ECLAIR/tagging.ecl
@@ -88,6 +88,8 @@ MC3A2.R20.11||
 MC3A2.R20.12||
 MC3A2.R20.13||
 MC3A2.R20.14||
+MC3A2.R21.1||
+MC3A2.R21.2||
 MC3A2.R21.3||
 MC3A2.R21.4||
 MC3A2.R21.5||
diff --git a/docs/misra/deviations.rst b/docs/misra/deviations.rst
index fe0b1e10a2..88328eaa8a 100644
--- a/docs/misra/deviations.rst
+++ b/docs/misra/deviations.rst
@@ -587,7 +587,31 @@ Deviations related to MISRA C:2012 Rules:
        construct is deviated only in Translation Units that present a violation
        of the Rule due to uses of this macro.
      - Tagged as `deliberate` for ECLAIR.
-
+
+   * - R21.1
+     - Rule 21.1 reports identifiers reserved for the C and POSIX standard
+       libraries. Xen does not use such libraries and all translation units
+       are compiled with option '-nostdinc', therefore there is no reason to
+       avoid to use `#define` or `#undef` on such identifiers except for those
+       beginning with `__builtin_` for which compilers may perform (wrong)
+       optimizations.
+     - Tagged as `safe` for ECLAIR.
+
+   * - R21.2
+     - Rule 21.2 reports identifiers reserved for the C and POSIX standard
+       libraries. Xen does not use such libraries and all translation units
+       are compiled with option '-nostdinc', therefore there is no reason to
+       avoid declaring such identifiers except for those beginning with
+       `__builtin_` for which compilers may perform (wrong) optimizations.
+     - Tagged as `safe` for ECLAIR.
+
+   * - R21.2
+     - `or`, `and` and `xor` are reserved identifiers because they constitute
+       alternate spellings for the corresponding logical operators
+       (as defined in Standard Library header `\`). Xen does not use
+       Standard library headers, so there is no risk of overlap.
+     - Tagged as `safe` for ECLAIR.
+
    * - R21.9
      - Xen does not use the `bsearch` and `qsort` functions provided by the C
        Standard Library, but provides in source form its own implementation,
--
2.47.0


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From: 
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CC: Federico Serafini , Victor Lira
	, Andrew Cooper , "Anthony
 PERARD" , Michal Orzel , Jan
 Beulich , Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , "Stefano
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	, Bertrand Marquis 
Subject: [PATCH v1] misra: add deviation of Rule 5.5
Date: Wed, 23 Apr 2025 10:54:28 -0700
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From: Federico Serafini 

MISRA C Rule 5.5 states that:
"Identifiers shall be distinct from macro names".

A common pattern in Xen is to have a function-like macro that acts as a
"wrapper" for the function to be called:
before calling the function, the macro adds additional checks or
increase/decrease the number of parameters depending on the
configuration.

Update ECLAIR configuration and deviations.rst.

Signed-off-by: Federico Serafini 
Signed-off-by: Victor Lira 
---
Cc: Andrew Cooper 
Cc: Anthony PERARD 
Cc: Michal Orzel 
Cc: Jan Beulich 
Cc: Julien Grall 
Cc: Roger Pau Monné 
Cc: Stefano Stabellini 
Cc: Nicola Vetrini 
Cc: Federico Serafini 
Cc: Bertrand Marquis 
---
 automation/eclair_analysis/ECLAIR/deviations.ecl | 8 ++++++++
 docs/misra/deviations.rst                        | 8 ++++++++
 2 files changed, 16 insertions(+)

diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/automation/eclair_analysis/ECLAIR/deviations.ecl
index ffa23b53b7..303b06203a 100644
--- a/automation/eclair_analysis/ECLAIR/deviations.ecl
+++ b/automation/eclair_analysis/ECLAIR/deviations.ecl
@@ -114,6 +114,14 @@ it defines would (in the common case) be already defined. Peer reviewed by the c
 -config=MC3A2.R5.5,reports+={deliberate, "any_area(decl(kind(function))||any_loc(macro(name(memcpy||memset||memmove))))&&any_area(any_loc(file(^xen/common/libelf/libelf-private\\.h$)))"}
 -doc_end

+-doc_begin="Clashes between function-like macros and function names are
+deliberate since a common pattern in Xen is to have a function-like macro
+that acts as a \"wrapper\" for the function to be called:
+before calling the function, the macro adds additional checks or
+increase/decrease the number of parameters depending on the configuration."
+-config=MC3A2.R5.5,reports+={deliberate, "all_area(macro(function_like())||decl(kind(function)))"}
+-doc_end
+
 -doc_begin="The type \"ret_t\" is deliberately defined multiple times,
 depending on the guest."
 -config=MC3A2.R5.6,reports+={deliberate,"any_area(any_loc(text(^.*ret_t.*$)))"}
diff --git a/docs/misra/deviations.rst b/docs/misra/deviations.rst
index 88328eaa8a..cfdd1a9838 100644
--- a/docs/misra/deviations.rst
+++ b/docs/misra/deviations.rst
@@ -130,6 +130,14 @@ Deviations related to MISRA C:2012 Rules:
        memmove.
      - Tagged as `deliberate` for ECLAIR.

+   * - R5.5
+     - Clashes between function-like macros and function names are
+       deliberate since a common pattern in Xen is to have a function-like
+       macro that acts as a "wrapper" for the function to be called:
+       before calling the function, the macro adds additional checks or
+       increase/decrease the number of parameters depending on the configuration.
+     - Tagged as `deliberate` for ECLAIR.
+
    * - R5.6
      - The type ret_t is deliberately defined multiple times depending on the
        type of guest to service.
--
2.47.0


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Message-ID: <58f11241-7b9b-4082-b121-4dbe6a085ef0@amd.com>
Date: Wed, 23 Apr 2025 11:06:41 -0700
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v1] misra: add deviation of Rule 10.1 for unary minus
To: xen-devel@lists.xenproject.org
Cc: Nicola Vetrini ,
 Federico Serafini ,
 Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Jan Beulich ,
 Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Stefano Stabellini ,
 Bertrand Marquis 
References: <9e1210f2a9c794d68dcc6b897239b228b141296a.1745427770.git.victorm.lira@amd.com>
 <7c7b7a09e9d5ac1cc6f93fecacd8065fb6f25324.1745427770.git.victorm.lira@amd.com>
Content-Language: en-US
From: "Lira, Victor M" 
In-Reply-To: <7c7b7a09e9d5ac1cc6f93fecacd8065fb6f25324.1745427770.git.victorm.lira@amd.com>
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Continuing a discussion from before:

On 4/22/2025 11:51 PM, Jan Beulich wrote:
> Caution: This message originated from an External Source. Use proper caution when opening attachments, clicking links, or responding.
>
>
> On 23.04.2025 01:43, victorm.lira@amd.com wrote:
>> From: Nicola Vetrini 
>>
>> The unary minus operator applied to an unsigned quantity has
>> a semantics (wrap around) that is well-known to all Xen developers.
>> Thus, this operation is deemed safe.
> Please, as you have it in the other two patches, can the rule title be
> reproduced in such patches? As it stands, without mentioning the doc
> version either, someone finding this later on may be left with a pretty
> wide ambiguity as to what's meant.
OK I'll include the rule title in the commit message.
>> --- a/automation/eclair_analysis/ECLAIR/deviations.ecl
>> +++ b/automation/eclair_analysis/ECLAIR/deviations.ecl
>> @@ -347,6 +347,12 @@ constant expressions are required.\""
>>     "any()"}
>>   -doc_end
>>
>> +-doc_begin="Unary minus operations on non-negative integers have a semantics (wrap around) that is well-known to all Xen developers."
> Why "non-negative"? A variable of type "int" holding a non-negative value is,
> aiui, well within the bounds of the rule here. It's unsigned types where the
> use of unary minus would constitute a violation. You actually say so ...
>> +   * - R10.1
>> +     - Applying the unary minus operator to an unsigned quantity has a
>> +       semantics (wrap around) that is well-known to all Xen developers.
>> +       For this reason, the operation is safe.
>> +     - Tagged as `safe` for ECLAIR.
> ... here, just that this one's getting blurred by using "quantity" when
> "type" is meant. Imo we need to be pretty precise here, using terminology
> that's used by the standard or the Misra rules, and not anything "coming
> close enough" in someone's perception.
OK, I agree it should say unsigned type(s) in both of these.


Victor


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Message-ID: 
Date: Wed, 23 Apr 2025 11:16:49 -0700
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v1] misra: add deviation of Rule 5.5
To: xen-devel@lists.xenproject.org
Cc: Federico Serafini ,
 Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Jan Beulich ,
 Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Stefano Stabellini ,
 Nicola Vetrini ,
 Bertrand Marquis 
References: <9e1210f2a9c794d68dcc6b897239b228b141296a.1745427770.git.victorm.lira@amd.com>
 <48c7830931a98b2bf70ef1509f309b262b9e5792.1745427770.git.victorm.lira@amd.com>
Content-Language: en-US
From: "Lira, Victor M" 
In-Reply-To: <48c7830931a98b2bf70ef1509f309b262b9e5792.1745427770.git.victorm.lira@amd.com>
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Continuing a discussion from before:

On 4/22/2025 11:44 PM, Jan Beulich wrote:
> Caution: This message originated from an External Source. Use proper caution when opening attachments, clicking links, or responding.
>
>
> On 23.04.2025 01:43, victorm.lira@amd.com wrote:
>>          memmove.
>>        - Tagged as `deliberate` for ECLAIR.
>>
>> +   * - R5.5
>> +     - Clashes between function-like macros and function names are
>> +       deliberate
> They may or may not be deliberate, depending on context. I don't think it's a
> good move to deviate this more widely than necessary. If I get the expression
> above (in deviations.ecl) right, even
>
> void func1(int);
> void func2(int);
>
> #define func1() func2(0)
> #define func2() func1(0)
>
> would be deviated, which I don't think we want. Especially when, in a less
> contrived scenario, the clash may not easily be visible.
OK, I see the issue for different functions. Does it make sense to say 
it's deliberate when it's the same identifier?

	void func1(int);
	...
	#define func1() func1(0)

Could this be deviated?


Victor



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Message-ID: <3faee6ec-803d-4622-a729-38047c796c77@amd.com>
Date: Wed, 23 Apr 2025 14:34:26 -0400
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v4 3/4] xen/arm: add support for PCI child bus
To: Mykyta Poturai , "xen-devel@lists.xenproject.org"
	
CC: Oleksandr Andrushchenko , "Stefano
 Stabellini" , Julien Grall ,
	"Bertrand Marquis" , Michal Orzel
	, Volodymyr Babchuk 
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On 4/23/25 07:08, Mykyta Poturai wrote:
> From: Oleksandr Andrushchenko 
> 
> PCI host bridges often have different ways to access the root and child
> bus configuration spaces. One of the examples is Designware's host bridge
> and its multiple clones [1].
> 
> Linux kernel implements this by instantiating a child bus when device
> drivers provide not only the usual pci_ops to access ECAM space (this is
> the case for the generic host bridge), but also means to access the child
> bus which has a dedicated configuration space and own implementation for
> accessing the bus, e.g. child_ops.
> 
> For Xen it is not feasible to fully implement PCI bus infrastructure as
> Linux kernel does, but still child bus can be supported.
> 
> Add support for the PCI child bus which includes the following changes:
> - introduce bus mapping functions depending on SBDF
> - assign bus start and end for the child bus and re-configure the same for
>   the parent (root) bus
> - make pci_find_host_bridge be aware of multiple busses behind the same bridge
> - update pci_host_bridge_mappings, so it also doesn't map to guest the memory
>   spaces belonging to the child bus
> - make pci_host_common_probe accept one more pci_ops structure for the child bus
> - install MMIO handlers for the child bus

Nit: perhaps clarify that they are only installed for the hardware domain

> - re-work vpci_mmio_{write|read} with parent and child approach in mind
> 
> [1] https://elixir.bootlin.com/linux/v5.15/source/drivers/pci/controller/dwc
> 
> Signed-off-by: Oleksandr Andrushchenko 
> Signed-off-by: Mykyta Poturai 
> ---
> v3->v4:
> * remove changes to pci_ecam_map_bus
> * make map_bus inline
> * fix logic error in pci_host_bridge_mappings
> 
> v2->v3:
> * no change
> 
> v1->v2:
> * fixed compilation issues
> ---
>  xen/arch/arm/include/asm/pci.h      |  9 ++-
>  xen/arch/arm/pci/pci-access.c       | 37 +++++++++++--
>  xen/arch/arm/pci/pci-host-common.c  | 86 +++++++++++++++++++++++------
>  xen/arch/arm/pci/pci-host-generic.c |  2 +-
>  xen/arch/arm/pci/pci-host-zynqmp.c  |  2 +-
>  xen/arch/arm/vpci.c                 | 83 ++++++++++++++++++++++------
>  6 files changed, 177 insertions(+), 42 deletions(-)
> 
> diff --git a/xen/arch/arm/include/asm/pci.h b/xen/arch/arm/include/asm/pci.h
> index 3d2ca9b5b0..94ec63f3c8 100644
> --- a/xen/arch/arm/include/asm/pci.h
> +++ b/xen/arch/arm/include/asm/pci.h
> @@ -67,6 +67,9 @@ struct pci_host_bridge {
>      uint16_t segment;                /* Segment number */
>      struct pci_config_window* cfg;   /* Pointer to the bridge config window */
>      const struct pci_ops *ops;
> +    /* Child bus */
> +    struct pci_config_window *child_cfg;
> +    const struct pci_ops *child_ops;
>      void *priv;                      /* Private data of the bridge. */
>  };
>  
> @@ -96,8 +99,10 @@ struct pci_ecam_ops {
>  /* Default ECAM ops */
>  extern const struct pci_ecam_ops pci_generic_ecam_ops;
>  
> -struct pci_host_bridge *pci_host_common_probe(struct dt_device_node *dev,
> -                                              const struct pci_ecam_ops *ops);
> +struct pci_host_bridge *
> +pci_host_common_probe(struct dt_device_node *dev,
> +                      const struct pci_ecam_ops *ops,
> +                      const struct pci_ecam_ops *child_ops);
>  int pci_generic_config_read(struct pci_host_bridge *bridge, pci_sbdf_t sbdf,
>                              uint32_t reg, uint32_t len, uint32_t *value);
>  int pci_generic_config_write(struct pci_host_bridge *bridge, pci_sbdf_t sbdf,
> diff --git a/xen/arch/arm/pci/pci-access.c b/xen/arch/arm/pci/pci-access.c
> index 9f9aac43d7..91271973fb 100644
> --- a/xen/arch/arm/pci/pci-access.c
> +++ b/xen/arch/arm/pci/pci-access.c
> @@ -18,10 +18,31 @@
>  #define INVALID_VALUE (~0U)
>  #define PCI_ERR_VALUE(len) GENMASK(0, len * 8)
>  
> +static const struct pci_ops *get_ops(struct pci_host_bridge *bridge,
> +                                     pci_sbdf_t sbdf)
> +{
> +    if ( bridge->child_ops )
> +    {
> +        struct pci_config_window *cfg = bridge->child_cfg;
> +
> +        if ( (sbdf.bus >= cfg->busn_start) && (sbdf.bus <= cfg->busn_end) )
> +            return bridge->child_ops;
> +    }
> +    return bridge->ops;
> +}
> +
> +static inline void __iomem *map_bus(struct pci_host_bridge *bridge, pci_sbdf_t sbdf,
> +                             uint32_t reg)
> +{
> +    const struct pci_ops *ops = get_ops(bridge, sbdf);
> +
> +    return ops->map_bus(bridge, sbdf, reg);
> +}
> +
>  int pci_generic_config_read(struct pci_host_bridge *bridge, pci_sbdf_t sbdf,
>                              uint32_t reg, uint32_t len, uint32_t *value)
>  {
> -    void __iomem *addr = bridge->ops->map_bus(bridge, sbdf, reg);
> +    void __iomem *addr = map_bus(bridge, sbdf, reg);
>  
>      if ( !addr )
>      {
> @@ -50,7 +71,7 @@ int pci_generic_config_read(struct pci_host_bridge *bridge, pci_sbdf_t sbdf,
>  int pci_generic_config_write(struct pci_host_bridge *bridge, pci_sbdf_t sbdf,
>                               uint32_t reg, uint32_t len, uint32_t value)
>  {
> -    void __iomem *addr = bridge->ops->map_bus(bridge, sbdf, reg);
> +    void __iomem *addr = map_bus(bridge, sbdf, reg);
>  
>      if ( !addr )
>          return -ENODEV;
> @@ -78,14 +99,16 @@ static uint32_t pci_config_read(pci_sbdf_t sbdf, unsigned int reg,
>  {
>      uint32_t val = PCI_ERR_VALUE(len);
>      struct pci_host_bridge *bridge = pci_find_host_bridge(sbdf.seg, sbdf.bus);
> +    const struct pci_ops *ops;
>  
>      if ( unlikely(!bridge) )
>          return val;
>  
> -    if ( unlikely(!bridge->ops->read) )
> +    ops = get_ops(bridge, sbdf);
> +    if ( unlikely(!ops->read) )
>          return val;
>  
> -    bridge->ops->read(bridge, sbdf, reg, len, &val);
> +    ops->read(bridge, sbdf, reg, len, &val);
>  
>      return val;
>  }
> @@ -94,14 +117,16 @@ static void pci_config_write(pci_sbdf_t sbdf, unsigned int reg,
>                               unsigned int len, uint32_t val)
>  {
>      struct pci_host_bridge *bridge = pci_find_host_bridge(sbdf.seg, sbdf.bus);
> +    const struct pci_ops *ops;
>  
>      if ( unlikely(!bridge) )
>          return;
>  
> -    if ( unlikely(!bridge->ops->write) )
> +    ops = get_ops(bridge, sbdf);
> +    if ( unlikely(!ops->write) )
>          return;
>  
> -    bridge->ops->write(bridge, sbdf, reg, len, val);
> +    ops->write(bridge, sbdf, reg, len, val);
>  }
>  
>  /*
> diff --git a/xen/arch/arm/pci/pci-host-common.c b/xen/arch/arm/pci/pci-host-common.c
> index 53953d4895..1d0dc1b4bd 100644
> --- a/xen/arch/arm/pci/pci-host-common.c
> +++ b/xen/arch/arm/pci/pci-host-common.c
> @@ -57,17 +57,12 @@ static void pci_ecam_free(struct pci_config_window *cfg)
>      xfree(cfg);
>  }
>  
> -static struct pci_config_window * __init
> -gen_pci_init(struct dt_device_node *dev, const struct pci_ecam_ops *ops)
> +static void __init gen_pci_init_bus_range(struct dt_device_node *dev,
> +                                          struct pci_host_bridge *bridge,
> +                                          struct pci_config_window *cfg)
>  {
> -    int err, cfg_reg_idx;
>      u32 bus_range[2];
> -    paddr_t addr, size;
> -    struct pci_config_window *cfg;
> -
> -    cfg = xzalloc(struct pci_config_window);
> -    if ( !cfg )
> -        return NULL;
> +    int err;
>  
>      err = dt_property_read_u32_array(dev, "bus-range", bus_range,
>                                       ARRAY_SIZE(bus_range));
> @@ -82,6 +77,36 @@ gen_pci_init(struct dt_device_node *dev, const struct pci_ecam_ops *ops)
>          if ( cfg->busn_end > cfg->busn_start + 0xff )
>              cfg->busn_end = cfg->busn_start + 0xff;
>      }
> +}
> +
> +static void __init gen_pci_init_bus_range_child(struct dt_device_node *dev,
> +                                                struct pci_host_bridge *bridge,
> +                                                struct pci_config_window *cfg)
> +{
> +    cfg->busn_start = bridge->cfg->busn_start + 1;

I read this as "the child bus number starts at the parent bus number
plus one". I'm not sure we want to hardcode this type of information in
a common file. Perhaps it would be better suited in pci-designware.c or
pci-host-rcar4.c. Could you pass the bus range init function pointer via
struct pci_ops?

> +    cfg->busn_end = bridge->cfg->busn_end;
> +    bridge->cfg->busn_end = bridge->cfg->busn_start;
> +
> +    printk(XENLOG_INFO "Root bus end updated: [bus %x-%x]\n",
> +           bridge->cfg->busn_start, bridge->cfg->busn_end);
> +}
> +
> +static struct pci_config_window *__init
> +gen_pci_init(struct dt_device_node *dev, struct pci_host_bridge *bridge,
> +             const struct pci_ecam_ops *ops,
> +             void (*init_bus_range)(struct dt_device_node *dev,
> +                                    struct pci_host_bridge *bridge,
> +                                    struct pci_config_window *cfg))
> +{
> +    int err, cfg_reg_idx;
> +    paddr_t addr, size;
> +    struct pci_config_window *cfg;
> +
> +    cfg = xzalloc(struct pci_config_window);
> +    if ( !cfg )
> +        return NULL;
> +
> +    init_bus_range(dev, bridge, cfg);
>  
>      if ( ops->cfg_reg_index )
>      {
> @@ -208,8 +233,10 @@ static int pci_bus_find_domain_nr(struct dt_device_node *dev)
>      return domain;
>  }
>  
> -struct pci_host_bridge *pci_host_common_probe(struct dt_device_node *dev,
> -                                              const struct pci_ecam_ops *ops)
> +struct pci_host_bridge *
> +pci_host_common_probe(struct dt_device_node *dev,
> +                      const struct pci_ecam_ops *ops,
> +                      const struct pci_ecam_ops *child_ops)
>  {
>      struct pci_host_bridge *bridge;
>      struct pci_config_window *cfg;
> @@ -224,7 +251,7 @@ struct pci_host_bridge *pci_host_common_probe(struct dt_device_node *dev,
>          return ERR_PTR(-ENOMEM);
>  
>      /* Parse and map our Configuration Space windows */
> -    cfg = gen_pci_init(dev, ops);
> +    cfg = gen_pci_init(dev, bridge, ops, gen_pci_init_bus_range);
>      if ( !cfg )
>      {
>          err = -ENOMEM;
> @@ -242,10 +269,29 @@ struct pci_host_bridge *pci_host_common_probe(struct dt_device_node *dev,
>          BUG();
>      }
>      bridge->segment = domain;
> +
> +    if ( child_ops )
> +    {
> +        /* Parse and map child's Configuration Space windows */
> +        cfg = gen_pci_init(dev, bridge, child_ops,
> +                           gen_pci_init_bus_range_child);
> +        if ( !cfg )
> +        {
> +            err = -ENOMEM;
> +            goto err_child;
> +        }
> +
> +        bridge->child_cfg = cfg;
> +        bridge->child_ops = &child_ops->pci_ops;
> +    }
> +
>      pci_add_host_bridge(bridge);
>  
>      return bridge;
>  
> +err_child:
> +    xfree(bridge->cfg);
> +
>  err_exit:
>      xfree(bridge);
>  
> @@ -280,9 +326,12 @@ struct pci_host_bridge *pci_find_host_bridge(uint16_t segment, uint8_t bus)
>      {
>          if ( bridge->segment != segment )
>              continue;
> -        if ( (bus < bridge->cfg->busn_start) || (bus > bridge->cfg->busn_end) )
> -            continue;
> -        return bridge;
> +        if ( bridge->child_cfg && (bus >= bridge->child_cfg->busn_start) &&
> +             (bus <= bridge->child_cfg->busn_end) )
> +            return bridge;
> +        if ( (bus >= bridge->cfg->busn_start) &&
> +             (bus <= bridge->cfg->busn_end) )
> +            return bridge;
>      }
>  
>      return NULL;
> @@ -348,6 +397,7 @@ int __init pci_host_bridge_mappings(struct domain *d)
>      {
>          const struct dt_device_node *dev = bridge->dt_node;
>          unsigned int i;
> +        bool need_mapping;
>  
>          for ( i = 0; i < dt_number_of_address(dev); i++ )
>          {
> @@ -363,7 +413,11 @@ int __init pci_host_bridge_mappings(struct domain *d)
>                  return err;
>              }
>  
> -            if ( bridge->ops->need_p2m_hwdom_mapping(d, bridge, addr) )
> +            need_mapping = bridge->ops->need_p2m_hwdom_mapping(d, bridge, addr);
> +            if ( need_mapping || bridge->child_ops )
> +                need_mapping =
> +                    bridge->child_ops->need_p2m_hwdom_mapping(d, bridge, addr);

You're dereferencing child_ops without NULL-checking it.

> +            if ( need_mapping )
>              {
>                  err = map_range_to_domain(dev, addr, size, &mr_data);
>                  if ( err )
> diff --git a/xen/arch/arm/pci/pci-host-generic.c b/xen/arch/arm/pci/pci-host-generic.c
> index a6ffbda174..47cf144831 100644
> --- a/xen/arch/arm/pci/pci-host-generic.c
> +++ b/xen/arch/arm/pci/pci-host-generic.c
> @@ -29,7 +29,7 @@ static const struct dt_device_match __initconstrel gen_pci_dt_match[] =
>  static int __init pci_host_generic_probe(struct dt_device_node *dev,
>                                           const void *data)
>  {
> -    return PTR_RET(pci_host_common_probe(dev, &pci_generic_ecam_ops));
> +    return PTR_RET(pci_host_common_probe(dev, &pci_generic_ecam_ops, NULL));
>  }
>  
>  DT_DEVICE_START(pci_gen, "PCI HOST GENERIC", DEVICE_PCI_HOSTBRIDGE)
> diff --git a/xen/arch/arm/pci/pci-host-zynqmp.c b/xen/arch/arm/pci/pci-host-zynqmp.c
> index a38f2e019e..75d1235aaf 100644
> --- a/xen/arch/arm/pci/pci-host-zynqmp.c
> +++ b/xen/arch/arm/pci/pci-host-zynqmp.c
> @@ -47,7 +47,7 @@ static const struct dt_device_match __initconstrel nwl_pcie_dt_match[] =
>  static int __init pci_host_generic_probe(struct dt_device_node *dev,
>                                           const void *data)
>  {
> -    return PTR_RET(pci_host_common_probe(dev, &nwl_pcie_ops));
> +    return PTR_RET(pci_host_common_probe(dev, &nwl_pcie_ops, NULL));
>  }
>  
>  DT_DEVICE_START(pci_gen, "PCI HOST ZYNQMP", DEVICE_PCI_HOSTBRIDGE)
> diff --git a/xen/arch/arm/vpci.c b/xen/arch/arm/vpci.c
> index b63a356bb4..468aee1db7 100644
> --- a/xen/arch/arm/vpci.c
> +++ b/xen/arch/arm/vpci.c
> @@ -8,15 +8,17 @@
>  #include 
>  
>  static pci_sbdf_t vpci_sbdf_from_gpa(const struct pci_host_bridge *bridge,
> -                                     paddr_t gpa)
> +                                     paddr_t gpa, bool use_root)
>  {
>      pci_sbdf_t sbdf;
>  
>      if ( bridge )
>      {
> -        sbdf.sbdf = VPCI_ECAM_BDF(gpa - bridge->cfg->phys_addr);
> +        const struct pci_config_window *cfg = use_root ? bridge->cfg
> +                                                       : bridge->child_cfg;
> +        sbdf.sbdf = VPCI_ECAM_BDF(gpa - cfg->phys_addr);
>          sbdf.seg = bridge->segment;
> -        sbdf.bus += bridge->cfg->busn_start;
> +        sbdf.bus += cfg->busn_start;
>      }
>      else
>          sbdf.sbdf = VPCI_ECAM_BDF(gpa - GUEST_VPCI_ECAM_BASE);
> @@ -24,11 +26,9 @@ static pci_sbdf_t vpci_sbdf_from_gpa(const struct pci_host_bridge *bridge,
>      return sbdf;
>  }
>  
> -static int vpci_mmio_read(struct vcpu *v, mmio_info_t *info,
> -                          register_t *r, void *p)
> +static int vpci_mmio_read(struct vcpu *v, mmio_info_t *info, register_t *r,
> +                          pci_sbdf_t sbdf)
>  {
> -    struct pci_host_bridge *bridge = p;
> -    pci_sbdf_t sbdf = vpci_sbdf_from_gpa(bridge, info->gpa);
>      const unsigned int access_size = (1U << info->dabt.size) * 8;
>      const register_t invalid = GENMASK_ULL(access_size - 1, 0);
>      /* data is needed to prevent a pointer cast on 32bit */
> @@ -46,31 +46,78 @@ static int vpci_mmio_read(struct vcpu *v, mmio_info_t *info,
>      return 0;
>  }
>  
> -static int vpci_mmio_write(struct vcpu *v, mmio_info_t *info,
> -                           register_t r, void *p)
> +static int vpci_mmio_read_root(struct vcpu *v, mmio_info_t *info, register_t *r,
> +                               void *p)
> +{
> +    struct pci_host_bridge *bridge = p;
> +    pci_sbdf_t sbdf = vpci_sbdf_from_gpa(bridge, info->gpa, true);
> +
> +    return vpci_mmio_read(v, info, r, sbdf);
> +}
> +
> +static int vpci_mmio_read_child(struct vcpu *v, mmio_info_t *info,
> +                                register_t *r, void *p)
>  {
>      struct pci_host_bridge *bridge = p;
> -    pci_sbdf_t sbdf = vpci_sbdf_from_gpa(bridge, info->gpa);
> +    pci_sbdf_t sbdf = vpci_sbdf_from_gpa(bridge, info->gpa, false);
> +
> +    return vpci_mmio_read(v, info, r, sbdf);
> +}
>  
> +static int vpci_mmio_write(struct vcpu *v, mmio_info_t *info, register_t r,
> +                           pci_sbdf_t sbdf)
> +{
>      return vpci_ecam_write(sbdf, ECAM_REG_OFFSET(info->gpa),
>                             1U << info->dabt.size, r);
>  }
>  
> +static int vpci_mmio_write_root(struct vcpu *v, mmio_info_t *info, register_t r,
> +                                void *p)
> +{
> +    struct pci_host_bridge *bridge = p;
> +    pci_sbdf_t sbdf = vpci_sbdf_from_gpa(bridge, info->gpa, true);
> +
> +    return vpci_mmio_write(v, info, r, sbdf);
> +}
> +
> +static int vpci_mmio_write_child(struct vcpu *v, mmio_info_t *info,
> +                                 register_t r, void *p)
> +{
> +    struct pci_host_bridge *bridge = p;
> +    pci_sbdf_t sbdf = vpci_sbdf_from_gpa(bridge, info->gpa, false);
> +
> +    return vpci_mmio_write(v, info, r, sbdf);
> +}
> +
>  static const struct mmio_handler_ops vpci_mmio_handler = {
> -    .read  = vpci_mmio_read,
> -    .write = vpci_mmio_write,
> +    .read = vpci_mmio_read_root,
> +    .write = vpci_mmio_write_root,
> +};
> +
> +static const struct mmio_handler_ops vpci_mmio_handler_child = {
> +    .read = vpci_mmio_read_child,
> +    .write = vpci_mmio_write_child,
>  };
>  
>  static int vpci_setup_mmio_handler_cb(struct domain *d,
>                                        struct pci_host_bridge *bridge)
>  {
>      struct pci_config_window *cfg = bridge->cfg;
> +    int count = 1;
>  
>      register_mmio_handler(d, &vpci_mmio_handler,
>                            cfg->phys_addr, cfg->size, bridge);
>  
> -    /* We have registered a single MMIO handler. */
> -    return 1;
> +    if ( bridge->child_ops )
> +    {
> +        struct pci_config_window *cfg = bridge->child_cfg;

This variable shadows the cfg variable of the same name at the top of
the function.

> +
> +        register_mmio_handler(d, &vpci_mmio_handler_child, cfg->phys_addr,
> +                              cfg->size, bridge);
> +        count++;
> +    }
> +
> +    return count;
>  }
>  
>  int domain_vpci_init(struct domain *d)
> @@ -101,8 +148,12 @@ int domain_vpci_init(struct domain *d)
>  static int vpci_get_num_handlers_cb(struct domain *d,
>                                      struct pci_host_bridge *bridge)
>  {
> -    /* Each bridge has a single MMIO handler for the configuration space. */
> -    return 1;
> +    int count = 1;
> +
> +    if ( bridge->child_cfg )
> +        count++;
> +
> +    return count;
>  }
>  
>  unsigned int domain_vpci_get_num_mmio_handlers(struct domain *d)



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Date: Wed, 23 Apr 2025 21:45:56 +0300
From: Sergii Dmytruk 
To: Andrew Cooper 
Cc: xen-devel@lists.xenproject.org, Jan Beulich ,
	Roger Pau =?iso-8859-1?Q?Monn=E9?= ,
	Lukasz Hawrylko ,
	"Daniel P. Smith" ,
	Mateusz =?iso-8859-1?Q?M=F3wka?= ,
	Anthony PERARD ,
	Michal Orzel , Julien Grall ,
	Stefano Stabellini ,
	Marek =?iso-8859-1?Q?Marczykowski-G=F3recki?= ,
	trenchboot-devel@googlegroups.com
Subject: Re: [PATCH 00/21] x86: Trenchboot Secure Launch DRTM (Xen)
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On Wed, Apr 23, 2025 at 02:38:37PM +0100, Andrew Cooper wrote:
> On 22/04/2025 6:14 pm, Andrew Cooper wrote:
> > I've stripped out the sha2 patch and fixed up to use the existing sha2,
> > then kicked off some CI testing:
> >
> > https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1780285393
> > https://cirrus-ci.com/build/5452335868018688
> >
> > When the dust has settled, I'll talk you through the failures.
>
> And here we go. Interestingly, the FreeBSD testing was entirely happy,
> and that is the rare way around.
>
> For Gitlab, there are several areas.
>
> First, for MISRA. In the job logs, you want the "Browse current
> reports:" link which will give you full details, but it's all pretty
> simple stuff.

Thanks, but that link gives me a list of 5096 failures all over the code
base.  Is there any way to see a diff against master?

> kbl-suspend-x86-64-gcc-debug is a real S3 test on KabyLake hardware,
> which appears to have gone to sleep and never woken up. (More likely,
> crashed on wakeup before we got the console up). The AlderLake
> equivalent test seems to be happy, as well as the AMD ones.

Hm, not sure what that could be, but will try to reproduce/guess.

> For the build issues, there are quite a few.
>
> debian-12-x86_64-gcc-ibt is special, using an out-of-tree patch for
> CET-IBT safety. tl;dr function pointer callees need a cf_check
> annotation. But, all the failures here are from sha1, and from bits
> which I don't think want to survive into the final form.

That stuff is gone and the build should succeed the next time.

> Other common failures seem to be:
>
>  # take image offset into account
>  arch/x86/efi/fixmlehdr xen.efi 0x200000
>  Failed to find MLE header in xen.efi
>  arch/x86/Makefile:220: recipe for target 'xen.efi' failed
>  make[3]: *** [xen.efi] Error 1
>
> ~Andrew

That seems to be the only reason behind the rest of build failures.
I was able to reproduce the failure in Fedora 37 docker.  Searching for
the header in 8KiB instead of 4KiB fixes it.  Looks like large default
alignment of some toolchains pushes `head.S` to 4 KiB offset.


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Date: Wed, 23 Apr 2025 14:59:03 -0400
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Subject: Re: [PATCH 00/21] x86: Trenchboot Secure Launch DRTM (Xen)
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To: Sergii Dmytruk , xen-devel@lists.xenproject.org
Cc: Jan Beulich , Andrew Cooper
 , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Lukasz Hawrylko ,
 =?UTF-8?Q?Mateusz_M=C3=B3wka?= ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 Stefano Stabellini ,
 =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
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On 4/22/25 11:06, Sergii Dmytruk wrote:
> The aim of the [TrenchBoot] project is to provide an implementation of
> DRTM that is generic enough to cover various use cases:
>   - Intel TXT and AMD SKINIT on x86 CPUs
>   - legacy and UEFI boot
>   - TPM1.2 and TPM2.0
>   - (in the future) DRTM on Arm CPUs
> 
> DRTM is a version of a measured launch that starts on request rather
> than at the start of a boot cycle.  One of its advantages is in not
> including the firmware in the chain of trust.
> 
> Xen already supports DRTM via [tboot] which targets Intel TXT only.
> tboot employs encapsulates some of the DRTM details within itself while
> with TrenchBoot Xen (or Linux) is meant to be a self-contained payload
> for a TrenchBoot-enabled bootloader (think GRUB).  The one exception is
> that UEFI case requires calling back into bootloader to initiate DRTM,
> which is necessary to give Xen a chance of querying all the information
> it needs from the firmware before performing DRTM start.
> 
>  From reading the above tboot might seem like a more abstracted, but the
> reality is that the payload needs to have DRTM-specific knowledge either
> way.  TrenchBoot in principle allows coming up with independent
> implementations of bootloaders and payloads that are compatible with
> each other.
> 
> The "x86/boot: choose AP stack based on APIC ID" patch is shared with
> [Parallelize AP bring-up] series which is required here because Intel
> TXT always releases all APs simultaneously.  The rest of the patches are
> unique.
> 

Sergii,

Thanks so much to you and the team over at 3mdeb for taking the lead on 
getting Secure Launch written for Xen.

One quick comment, Secure Launch will eventually support other 
architectures, and we really should not let the maintenance fall on the 
x86 maintainers, or eventually to "the rest". I would like to suggest 
adding an entry into the MAINTAINERS file for "TrenchBoot Secure Launch" 
and list any new files that are being introduced for Secure Launch. When 
adding the section to MAINTAINERS, I would kindly like to request that 
myself be included as a maintainer and Ross Phillipson as a reviewer.

V/r,
Daniel P. Smith



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Subject: Re: [RFC 33/38] x86/boot: refactor bzimage parser to be re-enterant
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On 2025-04-19 18:08, Daniel P. Smith wrote:
> The bzimage logic uses the unit global orig_image_len to hold the original
> module length for the kernel when the headroom is calculated. It then uses
> orig_image_len to locate the start of the bzimage when the expansion is done.
> This is an issue when more than one bzimage is processed by the headroom
> calculation logic, as it will leave orig_image_len set to the length of the
> last bzimage it processed.
> 
> The boot module work introduced storing the headroom size on a per module
> basis. By passing in the headroom from the boot module, orig_image_len is no
> longer needed to locate the beginning of the bzimage after the allocated
> headroom. The bzimage functions are reworked as such, allowing the removal of
> orig_image_len and enabling them to be reused by multiple kernel boot modules.
> 
> Signed-off-by: Daniel P. Smith 
> ---
>   xen/arch/x86/bzimage.c             | 38 ++++++++++++++++++------------
>   xen/arch/x86/hvm/dom_build.c       |  3 ++-
>   xen/arch/x86/include/asm/bzimage.h |  5 ++--
>   xen/arch/x86/pv/dom0_build.c       |  3 ++-
>   4 files changed, 30 insertions(+), 19 deletions(-)
> 
> diff --git a/xen/arch/x86/bzimage.c b/xen/arch/x86/bzimage.c
> index 66f648f311e4..32f0360d25b4 100644

> @@ -103,13 +100,20 @@ unsigned long __init bzimage_headroom(void *image_start,
>       return headroom;
>   }
>   
> -int __init bzimage_parse(void *image_base, void **image_start,
> -                         unsigned long *image_len)
> +int __init bzimage_parse(
> +    void *image_base, void **image_start, unsigned long headroom,
> +    unsigned long *image_len)
>   {
>       struct setup_header *hdr = (struct setup_header *)(*image_start);
>       int err = bzimage_check(hdr, *image_len);
> -    unsigned long output_len;
> -
> +    unsigned long module_len = *image_len;
> +
> +    /*
> +     * Variable err will have one of three values:
> +     *   -  < 0: a error occurred trying to inspect the contents
> +     *   -  > 0: the image is a bzImage
> +     *   - == 0: not a bzImage, could be raw elf or elf.gz (vmlinuz.gz)
> +     */

This comment seems a little independent of this change, so maybe it 
should be submitted separately.  Also, I think a better placement would 
be next to bzimage_check().

>       if ( err < 0 )
>           return err;
>   
> @@ -118,21 +122,25 @@ int __init bzimage_parse(void *image_base, void **image_start,
>           *image_start += (hdr->setup_sects + 1) * 512 + hdr->payload_offset;
>           *image_len = hdr->payload_length;

@here

>       }
> -
> -    if ( elf_is_elfbinary(*image_start, *image_len) )
> -        return 0;
> +    else
> +    {
> +        if ( elf_is_elfbinary(*image_start, *image_len) )
> +            return 0;
> +        else
> +            *image_len = *image_len - headroom;
> +    }

I don't like this extra indention which includes the return.  If you 
retain orig_image_len as a local variable, and set it above at "@here", 
you can have a smaller diff and leave cleaner logic.

orig_image_len previously was set as a static variable, so the correct
value was set after bzimage_headroom.  Now that it is no longer static,
we need to grab the hdr->payload_length value when we have a bzImage.
Otherwise output_length will read past the end of the module.

Below is the diff for bzimage.c with the change I suggest.

Regards,
Jason

diff --git a/xen/arch/x86/bzimage.c b/xen/arch/x86/bzimage.c
index ac4fd428be..775a8b45ff 100644
--- a/xen/arch/x86/bzimage.c
+++ b/xen/arch/x86/bzimage.c
@@ -69,8 +69,6 @@ static __init int bzimage_check(struct setup_header 
*hdr, unsigned long len)
      return 1;
  }

-static unsigned long __initdata orig_image_len;
-
  unsigned long __init bzimage_headroom(void *image_start,
                                        unsigned long image_length)
  {
@@ -91,7 +89,6 @@ unsigned long __init bzimage_headroom(void *image_start,
      if ( elf_is_elfbinary(image_start, image_length) )
          return 0;

-    orig_image_len = image_length;
      headroom = output_length(image_start, image_length);
      if (gzip_check(image_start, image_length))
      {
@@ -104,12 +101,15 @@ unsigned long __init bzimage_headroom(void 
*image_start,
      return headroom;
  }

-int __init bzimage_parse(void *image_base, void **image_start,
-                         unsigned long *image_len)
+int __init bzimage_parse(
+    void *image_base, void **image_start, unsigned long headroom,
+    unsigned long *image_len)
  {
      struct setup_header *hdr = (struct setup_header *)(*image_start);
      int err = bzimage_check(hdr, *image_len);
-    unsigned long output_len;
+    unsigned long output_len, orig_image_len;
+
+    orig_image_len = *image_len - headroom;

      if ( err < 0 )
          return err;
@@ -118,6 +118,7 @@ int __init bzimage_parse(void *image_base, void 
**image_start,
      {
          *image_start += (hdr->setup_sects + 1) * 512 + 
hdr->payload_offset;
          *image_len = hdr->payload_length;
+        orig_image_len = hdr->payload_length;
      }

      if ( elf_is_elfbinary(*image_start, *image_len) )



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On 2025-04-19 18:08, Daniel P. Smith wrote:
> When constructing domU, and specifically the event channels for their console
> and xenstore event channels, the domid for the backing domain must be known.
> Therefore, the control, hardware, and xenstore domains are deemed as core
> domains, and must be constructed before any of the other domains.
> 
> This commit introduces the build_core_domains() function that will ensure the
> core domains are constructed first.
> 
> Signed-off-by: Daniel P. Smith 
> ---
>   xen/arch/x86/domain-builder/core.c     | 68 ++++++++++++++++++++++++--
>   xen/arch/x86/include/asm/boot-domain.h |  2 +
>   2 files changed, 66 insertions(+), 4 deletions(-)
> 
> diff --git a/xen/arch/x86/domain-builder/core.c b/xen/arch/x86/domain-builder/core.c
> index 901efce62a61..f693aa46d278 100644
> --- a/xen/arch/x86/domain-builder/core.c
> +++ b/xen/arch/x86/domain-builder/core.c
> @@ -103,18 +103,78 @@ void __init builder_init(struct boot_info *bi)
>       }
>   }
>   
> +static int  __init build_core_domains(struct boot_info *bi)
> +{
> +    int count = 0;
> +    struct boot_domain *bd;
> +    int hw, cd, xs;
> +
> +    cd = first_boot_domain_index(bi, BUILD_CAPS_CONTROL);

> +    hw = first_boot_domain_index(bi, BUILD_CAPS_HARDWARE);

> +    xs = first_boot_domain_index(bi, BUILD_CAPS_XENSTORE);

This order has issues if you actually have disaggregated domains.

Control and Hardware depend on Xenstore for Xenstore.

Control and Xenstore depend on Hardware for console support.

I re-worked the xenstore allocation to run after domain creation.  I've 
upstreamed that for dom0less (and ARM doesn't have to deal with consoles).

So if xenstore allocation is moved later, Hardware, Xenstore, then 
Control works.  But xenstore and console could both be handled after the 
fact and then the construction order doesn't matter.  The backend domid 
is needed to construct the event channel and grant entry.  With assigned 
domids, alloc_store_evtchn()/alloc_console_evtchn() can operate on the 
domids instead of expecting the domain to have been constructed.

Regards,
Jason


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MIME-Version: 1.0
Date: Wed, 23 Apr 2025 22:11:35 +0200
From: Nicola Vetrini 
To: Sergii Dmytruk 
Cc: Andrew Cooper ,
 xen-devel@lists.xenproject.org, Jan Beulich ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Lukasz Hawrylko
 , "Daniel P. Smith" ,
 =?UTF-8?Q?Mateusz_M=C3=B3wka?= , Anthony PERARD
 , Michal Orzel , Julien
 Grall , Stefano Stabellini ,
 =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 , trenchboot-devel@googlegroups.com
Subject: Re: [PATCH 00/21] x86: Trenchboot Secure Launch DRTM (Xen)
In-Reply-To: 
References: 
 <744934f4-f56f-4dc7-bccb-c32f2829d1da@citrix.com>
 <010709d8-7784-41bf-bcb6-bf04803a75fc@citrix.com> 
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X-Sender: nicola.vetrini@bugseng.com
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On 2025-04-23 20:45, Sergii Dmytruk wrote:
> On Wed, Apr 23, 2025 at 02:38:37PM +0100, Andrew Cooper wrote:
>> On 22/04/2025 6:14 pm, Andrew Cooper wrote:
>> > I've stripped out the sha2 patch and fixed up to use the existing sha2,
>> > then kicked off some CI testing:
>> >
>> > https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1780285393
>> > https://cirrus-ci.com/build/5452335868018688
>> >
>> > When the dust has settled, I'll talk you through the failures.
>> 
>> And here we go.  Interestingly, the FreeBSD testing was entirely 
>> happy,
>> and that is the rare way around.
>> 
>> For Gitlab, there are several areas.
>> 
>> First, for MISRA.  In the job logs, you want the "Browse current
>> reports:" link which will give you full details, but it's all pretty
>> simple stuff.
> 
> Thanks, but that link gives me a list of 5096 failures all over the 
> code
> base.  Is there any way to see a diff against master?
> 

Hi,

yes, you can define selections of violations introduced on previously 
clean guidelines by clicking on the "ECLAIR" button on the upper right. 
See [1] which is the result of defining the "clean_added" selection 
shown in the attached screenshot. If you have other questions please let 
me know.

Thanks,
  Nicola

[1] 
https://saas.eclairit.com:3787/fs/var/local/eclair/xen-project.ecdf/xen-project/hardware/xen-staging/ECLAIR_normal/andrew/tb-v1.1/ARM64/9791028027/PROJECT.ecd;/by_service.html#service&kind{"select":true,"selection":{"hiddenAreaKinds":[],"hiddenSubareaKinds":[],"show":true,"selector":{"enabled":true,"negated":false,"kind":1,"children":[{"enabled":true,"negated":false,"kind":0,"domain":"clean","inputs":[{"enabled":true,"text":"added"}]}]}}}

>> kbl-suspend-x86-64-gcc-debug is a real S3 test on KabyLake hardware,
>> which appears to have gone to sleep and never woken up.  (More likely,
>> crashed on wakeup before we got the console up).  The AlderLake
>> equivalent test seems to be happy, as well as the AMD ones.
> 
> Hm, not sure what that could be, but will try to reproduce/guess.
> 
>> For the build issues, there are quite a few.
>> 
>> debian-12-x86_64-gcc-ibt is special, using an out-of-tree patch for
>> CET-IBT safety.  tl;dr function pointer callees need a cf_check
>> annotation.  But, all the failures here are from sha1, and from bits
>> which I don't think want to survive into the final form.
> 
> That stuff is gone and the build should succeed the next time.
> 
>> Other common failures seem to be:
>> 
>>     # take image offset into account
>>     arch/x86/efi/fixmlehdr xen.efi 0x200000
>>     Failed to find MLE header in xen.efi
>>     arch/x86/Makefile:220: recipe for target 'xen.efi' failed
>>     make[3]: *** [xen.efi] Error 1
>> 
>> ~Andrew
> 
> That seems to be the only reason behind the rest of build failures.
> I was able to reproduce the failure in Fedora 37 docker.  Searching for
> the header in 8KiB instead of 4KiB fixes it.  Looks like large default
> alignment of some toolchains pushes `head.S` to 4 KiB offset.

-- 
Nicola Vetrini, B.Sc.
Software Engineer
BUGSENG (https://bugseng.com)
LinkedIn: https://www.linkedin.com/in/nicola-vetrini-a42471253
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Date: Wed, 23 Apr 2025 13:37:29 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Jan Beulich 
cc: victorm.lira@amd.com, Nicola Vetrini , 
    Federico Serafini , 
    Andrew Cooper , 
    Anthony PERARD , 
    Michal Orzel , Julien Grall , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
    Stefano Stabellini , 
    Bertrand Marquis , 
    "xen-devel@lists.xenproject.org" 
Subject: Re: [PATCH 1/3] misra: add deviation for rules 21.1 and 21.2
In-Reply-To: <20989ef0-a906-4ad2-818b-e52dd49b868d@suse.com>
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References: <790f9cae9a75b9f29554943c08abb6537647644e.1745364478.git.victorm.lira@amd.com> <20989ef0-a906-4ad2-818b-e52dd49b868d@suse.com>
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On Wed, 23 Apr 2025, Jan Beulich wrote:
> On 23.04.2025 01:43, victorm.lira@amd.com wrote:
> > From: Nicola Vetrini 
> > 
> > MISRA C Rules 21.1 ("#define and #undef shall not be used on a
> > reserved identifier or reserved macro name") and R21.2 ("A reserved
> > identifier or reserved macro name shall not be declared") violations
> > are not problematic for Xen, as it does not use the C or POSIX
> > libraries.
> 
> In the course of all the Misra discussions it was pointed out more than
> once that it's not just the titles which matter, but also the
> "Amplification" text. While the latter two of the three bullet points
> applying to both rules clearly are library-centric, the first one isn't.
> In that light it's entirely unclear to me how ...
> 
> > Xen uses -fno-builtin and -nostdinc to ensure this, but there are still
> > __builtin_* functions from the compiler that are available so
> > a deviation is formulated for all identifiers not starting with
> > "__builtin_".
> > 
> > The missing text of a deviation for Rule 21.2 is added to
> > docs/misra/deviations.rst.
> > 
> > To avoid regressions, tag both rules as clean and add them to the
> > monitored set.
> 
> ... our code base could be anywhere near clean towards these two rules.


Given the section these two rules belong to "Standard libraries" and
given the rest of the rule description, it is clear to me that the
conflicts and undefined behaviors the two rules are trying to prevent
are conflicts with C or POSIX libraries. Nicola is the original author
of the patch and he has more experience with MISRA and I would trust
his interpretation.


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Date: Wed, 23 Apr 2025 13:41:06 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: "Lira, Victor M" 
cc: xen-devel@lists.xenproject.org, 
    Federico Serafini , 
    Andrew Cooper , 
    Anthony PERARD , 
    Michal Orzel , Jan Beulich , 
    Julien Grall , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
    Stefano Stabellini , 
    Nicola Vetrini , 
    Bertrand Marquis 
Subject: Re: [PATCH v1] misra: add deviation of Rule 5.5
In-Reply-To: 
Message-ID: 
References: <9e1210f2a9c794d68dcc6b897239b228b141296a.1745427770.git.victorm.lira@amd.com> <48c7830931a98b2bf70ef1509f309b262b9e5792.1745427770.git.victorm.lira@amd.com> 
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On Wed, 23 Apr 2025, Lira, Victor M wrote:
> Continuing a discussion from before:
> 
> On 4/22/2025 11:44 PM, Jan Beulich wrote:
> > Caution: This message originated from an External Source. Use proper caution
> > when opening attachments, clicking links, or responding.
> > 
> > 
> > On 23.04.2025 01:43, victorm.lira@amd.com wrote:
> > >          memmove.
> > >        - Tagged as `deliberate` for ECLAIR.
> > > 
> > > +   * - R5.5
> > > +     - Clashes between function-like macros and function names are
> > > +       deliberate
> > They may or may not be deliberate, depending on context. I don't think it's
> > a
> > good move to deviate this more widely than necessary. If I get the
> > expression
> > above (in deviations.ecl) right, even
> > 
> > void func1(int);
> > void func2(int);
> > 
> > #define func1() func2(0)
> > #define func2() func1(0)
> > 
> > would be deviated, which I don't think we want. Especially when, in a less
> > contrived scenario, the clash may not easily be visible.
>
> OK, I see the issue for different functions. Does it make sense to say it's
> deliberate when it's the same identifier?
>
> 	void func1(int);
> 	...
> 	#define func1() func1(0)
> 
> Could this be deviated?

I think it makes sense to be clear in deviations.rst and the doc text in
deviations.ecl that we are referring to the same identifier. That we can
do.

I am not sure it is possible to change the ecl rule accordingly to
narrow the check relaxation. If not possible, I'd keep it as it is in
this patch.


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To: Victor Lira 
cc: xen-devel@lists.xenproject.org, 
    Nicola Vetrini , 
    Federico Serafini , 
    Andrew Cooper , 
    Anthony PERARD , 
    Michal Orzel , Jan Beulich , 
    Julien Grall , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
    Stefano Stabellini , 
    Bertrand Marquis 
Subject: Re: [PATCH v1] misra: add deviation for rules 21.1 and 21.2
In-Reply-To: <9e1210f2a9c794d68dcc6b897239b228b141296a.1745427770.git.victorm.lira@amd.com>
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On Wed, 23 Apr 2025, victorm.lira@amd.com wrote:
> From: Nicola Vetrini 
> 
> MISRA C Rules 21.1 ("#define and #undef shall not be used on a
> reserved identifier or reserved macro name") and R21.2 ("A reserved
> identifier or reserved macro name shall not be declared") violations
> are not problematic for Xen, as it does not use the C or POSIX
> libraries.
> 
> Xen uses -fno-builtin and -nostdinc to ensure this, but there are still
> __builtin_* functions from the compiler that are available so
> a deviation is formulated for all identifiers not starting with
> "__builtin_".
> 
> The missing text of a deviation for Rule 21.2 is added to
> docs/misra/deviations.rst.
> 
> To avoid regressions, tag both rules as clean and add them to the
> monitored set.
> 
> Signed-off-by: Nicola Vetrini 
> Signed-off-by: Federico Serafini 
> Signed-off-by: Victor Lira 

Reviewed-by: Stefano Stabellini 


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From: Nicola Vetrini 
To: xen-devel@lists.xenproject.org
Cc: sstabellini@kernel.org,
	michal.orzel@amd.com,
	xenia.ragiadakou@amd.com,
	ayan.kumar.halder@amd.com,
	consulting@bugseng.com,
	Nicola Vetrini ,
	Doug Goldstein ,
	Andrew Cooper ,
	Anthony PERARD ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [XEN PATCH] misra: update list of GCC extensions used by Xen
Date: Wed, 23 Apr 2025 22:45:11 +0200
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__inline was not mentioned in C-language-toolchain.rst, while
__inline__ is not used in code under xen/. __inline is kept because it
may be used in Xen. The ECLAIR configuration is now consistent with the
documented extensions in the rst file.

No functional change.

Signed-off-by: Nicola Vetrini 
---
See [1] for a patch that introduces a use of __inline. Rather than
remove it because there are no current uses of that alternate spelling
before shortly bringing it back, it makes more sense to keep it in both
places.

[1] https://lore.kernel.org/xen-devel/20250422113957.1289290-1-andrew.cooper3@citrix.com/
---
 automation/eclair_analysis/ECLAIR/toolchain.ecl | 5 +++--
 docs/misra/C-language-toolchain.rst             | 2 ++
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/automation/eclair_analysis/ECLAIR/toolchain.ecl b/automation/eclair_analysis/ECLAIR/toolchain.ecl
index 8ebf9f132cf2..b8c041d2d36e 100644
--- a/automation/eclair_analysis/ECLAIR/toolchain.ecl
+++ b/automation/eclair_analysis/ECLAIR/toolchain.ecl
@@ -18,7 +18,8 @@
     __builtin_offsetof: see Section \"6.53 Support for offsetof\" of "GCC_MANUAL".
     __builtin_types_compatible_p: see Section \"6.59 Other Built-in Functions Provided by GCC\" of "GCC_MANUAL".
     __builtin_va_arg: non-documented GCC extension.
-    __const__, __inline__, __inline: see Section \"6.48 Alternate Keywords\" of "GCC_MANUAL".
+    __const__: see Section \"6.48 Alternate Keywords\" of "GCC_MANUAL".
+    __inline: see Section \"6.48 Alternate Keywords\" of "GCC_MANUAL".
     _Static_assert: see Section \"2.1 C Language\" of "GCC_MANUAL".
     typeof, __typeof__: see Section \"6.7 Referring to a Type with typeof\" of "GCC_MANUAL".
     __volatile__: see Sections \"6.48 Alternate Keywords\" and \"6.47.2.1 Volatile\" of "GCC_MANUAL".
@@ -30,7 +31,7 @@
 -name_selector+={builtin_types_p, "^__builtin_types_compatible_p$"}
 -name_selector+={builtin_va_arg, "^__builtin_va_arg$"}
 -name_selector+={const, "^__const__$"}
--name_selector+={inline, "^(__inline__|__inline)$"}
+-name_selector+={inline, "^__inline$"}
 -name_selector+={static_assert, "^_Static_assert$"}
 -name_selector+={typeof, "^(__typeof__|typeof)$"}
 -name_selector+={volatile, "^__volatile__$"}
diff --git a/docs/misra/C-language-toolchain.rst b/docs/misra/C-language-toolchain.rst
index 5ddfe7bdbe10..5d4db857d198 100644
--- a/docs/misra/C-language-toolchain.rst
+++ b/docs/misra/C-language-toolchain.rst
@@ -86,6 +86,8 @@ The table columns are as follows:
           see Sections "6.48 Alternate Keywords" and "6.47.2.1 Volatile" of GCC_MANUAL.
        __const__:
           see Section "6.48 Alternate Keywords" of GCC_MANUAL.
+       __inline:
+          see Section "6.48 Alternate Keywords" of GCC_MANUAL.
        typeof, __typeof__:
           see Section "6.7 Referring to a Type with typeof" of GCC_MANUAL.
        __alignof__, __alignof:
-- 
2.43.0



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Date: Wed, 23 Apr 2025 13:45:24 -0700 (PDT)
From: Stefano Stabellini 
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To: Victor Lira 
cc: xen-devel@lists.xenproject.org, 
    Federico Serafini , 
    Andrew Cooper , 
    Anthony PERARD , 
    Michal Orzel , Jan Beulich , 
    Julien Grall , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
    Stefano Stabellini , 
    Nicola Vetrini , 
    Bertrand Marquis 
Subject: Re: [PATCH v1] misra: add deviation of Rule 5.5
In-Reply-To: <48c7830931a98b2bf70ef1509f309b262b9e5792.1745427770.git.victorm.lira@amd.com>
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References: <9e1210f2a9c794d68dcc6b897239b228b141296a.1745427770.git.victorm.lira@amd.com> <48c7830931a98b2bf70ef1509f309b262b9e5792.1745427770.git.victorm.lira@amd.com>
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On Wed, 23 Apr 2025, victorm.lira@amd.com wrote:
> From: Federico Serafini 
> 
> MISRA C Rule 5.5 states that:
> "Identifiers shall be distinct from macro names".
> 
> A common pattern in Xen is to have a function-like macro that acts as a
> "wrapper" for the function to be called:
> before calling the function, the macro adds additional checks or
> increase/decrease the number of parameters depending on the
> configuration.
> 
> Update ECLAIR configuration and deviations.rst.
> 
> Signed-off-by: Federico Serafini 
> Signed-off-by: Victor Lira 

This is something we have already discussed in the past and accepted,
but we were missing the ECLAIR configuration for the deviation.

Thanks Federico for producing it.

Reviewed-by: Stefano Stabellini 

I understand Jan asked for being more precise with the wording and I am
OK with that.



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Date: Wed, 23 Apr 2025 13:47:38 -0700 (PDT)
From: Stefano Stabellini 
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To: Victor Lira 
cc: xen-devel@lists.xenproject.org, 
    Nicola Vetrini , 
    Federico Serafini , 
    Andrew Cooper , 
    Anthony PERARD , 
    Michal Orzel , Jan Beulich , 
    Julien Grall , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
    Stefano Stabellini , 
    Bertrand Marquis 
Subject: Re: [PATCH v1] misra: add deviation of Rule 10.1 for unary minus
In-Reply-To: <7c7b7a09e9d5ac1cc6f93fecacd8065fb6f25324.1745427770.git.victorm.lira@amd.com>
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References: <9e1210f2a9c794d68dcc6b897239b228b141296a.1745427770.git.victorm.lira@amd.com> <7c7b7a09e9d5ac1cc6f93fecacd8065fb6f25324.1745427770.git.victorm.lira@amd.com>
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> From: Nicola Vetrini 
> 
> MISRA C Rule 10.1 states:
> "Operands shall not be of an inappropriate essential type"
> 
> The unary minus operator applied to an unsigned quantity has
> a semantics (wrap around) that is well-known to all Xen developers.
> Thus, this operation is deemed safe.
> 
> No functional change.
> 
> Signed-off-by: Nicola Vetrini 
> Signed-off-by: Federico Serafini 
> Signed-off-by: Victor Lira 

We only have few instances of this pattern and the few we have are well
understood and certainly deliberate. In practice, this patch reflects
the current coding convention.

Reviewed-by: Stefano Stabellini 

Jan's request to improve the wording is OK for me.


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Subject: Re: [PATCH v1] misra: add deviation of Rule 10.1 for unary minus
Content-Language: en-GB
To: victorm.lira@amd.com, xen-devel@lists.xenproject.org
Cc: Nicola Vetrini ,
 Federico Serafini ,
 Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Jan Beulich ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Bertrand Marquis 
References: <9e1210f2a9c794d68dcc6b897239b228b141296a.1745427770.git.victorm.lira@amd.com>
 <7c7b7a09e9d5ac1cc6f93fecacd8065fb6f25324.1745427770.git.victorm.lira@amd.com>
From: Julien Grall 
In-Reply-To: <7c7b7a09e9d5ac1cc6f93fecacd8065fb6f25324.1745427770.git.victorm.lira@amd.com>
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Hi Victor,

On 23/04/2025 18:54, victorm.lira@amd.com wrote:
> From: Nicola Vetrini 
> 
> MISRA C Rule 10.1 states:
> "Operands shall not be of an inappropriate essential type"
> 
> The unary minus operator applied to an unsigned quantity has
> a semantics (wrap around) that is well-known to all Xen developers.
> Thus, this operation is deemed safe.
> 
> No functional change.
> 
> Signed-off-by: Nicola Vetrini 
> Signed-off-by: Federico Serafini 
> Signed-off-by: Victor Lira 
> ---
> Changes v1:
> - add rule title to commit message
> ---
> Cc: Andrew Cooper 
> Cc: Anthony PERARD 
> Cc: Michal Orzel 
> Cc: Jan Beulich 
> Cc: Julien Grall 
> Cc: Roger Pau Monné 
> Cc: Stefano Stabellini 
> Cc: Nicola Vetrini 
> Cc: Federico Serafini 
> Cc: Bertrand Marquis 
> ---
>   automation/eclair_analysis/ECLAIR/deviations.ecl | 6 ++++++
>   docs/misra/deviations.rst                        | 6 ++++++
>   2 files changed, 12 insertions(+)
> 
> diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/automation/eclair_analysis/ECLAIR/deviations.ecl
> index 303b06203a..2cfce850bd 100644
> --- a/automation/eclair_analysis/ECLAIR/deviations.ecl
> +++ b/automation/eclair_analysis/ECLAIR/deviations.ecl
> @@ -347,6 +347,12 @@ constant expressions are required.\""
>     "any()"}
>   -doc_end
> 
> +-doc_begin="Unary minus operations on non-negative integers have a semantics (wrap around) that is well-known to all Xen developers."
> +-config=MC3A2.R10.1,etypes+={safe,
> +  "stmt(node(unary_operator)&&operator(minus))",
> +  "src_expr(definitely_in(0..))"}
> +-doc_end
> +
>   #
>   # Series 11
>   #
> diff --git a/docs/misra/deviations.rst b/docs/misra/deviations.rst
> index cfdd1a9838..c5897e31c5 100644
> --- a/docs/misra/deviations.rst
> +++ b/docs/misra/deviations.rst
> @@ -321,6 +321,12 @@ Deviations related to MISRA C:2012 Rules:
>          If no bits are set, 0 is returned.
>        - Tagged as `safe` for ECLAIR.
> 
> +   * - R10.1
> +     - Applying the unary minus operator to an unsigned quantity has a
> +       semantics (wrap around) that is well-known to all Xen developers.
> +       For this reason, the operation is safe.

I have realized we use similar wording in the rest of the deviations, 
but this is rather fragile argument. "well-known" is very subjective and 
could change over time.

How many violations do we have? Could we deviate them one by one?

Cheers,

-- 
Julien Grall



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From: Stefano Stabellini 
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To: Stefano Stabellini 
cc: Victor Lira , xen-devel@lists.xenproject.org, 
    Federico Serafini , 
    Andrew Cooper , 
    Anthony PERARD , 
    Michal Orzel , Jan Beulich , 
    Julien Grall , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
    Nicola Vetrini , 
    Bertrand Marquis 
Subject: Re: [PATCH v1] misra: add deviation of Rule 5.5
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References: <9e1210f2a9c794d68dcc6b897239b228b141296a.1745427770.git.victorm.lira@amd.com> <48c7830931a98b2bf70ef1509f309b262b9e5792.1745427770.git.victorm.lira@amd.com> 
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On Wed, 23 Apr 2025, Stefano Stabellini wrote:
> On Wed, 23 Apr 2025, victorm.lira@amd.com wrote:
> > From: Federico Serafini 
> > 
> > MISRA C Rule 5.5 states that:
> > "Identifiers shall be distinct from macro names".
> > 
> > A common pattern in Xen is to have a function-like macro that acts as a
> > "wrapper" for the function to be called:
> > before calling the function, the macro adds additional checks or
> > increase/decrease the number of parameters depending on the
> > configuration.
> > 
> > Update ECLAIR configuration and deviations.rst.
> > 
> > Signed-off-by: Federico Serafini 
> > Signed-off-by: Victor Lira 
> 
> This is something we have already discussed in the past and accepted,
> but we were missing the ECLAIR configuration for the deviation.
> 
> Thanks Federico for producing it.
> 
> Reviewed-by: Stefano Stabellini 
> 
> I understand Jan asked for being more precise with the wording and I am
> OK with that.

Please remove this last sentence. I meant to say that I am OK with Jan's
request to narrow the deviation, both wording and check. The wording can
be done, I am not sure about the check.


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Date: Wed, 23 Apr 2025 13:55:01 -0700 (PDT)
From: Stefano Stabellini 
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To: Nicola Vetrini 
cc: xen-devel@lists.xenproject.org, sstabellini@kernel.org, 
    michal.orzel@amd.com, xenia.ragiadakou@amd.com, ayan.kumar.halder@amd.com, 
    consulting@bugseng.com, Doug Goldstein , 
    Andrew Cooper , 
    Anthony PERARD , 
    Jan Beulich , Julien Grall , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
Subject: Re: [XEN PATCH] misra: update list of GCC extensions used by Xen
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On Wed, 23 Apr 2025, Nicola Vetrini wrote:
> __inline was not mentioned in C-language-toolchain.rst, while
> __inline__ is not used in code under xen/. __inline is kept because it
> may be used in Xen. The ECLAIR configuration is now consistent with the
> documented extensions in the rst file.
> 
> No functional change.
> 
> Signed-off-by: Nicola Vetrini 

Reviewed-by: Stefano Stabellini 


> ---
> See [1] for a patch that introduces a use of __inline. Rather than
> remove it because there are no current uses of that alternate spelling
> before shortly bringing it back, it makes more sense to keep it in both
> places.
> 
> [1] https://lore.kernel.org/xen-devel/20250422113957.1289290-1-andrew.cooper3@citrix.com/
> ---
>  automation/eclair_analysis/ECLAIR/toolchain.ecl | 5 +++--
>  docs/misra/C-language-toolchain.rst             | 2 ++
>  2 files changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/automation/eclair_analysis/ECLAIR/toolchain.ecl b/automation/eclair_analysis/ECLAIR/toolchain.ecl
> index 8ebf9f132cf2..b8c041d2d36e 100644
> --- a/automation/eclair_analysis/ECLAIR/toolchain.ecl
> +++ b/automation/eclair_analysis/ECLAIR/toolchain.ecl
> @@ -18,7 +18,8 @@
>      __builtin_offsetof: see Section \"6.53 Support for offsetof\" of "GCC_MANUAL".
>      __builtin_types_compatible_p: see Section \"6.59 Other Built-in Functions Provided by GCC\" of "GCC_MANUAL".
>      __builtin_va_arg: non-documented GCC extension.
> -    __const__, __inline__, __inline: see Section \"6.48 Alternate Keywords\" of "GCC_MANUAL".
> +    __const__: see Section \"6.48 Alternate Keywords\" of "GCC_MANUAL".
> +    __inline: see Section \"6.48 Alternate Keywords\" of "GCC_MANUAL".
>      _Static_assert: see Section \"2.1 C Language\" of "GCC_MANUAL".
>      typeof, __typeof__: see Section \"6.7 Referring to a Type with typeof\" of "GCC_MANUAL".
>      __volatile__: see Sections \"6.48 Alternate Keywords\" and \"6.47.2.1 Volatile\" of "GCC_MANUAL".
> @@ -30,7 +31,7 @@
>  -name_selector+={builtin_types_p, "^__builtin_types_compatible_p$"}
>  -name_selector+={builtin_va_arg, "^__builtin_va_arg$"}
>  -name_selector+={const, "^__const__$"}
> --name_selector+={inline, "^(__inline__|__inline)$"}
> +-name_selector+={inline, "^__inline$"}
>  -name_selector+={static_assert, "^_Static_assert$"}
>  -name_selector+={typeof, "^(__typeof__|typeof)$"}
>  -name_selector+={volatile, "^__volatile__$"}
> diff --git a/docs/misra/C-language-toolchain.rst b/docs/misra/C-language-toolchain.rst
> index 5ddfe7bdbe10..5d4db857d198 100644
> --- a/docs/misra/C-language-toolchain.rst
> +++ b/docs/misra/C-language-toolchain.rst
> @@ -86,6 +86,8 @@ The table columns are as follows:
>            see Sections "6.48 Alternate Keywords" and "6.47.2.1 Volatile" of GCC_MANUAL.
>         __const__:
>            see Section "6.48 Alternate Keywords" of GCC_MANUAL.
> +       __inline:
> +          see Section "6.48 Alternate Keywords" of GCC_MANUAL.
>         typeof, __typeof__:
>            see Section "6.7 Referring to a Type with typeof" of GCC_MANUAL.
>         __alignof__, __alignof:
> -- 
> 2.43.0
> 


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Date: Wed, 23 Apr 2025 13:56:59 -0700 (PDT)
From: Stefano Stabellini 
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To: Mykyta Poturai 
cc: "xen-devel@lists.xenproject.org" , 
    Oleksandr Andrushchenko , 
    Stefano Stabellini , Julien Grall , 
    Bertrand Marquis , 
    Michal Orzel , 
    Volodymyr Babchuk 
Subject: Re: [PATCH v4 2/4] xen/arm: make pci_host_common_probe return the
 bridge
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On Wed, 23 Apr 2025, Mykyta Poturai wrote:
> From: Oleksandr Andrushchenko 
> 
> Some of the PCI host bridges require additional processing during the
> probe phase. For that they need to access struct bridge of the probed
> host, so return pointer to the new bridge from pci_host_common_probe.
> 
> Signed-off-by: Oleksandr Andrushchenko 
> Signed-off-by: Mykyta Poturai 

Reviewed-by: Stefano Stabellini 


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Date: Wed, 23 Apr 2025 13:59:37 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Mykyta Poturai 
cc: "xen-devel@lists.xenproject.org" , 
    Oleksandr Andrushchenko , 
    Stefano Stabellini , Julien Grall , 
    Bertrand Marquis , 
    Michal Orzel , 
    Volodymyr Babchuk 
Subject: Re: [PATCH v4 3/4] xen/arm: add support for PCI child bus
In-Reply-To: <79bbb6705638445526bbd1fa299b7bfd0d087462.1745402473.git.mykyta_poturai@epam.com>
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On Wed, 23 Apr 2025, Mykyta Poturai wrote:
> From: Oleksandr Andrushchenko 
> 
> PCI host bridges often have different ways to access the root and child
> bus configuration spaces. One of the examples is Designware's host bridge
> and its multiple clones [1].
> 
> Linux kernel implements this by instantiating a child bus when device
> drivers provide not only the usual pci_ops to access ECAM space (this is
> the case for the generic host bridge), but also means to access the child
> bus which has a dedicated configuration space and own implementation for
> accessing the bus, e.g. child_ops.
> 
> For Xen it is not feasible to fully implement PCI bus infrastructure as
> Linux kernel does, but still child bus can be supported.
> 
> Add support for the PCI child bus which includes the following changes:
> - introduce bus mapping functions depending on SBDF
> - assign bus start and end for the child bus and re-configure the same for
>   the parent (root) bus
> - make pci_find_host_bridge be aware of multiple busses behind the same bridge
> - update pci_host_bridge_mappings, so it also doesn't map to guest the memory
>   spaces belonging to the child bus
> - make pci_host_common_probe accept one more pci_ops structure for the child bus
> - install MMIO handlers for the child bus
> - re-work vpci_mmio_{write|read} with parent and child approach in mind
> 
> [1] https://elixir.bootlin.com/linux/v5.15/source/drivers/pci/controller/dwc
> 
> Signed-off-by: Oleksandr Andrushchenko 
> Signed-off-by: Mykyta Poturai 

I just wanted to say that pending Stewart's comment, this patch looks
good to me


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Date: Wed, 23 Apr 2025 14:06:04 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Mykyta Poturai 
cc: "xen-devel@lists.xenproject.org" , 
    Oleksandr Andrushchenko , 
    Stefano Stabellini , Julien Grall , 
    Bertrand Marquis , 
    Michal Orzel , 
    Volodymyr Babchuk 
Subject: Re: [PATCH v4 4/4] xen/arm: add support for R-Car Gen4 PCI host
 controller
In-Reply-To: <98c8e00a77800e8b1163ab1efa9a60f1bced0fb9.1745402473.git.mykyta_poturai@epam.com>
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On Wed, 23 Apr 2025, Mykyta Poturai wrote:
> From: Oleksandr Andrushchenko 
> 
> Add support for Renesas R-Car Gen4 PCI host controller, specifically
> targeting the S4 and V4H SoCs. The implementation includes configuration
> read/write operations for both root and child buses. For accessing the
> child bus, iATU is used for address translation.
> 
> Code common to all DesignWare PCI host controllers is located in a
> separate file to allow for easy reuse in other DesignWare-based PCI
> host controllers.
> 
> Signed-off-by: Oleksandr Andrushchenko 
> Signed-off-by: Mykyta Poturai 

At a glance, this looks OKish. Especially if you would be willing to
maintain the driver going forward :-)

Would you be willing to add entry to the MAINTAINERS file to cover
pci-designware* and pci-host-rcar4.c ?


> ---
> v3->v4:
> * no changes
> 
> v2->v3:
> * move priv allocation to dw_pcie_host_probe
> 
> v1->v2:
> * move designware code in a separate file
> ---
>  xen/arch/arm/pci/Makefile         |   2 +
>  xen/arch/arm/pci/pci-designware.c | 403 ++++++++++++++++++++++++++++++
>  xen/arch/arm/pci/pci-designware.h | 102 ++++++++
>  xen/arch/arm/pci/pci-host-rcar4.c | 103 ++++++++
>  4 files changed, 610 insertions(+)
>  create mode 100644 xen/arch/arm/pci/pci-designware.c
>  create mode 100644 xen/arch/arm/pci/pci-designware.h
>  create mode 100644 xen/arch/arm/pci/pci-host-rcar4.c
> 
> diff --git a/xen/arch/arm/pci/Makefile b/xen/arch/arm/pci/Makefile
> index 1d045ade01..ca6135e282 100644
> --- a/xen/arch/arm/pci/Makefile
> +++ b/xen/arch/arm/pci/Makefile
> @@ -4,3 +4,5 @@ obj-y += pci-host-generic.o
>  obj-y += pci-host-common.o
>  obj-y += ecam.o
>  obj-y += pci-host-zynqmp.o
> +obj-y += pci-designware.o
> +obj-y += pci-host-rcar4.o
> diff --git a/xen/arch/arm/pci/pci-designware.c b/xen/arch/arm/pci/pci-designware.c
> new file mode 100644
> index 0000000000..dcbd07ced3
> --- /dev/null
> +++ b/xen/arch/arm/pci/pci-designware.c
> @@ -0,0 +1,403 @@
> +/*
> + * Based on Linux drivers/pci/controller/pci-host-common.c
> + * Based on Linux drivers/pci/controller/pci-host-generic.c
> + * Based on xen/arch/arm/pci/pci-host-generic.c
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program.  If not, see .
> + */
> +
> +#include 
> +#include 
> +
> +#include "pci-designware.h"
> +/**
> + * upper_32_bits - return bits 32-63 of a number
> + * @n: the number we're accessing
> + *
> + * A basic shift-right of a 64- or 32-bit quantity.  Use this to suppress
> + * the "right shift count >= width of type" warning when that quantity is
> + * 32-bits.
> + */
> +#define upper_32_bits(n) ((uint32_t)(((n) >> 16) >> 16))
> +
> +/**
> + * lower_32_bits - return bits 0-31 of a number
> + * @n: the number we're accessing
> + */
> +#define lower_32_bits(n) ((uint32_t)((n) & 0xffffffff))

Please run this by MISRA using ECLAIR's checker in Gitlab CI.


> +static int dw_pcie_read(void __iomem *addr, int size, uint32_t *val)
> +{
> +    if ( !IS_ALIGNED((uintptr_t)addr, size) )
> +    {
> +        *val = 0;
> +        return PCIBIOS_BAD_REGISTER_NUMBER;
> +    }
> +
> +    if ( size == 4 )
> +        *val = readl(addr);
> +    else if ( size == 2 )
> +        *val = readw(addr);
> +    else if ( size == 1 )
> +        *val = readb(addr);
> +    else
> +    {
> +        *val = 0;
> +        return PCIBIOS_BAD_REGISTER_NUMBER;
> +    }
> +
> +    return PCIBIOS_SUCCESSFUL;
> +}
> +
> +static int dw_pcie_write(void __iomem *addr, int size, uint32_t val)
> +{
> +    if ( !IS_ALIGNED((uintptr_t)addr, size) )
> +        return PCIBIOS_BAD_REGISTER_NUMBER;
> +
> +    if ( size == 4 )
> +        writel(val, addr);
> +    else if ( size == 2 )
> +        writew(val, addr);
> +    else if ( size == 1 )
> +        writeb(val, addr);
> +    else
> +        return PCIBIOS_BAD_REGISTER_NUMBER;
> +
> +    return PCIBIOS_SUCCESSFUL;
> +}
> +
> +static uint32_t dw_pcie_read_dbi(struct pci_host_bridge *bridge, uint32_t reg,
> +                                 size_t size)
> +{
> +    void __iomem *addr = bridge->cfg->win + reg;
> +    uint32_t val;
> +
> +    dw_pcie_read(addr, size, &val);
> +    return val;
> +}
> +
> +static void dw_pcie_write_dbi(struct pci_host_bridge *bridge, uint32_t reg,
> +                              size_t size, uint32_t val)
> +{
> +    void __iomem *addr = bridge->cfg->win + reg;
> +
> +    dw_pcie_write(addr, size, val);
> +}
> +
> +static uint32_t dw_pcie_readl_dbi(struct pci_host_bridge *bridge, uint32_t reg)
> +{
> +    return dw_pcie_read_dbi(bridge, reg, sizeof(uint32_t));
> +}
> +
> +static void dw_pcie_writel_dbi(struct pci_host_bridge *pci, uint32_t reg,
> +                               uint32_t val)
> +{
> +    dw_pcie_write_dbi(pci, reg, sizeof(uint32_t), val);
> +}
> +
> +static void dw_pcie_read_iatu_unroll_enabled(struct pci_host_bridge *bridge)
> +{
> +    struct dw_pcie_priv *priv = bridge->priv;
> +    uint32_t val;
> +
> +    val = dw_pcie_readl_dbi(bridge, PCIE_ATU_VIEWPORT);
> +    if ( val == 0xffffffff )
> +        priv->iatu_unroll_enabled = true;
> +
> +    printk(XENLOG_DEBUG "%s iATU unroll: %sabled\n",
> +           dt_node_full_name(bridge->dt_node),
> +           priv->iatu_unroll_enabled ? "en" : "dis");
> +}
> +
> +static uint32_t dw_pcie_readl_atu(struct pci_host_bridge *pci, uint32_t reg)
> +{
> +    struct dw_pcie_priv *priv = pci->priv;
> +    int ret;
> +    uint32_t val;
> +
> +    ret = dw_pcie_read(priv->atu_base + reg, 4, &val);
> +    if ( ret )
> +        printk(XENLOG_ERR "Read ATU address failed\n");
> +
> +    return val;
> +}
> +
> +static void dw_pcie_writel_atu(struct pci_host_bridge *pci, uint32_t reg,
> +                               uint32_t val)
> +{
> +    struct dw_pcie_priv *priv = pci->priv;
> +    int ret;
> +
> +    ret = dw_pcie_write(priv->atu_base + reg, 4, val);
> +    if ( ret )
> +        printk(XENLOG_ERR "Write ATU address failed\n");
> +}
> +
> +static uint32_t dw_pcie_readl_ob_unroll(struct pci_host_bridge *pci,
> +                                        uint32_t index, uint32_t reg)
> +{
> +    uint32_t offset = PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(index);
> +
> +    return dw_pcie_readl_atu(pci, offset + reg);
> +}
> +
> +static void dw_pcie_writel_ob_unroll(struct pci_host_bridge *pci,
> +                                     uint32_t index, uint32_t reg, uint32_t val)
> +{
> +    uint32_t offset = PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(index);
> +
> +    dw_pcie_writel_atu(pci, offset + reg, val);
> +}
> +
> +static uint32_t dw_pcie_enable_ecrc(uint32_t val)
> +{
> +    ASSERT_UNREACHABLE();
> +    return 0;
> +}
> +
> +static void dw_pcie_prog_outbound_atu_unroll(struct pci_host_bridge *pci,
> +                                             uint8_t func_no, int index,
> +                                             int type, uint64_t cpu_addr,
> +                                             uint64_t pci_addr, uint64_t size)
> +{
> +    struct dw_pcie_priv *priv = pci->priv;
> +    uint32_t retries, val;
> +    uint64_t limit_addr = cpu_addr + size - 1;
> +
> +    dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_LOWER_BASE,
> +                             lower_32_bits(cpu_addr));
> +    dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_UPPER_BASE,
> +                             upper_32_bits(cpu_addr));
> +    dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_LOWER_LIMIT,
> +                             lower_32_bits(limit_addr));
> +    dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_UPPER_LIMIT,
> +                             upper_32_bits(limit_addr));
> +    dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_LOWER_TARGET,
> +                             lower_32_bits(pci_addr));
> +    dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_UPPER_TARGET,
> +                             upper_32_bits(pci_addr));
> +    val = type | PCIE_ATU_FUNC_NUM(func_no);
> +    val = upper_32_bits(size - 1) ? val | PCIE_ATU_INCREASE_REGION_SIZE : val;
> +    if ( priv->version == 0x490A )
> +        val = dw_pcie_enable_ecrc(val);
> +    dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_REGION_CTRL1, val);
> +    dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_REGION_CTRL2,
> +                             PCIE_ATU_ENABLE);
> +
> +    /*
> +     * Make sure ATU enable takes effect before any subsequent config
> +     * and I/O accesses.
> +     */
> +    for ( retries = 0; retries < LINK_WAIT_MAX_IATU_RETRIES; retries++ )
> +    {
> +        val = dw_pcie_readl_ob_unroll(pci, index, PCIE_ATU_UNR_REGION_CTRL2);
> +        if ( val & PCIE_ATU_ENABLE )
> +            return;
> +
> +        mdelay(LINK_WAIT_IATU);
> +    }
> +    printk(XENLOG_ERR "Outbound iATU is not being enabled\n");
> +}
> +
> +static void __dw_pcie_prog_outbound_atu(struct pci_host_bridge *pci,
> +                                        uint8_t func_no, int index, int type,
> +                                        uint64_t cpu_addr, uint64_t pci_addr,
> +                                        uint64_t size)
> +{
> +    struct dw_pcie_priv *priv = pci->priv;
> +    uint32_t retries, val;
> +
> +    if ( priv->iatu_unroll_enabled )
> +    {
> +        dw_pcie_prog_outbound_atu_unroll(pci, func_no, index, type, cpu_addr,
> +                                         pci_addr, size);
> +        return;
> +    }
> +
> +    dw_pcie_writel_dbi(pci, PCIE_ATU_VIEWPORT,
> +                       PCIE_ATU_REGION_OUTBOUND | index);
> +    dw_pcie_writel_dbi(pci, PCIE_ATU_LOWER_BASE, lower_32_bits(cpu_addr));
> +    dw_pcie_writel_dbi(pci, PCIE_ATU_UPPER_BASE, upper_32_bits(cpu_addr));
> +    dw_pcie_writel_dbi(pci, PCIE_ATU_LIMIT, lower_32_bits(cpu_addr + size - 1));
> +    if ( priv->version >= 0x460A )
> +        dw_pcie_writel_dbi(pci, PCIE_ATU_UPPER_LIMIT,
> +                           upper_32_bits(cpu_addr + size - 1));
> +    dw_pcie_writel_dbi(pci, PCIE_ATU_LOWER_TARGET, lower_32_bits(pci_addr));
> +    dw_pcie_writel_dbi(pci, PCIE_ATU_UPPER_TARGET, upper_32_bits(pci_addr));
> +    val = type | PCIE_ATU_FUNC_NUM(func_no);
> +    val = ((upper_32_bits(size - 1)) && (priv->version >= 0x460A))
> +              ? val | PCIE_ATU_INCREASE_REGION_SIZE
> +              : val;
> +    if ( priv->version == 0x490A )
> +        val = dw_pcie_enable_ecrc(val);
> +    dw_pcie_writel_dbi(pci, PCIE_ATU_CR1, val);
> +    dw_pcie_writel_dbi(pci, PCIE_ATU_CR2, PCIE_ATU_ENABLE);
> +
> +    /*
> +     * Make sure ATU enable takes effect before any subsequent config
> +     * and I/O accesses.
> +     */
> +    for ( retries = 0; retries < LINK_WAIT_MAX_IATU_RETRIES; retries++ )
> +    {
> +        val = dw_pcie_readl_dbi(pci, PCIE_ATU_CR2);
> +        if ( val & PCIE_ATU_ENABLE )
> +            return;
> +
> +        mdelay(LINK_WAIT_IATU);
> +    }
> +    printk(XENLOG_ERR "Outbound iATU is not being enabled\n");
> +}
> +
> +static void dw_pcie_prog_outbound_atu(struct pci_host_bridge *pci, int index,
> +                                      int type, uint64_t cpu_addr,
> +                                      uint64_t pci_addr, uint64_t size)
> +{
> +    __dw_pcie_prog_outbound_atu(pci, 0, index, type, cpu_addr, pci_addr, size);
> +}
> +
> +void dw_pcie_set_version(struct pci_host_bridge *bridge, unsigned int version)
> +{
> +    struct dw_pcie_priv *priv = bridge->priv;
> +
> +    priv->version = version;
> +}
> +
> +void __iomem *dw_pcie_child_map_bus(struct pci_host_bridge *bridge,
> +                                    pci_sbdf_t sbdf, uint32_t where)
> +{
> +    uint32_t busdev;
> +
> +    busdev = PCIE_ATU_BUS(sbdf.bus) | PCIE_ATU_DEV(PCI_SLOT(sbdf.devfn)) |
> +             PCIE_ATU_FUNC(PCI_FUNC(sbdf.devfn));
> +
> +    /* FIXME: Parent is the root bus, so use PCIE_ATU_TYPE_CFG0. */
> +    dw_pcie_prog_outbound_atu(bridge, PCIE_ATU_REGION_INDEX1,
> +                              PCIE_ATU_TYPE_CFG0, bridge->child_cfg->phys_addr,
> +                              busdev, bridge->child_cfg->size);
> +
> +    return bridge->child_cfg->win + where;
> +}
> +
> +int dw_pcie_child_config_read(struct pci_host_bridge *bridge, pci_sbdf_t sbdf,
> +                              uint32_t reg, uint32_t len, uint32_t *value)
> +{
> +    struct dw_pcie_priv *priv = bridge->priv;
> +    int ret;
> +
> +    /*
> +     * FIXME: we cannot read iATU settings at the early initialization
> +     * (probe) as the host's HW is not yet initialized at that phase.
> +     * This read operation is the very first thing Domain-0 will do
> +     * during its initialization, so take this opportunity and read
> +     * iATU setting now.
> +     */
> +    if ( unlikely(!priv->iatu_unroll_initilized) )
> +    {
> +        dw_pcie_read_iatu_unroll_enabled(bridge);
> +        priv->iatu_unroll_initilized = true;
> +    }
> +
> +    ret = pci_generic_config_read(bridge, sbdf, reg, len, value);
> +    if ( !ret && (priv->num_viewport <= 2) )
> +        dw_pcie_prog_outbound_atu(bridge, PCIE_ATU_REGION_INDEX1,
> +                                  PCIE_ATU_TYPE_IO,
> +                                  bridge->child_cfg->phys_addr, 0,
> +                                  bridge->child_cfg->size);
> +
> +    return ret;
> +}
> +
> +int dw_pcie_child_config_write(struct pci_host_bridge *bridge, pci_sbdf_t sbdf,
> +                               uint32_t reg, uint32_t len, uint32_t value)
> +{
> +    struct dw_pcie_priv *priv = bridge->priv;
> +    int ret;
> +
> +    ret = pci_generic_config_write(bridge, sbdf, reg, len, value);
> +    if ( !ret && (priv->num_viewport <= 2) )
> +        dw_pcie_prog_outbound_atu(bridge, PCIE_ATU_REGION_INDEX1,
> +                                  PCIE_ATU_TYPE_IO,
> +                                  bridge->child_cfg->phys_addr, 0,
> +                                  bridge->child_cfg->size);
> +    return ret;
> +}
> +
> +bool __init dw_pcie_child_need_p2m_hwdom_mapping(struct domain *d,
> +                                                 struct pci_host_bridge *bridge,
> +                                                 uint64_t addr)
> +{
> +    struct pci_config_window *cfg = bridge->child_cfg;
> +
> +    /*
> +     * We do not want ECAM address space to be mapped in Domain-0's p2m,
> +     * so we can trap access to it.
> +     */
> +    return cfg->phys_addr != addr;
> +}
> +
> +struct pci_host_bridge *__init
> +dw_pcie_host_probe(struct dt_device_node *dev, const void *data,
> +                   const struct pci_ecam_ops *ops,
> +                   const struct pci_ecam_ops *child_ops)
> +{
> +    struct pci_host_bridge *bridge;
> +    struct dw_pcie_priv *priv;
> +
> +    paddr_t atu_phys_addr;
> +    paddr_t atu_size;
> +    int atu_idx, ret;
> +
> +    bridge = pci_host_common_probe(dev, ops, child_ops);
> +    if ( IS_ERR(bridge) )
> +        return bridge;
> +
> +    priv = xzalloc_bytes(sizeof(struct dw_pcie_priv));
> +    if ( !priv )
> +        return ERR_PTR(-ENOMEM);
> +
> +    bridge->priv = priv;
> +
> +    atu_idx = dt_property_match_string(dev, "reg-names", "atu");
> +    if ( atu_idx < 0 )
> +    {
> +        printk(XENLOG_ERR "Cannot find \"atu\" range index in device tree\n");
> +        return ERR_PTR(atu_idx);
> +    }
> +    ret = dt_device_get_address(dev, atu_idx, &atu_phys_addr, &atu_size);
> +    if ( ret )
> +    {
> +        printk(XENLOG_ERR "Cannot find \"atu\" range in device tree\n");
> +        return ERR_PTR(ret);
> +    }
> +    printk("iATU at [mem 0x%" PRIpaddr "-0x%" PRIpaddr "]\n", atu_phys_addr,
> +           atu_phys_addr + atu_size - 1);
> +    priv->atu_base = ioremap_nocache(atu_phys_addr, atu_size);
> +    if ( !priv->atu_base )
> +    {
> +        printk(XENLOG_ERR "iATU ioremap failed\n");
> +        return ERR_PTR(ENXIO);
> +    }
> +
> +    if ( !dt_property_read_u32(dev, "num-viewport", &priv->num_viewport) )
> +        priv->num_viewport = 2;
> +
> +    /*
> +     * FIXME: we cannot read iATU unroll enable now as the host bridge's
> +     * HW is not yet initialized by Domain-0: leave it for later.
> +     */
> +
> +    printk(XENLOG_INFO "%s number of view ports: %d\n", dt_node_full_name(dev),
> +           priv->num_viewport);
> +
> +    return bridge;
> +}
> diff --git a/xen/arch/arm/pci/pci-designware.h b/xen/arch/arm/pci/pci-designware.h
> new file mode 100644
> index 0000000000..a15ba9a329
> --- /dev/null
> +++ b/xen/arch/arm/pci/pci-designware.h
> @@ -0,0 +1,102 @@
> +/*
> + * Based on Linux drivers/pci/controller/pci-host-common.c
> + * Based on Linux drivers/pci/controller/pci-host-generic.c
> + * Based on xen/arch/arm/pci/pci-host-generic.c
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program.  If not, see .
> + */
> +
> +#include 
> +#include 
> +
> +#ifndef __PCI_DESIGNWARE_H__
> +#define __PCI_DESIGNWARE_H__
> +
> +#define PCIBIOS_SUCCESSFUL              0x00
> +#define PCIBIOS_BAD_REGISTER_NUMBER     0x87
> +
> +#define PCIE_ATU_VIEWPORT               0x900
> +#define PCIE_ATU_REGION_OUTBOUND        0
> +#define PCIE_ATU_CR1                    0x904
> +#define PCIE_ATU_INCREASE_REGION_SIZE   BIT(13, UL)
> +#define PCIE_ATU_CR2                    0x908
> +#define PCIE_ATU_ENABLE                 BIT(31, UL)
> +#define PCIE_ATU_LOWER_BASE             0x90C
> +#define PCIE_ATU_UPPER_BASE             0x910
> +#define PCIE_ATU_LIMIT                  0x914
> +#define PCIE_ATU_LOWER_TARGET           0x918
> +#define PCIE_ATU_UPPER_TARGET           0x91C
> +#define PCIE_ATU_UPPER_LIMIT            0x924
> +
> +#define PCIE_ATU_REGION_INDEX1  0x1
> +#define PCIE_ATU_TYPE_IO        0x2
> +#define PCIE_ATU_TYPE_CFG0      0x4
> +
> +#define FIELD_PREP(_mask, _val) \
> +    (((typeof(_mask))(_val) << (ffs64(_mask) - 1)) & (_mask))
> +
> +#define PCIE_ATU_BUS(x)         FIELD_PREP(GENMASK(31, 24), x)
> +#define PCIE_ATU_DEV(x)         FIELD_PREP(GENMASK(23, 19), x)
> +#define PCIE_ATU_FUNC(x)        FIELD_PREP(GENMASK(18, 16), x)
> +
> +/* Register address builder */
> +#define PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(region) \
> +    ((region) << 9)
> +
> +/*
> + * iATU Unroll-specific register definitions
> + * From 4.80 core version the address translation will be made by unroll
> + */
> +#define PCIE_ATU_UNR_REGION_CTRL1       0x00
> +#define PCIE_ATU_UNR_REGION_CTRL2       0x04
> +#define PCIE_ATU_UNR_LOWER_BASE         0x08
> +#define PCIE_ATU_UNR_UPPER_BASE         0x0C
> +#define PCIE_ATU_UNR_LOWER_LIMIT        0x10
> +#define PCIE_ATU_UNR_LOWER_TARGET       0x14
> +#define PCIE_ATU_UNR_UPPER_TARGET       0x18
> +#define PCIE_ATU_UNR_UPPER_LIMIT        0x20
> +
> +#define PCIE_ATU_FUNC_NUM(pf)           ((pf) << 20)
> +
> +/* Parameters for the waiting for iATU enabled routine */
> +#define LINK_WAIT_MAX_IATU_RETRIES      5
> +#define LINK_WAIT_IATU                  9
> +
> +struct dw_pcie_priv {
> +    uint32_t num_viewport;
> +    bool iatu_unroll_initilized;
> +    bool iatu_unroll_enabled;
> +    void __iomem *atu_base;
> +    unsigned int version;
> +};
> +
> +void dw_pcie_set_version(struct pci_host_bridge *bridge, unsigned int version);
> +
> +void __iomem *dw_pcie_child_map_bus(struct pci_host_bridge *bridge,
> +                                    pci_sbdf_t sbdf, uint32_t where);
> +
> +int dw_pcie_child_config_read(struct pci_host_bridge *bridge, pci_sbdf_t sbdf,
> +                              uint32_t reg, uint32_t len, uint32_t *value);
> +
> +int dw_pcie_child_config_write(struct pci_host_bridge *bridge, pci_sbdf_t sbdf,
> +                               uint32_t reg, uint32_t len, uint32_t value);
> +
> +bool __init dw_pcie_child_need_p2m_hwdom_mapping(struct domain *d,
> +                                                 struct pci_host_bridge *bridge,
> +                                                 uint64_t addr);
> +
> +struct pci_host_bridge *__init
> +dw_pcie_host_probe(struct dt_device_node *dev, const void *data,
> +                   const struct pci_ecam_ops *ops,
> +                   const struct pci_ecam_ops *child_ops);
> +#endif /* __PCI_DESIGNWARE_H__ */
> diff --git a/xen/arch/arm/pci/pci-host-rcar4.c b/xen/arch/arm/pci/pci-host-rcar4.c
> new file mode 100644
> index 0000000000..cae1b4254d
> --- /dev/null
> +++ b/xen/arch/arm/pci/pci-host-rcar4.c
> @@ -0,0 +1,103 @@
> +/*
> + * Based on Linux drivers/pci/controller/pci-host-common.c
> + * Based on Linux drivers/pci/controller/pci-host-generic.c
> + * Based on xen/arch/arm/pci/pci-host-generic.c
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program.  If not, see .
> + */
> +
> +#include 
> +#include 
> +
> +#include 
> +#include 
> +#include 
> +
> +#include "pci-designware.h"
> +
> +#define RCAR4_DWC_VERSION       0x520A
> +
> +/*
> + * PCI host bridges often have different ways to access the root and child
> + * bus config spaces:
> + *   "dbi"   : the aperture where root port's own configuration registers
> + *             are available.
> + *   "config": child's configuration space
> + *   "atu"   : iATU registers for DWC version 4.80 or later
> + */
> +static int __init rcar4_cfg_reg_index(struct dt_device_node *np)
> +{
> +    return dt_property_match_string(np, "reg-names", "dbi");
> +}
> +
> +static int __init rcar4_child_cfg_reg_index(struct dt_device_node *np)
> +{
> +    return dt_property_match_string(np, "reg-names", "config");
> +}
> +
> +/* ECAM ops */
> +const struct pci_ecam_ops rcar4_pcie_ops = {
> +    .bus_shift  = 20,
> +    .cfg_reg_index = rcar4_cfg_reg_index,
> +    .pci_ops    = {
> +        .map_bus                = pci_ecam_map_bus,
> +        .read                   = pci_generic_config_read,
> +        .write                  = pci_generic_config_write,
> +        .need_p2m_hwdom_mapping = pci_ecam_need_p2m_hwdom_mapping,
> +    }
> +};
> +
> +const struct pci_ecam_ops rcar4_pcie_child_ops = {
> +    .bus_shift  = 20,
> +    .cfg_reg_index = rcar4_child_cfg_reg_index,
> +    .pci_ops    = {
> +        .map_bus                = dw_pcie_child_map_bus,
> +        .read                   = dw_pcie_child_config_read,
> +        .write                  = dw_pcie_child_config_write,
> +        .need_p2m_hwdom_mapping = dw_pcie_child_need_p2m_hwdom_mapping,
> +    }
> +};
> +
> +static const struct dt_device_match __initconstrel rcar4_pcie_dt_match[] = {
> +    { .compatible = "renesas,r8a779f0-pcie" },
> +    { .compatible = "renesas,r8a779g0-pcie" },
> +    {},
> +};
> +
> +static int __init pci_host_generic_probe(struct dt_device_node *dev,
> +                                         const void *data)
> +{
> +    struct pci_host_bridge *bridge;
> +
> +    bridge = dw_pcie_host_probe(dev, data, &rcar4_pcie_ops,
> +                                &rcar4_pcie_child_ops);
> +
> +    dw_pcie_set_version(bridge, RCAR4_DWC_VERSION);
> +
> +    return 0;
> +}
> +
> +DT_DEVICE_START(pci_gen, "PCI HOST R-CAR GEN4", DEVICE_PCI_HOSTBRIDGE)
> +.dt_match = rcar4_pcie_dt_match,
> +.init = pci_host_generic_probe,
> +DT_DEVICE_END
> +
> +/*
> + * Local variables:
> + * mode: C
> + * c-file-style: "BSD"
> + * c-basic-offset: 4
> + * tab-width: 4
> + * indent-tabs-mode: nil
> + * End:
> + */
> -- 
> 2.34.1
>


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MIME-Version: 1.0
Date: Wed, 23 Apr 2025 23:09:56 +0200
From: Nicola Vetrini 
To: Julien Grall 
Cc: victorm.lira@amd.com, xen-devel@lists.xenproject.org, Federico Serafini
 , Andrew Cooper ,
 Anthony PERARD , Michal Orzel
 , Jan Beulich , =?UTF-8?Q?Rog?=
 =?UTF-8?Q?er_Pau_Monn=C3=A9?= , Stefano Stabellini
 , Bertrand Marquis 
Subject: Re: [PATCH v1] misra: add deviation of Rule 10.1 for unary minus
In-Reply-To: 
References: <9e1210f2a9c794d68dcc6b897239b228b141296a.1745427770.git.victorm.lira@amd.com>
 <7c7b7a09e9d5ac1cc6f93fecacd8065fb6f25324.1745427770.git.victorm.lira@amd.com>
 
Message-ID: 
X-Sender: nicola.vetrini@bugseng.com
Organization: BUGSENG s.r.l.
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 format=flowed
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On 2025-04-23 22:48, Julien Grall wrote:
> Hi Victor,
> 
> On 23/04/2025 18:54, victorm.lira@amd.com wrote:
>> From: Nicola Vetrini 
>> 
>> MISRA C Rule 10.1 states:
>> "Operands shall not be of an inappropriate essential type"
>> 
>> The unary minus operator applied to an unsigned quantity has
>> a semantics (wrap around) that is well-known to all Xen developers.
>> Thus, this operation is deemed safe.
>> 
>> No functional change.
>> 
>> Signed-off-by: Nicola Vetrini 
>> Signed-off-by: Federico Serafini 
>> Signed-off-by: Victor Lira 
>> ---
>> Changes v1:
>> - add rule title to commit message
>> ---
>> Cc: Andrew Cooper 
>> Cc: Anthony PERARD 
>> Cc: Michal Orzel 
>> Cc: Jan Beulich 
>> Cc: Julien Grall 
>> Cc: Roger Pau Monné 
>> Cc: Stefano Stabellini 
>> Cc: Nicola Vetrini 
>> Cc: Federico Serafini 
>> Cc: Bertrand Marquis 
>> ---
>>   automation/eclair_analysis/ECLAIR/deviations.ecl | 6 ++++++
>>   docs/misra/deviations.rst                        | 6 ++++++
>>   2 files changed, 12 insertions(+)
>> 
>> diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl 
>> b/automation/eclair_analysis/ECLAIR/deviations.ecl
>> index 303b06203a..2cfce850bd 100644
>> --- a/automation/eclair_analysis/ECLAIR/deviations.ecl
>> +++ b/automation/eclair_analysis/ECLAIR/deviations.ecl
>> @@ -347,6 +347,12 @@ constant expressions are required.\""
>>     "any()"}
>>   -doc_end
>> 
>> +-doc_begin="Unary minus operations on non-negative integers have a 
>> semantics (wrap around) that is well-known to all Xen developers."
>> +-config=MC3A2.R10.1,etypes+={safe,
>> +  "stmt(node(unary_operator)&&operator(minus))",
>> +  "src_expr(definitely_in(0..))"}
>> +-doc_end
>> +
>>   #
>>   # Series 11
>>   #
>> diff --git a/docs/misra/deviations.rst b/docs/misra/deviations.rst
>> index cfdd1a9838..c5897e31c5 100644
>> --- a/docs/misra/deviations.rst
>> +++ b/docs/misra/deviations.rst
>> @@ -321,6 +321,12 @@ Deviations related to MISRA C:2012 Rules:
>>          If no bits are set, 0 is returned.
>>        - Tagged as `safe` for ECLAIR.
>> 
>> +   * - R10.1
>> +     - Applying the unary minus operator to an unsigned quantity has 
>> a
>> +       semantics (wrap around) that is well-known to all Xen 
>> developers.
>> +       For this reason, the operation is safe.
> 
> I have realized we use similar wording in the rest of the deviations, 
> but this is rather fragile argument. "well-known" is very subjective 
> and could change over time.
> 
> How many violations do we have? Could we deviate them one by one?
> 

Hi Julien,

around 10 on ARM, but more than 100 on x86 scattered around multiple 
constructs (e.g. not only inside a handful of macros), so I don't think 
it's feasible to deviate them one by one. I do agree that the wording is 
subjective, but it is rather well-defined which toolchains and 
architectures are used (C-language-toolchain.rst). Perhaps a wording 
mentioning the specific assumptions implied here can address your 
concerns?

Thanks,
  Nicola

> Cheers,

-- 
Nicola Vetrini, B.Sc.
Software Engineer
BUGSENG (https://bugseng.com)
LinkedIn: https://www.linkedin.com/in/nicola-vetrini-a42471253


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Date: Wed, 23 Apr 2025 22:12:50 +0100
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v1] misra: add deviation of Rule 10.1 for unary minus
Content-Language: en-GB
To: Nicola Vetrini 
Cc: victorm.lira@amd.com, xen-devel@lists.xenproject.org,
 Federico Serafini ,
 Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Jan Beulich ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Bertrand Marquis 
References: <9e1210f2a9c794d68dcc6b897239b228b141296a.1745427770.git.victorm.lira@amd.com>
 <7c7b7a09e9d5ac1cc6f93fecacd8065fb6f25324.1745427770.git.victorm.lira@amd.com>
 
 
From: Julien Grall 
In-Reply-To: 
Content-Type: text/plain; charset=UTF-8; format=flowed
Content-Transfer-Encoding: 8bit

Hi Nicola,

On 23/04/2025 22:09, Nicola Vetrini wrote:
> On 2025-04-23 22:48, Julien Grall wrote:
>> Hi Victor,
>>
>> On 23/04/2025 18:54, victorm.lira@amd.com wrote:
>>> From: Nicola Vetrini 
>>>
>>> MISRA C Rule 10.1 states:
>>> "Operands shall not be of an inappropriate essential type"
>>>
>>> The unary minus operator applied to an unsigned quantity has
>>> a semantics (wrap around) that is well-known to all Xen developers.
>>> Thus, this operation is deemed safe.
>>>
>>> No functional change.
>>>
>>> Signed-off-by: Nicola Vetrini 
>>> Signed-off-by: Federico Serafini 
>>> Signed-off-by: Victor Lira 
>>> ---
>>> Changes v1:
>>> - add rule title to commit message
>>> ---
>>> Cc: Andrew Cooper 
>>> Cc: Anthony PERARD 
>>> Cc: Michal Orzel 
>>> Cc: Jan Beulich 
>>> Cc: Julien Grall 
>>> Cc: Roger Pau Monné 
>>> Cc: Stefano Stabellini 
>>> Cc: Nicola Vetrini 
>>> Cc: Federico Serafini 
>>> Cc: Bertrand Marquis 
>>> ---
>>>   automation/eclair_analysis/ECLAIR/deviations.ecl | 6 ++++++
>>>   docs/misra/deviations.rst                        | 6 ++++++
>>>   2 files changed, 12 insertions(+)
>>>
>>> diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/ 
>>> automation/eclair_analysis/ECLAIR/deviations.ecl
>>> index 303b06203a..2cfce850bd 100644
>>> --- a/automation/eclair_analysis/ECLAIR/deviations.ecl
>>> +++ b/automation/eclair_analysis/ECLAIR/deviations.ecl
>>> @@ -347,6 +347,12 @@ constant expressions are required.\""
>>>     "any()"}
>>>   -doc_end
>>>
>>> +-doc_begin="Unary minus operations on non-negative integers have a 
>>> semantics (wrap around) that is well-known to all Xen developers."
>>> +-config=MC3A2.R10.1,etypes+={safe,
>>> +  "stmt(node(unary_operator)&&operator(minus))",
>>> +  "src_expr(definitely_in(0..))"}
>>> +-doc_end
>>> +
>>>   #
>>>   # Series 11
>>>   #
>>> diff --git a/docs/misra/deviations.rst b/docs/misra/deviations.rst
>>> index cfdd1a9838..c5897e31c5 100644
>>> --- a/docs/misra/deviations.rst
>>> +++ b/docs/misra/deviations.rst
>>> @@ -321,6 +321,12 @@ Deviations related to MISRA C:2012 Rules:
>>>          If no bits are set, 0 is returned.
>>>        - Tagged as `safe` for ECLAIR.
>>>
>>> +   * - R10.1
>>> +     - Applying the unary minus operator to an unsigned quantity has a
>>> +       semantics (wrap around) that is well-known to all Xen 
>>> developers.
>>> +       For this reason, the operation is safe.
>>
>> I have realized we use similar wording in the rest of the deviations, 
>> but this is rather fragile argument. "well-known" is very subjective 
>> and could change over time.
>>
>> How many violations do we have? Could we deviate them one by one?
>>
> 
> Hi Julien,
> 
> around 10 on ARM, but more than 100 on x86 scattered around multiple 
> constructs (e.g. not only inside a handful of macros), so I don't think 
> it's feasible to deviate them one by one. 

Interesting. This seems to contradict what Stefano just wrote:

"
We only have few instances of this pattern and the few we have are well
understood and certainly deliberate.
"

> I do agree that the wording is 
> subjective, but it is rather well-defined which toolchains and 
> architectures are used (C-language-toolchain.rst). Perhaps a wording 
> mentioning the specific assumptions implied here can address your concerns?

If this is well-defined by the toolchains/architectures, then it is a 
better argument than "Xen community knows it".

Cheers,

-- 
Julien Grall



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Date: Wed, 23 Apr 2025 14:21:10 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Julien Grall 
cc: Nicola Vetrini , victorm.lira@amd.com, 
    xen-devel@lists.xenproject.org, 
    Federico Serafini , 
    Andrew Cooper , 
    Anthony PERARD , 
    Michal Orzel , Jan Beulich , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
    Stefano Stabellini , 
    Bertrand Marquis 
Subject: Re: [PATCH v1] misra: add deviation of Rule 10.1 for unary minus
In-Reply-To: <85bac6a2-db21-4756-99a2-e0543f9afec6@xen.org>
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On Wed, 23 Apr 2025, Julien Grall wrote:
> Hi Nicola,
> 
> On 23/04/2025 22:09, Nicola Vetrini wrote:
> > On 2025-04-23 22:48, Julien Grall wrote:
> > > Hi Victor,
> > > 
> > > On 23/04/2025 18:54, victorm.lira@amd.com wrote:
> > > > From: Nicola Vetrini 
> > > > 
> > > > MISRA C Rule 10.1 states:
> > > > "Operands shall not be of an inappropriate essential type"
> > > > 
> > > > The unary minus operator applied to an unsigned quantity has
> > > > a semantics (wrap around) that is well-known to all Xen developers.
> > > > Thus, this operation is deemed safe.
> > > > 
> > > > No functional change.
> > > > 
> > > > Signed-off-by: Nicola Vetrini 
> > > > Signed-off-by: Federico Serafini 
> > > > Signed-off-by: Victor Lira 
> > > > ---
> > > > Changes v1:
> > > > - add rule title to commit message
> > > > ---
> > > > Cc: Andrew Cooper 
> > > > Cc: Anthony PERARD 
> > > > Cc: Michal Orzel 
> > > > Cc: Jan Beulich 
> > > > Cc: Julien Grall 
> > > > Cc: Roger Pau Monné 
> > > > Cc: Stefano Stabellini 
> > > > Cc: Nicola Vetrini 
> > > > Cc: Federico Serafini 
> > > > Cc: Bertrand Marquis 
> > > > ---
> > > >   automation/eclair_analysis/ECLAIR/deviations.ecl | 6 ++++++
> > > >   docs/misra/deviations.rst                        | 6 ++++++
> > > >   2 files changed, 12 insertions(+)
> > > > 
> > > > diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/
> > > > automation/eclair_analysis/ECLAIR/deviations.ecl
> > > > index 303b06203a..2cfce850bd 100644
> > > > --- a/automation/eclair_analysis/ECLAIR/deviations.ecl
> > > > +++ b/automation/eclair_analysis/ECLAIR/deviations.ecl
> > > > @@ -347,6 +347,12 @@ constant expressions are required.\""
> > > >     "any()"}
> > > >   -doc_end
> > > > 
> > > > +-doc_begin="Unary minus operations on non-negative integers have a
> > > > semantics (wrap around) that is well-known to all Xen developers."
> > > > +-config=MC3A2.R10.1,etypes+={safe,
> > > > +  "stmt(node(unary_operator)&&operator(minus))",
> > > > +  "src_expr(definitely_in(0..))"}
> > > > +-doc_end
> > > > +
> > > >   #
> > > >   # Series 11
> > > >   #
> > > > diff --git a/docs/misra/deviations.rst b/docs/misra/deviations.rst
> > > > index cfdd1a9838..c5897e31c5 100644
> > > > --- a/docs/misra/deviations.rst
> > > > +++ b/docs/misra/deviations.rst
> > > > @@ -321,6 +321,12 @@ Deviations related to MISRA C:2012 Rules:
> > > >          If no bits are set, 0 is returned.
> > > >        - Tagged as `safe` for ECLAIR.
> > > > 
> > > > +   * - R10.1
> > > > +     - Applying the unary minus operator to an unsigned quantity has a
> > > > +       semantics (wrap around) that is well-known to all Xen
> > > > developers.
> > > > +       For this reason, the operation is safe.
> > > 
> > > I have realized we use similar wording in the rest of the deviations, but
> > > this is rather fragile argument. "well-known" is very subjective and could
> > > change over time.
> > > 
> > > How many violations do we have? Could we deviate them one by one?
> > > 
> > 
> > Hi Julien,
> > 
> > around 10 on ARM, but more than 100 on x86 scattered around multiple
> > constructs (e.g. not only inside a handful of macros), so I don't think it's
> > feasible to deviate them one by one. 
> 
> Interesting. This seems to contradict what Stefano just wrote:
> 
> "
> We only have few instances of this pattern and the few we have are well
> understood and certainly deliberate.
> "

Hi Julien,

Sorry I was going by memory, I should have checked the numbers. There is
an additional issue that there was no overall agreement across all
maintainers to remove all the violations on x86, but now that I see
there are so many it is not really feasible anyway.


> > I do agree that the wording is subjective, but it is rather well-defined
> > which toolchains and architectures are used (C-language-toolchain.rst).
> > Perhaps a wording mentioning the specific assumptions implied here can
> > address your concerns?
> 
> If this is well-defined by the toolchains/architectures, then it is a better
> argument than "Xen community knows it".
 
I also think that "well-defined by the toolchains" is the most important
thing. That should be the real motivation for the deviation. The text
can be improved.
--8323329-765711088-1745443208=:785180--


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From: Jason Andryuk 
To: 
CC: Jason Andryuk ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH] xen/vpci: Fix msix existing mapping printk
Date: Wed, 23 Apr 2025 17:22:29 -0400
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The format string lacks a space, so mfn and type run together:
(XEN) d0v0 0000:06:00.7: existing mapping (mfn: 753037type: 0) at 0x1 clobbers MSIX MMIO area

Add a space.

Signed-off-by: Jason Andryuk 
---
 xen/drivers/vpci/msix.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c
index f3804ce047..499810b238 100644
--- a/xen/drivers/vpci/msix.c
+++ b/xen/drivers/vpci/msix.c
@@ -666,7 +666,7 @@ int vpci_make_msix_hole(const struct pci_dev *pdev)
                 put_gfn(d, start);
                 gprintk(XENLOG_WARNING,
                         "%pp: existing mapping (mfn: %" PRI_mfn
-                        "type: %d) at %#lx clobbers MSIX MMIO area\n",
+                        " type: %d) at %#lx clobbers MSIX MMIO area\n",
                         &pdev->sbdf, mfn_x(mfn), t, start);
                 return -EEXIST;
             }
-- 
2.49.0



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From: Jason Andryuk 
To: 
CC: Jason Andryuk , Anthony PERARD
	
Subject: [PATCH 1/2] tools/xen-hptool: Add missing newlines
Date: Wed, 23 Apr 2025 17:28:20 -0400
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Add some missing newlines to error messages.

Fixes: 284d5633be37 ("Tools: add online/offline hotplug user interfaces")
Signed-off-by: Jason Andryuk 
---
 tools/misc/xen-hptool.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tools/misc/xen-hptool.c b/tools/misc/xen-hptool.c
index 6d6aec8bad..d850404e31 100644
--- a/tools/misc/xen-hptool.c
+++ b/tools/misc/xen-hptool.c
@@ -51,7 +51,7 @@ static int hp_mem_online_func(int argc, char *argv[])
     ret = xc_mark_page_online(xch, mfn, mfn, &status);
 
     if (ret < 0)
-        fprintf(stderr, "Onlining page mfn %lx failed, error %x", mfn, errno);
+        fprintf(stderr, "Onlining page mfn %lx failed, error %x\n", mfn, errno);
     else if (status & (PG_ONLINE_FAILED |PG_ONLINE_BROKEN)) {
         fprintf(stderr, "Onlining page mfn %lx is broken, "
                         "Memory online failed\n", mfn);
@@ -82,7 +82,7 @@ static int hp_mem_query_func(int argc, char *argv[])
     ret = xc_query_page_offline_status(xch, mfn, mfn, &status);
 
     if (ret < 0)
-        fprintf(stderr, "Querying page mfn %lx failed, error %x", mfn, errno);
+        fprintf(stderr, "Querying page mfn %lx failed, error %x\n", mfn, errno);
     else
     {
 		printf("Memory Status %x: [", status);
-- 
2.49.0



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From: Jason Andryuk 
To: 
CC: Jason Andryuk , Anthony PERARD
	
Subject: [PATCH 0/2] xen-hptool small cleanups
Date: Wed, 23 Apr 2025 17:28:19 -0400
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Two small cleanups for xen-hptool.

Jason Andryuk (2):
  tools/xen-hptool: Add missing newlines
  tools/xen-hptool: Replace hard tabs

 tools/misc/xen-hptool.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

-- 
2.49.0



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From: Jason Andryuk 
To: 
CC: Jason Andryuk , Anthony PERARD
	
Subject: [PATCH 2/2] tools/xen-hptool: Replace hard tabs
Date: Wed, 23 Apr 2025 17:28:21 -0400
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With a tab stop of 8, the alignment is off.  Replace the hard tabs with
spaces to match the file.

Fixes: 284d5633be37 ("Tools: add online/offline hotplug user interfaces")
Signed-off-by: Jason Andryuk 
---
 tools/misc/xen-hptool.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/tools/misc/xen-hptool.c b/tools/misc/xen-hptool.c
index d850404e31..590810b6eb 100644
--- a/tools/misc/xen-hptool.c
+++ b/tools/misc/xen-hptool.c
@@ -56,7 +56,7 @@ static int hp_mem_online_func(int argc, char *argv[])
         fprintf(stderr, "Onlining page mfn %lx is broken, "
                         "Memory online failed\n", mfn);
         ret = -1;
-	}
+    }
     else if (status & PG_ONLINE_ONLINED)
         printf("Memory mfn %lx onlined successfully\n", mfn);
     else
@@ -85,14 +85,14 @@ static int hp_mem_query_func(int argc, char *argv[])
         fprintf(stderr, "Querying page mfn %lx failed, error %x\n", mfn, errno);
     else
     {
-		printf("Memory Status %x: [", status);
+        printf("Memory Status %x: [", status);
         if ( status & PG_OFFLINE_STATUS_OFFLINE_PENDING)
             printf(" PAGE_OFFLINE_PENDING ");
         if ( status & PG_OFFLINE_STATUS_BROKEN )
             printf(" PAGE_BROKEND  ");
         if ( status & PG_OFFLINE_STATUS_OFFLINED )
             printf(" PAGE_OFFLINED ");
-		else
+        else
             printf(" PAGE_ONLINED ");
         printf("]\n");
     }
-- 
2.49.0



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Subject: Re: [PATCH] xen/vpci: Fix msix existing mapping printk
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On 2025-04-23 17:22, Jason Andryuk wrote:
> The format string lacks a space, so mfn and type run together:
> (XEN) d0v0 0000:06:00.7: existing mapping (mfn: 753037type: 0) at 0x1 clobbers MSIX MMIO area
> 
> Add a space.
> 

Fixes: 677053fac17a ("vpci/msix: carve p2m hole for MSIX MMIO regions")

if we want one.

Regards,
Jason


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Date: Wed, 23 Apr 2025 21:36:35 +0000
To: Jason Andryuk 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, =?utf-8?Q?Roger_Pau_Monn=C3=A9?= 
Subject: Re: [PATCH] xen/vpci: Fix msix existing mapping printk
Message-ID: 
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On Wed, Apr 23, 2025 at 05:22:29PM -0400, Jason Andryuk wrote:
> The format string lacks a space, so mfn and type run together:
> (XEN) d0v0 0000:06:00.7: existing mapping (mfn: 753037type: 0) at 0x1 clo=
bbers MSIX MMIO area
>=20
> Add a space.
>=20
> Signed-off-by: Jason Andryuk 

Reviewed-by: Denis Mukhin 

> ---
>  xen/drivers/vpci/msix.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>=20
> diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c
> index f3804ce047..499810b238 100644
> --- a/xen/drivers/vpci/msix.c
> +++ b/xen/drivers/vpci/msix.c
> @@ -666,7 +666,7 @@ int vpci_make_msix_hole(const struct pci_dev *pdev)
>                  put_gfn(d, start);
>                  gprintk(XENLOG_WARNING,
>                          "%pp: existing mapping (mfn: %" PRI_mfn
> -                        "type: %d) at %#lx clobbers MSIX MMIO area\n",
> +                        " type: %d) at %#lx clobbers MSIX MMIO area\n",
>                          &pdev->sbdf, mfn_x(mfn), t, start);
>                  return -EEXIST;
>              }
> --
> 2.49.0
>=20
>=20



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Date: Wed, 23 Apr 2025 21:37:51 +0000
To: Jason Andryuk 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, Anthony PERARD 
Subject: Re: [PATCH 1/2] tools/xen-hptool: Add missing newlines
Message-ID: 
In-Reply-To: <20250423212821.42776-2-jason.andryuk@amd.com>
References: <20250423212821.42776-1-jason.andryuk@amd.com> <20250423212821.42776-2-jason.andryuk@amd.com>
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On Wed, Apr 23, 2025 at 05:28:20PM -0400, Jason Andryuk wrote:
> Add some missing newlines to error messages.
>=20
> Fixes: 284d5633be37 ("Tools: add online/offline hotplug user interfaces")
> Signed-off-by: Jason Andryuk 

Reviewed-by: Denis Mukhin 

> ---
>  tools/misc/xen-hptool.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>=20
> diff --git a/tools/misc/xen-hptool.c b/tools/misc/xen-hptool.c
> index 6d6aec8bad..d850404e31 100644
> --- a/tools/misc/xen-hptool.c
> +++ b/tools/misc/xen-hptool.c
> @@ -51,7 +51,7 @@ static int hp_mem_online_func(int argc, char *argv[])
>      ret =3D xc_mark_page_online(xch, mfn, mfn, &status);
>=20
>      if (ret < 0)
> -        fprintf(stderr, "Onlining page mfn %lx failed, error %x", mfn, e=
rrno);
> +        fprintf(stderr, "Onlining page mfn %lx failed, error %x\n", mfn,=
 errno);
>      else if (status & (PG_ONLINE_FAILED |PG_ONLINE_BROKEN)) {
>          fprintf(stderr, "Onlining page mfn %lx is broken, "
>                          "Memory online failed\n", mfn);
> @@ -82,7 +82,7 @@ static int hp_mem_query_func(int argc, char *argv[])
>      ret =3D xc_query_page_offline_status(xch, mfn, mfn, &status);
>=20
>      if (ret < 0)
> -        fprintf(stderr, "Querying page mfn %lx failed, error %x", mfn, e=
rrno);
> +        fprintf(stderr, "Querying page mfn %lx failed, error %x\n", mfn,=
 errno);
>      else
>      {
>  =09=09printf("Memory Status %x: [", status);
> --
> 2.49.0
>=20
>=20



From xen-devel-bounces@lists.xenproject.org Wed Apr 23 21:38:22 2025
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Date: Wed, 23 Apr 2025 21:38:16 +0000
To: Jason Andryuk 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, Anthony PERARD 
Subject: Re: [PATCH 2/2] tools/xen-hptool: Replace hard tabs
Message-ID: 
In-Reply-To: <20250423212821.42776-3-jason.andryuk@amd.com>
References: <20250423212821.42776-1-jason.andryuk@amd.com> <20250423212821.42776-3-jason.andryuk@amd.com>
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On Wed, Apr 23, 2025 at 05:28:21PM -0400, Jason Andryuk wrote:
> With a tab stop of 8, the alignment is off.  Replace the hard tabs with
> spaces to match the file.
>=20
> Fixes: 284d5633be37 ("Tools: add online/offline hotplug user interfaces")
> Signed-off-by: Jason Andryuk 

Reviewed-by: Denis Mukhin 

> ---
>  tools/misc/xen-hptool.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>=20
> diff --git a/tools/misc/xen-hptool.c b/tools/misc/xen-hptool.c
> index d850404e31..590810b6eb 100644
> --- a/tools/misc/xen-hptool.c
> +++ b/tools/misc/xen-hptool.c
> @@ -56,7 +56,7 @@ static int hp_mem_online_func(int argc, char *argv[])
>          fprintf(stderr, "Onlining page mfn %lx is broken, "
>                          "Memory online failed\n", mfn);
>          ret =3D -1;
> -=09}
> +    }
>      else if (status & PG_ONLINE_ONLINED)
>          printf("Memory mfn %lx onlined successfully\n", mfn);
>      else
> @@ -85,14 +85,14 @@ static int hp_mem_query_func(int argc, char *argv[])
>          fprintf(stderr, "Querying page mfn %lx failed, error %x\n", mfn,=
 errno);
>      else
>      {
> -=09=09printf("Memory Status %x: [", status);
> +        printf("Memory Status %x: [", status);
>          if ( status & PG_OFFLINE_STATUS_OFFLINE_PENDING)
>              printf(" PAGE_OFFLINE_PENDING ");
>          if ( status & PG_OFFLINE_STATUS_BROKEN )
>              printf(" PAGE_BROKEND  ");
>          if ( status & PG_OFFLINE_STATUS_OFFLINED )
>              printf(" PAGE_OFFLINED ");
> -=09=09else
> +        else
>              printf(" PAGE_ONLINED ");
>          printf("]\n");
>      }
> --
> 2.49.0
>=20
>=20



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On Wed, Apr 23, 2025 at 10:11:35PM +0200, Nicola Vetrini wrote:
> On 2025-04-23 20:45, Sergii Dmytruk wrote:
> > On Wed, Apr 23, 2025 at 02:38:37PM +0100, Andrew Cooper wrote:
> > > On 22/04/2025 6:14 pm, Andrew Cooper wrote:
> > > > I've stripped out the sha2 patch and fixed up to use the existing sha2,
> > > > then kicked off some CI testing:
> > > >
> > > > https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1780285393
> > > > https://cirrus-ci.com/build/5452335868018688
> > > >
> > > > When the dust has settled, I'll talk you through the failures.
> > >
> > > And here we go. Interestingly, the FreeBSD testing was entirely
> > > happy,
> > > and that is the rare way around.
> > >
> > > For Gitlab, there are several areas.
> > >
> > > First, for MISRA. In the job logs, you want the "Browse current
> > > reports:" link which will give you full details, but it's all pretty
> > > simple stuff.
> >
> > Thanks, but that link gives me a list of 5096 failures all over the code
> > base.  Is there any way to see a diff against master?
> >
>
> Hi,
>
> yes, you can define selections of violations introduced on previously clean
> guidelines by clicking on the "ECLAIR" button on the upper right. See [1]
> which is the result of defining the "clean_added" selection shown in the
> attached screenshot. If you have other questions please let me know.

Hi,

not sure why, but using "added" left 4861 violations.  Picking `_NO_TAG`
instead seemingly left only new violations.  Maybe that's something
specific to this particular run.  Either way, I can go through the list
now and know how to adjust it.  Thank you for the instructions.

> Thanks,
>  Nicola
>
> [1] https://saas.eclairit.com:3787/fs/var/local/eclair/xen-project.ecdf/xen-project/hardware/xen-staging/ECLAIR_normal/andrew/tb-v1.1/ARM64/9791028027/PROJECT.ecd;/by_service.html#service&kind{"select":true,"selection":{"hiddenAreaKinds":[],"hiddenSubareaKinds":[],"show":true,"selector":{"enabled":true,"negated":false,"kind":1,"children":[{"enabled":true,"negated":false,"kind":0,"domain":"clean","inputs":[{"enabled":true,"text":"added"}]}]}}}


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Date: Wed, 23 Apr 2025 21:53:47 +0000
To: Alejandro Vallejo 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, "Daniel P. Smith" , Jan Beulich , Andrew Cooper , =?utf-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Jason Andryuk 
Subject: Re: [PATCH v4 03/13] common/hyperlaunch: introduce the domain builder
Message-ID: 
In-Reply-To: 
References: <20250417124844.11143-1-agarciav@amd.com> <20250417124844.11143-4-agarciav@amd.com>  
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On Wed, Apr 23, 2025 at 12:52:58PM +0100, Alejandro Vallejo wrote:
> On Fri Apr 18, 2025 at 10:55 PM BST, dmkhn wrote:
> > On Thu, Apr 17, 2025 at 01:48:25PM +0100, Alejandro Vallejo wrote:
> >> From: "Daniel P. Smith" 
> >>
> >> Introduce the domain builder which is capable of consuming a device tr=
ee as the
> >> first boot module. If it finds a device tree as the first boot module,=
 it will
> >> set its type to BOOTMOD_FDT. This change only detects the boot module =
and
> >> continues to boot with slight change to the boot convention that the d=
om0
> >> kernel is no longer first boot module but is the second.
> >>
> >> No functional change intended.
> >>
> >> Signed-off-by: Daniel P. Smith 
> >> Signed-off-by: Jason Andryuk 
> >> Signed-off-by: Alejandro Vallejo 
> >> ---
> >> v4:
> >>   * Moved from arch/x86/ to common/
> >>   * gated all of domain-builder/ on CONFIG_BOOT_INFO
> >>   * Hide the domain builder submenu for !X86
> >>   * Factor out the "hyperlaunch_enabled =3D false" toggle core.c
> >>   * Removed stub inline, as DCE makes it unnecessary
> >>   * Adjusted printks.
> >> ---
> >>  xen/arch/x86/include/asm/bootinfo.h |  3 ++
> >>  xen/arch/x86/setup.c                | 17 +++++----
> >>  xen/common/Makefile                 |  1 +
> >>  xen/common/domain-builder/Makefile  |  2 ++
> >>  xen/common/domain-builder/core.c    | 56 ++++++++++++++++++++++++++++=
+
> >>  xen/common/domain-builder/fdt.c     | 37 +++++++++++++++++++
> >>  xen/common/domain-builder/fdt.h     | 12 +++++++
> >>  xen/include/xen/domain-builder.h    |  9 +++++
> >>  8 files changed, 131 insertions(+), 6 deletions(-)
> >>  create mode 100644 xen/common/domain-builder/Makefile
> >>  create mode 100644 xen/common/domain-builder/core.c
> >>  create mode 100644 xen/common/domain-builder/fdt.c
> >>  create mode 100644 xen/common/domain-builder/fdt.h
> >>  create mode 100644 xen/include/xen/domain-builder.h
> >>
> >> diff --git a/xen/arch/x86/include/asm/bootinfo.h b/xen/arch/x86/includ=
e/asm/bootinfo.h
> >> index 3afc214c17..82c2650fcf 100644
> >> --- a/xen/arch/x86/include/asm/bootinfo.h
> >> +++ b/xen/arch/x86/include/asm/bootinfo.h
> >> @@ -27,6 +27,7 @@ enum bootmod_type {
> >>      BOOTMOD_RAMDISK,
> >>      BOOTMOD_MICROCODE,
> >>      BOOTMOD_XSM_POLICY,
> >> +    BOOTMOD_FDT,
> >>  };
> >>
> >>  struct boot_module {
> >> @@ -80,6 +81,8 @@ struct boot_info {
> >>      paddr_t memmap_addr;
> >>      size_t memmap_length;
> >>
> >> +    bool hyperlaunch_enabled;
> >> +
> >>      unsigned int nr_modules;
> >>      struct boot_module mods[MAX_NR_BOOTMODS + 1];
> >>      struct boot_domain domains[MAX_NR_BOOTDOMS];
> >> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
> >> index 4df012460d..ccc57cc70a 100644
> >> --- a/xen/arch/x86/setup.c
> >> +++ b/xen/arch/x86/setup.c
> >> @@ -5,6 +5,7 @@
> >>  #include 
> >>  #include 
> >>  #include 
> >> +#include 
> >>  #include 
> >>  #include 
> >>  #include 
> >> @@ -1282,9 +1283,12 @@ void asmlinkage __init noreturn __start_xen(voi=
d)
> >>                 bi->nr_modules);
> >>      }
> >>
> >> -    /* Dom0 kernel is always first */
> >> -    bi->mods[0].type =3D BOOTMOD_KERNEL;
> >> -    bi->domains[0].kernel =3D &bi->mods[0];
> >> +    builder_init(bi);
> >> +
> >> +    /* Find first unknown boot module to use as dom0 kernel */
> >> +    i =3D first_boot_module_index(bi, BOOTMOD_UNKNOWN);
> >> +    bi->mods[i].type =3D BOOTMOD_KERNEL;
> >> +    bi->domains[0].kernel =3D &bi->mods[i];
> >
> > Nit: perhaps add convenience aliases for bi->domains[0] (e.g. dom0) and
> > for bi->mods[0] (e.g. mod)?
>=20
> Inside the boot_info? As in separate aliasing pointers into the arrays?


I was thinking about local variables inside the function pointing to the
bi->mods[0] and bi->domains[0].


> I'd rather not. It'd be dangerous on systems without an actual dom0.
>=20
> The PV shim comes to mind, but other configurations might arise in the
> future where no domain holds the id of 0.
>=20
> >
> >>
> >>      if ( pvh_boot )
> >>      {
> >> @@ -1467,8 +1471,9 @@ void asmlinkage __init noreturn __start_xen(void=
)
> >>          xen->size  =3D __2M_rwdata_end - _stext;
> >>      }
> >>
> >> -    bi->mods[0].headroom =3D
> >> -        bzimage_headroom(bootstrap_map_bm(&bi->mods[0]), bi->mods[0].=
size);
> >> +    bi->domains[0].kernel->headroom =3D
> >> +        bzimage_headroom(bootstrap_map_bm(bi->domains[0].kernel),
> >> +                         bi->domains[0].kernel->size);
> >>      bootstrap_unmap();
> >>
> >>  #ifndef highmem_start
> >> @@ -1592,7 +1597,7 @@ void asmlinkage __init noreturn __start_xen(void=
)
> >>  #endif
> >>      }
> >>
> >> -    if ( bi->mods[0].headroom && !bi->mods[0].relocated )
> >> +    if ( bi->domains[0].kernel->headroom && !bi->domains[0].kernel->r=
elocated )
> >>          panic("Not enough memory to relocate the dom0 kernel image\n"=
);
> >>      for ( i =3D 0; i < bi->nr_modules; ++i )
> >>      {
> >> diff --git a/xen/common/Makefile b/xen/common/Makefile
> >> index 98f0873056..565837bc71 100644
> >> --- a/xen/common/Makefile
> >> +++ b/xen/common/Makefile
> >> @@ -11,6 +11,7 @@ obj-$(filter-out $(CONFIG_X86),$(CONFIG_ACPI)) +=3D =
device.o
> >>  obj-$(CONFIG_HAS_DEVICE_TREE) +=3D device-tree/
> >>  obj-$(CONFIG_IOREQ_SERVER) +=3D dm.o
> >>  obj-y +=3D domain.o
> >> +obj-$(CONFIG_HAS_BOOT_INFO) +=3D domain-builder/
> >>  obj-y +=3D event_2l.o
> >>  obj-y +=3D event_channel.o
> >>  obj-$(CONFIG_EVTCHN_FIFO) +=3D event_fifo.o
> >> diff --git a/xen/common/domain-builder/Makefile b/xen/common/domain-bu=
ilder/Makefile
> >> new file mode 100644
> >> index 0000000000..b10cd56b28
> >> --- /dev/null
> >> +++ b/xen/common/domain-builder/Makefile
> >> @@ -0,0 +1,2 @@
> >> +obj-$(CONFIG_DOMAIN_BUILDER) +=3D fdt.init.o
> >> +obj-y +=3D core.init.o
> >> diff --git a/xen/common/domain-builder/core.c b/xen/common/domain-buil=
der/core.c
> >> new file mode 100644
> >> index 0000000000..a5b21fc179
> >> --- /dev/null
> >> +++ b/xen/common/domain-builder/core.c
> >> @@ -0,0 +1,56 @@
> >> +/* SPDX-License-Identifier: GPL-2.0-only */
> >> +/*
> >> + * Copyright (C) 2024, Apertus Solutions, LLC
> >> + */
> >> +#include 
> >> +#include 
> >> +#include 
> >> +#include 
> >> +
> >> +#include 
> >> +
> >> +#include "fdt.h"
> >> +
> >> +void __init builder_init(struct boot_info *bi)
> >> +{
> >> +    bi->hyperlaunch_enabled =3D false;
> >> +
> >> +    if ( IS_ENABLED(CONFIG_DOMAIN_BUILDER) )
> >
> > I would re-organize the code to remove one level of indentation, e.g.:
> >
> >        if ( !IS_ENABLED(CONFIG_DOMAIN_BUILDER) )
> >             return;
> >
> >        switch ( ret =3D has_hyperlaunch_fdt(bi) )
> >        ...
> >
> > or even add #ifdef CONFIG_DOMAIN_BUILDER for builder_init() in the head=
er file.
> >
> > What do you think?
>=20
> In this patch it sounds good, but a later patch adds more stuff at the
> tail of the function that must not be skipped, so it wouldn't work
> as-is.
>=20
> Another matter is whether this function could be skipped in the "no-fdt"
> case, and it probably could. But I do know the longer series (big RFC
> from Daniel) adds more common logic present when !CONFIG_DOMAIN_BUILDER,
> so I'm reticent to deviate too much from it to avoid rebasing headaches.


I see, thanks for clarification.


>=20
> >
> >> +    {
> >> +        int ret;
> >> +
> >> +        switch ( ret =3D has_hyperlaunch_fdt(bi) )
> >> +        {
> >> +        case 0:
> >> +            printk(XENLOG_DEBUG "DT found: hyperlaunch\n");
> >> +            bi->hyperlaunch_enabled =3D true;
> >> +            bi->mods[0].type =3D BOOTMOD_FDT;
> >> +            break;
> >> +
> >> +        case -EINVAL:
> >> +            /* No DT found */
> >> +            break;
> >> +
> >> +        case -ENOENT:
> >> +        case -ENODATA:
> >
> > Looks like this code accounts for the follow on change: current impleme=
ntation
> > only returns -EINVAL or 0.
> >
> > Is it possible to convert has_hyperlaunch_fdt() to a simple predicate?
>=20
> The function is a misnomer and it ought to change to return an
> enumerated type instead where it returns FDT_HYPERLAUNCH, FDT_DOM0LESS,
> FDT_UNKNOWN or NO_FDT. Using error codes for identification is a tad too
> hacky.
>=20
> Cheers,
> Alejandro



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Message-ID: <6ae5f0a2-8055-45e1-933c-199d6c6d8626@citrix.com>
Date: Wed, 23 Apr 2025 23:43:15 +0100
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Subject: Re: [PATCH 00/21] x86: Trenchboot Secure Launch DRTM (Xen)
To: Sergii Dmytruk 
Cc: xen-devel@lists.xenproject.org, Jan Beulich ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Lukasz Hawrylko ,
 "Daniel P. Smith" ,
 =?UTF-8?Q?Mateusz_M=C3=B3wka?= ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 Stefano Stabellini ,
 =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 , trenchboot-devel@googlegroups.com
References: 
 <744934f4-f56f-4dc7-bccb-c32f2829d1da@citrix.com>
 <010709d8-7784-41bf-bcb6-bf04803a75fc@citrix.com> 
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From: Andrew Cooper 
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On 23/04/2025 7:45 pm, Sergii Dmytruk wrote:
> On Wed, Apr 23, 2025 at 02:38:37PM +0100, Andrew Cooper wrote:
>> On 22/04/2025 6:14 pm, Andrew Cooper wrote:
>>> I've stripped out the sha2 patch and fixed up to use the existing sha2,
>>> then kicked off some CI testing:
>>>
>>> https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1780285393
>>> https://cirrus-ci.com/build/5452335868018688
>>>
>>> When the dust has settled, I'll talk you through the failures.
>> And here we go.  Interestingly, the FreeBSD testing was entirely happy,
>> and that is the rare way around.
>>
>> For Gitlab, there are several areas.
>>
>> First, for MISRA.  In the job logs, you want the "Browse current
>> reports:" link which will give you full details, but it's all pretty
>> simple stuff.
> Thanks, but that link gives me a list of 5096 failures all over the code
> base.  Is there any way to see a diff against master?

No sadly not.  What you see is a mix of the blocking issues, and the "we
want to see these so we can work on them".

Immediately under the link is the one-line tl;dr.  For ARM, it's just a
single:

Failure: 1 regressions found for clean guidelines
  service MC3A2.R7.2: (required) A `u' or `U' suffix shall be applied to
all integer constants that are represented in an unsigned type:
   violation: 1

Clicking through into the R7.2 analysis shows
https://saas.eclairit.com:3787/fs/var/local/eclair/xen-project.ecdf/xen-project/hardware/xen-staging/ECLAIR_normal/andrew/tb-v1.1/ARM64/9791028027/PROJECT.ecd;/by_service/MC3A2.R7.2.html

This violation is shared with x86 because it's a header pulled into a
common file.

For x86, the list is rather longer.  You've got:

6x D1.1
2x D4.14
1x R5.3
116x R7.2
1x R7.3
12x R8.3
7x R8.4
1x R11.9
87x R20.7

These are the blocking directives/rules.  Others which you see in the
overall report are non-blocking.

>
>> kbl-suspend-x86-64-gcc-debug is a real S3 test on KabyLake hardware,
>> which appears to have gone to sleep and never woken up.  (More likely,
>> crashed on wakeup before we got the console up).  The AlderLake
>> equivalent test seems to be happy, as well as the AMD ones.
> Hm, not sure what that could be, but will try to reproduce/guess.

KBL is unreliable in one specific way, but not with these symptoms.

I reran the suspend test, and it failed in the same way.  I think it's a
deterministic bug.

I can probably dig out my emergency serial debugging patches for S3 if
you want?

>> Other common failures seem to be:
>>
>>     # take image offset into account
>>     arch/x86/efi/fixmlehdr xen.efi 0x200000
>>     Failed to find MLE header in xen.efi
>>     arch/x86/Makefile:220: recipe for target 'xen.efi' failed
>>     make[3]: *** [xen.efi] Error 1
>>
>> ~Andrew
> That seems to be the only reason behind the rest of build failures.
> I was able to reproduce the failure in Fedora 37 docker.  Searching for
> the header in 8KiB instead of 4KiB fixes it.  Looks like large default
> alignment of some toolchains pushes `head.S` to 4 KiB offset.

FYI, you can access all the Xen containers with:

CONTAINER=foo ./automation/scripts/containerize

in the xen.git tree.

Alignment that large is unexpected, and I suspect we want to fix it.  Is
it pre-existing, or something introduced by your series?

~Andrew


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On 23/04/2025 9:55 pm, Stefano Stabellini wrote:
> On Wed, 23 Apr 2025, Nicola Vetrini wrote:
>> __inline was not mentioned in C-language-toolchain.rst, while
>> __inline__ is not used in code under xen/. __inline is kept because it
>> may be used in Xen. The ECLAIR configuration is now consistent with the
>> documented extensions in the rst file.
>>
>> No functional change.
>>
>> Signed-off-by: Nicola Vetrini 
> Reviewed-by: Stefano Stabellini 

Hmm.  f96e2f64576cd

I take it that patch shouldn't have gone in then?

Regardless, now that we're putting it back in, we should put in both
__inline and __inline__, so as not to need to come back and repeat this
patch again.

~Andrew


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On 4/23/2025 8:51 AM, Dave Hansen wrote:
> On 4/22/25 01:21, Xin Li (Intel) wrote:
>>   static __always_inline void sev_es_wr_ghcb_msr(u64 val)
>>   {
>> -	u32 low, high;
>> -
>> -	low  = (u32)(val);
>> -	high = (u32)(val >> 32);
>> -
>> -	native_wrmsr(MSR_AMD64_SEV_ES_GHCB, low, high);
>> +	native_wrmsrq(MSR_AMD64_SEV_ES_GHCB, val);
>>   }
> 
> A note on ordering: Had this been a native_wrmsr()=>__wrmsr()
> conversion, it could be sucked into the tree easily before the big
> __wrmsr()=>native_wrmsrq() conversion.

Can't reorder the 2 patches, because __wrmsr() takes two u32 arguments
and the split has to be done explicitly in sev_es_wr_ghcb_msr().

Thanks!
     Xin




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Date: Wed, 23 Apr 2025 16:51:16 -0700
User-Agent: Mozilla Thunderbird
Subject: Re: [RFC] xen/x86: allow overlaps with non-RAM regions
To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Jason Andryuk 
Cc: Stefano Stabellini ,
 xen-devel@lists.xenproject.org, Andrew Cooper ,
 Jan Beulich , Xenia.Ragiadakou@amd.com,
 Alejandro.GarciaVallejo@amd.com
References: 
  <3c5dfd26-3c12-498b-aca4-0beac4e991a5@amd.com>
  <9ed89e50-c645-407d-80b4-5b78cb6e36fa@amd.com>
 
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On 4/14/2025 1:25 AM, Roger Pau Monné wrote:
> Caution: This message originated from an External Source. Use proper caution when opening attachments, clicking links, or responding.
>
>
>
>> (XEN) [    7.943830] *** Building a PVH Dom0 ***
>> (XEN) [    7.955960] d0: identity mappings for IOMMU:
>> (XEN) [    7.965494]  [00000000a0, 00000000ff] RW
>> (XEN) [    7.974336]  [0000009bff, 0000009fff] RW
>> (XEN) [    7.983172]  [00000cabc9, 00000cc14c] RW
>> (XEN) [    7.992049]  [00000cc389, 00000cc389] RW
>> (XEN) [    8.000890]  [00000cc70a, 00000cd1fe] RW
>> (XEN) [    8.010065]  [00000ce000, 00000cffff] RW
>> (XEN) [    8.018904]  [00000fd000, 00000fd2ff] RW
>> (XEN) [    8.027745]  [00000fd304, 00000febff] RW
>> (XEN) [    8.036584]  [00000fec02, 00000fedff] RW
>> (XEN) [    8.045546]  [00000fee01, 00000fffff] RW
>> (XEN) [    8.054519]  [000080f340, 00008501ff] RW
>> (XEN) [    8.064135] 0000:02:00.0: not mapping BAR [fea00, fea03] invalid position
>> (XEN) [    8.078698] 0000:03:00.0: not mapping BAR [fe900, fe90f] invalid position
>> (XEN) [    8.093260] 0000:03:00.0: not mapping BAR [fe910, fe913] invalid position
>> (XEN) [    8.107815] 0000:04:00.0: not mapping BAR [fe700, fe77f] invalid position
>> (XEN) [    8.122376] 0000:04:00.3: not mapping BAR [fe500, fe5ff] invalid position
>> (XEN) [    8.136936] 0000:04:00.4: not mapping BAR [fe400, fe4ff] invalid position
>> (XEN) [    8.151498] 0000:05:00.0: not mapping BAR [fe801, fe801] invalid position
>> (XEN) [    8.166056] 0000:05:00.1: not mapping BAR [fe800, fe800] invalid position
> Note those messages don't imply that the BARs are not mapped in the
> dom0 p2m, for example here all the ranges listed as invalid positions
> are already mapped into the p2m and covered by the range:
>
> (XEN) [    8.027745]  [00000fd304, 00000febff] RW
>
>> [    6.378198] nvme nvme0: pci function 0000:02:00.0
>> (XEN) [   20.964789] d0v3 unable to fixup memory read from 0xfea0300c size 4: -1
>> [    6.387692] a(XEN) [   20.981772] d0v3 unable to fixup memory write to 0xfea03000 size 4: -1
> And here the address is somehow not populated in the p2m, despite
> being listed as an identity mapped region.  I think the real issue
> here is why this address is somehow unmapped from the p2m (or maybe
> not even added in the first place?).  Xen does identify it as a region
> that must be identity mapped.
>
> It's a fairly wild guess, but can you try if:
>
> https://xenbits.xen.org/gitweb/?p=xen.git;a=commit;h=e118fc98e7ae652a188d227bd7ea22f132724150
>
> Makes a difference?  vPCI uses rangesets extensively, so the bug fixed
> above could in theory cause unmap operations to remove unintended
> regions, and could explain the symptoms you are seeing here.
>
> If that commit doesn't change behavior we would need to figure out why
> the identity ranges are either not properly mapped, or unexpectedly
> unmapped at a later point.
Hello,

Here is the output from Xen staging built including that commit. The 
behavior is as before.
Is there an existing way to see the physical to machine mappings? I 
didn't find anything in the Xen diagnostics.
I found the tool xen-mfndump but only PV is supported.

> / # xen-mfndump dump-p2m 0
> xc: error: Could not get domain address size (95 = Not supported): 
> Internal error
> Could not map domain 0 memory information
> / # xl list
> Name                                        ID   Mem VCPUs State   Time(s)
> Domain-0                                     0  4095     4 r-----     
> 348.8


Victor


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Date: Thu, 24 Apr 2025 03:08:50 +0200
From: Fabian Specht 
To: xen-devel@lists.xenproject.org
Cc: manuel.andreas@tum.de
Subject: UBSan bug in real mode fpu emulation
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--7qx3syuhiqqeq7zi
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Dear Xen-Devel team,

we discovered a bug regarding undefined behaviour in the FPU emulation
unit.

if ( !s->rex_prefix )
{
	/* Convert 32-bit real/vm86 to 32-bit prot format. */
	unsigned int fip = fpstate.env.mode.real.fip_lo +
					   (fpstate.env.mode.real.fip_hi << 16);
	unsigned int fdp = fpstate.env.mode.real.fdp_lo +
					   (fpstate.env.mode.real.fdp_hi << 16);
	unsigned int fop = fpstate.env.mode.real.fop;

	fpstate.env.mode.prot.fip = fip & 0xf;
	fpstate.env.mode.prot.fcs = fip >> 4;
	fpstate.env.mode.prot.fop = fop;
	fpstate.env.mode.prot.fdp = fdp & 0xf;
	fpstate.env.mode.prot.fds = fdp >> 4;
}

It occurs at arch/x86/arch/x86/x86_emulate/blk.c:85 of the v4.20.0
release during the bit shift and can be triggered using the attached xtf
test. We are not aware of any security consequences.
Simply shifting by 4 should do the trick in my opinion.

Similar code resides in the same file in lines 87, 125 and 127.
The attached xtf test is run for hvm32.

~Fabian

--7qx3syuhiqqeq7zi
Content-Type: text/plain; charset=us-ascii
Content-Disposition: attachment; filename="main.c"

#include 

const char test_title[] = "PoC-FPU-UBSan";

bool test_needs_fep = true;

void test_main(void)
{
    uint8_t fpu_env[28];

    /* To trigger UBSAN oout of bounds shift */
    memset(fpu_env, 0xFF, sizeof(fpu_env));

    asm volatile("movl %%cr0, %%ebx;"
                 "andl $0xFFFFFFFE, %%ebx;"
                 "movl %%ebx, %%cr0;"
                 "ud2;"
                 ".ascii \"xen\";"
                 "fldenv (%0)"
                 :
                 : "r"(fpu_env)
                 : "memory"
                 );

}

--7qx3syuhiqqeq7zi--


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Date: Thu, 24 Apr 2025 01:40:13 +0000
To: Julien Grall 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com
Subject: Re: [PATCH v4] xen/domain: unify domain ID allocation
Message-ID: 
In-Reply-To: 
References: <20250422215322.521464-1-dmukhin@ford.com> 
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Hi Julien,

Thanks a lot for review!

On Wed, Apr 23, 2025 at 12:22:39PM +0100, Julien Grall wrote:
> Hi Denis,
>=20
> On 22/04/2025 22:54, dmkhn@proton.me wrote:
> > From: Denis Mukhin 
> >
> > Currently, hypervisor code has two different non-system domain ID alloc=
ation
> > algorithms:
> >
> >    (a) Arm port allocates IDs sequentially based on max_init_domid;
> >
> >    (b) x86 has another algorithm implementation embedded into
> >        XEN_DOMCTL_createdomain; does not use max_init_domid, but does s=
imilar
> >        thing wrt sequentially allocating IDs.
>=20
> I am a bit confused with this statement. This is implying the code is
> only used by x86. However, XEN_DOMCTL_createdomain is common code and
> used by Arm when creating domains from the toolstack. Can you clarify?

Sorry for confusion. On x86, only implementation in "XEN_DOMCTL_createdomai=
n"
is used; I should have provided a clearer explanation.

> With this in mind...
>=20
> >
> > It makes sense to have a common helper code for such task across archit=
ectures
> > (Arm and x86).
>=20
> ... the unification is effectively between dom0less domU allocation and
> the toolstack domU allocation.

Correct; I will re-phrase, once there's agreement on the direction for this
patch in general.

>=20
> >
> > Wrap the domain ID allocation as an arch-independent function domid_all=
oc() in
> > common/domain.c.
> >
> > Allocation algorithm:
> > - If an explicit domain ID is provided, verify its availability and
> >    use it if ID is unused;
> > - Otherwise, perform an exhaustive search starting from the end of the =
used
> >    domain ID range, excluding hardware_domid.
> >
> > Move the is_free_domid() helper closer to domid_alloc(). Simplify
> > is_free_domid() by removing the domain ID range check, as the ID is now
> > guaranteed to be within the valid range. Additionally, update the predi=
cate to
> > return a bool value instead of an int.
> >
> > No functional change intended.
> >
> > Signed-off-by: Denis Mukhin 
> > ---
> > Changes v3->v4:
> > - fixed the behavior of domctl ID allocator to match the original behav=
ior
> >    in case of exhaustive search
> > - use domid_t input argument in domid_alloc()
> > - use DOMID_INVALID as an indicator of performing an exhaustive search
> > - use DOMID_INVALID as an indicator of allocator failure
> > - use %pd formatting for domain ID printouts in the modified code
> > - some comments fixups
> > - Link to v2: https://lore.kernel.org/xen-devel/20250416061509.934220-1=
-dmukhin@ford.com/
> > - CI run: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines=
/1780576277
> > ---
> >   xen/arch/arm/dom0less-build.c | 17 ++++++------
> >   xen/arch/arm/domain_build.c   | 17 ++++++++----
> >   xen/arch/x86/setup.c          | 11 +++++---
> >   xen/common/domain.c           | 51 ++++++++++++++++++++++++++++++++++=
+
> >   xen/common/domctl.c           | 41 +++-------------------------
> >   xen/include/xen/domain.h      |  2 ++
> >   6 files changed, 84 insertions(+), 55 deletions(-)
> >
> > diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-buil=
d.c
> > index a356fc94fc..61e01b7306 100644
> > --- a/xen/arch/arm/dom0less-build.c
> > +++ b/xen/arch/arm/dom0less-build.c
> > @@ -1038,15 +1038,13 @@ void __init create_domUs(void)
> >           };
> >           unsigned int flags =3D 0U;
> >           bool has_dtb =3D false;
> > +        domid_t domid;
> >           uint32_t val;
> >           int rc;
> >
> >           if ( !dt_device_is_compatible(node, "xen,domain") )
> >               continue;
> >
> > -        if ( (max_init_domid + 1) >=3D DOMID_FIRST_RESERVED )
> > -            panic("No more domain IDs available\n");
> > -
> >           if ( dt_property_read_u32(node, "capabilities", &val) )
> >           {
> >               if ( val & ~DOMAIN_CAPS_MASK )
> > @@ -1218,12 +1216,13 @@ void __init create_domUs(void)
> >           if ( !llc_coloring_enabled && llc_colors_str )
> >               panic("'llc-colors' found, but LLC coloring is disabled\n=
");
> >
> > -        /*
> > -         * The variable max_init_domid is initialized with zero, so he=
re it's
> > -         * very important to use the pre-increment operator to call
> > -         * domain_create() with a domid > 0. (domid =3D=3D 0 is reserv=
ed for Dom0)
> > -         */
> > -        d =3D domain_create(++max_init_domid, &d_cfg, flags);
> > +        domid =3D domid_alloc(DOMID_INVALID);
> > +        if ( domid =3D=3D DOMID_INVALID )
> > +            panic("Error allocating ID for domain %s\n", dt_node_name(=
node));
> > +        if ( max_init_domid < domid )
> > +            max_init_domid =3D domid;
>=20
> While I think it is a good idea to have a single way to allocate domain
> IDs, I am a bit concerned of the change for dom0less domUs. By
> introducing domid_alloc(), it will now be easier to change the behavior
> of the domain ID allocation without realizing the impact for dom0less
> domUs (max_init_domid is mainly used to limit the loop when switching
> consoles).

max_init_domid is (originally) why I am touching this code, in the context =
of:
  https://lore.kernel.org/xen-devel/20250103-vuart-ns8250-v3-v1-0-c5d36b31d=
66c@ford.com/

>=20
> I think we need to document explicitely in domid_alloc() that some
> callers specifically rely on the existing allocation scheme. So we need
> to be careful when changing it.
>=20
> > +
> > +        d =3D domain_create(domid, &d_cfg, flags);
> >           if ( IS_ERR(d) )
> >               panic("Error creating domain %s (rc =3D %ld)\n",
> >                     dt_node_name(node), PTR_ERR(d));
> > diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
> > index 270a6b97e4..fe968dd66b 100644
> > --- a/xen/arch/arm/domain_build.c
> > +++ b/xen/arch/arm/domain_build.c
> > @@ -2371,6 +2371,7 @@ void __init create_dom0(void)
> >           .grant_opts =3D XEN_DOMCTL_GRANT_version(opt_gnttab_max_versi=
on),
> >       };
> >       unsigned int flags =3D CDF_privileged | CDF_hardware;
> > +    domid_t domid;
> >       int rc;
> >
> >       /* The vGIC for DOM0 is exactly emulating the hardware GIC */
> > @@ -2395,19 +2396,25 @@ void __init create_dom0(void)
> >       if ( !llc_coloring_enabled )
> >           flags |=3D CDF_directmap;
> >
> > -    dom0 =3D domain_create(0, &dom0_cfg, flags);
> > +    domid =3D domid_alloc(get_initial_domain_id());
>=20
> This is technically a change of behavior for Arm if the hardware_domid
> is not 0. I think we need to using 0 here. If you want to change the
> behavior, then this should be a separate patch=C2=A0with a proper explana=
tion.

I agree, it is better to isolate Arm hardware_domid-related change in a
separate patch; will do that.

My understanding that the code in create_dom0() should have been using
hardware_domid instead of open coded 0: get_initial_domain_id() returns the
value of hardware_domid on Arm, and then domid_alloc(DOMID_INVALID) in domU
case should ensure that ID of get_initial_domain_id() is skipped during the
domain ID search.

>=20
> > +    if ( domid =3D=3D  DOMID_INVALID )
> > +        panic("Error allocating domain ID %d\n", get_initial_domain_id=
());
> > +
> > +    dom0 =3D domain_create(domid, &dom0_cfg, flags);
> >       if ( IS_ERR(dom0) )
> > -        panic("Error creating domain 0 (rc =3D %ld)\n", PTR_ERR(dom0))=
;
> > +        panic("Error creating domain %d (rc =3D %ld)\n", domid, PTR_ER=
R(dom0));
> >
> >       if ( llc_coloring_enabled && (rc =3D dom0_set_llc_colors(dom0)) )
> > -        panic("Error initializing LLC coloring for domain 0 (rc =3D %d=
)\n", rc);
> > +        panic("Error initializing LLC coloring for domain %pd (rc =3D =
%d)\n",
> > +              dom0, rc);
> >
> >       if ( alloc_dom0_vcpu0(dom0) =3D=3D NULL )
> > -        panic("Error creating domain 0 vcpu0\n");
> > +        panic("Error creating domain %pdv0\n", dom0);
> >
> >       rc =3D construct_dom0(dom0);
> >       if ( rc )
> > -        panic("Could not set up DOM0 guest OS (rc =3D %d)\n", rc);
> > +        panic("Could not set up guest OS for domain %pd (rc =3D %d)\n"=
,
> > +              dom0, rc);
> >
> >       set_xs_domain(dom0);
> >   }
> > diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
> > index 24b36c1a59..e61c023085 100644
> > --- a/xen/arch/x86/setup.c
> > +++ b/xen/arch/x86/setup.c
> > @@ -1009,8 +1009,11 @@ static struct domain *__init create_dom0(struct =
boot_info *bi)
> >       if ( iommu_enabled )
> >           dom0_cfg.flags |=3D XEN_DOMCTL_CDF_iommu;
> >
> > -    /* Create initial domain.  Not d0 for pvshim. */
> > -    bd->domid =3D get_initial_domain_id();
> > +    /* Allocate initial domain ID. Not d0 for pvshim. */
> > +    bd->domid =3D domid_alloc(get_initial_domain_id());
> > +    if ( bd->domid =3D=3D DOMID_INVALID )
> > +        panic("Error allocating domain ID %d\n", get_initial_domain_id=
());
> > +
> >       d =3D domain_create(bd->domid, &dom0_cfg,
> >                         pv_shim ? 0 : CDF_privileged | CDF_hardware);
> >       if ( IS_ERR(d) )
> > @@ -1038,7 +1041,7 @@ static struct domain *__init create_dom0(struct b=
oot_info *bi)
> >
> >           if ( (strlen(acpi_param) =3D=3D 0) && acpi_disabled )
> >           {
> > -            printk("ACPI is disabled, notifying Domain 0 (acpi=3Doff)\=
n");
> > +            printk("ACPI is disabled, notifying domain %pd (acpi=3Doff=
)\n", d);
> >               safe_strcpy(acpi_param, "off");
> >           }
> >
> > @@ -1053,7 +1056,7 @@ static struct domain *__init create_dom0(struct b=
oot_info *bi)
> >
> >       bd->d =3D d;
> >       if ( construct_dom0(bd) !=3D 0 )
> > -        panic("Could not construct domain 0\n");
> > +        panic("Could not construct domain %pd\n", d);
> >
> >       return d;
> >   }
> > diff --git a/xen/common/domain.c b/xen/common/domain.c
> > index abf1969e60..7c0f7a4990 100644
> > --- a/xen/common/domain.c
> > +++ b/xen/common/domain.c
> > @@ -66,6 +66,57 @@ DEFINE_RCU_READ_LOCK(domlist_read_lock);
> >   static struct domain *domain_hash[DOMAIN_HASH_SIZE];
> >   struct domain *domain_list;
> >
> > +/* Domain ID allocator */
> > +static unsigned int domid_last;
> > +
> > +static inline bool is_free_domid(domid_t dom)
> > +{
> > +    struct domain *d =3D rcu_lock_domain_by_id(dom);
> > +
> > +    if ( d )
> > +        rcu_unlock_domain(d);
> > +
> > +    return !d;
> > +}
> > +
> > +/*
> > + * Allocate new domain ID based on the hint.
>=20
> Maybe clarify this should not be used for system domains?

Agree, this I forgot to add; thanks!

>=20
> > + *
> > + * If hint is outside of valid [0..DOMID_FIRST_RESERVED - 1] range of =
IDs,
> > + * perform an exhaustive search starting from the end of the used doma=
in ID
> > + * range, excluding hardware_domid.
> > + */
> > +domid_t domid_alloc(domid_t hint)
>=20
>  From the name, my naive expectation is a second call to domid_alloc()
> (whether concurrent or not) would return a different domid. However,
> AFAICT, this is not the case.

Yes, to guarantee domid_alloc() to return a different value, domid_alloc()
call should be followed by domain_create() call, since domid_alloc()
internally relies on the domain list. I missed that explanation.

>=20
> I am in two mind whether this is the right interface to have. I think
> the minimum would be to clarify the expectation from the callers.

I think that "domain ID check/allocation" can be a library function
shared across all architectures, there's no need to re-implement it:
it looks very unlikely new architectures will need to implement a new schem=
e.

There's another similar domain ID check implementation coming from the
hyperlaunch series, in a part of validating hyperlaunch DT; with having a
library function (my current implementation still needs adjustment),
hyperlaunch code can re-use it.

>=20
> > +{
> > +    domid_t domid =3D DOMID_INVALID;
> > +
> > +    if ( hint < DOMID_FIRST_RESERVED )
> > +    {
> > +        /* Exact match. */
> > +        if ( is_free_domid(hint) )
> > +            domid =3D hint;
> > +    }
> > +    else
> > +    {
> > +        for ( domid =3D domid_last + 1; domid !=3D domid_last; domid++=
 )
> > +        {
> > +            if ( domid =3D=3D DOMID_FIRST_RESERVED )
> > +                domid =3D 0;
> > +
> > +            if ( domid =3D=3D hardware_domid )
> > +                continue;
> > +
> > +            if ( is_free_domid(domid) )
> > +                break;
> > +        }
> > +
> > +        if ( domid !=3D domid_last )
> > +            domid_last =3D domid;
> > +    }
> > +
> > +    return domid;
> > +}
> > +
> >   /*
> >    * Insert a domain into the domlist/hash.  This allows the domain to =
be looked
> >    * up by domid, and therefore to be the subject of hypercalls/etc.
> > diff --git a/xen/common/domctl.c b/xen/common/domctl.c
> > index bfe2e1f9f0..2e02139660 100644
> > --- a/xen/common/domctl.c
> > +++ b/xen/common/domctl.c
> > @@ -49,20 +49,6 @@ static int xenctl_bitmap_to_nodemask(nodemask_t *nod=
emask,
> >                                      MAX_NUMNODES);
> >   }
> >
> > -static inline int is_free_domid(domid_t dom)
> > -{
> > -    struct domain *d;
> > -
> > -    if ( dom >=3D DOMID_FIRST_RESERVED )
> > -        return 0;
> > -
> > -    if ( (d =3D rcu_lock_domain_by_id(dom)) =3D=3D NULL )
> > -        return 1;
> > -
> > -    rcu_unlock_domain(d);
> > -    return 0;
> > -}
> > -
> >   void getdomaininfo(struct domain *d, struct xen_domctl_getdomaininfo =
*info)
> >   {
> >       struct vcpu *v;
> > @@ -421,34 +407,15 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_=
t) u_domctl)
> >
> >       case XEN_DOMCTL_createdomain:
> >       {
> > -        domid_t        dom;
> > -        static domid_t rover =3D 0;
> > +        domid_t domid =3D domid_alloc(op->domain);
> >
> > -        dom =3D op->domain;
> > -        if ( (dom > 0) && (dom < DOMID_FIRST_RESERVED) )
> > +        if ( domid =3D=3D DOMID_INVALID )
> >           {
> >               ret =3D -EEXIST;
> > -            if ( !is_free_domid(dom) )
> > -                break;
> > -        }
> > -        else
> > -        {
> > -            for ( dom =3D rover + 1; dom !=3D rover; dom++ )
> > -            {
> > -                if ( dom =3D=3D DOMID_FIRST_RESERVED )
> > -                    dom =3D 1;
> > -                if ( is_free_domid(dom) )
> > -                    break;
> > -            }
> > -
> > -            ret =3D -ENOMEM;
> > -            if ( dom =3D=3D rover )
> > -                break;
> > -
> > -            rover =3D dom;
> > +            break;
> >           }
> >
> > -        d =3D domain_create(dom, &op->u.createdomain, false);
> > +        d =3D domain_create(domid, &op->u.createdomain, false);
> >           if ( IS_ERR(d) )
> >           {
> >               ret =3D PTR_ERR(d);
> > diff --git a/xen/include/xen/domain.h b/xen/include/xen/domain.h
> > index e10baf2615..43e9411fc0 100644
> > --- a/xen/include/xen/domain.h
> > +++ b/xen/include/xen/domain.h
> > @@ -38,6 +38,8 @@ void arch_get_domain_info(const struct domain *d,
> >
> >   domid_t get_initial_domain_id(void);
> >
> > +domid_t domid_alloc(domid_t hint);
> > +
> >   /* CDF_* constant. Internal flags for domain creation. */
> >   /* Is this a privileged domain? */
> >   #define CDF_privileged           (1U << 0)
>=20
> Cheers,
>=20
> --
> Julien Grall
>=20



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Date: Thu, 24 Apr 2025 05:11:40 +0000
To: Jan Beulich 
From: dmkhn@proton.me
Cc: Alejandro Vallejo , xen-devel@lists.xenproject.org, "Daniel P. Smith" , Andrew Cooper , =?utf-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Bertrand Marquis , Jason Andryuk 
Subject: Re: [PATCH v4 07/13] x86/hyperlaunch: obtain cmdline from device tree
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References: <20250417124844.11143-1-agarciav@amd.com> <20250417124844.11143-8-agarciav@amd.com>   <4813aeb3-72c6-4705-8591-1af63ec05ae8@suse.com>
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On Wed, Apr 23, 2025 at 03:08:18PM +0200, Jan Beulich wrote:
> On 23.04.2025 15:01, Alejandro Vallejo wrote:
> > On Fri Apr 18, 2025 at 11:53 PM BST, dmkhn wrote:
> >> On Thu, Apr 17, 2025 at 01:48:29PM +0100, Alejandro Vallejo wrote:
> >>> --- a/xen/common/domain-builder/fdt.h
> >>> +++ b/xen/common/domain-builder/fdt.h
> >>> @@ -9,6 +9,30 @@ struct boot_info;
> >>>  /* hyperlaunch fdt is required to be module 0 */
> >>>  #define HYPERLAUNCH_MODULE_IDX 0
> >>>
> >>> +static inline int __init fdt_cmdline_prop_size(const void *fdt, int =
offset)
> >>> +{
> >>> +    int ret;
> >>> +
> >>> +    fdt_get_property_by_offset(fdt, offset, &ret);
> >>
> >> Perhaps something like
> >>
> >>        (void)fdt_get_property_by_offset...
> >>
> >> since there's no need to check the return value?
> >
> > I vaguely seem to remember doing something like that a few years ago
> > (because it does show intent and many linters require it) and being tol=
d
> > not to. But maybe I misremember. I'm definitely happy to use that
> > convention here and later unless someone pushes back for some reason.
>=20
> Unless we settle on the need for such for Misra's sake, I'd like to ask
> to avoid them. We generally try to avoid casts as much as possible. We
> then also shouldn't add ones like suggested here.

Ack.

>=20
> Jan



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Subject: Re: [PATCH 1/3] misra: add deviation for rules 21.1 and 21.2
To: Stefano Stabellini ,
 Nicola Vetrini 
Cc: victorm.lira@amd.com, Federico Serafini ,
 Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Bertrand Marquis ,
 "xen-devel@lists.xenproject.org" 
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On 23.04.2025 22:37, Stefano Stabellini wrote:
> On Wed, 23 Apr 2025, Jan Beulich wrote:
>> On 23.04.2025 01:43, victorm.lira@amd.com wrote:
>>> From: Nicola Vetrini 
>>>
>>> MISRA C Rules 21.1 ("#define and #undef shall not be used on a
>>> reserved identifier or reserved macro name") and R21.2 ("A reserved
>>> identifier or reserved macro name shall not be declared") violations
>>> are not problematic for Xen, as it does not use the C or POSIX
>>> libraries.
>>
>> In the course of all the Misra discussions it was pointed out more than
>> once that it's not just the titles which matter, but also the
>> "Amplification" text. While the latter two of the three bullet points
>> applying to both rules clearly are library-centric, the first one isn't.
>> In that light it's entirely unclear to me how ...
>>
>>> Xen uses -fno-builtin and -nostdinc to ensure this, but there are still
>>> __builtin_* functions from the compiler that are available so
>>> a deviation is formulated for all identifiers not starting with
>>> "__builtin_".
>>>
>>> The missing text of a deviation for Rule 21.2 is added to
>>> docs/misra/deviations.rst.
>>>
>>> To avoid regressions, tag both rules as clean and add them to the
>>> monitored set.
>>
>> ... our code base could be anywhere near clean towards these two rules.
> 
> 
> Given the section these two rules belong to "Standard libraries" and
> given the rest of the rule description, it is clear to me that the
> conflicts and undefined behaviors the two rules are trying to prevent
> are conflicts with C or POSIX libraries. Nicola is the original author
> of the patch and he has more experience with MISRA and I would trust
> his interpretation.

Then is there _another_ rule dealing with the remaining reserved
identifier space?

Jan


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Subject: Re: [PATCH v1] misra: add deviation of Rule 5.5
To: Stefano Stabellini ,
 "Lira, Victor M" 
Cc: xen-devel@lists.xenproject.org,
 Federico Serafini ,
 Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Nicola Vetrini ,
 Bertrand Marquis 
References: <9e1210f2a9c794d68dcc6b897239b228b141296a.1745427770.git.victorm.lira@amd.com>
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On 23.04.2025 22:41, Stefano Stabellini wrote:
> On Wed, 23 Apr 2025, Lira, Victor M wrote:
>> Continuing a discussion from before:
>>
>> On 4/22/2025 11:44 PM, Jan Beulich wrote:
>>> Caution: This message originated from an External Source. Use proper caution
>>> when opening attachments, clicking links, or responding.
>>>
>>>
>>> On 23.04.2025 01:43, victorm.lira@amd.com wrote:
>>>>          memmove.
>>>>        - Tagged as `deliberate` for ECLAIR.
>>>>
>>>> +   * - R5.5
>>>> +     - Clashes between function-like macros and function names are
>>>> +       deliberate
>>> They may or may not be deliberate, depending on context. I don't think it's
>>> a
>>> good move to deviate this more widely than necessary. If I get the
>>> expression
>>> above (in deviations.ecl) right, even
>>>
>>> void func1(int);
>>> void func2(int);
>>>
>>> #define func1() func2(0)
>>> #define func2() func1(0)
>>>
>>> would be deviated, which I don't think we want. Especially when, in a less
>>> contrived scenario, the clash may not easily be visible.
>>
>> OK, I see the issue for different functions. Does it make sense to say it's
>> deliberate when it's the same identifier?
>>
>> 	void func1(int);
>> 	...
>> 	#define func1() func1(0)
>>
>> Could this be deviated?
> 
> I think it makes sense to be clear in deviations.rst and the doc text in
> deviations.ecl that we are referring to the same identifier. That we can
> do.
> 
> I am not sure it is possible to change the ecl rule accordingly to
> narrow the check relaxation. If not possible, I'd keep it as it is in
> this patch.

Isn't it a matter of producing a suitable regex? If not, I don't think we
should put in too broad an Eclair rule, but then rather resort to e.g.
SAF comments.

Jan


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Subject: Re: [PATCH v1] misra: add deviation for rules 21.1 and 21.2
To: victorm.lira@amd.com, Nicola Vetrini ,
 Federico Serafini 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Bertrand Marquis , xen-devel@lists.xenproject.org
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On 23.04.2025 19:54, victorm.lira@amd.com wrote:
> From: Nicola Vetrini 
> 
> MISRA C Rules 21.1 ("#define and #undef shall not be used on a
> reserved identifier or reserved macro name") and R21.2 ("A reserved
> identifier or reserved macro name shall not be declared") violations
> are not problematic for Xen, as it does not use the C or POSIX
> libraries.
> 
> Xen uses -fno-builtin and -nostdinc to ensure this, but there are still
> __builtin_* functions from the compiler that are available so
> a deviation is formulated for all identifiers not starting with
> "__builtin_".
> 
> The missing text of a deviation for Rule 21.2 is added to
> docs/misra/deviations.rst.
> 
> To avoid regressions, tag both rules as clean and add them to the
> monitored set.
> 
> Signed-off-by: Nicola Vetrini 
> Signed-off-by: Federico Serafini 
> Signed-off-by: Victor Lira 

While the rule is in the library section, ...

> --- a/docs/misra/deviations.rst
> +++ b/docs/misra/deviations.rst
> @@ -587,7 +587,31 @@ Deviations related to MISRA C:2012 Rules:
>         construct is deviated only in Translation Units that present a violation
>         of the Rule due to uses of this macro.
>       - Tagged as `deliberate` for ECLAIR.
> -
> +
> +   * - R21.1
> +     - Rule 21.1 reports identifiers reserved for the C and POSIX standard
> +       libraries. Xen does not use such libraries and all translation units
> +       are compiled with option '-nostdinc', therefore there is no reason to
> +       avoid to use `#define` or `#undef` on such identifiers except for those
> +       beginning with `__builtin_` for which compilers may perform (wrong)
> +       optimizations.
> +     - Tagged as `safe` for ECLAIR.

... I'd like to ask that it be explicitly clarified here that it's solely
the library (and not e.g. the compiler itself) that are of concern here.
If so, I expect there's another rule dealing with the remaining concerns.
Then, however, I consider the rule wording insufficient (as leaving an
ambiguity).

Jan


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Subject: Re: [PATCH] xen/vpci: Fix msix existing mapping printk
To: Jason Andryuk 
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On 23.04.2025 23:22, Jason Andryuk wrote:
> --- a/xen/drivers/vpci/msix.c
> +++ b/xen/drivers/vpci/msix.c
> @@ -666,7 +666,7 @@ int vpci_make_msix_hole(const struct pci_dev *pdev)
>                  put_gfn(d, start);
>                  gprintk(XENLOG_WARNING,
>                          "%pp: existing mapping (mfn: %" PRI_mfn
> -                        "type: %d) at %#lx clobbers MSIX MMIO area\n",
> +                        " type: %d) at %#lx clobbers MSIX MMIO area\n",

Imo this is a good indication that the format string better wouldn't be
extending across multiple lines. Then it would also be possible to grep
for it (in the sources) using e.g. "existing mapping .* clobbers".

Jan


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Subject: Re: UBSan bug in real mode fpu emulation
To: Fabian Specht , xen-devel@lists.xenproject.org
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On 24.04.2025 03:08, Fabian Specht wrote:
> we discovered a bug regarding undefined behaviour in the FPU emulation
> unit.
> 
> if ( !s->rex_prefix )
> {
> 	/* Convert 32-bit real/vm86 to 32-bit prot format. */
> 	unsigned int fip = fpstate.env.mode.real.fip_lo +
> 					   (fpstate.env.mode.real.fip_hi << 16);
> 	unsigned int fdp = fpstate.env.mode.real.fdp_lo +
> 					   (fpstate.env.mode.real.fdp_hi << 16);
> 	unsigned int fop = fpstate.env.mode.real.fop;
> 
> 	fpstate.env.mode.prot.fip = fip & 0xf;
> 	fpstate.env.mode.prot.fcs = fip >> 4;
> 	fpstate.env.mode.prot.fop = fop;
> 	fpstate.env.mode.prot.fdp = fdp & 0xf;
> 	fpstate.env.mode.prot.fds = fdp >> 4;
> }
> 
> It occurs at arch/x86/arch/x86/x86_emulate/blk.c:85 of the v4.20.0
> release during the bit shift and can be triggered using the attached xtf
> test. We are not aware of any security consequences.
> Simply shifting by 4 should do the trick in my opinion.

Since ...

> Similar code resides in the same file in lines 87, 125 and 127.

... all of these are shifts by 16, could you clarify what it is that you
want to shift by 4? Imo what we need to do here is add casts to unsigned
int, for the results thereof to be shifted (or use some extra arithmetic
to achieve the same effect, e.g. add in 0U). Or we could go and replace
the shifts by 16 with shifts by 12 (accounting for the later right shift
by 4, which would then need dropping).

Jan


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Date: Thu, 24 Apr 2025 14:33:35 +0800
MIME-Version: 1.0
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Subject: Re: [RFC PATCH v2 12/34] x86/msr: Remove pmu_msr_{read,write}()
To: "Xin Li (Intel)" , linux-kernel@vger.kernel.org,
 kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
 linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
 linux-pm@vger.kernel.org, linux-edac@vger.kernel.org,
 xen-devel@lists.xenproject.org, linux-acpi@vger.kernel.org,
 linux-hwmon@vger.kernel.org, netdev@vger.kernel.org,
 platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
 dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, acme@kernel.org,
 jgross@suse.com, andrew.cooper3@citrix.com, peterz@infradead.org,
 namhyung@kernel.org, mark.rutland@arm.com,
 alexander.shishkin@linux.intel.com, jolsa@kernel.org, irogers@google.com,
 adrian.hunter@intel.com, kan.liang@linux.intel.com, wei.liu@kernel.org,
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 tony.luck@intel.com, pbonzini@redhat.com, vkuznets@redhat.com,
 seanjc@google.com, luto@kernel.org, boris.ostrovsky@oracle.com,
 kys@microsoft.com, haiyangz@microsoft.com, decui@microsoft.com
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-13-xin@zytor.com>
Content-Language: en-US
From: "Mi, Dapeng" 
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On 4/22/2025 4:21 PM, Xin Li (Intel) wrote:
> As pmu_msr_{read,write}() are now wrappers of pmu_msr_chk_emulated(),
> remove them and use pmu_msr_chk_emulated() directly.
>
> While at it, convert the data type of MSR index to u32 in functions
> called in pmu_msr_chk_emulated().
>
> Suggested-by: H. Peter Anvin (Intel) 
> Signed-off-by: Xin Li (Intel) 
> ---
>  arch/x86/xen/enlighten_pv.c | 17 ++++++++++-------
>  arch/x86/xen/pmu.c          | 24 ++++--------------------
>  arch/x86/xen/xen-ops.h      |  3 +--
>  3 files changed, 15 insertions(+), 29 deletions(-)
>
> diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c
> index 1418758b57ff..b5a8bceb5f56 100644
> --- a/arch/x86/xen/enlighten_pv.c
> +++ b/arch/x86/xen/enlighten_pv.c
> @@ -1089,8 +1089,9 @@ static void xen_write_cr4(unsigned long cr4)
>  static u64 xen_do_read_msr(unsigned int msr, int *err)
>  {
>  	u64 val = 0;	/* Avoid uninitialized value for safe variant. */
> +	bool emulated;
>  
> -	if (pmu_msr_read(msr, &val, err))
> +	if (pmu_msr_chk_emulated(msr, &val, true, &emulated) && emulated)

ah, here it is.

Could we merge this patch and previous patch into a single patch? It's
unnecessary to just modify the pmu_msr_read()/pmu_msr_write() in previous
patch and delete them immediately. It just wastes the effort.


>  		return val;
>  
>  	if (err)
> @@ -1133,6 +1134,7 @@ static void xen_do_write_msr(unsigned int msr, unsigned int low,
>  			     unsigned int high, int *err)
>  {
>  	u64 val;
> +	bool emulated;
>  
>  	switch (msr) {
>  	case MSR_FS_BASE:
> @@ -1162,12 +1164,13 @@ static void xen_do_write_msr(unsigned int msr, unsigned int low,
>  	default:
>  		val = (u64)high << 32 | low;
>  
> -		if (!pmu_msr_write(msr, val)) {
> -			if (err)
> -				*err = native_write_msr_safe(msr, low, high);
> -			else
> -				native_write_msr(msr, low, high);
> -		}
> +		if (pmu_msr_chk_emulated(msr, &val, false, &emulated) && emulated)
> +			return;
> +
> +		if (err)
> +			*err = native_write_msr_safe(msr, low, high);
> +		else
> +			native_write_msr(msr, low, high);
>  	}
>  }
>  
> diff --git a/arch/x86/xen/pmu.c b/arch/x86/xen/pmu.c
> index 95caae97a394..afb02f43ee3f 100644
> --- a/arch/x86/xen/pmu.c
> +++ b/arch/x86/xen/pmu.c
> @@ -128,7 +128,7 @@ static inline uint32_t get_fam15h_addr(u32 addr)
>  	return addr;
>  }
>  
> -static inline bool is_amd_pmu_msr(unsigned int msr)
> +static bool is_amd_pmu_msr(u32 msr)
>  {
>  	if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD &&
>  	    boot_cpu_data.x86_vendor != X86_VENDOR_HYGON)
> @@ -194,8 +194,7 @@ static bool is_intel_pmu_msr(u32 msr_index, int *type, int *index)
>  	}
>  }
>  
> -static bool xen_intel_pmu_emulate(unsigned int msr, u64 *val, int type,
> -				  int index, bool is_read)
> +static bool xen_intel_pmu_emulate(u32 msr, u64 *val, int type, int index, bool is_read)
>  {
>  	uint64_t *reg = NULL;
>  	struct xen_pmu_intel_ctxt *ctxt;
> @@ -257,7 +256,7 @@ static bool xen_intel_pmu_emulate(unsigned int msr, u64 *val, int type,
>  	return false;
>  }
>  
> -static bool xen_amd_pmu_emulate(unsigned int msr, u64 *val, bool is_read)
> +static bool xen_amd_pmu_emulate(u32 msr, u64 *val, bool is_read)
>  {
>  	uint64_t *reg = NULL;
>  	int i, off = 0;
> @@ -298,8 +297,7 @@ static bool xen_amd_pmu_emulate(unsigned int msr, u64 *val, bool is_read)
>  	return false;
>  }
>  
> -static bool pmu_msr_chk_emulated(unsigned int msr, uint64_t *val, bool is_read,
> -				 bool *emul)
> +bool pmu_msr_chk_emulated(u32 msr, u64 *val, bool is_read, bool *emul)
>  {
>  	int type, index = 0;
>  
> @@ -313,20 +311,6 @@ static bool pmu_msr_chk_emulated(unsigned int msr, uint64_t *val, bool is_read,
>  	return true;
>  }
>  
> -bool pmu_msr_read(u32 msr, u64 *val)
> -{
> -	bool emulated;
> -
> -	return pmu_msr_chk_emulated(msr, val, true, &emulated) && emulated;
> -}
> -
> -bool pmu_msr_write(u32 msr, u64 val)
> -{
> -	bool emulated;
> -
> -	return pmu_msr_chk_emulated(msr, &val, false, &emulated) && emulated;
> -}
> -
>  static u64 xen_amd_read_pmc(int counter)
>  {
>  	struct xen_pmu_amd_ctxt *ctxt;
> diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h
> index a1875e10be31..fde9f9d7415f 100644
> --- a/arch/x86/xen/xen-ops.h
> +++ b/arch/x86/xen/xen-ops.h
> @@ -271,8 +271,7 @@ void xen_pmu_finish(int cpu);
>  static inline void xen_pmu_init(int cpu) {}
>  static inline void xen_pmu_finish(int cpu) {}
>  #endif
> -bool pmu_msr_read(u32 msr, u64 *val);
> -bool pmu_msr_write(u32 msr, u64 val);
> +bool pmu_msr_chk_emulated(u32 msr, u64 *val, bool is_read, bool *emul);
>  int pmu_apic_update(uint32_t reg);
>  u64 xen_read_pmc(int counter);
>  


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Date: Thu, 24 Apr 2025 14:25:49 +0800
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User-Agent: Mozilla Thunderbird
Subject: Re: [RFC PATCH v2 11/34] x86/msr: Remove calling
 native_{read,write}_msr{,_safe}() in pmu_msr_{read,write}()
To: "Xin Li (Intel)" , linux-kernel@vger.kernel.org,
 kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
 linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
 linux-pm@vger.kernel.org, linux-edac@vger.kernel.org,
 xen-devel@lists.xenproject.org, linux-acpi@vger.kernel.org,
 linux-hwmon@vger.kernel.org, netdev@vger.kernel.org,
 platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
 dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, acme@kernel.org,
 jgross@suse.com, andrew.cooper3@citrix.com, peterz@infradead.org,
 namhyung@kernel.org, mark.rutland@arm.com,
 alexander.shishkin@linux.intel.com, jolsa@kernel.org, irogers@google.com,
 adrian.hunter@intel.com, kan.liang@linux.intel.com, wei.liu@kernel.org,
 ajay.kaher@broadcom.com, bcm-kernel-feedback-list@broadcom.com,
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 seanjc@google.com, luto@kernel.org, boris.ostrovsky@oracle.com,
 kys@microsoft.com, haiyangz@microsoft.com, decui@microsoft.com
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-12-xin@zytor.com>
Content-Language: en-US
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On 4/22/2025 4:21 PM, Xin Li (Intel) wrote:
> hpa found that pmu_msr_write() is actually a completely pointless
> function [1]: all it does is shuffle some arguments, then calls
> pmu_msr_chk_emulated() and if it returns true AND the emulated flag
> is clear then does *exactly the same thing* that the calling code
> would have done if pmu_msr_write() itself had returned true.  And
> pmu_msr_read() does the equivalent stupidity.
>
> Remove the calls to native_{read,write}_msr{,_safe}() within
> pmu_msr_{read,write}().  Instead reuse the existing calling code
> that decides whether to call native_{read,write}_msr{,_safe}() based
> on the return value from pmu_msr_{read,write}().  Consequently,
> eliminate the need to pass an error pointer to pmu_msr_{read,write}().
>
> While at it, refactor pmu_msr_write() to take the MSR value as a u64
> argument, replacing the current dual u32 arguments, because the dual
> u32 arguments were only used to call native_write_msr{,_safe}(), which
> has now been removed.
>
> [1]: https://lore.kernel.org/lkml/0ec48b84-d158-47c6-b14c-3563fd14bcc4@zytor.com/
>
> Suggested-by: H. Peter Anvin (Intel) 
> Sign-off-by: Xin Li (Intel) 
> ---
>  arch/x86/xen/enlighten_pv.c |  6 +++++-
>  arch/x86/xen/pmu.c          | 27 ++++-----------------------
>  arch/x86/xen/xen-ops.h      |  4 ++--
>  3 files changed, 11 insertions(+), 26 deletions(-)
>
> diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c
> index 9fbe187aff00..1418758b57ff 100644
> --- a/arch/x86/xen/enlighten_pv.c
> +++ b/arch/x86/xen/enlighten_pv.c
> @@ -1132,6 +1132,8 @@ static void set_seg(unsigned int which, unsigned int low, unsigned int high,
>  static void xen_do_write_msr(unsigned int msr, unsigned int low,
>  			     unsigned int high, int *err)
>  {
> +	u64 val;
> +
>  	switch (msr) {
>  	case MSR_FS_BASE:
>  		set_seg(SEGBASE_FS, low, high, err);
> @@ -1158,7 +1160,9 @@ static void xen_do_write_msr(unsigned int msr, unsigned int low,
>  		break;
>  
>  	default:
> -		if (!pmu_msr_write(msr, low, high, err)) {
> +		val = (u64)high << 32 | low;
> +
> +		if (!pmu_msr_write(msr, val)) {
>  			if (err)
>  				*err = native_write_msr_safe(msr, low, high);
>  			else
> diff --git a/arch/x86/xen/pmu.c b/arch/x86/xen/pmu.c
> index 9c1682af620a..95caae97a394 100644
> --- a/arch/x86/xen/pmu.c
> +++ b/arch/x86/xen/pmu.c
> @@ -313,37 +313,18 @@ static bool pmu_msr_chk_emulated(unsigned int msr, uint64_t *val, bool is_read,
>  	return true;
>  }
>  
> -bool pmu_msr_read(unsigned int msr, uint64_t *val, int *err)
> +bool pmu_msr_read(u32 msr, u64 *val)

The function name is some kind of misleading right now. With the change,
this function only read PMU MSR's value if it's emulated, otherwise it
won't really read PMU MSR. How about changing the name to
"pmu_emulated_msr_read" or something similar?


>  {
>  	bool emulated;
>  
> -	if (!pmu_msr_chk_emulated(msr, val, true, &emulated))
> -		return false;
> -
> -	if (!emulated) {
> -		*val = err ? native_read_msr_safe(msr, err)
> -			   : native_read_msr(msr);
> -	}
> -
> -	return true;
> +	return pmu_msr_chk_emulated(msr, val, true, &emulated) && emulated;
>  }
>  
> -bool pmu_msr_write(unsigned int msr, uint32_t low, uint32_t high, int *err)
> +bool pmu_msr_write(u32 msr, u64 val)

ditto.


>  {
> -	uint64_t val = ((uint64_t)high << 32) | low;
>  	bool emulated;
>  
> -	if (!pmu_msr_chk_emulated(msr, &val, false, &emulated))
> -		return false;
> -
> -	if (!emulated) {
> -		if (err)
> -			*err = native_write_msr_safe(msr, low, high);
> -		else
> -			native_write_msr(msr, low, high);
> -	}
> -
> -	return true;
> +	return pmu_msr_chk_emulated(msr, &val, false, &emulated) && emulated;
>  }
>  
>  static u64 xen_amd_read_pmc(int counter)
> diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h
> index dc886c3cc24d..a1875e10be31 100644
> --- a/arch/x86/xen/xen-ops.h
> +++ b/arch/x86/xen/xen-ops.h
> @@ -271,8 +271,8 @@ void xen_pmu_finish(int cpu);
>  static inline void xen_pmu_init(int cpu) {}
>  static inline void xen_pmu_finish(int cpu) {}
>  #endif
> -bool pmu_msr_read(unsigned int msr, uint64_t *val, int *err);
> -bool pmu_msr_write(unsigned int msr, uint32_t low, uint32_t high, int *err);
> +bool pmu_msr_read(u32 msr, u64 *val);

The prototype of pmu_msr_read() has been changed, but why there is no
corresponding change in its caller (xen_do_read_msr())?


> +bool pmu_msr_write(u32 msr, u64 val);
>  int pmu_apic_update(uint32_t reg);
>  u64 xen_read_pmc(int counter);
>  


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Subject: Re: [RFC PATCH v2 11/34] x86/msr: Remove calling
 native_{read,write}_msr{,_safe}() in pmu_msr_{read,write}()
To: "Mi, Dapeng" , linux-kernel@vger.kernel.org,
        kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
        linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
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        linux-hwmon@vger.kernel.org, netdev@vger.kernel.org,
        platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
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        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
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References: <20250422082216.1954310-1-xin@zytor.com>
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On 4/23/2025 11:25 PM, Mi, Dapeng wrote:

>> -bool pmu_msr_read(unsigned int msr, uint64_t *val, int *err)
>> +bool pmu_msr_read(u32 msr, u64 *val)
> 
> The function name is some kind of misleading right now. With the change,
> this function only read PMU MSR's value if it's emulated, otherwise it
> won't really read PMU MSR. How about changing the name to
> "pmu_emulated_msr_read" or something similar?

This makes sense!

>> -bool pmu_msr_read(unsigned int msr, uint64_t *val, int *err);
>> -bool pmu_msr_write(unsigned int msr, uint32_t low, uint32_t high, int *err);
>> +bool pmu_msr_read(u32 msr, u64 *val);
> 
> The prototype of pmu_msr_read() has been changed, but why there is no
> corresponding change in its caller (xen_do_read_msr())?

Good catch.  I didn't compile one by one thus missed it.


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Subject: Re: [RFC PATCH v2 12/34] x86/msr: Remove pmu_msr_{read,write}()
To: "Mi, Dapeng" , linux-kernel@vger.kernel.org,
        kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
        linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
        linux-pm@vger.kernel.org, linux-edac@vger.kernel.org,
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        linux-hwmon@vger.kernel.org, netdev@vger.kernel.org,
        platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
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        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
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References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-13-xin@zytor.com>
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On 4/23/2025 11:33 PM, Mi, Dapeng wrote:
> Could we merge this patch and previous patch into a single patch? It's
> unnecessary to just modify the pmu_msr_read()/pmu_msr_write() in previous
> patch and delete them immediately. It just wastes the effort.

No, it's not wasting effort, it's for easier review.

Look at this patch, you can easily tell that pmu_msr_read() and
pmu_msr_write() are nothing more than pmu_msr_chk_emulated(), and
then removing them makes a lot of sense.



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Date: Thu, 24 Apr 2025 09:27:25 +0200
From: Nicola Vetrini 
To: Andrew Cooper 
Cc: Stefano Stabellini ,
 xen-devel@lists.xenproject.org, michal.orzel@amd.com,
 xenia.ragiadakou@amd.com, ayan.kumar.halder@amd.com, consulting@bugseng.com,
 Doug Goldstein , Anthony PERARD
 , Jan Beulich , Julien Grall
 , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
Subject: Re: [XEN PATCH] misra: update list of GCC extensions used by Xen
In-Reply-To: <76b7438b-9459-4f41-ab18-b777f7b3fcff@citrix.com>
References: 
 
 <76b7438b-9459-4f41-ab18-b777f7b3fcff@citrix.com>
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On 2025-04-24 00:46, Andrew Cooper wrote:
> On 23/04/2025 9:55 pm, Stefano Stabellini wrote:
>> On Wed, 23 Apr 2025, Nicola Vetrini wrote:
>>> __inline was not mentioned in C-language-toolchain.rst, while
>>> __inline__ is not used in code under xen/. __inline is kept because 
>>> it
>>> may be used in Xen. The ECLAIR configuration is now consistent with 
>>> the
>>> documented extensions in the rst file.
>>> 
>>> No functional change.
>>> 
>>> Signed-off-by: Nicola Vetrini 
>> Reviewed-by: Stefano Stabellini 
> 
> Hmm.  f96e2f64576cd
> 
> I take it that patch shouldn't have gone in then?
> 
> Regardless, now that we're putting it back in, we should put in both
> __inline and __inline__, so as not to need to come back and repeat this
> patch again.
> 
> ~Andrew

Did I miss the addition of __inline__ here?
https://lore.kernel.org/xen-devel/20250422113957.1289290-1-andrew.cooper3@citrix.com/

No issue with adjusting it as you wrote, but my understanding was that 
only __inline will reenter the codebase.

-- 
Nicola Vetrini, B.Sc.
Software Engineer
BUGSENG (https://bugseng.com)
LinkedIn: https://www.linkedin.com/in/nicola-vetrini-a42471253


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Subject: Re: [RFC PATCH v2 12/34] x86/msr: Remove pmu_msr_{read,write}()
To: Xin Li , linux-kernel@vger.kernel.org,
 kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
 linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
 linux-pm@vger.kernel.org, linux-edac@vger.kernel.org,
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Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
 dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, acme@kernel.org,
 jgross@suse.com, andrew.cooper3@citrix.com, peterz@infradead.org,
 namhyung@kernel.org, mark.rutland@arm.com,
 alexander.shishkin@linux.intel.com, jolsa@kernel.org, irogers@google.com,
 adrian.hunter@intel.com, kan.liang@linux.intel.com, wei.liu@kernel.org,
 ajay.kaher@broadcom.com, bcm-kernel-feedback-list@broadcom.com,
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 seanjc@google.com, luto@kernel.org, boris.ostrovsky@oracle.com,
 kys@microsoft.com, haiyangz@microsoft.com, decui@microsoft.com
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-13-xin@zytor.com>
 <7c44da88-72bb-4d1f-9f38-bf0e7e79b7a0@linux.intel.com>
 <45f95d01-4b98-457c-8272-c396a52b3844@zytor.com>
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On 4/24/2025 3:21 PM, Xin Li wrote:
> On 4/23/2025 11:33 PM, Mi, Dapeng wrote:
>> Could we merge this patch and previous patch into a single patch? It's
>> unnecessary to just modify the pmu_msr_read()/pmu_msr_write() in previous
>> patch and delete them immediately. It just wastes the effort.
> No, it's not wasting effort, it's for easier review.
>
> Look at this patch, you can easily tell that pmu_msr_read() and
> pmu_msr_write() are nothing more than pmu_msr_chk_emulated(), and
> then removing them makes a lot of sense.

These 2 patches are not complicated, it won't be difficult to review if
merging them into one as long as the commit message mentions it clearly.
Anyway I'm fine if you hope to keep them into two patches.




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Subject: Re: [RFC PATCH v2 12/34] x86/msr: Remove pmu_msr_{read,write}()
To: "Mi, Dapeng" , linux-kernel@vger.kernel.org,
        kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
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        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
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        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
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 <7c44da88-72bb-4d1f-9f38-bf0e7e79b7a0@linux.intel.com>
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On 4/24/2025 12:43 AM, Mi, Dapeng wrote:
> These 2 patches are not complicated, it won't be difficult to review if
> merging them into one as long as the commit message mentions it clearly.
> Anyway I'm fine if you hope to keep them into two patches.

Simple Small Steps...


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Date: Thu, 24 Apr 2025 09:59:00 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: "Lira, Victor M" 
Cc: Jason Andryuk ,
	Stefano Stabellini ,
	xen-devel@lists.xenproject.org,
	Andrew Cooper ,
	Jan Beulich , Xenia.Ragiadakou@amd.com,
	Alejandro.GarciaVallejo@amd.com
Subject: Re: [RFC] xen/x86: allow overlaps with non-RAM regions
Message-ID: 
References: 
 
 <3c5dfd26-3c12-498b-aca4-0beac4e991a5@amd.com>
 
 <9ed89e50-c645-407d-80b4-5b78cb6e36fa@amd.com>
 
 
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On Wed, Apr 23, 2025 at 04:51:16PM -0700, Lira, Victor M wrote:
> [    4.570354] Intel(R) 2.5G Ethernet Linux Driver
> 
> [    4.579535] Copyright(c) 2018 Intel Corporation.
> 
> [    4.588898] sky2: driver version 1.30
> 
> (XEN) [   21.644361] d0v3 unable to fixup memory read from 0xfe91000c size 4: -1

This fault is unexpected, according to the identity mappings done at
domain build time:

d0: identity mappings for IOMMU:
 [00000000a0, 00000000ff] RW
 [0000009bff, 0000009fff] RW
 [00000cabc9, 00000cc14c] RW
 [00000cc389, 00000cc389] RW
 [00000cc70a, 00000cd1fe] RW
 [00000ce000, 00000cffff] RW
 [00000fd000, 00000fd2ff] RW

The page at 0xfe910 should be covered by the last range above.  I
think we have a bug somewhere that unexpectedly unmaps that address.

Can you try the Xen patch below and paste the output?  It should print
p2m modifications of the 0xfe910 gfn, so we can spot who/when removes
that mapping.

Thanks, Roger.
---
diff --git a/xen/arch/x86/mm/p2m-pt.c b/xen/arch/x86/mm/p2m-pt.c
index 666abd46be16..c4bb2cb01422 100644
--- a/xen/arch/x86/mm/p2m-pt.c
+++ b/xen/arch/x86/mm/p2m-pt.c
@@ -591,6 +591,14 @@ p2m_pt_set_entry(struct p2m_domain *p2m, gfn_t gfn_, mfn_t mfn,
     unsigned int flags, iommu_old_flags = 0;
     unsigned long old_mfn = mfn_x(INVALID_MFN);
 
+    if ( is_hardware_domain(d) &&
+         0xfe910 >= gfn && 0xfe910 < gfn + (1 << page_order) )
+    {
+        printk("gfn %#lx mfn %#"PRI_mfn" type %u order %u\n",
+               gfn, mfn_x(mfn), p2mt, page_order);
+        WARN();
+    }
+
     if ( !sve )
         return -EOPNOTSUPP;
 


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 to write MSR
To: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= ,
        linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
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        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, andrew.cooper3@citrix.com, peterz@infradead.org,
        namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
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        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-22-xin@zytor.com>
 
 
 <37c88ea3-dd24-4607-9ee1-0f19025aaef3@suse.com>
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On 4/23/2025 9:05 AM, Jürgen Groß wrote:
>> It's not a major change, but when it is patched to use the immediate 
>> form MSR write instruction, it's straightforwardly streamlined.
> 
> It should be rather easy to switch the current wrmsr/rdmsr paravirt 
> patching
> locations to use the rdmsr/wrmsr instructions instead of doing a call to
> native_*msr().
> 
> The case of the new immediate form could be handled the same way.

Actually, that is how we get this patch with the existing alternatives
infrastructure.  And we took a step further to also remove the pv_ops
MSR APIs...

It looks to me that you want to add a new facility to the alternatives
infrastructure first?


>>> Only the "paravirt" term has been eliminated.
>>
>> Yes.
>>
>> But a PV guest doesn't operate at the highest privilege level, which
>> means MSR instructions typically result in a #GP fault.  I actually 
>> think the pv_ops MSR APIs are unnecessary because of this inherent
>> limitation.
>>
>> Looking at the Xen MSR code, except PMU and just a few MSRs, it falls
>> back to executes native MSR instructions.  As MSR instructions trigger
>> #GP, Xen takes control and handles them in 2 ways:
>>
>>    1) emulate (or ignore) a MSR operation and skip the guest instruction.
>>
>>    2) inject the #GP back to guest OS and let its #GP handler handle it.
>>       But Linux MSR exception handler just ignores the MSR instruction
>>       (MCE MSR exception will panic).
>>
>> So why not let Xen handle all the details which it already tries to do?
> 
> Some MSRs are not handled that way, but via a kernel internal emulation.
> And those are handled that way mostly due to performance reasons. And some
> need special treatment.
> 
>> (Linux w/ such a change may not be able to run on old Xen hypervisors.)
> 
> Yes, and this is something to avoid.
> 
> And remember that Linux isn't the only PV-mode guest existing.
> 
>> BTW, if performance is a concern, writes to MSR_KERNEL_GS_BASE and
>> MSR_GS_BASE anyway are hpyercalls into Xen.
> 
> Yes, and some other MSR writes are just NOPs with Xen-PV.
> 

I will do some cleanup and refactor first.

BTW, at least we can merge the safe() APIs into the non-safe() ones.

Thanks!
     Xin


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Subject: Re: [RFC PATCH v2 21/34] x86/msr: Utilize the alternatives mechanism
 to write MSR
To: Xin Li , linux-kernel@vger.kernel.org,
 kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
 linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
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 andrew.cooper3@citrix.com, peterz@infradead.org, namhyung@kernel.org,
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 haiyangz@microsoft.com, decui@microsoft.com
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-22-xin@zytor.com>
 
 
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Subject: Re: [RFC PATCH v2 21/34] x86/msr: Utilize the alternatives mechanism
 to write MSR
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-22-xin@zytor.com>
 
 
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From: Juergen Gross 
To: xen-devel@lists.xenproject.org
Cc: Oleksii Kurochko ,
 Community Manager ,
 Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Jan Beulich ,
 Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Stefano Stabellini ,
 Nick Rosbrook , George Dunlap ,
 =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 ,
 Samuel Thibault 
Message-ID: <04e39f8c-4b14-4dda-b1ee-a86d5194cc8e@suse.com>
Subject: Re: [PATCH v2 0/6] remove qemu-traditional
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Date: Thu, 24 Apr 2025 11:41:14 +0200
From: Anthony PERARD 
To: Juergen Gross 
Cc: xen-devel@lists.xenproject.org,
	Anthony PERARD ,
	Andrew Cooper ,
	Michal Orzel ,
	Jan Beulich , Julien Grall ,
	Roger Pau =?iso-8859-1?Q?Monn=E9?= ,
	Stefano Stabellini 
Subject: Re: [PATCH v2 2/6] docs: remove qemu-traditional support from
 documentation
Message-ID: 
References: <20250408123526.14613-1-jgross@suse.com>
 <20250408123526.14613-3-jgross@suse.com>
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On Tue, Apr 08, 2025 at 02:35:20PM +0200, Juergen Gross wrote:
> diff --git a/docs/man/xl.cfg.5.pod.in b/docs/man/xl.cfg.5.pod.in
> index 7339c44efd..ccf0c58895 100644
> --- a/docs/man/xl.cfg.5.pod.in
> +++ b/docs/man/xl.cfg.5.pod.in
> @@ -895,12 +895,6 @@ is used.
>  Specifies the path to the X authority file that should be used to
>  connect to the X server when the B option is used.
>  
> -=item B

This `opengl` sub-option is also mention above, for the `vfb` option.

> -
> -Enable OpenGL acceleration of the SDL display. Only effects machines
> -using B and only if the
> -device-model was compiled with OpenGL support. The default is 0 (disabled).
> -
>  =item B
>  
>  Configure the keymap to use for the keyboard associated with this
> @@ -1215,17 +1209,14 @@ working graphics passthrough. See the XenVGAPassthroughTestedAdapters
>  L wiki page
>  for graphics cards currently supported by B.
>  
> -B is currently supported both with the qemu-xen-traditional
> -device-model and upstream qemu-xen device-model.
> +B is currently supported with the upstream qemu-xen device-model.

I don't understand why this is written in the doc :-(, where is it not
supported? Previous revision had: "only supported on qemu-trad, no
support for qemu-xen" which was useful information, and was changed
later when qemu-xen gain support. I would remove the sentence.

>  When given as a boolean the B option either disables graphics
>  card passthrough or enables autodetection.
>  
>  When given as a string the B option describes the type
>  of device to enable. Note that this behavior is only supported with the
> -upstream qemu-xen device-model. With qemu-xen-traditional IGD (Intel Graphics
> -Device) is always assumed and options other than autodetect or explicit IGD
> -will result in an error.
> +upstream qemu-xen device-model.

Here, we can remove the "Note that this behavior is only supported with
qemu-xen dm", this is the only device model supported so I hope the
behavior is supported in this case...

>  
>  Currently, valid values for the option are:
>  
> @@ -1903,10 +1894,7 @@ it may be useful to request a different one, like UEFI.
>  
>  =item B
>  
> -Loads ROMBIOS, a 16-bit x86 compatible BIOS. This is used by default
> -when B. This is the only BIOS
> -option supported when B. This is
> -the BIOS used by all previous Xen versions.
> +Loads ROMBIOS, a 16-bit x86 compatible BIOS.

This option is not valid anymore, libxl will complain with:
    "qemu-xen does not support bios=rombios."

And I have no idea if it can work on not, I just know that XenServer
still use RomBIOS with a patched QEMU.

>  =item B
>  
> @@ -1926,8 +1914,7 @@ Override the path to the blob to be used as BIOS. The blob provided here MUST
>  be consistent with the B which you have specified. You should not
>  normally need to specify this option.
>  
> -This option does not have any effect if using B or
> -B.
> +This option does not have any effect if using B.

This doesn't seems to be true. I think the only way currently to have
`bios_path_override` been effective is to start a guest with type=hvm
and device_model_version=qemu-xen.

So maybe instead we should write "Requires
B." like we have for the bios=ovmf option.


Thanks,

-- 
Anthony PERARD


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Date: Thu, 24 Apr 2025 11:59:21 +0200
From: Fabian Specht 
To: Jan Beulich , xen-devel@lists.xenproject.org
Cc: manuel.andreas@tum.de
Subject: Re: UBSan bug in real mode fpu emulation
Message-ID: 
References: 
 <40a5c44c-4ef1-4852-b441-ea65e31b2345@suse.com>
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On Thu, Apr 24, 2025 at 08:34:42AM +0200, Jan Beulich wrote:
> Since ...
> 
> > Similar code resides in the same file in lines 87, 125 and 127.
> 
> ... all of these are shifts by 16, could you clarify what it is that you
> want to shift by 4? Imo what we need to do here is add casts to unsigned
> int, for the results thereof to be shifted (or use some extra arithmetic
> to achieve the same effect, e.g. add in 0U). Or we could go and replace
> the shifts by 16 with shifts by 12 (accounting for the later right shift
> by 4, which would then need dropping).

Oh I guess I was up too late, of course we need some sort of cast.

~Fabian


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From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= 
To: "Xin Li (Intel)" , linux-kernel@vger.kernel.org,
 kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
 linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
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Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
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 mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org,
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 wei.liu@kernel.org, ajay.kaher@broadcom.com,
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 haiyangz@microsoft.com, decui@microsoft.com
Message-ID: <8944b510-6d70-472c-99a2-52a60517733d@suse.com>
Subject: Re: [RFC PATCH v2 12/34] x86/msr: Remove pmu_msr_{read,write}()
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-13-xin@zytor.com>
In-Reply-To: <20250422082216.1954310-13-xin@zytor.com>

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Date: Thu, 24 Apr 2025 12:05:34 +0200
From: Fabian Specht 
To: Jan Beulich , xen-devel@lists.xenproject.org
Cc: manuel.andreas@tum.de
Subject: Re: UBSan bug in real mode fpu emulation
Message-ID: 
References: 
 <40a5c44c-4ef1-4852-b441-ea65e31b2345@suse.com>
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On Thu, Apr 24, 2025 at 08:34:42AM +0200, Jan Beulich wrote:
> Since ...
> 
> > Similar code resides in the same file in lines 87, 125 and 127.
> 
> ... all of these are shifts by 16, could you clarify what it is that you
> want to shift by 4? Imo what we need to do here is add casts to unsigned
> int, for the results thereof to be shifted (or use some extra arithmetic
> to achieve the same effect, e.g. add in 0U). Or we could go and replace
> the shifts by 16 with shifts by 12 (accounting for the later right shift
> by 4, which would then need dropping).
> 
> Jan

I will submit a patch in the coming hours.

~Fabian Specht


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Date: Thu, 24 Apr 2025 12:07:35 +0200
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User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v2 4/6] tools: remove qemu-traditional
To: Juergen Gross , xen-devel@lists.xenproject.org
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Jan Beulich ,
 Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Stefano Stabellini ,
 Community Manager ,
 Samuel Thibault 
References: <20250408123526.14613-1-jgross@suse.com>
 <20250408123526.14613-5-jgross@suse.com>
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From: Oleksii Kurochko 
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On 4/8/25 2:35 PM, Juergen Gross wrote:
> Remove qemu traditional from the tree.
>
> Signed-off-by: Juergen Gross
> ---
>   .gitignore                                    |  3 -
>   CHANGELOG.md                                  |  1 +

For CHANGELOG.md changes LGTM: Acked-by: Oleksii Kurochko

~ Oleksii

>   Config.mk                                     | 24 -----
>   INSTALL                                       | 12 ---
>   MAINTAINERS                                   |  4 -
>   README                                        |  2 +-
>   SUPPORT.md                                    | 16 ----
>   config/Tools.mk.in                            |  1 -
>   docs/process/branching-checklist.txt          |  1 -
>   docs/process/release-technician-checklist.txt |  1 -
>   stubdom/Makefile                              | 84 +----------------
>   stubdom/configure                             | 89 -------------------
>   stubdom/configure.ac                          | 15 ----
>   stubdom/ioemu-minios.cfg                      |  6 --
>   tools/Makefile                                | 58 ------------
>   tools/Rules.mk                                |  3 -
>   tools/config.h.in                             |  3 -
>   tools/configure                               | 42 +--------
>   tools/configure.ac                            | 21 +----
>   19 files changed, 10 insertions(+), 376 deletions(-)
>   delete mode 100644 stubdom/ioemu-minios.cfg
>
> diff --git a/.gitignore b/.gitignore
> index 53f5df0003..ccc0bebee6 100644
> --- a/.gitignore
> +++ b/.gitignore
> @@ -255,9 +255,6 @@ LibVNCServer*
>   tools/qemu-xen-dir-remote
>   tools/qemu-xen-dir
>   
> -tools/qemu-xen-traditional-dir-remote
> -tools/qemu-xen-traditional-dir
> -
>   tools/firmware/seabios-dir-remote
>   tools/firmware/seabios-dir
>   
> diff --git a/CHANGELOG.md b/CHANGELOG.md
> index ce4fcf2feb..d150b9fa1b 100644
> --- a/CHANGELOG.md
> +++ b/CHANGELOG.md
> @@ -21,6 +21,7 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/)
>      - Smoke tests for the FreeBSD Xen builds in Cirrus CI.
>   
>   ### Removed
> + - Support of qemu-traditional has been removed.
>   
>   ## [4.20.0](https://xenbits.xenproject.org/gitweb/?p=xen.git;a=shortlog;h=RELEASE-4.20.0) - 2025-03-05
>   
> diff --git a/Config.mk b/Config.mk
> index 8be7733d9e..d61257a286 100644
> --- a/Config.mk
> +++ b/Config.mk
> @@ -208,22 +208,12 @@ XEN_EXTFILES_URL ?=https://xenbits.xen.org/xen-extfiles
>   
>   # Where to look for inlined subtrees (for example, from a tarball)
>   QEMU_UPSTREAM_INTREE ?= $(XEN_ROOT)/tools/qemu-xen
> -QEMU_TRADITIONAL_INTREE ?= $(XEN_ROOT)/tools/qemu-xen-traditional
>   
>   
>   # Handle legacy options
>   ifneq (,$(SEABIOS_UPSTREAM_TAG))
>   SEABIOS_UPSTREAM_REVISION ?= $(SEABIOS_UPSTREAM_TAG)
>   endif
> -ifneq (,$(QEMU_REMOTE))
> -QEMU_TRADITIONAL_URL ?= $(QEMU_REMOTE)
> -endif
> -ifneq (,$(CONFIG_QEMU))
> -QEMU_TRADITIONAL_LOC ?= $(CONFIG_QEMU)
> -endif
> -ifneq (,$(QEMU_TAG))
> -QEMU_TRADITIONAL_REVISION ?= $(QEMU_TAG)
> -endif
>   
>   OVMF_UPSTREAM_URL ?=https://xenbits.xen.org/git-http/ovmf.git
>   OVMF_UPSTREAM_REVISION ?= ba91d0292e593df8528b66f99c1b0b14fadc8e16
> @@ -239,20 +229,6 @@ SEABIOS_UPSTREAM_REVISION ?= rel-1.16.3
>   
>   ETHERBOOT_NICS ?= rtl8139 8086100e
>   
> -
> -QEMU_TRADITIONAL_URL ?=https://xenbits.xen.org/git-http/qemu-xen-traditional.git
> -QEMU_TRADITIONAL_REVISION ?= 3d273dd05e51e5a1ffba3d98c7437ee84e8f8764
> -# Wed Jul 15 10:01:40 2020 +0100
> -# qemu-trad: remove Xen path dependencies
> -
> -# Specify which qemu-dm to use. This may be `ioemu' to use the old
> -# Mercurial in-tree version, or a local directory, or a git URL.
> -# QEMU_UPSTREAM_LOC ?= `pwd`/$(XEN_ROOT)/../qemu-xen.git
> -
> -# Defaults for subtree locations
> -QEMU_TRADITIONAL_LOC ?= $(call or,$(wildcard $(QEMU_TRADITIONAL_INTREE)),\
> -                                  $(QEMU_TRADITIONAL_URL))
> -
>   QEMU_UPSTREAM_LOC ?= $(call or,$(wildcard $(QEMU_UPSTREAM_INTREE)),\
>                                  $(QEMU_UPSTREAM_URL))
>   
> diff --git a/INSTALL b/INSTALL
> index 88c1464816..786e3da996 100644
> --- a/INSTALL
> +++ b/INSTALL
> @@ -113,15 +113,6 @@ Build a private copy of SeaBIOS.
>   Use the given SeaBIOS binary instead of compiling a private copy.
>     --with-system-seabios=PATH
>   
> -Build the old qemu used by xm/xend. This is required if existing domUs
> -should be migrated to this host, or if existing domU snapshots should be
> -started with this version of the tools. Only if all domUs used the new
> -upstream qemu during initial start it is safe to disable this option.
> -The old qemu requires rombios, which can be disable along with
> -qemu-traditional.
> -  --enable-qemu-traditional
> -  --enable-rombios
> -
>   The libxl toolstack uses the upstream qemu per default. A private copy
>   will be built. If desired this private copy can be configured with
>   additional options passed to its configure script.
> @@ -245,7 +236,6 @@ locations.
>   XEN_EXTFILES_URL=
>   OVMF_UPSTREAM_URL=
>   QEMU_UPSTREAM_URL=
> -QEMU_TRADITIONAL_URL=
>   SEABIOS_UPSTREAM_URL=
>   MINIOS_UPSTREAM_URL=
>   
> @@ -253,7 +243,6 @@ Using additional CFLAGS to build tools which will run in dom0 is
>   required when building distro packages. These variables can be used to
>   pass RPM_OPT_FLAGS.
>   EXTRA_CFLAGS_XEN_TOOLS=
> -EXTRA_CFLAGS_QEMU_TRADITIONAL=
>   EXTRA_CFLAGS_QEMU_XEN=
>   
>   Additional CFLAGS may be supplied to the build of the hypervisor by
> @@ -340,7 +329,6 @@ sudo make install BOOT_DIR=/ood/path/boot EFI_DIR=/odd/path/efi
>   export WGET=$(type -P false)
>   export GIT=$(type -P false)
>   export EXTRA_CFLAGS_XEN_TOOLS="$RPM_OPT_FLAGS"
> -export EXTRA_CFLAGS_QEMU_TRADITIONAL="$RPM_OPT_FLAGS"
>   export EXTRA_CFLAGS_QEMU_XEN="$RPM_OPT_FLAGS"
>   %configure \
>           --with-initddir=%{_initddir}
> diff --git a/MAINTAINERS b/MAINTAINERS
> index c11b82eca9..7d1b3b8641 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -466,10 +466,6 @@ M:	Marek Marczykowski-Górecki
>   S:	Supported
>   F:	tools/python
>   
> -QEMU-DM
> -S:	Supported
> -T:	githttps://xenbits.xenproject.org/git-http/qemu-xen-traditional.git
> -
>   QEMU UPSTREAM
>   M:	Stefano Stabellini
>   M:	Anthony Perard
> diff --git a/README b/README
> index be90be3910..6ee58f7b35 100644
> --- a/README
> +++ b/README
> @@ -80,7 +80,7 @@ disabled at compile time:
>         libnl-3-dev, etc).  Required if network buffering is desired
>         when using Remus with libxl.  See docs/README.remus for detailed
>         information.
> -    * 16-bit x86 assembler, loader and compiler for qemu-traditional / rombios
> +    * 16-bit x86 assembler, loader and compiler for rombios
>         (dev86 rpm or bin86 & bcc debs)
>       * Development install of liblzma for rombios
>       * Development install of libbz2, liblzma, liblzo2, and libzstd for DomU
> diff --git a/SUPPORT.md b/SUPPORT.md
> index e8fd0c251e..5eecf1dcbc 100644
> --- a/SUPPORT.md
> +++ b/SUPPORT.md
> @@ -998,21 +998,6 @@ See the section **Blkback** for image formats supported by QEMU.
>   
>       Status: Supported, not security supported
>   
> -### qemu-xen-traditional ###
> -
> -The Xen Project provides an old version of qemu with modifications
> -which enable use as a device model stub domain.  The old version is
> -normally selected by default only in a stub dm configuration, but it
> -can be requested explicitly in other configurations, for example in
> -`xl` with `device_model_version="QEMU_XEN_TRADITIONAL"`. - - Status, Device Model Stub Domains: Supported, with caveats - 
> Status, as host process device model: No security support, not 
> recommended - -qemu-xen-traditional is security supported only for 
> those available -devices which are supported for mainstream QEMU (see 
> above), with -trusted driver domains (see Device Model Stub Domains). 
> - ## Virtual Firmware ### x86/HVM iPXE @@ -1031,7 +1016,6 @@ as the 
> guest itself. Booting a guest via guest BIOS firmware Status, SeaBIOS 
> (qemu-xen): Supported - Status, ROMBIOS (qemu-xen-traditional): 
> Supported ### x86/HVM OVMF diff --git a/config/Tools.mk.in 
> b/config/Tools.mk.in index 37c071961e..463ab75965 100644 --- 
> a/config/Tools.mk.in +++ b/config/Tools.mk.in @@ -43,7 +43,6 @@ 
> CONFIG_OVMF := @ovmf@ CONFIG_ROMBIOS := @rombios@ CONFIG_SEABIOS := 
> @seabios@ CONFIG_IPXE := @ipxe@ -CONFIG_QEMU_TRAD := 
> @qemu_traditional@ CONFIG_QEMU_XEN := @qemu_xen@ 
> CONFIG_QEMUU_EXTRA_ARGS:= @EXTRA_QEMUU_CONFIGURE_ARGS@ CONFIG_LIBNL := 
> @libnl@ diff --git a/docs/process/branching-checklist.txt 
> b/docs/process/branching-checklist.txt index aa7a27eed5..9632888a56 
> 100644 --- a/docs/process/branching-checklist.txt +++ 
> b/docs/process/branching-checklist.txt @@ -71,7 +71,6 @@ ov=4.0 Ensure 
> references to qemu trees and Mini-OS in xen.git's Config.mk are 
> updated. The variables and there content should be: * 
> QEMU_UPSTREAM_REVISION: qemu-xen-X.Y.0 - * QEMU_TRADITIONAL_REVISION: 
> xen-X.Y.0 * MINIOS_UPSTREAM_REVISION: xen-RELEASE-X.Y.0 Where X.Y is 
> the release version (e.g. 4.17). diff --git 
> a/docs/process/release-technician-checklist.txt 
> b/docs/process/release-technician-checklist.txt index 
> 829e8ec47b..64ed9fd5b2 100644 --- 
> a/docs/process/release-technician-checklist.txt +++ 
> b/docs/process/release-technician-checklist.txt @@ -56,7 +56,6 @@ 
> t=RELEASE-$r * change xen-unstable Config.mk # QEMU_UPSTREAM_REVISION, 
> -# QEMU_TRADITIONAL_REVISION # MINIOS_UPSTREAM_REVISION # (drop any 
> references to the specific commits, e.g. date or title) * change 
> SUPPORT.md heading version number; -unstable or -rc tag diff --git 
> a/stubdom/Makefile b/stubdom/Makefile index 724ce40365..82fc1e90f8 
> 100644 --- a/stubdom/Makefile +++ b/stubdom/Makefile @@ -7,7 +7,6 @@ 
> export PKG_CONFIG_DIR = $(CURDIR)/pkg-config # Remove flags which are 
> meant for tools, e.g. "-m64"
>   export EXTRA_CFLAGS_XEN_TOOLS=
> -export EXTRA_CFLAGS_QEMU_TRADITIONAL=
>   
>   export stubdom=y
>   export debug=y
> @@ -267,43 +266,6 @@ cross-tpmemu: $(TPMEMU_STAMPFILE)
>   .PHONY: $(CROSS_ROOT)
>   $(CROSS_ROOT): cross-newlib cross-zlib cross-libpci
>   
> -QEMU_ROOT := $(shell if [ -d "$(QEMU_TRADITIONAL_LOC)" ]; then echo "$(QEMU_TRADITIONAL_LOC)"; else echo .; fi)
> -
> -ifneq ($(filter ioemu,$(STUBDOM_TARGETS)),)
> -IOEMU_LINKFARM_TARGET := ioemu/linkfarm.stamp
> -endif
> -
> -ifeq ($(QEMU_ROOT),.)
> -$(XEN_ROOT)/tools/qemu-xen-traditional-dir:
> -	$(MAKE) DESTDIR= -C $(XEN_ROOT)/tools qemu-xen-traditional-dir-find
> -
> -ioemu/linkfarm.stamp: $(XEN_ROOT)/tools/qemu-xen-traditional-dir
> -	mkdir -p ioemu
> -	set -e;									\
> -	$(buildmakevars2shellvars);						\
> -	cd ioemu;								\
> -	src="$$XEN_ROOT/tools/qemu-xen-traditional-dir"; export src;		\
> -	(cd $$src && find * -type d						\
> -		$(addprefix ! -path , '*-softmmu*' '*-linux-user*') -print)	\
> -		| xargs mkdir -p;						\
> -	(cd $$src && find *	! -type l  -type f  $(addprefix ! -path ,	\
> -			'*.[oda1]' 'config-*' config.mak qemu-dm qemu-img-xen	\
> -			'*.html' '*.pod' '*-softmmu*' '*-linux-user*'		\
> -			)) >linkfarm.stamp.tmp;				\
> -	cmp -s linkfarm.stamp.tmp linkfarm.stamp &&			\
> -		rm linkfarm.stamp.tmp || {				\
> -		mv linkfarm.stamp.tmp linkfarm.stamp;			\
> -		cat linkfarm.stamp | while read f;			\
> -			do rm -f "$$f"; ln -s "$$src/$$f" "$$f"; done;	\
> -	}
> -else
> -export QEMU_ROOT
> -
> -ioemu/linkfarm.stamp:
> -	mkdir -p ioemu
> -	touch ioemu/linkfarm.stamp
> -endif
> -
>   #######
>   # libraries under tools/libs
>   #######
> @@ -380,29 +342,6 @@ $(TARGETS_MINIOS): mini-os-%:
>                   mkdir -p $@/$$i ; \
>   	done
>   
> -#######
> -# ioemu
> -#######
> -
> -ioemu-minios.gen.cfg: APP_LIBS = evtchn gnttab ctrl guest
> -ioemu-minios.gen.cfg: ioemu-minios.cfg Makefile
> -	$(GEN_config) >$@
> -
> -ioemu-minios-config.mk: ioemu-minios.gen.cfg
> -	MINIOS_CONFIG="$(CURDIR)/$<" CONFIG_FILE="$(CURDIR)/$@" $(MAKE) DESTDIR= -C $(MINI_OS) config
> -
> -.PHONY: ioemu
> -ioemu: cross-zlib cross-libpci libxenguest ioemu-minios-config.mk
> -	[ -f ioemu/config-host.mak ] || \
> -	  ( $(buildmakevars2shellvars); \
> -	    cd ioemu ; \
> -	    LWIPDIR=$(CURDIR)/lwip-$(XEN_TARGET_ARCH) \
> -	    TARGET_CPPFLAGS="$(TARGET_CPPFLAGS) $(shell cat ioemu-minios-config.mk)" \
> -	    TARGET_CFLAGS="$(TARGET_CFLAGS)" \
> -	    TARGET_LDFLAGS="$(TARGET_LDFLAGS)" \
> -	    $(QEMU_ROOT)/xen-setup-stubdom )
> -	$(MAKE) DESTDIR= -C ioemu -f $(QEMU_ROOT)/Makefile
> -
>   ###
>   # C
>   ###
> @@ -496,11 +435,6 @@ xenstorepvh: $(CROSS_ROOT) xenstorepvh-minios-config.mk
>   # minios
>   ########
>   
> -.PHONY: ioemu-stubdom
> -ioemu-stubdom: APP_OBJS=$(CURDIR)/ioemu/i386-stubdom/qemu.a $(CURDIR)/ioemu/i386-stubdom/libqemu.a $(CURDIR)/ioemu/libqemu_common.a
> -ioemu-stubdom: mini-os-$(XEN_TARGET_ARCH)-ioemu lwip-$(XEN_TARGET_ARCH) libxenguest ioemu
> -	DEF_CPPFLAGS="$(TARGET_CPPFLAGS)" DEF_CFLAGS="$(TARGET_CFLAGS)" DEF_LDFLAGS="$(TARGET_LDFLAGS)" MINIOS_CONFIG="$(CURDIR)/ioemu-minios.gen.cfg" $(MAKE) DESTDIR= -C $(MINI_OS) OBJ_DIR=$(CURDIR)/$< LWIPDIR=$(CURDIR)/lwip-$(XEN_TARGET_ARCH) APP_OBJS="$(APP_OBJS)"
> -
>   .PHONY: c-stubdom
>   c-stubdom: mini-os-$(XEN_TARGET_ARCH)-c lwip-$(XEN_TARGET_ARCH) libxenguest c
>   	DEF_CPPFLAGS="$(TARGET_CPPFLAGS)" DEF_CFLAGS="$(TARGET_CFLAGS)" DEF_LDFLAGS="$(TARGET_LDFLAGS)" MINIOS_CONFIG="$(CURDIR)/c/minios.cfg" $(MAKE) DESTDIR= -C $(MINI_OS) OBJ_DIR=$(CURDIR)/$< LWIPDIR=$(CURDIR)/lwip-$(XEN_TARGET_ARCH) APP_OBJS=$(CURDIR)/c/main.a
> @@ -544,13 +478,6 @@ else
>   install: $(STUBDOMPATH)
>   endif
>   
> -install-ioemu: ioemu-stubdom
> -	$(INSTALL_DIR) "$(DESTDIR)$(LIBEXEC_BIN)"
> -	$(INSTALL_PROG) stubdom-dm "$(DESTDIR)$(LIBEXEC_BIN)"
> -	$(INSTALL_DATA) stubdompath.sh "$(DESTDIR)$(LIBEXEC_BIN)"
> -	$(INSTALL_DIR) "$(DESTDIR)$(XENFIRMWAREDIR)"
> -	$(INSTALL_DATA) mini-os-$(XEN_TARGET_ARCH)-ioemu/mini-os.gz "$(DESTDIR)$(XENFIRMWAREDIR)/ioemu-stubdom.gz"
> -
>   install-grub: pv-grub
>   	$(INSTALL_DIR) "$(DESTDIR)$(XENFIRMWAREDIR)"
>   	$(INSTALL_DATA) mini-os-$(XEN_TARGET_ARCH)-grub/mini-os.gz "$(DESTDIR)$(XENFIRMWAREDIR)/pv-grub-$(XEN_TARGET_ARCH).gz" @@ -593,11 +520,6 @@ else uninstall: endif -uninstall-ioemu: - rm -f 
> $(DESTDIR)$(LIBEXEC_BIN)/stubdom-dm - rm -f 
> $(DESTDIR)$(LIBEXEC_BIN)/stubdompath.sh - rm -f 
> $(DESTDIR)$(XENFIRMWAREDIR)/ioemu-stubdom.gz - uninstall-grub: rm -f 
> $(DESTDIR)$(XENFIRMWAREDIR)/pv-grub-$(XEN_TARGET_ARCH).gz @@ -617,11 
> +539,10 @@ uninstall-vtpmmgr: # clean ####### -# Only clean the 
> libxc/ioemu/mini-os part +# Only clean the libxc/mini-os part .PHONY: 
> clean clean: $(foreach lib,$(STUB_LIBS),clean-libxen$(lib)) clean: - 
> rm -fr mini-os-$(XEN_TARGET_ARCH)-ioemu rm -fr 
> mini-os-$(XEN_TARGET_ARCH)-c rm -fr mini-os-$(XEN_TARGET_ARCH)-grub rm 
> -fr mini-os-$(XEN_TARGET_ARCH)-xenstore @@ -636,7 +557,6 @@ clean: rm 
> -f *-minios-config.mk rm -f *.gen.cfg rm -fr pkg-config - -[ ! -d 
> ioemu ] || $(MAKE) DESTDIR= -C ioemu clean -[ ! -d xenstore ] || 
> $(MAKE) -f $(CURDIR)/xenlibs.mk -C xenstore clean -[ ! -d xenstorepvh 
> ] || $(MAKE) -f $(CURDIR)/xenlibs.mk -C xenstorepvh clean @@ -647,7 
> +567,7 @@ crossclean: clean rm -fr newlib-$(XEN_TARGET_ARCH) rm -fr 
> zlib-$(XEN_TARGET_ARCH) pciutils-$(XEN_TARGET_ARCH) rm -fr 
> libs-$(XEN_TARGET_ARCH) - rm -fr ioemu xenstore xenstorepvh + rm -fr 
> xenstore xenstorepvh rm -fr gmp-$(XEN_TARGET_ARCH) rm -fr 
> polarssl-$(XEN_TARGET_ARCH) rm -fr tpm_emulator-$(XEN_TARGET_ARCH) 
> diff --git a/stubdom/configure b/stubdom/configure index 
> 08cacf764c..9dd0e7c796 100755 --- a/stubdom/configure +++ 
> b/stubdom/configure @@ -622,7 +622,6 @@ STUBDOM_UNINSTALL 
> STUBDOM_INSTALL STUBDOM_BUILD STUBDOM_TARGETS -ioemu vtpmmgr vtpm 
> TPMEMU_VERSION @@ -713,14 +712,12 @@ SHELL' ac_subst_files='' 
> ac_user_opts=' enable_option_checking -enable_ioemu_stubdom 
> enable_c_stubdom enable_pv_grub enable_xenstore_stubdom 
> enable_xenstorepvh_stubdom enable_vtpm_stubdom enable_vtpmmgr_stubdom 
> -enable_qemu_traditional enable_debug enable_extfiles ' @@ -1363,7 
> +1360,6 @@ Optional Features: --disable-option-checking ignore 
> unrecognized --enable/--with options --disable-FEATURE do not include 
> FEATURE (same as --enable-FEATURE=no) --enable-FEATURE[=ARG] include 
> FEATURE [ARG=yes] - --enable-ioemu-stubdom Build and install 
> ioemu-stubdom --enable-c-stubdom Build and install c-stubdom (default 
> is DISABLED) --enable-pv-grub Build and install pv-grub (default is 
> DISABLED) --disable-xenstore-stubdom @@ -1375,7 +1371,6 @@ Optional 
> Features: --enable-vtpm-stubdom Build and install vtpm-stubdom 
> --enable-vtpmmgr-stubdom Build and install vtpmmgr-stubdom - 
> --disable-debug Disable debug build of stubdom (default is ENABLED) 
> --disable-extfiles Use xen extfiles repository for libraries (default 
> is ENABLED) @@ -2411,40 +2406,6 @@ case $host_os in *\ *) host_os=`echo "$host_os" | sed 's/ /-/g'`;; esac
>   
>   # Enable/disable stub domains
>   
> -# Check whether --enable-ioemu-stubdom was given.
> -if test ${enable_ioemu_stubdom+y}
> -then :
> -  enableval=$enable_ioemu_stubdom;
> -
> -if test "x$enableval" = "xyes"
> -then :
> -
> -
> -ioemu=y
> -STUBDOM_TARGETS="$STUBDOM_TARGETS ioemu"
> -STUBDOM_BUILD="$STUBDOM_BUILD ioemu-stubdom"
> -STUBDOM_INSTALL="$STUBDOM_INSTALL install-ioemu"
> -STUBDOM_UNINSTALL="$STUBDOM_UNINSTALL install-ioemu"
> -
> -
> -else $as_nop
> -
> -if test "x$enableval" = "xno"
> -then :
> -
> -
> -ioemu=n
> -
> -
> -fi
> -
> -fi
> -
> -
> -fi
> -
> -
> -
>   # Check whether --enable-c-stubdom was given.
>   if test ${enable_c_stubdom+y}
>   then :
> @@ -2685,35 +2646,6 @@ fi
>   
>   
>   
> -# Check whether --enable-qemu-traditional was given.
> -if test ${enable_qemu_traditional+y}
> -then :
> -  enableval=$enable_qemu_traditional;
> -fi
> -
> -if test "x$enable_qemu_traditional" = "xyes"
> -then :
> -
> -    qemu_traditional=y
> -else $as_nop
> -
> -    qemu_traditional=n
> -
> -fi
> -if test "x$ioemu" = "x"
> -then :
> -
> -    ioemu=$qemu_traditional
> -
> -fi
> -echo "x$ioemu$qemu_traditional"
> -if test "x$ioemu$qemu_traditional" = "xyn"
> -then :
> -
> -    as_fn_error $? "IOEMU stubdomain requires qemu-traditional" "$LINENO" 5
> -
> -fi
> -
>   
>   # Check whether --enable-debug was given.
>   if test ${enable_debug+y}
> @@ -4358,27 +4290,6 @@ fi
>   
>   
>   
> -if test "x$ioemu" = "xy" || test "x$ioemu" = "x"
> -then :
> -
> -
> -ioemu=y
> -STUBDOM_TARGETS="$STUBDOM_TARGETS ioemu"
> -STUBDOM_BUILD="$STUBDOM_BUILD ioemu-stubdom"
> -STUBDOM_INSTALL="$STUBDOM_INSTALL install-ioemu"
> -STUBDOM_UNINSTALL="$STUBDOM_UNINSTALL install-ioemu"
> -
> -
> -else $as_nop
> -
> -
> -ioemu=n
> -
> -
> -fi
> -
> -
> -
>   
>   
>   
> diff --git a/stubdom/configure.ac b/stubdom/configure.ac
> index fc736c0387..f07b08c5b3 100644
> --- a/stubdom/configure.ac
> +++ b/stubdom/configure.ac
> @@ -18,7 +18,6 @@ m4_include([../m4/depends.m4])
>   m4_include([../m4/fetcher.m4])
>   
>   # Enable/disable stub domains
> -AX_STUBDOM_CONDITIONAL([ioemu-stubdom], [ioemu])
>   AX_STUBDOM_DEFAULT_DISABLE([c-stubdom], [c])
>   AX_STUBDOM_DEFAULT_DISABLE([pv-grub], [grub])
>   AX_STUBDOM_DEFAULT_ENABLE([xenstore-stubdom], [xenstore])
> @@ -26,19 +25,6 @@ AX_STUBDOM_DEFAULT_ENABLE([xenstorepvh-stubdom], [xenstorepvh])
>   AX_STUBDOM_CONDITIONAL([vtpm-stubdom], [vtpm])
>   AX_STUBDOM_CONDITIONAL([vtpmmgr-stubdom], [vtpmmgr])
>   
> -AC_ARG_ENABLE([qemu-traditional])
> -AS_IF([test "x$enable_qemu_traditional" = "xyes"], [
> -    qemu_traditional=y],[
> -    qemu_traditional=n
> -])
> -AS_IF([test "x$ioemu" = "x"], [
> -    ioemu=$qemu_traditional
> -])
> -echo "x$ioemu$qemu_traditional"
> -AS_IF([test "x$ioemu$qemu_traditional" = "xyn"], [
> -    AC_MSG_ERROR(IOEMU stubdomain requires qemu-traditional)
> -])
> -
>   AX_ARG_DEFAULT_ENABLE([debug], [Disable debug build of stubdom])
>   AX_ARG_DEFAULT_ENABLE([extfiles], [Use xen extfiles repository for libraries])
>   
> @@ -69,7 +55,6 @@ AX_STUBDOM_AUTO_DEPENDS([vtpmmgr], [vtpm])
>   #Conditionally enable these stubdoms based on the presense of dependencies
>   AX_STUBDOM_CONDITIONAL_FINISH([vtpm-stubdom], [vtpm])
>   AX_STUBDOM_CONDITIONAL_FINISH([vtpmmgr-stubdom], [vtpmmgr])
> -AX_STUBDOM_CONDITIONAL_FINISH([ioemu-stubdom], [ioemu])
>   
>   AX_STUBDOM_FINISH
>   AC_OUTPUT()
> diff --git a/stubdom/ioemu-minios.cfg b/stubdom/ioemu-minios.cfg
> deleted file mode 100644
> index 6153ae05f8..0000000000
> --- a/stubdom/ioemu-minios.cfg
> +++ /dev/null
> @@ -1,6 +0,0 @@
> -CONFIG_LIBC=y
> -CONFIG_LWIP=y
> -CONFIG_START_NETWORK=n
> -CONFIG_QEMU_XS_ARGS=y
> -CONFIG_PCIFRONT=y
> -XEN_INTERFACE_VERSION=__XEN_LATEST_INTERFACE_VERSION__
> diff --git a/tools/Makefile b/tools/Makefile
> index e9e1cda305..6ecf7c0da8 100644
> --- a/tools/Makefile
> +++ b/tools/Makefile
> @@ -24,7 +24,6 @@ SUBDIRS-$(CONFIG_Linux) += vchan
>   
>   # do not recurse in to a dir we are about to delete
>   ifneq "$(MAKECMDGOALS)" "distclean" -SUBDIRS-$(CONFIG_QEMU_TRAD) += qemu-xen-traditional-dir 
> SUBDIRS-$(CONFIG_QEMU_XEN) += qemu-xen-dir endif @@ -79,7 +78,6 @@ 
> clean: subdirs-clean .PHONY: distclean distclean: subdirs-distclean 
> clean - rm -rf qemu-xen-traditional-dir 
> qemu-xen-traditional-dir-remote rm -rf qemu-xen-dir 
> qemu-xen-dir-remote qemu-xen-build rm -rf ../config/Tools.mk config.h 
> config.log config.status \ config.cache autom4te.cache @@ -97,11 +95,6 
> @@ QEMU_UPSTREAM_RPATH := -Wl,-rpath,$(LIBEXEC_LIB) 
> IOEMU_EXTRA_LDFLAGS := endif -QEMU_ROOT := $(shell if [ -d "$(QEMU_TRADITIONAL_LOC)" ]; then echo "$(QEMU_TRADITIONAL_LOC)"; else echo .; fi)
> -ifneq ($(QEMU_ROOT),.)
> -export QEMU_ROOT
> -endif
> -
>   # Targets for external trees:
>   #  ${target}-dir-find
>   #    See if the directory exists and check it out if not.
> @@ -136,54 +129,6 @@ endif
>   #   ${TARGET}_LOC
>   #     The ultimate location of the source (either a local dir or remote URL)
>   
> -# External target: qemu-xen-traditional
> -qemu-xen-traditional-dir-find:
> -	set -ex; \
> -	if test -d $(QEMU_TRADITIONAL_LOC); then \
> -		mkdir -p qemu-xen-traditional-dir; \
> -	else \
> -		export GIT=$(GIT); \
> -		$(XEN_ROOT)/scripts/git-checkout.sh $(QEMU_TRADITIONAL_LOC) $(QEMU_TRADITIONAL_REVISION) qemu-xen-traditional-dir; \
> -	fi
> -
> -.PHONY: qemu-xen-traditional-dir-force-update
> -qemu-xen-traditional-dir-force-update: qemu-xen-traditional-dir-find
> -	set -ex; \
> -	if [ "$(QEMU_TRADITIONAL_REVISION)" ]; then \
> -		cd qemu-xen-traditional-dir-remote; \
> -		$(GIT) fetch origin; \
> -		$(GIT) reset --hard $(QEMU_TRADITIONAL_REVISION); \
> -	fi
> -
> -qemu-traditional-recurse = \
> -	set -e; \
> -		$(buildmakevars2shellvars); \
> -		export CONFIG_BLKTAP1=n; \
> -		export BUILDING_QEMU_TRAD=y; \
> -		cd qemu-xen-traditional-dir; \
> -		$(1)
> -
> -subdir-all-qemu-xen-traditional-dir: qemu-xen-traditional-dir-find
> -	$(call qemu-traditional-recurse,\
> -		$(QEMU_ROOT)/xen-setup \
> -		--extra-cflags="-D__XEN_TOOLS__ $(EXTRA_CFLAGS_QEMU_TRADITIONAL)" \
> -		$(IOEMU_EXTRA_LDFLAGS) \
> -		--cpu=$(IOEMU_CPU_ARCH) \
> -		$(IOEMU_CONFIGURE_CROSS); \
> -		$(MAKE) all \
> -	)
> -
> -subdir-install-qemu-xen-traditional-dir: subdir-all-qemu-xen-traditional-dir
> -	$(call qemu-traditional-recurse,$(MAKE) install)
> -
> -subdir-clean-qemu-xen-traditional-dir:
> -	set -e; if test -d qemu-xen-traditional-dir/.; then \
> -		$(MAKE) -C qemu-xen-traditional-dir clean; \
> -	fi
> -subdir-uninstall-qemu-xen-traditional-dir:
> -	rm -f $(D)$(bindir)/qemu-nbd*
> -	rm -f $(D)$(bindir)/qemu-img*
> -
>   # External target: qemu-xen
>   qemu-xen-dir-find:
>   	if test -d $(QEMU_UPSTREAM_LOC) ; then \
> @@ -276,9 +221,6 @@ subtree-force-update:
>   ifeq ($(CONFIG_QEMU_XEN),y)
>   	$(MAKE) qemu-xen-dir-force-update
>   endif
> -ifeq ($(CONFIG_QEMU_TRAD),y)
> -	$(MAKE) qemu-xen-traditional-dir-force-update
> -endif
>   ifeq ($(CONFIG_X86),y)
>   	$(MAKE) -C firmware subtree-force-update
>   endif
> diff --git a/tools/Rules.mk b/tools/Rules.mk
> index 6bd636709f..725c3c32e9 100644
> --- a/tools/Rules.mk
> +++ b/tools/Rules.mk
> @@ -134,12 +134,9 @@ endif
>   
>   CFLAGS_libxenlight += $(CFLAGS_libxenctrl)
>   
> -# Don't add -Werror if we are used by qemu-trad build system.
> -ifndef BUILDING_QEMU_TRAD
>   ifeq ($(CONFIG_WERROR),y)
>   CFLAGS += -Werror
>   endif
> -endif
>   
>   ifeq ($(debug),y)
>   # Use -Og if available, -O0 otherwise
> diff --git a/tools/config.h.in b/tools/config.h.in
> index 0bab3cb136..fe2a94cfc4 100644
> --- a/tools/config.h.in
> +++ b/tools/config.h.in
> @@ -42,9 +42,6 @@
>   /* pygrub enabled */
>   #undef HAVE_PYGRUB
>   
> -/* Qemu traditional enabled */
> -#undef HAVE_QEMU_TRADITIONAL
> -
>   /* ROMBIOS enabled */
>   #undef HAVE_ROMBIOS
>   
> diff --git a/tools/configure b/tools/configure
> index e1f6ea6bf5..27ae7c52fb 100755
> --- a/tools/configure
> +++ b/tools/configure
> @@ -726,7 +726,6 @@ BCC
>   LD86
>   AS86
>   ipxe
> -qemu_traditional
>   LINUX_BACKEND_MODULES
>   pygrub
>   golang
> @@ -835,7 +834,6 @@ enable_seabios
>   enable_golang
>   enable_pygrub
>   with_linux_backend_modules
> -enable_qemu_traditional
>   enable_ipxe
>   with_system_ipxe
>   enable_rombios
> @@ -1518,13 +1516,10 @@ Optional Features:
>     --disable-seabios       Disable SeaBIOS (default is ENABLED)
>     --disable-golang        Disable Go tools (default is ENABLED)
>     --disable-pygrub        Disable pygrub (default is ENABLED)
> -  --enable-qemu-traditional
> -                          Enable qemu traditional device model, (DEFAULT is
> -                          off)
>     --enable-ipxe           Enable in-tree IPXE, (DEFAULT is off, see also
>                             --with-system-ipxe)
> -  --enable-rombios        Enable ROMBIOS, (DEFAULT is on if qemu-traditional
> -                          or ipxe is enabled, otherwise off)
> +  --enable-rombios        Enable ROMBIOS, (DEFAULT is on if ipxe is enabled,
> +                          otherwise off)
>     --enable-libfsimage     Enable libfsimage, (DEFAULT is on if pygrub is
>                             enabled, otherwise off)
>     --enable-systemd        Enable systemd support (default is DISABLED)
> @@ -4838,45 +4833,16 @@ fi
>   LINUX_BACKEND_MODULES="`eval echo $LINUX_BACKEND_MODULES`"
>   
>   
> -# Check whether --enable-qemu-traditional was given.
> -if test ${enable_qemu_traditional+y}
> -then :
> -  enableval=$enable_qemu_traditional;
> -fi
> -
> -if test "x$enable_qemu_traditional" = "xyes"
> -then :
> -
> -
> -printf "%s\n" "#define HAVE_QEMU_TRADITIONAL 1" >>confdefs.h
> -
> -    qemu_traditional=y
> -else $as_nop
> -
> -    qemu_traditional=n
> -
> -fi
> -
> -
>   # Check whether --enable-ipxe was given.
>   if test ${enable_ipxe+y}
>   then :
>     enableval=$enable_ipxe;
> -else $as_nop
> -
> -    if test "x$enable_qemu_traditional" = "xyes"
> -then :
> -
> -        enable_ipxe="yes"
> -
>   else $as_nop
>   
>           enable_ipxe="no"
>   
>   fi
>   
> -fi
> -
>   if test "x$enable_ipxe" = "xno"
>   then :
>     ipxe=n
> @@ -4912,7 +4878,7 @@ then :
>     enableval=$enable_rombios;
>   else $as_nop
>   
> -    if test "x$enable_qemu_traditional" = "xyes" -o "x$enable_ipxe" = "xyes"
> +    if test "x$enable_ipxe" = "xyes"
>   then :
>   
>           enable_rombios="yes"
> @@ -4928,7 +4894,7 @@ fi
>   if test "x$enable_rombios" = "xyes"
>   then :
>   
> -                # Extract the first word of "as86", so it can be a program name with args.
> +    # Extract the first word of "as86", so it can be a program name with args.
>   set dummy as86; ac_word=$2
>   { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
>   printf %s "checking for $ac_word... " >&6; }
> diff --git a/tools/configure.ac b/tools/configure.ac
> index 0dd6d747ab..dada1c3b15 100644
> --- a/tools/configure.ac
> +++ b/tools/configure.ac
> @@ -121,25 +121,11 @@ esac])
>   LINUX_BACKEND_MODULES="`eval echo $LINUX_BACKEND_MODULES`"
>   AC_SUBST(LINUX_BACKEND_MODULES)
>   
> -AC_ARG_ENABLE([qemu-traditional],
> -    AS_HELP_STRING([--enable-qemu-traditional],
> -                   [Enable qemu traditional device model, (DEFAULT is off)]))
> -AS_IF([test "x$enable_qemu_traditional" = "xyes"], [
> -AC_DEFINE([HAVE_QEMU_TRADITIONAL], [1], [Qemu traditional enabled])
> -    qemu_traditional=y],[
> -    qemu_traditional=n
> -])
> -AC_SUBST(qemu_traditional)
> -
>   AC_ARG_ENABLE([ipxe],
>       AS_HELP_STRING([--enable-ipxe],
>                      [Enable in-tree IPXE,
>                       (DEFAULT is off, see also --with-system-ipxe)]),,[
> -    AS_IF([test "x$enable_qemu_traditional" = "xyes"], [
> -        enable_ipxe="yes"
> -    ], [
>           enable_ipxe="no"
> -    ])
>   ])
>   AS_IF([test "x$enable_ipxe" = "xno"], [ipxe=n], [ipxe=y])
>   AC_ARG_WITH([system-ipxe],
> @@ -162,18 +148,15 @@ AC_SUBST(ipxe)
>   
>   AC_ARG_ENABLE([rombios],
>       AS_HELP_STRING([--enable-rombios],
> -                   [Enable ROMBIOS, (DEFAULT is on if qemu-traditional or ipxe is enabled,
> +                   [Enable ROMBIOS, (DEFAULT is on if ipxe is enabled,
>                       otherwise off)]),,[
> -    AS_IF([test "x$enable_qemu_traditional" = "xyes" -o "x$enable_ipxe" = "xyes"], [
> +    AS_IF([test "x$enable_ipxe" = "xyes"], [
>           enable_rombios="yes"
>       ], [
>           enable_rombios="no"
>       ])
>   ])
>   AS_IF([test "x$enable_rombios" = "xyes"], [
> -    dnl as86, ld86, and bcc are only required when building rombios. They
> -    dnl are only needed when the host system is x86 but that check is done
> -    dnl for us above when checking if we should build with qemu-traditional.
>       AX_PATH_PROG_OR_FAIL([AS86], [as86])
>       AX_PATH_PROG_OR_FAIL([LD86], [ld86])
>       AX_PATH_PROG_OR_FAIL([BCC], [bcc])
--------------3N15kRSEuV40hOF0dij5S8hz
Content-Type: text/html; charset=UTF-8
Content-Transfer-Encoding: quoted-printable



  
    
  
  
    


    

    
On 4/8/25 2:35 PM, Juergen Gross wrote=
:

    

    

      
Remove qemu traditional from=
 the tree.

Signed-off-by: Juergen Gross <jgross@suse.com>
---
 .gitignore                                    |  3 -
 CHANGELOG.md                                  |  1 +

    

    
For CHANGELOG.md changes LGTM: Acked-by: Oleksii Kurochko &=
lt;oleksii.kurochko@gmail.com>

~ Oleksii


    

      
 Config.mk                                     | 24 -----
 INSTALL                                       | 12 ---
 MAINTAINERS                                   |  4 -
 README                                        |  2 +-
 SUPPORT.md                                    | 16 ----
 config/Tools.mk.in                            |  1 -
 docs/process/branching-checklist.txt          |  1 -
 docs/process/release-technician-checklist.txt |  1 -
 stubdom/Makefile                              | 84 +----------------
 stubdom/configure                             | 89 -------------------
 stubdom/configure.ac                          | 15 ----
 stubdom/ioemu-minios.cfg                      |  6 --
 tools/Makefile                                | 58 ------------
 tools/Rules.mk                                |  3 -
 tools/config.h.in                             |  3 -
 tools/configure                               | 42 +--------
 tools/configure.ac                            | 21 +----
 19 files changed, 10 insertions(+), 376 deletions(-)
 delete mode 100644 stubdom/ioemu-minios.cfg

diff --git a/.gitignore b/.gitignore
index 53f5df0003..ccc0bebee6 100644
--- a/.gitignore
+++ b/.gitignore
@@ -255,9 +255,6 @@ LibVNCServer*
 tools/qemu-xen-dir-remote
 tools/qemu-xen-dir
=20
-tools/qemu-xen-traditional-dir-remote
-tools/qemu-xen-traditional-dir
-
 tools/firmware/seabios-dir-remote
 tools/firmware/seabios-dir
=20
diff --git a/CHANGELOG.md b/CHANGELOG.md
index ce4fcf2feb..d150b9fa1b 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -21,6 +21,7 @@ The format is based on [Keep a Changelog](https=
://keepachangelog.com/en/1.0.0/)
    - Smoke tests for the FreeBSD Xen builds in Cirrus CI.
=20
 ### Removed
+ - Support of qemu-traditional has been removed.
=20
 ## [4.20.0](https:=
//xenbits.xenproject.org/gitweb/?p=3Dxen.git;a=3Dshortlog;h=3DRELEASE-4.2=
0.0) - 2025-03-05
=20
diff --git a/Config.mk b/Config.mk
index 8be7733d9e..d61257a286 100644
--- a/Config.mk
+++ b/Config.mk
@@ -208,22 +208,12 @@ XEN_EXTFILES_URL ?=3D https://xenbits.xen.o=
rg/xen-extfiles
=20
 # Where to look for inlined subtrees (for example, from a tarball)
 QEMU_UPSTREAM_INTREE ?=3D $(XEN_ROOT)/tools/qemu-xen
-QEMU_TRADITIONAL_INTREE ?=3D $(XEN_ROOT)/tools/qemu-xen-traditional
=20
=20
 # Handle legacy options
 ifneq (,$(SEABIOS_UPSTREAM_TAG))
 SEABIOS_UPSTREAM_REVISION ?=3D $(SEABIOS_UPSTREAM_TAG)
 endif
-ifneq (,$(QEMU_REMOTE))
-QEMU_TRADITIONAL_URL ?=3D $(QEMU_REMOTE)
-endif
-ifneq (,$(CONFIG_QEMU))
-QEMU_TRADITIONAL_LOC ?=3D $(CONFIG_QEMU)
-endif
-ifneq (,$(QEMU_TAG))
-QEMU_TRADITIONAL_REVISION ?=3D $(QEMU_TAG)
-endif
=20
 OVMF_UPSTREAM_URL ?=3D https://xenbits.xen.org/git-http/ovm=
f.git
 OVMF_UPSTREAM_REVISION ?=3D ba91d0292e593df8528b66f99c1b0b14fadc8e16
@@ -239,20 +229,6 @@ SEABIOS_UPSTREAM_REVISION ?=3D rel-1.16.3
=20
 ETHERBOOT_NICS ?=3D rtl8139 8086100e
=20
-
-QEMU_TRADITIONAL_URL ?=3D https://xenbits.x=
en.org/git-http/qemu-xen-traditional.git
-QEMU_TRADITIONAL_REVISION ?=3D 3d273dd05e51e5a1ffba3d98c7437ee84e8f8764
-# Wed Jul 15 10:01:40 2020 +0100
-# qemu-trad: remove Xen path dependencies
-
-# Specify which qemu-dm to use. This may be `ioemu' to use the old
-# Mercurial in-tree version, or a local directory, or a git URL.
-# QEMU_UPSTREAM_LOC ?=3D `pwd`/$(XEN_ROOT)/../qemu-xen.git
-
-# Defaults for subtree locations
-QEMU_TRADITIONAL_LOC ?=3D $(call or,$(wildcard $(QEMU_TRADITIONAL_INTREE=
)),\
-                                  $(QEMU_TRADITIONAL_URL))
-
 QEMU_UPSTREAM_LOC ?=3D $(call or,$(wildcard $(QEMU_UPSTREAM_INTREE)),\
                                $(QEMU_UPSTREAM_URL))
=20
diff --git a/INSTALL b/INSTALL
index 88c1464816..786e3da996 100644
--- a/INSTALL
+++ b/INSTALL
@@ -113,15 +113,6 @@ Build a private copy of SeaBIOS.
 Use the given SeaBIOS binary instead of compiling a private copy.
   --with-system-seabios=3DPATH
=20
-Build the old qemu used by xm/xend. This is required if existing domUs
-should be migrated to this host, or if existing domU snapshots should be=

-started with this version of the tools. Only if all domUs used the new
-upstream qemu during initial start it is safe to disable this option.
-The old qemu requires rombios, which can be disable along with
-qemu-traditional.
-  --enable-qemu-traditional
-  --enable-rombios
-
 The libxl toolstack uses the upstream qemu per default. A private copy
 will be built. If desired this private copy can be configured with
 additional options passed to its configure script.
@@ -245,7 +236,6 @@ locations.
 XEN_EXTFILES_URL=3D
 OVMF_UPSTREAM_URL=3D
 QEMU_UPSTREAM_URL=3D
-QEMU_TRADITIONAL_URL=3D
 SEABIOS_UPSTREAM_URL=3D
 MINIOS_UPSTREAM_URL=3D
=20
@@ -253,7 +243,6 @@ Using additional CFLAGS to build tools which will run=
 in dom0 is
 required when building distro packages. These variables can be used to
 pass RPM_OPT_FLAGS.
 EXTRA_CFLAGS_XEN_TOOLS=3D
-EXTRA_CFLAGS_QEMU_TRADITIONAL=3D
 EXTRA_CFLAGS_QEMU_XEN=3D
=20
 Additional CFLAGS may be supplied to the build of the hypervisor by
@@ -340,7 +329,6 @@ sudo make install BOOT_DIR=3D/ood/path/boot EFI_DIR=3D=
/odd/path/efi
 export WGET=3D$(type -P false)
 export GIT=3D$(type -P false)
 export EXTRA_CFLAGS_XEN_TOOLS=3D"$RPM_OPT_FLAGS"
-export EXTRA_CFLAGS_QEMU_TRADITIONAL=3D"$RPM_OPT_FLAGS"
 export EXTRA_CFLAGS_QEMU_XEN=3D"$RPM_OPT_FLAGS"
 %configure \
         --with-initddir=3D%{_initddir}
diff --git a/MAINTAINERS b/MAINTAINERS
index c11b82eca9..7d1b3b8641 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -466,10 +466,6 @@ M:	Marek Marczykowski-G=C3=B3recki <mar=
marek@invisiblethingslab.com>
 S:	Supported
 F:	tools/python
=20
-QEMU-DM
-S:	Supported
-T:	git https://xenbits.xenproject.or=
g/git-http/qemu-xen-traditional.git
-
 QEMU UPSTREAM
 M:	Stefano Stabellini <sstabellini@kernel.org>
 M:	Anthony Perard <anthony.perard@vates.tech>
diff --git a/README b/README
index be90be3910..6ee58f7b35 100644
--- a/README
+++ b/README
@@ -80,7 +80,7 @@ disabled at compile time:
       libnl-3-dev, etc).  Required if network buffering is desired
       when using Remus with libxl.  See docs/README.remus for detailed
       information.
-    * 16-bit x86 assembler, loader and compiler for qemu-traditional / r=
ombios
+    * 16-bit x86 assembler, loader and compiler for rombios
       (dev86 rpm or bin86 & bcc debs)
     * Development install of liblzma for rombios
     * Development install of libbz2, liblzma, liblzo2, and libzstd for D=
omU
diff --git a/SUPPORT.md b/SUPPORT.md
index e8fd0c251e..5eecf1dcbc 100644
--- a/SUPPORT.md
+++ b/SUPPORT.md
@@ -998,21 +998,6 @@ See the section **Blkback** for image formats suppor=
ted by QEMU.
=20
     Status: Supported, not security supported
=20
-### qemu-xen-traditional ###
-
-The Xen Project provides an old version of qemu with modifications
-which enable use as a device model stub domain.  The old version is
-normally selected by default only in a stub dm configuration, but it
-can be requested explicitly in other configurations, for example in
-`xl` with `device_model_version=3D"QEMU_XEN_TRADITIONAL"`.
-
-    Status, Device Model Stub Domains: Supported, with caveats
-    Status, as host process device model: No security support, not recom=
mended
-
-qemu-xen-traditional is security supported only for those available
-devices which are supported for mainstream QEMU (see above), with
-trusted driver domains (see Device Model Stub Domains).
-
 ## Virtual Firmware
=20
 ### x86/HVM iPXE
@@ -1031,7 +1016,6 @@ as the guest itself.
 Booting a guest via guest BIOS firmware
=20
     Status, SeaBIOS (qemu-xen): Supported
-    Status, ROMBIOS (qemu-xen-traditional): Supported
=20
 ### x86/HVM OVMF
=20
diff --git a/config/Tools.mk.in b/config/Tools.mk.in
index 37c071961e..463ab75965 100644
--- a/config/Tools.mk.in
+++ b/config/Tools.mk.in
@@ -43,7 +43,6 @@ CONFIG_OVMF         :=3D @ovmf@
 CONFIG_ROMBIOS      :=3D @rombios@
 CONFIG_SEABIOS      :=3D @seabios@
 CONFIG_IPXE         :=3D @ipxe@
-CONFIG_QEMU_TRAD    :=3D @qemu_traditional@
 CONFIG_QEMU_XEN     :=3D @qemu_xen@
 CONFIG_QEMUU_EXTRA_ARGS:=3D @EXTRA_QEMUU_CONFIGURE_ARGS@
 CONFIG_LIBNL        :=3D @libnl@
diff --git a/docs/process/branching-checklist.txt b/docs/process/branchin=
g-checklist.txt
index aa7a27eed5..9632888a56 100644
--- a/docs/process/branching-checklist.txt
+++ b/docs/process/branching-checklist.txt
@@ -71,7 +71,6 @@ ov=3D4.0
 Ensure references to qemu trees and Mini-OS in xen.git's Config.mk are u=
pdated.
 The variables and there content should be:
   * QEMU_UPSTREAM_REVISION: qemu-xen-X.Y.0
-  * QEMU_TRADITIONAL_REVISION: xen-X.Y.0
   * MINIOS_UPSTREAM_REVISION: xen-RELEASE-X.Y.0
 Where X.Y is the release version (e.g. 4.17).
=20
diff --git a/docs/process/release-technician-checklist.txt b/docs/process=
/release-technician-checklist.txt
index 829e8ec47b..64ed9fd5b2 100644
--- a/docs/process/release-technician-checklist.txt
+++ b/docs/process/release-technician-checklist.txt
@@ -56,7 +56,6 @@ t=3DRELEASE-$r
=20
 * change xen-unstable Config.mk
 #   QEMU_UPSTREAM_REVISION,
-#   QEMU_TRADITIONAL_REVISION
 #   MINIOS_UPSTREAM_REVISION
 #     (drop any references to the specific commits, e.g. date or title)
 * change SUPPORT.md heading version number; -unstable or -rc tag
diff --git a/stubdom/Makefile b/stubdom/Makefile
index 724ce40365..82fc1e90f8 100644
--- a/stubdom/Makefile
+++ b/stubdom/Makefile
@@ -7,7 +7,6 @@ export PKG_CONFIG_DIR =3D $(CURDIR)/pkg-config
=20
 # Remove flags which are meant for tools, e.g. "-m64"
 export EXTRA_CFLAGS_XEN_TOOLS=3D
-export EXTRA_CFLAGS_QEMU_TRADITIONAL=3D
=20
 export stubdom=3Dy
 export debug=3Dy
@@ -267,43 +266,6 @@ cross-tpmemu: $(TPMEMU_STAMPFILE)
 .PHONY: $(CROSS_ROOT)
 $(CROSS_ROOT): cross-newlib cross-zlib cross-libpci
=20
-QEMU_ROOT :=3D $(shell if [ -d "$(QEMU_TRADITIONAL_LOC)" ]; then echo "$=
(QEMU_TRADITIONAL_LOC)"; else echo .; fi)
-
-ifneq ($(filter ioemu,$(STUBDOM_TARGETS)),)
-IOEMU_LINKFARM_TARGET :=3D ioemu/linkfarm.stamp
-endif
-
-ifeq ($(QEMU_ROOT),.)
-$(XEN_ROOT)/tools/qemu-xen-traditional-dir:
-	$(MAKE) DESTDIR=3D -C $(XEN_ROOT)/tools qemu-xen-traditional-dir-find
-
-ioemu/linkfarm.stamp: $(XEN_ROOT)/tools/qemu-xen-traditional-dir
-	mkdir -p ioemu
-	set -e;									\
-	$(buildmakevars2shellvars);						\
-	cd ioemu;								\
-	src=3D"$$XEN_ROOT/tools/qemu-xen-traditional-dir"; export src;		\
-	(cd $$src && find * -type d						\
-		$(addprefix ! -path , '*-softmmu*' '*-linux-user*') -print)	\
-		| xargs mkdir -p;						\
-	(cd $$src && find *	! -type l  -type f  $(addprefix ! -path ,	\=

-			'*.[oda1]' 'config-*' config.mak qemu-dm qemu-img-xen	\
-			'*.html' '*.pod' '*-softmmu*' '*-linux-user*'		\
-			)) >linkfarm.stamp.tmp;				\
-	cmp -s linkfarm.stamp.tmp linkfarm.stamp &&			\
-		rm linkfarm.stamp.tmp || {				\
-		mv linkfarm.stamp.tmp linkfarm.stamp;			\
-		cat linkfarm.stamp | while read f;			\
-			do rm -f "$$f"; ln -s "$$src/$$f" "$$f"; done;	\
-	}
-else
-export QEMU_ROOT
-
-ioemu/linkfarm.stamp:
-	mkdir -p ioemu
-	touch ioemu/linkfarm.stamp
-endif
-
 #######
 # libraries under tools/libs
 #######
@@ -380,29 +342,6 @@ $(TARGETS_MINIOS): mini-os-%:
                 mkdir -p $@/$$i ; \
 	done
=20
-#######
-# ioemu
-#######
-
-ioemu-minios.gen.cfg: APP_LIBS =3D evtchn gnttab ctrl guest
-ioemu-minios.gen.cfg: ioemu-minios.cfg Makefile
-	$(GEN_config) >$@
-
-ioemu-minios-config.mk: ioemu-minios.gen.cfg
-	MINIOS_CONFIG=3D"$(CURDIR)/$<" CONFIG_FILE=3D"$(CURDIR)/$@" $(MAKE) =
DESTDIR=3D -C $(MINI_OS) config
-
-.PHONY: ioemu
-ioemu: cross-zlib cross-libpci libxenguest ioemu-minios-config.mk
-	[ -f ioemu/config-host.mak ] || \
-	  ( $(buildmakevars2shellvars); \
-	    cd ioemu ; \
-	    LWIPDIR=3D$(CURDIR)/lwip-$(XEN_TARGET_ARCH) \
-	    TARGET_CPPFLAGS=3D"$(TARGET_CPPFLAGS) $(shell cat ioemu-minios-conf=
ig.mk)" \
-	    TARGET_CFLAGS=3D"$(TARGET_CFLAGS)" \
-	    TARGET_LDFLAGS=3D"$(TARGET_LDFLAGS)" \
-	    $(QEMU_ROOT)/xen-setup-stubdom )
-	$(MAKE) DESTDIR=3D -C ioemu -f $(QEMU_ROOT)/Makefile
-
 ###
 # C
 ###
@@ -496,11 +435,6 @@ xenstorepvh: $(CROSS_ROOT) xenstorepvh-minios-config=
=2Emk
 # minios
 ########
=20
-.PHONY: ioemu-stubdom
-ioemu-stubdom: APP_OBJS=3D$(CURDIR)/ioemu/i386-stubdom/qemu.a $(CURDIR)/=
ioemu/i386-stubdom/libqemu.a $(CURDIR)/ioemu/libqemu_common.a
-ioemu-stubdom: mini-os-$(XEN_TARGET_ARCH)-ioemu lwip-$(XEN_TARGET_ARCH) =
libxenguest ioemu
-	DEF_CPPFLAGS=3D"$(TARGET_CPPFLAGS)" DEF_CFLAGS=3D"$(TARGET_CFLAGS)" DEF=
_LDFLAGS=3D"$(TARGET_LDFLAGS)" MINIOS_CONFIG=3D"$(CURDIR)/ioemu-minios.ge=
n.cfg" $(MAKE) DESTDIR=3D -C $(MINI_OS) OBJ_DIR=3D$(CURDIR)/$< LWIPDIR=
=3D$(CURDIR)/lwip-$(XEN_TARGET_ARCH) APP_OBJS=3D"$(APP_OBJS)"
-
 .PHONY: c-stubdom
 c-stubdom: mini-os-$(XEN_TARGET_ARCH)-c lwip-$(XEN_TARGET_ARCH) libxengu=
est c
 	DEF_CPPFLAGS=3D"$(TARGET_CPPFLAGS)" DEF_CFLAGS=3D"$(TARGET_CFLAGS)" DEF=
_LDFLAGS=3D"$(TARGET_LDFLAGS)" MINIOS_CONFIG=3D"$(CURDIR)/c/minios.cfg" $=
(MAKE) DESTDIR=3D -C $(MINI_OS) OBJ_DIR=3D$(CURDIR)/$< LWIPDIR=3D$(CUR=
DIR)/lwip-$(XEN_TARGET_ARCH) APP_OBJS=3D$(CURDIR)/c/main.a
@@ -544,13 +478,6 @@ else
 install: $(STUBDOMPATH)
 endif
=20
-install-ioemu: ioemu-stubdom
-	$(INSTALL_DIR) "$(DESTDIR)$(LIBEXEC_BIN)"
-	$(INSTALL_PROG) stubdom-dm "$(DESTDIR)$(LIBEXEC_BIN)"
-	$(INSTALL_DATA) stubdompath.sh "$(DESTDIR)$(LIBEXEC_BIN)"
-	$(INSTALL_DIR) "$(DESTDIR)$(XENFIRMWAREDIR)"
-	$(INSTALL_DATA) mini-os-$(XEN_TARGET_ARCH)-ioemu/mini-os.gz "$(DESTDIR)=
$(XENFIRMWAREDIR)/ioemu-stubdom.gz"
-
 install-grub: pv-grub
 	$(INSTALL_DIR) "$(DESTDIR)$(XENFIRMWAREDIR)"
 	$(INSTALL_DATA) mini-os-$(XEN_TARGET_ARCH)-grub/mini-os.gz "$(DESTDIR)$=
(XENFIRMWAREDIR)/pv-grub-$(XEN_TARGET_ARCH).gz"
@@ -593,11 +520,6 @@ else
 uninstall:
 endif
=20
-uninstall-ioemu:
-	rm -f $(DESTDIR)$(LIBEXEC_BIN)/stubdom-dm
-	rm -f $(DESTDIR)$(LIBEXEC_BIN)/stubdompath.sh
-	rm -f $(DESTDIR)$(XENFIRMWAREDIR)/ioemu-stubdom.gz
-
 uninstall-grub:
 	rm -f $(DESTDIR)$(XENFIRMWAREDIR)/pv-grub-$(XEN_TARGET_ARCH).gz
=20
@@ -617,11 +539,10 @@ uninstall-vtpmmgr:
 # clean
 #######
=20
-# Only clean the libxc/ioemu/mini-os part
+# Only clean the libxc/mini-os part
 .PHONY: clean
 clean: $(foreach lib,$(STUB_LIBS),clean-libxen$(lib))
 clean:
-	rm -fr mini-os-$(XEN_TARGET_ARCH)-ioemu
 	rm -fr mini-os-$(XEN_TARGET_ARCH)-c
 	rm -fr mini-os-$(XEN_TARGET_ARCH)-grub
 	rm -fr mini-os-$(XEN_TARGET_ARCH)-xenstore
@@ -636,7 +557,6 @@ clean:
 	rm -f *-minios-config.mk
 	rm -f *.gen.cfg
 	rm -fr pkg-config
-	-[ ! -d ioemu ] || $(MAKE) DESTDIR=3D -C ioemu clean
 	-[ ! -d xenstore ] || $(MAKE) -f $(CURDIR)/xenlibs.mk -C xenstore clean=

 	-[ ! -d xenstorepvh ] || $(MAKE) -f $(CURDIR)/xenlibs.mk -C xenstorepvh=
 clean
=20
@@ -647,7 +567,7 @@ crossclean: clean
 	rm -fr newlib-$(XEN_TARGET_ARCH)
 	rm -fr zlib-$(XEN_TARGET_ARCH) pciutils-$(XEN_TARGET_ARCH)
 	rm -fr libs-$(XEN_TARGET_ARCH)
-	rm -fr ioemu xenstore xenstorepvh
+	rm -fr xenstore xenstorepvh
 	rm -fr gmp-$(XEN_TARGET_ARCH)
 	rm -fr polarssl-$(XEN_TARGET_ARCH)
 	rm -fr tpm_emulator-$(XEN_TARGET_ARCH)
diff --git a/stubdom/configure b/stubdom/configure
index 08cacf764c..9dd0e7c796 100755
--- a/stubdom/configure
+++ b/stubdom/configure
@@ -622,7 +622,6 @@ STUBDOM_UNINSTALL
 STUBDOM_INSTALL
 STUBDOM_BUILD
 STUBDOM_TARGETS
-ioemu
 vtpmmgr
 vtpm
 TPMEMU_VERSION
@@ -713,14 +712,12 @@ SHELL'
 ac_subst_files=3D''
 ac_user_opts=3D'
 enable_option_checking
-enable_ioemu_stubdom
 enable_c_stubdom
 enable_pv_grub
 enable_xenstore_stubdom
 enable_xenstorepvh_stubdom
 enable_vtpm_stubdom
 enable_vtpmmgr_stubdom
-enable_qemu_traditional
 enable_debug
 enable_extfiles
 '
@@ -1363,7 +1360,6 @@ Optional Features:
   --disable-option-checking  ignore unrecognized --enable/--with options=

   --disable-FEATURE       do not include FEATURE (same as --enable-FEATU=
RE=3Dno)
   --enable-FEATURE[=3DARG]  include FEATURE [ARG=3Dyes]
-  --enable-ioemu-stubdom  Build and install ioemu-stubdom
   --enable-c-stubdom      Build and install c-stubdom (default is DISABL=
ED)
   --enable-pv-grub        Build and install pv-grub (default is DISABLED=
)
   --disable-xenstore-stubdom
@@ -1375,7 +1371,6 @@ Optional Features:
   --enable-vtpm-stubdom   Build and install vtpm-stubdom
   --enable-vtpmmgr-stubdom
                           Build and install vtpmmgr-stubdom
-
   --disable-debug         Disable debug build of stubdom (default is ENA=
BLED)
   --disable-extfiles      Use xen extfiles repository for libraries (def=
ault
                           is ENABLED)
@@ -2411,40 +2406,6 @@ case $host_os in *\ *) host_os=3D`echo "$host_=
os" | sed 's/ /-/g'`;; esac
=20
 # Enable/disable stub domains
=20
-# Check whether --enable-ioemu-stubdom was given.
-if test ${enable_ioemu_stubdom+y}
-then :
-  enableval=3D$enable_ioemu_stubdom;
-
-if test "x$enableval" =3D "xyes"
-then :
-
-
-ioemu=3Dy
-STUBDOM_TARGETS=3D"$STUBDOM_TARGETS ioemu"
-STUBDOM_BUILD=3D"$STUBDOM_BUILD ioemu-stubdom"
-STUBDOM_INSTALL=3D"$STUBDOM_INSTALL install-ioemu"
-STUBDOM_UNINSTALL=3D"$STUBDOM_UNINSTALL install-ioemu"
-
-
-else $as_nop
-
-if test "x$enableval" =3D "xno"
-then :
-
-
-ioemu=3Dn
-
-
-fi
-
-fi
-
-
-fi
-
-
-
 # Check whether --enable-c-stubdom was given.
 if test ${enable_c_stubdom+y}
 then :
@@ -2685,35 +2646,6 @@ fi
=20
=20
=20
-# Check whether --enable-qemu-traditional was given.
-if test ${enable_qemu_traditional+y}
-then :
-  enableval=3D$enable_qemu_traditional;
-fi
-
-if test "x$enable_qemu_traditional" =3D "xyes"
-then :
-
-    qemu_traditional=3Dy
-else $as_nop
-
-    qemu_traditional=3Dn
-
-fi
-if test "x$ioemu" =3D "x"
-then :
-
-    ioemu=3D$qemu_traditional
-
-fi
-echo "x$ioemu$qemu_traditional"
-if test "x$ioemu$qemu_traditional" =3D "xyn"
-then :
-
-    as_fn_error $? "IOEMU stubdomain requires qemu-traditional" "$LINENO=
" 5
-
-fi
-
=20
 # Check whether --enable-debug was given.
 if test ${enable_debug+y}
@@ -4358,27 +4290,6 @@ fi
=20
=20
=20
-if test "x$ioemu" =3D "xy" || test "x$ioemu" =3D "x"
-then :
-
-
-ioemu=3Dy
-STUBDOM_TARGETS=3D"$STUBDOM_TARGETS ioemu"
-STUBDOM_BUILD=3D"$STUBDOM_BUILD ioemu-stubdom"
-STUBDOM_INSTALL=3D"$STUBDOM_INSTALL install-ioemu"
-STUBDOM_UNINSTALL=3D"$STUBDOM_UNINSTALL install-ioemu"
-
-
-else $as_nop
-
-
-ioemu=3Dn
-
-
-fi
-
-
-
=20
=20
=20
diff --git a/stubdom/configure.ac b/stubdom/configure.ac
index fc736c0387..f07b08c5b3 100644
--- a/stubdom/configure.ac
+++ b/stubdom/configure.ac
@@ -18,7 +18,6 @@ m4_include([../m4/depends.m4])
 m4_include([../m4/fetcher.m4])
=20
 # Enable/disable stub domains
-AX_STUBDOM_CONDITIONAL([ioemu-stubdom], [ioemu])
 AX_STUBDOM_DEFAULT_DISABLE([c-stubdom], [c])
 AX_STUBDOM_DEFAULT_DISABLE([pv-grub], [grub])
 AX_STUBDOM_DEFAULT_ENABLE([xenstore-stubdom], [xenstore])
@@ -26,19 +25,6 @@ AX_STUBDOM_DEFAULT_ENABLE([xenstorepvh-stubdom], [xens=
torepvh])
 AX_STUBDOM_CONDITIONAL([vtpm-stubdom], [vtpm])
 AX_STUBDOM_CONDITIONAL([vtpmmgr-stubdom], [vtpmmgr])
=20
-AC_ARG_ENABLE([qemu-traditional])
-AS_IF([test "x$enable_qemu_traditional" =3D "xyes"], [
-    qemu_traditional=3Dy],[
-    qemu_traditional=3Dn
-])
-AS_IF([test "x$ioemu" =3D "x"], [
-    ioemu=3D$qemu_traditional
-])
-echo "x$ioemu$qemu_traditional"
-AS_IF([test "x$ioemu$qemu_traditional" =3D "xyn"], [
-    AC_MSG_ERROR(IOEMU stubdomain requires qemu-traditional)
-])
-
 AX_ARG_DEFAULT_ENABLE([debug], [Disable debug build of stubdom])
 AX_ARG_DEFAULT_ENABLE([extfiles], [Use xen extfiles repository for libra=
ries])
=20
@@ -69,7 +55,6 @@ AX_STUBDOM_AUTO_DEPENDS([vtpmmgr], [vtpm])
 #Conditionally enable these stubdoms based on the presense of dependenci=
es
 AX_STUBDOM_CONDITIONAL_FINISH([vtpm-stubdom], [vtpm])
 AX_STUBDOM_CONDITIONAL_FINISH([vtpmmgr-stubdom], [vtpmmgr])
-AX_STUBDOM_CONDITIONAL_FINISH([ioemu-stubdom], [ioemu])
=20
 AX_STUBDOM_FINISH
 AC_OUTPUT()
diff --git a/stubdom/ioemu-minios.cfg b/stubdom/ioemu-minios.cfg
deleted file mode 100644
index 6153ae05f8..0000000000
--- a/stubdom/ioemu-minios.cfg
+++ /dev/null
@@ -1,6 +0,0 @@
-CONFIG_LIBC=3Dy
-CONFIG_LWIP=3Dy
-CONFIG_START_NETWORK=3Dn
-CONFIG_QEMU_XS_ARGS=3Dy
-CONFIG_PCIFRONT=3Dy
-XEN_INTERFACE_VERSION=3D__XEN_LATEST_INTERFACE_VERSION__
diff --git a/tools/Makefile b/tools/Makefile
index e9e1cda305..6ecf7c0da8 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -24,7 +24,6 @@ SUBDIRS-$(CONFIG_Linux) +=3D vchan
=20
 # do not recurse in to a dir we are about to delete
 ifneq "$(MAKECMDGOALS)" "distclean"
-SUBDIRS-$(CONFIG_QEMU_TRAD) +=3D qemu-xen-traditional-dir
 SUBDIRS-$(CONFIG_QEMU_XEN) +=3D qemu-xen-dir
 endif
=20
@@ -79,7 +78,6 @@ clean: subdirs-clean
=20
 .PHONY: distclean
 distclean: subdirs-distclean clean
-	rm -rf qemu-xen-traditional-dir qemu-xen-traditional-dir-remote
 	rm -rf qemu-xen-dir qemu-xen-dir-remote qemu-xen-build
 	rm -rf ../config/Tools.mk config.h config.log config.status \
 		config.cache autom4te.cache
@@ -97,11 +95,6 @@ QEMU_UPSTREAM_RPATH :=3D -Wl,-rpath,$(LIBEXEC_LIB)
 IOEMU_EXTRA_LDFLAGS :=3D
 endif
=20
-QEMU_ROOT :=3D $(shell if [ -d "$(QEMU_TRADITIONAL_LOC)" ]; then ech=
o "$(QEMU_TRADITIONAL_LOC)"; else echo .; fi)
-ifneq ($(QEMU_ROOT),.)
-export QEMU_ROOT
-endif
-
 # Targets for external trees:
 #  ${target}-dir-find
 #    See if the directory exists and check it out if not.
@@ -136,54 +129,6 @@ endif
 #   ${TARGET}_LOC
 #     The ultimate location of the source (either a local dir or remote =
URL)
=20
-# External target: qemu-xen-traditional
-qemu-xen-traditional-dir-find:
-	set -ex; \
-	if test -d $(QEMU_TRADITIONAL_LOC); then \
-		mkdir -p qemu-xen-traditional-dir; \
-	else \
-		export GIT=3D$(GIT); \
-		$(XEN_ROOT)/scripts/git-checkout.sh $(QEMU_TRADITIONAL_LOC) $(QEMU_TRA=
DITIONAL_REVISION) qemu-xen-traditional-dir; \
-	fi
-
-.PHONY: qemu-xen-traditional-dir-force-update
-qemu-xen-traditional-dir-force-update: qemu-xen-traditional-dir-find
-	set -ex; \
-	if [ "$(QEMU_TRADITIONAL_REVISION)" ]; then \
-		cd qemu-xen-traditional-dir-remote; \
-		$(GIT) fetch origin; \
-		$(GIT) reset --hard $(QEMU_TRADITIONAL_REVISION); \
-	fi
-
-qemu-traditional-recurse =3D \
-	set -e; \
-		$(buildmakevars2shellvars); \
-		export CONFIG_BLKTAP1=3Dn; \
-		export BUILDING_QEMU_TRAD=3Dy; \
-		cd qemu-xen-traditional-dir; \
-		$(1)
-
-subdir-all-qemu-xen-traditional-dir: qemu-xen-traditional-dir-find
-	$(call qemu-traditional-recurse,\
-		$(QEMU_ROOT)/xen-setup \
-		--extra-cflags=3D"-D__XEN_TOOLS__ $(EXTRA_CFLAGS_QEMU_TRADITIONAL)" \
-		$(IOEMU_EXTRA_LDFLAGS) \
-		--cpu=3D$(IOEMU_CPU_ARCH) \
-		$(IOEMU_CONFIGURE_CROSS); \
-		$(MAKE) all \
-	)
-
-subdir-install-qemu-xen-traditional-dir: subdir-all-qemu-xen-traditional=
-dir
-	$(call qemu-traditional-recurse,$(MAKE) install)
-
-subdir-clean-qemu-xen-traditional-dir:
-	set -e; if test -d qemu-xen-traditional-dir/.; then \
-		$(MAKE) -C qemu-xen-traditional-dir clean; \
-	fi
-subdir-uninstall-qemu-xen-traditional-dir:
-	rm -f $(D)$(bindir)/qemu-nbd*
-	rm -f $(D)$(bindir)/qemu-img*
-
 # External target: qemu-xen
 qemu-xen-dir-find:
 	if test -d $(QEMU_UPSTREAM_LOC) ; then \
@@ -276,9 +221,6 @@ subtree-force-update:
 ifeq ($(CONFIG_QEMU_XEN),y)
 	$(MAKE) qemu-xen-dir-force-update
 endif
-ifeq ($(CONFIG_QEMU_TRAD),y)
-	$(MAKE) qemu-xen-traditional-dir-force-update
-endif
 ifeq ($(CONFIG_X86),y)
 	$(MAKE) -C firmware subtree-force-update
 endif
diff --git a/tools/Rules.mk b/tools/Rules.mk
index 6bd636709f..725c3c32e9 100644
--- a/tools/Rules.mk
+++ b/tools/Rules.mk
@@ -134,12 +134,9 @@ endif
=20
 CFLAGS_libxenlight +=3D $(CFLAGS_libxenctrl)
=20
-# Don't add -Werror if we are used by qemu-trad build system.
-ifndef BUILDING_QEMU_TRAD
 ifeq ($(CONFIG_WERROR),y)
 CFLAGS +=3D -Werror
 endif
-endif
=20
 ifeq ($(debug),y)
 # Use -Og if available, -O0 otherwise
diff --git a/tools/config.h.in b/tools/config.h.in
index 0bab3cb136..fe2a94cfc4 100644
--- a/tools/config.h.in
+++ b/tools/config.h.in
@@ -42,9 +42,6 @@
 /* pygrub enabled */
 #undef HAVE_PYGRUB
=20
-/* Qemu traditional enabled */
-#undef HAVE_QEMU_TRADITIONAL
-
 /* ROMBIOS enabled */
 #undef HAVE_ROMBIOS
=20
diff --git a/tools/configure b/tools/configure
index e1f6ea6bf5..27ae7c52fb 100755
--- a/tools/configure
+++ b/tools/configure
@@ -726,7 +726,6 @@ BCC
 LD86
 AS86
 ipxe
-qemu_traditional
 LINUX_BACKEND_MODULES
 pygrub
 golang
@@ -835,7 +834,6 @@ enable_seabios
 enable_golang
 enable_pygrub
 with_linux_backend_modules
-enable_qemu_traditional
 enable_ipxe
 with_system_ipxe
 enable_rombios
@@ -1518,13 +1516,10 @@ Optional Features:
   --disable-seabios       Disable SeaBIOS (default is ENABLED)
   --disable-golang        Disable Go tools (default is ENABLED)
   --disable-pygrub        Disable pygrub (default is ENABLED)
-  --enable-qemu-traditional
-                          Enable qemu traditional device model, (DEFAULT=
 is
-                          off)
   --enable-ipxe           Enable in-tree IPXE, (DEFAULT is off, see also=

                           --with-system-ipxe)
-  --enable-rombios        Enable ROMBIOS, (DEFAULT is on if qemu-traditi=
onal
-                          or ipxe is enabled, otherwise off)
+  --enable-rombios        Enable ROMBIOS, (DEFAULT is on if ipxe is enab=
led,
+                          otherwise off)
   --enable-libfsimage     Enable libfsimage, (DEFAULT is on if pygrub is=

                           enabled, otherwise off)
   --enable-systemd        Enable systemd support (default is DISABLED)
@@ -4838,45 +4833,16 @@ fi
 LINUX_BACKEND_MODULES=3D"`eval echo $LINUX_BACKEND_MODULES`"
=20
=20
-# Check whether --enable-qemu-traditional was given.
-if test ${enable_qemu_traditional+y}
-then :
-  enableval=3D$enable_qemu_traditional;
-fi
-
-if test "x$enable_qemu_traditional" =3D "xyes"
-then :
-
-
-printf "%s\n" "#define HAVE_QEMU_TRADITIONAL 1" >>confdefs.h
-
-    qemu_traditional=3Dy
-else $as_nop
-
-    qemu_traditional=3Dn
-
-fi
-
-
 # Check whether --enable-ipxe was given.
 if test ${enable_ipxe+y}
 then :
   enableval=3D$enable_ipxe;
-else $as_nop
-
-    if test "x$enable_qemu_traditional" =3D "xyes"
-then :
-
-        enable_ipxe=3D"yes"
-
 else $as_nop
=20
         enable_ipxe=3D"no"
=20
 fi
=20
-fi
-
 if test "x$enable_ipxe" =3D "xno"
 then :
   ipxe=3Dn
@@ -4912,7 +4878,7 @@ then :
   enableval=3D$enable_rombios;
 else $as_nop
=20
-    if test "x$enable_qemu_traditional" =3D "xyes" -o "x$enable_ipxe" =3D=
 "xyes"
+    if test "x$enable_ipxe" =3D "xyes"
 then :
=20
         enable_rombios=3D"yes"
@@ -4928,7 +4894,7 @@ fi
 if test "x$enable_rombios" =3D "xyes"
 then :
=20
-                # Extract the first word of "as86", so it can be a progr=
am name with args.
+    # Extract the first word of "as86", so it can be a program name with=
 args.
 set dummy as86; ac_word=3D$2
 { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >=
;&5
 printf %s "checking for $ac_word... " >&6; }
diff --git a/tools/configure.ac b/tools/configure.ac
index 0dd6d747ab..dada1c3b15 100644
--- a/tools/configure.ac
+++ b/tools/configure.ac
@@ -121,25 +121,11 @@ esac])
 LINUX_BACKEND_MODULES=3D"`eval echo $LINUX_BACKEND_MODULES`"
 AC_SUBST(LINUX_BACKEND_MODULES)
=20
-AC_ARG_ENABLE([qemu-traditional],
-    AS_HELP_STRING([--enable-qemu-traditional],
-                   [Enable qemu traditional device model, (DEFAULT is of=
f)]))
-AS_IF([test "x$enable_qemu_traditional" =3D "xyes"], [
-AC_DEFINE([HAVE_QEMU_TRADITIONAL], [1], [Qemu traditional enabled])
-    qemu_traditional=3Dy],[
-    qemu_traditional=3Dn
-])
-AC_SUBST(qemu_traditional)
-
 AC_ARG_ENABLE([ipxe],
     AS_HELP_STRING([--enable-ipxe],
                    [Enable in-tree IPXE,
                     (DEFAULT is off, see also --with-system-ipxe)]),,[
-    AS_IF([test "x$enable_qemu_traditional" =3D "xyes"], [
-        enable_ipxe=3D"yes"
-    ], [
         enable_ipxe=3D"no"
-    ])
 ])
 AS_IF([test "x$enable_ipxe" =3D "xno"], [ipxe=3Dn], [ipxe=3Dy])
 AC_ARG_WITH([system-ipxe],
@@ -162,18 +148,15 @@ AC_SUBST(ipxe)
=20
 AC_ARG_ENABLE([rombios],
     AS_HELP_STRING([--enable-rombios],
-                   [Enable ROMBIOS, (DEFAULT is on if qemu-traditional o=
r ipxe is enabled,
+                   [Enable ROMBIOS, (DEFAULT is on if ipxe is enabled,
                     otherwise off)]),,[
-    AS_IF([test "x$enable_qemu_traditional" =3D "xyes" -o "x$enable_ipxe=
" =3D "xyes"], [
+    AS_IF([test "x$enable_ipxe" =3D "xyes"], [
         enable_rombios=3D"yes"
     ], [
         enable_rombios=3D"no"
     ])
 ])
 AS_IF([test "x$enable_rombios" =3D "xyes"], [
-    dnl as86, ld86, and bcc are only required when building rombios. The=
y
-    dnl are only needed when the host system is x86 but that check is do=
ne
-    dnl for us above when checking if we should build with qemu-traditio=
nal.
     AX_PATH_PROG_OR_FAIL([AS86], [as86])
     AX_PATH_PROG_OR_FAIL([LD86], [ld86])
     AX_PATH_PROG_OR_FAIL([BCC], [bcc])


    

  


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Message-ID: <7c7de4be-e8d0-45b9-9212-186d79e95512@suse.com>
Date: Thu, 24 Apr 2025 12:11:12 +0200
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Subject: Re: [RFC PATCH v2 13/34] x86/xen/msr: Remove the error pointer
 argument from set_reg()
To: "Xin Li (Intel)" , linux-kernel@vger.kernel.org,
 kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
 linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
 linux-pm@vger.kernel.org, linux-edac@vger.kernel.org,
 xen-devel@lists.xenproject.org, linux-acpi@vger.kernel.org,
 linux-hwmon@vger.kernel.org, netdev@vger.kernel.org,
 platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
 dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, acme@kernel.org,
 andrew.cooper3@citrix.com, peterz@infradead.org, namhyung@kernel.org,
 mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org,
 irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
 wei.liu@kernel.org, ajay.kaher@broadcom.com,
 bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
 pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
 luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
 haiyangz@microsoft.com, decui@microsoft.com
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-14-xin@zytor.com>
Content-Language: en-US
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From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= 
To: "Xin Li (Intel)" , linux-kernel@vger.kernel.org,
 kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
 linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
 linux-pm@vger.kernel.org, linux-edac@vger.kernel.org,
 xen-devel@lists.xenproject.org, linux-acpi@vger.kernel.org,
 linux-hwmon@vger.kernel.org, netdev@vger.kernel.org,
 platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
 dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, acme@kernel.org,
 andrew.cooper3@citrix.com, peterz@infradead.org, namhyung@kernel.org,
 mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org,
 irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
 wei.liu@kernel.org, ajay.kaher@broadcom.com,
 bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
 pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
 luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
 haiyangz@microsoft.com, decui@microsoft.com
Message-ID: <7c7de4be-e8d0-45b9-9212-186d79e95512@suse.com>
Subject: Re: [RFC PATCH v2 13/34] x86/xen/msr: Remove the error pointer
 argument from set_reg()
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-14-xin@zytor.com>
In-Reply-To: <20250422082216.1954310-14-xin@zytor.com>

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Date: Thu, 24 Apr 2025 12:15:17 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Roger Pau =?utf-8?B?TW9ubsOp?= 
Cc: "Lira, Victor M" ,
	Jason Andryuk ,
	Stefano Stabellini ,
	xen-devel@lists.xenproject.org,
	Andrew Cooper ,
	Jan Beulich , Xenia.Ragiadakou@amd.com,
	Alejandro.GarciaVallejo@amd.com
Subject: Re: [RFC] xen/x86: allow overlaps with non-RAM regions
Message-ID: 
References: 
 
 <3c5dfd26-3c12-498b-aca4-0beac4e991a5@amd.com>
 
 <9ed89e50-c645-407d-80b4-5b78cb6e36fa@amd.com>
 
 
 
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Date: Thu, 24 Apr 2025 12:15:17 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Roger Pau =?utf-8?B?TW9ubsOp?= 
Cc: "Lira, Victor M" ,
	Jason Andryuk ,
	Stefano Stabellini ,
	xen-devel@lists.xenproject.org,
	Andrew Cooper ,
	Jan Beulich , Xenia.Ragiadakou@amd.com,
	Alejandro.GarciaVallejo@amd.com
Subject: Re: [RFC] xen/x86: allow overlaps with non-RAM regions

On Thu, Apr 24, 2025 at 09:59:00AM +0200, Roger Pau Monn=C3=A9 wrote:
> On Wed, Apr 23, 2025 at 04:51:16PM -0700, Lira, Victor M wrote:
> > [    4.570354] Intel(R) 2.5G Ethernet Linux Driver
> >=20
> > [    4.579535] Copyright(c) 2018 Intel Corporation.
> >=20
> > [    4.588898] sky2: driver version 1.30
> >=20
> > (XEN) [   21.644361] d0v3 unable to fixup memory read from 0xfe91000c s=
ize 4: -1
>=20
> This fault is unexpected, according to the identity mappings done at
> domain build time:
>=20
> d0: identity mappings for IOMMU:
>  [00000000a0, 00000000ff] RW
>  [0000009bff, 0000009fff] RW
>  [00000cabc9, 00000cc14c] RW
>  [00000cc389, 00000cc389] RW
>  [00000cc70a, 00000cd1fe] RW
>  [00000ce000, 00000cffff] RW
>  [00000fd000, 00000fd2ff] RW
>=20
> The page at 0xfe910 should be covered by the last range above.  I
> think we have a bug somewhere that unexpectedly unmaps that address.

You sure? 0xfe910 is outside of [00000fd000, 00000fd2ff].

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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Date: Thu, 24 Apr 2025 12:16:21 +0200
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Subject: Re: [RFC PATCH v2 14/34] x86/msr: refactor
 pv_cpu_ops.write_msr{_safe}()
To: "Xin Li (Intel)" , linux-kernel@vger.kernel.org,
 kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
 linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
 linux-pm@vger.kernel.org, linux-edac@vger.kernel.org,
 xen-devel@lists.xenproject.org, linux-acpi@vger.kernel.org,
 linux-hwmon@vger.kernel.org, netdev@vger.kernel.org,
 platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
 dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, acme@kernel.org,
 andrew.cooper3@citrix.com, peterz@infradead.org, namhyung@kernel.org,
 mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org,
 irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
 wei.liu@kernel.org, ajay.kaher@broadcom.com,
 bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
 pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
 luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
 haiyangz@microsoft.com, decui@microsoft.com
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-15-xin@zytor.com>
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From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= 
To: "Xin Li (Intel)" , linux-kernel@vger.kernel.org,
 kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
 linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
 linux-pm@vger.kernel.org, linux-edac@vger.kernel.org,
 xen-devel@lists.xenproject.org, linux-acpi@vger.kernel.org,
 linux-hwmon@vger.kernel.org, netdev@vger.kernel.org,
 platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
 dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, acme@kernel.org,
 andrew.cooper3@citrix.com, peterz@infradead.org, namhyung@kernel.org,
 mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org,
 irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
 wei.liu@kernel.org, ajay.kaher@broadcom.com,
 bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
 pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
 luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
 haiyangz@microsoft.com, decui@microsoft.com
Message-ID: <054eec5c-1f36-454b-9220-b7f975d2717b@suse.com>
Subject: Re: [RFC PATCH v2 14/34] x86/msr: refactor
 pv_cpu_ops.write_msr{_safe}()
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-15-xin@zytor.com>
In-Reply-To: <20250422082216.1954310-15-xin@zytor.com>

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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	Stefano Stabellini 
Subject: [PATCH] xen: fix buffer over-read in bitmap_to_xenctl_bitmap()
Date: Thu, 24 Apr 2025 12:38:41 +0200
Message-ID: <20250424103841.94828-1-roger.pau@citrix.com>
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There's an off-by-one when calculating the last byte in the input array to
bitmap_to_xenctl_bitmap(), which leads to bitmaps with sizes multiple of 8
to over-read and incorrectly use a byte past the end of the array.

While there also ensure that bitmap_to_xenctl_bitmap() is not called with a
bitmap of 0 length.

Fixes: 288c4641c80d ('xen: simplify bitmap_to_xenctl_bitmap for little endian')
Signed-off-by: Roger Pau Monné 
---
 xen/common/bitmap.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/xen/common/bitmap.c b/xen/common/bitmap.c
index bf1a7fd91e36..415d6bc074f6 100644
--- a/xen/common/bitmap.c
+++ b/xen/common/bitmap.c
@@ -369,6 +369,12 @@ int bitmap_to_xenctl_bitmap(struct xenctl_bitmap *xenctl_bitmap,
     const uint8_t *bytemap;
     uint8_t last, *buf = NULL;
 
+    if ( !nbits )
+    {
+	ASSERT_UNREACHABLE();
+	return -EILSEQ;
+    }
+
     if ( !IS_ENABLED(LITTLE_ENDIAN) )
     {
         buf = xmalloc_array(uint8_t, xen_bytes);
@@ -396,7 +402,7 @@ int bitmap_to_xenctl_bitmap(struct xenctl_bitmap *xenctl_bitmap,
      * their loops to 8 bits. Ensure we clear those left over bits so as to
      * prevent surprises.
      */
-    last = bytemap[nbits / 8];
+    last = bytemap[(nbits - 1) / 8];
     if ( nbits % 8 )
         last &= (1U << (nbits % 8)) - 1;
 
-- 
2.48.1



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Subject: Re: UBSan bug in real mode fpu emulation
To: Fabian Specht , xen-devel@lists.xenproject.org
Cc: manuel.andreas@tum.de
References: 
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From: Andrew Cooper 
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On 24/04/2025 2:08 am, Fabian Specht wrote:
> Dear Xen-Devel team,
>
> we discovered a bug regarding undefined behaviour in the FPU emulation
> unit.
>
> if ( !s->rex_prefix )
> {
> 	/* Convert 32-bit real/vm86 to 32-bit prot format. */
> 	unsigned int fip = fpstate.env.mode.real.fip_lo +
> 					   (fpstate.env.mode.real.fip_hi << 16);
> 	unsigned int fdp = fpstate.env.mode.real.fdp_lo +
> 					   (fpstate.env.mode.real.fdp_hi << 16);
> 	unsigned int fop = fpstate.env.mode.real.fop;
>
> 	fpstate.env.mode.prot.fip = fip & 0xf;
> 	fpstate.env.mode.prot.fcs = fip >> 4;
> 	fpstate.env.mode.prot.fop = fop;
> 	fpstate.env.mode.prot.fdp = fdp & 0xf;
> 	fpstate.env.mode.prot.fds = fdp >> 4;
> }
>
> It occurs at arch/x86/arch/x86/x86_emulate/blk.c:85 of the v4.20.0
> release during the bit shift and can be triggered using the attached xtf
> test. We are not aware of any security consequences.
> Simply shifting by 4 should do the trick in my opinion.
>
> Similar code resides in the same file in lines 87, 125 and 127.
> The attached xtf test is run for hvm32.

Several things.  First, please always the UBSAN analysis from the crash.

There are several different ways that shifts go wrong, and I suspect
this is a shift into a sign bit, which is notable given the unsigned
underlying type.

Also, are you aware that the test isn't properly in Real Mode?  It's in
so-called unreal mode (not actually a real mode, but a consequence of
how the segment registers work), which is relevant to how you manage to
re-enter the emulator for FLDENV.

~Andrew


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Date: Thu, 24 Apr 2025 12:48:26 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
Cc: "Lira, Victor M" ,
	Jason Andryuk ,
	Stefano Stabellini ,
	xen-devel@lists.xenproject.org,
	Andrew Cooper ,
	Jan Beulich , Xenia.Ragiadakou@amd.com,
	Alejandro.GarciaVallejo@amd.com
Subject: Re: [RFC] xen/x86: allow overlaps with non-RAM regions
Message-ID: 
References: 
 
 <3c5dfd26-3c12-498b-aca4-0beac4e991a5@amd.com>
 
 <9ed89e50-c645-407d-80b4-5b78cb6e36fa@amd.com>
 
 
 
 
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On Thu, Apr 24, 2025 at 12:15:17PM +0200, Marek Marczykowski-Górecki wrote:
> On Thu, Apr 24, 2025 at 09:59:00AM +0200, Roger Pau Monné wrote:
> > On Wed, Apr 23, 2025 at 04:51:16PM -0700, Lira, Victor M wrote:
> > > [    4.570354] Intel(R) 2.5G Ethernet Linux Driver
> > > 
> > > [    4.579535] Copyright(c) 2018 Intel Corporation.
> > > 
> > > [    4.588898] sky2: driver version 1.30
> > > 
> > > (XEN) [   21.644361] d0v3 unable to fixup memory read from 0xfe91000c size 4: -1
> > 
> > This fault is unexpected, according to the identity mappings done at
> > domain build time:
> > 
> > d0: identity mappings for IOMMU:
> >  [00000000a0, 00000000ff] RW
> >  [0000009bff, 0000009fff] RW
> >  [00000cabc9, 00000cc14c] RW
> >  [00000cc389, 00000cc389] RW
> >  [00000cc70a, 00000cd1fe] RW
> >  [00000ce000, 00000cffff] RW
> >  [00000fd000, 00000fd2ff] RW
> > 
> > The page at 0xfe910 should be covered by the last range above.  I
> > think we have a bug somewhere that unexpectedly unmaps that address.
> 
> You sure? 0xfe910 is outside of [00000fd000, 00000fd2ff].

Oh, did and off-by-one when copying, it should have been:

d0: identity mappings for IOMMU:
 [00000000a0, 00000000ff] RW
 [0000009bff, 0000009fff] RW
 [00000cabc9, 00000cc14c] RW
 [00000cc389, 00000cc389] RW
 [00000cc70a, 00000cd1fe] RW
 [00000ce000, 00000cffff] RW
 [00000fd000, 00000fd2ff] RW
 [00000fd304, 00000febff] RW

Where 0xfe910 is covered by the last range.

Regards, Roger.


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Date: Thu, 24 Apr 2025 12:54:41 +0200
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH 00/21] x86: Trenchboot Secure Launch DRTM (Xen)
To: Sergii Dmytruk 
Cc: Andrew Cooper ,
 xen-devel@lists.xenproject.org, Jan Beulich ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Lukasz Hawrylko ,
 "Daniel P. Smith" ,
 =?UTF-8?Q?Mateusz_M=C3=B3wka?= ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 Stefano Stabellini ,
 =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 , trenchboot-devel@googlegroups.com
References: 
 <744934f4-f56f-4dc7-bccb-c32f2829d1da@citrix.com>
 <010709d8-7784-41bf-bcb6-bf04803a75fc@citrix.com> 
  
Content-Language: en-US
From: Nicola Vetrini 
In-Reply-To: 

This is a multi-part message in MIME format.
--------------pU8o5jw9DTHAELL3BH6UnlhZ
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On 4/23/25 23:53, Sergii Dmytruk wrote:
> On Wed, Apr 23, 2025 at 10:11:35PM +0200, Nicola Vetrini wrote:
>> On 2025-04-23 20:45, Sergii Dmytruk wrote:
>>> On Wed, Apr 23, 2025 at 02:38:37PM +0100, Andrew Cooper wrote:
>>>> On 22/04/2025 6:14 pm, Andrew Cooper wrote:
>>>>> I've stripped out the sha2 patch and fixed up to use the existing sha2,
>>>>> then kicked off some CI testing:
>>>>>
>>>>> https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1780285393
>>>>> https://cirrus-ci.com/build/5452335868018688
>>>>>
>>>>> When the dust has settled, I'll talk you through the failures.
>>>> And here we go.  Interestingly, the FreeBSD testing was entirely
>>>> happy,
>>>> and that is the rare way around.
>>>>
>>>> For Gitlab, there are several areas.
>>>>
>>>> First, for MISRA.  In the job logs, you want the "Browse current
>>>> reports:" link which will give you full details, but it's all pretty
>>>> simple stuff.
>>> Thanks, but that link gives me a list of 5096 failures all over the code
>>> base.  Is there any way to see a diff against master?
>>>
>> Hi,
>>
>> yes, you can define selections of violations introduced on previously clean
>> guidelines by clicking on the "ECLAIR" button on the upper right. See [1]
>> which is the result of defining the "clean_added" selection shown in the
>> attached screenshot. If you have other questions please let me know.
> Hi,
>
> not sure why, but using "added" left 4861 violations.  Picking `_NO_TAG`
> instead seemingly left only new violations.  Maybe that's something
> specific to this particular run.  Either way, I can go through the list
> now and know how to adjust it.  Thank you for the instructions.
>
I'm not sure I fully understand this. This is what I see on x86: the 
ones still shown are those rules where the CI is blocking and new issues 
have been introduced by that pipeline run (of course a different 
pipeline may yield different results). Only new violations are blocking, 
so that is why I filtered out the rest in this case.

Thanks,

  Nicola

>> Thanks,
>>   Nicola
>>
>> [1] https://saas.eclairit.com:3787/fs/var/local/eclair/xen-project.ecdf/xen-project/hardware/xen-staging/ECLAIR_normal/andrew/tb-v1.1/ARM64/9791028027/PROJECT.ecd;/by_service.html#service&kind{"select":true,"selection":{"hiddenAreaKinds":[],"hiddenSubareaKinds":[],"show":true,"selector":{"enabled":true,"negated":false,"kind":1,"children":[{"enabled":true,"negated":false,"kind":0,"domain":"clean","inputs":[{"enabled":true,"text":"added"}]}]}}}
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Subject: Re: [PATCH] xen: fix buffer over-read in bitmap_to_xenctl_bitmap()
To: Roger Pau Monne , xen-devel@lists.xenproject.org
Cc: Anthony PERARD ,
 Michal Orzel , Jan Beulich ,
 Julien Grall , Stefano Stabellini 
References: <20250424103841.94828-1-roger.pau@citrix.com>
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On 24/04/2025 11:38 am, Roger Pau Monne wrote:
> There's an off-by-one when calculating the last byte in the input array to
> bitmap_to_xenctl_bitmap(), which leads to bitmaps with sizes multiple of 8
> to over-read and incorrectly use a byte past the end of the array.

/sigh

> While there also ensure that bitmap_to_xenctl_bitmap() is not called with a
> bitmap of 0 length.
>
> Fixes: 288c4641c80d ('xen: simplify bitmap_to_xenctl_bitmap for little endian')
> Signed-off-by: Roger Pau Monné 

You ought to note that this is only not getting an XSA because
288c4641c80d isn't in a released Xen yet.

> ---
>  xen/common/bitmap.c | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/xen/common/bitmap.c b/xen/common/bitmap.c
> index bf1a7fd91e36..415d6bc074f6 100644
> --- a/xen/common/bitmap.c
> +++ b/xen/common/bitmap.c
> @@ -369,6 +369,12 @@ int bitmap_to_xenctl_bitmap(struct xenctl_bitmap *xenctl_bitmap,
>      const uint8_t *bytemap;
>      uint8_t last, *buf = NULL;
>  
> +    if ( !nbits )
> +    {
> +	ASSERT_UNREACHABLE();
> +	return -EILSEQ;
> +    }

I don't see any hypercalls performing a bits==0 check, so I expect this
is reachable.

> +
>      if ( !IS_ENABLED(LITTLE_ENDIAN) )
>      {
>          buf = xmalloc_array(uint8_t, xen_bytes);
> @@ -396,7 +402,7 @@ int bitmap_to_xenctl_bitmap(struct xenctl_bitmap *xenctl_bitmap,
>       * their loops to 8 bits. Ensure we clear those left over bits so as to
>       * prevent surprises.
>       */
> -    last = bytemap[nbits / 8];
> +    last = bytemap[(nbits - 1) / 8];
>      if ( nbits % 8 )
>          last &= (1U << (nbits % 8)) - 1;
>  

This (preexisting) logic is mad.  The overwhelming majority of cases are
going to be a multiple of 8, and as you notice, the 0 case can't be
fixed like this.

It should all be inside a copy_bytes conditional as is done in
xenctl_bitmap_to_bitmap().

~Andrew


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From: Oleksii Kurochko 
Subject: Re: [PATCH v2 1/6] SUPPORT.md: make Linux based stubdom fully
 supported
To: Juergen Gross , xen-devel@lists.xenproject.org
Cc: Community Manager ,
 Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Jan Beulich ,
 Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Stefano Stabellini 
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On 4/8/25 2:35 PM, Juergen Gross wrote:
> All patches needed for running with a Linux stubdom device model are
> in the tree and QubesOS is using and testing Linux stubdoms nowadays.
>
> Switch support from "Tech Preview" to "Supported, with caveats".
>
> Signed-off-by: Juergen Gross
> ---
> V2:
> - switch to "Supported, with caveats" (security team)
> ---
>   CHANGELOG.md | 1 +
>   SUPPORT.md   | 5 ++++-
>   2 files changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/CHANGELOG.md b/CHANGELOG.md
> index 8f6afa5c85..ce4fcf2feb 100644
> --- a/CHANGELOG.md
> +++ b/CHANGELOG.md
> @@ -10,6 +10,7 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/)
>    - The minimum toolchain requirements have increased for some architectures:
>      - For x86, GCC 5.1 and Binutils 2.25, or Clang/LLVM 11
>      - For ARM32 and ARM64, GCC 5.1 and Binutils 2.25
> + - Linux based device model stubdomains are now fully supported.

LGTM: Acked-By: Oleksii Kurochko

Thanks.
~ Oleksii

>   
>   ### Added
>    - On x86:
> diff --git a/SUPPORT.md b/SUPPORT.md
> index 91cb6f8ed2..e8fd0c251e 100644
> --- a/SUPPORT.md
> +++ b/SUPPORT.md
> @@ -260,7 +260,10 @@ Go (golang) bindings for libxl
>   
>   Support for running qemu-xen device model in a linux stubdomain.
>   
> -    Status: Tech Preview
> +    Status: Supported, with caveats
> +
> +Any issue in the stubdomain affecting only the guest it is servicing
> +or itself will not be regarded a security issue.
>   
>   ## Xenstore
>   
--------------fFxa0EaYfvbxfwTUNxpg0xLv
Content-Type: text/html; charset=UTF-8
Content-Transfer-Encoding: 7bit



  
    
  
  
    


    

    
On 4/8/25 2:35 PM, Juergen Gross wrote:

    

    

      
All patches needed for running with a Linux stubdom device model are
in the tree and QubesOS is using and testing Linux stubdoms nowadays.

Switch support from "Tech Preview" to "Supported, with caveats".

Signed-off-by: Juergen Gross <jgross@suse.com>
---
V2:
- switch to "Supported, with caveats" (security team)
---
 CHANGELOG.md | 1 +
 SUPPORT.md   | 5 ++++-
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index 8f6afa5c85..ce4fcf2feb 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -10,6 +10,7 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/)
  - The minimum toolchain requirements have increased for some architectures:
    - For x86, GCC 5.1 and Binutils 2.25, or Clang/LLVM 11
    - For ARM32 and ARM64, GCC 5.1 and Binutils 2.25
+ - Linux based device model stubdomains are now fully supported.

    

    
LGTM: Acked-By: Oleksii Kurochko <oleksii.kurochko@gmail.com>

Thanks.
~ Oleksii


    

      
 
 ### Added
  - On x86:
diff --git a/SUPPORT.md b/SUPPORT.md
index 91cb6f8ed2..e8fd0c251e 100644
--- a/SUPPORT.md
+++ b/SUPPORT.md
@@ -260,7 +260,10 @@ Go (golang) bindings for libxl
 
 Support for running qemu-xen device model in a linux stubdomain.
 
-    Status: Tech Preview
+    Status: Supported, with caveats
+
+Any issue in the stubdomain affecting only the guest it is servicing
+or itself will not be regarded a security issue.
 
 ## Xenstore
 


    

  


--------------fFxa0EaYfvbxfwTUNxpg0xLv--


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Subject: Re: [PATCH v1] misra: add deviation of Rule 5.5
To: "Lira, Victor M" , xen-devel@lists.xenproject.org
Cc: Federico Serafini ,
 Anthony PERARD ,
 Michal Orzel , Jan Beulich ,
 Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Stefano Stabellini ,
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References: <9e1210f2a9c794d68dcc6b897239b228b141296a.1745427770.git.victorm.lira@amd.com>
 <48c7830931a98b2bf70ef1509f309b262b9e5792.1745427770.git.victorm.lira@amd.com>
 
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On 23/04/2025 7:16 pm, Lira, Victor M wrote:
> Continuing a discussion from before:
>
> On 4/22/2025 11:44 PM, Jan Beulich wrote:
>> Caution: This message originated from an External Source. Use proper
>> caution when opening attachments, clicking links, or responding.
>>
>>
>> On 23.04.2025 01:43, victorm.lira@amd.com wrote:
>>>          memmove.
>>>        - Tagged as `deliberate` for ECLAIR.
>>>
>>> +   * - R5.5
>>> +     - Clashes between function-like macros and function names are
>>> +       deliberate
>> They may or may not be deliberate, depending on context. I don't
>> think it's a
>> good move to deviate this more widely than necessary. If I get the
>> expression
>> above (in deviations.ecl) right, even
>>
>> void func1(int);
>> void func2(int);
>>
>> #define func1() func2(0)
>> #define func2() func1(0)
>>
>> would be deviated, which I don't think we want. Especially when, in a
>> less
>> contrived scenario, the clash may not easily be visible.
> OK, I see the issue for different functions. Does it make sense to say
> it's deliberate when it's the same identifier?
>
>     void func1(int);
>     ...
>     #define func1() func1(0)
>
> Could this be deviated?

The issue here is we've got a load of violations, and different reasoning.

e.g. all the bitops violations are valid and need fixing.  I have a plan
for how to do so, and 0 time.  These are the overwhelming majority of
violations.

pirq_cleanup_check() is horrible.  cpu_has_amd_erraturm is even worse.

In fact, I can't see a single case where the origin code is something we
really want to keep.

I still don't understand the complaint about 'c' as an identifier.

~Andrew


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	, =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Paul Durrant 
Subject: [PATCH] x86/hyperv: Adjust hypercall page placement
Date: Thu, 24 Apr 2025 13:45:03 +0100
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Xen nowadays crashes under some Hyper-V configurations when
paddr_bits>36. At the 44bit boundary we reach an edge case in which the
end of the guest physical address space is not representable using 32bit
MFNs. Furthermore, it's an act of faith that the tail of the physical
address space has no reserved regions already.

This commit uses the first unused MFN rather than the last, thus
ensuring the hypercall page placement is more resilient against such
corner cases.

While at this, add an extra BUG_ON() to explicitly test for the
hypercall page being correctly set, and mark hcall_page_ready as
__ro_after_init.

Fixes: 620fc734f854("x86/hyperv: setup hypercall page")
Signed-off-by: Alejandro Vallejo 
---
 xen/arch/x86/e820.c                     | 14 ++++++++++++++
 xen/arch/x86/guest/hyperv/hyperv.c      | 20 ++++++++++----------
 xen/arch/x86/include/asm/e820.h         |  1 +
 xen/arch/x86/include/asm/guest/hyperv.h |  3 ---
 4 files changed, 25 insertions(+), 13 deletions(-)

diff --git a/xen/arch/x86/e820.c b/xen/arch/x86/e820.c
index ca577c0bde..7be9a8db34 100644
--- a/xen/arch/x86/e820.c
+++ b/xen/arch/x86/e820.c
@@ -582,6 +582,20 @@ int __init e820_add_range(uint64_t s, uint64_t e, uint32_t type)
     return 1;
 }
 
+uint64_t __init e820_reserve_hole(void)
+{
+    for ( unsigned int i = 0; i < e820.nr_map; i++ )
+    {
+        uint64_t hole = e820.map[i].addr + e820.map[i].size;
+        if ( e820_add_range(hole, hole + PAGE_SIZE, E820_RESERVED) )
+            return hole;
+    }
+
+    print_e820_memory_map(e820.map, e820.nr_map);
+    panic("Unable to find a hole in e820");
+}
+
+
 int __init e820_change_range_type(
     struct e820map *map, uint64_t s, uint64_t e,
     uint32_t orig_type, uint32_t new_type)
diff --git a/xen/arch/x86/guest/hyperv/hyperv.c b/xen/arch/x86/guest/hyperv/hyperv.c
index 6989af38f1..7617f94808 100644
--- a/xen/arch/x86/guest/hyperv/hyperv.c
+++ b/xen/arch/x86/guest/hyperv/hyperv.c
@@ -22,7 +22,8 @@ DEFINE_PER_CPU_READ_MOSTLY(void *, hv_vp_assist);
 DEFINE_PER_CPU_READ_MOSTLY(unsigned int, hv_vp_index);
 
 unsigned int __read_mostly hv_max_vp_index;
-static bool __read_mostly hcall_page_ready;
+static bool __ro_after_init hcall_page_ready;
+static unsigned long __ro_after_init hcall_page_mfn = INVALID_MFN_RAW;
 
 static uint64_t generate_guest_id(void)
 {
@@ -84,7 +85,6 @@ static void __init setup_hypercall_page(void)
 {
     union hv_x64_msr_hypercall_contents hypercall_msr;
     union hv_guest_os_id guest_id;
-    unsigned long mfn;
 
     BUILD_BUG_ON(HV_HYP_PAGE_SHIFT != PAGE_SHIFT);
 
@@ -98,18 +98,18 @@ static void __init setup_hypercall_page(void)
     rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
     if ( !hypercall_msr.enable )
     {
-        mfn = HV_HCALL_MFN;
         hypercall_msr.enable = 1;
-        hypercall_msr.guest_physical_address = mfn;
+        hypercall_msr.guest_physical_address = hcall_page_mfn;
         wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
     }
     else
-        mfn = hypercall_msr.guest_physical_address;
+        hcall_page_mfn = hypercall_msr.guest_physical_address;
 
     rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
     BUG_ON(!hypercall_msr.enable);
+    BUG_ON(hypercall_msr.guest_physical_address != hcall_page_mfn);
 
-    set_fixmap_x(FIX_X_HYPERV_HCALL, mfn << PAGE_SHIFT);
+    set_fixmap_x(FIX_X_HYPERV_HCALL, hcall_page_mfn << PAGE_SHIFT);
 
     hcall_page_ready = true;
 }
@@ -189,10 +189,10 @@ static int cf_check ap_setup(void)
 
 static void __init cf_check e820_fixup(void)
 {
-    uint64_t s = HV_HCALL_MFN << PAGE_SHIFT;
-
-    if ( !e820_add_range(s, s + PAGE_SIZE, E820_RESERVED) )
-        panic("Unable to reserve Hyper-V hypercall range\n");
+    printk(XENLOG_DEBUG "reserving hole for the hypercall page");
+    hcall_page_mfn = e820_reserve_hole() >> PAGE_SHIFT;
+    printk(XENLOG_INFO "hyperv: hypercall page %#lx",
+           hcall_page_mfn << PAGE_SHIFT);
 }
 
 static int cf_check flush_tlb(
diff --git a/xen/arch/x86/include/asm/e820.h b/xen/arch/x86/include/asm/e820.h
index 8e7644f887..74cbbea62d 100644
--- a/xen/arch/x86/include/asm/e820.h
+++ b/xen/arch/x86/include/asm/e820.h
@@ -26,6 +26,7 @@ struct e820map {
 extern int sanitize_e820_map(struct e820entry *biosmap, unsigned int *pnr_map);
 extern int e820_all_mapped(u64 start, u64 end, unsigned type);
 extern int reserve_e820_ram(struct e820map *map, uint64_t s, uint64_t e);
+extern uint64_t e820_reserve_hole(void);
 extern int e820_change_range_type(
     struct e820map *map, uint64_t s, uint64_t e,
     uint32_t orig_type, uint32_t new_type);
diff --git a/xen/arch/x86/include/asm/guest/hyperv.h b/xen/arch/x86/include/asm/guest/hyperv.h
index c05efdce71..5792e77104 100644
--- a/xen/arch/x86/include/asm/guest/hyperv.h
+++ b/xen/arch/x86/include/asm/guest/hyperv.h
@@ -10,9 +10,6 @@
 
 #include 
 
-/* Use top-most MFN for hypercall page */
-#define HV_HCALL_MFN   (((1ull << paddr_bits) - 1) >> HV_HYP_PAGE_SHIFT)
-
 /*
  * The specification says: "The partition reference time is computed
  * by the following formula:
-- 
2.43.0



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper ,
	Anthony PERARD 
Subject: [PATCH] x86/hvmloader: fix usage of NULL with cpuid_count()
Date: Thu, 24 Apr 2025 14:58:13 +0200
Message-ID: <20250424125813.96449-1-roger.pau@citrix.com>
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The commit that added support for retrieving the APIC IDs from the APs
introduced several usages of cpuid() with NULL parameters, which is not
handled by the underlying implementation.  For GCC I expect this results in
writes to the physical address at 0, however for Clang the generated code
in smp.o is:

tools/firmware/hvmloader/smp.o: file format elf32-i386

Disassembly of section .text:

00000000 :
       0: 55                            pushl   %ebp
       1: 89 e5                         movl    %esp, %ebp
       3: 53                            pushl   %ebx
       4: 31 c0                         xorl    %eax, %eax
       6: 31 c9                         xorl    %ecx, %ecx
       8: 0f a2                         cpuid

Showing the usage of a NULL pointer results in undefined behavior, and
clang refusing to generate further code after it.

Fix by using a temporary variable in cpuid_count() in place for any NULL
parameter.

Fixes: 9ad0db58c7e2 ('tools/hvmloader: Retrieve APIC IDs from the APs themselves')
Signed-off-by: Roger Pau Monné 
---
Could also be fixed by using the temporary variable in the call sites,
however that's more code in the call sites at the expense of less checking.
I don't think the extra NULL check logic in cpuid_count() is that bad.

Overall the solution proposed in this patch is safer going forward, as it
prevent issues like this from being introduced in the first place.
---
 tools/firmware/hvmloader/util.h | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/tools/firmware/hvmloader/util.h b/tools/firmware/hvmloader/util.h
index 644450c51ceb..765a013ddd9e 100644
--- a/tools/firmware/hvmloader/util.h
+++ b/tools/firmware/hvmloader/util.h
@@ -190,6 +190,17 @@ static inline void cpuid_count(
     uint32_t *ecx,
     uint32_t *edx)
 {
+    uint32_t tmp;
+
+    if ( !eax )
+        eax = &tmp;
+    if ( !ebx )
+        ebx = &tmp;
+    if ( !ecx )
+        ecx = &tmp;
+    if ( !edx )
+        edx = &tmp;
+
     asm volatile ( "cpuid"
                    : "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx)
                    : "a" (leaf), "c" (subleaf) );
-- 
2.48.1



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Date: Thu, 24 Apr 2025 15:04:39 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Andrew Cooper 
Cc: xen-devel@lists.xenproject.org,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich , Julien Grall ,
	Stefano Stabellini 
Subject: Re: [PATCH] xen: fix buffer over-read in bitmap_to_xenctl_bitmap()
Message-ID: 
References: <20250424103841.94828-1-roger.pau@citrix.com>
 <041d4bd5-962c-4600-b436-0ec214a6c6ca@citrix.com>
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On Thu, Apr 24, 2025 at 12:41:43PM +0100, Andrew Cooper wrote:
> On 24/04/2025 11:38 am, Roger Pau Monne wrote:
> > There's an off-by-one when calculating the last byte in the input array to
> > bitmap_to_xenctl_bitmap(), which leads to bitmaps with sizes multiple of 8
> > to over-read and incorrectly use a byte past the end of the array.
> 
> /sigh
> 
> > While there also ensure that bitmap_to_xenctl_bitmap() is not called with a
> > bitmap of 0 length.
> >
> > Fixes: 288c4641c80d ('xen: simplify bitmap_to_xenctl_bitmap for little endian')
> > Signed-off-by: Roger Pau Monné 
> 
> You ought to note that this is only not getting an XSA because
> 288c4641c80d isn't in a released Xen yet.

Yeah, I did explicitly check this wasn't backported to any stable
branches.

> > ---
> >  xen/common/bitmap.c | 8 +++++++-
> >  1 file changed, 7 insertions(+), 1 deletion(-)
> >
> > diff --git a/xen/common/bitmap.c b/xen/common/bitmap.c
> > index bf1a7fd91e36..415d6bc074f6 100644
> > --- a/xen/common/bitmap.c
> > +++ b/xen/common/bitmap.c
> > @@ -369,6 +369,12 @@ int bitmap_to_xenctl_bitmap(struct xenctl_bitmap *xenctl_bitmap,
> >      const uint8_t *bytemap;
> >      uint8_t last, *buf = NULL;
> >  
> > +    if ( !nbits )
> > +    {
> > +	ASSERT_UNREACHABLE();
> > +	return -EILSEQ;
> > +    }
> 
> I don't see any hypercalls performing a bits==0 check, so I expect this
> is reachable.

bitmap_to_xenctl_bitmap() has just two callers, one passes nr_cpu_ids,
the other MAX_NUMNODES.  I think there are no callers that pass 0,
much less from hypercall provided values.

> > +
> >      if ( !IS_ENABLED(LITTLE_ENDIAN) )
> >      {
> >          buf = xmalloc_array(uint8_t, xen_bytes);
> > @@ -396,7 +402,7 @@ int bitmap_to_xenctl_bitmap(struct xenctl_bitmap *xenctl_bitmap,
> >       * their loops to 8 bits. Ensure we clear those left over bits so as to
> >       * prevent surprises.
> >       */
> > -    last = bytemap[nbits / 8];
> > +    last = bytemap[(nbits - 1) / 8];
> >      if ( nbits % 8 )
> >          last &= (1U << (nbits % 8)) - 1;
> >  
> 
> This (preexisting) logic is mad.  The overwhelming majority of cases are
> going to be a multiple of 8, and as you notice, the 0 case can't be
> fixed like this.

It's indeed a weird logic.  The usage of last should be restricted to
nbits % 8 != 0, and the rest of the cases handled directly by the
copy_to_guest() call above this logic.

> It should all be inside a copy_bytes conditional as is done in
> xenctl_bitmap_to_bitmap().

I could do it like that, but seeing the values passed by the only two
callers it seemed less churn to add early check and assert.

Thanks, Roger.


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Date: Thu, 24 Apr 2025 15:13:58 +0200
From: Fabian Specht 
To: Andrew Cooper , 
	xen-devel@lists.xenproject.org
Cc: manuel.andreas@tum.de
Subject: Re: UBSan bug in real mode fpu emulation
Message-ID: 
References: 
 <7e3b941d-ec4e-4158-8844-a3cf236c8d4d@citrix.com>
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> > if ( !s->rex_prefix )
> > {
> > 	/* Convert 32-bit real/vm86 to 32-bit prot format. */
> > 	unsigned int fip = fpstate.env.mode.real.fip_lo +
> > 					   (fpstate.env.mode.real.fip_hi << 16);
> > 	unsigned int fdp = fpstate.env.mode.real.fdp_lo +
> > 					   (fpstate.env.mode.real.fdp_hi << 16);
> > 	unsigned int fop = fpstate.env.mode.real.fop;
> >
> > 	fpstate.env.mode.prot.fip = fip & 0xf;
> > 	fpstate.env.mode.prot.fcs = fip >> 4;
> > 	fpstate.env.mode.prot.fop = fop;
> > 	fpstate.env.mode.prot.fdp = fdp & 0xf;
> > 	fpstate.env.mode.prot.fds = fdp >> 4;
> > }

> Several things. First, please always the UBSAN analysis from the crash.

(XEN) UBSAN: Undefined behaviour in arch/x86/x86_emulate/blk.c:87:66
(XEN) left shift of 65535 by 16 places cannot be represented in type 'int'
(XEN) ----[ Xen-4.20.0  x86_64  debug=y ubsan=y  Tainted:     H  ]----
(XEN) CPU:    2
(XEN) RIP:    e008:[] common/ubsan/ubsan.c#ubsan_epilogue+0xa/0xd2
(XEN) RFLAGS: 0000000000010092   CONTEXT: hypervisor (d1v0)
(XEN) rax: 0000000000000000   rbx: ffff830176baf6c8   rcx: 00000000000004ce
(XEN) rdx: ffff830176baffd0   rsi: 0000000000000002   rdi: ffff830176baf6c8
(XEN) rbp: ffff830176baf660   rsp: ffff830176baf650   r8:  00000000ffffffff
(XEN) r9:  0000000000000000   r10: ffff830176baf670   r11: 0000000000000000
(XEN) r12: ffff82d040877992   r13: 0000000000000010   r14: 000000000000ffff
(XEN) r15: ffff82d040877992   cr0: 0000000080050033   cr4: 00000000003506e0
(XEN) cr3: 000000010089c000   cr2: 0000000000000000
(XEN) fsb: 0000000000000000   gsb: 0000000000000000   gss: 0000000000000000
(XEN) ds: 0000   es: 0000   fs: 0033   gs: 0033   ss: 0000   cs: e008
(XEN) Xen code around  (common/ubsan/ubsan.c#ubsan_epilogue+0xa/0xd2):
(XEN)  89 e5 41 54 53 48 89 fb <0f> 0b 48 8d 3d 3a b6 36 00 e8 f3 95 00 00 48 85
(XEN) Xen stack trace from rsp=ffff830176baf650:
(XEN)    ffffffffffffffff ffff82d040877992 ffff830176baf6f8 ffff82d040320d8e
(XEN)    ffff82d0405603e3 ffff003533353536 ffff830176bafe10 ffff830176baf728
(XEN)    ffff82d04056076d ffff82e002017b00 0000000776003631 ffff830100882000
(XEN)    ffff830176baf770 0000000000000117 ffff830176baf778 0000000000000202
(XEN)    ffff830100bd8fd0 000000000000ffff 000000000000001c 00000000ffffffff
(XEN)    000000000000ffff ffff830176baf7b8 ffff82d04053c6a0 ffff830176bafce8
(XEN)    0000000000117fd0 0000000000000001 ffffffff76bafe08 ffffffffffffffff
(XEN)    ffffffffffffffff ffffffffffffffff ffff830176baf770 0000000100000001
(XEN)    ffff83010095b000 0000000000000001 0000000000117fd0 0000000076bafd68
(XEN)    ffff82e002017b00 0000000000117fd0 0000000300000003 0000000000000117
(XEN)    0000000000000001 000000000000001c ffff830100bd8fd0 ffff830176bafce8
(XEN)    ffff830176bafaa0 ffff830176baf808 ffff82d0404176a8 ffff830176bafba8
(XEN)    0000000000000000 0000000000117fd0 ffff830176bafce8 ffff830176bafaa0
(XEN)    ffff82d0404175e8 ffff830176bafa30 000000000000001c ffff830176baf880
(XEN)    ffff82d040545817 ffff830176bafce8 ffff830100000000 ffff82d07fffc140
(XEN)    ffff830176bafb18 ffff830176bafba8 ffff830100000080 0000000000010010
(XEN)    ffff83010000000b 0000000000000001 ffff830176bafef8 0000000000000000
(XEN)    ffff8301795d0010 0000000000000000 ffff830176bafc10 ffff82d0405e8400
(XEN)    ffff830176bafa9c ffff830176bafa24 ffff830176baf9c0 0000000000000000
(XEN)    0000000000000000 ffff830176bafc30 ffff82d0405d8d6b ffff830176baf968
(XEN) Xen call trace:
(XEN)    [] R common/ubsan/ubsan.c#ubsan_epilogue+0xa/0xd2
(XEN)    [] F __ubsan_handle_shift_out_of_bounds+0x11c/0x1d1
(XEN)    [] F x86_emul_blk+0x3d8/0x117d
(XEN)    [] F arch/x86/hvm/emulate.c#hvmemul_blk+0xc0/0x138
(XEN)    [] F x86emul_fpu+0x207e/0x819b
(XEN)    [] F x86_emulate+0x1527b/0x3ecb3
(XEN)    [] F x86_emulate_wrapper+0x87/0x216
(XEN)    [] F arch/x86/hvm/emulate.c#_hvm_emulate_one+0x256/0x60f
(XEN)    [] F hvm_emulate_one+0x12/0x14
(XEN)    [] F hvm_ud_intercept+0x1e7/0x4c1
(XEN)    [] F svm_vmexit_handler+0x1bc1/0x2d70
(XEN)    [] F svm_stgi_label+0x5/0x15
(XEN) 

> There are several different ways that shifts go wrong, and I suspect
> this is a shift into a sign bit, which is notable given the unsigned
> underlying type.

Might be, but I am not entirely sure. Either way, it should be fixed
through a simple cast to unsigned int I think.

> Also, are you aware that the test isn't properly in Real Mode? It's in
> so-called unreal mode (not actually a real mode, but a consequence of
> how the segment registers work), which is relevant to how you manage to
> re-enter the emulator for FLDENV.

Yes I am aware. But the bug should be triggered regardless of the
current mode, right?

~Fabian


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Date: Thu, 24 Apr 2025 15:30:03 +0200
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Subject: Re: [PATCH v1 03/14] xen/riscv: introduce ioremap()
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: 
 <6d91eeabe2735de93bfcf2a2420e2059a8f35e52.1744126720.git.oleksii.kurochko@gmail.com>
 <84089b6d-efeb-4613-85b9-eb10d11d7338@suse.com>
 
 <6b226b72-11a4-4004-b42d-0e280de83539@suse.com>
 
 
 <7d5356a5-53b7-4d1b-82ff-bc6f81a2f445@gmail.com>
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 <28142d86-0845-4bb3-a0bb-e4903f898abf@suse.com>
Content-Language: en-US
From: Oleksii Kurochko 
In-Reply-To: <28142d86-0845-4bb3-a0bb-e4903f898abf@suse.com>

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On 4/22/25 11:14 AM, Jan Beulich wrote:
> On 22.04.2025 10:40, Oleksii Kurochko wrote:
>> On 4/17/25 4:49 PM, Jan Beulich wrote:
>>> On 17.04.2025 16:37, Oleksii Kurochko wrote:
>>>> On 4/17/25 4:24 PM, Jan Beulich wrote:
>>>>> On 17.04.2025 16:20, Oleksii Kurochko wrote:
>>>>>> On 4/15/25 1:02 PM, Jan Beulich wrote:
>>>>>>> On 15.04.2025 12:29, Oleksii Kurochko wrote:
>>>>>>>> On 4/10/25 5:13 PM, Jan Beulich wrote:
>>>>>>>>> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>>>>>>>>>> Based on RISC-V unpriviliged spec ( Version 20240411 ):
>>>>>>>>>> ```
>>>>>>>>>> For implementations that conform to the RISC-V Unix Platform Specification,
>>>>>>>>>> I/O devices and DMA operations are required to access memory coherently and
>>>>>>>>>> via strongly ordered I/O channels. Therefore, accesses to regular main memory
>>>>>>>>>> regions that are concurrently accessed by external devices can also use the
>>>>>>>>>> standard synchronization mechanisms. Implementations that do not conform
>>>>>>>>>> to the Unix Platform Specification and/or in which devices do not access
>>>>>>>>>> memory coherently will need to use mechanisms
>>>>>>>>>> (which are currently platform-specific or device-specific) to enforce
>>>>>>>>>> coherency.
>>>>>>>>>>
>>>>>>>>>> I/O regions in the address space should be considered non-cacheable
>>>>>>>>>> regions in the PMAs for those regions. Such regions can be considered coherent
>>>>>>>>>> by the PMA if they are not cached by any agent.
>>>>>>>>>> ```
>>>>>>>>>> and [1]:
>>>>>>>>>> ```
>>>>>>>>>> The current riscv linux implementation requires SOC system to support
>>>>>>>>>> memory coherence between all I/O devices and CPUs. But some SOC systems
>>>>>>>>>> cannot maintain the coherence and they need support cache clean/invalid
>>>>>>>>>> operations to synchronize data.
>>>>>>>>>>
>>>>>>>>>> Current implementation is no problem with SiFive FU540, because FU540
>>>>>>>>>> keeps all IO devices and DMA master devices coherence with CPU. But to a
>>>>>>>>>> traditional SOC vendor, it may already have a stable non-coherency SOC
>>>>>>>>>> system, the need is simply to replace the CPU with RV CPU and rebuild
>>>>>>>>>> the whole system with IO-coherency is very expensive.
>>>>>>>>>> ```
>>>>>>>>>>
>>>>>>>>>> and the fact that all known ( to me ) CPUs that support the H-extension
>>>>>>>>>> and that ones is going to be supported by Xen have memory coherency
>>>>>>>>>> between all I/O devices and CPUs, so it is currently safe to use the
>>>>>>>>>> PAGE_HYPERVISOR attribute.
>>>>>>>>>> However, in cases where a platform does not support memory coherency, it
>>>>>>>>>> should support CMO extensions and Svpbmt. In this scenario, updates to
>>>>>>>>>> ioremap will be necessary.
>>>>>>>>>> For now, a compilation error will be generated to ensure that the need to
>>>>>>>>>> update ioremap() is not overlooked.
>>>>>>>>>>
>>>>>>>>>> [1]https://patchwork.kernel.org/project/linux-riscv/patch/1555947870-23014-1-git-send-email-guoren@kernel.org/
>>>>>>>>> But MMIO access correctness isn't just a matter of coherency. There may not
>>>>>>>>> be any caching involved in most cases, or else you may observe significantly
>>>>>>>>> delayed or even dropped (folded with later ones) writes, and reads may be
>>>>>>>>> serviced from the cache instead of going to actual MMIO. Therefore ...
>>>>>>>>>
>>>>>>>>>> --- a/xen/arch/riscv/Kconfig
>>>>>>>>>> +++ b/xen/arch/riscv/Kconfig
>>>>>>>>>> @@ -15,6 +15,18 @@ config ARCH_DEFCONFIG
>>>>>>>>>>       	string
>>>>>>>>>>       	default "arch/riscv/configs/tiny64_defconfig"
>>>>>>>>>>       
>>>>>>>>>> +config HAS_SVPBMT
>>>>>>>>>> +	bool
>>>>>>>>>> +	help
>>>>>>>>>> +	  This config enables usage of Svpbmt ISA-extension ( Supervisor-mode:
>>>>>>>>>> +	  page-based memory types).
>>>>>>>>>> +
>>>>>>>>>> +	  The memory type for a page contains a combination of attributes
>>>>>>>>>> +	  that indicate the cacheability, idempotency, and ordering
>>>>>>>>>> +	  properties for access to that page.
>>>>>>>>>> +
>>>>>>>>>> +	  The Svpbmt extension is only available on 64-bit cpus.
>>>>>>>>> ... I kind of expect this extension (or anything else that there might be) will need
>>>>>>>>> making use of.
>>>>>>>> In cases where the Svpbmt extension isn't available, PMA (Physical Memory Attributes)
>>>>>>>> is used to control which memory regions are cacheable, non-cacheable, readable, writable,
>>>>>>>> etc. PMA is configured in M-mode by the firmware (e.g., OpenSBI), as is done in Andes
>>>>>>>> cores, or it can be fixed at design time, as in SiFive cores.
>>>>>>> How would things work if there was a need to map a RAM page uncacheable (via
>>>>>>> ioremap() or otherwise)?
>>>>>> My understanding is that Svpbmt is only needed when someone wants to change the memory
>>>>>> attribute of a page set by PMA.
>>>>>>
>>>>>> The question is if non-cacheable RAM page is really needed if we have a coherency?
>>>>> Aiui coherency here is among CPUs.
>>>> ```
>>>> For implementations that conform to the RISC-V Unix Platform Specification,
>>>> I/O devices and DMA operations are required to access memory coherently and
>>>> via strongly ordered I/O channels. Therefore, accesses to regular main memory
>>>> regions that are concurrently accessed by external devices can also use the
>>>> standard synchronization mechanisms. Implementations that do not conform
>>>> to the Unix Platform Specification and/or in which devices do not access
>>>> memory coherently will need to use mechanisms
>>>> (which are currently platform-specific or device-specific) to enforce
>>>> coherency.
>>>> ```
>>>> Based on this from the spec, coherency here is not only among CPUs.
>>>>
>>>>
>>>>> Properties of devices in the system are
>>>>> largely unknown?
>>>> Yes, but still not sure what kind of property requires ioremap() which won't work
>>>> without Svpmbt. Could you please tell me an example?
>>> Well, above you said they all need to access memory coherently. That's the
>>> "property" I was referring to.
>> Do you mean that device could have a property which tell that it would like to have non-cachable
>> region used for that? I haven't seen such property in device tree files.
>>
>> Do we have in Xen cases when Xen wants to have map part of RAM as non-cachebale and it is only the
>> one option?
> On x86 we have the case that IOMMUs may access memory non-coherently. This is
> particular means that IOMMU page table updates (which necessarily live in RAM)
> need to be done quite carefully. As it's all our code, we deal with the
> situation by issuing cache flushes, avoiding the need for UC mappings.
>
> Graphics engines may have similar constraints, aiui. With the driver code not
> being part of Xen, we wouldn't be able to use a similar "simplification" there.
> UC mappings would be pretty much unavoidable.

For this case, it would be better to have Svpmbt.

I would like to noted that Svpmbt isn't supported by RV32 architectures. For such cases, it will be still
needed to play with PMA.
I found today a patch in Linux kernel which does something similar to what I wrote in one of my previous
replies:
   [0]https://lore.kernel.org/all/20241102000843.1301099-1-samuel.holland@sifive.com/
In the cover letter [0] it is mentioned the following:
   On some RISC-V platforms, including StarFive JH7100 and ESWIN EIC7700,
   RAM is mapped to multiple physical address ranges, with each alias
   having a different set of statically-determined Physical Memory
   Attributes (PMAs). Software selects the PMAs for a page by choosing a
   PFN from the corresponding physical address range. On these platforms,
   this is the only way to allocate noncached memory for use with
   noncoherent DMA.

So firmware should configure PMAs so some part of RAM is noncached and then kernel get this info based
on the binding:
   https://patchew.org/linux/20241102000843.1301099-1-samuel.holland@sifive.com/20241102000843.1301099-2-samuel.holland@sifive.com/

Considering that this feature isn't available even in Linux kernel, we can start with assumption that all
our SoCs will support Svpmbt.

We don't really care about StarFive JH7100 as it doesn't support H extension, but we potentially should care
about ESWIN EIC7700, which support H extension and doesn't support Svpmbt extension according to a datasheet
publicly available:
   Each EIC7700X core is configured to support the RV64I base ISA, as well as the Multiply (M), Atomic(A),
   Single-Precision Floating Point (F), Double-Precision Floating Point (D), Compressed (C), CSR
   Instructions (Zicsr), Instruction-Fetch Fence (Zifencei), Address Calculation (Zba), Basic Bit
   Manipulation (Zbb), and Count Overflow and Mode-Based Filtering (Sscofpmf) RISC‑V extensions. This
   is captured by the RISC‑V extension string: RV64GC_Zba_Zbb_Sscofpmf.

>
>> I am also thinking why it can't be used cachable region + barrier (if we don't have memory coherency
>> for everything).
> Not sure what exactly you're asking here (if anything). An answer would very
> likely depend on the specific kind of barrier you're thinking about. The
> question would be what, if any, effect a barrier would have on the cache(s).

I confused barrier with cache flushes (when I wrote that I thought about the case of DMA that we don't really
should have requirement of non-cachable memory for DMA as it is enough to have memory fence between use of DMA
memory and MMIO that triggers the dma), basically I meant what you wrote above about x86's IOMMUs.

~ Oleksii

>
>> Anyway, if it isn't an option to have mapped cacheble region + barrier then there is no any choice
>> and the support of Svpmbt is required.
> Quite possible.
>
> Jan
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On 4/22/25 11:14 AM, Jan Beulich wrote:

    

    

      
On 22.04.2025 10:40, Oleksii Kurochko wrote:


      

        
On 4/17/25 4:49 PM, Jan Beulich wrote:


        

          
On 17.04.2025 16:37, Oleksii Kurochko wrote:


          

            
On 4/17/25 4:24 PM, Jan Beulich wrote:


            

              
On 17.04.2025 16:20, Oleksii Kurochko wrote:


              

                
On 4/15/25 1:02 PM, Jan Beulich wrote:


                

                  
On 15.04.2025 12:29, Oleksii Kurochko wrote:


                  

                    
On 4/10/25 5:13 PM, Jan Beulich wrote:


                    

                      
On 08.04.2025 17:57, Oleksii Kurochko wrote:


                      

                        
Based on RISC-V unpriviliged spec ( Version 20240411 ):
```
For implementations that conform to the RISC-V Unix Platform Specification,
I/O devices and DMA operations are required to access memory coherently and
via strongly ordered I/O channels. Therefore, accesses to regular main memory
regions that are concurrently accessed by external devices can also use the
standard synchronization mechanisms. Implementations that do not conform
to the Unix Platform Specification and/or in which devices do not access
memory coherently will need to use mechanisms
(which are currently platform-specific or device-specific) to enforce
coherency.

I/O regions in the address space should be considered non-cacheable
regions in the PMAs for those regions. Such regions can be considered coherent
by the PMA if they are not cached by any agent.
```
and [1]:
```
The current riscv linux implementation requires SOC system to support
memory coherence between all I/O devices and CPUs. But some SOC systems
cannot maintain the coherence and they need support cache clean/invalid
operations to synchronize data.

Current implementation is no problem with SiFive FU540, because FU540
keeps all IO devices and DMA master devices coherence with CPU. But to a
traditional SOC vendor, it may already have a stable non-coherency SOC
system, the need is simply to replace the CPU with RV CPU and rebuild
the whole system with IO-coherency is very expensive.
```

and the fact that all known ( to me ) CPUs that support the H-extension
and that ones is going to be supported by Xen have memory coherency
between all I/O devices and CPUs, so it is currently safe to use the
PAGE_HYPERVISOR attribute.
However, in cases where a platform does not support memory coherency, it
should support CMO extensions and Svpbmt. In this scenario, updates to
ioremap will be necessary.
For now, a compilation error will be generated to ensure that the need to
update ioremap() is not overlooked.

[1]https://patchwork.kernel.org/project/linux-riscv/patch/1555947870-23014-1-git-send-email-guoren@kernel.org/


                      

                      
But MMIO access correctness isn't just a matter of coherency. There may not
be any caching involved in most cases, or else you may observe significantly
delayed or even dropped (folded with later ones) writes, and reads may be
serviced from the cache instead of going to actual MMIO. Therefore ...



                      

                        
--- a/xen/arch/riscv/Kconfig
+++ b/xen/arch/riscv/Kconfig
@@ -15,6 +15,18 @@ config ARCH_DEFCONFIG
     	string
     	default "arch/riscv/configs/tiny64_defconfig"
     
+config HAS_SVPBMT
+	bool
+	help
+	  This config enables usage of Svpbmt ISA-extension ( Supervisor-mode:
+	  page-based memory types).
+
+	  The memory type for a page contains a combination of attributes
+	  that indicate the cacheability, idempotency, and ordering
+	  properties for access to that page.
+
+	  The Svpbmt extension is only available on 64-bit cpus.


                      

                      
... I kind of expect this extension (or anything else that there might be) will need
making use of.


                    

                    
In cases where the Svpbmt extension isn't available, PMA (Physical Memory Attributes)
is used to control which memory regions are cacheable, non-cacheable, readable, writable,
etc. PMA is configured in M-mode by the firmware (e.g., OpenSBI), as is done in Andes
cores, or it can be fixed at design time, as in SiFive cores.


                  

                  
How would things work if there was a need to map a RAM page uncacheable (via
ioremap() or otherwise)?


                

                
My understanding is that Svpbmt is only needed when someone wants to change the memory
attribute of a page set by PMA.

The question is if non-cacheable RAM page is really needed if we have a coherency?


              

              
Aiui coherency here is among CPUs.


            

            
```
For implementations that conform to the RISC-V Unix Platform Specification,
I/O devices and DMA operations are required to access memory coherently and
via strongly ordered I/O channels. Therefore, accesses to regular main memory
regions that are concurrently accessed by external devices can also use the
standard synchronization mechanisms. Implementations that do not conform
to the Unix Platform Specification and/or in which devices do not access
memory coherently will need to use mechanisms
(which are currently platform-specific or device-specific) to enforce
coherency.
```
Based on this from the spec, coherency here is not only among CPUs.




            

              
Properties of devices in the system are
largely unknown?


            

            
Yes, but still not sure what kind of property requires ioremap() which won't work
without Svpmbt. Could you please tell me an example?


          

          
Well, above you said they all need to access memory coherently. That's the
"property" I was referring to.


        

        
Do you mean that device could have a property which tell that it would like to have non-cachable
region used for that? I haven't seen such property in device tree files.

Do we have in Xen cases when Xen wants to have map part of RAM as non-cachebale and it is only the
one option?


      

      
On x86 we have the case that IOMMUs may access memory non-coherently. This is
particular means that IOMMU page table updates (which necessarily live in RAM)
need to be done quite carefully. As it's all our code, we deal with the
situation by issuing cache flushes, avoiding the need for UC mappings.

Graphics engines may have similar constraints, aiui. With the driver code not
being part of Xen, we wouldn't be able to use a similar "simplification" there.
UC mappings would be pretty much unavoidable.

    

    
For this case, it would be better to have Svpmbt.

I would like to noted that Svpmbt isn't supported by RV32 architectures. For such cases, it will be still
needed to play with PMA.
I found today a patch in Linux kernel which does something similar to what I wrote in one of my previous
replies:
  [0] https://lore.kernel.org/all/20241102000843.1301099-1-samuel.holland@sifive.com/
In the cover letter [0] it is mentioned the following:
  On some RISC-V platforms, including StarFive JH7100 and ESWIN EIC7700,
  RAM is mapped to multiple physical address ranges, with each alias
  having a different set of statically-determined Physical Memory
  Attributes (PMAs). Software selects the PMAs for a page by choosing a
  PFN from the corresponding physical address range. On these platforms,
  this is the only way to allocate noncached memory for use with
  noncoherent DMA.

So firmware should configure PMAs so some part of RAM is noncached and then kernel get this info based
on the binding:
  https://patchew.org/linux/20241102000843.1301099-1-samuel.holland@sifive.com/20241102000843.1301099-2-samuel.holland@sifive.com/

Considering that this feature isn't available even in Linux kernel, we can start with assumption that all
our SoCs will support Svpmbt.

We don't really care about StarFive JH7100 as it doesn't support H extension, but we potentially should care
about ESWIN EIC7700, which support H extension and doesn't support Svpmbt extension according to a datasheet
publicly available:
  Each EIC7700X core is configured to support the RV64I base ISA, as well as the Multiply (M), Atomic(A),
  Single-Precision Floating Point (F), Double-Precision Floating Point (D), Compressed (C), CSR
  Instructions (Zicsr), Instruction-Fetch Fence (Zifencei), Address Calculation (Zba), Basic Bit
  Manipulation (Zbb), and Count Overflow and Mode-Based Filtering (Sscofpmf) RISC‑V extensions. This
  is captured by the RISC‑V extension string: RV64GC_Zba_Zbb_Sscofpmf.



    

      



      

        
I am also thinking why it can't be used cachable region + barrier (if we don't have memory coherency
for everything).


      

      
Not sure what exactly you're asking here (if anything). An answer would very
likely depend on the specific kind of barrier you're thinking about. The
question would be what, if any, effect a barrier would have on the cache(s).

    

    
I confused barrier with cache flushes (when I wrote that I thought about the case of DMA that we don't really
should have requirement of non-cachable memory for DMA as it is enough to have memory fence between use of DMA
memory and MMIO that triggers the dma), basically I meant what you wrote above about x86's IOMMUs.

~ Oleksii


    

      



      

        
Anyway, if it isn't an option to have mapped cacheble region + barrier then there is no any choice
and the support of Svpmbt is required.


      

      
Quite possible.

Jan


    

  


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Date: Thu, 24 Apr 2025 15:41:37 +0200
From: Anthony PERARD 
To: Juergen Gross 
Cc: xen-devel@lists.xenproject.org, Jan Beulich ,
	Andrew Cooper ,
	Roger Pau =?iso-8859-1?Q?Monn=E9?= ,
	Anthony PERARD ,
	Nick Rosbrook ,
	George Dunlap ,
	Marek =?iso-8859-1?Q?Marczykowski-G=F3recki?= 
Subject: Re: [PATCH v2 3/6] tools: remove support for running a guest with
 qemu-traditional
Message-ID: 
References: <20250408123526.14613-1-jgross@suse.com>
 <20250408123526.14613-4-jgross@suse.com>
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In-Reply-To: <20250408123526.14613-4-jgross@suse.com>

On Tue, Apr 08, 2025 at 02:35:21PM +0200, Juergen Gross wrote:
> diff --git a/tools/firmware/hvmloader/pci.c b/tools/firmware/hvmloader/pci.c
> index c3c61ca060..a00acdd45b 100644
> --- a/tools/firmware/hvmloader/pci.c
> +++ b/tools/firmware/hvmloader/pci.c
> @@ -113,19 +113,9 @@ void pci_setup(void)
>       * increase the size of the lowmem MMIO hole?  Defaulting to 1

This say "default to 1", but the default is changing to 0 instead.

>       * here will mean that non-libxl toolstacks (including xend and
>       * home-grown ones) means that those using qemu-xen will still
> -     * experience the memory relocation bug described below; but it
> -     * also means that those using qemu-traditional will *not*
> -     * experience any change; and it also means that there is a
> -     * work-around for those using qemu-xen, namely switching to
> -     * qemu-traditional.
> -     *
> -     * If we defaulted to 0, and failing to resize the hole caused any
> -     * problems with qemu-traditional, then there is no work-around.
> -     *
> -     * Since xend can only use qemu-traditional, I think this is the
> -     * option that will have the least impact.
> +     * experience the memory relocation bug described below.
>       */
> -    bool allow_memory_relocate = 1;
> +    bool allow_memory_relocate = 0;

I would keep this as 1. libxl does set it to 0 so there's no need to
change the default here. I don't know if non-libxl toolstack will set
the xenstore entry "hvmloader/allow-memory-relocate" with "1" if they
need it.

>  
>      BUILD_BUG_ON((typeof(*pci_devfn_decode_type))PCI_COMMAND_IO !=
>                   PCI_COMMAND_IO);
> @@ -347,10 +337,7 @@ void pci_setup(void)
>      {
>          /*
>           * At the moment qemu-xen can't deal with relocated memory regions.
> -         * It's too close to the release to make a proper fix; for now,
> -         * only allow the MMIO hole to grow large enough to move guest memory
> -         * if we're running qemu-traditional.  Items that don't fit will be
> -         * relocated into the 64-bit address space.
> +         * It's too close to the release to make a proper fix.

I feel like this is removing too much information. Maybe instead of "if
we are running qemu-traditional", we could have "if
allow_memory_relocate is true".

>           *
>           * This loop now does the following:
>           * - If allow_memory_relocate, increase the MMIO hole until it's
> diff --git a/tools/firmware/hvmloader/util.c b/tools/firmware/hvmloader/util.c
> index 2d07ce1290..79c0e6bd4a 100644
> --- a/tools/firmware/hvmloader/util.c
> +++ b/tools/firmware/hvmloader/util.c
> @@ -843,14 +843,7 @@ void hvmloader_acpi_build_tables(struct acpi_config *config,
>  
>      /* If the device model is specified switch to the corresponding tables */
>      s = xenstore_read("platform/device-model", "");
> -    if ( !strncmp(s, "qemu_xen_traditional", 21) )
> -    {
> -        config->dsdt_anycpu = dsdt_anycpu;
> -        config->dsdt_anycpu_len = dsdt_anycpu_len;
> -        config->dsdt_15cpu = dsdt_15cpu;
> -        config->dsdt_15cpu_len = dsdt_15cpu_len;

Those `dsdt_anycpu` and `dsdt_15cpu` blob are still built in. The are
both associated with qemu-trad so should not be included in hvmloader
anymore.

> -    }
> -    else if ( !strncmp(s, "qemu_xen", 9) )
> +    if ( !strncmp(s, "qemu_xen", 9) )
>      {
>          config->dsdt_anycpu = dsdt_anycpu_qemu_xen;
>          config->dsdt_anycpu_len = dsdt_anycpu_qemu_xen_len;
> diff --git a/tools/golang/xenlight/types.gen.go b/tools/golang/xenlight/types.gen.go
> index e7667f1ce3..02c4d8d123 100644
> --- a/tools/golang/xenlight/types.gen.go
> +++ b/tools/golang/xenlight/types.gen.go
> @@ -70,7 +70,6 @@ ChannelConnectionSocket ChannelConnection = 2
>  type DeviceModelVersion int
>  const(
>  DeviceModelVersionUnknown DeviceModelVersion = 0
> -DeviceModelVersionQemuXenTraditional DeviceModelVersion = 1
>  DeviceModelVersionQemuXen DeviceModelVersion = 2
>  )
>  
> diff --git a/tools/libacpi/mk_dsdt.c b/tools/libacpi/mk_dsdt.c
> index 34f6753f61..396e3e01e2 100644
> --- a/tools/libacpi/mk_dsdt.c
> +++ b/tools/libacpi/mk_dsdt.c
> @@ -105,7 +80,7 @@ int main(int argc, char **argv)
>  {
>      unsigned int cpu, max_cpus;
>  #if defined(CONFIG_X86)
> -    dm_version dm_version = QEMU_XEN_TRADITIONAL;
> +    dm_version dm_version = QEMU_XEN;

This change means that we are going to have "dsdt_anycpu" (.asl and blob)
been the same as "dsdt_anycpu_qemu_xen". Instead of changing the
default, could you ensure that `--dm-version` is provided on the command
line or return an error? No more default `dm_version`.

>      unsigned int slot, dev, intx, link;
>  
>      max_cpus = HVM_MAX_VCPUS;
> diff --git a/tools/libs/light/libxl_create.c b/tools/libs/light/libxl_create.c
> index e03599ea99..9c56c4c9e5 100644
> --- a/tools/libs/light/libxl_create.c
> +++ b/tools/libs/light/libxl_create.c
> @@ -100,12 +100,7 @@ int libxl__domain_build_info_setdefault(libxl__gc *gc,
>  
>      if (!b_info->device_model_version) {

A lot more can be removed in this blocks. In all cases, we set
device_model_version=qemu-xen. Which mean it's qemu-xen in the condition
just after.

>          if (b_info->type == LIBXL_DOMAIN_TYPE_HVM) {
> -            if (libxl_defbool_val(b_info->device_model_stubdomain)) {
> -                b_info->device_model_version =
> -                    LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL;
> -            } else {
> -                b_info->device_model_version = LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN;
> -            }
> +            b_info->device_model_version = LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN;
>          } else {
>              b_info->device_model_version =
>                  LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN;
> @@ -117,16 +112,8 @@ int libxl__domain_build_info_setdefault(libxl__gc *gc,
>              dm = libxl__domain_device_model(gc, b_info);
>              rc = access(dm, X_OK);
>              if (rc < 0) {
> -                /* qemu-xen unavailable, use qemu-xen-traditional */
> -                if (errno == ENOENT) {
> -                    LOGE(INFO, "qemu-xen is unavailable"
> -                         ", using qemu-xen-traditional instead");
> -                    b_info->device_model_version =
> -                        LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL;
> -                } else {
> -                    LOGE(ERROR, "qemu-xen access error");
> -                    return ERROR_FAIL;
> -                }
> +                LOGE(ERROR, "qemu-xen access error");
> +                return ERROR_FAIL;
>              }
>          }
>      }
> diff --git a/tools/libs/light/libxl_dm.c b/tools/libs/light/libxl_dm.c
> index b193a5dc37..4146ee0ea1 100644
> --- a/tools/libs/light/libxl_dm.c
> +++ b/tools/libs/light/libxl_dm.c
> @@ -2429,16 +2155,11 @@ void libxl__spawn_stub_dm(libxl__egc *egc, libxl__stub_dm_spawn_state *sdss)
>                          "%s",
>                          libxl_bios_type_to_string(guest_config->b_info.u.hvm.bios));
>      }
> -    /* Disable relocating memory to make the MMIO hole larger
> -     * unless we're running qemu-traditional and vNUMA is not
> -     * configured. */
> +    /* Disable relocating memory to make the MMIO hole larger. */

I don't think this sentence as the right meaning :-). I feel like this
read as " the following make the MMIO hole larger", but I think it is
just an explanation of what "relocating memory" mean, and what is
messing.

We might want to rewrite the comment, "disable relocating memory, see
comment in hvmloader about the meaning". Or "disable relocating memory,
having a lager MMIO hole isn't implemented with qemu-xen". Or something
like that.

There's the same comment in the non-stubdom code path
(device_model_launch) just below..

>      libxl__xs_printf(gc, XBT_NULL,
>                       libxl__sprintf(gc, "%s/hvmloader/allow-memory-relocate",
>                                      libxl__xs_get_dompath(gc, guest_domid)),
> -                     "%d",
> -                     guest_config->b_info.device_model_version
> -                        == LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL &&
> -                     !libxl__vnuma_configured(&guest_config->b_info));
> +                     "0");
>      ret = xc_domain_set_target(ctx->xch, dm_domid, guest_domid);
>      if (ret<0) {
>          LOGED(ERROR, guest_domid, "setting target domain %d -> %d",
> @@ -3162,26 +2879,16 @@ static void device_model_launch(libxl__egc *egc,
>          libxl__xs_printf(gc, XBT_NULL,
>                           GCSPRINTF("%s/hvmloader/bios", path),
>                           "%s", libxl_bios_type_to_string(b_info->u.hvm.bios));
> -        /* Disable relocating memory to make the MMIO hole larger
> -         * unless we're running qemu-traditional and vNUMA is not
> -         * configured. */
> +        /* Disable relocating memory to make the MMIO hole larger. */
>          libxl__xs_printf(gc, XBT_NULL,
>                           GCSPRINTF("%s/hvmloader/allow-memory-relocate", path),
> -                         "%d",
> -                         b_info->device_model_version==LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL &&
> -                         !libxl__vnuma_configured(b_info));
> +                         "0");
>          free(path);
>      }
>  
> diff --git a/tools/libs/light/libxl_dom_suspend.c b/tools/libs/light/libxl_dom_suspend.c
> index 6091a5f3f6..f0a74fc82c 100644
> --- a/tools/libs/light/libxl_dom_suspend.c
> +++ b/tools/libs/light/libxl_dom_suspend.c
> @@ -85,15 +85,8 @@ void libxl__domain_suspend_device_model(libxl__egc *egc,
>      STATE_AO_GC(dsps->ao);
>      int rc = 0;
>      uint32_t const domid = dsps->domid;
> -    const char *const filename = dsps->dm_savefile;
>  
>      switch (libxl__device_model_version_running(gc, domid)) {
> -    case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL: {
> -        LOGD(DEBUG, domid, "Saving device model state to %s", filename);
> -        libxl__qemu_traditional_cmd(gc, domid, "save");
> -        libxl__wait_for_device_model_deprecated(gc, domid, "paused", NULL, NULL, NULL);

That function isn't used anymore, and can be removed from libxl. Same
for libxl__xenstore_child_wait_deprecated() which is used by it.

> -        break;
> -    }
>      case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
>          /* calls dsps->callback_device_model_done when done */
>          libxl__qmp_suspend_save(egc, dsps); /* must be last */
> diff --git a/tools/libs/light/libxl_stream_write.c b/tools/libs/light/libxl_stream_write.c
> index 634f3240d1..98d44597a7 100644
> --- a/tools/libs/light/libxl_stream_write.c
> +++ b/tools/libs/light/libxl_stream_write.c
> @@ -252,10 +252,6 @@ void libxl__stream_write_start(libxl__egc *egc,
>          stream->device_model_version =
>              libxl__device_model_version_running(gc, dss->domid);
>          switch (stream->device_model_version) {
> -        case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL:
> -            stream->emu_sub_hdr.id = EMULATOR_QEMU_TRADITIONAL;

EMULATOR_QEMU_TRADITIONAL is still defined in libxl_sr_stream_format.h,
we probably what to comment it out.

> -            break;
> -
>          case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
>              stream->emu_sub_hdr.id = EMULATOR_QEMU_UPSTREAM;
>              break;
> diff --git a/tools/libs/light/libxl_types.idl b/tools/libs/light/libxl_types.idl
> index 9bb2969931..246bb3ddd2 100644
> --- a/tools/libs/light/libxl_types.idl
> +++ b/tools/libs/light/libxl_types.idl
> @@ -104,7 +104,6 @@ libxl_channel_connection = Enumeration("channel_connection", [
>  
>  libxl_device_model_version = Enumeration("device_model_version", [
>      (0, "UNKNOWN"),
> -    (1, "QEMU_XEN_TRADITIONAL"), # Historical qemu-xen device model (qemu-dm)

I think we need to keep that, so application using libxl and using this
value don't need to be changed. At least, that's a promise made in
libxl.h about the API.

>      (2, "QEMU_XEN"),             # Upstream based qemu-xen device model
>      ])
>  
> diff --git a/tools/python/xen/migration/libxl.py b/tools/python/xen/migration/libxl.py
> index 5dcb50fe02..dc5c7ac355 100644
> --- a/tools/python/xen/migration/libxl.py
> +++ b/tools/python/xen/migration/libxl.py
> @@ -51,12 +51,10 @@ rec_type_to_str = {
>  EMULATOR_HEADER_FORMAT = "II"
>  
>  EMULATOR_ID_unknown       = 0x00000000
> -EMULATOR_ID_qemu_trad     = 0x00000001

Should we keep this value as a comment? Or maybe the information in
"docs/specs/libxl-migration-stream.pandoc" is enough.

>  EMULATOR_ID_qemu_upstream = 0x00000002
>  
>  emulator_id_to_str = {
>      EMULATOR_ID_unknown       : "Unknown",
> -    EMULATOR_ID_qemu_trad     : "Qemu Traditional",
>      EMULATOR_ID_qemu_upstream : "Qemu Upstream",
>  }
>  

Thanks,

-- 
Anthony PERARD


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On Thu Apr 24, 2025 at 1:45 PM BST, Alejandro Vallejo wrote:
> Xen nowadays crashes under some Hyper-V configurations when
> paddr_bits>36. At the 44bit boundary we reach an edge case in which the
> end of the guest physical address space is not representable using 32bit
> MFNs. Furthermore, it's an act of faith that the tail of the physical
> address space has no reserved regions already.
>
> This commit uses the first unused MFN rather than the last, thus
> ensuring the hypercall page placement is more resilient against such
> corner cases.
>
> While at this, add an extra BUG_ON() to explicitly test for the
> hypercall page being correctly set, and mark hcall_page_ready as
> __ro_after_init.
>
> Fixes: 620fc734f854("x86/hyperv: setup hypercall page")
> Signed-off-by: Alejandro Vallejo 

After a side discussion, this seems on the unsafe side of things due to
potential collision with MMIO. I'll resend (though not today) with the
page overlapping a RAM page instead. Possibly the last page of actual
RAM.

Cheers,
Alejandro


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On 2025-04-24 02:18, Jan Beulich wrote:
> On 23.04.2025 23:22, Jason Andryuk wrote:
>> --- a/xen/drivers/vpci/msix.c
>> +++ b/xen/drivers/vpci/msix.c
>> @@ -666,7 +666,7 @@ int vpci_make_msix_hole(const struct pci_dev *pdev)
>>                   put_gfn(d, start);
>>                   gprintk(XENLOG_WARNING,
>>                           "%pp: existing mapping (mfn: %" PRI_mfn
>> -                        "type: %d) at %#lx clobbers MSIX MMIO area\n",
>> +                        " type: %d) at %#lx clobbers MSIX MMIO area\n",
> 
> Imo this is a good indication that the format string better wouldn't be
> extending across multiple lines. Then it would also be possible to grep
> for it (in the sources) using e.g. "existing mapping .* clobbers".

Sure, a single line works for me.

Thanks,
Jason


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Date: Thu, 24 Apr 2025 15:04:44 +0100
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Subject: Re: UBSan bug in real mode fpu emulation
To: Fabian Specht , xen-devel@lists.xenproject.org
Cc: manuel.andreas@tum.de
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 <7e3b941d-ec4e-4158-8844-a3cf236c8d4d@citrix.com>
 
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On 24/04/2025 2:13 pm, Fabian Specht wrote:
>>> if ( !s->rex_prefix )
>>> {
>>> 	/* Convert 32-bit real/vm86 to 32-bit prot format. */
>>> 	unsigned int fip = fpstate.env.mode.real.fip_lo +
>>> 					   (fpstate.env.mode.real.fip_hi << 16);
>>> 	unsigned int fdp = fpstate.env.mode.real.fdp_lo +
>>> 					   (fpstate.env.mode.real.fdp_hi << 16);
>>> 	unsigned int fop = fpstate.env.mode.real.fop;
>>>
>>> 	fpstate.env.mode.prot.fip = fip & 0xf;
>>> 	fpstate.env.mode.prot.fcs = fip >> 4;
>>> 	fpstate.env.mode.prot.fop = fop;
>>> 	fpstate.env.mode.prot.fdp = fdp & 0xf;
>>> 	fpstate.env.mode.prot.fds = fdp >> 4;
>>> }
>> Several things.  First, please always the UBSAN analysis from the crash.
> (XEN) UBSAN: Undefined behaviour in arch/x86/x86_emulate/blk.c:87:66
> (XEN) left shift of 65535 by 16 places cannot be represented in type 'int'
> (XEN) ----[ Xen-4.20.0  x86_64  debug=y ubsan=y  Tainted:     H  ]----

Yes, it is a shift into the sign bit.

>
>> There are several different ways that shifts go wrong, and I suspect
>> this is a shift into a sign bit, which is notable given the unsigned
>> underlying type.
> Might be, but I am not entirely sure. Either way, it should be fixed
> through a simple cast to unsigned int I think.

I have a sneaking suspicion that this is sufficient:

diff --git a/xen/arch/x86/x86_emulate/private.h
b/xen/arch/x86/x86_emulate/private.h
index 30be59547032..9f3d6f0e5357 100644
--- a/xen/arch/x86/x86_emulate/private.h
+++ b/xen/arch/x86/x86_emulate/private.h
@@ -385,9 +385,9 @@ struct x87_env16 {
     union {
         struct {
             uint16_t fip_lo;
-            uint16_t fop:11, :1, fip_hi:4;
+            uint32_t fop:11, :1, fip_hi:4;
             uint16_t fdp_lo;
-            uint16_t :12, fdp_hi:4;
+            uint32_t :12, fdp_hi:4;
         } real;
         struct {
             uint16_t fip;


The problem is that a uint16_t bitfield promotes into int.  A base type
of uint32_t should cause the bitfield to promote into unsigned int directly.

>
>> Also, are you aware that the test isn't properly in Real Mode?  It's in
>> so-called unreal mode (not actually a real mode, but a consequence of
>> how the segment registers work), which is relevant to how you manage to
>> re-enter the emulator for FLDENV.
> Yes I am aware. But the bug should be triggered regardless of the
> current mode, right?

Well, that depends.  Some CPUs trucate %eip to %ip at this point.  Xen
doesn't, which is why the XTF test doesn't crash in a different way.

~Andrew


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Subject: Re: [PATCH] x86/hvmloader: fix usage of NULL with cpuid_count()
To: Roger Pau Monne , xen-devel@lists.xenproject.org
Cc: Jan Beulich ,
 Anthony PERARD 
References: <20250424125813.96449-1-roger.pau@citrix.com>
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On 24/04/2025 1:58 pm, Roger Pau Monne wrote:
> The commit that added support for retrieving the APIC IDs from the APs
> introduced several usages of cpuid() with NULL parameters, which is not
> handled by the underlying implementation.  For GCC I expect this results in
> writes to the physical address at 0, however for Clang the generated code
> in smp.o is:

Oh lovely.  I guess we need full VM testing for the Clang builds too.

> tools/firmware/hvmloader/smp.o: file format elf32-i386
>
> Disassembly of section .text:
>
> 00000000 :
>        0: 55                            pushl   %ebp
>        1: 89 e5                         movl    %esp, %ebp
>        3: 53                            pushl   %ebx
>        4: 31 c0                         xorl    %eax, %eax
>        6: 31 c9                         xorl    %ecx, %ecx
>        8: 0f a2                         cpuid

I get the hint that this is the whole file?  But you don't say that
explicitly.

> Showing the usage of a NULL pointer results in undefined behavior, and
> clang refusing to generate further code after it.
>
> Fix by using a temporary variable in cpuid_count() in place for any NULL
> parameter.
>
> Fixes: 9ad0db58c7e2 ('tools/hvmloader: Retrieve APIC IDs from the APs themselves')
> Signed-off-by: Roger Pau Monné 
> ---
> Could also be fixed by using the temporary variable in the call sites,
> however that's more code in the call sites at the expense of less checking.
> I don't think the extra NULL check logic in cpuid_count() is that bad.
>
> Overall the solution proposed in this patch is safer going forward, as it
> prevent issues like this from being introduced in the first place.
> ---
>  tools/firmware/hvmloader/util.h | 11 +++++++++++
>  1 file changed, 11 insertions(+)
>
> diff --git a/tools/firmware/hvmloader/util.h b/tools/firmware/hvmloader/util.h
> index 644450c51ceb..765a013ddd9e 100644
> --- a/tools/firmware/hvmloader/util.h
> +++ b/tools/firmware/hvmloader/util.h
> @@ -190,6 +190,17 @@ static inline void cpuid_count(
>      uint32_t *ecx,
>      uint32_t *edx)
>  {
> +    uint32_t tmp;
> +
> +    if ( !eax )
> +        eax = &tmp;
> +    if ( !ebx )
> +        ebx = &tmp;
> +    if ( !ecx )
> +        ecx = &tmp;
> +    if ( !edx )
> +        edx = &tmp;
> +

Personally I dislike this pattern, and some of that is definitely PTSD
from Xen's original hvm_cpuid() function.

hvmloader is a small enough codebase that I don't think it matters
either way.

Acked-by: Andrew Cooper , preferably with
clarity over the disassembly.

>      asm volatile ( "cpuid"
>                     : "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx)
>                     : "a" (leaf), "c" (subleaf) );



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Date: Thu, 24 Apr 2025 16:33:48 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Andrew Cooper 
Cc: xen-devel@lists.xenproject.org, Jan Beulich ,
	Anthony PERARD 
Subject: Re: [PATCH] x86/hvmloader: fix usage of NULL with cpuid_count()
Message-ID: 
References: <20250424125813.96449-1-roger.pau@citrix.com>
 <72b6e9b8-8f6a-4495-ac1c-9df5822067a8@citrix.com>
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In-Reply-To: <72b6e9b8-8f6a-4495-ac1c-9df5822067a8@citrix.com>

On Thu, Apr 24, 2025 at 03:21:05PM +0100, Andrew Cooper wrote:
> On 24/04/2025 1:58 pm, Roger Pau Monne wrote:
> > The commit that added support for retrieving the APIC IDs from the APs
> > introduced several usages of cpuid() with NULL parameters, which is not
> > handled by the underlying implementation.  For GCC I expect this results in
> > writes to the physical address at 0, however for Clang the generated code
> > in smp.o is:
> 
> Oh lovely.  I guess we need full VM testing for the Clang builds too.
> 
> > tools/firmware/hvmloader/smp.o: file format elf32-i386
> >
> > Disassembly of section .text:
> >
> > 00000000 :
> >        0: 55                            pushl   %ebp
> >        1: 89 e5                         movl    %esp, %ebp
> >        3: 53                            pushl   %ebx
> >        4: 31 c0                         xorl    %eax, %eax
> >        6: 31 c9                         xorl    %ecx, %ecx
> >        8: 0f a2                         cpuid
> 
> I get the hint that this is the whole file?  But you don't say that
> explicitly.

Yeah, realized later while reading the message myself.  This is indeed
the whole file.

> > Showing the usage of a NULL pointer results in undefined behavior, and
> > clang refusing to generate further code after it.
> >
> > Fix by using a temporary variable in cpuid_count() in place for any NULL
> > parameter.
> >
> > Fixes: 9ad0db58c7e2 ('tools/hvmloader: Retrieve APIC IDs from the APs themselves')
> > Signed-off-by: Roger Pau Monné 
> > ---
> > Could also be fixed by using the temporary variable in the call sites,
> > however that's more code in the call sites at the expense of less checking.
> > I don't think the extra NULL check logic in cpuid_count() is that bad.
> >
> > Overall the solution proposed in this patch is safer going forward, as it
> > prevent issues like this from being introduced in the first place.
> > ---
> >  tools/firmware/hvmloader/util.h | 11 +++++++++++
> >  1 file changed, 11 insertions(+)
> >
> > diff --git a/tools/firmware/hvmloader/util.h b/tools/firmware/hvmloader/util.h
> > index 644450c51ceb..765a013ddd9e 100644
> > --- a/tools/firmware/hvmloader/util.h
> > +++ b/tools/firmware/hvmloader/util.h
> > @@ -190,6 +190,17 @@ static inline void cpuid_count(
> >      uint32_t *ecx,
> >      uint32_t *edx)
> >  {
> > +    uint32_t tmp;
> > +
> > +    if ( !eax )
> > +        eax = &tmp;
> > +    if ( !ebx )
> > +        ebx = &tmp;
> > +    if ( !ecx )
> > +        ecx = &tmp;
> > +    if ( !edx )
> > +        edx = &tmp;
> > +
> 
> Personally I dislike this pattern, and some of that is definitely PTSD
> from Xen's original hvm_cpuid() function.
> 
> hvmloader is a small enough codebase that I don't think it matters
> either way.
> 
> Acked-by: Andrew Cooper , preferably with
> clarity over the disassembly.

I've adjusted to:

"""
For GCC I expect this results in writes to the physical address at 0,
however for Clang the generated code in smp.o for the whole file is:

tools/firmware/hvmloader/smp.o: file format elf32-i386
...
"""

Thanks, Roger.


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Date: Thu, 24 Apr 2025 16:43:18 +0200
From: Anthony PERARD 
To: Juergen Gross 
Cc: xen-devel@lists.xenproject.org,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich , Julien Grall ,
	Roger Pau =?iso-8859-1?Q?Monn=E9?= ,
	Stefano Stabellini ,
	Oleksii Kurochko ,
	Community Manager ,
	Samuel Thibault 
Subject: Re: [PATCH v2 4/6] tools: remove qemu-traditional
Message-ID: 
References: <20250408123526.14613-1-jgross@suse.com>
 <20250408123526.14613-5-jgross@suse.com>
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On Tue, Apr 08, 2025 at 02:35:22PM +0200, Juergen Gross wrote:
> diff --git a/INSTALL b/INSTALL
> index 88c1464816..786e3da996 100644
> --- a/INSTALL
> +++ b/INSTALL

There's one "--enable-ioemu-stubdom" left in this file.

> diff --git a/stubdom/Makefile b/stubdom/Makefile
> index 724ce40365..82fc1e90f8 100644
> --- a/stubdom/Makefile
> +++ b/stubdom/Makefile
> @@ -544,13 +478,6 @@ else
>  install: $(STUBDOMPATH)
>  endif
>  
> -install-ioemu: ioemu-stubdom
> -	$(INSTALL_DIR) "$(DESTDIR)$(LIBEXEC_BIN)"
> -	$(INSTALL_PROG) stubdom-dm "$(DESTDIR)$(LIBEXEC_BIN)"
> -	$(INSTALL_DATA) stubdompath.sh "$(DESTDIR)$(LIBEXEC_BIN)"

If we don't install "stubdompath.sh", we don't need to make it
anymore, that is $(STUBDOMPATH) rule and as prerequisite isn't needed
anymore.

I think "stubdompath.sh" is only used by "stubdom-dm", so we can remove
all mention of "stubdompath.sh" or "$(STUBDOMPATH)", here or in the next
patch.

And with $(STUBDOMPATH) path gone, this will be the user of the make
macro $(buildmakevars2file) and $(BUILD_MAKE_VARS), so I think the could
be both removed as well.

> -	$(INSTALL_DIR) "$(DESTDIR)$(XENFIRMWAREDIR)"
> -	$(INSTALL_DATA) mini-os-$(XEN_TARGET_ARCH)-ioemu/mini-os.gz "$(DESTDIR)$(XENFIRMWAREDIR)/ioemu-stubdom.gz"
> -
>  install-grub: pv-grub
>  	$(INSTALL_DIR) "$(DESTDIR)$(XENFIRMWAREDIR)"
>  	$(INSTALL_DATA) mini-os-$(XEN_TARGET_ARCH)-grub/mini-os.gz "$(DESTDIR)$(XENFIRMWAREDIR)/pv-grub-$(XEN_TARGET_ARCH).gz"
> diff --git a/tools/Makefile b/tools/Makefile
> index e9e1cda305..6ecf7c0da8 100644
> --- a/tools/Makefile
> +++ b/tools/Makefile
> @@ -136,54 +129,6 @@ endif
> -
> -qemu-traditional-recurse = \
> -	set -e; \
> -		$(buildmakevars2shellvars); \

These are the last mention of the make macro $(buildmakevars2shellvars),
so we can remove it from Config.mk.


Thanks,

-- 
Anthony PERARD


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Date: Thu, 24 Apr 2025 16:47:51 +0200
From: Anthony PERARD 
To: Juergen Gross 
Cc: xen-devel@lists.xenproject.org,
	Samuel Thibault 
Subject: Re: [PATCH v2 5/6] stubdom: remove ancient stubdom-dm script
Message-ID: 
References: <20250408123526.14613-1-jgross@suse.com>
 <20250408123526.14613-6-jgross@suse.com>
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On Tue, Apr 08, 2025 at 02:35:23PM +0200, Juergen Gross wrote:
> The stubdom-dm script is still using "xm" instead of "xl", so it is
> probably unused since more than 10 years now.
> 
> Signed-off-by: Juergen Gross 

Reviewed-by: Anthony PERARD 

Thanks,

-- 
Anthony PERARD


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Date: Thu, 24 Apr 2025 16:50:30 +0200
From: Anthony PERARD 
To: Juergen Gross 
Cc: xen-devel@lists.xenproject.org,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich , Julien Grall ,
	Roger Pau =?iso-8859-1?Q?Monn=E9?= ,
	Stefano Stabellini 
Subject: Re: [PATCH v2 6/6] build: don't require full tools build for
 building stubdoms
Message-ID: 
References: <20250408123526.14613-1-jgross@suse.com>
 <20250408123526.14613-7-jgross@suse.com>
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On Tue, Apr 08, 2025 at 02:35:24PM +0200, Juergen Gross wrote:
> With the drop of qemu-traditional "make stubdom" no longer requires
> "make tools" to have finished.
> 
> It is enough to add "install-tools-public-headers" as a prereq of
> "install-stubdom".
> 
> Signed-off-by: Juergen Gross 

Once the rest of the patch series
is committed: Acked-by: Anthony PERARD 

Thanks,

-- 
Anthony PERARD


From xen-devel-bounces@lists.xenproject.org Thu Apr 24 15:00:07 2025
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Date: Thu, 24 Apr 2025 16:59:57 +0200
From: Anthony PERARD 
To: Jason Andryuk 
Cc: xen-devel@lists.xenproject.org,
	Anthony PERARD 
Subject: Re: [PATCH 1/2] tools/xen-hptool: Add missing newlines
Message-ID: 
References: <20250423212821.42776-1-jason.andryuk@amd.com>
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On Wed, Apr 23, 2025 at 05:28:20PM -0400, Jason Andryuk wrote:
> Add some missing newlines to error messages.
> 
> Fixes: 284d5633be37 ("Tools: add online/offline hotplug user interfaces")
> Signed-off-by: Jason Andryuk 

Acked-by: Anthony PERARD 

Thanks,

-- 
Anthony PERARD


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Date: Thu, 24 Apr 2025 17:00:39 +0200
From: Anthony PERARD 
To: Jason Andryuk 
Cc: xen-devel@lists.xenproject.org,
	Anthony PERARD 
Subject: Re: [PATCH 2/2] tools/xen-hptool: Replace hard tabs
Message-ID: 
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 <20250423212821.42776-3-jason.andryuk@amd.com>
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On Wed, Apr 23, 2025 at 05:28:21PM -0400, Jason Andryuk wrote:
> With a tab stop of 8, the alignment is off.  Replace the hard tabs with
> spaces to match the file.
> 
> Fixes: 284d5633be37 ("Tools: add online/offline hotplug user interfaces")
> Signed-off-by: Jason Andryuk 

Acked-by: Anthony PERARD 

Thanks,

-- 
Anthony PERARD


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Subject: Re: [PATCH v4 3/4] xen/arm: add support for PCI child bus
To: Mykyta Poturai , "xen-devel@lists.xenproject.org"
	
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On 4/23/25 07:08, Mykyta Poturai wrote:
> diff --git a/xen/arch/arm/pci/pci-access.c b/xen/arch/arm/pci/pci-access.c
> index 9f9aac43d7..91271973fb 100644
> --- a/xen/arch/arm/pci/pci-access.c
> +++ b/xen/arch/arm/pci/pci-access.c
> @@ -18,10 +18,31 @@
>  #define INVALID_VALUE (~0U)
>  #define PCI_ERR_VALUE(len) GENMASK(0, len * 8)
>  
> +static const struct pci_ops *get_ops(struct pci_host_bridge *bridge,
> +                                     pci_sbdf_t sbdf)
> +{
> +    if ( bridge->child_ops )
> +    {
> +        struct pci_config_window *cfg = bridge->child_cfg;
> +
> +        if ( (sbdf.bus >= cfg->busn_start) && (sbdf.bus <= cfg->busn_end) )
> +            return bridge->child_ops;
> +    }
> +    return bridge->ops;
> +}
> +
> +static inline void __iomem *map_bus(struct pci_host_bridge *bridge, pci_sbdf_t sbdf,

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From: "Daniel P. Smith" 

Introduce the domain builder which is capable of consuming a device tree as the
first boot module. If it finds a device tree as the first boot module, it will
set its type to BOOTMOD_FDT. This change only detects the boot module and
continues to boot with slight change to the boot convention that the dom0
kernel is no longer first boot module but is the second.

No functional change intended.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
---
v5:
  * Decoupled core.c from !CONFIG_DOMAIN_BUILDER
  * builder_init() now returns an enumerated type of the kind of FDT it
    found. If no FDT is found, then initialisation happens inline in
    setup.c
  * Refactored the switch in core.c to operate on an enumerated type instead
     * This has knock-on effects on the helper
  * Moved hyperlaunch detection path to the following patch
---
 xen/arch/x86/include/asm/bootinfo.h |  3 ++
 xen/arch/x86/setup.c                | 19 ++++++++----
 xen/common/Makefile                 |  1 +
 xen/common/domain-builder/Makefile  |  2 ++
 xen/common/domain-builder/core.c    | 45 +++++++++++++++++++++++++++++
 xen/common/domain-builder/fdt.c     | 39 +++++++++++++++++++++++++
 xen/common/domain-builder/fdt.h     | 14 +++++++++
 xen/include/xen/domain-builder.h    | 29 +++++++++++++++++++
 8 files changed, 146 insertions(+), 6 deletions(-)
 create mode 100644 xen/common/domain-builder/Makefile
 create mode 100644 xen/common/domain-builder/core.c
 create mode 100644 xen/common/domain-builder/fdt.c
 create mode 100644 xen/common/domain-builder/fdt.h
 create mode 100644 xen/include/xen/domain-builder.h

diff --git a/xen/arch/x86/include/asm/bootinfo.h b/xen/arch/x86/include/asm/bootinfo.h
index 3afc214c17..82c2650fcf 100644
--- a/xen/arch/x86/include/asm/bootinfo.h
+++ b/xen/arch/x86/include/asm/bootinfo.h
@@ -27,6 +27,7 @@ enum bootmod_type {
     BOOTMOD_RAMDISK,
     BOOTMOD_MICROCODE,
     BOOTMOD_XSM_POLICY,
+    BOOTMOD_FDT,
 };
 
 struct boot_module {
@@ -80,6 +81,8 @@ struct boot_info {
     paddr_t memmap_addr;
     size_t memmap_length;
 
+    bool hyperlaunch_enabled;
+
     unsigned int nr_modules;
     struct boot_module mods[MAX_NR_BOOTMODS + 1];
     struct boot_domain domains[MAX_NR_BOOTDOMS];
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index cf1ea040dd..bd13d9d196 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -5,6 +5,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -1283,9 +1284,14 @@ void asmlinkage __init noreturn __start_xen(void)
                bi->nr_modules);
     }
 
-    /* Dom0 kernel is always first */
-    bi->mods[0].type = BOOTMOD_KERNEL;
-    bi->domains[0].kernel = &bi->mods[0];
+    if ( builder_init(bi) == FDT_KIND_NONE )
+    {
+        /* Find first unknown boot module to use as dom0 kernel */
+        i = first_boot_module_index(bi, BOOTMOD_UNKNOWN);
+        bi->mods[i].type = BOOTMOD_KERNEL;
+        bi->domains[0].kernel = &bi->mods[i];
+        bi->hyperlaunch_enabled = false;
+    }
 
     if ( pvh_boot )
     {
@@ -1468,8 +1474,9 @@ void asmlinkage __init noreturn __start_xen(void)
         xen->size  = __2M_rwdata_end - _stext;
     }
 
-    bi->mods[0].headroom =
-        bzimage_headroom(bootstrap_map_bm(&bi->mods[0]), bi->mods[0].size);
+    bi->domains[0].kernel->headroom =
+        bzimage_headroom(bootstrap_map_bm(bi->domains[0].kernel),
+                         bi->domains[0].kernel->size);
     bootstrap_unmap();
 
 #ifndef highmem_start
@@ -1593,7 +1600,7 @@ void asmlinkage __init noreturn __start_xen(void)
 #endif
     }
 
-    if ( bi->mods[0].headroom && !bi->mods[0].relocated )
+    if ( bi->domains[0].kernel->headroom && !bi->domains[0].kernel->relocated )
         panic("Not enough memory to relocate the dom0 kernel image\n");
     for ( i = 0; i < bi->nr_modules; ++i )
     {
diff --git a/xen/common/Makefile b/xen/common/Makefile
index 98f0873056..e42af71e3f 100644
--- a/xen/common/Makefile
+++ b/xen/common/Makefile
@@ -11,6 +11,7 @@ obj-$(filter-out $(CONFIG_X86),$(CONFIG_ACPI)) += device.o
 obj-$(CONFIG_HAS_DEVICE_TREE) += device-tree/
 obj-$(CONFIG_IOREQ_SERVER) += dm.o
 obj-y += domain.o
+obj-$(CONFIG_DOMAIN_BUILDER) += domain-builder/
 obj-y += event_2l.o
 obj-y += event_channel.o
 obj-$(CONFIG_EVTCHN_FIFO) += event_fifo.o
diff --git a/xen/common/domain-builder/Makefile b/xen/common/domain-builder/Makefile
new file mode 100644
index 0000000000..bfd2f6267e
--- /dev/null
+++ b/xen/common/domain-builder/Makefile
@@ -0,0 +1,2 @@
+obj-y += fdt.init.o
+obj-y += core.init.o
diff --git a/xen/common/domain-builder/core.c b/xen/common/domain-builder/core.c
new file mode 100644
index 0000000000..fdc13aee40
--- /dev/null
+++ b/xen/common/domain-builder/core.c
@@ -0,0 +1,45 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (C) 2024, Apertus Solutions, LLC
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "fdt.h"
+
+enum fdt_kind __init builder_init(struct boot_info *bi)
+{
+    enum fdt_kind kind;
+
+    bi->hyperlaunch_enabled = false;
+    switch ( (kind = detect_fdt_kind(bi)) )
+    {
+    case FDT_KIND_NONE:
+        /* No DT found */
+        return kind;
+
+    case FDT_KIND_UNKNOWN:
+        printk(XENLOG_DEBUG "DT found: non-hyperlaunch\n");
+        bi->mods[0].type = BOOTMOD_FDT;
+        return kind;
+
+    default:
+        BUG();
+    }
+}
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * tab-width: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
new file mode 100644
index 0000000000..708dcfcbe8
--- /dev/null
+++ b/xen/common/domain-builder/fdt.c
@@ -0,0 +1,39 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (C) 2024, Apertus Solutions, LLC
+ */
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "fdt.h"
+
+enum fdt_kind __init detect_fdt_kind(const struct boot_info *bi)
+{
+    enum fdt_kind kind;
+    const void *fdt = bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_IDX]);
+
+    if ( !fdt || fdt_check_header(fdt) < 0 )
+        kind = FDT_KIND_NONE;
+    else
+        kind = FDT_KIND_UNKNOWN;
+
+    bootstrap_unmap();
+
+    return kind;
+}
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * tab-width: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/common/domain-builder/fdt.h b/xen/common/domain-builder/fdt.h
new file mode 100644
index 0000000000..ed9c62631c
--- /dev/null
+++ b/xen/common/domain-builder/fdt.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef __XEN_DOMAIN_BUILDER_FDT_H__
+#define __XEN_DOMAIN_BUILDER_FDT_H__
+
+#include 
+
+struct boot_info;
+
+/* hyperlaunch fdt is required to be module 0 */
+#define HYPERLAUNCH_MODULE_IDX 0
+
+enum fdt_kind detect_fdt_kind(const struct boot_info *bi);
+
+#endif /* __XEN_DOMAIN_BUILDER_FDT_H__ */
diff --git a/xen/include/xen/domain-builder.h b/xen/include/xen/domain-builder.h
new file mode 100644
index 0000000000..b9702db735
--- /dev/null
+++ b/xen/include/xen/domain-builder.h
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef __XEN_DOMAIN_BUILDER_H__
+#define __XEN_DOMAIN_BUILDER_H__
+
+struct boot_info;
+
+/* Return status of builder_init(). Shows which boot mechanism was detected */
+enum fdt_kind
+{
+    /* FDT not found. Skipped builder. */
+    FDT_KIND_NONE,
+    /* Found an FDT that wasn't hyperlaunch. */
+    FDT_KIND_UNKNOWN,
+};
+
+/*
+ * Initialises `bi` if it detects a compatible FDT. Otherwise returns
+ * FDT_KIND_NONE and leaves initialisation up to the caller.
+ */
+#if IS_ENABLED(CONFIG_DOMAIN_BUILDER)
+enum fdt_kind builder_init(struct boot_info *bi);
+#else
+static inline enum fdt_kind builder_init(struct boot_info *bi)
+{
+    return FDT_KIND_NONE;
+}
+#endif /* !IS_ENABLED(CONFIG_DOMAIN_BUILDER) */
+
+#endif /* __XEN_DOMAIN_BUILDER_H__ */
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini , "Jason
 Andryuk" , Alejandro Vallejo 
Subject: [PATCH v5 03/12] x86/hyperlaunch: initial support for hyperlaunch device tree
Date: Thu, 24 Apr 2025 17:10:13 +0100
Message-ID: <20250424161027.92942-4-agarciav@amd.com>
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From: "Daniel P. Smith" 

Add the ability to detect both a formal hyperlaunch device tree or a dom0less
device tree. If the hyperlaunch device tree is found, then count the number of
domain entries, reporting an error if more than one is found.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
---
v5:
  * Turned !fdt check into a BUG_ON(). It's checked ahead of time.
---
 xen/arch/x86/include/asm/bootinfo.h |  1 +
 xen/common/domain-builder/core.c    | 15 +++++++
 xen/common/domain-builder/fdt.c     | 62 +++++++++++++++++++++++++++++
 xen/common/domain-builder/fdt.h     |  1 +
 xen/include/xen/domain-builder.h    |  2 +
 5 files changed, 81 insertions(+)

diff --git a/xen/arch/x86/include/asm/bootinfo.h b/xen/arch/x86/include/asm/bootinfo.h
index 82c2650fcf..1e3d582e45 100644
--- a/xen/arch/x86/include/asm/bootinfo.h
+++ b/xen/arch/x86/include/asm/bootinfo.h
@@ -84,6 +84,7 @@ struct boot_info {
     bool hyperlaunch_enabled;
 
     unsigned int nr_modules;
+    unsigned int nr_domains;
     struct boot_module mods[MAX_NR_BOOTMODS + 1];
     struct boot_domain domains[MAX_NR_BOOTDOMS];
 };
diff --git a/xen/common/domain-builder/core.c b/xen/common/domain-builder/core.c
index fdc13aee40..0955558977 100644
--- a/xen/common/domain-builder/core.c
+++ b/xen/common/domain-builder/core.c
@@ -16,10 +16,17 @@
 enum fdt_kind __init builder_init(struct boot_info *bi)
 {
     enum fdt_kind kind;
+    int ret;
 
     bi->hyperlaunch_enabled = false;
     switch ( (kind = detect_fdt_kind(bi)) )
     {
+    case FDT_KIND_HYPERLAUNCH:
+        printk(XENLOG_DEBUG "DT found: hyperlaunch\n");
+        bi->hyperlaunch_enabled = true;
+        bi->mods[0].type = BOOTMOD_FDT;
+        break;
+
     case FDT_KIND_NONE:
         /* No DT found */
         return kind;
@@ -32,6 +39,14 @@ enum fdt_kind __init builder_init(struct boot_info *bi)
     default:
         BUG();
     }
+
+    printk(XENLOG_INFO "Hyperlaunch configuration:\n");
+    if ( (ret = walk_hyperlaunch_fdt(bi)) < 0 )
+        panic("Walk of device tree failed (%d)\n", ret);
+
+    printk(XENLOG_INFO "  number of domains: %u\n", bi->nr_domains);
+
+    return FDT_KIND_HYPERLAUNCH;
 }
 
 /*
diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
index 708dcfcbe8..c1ccba39a2 100644
--- a/xen/common/domain-builder/fdt.c
+++ b/xen/common/domain-builder/fdt.c
@@ -13,6 +13,36 @@
 
 #include "fdt.h"
 
+static int __init find_hyperlaunch_node(const void *fdt)
+{
+    int hv_node = fdt_path_offset(fdt, "/chosen/hypervisor");
+
+    if ( hv_node >= 0 )
+    {
+        /* Anything other than zero indicates no match */
+        if ( fdt_node_check_compatible(fdt, hv_node, "hypervisor,xen") )
+            return -ENODATA;
+
+        return hv_node;
+    }
+    else
+    {
+        /* Look for dom0less config */
+        int node, chosen_node = fdt_path_offset(fdt, "/chosen");
+
+        if ( chosen_node < 0 )
+            return -ENOENT;
+
+        fdt_for_each_subnode(node, fdt, chosen_node)
+        {
+            if ( !fdt_node_check_compatible(fdt, node, "xen,domain") )
+                return chosen_node;
+        }
+    }
+
+    return -ENODATA;
+}
+
 enum fdt_kind __init detect_fdt_kind(const struct boot_info *bi)
 {
     enum fdt_kind kind;
@@ -20,6 +50,8 @@ enum fdt_kind __init detect_fdt_kind(const struct boot_info *bi)
 
     if ( !fdt || fdt_check_header(fdt) < 0 )
         kind = FDT_KIND_NONE;
+    else if ( find_hyperlaunch_node(fdt) >= 0 )
+        kind = FDT_KIND_HYPERLAUNCH;
     else
         kind = FDT_KIND_UNKNOWN;
 
@@ -28,6 +60,36 @@ enum fdt_kind __init detect_fdt_kind(const struct boot_info *bi)
     return kind;
 }
 
+int __init walk_hyperlaunch_fdt(struct boot_info *bi)
+{
+    int ret = 0, hv_node, node;
+    const void *fdt = bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_IDX]);
+
+    BUG_ON(!fdt);
+
+    hv_node = find_hyperlaunch_node(fdt);
+    if ( hv_node < 0 )
+    {
+        ret = hv_node;
+        goto err_out;
+    }
+
+    fdt_for_each_subnode(node, fdt, hv_node)
+    {
+        if ( !fdt_node_check_compatible(fdt, node, "xen,domain") )
+            bi->nr_domains++;
+    }
+
+    /* Until multi-domain construction is added, throw an error */
+    if ( bi->nr_domains != 1 )
+        printk(XENLOG_ERR "hyperlaunch only supports dom0 construction\n");
+
+ err_out:
+    bootstrap_unmap();
+
+    return ret;
+}
+
 /*
  * Local variables:
  * mode: C
diff --git a/xen/common/domain-builder/fdt.h b/xen/common/domain-builder/fdt.h
index ed9c62631c..826c0f01e5 100644
--- a/xen/common/domain-builder/fdt.h
+++ b/xen/common/domain-builder/fdt.h
@@ -10,5 +10,6 @@ struct boot_info;
 #define HYPERLAUNCH_MODULE_IDX 0
 
 enum fdt_kind detect_fdt_kind(const struct boot_info *bi);
+int walk_hyperlaunch_fdt(struct boot_info *bi);
 
 #endif /* __XEN_DOMAIN_BUILDER_FDT_H__ */
diff --git a/xen/include/xen/domain-builder.h b/xen/include/xen/domain-builder.h
index b9702db735..cbb3cbea7c 100644
--- a/xen/include/xen/domain-builder.h
+++ b/xen/include/xen/domain-builder.h
@@ -9,6 +9,8 @@ enum fdt_kind
 {
     /* FDT not found. Skipped builder. */
     FDT_KIND_NONE,
+    /* Found Hyperlaunch FDT */
+    FDT_KIND_HYPERLAUNCH,
     /* Found an FDT that wasn't hyperlaunch. */
     FDT_KIND_UNKNOWN,
 };
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
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Subject: [PATCH v5 01/12] kconfig: introduce domain builder config options
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From: "Daniel P. Smith" 

Hyperlaunch domain builder will be the consolidated boot time domain
building logic framework. Introduces the config option to enable this
domain builder to eventually turn on the ability to load the domain
configuration via a flattened device tree.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Alejandro Vallejo 
---
v5:
  * Removed CONFIG_HAS_BOOT_INFO
  * Reworded help message
---
 xen/common/Kconfig                |  2 ++
 xen/common/domain-builder/Kconfig | 15 +++++++++++++++
 2 files changed, 17 insertions(+)
 create mode 100644 xen/common/domain-builder/Kconfig

diff --git a/xen/common/Kconfig b/xen/common/Kconfig
index be28060716..e025fbe257 100644
--- a/xen/common/Kconfig
+++ b/xen/common/Kconfig
@@ -144,6 +144,8 @@ config STATIC_MEMORY
 
 	  If unsure, say N.
 
+source "common/domain-builder/Kconfig"
+
 menu "Speculative hardening"
 
 config INDIRECT_THUNK
diff --git a/xen/common/domain-builder/Kconfig b/xen/common/domain-builder/Kconfig
new file mode 100644
index 0000000000..44b8351af8
--- /dev/null
+++ b/xen/common/domain-builder/Kconfig
@@ -0,0 +1,15 @@
+menu "Domain Builder Features"
+
+config DOMAIN_BUILDER
+	bool "Domain builder (UNSUPPORTED)" if UNSUPPORTED && X86
+	select LIBFDT
+	help
+	  Support for constructing predefined domains described by a flattened
+	  device tree. This allows constructing multiple domains at boot time
+	  instead of being limited to a single dom0.
+
+	  This feature is currently experimental.
+
+	  If unsure, say N.
+
+endmenu
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: Alejandro Vallejo , Andrew Cooper
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 Grall" , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
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Subject: [PATCH v5 00/12] Hyperlaunch device tree for dom0
Date: Thu, 24 Apr 2025 17:10:10 +0100
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Hi,

v4: https://lore.kernel.org/xen-devel/20250417124844.11143-1-agarciav@amd.com/
v3: https://lore.kernel.org/xen-devel/20250408160802.49870-1-agarciav@amd.com/
v2: https://lore.kernel.org/xen-devel/20241226165740.29812-1-dpsmith@apertussolutions.com/
v1: https://lore.kernel.org/xen-devel/20241123182044.30687-1-dpsmith@apertussolutions.com/

========= Original cover letter:

The Hyperlaunch device tree for dom0 series is the second split out for the
introduction of the Hyperlaunch domain builder logic. These changes focus on
introducing the ability to express a domain configuration that is then used to
populate the struct boot_domain structure for dom0. This ability to express a
domain configuration provides the next step towards a general domain builder.

The splitting of Hyperlaunch into a set of series are twofold, to reduce the
effort in reviewing a much larger series, and to reduce the effort in handling
the knock-on effects to the construction logic from requested review changes.



Alejandro Vallejo (1):
  x86/hyperlaunch: Add helpers to locate multiboot modules

Daniel P. Smith (11):
  kconfig: introduce domain builder config options
  common/hyperlaunch: introduce the domain builder
  x86/hyperlaunch: initial support for hyperlaunch device tree
  x86/hyperlaunch: locate dom0 kernel with hyperlaunch
  x86/hyperlaunch: obtain cmdline from device tree
  x86/hyperlaunch: locate dom0 initrd with hyperlaunch
  x86/hyperlaunch: add domain id parsing to domain config
  x86/hyperlaunch: specify dom0 mode with device tree
  x86/hyperlaunch: add memory parsing to domain config
  x86/hyperlaunch: add max vcpu parsing of hyperlaunch device tree
  x86/hyperlaunch: add capabilities to boot domain

 xen/arch/x86/dom0_build.c              |  11 +
 xen/arch/x86/include/asm/boot-domain.h |  14 +
 xen/arch/x86/include/asm/bootinfo.h    |  10 +-
 xen/arch/x86/setup.c                   |  64 +++-
 xen/common/Kconfig                     |   2 +
 xen/common/Makefile                    |   1 +
 xen/common/domain-builder/Kconfig      |  15 +
 xen/common/domain-builder/Makefile     |   2 +
 xen/common/domain-builder/core.c       |  86 +++++
 xen/common/domain-builder/fdt.c        | 512 +++++++++++++++++++++++++
 xen/common/domain-builder/fdt.h        |  40 ++
 xen/include/xen/domain-builder.h       |  37 ++
 xen/include/xen/libfdt/libfdt-xen.h    |  23 ++
 13 files changed, 800 insertions(+), 17 deletions(-)
 create mode 100644 xen/common/domain-builder/Kconfig
 create mode 100644 xen/common/domain-builder/Makefile
 create mode 100644 xen/common/domain-builder/core.c
 create mode 100644 xen/common/domain-builder/fdt.c
 create mode 100644 xen/common/domain-builder/fdt.h
 create mode 100644 xen/include/xen/domain-builder.h

-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: Alejandro Vallejo , Andrew Cooper
	, Anthony PERARD ,
	Michal Orzel , Jan Beulich , "Julien
 Grall" , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Stefano Stabellini , "Jason
 Andryuk" 
Subject: [PATCH v5 04/12] x86/hyperlaunch: Add helpers to locate multiboot modules
Date: Thu, 24 Apr 2025 17:10:14 +0100
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Hyperlaunch mandates either a reg or module-index DT prop on nodes that
contain `multiboot,module" under their "compatible" prop. This patch
introduces a helper to generically find such index, appending the module
to the list of modules if it wasn't already (i.e: because it's given via
the "reg" prop).

Signed-off-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
---
v5:
  * s/read_fdt_prop_as_reg/fdt_prop_as_reg/
  * Move the _u32() prop helper to fdt.c
---
 xen/common/domain-builder/fdt.c  | 172 +++++++++++++++++++++++++++++++
 xen/common/domain-builder/fdt.h  |   1 +
 xen/include/xen/domain-builder.h |   4 +
 3 files changed, 177 insertions(+)

diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
index c1ccba39a2..11f0436e85 100644
--- a/xen/common/domain-builder/fdt.c
+++ b/xen/common/domain-builder/fdt.c
@@ -13,6 +13,178 @@
 
 #include "fdt.h"
 
+static int __init fdt_prop_as_u32(const struct fdt_property *prop,
+                                  uint32_t *val)
+{
+    if ( !prop || fdt32_to_cpu(prop->len) < sizeof(u32) )
+        return -EINVAL;
+
+    *val = fdt32_to_cpu(*(const fdt32_t *)prop->data);
+    return 0;
+}
+
+/*
+ * Unpacks a "reg" property into its address and size constituents.
+ *
+ * @param prop          Pointer to an FDT "reg" property.
+ * @param address_cells Number of 4-octet cells that make up an "address".
+ * @param size_cells    Number of 4-octet cells that make up a "size".
+ * @param p_addr[out]   Address encoded in the property.
+ * @param p_size[out]   Size encoded in the property.
+ * @returns             -EINVAL on malformed property, 0 otherwise.
+ */
+static int __init fdt_prop_as_reg(const struct fdt_property *prop,
+                                  int address_cells, int size_cells,
+                                  uint64_t *p_addr, uint64_t *p_size)
+{
+    const fdt32_t *cell = (const fdt32_t *)prop->data;
+    uint64_t addr, size;
+
+    if ( fdt32_to_cpu(prop->len) !=
+         (address_cells + size_cells) * sizeof(*cell) )
+    {
+        printk(XENLOG_ERR "  cannot read reg %lu+%lu from prop len %u\n",
+            address_cells * sizeof(*cell), size_cells * sizeof(*cell),
+            fdt32_to_cpu(prop->len));
+        return -EINVAL;
+    }
+
+    switch ( address_cells )
+    {
+    case 1:
+        addr = fdt32_to_cpu(*cell);
+        break;
+    case 2:
+        addr = fdt64_to_cpu(*(const fdt64_t *)cell);
+        break;
+    default:
+        printk(XENLOG_ERR "  unsupported address_cells=%d\n", address_cells);
+        return -EINVAL;
+    }
+
+    cell += address_cells;
+    switch ( size_cells )
+    {
+    case 1:
+        size = fdt32_to_cpu(*cell);
+        break;
+    case 2:
+        size = fdt64_to_cpu(*(const fdt64_t *)cell);
+        break;
+    default:
+        printk(XENLOG_ERR "  unsupported size_cells=%d\n", size_cells);
+        return -EINVAL;
+    }
+
+    *p_addr = addr;
+    *p_size = size;
+
+    return 0;
+}
+
+/*
+ * Locate a multiboot module given its node offset in the FDT.
+ *
+ * The module location may be given via either FDT property:
+ *     * reg = 
+ *         * Mutates `bi` to append the module.
+ *     * module-index = 
+ *         * Leaves `bi` unchanged.
+ *
+ * @param fdt           Pointer to the full FDT.
+ * @param node          Offset for the module node.
+ * @param address_cells Number of 4-octet cells that make up an "address".
+ * @param size_cells    Number of 4-octet cells that make up a "size".
+ * @param bi[inout]     Xen's representation of the boot parameters.
+ * @return              -EINVAL on malformed nodes, otherwise
+ *                      index inside `bi->mods`
+ */
+int __init fdt_read_multiboot_module(const void *fdt, int node,
+                                     int address_cells, int size_cells,
+                                     struct boot_info *bi)
+{
+    const struct fdt_property *prop;
+    uint64_t addr, size;
+    int ret;
+    uint32_t idx;
+
+    if ( fdt_node_check_compatible(fdt, node, "multiboot,module") )
+    {
+        printk(XENLOG_ERR "  bad module. multiboot,module not found");
+        return -ENODATA;
+    }
+
+    /* Location given as a `module-index` property. */
+    if ( (prop = fdt_get_property(fdt, node, "module-index", NULL)) )
+    {
+        if ( fdt_get_property(fdt, node, "reg", NULL) )
+        {
+            printk(XENLOG_ERR "  found both reg and module-index for module\n");
+            return -EINVAL;
+        }
+        if ( (ret = fdt_prop_as_u32(prop, &idx)) )
+        {
+            printk(XENLOG_ERR "  bad module-index prop\n");
+            return ret;
+        }
+        if ( idx >= MAX_NR_BOOTMODS )
+        {
+            printk(XENLOG_ERR "  module-index overflow. %s=%u\n",
+                   STR(MAX_NR_BOOTMODS), MAX_NR_BOOTMODS);
+            return -EINVAL;
+        }
+
+        return idx;
+    }
+
+    /* Otherwise location given as a `reg` property. */
+    if ( !(prop = fdt_get_property(fdt, node, "reg", NULL)) )
+    {
+        printk(XENLOG_ERR "  no location for multiboot,module\n");
+        return -EINVAL;
+    }
+    if ( fdt_get_property(fdt, node, "module-index", NULL) )
+    {
+        printk(XENLOG_ERR "  found both reg and module-index for module\n");
+        return -EINVAL;
+    }
+
+    ret = fdt_prop_as_reg(prop, address_cells, size_cells, &addr, &size);
+    if ( ret < 0 )
+    {
+        printk(XENLOG_ERR "  failed reading reg for multiboot,module\n");
+        return -EINVAL;
+    }
+
+    idx = bi->nr_modules;
+    if ( idx > MAX_NR_BOOTMODS )
+    {
+        /*
+         * MAX_NR_BOOTMODS must fit in 31 bits so it's representable in the
+         * positive side of an int; for the return value.
+         */
+        BUILD_BUG_ON(MAX_NR_BOOTMODS > (uint64_t)INT_MAX);
+        printk(XENLOG_ERR "  idx=%u exceeds len=%u\n", idx, MAX_NR_BOOTMODS);
+        return -EINVAL;
+    }
+
+    /*
+     * Append new module to the existing list
+     *
+     * Note that bi->nr_modules points to Xen itself, so we must shift it first
+     */
+    bi->nr_modules++;
+    bi->mods[bi->nr_modules] = bi->mods[idx];
+    bi->mods[idx] = (struct boot_module){
+        .start = addr,
+        .size = size,
+    };
+
+    printk(XENLOG_INFO "  module[%u]: addr %lx size %lx\n", idx, addr, size);
+
+    return idx;
+}
+
 static int __init find_hyperlaunch_node(const void *fdt)
 {
     int hv_node = fdt_path_offset(fdt, "/chosen/hypervisor");
diff --git a/xen/common/domain-builder/fdt.h b/xen/common/domain-builder/fdt.h
index 826c0f01e5..f48456acd2 100644
--- a/xen/common/domain-builder/fdt.h
+++ b/xen/common/domain-builder/fdt.h
@@ -3,6 +3,7 @@
 #define __XEN_DOMAIN_BUILDER_FDT_H__
 
 #include 
+#include 
 
 struct boot_info;
 
diff --git a/xen/include/xen/domain-builder.h b/xen/include/xen/domain-builder.h
index cbb3cbea7c..3ac3a0ab84 100644
--- a/xen/include/xen/domain-builder.h
+++ b/xen/include/xen/domain-builder.h
@@ -28,4 +28,8 @@ static inline enum fdt_kind builder_init(struct boot_info *bi)
 }
 #endif /* !IS_ENABLED(CONFIG_DOMAIN_BUILDER) */
 
+int fdt_read_multiboot_module(const void *fdt, int node,
+                              int address_cells, int size_cells,
+                              struct boot_info *bi)
+
 #endif /* __XEN_DOMAIN_BUILDER_H__ */
-- 
2.43.0



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CC: "Daniel P. Smith" , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini , "Jason
 Andryuk" , Alejandro Vallejo 
Subject: [PATCH v5 05/12] x86/hyperlaunch: locate dom0 kernel with hyperlaunch
Date: Thu, 24 Apr 2025 17:10:15 +0100
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From: "Daniel P. Smith" 

Look for a subnode of type `multiboot,kernel` within a domain node. If
found, locate it using the multiboot module helper to generically ensure
it lives in the module list. If the bootargs property is present and
there was not an MB1 string, then use the command line from the device
tree definition.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
---
v5:
  * Add domain name to the error path on no-kernel.
---
 xen/arch/x86/setup.c            |  1 +
 xen/common/domain-builder/fdt.c | 64 +++++++++++++++++++++++++++++++--
 2 files changed, 62 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index bd13d9d196..7e756302ae 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -1290,6 +1290,7 @@ void asmlinkage __init noreturn __start_xen(void)
         i = first_boot_module_index(bi, BOOTMOD_UNKNOWN);
         bi->mods[i].type = BOOTMOD_KERNEL;
         bi->domains[0].kernel = &bi->mods[i];
+        bi->nr_domains = 1;
         bi->hyperlaunch_enabled = false;
     }
 
diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
index 11f0436e85..662c715483 100644
--- a/xen/common/domain-builder/fdt.c
+++ b/xen/common/domain-builder/fdt.c
@@ -99,9 +99,9 @@ static int __init fdt_prop_as_reg(const struct fdt_property *prop,
  * @return              -EINVAL on malformed nodes, otherwise
  *                      index inside `bi->mods`
  */
-int __init fdt_read_multiboot_module(const void *fdt, int node,
-                                     int address_cells, int size_cells,
-                                     struct boot_info *bi)
+static int __init fdt_read_multiboot_module(const void *fdt, int node,
+                                            int address_cells, int size_cells,
+                                            struct boot_info *bi)
 {
     const struct fdt_property *prop;
     uint64_t addr, size;
@@ -185,6 +185,52 @@ int __init fdt_read_multiboot_module(const void *fdt, int node,
     return idx;
 }
 
+static int __init process_domain_node(
+    struct boot_info *bi, const void *fdt, int dom_node)
+{
+    int node;
+    struct boot_domain *bd = &bi->domains[bi->nr_domains];
+    const char *name = fdt_get_name(fdt, dom_node, NULL) ?: "unknown";
+    int address_cells = fdt_address_cells(fdt, dom_node);
+    int size_cells = fdt_size_cells(fdt, dom_node);
+
+    fdt_for_each_subnode(node, fdt, dom_node)
+    {
+        if ( !fdt_node_check_compatible(fdt, node, "multiboot,kernel") )
+        {
+            int idx;
+
+            if ( bd->kernel )
+            {
+                printk(XENLOG_WARNING
+                       "  duplicate kernel for domain %s\n", name);
+                continue;
+            }
+
+            idx = fdt_read_multiboot_module(fdt, node, address_cells,
+                                            size_cells, bi);
+            if ( idx < 0 )
+            {
+                printk(XENLOG_ERR
+                       "  failed processing kernel for domain %s\n", name);
+                return idx;
+            }
+
+            printk(XENLOG_INFO "  kernel: multiboot-index=%d\n", idx);
+            bi->mods[idx].type = BOOTMOD_KERNEL;
+            bd->kernel = &bi->mods[idx];
+        }
+    }
+
+    if ( !bd->kernel )
+    {
+        printk(XENLOG_ERR "error: no kernel assigned to domain %s\n", name);
+        return -ENODATA;
+    }
+
+    return 0;
+}
+
 static int __init find_hyperlaunch_node(const void *fdt)
 {
     int hv_node = fdt_path_offset(fdt, "/chosen/hypervisor");
@@ -248,8 +294,20 @@ int __init walk_hyperlaunch_fdt(struct boot_info *bi)
 
     fdt_for_each_subnode(node, fdt, hv_node)
     {
+        if ( bi->nr_domains >= MAX_NR_BOOTDOMS )
+        {
+            printk(XENLOG_WARNING "warning: only creating first %u domains\n",
+                   MAX_NR_BOOTDOMS);
+            break;
+        }
+
         if ( !fdt_node_check_compatible(fdt, node, "xen,domain") )
+        {
+            if ( (ret = process_domain_node(bi, fdt, node)) < 0 )
+                break;
+
             bi->nr_domains++;
+        }
     }
 
     /* Until multi-domain construction is added, throw an error */
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini ,
	"Bertrand Marquis" , Jason Andryuk
	, Alejandro Vallejo 
Subject: [PATCH v5 06/12] x86/hyperlaunch: obtain cmdline from device tree
Date: Thu, 24 Apr 2025 17:10:16 +0100
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From: "Daniel P. Smith" 

Add support to read the command line from the hyperlaunch device tree.
The device tree command line is located in the "bootargs" property of the
"multiboot,kernel" node.

A boot loader command line, e.g. a grub module string field, takes
precendence over the device tree one since it is easier to modify.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
---
v5:
  * Fixed typo on commit message
  * Added BUG_ON() statements on fdt cmdline parsers in setup.c so they
    are skipped on !CONFIG_DOMAIN_BUILDER
  * Add cmdline handling comment to the domain_cmdline_size()
---
 xen/arch/x86/include/asm/bootinfo.h |  6 ++++--
 xen/arch/x86/setup.c                | 22 ++++++++++++++++++++--
 xen/common/domain-builder/core.c    | 26 ++++++++++++++++++++++++++
 xen/common/domain-builder/fdt.c     |  6 ++++++
 xen/common/domain-builder/fdt.h     | 24 ++++++++++++++++++++++++
 xen/include/xen/domain-builder.h    |  8 +++++---
 xen/include/xen/libfdt/libfdt-xen.h | 23 +++++++++++++++++++++++
 7 files changed, 108 insertions(+), 7 deletions(-)

diff --git a/xen/arch/x86/include/asm/bootinfo.h b/xen/arch/x86/include/asm/bootinfo.h
index 1e3d582e45..5b2c93b1ef 100644
--- a/xen/arch/x86/include/asm/bootinfo.h
+++ b/xen/arch/x86/include/asm/bootinfo.h
@@ -35,11 +35,13 @@ struct boot_module {
 
     /*
      * Module State Flags:
-     *   relocated: indicates module has been relocated in memory.
-     *   released:  indicates module's pages have been freed.
+     *   relocated:   indicates module has been relocated in memory.
+     *   released:    indicates module's pages have been freed.
+     *   fdt_cmdline: indicates module's cmdline is in the FDT.
      */
     bool relocated:1;
     bool released:1;
+    bool fdt_cmdline:1;
 
     /*
      * A boot module may need decompressing by Xen.  Headroom is an estimate of
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 7e756302ae..325ba8cc8a 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -984,7 +984,19 @@ static size_t __init domain_cmdline_size(const struct boot_info *bi,
 {
     size_t s = bi->kextra ? strlen(bi->kextra) : 0;
 
-    s += bd->kernel->cmdline_pa ? strlen(__va(bd->kernel->cmdline_pa)) : 0;
+
+    /*
+     * Bootloader cmdline takes precedence and replaces the DT provided one.
+     *
+     * In that case, fdt_cmdline is not be populated at all.
+     */
+    if ( bd->kernel->fdt_cmdline )
+    {
+        BUG_ON(!IS_ENABLED(CONFIG_DOMAIN_BUILDER));
+        s += builder_get_cmdline_size(bi, bd->kernel->cmdline_pa);
+    }
+    else if ( bd->kernel->cmdline_pa )
+        s += strlen(__va(bd->kernel->cmdline_pa));
 
     if ( s == 0 )
         return s;
@@ -1048,7 +1060,13 @@ static struct domain *__init create_dom0(struct boot_info *bi)
         if ( !(cmdline = xzalloc_array(char, cmdline_size)) )
             panic("Error allocating cmdline buffer for %pd\n", d);
 
-        if ( bd->kernel->cmdline_pa )
+        if ( bd->kernel->fdt_cmdline )
+        {
+            BUG_ON(!IS_ENABLED(CONFIG_DOMAIN_BUILDER));
+            builder_get_cmdline(
+                bi, bd->kernel->cmdline_pa, cmdline, cmdline_size);
+        }
+        else if ( bd->kernel->cmdline_pa )
             strlcpy(cmdline,
                     cmdline_cook(__va(bd->kernel->cmdline_pa), bi->loader),
                     cmdline_size);
diff --git a/xen/common/domain-builder/core.c b/xen/common/domain-builder/core.c
index 0955558977..0b7a21a4b8 100644
--- a/xen/common/domain-builder/core.c
+++ b/xen/common/domain-builder/core.c
@@ -10,9 +10,35 @@
 #include 
 
 #include 
+#include 
 
 #include "fdt.h"
 
+size_t __init builder_get_cmdline_size(const struct boot_info *bi, int offset)
+{
+    const void *fdt;
+    int size;
+
+    fdt = bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_IDX]);
+    size = fdt_cmdline_prop_size(fdt, offset);
+    bootstrap_unmap();
+
+    return max(0, size);
+}
+
+int __init builder_get_cmdline(const struct boot_info *bi,
+                               int offset, char *cmdline, size_t size)
+{
+    const void *fdt;
+    int ret;
+
+    fdt = bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_IDX]);
+    ret = fdt_cmdline_prop_copy(fdt, offset, cmdline, size);
+    bootstrap_unmap();
+
+    return ret;
+}
+
 enum fdt_kind __init builder_init(struct boot_info *bi)
 {
     enum fdt_kind kind;
diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
index 662c715483..fa92dc55b2 100644
--- a/xen/common/domain-builder/fdt.c
+++ b/xen/common/domain-builder/fdt.c
@@ -219,6 +219,12 @@ static int __init process_domain_node(
             printk(XENLOG_INFO "  kernel: multiboot-index=%d\n", idx);
             bi->mods[idx].type = BOOTMOD_KERNEL;
             bd->kernel = &bi->mods[idx];
+
+            /* If bootloader didn't set cmdline, see if FDT provides one. */
+            if ( bd->kernel->cmdline_pa &&
+                 !((char *)__va(bd->kernel->cmdline_pa))[0] )
+                bd->kernel->fdt_cmdline = fdt_get_prop_offset(
+                    fdt, node, "bootargs", &bd->kernel->cmdline_pa);
         }
     }
 
diff --git a/xen/common/domain-builder/fdt.h b/xen/common/domain-builder/fdt.h
index f48456acd2..e1243cbf26 100644
--- a/xen/common/domain-builder/fdt.h
+++ b/xen/common/domain-builder/fdt.h
@@ -10,6 +10,30 @@ struct boot_info;
 /* hyperlaunch fdt is required to be module 0 */
 #define HYPERLAUNCH_MODULE_IDX 0
 
+static inline int __init fdt_cmdline_prop_size(const void *fdt, int offset)
+{
+    int ret;
+
+    fdt_get_property_by_offset(fdt, offset, &ret);
+
+    return ret;
+}
+
+static inline int __init fdt_cmdline_prop_copy(
+    const void *fdt, int offset, char *cmdline, size_t size)
+{
+    int ret;
+    const struct fdt_property *prop =
+        fdt_get_property_by_offset(fdt, offset, &ret);
+
+    if ( ret < 0 )
+        return ret;
+
+    ASSERT(size > ret);
+
+    return strlcpy(cmdline, prop->data, ret);
+}
+
 enum fdt_kind detect_fdt_kind(const struct boot_info *bi);
 int walk_hyperlaunch_fdt(struct boot_info *bi);
 
diff --git a/xen/include/xen/domain-builder.h b/xen/include/xen/domain-builder.h
index 3ac3a0ab84..350e2eb2af 100644
--- a/xen/include/xen/domain-builder.h
+++ b/xen/include/xen/domain-builder.h
@@ -2,6 +2,8 @@
 #ifndef __XEN_DOMAIN_BUILDER_H__
 #define __XEN_DOMAIN_BUILDER_H__
 
+#include 
+
 struct boot_info;
 
 /* Return status of builder_init(). Shows which boot mechanism was detected */
@@ -28,8 +30,8 @@ static inline enum fdt_kind builder_init(struct boot_info *bi)
 }
 #endif /* !IS_ENABLED(CONFIG_DOMAIN_BUILDER) */
 
-int fdt_read_multiboot_module(const void *fdt, int node,
-                              int address_cells, int size_cells,
-                              struct boot_info *bi)
+size_t builder_get_cmdline_size(const struct boot_info *bi, int offset);
+int builder_get_cmdline(const struct boot_info *bi, int offset,
+                        char *cmdline, size_t size);
 
 #endif /* __XEN_DOMAIN_BUILDER_H__ */
diff --git a/xen/include/xen/libfdt/libfdt-xen.h b/xen/include/xen/libfdt/libfdt-xen.h
index a5340bc9f4..9c20a26a35 100644
--- a/xen/include/xen/libfdt/libfdt-xen.h
+++ b/xen/include/xen/libfdt/libfdt-xen.h
@@ -13,6 +13,29 @@
 
 #include 
 
+static inline bool __init fdt_get_prop_offset(
+    const void *fdt, int node, const char *pname, unsigned long *poffset)
+{
+    int ret, offset;
+    const char *name;
+
+    fdt_for_each_property_offset(offset, fdt, node)
+    {
+        fdt_getprop_by_offset(fdt, offset, &name, &ret);
+
+        if ( ret < 0 )
+            continue;
+
+        if ( !strcmp(name, pname) )
+        {
+            *poffset = offset;
+            return true;
+        }
+    }
+
+    return false;
+}
+
 static inline int fdt_get_mem_rsv_paddr(const void *fdt, int n,
                                         paddr_t *address,
                                         paddr_t *size)
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini , "Jason
 Andryuk" , Alejandro Vallejo ,
	"Denis Mukhin" 
Subject: [PATCH v5 09/12] x86/hyperlaunch: specify dom0 mode with device tree
Date: Thu, 24 Apr 2025 17:10:19 +0100
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From: "Daniel P. Smith" 

Enable selecting the mode in which the domain will be built and ran. This
includes:

  - whether it will be either a 32/64 bit domain
  - if it will be run as a PV or HVM domain
  - and if it will require a device model (not applicable for dom0)

In the device tree, this will be represented as a bit map that will be carried
through into struct boot_domain.

Signed-off-by: Daniel P. Smith 
Reviewed-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
Reviewed-by: Denis Mukhin 
---
 xen/arch/x86/include/asm/boot-domain.h |  5 +++++
 xen/arch/x86/setup.c                   |  3 ++-
 xen/common/domain-builder/fdt.c        | 21 +++++++++++++++++++++
 3 files changed, 28 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/include/asm/boot-domain.h
index d7c6042e25..e316d4bcde 100644
--- a/xen/arch/x86/include/asm/boot-domain.h
+++ b/xen/arch/x86/include/asm/boot-domain.h
@@ -13,6 +13,11 @@
 struct boot_domain {
     domid_t domid;
 
+                                          /* On     | Off    */
+#define BUILD_MODE_PARAVIRT      (1 << 0) /* PV     | PVH/HVM */
+#define BUILD_MODE_ENABLE_DM     (1 << 1) /* HVM    | PVH     */
+    uint32_t mode;
+
     struct boot_module *kernel;
     struct boot_module *module;
     const char *cmdline;
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index ece77079d8..d3a4f89a6a 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -1029,7 +1029,8 @@ static struct domain *__init create_dom0(struct boot_info *bi)
     struct boot_domain *bd = &bi->domains[0];
     struct domain *d;
 
-    if ( opt_dom0_pvh )
+    if ( opt_dom0_pvh ||
+         (bi->hyperlaunch_enabled && !(bd->mode & BUILD_MODE_PARAVIRT)) )
     {
         dom0_cfg.flags |= (XEN_DOMCTL_CDF_hvm |
                            ((hvm_hap_supported() && !opt_dom0_shadow) ?
diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
index 5a5b3c8806..75f68de448 100644
--- a/xen/common/domain-builder/fdt.c
+++ b/xen/common/domain-builder/fdt.c
@@ -235,6 +235,27 @@ static int __init process_domain_node(
             bd->domid = val;
             printk(XENLOG_INFO "  domid: %d\n", bd->domid);
         }
+        else if ( !strncmp(prop_name, "mode", name_len) )
+        {
+            if ( (rc = fdt_prop_as_u32(prop, &bd->mode)) )
+            {
+                printk(XENLOG_ERR
+                       "  failed processing mode for domain %s\n", name);
+                return rc;
+            }
+
+            if ( (bd->mode & BUILD_MODE_PARAVIRT)  &&
+                 (bd->mode & BUILD_MODE_ENABLE_DM) )
+            {
+                printk(XENLOG_ERR "  mode: invalid (pv+hvm)\n");
+                return -EINVAL;
+            }
+
+            printk(XENLOG_INFO "  mode: %s\n",
+                   (bd->mode & BUILD_MODE_PARAVIRT)  ? "pv"  :
+                   (bd->mode & BUILD_MODE_ENABLE_DM) ? "hvm" :
+                                                       "pvh");
+        }
     }
 
     fdt_for_each_subnode(node, fdt, dom_node)
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini , "Jason
 Andryuk" , Alejandro Vallejo ,
	"Denis Mukhin" 
Subject: [PATCH v5 11/12] x86/hyperlaunch: add max vcpu parsing of hyperlaunch device tree
Date: Thu, 24 Apr 2025 17:10:21 +0100
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From: "Daniel P. Smith" 

Introduce the `cpus` property, named as such for dom0less compatibility, that
represents the maximum number of vcpus to allocate for a domain. In the device
tree, it will be encoded as a u32 value.

Signed-off-by: Daniel P. Smith 
Reviewed-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
Reviewed-by: Denis Mukhin 
---
 xen/arch/x86/dom0_build.c              |  3 +++
 xen/arch/x86/include/asm/boot-domain.h |  2 ++
 xen/common/domain-builder/fdt.c        | 11 +++++++++++
 3 files changed, 16 insertions(+)

diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c
index 8db24dbc0a..f734104c74 100644
--- a/xen/arch/x86/dom0_build.c
+++ b/xen/arch/x86/dom0_build.c
@@ -635,6 +635,9 @@ int __init construct_dom0(const struct boot_domain *bd)
     if ( !get_memsize(&dom0_max_size, ULONG_MAX) && bd->max_pages )
         dom0_max_size.nr_pages = bd->max_pages;
 
+    if ( opt_dom0_max_vcpus_max == UINT_MAX && bd->max_vcpus )
+        opt_dom0_max_vcpus_max = bd->max_vcpus;
+
     if ( is_hvm_domain(d) )
         rc = dom0_construct_pvh(bd);
     else if ( is_pv_domain(d) )
diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/include/asm/boot-domain.h
index fa8ea1cc66..969c02a6ea 100644
--- a/xen/arch/x86/include/asm/boot-domain.h
+++ b/xen/arch/x86/include/asm/boot-domain.h
@@ -22,6 +22,8 @@ struct boot_domain {
     unsigned long min_pages;
     unsigned long max_pages;
 
+    unsigned int max_vcpus;
+
     struct boot_module *kernel;
     struct boot_module *module;
     const char *cmdline;
diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
index ff41727ef1..e90f183481 100644
--- a/xen/common/domain-builder/fdt.c
+++ b/xen/common/domain-builder/fdt.c
@@ -302,6 +302,17 @@ static int __init process_domain_node(
             bd->max_pages = PFN_DOWN(kb * SZ_1K);
             printk(XENLOG_INFO "  max memory: %lu KiB\n", kb);
         }
+        else if ( !strncmp(prop_name, "cpus", name_len) )
+        {
+            uint32_t val = UINT32_MAX;
+            if ( (rc = fdt_prop_as_u32(prop, &val)) )
+            {
+                printk(XENLOG_ERR "  bad \"cpus\" prop on domain %s\n", name);
+                return rc;
+            }
+            bd->max_vcpus = val;
+            printk(XENLOG_INFO "  cpus: %d\n", bd->max_vcpus);
+        }
     }
 
     fdt_for_each_subnode(node, fdt, dom_node)
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini ,
	Alejandro Vallejo 
Subject: [PATCH v5 08/12] x86/hyperlaunch: add domain id parsing to domain config
Date: Thu, 24 Apr 2025 17:10:18 +0100
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From: "Daniel P. Smith" 

Introduce the ability to specify the desired domain id for the domain
definition. The domain id will be populated in the domid property of the
domain node in the device tree configuration.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Alejandro Vallejo 
---
v5:
  * Added missing domid to printk (also rewrote it).
---
 xen/arch/x86/setup.c            |  5 ++--
 xen/common/domain-builder/fdt.c | 52 ++++++++++++++++++++++++++++++++-
 2 files changed, 54 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 661b80138a..ece77079d8 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -1042,8 +1042,9 @@ static struct domain *__init create_dom0(struct boot_info *bi)
     if ( iommu_enabled )
         dom0_cfg.flags |= XEN_DOMCTL_CDF_iommu;
 
-    /* Create initial domain.  Not d0 for pvshim. */
-    bd->domid = get_initial_domain_id();
+    if ( bd->domid == DOMID_INVALID )
+        /* Create initial domain.  Not d0 for pvshim. */
+        bd->domid = get_initial_domain_id();
     d = domain_create(bd->domid, &dom0_cfg,
                       pv_shim ? 0 : CDF_privileged | CDF_hardware);
     if ( IS_ERR(d) )
diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
index 144fcc75b5..5a5b3c8806 100644
--- a/xen/common/domain-builder/fdt.c
+++ b/xen/common/domain-builder/fdt.c
@@ -2,6 +2,7 @@
 /*
  * Copyright (C) 2024, Apertus Solutions, LLC
  */
+#include 
 #include 
 #include 
 #include 
@@ -188,12 +189,54 @@ static int __init fdt_read_multiboot_module(const void *fdt, int node,
 static int __init process_domain_node(
     struct boot_info *bi, const void *fdt, int dom_node)
 {
-    int node;
+    int node, property;
     struct boot_domain *bd = &bi->domains[bi->nr_domains];
     const char *name = fdt_get_name(fdt, dom_node, NULL) ?: "unknown";
     int address_cells = fdt_address_cells(fdt, dom_node);
     int size_cells = fdt_size_cells(fdt, dom_node);
 
+    fdt_for_each_property_offset(property, fdt, dom_node)
+    {
+        const struct fdt_property *prop;
+        const char *prop_name;
+        int name_len, rc;
+
+        prop = fdt_get_property_by_offset(fdt, property, NULL);
+        if ( !prop )
+            continue; /* silently skip */
+
+        prop_name = fdt_get_string(fdt, fdt32_to_cpu(prop->nameoff), &name_len);
+
+        if ( !strncmp(prop_name, "domid", name_len) )
+        {
+            uint32_t val = DOMID_INVALID;
+
+            if ( (rc = fdt_prop_as_u32(prop, &val)) )
+            {
+                printk(XENLOG_ERR
+                       "  failed processing domain id for domain %s\n", name);
+                return rc;
+            }
+            if ( val >= DOMID_FIRST_RESERVED )
+            {
+                printk(XENLOG_ERR "  invalid domain id for domain %s\n", name);
+                return -EINVAL;
+            }
+
+            for ( unsigned int i = 0; i < bi->nr_domains; i++ )
+            {
+                if ( bi->domains[i].domid == val )
+                {
+                    printk(XENLOG_ERR "  duplicate id for domain %s\n", name);
+                    return -EINVAL;
+                }
+            }
+
+            bd->domid = val;
+            printk(XENLOG_INFO "  domid: %d\n", bd->domid);
+        }
+    }
+
     fdt_for_each_subnode(node, fdt, dom_node)
     {
         if ( !fdt_node_check_compatible(fdt, node, "multiboot,kernel") )
@@ -258,6 +301,13 @@ static int __init process_domain_node(
         return -ENODATA;
     }
 
+    if ( bd->domid == DOMID_INVALID )
+        bd->domid = get_initial_domain_id();
+    else if ( bd->domid != get_initial_domain_id() )
+        printk(XENLOG_WARNING
+               "warning: unsupported boot. d%d is not the initial domain.\n",
+               bd->domid);
+
     return 0;
 }
 
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini , "Jason
 Andryuk" , Alejandro Vallejo ,
	"Denis Mukhin" 
Subject: [PATCH v5 12/12] x86/hyperlaunch: add capabilities to boot domain
Date: Thu, 24 Apr 2025 17:10:22 +0100
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From: "Daniel P. Smith" 

Introduce the ability to assign capabilities to a domain via its definition in
device tree. The first capability enabled to select is the control domain
capability. The capability property is a bitfield in both the device tree and
`struct boot_domain`.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
Reviewed-by: Denis Mukhin 
---
v5:
  * Removed BUILD_CAPS, as DOMAIN_CAPS is now in public/bootfdt.h
  * Assigned DOMAIN_CAPS_MASK to dom0, rather than only BUILD_CAPS_CONTROL.
    * So it also gets hardware+xenstore.
---
 xen/arch/x86/include/asm/boot-domain.h |  3 +++
 xen/arch/x86/setup.c                   |  5 ++++-
 xen/common/domain-builder/fdt.c        | 23 +++++++++++++++++++++++
 3 files changed, 30 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/include/asm/boot-domain.h
index 969c02a6ea..cb5351241a 100644
--- a/xen/arch/x86/include/asm/boot-domain.h
+++ b/xen/arch/x86/include/asm/boot-domain.h
@@ -13,6 +13,9 @@
 struct boot_domain {
     domid_t domid;
 
+    /* Bitmap. See DOMAIN_CAPS_MASK for a list */
+    uint32_t capabilities;
+
                                           /* On     | Off    */
 #define BUILD_MODE_PARAVIRT      (1 << 0) /* PV     | PVH/HVM */
 #define BUILD_MODE_ENABLE_DM     (1 << 1) /* HVM    | PVH     */
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index d4f839146f..960e43c785 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -61,6 +61,7 @@
 
 #include 
 
+#include 
 #include 
 #ifdef CONFIG_COMPAT
 #include 
@@ -1050,7 +1051,8 @@ static struct domain *__init create_dom0(struct boot_info *bi)
         /* Create initial domain.  Not d0 for pvshim. */
         bd->domid = get_initial_domain_id();
     d = domain_create(bd->domid, &dom0_cfg,
-                      pv_shim ? 0 : CDF_privileged | CDF_hardware);
+            ((bd->capabilities & DOMAIN_CAPS_CONTROL)  ? CDF_privileged : 0) |
+            ((bd->capabilities & DOMAIN_CAPS_HARDWARE) ? CDF_hardware   : 0));
     if ( IS_ERR(d) )
         panic("Error creating d%u: %ld\n", bd->domid, PTR_ERR(d));
 
@@ -1313,6 +1315,7 @@ void asmlinkage __init noreturn __start_xen(void)
         i = first_boot_module_index(bi, BOOTMOD_UNKNOWN);
         bi->mods[i].type = BOOTMOD_KERNEL;
         bi->domains[0].kernel = &bi->mods[i];
+        bi->domains[0].capabilities = pv_shim ? 0 : DOMAIN_CAPS_MASK;
         bi->nr_domains = 1;
         bi->hyperlaunch_enabled = false;
     }
diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
index e90f183481..09d2930e16 100644
--- a/xen/common/domain-builder/fdt.c
+++ b/xen/common/domain-builder/fdt.c
@@ -7,6 +7,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -313,6 +314,28 @@ static int __init process_domain_node(
             bd->max_vcpus = val;
             printk(XENLOG_INFO "  cpus: %d\n", bd->max_vcpus);
         }
+        else if ( !strncmp(prop_name, "capabilities", name_len) )
+        {
+            if ( (rc = fdt_prop_as_u32(prop, &bd->capabilities)) )
+            {
+                printk(XENLOG_ERR
+                       "  bad \"capabilities\" on domain %s\n", name);
+                return rc;
+            }
+
+            if ( bd->capabilities & ~DOMAIN_CAPS_MASK )
+            {
+                printk(XENLOG_WARNING "  unknown capabilities: %#x\n",
+                       bd->capabilities & ~DOMAIN_CAPS_MASK);
+
+                bd->capabilities &= DOMAIN_CAPS_MASK;
+            }
+
+            printk(XENLOG_INFO "  caps: %s%s%s\n",
+                   (bd->capabilities & DOMAIN_CAPS_CONTROL)  ? "c" : "",
+                   (bd->capabilities & DOMAIN_CAPS_HARDWARE) ? "h" : "",
+                   (bd->capabilities & DOMAIN_CAPS_XENSTORE) ? "x" : "");
+        }
     }
 
     fdt_for_each_subnode(node, fdt, dom_node)
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini , "Jason
 Andryuk" , Alejandro Vallejo 
Subject: [PATCH v5 07/12] x86/hyperlaunch: locate dom0 initrd with hyperlaunch
Date: Thu, 24 Apr 2025 17:10:17 +0100
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From: "Daniel P. Smith" 

Look for a subnode of type `multiboot,ramdisk` within a domain node and
parse via the fdt_read_multiboot_module() helper. After a successful
helper call, the module index is returned and the module is guaranteed
to be in the module list.

Fix unused typo in adjacent comment.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
---
v5:
  * Propagate errors from fdt_read_multiboot_module()
---
 xen/arch/x86/setup.c            |  4 ++--
 xen/common/domain-builder/fdt.c | 24 ++++++++++++++++++++++++
 2 files changed, 26 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 325ba8cc8a..661b80138a 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -2171,11 +2171,11 @@ void asmlinkage __init noreturn __start_xen(void)
      * At this point all capabilities that consume boot modules should have
      * claimed their boot modules. Find the first unclaimed boot module and
      * claim it as the initrd ramdisk. Do a second search to see if there are
-     * any remaining unclaimed boot modules, and report them as unusued initrd
+     * any remaining unclaimed boot modules, and report them as unused initrd
      * candidates.
      */
     initrdidx = first_boot_module_index(bi, BOOTMOD_UNKNOWN);
-    if ( initrdidx < MAX_NR_BOOTMODS )
+    if ( !bi->hyperlaunch_enabled && initrdidx < MAX_NR_BOOTMODS )
     {
         bi->mods[initrdidx].type = BOOTMOD_RAMDISK;
         bi->domains[0].module = &bi->mods[initrdidx];
diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
index fa92dc55b2..144fcc75b5 100644
--- a/xen/common/domain-builder/fdt.c
+++ b/xen/common/domain-builder/fdt.c
@@ -226,6 +226,30 @@ static int __init process_domain_node(
                 bd->kernel->fdt_cmdline = fdt_get_prop_offset(
                     fdt, node, "bootargs", &bd->kernel->cmdline_pa);
         }
+        else if ( !fdt_node_check_compatible(fdt, node, "multiboot,ramdisk") )
+        {
+            int idx;
+
+            if ( bd->module )
+            {
+                printk(XENLOG_WARNING
+                       "Duplicate module for domain %s\n", name);
+                continue;
+            }
+
+            idx = fdt_read_multiboot_module(fdt, node, address_cells,
+                                            size_cells, bi);
+            if ( idx < 0 )
+            {
+                printk(XENLOG_ERR "  failed processing module for domain %s\n",
+                       name);
+                return idx;
+            }
+
+            printk(XENLOG_INFO "  module: multiboot-index=%d\n", idx);
+            bi->mods[idx].type = BOOTMOD_RAMDISK;
+            bd->module = &bi->mods[idx];
+        }
     }
 
     if ( !bd->kernel )
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini , "Jason
 Andryuk" , Alejandro Vallejo 
Subject: [PATCH v5 10/12] x86/hyperlaunch: add memory parsing to domain config
Date: Thu, 24 Apr 2025 17:10:20 +0100
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From: "Daniel P. Smith" 

Add three properties, memory, mem-min, and mem-max, to the domain node device
tree parsing to define the memory allocation for a domain. All three fields are
expressed in kb and written as a u64 in the device tree entries.

Signed-off-by: Daniel P. Smith 
Reviewed-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
---
v5:
  * strncmp() == 0 -> !strncmp()
  * Moved the _u64 helper in libfdt-xen.h to fdt.c
---
 xen/arch/x86/dom0_build.c              |  8 +++++
 xen/arch/x86/include/asm/boot-domain.h |  4 +++
 xen/arch/x86/setup.c                   |  5 ++-
 xen/common/domain-builder/fdt.c        | 46 ++++++++++++++++++++++++++
 4 files changed, 62 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c
index 0b467fd4a4..8db24dbc0a 100644
--- a/xen/arch/x86/dom0_build.c
+++ b/xen/arch/x86/dom0_build.c
@@ -627,6 +627,14 @@ int __init construct_dom0(const struct boot_domain *bd)
 
     process_pending_softirqs();
 
+    /* If param dom0_size was not set and HL config provided memory size */
+    if ( !get_memsize(&dom0_size, ULONG_MAX) && bd->mem_pages )
+        dom0_size.nr_pages = bd->mem_pages;
+    if ( !get_memsize(&dom0_min_size, ULONG_MAX) && bd->min_pages )
+        dom0_min_size.nr_pages = bd->min_pages;
+    if ( !get_memsize(&dom0_max_size, ULONG_MAX) && bd->max_pages )
+        dom0_max_size.nr_pages = bd->max_pages;
+
     if ( is_hvm_domain(d) )
         rc = dom0_construct_pvh(bd);
     else if ( is_pv_domain(d) )
diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/include/asm/boot-domain.h
index e316d4bcde..fa8ea1cc66 100644
--- a/xen/arch/x86/include/asm/boot-domain.h
+++ b/xen/arch/x86/include/asm/boot-domain.h
@@ -18,6 +18,10 @@ struct boot_domain {
 #define BUILD_MODE_ENABLE_DM     (1 << 1) /* HVM    | PVH     */
     uint32_t mode;
 
+    unsigned long mem_pages;
+    unsigned long min_pages;
+    unsigned long max_pages;
+
     struct boot_module *kernel;
     struct boot_module *module;
     const char *cmdline;
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index d3a4f89a6a..d4f839146f 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -296,7 +296,10 @@ static const char *cmdline_cook(const char *p, const char *loader_name);
 struct boot_info __initdata xen_boot_info = {
     .loader = "unknown",
     .cmdline = "",
-    .domains = { [0 ... MAX_NR_BOOTDOMS - 1] = { .domid = DOMID_INVALID } },
+    .domains = { [0 ... MAX_NR_BOOTDOMS - 1] = {
+        .domid = DOMID_INVALID,
+        .max_pages = ULONG_MAX,
+    }},
 };
 
 static struct boot_info *__init multiboot_fill_boot_info(
diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
index 75f68de448..ff41727ef1 100644
--- a/xen/common/domain-builder/fdt.c
+++ b/xen/common/domain-builder/fdt.c
@@ -7,6 +7,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -24,6 +25,16 @@ static int __init fdt_prop_as_u32(const struct fdt_property *prop,
     return 0;
 }
 
+static int __init fdt_prop_as_u64(const struct fdt_property *prop,
+                                  uint64_t *val)
+{
+    if ( !prop || fdt32_to_cpu(prop->len) < sizeof(uint64_t) )
+        return -EINVAL;
+
+    *val = fdt64_to_cpu(*(const fdt64_t *)prop->data);
+    return 0;
+}
+
 /*
  * Unpacks a "reg" property into its address and size constituents.
  *
@@ -256,6 +267,41 @@ static int __init process_domain_node(
                    (bd->mode & BUILD_MODE_ENABLE_DM) ? "hvm" :
                                                        "pvh");
         }
+        else if ( !strncmp(prop_name, "memory", name_len) )
+        {
+            uint64_t kb;
+            if ( (rc = fdt_prop_as_u64(prop, &kb)) )
+            {
+                printk(XENLOG_ERR "  bad \"memory\" prop on domain %s\n", name);
+                return rc;
+            }
+            bd->mem_pages = PFN_DOWN(kb * SZ_1K);
+            printk(XENLOG_ERR "  memory: %lu KiB\n", kb);
+        }
+        else if ( !strncmp(prop_name, "mem-min", name_len) )
+        {
+            uint64_t kb;
+            if ( (rc = fdt_prop_as_u64(prop, &kb)) )
+            {
+                printk(XENLOG_ERR
+                       "  bad \"mem-min\" prop on domain %s\n", name);
+                return rc;
+            }
+            bd->min_pages = PFN_DOWN(kb * SZ_1K);
+            printk(XENLOG_INFO "  min memory: %lu kb\n", kb);
+        }
+        else if ( !strncmp(prop_name, "mem-max", name_len) )
+        {
+            uint64_t kb;
+            if ( (rc = fdt_prop_as_u64(prop, &kb)) )
+            {
+                printk(XENLOG_ERR
+                       "  bad \"mem-max\" prop on domain %s\n", name);
+                return rc;
+            }
+            bd->max_pages = PFN_DOWN(kb * SZ_1K);
+            printk(XENLOG_INFO "  max memory: %lu KiB\n", kb);
+        }
     }
 
     fdt_for_each_subnode(node, fdt, dom_node)
-- 
2.43.0



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Date: Thu, 24 Apr 2025 12:54:35 -0400
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Subject: Re: [PATCH v5 01/12] kconfig: introduce domain builder config options
To: Alejandro Vallejo , 
CC: "Daniel P. Smith" , Andrew Cooper
	, Anthony PERARD ,
	Michal Orzel , Jan Beulich , "Julien
 Grall" , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
	, Stefano Stabellini 
References: <20250424161027.92942-1-agarciav@amd.com>
 <20250424161027.92942-2-agarciav@amd.com>
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On 2025-04-24 12:10, Alejandro Vallejo wrote:
> From: "Daniel P. Smith" 
> 
> Hyperlaunch domain builder will be the consolidated boot time domain
> building logic framework. Introduces the config option to enable this

"Introduce the"

> domain builder to eventually turn on the ability to load the domain
> configuration via a flattened device tree.
> 
> Signed-off-by: Daniel P. Smith 
> Signed-off-by: Alejandro Vallejo 

Maybe the title should be "kconfig: introduce CONFIG_DOMAIN_BUILDER" to 
more directly state what is happening.

At least with the typo fixed:

Reviewed-by: Jason Andryuk 

Thanks,
Jason


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Message-ID: <6a37c1ac-8f5d-4c06-bd74-10d35e0dc1a6@amd.com>
Date: Thu, 24 Apr 2025 13:41:45 -0400
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Subject: Re: [PATCH v5 08/12] x86/hyperlaunch: add domain id parsing to domain
 config
To: Alejandro Vallejo , 
CC: "Daniel P. Smith" , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini 
References: <20250424161027.92942-1-agarciav@amd.com>
 <20250424161027.92942-9-agarciav@amd.com>
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On 2025-04-24 12:10, Alejandro Vallejo wrote:
> From: "Daniel P. Smith" 
> 
> Introduce the ability to specify the desired domain id for the domain
> definition. The domain id will be populated in the domid property of the
> domain node in the device tree configuration.
> 
> Signed-off-by: Daniel P. Smith 
> Signed-off-by: Alejandro Vallejo 
> ---

> diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
> index 144fcc75b5..5a5b3c8806 100644
> --- a/xen/common/domain-builder/fdt.c
> +++ b/xen/common/domain-builder/fdt.c

> @@ -188,12 +189,54 @@ static int __init fdt_read_multiboot_module(const void *fdt, int node,
>   static int __init process_domain_node(
>       struct boot_info *bi, const void *fdt, int dom_node)
>   {
> -    int node;
> +    int node, property;
>       struct boot_domain *bd = &bi->domains[bi->nr_domains];
>       const char *name = fdt_get_name(fdt, dom_node, NULL) ?: "unknown";
>       int address_cells = fdt_address_cells(fdt, dom_node);
>       int size_cells = fdt_size_cells(fdt, dom_node);
>   
> +    fdt_for_each_property_offset(property, fdt, dom_node)
> +    {
> +        const struct fdt_property *prop;
> +        const char *prop_name;
> +        int name_len, rc;
> +
> +        prop = fdt_get_property_by_offset(fdt, property, NULL);
> +        if ( !prop )
> +            continue; /* silently skip */
> +
> +        prop_name = fdt_get_string(fdt, fdt32_to_cpu(prop->nameoff), &name_len);
> +

Stray blank line.

> +        if ( !strncmp(prop_name, "domid", name_len) )
> +        {
> +            uint32_t val = DOMID_INVALID;
> +
> +            if ( (rc = fdt_prop_as_u32(prop, &val)) )
> +            {
> +                printk(XENLOG_ERR
> +                       "  failed processing domain id for domain %s\n", name);
> +                return rc;
> +            }

Maybe add a blank line here?

> +            if ( val >= DOMID_FIRST_RESERVED )
> +            {
> +                printk(XENLOG_ERR "  invalid domain id for domain %s\n", name);
> +                return -EINVAL;
> +            }
> +

> @@ -258,6 +301,13 @@ static int __init process_domain_node(
>           return -ENODATA;
>       }
>   
> +    if ( bd->domid == DOMID_INVALID )
> +        bd->domid = get_initial_domain_id();
> +    else if ( bd->domid != get_initial_domain_id() )
> +        printk(XENLOG_WARNING
> +               "warning: unsupported boot. d%d is not the initial domain.\n",

Maybe:
"warning: d%u is not the expected initial domid (%u)\n" ?

It's a strange message.  The domid property is added, but it's not 
expected to actually be used?

With the newlines addressed (and optionally the message change):

Reviewed-by: Jason Andryuk 

Thanks,
Jason


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On 4/24/2025 3:05 AM, Jürgen Groß wrote:
> 
> May I suggest to get rid of the "emul" parameter of pmu_msr_chk_emulated()?
> It has no real value, as pmu_msr_chk_emulated() could easily return 
> false in
> the cases where it would set *emul to false.

Good idea!

The function type is a bit of weird but I didn't think of change it.


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On 4/24/2025 3:11 AM, Jürgen Groß wrote:
> set_seg(), please (further up, too).

Good catch, thanks a lot!


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On Thu, Apr 24, 2025 at 12:54:41PM +0200, Nicola Vetrini wrote:
>
> On 4/23/25 23:53, Sergii Dmytruk wrote:
> > On Wed, Apr 23, 2025 at 10:11:35PM +0200, Nicola Vetrini wrote:
> > > On 2025-04-23 20:45, Sergii Dmytruk wrote:
> > > > On Wed, Apr 23, 2025 at 02:38:37PM +0100, Andrew Cooper wrote:
> > > > > On 22/04/2025 6:14 pm, Andrew Cooper wrote:
> > > > > > I've stripped out the sha2 patch and fixed up to use the existing sha2,
> > > > > > then kicked off some CI testing:
> > > > > >
> > > > > > https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1780285393
> > > > > > https://cirrus-ci.com/build/5452335868018688
> > > > > >
> > > > > > When the dust has settled, I'll talk you through the failures.
> > > > > And here we go. Interestingly, the FreeBSD testing was entirely
> > > > > happy,
> > > > > and that is the rare way around.
> > > > >
> > > > > For Gitlab, there are several areas.
> > > > >
> > > > > First, for MISRA. In the job logs, you want the "Browse current
> > > > > reports:" link which will give you full details, but it's all pretty
> > > > > simple stuff.
> > > > Thanks, but that link gives me a list of 5096 failures all over the code
> > > > base.  Is there any way to see a diff against master?
> > > >
> > > Hi,
> > >
> > > yes, you can define selections of violations introduced on previously clean
> > > guidelines by clicking on the "ECLAIR" button on the upper right. See [1]
> > > which is the result of defining the "clean_added" selection shown in the
> > > attached screenshot. If you have other questions please let me know.
> > Hi,
> >
> > not sure why, but using "added" left 4861 violations.  Picking `_NO_TAG`
> > instead seemingly left only new violations.  Maybe that's something
> > specific to this particular run.  Either way, I can go through the list
> > now and know how to adjust it.  Thank you for the instructions.
> >
> I'm not sure I fully understand this. This is what I see on x86: the ones
> still shown are those rules where the CI is blocking and new issues have
> been introduced by that pipeline run (of course a different pipeline may
> yield different results). Only new violations are blocking, so that is why I
> filtered out the rest in this case.

My bad, I still had "Hide" instead of "Show" in the selection.  Other
comboboxes are also hard to see but I wasn't even looking for one in
the title.  Thanks again.

> > > Thanks,
> > >   Nicola
> > >
> > > [1] https://saas.eclairit.com:3787/fs/var/local/eclair/xen-project.ecdf/xen-project/hardware/xen-staging/ECLAIR_normal/andrew/tb-v1.1/ARM64/9791028027/PROJECT.ecd;/by_service.html#service&kind{"select":true,"selection":{"hiddenAreaKinds":[],"hiddenSubareaKinds":[],"show":true,"selector":{"enabled":true,"negated":false,"kind":1,"children":[{"enabled":true,"negated":false,"kind":0,"domain":"clean","inputs":[{"enabled":true,"text":"added"}]}]}}}



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From: Ariadne Conill 
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Subject: Re: [PATCH] x86/hyperv: Adjust hypercall page placement
Date: Thu, 24 Apr 2025 11:22:50 -0700
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References: 
Cc: xen-devel@lists.xenproject.org, Jason Andryuk ,
 Jan Beulich , Andrew Cooper ,
 =?utf-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Paul Durrant , Alejandro Vallejo 
In-Reply-To: 
To: Alejandro Vallejo 
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Hi,

> On Apr 24, 2025, at 6:48=E2=80=AFAM, Alejandro Vallejo  w=
rote:
>=20
> =EF=BB=BFOn Thu Apr 24, 2025 at 1:45 PM BST, Alejandro Vallejo wrote:
>> Xen nowadays crashes under some Hyper-V configurations when
>> paddr_bits>36. At the 44bit boundary we reach an edge case in which the
>> end of the guest physical address space is not representable using 32bit
>> MFNs. Furthermore, it's an act of faith that the tail of the physical
>> address space has no reserved regions already.
>>=20
>> This commit uses the first unused MFN rather than the last, thus
>> ensuring the hypercall page placement is more resilient against such
>> corner cases.
>>=20
>> While at this, add an extra BUG_ON() to explicitly test for the
>> hypercall page being correctly set, and mark hcall_page_ready as
>> __ro_after_init.
>>=20
>> Fixes: 620fc734f854("x86/hyperv: setup hypercall page")
>> Signed-off-by: Alejandro Vallejo 
>=20
> After a side discussion, this seems on the unsafe side of things due to
> potential collision with MMIO. I'll resend (though not today) with the
> page overlapping a RAM page instead. Possibly the last page of actual
> RAM.

We have been working on bringing Xen up on Azure over at Edera, and have enc=
ountered this problem.  Our solution to this problem was to change Xen to ha=
ndle the hypercall trampoline page in the same way as Linux: dynamically all=
ocating a page from the heap and then marking it as executable.

This approach should avoid the issues with MMIO and page overlaps.  Would it=
 be more interesting to start with our patch instead?

Ariadne=


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From: Sergii Dmytruk 
To: Andrew Cooper 
Cc: xen-devel@lists.xenproject.org, Jan Beulich ,
	Roger Pau =?iso-8859-1?Q?Monn=E9?= ,
	Lukasz Hawrylko ,
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	trenchboot-devel@googlegroups.com
Subject: Re: [PATCH 00/21] x86: Trenchboot Secure Launch DRTM (Xen)
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On Wed, Apr 23, 2025 at 11:43:15PM +0100, Andrew Cooper wrote:
> On 23/04/2025 7:45 pm, Sergii Dmytruk wrote:
> > On Wed, Apr 23, 2025 at 02:38:37PM +0100, Andrew Cooper wrote:
> >> On 22/04/2025 6:14 pm, Andrew Cooper wrote:
> >>> I've stripped out the sha2 patch and fixed up to use the existing sha2,
> >>> then kicked off some CI testing:
> >>>
> >>> https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1780285393
> >>> https://cirrus-ci.com/build/5452335868018688
> >>>
> >>> When the dust has settled, I'll talk you through the failures.
> >> And here we go. Interestingly, the FreeBSD testing was entirely happy,
> >> and that is the rare way around.
> >>
> >> For Gitlab, there are several areas.
> >>
> >> First, for MISRA. In the job logs, you want the "Browse current
> >> reports:" link which will give you full details, but it's all pretty
> >> simple stuff.
> > Thanks, but that link gives me a list of 5096 failures all over the code
> > base.  Is there any way to see a diff against master?
>
> No sadly not. What you see is a mix of the blocking issues, and the "we
> want to see these so we can work on them".

Nicola Vetrini explained how some errors can be filtered in
https://lore.kernel.org/xen-devel/c2940798-11d0-4aaa-a013-64bef9bbdb82@apertussolutions.com/T/#m153e1cf8a6ef37d3d301253624c07fa3c25814c2
At least in this case it works when done correctly.

> >> kbl-suspend-x86-64-gcc-debug is a real S3 test on KabyLake hardware,
> >> which appears to have gone to sleep and never woken up. (More likely,
> >> crashed on wakeup before we got the console up). The AlderLake
> >> equivalent test seems to be happy, as well as the AMD ones.
> > Hm, not sure what that could be, but will try to reproduce/guess.
>
> KBL is unreliable in one specific way, but not with these symptoms.
>
> I reran the suspend test, and it failed in the same way. I think it's a
> deterministic bug.
>
> I can probably dig out my emergency serial debugging patches for S3 if
> you want?

Thanks, I'll try to come up with something first.  So far I thought
about a change in how stack is picked for APs, but I would expect all
hardware to have issues with S3 if that was the problem.

> >> Other common failures seem to be:
> >>
> >>  # take image offset into account
> >>  arch/x86/efi/fixmlehdr xen.efi 0x200000
> >>  Failed to find MLE header in xen.efi
> >>  arch/x86/Makefile:220: recipe for target 'xen.efi' failed
> >>  make[3]: *** [xen.efi] Error 1
> >>
> >> ~Andrew
> > That seems to be the only reason behind the rest of build failures.
> > I was able to reproduce the failure in Fedora 37 docker.  Searching for
> > the header in 8KiB instead of 4KiB fixes it.  Looks like large default
> > alignment of some toolchains pushes `head.S` to 4 KiB offset.
>
> FYI, you can access all the Xen containers with:
>
> CONTAINER=foo ./automation/scripts/containerize
>
> in the xen.git tree.

Thanks, that looks more convenient.

> Alignment that large is unexpected, and I suspect we want to fix it. Is
> it pre-existing, or something introduced by your series?
>
> ~Andrew

Pre-existing one.  I can see `-N` is already passed to `ld`:

-N, --omagic     Do not page align data, do not make text readonly

Specifying `--section-alignment 512 --file-alignment 512 --nmagic`
didn't reduce the alignment.  Statistics so far:

  Give 0x1000 offset:
  GNU ld (GNU Binutils for Debian) 2.31.1
  GNU ld version 2.38-27.fc37

  Give 0x440 offset:
  GNU ld (GNU Binutils for Debian) 2.40
  GNU ld (GNU Binutils for Debian) 2.41

Maybe that's not something configurable and just needs a newer version.


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Subject: Re: [PATCH 00/21] x86: Trenchboot Secure Launch DRTM (Xen)
To: Sergii Dmytruk 
Cc: xen-devel@lists.xenproject.org, Jan Beulich ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Lukasz Hawrylko ,
 "Daniel P. Smith" ,
 =?UTF-8?Q?Mateusz_M=C3=B3wka?= ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
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On 24/04/2025 7:47 pm, Sergii Dmytruk wrote:
>> Alignment that large is unexpected, and I suspect we want to fix it.  Is
>> it pre-existing, or something introduced by your series?
>>
>> ~Andrew
> Pre-existing one.  I can see `-N` is already passed to `ld`:
>
> -N, --omagic     Do not page align data, do not make text readonly
>
> Specifying `--section-alignment 512 --file-alignment 512 --nmagic`
> didn't reduce the alignment.  Statistics so far:
>
>   Give 0x1000 offset:
>   GNU ld (GNU Binutils for Debian) 2.31.1
>   GNU ld version 2.38-27.fc37
>
>   Give 0x440 offset:
>   GNU ld (GNU Binutils for Debian) 2.40
>   GNU ld (GNU Binutils for Debian) 2.41
>
> Maybe that's not something configurable and just needs a newer version.

Ah - that's something that was changed literally yesterday:

https://xenbits.xen.org/gitweb/?p=xen.git;a=commitdiff;h=d444763f8ca556d0a67a4b933be303d346baef02

in order to fix some problems we've had trying to get xen.efi happy to
be NX_COMPAT.

We couldn't identify any good reason why -N was in use.

~Andrew


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On 4/23/25 07:08, Mykyta Poturai wrote:
> From: Oleksandr Andrushchenko 
> 
> Add support for Renesas R-Car Gen4 PCI host controller, specifically
> targeting the S4 and V4H SoCs. The implementation includes configuration
> read/write operations for both root and child buses. For accessing the
> child bus, iATU is used for address translation.

In a system with dom0, I assume dom0 programs the iATU, and would do so
before issuing any PHYSDEVOP_pci_device_add hypercalls or PCI config
space accesses. Is that a correct assumption? If so, what is the use
case for iATU initialization in Xen? E.g. is it to guard against a
misconfigured or broken dom0? Do different iATU settings need to be
applied when running as a Xen guest vs not?

Further, is this driver sufficient to initialize the PCI controller
without dom0 involvement (e.g. to enable dom0less PCI passthrough)?

These would all be valid use cases IMO, but I would just like to
understand the rationale.

> 
> Code common to all DesignWare PCI host controllers is located in a
> separate file to allow for easy reuse in other DesignWare-based PCI
> host controllers.
> 
> Signed-off-by: Oleksandr Andrushchenko 
> Signed-off-by: Mykyta Poturai 
> ---
> v3->v4:
> * no changes
> 
> v2->v3:
> * move priv allocation to dw_pcie_host_probe
> 
> v1->v2:
> * move designware code in a separate file
> ---
>  xen/arch/arm/pci/Makefile         |   2 +
>  xen/arch/arm/pci/pci-designware.c | 403 ++++++++++++++++++++++++++++++
>  xen/arch/arm/pci/pci-designware.h | 102 ++++++++
>  xen/arch/arm/pci/pci-host-rcar4.c | 103 ++++++++
>  4 files changed, 610 insertions(+)
>  create mode 100644 xen/arch/arm/pci/pci-designware.c
>  create mode 100644 xen/arch/arm/pci/pci-designware.h
>  create mode 100644 xen/arch/arm/pci/pci-host-rcar4.c
> 
> diff --git a/xen/arch/arm/pci/Makefile b/xen/arch/arm/pci/Makefile
> index 1d045ade01..ca6135e282 100644
> --- a/xen/arch/arm/pci/Makefile
> +++ b/xen/arch/arm/pci/Makefile
> @@ -4,3 +4,5 @@ obj-y += pci-host-generic.o
>  obj-y += pci-host-common.o
>  obj-y += ecam.o
>  obj-y += pci-host-zynqmp.o
> +obj-y += pci-designware.o
> +obj-y += pci-host-rcar4.o
> diff --git a/xen/arch/arm/pci/pci-designware.c b/xen/arch/arm/pci/pci-designware.c
> new file mode 100644
> index 0000000000..dcbd07ced3
> --- /dev/null
> +++ b/xen/arch/arm/pci/pci-designware.c
> @@ -0,0 +1,403 @@
> +/*
> + * Based on Linux drivers/pci/controller/pci-host-common.c
> + * Based on Linux drivers/pci/controller/pci-host-generic.c
> + * Based on xen/arch/arm/pci/pci-host-generic.c

Linux drivers/pci/controller/dwc/pcie-designware.c ?

> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program.  If not, see .
> + */

Please use SPDX (see CODING_STYLE) here and in the other two new files.

> +
> +#include 
> +#include 
> +
> +#include "pci-designware.h"
> +/**
> + * upper_32_bits - return bits 32-63 of a number
> + * @n: the number we're accessing
> + *
> + * A basic shift-right of a 64- or 32-bit quantity.  Use this to suppress
> + * the "right shift count >= width of type" warning when that quantity is
> + * 32-bits.
> + */
> +#define upper_32_bits(n) ((uint32_t)(((n) >> 16) >> 16))
> +
> +/**
> + * lower_32_bits - return bits 0-31 of a number
> + * @n: the number we're accessing
> + */
> +#define lower_32_bits(n) ((uint32_t)((n) & 0xffffffff))

This constant needs a U suffix

> +
> +static int dw_pcie_read(void __iomem *addr, int size, uint32_t *val)
> +{
> +    if ( !IS_ALIGNED((uintptr_t)addr, size) )
> +    {
> +        *val = 0;
> +        return PCIBIOS_BAD_REGISTER_NUMBER;

The callers of dw_pcie_{read,write} below don't appear to do much (other
than printk) about the error returned. Please see
docs/process/coding-best-practices.pandoc regarding error handling.

> +    }
> +
> +    if ( size == 4 )
> +        *val = readl(addr);
> +    else if ( size == 2 )
> +        *val = readw(addr);
> +    else if ( size == 1 )
> +        *val = readb(addr);
> +    else
> +    {
> +        *val = 0;
> +        return PCIBIOS_BAD_REGISTER_NUMBER;
> +    }
> +
> +    return PCIBIOS_SUCCESSFUL;
> +}
> +
> +static int dw_pcie_write(void __iomem *addr, int size, uint32_t val)
> +{
> +    if ( !IS_ALIGNED((uintptr_t)addr, size) )
> +        return PCIBIOS_BAD_REGISTER_NUMBER;
> +
> +    if ( size == 4 )
> +        writel(val, addr);
> +    else if ( size == 2 )
> +        writew(val, addr);
> +    else if ( size == 1 )
> +        writeb(val, addr);
> +    else
> +        return PCIBIOS_BAD_REGISTER_NUMBER;
> +
> +    return PCIBIOS_SUCCESSFUL;
> +}
> +
> +static uint32_t dw_pcie_read_dbi(struct pci_host_bridge *bridge, uint32_t reg,
> +                                 size_t size)
> +{
> +    void __iomem *addr = bridge->cfg->win + reg;
> +    uint32_t val;
> +
> +    dw_pcie_read(addr, size, &val);
> +    return val;
> +}
> +
> +static void dw_pcie_write_dbi(struct pci_host_bridge *bridge, uint32_t reg,
> +                              size_t size, uint32_t val)
> +{
> +    void __iomem *addr = bridge->cfg->win + reg;
> +
> +    dw_pcie_write(addr, size, val);
> +}
> +
> +static uint32_t dw_pcie_readl_dbi(struct pci_host_bridge *bridge, uint32_t reg)
> +{
> +    return dw_pcie_read_dbi(bridge, reg, sizeof(uint32_t));
> +}
> +
> +static void dw_pcie_writel_dbi(struct pci_host_bridge *pci, uint32_t reg,
> +                               uint32_t val)
> +{
> +    dw_pcie_write_dbi(pci, reg, sizeof(uint32_t), val);
> +}
> +
> +static void dw_pcie_read_iatu_unroll_enabled(struct pci_host_bridge *bridge)
> +{
> +    struct dw_pcie_priv *priv = bridge->priv;
> +    uint32_t val;
> +
> +    val = dw_pcie_readl_dbi(bridge, PCIE_ATU_VIEWPORT);
> +    if ( val == 0xffffffff )

This constant needs a U suffix

> +        priv->iatu_unroll_enabled = true;
> +
> +    printk(XENLOG_DEBUG "%s iATU unroll: %sabled\n",

XENLOG_G_DEBUG

> +           dt_node_full_name(bridge->dt_node),
> +           priv->iatu_unroll_enabled ? "en" : "dis");
> +}
> +
> +static uint32_t dw_pcie_readl_atu(struct pci_host_bridge *pci, uint32_t reg)
> +{
> +    struct dw_pcie_priv *priv = pci->priv;
> +    int ret;
> +    uint32_t val;
> +
> +    ret = dw_pcie_read(priv->atu_base + reg, 4, &val);
> +    if ( ret )
> +        printk(XENLOG_ERR "Read ATU address failed\n");

XENLOG_G_ERR

> +
> +    return val;
> +}
> +
> +static void dw_pcie_writel_atu(struct pci_host_bridge *pci, uint32_t reg,
> +                               uint32_t val)
> +{
> +    struct dw_pcie_priv *priv = pci->priv;
> +    int ret;
> +
> +    ret = dw_pcie_write(priv->atu_base + reg, 4, val);
> +    if ( ret )
> +        printk(XENLOG_ERR "Write ATU address failed\n");

XENLOG_G_ERR

> +}
> +
> +static uint32_t dw_pcie_readl_ob_unroll(struct pci_host_bridge *pci,
> +                                        uint32_t index, uint32_t reg)
> +{
> +    uint32_t offset = PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(index);
> +
> +    return dw_pcie_readl_atu(pci, offset + reg);
> +}
> +
> +static void dw_pcie_writel_ob_unroll(struct pci_host_bridge *pci,
> +                                     uint32_t index, uint32_t reg, uint32_t val)
> +{
> +    uint32_t offset = PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(index);
> +
> +    dw_pcie_writel_atu(pci, offset + reg, val);
> +}
> +
> +static uint32_t dw_pcie_enable_ecrc(uint32_t val)
> +{
> +    ASSERT_UNREACHABLE();
> +    return 0;
> +}
> +
> +static void dw_pcie_prog_outbound_atu_unroll(struct pci_host_bridge *pci,
> +                                             uint8_t func_no, int index,
> +                                             int type, uint64_t cpu_addr,
> +                                             uint64_t pci_addr, uint64_t size)
> +{
> +    struct dw_pcie_priv *priv = pci->priv;
> +    uint32_t retries, val;
> +    uint64_t limit_addr = cpu_addr + size - 1;
> +
> +    dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_LOWER_BASE,
> +                             lower_32_bits(cpu_addr));
> +    dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_UPPER_BASE,
> +                             upper_32_bits(cpu_addr));
> +    dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_LOWER_LIMIT,
> +                             lower_32_bits(limit_addr));
> +    dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_UPPER_LIMIT,
> +                             upper_32_bits(limit_addr));
> +    dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_LOWER_TARGET,
> +                             lower_32_bits(pci_addr));
> +    dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_UPPER_TARGET,
> +                             upper_32_bits(pci_addr));
> +    val = type | PCIE_ATU_FUNC_NUM(func_no);
> +    val = upper_32_bits(size - 1) ? val | PCIE_ATU_INCREASE_REGION_SIZE : val;
> +    if ( priv->version == 0x490A )
> +        val = dw_pcie_enable_ecrc(val);
> +    dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_REGION_CTRL1, val);
> +    dw_pcie_writel_ob_unroll(pci, index, PCIE_ATU_UNR_REGION_CTRL2,
> +                             PCIE_ATU_ENABLE);
> +
> +    /*
> +     * Make sure ATU enable takes effect before any subsequent config
> +     * and I/O accesses.
> +     */
> +    for ( retries = 0; retries < LINK_WAIT_MAX_IATU_RETRIES; retries++ )
> +    {
> +        val = dw_pcie_readl_ob_unroll(pci, index, PCIE_ATU_UNR_REGION_CTRL2);
> +        if ( val & PCIE_ATU_ENABLE )
> +            return;
> +
> +        mdelay(LINK_WAIT_IATU);
> +    }

dw_pcie_child_{map_bus,config_read,config_write}, and thus
dw_pcie_prog_outbound_atu{_unroll}, would potentially be called on every
guest PCI access, where the d->pci_lock may be held. It doesn't seem
appropriate to have a busy-wait such as this in that code path.

If the busy-wait is necessary, then perhaps iATU configuration should
happen during init/probe (as your FIXME note below suggests), not as a
consequence of guest PCI access.

Same comment applies below.

> +    printk(XENLOG_ERR "Outbound iATU is not being enabled\n");

XENLOG_G_ERR

> +}
> +
> +static void __dw_pcie_prog_outbound_atu(struct pci_host_bridge *pci,
> +                                        uint8_t func_no, int index, int type,
> +                                        uint64_t cpu_addr, uint64_t pci_addr,
> +                                        uint64_t size)
> +{
> +    struct dw_pcie_priv *priv = pci->priv;
> +    uint32_t retries, val;
> +
> +    if ( priv->iatu_unroll_enabled )
> +    {
> +        dw_pcie_prog_outbound_atu_unroll(pci, func_no, index, type, cpu_addr,
> +                                         pci_addr, size);
> +        return;
> +    }
> +
> +    dw_pcie_writel_dbi(pci, PCIE_ATU_VIEWPORT,
> +                       PCIE_ATU_REGION_OUTBOUND | index);
> +    dw_pcie_writel_dbi(pci, PCIE_ATU_LOWER_BASE, lower_32_bits(cpu_addr));
> +    dw_pcie_writel_dbi(pci, PCIE_ATU_UPPER_BASE, upper_32_bits(cpu_addr));
> +    dw_pcie_writel_dbi(pci, PCIE_ATU_LIMIT, lower_32_bits(cpu_addr + size - 1));
> +    if ( priv->version >= 0x460A )
> +        dw_pcie_writel_dbi(pci, PCIE_ATU_UPPER_LIMIT,
> +                           upper_32_bits(cpu_addr + size - 1));
> +    dw_pcie_writel_dbi(pci, PCIE_ATU_LOWER_TARGET, lower_32_bits(pci_addr));
> +    dw_pcie_writel_dbi(pci, PCIE_ATU_UPPER_TARGET, upper_32_bits(pci_addr));
> +    val = type | PCIE_ATU_FUNC_NUM(func_no);
> +    val = ((upper_32_bits(size - 1)) && (priv->version >= 0x460A))
> +              ? val | PCIE_ATU_INCREASE_REGION_SIZE
> +              : val;
> +    if ( priv->version == 0x490A )
> +        val = dw_pcie_enable_ecrc(val);
> +    dw_pcie_writel_dbi(pci, PCIE_ATU_CR1, val);
> +    dw_pcie_writel_dbi(pci, PCIE_ATU_CR2, PCIE_ATU_ENABLE);
> +
> +    /*
> +     * Make sure ATU enable takes effect before any subsequent config
> +     * and I/O accesses.
> +     */
> +    for ( retries = 0; retries < LINK_WAIT_MAX_IATU_RETRIES; retries++ )
> +    {
> +        val = dw_pcie_readl_dbi(pci, PCIE_ATU_CR2);
> +        if ( val & PCIE_ATU_ENABLE )
> +            return;
> +
> +        mdelay(LINK_WAIT_IATU);
> +    }> +    printk(XENLOG_ERR "Outbound iATU is not being enabled\n");

XENLOG_G_ERR

> +}
> +
> +static void dw_pcie_prog_outbound_atu(struct pci_host_bridge *pci, int index,
> +                                      int type, uint64_t cpu_addr,
> +                                      uint64_t pci_addr, uint64_t size)
> +{
> +    __dw_pcie_prog_outbound_atu(pci, 0, index, type, cpu_addr, pci_addr, size);
> +}
> +
> +void dw_pcie_set_version(struct pci_host_bridge *bridge, unsigned int version)
> +{
> +    struct dw_pcie_priv *priv = bridge->priv;
> +
> +    priv->version = version;
> +}
> +
> +void __iomem *dw_pcie_child_map_bus(struct pci_host_bridge *bridge,
> +                                    pci_sbdf_t sbdf, uint32_t where)
> +{
> +    uint32_t busdev;
> +
> +    busdev = PCIE_ATU_BUS(sbdf.bus) | PCIE_ATU_DEV(PCI_SLOT(sbdf.devfn)) |
> +             PCIE_ATU_FUNC(PCI_FUNC(sbdf.devfn));
> +
> +    /* FIXME: Parent is the root bus, so use PCIE_ATU_TYPE_CFG0. */
> +    dw_pcie_prog_outbound_atu(bridge, PCIE_ATU_REGION_INDEX1,
> +                              PCIE_ATU_TYPE_CFG0, bridge->child_cfg->phys_addr,
> +                              busdev, bridge->child_cfg->size);

Does iATU configuration really need to happen on every guest PCI access?

> +
> +    return bridge->child_cfg->win + where;
> +}
> +
> +int dw_pcie_child_config_read(struct pci_host_bridge *bridge, pci_sbdf_t sbdf,
> +                              uint32_t reg, uint32_t len, uint32_t *value)
> +{
> +    struct dw_pcie_priv *priv = bridge->priv;
> +    int ret;
> +
> +    /*
> +     * FIXME: we cannot read iATU settings at the early initialization
> +     * (probe) as the host's HW is not yet initialized at that phase.
> +     * This read operation is the very first thing Domain-0 will do
> +     * during its initialization, so take this opportunity and read
> +     * iATU setting now.
> +     */
> +    if ( unlikely(!priv->iatu_unroll_initilized) )
> +    {
> +        dw_pcie_read_iatu_unroll_enabled(bridge);
> +        priv->iatu_unroll_initilized = true;
> +    }
> +
> +    ret = pci_generic_config_read(bridge, sbdf, reg, len, value);
> +    if ( !ret && (priv->num_viewport <= 2) )
> +        dw_pcie_prog_outbound_atu(bridge, PCIE_ATU_REGION_INDEX1,
> +                                  PCIE_ATU_TYPE_IO,
> +                                  bridge->child_cfg->phys_addr, 0,
> +                                  bridge->child_cfg->size);
> +
> +    return ret;
> +}
> +
> +int dw_pcie_child_config_write(struct pci_host_bridge *bridge, pci_sbdf_t sbdf,
> +                               uint32_t reg, uint32_t len, uint32_t value)
> +{
> +    struct dw_pcie_priv *priv = bridge->priv;
> +    int ret;
> +
> +    ret = pci_generic_config_write(bridge, sbdf, reg, len, value);
> +    if ( !ret && (priv->num_viewport <= 2) )
> +        dw_pcie_prog_outbound_atu(bridge, PCIE_ATU_REGION_INDEX1,
> +                                  PCIE_ATU_TYPE_IO,
> +                                  bridge->child_cfg->phys_addr, 0,
> +                                  bridge->child_cfg->size);
> +    return ret;
> +}
> +
> +bool __init dw_pcie_child_need_p2m_hwdom_mapping(struct domain *d,
> +                                                 struct pci_host_bridge *bridge,
> +                                                 uint64_t addr)
> +{
> +    struct pci_config_window *cfg = bridge->child_cfg;
> +
> +    /*
> +     * We do not want ECAM address space to be mapped in Domain-0's p2m,
> +     * so we can trap access to it.
> +     */
> +    return cfg->phys_addr != addr;
> +}
> +
> +struct pci_host_bridge *__init
> +dw_pcie_host_probe(struct dt_device_node *dev, const void *data,
> +                   const struct pci_ecam_ops *ops,
> +                   const struct pci_ecam_ops *child_ops)
> +{
> +    struct pci_host_bridge *bridge;
> +    struct dw_pcie_priv *priv;
> +
> +    paddr_t atu_phys_addr;
> +    paddr_t atu_size;
> +    int atu_idx, ret;
> +
> +    bridge = pci_host_common_probe(dev, ops, child_ops);
> +    if ( IS_ERR(bridge) )
> +        return bridge;
> +
> +    priv = xzalloc_bytes(sizeof(struct dw_pcie_priv));

xzalloc(struct dw_pcie_priv) ?

> +    if ( !priv )
> +        return ERR_PTR(-ENOMEM);
> +
> +    bridge->priv = priv;
> +
> +    atu_idx = dt_property_match_string(dev, "reg-names", "atu");
> +    if ( atu_idx < 0 )
> +    {
> +        printk(XENLOG_ERR "Cannot find \"atu\" range index in device tree\n");
> +        return ERR_PTR(atu_idx);
> +    }
> +    ret = dt_device_get_address(dev, atu_idx, &atu_phys_addr, &atu_size);
> +    if ( ret )
> +    {
> +        printk(XENLOG_ERR "Cannot find \"atu\" range in device tree\n");
> +        return ERR_PTR(ret);
> +    }
> +    printk("iATU at [mem 0x%" PRIpaddr "-0x%" PRIpaddr "]\n", atu_phys_addr,
> +           atu_phys_addr + atu_size - 1);
> +    priv->atu_base = ioremap_nocache(atu_phys_addr, atu_size);
> +    if ( !priv->atu_base )
> +    {
> +        printk(XENLOG_ERR "iATU ioremap failed\n");
> +        return ERR_PTR(ENXIO);
> +    }
> +
> +    if ( !dt_property_read_u32(dev, "num-viewport", &priv->num_viewport) )
> +        priv->num_viewport = 2;
> +
> +    /*
> +     * FIXME: we cannot read iATU unroll enable now as the host bridge's
> +     * HW is not yet initialized by Domain-0: leave it for later.
> +     */

Is there a plan to address this?

> +
> +    printk(XENLOG_INFO "%s number of view ports: %d\n", dt_node_full_name(dev),
> +           priv->num_viewport);
> +
> +    return bridge;
> +}
> diff --git a/xen/arch/arm/pci/pci-designware.h b/xen/arch/arm/pci/pci-designware.h
> new file mode 100644
> index 0000000000..a15ba9a329
> --- /dev/null
> +++ b/xen/arch/arm/pci/pci-designware.h
> @@ -0,0 +1,102 @@
> +/*
> + * Based on Linux drivers/pci/controller/pci-host-common.c
> + * Based on Linux drivers/pci/controller/pci-host-generic.c
> + * Based on xen/arch/arm/pci/pci-host-generic.c
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program.  If not, see .
> + */
> +
> +#include 
> +#include 
> +
> +#ifndef __PCI_DESIGNWARE_H__
> +#define __PCI_DESIGNWARE_H__
> +
> +#define PCIBIOS_SUCCESSFUL              0x00
> +#define PCIBIOS_BAD_REGISTER_NUMBER     0x87

Could you use existing error code definitions instead of introducing new
ones?

> +
> +#define PCIE_ATU_VIEWPORT               0x900
> +#define PCIE_ATU_REGION_OUTBOUND        0
> +#define PCIE_ATU_CR1                    0x904
> +#define PCIE_ATU_INCREASE_REGION_SIZE   BIT(13, UL)
> +#define PCIE_ATU_CR2                    0x908
> +#define PCIE_ATU_ENABLE                 BIT(31, UL)
> +#define PCIE_ATU_LOWER_BASE             0x90C
> +#define PCIE_ATU_UPPER_BASE             0x910
> +#define PCIE_ATU_LIMIT                  0x914
> +#define PCIE_ATU_LOWER_TARGET           0x918
> +#define PCIE_ATU_UPPER_TARGET           0x91C
> +#define PCIE_ATU_UPPER_LIMIT            0x924
> +
> +#define PCIE_ATU_REGION_INDEX1  0x1
> +#define PCIE_ATU_TYPE_IO        0x2
> +#define PCIE_ATU_TYPE_CFG0      0x4
> +
> +#define FIELD_PREP(_mask, _val) \
> +    (((typeof(_mask))(_val) << (ffs64(_mask) - 1)) & (_mask))
> +
> +#define PCIE_ATU_BUS(x)         FIELD_PREP(GENMASK(31, 24), x)
> +#define PCIE_ATU_DEV(x)         FIELD_PREP(GENMASK(23, 19), x)
> +#define PCIE_ATU_FUNC(x)        FIELD_PREP(GENMASK(18, 16), x)

Parenthesis around (x)

> +
> +/* Register address builder */
> +#define PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(region) \
> +    ((region) << 9)
> +
> +/*
> + * iATU Unroll-specific register definitions
> + * From 4.80 core version the address translation will be made by unroll
> + */
> +#define PCIE_ATU_UNR_REGION_CTRL1       0x00
> +#define PCIE_ATU_UNR_REGION_CTRL2       0x04
> +#define PCIE_ATU_UNR_LOWER_BASE         0x08
> +#define PCIE_ATU_UNR_UPPER_BASE         0x0C
> +#define PCIE_ATU_UNR_LOWER_LIMIT        0x10
> +#define PCIE_ATU_UNR_LOWER_TARGET       0x14
> +#define PCIE_ATU_UNR_UPPER_TARGET       0x18
> +#define PCIE_ATU_UNR_UPPER_LIMIT        0x20
> +
> +#define PCIE_ATU_FUNC_NUM(pf)           ((pf) << 20)
> +
> +/* Parameters for the waiting for iATU enabled routine */
> +#define LINK_WAIT_MAX_IATU_RETRIES      5
> +#define LINK_WAIT_IATU                  9
> +
> +struct dw_pcie_priv {
> +    uint32_t num_viewport;
> +    bool iatu_unroll_initilized;
> +    bool iatu_unroll_enabled;
> +    void __iomem *atu_base;
> +    unsigned int version;
> +};
> +
> +void dw_pcie_set_version(struct pci_host_bridge *bridge, unsigned int version);
> +
> +void __iomem *dw_pcie_child_map_bus(struct pci_host_bridge *bridge,
> +                                    pci_sbdf_t sbdf, uint32_t where);
> +
> +int dw_pcie_child_config_read(struct pci_host_bridge *bridge, pci_sbdf_t sbdf,
> +                              uint32_t reg, uint32_t len, uint32_t *value);
> +
> +int dw_pcie_child_config_write(struct pci_host_bridge *bridge, pci_sbdf_t sbdf,
> +                               uint32_t reg, uint32_t len, uint32_t value);
> +
> +bool __init dw_pcie_child_need_p2m_hwdom_mapping(struct domain *d,
> +                                                 struct pci_host_bridge *bridge,
> +                                                 uint64_t addr);
> +
> +struct pci_host_bridge *__init
> +dw_pcie_host_probe(struct dt_device_node *dev, const void *data,
> +                   const struct pci_ecam_ops *ops,
> +                   const struct pci_ecam_ops *child_ops);
> +#endif /* __PCI_DESIGNWARE_H__ */
> diff --git a/xen/arch/arm/pci/pci-host-rcar4.c b/xen/arch/arm/pci/pci-host-rcar4.c
> new file mode 100644
> index 0000000000..cae1b4254d
> --- /dev/null
> +++ b/xen/arch/arm/pci/pci-host-rcar4.c
> @@ -0,0 +1,103 @@
> +/*
> + * Based on Linux drivers/pci/controller/pci-host-common.c
> + * Based on Linux drivers/pci/controller/pci-host-generic.c
> + * Based on xen/arch/arm/pci/pci-host-generic.c
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program.  If not, see .
> + */> +
> +#include 
> +#include 
> +
> +#include 
> +#include 
> +#include 
> +
> +#include "pci-designware.h"
> +
> +#define RCAR4_DWC_VERSION       0x520A
> +
> +/*
> + * PCI host bridges often have different ways to access the root and child
> + * bus config spaces:
> + *   "dbi"   : the aperture where root port's own configuration registers
> + *             are available.
> + *   "config": child's configuration space
> + *   "atu"   : iATU registers for DWC version 4.80 or later
> + */
> +static int __init rcar4_cfg_reg_index(struct dt_device_node *np)
> +{
> +    return dt_property_match_string(np, "reg-names", "dbi");
> +}
> +
> +static int __init rcar4_child_cfg_reg_index(struct dt_device_node *np)
> +{
> +    return dt_property_match_string(np, "reg-names", "config");
> +}
> +
> +/* ECAM ops */
> +const struct pci_ecam_ops rcar4_pcie_ops = {
> +    .bus_shift  = 20,
> +    .cfg_reg_index = rcar4_cfg_reg_index,
> +    .pci_ops    = {
> +        .map_bus                = pci_ecam_map_bus,
> +        .read                   = pci_generic_config_read,
> +        .write                  = pci_generic_config_write,
> +        .need_p2m_hwdom_mapping = pci_ecam_need_p2m_hwdom_mapping,
> +    }
> +};
> +
> +const struct pci_ecam_ops rcar4_pcie_child_ops = {
> +    .bus_shift  = 20,
> +    .cfg_reg_index = rcar4_child_cfg_reg_index,
> +    .pci_ops    = {
> +        .map_bus                = dw_pcie_child_map_bus,
> +        .read                   = dw_pcie_child_config_read,
> +        .write                  = dw_pcie_child_config_write,
> +        .need_p2m_hwdom_mapping = dw_pcie_child_need_p2m_hwdom_mapping,
> +    }
> +};
> +
> +static const struct dt_device_match __initconstrel rcar4_pcie_dt_match[] = {
> +    { .compatible = "renesas,r8a779f0-pcie" },
> +    { .compatible = "renesas,r8a779g0-pcie" },
> +    {},
> +};
> +
> +static int __init pci_host_generic_probe(struct dt_device_node *dev,
> +                                         const void *data)

It's not really a "generic" probe... How about naming the function
pci_host_rcar4_probe ?

> +{
> +    struct pci_host_bridge *bridge;
> +
> +    bridge = dw_pcie_host_probe(dev, data, &rcar4_pcie_ops,
> +                                &rcar4_pcie_child_ops);
> +
> +    dw_pcie_set_version(bridge, RCAR4_DWC_VERSION);
> +
> +    return 0;
> +}
> +
> +DT_DEVICE_START(pci_gen, "PCI HOST R-CAR GEN4", DEVICE_PCI_HOSTBRIDGE)
> +.dt_match = rcar4_pcie_dt_match,
> +.init = pci_host_generic_probe,
> +DT_DEVICE_END
> +
> +/*
> + * Local variables:
> + * mode: C
> + * c-file-style: "BSD"
> + * c-basic-offset: 4
> + * tab-width: 4
> + * indent-tabs-mode: nil
> + * End:
> + */



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Date: Thu, 24 Apr 2025 21:46:50 +0100
Message-ID: 
To: Ariadne Conill 
CC: , Jason Andryuk ,
	Jan Beulich , Andrew Cooper ,
	=?utf-8?q?Roger_Pau_Monn=C3=A9?= , Paul Durrant
	
Subject: Re: [PATCH] x86/hyperv: Adjust hypercall page placement
From: Alejandro Vallejo 
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On Thu Apr 24, 2025 at 7:22 PM BST, Ariadne Conill wrote:
> Hi,
>
>> On Apr 24, 2025, at 6:48=E2=80=AFAM, Alejandro Vallejo  wrote:
>>=20
>> =EF=BB=BFOn Thu Apr 24, 2025 at 1:45 PM BST, Alejandro Vallejo wrote:
>>> Xen nowadays crashes under some Hyper-V configurations when
>>> paddr_bits>36. At the 44bit boundary we reach an edge case in which the
>>> end of the guest physical address space is not representable using 32bi=
t
>>> MFNs. Furthermore, it's an act of faith that the tail of the physical
>>> address space has no reserved regions already.
>>>=20
>>> This commit uses the first unused MFN rather than the last, thus
>>> ensuring the hypercall page placement is more resilient against such
>>> corner cases.
>>>=20
>>> While at this, add an extra BUG_ON() to explicitly test for the
>>> hypercall page being correctly set, and mark hcall_page_ready as
>>> __ro_after_init.
>>>=20
>>> Fixes: 620fc734f854("x86/hyperv: setup hypercall page")
>>> Signed-off-by: Alejandro Vallejo 
>>=20
>> After a side discussion, this seems on the unsafe side of things due to
>> potential collision with MMIO. I'll resend (though not today) with the
>> page overlapping a RAM page instead. Possibly the last page of actual
>> RAM.
>
> We have been working on bringing Xen up on Azure over at Edera, and
> have encountered this problem.  Our solution to this problem was to
> change Xen to handle the hypercall trampoline page in the same way as
> Linux: dynamically allocating a page from the heap and then marking it
> as executable.
>
> This approach should avoid the issues with MMIO and page overlaps.

Yes, that's what I meant by overlapping RAM. Overlaying the hypercall
page on top of existing RAM rather than trying to find a suitable hole.

> Would it be more interesting to start with our patch instead?

If you have it ready to go, for sure. My ability to test any of this is
fairly limited. I suspect the VM is just not getting 48 bits worth of
guest-physical address space, and so making any hypercall turns into an
EPT violation.

I couldn't run the tests that would definitely prove it though

>From the little I saw of the dmesg going forward, I suspect there's more
required (at least in time handling) to enable support in gen2
insteances.

Cheers,
Alejandro



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Date: Thu, 24 Apr 2025 14:14:12 -0700
From: "H. Peter Anvin" 
To: Xin Li , =?ISO-8859-1?Q?J=FCrgen_Gro=DF?= ,
        linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
CC: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, acme@kernel.org,
        andrew.cooper3@citrix.com, peterz@infradead.org, namhyung@kernel.org,
        mark.rutland@arm.com, alexander.shishkin@linux.intel.com,
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        kan.liang@linux.intel.com, wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
        pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com
Subject: Re: [RFC PATCH v2 12/34] x86/msr: Remove pmu_msr_{read,write}()
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References: <20250422082216.1954310-1-xin@zytor.com> <20250422082216.1954310-13-xin@zytor.com> <8944b510-6d70-472c-99a2-52a60517733d@suse.com> 
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On April 24, 2025 10:49:59 AM PDT, Xin Li  wrote:
>On 4/24/2025 3:05 AM, J=C3=BCrgen Gro=C3=9F wrote:
>>=20
>> May I suggest to get rid of the "emul" parameter of pmu_msr_chk_emulate=
d()?
>> It has no real value, as pmu_msr_chk_emulated() could easily return fal=
se in
>> the cases where it would set *emul to false=2E
>
>Good idea!
>
>The function type is a bit of weird but I didn't think of change it=2E

It is weird in the extreme=2E=20

By the way, this patch should have "xen" in its subject tag=2E


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On 2025-04-24 06:48, Roger Pau Monné wrote:
> On Thu, Apr 24, 2025 at 12:15:17PM +0200, Marek Marczykowski-Górecki wrote:
>> On Thu, Apr 24, 2025 at 09:59:00AM +0200, Roger Pau Monné wrote:
>>> On Wed, Apr 23, 2025 at 04:51:16PM -0700, Lira, Victor M wrote:
>>>> [    4.570354] Intel(R) 2.5G Ethernet Linux Driver
>>>>
>>>> [    4.579535] Copyright(c) 2018 Intel Corporation.
>>>>
>>>> [    4.588898] sky2: driver version 1.30
>>>>
>>>> (XEN) [   21.644361] d0v3 unable to fixup memory read from 0xfe91000c size 4: -1
>>>
>>> This fault is unexpected, according to the identity mappings done at
>>> domain build time:
>>>
>>> d0: identity mappings for IOMMU:
>>>   [00000000a0, 00000000ff] RW
>>>   [0000009bff, 0000009fff] RW
>>>   [00000cabc9, 00000cc14c] RW
>>>   [00000cc389, 00000cc389] RW
>>>   [00000cc70a, 00000cd1fe] RW
>>>   [00000ce000, 00000cffff] RW
>>>   [00000fd000, 00000fd2ff] RW
>>>
>>> The page at 0xfe910 should be covered by the last range above.  I
>>> think we have a bug somewhere that unexpectedly unmaps that address.
>>
>> You sure? 0xfe910 is outside of [00000fd000, 00000fd2ff].
> 
> Oh, did and off-by-one when copying, it should have been:
> 
> d0: identity mappings for IOMMU:
>   [00000000a0, 00000000ff] RW
>   [0000009bff, 0000009fff] RW
>   [00000cabc9, 00000cc14c] RW
>   [00000cc389, 00000cc389] RW
>   [00000cc70a, 00000cd1fe] RW	
>   [00000ce000, 00000cffff] RW
>   [00000fd000, 00000fd2ff] RW
>   [00000fd304, 00000febff] RW
> 
> Where 0xfe910 is covered by the last range.

This looks like it's okay.  You think the somehow the device ranges are 
unmapped?

I thought the immediate issue is that the e820 marks these addresses 
reserved.  That leads to pci_check_bars()->is_memory_hole() returning 
false.  Stefano's original patch just returned true for non-RAM memory 
regions and the device worked.  That would leave bar->mem rangeset 
empty, IIUC.  Not sure how that would remove mappings though.

That also changes the setting of bar->enabled, but I don't immediately 
see how that affects mappings.

Regards,
Jason


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From: Jason Andryuk 
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	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH v2] xen/vpci: Fix msix existing mapping printk
Date: Thu, 24 Apr 2025 17:23:26 -0400
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The format string lacks a space, so mfn and type run together:
(XEN) d0v0 0000:06:00.7: existing mapping (mfn: 753037type: 0) at 0x1 clobbers MSIX MMIO area

Add a space.  Additionally, move the format string to a single long line
to improve grep-ability.

Fixes: 677053fac17a ("vpci/msix: carve p2m hole for MSIX MMIO regions")
Signed-off-by: Jason Andryuk 
---
v2:
Use a single line
Add Fixes
---
 xen/drivers/vpci/msix.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c
index f3804ce047..3568f2a651 100644
--- a/xen/drivers/vpci/msix.c
+++ b/xen/drivers/vpci/msix.c
@@ -665,8 +665,7 @@ int vpci_make_msix_hole(const struct pci_dev *pdev)
             default:
                 put_gfn(d, start);
                 gprintk(XENLOG_WARNING,
-                        "%pp: existing mapping (mfn: %" PRI_mfn
-                        "type: %d) at %#lx clobbers MSIX MMIO area\n",
+                        "%pp: existing mapping (mfn: %" PRI_mfn " type: %d) at %#lx clobbers MSIX MMIO area\n",
                         &pdev->sbdf, mfn_x(mfn), t, start);
                 return -EEXIST;
             }
-- 
2.49.0



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Subject: Re: [PATCH] x86/hyperv: Adjust hypercall page placement
To: Alejandro Vallejo 
Cc: Ariadne Conill , xen-devel@lists.xenproject.org, 
	Jason Andryuk , Jan Beulich , 
	Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
	Paul Durrant 
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I worked on Xen-on-Azure last summer in my previous position. Allocating a
heap page was how we solved this particular issue in our branch as well.

I see you say you're still 'working on bringing Xen up on Azure', so I'm
not sure how far along your branch / patch set is, but for what it's worth,
we had "everything" working, including use of VMBus and passthrough devices
in dom0.

The Azure version of the product got put on ice, and the code wasn't in a
very 'upstreamable' state due to how patches/branches were managed, but
bottom line is I know every bump on the Xen-on-Azure road, so may be able
to help get an upstream version of this 'the rest of the way' if you start
pushing it to xen-devel.

Cheers,
Trolle

On Thu, Apr 24, 2025 at 4:47=E2=80=AFPM Alejandro Vallejo  wrote:

> On Thu Apr 24, 2025 at 7:22 PM BST, Ariadne Conill wrote:
> > Hi,
> >
> >> On Apr 24, 2025, at 6:48=E2=80=AFAM, Alejandro Vallejo 
> wrote:
> >>
> >> =EF=BB=BFOn Thu Apr 24, 2025 at 1:45 PM BST, Alejandro Vallejo wrote:
> >>> Xen nowadays crashes under some Hyper-V configurations when
> >>> paddr_bits>36. At the 44bit boundary we reach an edge case in which t=
he
> >>> end of the guest physical address space is not representable using
> 32bit
> >>> MFNs. Furthermore, it's an act of faith that the tail of the physical
> >>> address space has no reserved regions already.
> >>>
> >>> This commit uses the first unused MFN rather than the last, thus
> >>> ensuring the hypercall page placement is more resilient against such
> >>> corner cases.
> >>>
> >>> While at this, add an extra BUG_ON() to explicitly test for the
> >>> hypercall page being correctly set, and mark hcall_page_ready as
> >>> __ro_after_init.
> >>>
> >>> Fixes: 620fc734f854("x86/hyperv: setup hypercall page")
> >>> Signed-off-by: Alejandro Vallejo 
> >>
> >> After a side discussion, this seems on the unsafe side of things due t=
o
> >> potential collision with MMIO. I'll resend (though not today) with the
> >> page overlapping a RAM page instead. Possibly the last page of actual
> >> RAM.
> >
> > We have been working on bringing Xen up on Azure over at Edera, and
> > have encountered this problem.  Our solution to this problem was to
> > change Xen to handle the hypercall trampoline page in the same way as
> > Linux: dynamically allocating a page from the heap and then marking it
> > as executable.
> >
> > This approach should avoid the issues with MMIO and page overlaps.
>
> Yes, that's what I meant by overlapping RAM. Overlaying the hypercall
> page on top of existing RAM rather than trying to find a suitable hole.
>
> > Would it be more interesting to start with our patch instead?
>
> If you have it ready to go, for sure. My ability to test any of this is
> fairly limited. I suspect the VM is just not getting 48 bits worth of
> guest-physical address space, and so making any hypercall turns into an
> EPT violation.
>
> I couldn't run the tests that would definitely prove it though
>
> From the little I saw of the dmesg going forward, I suspect there's more
> required (at least in time handling) to enable support in gen2
> insteances.
>
> Cheers,
> Alejandro
>
>
>

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Content-Type: text/html; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable


I worked on Xen-on-Azure last summer in my previous positi=
on. Allocating a heap page was how we solved this particular issue in our b=
ranch as well.

I see you say you're still 'working on bringi=
ng Xen up on Azure', so I'm not sure how far along your branch / pa=
tch set is, but for what it's worth, we had "everything" work=
ing, including use of VMBus and passthrough devices in dom0.

The Az=
ure version of the product got put on ice, and the code wasn't in a ver=
y 'upstreamable' state due to how patches/branches were managed, bu=
t bottom line is I know every bump on the Xen-on-Azure road, so may be able=
 to help get an upstream version of this 'the rest of the way' if y=
ou start pushing it to xen-devel.

Cheers,
Trol=
le

On Thu, Apr 24, 2025 at 4:47=E2=80=AFPM=
 Alejandro Vallejo <agarciav@amd.com=
> wrote:
=
On Thu Apr 24, 2025 at 7:22 PM BST, Ariadne Conill wrote:

> Hi,

>

>> On Apr 24, 2025, at 6:48=E2=80=AFAM, Alejandro Vallejo <agarciav@amd.com> wro=
te:

>> 

>> =EF=BB=BFOn Thu Apr 24, 2025 at 1:45 PM BST, Alejandro Vallejo wro=
te:

>>> Xen nowadays crashes under some Hyper-V configurations when
>>> paddr_bits>36. At the 44bit boundary we reach an edge case =
in which the

>>> end of the guest physical address space is not representable u=
sing 32bit

>>> MFNs. Furthermore, it's an act of faith that the tail of t=
he physical

>>> address space has no reserved regions already.

>>> 

>>> This commit uses the first unused MFN rather than the last, th=
us

>>> ensuring the hypercall page placement is more resilient agains=
t such

>>> corner cases.

>>> 

>>> While at this, add an extra BUG_ON() to explicitly test for th=
e

>>> hypercall page being correctly set, and mark hcall_page_ready =
as

>>> __ro_after_init.

>>> 

>>> Fixes: 620fc734f854("x86/hyperv: setup hypercall page&quo=
t;)

>>> Signed-off-by: Alejandro Vallejo <agarciav@amd.com>

>> 

>> After a side discussion, this seems on the unsafe side of things d=
ue to

>> potential collision with MMIO. I'll resend (though not today) =
with the

>> page overlapping a RAM page instead. Possibly the last page of act=
ual

>> RAM.

>

> We have been working on bringing Xen up on Azure over at Edera, and
> have encountered this problem.=C2=A0 Our solution to this problem was =
to

> change Xen to handle the hypercall trampoline page in the same way as<=
br>
> Linux: dynamically allocating a page from the heap and then marking it=


> as executable.

>

> This approach should avoid the issues with MMIO and page overlaps.



Yes, that's what I meant by overlapping RAM. Overlaying the hypercall
page on top of existing RAM rather than trying to find a suitable hole.



> Would it be more interesting to start with our patch instead?



If you have it ready to go, for sure. My ability to test any of this is

fairly limited. I suspect the VM is just not getting 48 bits worth of

guest-physical address space, and so making any hypercall turns into an

EPT violation.



I couldn't run the tests that would definitely prove it though



>From the little I saw of the dmesg going forward, I suspect there's mor=
e

required (at least in time handling) to enable support in gen2

insteances.



Cheers,

Alejandro








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Date: Thu, 24 Apr 2025 14:38:29 -0700
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Subject: Re: [RFC] xen/x86: allow overlaps with non-RAM regions
To: Jason Andryuk ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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Cc: Stefano Stabellini ,
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Hello all,

Here is the output from Roger's patch.
This is the section of interest:

> (XEN) [ 7.547326] d0 has maximum 3328PIRQs
> (XEN) [ 7.555644] *** Building a PVH Dom0 ***
> (XEN) [ 7.567780] d0: identity mappings for IOMMU:
> (XEN) [ 7.577312]  [00000000a0, 00000000ff] RW
> (XEN) [ 7.586153]  [0000009bff, 0000009fff] RW
> (XEN) [ 7.594992]  [00000cabc9, 00000cc14c] RW
> (XEN) [ 7.603866]  [00000cc389, 00000cc389] RW
> (XEN) [ 7.612707]  [00000cc70a, 00000cd1fe] RW
> (XEN) [ 7.621896]  [00000ce000, 00000cffff] RW
> (XEN) [ 7.630731]  [00000fd000, 00000fd2ff] RW
> (XEN) [ 7.639573]  [00000fd304, 00000febff] RW
> (XEN) [ 7.648414] gfn 0xfe800mfn 0xfe800type 5order 9
> (XEN) [ 7.658985] Xen WARNat arch/x86/mm/p2m-pt.c:599
> (XEN) [ 7.669215] ----[ Xen-4.21-unstable x86_64  debug=y  Tainted:   
> C    ]----
> ...
> (XEN) [ 8.227521] Xen call trace:
> (XEN) [ 8.234107]    [] R 
> arch/x86/mm/p2m-pt.c#p2m_pt_set_entry+0xc1/0x961
> (XEN) [ 8.250925]    [] F p2m_set_entry+0xb5/0x13c
> (XEN) [ 8.263579]    [] F 
> arch/x86/mm/p2m.c#set_typed_p2m_entry+0xfd/0x6f0
> (XEN) [ 8.280388]    [] F set_mmio_p2m_entry+0x62/0x6b
> (XEN) [ 8.293735]    [] F map_mmio_regions+0x77/0xcf
> (XEN) [ 8.306734]    [] F 
> drivers/passthrough/x86/iommu.c#identity_map+0x7e/0x196
> (XEN) [ 8.324761]    [] F 
> rangeset_report_ranges+0x10a/0x159
> (XEN) [ 8.339149]    [] F 
> arch_iommu_hwdom_init+0x27f/0x316
> (XEN) [ 8.353361]    [] F 
> drivers/passthrough/amd/pci_amd_iommu.c#amd_iommu_hwdom_init+0xa9/0xc1
> (XEN) [ 8.373988]    [] F iommu_hwdom_init+0x26/0x2e
> (XEN) [ 8.386989]    [] F 
> dom0_construct_pvh+0x265/0x1141
> (XEN) [ 8.400860]    [] F construct_dom0+0x47/0x93
> (XEN) [ 8.413511]    [] F __start_xen+0x21fc/0x2425
> (XEN) [ 8.426340]    [] F __high_start+0x8e/0x90
> (XEN) [ 8.438646]
> (XEN) [ 8.442632]  [00000fec02, 00000fedff] RW
> (XEN) [ 8.451599]  [00000fee01, 00000fffff] RW
> (XEN) [ 8.460571]  [000080f340, 00008501ff] RW
> (XEN) [ 8.470205] 0000:02:00.0: not mapping BAR [fea00, fea03] invalid 
> position
> (XEN) [ 8.484769] 0000:03:00.0: not mapping BAR [fe900, fe90f] invalid 
> position
> (XEN) [ 8.499330] 0000:03:00.0: not mapping BAR [fe910, fe913] invalid 
> position
> (XEN) [ 8.513890] gfn 0xfe910mfn 0xfffffffffffffffftype 1order 0
> (XEN) [ 8.526370] Xen WARNat arch/x86/mm/p2m-pt.c:599
> ...
> (XEN) [ 9.094902] Xen call trace:
> (XEN) [ 9.101491]    [] R 
> arch/x86/mm/p2m-pt.c#p2m_pt_set_entry+0xc1/0x961
> (XEN) [ 9.118306]    [] F p2m_set_entry+0xb5/0x13c
> (XEN) [ 9.130957]    [] F 
> p2m_remove_identity_entry+0x26f/0x2ca
> (XEN) [ 9.145865]    [] F 
> vpci_make_msix_hole+0x11a/0x27a
> (XEN) [ 9.159734]    [] F 
> drivers/vpci/header.c#modify_decoding+0x4e/0x1b3
> (XEN) [ 9.176547]    [] F 
> drivers/vpci/header.c#modify_bars+0x660/0x6c4
> (XEN) [ 9.192838]    [] F 
> drivers/vpci/header.c#init_header+0x5e7/0x86f
> (XEN) [ 9.209129]    [] F vpci_assign_device+0xd3/0x115
> (XEN) [ 9.222648]    [] F 
> drivers/passthrough/pci.c#setup_one_hwdom_device+0x92/0x15b
> (XEN) [ 9.241368]    [] F 
> drivers/passthrough/pci.c#_setup_hwdom_pci_devices+0x158/0x241
> (XEN) [ 9.260612]    [] F 
> drivers/passthrough/pci.c#pci_segments_iterate+0x43/0x69
> (XEN) [ 9.278814]    [] F 
> setup_hwdom_pci_devices+0x28/0x2f
> (XEN) [ 9.293026]    [] F 
> drivers/passthrough/amd/pci_amd_iommu.c#amd_iommu_hwdom_init+0xb8/0xc1
> (XEN) [ 9.313649]    [] F iommu_hwdom_init+0x26/0x2e
> (XEN) [ 9.326652]    [] F 
> dom0_construct_pvh+0x265/0x1141
> (XEN) [ 9.340516]    [] F construct_dom0+0x47/0x93
> (XEN) [ 9.353172]    [] F __start_xen+0x21fc/0x2425
> (XEN) [ 9.365999]    [] F __high_start+0x8e/0x90
> (XEN) [ 9.378305]
> (XEN) [ 9.382289] 0000:04:00.0: not mapping BAR [fe700, fe77f] invalid 
> position
> (XEN) [ 9.396850] 0000:04:00.3: not mapping BAR [fe500, fe5ff] invalid 
> position
> (XEN) [ 9.411412] 0000:04:00.4: not mapping BAR [fe400, fe4ff] invalid 
> position
> (XEN) [ 9.425972] 0000:05:00.0: not mapping BAR [fe801, fe801] invalid 
> position
> (XEN) [ 9.440531] 0000:05:00.1: not mapping BAR [fe800, fe800] invalid 
> position

So vpci_make_msix_hole is where it's getting removed.


Victor


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Date: Thu, 24 Apr 2025 14:45:27 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Jan Beulich 
cc: victorm.lira@amd.com, Nicola Vetrini , 
    Federico Serafini , 
    Andrew Cooper , 
    Anthony PERARD , 
    Michal Orzel , Julien Grall , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
    Stefano Stabellini , 
    Bertrand Marquis , 
    xen-devel@lists.xenproject.org
Subject: Re: [PATCH v1] misra: add deviation for rules 21.1 and 21.2
In-Reply-To: 
Message-ID: 
References: <9e1210f2a9c794d68dcc6b897239b228b141296a.1745427770.git.victorm.lira@amd.com> 
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On Thu, 24 Apr 2025, Jan Beulich wrote:
> On 23.04.2025 19:54, victorm.lira@amd.com wrote:
> > From: Nicola Vetrini 
> > 
> > MISRA C Rules 21.1 ("#define and #undef shall not be used on a
> > reserved identifier or reserved macro name") and R21.2 ("A reserved
> > identifier or reserved macro name shall not be declared") violations
> > are not problematic for Xen, as it does not use the C or POSIX
> > libraries.
> > 
> > Xen uses -fno-builtin and -nostdinc to ensure this, but there are still
> > __builtin_* functions from the compiler that are available so
> > a deviation is formulated for all identifiers not starting with
> > "__builtin_".
> > 
> > The missing text of a deviation for Rule 21.2 is added to
> > docs/misra/deviations.rst.
> > 
> > To avoid regressions, tag both rules as clean and add them to the
> > monitored set.
> > 
> > Signed-off-by: Nicola Vetrini 
> > Signed-off-by: Federico Serafini 
> > Signed-off-by: Victor Lira 
> 
> While the rule is in the library section, ...
> 
> > --- a/docs/misra/deviations.rst
> > +++ b/docs/misra/deviations.rst
> > @@ -587,7 +587,31 @@ Deviations related to MISRA C:2012 Rules:
> >         construct is deviated only in Translation Units that present a violation
> >         of the Rule due to uses of this macro.
> >       - Tagged as `deliberate` for ECLAIR.
> > -
> > +
> > +   * - R21.1
> > +     - Rule 21.1 reports identifiers reserved for the C and POSIX standard
> > +       libraries. Xen does not use such libraries and all translation units
> > +       are compiled with option '-nostdinc', therefore there is no reason to
> > +       avoid to use `#define` or `#undef` on such identifiers except for those
> > +       beginning with `__builtin_` for which compilers may perform (wrong)
> > +       optimizations.
> > +     - Tagged as `safe` for ECLAIR.
> 
> ... I'd like to ask that it be explicitly clarified here that it's solely
> the library (and not e.g. the compiler itself) that are of concern here.

The language can be clarified:

- Rule 21.1 reports identifiers reserved for the C and POSIX standard
  libraries. Xen does not use such libraries and all translation units
  are compiled with option '-nostdinc', therefore there is no reason to
  avoid to use `#define` or `#undef` on C and POSIX standard libraries
  identifiers except for those beginning with `__builtin_` for which
  compilers may perform (wrong) optimizations.



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Date: Thu, 24 Apr 2025 22:19:06 +0000
To: Alejandro Vallejo 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?utf-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Bertrand Marquis 
Subject: Re: [PATCH v5 00/12] Hyperlaunch device tree for dom0
Message-ID: 
In-Reply-To: <20250424161027.92942-1-agarciav@amd.com>
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On Thu, Apr 24, 2025 at 05:10:10PM +0100, Alejandro Vallejo wrote:
> Hi,
>=20
> v4: https://lore.kernel.org/xen-devel/20250417124844.11143-1-agarciav@amd=
.com/
> v3: https://lore.kernel.org/xen-devel/20250408160802.49870-1-agarciav@amd=
.com/
> v2: https://lore.kernel.org/xen-devel/20241226165740.29812-1-dpsmith@aper=
tussolutions.com/
> v1: https://lore.kernel.org/xen-devel/20241123182044.30687-1-dpsmith@aper=
tussolutions.com/
>=20
> =3D=3D=3D=3D=3D=3D=3D=3D=3D Original cover letter:
>=20
> The Hyperlaunch device tree for dom0 series is the second split out for t=
he
> introduction of the Hyperlaunch domain builder logic. These changes focus=
 on
> introducing the ability to express a domain configuration that is then us=
ed to
> populate the struct boot_domain structure for dom0. This ability to expre=
ss a
> domain configuration provides the next step towards a general domain buil=
der.
>=20
> The splitting of Hyperlaunch into a set of series are twofold, to reduce =
the
> effort in reviewing a much larger series, and to reduce the effort in han=
dling
> the knock-on effects to the construction logic from requested review chan=
ges.
>=20
>=20
>=20
> Alejandro Vallejo (1):
>   x86/hyperlaunch: Add helpers to locate multiboot modules
>=20
> Daniel P. Smith (11):
>   kconfig: introduce domain builder config options
>   common/hyperlaunch: introduce the domain builder
>   x86/hyperlaunch: initial support for hyperlaunch device tree
>   x86/hyperlaunch: locate dom0 kernel with hyperlaunch
>   x86/hyperlaunch: obtain cmdline from device tree
>   x86/hyperlaunch: locate dom0 initrd with hyperlaunch
>   x86/hyperlaunch: add domain id parsing to domain config
>   x86/hyperlaunch: specify dom0 mode with device tree
>   x86/hyperlaunch: add memory parsing to domain config
>   x86/hyperlaunch: add max vcpu parsing of hyperlaunch device tree
>   x86/hyperlaunch: add capabilities to boot domain

One general comment w.r.t. naming notation in:

    xen/common/domain-builder/fdt.c
    xen/common/domain-builder/fdt.h

Sorry, overlooked that earlier.

What do you think about using fdt_ notation for all functions in
fdt.{c,h}?

For example:

    s/detect_fdt_kind/fdt_detect_hyperlauch_node/

    s/find_hyperlaunch_node/fdt_find_hyperlauch_node/

    s/walk_hyperlaunch_fdt/fdt_walk_hyperlauch_node/

    s/process_domain_node/fdt_process_hyperlauch_node/

Other than that:

Reviewed-by: Denis Mukhin 

for the series.

>=20
>  xen/arch/x86/dom0_build.c              |  11 +
>  xen/arch/x86/include/asm/boot-domain.h |  14 +
>  xen/arch/x86/include/asm/bootinfo.h    |  10 +-
>  xen/arch/x86/setup.c                   |  64 +++-
>  xen/common/Kconfig                     |   2 +
>  xen/common/Makefile                    |   1 +
>  xen/common/domain-builder/Kconfig      |  15 +
>  xen/common/domain-builder/Makefile     |   2 +
>  xen/common/domain-builder/core.c       |  86 +++++
>  xen/common/domain-builder/fdt.c        | 512 +++++++++++++++++++++++++
>  xen/common/domain-builder/fdt.h        |  40 ++
>  xen/include/xen/domain-builder.h       |  37 ++
>  xen/include/xen/libfdt/libfdt-xen.h    |  23 ++
>  13 files changed, 800 insertions(+), 17 deletions(-)
>  create mode 100644 xen/common/domain-builder/Kconfig
>  create mode 100644 xen/common/domain-builder/Makefile
>  create mode 100644 xen/common/domain-builder/core.c
>  create mode 100644 xen/common/domain-builder/fdt.c
>  create mode 100644 xen/common/domain-builder/fdt.h
>  create mode 100644 xen/include/xen/domain-builder.h
>=20
> --
> 2.43.0
>=20
>=20



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> By the way, this patch should have "xen" in its subject tag.
> 

Right, I should add it.


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Subject: Re: [XEN PATCH] misra: update list of GCC extensions used by Xen
To: Nicola Vetrini 
Cc: Stefano Stabellini ,
 xen-devel@lists.xenproject.org, michal.orzel@amd.com,
 xenia.ragiadakou@amd.com, ayan.kumar.halder@amd.com, consulting@bugseng.com,
 Doug Goldstein ,
 Anthony PERARD , Jan Beulich ,
 Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 
References: 
 
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In-Reply-To: <1d362e4df1e0b483c31fdab4384f57f0@bugseng.com>
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

On 24/04/2025 8:27 am, Nicola Vetrini wrote:
> On 2025-04-24 00:46, Andrew Cooper wrote:
>> On 23/04/2025 9:55 pm, Stefano Stabellini wrote:
>>> On Wed, 23 Apr 2025, Nicola Vetrini wrote:
>>>> __inline was not mentioned in C-language-toolchain.rst, while
>>>> __inline__ is not used in code under xen/. __inline is kept because it
>>>> may be used in Xen. The ECLAIR configuration is now consistent with
>>>> the
>>>> documented extensions in the rst file.
>>>>
>>>> No functional change.
>>>>
>>>> Signed-off-by: Nicola Vetrini 
>>> Reviewed-by: Stefano Stabellini 
>>
>> Hmm.  f96e2f64576cd
>>
>> I take it that patch shouldn't have gone in then?
>>
>> Regardless, now that we're putting it back in, we should put in both
>> __inline and __inline__, so as not to need to come back and repeat this
>> patch again.
>>
>> ~Andrew
>
> Did I miss the addition of __inline__ here?
> https://lore.kernel.org/xen-devel/20250422113957.1289290-1-andrew.cooper3@citrix.com/
>
>
> No issue with adjusting it as you wrote, but my understanding was that
> only __inline will reenter the codebase.
>

Sods law says that if we introduce __inline now, we might have
__inline__ get back in too.

For the other keywords, we cover all spellings, so we ought to be
consistent here too.

~Andrew


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Date: Thu, 24 Apr 2025 18:16:12 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: xen-devel@lists.xenproject.org
cc: sstabellini@kernel.org, andrei.cherechesu@oss.nxp.com, 
    Michal Orzel , jason.andryuk@amd.com
Subject: [PATCH v5] uboot-script-gen: Dynamically compute addr and size when
 loading binaries
Message-ID: 
User-Agent: Alpine 2.22 (DEB 394 2020-01-19)
MIME-Version: 1.0
Content-Type: text/plain; charset=US-ASCII

From: Andrei Cherechesu 

Normally, the Imagebuilder would precompute the sizes of the loaded
binaries and addresses where they are loaded before generating the
script, and the sizes and addresses that needed to be provided to
Xen via /chosen would be hardcoded in the boot script.

Added an option via "-s" parameter to avoid hardcoding any
address in the boot script, and dynamically compute the
loading addresses for binaries. The first loading address is based
on the MEMORY_START parameter and after loading each binary,
the loading address and the size of the binary are stored in
variables with corresponding names. Then, the loading address
for the next binary is computed and aligned to 0x200000.

If the "-s" parameter is not used, the normal flow is executed,
where the loading addresses and sizes for each binaries are
precomputed and hardcoded inside the script, but the loading
addresses and sizes for each binary are now also stored for eventual
later use.

Reserved memory regions are left TBD in the -s case.

Link: https://lists.xenproject.org/archives/html/xen-devel/2022-09/msg01862.html
Signed-off-by: Andrei Cherechesu 
Signed-off-by: Stefano Stabellini 
---
This patch adds quite a bit of complexity which is the reason why I
didn't originally commit it. Now that we are enabling ImageBuilder in
Yocto, it turns out this patch is required because Yocto invokes
ImageBuilder before all the binaries are ready and available.

Andrei, sorry for taking so long to realize why it is essential, but we
are getting there now.

The changes I made to the original patch are purely to make it simpler
to maintain.
---

diff --git a/README.md b/README.md
index f8039ec..28c9e6b 100644
--- a/README.md
+++ b/README.md
@@ -356,6 +356,8 @@ Where:\
    can only be used  in combination with the -k option.  This adds the
    public key into the dtb.  Then one can add this dtb back into the
    u-boot bin or elf.\
+-s addresses and sizes are calculated dynamically from U-Boot, hence
+   binaries don't need to be available at the time of invocation.\
 
 ### Signed FIT images
 
diff --git a/scripts/uboot-script-gen b/scripts/uboot-script-gen
index 638154a..ee4af6c 100755
--- a/scripts/uboot-script-gen
+++ b/scripts/uboot-script-gen
@@ -1,8 +1,11 @@
 #!/bin/bash
 
 offset=$((2*1024*1024))
+PADDING_MASK=`printf "0x%X\n" $(($offset - 1))`
+PADDING_MASK_INV=`printf "0x%X\n" $((~$PADDING_MASK))`
 filesize=0
 prog_req=(mkimage file fdtput mktemp awk od)
+CALC=""
 
 function cleanup_and_return_err()
 {
@@ -100,17 +103,42 @@ function dt_set()
     fi
 }
 
+function dt_set_calc()
+{
+    local path=$1
+    local var=$2
+    local name_var=$3
+ 
+    addr_var="$name_var"_addr
+    size_var="$name_var"_size
+
+    # Split data_addr_var into high/low
+    echo "setexpr addr_hi \${"$addr_var"} / 0x100000000" >> $UBOOT_SOURCE
+    echo "setexpr addr_lo \${"$addr_var"} \& 0xFFFFFFFF" >> $UBOOT_SOURCE
+    
+    # Split data_size_var into high/low
+    echo "setexpr size_hi \${"$size_var"} / 0x100000000" >> $UBOOT_SOURCE
+    echo "setexpr size_lo \${"$size_var"} \& 0xFFFFFFFF" >> $UBOOT_SOURCE
+    
+    echo "fdt set $path $var <0x\${addr_hi} 0x\${addr_lo} 0x\${size_hi} 0x\${size_lo}>" >> $UBOOT_SOURCE
+}
+
 function add_device_tree_kernel()
 {
     local path=$1
-    local addr=$2
-    local size=$3
-    local bootargs=$4
+    local name=$2
+    local addr=$3
+    local size=$4
+    local bootargs=$5
     local node_name="module@${addr#0x}"
 
     dt_mknode "$path" "$node_name"
     dt_set "$path/$node_name" "compatible" "str_a" "multiboot,kernel multiboot,module"
-    dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
+    if test "$CALC"; then
+        dt_set_calc "$path/$node_name" "reg" $name
+    else
+        dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
+    fi
     dt_set "$path/$node_name" "bootargs" "str" "$bootargs"
 }
 
@@ -118,26 +146,36 @@ function add_device_tree_kernel()
 function add_device_tree_ramdisk()
 {
     local path=$1
-    local addr=$2
-    local size=$3
+    local name=$2
+    local addr=$3
+    local size=$4
     local node_name="module@${addr#0x}"
 
     dt_mknode "$path"  "$node_name"
     dt_set "$path/$node_name" "compatible" "str_a" "multiboot,ramdisk multiboot,module"
-    dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
+    if test "$CALC"; then
+        dt_set_calc "$path/$node_name" "reg" $name
+    else
+        dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
+    fi
 }
 
 
 function add_device_tree_passthrough()
 {
     local path=$1
-    local addr=$2
-    local size=$3
+    local name=$2
+    local addr=$3
+    local size=$4
     local node_name="module@${addr#0x}"
 
     dt_mknode "$path"  "$node_name"
     dt_set "$path/$node_name" "compatible" "str_a" "multiboot,device-tree multiboot,module"
-    dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
+    if test "$CALC"; then
+        dt_set_calc "$path/$node_name" "reg" $name
+    else
+        dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
+    fi
 }
 
 function add_device_tree_mem()
@@ -358,7 +396,11 @@ function xen_device_tree_editing()
 
         dt_mknode "/chosen" "$node_name"
         dt_set "/chosen/$node_name" "compatible" "str_a" "xen,xsm-policy xen,multiboot-module multiboot,module"
-        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $xen_policy_addr $xen_policy_size)"
+        if test "$CALC"; then
+            dt_set_calc "/chosen/$node_name" "reg" "xen_policy"
+        else
+            dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $xen_policy_addr $xen_policy_size)"
+        fi
     fi
 
     if test "$DOM0_KERNEL"
@@ -367,7 +409,11 @@ function xen_device_tree_editing()
 
         dt_mknode "/chosen" "$node_name"
         dt_set "/chosen/$node_name" "compatible" "str_a" "xen,linux-zimage xen,multiboot-module multiboot,module"
-        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $dom0_kernel_addr $dom0_kernel_size)"
+        if test "$CALC"; then
+            dt_set_calc "/chosen/$node_name" "reg" "dom0_linux"
+        else
+            dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $dom0_kernel_addr $dom0_kernel_size)"
+        fi
         dt_set "/chosen" "xen,dom0-bootargs" "str" "$DOM0_CMD"
     fi
 
@@ -377,7 +423,11 @@ function xen_device_tree_editing()
 
         dt_mknode "/chosen" "$node_name"
         dt_set "/chosen/$node_name" "compatible" "str_a" "xen,linux-initrd xen,multiboot-module multiboot,module"
-        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $ramdisk_addr $ramdisk_size)"
+        if test "$CALC"; then
+            dt_set_calc "/chosen/$node_name" "reg" "dom0_ramdisk"
+        else
+            dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $ramdisk_addr $ramdisk_size)"
+        fi
     fi
 
     i=0
@@ -464,14 +514,14 @@ function xen_device_tree_editing()
 
         xen_dt_domu_add_vcpu_nodes "/chosen/domU$i" $i ${DOMU_VCPUS[$i]}
 
-        add_device_tree_kernel "/chosen/domU$i" ${domU_kernel_addr[$i]} ${domU_kernel_size[$i]} "${DOMU_CMD[$i]}"
+        add_device_tree_kernel "/chosen/domU$i" "domU${i}_kernel" ${domU_kernel_addr[$i]} ${domU_kernel_size[$i]} "${DOMU_CMD[$i]}"
         if test "${domU_ramdisk_addr[$i]}"
         then
-            add_device_tree_ramdisk "/chosen/domU$i" ${domU_ramdisk_addr[$i]} ${domU_ramdisk_size[$i]}
+            add_device_tree_ramdisk "/chosen/domU$i" "domU${i}_ramdisk" ${domU_ramdisk_addr[$i]} ${domU_ramdisk_size[$i]}
         fi
         if test "${domU_passthrough_dtb_addr[$i]}"
         then
-            add_device_tree_passthrough "/chosen/domU$i" ${domU_passthrough_dtb_addr[$i]} ${domU_passthrough_dtb_size[$i]}
+            add_device_tree_passthrough "/chosen/domU$i" "domU${i}_fdt" ${domU_passthrough_dtb_addr[$i]} ${domU_passthrough_dtb_size[$i]}
         fi
         i=$(( $i + 1 ))
     done
@@ -504,7 +554,11 @@ function device_tree_editing()
 
     if test $UBOOT_SOURCE
     then
-        echo "fdt addr $device_tree_addr" >> $UBOOT_SOURCE
+        if test "$CALC"; then
+            echo "fdt addr \${host_fdt_addr}" >> $UBOOT_SOURCE
+        else
+            echo "fdt addr $device_tree_addr" >> $UBOOT_SOURCE
+        fi
         echo "fdt resize 1024" >> $UBOOT_SOURCE
 
         if test $NUM_DT_OVERLAY && test $NUM_DT_OVERLAY -gt 0
@@ -512,7 +566,11 @@ function device_tree_editing()
             i=0
             while test $i -lt $NUM_DT_OVERLAY
             do
-                echo "fdt apply ${dt_overlay_addr[$i]}" >> $UBOOT_SOURCE
+                if test "$CALC"; then
+                    echo "fdt apply \${host_fdto${i}_addr}" >> $UBOOT_SOURCE
+                else
+                    echo "fdt apply ${dt_overlay_addr[$i]}" >> $UBOOT_SOURCE
+                fi
                 i=$(( $i + 1 ))
             done
         fi
@@ -530,8 +588,12 @@ function fill_reserved_spaces_from_dtb()
 {
     if [ ! -f $DEVICE_TREE ]
     then
-        echo "File $DEVICE_TREE doesn't exist, exiting";
-        cleanup_and_return_err
+        if test "$CALC"; then
+            return
+        else
+            echo "File $DEVICE_TREE doesn't exist, exiting";
+            cleanup_and_return_err
+        fi
     fi
 
     # Check if reserved-memory node exists
@@ -613,7 +675,7 @@ function get_image_size()
     printf "%u" $effective_size
 }
 
-function add_size()
+function add_size_from_file()
 {
     local filename=$1
     local size=`stat -L --printf="%s" $filename`
@@ -645,6 +707,24 @@ function add_size()
     filesize=$size
 }
 
+function add_size_calculate()
+{
+    local fit_scr_name=$1
+
+    echo "setenv "$fit_scr_name"_addr \${memaddr}" >> $UBOOT_SOURCE
+    echo "setenv "$fit_scr_name"_size \${filesize}" >> $UBOOT_SOURCE
+    echo "setexpr memaddr \${memaddr} \+ \${filesize}" >> $UBOOT_SOURCE
+    echo "setexpr memaddr \${memaddr} \+ $PADDING_MASK" >> $UBOOT_SOURCE
+    echo "setexpr memaddr \${memaddr} \& $PADDING_MASK_INV" >> $UBOOT_SOURCE
+
+    # TODO: missing ${RESERVED_MEM_SPACES[@]} check
+
+    # The following are updated to avoid collisions in node names, but
+    # they are not actively used.
+    memaddr=$((memaddr + offset))
+    filesize=$offset
+}
+
 function load_file()
 {
     local filename=$1
@@ -657,10 +737,16 @@ function load_file()
     if test "$FIT"
     then
         echo "imxtract \$fit_addr $fit_scr_name $memaddr" >> $UBOOT_SOURCE
+        add_size_from_file $filename
     else
-        echo "$LOAD_CMD $memaddr ${prepend_path:+$prepend_path/}$relative_path" >> $UBOOT_SOURCE
+        if test "$CALC"; then
+            echo "$LOAD_CMD \${memaddr} ${prepend_path:+$prepend_path/}$relative_path" >> $UBOOT_SOURCE
+            add_size_calculate $fit_scr_name
+        else
+            echo "$LOAD_CMD $memaddr ${prepend_path:+$prepend_path/}$relative_path" >> $UBOOT_SOURCE
+            add_size_from_file $filename
+        fi
     fi
-    add_size $filename
 }
 
 function check_file_type()
@@ -670,8 +756,13 @@ function check_file_type()
 
     if [ ! -f $filename ]
     then
-        echo "File $filename doesn't exist, exiting";
-        cleanup_and_return_err
+        if test "$CALC"
+        then
+            return
+        else
+            echo "File $filename doesn't exist, exiting";
+            cleanup_and_return_err
+        fi
     fi
 
     # if file doesn't know what it is, it outputs data, so include that
@@ -705,8 +796,13 @@ function check_compressed_file_type()
 
     if [ ! -f $filename ]
     then
-        echo "File $filename doesn't exist, exiting";
-        cleanup_and_return_err
+        if test "$CALC"
+        then
+            return
+        else
+            echo "File $filename doesn't exist, exiting";
+            cleanup_and_return_err
+        fi
     fi
 
     file_type=$( file -L $filename )
@@ -872,6 +968,12 @@ function linux_config()
 generate_uboot_images()
 {
     local arch=$(file -L $XEN | grep -E 'ARM64|Aarch64')
+    
+    if test "$CALC"
+    then
+        echo "bootm is not compatible with -s"
+        cleanup_and_return_err
+    fi
 
     if test "$arch"
     then
@@ -997,7 +1099,11 @@ bitstream_load_and_config()
         if test "$UBOOT_SOURCE"
         then
             # we assume the FPGA device is 0 here
-            echo "fpga load 0 $bitstream_addr $bitstream_size" >> "$UBOOT_SOURCE"
+            if test "$CALC"; then
+                echo "fpga load 0 \${fpga_bitstream_addr} \${fpga_bitstream_size}" >> "$UBOOT_SOURCE"
+            else
+                echo "fpga load 0 $bitstream_addr $bitstream_size" >> "$UBOOT_SOURCE"
+            fi
         fi
     fi
 }
@@ -1271,7 +1377,7 @@ function print_help
 {
     script=`basename "$0"`
     echo "usage:"
-    echo "	$script -c CONFIG_FILE -d DIRECTORY [-t LOAD_CMD] [-o FILE] [-k KEY_DIR/HINT [-u U-BOOT_DTB]] [-e] [-f] [-p PREPEND_PATH]"
+    echo "	$script -c CONFIG_FILE -d DIRECTORY [-t LOAD_CMD] [-o FILE] [-k KEY_DIR/HINT [-u U-BOOT_DTB]] [-e] [-f] [-p PREPEND_PATH] [-s]"
     echo "	$script -h"
     echo "where:"
     echo "	CONFIG_FILE - configuration file"
@@ -1288,6 +1394,7 @@ function print_help
     echo "	U-BOOT_DTB - u-boot control dtb so that the public key gets added to it"
     echo "	-f - enable generating a FIT image"
     echo "	PREPEND_PATH - path to be appended before file names to match deploy location within rootfs"
+    echo "	-s - enable dynamic loading of binaries by storing their addresses and sizes u-boot env variables"
     echo "	-h - prints out the help message and exits "
     echo "Defaults:"
     echo "	CONFIG_FILE=$cfg_file, UBOOT_TYPE=\"LOAD_CMD\" env var, DIRECTORY=$uboot_dir"
@@ -1295,7 +1402,7 @@ function print_help
     echo "	$script -c ../config -d ./build42 -t \"scsi load 1:1\""
 }
 
-while getopts ":c:t:d:ho:k:u:fp:" opt; do
+while getopts ":c:t:d:ho:k:u:fp:s" opt; do
     case ${opt} in
     t )
         case $OPTARG in
@@ -1340,6 +1447,9 @@ while getopts ":c:t:d:ho:k:u:fp:" opt; do
     p )
         prepend_path="$OPTARG"
         ;;
+    s )
+        CALC=y
+        ;;
     h )
         print_help
         exit 0
@@ -1533,6 +1643,7 @@ uboot_addr=$memaddr
 # 2MB are enough for a uboot script
 memaddr=$(( $memaddr + $offset ))
 memaddr=`printf "0x%X\n" $memaddr`
+echo "setenv memaddr $memaddr" >> $UBOOT_SOURCE
 
 fill_reserved_spaces_from_dtb
 
@@ -1583,7 +1694,11 @@ fi
 
 if [ "$BOOT_CMD" != "none" ]
 then
-    echo "$BOOT_CMD $kernel_addr $([ "$BOOT_CMD" = "bootefi" ] || echo '-') $device_tree_addr" >> $UBOOT_SOURCE
+    if test "$CALC"; then
+        echo "$BOOT_CMD \${host_kernel_addr} $([ "$BOOT_CMD" = "bootefi" ] || echo '-') \${host_fdt_addr}" >> $UBOOT_SOURCE
+    else
+        echo "$BOOT_CMD $kernel_addr $([ "$BOOT_CMD" = "bootefi" ] || echo '-') $device_tree_addr" >> $UBOOT_SOURCE
+    fi
 else
     # skip boot command but store load addresses to be used later
     echo "setenv host_kernel_addr $kernel_addr" >> $UBOOT_SOURCE


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Subject: Re: [RFC PATCH v2 21/34] x86/msr: Utilize the alternatives mechanism
 to write MSR
To: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= ,
        Xin Li
 , linux-kernel@vger.kernel.org,
        kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
        linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
        linux-pm@vger.kernel.org, linux-edac@vger.kernel.org,
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        linux-hwmon@vger.kernel.org, netdev@vger.kernel.org,
        platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, acme@kernel.org,
        andrew.cooper3@citrix.com, peterz@infradead.org, namhyung@kernel.org,
        mark.rutland@arm.com, alexander.shishkin@linux.intel.com,
        jolsa@kernel.org, irogers@google.com, adrian.hunter@intel.com,
        kan.liang@linux.intel.com, wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
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        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-22-xin@zytor.com>
 
 
 <37c88ea3-dd24-4607-9ee1-0f19025aaef3@suse.com>
 
 <0cdc6e9d-88eb-4ead-8d55-985474257d53@suse.com>
Content-Language: en-US
From: "H. Peter Anvin" 
In-Reply-To: <0cdc6e9d-88eb-4ead-8d55-985474257d53@suse.com>
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On 4/24/25 01:14, Jürgen Groß wrote:
>>
>> Actually, that is how we get this patch with the existing alternatives
>> infrastructure.  And we took a step further to also remove the pv_ops
>> MSR APIs...
> 
> And this is what I'm questioning. IMHO this approach is adding more
> code by removing the pv_ops MSR_APIs just because "pv_ops is bad". And
> I believe most refusal of pv_ops is based on no longer valid reasoning.
> 

pvops are a headache because it is effectively a secondary alternatives 
infrastructure that is incompatible with the alternatives one...

>> It looks to me that you want to add a new facility to the alternatives
>> infrastructure first?
> 
> Why would we need a new facility in the alternatives infrastructure?

I'm not sure what Xin means with "facility", but a key motivation for 
this is to:

a. Avoid using the pvops for MSRs when on the only remaining user 
thereof (Xen) is only using it for a very small subset of MSRs and for 
the rest it is just overhead, even for Xen;

b. Being able to do wrmsrns immediate/wrmsrns/wrmsr and rdmsr 
immediate/rdmsr alternatives.

Of these, (b) is by far the biggest motivation. The architectural 
direction for supervisor states is to avoid ad hoc and XSAVES ISA and 
instead use MSRs. The immediate forms are expected to be significantly 
faster, because they make the MSR index available at the very beginning 
of the pipeline instead of at a relatively late stage.

	-hpa



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Subject: Re: [RFC PATCH v2 21/34] x86/msr: Utilize the alternatives mechanism
 to write MSR
From: "H. Peter Anvin" 
To: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= ,
        Xin Li
 , linux-kernel@vger.kernel.org,
        kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
        linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
        linux-pm@vger.kernel.org, linux-edac@vger.kernel.org,
        xen-devel@lists.xenproject.org, linux-acpi@vger.kernel.org,
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Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, acme@kernel.org,
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        haiyangz@microsoft.com, decui@microsoft.com
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-22-xin@zytor.com>
 
 
 <37c88ea3-dd24-4607-9ee1-0f19025aaef3@suse.com>
 
 <0cdc6e9d-88eb-4ead-8d55-985474257d53@suse.com>
 <483eb20c-7302-4733-a15f-21d140396919@zytor.com>
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On 4/24/25 18:15, H. Peter Anvin wrote:
> On 4/24/25 01:14, Jürgen Groß wrote:
>>>
>>> Actually, that is how we get this patch with the existing alternatives
>>> infrastructure.  And we took a step further to also remove the pv_ops
>>> MSR APIs...
>>
>> And this is what I'm questioning. IMHO this approach is adding more
>> code by removing the pv_ops MSR_APIs just because "pv_ops is bad". And
>> I believe most refusal of pv_ops is based on no longer valid reasoning.
>>
> 
> pvops are a headache because it is effectively a secondary alternatives 
> infrastructure that is incompatible with the alternatives one...
> 
>>> It looks to me that you want to add a new facility to the alternatives
>>> infrastructure first?
>>
>> Why would we need a new facility in the alternatives infrastructure?
> 
> I'm not sure what Xin means with "facility", but a key motivation for 
> this is to:
> 
> a. Avoid using the pvops for MSRs when on the only remaining user 
> thereof (Xen) is only using it for a very small subset of MSRs and for 
> the rest it is just overhead, even for Xen;
> 
> b. Being able to do wrmsrns immediate/wrmsrns/wrmsr and rdmsr immediate/ 
> rdmsr alternatives.
> 
> Of these, (b) is by far the biggest motivation. The architectural 
> direction for supervisor states is to avoid ad hoc and XSAVES ISA and 
> instead use MSRs. The immediate forms are expected to be significantly 
> faster, because they make the MSR index available at the very beginning 
> of the pipeline instead of at a relatively late stage.
> 

Note that to support the immediate forms, we *must* do these inline, or 
the const-ness of the MSR index -- which applies to by far the vast 
majority of MSR references -- gets lost. pvops does exactly that.

Furthermore, the MSR immediate instructions take a 64-bit number in a 
single register; as these instructions are by necessity relatively long, 
it makes sense for the alternative sequence to accept a 64-bit input 
register and do the %eax/%edx shuffle in the legacy fallback code... we 
did a bunch of experiments to see what made most sense.

	-hpa



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On 25/04/2025 03:16, Stefano Stabellini wrote:
> From: Andrei Cherechesu 
> 
> Normally, the Imagebuilder would precompute the sizes of the loaded
> binaries and addresses where they are loaded before generating the
> script, and the sizes and addresses that needed to be provided to
> Xen via /chosen would be hardcoded in the boot script.
> 
> Added an option via "-s" parameter to avoid hardcoding any
> address in the boot script, and dynamically compute the
> loading addresses for binaries. The first loading address is based
> on the MEMORY_START parameter and after loading each binary,
> the loading address and the size of the binary are stored in
> variables with corresponding names. Then, the loading address
> for the next binary is computed and aligned to 0x200000.
> 
> If the "-s" parameter is not used, the normal flow is executed,
> where the loading addresses and sizes for each binaries are
> precomputed and hardcoded inside the script, but the loading
> addresses and sizes for each binary are now also stored for eventual
> later use.
> 
> Reserved memory regions are left TBD in the -s case.
> 
> Link: https://lists.xenproject.org/archives/html/xen-devel/2022-09/msg01862.html
> Signed-off-by: Andrei Cherechesu 
> Signed-off-by: Stefano Stabellini 
> ---
> This patch adds quite a bit of complexity which is the reason why I
> didn't originally commit it. Now that we are enabling ImageBuilder in
> Yocto, it turns out this patch is required because Yocto invokes
> ImageBuilder before all the binaries are ready and available.
> 
> Andrei, sorry for taking so long to realize why it is essential, but we
> are getting there now.
> 
> The changes I made to the original patch are purely to make it simpler
> to maintain.
> ---
> 
> diff --git a/README.md b/README.md
> index f8039ec..28c9e6b 100644
> --- a/README.md
> +++ b/README.md
> @@ -356,6 +356,8 @@ Where:\
>     can only be used  in combination with the -k option.  This adds the
>     public key into the dtb.  Then one can add this dtb back into the
>     u-boot bin or elf.\
> +-s addresses and sizes are calculated dynamically from U-Boot, hence
> +   binaries don't need to be available at the time of invocation.\
>  
>  ### Signed FIT images
>  
> diff --git a/scripts/uboot-script-gen b/scripts/uboot-script-gen
> index 638154a..ee4af6c 100755
> --- a/scripts/uboot-script-gen
> +++ b/scripts/uboot-script-gen
> @@ -1,8 +1,11 @@
>  #!/bin/bash
>  
>  offset=$((2*1024*1024))
> +PADDING_MASK=`printf "0x%X\n" $(($offset - 1))`
> +PADDING_MASK_INV=`printf "0x%X\n" $((~$PADDING_MASK))`
>  filesize=0
>  prog_req=(mkimage file fdtput mktemp awk od)
> +CALC=""
>  
>  function cleanup_and_return_err()
>  {
> @@ -100,17 +103,42 @@ function dt_set()
>      fi
>  }
>  
> +function dt_set_calc()
> +{
> +    local path=$1
> +    local var=$2
> +    local name_var=$3
> + 
> +    addr_var="$name_var"_addr
> +    size_var="$name_var"_size
> +
> +    # Split data_addr_var into high/low
> +    echo "setexpr addr_hi \${"$addr_var"} / 0x100000000" >> $UBOOT_SOURCE
> +    echo "setexpr addr_lo \${"$addr_var"} \& 0xFFFFFFFF" >> $UBOOT_SOURCE
> +    
> +    # Split data_size_var into high/low
> +    echo "setexpr size_hi \${"$size_var"} / 0x100000000" >> $UBOOT_SOURCE
> +    echo "setexpr size_lo \${"$size_var"} \& 0xFFFFFFFF" >> $UBOOT_SOURCE
> +    
> +    echo "fdt set $path $var <0x\${addr_hi} 0x\${addr_lo} 0x\${size_hi} 0x\${size_lo}>" >> $UBOOT_SOURCE
> +}
> +
>  function add_device_tree_kernel()
>  {
>      local path=$1
> -    local addr=$2
> -    local size=$3
> -    local bootargs=$4
> +    local name=$2
> +    local addr=$3
> +    local size=$4
> +    local bootargs=$5
>      local node_name="module@${addr#0x}"
>  
>      dt_mknode "$path" "$node_name"
>      dt_set "$path/$node_name" "compatible" "str_a" "multiboot,kernel multiboot,module"
> -    dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
> +    if test "$CALC"; then
> +        dt_set_calc "$path/$node_name" "reg" $name
> +    else
> +        dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
> +    fi
>      dt_set "$path/$node_name" "bootargs" "str" "$bootargs"
>  }
>  
> @@ -118,26 +146,36 @@ function add_device_tree_kernel()
>  function add_device_tree_ramdisk()
>  {
>      local path=$1
> -    local addr=$2
> -    local size=$3
> +    local name=$2
> +    local addr=$3
> +    local size=$4
>      local node_name="module@${addr#0x}"
>  
>      dt_mknode "$path"  "$node_name"
>      dt_set "$path/$node_name" "compatible" "str_a" "multiboot,ramdisk multiboot,module"
> -    dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
> +    if test "$CALC"; then
> +        dt_set_calc "$path/$node_name" "reg" $name
> +    else
> +        dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
> +    fi
>  }
>  
>  
>  function add_device_tree_passthrough()
>  {
>      local path=$1
> -    local addr=$2
> -    local size=$3
> +    local name=$2
> +    local addr=$3
> +    local size=$4
>      local node_name="module@${addr#0x}"
>  
>      dt_mknode "$path"  "$node_name"
>      dt_set "$path/$node_name" "compatible" "str_a" "multiboot,device-tree multiboot,module"
> -    dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
> +    if test "$CALC"; then
> +        dt_set_calc "$path/$node_name" "reg" $name
> +    else
> +        dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
> +    fi
>  }
>  
>  function add_device_tree_mem()
> @@ -358,7 +396,11 @@ function xen_device_tree_editing()
>  
>          dt_mknode "/chosen" "$node_name"
>          dt_set "/chosen/$node_name" "compatible" "str_a" "xen,xsm-policy xen,multiboot-module multiboot,module"
> -        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $xen_policy_addr $xen_policy_size)"
> +        if test "$CALC"; then
> +            dt_set_calc "/chosen/$node_name" "reg" "xen_policy"
> +        else
> +            dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $xen_policy_addr $xen_policy_size)"
> +        fi
>      fi
>  
>      if test "$DOM0_KERNEL"
> @@ -367,7 +409,11 @@ function xen_device_tree_editing()
>  
>          dt_mknode "/chosen" "$node_name"
>          dt_set "/chosen/$node_name" "compatible" "str_a" "xen,linux-zimage xen,multiboot-module multiboot,module"
> -        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $dom0_kernel_addr $dom0_kernel_size)"
> +        if test "$CALC"; then
> +            dt_set_calc "/chosen/$node_name" "reg" "dom0_linux"
> +        else
> +            dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $dom0_kernel_addr $dom0_kernel_size)"
> +        fi
>          dt_set "/chosen" "xen,dom0-bootargs" "str" "$DOM0_CMD"
>      fi
>  
> @@ -377,7 +423,11 @@ function xen_device_tree_editing()
>  
>          dt_mknode "/chosen" "$node_name"
>          dt_set "/chosen/$node_name" "compatible" "str_a" "xen,linux-initrd xen,multiboot-module multiboot,module"
> -        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $ramdisk_addr $ramdisk_size)"
> +        if test "$CALC"; then
> +            dt_set_calc "/chosen/$node_name" "reg" "dom0_ramdisk"
> +        else
> +            dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $ramdisk_addr $ramdisk_size)"
> +        fi
>      fi
>  
>      i=0
> @@ -464,14 +514,14 @@ function xen_device_tree_editing()
>  
>          xen_dt_domu_add_vcpu_nodes "/chosen/domU$i" $i ${DOMU_VCPUS[$i]}
>  
> -        add_device_tree_kernel "/chosen/domU$i" ${domU_kernel_addr[$i]} ${domU_kernel_size[$i]} "${DOMU_CMD[$i]}"
> +        add_device_tree_kernel "/chosen/domU$i" "domU${i}_kernel" ${domU_kernel_addr[$i]} ${domU_kernel_size[$i]} "${DOMU_CMD[$i]}"
>          if test "${domU_ramdisk_addr[$i]}"
>          then
> -            add_device_tree_ramdisk "/chosen/domU$i" ${domU_ramdisk_addr[$i]} ${domU_ramdisk_size[$i]}
> +            add_device_tree_ramdisk "/chosen/domU$i" "domU${i}_ramdisk" ${domU_ramdisk_addr[$i]} ${domU_ramdisk_size[$i]}
>          fi
>          if test "${domU_passthrough_dtb_addr[$i]}"
>          then
> -            add_device_tree_passthrough "/chosen/domU$i" ${domU_passthrough_dtb_addr[$i]} ${domU_passthrough_dtb_size[$i]}
> +            add_device_tree_passthrough "/chosen/domU$i" "domU${i}_fdt" ${domU_passthrough_dtb_addr[$i]} ${domU_passthrough_dtb_size[$i]}
>          fi
>          i=$(( $i + 1 ))
>      done
> @@ -504,7 +554,11 @@ function device_tree_editing()
>  
>      if test $UBOOT_SOURCE
>      then
> -        echo "fdt addr $device_tree_addr" >> $UBOOT_SOURCE
> +        if test "$CALC"; then
> +            echo "fdt addr \${host_fdt_addr}" >> $UBOOT_SOURCE
> +        else
> +            echo "fdt addr $device_tree_addr" >> $UBOOT_SOURCE
> +        fi
>          echo "fdt resize 1024" >> $UBOOT_SOURCE
>  
>          if test $NUM_DT_OVERLAY && test $NUM_DT_OVERLAY -gt 0
> @@ -512,7 +566,11 @@ function device_tree_editing()
>              i=0
>              while test $i -lt $NUM_DT_OVERLAY
>              do
> -                echo "fdt apply ${dt_overlay_addr[$i]}" >> $UBOOT_SOURCE
> +                if test "$CALC"; then
> +                    echo "fdt apply \${host_fdto${i}_addr}" >> $UBOOT_SOURCE
> +                else
> +                    echo "fdt apply ${dt_overlay_addr[$i]}" >> $UBOOT_SOURCE
> +                fi
>                  i=$(( $i + 1 ))
>              done
>          fi
> @@ -530,8 +588,12 @@ function fill_reserved_spaces_from_dtb()
>  {
>      if [ ! -f $DEVICE_TREE ]
>      then
> -        echo "File $DEVICE_TREE doesn't exist, exiting";
> -        cleanup_and_return_err
> +        if test "$CALC"; then
> +            return
> +        else
> +            echo "File $DEVICE_TREE doesn't exist, exiting";
> +            cleanup_and_return_err
> +        fi
>      fi
>  
>      # Check if reserved-memory node exists
> @@ -613,7 +675,7 @@ function get_image_size()
>      printf "%u" $effective_size
>  }
>  
> -function add_size()
> +function add_size_from_file()
>  {
>      local filename=$1
>      local size=`stat -L --printf="%s" $filename`
> @@ -645,6 +707,24 @@ function add_size()
>      filesize=$size
>  }
>  
> +function add_size_calculate()
> +{
> +    local fit_scr_name=$1
> +
> +    echo "setenv "$fit_scr_name"_addr \${memaddr}" >> $UBOOT_SOURCE
> +    echo "setenv "$fit_scr_name"_size \${filesize}" >> $UBOOT_SOURCE
> +    echo "setexpr memaddr \${memaddr} \+ \${filesize}" >> $UBOOT_SOURCE
> +    echo "setexpr memaddr \${memaddr} \+ $PADDING_MASK" >> $UBOOT_SOURCE
To save some lines, can the two additions be done in one line, i.e.:
echo "setexpr memaddr \${memaddr} \+ \${filesize} \+ $PADDING_MASK" >> $UBOOT_SOURCE

> +    echo "setexpr memaddr \${memaddr} \& $PADDING_MASK_INV" >> $UBOOT_SOURCE
> +
> +    # TODO: missing ${RESERVED_MEM_SPACES[@]} check
> +
> +    # The following are updated to avoid collisions in node names, but
> +    # they are not actively used.
> +    memaddr=$((memaddr + offset))
> +    filesize=$offset
> +}
> +
>  function load_file()
>  {
>      local filename=$1
> @@ -657,10 +737,16 @@ function load_file()
>      if test "$FIT"
>      then
>          echo "imxtract \$fit_addr $fit_scr_name $memaddr" >> $UBOOT_SOURCE
> +        add_size_from_file $filename
>      else
> -        echo "$LOAD_CMD $memaddr ${prepend_path:+$prepend_path/}$relative_path" >> $UBOOT_SOURCE
> +        if test "$CALC"; then
> +            echo "$LOAD_CMD \${memaddr} ${prepend_path:+$prepend_path/}$relative_path" >> $UBOOT_SOURCE
> +            add_size_calculate $fit_scr_name
> +        else
> +            echo "$LOAD_CMD $memaddr ${prepend_path:+$prepend_path/}$relative_path" >> $UBOOT_SOURCE
> +            add_size_from_file $filename
> +        fi
>      fi
> -    add_size $filename
>  }
>  
>  function check_file_type()
> @@ -670,8 +756,13 @@ function check_file_type()
>  
>      if [ ! -f $filename ]
>      then
> -        echo "File $filename doesn't exist, exiting";
> -        cleanup_and_return_err
> +        if test "$CALC"
> +        then
> +            return
> +        else
> +            echo "File $filename doesn't exist, exiting";
> +            cleanup_and_return_err
> +        fi
>      fi
>  
>      # if file doesn't know what it is, it outputs data, so include that
> @@ -705,8 +796,13 @@ function check_compressed_file_type()
>  
>      if [ ! -f $filename ]
>      then
> -        echo "File $filename doesn't exist, exiting";
> -        cleanup_and_return_err
> +        if test "$CALC"
> +        then
> +            return
> +        else
> +            echo "File $filename doesn't exist, exiting";
> +            cleanup_and_return_err
> +        fi
>      fi
>  
>      file_type=$( file -L $filename )
> @@ -872,6 +968,12 @@ function linux_config()
>  generate_uboot_images()
>  {
>      local arch=$(file -L $XEN | grep -E 'ARM64|Aarch64')
> +    
> +    if test "$CALC"
> +    then
> +        echo "bootm is not compatible with -s"
> +        cleanup_and_return_err
> +    fi
>  
>      if test "$arch"
>      then
> @@ -997,7 +1099,11 @@ bitstream_load_and_config()
>          if test "$UBOOT_SOURCE"
>          then
>              # we assume the FPGA device is 0 here
> -            echo "fpga load 0 $bitstream_addr $bitstream_size" >> "$UBOOT_SOURCE"
> +            if test "$CALC"; then
> +                echo "fpga load 0 \${fpga_bitstream_addr} \${fpga_bitstream_size}" >> "$UBOOT_SOURCE"
> +            else
> +                echo "fpga load 0 $bitstream_addr $bitstream_size" >> "$UBOOT_SOURCE"
> +            fi
>          fi
>      fi
>  }
> @@ -1271,7 +1377,7 @@ function print_help
>  {
>      script=`basename "$0"`
>      echo "usage:"
> -    echo "	$script -c CONFIG_FILE -d DIRECTORY [-t LOAD_CMD] [-o FILE] [-k KEY_DIR/HINT [-u U-BOOT_DTB]] [-e] [-f] [-p PREPEND_PATH]"
> +    echo "	$script -c CONFIG_FILE -d DIRECTORY [-t LOAD_CMD] [-o FILE] [-k KEY_DIR/HINT [-u U-BOOT_DTB]] [-e] [-f] [-p PREPEND_PATH] [-s]"
>      echo "	$script -h"
>      echo "where:"
>      echo "	CONFIG_FILE - configuration file"
> @@ -1288,6 +1394,7 @@ function print_help
>      echo "	U-BOOT_DTB - u-boot control dtb so that the public key gets added to it"
>      echo "	-f - enable generating a FIT image"
>      echo "	PREPEND_PATH - path to be appended before file names to match deploy location within rootfs"
> +    echo "	-s - enable dynamic loading of binaries by storing their addresses and sizes u-boot env variables"
>      echo "	-h - prints out the help message and exits "
>      echo "Defaults:"
>      echo "	CONFIG_FILE=$cfg_file, UBOOT_TYPE=\"LOAD_CMD\" env var, DIRECTORY=$uboot_dir"
> @@ -1295,7 +1402,7 @@ function print_help
>      echo "	$script -c ../config -d ./build42 -t \"scsi load 1:1\""
>  }
>  
> -while getopts ":c:t:d:ho:k:u:fp:" opt; do
> +while getopts ":c:t:d:ho:k:u:fp:s" opt; do
>      case ${opt} in
>      t )
>          case $OPTARG in
> @@ -1340,6 +1447,9 @@ while getopts ":c:t:d:ho:k:u:fp:" opt; do
>      p )
>          prepend_path="$OPTARG"
>          ;;
> +    s )
> +        CALC=y
> +        ;;
>      h )
>          print_help
>          exit 0
> @@ -1533,6 +1643,7 @@ uboot_addr=$memaddr
>  # 2MB are enough for a uboot script
>  memaddr=$(( $memaddr + $offset ))
>  memaddr=`printf "0x%X\n" $memaddr`
> +echo "setenv memaddr $memaddr" >> $UBOOT_SOURCE
Why is it here unconditionally?

>  
>  fill_reserved_spaces_from_dtb
>  
> @@ -1583,7 +1694,11 @@ fi
>  
>  if [ "$BOOT_CMD" != "none" ]
>  then
> -    echo "$BOOT_CMD $kernel_addr $([ "$BOOT_CMD" = "bootefi" ] || echo '-') $device_tree_addr" >> $UBOOT_SOURCE
> +    if test "$CALC"; then
> +        echo "$BOOT_CMD \${host_kernel_addr} $([ "$BOOT_CMD" = "bootefi" ] || echo '-') \${host_fdt_addr}" >> $UBOOT_SOURCE
> +    else
> +        echo "$BOOT_CMD $kernel_addr $([ "$BOOT_CMD" = "bootefi" ] || echo '-') $device_tree_addr" >> $UBOOT_SOURCE
> +    fi
>  else
>      # skip boot command but store load addresses to be used later
>      echo "setenv host_kernel_addr $kernel_addr" >> $UBOOT_SOURCE

~Michal



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Message-ID: <0825ae04-6545-424d-ad01-3a5fda36ad86@suse.com>
Date: Fri, 25 Apr 2025 08:51:58 +0200
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [RFC PATCH v2 21/34] x86/msr: Utilize the alternatives mechanism
 to write MSR
To: "H. Peter Anvin" , Xin Li ,
 linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
 linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
 virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
 linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
 linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
 netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
 dave.hansen@linux.intel.com, x86@kernel.org, acme@kernel.org,
 andrew.cooper3@citrix.com, peterz@infradead.org, namhyung@kernel.org,
 mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org,
 irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
 wei.liu@kernel.org, ajay.kaher@broadcom.com,
 bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
 pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
 luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
 haiyangz@microsoft.com, decui@microsoft.com
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-22-xin@zytor.com>
 
 
 <37c88ea3-dd24-4607-9ee1-0f19025aaef3@suse.com>
 
 <0cdc6e9d-88eb-4ead-8d55-985474257d53@suse.com>
 <483eb20c-7302-4733-a15f-21d140396919@zytor.com>
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From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= 
To: "H. Peter Anvin" , Xin Li ,
 linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
 linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
 virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
 linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
 linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
 netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
 dave.hansen@linux.intel.com, x86@kernel.org, acme@kernel.org,
 andrew.cooper3@citrix.com, peterz@infradead.org, namhyung@kernel.org,
 mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org,
 irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
 wei.liu@kernel.org, ajay.kaher@broadcom.com,
 bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
 pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
 luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
 haiyangz@microsoft.com, decui@microsoft.com
Message-ID: <0825ae04-6545-424d-ad01-3a5fda36ad86@suse.com>
Subject: Re: [RFC PATCH v2 21/34] x86/msr: Utilize the alternatives mechanism
 to write MSR
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-22-xin@zytor.com>
 
 
 <37c88ea3-dd24-4607-9ee1-0f19025aaef3@suse.com>
 
 <0cdc6e9d-88eb-4ead-8d55-985474257d53@suse.com>
 <483eb20c-7302-4733-a15f-21d140396919@zytor.com>
In-Reply-To: <483eb20c-7302-4733-a15f-21d140396919@zytor.com>

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 andrew.cooper3@citrix.com, peterz@infradead.org, namhyung@kernel.org,
 mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org,
 irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
 wei.liu@kernel.org, ajay.kaher@broadcom.com,
 bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
 pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
 luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
 haiyangz@microsoft.com, decui@microsoft.com
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-22-xin@zytor.com>
 
 
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From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= 
To: "H. Peter Anvin" , Xin Li ,
 linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
 linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
 virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
 linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
 linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
 netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
 dave.hansen@linux.intel.com, x86@kernel.org, acme@kernel.org,
 andrew.cooper3@citrix.com, peterz@infradead.org, namhyung@kernel.org,
 mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org,
 irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
 wei.liu@kernel.org, ajay.kaher@broadcom.com,
 bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
 pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
 luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
 haiyangz@microsoft.com, decui@microsoft.com
Message-ID: <6ef898f7-c8a3-4326-96ab-42aa90c48e1c@suse.com>
Subject: Re: [RFC PATCH v2 21/34] x86/msr: Utilize the alternatives mechanism
 to write MSR
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-22-xin@zytor.com>
 
 
 <37c88ea3-dd24-4607-9ee1-0f19025aaef3@suse.com>
 
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 <483eb20c-7302-4733-a15f-21d140396919@zytor.com>
 <72516271-5b28-434a-838b-d8532e1b4fc1@zytor.com>
In-Reply-To: <72516271-5b28-434a-838b-d8532e1b4fc1@zytor.com>

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Date: Fri, 25 Apr 2025 09:11:57 +0200
From: Peter Zijlstra 
To: =?iso-8859-1?Q?J=FCrgen_Gro=DF?= 
Cc: "Xin Li (Intel)" , linux-kernel@vger.kernel.org,
	kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
	linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
	linux-pm@vger.kernel.org, linux-edac@vger.kernel.org,
	xen-devel@lists.xenproject.org, linux-acpi@vger.kernel.org,
	linux-hwmon@vger.kernel.org, netdev@vger.kernel.org,
	platform-driver-x86@vger.kernel.org, tglx@linutronix.de,
	mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com,
	x86@kernel.org, hpa@zytor.com, acme@kernel.org,
	andrew.cooper3@citrix.com, namhyung@kernel.org,
	mark.rutland@arm.com, alexander.shishkin@linux.intel.com,
	jolsa@kernel.org, irogers@google.com, adrian.hunter@intel.com,
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	seanjc@google.com, luto@kernel.org, boris.ostrovsky@oracle.com,
	kys@microsoft.com, haiyangz@microsoft.com, decui@microsoft.com
Subject: Re: [RFC PATCH v2 21/34] x86/msr: Utilize the alternatives mechanism
 to write MSR
Message-ID: <20250425071157.GI18306@noisy.programming.kicks-ass.net>
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-22-xin@zytor.com>
 
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On Tue, Apr 22, 2025 at 11:57:01AM +0200, J=FCrgen Gro=DF wrote:
> On 22.04.25 10:22, Xin Li (Intel) wrote:

> >    This becomes even more silly for trivial instructions like STI/CLI
> >    or in the worst case paravirt_nop().
>=20
> This is nonsense.

What Jurgen says. Someone hasn't done their homework.

static __always_inline void arch_local_irq_disable(void)
{
        PVOP_ALT_VCALLEE0(irq.irq_disable, "cli;", ALT_NOT_XEN);
}

static __always_inline void arch_local_irq_enable(void)
{
        PVOP_ALT_VCALLEE0(irq.irq_enable, "sti;", ALT_NOT_XEN);
}

That very much patches in STI/CLI directly when not Xen.


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Subject: Re: [PATCH v1] misra: add deviation for rules 21.1 and 21.2
To: Stefano Stabellini 
Cc: victorm.lira@amd.com, Nicola Vetrini ,
 Federico Serafini ,
 Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Bertrand Marquis , xen-devel@lists.xenproject.org
References: <9e1210f2a9c794d68dcc6b897239b228b141296a.1745427770.git.victorm.lira@amd.com>
 
 
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On 24.04.2025 23:45, Stefano Stabellini wrote:
> On Thu, 24 Apr 2025, Jan Beulich wrote:
>> On 23.04.2025 19:54, victorm.lira@amd.com wrote:
>>> From: Nicola Vetrini 
>>>
>>> MISRA C Rules 21.1 ("#define and #undef shall not be used on a
>>> reserved identifier or reserved macro name") and R21.2 ("A reserved
>>> identifier or reserved macro name shall not be declared") violations
>>> are not problematic for Xen, as it does not use the C or POSIX
>>> libraries.
>>>
>>> Xen uses -fno-builtin and -nostdinc to ensure this, but there are still
>>> __builtin_* functions from the compiler that are available so
>>> a deviation is formulated for all identifiers not starting with
>>> "__builtin_".
>>>
>>> The missing text of a deviation for Rule 21.2 is added to
>>> docs/misra/deviations.rst.
>>>
>>> To avoid regressions, tag both rules as clean and add them to the
>>> monitored set.
>>>
>>> Signed-off-by: Nicola Vetrini 
>>> Signed-off-by: Federico Serafini 
>>> Signed-off-by: Victor Lira 
>>
>> While the rule is in the library section, ...
>>
>>> --- a/docs/misra/deviations.rst
>>> +++ b/docs/misra/deviations.rst
>>> @@ -587,7 +587,31 @@ Deviations related to MISRA C:2012 Rules:
>>>         construct is deviated only in Translation Units that present a violation
>>>         of the Rule due to uses of this macro.
>>>       - Tagged as `deliberate` for ECLAIR.
>>> -
>>> +
>>> +   * - R21.1
>>> +     - Rule 21.1 reports identifiers reserved for the C and POSIX standard
>>> +       libraries. Xen does not use such libraries and all translation units
>>> +       are compiled with option '-nostdinc', therefore there is no reason to
>>> +       avoid to use `#define` or `#undef` on such identifiers except for those
>>> +       beginning with `__builtin_` for which compilers may perform (wrong)
>>> +       optimizations.
>>> +     - Tagged as `safe` for ECLAIR.
>>
>> ... I'd like to ask that it be explicitly clarified here that it's solely
>> the library (and not e.g. the compiler itself) that are of concern here.
> 
> The language can be clarified:
> 
> - Rule 21.1 reports identifiers reserved for the C and POSIX standard
>   libraries. Xen does not use such libraries and all translation units
>   are compiled with option '-nostdinc', therefore there is no reason to
>   avoid to use `#define` or `#undef` on C and POSIX standard libraries
>   identifiers except for those beginning with `__builtin_` for which
>   compilers may perform (wrong) optimizations.

Which makes it more apparent that there is a gap: What about e.g. __x86_64__?
That falls within what the rules cover, is not a C or POSIX standard library
identifier, yet very clearly must not be fiddled with. Whereas the text
above deviates it.

Jan


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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
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Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
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Subject: [PATCH v3 09/14] x86/xen/msr: Remove calling native_{read,write}_msr{,_safe}() in pmu_msr_{read,write}()
Date: Fri, 25 Apr 2025 01:34:32 -0700
Message-ID: <20250425083442.2390017-10-xin@zytor.com>
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hpa found that pmu_msr_write() is actually a completely pointless
function [1]: all it does is shuffle some arguments, then calls
pmu_msr_chk_emulated() and if it returns true AND the emulated flag
is clear then does *exactly the same thing* that the calling code
would have done if pmu_msr_write() itself had returned true.  And
pmu_msr_read() does the equivalent stupidity.

Remove the calls to native_{read,write}_msr{,_safe}() within
pmu_msr_{read,write}().  Instead reuse the existing calling code
that decides whether to call native_{read,write}_msr{,_safe}() based
on the return value from pmu_msr_{read,write}().  Consequently,
eliminate the need to pass an error pointer to pmu_msr_{read,write}().

While at it, refactor pmu_msr_write() to take the MSR value as a u64
argument, replacing the current dual u32 arguments, because the dual
u32 arguments were only used to call native_write_msr{,_safe}(), which
has now been removed.

[1]: https://lore.kernel.org/lkml/0ec48b84-d158-47c6-b14c-3563fd14bcc4@zytor.com/

Suggested-by: H. Peter Anvin (Intel) 
Sign-off-by: Xin Li (Intel) 
---

Change in v3:
*) Rename pmu_msr_{read,write}() to pmu_msr_{read,write}_emulated()
   (Dapeng Mi).
*) Fix a pmu_msr_read() callsite with wrong arguments (Dapeng Mi).
---
 arch/x86/xen/enlighten_pv.c |  8 ++++++--
 arch/x86/xen/pmu.c          | 27 ++++-----------------------
 arch/x86/xen/xen-ops.h      |  4 ++--
 3 files changed, 12 insertions(+), 27 deletions(-)

diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c
index 846b5737d320..61e51a970f3c 100644
--- a/arch/x86/xen/enlighten_pv.c
+++ b/arch/x86/xen/enlighten_pv.c
@@ -1090,7 +1090,7 @@ static u64 xen_do_read_msr(unsigned int msr, int *err)
 {
 	u64 val = 0;	/* Avoid uninitialized value for safe variant. */
 
-	if (pmu_msr_read(msr, &val, err))
+	if (pmu_msr_read_emulated(msr, &val))
 		return val;
 
 	if (err)
@@ -1132,6 +1132,8 @@ static void set_seg(unsigned int which, unsigned int low, unsigned int high,
 static void xen_do_write_msr(unsigned int msr, unsigned int low,
 			     unsigned int high, int *err)
 {
+	u64 val;
+
 	switch (msr) {
 	case MSR_FS_BASE:
 		set_seg(SEGBASE_FS, low, high, err);
@@ -1158,7 +1160,9 @@ static void xen_do_write_msr(unsigned int msr, unsigned int low,
 		break;
 
 	default:
-		if (!pmu_msr_write(msr, low, high, err)) {
+		val = (u64)high << 32 | low;
+
+		if (!pmu_msr_write_emulated(msr, val)) {
 			if (err)
 				*err = native_write_msr_safe(msr, low, high);
 			else
diff --git a/arch/x86/xen/pmu.c b/arch/x86/xen/pmu.c
index 9c1682af620a..b6557f2d1a2e 100644
--- a/arch/x86/xen/pmu.c
+++ b/arch/x86/xen/pmu.c
@@ -313,37 +313,18 @@ static bool pmu_msr_chk_emulated(unsigned int msr, uint64_t *val, bool is_read,
 	return true;
 }
 
-bool pmu_msr_read(unsigned int msr, uint64_t *val, int *err)
+bool pmu_msr_read_emulated(u32 msr, u64 *val)
 {
 	bool emulated;
 
-	if (!pmu_msr_chk_emulated(msr, val, true, &emulated))
-		return false;
-
-	if (!emulated) {
-		*val = err ? native_read_msr_safe(msr, err)
-			   : native_read_msr(msr);
-	}
-
-	return true;
+	return pmu_msr_chk_emulated(msr, val, true, &emulated) && emulated;
 }
 
-bool pmu_msr_write(unsigned int msr, uint32_t low, uint32_t high, int *err)
+bool pmu_msr_write_emulated(u32 msr, u64 val)
 {
-	uint64_t val = ((uint64_t)high << 32) | low;
 	bool emulated;
 
-	if (!pmu_msr_chk_emulated(msr, &val, false, &emulated))
-		return false;
-
-	if (!emulated) {
-		if (err)
-			*err = native_write_msr_safe(msr, low, high);
-		else
-			native_write_msr(msr, low, high);
-	}
-
-	return true;
+	return pmu_msr_chk_emulated(msr, &val, false, &emulated) && emulated;
 }
 
 static u64 xen_amd_read_pmc(int counter)
diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h
index 735f58780704..163e03e33089 100644
--- a/arch/x86/xen/xen-ops.h
+++ b/arch/x86/xen/xen-ops.h
@@ -274,8 +274,8 @@ void xen_pmu_finish(int cpu);
 static inline void xen_pmu_init(int cpu) {}
 static inline void xen_pmu_finish(int cpu) {}
 #endif
-bool pmu_msr_read(unsigned int msr, uint64_t *val, int *err);
-bool pmu_msr_write(unsigned int msr, uint32_t low, uint32_t high, int *err);
+bool pmu_msr_read_emulated(u32 msr, u64 *val);
+bool pmu_msr_write_emulated(u32 msr, u64 val);
 int pmu_apic_update(uint32_t reg);
 u64 xen_read_pmc(int counter);
 
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
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        haiyangz@microsoft.com, decui@microsoft.com,
        dapeng1.mi@linux.intel.com
Subject: [PATCH v3 01/14] x86/msr: Move rdtsc{,_ordered}() to 
Date: Fri, 25 Apr 2025 01:34:24 -0700
Message-ID: <20250425083442.2390017-2-xin@zytor.com>
X-Mailer: git-send-email 2.49.0
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For some reason, there are some TSC-related functions in the MSR
header even though there is a tsc.h header.

Relocate rdtsc{,_ordered}() from  to , and
subsequently remove the inclusion of  in .
Consequently,  must be included in several source files
that previously did not require it.

Signed-off-by: Xin Li (Intel) 
Acked-by: Dave Hansen 
---

Change in v3:
* Add a problem statement to the changelog (Dave Hansen).
---
 arch/x86/events/msr.c                         |  3 +
 arch/x86/events/perf_event.h                  |  1 +
 arch/x86/events/probe.c                       |  2 +
 arch/x86/hyperv/ivm.c                         |  1 +
 arch/x86/include/asm/fred.h                   |  1 +
 arch/x86/include/asm/microcode.h              |  2 +
 arch/x86/include/asm/mshyperv.h               |  1 +
 arch/x86/include/asm/msr.h                    | 55 +-------------
 arch/x86/include/asm/suspend_32.h             |  1 +
 arch/x86/include/asm/suspend_64.h             |  1 +
 arch/x86/include/asm/switch_to.h              |  2 +
 arch/x86/include/asm/tsc.h                    | 76 ++++++++++++++++++-
 arch/x86/kernel/cpu/resctrl/pseudo_lock.c     |  1 +
 arch/x86/kernel/fpu/xstate.h                  |  1 +
 arch/x86/kernel/hpet.c                        |  1 +
 arch/x86/kernel/process_64.c                  |  1 +
 arch/x86/kernel/trace_clock.c                 |  2 +-
 arch/x86/kernel/tsc_sync.c                    |  1 +
 arch/x86/lib/kaslr.c                          |  2 +-
 arch/x86/mm/mem_encrypt_identity.c            |  1 +
 arch/x86/realmode/init.c                      |  1 +
 drivers/acpi/processor_perflib.c              |  1 +
 drivers/acpi/processor_throttling.c           |  3 +-
 drivers/cpufreq/amd-pstate-ut.c               |  2 +
 drivers/hwmon/hwmon-vid.c                     |  4 +
 drivers/net/vmxnet3/vmxnet3_drv.c             |  4 +
 drivers/platform/x86/intel/pmc/cnp.c          |  1 +
 .../intel/speed_select_if/isst_if_common.c    |  1 +
 drivers/platform/x86/intel/turbo_max_3.c      |  1 +
 29 files changed, 116 insertions(+), 58 deletions(-)

diff --git a/arch/x86/events/msr.c b/arch/x86/events/msr.c
index 8970ecef87c5..c39e49cecace 100644
--- a/arch/x86/events/msr.c
+++ b/arch/x86/events/msr.c
@@ -3,6 +3,9 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+
 #include "probe.h"
 
 enum perf_msr_id {
diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h
index a5166fa9339b..a8d4e82e3589 100644
--- a/arch/x86/events/perf_event.h
+++ b/arch/x86/events/perf_event.h
@@ -17,6 +17,7 @@
 #include 
 #include 
 #include 
+#include 
 
 /* To enable MSR tracing please use the generic trace points. */
 
diff --git a/arch/x86/events/probe.c b/arch/x86/events/probe.c
index fda35cf25528..bb719d0d3f0b 100644
--- a/arch/x86/events/probe.c
+++ b/arch/x86/events/probe.c
@@ -2,6 +2,8 @@
 #include 
 #include 
 #include 
+
+#include 
 #include "probe.h"
 
 static umode_t
diff --git a/arch/x86/hyperv/ivm.c b/arch/x86/hyperv/ivm.c
index 1b8a2415183b..8209de792388 100644
--- a/arch/x86/hyperv/ivm.c
+++ b/arch/x86/hyperv/ivm.c
@@ -22,6 +22,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #ifdef CONFIG_AMD_MEM_ENCRYPT
diff --git a/arch/x86/include/asm/fred.h b/arch/x86/include/asm/fred.h
index 2a29e5216881..12b34d5b2953 100644
--- a/arch/x86/include/asm/fred.h
+++ b/arch/x86/include/asm/fred.h
@@ -9,6 +9,7 @@
 #include 
 
 #include 
+#include 
 #include 
 
 /*
diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h
index 263ea3dd0001..107a1aaa211b 100644
--- a/arch/x86/include/asm/microcode.h
+++ b/arch/x86/include/asm/microcode.h
@@ -2,6 +2,8 @@
 #ifndef _ASM_X86_MICROCODE_H
 #define _ASM_X86_MICROCODE_H
 
+#include 
+
 struct cpu_signature {
 	unsigned int sig;
 	unsigned int pf;
diff --git a/arch/x86/include/asm/mshyperv.h b/arch/x86/include/asm/mshyperv.h
index bab5ccfc60a7..15d00dace70f 100644
--- a/arch/x86/include/asm/mshyperv.h
+++ b/arch/x86/include/asm/mshyperv.h
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 /*
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 2ccc78ebc3d7..2caa13830e11 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -12,6 +12,7 @@
 #include 
 #include 
 
+#include 
 #include 
 
 struct msr_info {
@@ -169,60 +170,6 @@ native_write_msr_safe(u32 msr, u32 low, u32 high)
 extern int rdmsr_safe_regs(u32 regs[8]);
 extern int wrmsr_safe_regs(u32 regs[8]);
 
-/**
- * rdtsc() - returns the current TSC without ordering constraints
- *
- * rdtsc() returns the result of RDTSC as a 64-bit integer.  The
- * only ordering constraint it supplies is the ordering implied by
- * "asm volatile": it will put the RDTSC in the place you expect.  The
- * CPU can and will speculatively execute that RDTSC, though, so the
- * results can be non-monotonic if compared on different CPUs.
- */
-static __always_inline u64 rdtsc(void)
-{
-	DECLARE_ARGS(val, low, high);
-
-	asm volatile("rdtsc" : EAX_EDX_RET(val, low, high));
-
-	return EAX_EDX_VAL(val, low, high);
-}
-
-/**
- * rdtsc_ordered() - read the current TSC in program order
- *
- * rdtsc_ordered() returns the result of RDTSC as a 64-bit integer.
- * It is ordered like a load to a global in-memory counter.  It should
- * be impossible to observe non-monotonic rdtsc_unordered() behavior
- * across multiple CPUs as long as the TSC is synced.
- */
-static __always_inline u64 rdtsc_ordered(void)
-{
-	DECLARE_ARGS(val, low, high);
-
-	/*
-	 * The RDTSC instruction is not ordered relative to memory
-	 * access.  The Intel SDM and the AMD APM are both vague on this
-	 * point, but empirically an RDTSC instruction can be
-	 * speculatively executed before prior loads.  An RDTSC
-	 * immediately after an appropriate barrier appears to be
-	 * ordered as a normal load, that is, it provides the same
-	 * ordering guarantees as reading from a global memory location
-	 * that some other imaginary CPU is updating continuously with a
-	 * time stamp.
-	 *
-	 * Thus, use the preferred barrier on the respective CPU, aiming for
-	 * RDTSCP as the default.
-	 */
-	asm volatile(ALTERNATIVE_2("rdtsc",
-				   "lfence; rdtsc", X86_FEATURE_LFENCE_RDTSC,
-				   "rdtscp", X86_FEATURE_RDTSCP)
-			: EAX_EDX_RET(val, low, high)
-			/* RDTSCP clobbers ECX with MSR_TSC_AUX. */
-			:: "ecx");
-
-	return EAX_EDX_VAL(val, low, high);
-}
-
 static inline u64 native_read_pmc(int counter)
 {
 	DECLARE_ARGS(val, low, high);
diff --git a/arch/x86/include/asm/suspend_32.h b/arch/x86/include/asm/suspend_32.h
index d8416b3bf832..e8e5aab06255 100644
--- a/arch/x86/include/asm/suspend_32.h
+++ b/arch/x86/include/asm/suspend_32.h
@@ -9,6 +9,7 @@
 
 #include 
 #include 
+#include 
 
 /* image of the saved processor state */
 struct saved_context {
diff --git a/arch/x86/include/asm/suspend_64.h b/arch/x86/include/asm/suspend_64.h
index 54df06687d83..b512f9665f78 100644
--- a/arch/x86/include/asm/suspend_64.h
+++ b/arch/x86/include/asm/suspend_64.h
@@ -9,6 +9,7 @@
 
 #include 
 #include 
+#include 
 
 /*
  * Image of the saved processor state, used by the low level ACPI suspend to
diff --git a/arch/x86/include/asm/switch_to.h b/arch/x86/include/asm/switch_to.h
index 75248546403d..4f21df7af715 100644
--- a/arch/x86/include/asm/switch_to.h
+++ b/arch/x86/include/asm/switch_to.h
@@ -52,6 +52,8 @@ do {									\
 } while (0)
 
 #ifdef CONFIG_X86_32
+#include 
+
 static inline void refresh_sysenter_cs(struct thread_struct *thread)
 {
 	/* Only happens when SEP is enabled, no need to test "SEP"arately: */
diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h
index 94408a784c8e..13335a130edf 100644
--- a/arch/x86/include/asm/tsc.h
+++ b/arch/x86/include/asm/tsc.h
@@ -7,7 +7,81 @@
 
 #include 
 #include 
-#include 
+
+/*
+ * both i386 and x86_64 returns 64-bit value in edx:eax, but gcc's "A"
+ * constraint has different meanings. For i386, "A" means exactly
+ * edx:eax, while for x86_64 it doesn't mean rdx:rax or edx:eax. Instead,
+ * it means rax *or* rdx.
+ */
+#ifdef CONFIG_X86_64
+/* Using 64-bit values saves one instruction clearing the high half of low */
+#define DECLARE_ARGS(val, low, high)	unsigned long low, high
+#define EAX_EDX_VAL(val, low, high)	((low) | (high) << 32)
+#define EAX_EDX_RET(val, low, high)	"=a" (low), "=d" (high)
+#else
+#define DECLARE_ARGS(val, low, high)	u64 val
+#define EAX_EDX_VAL(val, low, high)	(val)
+#define EAX_EDX_RET(val, low, high)	"=A" (val)
+#endif
+
+/**
+ * rdtsc() - returns the current TSC without ordering constraints
+ *
+ * rdtsc() returns the result of RDTSC as a 64-bit integer.  The
+ * only ordering constraint it supplies is the ordering implied by
+ * "asm volatile": it will put the RDTSC in the place you expect.  The
+ * CPU can and will speculatively execute that RDTSC, though, so the
+ * results can be non-monotonic if compared on different CPUs.
+ */
+static __always_inline u64 rdtsc(void)
+{
+	DECLARE_ARGS(val, low, high);
+
+	asm volatile("rdtsc" : EAX_EDX_RET(val, low, high));
+
+	return EAX_EDX_VAL(val, low, high);
+}
+
+/**
+ * rdtsc_ordered() - read the current TSC in program order
+ *
+ * rdtsc_ordered() returns the result of RDTSC as a 64-bit integer.
+ * It is ordered like a load to a global in-memory counter.  It should
+ * be impossible to observe non-monotonic rdtsc_unordered() behavior
+ * across multiple CPUs as long as the TSC is synced.
+ */
+static __always_inline u64 rdtsc_ordered(void)
+{
+	DECLARE_ARGS(val, low, high);
+
+	/*
+	 * The RDTSC instruction is not ordered relative to memory
+	 * access.  The Intel SDM and the AMD APM are both vague on this
+	 * point, but empirically an RDTSC instruction can be
+	 * speculatively executed before prior loads.  An RDTSC
+	 * immediately after an appropriate barrier appears to be
+	 * ordered as a normal load, that is, it provides the same
+	 * ordering guarantees as reading from a global memory location
+	 * that some other imaginary CPU is updating continuously with a
+	 * time stamp.
+	 *
+	 * Thus, use the preferred barrier on the respective CPU, aiming for
+	 * RDTSCP as the default.
+	 */
+	asm volatile(ALTERNATIVE_2("rdtsc",
+				   "lfence; rdtsc", X86_FEATURE_LFENCE_RDTSC,
+				   "rdtscp", X86_FEATURE_RDTSCP)
+			: EAX_EDX_RET(val, low, high)
+			/* RDTSCP clobbers ECX with MSR_TSC_AUX. */
+			:: "ecx");
+
+	return EAX_EDX_VAL(val, low, high);
+}
+
+#undef DECLARE_ARGS
+#undef EAX_EDX_VAL
+#undef EAX_EDX_RET
 
 /*
  * Standard way to access the cycle counter.
diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
index 2a82eb6a0376..26c354bdea07 100644
--- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
+++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
@@ -25,6 +25,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "../../events/perf_event.h" /* For X86_CONFIG() */
 #include "internal.h"
diff --git a/arch/x86/kernel/fpu/xstate.h b/arch/x86/kernel/fpu/xstate.h
index 5e5d35027f13..f705bd355ea2 100644
--- a/arch/x86/kernel/fpu/xstate.h
+++ b/arch/x86/kernel/fpu/xstate.h
@@ -5,6 +5,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #ifdef CONFIG_X86_64
 DECLARE_PER_CPU(u64, xfd_state);
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index cc5d12232216..c9982a7c9536 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #undef  pr_fmt
 #define pr_fmt(fmt) "hpet: " fmt
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index 24e1ccf22912..cfa9c031de91 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -57,6 +57,7 @@
 #include 
 #include 
 #include 
+#include 
 #ifdef CONFIG_IA32_EMULATION
 /* Not included via unistd.h */
 #include 
diff --git a/arch/x86/kernel/trace_clock.c b/arch/x86/kernel/trace_clock.c
index b8e7abe00b06..708d61743d15 100644
--- a/arch/x86/kernel/trace_clock.c
+++ b/arch/x86/kernel/trace_clock.c
@@ -4,7 +4,7 @@
  */
 #include 
 #include 
-#include 
+#include 
 
 /*
  * trace_clock_x86_tsc(): A clock that is just the cycle counter.
diff --git a/arch/x86/kernel/tsc_sync.c b/arch/x86/kernel/tsc_sync.c
index f1c7a86dbf49..ec3aa340d351 100644
--- a/arch/x86/kernel/tsc_sync.c
+++ b/arch/x86/kernel/tsc_sync.c
@@ -21,6 +21,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 struct tsc_adjust {
diff --git a/arch/x86/lib/kaslr.c b/arch/x86/lib/kaslr.c
index a58f451a7dd3..b5893928d55c 100644
--- a/arch/x86/lib/kaslr.c
+++ b/arch/x86/lib/kaslr.c
@@ -8,7 +8,7 @@
  */
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
diff --git a/arch/x86/mm/mem_encrypt_identity.c b/arch/x86/mm/mem_encrypt_identity.c
index 5eecdd92da10..afda349db35b 100644
--- a/arch/x86/mm/mem_encrypt_identity.c
+++ b/arch/x86/mm/mem_encrypt_identity.c
@@ -44,6 +44,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "mm_internal.h"
 
diff --git a/arch/x86/realmode/init.c b/arch/x86/realmode/init.c
index 263787b4800c..ed5c63c0b4e5 100644
--- a/arch/x86/realmode/init.c
+++ b/arch/x86/realmode/init.c
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 struct real_mode_header *real_mode_header;
diff --git a/drivers/acpi/processor_perflib.c b/drivers/acpi/processor_perflib.c
index 53996f1a2d80..64b8d1e19594 100644
--- a/drivers/acpi/processor_perflib.c
+++ b/drivers/acpi/processor_perflib.c
@@ -20,6 +20,7 @@
 #include 
 #ifdef CONFIG_X86
 #include 
+#include 
 #endif
 
 #define ACPI_PROCESSOR_FILE_PERFORMANCE	"performance"
diff --git a/drivers/acpi/processor_throttling.c b/drivers/acpi/processor_throttling.c
index 00d045e5f524..8482e9a8a7aa 100644
--- a/drivers/acpi/processor_throttling.c
+++ b/drivers/acpi/processor_throttling.c
@@ -18,9 +18,10 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
-#include 
+#include 
 
 /* ignore_tpc:
  *  0 -> acpi processor driver doesn't ignore _TPC values
diff --git a/drivers/cpufreq/amd-pstate-ut.c b/drivers/cpufreq/amd-pstate-ut.c
index 707fa81c749f..c8d031b297d2 100644
--- a/drivers/cpufreq/amd-pstate-ut.c
+++ b/drivers/cpufreq/amd-pstate-ut.c
@@ -31,6 +31,8 @@
 
 #include 
 
+#include 
+
 #include "amd-pstate.h"
 
 
diff --git a/drivers/hwmon/hwmon-vid.c b/drivers/hwmon/hwmon-vid.c
index 6d1175a51832..2df4956296ed 100644
--- a/drivers/hwmon/hwmon-vid.c
+++ b/drivers/hwmon/hwmon-vid.c
@@ -15,6 +15,10 @@
 #include 
 #include 
 
+#ifdef CONFIG_X86
+#include 
+#endif
+
 /*
  * Common code for decoding VID pins.
  *
diff --git a/drivers/net/vmxnet3/vmxnet3_drv.c b/drivers/net/vmxnet3/vmxnet3_drv.c
index 3df6aabc7e33..7edd0b5e0e77 100644
--- a/drivers/net/vmxnet3/vmxnet3_drv.c
+++ b/drivers/net/vmxnet3/vmxnet3_drv.c
@@ -27,6 +27,10 @@
 #include 
 #include 
 
+#ifdef CONFIG_X86
+#include 
+#endif
+
 #include "vmxnet3_int.h"
 #include "vmxnet3_xdp.h"
 
diff --git a/drivers/platform/x86/intel/pmc/cnp.c b/drivers/platform/x86/intel/pmc/cnp.c
index 547bdf1ab02d..efea4e1ba52b 100644
--- a/drivers/platform/x86/intel/pmc/cnp.c
+++ b/drivers/platform/x86/intel/pmc/cnp.c
@@ -10,6 +10,7 @@
 
 #include 
 #include 
+#include 
 #include "core.h"
 
 /* Cannon Lake: PGD PFET Enable Ack Status Register(s) bitmap */
diff --git a/drivers/platform/x86/intel/speed_select_if/isst_if_common.c b/drivers/platform/x86/intel/speed_select_if/isst_if_common.c
index 44dcd165b4c0..8a5713593811 100644
--- a/drivers/platform/x86/intel/speed_select_if/isst_if_common.c
+++ b/drivers/platform/x86/intel/speed_select_if/isst_if_common.c
@@ -21,6 +21,7 @@
 
 #include 
 #include 
+#include 
 
 #include "isst_if_common.h"
 
diff --git a/drivers/platform/x86/intel/turbo_max_3.c b/drivers/platform/x86/intel/turbo_max_3.c
index 7e538bbd5b50..b5af3e91ba04 100644
--- a/drivers/platform/x86/intel/turbo_max_3.c
+++ b/drivers/platform/x86/intel/turbo_max_3.c
@@ -17,6 +17,7 @@
 
 #include 
 #include 
+#include 
 
 #define MSR_OC_MAILBOX			0x150
 #define MSR_OC_MAILBOX_CMD_OFFSET	32
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
        pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com,
        dapeng1.mi@linux.intel.com
Subject: [PATCH v3 04/14] x86/msr: Convert the rdpmc() macro into an always inline function
Date: Fri, 25 Apr 2025 01:34:27 -0700
Message-ID: <20250425083442.2390017-5-xin@zytor.com>
X-Mailer: git-send-email 2.49.0
In-Reply-To: <20250425083442.2390017-1-xin@zytor.com>
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Functions offer type safety and better readability compared to macros.
Additionally, always inline functions can match the performance of
macros.  Converting the rdpmc() macro into an always inline function
is simple and straightforward, so just make the change.

Moreover, the read result is now the returned value, further enhancing
readability.

Signed-off-by: Xin Li (Intel) 
Acked-by: Dave Hansen 
---

Change in v3:
*) Add a changelog even it's obvious (Dave Hansen).
---
 arch/x86/events/amd/uncore.c              |  2 +-
 arch/x86/events/core.c                    |  2 +-
 arch/x86/events/intel/core.c              |  4 ++--
 arch/x86/events/intel/ds.c                |  2 +-
 arch/x86/include/asm/msr.h                |  5 ++++-
 arch/x86/include/asm/paravirt.h           |  4 +---
 arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 12 ++++++------
 7 files changed, 16 insertions(+), 15 deletions(-)

diff --git a/arch/x86/events/amd/uncore.c b/arch/x86/events/amd/uncore.c
index 42c833cf9d98..13c4cea545c5 100644
--- a/arch/x86/events/amd/uncore.c
+++ b/arch/x86/events/amd/uncore.c
@@ -108,7 +108,7 @@ static void amd_uncore_read(struct perf_event *event)
 	if (hwc->event_base_rdpmc < 0)
 		rdmsrq(hwc->event_base, new);
 	else
-		rdpmc(hwc->event_base_rdpmc, new);
+		new = rdpmc(hwc->event_base_rdpmc);
 
 	local64_set(&hwc->prev_count, new);
 	delta = (new << COUNTER_SHIFT) - (prev << COUNTER_SHIFT);
diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
index ea618dd8a678..d8634446684e 100644
--- a/arch/x86/events/core.c
+++ b/arch/x86/events/core.c
@@ -134,7 +134,7 @@ u64 x86_perf_event_update(struct perf_event *event)
 	 */
 	prev_raw_count = local64_read(&hwc->prev_count);
 	do {
-		rdpmc(hwc->event_base_rdpmc, new_raw_count);
+		new_raw_count = rdpmc(hwc->event_base_rdpmc);
 	} while (!local64_try_cmpxchg(&hwc->prev_count,
 				      &prev_raw_count, new_raw_count));
 
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 8ac7a03ae4e9..9fa94b6e4e74 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -2724,12 +2724,12 @@ static u64 intel_update_topdown_event(struct perf_event *event, int metric_end,
 
 	if (!val) {
 		/* read Fixed counter 3 */
-		rdpmc((3 | INTEL_PMC_FIXED_RDPMC_BASE), slots);
+		slots = rdpmc(3 | INTEL_PMC_FIXED_RDPMC_BASE);
 		if (!slots)
 			return 0;
 
 		/* read PERF_METRICS */
-		rdpmc(INTEL_PMC_FIXED_RDPMC_METRICS, metrics);
+		metrics = rdpmc(INTEL_PMC_FIXED_RDPMC_METRICS);
 	} else {
 		slots = val[0];
 		metrics = val[1];
diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
index be05e93b48e7..a093cb485278 100644
--- a/arch/x86/events/intel/ds.c
+++ b/arch/x86/events/intel/ds.c
@@ -2274,7 +2274,7 @@ intel_pmu_save_and_restart_reload(struct perf_event *event, int count)
 	WARN_ON(this_cpu_read(cpu_hw_events.enabled));
 
 	prev_raw_count = local64_read(&hwc->prev_count);
-	rdpmc(hwc->event_base_rdpmc, new_raw_count);
+	new_raw_count = rdpmc(hwc->event_base_rdpmc);
 	local64_set(&hwc->prev_count, new_raw_count);
 
 	/*
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index ae96d35e0621..73d44081e597 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -234,7 +234,10 @@ static inline int rdmsrq_safe(u32 msr, u64 *p)
 	return err;
 }
 
-#define rdpmc(counter, val) ((val) = native_read_pmc(counter))
+static __always_inline u64 rdpmc(int counter)
+{
+	return native_read_pmc(counter);
+}
 
 #endif	/* !CONFIG_PARAVIRT_XXL */
 
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index faa0713553b1..f272c4bd3d5b 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -239,13 +239,11 @@ static inline int rdmsrq_safe(unsigned msr, u64 *p)
 	return err;
 }
 
-static inline u64 paravirt_read_pmc(int counter)
+static __always_inline u64 rdpmc(int counter)
 {
 	return PVOP_CALL1(u64, cpu.read_pmc, counter);
 }
 
-#define rdpmc(counter, val) ((val) = paravirt_read_pmc(counter))
-
 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
 {
 	PVOP_VCALL2(cpu.alloc_ldt, ldt, entries);
diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
index 15ff62d83bd8..61d762555a79 100644
--- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
+++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
@@ -1019,8 +1019,8 @@ static int measure_residency_fn(struct perf_event_attr *miss_attr,
 	 * used in L1 cache, second to capture accurate value that does not
 	 * include cache misses incurred because of instruction loads.
 	 */
-	rdpmc(hit_pmcnum, hits_before);
-	rdpmc(miss_pmcnum, miss_before);
+	hits_before = rdpmc(hit_pmcnum);
+	miss_before = rdpmc(miss_pmcnum);
 	/*
 	 * From SDM: Performing back-to-back fast reads are not guaranteed
 	 * to be monotonic.
@@ -1028,8 +1028,8 @@ static int measure_residency_fn(struct perf_event_attr *miss_attr,
 	 * before proceeding.
 	 */
 	rmb();
-	rdpmc(hit_pmcnum, hits_before);
-	rdpmc(miss_pmcnum, miss_before);
+	hits_before = rdpmc(hit_pmcnum);
+	miss_before = rdpmc(miss_pmcnum);
 	/*
 	 * Use LFENCE to ensure all previous instructions are retired
 	 * before proceeding.
@@ -1051,8 +1051,8 @@ static int measure_residency_fn(struct perf_event_attr *miss_attr,
 	 * before proceeding.
 	 */
 	rmb();
-	rdpmc(hit_pmcnum, hits_after);
-	rdpmc(miss_pmcnum, miss_after);
+	hits_after = rdpmc(hit_pmcnum);
+	miss_after = rdpmc(miss_pmcnum);
 	/*
 	 * Use LFENCE to ensure all previous instructions are retired
 	 * before proceeding.
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
        pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com,
        dapeng1.mi@linux.intel.com
Subject: [PATCH v3 00/14] MSR code cleanup part one
Date: Fri, 25 Apr 2025 01:34:23 -0700
Message-ID: <20250425083442.2390017-1-xin@zytor.com>
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This patch set is the first part of the patch set:

  MSR refactor with new MSR instructions support

@ https://lore.kernel.org/lkml/20250422082216.1954310-1-xin@zytor.com/T/#m5a34be7d4ed55f0baca965cb65452a08e9ad7c8a


It's getting *WAY* too big, and whether to zap the pv_ops MSR APIs is
still under argument.  Dave Hansen suggested to focus on rename stuff
first, most of which he acked.

Jürgen Groß also gave his RBs to most of the Xen MSR cleanup patches.

So here comes the first MSR cleanup patch set with version 3.


This patch series is based on:

  git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/msr


Xin Li (Intel) (14):
  x86/msr: Move rdtsc{,_ordered}() to 
  x86/msr: Remove rdpmc()
  x86/msr: Rename rdpmcl() to rdpmc()
  x86/msr: Convert the rdpmc() macro into an always inline function
  x86/msr: Return u64 consistently in Xen PMC read functions
  x86/msr: Convert __wrmsr() uses to native_wrmsr{,q}() uses
  x86/msr: Add the native_rdmsrq() helper
  x86/msr: Convert __rdmsr() uses to native_rdmsrq() uses
  x86/xen/msr: Remove calling native_{read,write}_msr{,_safe}() in
    pmu_msr_{read,write}()
  x86/xen/msr: Remove pmu_msr_{read,write}()
  x86/xen/msr: Remove the error pointer argument from set_seg()
  x86/pvops/msr: refactor pv_cpu_ops.write_msr{,_safe}()
  x86/msr: Replace wrmsr(msr, low, 0) with wrmsrq(msr, low)
  x86/msr: Change the function type of native_read_msr_safe()

 arch/x86/coco/sev/core.c                      |   2 +-
 arch/x86/events/amd/brs.c                     |   4 +-
 arch/x86/events/amd/uncore.c                  |   2 +-
 arch/x86/events/core.c                        |   2 +-
 arch/x86/events/intel/core.c                  |   4 +-
 arch/x86/events/intel/ds.c                    |   2 +-
 arch/x86/events/msr.c                         |   3 +
 arch/x86/events/perf_event.h                  |   1 +
 arch/x86/events/probe.c                       |   2 +
 arch/x86/hyperv/hv_apic.c                     |   6 +-
 arch/x86/hyperv/hv_vtl.c                      |   4 +-
 arch/x86/hyperv/ivm.c                         |   3 +-
 arch/x86/include/asm/apic.h                   |   4 +-
 arch/x86/include/asm/fred.h                   |   1 +
 arch/x86/include/asm/microcode.h              |   2 +
 arch/x86/include/asm/mshyperv.h               |   3 +-
 arch/x86/include/asm/msr.h                    | 130 +++++-------------
 arch/x86/include/asm/paravirt.h               |  57 ++++----
 arch/x86/include/asm/paravirt_types.h         |  10 +-
 arch/x86/include/asm/suspend_32.h             |   1 +
 arch/x86/include/asm/suspend_64.h             |   1 +
 arch/x86/include/asm/switch_to.h              |   4 +-
 arch/x86/include/asm/tsc.h                    |  76 +++++++++-
 arch/x86/kernel/cpu/amd.c                     |   2 +-
 arch/x86/kernel/cpu/common.c                  |  10 +-
 arch/x86/kernel/cpu/mce/core.c                |   6 +-
 arch/x86/kernel/cpu/resctrl/pseudo_lock.c     |  25 ++--
 arch/x86/kernel/cpu/resctrl/rdtgroup.c        |   2 +-
 arch/x86/kernel/cpu/umwait.c                  |   4 +-
 arch/x86/kernel/fpu/xstate.h                  |   1 +
 arch/x86/kernel/hpet.c                        |   1 +
 arch/x86/kernel/kvm.c                         |   2 +-
 arch/x86/kernel/kvmclock.c                    |   2 +-
 arch/x86/kernel/process_64.c                  |   1 +
 arch/x86/kernel/trace_clock.c                 |   2 +-
 arch/x86/kernel/tsc_sync.c                    |   1 +
 arch/x86/kvm/svm/svm.c                        |  34 ++---
 arch/x86/kvm/vmx/vmx.c                        |   4 +-
 arch/x86/lib/kaslr.c                          |   2 +-
 arch/x86/mm/mem_encrypt_identity.c            |   5 +-
 arch/x86/realmode/init.c                      |   1 +
 arch/x86/xen/enlighten_pv.c                   |  58 ++++----
 arch/x86/xen/pmu.c                            |  69 +++-------
 arch/x86/xen/xen-ops.h                        |   5 +-
 drivers/acpi/processor_perflib.c              |   1 +
 drivers/acpi/processor_throttling.c           |   3 +-
 drivers/cpufreq/amd-pstate-ut.c               |   2 +
 drivers/hwmon/hwmon-vid.c                     |   4 +
 drivers/net/vmxnet3/vmxnet3_drv.c             |   4 +
 drivers/platform/x86/intel/pmc/cnp.c          |   1 +
 .../intel/speed_select_if/isst_if_common.c    |   1 +
 drivers/platform/x86/intel/turbo_max_3.c      |   1 +
 52 files changed, 284 insertions(+), 294 deletions(-)


base-commit: a5447e92e169dafaf02fd653500105c7186d7128
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
        pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com,
        dapeng1.mi@linux.intel.com
Subject: [PATCH v3 05/14] x86/msr: Return u64 consistently in Xen PMC read functions
Date: Fri, 25 Apr 2025 01:34:28 -0700
Message-ID: <20250425083442.2390017-6-xin@zytor.com>
X-Mailer: git-send-email 2.49.0
In-Reply-To: <20250425083442.2390017-1-xin@zytor.com>
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The pv_ops PMC read API is defined as:
        u64 (*read_pmc)(int counter);

But Xen PMC read functions return unsigned long long, make them
return u64 consistently.

Signed-off-by: Xin Li (Intel) 
Reviewed-by: Juergen Gross 
---
 arch/x86/xen/pmu.c     | 6 +++---
 arch/x86/xen/xen-ops.h | 2 +-
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/x86/xen/pmu.c b/arch/x86/xen/pmu.c
index f06987b0efc3..9c1682af620a 100644
--- a/arch/x86/xen/pmu.c
+++ b/arch/x86/xen/pmu.c
@@ -346,7 +346,7 @@ bool pmu_msr_write(unsigned int msr, uint32_t low, uint32_t high, int *err)
 	return true;
 }
 
-static unsigned long long xen_amd_read_pmc(int counter)
+static u64 xen_amd_read_pmc(int counter)
 {
 	struct xen_pmu_amd_ctxt *ctxt;
 	uint64_t *counter_regs;
@@ -366,7 +366,7 @@ static unsigned long long xen_amd_read_pmc(int counter)
 	return counter_regs[counter];
 }
 
-static unsigned long long xen_intel_read_pmc(int counter)
+static u64 xen_intel_read_pmc(int counter)
 {
 	struct xen_pmu_intel_ctxt *ctxt;
 	uint64_t *fixed_counters;
@@ -396,7 +396,7 @@ static unsigned long long xen_intel_read_pmc(int counter)
 	return arch_cntr_pair[counter].counter;
 }
 
-unsigned long long xen_read_pmc(int counter)
+u64 xen_read_pmc(int counter)
 {
 	if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
 		return xen_amd_read_pmc(counter);
diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h
index 63c13a2ccf55..735f58780704 100644
--- a/arch/x86/xen/xen-ops.h
+++ b/arch/x86/xen/xen-ops.h
@@ -277,7 +277,7 @@ static inline void xen_pmu_finish(int cpu) {}
 bool pmu_msr_read(unsigned int msr, uint64_t *val, int *err);
 bool pmu_msr_write(unsigned int msr, uint32_t low, uint32_t high, int *err);
 int pmu_apic_update(uint32_t reg);
-unsigned long long xen_read_pmc(int counter);
+u64 xen_read_pmc(int counter);
 
 #ifdef CONFIG_SMP
 
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
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Subject: [PATCH v3 06/14] x86/msr: Convert __wrmsr() uses to native_wrmsr{,q}() uses
Date: Fri, 25 Apr 2025 01:34:29 -0700
Message-ID: <20250425083442.2390017-7-xin@zytor.com>
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__wrmsr() is the lowest level MSR write API, with native_wrmsr()
and native_wrmsrq() serving as higher-level wrappers around it:

  #define native_wrmsr(msr, low, high)                    \
          __wrmsr(msr, low, high)

  #define native_wrmsrl(msr, val)                         \
          __wrmsr((msr), (u32)((u64)(val)),               \
                         (u32)((u64)(val) >> 32))

However, __wrmsr() continues to be utilized in various locations.

MSR APIs are designed for different scenarios, such as native or
pvops, with or without trace, and safe or non-safe.  Unfortunately,
the current MSR API names do not adequately reflect these factors,
making it challenging to select the most appropriate API for
various situations.

To pave the way for improving MSR API names, convert __wrmsr()
uses to native_wrmsr{,q}() to ensure consistent usage.  Later,
these APIs can be renamed to better reflect their implications,
such as native or pvops, with or without trace, and safe or
non-safe.

No functional change intended.

Signed-off-by: Xin Li (Intel) 
---

Change in v2:
* Use native_wrmsr() where natural [rmid_p, closid_p] high/lo parameters
  can be used, without the shift-uglification (Ingo).
---
 arch/x86/events/amd/brs.c                 | 2 +-
 arch/x86/include/asm/apic.h               | 2 +-
 arch/x86/include/asm/msr.h                | 6 ++++--
 arch/x86/kernel/cpu/mce/core.c            | 2 +-
 arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 6 +++---
 5 files changed, 10 insertions(+), 8 deletions(-)

diff --git a/arch/x86/events/amd/brs.c b/arch/x86/events/amd/brs.c
index ec4e8a4cace4..3f5ecfd80d1e 100644
--- a/arch/x86/events/amd/brs.c
+++ b/arch/x86/events/amd/brs.c
@@ -44,7 +44,7 @@ static inline unsigned int brs_to(int idx)
 static __always_inline void set_debug_extn_cfg(u64 val)
 {
 	/* bits[4:3] must always be set to 11b */
-	__wrmsr(MSR_AMD_DBG_EXTN_CFG, val | 3ULL << 3, val >> 32);
+	native_wrmsrq(MSR_AMD_DBG_EXTN_CFG, val | 3ULL << 3);
 }
 
 static __always_inline u64 get_debug_extn_cfg(void)
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index 1c136f54651c..0174dd548327 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -214,7 +214,7 @@ static inline void native_apic_msr_write(u32 reg, u32 v)
 
 static inline void native_apic_msr_eoi(void)
 {
-	__wrmsr(APIC_BASE_MSR + (APIC_EOI >> 4), APIC_EOI_ACK, 0);
+	native_wrmsrq(APIC_BASE_MSR + (APIC_EOI >> 4), APIC_EOI_ACK);
 }
 
 static inline u32 native_apic_msr_read(u32 reg)
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 73d44081e597..82a908125b20 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -144,10 +144,12 @@ static inline u64 native_read_msr_safe(u32 msr, int *err)
 static inline void notrace
 native_write_msr(u32 msr, u32 low, u32 high)
 {
-	__wrmsr(msr, low, high);
+	u64 val = (u64)high << 32 | low;
+
+	native_wrmsrq(msr, val);
 
 	if (tracepoint_enabled(write_msr))
-		do_trace_write_msr(msr, ((u64)high << 32 | low), 0);
+		do_trace_write_msr(msr, val, 0);
 }
 
 /* Can be uninlined because referenced by paravirt */
diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
index 255927f0284e..1ae75ec7ac95 100644
--- a/arch/x86/kernel/cpu/mce/core.c
+++ b/arch/x86/kernel/cpu/mce/core.c
@@ -1306,7 +1306,7 @@ static noinstr bool mce_check_crashing_cpu(void)
 		}
 
 		if (mcgstatus & MCG_STATUS_RIPV) {
-			__wrmsr(MSR_IA32_MCG_STATUS, 0, 0);
+			native_wrmsrq(MSR_IA32_MCG_STATUS, 0);
 			return true;
 		}
 	}
diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
index 61d762555a79..6e5edd76086e 100644
--- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
+++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
@@ -483,7 +483,7 @@ int resctrl_arch_pseudo_lock_fn(void *_plr)
 	 * cache.
 	 */
 	saved_msr = __rdmsr(MSR_MISC_FEATURE_CONTROL);
-	__wrmsr(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits, 0x0);
+	native_wrmsrq(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits);
 	closid_p = this_cpu_read(pqr_state.cur_closid);
 	rmid_p = this_cpu_read(pqr_state.cur_rmid);
 	mem_r = plr->kmem;
@@ -495,7 +495,7 @@ int resctrl_arch_pseudo_lock_fn(void *_plr)
 	 * pseudo-locked followed by reading of kernel memory to load it
 	 * into the cache.
 	 */
-	__wrmsr(MSR_IA32_PQR_ASSOC, rmid_p, plr->closid);
+	native_wrmsr(MSR_IA32_PQR_ASSOC, rmid_p, plr->closid);
 
 	/*
 	 * Cache was flushed earlier. Now access kernel memory to read it
@@ -532,7 +532,7 @@ int resctrl_arch_pseudo_lock_fn(void *_plr)
 	 * Critical section end: restore closid with capacity bitmask that
 	 * does not overlap with pseudo-locked region.
 	 */
-	__wrmsr(MSR_IA32_PQR_ASSOC, rmid_p, closid_p);
+	native_wrmsr(MSR_IA32_PQR_ASSOC, rmid_p, closid_p);
 
 	/* Re-enable the hardware prefetcher(s) */
 	wrmsrq(MSR_MISC_FEATURE_CONTROL, saved_msr);
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
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        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
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Subject: [PATCH v3 07/14] x86/msr: Add the native_rdmsrq() helper
Date: Fri, 25 Apr 2025 01:34:30 -0700
Message-ID: <20250425083442.2390017-8-xin@zytor.com>
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__rdmsr() is the lowest-level primitive MSR read API, implemented in
assembly code and returning an MSR value in a u64 integer, on top of
which a convenience wrapper native_rdmsr() is defined to return an MSR
value in two u32 integers.  For some reason, native_rdmsrq() is not
defined and __rdmsr() is directly used when it needs to return an MSR
value in a u64 integer.

Add the native_rdmsrq() helper, which is simply an alias of __rdmsr(),
to make native_rdmsr() and native_rdmsrq() a pair of MSR read APIs.

Signed-off-by: Xin Li (Intel) 
---

Change in v2:
* Split into two changes and add the native_rdmsrl() helper in the
  first one with a proper explanation (Ingo).
---
 arch/x86/include/asm/msr.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 82a908125b20..7b9713a49d59 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -107,6 +107,11 @@ do {							\
 	(void)((val2) = (u32)(__val >> 32));		\
 } while (0)
 
+static __always_inline u64 native_rdmsrq(u32 msr)
+{
+	return __rdmsr(msr);
+}
+
 #define native_wrmsr(msr, low, high)			\
 	__wrmsr(msr, low, high)
 
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
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Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
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        dapeng1.mi@linux.intel.com
Subject: [PATCH v3 02/14] x86/msr: Remove rdpmc()
Date: Fri, 25 Apr 2025 01:34:25 -0700
Message-ID: <20250425083442.2390017-3-xin@zytor.com>
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rdpmc() is not used anywhere, remove it.

Signed-off-by: Xin Li (Intel) 
Acked-by: Dave Hansen 
---
 arch/x86/include/asm/msr.h      | 7 -------
 arch/x86/include/asm/paravirt.h | 7 -------
 2 files changed, 14 deletions(-)

diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 2caa13830e11..e05466e486fc 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -234,13 +234,6 @@ static inline int rdmsrq_safe(u32 msr, u64 *p)
 	return err;
 }
 
-#define rdpmc(counter, low, high)			\
-do {							\
-	u64 _l = native_read_pmc((counter));		\
-	(low)  = (u32)_l;				\
-	(high) = (u32)(_l >> 32);			\
-} while (0)
-
 #define rdpmcl(counter, val) ((val) = native_read_pmc(counter))
 
 #endif	/* !CONFIG_PARAVIRT_XXL */
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index 86a77528792d..c4dedb984735 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -244,13 +244,6 @@ static inline u64 paravirt_read_pmc(int counter)
 	return PVOP_CALL1(u64, cpu.read_pmc, counter);
 }
 
-#define rdpmc(counter, low, high)		\
-do {						\
-	u64 _l = paravirt_read_pmc(counter);	\
-	low = (u32)_l;				\
-	high = _l >> 32;			\
-} while (0)
-
 #define rdpmcl(counter, val) ((val) = paravirt_read_pmc(counter))
 
 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
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        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com,
        dapeng1.mi@linux.intel.com
Subject: [PATCH v3 08/14] x86/msr: Convert __rdmsr() uses to native_rdmsrq() uses
Date: Fri, 25 Apr 2025 01:34:31 -0700
Message-ID: <20250425083442.2390017-9-xin@zytor.com>
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__rdmsr() is the lowest level MSR write API, with native_rdmsr()
and native_rdmsrq() serving as higher-level wrappers around it.

  #define native_rdmsr(msr, val1, val2)                   \
  do {                                                    \
          u64 __val = __rdmsr((msr));                     \
          (void)((val1) = (u32)__val);                    \
          (void)((val2) = (u32)(__val >> 32));            \
  } while (0)

  static __always_inline u64 native_rdmsrq(u32 msr)
  {
          return __rdmsr(msr);
  }

However, __rdmsr() continues to be utilized in various locations.

MSR APIs are designed for different scenarios, such as native or
pvops, with or without trace, and safe or non-safe.  Unfortunately,
the current MSR API names do not adequately reflect these factors,
making it challenging to select the most appropriate API for
various situations.

To pave the way for improving MSR API names, convert __rdmsr()
uses to native_rdmsrq() to ensure consistent usage.  Later, these
APIs can be renamed to better reflect their implications, such as
native or pvops, with or without trace, and safe or non-safe.

No functional change intended.

Signed-off-by: Xin Li (Intel) 
---
 arch/x86/coco/sev/core.c                  | 2 +-
 arch/x86/events/amd/brs.c                 | 2 +-
 arch/x86/hyperv/hv_vtl.c                  | 4 ++--
 arch/x86/hyperv/ivm.c                     | 2 +-
 arch/x86/include/asm/mshyperv.h           | 2 +-
 arch/x86/kernel/cpu/common.c              | 2 +-
 arch/x86/kernel/cpu/mce/core.c            | 4 ++--
 arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 2 +-
 arch/x86/kvm/vmx/vmx.c                    | 4 ++--
 arch/x86/mm/mem_encrypt_identity.c        | 4 ++--
 10 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/arch/x86/coco/sev/core.c b/arch/x86/coco/sev/core.c
index b18a33fe8dd3..c4137c94678d 100644
--- a/arch/x86/coco/sev/core.c
+++ b/arch/x86/coco/sev/core.c
@@ -276,7 +276,7 @@ static noinstr struct ghcb *__sev_get_ghcb(struct ghcb_state *state)
 
 static inline u64 sev_es_rd_ghcb_msr(void)
 {
-	return __rdmsr(MSR_AMD64_SEV_ES_GHCB);
+	return native_rdmsrq(MSR_AMD64_SEV_ES_GHCB);
 }
 
 static __always_inline void sev_es_wr_ghcb_msr(u64 val)
diff --git a/arch/x86/events/amd/brs.c b/arch/x86/events/amd/brs.c
index 3f5ecfd80d1e..06f35a6b58a5 100644
--- a/arch/x86/events/amd/brs.c
+++ b/arch/x86/events/amd/brs.c
@@ -49,7 +49,7 @@ static __always_inline void set_debug_extn_cfg(u64 val)
 
 static __always_inline u64 get_debug_extn_cfg(void)
 {
-	return __rdmsr(MSR_AMD_DBG_EXTN_CFG);
+	return native_rdmsrq(MSR_AMD_DBG_EXTN_CFG);
 }
 
 static bool __init amd_brs_detect(void)
diff --git a/arch/x86/hyperv/hv_vtl.c b/arch/x86/hyperv/hv_vtl.c
index 13242ed8ff16..c6343e699154 100644
--- a/arch/x86/hyperv/hv_vtl.c
+++ b/arch/x86/hyperv/hv_vtl.c
@@ -149,11 +149,11 @@ static int hv_vtl_bringup_vcpu(u32 target_vp_index, int cpu, u64 eip_ignored)
 	input->vp_context.rip = rip;
 	input->vp_context.rsp = rsp;
 	input->vp_context.rflags = 0x0000000000000002;
-	input->vp_context.efer = __rdmsr(MSR_EFER);
+	input->vp_context.efer = native_rdmsrq(MSR_EFER);
 	input->vp_context.cr0 = native_read_cr0();
 	input->vp_context.cr3 = __native_read_cr3();
 	input->vp_context.cr4 = native_read_cr4();
-	input->vp_context.msr_cr_pat = __rdmsr(MSR_IA32_CR_PAT);
+	input->vp_context.msr_cr_pat = native_rdmsrq(MSR_IA32_CR_PAT);
 	input->vp_context.idtr.limit = idt_ptr.size;
 	input->vp_context.idtr.base = idt_ptr.address;
 	input->vp_context.gdtr.limit = gdt_ptr.size;
diff --git a/arch/x86/hyperv/ivm.c b/arch/x86/hyperv/ivm.c
index 8209de792388..09a165a3c41e 100644
--- a/arch/x86/hyperv/ivm.c
+++ b/arch/x86/hyperv/ivm.c
@@ -111,7 +111,7 @@ u64 hv_ghcb_hypercall(u64 control, void *input, void *output, u32 input_size)
 
 static inline u64 rd_ghcb_msr(void)
 {
-	return __rdmsr(MSR_AMD64_SEV_ES_GHCB);
+	return native_rdmsrq(MSR_AMD64_SEV_ES_GHCB);
 }
 
 static inline void wr_ghcb_msr(u64 val)
diff --git a/arch/x86/include/asm/mshyperv.h b/arch/x86/include/asm/mshyperv.h
index 15d00dace70f..778444310cfb 100644
--- a/arch/x86/include/asm/mshyperv.h
+++ b/arch/x86/include/asm/mshyperv.h
@@ -305,7 +305,7 @@ void hv_set_non_nested_msr(unsigned int reg, u64 value);
 
 static __always_inline u64 hv_raw_get_msr(unsigned int reg)
 {
-	return __rdmsr(reg);
+	return native_rdmsrq(reg);
 }
 
 #else /* CONFIG_HYPERV */
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 079ded4eeb86..cefc99990bde 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -164,7 +164,7 @@ static void ppin_init(struct cpuinfo_x86 *c)
 
 	/* Is the enable bit set? */
 	if (val & 2UL) {
-		c->ppin = __rdmsr(info->msr_ppin);
+		c->ppin = native_rdmsrq(info->msr_ppin);
 		set_cpu_cap(c, info->feature);
 		return;
 	}
diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
index 1ae75ec7ac95..32286bad75e6 100644
--- a/arch/x86/kernel/cpu/mce/core.c
+++ b/arch/x86/kernel/cpu/mce/core.c
@@ -121,7 +121,7 @@ void mce_prep_record_common(struct mce *m)
 {
 	m->cpuid	= cpuid_eax(1);
 	m->cpuvendor	= boot_cpu_data.x86_vendor;
-	m->mcgcap	= __rdmsr(MSR_IA32_MCG_CAP);
+	m->mcgcap	= native_rdmsrq(MSR_IA32_MCG_CAP);
 	/* need the internal __ version to avoid deadlocks */
 	m->time		= __ktime_get_real_seconds();
 }
@@ -1298,7 +1298,7 @@ static noinstr bool mce_check_crashing_cpu(void)
 	    (crashing_cpu != -1 && crashing_cpu != cpu)) {
 		u64 mcgstatus;
 
-		mcgstatus = __rdmsr(MSR_IA32_MCG_STATUS);
+		mcgstatus = native_rdmsrq(MSR_IA32_MCG_STATUS);
 
 		if (boot_cpu_data.x86_vendor == X86_VENDOR_ZHAOXIN) {
 			if (mcgstatus & MCG_STATUS_LMCES)
diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
index 6e5edd76086e..324bd4919300 100644
--- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
+++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
@@ -482,7 +482,7 @@ int resctrl_arch_pseudo_lock_fn(void *_plr)
 	 * the buffer and evict pseudo-locked memory read earlier from the
 	 * cache.
 	 */
-	saved_msr = __rdmsr(MSR_MISC_FEATURE_CONTROL);
+	saved_msr = native_rdmsrq(MSR_MISC_FEATURE_CONTROL);
 	native_wrmsrq(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits);
 	closid_p = this_cpu_read(pqr_state.cur_closid);
 	rmid_p = this_cpu_read(pqr_state.cur_rmid);
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index cd0d6c1fcf9c..68c8bb247fc4 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -380,7 +380,7 @@ static __always_inline void vmx_disable_fb_clear(struct vcpu_vmx *vmx)
 	if (!vmx->disable_fb_clear)
 		return;
 
-	msr = __rdmsr(MSR_IA32_MCU_OPT_CTRL);
+	msr = native_rdmsrq(MSR_IA32_MCU_OPT_CTRL);
 	msr |= FB_CLEAR_DIS;
 	native_wrmsrq(MSR_IA32_MCU_OPT_CTRL, msr);
 	/* Cache the MSR value to avoid reading it later */
@@ -7307,7 +7307,7 @@ void noinstr vmx_spec_ctrl_restore_host(struct vcpu_vmx *vmx,
 		return;
 
 	if (flags & VMX_RUN_SAVE_SPEC_CTRL)
-		vmx->spec_ctrl = __rdmsr(MSR_IA32_SPEC_CTRL);
+		vmx->spec_ctrl = native_rdmsrq(MSR_IA32_SPEC_CTRL);
 
 	/*
 	 * If the guest/host SPEC_CTRL values differ, restore the host value.
diff --git a/arch/x86/mm/mem_encrypt_identity.c b/arch/x86/mm/mem_encrypt_identity.c
index afda349db35b..32af1cc378e4 100644
--- a/arch/x86/mm/mem_encrypt_identity.c
+++ b/arch/x86/mm/mem_encrypt_identity.c
@@ -527,7 +527,7 @@ void __head sme_enable(struct boot_params *bp)
 	me_mask = 1UL << (ebx & 0x3f);
 
 	/* Check the SEV MSR whether SEV or SME is enabled */
-	RIP_REL_REF(sev_status) = msr = __rdmsr(MSR_AMD64_SEV);
+	RIP_REL_REF(sev_status) = msr = native_rdmsrq(MSR_AMD64_SEV);
 	feature_mask = (msr & MSR_AMD64_SEV_ENABLED) ? AMD_SEV_BIT : AMD_SME_BIT;
 
 	/*
@@ -558,7 +558,7 @@ void __head sme_enable(struct boot_params *bp)
 			return;
 
 		/* For SME, check the SYSCFG MSR */
-		msr = __rdmsr(MSR_AMD64_SYSCFG);
+		msr = native_rdmsrq(MSR_AMD64_SYSCFG);
 		if (!(msr & MSR_AMD64_SYSCFG_MEM_ENCRYPT))
 			return;
 	}
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
        pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com,
        dapeng1.mi@linux.intel.com
Subject: [PATCH v3 10/14] x86/xen/msr: Remove pmu_msr_{read,write}()
Date: Fri, 25 Apr 2025 01:34:33 -0700
Message-ID: <20250425083442.2390017-11-xin@zytor.com>
X-Mailer: git-send-email 2.49.0
In-Reply-To: <20250425083442.2390017-1-xin@zytor.com>
References: <20250425083442.2390017-1-xin@zytor.com>
MIME-Version: 1.0
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As pmu_msr_{read,write}() are now wrappers of pmu_msr_chk_emulated(),
remove them and use pmu_msr_chk_emulated() directly.

As pmu_msr_chk_emulated() could easily return false in the cases where
it would set *emul to false, remove the "emul" argument and use the
return value instead.

While at it, convert the data type of MSR index to u32 in functions
called in pmu_msr_chk_emulated().

Suggested-by: H. Peter Anvin (Intel) 
Suggested-by: Juergen Gross 
Signed-off-by: Xin Li (Intel) 
---

Change in v3:
*) Remove the "emul" argument of pmu_msr_chk_emulated() (Juergen Gross).
---
 arch/x86/xen/enlighten_pv.c | 15 ++++++++-------
 arch/x86/xen/pmu.c          | 30 ++++++------------------------
 arch/x86/xen/xen-ops.h      |  3 +--
 3 files changed, 15 insertions(+), 33 deletions(-)

diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c
index 61e51a970f3c..528a2f4df050 100644
--- a/arch/x86/xen/enlighten_pv.c
+++ b/arch/x86/xen/enlighten_pv.c
@@ -1090,7 +1090,7 @@ static u64 xen_do_read_msr(unsigned int msr, int *err)
 {
 	u64 val = 0;	/* Avoid uninitialized value for safe variant. */
 
-	if (pmu_msr_read_emulated(msr, &val))
+	if (pmu_msr_chk_emulated(msr, &val, true))
 		return val;
 
 	if (err)
@@ -1162,12 +1162,13 @@ static void xen_do_write_msr(unsigned int msr, unsigned int low,
 	default:
 		val = (u64)high << 32 | low;
 
-		if (!pmu_msr_write_emulated(msr, val)) {
-			if (err)
-				*err = native_write_msr_safe(msr, low, high);
-			else
-				native_write_msr(msr, low, high);
-		}
+		if (pmu_msr_chk_emulated(msr, &val, false))
+			return;
+
+		if (err)
+			*err = native_write_msr_safe(msr, low, high);
+		else
+			native_write_msr(msr, low, high);
 	}
 }
 
diff --git a/arch/x86/xen/pmu.c b/arch/x86/xen/pmu.c
index b6557f2d1a2e..6bee83018694 100644
--- a/arch/x86/xen/pmu.c
+++ b/arch/x86/xen/pmu.c
@@ -128,7 +128,7 @@ static inline uint32_t get_fam15h_addr(u32 addr)
 	return addr;
 }
 
-static inline bool is_amd_pmu_msr(unsigned int msr)
+static bool is_amd_pmu_msr(u32 msr)
 {
 	if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD &&
 	    boot_cpu_data.x86_vendor != X86_VENDOR_HYGON)
@@ -194,8 +194,7 @@ static bool is_intel_pmu_msr(u32 msr_index, int *type, int *index)
 	}
 }
 
-static bool xen_intel_pmu_emulate(unsigned int msr, u64 *val, int type,
-				  int index, bool is_read)
+static bool xen_intel_pmu_emulate(u32 msr, u64 *val, int type, int index, bool is_read)
 {
 	uint64_t *reg = NULL;
 	struct xen_pmu_intel_ctxt *ctxt;
@@ -257,7 +256,7 @@ static bool xen_intel_pmu_emulate(unsigned int msr, u64 *val, int type,
 	return false;
 }
 
-static bool xen_amd_pmu_emulate(unsigned int msr, u64 *val, bool is_read)
+static bool xen_amd_pmu_emulate(u32 msr, u64 *val, bool is_read)
 {
 	uint64_t *reg = NULL;
 	int i, off = 0;
@@ -298,33 +297,16 @@ static bool xen_amd_pmu_emulate(unsigned int msr, u64 *val, bool is_read)
 	return false;
 }
 
-static bool pmu_msr_chk_emulated(unsigned int msr, uint64_t *val, bool is_read,
-				 bool *emul)
+bool pmu_msr_chk_emulated(u32 msr, u64 *val, bool is_read)
 {
 	int type, index = 0;
 
 	if (is_amd_pmu_msr(msr))
-		*emul = xen_amd_pmu_emulate(msr, val, is_read);
+		return xen_amd_pmu_emulate(msr, val, is_read);
 	else if (is_intel_pmu_msr(msr, &type, &index))
-		*emul = xen_intel_pmu_emulate(msr, val, type, index, is_read);
+		return xen_intel_pmu_emulate(msr, val, type, index, is_read);
 	else
 		return false;
-
-	return true;
-}
-
-bool pmu_msr_read_emulated(u32 msr, u64 *val)
-{
-	bool emulated;
-
-	return pmu_msr_chk_emulated(msr, val, true, &emulated) && emulated;
-}
-
-bool pmu_msr_write_emulated(u32 msr, u64 val)
-{
-	bool emulated;
-
-	return pmu_msr_chk_emulated(msr, &val, false, &emulated) && emulated;
 }
 
 static u64 xen_amd_read_pmc(int counter)
diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h
index 163e03e33089..fd7f845b83a3 100644
--- a/arch/x86/xen/xen-ops.h
+++ b/arch/x86/xen/xen-ops.h
@@ -274,8 +274,7 @@ void xen_pmu_finish(int cpu);
 static inline void xen_pmu_init(int cpu) {}
 static inline void xen_pmu_finish(int cpu) {}
 #endif
-bool pmu_msr_read_emulated(u32 msr, u64 *val);
-bool pmu_msr_write_emulated(u32 msr, u64 val);
+bool pmu_msr_chk_emulated(u32 msr, u64 *val, bool is_read);
 int pmu_apic_update(uint32_t reg);
 u64 xen_read_pmc(int counter);
 
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
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        haiyangz@microsoft.com, decui@microsoft.com,
        dapeng1.mi@linux.intel.com
Subject: [PATCH v3 03/14] x86/msr: Rename rdpmcl() to rdpmc()
Date: Fri, 25 Apr 2025 01:34:26 -0700
Message-ID: <20250425083442.2390017-4-xin@zytor.com>
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Now that rdpmc() is gone, i.e. rdpmcl() is the sole PMC read helper,
simply rename rdpmcl() to rdpmc().

Signed-off-by: Xin Li (Intel) 
Acked-by: Dave Hansen 
---

Changes in v3:
*) Explain the reason of the renaming in the changelog (Dave Hansen).
*) Use shorter name rdpmc() instead of rdpmcq() as the name of the
   sole PMC read helper (Sean Christopherson).
---
 arch/x86/events/amd/uncore.c              |  2 +-
 arch/x86/events/core.c                    |  2 +-
 arch/x86/events/intel/core.c              |  4 ++--
 arch/x86/events/intel/ds.c                |  2 +-
 arch/x86/include/asm/msr.h                |  2 +-
 arch/x86/include/asm/paravirt.h           |  2 +-
 arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 12 ++++++------
 7 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/arch/x86/events/amd/uncore.c b/arch/x86/events/amd/uncore.c
index 2a3259df619a..42c833cf9d98 100644
--- a/arch/x86/events/amd/uncore.c
+++ b/arch/x86/events/amd/uncore.c
@@ -108,7 +108,7 @@ static void amd_uncore_read(struct perf_event *event)
 	if (hwc->event_base_rdpmc < 0)
 		rdmsrq(hwc->event_base, new);
 	else
-		rdpmcl(hwc->event_base_rdpmc, new);
+		rdpmc(hwc->event_base_rdpmc, new);
 
 	local64_set(&hwc->prev_count, new);
 	delta = (new << COUNTER_SHIFT) - (prev << COUNTER_SHIFT);
diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
index 85b55c1dc162..ea618dd8a678 100644
--- a/arch/x86/events/core.c
+++ b/arch/x86/events/core.c
@@ -134,7 +134,7 @@ u64 x86_perf_event_update(struct perf_event *event)
 	 */
 	prev_raw_count = local64_read(&hwc->prev_count);
 	do {
-		rdpmcl(hwc->event_base_rdpmc, new_raw_count);
+		rdpmc(hwc->event_base_rdpmc, new_raw_count);
 	} while (!local64_try_cmpxchg(&hwc->prev_count,
 				      &prev_raw_count, new_raw_count));
 
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 394fa83b537b..8ac7a03ae4e9 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -2724,12 +2724,12 @@ static u64 intel_update_topdown_event(struct perf_event *event, int metric_end,
 
 	if (!val) {
 		/* read Fixed counter 3 */
-		rdpmcl((3 | INTEL_PMC_FIXED_RDPMC_BASE), slots);
+		rdpmc((3 | INTEL_PMC_FIXED_RDPMC_BASE), slots);
 		if (!slots)
 			return 0;
 
 		/* read PERF_METRICS */
-		rdpmcl(INTEL_PMC_FIXED_RDPMC_METRICS, metrics);
+		rdpmc(INTEL_PMC_FIXED_RDPMC_METRICS, metrics);
 	} else {
 		slots = val[0];
 		metrics = val[1];
diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
index 410a8975d1b9..be05e93b48e7 100644
--- a/arch/x86/events/intel/ds.c
+++ b/arch/x86/events/intel/ds.c
@@ -2274,7 +2274,7 @@ intel_pmu_save_and_restart_reload(struct perf_event *event, int count)
 	WARN_ON(this_cpu_read(cpu_hw_events.enabled));
 
 	prev_raw_count = local64_read(&hwc->prev_count);
-	rdpmcl(hwc->event_base_rdpmc, new_raw_count);
+	rdpmc(hwc->event_base_rdpmc, new_raw_count);
 	local64_set(&hwc->prev_count, new_raw_count);
 
 	/*
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index e05466e486fc..ae96d35e0621 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -234,7 +234,7 @@ static inline int rdmsrq_safe(u32 msr, u64 *p)
 	return err;
 }
 
-#define rdpmcl(counter, val) ((val) = native_read_pmc(counter))
+#define rdpmc(counter, val) ((val) = native_read_pmc(counter))
 
 #endif	/* !CONFIG_PARAVIRT_XXL */
 
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index c4dedb984735..faa0713553b1 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -244,7 +244,7 @@ static inline u64 paravirt_read_pmc(int counter)
 	return PVOP_CALL1(u64, cpu.read_pmc, counter);
 }
 
-#define rdpmcl(counter, val) ((val) = paravirt_read_pmc(counter))
+#define rdpmc(counter, val) ((val) = paravirt_read_pmc(counter))
 
 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
 {
diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
index 26c354bdea07..15ff62d83bd8 100644
--- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
+++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
@@ -1019,8 +1019,8 @@ static int measure_residency_fn(struct perf_event_attr *miss_attr,
 	 * used in L1 cache, second to capture accurate value that does not
 	 * include cache misses incurred because of instruction loads.
 	 */
-	rdpmcl(hit_pmcnum, hits_before);
-	rdpmcl(miss_pmcnum, miss_before);
+	rdpmc(hit_pmcnum, hits_before);
+	rdpmc(miss_pmcnum, miss_before);
 	/*
 	 * From SDM: Performing back-to-back fast reads are not guaranteed
 	 * to be monotonic.
@@ -1028,8 +1028,8 @@ static int measure_residency_fn(struct perf_event_attr *miss_attr,
 	 * before proceeding.
 	 */
 	rmb();
-	rdpmcl(hit_pmcnum, hits_before);
-	rdpmcl(miss_pmcnum, miss_before);
+	rdpmc(hit_pmcnum, hits_before);
+	rdpmc(miss_pmcnum, miss_before);
 	/*
 	 * Use LFENCE to ensure all previous instructions are retired
 	 * before proceeding.
@@ -1051,8 +1051,8 @@ static int measure_residency_fn(struct perf_event_attr *miss_attr,
 	 * before proceeding.
 	 */
 	rmb();
-	rdpmcl(hit_pmcnum, hits_after);
-	rdpmcl(miss_pmcnum, miss_after);
+	rdpmc(hit_pmcnum, hits_after);
+	rdpmc(miss_pmcnum, miss_after);
 	/*
 	 * Use LFENCE to ensure all previous instructions are retired
 	 * before proceeding.
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
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Subject: [PATCH v3 11/14] x86/xen/msr: Remove the error pointer argument from set_seg()
Date: Fri, 25 Apr 2025 01:34:34 -0700
Message-ID: <20250425083442.2390017-12-xin@zytor.com>
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set_seg() is used to write the following MSRs on Xen:

    MSR_FS_BASE
    MSR_KERNEL_GS_BASE
    MSR_GS_BASE

But none of these MSRs are written using any MSR write safe API.
Therefore there is no need to pass an error pointer argument to
set_seg() for returning an error code to be used in MSR safe APIs.

Remove the error pointer argument.

Signed-off-by: Xin Li (Intel) 
Reviewed-by: Juergen Gross 
---

Change in v3:
*) Fix a typo: set_reg() => set_seg() (Juergen Gross).
---
 arch/x86/xen/enlighten_pv.c | 16 +++++-----------
 1 file changed, 5 insertions(+), 11 deletions(-)

diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c
index 528a2f4df050..c247e7689bc3 100644
--- a/arch/x86/xen/enlighten_pv.c
+++ b/arch/x86/xen/enlighten_pv.c
@@ -1110,17 +1110,11 @@ static u64 xen_do_read_msr(unsigned int msr, int *err)
 	return val;
 }
 
-static void set_seg(unsigned int which, unsigned int low, unsigned int high,
-		    int *err)
+static void set_seg(u32 which, u32 low, u32 high)
 {
 	u64 base = ((u64)high << 32) | low;
 
-	if (HYPERVISOR_set_segment_base(which, base) == 0)
-		return;
-
-	if (err)
-		*err = -EIO;
-	else
+	if (HYPERVISOR_set_segment_base(which, base))
 		WARN(1, "Xen set_segment_base(%u, %llx) failed\n", which, base);
 }
 
@@ -1136,15 +1130,15 @@ static void xen_do_write_msr(unsigned int msr, unsigned int low,
 
 	switch (msr) {
 	case MSR_FS_BASE:
-		set_seg(SEGBASE_FS, low, high, err);
+		set_seg(SEGBASE_FS, low, high);
 		break;
 
 	case MSR_KERNEL_GS_BASE:
-		set_seg(SEGBASE_GS_USER, low, high, err);
+		set_seg(SEGBASE_GS_USER, low, high);
 		break;
 
 	case MSR_GS_BASE:
-		set_seg(SEGBASE_GS_KERNEL, low, high, err);
+		set_seg(SEGBASE_GS_KERNEL, low, high);
 		break;
 
 	case MSR_STAR:
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
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Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
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        wei.liu@kernel.org, ajay.kaher@broadcom.com,
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        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com,
        dapeng1.mi@linux.intel.com
Subject: [PATCH v3 12/14] x86/pvops/msr: refactor pv_cpu_ops.write_msr{,_safe}()
Date: Fri, 25 Apr 2025 01:34:35 -0700
Message-ID: <20250425083442.2390017-13-xin@zytor.com>
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In-Reply-To: <20250425083442.2390017-1-xin@zytor.com>
References: <20250425083442.2390017-1-xin@zytor.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit

An MSR value is represented as a 64-bit unsigned integer, with existing
MSR instructions storing it in EDX:EAX as two 32-bit segments.

The new immediate form MSR instructions, however, utilize a 64-bit
general-purpose register to store the MSR value.  To unify the usage of
all MSR instructions, let the default MSR access APIs accept an MSR
value as a single 64-bit argument instead of two 32-bit segments.

The dual 32-bit APIs are still available as convenient wrappers over the
APIs that handle an MSR value as a single 64-bit argument.

The following illustrates the updated derivation of the MSR write APIs:

                 __wrmsrq(u32 msr, u64 val)
                   /                  \
                  /                    \
           native_wrmsrq(msr, val)    native_wrmsr(msr, low, high)
                 |
                 |
           native_write_msr(msr, val)
                /          \
               /            \
       wrmsrq(msr, val)    wrmsr(msr, low, high)

When CONFIG_PARAVIRT is enabled, wrmsrq() and wrmsr() are defined on top
of paravirt_write_msr():

            paravirt_write_msr(u32 msr, u64 val)
               /             \
              /               \
          wrmsrq(msr, val)    wrmsr(msr, low, high)

paravirt_write_msr() invokes cpu.write_msr(msr, val), an indirect layer
of pv_ops MSR write call:

    If on native:

            cpu.write_msr = native_write_msr

    If on Xen:

            cpu.write_msr = xen_write_msr

Therefore, refactor pv_cpu_ops.write_msr{_safe}() to accept an MSR value
in a single u64 argument, replacing the current dual u32 arguments.

No functional change intended.

Signed-off-by: Xin Li (Intel) 
Reviewed-by: Juergen Gross 
---

Change in v2:
* Spell out the reason why use a single u64 argument to pass the MSR
  value in the lowest level APIs (Andrew Cooper).
---
 arch/x86/include/asm/msr.h            | 35 ++++++++++++---------------
 arch/x86/include/asm/paravirt.h       | 27 +++++++++++----------
 arch/x86/include/asm/paravirt_types.h |  4 +--
 arch/x86/kernel/kvmclock.c            |  2 +-
 arch/x86/kvm/svm/svm.c                | 15 +++---------
 arch/x86/xen/enlighten_pv.c           | 30 +++++++++--------------
 6 files changed, 46 insertions(+), 67 deletions(-)

diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 7b9713a49d59..0392b9596107 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -92,12 +92,12 @@ static __always_inline u64 __rdmsr(u32 msr)
 	return EAX_EDX_VAL(val, low, high);
 }
 
-static __always_inline void __wrmsr(u32 msr, u32 low, u32 high)
+static __always_inline void __wrmsrq(u32 msr, u64 val)
 {
 	asm volatile("1: wrmsr\n"
 		     "2:\n"
 		     _ASM_EXTABLE_TYPE(1b, 2b, EX_TYPE_WRMSR)
-		     : : "c" (msr), "a"(low), "d" (high) : "memory");
+		     : : "c" (msr), "a" ((u32)val), "d" ((u32)(val >> 32)) : "memory");
 }
 
 #define native_rdmsr(msr, val1, val2)			\
@@ -113,11 +113,10 @@ static __always_inline u64 native_rdmsrq(u32 msr)
 }
 
 #define native_wrmsr(msr, low, high)			\
-	__wrmsr(msr, low, high)
+	__wrmsrq((msr), (u64)(high) << 32 | (low))
 
 #define native_wrmsrq(msr, val)				\
-	__wrmsr((msr), (u32)((u64)(val)),		\
-		       (u32)((u64)(val) >> 32))
+	__wrmsrq((msr), (val))
 
 static inline u64 native_read_msr(u32 msr)
 {
@@ -146,11 +145,8 @@ static inline u64 native_read_msr_safe(u32 msr, int *err)
 }
 
 /* Can be uninlined because referenced by paravirt */
-static inline void notrace
-native_write_msr(u32 msr, u32 low, u32 high)
+static inline void notrace native_write_msr(u32 msr, u64 val)
 {
-	u64 val = (u64)high << 32 | low;
-
 	native_wrmsrq(msr, val);
 
 	if (tracepoint_enabled(write_msr))
@@ -158,8 +154,7 @@ native_write_msr(u32 msr, u32 low, u32 high)
 }
 
 /* Can be uninlined because referenced by paravirt */
-static inline int notrace
-native_write_msr_safe(u32 msr, u32 low, u32 high)
+static inline int notrace native_write_msr_safe(u32 msr, u64 val)
 {
 	int err;
 
@@ -167,10 +162,10 @@ native_write_msr_safe(u32 msr, u32 low, u32 high)
 		     "2:\n\t"
 		     _ASM_EXTABLE_TYPE_REG(1b, 2b, EX_TYPE_WRMSR_SAFE, %[err])
 		     : [err] "=a" (err)
-		     : "c" (msr), "0" (low), "d" (high)
+		     : "c" (msr), "0" ((u32)val), "d" ((u32)(val >> 32))
 		     : "memory");
 	if (tracepoint_enabled(write_msr))
-		do_trace_write_msr(msr, ((u64)high << 32 | low), err);
+		do_trace_write_msr(msr, val, err);
 	return err;
 }
 
@@ -206,7 +201,7 @@ do {								\
 
 static inline void wrmsr(u32 msr, u32 low, u32 high)
 {
-	native_write_msr(msr, low, high);
+	native_write_msr(msr, (u64)high << 32 | low);
 }
 
 #define rdmsrq(msr, val)			\
@@ -214,13 +209,13 @@ static inline void wrmsr(u32 msr, u32 low, u32 high)
 
 static inline void wrmsrq(u32 msr, u64 val)
 {
-	native_write_msr(msr, (u32)(val & 0xffffffffULL), (u32)(val >> 32));
+	native_write_msr(msr, val);
 }
 
 /* wrmsr with exception handling */
-static inline int wrmsr_safe(u32 msr, u32 low, u32 high)
+static inline int wrmsrq_safe(u32 msr, u64 val)
 {
-	return native_write_msr_safe(msr, low, high);
+	return native_write_msr_safe(msr, val);
 }
 
 /* rdmsr with exception handling */
@@ -264,11 +259,11 @@ static __always_inline void wrmsrns(u32 msr, u64 val)
 }
 
 /*
- * 64-bit version of wrmsr_safe():
+ * Dual u32 version of wrmsrq_safe():
  */
-static inline int wrmsrq_safe(u32 msr, u64 val)
+static inline int wrmsr_safe(u32 msr, u32 low, u32 high)
 {
-	return wrmsr_safe(msr, (u32)val,  (u32)(val >> 32));
+	return wrmsrq_safe(msr, (u64)high << 32 | low);
 }
 
 struct msr __percpu *msrs_alloc(void);
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index f272c4bd3d5b..edf23bde367e 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -180,10 +180,9 @@ static inline u64 paravirt_read_msr(unsigned msr)
 	return PVOP_CALL1(u64, cpu.read_msr, msr);
 }
 
-static inline void paravirt_write_msr(unsigned msr,
-				      unsigned low, unsigned high)
+static inline void paravirt_write_msr(u32 msr, u64 val)
 {
-	PVOP_VCALL3(cpu.write_msr, msr, low, high);
+	PVOP_VCALL2(cpu.write_msr, msr, val);
 }
 
 static inline u64 paravirt_read_msr_safe(unsigned msr, int *err)
@@ -191,10 +190,9 @@ static inline u64 paravirt_read_msr_safe(unsigned msr, int *err)
 	return PVOP_CALL2(u64, cpu.read_msr_safe, msr, err);
 }
 
-static inline int paravirt_write_msr_safe(unsigned msr,
-					  unsigned low, unsigned high)
+static inline int paravirt_write_msr_safe(u32 msr, u64 val)
 {
-	return PVOP_CALL3(int, cpu.write_msr_safe, msr, low, high);
+	return PVOP_CALL2(int, cpu.write_msr_safe, msr, val);
 }
 
 #define rdmsr(msr, val1, val2)			\
@@ -204,22 +202,25 @@ do {						\
 	val2 = _l >> 32;			\
 } while (0)
 
-#define wrmsr(msr, val1, val2)			\
-do {						\
-	paravirt_write_msr(msr, val1, val2);	\
-} while (0)
+static __always_inline void wrmsr(u32 msr, u32 low, u32 high)
+{
+	paravirt_write_msr(msr, (u64)high << 32 | low);
+}
 
 #define rdmsrq(msr, val)			\
 do {						\
 	val = paravirt_read_msr(msr);		\
 } while (0)
 
-static inline void wrmsrq(unsigned msr, u64 val)
+static inline void wrmsrq(u32 msr, u64 val)
 {
-	wrmsr(msr, (u32)val, (u32)(val>>32));
+	paravirt_write_msr(msr, val);
 }
 
-#define wrmsr_safe(msr, a, b)	paravirt_write_msr_safe(msr, a, b)
+static inline int wrmsrq_safe(u32 msr, u64 val)
+{
+	return paravirt_write_msr_safe(msr, val);
+}
 
 /* rdmsr with exception handling */
 #define rdmsr_safe(msr, a, b)				\
diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/paravirt_types.h
index 631c306ce1ff..78777b78da12 100644
--- a/arch/x86/include/asm/paravirt_types.h
+++ b/arch/x86/include/asm/paravirt_types.h
@@ -92,14 +92,14 @@ struct pv_cpu_ops {
 
 	/* Unsafe MSR operations.  These will warn or panic on failure. */
 	u64 (*read_msr)(unsigned int msr);
-	void (*write_msr)(unsigned int msr, unsigned low, unsigned high);
+	void (*write_msr)(u32 msr, u64 val);
 
 	/*
 	 * Safe MSR operations.
 	 * read sets err to 0 or -EIO.  write returns 0 or -EIO.
 	 */
 	u64 (*read_msr_safe)(unsigned int msr, int *err);
-	int (*write_msr_safe)(unsigned int msr, unsigned low, unsigned high);
+	int (*write_msr_safe)(u32 msr, u64 val);
 
 	u64 (*read_pmc)(int counter);
 
diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c
index 0af797930ccb..ca0a49eeac4a 100644
--- a/arch/x86/kernel/kvmclock.c
+++ b/arch/x86/kernel/kvmclock.c
@@ -196,7 +196,7 @@ static void kvm_setup_secondary_clock(void)
 void kvmclock_disable(void)
 {
 	if (msr_kvm_system_time)
-		native_write_msr(msr_kvm_system_time, 0, 0);
+		native_write_msr(msr_kvm_system_time, 0);
 }
 
 static void __init kvmclock_init_mem(void)
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index 67657b3a36ce..4ef9978dce70 100644
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -475,7 +475,6 @@ static void svm_inject_exception(struct kvm_vcpu *vcpu)
 
 static void svm_init_erratum_383(void)
 {
-	u32 low, high;
 	int err;
 	u64 val;
 
@@ -489,10 +488,7 @@ static void svm_init_erratum_383(void)
 
 	val |= (1ULL << 47);
 
-	low  = lower_32_bits(val);
-	high = upper_32_bits(val);
-
-	native_write_msr_safe(MSR_AMD64_DC_CFG, low, high);
+	native_write_msr_safe(MSR_AMD64_DC_CFG, val);
 
 	erratum_383_found = true;
 }
@@ -2167,17 +2163,12 @@ static bool is_erratum_383(void)
 
 	/* Clear MCi_STATUS registers */
 	for (i = 0; i < 6; ++i)
-		native_write_msr_safe(MSR_IA32_MCx_STATUS(i), 0, 0);
+		native_write_msr_safe(MSR_IA32_MCx_STATUS(i), 0);
 
 	value = native_read_msr_safe(MSR_IA32_MCG_STATUS, &err);
 	if (!err) {
-		u32 low, high;
-
 		value &= ~(1ULL << 2);
-		low    = lower_32_bits(value);
-		high   = upper_32_bits(value);
-
-		native_write_msr_safe(MSR_IA32_MCG_STATUS, low, high);
+		native_write_msr_safe(MSR_IA32_MCG_STATUS, value);
 	}
 
 	/* Flush tlb to evict multi-match entries */
diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c
index c247e7689bc3..c067d1e8a39c 100644
--- a/arch/x86/xen/enlighten_pv.c
+++ b/arch/x86/xen/enlighten_pv.c
@@ -1110,10 +1110,8 @@ static u64 xen_do_read_msr(unsigned int msr, int *err)
 	return val;
 }
 
-static void set_seg(u32 which, u32 low, u32 high)
+static void set_seg(u32 which, u64 base)
 {
-	u64 base = ((u64)high << 32) | low;
-
 	if (HYPERVISOR_set_segment_base(which, base))
 		WARN(1, "Xen set_segment_base(%u, %llx) failed\n", which, base);
 }
@@ -1123,22 +1121,19 @@ static void set_seg(u32 which, u32 low, u32 high)
  * With err == NULL write_msr() semantics are selected.
  * Supplying an err pointer requires err to be pre-initialized with 0.
  */
-static void xen_do_write_msr(unsigned int msr, unsigned int low,
-			     unsigned int high, int *err)
+static void xen_do_write_msr(u32 msr, u64 val, int *err)
 {
-	u64 val;
-
 	switch (msr) {
 	case MSR_FS_BASE:
-		set_seg(SEGBASE_FS, low, high);
+		set_seg(SEGBASE_FS, val);
 		break;
 
 	case MSR_KERNEL_GS_BASE:
-		set_seg(SEGBASE_GS_USER, low, high);
+		set_seg(SEGBASE_GS_USER, val);
 		break;
 
 	case MSR_GS_BASE:
-		set_seg(SEGBASE_GS_KERNEL, low, high);
+		set_seg(SEGBASE_GS_KERNEL, val);
 		break;
 
 	case MSR_STAR:
@@ -1154,15 +1149,13 @@ static void xen_do_write_msr(unsigned int msr, unsigned int low,
 		break;
 
 	default:
-		val = (u64)high << 32 | low;
-
 		if (pmu_msr_chk_emulated(msr, &val, false))
 			return;
 
 		if (err)
-			*err = native_write_msr_safe(msr, low, high);
+			*err = native_write_msr_safe(msr, val);
 		else
-			native_write_msr(msr, low, high);
+			native_write_msr(msr, val);
 	}
 }
 
@@ -1171,12 +1164,11 @@ static u64 xen_read_msr_safe(unsigned int msr, int *err)
 	return xen_do_read_msr(msr, err);
 }
 
-static int xen_write_msr_safe(unsigned int msr, unsigned int low,
-			      unsigned int high)
+static int xen_write_msr_safe(u32 msr, u64 val)
 {
 	int err = 0;
 
-	xen_do_write_msr(msr, low, high, &err);
+	xen_do_write_msr(msr, val, &err);
 
 	return err;
 }
@@ -1188,11 +1180,11 @@ static u64 xen_read_msr(unsigned int msr)
 	return xen_do_read_msr(msr, xen_msr_safe ? &err : NULL);
 }
 
-static void xen_write_msr(unsigned int msr, unsigned low, unsigned high)
+static void xen_write_msr(u32 msr, u64 val)
 {
 	int err;
 
-	xen_do_write_msr(msr, low, high, xen_msr_safe ? &err : NULL);
+	xen_do_write_msr(msr, val, xen_msr_safe ? &err : NULL);
 }
 
 /* This is called once we have the cpu_possible_mask */
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
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        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
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        haiyangz@microsoft.com, decui@microsoft.com,
        dapeng1.mi@linux.intel.com
Subject: [PATCH v3 13/14] x86/msr: Replace wrmsr(msr, low, 0) with wrmsrq(msr, low)
Date: Fri, 25 Apr 2025 01:34:36 -0700
Message-ID: <20250425083442.2390017-14-xin@zytor.com>
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The third argument in wrmsr(msr, low, 0) is unnecessary.  Instead, use
wrmsrq(msr, low), which automatically sets the higher 32 bits of the
MSR value to 0.

Signed-off-by: Xin Li (Intel) 
---
 arch/x86/hyperv/hv_apic.c                 | 6 +++---
 arch/x86/include/asm/apic.h               | 2 +-
 arch/x86/include/asm/switch_to.h          | 2 +-
 arch/x86/kernel/cpu/amd.c                 | 2 +-
 arch/x86/kernel/cpu/common.c              | 8 ++++----
 arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 4 ++--
 arch/x86/kernel/cpu/resctrl/rdtgroup.c    | 2 +-
 arch/x86/kernel/cpu/umwait.c              | 4 ++--
 arch/x86/kernel/kvm.c                     | 2 +-
 9 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/arch/x86/hyperv/hv_apic.c b/arch/x86/hyperv/hv_apic.c
index c450e67cb0a4..4d617ee59377 100644
--- a/arch/x86/hyperv/hv_apic.c
+++ b/arch/x86/hyperv/hv_apic.c
@@ -75,10 +75,10 @@ static void hv_apic_write(u32 reg, u32 val)
 {
 	switch (reg) {
 	case APIC_EOI:
-		wrmsr(HV_X64_MSR_EOI, val, 0);
+		wrmsrq(HV_X64_MSR_EOI, val);
 		break;
 	case APIC_TASKPRI:
-		wrmsr(HV_X64_MSR_TPR, val, 0);
+		wrmsrq(HV_X64_MSR_TPR, val);
 		break;
 	default:
 		native_apic_mem_write(reg, val);
@@ -92,7 +92,7 @@ static void hv_apic_eoi_write(void)
 	if (hvp && (xchg(&hvp->apic_assist, 0) & 0x1))
 		return;
 
-	wrmsr(HV_X64_MSR_EOI, APIC_EOI_ACK, 0);
+	wrmsrq(HV_X64_MSR_EOI, APIC_EOI_ACK);
 }
 
 static bool cpu_is_self(int cpu)
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index 0174dd548327..68e10e30fe9b 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -209,7 +209,7 @@ static inline void native_apic_msr_write(u32 reg, u32 v)
 	    reg == APIC_LVR)
 		return;
 
-	wrmsr(APIC_BASE_MSR + (reg >> 4), v, 0);
+	wrmsrq(APIC_BASE_MSR + (reg >> 4), v);
 }
 
 static inline void native_apic_msr_eoi(void)
diff --git a/arch/x86/include/asm/switch_to.h b/arch/x86/include/asm/switch_to.h
index 4f21df7af715..499b1c15cc8b 100644
--- a/arch/x86/include/asm/switch_to.h
+++ b/arch/x86/include/asm/switch_to.h
@@ -61,7 +61,7 @@ static inline void refresh_sysenter_cs(struct thread_struct *thread)
 		return;
 
 	this_cpu_write(cpu_tss_rw.x86_tss.ss1, thread->sysenter_cs);
-	wrmsr(MSR_IA32_SYSENTER_CS, thread->sysenter_cs, 0);
+	wrmsrq(MSR_IA32_SYSENTER_CS, thread->sysenter_cs);
 }
 #endif
 
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 0bbe79862aa6..5e28ec2fe4e8 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -1200,7 +1200,7 @@ void amd_set_dr_addr_mask(unsigned long mask, unsigned int dr)
 	if (per_cpu(amd_dr_addr_mask, cpu)[dr] == mask)
 		return;
 
-	wrmsr(amd_msr_dr_addr_masks[dr], mask, 0);
+	wrmsrq(amd_msr_dr_addr_masks[dr], mask);
 	per_cpu(amd_dr_addr_mask, cpu)[dr] = mask;
 }
 
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index cefc99990bde..ef9751d577c3 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1982,9 +1982,9 @@ void enable_sep_cpu(void)
 	 */
 
 	tss->x86_tss.ss1 = __KERNEL_CS;
-	wrmsr(MSR_IA32_SYSENTER_CS, tss->x86_tss.ss1, 0);
-	wrmsr(MSR_IA32_SYSENTER_ESP, (unsigned long)(cpu_entry_stack(cpu) + 1), 0);
-	wrmsr(MSR_IA32_SYSENTER_EIP, (unsigned long)entry_SYSENTER_32, 0);
+	wrmsrq(MSR_IA32_SYSENTER_CS, tss->x86_tss.ss1);
+	wrmsrq(MSR_IA32_SYSENTER_ESP, (unsigned long)(cpu_entry_stack(cpu) + 1));
+	wrmsrq(MSR_IA32_SYSENTER_EIP, (unsigned long)entry_SYSENTER_32);
 
 	put_cpu();
 }
@@ -2198,7 +2198,7 @@ static inline void setup_getcpu(int cpu)
 	struct desc_struct d = { };
 
 	if (boot_cpu_has(X86_FEATURE_RDTSCP) || boot_cpu_has(X86_FEATURE_RDPID))
-		wrmsr(MSR_TSC_AUX, cpudata, 0);
+		wrmsrq(MSR_TSC_AUX, cpudata);
 
 	/* Store CPU and node number in limit. */
 	d.limit0 = cpudata;
diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
index 324bd4919300..1190c48a16b2 100644
--- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
+++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
@@ -905,7 +905,7 @@ int resctrl_arch_measure_cycles_lat_fn(void *_plr)
 	 * Disable hardware prefetchers.
 	 */
 	rdmsr(MSR_MISC_FEATURE_CONTROL, saved_low, saved_high);
-	wrmsr(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits, 0x0);
+	wrmsrq(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits);
 	mem_r = READ_ONCE(plr->kmem);
 	/*
 	 * Dummy execute of the time measurement to load the needed
@@ -1001,7 +1001,7 @@ static int measure_residency_fn(struct perf_event_attr *miss_attr,
 	 * Disable hardware prefetchers.
 	 */
 	rdmsr(MSR_MISC_FEATURE_CONTROL, saved_low, saved_high);
-	wrmsr(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits, 0x0);
+	wrmsrq(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits);
 
 	/* Initialize rest of local variables */
 	/*
diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c
index 26f4d820ee6e..2ec6d7d843c5 100644
--- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c
+++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c
@@ -1707,7 +1707,7 @@ void resctrl_arch_mon_event_config_write(void *_config_info)
 		pr_warn_once("Invalid event id %d\n", config_info->evtid);
 		return;
 	}
-	wrmsr(MSR_IA32_EVT_CFG_BASE + index, config_info->mon_config, 0);
+	wrmsrq(MSR_IA32_EVT_CFG_BASE + index, config_info->mon_config);
 }
 
 static void mbm_config_write_domain(struct rdt_resource *r,
diff --git a/arch/x86/kernel/cpu/umwait.c b/arch/x86/kernel/cpu/umwait.c
index 0050eae153bb..933fcd7ff250 100644
--- a/arch/x86/kernel/cpu/umwait.c
+++ b/arch/x86/kernel/cpu/umwait.c
@@ -33,7 +33,7 @@ static DEFINE_MUTEX(umwait_lock);
 static void umwait_update_control_msr(void * unused)
 {
 	lockdep_assert_irqs_disabled();
-	wrmsr(MSR_IA32_UMWAIT_CONTROL, READ_ONCE(umwait_control_cached), 0);
+	wrmsrq(MSR_IA32_UMWAIT_CONTROL, READ_ONCE(umwait_control_cached));
 }
 
 /*
@@ -71,7 +71,7 @@ static int umwait_cpu_offline(unsigned int cpu)
 	 * the original control MSR value in umwait_init(). So there
 	 * is no race condition here.
 	 */
-	wrmsr(MSR_IA32_UMWAIT_CONTROL, orig_umwait_control_cached, 0);
+	wrmsrq(MSR_IA32_UMWAIT_CONTROL, orig_umwait_control_cached);
 
 	return 0;
 }
diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c
index 44a45df7200a..bc9d21d7395f 100644
--- a/arch/x86/kernel/kvm.c
+++ b/arch/x86/kernel/kvm.c
@@ -399,7 +399,7 @@ static void kvm_disable_steal_time(void)
 	if (!has_steal_clock)
 		return;
 
-	wrmsr(MSR_KVM_STEAL_TIME, 0, 0);
+	wrmsrq(MSR_KVM_STEAL_TIME, 0);
 }
 
 static u64 kvm_steal_clock(int cpu)
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
        pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com,
        dapeng1.mi@linux.intel.com
Subject: [PATCH v3 14/14] x86/msr: Change the function type of native_read_msr_safe()
Date: Fri, 25 Apr 2025 01:34:37 -0700
Message-ID: <20250425083442.2390017-15-xin@zytor.com>
X-Mailer: git-send-email 2.49.0
In-Reply-To: <20250425083442.2390017-1-xin@zytor.com>
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MIME-Version: 1.0
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Modify the function type of native_read_msr_safe() to:

    int native_read_msr_safe(u32 msr, u64 *val)

This change makes the function return an error code instead of the
MSR value, aligning it with the type of native_write_msr_safe().
Consequently, their callers can check the results in the same way.

While at it, convert leftover MSR data type "unsigned int" to u32.

Signed-off-by: Xin Li (Intel) 
---
 arch/x86/include/asm/msr.h            | 21 +++++++++++----------
 arch/x86/include/asm/paravirt.h       | 19 ++++++++-----------
 arch/x86/include/asm/paravirt_types.h |  6 +++---
 arch/x86/kvm/svm/svm.c                | 19 +++++++------------
 arch/x86/xen/enlighten_pv.c           | 13 ++++++++-----
 arch/x86/xen/pmu.c                    | 14 ++++++++------
 6 files changed, 45 insertions(+), 47 deletions(-)

diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 0392b9596107..e7ee51ccd82e 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -130,18 +130,22 @@ static inline u64 native_read_msr(u32 msr)
 	return val;
 }
 
-static inline u64 native_read_msr_safe(u32 msr, int *err)
+static inline int native_read_msr_safe(u32 msr, u64 *p)
 {
+	int err;
 	DECLARE_ARGS(val, low, high);
 
 	asm volatile("1: rdmsr ; xor %[err],%[err]\n"
 		     "2:\n\t"
 		     _ASM_EXTABLE_TYPE_REG(1b, 2b, EX_TYPE_RDMSR_SAFE, %[err])
-		     : [err] "=r" (*err), EAX_EDX_RET(val, low, high)
+		     : [err] "=r" (err), EAX_EDX_RET(val, low, high)
 		     : "c" (msr));
 	if (tracepoint_enabled(read_msr))
-		do_trace_read_msr(msr, EAX_EDX_VAL(val, low, high), *err);
-	return EAX_EDX_VAL(val, low, high);
+		do_trace_read_msr(msr, EAX_EDX_VAL(val, low, high), err);
+
+	*p = EAX_EDX_VAL(val, low, high);
+
+	return err;
 }
 
 /* Can be uninlined because referenced by paravirt */
@@ -221,8 +225,8 @@ static inline int wrmsrq_safe(u32 msr, u64 val)
 /* rdmsr with exception handling */
 #define rdmsr_safe(msr, low, high)				\
 ({								\
-	int __err;						\
-	u64 __val = native_read_msr_safe((msr), &__err);	\
+	u64 __val;						\
+	int __err = native_read_msr_safe((msr), &__val);	\
 	(*low) = (u32)__val;					\
 	(*high) = (u32)(__val >> 32);				\
 	__err;							\
@@ -230,10 +234,7 @@ static inline int wrmsrq_safe(u32 msr, u64 val)
 
 static inline int rdmsrq_safe(u32 msr, u64 *p)
 {
-	int err;
-
-	*p = native_read_msr_safe(msr, &err);
-	return err;
+	return native_read_msr_safe(msr, p);
 }
 
 static __always_inline u64 rdpmc(int counter)
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index edf23bde367e..03f680d1057a 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -175,7 +175,7 @@ static inline void __write_cr4(unsigned long x)
 	PVOP_VCALL1(cpu.write_cr4, x);
 }
 
-static inline u64 paravirt_read_msr(unsigned msr)
+static inline u64 paravirt_read_msr(u32 msr)
 {
 	return PVOP_CALL1(u64, cpu.read_msr, msr);
 }
@@ -185,9 +185,9 @@ static inline void paravirt_write_msr(u32 msr, u64 val)
 	PVOP_VCALL2(cpu.write_msr, msr, val);
 }
 
-static inline u64 paravirt_read_msr_safe(unsigned msr, int *err)
+static inline int paravirt_read_msr_safe(u32 msr, u64 *val)
 {
-	return PVOP_CALL2(u64, cpu.read_msr_safe, msr, err);
+	return PVOP_CALL2(int, cpu.read_msr_safe, msr, val);
 }
 
 static inline int paravirt_write_msr_safe(u32 msr, u64 val)
@@ -225,19 +225,16 @@ static inline int wrmsrq_safe(u32 msr, u64 val)
 /* rdmsr with exception handling */
 #define rdmsr_safe(msr, a, b)				\
 ({							\
-	int _err;					\
-	u64 _l = paravirt_read_msr_safe(msr, &_err);	\
+	u64 _l;						\
+	int _err = paravirt_read_msr_safe((msr), &_l);	\
 	(*a) = (u32)_l;					\
-	(*b) = _l >> 32;				\
+	(*b) = (u32)(_l >> 32);				\
 	_err;						\
 })
 
-static inline int rdmsrq_safe(unsigned msr, u64 *p)
+static __always_inline int rdmsrq_safe(u32 msr, u64 *p)
 {
-	int err;
-
-	*p = paravirt_read_msr_safe(msr, &err);
-	return err;
+	return paravirt_read_msr_safe(msr, p);
 }
 
 static __always_inline u64 rdpmc(int counter)
diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/paravirt_types.h
index 78777b78da12..b08b9d3122d6 100644
--- a/arch/x86/include/asm/paravirt_types.h
+++ b/arch/x86/include/asm/paravirt_types.h
@@ -91,14 +91,14 @@ struct pv_cpu_ops {
 		      unsigned int *ecx, unsigned int *edx);
 
 	/* Unsafe MSR operations.  These will warn or panic on failure. */
-	u64 (*read_msr)(unsigned int msr);
+	u64 (*read_msr)(u32 msr);
 	void (*write_msr)(u32 msr, u64 val);
 
 	/*
 	 * Safe MSR operations.
-	 * read sets err to 0 or -EIO.  write returns 0 or -EIO.
+	 * Returns 0 or -EIO.
 	 */
-	u64 (*read_msr_safe)(unsigned int msr, int *err);
+	int (*read_msr_safe)(u32 msr, u64 *val);
 	int (*write_msr_safe)(u32 msr, u64 val);
 
 	u64 (*read_pmc)(int counter);
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index 4ef9978dce70..838606f784c9 100644
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -475,15 +475,13 @@ static void svm_inject_exception(struct kvm_vcpu *vcpu)
 
 static void svm_init_erratum_383(void)
 {
-	int err;
 	u64 val;
 
 	if (!static_cpu_has_bug(X86_BUG_AMD_TLB_MMATCH))
 		return;
 
 	/* Use _safe variants to not break nested virtualization */
-	val = native_read_msr_safe(MSR_AMD64_DC_CFG, &err);
-	if (err)
+	if (native_read_msr_safe(MSR_AMD64_DC_CFG, &val))
 		return;
 
 	val |= (1ULL << 47);
@@ -648,13 +646,12 @@ static int svm_enable_virtualization_cpu(void)
 	 * erratum is present everywhere).
 	 */
 	if (cpu_has(&boot_cpu_data, X86_FEATURE_OSVW)) {
-		uint64_t len, status = 0;
+		u64 len, status = 0;
 		int err;
 
-		len = native_read_msr_safe(MSR_AMD64_OSVW_ID_LENGTH, &err);
+		err = native_read_msr_safe(MSR_AMD64_OSVW_ID_LENGTH, &len);
 		if (!err)
-			status = native_read_msr_safe(MSR_AMD64_OSVW_STATUS,
-						      &err);
+			err = native_read_msr_safe(MSR_AMD64_OSVW_STATUS, &status);
 
 		if (err)
 			osvw_status = osvw_len = 0;
@@ -2145,14 +2142,13 @@ static int ac_interception(struct kvm_vcpu *vcpu)
 
 static bool is_erratum_383(void)
 {
-	int err, i;
+	int i;
 	u64 value;
 
 	if (!erratum_383_found)
 		return false;
 
-	value = native_read_msr_safe(MSR_IA32_MC0_STATUS, &err);
-	if (err)
+	if (native_read_msr_safe(MSR_IA32_MC0_STATUS, &value))
 		return false;
 
 	/* Bit 62 may or may not be set for this mce */
@@ -2165,8 +2161,7 @@ static bool is_erratum_383(void)
 	for (i = 0; i < 6; ++i)
 		native_write_msr_safe(MSR_IA32_MCx_STATUS(i), 0);
 
-	value = native_read_msr_safe(MSR_IA32_MCG_STATUS, &err);
-	if (!err) {
+	if (!native_read_msr_safe(MSR_IA32_MCG_STATUS, &value)) {
 		value &= ~(1ULL << 2);
 		native_write_msr_safe(MSR_IA32_MCG_STATUS, value);
 	}
diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c
index c067d1e8a39c..0b2f5e679026 100644
--- a/arch/x86/xen/enlighten_pv.c
+++ b/arch/x86/xen/enlighten_pv.c
@@ -1086,7 +1086,7 @@ static void xen_write_cr4(unsigned long cr4)
 	native_write_cr4(cr4);
 }
 
-static u64 xen_do_read_msr(unsigned int msr, int *err)
+static u64 xen_do_read_msr(u32 msr, int *err)
 {
 	u64 val = 0;	/* Avoid uninitialized value for safe variant. */
 
@@ -1094,7 +1094,7 @@ static u64 xen_do_read_msr(unsigned int msr, int *err)
 		return val;
 
 	if (err)
-		val = native_read_msr_safe(msr, err);
+		*err = native_read_msr_safe(msr, &val);
 	else
 		val = native_read_msr(msr);
 
@@ -1159,9 +1159,12 @@ static void xen_do_write_msr(u32 msr, u64 val, int *err)
 	}
 }
 
-static u64 xen_read_msr_safe(unsigned int msr, int *err)
+static int xen_read_msr_safe(u32 msr, u64 *val)
 {
-	return xen_do_read_msr(msr, err);
+	int err;
+
+	*val = xen_do_read_msr(msr, &err);
+	return err;
 }
 
 static int xen_write_msr_safe(u32 msr, u64 val)
@@ -1173,7 +1176,7 @@ static int xen_write_msr_safe(u32 msr, u64 val)
 	return err;
 }
 
-static u64 xen_read_msr(unsigned int msr)
+static u64 xen_read_msr(u32 msr)
 {
 	int err;
 
diff --git a/arch/x86/xen/pmu.c b/arch/x86/xen/pmu.c
index 6bee83018694..3e704094c97c 100644
--- a/arch/x86/xen/pmu.c
+++ b/arch/x86/xen/pmu.c
@@ -317,11 +317,12 @@ static u64 xen_amd_read_pmc(int counter)
 	uint8_t xenpmu_flags = get_xenpmu_flags();
 
 	if (!xenpmu_data || !(xenpmu_flags & XENPMU_IRQ_PROCESSING)) {
-		uint32_t msr;
-		int err;
+		u32 msr;
+		u64 val;
 
 		msr = amd_counters_base + (counter * amd_msr_step);
-		return native_read_msr_safe(msr, &err);
+		native_read_msr_safe(msr, &val);
+		return val;
 	}
 
 	ctxt = &xenpmu_data->pmu.c.amd;
@@ -338,15 +339,16 @@ static u64 xen_intel_read_pmc(int counter)
 	uint8_t xenpmu_flags = get_xenpmu_flags();
 
 	if (!xenpmu_data || !(xenpmu_flags & XENPMU_IRQ_PROCESSING)) {
-		uint32_t msr;
-		int err;
+		u32 msr;
+		u64 val;
 
 		if (counter & (1 << INTEL_PMC_TYPE_SHIFT))
 			msr = MSR_CORE_PERF_FIXED_CTR0 + (counter & 0xffff);
 		else
 			msr = MSR_IA32_PERFCTR0 + counter;
 
-		return native_read_msr_safe(msr, &err);
+		native_read_msr_safe(msr, &val);
+		return val;
 	}
 
 	ctxt = &xenpmu_data->pmu.c.intel;
-- 
2.49.0



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Date: Fri, 25 Apr 2025 10:36:11 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jason Andryuk 
Cc: xen-devel@lists.xenproject.org
Subject: Re: [PATCH v2] xen/vpci: Fix msix existing mapping printk
Message-ID: 
References: <20250424212326.151403-1-jason.andryuk@amd.com>
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In-Reply-To: <20250424212326.151403-1-jason.andryuk@amd.com>

On Thu, Apr 24, 2025 at 05:23:26PM -0400, Jason Andryuk wrote:
> The format string lacks a space, so mfn and type run together:
> (XEN) d0v0 0000:06:00.7: existing mapping (mfn: 753037type: 0) at 0x1 clobbers MSIX MMIO area
> 
> Add a space.  Additionally, move the format string to a single long line
> to improve grep-ability.
> 
> Fixes: 677053fac17a ("vpci/msix: carve p2m hole for MSIX MMIO regions")
> Signed-off-by: Jason Andryuk 

Reviewed-by: Roger Pau Monné 

Thanks, Roger.


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Subject: Re: [PATCH] xen: fix buffer over-read in bitmap_to_xenctl_bitmap()
To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
Cc: xen-devel@lists.xenproject.org, Anthony PERARD
 , Michal Orzel ,
 Julien Grall , Stefano Stabellini ,
 Andrew Cooper 
References: <20250424103841.94828-1-roger.pau@citrix.com>
 <041d4bd5-962c-4600-b436-0ec214a6c6ca@citrix.com>
 
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From: Jan Beulich 
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On 24.04.2025 15:04, Roger Pau Monné wrote:
> On Thu, Apr 24, 2025 at 12:41:43PM +0100, Andrew Cooper wrote:
>> On 24/04/2025 11:38 am, Roger Pau Monne wrote:
>>> There's an off-by-one when calculating the last byte in the input array to
>>> bitmap_to_xenctl_bitmap(), which leads to bitmaps with sizes multiple of 8
>>> to over-read and incorrectly use a byte past the end of the array.
>>
>> /sigh
>>
>>> While there also ensure that bitmap_to_xenctl_bitmap() is not called with a
>>> bitmap of 0 length.
>>>
>>> Fixes: 288c4641c80d ('xen: simplify bitmap_to_xenctl_bitmap for little endian')
>>> Signed-off-by: Roger Pau Monné 
>>
>> You ought to note that this is only not getting an XSA because
>> 288c4641c80d isn't in a released Xen yet.
> 
> Yeah, I did explicitly check this wasn't backported to any stable
> branches.
> 
>>> ---
>>>  xen/common/bitmap.c | 8 +++++++-
>>>  1 file changed, 7 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/xen/common/bitmap.c b/xen/common/bitmap.c
>>> index bf1a7fd91e36..415d6bc074f6 100644
>>> --- a/xen/common/bitmap.c
>>> +++ b/xen/common/bitmap.c
>>> @@ -369,6 +369,12 @@ int bitmap_to_xenctl_bitmap(struct xenctl_bitmap *xenctl_bitmap,
>>>      const uint8_t *bytemap;
>>>      uint8_t last, *buf = NULL;
>>>  
>>> +    if ( !nbits )
>>> +    {
>>> +	ASSERT_UNREACHABLE();
>>> +	return -EILSEQ;
>>> +    }
>>
>> I don't see any hypercalls performing a bits==0 check, so I expect this
>> is reachable.
> 
> bitmap_to_xenctl_bitmap() has just two callers, one passes nr_cpu_ids,
> the other MAX_NUMNODES.  I think there are no callers that pass 0,
> much less from hypercall provided values.

Still I don't think there should be an assertion here, not even an error.
As much as memcpy(x, y, 0) is okay, it ought to be okay to invoke this
function for entirely void bitmaps.

Jan


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Date: Fri, 25 Apr 2025 11:02:28 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: "Lira, Victor M" 
Cc: Jason Andryuk ,
	Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= ,
	Stefano Stabellini ,
	xen-devel@lists.xenproject.org,
	Andrew Cooper ,
	Jan Beulich , Xenia.Ragiadakou@amd.com,
	Alejandro.GarciaVallejo@amd.com
Subject: Re: [RFC] xen/x86: allow overlaps with non-RAM regions
Message-ID: 
References: <3c5dfd26-3c12-498b-aca4-0beac4e991a5@amd.com>
 
 <9ed89e50-c645-407d-80b4-5b78cb6e36fa@amd.com>
 
 
 
 
 
 <775d3ac0-8f43-415a-a32d-14377092b96b@amd.com>
 <554026de-bbb4-488f-95c4-8e2f034d6d0e@amd.com>
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On Thu, Apr 24, 2025 at 02:38:29PM -0700, Lira, Victor M wrote:
> Hello all,
> 
> Here is the output from Roger's patch.
> This is the section of interest:
> 
> > (XEN) [ 7.547326] d0 has maximum 3328PIRQs
> > (XEN) [ 7.555644] *** Building a PVH Dom0 ***
> > (XEN) [ 7.567780] d0: identity mappings for IOMMU:
> > (XEN) [ 7.577312]  [00000000a0, 00000000ff] RW
> > (XEN) [ 7.586153]  [0000009bff, 0000009fff] RW
> > (XEN) [ 7.594992]  [00000cabc9, 00000cc14c] RW
> > (XEN) [ 7.603866]  [00000cc389, 00000cc389] RW
> > (XEN) [ 7.612707]  [00000cc70a, 00000cd1fe] RW
> > (XEN) [ 7.621896]  [00000ce000, 00000cffff] RW
> > (XEN) [ 7.630731]  [00000fd000, 00000fd2ff] RW
> > (XEN) [ 7.639573]  [00000fd304, 00000febff] RW
> > (XEN) [ 7.648414] gfn 0xfe800mfn 0xfe800type 5order 9
> > (XEN) [ 7.658985] Xen WARNat arch/x86/mm/p2m-pt.c:599
> > (XEN) [ 7.669215] ----[ Xen-4.21-unstable x86_64  debug=y  Tainted:   C
> >    ]----
> > ...
> > (XEN) [ 8.227521] Xen call trace:
> > (XEN) [ 8.234107]    [] R
> > arch/x86/mm/p2m-pt.c#p2m_pt_set_entry+0xc1/0x961
> > (XEN) [ 8.250925]    [] F p2m_set_entry+0xb5/0x13c
> > (XEN) [ 8.263579]    [] F
> > arch/x86/mm/p2m.c#set_typed_p2m_entry+0xfd/0x6f0
> > (XEN) [ 8.280388]    [] F set_mmio_p2m_entry+0x62/0x6b
> > (XEN) [ 8.293735]    [] F map_mmio_regions+0x77/0xcf
> > (XEN) [ 8.306734]    [] F
> > drivers/passthrough/x86/iommu.c#identity_map+0x7e/0x196
> > (XEN) [ 8.324761]    [] F
> > rangeset_report_ranges+0x10a/0x159
> > (XEN) [ 8.339149]    [] F
> > arch_iommu_hwdom_init+0x27f/0x316
> > (XEN) [ 8.353361]    [] F
> > drivers/passthrough/amd/pci_amd_iommu.c#amd_iommu_hwdom_init+0xa9/0xc1
> > (XEN) [ 8.373988]    [] F iommu_hwdom_init+0x26/0x2e
> > (XEN) [ 8.386989]    [] F
> > dom0_construct_pvh+0x265/0x1141
> > (XEN) [ 8.400860]    [] F construct_dom0+0x47/0x93
> > (XEN) [ 8.413511]    [] F __start_xen+0x21fc/0x2425
> > (XEN) [ 8.426340]    [] F __high_start+0x8e/0x90
> > (XEN) [ 8.438646]
> > (XEN) [ 8.442632]  [00000fec02, 00000fedff] RW
> > (XEN) [ 8.451599]  [00000fee01, 00000fffff] RW
> > (XEN) [ 8.460571]  [000080f340, 00008501ff] RW
> > (XEN) [ 8.470205] 0000:02:00.0: not mapping BAR [fea00, fea03] invalid
> > position
> > (XEN) [ 8.484769] 0000:03:00.0: not mapping BAR [fe900, fe90f] invalid
> > position
> > (XEN) [ 8.499330] 0000:03:00.0: not mapping BAR [fe910, fe913] invalid
> > position
> > (XEN) [ 8.513890] gfn 0xfe910mfn 0xfffffffffffffffftype 1order 0
> > (XEN) [ 8.526370] Xen WARNat arch/x86/mm/p2m-pt.c:599
> > ...
> > (XEN) [ 9.094902] Xen call trace:
> > (XEN) [ 9.101491]    [] R
> > arch/x86/mm/p2m-pt.c#p2m_pt_set_entry+0xc1/0x961
> > (XEN) [ 9.118306]    [] F p2m_set_entry+0xb5/0x13c
> > (XEN) [ 9.130957]    [] F
> > p2m_remove_identity_entry+0x26f/0x2ca
> > (XEN) [ 9.145865]    [] F
> > vpci_make_msix_hole+0x11a/0x27a
> > (XEN) [ 9.159734]    [] F
> > drivers/vpci/header.c#modify_decoding+0x4e/0x1b3
> > (XEN) [ 9.176547]    [] F
> > drivers/vpci/header.c#modify_bars+0x660/0x6c4
> > (XEN) [ 9.192838]    [] F
> > drivers/vpci/header.c#init_header+0x5e7/0x86f
> > (XEN) [ 9.209129]    [] F vpci_assign_device+0xd3/0x115
> > (XEN) [ 9.222648]    [] F
> > drivers/passthrough/pci.c#setup_one_hwdom_device+0x92/0x15b
> > (XEN) [ 9.241368]    [] F
> > drivers/passthrough/pci.c#_setup_hwdom_pci_devices+0x158/0x241
> > (XEN) [ 9.260612]    [] F
> > drivers/passthrough/pci.c#pci_segments_iterate+0x43/0x69
> > (XEN) [ 9.278814]    [] F
> > setup_hwdom_pci_devices+0x28/0x2f
> > (XEN) [ 9.293026]    [] F
> > drivers/passthrough/amd/pci_amd_iommu.c#amd_iommu_hwdom_init+0xb8/0xc1
> > (XEN) [ 9.313649]    [] F iommu_hwdom_init+0x26/0x2e
> > (XEN) [ 9.326652]    [] F
> > dom0_construct_pvh+0x265/0x1141
> > (XEN) [ 9.340516]    [] F construct_dom0+0x47/0x93
> > (XEN) [ 9.353172]    [] F __start_xen+0x21fc/0x2425
> > (XEN) [ 9.365999]    [] F __high_start+0x8e/0x90
> > (XEN) [ 9.378305]
> > (XEN) [ 9.382289] 0000:04:00.0: not mapping BAR [fe700, fe77f] invalid
> > position
> > (XEN) [ 9.396850] 0000:04:00.3: not mapping BAR [fe500, fe5ff] invalid
> > position
> > (XEN) [ 9.411412] 0000:04:00.4: not mapping BAR [fe400, fe4ff] invalid
> > position
> > (XEN) [ 9.425972] 0000:05:00.0: not mapping BAR [fe801, fe801] invalid
> > position
> > (XEN) [ 9.440531] 0000:05:00.1: not mapping BAR [fe800, fe800] invalid
> > position
> 
> So vpci_make_msix_hole is where it's getting removed.

Oh, the output is very mangled when displaying the email on my MUA,
but I see.  I think I now get what's happening.

Since the BAR falls into a reserved region, the `enabled` bit for it is
never set, and thus the handling in msix_accept() never triggers,
leaving those accesses unhandled and terminated by the null handler.

I think the patch below should fix it, let me know how it goes.

There's also a further known issue with vpci_make_msix_hole(): if the
BARs are repositioned the holes are not restored to their previous
values, but I don't think you are hitting that issue (yet).

Thanks, Roger.
---
diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c
index f3804ce047a3..bcdeffc16a95 100644
--- a/xen/drivers/vpci/msix.c
+++ b/xen/drivers/vpci/msix.c
@@ -158,12 +158,10 @@ static struct vpci_msix *msix_find(const struct domain *d, unsigned long addr)
 
     list_for_each_entry ( msix, &d->arch.hvm.msix_tables, next )
     {
-        const struct vpci_bar *bars = msix->pdev->vpci->header.bars;
         unsigned int i;
 
         for ( i = 0; i < ARRAY_SIZE(msix->tables); i++ )
-            if ( bars[msix->tables[i] & PCI_MSIX_BIRMASK].enabled &&
-                 VMSIX_ADDR_SAME_PAGE(addr, msix->pdev->vpci, i) )
+            if ( VMSIX_ADDR_SAME_PAGE(addr, msix->pdev->vpci, i) )
                 return msix;
     }
 
@@ -392,7 +390,7 @@ static int cf_check msix_read(
         return rc;
     }
 
-    if ( !access_allowed(msix->pdev, addr, len) )
+    if ( !msix->enabled || !access_allowed(msix->pdev, addr, len) )
     {
         read_unlock(&d->pci_lock);
         return X86EMUL_OKAY;
@@ -539,7 +537,7 @@ static int cf_check msix_write(
         return rc;
     }
 
-    if ( !access_allowed(msix->pdev, addr, len) )
+    if ( !msix->enabled || !access_allowed(msix->pdev, addr, len) )
     {
         read_unlock(&d->pci_lock);
         return X86EMUL_OKAY;



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Date: Fri, 25 Apr 2025 11:04:15 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: xen-devel@lists.xenproject.org,
	Anthony PERARD ,
	Michal Orzel , Julien Grall ,
	Stefano Stabellini ,
	Andrew Cooper 
Subject: Re: [PATCH] xen: fix buffer over-read in bitmap_to_xenctl_bitmap()
Message-ID: 
References: <20250424103841.94828-1-roger.pau@citrix.com>
 <041d4bd5-962c-4600-b436-0ec214a6c6ca@citrix.com>
 
 
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On Fri, Apr 25, 2025 at 10:54:36AM +0200, Jan Beulich wrote:
> On 24.04.2025 15:04, Roger Pau Monné wrote:
> > On Thu, Apr 24, 2025 at 12:41:43PM +0100, Andrew Cooper wrote:
> >> On 24/04/2025 11:38 am, Roger Pau Monne wrote:
> >>> There's an off-by-one when calculating the last byte in the input array to
> >>> bitmap_to_xenctl_bitmap(), which leads to bitmaps with sizes multiple of 8
> >>> to over-read and incorrectly use a byte past the end of the array.
> >>
> >> /sigh
> >>
> >>> While there also ensure that bitmap_to_xenctl_bitmap() is not called with a
> >>> bitmap of 0 length.
> >>>
> >>> Fixes: 288c4641c80d ('xen: simplify bitmap_to_xenctl_bitmap for little endian')
> >>> Signed-off-by: Roger Pau Monné 
> >>
> >> You ought to note that this is only not getting an XSA because
> >> 288c4641c80d isn't in a released Xen yet.
> > 
> > Yeah, I did explicitly check this wasn't backported to any stable
> > branches.
> > 
> >>> ---
> >>>  xen/common/bitmap.c | 8 +++++++-
> >>>  1 file changed, 7 insertions(+), 1 deletion(-)
> >>>
> >>> diff --git a/xen/common/bitmap.c b/xen/common/bitmap.c
> >>> index bf1a7fd91e36..415d6bc074f6 100644
> >>> --- a/xen/common/bitmap.c
> >>> +++ b/xen/common/bitmap.c
> >>> @@ -369,6 +369,12 @@ int bitmap_to_xenctl_bitmap(struct xenctl_bitmap *xenctl_bitmap,
> >>>      const uint8_t *bytemap;
> >>>      uint8_t last, *buf = NULL;
> >>>  
> >>> +    if ( !nbits )
> >>> +    {
> >>> +	ASSERT_UNREACHABLE();
> >>> +	return -EILSEQ;
> >>> +    }
> >>
> >> I don't see any hypercalls performing a bits==0 check, so I expect this
> >> is reachable.
> > 
> > bitmap_to_xenctl_bitmap() has just two callers, one passes nr_cpu_ids,
> > the other MAX_NUMNODES.  I think there are no callers that pass 0,
> > much less from hypercall provided values.
> 
> Still I don't think there should be an assertion here, not even an error.
> As much as memcpy(x, y, 0) is okay, it ought to be okay to invoke this
> function for entirely void bitmaps.

OK, are we fine then with just returning early if bits == 0?  No
assert and no error.

Thanks, Roger.


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Subject: Re: UBSan bug in real mode fpu emulation
To: Andrew Cooper 
Cc: manuel.andreas@tum.de, Fabian Specht ,
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References: 
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On 24.04.2025 16:04, Andrew Cooper wrote:
> I have a sneaking suspicion that this is sufficient:
> 
> diff --git a/xen/arch/x86/x86_emulate/private.h
> b/xen/arch/x86/x86_emulate/private.h
> index 30be59547032..9f3d6f0e5357 100644
> --- a/xen/arch/x86/x86_emulate/private.h
> +++ b/xen/arch/x86/x86_emulate/private.h
> @@ -385,9 +385,9 @@ struct x87_env16 {
>      union {
>          struct {
>              uint16_t fip_lo;
> -            uint16_t fop:11, :1, fip_hi:4;
> +            uint32_t fop:11, :1, fip_hi:4;
>              uint16_t fdp_lo;
> -            uint16_t :12, fdp_hi:4;
> +            uint32_t :12, fdp_hi:4;
>          } real;
>          struct {
>              uint16_t fip;
> 
> 
> The problem is that a uint16_t bitfield promotes into int.  A base type
> of uint32_t should cause the bitfield to promote into unsigned int directly.

I fear that's not gcc's way of thinking. In fact, the other involved structure
already uses bitfields with uint32_t base type, and the issue was reported
there nevertheless. Having known only compilers which respect declared type of
bitfields, I was rather surprised by gcc not doing so when I first started
using it on not exactly trivial code. Just to learn that they are free to do
so. Looks like I never dared to submit a patch I've been carrying to optionally
alter that behavior.

Jan


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Subject: Re: [PATCH] xen: fix buffer over-read in bitmap_to_xenctl_bitmap()
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Cc: xen-devel@lists.xenproject.org, Anthony PERARD
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 Andrew Cooper 
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On 25.04.2025 11:04, Roger Pau Monné wrote:
> On Fri, Apr 25, 2025 at 10:54:36AM +0200, Jan Beulich wrote:
>> On 24.04.2025 15:04, Roger Pau Monné wrote:
>>> On Thu, Apr 24, 2025 at 12:41:43PM +0100, Andrew Cooper wrote:
>>>> On 24/04/2025 11:38 am, Roger Pau Monne wrote:
>>>>> There's an off-by-one when calculating the last byte in the input array to
>>>>> bitmap_to_xenctl_bitmap(), which leads to bitmaps with sizes multiple of 8
>>>>> to over-read and incorrectly use a byte past the end of the array.
>>>>
>>>> /sigh
>>>>
>>>>> While there also ensure that bitmap_to_xenctl_bitmap() is not called with a
>>>>> bitmap of 0 length.
>>>>>
>>>>> Fixes: 288c4641c80d ('xen: simplify bitmap_to_xenctl_bitmap for little endian')
>>>>> Signed-off-by: Roger Pau Monné 
>>>>
>>>> You ought to note that this is only not getting an XSA because
>>>> 288c4641c80d isn't in a released Xen yet.
>>>
>>> Yeah, I did explicitly check this wasn't backported to any stable
>>> branches.
>>>
>>>>> ---
>>>>>  xen/common/bitmap.c | 8 +++++++-
>>>>>  1 file changed, 7 insertions(+), 1 deletion(-)
>>>>>
>>>>> diff --git a/xen/common/bitmap.c b/xen/common/bitmap.c
>>>>> index bf1a7fd91e36..415d6bc074f6 100644
>>>>> --- a/xen/common/bitmap.c
>>>>> +++ b/xen/common/bitmap.c
>>>>> @@ -369,6 +369,12 @@ int bitmap_to_xenctl_bitmap(struct xenctl_bitmap *xenctl_bitmap,
>>>>>      const uint8_t *bytemap;
>>>>>      uint8_t last, *buf = NULL;
>>>>>  
>>>>> +    if ( !nbits )
>>>>> +    {
>>>>> +	ASSERT_UNREACHABLE();
>>>>> +	return -EILSEQ;
>>>>> +    }
>>>>
>>>> I don't see any hypercalls performing a bits==0 check, so I expect this
>>>> is reachable.
>>>
>>> bitmap_to_xenctl_bitmap() has just two callers, one passes nr_cpu_ids,
>>> the other MAX_NUMNODES.  I think there are no callers that pass 0,
>>> much less from hypercall provided values.
>>
>> Still I don't think there should be an assertion here, not even an error.
>> As much as memcpy(x, y, 0) is okay, it ought to be okay to invoke this
>> function for entirely void bitmaps.
> 
> OK, are we fine then with just returning early if bits == 0?  No
> assert and no error.

I'd be fine with that, yes.

Jan


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Subject: Re: [PATCH] x86/hyperv: Adjust hypercall page placement
To: Alejandro Vallejo 
Cc: Jason Andryuk ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 24.04.2025 14:45, Alejandro Vallejo wrote:
> Xen nowadays crashes under some Hyper-V configurations when
> paddr_bits>36. At the 44bit boundary we reach an edge case in which the
> end of the guest physical address space is not representable using 32bit
> MFNs. Furthermore, it's an act of faith that the tail of the physical
> address space has no reserved regions already.
> 
> This commit uses the first unused MFN rather than the last, thus
> ensuring the hypercall page placement is more resilient against such
> corner cases.
> 
> While at this, add an extra BUG_ON() to explicitly test for the
> hypercall page being correctly set, and mark hcall_page_ready as
> __ro_after_init.
> 
> Fixes: 620fc734f854("x86/hyperv: setup hypercall page")
> Signed-off-by: Alejandro Vallejo 

Just in case you re-submit (as per later discussion), and respective code
was to stay, two style nits:

> --- a/xen/arch/x86/e820.c
> +++ b/xen/arch/x86/e820.c
> @@ -582,6 +582,20 @@ int __init e820_add_range(uint64_t s, uint64_t e, uint32_t type)
>      return 1;
>  }
>  
> +uint64_t __init e820_reserve_hole(void)
> +{
> +    for ( unsigned int i = 0; i < e820.nr_map; i++ )
> +    {
> +        uint64_t hole = e820.map[i].addr + e820.map[i].size;
> +        if ( e820_add_range(hole, hole + PAGE_SIZE, E820_RESERVED) )

Blank line between declaration(s) and statement8s) please.

> +            return hole;
> +    }
> +
> +    print_e820_memory_map(e820.map, e820.nr_map);
> +    panic("Unable to find a hole in e820");
> +}
> +
> +

No double blank lines please.

Jan


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Date: Fri, 25 Apr 2025 11:19:21 +0200
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Subject: Re: [RFC] xen/x86: allow overlaps with non-RAM regions
To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 "Lira, Victor M" 
Cc: Jason Andryuk ,
 =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 ,
 Stefano Stabellini , xen-devel@lists.xenproject.org,
 Andrew Cooper , Xenia.Ragiadakou@amd.com,
 Alejandro.GarciaVallejo@amd.com
References: <3c5dfd26-3c12-498b-aca4-0beac4e991a5@amd.com>
  <9ed89e50-c645-407d-80b4-5b78cb6e36fa@amd.com>
  
  
  <775d3ac0-8f43-415a-a32d-14377092b96b@amd.com>
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On 25.04.2025 11:02, Roger Pau Monné wrote:
> On Thu, Apr 24, 2025 at 02:38:29PM -0700, Lira, Victor M wrote:
>> Hello all,
>>
>> Here is the output from Roger's patch.
>> This is the section of interest:
>>
>>> (XEN) [ 7.547326] d0 has maximum 3328PIRQs
>>> (XEN) [ 7.555644] *** Building a PVH Dom0 ***
>>> (XEN) [ 7.567780] d0: identity mappings for IOMMU:
>>> (XEN) [ 7.577312]  [00000000a0, 00000000ff] RW
>>> (XEN) [ 7.586153]  [0000009bff, 0000009fff] RW
>>> (XEN) [ 7.594992]  [00000cabc9, 00000cc14c] RW
>>> (XEN) [ 7.603866]  [00000cc389, 00000cc389] RW
>>> (XEN) [ 7.612707]  [00000cc70a, 00000cd1fe] RW
>>> (XEN) [ 7.621896]  [00000ce000, 00000cffff] RW
>>> (XEN) [ 7.630731]  [00000fd000, 00000fd2ff] RW
>>> (XEN) [ 7.639573]  [00000fd304, 00000febff] RW
>>> (XEN) [ 7.648414] gfn 0xfe800mfn 0xfe800type 5order 9
>>> (XEN) [ 7.658985] Xen WARNat arch/x86/mm/p2m-pt.c:599
>>> (XEN) [ 7.669215] ----[ Xen-4.21-unstable x86_64  debug=y  Tainted:   C
>>>    ]----
>>> ...
>>> (XEN) [ 8.227521] Xen call trace:
>>> (XEN) [ 8.234107]    [] R
>>> arch/x86/mm/p2m-pt.c#p2m_pt_set_entry+0xc1/0x961
>>> (XEN) [ 8.250925]    [] F p2m_set_entry+0xb5/0x13c
>>> (XEN) [ 8.263579]    [] F
>>> arch/x86/mm/p2m.c#set_typed_p2m_entry+0xfd/0x6f0
>>> (XEN) [ 8.280388]    [] F set_mmio_p2m_entry+0x62/0x6b
>>> (XEN) [ 8.293735]    [] F map_mmio_regions+0x77/0xcf
>>> (XEN) [ 8.306734]    [] F
>>> drivers/passthrough/x86/iommu.c#identity_map+0x7e/0x196
>>> (XEN) [ 8.324761]    [] F
>>> rangeset_report_ranges+0x10a/0x159
>>> (XEN) [ 8.339149]    [] F
>>> arch_iommu_hwdom_init+0x27f/0x316
>>> (XEN) [ 8.353361]    [] F
>>> drivers/passthrough/amd/pci_amd_iommu.c#amd_iommu_hwdom_init+0xa9/0xc1
>>> (XEN) [ 8.373988]    [] F iommu_hwdom_init+0x26/0x2e
>>> (XEN) [ 8.386989]    [] F
>>> dom0_construct_pvh+0x265/0x1141
>>> (XEN) [ 8.400860]    [] F construct_dom0+0x47/0x93
>>> (XEN) [ 8.413511]    [] F __start_xen+0x21fc/0x2425
>>> (XEN) [ 8.426340]    [] F __high_start+0x8e/0x90
>>> (XEN) [ 8.438646]
>>> (XEN) [ 8.442632]  [00000fec02, 00000fedff] RW
>>> (XEN) [ 8.451599]  [00000fee01, 00000fffff] RW
>>> (XEN) [ 8.460571]  [000080f340, 00008501ff] RW
>>> (XEN) [ 8.470205] 0000:02:00.0: not mapping BAR [fea00, fea03] invalid
>>> position
>>> (XEN) [ 8.484769] 0000:03:00.0: not mapping BAR [fe900, fe90f] invalid
>>> position
>>> (XEN) [ 8.499330] 0000:03:00.0: not mapping BAR [fe910, fe913] invalid
>>> position
>>> (XEN) [ 8.513890] gfn 0xfe910mfn 0xfffffffffffffffftype 1order 0
>>> (XEN) [ 8.526370] Xen WARNat arch/x86/mm/p2m-pt.c:599
>>> ...
>>> (XEN) [ 9.094902] Xen call trace:
>>> (XEN) [ 9.101491]    [] R
>>> arch/x86/mm/p2m-pt.c#p2m_pt_set_entry+0xc1/0x961
>>> (XEN) [ 9.118306]    [] F p2m_set_entry+0xb5/0x13c
>>> (XEN) [ 9.130957]    [] F
>>> p2m_remove_identity_entry+0x26f/0x2ca
>>> (XEN) [ 9.145865]    [] F
>>> vpci_make_msix_hole+0x11a/0x27a
>>> (XEN) [ 9.159734]    [] F
>>> drivers/vpci/header.c#modify_decoding+0x4e/0x1b3
>>> (XEN) [ 9.176547]    [] F
>>> drivers/vpci/header.c#modify_bars+0x660/0x6c4
>>> (XEN) [ 9.192838]    [] F
>>> drivers/vpci/header.c#init_header+0x5e7/0x86f
>>> (XEN) [ 9.209129]    [] F vpci_assign_device+0xd3/0x115
>>> (XEN) [ 9.222648]    [] F
>>> drivers/passthrough/pci.c#setup_one_hwdom_device+0x92/0x15b
>>> (XEN) [ 9.241368]    [] F
>>> drivers/passthrough/pci.c#_setup_hwdom_pci_devices+0x158/0x241
>>> (XEN) [ 9.260612]    [] F
>>> drivers/passthrough/pci.c#pci_segments_iterate+0x43/0x69
>>> (XEN) [ 9.278814]    [] F
>>> setup_hwdom_pci_devices+0x28/0x2f
>>> (XEN) [ 9.293026]    [] F
>>> drivers/passthrough/amd/pci_amd_iommu.c#amd_iommu_hwdom_init+0xb8/0xc1
>>> (XEN) [ 9.313649]    [] F iommu_hwdom_init+0x26/0x2e
>>> (XEN) [ 9.326652]    [] F
>>> dom0_construct_pvh+0x265/0x1141
>>> (XEN) [ 9.340516]    [] F construct_dom0+0x47/0x93
>>> (XEN) [ 9.353172]    [] F __start_xen+0x21fc/0x2425
>>> (XEN) [ 9.365999]    [] F __high_start+0x8e/0x90
>>> (XEN) [ 9.378305]
>>> (XEN) [ 9.382289] 0000:04:00.0: not mapping BAR [fe700, fe77f] invalid
>>> position
>>> (XEN) [ 9.396850] 0000:04:00.3: not mapping BAR [fe500, fe5ff] invalid
>>> position
>>> (XEN) [ 9.411412] 0000:04:00.4: not mapping BAR [fe400, fe4ff] invalid
>>> position
>>> (XEN) [ 9.425972] 0000:05:00.0: not mapping BAR [fe801, fe801] invalid
>>> position
>>> (XEN) [ 9.440531] 0000:05:00.1: not mapping BAR [fe800, fe800] invalid
>>> position
>>
>> So vpci_make_msix_hole is where it's getting removed.
> 
> Oh, the output is very mangled when displaying the email on my MUA,
> but I see.  I think I now get what's happening.
> 
> Since the BAR falls into a reserved region, the `enabled` bit for it is
> never set, and thus the handling in msix_accept() never triggers,
> leaving those accesses unhandled and terminated by the null handler.
> 
> I think the patch below should fix it, let me know how it goes.

Just to mention - "fix" isn't quite the right term here, is it? BARs may
not live in E820_RESERVED areas. And while we make those up from the EFI
memory map we're handed, ...

> There's also a further known issue with vpci_make_msix_hole(): if the
> BARs are repositioned the holes are not restored to their previous
> values, but I don't think you are hitting that issue (yet).

... the memory map we're seeing here will go stale once the OS (any; not
just Xen or Linux) decides to move those BARs. Imo firmware simply may
not request runtime mappings of BARs.

Jan


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Subject: Re: UBSan bug in real mode fpu emulation
To: Fabian Specht 
Cc: manuel.andreas@tum.de, xen-devel@lists.xenproject.org
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 <40a5c44c-4ef1-4852-b441-ea65e31b2345@suse.com>
 
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From: Jan Beulich 
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On 24.04.2025 12:05, Fabian Specht wrote:
> On Thu, Apr 24, 2025 at 08:34:42AM +0200, Jan Beulich wrote:
>> Since ...
>>
>>> Similar code resides in the same file in lines 87, 125 and 127.
>>
>> ... all of these are shifts by 16, could you clarify what it is that you
>> want to shift by 4? Imo what we need to do here is add casts to unsigned
>> int, for the results thereof to be shifted (or use some extra arithmetic
>> to achieve the same effect, e.g. add in 0U). Or we could go and replace
>> the shifts by 16 with shifts by 12 (accounting for the later right shift
>> by 4, which would then need dropping).
> 
> I will submit a patch in the coming hours.

Since in another reply you said "yes" to the cast suggestion, I'd like to
point out that I was meaning to try the other route first. But that's not
going to be today.

Jan


From xen-devel-bounces@lists.xenproject.org Fri Apr 25 09:42:22 2025
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Date: Fri, 25 Apr 2025 11:42:10 +0200
From: Anthony PERARD 
To: Jan Beulich , Hongbo 
Cc: Anthony PERARD ,
	Juergen Gross , xen-devel@lists.xenproject.org
Subject: Re: [XEN PATCH v2 1/1] tools/libxl: search PATH for QEMU if
 `QEMU_XEN_PATH` is not absolute
Message-ID: 
References: <20241223031753.13709-1-hehongbo@mail.com>
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On Tue, Apr 08, 2025 at 12:38:16PM +0200, Jan Beulich wrote:
> On 30.03.2025 18:03, Hongbo wrote:
> > +                {
> > +                    char *path_dup = libxl__strdup(gc, path_env);
> > +                    char *saveptr;
> > +
> > +                    char *path = strtok_r(path_dup, ":", &saveptr);
> 
> Main reason I'm replying here is this one though, where CI found gcc to
> object:
> 
> libxl_dm.c: In function 'libxl__domain_device_model':
> libxl_dm.c:356:31: error: 'saveptr' may be used uninitialized in this function [-Werror=maybe-uninitialized]
>                          char *candidate = libxl__abs_path(gc, configured_dm, path);
>                                ^
> cc1: all warnings being treated as errors
> 
> The compiler can't know that path_dup is guaranteed non-NULL. Hence, if it
> can see (part of) the implementation of strtok_r(), it would observe that
> it's possible that the continuation-invocation path is taken, where
> saveptr necessarily is consumed.

I'll recommit this patch again with `saveptr` initialised to NULL. My
man page says some implementation requires this anyway.

Cheers,

-- 
Anthony PERARD


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From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= 
To: "Xin Li (Intel)" , linux-kernel@vger.kernel.org,
 kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
 linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
 linux-pm@vger.kernel.org, linux-edac@vger.kernel.org,
 xen-devel@lists.xenproject.org, linux-acpi@vger.kernel.org,
 linux-hwmon@vger.kernel.org, netdev@vger.kernel.org,
 platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
 dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, acme@kernel.org,
 andrew.cooper3@citrix.com, peterz@infradead.org, namhyung@kernel.org,
 mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org,
 irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
 wei.liu@kernel.org, ajay.kaher@broadcom.com,
 bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
 pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
 luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
 haiyangz@microsoft.com, decui@microsoft.com, dapeng1.mi@linux.intel.com
Message-ID: <524349a7-55da-42a2-b9cc-ec0d2ce66ae4@suse.com>
Subject: Re: [PATCH v3 09/14] x86/xen/msr: Remove calling
 native_{read,write}_msr{,_safe}() in pmu_msr_{read,write}()
References: <20250425083442.2390017-1-xin@zytor.com>
 <20250425083442.2390017-10-xin@zytor.com>
In-Reply-To: <20250425083442.2390017-10-xin@zytor.com>

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Message-ID: <04d47f21-6183-42d5-bc18-f23a8c3c2009@suse.com>
Date: Fri, 25 Apr 2025 12:08:36 +0200
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Subject: Re: [PATCH v3 10/14] x86/xen/msr: Remove pmu_msr_{read,write}()
To: "Xin Li (Intel)" , linux-kernel@vger.kernel.org,
 kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
 linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
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Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
 dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, acme@kernel.org,
 andrew.cooper3@citrix.com, peterz@infradead.org, namhyung@kernel.org,
 mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org,
 irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
 wei.liu@kernel.org, ajay.kaher@broadcom.com,
 bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
 pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
 luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
 haiyangz@microsoft.com, decui@microsoft.com, dapeng1.mi@linux.intel.com
References: <20250425083442.2390017-1-xin@zytor.com>
 <20250425083442.2390017-11-xin@zytor.com>
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To: "Xin Li (Intel)" , linux-kernel@vger.kernel.org,
 kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
 linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
 linux-pm@vger.kernel.org, linux-edac@vger.kernel.org,
 xen-devel@lists.xenproject.org, linux-acpi@vger.kernel.org,
 linux-hwmon@vger.kernel.org, netdev@vger.kernel.org,
 platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
 dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, acme@kernel.org,
 andrew.cooper3@citrix.com, peterz@infradead.org, namhyung@kernel.org,
 mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org,
 irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
 wei.liu@kernel.org, ajay.kaher@broadcom.com,
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 luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
 haiyangz@microsoft.com, decui@microsoft.com, dapeng1.mi@linux.intel.com
Message-ID: <04d47f21-6183-42d5-bc18-f23a8c3c2009@suse.com>
Subject: Re: [PATCH v3 10/14] x86/xen/msr: Remove pmu_msr_{read,write}()
References: <20250425083442.2390017-1-xin@zytor.com>
 <20250425083442.2390017-11-xin@zytor.com>
In-Reply-To: <20250425083442.2390017-11-xin@zytor.com>

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Date: Fri, 25 Apr 2025 13:09:04 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: "Lira, Victor M" ,
	Jason Andryuk ,
	Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= ,
	Stefano Stabellini ,
	xen-devel@lists.xenproject.org,
	Andrew Cooper , Xenia.Ragiadakou@amd.com,
	Alejandro.GarciaVallejo@amd.com
Subject: Re: [RFC] xen/x86: allow overlaps with non-RAM regions
Message-ID: 
References: <9ed89e50-c645-407d-80b4-5b78cb6e36fa@amd.com>
 
 
 
 
 
 <775d3ac0-8f43-415a-a32d-14377092b96b@amd.com>
 <554026de-bbb4-488f-95c4-8e2f034d6d0e@amd.com>
 
 <2acad9ba-564a-4d18-9b09-dcabe8f7b025@suse.com>
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On Fri, Apr 25, 2025 at 11:19:21AM +0200, Jan Beulich wrote:
> On 25.04.2025 11:02, Roger Pau Monné wrote:
> > On Thu, Apr 24, 2025 at 02:38:29PM -0700, Lira, Victor M wrote:
> >> Hello all,
> >>
> >> Here is the output from Roger's patch.
> >> This is the section of interest:
> >>
> >>> (XEN) [ 7.547326] d0 has maximum 3328PIRQs
> >>> (XEN) [ 7.555644] *** Building a PVH Dom0 ***
> >>> (XEN) [ 7.567780] d0: identity mappings for IOMMU:
> >>> (XEN) [ 7.577312]  [00000000a0, 00000000ff] RW
> >>> (XEN) [ 7.586153]  [0000009bff, 0000009fff] RW
> >>> (XEN) [ 7.594992]  [00000cabc9, 00000cc14c] RW
> >>> (XEN) [ 7.603866]  [00000cc389, 00000cc389] RW
> >>> (XEN) [ 7.612707]  [00000cc70a, 00000cd1fe] RW
> >>> (XEN) [ 7.621896]  [00000ce000, 00000cffff] RW
> >>> (XEN) [ 7.630731]  [00000fd000, 00000fd2ff] RW
> >>> (XEN) [ 7.639573]  [00000fd304, 00000febff] RW
> >>> (XEN) [ 7.648414] gfn 0xfe800mfn 0xfe800type 5order 9
> >>> (XEN) [ 7.658985] Xen WARNat arch/x86/mm/p2m-pt.c:599
> >>> (XEN) [ 7.669215] ----[ Xen-4.21-unstable x86_64  debug=y  Tainted:   C
> >>>    ]----
> >>> ...
> >>> (XEN) [ 8.227521] Xen call trace:
> >>> (XEN) [ 8.234107]    [] R
> >>> arch/x86/mm/p2m-pt.c#p2m_pt_set_entry+0xc1/0x961
> >>> (XEN) [ 8.250925]    [] F p2m_set_entry+0xb5/0x13c
> >>> (XEN) [ 8.263579]    [] F
> >>> arch/x86/mm/p2m.c#set_typed_p2m_entry+0xfd/0x6f0
> >>> (XEN) [ 8.280388]    [] F set_mmio_p2m_entry+0x62/0x6b
> >>> (XEN) [ 8.293735]    [] F map_mmio_regions+0x77/0xcf
> >>> (XEN) [ 8.306734]    [] F
> >>> drivers/passthrough/x86/iommu.c#identity_map+0x7e/0x196
> >>> (XEN) [ 8.324761]    [] F
> >>> rangeset_report_ranges+0x10a/0x159
> >>> (XEN) [ 8.339149]    [] F
> >>> arch_iommu_hwdom_init+0x27f/0x316
> >>> (XEN) [ 8.353361]    [] F
> >>> drivers/passthrough/amd/pci_amd_iommu.c#amd_iommu_hwdom_init+0xa9/0xc1
> >>> (XEN) [ 8.373988]    [] F iommu_hwdom_init+0x26/0x2e
> >>> (XEN) [ 8.386989]    [] F
> >>> dom0_construct_pvh+0x265/0x1141
> >>> (XEN) [ 8.400860]    [] F construct_dom0+0x47/0x93
> >>> (XEN) [ 8.413511]    [] F __start_xen+0x21fc/0x2425
> >>> (XEN) [ 8.426340]    [] F __high_start+0x8e/0x90
> >>> (XEN) [ 8.438646]
> >>> (XEN) [ 8.442632]  [00000fec02, 00000fedff] RW
> >>> (XEN) [ 8.451599]  [00000fee01, 00000fffff] RW
> >>> (XEN) [ 8.460571]  [000080f340, 00008501ff] RW
> >>> (XEN) [ 8.470205] 0000:02:00.0: not mapping BAR [fea00, fea03] invalid
> >>> position
> >>> (XEN) [ 8.484769] 0000:03:00.0: not mapping BAR [fe900, fe90f] invalid
> >>> position
> >>> (XEN) [ 8.499330] 0000:03:00.0: not mapping BAR [fe910, fe913] invalid
> >>> position
> >>> (XEN) [ 8.513890] gfn 0xfe910mfn 0xfffffffffffffffftype 1order 0
> >>> (XEN) [ 8.526370] Xen WARNat arch/x86/mm/p2m-pt.c:599
> >>> ...
> >>> (XEN) [ 9.094902] Xen call trace:
> >>> (XEN) [ 9.101491]    [] R
> >>> arch/x86/mm/p2m-pt.c#p2m_pt_set_entry+0xc1/0x961
> >>> (XEN) [ 9.118306]    [] F p2m_set_entry+0xb5/0x13c
> >>> (XEN) [ 9.130957]    [] F
> >>> p2m_remove_identity_entry+0x26f/0x2ca
> >>> (XEN) [ 9.145865]    [] F
> >>> vpci_make_msix_hole+0x11a/0x27a
> >>> (XEN) [ 9.159734]    [] F
> >>> drivers/vpci/header.c#modify_decoding+0x4e/0x1b3
> >>> (XEN) [ 9.176547]    [] F
> >>> drivers/vpci/header.c#modify_bars+0x660/0x6c4
> >>> (XEN) [ 9.192838]    [] F
> >>> drivers/vpci/header.c#init_header+0x5e7/0x86f
> >>> (XEN) [ 9.209129]    [] F vpci_assign_device+0xd3/0x115
> >>> (XEN) [ 9.222648]    [] F
> >>> drivers/passthrough/pci.c#setup_one_hwdom_device+0x92/0x15b
> >>> (XEN) [ 9.241368]    [] F
> >>> drivers/passthrough/pci.c#_setup_hwdom_pci_devices+0x158/0x241
> >>> (XEN) [ 9.260612]    [] F
> >>> drivers/passthrough/pci.c#pci_segments_iterate+0x43/0x69
> >>> (XEN) [ 9.278814]    [] F
> >>> setup_hwdom_pci_devices+0x28/0x2f
> >>> (XEN) [ 9.293026]    [] F
> >>> drivers/passthrough/amd/pci_amd_iommu.c#amd_iommu_hwdom_init+0xb8/0xc1
> >>> (XEN) [ 9.313649]    [] F iommu_hwdom_init+0x26/0x2e
> >>> (XEN) [ 9.326652]    [] F
> >>> dom0_construct_pvh+0x265/0x1141
> >>> (XEN) [ 9.340516]    [] F construct_dom0+0x47/0x93
> >>> (XEN) [ 9.353172]    [] F __start_xen+0x21fc/0x2425
> >>> (XEN) [ 9.365999]    [] F __high_start+0x8e/0x90
> >>> (XEN) [ 9.378305]
> >>> (XEN) [ 9.382289] 0000:04:00.0: not mapping BAR [fe700, fe77f] invalid
> >>> position
> >>> (XEN) [ 9.396850] 0000:04:00.3: not mapping BAR [fe500, fe5ff] invalid
> >>> position
> >>> (XEN) [ 9.411412] 0000:04:00.4: not mapping BAR [fe400, fe4ff] invalid
> >>> position
> >>> (XEN) [ 9.425972] 0000:05:00.0: not mapping BAR [fe801, fe801] invalid
> >>> position
> >>> (XEN) [ 9.440531] 0000:05:00.1: not mapping BAR [fe800, fe800] invalid
> >>> position
> >>
> >> So vpci_make_msix_hole is where it's getting removed.
> > 
> > Oh, the output is very mangled when displaying the email on my MUA,
> > but I see.  I think I now get what's happening.
> > 
> > Since the BAR falls into a reserved region, the `enabled` bit for it is
> > never set, and thus the handling in msix_accept() never triggers,
> > leaving those accesses unhandled and terminated by the null handler.
> > 
> > I think the patch below should fix it, let me know how it goes.
> 
> Just to mention - "fix" isn't quite the right term here, is it? BARs may
> not live in E820_RESERVED areas. And while we make those up from the EFI
> memory map we're handed, ...

It is a fix IMO, because the 'enabled' bit is not set for those BARs
when they are indeed mapped in the p2m, just not handled by the vPCI
code due to being placed in a E820_RESERVED region.

Due to the 'enabled' bit not being set, the MSI-X handlers didn't
function as expected, even when the BARs are properly mapped.  I'm not
convinced the provided patch is the best way to solve this, I need to
think more carefully about it.  It should however fix the issue
reported.

> > There's also a further known issue with vpci_make_msix_hole(): if the
> > BARs are repositioned the holes are not restored to their previous
> > values, but I don't think you are hitting that issue (yet).
> 
> ... the memory map we're seeing here will go stale once the OS (any; not
> just Xen or Linux) decides to move those BARs. Imo firmware simply may
> not request runtime mappings of BARs.

Indeed, but Xen still needs to keep a consistent view for the guest in
the p2m.  Currently if a PVH dom0 moves BARs inside of a E820_RESERVED
region the MSI-X holes will get out-of-sync with the BAR placements,
and hence MSI-X traps won't work correctly for those devices.

That's however a different issue that the patch provided in the
previous email doesn't fix.

Regards, Roger.


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Subject: Re: [PATCH v4 2/2] xen/mm: Introduce per-arch pte_attr_t type for PTE
 flags
From: Oleksii Kurochko 
To: Shawn Anastasio ,
 xen-devel@lists.xenproject.org
Cc: tpearson@raptorengineering.com,
 Stefano Stabellini , Julien Grall ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Andrew Cooper ,
 Anthony PERARD , Jan Beulich ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Alistair Francis ,
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 , "Daniel P. Smith" ,
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References: 
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 <803f27c4-c04b-4382-b7b0-e958134e1fd0@gmail.com>
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On 3/10/25 10:22 AM, Oleksii Kurochko wrote:
>
>
> On 3/6/25 7:25 PM, Shawn Anastasio wrote:
>> Xen's memory management APIs map_pages_to_xen, modify_xen_mappings,
>> set_fixmap, ioremap_attr, and __vmap all use an unsigned int to
>> represent architecture-dependent page table entry flags. This assumption
>> is not well-suited for PPC/radix where some flags go past 32-bits, so
>> introduce the pte_attr_t type to allow architectures to opt in to larger
>> types to store PTE flags.
>>
>> Suggested-by: Andrew Cooper
>> Signed-off-by: Shawn Anastasio
>> ---
>> Changes in v4:
>>    - Change definitions of map_pages_to_xen, modify_xen_mappings in all arches
>>    to match new prototype.
>>    - Use new flag types in modify_xen_mappings_lite as well (previously missed)
>>
>> Changes in v3:
>>    - Use new asm/mm-types.h to pull in pte_attr_t definition when
>>    necessary.
>>    - Drop define+ifdef since pte_attr_t is now always defined.
>>
>> Changes in v2:
>>    - Drop Kconfig option and use `#define pte_attr_t pte_attr_t` for arches to
>>    opt-in to defining the type.
>>    - Move default pte_attr_definition to xen/types.h
>>    - Update commit message to reflect that this change isn't strictly
>>    necessary for arches w/ >32bit pte flags
>>
>>   xen/arch/arm/mmu/pt.c               | 4 ++--
>>   xen/arch/ppc/include/asm/Makefile   | 1 -
>>   xen/arch/ppc/include/asm/mm-types.h | 7 +++++++
>>   xen/arch/ppc/mm-radix.c             | 2 +-
>>   xen/arch/riscv/pt.c                 | 2 +-
> Reviewed-by: Oleksii Kurochko

Also as the part of this patch the following changes should be considered (I can send that as
a separate patch):
$ git diff

diff --git a/xen/arch/riscv/include/asm/fixmap.h b/xen/arch/riscv/include/asm/fixmap.h
index e399a15f53..5990c964aa 100644
--- a/xen/arch/riscv/include/asm/fixmap.h
+++ b/xen/arch/riscv/include/asm/fixmap.h
@@ -33,7 +33,7 @@
  extern pte_t xen_fixmap[];
  
  /* Map a page in a fixmap entry */
-void set_fixmap(unsigned int map, mfn_t mfn, unsigned int flags);
+void set_fixmap(unsigned int map, mfn_t mfn, pte_attr_t flags);
  /* Remove a mapping from a fixmap entry */
  void clear_fixmap(unsigned int map);
  
diff --git a/xen/arch/riscv/include/asm/page.h b/xen/arch/riscv/include/asm/page.h
index 3904d42a71..e23d69214e 100644
--- a/xen/arch/riscv/include/asm/page.h
+++ b/xen/arch/riscv/include/asm/page.h
@@ -217,7 +217,7 @@ static inline pte_t read_pte(const pte_t *p)
      return read_atomic(p);
  }
  
-static inline pte_t pte_from_mfn(mfn_t mfn, unsigned int flags)
+static inline pte_t pte_from_mfn(mfn_t mfn, pte_attr_t flags)
  {
      unsigned long pte = (mfn_x(mfn) << PTE_PPN_SHIFT) | flags;
      return (pte_t){ .pte = pte };
diff --git a/xen/arch/riscv/pt.c b/xen/arch/riscv/pt.c
index ef84b6b078..d6cc68b7db 100644
--- a/xen/arch/riscv/pt.c
+++ b/xen/arch/riscv/pt.c
@@ -25,7 +25,7 @@ static inline mfn_t get_root_page(void)
   * See the comment about the possible combination of (mfn, flags) in
   * the comment above pt_update().
   */
-static bool pt_check_entry(pte_t entry, mfn_t mfn, unsigned int flags)
+static bool pt_check_entry(pte_t entry, mfn_t mfn, pte_attr_t flags)
  {
      /* Sanity check when modifying an entry. */
      if ( (flags & PTE_VALID) && mfn_eq(mfn, INVALID_MFN) )
@@ -260,7 +260,7 @@ pte_t pt_walk(vaddr_t va, unsigned int *pte_level)
   */
  static int pt_update_entry(mfn_t root, vaddr_t virt,
                             mfn_t mfn, unsigned int *target,
-                           unsigned int flags)
+                           pte_attr_t flags)
  {
      int rc;
      /*
@@ -355,7 +355,7 @@ static int pt_update_entry(mfn_t root, vaddr_t virt,
  
  /* Return the level where mapping should be done */
  static int pt_mapping_level(unsigned long vfn, mfn_t mfn, unsigned long nr,
-                            unsigned int flags)
+                            pte_attr_t flags)
  {
      unsigned int level = 0;
      unsigned long mask;
@@ -409,7 +409,7 @@ static DEFINE_SPINLOCK(pt_lock);
   * inserting will be done.
   */
  static int pt_update(vaddr_t virt, mfn_t mfn,
-                     unsigned long nr_mfns, unsigned int flags)
+                     unsigned long nr_mfns, pte_attr_t flags)
  {
      int rc = 0;
      unsigned long vfn = PFN_DOWN(virt);
@@ -537,7 +537,7 @@ int __init populate_pt_range(unsigned long virt, unsigned long nr_mfns)
  }
  
  /* Map a 4k page in a fixmap entry */
-void set_fixmap(unsigned int map, mfn_t mfn, unsigned int flags)
+void set_fixmap(unsigned int map, mfn_t mfn, pte_attr_t flags)
  {
      if ( map_pages_to_xen(FIXMAP_ADDR(map), mfn, 1, flags | PTE_SMALL) != 0 )
          BUG();

~ Oleksii


> ~ Oleksii
>>   xen/arch/x86/mm.c                   | 6 +++---
>>   xen/common/efi/boot.c               | 5 +++--
>>   xen/common/vmap.c                   | 2 +-
>>   xen/include/asm-generic/mm-types.h  | 2 ++
>>   xen/include/xen/mm.h                | 7 ++++---
>>   xen/include/xen/vmap.h              | 4 +++-
>>   11 files changed, 27 insertions(+), 15 deletions(-)
>>   create mode 100644 xen/arch/ppc/include/asm/mm-types.h
>>
>> diff --git a/xen/arch/arm/mmu/pt.c b/xen/arch/arm/mmu/pt.c
>> index da28d669e7..9dc99db352 100644
>> --- a/xen/arch/arm/mmu/pt.c
>> +++ b/xen/arch/arm/mmu/pt.c
>> @@ -701,7 +701,7 @@ static int xen_pt_update(unsigned long virt,
>>   int map_pages_to_xen(unsigned long virt,
>>                        mfn_t mfn,
>>                        unsigned long nr_mfns,
>> -                     unsigned int flags)
>> +                     pte_attr_t flags)
>>   {
>>       return xen_pt_update(virt, mfn, nr_mfns, flags);
>>   }
>> @@ -719,7 +719,7 @@ int destroy_xen_mappings(unsigned long s, unsigned long e)
>>       return xen_pt_update(s, INVALID_MFN, (e - s) >> PAGE_SHIFT, 0);
>>   }
>>
>> -int modify_xen_mappings(unsigned long s, unsigned long e, unsigned int nf)
>> +int modify_xen_mappings(unsigned long s, unsigned long e, pte_attr_t nf)
>>   {
>>       ASSERT(IS_ALIGNED(s, PAGE_SIZE));
>>       ASSERT(IS_ALIGNED(e, PAGE_SIZE));
>> diff --git a/xen/arch/ppc/include/asm/Makefile b/xen/arch/ppc/include/asm/Makefile
>> index c0dbc68ac6..c989a7f89b 100644
>> --- a/xen/arch/ppc/include/asm/Makefile
>> +++ b/xen/arch/ppc/include/asm/Makefile
>> @@ -5,7 +5,6 @@ generic-y += div64.h
>>   generic-y += hardirq.h
>>   generic-y += hypercall.h
>>   generic-y += iocap.h
>> -generic-y += mm-types.h
>>   generic-y += paging.h
>>   generic-y += percpu.h
>>   generic-y += perfc_defn.h
>> diff --git a/xen/arch/ppc/include/asm/mm-types.h b/xen/arch/ppc/include/asm/mm-types.h
>> new file mode 100644
>> index 0000000000..0cb850f4f6
>> --- /dev/null
>> +++ b/xen/arch/ppc/include/asm/mm-types.h
>> @@ -0,0 +1,7 @@
>> +/* SPDX-License-Identifier: GPL-2.0-only */
>> +#ifndef __ASM_PPC_MM_TYPES_H__
>> +#define __ASM_PPC_MM_TYPES_H__
>> +
>> +typedef unsigned long pte_attr_t;
>> +
>> +#endif /* __ASM_PPC_MM_TYPES_H__ */
>> diff --git a/xen/arch/ppc/mm-radix.c b/xen/arch/ppc/mm-radix.c
>> index 24232f3907..e02dffa7c5 100644
>> --- a/xen/arch/ppc/mm-radix.c
>> +++ b/xen/arch/ppc/mm-radix.c
>> @@ -265,7 +265,7 @@ int destroy_xen_mappings(unsigned long s, unsigned long e)
>>   int map_pages_to_xen(unsigned long virt,
>>                        mfn_t mfn,
>>                        unsigned long nr_mfns,
>> -                     unsigned int flags)
>> +                     pte_attr_t flags)
>>   {
>>       BUG_ON("unimplemented");
>>   }
>> diff --git a/xen/arch/riscv/pt.c b/xen/arch/riscv/pt.c
>> index 857619d48d..918b1b91ab 100644
>> --- a/xen/arch/riscv/pt.c
>> +++ b/xen/arch/riscv/pt.c
>> @@ -504,7 +504,7 @@ static int pt_update(vaddr_t virt, mfn_t mfn,
>>   int map_pages_to_xen(unsigned long virt,
>>                        mfn_t mfn,
>>                        unsigned long nr_mfns,
>> -                     unsigned int flags)
>> +                     pte_attr_t flags)
>>   {
>>       /*
>>        * Ensure that flags has PTE_VALID bit as map_pages_to_xen() is supposed
>> diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
>> index bfdc8fb019..53c17c6f88 100644
>> --- a/xen/arch/x86/mm.c
>> +++ b/xen/arch/x86/mm.c
>> @@ -5472,7 +5472,7 @@ int map_pages_to_xen(
>>       unsigned long virt,
>>       mfn_t mfn,
>>       unsigned long nr_mfns,
>> -    unsigned int flags)
>> +    pte_attr_t flags)
>>   {
>>       bool locking = system_state > SYS_STATE_boot;
>>       l3_pgentry_t *pl3e = NULL, ol3e;
>> @@ -5890,7 +5890,7 @@ int __init populate_pt_range(unsigned long virt, unsigned long nr_mfns)
>>    *
>>    * It is an error to call with present flags over an unpopulated range.
>>    */
>> -int modify_xen_mappings(unsigned long s, unsigned long e, unsigned int nf)
>> +int modify_xen_mappings(unsigned long s, unsigned long e, pte_attr_t nf)
>>   {
>>       bool locking = system_state > SYS_STATE_boot;
>>       l3_pgentry_t *pl3e = NULL;
>> @@ -6186,7 +6186,7 @@ int destroy_xen_mappings(unsigned long s, unsigned long e)
>>    * the non-inclusive boundary will be updated.
>>    */
>>   void init_or_livepatch modify_xen_mappings_lite(
>> -    unsigned long s, unsigned long e, unsigned int nf)
>> +    unsigned long s, unsigned long e, pte_attr_t nf)
>>   {
>>       unsigned long v = s, fm, flags;
>>
>> diff --git a/xen/common/efi/boot.c b/xen/common/efi/boot.c
>> index efbec00af9..999dbce4dc 100644
>> --- a/xen/common/efi/boot.c
>> +++ b/xen/common/efi/boot.c
>> @@ -1,4 +1,5 @@
>>   #include "efi.h"
>> +#include 
>>   #include 
>>   #include 
>>   #include 
>> @@ -1656,7 +1657,7 @@ void __init efi_init_memory(void)
>>       struct rt_extra {
>>           struct rt_extra *next;
>>           unsigned long smfn, emfn;
>> -        unsigned int prot;
>> +        pte_attr_t prot;
>>       } *extra, *extra_head = NULL;
>>
>>       free_ebmalloc_unused_mem();
>> @@ -1671,7 +1672,7 @@ void __init efi_init_memory(void)
>>           EFI_MEMORY_DESCRIPTOR *desc = efi_memmap + i;
>>           u64 len = desc->NumberOfPages << EFI_PAGE_SHIFT;
>>           unsigned long smfn, emfn;
>> -        unsigned int prot = PAGE_HYPERVISOR_RWX;
>> +        pte_attr_t prot = PAGE_HYPERVISOR_RWX;
>>           paddr_t mem_base;
>>           unsigned long mem_npages;
>>
>> diff --git a/xen/common/vmap.c b/xen/common/vmap.c
>> index 47225fecc0..d6991421f3 100644
>> --- a/xen/common/vmap.c
>> +++ b/xen/common/vmap.c
>> @@ -222,7 +222,7 @@ static void vm_free(const void *va)
>>   }
>>
>>   void *__vmap(const mfn_t *mfn, unsigned int granularity,
>> -             unsigned int nr, unsigned int align, unsigned int flags,
>> +             unsigned int nr, unsigned int align, pte_attr_t flags,
>>                enum vmap_region type)
>>   {
>>       void *va = vm_alloc(nr * granularity, align, type);
>> diff --git a/xen/include/asm-generic/mm-types.h b/xen/include/asm-generic/mm-types.h
>> index 26490e48db..9eb3cba698 100644
>> --- a/xen/include/asm-generic/mm-types.h
>> +++ b/xen/include/asm-generic/mm-types.h
>> @@ -2,4 +2,6 @@
>>   #ifndef __ASM_GENERIC_MM_TYPES_H__
>>   #define __ASM_GENERIC_MM_TYPES_H__
>>
>> +typedef unsigned int pte_attr_t;
>> +
>>   #endif /* __ASM_GENERIC_MM_TYPES_H__ */
>> diff --git a/xen/include/xen/mm.h b/xen/include/xen/mm.h
>> index 16f733281a..e79f1728c3 100644
>> --- a/xen/include/xen/mm.h
>> +++ b/xen/include/xen/mm.h
>> @@ -69,6 +69,7 @@
>>   #include 
>>   #include 
>>   #include 
>> +#include 
>>
>>   struct page_info;
>>
>> @@ -113,11 +114,11 @@ int map_pages_to_xen(
>>       unsigned long virt,
>>       mfn_t mfn,
>>       unsigned long nr_mfns,
>> -    unsigned int flags);
>> +    pte_attr_t flags);
>>   /* Alter the permissions of a range of Xen virtual address space. */
>> -int modify_xen_mappings(unsigned long s, unsigned long e, unsigned int nf);
>> +int modify_xen_mappings(unsigned long s, unsigned long e, pte_attr_t nf);
>>   void modify_xen_mappings_lite(unsigned long s, unsigned long e,
>> -                              unsigned int nf);
>> +                              pte_attr_t nf);
>>   int destroy_xen_mappings(unsigned long s, unsigned long e);
>>   /* Retrieve the MFN mapped by VA in Xen virtual address space. */
>>   mfn_t xen_map_to_mfn(unsigned long va);
>> diff --git a/xen/include/xen/vmap.h b/xen/include/xen/vmap.h
>> index 26c831757a..e1155ed14a 100644
>> --- a/xen/include/xen/vmap.h
>> +++ b/xen/include/xen/vmap.h
>> @@ -8,8 +8,10 @@
>>   #ifndef __XEN_VMAP_H__
>>   #define __XEN_VMAP_H__
>>
>> +#include 
>>   #include 
>>   #include 
>> +#include 
>>
>>   /* Identifiers for the linear ranges tracked by vmap */
>>   enum vmap_region {
>> @@ -57,7 +59,7 @@ void vm_init_type(enum vmap_region type, void *start, void *end);
>>    * @return Pointer to the mapped area on success; NULL otherwise.
>>    */
>>   void *__vmap(const mfn_t *mfn, unsigned int granularity, unsigned int nr,
>> -             unsigned int align, unsigned int flags, enum vmap_region type);
>> +             unsigned int align, pte_attr_t flags, enum vmap_region type);
>>
>>   /*
>>    * Map an array of pages contiguously into the VMAP_DEFAULT vmap region
>> --
>> 2.30.2
>>
--------------z11UG2tOytcGdUcsMf5pdcyk
Content-Type: text/html; charset=UTF-8
Content-Transfer-Encoding: 7bit



  
    
  
  
    


    

    
On 3/10/25 10:22 AM, Oleksii Kurochko
      wrote:

    

    

      
      


      

      
On 3/6/25 7:25 PM, Shawn Anastasio
        wrote:

      

      

        
Xen's memory management APIs map_pages_to_xen, modify_xen_mappings,
set_fixmap, ioremap_attr, and __vmap all use an unsigned int to
represent architecture-dependent page table entry flags. This assumption
is not well-suited for PPC/radix where some flags go past 32-bits, so
introduce the pte_attr_t type to allow architectures to opt in to larger
types to store PTE flags.

Suggested-by: Andrew Cooper <andrew.cooper3@citrix.com>
Signed-off-by: Shawn Anastasio <sanastasio@raptorengineering.com>
---
Changes in v4:
  - Change definitions of map_pages_to_xen, modify_xen_mappings in all arches
  to match new prototype.
  - Use new flag types in modify_xen_mappings_lite as well (previously missed)

Changes in v3:
  - Use new asm/mm-types.h to pull in pte_attr_t definition when
  necessary.
  - Drop define+ifdef since pte_attr_t is now always defined.

Changes in v2:
  - Drop Kconfig option and use `#define pte_attr_t pte_attr_t` for arches to
  opt-in to defining the type.
  - Move default pte_attr_definition to xen/types.h
  - Update commit message to reflect that this change isn't strictly
  necessary for arches w/ >32bit pte flags

 xen/arch/arm/mmu/pt.c               | 4 ++--
 xen/arch/ppc/include/asm/Makefile   | 1 -
 xen/arch/ppc/include/asm/mm-types.h | 7 +++++++
 xen/arch/ppc/mm-radix.c             | 2 +-
 xen/arch/riscv/pt.c                 | 2 +-

      

      
Reviewed-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>

    

    
Also as the part of this patch the following changes should be considered (I can send that as
a separate patch):
$ git diff

diff --git a/xen/arch/riscv/include/asm/fixmap.h b/xen/arch/riscv/include/asm/fixmap.h
index e399a15f53..5990c964aa 100644
--- a/xen/arch/riscv/include/asm/fixmap.h
+++ b/xen/arch/riscv/include/asm/fixmap.h
@@ -33,7 +33,7 @@
 extern pte_t xen_fixmap[];
 
 /* Map a page in a fixmap entry */
-void set_fixmap(unsigned int map, mfn_t mfn, unsigned int flags);
+void set_fixmap(unsigned int map, mfn_t mfn, pte_attr_t flags);
 /* Remove a mapping from a fixmap entry */
 void clear_fixmap(unsigned int map);
 
diff --git a/xen/arch/riscv/include/asm/page.h b/xen/arch/riscv/include/asm/page.h
index 3904d42a71..e23d69214e 100644
--- a/xen/arch/riscv/include/asm/page.h
+++ b/xen/arch/riscv/include/asm/page.h
@@ -217,7 +217,7 @@ static inline pte_t read_pte(const pte_t *p)
     return read_atomic(p);
 }
 
-static inline pte_t pte_from_mfn(mfn_t mfn, unsigned int flags)
+static inline pte_t pte_from_mfn(mfn_t mfn, pte_attr_t flags)
 {
     unsigned long pte = (mfn_x(mfn) << PTE_PPN_SHIFT) | flags;
     return (pte_t){ .pte = pte };
diff --git a/xen/arch/riscv/pt.c b/xen/arch/riscv/pt.c
index ef84b6b078..d6cc68b7db 100644
--- a/xen/arch/riscv/pt.c
+++ b/xen/arch/riscv/pt.c
@@ -25,7 +25,7 @@ static inline mfn_t get_root_page(void)
  * See the comment about the possible combination of (mfn, flags) in
  * the comment above pt_update().
  */
-static bool pt_check_entry(pte_t entry, mfn_t mfn, unsigned int flags)
+static bool pt_check_entry(pte_t entry, mfn_t mfn, pte_attr_t flags)
 {
     /* Sanity check when modifying an entry. */
     if ( (flags & PTE_VALID) && mfn_eq(mfn, INVALID_MFN) )
@@ -260,7 +260,7 @@ pte_t pt_walk(vaddr_t va, unsigned int *pte_level)
  */
 static int pt_update_entry(mfn_t root, vaddr_t virt,
                            mfn_t mfn, unsigned int *target,
-                           unsigned int flags)
+                           pte_attr_t flags)
 {
     int rc;
     /*
@@ -355,7 +355,7 @@ static int pt_update_entry(mfn_t root, vaddr_t virt,
 
 /* Return the level where mapping should be done */
 static int pt_mapping_level(unsigned long vfn, mfn_t mfn, unsigned long nr,
-                            unsigned int flags)
+                            pte_attr_t flags)
 {
     unsigned int level = 0;
     unsigned long mask;
@@ -409,7 +409,7 @@ static DEFINE_SPINLOCK(pt_lock);
  * inserting will be done.
  */
 static int pt_update(vaddr_t virt, mfn_t mfn,
-                     unsigned long nr_mfns, unsigned int flags)
+                     unsigned long nr_mfns, pte_attr_t flags)
 {
     int rc = 0;
     unsigned long vfn = PFN_DOWN(virt);
@@ -537,7 +537,7 @@ int __init populate_pt_range(unsigned long virt, unsigned long nr_mfns)
 }
 
 /* Map a 4k page in a fixmap entry */
-void set_fixmap(unsigned int map, mfn_t mfn, unsigned int flags)
+void set_fixmap(unsigned int map, mfn_t mfn, pte_attr_t flags)
 {
     if ( map_pages_to_xen(FIXMAP_ADDR(map), mfn, 1, flags | PTE_SMALL) != 0 )
         BUG();

~ Oleksii



    


    

    

      
~ Oleksii


      

        
 xen/arch/x86/mm.c                   | 6 +++---
 xen/common/efi/boot.c               | 5 +++--
 xen/common/vmap.c                   | 2 +-
 xen/include/asm-generic/mm-types.h  | 2 ++
 xen/include/xen/mm.h                | 7 ++++---
 xen/include/xen/vmap.h              | 4 +++-
 11 files changed, 27 insertions(+), 15 deletions(-)
 create mode 100644 xen/arch/ppc/include/asm/mm-types.h

diff --git a/xen/arch/arm/mmu/pt.c b/xen/arch/arm/mmu/pt.c
index da28d669e7..9dc99db352 100644
--- a/xen/arch/arm/mmu/pt.c
+++ b/xen/arch/arm/mmu/pt.c
@@ -701,7 +701,7 @@ static int xen_pt_update(unsigned long virt,
 int map_pages_to_xen(unsigned long virt,
                      mfn_t mfn,
                      unsigned long nr_mfns,
-                     unsigned int flags)
+                     pte_attr_t flags)
 {
     return xen_pt_update(virt, mfn, nr_mfns, flags);
 }
@@ -719,7 +719,7 @@ int destroy_xen_mappings(unsigned long s, unsigned long e)
     return xen_pt_update(s, INVALID_MFN, (e - s) >> PAGE_SHIFT, 0);
 }

-int modify_xen_mappings(unsigned long s, unsigned long e, unsigned int nf)
+int modify_xen_mappings(unsigned long s, unsigned long e, pte_attr_t nf)
 {
     ASSERT(IS_ALIGNED(s, PAGE_SIZE));
     ASSERT(IS_ALIGNED(e, PAGE_SIZE));
diff --git a/xen/arch/ppc/include/asm/Makefile b/xen/arch/ppc/include/asm/Makefile
index c0dbc68ac6..c989a7f89b 100644
--- a/xen/arch/ppc/include/asm/Makefile
+++ b/xen/arch/ppc/include/asm/Makefile
@@ -5,7 +5,6 @@ generic-y += div64.h
 generic-y += hardirq.h
 generic-y += hypercall.h
 generic-y += iocap.h
-generic-y += mm-types.h
 generic-y += paging.h
 generic-y += percpu.h
 generic-y += perfc_defn.h
diff --git a/xen/arch/ppc/include/asm/mm-types.h b/xen/arch/ppc/include/asm/mm-types.h
new file mode 100644
index 0000000000..0cb850f4f6
--- /dev/null
+++ b/xen/arch/ppc/include/asm/mm-types.h
@@ -0,0 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef __ASM_PPC_MM_TYPES_H__
+#define __ASM_PPC_MM_TYPES_H__
+
+typedef unsigned long pte_attr_t;
+
+#endif /* __ASM_PPC_MM_TYPES_H__ */
diff --git a/xen/arch/ppc/mm-radix.c b/xen/arch/ppc/mm-radix.c
index 24232f3907..e02dffa7c5 100644
--- a/xen/arch/ppc/mm-radix.c
+++ b/xen/arch/ppc/mm-radix.c
@@ -265,7 +265,7 @@ int destroy_xen_mappings(unsigned long s, unsigned long e)
 int map_pages_to_xen(unsigned long virt,
                      mfn_t mfn,
                      unsigned long nr_mfns,
-                     unsigned int flags)
+                     pte_attr_t flags)
 {
     BUG_ON("unimplemented");
 }
diff --git a/xen/arch/riscv/pt.c b/xen/arch/riscv/pt.c
index 857619d48d..918b1b91ab 100644
--- a/xen/arch/riscv/pt.c
+++ b/xen/arch/riscv/pt.c
@@ -504,7 +504,7 @@ static int pt_update(vaddr_t virt, mfn_t mfn,
 int map_pages_to_xen(unsigned long virt,
                      mfn_t mfn,
                      unsigned long nr_mfns,
-                     unsigned int flags)
+                     pte_attr_t flags)
 {
     /*
      * Ensure that flags has PTE_VALID bit as map_pages_to_xen() is supposed
diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index bfdc8fb019..53c17c6f88 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -5472,7 +5472,7 @@ int map_pages_to_xen(
     unsigned long virt,
     mfn_t mfn,
     unsigned long nr_mfns,
-    unsigned int flags)
+    pte_attr_t flags)
 {
     bool locking = system_state > SYS_STATE_boot;
     l3_pgentry_t *pl3e = NULL, ol3e;
@@ -5890,7 +5890,7 @@ int __init populate_pt_range(unsigned long virt, unsigned long nr_mfns)
  *
  * It is an error to call with present flags over an unpopulated range.
  */
-int modify_xen_mappings(unsigned long s, unsigned long e, unsigned int nf)
+int modify_xen_mappings(unsigned long s, unsigned long e, pte_attr_t nf)
 {
     bool locking = system_state > SYS_STATE_boot;
     l3_pgentry_t *pl3e = NULL;
@@ -6186,7 +6186,7 @@ int destroy_xen_mappings(unsigned long s, unsigned long e)
  * the non-inclusive boundary will be updated.
  */
 void init_or_livepatch modify_xen_mappings_lite(
-    unsigned long s, unsigned long e, unsigned int nf)
+    unsigned long s, unsigned long e, pte_attr_t nf)
 {
     unsigned long v = s, fm, flags;

diff --git a/xen/common/efi/boot.c b/xen/common/efi/boot.c
index efbec00af9..999dbce4dc 100644
--- a/xen/common/efi/boot.c
+++ b/xen/common/efi/boot.c
@@ -1,4 +1,5 @@
 #include "efi.h"
+#include <asm/mm-types.h>
 #include <efi/efiprot.h>
 #include <efi/efipciio.h>
 #include <public/xen.h>
@@ -1656,7 +1657,7 @@ void __init efi_init_memory(void)
     struct rt_extra {
         struct rt_extra *next;
         unsigned long smfn, emfn;
-        unsigned int prot;
+        pte_attr_t prot;
     } *extra, *extra_head = NULL;

     free_ebmalloc_unused_mem();
@@ -1671,7 +1672,7 @@ void __init efi_init_memory(void)
         EFI_MEMORY_DESCRIPTOR *desc = efi_memmap + i;
         u64 len = desc->NumberOfPages << EFI_PAGE_SHIFT;
         unsigned long smfn, emfn;
-        unsigned int prot = PAGE_HYPERVISOR_RWX;
+        pte_attr_t prot = PAGE_HYPERVISOR_RWX;
         paddr_t mem_base;
         unsigned long mem_npages;

diff --git a/xen/common/vmap.c b/xen/common/vmap.c
index 47225fecc0..d6991421f3 100644
--- a/xen/common/vmap.c
+++ b/xen/common/vmap.c
@@ -222,7 +222,7 @@ static void vm_free(const void *va)
 }

 void *__vmap(const mfn_t *mfn, unsigned int granularity,
-             unsigned int nr, unsigned int align, unsigned int flags,
+             unsigned int nr, unsigned int align, pte_attr_t flags,
              enum vmap_region type)
 {
     void *va = vm_alloc(nr * granularity, align, type);
diff --git a/xen/include/asm-generic/mm-types.h b/xen/include/asm-generic/mm-types.h
index 26490e48db..9eb3cba698 100644
--- a/xen/include/asm-generic/mm-types.h
+++ b/xen/include/asm-generic/mm-types.h
@@ -2,4 +2,6 @@
 #ifndef __ASM_GENERIC_MM_TYPES_H__
 #define __ASM_GENERIC_MM_TYPES_H__

+typedef unsigned int pte_attr_t;
+
 #endif /* __ASM_GENERIC_MM_TYPES_H__ */
diff --git a/xen/include/xen/mm.h b/xen/include/xen/mm.h
index 16f733281a..e79f1728c3 100644
--- a/xen/include/xen/mm.h
+++ b/xen/include/xen/mm.h
@@ -69,6 +69,7 @@
 #include <xen/spinlock.h>
 #include <xen/perfc.h>
 #include <public/memory.h>
+#include <asm/mm-types.h>

 struct page_info;

@@ -113,11 +114,11 @@ int map_pages_to_xen(
     unsigned long virt,
     mfn_t mfn,
     unsigned long nr_mfns,
-    unsigned int flags);
+    pte_attr_t flags);
 /* Alter the permissions of a range of Xen virtual address space. */
-int modify_xen_mappings(unsigned long s, unsigned long e, unsigned int nf);
+int modify_xen_mappings(unsigned long s, unsigned long e, pte_attr_t nf);
 void modify_xen_mappings_lite(unsigned long s, unsigned long e,
-                              unsigned int nf);
+                              pte_attr_t nf);
 int destroy_xen_mappings(unsigned long s, unsigned long e);
 /* Retrieve the MFN mapped by VA in Xen virtual address space. */
 mfn_t xen_map_to_mfn(unsigned long va);
diff --git a/xen/include/xen/vmap.h b/xen/include/xen/vmap.h
index 26c831757a..e1155ed14a 100644
--- a/xen/include/xen/vmap.h
+++ b/xen/include/xen/vmap.h
@@ -8,8 +8,10 @@
 #ifndef __XEN_VMAP_H__
 #define __XEN_VMAP_H__

+#include <xen/mm.h>
 #include <xen/mm-frame.h>
 #include <xen/page-size.h>
+#include <asm/mm-types.h>

 /* Identifiers for the linear ranges tracked by vmap */
 enum vmap_region {
@@ -57,7 +59,7 @@ void vm_init_type(enum vmap_region type, void *start, void *end);
  * @return Pointer to the mapped area on success; NULL otherwise.
  */
 void *__vmap(const mfn_t *mfn, unsigned int granularity, unsigned int nr,
-             unsigned int align, unsigned int flags, enum vmap_region type);
+             unsigned int align, pte_attr_t flags, enum vmap_region type);

 /*
  * Map an array of pages contiguously into the VMAP_DEFAULT vmap region
--
2.30.2



      

    

  


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From: Andrew Cooper 
To: Xen-devel 
Cc: Shawn Anastasio ,
	Andrew Cooper ,
	Oleksii Kurochko ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Julien Grall ,
	Volodymyr Babchuk ,
	Bertrand Marquis ,
	Michal Orzel 
Subject: [PATCH v5 2/3] xen/mm: Switch some APIs over to pte_attr_t
Date: Fri, 25 Apr 2025 12:24:14 +0100
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From: Shawn Anastasio 

Several APIs take an architecture-dependent set of flags in an unsigned int,
but this needs to be a wider type to support PPC.

The new type pte_attr_t has been introduced for this purpose, so switch to it
in map_pages_to_xen(), __vmap() and modify_xen_mappings{,_lite}().

No functional change.

Suggested-by: Andrew Cooper 
Signed-off-by: Shawn Anastasio 
Signed-off-by: Andrew Cooper 
Reviewed-by: Oleksii Kurochko 
---
CC: Jan Beulich 
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Julien Grall 
CC: Volodymyr Babchuk 
CC: Bertrand Marquis 
CC: Michal Orzel 
CC: Oleksii Kurochko 
CC: Shawn Anastasio 
---
 xen/arch/arm/mmu/pt.c   | 4 ++--
 xen/arch/ppc/mm-radix.c | 2 +-
 xen/arch/riscv/pt.c     | 2 +-
 xen/arch/x86/mm.c       | 6 +++---
 xen/common/efi/boot.c   | 4 ++--
 xen/common/vmap.c       | 2 +-
 xen/include/xen/mm.h    | 7 ++++---
 xen/include/xen/vmap.h  | 3 ++-
 8 files changed, 16 insertions(+), 14 deletions(-)

diff --git a/xen/arch/arm/mmu/pt.c b/xen/arch/arm/mmu/pt.c
index 11cb1c66dac8..4726e713efd3 100644
--- a/xen/arch/arm/mmu/pt.c
+++ b/xen/arch/arm/mmu/pt.c
@@ -696,7 +696,7 @@ static int xen_pt_update(unsigned long virt,
 int map_pages_to_xen(unsigned long virt,
                      mfn_t mfn,
                      unsigned long nr_mfns,
-                     unsigned int flags)
+                     pte_attr_t flags)
 {
     return xen_pt_update(virt, mfn, nr_mfns, flags);
 }
@@ -714,7 +714,7 @@ int destroy_xen_mappings(unsigned long s, unsigned long e)
     return xen_pt_update(s, INVALID_MFN, (e - s) >> PAGE_SHIFT, 0);
 }
 
-int modify_xen_mappings(unsigned long s, unsigned long e, unsigned int nf)
+int modify_xen_mappings(unsigned long s, unsigned long e, pte_attr_t nf)
 {
     ASSERT(IS_ALIGNED(s, PAGE_SIZE));
     ASSERT(IS_ALIGNED(e, PAGE_SIZE));
diff --git a/xen/arch/ppc/mm-radix.c b/xen/arch/ppc/mm-radix.c
index 9a00ae416af0..d5385ec9dd4b 100644
--- a/xen/arch/ppc/mm-radix.c
+++ b/xen/arch/ppc/mm-radix.c
@@ -265,7 +265,7 @@ int destroy_xen_mappings(unsigned long s, unsigned long e)
 int map_pages_to_xen(unsigned long virt,
                      mfn_t mfn,
                      unsigned long nr_mfns,
-                     unsigned int flags)
+                     pte_attr_t flags)
 {
     BUG_ON("unimplemented");
 }
diff --git a/xen/arch/riscv/pt.c b/xen/arch/riscv/pt.c
index 857619d48df1..918b1b91abde 100644
--- a/xen/arch/riscv/pt.c
+++ b/xen/arch/riscv/pt.c
@@ -504,7 +504,7 @@ static int pt_update(vaddr_t virt, mfn_t mfn,
 int map_pages_to_xen(unsigned long virt,
                      mfn_t mfn,
                      unsigned long nr_mfns,
-                     unsigned int flags)
+                     pte_attr_t flags)
 {
     /*
      * Ensure that flags has PTE_VALID bit as map_pages_to_xen() is supposed
diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 1cf236516789..0e6c766be4aa 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -5442,7 +5442,7 @@ int map_pages_to_xen(
     unsigned long virt,
     mfn_t mfn,
     unsigned long nr_mfns,
-    unsigned int flags)
+    pte_attr_t flags)
 {
     bool locking = system_state > SYS_STATE_boot;
     l3_pgentry_t *pl3e = NULL, ol3e;
@@ -5860,7 +5860,7 @@ int __init populate_pt_range(unsigned long virt, unsigned long nr_mfns)
  *
  * It is an error to call with present flags over an unpopulated range.
  */
-int modify_xen_mappings(unsigned long s, unsigned long e, unsigned int nf)
+int modify_xen_mappings(unsigned long s, unsigned long e, pte_attr_t nf)
 {
     bool locking = system_state > SYS_STATE_boot;
     l3_pgentry_t *pl3e = NULL;
@@ -6156,7 +6156,7 @@ int destroy_xen_mappings(unsigned long s, unsigned long e)
  * the non-inclusive boundary will be updated.
  */
 void init_or_livepatch modify_xen_mappings_lite(
-    unsigned long s, unsigned long e, unsigned int nf)
+    unsigned long s, unsigned long e, pte_attr_t nf)
 {
     unsigned long v = s, fm, flags;
 
diff --git a/xen/common/efi/boot.c b/xen/common/efi/boot.c
index 143b5681ba92..e39fbc3529c4 100644
--- a/xen/common/efi/boot.c
+++ b/xen/common/efi/boot.c
@@ -1676,7 +1676,7 @@ void __init efi_init_memory(void)
     struct rt_extra {
         struct rt_extra *next;
         unsigned long smfn, emfn;
-        unsigned int prot;
+        pte_attr_t prot;
     } *extra, *extra_head = NULL;
 
     free_ebmalloc_unused_mem();
@@ -1691,7 +1691,7 @@ void __init efi_init_memory(void)
         EFI_MEMORY_DESCRIPTOR *desc = efi_memmap + i;
         u64 len = desc->NumberOfPages << EFI_PAGE_SHIFT;
         unsigned long smfn, emfn;
-        unsigned int prot = PAGE_HYPERVISOR_RWX;
+        pte_attr_t prot = PAGE_HYPERVISOR_RWX;
         paddr_t mem_base;
         unsigned long mem_npages;
 
diff --git a/xen/common/vmap.c b/xen/common/vmap.c
index 47225fecc067..d6991421f3f7 100644
--- a/xen/common/vmap.c
+++ b/xen/common/vmap.c
@@ -222,7 +222,7 @@ static void vm_free(const void *va)
 }
 
 void *__vmap(const mfn_t *mfn, unsigned int granularity,
-             unsigned int nr, unsigned int align, unsigned int flags,
+             unsigned int nr, unsigned int align, pte_attr_t flags,
              enum vmap_region type)
 {
     void *va = vm_alloc(nr * granularity, align, type);
diff --git a/xen/include/xen/mm.h b/xen/include/xen/mm.h
index ae1c48a61545..e89942b87d1e 100644
--- a/xen/include/xen/mm.h
+++ b/xen/include/xen/mm.h
@@ -64,6 +64,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -113,11 +114,11 @@ int map_pages_to_xen(
     unsigned long virt,
     mfn_t mfn,
     unsigned long nr_mfns,
-    unsigned int flags);
+    pte_attr_t flags);
 /* Alter the permissions of a range of Xen virtual address space. */
-int modify_xen_mappings(unsigned long s, unsigned long e, unsigned int nf);
+int modify_xen_mappings(unsigned long s, unsigned long e, pte_attr_t nf);
 void modify_xen_mappings_lite(unsigned long s, unsigned long e,
-                              unsigned int nf);
+                              pte_attr_t nf);
 int destroy_xen_mappings(unsigned long s, unsigned long e);
 /* Retrieve the MFN mapped by VA in Xen virtual address space. */
 mfn_t xen_map_to_mfn(unsigned long va);
diff --git a/xen/include/xen/vmap.h b/xen/include/xen/vmap.h
index 26c831757a11..327a2597826d 100644
--- a/xen/include/xen/vmap.h
+++ b/xen/include/xen/vmap.h
@@ -9,6 +9,7 @@
 #define __XEN_VMAP_H__
 
 #include 
+#include 
 #include 
 
 /* Identifiers for the linear ranges tracked by vmap */
@@ -57,7 +58,7 @@ void vm_init_type(enum vmap_region type, void *start, void *end);
  * @return Pointer to the mapped area on success; NULL otherwise.
  */
 void *__vmap(const mfn_t *mfn, unsigned int granularity, unsigned int nr,
-             unsigned int align, unsigned int flags, enum vmap_region type);
+             unsigned int align, pte_attr_t flags, enum vmap_region type);
 
 /*
  * Map an array of pages contiguously into the VMAP_DEFAULT vmap region
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Julien Grall ,
	Volodymyr Babchuk ,
	Bertrand Marquis ,
	Michal Orzel ,
	Oleksii Kurochko ,
	Shawn Anastasio 
Subject: [PATCH v5 0/3] xen/mm: Introduce pte_attr_t
Date: Fri, 25 Apr 2025 12:24:12 +0100
Message-Id: <20250425112415.245585-1-andrew.cooper3@citrix.com>
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This is in order to support PPC needing wider flags, but I've also written it
as a showcase of the new __has_include().

https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/1786141700

Andrew Cooper (1):
  xen/mm: Introduce mm-types.h

Shawn Anastasio (2):
  xen/mm: Switch some APIs over to pte_attr_t
  ppc/mm: Introduce mm-types.h

 xen/arch/arm/mmu/pt.c               |  4 ++--
 xen/arch/ppc/include/asm/mm-types.h |  7 +++++++
 xen/arch/ppc/mm-radix.c             |  2 +-
 xen/arch/riscv/pt.c                 |  2 +-
 xen/arch/x86/mm.c                   |  6 +++---
 xen/common/efi/boot.c               |  4 ++--
 xen/common/vmap.c                   |  2 +-
 xen/include/xen/mm-types.h          | 19 +++++++++++++++++++
 xen/include/xen/mm.h                |  7 ++++---
 xen/include/xen/vmap.h              |  3 ++-
 10 files changed, 42 insertions(+), 14 deletions(-)
 create mode 100644 xen/arch/ppc/include/asm/mm-types.h
 create mode 100644 xen/include/xen/mm-types.h


base-commit: 6dc1b711ded0e477c501d4017ccb0da83d6d56a1
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Shawn Anastasio ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Julien Grall ,
	Volodymyr Babchuk ,
	Bertrand Marquis ,
	Michal Orzel ,
	Oleksii Kurochko 
Subject: [PATCH v5 3/3] ppc/mm: Introduce mm-types.h
Date: Fri, 25 Apr 2025 12:24:15 +0100
Message-Id: <20250425112415.245585-4-andrew.cooper3@citrix.com>
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From: Shawn Anastasio 

Signed-off-by: Shawn Anastasio 
---
CC: Jan Beulich 
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Julien Grall 
CC: Volodymyr Babchuk 
CC: Bertrand Marquis 
CC: Michal Orzel 
CC: Oleksii Kurochko 
CC: Shawn Anastasio 

Possibly not for taking on it's own (might be better with the PPC
implemenation of map_pages_to_xen()).

Nevertheless, this patch alone now does trip:

  diff --git a/xen/common/vmap.c b/xen/common/vmap.c
  index d6991421f3f7..9552806dba39 100644
  --- a/xen/common/vmap.c
  +++ b/xen/common/vmap.c
  @@ -228,6 +228,8 @@ void *__vmap(const mfn_t *mfn, unsigned int granularity,
       void *va = vm_alloc(nr * granularity, align, type);
       unsigned long cur = (unsigned long)va;

  +    BUILD_BUG_ON(sizeof(pte_attr_t) != 4);
  +
       for ( ; va && nr--; ++mfn, cur += PAGE_SIZE * granularity )
       {
           if ( map_pages_to_xen(cur, *mfn, granularity, flags) )

in PPC builds only.
---
 xen/arch/ppc/include/asm/mm-types.h | 7 +++++++
 1 file changed, 7 insertions(+)
 create mode 100644 xen/arch/ppc/include/asm/mm-types.h

diff --git a/xen/arch/ppc/include/asm/mm-types.h b/xen/arch/ppc/include/asm/mm-types.h
new file mode 100644
index 000000000000..06a3af1c6eda
--- /dev/null
+++ b/xen/arch/ppc/include/asm/mm-types.h
@@ -0,0 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef PPC_MM_TYPES_H
+#define PPC_MM_TYPES_H
+
+typedef unsigned long pte_attr_t;
+
+#endif /* PPC_MM_TYPES_H */
-- 
2.39.5



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Julien Grall ,
	Volodymyr Babchuk ,
	Bertrand Marquis ,
	Michal Orzel ,
	Oleksii Kurochko ,
	Shawn Anastasio 
Subject: [PATCH v5 1/3] xen/mm: Introduce mm-types.h
Date: Fri, 25 Apr 2025 12:24:13 +0100
Message-Id: <20250425112415.245585-2-andrew.cooper3@citrix.com>
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The type used for pagetable attributes/permissions is currently unsigned int,
but needs to become architecture dependent as PPC needs unsigned long.

Introduce mm-types.h to house pte_attr_t.

Given the new toolchain baseline, we can use __has_include() now to remove the
need for boilerplate on most architectures.

Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
CC: Roger Pau Monné 
CC: Stefano Stabellini 
CC: Julien Grall 
CC: Volodymyr Babchuk 
CC: Bertrand Marquis 
CC: Michal Orzel 
CC: Oleksii Kurochko 
CC: Shawn Anastasio 

__has_include() was one of the justifications for the new toolchain baseline,
and is included in https://gitlab.com/xen-project/xen/-/issues/201
---
 xen/include/xen/mm-types.h | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)
 create mode 100644 xen/include/xen/mm-types.h

diff --git a/xen/include/xen/mm-types.h b/xen/include/xen/mm-types.h
new file mode 100644
index 000000000000..19f692e9aaa4
--- /dev/null
+++ b/xen/include/xen/mm-types.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef XEN_MM_TYPES_H
+#define XEN_MM_TYPES_H
+
+/*
+ * Types used to abstract away architecture-specific details in the memory
+ * management code.
+ *
+ * Architectures need only provide their own asm/mm-types.h if they want to
+ * override the defaults given here.
+ */
+#if __has_include()
+# include 
+#else /* !__has_include() */
+
+typedef unsigned int pte_attr_t;
+
+#endif /* !__has_include() */
+#endif /* XEN_MM_TYPES_H */
-- 
2.39.5



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Date: Fri, 25 Apr 2025 13:29:01 +0200
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Subject: Re: [PATCH v5 1/3] xen/mm: Introduce mm-types.h
To: Andrew Cooper ,
 Xen-devel 
Cc: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Stefano Stabellini ,
 Julien Grall , Volodymyr Babchuk
 , Bertrand Marquis ,
 Michal Orzel ,
 Shawn Anastasio 
References: <20250425112415.245585-1-andrew.cooper3@citrix.com>
 <20250425112415.245585-2-andrew.cooper3@citrix.com>
Content-Language: en-US
From: Oleksii Kurochko 
In-Reply-To: <20250425112415.245585-2-andrew.cooper3@citrix.com>

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On 4/25/25 1:24 PM, Andrew Cooper wrote:
> The type used for pagetable attributes/permissions is currently unsigned int,
> but needs to become architecture dependent as PPC needs unsigned long.

Not only PPC, RISC-V needs it too.

>
> Introduce mm-types.h to house pte_attr_t.

Do we really want a separate mm-types.h?
If yes then:
  Reviewed-by: Oleksii Kurochko

~ Oleksii

>
> Given the new toolchain baseline, we can use __has_include() now to remove the
> need for boilerplate on most architectures.
>
> Signed-off-by: Andrew Cooper
> ---
> CC: Jan Beulich
> CC: Roger Pau Monné
> CC: Stefano Stabellini
> CC: Julien Grall
> CC: Volodymyr Babchuk
> CC: Bertrand Marquis
> CC: Michal Orzel
> CC: Oleksii Kurochko
> CC: Shawn Anastasio
>
> __has_include() was one of the justifications for the new toolchain baseline,
> and is included inhttps://gitlab.com/xen-project/xen/-/issues/201
> ---
>   xen/include/xen/mm-types.h | 19 +++++++++++++++++++
>   1 file changed, 19 insertions(+)
>   create mode 100644 xen/include/xen/mm-types.h
>
> diff --git a/xen/include/xen/mm-types.h b/xen/include/xen/mm-types.h
> new file mode 100644
> index 000000000000..19f692e9aaa4
> --- /dev/null
> +++ b/xen/include/xen/mm-types.h
> @@ -0,0 +1,19 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +#ifndef XEN_MM_TYPES_H
> +#define XEN_MM_TYPES_H
> +
> +/*
> + * Types used to abstract away architecture-specific details in the memory
> + * management code.
> + *
> + * Architectures need only provide their own asm/mm-types.h if they want to
> + * override the defaults given here.
> + */
> +#if __has_include()
> +# include 
> +#else /* !__has_include() */
> +
> +typedef unsigned int pte_attr_t;
> +
> +#endif /* !__has_include() */
> +#endif /* XEN_MM_TYPES_H */
--------------E2FUEUj2sfNWNJrxaWVk0hsc
Content-Type: text/html; charset=UTF-8
Content-Transfer-Encoding: 8bit



  
    
  
  
    


    

    
On 4/25/25 1:24 PM, Andrew Cooper
      wrote:

    

    

      
The type used for pagetable attributes/permissions is currently unsigned int,
but needs to become architecture dependent as PPC needs unsigned long.

    

    
Not only PPC, RISC-V needs it too.



    

      

Introduce mm-types.h to house pte_attr_t.

    

    
Do we really want a separate mm-types.h?
If yes then:
 Reviewed-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>

~ Oleksii


    

      

Given the new toolchain baseline, we can use __has_include() now to remove the
need for boilerplate on most architectures.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
CC: Jan Beulich <JBeulich@suse.com>
CC: Roger Pau Monné <roger.pau@citrix.com>
CC: Stefano Stabellini <sstabellini@kernel.org>
CC: Julien Grall <julien@xen.org>
CC: Volodymyr Babchuk <Volodymyr_Babchuk@epam.com>
CC: Bertrand Marquis <bertrand.marquis@arm.com>
CC: Michal Orzel <michal.orzel@amd.com>
CC: Oleksii Kurochko <oleksii.kurochko@gmail.com>
CC: Shawn Anastasio <sanastasio@raptorengineering.com>

__has_include() was one of the justifications for the new toolchain baseline,
and is included in https://gitlab.com/xen-project/xen/-/issues/201
---
 xen/include/xen/mm-types.h | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)
 create mode 100644 xen/include/xen/mm-types.h

diff --git a/xen/include/xen/mm-types.h b/xen/include/xen/mm-types.h
new file mode 100644
index 000000000000..19f692e9aaa4
--- /dev/null
+++ b/xen/include/xen/mm-types.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef XEN_MM_TYPES_H
+#define XEN_MM_TYPES_H
+
+/*
+ * Types used to abstract away architecture-specific details in the memory
+ * management code.
+ *
+ * Architectures need only provide their own asm/mm-types.h if they want to
+ * override the defaults given here.
+ */
+#if __has_include(<asm/mm-types.h>)
+# include <asm/mm-types.h>
+#else /* !__has_include(<asm/mm-types.h>) */
+
+typedef unsigned int pte_attr_t;
+
+#endif /* !__has_include(<asm/mm-types.h>) */
+#endif /* XEN_MM_TYPES_H */


    

  


--------------E2FUEUj2sfNWNJrxaWVk0hsc--


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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	Stefano Stabellini 
Subject: [PATCH v2] xen: fix buffer over-read in bitmap_to_xenctl_bitmap()
Date: Fri, 25 Apr 2025 13:32:27 +0200
Message-ID: <20250425113227.10243-1-roger.pau@citrix.com>
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There's an off-by-one when calculating the last byte in the input array to
bitmap_to_xenctl_bitmap(), which leads to bitmaps with sizes multiple of 8
to over-read and incorrectly use a byte past the end of the array.

Fixes: 288c4641c80d ('xen: simplify bitmap_to_xenctl_bitmap for little endian')
Signed-off-by: Roger Pau Monné 
---
Changes since v1:
 - Handle length 0.
---
 xen/common/bitmap.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/xen/common/bitmap.c b/xen/common/bitmap.c
index bf1a7fd91e36..4f96fda3895c 100644
--- a/xen/common/bitmap.c
+++ b/xen/common/bitmap.c
@@ -369,6 +369,9 @@ int bitmap_to_xenctl_bitmap(struct xenctl_bitmap *xenctl_bitmap,
     const uint8_t *bytemap;
     uint8_t last, *buf = NULL;
 
+    if ( !nbits )
+        return 0;
+
     if ( !IS_ENABLED(LITTLE_ENDIAN) )
     {
         buf = xmalloc_array(uint8_t, xen_bytes);
@@ -396,7 +399,7 @@ int bitmap_to_xenctl_bitmap(struct xenctl_bitmap *xenctl_bitmap,
      * their loops to 8 bits. Ensure we clear those left over bits so as to
      * prevent surprises.
      */
-    last = bytemap[nbits / 8];
+    last = bytemap[(nbits - 1) / 8];
     if ( nbits % 8 )
         last &= (1U << (nbits % 8)) - 1;
 
-- 
2.48.1



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Date: Fri, 25 Apr 2025 13:33:40 +0200
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v5 2/3] xen/mm: Switch some APIs over to pte_attr_t
To: Andrew Cooper ,
 Xen-devel 
Cc: Shawn Anastasio ,
 Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Stefano Stabellini ,
 Julien Grall , Volodymyr Babchuk
 , Bertrand Marquis ,
 Michal Orzel 
References: <20250425112415.245585-1-andrew.cooper3@citrix.com>
 <20250425112415.245585-3-andrew.cooper3@citrix.com>
Content-Language: en-US
From: Oleksii Kurochko 
In-Reply-To: <20250425112415.245585-3-andrew.cooper3@citrix.com>

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--------------Zgr0ogap5EvgzVoR73L0BTzY
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On 4/25/25 1:24 PM, Andrew Cooper wrote:
> From: Shawn Anastasio
>
> Several APIs take an architecture-dependent set of flags in an unsigned int,
> but this needs to be a wider type to support PPC.
>
> The new type pte_attr_t has been introduced for this purpose, so switch to it
> in map_pages_to_xen(), __vmap() and modify_xen_mappings{,_lite}().
>
> No functional change.
>
> Suggested-by: Andrew Cooper
> Signed-off-by: Shawn Anastasio
> Signed-off-by: Andrew Cooper
> Reviewed-by: Oleksii Kurochko
> ---
> CC: Jan Beulich
> CC: Roger Pau Monné
> CC: Stefano Stabellini
> CC: Julien Grall
> CC: Volodymyr Babchuk
> CC: Bertrand Marquis
> CC: Michal Orzel
> CC: Oleksii Kurochko
> CC: Shawn Anastasio
> ---
>   xen/arch/arm/mmu/pt.c   | 4 ++--
>   xen/arch/ppc/mm-radix.c | 2 +-
>   xen/arch/riscv/pt.c     | 2 +-

As I wrote here, probably, as a part of this patch we also wants to do the following changes:
   https://lore.kernel.org/xen-devel/192683d3-8777-45c2-b8a8-546bf171a7aa@gmail.com/T/#u

I'm okay with sending the mentioned changes in the link as a separate patch when I will introduce
Svpmbt extension which uses 61 and 62 bits. Let me know if you are okay with that?

If you think that these changes should be part of this patch then something similar for Arm should
be done too now.

~ Oleksii

>   xen/arch/x86/mm.c       | 6 +++---
>   xen/common/efi/boot.c   | 4 ++--
>   xen/common/vmap.c       | 2 +-
>   xen/include/xen/mm.h    | 7 ++++---
>   xen/include/xen/vmap.h  | 3 ++-
>   8 files changed, 16 insertions(+), 14 deletions(-)
>
> diff --git a/xen/arch/arm/mmu/pt.c b/xen/arch/arm/mmu/pt.c
> index 11cb1c66dac8..4726e713efd3 100644
> --- a/xen/arch/arm/mmu/pt.c
> +++ b/xen/arch/arm/mmu/pt.c
> @@ -696,7 +696,7 @@ static int xen_pt_update(unsigned long virt,
>   int map_pages_to_xen(unsigned long virt,
>                        mfn_t mfn,
>                        unsigned long nr_mfns,
> -                     unsigned int flags)
> +                     pte_attr_t flags)
>   {
>       return xen_pt_update(virt, mfn, nr_mfns, flags);
>   }
> @@ -714,7 +714,7 @@ int destroy_xen_mappings(unsigned long s, unsigned long e)
>       return xen_pt_update(s, INVALID_MFN, (e - s) >> PAGE_SHIFT, 0);
>   }
>   
> -int modify_xen_mappings(unsigned long s, unsigned long e, unsigned int nf)
> +int modify_xen_mappings(unsigned long s, unsigned long e, pte_attr_t nf)
>   {
>       ASSERT(IS_ALIGNED(s, PAGE_SIZE));
>       ASSERT(IS_ALIGNED(e, PAGE_SIZE));
> diff --git a/xen/arch/ppc/mm-radix.c b/xen/arch/ppc/mm-radix.c
> index 9a00ae416af0..d5385ec9dd4b 100644
> --- a/xen/arch/ppc/mm-radix.c
> +++ b/xen/arch/ppc/mm-radix.c
> @@ -265,7 +265,7 @@ int destroy_xen_mappings(unsigned long s, unsigned long e)
>   int map_pages_to_xen(unsigned long virt,
>                        mfn_t mfn,
>                        unsigned long nr_mfns,
> -                     unsigned int flags)
> +                     pte_attr_t flags)
>   {
>       BUG_ON("unimplemented");
>   }
> diff --git a/xen/arch/riscv/pt.c b/xen/arch/riscv/pt.c
> index 857619d48df1..918b1b91abde 100644
> --- a/xen/arch/riscv/pt.c
> +++ b/xen/arch/riscv/pt.c
> @@ -504,7 +504,7 @@ static int pt_update(vaddr_t virt, mfn_t mfn,
>   int map_pages_to_xen(unsigned long virt,
>                        mfn_t mfn,
>                        unsigned long nr_mfns,
> -                     unsigned int flags)
> +                     pte_attr_t flags)
>   {
>       /*
>        * Ensure that flags has PTE_VALID bit as map_pages_to_xen() is supposed
> diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
> index 1cf236516789..0e6c766be4aa 100644
> --- a/xen/arch/x86/mm.c
> +++ b/xen/arch/x86/mm.c
> @@ -5442,7 +5442,7 @@ int map_pages_to_xen(
>       unsigned long virt,
>       mfn_t mfn,
>       unsigned long nr_mfns,
> -    unsigned int flags)
> +    pte_attr_t flags)
>   {
>       bool locking = system_state > SYS_STATE_boot;
>       l3_pgentry_t *pl3e = NULL, ol3e;
> @@ -5860,7 +5860,7 @@ int __init populate_pt_range(unsigned long virt, unsigned long nr_mfns)
>    *
>    * It is an error to call with present flags over an unpopulated range.
>    */
> -int modify_xen_mappings(unsigned long s, unsigned long e, unsigned int nf)
> +int modify_xen_mappings(unsigned long s, unsigned long e, pte_attr_t nf)
>   {
>       bool locking = system_state > SYS_STATE_boot;
>       l3_pgentry_t *pl3e = NULL;
> @@ -6156,7 +6156,7 @@ int destroy_xen_mappings(unsigned long s, unsigned long e)
>    * the non-inclusive boundary will be updated.
>    */
>   void init_or_livepatch modify_xen_mappings_lite(
> -    unsigned long s, unsigned long e, unsigned int nf)
> +    unsigned long s, unsigned long e, pte_attr_t nf)
>   {
>       unsigned long v = s, fm, flags;
>   
> diff --git a/xen/common/efi/boot.c b/xen/common/efi/boot.c
> index 143b5681ba92..e39fbc3529c4 100644
> --- a/xen/common/efi/boot.c
> +++ b/xen/common/efi/boot.c
> @@ -1676,7 +1676,7 @@ void __init efi_init_memory(void)
>       struct rt_extra {
>           struct rt_extra *next;
>           unsigned long smfn, emfn;
> -        unsigned int prot;
> +        pte_attr_t prot;
>       } *extra, *extra_head = NULL;
>   
>       free_ebmalloc_unused_mem();
> @@ -1691,7 +1691,7 @@ void __init efi_init_memory(void)
>           EFI_MEMORY_DESCRIPTOR *desc = efi_memmap + i;
>           u64 len = desc->NumberOfPages << EFI_PAGE_SHIFT;
>           unsigned long smfn, emfn;
> -        unsigned int prot = PAGE_HYPERVISOR_RWX;
> +        pte_attr_t prot = PAGE_HYPERVISOR_RWX;
>           paddr_t mem_base;
>           unsigned long mem_npages;
>   
> diff --git a/xen/common/vmap.c b/xen/common/vmap.c
> index 47225fecc067..d6991421f3f7 100644
> --- a/xen/common/vmap.c
> +++ b/xen/common/vmap.c
> @@ -222,7 +222,7 @@ static void vm_free(const void *va)
>   }
>   
>   void *__vmap(const mfn_t *mfn, unsigned int granularity,
> -             unsigned int nr, unsigned int align, unsigned int flags,
> +             unsigned int nr, unsigned int align, pte_attr_t flags,
>                enum vmap_region type)
>   {
>       void *va = vm_alloc(nr * granularity, align, type);
> diff --git a/xen/include/xen/mm.h b/xen/include/xen/mm.h
> index ae1c48a61545..e89942b87d1e 100644
> --- a/xen/include/xen/mm.h
> +++ b/xen/include/xen/mm.h
> @@ -64,6 +64,7 @@
>   #include 
>   #include 
>   #include 
> +#include 
>   #include 
>   #include 
>   #include 
> @@ -113,11 +114,11 @@ int map_pages_to_xen(
>       unsigned long virt,
>       mfn_t mfn,
>       unsigned long nr_mfns,
> -    unsigned int flags);
> +    pte_attr_t flags);
>   /* Alter the permissions of a range of Xen virtual address space. */
> -int modify_xen_mappings(unsigned long s, unsigned long e, unsigned int nf);
> +int modify_xen_mappings(unsigned long s, unsigned long e, pte_attr_t nf);
>   void modify_xen_mappings_lite(unsigned long s, unsigned long e,
> -                              unsigned int nf);
> +                              pte_attr_t nf);
>   int destroy_xen_mappings(unsigned long s, unsigned long e);
>   /* Retrieve the MFN mapped by VA in Xen virtual address space. */
>   mfn_t xen_map_to_mfn(unsigned long va);
> diff --git a/xen/include/xen/vmap.h b/xen/include/xen/vmap.h
> index 26c831757a11..327a2597826d 100644
> --- a/xen/include/xen/vmap.h
> +++ b/xen/include/xen/vmap.h
> @@ -9,6 +9,7 @@
>   #define __XEN_VMAP_H__
>   
>   #include 
> +#include 
>   #include 
>   
>   /* Identifiers for the linear ranges tracked by vmap */
> @@ -57,7 +58,7 @@ void vm_init_type(enum vmap_region type, void *start, void *end);
>    * @return Pointer to the mapped area on success; NULL otherwise.
>    */
>   void *__vmap(const mfn_t *mfn, unsigned int granularity, unsigned int nr,
> -             unsigned int align, unsigned int flags, enum vmap_region type);
> +             unsigned int align, pte_attr_t flags, enum vmap_region type);
>   
>   /*
>    * Map an array of pages contiguously into the VMAP_DEFAULT vmap region
--------------Zgr0ogap5EvgzVoR73L0BTzY
Content-Type: text/html; charset=UTF-8
Content-Transfer-Encoding: 8bit



  
    
  
  
    


    

    
On 4/25/25 1:24 PM, Andrew Cooper
      wrote:

    

    

      
From: Shawn Anastasio <sanastasio@raptorengineering.com>

Several APIs take an architecture-dependent set of flags in an unsigned int,
but this needs to be a wider type to support PPC.

The new type pte_attr_t has been introduced for this purpose, so switch to it
in map_pages_to_xen(), __vmap() and modify_xen_mappings{,_lite}().

No functional change.

Suggested-by: Andrew Cooper <andrew.cooper3@citrix.com>
Signed-off-by: Shawn Anastasio <sanastasio@raptorengineering.com>
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
---
CC: Jan Beulich <JBeulich@suse.com>
CC: Roger Pau Monné <roger.pau@citrix.com>
CC: Stefano Stabellini <sstabellini@kernel.org>
CC: Julien Grall <julien@xen.org>
CC: Volodymyr Babchuk <Volodymyr_Babchuk@epam.com>
CC: Bertrand Marquis <bertrand.marquis@arm.com>
CC: Michal Orzel <michal.orzel@amd.com>
CC: Oleksii Kurochko <oleksii.kurochko@gmail.com>
CC: Shawn Anastasio <sanastasio@raptorengineering.com>
---
 xen/arch/arm/mmu/pt.c   | 4 ++--
 xen/arch/ppc/mm-radix.c | 2 +-
 xen/arch/riscv/pt.c     | 2 +-

    

    
As I wrote here, probably, as a part of this patch we also wants to do the following changes:
  https://lore.kernel.org/xen-devel/192683d3-8777-45c2-b8a8-546bf171a7aa@gmail.com/T/#u

I'm okay with sending the mentioned changes in the link as a separate patch when I will introduce
Svpmbt extension which uses 61 and 62 bits. Let me know if you are okay with that?

If you think that these changes should be part of this patch then something similar for Arm should
be done too now.

~ Oleksii


    

      
 xen/arch/x86/mm.c       | 6 +++---
 xen/common/efi/boot.c   | 4 ++--
 xen/common/vmap.c       | 2 +-
 xen/include/xen/mm.h    | 7 ++++---
 xen/include/xen/vmap.h  | 3 ++-
 8 files changed, 16 insertions(+), 14 deletions(-)

diff --git a/xen/arch/arm/mmu/pt.c b/xen/arch/arm/mmu/pt.c
index 11cb1c66dac8..4726e713efd3 100644
--- a/xen/arch/arm/mmu/pt.c
+++ b/xen/arch/arm/mmu/pt.c
@@ -696,7 +696,7 @@ static int xen_pt_update(unsigned long virt,
 int map_pages_to_xen(unsigned long virt,
                      mfn_t mfn,
                      unsigned long nr_mfns,
-                     unsigned int flags)
+                     pte_attr_t flags)
 {
     return xen_pt_update(virt, mfn, nr_mfns, flags);
 }
@@ -714,7 +714,7 @@ int destroy_xen_mappings(unsigned long s, unsigned long e)
     return xen_pt_update(s, INVALID_MFN, (e - s) >> PAGE_SHIFT, 0);
 }
 
-int modify_xen_mappings(unsigned long s, unsigned long e, unsigned int nf)
+int modify_xen_mappings(unsigned long s, unsigned long e, pte_attr_t nf)
 {
     ASSERT(IS_ALIGNED(s, PAGE_SIZE));
     ASSERT(IS_ALIGNED(e, PAGE_SIZE));
diff --git a/xen/arch/ppc/mm-radix.c b/xen/arch/ppc/mm-radix.c
index 9a00ae416af0..d5385ec9dd4b 100644
--- a/xen/arch/ppc/mm-radix.c
+++ b/xen/arch/ppc/mm-radix.c
@@ -265,7 +265,7 @@ int destroy_xen_mappings(unsigned long s, unsigned long e)
 int map_pages_to_xen(unsigned long virt,
                      mfn_t mfn,
                      unsigned long nr_mfns,
-                     unsigned int flags)
+                     pte_attr_t flags)
 {
     BUG_ON("unimplemented");
 }
diff --git a/xen/arch/riscv/pt.c b/xen/arch/riscv/pt.c
index 857619d48df1..918b1b91abde 100644
--- a/xen/arch/riscv/pt.c
+++ b/xen/arch/riscv/pt.c
@@ -504,7 +504,7 @@ static int pt_update(vaddr_t virt, mfn_t mfn,
 int map_pages_to_xen(unsigned long virt,
                      mfn_t mfn,
                      unsigned long nr_mfns,
-                     unsigned int flags)
+                     pte_attr_t flags)
 {
     /*
      * Ensure that flags has PTE_VALID bit as map_pages_to_xen() is supposed
diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 1cf236516789..0e6c766be4aa 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -5442,7 +5442,7 @@ int map_pages_to_xen(
     unsigned long virt,
     mfn_t mfn,
     unsigned long nr_mfns,
-    unsigned int flags)
+    pte_attr_t flags)
 {
     bool locking = system_state > SYS_STATE_boot;
     l3_pgentry_t *pl3e = NULL, ol3e;
@@ -5860,7 +5860,7 @@ int __init populate_pt_range(unsigned long virt, unsigned long nr_mfns)
  *
  * It is an error to call with present flags over an unpopulated range.
  */
-int modify_xen_mappings(unsigned long s, unsigned long e, unsigned int nf)
+int modify_xen_mappings(unsigned long s, unsigned long e, pte_attr_t nf)
 {
     bool locking = system_state > SYS_STATE_boot;
     l3_pgentry_t *pl3e = NULL;
@@ -6156,7 +6156,7 @@ int destroy_xen_mappings(unsigned long s, unsigned long e)
  * the non-inclusive boundary will be updated.
  */
 void init_or_livepatch modify_xen_mappings_lite(
-    unsigned long s, unsigned long e, unsigned int nf)
+    unsigned long s, unsigned long e, pte_attr_t nf)
 {
     unsigned long v = s, fm, flags;
 
diff --git a/xen/common/efi/boot.c b/xen/common/efi/boot.c
index 143b5681ba92..e39fbc3529c4 100644
--- a/xen/common/efi/boot.c
+++ b/xen/common/efi/boot.c
@@ -1676,7 +1676,7 @@ void __init efi_init_memory(void)
     struct rt_extra {
         struct rt_extra *next;
         unsigned long smfn, emfn;
-        unsigned int prot;
+        pte_attr_t prot;
     } *extra, *extra_head = NULL;
 
     free_ebmalloc_unused_mem();
@@ -1691,7 +1691,7 @@ void __init efi_init_memory(void)
         EFI_MEMORY_DESCRIPTOR *desc = efi_memmap + i;
         u64 len = desc->NumberOfPages << EFI_PAGE_SHIFT;
         unsigned long smfn, emfn;
-        unsigned int prot = PAGE_HYPERVISOR_RWX;
+        pte_attr_t prot = PAGE_HYPERVISOR_RWX;
         paddr_t mem_base;
         unsigned long mem_npages;
 
diff --git a/xen/common/vmap.c b/xen/common/vmap.c
index 47225fecc067..d6991421f3f7 100644
--- a/xen/common/vmap.c
+++ b/xen/common/vmap.c
@@ -222,7 +222,7 @@ static void vm_free(const void *va)
 }
 
 void *__vmap(const mfn_t *mfn, unsigned int granularity,
-             unsigned int nr, unsigned int align, unsigned int flags,
+             unsigned int nr, unsigned int align, pte_attr_t flags,
              enum vmap_region type)
 {
     void *va = vm_alloc(nr * granularity, align, type);
diff --git a/xen/include/xen/mm.h b/xen/include/xen/mm.h
index ae1c48a61545..e89942b87d1e 100644
--- a/xen/include/xen/mm.h
+++ b/xen/include/xen/mm.h
@@ -64,6 +64,7 @@
 #include <xen/bug.h>
 #include <xen/compiler.h>
 #include <xen/mm-frame.h>
+#include <xen/mm-types.h>
 #include <xen/types.h>
 #include <xen/list.h>
 #include <xen/spinlock.h>
@@ -113,11 +114,11 @@ int map_pages_to_xen(
     unsigned long virt,
     mfn_t mfn,
     unsigned long nr_mfns,
-    unsigned int flags);
+    pte_attr_t flags);
 /* Alter the permissions of a range of Xen virtual address space. */
-int modify_xen_mappings(unsigned long s, unsigned long e, unsigned int nf);
+int modify_xen_mappings(unsigned long s, unsigned long e, pte_attr_t nf);
 void modify_xen_mappings_lite(unsigned long s, unsigned long e,
-                              unsigned int nf);
+                              pte_attr_t nf);
 int destroy_xen_mappings(unsigned long s, unsigned long e);
 /* Retrieve the MFN mapped by VA in Xen virtual address space. */
 mfn_t xen_map_to_mfn(unsigned long va);
diff --git a/xen/include/xen/vmap.h b/xen/include/xen/vmap.h
index 26c831757a11..327a2597826d 100644
--- a/xen/include/xen/vmap.h
+++ b/xen/include/xen/vmap.h
@@ -9,6 +9,7 @@
 #define __XEN_VMAP_H__
 
 #include <xen/mm-frame.h>
+#include <xen/mm-types.h>
 #include <xen/page-size.h>
 
 /* Identifiers for the linear ranges tracked by vmap */
@@ -57,7 +58,7 @@ void vm_init_type(enum vmap_region type, void *start, void *end);
  * @return Pointer to the mapped area on success; NULL otherwise.
  */
 void *__vmap(const mfn_t *mfn, unsigned int granularity, unsigned int nr,
-             unsigned int align, unsigned int flags, enum vmap_region type);
+             unsigned int align, pte_attr_t flags, enum vmap_region type);
 
 /*
  * Map an array of pages contiguously into the VMAP_DEFAULT vmap region


    

  


--------------Zgr0ogap5EvgzVoR73L0BTzY--


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Subject: Re: [PATCH v2] xen: fix buffer over-read in bitmap_to_xenctl_bitmap()
To: Roger Pau Monne , xen-devel@lists.xenproject.org
Cc: Anthony PERARD ,
 Michal Orzel , Jan Beulich ,
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In-Reply-To: <20250425113227.10243-1-roger.pau@citrix.com>
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On 25/04/2025 12:32 pm, Roger Pau Monne wrote:
> There's an off-by-one when calculating the last byte in the input array to
> bitmap_to_xenctl_bitmap(), which leads to bitmaps with sizes multiple of 8
> to over-read and incorrectly use a byte past the end of the array.
>
> Fixes: 288c4641c80d ('xen: simplify bitmap_to_xenctl_bitmap for little endian')
> Signed-off-by: Roger Pau Monné 

Reviewed-by: Andrew Cooper 


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Message-ID: <71e1847a-6469-4596-b721-38e8e0060194@gmail.com>
Date: Fri, 25 Apr 2025 13:37:52 +0200
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v5 3/3] ppc/mm: Introduce mm-types.h
To: Andrew Cooper ,
 Xen-devel 
Cc: Shawn Anastasio ,
 Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Stefano Stabellini ,
 Julien Grall , Volodymyr Babchuk
 , Bertrand Marquis ,
 Michal Orzel 
References: <20250425112415.245585-1-andrew.cooper3@citrix.com>
 <20250425112415.245585-4-andrew.cooper3@citrix.com>
Content-Language: en-US
From: Oleksii Kurochko 
In-Reply-To: <20250425112415.245585-4-andrew.cooper3@citrix.com>

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On 4/25/25 1:24 PM, Andrew Cooper wrote:
> From: Shawn Anastasio
>
> Signed-off-by: Shawn Anastasio
> ---
> CC: Jan Beulich
> CC: Roger Pau Monné
> CC: Stefano Stabellini
> CC: Julien Grall
> CC: Volodymyr Babchuk
> CC: Bertrand Marquis
> CC: Michal Orzel
> CC: Oleksii Kurochko
> CC: Shawn Anastasio
>
> Possibly not for taking on it's own (might be better with the PPC
> implemenation of map_pages_to_xen()).
>
> Nevertheless, this patch alone now does trip:
>
>    diff --git a/xen/common/vmap.c b/xen/common/vmap.c
>    index d6991421f3f7..9552806dba39 100644
>    --- a/xen/common/vmap.c
>    +++ b/xen/common/vmap.c
>    @@ -228,6 +228,8 @@ void *__vmap(const mfn_t *mfn, unsigned int granularity,
>         void *va = vm_alloc(nr * granularity, align, type);
>         unsigned long cur = (unsigned long)va;
>
>    +    BUILD_BUG_ON(sizeof(pte_attr_t) != 4);
>    +

Could you please clarify what kind of changes should done in the case if
sizeof(pte_attr_t) == 8 (unsigned long)?

~ Oleksii

>         for ( ; va && nr--; ++mfn, cur += PAGE_SIZE * granularity )
>         {
>             if ( map_pages_to_xen(cur, *mfn, granularity, flags) )
>
> in PPC builds only.
> ---
>   xen/arch/ppc/include/asm/mm-types.h | 7 +++++++
>   1 file changed, 7 insertions(+)
>   create mode 100644 xen/arch/ppc/include/asm/mm-types.h
>
> diff --git a/xen/arch/ppc/include/asm/mm-types.h b/xen/arch/ppc/include/asm/mm-types.h
> new file mode 100644
> index 000000000000..06a3af1c6eda
> --- /dev/null
> +++ b/xen/arch/ppc/include/asm/mm-types.h
> @@ -0,0 +1,7 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +#ifndef PPC_MM_TYPES_H
> +#define PPC_MM_TYPES_H
> +
> +typedef unsigned long pte_attr_t;
> +
> +#endif /* PPC_MM_TYPES_H */
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On 4/25/25 1:24 PM, Andrew Cooper
      wrote:

    

    

      
From: Shawn Anastasio <sanastasio@raptorengineering.com>

Signed-off-by: Shawn Anastasio <sanastasio@raptorengineering.com>
---
CC: Jan Beulich <JBeulich@suse.com>
CC: Roger Pau Monné <roger.pau@citrix.com>
CC: Stefano Stabellini <sstabellini@kernel.org>
CC: Julien Grall <julien@xen.org>
CC: Volodymyr Babchuk <Volodymyr_Babchuk@epam.com>
CC: Bertrand Marquis <bertrand.marquis@arm.com>
CC: Michal Orzel <michal.orzel@amd.com>
CC: Oleksii Kurochko <oleksii.kurochko@gmail.com>
CC: Shawn Anastasio <sanastasio@raptorengineering.com>

Possibly not for taking on it's own (might be better with the PPC
implemenation of map_pages_to_xen()).

Nevertheless, this patch alone now does trip:

  diff --git a/xen/common/vmap.c b/xen/common/vmap.c
  index d6991421f3f7..9552806dba39 100644
  --- a/xen/common/vmap.c
  +++ b/xen/common/vmap.c
  @@ -228,6 +228,8 @@ void *__vmap(const mfn_t *mfn, unsigned int granularity,
       void *va = vm_alloc(nr * granularity, align, type);
       unsigned long cur = (unsigned long)va;

  +    BUILD_BUG_ON(sizeof(pte_attr_t) != 4);
  +

    

    
Could you please clarify what kind of changes should done in the case if 
sizeof(pte_attr_t) == 8 (unsigned long)?

~ Oleksii


    

      
       for ( ; va && nr--; ++mfn, cur += PAGE_SIZE * granularity )
       {
           if ( map_pages_to_xen(cur, *mfn, granularity, flags) )

in PPC builds only.
---
 xen/arch/ppc/include/asm/mm-types.h | 7 +++++++
 1 file changed, 7 insertions(+)
 create mode 100644 xen/arch/ppc/include/asm/mm-types.h

diff --git a/xen/arch/ppc/include/asm/mm-types.h b/xen/arch/ppc/include/asm/mm-types.h
new file mode 100644
index 000000000000..06a3af1c6eda
--- /dev/null
+++ b/xen/arch/ppc/include/asm/mm-types.h
@@ -0,0 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef PPC_MM_TYPES_H
+#define PPC_MM_TYPES_H
+
+typedef unsigned long pte_attr_t;
+
+#endif /* PPC_MM_TYPES_H */


    

  


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Subject: Re: [PATCH v5 3/3] ppc/mm: Introduce mm-types.h
To: Oleksii Kurochko ,
 Xen-devel 
Cc: Shawn Anastasio ,
 Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Stefano Stabellini ,
 Julien Grall , Volodymyr Babchuk
 , Bertrand Marquis ,
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References: <20250425112415.245585-1-andrew.cooper3@citrix.com>
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 <71e1847a-6469-4596-b721-38e8e0060194@gmail.com>
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On 25/04/2025 12:37 pm, Oleksii Kurochko wrote:
>
>
> On 4/25/25 1:24 PM, Andrew Cooper wrote:
>> From: Shawn Anastasio 
>>
>> Signed-off-by: Shawn Anastasio 
>> ---
>> CC: Jan Beulich 
>> CC: Roger Pau Monné 
>> CC: Stefano Stabellini 
>> CC: Julien Grall 
>> CC: Volodymyr Babchuk 
>> CC: Bertrand Marquis 
>> CC: Michal Orzel 
>> CC: Oleksii Kurochko 
>> CC: Shawn Anastasio 
>>
>> Possibly not for taking on it's own (might be better with the PPC
>> implemenation of map_pages_to_xen()).
>>
>> Nevertheless, this patch alone now does trip:
>>
>>   diff --git a/xen/common/vmap.c b/xen/common/vmap.c
>>   index d6991421f3f7..9552806dba39 100644
>>   --- a/xen/common/vmap.c
>>   +++ b/xen/common/vmap.c
>>   @@ -228,6 +228,8 @@ void *__vmap(const mfn_t *mfn, unsigned int granularity,
>>        void *va = vm_alloc(nr * granularity, align, type);
>>        unsigned long cur = (unsigned long)va;
>>
>>   +    BUILD_BUG_ON(sizeof(pte_attr_t) != 4);
>>   +
> Could you please clarify what kind of changes should done in the case if 
> sizeof(pte_attr_t) == 8 (unsigned long)?

Nothing.  This is simply to demonstrate that __has_include() is working,
and is making PPC different to all the other architectures.

~Andrew.


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On Thu Apr 24, 2025 at 11:19 PM BST, dmkhn wrote:
> On Thu, Apr 24, 2025 at 05:10:10PM +0100, Alejandro Vallejo wrote:
>> Hi,
>>=20
>> v4: https://lore.kernel.org/xen-devel/20250417124844.11143-1-agarciav@am=
d.com/
>> v3: https://lore.kernel.org/xen-devel/20250408160802.49870-1-agarciav@am=
d.com/
>> v2: https://lore.kernel.org/xen-devel/20241226165740.29812-1-dpsmith@ape=
rtussolutions.com/
>> v1: https://lore.kernel.org/xen-devel/20241123182044.30687-1-dpsmith@ape=
rtussolutions.com/
>>=20
>> =3D=3D=3D=3D=3D=3D=3D=3D=3D Original cover letter:
>>=20
>> The Hyperlaunch device tree for dom0 series is the second split out for =
the
>> introduction of the Hyperlaunch domain builder logic. These changes focu=
s on
>> introducing the ability to express a domain configuration that is then u=
sed to
>> populate the struct boot_domain structure for dom0. This ability to expr=
ess a
>> domain configuration provides the next step towards a general domain bui=
lder.
>>=20
>> The splitting of Hyperlaunch into a set of series are twofold, to reduce=
 the
>> effort in reviewing a much larger series, and to reduce the effort in ha=
ndling
>> the knock-on effects to the construction logic from requested review cha=
nges.
>>=20
>>=20
>>=20
>> Alejandro Vallejo (1):
>>   x86/hyperlaunch: Add helpers to locate multiboot modules
>>=20
>> Daniel P. Smith (11):
>>   kconfig: introduce domain builder config options
>>   common/hyperlaunch: introduce the domain builder
>>   x86/hyperlaunch: initial support for hyperlaunch device tree
>>   x86/hyperlaunch: locate dom0 kernel with hyperlaunch
>>   x86/hyperlaunch: obtain cmdline from device tree
>>   x86/hyperlaunch: locate dom0 initrd with hyperlaunch
>>   x86/hyperlaunch: add domain id parsing to domain config
>>   x86/hyperlaunch: specify dom0 mode with device tree
>>   x86/hyperlaunch: add memory parsing to domain config
>>   x86/hyperlaunch: add max vcpu parsing of hyperlaunch device tree
>>   x86/hyperlaunch: add capabilities to boot domain
>
> One general comment w.r.t. naming notation in:
>
>     xen/common/domain-builder/fdt.c
>     xen/common/domain-builder/fdt.h
>
> Sorry, overlooked that earlier.
>
> What do you think about using fdt_ notation for all functions =
in
> fdt.{c,h}?
>
> For example:
>
>     s/detect_fdt_kind/fdt_detect_hyperlauch_node/
                                         ^      =20
					 kind?
>
>     s/find_hyperlaunch_node/fdt_find_hyperlauch_node/
>
>     s/walk_hyperlaunch_fdt/fdt_walk_hyperlauch_node/
>
>     s/process_domain_node/fdt_process_hyperlauch_node/
                                         ^
					 domain?

Assuming the two nits above are mistakes on copy-paste, it sounds
reasonable. I'll wait for some acks on the rest and resend with those
adjustments if needed.

>
> Other than that:
>
> Reviewed-by: Denis Mukhin 
>
> for the series.

Thanks a lot!

Cheers,
Alejandro


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Date: Fri, 25 Apr 2025 13:00:05 +0100
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Subject: Re: [PATCH v1] xen/arm: AArch32-V8R: Add MPU register definitions
To: Julien Grall ,
 Ayan Kumar Halder , xen-devel@lists.xenproject.org
Cc: Stefano Stabellini ,
 Bertrand Marquis ,
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 Volodymyr Babchuk ,
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Hi Julien,

cc-ed Luca for feedback on specific points.

On 18/04/2025 05:54, Julien Grall wrote:
> Hi Ayan,
>
> On 18/04/2025 00:55, Ayan Kumar Halder wrote:
>> Add the definitions for HPRBAR<0..31>, HPRLAR<0..31> and HPRENR.
>> The definitions are taken from ARM DDI 0568A.c ID110520, E2.2.3 
>> HPRBAR,
>> E2.2.4 HPRENR and E2.2.6 HPRLAR.
>>
>> Introduce pr_t typedef which is a structure having the prbar and 
>> prlar members,
>> each being structured as the registers of the AArch32-V8R architecture.
>> This is the arm32 equivalent of
>> "arm/mpu: Introduce MPU memory region map structure".
>>
>> Signed-off-by: Ayan Kumar Halder 
>> ---
>> This patch should be applied after
>> "[PATCH v3 0/7] First chunk for Arm R82 and MPU support" in order to 
>> enable
>> compilation for AArch32.
>>
>>   xen/arch/arm/include/asm/arm32/mpu.h  |  59 +++++++++++
>>   xen/arch/arm/include/asm/mpu.h        |   4 +
>>   xen/arch/arm/include/asm/mpu/cpregs.h | 135 ++++++++++++++++++++++++++
>>   3 files changed, 198 insertions(+)
>>   create mode 100644 xen/arch/arm/include/asm/arm32/mpu.h
>>
>> diff --git a/xen/arch/arm/include/asm/arm32/mpu.h 
>> b/xen/arch/arm/include/asm/arm32/mpu.h
>> new file mode 100644
>> index 0000000000..4aabd93479
>> --- /dev/null
>> +++ b/xen/arch/arm/include/asm/arm32/mpu.h
>> @@ -0,0 +1,59 @@
>> +/* SPDX-License-Identifier: GPL-2.0-only */
>> +/*
>> + * mpu.h: Arm Memory Protection Unit definitions for aarch64.
>> + */
>> +
>> +#ifndef __ARM_ARM32_MPU_H
>> +#define __ARM_ARM32_MPU_H
>> +
>> +#define XN_EL2_ENABLED  0x1
>
> I understand the define is introduced in Luca's patch, but this a bit 
> non-descriptive... Can we find a better name? Maybe by adding the name 
> of the register and some documentation?

We can rename this as PRBAR_EL2_XN if this sounds better (cc @Luca) in 
Luca's patch

The description can be

Refer ARM DDI 0568A.c  ID110520 , E2.2.2

HPRBAR [0:1] Execute Never

>
>> +
>> +#ifndef __ASSEMBLY__
>> +
>> +/* Hypervisor Protection Region Base Address Register */
>> +typedef union {
>> +    struct {
>> +        unsigned int xn:1;       /* Execute-Never */
>> +        unsigned int ap:2;       /* Acess Permission */
>> +        unsigned int sh:2;       /* Sharebility */
>> +        unsigned int res0:1;     /* Reserved as 0 */
>> +        unsigned int base:26;    /* Base Address */
>> +    } reg;
>> +    uint32_t bits;
>> +} prbar_t;
>> +
>> +/* Hypervisor Protection Region Limit Address Register */
>> +typedef union {
>> +    struct {
>> +        unsigned int en:1;     /* Region enable */
>> +        unsigned int ai:3;     /* Memory Attribute Index */
>> +        /*
>> +         * There is no actual ns bit in hardware. It is used here for
>> +         * compatibility with Armr64 code. Thus, we are reusing a 
>> res0 bit for ns.
>
> typo: Arm64.
Ack
>
>> +         */
>
> Hmmmm, this would mean someone may mistakenly set the bit to 0 by 
> mistake. If the field is always meant to be 0 on arm64, then I would 
> consider to name is res0 on arm64 with an explanation.
>
> This would make clear the bit is not supposed to have a value other 
> than 0.

On Arm64, ns == 0 as it can only support secure mode.

So we can change this on Arm64 as well :-

unsigned int res0:2; /* ns == 0 as only secure mode is supported */

@Luca to clarify

>
>> +        unsigned int ns:1;     /* Reserved 0 by hardware */
>> +        unsigned int res0:1;   /* Reserved 0 by hardware */
Then, we can change this on Arm32 as well.
>> +        unsigned int limit:26;  /* Limit Address */
>
> NIT: Can we align the comments?
Ack.
>
>> +    } reg;
>> +    uint32_t bits;
>> +} prlar_t;
>> +
>> +/* Protection Region */
>> +typedef struct {
>> +    prbar_t prbar;
>> +    prlar_t prlar;
>> +    uint64_t p2m_type;          /* Used to store p2m types. */
>> +} pr_t;
>
> This looks to be common with arm64. If so, I would prefer if the 
> structure is in a common header.

No, in arm64 this is

typedef struct {
      prbar_t prbar;
      prlar_t prlar;
} pr_t;

The reason being Arm64 uses unused bits (ie 'pad') to store the type.

>
>> +
>> +#endif /* __ASSEMBLY__ */
>> +
>> +#endif /* __ARM_ARM32_MPU_H */
>> +
>> +/*
>> + * Local variables:
>> + * mode: C
>> + * c-file-style: "BSD"
>> + * c-basic-offset: 4
>> + * indent-tabs-mode: nil
>> + * End:
>> + */
>> diff --git a/xen/arch/arm/include/asm/mpu.h 
>> b/xen/arch/arm/include/asm/mpu.h
>> index 77d0566f97..67127149c0 100644
>> --- a/xen/arch/arm/include/asm/mpu.h
>> +++ b/xen/arch/arm/include/asm/mpu.h
>> @@ -8,8 +8,12 @@
>>     #if defined(CONFIG_ARM_64)
>>   # include 
>> +#elif defined(CONFIG_ARM_32)
>> +# include 
>>   #endif
>>   +#define PRENR_MASK  GENMASK(31, 0)
>> +
>>   #define MPU_REGION_SHIFT  6
>>   #define MPU_REGION_ALIGN  (_AC(1, UL) << MPU_REGION_SHIFT)
>>   #define MPU_REGION_MASK   (~(MPU_REGION_ALIGN - 1))
>> diff --git a/xen/arch/arm/include/asm/mpu/cpregs.h 
>> b/xen/arch/arm/include/asm/mpu/cpregs.h
>> index d5cd0e04d5..7cf52aa09a 100644
>> --- a/xen/arch/arm/include/asm/mpu/cpregs.h
>> +++ b/xen/arch/arm/include/asm/mpu/cpregs.h
>> @@ -6,18 +6,153 @@
>>   /* CP15 CR0: MPU Type Register */
>>   #define HMPUIR          p15,4,c0,c0,4
>>   +/* CP15 CR6: Protection Region Enable Register */
>> +#define HPRENR          p15,4,c6,c1,1
>> +
>>   /* CP15 CR6: MPU Protection Region Base/Limit/Select Address 
>> Register */
>>   #define HPRSELR         p15,4,c6,c2,1
>>   #define HPRBAR          p15,4,c6,c3,0
>>   #define HPRLAR          p15,4,c6,c8,1
>>   +/* CP15 CR6: MPU Protection Region Base/Limit Address Register */
>> +#define HPRBAR0         p15,4,c6,c8,0
>> +#define HPRLAR0         p15,4,c6,c8,1
>> +#define HPRBAR1         p15,4,c6,c8,4
>> +#define HPRLAR1         p15,4,c6,c8,5
>> +#define HPRBAR2         p15,4,c6,c9,0
>> +#define HPRLAR2         p15,4,c6,c9,1
>> +#define HPRBAR3         p15,4,c6,c9,4
>> +#define HPRLAR3         p15,4,c6,c9,5
>> +#define HPRBAR4         p15,4,c6,c10,0
>> +#define HPRLAR4         p15,4,c6,c10,1
>> +#define HPRBAR5         p15,4,c6,c10,4
>> +#define HPRLAR5         p15,4,c6,c10,5
>> +#define HPRBAR6         p15,4,c6,c11,0
>> +#define HPRLAR6         p15,4,c6,c11,1
>> +#define HPRBAR7         p15,4,c6,c11,4
>> +#define HPRLAR7         p15,4,c6,c11,5
>> +#define HPRBAR8         p15,4,c6,c12,0
>> +#define HPRLAR8         p15,4,c6,c12,1
>> +#define HPRBAR9         p15,4,c6,c12,4
>> +#define HPRLAR9         p15,4,c6,c12,5
>> +#define HPRBAR10        p15,4,c6,c13,0
>> +#define HPRLAR10        p15,4,c6,c13,1
>> +#define HPRBAR11        p15,4,c6,c13,4
>> +#define HPRLAR11        p15,4,c6,c13,5
>> +#define HPRBAR12        p15,4,c6,c14,0
>> +#define HPRLAR12        p15,4,c6,c14,1
>> +#define HPRBAR13        p15,4,c6,c14,4
>> +#define HPRLAR13        p15,4,c6,c14,5
>> +#define HPRBAR14        p15,4,c6,c15,0
>> +#define HPRLAR14        p15,4,c6,c15,1
>> +#define HPRBAR15        p15,4,c6,c15,4
>> +#define HPRLAR15        p15,4,c6,c15,5
>> +#define HPRBAR16        p15,5,c6,c8,0
>> +#define HPRLAR16        p15,5,c6,c8,1
>> +#define HPRBAR17        p15,5,c6,c8,4
>> +#define HPRLAR17        p15,5,c6,c8,5
>> +#define HPRBAR18        p15,5,c6,c9,0
>> +#define HPRLAR18        p15,5,c6,c9,1
>> +#define HPRBAR19        p15,5,c6,c9,4
>> +#define HPRLAR19        p15,5,c6,c9,5
>> +#define HPRBAR20        p15,5,c6,c10,0
>> +#define HPRLAR20        p15,5,c6,c10,1
>> +#define HPRBAR21        p15,5,c6,c10,4
>> +#define HPRLAR21        p15,5,c6,c10,5
>> +#define HPRBAR22        p15,5,c6,c11,0
>> +#define HPRLAR22        p15,5,c6,c11,1
>> +#define HPRBAR23        p15,5,c6,c11,4
>> +#define HPRLAR23        p15,5,c6,c11,5
>> +#define HPRBAR24        p15,5,c6,c12,0
>> +#define HPRLAR24        p15,5,c6,c12,1
>> +#define HPRBAR25        p15,5,c6,c12,4
>> +#define HPRLAR25        p15,5,c6,c12,5
>> +#define HPRBAR26        p15,5,c6,c13,0
>> +#define HPRLAR26        p15,5,c6,c13,1
>> +#define HPRBAR27        p15,5,c6,c13,4
>> +#define HPRLAR27        p15,5,c6,c13,5
>> +#define HPRBAR28        p15,5,c6,c14,0
>> +#define HPRLAR28        p15,5,c6,c14,1
>> +#define HPRBAR29        p15,5,c6,c14,4
>> +#define HPRLAR29        p15,5,c6,c14,5
>> +#define HPRBAR30        p15,5,c6,c15,0
>> +#define HPRLAR30        p15,5,c6,c15,1
>> +#define HPRBAR31        p15,5,c6,c15,4
>> +#define HPRLAR31        p15,5,c6,c15,5
>
> NIT: Is there any way we could generate the values using macros?
This looks tricky. So I will prefer to keep this as it is.
>
>> +
>>   /* Aliases of AArch64 names for use in common code */
>>   #ifdef CONFIG_ARM_32
>>   /* Alphabetically... */
>>   #define MPUIR_EL2       HMPUIR
>>   #define PRBAR_EL2       HPRBAR
>> +#define PRBAR0_EL2      HPRBAR0
>
> AFAIU, the alias will be mainly used in the macro generate
> the switch. Rather than open-coding all the PR*AR_EL2, can we
> provide two macros PR{B, L}AR_N that will be implemented as
> HPR{B,L}AR##n for arm32 and PR{B,L}AR##n for arm64?

Yes , we can have

#define PR{B,L}AR_EL2_(n)          HPR{B,L}AR##n for arm32

#define PR{B,L}AR_EL2_(n)          PR{B,L}AR##n##_EL2

I will send a v2 with these changes. Please have a look at that.

- Ayan

>
>>   #define PRSELR_EL2      HPRSELR
>> +
>>   #endif /* CONFIG_ARM_32 */
>>     #endif /* __ARM_MPU_CPREGS_H */
>
> Cheers,
>


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On Thu Apr 24, 2025 at 1:58 PM BST, Roger Pau Monne wrote:
> The commit that added support for retrieving the APIC IDs from the APs
> introduced several usages of cpuid() with NULL parameters, which is not
> handled by the underlying implementation.  For GCC I expect this results =
in
> writes to the physical address at 0, however for Clang the generated code
> in smp.o is:
>
> tools/firmware/hvmloader/smp.o: file format elf32-i386
>
> Disassembly of section .text:
>
> 00000000 :
>        0: 55                            pushl   %ebp
>        1: 89 e5                         movl    %esp, %ebp
>        3: 53                            pushl   %ebx
>        4: 31 c0                         xorl    %eax, %eax
>        6: 31 c9                         xorl    %ecx, %ecx
>        8: 0f a2                         cpuid
>
> Showing the usage of a NULL pointer results in undefined behavior, and
> clang refusing to generate further code after it.
>
> Fix by using a temporary variable in cpuid_count() in place for any NULL
> parameter.
>
> Fixes: 9ad0db58c7e2 ('tools/hvmloader: Retrieve APIC IDs from the APs the=
mselves')
> Signed-off-by: Roger Pau Monn=C3=A9 

Ugh, that's on me. I was sure I saw the pattern in Xen (from where the
code came from), but clearly I hallucinated.

> ---
> Could also be fixed by using the temporary variable in the call sites,
> however that's more code in the call sites at the expense of less checkin=
g.
> I don't think the extra NULL check logic in cpuid_count() is that bad.
>
> Overall the solution proposed in this patch is safer going forward, as it
> prevent issues like this from being introduced in the first place.

Might be worth moving this same extra checks onto Xen's cpuid. There's
no shortage of `junk` variables at the callsites.

> ---
>  tools/firmware/hvmloader/util.h | 11 +++++++++++
>  1 file changed, 11 insertions(+)
>
> diff --git a/tools/firmware/hvmloader/util.h b/tools/firmware/hvmloader/u=
til.h
> index 644450c51ceb..765a013ddd9e 100644
> --- a/tools/firmware/hvmloader/util.h
> +++ b/tools/firmware/hvmloader/util.h
> @@ -190,6 +190,17 @@ static inline void cpuid_count(
>      uint32_t *ecx,
>      uint32_t *edx)
>  {
> +    uint32_t tmp;
> +
> +    if ( !eax )
> +        eax =3D &tmp;
> +    if ( !ebx )
> +        ebx =3D &tmp;
> +    if ( !ecx )
> +        ecx =3D &tmp;
> +    if ( !edx )
> +        edx =3D &tmp;
> +

A somewhat more compact alternative that doesn't require tmp would be:

  eax =3D eax ?: &leaf;
  ebx =3D ebx ?: &leaf;
  ecx =3D ecx ?: &leaf;
  edx =3D edx ?: &leaf;

It clobbers `leaf`, but only after it's no longer relevant.

>      asm volatile ( "cpuid"
>                     : "=3Da" (*eax), "=3Db" (*ebx), "=3Dc" (*ecx), "=3Dd"=
 (*edx)
>                     : "a" (leaf), "c" (subleaf) );

Cheers,
Alejandro


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Date: Fri, 25 Apr 2025 14:33:17 +0200
From: Peter Zijlstra 
To: =?iso-8859-1?Q?J=FCrgen_Gro=DF?= 
Cc: Xin Li , linux-kernel@vger.kernel.org,
	kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
	linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
	linux-pm@vger.kernel.org, linux-edac@vger.kernel.org,
	xen-devel@lists.xenproject.org, linux-acpi@vger.kernel.org,
	linux-hwmon@vger.kernel.org, netdev@vger.kernel.org,
	platform-driver-x86@vger.kernel.org, tglx@linutronix.de,
	mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com,
	x86@kernel.org, hpa@zytor.com, acme@kernel.org,
	andrew.cooper3@citrix.com, namhyung@kernel.org,
	mark.rutland@arm.com, alexander.shishkin@linux.intel.com,
	jolsa@kernel.org, irogers@google.com, adrian.hunter@intel.com,
	kan.liang@linux.intel.com, wei.liu@kernel.org,
	ajay.kaher@broadcom.com, bcm-kernel-feedback-list@broadcom.com,
	tony.luck@intel.com, pbonzini@redhat.com, vkuznets@redhat.com,
	seanjc@google.com, luto@kernel.org, boris.ostrovsky@oracle.com,
	kys@microsoft.com, haiyangz@microsoft.com, decui@microsoft.com
Subject: Re: [RFC PATCH v2 21/34] x86/msr: Utilize the alternatives mechanism
 to write MSR
Message-ID: <20250425123317.GB22125@noisy.programming.kicks-ass.net>
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-22-xin@zytor.com>
 
 
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On Wed, Apr 23, 2025 at 06:05:19PM +0200, J=FCrgen Gro=DF wrote:

> > It's not a major change, but when it is patched to use the immediate
> > form MSR write instruction, it's straightforwardly streamlined.
>=20
> It should be rather easy to switch the current wrmsr/rdmsr paravirt patch=
ing
> locations to use the rdmsr/wrmsr instructions instead of doing a call to
> native_*msr().

Right, just make the Xen functions asm stubs that expect the instruction
registers instead of C-abi and ALT_NOT_XEN the thing.

Shouldn't be hard at all.

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Date: Fri, 25 Apr 2025 13:36:42 +0100
Message-ID: 
CC: Jan Beulich , Andrew Cooper
	, Frediano Ziglio ,
	Xen-devel 
Subject: Re: [PATCH v2] x86/intel: workaround several MONITOR/MWAIT errata
From: Alejandro Vallejo 
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On Wed Apr 23, 2025 at 12:32 PM BST, Roger Pau Monne wrote:
> There are several errata on Intel regarding the usage of the MONITOR/MWAI=
T
> instructions, all having in common that stores to the monitored region
> might not wake up the CPU.
>
> Fix them by forcing the sending of an IPI for the affected models.
>
> The Ice Lake issue has been reproduced internally on XenServer hardware,
> and the fix does seem to prevent it.  The symptom was APs getting stuck i=
n
> the idle loop immediately after bring up, which in turn prevented the BSP
> from making progress.

Ugh... so this is what it was... Awesome having this madness fixed.

Do you happen to know if Linux has a similar fix in place?

> This would happen before the watchdog was initialized, and hence the
> whole system would get stuck.

That's nasty. It was the misassumption that the watchdog was already
running that had me going in circles thinking it was a lockup rather
than a livelock. Oh, well.

I believe the kudos for finally being able to reproduce this goes to
Frediano?

Cheers,
Alejandro


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On Thu Apr 24, 2025 at 5:54 PM BST, Jason Andryuk wrote:
> On 2025-04-24 12:10, Alejandro Vallejo wrote:
>> From: "Daniel P. Smith" 
>>=20
>> Hyperlaunch domain builder will be the consolidated boot time domain
>> building logic framework. Introduces the config option to enable this
>
> "Introduce the"
>
>> domain builder to eventually turn on the ability to load the domain
>> configuration via a flattened device tree.
>>=20
>> Signed-off-by: Daniel P. Smith 
>> Signed-off-by: Alejandro Vallejo 
>
> Maybe the title should be "kconfig: introduce CONFIG_DOMAIN_BUILDER" to=
=20
> more directly state what is happening.

Sounds good.

>
> At least with the typo fixed:
>
> Reviewed-by: Jason Andryuk 

Cheers,
Alejandro


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Date: Fri, 25 Apr 2025 13:43:55 +0100
Message-ID: 
From: Alejandro Vallejo 
To: Jason Andryuk , 
CC: "Daniel P. Smith" , Jan Beulich
	, Andrew Cooper ,
	=?utf-8?q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini 
Subject: Re: [PATCH v5 08/12] x86/hyperlaunch: add domain id parsing to
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On Thu Apr 24, 2025 at 6:41 PM BST, Jason Andryuk wrote:
> On 2025-04-24 12:10, Alejandro Vallejo wrote:
>> From: "Daniel P. Smith" 
>>=20
>> Introduce the ability to specify the desired domain id for the domain
>> definition. The domain id will be populated in the domid property of the
>> domain node in the device tree configuration.
>>=20
>> Signed-off-by: Daniel P. Smith 
>> Signed-off-by: Alejandro Vallejo 
>> ---
>
>> diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder=
/fdt.c
>> index 144fcc75b5..5a5b3c8806 100644
>> --- a/xen/common/domain-builder/fdt.c
>> +++ b/xen/common/domain-builder/fdt.c
>
>> @@ -188,12 +189,54 @@ static int __init fdt_read_multiboot_module(const =
void *fdt, int node,
>>   static int __init process_domain_node(
>>       struct boot_info *bi, const void *fdt, int dom_node)
>>   {
>> -    int node;
>> +    int node, property;
>>       struct boot_domain *bd =3D &bi->domains[bi->nr_domains];
>>       const char *name =3D fdt_get_name(fdt, dom_node, NULL) ?: "unknown=
";
>>       int address_cells =3D fdt_address_cells(fdt, dom_node);
>>       int size_cells =3D fdt_size_cells(fdt, dom_node);
>>  =20
>> +    fdt_for_each_property_offset(property, fdt, dom_node)
>> +    {
>> +        const struct fdt_property *prop;
>> +        const char *prop_name;
>> +        int name_len, rc;
>> +
>> +        prop =3D fdt_get_property_by_offset(fdt, property, NULL);
>> +        if ( !prop )
>> +            continue; /* silently skip */
>> +
>> +        prop_name =3D fdt_get_string(fdt, fdt32_to_cpu(prop->nameoff), =
&name_len);
>> +
>
> Stray blank line.
>
>> +        if ( !strncmp(prop_name, "domid", name_len) )
>> +        {
>> +            uint32_t val =3D DOMID_INVALID;
>> +
>> +            if ( (rc =3D fdt_prop_as_u32(prop, &val)) )
>> +            {
>> +                printk(XENLOG_ERR
>> +                       "  failed processing domain id for domain %s\n",=
 name);
>> +                return rc;
>> +            }
>
> Maybe add a blank line here?
>
>> +            if ( val >=3D DOMID_FIRST_RESERVED )
>> +            {
>> +                printk(XENLOG_ERR "  invalid domain id for domain %s\n"=
, name);
>> +                return -EINVAL;
>> +            }
>> +
>
>> @@ -258,6 +301,13 @@ static int __init process_domain_node(
>>           return -ENODATA;
>>       }
>>  =20
>> +    if ( bd->domid =3D=3D DOMID_INVALID )
>> +        bd->domid =3D get_initial_domain_id();
>> +    else if ( bd->domid !=3D get_initial_domain_id() )
>> +        printk(XENLOG_WARNING
>> +               "warning: unsupported boot. d%d is not the initial domai=
n.\n",
>
> Maybe:
> "warning: d%u is not the expected initial domid (%u)\n" ?
>
> It's a strange message.  The domid property is added, but it's not=20
> expected to actually be used?

It's just a transient message until multidomain boot is added in a later
series. It's merely informative that you're booting something you
probably didn't mean to. Or didn't mean to on this hypervisor.

>
> With the newlines addressed (and optionally the message change):

I'm happy to make those adjustments.

>
> Reviewed-by: Jason Andryuk 

Thanks

>
> Thanks,
> Jason

Cheers,
Alejandro


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Subject: Re: [PATCH v2] x86/intel: workaround several MONITOR/MWAIT errata
To: Alejandro Vallejo ,
 Roger Pau Monne , xen-devel@lists.xenproject.org
Cc: Jan Beulich ,
 Frediano Ziglio 
References: <20250423113215.80755-1-roger.pau@citrix.com>
 
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From: Andrew Cooper 
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On 25/04/2025 1:36 pm, Alejandro Vallejo wrote:
> On Wed Apr 23, 2025 at 12:32 PM BST, Roger Pau Monne wrote:
>> There are several errata on Intel regarding the usage of the MONITOR/MWAIT
>> instructions, all having in common that stores to the monitored region
>> might not wake up the CPU.
>>
>> Fix them by forcing the sending of an IPI for the affected models.
>>
>> The Ice Lake issue has been reproduced internally on XenServer hardware,
>> and the fix does seem to prevent it.  The symptom was APs getting stuck in
>> the idle loop immediately after bring up, which in turn prevented the BSP
>> from making progress.
> Ugh... so this is what it was... Awesome having this madness fixed.
>
> Do you happen to know if Linux has a similar fix in place?

https://lore.kernel.org/lkml/20250421192205.7CC1A7D9@davehans-spike.ostc.intel.com/T/#u

>
>> This would happen before the watchdog was initialized, and hence the
>> whole system would get stuck.
> That's nasty. It was the misassumption that the watchdog was already
> running that had me going in circles thinking it was a lockup rather
> than a livelock. Oh, well.
>
> I believe the kudos for finally being able to reproduce this goes to
> Frediano?

Of course.

The bit about the watchdog is a little bit of a red herring.  The
rcu_barrier() loop processes softirqs, so the watchdog wouldn't have
fired even it had been set up.

~Andrew


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Date: Fri, 25 Apr 2025 14:44:46 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Alejandro Vallejo 
Cc: xen-devel@lists.xenproject.org, Jan Beulich ,
	Andrew Cooper ,
	Anthony PERARD ,
	Xen-devel 
Subject: Re: [PATCH] x86/hvmloader: fix usage of NULL with cpuid_count()
Message-ID: 
References: <20250424125813.96449-1-roger.pau@citrix.com>
 
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On Fri, Apr 25, 2025 at 01:23:30PM +0100, Alejandro Vallejo wrote:
> On Thu Apr 24, 2025 at 1:58 PM BST, Roger Pau Monne wrote:
> > The commit that added support for retrieving the APIC IDs from the APs
> > introduced several usages of cpuid() with NULL parameters, which is not
> > handled by the underlying implementation.  For GCC I expect this results in
> > writes to the physical address at 0, however for Clang the generated code
> > in smp.o is:
> >
> > tools/firmware/hvmloader/smp.o: file format elf32-i386
> >
> > Disassembly of section .text:
> >
> > 00000000 :
> >        0: 55                            pushl   %ebp
> >        1: 89 e5                         movl    %esp, %ebp
> >        3: 53                            pushl   %ebx
> >        4: 31 c0                         xorl    %eax, %eax
> >        6: 31 c9                         xorl    %ecx, %ecx
> >        8: 0f a2                         cpuid
> >
> > Showing the usage of a NULL pointer results in undefined behavior, and
> > clang refusing to generate further code after it.
> >
> > Fix by using a temporary variable in cpuid_count() in place for any NULL
> > parameter.
> >
> > Fixes: 9ad0db58c7e2 ('tools/hvmloader: Retrieve APIC IDs from the APs themselves')
> > Signed-off-by: Roger Pau Monné 
> 
> Ugh, that's on me. I was sure I saw the pattern in Xen (from where the
> code came from), but clearly I hallucinated.
> 
> > ---
> > Could also be fixed by using the temporary variable in the call sites,
> > however that's more code in the call sites at the expense of less checking.
> > I don't think the extra NULL check logic in cpuid_count() is that bad.
> >
> > Overall the solution proposed in this patch is safer going forward, as it
> > prevent issues like this from being introduced in the first place.
> 
> Might be worth moving this same extra checks onto Xen's cpuid. There's
> no shortage of `junk` variables at the callsites.
> 
> > ---
> >  tools/firmware/hvmloader/util.h | 11 +++++++++++
> >  1 file changed, 11 insertions(+)
> >
> > diff --git a/tools/firmware/hvmloader/util.h b/tools/firmware/hvmloader/util.h
> > index 644450c51ceb..765a013ddd9e 100644
> > --- a/tools/firmware/hvmloader/util.h
> > +++ b/tools/firmware/hvmloader/util.h
> > @@ -190,6 +190,17 @@ static inline void cpuid_count(
> >      uint32_t *ecx,
> >      uint32_t *edx)
> >  {
> > +    uint32_t tmp;
> > +
> > +    if ( !eax )
> > +        eax = &tmp;
> > +    if ( !ebx )
> > +        ebx = &tmp;
> > +    if ( !ecx )
> > +        ecx = &tmp;
> > +    if ( !edx )
> > +        edx = &tmp;
> > +
> 
> A somewhat more compact alternative that doesn't require tmp would be:
> 
>   eax = eax ?: &leaf;
>   ebx = ebx ?: &leaf;
>   ecx = ecx ?: &leaf;
>   edx = edx ?: &leaf;

But that performs the write unconditionally?  It might be more compact
code-wise, but might incur in an unneeded store?

> It clobbers `leaf`, but only after it's no longer relevant.

My preference was to use a explicitly tmp variable, but I could switch
to using leaf if that's the preference.  Given that Andrew has already
Acked the current version I'm tempted to just go with what has already
been Acked.

Thanks, Roger.


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Subject: Re: [PATCH v5 1/3] xen/mm: Introduce mm-types.h
To: Andrew Cooper 
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 Stefano Stabellini , Julien Grall ,
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On 25.04.2025 13:24, Andrew Cooper wrote:
> The type used for pagetable attributes/permissions is currently unsigned int,
> but needs to become architecture dependent as PPC needs unsigned long.
> 
> Introduce mm-types.h to house pte_attr_t.
> 
> Given the new toolchain baseline, we can use __has_include() now to remove the
> need for boilerplate on most architectures.

That's true now, when it's just pte_attr_t that's there. Memory management,
however, is pretty different between architectures, so I wonder if in the
longer run any one will remain that actually can use the common header.

Jan


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 Xen-devel 
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 Stefano Stabellini , Julien Grall ,
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On 25/04/2025 1:45 pm, Jan Beulich wrote:
> On 25.04.2025 13:29, Oleksii Kurochko wrote:
>> On 4/25/25 1:24 PM, Andrew Cooper wrote:
>>> The type used for pagetable attributes/permissions is currently unsigned int,
>>> but needs to become architecture dependent as PPC needs unsigned long.
>> Not only PPC, RISC-V needs it too.
>>
>>> Introduce mm-types.h to house pte_attr_t.
>> Do we really want a separate mm-types.h?
> I think so, yes. It'll (hopefully) allow to avoid including xen/mm.h in a few
> places, in the longer run.

Yes, that's the intention.  We need to use this pattern here and
elsewhere (especially sched.h) to avoid having most TUs pull in most of
the world.

~Andrew


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Subject: Re: [PATCH v5 1/3] xen/mm: Introduce mm-types.h
To: Oleksii Kurochko ,
 Andrew Cooper ,
 Xen-devel 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , Julien Grall ,
 Volodymyr Babchuk ,
 Bertrand Marquis ,
 Michal Orzel ,
 Shawn Anastasio 
References: <20250425112415.245585-1-andrew.cooper3@citrix.com>
 <20250425112415.245585-2-andrew.cooper3@citrix.com>
 
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On 25.04.2025 13:29, Oleksii Kurochko wrote:
> 
> On 4/25/25 1:24 PM, Andrew Cooper wrote:
>> The type used for pagetable attributes/permissions is currently unsigned int,
>> but needs to become architecture dependent as PPC needs unsigned long.
> 
> Not only PPC, RISC-V needs it too.
> 
>>
>> Introduce mm-types.h to house pte_attr_t.
> 
> Do we really want a separate mm-types.h?

I think so, yes. It'll (hopefully) allow to avoid including xen/mm.h in a few
places, in the longer run.

Jan


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Date: Fri, 25 Apr 2025 14:51:27 +0200
MIME-Version: 1.0
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Subject: Re: [RFC PATCH v2 21/34] x86/msr: Utilize the alternatives mechanism
 to write MSR
To: Peter Zijlstra 
Cc: Xin Li , linux-kernel@vger.kernel.org,
 kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
 linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
 linux-pm@vger.kernel.org, linux-edac@vger.kernel.org,
 xen-devel@lists.xenproject.org, linux-acpi@vger.kernel.org,
 linux-hwmon@vger.kernel.org, netdev@vger.kernel.org,
 platform-driver-x86@vger.kernel.org, tglx@linutronix.de, mingo@redhat.com,
 bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
 acme@kernel.org, andrew.cooper3@citrix.com, namhyung@kernel.org,
 mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org,
 irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
 wei.liu@kernel.org, ajay.kaher@broadcom.com,
 bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
 pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
 luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
 haiyangz@microsoft.com, decui@microsoft.com
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-22-xin@zytor.com>
 
 
 <37c88ea3-dd24-4607-9ee1-0f19025aaef3@suse.com>
 <20250425123317.GB22125@noisy.programming.kicks-ass.net>
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From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= 
To: Peter Zijlstra 
Cc: Xin Li , linux-kernel@vger.kernel.org,
 kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
 linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
 linux-pm@vger.kernel.org, linux-edac@vger.kernel.org,
 xen-devel@lists.xenproject.org, linux-acpi@vger.kernel.org,
 linux-hwmon@vger.kernel.org, netdev@vger.kernel.org,
 platform-driver-x86@vger.kernel.org, tglx@linutronix.de, mingo@redhat.com,
 bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
 acme@kernel.org, andrew.cooper3@citrix.com, namhyung@kernel.org,
 mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org,
 irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
 wei.liu@kernel.org, ajay.kaher@broadcom.com,
 bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
 pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
 luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
 haiyangz@microsoft.com, decui@microsoft.com
Message-ID: <35979102-2eb2-4566-b32a-f2b02ded8ae6@suse.com>
Subject: Re: [RFC PATCH v2 21/34] x86/msr: Utilize the alternatives mechanism
 to write MSR
References: <20250422082216.1954310-1-xin@zytor.com>
 <20250422082216.1954310-22-xin@zytor.com>
 
 
 <37c88ea3-dd24-4607-9ee1-0f19025aaef3@suse.com>
 <20250425123317.GB22125@noisy.programming.kicks-ass.net>
In-Reply-To: <20250425123317.GB22125@noisy.programming.kicks-ass.net>

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From: Ayan Kumar Halder 
To: 
CC: Ayan Kumar Halder , Stefano Stabellini
	, Julien Grall , Luca Fancellu
	, Bertrand Marquis , "Michal
 Orzel" , Volodymyr Babchuk 
Subject: [PATCH v2] xen/arm: AArch32-V8R: Add MPU register definitions
Date: Fri, 25 Apr 2025 13:45:06 +0100
Message-ID: <20250425124506.390458-1-ayan.kumar.halder@amd.com>
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Add the definitions for HPRBAR<0..31>, HPRLAR<0..31> and HPRENR.
The definitions are taken from ARM DDI 0568A.c ID110520, E2.2.3 HPRBAR,
E2.2.4 HPRENR and E2.2.6 HPRLAR.

Introduce pr_t typedef which is a structure having the prbar and prlar members,
each being structured as the registers of the AArch32-V8R architecture.
This is the arm32 equivalent of
"arm/mpu: Introduce MPU memory region map structure".

Few differences worth noting:-
1. The XN in HPRBAR is 1 bit in Arm32 (unlike 2 bits in Arm64).
2. PRSELR_EL2 is not used to access HPRBAR<0..31> and HPRLAR<0..31>.

Introduce macros PR{B,L}AR_EL2_(num) to generate alias for the sysregs.

Also, took the opportunity to fix the register definition of HPRLAR.

Signed-off-by: Ayan Kumar Halder 
---
Changes from :-

v1 - 1. Introduce macros for PR{B,L}AR_EL2_(num). Similar macros need to be
defined for arm64 as well.
2. Some style fixes

Comments not addressed
1. Renaming of PRBAR_EL2_XN if needed.
2. Using res0 for ns.

This patch should be applied after
"[PATCH v3 0/7] First chunk for Arm R82 and MPU support" in order to enable
compilation for AArch32 and macros need to be defined for Arm64 as well.

 xen/arch/arm/include/asm/arm32/mpu.h  | 59 +++++++++++++++++++++
 xen/arch/arm/include/asm/mpu.h        |  4 ++
 xen/arch/arm/include/asm/mpu/cpregs.h | 75 ++++++++++++++++++++++++++-
 xen/arch/arm/include/asm/page.h       |  7 ++-
 xen/arch/arm/mpu/mm.c                 | 14 +++--
 5 files changed, 153 insertions(+), 6 deletions(-)
 create mode 100644 xen/arch/arm/include/asm/arm32/mpu.h

diff --git a/xen/arch/arm/include/asm/arm32/mpu.h b/xen/arch/arm/include/asm/arm32/mpu.h
new file mode 100644
index 0000000000..dc5ef9b3e9
--- /dev/null
+++ b/xen/arch/arm/include/asm/arm32/mpu.h
@@ -0,0 +1,59 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * mpu.h: Arm Memory Protection Unit definitions for aarch64.
+ */
+
+#ifndef __ARM_ARM32_MPU_H
+#define __ARM_ARM32_MPU_H
+
+#define XN_EL2_ENABLED  0x1
+
+#ifndef __ASSEMBLY__
+
+/* Hypervisor Protection Region Base Address Register */
+typedef union {
+    struct {
+        unsigned int xn:1;       /* Execute-Never */
+        unsigned int ap:2;       /* Acess Permission */
+        unsigned int sh:2;       /* Sharebility */
+        unsigned int res0:1;     /* Reserved as 0 */
+        unsigned int base:26;    /* Base Address */
+    } reg;
+    uint32_t bits;
+} prbar_t;
+
+/* Hypervisor Protection Region Limit Address Register */
+typedef union {
+    struct {
+        unsigned int en:1;     /* Region enable */
+        unsigned int ai:3;     /* Memory Attribute Index */
+        /*
+         * There is no actual ns bit in hardware. It is used here for
+         * compatibility with Arm64 code. Thus, we are reusing a res0 bit for ns.
+         */
+        unsigned int ns:1;     /* Reserved 0 by hardware */
+        unsigned int res0:1;   /* Reserved 0 by hardware */
+        unsigned int limit:26; /* Limit Address */
+    } reg;
+    uint32_t bits;
+} prlar_t;
+
+/* Protection Region */
+typedef struct {
+    prbar_t prbar;
+    prlar_t prlar;
+    uint64_t p2m_type;          /* Used to store p2m types. */
+} pr_t;
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __ARM_ARM32_MPU_H */
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h
index 77d0566f97..67127149c0 100644
--- a/xen/arch/arm/include/asm/mpu.h
+++ b/xen/arch/arm/include/asm/mpu.h
@@ -8,8 +8,12 @@
 
 #if defined(CONFIG_ARM_64)
 # include 
+#elif defined(CONFIG_ARM_32)
+# include 
 #endif
 
+#define PRENR_MASK  GENMASK(31, 0)
+
 #define MPU_REGION_SHIFT  6
 #define MPU_REGION_ALIGN  (_AC(1, UL) << MPU_REGION_SHIFT)
 #define MPU_REGION_MASK   (~(MPU_REGION_ALIGN - 1))
diff --git a/xen/arch/arm/include/asm/mpu/cpregs.h b/xen/arch/arm/include/asm/mpu/cpregs.h
index d5cd0e04d5..d051598477 100644
--- a/xen/arch/arm/include/asm/mpu/cpregs.h
+++ b/xen/arch/arm/include/asm/mpu/cpregs.h
@@ -6,18 +6,91 @@
 /* CP15 CR0: MPU Type Register */
 #define HMPUIR          p15,4,c0,c0,4
 
+/* CP15 CR6: Protection Region Enable Register */
+#define HPRENR          p15,4,c6,c1,1
+
 /* CP15 CR6: MPU Protection Region Base/Limit/Select Address Register */
 #define HPRSELR         p15,4,c6,c2,1
 #define HPRBAR          p15,4,c6,c3,0
-#define HPRLAR          p15,4,c6,c8,1
+#define HPRLAR          p15,4,c6,c3,1
+
+/* CP15 CR6: MPU Protection Region Base/Limit Address Register */
+#define HPRBAR0         p15,4,c6,c8,0
+#define HPRLAR0         p15,4,c6,c8,1
+#define HPRBAR1         p15,4,c6,c8,4
+#define HPRLAR1         p15,4,c6,c8,5
+#define HPRBAR2         p15,4,c6,c9,0
+#define HPRLAR2         p15,4,c6,c9,1
+#define HPRBAR3         p15,4,c6,c9,4
+#define HPRLAR3         p15,4,c6,c9,5
+#define HPRBAR4         p15,4,c6,c10,0
+#define HPRLAR4         p15,4,c6,c10,1
+#define HPRBAR5         p15,4,c6,c10,4
+#define HPRLAR5         p15,4,c6,c10,5
+#define HPRBAR6         p15,4,c6,c11,0
+#define HPRLAR6         p15,4,c6,c11,1
+#define HPRBAR7         p15,4,c6,c11,4
+#define HPRLAR7         p15,4,c6,c11,5
+#define HPRBAR8         p15,4,c6,c12,0
+#define HPRLAR8         p15,4,c6,c12,1
+#define HPRBAR9         p15,4,c6,c12,4
+#define HPRLAR9         p15,4,c6,c12,5
+#define HPRBAR10        p15,4,c6,c13,0
+#define HPRLAR10        p15,4,c6,c13,1
+#define HPRBAR11        p15,4,c6,c13,4
+#define HPRLAR11        p15,4,c6,c13,5
+#define HPRBAR12        p15,4,c6,c14,0
+#define HPRLAR12        p15,4,c6,c14,1
+#define HPRBAR13        p15,4,c6,c14,4
+#define HPRLAR13        p15,4,c6,c14,5
+#define HPRBAR14        p15,4,c6,c15,0
+#define HPRLAR14        p15,4,c6,c15,1
+#define HPRBAR15        p15,4,c6,c15,4
+#define HPRLAR15        p15,4,c6,c15,5
+#define HPRBAR16        p15,5,c6,c8,0
+#define HPRLAR16        p15,5,c6,c8,1
+#define HPRBAR17        p15,5,c6,c8,4
+#define HPRLAR17        p15,5,c6,c8,5
+#define HPRBAR18        p15,5,c6,c9,0
+#define HPRLAR18        p15,5,c6,c9,1
+#define HPRBAR19        p15,5,c6,c9,4
+#define HPRLAR19        p15,5,c6,c9,5
+#define HPRBAR20        p15,5,c6,c10,0
+#define HPRLAR20        p15,5,c6,c10,1
+#define HPRBAR21        p15,5,c6,c10,4
+#define HPRLAR21        p15,5,c6,c10,5
+#define HPRBAR22        p15,5,c6,c11,0
+#define HPRLAR22        p15,5,c6,c11,1
+#define HPRBAR23        p15,5,c6,c11,4
+#define HPRLAR23        p15,5,c6,c11,5
+#define HPRBAR24        p15,5,c6,c12,0
+#define HPRLAR24        p15,5,c6,c12,1
+#define HPRBAR25        p15,5,c6,c12,4
+#define HPRLAR25        p15,5,c6,c12,5
+#define HPRBAR26        p15,5,c6,c13,0
+#define HPRLAR26        p15,5,c6,c13,1
+#define HPRBAR27        p15,5,c6,c13,4
+#define HPRLAR27        p15,5,c6,c13,5
+#define HPRBAR28        p15,5,c6,c14,0
+#define HPRLAR28        p15,5,c6,c14,1
+#define HPRBAR29        p15,5,c6,c14,4
+#define HPRLAR29        p15,5,c6,c14,5
+#define HPRBAR30        p15,5,c6,c15,0
+#define HPRLAR30        p15,5,c6,c15,1
+#define HPRBAR31        p15,5,c6,c15,4
+#define HPRLAR31        p15,5,c6,c15,5
 
 /* Aliases of AArch64 names for use in common code */
 #ifdef CONFIG_ARM_32
 /* Alphabetically... */
 #define MPUIR_EL2       HMPUIR
 #define PRBAR_EL2       HPRBAR
+#define PRBAR_EL2_(N)   HPRBAR##N
+#define PRENR_EL2       HPRENR
 #define PRLAR_EL2       HPRLAR
+#define PRLAR_EL2_(N)   HPRLAR##N
 #define PRSELR_EL2      HPRSELR
+
 #endif /* CONFIG_ARM_32 */
 
 #endif /* __ARM_MPU_CPREGS_H */
diff --git a/xen/arch/arm/include/asm/page.h b/xen/arch/arm/include/asm/page.h
index 22f7d2c6cb..f4ae8ba6d7 100644
--- a/xen/arch/arm/include/asm/page.h
+++ b/xen/arch/arm/include/asm/page.h
@@ -96,7 +96,8 @@
 /*
  * Layout of the flags used for updating MPU memory region attributes
  * [0:2] Memory attribute Index
- * [3:4] Execute Never
+ * [3:4] Execute Never // For ARM_64
+ * [3] Execute Never // For ARM_32
  * [5:6] Access Permission
  * [7]   Region Present
  */
@@ -105,7 +106,11 @@
 #define _PAGE_AP_BIT            5
 #define _PAGE_PRESENT_BIT       7
 #define _PAGE_AI                (7U << _PAGE_AI_BIT)
+#ifdef CONFIG_ARM_32
+#define _PAGE_XN                (1U << _PAGE_XN_BIT)
+#else
 #define _PAGE_XN                (2U << _PAGE_XN_BIT)
+#endif
 #define _PAGE_RO                (2U << _PAGE_AP_BIT)
 #define _PAGE_PRESENT           (1U << _PAGE_PRESENT_BIT)
 #define PAGE_AI_MASK(x)         (((x) >> _PAGE_AI_BIT) & 0x7U)
diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c
index e0a40489a7..c177724c45 100644
--- a/xen/arch/arm/mpu/mm.c
+++ b/xen/arch/arm/mpu/mm.c
@@ -31,16 +31,16 @@ pr_t xen_mpumap[MAX_MPU_REGIONS];
 #define GENERATE_WRITE_PR_REG_CASE(num, pr)                                 \
     case num:                                                               \
     {                                                                       \
-        WRITE_SYSREG(pr->prbar.bits & ~MPU_REGION_RES0, PRBAR##num##_EL2);  \
-        WRITE_SYSREG(pr->prlar.bits & ~MPU_REGION_RES0, PRLAR##num##_EL2);  \
+        WRITE_SYSREG(pr->prbar.bits & ~MPU_REGION_RES0, PRBAR_EL2_(num));   \
+        WRITE_SYSREG(pr->prlar.bits & ~MPU_REGION_RES0, PRLAR_EL2_(num));   \
         break;                                                              \
     }
 
 #define GENERATE_READ_PR_REG_CASE(num, pr)                      \
     case num:                                                   \
     {                                                           \
-        pr->prbar.bits = READ_SYSREG(PRBAR##num##_EL2);         \
-        pr->prlar.bits = READ_SYSREG(PRLAR##num##_EL2);         \
+        pr->prbar.bits = READ_SYSREG(PRBAR_EL2_(num));          \
+        pr->prlar.bits = READ_SYSREG(PRLAR_EL2_(num));          \
         break;                                                  \
     }
 
@@ -56,6 +56,11 @@ static void __init __maybe_unused build_assertions(void)
 
 static void prepare_selector(uint8_t *sel)
 {
+    /*
+     * In Arm32, one can access PRBAR<0..31>_EL2 and PRLAR<0..31>_EL2 without
+     * the need to configure PRSELR_EL2.
+     */
+#ifdef CONFIG_ARM_64
     uint8_t cur_sel = *sel;
     /*
      * {read,write}_protection_region works using the direct access to the 0..15
@@ -69,6 +74,7 @@ static void prepare_selector(uint8_t *sel)
         isb();
     }
     *sel = *sel & 0xFU;
+#endif
 }
 
 /*
-- 
2.25.1



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Date: Fri, 25 Apr 2025 14:52:45 +0200
From: Peter Zijlstra 
To: "Xin Li (Intel)" 
Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
	linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
	virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
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	seanjc@google.com, luto@kernel.org, boris.ostrovsky@oracle.com,
	kys@microsoft.com, haiyangz@microsoft.com, decui@microsoft.com,
	dapeng1.mi@linux.intel.com
Subject: Re: [PATCH v3 00/14] MSR code cleanup part one
Message-ID: <20250425125245.GC22125@noisy.programming.kicks-ass.net>
References: <20250425083442.2390017-1-xin@zytor.com>
MIME-Version: 1.0
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In-Reply-To: <20250425083442.2390017-1-xin@zytor.com>

On Fri, Apr 25, 2025 at 01:34:23AM -0700, Xin Li (Intel) wrote:
> This patch set is the first part of the patch set:
> 
>   MSR refactor with new MSR instructions support
> 
> @ https://lore.kernel.org/lkml/20250422082216.1954310-1-xin@zytor.com/T/#m5a34be7d4ed55f0baca965cb65452a08e9ad7c8a
> 
> 
> It's getting *WAY* too big, and whether to zap the pv_ops MSR APIs is
> still under argument.  Dave Hansen suggested to focus on rename stuff
> first, most of which he acked.
> 
> Jrgen Gro also gave his RBs to most of the Xen MSR cleanup patches.
> 
> So here comes the first MSR cleanup patch set with version 3.
> 
> 
> This patch series is based on:
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/msr
> 
> 
> Xin Li (Intel) (14):
>   x86/msr: Move rdtsc{,_ordered}() to 
>   x86/msr: Remove rdpmc()
>   x86/msr: Rename rdpmcl() to rdpmc()
>   x86/msr: Convert the rdpmc() macro into an always inline function
>   x86/msr: Return u64 consistently in Xen PMC read functions
>   x86/msr: Convert __wrmsr() uses to native_wrmsr{,q}() uses
>   x86/msr: Add the native_rdmsrq() helper
>   x86/msr: Convert __rdmsr() uses to native_rdmsrq() uses
>   x86/xen/msr: Remove calling native_{read,write}_msr{,_safe}() in
>     pmu_msr_{read,write}()
>   x86/xen/msr: Remove pmu_msr_{read,write}()
>   x86/xen/msr: Remove the error pointer argument from set_seg()
>   x86/pvops/msr: refactor pv_cpu_ops.write_msr{,_safe}()
>   x86/msr: Replace wrmsr(msr, low, 0) with wrmsrq(msr, low)
>   x86/msr: Change the function type of native_read_msr_safe()

These look ok.

Acked-by: Peter Zijlstra (Intel) 


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On Fri Apr 25, 2025 at 1:44 PM BST, Roger Pau Monn=C3=A9 wrote:
> On Fri, Apr 25, 2025 at 01:23:30PM +0100, Alejandro Vallejo wrote:
>> On Thu Apr 24, 2025 at 1:58 PM BST, Roger Pau Monne wrote:
>> > The commit that added support for retrieving the APIC IDs from the APs
>> > introduced several usages of cpuid() with NULL parameters, which is no=
t
>> > handled by the underlying implementation.  For GCC I expect this resul=
ts in
>> > writes to the physical address at 0, however for Clang the generated c=
ode
>> > in smp.o is:
>> >
>> > tools/firmware/hvmloader/smp.o: file format elf32-i386
>> >
>> > Disassembly of section .text:
>> >
>> > 00000000 :
>> >        0: 55                            pushl   %ebp
>> >        1: 89 e5                         movl    %esp, %ebp
>> >        3: 53                            pushl   %ebx
>> >        4: 31 c0                         xorl    %eax, %eax
>> >        6: 31 c9                         xorl    %ecx, %ecx
>> >        8: 0f a2                         cpuid
>> >
>> > Showing the usage of a NULL pointer results in undefined behavior, and
>> > clang refusing to generate further code after it.
>> >
>> > Fix by using a temporary variable in cpuid_count() in place for any NU=
LL
>> > parameter.
>> >
>> > Fixes: 9ad0db58c7e2 ('tools/hvmloader: Retrieve APIC IDs from the APs =
themselves')
>> > Signed-off-by: Roger Pau Monn=C3=A9 
>>=20
>> Ugh, that's on me. I was sure I saw the pattern in Xen (from where the
>> code came from), but clearly I hallucinated.
>>=20
>> > ---
>> > Could also be fixed by using the temporary variable in the call sites,
>> > however that's more code in the call sites at the expense of less chec=
king.
>> > I don't think the extra NULL check logic in cpuid_count() is that bad.
>> >
>> > Overall the solution proposed in this patch is safer going forward, as=
 it
>> > prevent issues like this from being introduced in the first place.
>>=20
>> Might be worth moving this same extra checks onto Xen's cpuid. There's
>> no shortage of `junk` variables at the callsites.
>>=20
>> > ---
>> >  tools/firmware/hvmloader/util.h | 11 +++++++++++
>> >  1 file changed, 11 insertions(+)
>> >
>> > diff --git a/tools/firmware/hvmloader/util.h b/tools/firmware/hvmloade=
r/util.h
>> > index 644450c51ceb..765a013ddd9e 100644
>> > --- a/tools/firmware/hvmloader/util.h
>> > +++ b/tools/firmware/hvmloader/util.h
>> > @@ -190,6 +190,17 @@ static inline void cpuid_count(
>> >      uint32_t *ecx,
>> >      uint32_t *edx)
>> >  {
>> > +    uint32_t tmp;
>> > +
>> > +    if ( !eax )
>> > +        eax =3D &tmp;
>> > +    if ( !ebx )
>> > +        ebx =3D &tmp;
>> > +    if ( !ecx )
>> > +        ecx =3D &tmp;
>> > +    if ( !edx )
>> > +        edx =3D &tmp;
>> > +
>>=20
>> A somewhat more compact alternative that doesn't require tmp would be:
>>=20
>>   eax =3D eax ?: &leaf;
>>   ebx =3D ebx ?: &leaf;
>>   ecx =3D ecx ?: &leaf;
>>   edx =3D edx ?: &leaf;
>
> But that performs the write unconditionally?  It might be more compact
> code-wise, but might incur in an unneeded store?

Pretty sure it would all optimise to very similar, if not identical code.

>
>> It clobbers `leaf`, but only after it's no longer relevant.
>
> My preference was to use a explicitly tmp variable, but I could switch
> to using leaf if that's the preference.  Given that Andrew has already
> Acked the current version I'm tempted to just go with what has already
> been Acked.

That's perfectly fine. It was merely a cosmetic nit. LGTM as it is too.

>
> Thanks, Roger.

Cheers,
Alejandro


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Date: Fri, 25 Apr 2025 14:55:20 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Alejandro Vallejo 
Cc: xen-devel@lists.xenproject.org, Jan Beulich ,
	Andrew Cooper ,
	Frediano Ziglio ,
	Xen-devel 
Subject: Re: [PATCH v2] x86/intel: workaround several MONITOR/MWAIT errata
Message-ID: 
References: <20250423113215.80755-1-roger.pau@citrix.com>
 
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On Fri, Apr 25, 2025 at 01:36:42PM +0100, Alejandro Vallejo wrote:
> On Wed Apr 23, 2025 at 12:32 PM BST, Roger Pau Monne wrote:
> > There are several errata on Intel regarding the usage of the MONITOR/MWAIT
> > instructions, all having in common that stores to the monitored region
> > might not wake up the CPU.
> >
> > Fix them by forcing the sending of an IPI for the affected models.
> >
> > The Ice Lake issue has been reproduced internally on XenServer hardware,
> > and the fix does seem to prevent it.  The symptom was APs getting stuck in
> > the idle loop immediately after bring up, which in turn prevented the BSP
> > from making progress.
> 
> Ugh... so this is what it was... Awesome having this madness fixed.
> 
> Do you happen to know if Linux has a similar fix in place?

It should have now:

https://lore.kernel.org/lkml/20250421192205.7CC1A7D9@davehans-spike.ostc.intel.com/

> > This would happen before the watchdog was initialized, and hence the
> > whole system would get stuck.
> 
> That's nasty. It was the misassumption that the watchdog was already
> running that had me going in circles thinking it was a lockup rather
> than a livelock. Oh, well.
> 
> I believe the kudos for finally being able to reproduce this goes to
> Frediano?

Yes, Frediano managed to get it to reproduce reliably in the lab
(maybe 1-2 hits per day), and afterwards we pushed the rate up by just
rebooting in Xen itself after AP bringup, once we knew the specific
hardware that exhibited the issue.

Regards, Roger.


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To: Jan Beulich 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , Julien Grall ,
 Volodymyr Babchuk ,
 Bertrand Marquis ,
 Michal Orzel ,
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 Xen-devel 
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On 25/04/2025 1:48 pm, Jan Beulich wrote:
> On 25.04.2025 13:24, Andrew Cooper wrote:
>> The type used for pagetable attributes/permissions is currently unsigned int,
>> but needs to become architecture dependent as PPC needs unsigned long.
>>
>> Introduce mm-types.h to house pte_attr_t.
>>
>> Given the new toolchain baseline, we can use __has_include() now to remove the
>> need for boilerplate on most architectures.
> That's true now, when it's just pte_attr_t that's there. Memory management,
> however, is pretty different between architectures, so I wonder if in the
> longer run any one will remain that actually can use the common header.

Anything in xen/mm.h is common and needs architectures to provide (or
use the defaults) the bits required.

asm/mm{,-types.h} still exist (when necessary) to provide the
arch-specific extensions.

~Andrew


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Subject: Re: [PATCH v5 1/3] xen/mm: Introduce mm-types.h
To: Andrew Cooper 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , Julien Grall ,
 Volodymyr Babchuk ,
 Bertrand Marquis ,
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 Xen-devel 
References: <20250425112415.245585-1-andrew.cooper3@citrix.com>
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On 25.04.2025 15:05, Andrew Cooper wrote:
> On 25/04/2025 1:48 pm, Jan Beulich wrote:
>> On 25.04.2025 13:24, Andrew Cooper wrote:
>>> The type used for pagetable attributes/permissions is currently unsigned int,
>>> but needs to become architecture dependent as PPC needs unsigned long.
>>>
>>> Introduce mm-types.h to house pte_attr_t.
>>>
>>> Given the new toolchain baseline, we can use __has_include() now to remove the
>>> need for boilerplate on most architectures.
>> That's true now, when it's just pte_attr_t that's there. Memory management,
>> however, is pretty different between architectures, so I wonder if in the
>> longer run any one will remain that actually can use the common header.
> 
> Anything in xen/mm.h is common and needs architectures to provide (or
> use the defaults) the bits required.
> 
> asm/mm{,-types.h} still exist (when necessary) to provide the
> arch-specific extensions.

Sure, but you kind of avoid my question: Are you reasonably certain more than
one arch will still be able to use the defaults, once a few more things appear
in this header? (IOW: Won't we be better off having each arch have its
asm/mm-types.h right away?)

Jan


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To: Mark Brown , Julien Grall ,
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Cc: Stefano Stabellini ,
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 <306e5414-1552-4605-86d6-b23b89d00bc9@xen.org>
 
From: Ayan Kumar Halder 
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Hi Mark,

On 18/04/2025 16:00, Mark Brown wrote:
> Hello all,
> This is my first post to xen-devel. Since I'm new, let me give a brief intro about "Why?"
Welcome :)
>
> 1. I am interested in easing the ongoing burden of repeatedly obtaining safety
> certification for Xen for eventual use in high assurance operational *systems*.
> Call this an evergreen certification effort.
>
> 2. When I read the ISO26262 and avionics cert standards, I note that there is a system
> architecture (it has its own "System V" lifecycle) that encompasses a set-of-n
> hardware items (e.g. fabricated SoC analysis and also FPGA soft IP development) and
> also a set-of-m software items (e.g., bootloader, hypervisor, guest OSes, apps, containers,
> etc.). For high assurance, we must evaluate the entire system and not just some of its items.
>
> 3. Also from the standards the govern the lifecycle and processes for developing
> high assurance systems, hardware, and software, maintaining (automated) bidirectional
> requirements identifier traceability from safety requirements "down" (i.e., through
> levels of requirements decomposition, into *-architecture level designs, into software
> unit designs, into software unit code, and into software verification tests at the unit,
> library, module / architecture, and system level. From my perspective, there's a lot
> riding on these requirements IDs. I would guess that many in this community
> would feel concerned about dumping many (hundreds?) of requirements IDs
> directly into the Xen code base, even if these were located within comments.
>
> 4. Because of 1, 2, and 3 (above), when I look to understand Xen requirements sources,
> my first pass is to remember that Xen is just one software item, and it will need to accept
> integration requirements flowing in from the system (i.e., via KConfig settings and Device
> Tree / SDT language) and also from the core types that it relies upon (i.e., scoped down
> to the operationally-deployed core types including Arm Cortex-R52 during boot,
> but extending to co-processors it uses and then to IO devices that are used, etc.)
> Finally, sometimes other software items flow requirements into Xen, e.g., when
> Linux  paravirtualization or virtio implementations are scoped-in.

Thanks for the context. This is exciting as Xen finds new use cases in 
avionics.

However I think the right way to go on this is to send a RFC (request 
for comments) patch on the coding style.

Especially on ...

>
> In summary, finding an agreeable way to embed requirements IDs into the Xen
> source code seems essential to me, so that we can achieve evergreen high
> assurance certifications for Xen.
>
> Proposal 1: Rather than start by adding many requirements IDs into comments,
> we might instead start out by using a less-impactful approach.
> I propose that we could hand-pick some C data types (CDTs) that were known to be
> critically important to Xen's high assurance, and simply (re)name these CDTs,
> for example, structs and unions.
>
> This proposal is to adopt a naming convention for handpicked safety-relevant
> CDTs, starting with the first two identified below.
>
> For example in this patch, e.g. in xen/arch/arm/include/asm/arm32/mpu.h,
> two CDT structs convey the bitfield requirements from the new MPU co-processors.
> Specifically, in the typedefs "prbar_t" and "prlar_t" no struct tag (name) is used
> for either of the bitfield struct. I propose adding struct tag names to both, and
> then leveraging these struct tag names as requirements IDs.
>
> Suggested Naming Convention:
>   (a) E.g., For prbar_t, tag its bitfield struct with the name "PRBAR_BF"
>   (b) E.g., For prlar_t, tag its bitfied struct with the name "PRLAR_BF"
>   (c) Proposed bitfield struct naming convention: _BF

You can send a patch to update 
https://gitlab.com/xen-project/xen/-/blob/staging/CODING_STYLE?ref_type=heads 
with the suggested naming convention.

However, we need a rationale for the above proposal. So..

>   (d) Going forward, for bitfield structs that flow-in safety-relevant
>    requirements from the core's Technical Reference Manual (TRM)
>    and registers, to use the suffix "_BF" to identify these structs. And
>    to faithfully reuse the TRM's name for the register.  (application to structs)
> (e) Going forward, for unions that wrap "_BF" structs, to name any
>    union member name corresponding to the "_BF" as "bf" and any
>    union member name corresponding to the whole as "whole".
>    (application to unions that immediately wrap "_BF" structs)
>
> The benefits of systematically following these naming conventions will be:
> 1) Even simple tools like grep -R can find all "_BF" requirements IDs that flow from
>      hardware registers that have been handpicked due to their safety-relevance.
> 2) Any CDT-parsing tool such as Doxygen, etc., can automatically find and trace
>     all usages of "_BF" structs at several levels
>     (a) Dependent structs such as "pr_t" can be automatically traced "up" to
>     their "_BF" ancestor CDTs.
>     (b) C function argument CDTs can be automatically traced up to any
>     ancestor "_BF" CDTs, with the implication that the function may be safety-relevant
>     because it accesses one or more "_BF" CDTs.
>     (c) Simple pointer-to-CDT usages should not obscure any facts that
>     either the ".bf.*" (accessing a safety-relevant bitfield by name) or the
>    ".whole" (accessing the entire register contents by value) were accessed.

This should be a part of the commit message. I would avoid adding any 
mention of requirements or req-ids in the coding style. You can put this 
in the cover letter to explain what is the long term view on this.

In short I am suggesting that the changes suggested for the coding style 
should be concise, so the maintainers can give their opinion.

Also if you can prepare a proof of concept with a sample Doxygen report, 
that might be helpful.

What might help the maintainers is to understand :-

1. What is the minimum change you are suggesting ?

Proposed bitfield struct naming convention: _BF ....

2. How is it going to be helpful to the community in general (eg better 
code readability, ease of review, ease of mantainance)

"_BF" can be linked to the specific section of Architecture manual within the code itself. It helps to review, mantain and update the code.

> 3) This convention will naturally allow the new "_BF" requirements IDs
> to flow into all future use / access of these safety-relevant registers, including
> future verification tests.
> 4) Also, it will naturally allow the new "_BF" requirements IDs
> to be traced "up" into the TRM and automatically de-reference the semantics
> and usage and safety-relevant notes about the bitfield, the register, and the
> larger context of use for that register (e.g., at which instruction will the PMU's
> enforcement of "HPRBAR10" / "p15,4,c6,c13,0" be activated?)
> 5) The xen-devel community may find that using this naming convention
> provides an easier on-ramp to "start seeing safety and high assurance."
> This is because engineers who read any future C source code,
> or review any future patch series will see that specific lines in that C source code
> are indelibly tattooed when they refer to a safety-relevant register. Whether any
> line of code access the "_BF" register in part or in whole, that will become explicitly visible.
> The goal is to raise community awareness by flagging access / use.

You can mention this as part of the commit message.

Also it will be helpful if you can pick up an existing file (eg anything 
arch/arm64/mmu ) to explain the concept. As the new code is in flux, so 
it make things easier to understand the proposed coding style changes in 
the existing code.

You can take a look at 
https://lists.xen.org/archives/html/xen-devel/2022-05/msg01995.html to 
understand how we propose new changes to the coding style.

Hope this helps.

- Ayan

>
> Thank you!
>
> Sincerely,
> --mark
>
> -----Original Message-----
> From: Xen-devel  On Behalf Of Julien Grall
> Sent: Thursday, April 17, 2025 11:55 PM
> To: Ayan Kumar Halder ; xen-devel@lists.xenproject.org
> Cc: Stefano Stabellini ; Bertrand Marquis ; Michal Orzel ; Volodymyr Babchuk 
> Subject: Re: [PATCH v1] xen/arm: AArch32-V8R: Add MPU register definitions
>
> [You don't often get email from julien@xen.org. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
>
> CAUTION: This email originated from outside of the organization. Do not click links or open attachments unless you recognize the sender and know the content is safe.
>
>
> Hi Ayan,
>
> On 18/04/2025 00:55, Ayan Kumar Halder wrote:
>> Add the definitions for HPRBAR<0..31>, HPRLAR<0..31> and HPRENR.
>> The definitions are taken from ARM DDI 0568A.c ID110520, E2.2.3
>> HPRBAR,
>> E2.2.4 HPRENR and E2.2.6 HPRLAR.
>>
>> Introduce pr_t typedef which is a structure having the prbar and prlar
>> members, each being structured as the registers of the AArch32-V8R architecture.
>> This is the arm32 equivalent of
>> "arm/mpu: Introduce MPU memory region map structure".
>>
>> Signed-off-by: Ayan Kumar Halder 
>> ---
>> This patch should be applied after
>> "[PATCH v3 0/7] First chunk for Arm R82 and MPU support" in order to
>> enable compilation for AArch32.
>>
>>    xen/arch/arm/include/asm/arm32/mpu.h  |  59 +++++++++++
>>    xen/arch/arm/include/asm/mpu.h        |   4 +
>>    xen/arch/arm/include/asm/mpu/cpregs.h | 135 ++++++++++++++++++++++++++
>>    3 files changed, 198 insertions(+)
>>    create mode 100644 xen/arch/arm/include/asm/arm32/mpu.h
>>
>> diff --git a/xen/arch/arm/include/asm/arm32/mpu.h
>> b/xen/arch/arm/include/asm/arm32/mpu.h
>> new file mode 100644
>> index 0000000000..4aabd93479
>> --- /dev/null
>> +++ b/xen/arch/arm/include/asm/arm32/mpu.h
>> @@ -0,0 +1,59 @@
>> +/* SPDX-License-Identifier: GPL-2.0-only */
>> +/*
>> + * mpu.h: Arm Memory Protection Unit definitions for aarch64.
>> + */
>> +
>> +#ifndef __ARM_ARM32_MPU_H
>> +#define __ARM_ARM32_MPU_H
>> +
>> +#define XN_EL2_ENABLED  0x1
> I understand the define is introduced in Luca's patch, but this a bit non-descriptive... Can we find a better name? Maybe by adding the name of the register and some documentation?
>
>> +
>> +#ifndef __ASSEMBLY__
>> +
>> +/* Hypervisor Protection Region Base Address Register */ typedef
>> +union {
>> +    struct {
>> +        unsigned int xn:1;       /* Execute-Never */
>> +        unsigned int ap:2;       /* Acess Permission */
>> +        unsigned int sh:2;       /* Sharebility */
>> +        unsigned int res0:1;     /* Reserved as 0 */
>> +        unsigned int base:26;    /* Base Address */
>> +    } reg;
>> +    uint32_t bits;
>> +} prbar_t;
>> +
>> +/* Hypervisor Protection Region Limit Address Register */ typedef
>> +union {
>> +    struct {
>> +        unsigned int en:1;     /* Region enable */
>> +        unsigned int ai:3;     /* Memory Attribute Index */
>> +        /*
>> +         * There is no actual ns bit in hardware. It is used here for
>> +         * compatibility with Armr64 code. Thus, we are reusing a res0 bit for ns.
> typo: Arm64.
>
>> +         */
> Hmmmm, this would mean someone may mistakenly set the bit to 0 by mistake. If the field is always meant to be 0 on arm64, then I would consider to name is res0 on arm64 with an explanation.
>
> This would make clear the bit is not supposed to have a value other than 0.
>
>> +        unsigned int ns:1;     /* Reserved 0 by hardware */
>> +        unsigned int res0:1;   /* Reserved 0 by hardware */
>> +        unsigned int limit:26;  /* Limit Address */
> NIT: Can we align the comments?
>
>> +    } reg;
>> +    uint32_t bits;
>> +} prlar_t;
>> +
>> +/* Protection Region */
>> +typedef struct {
>> +    prbar_t prbar;
>> +    prlar_t prlar;
>> +    uint64_t p2m_type;          /* Used to store p2m types. */
>> +} pr_t;
> This looks to be common with arm64. If so, I would prefer if the structure is in a common header.
>
>> +
>> +#endif /* __ASSEMBLY__ */
>> +
>> +#endif /* __ARM_ARM32_MPU_H */
>> +
>> +/*
>> + * Local variables:
>> + * mode: C
>> + * c-file-style: "BSD"
>> + * c-basic-offset: 4
>> + * indent-tabs-mode: nil
>> + * End:
>> + */
>> diff --git a/xen/arch/arm/include/asm/mpu.h
>> b/xen/arch/arm/include/asm/mpu.h index 77d0566f97..67127149c0 100644
>> --- a/xen/arch/arm/include/asm/mpu.h
>> +++ b/xen/arch/arm/include/asm/mpu.h
>> @@ -8,8 +8,12 @@
>>
>>    #if defined(CONFIG_ARM_64)
>>    # include 
>> +#elif defined(CONFIG_ARM_32)
>> +# include 
>>    #endif
>>
>> +#define PRENR_MASK  GENMASK(31, 0)
>> +
>>    #define MPU_REGION_SHIFT  6
>>    #define MPU_REGION_ALIGN  (_AC(1, UL) << MPU_REGION_SHIFT)
>>    #define MPU_REGION_MASK   (~(MPU_REGION_ALIGN - 1))
>> diff --git a/xen/arch/arm/include/asm/mpu/cpregs.h
>> b/xen/arch/arm/include/asm/mpu/cpregs.h
>> index d5cd0e04d5..7cf52aa09a 100644
>> --- a/xen/arch/arm/include/asm/mpu/cpregs.h
>> +++ b/xen/arch/arm/include/asm/mpu/cpregs.h
>> @@ -6,18 +6,153 @@
>>    /* CP15 CR0: MPU Type Register */
>>    #define HMPUIR          p15,4,c0,c0,4
>>
>> +/* CP15 CR6: Protection Region Enable Register */
>> +#define HPRENR          p15,4,c6,c1,1
>> +
>>    /* CP15 CR6: MPU Protection Region Base/Limit/Select Address Register */
>>    #define HPRSELR         p15,4,c6,c2,1
>>    #define HPRBAR          p15,4,c6,c3,0
>>    #define HPRLAR          p15,4,c6,c8,1
>>
>> +/* CP15 CR6: MPU Protection Region Base/Limit Address Register */
>> +#define HPRBAR0         p15,4,c6,c8,0
>> +#define HPRLAR0         p15,4,c6,c8,1
>> +#define HPRBAR1         p15,4,c6,c8,4
>> +#define HPRLAR1         p15,4,c6,c8,5
>> +#define HPRBAR2         p15,4,c6,c9,0
>> +#define HPRLAR2         p15,4,c6,c9,1
>> +#define HPRBAR3         p15,4,c6,c9,4
>> +#define HPRLAR3         p15,4,c6,c9,5
>> +#define HPRBAR4         p15,4,c6,c10,0
>> +#define HPRLAR4         p15,4,c6,c10,1
>> +#define HPRBAR5         p15,4,c6,c10,4
>> +#define HPRLAR5         p15,4,c6,c10,5
>> +#define HPRBAR6         p15,4,c6,c11,0
>> +#define HPRLAR6         p15,4,c6,c11,1
>> +#define HPRBAR7         p15,4,c6,c11,4
>> +#define HPRLAR7         p15,4,c6,c11,5
>> +#define HPRBAR8         p15,4,c6,c12,0
>> +#define HPRLAR8         p15,4,c6,c12,1
>> +#define HPRBAR9         p15,4,c6,c12,4
>> +#define HPRLAR9         p15,4,c6,c12,5
>> +#define HPRBAR10        p15,4,c6,c13,0
>> +#define HPRLAR10        p15,4,c6,c13,1
>> +#define HPRBAR11        p15,4,c6,c13,4
>> +#define HPRLAR11        p15,4,c6,c13,5
>> +#define HPRBAR12        p15,4,c6,c14,0
>> +#define HPRLAR12        p15,4,c6,c14,1
>> +#define HPRBAR13        p15,4,c6,c14,4
>> +#define HPRLAR13        p15,4,c6,c14,5
>> +#define HPRBAR14        p15,4,c6,c15,0
>> +#define HPRLAR14        p15,4,c6,c15,1
>> +#define HPRBAR15        p15,4,c6,c15,4
>> +#define HPRLAR15        p15,4,c6,c15,5
>> +#define HPRBAR16        p15,5,c6,c8,0
>> +#define HPRLAR16        p15,5,c6,c8,1
>> +#define HPRBAR17        p15,5,c6,c8,4
>> +#define HPRLAR17        p15,5,c6,c8,5
>> +#define HPRBAR18        p15,5,c6,c9,0
>> +#define HPRLAR18        p15,5,c6,c9,1
>> +#define HPRBAR19        p15,5,c6,c9,4
>> +#define HPRLAR19        p15,5,c6,c9,5
>> +#define HPRBAR20        p15,5,c6,c10,0
>> +#define HPRLAR20        p15,5,c6,c10,1
>> +#define HPRBAR21        p15,5,c6,c10,4
>> +#define HPRLAR21        p15,5,c6,c10,5
>> +#define HPRBAR22        p15,5,c6,c11,0
>> +#define HPRLAR22        p15,5,c6,c11,1
>> +#define HPRBAR23        p15,5,c6,c11,4
>> +#define HPRLAR23        p15,5,c6,c11,5
>> +#define HPRBAR24        p15,5,c6,c12,0
>> +#define HPRLAR24        p15,5,c6,c12,1
>> +#define HPRBAR25        p15,5,c6,c12,4
>> +#define HPRLAR25        p15,5,c6,c12,5
>> +#define HPRBAR26        p15,5,c6,c13,0
>> +#define HPRLAR26        p15,5,c6,c13,1
>> +#define HPRBAR27        p15,5,c6,c13,4
>> +#define HPRLAR27        p15,5,c6,c13,5
>> +#define HPRBAR28        p15,5,c6,c14,0
>> +#define HPRLAR28        p15,5,c6,c14,1
>> +#define HPRBAR29        p15,5,c6,c14,4
>> +#define HPRLAR29        p15,5,c6,c14,5
>> +#define HPRBAR30        p15,5,c6,c15,0
>> +#define HPRLAR30        p15,5,c6,c15,1
>> +#define HPRBAR31        p15,5,c6,c15,4
>> +#define HPRLAR31        p15,5,c6,c15,5
> NIT: Is there any way we could generate the values using macros?
>
>> +
>>    /* Aliases of AArch64 names for use in common code */
>>    #ifdef CONFIG_ARM_32
>>    /* Alphabetically... */
>>    #define MPUIR_EL2       HMPUIR
>>    #define PRBAR_EL2       HPRBAR
>> +#define PRBAR0_EL2      HPRBAR0
> AFAIU, the alias will be mainly used in the macro generate the switch. Rather than open-coding all the PR*AR_EL2, can we provide two macros PR{B, L}AR_N that will be implemented as HPR{B,L}AR##n for arm32 and PR{B,L}AR##n for arm64?
>
>>    #define PRSELR_EL2      HPRSELR
>> +
>>    #endif /* CONFIG_ARM_32 */
>>
>>    #endif /* __ARM_MPU_CPREGS_H */
> Cheers,
>
> --
> Julien Grall
>
>
> ________________________________
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From xen-devel-bounces@lists.xenproject.org Fri Apr 25 13:32:32 2025
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Date: Fri, 25 Apr 2025 14:32:16 +0100
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Subject: Re: [PATCH v1] xen/arm: AArch32-V8R: Add MPU register definitions
Content-Language: en-GB
To: Ayan Kumar Halder ,
 Ayan Kumar Halder , xen-devel@lists.xenproject.org
Cc: Stefano Stabellini ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Luca Fancellu 
References: <20250417155511.1854081-1-ayan.kumar.halder@amd.com>
 <306e5414-1552-4605-86d6-b23b89d00bc9@xen.org>
 
From: Julien Grall 
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Hi Ayan

On 25/04/2025 13:00, Ayan Kumar Halder wrote:
>>> +        unsigned int ns:1;     /* Reserved 0 by hardware */
>>> +        unsigned int res0:1;   /* Reserved 0 by hardware */
> Then, we can change this on Arm32 as well.
>>> +        unsigned int limit:26;  /* Limit Address */
>>
>> NIT: Can we align the comments?
> Ack.
>>
>>> +    } reg;
>>> +    uint32_t bits;
>>> +} prlar_t;
>>> +
>>> +/* Protection Region */
>>> +typedef struct {
>>> +    prbar_t prbar;
>>> +    prlar_t prlar;
>>> +    uint64_t p2m_type;          /* Used to store p2m types. */
>>> +} pr_t;
>>
>> This looks to be common with arm64. If so, I would prefer if the 
>> structure is in a common header.
> 
> No, in arm64 this is
> 
> typedef struct {
>       prbar_t prbar;
>       prlar_t prlar;
> } pr_t;
> 
> The reason being Arm64 uses unused bits (ie 'pad') to store the type.

Hmmm... They are bits from the system register (prbar), right? If so, 
you can't use them for storing the p2m_type as AFAICT they are RES0.

You could possibly mask the bits before writing them. But then, it will 
become risky if the fields are defined.

Also, the number of MPU regions is fairly small. So, I don't think it is 
worth it to store p2m_type.

Regardless that, I think it would be better to defer the introduction of 
p2m_type until guest support is added. So it will be easier to 
understand how this is going to be used and the size (for instance, I 
doubt 64-bit is necessary...).

Cheers,

-- 
Julien Grall



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On Thu, Apr 24, 2025 at 07:51:21PM +0100, Andrew Cooper wrote:
> On 24/04/2025 7:47 pm, Sergii Dmytruk wrote:
> >> Alignment that large is unexpected, and I suspect we want to fix it. Is
> >> it pre-existing, or something introduced by your series?
> >>
> >> ~Andrew
> > Pre-existing one.  I can see `-N` is already passed to `ld`:
> >
> > -N, --omagic     Do not page align data, do not make text readonly
> >
> > Specifying `--section-alignment 512 --file-alignment 512 --nmagic`
> > didn't reduce the alignment.  Statistics so far:
> >
> >   Give 0x1000 offset:
> >   GNU ld (GNU Binutils for Debian) 2.31.1
> >   GNU ld version 2.38-27.fc37
> >
> >   Give 0x440 offset:
> >   GNU ld (GNU Binutils for Debian) 2.40
> >   GNU ld (GNU Binutils for Debian) 2.41
> >
> > Maybe that's not something configurable and just needs a newer version.
>
> Ah - that's something that was changed literally yesterday:
>
> https://xenbits.xen.org/gitweb/?p=xen.git;a=commitdiff;h=d444763f8ca556d0a67a4b933be303d346baef02
>
> in order to fix some problems we've had trying to get xen.efi happy to
> be NX_COMPAT.
>
> We couldn't identify any good reason why -N was in use.
>
> ~Andrew

The fewer cryptic flags the better, but adding either of those flags or
removing -N doesn't affect the file offset.  EFI_LDFLAGS even includes
--file-alignment=0x20, it just gets ignored and that could be
target-specific behaviour in older versions of ld.  This commit by Jan
Beulich might be the one fixing it:

https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=bc5baa9f13ffb3fd4c39f1a779062bfb3a980cea


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Date: Fri, 25 Apr 2025 14:48:19 +0100
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Subject: Re: [PATCH v5 1/3] xen/mm: Introduce mm-types.h
To: Jan Beulich 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , Julien Grall ,
 Volodymyr Babchuk ,
 Bertrand Marquis ,
 Michal Orzel ,
 Oleksii Kurochko ,
 Shawn Anastasio ,
 Xen-devel 
References: <20250425112415.245585-1-andrew.cooper3@citrix.com>
 <20250425112415.245585-2-andrew.cooper3@citrix.com>
 
 <74bf3a58-6c90-4123-80e3-b72ba67ea46d@citrix.com>
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In-Reply-To: <654dd5d3-b235-4f5b-9ad6-b3f1281434d2@suse.com>
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On 25/04/2025 2:13 pm, Jan Beulich wrote:
> On 25.04.2025 15:05, Andrew Cooper wrote:
>> On 25/04/2025 1:48 pm, Jan Beulich wrote:
>>> On 25.04.2025 13:24, Andrew Cooper wrote:
>>>> The type used for pagetable attributes/permissions is currently unsigned int,
>>>> but needs to become architecture dependent as PPC needs unsigned long.
>>>>
>>>> Introduce mm-types.h to house pte_attr_t.
>>>>
>>>> Given the new toolchain baseline, we can use __has_include() now to remove the
>>>> need for boilerplate on most architectures.
>>> That's true now, when it's just pte_attr_t that's there. Memory management,
>>> however, is pretty different between architectures, so I wonder if in the
>>> longer run any one will remain that actually can use the common header.
>> Anything in xen/mm.h is common and needs architectures to provide (or
>> use the defaults) the bits required.
>>
>> asm/mm{,-types.h} still exist (when necessary) to provide the
>> arch-specific extensions.
> Sure, but you kind of avoid my question: Are you reasonably certain more than
> one arch will still be able to use the defaults, once a few more things appear
> in this header? (IOW: Won't we be better off having each arch have its
> asm/mm-types.h right away?)

I can't predict the future, but my gut feeling is that it's not going to
diverge very much.

If needs be, we can go to conditional override for specific bits.  Or,
if I'm wrong, I'm wrong.  It's not hard to change.

~Andrew


From xen-devel-bounces@lists.xenproject.org Fri Apr 25 14:05:13 2025
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Subject: Re: [PATCH v2] xen/arm: AArch32-V8R: Add MPU register definitions
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To: Ayan Kumar Halder ,
 xen-devel@lists.xenproject.org
Cc: Stefano Stabellini ,
 Luca Fancellu ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk 
References: <20250425124506.390458-1-ayan.kumar.halder@amd.com>
From: Julien Grall 
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Hi Ayan,

On 25/04/2025 13:45, Ayan Kumar Halder wrote:
> Add the definitions for HPRBAR<0..31>, HPRLAR<0..31> and HPRENR.
> The definitions are taken from ARM DDI 0568A.c ID110520, E2.2.3 HPRBAR,
> E2.2.4 HPRENR and E2.2.6 HPRLAR.
> 
> Introduce pr_t typedef which is a structure having the prbar and prlar members,
> each being structured as the registers of the AArch32-V8R architecture.
> This is the arm32 equivalent of
> "arm/mpu: Introduce MPU memory region map structure".
> 
> Few differences worth noting:-
> 1. The XN in HPRBAR is 1 bit in Arm32 (unlike 2 bits in Arm64).
> 2. PRSELR_EL2 is not used to access HPRBAR<0..31> and HPRLAR<0..31>.
> 
> Introduce macros PR{B,L}AR_EL2_(num) to generate alias for the sysregs.
> 
> Also, took the opportunity to fix the register definition of HPRLAR.
> 
> Signed-off-by: Ayan Kumar Halder 
> ---
> Changes from :-
> 
> v1 - 1. Introduce macros for PR{B,L}AR_EL2_(num). Similar macros need to be
> defined for arm64 as well.
> 2. Some style fixes
> 
> Comments not addressed
> 1. Renaming of PRBAR_EL2_XN if needed.
> 2. Using res0 for ns.

Why are you rushing sending a new version that doesn't address most of 
the comments when ...

> 
> This patch should be applied after
> "[PATCH v3 0/7] First chunk for Arm R82 and MPU support" in order to enable
> compilation for AArch32 and macros need to be defined for Arm64 as well.

... this depends on a patch still under review? This is not a very good 
use of reviewers time.

Cheers,

-- 
Julien Grall



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Date: Fri, 25 Apr 2025 15:16:32 +0100
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Subject: Re: [PATCH v2] xen/arm: AArch32-V8R: Add MPU register definitions
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To: Julien Grall ,
 Ayan Kumar Halder , xen-devel@lists.xenproject.org
Cc: Stefano Stabellini ,
 Luca Fancellu ,
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 Michal Orzel ,
 Volodymyr Babchuk 
References: <20250425124506.390458-1-ayan.kumar.halder@amd.com>
 <82de1227-7489-4ac9-a52c-2da188bd8e54@xen.org>
From: Ayan Kumar Halder 
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On 25/04/2025 15:05, Julien Grall wrote:
> Hi Ayan,
Hi Julien,
>
> On 25/04/2025 13:45, Ayan Kumar Halder wrote:
>> Add the definitions for HPRBAR<0..31>, HPRLAR<0..31> and HPRENR.
>> The definitions are taken from ARM DDI 0568A.c ID110520, E2.2.3 
>> HPRBAR,
>> E2.2.4 HPRENR and E2.2.6 HPRLAR.
>>
>> Introduce pr_t typedef which is a structure having the prbar and 
>> prlar members,
>> each being structured as the registers of the AArch32-V8R architecture.
>> This is the arm32 equivalent of
>> "arm/mpu: Introduce MPU memory region map structure".
>>
>> Few differences worth noting:-
>> 1. The XN in HPRBAR is 1 bit in Arm32 (unlike 2 bits in Arm64).
>> 2. PRSELR_EL2 is not used to access HPRBAR<0..31> and HPRLAR<0..31>.
>>
>> Introduce macros PR{B,L}AR_EL2_(num) to generate alias for the sysregs.
>>
>> Also, took the opportunity to fix the register definition of HPRLAR.
>>
>> Signed-off-by: Ayan Kumar Halder 
>> ---
>> Changes from :-
>>
>> v1 - 1. Introduce macros for PR{B,L}AR_EL2_(num). Similar macros need 
>> to be
>> defined for arm64 as well.
>> 2. Some style fixes
>>
>> Comments not addressed
>> 1. Renaming of PRBAR_EL2_XN if needed.
>> 2. Using res0 for ns.
>
> Why are you rushing sending a new version that doesn't address most of 
> the comments when ...
Sorry, as there were lot of comments, so I want to show the proposed 
changes. I should probably have waited until we are aligned on all the 
changes in v1.
>
>>
>> This patch should be applied after
>> "[PATCH v3 0/7] First chunk for Arm R82 and MPU support" in order to 
>> enable
>> compilation for AArch32 and macros need to be defined for Arm64 as well.
>
> ... this depends on a patch still under review? This is not a very 
> good use of reviewers time.

Ack.

- Ayan

>
> Cheers,
>


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From: Arnd Bergmann 
To: Thomas Gleixner ,
	Ingo Molnar ,
	Borislav Petkov ,
	Dave Hansen ,
	x86@kernel.org
Cc: Arnd Bergmann ,
	"H. Peter Anvin" ,
	Juergen Gross ,
	Boris Ostrovsky ,
	Alexander Usyskin ,
	Greg Kroah-Hartman ,
	=?UTF-8?q?Mateusz=20Jo=C5=84czyk?= ,
	"Mike Rapoport (Microsoft)" ,
	Ard Biesheuvel ,
	Peter Zijlstra ,
	linux-kernel@vger.kernel.org,
	xen-devel@lists.xenproject.org
Subject: [PATCH] [RFC] x86/cpu: rework instruction set selection
Date: Fri, 25 Apr 2025 16:15:15 +0200
Message-Id: <20250425141740.734030-1-arnd@kernel.org>
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From: Arnd Bergmann 

With cx8 and tsc being mandatory features, the only important
architectural features are now cmov and pae.

Change the large list of target CPUs to no longer pick the instruction set
itself but only the mtune= optimization level and in-kernel optimizations
that remain compatible with all cores.

The CONFIG_X86_CMOV instead becomes user-selectable and is now how
Kconfig picks between 586-class (Pentium, Pentium MMX, K6, C3, GeodeGX)
and 686-class (everything else) targets.

In order to allow running on late 32-bit cores (Athlon, Pentium-M,
Pentium 4, ...), the X86_L1_CACHE_SHIFT can no longer be set to anything
lower than 6 (i.e. 64 byte cache lines).

The optimization options now depend on X86_CMOV and X86_PAE instead
of the other way round, while other compile-time conditionals that
checked for MATOM/MGEODEGX1 instead now check for CPU_SUP_* options
that enable support for a particular CPU family.

Link: https://lore.kernel.org/lkml/dd29df0c-0b4f-44e6-b71b-2a358ea76fb4@app.fastmail.com/
Signed-off-by: Arnd Bergmann 
---
This is what I had in mind as mentioned in the earlier thread on
cx8/tsc removal. I based this on top of the Ingo's [RFC 15/15]
patch.
---
 arch/x86/Kconfig                |   2 +-
 arch/x86/Kconfig.cpu            | 100 ++++++++++++++------------------
 arch/x86/Makefile_32.cpu        |  48 +++++++--------
 arch/x86/include/asm/vermagic.h |  36 +-----------
 arch/x86/kernel/tsc.c           |   2 +-
 arch/x86/xen/Kconfig            |   1 -
 drivers/misc/mei/Kconfig        |   2 +-
 7 files changed, 74 insertions(+), 117 deletions(-)

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index a9d717558972..1e33f88c9b97 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -1438,7 +1438,7 @@ config HIGHMEM
 
 config X86_PAE
 	bool "PAE (Physical Address Extension) Support"
-	depends on X86_32 && X86_HAVE_PAE
+	depends on X86_32 && X86_CMOV
 	select PHYS_ADDR_T_64BIT
 	help
 	  PAE is required for NX support, and furthermore enables
diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu
index 6f1e8cc8fe58..0619566de93f 100644
--- a/arch/x86/Kconfig.cpu
+++ b/arch/x86/Kconfig.cpu
@@ -1,23 +1,32 @@
 # SPDX-License-Identifier: GPL-2.0
 # Put here option for CPU selection and depending optimization
-choice
-	prompt "x86-32 Processor family"
-	depends on X86_32
-	default M686
+
+config X86_CMOV
+	bool "Require 686-class CMOV instructions" if X86_32
+	default y
 	help
-	  This is the processor type of your CPU. This information is
-	  used for optimizing purposes. In order to compile a kernel
-	  that can run on all supported x86 CPU types (albeit not
-	  optimally fast), you can specify "586" here.
+	  Most x86-32 processor implementations are compatible with
+	  the the CMOV instruction originally added in the Pentium Pro,
+	  and they perform much better when using it.
+
+	  Disable this option to build for 586-class CPUs without this
+	  instruction. This is only required for the original Intel
+	  Pentium (P5, P54, P55), AMD K6/K6-II/K6-3D, Geode GX1 and Via
+	  CyrixIII/C3 CPUs.
 
 	  Note that the 386 and 486 is no longer supported, this includes
 	  AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI 486DLC/DLC2,
 	  UMC 486SX-S and the NexGen Nx586, AMD ELAN and all 486 based
 	  CPUs.
 
-	  The kernel will not necessarily run on earlier architectures than
-	  the one you have chosen, e.g. a Pentium optimized kernel will run on
-	  a PPro, but not necessarily on a i486.
+choice
+	prompt "x86-32 Processor optimization"
+	depends on X86_32
+	default X86_GENERIC
+	help
+	  This is the processor type of your CPU. This information is
+	  used for optimizing purposes, but does not change compatibility
+	  with other CPU types.
 
 	  Here are the settings recommended for greatest speed:
 	  - "586" for generic Pentium CPUs lacking the TSC
@@ -45,14 +54,13 @@ choice
 
 config M586TSC
 	bool "Pentium-Classic"
-	depends on X86_32
+	depends on X86_32 && !X86_CMOV
 	help
-	  Select this for a Pentium Classic processor with the RDTSC (Read
-	  Time Stamp Counter) instruction for benchmarking.
+	  Select this for a Pentium Classic processor.
 
 config M586MMX
 	bool "Pentium-MMX"
-	depends on X86_32
+	depends on X86_32 && !X86_CMOV
 	help
 	  Select this for a Pentium with the MMX graphics/multimedia
 	  extended instructions.
@@ -117,7 +125,7 @@ config MPENTIUM4
 
 config MK6
 	bool "K6/K6-II/K6-III"
-	depends on X86_32
+	depends on X86_32 && !X86_CMOV
 	help
 	  Select this for an AMD K6-family processor.  Enables use of
 	  some extended instructions, and passes appropriate optimization
@@ -125,7 +133,7 @@ config MK6
 
 config MK7
 	bool "Athlon/Duron/K7"
-	depends on X86_32
+	depends on X86_32 && !X86_PAE
 	help
 	  Select this for an AMD Athlon K7-family processor.  Enables use of
 	  some extended instructions, and passes appropriate optimization
@@ -147,42 +155,37 @@ config MEFFICEON
 
 config MGEODEGX1
 	bool "GeodeGX1"
-	depends on X86_32
+	depends on X86_32 && !X86_CMOV
 	help
 	  Select this for a Geode GX1 (Cyrix MediaGX) chip.
 
 config MGEODE_LX
 	bool "Geode GX/LX"
-	depends on X86_32
+	depends on X86_32 && !X86_PAE
 	help
 	  Select this for AMD Geode GX and LX processors.
 
 config MCYRIXIII
 	bool "CyrixIII/VIA-C3"
-	depends on X86_32
+	depends on X86_32 && !X86_CMOV
 	help
 	  Select this for a Cyrix III or C3 chip.  Presently Linux and GCC
 	  treat this chip as a generic 586. Whilst the CPU is 686 class,
 	  it lacks the cmov extension which gcc assumes is present when
 	  generating 686 code.
-	  Note that Nehemiah (Model 9) and above will not boot with this
-	  kernel due to them lacking the 3DNow! instructions used in earlier
-	  incarnations of the CPU.
 
 config MVIAC3_2
 	bool "VIA C3-2 (Nehemiah)"
-	depends on X86_32
+	depends on X86_32 && !X86_PAE
 	help
 	  Select this for a VIA C3 "Nehemiah". Selecting this enables usage
 	  of SSE and tells gcc to treat the CPU as a 686.
-	  Note, this kernel will not boot on older (pre model 9) C3s.
 
 config MVIAC7
 	bool "VIA C7"
-	depends on X86_32
+	depends on X86_32 && !X86_PAE
 	help
-	  Select this for a VIA C7.  Selecting this uses the correct cache
-	  shift and tells gcc to treat the CPU as a 686.
+	  Select this for a VIA C7.
 
 config MATOM
 	bool "Intel Atom"
@@ -192,20 +195,19 @@ config MATOM
 	  accordingly optimized code. Use a recent GCC with specific Atom
 	  support in order to fully benefit from selecting this option.
 
-endchoice
-
 config X86_GENERIC
-	bool "Generic x86 support"
-	depends on X86_32
+	bool "Generic x86"
 	help
-	  Instead of just including optimizations for the selected
+	  Instead of just including optimizations for a particular
 	  x86 variant (e.g. PII, Crusoe or Athlon), include some more
 	  generic optimizations as well. This will make the kernel
-	  perform better on x86 CPUs other than that selected.
+	  perform better on a variety of CPUs.
 
 	  This is really intended for distributors who need more
 	  generic optimizations.
 
+endchoice
+
 #
 # Define implied options from the CPU selection here
 config X86_INTERNODE_CACHE_SHIFT
@@ -216,17 +218,14 @@ config X86_INTERNODE_CACHE_SHIFT
 config X86_L1_CACHE_SHIFT
 	int
 	default "7" if MPENTIUM4
-	default "6" if MK7 || MPENTIUMM || MATOM || MVIAC7 || X86_GENERIC || X86_64
-	default "4" if MGEODEGX1
-	default "5" if MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MVIAC3_2 || MGEODE_LX
+	default "6"
 
 config X86_F00F_BUG
-	def_bool y
-	depends on M586MMX || M586TSC || M586
+	def_bool !X86_CMOV
 
 config X86_ALIGNMENT_16
 	def_bool y
-	depends on MCYRIXIII || MK6 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODEGX1
+	depends on MCYRIXIII || MK6 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODEGX1 || (!X86_CMOV && X86_GENERIC)
 
 config X86_INTEL_USERCOPY
 	def_bool y
@@ -234,34 +233,23 @@ config X86_INTEL_USERCOPY
 
 config X86_USE_PPRO_CHECKSUM
 	def_bool y
-	depends on MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MATOM
+	depends on MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MATOM || (X86_CMOV && X86_GENERIC)
 
 config X86_TSC
 	def_bool y
 
-config X86_HAVE_PAE
-	def_bool y
-	depends on MCRUSOE || MEFFICEON || MCYRIXIII || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC7 || MATOM || X86_64
-
 config X86_CX8
 	def_bool y
 
-# this should be set for all -march=.. options where the compiler
-# generates cmov.
-config X86_CMOV
-	def_bool y
-	depends on (MK7 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || MATOM || MGEODE_LX || X86_64)
-
 config X86_MINIMUM_CPU_FAMILY
 	int
 	default "64" if X86_64
-	default "6" if X86_32 && (MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MEFFICEON || MATOM || MK7)
-	default "5" if X86_32
-	default "4"
+	default "6" if X86_32 && X86_CMOV
+	default "5"
 
 config X86_DEBUGCTLMSR
 	def_bool y
-	depends on !(MK6 || MCYRIXIII || M586MMX || M586TSC || M586) && !UML
+	depends on X86_CMOV && !UML
 
 config IA32_FEAT_CTL
 	def_bool y
@@ -297,7 +285,7 @@ config CPU_SUP_INTEL
 config CPU_SUP_CYRIX_32
 	default y
 	bool "Support Cyrix processors" if PROCESSOR_SELECT
-	depends on M586 || M586TSC || M586MMX || (EXPERT && !64BIT)
+	depends on !64BIT
 	help
 	  This enables detection, tunings and quirks for Cyrix processors
 
diff --git a/arch/x86/Makefile_32.cpu b/arch/x86/Makefile_32.cpu
index f5e933077bf4..ebd7ec6eaf34 100644
--- a/arch/x86/Makefile_32.cpu
+++ b/arch/x86/Makefile_32.cpu
@@ -10,30 +10,32 @@ else
 align		:= -falign-functions=0 -falign-jumps=0 -falign-loops=0
 endif
 
-cflags-$(CONFIG_M586TSC)	+= -march=i586
-cflags-$(CONFIG_M586MMX)	+= -march=pentium-mmx
-cflags-$(CONFIG_M686)		+= -march=i686
-cflags-$(CONFIG_MPENTIUMII)	+= -march=i686 $(call tune,pentium2)
-cflags-$(CONFIG_MPENTIUMIII)	+= -march=i686 $(call tune,pentium3)
-cflags-$(CONFIG_MPENTIUMM)	+= -march=i686 $(call tune,pentium3)
-cflags-$(CONFIG_MPENTIUM4)	+= -march=i686 $(call tune,pentium4)
-cflags-$(CONFIG_MK6)		+= -march=k6
-# Please note, that patches that add -march=athlon-xp and friends are pointless.
-# They make zero difference whatsosever to performance at this time.
-cflags-$(CONFIG_MK7)		+= -march=athlon
-cflags-$(CONFIG_MCRUSOE)	+= -march=i686 $(align)
-cflags-$(CONFIG_MEFFICEON)	+= -march=i686 $(call tune,pentium3) $(align)
-cflags-$(CONFIG_MCYRIXIII)	+= $(call cc-option,-march=c3,-march=i486) $(align)
-cflags-$(CONFIG_MVIAC3_2)	+= $(call cc-option,-march=c3-2,-march=i686)
-cflags-$(CONFIG_MVIAC7)		+= -march=i686
-cflags-$(CONFIG_MATOM)		+= -march=atom
+ifdef CONFIG_X86_CMOV
+cflags-y			+= -march=i686
+else
+cflags-y			+= -march=i586
+endif
 
-# Geode GX1 support
-cflags-$(CONFIG_MGEODEGX1)	+= -march=pentium-mmx
-cflags-$(CONFIG_MGEODE_LX)	+= $(call cc-option,-march=geode,-march=pentium-mmx)
-# add at the end to overwrite eventual tuning options from earlier
-# cpu entries
-cflags-$(CONFIG_X86_GENERIC) 	+= $(call tune,generic,$(call tune,i686))
+cflags-$(CONFIG_M586TSC)	+= -mtune=i586
+cflags-$(CONFIG_M586MMX)	+= -mtune=pentium-mmx
+cflags-$(CONFIG_M686)		+= -mtune=i686
+cflags-$(CONFIG_MPENTIUMII)	+= -mtune=pentium2
+cflags-$(CONFIG_MPENTIUMIII)	+= -mtune=pentium3
+cflags-$(CONFIG_MPENTIUMM)	+= -mtune=pentium3
+cflags-$(CONFIG_MPENTIUM4)	+= -mtune=pentium4
+cflags-$(CONFIG_MK6)		+= -mtune=k6
+# Please note, that patches that add -mtune=athlon-xp and friends are pointless.
+# They make zero difference whatsosever to performance at this time.
+cflags-$(CONFIG_MK7)		+= -mtune=athlon
+cflags-$(CONFIG_MCRUSOE)	+= -mtune=i686 $(align)
+cflags-$(CONFIG_MEFFICEON)	+= -mtune=pentium3 $(align)
+cflags-$(CONFIG_MCYRIXIII)	+= -mtune=c3 $(align)
+cflags-$(CONFIG_MVIAC3_2)	+= -mtune=c3-2
+cflags-$(CONFIG_MVIAC7)		+= -mtune=i686
+cflags-$(CONFIG_MATOM)		+= -mtune=atom
+cflags-$(CONFIG_MGEODEGX1)	+= -mtune=pentium-mmx
+cflags-$(CONFIG_MGEODE_LX)	+= -mtune=geode
+cflags-$(CONFIG_X86_GENERIC) 	+= -mtune=generic
 
 # Bug fix for binutils: this option is required in order to keep
 # binutils from generating NOPL instructions against our will.
diff --git a/arch/x86/include/asm/vermagic.h b/arch/x86/include/asm/vermagic.h
index e26061df0c9b..6554dbdfd719 100644
--- a/arch/x86/include/asm/vermagic.h
+++ b/arch/x86/include/asm/vermagic.h
@@ -5,42 +5,10 @@
 
 #ifdef CONFIG_X86_64
 /* X86_64 does not define MODULE_PROC_FAMILY */
-#elif defined CONFIG_M586TSC
-#define MODULE_PROC_FAMILY "586TSC "
-#elif defined CONFIG_M586MMX
-#define MODULE_PROC_FAMILY "586MMX "
-#elif defined CONFIG_MATOM
-#define MODULE_PROC_FAMILY "ATOM "
-#elif defined CONFIG_M686
+#elif defined CONFIG_X86_CMOV
 #define MODULE_PROC_FAMILY "686 "
-#elif defined CONFIG_MPENTIUMII
-#define MODULE_PROC_FAMILY "PENTIUMII "
-#elif defined CONFIG_MPENTIUMIII
-#define MODULE_PROC_FAMILY "PENTIUMIII "
-#elif defined CONFIG_MPENTIUMM
-#define MODULE_PROC_FAMILY "PENTIUMM "
-#elif defined CONFIG_MPENTIUM4
-#define MODULE_PROC_FAMILY "PENTIUM4 "
-#elif defined CONFIG_MK6
-#define MODULE_PROC_FAMILY "K6 "
-#elif defined CONFIG_MK7
-#define MODULE_PROC_FAMILY "K7 "
-#elif defined CONFIG_MCRUSOE
-#define MODULE_PROC_FAMILY "CRUSOE "
-#elif defined CONFIG_MEFFICEON
-#define MODULE_PROC_FAMILY "EFFICEON "
-#elif defined CONFIG_MCYRIXIII
-#define MODULE_PROC_FAMILY "CYRIXIII "
-#elif defined CONFIG_MVIAC3_2
-#define MODULE_PROC_FAMILY "VIAC3-2 "
-#elif defined CONFIG_MVIAC7
-#define MODULE_PROC_FAMILY "VIAC7 "
-#elif defined CONFIG_MGEODEGX1
-#define MODULE_PROC_FAMILY "GEODEGX1 "
-#elif defined CONFIG_MGEODE_LX
-#define MODULE_PROC_FAMILY "GEODE "
 #else
-#error unknown processor family
+#define MODULE_PROC_FAMILY "586 "
 #endif
 
 #ifdef CONFIG_X86_32
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 489c779ef3ef..76b15ef8c85f 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -1221,7 +1221,7 @@ bool tsc_clocksource_watchdog_disabled(void)
 
 static void __init check_system_tsc_reliable(void)
 {
-#if defined(CONFIG_MGEODEGX1) || defined(CONFIG_MGEODE_LX) || defined(CONFIG_X86_GENERIC)
+#if defined(CONFIG_CPU_SUP_CYRIX)
 	if (is_geode_lx()) {
 		/* RTSC counts during suspend */
 #define RTSC_SUSP 0x100
diff --git a/arch/x86/xen/Kconfig b/arch/x86/xen/Kconfig
index 222b6fdad313..2648459b8e8f 100644
--- a/arch/x86/xen/Kconfig
+++ b/arch/x86/xen/Kconfig
@@ -9,7 +9,6 @@ config XEN
 	select PARAVIRT_CLOCK
 	select X86_HV_CALLBACK_VECTOR
 	depends on X86_64 || (X86_32 && X86_PAE)
-	depends on X86_64 || (X86_GENERIC || MPENTIUM4 || MATOM)
 	depends on X86_LOCAL_APIC
 	help
 	  This is the Linux Xen port.  Enabling this will allow the
diff --git a/drivers/misc/mei/Kconfig b/drivers/misc/mei/Kconfig
index 7575fee96cc6..4deb17ed0a62 100644
--- a/drivers/misc/mei/Kconfig
+++ b/drivers/misc/mei/Kconfig
@@ -3,7 +3,7 @@
 config INTEL_MEI
 	tristate "Intel Management Engine Interface"
 	depends on X86 && PCI
-	default X86_64 || MATOM
+	default X86_64 || CPU_SUP_INTEL
 	help
 	  The Intel Management Engine (Intel ME) provides Manageability,
 	  Security and Media services for system containing Intel chipsets.
-- 
2.39.5



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From: "Edgar E. Iglesias" 
To: qemu-devel@nongnu.org,
	qemu-stable@nongnu.org
Cc: sstabellini@kernel.org,
	anthony@xenproject.org,
	paul@xen.org,
	edgar.iglesias@amd.com,
	xen-devel@lists.xenproject.org,
	"Edgar E. Iglesias" 
Subject: [PATCH v1 1/1] xen: mapcache: Split mapcache_grants by ro and rw
Date: Fri, 25 Apr 2025 16:31:56 +0200
Message-ID: <20250425143156.204452-2-edgar.iglesias@gmail.com>
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From: "Edgar E. Iglesias" 

Today, we don't track write-abiliy in the cache, if a user
requests a readable mapping followed by a writeable mapping
on the same page, the second lookup will incorrectly hit
the readable entry.

Split mapcache_grants by ro and rw access. Grants will now
have separate ways in the cache depending on writeability.

Signed-off-by: Edgar E. Iglesias 
---
 hw/xen/xen-mapcache.c | 26 +++++++++++++++++++-------
 1 file changed, 19 insertions(+), 7 deletions(-)

diff --git a/hw/xen/xen-mapcache.c b/hw/xen/xen-mapcache.c
index 2c8f861fdb..e31d379702 100644
--- a/hw/xen/xen-mapcache.c
+++ b/hw/xen/xen-mapcache.c
@@ -75,7 +75,8 @@ typedef struct MapCache {
 } MapCache;
 
 static MapCache *mapcache;
-static MapCache *mapcache_grants;
+static MapCache *mapcache_grants_ro;
+static MapCache *mapcache_grants_rw;
 static xengnttab_handle *xen_region_gnttabdev;
 
 static inline void mapcache_lock(MapCache *mc)
@@ -176,9 +177,12 @@ void xen_map_cache_init(phys_offset_to_gaddr_t f, void *opaque)
      * Grant mappings must use XC_PAGE_SIZE granularity since we can't
      * map anything beyond the number of pages granted to us.
      */
-    mapcache_grants = xen_map_cache_init_single(f, opaque,
-                                                XC_PAGE_SHIFT,
-                                                max_mcache_size);
+    mapcache_grants_ro = xen_map_cache_init_single(f, opaque,
+                                                   XC_PAGE_SHIFT,
+                                                   max_mcache_size);
+    mapcache_grants_rw = xen_map_cache_init_single(f, opaque,
+                                                   XC_PAGE_SHIFT,
+                                                   max_mcache_size);
 
     setrlimit(RLIMIT_AS, &rlimit_as);
 }
@@ -456,9 +460,13 @@ uint8_t *xen_map_cache(MemoryRegion *mr,
                        bool is_write)
 {
     bool grant = xen_mr_is_grants(mr);
-    MapCache *mc = grant ? mapcache_grants : mapcache;
+    MapCache *mc = mapcache;
     uint8_t *p;
 
+    if (grant) {
+        mc = is_write ? mapcache_grants_rw : mapcache_grants_ro;
+    }
+
     if (grant && !lock) {
         /*
          * Grants are only supported via address_space_map(). Anything
@@ -523,7 +531,10 @@ ram_addr_t xen_ram_addr_from_mapcache(void *ptr)
 
     addr = xen_ram_addr_from_mapcache_single(mapcache, ptr);
     if (addr == RAM_ADDR_INVALID) {
-        addr = xen_ram_addr_from_mapcache_single(mapcache_grants, ptr);
+        addr = xen_ram_addr_from_mapcache_single(mapcache_grants_ro, ptr);
+    }
+    if (addr == RAM_ADDR_INVALID) {
+        addr = xen_ram_addr_from_mapcache_single(mapcache_grants_rw, ptr);
     }
 
     return addr;
@@ -626,7 +637,8 @@ static void xen_invalidate_map_cache_entry_single(MapCache *mc, uint8_t *buffer)
 static void xen_invalidate_map_cache_entry_all(uint8_t *buffer)
 {
     xen_invalidate_map_cache_entry_single(mapcache, buffer);
-    xen_invalidate_map_cache_entry_single(mapcache_grants, buffer);
+    xen_invalidate_map_cache_entry_single(mapcache_grants_ro, buffer);
+    xen_invalidate_map_cache_entry_single(mapcache_grants_rw, buffer);
 }
 
 static void xen_invalidate_map_cache_entry_bh(void *opaque)
-- 
2.43.0



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From: "Edgar E. Iglesias" 
To: qemu-devel@nongnu.org,
	qemu-stable@nongnu.org
Cc: sstabellini@kernel.org,
	anthony@xenproject.org,
	paul@xen.org,
	edgar.iglesias@amd.com,
	xen-devel@lists.xenproject.org
Subject: [PATCH v1 0/1] xen: mapcache: grants: Fix mixup betwen ro and rw mappings
Date: Fri, 25 Apr 2025 16:31:55 +0200
Message-ID: <20250425143156.204452-1-edgar.iglesias@gmail.com>
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From: "Edgar E. Iglesias" 

This fixes an issue with grant mappings when a read-only
mapping is requested followed by a read-write mapping for
the same page. Today, we don't track write-ability and
read-write lookups hit on read-only entries.

This series is an attempt to fix this by splitting mapcache_grants
in two, a read-only and a read-write instance.

I tried a couple of other approaches, one was to speculatively
map grants as read-write and if mapping fails, then fall back
to read-only. This works but since Xen logs each failed grant
mapping, it gets noisy.

Another way is to track writeability per mapping in the cache
and modify the lookup logic to only hit on compatible mappings.
It works but adds more complexity to the lookup logic compared
with the split cache approach.
https://gitlab.com/edgar.iglesias/qemu/-/commits/edgar/grants-ro-rw-fix

Cheers,
Edgar

Edgar E. Iglesias (1):
  xen: mapcache: Split mapcache_grants by ro and rw

 hw/xen/xen-mapcache.c | 26 +++++++++++++++++++-------
 1 file changed, 19 insertions(+), 7 deletions(-)

-- 
2.43.0



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On 25.04.2025 15:48, Andrew Cooper wrote:
> On 25/04/2025 2:13 pm, Jan Beulich wrote:
>> On 25.04.2025 15:05, Andrew Cooper wrote:
>>> On 25/04/2025 1:48 pm, Jan Beulich wrote:
>>>> On 25.04.2025 13:24, Andrew Cooper wrote:
>>>>> The type used for pagetable attributes/permissions is currently unsigned int,
>>>>> but needs to become architecture dependent as PPC needs unsigned long.
>>>>>
>>>>> Introduce mm-types.h to house pte_attr_t.
>>>>>
>>>>> Given the new toolchain baseline, we can use __has_include() now to remove the
>>>>> need for boilerplate on most architectures.
>>>> That's true now, when it's just pte_attr_t that's there. Memory management,
>>>> however, is pretty different between architectures, so I wonder if in the
>>>> longer run any one will remain that actually can use the common header.
>>> Anything in xen/mm.h is common and needs architectures to provide (or
>>> use the defaults) the bits required.
>>>
>>> asm/mm{,-types.h} still exist (when necessary) to provide the
>>> arch-specific extensions.
>> Sure, but you kind of avoid my question: Are you reasonably certain more than
>> one arch will still be able to use the defaults, once a few more things appear
>> in this header? (IOW: Won't we be better off having each arch have its
>> asm/mm-types.h right away?)
> 
> I can't predict the future, but my gut feeling is that it's not going to
> diverge very much.
> 
> If needs be, we can go to conditional override for specific bits.  Or,
> if I'm wrong, I'm wrong.  It's not hard to change.

Well, feel free then to put in with Oleksii's R-b.

Jan


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Date: Fri, 25 Apr 2025 14:48:34 +0000
To: Alejandro Vallejo 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?utf-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Bertrand Marquis 
Subject: Re: [PATCH v5 00/12] Hyperlaunch device tree for dom0
Message-ID: 
In-Reply-To: 
References: <20250424161027.92942-1-agarciav@amd.com>  
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On Fri, Apr 25, 2025 at 12:58:01PM +0100, Alejandro Vallejo wrote:
> On Thu Apr 24, 2025 at 11:19 PM BST, dmkhn wrote:
> > On Thu, Apr 24, 2025 at 05:10:10PM +0100, Alejandro Vallejo wrote:
> >> Hi,
> >>
> >> v4: https://lore.kernel.org/xen-devel/20250417124844.11143-1-agarciav@=
amd.com/
> >> v3: https://lore.kernel.org/xen-devel/20250408160802.49870-1-agarciav@=
amd.com/
> >> v2: https://lore.kernel.org/xen-devel/20241226165740.29812-1-dpsmith@a=
pertussolutions.com/
> >> v1: https://lore.kernel.org/xen-devel/20241123182044.30687-1-dpsmith@a=
pertussolutions.com/
> >>
> >> =3D=3D=3D=3D=3D=3D=3D=3D=3D Original cover letter:
> >>
> >> The Hyperlaunch device tree for dom0 series is the second split out fo=
r the
> >> introduction of the Hyperlaunch domain builder logic. These changes fo=
cus on
> >> introducing the ability to express a domain configuration that is then=
 used to
> >> populate the struct boot_domain structure for dom0. This ability to ex=
press a
> >> domain configuration provides the next step towards a general domain b=
uilder.
> >>
> >> The splitting of Hyperlaunch into a set of series are twofold, to redu=
ce the
> >> effort in reviewing a much larger series, and to reduce the effort in =
handling
> >> the knock-on effects to the construction logic from requested review c=
hanges.
> >>
> >>
> >>
> >> Alejandro Vallejo (1):
> >>   x86/hyperlaunch: Add helpers to locate multiboot modules
> >>
> >> Daniel P. Smith (11):
> >>   kconfig: introduce domain builder config options
> >>   common/hyperlaunch: introduce the domain builder
> >>   x86/hyperlaunch: initial support for hyperlaunch device tree
> >>   x86/hyperlaunch: locate dom0 kernel with hyperlaunch
> >>   x86/hyperlaunch: obtain cmdline from device tree
> >>   x86/hyperlaunch: locate dom0 initrd with hyperlaunch
> >>   x86/hyperlaunch: add domain id parsing to domain config
> >>   x86/hyperlaunch: specify dom0 mode with device tree
> >>   x86/hyperlaunch: add memory parsing to domain config
> >>   x86/hyperlaunch: add max vcpu parsing of hyperlaunch device tree
> >>   x86/hyperlaunch: add capabilities to boot domain
> >
> > One general comment w.r.t. naming notation in:
> >
> >     xen/common/domain-builder/fdt.c
> >     xen/common/domain-builder/fdt.h
> >
> > Sorry, overlooked that earlier.
> >
> > What do you think about using fdt_ notation for all function=
s in
> > fdt.{c,h}?
> >
> > For example:
> >
> >     s/detect_fdt_kind/fdt_detect_hyperlauch_node/
>                                          ^
> =09=09=09=09=09 kind?
> >
> >     s/find_hyperlaunch_node/fdt_find_hyperlauch_node/
> >
> >     s/walk_hyperlaunch_fdt/fdt_walk_hyperlauch_node/
> >
> >     s/process_domain_node/fdt_process_hyperlauch_node/
>                                          ^
> =09=09=09=09=09 domain?
>=20
> Assuming the two nits above are mistakes on copy-paste, it sounds
> reasonable. I'll wait for some acks on the rest and resend with those
> adjustments if needed.

Sounds good!
Yep, my point is let's use prefix for consistency.

>=20
> >
> > Other than that:
> >
> > Reviewed-by: Denis Mukhin 
> >
> > for the series.
>=20
> Thanks a lot!
>=20
> Cheers,
> Alejandro



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From: Jan Beulich 
Subject: [PATCH v2] x86: constrain sub-page access length in
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Without doing so we could trigger the ASSERT_UNREACHABLE() in
subpage_mmio_write_emulate(). A comment there actually says this
validation would already have been done ...

Fixes: 8847d6e23f97 ("x86/mm: add API for marking only part of a MMIO page read only")
Signed-off-by: Jan Beulich 
---
v2: Emit a warning message otherwise.

--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -5195,8 +5195,13 @@ int cf_check mmio_ro_emulated_write(
         return X86EMUL_UNHANDLEABLE;
     }
 
-    subpage_mmio_write_emulate(mmio_ro_ctxt->mfn, PAGE_OFFSET(offset),
-                               p_data, bytes);
+    if ( bytes <= 8 )
+        subpage_mmio_write_emulate(mmio_ro_ctxt->mfn, PAGE_OFFSET(offset),
+                                   p_data, bytes);
+    else if ( subpage_mmio_find_page(mmio_ro_ctxt->mfn) )
+        gprintk(XENLOG_WARNING,
+                "unsupported %u-byte write to R/O MMIO 0x%"PRI_mfn"%03lx\n",
+                bytes, mfn_x(mmio_ro_ctxt->mfn), PAGE_OFFSET(offset));
 
     return X86EMUL_OKAY;
 }


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Date: Fri, 25 Apr 2025 16:05:19 +0100
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Subject: Re: [RFC 03/38] x86/hyperlaunch: convert max vcpu determination to
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On Tue Apr 22, 2025 at 9:36 PM BST, Jason Andryuk wrote:
> On 2025-04-19 18:07, Daniel P. Smith wrote:
>> +        limit =3D dom0_max_vcpus();
>
> dom0_max_vcpus() applies Xen's dom0_max_vcpus command line option.  That=
=20
> is desirable for a traditional dom0.  For a disaggregated, Hyperlaunch=20
> system, I'm not sure it's appropriate.  Considering there can multiple=20
> control domains, it's more questionable.
>
> Might it be better to only apply Xen "dom0" command line options to=20
> non-hyperlaunch dom0?  Or a domain with all of=20
> BUILD_CAPS_CONTROL/HARDWARE/XENSTORE?

Alternatively, why not apply it to the hardware domain instead? That's
guaranteed to be (at most) one, and will still function appropriately
when doing non-DTB based boots.

I'll make this adjustment while rebasing this rfc against my latest
hlaunch series.

>
> I guess it could stay as-is, but it seems unusual.

And would probably be particularly weird when it applies to all your
control domains and _not to your hardware domain, which incidentally is
the one domain with domid 0.

>
> Regards,
> Jason

Cheers,
Alejandro


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Date: Fri, 25 Apr 2025 16:22:21 +0100
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Subject: Re: [RFC 04/38] x86/hyperlaunch: convert vcpu0 creation to domain
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From: Alejandro Vallejo 
To: "Daniel P. Smith" ,
	
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On Sat Apr 19, 2025 at 11:07 PM BST, Daniel P. Smith wrote:
> Convert alloc_dom0_vcpu0() to dom0_set_affinity(), making it only set up =
the
> node affinity based on command line parameters passed. At the same time,
> introduce alloc_dom_vcpu0() as the replacement for alloc_dom0_vcpu(). The=
n have
> alloc_dom_vcpu0() call dom0_set_affinity() when the boot domain is the co=
ntrol
> domain, otherwise set the affinity to auto.
>
> Signed-off-by: Daniel P. Smith 
> ---
>  xen/arch/x86/dom0_build.c                 |  4 +---
>  xen/arch/x86/domain-builder/domain.c      | 11 +++++++++++
>  xen/arch/x86/include/asm/dom0_build.h     |  2 ++
>  xen/arch/x86/include/asm/domain-builder.h |  1 +
>  xen/arch/x86/setup.c                      |  5 +++--
>  5 files changed, 18 insertions(+), 5 deletions(-)
>
> diff --git a/xen/arch/x86/domain-builder/domain.c b/xen/arch/x86/domain-b=
uilder/domain.c
> index f2277b9e3cf3..619d36ea0b87 100644
> --- a/xen/arch/x86/domain-builder/domain.c
> +++ b/xen/arch/x86/domain-builder/domain.c
> @@ -9,6 +9,7 @@
>  #include 
> =20
>  #include 
> +#include 
> =20
>  unsigned int __init dom_max_vcpus(struct boot_domain *bd)
>  {
> @@ -27,6 +28,16 @@ unsigned int __init dom_max_vcpus(struct boot_domain *=
bd)
>      return bd->max_vcpus;
>  }
> =20
> +struct vcpu *__init alloc_dom_vcpu0(struct boot_domain *bd)
> +{
> +    if ( bd->capabilities & BUILD_CAPS_CONTROL )
> +        dom0_set_affinity(bd->d);

Similar as before, this probably wants to be DOMAIN_CAPS_HARDWARE?

I'll adjust while rebasing.

Cheers,
Alejandro


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Date: Fri, 25 Apr 2025 08:28:14 -0700
From: "H. Peter Anvin" 
To: =?ISO-8859-1?Q?J=FCrgen_Gro=DF?= , Xin Li ,
        linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
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        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
CC: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, acme@kernel.org,
        andrew.cooper3@citrix.com, peterz@infradead.org, namhyung@kernel.org,
        mark.rutland@arm.com, alexander.shishkin@linux.intel.com,
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        haiyangz@microsoft.com, decui@microsoft.com
Subject: =?US-ASCII?Q?Re=3A_=5BRFC_PATCH_v2_21/34=5D_x86/msr=3A_Utiliz?=
 =?US-ASCII?Q?e_the_alternatives_mechanism_to_write_MSR?=
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On April 25, 2025 12:01:29 AM PDT, "J=C3=BCrgen Gro=C3=9F"  wrote:
>On 25=2E04=2E25 05:44, H=2E Peter Anvin wrote:
>> On 4/24/25 18:15, H=2E Peter Anvin wrote:
>>> On 4/24/25 01:14, J=C3=BCrgen Gro=C3=9F wrote:
>>>>>=20
>>>>> Actually, that is how we get this patch with the existing alternativ=
es
>>>>> infrastructure=2E=C2=A0 And we took a step further to also remove th=
e pv_ops
>>>>> MSR APIs=2E=2E=2E
>>>>=20
>>>> And this is what I'm questioning=2E IMHO this approach is adding more
>>>> code by removing the pv_ops MSR_APIs just because "pv_ops is bad"=2E =
And
>>>> I believe most refusal of pv_ops is based on no longer valid reasonin=
g=2E
>>>>=20
>>>=20
>>> pvops are a headache because it is effectively a secondary alternative=
s infrastructure that is incompatible with the alternatives one=2E=2E=2E
>>>=20
>>>>> It looks to me that you want to add a new facility to the alternativ=
es
>>>>> infrastructure first?
>>>>=20
>>>> Why would we need a new facility in the alternatives infrastructure?
>>>=20
>>> I'm not sure what Xin means with "facility", but a key motivation for =
this is to:
>>>=20
>>> a=2E Avoid using the pvops for MSRs when on the only remaining user th=
ereof (Xen) is only using it for a very small subset of MSRs and for the re=
st it is just overhead, even for Xen;
>>>=20
>>> b=2E Being able to do wrmsrns immediate/wrmsrns/wrmsr and rdmsr immedi=
ate/ rdmsr alternatives=2E
>>>=20
>>> Of these, (b) is by far the biggest motivation=2E The architectural di=
rection for supervisor states is to avoid ad hoc and XSAVES ISA and instead=
 use MSRs=2E The immediate forms are expected to be significantly faster, b=
ecause they make the MSR index available at the very beginning of the pipel=
ine instead of at a relatively late stage=2E
>>>=20
>>=20
>> Note that to support the immediate forms, we *must* do these inline, or=
 the const-ness of the MSR index -- which applies to by far the vast majori=
ty of MSR references -- gets lost=2E pvops does exactly that=2E
>>=20
>> Furthermore, the MSR immediate instructions take a 64-bit number in a s=
ingle register; as these instructions are by necessity relatively long, it =
makes sense for the alternative sequence to accept a 64-bit input register =
and do the %eax/ %edx shuffle in the legacy fallback code=2E=2E=2E we did a=
 bunch of experiments to see what made most sense=2E
>
>Yes, I understand that=2E
>
>And I'm totally in favor of Xin's rework of the MSR low level functions=
=2E
>
>Inlining the MSR access instructions with pv_ops should not be very
>complicated=2E We do that with other instructions (STI/CLI, PTE accesses)
>today, so this is no new kind of functionality=2E
>
>I could have a try writing a patch achieving that, but I would only start
>that work in case you might consider taking it instead of Xin's patch
>removing the pv_ops usage for rdmsr/wrmsr=2E In case it turns out that my
>version results in more code changes than Xin's patch, I'd be fine to dro=
p
>my patch, of course=2E
>
>
>Juergen

The wrapper in question is painfully opaque, but if it is much simpler, th=
en I'm certainly willing to consider it=2E=2E=2E but I don't really see how=
 it would be possible given among other things the need for trap points for=
 the safe MSRs=2E

Keep in mind this needs to work even without PV enabled!

Note that Andrew encouraged us to pursue the pvops removal for MSRs=2E Not=
e that Xen benefits pretty heavily because it can dispatch the proper path =
of the few that are left for the common case of fixed MSRs=2E


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From: "H. Peter Anvin" 
To: Peter Zijlstra ,
        =?ISO-8859-1?Q?J=FCrgen_Gro=DF?= 
CC: Xin Li , linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
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Subject: =?US-ASCII?Q?Re=3A_=5BRFC_PATCH_v2_21/34=5D_x86/msr=3A_Utiliz?=
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References: <20250422082216.1954310-1-xin@zytor.com> <20250422082216.1954310-22-xin@zytor.com>   <37c88ea3-dd24-4607-9ee1-0f19025aaef3@suse.com> <20250425123317.GB22125@noisy.programming.kicks-ass.net>
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On April 25, 2025 5:33:17 AM PDT, Peter Zijlstra  w=
rote:
>On Wed, Apr 23, 2025 at 06:05:19PM +0200, J=C3=BCrgen Gro=C3=9F wrote:
>
>> > It's not a major change, but when it is patched to use the immediate
>> > form MSR write instruction, it's straightforwardly streamlined=2E
>>=20
>> It should be rather easy to switch the current wrmsr/rdmsr paravirt pat=
ching
>> locations to use the rdmsr/wrmsr instructions instead of doing a call t=
o
>> native_*msr()=2E
>
>Right, just make the Xen functions asm stubs that expect the instruction
>registers instead of C-abi and ALT_NOT_XEN the thing=2E
>
>Shouldn't be hard at all=2E

And that's what we will be doing=2E We already have code for that=2E


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Date: Fri, 25 Apr 2025 16:32:07 +0100
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From: Alejandro Vallejo 
To: Alejandro Vallejo , 
CC: "Daniel P. Smith" , Jan Beulich
	, Andrew Cooper ,
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	, Michal Orzel , "Julien
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Subject: Re: [PATCH v5 12/12] x86/hyperlaunch: add capabilities to boot
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On Thu Apr 24, 2025 at 5:10 PM BST, Alejandro Vallejo wrote:
> From: "Daniel P. Smith" 
>
> Introduce the ability to assign capabilities to a domain via its definiti=
on in
> device tree. The first capability enabled to select is the control domain
> capability. The capability property is a bitfield in both the device tree=
 and
> `struct boot_domain`.
>
> Signed-off-by: Daniel P. Smith 
> Signed-off-by: Jason Andryuk 
> Signed-off-by: Alejandro Vallejo 
> Reviewed-by: Denis Mukhin 
> ---
> v5:
>   * Removed BUILD_CAPS, as DOMAIN_CAPS is now in public/bootfdt.h
>   * Assigned DOMAIN_CAPS_MASK to dom0, rather than only BUILD_CAPS_CONTRO=
L.
>     * So it also gets hardware+xenstore.
> ---
>  xen/arch/x86/include/asm/boot-domain.h |  3 +++
>  xen/arch/x86/setup.c                   |  5 ++++-
>  xen/common/domain-builder/fdt.c        | 23 +++++++++++++++++++++++
>  3 files changed, 30 insertions(+), 1 deletion(-)
>
> diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/includ=
e/asm/boot-domain.h
> index 969c02a6ea..cb5351241a 100644
> --- a/xen/arch/x86/include/asm/boot-domain.h
> +++ b/xen/arch/x86/include/asm/boot-domain.h
> @@ -13,6 +13,9 @@
>  struct boot_domain {
>      domid_t domid;
> =20
> +    /* Bitmap. See DOMAIN_CAPS_MASK for a list */
> +    uint32_t capabilities;
> +
>                                            /* On     | Off    */
>  #define BUILD_MODE_PARAVIRT      (1 << 0) /* PV     | PVH/HVM */
>  #define BUILD_MODE_ENABLE_DM     (1 << 1) /* HVM    | PVH     */
> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
> index d4f839146f..960e43c785 100644
> --- a/xen/arch/x86/setup.c
> +++ b/xen/arch/x86/setup.c
> @@ -61,6 +61,7 @@
> =20
>  #include 
> =20
> +#include 
>  #include 
>  #ifdef CONFIG_COMPAT
>  #include 
> @@ -1050,7 +1051,8 @@ static struct domain *__init create_dom0(struct boo=
t_info *bi)
>          /* Create initial domain.  Not d0 for pvshim. */
>          bd->domid =3D get_initial_domain_id();

Self commenting that I missed XEN_DOMCTL_CDF_iommu being passed if
iommu_enabled is set (out of context, a few lines above). That should be
gated on DOMAIN_CAPS_HARDWARE being set too. Just spotted it when
rebasing the RFC series from Daniel.

Cheers,
Alejandro


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Date: Fri, 25 Apr 2025 08:34:19 -0700
From: "H. Peter Anvin" 
To: Arnd Bergmann , Thomas Gleixner ,
        Ingo Molnar , Borislav Petkov ,
        Dave Hansen , x86@kernel.org
CC: Arnd Bergmann , Juergen Gross ,
        Boris Ostrovsky ,
        Alexander Usyskin ,
        Greg Kroah-Hartman ,
        =?UTF-8?Q?Mateusz_Jo=C5=84czyk?= ,
        "Mike Rapoport (Microsoft)" ,
        Ard Biesheuvel ,
        Peter Zijlstra , linux-kernel@vger.kernel.org,
        xen-devel@lists.xenproject.org
Subject: Re: [PATCH] [RFC] x86/cpu: rework instruction set selection
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On April 25, 2025 7:15:15 AM PDT, Arnd Bergmann  wrote:
>From: Arnd Bergmann 
>
>With cx8 and tsc being mandatory features, the only important
>architectural features are now cmov and pae=2E
>
>Change the large list of target CPUs to no longer pick the instruction se=
t
>itself but only the mtune=3D optimization level and in-kernel optimizatio=
ns
>that remain compatible with all cores=2E
>
>The CONFIG_X86_CMOV instead becomes user-selectable and is now how
>Kconfig picks between 586-class (Pentium, Pentium MMX, K6, C3, GeodeGX)
>and 686-class (everything else) targets=2E
>
>In order to allow running on late 32-bit cores (Athlon, Pentium-M,
>Pentium 4, =2E=2E=2E), the X86_L1_CACHE_SHIFT can no longer be set to any=
thing
>lower than 6 (i=2Ee=2E 64 byte cache lines)=2E
>
>The optimization options now depend on X86_CMOV and X86_PAE instead
>of the other way round, while other compile-time conditionals that
>checked for MATOM/MGEODEGX1 instead now check for CPU_SUP_* options
>that enable support for a particular CPU family=2E
>
>Link: https://lore=2Ekernel=2Eorg/lkml/dd29df0c-0b4f-44e6-b71b-2a358ea76f=
b4@app=2Efastmail=2Ecom/
>Signed-off-by: Arnd Bergmann 
>---
>This is what I had in mind as mentioned in the earlier thread on
>cx8/tsc removal=2E I based this on top of the Ingo's [RFC 15/15]
>patch=2E
>---
> arch/x86/Kconfig                |   2 +-
> arch/x86/Kconfig=2Ecpu            | 100 ++++++++++++++------------------
> arch/x86/Makefile_32=2Ecpu        |  48 +++++++--------
> arch/x86/include/asm/vermagic=2Eh |  36 +-----------
> arch/x86/kernel/tsc=2Ec           |   2 +-
> arch/x86/xen/Kconfig            |   1 -
> drivers/misc/mei/Kconfig        |   2 +-
> 7 files changed, 74 insertions(+), 117 deletions(-)
>
>diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
>index a9d717558972=2E=2E1e33f88c9b97 100644
>--- a/arch/x86/Kconfig
>+++ b/arch/x86/Kconfig
>@@ -1438,7 +1438,7 @@ config HIGHMEM
>=20
> config X86_PAE
> 	bool "PAE (Physical Address Extension) Support"
>-	depends on X86_32 && X86_HAVE_PAE
>+	depends on X86_32 && X86_CMOV
> 	select PHYS_ADDR_T_64BIT
> 	help
> 	  PAE is required for NX support, and furthermore enables
>diff --git a/arch/x86/Kconfig=2Ecpu b/arch/x86/Kconfig=2Ecpu
>index 6f1e8cc8fe58=2E=2E0619566de93f 100644
>--- a/arch/x86/Kconfig=2Ecpu
>+++ b/arch/x86/Kconfig=2Ecpu
>@@ -1,23 +1,32 @@
> # SPDX-License-Identifier: GPL-2=2E0
> # Put here option for CPU selection and depending optimization
>-choice
>-	prompt "x86-32 Processor family"
>-	depends on X86_32
>-	default M686
>+
>+config X86_CMOV
>+	bool "Require 686-class CMOV instructions" if X86_32
>+	default y
> 	help
>-	  This is the processor type of your CPU=2E This information is
>-	  used for optimizing purposes=2E In order to compile a kernel
>-	  that can run on all supported x86 CPU types (albeit not
>-	  optimally fast), you can specify "586" here=2E
>+	  Most x86-32 processor implementations are compatible with
>+	  the the CMOV instruction originally added in the Pentium Pro,
>+	  and they perform much better when using it=2E
>+
>+	  Disable this option to build for 586-class CPUs without this
>+	  instruction=2E This is only required for the original Intel
>+	  Pentium (P5, P54, P55), AMD K6/K6-II/K6-3D, Geode GX1 and Via
>+	  CyrixIII/C3 CPUs=2E
>=20
> 	  Note that the 386 and 486 is no longer supported, this includes
> 	  AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI 486DLC/DLC2,
> 	  UMC 486SX-S and the NexGen Nx586, AMD ELAN and all 486 based
> 	  CPUs=2E
>=20
>-	  The kernel will not necessarily run on earlier architectures than
>-	  the one you have chosen, e=2Eg=2E a Pentium optimized kernel will run=
 on
>-	  a PPro, but not necessarily on a i486=2E
>+choice
>+	prompt "x86-32 Processor optimization"
>+	depends on X86_32
>+	default X86_GENERIC
>+	help
>+	  This is the processor type of your CPU=2E This information is
>+	  used for optimizing purposes, but does not change compatibility
>+	  with other CPU types=2E
>=20
> 	  Here are the settings recommended for greatest speed:
> 	  - "586" for generic Pentium CPUs lacking the TSC
>@@ -45,14 +54,13 @@ choice
>=20
> config M586TSC
> 	bool "Pentium-Classic"
>-	depends on X86_32
>+	depends on X86_32 && !X86_CMOV
> 	help
>-	  Select this for a Pentium Classic processor with the RDTSC (Read
>-	  Time Stamp Counter) instruction for benchmarking=2E
>+	  Select this for a Pentium Classic processor=2E
>=20
> config M586MMX
> 	bool "Pentium-MMX"
>-	depends on X86_32
>+	depends on X86_32 && !X86_CMOV
> 	help
> 	  Select this for a Pentium with the MMX graphics/multimedia
> 	  extended instructions=2E
>@@ -117,7 +125,7 @@ config MPENTIUM4
>=20
> config MK6
> 	bool "K6/K6-II/K6-III"
>-	depends on X86_32
>+	depends on X86_32 && !X86_CMOV
> 	help
> 	  Select this for an AMD K6-family processor=2E  Enables use of
> 	  some extended instructions, and passes appropriate optimization
>@@ -125,7 +133,7 @@ config MK6
>=20
> config MK7
> 	bool "Athlon/Duron/K7"
>-	depends on X86_32
>+	depends on X86_32 && !X86_PAE
> 	help
> 	  Select this for an AMD Athlon K7-family processor=2E  Enables use of
> 	  some extended instructions, and passes appropriate optimization
>@@ -147,42 +155,37 @@ config MEFFICEON
>=20
> config MGEODEGX1
> 	bool "GeodeGX1"
>-	depends on X86_32
>+	depends on X86_32 && !X86_CMOV
> 	help
> 	  Select this for a Geode GX1 (Cyrix MediaGX) chip=2E
>=20
> config MGEODE_LX
> 	bool "Geode GX/LX"
>-	depends on X86_32
>+	depends on X86_32 && !X86_PAE
> 	help
> 	  Select this for AMD Geode GX and LX processors=2E
>=20
> config MCYRIXIII
> 	bool "CyrixIII/VIA-C3"
>-	depends on X86_32
>+	depends on X86_32 && !X86_CMOV
> 	help
> 	  Select this for a Cyrix III or C3 chip=2E  Presently Linux and GCC
> 	  treat this chip as a generic 586=2E Whilst the CPU is 686 class,
> 	  it lacks the cmov extension which gcc assumes is present when
> 	  generating 686 code=2E
>-	  Note that Nehemiah (Model 9) and above will not boot with this
>-	  kernel due to them lacking the 3DNow! instructions used in earlier
>-	  incarnations of the CPU=2E
>=20
> config MVIAC3_2
> 	bool "VIA C3-2 (Nehemiah)"
>-	depends on X86_32
>+	depends on X86_32 && !X86_PAE
> 	help
> 	  Select this for a VIA C3 "Nehemiah"=2E Selecting this enables usage
> 	  of SSE and tells gcc to treat the CPU as a 686=2E
>-	  Note, this kernel will not boot on older (pre model 9) C3s=2E
>=20
> config MVIAC7
> 	bool "VIA C7"
>-	depends on X86_32
>+	depends on X86_32 && !X86_PAE
> 	help
>-	  Select this for a VIA C7=2E  Selecting this uses the correct cache
>-	  shift and tells gcc to treat the CPU as a 686=2E
>+	  Select this for a VIA C7=2E
>=20
> config MATOM
> 	bool "Intel Atom"
>@@ -192,20 +195,19 @@ config MATOM
> 	  accordingly optimized code=2E Use a recent GCC with specific Atom
> 	  support in order to fully benefit from selecting this option=2E
>=20
>-endchoice
>-
> config X86_GENERIC
>-	bool "Generic x86 support"
>-	depends on X86_32
>+	bool "Generic x86"
> 	help
>-	  Instead of just including optimizations for the selected
>+	  Instead of just including optimizations for a particular
> 	  x86 variant (e=2Eg=2E PII, Crusoe or Athlon), include some more
> 	  generic optimizations as well=2E This will make the kernel
>-	  perform better on x86 CPUs other than that selected=2E
>+	  perform better on a variety of CPUs=2E
>=20
> 	  This is really intended for distributors who need more
> 	  generic optimizations=2E
>=20
>+endchoice
>+
> #
> # Define implied options from the CPU selection here
> config X86_INTERNODE_CACHE_SHIFT
>@@ -216,17 +218,14 @@ config X86_INTERNODE_CACHE_SHIFT
> config X86_L1_CACHE_SHIFT
> 	int
> 	default "7" if MPENTIUM4
>-	default "6" if MK7 || MPENTIUMM || MATOM || MVIAC7 || X86_GENERIC || X8=
6_64
>-	default "4" if MGEODEGX1
>-	default "5" if MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII =
|| MPENTIUMII || M686 || M586MMX || M586TSC || MVIAC3_2 || MGEODE_LX
>+	default "6"
>=20
> config X86_F00F_BUG
>-	def_bool y
>-	depends on M586MMX || M586TSC || M586
>+	def_bool !X86_CMOV
>=20
> config X86_ALIGNMENT_16
> 	def_bool y
>-	depends on MCYRIXIII || MK6 || M586MMX || M586TSC || M586 || MVIAC3_2 |=
| MGEODEGX1
>+	depends on MCYRIXIII || MK6 || M586MMX || M586TSC || M586 || MVIAC3_2 |=
| MGEODEGX1 || (!X86_CMOV && X86_GENERIC)
>=20
> config X86_INTEL_USERCOPY
> 	def_bool y
>@@ -234,34 +233,23 @@ config X86_INTEL_USERCOPY
>=20
> config X86_USE_PPRO_CHECKSUM
> 	def_bool y
>-	depends on MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIU=
MIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX =
|| MATOM
>+	depends on MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIU=
MIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX =
|| MATOM || (X86_CMOV && X86_GENERIC)
>=20
> config X86_TSC
> 	def_bool y
>=20
>-config X86_HAVE_PAE
>-	def_bool y
>-	depends on MCRUSOE || MEFFICEON || MCYRIXIII || MPENTIUM4 || MPENTIUMM =
|| MPENTIUMIII || MPENTIUMII || M686 || MVIAC7 || MATOM || X86_64
>-
> config X86_CX8
> 	def_bool y
>=20
>-# this should be set for all -march=3D=2E=2E options where the compiler
>-# generates cmov=2E
>-config X86_CMOV
>-	def_bool y
>-	depends on (MK7 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII =
|| M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || MATOM || MGEODE_LX=
 || X86_64)
>-
> config X86_MINIMUM_CPU_FAMILY
> 	int
> 	default "64" if X86_64
>-	default "6" if X86_32 && (MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPEN=
TIUMII || M686 || MVIAC3_2 || MVIAC7 || MEFFICEON || MATOM || MK7)
>-	default "5" if X86_32
>-	default "4"
>+	default "6" if X86_32 && X86_CMOV
>+	default "5"
>=20
> config X86_DEBUGCTLMSR
> 	def_bool y
>-	depends on !(MK6 || MCYRIXIII || M586MMX || M586TSC || M586) && !UML
>+	depends on X86_CMOV && !UML
>=20
> config IA32_FEAT_CTL
> 	def_bool y
>@@ -297,7 +285,7 @@ config CPU_SUP_INTEL
> config CPU_SUP_CYRIX_32
> 	default y
> 	bool "Support Cyrix processors" if PROCESSOR_SELECT
>-	depends on M586 || M586TSC || M586MMX || (EXPERT && !64BIT)
>+	depends on !64BIT
> 	help
> 	  This enables detection, tunings and quirks for Cyrix processors
>=20
>diff --git a/arch/x86/Makefile_32=2Ecpu b/arch/x86/Makefile_32=2Ecpu
>index f5e933077bf4=2E=2Eebd7ec6eaf34 100644
>--- a/arch/x86/Makefile_32=2Ecpu
>+++ b/arch/x86/Makefile_32=2Ecpu
>@@ -10,30 +10,32 @@ else
> align		:=3D -falign-functions=3D0 -falign-jumps=3D0 -falign-loops=3D0
> endif
>=20
>-cflags-$(CONFIG_M586TSC)	+=3D -march=3Di586
>-cflags-$(CONFIG_M586MMX)	+=3D -march=3Dpentium-mmx
>-cflags-$(CONFIG_M686)		+=3D -march=3Di686
>-cflags-$(CONFIG_MPENTIUMII)	+=3D -march=3Di686 $(call tune,pentium2)
>-cflags-$(CONFIG_MPENTIUMIII)	+=3D -march=3Di686 $(call tune,pentium3)
>-cflags-$(CONFIG_MPENTIUMM)	+=3D -march=3Di686 $(call tune,pentium3)
>-cflags-$(CONFIG_MPENTIUM4)	+=3D -march=3Di686 $(call tune,pentium4)
>-cflags-$(CONFIG_MK6)		+=3D -march=3Dk6
>-# Please note, that patches that add -march=3Dathlon-xp and friends are =
pointless=2E
>-# They make zero difference whatsosever to performance at this time=2E
>-cflags-$(CONFIG_MK7)		+=3D -march=3Dathlon
>-cflags-$(CONFIG_MCRUSOE)	+=3D -march=3Di686 $(align)
>-cflags-$(CONFIG_MEFFICEON)	+=3D -march=3Di686 $(call tune,pentium3) $(al=
ign)
>-cflags-$(CONFIG_MCYRIXIII)	+=3D $(call cc-option,-march=3Dc3,-march=3Di4=
86) $(align)
>-cflags-$(CONFIG_MVIAC3_2)	+=3D $(call cc-option,-march=3Dc3-2,-march=3Di=
686)
>-cflags-$(CONFIG_MVIAC7)		+=3D -march=3Di686
>-cflags-$(CONFIG_MATOM)		+=3D -march=3Datom
>+ifdef CONFIG_X86_CMOV
>+cflags-y			+=3D -march=3Di686
>+else
>+cflags-y			+=3D -march=3Di586
>+endif
>=20
>-# Geode GX1 support
>-cflags-$(CONFIG_MGEODEGX1)	+=3D -march=3Dpentium-mmx
>-cflags-$(CONFIG_MGEODE_LX)	+=3D $(call cc-option,-march=3Dgeode,-march=
=3Dpentium-mmx)
>-# add at the end to overwrite eventual tuning options from earlier
>-# cpu entries
>-cflags-$(CONFIG_X86_GENERIC) 	+=3D $(call tune,generic,$(call tune,i686)=
)
>+cflags-$(CONFIG_M586TSC)	+=3D -mtune=3Di586
>+cflags-$(CONFIG_M586MMX)	+=3D -mtune=3Dpentium-mmx
>+cflags-$(CONFIG_M686)		+=3D -mtune=3Di686
>+cflags-$(CONFIG_MPENTIUMII)	+=3D -mtune=3Dpentium2
>+cflags-$(CONFIG_MPENTIUMIII)	+=3D -mtune=3Dpentium3
>+cflags-$(CONFIG_MPENTIUMM)	+=3D -mtune=3Dpentium3
>+cflags-$(CONFIG_MPENTIUM4)	+=3D -mtune=3Dpentium4
>+cflags-$(CONFIG_MK6)		+=3D -mtune=3Dk6
>+# Please note, that patches that add -mtune=3Dathlon-xp and friends are =
pointless=2E
>+# They make zero difference whatsosever to performance at this time=2E
>+cflags-$(CONFIG_MK7)		+=3D -mtune=3Dathlon
>+cflags-$(CONFIG_MCRUSOE)	+=3D -mtune=3Di686 $(align)
>+cflags-$(CONFIG_MEFFICEON)	+=3D -mtune=3Dpentium3 $(align)
>+cflags-$(CONFIG_MCYRIXIII)	+=3D -mtune=3Dc3 $(align)
>+cflags-$(CONFIG_MVIAC3_2)	+=3D -mtune=3Dc3-2
>+cflags-$(CONFIG_MVIAC7)		+=3D -mtune=3Di686
>+cflags-$(CONFIG_MATOM)		+=3D -mtune=3Datom
>+cflags-$(CONFIG_MGEODEGX1)	+=3D -mtune=3Dpentium-mmx
>+cflags-$(CONFIG_MGEODE_LX)	+=3D -mtune=3Dgeode
>+cflags-$(CONFIG_X86_GENERIC) 	+=3D -mtune=3Dgeneric
>=20
> # Bug fix for binutils: this option is required in order to keep
> # binutils from generating NOPL instructions against our will=2E
>diff --git a/arch/x86/include/asm/vermagic=2Eh b/arch/x86/include/asm/ver=
magic=2Eh
>index e26061df0c9b=2E=2E6554dbdfd719 100644
>--- a/arch/x86/include/asm/vermagic=2Eh
>+++ b/arch/x86/include/asm/vermagic=2Eh
>@@ -5,42 +5,10 @@
>=20
> #ifdef CONFIG_X86_64
> /* X86_64 does not define MODULE_PROC_FAMILY */
>-#elif defined CONFIG_M586TSC
>-#define MODULE_PROC_FAMILY "586TSC "
>-#elif defined CONFIG_M586MMX
>-#define MODULE_PROC_FAMILY "586MMX "
>-#elif defined CONFIG_MATOM
>-#define MODULE_PROC_FAMILY "ATOM "
>-#elif defined CONFIG_M686
>+#elif defined CONFIG_X86_CMOV
> #define MODULE_PROC_FAMILY "686 "
>-#elif defined CONFIG_MPENTIUMII
>-#define MODULE_PROC_FAMILY "PENTIUMII "
>-#elif defined CONFIG_MPENTIUMIII
>-#define MODULE_PROC_FAMILY "PENTIUMIII "
>-#elif defined CONFIG_MPENTIUMM
>-#define MODULE_PROC_FAMILY "PENTIUMM "
>-#elif defined CONFIG_MPENTIUM4
>-#define MODULE_PROC_FAMILY "PENTIUM4 "
>-#elif defined CONFIG_MK6
>-#define MODULE_PROC_FAMILY "K6 "
>-#elif defined CONFIG_MK7
>-#define MODULE_PROC_FAMILY "K7 "
>-#elif defined CONFIG_MCRUSOE
>-#define MODULE_PROC_FAMILY "CRUSOE "
>-#elif defined CONFIG_MEFFICEON
>-#define MODULE_PROC_FAMILY "EFFICEON "
>-#elif defined CONFIG_MCYRIXIII
>-#define MODULE_PROC_FAMILY "CYRIXIII "
>-#elif defined CONFIG_MVIAC3_2
>-#define MODULE_PROC_FAMILY "VIAC3-2 "
>-#elif defined CONFIG_MVIAC7
>-#define MODULE_PROC_FAMILY "VIAC7 "
>-#elif defined CONFIG_MGEODEGX1
>-#define MODULE_PROC_FAMILY "GEODEGX1 "
>-#elif defined CONFIG_MGEODE_LX
>-#define MODULE_PROC_FAMILY "GEODE "
> #else
>-#error unknown processor family
>+#define MODULE_PROC_FAMILY "586 "
> #endif
>=20
> #ifdef CONFIG_X86_32
>diff --git a/arch/x86/kernel/tsc=2Ec b/arch/x86/kernel/tsc=2Ec
>index 489c779ef3ef=2E=2E76b15ef8c85f 100644
>--- a/arch/x86/kernel/tsc=2Ec
>+++ b/arch/x86/kernel/tsc=2Ec
>@@ -1221,7 +1221,7 @@ bool tsc_clocksource_watchdog_disabled(void)
>=20
> static void __init check_system_tsc_reliable(void)
> {
>-#if defined(CONFIG_MGEODEGX1) || defined(CONFIG_MGEODE_LX) || defined(CO=
NFIG_X86_GENERIC)
>+#if defined(CONFIG_CPU_SUP_CYRIX)
> 	if (is_geode_lx()) {
> 		/* RTSC counts during suspend */
> #define RTSC_SUSP 0x100
>diff --git a/arch/x86/xen/Kconfig b/arch/x86/xen/Kconfig
>index 222b6fdad313=2E=2E2648459b8e8f 100644
>--- a/arch/x86/xen/Kconfig
>+++ b/arch/x86/xen/Kconfig
>@@ -9,7 +9,6 @@ config XEN
> 	select PARAVIRT_CLOCK
> 	select X86_HV_CALLBACK_VECTOR
> 	depends on X86_64 || (X86_32 && X86_PAE)
>-	depends on X86_64 || (X86_GENERIC || MPENTIUM4 || MATOM)
> 	depends on X86_LOCAL_APIC
> 	help
> 	  This is the Linux Xen port=2E  Enabling this will allow the
>diff --git a/drivers/misc/mei/Kconfig b/drivers/misc/mei/Kconfig
>index 7575fee96cc6=2E=2E4deb17ed0a62 100644
>--- a/drivers/misc/mei/Kconfig
>+++ b/drivers/misc/mei/Kconfig
>@@ -3,7 +3,7 @@
> config INTEL_MEI
> 	tristate "Intel Management Engine Interface"
> 	depends on X86 && PCI
>-	default X86_64 || MATOM
>+	default X86_64 || CPU_SUP_INTEL
> 	help
> 	  The Intel Management Engine (Intel ME) provides Manageability,
> 	  Security and Media services for system containing Intel chipsets=2E

I really don't like testing an unrelated feature (CMOV for PAE); furthermo=
re, at least some old hypervisors were known to have broken PAE=2E

At the very least it needs to be abstracted for clarity reasons=2E=20

Nacked-by: H=2E Peter Anvin 


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From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= 
Date: Fri, 25 Apr 2025 18:45:18 +0300 (EEST)
To: "Xin Li (Intel)" 
cc: LKML , kvm@vger.kernel.org, 
    linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org, 
    virtualization@lists.linux.dev, linux-pm@vger.kernel.org, 
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    linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org, 
    Netdev , platform-driver-x86@vger.kernel.org, 
    tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, 
    dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, 
    acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com, 
    peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com, 
    alexander.shishkin@linux.intel.com, jolsa@kernel.org, irogers@google.com, 
    adrian.hunter@intel.com, kan.liang@linux.intel.com, wei.liu@kernel.org, 
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    tony.luck@intel.com, pbonzini@redhat.com, vkuznets@redhat.com, 
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    kys@microsoft.com, haiyangz@microsoft.com, decui@microsoft.com, 
    dapeng1.mi@linux.intel.com
Subject: Re: [PATCH v3 01/14] x86/msr: Move rdtsc{,_ordered}() to
 
In-Reply-To: <20250425083442.2390017-2-xin@zytor.com>
Message-ID: <42dc90e1-df2a-2324-d28c-d75fb525e4a2@linux.intel.com>
References: <20250425083442.2390017-1-xin@zytor.com> <20250425083442.2390017-2-xin@zytor.com>
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On Fri, 25 Apr 2025, Xin Li (Intel) wrote:

> For some reason, there are some TSC-related functions in the MSR
> header even though there is a tsc.h header.
> 
> Relocate rdtsc{,_ordered}() from  to , and
> subsequently remove the inclusion of  in .
> Consequently,  must be included in several source files
> that previously did not require it.
>
> Signed-off-by: Xin Li (Intel) 
> Acked-by: Dave Hansen 
> ---
> 
> Change in v3:
> * Add a problem statement to the changelog (Dave Hansen).
> ---

>  drivers/platform/x86/intel/pmc/cnp.c          |  1 +
>  .../intel/speed_select_if/isst_if_common.c    |  1 +
>  drivers/platform/x86/intel/turbo_max_3.c      |  1 +

Hi,

To me this looks really a random set of source files, maybe it helped some 
build success but it's hard for me to review this because there are still 
cases that depend on indirect include chains.

Could you just look into solving all missing msr.h includes instead 
as clearly some are still missing after 3 pre-existing ones and you adding 
it into 3 files:

$ git grep -e rdmsr -e wrmsr -l drivers/platform/x86/
drivers/platform/x86/intel/ifs/core.c
drivers/platform/x86/intel/ifs/load.c
drivers/platform/x86/intel/ifs/runtest.c
drivers/platform/x86/intel/pmc/cnp.c
drivers/platform/x86/intel/pmc/core.c
drivers/platform/x86/intel/speed_select_if/isst_if_common.c
drivers/platform/x86/intel/speed_select_if/isst_if_mbox_msr.c
drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c
drivers/platform/x86/intel/tpmi_power_domains.c
drivers/platform/x86/intel/turbo_max_3.c
drivers/platform/x86/intel/uncore-frequency/uncore-frequency.c
drivers/platform/x86/intel_ips.c

$ git grep -e 'msr.h' -l drivers/platform/x86/
drivers/platform/x86/intel/pmc/core.c
drivers/platform/x86/intel/tpmi_power_domains.c
drivers/platform/x86/intel_ips.c

I'd also prefer the patch(es) adding missing includes be in a different 
patch.

-- 
 i.



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MIME-Version: 1.0
Date: Fri, 25 Apr 2025 17:53:03 +0200
From: Nicola Vetrini 
To: Jan Beulich 
Cc: Stefano Stabellini , victorm.lira@amd.com,
 Federico Serafini , Andrew Cooper
 , Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Bertrand Marquis
 , xen-devel@lists.xenproject.org
Subject: Re: [PATCH v1] misra: add deviation for rules 21.1 and 21.2
In-Reply-To: <8d65ee65-ec6f-49a3-8954-d303b08dc2df@suse.com>
References: <9e1210f2a9c794d68dcc6b897239b228b141296a.1745427770.git.victorm.lira@amd.com>
 
 
 <8d65ee65-ec6f-49a3-8954-d303b08dc2df@suse.com>
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On 2025-04-25 10:07, Jan Beulich wrote:
> On 24.04.2025 23:45, Stefano Stabellini wrote:
>> On Thu, 24 Apr 2025, Jan Beulich wrote:
>>> On 23.04.2025 19:54, victorm.lira@amd.com wrote:
>>>> From: Nicola Vetrini 
>>>> 
>>>> MISRA C Rules 21.1 ("#define and #undef shall not be used on a
>>>> reserved identifier or reserved macro name") and R21.2 ("A reserved
>>>> identifier or reserved macro name shall not be declared") violations
>>>> are not problematic for Xen, as it does not use the C or POSIX
>>>> libraries.
>>>> 
>>>> Xen uses -fno-builtin and -nostdinc to ensure this, but there are 
>>>> still
>>>> __builtin_* functions from the compiler that are available so
>>>> a deviation is formulated for all identifiers not starting with
>>>> "__builtin_".
>>>> 
>>>> The missing text of a deviation for Rule 21.2 is added to
>>>> docs/misra/deviations.rst.
>>>> 
>>>> To avoid regressions, tag both rules as clean and add them to the
>>>> monitored set.
>>>> 
>>>> Signed-off-by: Nicola Vetrini 
>>>> Signed-off-by: Federico Serafini 
>>>> Signed-off-by: Victor Lira 
>>> 
>>> While the rule is in the library section, ...
>>> 
>>>> --- a/docs/misra/deviations.rst
>>>> +++ b/docs/misra/deviations.rst
>>>> @@ -587,7 +587,31 @@ Deviations related to MISRA C:2012 Rules:
>>>>         construct is deviated only in Translation Units that present 
>>>> a violation
>>>>         of the Rule due to uses of this macro.
>>>>       - Tagged as `deliberate` for ECLAIR.
>>>> -
>>>> +
>>>> +   * - R21.1
>>>> +     - Rule 21.1 reports identifiers reserved for the C and POSIX 
>>>> standard
>>>> +       libraries. Xen does not use such libraries and all 
>>>> translation units
>>>> +       are compiled with option '-nostdinc', therefore there is no 
>>>> reason to
>>>> +       avoid to use `#define` or `#undef` on such identifiers 
>>>> except for those
>>>> +       beginning with `__builtin_` for which compilers may perform 
>>>> (wrong)
>>>> +       optimizations.
>>>> +     - Tagged as `safe` for ECLAIR.
>>> 
>>> ... I'd like to ask that it be explicitly clarified here that it's 
>>> solely
>>> the library (and not e.g. the compiler itself) that are of concern 
>>> here.
>> 
>> The language can be clarified:
>> 
>> - Rule 21.1 reports identifiers reserved for the C and POSIX standard
>>   libraries. Xen does not use such libraries and all translation units
>>   are compiled with option '-nostdinc', therefore there is no reason 
>> to
>>   avoid to use `#define` or `#undef` on C and POSIX standard libraries
>>   identifiers except for those beginning with `__builtin_` for which
>>   compilers may perform (wrong) optimizations.
> 
> Which makes it more apparent that there is a gap: What about e.g. 
> __x86_64__?
> That falls within what the rules cover, is not a C or POSIX standard 
> library
> identifier, yet very clearly must not be fiddled with. Whereas the text
> above deviates it.
> 

Hi Jan,

that is true, even if unlikely: one approach could be to avoid deviating 
predefined macros for all CUs as -nostdinc and -fno-builtins should take 
care of the rest; this kind of deviation is not currently possible in 
ECLAIR, but it might be in the future. I think this could be 
accomplished also via some gcc trickery on each CU, though I'm not sure 
how valued that is for Xen.

-- 
Nicola Vetrini, B.Sc.
Software Engineer
BUGSENG (https://bugseng.com)
LinkedIn: https://www.linkedin.com/in/nicola-vetrini-a42471253


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Date: Fri, 25 Apr 2025 18:13:31 +0200
From: "Arnd Bergmann" 
To: "H. Peter Anvin" , "Arnd Bergmann" ,
 "Thomas Gleixner" , "Ingo Molnar" ,
 "Borislav Petkov" ,
 "Dave Hansen" , x86@kernel.org
Cc: "Juergen Gross" ,
 "Boris Ostrovsky" ,
 "Alexander Usyskin" ,
 "Greg Kroah-Hartman" ,
 =?UTF-8?Q?Mateusz_Jo=C5=84czyk?= ,
 "Mike Rapoport" , "Ard Biesheuvel" ,
 "Peter Zijlstra" , linux-kernel@vger.kernel.org,
 xen-devel@lists.xenproject.org
Message-Id: <09e26f91-9a62-45c8-b94e-eddb307251f4@app.fastmail.com>
In-Reply-To: <7CEE8E85-D7B1-4066-AD4D-747CA4340F65@zytor.com>
References: <20250425141740.734030-1-arnd@kernel.org>
 <7CEE8E85-D7B1-4066-AD4D-747CA4340F65@zytor.com>
Subject: Re: [PATCH] [RFC] x86/cpu: rework instruction set selection
Content-Type: text/plain
Content-Transfer-Encoding: 7bit

On Fri, Apr 25, 2025, at 17:34, H. Peter Anvin wrote:
> On April 25, 2025 7:15:15 AM PDT, Arnd Bergmann  wrote:
>
> I really don't like testing an unrelated feature (CMOV for PAE); 

How about a new symbol with the opposite polarity, e.g. CONFIG_CPU_586?
In that case, X86_HAVE_PAE and X86_CMOV could both depend on that
not being set.

I only picked the X86_CMOV symbol because it already exists in .config
files, but that is not the important bit here.

> furthermore, at least some old hypervisors were known to have
> broken PAE.

I'm not following. What does that have to do with my patch?

     Arnd


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Date: Fri, 25 Apr 2025 09:47:57 -0700
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Subject: Re: [RFC] xen/x86: allow overlaps with non-RAM regions
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--------------C0Y5u2RfkqdS1mr8M54JJ5RE
Content-Type: text/plain; charset=UTF-8; format=flowed
Content-Transfer-Encoding: 7bit

I can confirm with the patch the NVME drive can be accessed despite the 
"not mapping BAR" warning from Xen.
Output log attached.


Victor
--------------C0Y5u2RfkqdS1mr8M54JJ5RE
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From: Ariadne Conill 
To: xen-devel@lists.xenproject.org
Cc: Ariadne Conill ,
	Paul Durrant ,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Alejandro Vallejo ,
	"Alexander M . Merritt" 
Subject: [PATCH] x86/hyperv: use dynamically allocated page for hypercalls
Date: Fri, 25 Apr 2025 09:51:48 -0700
Message-Id: <20250425165148.60408-1-ariadne@ariadne.space>
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Previously Xen placed the hypercall page at the highest possible MFN,
but this caused problems on systems where there is more than 36 bits
of physical address space.

In general, it also seems unreliable to assume that the highest possible
MFN is not already reserved for some other purpose.

Fixes: 620fc734f854 ("x86/hyperv: setup hypercall page")
Cc: Alejandro Vallejo 
Cc: Alexander M. Merritt 
Signed-off-by: Ariadne Conill 
---
 xen/arch/x86/guest/hyperv/hyperv.c            | 39 ++++++++++---------
 xen/arch/x86/include/asm/fixmap.h             |  3 --
 xen/arch/x86/include/asm/guest/hyperv-hcall.h | 12 +++---
 xen/arch/x86/include/asm/guest/hyperv-tlfs.h  |  2 +
 xen/arch/x86/include/asm/guest/hyperv.h       |  3 --
 xen/arch/x86/xen.lds.S                        |  4 --
 6 files changed, 28 insertions(+), 35 deletions(-)

diff --git a/xen/arch/x86/guest/hyperv/hyperv.c b/xen/arch/x86/guest/hyperv/hyperv.c
index 6989af38f1..637b4bf335 100644
--- a/xen/arch/x86/guest/hyperv/hyperv.c
+++ b/xen/arch/x86/guest/hyperv/hyperv.c
@@ -16,6 +16,7 @@
 
 #include "private.h"
 
+void __read_mostly *hv_hcall_page;
 struct ms_hyperv_info __read_mostly ms_hyperv;
 DEFINE_PER_CPU_READ_MOSTLY(void *, hv_input_page);
 DEFINE_PER_CPU_READ_MOSTLY(void *, hv_vp_assist);
@@ -80,13 +81,11 @@ const struct hypervisor_ops *__init hyperv_probe(void)
     return &ops;
 }
 
-static void __init setup_hypercall_page(void)
+static int __init setup_hypercall_page(void)
 {
     union hv_x64_msr_hypercall_contents hypercall_msr;
     union hv_guest_os_id guest_id;
-    unsigned long mfn;
-
-    BUILD_BUG_ON(HV_HYP_PAGE_SHIFT != PAGE_SHIFT);
+    unsigned long mfn, start;
 
     rdmsrl(HV_X64_MSR_GUEST_OS_ID, guest_id.raw);
     if ( !guest_id.raw )
@@ -98,10 +97,22 @@ static void __init setup_hypercall_page(void)
     rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
     if ( !hypercall_msr.enable )
     {
-        mfn = HV_HCALL_MFN;
+        hv_hcall_page = alloc_xenheap_page();
+        if ( !hv_hcall_page )
+        {
+            printk("Hyper-V: Failed to allocate hypercall trampoline page\n");
+            return -ENOMEM;
+        }
+
+        printk("Hyper-V: Allocated hypercall page @ %p.\n", hv_hcall_page);
+
+        mfn = virt_to_mfn(hv_hcall_page);
         hypercall_msr.enable = 1;
         hypercall_msr.guest_physical_address = mfn;
         wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
+
+        start = (unsigned long) hv_hcall_page;
+        modify_xen_mappings(start, start + PAGE_SIZE, PAGE_HYPERVISOR_RX);
     }
     else
         mfn = hypercall_msr.guest_physical_address;
@@ -109,9 +120,9 @@ static void __init setup_hypercall_page(void)
     rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
     BUG_ON(!hypercall_msr.enable);
 
-    set_fixmap_x(FIX_X_HYPERV_HCALL, mfn << PAGE_SHIFT);
-
     hcall_page_ready = true;
+
+    return 0;
 }
 
 static int setup_hypercall_pcpu_arg(void)
@@ -165,9 +176,8 @@ static int setup_vp_assist(void)
 
 static void __init cf_check setup(void)
 {
-    ASM_CONSTANT(HV_HCALL_PAGE, __fix_x_to_virt(FIX_X_HYPERV_HCALL));
-
-    setup_hypercall_page();
+    if ( setup_hypercall_page() )
+        panic("Hyper-V hypercall page setup failed\n");
 
     if ( setup_hypercall_pcpu_arg() )
         panic("Hyper-V hypercall percpu arg setup failed\n");
@@ -187,14 +197,6 @@ static int cf_check ap_setup(void)
     return setup_vp_assist();
 }
 
-static void __init cf_check e820_fixup(void)
-{
-    uint64_t s = HV_HCALL_MFN << PAGE_SHIFT;
-
-    if ( !e820_add_range(s, s + PAGE_SIZE, E820_RESERVED) )
-        panic("Unable to reserve Hyper-V hypercall range\n");
-}
-
 static int cf_check flush_tlb(
     const cpumask_t *mask, const void *va, unsigned int flags)
 {
@@ -211,7 +213,6 @@ static const struct hypervisor_ops __initconst_cf_clobber ops = {
     .name = "Hyper-V",
     .setup = setup,
     .ap_setup = ap_setup,
-    .e820_fixup = e820_fixup,
     .flush_tlb = flush_tlb,
 };
 
diff --git a/xen/arch/x86/include/asm/fixmap.h b/xen/arch/x86/include/asm/fixmap.h
index 516ec3fa6c..7384a2d07c 100644
--- a/xen/arch/x86/include/asm/fixmap.h
+++ b/xen/arch/x86/include/asm/fixmap.h
@@ -98,9 +98,6 @@ static inline unsigned long virt_to_fix(const unsigned long vaddr)
 enum fixed_addresses_x {
     /* Index 0 is reserved since fix_x_to_virt(0) == FIXADDR_X_TOP. */
     FIX_X_RESERVED,
-#ifdef CONFIG_HYPERV_GUEST
-    FIX_X_HYPERV_HCALL,
-#endif
     __end_of_fixed_addresses_x
 };
 
diff --git a/xen/arch/x86/include/asm/guest/hyperv-hcall.h b/xen/arch/x86/include/asm/guest/hyperv-hcall.h
index b76dbf9ccc..b73edca7c6 100644
--- a/xen/arch/x86/include/asm/guest/hyperv-hcall.h
+++ b/xen/arch/x86/include/asm/guest/hyperv-hcall.h
@@ -20,13 +20,13 @@ static inline uint64_t hv_do_hypercall(uint64_t control, paddr_t input_addr,
                                        paddr_t output_addr)
 {
     uint64_t status;
-    register unsigned long r8 asm ( "r8" ) = output_addr;
 
     /* See TLFS for volatile registers */
-    asm volatile ( "call hv_hcall_page"
+    asm volatile ( "mov %[output_addr], %%r8\n"
+                   "call *%[target_addr]"
                    : "=a" (status), "+c" (control),
                      "+d" (input_addr) ASM_CALL_CONSTRAINT
-                   : "r" (r8)
+                   : [output_addr] "r" (output_addr), [target_addr] "r" (hv_hcall_page)
                    : "memory" );
 
     return status;
@@ -37,13 +37,13 @@ static inline uint64_t hv_do_fast_hypercall(uint16_t code,
 {
     uint64_t status;
     uint64_t control = code | HV_HYPERCALL_FAST_BIT;
-    register unsigned long r8 asm ( "r8" ) = input2;
 
     /* See TLFS for volatile registers */
-    asm volatile ( "call hv_hcall_page"
+    asm volatile ( "mov %[input2], %%r8\n"
+                   "call *[target_addr]"
                    : "=a" (status), "+c" (control),
                      "+d" (input1) ASM_CALL_CONSTRAINT
-                   : "r" (r8) );
+                   : [input2] "r" (input2), [target_addr] "r" (hv_hcall_page) );
 
     return status;
 }
diff --git a/xen/arch/x86/include/asm/guest/hyperv-tlfs.h b/xen/arch/x86/include/asm/guest/hyperv-tlfs.h
index 79cfc90dd8..01fc76f20c 100644
--- a/xen/arch/x86/include/asm/guest/hyperv-tlfs.h
+++ b/xen/arch/x86/include/asm/guest/hyperv-tlfs.h
@@ -13,6 +13,8 @@
 #include 
 #include 
 
+extern void *hv_hcall_page;
+
 /*
  * While not explicitly listed in the TLFS, Hyper-V always runs with a page size
  * of 4096. These definitions are used when communicating with Hyper-V using
diff --git a/xen/arch/x86/include/asm/guest/hyperv.h b/xen/arch/x86/include/asm/guest/hyperv.h
index c05efdce71..5792e77104 100644
--- a/xen/arch/x86/include/asm/guest/hyperv.h
+++ b/xen/arch/x86/include/asm/guest/hyperv.h
@@ -10,9 +10,6 @@
 
 #include 
 
-/* Use top-most MFN for hypercall page */
-#define HV_HCALL_MFN   (((1ull << paddr_bits) - 1) >> HV_HYP_PAGE_SHIFT)
-
 /*
  * The specification says: "The partition reference time is computed
  * by the following formula:
diff --git a/xen/arch/x86/xen.lds.S b/xen/arch/x86/xen.lds.S
index 53bafc98a5..3d0c8e6ffc 100644
--- a/xen/arch/x86/xen.lds.S
+++ b/xen/arch/x86/xen.lds.S
@@ -359,10 +359,6 @@ SECTIONS
 
   DWARF2_DEBUG_SECTIONS
 
-#ifdef CONFIG_HYPERV_GUEST
-  hv_hcall_page = ABSOLUTE(HV_HCALL_PAGE - XEN_VIRT_START + __XEN_VIRT_START);
-#endif
-
   DISCARD_SECTIONS
 
 #ifndef EFI
-- 
2.39.5 (Apple Git-154)



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Date: Fri, 25 Apr 2025 19:07:27 +0200
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User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v1 06/14] xen/riscv: riscv_of_processor_hartid()
 implementation
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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References: 
 
 <65f5952a-8d2a-499c-bd66-53e9e2fbfa9c@suse.com>
 
 <859d0c87-dc90-44c2-ab30-5164eec0705c@suse.com>
Content-Language: en-US
From: Oleksii Kurochko 
In-Reply-To: <859d0c87-dc90-44c2-ab30-5164eec0705c@suse.com>

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On 4/15/25 3:45 PM, Jan Beulich wrote:
> On 15.04.2025 15:39, Oleksii Kurochko wrote:
>> On 4/10/25 5:53 PM, Jan Beulich wrote:
>>> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>>>> +{
>>>> +    const __be32 *cell;
>>>> +    int ac;
>>>> +    uint32_t len;
>>>> +
>>>> +    ac = dt_n_addr_cells(cpun);
>>>> +    cell = dt_get_property(cpun, "reg", &len);
>>>> +    if ( !cell || !ac || ((sizeof(*cell) * ac * (thread + 1)) > len) )
>>>> +        return ~0ULL;
>>> I'm sorry for my lack of DT knowledge, but what's "thread" representing here?
>>> You only pass in 0 below, so it's unclear whether it's what one might expect
>>> (the thread number on a multi-threaded core).
>> Based on the DT specification alone, the|`reg`| value could refer to either a CPU or a thread ID:
>> ```
>> The value of reg is a  that defines a unique CPU/thread id for
>> the CPU/threads represented by the CPU node. If a CPU supports more than one thread
>> (i.e. multiple streams of execution) the reg prop-erty is an array with 1 element
>> per thread.
>> ```
>>
>> My understanding is that the term/thread/ was used in the Linux kernel to cover both
>> cases.
>> When SMT isn't supported, the CPU can be considered to have a single thread.
>> For example, RISC-V uses the term/hardware thread/ to describe a hart (i.e., a CPU).
>>
>> Interestingly, the Linux kernel always uses|thread = 0|.
>>
>> We could potentially drop this ambiguity and introduce an|ASSERT()| to check that
>> the|`reg`| property contains only one entry, representing the HART (CPU) ID:
>> ```
>>     Software can determine the number of threads by dividing the size of reg by the parent
>>     node’s #address-cells. If `|reg`| has more than one entry, it would simply SMT support
>>     is required.
>> ```
>>
>> Does that approach make sense, or should we stick with the current implementation?
> If extra enabling is required to make multi-thread CPUs work, then panic()ing
> (not so much ASSERT()ing) may make sense, for the time being. Better would be
> if we could use all threads in a system right away.

Actually, this function is ready to be used for multi-thread CPUs. A caller can request hardware id
by passing `thread` argument (`thread` -> the local thread number to get the hardware ID for).
So by calling:
  dt_get_cpu_hwid(cpu0, 0) -> it will return hardware id of thread 0 of cpu0
  dt_get_cpu_hwid(cpu0, 1) -> it will return hardware id of thread 1 of cpu0
  ...

In our case we assume that SMP isn't supported so that is why it is used only dt_get_cpu_hwid(cpu0, 0).

If one day, SMP will be enabled then it will be needed to change a callers of dt_get_cpu_hwid().

I will add a check in the caller.

~ Oleksii

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On 4/15/25 3:45 PM, Jan Beulich wrote:

    

    

      
On 15.04.2025 15:39, Oleksii Kurochko wrote:


      

        
On 4/10/25 5:53 PM, Jan Beulich wrote:


        

          
On 08.04.2025 17:57, Oleksii Kurochko wrote:


          

            
+{
+    const __be32 *cell;
+    int ac;
+    uint32_t len;
+
+    ac = dt_n_addr_cells(cpun);
+    cell = dt_get_property(cpun, "reg", &len);
+    if ( !cell || !ac || ((sizeof(*cell) * ac * (thread + 1)) > len) )
+        return ~0ULL;


          

          
I'm sorry for my lack of DT knowledge, but what's "thread" representing here?
You only pass in 0 below, so it's unclear whether it's what one might expect
(the thread number on a multi-threaded core).


        

        
Based on the DT specification alone, the|`reg`| value could refer to either a CPU or a thread ID:
```
The value of reg is a <prop-encoded-array> that defines a unique CPU/thread id for
the CPU/threads represented by the CPU node. If a CPU supports more than one thread
(i.e. multiple streams of execution) the reg prop-erty is an array with 1 element
per thread.
```

My understanding is that the term/thread/ was used in the Linux kernel to cover both
cases.
When SMT isn't supported, the CPU can be considered to have a single thread.
For example, RISC-V uses the term/hardware thread/ to describe a hart (i.e., a CPU).

Interestingly, the Linux kernel always uses|thread = 0|.

We could potentially drop this ambiguity and introduce an|ASSERT()| to check that
the|`reg`| property contains only one entry, representing the HART (CPU) ID:
```
   Software can determine the number of threads by dividing the size of reg by the parent
   node’s #address-cells. If `|reg`| has more than one entry, it would simply SMT support
   is required.
```

Does that approach make sense, or should we stick with the current implementation?


      

      
If extra enabling is required to make multi-thread CPUs work, then panic()ing
(not so much ASSERT()ing) may make sense, for the time being. Better would be
if we could use all threads in a system right away.

    

    
Actually, this function is ready to be used for multi-thread CPUs. A caller can request hardware id
by passing `thread` argument (`thread` -> the local thread number to get the hardware ID for).
So by calling:
 dt_get_cpu_hwid(cpu0, 0) -> it will return hardware id of thread 0 of cpu0
 dt_get_cpu_hwid(cpu0, 1) -> it will return hardware id of thread 1 of cpu0
 ...

In our case we assume that SMP isn't supported so that is why it is used only dt_get_cpu_hwid(cpu0, 0).

If one day, SMP will be enabled then it will be needed to change a callers of dt_get_cpu_hwid().

I will add a check in the caller.

~ Oleksii


  


--------------vKZiJYBFphQnFEdHbsm5hwUH--


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Subject: Re: [PATCH v2] x86: constrain sub-page access length in
 mmio_ro_emulated_write()
To: Jan Beulich , "xen-devel@lists.xenproject.org"
	
CC: Andrew Cooper ,
	=?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Marek Marczykowski
	
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From: Jason Andryuk 
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On 2025-04-25 10:57, Jan Beulich wrote:
> Without doing so we could trigger the ASSERT_UNREACHABLE() in
> subpage_mmio_write_emulate(). A comment there actually says this
> validation would already have been done ...
> 
> Fixes: 8847d6e23f97 ("x86/mm: add API for marking only part of a MMIO page read only")
> Signed-off-by: Jan Beulich 

Reviewed-by: Jason Andryuk 

Thanks,
Jason


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Date: Fri, 25 Apr 2025 20:16:39 +0100
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Subject: Re: [PATCH] x86/hyperv: use dynamically allocated page for hypercalls
To: Ariadne Conill , xen-devel@lists.xenproject.org
Cc: Paul Durrant , Jan Beulich ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Alejandro Vallejo ,
 "Alexander M . Merritt" 
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On 25/04/2025 5:51 pm, Ariadne Conill wrote:
> diff --git a/xen/arch/x86/guest/hyperv/hyperv.c b/xen/arch/x86/guest/hyperv/hyperv.c
> index 6989af38f1..637b4bf335 100644
> --- a/xen/arch/x86/guest/hyperv/hyperv.c
> +++ b/xen/arch/x86/guest/hyperv/hyperv.c
> @@ -98,10 +97,22 @@ static void __init setup_hypercall_page(void)
>      rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
>      if ( !hypercall_msr.enable )
>      {
> -        mfn = HV_HCALL_MFN;
> +        hv_hcall_page = alloc_xenheap_page();
> +        if ( !hv_hcall_page )
> +        {
> +            printk("Hyper-V: Failed to allocate hypercall trampoline page\n");
> +            return -ENOMEM;
> +        }
> +
> +        printk("Hyper-V: Allocated hypercall page @ %p.\n", hv_hcall_page);
> +
> +        mfn = virt_to_mfn(hv_hcall_page);

Up to here is ok; this is just choosing a different page, but...

>          hypercall_msr.enable = 1;
>          hypercall_msr.guest_physical_address = mfn;
>          wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
> +
> +        start = (unsigned long) hv_hcall_page;
> +        modify_xen_mappings(start, start + PAGE_SIZE, PAGE_HYPERVISOR_RX);

... this and ...

>      }
>      else
>          mfn = hypercall_msr.guest_physical_address;
> @@ -109,9 +120,9 @@ static void __init setup_hypercall_page(void)
>      rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
>      BUG_ON(!hypercall_msr.enable);
>  
> -    set_fixmap_x(FIX_X_HYPERV_HCALL, mfn << PAGE_SHIFT);

... this break the case where the overlay is already chosen and cannot move.

It really needs to stay using set_fixmap_x(), which in turn means you
can ...

> diff --git a/xen/arch/x86/include/asm/guest/hyperv-hcall.h b/xen/arch/x86/include/asm/guest/hyperv-hcall.h
> index b76dbf9ccc..b73edca7c6 100644
> --- a/xen/arch/x86/include/asm/guest/hyperv-hcall.h
> +++ b/xen/arch/x86/include/asm/guest/hyperv-hcall.h
> @@ -20,13 +20,13 @@ static inline uint64_t hv_do_hypercall(uint64_t control, paddr_t input_addr,
>                                         paddr_t output_addr)
>  {
>      uint64_t status;
> -    register unsigned long r8 asm ( "r8" ) = output_addr;
>  
>      /* See TLFS for volatile registers */
> -    asm volatile ( "call hv_hcall_page"
> +    asm volatile ( "mov %[output_addr], %%r8\n"
> +                   "call *%[target_addr]"
>                     : "=a" (status), "+c" (control),
>                       "+d" (input_addr) ASM_CALL_CONSTRAINT
> -                   : "r" (r8)
> +                   : [output_addr] "r" (output_addr), [target_addr] "r" (hv_hcall_page)
>                     : "memory" );

... undo this speculative security vulnerability you've got by not using
INDIRECT_CALL.

The point of FIXMAP_X is to provide a virtual address in the main 1G
range for .text/.data/.rodata/.bss, which can point to an arbitrary
location, and can be regularly CALL'd.

~Andrew


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Date: Fri, 25 Apr 2025 12:26:14 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: "Edgar E. Iglesias" 
cc: qemu-devel@nongnu.org, qemu-stable@nongnu.org, sstabellini@kernel.org, 
    anthony@xenproject.org, paul@xen.org, edgar.iglesias@amd.com, 
    xen-devel@lists.xenproject.org
Subject: Re: [PATCH v1 1/1] xen: mapcache: Split mapcache_grants by ro and
 rw
In-Reply-To: <20250425143156.204452-2-edgar.iglesias@gmail.com>
Message-ID: 
References: <20250425143156.204452-1-edgar.iglesias@gmail.com> <20250425143156.204452-2-edgar.iglesias@gmail.com>
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On Fri, 25 Apr 2025, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias" 
> 
> Today, we don't track write-abiliy in the cache, if a user
> requests a readable mapping followed by a writeable mapping
> on the same page, the second lookup will incorrectly hit
> the readable entry.
> 
> Split mapcache_grants by ro and rw access. Grants will now
> have separate ways in the cache depending on writeability.
> 
> Signed-off-by: Edgar E. Iglesias 

Reviewed-by: Stefano Stabellini 


> ---
>  hw/xen/xen-mapcache.c | 26 +++++++++++++++++++-------
>  1 file changed, 19 insertions(+), 7 deletions(-)
> 
> diff --git a/hw/xen/xen-mapcache.c b/hw/xen/xen-mapcache.c
> index 2c8f861fdb..e31d379702 100644
> --- a/hw/xen/xen-mapcache.c
> +++ b/hw/xen/xen-mapcache.c
> @@ -75,7 +75,8 @@ typedef struct MapCache {
>  } MapCache;
>  
>  static MapCache *mapcache;
> -static MapCache *mapcache_grants;
> +static MapCache *mapcache_grants_ro;
> +static MapCache *mapcache_grants_rw;
>  static xengnttab_handle *xen_region_gnttabdev;
>  
>  static inline void mapcache_lock(MapCache *mc)
> @@ -176,9 +177,12 @@ void xen_map_cache_init(phys_offset_to_gaddr_t f, void *opaque)
>       * Grant mappings must use XC_PAGE_SIZE granularity since we can't
>       * map anything beyond the number of pages granted to us.
>       */
> -    mapcache_grants = xen_map_cache_init_single(f, opaque,
> -                                                XC_PAGE_SHIFT,
> -                                                max_mcache_size);
> +    mapcache_grants_ro = xen_map_cache_init_single(f, opaque,
> +                                                   XC_PAGE_SHIFT,
> +                                                   max_mcache_size);
> +    mapcache_grants_rw = xen_map_cache_init_single(f, opaque,
> +                                                   XC_PAGE_SHIFT,
> +                                                   max_mcache_size);
>  
>      setrlimit(RLIMIT_AS, &rlimit_as);
>  }
> @@ -456,9 +460,13 @@ uint8_t *xen_map_cache(MemoryRegion *mr,
>                         bool is_write)
>  {
>      bool grant = xen_mr_is_grants(mr);
> -    MapCache *mc = grant ? mapcache_grants : mapcache;
> +    MapCache *mc = mapcache;
>      uint8_t *p;
>  
> +    if (grant) {
> +        mc = is_write ? mapcache_grants_rw : mapcache_grants_ro;
> +    }
> +
>      if (grant && !lock) {
>          /*
>           * Grants are only supported via address_space_map(). Anything
> @@ -523,7 +531,10 @@ ram_addr_t xen_ram_addr_from_mapcache(void *ptr)
>  
>      addr = xen_ram_addr_from_mapcache_single(mapcache, ptr);
>      if (addr == RAM_ADDR_INVALID) {
> -        addr = xen_ram_addr_from_mapcache_single(mapcache_grants, ptr);
> +        addr = xen_ram_addr_from_mapcache_single(mapcache_grants_ro, ptr);
> +    }
> +    if (addr == RAM_ADDR_INVALID) {
> +        addr = xen_ram_addr_from_mapcache_single(mapcache_grants_rw, ptr);
>      }
>  
>      return addr;
> @@ -626,7 +637,8 @@ static void xen_invalidate_map_cache_entry_single(MapCache *mc, uint8_t *buffer)
>  static void xen_invalidate_map_cache_entry_all(uint8_t *buffer)
>  {
>      xen_invalidate_map_cache_entry_single(mapcache, buffer);
> -    xen_invalidate_map_cache_entry_single(mapcache_grants, buffer);
> +    xen_invalidate_map_cache_entry_single(mapcache_grants_ro, buffer);
> +    xen_invalidate_map_cache_entry_single(mapcache_grants_rw, buffer);
>  }
>  
>  static void xen_invalidate_map_cache_entry_bh(void *opaque)
> -- 
> 2.43.0
> 


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Date: Fri, 25 Apr 2025 21:31:28 +0200
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Subject: Re: [PATCH v1 10/14] xen/riscv: implementation of aplic and imsic
 operations
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Romain Caritey , xen-devel@lists.xenproject.org
References: 
 <74a07ed7c596bbcf581010685e01bfdfa19164f5.1744126720.git.oleksii.kurochko@gmail.com>
 <3426df1b-938a-4d20-a533-dd6695473db0@suse.com>
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From: Oleksii Kurochko 
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On 4/22/25 9:02 AM, Jan Beulich wrote:
> On 18.04.2025 12:43, Oleksii Kurochko wrote:
>> On 4/15/25 4:53 PM, Jan Beulich wrote:
>>> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>>>> --- a/xen/arch/riscv/imsic.c
>>>> +++ b/xen/arch/riscv/imsic.c
>>>> @@ -14,12 +14,68 @@
>>>>    #include 
>>>>    #include 
>>>>    #include 
>>>> +#include 
>>>>    #include 
>>>>    
>>>>    #include 
>>>>    
>>>>    static struct imsic_config imsic_cfg;
>>>>    
>>>> +#define imsic_csr_set(c, v)     \
>>>> +do {                            \
>>>> +    csr_write(CSR_SISELECT, c); \
>>>> +    csr_set(CSR_SIREG, v);      \
>>>> +} while (0)
>>>> +
>>>> +#define imsic_csr_clear(c, v)   \
>>>> +do {                            \
>>>> +    csr_write(CSR_SISELECT, c); \
>>>> +    csr_clear(CSR_SIREG, v);    \
>>>> +} while (0)
>>> Coming back to these (the later patch adds one more here): How expensive are
>>> these CSR writes? IOW would it perhaps make sense to maintain a local cache
>>> of the last written SISELECT value, to avoid writing the same one again if
>>> the same windowed register needs accessing twice in a row?
>> CSRs belong to the HART, so access to them is very fast.
> Can you back this by any data? I view CSRs as somewhat similar to x86'es MSRs,
> and access (writes in particular) to some of them is rather slow.

CSR read 1 cycle, CSR write 7 cycles on Microchip platform. ~ Oleksii

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On 4/22/25 9:02 AM, Jan Beulich wrote:

    

    

      
On 18.04.2025 12:43, Oleksii Kurochko wrote:


      

        
On 4/15/25 4:53 PM, Jan Beulich wrote:


        

          
On 08.04.2025 17:57, Oleksii Kurochko wrote:


          

            
--- a/xen/arch/riscv/imsic.c
+++ b/xen/arch/riscv/imsic.c
@@ -14,12 +14,68 @@
  #include <xen/errno.h>
  #include <xen/init.h>
  #include <xen/macros.h>
+#include <xen/spinlock.h>
  #include <xen/xmalloc.h>
  
  #include <asm/imsic.h>
  
  static struct imsic_config imsic_cfg;
  
+#define imsic_csr_set(c, v)     \
+do {                            \
+    csr_write(CSR_SISELECT, c); \
+    csr_set(CSR_SIREG, v);      \
+} while (0)
+
+#define imsic_csr_clear(c, v)   \
+do {                            \
+    csr_write(CSR_SISELECT, c); \
+    csr_clear(CSR_SIREG, v);    \
+} while (0)


          

          
Coming back to these (the later patch adds one more here): How expensive are
these CSR writes? IOW would it perhaps make sense to maintain a local cache
of the last written SISELECT value, to avoid writing the same one again if
the same windowed register needs accessing twice in a row?


        

        
CSRs belong to the HART, so access to them is very fast.


      

      
Can you back this by any data? I view CSRs as somewhat similar to x86'es MSRs,
and access (writes in particular) to some of them is rather slow.

    

    
CSR read 1 cycle, CSR write 7 cycles on Microchip platform.

~ Oleksii

  


--------------QNxNomG2MzxUG3HCadje2v90--


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Date: Fri, 25 Apr 2025 12:36:10 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: "Orzel, Michal" 
cc: Stefano Stabellini , 
    xen-devel@lists.xenproject.org, andrei.cherechesu@oss.nxp.com, 
    jason.andryuk@amd.com
Subject: Re: [PATCH v5] uboot-script-gen: Dynamically compute addr and size
 when loading binaries
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On Fri, 25 Apr 2025, Orzel, Michal wrote:
> On 25/04/2025 03:16, Stefano Stabellini wrote:
> > From: Andrei Cherechesu 
> > 
> > Normally, the Imagebuilder would precompute the sizes of the loaded
> > binaries and addresses where they are loaded before generating the
> > script, and the sizes and addresses that needed to be provided to
> > Xen via /chosen would be hardcoded in the boot script.
> > 
> > Added an option via "-s" parameter to avoid hardcoding any
> > address in the boot script, and dynamically compute the
> > loading addresses for binaries. The first loading address is based
> > on the MEMORY_START parameter and after loading each binary,
> > the loading address and the size of the binary are stored in
> > variables with corresponding names. Then, the loading address
> > for the next binary is computed and aligned to 0x200000.
> > 
> > If the "-s" parameter is not used, the normal flow is executed,
> > where the loading addresses and sizes for each binaries are
> > precomputed and hardcoded inside the script, but the loading
> > addresses and sizes for each binary are now also stored for eventual
> > later use.
> > 
> > Reserved memory regions are left TBD in the -s case.
> > 
> > Link: https://lists.xenproject.org/archives/html/xen-devel/2022-09/msg01862.html
> > Signed-off-by: Andrei Cherechesu 
> > Signed-off-by: Stefano Stabellini 
> > ---
> > This patch adds quite a bit of complexity which is the reason why I
> > didn't originally commit it. Now that we are enabling ImageBuilder in
> > Yocto, it turns out this patch is required because Yocto invokes
> > ImageBuilder before all the binaries are ready and available.
> > 
> > Andrei, sorry for taking so long to realize why it is essential, but we
> > are getting there now.
> > 
> > The changes I made to the original patch are purely to make it simpler
> > to maintain.
> > ---
> > 
> > diff --git a/README.md b/README.md
> > index f8039ec..28c9e6b 100644
> > --- a/README.md
> > +++ b/README.md
> > @@ -356,6 +356,8 @@ Where:\
> >     can only be used  in combination with the -k option.  This adds the
> >     public key into the dtb.  Then one can add this dtb back into the
> >     u-boot bin or elf.\
> > +-s addresses and sizes are calculated dynamically from U-Boot, hence
> > +   binaries don't need to be available at the time of invocation.\
> >  
> >  ### Signed FIT images
> >  
> > diff --git a/scripts/uboot-script-gen b/scripts/uboot-script-gen
> > index 638154a..ee4af6c 100755
> > --- a/scripts/uboot-script-gen
> > +++ b/scripts/uboot-script-gen
> > @@ -1,8 +1,11 @@
> >  #!/bin/bash
> >  
> >  offset=$((2*1024*1024))
> > +PADDING_MASK=`printf "0x%X\n" $(($offset - 1))`
> > +PADDING_MASK_INV=`printf "0x%X\n" $((~$PADDING_MASK))`
> >  filesize=0
> >  prog_req=(mkimage file fdtput mktemp awk od)
> > +CALC=""
> >  
> >  function cleanup_and_return_err()
> >  {
> > @@ -100,17 +103,42 @@ function dt_set()
> >      fi
> >  }
> >  
> > +function dt_set_calc()
> > +{
> > +    local path=$1
> > +    local var=$2
> > +    local name_var=$3
> > + 
> > +    addr_var="$name_var"_addr
> > +    size_var="$name_var"_size
> > +
> > +    # Split data_addr_var into high/low
> > +    echo "setexpr addr_hi \${"$addr_var"} / 0x100000000" >> $UBOOT_SOURCE
> > +    echo "setexpr addr_lo \${"$addr_var"} \& 0xFFFFFFFF" >> $UBOOT_SOURCE
> > +    
> > +    # Split data_size_var into high/low
> > +    echo "setexpr size_hi \${"$size_var"} / 0x100000000" >> $UBOOT_SOURCE
> > +    echo "setexpr size_lo \${"$size_var"} \& 0xFFFFFFFF" >> $UBOOT_SOURCE
> > +    
> > +    echo "fdt set $path $var <0x\${addr_hi} 0x\${addr_lo} 0x\${size_hi} 0x\${size_lo}>" >> $UBOOT_SOURCE
> > +}
> > +
> >  function add_device_tree_kernel()
> >  {
> >      local path=$1
> > -    local addr=$2
> > -    local size=$3
> > -    local bootargs=$4
> > +    local name=$2
> > +    local addr=$3
> > +    local size=$4
> > +    local bootargs=$5
> >      local node_name="module@${addr#0x}"
> >  
> >      dt_mknode "$path" "$node_name"
> >      dt_set "$path/$node_name" "compatible" "str_a" "multiboot,kernel multiboot,module"
> > -    dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
> > +    if test "$CALC"; then
> > +        dt_set_calc "$path/$node_name" "reg" $name
> > +    else
> > +        dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
> > +    fi
> >      dt_set "$path/$node_name" "bootargs" "str" "$bootargs"
> >  }
> >  
> > @@ -118,26 +146,36 @@ function add_device_tree_kernel()
> >  function add_device_tree_ramdisk()
> >  {
> >      local path=$1
> > -    local addr=$2
> > -    local size=$3
> > +    local name=$2
> > +    local addr=$3
> > +    local size=$4
> >      local node_name="module@${addr#0x}"
> >  
> >      dt_mknode "$path"  "$node_name"
> >      dt_set "$path/$node_name" "compatible" "str_a" "multiboot,ramdisk multiboot,module"
> > -    dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
> > +    if test "$CALC"; then
> > +        dt_set_calc "$path/$node_name" "reg" $name
> > +    else
> > +        dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
> > +    fi
> >  }
> >  
> >  
> >  function add_device_tree_passthrough()
> >  {
> >      local path=$1
> > -    local addr=$2
> > -    local size=$3
> > +    local name=$2
> > +    local addr=$3
> > +    local size=$4
> >      local node_name="module@${addr#0x}"
> >  
> >      dt_mknode "$path"  "$node_name"
> >      dt_set "$path/$node_name" "compatible" "str_a" "multiboot,device-tree multiboot,module"
> > -    dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
> > +    if test "$CALC"; then
> > +        dt_set_calc "$path/$node_name" "reg" $name
> > +    else
> > +        dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
> > +    fi
> >  }
> >  
> >  function add_device_tree_mem()
> > @@ -358,7 +396,11 @@ function xen_device_tree_editing()
> >  
> >          dt_mknode "/chosen" "$node_name"
> >          dt_set "/chosen/$node_name" "compatible" "str_a" "xen,xsm-policy xen,multiboot-module multiboot,module"
> > -        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $xen_policy_addr $xen_policy_size)"
> > +        if test "$CALC"; then
> > +            dt_set_calc "/chosen/$node_name" "reg" "xen_policy"
> > +        else
> > +            dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $xen_policy_addr $xen_policy_size)"
> > +        fi
> >      fi
> >  
> >      if test "$DOM0_KERNEL"
> > @@ -367,7 +409,11 @@ function xen_device_tree_editing()
> >  
> >          dt_mknode "/chosen" "$node_name"
> >          dt_set "/chosen/$node_name" "compatible" "str_a" "xen,linux-zimage xen,multiboot-module multiboot,module"
> > -        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $dom0_kernel_addr $dom0_kernel_size)"
> > +        if test "$CALC"; then
> > +            dt_set_calc "/chosen/$node_name" "reg" "dom0_linux"
> > +        else
> > +            dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $dom0_kernel_addr $dom0_kernel_size)"
> > +        fi
> >          dt_set "/chosen" "xen,dom0-bootargs" "str" "$DOM0_CMD"
> >      fi
> >  
> > @@ -377,7 +423,11 @@ function xen_device_tree_editing()
> >  
> >          dt_mknode "/chosen" "$node_name"
> >          dt_set "/chosen/$node_name" "compatible" "str_a" "xen,linux-initrd xen,multiboot-module multiboot,module"
> > -        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $ramdisk_addr $ramdisk_size)"
> > +        if test "$CALC"; then
> > +            dt_set_calc "/chosen/$node_name" "reg" "dom0_ramdisk"
> > +        else
> > +            dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $ramdisk_addr $ramdisk_size)"
> > +        fi
> >      fi
> >  
> >      i=0
> > @@ -464,14 +514,14 @@ function xen_device_tree_editing()
> >  
> >          xen_dt_domu_add_vcpu_nodes "/chosen/domU$i" $i ${DOMU_VCPUS[$i]}
> >  
> > -        add_device_tree_kernel "/chosen/domU$i" ${domU_kernel_addr[$i]} ${domU_kernel_size[$i]} "${DOMU_CMD[$i]}"
> > +        add_device_tree_kernel "/chosen/domU$i" "domU${i}_kernel" ${domU_kernel_addr[$i]} ${domU_kernel_size[$i]} "${DOMU_CMD[$i]}"
> >          if test "${domU_ramdisk_addr[$i]}"
> >          then
> > -            add_device_tree_ramdisk "/chosen/domU$i" ${domU_ramdisk_addr[$i]} ${domU_ramdisk_size[$i]}
> > +            add_device_tree_ramdisk "/chosen/domU$i" "domU${i}_ramdisk" ${domU_ramdisk_addr[$i]} ${domU_ramdisk_size[$i]}
> >          fi
> >          if test "${domU_passthrough_dtb_addr[$i]}"
> >          then
> > -            add_device_tree_passthrough "/chosen/domU$i" ${domU_passthrough_dtb_addr[$i]} ${domU_passthrough_dtb_size[$i]}
> > +            add_device_tree_passthrough "/chosen/domU$i" "domU${i}_fdt" ${domU_passthrough_dtb_addr[$i]} ${domU_passthrough_dtb_size[$i]}
> >          fi
> >          i=$(( $i + 1 ))
> >      done
> > @@ -504,7 +554,11 @@ function device_tree_editing()
> >  
> >      if test $UBOOT_SOURCE
> >      then
> > -        echo "fdt addr $device_tree_addr" >> $UBOOT_SOURCE
> > +        if test "$CALC"; then
> > +            echo "fdt addr \${host_fdt_addr}" >> $UBOOT_SOURCE
> > +        else
> > +            echo "fdt addr $device_tree_addr" >> $UBOOT_SOURCE
> > +        fi
> >          echo "fdt resize 1024" >> $UBOOT_SOURCE
> >  
> >          if test $NUM_DT_OVERLAY && test $NUM_DT_OVERLAY -gt 0
> > @@ -512,7 +566,11 @@ function device_tree_editing()
> >              i=0
> >              while test $i -lt $NUM_DT_OVERLAY
> >              do
> > -                echo "fdt apply ${dt_overlay_addr[$i]}" >> $UBOOT_SOURCE
> > +                if test "$CALC"; then
> > +                    echo "fdt apply \${host_fdto${i}_addr}" >> $UBOOT_SOURCE
> > +                else
> > +                    echo "fdt apply ${dt_overlay_addr[$i]}" >> $UBOOT_SOURCE
> > +                fi
> >                  i=$(( $i + 1 ))
> >              done
> >          fi
> > @@ -530,8 +588,12 @@ function fill_reserved_spaces_from_dtb()
> >  {
> >      if [ ! -f $DEVICE_TREE ]
> >      then
> > -        echo "File $DEVICE_TREE doesn't exist, exiting";
> > -        cleanup_and_return_err
> > +        if test "$CALC"; then
> > +            return
> > +        else
> > +            echo "File $DEVICE_TREE doesn't exist, exiting";
> > +            cleanup_and_return_err
> > +        fi
> >      fi
> >  
> >      # Check if reserved-memory node exists
> > @@ -613,7 +675,7 @@ function get_image_size()
> >      printf "%u" $effective_size
> >  }
> >  
> > -function add_size()
> > +function add_size_from_file()
> >  {
> >      local filename=$1
> >      local size=`stat -L --printf="%s" $filename`
> > @@ -645,6 +707,24 @@ function add_size()
> >      filesize=$size
> >  }
> >  
> > +function add_size_calculate()
> > +{
> > +    local fit_scr_name=$1
> > +
> > +    echo "setenv "$fit_scr_name"_addr \${memaddr}" >> $UBOOT_SOURCE
> > +    echo "setenv "$fit_scr_name"_size \${filesize}" >> $UBOOT_SOURCE
> > +    echo "setexpr memaddr \${memaddr} \+ \${filesize}" >> $UBOOT_SOURCE
> > +    echo "setexpr memaddr \${memaddr} \+ $PADDING_MASK" >> $UBOOT_SOURCE
> To save some lines, can the two additions be done in one line, i.e.:
> echo "setexpr memaddr \${memaddr} \+ \${filesize} \+ $PADDING_MASK" >> $UBOOT_SOURCE

I might be testing with an old version of U-Boot (2020.01), but this
syntax is not supported in my test environment. To retain wider
compatibility, I suggest to keep the two separate lines like in this
patch.


> > +    echo "setexpr memaddr \${memaddr} \& $PADDING_MASK_INV" >> $UBOOT_SOURCE
> > +
> > +    # TODO: missing ${RESERVED_MEM_SPACES[@]} check
> > +
> > +    # The following are updated to avoid collisions in node names, but
> > +    # they are not actively used.
> > +    memaddr=$((memaddr + offset))
> > +    filesize=$offset
> > +}
> > +
> >  function load_file()
> >  {
> >      local filename=$1
> > @@ -657,10 +737,16 @@ function load_file()
> >      if test "$FIT"
> >      then
> >          echo "imxtract \$fit_addr $fit_scr_name $memaddr" >> $UBOOT_SOURCE
> > +        add_size_from_file $filename
> >      else
> > -        echo "$LOAD_CMD $memaddr ${prepend_path:+$prepend_path/}$relative_path" >> $UBOOT_SOURCE
> > +        if test "$CALC"; then
> > +            echo "$LOAD_CMD \${memaddr} ${prepend_path:+$prepend_path/}$relative_path" >> $UBOOT_SOURCE
> > +            add_size_calculate $fit_scr_name
> > +        else
> > +            echo "$LOAD_CMD $memaddr ${prepend_path:+$prepend_path/}$relative_path" >> $UBOOT_SOURCE
> > +            add_size_from_file $filename
> > +        fi
> >      fi
> > -    add_size $filename
> >  }
> >  
> >  function check_file_type()
> > @@ -670,8 +756,13 @@ function check_file_type()
> >  
> >      if [ ! -f $filename ]
> >      then
> > -        echo "File $filename doesn't exist, exiting";
> > -        cleanup_and_return_err
> > +        if test "$CALC"
> > +        then
> > +            return
> > +        else
> > +            echo "File $filename doesn't exist, exiting";
> > +            cleanup_and_return_err
> > +        fi
> >      fi
> >  
> >      # if file doesn't know what it is, it outputs data, so include that
> > @@ -705,8 +796,13 @@ function check_compressed_file_type()
> >  
> >      if [ ! -f $filename ]
> >      then
> > -        echo "File $filename doesn't exist, exiting";
> > -        cleanup_and_return_err
> > +        if test "$CALC"
> > +        then
> > +            return
> > +        else
> > +            echo "File $filename doesn't exist, exiting";
> > +            cleanup_and_return_err
> > +        fi
> >      fi
> >  
> >      file_type=$( file -L $filename )
> > @@ -872,6 +968,12 @@ function linux_config()
> >  generate_uboot_images()
> >  {
> >      local arch=$(file -L $XEN | grep -E 'ARM64|Aarch64')
> > +    
> > +    if test "$CALC"
> > +    then
> > +        echo "bootm is not compatible with -s"
> > +        cleanup_and_return_err
> > +    fi
> >  
> >      if test "$arch"
> >      then
> > @@ -997,7 +1099,11 @@ bitstream_load_and_config()
> >          if test "$UBOOT_SOURCE"
> >          then
> >              # we assume the FPGA device is 0 here
> > -            echo "fpga load 0 $bitstream_addr $bitstream_size" >> "$UBOOT_SOURCE"
> > +            if test "$CALC"; then
> > +                echo "fpga load 0 \${fpga_bitstream_addr} \${fpga_bitstream_size}" >> "$UBOOT_SOURCE"
> > +            else
> > +                echo "fpga load 0 $bitstream_addr $bitstream_size" >> "$UBOOT_SOURCE"
> > +            fi
> >          fi
> >      fi
> >  }
> > @@ -1271,7 +1377,7 @@ function print_help
> >  {
> >      script=`basename "$0"`
> >      echo "usage:"
> > -    echo "	$script -c CONFIG_FILE -d DIRECTORY [-t LOAD_CMD] [-o FILE] [-k KEY_DIR/HINT [-u U-BOOT_DTB]] [-e] [-f] [-p PREPEND_PATH]"
> > +    echo "	$script -c CONFIG_FILE -d DIRECTORY [-t LOAD_CMD] [-o FILE] [-k KEY_DIR/HINT [-u U-BOOT_DTB]] [-e] [-f] [-p PREPEND_PATH] [-s]"
> >      echo "	$script -h"
> >      echo "where:"
> >      echo "	CONFIG_FILE - configuration file"
> > @@ -1288,6 +1394,7 @@ function print_help
> >      echo "	U-BOOT_DTB - u-boot control dtb so that the public key gets added to it"
> >      echo "	-f - enable generating a FIT image"
> >      echo "	PREPEND_PATH - path to be appended before file names to match deploy location within rootfs"
> > +    echo "	-s - enable dynamic loading of binaries by storing their addresses and sizes u-boot env variables"
> >      echo "	-h - prints out the help message and exits "
> >      echo "Defaults:"
> >      echo "	CONFIG_FILE=$cfg_file, UBOOT_TYPE=\"LOAD_CMD\" env var, DIRECTORY=$uboot_dir"
> > @@ -1295,7 +1402,7 @@ function print_help
> >      echo "	$script -c ../config -d ./build42 -t \"scsi load 1:1\""
> >  }
> >  
> > -while getopts ":c:t:d:ho:k:u:fp:" opt; do
> > +while getopts ":c:t:d:ho:k:u:fp:s" opt; do
> >      case ${opt} in
> >      t )
> >          case $OPTARG in
> > @@ -1340,6 +1447,9 @@ while getopts ":c:t:d:ho:k:u:fp:" opt; do
> >      p )
> >          prepend_path="$OPTARG"
> >          ;;
> > +    s )
> > +        CALC=y
> > +        ;;
> >      h )
> >          print_help
> >          exit 0
> > @@ -1533,6 +1643,7 @@ uboot_addr=$memaddr
> >  # 2MB are enough for a uboot script
> >  memaddr=$(( $memaddr + $offset ))
> >  memaddr=`printf "0x%X\n" $memaddr`
> > +echo "setenv memaddr $memaddr" >> $UBOOT_SOURCE
> Why is it here unconditionally?

Because it is harmless but you are right that it could be conditional. I
can make the change.


> >  
> >  fill_reserved_spaces_from_dtb
> >  
> > @@ -1583,7 +1694,11 @@ fi
> >  
> >  if [ "$BOOT_CMD" != "none" ]
> >  then
> > -    echo "$BOOT_CMD $kernel_addr $([ "$BOOT_CMD" = "bootefi" ] || echo '-') $device_tree_addr" >> $UBOOT_SOURCE
> > +    if test "$CALC"; then
> > +        echo "$BOOT_CMD \${host_kernel_addr} $([ "$BOOT_CMD" = "bootefi" ] || echo '-') \${host_fdt_addr}" >> $UBOOT_SOURCE
> > +    else
> > +        echo "$BOOT_CMD $kernel_addr $([ "$BOOT_CMD" = "bootefi" ] || echo '-') $device_tree_addr" >> $UBOOT_SOURCE
> > +    fi
> >  else
> >      # skip boot command but store load addresses to be used later
> >      echo "setenv host_kernel_addr $kernel_addr" >> $UBOOT_SOURCE
> 
> ~Michal
> 


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Date: Fri, 25 Apr 2025 12:40:40 -0700 (PDT)
From: Stefano Stabellini 
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To: xen-devel@lists.xenproject.org
cc: andrei.cherechesu@nxp.com, sstabellini@kernel.org, michal.orzel@amd.com, 
    jason.andryuk@amd.com
Subject: [PATCH v6] uboot-script-gen: Dynamically compute addr and size when
 loading binaries
Message-ID: 
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From: Andrei Cherechesu 

Normally, the Imagebuilder would precompute the sizes of the loaded
binaries and addresses where they are loaded before generating the
script, and the sizes and addresses that needed to be provided to
Xen via /chosen would be hardcoded in the boot script.

Added an option via "-s" parameter to avoid hardcoding any
address in the boot script, and dynamically compute the
loading addresses for binaries. The first loading address is based
on the MEMORY_START parameter and after loading each binary,
the loading address and the size of the binary are stored in
variables with corresponding names. Then, the loading address
for the next binary is computed and aligned to 0x200000.

If the "-s" parameter is not used, the normal flow is executed,
where the loading addresses and sizes for each binaries are
precomputed and hardcoded inside the script, but the loading
addresses and sizes for each binary are now also stored for eventual
later use.

Reserved memory regions are left TBD in the -s case.

Link: https://lists.xenproject.org/archives/html/xen-devel/2022-09/msg01862.html
Signed-off-by: Andrei Cherechesu 
Signed-off-by: Stefano Stabellini 
---
Changes in v6:
- make initial ${memaddr} setting depending on CALC

This patch adds quite a bit of complexity which is the reason why I
didn't originally commit it. Now that we are enabling ImageBuilder in
Yocto, it turns out this patch is required because Yocto invokes
ImageBuilder before all the binaries are ready and available.

Andrei, sorry for taking so long to realize why it is essential, but we
are getting there now.

The changes I made to the original patch are purely to make it simpler
to maintain.
---
 README.md                |   2 +
 scripts/uboot-script-gen | 180 ++++++++++++++++++++++++++++++++-------
 2 files changed, 151 insertions(+), 31 deletions(-)

diff --git a/README.md b/README.md
index f8039ec..28c9e6b 100644
--- a/README.md
+++ b/README.md
@@ -356,6 +356,8 @@ Where:\
    can only be used  in combination with the -k option.  This adds the
    public key into the dtb.  Then one can add this dtb back into the
    u-boot bin or elf.\
+-s addresses and sizes are calculated dynamically from U-Boot, hence
+   binaries don't need to be available at the time of invocation.\
 
 ### Signed FIT images
 
diff --git a/scripts/uboot-script-gen b/scripts/uboot-script-gen
index 638154a..9ec0e20 100755
--- a/scripts/uboot-script-gen
+++ b/scripts/uboot-script-gen
@@ -1,8 +1,11 @@
 #!/bin/bash
 
 offset=$((2*1024*1024))
+PADDING_MASK=`printf "0x%X\n" $(($offset - 1))`
+PADDING_MASK_INV=`printf "0x%X\n" $((~$PADDING_MASK))`
 filesize=0
 prog_req=(mkimage file fdtput mktemp awk od)
+CALC=""
 
 function cleanup_and_return_err()
 {
@@ -100,17 +103,42 @@ function dt_set()
     fi
 }
 
+function dt_set_calc()
+{
+    local path=$1
+    local var=$2
+    local name_var=$3
+ 
+    addr_var="$name_var"_addr
+    size_var="$name_var"_size
+
+    # Split data_addr_var into high/low
+    echo "setexpr addr_hi \${"$addr_var"} / 0x100000000" >> $UBOOT_SOURCE
+    echo "setexpr addr_lo \${"$addr_var"} \& 0xFFFFFFFF" >> $UBOOT_SOURCE
+    
+    # Split data_size_var into high/low
+    echo "setexpr size_hi \${"$size_var"} / 0x100000000" >> $UBOOT_SOURCE
+    echo "setexpr size_lo \${"$size_var"} \& 0xFFFFFFFF" >> $UBOOT_SOURCE
+    
+    echo "fdt set $path $var <0x\${addr_hi} 0x\${addr_lo} 0x\${size_hi} 0x\${size_lo}>" >> $UBOOT_SOURCE
+}
+
 function add_device_tree_kernel()
 {
     local path=$1
-    local addr=$2
-    local size=$3
-    local bootargs=$4
+    local name=$2
+    local addr=$3
+    local size=$4
+    local bootargs=$5
     local node_name="module@${addr#0x}"
 
     dt_mknode "$path" "$node_name"
     dt_set "$path/$node_name" "compatible" "str_a" "multiboot,kernel multiboot,module"
-    dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
+    if test "$CALC"; then
+        dt_set_calc "$path/$node_name" "reg" $name
+    else
+        dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
+    fi
     dt_set "$path/$node_name" "bootargs" "str" "$bootargs"
 }
 
@@ -118,26 +146,36 @@ function add_device_tree_kernel()
 function add_device_tree_ramdisk()
 {
     local path=$1
-    local addr=$2
-    local size=$3
+    local name=$2
+    local addr=$3
+    local size=$4
     local node_name="module@${addr#0x}"
 
     dt_mknode "$path"  "$node_name"
     dt_set "$path/$node_name" "compatible" "str_a" "multiboot,ramdisk multiboot,module"
-    dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
+    if test "$CALC"; then
+        dt_set_calc "$path/$node_name" "reg" $name
+    else
+        dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
+    fi
 }
 
 
 function add_device_tree_passthrough()
 {
     local path=$1
-    local addr=$2
-    local size=$3
+    local name=$2
+    local addr=$3
+    local size=$4
     local node_name="module@${addr#0x}"
 
     dt_mknode "$path"  "$node_name"
     dt_set "$path/$node_name" "compatible" "str_a" "multiboot,device-tree multiboot,module"
-    dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
+    if test "$CALC"; then
+        dt_set_calc "$path/$node_name" "reg" $name
+    else
+        dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
+    fi
 }
 
 function add_device_tree_mem()
@@ -358,7 +396,11 @@ function xen_device_tree_editing()
 
         dt_mknode "/chosen" "$node_name"
         dt_set "/chosen/$node_name" "compatible" "str_a" "xen,xsm-policy xen,multiboot-module multiboot,module"
-        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $xen_policy_addr $xen_policy_size)"
+        if test "$CALC"; then
+            dt_set_calc "/chosen/$node_name" "reg" "xen_policy"
+        else
+            dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $xen_policy_addr $xen_policy_size)"
+        fi
     fi
 
     if test "$DOM0_KERNEL"
@@ -367,7 +409,11 @@ function xen_device_tree_editing()
 
         dt_mknode "/chosen" "$node_name"
         dt_set "/chosen/$node_name" "compatible" "str_a" "xen,linux-zimage xen,multiboot-module multiboot,module"
-        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $dom0_kernel_addr $dom0_kernel_size)"
+        if test "$CALC"; then
+            dt_set_calc "/chosen/$node_name" "reg" "dom0_linux"
+        else
+            dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $dom0_kernel_addr $dom0_kernel_size)"
+        fi
         dt_set "/chosen" "xen,dom0-bootargs" "str" "$DOM0_CMD"
     fi
 
@@ -377,7 +423,11 @@ function xen_device_tree_editing()
 
         dt_mknode "/chosen" "$node_name"
         dt_set "/chosen/$node_name" "compatible" "str_a" "xen,linux-initrd xen,multiboot-module multiboot,module"
-        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $ramdisk_addr $ramdisk_size)"
+        if test "$CALC"; then
+            dt_set_calc "/chosen/$node_name" "reg" "dom0_ramdisk"
+        else
+            dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $ramdisk_addr $ramdisk_size)"
+        fi
     fi
 
     i=0
@@ -464,14 +514,14 @@ function xen_device_tree_editing()
 
         xen_dt_domu_add_vcpu_nodes "/chosen/domU$i" $i ${DOMU_VCPUS[$i]}
 
-        add_device_tree_kernel "/chosen/domU$i" ${domU_kernel_addr[$i]} ${domU_kernel_size[$i]} "${DOMU_CMD[$i]}"
+        add_device_tree_kernel "/chosen/domU$i" "domU${i}_kernel" ${domU_kernel_addr[$i]} ${domU_kernel_size[$i]} "${DOMU_CMD[$i]}"
         if test "${domU_ramdisk_addr[$i]}"
         then
-            add_device_tree_ramdisk "/chosen/domU$i" ${domU_ramdisk_addr[$i]} ${domU_ramdisk_size[$i]}
+            add_device_tree_ramdisk "/chosen/domU$i" "domU${i}_ramdisk" ${domU_ramdisk_addr[$i]} ${domU_ramdisk_size[$i]}
         fi
         if test "${domU_passthrough_dtb_addr[$i]}"
         then
-            add_device_tree_passthrough "/chosen/domU$i" ${domU_passthrough_dtb_addr[$i]} ${domU_passthrough_dtb_size[$i]}
+            add_device_tree_passthrough "/chosen/domU$i" "domU${i}_fdt" ${domU_passthrough_dtb_addr[$i]} ${domU_passthrough_dtb_size[$i]}
         fi
         i=$(( $i + 1 ))
     done
@@ -504,7 +554,11 @@ function device_tree_editing()
 
     if test $UBOOT_SOURCE
     then
-        echo "fdt addr $device_tree_addr" >> $UBOOT_SOURCE
+        if test "$CALC"; then
+            echo "fdt addr \${host_fdt_addr}" >> $UBOOT_SOURCE
+        else
+            echo "fdt addr $device_tree_addr" >> $UBOOT_SOURCE
+        fi
         echo "fdt resize 1024" >> $UBOOT_SOURCE
 
         if test $NUM_DT_OVERLAY && test $NUM_DT_OVERLAY -gt 0
@@ -512,7 +566,11 @@ function device_tree_editing()
             i=0
             while test $i -lt $NUM_DT_OVERLAY
             do
-                echo "fdt apply ${dt_overlay_addr[$i]}" >> $UBOOT_SOURCE
+                if test "$CALC"; then
+                    echo "fdt apply \${host_fdto${i}_addr}" >> $UBOOT_SOURCE
+                else
+                    echo "fdt apply ${dt_overlay_addr[$i]}" >> $UBOOT_SOURCE
+                fi
                 i=$(( $i + 1 ))
             done
         fi
@@ -530,8 +588,12 @@ function fill_reserved_spaces_from_dtb()
 {
     if [ ! -f $DEVICE_TREE ]
     then
-        echo "File $DEVICE_TREE doesn't exist, exiting";
-        cleanup_and_return_err
+        if test "$CALC"; then
+            return
+        else
+            echo "File $DEVICE_TREE doesn't exist, exiting";
+            cleanup_and_return_err
+        fi
     fi
 
     # Check if reserved-memory node exists
@@ -613,7 +675,7 @@ function get_image_size()
     printf "%u" $effective_size
 }
 
-function add_size()
+function add_size_from_file()
 {
     local filename=$1
     local size=`stat -L --printf="%s" $filename`
@@ -645,6 +707,24 @@ function add_size()
     filesize=$size
 }
 
+function add_size_calculate()
+{
+    local fit_scr_name=$1
+
+    echo "setenv "$fit_scr_name"_addr \${memaddr}" >> $UBOOT_SOURCE
+    echo "setenv "$fit_scr_name"_size \${filesize}" >> $UBOOT_SOURCE
+    echo "setexpr memaddr \${memaddr} \+ \${filesize}" >> $UBOOT_SOURCE
+    echo "setexpr memaddr \${memaddr} \+ $PADDING_MASK" >> $UBOOT_SOURCE
+    echo "setexpr memaddr \${memaddr} \& $PADDING_MASK_INV" >> $UBOOT_SOURCE
+
+    # TODO: missing ${RESERVED_MEM_SPACES[@]} check
+
+    # The following are updated to avoid collisions in node names, but
+    # they are not actively used.
+    memaddr=$((memaddr + offset))
+    filesize=$offset
+}
+
 function load_file()
 {
     local filename=$1
@@ -657,10 +737,16 @@ function load_file()
     if test "$FIT"
     then
         echo "imxtract \$fit_addr $fit_scr_name $memaddr" >> $UBOOT_SOURCE
+        add_size_from_file $filename
     else
-        echo "$LOAD_CMD $memaddr ${prepend_path:+$prepend_path/}$relative_path" >> $UBOOT_SOURCE
+        if test "$CALC"; then
+            echo "$LOAD_CMD \${memaddr} ${prepend_path:+$prepend_path/}$relative_path" >> $UBOOT_SOURCE
+            add_size_calculate $fit_scr_name
+        else
+            echo "$LOAD_CMD $memaddr ${prepend_path:+$prepend_path/}$relative_path" >> $UBOOT_SOURCE
+            add_size_from_file $filename
+        fi
     fi
-    add_size $filename
 }
 
 function check_file_type()
@@ -670,8 +756,13 @@ function check_file_type()
 
     if [ ! -f $filename ]
     then
-        echo "File $filename doesn't exist, exiting";
-        cleanup_and_return_err
+        if test "$CALC"
+        then
+            return
+        else
+            echo "File $filename doesn't exist, exiting";
+            cleanup_and_return_err
+        fi
     fi
 
     # if file doesn't know what it is, it outputs data, so include that
@@ -705,8 +796,13 @@ function check_compressed_file_type()
 
     if [ ! -f $filename ]
     then
-        echo "File $filename doesn't exist, exiting";
-        cleanup_and_return_err
+        if test "$CALC"
+        then
+            return
+        else
+            echo "File $filename doesn't exist, exiting";
+            cleanup_and_return_err
+        fi
     fi
 
     file_type=$( file -L $filename )
@@ -872,6 +968,12 @@ function linux_config()
 generate_uboot_images()
 {
     local arch=$(file -L $XEN | grep -E 'ARM64|Aarch64')
+    
+    if test "$CALC"
+    then
+        echo "bootm is not compatible with -s"
+        cleanup_and_return_err
+    fi
 
     if test "$arch"
     then
@@ -997,7 +1099,11 @@ bitstream_load_and_config()
         if test "$UBOOT_SOURCE"
         then
             # we assume the FPGA device is 0 here
-            echo "fpga load 0 $bitstream_addr $bitstream_size" >> "$UBOOT_SOURCE"
+            if test "$CALC"; then
+                echo "fpga load 0 \${fpga_bitstream_addr} \${fpga_bitstream_size}" >> "$UBOOT_SOURCE"
+            else
+                echo "fpga load 0 $bitstream_addr $bitstream_size" >> "$UBOOT_SOURCE"
+            fi
         fi
     fi
 }
@@ -1271,7 +1377,7 @@ function print_help
 {
     script=`basename "$0"`
     echo "usage:"
-    echo "	$script -c CONFIG_FILE -d DIRECTORY [-t LOAD_CMD] [-o FILE] [-k KEY_DIR/HINT [-u U-BOOT_DTB]] [-e] [-f] [-p PREPEND_PATH]"
+    echo "	$script -c CONFIG_FILE -d DIRECTORY [-t LOAD_CMD] [-o FILE] [-k KEY_DIR/HINT [-u U-BOOT_DTB]] [-e] [-f] [-p PREPEND_PATH] [-s]"
     echo "	$script -h"
     echo "where:"
     echo "	CONFIG_FILE - configuration file"
@@ -1288,6 +1394,7 @@ function print_help
     echo "	U-BOOT_DTB - u-boot control dtb so that the public key gets added to it"
     echo "	-f - enable generating a FIT image"
     echo "	PREPEND_PATH - path to be appended before file names to match deploy location within rootfs"
+    echo "	-s - enable dynamic loading of binaries by storing their addresses and sizes u-boot env variables"
     echo "	-h - prints out the help message and exits "
     echo "Defaults:"
     echo "	CONFIG_FILE=$cfg_file, UBOOT_TYPE=\"LOAD_CMD\" env var, DIRECTORY=$uboot_dir"
@@ -1295,7 +1402,7 @@ function print_help
     echo "	$script -c ../config -d ./build42 -t \"scsi load 1:1\""
 }
 
-while getopts ":c:t:d:ho:k:u:fp:" opt; do
+while getopts ":c:t:d:ho:k:u:fp:s" opt; do
     case ${opt} in
     t )
         case $OPTARG in
@@ -1340,6 +1447,9 @@ while getopts ":c:t:d:ho:k:u:fp:" opt; do
     p )
         prepend_path="$OPTARG"
         ;;
+    s )
+        CALC=y
+        ;;
     h )
         print_help
         exit 0
@@ -1533,6 +1643,10 @@ uboot_addr=$memaddr
 # 2MB are enough for a uboot script
 memaddr=$(( $memaddr + $offset ))
 memaddr=`printf "0x%X\n" $memaddr`
+if test "$CALC"
+then
+    echo "setenv memaddr $memaddr" >> $UBOOT_SOURCE
+fi
 
 fill_reserved_spaces_from_dtb
 
@@ -1583,7 +1697,11 @@ fi
 
 if [ "$BOOT_CMD" != "none" ]
 then
-    echo "$BOOT_CMD $kernel_addr $([ "$BOOT_CMD" = "bootefi" ] || echo '-') $device_tree_addr" >> $UBOOT_SOURCE
+    if test "$CALC"; then
+        echo "$BOOT_CMD \${host_kernel_addr} $([ "$BOOT_CMD" = "bootefi" ] || echo '-') \${host_fdt_addr}" >> $UBOOT_SOURCE
+    else
+        echo "$BOOT_CMD $kernel_addr $([ "$BOOT_CMD" = "bootefi" ] || echo '-') $device_tree_addr" >> $UBOOT_SOURCE
+    fi
 else
     # skip boot command but store load addresses to be used later
     echo "setenv host_kernel_addr $kernel_addr" >> $UBOOT_SOURCE
-- 
2.25.1



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From: "H. Peter Anvin" 
To: =?ISO-8859-1?Q?J=FCrgen_Gro=DF?= ,
        Peter Zijlstra 
CC: Xin Li , linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org,
        tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, acme@kernel.org,
        andrew.cooper3@citrix.com, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
        pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com
Subject: =?US-ASCII?Q?Re=3A_=5BRFC_PATCH_v2_21/34=5D_x86/msr=3A_Utiliz?=
 =?US-ASCII?Q?e_the_alternatives_mechanism_to_write_MSR?=
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On April 25, 2025 5:51:27 AM PDT, "J=C3=BCrgen Gro=C3=9F"  wrote:
>On 25=2E04=2E25 14:33, Peter Zijlstra wrote:
>> On Wed, Apr 23, 2025 at 06:05:19PM +0200, J=C3=BCrgen Gro=C3=9F wrote:
>>=20
>>>> It's not a major change, but when it is patched to use the immediate
>>>> form MSR write instruction, it's straightforwardly streamlined=2E
>>>=20
>>> It should be rather easy to switch the current wrmsr/rdmsr paravirt pa=
tching
>>> locations to use the rdmsr/wrmsr instructions instead of doing a call =
to
>>> native_*msr()=2E
>>=20
>> Right, just make the Xen functions asm stubs that expect the instructio=
n
>> registers instead of C-abi and ALT_NOT_XEN the thing=2E
>>=20
>> Shouldn't be hard at all=2E
>
>Correct=2E And for the new immediate form we can use ALTERNATIVE_3()=2E
>
>
>Juergen

Yes; in the ultimate case there are *four* alternatives, but the concept i=
s the same and again we have it implemented already=2E


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Date: Fri, 25 Apr 2025 13:15:24 -0700
From: "H. Peter Anvin" 
To: Arnd Bergmann , Arnd Bergmann ,
        Thomas Gleixner , Ingo Molnar ,
        Borislav Petkov ,
        Dave Hansen , x86@kernel.org
CC: Juergen Gross ,
        Boris Ostrovsky ,
        Alexander Usyskin ,
        Greg Kroah-Hartman ,
        =?UTF-8?Q?Mateusz_Jo=C5=84czyk?= ,
        Mike Rapoport , Ard Biesheuvel ,
        Peter Zijlstra , linux-kernel@vger.kernel.org,
        xen-devel@lists.xenproject.org
Subject: Re: [PATCH] [RFC] x86/cpu: rework instruction set selection
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On April 25, 2025 9:13:31 AM PDT, Arnd Bergmann  wrote:
>On Fri, Apr 25, 2025, at 17:34, H=2E Peter Anvin wrote:
>> On April 25, 2025 7:15:15 AM PDT, Arnd Bergmann  wro=
te:
>>
>> I really don't like testing an unrelated feature (CMOV for PAE);=20
>
>How about a new symbol with the opposite polarity, e=2Eg=2E CONFIG_CPU_58=
6?
>In that case, X86_HAVE_PAE and X86_CMOV could both depend on that
>not being set=2E
>
>I only picked the X86_CMOV symbol because it already exists in =2Econfig
>files, but that is not the important bit here=2E
>
>> furthermore, at least some old hypervisors were known to have
>> broken PAE=2E
>
>I'm not following=2E What does that have to do with my patch?
>
>     Arnd

This seems overly complex to me=2E


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Date: Fri, 25 Apr 2025 13:19:33 -0700 (PDT)
From: Stefano Stabellini 
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To: xen-devel@lists.xenproject.org
cc: sstabellini@kernel.org, Jan Beulich , 
    Andrew Cooper , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
    "Ragiadakou, Xenia" , jason.andryuk@amd.com, 
    agarciav@amd.com
Subject: [PATCH] xen/x86: allow Dom0 PVH to call XENMEM_exchange
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From: Xenia Ragiadakou 

Dom0 PVH might need XENMEM_exchange when passing contiguous memory
addresses to firmware or co-processors not behind an IOMMU.

XENMEM_exchange was blocked for HVM/PVH DomUs, and accidentally it
impacted Dom0 PVH as well.

Permit Dom0 PVH to call XENMEM_exchange while leaving it blocked for
HVM/PVH DomUs.

Signed-off-by: Xenia Ragiadakou 
Signed-off-by: Stefano Stabellini 

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 1cf2365167..e995944333 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -4401,7 +4401,7 @@ int steal_page(
     const struct domain *owner;
     int rc;
 
-    if ( paging_mode_external(d) )
+    if ( paging_mode_external(d) && !is_hardware_domain(d) )
         return -EOPNOTSUPP;
 
     /* Grab a reference to make sure the page doesn't change under our feet */
diff --git a/xen/common/memory.c b/xen/common/memory.c
index 8ca4e1a842..796eec081b 100644
--- a/xen/common/memory.c
+++ b/xen/common/memory.c
@@ -794,7 +794,7 @@ static long memory_exchange(XEN_GUEST_HANDLE_PARAM(xen_memory_exchange_t) arg)
             rc = guest_physmap_add_page(d, _gfn(gpfn), mfn,
                                         exch.out.extent_order) ?: rc;
 
-            if ( !paging_mode_translate(d) &&
+            if ( (!paging_mode_translate(d) || is_hardware_domain(d)) &&
                  __copy_mfn_to_guest_offset(exch.out.extent_start,
                                             (i << out_chunk_order) + j,
                                             mfn) )


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On 2025-04-25 12:51, Ariadne Conill wrote:
> Previously Xen placed the hypercall page at the highest possible MFN,
> but this caused problems on systems where there is more than 36 bits
> of physical address space.
> 
> In general, it also seems unreliable to assume that the highest possible
> MFN is not already reserved for some other purpose.
> 
> Fixes: 620fc734f854 ("x86/hyperv: setup hypercall page")
> Cc: Alejandro Vallejo 
> Cc: Alexander M. Merritt 
> Signed-off-by: Ariadne Conill 
> ---
>   xen/arch/x86/guest/hyperv/hyperv.c            | 39 ++++++++++---------
>   xen/arch/x86/include/asm/fixmap.h             |  3 --
>   xen/arch/x86/include/asm/guest/hyperv-hcall.h | 12 +++---
>   xen/arch/x86/include/asm/guest/hyperv-tlfs.h  |  2 +
>   xen/arch/x86/include/asm/guest/hyperv.h       |  3 --
>   xen/arch/x86/xen.lds.S                        |  4 --
>   6 files changed, 28 insertions(+), 35 deletions(-)
> 
> diff --git a/xen/arch/x86/guest/hyperv/hyperv.c b/xen/arch/x86/guest/hyperv/hyperv.c
> index 6989af38f1..637b4bf335 100644
> --- a/xen/arch/x86/guest/hyperv/hyperv.c
> +++ b/xen/arch/x86/guest/hyperv/hyperv.c

> @@ -98,10 +97,22 @@ static void __init setup_hypercall_page(void)
>       rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
>       if ( !hypercall_msr.enable )
>       {
> -        mfn = HV_HCALL_MFN;
> +        hv_hcall_page = alloc_xenheap_page();
> +        if ( !hv_hcall_page )
> +        {
> +            printk("Hyper-V: Failed to allocate hypercall trampoline page\n");

Minor, but maybe panic() here and avoid changing the return type?

> +            return -ENOMEM;
> +        }
> +
> +        printk("Hyper-V: Allocated hypercall page @ %p.\n", hv_hcall_page);
> +
> +        mfn = virt_to_mfn(hv_hcall_page);
>           hypercall_msr.enable = 1;
>           hypercall_msr.guest_physical_address = mfn;
>           wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
> +
> +        start = (unsigned long) hv_hcall_page;
> +        modify_xen_mappings(start, start + PAGE_SIZE, PAGE_HYPERVISOR_RX);
>       }
>       else
>           mfn = hypercall_msr.guest_physical_address;

> diff --git a/xen/arch/x86/include/asm/guest/hyperv-hcall.h b/xen/arch/x86/include/asm/guest/hyperv-hcall.h
> index b76dbf9ccc..b73edca7c6 100644
> --- a/xen/arch/x86/include/asm/guest/hyperv-hcall.h
> +++ b/xen/arch/x86/include/asm/guest/hyperv-hcall.h
> @@ -20,13 +20,13 @@ static inline uint64_t hv_do_hypercall(uint64_t control, paddr_t input_addr,
>                                          paddr_t output_addr)
>   {
>       uint64_t status;
> -    register unsigned long r8 asm ( "r8" ) = output_addr;
>   
>       /* See TLFS for volatile registers */
> -    asm volatile ( "call hv_hcall_page"
> +    asm volatile ( "mov %[output_addr], %%r8\n"

Don't you need to list r8 as clobbered?  Or maybe just retain the r8 
handling above and below to avoid this mov.

> +                   "call *%[target_addr]"

It might be preferable to retain a direct call which can still be 
installed with __set_fixmap_x.  Otherwise, __set_fixmap_x can be removed

Generally looks good.

Thanks,
Jason

>                      : "=a" (status), "+c" (control),
>                        "+d" (input_addr) ASM_CALL_CONSTRAINT
> -                   : "r" (r8)
> +                   : [output_addr] "r" (output_addr), [target_addr] "r" (hv_hcall_page)
>                      : "memory" );
>   
>       return status;



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Date: Fri, 25 Apr 2025 21:08:46 +0000
To: Stefano Stabellini 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, andrei.cherechesu@nxp.com, michal.orzel@amd.com, jason.andryuk@amd.com
Subject: Re: [PATCH v6] uboot-script-gen: Dynamically compute addr and size when loading binaries
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On Fri, Apr 25, 2025 at 12:40:40PM -0700, Stefano Stabellini wrote:
> From: Andrei Cherechesu 
>=20
> Normally, the Imagebuilder would precompute the sizes of the loaded
> binaries and addresses where they are loaded before generating the
> script, and the sizes and addresses that needed to be provided to
> Xen via /chosen would be hardcoded in the boot script.
>=20
> Added an option via "-s" parameter to avoid hardcoding any
> address in the boot script, and dynamically compute the
> loading addresses for binaries. The first loading address is based
> on the MEMORY_START parameter and after loading each binary,
> the loading address and the size of the binary are stored in
> variables with corresponding names. Then, the loading address
> for the next binary is computed and aligned to 0x200000.
>=20
> If the "-s" parameter is not used, the normal flow is executed,
> where the loading addresses and sizes for each binaries are
> precomputed and hardcoded inside the script, but the loading
> addresses and sizes for each binary are now also stored for eventual
> later use.
>=20
> Reserved memory regions are left TBD in the -s case.
>=20
> Link: https://lists.xenproject.org/archives/html/xen-devel/2022-09/msg018=
62.html
> Signed-off-by: Andrei Cherechesu 
> Signed-off-by: Stefano Stabellini 
> ---
> Changes in v6:
> - make initial ${memaddr} setting depending on CALC
>=20
> This patch adds quite a bit of complexity which is the reason why I
> didn't originally commit it. Now that we are enabling ImageBuilder in
> Yocto, it turns out this patch is required because Yocto invokes
> ImageBuilder before all the binaries are ready and available.
>=20
> Andrei, sorry for taking so long to realize why it is essential, but we
> are getting there now.
>=20
> The changes I made to the original patch are purely to make it simpler
> to maintain.
> ---
>  README.md                |   2 +
>  scripts/uboot-script-gen | 180 ++++++++++++++++++++++++++++++++-------
>  2 files changed, 151 insertions(+), 31 deletions(-)
>=20
> diff --git a/README.md b/README.md
> index f8039ec..28c9e6b 100644
> --- a/README.md
> +++ b/README.md
> @@ -356,6 +356,8 @@ Where:\
>     can only be used  in combination with the -k option.  This adds the
>     public key into the dtb.  Then one can add this dtb back into the
>     u-boot bin or elf.\
> +-s addresses and sizes are calculated dynamically from U-Boot, hence
> +   binaries don't need to be available at the time of invocation.\
>=20
>  ### Signed FIT images
>=20
> diff --git a/scripts/uboot-script-gen b/scripts/uboot-script-gen
> index 638154a..9ec0e20 100755
> --- a/scripts/uboot-script-gen
> +++ b/scripts/uboot-script-gen
> @@ -1,8 +1,11 @@
>  #!/bin/bash

Unrelated, but I think it is worth adding `set -e` and `set -o pipefail`
to the script.

>=20
>  offset=3D$((2*1024*1024))
> +PADDING_MASK=3D`printf "0x%X\n" $(($offset - 1))`
> +PADDING_MASK_INV=3D`printf "0x%X\n" $((~$PADDING_MASK))`

I would use $(...) form for command substitution instead of `...` for
readability, although the script uses both styles already.

>  filesize=3D0
>  prog_req=3D(mkimage file fdtput mktemp awk od)
> +CALC=3D""
>=20
>  function cleanup_and_return_err()
>  {
> @@ -100,17 +103,42 @@ function dt_set()
>      fi
>  }
>=20
> +function dt_set_calc()
> +{
> +    local path=3D$1
> +    local var=3D$2
> +    local name_var=3D$3
> +
> +    addr_var=3D"$name_var"_addr
> +    size_var=3D"$name_var"_size

       ^ I think these two variables should be `local` too.

> +
> +    # Split data_addr_var into high/low
> +    echo "setexpr addr_hi \${"$addr_var"} / 0x100000000" >> $UBOOT_SOURC=
E
> +    echo "setexpr addr_lo \${"$addr_var"} \& 0xFFFFFFFF" >> $UBOOT_SOURC=
E
> +
> +    # Split data_size_var into high/low
> +    echo "setexpr size_hi \${"$size_var"} / 0x100000000" >> $UBOOT_SOURC=
E
> +    echo "setexpr size_lo \${"$size_var"} \& 0xFFFFFFFF" >> $UBOOT_SOURC=
E
> +
> +    echo "fdt set $path $var <0x\${addr_hi} 0x\${addr_lo} 0x\${size_hi} =
0x\${size_lo}>" >> $UBOOT_SOURCE

I think using heredoc will simplify the code a bit, e.g.:

       cat >> $UBOOT_SOURCE <
EOF

> +}
> +
>  function add_device_tree_kernel()
>  {
>      local path=3D$1
> -    local addr=3D$2
> -    local size=3D$3
> -    local bootargs=3D$4
> +    local name=3D$2
> +    local addr=3D$3
> +    local size=3D$4
> +    local bootargs=3D$5
>      local node_name=3D"module@${addr#0x}"
>=20
>      dt_mknode "$path" "$node_name"
>      dt_set "$path/$node_name" "compatible" "str_a" "multiboot,kernel mul=
tiboot,module"
> -    dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $siz=
e)"
> +    if test "$CALC"; then
> +        dt_set_calc "$path/$node_name" "reg" $name
> +    else
> +        dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr =
$size)"
> +    fi
>      dt_set "$path/$node_name" "bootargs" "str" "$bootargs"
>  }
>=20
> @@ -118,26 +146,36 @@ function add_device_tree_kernel()
>  function add_device_tree_ramdisk()
>  {
>      local path=3D$1
> -    local addr=3D$2
> -    local size=3D$3
> +    local name=3D$2
> +    local addr=3D$3
> +    local size=3D$4
>      local node_name=3D"module@${addr#0x}"
>=20
>      dt_mknode "$path"  "$node_name"
>      dt_set "$path/$node_name" "compatible" "str_a" "multiboot,ramdisk mu=
ltiboot,module"
> -    dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $siz=
e)"
> +    if test "$CALC"; then
> +        dt_set_calc "$path/$node_name" "reg" $name
> +    else
> +        dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr =
$size)"
> +    fi
>  }
>=20
>=20
>  function add_device_tree_passthrough()
>  {
>      local path=3D$1
> -    local addr=3D$2
> -    local size=3D$3
> +    local name=3D$2
> +    local addr=3D$3
> +    local size=3D$4
>      local node_name=3D"module@${addr#0x}"
>=20
>      dt_mknode "$path"  "$node_name"
>      dt_set "$path/$node_name" "compatible" "str_a" "multiboot,device-tre=
e multiboot,module"
> -    dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $siz=
e)"
> +    if test "$CALC"; then
> +        dt_set_calc "$path/$node_name" "reg" $name
> +    else
> +        dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr =
$size)"
> +    fi
>  }
>=20
>  function add_device_tree_mem()
> @@ -358,7 +396,11 @@ function xen_device_tree_editing()
>=20
>          dt_mknode "/chosen" "$node_name"
>          dt_set "/chosen/$node_name" "compatible" "str_a" "xen,xsm-policy=
 xen,multiboot-module multiboot,module"
> -        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $xen_=
policy_addr $xen_policy_size)"
> +        if test "$CALC"; then
> +            dt_set_calc "/chosen/$node_name" "reg" "xen_policy"
> +        else
> +            dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $=
xen_policy_addr $xen_policy_size)"
> +        fi
>      fi
>=20
>      if test "$DOM0_KERNEL"
> @@ -367,7 +409,11 @@ function xen_device_tree_editing()
>=20
>          dt_mknode "/chosen" "$node_name"
>          dt_set "/chosen/$node_name" "compatible" "str_a" "xen,linux-zima=
ge xen,multiboot-module multiboot,module"
> -        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $dom0=
_kernel_addr $dom0_kernel_size)"
> +        if test "$CALC"; then
> +            dt_set_calc "/chosen/$node_name" "reg" "dom0_linux"
> +        else
> +            dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $=
dom0_kernel_addr $dom0_kernel_size)"
> +        fi
>          dt_set "/chosen" "xen,dom0-bootargs" "str" "$DOM0_CMD"
>      fi
>=20
> @@ -377,7 +423,11 @@ function xen_device_tree_editing()
>=20
>          dt_mknode "/chosen" "$node_name"
>          dt_set "/chosen/$node_name" "compatible" "str_a" "xen,linux-init=
rd xen,multiboot-module multiboot,module"
> -        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $ramd=
isk_addr $ramdisk_size)"
> +        if test "$CALC"; then
> +            dt_set_calc "/chosen/$node_name" "reg" "dom0_ramdisk"
> +        else
> +            dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $=
ramdisk_addr $ramdisk_size)"
> +        fi
>      fi
>=20
>      i=3D0
> @@ -464,14 +514,14 @@ function xen_device_tree_editing()
>=20
>          xen_dt_domu_add_vcpu_nodes "/chosen/domU$i" $i ${DOMU_VCPUS[$i]}
>=20
> -        add_device_tree_kernel "/chosen/domU$i" ${domU_kernel_addr[$i]} =
${domU_kernel_size[$i]} "${DOMU_CMD[$i]}"
> +        add_device_tree_kernel "/chosen/domU$i" "domU${i}_kernel" ${domU=
_kernel_addr[$i]} ${domU_kernel_size[$i]} "${DOMU_CMD[$i]}"
>          if test "${domU_ramdisk_addr[$i]}"
>          then
> -            add_device_tree_ramdisk "/chosen/domU$i" ${domU_ramdisk_addr=
[$i]} ${domU_ramdisk_size[$i]}
> +            add_device_tree_ramdisk "/chosen/domU$i" "domU${i}_ramdisk" =
${domU_ramdisk_addr[$i]} ${domU_ramdisk_size[$i]}
>          fi
>          if test "${domU_passthrough_dtb_addr[$i]}"
>          then
> -            add_device_tree_passthrough "/chosen/domU$i" ${domU_passthro=
ugh_dtb_addr[$i]} ${domU_passthrough_dtb_size[$i]}
> +            add_device_tree_passthrough "/chosen/domU$i" "domU${i}_fdt" =
${domU_passthrough_dtb_addr[$i]} ${domU_passthrough_dtb_size[$i]}
>          fi
>          i=3D$(( $i + 1 ))
>      done
> @@ -504,7 +554,11 @@ function device_tree_editing()
>=20
>      if test $UBOOT_SOURCE
>      then
> -        echo "fdt addr $device_tree_addr" >> $UBOOT_SOURCE
> +        if test "$CALC"; then
> +            echo "fdt addr \${host_fdt_addr}" >> $UBOOT_SOURCE
> +        else
> +            echo "fdt addr $device_tree_addr" >> $UBOOT_SOURCE
> +        fi
>          echo "fdt resize 1024" >> $UBOOT_SOURCE
>=20
>          if test $NUM_DT_OVERLAY && test $NUM_DT_OVERLAY -gt 0
> @@ -512,7 +566,11 @@ function device_tree_editing()
>              i=3D0
>              while test $i -lt $NUM_DT_OVERLAY
>              do
> -                echo "fdt apply ${dt_overlay_addr[$i]}" >> $UBOOT_SOURCE
> +                if test "$CALC"; then
> +                    echo "fdt apply \${host_fdto${i}_addr}" >> $UBOOT_SO=
URCE
> +                else
> +                    echo "fdt apply ${dt_overlay_addr[$i]}" >> $UBOOT_SO=
URCE
> +                fi
>                  i=3D$(( $i + 1 ))
>              done
>          fi
> @@ -530,8 +588,12 @@ function fill_reserved_spaces_from_dtb()
>  {
>      if [ ! -f $DEVICE_TREE ]
>      then
> -        echo "File $DEVICE_TREE doesn't exist, exiting";
> -        cleanup_and_return_err
> +        if test "$CALC"; then
> +            return
> +        else
> +            echo "File $DEVICE_TREE doesn't exist, exiting";
> +            cleanup_and_return_err
> +        fi
>      fi
>=20
>      # Check if reserved-memory node exists
> @@ -613,7 +675,7 @@ function get_image_size()
>      printf "%u" $effective_size
>  }
>=20
> -function add_size()
> +function add_size_from_file()
>  {
>      local filename=3D$1
>      local size=3D`stat -L --printf=3D"%s" $filename`
> @@ -645,6 +707,24 @@ function add_size()
>      filesize=3D$size
>  }
>=20
> +function add_size_calculate()
> +{
> +    local fit_scr_name=3D$1
> +
> +    echo "setenv "$fit_scr_name"_addr \${memaddr}" >> $UBOOT_SOURCE
> +    echo "setenv "$fit_scr_name"_size \${filesize}" >> $UBOOT_SOURCE
> +    echo "setexpr memaddr \${memaddr} \+ \${filesize}" >> $UBOOT_SOURCE
> +    echo "setexpr memaddr \${memaddr} \+ $PADDING_MASK" >> $UBOOT_SOURCE
> +    echo "setexpr memaddr \${memaddr} \& $PADDING_MASK_INV" >> $UBOOT_SO=
URCE
> +
> +    # TODO: missing ${RESERVED_MEM_SPACES[@]} check
> +
> +    # The following are updated to avoid collisions in node names, but
> +    # they are not actively used.
> +    memaddr=3D$((memaddr + offset))
> +    filesize=3D$offset
> +}
> +
>  function load_file()
>  {
>      local filename=3D$1
> @@ -657,10 +737,16 @@ function load_file()
>      if test "$FIT"
>      then
>          echo "imxtract \$fit_addr $fit_scr_name $memaddr" >> $UBOOT_SOUR=
CE
> +        add_size_from_file $filename
>      else
> -        echo "$LOAD_CMD $memaddr ${prepend_path:+$prepend_path/}$relativ=
e_path" >> $UBOOT_SOURCE
> +        if test "$CALC"; then
> +            echo "$LOAD_CMD \${memaddr} ${prepend_path:+$prepend_path/}$=
relative_path" >> $UBOOT_SOURCE
> +            add_size_calculate $fit_scr_name
> +        else
> +            echo "$LOAD_CMD $memaddr ${prepend_path:+$prepend_path/}$rel=
ative_path" >> $UBOOT_SOURCE
> +            add_size_from_file $filename
> +        fi
>      fi
> -    add_size $filename
>  }
>=20
>  function check_file_type()
> @@ -670,8 +756,13 @@ function check_file_type()
>=20
>      if [ ! -f $filename ]
>      then
> -        echo "File $filename doesn't exist, exiting";
> -        cleanup_and_return_err
> +        if test "$CALC"
> +        then
> +            return
> +        else
> +            echo "File $filename doesn't exist, exiting";
> +            cleanup_and_return_err
> +        fi
>      fi
>=20
>      # if file doesn't know what it is, it outputs data, so include that
> @@ -705,8 +796,13 @@ function check_compressed_file_type()
>=20
>      if [ ! -f $filename ]
>      then
> -        echo "File $filename doesn't exist, exiting";
> -        cleanup_and_return_err
> +        if test "$CALC"
> +        then
> +            return
> +        else
> +            echo "File $filename doesn't exist, exiting";
> +            cleanup_and_return_err
> +        fi
>      fi
>=20
>      file_type=3D$( file -L $filename )
> @@ -872,6 +968,12 @@ function linux_config()
>  generate_uboot_images()
>  {
>      local arch=3D$(file -L $XEN | grep -E 'ARM64|Aarch64')
> +
> +    if test "$CALC"
> +    then
> +        echo "bootm is not compatible with -s"
> +        cleanup_and_return_err
> +    fi
>=20
>      if test "$arch"
>      then
> @@ -997,7 +1099,11 @@ bitstream_load_and_config()
>          if test "$UBOOT_SOURCE"
>          then
>              # we assume the FPGA device is 0 here
> -            echo "fpga load 0 $bitstream_addr $bitstream_size" >> "$UBOO=
T_SOURCE"
> +            if test "$CALC"; then
> +                echo "fpga load 0 \${fpga_bitstream_addr} \${fpga_bitstr=
eam_size}" >> "$UBOOT_SOURCE"
> +            else
> +                echo "fpga load 0 $bitstream_addr $bitstream_size" >> "$=
UBOOT_SOURCE"
> +            fi
>          fi
>      fi
>  }
> @@ -1271,7 +1377,7 @@ function print_help
>  {
>      script=3D`basename "$0"`
>      echo "usage:"
> -    echo "=09$script -c CONFIG_FILE -d DIRECTORY [-t LOAD_CMD] [-o FILE]=
 [-k KEY_DIR/HINT [-u U-BOOT_DTB]] [-e] [-f] [-p PREPEND_PATH]"
> +    echo "=09$script -c CONFIG_FILE -d DIRECTORY [-t LOAD_CMD] [-o FILE]=
 [-k KEY_DIR/HINT [-u U-BOOT_DTB]] [-e] [-f] [-p PREPEND_PATH] [-s]"
>      echo "=09$script -h"
>      echo "where:"
>      echo "=09CONFIG_FILE - configuration file"
> @@ -1288,6 +1394,7 @@ function print_help
>      echo "=09U-BOOT_DTB - u-boot control dtb so that the public key gets=
 added to it"
>      echo "=09-f - enable generating a FIT image"
>      echo "=09PREPEND_PATH - path to be appended before file names to mat=
ch deploy location within rootfs"
> +    echo "=09-s - enable dynamic loading of binaries by storing their ad=
dresses and sizes u-boot env variables"

I would update description to something like:
 =20
  let U-Boot calculate binary images load addresses/sizes dynamically

?

Also, I would make all options sorted alphabetically.

>      echo "=09-h - prints out the help message and exits "
>      echo "Defaults:"
>      echo "=09CONFIG_FILE=3D$cfg_file, UBOOT_TYPE=3D\"LOAD_CMD\" env var,=
 DIRECTORY=3D$uboot_dir"
> @@ -1295,7 +1402,7 @@ function print_help
>      echo "=09$script -c ../config -d ./build42 -t \"scsi load 1:1\""
>  }
>=20
> -while getopts ":c:t:d:ho:k:u:fp:" opt; do
> +while getopts ":c:t:d:ho:k:u:fp:s" opt; do
>      case ${opt} in
>      t )
>          case $OPTARG in
> @@ -1340,6 +1447,9 @@ while getopts ":c:t:d:ho:k:u:fp:" opt; do
>      p )
>          prepend_path=3D"$OPTARG"
>          ;;
> +    s )
> +        CALC=3Dy
> +        ;;
>      h )
>          print_help
>          exit 0
> @@ -1533,6 +1643,10 @@ uboot_addr=3D$memaddr
>  # 2MB are enough for a uboot script
>  memaddr=3D$(( $memaddr + $offset ))
>  memaddr=3D`printf "0x%X\n" $memaddr`
> +if test "$CALC"
> +then
> +    echo "setenv memaddr $memaddr" >> $UBOOT_SOURCE
> +fi
>=20
>  fill_reserved_spaces_from_dtb
>=20
> @@ -1583,7 +1697,11 @@ fi
>=20
>  if [ "$BOOT_CMD" !=3D "none" ]
>  then
> -    echo "$BOOT_CMD $kernel_addr $([ "$BOOT_CMD" =3D "bootefi" ] || echo=
 '-') $device_tree_addr" >> $UBOOT_SOURCE
> +    if test "$CALC"; then
> +        echo "$BOOT_CMD \${host_kernel_addr} $([ "$BOOT_CMD" =3D "bootef=
i" ] || echo '-') \${host_fdt_addr}" >> $UBOOT_SOURCE
> +    else
> +        echo "$BOOT_CMD $kernel_addr $([ "$BOOT_CMD" =3D "bootefi" ] || =
echo '-') $device_tree_addr" >> $UBOOT_SOURCE
> +    fi
>  else
>      # skip boot command but store load addresses to be used later
>      echo "setenv host_kernel_addr $kernel_addr" >> $UBOOT_SOURCE
> --
> 2.25.1
>=20
>=20



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Message-ID: 
Date: Fri, 25 Apr 2025 18:03:30 -0400
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [RFC 03/38] x86/hyperlaunch: convert max vcpu determination to
 domain builder
Content-Language: en-US
To: Jason Andryuk , xen-devel@lists.xenproject.org
Cc: stefano.stabellini@amd.com, agarciav@amd.com,
 Jan Beulich , Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
References: <20250419220820.4234-1-dpsmith@apertussolutions.com>
 <20250419220820.4234-4-dpsmith@apertussolutions.com>
 
From: "Daniel P. Smith" 
Autocrypt: addr=dpsmith@apertussolutions.com; keydata=
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On 4/22/25 16:36, Jason Andryuk wrote:
> On 2025-04-19 18:07, Daniel P. Smith wrote:
>> The domain configuration may request more vcpus than are present in 
>> the system.
>> For dom0, the function dom0_max_vcpus() was used to clamp down to 
>> physically
>> available vcpus. Here we are introducing a generalized version,
>> dom_max_vcpus(), that takes a boot domain and sets the max vcpus based 
>> on the
>> lesser of the requested max and the available vcpus.
>>
>> Signed-off-by: Daniel P. Smith 
>> ---
> 
>> diff --git a/xen/arch/x86/domain-builder/domain.c b/xen/arch/x86/ 
>> domain-builder/domain.c
>> new file mode 100644
>> index 000000000000..f2277b9e3cf3
>> --- /dev/null
>> +++ b/xen/arch/x86/domain-builder/domain.c
>> @@ -0,0 +1,38 @@
>> +/* SPDX-License-Identifier: GPL-2.0-only */
>> +/*
>> + * Copyright (C) 2024, Apertus Solutions, LLC
>> + */
>> +
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +
>> +#include 
>> +
>> +unsigned int __init dom_max_vcpus(struct boot_domain *bd)
>> +{
>> +    unsigned int limit = bd->mode & BUILD_MODE_PARAVIRT ?
>> +                                    MAX_VIRT_CPUS : HVM_MAX_VCPUS;
>> +
>> +    if ( bd->capabilities & BUILD_CAPS_CONTROL )
> 
> I added xen/include/public/bootfdt.h with DOMAIN_CAPS_CONTROL and the 
> other capabilities to provide common values.
> 
>> +        limit = dom0_max_vcpus();
> 
> dom0_max_vcpus() applies Xen's dom0_max_vcpus command line option.  That 
> is desirable for a traditional dom0.  For a disaggregated, Hyperlaunch 
> system, I'm not sure it's appropriate.  Considering there can multiple 
> control domains, it's more questionable.
> 
> Might it be better to only apply Xen "dom0" command line options to non- 
> hyperlaunch dom0?  Or a domain with all of BUILD_CAPS_CONTROL/HARDWARE/ 
> XENSTORE?
> 
> I guess it could stay as-is, but it seems unusual.

The larger issue is that the cmdline params are going to need to be 
addressed. I see three approaches, first would be to only apply the 
params when there is a single domain with ctrl/hw/xs all set, or the 
second approach would be to change the params to support multiple domain 
statements. Though the second approach has the issue of the need to 
decide how to support the legacy params

v/r,
dps


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Subject: Re: [RFC 04/38] x86/hyperlaunch: convert vcpu0 creation to domain
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To: Alejandro Vallejo , xen-devel@lists.xenproject.org
Cc: jason.andryuk@amd.com, stefano.stabellini@amd.com,
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On 4/25/25 11:22, Alejandro Vallejo wrote:
> On Sat Apr 19, 2025 at 11:07 PM BST, Daniel P. Smith wrote:
>> Convert alloc_dom0_vcpu0() to dom0_set_affinity(), making it only set up the
>> node affinity based on command line parameters passed. At the same time,
>> introduce alloc_dom_vcpu0() as the replacement for alloc_dom0_vcpu(). Then have
>> alloc_dom_vcpu0() call dom0_set_affinity() when the boot domain is the control
>> domain, otherwise set the affinity to auto.
>>
>> Signed-off-by: Daniel P. Smith 
>> ---
>>   xen/arch/x86/dom0_build.c                 |  4 +---
>>   xen/arch/x86/domain-builder/domain.c      | 11 +++++++++++
>>   xen/arch/x86/include/asm/dom0_build.h     |  2 ++
>>   xen/arch/x86/include/asm/domain-builder.h |  1 +
>>   xen/arch/x86/setup.c                      |  5 +++--
>>   5 files changed, 18 insertions(+), 5 deletions(-)
>>
>> diff --git a/xen/arch/x86/domain-builder/domain.c b/xen/arch/x86/domain-builder/domain.c
>> index f2277b9e3cf3..619d36ea0b87 100644
>> --- a/xen/arch/x86/domain-builder/domain.c
>> +++ b/xen/arch/x86/domain-builder/domain.c
>> @@ -9,6 +9,7 @@
>>   #include 
>>   
>>   #include 
>> +#include 
>>   
>>   unsigned int __init dom_max_vcpus(struct boot_domain *bd)
>>   {
>> @@ -27,6 +28,16 @@ unsigned int __init dom_max_vcpus(struct boot_domain *bd)
>>       return bd->max_vcpus;
>>   }
>>   
>> +struct vcpu *__init alloc_dom_vcpu0(struct boot_domain *bd)
>> +{
>> +    if ( bd->capabilities & BUILD_CAPS_CONTROL )
>> +        dom0_set_affinity(bd->d);
> 
> Similar as before, this probably wants to be DOMAIN_CAPS_HARDWARE?
> 
> I'll adjust while rebasing.

Does it?

v/r,
dps



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On 4/20/25 05:36, Jürgen Groß wrote:
> On 20.04.25 00:07, Daniel P. Smith wrote:
>> Relocated the function sched_setup_dom0_vcpus(), which was protected 
>> by an
>> ifdef CONFIG_X86, from common/sched to the hyperlaunch domain builder. 
>> Rename
>> it to alloc_dom_vcpus() to better reflect the purpose of the function.
> 
> I'd be in favor naming it domain_vcpus_create().

I would add that since that name came was based on the function name 
alloc_dom_vpcu0(), I have also switched it so that both follow that scheme.

v/r,
dps



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Subject: Re: [RFC 32/38] x86/hyperlaunch: introduce concept of core domains
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To: Jason Andryuk , xen-devel@lists.xenproject.org
Cc: stefano.stabellini@amd.com, agarciav@amd.com,
 Jan Beulich , Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
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From: "Daniel P. Smith" 
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On 4/23/25 15:50, Jason Andryuk wrote:
> On 2025-04-19 18:08, Daniel P. Smith wrote:
>> When constructing domU, and specifically the event channels for their 
>> console
>> and xenstore event channels, the domid for the backing domain must be 
>> known.
>> Therefore, the control, hardware, and xenstore domains are deemed as core
>> domains, and must be constructed before any of the other domains.
>>
>> This commit introduces the build_core_domains() function that will 
>> ensure the
>> core domains are constructed first.
>>
>> Signed-off-by: Daniel P. Smith 
>> ---
>>   xen/arch/x86/domain-builder/core.c     | 68 ++++++++++++++++++++++++--
>>   xen/arch/x86/include/asm/boot-domain.h |  2 +
>>   2 files changed, 66 insertions(+), 4 deletions(-)
>>
>> diff --git a/xen/arch/x86/domain-builder/core.c b/xen/arch/x86/domain- 
>> builder/core.c
>> index 901efce62a61..f693aa46d278 100644
>> --- a/xen/arch/x86/domain-builder/core.c
>> +++ b/xen/arch/x86/domain-builder/core.c
>> @@ -103,18 +103,78 @@ void __init builder_init(struct boot_info *bi)
>>       }
>>   }
>> +static int  __init build_core_domains(struct boot_info *bi)
>> +{
>> +    int count = 0;
>> +    struct boot_domain *bd;
>> +    int hw, cd, xs;
>> +
>> +    cd = first_boot_domain_index(bi, BUILD_CAPS_CONTROL);
> 
>> +    hw = first_boot_domain_index(bi, BUILD_CAPS_HARDWARE);
> 
>> +    xs = first_boot_domain_index(bi, BUILD_CAPS_XENSTORE);
> 
> This order has issues if you actually have disaggregated domains.
> 
> Control and Hardware depend on Xenstore for Xenstore.
> 
> Control and Xenstore depend on Hardware for console support.
> 
> I re-worked the xenstore allocation to run after domain creation.  I've 
> upstreamed that for dom0less (and ARM doesn't have to deal with consoles).
> 
> So if xenstore allocation is moved later, Hardware, Xenstore, then 
> Control works.  But xenstore and console could both be handled after the 
> fact and then the construction order doesn't matter.  The backend domid 
> is needed to construct the event channel and grant entry.  With assigned 
> domids, alloc_store_evtchn()/alloc_console_evtchn() can operate on the 
> domids instead of expecting the domain to have been constructed.

Actually, there is a larger issue here and this is going to be reworked.

V/r,
dps


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Subject: Re: [RFC 33/38] x86/boot: refactor bzimage parser to be re-enterant
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To: Jason Andryuk , xen-devel@lists.xenproject.org
Cc: stefano.stabellini@amd.com, agarciav@amd.com,
 Jan Beulich , Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
References: <20250419220820.4234-1-dpsmith@apertussolutions.com>
 <20250419220820.4234-34-dpsmith@apertussolutions.com>
 
From: "Daniel P. Smith" 
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On 4/23/25 15:27, Jason Andryuk wrote:
> On 2025-04-19 18:08, Daniel P. Smith wrote:
>> The bzimage logic uses the unit global orig_image_len to hold the 
>> original
>> module length for the kernel when the headroom is calculated. It then 
>> uses
>> orig_image_len to locate the start of the bzimage when the expansion 
>> is done.
>> This is an issue when more than one bzimage is processed by the headroom
>> calculation logic, as it will leave orig_image_len set to the length 
>> of the
>> last bzimage it processed.
>>
>> The boot module work introduced storing the headroom size on a per module
>> basis. By passing in the headroom from the boot module, orig_image_len 
>> is no
>> longer needed to locate the beginning of the bzimage after the allocated
>> headroom. The bzimage functions are reworked as such, allowing the 
>> removal of
>> orig_image_len and enabling them to be reused by multiple kernel boot 
>> modules.
>>
>> Signed-off-by: Daniel P. Smith 
>> ---
>>   xen/arch/x86/bzimage.c             | 38 ++++++++++++++++++------------
>>   xen/arch/x86/hvm/dom_build.c       |  3 ++-
>>   xen/arch/x86/include/asm/bzimage.h |  5 ++--
>>   xen/arch/x86/pv/dom0_build.c       |  3 ++-
>>   4 files changed, 30 insertions(+), 19 deletions(-)
>>
>> diff --git a/xen/arch/x86/bzimage.c b/xen/arch/x86/bzimage.c
>> index 66f648f311e4..32f0360d25b4 100644
> 
>> @@ -103,13 +100,20 @@ unsigned long __init bzimage_headroom(void 
>> *image_start,
>>       return headroom;
>>   }
>> -int __init bzimage_parse(void *image_base, void **image_start,
>> -                         unsigned long *image_len)
>> +int __init bzimage_parse(
>> +    void *image_base, void **image_start, unsigned long headroom,
>> +    unsigned long *image_len)
>>   {
>>       struct setup_header *hdr = (struct setup_header *)(*image_start);
>>       int err = bzimage_check(hdr, *image_len);
>> -    unsigned long output_len;
>> -
>> +    unsigned long module_len = *image_len;
>> +
>> +    /*
>> +     * Variable err will have one of three values:
>> +     *   -  < 0: a error occurred trying to inspect the contents
>> +     *   -  > 0: the image is a bzImage
>> +     *   - == 0: not a bzImage, could be raw elf or elf.gz (vmlinuz.gz)
>> +     */
> 
> This comment seems a little independent of this change, so maybe it 
> should be submitted separately.  Also, I think a better placement would 
> be next to bzimage_check().
> 
>>       if ( err < 0 )
>>           return err;
>> @@ -118,21 +122,25 @@ int __init bzimage_parse(void *image_base, void 
>> **image_start,
>>           *image_start += (hdr->setup_sects + 1) * 512 + hdr- 
>> >payload_offset;
>>           *image_len = hdr->payload_length;
> 
> @here
> 
>>       }
>> -
>> -    if ( elf_is_elfbinary(*image_start, *image_len) )
>> -        return 0;
>> +    else
>> +    {
>> +        if ( elf_is_elfbinary(*image_start, *image_len) )
>> +            return 0;
>> +        else
>> +            *image_len = *image_len - headroom;
>> +    }
> 
> I don't like this extra indention which includes the return.  If you 
> retain orig_image_len as a local variable, and set it above at "@here", 
> you can have a smaller diff and leave cleaner logic.
> 
> orig_image_len previously was set as a static variable, so the correct
> value was set after bzimage_headroom.  Now that it is no longer static,
> we need to grab the hdr->payload_length value when we have a bzImage.
> Otherwise output_length will read past the end of the module.
> 
> Below is the diff for bzimage.c with the change I suggest.
> 

I will review it again when as I rebase it.

v/r,
dps


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Date: Fri, 25 Apr 2025 15:18:40 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: dmkhn@proton.me
cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, 
    anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, 
    michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, 
    dmukhin@ford.com
Subject: Re: [PATCH v1 1/3] xen/console: cleanup conring management
In-Reply-To: <20250403000604.169619-2-dmukhin@ford.com>
Message-ID: 
References: <20250403000604.169619-1-dmukhin@ford.com> <20250403000604.169619-2-dmukhin@ford.com>
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On Thu, 3 Apr 2025, dmkhn@proton.me wrote:
> From: Denis Mukhin 
> 
> Move console_locks_busted handling inside conring_puts() to remove
> tasklet code duplication.
> 
> Signed-off-by: Denis Mukhin 

This patch is a good cleanup but makes one functional change: previously
guest_console_write would always call tasklet_schedule. Now, it only
calls tasklet_schedule if !console_locks_busted.

On ARM, we don't call console_force_unlock and never set
console_locks_busted. It makes no difference.

On x86, there are a few callers of console_force_unlock, so it would
make a difference. However, looking at the callers, it seems to me that
the change is for the better and better aligns the code with the
intention behind console_force_unlock.

On my side:
Reviewed-by: Stefano Stabellini 

but it would be good for an x86 maintainer to confirm


> ---
>  xen/drivers/char/console.c | 29 ++++++++++++++---------------
>  1 file changed, 14 insertions(+), 15 deletions(-)
> 
> diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c
> index c3150fbdb7..aaa97088aa 100644
> --- a/xen/drivers/char/console.c
> +++ b/xen/drivers/char/console.c
> @@ -325,6 +325,17 @@ static void cf_check do_dec_thresh(unsigned char key, bool unused)
>   * ********************************************************
>   */
>  
> +static void cf_check notify_dom0_con_ring(void *unused)
> +{
> +    send_global_virq(VIRQ_CON_RING);
> +}
> +
> +static DECLARE_SOFTIRQ_TASKLET(notify_dom0_con_ring_tasklet,
> +                               notify_dom0_con_ring,
> +                               NULL);
> +
> +static bool console_locks_busted;
> +
>  static void conring_puts(const char *str, size_t len)
>  {
>      ASSERT(rspin_is_locked(&console_lock));
> @@ -334,6 +345,9 @@ static void conring_puts(const char *str, size_t len)
>  
>      if ( conringp - conringc > conring_size )
>          conringc = conringp - conring_size;
> +
> +    if ( !console_locks_busted )
> +        tasklet_schedule(¬ify_dom0_con_ring_tasklet);
>  }
>  
>  long read_console_ring(struct xen_sysctl_readconsole *op)
> @@ -594,13 +608,6 @@ static void cf_check serial_rx(char c)
>      __serial_rx(c);
>  }
>  
> -static void cf_check notify_dom0_con_ring(void *unused)
> -{
> -    send_global_virq(VIRQ_CON_RING);
> -}
> -static DECLARE_SOFTIRQ_TASKLET(notify_dom0_con_ring_tasklet,
> -                               notify_dom0_con_ring, NULL);
> -
>  #ifdef CONFIG_X86
>  static inline void xen_console_write_debug_port(const char *buf, size_t len)
>  {
> @@ -648,10 +655,7 @@ static long guest_console_write(XEN_GUEST_HANDLE_PARAM(char) buffer,
>  #endif
>  
>              if ( opt_console_to_ring )
> -            {
>                  conring_puts(kbuf, kcount);
> -                tasklet_schedule(¬ify_dom0_con_ring_tasklet);
> -            }
>  
>              nrspin_unlock_irq(&console_lock);
>          }
> @@ -753,8 +757,6 @@ long do_console_io(
>   * *****************************************************
>   */
>  
> -static bool console_locks_busted;
> -
>  static void __putstr(const char *str)
>  {
>      size_t len = strlen(str);
> @@ -775,9 +777,6 @@ static void __putstr(const char *str)
>  #endif
>  
>      conring_puts(str, len);
> -
> -    if ( !console_locks_busted )
> -        tasklet_schedule(¬ify_dom0_con_ring_tasklet);
>  }
>  
>  static int printk_prefix_check(char *p, char **pp)
> -- 
> 2.34.1
> 
> 


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Subject: Re: [PATCH] x86/hyperv: use dynamically allocated page for hypercalls
Date: Fri, 25 Apr 2025 15:26:33 -0700
In-Reply-To: <9f7ffd79-7439-40f3-9349-4f9f4d2ee1dd@amd.com>
Cc: xen-devel@lists.xenproject.org,
 Paul Durrant ,
 Jan Beulich ,
 Andrew Cooper ,
 =?utf-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Alejandro Vallejo ,
 "Alexander M . Merritt" 
To: Jason Andryuk 
References: <20250425165148.60408-1-ariadne@ariadne.space>
 <9f7ffd79-7439-40f3-9349-4f9f4d2ee1dd@amd.com>
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Hi,

> On Apr 25, 2025, at 2:02=E2=80=AFPM, Jason Andryuk =
 wrote:
>=20
> On 2025-04-25 12:51, Ariadne Conill wrote:
>> Previously Xen placed the hypercall page at the highest possible MFN,
>> but this caused problems on systems where there is more than 36 bits
>> of physical address space.
>> In general, it also seems unreliable to assume that the highest =
possible
>> MFN is not already reserved for some other purpose.
>> Fixes: 620fc734f854 ("x86/hyperv: setup hypercall page")
>> Cc: Alejandro Vallejo 
>> Cc: Alexander M. Merritt 
>> Signed-off-by: Ariadne Conill 
>> ---
>>  xen/arch/x86/guest/hyperv/hyperv.c            | 39 =
++++++++++---------
>>  xen/arch/x86/include/asm/fixmap.h             |  3 --
>>  xen/arch/x86/include/asm/guest/hyperv-hcall.h | 12 +++---
>>  xen/arch/x86/include/asm/guest/hyperv-tlfs.h  |  2 +
>>  xen/arch/x86/include/asm/guest/hyperv.h       |  3 --
>>  xen/arch/x86/xen.lds.S                        |  4 --
>>  6 files changed, 28 insertions(+), 35 deletions(-)
>> diff --git a/xen/arch/x86/guest/hyperv/hyperv.c =
b/xen/arch/x86/guest/hyperv/hyperv.c
>> index 6989af38f1..637b4bf335 100644
>> --- a/xen/arch/x86/guest/hyperv/hyperv.c
>> +++ b/xen/arch/x86/guest/hyperv/hyperv.c
>=20
>> @@ -98,10 +97,22 @@ static void __init setup_hypercall_page(void)
>>      rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
>>      if ( !hypercall_msr.enable )
>>      {
>> -        mfn =3D HV_HCALL_MFN;
>> +        hv_hcall_page =3D alloc_xenheap_page();
>> +        if ( !hv_hcall_page )
>> +        {
>> +            printk("Hyper-V: Failed to allocate hypercall trampoline =
page\n");
>=20
> Minor, but maybe panic() here and avoid changing the return type?

Sure, can do that.

>=20
>> +            return -ENOMEM;
>> +        }
>> +
>> +        printk("Hyper-V: Allocated hypercall page @ %p.\n", =
hv_hcall_page);
>> +
>> +        mfn =3D virt_to_mfn(hv_hcall_page);
>>          hypercall_msr.enable =3D 1;
>>          hypercall_msr.guest_physical_address =3D mfn;
>>          wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
>> +
>> +        start =3D (unsigned long) hv_hcall_page;
>> +        modify_xen_mappings(start, start + PAGE_SIZE, =
PAGE_HYPERVISOR_RX);
>>      }
>>      else
>>          mfn =3D hypercall_msr.guest_physical_address;
>=20
>> diff --git a/xen/arch/x86/include/asm/guest/hyperv-hcall.h =
b/xen/arch/x86/include/asm/guest/hyperv-hcall.h
>> index b76dbf9ccc..b73edca7c6 100644
>> --- a/xen/arch/x86/include/asm/guest/hyperv-hcall.h
>> +++ b/xen/arch/x86/include/asm/guest/hyperv-hcall.h
>> @@ -20,13 +20,13 @@ static inline uint64_t hv_do_hypercall(uint64_t =
control, paddr_t input_addr,
>>                                         paddr_t output_addr)
>>  {
>>      uint64_t status;
>> -    register unsigned long r8 asm ( "r8" ) =3D output_addr;
>>        /* See TLFS for volatile registers */
>> -    asm volatile ( "call hv_hcall_page"
>> +    asm volatile ( "mov %[output_addr], %%r8\n"
>=20
> Don't you need to list r8 as clobbered?  Or maybe just retain the r8 =
handling above and below to avoid this mov.

This can probably mostly be reverted if we get the fixmap working.

The issue we were facing before was a situation where calling =
hv_hcall_page directly resulted in a page fault due to NX-bit being set =
on the page.

>> +                   "call *%[target_addr]"
>=20
> It might be preferable to retain a direct call which can still be =
installed with __set_fixmap_x.  Otherwise, __set_fixmap_x can be removed

I think we should use fixmap, I just need to figure out what that looks =
like.

Will send v2 patch on Monday.

Ariadne=

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Content-Type: text/html;
	charset=utf-8

Hi,

On =
Apr 25, 2025, at 2:02=E2=80=AFPM, Jason Andryuk =
<jason.andryuk@amd.com> wrote:

On 2025-04-25 12:51, Ariadne Conill =
wrote:
Previously Xen placed the hypercall page at the =
highest possible MFN,
but this caused problems on systems where there =
is more than 36 bits
of physical address space.
In general, it =
also seems unreliable to assume that the highest possible
MFN is not =
already reserved for some other purpose.
Fixes: 620fc734f854 =
("x86/hyperv: setup hypercall page")
Cc: Alejandro Vallejo =
<agarciav@amd.com>
Cc: Alexander M. Merritt =
<alexander@edera.dev>
Signed-off-by: Ariadne Conill =
<ariadne@ariadne.space>
---
 xen/arch/x86/guest/hyperv/hy=
perv.c =
           | 39 =
++++++++++---------
 xen/arch/x86/include/asm/fixmap.h =
            | =
 3 --
 xen/arch/x86/include/asm/guest/hyperv-hcall.h | 12 =
+++---
 xen/arch/x86/include/asm/guest/hyperv-tlfs.h  | =
 2 +
 xen/arch/x86/include/asm/guest/hyperv.h =
      |  3 =
--
 xen/arch/x86/xen.lds.S =
            &n=
bsp;          | =
 4 --
 6 files changed, 28 insertions(+), 35 =
deletions(-)
diff --git a/xen/arch/x86/guest/hyperv/hyperv.c =
b/xen/arch/x86/guest/hyperv/hyperv.c
index 6989af38f1..637b4bf335 =
100644
--- a/xen/arch/x86/guest/hyperv/hyperv.c
+++ =
b/xen/arch/x86/guest/hyperv/hyperv.c

@@ -98,10 +97,22 @@ static void __init =
setup_hypercall_page(void)
     rdmsrl(HV_X64_=
MSR_HYPERCALL, =
hypercall_msr.as_uint64);
     if ( =
!hypercall_msr.enable )
     {
- =
       mfn =3D HV_HCALL_MFN;
+ =
       hv_hcall_page =3D =
alloc_xenheap_page();
+        if =
( !hv_hcall_page )
+        {
+ =
           printk("=
Hyper-V: Failed to allocate hypercall trampoline =
page\n");

Minor, =
but maybe panic() here and avoid changing the return type?

Sure, can do =
that.


+ =
           return =
-ENOMEM;
+        }
+
+ =
       printk("Hyper-V: Allocated =
hypercall page @ %p.\n", hv_hcall_page);
+
+ =
       mfn =3D =
virt_to_mfn(hv_hcall_page);
       &=
nbsp; hypercall_msr.enable =3D =
1;
         hypercall_msr.=
guest_physical_address =3D =
mfn;
         wrmsrl(HV_X6=
4_MSR_HYPERCALL, hypercall_msr.as_uint64);
+
+ =
       start =3D (unsigned long) =
hv_hcall_page;
+ =
       modify_xen_mappings(start, =
start + PAGE_SIZE, =
PAGE_HYPERVISOR_RX);
     }
  &nb=
sp;  else
        &nb=
sp;mfn =3D hypercall_msr.guest_physical_address;

diff --git a/xen/arch/x86/include/asm/guest/hyperv-hcall.h =
b/xen/arch/x86/include/asm/guest/hyperv-hcall.h
index =
b76dbf9ccc..b73edca7c6 100644
--- =
a/xen/arch/x86/include/asm/guest/hyperv-hcall.h
+++ =
b/xen/arch/x86/include/asm/guest/hyperv-hcall.h
@@ -20,13 +20,13 @@ =
static inline uint64_t hv_do_hypercall(uint64_t control, paddr_t =
input_addr,
          =
;            &=
nbsp;           &nb=
sp;     paddr_t =
output_addr)
 {
     uint64_t =
status;
-    register unsigned long r8 asm ( "r8" ) =3D =
output_addr;
       /* See TLFS =
for volatile registers */
-    asm volatile ( "call =
hv_hcall_page"
+    asm volatile ( "mov =
%[output_addr], %%r8\n"

Don't =
you need to list r8 as clobbered?  Or maybe just retain the r8 =
handling above and below to avoid this mov.

This can probably mostly be =
reverted if we get the fixmap working.

The =
issue we were facing before was a situation where calling hv_hcall_page =
directly resulted in a page fault due to NX-bit being set on the =
page.

+ =
            &n=
bsp;     "call =
*%[target_addr]"

It =
might be preferable to retain a direct call which can still be installed =
with __set_fixmap_x.  Otherwise, __set_fixmap_x can be =
removed

I think we should use fixmap, I =
just need to figure out what that looks =
like.

Will send v2 patch on =
Monday.

Ariadne
=

--Apple-Mail=_4E344AD7-DF61-4E9B-87DE-DB2FFF9CBABE--


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Subject: Re: [PATCH v5 05/12] x86/hyperlaunch: locate dom0 kernel with
 hyperlaunch
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To: Alejandro Vallejo , xen-devel@lists.xenproject.org
Cc: Jan Beulich , Andrew Cooper
 , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 Stefano Stabellini ,
 Jason Andryuk 
References: <20250424161027.92942-1-agarciav@amd.com>
 <20250424161027.92942-6-agarciav@amd.com>
From: "Daniel P. Smith" 
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On 4/24/25 12:10, Alejandro Vallejo wrote:
> From: "Daniel P. Smith" 
> 
> Look for a subnode of type `multiboot,kernel` within a domain node. If
> found, locate it using the multiboot module helper to generically ensure
> it lives in the module list. If the bootargs property is present and
> there was not an MB1 string, then use the command line from the device
> tree definition.
> 
> Signed-off-by: Daniel P. Smith 
> Signed-off-by: Jason Andryuk 
> Signed-off-by: Alejandro Vallejo 
> ---
> v5:
>    * Add domain name to the error path on no-kernel.
> ---
>   xen/arch/x86/setup.c            |  1 +
>   xen/common/domain-builder/fdt.c | 64 +++++++++++++++++++++++++++++++--
>   2 files changed, 62 insertions(+), 3 deletions(-)
> 
> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
> index bd13d9d196..7e756302ae 100644
> --- a/xen/arch/x86/setup.c
> +++ b/xen/arch/x86/setup.c
> @@ -1290,6 +1290,7 @@ void asmlinkage __init noreturn __start_xen(void)
>           i = first_boot_module_index(bi, BOOTMOD_UNKNOWN);
>           bi->mods[i].type = BOOTMOD_KERNEL;
>           bi->domains[0].kernel = &bi->mods[i];
> +        bi->nr_domains = 1;
>           bi->hyperlaunch_enabled = false;
>       }
>   
> diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
> index 11f0436e85..662c715483 100644
> --- a/xen/common/domain-builder/fdt.c
> +++ b/xen/common/domain-builder/fdt.c
> @@ -99,9 +99,9 @@ static int __init fdt_prop_as_reg(const struct fdt_property *prop,
>    * @return              -EINVAL on malformed nodes, otherwise
>    *                      index inside `bi->mods`
>    */
> -int __init fdt_read_multiboot_module(const void *fdt, int node,
> -                                     int address_cells, int size_cells,
> -                                     struct boot_info *bi)
> +static int __init fdt_read_multiboot_module(const void *fdt, int node,
> +                                            int address_cells, int size_cells,
> +                                            struct boot_info *bi)

Shouldn't this belong to when the function was introduced? Though 
looking there, you push it out into the header? Guess the real question 
is it static or not?

>   {
>       const struct fdt_property *prop;
>       uint64_t addr, size;
> @@ -185,6 +185,52 @@ int __init fdt_read_multiboot_module(const void *fdt, int node,
>       return idx;
>   }
>   
> +static int __init process_domain_node(
> +    struct boot_info *bi, const void *fdt, int dom_node)
> +{
> +    int node;
> +    struct boot_domain *bd = &bi->domains[bi->nr_domains];
> +    const char *name = fdt_get_name(fdt, dom_node, NULL) ?: "unknown";
> +    int address_cells = fdt_address_cells(fdt, dom_node);
> +    int size_cells = fdt_size_cells(fdt, dom_node);
> +
> +    fdt_for_each_subnode(node, fdt, dom_node)
> +    {
> +        if ( !fdt_node_check_compatible(fdt, node, "multiboot,kernel") )
> +        {
> +            int idx;
> +
> +            if ( bd->kernel )
> +            {
> +                printk(XENLOG_WARNING
> +                       "  duplicate kernel for domain %s\n", name);
> +                continue;
> +            }
> +
> +            idx = fdt_read_multiboot_module(fdt, node, address_cells,
> +                                            size_cells, bi);
> +            if ( idx < 0 )
> +            {
> +                printk(XENLOG_ERR
> +                       "  failed processing kernel for domain %s\n", name);
> +                return idx;
> +            }
> +
> +            printk(XENLOG_INFO "  kernel: multiboot-index=%d\n", idx);
> +            bi->mods[idx].type = BOOTMOD_KERNEL;
> +            bd->kernel = &bi->mods[idx];
> +        }
> +    }
> +
> +    if ( !bd->kernel )
> +    {
> +        printk(XENLOG_ERR "error: no kernel assigned to domain %s\n", name);
> +        return -ENODATA;
> +    }
> +
> +    return 0;
> +}
> +
>   static int __init find_hyperlaunch_node(const void *fdt)
>   {
>       int hv_node = fdt_path_offset(fdt, "/chosen/hypervisor");
> @@ -248,8 +294,20 @@ int __init walk_hyperlaunch_fdt(struct boot_info *bi)
>   
>       fdt_for_each_subnode(node, fdt, hv_node)
>       {
> +        if ( bi->nr_domains >= MAX_NR_BOOTDOMS )
> +        {
> +            printk(XENLOG_WARNING "warning: only creating first %u domains\n",
> +                   MAX_NR_BOOTDOMS);
> +            break;
> +        }
> +
>           if ( !fdt_node_check_compatible(fdt, node, "xen,domain") )
> +        {
> +            if ( (ret = process_domain_node(bi, fdt, node)) < 0 )
> +                break;
> +
>               bi->nr_domains++;
> +        }
>       }
>   
>       /* Until multi-domain construction is added, throw an error */



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Date: Fri, 25 Apr 2025 15:35:34 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: dmkhn@proton.me
cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, 
    anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, 
    michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, 
    dmukhin@ford.com
Subject: Re: [PATCH v1 2/3] xen/console: introduce console_puts()
In-Reply-To: <20250403000604.169619-3-dmukhin@ford.com>
Message-ID: 
References: <20250403000604.169619-1-dmukhin@ford.com> <20250403000604.169619-3-dmukhin@ford.com>
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On Thu, 3 Apr 2025, dmkhn@proton.me wrote:
> From: Denis Mukhin 
> 
> guest_console_write() duplicates the code from __putstr(), eliminate code
> duplication.
> 
> Introduce console_puts() for writing a buffer to console devices.
> 
> Also, introduce internal console flags to control which console devices
> should be used.
> 
> Signed-off-by: Denis Mukhin 

Reviewed-by: Stefano Stabellini 




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Date: Sat, 26 Apr 2025 00:42:27 +0200
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Subject: Re: [PATCH v1 1/1] xen: mapcache: Split mapcache_grants by ro and rw
To: "Edgar E. Iglesias" , qemu-devel@nongnu.org,
 qemu-stable@nongnu.org
Cc: sstabellini@kernel.org, anthony@xenproject.org, paul@xen.org,
 edgar.iglesias@amd.com, xen-devel@lists.xenproject.org
References: <20250425143156.204452-1-edgar.iglesias@gmail.com>
 <20250425143156.204452-2-edgar.iglesias@gmail.com>
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On 25/4/25 16:31, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias" 
> 
> Today, we don't track write-abiliy in the cache, if a user
> requests a readable mapping followed by a writeable mapping
> on the same page, the second lookup will incorrectly hit
> the readable entry.
> 
> Split mapcache_grants by ro and rw access. Grants will now
> have separate ways in the cache depending on writeability.
> 
> Signed-off-by: Edgar E. Iglesias 
> ---
>   hw/xen/xen-mapcache.c | 26 +++++++++++++++++++-------
>   1 file changed, 19 insertions(+), 7 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé 



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Date: Fri, 25 Apr 2025 15:47:53 -0700 (PDT)
From: Stefano Stabellini 
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To: dmkhn@proton.me
cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, 
    anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, 
    michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, 
    dmukhin@ford.com
Subject: Re: [PATCH v1 2/3] xen/console: introduce console_puts()
In-Reply-To: <20250403000604.169619-3-dmukhin@ford.com>
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On Thu, 3 Apr 2025, dmkhn@proton.me wrote:
> From: Denis Mukhin 
> 
> guest_console_write() duplicates the code from __putstr(), eliminate code
> duplication.
> 
> Introduce console_puts() for writing a buffer to console devices.
> 
> Also, introduce internal console flags to control which console devices
> should be used.
> 
> Signed-off-by: Denis Mukhin 
> ---
>  xen/drivers/char/console.c | 112 ++++++++++++++++++++++---------------
>  1 file changed, 66 insertions(+), 46 deletions(-)
> 
> diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c
> index aaa97088aa..2618c2e47d 100644
> --- a/xen/drivers/char/console.c
> +++ b/xen/drivers/char/console.c
> @@ -41,6 +41,20 @@
>  #include 
>  #endif
>  
> +/* Internal console flags. */
> +enum {
> +    CONSOLE_SERIAL  = BIT(0, U),    /* Use serial device. */
> +    CONSOLE_PV      = BIT(1, U),    /* Use PV console. */
> +    CONSOLE_VIDEO   = BIT(2, U),    /* Use video device. */
> +    CONSOLE_DEBUG   = BIT(3, U),    /* Use debug device. */
> +    CONSOLE_RING    = BIT(4, U),    /* Use console ring. */
> +    CONSOLE_DEFAULT = CONSOLE_SERIAL | CONSOLE_PV | CONSOLE_VIDEO |
> +                      CONSOLE_DEBUG,
> +    CONSOLE_ALL     = CONSOLE_DEFAULT | CONSOLE_RING,
> +};
> +
> +static void console_puts(const char *str, size_t len, unsigned int flags);
> +
>  /* console: comma-separated list of console outputs. */
>  static char __initdata opt_console[30] = OPT_CONSOLE_STR;
>  string_param("console", opt_console);
> @@ -338,8 +352,6 @@ static bool console_locks_busted;
>  
>  static void conring_puts(const char *str, size_t len)
>  {
> -    ASSERT(rspin_is_locked(&console_lock));
> -
>      while ( len-- )
>          conring[CONRING_IDX_MASK(conringp++)] = *str++;
>  
> @@ -432,9 +444,6 @@ void console_serial_puts(const char *s, size_t nr)
>          serial_steal_fn(s, nr);
>      else
>          serial_puts(sercon_handle, s, nr);
> -
> -    /* Copy all serial output into PV console */
> -    pv_console_puts(s, nr);
>  }
>  
>  static void cf_check dump_console_ring_key(unsigned char key)
> @@ -468,8 +477,7 @@ static void cf_check dump_console_ring_key(unsigned char key)
>          c += len;
>      }
>  
> -    console_serial_puts(buf, sofar);
> -    video_puts(buf, sofar);
> +    console_puts(buf, sofar, CONSOLE_SERIAL | CONSOLE_VIDEO | CONSOLE_PV);

Actually I take back the R-b. It looks like this change is breaking
because console_puts now requires the console_lock to be held, while
here the console_lock is not held.

If I am not mistaken if you try to use the 'w' key with this patch
applied you'll hit the ASSERT at the beginning of console_puts


>      free_xenheap_pages(buf, order);
>  }
> @@ -618,11 +626,61 @@ static inline void xen_console_write_debug_port(const char *buf, size_t len)
>  }
>  #endif
>  
> +static inline void console_debug_puts(const char *str, size_t len)
> +{
> +#ifdef CONFIG_X86
> +    if ( opt_console_xen )
> +    {
> +        if ( xen_guest )
> +            xen_hypercall_console_write(str, len);
> +        else
> +            xen_console_write_debug_port(str, len);
> +    }
> +#endif
> +}
> +
> +/*
> + * Write buffer to all enabled console devices.
> + *
> + * That will handle all possible scenarios working w/ console
> + * - physical console (serial console, VGA console (x86 only));
> + * - PV console;
> + * - debug console (x86 only): debug I/O port or __HYPERVISOR_console_io
> + *   hypercall;
> + * - console ring.
> + */
> +static void console_puts(const char *str, size_t len, unsigned int flags)
> +{
> +    ASSERT(rspin_is_locked(&console_lock));
> +
> +    if ( flags & CONSOLE_SERIAL )
> +        console_serial_puts(str, len);
> +
> +    if ( flags & CONSOLE_PV )
> +        pv_console_puts(str, len);
> +
> +    if ( flags & CONSOLE_VIDEO )
> +        video_puts(str, len);
> +
> +    if ( flags & CONSOLE_DEBUG )
> +        console_debug_puts(str, len);
> +
> +    if ( flags & CONSOLE_RING )
> +        conring_puts(str, len);
> +}
> +
> +static inline void __putstr(const char *str)
> +{
> +    console_puts(str, strlen(str), CONSOLE_ALL);
> +}
> +
>  static long guest_console_write(XEN_GUEST_HANDLE_PARAM(char) buffer,
>                                  unsigned int count)
>  {
>      char kbuf[128];
>      unsigned int kcount = 0;
> +    unsigned int flags = opt_console_to_ring
> +                         ? CONSOLE_ALL : CONSOLE_DEFAULT;
>      struct domain *cd = current->domain;
>  
>      while ( count > 0 )
> @@ -640,23 +698,7 @@ static long guest_console_write(XEN_GUEST_HANDLE_PARAM(char) buffer,
>          {
>              /* Use direct console output as it could be interactive */
>              nrspin_lock_irq(&console_lock);
> -
> -            console_serial_puts(kbuf, kcount);
> -            video_puts(kbuf, kcount);
> -
> -#ifdef CONFIG_X86
> -            if ( opt_console_xen )
> -            {
> -                if ( xen_guest )
> -                    xen_hypercall_console_write(kbuf, kcount);
> -                else
> -                    xen_console_write_debug_port(kbuf, kcount);
> -            }
> -#endif
> -
> -            if ( opt_console_to_ring )
> -                conring_puts(kbuf, kcount);
> -
> +            console_puts(kbuf, kcount, flags);
>              nrspin_unlock_irq(&console_lock);
>          }
>          else
> @@ -757,28 +799,6 @@ long do_console_io(
>   * *****************************************************
>   */
>  
> -static void __putstr(const char *str)
> -{
> -    size_t len = strlen(str);
> -
> -    ASSERT(rspin_is_locked(&console_lock));
> -
> -    console_serial_puts(str, len);
> -    video_puts(str, len);
> -
> -#ifdef CONFIG_X86
> -    if ( opt_console_xen )
> -    {
> -        if ( xen_guest )
> -            xen_hypercall_console_write(str, len);
> -        else
> -            xen_console_write_debug_port(str, len);
> -    }
> -#endif
> -
> -    conring_puts(str, len);
> -}
> -
>  static int printk_prefix_check(char *p, char **pp)
>  {
>      int loglvl = -1;
> -- 
> 2.34.1
> 
> 


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Date: Fri, 25 Apr 2025 15:53:07 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: dmkhn@proton.me
cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, 
    anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, 
    michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, 
    dmukhin@ford.com
Subject: Re: [PATCH v1 3/3] xen/console: introduce conring_flush()
In-Reply-To: <20250403000604.169619-4-dmukhin@ford.com>
Message-ID: 
References: <20250403000604.169619-1-dmukhin@ford.com> <20250403000604.169619-4-dmukhin@ford.com>
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On Thu, 3 Apr 2025, dmkhn@proton.me wrote:
> From: Denis Mukhin 
> 
> Introduce conring_flush() to ensure all messages kept in the internal
> console ring are sent to all physical consoles (serial, VGA (x86))
> after their initialization is completed.
> 
> Resolves: https://gitlab.com/xen-project/xen/-/issues/184
> Signed-off-by: Denis Mukhin 
> ---
> The patch conflicts with
>   https://lore.kernel.org/xen-devel/20250331230508.440198-7-dmukhin@ford.com/
> in console_init_preirq()
> ---
>  xen/drivers/char/console.c | 34 ++++++++++++++++++++++++----------
>  1 file changed, 24 insertions(+), 10 deletions(-)
> 
> diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c
> index 2618c2e47d..18eb66df89 100644
> --- a/xen/drivers/char/console.c
> +++ b/xen/drivers/char/console.c
> @@ -446,24 +446,22 @@ void console_serial_puts(const char *s, size_t nr)
>          serial_puts(sercon_handle, s, nr);
>  }
>  
> -static void cf_check dump_console_ring_key(unsigned char key)
> +/*
> + * Flush contents of the conring to the physical console devices.
> + */
> +static int conring_flush(void)
>  {
>      uint32_t idx, len, sofar, c;
>      unsigned int order;
>      char *buf;
> +    unsigned long flags;
>  
> -    printk("'%c' pressed -> dumping console ring buffer (dmesg)\n", key);
> -
> -    /* create a buffer in which we'll copy the ring in the correct
> -       order and NUL terminate */
>      order = get_order_from_bytes(conring_size + 1);
>      buf = alloc_xenheap_pages(order, 0);
>      if ( buf == NULL )
> -    {
> -        printk("unable to allocate memory!\n");
> -        return;
> -    }
> +        return -ENOMEM;
>  
> +    flags = console_lock_recursive_irqsave();

This patch is OK but it looks like this bit might have to change to
rebase on top of a modified patch #2


>      c = conringc;
>      sofar = 0;
>      while ( (c != conringp) )
> @@ -478,8 +476,21 @@ static void cf_check dump_console_ring_key(unsigned char key)
>      }
>  
>      console_puts(buf, sofar, CONSOLE_SERIAL | CONSOLE_VIDEO | CONSOLE_PV);
> +    console_unlock_recursive_irqrestore(flags);
>  
>      free_xenheap_pages(buf, order);
> +
> +    return 0;
> +}
> +
> +static void cf_check conring_dump_keyhandler(unsigned char key)
> +{
> +    int rc;
> +
> +    printk("'%c' pressed -> dumping console ring buffer (dmesg)\n", key);
> +    rc = conring_flush();
> +    if ( rc )
> +        printk("failed to dump console ring buffer: %d\n", rc);
>  }
>  
>  /*
> @@ -1044,6 +1055,9 @@ void __init console_init_preirq(void)
>      serial_set_rx_handler(sercon_handle, serial_rx);
>      pv_console_set_rx_handler(serial_rx);
>  
> +    /* NB: send conring contents to all enabled physical consoles, if any */
> +    conring_flush();
> +
>      /* HELLO WORLD --- start-of-day banner text. */
>      nrspin_lock(&console_lock);
>      __putstr(xen_banner());
> @@ -1134,7 +1148,7 @@ void __init console_endboot(void)
>      if ( opt_conswitch[1] == 'x' )
>          console_rx = max_console_rx;
>  
> -    register_keyhandler('w', dump_console_ring_key,
> +    register_keyhandler('w', conring_dump_keyhandler,
>                          "synchronously dump console ring buffer (dmesg)", 0);
>      register_irq_keyhandler('+', &do_inc_thresh,
>                              "increase log level threshold", 0);
> -- 
> 2.34.1
> 
> 


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Date: Fri, 25 Apr 2025 16:35:06 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: xen-devel@lists.xenproject.org
cc: Andrei Cherechesu , sstabellini@kernel.org, 
    michal.orzel@amd.com, jason.andryuk@amd.com, dmkhn@proton.me
Subject: [PATCH v7] uboot-script-gen: Dynamically compute addr and size when
 loading binaries
Message-ID: 
User-Agent: Alpine 2.22 (DEB 394 2020-01-19)
MIME-Version: 1.0
Content-Type: text/plain; charset=US-ASCII

From: Andrei Cherechesu 

Normally, the Imagebuilder would precompute the sizes of the loaded
binaries and addresses where they are loaded before generating the
script, and the sizes and addresses that needed to be provided to
Xen via /chosen would be hardcoded in the boot script.

Added an option via "-s" parameter to avoid hardcoding any
address in the boot script, and dynamically compute the
loading addresses for binaries. The first loading address is based
on the MEMORY_START parameter and after loading each binary,
the loading address and the size of the binary are stored in
variables with corresponding names. Then, the loading address
for the next binary is computed and aligned to 0x200000.

If the "-s" parameter is not used, the normal flow is executed,
where the loading addresses and sizes for each binaries are
precomputed and hardcoded inside the script, but the loading
addresses and sizes for each binary are now also stored for eventual
later use.

Reserved memory regions are left TBD in the -s case.

Link: https://lists.xenproject.org/archives/html/xen-devel/2022-09/msg01862.html
Signed-off-by: Andrei Cherechesu 
Signed-off-by: Stefano Stabellini 
---
Changes in v7:
- use $()
- better description and alphabetical order
- use heredoc

Changes in v6:
- make initial ${memaddr} setting depending on CALC

This patch adds quite a bit of complexity which is the reason why I
didn't originally commit it. Now that we are enabling ImageBuilder in
Yocto, it turns out this patch is required because Yocto invokes
ImageBuilder before all the binaries are ready and available.

Andrei, sorry for taking so long to realize why it is essential, but we
are getting there now.

The changes I made to the original patch are purely to make it simpler
to maintain.
---

diff --git a/README.md b/README.md
index f8039ec..28c9e6b 100644
--- a/README.md
+++ b/README.md
@@ -356,6 +356,8 @@ Where:\
    can only be used  in combination with the -k option.  This adds the
    public key into the dtb.  Then one can add this dtb back into the
    u-boot bin or elf.\
+-s addresses and sizes are calculated dynamically from U-Boot, hence
+   binaries don't need to be available at the time of invocation.\
 
 ### Signed FIT images
 
diff --git a/scripts/uboot-script-gen b/scripts/uboot-script-gen
index 638154a..73d9600 100755
--- a/scripts/uboot-script-gen
+++ b/scripts/uboot-script-gen
@@ -1,8 +1,11 @@
 #!/bin/bash
 
 offset=$((2*1024*1024))
+PADDING_MASK=$(printf "0x%X\n" $(($offset - 1)))
+PADDING_MASK_INV=$(printf "0x%X\n" $((~$PADDING_MASK)))
 filesize=0
 prog_req=(mkimage file fdtput mktemp awk od)
+CALC=""
 
 function cleanup_and_return_err()
 {
@@ -100,17 +103,40 @@ function dt_set()
     fi
 }
 
+function dt_set_calc()
+{
+    local path=$1
+    local var=$2
+    local name_var=$3
+ 
+    local addr_var="$name_var"_addr
+    local size_var="$name_var"_size
+
+    cat >> $UBOOT_SOURCE <<- EOF
+	setexpr addr_hi \${$addr_var} / 0x100000000
+	setexpr addr_lo \${$addr_var} \& 0xFFFFFFFF
+	setexpr size_hi \${$size_var} / 0x100000000
+	setexpr size_lo \${$size_var} \& 0xFFFFFFFF
+	fdt set $path $var <0x\${addr_hi} 0x\${addr_lo} 0x\${size_hi} 0x\${size_lo}>
+	EOF
+}
+
 function add_device_tree_kernel()
 {
     local path=$1
-    local addr=$2
-    local size=$3
-    local bootargs=$4
+    local name=$2
+    local addr=$3
+    local size=$4
+    local bootargs=$5
     local node_name="module@${addr#0x}"
 
     dt_mknode "$path" "$node_name"
     dt_set "$path/$node_name" "compatible" "str_a" "multiboot,kernel multiboot,module"
-    dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
+    if test "$CALC"; then
+        dt_set_calc "$path/$node_name" "reg" $name
+    else
+        dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
+    fi
     dt_set "$path/$node_name" "bootargs" "str" "$bootargs"
 }
 
@@ -118,26 +144,36 @@ function add_device_tree_kernel()
 function add_device_tree_ramdisk()
 {
     local path=$1
-    local addr=$2
-    local size=$3
+    local name=$2
+    local addr=$3
+    local size=$4
     local node_name="module@${addr#0x}"
 
     dt_mknode "$path"  "$node_name"
     dt_set "$path/$node_name" "compatible" "str_a" "multiboot,ramdisk multiboot,module"
-    dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
+    if test "$CALC"; then
+        dt_set_calc "$path/$node_name" "reg" $name
+    else
+        dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
+    fi
 }
 
 
 function add_device_tree_passthrough()
 {
     local path=$1
-    local addr=$2
-    local size=$3
+    local name=$2
+    local addr=$3
+    local size=$4
     local node_name="module@${addr#0x}"
 
     dt_mknode "$path"  "$node_name"
     dt_set "$path/$node_name" "compatible" "str_a" "multiboot,device-tree multiboot,module"
-    dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
+    if test "$CALC"; then
+        dt_set_calc "$path/$node_name" "reg" $name
+    else
+        dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
+    fi
 }
 
 function add_device_tree_mem()
@@ -358,7 +394,11 @@ function xen_device_tree_editing()
 
         dt_mknode "/chosen" "$node_name"
         dt_set "/chosen/$node_name" "compatible" "str_a" "xen,xsm-policy xen,multiboot-module multiboot,module"
-        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $xen_policy_addr $xen_policy_size)"
+        if test "$CALC"; then
+            dt_set_calc "/chosen/$node_name" "reg" "xen_policy"
+        else
+            dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $xen_policy_addr $xen_policy_size)"
+        fi
     fi
 
     if test "$DOM0_KERNEL"
@@ -367,7 +407,11 @@ function xen_device_tree_editing()
 
         dt_mknode "/chosen" "$node_name"
         dt_set "/chosen/$node_name" "compatible" "str_a" "xen,linux-zimage xen,multiboot-module multiboot,module"
-        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $dom0_kernel_addr $dom0_kernel_size)"
+        if test "$CALC"; then
+            dt_set_calc "/chosen/$node_name" "reg" "dom0_linux"
+        else
+            dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $dom0_kernel_addr $dom0_kernel_size)"
+        fi
         dt_set "/chosen" "xen,dom0-bootargs" "str" "$DOM0_CMD"
     fi
 
@@ -377,7 +421,11 @@ function xen_device_tree_editing()
 
         dt_mknode "/chosen" "$node_name"
         dt_set "/chosen/$node_name" "compatible" "str_a" "xen,linux-initrd xen,multiboot-module multiboot,module"
-        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $ramdisk_addr $ramdisk_size)"
+        if test "$CALC"; then
+            dt_set_calc "/chosen/$node_name" "reg" "dom0_ramdisk"
+        else
+            dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $ramdisk_addr $ramdisk_size)"
+        fi
     fi
 
     i=0
@@ -464,14 +512,14 @@ function xen_device_tree_editing()
 
         xen_dt_domu_add_vcpu_nodes "/chosen/domU$i" $i ${DOMU_VCPUS[$i]}
 
-        add_device_tree_kernel "/chosen/domU$i" ${domU_kernel_addr[$i]} ${domU_kernel_size[$i]} "${DOMU_CMD[$i]}"
+        add_device_tree_kernel "/chosen/domU$i" "domU${i}_kernel" ${domU_kernel_addr[$i]} ${domU_kernel_size[$i]} "${DOMU_CMD[$i]}"
         if test "${domU_ramdisk_addr[$i]}"
         then
-            add_device_tree_ramdisk "/chosen/domU$i" ${domU_ramdisk_addr[$i]} ${domU_ramdisk_size[$i]}
+            add_device_tree_ramdisk "/chosen/domU$i" "domU${i}_ramdisk" ${domU_ramdisk_addr[$i]} ${domU_ramdisk_size[$i]}
         fi
         if test "${domU_passthrough_dtb_addr[$i]}"
         then
-            add_device_tree_passthrough "/chosen/domU$i" ${domU_passthrough_dtb_addr[$i]} ${domU_passthrough_dtb_size[$i]}
+            add_device_tree_passthrough "/chosen/domU$i" "domU${i}_fdt" ${domU_passthrough_dtb_addr[$i]} ${domU_passthrough_dtb_size[$i]}
         fi
         i=$(( $i + 1 ))
     done
@@ -504,7 +552,11 @@ function device_tree_editing()
 
     if test $UBOOT_SOURCE
     then
-        echo "fdt addr $device_tree_addr" >> $UBOOT_SOURCE
+        if test "$CALC"; then
+            echo "fdt addr \${host_fdt_addr}" >> $UBOOT_SOURCE
+        else
+            echo "fdt addr $device_tree_addr" >> $UBOOT_SOURCE
+        fi
         echo "fdt resize 1024" >> $UBOOT_SOURCE
 
         if test $NUM_DT_OVERLAY && test $NUM_DT_OVERLAY -gt 0
@@ -512,7 +564,11 @@ function device_tree_editing()
             i=0
             while test $i -lt $NUM_DT_OVERLAY
             do
-                echo "fdt apply ${dt_overlay_addr[$i]}" >> $UBOOT_SOURCE
+                if test "$CALC"; then
+                    echo "fdt apply \${host_fdto${i}_addr}" >> $UBOOT_SOURCE
+                else
+                    echo "fdt apply ${dt_overlay_addr[$i]}" >> $UBOOT_SOURCE
+                fi
                 i=$(( $i + 1 ))
             done
         fi
@@ -530,8 +586,12 @@ function fill_reserved_spaces_from_dtb()
 {
     if [ ! -f $DEVICE_TREE ]
     then
-        echo "File $DEVICE_TREE doesn't exist, exiting";
-        cleanup_and_return_err
+        if test "$CALC"; then
+            return
+        else
+            echo "File $DEVICE_TREE doesn't exist, exiting";
+            cleanup_and_return_err
+        fi
     fi
 
     # Check if reserved-memory node exists
@@ -613,7 +673,7 @@ function get_image_size()
     printf "%u" $effective_size
 }
 
-function add_size()
+function add_size_from_file()
 {
     local filename=$1
     local size=`stat -L --printf="%s" $filename`
@@ -645,6 +705,26 @@ function add_size()
     filesize=$size
 }
 
+function add_size_calculate()
+{
+    local fit_scr_name=$1
+
+    cat >> $UBOOT_SOURCE <<- EOF
+	setenv "$fit_scr_name"_addr \${memaddr}
+	setenv "$fit_scr_name"_size \${filesize}
+	setexpr memaddr \${memaddr} \+ \${filesize}
+	setexpr memaddr \${memaddr} \+ $PADDING_MASK
+	setexpr memaddr \${memaddr} \& $PADDING_MASK_INV
+	EOF
+
+    # TODO: missing ${RESERVED_MEM_SPACES[@]} check
+
+    # The following are updated to avoid collisions in node names, but
+    # they are not actively used.
+    memaddr=$((memaddr + offset))
+    filesize=$offset
+}
+
 function load_file()
 {
     local filename=$1
@@ -657,10 +737,16 @@ function load_file()
     if test "$FIT"
     then
         echo "imxtract \$fit_addr $fit_scr_name $memaddr" >> $UBOOT_SOURCE
+        add_size_from_file $filename
     else
-        echo "$LOAD_CMD $memaddr ${prepend_path:+$prepend_path/}$relative_path" >> $UBOOT_SOURCE
+        if test "$CALC"; then
+            echo "$LOAD_CMD \${memaddr} ${prepend_path:+$prepend_path/}$relative_path" >> $UBOOT_SOURCE
+            add_size_calculate $fit_scr_name
+        else
+            echo "$LOAD_CMD $memaddr ${prepend_path:+$prepend_path/}$relative_path" >> $UBOOT_SOURCE
+            add_size_from_file $filename
+        fi
     fi
-    add_size $filename
 }
 
 function check_file_type()
@@ -670,8 +756,13 @@ function check_file_type()
 
     if [ ! -f $filename ]
     then
-        echo "File $filename doesn't exist, exiting";
-        cleanup_and_return_err
+        if test "$CALC"
+        then
+            return
+        else
+            echo "File $filename doesn't exist, exiting";
+            cleanup_and_return_err
+        fi
     fi
 
     # if file doesn't know what it is, it outputs data, so include that
@@ -705,8 +796,13 @@ function check_compressed_file_type()
 
     if [ ! -f $filename ]
     then
-        echo "File $filename doesn't exist, exiting";
-        cleanup_and_return_err
+        if test "$CALC"
+        then
+            return
+        else
+            echo "File $filename doesn't exist, exiting";
+            cleanup_and_return_err
+        fi
     fi
 
     file_type=$( file -L $filename )
@@ -872,6 +968,12 @@ function linux_config()
 generate_uboot_images()
 {
     local arch=$(file -L $XEN | grep -E 'ARM64|Aarch64')
+    
+    if test "$CALC"
+    then
+        echo "bootm is not compatible with -s"
+        cleanup_and_return_err
+    fi
 
     if test "$arch"
     then
@@ -997,7 +1099,11 @@ bitstream_load_and_config()
         if test "$UBOOT_SOURCE"
         then
             # we assume the FPGA device is 0 here
-            echo "fpga load 0 $bitstream_addr $bitstream_size" >> "$UBOOT_SOURCE"
+            if test "$CALC"; then
+                echo "fpga load 0 \${fpga_bitstream_addr} \${fpga_bitstream_size}" >> "$UBOOT_SOURCE"
+            else
+                echo "fpga load 0 $bitstream_addr $bitstream_size" >> "$UBOOT_SOURCE"
+            fi
         fi
     fi
 }
@@ -1271,7 +1377,7 @@ function print_help
 {
     script=`basename "$0"`
     echo "usage:"
-    echo "	$script -c CONFIG_FILE -d DIRECTORY [-t LOAD_CMD] [-o FILE] [-k KEY_DIR/HINT [-u U-BOOT_DTB]] [-e] [-f] [-p PREPEND_PATH]"
+    echo "	$script -c CONFIG_FILE -d DIRECTORY [-t LOAD_CMD] [-o FILE] [-k KEY_DIR/HINT [-u U-BOOT_DTB]] [-e] [-f] [-p PREPEND_PATH] [-s]"
     echo "	$script -h"
     echo "where:"
     echo "	CONFIG_FILE - configuration file"
@@ -1289,13 +1395,14 @@ function print_help
     echo "	-f - enable generating a FIT image"
     echo "	PREPEND_PATH - path to be appended before file names to match deploy location within rootfs"
     echo "	-h - prints out the help message and exits "
+    echo "	-s - let U-Boot calculate binary images load addresses/sizes dynamically"
     echo "Defaults:"
     echo "	CONFIG_FILE=$cfg_file, UBOOT_TYPE=\"LOAD_CMD\" env var, DIRECTORY=$uboot_dir"
     echo "Example:"
     echo "	$script -c ../config -d ./build42 -t \"scsi load 1:1\""
 }
 
-while getopts ":c:t:d:ho:k:u:fp:" opt; do
+while getopts ":c:t:d:ho:k:u:fp:s" opt; do
     case ${opt} in
     t )
         case $OPTARG in
@@ -1340,6 +1447,9 @@ while getopts ":c:t:d:ho:k:u:fp:" opt; do
     p )
         prepend_path="$OPTARG"
         ;;
+    s )
+        CALC=y
+        ;;
     h )
         print_help
         exit 0
@@ -1533,6 +1643,10 @@ uboot_addr=$memaddr
 # 2MB are enough for a uboot script
 memaddr=$(( $memaddr + $offset ))
 memaddr=`printf "0x%X\n" $memaddr`
+if test "$CALC"
+then
+    echo "setenv memaddr $memaddr" >> $UBOOT_SOURCE
+fi
 
 fill_reserved_spaces_from_dtb
 
@@ -1583,7 +1697,11 @@ fi
 
 if [ "$BOOT_CMD" != "none" ]
 then
-    echo "$BOOT_CMD $kernel_addr $([ "$BOOT_CMD" = "bootefi" ] || echo '-') $device_tree_addr" >> $UBOOT_SOURCE
+    if test "$CALC"; then
+        echo "$BOOT_CMD \${host_kernel_addr} $([ "$BOOT_CMD" = "bootefi" ] || echo '-') \${host_fdt_addr}" >> $UBOOT_SOURCE
+    else
+        echo "$BOOT_CMD $kernel_addr $([ "$BOOT_CMD" = "bootefi" ] || echo '-') $device_tree_addr" >> $UBOOT_SOURCE
+    fi
 else
     # skip boot command but store load addresses to be used later
     echo "setenv host_kernel_addr $kernel_addr" >> $UBOOT_SOURCE


From xen-devel-bounces@lists.xenproject.org Fri Apr 25 23:43:40 2025
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From: 
To: 
CC: Nicola Vetrini , Federico Serafini
	, Victor Lira , "Andrew
 Cooper" , Anthony PERARD
	, Michal Orzel , Jan Beulich
	, Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , "Stefano
 Stabellini" , Bertrand Marquis
	
Subject: [PATCH v1 1/3] x86: x86_emulate: address violations of MISRA C Rule 19.1
Date: Fri, 25 Apr 2025 16:42:36 -0700
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From: Nicola Vetrini 

Rule 19.1 states: "An object shall not be assigned or copied
to an overlapping object". Since the "call" and "compat_call" are
fields of the same union, reading from one member and writing to
the other violates the rule, while not causing Undefined Behavior
due to their relative sizes. However, a dummy variables are used to
address the violations and prevent the future possibility of
incurring in UB.

No functional change.

Signed-off-by: Nicola Vetrini 
Signed-off-by: Federico Serafini 
Signed-off-by: Victor Lira 
---
Cc: Andrew Cooper 
Cc: Anthony PERARD 
Cc: Michal Orzel 
Cc: Jan Beulich 
Cc: Julien Grall 
Cc: Roger Pau Monné 
Cc: Stefano Stabellini 
Cc: Nicola Vetrini 
Cc: Federico Serafini 
Cc: Bertrand Marquis 
---
 xen/arch/x86/x86_emulate/x86_emulate.c | 21 ++++++++++++++++++---
 1 file changed, 18 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c
index 8e14ebb35b..44dc3039f3 100644
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -526,9 +526,19 @@ static inline void put_loop_count(
          */                                                             \
         if ( !amd_like(ctxt) && mode_64bit() && ad_bytes == 4 )         \
         {                                                               \
+            uint64_t tmp;                                               \
+                                                                        \
             _regs.r(cx) = 0;                                            \
-            if ( extend_si ) _regs.r(si) = _regs.esi;                   \
-            if ( extend_di ) _regs.r(di) = _regs.edi;                   \
+            if ( extend_si )                                            \
+            {                                                           \
+                tmp = _regs.esi;                                        \
+                _regs.r(si) = tmp;                                      \
+            }                                                           \
+            if ( extend_di )                                            \
+            {                                                           \
+                tmp = _regs.edi;                                        \
+                _regs.r(di) = tmp;                                      \
+            }                                                           \
         }                                                               \
         goto complete_insn;                                             \
     }                                                                   \
@@ -2029,7 +2039,12 @@ x86_emulate(
         switch ( op_bytes )
         {
         case 2: _regs.ax = (int8_t)_regs.ax; break; /* cbw */
-        case 4: _regs.r(ax) = (uint32_t)(int16_t)_regs.ax; break; /* cwde */
+        case 4:
+            {
+                uint32_t tmp = (uint32_t)(int16_t)_regs.ax;
+                _regs.r(ax) = tmp;
+                break; /* cwde */
+            }
         case 8: _regs.r(ax) = (int32_t)_regs.r(ax); break; /* cdqe */
         }
         break;
--
2.47.0


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CC: Federico Serafini , Victor Lira
	, Andrew Cooper , "Anthony
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	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , "Stefano
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	, Bertrand Marquis 
Subject: [PATCH v1 3/3] automation/eclair: tag Rule 19.1 as clean
Date: Fri, 25 Apr 2025 16:42:38 -0700
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From: Federico Serafini 

Tag MISRA C Rule 19.1 as clean to avoid regressions.

Signed-off-by: Federico Serafini 
Signed-off-by: Victor Lira 
---
Cc: Andrew Cooper 
Cc: Anthony PERARD 
Cc: Michal Orzel 
Cc: Jan Beulich 
Cc: Julien Grall 
Cc: Roger Pau Monné 
Cc: Stefano Stabellini 
Cc: Nicola Vetrini 
Cc: Federico Serafini 
Cc: Bertrand Marquis 
---
 automation/eclair_analysis/ECLAIR/tagging.ecl | 1 +
 1 file changed, 1 insertion(+)

diff --git a/automation/eclair_analysis/ECLAIR/tagging.ecl b/automation/eclair_analysis/ECLAIR/tagging.ecl
index 1d078d8905..dab3c51faa 100644
--- a/automation/eclair_analysis/ECLAIR/tagging.ecl
+++ b/automation/eclair_analysis/ECLAIR/tagging.ecl
@@ -78,6 +78,7 @@ MC3A2.R17.5||
 MC3A2.R17.6||
 MC3A2.R18.6||
 MC3A2.R18.8||
+MC3A2.R19.1||
 MC3A2.R20.2||
 MC3A2.R20.3||
 MC3A2.R20.4||
--
2.47.0


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From: Nicola Vetrini 

Rule 19.1 states: "An object shall not be assigned or copied
to an overlapping object". Since the "call" and "compat_call" are
fields of the same union, reading from one member and writing to
the other violates the rule, while not causing Undefined Behavior
due to their relative sizes. However, a dummy variable is used to
address the violation and prevent the future possibility of
incurring in UB.

No functional change.

Signed-off-by: Nicola Vetrini 
Signed-off-by: Victor Lira 
---
Cc: Andrew Cooper 
Cc: Anthony PERARD 
Cc: Michal Orzel 
Cc: Jan Beulich 
Cc: Julien Grall 
Cc: Roger Pau Monné 
Cc: Stefano Stabellini 
Cc: Nicola Vetrini 
Cc: Federico Serafini 
Cc: Bertrand Marquis 
---
 xen/common/compat/multicall.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/xen/common/compat/multicall.c b/xen/common/compat/multicall.c
index b17739d218..1740fb2172 100644
--- a/xen/common/compat/multicall.c
+++ b/xen/common/compat/multicall.c
@@ -15,8 +15,13 @@ typedef int ret_t;
 static inline void xlat_multicall_entry(struct mc_state *mcs)
 {
     int i;
+    xen_ulong_t arg;
+
     for (i=0; i<6; i++)
-        mcs->compat_call.args[i] = mcs->call.args[i];
+    {
+        arg = mcs->call.args[i];
+        mcs->compat_call.args[i] = arg;
+    }
 }

 #define multicall_entry      compat_multicall_entry
--
2.47.0


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From: Ariadne Conill 
To: xen-devel@lists.xenproject.org
Cc: Ariadne Conill ,
	Paul Durrant ,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Alejandro Vallejo ,
	"Alexander M . Merritt" 
Subject: [PATCH v2] x86/hyperv: use dynamically allocated page for hypercalls
Date: Fri, 25 Apr 2025 16:43:31 -0700
Message-Id: <20250425234331.65875-1-ariadne@ariadne.space>
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Previously Xen placed the hypercall page at the highest possible MFN,
but this caused problems on systems where there is more than 36 bits
of physical address space.

In general, it also seems unreliable to assume that the highest possible
MFN is not already reserved for some other purpose.

Changes from v1:
- Continue to use fixmap infrastructure
- Use panic in Hyper-V setup() function instead of returning -ENOMEM
  on hypercall page allocation failure

Fixes: 620fc734f854 ("x86/hyperv: setup hypercall page")
Cc: Alejandro Vallejo 
Cc: Alexander M. Merritt 
Signed-off-by: Ariadne Conill 
---
 xen/arch/x86/guest/hyperv/hyperv.c      | 17 +++++++----------
 xen/arch/x86/include/asm/guest/hyperv.h |  3 ---
 2 files changed, 7 insertions(+), 13 deletions(-)

diff --git a/xen/arch/x86/guest/hyperv/hyperv.c b/xen/arch/x86/guest/hyperv/hyperv.c
index 6989af38f1..0305374a06 100644
--- a/xen/arch/x86/guest/hyperv/hyperv.c
+++ b/xen/arch/x86/guest/hyperv/hyperv.c
@@ -98,7 +98,13 @@ static void __init setup_hypercall_page(void)
     rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
     if ( !hypercall_msr.enable )
     {
-        mfn = HV_HCALL_MFN;
+        void *hcall_page = alloc_xenheap_page();
+        if ( !hcall_page )
+            panic("Hyper-V: Failed to allocate hypercall trampoline page");
+
+        printk("Hyper-V: Allocated hypercall page @ %p.\n", hcall_page);
+
+        mfn = virt_to_mfn(hcall_page);
         hypercall_msr.enable = 1;
         hypercall_msr.guest_physical_address = mfn;
         wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
@@ -187,14 +193,6 @@ static int cf_check ap_setup(void)
     return setup_vp_assist();
 }
 
-static void __init cf_check e820_fixup(void)
-{
-    uint64_t s = HV_HCALL_MFN << PAGE_SHIFT;
-
-    if ( !e820_add_range(s, s + PAGE_SIZE, E820_RESERVED) )
-        panic("Unable to reserve Hyper-V hypercall range\n");
-}
-
 static int cf_check flush_tlb(
     const cpumask_t *mask, const void *va, unsigned int flags)
 {
@@ -211,7 +209,6 @@ static const struct hypervisor_ops __initconst_cf_clobber ops = {
     .name = "Hyper-V",
     .setup = setup,
     .ap_setup = ap_setup,
-    .e820_fixup = e820_fixup,
     .flush_tlb = flush_tlb,
 };
 
diff --git a/xen/arch/x86/include/asm/guest/hyperv.h b/xen/arch/x86/include/asm/guest/hyperv.h
index c05efdce71..5792e77104 100644
--- a/xen/arch/x86/include/asm/guest/hyperv.h
+++ b/xen/arch/x86/include/asm/guest/hyperv.h
@@ -10,9 +10,6 @@
 
 #include 
 
-/* Use top-most MFN for hypercall page */
-#define HV_HCALL_MFN   (((1ull << paddr_bits) - 1) >> HV_HYP_PAGE_SHIFT)
-
 /*
  * The specification says: "The partition reference time is computed
  * by the following formula:
-- 
2.39.5 (Apple Git-154)



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Subject: [PATCH v1 1/2] xen/page_alloc: address violation of Rule 14.3
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From: Federico Serafini 

MISRA C Rule 14.3 states that "Controlling expressions shall not be
invariant".

Add a SAF comment to deviate the rule for build configurations without
CONFIG_LLC_COLORING enabled.

Signed-off-by: Federico Serafini 
Signed-off-by: Victor Lira 
---
Cc: Andrew Cooper 
Cc: Anthony PERARD 
Cc: Michal Orzel 
Cc: Jan Beulich 
Cc: Julien Grall 
Cc: Roger Pau Monné 
Cc: Stefano Stabellini 
Cc: Nicola Vetrini 
Cc: Federico Serafini 
Cc: Bertrand Marquis 
---

 docs/misra/safe.json    | 8 ++++++++
 xen/common/page_alloc.c | 1 +
 2 files changed, 9 insertions(+)

diff --git a/docs/misra/safe.json b/docs/misra/safe.json
index e3489dba8e..9438815d19 100644
--- a/docs/misra/safe.json
+++ b/docs/misra/safe.json
@@ -116,6 +116,14 @@
         },
         {
             "id": "SAF-14-safe",
+            "analyser": {
+                  "eclair": "MC3A2.R14.3"
+            },
+            "name": "Rule 14.3: loop controlling expression is invariant due to the build configuration",
+            "text": "The controlling expression of a loop can be invariant in a specific build configuration."
+        },
+        {
+            "id": "SAF-15-safe",
             "analyser": {},
             "name": "Sentinel",
             "text": "Next ID to be used"
diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c
index bd4538c28d..6d6ca7ca50 100644
--- a/xen/common/page_alloc.c
+++ b/xen/common/page_alloc.c
@@ -2038,6 +2038,7 @@ static struct page_info *alloc_color_heap_page(unsigned int memflags,

     spin_lock(&heap_lock);

+    /* SAF-14-safe MISRA C R14.3 condition always false without LLC_COLORING */
     for ( i = 0; i < domain_num_llc_colors(d); i++ )
     {
         unsigned long free = free_colored_pages[domain_llc_color(d, i)];
--
2.47.0


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Subject: [PATCH v1 2/2] automation/eclair: add Rule 14.3 to the monitored set
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From: Federico Serafini 

MISRA C Rule 14.3 is already tagged as clean: add it to the
monitored set to avoid regressions.

Signed-off-by: Federico Serafini 
Signed-off-by: Victor Lira 
---
Cc: Andrew Cooper 
Cc: Anthony PERARD 
Cc: Michal Orzel 
Cc: Jan Beulich 
Cc: Julien Grall 
Cc: Roger Pau Monné 
Cc: Stefano Stabellini 
Cc: Nicola Vetrini 
Cc: Federico Serafini 
Cc: Bertrand Marquis 
---

 automation/eclair_analysis/ECLAIR/monitored.ecl | 1 +
 1 file changed, 1 insertion(+)

diff --git a/automation/eclair_analysis/ECLAIR/monitored.ecl b/automation/eclair_analysis/ECLAIR/monitored.ecl
index 8351996ec8..ca2f5e3c7f 100644
--- a/automation/eclair_analysis/ECLAIR/monitored.ecl
+++ b/automation/eclair_analysis/ECLAIR/monitored.ecl
@@ -53,6 +53,7 @@
 -enable=MC3A2.R13.2
 -enable=MC3A2.R13.6
 -enable=MC3A2.R14.1
+-enable=MC3A2.R14.3
 -enable=MC3A2.R14.4
 -enable=MC3A2.R16.2
 -enable=MC3A2.R16.3
--
2.47.0


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Date: Fri, 25 Apr 2025 21:53:58 -0400
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Subject: Re: [RFC 33/38] x86/boot: refactor bzimage parser to be re-enterant
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To: Jason Andryuk , xen-devel@lists.xenproject.org
Cc: stefano.stabellini@amd.com, agarciav@amd.com,
 Jan Beulich , Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
References: <20250419220820.4234-1-dpsmith@apertussolutions.com>
 <20250419220820.4234-34-dpsmith@apertussolutions.com>
 
From: "Daniel P. Smith" 
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On 4/23/25 15:27, Jason Andryuk wrote:
> On 2025-04-19 18:08, Daniel P. Smith wrote:
>> The bzimage logic uses the unit global orig_image_len to hold the 
>> original
>> module length for the kernel when the headroom is calculated. It then 
>> uses
>> orig_image_len to locate the start of the bzimage when the expansion 
>> is done.
>> This is an issue when more than one bzimage is processed by the headroom
>> calculation logic, as it will leave orig_image_len set to the length 
>> of the
>> last bzimage it processed.
>>
>> The boot module work introduced storing the headroom size on a per module
>> basis. By passing in the headroom from the boot module, orig_image_len 
>> is no
>> longer needed to locate the beginning of the bzimage after the allocated
>> headroom. The bzimage functions are reworked as such, allowing the 
>> removal of
>> orig_image_len and enabling them to be reused by multiple kernel boot 
>> modules.
>>
>> Signed-off-by: Daniel P. Smith 
>> ---
>>   xen/arch/x86/bzimage.c             | 38 ++++++++++++++++++------------
>>   xen/arch/x86/hvm/dom_build.c       |  3 ++-
>>   xen/arch/x86/include/asm/bzimage.h |  5 ++--
>>   xen/arch/x86/pv/dom0_build.c       |  3 ++-
>>   4 files changed, 30 insertions(+), 19 deletions(-)
>>
>> diff --git a/xen/arch/x86/bzimage.c b/xen/arch/x86/bzimage.c
>> index 66f648f311e4..32f0360d25b4 100644
> 
>> @@ -103,13 +100,20 @@ unsigned long __init bzimage_headroom(void 
>> *image_start,
>>       return headroom;
>>   }
>> -int __init bzimage_parse(void *image_base, void **image_start,
>> -                         unsigned long *image_len)
>> +int __init bzimage_parse(
>> +    void *image_base, void **image_start, unsigned long headroom,
>> +    unsigned long *image_len)
>>   {
>>       struct setup_header *hdr = (struct setup_header *)(*image_start);
>>       int err = bzimage_check(hdr, *image_len);
>> -    unsigned long output_len;
>> -
>> +    unsigned long module_len = *image_len;
>> +
>> +    /*
>> +     * Variable err will have one of three values:
>> +     *   -  < 0: a error occurred trying to inspect the contents
>> +     *   -  > 0: the image is a bzImage
>> +     *   - == 0: not a bzImage, could be raw elf or elf.gz (vmlinuz.gz)
>> +     */
> 
> This comment seems a little independent of this change, so maybe it 
> should be submitted separately.  Also, I think a better placement would 
> be next to bzimage_check().
> 
>>       if ( err < 0 )
>>           return err;
>> @@ -118,21 +122,25 @@ int __init bzimage_parse(void *image_base, void 
>> **image_start,
>>           *image_start += (hdr->setup_sects + 1) * 512 + hdr- 
>> >payload_offset;
>>           *image_len = hdr->payload_length;
> 
> @here
> 
>>       }
>> -
>> -    if ( elf_is_elfbinary(*image_start, *image_len) )
>> -        return 0;
>> +    else
>> +    {
>> +        if ( elf_is_elfbinary(*image_start, *image_len) )
>> +            return 0;
>> +        else
>> +            *image_len = *image_len - headroom;
>> +    }
> 
> I don't like this extra indention which includes the return.  If you 
> retain orig_image_len as a local variable, and set it above at "@here", 
> you can have a smaller diff and leave cleaner logic.

Right, but I find it sillier to be checking every kernel for elf when we 
know it's a bzImage. While the elf check is fairly simplistic, it is 
still multiple value checks.

> orig_image_len previously was set as a static variable, so the correct
> value was set after bzimage_headroom.  Now that it is no longer static,
> we need to grab the hdr->payload_length value when we have a bzImage.
> Otherwise output_length will read past the end of the module.

Yes, I am fully aware.

> Below is the diff for bzimage.c with the change I suggest.

I will provide an alternate version.

v/r,
dps


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To: Stefano Stabellini 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, Andrei Cherechesu , michal.orzel@amd.com, jason.andryuk@amd.com
Subject: Re: [PATCH v7] uboot-script-gen: Dynamically compute addr and size when loading binaries
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On Fri, Apr 25, 2025 at 04:35:06PM -0700, Stefano Stabellini wrote:
> From: Andrei Cherechesu 
>=20
> Normally, the Imagebuilder would precompute the sizes of the loaded
> binaries and addresses where they are loaded before generating the
> script, and the sizes and addresses that needed to be provided to
> Xen via /chosen would be hardcoded in the boot script.
>=20
> Added an option via "-s" parameter to avoid hardcoding any
> address in the boot script, and dynamically compute the
> loading addresses for binaries. The first loading address is based
> on the MEMORY_START parameter and after loading each binary,
> the loading address and the size of the binary are stored in
> variables with corresponding names. Then, the loading address
> for the next binary is computed and aligned to 0x200000.
>=20
> If the "-s" parameter is not used, the normal flow is executed,
> where the loading addresses and sizes for each binaries are
> precomputed and hardcoded inside the script, but the loading
> addresses and sizes for each binary are now also stored for eventual
> later use.
>=20
> Reserved memory regions are left TBD in the -s case.
>=20
> Link: https://lists.xenproject.org/archives/html/xen-devel/2022-09/msg018=
62.html
> Signed-off-by: Andrei Cherechesu 
> Signed-off-by: Stefano Stabellini 

Reviewed-by: Denis Mukhin 

> ---
> Changes in v7:
> - use $()
> - better description and alphabetical order
> - use heredoc
>=20
> Changes in v6:
> - make initial ${memaddr} setting depending on CALC
>=20
> This patch adds quite a bit of complexity which is the reason why I
> didn't originally commit it. Now that we are enabling ImageBuilder in
> Yocto, it turns out this patch is required because Yocto invokes
> ImageBuilder before all the binaries are ready and available.
>=20
> Andrei, sorry for taking so long to realize why it is essential, but we
> are getting there now.
>=20
> The changes I made to the original patch are purely to make it simpler
> to maintain.
> ---
>=20
> diff --git a/README.md b/README.md
> index f8039ec..28c9e6b 100644
> --- a/README.md
> +++ b/README.md
> @@ -356,6 +356,8 @@ Where:\
>     can only be used  in combination with the -k option.  This adds the
>     public key into the dtb.  Then one can add this dtb back into the
>     u-boot bin or elf.\
> +-s addresses and sizes are calculated dynamically from U-Boot, hence
> +   binaries don't need to be available at the time of invocation.\
>=20
>  ### Signed FIT images
>=20
> diff --git a/scripts/uboot-script-gen b/scripts/uboot-script-gen
> index 638154a..73d9600 100755
> --- a/scripts/uboot-script-gen
> +++ b/scripts/uboot-script-gen
> @@ -1,8 +1,11 @@
>  #!/bin/bash
>=20
>  offset=3D$((2*1024*1024))
> +PADDING_MASK=3D$(printf "0x%X\n" $(($offset - 1)))
> +PADDING_MASK_INV=3D$(printf "0x%X\n" $((~$PADDING_MASK)))
>  filesize=3D0
>  prog_req=3D(mkimage file fdtput mktemp awk od)
> +CALC=3D""
>=20
>  function cleanup_and_return_err()
>  {
> @@ -100,17 +103,40 @@ function dt_set()
>      fi
>  }
>=20
> +function dt_set_calc()
> +{
> +    local path=3D$1
> +    local var=3D$2
> +    local name_var=3D$3
> +
> +    local addr_var=3D"$name_var"_addr
> +    local size_var=3D"$name_var"_size
> +
> +    cat >> $UBOOT_SOURCE <<- EOF
> +=09setexpr addr_hi \${$addr_var} / 0x100000000
> +=09setexpr addr_lo \${$addr_var} \& 0xFFFFFFFF
> +=09setexpr size_hi \${$size_var} / 0x100000000
> +=09setexpr size_lo \${$size_var} \& 0xFFFFFFFF
> +=09fdt set $path $var <0x\${addr_hi} 0x\${addr_lo} 0x\${size_hi} 0x\${si=
ze_lo}>
> +=09EOF
> +}
> +
>  function add_device_tree_kernel()
>  {
>      local path=3D$1
> -    local addr=3D$2
> -    local size=3D$3
> -    local bootargs=3D$4
> +    local name=3D$2
> +    local addr=3D$3
> +    local size=3D$4
> +    local bootargs=3D$5
>      local node_name=3D"module@${addr#0x}"
>=20
>      dt_mknode "$path" "$node_name"
>      dt_set "$path/$node_name" "compatible" "str_a" "multiboot,kernel mul=
tiboot,module"
> -    dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $siz=
e)"
> +    if test "$CALC"; then
> +        dt_set_calc "$path/$node_name" "reg" $name
> +    else
> +        dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr =
$size)"
> +    fi
>      dt_set "$path/$node_name" "bootargs" "str" "$bootargs"
>  }
>=20
> @@ -118,26 +144,36 @@ function add_device_tree_kernel()
>  function add_device_tree_ramdisk()
>  {
>      local path=3D$1
> -    local addr=3D$2
> -    local size=3D$3
> +    local name=3D$2
> +    local addr=3D$3
> +    local size=3D$4
>      local node_name=3D"module@${addr#0x}"
>=20
>      dt_mknode "$path"  "$node_name"
>      dt_set "$path/$node_name" "compatible" "str_a" "multiboot,ramdisk mu=
ltiboot,module"
> -    dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $siz=
e)"
> +    if test "$CALC"; then
> +        dt_set_calc "$path/$node_name" "reg" $name
> +    else
> +        dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr =
$size)"
> +    fi
>  }
>=20
>=20
>  function add_device_tree_passthrough()
>  {
>      local path=3D$1
> -    local addr=3D$2
> -    local size=3D$3
> +    local name=3D$2
> +    local addr=3D$3
> +    local size=3D$4
>      local node_name=3D"module@${addr#0x}"
>=20
>      dt_mknode "$path"  "$node_name"
>      dt_set "$path/$node_name" "compatible" "str_a" "multiboot,device-tre=
e multiboot,module"
> -    dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $siz=
e)"
> +    if test "$CALC"; then
> +        dt_set_calc "$path/$node_name" "reg" $name
> +    else
> +        dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr =
$size)"
> +    fi
>  }
>=20
>  function add_device_tree_mem()
> @@ -358,7 +394,11 @@ function xen_device_tree_editing()
>=20
>          dt_mknode "/chosen" "$node_name"
>          dt_set "/chosen/$node_name" "compatible" "str_a" "xen,xsm-policy=
 xen,multiboot-module multiboot,module"
> -        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $xen_=
policy_addr $xen_policy_size)"
> +        if test "$CALC"; then
> +            dt_set_calc "/chosen/$node_name" "reg" "xen_policy"
> +        else
> +            dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $=
xen_policy_addr $xen_policy_size)"
> +        fi
>      fi
>=20
>      if test "$DOM0_KERNEL"
> @@ -367,7 +407,11 @@ function xen_device_tree_editing()
>=20
>          dt_mknode "/chosen" "$node_name"
>          dt_set "/chosen/$node_name" "compatible" "str_a" "xen,linux-zima=
ge xen,multiboot-module multiboot,module"
> -        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $dom0=
_kernel_addr $dom0_kernel_size)"
> +        if test "$CALC"; then
> +            dt_set_calc "/chosen/$node_name" "reg" "dom0_linux"
> +        else
> +            dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $=
dom0_kernel_addr $dom0_kernel_size)"
> +        fi
>          dt_set "/chosen" "xen,dom0-bootargs" "str" "$DOM0_CMD"
>      fi
>=20
> @@ -377,7 +421,11 @@ function xen_device_tree_editing()
>=20
>          dt_mknode "/chosen" "$node_name"
>          dt_set "/chosen/$node_name" "compatible" "str_a" "xen,linux-init=
rd xen,multiboot-module multiboot,module"
> -        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $ramd=
isk_addr $ramdisk_size)"
> +        if test "$CALC"; then
> +            dt_set_calc "/chosen/$node_name" "reg" "dom0_ramdisk"
> +        else
> +            dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $=
ramdisk_addr $ramdisk_size)"
> +        fi
>      fi
>=20
>      i=3D0
> @@ -464,14 +512,14 @@ function xen_device_tree_editing()
>=20
>          xen_dt_domu_add_vcpu_nodes "/chosen/domU$i" $i ${DOMU_VCPUS[$i]}
>=20
> -        add_device_tree_kernel "/chosen/domU$i" ${domU_kernel_addr[$i]} =
${domU_kernel_size[$i]} "${DOMU_CMD[$i]}"
> +        add_device_tree_kernel "/chosen/domU$i" "domU${i}_kernel" ${domU=
_kernel_addr[$i]} ${domU_kernel_size[$i]} "${DOMU_CMD[$i]}"
>          if test "${domU_ramdisk_addr[$i]}"
>          then
> -            add_device_tree_ramdisk "/chosen/domU$i" ${domU_ramdisk_addr=
[$i]} ${domU_ramdisk_size[$i]}
> +            add_device_tree_ramdisk "/chosen/domU$i" "domU${i}_ramdisk" =
${domU_ramdisk_addr[$i]} ${domU_ramdisk_size[$i]}
>          fi
>          if test "${domU_passthrough_dtb_addr[$i]}"
>          then
> -            add_device_tree_passthrough "/chosen/domU$i" ${domU_passthro=
ugh_dtb_addr[$i]} ${domU_passthrough_dtb_size[$i]}
> +            add_device_tree_passthrough "/chosen/domU$i" "domU${i}_fdt" =
${domU_passthrough_dtb_addr[$i]} ${domU_passthrough_dtb_size[$i]}
>          fi
>          i=3D$(( $i + 1 ))
>      done
> @@ -504,7 +552,11 @@ function device_tree_editing()
>=20
>      if test $UBOOT_SOURCE
>      then
> -        echo "fdt addr $device_tree_addr" >> $UBOOT_SOURCE
> +        if test "$CALC"; then
> +            echo "fdt addr \${host_fdt_addr}" >> $UBOOT_SOURCE
> +        else
> +            echo "fdt addr $device_tree_addr" >> $UBOOT_SOURCE
> +        fi
>          echo "fdt resize 1024" >> $UBOOT_SOURCE
>=20
>          if test $NUM_DT_OVERLAY && test $NUM_DT_OVERLAY -gt 0
> @@ -512,7 +564,11 @@ function device_tree_editing()
>              i=3D0
>              while test $i -lt $NUM_DT_OVERLAY
>              do
> -                echo "fdt apply ${dt_overlay_addr[$i]}" >> $UBOOT_SOURCE
> +                if test "$CALC"; then
> +                    echo "fdt apply \${host_fdto${i}_addr}" >> $UBOOT_SO=
URCE
> +                else
> +                    echo "fdt apply ${dt_overlay_addr[$i]}" >> $UBOOT_SO=
URCE
> +                fi
>                  i=3D$(( $i + 1 ))
>              done
>          fi
> @@ -530,8 +586,12 @@ function fill_reserved_spaces_from_dtb()
>  {
>      if [ ! -f $DEVICE_TREE ]
>      then
> -        echo "File $DEVICE_TREE doesn't exist, exiting";
> -        cleanup_and_return_err
> +        if test "$CALC"; then
> +            return
> +        else
> +            echo "File $DEVICE_TREE doesn't exist, exiting";
> +            cleanup_and_return_err
> +        fi
>      fi
>=20
>      # Check if reserved-memory node exists
> @@ -613,7 +673,7 @@ function get_image_size()
>      printf "%u" $effective_size
>  }
>=20
> -function add_size()
> +function add_size_from_file()
>  {
>      local filename=3D$1
>      local size=3D`stat -L --printf=3D"%s" $filename`
> @@ -645,6 +705,26 @@ function add_size()
>      filesize=3D$size
>  }
>=20
> +function add_size_calculate()
> +{
> +    local fit_scr_name=3D$1
> +
> +    cat >> $UBOOT_SOURCE <<- EOF
> +=09setenv "$fit_scr_name"_addr \${memaddr}
> +=09setenv "$fit_scr_name"_size \${filesize}
> +=09setexpr memaddr \${memaddr} \+ \${filesize}
> +=09setexpr memaddr \${memaddr} \+ $PADDING_MASK
> +=09setexpr memaddr \${memaddr} \& $PADDING_MASK_INV
> +=09EOF
> +
> +    # TODO: missing ${RESERVED_MEM_SPACES[@]} check
> +
> +    # The following are updated to avoid collisions in node names, but
> +    # they are not actively used.
> +    memaddr=3D$((memaddr + offset))
> +    filesize=3D$offset
> +}
> +
>  function load_file()
>  {
>      local filename=3D$1
> @@ -657,10 +737,16 @@ function load_file()
>      if test "$FIT"
>      then
>          echo "imxtract \$fit_addr $fit_scr_name $memaddr" >> $UBOOT_SOUR=
CE
> +        add_size_from_file $filename
>      else
> -        echo "$LOAD_CMD $memaddr ${prepend_path:+$prepend_path/}$relativ=
e_path" >> $UBOOT_SOURCE
> +        if test "$CALC"; then
> +            echo "$LOAD_CMD \${memaddr} ${prepend_path:+$prepend_path/}$=
relative_path" >> $UBOOT_SOURCE
> +            add_size_calculate $fit_scr_name
> +        else
> +            echo "$LOAD_CMD $memaddr ${prepend_path:+$prepend_path/}$rel=
ative_path" >> $UBOOT_SOURCE
> +            add_size_from_file $filename
> +        fi
>      fi
> -    add_size $filename
>  }
>=20
>  function check_file_type()
> @@ -670,8 +756,13 @@ function check_file_type()
>=20
>      if [ ! -f $filename ]
>      then
> -        echo "File $filename doesn't exist, exiting";
> -        cleanup_and_return_err
> +        if test "$CALC"
> +        then
> +            return
> +        else
> +            echo "File $filename doesn't exist, exiting";
> +            cleanup_and_return_err
> +        fi
>      fi
>=20
>      # if file doesn't know what it is, it outputs data, so include that
> @@ -705,8 +796,13 @@ function check_compressed_file_type()
>=20
>      if [ ! -f $filename ]
>      then
> -        echo "File $filename doesn't exist, exiting";
> -        cleanup_and_return_err
> +        if test "$CALC"
> +        then
> +            return
> +        else
> +            echo "File $filename doesn't exist, exiting";
> +            cleanup_and_return_err
> +        fi
>      fi
>=20
>      file_type=3D$( file -L $filename )
> @@ -872,6 +968,12 @@ function linux_config()
>  generate_uboot_images()
>  {
>      local arch=3D$(file -L $XEN | grep -E 'ARM64|Aarch64')
> +
> +    if test "$CALC"
> +    then
> +        echo "bootm is not compatible with -s"
> +        cleanup_and_return_err
> +    fi
>=20
>      if test "$arch"
>      then
> @@ -997,7 +1099,11 @@ bitstream_load_and_config()
>          if test "$UBOOT_SOURCE"
>          then
>              # we assume the FPGA device is 0 here
> -            echo "fpga load 0 $bitstream_addr $bitstream_size" >> "$UBOO=
T_SOURCE"
> +            if test "$CALC"; then
> +                echo "fpga load 0 \${fpga_bitstream_addr} \${fpga_bitstr=
eam_size}" >> "$UBOOT_SOURCE"
> +            else
> +                echo "fpga load 0 $bitstream_addr $bitstream_size" >> "$=
UBOOT_SOURCE"
> +            fi
>          fi
>      fi
>  }
> @@ -1271,7 +1377,7 @@ function print_help
>  {
>      script=3D`basename "$0"`
>      echo "usage:"
> -    echo "=09$script -c CONFIG_FILE -d DIRECTORY [-t LOAD_CMD] [-o FILE]=
 [-k KEY_DIR/HINT [-u U-BOOT_DTB]] [-e] [-f] [-p PREPEND_PATH]"
> +    echo "=09$script -c CONFIG_FILE -d DIRECTORY [-t LOAD_CMD] [-o FILE]=
 [-k KEY_DIR/HINT [-u U-BOOT_DTB]] [-e] [-f] [-p PREPEND_PATH] [-s]"
>      echo "=09$script -h"
>      echo "where:"
>      echo "=09CONFIG_FILE - configuration file"
> @@ -1289,13 +1395,14 @@ function print_help
>      echo "=09-f - enable generating a FIT image"
>      echo "=09PREPEND_PATH - path to be appended before file names to mat=
ch deploy location within rootfs"
>      echo "=09-h - prints out the help message and exits "
> +    echo "=09-s - let U-Boot calculate binary images load addresses/size=
s dynamically"
>      echo "Defaults:"
>      echo "=09CONFIG_FILE=3D$cfg_file, UBOOT_TYPE=3D\"LOAD_CMD\" env var,=
 DIRECTORY=3D$uboot_dir"
>      echo "Example:"
>      echo "=09$script -c ../config -d ./build42 -t \"scsi load 1:1\""
>  }
>=20
> -while getopts ":c:t:d:ho:k:u:fp:" opt; do
> +while getopts ":c:t:d:ho:k:u:fp:s" opt; do
>      case ${opt} in
>      t )
>          case $OPTARG in
> @@ -1340,6 +1447,9 @@ while getopts ":c:t:d:ho:k:u:fp:" opt; do
>      p )
>          prepend_path=3D"$OPTARG"
>          ;;
> +    s )
> +        CALC=3Dy
> +        ;;
>      h )
>          print_help
>          exit 0
> @@ -1533,6 +1643,10 @@ uboot_addr=3D$memaddr
>  # 2MB are enough for a uboot script
>  memaddr=3D$(( $memaddr + $offset ))
>  memaddr=3D`printf "0x%X\n" $memaddr`
> +if test "$CALC"
> +then
> +    echo "setenv memaddr $memaddr" >> $UBOOT_SOURCE
> +fi
>=20
>  fill_reserved_spaces_from_dtb
>=20
> @@ -1583,7 +1697,11 @@ fi
>=20
>  if [ "$BOOT_CMD" !=3D "none" ]
>  then
> -    echo "$BOOT_CMD $kernel_addr $([ "$BOOT_CMD" =3D "bootefi" ] || echo=
 '-') $device_tree_addr" >> $UBOOT_SOURCE
> +    if test "$CALC"; then
> +        echo "$BOOT_CMD \${host_kernel_addr} $([ "$BOOT_CMD" =3D "bootef=
i" ] || echo '-') \${host_fdt_addr}" >> $UBOOT_SOURCE
> +    else
> +        echo "$BOOT_CMD $kernel_addr $([ "$BOOT_CMD" =3D "bootefi" ] || =
echo '-') $device_tree_addr" >> $UBOOT_SOURCE
> +    fi
>  else
>      # skip boot command but store load addresses to be used later
>      echo "setenv host_kernel_addr $kernel_addr" >> $UBOOT_SOURCE



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Date: Sat, 26 Apr 2025 07:27:12 +0000
To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, jbeulich@suse.com, roger.pau@citrix.com, dmukhin@ford.com
Subject: [PATCH v4 0/3] x86/vmx: Update __vmread()
Message-ID: <20250426072656.39259-1-dmukhin@ford.com>
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The patch series reworks __vmread() by introducing a new cleaner API.

Patch 1 introduces a new vmread() call which will be a replacement for
__vmcall().
Patch 2 updates the type of arch_vcpu->dr7 field.
Patch 3 replaces __vmread() with vmread().

Link to v3: https://lore.kernel.org/xen-devel/20250422215833.522007-1-dmukh=
in@ford.com/
Link to CI: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines/1=
787132005

Denis Mukhin (3):
  x86/vmx: Introduce vmread()
  x86/vmx: Update arch_vcpu->dr7 type
  x86/vmx: Replace __vmread() with vmread()

 docs/misra/function-macro-properties.json |   9 -
 xen/arch/x86/cpu/vpmu_intel.c             |   3 +-
 xen/arch/x86/hvm/vmx/intr.c               |  26 +--
 xen/arch/x86/hvm/vmx/realmode.c           |   2 +-
 xen/arch/x86/hvm/vmx/vmcs.c               |  11 +-
 xen/arch/x86/hvm/vmx/vmx.c                | 210 ++++++++++------------
 xen/arch/x86/hvm/vmx/vvmx.c               |  43 ++---
 xen/arch/x86/include/asm/domain.h         |   2 +-
 xen/arch/x86/include/asm/hvm/vmx/vmx.h    |  19 +-
 9 files changed, 134 insertions(+), 191 deletions(-)

--=20
2.34.1




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Date: Sat, 26 Apr 2025 07:27:29 +0000
To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, jbeulich@suse.com, roger.pau@citrix.com, dmukhin@ford.com
Subject: [PATCH v4 1/3] x86/vmx: Introduce vmread()
Message-ID: <20250426072720.39317-1-dmukhin@ford.com>
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From: Denis Mukhin 

The current implementation of __vmread() returns the result via pointer
argument which leads to excess code in some places.

Introduce a new vmread() function as suggested in [1].

[1] https://lore.kernel.org/xen-devel/c452a1d7-4a57-4c5f-8a83-36a74ff228ec@=
citrix.com/

Signed-off-by: Denis Mukhin 
---
 xen/arch/x86/include/asm/hvm/vmx/vmx.h | 24 +++++++++++++++---------
 1 file changed, 15 insertions(+), 9 deletions(-)

diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmx.h b/xen/arch/x86/include/=
asm/hvm/vmx/vmx.h
index 33d3d43a38..cc8c53fab1 100644
--- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h
+++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h
@@ -320,16 +320,25 @@ static always_inline void __vmpclear(u64 addr)
     BUG();
 }
=20
-static always_inline void __vmread(unsigned long field, unsigned long *val=
ue)
+static always_inline unsigned long vmread(unsigned long field)
 {
-    asm volatile ( "vmread %1, %0\n\t"
+    unsigned long value;
+
+    asm volatile ( "vmread %[field], %[value]\n\t"
                    /* CF=3D=3D1 or ZF=3D=3D1 --> BUG() */
                    UNLIKELY_START(be, vmread)
                    _ASM_BUGFRAME_TEXT(0)
                    UNLIKELY_END_SECTION
-                   : "=3Drm" (*value)
-                   : "r" (field),
+                   : [value] "=3Drm" (value)
+                   : [field] "r" (field),
                      _ASM_BUGFRAME_INFO(BUGFRAME_bug, __LINE__, __FILE__, =
0) );
+
+    return value;
+}
+
+static always_inline void __vmread(unsigned long field, unsigned long *val=
ue)
+{
+    *value =3D vmread(field);
 }
=20
 static always_inline void __vmwrite(unsigned long field, unsigned long val=
ue)
@@ -363,7 +372,7 @@ static inline enum vmx_insn_errno vmread_safe(unsigned =
long field,
     if ( unlikely(fail_invalid) )
         ret =3D VMX_INSN_FAIL_INVALID;
     else if ( unlikely(fail_valid) )
-        __vmread(VM_INSTRUCTION_ERROR, &ret);
+        ret =3D vmread(VM_INSTRUCTION_ERROR);
=20
     return ret;
 }
@@ -371,8 +380,6 @@ static inline enum vmx_insn_errno vmread_safe(unsigned =
long field,
 static inline enum vmx_insn_errno vmwrite_safe(unsigned long field,
                                                unsigned long value)
 {
-    unsigned long ret;
-
     asm goto ( "vmwrite %[value], %[field]\n\t"
                "jc %l[vmfail_invalid]\n\t"
                "jz %l[vmfail_error]"
@@ -386,8 +393,7 @@ static inline enum vmx_insn_errno vmwrite_safe(unsigned=
 long field,
     return VMX_INSN_FAIL_INVALID;
=20
  vmfail_error:
-    __vmread(VM_INSTRUCTION_ERROR, &ret);
-    return ret;
+    return vmread(VM_INSTRUCTION_ERROR);
 }
=20
 static always_inline void __invept(unsigned long type, uint64_t eptp)
--=20
2.34.1




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To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, jbeulich@suse.com, roger.pau@citrix.com, dmukhin@ford.com
Subject: [PATCH v4 2/3] x86/vmx: Update DR7 type
Message-ID: <20250426072739.39373-1-dmukhin@ford.com>
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From: Denis Mukhin 

Convert the DR7 type to `unsigned int` and fix the accesses where necessary=
.

[1] https://lore.kernel.org/xen-devel/0d01646b-83e3-4a02-b365-d149d2664e73@=
citrix.com/

Signed-off-by: Denis Mukhin 
---
 xen/arch/x86/hvm/vmx/vmx.c        | 2 +-
 xen/arch/x86/include/asm/domain.h | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c
index 4883bd823d..75c6992172 100644
--- a/xen/arch/x86/hvm/vmx/vmx.c
+++ b/xen/arch/x86/hvm/vmx/vmx.c
@@ -926,7 +926,7 @@ static void vmx_save_dr(struct vcpu *v)
     v->arch.dr[3] =3D read_debugreg(3);
     v->arch.dr6   =3D read_debugreg(6);
     /* DR7 must be saved as it is used by vmx_restore_dr(). */
-    __vmread(GUEST_DR7, &v->arch.dr7);
+    v->arch.dr7 =3D vmread(GUEST_DR7);
 }
=20
 static void __restore_debug_registers(struct vcpu *v)
diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm/d=
omain.h
index 5fc1d1e5d0..a54ef3a8c1 100644
--- a/xen/arch/x86/include/asm/domain.h
+++ b/xen/arch/x86/include/asm/domain.h
@@ -595,7 +595,7 @@ struct arch_vcpu
=20
     /* Debug registers. */
     unsigned long dr[4];
-    unsigned long dr7; /* Ideally int, but __vmread() needs long. */
+    unsigned int dr7;
     unsigned int dr6;
=20
     /* other state */
--=20
2.34.1




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Subject: Re: [PATCH v3 01/14] x86/msr: Move rdtsc{,_ordered}() to 
To: =?UTF-8?Q?Ilpo_J=C3=A4rvinen?= 
Cc: LKML , kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        Netdev , platform-driver-x86@vger.kernel.org,
        tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
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        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com,
        dapeng1.mi@linux.intel.com
References: <20250425083442.2390017-1-xin@zytor.com>
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In-Reply-To: <42dc90e1-df2a-2324-d28c-d75fb525e4a2@linux.intel.com>
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On 4/25/2025 8:45 AM, Ilpo Järvinen wrote:
> To me this looks really a random set of source files, maybe it helped some
> build success but it's hard for me to review this because there are still
> cases that depend on indirect include chains.
> 
> Could you just look into solving all missing msr.h includes instead
> as clearly some are still missing after 3 pre-existing ones and you adding
> it into 3 files:
> 
> $ git grep -e rdmsr -e wrmsr -l drivers/platform/x86/
> drivers/platform/x86/intel/ifs/core.c
> drivers/platform/x86/intel/ifs/load.c
> drivers/platform/x86/intel/ifs/runtest.c
> drivers/platform/x86/intel/pmc/cnp.c
> drivers/platform/x86/intel/pmc/core.c
> drivers/platform/x86/intel/speed_select_if/isst_if_common.c
> drivers/platform/x86/intel/speed_select_if/isst_if_mbox_msr.c
> drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c
> drivers/platform/x86/intel/tpmi_power_domains.c
> drivers/platform/x86/intel/turbo_max_3.c
> drivers/platform/x86/intel/uncore-frequency/uncore-frequency.c
> drivers/platform/x86/intel_ips.c
> 
> $ git grep -e 'msr.h' -l drivers/platform/x86/
> drivers/platform/x86/intel/pmc/core.c
> drivers/platform/x86/intel/tpmi_power_domains.c
> drivers/platform/x86/intel_ips.c

I think you want me to add all necessary direct inclusions, right?

This is the right thing to do, and I did try it but gave up later.

I will do it in the next iteration as you asked.  But I want to make my
points:

1) It's not just two patterns {rd,wr}msr, there are a lot of definitions
    in  and we need to cover all of them:

       struct msr_info
       struct msr_regs_info
       struct saved_msr
       struct saved_msrs
       {read,write}_msr
       rdpmc
       .*msr.*_on_cpu

2) Once all necessary direct inclusions are in place, it's easy to
    overlook adding a header inclusion in practice, especially if the
    build passes.  Besides we often forget to remove a header when a
    definition is removed.  In other words, direct inclusion is hard to
    maintain.

3) Some random kernel configuration combinations can cause the current
    kernel build to fail.  I hit one in x86 UML.


We all know Ingo is the best person to discuss this with :).  While my
understanding of the header inclusion issue may be inaccurate or
outdated.

So for me, using "make allyesconfig" is a practical method for a quick
local build check, plus I always send my patches to Intel LKP.


There probably wants a script that identifies all files that reference a
definition in a header thus need to include it explicitly.  And indirect
includes should be zapped.


> 
> I'd also prefer the patch(es) adding missing includes be in a different
> patch.

Great suggestion!  It clearly highlights the most significant changes.

Thanks!
     Xin


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Date: Sat, 26 Apr 2025 07:28:27 +0000
To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, jbeulich@suse.com, roger.pau@citrix.com, nicola.vetrini@bugseng.com, consulting@bugseng.com, dmukhin@ford.com
Subject: [PATCH v4 3/3] x86/vmx: Replace __vmread() with vmread()
Message-ID: <20250426072819.39455-1-dmukhin@ford.com>
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From: Denis Mukhin 

Use vmread() instead of __vmread() as per suggestion in [1] everywhere in t=
he
VT-x code.

Remove __vmread() and update ECLAIR configuration.

[1] https://lore.kernel.org/xen-devel/0d01646b-83e3-4a02-b365-d149d2664e73@=
citrix.com/

Signed-off-by: Denis Mukhin 
---
 docs/misra/function-macro-properties.json |   9 -
 xen/arch/x86/cpu/vpmu_intel.c             |   3 +-
 xen/arch/x86/hvm/vmx/intr.c               |  26 +--
 xen/arch/x86/hvm/vmx/realmode.c           |   2 +-
 xen/arch/x86/hvm/vmx/vmcs.c               |  11 +-
 xen/arch/x86/hvm/vmx/vmx.c                | 208 ++++++++++------------
 xen/arch/x86/hvm/vmx/vvmx.c               |  43 ++---
 xen/arch/x86/include/asm/hvm/vmx/vmx.h    |   5 -
 8 files changed, 122 insertions(+), 185 deletions(-)

diff --git a/docs/misra/function-macro-properties.json b/docs/misra/functio=
n-macro-properties.json
index 74058297b5..59ba63626e 100644
--- a/docs/misra/function-macro-properties.json
+++ b/docs/misra/function-macro-properties.json
@@ -152,15 +152,6 @@
             "taken": ""
          }
       },
-      {
-         "type": "function",
-         "value": "^__vmread.*$",
-         "properties":{
-            "pointee_write": "2=3Dalways",
-            "pointee_read": "2=3Dnever",
-            "taken": ""
-         }
-      },
       {
          "type": "function",
          "value": "^hvm_pci_decode_addr.*$",
diff --git a/xen/arch/x86/cpu/vpmu_intel.c b/xen/arch/x86/cpu/vpmu_intel.c
index 7ce98ee42e..7860b7c055 100644
--- a/xen/arch/x86/cpu/vpmu_intel.c
+++ b/xen/arch/x86/cpu/vpmu_intel.c
@@ -796,8 +796,7 @@ static int cf_check core2_vpmu_do_interrupt(void)
     else
     {
         /* No PMC overflow but perhaps a Trace Message interrupt. */
-        __vmread(GUEST_IA32_DEBUGCTL, &msr_content);
-        if ( !(msr_content & IA32_DEBUGCTLMSR_TR) )
+        if ( !(vmread(GUEST_IA32_DEBUGCTL) & IA32_DEBUGCTLMSR_TR) )
             return 0;
     }
=20
diff --git a/xen/arch/x86/hvm/vmx/intr.c b/xen/arch/x86/hvm/vmx/intr.c
index 91b407e6bc..07b0811fd5 100644
--- a/xen/arch/x86/hvm/vmx/intr.c
+++ b/xen/arch/x86/hvm/vmx/intr.c
@@ -63,9 +63,8 @@ static void vmx_enable_intr_window(struct vcpu *v, struct=
 hvm_intack intack)
=20
     if ( unlikely(tb_init_done) )
     {
-        unsigned long intr;
+        unsigned long intr =3D vmread(VM_ENTRY_INTR_INFO);
=20
-        __vmread(VM_ENTRY_INTR_INFO, &intr);
         TRACE(TRC_HVM_INTR_WINDOW, intack.vector, intack.source,
               (intr & INTR_INFO_VALID_MASK) ? intr & 0xff : -1);
     }
@@ -81,9 +80,8 @@ static void vmx_enable_intr_window(struct vcpu *v, struct=
 hvm_intack intack)
          * we may immediately vmexit and hance make no progress!
          * (see SDM 3B 21.3, "Other Causes of VM Exits").
          */
-        unsigned long intr_shadow;
+        unsigned long intr_shadow =3D vmread(GUEST_INTERRUPTIBILITY_INFO);
=20
-        __vmread(GUEST_INTERRUPTIBILITY_INFO, &intr_shadow);
         if ( intr_shadow & VMX_INTR_SHADOW_STI )
         {
             /* Having both STI-blocking and MOV-SS-blocking fails vmentry.=
 */
@@ -144,14 +142,8 @@ enum hvm_intblk cf_check nvmx_intr_blocked(struct vcpu=
 *v)
         if ( nvcpu->nv_vmexit_pending ||
              nvcpu->nv_vmswitch_in_progress )
             r =3D hvm_intblk_rflags_ie;
-        else
-        {
-            unsigned long intr_info;
-
-            __vmread(VM_ENTRY_INTR_INFO, &intr_info);
-            if ( intr_info & INTR_INFO_VALID_MASK )
-                r =3D hvm_intblk_rflags_ie;
-        }
+        else if ( vmread(VM_ENTRY_INTR_INFO) & INTR_INFO_VALID_MASK )
+            r =3D hvm_intblk_rflags_ie;
     }
     else if ( nvcpu->nv_vmentry_pending )
         r =3D hvm_intblk_rflags_ie;
@@ -253,8 +245,6 @@ void asmlinkage vmx_intr_assist(void)
     pt_vector =3D pt_update_irq(v);
=20
     do {
-        unsigned long intr_info;
-
         intack =3D hvm_vcpu_has_pending_irq(v);
         if ( likely(intack.source =3D=3D hvm_intsrc_none) )
             goto out;
@@ -275,8 +265,7 @@ void asmlinkage vmx_intr_assist(void)
                 goto out;
             }
=20
-            __vmread(VM_ENTRY_INTR_INFO, &intr_info);
-            if ( intr_info & INTR_INFO_VALID_MASK )
+            if ( vmread(VM_ENTRY_INTR_INFO) & INTR_INFO_VALID_MASK )
             {
                 if ( (intack.source =3D=3D hvm_intsrc_pic) ||
                      (intack.source =3D=3D hvm_intsrc_nmi) ||
@@ -299,8 +288,7 @@ void asmlinkage vmx_intr_assist(void)
         }
         else
         {
-            __vmread(VM_ENTRY_INTR_INFO, &intr_info);
-            if ( intr_info & INTR_INFO_VALID_MASK )
+            if ( vmread(VM_ENTRY_INTR_INFO) & INTR_INFO_VALID_MASK )
             {
                 vmx_enable_intr_window(v, intack);
                 goto out;
@@ -377,7 +365,7 @@ void asmlinkage vmx_intr_assist(void)
         }
=20
         /* we need update the RVI field */
-        __vmread(GUEST_INTR_STATUS, &status);
+        status =3D vmread(GUEST_INTR_STATUS);
         status &=3D ~VMX_GUEST_INTR_STATUS_SUBFIELD_BITMASK;
         status |=3D VMX_GUEST_INTR_STATUS_SUBFIELD_BITMASK &
                     intack.vector;
diff --git a/xen/arch/x86/hvm/vmx/realmode.c b/xen/arch/x86/hvm/vmx/realmod=
e.c
index ff44ddcfa6..40cbc273d0 100644
--- a/xen/arch/x86/hvm/vmx/realmode.c
+++ b/xen/arch/x86/hvm/vmx/realmode.c
@@ -159,7 +159,7 @@ void vmx_realmode(struct cpu_user_regs *regs)
     unsigned int emulations =3D 0;
=20
     /* Get-and-clear VM_ENTRY_INTR_INFO. */
-    __vmread(VM_ENTRY_INTR_INFO, &intr_info);
+    intr_info =3D vmread(VM_ENTRY_INTR_INFO);
     if ( intr_info & INTR_INFO_VALID_MASK )
         __vmwrite(VM_ENTRY_INTR_INFO, 0);
=20
diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c
index a44475ae15..2386e67d28 100644
--- a/xen/arch/x86/hvm/vmx/vmcs.c
+++ b/xen/arch/x86/hvm/vmx/vmcs.c
@@ -1031,7 +1031,7 @@ u64 virtual_vmcs_vmread(const struct vcpu *v, u32 vmc=
s_encoding)
     u64 res;
=20
     virtual_vmcs_enter(v);
-    __vmread(vmcs_encoding, &res);
+    res =3D vmread(vmcs_encoding);
     virtual_vmcs_exit(v);
=20
     return res;
@@ -1691,7 +1691,7 @@ void vmx_vcpu_flush_pml_buffer(struct vcpu *v)
=20
     vmx_vmcs_enter(v);
=20
-    __vmread(GUEST_PML_INDEX, &pml_idx);
+    pml_idx =3D vmread(GUEST_PML_INDEX);
=20
     /* Do nothing if PML buffer is empty. */
     if ( pml_idx =3D=3D (NR_PML_ENTRIES - 1) )
@@ -1874,9 +1874,8 @@ void vmx_destroy_vmcs(struct vcpu *v)
 void vmx_vmentry_failure(void)
 {
     struct vcpu *curr =3D current;
-    unsigned long error;
+    unsigned long error =3D vmread(VM_INSTRUCTION_ERROR);
=20
-    __vmread(VM_INSTRUCTION_ERROR, &error);
     gprintk(XENLOG_ERR, "VM%s error: %#lx\n",
             curr->arch.hvm.vmx.launched ? "RESUME" : "LAUNCH", error);
=20
@@ -1905,7 +1904,6 @@ void cf_check vmx_do_resume(void)
 {
     struct vcpu *v =3D current;
     bool debug_state;
-    unsigned long host_cr4;
=20
     if ( v->arch.hvm.vmx.active_cpu =3D=3D smp_processor_id() )
         vmx_vmcs_reload(v);
@@ -1957,8 +1955,7 @@ void cf_check vmx_do_resume(void)
     hvm_do_resume(v);
=20
     /* Sync host CR4 in case its value has changed. */
-    __vmread(HOST_CR4, &host_cr4);
-    if ( host_cr4 !=3D read_cr4() )
+    if ( vmread(HOST_CR4) !=3D read_cr4() )
         __vmwrite(HOST_CR4, read_cr4());
=20
     reset_stack_and_jump(vmx_asm_do_vmentry);
diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c
index 75c6992172..272b3144d1 100644
--- a/xen/arch/x86/hvm/vmx/vmx.c
+++ b/xen/arch/x86/hvm/vmx/vmx.c
@@ -902,7 +902,7 @@ int cf_check vmx_guest_x86_mode(struct vcpu *v)
         return X86_MODE_REAL;
     if ( unlikely(guest_cpu_user_regs()->eflags & X86_EFLAGS_VM) )
         return X86_MODE_VM86;
-    __vmread(GUEST_CS_AR_BYTES, &cs_ar_bytes);
+    cs_ar_bytes =3D vmread(GUEST_CS_AR_BYTES);
     if ( hvm_long_mode_active(v) &&
          likely(cs_ar_bytes & X86_SEG_AR_CS_LM_ACTIVE) )
         return X86_MODE_64BIT;
@@ -952,7 +952,7 @@ static void __restore_debug_registers(struct vcpu *v)
  */
 static void vmx_restore_dr(struct vcpu *v)
 {
-    /* NB. __vmread() is not usable here, so we cannot read from the VMCS.=
 */
+    /* NB. vmread() is not usable here, so we cannot read from the VMCS. *=
/
     if ( unlikely(v->arch.dr7 & DR7_ACTIVE_MASK) )
         __restore_debug_registers(v);
 }
@@ -963,17 +963,17 @@ static void vmx_vmcs_save(struct vcpu *v, struct hvm_=
hw_cpu *c)
=20
     vmx_vmcs_enter(v);
=20
-    __vmread(GUEST_SYSENTER_CS, &c->sysenter_cs);
-    __vmread(GUEST_SYSENTER_ESP, &c->sysenter_esp);
-    __vmread(GUEST_SYSENTER_EIP, &c->sysenter_eip);
+    c->sysenter_cs =3D vmread(GUEST_SYSENTER_CS);
+    c->sysenter_esp =3D vmread(GUEST_SYSENTER_ESP);
+    c->sysenter_eip =3D vmread(GUEST_SYSENTER_EIP);
=20
-    __vmread(VM_ENTRY_INTR_INFO, &ev);
+    ev =3D vmread(VM_ENTRY_INTR_INFO);
     if ( (ev & INTR_INFO_VALID_MASK) &&
          hvm_event_needs_reinjection(MASK_EXTR(ev, INTR_INFO_INTR_TYPE_MAS=
K),
                                      ev & INTR_INFO_VECTOR_MASK) )
     {
         c->pending_event =3D ev;
-        __vmread(VM_ENTRY_EXCEPTION_ERROR_CODE, &ev);
+        ev =3D vmread(VM_ENTRY_EXCEPTION_ERROR_CODE);
         c->error_code =3D ev;
     }
=20
@@ -1197,11 +1197,7 @@ static void cf_check vmx_ctxt_switch_to(struct vcpu =
*v)
=20
 unsigned int vmx_get_cpl(void)
 {
-    unsigned long attr;
-
-    __vmread(GUEST_SS_AR_BYTES, &attr);
-
-    return MASK_EXTR(attr, X86_SEG_AR_DPL);
+    return MASK_EXTR(vmread(GUEST_SS_AR_BYTES), X86_SEG_AR_DPL);
 }
=20
 static unsigned int cf_check _vmx_get_cpl(struct vcpu *v)
@@ -1271,14 +1267,14 @@ static void cf_check vmx_get_segment_register(
         fallthrough;
=20
     case x86_seg_es ... x86_seg_gs:
-        __vmread(GUEST_SEG_SELECTOR(tmp_seg), &sel);
-        __vmread(GUEST_SEG_AR_BYTES(tmp_seg), &attr);
+        sel =3D vmread(GUEST_SEG_SELECTOR(tmp_seg));
+        attr =3D vmread(GUEST_SEG_AR_BYTES(tmp_seg));
         fallthrough;
=20
     case x86_seg_gdtr:
     case x86_seg_idtr:
-        __vmread(GUEST_SEG_LIMIT(tmp_seg),    &limit);
-        __vmread(GUEST_SEG_BASE(tmp_seg),     ®->base);
+        limit =3D vmread(GUEST_SEG_LIMIT(tmp_seg));
+        reg->base =3D vmread(GUEST_SEG_BASE(tmp_seg));
         break;
=20
     default:
@@ -1436,7 +1432,7 @@ static int cf_check vmx_get_guest_pat(struct vcpu *v,=
 u64 *gpat)
         return 0;
=20
     vmx_vmcs_enter(v);
-    __vmread(GUEST_PAT, gpat);
+    *gpat =3D vmread(GUEST_PAT);
     vmx_vmcs_exit(v);
     return 1;
 }
@@ -1555,11 +1551,7 @@ static void cf_check vmx_init_hypercall_page(void *p=
)
=20
 static unsigned int cf_check vmx_get_interrupt_shadow(struct vcpu *v)
 {
-    unsigned long intr_shadow;
-
-    __vmread(GUEST_INTERRUPTIBILITY_INFO, &intr_shadow);
-
-    return intr_shadow;
+    return vmread(GUEST_INTERRUPTIBILITY_INFO);
 }
=20
 static void cf_check vmx_set_interrupt_shadow(
@@ -1573,12 +1565,12 @@ static void cf_check vmx_get_nonreg_state(struct vc=
pu *v,
 {
     vmx_vmcs_enter(v);
=20
-    __vmread(GUEST_ACTIVITY_STATE, &nrs->vmx.activity_state);
-    __vmread(GUEST_INTERRUPTIBILITY_INFO, &nrs->vmx.interruptibility_info)=
;
-    __vmread(GUEST_PENDING_DBG_EXCEPTIONS, &nrs->vmx.pending_dbg);
+    nrs->vmx.activity_state =3D vmread(GUEST_ACTIVITY_STATE);
+    nrs->vmx.interruptibility_info =3D vmread(GUEST_INTERRUPTIBILITY_INFO)=
;
+    nrs->vmx.pending_dbg =3D vmread(GUEST_PENDING_DBG_EXCEPTIONS);
=20
     if ( cpu_has_vmx_virtual_intr_delivery )
-        __vmread(GUEST_INTR_STATUS, &nrs->vmx.interrupt_status);
+        nrs->vmx.interrupt_status =3D vmread(GUEST_INTR_STATUS);
=20
     vmx_vmcs_exit(v);
 }
@@ -1896,7 +1888,7 @@ static void cf_check vmx_update_guest_efer(struct vcp=
u *v)
      * The intended guest running mode is derived from VM_ENTRY_IA32E_MODE=
,
      * which (architecturally) is the guest's LMA setting.
      */
-    __vmread(VM_ENTRY_CONTROLS, &entry_ctls);
+    entry_ctls =3D vmread(VM_ENTRY_CONTROLS);
=20
     entry_ctls &=3D ~VM_ENTRY_IA32E_MODE;
     if ( guest_efer & EFER_LMA )
@@ -2063,9 +2055,10 @@ static void cf_check vmx_inject_event(const struct x=
86_event *event)
         {
             unsigned long val;
=20
-            __vmread(GUEST_DR7, &val);
+            val =3D vmread(GUEST_DR7);
             __vmwrite(GUEST_DR7, val & ~DR_GENERAL_DETECT);
-            __vmread(GUEST_IA32_DEBUGCTL, &val);
+
+            val =3D vmread(GUEST_IA32_DEBUGCTL);
             __vmwrite(GUEST_IA32_DEBUGCTL, val & ~IA32_DEBUGCTLMSR_LBR);
         }
         if ( cpu_has_monitor_trap_flag )
@@ -2089,7 +2082,7 @@ static void cf_check vmx_inject_event(const struct x8=
6_event *event)
     if ( nestedhvm_vcpu_in_guestmode(curr) )
         intr_info =3D vcpu_2_nvmx(curr).intr.intr_info;
     else
-        __vmread(VM_ENTRY_INTR_INFO, &intr_info);
+        intr_info =3D vmread(VM_ENTRY_INTR_INFO);
=20
     if ( unlikely(intr_info & INTR_INFO_VALID_MASK) &&
          (MASK_EXTR(intr_info, INTR_INFO_INTR_TYPE_MASK) =3D=3D X86_ET_HW_=
EXC) )
@@ -2125,12 +2118,9 @@ static void cf_check vmx_inject_event(const struct x=
86_event *event)
=20
 static bool cf_check vmx_event_pending(const struct vcpu *v)
 {
-    unsigned long intr_info;
-
     ASSERT(v =3D=3D current);
-    __vmread(VM_ENTRY_INTR_INFO, &intr_info);
=20
-    return intr_info & INTR_INFO_VALID_MASK;
+    return vmread(VM_ENTRY_INTR_INFO) & INTR_INFO_VALID_MASK;
 }
=20
 static void cf_check vmx_set_info_guest(struct vcpu *v)
@@ -2149,7 +2139,7 @@ static void cf_check vmx_set_info_guest(struct vcpu *=
v)
      * to set the GUEST_PENDING_DBG_EXCEPTIONS.BS here incurs
      * immediately vmexit and hence make no progress.
      */
-    __vmread(GUEST_INTERRUPTIBILITY_INFO, &intr_shadow);
+    intr_shadow =3D vmread(GUEST_INTERRUPTIBILITY_INFO);
     if ( v->domain->debugger_attached &&
          (v->arch.user_regs.eflags & X86_EFLAGS_TF) &&
          (intr_shadow & VMX_INTR_SHADOW_STI) )
@@ -2178,7 +2168,7 @@ static u8 set_svi(int isr)
     if ( isr < 0 )
         isr =3D 0;
=20
-    __vmread(GUEST_INTR_STATUS, &status);
+    status =3D vmread(GUEST_INTR_STATUS);
     old =3D status >> VMX_GUEST_INTR_STATUS_SVI_OFFSET;
     if ( isr !=3D old )
     {
@@ -2518,9 +2508,9 @@ static bool cf_check vmx_vcpu_emulate_ve(struct vcpu =
*v)
     veinfo->eptp_index =3D vcpu_altp2m(v).p2midx;
=20
     vmx_vmcs_enter(v);
-    __vmread(EXIT_QUALIFICATION, &veinfo->exit_qualification);
-    __vmread(GUEST_LINEAR_ADDRESS, &veinfo->gla);
-    __vmread(GUEST_PHYSICAL_ADDRESS, &veinfo->gpa);
+    veinfo->exit_qualification =3D vmread(EXIT_QUALIFICATION);
+    veinfo->gla =3D vmread(GUEST_LINEAR_ADDRESS);
+    veinfo->gpa =3D vmread(GUEST_PHYSICAL_ADDRESS);
     vmx_vmcs_exit(v);
=20
     hvm_inject_hw_exception(X86_EXC_VE,
@@ -2541,8 +2531,8 @@ static bool cf_check vmx_get_pending_event(
     unsigned long intr_info, error_code;
=20
     vmx_vmcs_enter(v);
-    __vmread(VM_ENTRY_INTR_INFO, &intr_info);
-    __vmread(VM_ENTRY_EXCEPTION_ERROR_CODE, &error_code);
+    intr_info =3D vmread(VM_ENTRY_INTR_INFO);
+    error_code =3D vmread(VM_ENTRY_EXCEPTION_ERROR_CODE);
     vmx_vmcs_exit(v);
=20
     if ( !(intr_info & INTR_INFO_VALID_MASK) )
@@ -2739,11 +2729,11 @@ static uint64_t cf_check vmx_get_reg(struct vcpu *v=
, unsigned int reg)
     {
     case MSR_SPEC_CTRL:
         ASSERT(cpu_has_vmx_virt_spec_ctrl);
-        __vmread(SPEC_CTRL_SHADOW, &val);
+        val =3D vmread(SPEC_CTRL_SHADOW);
         break;
=20
     case MSR_IA32_BNDCFGS:
-        __vmread(GUEST_BNDCFGS, &val);
+        val =3D vmread(GUEST_BNDCFGS);
         break;
=20
     default:
@@ -3161,9 +3151,9 @@ void __init vmx_fill_funcs(void)
  */
 static int get_instruction_length(void)
 {
-    unsigned long len;
+    /* Safe: callers audited */
+    unsigned long len =3D vmread(VM_EXIT_INSTRUCTION_LEN);
=20
-    __vmread(VM_EXIT_INSTRUCTION_LEN, &len); /* Safe: callers audited */
     BUG_ON((len < 1) || (len > MAX_INST_LEN));
     return len;
 }
@@ -3176,7 +3166,7 @@ void update_guest_eip(void)
     regs->rip +=3D get_instruction_length(); /* Safe: callers audited */
     regs->eflags &=3D ~X86_EFLAGS_RF;
=20
-    __vmread(GUEST_INTERRUPTIBILITY_INFO, &x);
+    x =3D vmread(GUEST_INTERRUPTIBILITY_INFO);
     if ( x & (VMX_INTR_SHADOW_STI | VMX_INTR_SHADOW_MOV_SS) )
     {
         x &=3D ~(VMX_INTR_SHADOW_STI | VMX_INTR_SHADOW_MOV_SS);
@@ -3424,21 +3414,21 @@ static int cf_check vmx_msr_read_intercept(
     switch ( msr )
     {
     case MSR_IA32_SYSENTER_CS:
-        __vmread(GUEST_SYSENTER_CS, msr_content);
+        *msr_content =3D vmread(GUEST_SYSENTER_CS);
         break;
     case MSR_IA32_SYSENTER_ESP:
-        __vmread(GUEST_SYSENTER_ESP, msr_content);
+        *msr_content =3D vmread(GUEST_SYSENTER_ESP);
         break;
     case MSR_IA32_SYSENTER_EIP:
-        __vmread(GUEST_SYSENTER_EIP, msr_content);
+        *msr_content =3D vmread(GUEST_SYSENTER_EIP);
         break;
=20
     case MSR_FS_BASE:
-        __vmread(GUEST_FS_BASE, msr_content);
+        *msr_content =3D vmread(GUEST_FS_BASE);
         break;
=20
     case MSR_GS_BASE:
-        __vmread(GUEST_GS_BASE, msr_content);
+        *msr_content =3D vmread(GUEST_GS_BASE);
         break;
=20
     case MSR_SHADOW_GS_BASE:
@@ -3462,7 +3452,7 @@ static int cf_check vmx_msr_read_intercept(
         break;
=20
     case MSR_IA32_DEBUGCTLMSR:
-        __vmread(GUEST_IA32_DEBUGCTL, msr_content);
+        *msr_content =3D vmread(GUEST_IA32_DEBUGCTL);
         break;
=20
     case MSR_IA32_VMX_BASIC...MSR_IA32_VMX_VMFUNC:
@@ -3828,7 +3818,7 @@ static void vmx_do_extint(struct cpu_user_regs *regs)
 {
     unsigned long vector;
=20
-    __vmread(VM_EXIT_INTR_INFO, &vector);
+    vector =3D vmread(VM_EXIT_INTR_INFO);
     BUG_ON(!(vector & INTR_INFO_VALID_MASK));
=20
     vector &=3D INTR_INFO_VECTOR_MASK;
@@ -3893,7 +3883,7 @@ static void ept_handle_violation(ept_qual_t q, paddr_=
t gpa)
=20
     if ( q.gla_valid )
     {
-        __vmread(GUEST_LINEAR_ADDRESS, &gla);
+        gla =3D vmread(GUEST_LINEAR_ADDRESS);
         npfec.gla_valid =3D 1;
         if( q.gla_fault )
             npfec.kind =3D npfec_kind_with_gla;
@@ -3944,7 +3934,7 @@ static void vmx_failed_vmentry(unsigned int exit_reas=
on,
     struct vcpu *curr =3D current;
=20
     printk("%pv vmentry failure (reason %#x): ", curr, exit_reason);
-    __vmread(EXIT_QUALIFICATION, &exit_qualification);
+    exit_qualification =3D vmread(EXIT_QUALIFICATION);
     switch ( failed_vmentry_reason )
     {
     case EXIT_REASON_INVALID_GUEST_STATE:
@@ -4001,13 +3991,12 @@ void vmx_enter_realmode(struct cpu_user_regs *regs)
=20
 static int vmx_handle_eoi_write(void)
 {
-    unsigned long exit_qualification;
+    unsigned long exit_qualification =3D vmread(EXIT_QUALIFICATION);
=20
     /*
      * 1. Must be a linear access data write.
      * 2. Data write must be to the EOI register.
      */
-    __vmread(EXIT_QUALIFICATION, &exit_qualification);
     if ( (((exit_qualification >> 12) & 0xf) =3D=3D 1) &&
          ((exit_qualification & 0xfff) =3D=3D APIC_EOI) )
     {
@@ -4033,21 +4022,14 @@ static void vmx_propagate_intr(unsigned long intr)
         .vector =3D MASK_EXTR(intr, INTR_INFO_VECTOR_MASK),
         .type =3D MASK_EXTR(intr, INTR_INFO_INTR_TYPE_MASK),
     };
-    unsigned long tmp;
=20
     if ( intr & INTR_INFO_DELIVER_CODE_MASK )
-    {
-        __vmread(VM_EXIT_INTR_ERROR_CODE, &tmp);
-        event.error_code =3D tmp;
-    }
+        event.error_code =3D vmread(VM_EXIT_INTR_ERROR_CODE);
     else
         event.error_code =3D X86_EVENT_NO_EC;
=20
     if ( event.type >=3D X86_ET_SW_INT )
-    {
-        __vmread(VM_EXIT_INSTRUCTION_LEN, &tmp);
-        event.insn_len =3D tmp;
-    }
+        event.insn_len =3D vmread(VM_EXIT_INSTRUCTION_LEN);
     else
         event.insn_len =3D 0;
=20
@@ -4071,7 +4053,7 @@ static void vmx_idtv_reinject(unsigned long idtv_info=
)
             {
                 unsigned long ec;
=20
-                __vmread(IDT_VECTORING_ERROR_CODE, &ec);
+                ec =3D vmread(IDT_VECTORING_ERROR_CODE);
                 __vmwrite(VM_ENTRY_EXCEPTION_ERROR_CODE, ec);
             }
         }
@@ -4086,7 +4068,7 @@ static void vmx_idtv_reinject(unsigned long idtv_info=
)
         {
             unsigned long intr_info;
=20
-            __vmread(GUEST_INTERRUPTIBILITY_INFO, &intr_info);
+            intr_info =3D vmread(GUEST_INTERRUPTIBILITY_INFO);
             __vmwrite(GUEST_INTERRUPTIBILITY_INFO,
                       intr_info & ~VMX_INTR_SHADOW_NMI);
         }
@@ -4111,8 +4093,8 @@ static void vmx_handle_descriptor_access(uint32_t exi=
t_reason)
     uint64_t exit_qualification;
     unsigned int desc;
=20
-    __vmread(EXIT_QUALIFICATION, &exit_qualification);
-    __vmread(VMX_INSTRUCTION_INFO, &instr_info);
+    exit_qualification =3D vmread(EXIT_QUALIFICATION);
+    instr_info =3D vmread(VMX_INSTRUCTION_INFO);
=20
     if ( exit_reason =3D=3D EXIT_REASON_ACCESS_GDTR_OR_IDTR )
     {
@@ -4137,7 +4119,7 @@ static int vmx_handle_apic_write(void)
     unsigned long exit_qualification;
=20
     ASSERT(cpu_has_vmx_apic_reg_virt);
-    __vmread(EXIT_QUALIFICATION, &exit_qualification);
+    exit_qualification =3D vmread(EXIT_QUALIFICATION);
=20
     return vlapic_apicv_write(current, exit_qualification & 0xfff);
 }
@@ -4146,7 +4128,7 @@ static void undo_nmis_unblocked_by_iret(void)
 {
     unsigned long guest_info;
=20
-    __vmread(GUEST_INTERRUPTIBILITY_INFO, &guest_info);
+    guest_info =3D vmread(GUEST_INTERRUPTIBILITY_INFO);
     __vmwrite(GUEST_INTERRUPTIBILITY_INFO,
               guest_info | VMX_INTR_SHADOW_NMI);
 }
@@ -4159,12 +4141,12 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_=
regs *regs)
     struct vcpu *v =3D current;
     struct domain *currd =3D v->domain;
=20
-    __vmread(GUEST_RIP,    ®s->rip);
-    __vmread(GUEST_RSP,    ®s->rsp);
-    __vmread(GUEST_RFLAGS, ®s->rflags);
+    regs->rip =3D vmread(GUEST_RIP);
+    regs->rsp =3D vmread(GUEST_RSP);
+    regs->rflags =3D vmread(GUEST_RFLAGS);
=20
     if ( hvm_long_mode_active(v) )
-        __vmread(GUEST_CS_AR_BYTES, &cs_ar_bytes);
+        cs_ar_bytes =3D vmread(GUEST_CS_AR_BYTES);
=20
     hvm_sanitize_regs_fields(regs, !(cs_ar_bytes & X86_SEG_AR_CS_LM_ACTIVE=
));
=20
@@ -4174,17 +4156,17 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_=
regs *regs)
          * Xen allows the guest to modify some CR4 bits directly, update c=
ached
          * values to match.
          */
-        __vmread(GUEST_CR4, &v->arch.hvm.hw_cr[4]);
+        v->arch.hvm.hw_cr[4] =3D vmread(GUEST_CR4);
         v->arch.hvm.guest_cr[4] &=3D v->arch.hvm.vmx.cr4_host_mask;
         v->arch.hvm.guest_cr[4] |=3D (v->arch.hvm.hw_cr[4] &
                                     ~v->arch.hvm.vmx.cr4_host_mask);
=20
-        __vmread(GUEST_CR3, &v->arch.hvm.hw_cr[3]);
+        v->arch.hvm.hw_cr[3] =3D vmread(GUEST_CR3);
         if ( vmx_unrestricted_guest(v) || hvm_paging_enabled(v) )
             v->arch.hvm.guest_cr[3] =3D v->arch.hvm.hw_cr[3];
     }
=20
-    __vmread(VM_EXIT_REASON, &exit_reason);
+    exit_reason =3D vmread(VM_EXIT_REASON);
=20
     if ( hvm_long_mode_active(v) )
         TRACE_TIME(TRC_HVM_VMX_EXIT64, exit_reason, regs->rip, regs->rip >=
> 32);
@@ -4200,7 +4182,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
         vmx_do_extint(regs);
         break;
     case EXIT_REASON_EXCEPTION_NMI:
-        __vmread(VM_EXIT_INTR_INFO, &intr_info);
+        intr_info =3D vmread(VM_EXIT_INTR_INFO);
         BUG_ON(!(intr_info & INTR_INFO_VALID_MASK));
         vector =3D intr_info & INTR_INFO_VECTOR_MASK;
         if ( vector =3D=3D X86_EXC_MC )
@@ -4237,12 +4219,12 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_=
regs *regs)
=20
         if ( v->arch.hvm.vmx.secondary_exec_control &
             SECONDARY_EXEC_ENABLE_VIRT_EXCEPTIONS )
-            __vmread(EPTP_INDEX, &idx);
+        {
+            idx =3D vmread(EPTP_INDEX);
+        }
         else
         {
-            unsigned long eptp;
-
-            __vmread(EPT_POINTER, &eptp);
+            unsigned long eptp =3D vmread(EPT_POINTER);
=20
             if ( (idx =3D p2m_find_altp2m_by_eptp(v->domain, eptp)) =3D=3D
                  INVALID_ALTP2M )
@@ -4259,10 +4241,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_r=
egs *regs)
=20
     if ( unlikely(currd->arch.monitor.vmexit_enabled) )
     {
-        int rc;
-
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
-        rc =3D hvm_monitor_vmexit(exit_reason, exit_qualification);
+        int rc =3D hvm_monitor_vmexit(exit_reason, vmread(EXIT_QUALIFICATI=
ON));
         if ( rc < 0 )
             goto exit_and_crash;
         if ( rc )
@@ -4327,7 +4306,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
=20
     hvm_maybe_deassert_evtchn_irq();
=20
-    __vmread(IDT_VECTORING_INFO, &idtv_info);
+    idtv_info =3D vmread(IDT_VECTORING_INFO);
     if ( exit_reason !=3D EXIT_REASON_TASK_SWITCH )
         vmx_idtv_reinject(idtv_info);
=20
@@ -4362,7 +4341,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
              * Updates DR6 where debugger can peek (See 3B 23.2.1,
              * Table 23-1, "Exit Qualification for Debug Exceptions").
              */
-            __vmread(EXIT_QUALIFICATION, &exit_qualification);
+            exit_qualification =3D vmread(EXIT_QUALIFICATION);
             TRACE(TRC_HVM_TRAP_DEBUG, exit_qualification);
             __restore_debug_registers(v);
             write_debugreg(6, exit_qualification | DR_STATUS_RESERVED_ONE)=
;
@@ -4388,29 +4367,25 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_=
regs *regs)
              */
             if ( unlikely(regs->eflags & X86_EFLAGS_TF) )
             {
-                unsigned long int_info;
-
-                __vmread(GUEST_INTERRUPTIBILITY_INFO, &int_info);
+                unsigned long int_info =3D vmread(GUEST_INTERRUPTIBILITY_I=
NFO);
=20
                 if ( int_info & (VMX_INTR_SHADOW_STI | VMX_INTR_SHADOW_MOV=
_SS) )
                 {
-                    unsigned long pending_dbg;
+                    unsigned long exc =3D vmread(GUEST_PENDING_DBG_EXCEPTI=
ONS);
=20
-                    __vmread(GUEST_PENDING_DBG_EXCEPTIONS, &pending_dbg);
-                    __vmwrite(GUEST_PENDING_DBG_EXCEPTIONS,
-                              pending_dbg | DR_STEP);
+                    __vmwrite(GUEST_PENDING_DBG_EXCEPTIONS, exc | DR_STEP)=
;
                 }
             }
=20
             if ( !v->domain->debugger_attached )
             {
                 unsigned long insn_len =3D 0;
-                int rc;
                 unsigned long trap_type =3D MASK_EXTR(intr_info,
                                                     INTR_INFO_INTR_TYPE_MA=
SK);
+                int rc;
=20
                 if ( trap_type >=3D X86_ET_SW_INT )
-                    __vmread(VM_EXIT_INSTRUCTION_LEN, &insn_len);
+                    insn_len =3D vmread(VM_EXIT_INSTRUCTION_LEN);
=20
                 rc =3D hvm_monitor_debug(regs->rip,
                                        HVM_MONITOR_DEBUG_EXCEPTION,
@@ -4428,10 +4403,9 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_r=
egs *regs)
             TRACE(TRC_HVM_TRAP, vector);
             if ( !v->domain->debugger_attached )
             {
-                unsigned long insn_len;
+                unsigned long insn_len =3D vmread(VM_EXIT_INSTRUCTION_LEN)=
;
                 int rc;
=20
-                __vmread(VM_EXIT_INSTRUCTION_LEN, &insn_len);
                 rc =3D hvm_monitor_debug(regs->rip,
                                        HVM_MONITOR_SOFTWARE_BREAKPOINT,
                                        X86_ET_SW_EXC,
@@ -4454,8 +4428,8 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
             vmx_fpu_dirty_intercept();
             break;
         case X86_EXC_PF:
-            __vmread(EXIT_QUALIFICATION, &exit_qualification);
-            __vmread(VM_EXIT_INTR_ERROR_CODE, &ecode);
+            exit_qualification =3D vmread(EXIT_QUALIFICATION);
+            ecode =3D vmread(VM_EXIT_INTR_ERROR_CODE);
             regs->error_code =3D ecode;
=20
             HVM_DBG_LOG(DBG_LEVEL_VMMU,
@@ -4522,7 +4496,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
         };
         unsigned int inst_len, source;
=20
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        exit_qualification =3D vmread(EXIT_QUALIFICATION);
         source =3D (exit_qualification >> 30) & 3;
         /* Vectored event should fill in interrupt information. */
         WARN_ON((source =3D=3D 3) && !(idtv_info & INTR_INFO_VALID_MASK));
@@ -4536,9 +4510,9 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
                      > 3)) /* IntrType > 3? */
             ? get_instruction_length() /* Safe: SDM 3B 23.2.4 */ : 0;
         if ( (source =3D=3D 3) && (idtv_info & INTR_INFO_DELIVER_CODE_MASK=
) )
-            __vmread(IDT_VECTORING_ERROR_CODE, &ecode);
+            ecode =3D vmread(IDT_VECTORING_ERROR_CODE);
         else
-             ecode =3D -1;
+            ecode =3D -1;
=20
         hvm_task_switch(exit_qualification, reasons[source], ecode, inst_l=
en,
                         0 /* EFLAGS.RF already updated. */);
@@ -4565,7 +4539,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
         break;
     case EXIT_REASON_INVLPG:
         update_guest_eip(); /* Safe: INVLPG */
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        exit_qualification =3D vmread(EXIT_QUALIFICATION);
         vmx_invlpg_intercept(exit_qualification);
         break;
     case EXIT_REASON_RDTSCP:
@@ -4591,13 +4565,13 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_=
regs *regs)
=20
     case EXIT_REASON_CR_ACCESS:
     {
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        exit_qualification =3D vmread(EXIT_QUALIFICATION);
         if ( vmx_cr_access(exit_qualification) =3D=3D X86EMUL_OKAY )
             update_guest_eip(); /* Safe: MOV Cn, LMSW, CLTS */
         break;
     }
     case EXIT_REASON_DR_ACCESS:
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        exit_qualification =3D vmread(EXIT_QUALIFICATION);
         vmx_dr_access(exit_qualification, regs);
         break;
     case EXIT_REASON_MSR_READ:
@@ -4671,7 +4645,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
         break;
=20
     case EXIT_REASON_EOI_INDUCED:
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        exit_qualification =3D vmread(EXIT_QUALIFICATION);
=20
         ASSERT(cpu_has_vmx_virtual_intr_delivery);
=20
@@ -4695,7 +4669,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
         unsigned int bytes;
         int rc;
=20
-        __vmread(EXIT_QUALIFICATION, &io_qual.raw);
+        io_qual.raw =3D vmread(EXIT_QUALIFICATION);
         bytes =3D io_qual.size + 1;
=20
         rc =3D hvm_monitor_io(io_qual.port, bytes, io_qual.in, io_qual.str=
);
@@ -4728,10 +4702,9 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_r=
egs *regs)
=20
     case EXIT_REASON_EPT_VIOLATION:
     {
-        paddr_t gpa;
+        paddr_t gpa =3D vmread(GUEST_PHYSICAL_ADDRESS);
=20
-        __vmread(GUEST_PHYSICAL_ADDRESS, &gpa);
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        exit_qualification =3D vmread(EXIT_QUALIFICATION);
=20
         if ( unlikely(exit_qualification & INTR_INFO_NMI_UNBLOCKED_BY_IRET=
) &&
              !(idtv_info & INTR_INFO_VALID_MASK) )
@@ -4743,9 +4716,8 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
=20
     case EXIT_REASON_EPT_MISCONFIG:
     {
-        paddr_t gpa;
+        paddr_t gpa =3D vmread(GUEST_PHYSICAL_ADDRESS);
=20
-        __vmread(GUEST_PHYSICAL_ADDRESS, &gpa);
         if ( !ept_handle_misconfig(gpa) )
             goto exit_and_crash;
         break;
@@ -4781,7 +4753,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
         break;
=20
     case EXIT_REASON_PML_FULL:
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        exit_qualification =3D vmread(EXIT_QUALIFICATION);
=20
         if ( unlikely(exit_qualification & INTR_INFO_NMI_UNBLOCKED_BY_IRET=
) &&
              !(idtv_info & INTR_INFO_VALID_MASK) )
@@ -4804,7 +4776,7 @@ void asmlinkage vmx_vmexit_handler(struct cpu_user_re=
gs *regs)
         break;
=20
     case EXIT_REASON_NOTIFY:
-        __vmread(EXIT_QUALIFICATION, &exit_qualification);
+        exit_qualification =3D vmread(EXIT_QUALIFICATION);
=20
         if ( unlikely(exit_qualification & NOTIFY_VM_CONTEXT_INVALID) )
         {
diff --git a/xen/arch/x86/hvm/vmx/vvmx.c b/xen/arch/x86/hvm/vmx/vvmx.c
index ceb5e5a322..ab1c4631ab 100644
--- a/xen/arch/x86/hvm/vmx/vvmx.c
+++ b/xen/arch/x86/hvm/vmx/vvmx.c
@@ -400,8 +400,7 @@ static int decode_vmx_inst(struct cpu_user_regs *regs,
     unsigned long base, index, seg_base, disp, offset;
     int scale, size;
=20
-    __vmread(VMX_INSTRUCTION_INFO, &offset);
-    info.word =3D offset;
+    info.word =3D vmread(VMX_INSTRUCTION_INFO);
=20
     if ( info.fields.memreg ) {
         decode->type =3D VMX_INST_MEMREG_TYPE_REG;
@@ -428,7 +427,7 @@ static int decode_vmx_inst(struct cpu_user_regs *regs,
=20
         scale =3D 1 << info.fields.scaling;
=20
-        __vmread(EXIT_QUALIFICATION, &disp);
+        disp =3D vmread(EXIT_QUALIFICATION);
=20
         size =3D 1 << (info.fields.addr_size + 1);
=20
@@ -997,7 +996,7 @@ static void vvmcs_to_shadow_bulk(struct vcpu *v, unsign=
ed int n,
=20
     virtual_vmcs_enter(v);
     for ( i =3D 0; i < n; i++ )
-        __vmread(field[i], &value[i]);
+        value[i] =3D vmread(field[i]);
     virtual_vmcs_exit(v);
=20
     for ( i =3D 0; i < n; i++ )
@@ -1012,7 +1011,7 @@ fallback:
=20
 static inline void shadow_to_vvmcs(const struct vcpu *v, unsigned int fiel=
d)
 {
-    unsigned long value;
+    unsigned long value =3D 0;
=20
     if ( vmread_safe(field, &value) =3D=3D 0 )
         set_vvmcs(v, field, value);
@@ -1036,7 +1035,7 @@ static void shadow_to_vvmcs_bulk(struct vcpu *v, unsi=
gned int n,
     }
=20
     for ( i =3D 0; i < n; i++ )
-        __vmread(field[i], &value[i]);
+        value[i] =3D vmread(field[i]);
=20
     virtual_vmcs_enter(v);
     for ( i =3D 0; i < n; i++ )
@@ -1405,7 +1404,7 @@ static void nvmx_update_apicv(struct vcpu *v)
     }
     else
        /* Keep previous SVI if there's any. */
-       __vmread(GUEST_INTR_STATUS, &status);
+       status =3D vmread(GUEST_INTR_STATUS);
=20
     rvi =3D vlapic_has_pending_irq(v);
     if ( rvi !=3D -1 )
@@ -1687,7 +1686,6 @@ static int nvmx_handle_vmresume(struct cpu_user_regs =
*regs)
     bool launched;
     struct vcpu *v =3D current;
     struct nestedvmx *nvmx =3D &vcpu_2_nvmx(v);
-    unsigned long intr_shadow;
     int rc;
=20
     if ( !vvmcx_valid(v) )
@@ -1696,8 +1694,7 @@ static int nvmx_handle_vmresume(struct cpu_user_regs =
*regs)
         return X86EMUL_OKAY;       =20
     }
=20
-    __vmread(GUEST_INTERRUPTIBILITY_INFO, &intr_shadow);
-    if ( intr_shadow & VMX_INTR_SHADOW_MOV_SS )
+    if ( vmread(GUEST_INTERRUPTIBILITY_INFO) & VMX_INTR_SHADOW_MOV_SS )
     {
         vmfail_valid(regs, VMX_INSN_VMENTRY_BLOCKED_BY_MOV_SS);
         return X86EMUL_OKAY;
@@ -1723,7 +1720,6 @@ static int nvmx_handle_vmlaunch(struct cpu_user_regs =
*regs)
     bool launched;
     struct vcpu *v =3D current;
     struct nestedvmx *nvmx =3D &vcpu_2_nvmx(v);
-    unsigned long intr_shadow;
     int rc;
=20
     if ( !vvmcx_valid(v) )
@@ -1732,8 +1728,7 @@ static int nvmx_handle_vmlaunch(struct cpu_user_regs =
*regs)
         return X86EMUL_OKAY;
     }
=20
-    __vmread(GUEST_INTERRUPTIBILITY_INFO, &intr_shadow);
-    if ( intr_shadow & VMX_INTR_SHADOW_MOV_SS )
+    if ( vmread(GUEST_INTERRUPTIBILITY_INFO) & VMX_INTR_SHADOW_MOV_SS )
     {
         vmfail_valid(regs, VMX_INSN_VMENTRY_BLOCKED_BY_MOV_SS);
         return X86EMUL_OKAY;
@@ -2355,7 +2350,7 @@ int cf_check nvmx_hap_walk_L1_p2m(
=20
     vmx_vmcs_enter(v);
=20
-    __vmread(EXIT_QUALIFICATION, &exit_qual);
+    exit_qual =3D vmread(EXIT_QUALIFICATION);
     rc =3D nept_translate_l2ga(v, L2_gpa, page_order, rwx_rights, &gfn, p2=
m_acc,
                              &exit_qual, &exit_reason);
     switch ( rc )
@@ -2391,7 +2386,7 @@ void nvmx_idtv_handling(void)
     struct nestedvcpu *nvcpu =3D &vcpu_nestedhvm(v);
     unsigned long idtv_info, reason;
=20
-    __vmread(IDT_VECTORING_INFO, &idtv_info);
+    idtv_info =3D vmread(IDT_VECTORING_INFO);
     if ( likely(!(idtv_info & INTR_INFO_VALID_MASK)) )
         return;
=20
@@ -2399,7 +2394,7 @@ void nvmx_idtv_handling(void)
      * If L0 can solve the fault that causes idt vectoring, it should
      * be reinjected, otherwise, pass to L1.
      */
-    __vmread(VM_EXIT_REASON, &reason);
+    reason =3D vmread(VM_EXIT_REASON);
     if ( (uint16_t)reason !=3D EXIT_REASON_EPT_VIOLATION ?
          !(nvmx->intr.intr_info & INTR_INFO_VALID_MASK) :
          !nvcpu->nv_vmexit_pending )
@@ -2407,7 +2402,7 @@ void nvmx_idtv_handling(void)
         __vmwrite(VM_ENTRY_INTR_INFO, idtv_info & ~INTR_INFO_RESVD_BITS_MA=
SK);
         if ( idtv_info & INTR_INFO_DELIVER_CODE_MASK )
         {
-            __vmread(IDT_VECTORING_ERROR_CODE, &reason);
+            reason =3D vmread(IDT_VECTORING_ERROR_CODE);
             __vmwrite(VM_ENTRY_EXCEPTION_ERROR_CODE, reason);
         }
         /*
@@ -2418,7 +2413,7 @@ void nvmx_idtv_handling(void)
          * This means EXIT_INSTRUCTION_LEN is always valid here, for
          * software interrupts both injected by L1, and generated in L2.
          */
-        __vmread(VM_EXIT_INSTRUCTION_LEN, &reason);
+        reason =3D vmread(VM_EXIT_INSTRUCTION_LEN);
         __vmwrite(VM_ENTRY_INSTRUCTION_LEN, reason);
    }
 }
@@ -2452,7 +2447,7 @@ int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs=
,
         u64 exec_bitmap;
         int vector;
=20
-        __vmread(VM_EXIT_INTR_INFO, &intr_info);
+        intr_info =3D vmread(VM_EXIT_INTR_INFO);
         vector =3D intr_info & INTR_INFO_VECTOR_MASK;
         /*
          * decided by L0 and L1 exception bitmap, if the vetor is set by
@@ -2531,7 +2526,7 @@ int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs=
,
             unsigned long qual;
             u16 port, size;
=20
-            __vmread(EXIT_QUALIFICATION, &qual);
+            qual =3D vmread(EXIT_QUALIFICATION);
             port =3D qual >> 16;
             size =3D (qual & 7) + 1;
             do {
@@ -2638,7 +2633,7 @@ int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs=
,
         cr_access_qual_t qual;
         u32 mask =3D 0;
=20
-        __vmread(EXIT_QUALIFICATION, &qual.raw);
+        qual.raw =3D vmread(EXIT_QUALIFICATION);
         /* also according to guest exec_control */
         ctrl =3D __n2_exec_control(v);
=20
@@ -2680,7 +2675,7 @@ int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs=
,
                 {
                     u64 cr0_gh_mask =3D get_vvmcs(v, CR0_GUEST_HOST_MASK);
=20
-                    __vmread(CR0_READ_SHADOW, &old_val);
+                    old_val =3D vmread(CR0_READ_SHADOW);
                     changed_bits =3D old_val ^ val;
                     if ( changed_bits & cr0_gh_mask )
                         nvcpu->nv_vmexit_pending =3D 1;
@@ -2696,7 +2691,7 @@ int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs=
,
                 {
                     u64 cr4_gh_mask =3D get_vvmcs(v, CR4_GUEST_HOST_MASK);
=20
-                    __vmread(CR4_READ_SHADOW, &old_val);
+                    old_val =3D vmread(CR4_READ_SHADOW);
                     changed_bits =3D old_val ^ val;
                     if ( changed_bits & cr4_gh_mask )
                         nvcpu->nv_vmexit_pending =3D 1;
@@ -2732,7 +2727,7 @@ int nvmx_n2_vmexit_handler(struct cpu_user_regs *regs=
,
             {
                 u64 cr0_gh_mask =3D get_vvmcs(v, CR0_GUEST_HOST_MASK);
=20
-                __vmread(CR0_READ_SHADOW, &old_val);
+                old_val =3D vmread(CR0_READ_SHADOW);
                 old_val &=3D X86_CR0_PE|X86_CR0_MP|X86_CR0_EM|X86_CR0_TS;
                 val =3D qual.lmsw_data &
                       (X86_CR0_PE|X86_CR0_MP|X86_CR0_EM|X86_CR0_TS);
diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmx.h b/xen/arch/x86/include/=
asm/hvm/vmx/vmx.h
index cc8c53fab1..8bdb042988 100644
--- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h
+++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h
@@ -336,11 +336,6 @@ static always_inline unsigned long vmread(unsigned lon=
g field)
     return value;
 }
=20
-static always_inline void __vmread(unsigned long field, unsigned long *val=
ue)
-{
-    *value =3D vmread(field);
-}
-
 static always_inline void __vmwrite(unsigned long field, unsigned long val=
ue)
 {
     asm goto ( "vmwrite %[value], %[field]\n\t"
--=20
2.34.1




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On 4/25/2025 3:08 AM, Jürgen Groß wrote:
> 
> Can you please remove the two "else" instances above? With directly 
> returning
> form the "if" clause they are no longer needed.

I thought about it but forgot to do it later.

> 
> With that you can add my:
> 
> Reviewed-by: Juergen Gross 

Thanks a lot!


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Date: Sat, 26 Apr 2025 11:08:17 +0200
From: Ingo Molnar 
To: Arnd Bergmann 
Cc: Thomas Gleixner , Ingo Molnar ,
	Borislav Petkov ,
	Dave Hansen , x86@kernel.org,
	Arnd Bergmann , "H. Peter Anvin" ,
	Juergen Gross ,
	Boris Ostrovsky ,
	Alexander Usyskin ,
	Greg Kroah-Hartman ,
	Mateusz =?utf-8?Q?Jo=C5=84czyk?= ,
	"Mike Rapoport (Microsoft)" ,
	Ard Biesheuvel ,
	Peter Zijlstra , linux-kernel@vger.kernel.org,
	xen-devel@lists.xenproject.org,
	Linus Torvalds 
Subject: Re: [PATCH] [RFC] x86/cpu: rework instruction set selection
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* Arnd Bergmann  wrote:

> From: Arnd Bergmann 
> 
> With cx8 and tsc being mandatory features, the only important
> architectural features are now cmov and pae.
> 
> Change the large list of target CPUs to no longer pick the instruction set
> itself but only the mtune= optimization level and in-kernel optimizations
> that remain compatible with all cores.
> 
> The CONFIG_X86_CMOV instead becomes user-selectable and is now how
> Kconfig picks between 586-class (Pentium, Pentium MMX, K6, C3, GeodeGX)
> and 686-class (everything else) targets.
> 
> In order to allow running on late 32-bit cores (Athlon, Pentium-M,
> Pentium 4, ...), the X86_L1_CACHE_SHIFT can no longer be set to anything
> lower than 6 (i.e. 64 byte cache lines).
> 
> The optimization options now depend on X86_CMOV and X86_PAE instead
> of the other way round, while other compile-time conditionals that
> checked for MATOM/MGEODEGX1 instead now check for CPU_SUP_* options
> that enable support for a particular CPU family.
> 
> Link: https://lore.kernel.org/lkml/dd29df0c-0b4f-44e6-b71b-2a358ea76fb4@app.fastmail.com/
> Signed-off-by: Arnd Bergmann 
> ---
> This is what I had in mind as mentioned in the earlier thread on
> cx8/tsc removal. I based this on top of the Ingo's [RFC 15/15]
> patch.
> ---
>  arch/x86/Kconfig                |   2 +-
>  arch/x86/Kconfig.cpu            | 100 ++++++++++++++------------------
>  arch/x86/Makefile_32.cpu        |  48 +++++++--------
>  arch/x86/include/asm/vermagic.h |  36 +-----------
>  arch/x86/kernel/tsc.c           |   2 +-
>  arch/x86/xen/Kconfig            |   1 -
>  drivers/misc/mei/Kconfig        |   2 +-
>  7 files changed, 74 insertions(+), 117 deletions(-)

While the simplification is nice on its face, this looks messy:

> diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
> index a9d717558972..1e33f88c9b97 100644
> --- a/arch/x86/Kconfig
> +++ b/arch/x86/Kconfig
> @@ -1438,7 +1438,7 @@ config HIGHMEM
>  
>  config X86_PAE
>  	bool "PAE (Physical Address Extension) Support"
> -	depends on X86_32 && X86_HAVE_PAE
> +	depends on X86_32 && X86_CMOV

Coupling CMOV to PAE ... :-/

> +config X86_CMOV
> +	bool "Require 686-class CMOV instructions" if X86_32
> +	default y
>  	help
> -	  This is the processor type of your CPU. This information is
> -	  used for optimizing purposes. In order to compile a kernel
> -	  that can run on all supported x86 CPU types (albeit not
> -	  optimally fast), you can specify "586" here.
> +	  Most x86-32 processor implementations are compatible with
> +	  the the CMOV instruction originally added in the Pentium Pro,
> +	  and they perform much better when using it.
> +
> +	  Disable this option to build for 586-class CPUs without this
> +	  instruction. This is only required for the original Intel
> +	  Pentium (P5, P54, P55), AMD K6/K6-II/K6-3D, Geode GX1 and Via
> +	  CyrixIII/C3 CPUs.

Very few users will know anything about CMOV.

I'd argue the right path forward is to just bite the bullet and remove 
non-CMOV support as well, that would be the outcome *anyway* in a few 
years. That would allow basically a single 'modern' 32-bit kernel that 
is supposed to boot on every supported CPU. People might even end up 
testing it ... ;-)

Thanks,

	Ingo


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Date: Sat, 26 Apr 2025 06:17:50 -0700
From: "H. Peter Anvin" 
To: Ingo Molnar , Arnd Bergmann 
CC: Thomas Gleixner , Ingo Molnar ,
        Borislav Petkov ,
        Dave Hansen , x86@kernel.org,
        Arnd Bergmann , Juergen Gross ,
        Boris Ostrovsky ,
        Alexander Usyskin ,
        Greg Kroah-Hartman ,
        =?UTF-8?Q?Mateusz_Jo=C5=84czyk?= ,
        "Mike Rapoport (Microsoft)" ,
        Ard Biesheuvel ,
        Peter Zijlstra , linux-kernel@vger.kernel.org,
        xen-devel@lists.xenproject.org,
        Linus Torvalds 
Subject: Re: [PATCH] [RFC] x86/cpu: rework instruction set selection
User-Agent: K-9 Mail for Android
In-Reply-To: 
References: <20250425141740.734030-1-arnd@kernel.org> 
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On April 26, 2025 2:08:17 AM PDT, Ingo Molnar  wrote:
>
>* Arnd Bergmann  wrote:
>
>> From: Arnd Bergmann 
>>=20
>> With cx8 and tsc being mandatory features, the only important
>> architectural features are now cmov and pae=2E
>>=20
>> Change the large list of target CPUs to no longer pick the instruction =
set
>> itself but only the mtune=3D optimization level and in-kernel optimizat=
ions
>> that remain compatible with all cores=2E
>>=20
>> The CONFIG_X86_CMOV instead becomes user-selectable and is now how
>> Kconfig picks between 586-class (Pentium, Pentium MMX, K6, C3, GeodeGX)
>> and 686-class (everything else) targets=2E
>>=20
>> In order to allow running on late 32-bit cores (Athlon, Pentium-M,
>> Pentium 4, =2E=2E=2E), the X86_L1_CACHE_SHIFT can no longer be set to a=
nything
>> lower than 6 (i=2Ee=2E 64 byte cache lines)=2E
>>=20
>> The optimization options now depend on X86_CMOV and X86_PAE instead
>> of the other way round, while other compile-time conditionals that
>> checked for MATOM/MGEODEGX1 instead now check for CPU_SUP_* options
>> that enable support for a particular CPU family=2E
>>=20
>> Link: https://lore=2Ekernel=2Eorg/lkml/dd29df0c-0b4f-44e6-b71b-2a358ea7=
6fb4@app=2Efastmail=2Ecom/
>> Signed-off-by: Arnd Bergmann 
>> ---
>> This is what I had in mind as mentioned in the earlier thread on
>> cx8/tsc removal=2E I based this on top of the Ingo's [RFC 15/15]
>> patch=2E
>> ---
>>  arch/x86/Kconfig                |   2 +-
>>  arch/x86/Kconfig=2Ecpu            | 100 ++++++++++++++----------------=
--
>>  arch/x86/Makefile_32=2Ecpu        |  48 +++++++--------
>>  arch/x86/include/asm/vermagic=2Eh |  36 +-----------
>>  arch/x86/kernel/tsc=2Ec           |   2 +-
>>  arch/x86/xen/Kconfig            |   1 -
>>  drivers/misc/mei/Kconfig        |   2 +-
>>  7 files changed, 74 insertions(+), 117 deletions(-)
>
>While the simplification is nice on its face, this looks messy:
>
>> diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
>> index a9d717558972=2E=2E1e33f88c9b97 100644
>> --- a/arch/x86/Kconfig
>> +++ b/arch/x86/Kconfig
>> @@ -1438,7 +1438,7 @@ config HIGHMEM
>> =20
>>  config X86_PAE
>>  	bool "PAE (Physical Address Extension) Support"
>> -	depends on X86_32 && X86_HAVE_PAE
>> +	depends on X86_32 && X86_CMOV
>
>Coupling CMOV to PAE =2E=2E=2E :-/
>
>> +config X86_CMOV
>> +	bool "Require 686-class CMOV instructions" if X86_32
>> +	default y
>>  	help
>> -	  This is the processor type of your CPU=2E This information is
>> -	  used for optimizing purposes=2E In order to compile a kernel
>> -	  that can run on all supported x86 CPU types (albeit not
>> -	  optimally fast), you can specify "586" here=2E
>> +	  Most x86-32 processor implementations are compatible with
>> +	  the the CMOV instruction originally added in the Pentium Pro,
>> +	  and they perform much better when using it=2E
>> +
>> +	  Disable this option to build for 586-class CPUs without this
>> +	  instruction=2E This is only required for the original Intel
>> +	  Pentium (P5, P54, P55), AMD K6/K6-II/K6-3D, Geode GX1 and Via
>> +	  CyrixIII/C3 CPUs=2E
>
>Very few users will know anything about CMOV=2E
>
>I'd argue the right path forward is to just bite the bullet and remove=20
>non-CMOV support as well, that would be the outcome *anyway* in a few=20
>years=2E That would allow basically a single 'modern' 32-bit kernel that=
=20
>is supposed to boot on every supported CPU=2E People might even end up=20
>testing it =2E=2E=2E ;-)
>
>Thanks,
>
>	Ingo

Dropping CMOV would mean dropping P5 support=2E 


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From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= 
Date: Sat, 26 Apr 2025 16:45:26 +0300 (EEST)
To: Xin Li 
cc: LKML , kvm@vger.kernel.org, 
    linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org, 
    virtualization@lists.linux.dev, linux-pm@vger.kernel.org, 
    linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org, 
    linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org, 
    Netdev , platform-driver-x86@vger.kernel.org, 
    tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, 
    dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, 
    acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com, 
    peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com, 
    alexander.shishkin@linux.intel.com, jolsa@kernel.org, irogers@google.com, 
    adrian.hunter@intel.com, kan.liang@linux.intel.com, wei.liu@kernel.org, 
    ajay.kaher@broadcom.com, bcm-kernel-feedback-list@broadcom.com, 
    tony.luck@intel.com, pbonzini@redhat.com, vkuznets@redhat.com, 
    seanjc@google.com, luto@kernel.org, boris.ostrovsky@oracle.com, 
    kys@microsoft.com, haiyangz@microsoft.com, decui@microsoft.com, 
    dapeng1.mi@linux.intel.com
Subject: Re: [PATCH v3 01/14] x86/msr: Move rdtsc{,_ordered}() to
 
In-Reply-To: 
Message-ID: 
References: <20250425083442.2390017-1-xin@zytor.com> <20250425083442.2390017-2-xin@zytor.com> <42dc90e1-df2a-2324-d28c-d75fb525e4a2@linux.intel.com> 
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On Sat, 26 Apr 2025, Xin Li wrote:

> On 4/25/2025 8:45 AM, Ilpo J=C3=A4rvinen wrote:
> > To me this looks really a random set of source files, maybe it helped s=
ome
> > build success but it's hard for me to review this because there are sti=
ll
> > cases that depend on indirect include chains.
> >=20
> > Could you just look into solving all missing msr.h includes instead
> > as clearly some are still missing after 3 pre-existing ones and you add=
ing
> > it into 3 files:
> >=20
> > $ git grep -e rdmsr -e wrmsr -l drivers/platform/x86/
> > drivers/platform/x86/intel/ifs/core.c
> > drivers/platform/x86/intel/ifs/load.c
> > drivers/platform/x86/intel/ifs/runtest.c
> > drivers/platform/x86/intel/pmc/cnp.c
> > drivers/platform/x86/intel/pmc/core.c
> > drivers/platform/x86/intel/speed_select_if/isst_if_common.c
> > drivers/platform/x86/intel/speed_select_if/isst_if_mbox_msr.c
> > drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c
> > drivers/platform/x86/intel/tpmi_power_domains.c
> > drivers/platform/x86/intel/turbo_max_3.c
> > drivers/platform/x86/intel/uncore-frequency/uncore-frequency.c
> > drivers/platform/x86/intel_ips.c
> >=20
> > $ git grep -e 'msr.h' -l drivers/platform/x86/
> > drivers/platform/x86/intel/pmc/core.c
> > drivers/platform/x86/intel/tpmi_power_domains.c
> > drivers/platform/x86/intel_ips.c
>=20
> I think you want me to add all necessary direct inclusions, right?

For asm/msr.h yes, as it seems you're altering the inclusion paths and all=
=20
non-direct includes have a chance of breaking so it seems prudent to just=
=20
convert them into direct includes.

> This is the right thing to do, and I did try it but gave up later.
>=20
> I will do it in the next iteration as you asked.  But I want to make my
> points:
>=20
> 1) It's not just two patterns {rd,wr}msr, there are a lot of definitions
>    in  and we need to cover all of them:

I know and I don't expect you to get it 100% perfect, but taking a major=20
step into the right direction would be way better than build testing one=20
configuration and see what blows up and fix only those.

In this particular case, the amount of includes seemed really subpar with=
=20
many users lacking the include.

>       struct msr_info
>       struct msr_regs_info
>       struct saved_msr
>       struct saved_msrs

Could be shortened to -e 'struct msr' -e 'struct saved_msr'.

>       {read,write}_msr
>       rdpmc
>       .*msr.*_on_cpu

Well, my pattern already caught rdmsr.*on_cpu and wrmsr.*on_cpu.

For the other patterns, I don't see those at all under=20
drivers/platform/x86/ but I think when one typically implies the=20
others tend appear as well so this might not be as hard as it seems.

> 2) Once all necessary direct inclusions are in place, it's easy to
>    overlook adding a header inclusion in practice, especially if the
>    build passes.  Besides we often forget to remove a header when a
>    definition is removed.  In other words, direct inclusion is hard to
>    maintain.

This is true as well but we should still try to move towards the right=20
state affairs even if we will not get it near 100% until there's a real=20
tool that relentlessly keeps exposing such human oversight.

And do I try to check also includes whenever I remember while reviewing=20
patches (which requires some effort as they are not visible in the code=20
context and might not appear in a patch at all).

> 3) Some random kernel configuration combinations can cause the current
>    kernel build to fail.  I hit one in x86 UML.

Yes, which why direct including is much better than relying on fragile=20
indirects.

> We all know Ingo is the best person to discuss this with :).  While my
> understanding of the header inclusion issue may be inaccurate or
> outdated.
>=20
> So for me, using "make allyesconfig" is a practical method for a quick
> local build check, plus I always send my patches to Intel LKP.

Even with LKP, randconfig builds may still require many tests to find=20
issues.

> There probably wants a script that identifies all files that reference a
> definition in a header thus need to include it explicitly.  And indirect
> includes should be zapped.

Sadly, the clang based include-what-you-use tool is not yet there for=20
the kernel AFAIK.

--=20
 i.

--8323328-589040720-1745675126=:944--


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Date: Sat, 26 Apr 2025 18:50:41 +0000
To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com
Subject: [PATCH v2 1/3] xen/console: cleanup conring management
Message-ID: <20250426185021.100646-2-dmukhin@ford.com>
In-Reply-To: <20250426185021.100646-1-dmukhin@ford.com>
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From: Denis Mukhin 

Move console_locks_busted handling inside conring_puts() to remove
tasklet code duplication.

Signed-off-by: Denis Mukhin 
Reviewed-by: Stefano Stabellini 
---
Changes v1->v2:
- added Stefano's R-b
---
 xen/drivers/char/console.c | 29 ++++++++++++++---------------
 1 file changed, 14 insertions(+), 15 deletions(-)

diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c
index c3150fbdb7..aaa97088aa 100644
--- a/xen/drivers/char/console.c
+++ b/xen/drivers/char/console.c
@@ -325,6 +325,17 @@ static void cf_check do_dec_thresh(unsigned char key, =
bool unused)
  * ********************************************************
  */
=20
+static void cf_check notify_dom0_con_ring(void *unused)
+{
+    send_global_virq(VIRQ_CON_RING);
+}
+
+static DECLARE_SOFTIRQ_TASKLET(notify_dom0_con_ring_tasklet,
+                               notify_dom0_con_ring,
+                               NULL);
+
+static bool console_locks_busted;
+
 static void conring_puts(const char *str, size_t len)
 {
     ASSERT(rspin_is_locked(&console_lock));
@@ -334,6 +345,9 @@ static void conring_puts(const char *str, size_t len)
=20
     if ( conringp - conringc > conring_size )
         conringc =3D conringp - conring_size;
+
+    if ( !console_locks_busted )
+        tasklet_schedule(¬ify_dom0_con_ring_tasklet);
 }
=20
 long read_console_ring(struct xen_sysctl_readconsole *op)
@@ -594,13 +608,6 @@ static void cf_check serial_rx(char c)
     __serial_rx(c);
 }
=20
-static void cf_check notify_dom0_con_ring(void *unused)
-{
-    send_global_virq(VIRQ_CON_RING);
-}
-static DECLARE_SOFTIRQ_TASKLET(notify_dom0_con_ring_tasklet,
-                               notify_dom0_con_ring, NULL);
-
 #ifdef CONFIG_X86
 static inline void xen_console_write_debug_port(const char *buf, size_t le=
n)
 {
@@ -648,10 +655,7 @@ static long guest_console_write(XEN_GUEST_HANDLE_PARAM=
(char) buffer,
 #endif
=20
             if ( opt_console_to_ring )
-            {
                 conring_puts(kbuf, kcount);
-                tasklet_schedule(¬ify_dom0_con_ring_tasklet);
-            }
=20
             nrspin_unlock_irq(&console_lock);
         }
@@ -753,8 +757,6 @@ long do_console_io(
  * *****************************************************
  */
=20
-static bool console_locks_busted;
-
 static void __putstr(const char *str)
 {
     size_t len =3D strlen(str);
@@ -775,9 +777,6 @@ static void __putstr(const char *str)
 #endif
=20
     conring_puts(str, len);
-
-    if ( !console_locks_busted )
-        tasklet_schedule(¬ify_dom0_con_ring_tasklet);
 }
=20
 static int printk_prefix_check(char *p, char **pp)
--=20
2.34.1




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Date: Sat, 26 Apr 2025 18:50:32 +0000
To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com
Subject: [PATCH v2 0/3] xen/console: few cleanups in console driver
Message-ID: <20250426185021.100646-1-dmukhin@ford.com>
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The patch series introduces a few cleanups aimed at reducing code duplicati=
on
in the console driver.

Originally, patches 2 and 3 were part of NS16550 emulator v3 series [1].

Patch 1 removes some code duplication for logging via conring facility.

Patch 2 (see [2]) removes code duplication between __putstr() and the rest =
of
the driver. It also introduces private flags to select console devices for
printout which simplifies some code paths.

Patch 3 (see [3]) adds conring_flush() to send contents of conring to all
currently available console devices.

[1] https://lore.kernel.org/xen-devel/20250103-vuart-ns8250-v3-v1-0-c5d36b3=
1d66c@ford.com/
[2] https://lore.kernel.org/xen-devel/20250103-vuart-ns8250-v3-v1-16-c5d36b=
31d66c@ford.com/
[3] https://lore.kernel.org/xen-devel/20250103-vuart-ns8250-v3-v1-17-c5d36b=
31d66c@ford.com/
[4] Link to v1: https://lore.kernel.org/xen-devel/20250403000604.169619-1-d=
mukhin@ford.com/
[5] Link to CI: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelin=
es/1787672882

Denis Mukhin (3):
  xen/console: cleanup conring management
  xen/console: introduce console_puts()
  xen/console: introduce conring_flush()

 xen/drivers/char/console.c | 177 ++++++++++++++++++++++---------------
 1 file changed, 106 insertions(+), 71 deletions(-)

--=20
2.34.1




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To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com
Subject: [PATCH v2 2/3] xen/console: introduce console_puts()
Message-ID: <20250426185021.100646-3-dmukhin@ford.com>
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From: Denis Mukhin 

guest_console_write() duplicates the code from __putstr(), eliminate code
duplication.

Introduce console_puts() for writing a buffer to console devices.

Also, introduce internal console flags to control which console devices
should be used.

Signed-off-by: Denis Mukhin 
---
Changes v1->v2:
- fixed locking in dump_console_ring_key()
---
 xen/drivers/char/console.c | 117 ++++++++++++++++++++++---------------
 1 file changed, 71 insertions(+), 46 deletions(-)

diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c
index aaa97088aa..8f882a47d1 100644
--- a/xen/drivers/char/console.c
+++ b/xen/drivers/char/console.c
@@ -41,6 +41,20 @@
 #include 
 #endif
=20
+/* Internal console flags. */
+enum {
+    CONSOLE_SERIAL  =3D BIT(0, U),    /* Use serial device. */
+    CONSOLE_PV      =3D BIT(1, U),    /* Use PV console. */
+    CONSOLE_VIDEO   =3D BIT(2, U),    /* Use video device. */
+    CONSOLE_DEBUG   =3D BIT(3, U),    /* Use debug device. */
+    CONSOLE_RING    =3D BIT(4, U),    /* Use console ring. */
+    CONSOLE_DEFAULT =3D CONSOLE_SERIAL | CONSOLE_PV | CONSOLE_VIDEO |
+                      CONSOLE_DEBUG,
+    CONSOLE_ALL     =3D CONSOLE_DEFAULT | CONSOLE_RING,
+};
+
+static void console_puts(const char *str, size_t len, unsigned int flags);
+
 /* console: comma-separated list of console outputs. */
 static char __initdata opt_console[30] =3D OPT_CONSOLE_STR;
 string_param("console", opt_console);
@@ -338,8 +352,6 @@ static bool console_locks_busted;
=20
 static void conring_puts(const char *str, size_t len)
 {
-    ASSERT(rspin_is_locked(&console_lock));
-
     while ( len-- )
         conring[CONRING_IDX_MASK(conringp++)] =3D *str++;
=20
@@ -432,9 +444,6 @@ void console_serial_puts(const char *s, size_t nr)
         serial_steal_fn(s, nr);
     else
         serial_puts(sercon_handle, s, nr);
-
-    /* Copy all serial output into PV console */
-    pv_console_puts(s, nr);
 }
=20
 static void cf_check dump_console_ring_key(unsigned char key)
@@ -442,6 +451,7 @@ static void cf_check dump_console_ring_key(unsigned cha=
r key)
     uint32_t idx, len, sofar, c;
     unsigned int order;
     char *buf;
+    unsigned long flags;
=20
     printk("'%c' pressed -> dumping console ring buffer (dmesg)\n", key);
=20
@@ -455,6 +465,8 @@ static void cf_check dump_console_ring_key(unsigned cha=
r key)
         return;
     }
=20
+    flags =3D console_lock_recursive_irqsave();
+
     c =3D conringc;
     sofar =3D 0;
     while ( (c !=3D conringp) )
@@ -468,8 +480,9 @@ static void cf_check dump_console_ring_key(unsigned cha=
r key)
         c +=3D len;
     }
=20
-    console_serial_puts(buf, sofar);
-    video_puts(buf, sofar);
+    console_puts(buf, sofar, CONSOLE_SERIAL | CONSOLE_VIDEO | CONSOLE_PV);
+
+    console_unlock_recursive_irqrestore(flags);
=20
     free_xenheap_pages(buf, order);
 }
@@ -618,11 +631,61 @@ static inline void xen_console_write_debug_port(const=
 char *buf, size_t len)
 }
 #endif
=20
+static inline void console_debug_puts(const char *str, size_t len)
+{
+#ifdef CONFIG_X86
+    if ( opt_console_xen )
+    {
+        if ( xen_guest )
+            xen_hypercall_console_write(str, len);
+        else
+            xen_console_write_debug_port(str, len);
+    }
+#endif
+}
+
+/*
+ * Write buffer to all enabled console devices.
+ *
+ * That will handle all possible scenarios working w/ console
+ * - physical console (serial console, VGA console (x86 only));
+ * - PV console;
+ * - debug console (x86 only): debug I/O port or __HYPERVISOR_console_io
+ *   hypercall;
+ * - console ring.
+ */
+static void console_puts(const char *str, size_t len, unsigned int flags)
+{
+    ASSERT(rspin_is_locked(&console_lock));
+
+    if ( flags & CONSOLE_SERIAL )
+        console_serial_puts(str, len);
+
+    if ( flags & CONSOLE_PV )
+        pv_console_puts(str, len);
+
+    if ( flags & CONSOLE_VIDEO )
+        video_puts(str, len);
+
+    if ( flags & CONSOLE_DEBUG )
+        console_debug_puts(str, len);
+
+    if ( flags & CONSOLE_RING )
+        conring_puts(str, len);
+}
+
+static inline void __putstr(const char *str)
+{
+    console_puts(str, strlen(str), CONSOLE_ALL);
+}
+
 static long guest_console_write(XEN_GUEST_HANDLE_PARAM(char) buffer,
                                 unsigned int count)
 {
     char kbuf[128];
     unsigned int kcount =3D 0;
+    unsigned int flags =3D opt_console_to_ring
+                         ? CONSOLE_ALL : CONSOLE_DEFAULT;
     struct domain *cd =3D current->domain;
=20
     while ( count > 0 )
@@ -640,23 +703,7 @@ static long guest_console_write(XEN_GUEST_HANDLE_PARAM=
(char) buffer,
         {
             /* Use direct console output as it could be interactive */
             nrspin_lock_irq(&console_lock);
-
-            console_serial_puts(kbuf, kcount);
-            video_puts(kbuf, kcount);
-
-#ifdef CONFIG_X86
-            if ( opt_console_xen )
-            {
-                if ( xen_guest )
-                    xen_hypercall_console_write(kbuf, kcount);
-                else
-                    xen_console_write_debug_port(kbuf, kcount);
-            }
-#endif
-
-            if ( opt_console_to_ring )
-                conring_puts(kbuf, kcount);
-
+            console_puts(kbuf, kcount, flags);
             nrspin_unlock_irq(&console_lock);
         }
         else
@@ -757,28 +804,6 @@ long do_console_io(
  * *****************************************************
  */
=20
-static void __putstr(const char *str)
-{
-    size_t len =3D strlen(str);
-
-    ASSERT(rspin_is_locked(&console_lock));
-
-    console_serial_puts(str, len);
-    video_puts(str, len);
-
-#ifdef CONFIG_X86
-    if ( opt_console_xen )
-    {
-        if ( xen_guest )
-            xen_hypercall_console_write(str, len);
-        else
-            xen_console_write_debug_port(str, len);
-    }
-#endif
-
-    conring_puts(str, len);
-}
-
 static int printk_prefix_check(char *p, char **pp)
 {
     int loglvl =3D -1;
--=20
2.34.1




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Date: Sat, 26 Apr 2025 18:50:55 +0000
To: xen-devel@lists.xenproject.org
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com
Subject: [PATCH v2 3/3] xen/console: introduce conring_flush()
Message-ID: <20250426185021.100646-4-dmukhin@ford.com>
In-Reply-To: <20250426185021.100646-1-dmukhin@ford.com>
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From: Denis Mukhin 

Introduce conring_flush() to ensure all messages kept in the internal
console ring are sent to all physical consoles (serial, VGA (x86))
after their initialization is completed.

Resolves: https://gitlab.com/xen-project/xen/-/issues/184
Signed-off-by: Denis Mukhin 
---
Changes v1->v2:
- rebased
---
 xen/drivers/char/console.c | 31 +++++++++++++++++++++----------
 1 file changed, 21 insertions(+), 10 deletions(-)

diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c
index 8f882a47d1..8e5fc6c58c 100644
--- a/xen/drivers/char/console.c
+++ b/xen/drivers/char/console.c
@@ -446,24 +446,20 @@ void console_serial_puts(const char *s, size_t nr)
         serial_puts(sercon_handle, s, nr);
 }
=20
-static void cf_check dump_console_ring_key(unsigned char key)
+/*
+ * Flush contents of the conring to the physical console devices.
+ */
+static int conring_flush(void)
 {
     uint32_t idx, len, sofar, c;
     unsigned int order;
     char *buf;
     unsigned long flags;
=20
-    printk("'%c' pressed -> dumping console ring buffer (dmesg)\n", key);
-
-    /* create a buffer in which we'll copy the ring in the correct
-       order and NUL terminate */
     order =3D get_order_from_bytes(conring_size + 1);
     buf =3D alloc_xenheap_pages(order, 0);
     if ( buf =3D=3D NULL )
-    {
-        printk("unable to allocate memory!\n");
-        return;
-    }
+        return -ENOMEM;
=20
     flags =3D console_lock_recursive_irqsave();
=20
@@ -485,6 +481,18 @@ static void cf_check dump_console_ring_key(unsigned ch=
ar key)
     console_unlock_recursive_irqrestore(flags);
=20
     free_xenheap_pages(buf, order);
+
+    return 0;
+}
+
+static void cf_check conring_dump_keyhandler(unsigned char key)
+{
+    int rc;
+
+    printk("'%c' pressed -> dumping console ring buffer (dmesg)\n", key);
+    rc =3D conring_flush();
+    if ( rc )
+        printk("failed to dump console ring buffer: %d\n", rc);
 }
=20
 /*
@@ -1049,6 +1057,9 @@ void __init console_init_preirq(void)
     serial_set_rx_handler(sercon_handle, serial_rx);
     pv_console_set_rx_handler(serial_rx);
=20
+    /* NB: send conring contents to all enabled physical consoles, if any =
*/
+    conring_flush();
+
     /* HELLO WORLD --- start-of-day banner text. */
     nrspin_lock(&console_lock);
     __putstr(xen_banner());
@@ -1139,7 +1150,7 @@ void __init console_endboot(void)
     if ( opt_conswitch[1] =3D=3D 'x' )
         console_rx =3D max_console_rx;
=20
-    register_keyhandler('w', dump_console_ring_key,
+    register_keyhandler('w', conring_dump_keyhandler,
                         "synchronously dump console ring buffer (dmesg)", =
0);
     register_irq_keyhandler('+', &do_inc_thresh,
                             "increase log level threshold", 0);
--=20
2.34.1




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Date: Sat, 26 Apr 2025 20:55:50 +0200
From: Ingo Molnar 
To: "H. Peter Anvin" 
Cc: Arnd Bergmann , Thomas Gleixner ,
	Ingo Molnar , Borislav Petkov ,
	Dave Hansen , x86@kernel.org,
	Arnd Bergmann , Juergen Gross ,
	Boris Ostrovsky ,
	Alexander Usyskin ,
	Greg Kroah-Hartman ,
	Mateusz =?utf-8?Q?Jo=C5=84czyk?= ,
	"Mike Rapoport (Microsoft)" ,
	Ard Biesheuvel ,
	Peter Zijlstra , linux-kernel@vger.kernel.org,
	xen-devel@lists.xenproject.org,
	Linus Torvalds 
Subject: Re: [PATCH] [RFC] x86/cpu: rework instruction set selection
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* H. Peter Anvin  wrote:

> Dropping CMOV would mean dropping P5 support.

Yeah, I think we should make the cutoff at the 686 level. Is there any 
strong reason not to do that? Stable kernels will still exist for a 
very long time for ancient boards.

	Ingo


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Date: Sat, 26 Apr 2025 20:58:59 +0200
From: "Arnd Bergmann" 
To: "Ingo Molnar" , "Arnd Bergmann" 
Cc: "Thomas Gleixner" , "Ingo Molnar" ,
 "Borislav Petkov" ,
 "Dave Hansen" , x86@kernel.org,
 "H. Peter Anvin" , "Juergen Gross" ,
 "Boris Ostrovsky" ,
 "Alexander Usyskin" ,
 "Greg Kroah-Hartman" ,
 =?UTF-8?Q?Mateusz_Jo=C5=84czyk?= ,
 "Mike Rapoport" , "Ard Biesheuvel" ,
 "Peter Zijlstra" , linux-kernel@vger.kernel.org,
 xen-devel@lists.xenproject.org,
 "Linus Torvalds" 
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References: <20250425141740.734030-1-arnd@kernel.org>
 
Subject: Re: [PATCH] [RFC] x86/cpu: rework instruction set selection
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On Sat, Apr 26, 2025, at 11:08, Ingo Molnar wrote:
> * Arnd Bergmann  wrote:
>
> While the simplification is nice on its face, this looks messy:
>
>>  
>>  config X86_PAE
>>  	bool "PAE (Physical Address Extension) Support"
>> -	depends on X86_32 && X86_HAVE_PAE
>> +	depends on X86_32 && X86_CMOV
>
> Coupling CMOV to PAE ... :-/

Right. With the current set of features, CMOV is almost the
same as 686. My reasoning was that support for CMOV has a
very clear definition, with the instruction either being
available or not.

When the M686/MPENTIUMII/MK6/... options are just optimization
levels rather than selecting an instruction set, X86_PAE
can't depend on those any more. An easy answer here would be
to not have X86_PAE depend on anything, but instead make it
force X86_MINIMUM_CPU_FAMILY=6.

>> +config X86_CMOV
>> +	bool "Require 686-class CMOV instructions" if X86_32
>> +	default y
>>  	help
>> -	  This is the processor type of your CPU. This information is
>> -	  used for optimizing purposes. In order to compile a kernel
>> -	  that can run on all supported x86 CPU types (albeit not
>> -	  optimally fast), you can specify "586" here.
>> +	  Most x86-32 processor implementations are compatible with
>> +	  the the CMOV instruction originally added in the Pentium Pro,
>> +	  and they perform much better when using it.
>> +
>> +	  Disable this option to build for 586-class CPUs without this
>> +	  instruction. This is only required for the original Intel
>> +	  Pentium (P5, P54, P55), AMD K6/K6-II/K6-3D, Geode GX1 and Via
>> +	  CyrixIII/C3 CPUs.
>
> Very few users will know anything about CMOV.
>
> I'd argue the right path forward is to just bite the bullet and remove 
> non-CMOV support as well, that would be the outcome *anyway* in a few 
> years. That would allow basically a single 'modern' 32-bit kernel that 
> is supposed to boot on every supported CPU. People might even end up 
> testing it ... ;-)

That would be a much more drastic change than requiring CX8
and TSC, which were present on almost all Socket 7 CPUs and
all embedded cores other than Elan and Vortex86SX.

CMOV is missing not just on old Socket 5/7 CPUs (Pentium
MMX, AMD K6, Cyrix MII) but also newer embedded Via C3, Geode GX
and Vortex86DX/MX/EX/DX2. The replacement Nehemiah (2003), GeodeLX
(2005) and Vortex86DX3/EX2 (2015!) have CMOV, but the old ones
were sold alongside them for years, and some of the 586-class
Vortex86 products are still commercially available.

There is a good chance that we could just not use CMOV and only
build 586-compatible kernels without anyone caring about the
performance difference. There is not much to gain here either
though, as the cost of supporting both 586-class and 686-class
builds is rather small: there is a compiler flag, a boot time
check and microoptimziation in ffs/fls.

     Arnd


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Date: Sat, 26 Apr 2025 21:09:50 +0200
From: Ingo Molnar 
To: Arnd Bergmann 
Cc: Arnd Bergmann , Thomas Gleixner ,
	Ingo Molnar , Borislav Petkov ,
	Dave Hansen , x86@kernel.org,
	"H. Peter Anvin" , Juergen Gross ,
	Boris Ostrovsky ,
	Alexander Usyskin ,
	Greg Kroah-Hartman ,
	Mateusz =?utf-8?Q?Jo=C5=84czyk?= ,
	Mike Rapoport , Ard Biesheuvel ,
	Peter Zijlstra , linux-kernel@vger.kernel.org,
	xen-devel@lists.xenproject.org,
	Linus Torvalds 
Subject: Re: [PATCH] [RFC] x86/cpu: rework instruction set selection
Message-ID: 
References: <20250425141740.734030-1-arnd@kernel.org>
 
 
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* Arnd Bergmann  wrote:

> CMOV is missing not just on old Socket 5/7 CPUs (Pentium MMX, AMD K6, 
> Cyrix MII) but also newer embedded Via C3, Geode GX and 
> Vortex86DX/MX/EX/DX2. The replacement Nehemiah (2003), GeodeLX (2005) 
> and Vortex86DX3/EX2 (2015!) have CMOV, but the old ones were sold 
> alongside them for years, and some of the 586-class Vortex86 products 
> are still commercially available.

Very few (if any) of the commercially available products will run 
modern 6.16+ kernels, right?

Note that the real danger the 32-bit x86 kernel is going to be facing 
in 2-5 years is total removal due to lack of development interest, but 
I think we can support 686+ reasonably far into the future, and can 
keep it tested reasonably - while covering like 99%+ of the currently 
available 32-bit-only x86 products on the market. The fewer variants, 
the better.

Thanks,

	Ingo


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From: Linus Torvalds 
Date: Sat, 26 Apr 2025 12:24:37 -0700
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Subject: Re: [PATCH] [RFC] x86/cpu: rework instruction set selection
To: Arnd Bergmann 
Cc: Ingo Molnar , Arnd Bergmann , 
	Thomas Gleixner , Ingo Molnar , Borislav Petkov , 
	Dave Hansen , x86@kernel.org, 
	"H. Peter Anvin" , Juergen Gross , 
	Boris Ostrovsky , 
	Alexander Usyskin , 
	Greg Kroah-Hartman , =?UTF-8?Q?Mateusz_Jo=C5=84czyk?= , 
	Mike Rapoport , Ard Biesheuvel , Peter Zijlstra , 
	linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org
Content-Type: text/plain; charset="UTF-8"

On Sat, 26 Apr 2025 at 11:59, Arnd Bergmann  wrote:
>
> Right. With the current set of features, CMOV is almost the
> same as 686. My reasoning was that support for CMOV has a
> very clear definition, with the instruction either being
> available or not.

Yeah, I don't think there's any reason to make CMOV a reason to drop support.

It has questionable performance impact - I doubt anybody can measure
it - and the "maintenance burden" is basically a single compiler flag.

(And yes, one use in a x86 header file that is pretty questionable
too: I think the reason for the cmov is actually i486-only behavior
and we could probably unify the 32-bit and 64-bit implementation)

Let's not drop Pentium support due to something as insignificant as that.

Particularly as the only half-way "modern" use of the Pentium core is
actually the embedded cores (ie old atoms and clones).

We have good reasons to drop i486 (and the "fake Pentium" cores that
weren't). We _don't_ have good reason to drop Pentium support, I
think.

>  An easy answer here would be
> to not have X86_PAE depend on anything, but instead make it
> force X86_MINIMUM_CPU_FAMILY=6.

Make it so.

          Linus


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From: Linus Torvalds 
Date: Sat, 26 Apr 2025 12:55:13 -0700
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Subject: Re: [PATCH] [RFC] x86/cpu: rework instruction set selection
To: Arnd Bergmann 
Cc: Ingo Molnar , Arnd Bergmann , 
	Thomas Gleixner , Ingo Molnar , Borislav Petkov , 
	Dave Hansen , x86@kernel.org, 
	"H. Peter Anvin" , Juergen Gross , 
	Boris Ostrovsky , 
	Alexander Usyskin , 
	Greg Kroah-Hartman , =?UTF-8?Q?Mateusz_Jo=C5=84czyk?= , 
	Mike Rapoport , Ard Biesheuvel , Peter Zijlstra , 
	linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org
Content-Type: text/plain; charset="UTF-8"

On Sat, 26 Apr 2025 at 12:24, Linus Torvalds
 wrote:
>
> (And yes, one use in a x86 header file that is pretty questionable
> too: I think the reason for the cmov is actually i486-only behavior
> and we could probably unify the 32-bit and 64-bit implementation)

Actually, what we *should* do is to remove that manual use of 'cmov'
entirely - even if we decide that yes, that undefined zero case is
actually real.

We should probably change it to use CC_SET(), and the compiler will do
a much better job - and probably never use cmov anyway.

And yes, that will generate worse code if you have an old compiler
that doesn't do ASM_FLAG_OUTPUTS, but hey, that's true in general. If
you want good code, you need a good compiler.

And clang needs to learn the CC_SET() pattern anyway.

So I think that manual cmov pattern for x86-32 should be replaced with

        bool zero;

        asm("bsfl %[in],%[out]"
            CC_SET(z)
            : CC_OUT(z) (zero),
              [out]"=r" (r)
            : [in] "rm" (x));

        return zero ? 0 : r+1;

instead (that's ffs(), and fls() would need the same thing except with
bsrl insteadm, of course).

I bet that would actually improve code generation.

And I also bet it doesn't actually matter, of course.

           Linus


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Date: Sat, 26 Apr 2025 16:47:55 -0700
From: "H. Peter Anvin" 
To: Linus Torvalds ,
        Arnd Bergmann 
CC: Ingo Molnar , Arnd Bergmann ,
        Thomas Gleixner , Ingo Molnar ,
        Borislav Petkov ,
        Dave Hansen , x86@kernel.org,
        Juergen Gross ,
        Boris Ostrovsky ,
        Alexander Usyskin ,
        Greg Kroah-Hartman ,
        =?UTF-8?Q?Mateusz_Jo=C5=84czyk?= ,
        Mike Rapoport , Ard Biesheuvel ,
        Peter Zijlstra , linux-kernel@vger.kernel.org,
        xen-devel@lists.xenproject.org
Subject: Re: [PATCH] [RFC] x86/cpu: rework instruction set selection
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On April 26, 2025 12:55:13 PM PDT, Linus Torvalds  wrote:
>On Sat, 26 Apr 2025 at 12:24, Linus Torvalds
> wrote:
>>
>> (And yes, one use in a x86 header file that is pretty questionable
>> too: I think the reason for the cmov is actually i486-only behavior
>> and we could probably unify the 32-bit and 64-bit implementation)
>
>Actually, what we *should* do is to remove that manual use of 'cmov'
>entirely - even if we decide that yes, that undefined zero case is
>actually real=2E
>
>We should probably change it to use CC_SET(), and the compiler will do
>a much better job - and probably never use cmov anyway=2E
>
>And yes, that will generate worse code if you have an old compiler
>that doesn't do ASM_FLAG_OUTPUTS, but hey, that's true in general=2E If
>you want good code, you need a good compiler=2E
>
>And clang needs to learn the CC_SET() pattern anyway=2E
>
>So I think that manual cmov pattern for x86-32 should be replaced with
>
>        bool zero;
>
>        asm("bsfl %[in],%[out]"
>            CC_SET(z)
>            : CC_OUT(z) (zero),
>              [out]"=3Dr" (r)
>            : [in] "rm" (x));
>
>        return zero ? 0 : r+1;
>
>instead (that's ffs(), and fls() would need the same thing except with
>bsrl insteadm, of course)=2E
>
>I bet that would actually improve code generation=2E
>
>And I also bet it doesn't actually matter, of course=2E
>
>           Linus

The undefined zero case applies to family < 6 as far as I know=2E=2E=2E th=
e same platforms which don't have cmov=2E=2E=2E


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Date: Sat, 26 Apr 2025 17:02:41 -0700
From: "H. Peter Anvin" 
To: Linus Torvalds ,
        Arnd Bergmann 
CC: Ingo Molnar , Arnd Bergmann ,
        Thomas Gleixner , Ingo Molnar ,
        Borislav Petkov ,
        Dave Hansen , x86@kernel.org,
        Juergen Gross ,
        Boris Ostrovsky ,
        Alexander Usyskin ,
        Greg Kroah-Hartman ,
        =?UTF-8?Q?Mateusz_Jo=C5=84czyk?= ,
        Mike Rapoport , Ard Biesheuvel ,
        Peter Zijlstra , linux-kernel@vger.kernel.org,
        xen-devel@lists.xenproject.org
Subject: Re: [PATCH] [RFC] x86/cpu: rework instruction set selection
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On April 26, 2025 12:55:13 PM PDT, Linus Torvalds  wrote:
>On Sat, 26 Apr 2025 at 12:24, Linus Torvalds
> wrote:
>>
>> (And yes, one use in a x86 header file that is pretty questionable
>> too: I think the reason for the cmov is actually i486-only behavior
>> and we could probably unify the 32-bit and 64-bit implementation)
>
>Actually, what we *should* do is to remove that manual use of 'cmov'
>entirely - even if we decide that yes, that undefined zero case is
>actually real=2E
>
>We should probably change it to use CC_SET(), and the compiler will do
>a much better job - and probably never use cmov anyway=2E
>
>And yes, that will generate worse code if you have an old compiler
>that doesn't do ASM_FLAG_OUTPUTS, but hey, that's true in general=2E If
>you want good code, you need a good compiler=2E
>
>And clang needs to learn the CC_SET() pattern anyway=2E
>
>So I think that manual cmov pattern for x86-32 should be replaced with
>
>        bool zero;
>
>        asm("bsfl %[in],%[out]"
>            CC_SET(z)
>            : CC_OUT(z) (zero),
>              [out]"=3Dr" (r)
>            : [in] "rm" (x));
>
>        return zero ? 0 : r+1;
>
>instead (that's ffs(), and fls() would need the same thing except with
>bsrl insteadm, of course)=2E
>
>I bet that would actually improve code generation=2E
>
>And I also bet it doesn't actually matter, of course=2E
>
>           Linus

It is unfortunate, if understandable, that we ended up using a convention =
other than what ended up becoming standard=2E (Return the size in bits if t=
he input is 0=2E)

This would let us use __builtin_ctz() > tzcnt which I believe is always in=
line on x86, and probably would help several other architectures too=2E

How much of a pain would it really be to fix this interface?


From xen-devel-bounces@lists.xenproject.org Sun Apr 27 00:36:32 2025
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Date: Sat, 26 Apr 2025 17:35:49 -0700
From: "H. Peter Anvin" 
To: Ingo Molnar 
CC: Arnd Bergmann , Thomas Gleixner ,
        Ingo Molnar , Borislav Petkov ,
        Dave Hansen , x86@kernel.org,
        Arnd Bergmann , Juergen Gross ,
        Boris Ostrovsky ,
        Alexander Usyskin ,
        Greg Kroah-Hartman ,
        =?UTF-8?Q?Mateusz_Jo=C5=84czyk?= ,
        "Mike Rapoport (Microsoft)" ,
        Ard Biesheuvel ,
        Peter Zijlstra , linux-kernel@vger.kernel.org,
        xen-devel@lists.xenproject.org,
        Linus Torvalds 
Subject: Re: [PATCH] [RFC] x86/cpu: rework instruction set selection
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On April 26, 2025 11:55:50 AM PDT, Ingo Molnar  wrote:
>
>* H=2E Peter Anvin  wrote:
>
>> Dropping CMOV would mean dropping P5 support=2E
>
>Yeah, I think we should make the cutoff at the 686 level=2E Is there any=
=20
>strong reason not to do that? Stable kernels will still exist for a=20
>very long time for ancient boards=2E
>
>	Ingo

I don't think some of the embedded 586-level ISA CPUs are ancient=2E


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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
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        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
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        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com,
        dapeng1.mi@linux.intel.com, ilpo.jarvinen@linux.intel.com
Subject: [PATCH v4 06/15] x86/xen/msr: Return u64 consistently in Xen PMC read functions
Date: Sun, 27 Apr 2025 02:20:18 -0700
Message-ID: <20250427092027.1598740-7-xin@zytor.com>
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The pv_ops PMC read API is defined as:
        u64 (*read_pmc)(int counter);

But Xen PMC read functions return unsigned long long, make them
return u64 consistently.

Signed-off-by: Xin Li (Intel) 
Reviewed-by: Juergen Gross 
Acked-by: Peter Zijlstra (Intel) 
---
 arch/x86/xen/pmu.c     | 6 +++---
 arch/x86/xen/xen-ops.h | 2 +-
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/x86/xen/pmu.c b/arch/x86/xen/pmu.c
index f06987b0efc3..9c1682af620a 100644
--- a/arch/x86/xen/pmu.c
+++ b/arch/x86/xen/pmu.c
@@ -346,7 +346,7 @@ bool pmu_msr_write(unsigned int msr, uint32_t low, uint32_t high, int *err)
 	return true;
 }
 
-static unsigned long long xen_amd_read_pmc(int counter)
+static u64 xen_amd_read_pmc(int counter)
 {
 	struct xen_pmu_amd_ctxt *ctxt;
 	uint64_t *counter_regs;
@@ -366,7 +366,7 @@ static unsigned long long xen_amd_read_pmc(int counter)
 	return counter_regs[counter];
 }
 
-static unsigned long long xen_intel_read_pmc(int counter)
+static u64 xen_intel_read_pmc(int counter)
 {
 	struct xen_pmu_intel_ctxt *ctxt;
 	uint64_t *fixed_counters;
@@ -396,7 +396,7 @@ static unsigned long long xen_intel_read_pmc(int counter)
 	return arch_cntr_pair[counter].counter;
 }
 
-unsigned long long xen_read_pmc(int counter)
+u64 xen_read_pmc(int counter)
 {
 	if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
 		return xen_amd_read_pmc(counter);
diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h
index 63c13a2ccf55..735f58780704 100644
--- a/arch/x86/xen/xen-ops.h
+++ b/arch/x86/xen/xen-ops.h
@@ -277,7 +277,7 @@ static inline void xen_pmu_finish(int cpu) {}
 bool pmu_msr_read(unsigned int msr, uint64_t *val, int *err);
 bool pmu_msr_write(unsigned int msr, uint32_t low, uint32_t high, int *err);
 int pmu_apic_update(uint32_t reg);
-unsigned long long xen_read_pmc(int counter);
+u64 xen_read_pmc(int counter);
 
 #ifdef CONFIG_SMP
 
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
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Subject: [PATCH v4 03/15] x86/msr: Remove rdpmc()
Date: Sun, 27 Apr 2025 02:20:15 -0700
Message-ID: <20250427092027.1598740-4-xin@zytor.com>
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rdpmc() is not used anywhere, remove it.

Signed-off-by: Xin Li (Intel) 
Acked-by: Dave Hansen 
Acked-by: Peter Zijlstra (Intel) 
---
 arch/x86/include/asm/msr.h      | 7 -------
 arch/x86/include/asm/paravirt.h | 7 -------
 2 files changed, 14 deletions(-)

diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 2caa13830e11..e05466e486fc 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -234,13 +234,6 @@ static inline int rdmsrq_safe(u32 msr, u64 *p)
 	return err;
 }
 
-#define rdpmc(counter, low, high)			\
-do {							\
-	u64 _l = native_read_pmc((counter));		\
-	(low)  = (u32)_l;				\
-	(high) = (u32)(_l >> 32);			\
-} while (0)
-
 #define rdpmcl(counter, val) ((val) = native_read_pmc(counter))
 
 #endif	/* !CONFIG_PARAVIRT_XXL */
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index 86a77528792d..c4dedb984735 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -244,13 +244,6 @@ static inline u64 paravirt_read_pmc(int counter)
 	return PVOP_CALL1(u64, cpu.read_pmc, counter);
 }
 
-#define rdpmc(counter, low, high)		\
-do {						\
-	u64 _l = paravirt_read_pmc(counter);	\
-	low = (u32)_l;				\
-	high = _l >> 32;			\
-} while (0)
-
 #define rdpmcl(counter, val) ((val) = paravirt_read_pmc(counter))
 
 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
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Subject: [PATCH v4 10/15] x86/xen/msr: Remove calling native_{read,write}_msr{,_safe}() in pmu_msr_{read,write}()
Date: Sun, 27 Apr 2025 02:20:22 -0700
Message-ID: <20250427092027.1598740-11-xin@zytor.com>
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hpa found that pmu_msr_write() is actually a completely pointless
function [1]: all it does is shuffle some arguments, then calls
pmu_msr_chk_emulated() and if it returns true AND the emulated flag
is clear then does *exactly the same thing* that the calling code
would have done if pmu_msr_write() itself had returned true.  And
pmu_msr_read() does the equivalent stupidity.

Remove the calls to native_{read,write}_msr{,_safe}() within
pmu_msr_{read,write}().  Instead reuse the existing calling code
that decides whether to call native_{read,write}_msr{,_safe}() based
on the return value from pmu_msr_{read,write}().  Consequently,
eliminate the need to pass an error pointer to pmu_msr_{read,write}().

While at it, refactor pmu_msr_write() to take the MSR value as a u64
argument, replacing the current dual u32 arguments, because the dual
u32 arguments were only used to call native_write_msr{,_safe}(), which
has now been removed.

[1]: https://lore.kernel.org/lkml/0ec48b84-d158-47c6-b14c-3563fd14bcc4@zytor.com/

Suggested-by: H. Peter Anvin (Intel) 
Sign-off-by: Xin Li (Intel) 
Reviewed-by: Juergen Gross 
Acked-by: Peter Zijlstra (Intel) 
---

Change in v3:
*) Rename pmu_msr_{read,write}() to pmu_msr_{read,write}_emulated()
   (Dapeng Mi).
*) Fix a pmu_msr_read() callsite with wrong arguments (Dapeng Mi).
---
 arch/x86/xen/enlighten_pv.c |  8 ++++++--
 arch/x86/xen/pmu.c          | 27 ++++-----------------------
 arch/x86/xen/xen-ops.h      |  4 ++--
 3 files changed, 12 insertions(+), 27 deletions(-)

diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c
index 846b5737d320..61e51a970f3c 100644
--- a/arch/x86/xen/enlighten_pv.c
+++ b/arch/x86/xen/enlighten_pv.c
@@ -1090,7 +1090,7 @@ static u64 xen_do_read_msr(unsigned int msr, int *err)
 {
 	u64 val = 0;	/* Avoid uninitialized value for safe variant. */
 
-	if (pmu_msr_read(msr, &val, err))
+	if (pmu_msr_read_emulated(msr, &val))
 		return val;
 
 	if (err)
@@ -1132,6 +1132,8 @@ static void set_seg(unsigned int which, unsigned int low, unsigned int high,
 static void xen_do_write_msr(unsigned int msr, unsigned int low,
 			     unsigned int high, int *err)
 {
+	u64 val;
+
 	switch (msr) {
 	case MSR_FS_BASE:
 		set_seg(SEGBASE_FS, low, high, err);
@@ -1158,7 +1160,9 @@ static void xen_do_write_msr(unsigned int msr, unsigned int low,
 		break;
 
 	default:
-		if (!pmu_msr_write(msr, low, high, err)) {
+		val = (u64)high << 32 | low;
+
+		if (!pmu_msr_write_emulated(msr, val)) {
 			if (err)
 				*err = native_write_msr_safe(msr, low, high);
 			else
diff --git a/arch/x86/xen/pmu.c b/arch/x86/xen/pmu.c
index 9c1682af620a..b6557f2d1a2e 100644
--- a/arch/x86/xen/pmu.c
+++ b/arch/x86/xen/pmu.c
@@ -313,37 +313,18 @@ static bool pmu_msr_chk_emulated(unsigned int msr, uint64_t *val, bool is_read,
 	return true;
 }
 
-bool pmu_msr_read(unsigned int msr, uint64_t *val, int *err)
+bool pmu_msr_read_emulated(u32 msr, u64 *val)
 {
 	bool emulated;
 
-	if (!pmu_msr_chk_emulated(msr, val, true, &emulated))
-		return false;
-
-	if (!emulated) {
-		*val = err ? native_read_msr_safe(msr, err)
-			   : native_read_msr(msr);
-	}
-
-	return true;
+	return pmu_msr_chk_emulated(msr, val, true, &emulated) && emulated;
 }
 
-bool pmu_msr_write(unsigned int msr, uint32_t low, uint32_t high, int *err)
+bool pmu_msr_write_emulated(u32 msr, u64 val)
 {
-	uint64_t val = ((uint64_t)high << 32) | low;
 	bool emulated;
 
-	if (!pmu_msr_chk_emulated(msr, &val, false, &emulated))
-		return false;
-
-	if (!emulated) {
-		if (err)
-			*err = native_write_msr_safe(msr, low, high);
-		else
-			native_write_msr(msr, low, high);
-	}
-
-	return true;
+	return pmu_msr_chk_emulated(msr, &val, false, &emulated) && emulated;
 }
 
 static u64 xen_amd_read_pmc(int counter)
diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h
index 735f58780704..163e03e33089 100644
--- a/arch/x86/xen/xen-ops.h
+++ b/arch/x86/xen/xen-ops.h
@@ -274,8 +274,8 @@ void xen_pmu_finish(int cpu);
 static inline void xen_pmu_init(int cpu) {}
 static inline void xen_pmu_finish(int cpu) {}
 #endif
-bool pmu_msr_read(unsigned int msr, uint64_t *val, int *err);
-bool pmu_msr_write(unsigned int msr, uint32_t low, uint32_t high, int *err);
+bool pmu_msr_read_emulated(u32 msr, u64 *val);
+bool pmu_msr_write_emulated(u32 msr, u64 val);
 int pmu_apic_update(uint32_t reg);
 u64 xen_read_pmc(int counter);
 
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
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Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
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        pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com,
        dapeng1.mi@linux.intel.com, ilpo.jarvinen@linux.intel.com
Subject: [PATCH v4 12/15] x86/xen/msr: Remove the error pointer argument from set_seg()
Date: Sun, 27 Apr 2025 02:20:24 -0700
Message-ID: <20250427092027.1598740-13-xin@zytor.com>
X-Mailer: git-send-email 2.49.0
In-Reply-To: <20250427092027.1598740-1-xin@zytor.com>
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MIME-Version: 1.0
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set_seg() is used to write the following MSRs on Xen:

    MSR_FS_BASE
    MSR_KERNEL_GS_BASE
    MSR_GS_BASE

But none of these MSRs are written using any MSR write safe API.
Therefore there is no need to pass an error pointer argument to
set_seg() for returning an error code to be used in MSR safe APIs.

Remove the error pointer argument.

Signed-off-by: Xin Li (Intel) 
Reviewed-by: Juergen Gross 
Acked-by: Peter Zijlstra (Intel) 
---

Change in v3:
*) Fix a typo: set_reg() => set_seg() (Juergen Gross).
---
 arch/x86/xen/enlighten_pv.c | 16 +++++-----------
 1 file changed, 5 insertions(+), 11 deletions(-)

diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c
index 528a2f4df050..c247e7689bc3 100644
--- a/arch/x86/xen/enlighten_pv.c
+++ b/arch/x86/xen/enlighten_pv.c
@@ -1110,17 +1110,11 @@ static u64 xen_do_read_msr(unsigned int msr, int *err)
 	return val;
 }
 
-static void set_seg(unsigned int which, unsigned int low, unsigned int high,
-		    int *err)
+static void set_seg(u32 which, u32 low, u32 high)
 {
 	u64 base = ((u64)high << 32) | low;
 
-	if (HYPERVISOR_set_segment_base(which, base) == 0)
-		return;
-
-	if (err)
-		*err = -EIO;
-	else
+	if (HYPERVISOR_set_segment_base(which, base))
 		WARN(1, "Xen set_segment_base(%u, %llx) failed\n", which, base);
 }
 
@@ -1136,15 +1130,15 @@ static void xen_do_write_msr(unsigned int msr, unsigned int low,
 
 	switch (msr) {
 	case MSR_FS_BASE:
-		set_seg(SEGBASE_FS, low, high, err);
+		set_seg(SEGBASE_FS, low, high);
 		break;
 
 	case MSR_KERNEL_GS_BASE:
-		set_seg(SEGBASE_GS_USER, low, high, err);
+		set_seg(SEGBASE_GS_USER, low, high);
 		break;
 
 	case MSR_GS_BASE:
-		set_seg(SEGBASE_GS_KERNEL, low, high, err);
+		set_seg(SEGBASE_GS_KERNEL, low, high);
 		break;
 
 	case MSR_STAR:
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
        pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com,
        dapeng1.mi@linux.intel.com, ilpo.jarvinen@linux.intel.com
Subject: [PATCH v4 00/15] MSR code cleanup part one
Date: Sun, 27 Apr 2025 02:20:12 -0700
Message-ID: <20250427092027.1598740-1-xin@zytor.com>
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This patch set is the first part of the patch set:

  MSR refactor with new MSR instructions support

@ https://lore.kernel.org/lkml/20250422082216.1954310-1-xin@zytor.com/T/#m5a34be7d4ed55f0baca965cb65452a08e9ad7c8a


It's getting *WAY* too big, and whether to zap the pv_ops MSR APIs is
still under argument.  Dave Hansen suggested to focus on rename stuff
first, most of which he acked.

Jürgen Groß also gave his RBs to the Xen MSR cleanup patches.

So here comes the first MSR cleanup patch set with version 4.


Changes in v4:
1) Add missing includes in a different patch (Ilpo Järvinen).
2) Add all necessary direct inclusions for msr.h (Ilpo Järvinen).
3) Remove two "else" that no longer make sense (Juergen Gross).
4) Collect RBs from Jürgen Groß and ABs from Peter Zijlstra.


Link to the previous v3 patch set:
https://lore.kernel.org/lkml/20250425083442.2390017-1-xin@zytor.com/


This patch series is based on:

  git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/msr


Xin Li (Intel) (15):
  x86/msr: Add missing includes of 
  x86/msr: Move rdtsc{,_ordered}() to 
  x86/msr: Remove rdpmc()
  x86/msr: Rename rdpmcl() to rdpmc()
  x86/msr: Convert the rdpmc() macro into an always inline function
  x86/xen/msr: Return u64 consistently in Xen PMC read functions
  x86/msr: Convert __wrmsr() uses to native_wrmsr{,q}() uses
  x86/msr: Add the native_rdmsrq() helper
  x86/msr: Convert __rdmsr() uses to native_rdmsrq() uses
  x86/xen/msr: Remove calling native_{read,write}_msr{,_safe}() in
    pmu_msr_{read,write}()
  x86/xen/msr: Remove pmu_msr_{read,write}()
  x86/xen/msr: Remove the error pointer argument from set_seg()
  x86/pvops/msr: refactor pv_cpu_ops.write_msr{,_safe}()
  x86/msr: Replace wrmsr(msr, low, 0) with wrmsrq(msr, low)
  x86/msr: Change the function type of native_read_msr_safe()

 arch/x86/coco/sev/core.c                      |   2 +-
 arch/x86/events/amd/brs.c                     |   4 +-
 arch/x86/events/amd/uncore.c                  |   2 +-
 arch/x86/events/core.c                        |   2 +-
 arch/x86/events/intel/core.c                  |   4 +-
 arch/x86/events/intel/ds.c                    |   2 +-
 arch/x86/events/msr.c                         |   3 +
 arch/x86/events/perf_event.h                  |   1 +
 arch/x86/events/probe.c                       |   2 +
 arch/x86/hyperv/hv_apic.c                     |   6 +-
 arch/x86/hyperv/hv_vtl.c                      |   4 +-
 arch/x86/hyperv/ivm.c                         |   3 +-
 arch/x86/include/asm/apic.h                   |   4 +-
 arch/x86/include/asm/fred.h                   |   1 +
 arch/x86/include/asm/microcode.h              |   2 +
 arch/x86/include/asm/mshyperv.h               |   3 +-
 arch/x86/include/asm/msr.h                    | 130 +++++-------------
 arch/x86/include/asm/paravirt.h               |  57 ++++----
 arch/x86/include/asm/paravirt_types.h         |  10 +-
 arch/x86/include/asm/suspend_32.h             |   1 +
 arch/x86/include/asm/suspend_64.h             |   1 +
 arch/x86/include/asm/switch_to.h              |   4 +-
 arch/x86/include/asm/tsc.h                    |  76 +++++++++-
 arch/x86/kernel/cpu/amd.c                     |   2 +-
 arch/x86/kernel/cpu/common.c                  |  10 +-
 arch/x86/kernel/cpu/mce/core.c                |   6 +-
 arch/x86/kernel/cpu/resctrl/pseudo_lock.c     |  25 ++--
 arch/x86/kernel/cpu/resctrl/rdtgroup.c        |   2 +-
 arch/x86/kernel/cpu/umwait.c                  |   4 +-
 arch/x86/kernel/fpu/xstate.h                  |   1 +
 arch/x86/kernel/hpet.c                        |   1 +
 arch/x86/kernel/kvm.c                         |   2 +-
 arch/x86/kernel/kvmclock.c                    |   2 +-
 arch/x86/kernel/process_64.c                  |   1 +
 arch/x86/kernel/trace_clock.c                 |   2 +-
 arch/x86/kernel/tsc_sync.c                    |   1 +
 arch/x86/kvm/svm/svm.c                        |  34 ++---
 arch/x86/kvm/vmx/vmx.c                        |   4 +-
 arch/x86/lib/kaslr.c                          |   2 +-
 arch/x86/mm/mem_encrypt_identity.c            |   5 +-
 arch/x86/realmode/init.c                      |   1 +
 arch/x86/xen/enlighten_pv.c                   |  58 ++++----
 arch/x86/xen/pmu.c                            |  72 +++-------
 arch/x86/xen/xen-ops.h                        |   5 +-
 drivers/acpi/acpi_extlog.c                    |   1 +
 drivers/acpi/processor_perflib.c              |   1 +
 drivers/acpi/processor_throttling.c           |   3 +-
 drivers/char/agp/nvidia-agp.c                 |   1 +
 drivers/cpufreq/amd-pstate-ut.c               |   2 +
 drivers/crypto/ccp/sev-dev.c                  |   1 +
 drivers/edac/amd64_edac.c                     |   1 +
 drivers/edac/ie31200_edac.c                   |   1 +
 drivers/edac/mce_amd.c                        |   1 +
 drivers/hwmon/hwmon-vid.c                     |   4 +
 drivers/idle/intel_idle.c                     |   1 +
 drivers/misc/cs5535-mfgpt.c                   |   1 +
 drivers/net/vmxnet3/vmxnet3_drv.c             |   4 +
 drivers/platform/x86/intel/ifs/core.c         |   1 +
 drivers/platform/x86/intel/ifs/load.c         |   1 +
 drivers/platform/x86/intel/ifs/runtest.c      |   1 +
 drivers/platform/x86/intel/pmc/cnp.c          |   1 +
 .../intel/speed_select_if/isst_if_common.c    |   1 +
 .../intel/speed_select_if/isst_if_mbox_msr.c  |   1 +
 .../intel/speed_select_if/isst_tpmi_core.c    |   1 +
 drivers/platform/x86/intel/turbo_max_3.c      |   1 +
 .../intel/uncore-frequency/uncore-frequency.c |   1 +
 drivers/powercap/intel_rapl_common.c          |   1 +
 drivers/powercap/intel_rapl_msr.c             |   1 +
 .../processor_thermal_device.c                |   1 +
 drivers/thermal/intel/intel_tcc_cooling.c     |   1 +
 drivers/thermal/intel/x86_pkg_temp_thermal.c  |   1 +
 drivers/video/fbdev/geode/display_gx.c        |   1 +
 drivers/video/fbdev/geode/gxfb_core.c         |   1 +
 drivers/video/fbdev/geode/lxfb_ops.c          |   1 +
 74 files changed, 308 insertions(+), 295 deletions(-)


base-commit: a5447e92e169dafaf02fd653500105c7186d7128
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
        pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com,
        dapeng1.mi@linux.intel.com, ilpo.jarvinen@linux.intel.com
Subject: [PATCH v4 01/15] x86/msr: Add missing includes of 
Date: Sun, 27 Apr 2025 02:20:13 -0700
Message-ID: <20250427092027.1598740-2-xin@zytor.com>
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For some reason, there are some TSC-related functions in the MSR
header even though there is a tsc.h header.

To facilitate the relocation of rdtsc{,_ordered}() from 
to  and to eventually eliminate the inclusion of
 in , add  to the source files that
reference definitions from .

Signed-off-by: Xin Li (Intel) 
Acked-by: Dave Hansen 
Acked-by: Peter Zijlstra (Intel) 
---

Change in v4:
*) Add missing includes in a different patch (Ilpo Järvinen).
*) Add all necessary direct inclusions for msr.h (Ilpo Järvinen).

Change in v3:
* Add a problem statement to the changelog (Dave Hansen).
---
 arch/x86/events/msr.c                                         | 3 +++
 arch/x86/events/perf_event.h                                  | 1 +
 arch/x86/events/probe.c                                       | 2 ++
 arch/x86/hyperv/ivm.c                                         | 1 +
 arch/x86/include/asm/fred.h                                   | 1 +
 arch/x86/include/asm/microcode.h                              | 2 ++
 arch/x86/include/asm/mshyperv.h                               | 1 +
 arch/x86/include/asm/msr.h                                    | 1 +
 arch/x86/include/asm/suspend_32.h                             | 1 +
 arch/x86/include/asm/suspend_64.h                             | 1 +
 arch/x86/include/asm/switch_to.h                              | 2 ++
 arch/x86/kernel/cpu/resctrl/pseudo_lock.c                     | 1 +
 arch/x86/kernel/fpu/xstate.h                                  | 1 +
 arch/x86/kernel/hpet.c                                        | 1 +
 arch/x86/kernel/process_64.c                                  | 1 +
 arch/x86/kernel/trace_clock.c                                 | 2 +-
 arch/x86/kernel/tsc_sync.c                                    | 1 +
 arch/x86/lib/kaslr.c                                          | 2 +-
 arch/x86/mm/mem_encrypt_identity.c                            | 1 +
 arch/x86/realmode/init.c                                      | 1 +
 drivers/acpi/acpi_extlog.c                                    | 1 +
 drivers/acpi/processor_perflib.c                              | 1 +
 drivers/acpi/processor_throttling.c                           | 3 ++-
 drivers/char/agp/nvidia-agp.c                                 | 1 +
 drivers/cpufreq/amd-pstate-ut.c                               | 2 ++
 drivers/crypto/ccp/sev-dev.c                                  | 1 +
 drivers/edac/amd64_edac.c                                     | 1 +
 drivers/edac/ie31200_edac.c                                   | 1 +
 drivers/edac/mce_amd.c                                        | 1 +
 drivers/hwmon/hwmon-vid.c                                     | 4 ++++
 drivers/idle/intel_idle.c                                     | 1 +
 drivers/misc/cs5535-mfgpt.c                                   | 1 +
 drivers/net/vmxnet3/vmxnet3_drv.c                             | 4 ++++
 drivers/platform/x86/intel/ifs/core.c                         | 1 +
 drivers/platform/x86/intel/ifs/load.c                         | 1 +
 drivers/platform/x86/intel/ifs/runtest.c                      | 1 +
 drivers/platform/x86/intel/pmc/cnp.c                          | 1 +
 drivers/platform/x86/intel/speed_select_if/isst_if_common.c   | 1 +
 drivers/platform/x86/intel/speed_select_if/isst_if_mbox_msr.c | 1 +
 drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c   | 1 +
 drivers/platform/x86/intel/turbo_max_3.c                      | 1 +
 .../platform/x86/intel/uncore-frequency/uncore-frequency.c    | 1 +
 drivers/powercap/intel_rapl_common.c                          | 1 +
 drivers/powercap/intel_rapl_msr.c                             | 1 +
 .../thermal/intel/int340x_thermal/processor_thermal_device.c  | 1 +
 drivers/thermal/intel/intel_tcc_cooling.c                     | 1 +
 drivers/thermal/intel/x86_pkg_temp_thermal.c                  | 1 +
 drivers/video/fbdev/geode/display_gx.c                        | 1 +
 drivers/video/fbdev/geode/gxfb_core.c                         | 1 +
 drivers/video/fbdev/geode/lxfb_ops.c                          | 1 +
 50 files changed, 63 insertions(+), 3 deletions(-)

diff --git a/arch/x86/events/msr.c b/arch/x86/events/msr.c
index 8970ecef87c5..c39e49cecace 100644
--- a/arch/x86/events/msr.c
+++ b/arch/x86/events/msr.c
@@ -3,6 +3,9 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+
 #include "probe.h"
 
 enum perf_msr_id {
diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h
index a5166fa9339b..a8d4e82e3589 100644
--- a/arch/x86/events/perf_event.h
+++ b/arch/x86/events/perf_event.h
@@ -17,6 +17,7 @@
 #include 
 #include 
 #include 
+#include 
 
 /* To enable MSR tracing please use the generic trace points. */
 
diff --git a/arch/x86/events/probe.c b/arch/x86/events/probe.c
index fda35cf25528..bb719d0d3f0b 100644
--- a/arch/x86/events/probe.c
+++ b/arch/x86/events/probe.c
@@ -2,6 +2,8 @@
 #include 
 #include 
 #include 
+
+#include 
 #include "probe.h"
 
 static umode_t
diff --git a/arch/x86/hyperv/ivm.c b/arch/x86/hyperv/ivm.c
index 1b8a2415183b..8209de792388 100644
--- a/arch/x86/hyperv/ivm.c
+++ b/arch/x86/hyperv/ivm.c
@@ -22,6 +22,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #ifdef CONFIG_AMD_MEM_ENCRYPT
diff --git a/arch/x86/include/asm/fred.h b/arch/x86/include/asm/fred.h
index 2a29e5216881..12b34d5b2953 100644
--- a/arch/x86/include/asm/fred.h
+++ b/arch/x86/include/asm/fred.h
@@ -9,6 +9,7 @@
 #include 
 
 #include 
+#include 
 #include 
 
 /*
diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h
index 263ea3dd0001..107a1aaa211b 100644
--- a/arch/x86/include/asm/microcode.h
+++ b/arch/x86/include/asm/microcode.h
@@ -2,6 +2,8 @@
 #ifndef _ASM_X86_MICROCODE_H
 #define _ASM_X86_MICROCODE_H
 
+#include 
+
 struct cpu_signature {
 	unsigned int sig;
 	unsigned int pf;
diff --git a/arch/x86/include/asm/mshyperv.h b/arch/x86/include/asm/mshyperv.h
index bab5ccfc60a7..15d00dace70f 100644
--- a/arch/x86/include/asm/mshyperv.h
+++ b/arch/x86/include/asm/mshyperv.h
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 /*
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 2ccc78ebc3d7..72a9ebc99078 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -12,6 +12,7 @@
 #include 
 #include 
 
+#include 
 #include 
 
 struct msr_info {
diff --git a/arch/x86/include/asm/suspend_32.h b/arch/x86/include/asm/suspend_32.h
index d8416b3bf832..e8e5aab06255 100644
--- a/arch/x86/include/asm/suspend_32.h
+++ b/arch/x86/include/asm/suspend_32.h
@@ -9,6 +9,7 @@
 
 #include 
 #include 
+#include 
 
 /* image of the saved processor state */
 struct saved_context {
diff --git a/arch/x86/include/asm/suspend_64.h b/arch/x86/include/asm/suspend_64.h
index 54df06687d83..b512f9665f78 100644
--- a/arch/x86/include/asm/suspend_64.h
+++ b/arch/x86/include/asm/suspend_64.h
@@ -9,6 +9,7 @@
 
 #include 
 #include 
+#include 
 
 /*
  * Image of the saved processor state, used by the low level ACPI suspend to
diff --git a/arch/x86/include/asm/switch_to.h b/arch/x86/include/asm/switch_to.h
index 75248546403d..4f21df7af715 100644
--- a/arch/x86/include/asm/switch_to.h
+++ b/arch/x86/include/asm/switch_to.h
@@ -52,6 +52,8 @@ do {									\
 } while (0)
 
 #ifdef CONFIG_X86_32
+#include 
+
 static inline void refresh_sysenter_cs(struct thread_struct *thread)
 {
 	/* Only happens when SEP is enabled, no need to test "SEP"arately: */
diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
index 2a82eb6a0376..26c354bdea07 100644
--- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
+++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
@@ -25,6 +25,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "../../events/perf_event.h" /* For X86_CONFIG() */
 #include "internal.h"
diff --git a/arch/x86/kernel/fpu/xstate.h b/arch/x86/kernel/fpu/xstate.h
index 5e5d35027f13..f705bd355ea2 100644
--- a/arch/x86/kernel/fpu/xstate.h
+++ b/arch/x86/kernel/fpu/xstate.h
@@ -5,6 +5,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #ifdef CONFIG_X86_64
 DECLARE_PER_CPU(u64, xfd_state);
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index cc5d12232216..c9982a7c9536 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #undef  pr_fmt
 #define pr_fmt(fmt) "hpet: " fmt
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index 24e1ccf22912..cfa9c031de91 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -57,6 +57,7 @@
 #include 
 #include 
 #include 
+#include 
 #ifdef CONFIG_IA32_EMULATION
 /* Not included via unistd.h */
 #include 
diff --git a/arch/x86/kernel/trace_clock.c b/arch/x86/kernel/trace_clock.c
index b8e7abe00b06..708d61743d15 100644
--- a/arch/x86/kernel/trace_clock.c
+++ b/arch/x86/kernel/trace_clock.c
@@ -4,7 +4,7 @@
  */
 #include 
 #include 
-#include 
+#include 
 
 /*
  * trace_clock_x86_tsc(): A clock that is just the cycle counter.
diff --git a/arch/x86/kernel/tsc_sync.c b/arch/x86/kernel/tsc_sync.c
index f1c7a86dbf49..ec3aa340d351 100644
--- a/arch/x86/kernel/tsc_sync.c
+++ b/arch/x86/kernel/tsc_sync.c
@@ -21,6 +21,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 struct tsc_adjust {
diff --git a/arch/x86/lib/kaslr.c b/arch/x86/lib/kaslr.c
index a58f451a7dd3..b5893928d55c 100644
--- a/arch/x86/lib/kaslr.c
+++ b/arch/x86/lib/kaslr.c
@@ -8,7 +8,7 @@
  */
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
diff --git a/arch/x86/mm/mem_encrypt_identity.c b/arch/x86/mm/mem_encrypt_identity.c
index 5eecdd92da10..afda349db35b 100644
--- a/arch/x86/mm/mem_encrypt_identity.c
+++ b/arch/x86/mm/mem_encrypt_identity.c
@@ -44,6 +44,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "mm_internal.h"
 
diff --git a/arch/x86/realmode/init.c b/arch/x86/realmode/init.c
index 263787b4800c..ed5c63c0b4e5 100644
--- a/arch/x86/realmode/init.c
+++ b/arch/x86/realmode/init.c
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 struct real_mode_header *real_mode_header;
diff --git a/drivers/acpi/acpi_extlog.c b/drivers/acpi/acpi_extlog.c
index 8465822b6672..f6b9562779de 100644
--- a/drivers/acpi/acpi_extlog.c
+++ b/drivers/acpi/acpi_extlog.c
@@ -15,6 +15,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "apei/apei-internal.h"
 #include 
diff --git a/drivers/acpi/processor_perflib.c b/drivers/acpi/processor_perflib.c
index 53996f1a2d80..64b8d1e19594 100644
--- a/drivers/acpi/processor_perflib.c
+++ b/drivers/acpi/processor_perflib.c
@@ -20,6 +20,7 @@
 #include 
 #ifdef CONFIG_X86
 #include 
+#include 
 #endif
 
 #define ACPI_PROCESSOR_FILE_PERFORMANCE	"performance"
diff --git a/drivers/acpi/processor_throttling.c b/drivers/acpi/processor_throttling.c
index 00d045e5f524..8482e9a8a7aa 100644
--- a/drivers/acpi/processor_throttling.c
+++ b/drivers/acpi/processor_throttling.c
@@ -18,9 +18,10 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
-#include 
+#include 
 
 /* ignore_tpc:
  *  0 -> acpi processor driver doesn't ignore _TPC values
diff --git a/drivers/char/agp/nvidia-agp.c b/drivers/char/agp/nvidia-agp.c
index e424360fb4a1..4787391bb6b4 100644
--- a/drivers/char/agp/nvidia-agp.c
+++ b/drivers/char/agp/nvidia-agp.c
@@ -11,6 +11,7 @@
 #include 
 #include 
 #include 
+#include 
 #include "agp.h"
 
 /* NVIDIA registers */
diff --git a/drivers/cpufreq/amd-pstate-ut.c b/drivers/cpufreq/amd-pstate-ut.c
index 707fa81c749f..c8d031b297d2 100644
--- a/drivers/cpufreq/amd-pstate-ut.c
+++ b/drivers/cpufreq/amd-pstate-ut.c
@@ -31,6 +31,8 @@
 
 #include 
 
+#include 
+
 #include "amd-pstate.h"
 
 
diff --git a/drivers/crypto/ccp/sev-dev.c b/drivers/crypto/ccp/sev-dev.c
index bb8a25ef5b43..ec8b37a7f40c 100644
--- a/drivers/crypto/ccp/sev-dev.c
+++ b/drivers/crypto/ccp/sev-dev.c
@@ -33,6 +33,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "psp-dev.h"
 #include "sev-dev.h"
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index db758aa900b0..622385218735 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -4,6 +4,7 @@
 #include "amd64_edac.h"
 #include 
 #include 
+#include 
 
 static struct edac_pci_ctl_info *pci_ctl;
 
diff --git a/drivers/edac/ie31200_edac.c b/drivers/edac/ie31200_edac.c
index 204834149579..5ddd83dc94ba 100644
--- a/drivers/edac/ie31200_edac.c
+++ b/drivers/edac/ie31200_edac.c
@@ -52,6 +52,7 @@
 
 #include 
 #include 
+#include 
 #include "edac_module.h"
 
 #define EDAC_MOD_STR "ie31200_edac"
diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c
index 50d74d3bf0f5..af3c12284a1e 100644
--- a/drivers/edac/mce_amd.c
+++ b/drivers/edac/mce_amd.c
@@ -3,6 +3,7 @@
 #include 
 
 #include 
+#include 
 
 #include "mce_amd.h"
 
diff --git a/drivers/hwmon/hwmon-vid.c b/drivers/hwmon/hwmon-vid.c
index 6d1175a51832..2df4956296ed 100644
--- a/drivers/hwmon/hwmon-vid.c
+++ b/drivers/hwmon/hwmon-vid.c
@@ -15,6 +15,10 @@
 #include 
 #include 
 
+#ifdef CONFIG_X86
+#include 
+#endif
+
 /*
  * Common code for decoding VID pins.
  *
diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c
index 517b28a85560..6a1712b50c7f 100644
--- a/drivers/idle/intel_idle.c
+++ b/drivers/idle/intel_idle.c
@@ -56,6 +56,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
diff --git a/drivers/misc/cs5535-mfgpt.c b/drivers/misc/cs5535-mfgpt.c
index 18fc1aaa5cdd..2b6778d8d166 100644
--- a/drivers/misc/cs5535-mfgpt.c
+++ b/drivers/misc/cs5535-mfgpt.c
@@ -16,6 +16,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #define DRV_NAME "cs5535-mfgpt"
 
diff --git a/drivers/net/vmxnet3/vmxnet3_drv.c b/drivers/net/vmxnet3/vmxnet3_drv.c
index 3df6aabc7e33..7edd0b5e0e77 100644
--- a/drivers/net/vmxnet3/vmxnet3_drv.c
+++ b/drivers/net/vmxnet3/vmxnet3_drv.c
@@ -27,6 +27,10 @@
 #include 
 #include 
 
+#ifdef CONFIG_X86
+#include 
+#endif
+
 #include "vmxnet3_int.h"
 #include "vmxnet3_xdp.h"
 
diff --git a/drivers/platform/x86/intel/ifs/core.c b/drivers/platform/x86/intel/ifs/core.c
index c4328a7ae083..b73e582128c9 100644
--- a/drivers/platform/x86/intel/ifs/core.c
+++ b/drivers/platform/x86/intel/ifs/core.c
@@ -8,6 +8,7 @@
 #include 
 
 #include 
+#include 
 
 #include "ifs.h"
 
diff --git a/drivers/platform/x86/intel/ifs/load.c b/drivers/platform/x86/intel/ifs/load.c
index 0289391eccde..50f1fdf7dfed 100644
--- a/drivers/platform/x86/intel/ifs/load.c
+++ b/drivers/platform/x86/intel/ifs/load.c
@@ -5,6 +5,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "ifs.h"
 
diff --git a/drivers/platform/x86/intel/ifs/runtest.c b/drivers/platform/x86/intel/ifs/runtest.c
index 6b6ed7be461a..dfc119d7354d 100644
--- a/drivers/platform/x86/intel/ifs/runtest.c
+++ b/drivers/platform/x86/intel/ifs/runtest.c
@@ -7,6 +7,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "ifs.h"
 
diff --git a/drivers/platform/x86/intel/pmc/cnp.c b/drivers/platform/x86/intel/pmc/cnp.c
index 547bdf1ab02d..efea4e1ba52b 100644
--- a/drivers/platform/x86/intel/pmc/cnp.c
+++ b/drivers/platform/x86/intel/pmc/cnp.c
@@ -10,6 +10,7 @@
 
 #include 
 #include 
+#include 
 #include "core.h"
 
 /* Cannon Lake: PGD PFET Enable Ack Status Register(s) bitmap */
diff --git a/drivers/platform/x86/intel/speed_select_if/isst_if_common.c b/drivers/platform/x86/intel/speed_select_if/isst_if_common.c
index 44dcd165b4c0..8a5713593811 100644
--- a/drivers/platform/x86/intel/speed_select_if/isst_if_common.c
+++ b/drivers/platform/x86/intel/speed_select_if/isst_if_common.c
@@ -21,6 +21,7 @@
 
 #include 
 #include 
+#include 
 
 #include "isst_if_common.h"
 
diff --git a/drivers/platform/x86/intel/speed_select_if/isst_if_mbox_msr.c b/drivers/platform/x86/intel/speed_select_if/isst_if_mbox_msr.c
index 78989f649aea..22745b217c6f 100644
--- a/drivers/platform/x86/intel/speed_select_if/isst_if_mbox_msr.c
+++ b/drivers/platform/x86/intel/speed_select_if/isst_if_mbox_msr.c
@@ -18,6 +18,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "isst_if_common.h"
 
diff --git a/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c b/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c
index 0b8ef0cfaf80..4d30d5360c8f 100644
--- a/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c
+++ b/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c
@@ -27,6 +27,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include "isst_tpmi_core.h"
diff --git a/drivers/platform/x86/intel/turbo_max_3.c b/drivers/platform/x86/intel/turbo_max_3.c
index 7e538bbd5b50..b5af3e91ba04 100644
--- a/drivers/platform/x86/intel/turbo_max_3.c
+++ b/drivers/platform/x86/intel/turbo_max_3.c
@@ -17,6 +17,7 @@
 
 #include 
 #include 
+#include 
 
 #define MSR_OC_MAILBOX			0x150
 #define MSR_OC_MAILBOX_CMD_OFFSET	32
diff --git a/drivers/platform/x86/intel/uncore-frequency/uncore-frequency.c b/drivers/platform/x86/intel/uncore-frequency/uncore-frequency.c
index 6f873765d2d1..96f854c21bb5 100644
--- a/drivers/platform/x86/intel/uncore-frequency/uncore-frequency.c
+++ b/drivers/platform/x86/intel/uncore-frequency/uncore-frequency.c
@@ -21,6 +21,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "uncore-frequency-common.h"
 
diff --git a/drivers/powercap/intel_rapl_common.c b/drivers/powercap/intel_rapl_common.c
index 5ab3feb29686..e3be40adc0d7 100644
--- a/drivers/powercap/intel_rapl_common.c
+++ b/drivers/powercap/intel_rapl_common.c
@@ -28,6 +28,7 @@
 #include 
 #include 
 #include 
+#include 
 
 /* bitmasks for RAPL MSRs, used by primitive access functions */
 #define ENERGY_STATUS_MASK      0xffffffff
diff --git a/drivers/powercap/intel_rapl_msr.c b/drivers/powercap/intel_rapl_msr.c
index 6d5853db17ad..8ad2115d65f6 100644
--- a/drivers/powercap/intel_rapl_msr.c
+++ b/drivers/powercap/intel_rapl_msr.c
@@ -24,6 +24,7 @@
 
 #include 
 #include 
+#include 
 
 /* Local defines */
 #define MSR_PLATFORM_POWER_LIMIT	0x0000065C
diff --git a/drivers/thermal/intel/int340x_thermal/processor_thermal_device.c b/drivers/thermal/intel/int340x_thermal/processor_thermal_device.c
index b0249468b844..57cf46f69669 100644
--- a/drivers/thermal/intel/int340x_thermal/processor_thermal_device.c
+++ b/drivers/thermal/intel/int340x_thermal/processor_thermal_device.c
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 #include "int340x_thermal_zone.h"
 #include "processor_thermal_device.h"
 #include "../intel_soc_dts_iosf.h"
diff --git a/drivers/thermal/intel/intel_tcc_cooling.c b/drivers/thermal/intel/intel_tcc_cooling.c
index 0394897e83cf..f352ecafbedf 100644
--- a/drivers/thermal/intel/intel_tcc_cooling.c
+++ b/drivers/thermal/intel/intel_tcc_cooling.c
@@ -11,6 +11,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #define TCC_PROGRAMMABLE	BIT(30)
 #define TCC_LOCKED		BIT(31)
diff --git a/drivers/thermal/intel/x86_pkg_temp_thermal.c b/drivers/thermal/intel/x86_pkg_temp_thermal.c
index 496abf8e55e0..4894a26b1e4e 100644
--- a/drivers/thermal/intel/x86_pkg_temp_thermal.c
+++ b/drivers/thermal/intel/x86_pkg_temp_thermal.c
@@ -20,6 +20,7 @@
 #include 
 
 #include 
+#include 
 
 #include "thermal_interrupt.h"
 
diff --git a/drivers/video/fbdev/geode/display_gx.c b/drivers/video/fbdev/geode/display_gx.c
index b5f25dffd274..099322cefce0 100644
--- a/drivers/video/fbdev/geode/display_gx.c
+++ b/drivers/video/fbdev/geode/display_gx.c
@@ -13,6 +13,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include "gxfb.h"
diff --git a/drivers/video/fbdev/geode/gxfb_core.c b/drivers/video/fbdev/geode/gxfb_core.c
index 2b27d6540805..0105ecf92773 100644
--- a/drivers/video/fbdev/geode/gxfb_core.c
+++ b/drivers/video/fbdev/geode/gxfb_core.c
@@ -30,6 +30,7 @@
 #include 
 
 #include 
+#include 
 
 #include "gxfb.h"
 
diff --git a/drivers/video/fbdev/geode/lxfb_ops.c b/drivers/video/fbdev/geode/lxfb_ops.c
index a27531b5de11..2e33da9849b0 100644
--- a/drivers/video/fbdev/geode/lxfb_ops.c
+++ b/drivers/video/fbdev/geode/lxfb_ops.c
@@ -11,6 +11,7 @@
 #include 
 #include 
 
+#include 
 #include "lxfb.h"
 
 /* TODO
-- 
2.49.0



From xen-devel-bounces@lists.xenproject.org Sun Apr 27 09:21:36 2025
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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
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Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
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        haiyangz@microsoft.com, decui@microsoft.com,
        dapeng1.mi@linux.intel.com, ilpo.jarvinen@linux.intel.com
Subject: [PATCH v4 05/15] x86/msr: Convert the rdpmc() macro into an always inline function
Date: Sun, 27 Apr 2025 02:20:17 -0700
Message-ID: <20250427092027.1598740-6-xin@zytor.com>
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Functions offer type safety and better readability compared to macros.
Additionally, always inline functions can match the performance of
macros.  Converting the rdpmc() macro into an always inline function
is simple and straightforward, so just make the change.

Moreover, the read result is now the returned value, further enhancing
readability.

Signed-off-by: Xin Li (Intel) 
Acked-by: Dave Hansen 
Acked-by: Peter Zijlstra (Intel) 
---

Change in v3:
*) Add a changelog even it's obvious (Dave Hansen).
---
 arch/x86/events/amd/uncore.c              |  2 +-
 arch/x86/events/core.c                    |  2 +-
 arch/x86/events/intel/core.c              |  4 ++--
 arch/x86/events/intel/ds.c                |  2 +-
 arch/x86/include/asm/msr.h                |  5 ++++-
 arch/x86/include/asm/paravirt.h           |  4 +---
 arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 12 ++++++------
 7 files changed, 16 insertions(+), 15 deletions(-)

diff --git a/arch/x86/events/amd/uncore.c b/arch/x86/events/amd/uncore.c
index 42c833cf9d98..13c4cea545c5 100644
--- a/arch/x86/events/amd/uncore.c
+++ b/arch/x86/events/amd/uncore.c
@@ -108,7 +108,7 @@ static void amd_uncore_read(struct perf_event *event)
 	if (hwc->event_base_rdpmc < 0)
 		rdmsrq(hwc->event_base, new);
 	else
-		rdpmc(hwc->event_base_rdpmc, new);
+		new = rdpmc(hwc->event_base_rdpmc);
 
 	local64_set(&hwc->prev_count, new);
 	delta = (new << COUNTER_SHIFT) - (prev << COUNTER_SHIFT);
diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
index ea618dd8a678..d8634446684e 100644
--- a/arch/x86/events/core.c
+++ b/arch/x86/events/core.c
@@ -134,7 +134,7 @@ u64 x86_perf_event_update(struct perf_event *event)
 	 */
 	prev_raw_count = local64_read(&hwc->prev_count);
 	do {
-		rdpmc(hwc->event_base_rdpmc, new_raw_count);
+		new_raw_count = rdpmc(hwc->event_base_rdpmc);
 	} while (!local64_try_cmpxchg(&hwc->prev_count,
 				      &prev_raw_count, new_raw_count));
 
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 8ac7a03ae4e9..9fa94b6e4e74 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -2724,12 +2724,12 @@ static u64 intel_update_topdown_event(struct perf_event *event, int metric_end,
 
 	if (!val) {
 		/* read Fixed counter 3 */
-		rdpmc((3 | INTEL_PMC_FIXED_RDPMC_BASE), slots);
+		slots = rdpmc(3 | INTEL_PMC_FIXED_RDPMC_BASE);
 		if (!slots)
 			return 0;
 
 		/* read PERF_METRICS */
-		rdpmc(INTEL_PMC_FIXED_RDPMC_METRICS, metrics);
+		metrics = rdpmc(INTEL_PMC_FIXED_RDPMC_METRICS);
 	} else {
 		slots = val[0];
 		metrics = val[1];
diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
index be05e93b48e7..a093cb485278 100644
--- a/arch/x86/events/intel/ds.c
+++ b/arch/x86/events/intel/ds.c
@@ -2274,7 +2274,7 @@ intel_pmu_save_and_restart_reload(struct perf_event *event, int count)
 	WARN_ON(this_cpu_read(cpu_hw_events.enabled));
 
 	prev_raw_count = local64_read(&hwc->prev_count);
-	rdpmc(hwc->event_base_rdpmc, new_raw_count);
+	new_raw_count = rdpmc(hwc->event_base_rdpmc);
 	local64_set(&hwc->prev_count, new_raw_count);
 
 	/*
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index ae96d35e0621..73d44081e597 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -234,7 +234,10 @@ static inline int rdmsrq_safe(u32 msr, u64 *p)
 	return err;
 }
 
-#define rdpmc(counter, val) ((val) = native_read_pmc(counter))
+static __always_inline u64 rdpmc(int counter)
+{
+	return native_read_pmc(counter);
+}
 
 #endif	/* !CONFIG_PARAVIRT_XXL */
 
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index faa0713553b1..f272c4bd3d5b 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -239,13 +239,11 @@ static inline int rdmsrq_safe(unsigned msr, u64 *p)
 	return err;
 }
 
-static inline u64 paravirt_read_pmc(int counter)
+static __always_inline u64 rdpmc(int counter)
 {
 	return PVOP_CALL1(u64, cpu.read_pmc, counter);
 }
 
-#define rdpmc(counter, val) ((val) = paravirt_read_pmc(counter))
-
 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
 {
 	PVOP_VCALL2(cpu.alloc_ldt, ldt, entries);
diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
index 15ff62d83bd8..61d762555a79 100644
--- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
+++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
@@ -1019,8 +1019,8 @@ static int measure_residency_fn(struct perf_event_attr *miss_attr,
 	 * used in L1 cache, second to capture accurate value that does not
 	 * include cache misses incurred because of instruction loads.
 	 */
-	rdpmc(hit_pmcnum, hits_before);
-	rdpmc(miss_pmcnum, miss_before);
+	hits_before = rdpmc(hit_pmcnum);
+	miss_before = rdpmc(miss_pmcnum);
 	/*
 	 * From SDM: Performing back-to-back fast reads are not guaranteed
 	 * to be monotonic.
@@ -1028,8 +1028,8 @@ static int measure_residency_fn(struct perf_event_attr *miss_attr,
 	 * before proceeding.
 	 */
 	rmb();
-	rdpmc(hit_pmcnum, hits_before);
-	rdpmc(miss_pmcnum, miss_before);
+	hits_before = rdpmc(hit_pmcnum);
+	miss_before = rdpmc(miss_pmcnum);
 	/*
 	 * Use LFENCE to ensure all previous instructions are retired
 	 * before proceeding.
@@ -1051,8 +1051,8 @@ static int measure_residency_fn(struct perf_event_attr *miss_attr,
 	 * before proceeding.
 	 */
 	rmb();
-	rdpmc(hit_pmcnum, hits_after);
-	rdpmc(miss_pmcnum, miss_after);
+	hits_after = rdpmc(hit_pmcnum);
+	miss_after = rdpmc(miss_pmcnum);
 	/*
 	 * Use LFENCE to ensure all previous instructions are retired
 	 * before proceeding.
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
        pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com,
        dapeng1.mi@linux.intel.com, ilpo.jarvinen@linux.intel.com
Subject: [PATCH v4 04/15] x86/msr: Rename rdpmcl() to rdpmc()
Date: Sun, 27 Apr 2025 02:20:16 -0700
Message-ID: <20250427092027.1598740-5-xin@zytor.com>
X-Mailer: git-send-email 2.49.0
In-Reply-To: <20250427092027.1598740-1-xin@zytor.com>
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Now that rdpmc() is gone, i.e. rdpmcl() is the sole PMC read helper,
simply rename rdpmcl() to rdpmc().

Signed-off-by: Xin Li (Intel) 
Acked-by: Dave Hansen 
Acked-by: Peter Zijlstra (Intel) 
---

Changes in v3:
*) Explain the reason of the renaming in the changelog (Dave Hansen).
*) Use shorter name rdpmc() instead of rdpmcq() as the name of the
   sole PMC read helper (Sean Christopherson).
---
 arch/x86/events/amd/uncore.c              |  2 +-
 arch/x86/events/core.c                    |  2 +-
 arch/x86/events/intel/core.c              |  4 ++--
 arch/x86/events/intel/ds.c                |  2 +-
 arch/x86/include/asm/msr.h                |  2 +-
 arch/x86/include/asm/paravirt.h           |  2 +-
 arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 12 ++++++------
 7 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/arch/x86/events/amd/uncore.c b/arch/x86/events/amd/uncore.c
index 2a3259df619a..42c833cf9d98 100644
--- a/arch/x86/events/amd/uncore.c
+++ b/arch/x86/events/amd/uncore.c
@@ -108,7 +108,7 @@ static void amd_uncore_read(struct perf_event *event)
 	if (hwc->event_base_rdpmc < 0)
 		rdmsrq(hwc->event_base, new);
 	else
-		rdpmcl(hwc->event_base_rdpmc, new);
+		rdpmc(hwc->event_base_rdpmc, new);
 
 	local64_set(&hwc->prev_count, new);
 	delta = (new << COUNTER_SHIFT) - (prev << COUNTER_SHIFT);
diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
index 85b55c1dc162..ea618dd8a678 100644
--- a/arch/x86/events/core.c
+++ b/arch/x86/events/core.c
@@ -134,7 +134,7 @@ u64 x86_perf_event_update(struct perf_event *event)
 	 */
 	prev_raw_count = local64_read(&hwc->prev_count);
 	do {
-		rdpmcl(hwc->event_base_rdpmc, new_raw_count);
+		rdpmc(hwc->event_base_rdpmc, new_raw_count);
 	} while (!local64_try_cmpxchg(&hwc->prev_count,
 				      &prev_raw_count, new_raw_count));
 
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 394fa83b537b..8ac7a03ae4e9 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -2724,12 +2724,12 @@ static u64 intel_update_topdown_event(struct perf_event *event, int metric_end,
 
 	if (!val) {
 		/* read Fixed counter 3 */
-		rdpmcl((3 | INTEL_PMC_FIXED_RDPMC_BASE), slots);
+		rdpmc((3 | INTEL_PMC_FIXED_RDPMC_BASE), slots);
 		if (!slots)
 			return 0;
 
 		/* read PERF_METRICS */
-		rdpmcl(INTEL_PMC_FIXED_RDPMC_METRICS, metrics);
+		rdpmc(INTEL_PMC_FIXED_RDPMC_METRICS, metrics);
 	} else {
 		slots = val[0];
 		metrics = val[1];
diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
index 410a8975d1b9..be05e93b48e7 100644
--- a/arch/x86/events/intel/ds.c
+++ b/arch/x86/events/intel/ds.c
@@ -2274,7 +2274,7 @@ intel_pmu_save_and_restart_reload(struct perf_event *event, int count)
 	WARN_ON(this_cpu_read(cpu_hw_events.enabled));
 
 	prev_raw_count = local64_read(&hwc->prev_count);
-	rdpmcl(hwc->event_base_rdpmc, new_raw_count);
+	rdpmc(hwc->event_base_rdpmc, new_raw_count);
 	local64_set(&hwc->prev_count, new_raw_count);
 
 	/*
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index e05466e486fc..ae96d35e0621 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -234,7 +234,7 @@ static inline int rdmsrq_safe(u32 msr, u64 *p)
 	return err;
 }
 
-#define rdpmcl(counter, val) ((val) = native_read_pmc(counter))
+#define rdpmc(counter, val) ((val) = native_read_pmc(counter))
 
 #endif	/* !CONFIG_PARAVIRT_XXL */
 
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index c4dedb984735..faa0713553b1 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -244,7 +244,7 @@ static inline u64 paravirt_read_pmc(int counter)
 	return PVOP_CALL1(u64, cpu.read_pmc, counter);
 }
 
-#define rdpmcl(counter, val) ((val) = paravirt_read_pmc(counter))
+#define rdpmc(counter, val) ((val) = paravirt_read_pmc(counter))
 
 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
 {
diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
index 26c354bdea07..15ff62d83bd8 100644
--- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
+++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
@@ -1019,8 +1019,8 @@ static int measure_residency_fn(struct perf_event_attr *miss_attr,
 	 * used in L1 cache, second to capture accurate value that does not
 	 * include cache misses incurred because of instruction loads.
 	 */
-	rdpmcl(hit_pmcnum, hits_before);
-	rdpmcl(miss_pmcnum, miss_before);
+	rdpmc(hit_pmcnum, hits_before);
+	rdpmc(miss_pmcnum, miss_before);
 	/*
 	 * From SDM: Performing back-to-back fast reads are not guaranteed
 	 * to be monotonic.
@@ -1028,8 +1028,8 @@ static int measure_residency_fn(struct perf_event_attr *miss_attr,
 	 * before proceeding.
 	 */
 	rmb();
-	rdpmcl(hit_pmcnum, hits_before);
-	rdpmcl(miss_pmcnum, miss_before);
+	rdpmc(hit_pmcnum, hits_before);
+	rdpmc(miss_pmcnum, miss_before);
 	/*
 	 * Use LFENCE to ensure all previous instructions are retired
 	 * before proceeding.
@@ -1051,8 +1051,8 @@ static int measure_residency_fn(struct perf_event_attr *miss_attr,
 	 * before proceeding.
 	 */
 	rmb();
-	rdpmcl(hit_pmcnum, hits_after);
-	rdpmcl(miss_pmcnum, miss_after);
+	rdpmc(hit_pmcnum, hits_after);
+	rdpmc(miss_pmcnum, miss_after);
 	/*
 	 * Use LFENCE to ensure all previous instructions are retired
 	 * before proceeding.
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
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        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com,
        dapeng1.mi@linux.intel.com, ilpo.jarvinen@linux.intel.com
Subject: [PATCH v4 14/15] x86/msr: Replace wrmsr(msr, low, 0) with wrmsrq(msr, low)
Date: Sun, 27 Apr 2025 02:20:26 -0700
Message-ID: <20250427092027.1598740-15-xin@zytor.com>
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In-Reply-To: <20250427092027.1598740-1-xin@zytor.com>
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The third argument in wrmsr(msr, low, 0) is unnecessary.  Instead, use
wrmsrq(msr, low), which automatically sets the higher 32 bits of the
MSR value to 0.

Signed-off-by: Xin Li (Intel) 
Acked-by: Peter Zijlstra (Intel) 
---
 arch/x86/hyperv/hv_apic.c                 | 6 +++---
 arch/x86/include/asm/apic.h               | 2 +-
 arch/x86/include/asm/switch_to.h          | 2 +-
 arch/x86/kernel/cpu/amd.c                 | 2 +-
 arch/x86/kernel/cpu/common.c              | 8 ++++----
 arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 4 ++--
 arch/x86/kernel/cpu/resctrl/rdtgroup.c    | 2 +-
 arch/x86/kernel/cpu/umwait.c              | 4 ++--
 arch/x86/kernel/kvm.c                     | 2 +-
 9 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/arch/x86/hyperv/hv_apic.c b/arch/x86/hyperv/hv_apic.c
index c450e67cb0a4..4d617ee59377 100644
--- a/arch/x86/hyperv/hv_apic.c
+++ b/arch/x86/hyperv/hv_apic.c
@@ -75,10 +75,10 @@ static void hv_apic_write(u32 reg, u32 val)
 {
 	switch (reg) {
 	case APIC_EOI:
-		wrmsr(HV_X64_MSR_EOI, val, 0);
+		wrmsrq(HV_X64_MSR_EOI, val);
 		break;
 	case APIC_TASKPRI:
-		wrmsr(HV_X64_MSR_TPR, val, 0);
+		wrmsrq(HV_X64_MSR_TPR, val);
 		break;
 	default:
 		native_apic_mem_write(reg, val);
@@ -92,7 +92,7 @@ static void hv_apic_eoi_write(void)
 	if (hvp && (xchg(&hvp->apic_assist, 0) & 0x1))
 		return;
 
-	wrmsr(HV_X64_MSR_EOI, APIC_EOI_ACK, 0);
+	wrmsrq(HV_X64_MSR_EOI, APIC_EOI_ACK);
 }
 
 static bool cpu_is_self(int cpu)
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index 0174dd548327..68e10e30fe9b 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -209,7 +209,7 @@ static inline void native_apic_msr_write(u32 reg, u32 v)
 	    reg == APIC_LVR)
 		return;
 
-	wrmsr(APIC_BASE_MSR + (reg >> 4), v, 0);
+	wrmsrq(APIC_BASE_MSR + (reg >> 4), v);
 }
 
 static inline void native_apic_msr_eoi(void)
diff --git a/arch/x86/include/asm/switch_to.h b/arch/x86/include/asm/switch_to.h
index 4f21df7af715..499b1c15cc8b 100644
--- a/arch/x86/include/asm/switch_to.h
+++ b/arch/x86/include/asm/switch_to.h
@@ -61,7 +61,7 @@ static inline void refresh_sysenter_cs(struct thread_struct *thread)
 		return;
 
 	this_cpu_write(cpu_tss_rw.x86_tss.ss1, thread->sysenter_cs);
-	wrmsr(MSR_IA32_SYSENTER_CS, thread->sysenter_cs, 0);
+	wrmsrq(MSR_IA32_SYSENTER_CS, thread->sysenter_cs);
 }
 #endif
 
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 0bbe79862aa6..5e28ec2fe4e8 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -1200,7 +1200,7 @@ void amd_set_dr_addr_mask(unsigned long mask, unsigned int dr)
 	if (per_cpu(amd_dr_addr_mask, cpu)[dr] == mask)
 		return;
 
-	wrmsr(amd_msr_dr_addr_masks[dr], mask, 0);
+	wrmsrq(amd_msr_dr_addr_masks[dr], mask);
 	per_cpu(amd_dr_addr_mask, cpu)[dr] = mask;
 }
 
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index cefc99990bde..ef9751d577c3 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1982,9 +1982,9 @@ void enable_sep_cpu(void)
 	 */
 
 	tss->x86_tss.ss1 = __KERNEL_CS;
-	wrmsr(MSR_IA32_SYSENTER_CS, tss->x86_tss.ss1, 0);
-	wrmsr(MSR_IA32_SYSENTER_ESP, (unsigned long)(cpu_entry_stack(cpu) + 1), 0);
-	wrmsr(MSR_IA32_SYSENTER_EIP, (unsigned long)entry_SYSENTER_32, 0);
+	wrmsrq(MSR_IA32_SYSENTER_CS, tss->x86_tss.ss1);
+	wrmsrq(MSR_IA32_SYSENTER_ESP, (unsigned long)(cpu_entry_stack(cpu) + 1));
+	wrmsrq(MSR_IA32_SYSENTER_EIP, (unsigned long)entry_SYSENTER_32);
 
 	put_cpu();
 }
@@ -2198,7 +2198,7 @@ static inline void setup_getcpu(int cpu)
 	struct desc_struct d = { };
 
 	if (boot_cpu_has(X86_FEATURE_RDTSCP) || boot_cpu_has(X86_FEATURE_RDPID))
-		wrmsr(MSR_TSC_AUX, cpudata, 0);
+		wrmsrq(MSR_TSC_AUX, cpudata);
 
 	/* Store CPU and node number in limit. */
 	d.limit0 = cpudata;
diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
index 324bd4919300..1190c48a16b2 100644
--- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
+++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
@@ -905,7 +905,7 @@ int resctrl_arch_measure_cycles_lat_fn(void *_plr)
 	 * Disable hardware prefetchers.
 	 */
 	rdmsr(MSR_MISC_FEATURE_CONTROL, saved_low, saved_high);
-	wrmsr(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits, 0x0);
+	wrmsrq(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits);
 	mem_r = READ_ONCE(plr->kmem);
 	/*
 	 * Dummy execute of the time measurement to load the needed
@@ -1001,7 +1001,7 @@ static int measure_residency_fn(struct perf_event_attr *miss_attr,
 	 * Disable hardware prefetchers.
 	 */
 	rdmsr(MSR_MISC_FEATURE_CONTROL, saved_low, saved_high);
-	wrmsr(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits, 0x0);
+	wrmsrq(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits);
 
 	/* Initialize rest of local variables */
 	/*
diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/resctrl/rdtgroup.c
index 26f4d820ee6e..2ec6d7d843c5 100644
--- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c
+++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c
@@ -1707,7 +1707,7 @@ void resctrl_arch_mon_event_config_write(void *_config_info)
 		pr_warn_once("Invalid event id %d\n", config_info->evtid);
 		return;
 	}
-	wrmsr(MSR_IA32_EVT_CFG_BASE + index, config_info->mon_config, 0);
+	wrmsrq(MSR_IA32_EVT_CFG_BASE + index, config_info->mon_config);
 }
 
 static void mbm_config_write_domain(struct rdt_resource *r,
diff --git a/arch/x86/kernel/cpu/umwait.c b/arch/x86/kernel/cpu/umwait.c
index 0050eae153bb..933fcd7ff250 100644
--- a/arch/x86/kernel/cpu/umwait.c
+++ b/arch/x86/kernel/cpu/umwait.c
@@ -33,7 +33,7 @@ static DEFINE_MUTEX(umwait_lock);
 static void umwait_update_control_msr(void * unused)
 {
 	lockdep_assert_irqs_disabled();
-	wrmsr(MSR_IA32_UMWAIT_CONTROL, READ_ONCE(umwait_control_cached), 0);
+	wrmsrq(MSR_IA32_UMWAIT_CONTROL, READ_ONCE(umwait_control_cached));
 }
 
 /*
@@ -71,7 +71,7 @@ static int umwait_cpu_offline(unsigned int cpu)
 	 * the original control MSR value in umwait_init(). So there
 	 * is no race condition here.
 	 */
-	wrmsr(MSR_IA32_UMWAIT_CONTROL, orig_umwait_control_cached, 0);
+	wrmsrq(MSR_IA32_UMWAIT_CONTROL, orig_umwait_control_cached);
 
 	return 0;
 }
diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c
index 44a45df7200a..bc9d21d7395f 100644
--- a/arch/x86/kernel/kvm.c
+++ b/arch/x86/kernel/kvm.c
@@ -399,7 +399,7 @@ static void kvm_disable_steal_time(void)
 	if (!has_steal_clock)
 		return;
 
-	wrmsr(MSR_KVM_STEAL_TIME, 0, 0);
+	wrmsrq(MSR_KVM_STEAL_TIME, 0);
 }
 
 static u64 kvm_steal_clock(int cpu)
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
        pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com,
        dapeng1.mi@linux.intel.com, ilpo.jarvinen@linux.intel.com
Subject: [PATCH v4 09/15] x86/msr: Convert __rdmsr() uses to native_rdmsrq() uses
Date: Sun, 27 Apr 2025 02:20:21 -0700
Message-ID: <20250427092027.1598740-10-xin@zytor.com>
X-Mailer: git-send-email 2.49.0
In-Reply-To: <20250427092027.1598740-1-xin@zytor.com>
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MIME-Version: 1.0
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__rdmsr() is the lowest level MSR write API, with native_rdmsr()
and native_rdmsrq() serving as higher-level wrappers around it.

  #define native_rdmsr(msr, val1, val2)                   \
  do {                                                    \
          u64 __val = __rdmsr((msr));                     \
          (void)((val1) = (u32)__val);                    \
          (void)((val2) = (u32)(__val >> 32));            \
  } while (0)

  static __always_inline u64 native_rdmsrq(u32 msr)
  {
          return __rdmsr(msr);
  }

However, __rdmsr() continues to be utilized in various locations.

MSR APIs are designed for different scenarios, such as native or
pvops, with or without trace, and safe or non-safe.  Unfortunately,
the current MSR API names do not adequately reflect these factors,
making it challenging to select the most appropriate API for
various situations.

To pave the way for improving MSR API names, convert __rdmsr()
uses to native_rdmsrq() to ensure consistent usage.  Later, these
APIs can be renamed to better reflect their implications, such as
native or pvops, with or without trace, and safe or non-safe.

No functional change intended.

Signed-off-by: Xin Li (Intel) 
Acked-by: Peter Zijlstra (Intel) 
---
 arch/x86/coco/sev/core.c                  | 2 +-
 arch/x86/events/amd/brs.c                 | 2 +-
 arch/x86/hyperv/hv_vtl.c                  | 4 ++--
 arch/x86/hyperv/ivm.c                     | 2 +-
 arch/x86/include/asm/mshyperv.h           | 2 +-
 arch/x86/kernel/cpu/common.c              | 2 +-
 arch/x86/kernel/cpu/mce/core.c            | 4 ++--
 arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 2 +-
 arch/x86/kvm/vmx/vmx.c                    | 4 ++--
 arch/x86/mm/mem_encrypt_identity.c        | 4 ++--
 10 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/arch/x86/coco/sev/core.c b/arch/x86/coco/sev/core.c
index b18a33fe8dd3..c4137c94678d 100644
--- a/arch/x86/coco/sev/core.c
+++ b/arch/x86/coco/sev/core.c
@@ -276,7 +276,7 @@ static noinstr struct ghcb *__sev_get_ghcb(struct ghcb_state *state)
 
 static inline u64 sev_es_rd_ghcb_msr(void)
 {
-	return __rdmsr(MSR_AMD64_SEV_ES_GHCB);
+	return native_rdmsrq(MSR_AMD64_SEV_ES_GHCB);
 }
 
 static __always_inline void sev_es_wr_ghcb_msr(u64 val)
diff --git a/arch/x86/events/amd/brs.c b/arch/x86/events/amd/brs.c
index 3f5ecfd80d1e..06f35a6b58a5 100644
--- a/arch/x86/events/amd/brs.c
+++ b/arch/x86/events/amd/brs.c
@@ -49,7 +49,7 @@ static __always_inline void set_debug_extn_cfg(u64 val)
 
 static __always_inline u64 get_debug_extn_cfg(void)
 {
-	return __rdmsr(MSR_AMD_DBG_EXTN_CFG);
+	return native_rdmsrq(MSR_AMD_DBG_EXTN_CFG);
 }
 
 static bool __init amd_brs_detect(void)
diff --git a/arch/x86/hyperv/hv_vtl.c b/arch/x86/hyperv/hv_vtl.c
index 13242ed8ff16..c6343e699154 100644
--- a/arch/x86/hyperv/hv_vtl.c
+++ b/arch/x86/hyperv/hv_vtl.c
@@ -149,11 +149,11 @@ static int hv_vtl_bringup_vcpu(u32 target_vp_index, int cpu, u64 eip_ignored)
 	input->vp_context.rip = rip;
 	input->vp_context.rsp = rsp;
 	input->vp_context.rflags = 0x0000000000000002;
-	input->vp_context.efer = __rdmsr(MSR_EFER);
+	input->vp_context.efer = native_rdmsrq(MSR_EFER);
 	input->vp_context.cr0 = native_read_cr0();
 	input->vp_context.cr3 = __native_read_cr3();
 	input->vp_context.cr4 = native_read_cr4();
-	input->vp_context.msr_cr_pat = __rdmsr(MSR_IA32_CR_PAT);
+	input->vp_context.msr_cr_pat = native_rdmsrq(MSR_IA32_CR_PAT);
 	input->vp_context.idtr.limit = idt_ptr.size;
 	input->vp_context.idtr.base = idt_ptr.address;
 	input->vp_context.gdtr.limit = gdt_ptr.size;
diff --git a/arch/x86/hyperv/ivm.c b/arch/x86/hyperv/ivm.c
index 8209de792388..09a165a3c41e 100644
--- a/arch/x86/hyperv/ivm.c
+++ b/arch/x86/hyperv/ivm.c
@@ -111,7 +111,7 @@ u64 hv_ghcb_hypercall(u64 control, void *input, void *output, u32 input_size)
 
 static inline u64 rd_ghcb_msr(void)
 {
-	return __rdmsr(MSR_AMD64_SEV_ES_GHCB);
+	return native_rdmsrq(MSR_AMD64_SEV_ES_GHCB);
 }
 
 static inline void wr_ghcb_msr(u64 val)
diff --git a/arch/x86/include/asm/mshyperv.h b/arch/x86/include/asm/mshyperv.h
index 15d00dace70f..778444310cfb 100644
--- a/arch/x86/include/asm/mshyperv.h
+++ b/arch/x86/include/asm/mshyperv.h
@@ -305,7 +305,7 @@ void hv_set_non_nested_msr(unsigned int reg, u64 value);
 
 static __always_inline u64 hv_raw_get_msr(unsigned int reg)
 {
-	return __rdmsr(reg);
+	return native_rdmsrq(reg);
 }
 
 #else /* CONFIG_HYPERV */
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 079ded4eeb86..cefc99990bde 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -164,7 +164,7 @@ static void ppin_init(struct cpuinfo_x86 *c)
 
 	/* Is the enable bit set? */
 	if (val & 2UL) {
-		c->ppin = __rdmsr(info->msr_ppin);
+		c->ppin = native_rdmsrq(info->msr_ppin);
 		set_cpu_cap(c, info->feature);
 		return;
 	}
diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
index 1ae75ec7ac95..32286bad75e6 100644
--- a/arch/x86/kernel/cpu/mce/core.c
+++ b/arch/x86/kernel/cpu/mce/core.c
@@ -121,7 +121,7 @@ void mce_prep_record_common(struct mce *m)
 {
 	m->cpuid	= cpuid_eax(1);
 	m->cpuvendor	= boot_cpu_data.x86_vendor;
-	m->mcgcap	= __rdmsr(MSR_IA32_MCG_CAP);
+	m->mcgcap	= native_rdmsrq(MSR_IA32_MCG_CAP);
 	/* need the internal __ version to avoid deadlocks */
 	m->time		= __ktime_get_real_seconds();
 }
@@ -1298,7 +1298,7 @@ static noinstr bool mce_check_crashing_cpu(void)
 	    (crashing_cpu != -1 && crashing_cpu != cpu)) {
 		u64 mcgstatus;
 
-		mcgstatus = __rdmsr(MSR_IA32_MCG_STATUS);
+		mcgstatus = native_rdmsrq(MSR_IA32_MCG_STATUS);
 
 		if (boot_cpu_data.x86_vendor == X86_VENDOR_ZHAOXIN) {
 			if (mcgstatus & MCG_STATUS_LMCES)
diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
index 6e5edd76086e..324bd4919300 100644
--- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
+++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
@@ -482,7 +482,7 @@ int resctrl_arch_pseudo_lock_fn(void *_plr)
 	 * the buffer and evict pseudo-locked memory read earlier from the
 	 * cache.
 	 */
-	saved_msr = __rdmsr(MSR_MISC_FEATURE_CONTROL);
+	saved_msr = native_rdmsrq(MSR_MISC_FEATURE_CONTROL);
 	native_wrmsrq(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits);
 	closid_p = this_cpu_read(pqr_state.cur_closid);
 	rmid_p = this_cpu_read(pqr_state.cur_rmid);
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index cd0d6c1fcf9c..68c8bb247fc4 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -380,7 +380,7 @@ static __always_inline void vmx_disable_fb_clear(struct vcpu_vmx *vmx)
 	if (!vmx->disable_fb_clear)
 		return;
 
-	msr = __rdmsr(MSR_IA32_MCU_OPT_CTRL);
+	msr = native_rdmsrq(MSR_IA32_MCU_OPT_CTRL);
 	msr |= FB_CLEAR_DIS;
 	native_wrmsrq(MSR_IA32_MCU_OPT_CTRL, msr);
 	/* Cache the MSR value to avoid reading it later */
@@ -7307,7 +7307,7 @@ void noinstr vmx_spec_ctrl_restore_host(struct vcpu_vmx *vmx,
 		return;
 
 	if (flags & VMX_RUN_SAVE_SPEC_CTRL)
-		vmx->spec_ctrl = __rdmsr(MSR_IA32_SPEC_CTRL);
+		vmx->spec_ctrl = native_rdmsrq(MSR_IA32_SPEC_CTRL);
 
 	/*
 	 * If the guest/host SPEC_CTRL values differ, restore the host value.
diff --git a/arch/x86/mm/mem_encrypt_identity.c b/arch/x86/mm/mem_encrypt_identity.c
index afda349db35b..32af1cc378e4 100644
--- a/arch/x86/mm/mem_encrypt_identity.c
+++ b/arch/x86/mm/mem_encrypt_identity.c
@@ -527,7 +527,7 @@ void __head sme_enable(struct boot_params *bp)
 	me_mask = 1UL << (ebx & 0x3f);
 
 	/* Check the SEV MSR whether SEV or SME is enabled */
-	RIP_REL_REF(sev_status) = msr = __rdmsr(MSR_AMD64_SEV);
+	RIP_REL_REF(sev_status) = msr = native_rdmsrq(MSR_AMD64_SEV);
 	feature_mask = (msr & MSR_AMD64_SEV_ENABLED) ? AMD_SEV_BIT : AMD_SME_BIT;
 
 	/*
@@ -558,7 +558,7 @@ void __head sme_enable(struct boot_params *bp)
 			return;
 
 		/* For SME, check the SYSCFG MSR */
-		msr = __rdmsr(MSR_AMD64_SYSCFG);
+		msr = native_rdmsrq(MSR_AMD64_SYSCFG);
 		if (!(msr & MSR_AMD64_SYSCFG_MEM_ENCRYPT))
 			return;
 	}
-- 
2.49.0



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Message-ID: 
Date: Sun, 27 Apr 2025 17:21:08 +0800
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v3 09/14] x86/xen/msr: Remove calling
 native_{read,write}_msr{,_safe}() in pmu_msr_{read,write}()
To: "Xin Li (Intel)" , linux-kernel@vger.kernel.org,
 kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
 linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
 linux-pm@vger.kernel.org, linux-edac@vger.kernel.org,
 xen-devel@lists.xenproject.org, linux-acpi@vger.kernel.org,
 linux-hwmon@vger.kernel.org, netdev@vger.kernel.org,
 platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
 dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, acme@kernel.org,
 jgross@suse.com, andrew.cooper3@citrix.com, peterz@infradead.org,
 namhyung@kernel.org, mark.rutland@arm.com,
 alexander.shishkin@linux.intel.com, jolsa@kernel.org, irogers@google.com,
 adrian.hunter@intel.com, kan.liang@linux.intel.com, wei.liu@kernel.org,
 ajay.kaher@broadcom.com, bcm-kernel-feedback-list@broadcom.com,
 tony.luck@intel.com, pbonzini@redhat.com, vkuznets@redhat.com,
 seanjc@google.com, luto@kernel.org, boris.ostrovsky@oracle.com,
 kys@microsoft.com, haiyangz@microsoft.com, decui@microsoft.com
References: <20250425083442.2390017-1-xin@zytor.com>
 <20250425083442.2390017-10-xin@zytor.com>
Content-Language: en-US
From: "Mi, Dapeng" 
In-Reply-To: <20250425083442.2390017-10-xin@zytor.com>
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 7bit


On 4/25/2025 4:34 PM, Xin Li (Intel) wrote:
> hpa found that pmu_msr_write() is actually a completely pointless
> function [1]: all it does is shuffle some arguments, then calls
> pmu_msr_chk_emulated() and if it returns true AND the emulated flag
> is clear then does *exactly the same thing* that the calling code
> would have done if pmu_msr_write() itself had returned true.  And
> pmu_msr_read() does the equivalent stupidity.
>
> Remove the calls to native_{read,write}_msr{,_safe}() within
> pmu_msr_{read,write}().  Instead reuse the existing calling code
> that decides whether to call native_{read,write}_msr{,_safe}() based
> on the return value from pmu_msr_{read,write}().  Consequently,
> eliminate the need to pass an error pointer to pmu_msr_{read,write}().
>
> While at it, refactor pmu_msr_write() to take the MSR value as a u64
> argument, replacing the current dual u32 arguments, because the dual
> u32 arguments were only used to call native_write_msr{,_safe}(), which
> has now been removed.
>
> [1]: https://lore.kernel.org/lkml/0ec48b84-d158-47c6-b14c-3563fd14bcc4@zytor.com/
>
> Suggested-by: H. Peter Anvin (Intel) 
> Sign-off-by: Xin Li (Intel) 
> ---
>
> Change in v3:
> *) Rename pmu_msr_{read,write}() to pmu_msr_{read,write}_emulated()
>    (Dapeng Mi).
> *) Fix a pmu_msr_read() callsite with wrong arguments (Dapeng Mi).
> ---
>  arch/x86/xen/enlighten_pv.c |  8 ++++++--
>  arch/x86/xen/pmu.c          | 27 ++++-----------------------
>  arch/x86/xen/xen-ops.h      |  4 ++--
>  3 files changed, 12 insertions(+), 27 deletions(-)
>
> diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c
> index 846b5737d320..61e51a970f3c 100644
> --- a/arch/x86/xen/enlighten_pv.c
> +++ b/arch/x86/xen/enlighten_pv.c
> @@ -1090,7 +1090,7 @@ static u64 xen_do_read_msr(unsigned int msr, int *err)
>  {
>  	u64 val = 0;	/* Avoid uninitialized value for safe variant. */
>  
> -	if (pmu_msr_read(msr, &val, err))
> +	if (pmu_msr_read_emulated(msr, &val))
>  		return val;
>  
>  	if (err)
> @@ -1132,6 +1132,8 @@ static void set_seg(unsigned int which, unsigned int low, unsigned int high,
>  static void xen_do_write_msr(unsigned int msr, unsigned int low,
>  			     unsigned int high, int *err)
>  {
> +	u64 val;
> +
>  	switch (msr) {
>  	case MSR_FS_BASE:
>  		set_seg(SEGBASE_FS, low, high, err);
> @@ -1158,7 +1160,9 @@ static void xen_do_write_msr(unsigned int msr, unsigned int low,
>  		break;
>  
>  	default:
> -		if (!pmu_msr_write(msr, low, high, err)) {
> +		val = (u64)high << 32 | low;
> +
> +		if (!pmu_msr_write_emulated(msr, val)) {
>  			if (err)
>  				*err = native_write_msr_safe(msr, low, high);
>  			else
> diff --git a/arch/x86/xen/pmu.c b/arch/x86/xen/pmu.c
> index 9c1682af620a..b6557f2d1a2e 100644
> --- a/arch/x86/xen/pmu.c
> +++ b/arch/x86/xen/pmu.c
> @@ -313,37 +313,18 @@ static bool pmu_msr_chk_emulated(unsigned int msr, uint64_t *val, bool is_read,
>  	return true;
>  }
>  
> -bool pmu_msr_read(unsigned int msr, uint64_t *val, int *err)
> +bool pmu_msr_read_emulated(u32 msr, u64 *val)
>  {
>  	bool emulated;
>  
> -	if (!pmu_msr_chk_emulated(msr, val, true, &emulated))
> -		return false;
> -
> -	if (!emulated) {
> -		*val = err ? native_read_msr_safe(msr, err)
> -			   : native_read_msr(msr);
> -	}
> -
> -	return true;
> +	return pmu_msr_chk_emulated(msr, val, true, &emulated) && emulated;
>  }
>  
> -bool pmu_msr_write(unsigned int msr, uint32_t low, uint32_t high, int *err)
> +bool pmu_msr_write_emulated(u32 msr, u64 val)
>  {
> -	uint64_t val = ((uint64_t)high << 32) | low;
>  	bool emulated;
>  
> -	if (!pmu_msr_chk_emulated(msr, &val, false, &emulated))
> -		return false;
> -
> -	if (!emulated) {
> -		if (err)
> -			*err = native_write_msr_safe(msr, low, high);
> -		else
> -			native_write_msr(msr, low, high);
> -	}
> -
> -	return true;
> +	return pmu_msr_chk_emulated(msr, &val, false, &emulated) && emulated;
>  }
>  
>  static u64 xen_amd_read_pmc(int counter)
> diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h
> index 735f58780704..163e03e33089 100644
> --- a/arch/x86/xen/xen-ops.h
> +++ b/arch/x86/xen/xen-ops.h
> @@ -274,8 +274,8 @@ void xen_pmu_finish(int cpu);
>  static inline void xen_pmu_init(int cpu) {}
>  static inline void xen_pmu_finish(int cpu) {}
>  #endif
> -bool pmu_msr_read(unsigned int msr, uint64_t *val, int *err);
> -bool pmu_msr_write(unsigned int msr, uint32_t low, uint32_t high, int *err);
> +bool pmu_msr_read_emulated(u32 msr, u64 *val);
> +bool pmu_msr_write_emulated(u32 msr, u64 val);
>  int pmu_apic_update(uint32_t reg);
>  u64 xen_read_pmc(int counter);
>  

Reviewed-by: Dapeng Mi 




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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
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        haiyangz@microsoft.com, decui@microsoft.com,
        dapeng1.mi@linux.intel.com, ilpo.jarvinen@linux.intel.com
Subject: [PATCH v4 11/15] x86/xen/msr: Remove pmu_msr_{read,write}()
Date: Sun, 27 Apr 2025 02:20:23 -0700
Message-ID: <20250427092027.1598740-12-xin@zytor.com>
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As pmu_msr_{read,write}() are now wrappers of pmu_msr_chk_emulated(),
remove them and use pmu_msr_chk_emulated() directly.

As pmu_msr_chk_emulated() could easily return false in the cases where
it would set *emul to false, remove the "emul" argument and use the
return value instead.

While at it, convert the data type of MSR index to u32 in functions
called in pmu_msr_chk_emulated().

Suggested-by: H. Peter Anvin (Intel) 
Suggested-by: Juergen Gross 
Signed-off-by: Xin Li (Intel) 
Reviewed-by: Juergen Gross 
Acked-by: Peter Zijlstra (Intel) 
---

Change in v4:
*) Remove two "else" that no longer make sense (Juergen Gross).

Change in v3:
*) Remove the "emul" argument of pmu_msr_chk_emulated() (Juergen Gross).
---
 arch/x86/xen/enlighten_pv.c | 15 ++++++++-------
 arch/x86/xen/pmu.c          | 33 ++++++++-------------------------
 arch/x86/xen/xen-ops.h      |  3 +--
 3 files changed, 17 insertions(+), 34 deletions(-)

diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c
index 61e51a970f3c..528a2f4df050 100644
--- a/arch/x86/xen/enlighten_pv.c
+++ b/arch/x86/xen/enlighten_pv.c
@@ -1090,7 +1090,7 @@ static u64 xen_do_read_msr(unsigned int msr, int *err)
 {
 	u64 val = 0;	/* Avoid uninitialized value for safe variant. */
 
-	if (pmu_msr_read_emulated(msr, &val))
+	if (pmu_msr_chk_emulated(msr, &val, true))
 		return val;
 
 	if (err)
@@ -1162,12 +1162,13 @@ static void xen_do_write_msr(unsigned int msr, unsigned int low,
 	default:
 		val = (u64)high << 32 | low;
 
-		if (!pmu_msr_write_emulated(msr, val)) {
-			if (err)
-				*err = native_write_msr_safe(msr, low, high);
-			else
-				native_write_msr(msr, low, high);
-		}
+		if (pmu_msr_chk_emulated(msr, &val, false))
+			return;
+
+		if (err)
+			*err = native_write_msr_safe(msr, low, high);
+		else
+			native_write_msr(msr, low, high);
 	}
 }
 
diff --git a/arch/x86/xen/pmu.c b/arch/x86/xen/pmu.c
index b6557f2d1a2e..5f3d2a6c70f1 100644
--- a/arch/x86/xen/pmu.c
+++ b/arch/x86/xen/pmu.c
@@ -128,7 +128,7 @@ static inline uint32_t get_fam15h_addr(u32 addr)
 	return addr;
 }
 
-static inline bool is_amd_pmu_msr(unsigned int msr)
+static bool is_amd_pmu_msr(u32 msr)
 {
 	if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD &&
 	    boot_cpu_data.x86_vendor != X86_VENDOR_HYGON)
@@ -194,8 +194,7 @@ static bool is_intel_pmu_msr(u32 msr_index, int *type, int *index)
 	}
 }
 
-static bool xen_intel_pmu_emulate(unsigned int msr, u64 *val, int type,
-				  int index, bool is_read)
+static bool xen_intel_pmu_emulate(u32 msr, u64 *val, int type, int index, bool is_read)
 {
 	uint64_t *reg = NULL;
 	struct xen_pmu_intel_ctxt *ctxt;
@@ -257,7 +256,7 @@ static bool xen_intel_pmu_emulate(unsigned int msr, u64 *val, int type,
 	return false;
 }
 
-static bool xen_amd_pmu_emulate(unsigned int msr, u64 *val, bool is_read)
+static bool xen_amd_pmu_emulate(u32 msr, u64 *val, bool is_read)
 {
 	uint64_t *reg = NULL;
 	int i, off = 0;
@@ -298,33 +297,17 @@ static bool xen_amd_pmu_emulate(unsigned int msr, u64 *val, bool is_read)
 	return false;
 }
 
-static bool pmu_msr_chk_emulated(unsigned int msr, uint64_t *val, bool is_read,
-				 bool *emul)
+bool pmu_msr_chk_emulated(u32 msr, u64 *val, bool is_read)
 {
 	int type, index = 0;
 
 	if (is_amd_pmu_msr(msr))
-		*emul = xen_amd_pmu_emulate(msr, val, is_read);
-	else if (is_intel_pmu_msr(msr, &type, &index))
-		*emul = xen_intel_pmu_emulate(msr, val, type, index, is_read);
-	else
-		return false;
-
-	return true;
-}
-
-bool pmu_msr_read_emulated(u32 msr, u64 *val)
-{
-	bool emulated;
+		return xen_amd_pmu_emulate(msr, val, is_read);
 
-	return pmu_msr_chk_emulated(msr, val, true, &emulated) && emulated;
-}
+	if (is_intel_pmu_msr(msr, &type, &index))
+		return xen_intel_pmu_emulate(msr, val, type, index, is_read);
 
-bool pmu_msr_write_emulated(u32 msr, u64 val)
-{
-	bool emulated;
-
-	return pmu_msr_chk_emulated(msr, &val, false, &emulated) && emulated;
+	return false;
 }
 
 static u64 xen_amd_read_pmc(int counter)
diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h
index 163e03e33089..fd7f845b83a3 100644
--- a/arch/x86/xen/xen-ops.h
+++ b/arch/x86/xen/xen-ops.h
@@ -274,8 +274,7 @@ void xen_pmu_finish(int cpu);
 static inline void xen_pmu_init(int cpu) {}
 static inline void xen_pmu_finish(int cpu) {}
 #endif
-bool pmu_msr_read_emulated(u32 msr, u64 *val);
-bool pmu_msr_write_emulated(u32 msr, u64 val);
+bool pmu_msr_chk_emulated(u32 msr, u64 *val, bool is_read);
 int pmu_apic_update(uint32_t reg);
 u64 xen_read_pmc(int counter);
 
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
        pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com,
        dapeng1.mi@linux.intel.com, ilpo.jarvinen@linux.intel.com
Subject: [PATCH v4 07/15] x86/msr: Convert __wrmsr() uses to native_wrmsr{,q}() uses
Date: Sun, 27 Apr 2025 02:20:19 -0700
Message-ID: <20250427092027.1598740-8-xin@zytor.com>
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__wrmsr() is the lowest level MSR write API, with native_wrmsr()
and native_wrmsrq() serving as higher-level wrappers around it:

  #define native_wrmsr(msr, low, high)                    \
          __wrmsr(msr, low, high)

  #define native_wrmsrl(msr, val)                         \
          __wrmsr((msr), (u32)((u64)(val)),               \
                         (u32)((u64)(val) >> 32))

However, __wrmsr() continues to be utilized in various locations.

MSR APIs are designed for different scenarios, such as native or
pvops, with or without trace, and safe or non-safe.  Unfortunately,
the current MSR API names do not adequately reflect these factors,
making it challenging to select the most appropriate API for
various situations.

To pave the way for improving MSR API names, convert __wrmsr()
uses to native_wrmsr{,q}() to ensure consistent usage.  Later,
these APIs can be renamed to better reflect their implications,
such as native or pvops, with or without trace, and safe or
non-safe.

No functional change intended.

Signed-off-by: Xin Li (Intel) 
Acked-by: Peter Zijlstra (Intel) 
---

Change in v2:
* Use native_wrmsr() where natural [rmid_p, closid_p] high/lo parameters
  can be used, without the shift-uglification (Ingo).
---
 arch/x86/events/amd/brs.c                 | 2 +-
 arch/x86/include/asm/apic.h               | 2 +-
 arch/x86/include/asm/msr.h                | 6 ++++--
 arch/x86/kernel/cpu/mce/core.c            | 2 +-
 arch/x86/kernel/cpu/resctrl/pseudo_lock.c | 6 +++---
 5 files changed, 10 insertions(+), 8 deletions(-)

diff --git a/arch/x86/events/amd/brs.c b/arch/x86/events/amd/brs.c
index ec4e8a4cace4..3f5ecfd80d1e 100644
--- a/arch/x86/events/amd/brs.c
+++ b/arch/x86/events/amd/brs.c
@@ -44,7 +44,7 @@ static inline unsigned int brs_to(int idx)
 static __always_inline void set_debug_extn_cfg(u64 val)
 {
 	/* bits[4:3] must always be set to 11b */
-	__wrmsr(MSR_AMD_DBG_EXTN_CFG, val | 3ULL << 3, val >> 32);
+	native_wrmsrq(MSR_AMD_DBG_EXTN_CFG, val | 3ULL << 3);
 }
 
 static __always_inline u64 get_debug_extn_cfg(void)
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index 1c136f54651c..0174dd548327 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -214,7 +214,7 @@ static inline void native_apic_msr_write(u32 reg, u32 v)
 
 static inline void native_apic_msr_eoi(void)
 {
-	__wrmsr(APIC_BASE_MSR + (APIC_EOI >> 4), APIC_EOI_ACK, 0);
+	native_wrmsrq(APIC_BASE_MSR + (APIC_EOI >> 4), APIC_EOI_ACK);
 }
 
 static inline u32 native_apic_msr_read(u32 reg)
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 73d44081e597..82a908125b20 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -144,10 +144,12 @@ static inline u64 native_read_msr_safe(u32 msr, int *err)
 static inline void notrace
 native_write_msr(u32 msr, u32 low, u32 high)
 {
-	__wrmsr(msr, low, high);
+	u64 val = (u64)high << 32 | low;
+
+	native_wrmsrq(msr, val);
 
 	if (tracepoint_enabled(write_msr))
-		do_trace_write_msr(msr, ((u64)high << 32 | low), 0);
+		do_trace_write_msr(msr, val, 0);
 }
 
 /* Can be uninlined because referenced by paravirt */
diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
index 255927f0284e..1ae75ec7ac95 100644
--- a/arch/x86/kernel/cpu/mce/core.c
+++ b/arch/x86/kernel/cpu/mce/core.c
@@ -1306,7 +1306,7 @@ static noinstr bool mce_check_crashing_cpu(void)
 		}
 
 		if (mcgstatus & MCG_STATUS_RIPV) {
-			__wrmsr(MSR_IA32_MCG_STATUS, 0, 0);
+			native_wrmsrq(MSR_IA32_MCG_STATUS, 0);
 			return true;
 		}
 	}
diff --git a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
index 61d762555a79..6e5edd76086e 100644
--- a/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
+++ b/arch/x86/kernel/cpu/resctrl/pseudo_lock.c
@@ -483,7 +483,7 @@ int resctrl_arch_pseudo_lock_fn(void *_plr)
 	 * cache.
 	 */
 	saved_msr = __rdmsr(MSR_MISC_FEATURE_CONTROL);
-	__wrmsr(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits, 0x0);
+	native_wrmsrq(MSR_MISC_FEATURE_CONTROL, prefetch_disable_bits);
 	closid_p = this_cpu_read(pqr_state.cur_closid);
 	rmid_p = this_cpu_read(pqr_state.cur_rmid);
 	mem_r = plr->kmem;
@@ -495,7 +495,7 @@ int resctrl_arch_pseudo_lock_fn(void *_plr)
 	 * pseudo-locked followed by reading of kernel memory to load it
 	 * into the cache.
 	 */
-	__wrmsr(MSR_IA32_PQR_ASSOC, rmid_p, plr->closid);
+	native_wrmsr(MSR_IA32_PQR_ASSOC, rmid_p, plr->closid);
 
 	/*
 	 * Cache was flushed earlier. Now access kernel memory to read it
@@ -532,7 +532,7 @@ int resctrl_arch_pseudo_lock_fn(void *_plr)
 	 * Critical section end: restore closid with capacity bitmask that
 	 * does not overlap with pseudo-locked region.
 	 */
-	__wrmsr(MSR_IA32_PQR_ASSOC, rmid_p, closid_p);
+	native_wrmsr(MSR_IA32_PQR_ASSOC, rmid_p, closid_p);
 
 	/* Re-enable the hardware prefetcher(s) */
 	wrmsrq(MSR_MISC_FEATURE_CONTROL, saved_msr);
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
        pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com,
        dapeng1.mi@linux.intel.com, ilpo.jarvinen@linux.intel.com
Subject: [PATCH v4 08/15] x86/msr: Add the native_rdmsrq() helper
Date: Sun, 27 Apr 2025 02:20:20 -0700
Message-ID: <20250427092027.1598740-9-xin@zytor.com>
X-Mailer: git-send-email 2.49.0
In-Reply-To: <20250427092027.1598740-1-xin@zytor.com>
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MIME-Version: 1.0
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__rdmsr() is the lowest-level primitive MSR read API, implemented in
assembly code and returning an MSR value in a u64 integer, on top of
which a convenience wrapper native_rdmsr() is defined to return an MSR
value in two u32 integers.  For some reason, native_rdmsrq() is not
defined and __rdmsr() is directly used when it needs to return an MSR
value in a u64 integer.

Add the native_rdmsrq() helper, which is simply an alias of __rdmsr(),
to make native_rdmsr() and native_rdmsrq() a pair of MSR read APIs.

Signed-off-by: Xin Li (Intel) 
Acked-by: Peter Zijlstra (Intel) 
---

Change in v2:
* Split into two changes and add the native_rdmsrl() helper in the
  first one with a proper explanation (Ingo).
---
 arch/x86/include/asm/msr.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 82a908125b20..7b9713a49d59 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -107,6 +107,11 @@ do {							\
 	(void)((val2) = (u32)(__val >> 32));		\
 } while (0)
 
+static __always_inline u64 native_rdmsrq(u32 msr)
+{
+	return __rdmsr(msr);
+}
+
 #define native_wrmsr(msr, low, high)			\
 	__wrmsr(msr, low, high)
 
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
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        pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com,
        dapeng1.mi@linux.intel.com, ilpo.jarvinen@linux.intel.com
Subject: [PATCH v4 13/15] x86/pvops/msr: refactor pv_cpu_ops.write_msr{,_safe}()
Date: Sun, 27 Apr 2025 02:20:25 -0700
Message-ID: <20250427092027.1598740-14-xin@zytor.com>
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An MSR value is represented as a 64-bit unsigned integer, with existing
MSR instructions storing it in EDX:EAX as two 32-bit segments.

The new immediate form MSR instructions, however, utilize a 64-bit
general-purpose register to store the MSR value.  To unify the usage of
all MSR instructions, let the default MSR access APIs accept an MSR
value as a single 64-bit argument instead of two 32-bit segments.

The dual 32-bit APIs are still available as convenient wrappers over the
APIs that handle an MSR value as a single 64-bit argument.

The following illustrates the updated derivation of the MSR write APIs:

                 __wrmsrq(u32 msr, u64 val)
                   /                  \
                  /                    \
           native_wrmsrq(msr, val)    native_wrmsr(msr, low, high)
                 |
                 |
           native_write_msr(msr, val)
                /          \
               /            \
       wrmsrq(msr, val)    wrmsr(msr, low, high)

When CONFIG_PARAVIRT is enabled, wrmsrq() and wrmsr() are defined on top
of paravirt_write_msr():

            paravirt_write_msr(u32 msr, u64 val)
               /             \
              /               \
          wrmsrq(msr, val)    wrmsr(msr, low, high)

paravirt_write_msr() invokes cpu.write_msr(msr, val), an indirect layer
of pv_ops MSR write call:

    If on native:

            cpu.write_msr = native_write_msr

    If on Xen:

            cpu.write_msr = xen_write_msr

Therefore, refactor pv_cpu_ops.write_msr{_safe}() to accept an MSR value
in a single u64 argument, replacing the current dual u32 arguments.

No functional change intended.

Signed-off-by: Xin Li (Intel) 
Reviewed-by: Juergen Gross 
Acked-by: Peter Zijlstra (Intel) 
---

Change in v2:
* Spell out the reason why use a single u64 argument to pass the MSR
  value in the lowest level APIs (Andrew Cooper).
---
 arch/x86/include/asm/msr.h            | 35 ++++++++++++---------------
 arch/x86/include/asm/paravirt.h       | 27 +++++++++++----------
 arch/x86/include/asm/paravirt_types.h |  4 +--
 arch/x86/kernel/kvmclock.c            |  2 +-
 arch/x86/kvm/svm/svm.c                | 15 +++---------
 arch/x86/xen/enlighten_pv.c           | 30 +++++++++--------------
 6 files changed, 46 insertions(+), 67 deletions(-)

diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 7b9713a49d59..0392b9596107 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -92,12 +92,12 @@ static __always_inline u64 __rdmsr(u32 msr)
 	return EAX_EDX_VAL(val, low, high);
 }
 
-static __always_inline void __wrmsr(u32 msr, u32 low, u32 high)
+static __always_inline void __wrmsrq(u32 msr, u64 val)
 {
 	asm volatile("1: wrmsr\n"
 		     "2:\n"
 		     _ASM_EXTABLE_TYPE(1b, 2b, EX_TYPE_WRMSR)
-		     : : "c" (msr), "a"(low), "d" (high) : "memory");
+		     : : "c" (msr), "a" ((u32)val), "d" ((u32)(val >> 32)) : "memory");
 }
 
 #define native_rdmsr(msr, val1, val2)			\
@@ -113,11 +113,10 @@ static __always_inline u64 native_rdmsrq(u32 msr)
 }
 
 #define native_wrmsr(msr, low, high)			\
-	__wrmsr(msr, low, high)
+	__wrmsrq((msr), (u64)(high) << 32 | (low))
 
 #define native_wrmsrq(msr, val)				\
-	__wrmsr((msr), (u32)((u64)(val)),		\
-		       (u32)((u64)(val) >> 32))
+	__wrmsrq((msr), (val))
 
 static inline u64 native_read_msr(u32 msr)
 {
@@ -146,11 +145,8 @@ static inline u64 native_read_msr_safe(u32 msr, int *err)
 }
 
 /* Can be uninlined because referenced by paravirt */
-static inline void notrace
-native_write_msr(u32 msr, u32 low, u32 high)
+static inline void notrace native_write_msr(u32 msr, u64 val)
 {
-	u64 val = (u64)high << 32 | low;
-
 	native_wrmsrq(msr, val);
 
 	if (tracepoint_enabled(write_msr))
@@ -158,8 +154,7 @@ native_write_msr(u32 msr, u32 low, u32 high)
 }
 
 /* Can be uninlined because referenced by paravirt */
-static inline int notrace
-native_write_msr_safe(u32 msr, u32 low, u32 high)
+static inline int notrace native_write_msr_safe(u32 msr, u64 val)
 {
 	int err;
 
@@ -167,10 +162,10 @@ native_write_msr_safe(u32 msr, u32 low, u32 high)
 		     "2:\n\t"
 		     _ASM_EXTABLE_TYPE_REG(1b, 2b, EX_TYPE_WRMSR_SAFE, %[err])
 		     : [err] "=a" (err)
-		     : "c" (msr), "0" (low), "d" (high)
+		     : "c" (msr), "0" ((u32)val), "d" ((u32)(val >> 32))
 		     : "memory");
 	if (tracepoint_enabled(write_msr))
-		do_trace_write_msr(msr, ((u64)high << 32 | low), err);
+		do_trace_write_msr(msr, val, err);
 	return err;
 }
 
@@ -206,7 +201,7 @@ do {								\
 
 static inline void wrmsr(u32 msr, u32 low, u32 high)
 {
-	native_write_msr(msr, low, high);
+	native_write_msr(msr, (u64)high << 32 | low);
 }
 
 #define rdmsrq(msr, val)			\
@@ -214,13 +209,13 @@ static inline void wrmsr(u32 msr, u32 low, u32 high)
 
 static inline void wrmsrq(u32 msr, u64 val)
 {
-	native_write_msr(msr, (u32)(val & 0xffffffffULL), (u32)(val >> 32));
+	native_write_msr(msr, val);
 }
 
 /* wrmsr with exception handling */
-static inline int wrmsr_safe(u32 msr, u32 low, u32 high)
+static inline int wrmsrq_safe(u32 msr, u64 val)
 {
-	return native_write_msr_safe(msr, low, high);
+	return native_write_msr_safe(msr, val);
 }
 
 /* rdmsr with exception handling */
@@ -264,11 +259,11 @@ static __always_inline void wrmsrns(u32 msr, u64 val)
 }
 
 /*
- * 64-bit version of wrmsr_safe():
+ * Dual u32 version of wrmsrq_safe():
  */
-static inline int wrmsrq_safe(u32 msr, u64 val)
+static inline int wrmsr_safe(u32 msr, u32 low, u32 high)
 {
-	return wrmsr_safe(msr, (u32)val,  (u32)(val >> 32));
+	return wrmsrq_safe(msr, (u64)high << 32 | low);
 }
 
 struct msr __percpu *msrs_alloc(void);
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index f272c4bd3d5b..edf23bde367e 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -180,10 +180,9 @@ static inline u64 paravirt_read_msr(unsigned msr)
 	return PVOP_CALL1(u64, cpu.read_msr, msr);
 }
 
-static inline void paravirt_write_msr(unsigned msr,
-				      unsigned low, unsigned high)
+static inline void paravirt_write_msr(u32 msr, u64 val)
 {
-	PVOP_VCALL3(cpu.write_msr, msr, low, high);
+	PVOP_VCALL2(cpu.write_msr, msr, val);
 }
 
 static inline u64 paravirt_read_msr_safe(unsigned msr, int *err)
@@ -191,10 +190,9 @@ static inline u64 paravirt_read_msr_safe(unsigned msr, int *err)
 	return PVOP_CALL2(u64, cpu.read_msr_safe, msr, err);
 }
 
-static inline int paravirt_write_msr_safe(unsigned msr,
-					  unsigned low, unsigned high)
+static inline int paravirt_write_msr_safe(u32 msr, u64 val)
 {
-	return PVOP_CALL3(int, cpu.write_msr_safe, msr, low, high);
+	return PVOP_CALL2(int, cpu.write_msr_safe, msr, val);
 }
 
 #define rdmsr(msr, val1, val2)			\
@@ -204,22 +202,25 @@ do {						\
 	val2 = _l >> 32;			\
 } while (0)
 
-#define wrmsr(msr, val1, val2)			\
-do {						\
-	paravirt_write_msr(msr, val1, val2);	\
-} while (0)
+static __always_inline void wrmsr(u32 msr, u32 low, u32 high)
+{
+	paravirt_write_msr(msr, (u64)high << 32 | low);
+}
 
 #define rdmsrq(msr, val)			\
 do {						\
 	val = paravirt_read_msr(msr);		\
 } while (0)
 
-static inline void wrmsrq(unsigned msr, u64 val)
+static inline void wrmsrq(u32 msr, u64 val)
 {
-	wrmsr(msr, (u32)val, (u32)(val>>32));
+	paravirt_write_msr(msr, val);
 }
 
-#define wrmsr_safe(msr, a, b)	paravirt_write_msr_safe(msr, a, b)
+static inline int wrmsrq_safe(u32 msr, u64 val)
+{
+	return paravirt_write_msr_safe(msr, val);
+}
 
 /* rdmsr with exception handling */
 #define rdmsr_safe(msr, a, b)				\
diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/paravirt_types.h
index 631c306ce1ff..78777b78da12 100644
--- a/arch/x86/include/asm/paravirt_types.h
+++ b/arch/x86/include/asm/paravirt_types.h
@@ -92,14 +92,14 @@ struct pv_cpu_ops {
 
 	/* Unsafe MSR operations.  These will warn or panic on failure. */
 	u64 (*read_msr)(unsigned int msr);
-	void (*write_msr)(unsigned int msr, unsigned low, unsigned high);
+	void (*write_msr)(u32 msr, u64 val);
 
 	/*
 	 * Safe MSR operations.
 	 * read sets err to 0 or -EIO.  write returns 0 or -EIO.
 	 */
 	u64 (*read_msr_safe)(unsigned int msr, int *err);
-	int (*write_msr_safe)(unsigned int msr, unsigned low, unsigned high);
+	int (*write_msr_safe)(u32 msr, u64 val);
 
 	u64 (*read_pmc)(int counter);
 
diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c
index 0af797930ccb..ca0a49eeac4a 100644
--- a/arch/x86/kernel/kvmclock.c
+++ b/arch/x86/kernel/kvmclock.c
@@ -196,7 +196,7 @@ static void kvm_setup_secondary_clock(void)
 void kvmclock_disable(void)
 {
 	if (msr_kvm_system_time)
-		native_write_msr(msr_kvm_system_time, 0, 0);
+		native_write_msr(msr_kvm_system_time, 0);
 }
 
 static void __init kvmclock_init_mem(void)
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index 67657b3a36ce..4ef9978dce70 100644
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -475,7 +475,6 @@ static void svm_inject_exception(struct kvm_vcpu *vcpu)
 
 static void svm_init_erratum_383(void)
 {
-	u32 low, high;
 	int err;
 	u64 val;
 
@@ -489,10 +488,7 @@ static void svm_init_erratum_383(void)
 
 	val |= (1ULL << 47);
 
-	low  = lower_32_bits(val);
-	high = upper_32_bits(val);
-
-	native_write_msr_safe(MSR_AMD64_DC_CFG, low, high);
+	native_write_msr_safe(MSR_AMD64_DC_CFG, val);
 
 	erratum_383_found = true;
 }
@@ -2167,17 +2163,12 @@ static bool is_erratum_383(void)
 
 	/* Clear MCi_STATUS registers */
 	for (i = 0; i < 6; ++i)
-		native_write_msr_safe(MSR_IA32_MCx_STATUS(i), 0, 0);
+		native_write_msr_safe(MSR_IA32_MCx_STATUS(i), 0);
 
 	value = native_read_msr_safe(MSR_IA32_MCG_STATUS, &err);
 	if (!err) {
-		u32 low, high;
-
 		value &= ~(1ULL << 2);
-		low    = lower_32_bits(value);
-		high   = upper_32_bits(value);
-
-		native_write_msr_safe(MSR_IA32_MCG_STATUS, low, high);
+		native_write_msr_safe(MSR_IA32_MCG_STATUS, value);
 	}
 
 	/* Flush tlb to evict multi-match entries */
diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c
index c247e7689bc3..c067d1e8a39c 100644
--- a/arch/x86/xen/enlighten_pv.c
+++ b/arch/x86/xen/enlighten_pv.c
@@ -1110,10 +1110,8 @@ static u64 xen_do_read_msr(unsigned int msr, int *err)
 	return val;
 }
 
-static void set_seg(u32 which, u32 low, u32 high)
+static void set_seg(u32 which, u64 base)
 {
-	u64 base = ((u64)high << 32) | low;
-
 	if (HYPERVISOR_set_segment_base(which, base))
 		WARN(1, "Xen set_segment_base(%u, %llx) failed\n", which, base);
 }
@@ -1123,22 +1121,19 @@ static void set_seg(u32 which, u32 low, u32 high)
  * With err == NULL write_msr() semantics are selected.
  * Supplying an err pointer requires err to be pre-initialized with 0.
  */
-static void xen_do_write_msr(unsigned int msr, unsigned int low,
-			     unsigned int high, int *err)
+static void xen_do_write_msr(u32 msr, u64 val, int *err)
 {
-	u64 val;
-
 	switch (msr) {
 	case MSR_FS_BASE:
-		set_seg(SEGBASE_FS, low, high);
+		set_seg(SEGBASE_FS, val);
 		break;
 
 	case MSR_KERNEL_GS_BASE:
-		set_seg(SEGBASE_GS_USER, low, high);
+		set_seg(SEGBASE_GS_USER, val);
 		break;
 
 	case MSR_GS_BASE:
-		set_seg(SEGBASE_GS_KERNEL, low, high);
+		set_seg(SEGBASE_GS_KERNEL, val);
 		break;
 
 	case MSR_STAR:
@@ -1154,15 +1149,13 @@ static void xen_do_write_msr(unsigned int msr, unsigned int low,
 		break;
 
 	default:
-		val = (u64)high << 32 | low;
-
 		if (pmu_msr_chk_emulated(msr, &val, false))
 			return;
 
 		if (err)
-			*err = native_write_msr_safe(msr, low, high);
+			*err = native_write_msr_safe(msr, val);
 		else
-			native_write_msr(msr, low, high);
+			native_write_msr(msr, val);
 	}
 }
 
@@ -1171,12 +1164,11 @@ static u64 xen_read_msr_safe(unsigned int msr, int *err)
 	return xen_do_read_msr(msr, err);
 }
 
-static int xen_write_msr_safe(unsigned int msr, unsigned int low,
-			      unsigned int high)
+static int xen_write_msr_safe(u32 msr, u64 val)
 {
 	int err = 0;
 
-	xen_do_write_msr(msr, low, high, &err);
+	xen_do_write_msr(msr, val, &err);
 
 	return err;
 }
@@ -1188,11 +1180,11 @@ static u64 xen_read_msr(unsigned int msr)
 	return xen_do_read_msr(msr, xen_msr_safe ? &err : NULL);
 }
 
-static void xen_write_msr(unsigned int msr, unsigned low, unsigned high)
+static void xen_write_msr(u32 msr, u64 val)
 {
 	int err;
 
-	xen_do_write_msr(msr, low, high, xen_msr_safe ? &err : NULL);
+	xen_do_write_msr(msr, val, xen_msr_safe ? &err : NULL);
 }
 
 /* This is called once we have the cpu_possible_mask */
-- 
2.49.0



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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
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        wei.liu@kernel.org, ajay.kaher@broadcom.com,
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        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com,
        dapeng1.mi@linux.intel.com, ilpo.jarvinen@linux.intel.com
Subject: [PATCH v4 15/15] x86/msr: Change the function type of native_read_msr_safe()
Date: Sun, 27 Apr 2025 02:20:27 -0700
Message-ID: <20250427092027.1598740-16-xin@zytor.com>
X-Mailer: git-send-email 2.49.0
In-Reply-To: <20250427092027.1598740-1-xin@zytor.com>
References: <20250427092027.1598740-1-xin@zytor.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit

Modify the function type of native_read_msr_safe() to:

    int native_read_msr_safe(u32 msr, u64 *val)

This change makes the function return an error code instead of the
MSR value, aligning it with the type of native_write_msr_safe().
Consequently, their callers can check the results in the same way.

While at it, convert leftover MSR data type "unsigned int" to u32.

Signed-off-by: Xin Li (Intel) 
Acked-by: Peter Zijlstra (Intel) 
---
 arch/x86/include/asm/msr.h            | 21 +++++++++++----------
 arch/x86/include/asm/paravirt.h       | 19 ++++++++-----------
 arch/x86/include/asm/paravirt_types.h |  6 +++---
 arch/x86/kvm/svm/svm.c                | 19 +++++++------------
 arch/x86/xen/enlighten_pv.c           | 13 ++++++++-----
 arch/x86/xen/pmu.c                    | 14 ++++++++------
 6 files changed, 45 insertions(+), 47 deletions(-)

diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 0392b9596107..e7ee51ccd82e 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -130,18 +130,22 @@ static inline u64 native_read_msr(u32 msr)
 	return val;
 }
 
-static inline u64 native_read_msr_safe(u32 msr, int *err)
+static inline int native_read_msr_safe(u32 msr, u64 *p)
 {
+	int err;
 	DECLARE_ARGS(val, low, high);
 
 	asm volatile("1: rdmsr ; xor %[err],%[err]\n"
 		     "2:\n\t"
 		     _ASM_EXTABLE_TYPE_REG(1b, 2b, EX_TYPE_RDMSR_SAFE, %[err])
-		     : [err] "=r" (*err), EAX_EDX_RET(val, low, high)
+		     : [err] "=r" (err), EAX_EDX_RET(val, low, high)
 		     : "c" (msr));
 	if (tracepoint_enabled(read_msr))
-		do_trace_read_msr(msr, EAX_EDX_VAL(val, low, high), *err);
-	return EAX_EDX_VAL(val, low, high);
+		do_trace_read_msr(msr, EAX_EDX_VAL(val, low, high), err);
+
+	*p = EAX_EDX_VAL(val, low, high);
+
+	return err;
 }
 
 /* Can be uninlined because referenced by paravirt */
@@ -221,8 +225,8 @@ static inline int wrmsrq_safe(u32 msr, u64 val)
 /* rdmsr with exception handling */
 #define rdmsr_safe(msr, low, high)				\
 ({								\
-	int __err;						\
-	u64 __val = native_read_msr_safe((msr), &__err);	\
+	u64 __val;						\
+	int __err = native_read_msr_safe((msr), &__val);	\
 	(*low) = (u32)__val;					\
 	(*high) = (u32)(__val >> 32);				\
 	__err;							\
@@ -230,10 +234,7 @@ static inline int wrmsrq_safe(u32 msr, u64 val)
 
 static inline int rdmsrq_safe(u32 msr, u64 *p)
 {
-	int err;
-
-	*p = native_read_msr_safe(msr, &err);
-	return err;
+	return native_read_msr_safe(msr, p);
 }
 
 static __always_inline u64 rdpmc(int counter)
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index edf23bde367e..03f680d1057a 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -175,7 +175,7 @@ static inline void __write_cr4(unsigned long x)
 	PVOP_VCALL1(cpu.write_cr4, x);
 }
 
-static inline u64 paravirt_read_msr(unsigned msr)
+static inline u64 paravirt_read_msr(u32 msr)
 {
 	return PVOP_CALL1(u64, cpu.read_msr, msr);
 }
@@ -185,9 +185,9 @@ static inline void paravirt_write_msr(u32 msr, u64 val)
 	PVOP_VCALL2(cpu.write_msr, msr, val);
 }
 
-static inline u64 paravirt_read_msr_safe(unsigned msr, int *err)
+static inline int paravirt_read_msr_safe(u32 msr, u64 *val)
 {
-	return PVOP_CALL2(u64, cpu.read_msr_safe, msr, err);
+	return PVOP_CALL2(int, cpu.read_msr_safe, msr, val);
 }
 
 static inline int paravirt_write_msr_safe(u32 msr, u64 val)
@@ -225,19 +225,16 @@ static inline int wrmsrq_safe(u32 msr, u64 val)
 /* rdmsr with exception handling */
 #define rdmsr_safe(msr, a, b)				\
 ({							\
-	int _err;					\
-	u64 _l = paravirt_read_msr_safe(msr, &_err);	\
+	u64 _l;						\
+	int _err = paravirt_read_msr_safe((msr), &_l);	\
 	(*a) = (u32)_l;					\
-	(*b) = _l >> 32;				\
+	(*b) = (u32)(_l >> 32);				\
 	_err;						\
 })
 
-static inline int rdmsrq_safe(unsigned msr, u64 *p)
+static __always_inline int rdmsrq_safe(u32 msr, u64 *p)
 {
-	int err;
-
-	*p = paravirt_read_msr_safe(msr, &err);
-	return err;
+	return paravirt_read_msr_safe(msr, p);
 }
 
 static __always_inline u64 rdpmc(int counter)
diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/paravirt_types.h
index 78777b78da12..b08b9d3122d6 100644
--- a/arch/x86/include/asm/paravirt_types.h
+++ b/arch/x86/include/asm/paravirt_types.h
@@ -91,14 +91,14 @@ struct pv_cpu_ops {
 		      unsigned int *ecx, unsigned int *edx);
 
 	/* Unsafe MSR operations.  These will warn or panic on failure. */
-	u64 (*read_msr)(unsigned int msr);
+	u64 (*read_msr)(u32 msr);
 	void (*write_msr)(u32 msr, u64 val);
 
 	/*
 	 * Safe MSR operations.
-	 * read sets err to 0 or -EIO.  write returns 0 or -EIO.
+	 * Returns 0 or -EIO.
 	 */
-	u64 (*read_msr_safe)(unsigned int msr, int *err);
+	int (*read_msr_safe)(u32 msr, u64 *val);
 	int (*write_msr_safe)(u32 msr, u64 val);
 
 	u64 (*read_pmc)(int counter);
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index 4ef9978dce70..838606f784c9 100644
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -475,15 +475,13 @@ static void svm_inject_exception(struct kvm_vcpu *vcpu)
 
 static void svm_init_erratum_383(void)
 {
-	int err;
 	u64 val;
 
 	if (!static_cpu_has_bug(X86_BUG_AMD_TLB_MMATCH))
 		return;
 
 	/* Use _safe variants to not break nested virtualization */
-	val = native_read_msr_safe(MSR_AMD64_DC_CFG, &err);
-	if (err)
+	if (native_read_msr_safe(MSR_AMD64_DC_CFG, &val))
 		return;
 
 	val |= (1ULL << 47);
@@ -648,13 +646,12 @@ static int svm_enable_virtualization_cpu(void)
 	 * erratum is present everywhere).
 	 */
 	if (cpu_has(&boot_cpu_data, X86_FEATURE_OSVW)) {
-		uint64_t len, status = 0;
+		u64 len, status = 0;
 		int err;
 
-		len = native_read_msr_safe(MSR_AMD64_OSVW_ID_LENGTH, &err);
+		err = native_read_msr_safe(MSR_AMD64_OSVW_ID_LENGTH, &len);
 		if (!err)
-			status = native_read_msr_safe(MSR_AMD64_OSVW_STATUS,
-						      &err);
+			err = native_read_msr_safe(MSR_AMD64_OSVW_STATUS, &status);
 
 		if (err)
 			osvw_status = osvw_len = 0;
@@ -2145,14 +2142,13 @@ static int ac_interception(struct kvm_vcpu *vcpu)
 
 static bool is_erratum_383(void)
 {
-	int err, i;
+	int i;
 	u64 value;
 
 	if (!erratum_383_found)
 		return false;
 
-	value = native_read_msr_safe(MSR_IA32_MC0_STATUS, &err);
-	if (err)
+	if (native_read_msr_safe(MSR_IA32_MC0_STATUS, &value))
 		return false;
 
 	/* Bit 62 may or may not be set for this mce */
@@ -2165,8 +2161,7 @@ static bool is_erratum_383(void)
 	for (i = 0; i < 6; ++i)
 		native_write_msr_safe(MSR_IA32_MCx_STATUS(i), 0);
 
-	value = native_read_msr_safe(MSR_IA32_MCG_STATUS, &err);
-	if (!err) {
+	if (!native_read_msr_safe(MSR_IA32_MCG_STATUS, &value)) {
 		value &= ~(1ULL << 2);
 		native_write_msr_safe(MSR_IA32_MCG_STATUS, value);
 	}
diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c
index c067d1e8a39c..0b2f5e679026 100644
--- a/arch/x86/xen/enlighten_pv.c
+++ b/arch/x86/xen/enlighten_pv.c
@@ -1086,7 +1086,7 @@ static void xen_write_cr4(unsigned long cr4)
 	native_write_cr4(cr4);
 }
 
-static u64 xen_do_read_msr(unsigned int msr, int *err)
+static u64 xen_do_read_msr(u32 msr, int *err)
 {
 	u64 val = 0;	/* Avoid uninitialized value for safe variant. */
 
@@ -1094,7 +1094,7 @@ static u64 xen_do_read_msr(unsigned int msr, int *err)
 		return val;
 
 	if (err)
-		val = native_read_msr_safe(msr, err);
+		*err = native_read_msr_safe(msr, &val);
 	else
 		val = native_read_msr(msr);
 
@@ -1159,9 +1159,12 @@ static void xen_do_write_msr(u32 msr, u64 val, int *err)
 	}
 }
 
-static u64 xen_read_msr_safe(unsigned int msr, int *err)
+static int xen_read_msr_safe(u32 msr, u64 *val)
 {
-	return xen_do_read_msr(msr, err);
+	int err;
+
+	*val = xen_do_read_msr(msr, &err);
+	return err;
 }
 
 static int xen_write_msr_safe(u32 msr, u64 val)
@@ -1173,7 +1176,7 @@ static int xen_write_msr_safe(u32 msr, u64 val)
 	return err;
 }
 
-static u64 xen_read_msr(unsigned int msr)
+static u64 xen_read_msr(u32 msr)
 {
 	int err;
 
diff --git a/arch/x86/xen/pmu.c b/arch/x86/xen/pmu.c
index 5f3d2a6c70f1..d308147cd368 100644
--- a/arch/x86/xen/pmu.c
+++ b/arch/x86/xen/pmu.c
@@ -318,11 +318,12 @@ static u64 xen_amd_read_pmc(int counter)
 	uint8_t xenpmu_flags = get_xenpmu_flags();
 
 	if (!xenpmu_data || !(xenpmu_flags & XENPMU_IRQ_PROCESSING)) {
-		uint32_t msr;
-		int err;
+		u32 msr;
+		u64 val;
 
 		msr = amd_counters_base + (counter * amd_msr_step);
-		return native_read_msr_safe(msr, &err);
+		native_read_msr_safe(msr, &val);
+		return val;
 	}
 
 	ctxt = &xenpmu_data->pmu.c.amd;
@@ -339,15 +340,16 @@ static u64 xen_intel_read_pmc(int counter)
 	uint8_t xenpmu_flags = get_xenpmu_flags();
 
 	if (!xenpmu_data || !(xenpmu_flags & XENPMU_IRQ_PROCESSING)) {
-		uint32_t msr;
-		int err;
+		u32 msr;
+		u64 val;
 
 		if (counter & (1 << INTEL_PMC_TYPE_SHIFT))
 			msr = MSR_CORE_PERF_FIXED_CTR0 + (counter & 0xffff);
 		else
 			msr = MSR_IA32_PERFCTR0 + counter;
 
-		return native_read_msr_safe(msr, &err);
+		native_read_msr_safe(msr, &val);
+		return val;
 	}
 
 	ctxt = &xenpmu_data->pmu.c.intel;
-- 
2.49.0



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Message-ID: <5a953dcc-96c1-4312-a8b5-25ca7ee4d0f7@zytor.com>
Date: Sun, 27 Apr 2025 02:26:18 -0700
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v3 09/14] x86/xen/msr: Remove calling
 native_{read,write}_msr{,_safe}() in pmu_msr_{read,write}()
To: "Mi, Dapeng" , linux-kernel@vger.kernel.org,
        kvm@vger.kernel.org, linux-perf-users@vger.kernel.org,
        linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev,
        linux-pm@vger.kernel.org, linux-edac@vger.kernel.org,
        xen-devel@lists.xenproject.org, linux-acpi@vger.kernel.org,
        linux-hwmon@vger.kernel.org, netdev@vger.kernel.org,
        platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
        pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com
References: <20250425083442.2390017-1-xin@zytor.com>
 <20250425083442.2390017-10-xin@zytor.com>
 
Content-Language: en-US
From: Xin Li 
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On 4/27/2025 2:21 AM, Mi, Dapeng wrote:
> Reviewed-by: Dapeng Mi

Thanks!

I just sent out v4, so unless a v5 is needed, leave it to our x86
maintainers.


From xen-devel-bounces@lists.xenproject.org Sun Apr 27 09:32:33 2025
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From: "Xin Li (Intel)" 
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
        virtualization@lists.linux.dev, linux-pm@vger.kernel.org,
        linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org,
        linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org,
        netdev@vger.kernel.org, platform-driver-x86@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
        dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
        acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com,
        peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, jolsa@kernel.org,
        irogers@google.com, adrian.hunter@intel.com, kan.liang@linux.intel.com,
        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
        pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com,
        dapeng1.mi@linux.intel.com, ilpo.jarvinen@linux.intel.com
Subject: [PATCH v4 02/15] x86/msr: Move rdtsc{,_ordered}() to 
Date: Sun, 27 Apr 2025 02:20:14 -0700
Message-ID: <20250427092027.1598740-3-xin@zytor.com>
X-Mailer: git-send-email 2.49.0
In-Reply-To: <20250427092027.1598740-1-xin@zytor.com>
References: <20250427092027.1598740-1-xin@zytor.com>
MIME-Version: 1.0
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For some reason, there are some TSC-related functions in the MSR
header even though there is a tsc.h header.

Relocate rdtsc{,_ordered}() from  to , and
subsequently remove the inclusion of  in .

Signed-off-by: Xin Li (Intel) 
Acked-by: Dave Hansen 
Acked-by: Peter Zijlstra (Intel) 
---

Change in v4:
*) Add missing includes in a different patch (Ilpo Järvinen).

Change in v3:
* Add a problem statement to the changelog (Dave Hansen).
---
 arch/x86/include/asm/msr.h | 54 ---------------------------
 arch/x86/include/asm/tsc.h | 76 +++++++++++++++++++++++++++++++++++++-
 2 files changed, 75 insertions(+), 55 deletions(-)

diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 72a9ebc99078..2caa13830e11 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -170,60 +170,6 @@ native_write_msr_safe(u32 msr, u32 low, u32 high)
 extern int rdmsr_safe_regs(u32 regs[8]);
 extern int wrmsr_safe_regs(u32 regs[8]);
 
-/**
- * rdtsc() - returns the current TSC without ordering constraints
- *
- * rdtsc() returns the result of RDTSC as a 64-bit integer.  The
- * only ordering constraint it supplies is the ordering implied by
- * "asm volatile": it will put the RDTSC in the place you expect.  The
- * CPU can and will speculatively execute that RDTSC, though, so the
- * results can be non-monotonic if compared on different CPUs.
- */
-static __always_inline u64 rdtsc(void)
-{
-	DECLARE_ARGS(val, low, high);
-
-	asm volatile("rdtsc" : EAX_EDX_RET(val, low, high));
-
-	return EAX_EDX_VAL(val, low, high);
-}
-
-/**
- * rdtsc_ordered() - read the current TSC in program order
- *
- * rdtsc_ordered() returns the result of RDTSC as a 64-bit integer.
- * It is ordered like a load to a global in-memory counter.  It should
- * be impossible to observe non-monotonic rdtsc_unordered() behavior
- * across multiple CPUs as long as the TSC is synced.
- */
-static __always_inline u64 rdtsc_ordered(void)
-{
-	DECLARE_ARGS(val, low, high);
-
-	/*
-	 * The RDTSC instruction is not ordered relative to memory
-	 * access.  The Intel SDM and the AMD APM are both vague on this
-	 * point, but empirically an RDTSC instruction can be
-	 * speculatively executed before prior loads.  An RDTSC
-	 * immediately after an appropriate barrier appears to be
-	 * ordered as a normal load, that is, it provides the same
-	 * ordering guarantees as reading from a global memory location
-	 * that some other imaginary CPU is updating continuously with a
-	 * time stamp.
-	 *
-	 * Thus, use the preferred barrier on the respective CPU, aiming for
-	 * RDTSCP as the default.
-	 */
-	asm volatile(ALTERNATIVE_2("rdtsc",
-				   "lfence; rdtsc", X86_FEATURE_LFENCE_RDTSC,
-				   "rdtscp", X86_FEATURE_RDTSCP)
-			: EAX_EDX_RET(val, low, high)
-			/* RDTSCP clobbers ECX with MSR_TSC_AUX. */
-			:: "ecx");
-
-	return EAX_EDX_VAL(val, low, high);
-}
-
 static inline u64 native_read_pmc(int counter)
 {
 	DECLARE_ARGS(val, low, high);
diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h
index 94408a784c8e..13335a130edf 100644
--- a/arch/x86/include/asm/tsc.h
+++ b/arch/x86/include/asm/tsc.h
@@ -7,7 +7,81 @@
 
 #include 
 #include 
-#include 
+
+/*
+ * both i386 and x86_64 returns 64-bit value in edx:eax, but gcc's "A"
+ * constraint has different meanings. For i386, "A" means exactly
+ * edx:eax, while for x86_64 it doesn't mean rdx:rax or edx:eax. Instead,
+ * it means rax *or* rdx.
+ */
+#ifdef CONFIG_X86_64
+/* Using 64-bit values saves one instruction clearing the high half of low */
+#define DECLARE_ARGS(val, low, high)	unsigned long low, high
+#define EAX_EDX_VAL(val, low, high)	((low) | (high) << 32)
+#define EAX_EDX_RET(val, low, high)	"=a" (low), "=d" (high)
+#else
+#define DECLARE_ARGS(val, low, high)	u64 val
+#define EAX_EDX_VAL(val, low, high)	(val)
+#define EAX_EDX_RET(val, low, high)	"=A" (val)
+#endif
+
+/**
+ * rdtsc() - returns the current TSC without ordering constraints
+ *
+ * rdtsc() returns the result of RDTSC as a 64-bit integer.  The
+ * only ordering constraint it supplies is the ordering implied by
+ * "asm volatile": it will put the RDTSC in the place you expect.  The
+ * CPU can and will speculatively execute that RDTSC, though, so the
+ * results can be non-monotonic if compared on different CPUs.
+ */
+static __always_inline u64 rdtsc(void)
+{
+	DECLARE_ARGS(val, low, high);
+
+	asm volatile("rdtsc" : EAX_EDX_RET(val, low, high));
+
+	return EAX_EDX_VAL(val, low, high);
+}
+
+/**
+ * rdtsc_ordered() - read the current TSC in program order
+ *
+ * rdtsc_ordered() returns the result of RDTSC as a 64-bit integer.
+ * It is ordered like a load to a global in-memory counter.  It should
+ * be impossible to observe non-monotonic rdtsc_unordered() behavior
+ * across multiple CPUs as long as the TSC is synced.
+ */
+static __always_inline u64 rdtsc_ordered(void)
+{
+	DECLARE_ARGS(val, low, high);
+
+	/*
+	 * The RDTSC instruction is not ordered relative to memory
+	 * access.  The Intel SDM and the AMD APM are both vague on this
+	 * point, but empirically an RDTSC instruction can be
+	 * speculatively executed before prior loads.  An RDTSC
+	 * immediately after an appropriate barrier appears to be
+	 * ordered as a normal load, that is, it provides the same
+	 * ordering guarantees as reading from a global memory location
+	 * that some other imaginary CPU is updating continuously with a
+	 * time stamp.
+	 *
+	 * Thus, use the preferred barrier on the respective CPU, aiming for
+	 * RDTSCP as the default.
+	 */
+	asm volatile(ALTERNATIVE_2("rdtsc",
+				   "lfence; rdtsc", X86_FEATURE_LFENCE_RDTSC,
+				   "rdtscp", X86_FEATURE_RDTSCP)
+			: EAX_EDX_RET(val, low, high)
+			/* RDTSCP clobbers ECX with MSR_TSC_AUX. */
+			:: "ecx");
+
+	return EAX_EDX_VAL(val, low, high);
+}
+
+#undef DECLARE_ARGS
+#undef EAX_EDX_VAL
+#undef EAX_EDX_RET
 
 /*
  * Standard way to access the cycle counter.
-- 
2.49.0



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Date: Sun, 27 Apr 2025 11:50:01 +0200
From: Ingo Molnar 
To: Linus Torvalds 
Cc: Arnd Bergmann , Arnd Bergmann ,
	Thomas Gleixner ,
	Ingo Molnar , Borislav Petkov ,
	Dave Hansen , x86@kernel.org,
	"H. Peter Anvin" , Juergen Gross ,
	Boris Ostrovsky ,
	Alexander Usyskin ,
	Greg Kroah-Hartman ,
	Mateusz =?utf-8?Q?Jo=C5=84czyk?= ,
	Mike Rapoport , Ard Biesheuvel ,
	Peter Zijlstra , linux-kernel@vger.kernel.org,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH] [RFC] x86/cpu: rework instruction set selection
Message-ID: 
References: <20250425141740.734030-1-arnd@kernel.org>
 
 
 
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* Linus Torvalds  wrote:

> On Sat, 26 Apr 2025 at 11:59, Arnd Bergmann  wrote:
> >
> > Right. With the current set of features, CMOV is almost the
> > same as 686. My reasoning was that support for CMOV has a
> > very clear definition, with the instruction either being
> > available or not.
> 
> Yeah, I don't think there's any reason to make CMOV a reason to drop support.
> 
> It has questionable performance impact - I doubt anybody can measure 
> it - and the "maintenance burden" is basically a single compiler 
> flag.
> 
> (And yes, one use in a x86 header file that is pretty questionable 
> too: I think the reason for the cmov is actually i486-only behavior 
> and we could probably unify the 32-bit and 64-bit implementation)
> 
> Let's not drop Pentium support due to something as insignificant as 
> that.

Agreed on that. Idea to require CMOV dropped.

Note that the outcome of 486 removal will likely be that the few 
remaining community distros that still offer x86-32 builds are either 
already 686-CMOV-only (Debian), or are going to drop their 486 builds 
and keep their 686-CMOV-only builds (Gentoo and Archlinux32) by way of 
simple inertia. (There's an off chance that they'll change their 486 
builds to 586, but I think dropping the extra complication and 
standardizing on 686 will be the most likely outcome.)

No commercial distro builds x86-32 with a modern v6.x series kernel 
AFAICS.

Anyway, I agree that the maintenance cost on the kernel side to build 
non-CMOV kernels is very low.

Thanks,

	Ingo


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Date: Sun, 27 Apr 2025 12:18:20 +0200
From: Ingo Molnar 
To: "H. Peter Anvin" 
Cc: Linus Torvalds ,
	Arnd Bergmann , Arnd Bergmann ,
	Thomas Gleixner ,
	Ingo Molnar , Borislav Petkov ,
	Dave Hansen , x86@kernel.org,
	Juergen Gross ,
	Boris Ostrovsky ,
	Alexander Usyskin ,
	Greg Kroah-Hartman ,
	Mateusz =?utf-8?Q?Jo=C5=84czyk?= ,
	Mike Rapoport , Ard Biesheuvel ,
	Peter Zijlstra , linux-kernel@vger.kernel.org,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH] [RFC] x86/cpu: rework instruction set selection
Message-ID: 
References: <20250425141740.734030-1-arnd@kernel.org>
 
 
 
 
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* H. Peter Anvin  wrote:

> The undefined zero case applies to family < 6 as far as I know... the 
> same platforms which don't have cmov...

So, technically, these are family 5 CPUs with CMOV support, if 
Kconfig.cpu can be believed:

  MGEODE_LX
  MCRUSOE

Right?

	Ingo


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Date: Sun, 27 Apr 2025 15:24:59 +0200
From: "Arnd Bergmann" 
To: "Ingo Molnar" 
Cc: "Arnd Bergmann" , "Thomas Gleixner" ,
 "Ingo Molnar" , "Borislav Petkov" ,
 "Dave Hansen" , x86@kernel.org,
 "H. Peter Anvin" , "Juergen Gross" ,
 "Boris Ostrovsky" ,
 "Alexander Usyskin" ,
 "Greg Kroah-Hartman" ,
 =?UTF-8?Q?Mateusz_Jo=C5=84czyk?= ,
 "Mike Rapoport" , "Ard Biesheuvel" ,
 "Peter Zijlstra" , linux-kernel@vger.kernel.org,
 xen-devel@lists.xenproject.org,
 "Linus Torvalds" 
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Subject: Re: [PATCH] [RFC] x86/cpu: rework instruction set selection
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On Sat, Apr 26, 2025, at 21:09, Ingo Molnar wrote:
> * Arnd Bergmann  wrote:
>
>> CMOV is missing not just on old Socket 5/7 CPUs (Pentium MMX, AMD K6, 
>> Cyrix MII) but also newer embedded Via C3, Geode GX and 
>> Vortex86DX/MX/EX/DX2. The replacement Nehemiah (2003), GeodeLX (2005) 
>> and Vortex86DX3/EX2 (2015!) have CMOV, but the old ones were sold 
>> alongside them for years, and some of the 586-class Vortex86 products 
>> are still commercially available.
>
> Very few (if any) of the commercially available products will run 
> modern 6.16+ kernels, right?

No, at least not in absolute numbers. As far as I can tell, the RDC
SoC family is the only one that is still around, after Quark, Geode
and Eden were all discontinued around 2019.

There are multiple known RDC licensees (DM&P/Vortex86, xlichip) and
probably a few more with custom chips. They lag behind Intel and AMD
by about one patent expiration time, and maybe a decade behind Arm
SoCs, so they only just arrived at quad-core SMP, LPDDR4, and SSSE3
instructions and have announced upcoming 64-bit chips.

They do have super-long support cycles, and there are a few markets
that absolutely require kernel updates for many years, so I would
still consider the 586-class embedded chips more relevant for future
kernels than 30 year old PCs, and the 686-class embedded chips
more relevant than 20 year old laptops.

> Note that the real danger the 32-bit x86 kernel is going to be facing 
> in 2-5 years is total removal due to lack of development interest, but 
> I think we can support 686+ reasonably far into the future, and can 
> keep it tested reasonably - while covering like 99%+ of the currently 
> available 32-bit-only x86 products on the market. The fewer variants, 
> the better.

I agree that this is the endgame for x86-32 and that eventually
the while thing will be remove, and every simplification helps, but
I still don't think that removing 586 earlier helps enough to
outweigh the cost here.

The situation is similar on 32-bit Arm, where we currently support
armv4, armv4t, armv5, armv6, armv6k, armv7, armv7ve and armv8-aarch32.
Removing armv3 a few years ago helped a lot, removing the extremely
rare armv6 will help as well, but there is little value in dropping
CPU support for v4 and v4t as long as v5 is there, or v6k and v7
as long as we have v7ve and v8-aarch32. My guess would be that we
can remove armv4/v4t/v5 at the same time as i586/i686 and
some other 32-bit targets, followed by armv7/v7ve/v8-aarch32
much later.

       Arnd


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Subject: Re: [PATCH] [RFC] x86/cpu: rework instruction set selection
To: Linus Torvalds ,
 Arnd Bergmann 
Cc: Ingo Molnar , Arnd Bergmann ,
 Thomas Gleixner , Ingo Molnar ,
 Borislav Petkov , Dave Hansen ,
 x86@kernel.org, "H. Peter Anvin" ,
 Juergen Gross , Boris Ostrovsky
 , Alexander Usyskin
 ,
 Greg Kroah-Hartman ,
 =?UTF-8?Q?Mateusz_Jo=C5=84czyk?= ,
 Mike Rapoport , Ard Biesheuvel ,
 Peter Zijlstra , linux-kernel@vger.kernel.org,
 xen-devel@lists.xenproject.org
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On 26/04/2025 8:55 pm, Linus Torvalds wrote:
> So I think that manual cmov pattern for x86-32 should be replaced with
>
>         bool zero;
>
>         asm("bsfl %[in],%[out]"
>             CC_SET(z)
>             : CC_OUT(z) (zero),
>               [out]"=r" (r)
>             : [in] "rm" (x));
>
>         return zero ? 0 : r+1;
>
> instead (that's ffs(), and fls() would need the same thing except with
> bsrl insteadm, of course).
>
> I bet that would actually improve code generation.

It is possible to do better still.

ffs/fls are commonly found inside loops where x is the loop condition
too.  Therefore, using statically_true() to provide a form without the
zero compatibility turns out to be a win.

> And I also bet it doesn't actually matter, of course.

Something that neither Linux nor Xen had, which makes a reasonable
difference, is a for_each_set_bit() optimised over a scalar value.  The
existing APIs make it all too easy to spill the loop condition to memory.

~Andrew


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Subject: Re: [PATCH] [RFC] x86/cpu: rework instruction set selection
To: Andrew Cooper 
Cc: Arnd Bergmann , Ingo Molnar , Arnd Bergmann , 
	Thomas Gleixner , Ingo Molnar , Borislav Petkov , 
	Dave Hansen , x86@kernel.org, 
	"H. Peter Anvin" , Juergen Gross , 
	Boris Ostrovsky , 
	Alexander Usyskin , 
	Greg Kroah-Hartman , =?UTF-8?Q?Mateusz_Jo=C5=84czyk?= , 
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--000000000000f1ea350633c7a98d
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On Sun, 27 Apr 2025 at 12:17, Andrew Cooper  wrote:
>
> ffs/fls are commonly found inside loops where x is the loop condition
> too.  Therefore, using statically_true() to provide a form without the
> zero compatibility turns out to be a win.

We already have the version without the zero capability - it's just
called "__ffs()" and "__fls()", and performance-critical code uses
those.

So fls/ffs are the "standard" library functions that have to handle
zero, and add that stupid "+1" because that interface was designed by
some Pascal person who doesn't understand that we start counting from
0.

Standards bodies: "companies aren't sending their best people".

But it's silly that we then spend effort on magic cmov in inline asm
on those things when it's literally the "don't use this version unless
you don't actually care about performance" case.

I don't think it would be wrong to just make the x86-32 code just do
the check against zero ahead of time - in C.

And yes, that will generate some extra code - you'll test for zero
before, and then the caller might also test for a zero result that
then results in another test for zero that can't actually happen (but
the compiler doesn't know that). But I suspect that on the whole, it
is likely to generate better code anyway just because the compiler
sees that first test and can DTRT.

UNTESTED patch applied in case somebody wants to play with this. It
removes 10 lines of silly code, and along with them that 'cmov' use.

Anybody?

              Linus

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Date: Sun, 27 Apr 2025 14:14:08 -0700
From: "H. Peter Anvin" 
To: Linus Torvalds ,
        Andrew Cooper 
CC: Arnd Bergmann , Ingo Molnar ,
        Arnd Bergmann , Thomas Gleixner ,
        Ingo Molnar , Borislav Petkov ,
        Dave Hansen , x86@kernel.org,
        Juergen Gross ,
        Boris Ostrovsky ,
        Alexander Usyskin ,
        Greg Kroah-Hartman ,
        =?UTF-8?Q?Mateusz_Jo=C5=84czyk?= ,
        Mike Rapoport , Ard Biesheuvel ,
        Peter Zijlstra , linux-kernel@vger.kernel.org,
        xen-devel@lists.xenproject.org
Subject: Re: [PATCH] [RFC] x86/cpu: rework instruction set selection
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On April 27, 2025 12:34:46 PM PDT, Linus Torvalds  wrote:
>On Sun, 27 Apr 2025 at 12:17, Andrew Cooper  wrote:
>>
>> ffs/fls are commonly found inside loops where x is the loop condition
>> too=2E  Therefore, using statically_true() to provide a form without th=
e
>> zero compatibility turns out to be a win=2E
>
>We already have the version without the zero capability - it's just
>called "__ffs()" and "__fls()", and performance-critical code uses
>those=2E
>
>So fls/ffs are the "standard" library functions that have to handle
>zero, and add that stupid "+1" because that interface was designed by
>some Pascal person who doesn't understand that we start counting from
>0=2E
>
>Standards bodies: "companies aren't sending their best people"=2E
>
>But it's silly that we then spend effort on magic cmov in inline asm
>on those things when it's literally the "don't use this version unless
>you don't actually care about performance" case=2E
>
>I don't think it would be wrong to just make the x86-32 code just do
>the check against zero ahead of time - in C=2E
>
>And yes, that will generate some extra code - you'll test for zero
>before, and then the caller might also test for a zero result that
>then results in another test for zero that can't actually happen (but
>the compiler doesn't know that)=2E But I suspect that on the whole, it
>is likely to generate better code anyway just because the compiler
>sees that first test and can DTRT=2E
>
>UNTESTED patch applied in case somebody wants to play with this=2E It
>removes 10 lines of silly code, and along with them that 'cmov' use=2E
>
>Anybody?
>
>              Linus

It's noteworthy that hardware implementations are now invariably using a d=
ifferent interface, which makes sense for the LSB case (tzcnt/ctz) but has =
its own drain bramage on for the MSB case (lzcnt/clz)=2E=2E=2E


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Date: Sun, 27 Apr 2025 14:17:43 -0700
From: "H. Peter Anvin" 
To: Arnd Bergmann , Ingo Molnar 
CC: Arnd Bergmann , Thomas Gleixner ,
        Ingo Molnar , Borislav Petkov ,
        Dave Hansen , x86@kernel.org,
        Juergen Gross ,
        Boris Ostrovsky ,
        Alexander Usyskin ,
        Greg Kroah-Hartman ,
        =?UTF-8?Q?Mateusz_Jo=C5=84czyk?= ,
        Mike Rapoport , Ard Biesheuvel ,
        Peter Zijlstra , linux-kernel@vger.kernel.org,
        xen-devel@lists.xenproject.org,
        Linus Torvalds 
Subject: Re: [PATCH] [RFC] x86/cpu: rework instruction set selection
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On April 27, 2025 6:24:59 AM PDT, Arnd Bergmann  wrote:
>On Sat, Apr 26, 2025, at 21:09, Ingo Molnar wrote:
>> * Arnd Bergmann  wrote:
>>
>>> CMOV is missing not just on old Socket 5/7 CPUs (Pentium MMX, AMD K6,=
=20
>>> Cyrix MII) but also newer embedded Via C3, Geode GX and=20
>>> Vortex86DX/MX/EX/DX2=2E The replacement Nehemiah (2003), GeodeLX (2005=
)=20
>>> and Vortex86DX3/EX2 (2015!) have CMOV, but the old ones were sold=20
>>> alongside them for years, and some of the 586-class Vortex86 products=
=20
>>> are still commercially available=2E
>>
>> Very few (if any) of the commercially available products will run=20
>> modern 6=2E16+ kernels, right?
>
>No, at least not in absolute numbers=2E As far as I can tell, the RDC
>SoC family is the only one that is still around, after Quark, Geode
>and Eden were all discontinued around 2019=2E
>
>There are multiple known RDC licensees (DM&P/Vortex86, xlichip) and
>probably a few more with custom chips=2E They lag behind Intel and AMD
>by about one patent expiration time, and maybe a decade behind Arm
>SoCs, so they only just arrived at quad-core SMP, LPDDR4, and SSSE3
>instructions and have announced upcoming 64-bit chips=2E
>
>They do have super-long support cycles, and there are a few markets
>that absolutely require kernel updates for many years, so I would
>still consider the 586-class embedded chips more relevant for future
>kernels than 30 year old PCs, and the 686-class embedded chips
>more relevant than 20 year old laptops=2E
>
>> Note that the real danger the 32-bit x86 kernel is going to be facing=
=20
>> in 2-5 years is total removal due to lack of development interest, but=
=20
>> I think we can support 686+ reasonably far into the future, and can=20
>> keep it tested reasonably - while covering like 99%+ of the currently=
=20
>> available 32-bit-only x86 products on the market=2E The fewer variants,=
=20
>> the better=2E
>
>I agree that this is the endgame for x86-32 and that eventually
>the while thing will be remove, and every simplification helps, but
>I still don't think that removing 586 earlier helps enough to
>outweigh the cost here=2E
>
>The situation is similar on 32-bit Arm, where we currently support
>armv4, armv4t, armv5, armv6, armv6k, armv7, armv7ve and armv8-aarch32=2E
>Removing armv3 a few years ago helped a lot, removing the extremely
>rare armv6 will help as well, but there is little value in dropping
>CPU support for v4 and v4t as long as v5 is there, or v6k and v7
>as long as we have v7ve and v8-aarch32=2E My guess would be that we
>can remove armv4/v4t/v5 at the same time as i586/i686 and
>some other 32-bit targets, followed by armv7/v7ve/v8-aarch32
>much later=2E
>
>       Arnd

"Commercially available" doesn't mean "binary distribution=2E" There is a =
whold world beyond the desktop distros=2E

These kinds of systems run embedded stacks that are at least in part compi=
led by the appliance vendor to allow for higher configurability=2E



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Date: Mon, 28 Apr 2025 01:47:44 +0000
To: Stefano Stabellini 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, dmukhin@ford.com
Subject: Re: [PATCH v1 2/3] xen/console: introduce console_puts()
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References: <20250403000604.169619-1-dmukhin@ford.com> <20250403000604.169619-3-dmukhin@ford.com> 
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On Fri, Apr 25, 2025 at 03:47:53PM -0700, Stefano Stabellini wrote:
> On Thu, 3 Apr 2025, dmkhn@proton.me wrote:
> > From: Denis Mukhin 
> >
> > guest_console_write() duplicates the code from __putstr(), eliminate co=
de
> > duplication.
> >
> > Introduce console_puts() for writing a buffer to console devices.
> >
> > Also, introduce internal console flags to control which console devices
> > should be used.
> >
> > Signed-off-by: Denis Mukhin 
> > ---
> >  xen/drivers/char/console.c | 112 ++++++++++++++++++++++---------------
> >  1 file changed, 66 insertions(+), 46 deletions(-)
> >
> > diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c
> > index aaa97088aa..2618c2e47d 100644
> > --- a/xen/drivers/char/console.c
> > +++ b/xen/drivers/char/console.c
> > @@ -41,6 +41,20 @@
> >  #include 
> >  #endif
> >
> > +/* Internal console flags. */
> > +enum {
> > +    CONSOLE_SERIAL  =3D BIT(0, U),    /* Use serial device. */
> > +    CONSOLE_PV      =3D BIT(1, U),    /* Use PV console. */
> > +    CONSOLE_VIDEO   =3D BIT(2, U),    /* Use video device. */
> > +    CONSOLE_DEBUG   =3D BIT(3, U),    /* Use debug device. */
> > +    CONSOLE_RING    =3D BIT(4, U),    /* Use console ring. */
> > +    CONSOLE_DEFAULT =3D CONSOLE_SERIAL | CONSOLE_PV | CONSOLE_VIDEO |
> > +                      CONSOLE_DEBUG,
> > +    CONSOLE_ALL     =3D CONSOLE_DEFAULT | CONSOLE_RING,
> > +};
> > +
> > +static void console_puts(const char *str, size_t len, unsigned int fla=
gs);
> > +
> >  /* console: comma-separated list of console outputs. */
> >  static char __initdata opt_console[30] =3D OPT_CONSOLE_STR;
> >  string_param("console", opt_console);
> > @@ -338,8 +352,6 @@ static bool console_locks_busted;
> >
> >  static void conring_puts(const char *str, size_t len)
> >  {
> > -    ASSERT(rspin_is_locked(&console_lock));
> > -
> >      while ( len-- )
> >          conring[CONRING_IDX_MASK(conringp++)] =3D *str++;
> >
> > @@ -432,9 +444,6 @@ void console_serial_puts(const char *s, size_t nr)
> >          serial_steal_fn(s, nr);
> >      else
> >          serial_puts(sercon_handle, s, nr);
> > -
> > -    /* Copy all serial output into PV console */
> > -    pv_console_puts(s, nr);
> >  }
> >
> >  static void cf_check dump_console_ring_key(unsigned char key)
> > @@ -468,8 +477,7 @@ static void cf_check dump_console_ring_key(unsigned=
 char key)
> >          c +=3D len;
> >      }
> >
> > -    console_serial_puts(buf, sofar);
> > -    video_puts(buf, sofar);
> > +    console_puts(buf, sofar, CONSOLE_SERIAL | CONSOLE_VIDEO | CONSOLE_=
PV);
>=20
> Actually I take back the R-b. It looks like this change is breaking
> because console_puts now requires the console_lock to be held, while
> here the console_lock is not held.

Yes, the locking is wrong, thanks for the catch!
Lock adjustment from Patch 3 should be moved to Patch 2 (here).

>=20
> If I am not mistaken if you try to use the 'w' key with this patch
> applied you'll hit the ASSERT at the beginning of console_puts
>=20
>=20
> >      free_xenheap_pages(buf, order);
> >  }
> > @@ -618,11 +626,61 @@ static inline void xen_console_write_debug_port(c=
onst char *buf, size_t len)
> >  }
> >  #endif
> >
> > +static inline void console_debug_puts(const char *str, size_t len)
> > +{
> > +#ifdef CONFIG_X86
> > +    if ( opt_console_xen )
> > +    {
> > +        if ( xen_guest )
> > +            xen_hypercall_console_write(str, len);
> > +        else
> > +            xen_console_write_debug_port(str, len);
> > +    }
> > +#endif
> > +}
> > +
> > +/*
> > + * Write buffer to all enabled console devices.
> > + *
> > + * That will handle all possible scenarios working w/ console
> > + * - physical console (serial console, VGA console (x86 only));
> > + * - PV console;
> > + * - debug console (x86 only): debug I/O port or __HYPERVISOR_console_=
io
> > + *   hypercall;
> > + * - console ring.
> > + */
> > +static void console_puts(const char *str, size_t len, unsigned int fla=
gs)
> > +{
> > +    ASSERT(rspin_is_locked(&console_lock));
> > +
> > +    if ( flags & CONSOLE_SERIAL )
> > +        console_serial_puts(str, len);
> > +
> > +    if ( flags & CONSOLE_PV )
> > +        pv_console_puts(str, len);
> > +
> > +    if ( flags & CONSOLE_VIDEO )
> > +        video_puts(str, len);
> > +
> > +    if ( flags & CONSOLE_DEBUG )
> > +        console_debug_puts(str, len);
> > +
> > +    if ( flags & CONSOLE_RING )
> > +        conring_puts(str, len);
> > +}
> > +
> > +static inline void __putstr(const char *str)
> > +{
> > +    console_puts(str, strlen(str), CONSOLE_ALL);
> > +}
> > +
> >  static long guest_console_write(XEN_GUEST_HANDLE_PARAM(char) buffer,
> >                                  unsigned int count)
> >  {
> >      char kbuf[128];
> >      unsigned int kcount =3D 0;
> > +    unsigned int flags =3D opt_console_to_ring
> > +                         ? CONSOLE_ALL : CONSOLE_DEFAULT;
> >      struct domain *cd =3D current->domain;
> >
> >      while ( count > 0 )
> > @@ -640,23 +698,7 @@ static long guest_console_write(XEN_GUEST_HANDLE_P=
ARAM(char) buffer,
> >          {
> >              /* Use direct console output as it could be interactive */
> >              nrspin_lock_irq(&console_lock);
> > -
> > -            console_serial_puts(kbuf, kcount);
> > -            video_puts(kbuf, kcount);
> > -
> > -#ifdef CONFIG_X86
> > -            if ( opt_console_xen )
> > -            {
> > -                if ( xen_guest )
> > -                    xen_hypercall_console_write(kbuf, kcount);
> > -                else
> > -                    xen_console_write_debug_port(kbuf, kcount);
> > -            }
> > -#endif
> > -
> > -            if ( opt_console_to_ring )
> > -                conring_puts(kbuf, kcount);
> > -
> > +            console_puts(kbuf, kcount, flags);
> >              nrspin_unlock_irq(&console_lock);
> >          }
> >          else
> > @@ -757,28 +799,6 @@ long do_console_io(
> >   * *****************************************************
> >   */
> >
> > -static void __putstr(const char *str)
> > -{
> > -    size_t len =3D strlen(str);
> > -
> > -    ASSERT(rspin_is_locked(&console_lock));
> > -
> > -    console_serial_puts(str, len);
> > -    video_puts(str, len);
> > -
> > -#ifdef CONFIG_X86
> > -    if ( opt_console_xen )
> > -    {
> > -        if ( xen_guest )
> > -            xen_hypercall_console_write(str, len);
> > -        else
> > -            xen_console_write_debug_port(str, len);
> > -    }
> > -#endif
> > -
> > -    conring_puts(str, len);
> > -}
> > -
> >  static int printk_prefix_check(char *p, char **pp)
> >  {
> >      int loglvl =3D -1;
> > --
> > 2.34.1
> >
> >



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Message-ID: 
Date: Mon, 28 Apr 2025 08:15:38 +0200
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v1] misra: add deviation for rules 21.1 and 21.2
To: Nicola Vetrini 
Cc: Stefano Stabellini , victorm.lira@amd.com,
 Federico Serafini ,
 Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Bertrand Marquis , xen-devel@lists.xenproject.org
References: <9e1210f2a9c794d68dcc6b897239b228b141296a.1745427770.git.victorm.lira@amd.com>
 
 
 <8d65ee65-ec6f-49a3-8954-d303b08dc2df@suse.com>
 
Content-Language: en-US
From: Jan Beulich 
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On 25.04.2025 17:53, Nicola Vetrini wrote:
> On 2025-04-25 10:07, Jan Beulich wrote:
>> On 24.04.2025 23:45, Stefano Stabellini wrote:
>>> On Thu, 24 Apr 2025, Jan Beulich wrote:
>>>> On 23.04.2025 19:54, victorm.lira@amd.com wrote:
>>>>> From: Nicola Vetrini 
>>>>>
>>>>> MISRA C Rules 21.1 ("#define and #undef shall not be used on a
>>>>> reserved identifier or reserved macro name") and R21.2 ("A reserved
>>>>> identifier or reserved macro name shall not be declared") violations
>>>>> are not problematic for Xen, as it does not use the C or POSIX
>>>>> libraries.
>>>>>
>>>>> Xen uses -fno-builtin and -nostdinc to ensure this, but there are 
>>>>> still
>>>>> __builtin_* functions from the compiler that are available so
>>>>> a deviation is formulated for all identifiers not starting with
>>>>> "__builtin_".
>>>>>
>>>>> The missing text of a deviation for Rule 21.2 is added to
>>>>> docs/misra/deviations.rst.
>>>>>
>>>>> To avoid regressions, tag both rules as clean and add them to the
>>>>> monitored set.
>>>>>
>>>>> Signed-off-by: Nicola Vetrini 
>>>>> Signed-off-by: Federico Serafini 
>>>>> Signed-off-by: Victor Lira 
>>>>
>>>> While the rule is in the library section, ...
>>>>
>>>>> --- a/docs/misra/deviations.rst
>>>>> +++ b/docs/misra/deviations.rst
>>>>> @@ -587,7 +587,31 @@ Deviations related to MISRA C:2012 Rules:
>>>>>         construct is deviated only in Translation Units that present 
>>>>> a violation
>>>>>         of the Rule due to uses of this macro.
>>>>>       - Tagged as `deliberate` for ECLAIR.
>>>>> -
>>>>> +
>>>>> +   * - R21.1
>>>>> +     - Rule 21.1 reports identifiers reserved for the C and POSIX 
>>>>> standard
>>>>> +       libraries. Xen does not use such libraries and all 
>>>>> translation units
>>>>> +       are compiled with option '-nostdinc', therefore there is no 
>>>>> reason to
>>>>> +       avoid to use `#define` or `#undef` on such identifiers 
>>>>> except for those
>>>>> +       beginning with `__builtin_` for which compilers may perform 
>>>>> (wrong)
>>>>> +       optimizations.
>>>>> +     - Tagged as `safe` for ECLAIR.
>>>>
>>>> ... I'd like to ask that it be explicitly clarified here that it's 
>>>> solely
>>>> the library (and not e.g. the compiler itself) that are of concern 
>>>> here.
>>>
>>> The language can be clarified:
>>>
>>> - Rule 21.1 reports identifiers reserved for the C and POSIX standard
>>>   libraries. Xen does not use such libraries and all translation units
>>>   are compiled with option '-nostdinc', therefore there is no reason 
>>> to
>>>   avoid to use `#define` or `#undef` on C and POSIX standard libraries
>>>   identifiers except for those beginning with `__builtin_` for which
>>>   compilers may perform (wrong) optimizations.
>>
>> Which makes it more apparent that there is a gap: What about e.g. 
>> __x86_64__?
>> That falls within what the rules cover, is not a C or POSIX standard 
>> library
>> identifier, yet very clearly must not be fiddled with. Whereas the text
>> above deviates it.
> 
> that is true, even if unlikely: one approach could be to avoid deviating 
> predefined macros for all CUs as -nostdinc and -fno-builtins should take 
> care of the rest; this kind of deviation is not currently possible in 
> ECLAIR, but it might be in the future.

Is this perhaps because by "all pre-defined macros" you really mean _just_
those, and not the entire reserved (for that purpose) sub-namespace? Imo
we should not go by what a particular compiler may pre-define (we may even
overlook something if we did it this way).

Jan

> I think this could be 
> accomplished also via some gcc trickery on each CU, though I'm not sure 
> how valued that is for Xen.
> 



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Subject: Re: [PATCH v1 06/14] xen/riscv: riscv_of_processor_hartid()
 implementation
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 25.04.2025 19:07, Oleksii Kurochko wrote:
> 
> On 4/15/25 3:45 PM, Jan Beulich wrote:
>> On 15.04.2025 15:39, Oleksii Kurochko wrote:
>>> On 4/10/25 5:53 PM, Jan Beulich wrote:
>>>> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>>>>> +{
>>>>> +    const __be32 *cell;
>>>>> +    int ac;
>>>>> +    uint32_t len;
>>>>> +
>>>>> +    ac = dt_n_addr_cells(cpun);
>>>>> +    cell = dt_get_property(cpun, "reg", &len);
>>>>> +    if ( !cell || !ac || ((sizeof(*cell) * ac * (thread + 1)) > len) )
>>>>> +        return ~0ULL;
>>>> I'm sorry for my lack of DT knowledge, but what's "thread" representing here?
>>>> You only pass in 0 below, so it's unclear whether it's what one might expect
>>>> (the thread number on a multi-threaded core).
>>> Based on the DT specification alone, the|`reg`| value could refer to either a CPU or a thread ID:
>>> ```
>>> The value of reg is a  that defines a unique CPU/thread id for
>>> the CPU/threads represented by the CPU node. If a CPU supports more than one thread
>>> (i.e. multiple streams of execution) the reg prop-erty is an array with 1 element
>>> per thread.
>>> ```
>>>
>>> My understanding is that the term/thread/ was used in the Linux kernel to cover both
>>> cases.
>>> When SMT isn't supported, the CPU can be considered to have a single thread.
>>> For example, RISC-V uses the term/hardware thread/ to describe a hart (i.e., a CPU).

Note the terminology ("CPU") you used here.

>>> Interestingly, the Linux kernel always uses|thread = 0|.
>>>
>>> We could potentially drop this ambiguity and introduce an|ASSERT()| to check that
>>> the|`reg`| property contains only one entry, representing the HART (CPU) ID:
>>> ```
>>>     Software can determine the number of threads by dividing the size of reg by the parent
>>>     node’s #address-cells. If `|reg`| has more than one entry, it would simply SMT support
>>>     is required.
>>> ```
>>>
>>> Does that approach make sense, or should we stick with the current implementation?
>> If extra enabling is required to make multi-thread CPUs work, then panic()ing
>> (not so much ASSERT()ing) may make sense, for the time being. Better would be
>> if we could use all threads in a system right away.
> 
> Actually, this function is ready to be used for multi-thread CPUs. A caller can request hardware id
> by passing `thread` argument (`thread` -> the local thread number to get the hardware ID for).
> So by calling:
>   dt_get_cpu_hwid(cpu0, 0) -> it will return hardware id of thread 0 of cpu0
>   dt_get_cpu_hwid(cpu0, 1) -> it will return hardware id of thread 1 of cpu0
>   ...
> 
> In our case we assume that SMP isn't supported so that is why it is used only dt_get_cpu_hwid(cpu0, 0).
> 
> If one day, SMP will be enabled then it will be needed to change a callers of dt_get_cpu_hwid().

I assume you meant SMT in both places you wrote SMP? But my main point here is:
If enumeration gives you "thread  of core " (using x86 terminology), you
need to be quite careful with what you call "CPU". Things need to be entirely
unambiguous, taking into account what internally in (common code) Xen we call a
"CPU". You certainly may call "CPU" what is a collection of threads / harts,
but you then need to clarify this in a prominent comment somewhere, and you
need to be entirely consistent throughout the RISC-V sub-tree.

Jan


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Date: Mon, 28 Apr 2025 08:35:50 +0200
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Subject: Re: [PATCH v1 10/14] xen/riscv: implementation of aplic and imsic
 operations
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Romain Caritey , xen-devel@lists.xenproject.org
References: 
 <74a07ed7c596bbcf581010685e01bfdfa19164f5.1744126720.git.oleksii.kurochko@gmail.com>
 <3426df1b-938a-4d20-a533-dd6695473db0@suse.com>
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On 25.04.2025 21:31, Oleksii Kurochko wrote:
> 
> On 4/22/25 9:02 AM, Jan Beulich wrote:
>> On 18.04.2025 12:43, Oleksii Kurochko wrote:
>>> On 4/15/25 4:53 PM, Jan Beulich wrote:
>>>> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>>>>> --- a/xen/arch/riscv/imsic.c
>>>>> +++ b/xen/arch/riscv/imsic.c
>>>>> @@ -14,12 +14,68 @@
>>>>>    #include 
>>>>>    #include 
>>>>>    #include 
>>>>> +#include 
>>>>>    #include 
>>>>>    
>>>>>    #include 
>>>>>    
>>>>>    static struct imsic_config imsic_cfg;
>>>>>    
>>>>> +#define imsic_csr_set(c, v)     \
>>>>> +do {                            \
>>>>> +    csr_write(CSR_SISELECT, c); \
>>>>> +    csr_set(CSR_SIREG, v);      \
>>>>> +} while (0)
>>>>> +
>>>>> +#define imsic_csr_clear(c, v)   \
>>>>> +do {                            \
>>>>> +    csr_write(CSR_SISELECT, c); \
>>>>> +    csr_clear(CSR_SIREG, v);    \
>>>>> +} while (0)
>>>> Coming back to these (the later patch adds one more here): How expensive are
>>>> these CSR writes? IOW would it perhaps make sense to maintain a local cache
>>>> of the last written SISELECT value, to avoid writing the same one again if
>>>> the same windowed register needs accessing twice in a row?
>>> CSRs belong to the HART, so access to them is very fast.
>> Can you back this by any data? I view CSRs as somewhat similar to x86'es MSRs,
>> and access (writes in particular) to some of them is rather slow.
> 
> CSR read 1 cycle, CSR write 7 cycles on Microchip platform. ~ Oleksii

And that's an in-order platform, i.e. cycle count being all that matters for
performance? No other (e.g. latency) effect on subsequent insns?

Further, how does this compare to the outlined alternative, especially if we
assumed that the respective cacheline would be hot and hence usually in L1
cache?

Jan


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Date: Mon, 28 Apr 2025 08:41:40 +0200
MIME-Version: 1.0
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Subject: Re: [RFC 33/38] x86/boot: refactor bzimage parser to be re-enterant
To: "Daniel P. Smith" 
Cc: stefano.stabellini@amd.com, agarciav@amd.com,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Jason Andryuk , xen-devel@lists.xenproject.org
References: <20250419220820.4234-1-dpsmith@apertussolutions.com>
 <20250419220820.4234-34-dpsmith@apertussolutions.com>
 
 
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From: Jan Beulich 
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On 26.04.2025 03:53, Daniel P. Smith wrote:
> On 4/23/25 15:27, Jason Andryuk wrote:
>> On 2025-04-19 18:08, Daniel P. Smith wrote:
>>> The bzimage logic uses the unit global orig_image_len to hold the 
>>> original
>>> module length for the kernel when the headroom is calculated. It then 
>>> uses
>>> orig_image_len to locate the start of the bzimage when the expansion 
>>> is done.
>>> This is an issue when more than one bzimage is processed by the headroom
>>> calculation logic, as it will leave orig_image_len set to the length 
>>> of the
>>> last bzimage it processed.
>>>
>>> The boot module work introduced storing the headroom size on a per module
>>> basis. By passing in the headroom from the boot module, orig_image_len 
>>> is no
>>> longer needed to locate the beginning of the bzimage after the allocated
>>> headroom. The bzimage functions are reworked as such, allowing the 
>>> removal of
>>> orig_image_len and enabling them to be reused by multiple kernel boot 
>>> modules.
>>>
>>> Signed-off-by: Daniel P. Smith 
>>> ---
>>>   xen/arch/x86/bzimage.c             | 38 ++++++++++++++++++------------
>>>   xen/arch/x86/hvm/dom_build.c       |  3 ++-
>>>   xen/arch/x86/include/asm/bzimage.h |  5 ++--
>>>   xen/arch/x86/pv/dom0_build.c       |  3 ++-
>>>   4 files changed, 30 insertions(+), 19 deletions(-)
>>>
>>> diff --git a/xen/arch/x86/bzimage.c b/xen/arch/x86/bzimage.c
>>> index 66f648f311e4..32f0360d25b4 100644
>>
>>> @@ -103,13 +100,20 @@ unsigned long __init bzimage_headroom(void 
>>> *image_start,
>>>       return headroom;
>>>   }
>>> -int __init bzimage_parse(void *image_base, void **image_start,
>>> -                         unsigned long *image_len)
>>> +int __init bzimage_parse(
>>> +    void *image_base, void **image_start, unsigned long headroom,
>>> +    unsigned long *image_len)
>>>   {
>>>       struct setup_header *hdr = (struct setup_header *)(*image_start);
>>>       int err = bzimage_check(hdr, *image_len);
>>> -    unsigned long output_len;
>>> -
>>> +    unsigned long module_len = *image_len;
>>> +
>>> +    /*
>>> +     * Variable err will have one of three values:
>>> +     *   -  < 0: a error occurred trying to inspect the contents
>>> +     *   -  > 0: the image is a bzImage
>>> +     *   - == 0: not a bzImage, could be raw elf or elf.gz (vmlinuz.gz)
>>> +     */
>>
>> This comment seems a little independent of this change, so maybe it 
>> should be submitted separately.  Also, I think a better placement would 
>> be next to bzimage_check().
>>
>>>       if ( err < 0 )
>>>           return err;
>>> @@ -118,21 +122,25 @@ int __init bzimage_parse(void *image_base, void 
>>> **image_start,
>>>           *image_start += (hdr->setup_sects + 1) * 512 + hdr- 
>>>> payload_offset;
>>>           *image_len = hdr->payload_length;
>>
>> @here
>>
>>>       }
>>> -
>>> -    if ( elf_is_elfbinary(*image_start, *image_len) )
>>> -        return 0;
>>> +    else
>>> +    {
>>> +        if ( elf_is_elfbinary(*image_start, *image_len) )
>>> +            return 0;
>>> +        else
>>> +            *image_len = *image_len - headroom;
>>> +    }
>>
>> I don't like this extra indention which includes the return.  If you 
>> retain orig_image_len as a local variable, and set it above at "@here", 
>> you can have a smaller diff and leave cleaner logic.
> 
> Right, but I find it sillier to be checking every kernel for elf when we 
> know it's a bzImage. While the elf check is fairly simplistic, it is 
> still multiple value checks.

Even without any extra local vars the above can be

    else if ( elf_is_elfbinary(*image_start, *image_len) )
        return 0;
    else
        *image_len = *image_len - headroom;

which would already address the "extra indentation" aspect.

Jan


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Date: Mon, 28 Apr 2025 08:47:01 +0200
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Subject: Re: [PATCH v1 1/3] xen/console: cleanup conring management
To: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com,
 anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com,
 roger.pau@citrix.com, dmukhin@ford.com,
 Stefano Stabellini 
References: <20250403000604.169619-1-dmukhin@ford.com>
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On 26.04.2025 00:18, Stefano Stabellini wrote:
> On Thu, 3 Apr 2025, dmkhn@proton.me wrote:
>> From: Denis Mukhin 
>>
>> Move console_locks_busted handling inside conring_puts() to remove
>> tasklet code duplication.
>>
>> Signed-off-by: Denis Mukhin 
> 
> This patch is a good cleanup but makes one functional change: previously
> guest_console_write would always call tasklet_schedule. Now, it only
> calls tasklet_schedule if !console_locks_busted.
> 
> On ARM, we don't call console_force_unlock and never set
> console_locks_busted. It makes no difference.
> 
> On x86, there are a few callers of console_force_unlock, so it would
> make a difference. However, looking at the callers, it seems to me that
> the change is for the better and better aligns the code with the
> intention behind console_force_unlock.

Denis, I see you submitted v2 without any adjustment to the description.
With Stefano having pointed out the aspect, it should have been pretty
clear that such a (kind of hidden) functional change wants justifying.

Furthermore, you added Stefano's R-b without any hint towards the extra
request he had put up above wrt x86.

Jan


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Subject: Re: [PATCH v2 1/3] xen/console: cleanup conring management
To: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org,
 michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org,
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On 26.04.2025 20:50, dmkhn@proton.me wrote:
> From: Denis Mukhin 
> 
> Move console_locks_busted handling inside conring_puts() to remove
> tasklet code duplication.
> 
> Signed-off-by: Denis Mukhin 
> Reviewed-by: Stefano Stabellini 
> ---
> Changes v1->v2:
> - added Stefano's R-b
> ---
>  xen/drivers/char/console.c | 29 ++++++++++++++---------------
>  1 file changed, 14 insertions(+), 15 deletions(-)
> 
> diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c
> index c3150fbdb7..aaa97088aa 100644
> --- a/xen/drivers/char/console.c
> +++ b/xen/drivers/char/console.c
> @@ -325,6 +325,17 @@ static void cf_check do_dec_thresh(unsigned char key, bool unused)
>   * ********************************************************
>   */
>  
> +static void cf_check notify_dom0_con_ring(void *unused)
> +{
> +    send_global_virq(VIRQ_CON_RING);
> +}
> +
> +static DECLARE_SOFTIRQ_TASKLET(notify_dom0_con_ring_tasklet,
> +                               notify_dom0_con_ring,
> +                               NULL);
> +
> +static bool console_locks_busted;
> +
>  static void conring_puts(const char *str, size_t len)
>  {
>      ASSERT(rspin_is_locked(&console_lock));
> @@ -334,6 +345,9 @@ static void conring_puts(const char *str, size_t len)
>  
>      if ( conringp - conringc > conring_size )
>          conringc = conringp - conring_size;
> +
> +    if ( !console_locks_busted )
> +        tasklet_schedule(¬ify_dom0_con_ring_tasklet);
>  }

As before I'm unconvinced it is a good idea to have tasklet scheduling here.
You also didn't address that v1 comment of mine verbally, iirc.

Jan


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Date: Mon, 28 Apr 2025 08:58:31 +0200
From: Ingo Molnar 
To: Linus Torvalds 
Cc: Andrew Cooper ,
	Arnd Bergmann , Arnd Bergmann ,
	Thomas Gleixner ,
	Ingo Molnar , Borislav Petkov ,
	Dave Hansen , x86@kernel.org,
	"H. Peter Anvin" , Juergen Gross ,
	Boris Ostrovsky ,
	Alexander Usyskin ,
	Greg Kroah-Hartman ,
	Mateusz =?utf-8?Q?Jo=C5=84czyk?= ,
	Mike Rapoport , Ard Biesheuvel ,
	Peter Zijlstra , linux-kernel@vger.kernel.org,
	xen-devel@lists.xenproject.org
Subject: [PATCH] bitops/32: Convert variable_ffs() and fls() zero-case
 handling to C
Message-ID: 
References: <20250425141740.734030-1-arnd@kernel.org>
 
 
 
 
 
 
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* Linus Torvalds  wrote:

> On Sun, 27 Apr 2025 at 12:17, Andrew Cooper  wrote:
> >
> > ffs/fls are commonly found inside loops where x is the loop condition
> > too.  Therefore, using statically_true() to provide a form without the
> > zero compatibility turns out to be a win.
> 
> We already have the version without the zero capability - it's just
> called "__ffs()" and "__fls()", and performance-critical code uses
> those.
> 
> So fls/ffs are the "standard" library functions that have to handle
> zero, and add that stupid "+1" because that interface was designed by
> some Pascal person who doesn't understand that we start counting from
> 0.
> 
> Standards bodies: "companies aren't sending their best people".
> 
> But it's silly that we then spend effort on magic cmov in inline asm
> on those things when it's literally the "don't use this version unless
> you don't actually care about performance" case.
> 
> I don't think it would be wrong to just make the x86-32 code just do
> the check against zero ahead of time - in C.
> 
> And yes, that will generate some extra code - you'll test for zero
> before, and then the caller might also test for a zero result that
> then results in another test for zero that can't actually happen (but
> the compiler doesn't know that). But I suspect that on the whole, it
> is likely to generate better code anyway just because the compiler
> sees that first test and can DTRT.
> 
> UNTESTED patch applied in case somebody wants to play with this. It
> removes 10 lines of silly code, and along with them that 'cmov' use.
> 
> Anybody?

Makes sense - it seems to boot here, but I only did some very light 
testing.

There's a minor text size increase on x86-32 defconfig, GCC 14.2.0:

      text       data        bss         dec        hex    filename
  16577728    7598826    1744896    25921450    18b87aa    vmlinux.before
  16577908    7598838    1744896    25921642    18b886a    vmlinux.after

bloatometer output:

  add/remove: 2/1 grow/shrink: 201/189 up/down: 5681/-3486 (2195)

Patch with changelog and your SOB added attached. Does it look good to 
you?

Thanks,

	Ingo

================>
From: Linus Torvalds 
Date: Mon, 28 Apr 2025 08:38:35 +0200
Subject: [PATCH] bitops/32: Convert variable_ffs() and fls() zero-case handling to C

Don't do the complicated and probably questionable BS*L+CMOVZL
asm() optimization in variable_ffs() and fls(): performance-critical
code is already using __ffs() and __fls() that use sane interfaces
close to the machine instruction ABI. Check ahead for zero in C.

There's a minor text size increase on x86-32 defconfig:

      text       data        bss         dec        hex    filename
  16577728    7598826    1744896    25921450    18b87aa    vmlinux.before
  16577908    7598838    1744896    25921642    18b886a    vmlinux.after

bloatometer output:

  add/remove: 2/1 grow/shrink: 201/189 up/down: 5681/-3486 (2195)

Signed-off-by: Linus Torvalds 
Signed-off-by: Ingo Molnar 
---
 arch/x86/include/asm/bitops.h | 22 ++++++----------------
 1 file changed, 6 insertions(+), 16 deletions(-)

diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h
index 100413aff640..6061c87f14ac 100644
--- a/arch/x86/include/asm/bitops.h
+++ b/arch/x86/include/asm/bitops.h
@@ -321,15 +321,10 @@ static __always_inline int variable_ffs(int x)
 	asm("bsfl %1,%0"
 	    : "=r" (r)
 	    : ASM_INPUT_RM (x), "0" (-1));
-#elif defined(CONFIG_X86_CMOV)
-	asm("bsfl %1,%0\n\t"
-	    "cmovzl %2,%0"
-	    : "=&r" (r) : "rm" (x), "r" (-1));
 #else
-	asm("bsfl %1,%0\n\t"
-	    "jnz 1f\n\t"
-	    "movl $-1,%0\n"
-	    "1:" : "=r" (r) : "rm" (x));
+	if (!x)
+		return 0;
+	asm("bsfl %1,%0" : "=r" (r) : "rm" (x));
 #endif
 	return r + 1;
 }
@@ -378,15 +373,10 @@ static __always_inline int fls(unsigned int x)
 	asm("bsrl %1,%0"
 	    : "=r" (r)
 	    : ASM_INPUT_RM (x), "0" (-1));
-#elif defined(CONFIG_X86_CMOV)
-	asm("bsrl %1,%0\n\t"
-	    "cmovzl %2,%0"
-	    : "=&r" (r) : "rm" (x), "rm" (-1));
 #else
-	asm("bsrl %1,%0\n\t"
-	    "jnz 1f\n\t"
-	    "movl $-1,%0\n"
-	    "1:" : "=r" (r) : "rm" (x));
+	if (!x)
+		return 0;
+	asm("bsrl %1,%0" : "=r" (r) : "rm" (x));
 #endif
 	return r + 1;
 }


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Date: Mon, 28 Apr 2025 09:00:22 +0200
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v2] x86/hyperv: use dynamically allocated page for
 hypercalls
To: Ariadne Conill 
Cc: Paul Durrant , Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Alejandro Vallejo ,
 "Alexander M . Merritt" , xen-devel@lists.xenproject.org
References: <20250425234331.65875-1-ariadne@ariadne.space>
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Content-Transfer-Encoding: 7bit

On 26.04.2025 01:43, Ariadne Conill wrote:
> Previously Xen placed the hypercall page at the highest possible MFN,
> but this caused problems on systems where there is more than 36 bits
> of physical address space.
> 
> In general, it also seems unreliable to assume that the highest possible
> MFN is not already reserved for some other purpose.
> 
> Changes from v1:
> - Continue to use fixmap infrastructure
> - Use panic in Hyper-V setup() function instead of returning -ENOMEM
>   on hypercall page allocation failure

Nit: This part wants to go ...

> Fixes: 620fc734f854 ("x86/hyperv: setup hypercall page")
> Cc: Alejandro Vallejo 
> Cc: Alexander M. Merritt 
> Signed-off-by: Ariadne Conill 
> ---

... somewhere below such a separator.

> --- a/xen/arch/x86/guest/hyperv/hyperv.c
> +++ b/xen/arch/x86/guest/hyperv/hyperv.c
> @@ -98,7 +98,13 @@ static void __init setup_hypercall_page(void)
>      rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
>      if ( !hypercall_msr.enable )
>      {
> -        mfn = HV_HCALL_MFN;
> +        void *hcall_page = alloc_xenheap_page();
> +        if ( !hcall_page )

Nit (style): Blank line please between declaration(s) and statement(s). (Both
can probably be taken care of upon committing if no other need for a v3 arises.)

Jan


From xen-devel-bounces@lists.xenproject.org Mon Apr 28 07:05:29 2025
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Date: Mon, 28 Apr 2025 09:05:12 +0200
From: Ingo Molnar 
To: Linus Torvalds 
Cc: Andrew Cooper ,
	Arnd Bergmann , Arnd Bergmann ,
	Thomas Gleixner ,
	Ingo Molnar , Borislav Petkov ,
	Dave Hansen , x86@kernel.org,
	"H. Peter Anvin" , Juergen Gross ,
	Boris Ostrovsky ,
	Alexander Usyskin ,
	Greg Kroah-Hartman ,
	Mateusz =?utf-8?Q?Jo=C5=84czyk?= ,
	Mike Rapoport , Ard Biesheuvel ,
	Peter Zijlstra , linux-kernel@vger.kernel.org,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH] bitops/32: Convert variable_ffs() and fls() zero-case
 handling to C
Message-ID: 
References: <20250425141740.734030-1-arnd@kernel.org>
 
 
 
 
 
 
 
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* Ingo Molnar  wrote:

> > UNTESTED patch applied in case somebody wants to play with this. It
> > removes 10 lines of silly code, and along with them that 'cmov' use.
> > 
> > Anybody?
> 
> Makes sense - it seems to boot here, but I only did some very light 
> testing.
> 
> There's a minor text size increase on x86-32 defconfig, GCC 14.2.0:
> 
>       text       data        bss         dec        hex    filename
>   16577728    7598826    1744896    25921450    18b87aa    vmlinux.before
>   16577908    7598838    1744896    25921642    18b886a    vmlinux.after
> 
> bloatometer output:
> 
>   add/remove: 2/1 grow/shrink: 201/189 up/down: 5681/-3486 (2195)

And once we remove 486, I think we can do the optimization below to 
just assume the output doesn't get clobbered by BS*L in the zero-case, 
right?

In the text size space it's a substantial optimization on x86-32 
defconfig:

        text	   data	       bss	     dec	    hex	filename
  16,577,728    7598826    1744896      25921450        18b87aa vmlinux.vanilla      # CMOV+BS*L
  16,577,908	7598838	   1744896	25921642	18b886a	vmlinux.linus_patch  # if()+BS*L
  16,573,568	7602922	   1744896	25921386	18b876a	vmlinux.noclobber    # BS*L

Thanks,

	Ingo

---
 arch/x86/include/asm/bitops.h | 20 ++------------------
 1 file changed, 2 insertions(+), 18 deletions(-)

diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h
index 6061c87f14ac..e3e94a806656 100644
--- a/arch/x86/include/asm/bitops.h
+++ b/arch/x86/include/asm/bitops.h
@@ -308,24 +308,16 @@ static __always_inline int variable_ffs(int x)
 {
 	int r;
 
-#ifdef CONFIG_X86_64
 	/*
 	 * AMD64 says BSFL won't clobber the dest reg if x==0; Intel64 says the
 	 * dest reg is undefined if x==0, but their CPU architect says its
 	 * value is written to set it to the same as before, except that the
 	 * top 32 bits will be cleared.
-	 *
-	 * We cannot do this on 32 bits because at the very least some
-	 * 486 CPUs did not behave this way.
 	 */
 	asm("bsfl %1,%0"
 	    : "=r" (r)
 	    : ASM_INPUT_RM (x), "0" (-1));
-#else
-	if (!x)
-		return 0;
-	asm("bsfl %1,%0" : "=r" (r) : "rm" (x));
-#endif
+
 	return r + 1;
 }
 
@@ -360,24 +352,16 @@ static __always_inline int fls(unsigned int x)
 	if (__builtin_constant_p(x))
 		return x ? 32 - __builtin_clz(x) : 0;
 
-#ifdef CONFIG_X86_64
 	/*
 	 * AMD64 says BSRL won't clobber the dest reg if x==0; Intel64 says the
 	 * dest reg is undefined if x==0, but their CPU architect says its
 	 * value is written to set it to the same as before, except that the
 	 * top 32 bits will be cleared.
-	 *
-	 * We cannot do this on 32 bits because at the very least some
-	 * 486 CPUs did not behave this way.
 	 */
 	asm("bsrl %1,%0"
 	    : "=r" (r)
 	    : ASM_INPUT_RM (x), "0" (-1));
-#else
-	if (!x)
-		return 0;
-	asm("bsrl %1,%0" : "=r" (r) : "rm" (x));
-#endif
+
 	return r + 1;
 }
 



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Date: Mon, 28 Apr 2025 09:14:00 +0200
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Subject: Re: [PATCH] xen/x86: allow Dom0 PVH to call XENMEM_exchange
To: Stefano Stabellini ,
 "Ragiadakou, Xenia" 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 jason.andryuk@amd.com, agarciav@amd.com, xen-devel@lists.xenproject.org
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From: Jan Beulich 
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On 25.04.2025 22:19, Stefano Stabellini wrote:
> From: Xenia Ragiadakou 
> 
> Dom0 PVH might need XENMEM_exchange when passing contiguous memory
> addresses to firmware or co-processors not behind an IOMMU.

I definitely don't understand the firmware part: It's subject to the
same transparent P2M translations as the rest of the VM; it's just
another piece of software running there.

"Co-processors not behind an IOMMU" is also interesting; a more
concrete scenario might be nice, yet I realize you may be limited in
what you're allowed to say.

> XENMEM_exchange was blocked for HVM/PVH DomUs, and accidentally it
> impacted Dom0 PVH as well.

This wasn't accidental at all, I don't think.

> --- a/xen/arch/x86/mm.c
> +++ b/xen/arch/x86/mm.c
> @@ -4401,7 +4401,7 @@ int steal_page(
>      const struct domain *owner;
>      int rc;
>  
> -    if ( paging_mode_external(d) )
> +    if ( paging_mode_external(d) && !is_hardware_domain(d) )
>          return -EOPNOTSUPP;
>  
>      /* Grab a reference to make sure the page doesn't change under our feet */

Is this (in particular the code following below here) a safe thing to do
when we don't properly refcount page references from the P2M, yet? It's
Dom0, yes, but even there I might see potential security implications (as
top violating privacy of a guest).

Furthermore cleanup_page_mappings() (called later in the function) has a
PV-only aspect which would apparently need widening to PVH Dom0 then,
too.

> --- a/xen/common/memory.c
> +++ b/xen/common/memory.c
> @@ -794,7 +794,7 @@ static long memory_exchange(XEN_GUEST_HANDLE_PARAM(xen_memory_exchange_t) arg)
>              rc = guest_physmap_add_page(d, _gfn(gpfn), mfn,
>                                          exch.out.extent_order) ?: rc;
>  
> -            if ( !paging_mode_translate(d) &&
> +            if ( (!paging_mode_translate(d) || is_hardware_domain(d)) &&
>                   __copy_mfn_to_guest_offset(exch.out.extent_start,
>                                              (i << out_chunk_order) + j,
>                                              mfn) )

Wait, no: A PVH domain (Dom0 or not) can't very well make use of MFNs, can
it?

Jan


From xen-devel-bounces@lists.xenproject.org Mon Apr 28 07:14:52 2025
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Date: Mon, 28 Apr 2025 09:14:40 +0200
From: Ingo Molnar 
To: Linus Torvalds 
Cc: Andrew Cooper ,
	Arnd Bergmann , Arnd Bergmann ,
	Thomas Gleixner ,
	Ingo Molnar , Borislav Petkov ,
	Dave Hansen , x86@kernel.org,
	"H. Peter Anvin" , Juergen Gross ,
	Boris Ostrovsky ,
	Alexander Usyskin ,
	Greg Kroah-Hartman ,
	Mateusz =?utf-8?Q?Jo=C5=84czyk?= ,
	Mike Rapoport , Ard Biesheuvel ,
	Peter Zijlstra , linux-kernel@vger.kernel.org,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH] bitops/32: Convert variable_ffs() and fls() zero-case
 handling to C
Message-ID: 
References: <20250425141740.734030-1-arnd@kernel.org>
 
 
 
 
 
 
 
 
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In-Reply-To: 


* Ingo Molnar  wrote:

> And once we remove 486, I think we can do the optimization below to 
> just assume the output doesn't get clobbered by BS*L in the 
> zero-case, right?
> 
> In the text size space it's a substantial optimization on x86-32 
> defconfig:
> 
>         text	   data	       bss	     dec	    hex	filename
>   16,577,728    7598826    1744896      25921450        18b87aa vmlinux.vanilla      # CMOV+BS*L
>   16,577,908	7598838	   1744896	25921642	18b886a	vmlinux.linus_patch  # if()+BS*L
>   16,573,568	7602922	   1744896	25921386	18b876a	vmlinux.noclobber    # BS*L

And BTW, *that* is a price that all of non-486 x86-32 was paying for 
486 support...

And, just out of intellectual curiosity, I also tried to measure the 
code generation price of the +1 standards-quirk in the fls()/ffs() 
interface as well:

         text	   data	       bss	     dec	    hex	filename
   16,577,728   7598826    1744896      25921450        18b87aa vmlinux.vanilla      # CMOV+BS*L
   16,577,908	7598838	   1744896	25921642	18b886a	vmlinux.linus_patch  # if()+BS*L
   16,573,568	7602922	   1744896	25921386	18b876a	vmlinux.noclobber    # BS*L
   ..........
   16,573,552	7602922	   1744896	25921370	18b875a	vmlinux.broken       # BROKEN: 0 baseline instead of 1

... and unless I messed up the patch, it seems to have a surprisingly 
low impact - maybe because the compiler can amortize its cost by 
adjusting all dependent code mostly at build time, so the +1 doesn't 
end up being generated most of the time?

Thanks,

	Ingo

===============================>

This broken patch is broken: it intentionally breaks the ffs()/fls() 
interface in an attempt to measure the code generation effects of 
interface details.

NOT-Signed-off-by: 
---
 arch/x86/include/asm/bitops.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h
index e3e94a806656..21707696bafe 100644
--- a/arch/x86/include/asm/bitops.h
+++ b/arch/x86/include/asm/bitops.h
@@ -318,7 +318,7 @@ static __always_inline int variable_ffs(int x)
 	    : "=r" (r)
 	    : ASM_INPUT_RM (x), "0" (-1));
 
-	return r + 1;
+	return r;
 }
 
 /**
@@ -362,7 +362,7 @@ static __always_inline int fls(unsigned int x)
 	    : "=r" (r)
 	    : ASM_INPUT_RM (x), "0" (-1));
 
-	return r + 1;
+	return r;
 }
 
 /**


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Subject: Re: [PATCH v1 1/3] x86: x86_emulate: address violations of MISRA C
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To: victorm.lira@amd.com
Cc: Nicola Vetrini ,
 Federico Serafini ,
 Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 26.04.2025 01:42, victorm.lira@amd.com wrote:
> From: Nicola Vetrini 
> 
> Rule 19.1 states: "An object shall not be assigned or copied
> to an overlapping object". Since the "call" and "compat_call" are

Was this taken from patch 2 without editing?

> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
> @@ -526,9 +526,19 @@ static inline void put_loop_count(
>           */                                                             \
>          if ( !amd_like(ctxt) && mode_64bit() && ad_bytes == 4 )         \
>          {                                                               \
> +            uint64_t tmp;                                               \
> +                                                                        \
>              _regs.r(cx) = 0;                                            \
> -            if ( extend_si ) _regs.r(si) = _regs.esi;                   \
> -            if ( extend_di ) _regs.r(di) = _regs.edi;                   \
> +            if ( extend_si )                                            \
> +            {                                                           \
> +                tmp = _regs.esi;                                        \
> +                _regs.r(si) = tmp;                                      \
> +            }                                                           \
> +            if ( extend_di )                                            \
> +            {                                                           \
> +                tmp = _regs.edi;                                        \
> +                _regs.r(di) = tmp;                                      \
> +            }                                                           \

See commit 7225f13aef03 for how we chose to address similar issues elsewhere
in the emulator. I think we want to be consistent there. This will then also
eliminate ...

> @@ -2029,7 +2039,12 @@ x86_emulate(
>          switch ( op_bytes )
>          {
>          case 2: _regs.ax = (int8_t)_regs.ax; break; /* cbw */
> -        case 4: _regs.r(ax) = (uint32_t)(int16_t)_regs.ax; break; /* cwde */
> +        case 4:
> +            {
> +                uint32_t tmp = (uint32_t)(int16_t)_regs.ax;
> +                _regs.r(ax) = tmp;
> +                break; /* cwde */
> +            }

... the odd brace placement here, as well as the inconsistency in the types
you used for the temporary variables (both really could have been unsigned
int; no need for a fixed-width type).

Jan


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Subject: Re: [PATCH v1 2/3] compat: address violations of MISRA C Rule 19.1
To: victorm.lira@amd.com, Nicola Vetrini 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Federico Serafini ,
 Bertrand Marquis , xen-devel@lists.xenproject.org
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On 26.04.2025 01:42, victorm.lira@amd.com wrote:
> From: Nicola Vetrini 
> 
> Rule 19.1 states: "An object shall not be assigned or copied
> to an overlapping object". Since the "call" and "compat_call" are
> fields of the same union, reading from one member and writing to
> the other violates the rule, while not causing Undefined Behavior
> due to their relative sizes. However, a dummy variable is used to
> address the violation and prevent the future possibility of
> incurring in UB.

If there is such a concern, ...

> --- a/xen/common/compat/multicall.c
> +++ b/xen/common/compat/multicall.c
> @@ -15,8 +15,13 @@ typedef int ret_t;
>  static inline void xlat_multicall_entry(struct mc_state *mcs)
>  {
>      int i;
> +    xen_ulong_t arg;
> +
>      for (i=0; i<6; i++)
> -        mcs->compat_call.args[i] = mcs->call.args[i];
> +    {
> +        arg = mcs->call.args[i];
> +        mcs->compat_call.args[i] = arg;
> +    }
>  }

... wouldn't it be of concern as well that the alternating parts of
the union are still accessed in a flip-flop manner? IOW we continue to
rely on the relative placement properties of the individual array
elements. To eliminate such a concern, I think the resulting code would
also want to be correct if iteration was swapped to work downwards.

Also the scope of the temporary could certainly be the loop body rather
than the entire function. I also don't think it needs to be xen_ulong_t,
but maybe using unsigned int instead wouldn't make a difference in
generated code.

Jan


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Date: Mon, 28 Apr 2025 09:43:42 +0200
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Subject: Re: [PATCH v1 1/2] xen/page_alloc: address violation of Rule 14.3
To: victorm.lira@amd.com, Federico Serafini 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Nicola Vetrini ,
 Bertrand Marquis , xen-devel@lists.xenproject.org
References: <5f2e316aae4667d1fe851e68552eb881c4d5a015.1745625477.git.victorm.lira@amd.com>
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From: Jan Beulich 
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On 26.04.2025 02:00, victorm.lira@amd.com wrote:
> From: Federico Serafini 
> 
> MISRA C Rule 14.3 states that "Controlling expressions shall not be
> invariant".
> 
> Add a SAF comment to deviate the rule for build configurations without
> CONFIG_LLC_COLORING enabled.

I was surprised by this supposedly being the only violation. And indeed it
wasn't very hard to find more. For example, we have a number of
"while ( num_online_cpus() > 1 && ... )", which become compile-time
constant (false) when NR_CPUS=1.

> --- a/xen/common/page_alloc.c
> +++ b/xen/common/page_alloc.c
> @@ -2038,6 +2038,7 @@ static struct page_info *alloc_color_heap_page(unsigned int memflags,
> 
>      spin_lock(&heap_lock);
> 
> +    /* SAF-14-safe MISRA C R14.3 condition always false without LLC_COLORING */
>      for ( i = 0; i < domain_num_llc_colors(d); i++ )
>      {
>          unsigned long free = free_colored_pages[domain_llc_color(d, i)];

Hmm, this way the deviation applies even when LLC_COLORING=y.

As to the comment wording - looks like we're pretty inconsistent with that
right now. I, for one, don't think the Misra rule needs (re)stating there;
the SAF index points at all the data that's needed if one cares about the
specifics of the deviation.

Jan


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Date: Mon, 28 Apr 2025 10:03:42 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: "xen-devel@lists.xenproject.org" ,
	Andrew Cooper ,
	Marek Marczykowski 
Subject: Re: [PATCH v2] x86: constrain sub-page access length in
 mmio_ro_emulated_write()
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References: <8e31896e-3603-4969-af7c-3175ceacff55@suse.com>
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On Fri, Apr 25, 2025 at 04:57:18PM +0200, Jan Beulich wrote:
> Without doing so we could trigger the ASSERT_UNREACHABLE() in
> subpage_mmio_write_emulate(). A comment there actually says this
> validation would already have been done ...
> 
> Fixes: 8847d6e23f97 ("x86/mm: add API for marking only part of a MMIO page read only")
> Signed-off-by: Jan Beulich 

Reviewed-by: Roger Pau Monné 

> ---
> v2: Emit a warning message otherwise.
> 
> --- a/xen/arch/x86/mm.c
> +++ b/xen/arch/x86/mm.c
> @@ -5195,8 +5195,13 @@ int cf_check mmio_ro_emulated_write(
>          return X86EMUL_UNHANDLEABLE;
>      }
>  
> -    subpage_mmio_write_emulate(mmio_ro_ctxt->mfn, PAGE_OFFSET(offset),
> -                               p_data, bytes);
> +    if ( bytes <= 8 )
> +        subpage_mmio_write_emulate(mmio_ro_ctxt->mfn, PAGE_OFFSET(offset),
> +                                   p_data, bytes);
> +    else if ( subpage_mmio_find_page(mmio_ro_ctxt->mfn) )
> +        gprintk(XENLOG_WARNING,
> +                "unsupported %u-byte write to R/O MMIO 0x%"PRI_mfn"%03lx\n",
> +                bytes, mfn_x(mmio_ro_ctxt->mfn), PAGE_OFFSET(offset));

It feels more natural to me to use:

"unsupported %u-byte write to r/o MMIO %#lx\n",
bytes, mfn_to_maddr(mmio_ro_ctxt->mfn) + PAGE_OFFSET(offset)

As it simplifies the printf format string, but that's just my taste.

Thanks, Roger.


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MIME-Version: 1.0
Date: Mon, 28 Apr 2025 10:09:31 +0200
From: Nicola Vetrini 
To: Jan Beulich 
Cc: Stefano Stabellini , victorm.lira@amd.com,
 Federico Serafini , Andrew Cooper
 , Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Bertrand Marquis
 , xen-devel@lists.xenproject.org
Subject: Re: [PATCH v1] misra: add deviation for rules 21.1 and 21.2
In-Reply-To: 
References: <9e1210f2a9c794d68dcc6b897239b228b141296a.1745427770.git.victorm.lira@amd.com>
 
 
 <8d65ee65-ec6f-49a3-8954-d303b08dc2df@suse.com>
 
 
Message-ID: <4d21245edbd4949a0aec6ecdadea437c@bugseng.com>
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On 2025-04-28 08:15, Jan Beulich wrote:
> On 25.04.2025 17:53, Nicola Vetrini wrote:
>> On 2025-04-25 10:07, Jan Beulich wrote:
>>> On 24.04.2025 23:45, Stefano Stabellini wrote:
>>>> On Thu, 24 Apr 2025, Jan Beulich wrote:
>>>>> On 23.04.2025 19:54, victorm.lira@amd.com wrote:
>>>>>> From: Nicola Vetrini 
>>>>>> 
>>>>>> MISRA C Rules 21.1 ("#define and #undef shall not be used on a
>>>>>> reserved identifier or reserved macro name") and R21.2 ("A 
>>>>>> reserved
>>>>>> identifier or reserved macro name shall not be declared") 
>>>>>> violations
>>>>>> are not problematic for Xen, as it does not use the C or POSIX
>>>>>> libraries.
>>>>>> 
>>>>>> Xen uses -fno-builtin and -nostdinc to ensure this, but there are
>>>>>> still
>>>>>> __builtin_* functions from the compiler that are available so
>>>>>> a deviation is formulated for all identifiers not starting with
>>>>>> "__builtin_".
>>>>>> 
>>>>>> The missing text of a deviation for Rule 21.2 is added to
>>>>>> docs/misra/deviations.rst.
>>>>>> 
>>>>>> To avoid regressions, tag both rules as clean and add them to the
>>>>>> monitored set.
>>>>>> 
>>>>>> Signed-off-by: Nicola Vetrini 
>>>>>> Signed-off-by: Federico Serafini 
>>>>>> Signed-off-by: Victor Lira 
>>>>> 
>>>>> While the rule is in the library section, ...
>>>>> 
>>>>>> --- a/docs/misra/deviations.rst
>>>>>> +++ b/docs/misra/deviations.rst
>>>>>> @@ -587,7 +587,31 @@ Deviations related to MISRA C:2012 Rules:
>>>>>>         construct is deviated only in Translation Units that 
>>>>>> present
>>>>>> a violation
>>>>>>         of the Rule due to uses of this macro.
>>>>>>       - Tagged as `deliberate` for ECLAIR.
>>>>>> -
>>>>>> +
>>>>>> +   * - R21.1
>>>>>> +     - Rule 21.1 reports identifiers reserved for the C and POSIX
>>>>>> standard
>>>>>> +       libraries. Xen does not use such libraries and all
>>>>>> translation units
>>>>>> +       are compiled with option '-nostdinc', therefore there is 
>>>>>> no
>>>>>> reason to
>>>>>> +       avoid to use `#define` or `#undef` on such identifiers
>>>>>> except for those
>>>>>> +       beginning with `__builtin_` for which compilers may 
>>>>>> perform
>>>>>> (wrong)
>>>>>> +       optimizations.
>>>>>> +     - Tagged as `safe` for ECLAIR.
>>>>> 
>>>>> ... I'd like to ask that it be explicitly clarified here that it's
>>>>> solely
>>>>> the library (and not e.g. the compiler itself) that are of concern
>>>>> here.
>>>> 
>>>> The language can be clarified:
>>>> 
>>>> - Rule 21.1 reports identifiers reserved for the C and POSIX 
>>>> standard
>>>>   libraries. Xen does not use such libraries and all translation 
>>>> units
>>>>   are compiled with option '-nostdinc', therefore there is no reason
>>>> to
>>>>   avoid to use `#define` or `#undef` on C and POSIX standard 
>>>> libraries
>>>>   identifiers except for those beginning with `__builtin_` for which
>>>>   compilers may perform (wrong) optimizations.
>>> 
>>> Which makes it more apparent that there is a gap: What about e.g.
>>> __x86_64__?
>>> That falls within what the rules cover, is not a C or POSIX standard
>>> library
>>> identifier, yet very clearly must not be fiddled with. Whereas the 
>>> text
>>> above deviates it.
>> 
>> that is true, even if unlikely: one approach could be to avoid 
>> deviating
>> predefined macros for all CUs as -nostdinc and -fno-builtins should 
>> take
>> care of the rest; this kind of deviation is not currently possible in
>> ECLAIR, but it might be in the future.
> 
> Is this perhaps because by "all pre-defined macros" you really mean 
> _just_
> those, and not the entire reserved (for that purpose) sub-namespace? 
> Imo
> we should not go by what a particular compiler may pre-define (we may 
> even
> overlook something if we did it this way).
> 
> Jan
> 

I think there is a slight misalignment here: maybe I'm interpreting your 
answer incorrectly. Let me try to restate the proposal: the following 
identifiers are not allowed to be #define'd or #undef'd:
- __builtin_*
- for each CU, all macro identifiers already defined upon preprocessing 
that CU by the compiler invocation for that CU. This set of identifiers 
is always a subset of all the reserved identifiers, but is also 
dependent on the compiler invocation that is used for that CU, (e.g. 
__x86_64__ for an Arm target is usually safe to define, as it's 
typically not a predefined macro introduced by the compiler for that 
invocation, while (re)defining __STDC_VERSION__ or __SIZEOF_INT__ will 
be a violation in any command line I can think of). Note that this is 
not a static set, but is based on what is determined to be predefined at 
the moment of the analysis, so it is not tied to what a particular 
compiler pre-defines.

>> I think this could be
>> accomplished also via some gcc trickery on each CU, though I'm not 
>> sure
>> how valued that is for Xen.
>> 

-- 
Nicola Vetrini, B.Sc.
Software Engineer
BUGSENG (https://bugseng.com)
LinkedIn: https://www.linkedin.com/in/nicola-vetrini-a42471253


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From: "Teddy Astie" 
Subject: =?utf-8?Q?Re:=20[PATCH]=20xen/x86:=20allow=20Dom0=20PVH=20to=20call=20XENMEM=5Fexchange?=
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To: "Stefano Stabellini" , xen-devel@lists.xenproject.org
Cc: "Jan Beulich" , "Andrew Cooper" , "=?utf-8?Q?Roger=20Pau=20Monn=C3=A9?=" , "Ragiadakou, Xenia" , jason.andryuk@amd.com, agarciav@amd.com
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Hello Stefano,

Le 25/04/2025 =C3=A0 22:21, Stefano Stabellini a =C3=A9crit=C2=A0:
> From: Xenia Ragiadakou 
> 
> Dom0 PVH might need XENMEM_exchange when passing contiguous memory
> addresses to firmware or co-processors not behind an IOMMU.
> 
> XENMEM_exchange was blocked for HVM/PVH DomUs, and accidentally it
> impacted Dom0 PVH as well.
> 
> Permit Dom0 PVH to call XENMEM_exchange while leaving it blocked for
> HVM/PVH DomUs.
> 

In addition to Jan's remarks, I think it wants some additional 
clarifications on the hypercall interface. public/memory.h indicates 
"only PV guests can use this operation", so the interface is actually 
unspecified about HVM guests (e.g what are MFN/GMFN in this case ?).

> Signed-off-by: Xenia Ragiadakou 
> Signed-off-by: Stefano Stabellini 
> 
> diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
> index 1cf2365167..e995944333 100644
> --- a/xen/arch/x86/mm.c
> +++ b/xen/arch/x86/mm.c
> @@ -4401,7 +4401,7 @@ int steal_page(
>       const struct domain *owner;
>       int rc;
>   
> -    if ( paging_mode_external(d) )
> +    if ( paging_mode_external(d) && !is_hardware_domain(d) )
>           return -EOPNOTSUPP;
>   
>       /* Grab a reference to make sure the page doesn't change under our =
feet */
> diff --git a/xen/common/memory.c b/xen/common/memory.c
> index 8ca4e1a842..796eec081b 100644
> --- a/xen/common/memory.c
> +++ b/xen/common/memory.c
> @@ -794,7 +794,7 @@ static long memory_exchange(XEN_GUEST_HANDLE_PARAM(xe=
n_memory_exchange_t) arg)
>               rc =3D guest_physmap_add_page(d, _gfn(gpfn), mfn,
>                                           exch.out.extent_order) ?: rc;
>   
> -            if ( !paging_mode_translate(d) &&
> +            if ( (!paging_mode_translate(d) || is_hardware_domain(d)) &&
>                    __copy_mfn_to_guest_offset(exch.out.extent_start,
>                                               (i << out_chunk_order) + j,
>                                               mfn) )
> 

Teddy


 | Vates

XCP-ng & Xen Orchestra - Vates solutions

web: https://vates.tech




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Date: Mon, 28 Apr 2025 10:12:05 +0200
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From: Oleksii Kurochko 
Subject: Re: [PATCH v1 10/14] xen/riscv: implementation of aplic and imsic
 operations
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Romain Caritey , xen-devel@lists.xenproject.org
References: 
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On 4/17/25 8:25 AM, Jan Beulich wrote:
> On 16.04.2025 21:05, Oleksii Kurochko wrote:
>> On 4/15/25 2:46 PM, Jan Beulich wrote:
>>> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>>>> Introduce interrupt controller descriptor for host APLIC to describe
>>>> the low-lovel hardare. It includes implementation of the following functions:
>>>>    - aplic_irq_startup()
>>>>    - aplic_irq_shutdown()
>>>>    - aplic_irq_enable()
>>>>    - aplic_irq_disable()
>>>>    - aplic_irq_ack()
>>>>    - aplic_host_irq_end()
>>>>    - aplic_set_irq_affinity()
>>>>
>>>> As APLIC is used in MSI mode it requires to enable/disable interrupts not
>>>> only for APLIC but also for IMSIC. Thereby for the purpose of
>>>> aplic_irq_{enable,disable}() it is introduced imsic_irq_{enable,disable)().
>>>>
>>>> For the purpose of aplic_set_irq_affinity() aplic_get_cpu_from_mask() is
>>>> introduced to get hart id.
>>>>
>>>> Also, introduce additional interrupt controller h/w operations and
>>>> host_irq_type for APLIC:
>>>>    - aplic_host_irq_type
>>>>    - aplic_set_irq_priority()
>>>>    - aplic_set_irq_type()
>>> Yet these two functions nor the hooks they're used to populate are entirely
>>> unused here. Since they're also outside of the common IRQ handling machinery,
>>> it's unclear how one would sanely ack such a change.
>> They will be called by intc_route_irq_to_xen() from setup_irq() during firt time
>> the IRQ is setup.
> Perhaps move their introduction to there then? We don't do any Misra checking
> yet lon RISC-V, but imo it's still good practice to avoid introducing new
> violations, even if only temporarily.

Okay, I will move their introduction to there.

Btw, what is needed to add Misra checking for RISC-V? I started to think that, probably,
it will make sense to do that from the start.

>>>> --- a/xen/arch/riscv/aplic.c
>>>> +++ b/xen/arch/riscv/aplic.c
>>>> @@ -15,6 +15,7 @@
>>>>    #include 
>>>>    #include 
>>>>    #include 
>>>> +#include 
>>>>    #include 
>>>>    #include 
>>>>    
>>>> @@ -110,9 +111,173 @@ static int __init aplic_init(void)
>>>>        return 0;
>>>>    }
>>>>    
>>>> -static const struct intc_hw_operations __ro_after_init aplic_ops = {
>>>> +static void aplic_set_irq_type(struct irq_desc *desc, unsigned int type)
>>>> +{
>>>> +    unsigned int irq = desc->irq - 1;
>>> Why this adjustment by 1 (and yet both items being named "irq")?
>> Interrupt 0 isn't possible based on the spec:
>> ```
>> Each of an APLIC’s interrupt sources has a fixed unique identity number
>> in the range 1 to N, where N is the total number of sources at the
>> APLIC. The number zero is not a valid interrupt identity number at an
>> APLIC. The maximum number of interrupt sources an APLIC may support is
>> 1023. ``` and interrupt 1 will correspond to bit 0 in sourcecfg[] register, interrupt
>> 2 ->sourcecfg[1] and so on. And that is the reason why we need -1.
> Okay, fine. But what about the part of the question in parentheses?

Sorry, missed to write that I'll change irq to irq_bit or something like that.

>>>> +            aplic.regs->sourcecfg[irq] = APLIC_SOURCECFG_SM_EDGE_FALL;
>>>> +            break;
>>>> +        case IRQ_TYPE_LEVEL_HIGH:
>>>> +            aplic.regs->sourcecfg[irq] = APLIC_SOURCECFG_SM_LEVEL_HIGH;
>>>> +            break;
>>>> +        case IRQ_TYPE_LEVEL_LOW:
>>>> +            aplic.regs->sourcecfg[irq] = APLIC_SOURCECFG_SM_LEVEL_LOW;
>>>> +            break;
>>>> +        default:
>>>> +            aplic.regs->sourcecfg[irq] = APLIC_SOURCECFG_SM_INACTIVE;
>>>> +            break;
>>> Is the default: label legitimate to be reached?
>>   From the spec:
>> ```
>> 0 Inactive Inactive in this domain (and not delegated) 1 Detached
>> Active, detached from the source wire 2–3 — Reserved 4 Edge1 Active,
>> edge-sensitive; interrupt asserted on rising edge 5 Edge0 Active,
>> edge-sensitive; interrupt asserted on falling edge 6 Level1 Active,
>> level-sensitive; interrupt asserted when high 7 Level0 Active,
>> level-sensitive; interrupt asserted when low ``` It seems to me like
>> APLIC_SOURCECFG_SM_INACTIVE just covers cases (0-3) and inactive IRQ
>> pretty safe to as a default value.
> I fear this doesn't answer my question, which is to a large part related
> to the Xen code, and only to some degree to the spec.

 From Xen code point of view, I am not sure if it legitimate or not. I've not any
issue, at the moment, with such implementation, but to be on a safe side I'll
implement default case as panic("...").

>>>> +static void aplic_set_irq_priority(struct irq_desc *desc,
>>>> +                                   unsigned int priority)
>>>> +{
>>>> +    /* No priority, do nothing */
>>>> +}
>>> Since the function dopes nothing, wouldn't it be better to omit it and have
>>> the (future) caller check for a NULL pointer ahead of making the (indirect)
>>> call? Same remark for other handlers (below) which also do nothing.
>> I thought about that too, but it could be some cases when the stub is introduced
>> with temporary BUG_ON("unimplemented") inside just to not miss to implement it
>> when it will be necessary.
>> If we will have only the caller check then we could miss to implement such stubs.
> I guess I don't understand the concern.

for example, if we will have the following code:
   void some_caller(struct irq_desc *desc)
   {
       if ( desc->handler->set_affinity )
           desc->handler->set_affinity(desc, cpu_mask);
   }

Then we will skip the call of handler->set_affinity() (if it was just initialized with
.set_affinity = NULL) without any notification. And it is fine specifically in this
case as aplic_set_irq_priority() does nothing.

But what about the cases if it is a function which will have some implementation in the
future but doesn't have implementation for now. Then without notification that this
function is unimplemented we could skip something what really matters.

But I think that your initial comment was just about the function which basically
does nothing. Am i right?

>>>> +static void aplic_irq_enable(struct irq_desc *desc)
>>>> +{
>>>> +    unsigned long flags;
>>>> +
>>>> +    /*
>>>> +     * TODO: Currently, APLIC is supported only with MSI interrupts.
>>>> +     *       If APLIC without MSI interrupts is required in the future,
>>>> +     *       this function will need to be updated accordingly.
>>>> +     */
>>>> +    ASSERT(aplic.imsic_cfg->is_used);
>>> Such an extra field, used only for assertions, is pretty odd. Can't you
>>> use any of the other fields to achieve the same effect?
>> in aplic_init() there is:
>>       /* check for associated imsic node */
>>       rc = dt_property_read_u32(node, "msi-parent", &imsic_phandle);
>>       if ( !rc )
>>           panic("%s: IDC mode not supported\n", node->full_name);
>>
>> So we will have panic() anyway if MSI mode isn't supported. As an option we
>> can just drop the ASSERT.
> Since they serve primarily as a reminder where changes would need making,
> I'd prefer if they could be kept.
>
>> Or introduce static variable in aplic.c `aplic_mode`, init it in aplic_init()
>> and use it in ASSERT().
> This would then again be used solely for assertions, aiui? As said, I
> think it would be preferable if some already existing indicator could be
> used for this purpose.

I think that not solely, for example, if IMSIC isn't available then we should skip
the calls of imsic_irq_enable(), at least, and this variable could be used for that
purpose.

But I will double check if we have better indicator. At the moment, I don't think
we have better, probably, except checking of aplic.regs->domaincfg if bit APLIC_DOMAINCFG_DM
is set.

>>>> +    ASSERT(spin_is_locked(&desc->lock));
>>> If this lock (which is an IRQ-safe one) is necessarily held, ...
>>>
>>>> +    spin_lock_irqsave(&aplic.lock, flags);
>>> ... you can use just spin_lock() here.
>>>
>>>> +    clear_bit(_IRQ_DISABLED, &desc->status);
>>> Why an atomic bitop when desc is locked? (And yes, I ought to raise the same
>>> question on Arm code also doing so.)
>> I haven't thought about that. Likely non-atomic bitop could be used here.
> And then - does it need to be a bitop? Aiui that's what Arm uses, while x86
> doesn't. And I see no reason to use other than plain C operators here. If
> Arm was switched, presumably all the redundant (and misnamed) _IRQ_*
> constants could go away, with just the IRQ_* ones left.

The reason for a bitop in Arm is explained in this commithttps://gitlab.com/xen-project/xen/-/commit/50d8fe8fcbab2440cfeeb65c4765868398652473
but all the places where plain C operators were changed to bitops are actually executed under|spin_lock_irqsave(&desc->lock, flags). By quick look I found only two 
places one in __setup_irq() but it is called by the functions which do ||spin_lock_irqsave(&desc->lock, flags) and in vgic_v2_fold_lr_state(). 
Maybe, I'm missing something.|
|RISC-V won't have something similar to ||vgic_v2_fold_lr_state|(), but __setup_irq() is used in a similar way. It can be added ASSERT(spin_is_lock(&desc->lock))
and then it will also safe to use non-bitop function.
Probably, it is a little bit safer to use always bitops for desc->status.
||

>>> I'm uncertain about this bit setting anyway - on x86 we would only fiddle
>>> with it for IRQs not in use, not while enabling/disabling one.
> What about this part?

As I understand, based on Arm, code then Xen enables interrupts corresponding to devices assigned
to dom0/domU before booting dom0/domU, resulting in the possibility of receiving an interrupt
and not knowing what to do with it. So it is needed for enablement of IRQs when the guest
requests it and not unconditionally at boot time.

>>>> +    spin_unlock_irqrestore(&aplic.lock, flags);
>>>> +}
>>>> +
>>>> +static void aplic_irq_disable(struct irq_desc *desc)
>>>> +{
>>>> +    unsigned long flags;
>>>> +
>>>> +    /*
>>>> +     * TODO: Currently, APLIC is supported only with MSI interrupts.
>>>> +     *       If APLIC without MSI interrupts is required in the future,
>>>> +     *       this function will need to be updated accordingly.
>>>> +     */
>>>> +    ASSERT(aplic.imsic_cfg->is_used);
>>>> +
>>>> +    ASSERT(spin_is_locked(&desc->lock));
>>>> +
>>>> +    spin_lock_irqsave(&aplic.lock, flags);
>>>> +
>>>> +    set_bit(_IRQ_DISABLED, &desc->status);
>>>> +
>>>> +    /* disable interrupt in APLIC */
>>>> +    aplic.regs->clrienum = desc->irq;
>>>> +
>>>> +    /* disable interrupt in IMSIC */
>>>> +    imsic_irq_disable(desc->irq);
>>>> +
>>>> +    spin_unlock_irqrestore(&aplic.lock, flags);
>>>> +}
>>>> +
>>>> +static unsigned int aplic_irq_startup(struct irq_desc *desc)
>>>> +{
>>>> +    aplic_irq_enable(desc);
>>>> +
>>>> +    return 0;
>>>> +}
>>>> +
>>>> +static void aplic_irq_shutdown(struct irq_desc *desc)
>>>> +{
>>>> +    aplic_irq_disable(desc);
>>>> +}
>>> You don't really need a separate hook function here, do you?
>> With such implementation it is really not needed to have a hook so
>> I will drop it.
>>
>>>> +static void aplic_irq_ack(struct irq_desc *desc)
>>>> +{
>>>> +    /* nothing to do */
>>>> +}
>>>> +
>>>> +static void aplic_host_irq_end(struct irq_desc *desc)
>>> What's the "host" in the identifier about?
>> It was copied that from Arm and my understanding that it means
>> Xen-related IRQ as they also have:
>> ```
>> /* XXX different for level vs edge */
>> static hw_irq_controller gicv2_host_irq_type = {
>> ...
>>       .end          = gicv2_host_irq_end,
>> ...
>> };
>>
>> static hw_irq_controller gicv2_guest_irq_type = {
>> ...
>>       .end          = gicv2_guest_irq_end,
>> ...
>> };
>> ```
> And you expect to end up with a similar distinction on RISC-V? There's
> nothing like that on x86, just to mention it.

Yes, if one day support for guest interrupts without IMSIC support will be added for APLIC.
(at the moment, we are planning only to have APLIC+IMSIC support as this way is hypervisor-aware)

>>>> +static void aplic_set_irq_affinity(struct irq_desc *desc, const cpumask_t *mask)
>>>> +{
>>>> +    unsigned int cpu;
>>>> +    uint64_t group_index, base_ppn;
>>>> +    uint32_t hhxw, lhxw ,hhxs, value;
>>>> +    const struct imsic_config *imsic = aplic.imsic_cfg;
>>>> +
>>>> +    /*
>>>> +     * TODO: Currently, APLIC is supported only with MSI interrupts.
>>>> +     *       If APLIC without MSI interrupts is required in the future,
>>>> +     *       this function will need to be updated accordingly.
>>>> +     */
>>>> +    ASSERT(aplic.imsic_cfg->is_used);
>>> Use the local variable you have made yourself?
>> What do you mean by local here?
> Just a few lines up you latch aplic.imsic_cfg into the local "imsic".

Oh, sure, if *->is_used will still present in the next patch series then I'll re-use here "imsic".

~ Oleksii

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On 4/17/25 8:25 AM, Jan Beulich wrote:

    

    

      
On 16.04.2025 21:05, Oleksii Kurochko wrote:


      

        
On 4/15/25 2:46 PM, Jan Beulich wrote:


        

          
On 08.04.2025 17:57, Oleksii Kurochko wrote:


          

            
Introduce interrupt controller descriptor for host APLIC to describe
the low-lovel hardare. It includes implementation of the following functions:
  - aplic_irq_startup()
  - aplic_irq_shutdown()
  - aplic_irq_enable()
  - aplic_irq_disable()
  - aplic_irq_ack()
  - aplic_host_irq_end()
  - aplic_set_irq_affinity()

As APLIC is used in MSI mode it requires to enable/disable interrupts not
only for APLIC but also for IMSIC. Thereby for the purpose of
aplic_irq_{enable,disable}() it is introduced imsic_irq_{enable,disable)().

For the purpose of aplic_set_irq_affinity() aplic_get_cpu_from_mask() is
introduced to get hart id.

Also, introduce additional interrupt controller h/w operations and
host_irq_type for APLIC:
  - aplic_host_irq_type
  - aplic_set_irq_priority()
  - aplic_set_irq_type()


          

          
Yet these two functions nor the hooks they're used to populate are entirely
unused here. Since they're also outside of the common IRQ handling machinery,
it's unclear how one would sanely ack such a change.


        

        
They will be called by intc_route_irq_to_xen() from setup_irq() during firt time
the IRQ is setup.


      

      
Perhaps move their introduction to there then? We don't do any Misra checking
yet lon RISC-V, but imo it's still good practice to avoid introducing new
violations, even if only temporarily.

    

    
Okay, I will move their introduction to there.

Btw, what is needed to add Misra checking for RISC-V? I started to think that, probably,
it will make sense to do that from the start.



    

      

        

          

            
--- a/xen/arch/riscv/aplic.c
+++ b/xen/arch/riscv/aplic.c
@@ -15,6 +15,7 @@
  #include <xen/irq.h>
  #include <xen/mm.h>
  #include <xen/sections.h>
+#include <xen/spinlock.h>
  #include <xen/types.h>
  #include <xen/vmap.h>
  
@@ -110,9 +111,173 @@ static int __init aplic_init(void)
      return 0;
  }
  
-static const struct intc_hw_operations __ro_after_init aplic_ops = {
+static void aplic_set_irq_type(struct irq_desc *desc, unsigned int type)
+{
+    unsigned int irq = desc->irq - 1;


          

          
Why this adjustment by 1 (and yet both items being named "irq")?


        

        
Interrupt 0 isn't possible based on the spec:
```
Each of an APLIC’s interrupt sources has a fixed unique identity number 
in the range 1 to N, where N is the total number of sources at the 
APLIC. The number zero is not a valid interrupt identity number at an 
APLIC. The maximum number of interrupt sources an APLIC may support is 
1023. ``` and interrupt 1 will correspond to bit 0 in sourcecfg[] register, interrupt 
2 ->sourcecfg[1] and so on. And that is the reason why we need -1.


      

      
Okay, fine. But what about the part of the question in parentheses?

    

    
Sorry, missed to write that I'll change irq to irq_bit or something like that.



    

      

        

          

            
+            aplic.regs->sourcecfg[irq] = APLIC_SOURCECFG_SM_EDGE_FALL;
+            break;
+        case IRQ_TYPE_LEVEL_HIGH:
+            aplic.regs->sourcecfg[irq] = APLIC_SOURCECFG_SM_LEVEL_HIGH;
+            break;
+        case IRQ_TYPE_LEVEL_LOW:
+            aplic.regs->sourcecfg[irq] = APLIC_SOURCECFG_SM_LEVEL_LOW;
+            break;
+        default:
+            aplic.regs->sourcecfg[irq] = APLIC_SOURCECFG_SM_INACTIVE;
+            break;


          

          
Is the default: label legitimate to be reached?


        

        
 From the spec:
```
0 Inactive Inactive in this domain (and not delegated) 1 Detached 
Active, detached from the source wire 2–3 — Reserved 4 Edge1 Active, 
edge-sensitive; interrupt asserted on rising edge 5 Edge0 Active, 
edge-sensitive; interrupt asserted on falling edge 6 Level1 Active, 
level-sensitive; interrupt asserted when high 7 Level0 Active, 
level-sensitive; interrupt asserted when low ``` It seems to me like 
APLIC_SOURCECFG_SM_INACTIVE just covers cases (0-3) and inactive IRQ 
pretty safe to as a default value.


      

      
I fear this doesn't answer my question, which is to a large part related
to the Xen code, and only to some degree to the spec.

    

    
From Xen code point of view, I am not sure if it legitimate or not. I've not any
issue, at the moment, with such implementation, but to be on a safe side I'll
implement default case as panic("...").


    

      

        

          

            
+static void aplic_set_irq_priority(struct irq_desc *desc,
+                                   unsigned int priority)
+{
+    /* No priority, do nothing */
+}


          

          
Since the function dopes nothing, wouldn't it be better to omit it and have
the (future) caller check for a NULL pointer ahead of making the (indirect)
call? Same remark for other handlers (below) which also do nothing.


        

        
I thought about that too, but it could be some cases when the stub is introduced
with temporary BUG_ON("unimplemented") inside just to not miss to implement it
when it will be necessary.
If we will have only the caller check then we could miss to implement such stubs.


      

      
I guess I don't understand the concern.

    

    
for example, if we will have the following code:
  void some_caller(struct irq_desc *desc)
  {
      if ( desc->handler->set_affinity )
          desc->handler->set_affinity(desc, cpu_mask);
  }

Then we will skip the call of handler->set_affinity() (if it was just initialized with
.set_affinity = NULL) without any notification. And it is fine specifically in this
case as aplic_set_irq_priority() does nothing.

But what about the cases if it is a function which will have some implementation in the
future but doesn't have implementation for now. Then without notification that this
function is unimplemented we could skip something what really matters.

But I think that your initial comment was just about the function which basically
does nothing. Am i right?

    

      

        

          

            
+static void aplic_irq_enable(struct irq_desc *desc)
+{
+    unsigned long flags;
+
+    /*
+     * TODO: Currently, APLIC is supported only with MSI interrupts.
+     *       If APLIC without MSI interrupts is required in the future,
+     *       this function will need to be updated accordingly.
+     */
+    ASSERT(aplic.imsic_cfg->is_used);


          

          
Such an extra field, used only for assertions, is pretty odd. Can't you
use any of the other fields to achieve the same effect?


        

        
in aplic_init() there is:
     /* check for associated imsic node */
     rc = dt_property_read_u32(node, "msi-parent", &imsic_phandle);
     if ( !rc )
         panic("%s: IDC mode not supported\n", node->full_name);

So we will have panic() anyway if MSI mode isn't supported. As an option we
can just drop the ASSERT.


      

      
Since they serve primarily as a reminder where changes would need making,
I'd prefer if they could be kept.



      

        
Or introduce static variable in aplic.c `aplic_mode`, init it in aplic_init()
and use it in ASSERT().


      

      
This would then again be used solely for assertions, aiui? As said, I
think it would be preferable if some already existing indicator could be
used for this purpose.

    

    
I think that not solely, for example, if IMSIC isn't available then we should skip
the calls of imsic_irq_enable(), at least, and this variable could be used for that
purpose.

But I will double check if we have better indicator. At the moment, I don't think
we have better, probably, except checking of aplic.regs->domaincfg if bit APLIC_DOMAINCFG_DM
is set.



    

      

        

          

            
+    ASSERT(spin_is_locked(&desc->lock));


          

          
If this lock (which is an IRQ-safe one) is necessarily held, ...



          

            
+    spin_lock_irqsave(&aplic.lock, flags);


          

          
... you can use just spin_lock() here.



          

            
+    clear_bit(_IRQ_DISABLED, &desc->status);


          

          
Why an atomic bitop when desc is locked? (And yes, I ought to raise the same
question on Arm code also doing so.)


        

        
I haven't thought about that. Likely non-atomic bitop could be used here.


      

      
And then - does it need to be a bitop? Aiui that's what Arm uses, while x86
doesn't. And I see no reason to use other than plain C operators here. If
Arm was switched, presumably all the redundant (and misnamed) _IRQ_*
constants could go away, with just the IRQ_* ones left.

    

    
The reason for a bitop in Arm is explained in this commit https://gitlab.com/xen-project/xen/-/commit/50d8fe8fcbab2440cfeeb65c4765868398652473
but all the places where plain C operators were changed to bitops are actually executed under spin_lock_irqsave(&desc->lock, flags).
By quick look I found only two places one in __setup_irq() but it is called by the functions which do spin_lock_irqsave(&desc->lock, flags)
and in vgic_v2_fold_lr_state(). Maybe, I'm missing something.

RISC-V won't have something similar to vgic_v2_fold_lr_state(), but __setup_irq() is used in a similar way. It can be added ASSERT(spin_is_lock(&desc->lock))
and then it will also safe to use non-bitop function.
Probably, it is a little bit safer to use always bitops for desc->status.




    

      

        

          
I'm uncertain about this bit setting anyway - on x86 we would only fiddle
with it for IRQs not in use, not while enabling/disabling one.


        

      

      
What about this part?

    

    
As I understand, based on Arm, code then Xen enables interrupts corresponding to devices assigned
to dom0/domU before booting dom0/domU, resulting in the possibility of receiving an interrupt
and not knowing what to do with it. So it is needed for enablement of IRQs when the guest
requests it and not unconditionally at boot time.



    

      

        

          

            
+    spin_unlock_irqrestore(&aplic.lock, flags);
+}
+
+static void aplic_irq_disable(struct irq_desc *desc)
+{
+    unsigned long flags;
+
+    /*
+     * TODO: Currently, APLIC is supported only with MSI interrupts.
+     *       If APLIC without MSI interrupts is required in the future,
+     *       this function will need to be updated accordingly.
+     */
+    ASSERT(aplic.imsic_cfg->is_used);
+
+    ASSERT(spin_is_locked(&desc->lock));
+
+    spin_lock_irqsave(&aplic.lock, flags);
+
+    set_bit(_IRQ_DISABLED, &desc->status);
+
+    /* disable interrupt in APLIC */
+    aplic.regs->clrienum = desc->irq;
+
+    /* disable interrupt in IMSIC */
+    imsic_irq_disable(desc->irq);
+
+    spin_unlock_irqrestore(&aplic.lock, flags);
+}
+
+static unsigned int aplic_irq_startup(struct irq_desc *desc)
+{
+    aplic_irq_enable(desc);
+
+    return 0;
+}
+
+static void aplic_irq_shutdown(struct irq_desc *desc)
+{
+    aplic_irq_disable(desc);
+}


          

          
You don't really need a separate hook function here, do you?


        

        
With such implementation it is really not needed to have a hook so
I will drop it.



        

          

            
+static void aplic_irq_ack(struct irq_desc *desc)
+{
+    /* nothing to do */
+}
+
+static void aplic_host_irq_end(struct irq_desc *desc)


          

          
What's the "host" in the identifier about?


        

        
It was copied that from Arm and my understanding that it means
Xen-related IRQ as they also have:
```
/* XXX different for level vs edge */
static hw_irq_controller gicv2_host_irq_type = {
...
     .end          = gicv2_host_irq_end,
...
};

static hw_irq_controller gicv2_guest_irq_type = {
...
     .end          = gicv2_guest_irq_end,
...
};
```


      

      
And you expect to end up with a similar distinction on RISC-V? There's
nothing like that on x86, just to mention it.

    

    
Yes, if one day support for guest interrupts without IMSIC support will be added for APLIC.
(at the moment, we are planning only to have APLIC+IMSIC support as this way is hypervisor-aware)



    

      

        

          

            
+static void aplic_set_irq_affinity(struct irq_desc *desc, const cpumask_t *mask)
+{
+    unsigned int cpu;
+    uint64_t group_index, base_ppn;
+    uint32_t hhxw, lhxw ,hhxs, value;
+    const struct imsic_config *imsic = aplic.imsic_cfg;
+
+    /*
+     * TODO: Currently, APLIC is supported only with MSI interrupts.
+     *       If APLIC without MSI interrupts is required in the future,
+     *       this function will need to be updated accordingly.
+     */
+    ASSERT(aplic.imsic_cfg->is_used);


          

          
Use the local variable you have made yourself?


        

        
What do you mean by local here?


      

      
Just a few lines up you latch aplic.imsic_cfg into the local "imsic".

    

    
Oh, sure, if *->is_used will still present in the next patch series then I'll re-use here "imsic".



    
~ Oleksii


  


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From xen-devel-bounces@lists.xenproject.org Mon Apr 28 08:54:13 2025
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Subject: Re: [PATCH v9 7/8] xen/arm: enable dom0 to use PCI devices with
 pci-passthrough=no
To: Mykyta Poturai ,
 "xen-devel@lists.xenproject.org" 
Cc: Stewart Hildebrand ,
 Stefano Stabellini ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Andrew Cooper ,
 Anthony PERARD , Jan Beulich ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
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 <132afbca390edd6e9fd7b1ffacf6c5aff0d29aa7.1741958647.git.mykyta_poturai@epam.com>
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From: Julien Grall 
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Hi Mykyta,

On 14/03/2025 13:34, Mykyta Poturai wrote:
> From: Stewart Hildebrand 
> 
> Enable the use of IOMMU + PCI in dom0 without having to specify
> "pci-passthrough=yes". We rely on dom0 to initialize the PCI controller
> and perform a PHYSDEVOP_pci_device_add call to add each device to SMMU.

It would be good to explain why Xen cannot initialize the PCI 
controller. Asking, because the reason is the PCI controller is too 
complex, then you will likely need the same approach for PCI passthrough...

> 
> Enable pci_init() for initializing Xen's internal PCI subsystem, and
> allow PHYSDEVOP_pci_device_add when pci-passthrough is disabled.

Effectively, wouldn't this mean dom0 always *have* to call 
PHYSDEVOP_pci_device_add? Otherwise, how would dom0 know whether it 
needs to call PHSYDEVOP_pci_device_add?

Cheers,

-- 
Julien Grall



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Subject: Re: [PATCH v1 10/14] xen/riscv: implementation of aplic and imsic
 operations
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Romain Caritey , xen-devel@lists.xenproject.org
References: 
 <74a07ed7c596bbcf581010685e01bfdfa19164f5.1744126720.git.oleksii.kurochko@gmail.com>
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 <231e9f4e-a044-49b7-b3a5-26ff2f7f9612@gmail.com>
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In-Reply-To: <231e9f4e-a044-49b7-b3a5-26ff2f7f9612@gmail.com>
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On 28.04.2025 10:12, Oleksii Kurochko wrote:
> On 4/17/25 8:25 AM, Jan Beulich wrote:
>> On 16.04.2025 21:05, Oleksii Kurochko wrote:
>>> On 4/15/25 2:46 PM, Jan Beulich wrote:
>>>> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>>>>> Introduce interrupt controller descriptor for host APLIC to describe
>>>>> the low-lovel hardare. It includes implementation of the following functions:
>>>>>    - aplic_irq_startup()
>>>>>    - aplic_irq_shutdown()
>>>>>    - aplic_irq_enable()
>>>>>    - aplic_irq_disable()
>>>>>    - aplic_irq_ack()
>>>>>    - aplic_host_irq_end()
>>>>>    - aplic_set_irq_affinity()
>>>>>
>>>>> As APLIC is used in MSI mode it requires to enable/disable interrupts not
>>>>> only for APLIC but also for IMSIC. Thereby for the purpose of
>>>>> aplic_irq_{enable,disable}() it is introduced imsic_irq_{enable,disable)().
>>>>>
>>>>> For the purpose of aplic_set_irq_affinity() aplic_get_cpu_from_mask() is
>>>>> introduced to get hart id.
>>>>>
>>>>> Also, introduce additional interrupt controller h/w operations and
>>>>> host_irq_type for APLIC:
>>>>>    - aplic_host_irq_type
>>>>>    - aplic_set_irq_priority()
>>>>>    - aplic_set_irq_type()
>>>> Yet these two functions nor the hooks they're used to populate are entirely
>>>> unused here. Since they're also outside of the common IRQ handling machinery,
>>>> it's unclear how one would sanely ack such a change.
>>> They will be called by intc_route_irq_to_xen() from setup_irq() during firt time
>>> the IRQ is setup.
>> Perhaps move their introduction to there then? We don't do any Misra checking
>> yet lon RISC-V, but imo it's still good practice to avoid introducing new
>> violations, even if only temporarily.
> 
> Okay, I will move their introduction to there.
> 
> Btw, what is needed to add Misra checking for RISC-V? I started to think that, probably,
> it will make sense to do that from the start.

Best I can do is point you at what is done for Arm and x86. You may want to
ask people more familiar with the CI aspects involved here.

>>>>> +static void aplic_set_irq_priority(struct irq_desc *desc,
>>>>> +                                   unsigned int priority)
>>>>> +{
>>>>> +    /* No priority, do nothing */
>>>>> +}
>>>> Since the function dopes nothing, wouldn't it be better to omit it and have
>>>> the (future) caller check for a NULL pointer ahead of making the (indirect)
>>>> call? Same remark for other handlers (below) which also do nothing.
>>> I thought about that too, but it could be some cases when the stub is introduced
>>> with temporary BUG_ON("unimplemented") inside just to not miss to implement it
>>> when it will be necessary.
>>> If we will have only the caller check then we could miss to implement such stubs.
>> I guess I don't understand the concern.
> 
> for example, if we will have the following code:
>    void some_caller(struct irq_desc *desc)
>    {
>        if ( desc->handler->set_affinity )
>            desc->handler->set_affinity(desc, cpu_mask);
>    }
> 
> Then we will skip the call of handler->set_affinity() (if it was just initialized with
> .set_affinity = NULL) without any notification. And it is fine specifically in this
> case as aplic_set_irq_priority() does nothing.
> 
> But what about the cases if it is a function which will have some implementation in the
> future but doesn't have implementation for now. Then without notification that this
> function is unimplemented we could skip something what really matters.
> 
> But I think that your initial comment was just about the function which basically
> does nothing. Am i right?

Since indirect calls are not only more expensive (often; not sure about
RISC-V) but also pose speculative concerns, having such just to do nothing
simply seems like moving in the wrong direction.

>>>>> +    ASSERT(spin_is_locked(&desc->lock));
>>>> If this lock (which is an IRQ-safe one) is necessarily held, ...
>>>>
>>>>> +    spin_lock_irqsave(&aplic.lock, flags);
>>>> ... you can use just spin_lock() here.
>>>>
>>>>> +    clear_bit(_IRQ_DISABLED, &desc->status);
>>>> Why an atomic bitop when desc is locked? (And yes, I ought to raise the same
>>>> question on Arm code also doing so.)
>>> I haven't thought about that. Likely non-atomic bitop could be used here.
>> And then - does it need to be a bitop? Aiui that's what Arm uses, while x86
>> doesn't. And I see no reason to use other than plain C operators here. If
>> Arm was switched, presumably all the redundant (and misnamed) _IRQ_*
>> constants could go away, with just the IRQ_* ones left.
> 
> The reason for a bitop in Arm is explained in this commithttps://gitlab.com/xen-project/xen/-/commit/50d8fe8fcbab2440cfeeb65c4765868398652473
> but all the places where plain C operators were changed to bitops are actually executed under|spin_lock_irqsave(&desc->lock, flags). By quick look I found only two 
> places one in __setup_irq() but it is called by the functions which do ||spin_lock_irqsave(&desc->lock, flags) and in vgic_v2_fold_lr_state(). 
> Maybe, I'm missing something.|
> |RISC-V won't have something similar to ||vgic_v2_fold_lr_state|(), but __setup_irq() is used in a similar way. It can be added ASSERT(spin_is_lock(&desc->lock))
> and then it will also safe to use non-bitop function.
> Probably, it is a little bit safer to use always bitops for desc->status.
> ||

I question that. If any accesses outside of locked regions were needed (as the
description of that commit suggests), then the situation would be different.

Btw, you not wrapping lines and you adding strange | instances doesn't help
readability of your replies.

>>>> I'm uncertain about this bit setting anyway - on x86 we would only fiddle
>>>> with it for IRQs not in use, not while enabling/disabling one.
>> What about this part?
> 
> As I understand, based on Arm, code then Xen enables interrupts corresponding to devices assigned
> to dom0/domU before booting dom0/domU, resulting in the possibility of receiving an interrupt
> and not knowing what to do with it. So it is needed for enablement of IRQs when the guest
> requests it and not unconditionally at boot time.

I fear I don't understand this. The way we do things on x86 doesn't leave us
in such a situation.

Jan


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Subject: Re: [PATCH v9 7/8] xen/arm: enable dom0 to use PCI devices with
 pci-passthrough=no
To: Mykyta Poturai 
Cc: Stewart Hildebrand ,
 Stefano Stabellini , Julien Grall ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Andrew Cooper ,
 Anthony PERARD ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 "xen-devel@lists.xenproject.org" 
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On 28.04.2025 10:21, Mykyta Poturai wrote:
> On 17.03.25 17:07, Jan Beulich wrote:
>> On 14.03.2025 14:34, Mykyta Poturai wrote:
>>> --- a/xen/arch/arm/pci/pci.c
>>> +++ b/xen/arch/arm/pci/pci.c
>>> @@ -16,9 +16,18 @@
>>>   #include 
>>>   #include 
>>>   #include 
>>> +#include 
>>>   #include 
>>>   #include 
>>>   
>>> +bool is_pci_passthrough_enabled(bool dom0)
>>> +{
>>> +    if ( dom0 )
>>> +        return pci_passthrough_enabled || iommu_enabled;
>>
>> As I think I said before - the function's name now no longer expresses
>> what it really checks. That (imo heavily) misleading at the use sites
>> of this function.
> 
> I've spent some more time thinking about how to better deal with this. 
> In the end, I think your earlier suggestion about introducing a new arch 
> specific function is the best approach, but I want to agree on the 
> naming before sending new patches. Would "arch_requires_pci_physdev" be 
> an appropriate name in your opinion?
> 
> At the call sites it will look like this:
>      case PHYSDEVOP_pci_device_remove: {
>          struct physdev_pci_device dev;
> 
>          if ( !is_pci_passthrough_enabled() && !arch_requires_pci_physdev())
>              return -EOPNOTSUPP;

There are several questions that affect naming: Is it really "requires"? Is
it really all PCI-related physdevops? Is the ordering of naming elements in
line with what we use elsewhere (arch_ first is, but perhaps either pci or
physdevop wants to move earlier)?

Jan


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Subject: Re: [PATCH v1] misra: add deviation for rules 21.1 and 21.2
To: Nicola Vetrini 
Cc: Stefano Stabellini , victorm.lira@amd.com,
 Federico Serafini ,
 Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Bertrand Marquis , xen-devel@lists.xenproject.org
References: <9e1210f2a9c794d68dcc6b897239b228b141296a.1745427770.git.victorm.lira@amd.com>
 
 
 <8d65ee65-ec6f-49a3-8954-d303b08dc2df@suse.com>
 
 
 <4d21245edbd4949a0aec6ecdadea437c@bugseng.com>
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From: Jan Beulich 
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On 28.04.2025 10:09, Nicola Vetrini wrote:
> On 2025-04-28 08:15, Jan Beulich wrote:
>> On 25.04.2025 17:53, Nicola Vetrini wrote:
>>> On 2025-04-25 10:07, Jan Beulich wrote:
>>>> On 24.04.2025 23:45, Stefano Stabellini wrote:
>>>>> On Thu, 24 Apr 2025, Jan Beulich wrote:
>>>>>> On 23.04.2025 19:54, victorm.lira@amd.com wrote:
>>>>>>> From: Nicola Vetrini 
>>>>>>>
>>>>>>> MISRA C Rules 21.1 ("#define and #undef shall not be used on a
>>>>>>> reserved identifier or reserved macro name") and R21.2 ("A 
>>>>>>> reserved
>>>>>>> identifier or reserved macro name shall not be declared") 
>>>>>>> violations
>>>>>>> are not problematic for Xen, as it does not use the C or POSIX
>>>>>>> libraries.
>>>>>>>
>>>>>>> Xen uses -fno-builtin and -nostdinc to ensure this, but there are
>>>>>>> still
>>>>>>> __builtin_* functions from the compiler that are available so
>>>>>>> a deviation is formulated for all identifiers not starting with
>>>>>>> "__builtin_".
>>>>>>>
>>>>>>> The missing text of a deviation for Rule 21.2 is added to
>>>>>>> docs/misra/deviations.rst.
>>>>>>>
>>>>>>> To avoid regressions, tag both rules as clean and add them to the
>>>>>>> monitored set.
>>>>>>>
>>>>>>> Signed-off-by: Nicola Vetrini 
>>>>>>> Signed-off-by: Federico Serafini 
>>>>>>> Signed-off-by: Victor Lira 
>>>>>>
>>>>>> While the rule is in the library section, ...
>>>>>>
>>>>>>> --- a/docs/misra/deviations.rst
>>>>>>> +++ b/docs/misra/deviations.rst
>>>>>>> @@ -587,7 +587,31 @@ Deviations related to MISRA C:2012 Rules:
>>>>>>>         construct is deviated only in Translation Units that 
>>>>>>> present
>>>>>>> a violation
>>>>>>>         of the Rule due to uses of this macro.
>>>>>>>       - Tagged as `deliberate` for ECLAIR.
>>>>>>> -
>>>>>>> +
>>>>>>> +   * - R21.1
>>>>>>> +     - Rule 21.1 reports identifiers reserved for the C and POSIX
>>>>>>> standard
>>>>>>> +       libraries. Xen does not use such libraries and all
>>>>>>> translation units
>>>>>>> +       are compiled with option '-nostdinc', therefore there is 
>>>>>>> no
>>>>>>> reason to
>>>>>>> +       avoid to use `#define` or `#undef` on such identifiers
>>>>>>> except for those
>>>>>>> +       beginning with `__builtin_` for which compilers may 
>>>>>>> perform
>>>>>>> (wrong)
>>>>>>> +       optimizations.
>>>>>>> +     - Tagged as `safe` for ECLAIR.
>>>>>>
>>>>>> ... I'd like to ask that it be explicitly clarified here that it's
>>>>>> solely
>>>>>> the library (and not e.g. the compiler itself) that are of concern
>>>>>> here.
>>>>>
>>>>> The language can be clarified:
>>>>>
>>>>> - Rule 21.1 reports identifiers reserved for the C and POSIX 
>>>>> standard
>>>>>   libraries. Xen does not use such libraries and all translation 
>>>>> units
>>>>>   are compiled with option '-nostdinc', therefore there is no reason
>>>>> to
>>>>>   avoid to use `#define` or `#undef` on C and POSIX standard 
>>>>> libraries
>>>>>   identifiers except for those beginning with `__builtin_` for which
>>>>>   compilers may perform (wrong) optimizations.
>>>>
>>>> Which makes it more apparent that there is a gap: What about e.g.
>>>> __x86_64__?
>>>> That falls within what the rules cover, is not a C or POSIX standard
>>>> library
>>>> identifier, yet very clearly must not be fiddled with. Whereas the 
>>>> text
>>>> above deviates it.
>>>
>>> that is true, even if unlikely: one approach could be to avoid 
>>> deviating
>>> predefined macros for all CUs as -nostdinc and -fno-builtins should 
>>> take
>>> care of the rest; this kind of deviation is not currently possible in
>>> ECLAIR, but it might be in the future.
>>
>> Is this perhaps because by "all pre-defined macros" you really mean 
>> _just_
>> those, and not the entire reserved (for that purpose) sub-namespace? 
>> Imo
>> we should not go by what a particular compiler may pre-define (we may 
>> even
>> overlook something if we did it this way).
>>
>> Jan
>>
> 
> I think there is a slight misalignment here: maybe I'm interpreting your 
> answer incorrectly. Let me try to restate the proposal: the following 
> identifiers are not allowed to be #define'd or #undef'd:
> - __builtin_*
> - for each CU, all macro identifiers already defined upon preprocessing 
> that CU by the compiler invocation for that CU. This set of identifiers 
> is always a subset of all the reserved identifiers, but is also 
> dependent on the compiler invocation that is used for that CU, (e.g. 
> __x86_64__ for an Arm target is usually safe to define, as it's 
> typically not a predefined macro introduced by the compiler for that 
> invocation,

No, it's not - elsewhere in the tree we may use this to distinguish
architectures. Plus isn't Misra heavily about avoiding developer
confusion? Defining __x86_64__ on Arm code is, imo, a pretty confusing
thing to do.

> while (re)defining __STDC_VERSION__ or __SIZEOF_INT__ will 
> be a violation in any command line I can think of). Note that this is 
> not a static set, but is based on what is determined to be predefined at 
> the moment of the analysis, so it is not tied to what a particular 
> compiler pre-defines.

Right. Yet what I'm trying to get to is that we disallow _all_ such
reserved identifiers, not just a subset.

Jan


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Date: Mon, 28 Apr 2025 11:08:51 +0200
MIME-Version: 1.0
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Subject: Re: [PATCH v4] xen/domain: unify domain ID allocation
To: Julien Grall 
Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech,
 michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org,
 dmukhin@ford.com, dmkhn@proton.me, xen-devel@lists.xenproject.org
References: <20250422215322.521464-1-dmukhin@ford.com>
 
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On 23.04.2025 13:22, Julien Grall wrote:
> On 22/04/2025 22:54, dmkhn@proton.me wrote:
>> --- a/xen/common/domain.c
>> +++ b/xen/common/domain.c
>> @@ -66,6 +66,57 @@ DEFINE_RCU_READ_LOCK(domlist_read_lock);
>>   static struct domain *domain_hash[DOMAIN_HASH_SIZE];
>>   struct domain *domain_list;
>>   
>> +/* Domain ID allocator */
>> +static unsigned int domid_last;
>> +
>> +static inline bool is_free_domid(domid_t dom)
>> +{
>> +    struct domain *d = rcu_lock_domain_by_id(dom);
>> +
>> +    if ( d )
>> +        rcu_unlock_domain(d);
>> +
>> +    return !d;
>> +}
>> +
>> +/*
>> + * Allocate new domain ID based on the hint.
> 
> Maybe clarify this should not be used for system domains?

But those don't have their IDs allocated; they're pre-determined and outside
of the range available for allocation.

Jan


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Date: Mon, 28 Apr 2025 11:14:25 +0200
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Subject: Re: [PATCH v4] xen/domain: unify domain ID allocation
To: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org,
 michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org,
 dmukhin@ford.com, xen-devel@lists.xenproject.org
References: <20250422215322.521464-1-dmukhin@ford.com>
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From: Jan Beulich 
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On 22.04.2025 23:54, dmkhn@proton.me wrote:
> --- a/xen/common/domain.c
> +++ b/xen/common/domain.c
> @@ -66,6 +66,57 @@ DEFINE_RCU_READ_LOCK(domlist_read_lock);
>  static struct domain *domain_hash[DOMAIN_HASH_SIZE];
>  struct domain *domain_list;
>  
> +/* Domain ID allocator */
> +static unsigned int domid_last;
> +
> +static inline bool is_free_domid(domid_t dom)
> +{
> +    struct domain *d = rcu_lock_domain_by_id(dom);
> +
> +    if ( d )
> +        rcu_unlock_domain(d);
> +
> +    return !d;
> +}
> +
> +/*
> + * Allocate new domain ID based on the hint.
> + *
> + * If hint is outside of valid [0..DOMID_FIRST_RESERVED - 1] range of IDs,
> + * perform an exhaustive search starting from the end of the used domain ID
> + * range, excluding hardware_domid.
> + */
> +domid_t domid_alloc(domid_t hint)
> +{
> +    domid_t domid = DOMID_INVALID;
> +
> +    if ( hint < DOMID_FIRST_RESERVED )
> +    {
> +        /* Exact match. */
> +        if ( is_free_domid(hint) )
> +            domid = hint;
> +    }
> +    else
> +    {
> +        for ( domid = domid_last + 1; domid != domid_last; domid++ )
> +        {
> +            if ( domid == DOMID_FIRST_RESERVED )
> +                domid = 0;
> +
> +            if ( domid == hardware_domid )
> +                continue;
> +
> +            if ( is_free_domid(domid) )
> +                break;
> +        }
> +
> +        if ( domid != domid_last )
> +            domid_last = domid;
> +    }
> +
> +    return domid;
> +}

The function name suggests the ID returned is firmly allocated by the time
the caller gets to see / use it. Yet that's not the case. Two back-to-back
calls here with the same argument will yield the same result, afaict. This
supports my prior statement that I don't think it is a good idea to
"centralize" things like this.

Jan


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Subject: Re: [PATCH v4 1/3] x86/vmx: Introduce vmread()
To: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, roger.pau@citrix.com, dmukhin@ford.com,
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On 26.04.2025 09:27, dmkhn@proton.me wrote:
> From: Denis Mukhin 
> 
> The current implementation of __vmread() returns the result via pointer
> argument which leads to excess code in some places.
> 
> Introduce a new vmread() function as suggested in [1].
> 
> [1] https://lore.kernel.org/xen-devel/c452a1d7-4a57-4c5f-8a83-36a74ff228ec@citrix.com/
> 
> Signed-off-by: Denis Mukhin 

Reviewed-by: Jan Beulich 




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Subject: Re: [PATCH v4 2/3] x86/vmx: Update DR7 type
To: dmkhn@proton.me
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On 26.04.2025 09:27, dmkhn@proton.me wrote:
> From: Denis Mukhin 
> 
> Convert the DR7 type to `unsigned int` and fix the accesses where necessary.
> 
> [1] https://lore.kernel.org/xen-devel/0d01646b-83e3-4a02-b365-d149d2664e73@citrix.com/
> 
> Signed-off-by: Denis Mukhin 

Reviewed-by: Jan Beulich 




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Date: Mon, 28 Apr 2025 11:41:04 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Ariadne Conill 
Cc: xen-devel@lists.xenproject.org, Paul Durrant ,
	Jan Beulich ,
	Andrew Cooper ,
	Alejandro Vallejo ,
	"Alexander M . Merritt" 
Subject: Re: [PATCH v2] x86/hyperv: use dynamically allocated page for
 hypercalls
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In-Reply-To: <20250425234331.65875-1-ariadne@ariadne.space>

On Fri, Apr 25, 2025 at 04:43:31PM -0700, Ariadne Conill wrote:
> Previously Xen placed the hypercall page at the highest possible MFN,
> but this caused problems on systems where there is more than 36 bits
> of physical address space.
> 
> In general, it also seems unreliable to assume that the highest possible
> MFN is not already reserved for some other purpose.
> 
> Changes from v1:
> - Continue to use fixmap infrastructure
> - Use panic in Hyper-V setup() function instead of returning -ENOMEM
>   on hypercall page allocation failure
> 
> Fixes: 620fc734f854 ("x86/hyperv: setup hypercall page")
> Cc: Alejandro Vallejo 
> Cc: Alexander M. Merritt 
> Signed-off-by: Ariadne Conill 
> ---
>  xen/arch/x86/guest/hyperv/hyperv.c      | 17 +++++++----------
>  xen/arch/x86/include/asm/guest/hyperv.h |  3 ---
>  2 files changed, 7 insertions(+), 13 deletions(-)
> 
> diff --git a/xen/arch/x86/guest/hyperv/hyperv.c b/xen/arch/x86/guest/hyperv/hyperv.c
> index 6989af38f1..0305374a06 100644
> --- a/xen/arch/x86/guest/hyperv/hyperv.c
> +++ b/xen/arch/x86/guest/hyperv/hyperv.c
> @@ -98,7 +98,13 @@ static void __init setup_hypercall_page(void)
>      rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
>      if ( !hypercall_msr.enable )
>      {
> -        mfn = HV_HCALL_MFN;
> +        void *hcall_page = alloc_xenheap_page();
> +        if ( !hcall_page )
> +            panic("Hyper-V: Failed to allocate hypercall trampoline page");
> +
> +        printk("Hyper-V: Allocated hypercall page @ %p.\n", hcall_page);

This likely wants to be a dprintk, and possibly also print the
physical address of the used page?  And no period at the end of the
sentence IMO.

I think Xen might have used the last page in the physical address
range to prevent HyperV from possibly shattering a superpage in the
second stage translation page-tables if normal RAM was used?

However I don't know whether HyperV will shatter super-pages if a
sub-page of it is used to contain the hypercall page (I don't think it
should?)

Thanks, Roger.


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Date: Mon, 28 Apr 2025 11:33:38 +0100
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CC: , , Jan Beulich
	, Andrew Cooper ,
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Subject: Re: [RFC 04/38] x86/hyperlaunch: convert vcpu0 creation to domain
 builder
From: Alejandro Vallejo 
To: "Daniel P. Smith" ,
	
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On Fri Apr 25, 2025 at 11:04 PM BST, Daniel P. Smith wrote:
> On 4/25/25 11:22, Alejandro Vallejo wrote:
>> On Sat Apr 19, 2025 at 11:07 PM BST, Daniel P. Smith wrote:
>>> Convert alloc_dom0_vcpu0() to dom0_set_affinity(), making it only set u=
p the
>>> node affinity based on command line parameters passed. At the same time=
,
>>> introduce alloc_dom_vcpu0() as the replacement for alloc_dom0_vcpu(). T=
hen have
>>> alloc_dom_vcpu0() call dom0_set_affinity() when the boot domain is the =
control
>>> domain, otherwise set the affinity to auto.
>>>
>>> Signed-off-by: Daniel P. Smith 
>>> ---
>>>   xen/arch/x86/dom0_build.c                 |  4 +---
>>>   xen/arch/x86/domain-builder/domain.c      | 11 +++++++++++
>>>   xen/arch/x86/include/asm/dom0_build.h     |  2 ++
>>>   xen/arch/x86/include/asm/domain-builder.h |  1 +
>>>   xen/arch/x86/setup.c                      |  5 +++--
>>>   5 files changed, 18 insertions(+), 5 deletions(-)
>>>
>>> diff --git a/xen/arch/x86/domain-builder/domain.c b/xen/arch/x86/domain=
-builder/domain.c
>>> index f2277b9e3cf3..619d36ea0b87 100644
>>> --- a/xen/arch/x86/domain-builder/domain.c
>>> +++ b/xen/arch/x86/domain-builder/domain.c
>>> @@ -9,6 +9,7 @@
>>>   #include 
>>>  =20
>>>   #include 
>>> +#include 
>>>  =20
>>>   unsigned int __init dom_max_vcpus(struct boot_domain *bd)
>>>   {
>>> @@ -27,6 +28,16 @@ unsigned int __init dom_max_vcpus(struct boot_domain=
 *bd)
>>>       return bd->max_vcpus;
>>>   }
>>>  =20
>>> +struct vcpu *__init alloc_dom_vcpu0(struct boot_domain *bd)
>>> +{
>>> +    if ( bd->capabilities & BUILD_CAPS_CONTROL )
>>> +        dom0_set_affinity(bd->d);
>>=20
>> Similar as before, this probably wants to be DOMAIN_CAPS_HARDWARE?
>>=20
>> I'll adjust while rebasing.
>
> Does it?
>
> v/r,
> dps

The situation is similar later on when choosing a CPU policy. Why
mustn't the hardware domain get the same treatment as the control
domains? Using (DOMAIN_CAPS_CONTROL | DOMAIN_CAPS_HARDWARE) at the
very least seems warranted.

All these cases single-out dom0 when dom0 is both a control and a
hardware domain, but as Jason mentioned how is Xen meant to deal with
dom0_X arguments when dom0 is disaggregated? Either it applies to all
its constituents (with the plausible exception of a xenstore domain), or
just one (the hardware domain), or none. Only applying to control
domains and not the hardware domain doesn't look right (to me).

Cheers,
Alejandro


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Date: Mon, 28 Apr 2025 11:41:09 +0100
Message-ID: 
From: Alejandro Vallejo 
To: Ariadne Conill , 
CC: Paul Durrant , Jan Beulich , Andrew
 Cooper , =?utf-8?q?Roger_Pau_Monn=C3=A9?=
	, "Alexander M . Merritt" 
Subject: Re: [PATCH v2] x86/hyperv: use dynamically allocated page for
 hypercalls
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On Sat Apr 26, 2025 at 12:43 AM BST, Ariadne Conill wrote:
> Previously Xen placed the hypercall page at the highest possible MFN,
> but this caused problems on systems where there is more than 36 bits
> of physical address space.
>
> In general, it also seems unreliable to assume that the highest possible
> MFN is not already reserved for some other purpose.

Thanks for sending this!

Just one more thing on top of what Jan mentioned.

>
> Changes from v1:
> - Continue to use fixmap infrastructure
> - Use panic in Hyper-V setup() function instead of returning -ENOMEM
>   on hypercall page allocation failure
>
> Fixes: 620fc734f854 ("x86/hyperv: setup hypercall page")
> Cc: Alejandro Vallejo 
> Cc: Alexander M. Merritt 
> Signed-off-by: Ariadne Conill 
> ---
>  xen/arch/x86/guest/hyperv/hyperv.c      | 17 +++++++----------
>  xen/arch/x86/include/asm/guest/hyperv.h |  3 ---
>  2 files changed, 7 insertions(+), 13 deletions(-)
>
> diff --git a/xen/arch/x86/guest/hyperv/hyperv.c b/xen/arch/x86/guest/hype=
rv/hyperv.c
> index 6989af38f1..0305374a06 100644
> --- a/xen/arch/x86/guest/hyperv/hyperv.c
> +++ b/xen/arch/x86/guest/hyperv/hyperv.c
> @@ -98,7 +98,13 @@ static void __init setup_hypercall_page(void)
>      rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
>      if ( !hypercall_msr.enable )
>      {
> -        mfn =3D HV_HCALL_MFN;
> +        void *hcall_page =3D alloc_xenheap_page();
> +        if ( !hcall_page )
> +            panic("Hyper-V: Failed to allocate hypercall trampoline page=
");
> +
> +        printk("Hyper-V: Allocated hypercall page @ %p.\n", hcall_page);

We should be printing the mfn (or maddr) rather than the virtual address
out of the allocator, IMO. Especially since we need to remap it anyway.

With that:

  Reviewed-by: Alejandro Vallejo 

Cheers,
Alejandro


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Date: Mon, 28 Apr 2025 12:43:47 +0200
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v1 06/14] xen/riscv: riscv_of_processor_hartid()
 implementation
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: 
 
 <65f5952a-8d2a-499c-bd66-53e9e2fbfa9c@suse.com>
 
 <859d0c87-dc90-44c2-ab30-5164eec0705c@suse.com>
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 <39f0a475-6eea-4c08-abb1-f3de25c5a549@suse.com>
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From: Oleksii Kurochko 
In-Reply-To: <39f0a475-6eea-4c08-abb1-f3de25c5a549@suse.com>

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On 4/28/25 8:31 AM, Jan Beulich wrote:
> On 25.04.2025 19:07, Oleksii Kurochko wrote:
>> On 4/15/25 3:45 PM, Jan Beulich wrote:
>>> On 15.04.2025 15:39, Oleksii Kurochko wrote:
>>>> On 4/10/25 5:53 PM, Jan Beulich wrote:
>>>>> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>>>>>> +{
>>>>>> +    const __be32 *cell;
>>>>>> +    int ac;
>>>>>> +    uint32_t len;
>>>>>> +
>>>>>> +    ac = dt_n_addr_cells(cpun);
>>>>>> +    cell = dt_get_property(cpun, "reg", &len);
>>>>>> +    if ( !cell || !ac || ((sizeof(*cell) * ac * (thread + 1)) > len) )
>>>>>> +        return ~0ULL;
>>>>> I'm sorry for my lack of DT knowledge, but what's "thread" representing here?
>>>>> You only pass in 0 below, so it's unclear whether it's what one might expect
>>>>> (the thread number on a multi-threaded core).
>>>> Based on the DT specification alone, the|`reg`| value could refer to either a CPU or a thread ID:
>>>> ```
>>>> The value of reg is a  that defines a unique CPU/thread id for
>>>> the CPU/threads represented by the CPU node. If a CPU supports more than one thread
>>>> (i.e. multiple streams of execution) the reg prop-erty is an array with 1 element
>>>> per thread.
>>>> ```
>>>>
>>>> My understanding is that the term/thread/ was used in the Linux kernel to cover both
>>>> cases.
>>>> When SMT isn't supported, the CPU can be considered to have a single thread.
>>>> For example, RISC-V uses the term/hardware thread/ to describe a hart (i.e., a CPU).
> Note the terminology ("CPU") you used here.
>
>>>> Interestingly, the Linux kernel always uses|thread = 0|.
>>>>
>>>> We could potentially drop this ambiguity and introduce an|ASSERT()| to check that
>>>> the|`reg`| property contains only one entry, representing the HART (CPU) ID:
>>>> ```
>>>>      Software can determine the number of threads by dividing the size of reg by the parent
>>>>      node’s #address-cells. If `|reg`| has more than one entry, it would simply SMT support
>>>>      is required.
>>>> ```
>>>>
>>>> Does that approach make sense, or should we stick with the current implementation?
>>> If extra enabling is required to make multi-thread CPUs work, then panic()ing
>>> (not so much ASSERT()ing) may make sense, for the time being. Better would be
>>> if we could use all threads in a system right away.
>> Actually, this function is ready to be used for multi-thread CPUs. A caller can request hardware id
>> by passing `thread` argument (`thread` -> the local thread number to get the hardware ID for).
>> So by calling:
>>    dt_get_cpu_hwid(cpu0, 0) -> it will return hardware id of thread 0 of cpu0
>>    dt_get_cpu_hwid(cpu0, 1) -> it will return hardware id of thread 1 of cpu0
>>    ...
>>
>> In our case we assume that SMP isn't supported so that is why it is used only dt_get_cpu_hwid(cpu0, 0).
>>
>> If one day, SMP will be enabled then it will be needed to change a callers of dt_get_cpu_hwid().
> I assume you meant SMT in both places you wrote SMP?

Yes, it should be SMT.

>   But my main point here is:
> If enumeration gives you "thread  of core " (using x86 terminology), you
> need to be quite careful with what you call "CPU". Things need to be entirely
> unambiguous, taking into account what internally in (common code) Xen we call a
> "CPU". You certainly may call "CPU" what is a collection of threads / harts,
> but you then need to clarify this in a prominent comment somewhere, and you
> need to be entirely consistent throughout the RISC-V sub-tree.

╭────────────────────╮
│        CPU          │  ← 1 physical processor (chip)
│ ┌───────┬─────────┐ │
│ │ Core 0│ Core 1  │ │  ← 2 cores (for example)
│ │ ┌──┬──┐ ┌──┬──┐ │ │
│ │Thr0 Thr1 Thr0 Thr1│ ← 2 threads on each core (SMT)
│ └───────┴─────────┘ │
╰────────────────────╯
I want to double check what Xen call a "CPU". I thought that Xen uses word
CPU to describe a core, right?

What you wrote above "thread  of core  (using x86 terminology)" is also correlated
with RISC-V terminology:
   A component is termed a core if it contains an independent instruction fetch unit.
   A RISC-V-compatible core might support multiple RISC-V-compatible hardware threads,
   or harts, through multithreading

I checked RISC-V's DTS binding and it seems it is a little bit contradictory to DTS spec,
where it is mentioned that reg property is used to describe how many threads a cpu  has
when SMP is used, but in RISC-V's dts binding they are describing a hardware execution
context:
   This document uses some terminology common to the RISC-V community
   that is not widely used, the definitions of which are listed here:

   hart: A hardware execution context, which contains all the state
   mandated by the RISC-V ISA: a PC and some registers.  This
   terminology is designed to disambiguate software's view of execution
   contexts from any particular microarchitectural implementation
   strategy.  For example, an Intel laptop containing one socket with
   two cores, each of which has two hyperthreads, could be described as
   having four harts.

So in RISC-V's DTS binding they are describing only hardware threads what makes things more
confusing in terms what kind terminology from Xen point of view should be used.

And based on what is written in RISC-V's dts binding:
  For example, an Intel laptop containing one socket with
  two cores, each of which has two hyperthreads, could be described as
  having four harts.
It would be more logical to drop 'thread' argument of riscv_of_get_cpu_hwid(const struct dt_device_node *cpun).
And then the question is what to do with the name of variable cpun? As it could be still confusing. Or, at least,
I can add the comment that CPUn in terms of RISC-V means hart (hardware thread). And then will it be needed to
add such comment for each usage of word "CPU"?

~ Oleksii



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On 4/28/25 8:31 AM, Jan Beulich wrote:

    

    

      
On 25.04.2025 19:07, Oleksii Kurochko wrote:


      

        
On 4/15/25 3:45 PM, Jan Beulich wrote:


        

          
On 15.04.2025 15:39, Oleksii Kurochko wrote:


          

            
On 4/10/25 5:53 PM, Jan Beulich wrote:


            

              
On 08.04.2025 17:57, Oleksii Kurochko wrote:


              

                
+{
+    const __be32 *cell;
+    int ac;
+    uint32_t len;
+
+    ac = dt_n_addr_cells(cpun);
+    cell = dt_get_property(cpun, "reg", &len);
+    if ( !cell || !ac || ((sizeof(*cell) * ac * (thread + 1)) > len) )
+        return ~0ULL;


              

              
I'm sorry for my lack of DT knowledge, but what's "thread" representing here?
You only pass in 0 below, so it's unclear whether it's what one might expect
(the thread number on a multi-threaded core).


            

            
Based on the DT specification alone, the|`reg`| value could refer to either a CPU or a thread ID:
```
The value of reg is a <prop-encoded-array> that defines a unique CPU/thread id for
the CPU/threads represented by the CPU node. If a CPU supports more than one thread
(i.e. multiple streams of execution) the reg prop-erty is an array with 1 element
per thread.
```

My understanding is that the term/thread/ was used in the Linux kernel to cover both
cases.
When SMT isn't supported, the CPU can be considered to have a single thread.
For example, RISC-V uses the term/hardware thread/ to describe a hart (i.e., a CPU).


          

        

      

      
Note the terminology ("CPU") you used here.



      

        

          

            
Interestingly, the Linux kernel always uses|thread = 0|.

We could potentially drop this ambiguity and introduce an|ASSERT()| to check that
the|`reg`| property contains only one entry, representing the HART (CPU) ID:
```
    Software can determine the number of threads by dividing the size of reg by the parent
    node’s #address-cells. If `|reg`| has more than one entry, it would simply SMT support
    is required.
```

Does that approach make sense, or should we stick with the current implementation?


          

          
If extra enabling is required to make multi-thread CPUs work, then panic()ing
(not so much ASSERT()ing) may make sense, for the time being. Better would be
if we could use all threads in a system right away.


        

        
Actually, this function is ready to be used for multi-thread CPUs. A caller can request hardware id
by passing `thread` argument (`thread` -> the local thread number to get the hardware ID for).
So by calling:
  dt_get_cpu_hwid(cpu0, 0) -> it will return hardware id of thread 0 of cpu0
  dt_get_cpu_hwid(cpu0, 1) -> it will return hardware id of thread 1 of cpu0
  ...

In our case we assume that SMP isn't supported so that is why it is used only dt_get_cpu_hwid(cpu0, 0).

If one day, SMP will be enabled then it will be needed to change a callers of dt_get_cpu_hwid().


      

      
I assume you meant SMT in both places you wrote SMP?

    

    
Yes, it should be SMT.


    

      
 But my main point here is:
If enumeration gives you "thread <N> of core <M>" (using x86 terminology), you
need to be quite careful with what you call "CPU". Things need to be entirely
unambiguous, taking into account what internally in (common code) Xen we call a
"CPU". You certainly may call "CPU" what is a collection of threads / harts,
but you then need to clarify this in a prominent comment somewhere, and you
need to be entirely consistent throughout the RISC-V sub-tree.

    

    
╭────────────────────╮
│        CPU          │  ← 1 physical processor (chip)
│ ┌───────┬─────────┐ │
│ │ Core 0│ Core 1  │ │  ← 2 cores (for example)
│ │ ┌──┬──┐ ┌──┬──┐ │ │
│ │Thr0 Thr1 Thr0 Thr1│ ← 2 threads on each core (SMT)
│ └───────┴─────────┘ │
╰────────────────────╯
I want to double check what Xen call a "CPU". I thought that Xen uses word
CPU to describe a core, right?

What you wrote above "thread <N> of core <M> (using x86 terminology)" is also correlated
with RISC-V terminology:
  A component is termed a core if it contains an independent instruction fetch unit.
  A RISC-V-compatible core might support multiple RISC-V-compatible hardware threads,
  or harts, through multithreading

I checked RISC-V's DTS binding and it seems it is a little bit contradictory to DTS spec,
where it is mentioned that reg property is used to describe how many threads a cpu  has
when SMP is used, but in RISC-V's dts binding they are describing a hardware execution
context:
  This document uses some terminology common to the RISC-V community
  that is not widely used, the definitions of which are listed here:

  hart: A hardware execution context, which contains all the state
  mandated by the RISC-V ISA: a PC and some registers.  This
  terminology is designed to disambiguate software's view of execution
  contexts from any particular microarchitectural implementation
  strategy.  For example, an Intel laptop containing one socket with
  two cores, each of which has two hyperthreads, could be described as
  having four harts.

So in RISC-V's DTS binding they are describing only hardware threads what makes things more
confusing in terms what kind terminology from Xen point of view should be used.

And based on what is written in RISC-V's dts binding:
 For example, an Intel laptop containing one socket with
 two cores, each of which has two hyperthreads, could be described as
 having four harts.
It would be more logical to drop 'thread' argument of riscv_of_get_cpu_hwid(const struct dt_device_node *cpun).
And then the question is what to do with the name of variable cpun? As it could be still confusing. Or, at least,
I can add the comment that CPUn in terms of RISC-V means hart (hardware thread). And then will it be needed to
add such comment for each usage of word "CPU"?


    
~ Oleksii





  


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Date: Mon, 28 Apr 2025 11:55:31 +0100
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CC: , Paul Durrant , "Jan
 Beulich" , Andrew Cooper ,
	"Alexander M . Merritt" 
Subject: Re: [PATCH v2] x86/hyperv: use dynamically allocated page for
 hypercalls
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On Mon Apr 28, 2025 at 10:41 AM BST, Roger Pau Monn=C3=A9 wrote:
> On Fri, Apr 25, 2025 at 04:43:31PM -0700, Ariadne Conill wrote:
>> Previously Xen placed the hypercall page at the highest possible MFN,
>> but this caused problems on systems where there is more than 36 bits
>> of physical address space.
>>=20
>> In general, it also seems unreliable to assume that the highest possible
>> MFN is not already reserved for some other purpose.
>>=20
>> Changes from v1:
>> - Continue to use fixmap infrastructure
>> - Use panic in Hyper-V setup() function instead of returning -ENOMEM
>>   on hypercall page allocation failure
>>=20
>> Fixes: 620fc734f854 ("x86/hyperv: setup hypercall page")
>> Cc: Alejandro Vallejo 
>> Cc: Alexander M. Merritt 
>> Signed-off-by: Ariadne Conill 
>> ---
>>  xen/arch/x86/guest/hyperv/hyperv.c      | 17 +++++++----------
>>  xen/arch/x86/include/asm/guest/hyperv.h |  3 ---
>>  2 files changed, 7 insertions(+), 13 deletions(-)
>>=20
>> diff --git a/xen/arch/x86/guest/hyperv/hyperv.c b/xen/arch/x86/guest/hyp=
erv/hyperv.c
>> index 6989af38f1..0305374a06 100644
>> --- a/xen/arch/x86/guest/hyperv/hyperv.c
>> +++ b/xen/arch/x86/guest/hyperv/hyperv.c
>> @@ -98,7 +98,13 @@ static void __init setup_hypercall_page(void)
>>      rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
>>      if ( !hypercall_msr.enable )
>>      {
>> -        mfn =3D HV_HCALL_MFN;
>> +        void *hcall_page =3D alloc_xenheap_page();
>> +        if ( !hcall_page )
>> +            panic("Hyper-V: Failed to allocate hypercall trampoline pag=
e");
>> +
>> +        printk("Hyper-V: Allocated hypercall page @ %p.\n", hcall_page)=
;
>
> This likely wants to be a dprintk, and possibly also print the
> physical address of the used page?  And no period at the end of the
> sentence IMO.
>
> I think Xen might have used the last page in the physical address
> range to prevent HyperV from possibly shattering a superpage in the
> second stage translation page-tables if normal RAM was used?
>
> However I don't know whether HyperV will shatter super-pages if a
> sub-page of it is used to contain the hypercall page (I don't think it
> should?)

I think it's quite unlikely. Seeing how Linux simply vmalloc()s and
Microsoft seems to genuinely care about Linux in this day and age. It
seems fair to assume Hyper-V might just copy the old memory out and
rewrite it with the trampoline contents when enabling the MSR, thereby
keeping superpages together in their p2m.

>
> Thanks, Roger.

Cheers,
Alejandro


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Date: Mon, 28 Apr 2025 13:01:29 +0200
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Subject: Re: [RFC 04/38] x86/hyperlaunch: convert vcpu0 creation to domain
 builder
To: Alejandro Vallejo 
Cc: jason.andryuk@amd.com, stefano.stabellini@amd.com,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 "Daniel P. Smith" ,
 xen-devel@lists.xenproject.org
References: <20250419220820.4234-1-dpsmith@apertussolutions.com>
 <20250419220820.4234-5-dpsmith@apertussolutions.com>
 
 <9cad677f-cfcd-4eec-b824-01d281cb7076@apertussolutions.com>
 
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From: Jan Beulich 
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On 28.04.2025 12:33, Alejandro Vallejo wrote:
> On Fri Apr 25, 2025 at 11:04 PM BST, Daniel P. Smith wrote:
>> On 4/25/25 11:22, Alejandro Vallejo wrote:
>>> On Sat Apr 19, 2025 at 11:07 PM BST, Daniel P. Smith wrote:
>>>> Convert alloc_dom0_vcpu0() to dom0_set_affinity(), making it only set up the
>>>> node affinity based on command line parameters passed. At the same time,
>>>> introduce alloc_dom_vcpu0() as the replacement for alloc_dom0_vcpu(). Then have
>>>> alloc_dom_vcpu0() call dom0_set_affinity() when the boot domain is the control
>>>> domain, otherwise set the affinity to auto.
>>>>
>>>> Signed-off-by: Daniel P. Smith 
>>>> ---
>>>>   xen/arch/x86/dom0_build.c                 |  4 +---
>>>>   xen/arch/x86/domain-builder/domain.c      | 11 +++++++++++
>>>>   xen/arch/x86/include/asm/dom0_build.h     |  2 ++
>>>>   xen/arch/x86/include/asm/domain-builder.h |  1 +
>>>>   xen/arch/x86/setup.c                      |  5 +++--
>>>>   5 files changed, 18 insertions(+), 5 deletions(-)
>>>>
>>>> diff --git a/xen/arch/x86/domain-builder/domain.c b/xen/arch/x86/domain-builder/domain.c
>>>> index f2277b9e3cf3..619d36ea0b87 100644
>>>> --- a/xen/arch/x86/domain-builder/domain.c
>>>> +++ b/xen/arch/x86/domain-builder/domain.c
>>>> @@ -9,6 +9,7 @@
>>>>   #include 
>>>>   
>>>>   #include 
>>>> +#include 
>>>>   
>>>>   unsigned int __init dom_max_vcpus(struct boot_domain *bd)
>>>>   {
>>>> @@ -27,6 +28,16 @@ unsigned int __init dom_max_vcpus(struct boot_domain *bd)
>>>>       return bd->max_vcpus;
>>>>   }
>>>>   
>>>> +struct vcpu *__init alloc_dom_vcpu0(struct boot_domain *bd)
>>>> +{
>>>> +    if ( bd->capabilities & BUILD_CAPS_CONTROL )
>>>> +        dom0_set_affinity(bd->d);
>>>
>>> Similar as before, this probably wants to be DOMAIN_CAPS_HARDWARE?
>>>
>>> I'll adjust while rebasing.
>>
>> Does it?
>>
>> v/r,
>> dps
> 
> The situation is similar later on when choosing a CPU policy. Why
> mustn't the hardware domain get the same treatment as the control
> domains? Using (DOMAIN_CAPS_CONTROL | DOMAIN_CAPS_HARDWARE) at the
> very least seems warranted.
> 
> All these cases single-out dom0 when dom0 is both a control and a
> hardware domain, but as Jason mentioned how is Xen meant to deal with
> dom0_X arguments when dom0 is disaggregated? Either it applies to all
> its constituents (with the plausible exception of a xenstore domain),

This one-fits-all seems very unlikely to me to make sense, while

> or just one (the hardware domain), or none.

... either of these would. "None" in particular might if all config
information is coming from e.g. DT anyway in such an setup.

> Only applying to control
> domains and not the hardware domain doesn't look right (to me).

+1

Jan


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Date: Mon, 28 Apr 2025 12:05:07 +0100
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CC: Jan Beulich , Andrew Cooper
	, =?utf-8?q?Roger_Pau_Monn=C3=A9?=
	, Anthony PERARD , "Michal
 Orzel" , Julien Grall , "Stefano
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Subject: Re: [PATCH v5 05/12] x86/hyperlaunch: locate dom0 kernel with
 hyperlaunch
From: Alejandro Vallejo 
To: "Daniel P. Smith" ,
	
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On Fri Apr 25, 2025 at 11:32 PM BST, Daniel P. Smith wrote:
> On 4/24/25 12:10, Alejandro Vallejo wrote:
>> From: "Daniel P. Smith" 
>>=20
>> Look for a subnode of type `multiboot,kernel` within a domain node. If
>> found, locate it using the multiboot module helper to generically ensure
>> it lives in the module list. If the bootargs property is present and
>> there was not an MB1 string, then use the command line from the device
>> tree definition.
>>=20
>> Signed-off-by: Daniel P. Smith 
>> Signed-off-by: Jason Andryuk 
>> Signed-off-by: Alejandro Vallejo 
>> ---
>> v5:
>>    * Add domain name to the error path on no-kernel.
>> ---
>>   xen/arch/x86/setup.c            |  1 +
>>   xen/common/domain-builder/fdt.c | 64 +++++++++++++++++++++++++++++++--
>>   2 files changed, 62 insertions(+), 3 deletions(-)
>>=20
>> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
>> index bd13d9d196..7e756302ae 100644
>> --- a/xen/arch/x86/setup.c
>> +++ b/xen/arch/x86/setup.c
>> @@ -1290,6 +1290,7 @@ void asmlinkage __init noreturn __start_xen(void)
>>           i =3D first_boot_module_index(bi, BOOTMOD_UNKNOWN);
>>           bi->mods[i].type =3D BOOTMOD_KERNEL;
>>           bi->domains[0].kernel =3D &bi->mods[i];
>> +        bi->nr_domains =3D 1;
>>           bi->hyperlaunch_enabled =3D false;
>>       }
>>  =20
>> diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder=
/fdt.c
>> index 11f0436e85..662c715483 100644
>> --- a/xen/common/domain-builder/fdt.c
>> +++ b/xen/common/domain-builder/fdt.c
>> @@ -99,9 +99,9 @@ static int __init fdt_prop_as_reg(const struct fdt_pro=
perty *prop,
>>    * @return              -EINVAL on malformed nodes, otherwise
>>    *                      index inside `bi->mods`
>>    */
>> -int __init fdt_read_multiboot_module(const void *fdt, int node,
>> -                                     int address_cells, int size_cells,
>> -                                     struct boot_info *bi)
>> +static int __init fdt_read_multiboot_module(const void *fdt, int node,
>> +                                            int address_cells, int size=
_cells,
>> +                                            struct boot_info *bi)
>
> Shouldn't this belong to when the function was introduced? Though=20
> looking there, you push it out into the header? Guess the real question=
=20
> is it static or not?

It's to ensure MISRA compliance on the previous commit. See:

  https://lore.kernel.org/xen-devel/173f7129e82958a9737627129ac3c5be@bugsen=
g.com/

Cheers,
Alejandro


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Date: Mon, 28 Apr 2025 12:07:18 +0100
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Subject: Re: [PATCH v2] x86/hyperv: use dynamically allocated page for
 hypercalls
To: Alejandro Vallejo ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Ariadne Conill , Wei Liu 
Cc: xen-devel@lists.xenproject.org, Paul Durrant ,
 Jan Beulich , "Alexander M . Merritt"
 
References: <20250425234331.65875-1-ariadne@ariadne.space>
  
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On 28/04/2025 11:55 am, Alejandro Vallejo wrote:
> On Mon Apr 28, 2025 at 10:41 AM BST, Roger Pau Monné wrote:
>> On Fri, Apr 25, 2025 at 04:43:31PM -0700, Ariadne Conill wrote:
>>> Previously Xen placed the hypercall page at the highest possible MFN,
>>> but this caused problems on systems where there is more than 36 bits
>>> of physical address space.
>>>
>>> In general, it also seems unreliable to assume that the highest possible
>>> MFN is not already reserved for some other purpose.
>>>
>>> Changes from v1:
>>> - Continue to use fixmap infrastructure
>>> - Use panic in Hyper-V setup() function instead of returning -ENOMEM
>>>   on hypercall page allocation failure
>>>
>>> Fixes: 620fc734f854 ("x86/hyperv: setup hypercall page")
>>> Cc: Alejandro Vallejo 
>>> Cc: Alexander M. Merritt 
>>> Signed-off-by: Ariadne Conill 
>>> ---
>>>  xen/arch/x86/guest/hyperv/hyperv.c      | 17 +++++++----------
>>>  xen/arch/x86/include/asm/guest/hyperv.h |  3 ---
>>>  2 files changed, 7 insertions(+), 13 deletions(-)
>>>
>>> diff --git a/xen/arch/x86/guest/hyperv/hyperv.c b/xen/arch/x86/guest/hyperv/hyperv.c
>>> index 6989af38f1..0305374a06 100644
>>> --- a/xen/arch/x86/guest/hyperv/hyperv.c
>>> +++ b/xen/arch/x86/guest/hyperv/hyperv.c
>>> @@ -98,7 +98,13 @@ static void __init setup_hypercall_page(void)
>>>      rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
>>>      if ( !hypercall_msr.enable )
>>>      {
>>> -        mfn = HV_HCALL_MFN;
>>> +        void *hcall_page = alloc_xenheap_page();
>>> +        if ( !hcall_page )
>>> +            panic("Hyper-V: Failed to allocate hypercall trampoline page");
>>> +
>>> +        printk("Hyper-V: Allocated hypercall page @ %p.\n", hcall_page);
>> This likely wants to be a dprintk, and possibly also print the
>> physical address of the used page?  And no period at the end of the
>> sentence IMO.
>>
>> I think Xen might have used the last page in the physical address
>> range to prevent HyperV from possibly shattering a superpage in the
>> second stage translation page-tables if normal RAM was used?
>>
>> However I don't know whether HyperV will shatter super-pages if a
>> sub-page of it is used to contain the hypercall page (I don't think it
>> should?)
> I think it's quite unlikely.

It will shatter superpages.

The overlay is not part of guest memory, and will hide whatever is
behind it while it is mapped, which will force a 4k PTE in EPT/NPT.

Thinking about it, a better position would be adjacent to the APIC MMIO
window, so at 0xfee01000.  The APIC MMIO window is forced to be a 4k
mapping too, and the rest of the 2M window is normally empty.

~Andrew


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Subject: Re: [PATCH v2] x86/hyperv: use dynamically allocated page for
 hypercalls
To: Ariadne Conill , xen-devel@lists.xenproject.org
Cc: Paul Durrant , Jan Beulich ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Alejandro Vallejo ,
 "Alexander M . Merritt" 
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In-Reply-To: <20250425234331.65875-1-ariadne@ariadne.space>
Content-Type: text/plain; charset=UTF-8
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On 26/04/2025 12:43 am, Ariadne Conill wrote:
> diff --git a/xen/arch/x86/guest/hyperv/hyperv.c b/xen/arch/x86/guest/hyperv/hyperv.c
> index 6989af38f1..0305374a06 100644
> --- a/xen/arch/x86/guest/hyperv/hyperv.c
> +++ b/xen/arch/x86/guest/hyperv/hyperv.c
> @@ -98,7 +98,13 @@ static void __init setup_hypercall_page(void)
>      rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
>      if ( !hypercall_msr.enable )
>      {
> -        mfn = HV_HCALL_MFN;
> +        void *hcall_page = alloc_xenheap_page();
> +        if ( !hcall_page )
> +            panic("Hyper-V: Failed to allocate hypercall trampoline page");

\n

~Andrew


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Subject: Re: [PATCH v1 06/14] xen/riscv: riscv_of_processor_hartid()
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To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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From: Jan Beulich 
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On 28.04.2025 12:43, Oleksii Kurochko wrote:
> 
> On 4/28/25 8:31 AM, Jan Beulich wrote:
>> On 25.04.2025 19:07, Oleksii Kurochko wrote:
>>> On 4/15/25 3:45 PM, Jan Beulich wrote:
>>>> On 15.04.2025 15:39, Oleksii Kurochko wrote:
>>>>> On 4/10/25 5:53 PM, Jan Beulich wrote:
>>>>>> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>>>>>>> +{
>>>>>>> +    const __be32 *cell;
>>>>>>> +    int ac;
>>>>>>> +    uint32_t len;
>>>>>>> +
>>>>>>> +    ac = dt_n_addr_cells(cpun);
>>>>>>> +    cell = dt_get_property(cpun, "reg", &len);
>>>>>>> +    if ( !cell || !ac || ((sizeof(*cell) * ac * (thread + 1)) > len) )
>>>>>>> +        return ~0ULL;
>>>>>> I'm sorry for my lack of DT knowledge, but what's "thread" representing here?
>>>>>> You only pass in 0 below, so it's unclear whether it's what one might expect
>>>>>> (the thread number on a multi-threaded core).
>>>>> Based on the DT specification alone, the|`reg`| value could refer to either a CPU or a thread ID:
>>>>> ```
>>>>> The value of reg is a  that defines a unique CPU/thread id for
>>>>> the CPU/threads represented by the CPU node. If a CPU supports more than one thread
>>>>> (i.e. multiple streams of execution) the reg prop-erty is an array with 1 element
>>>>> per thread.
>>>>> ```
>>>>>
>>>>> My understanding is that the term/thread/ was used in the Linux kernel to cover both
>>>>> cases.
>>>>> When SMT isn't supported, the CPU can be considered to have a single thread.
>>>>> For example, RISC-V uses the term/hardware thread/ to describe a hart (i.e., a CPU).
>> Note the terminology ("CPU") you used here.
>>
>>>>> Interestingly, the Linux kernel always uses|thread = 0|.
>>>>>
>>>>> We could potentially drop this ambiguity and introduce an|ASSERT()| to check that
>>>>> the|`reg`| property contains only one entry, representing the HART (CPU) ID:
>>>>> ```
>>>>>      Software can determine the number of threads by dividing the size of reg by the parent
>>>>>      node’s #address-cells. If `|reg`| has more than one entry, it would simply SMT support
>>>>>      is required.
>>>>> ```
>>>>>
>>>>> Does that approach make sense, or should we stick with the current implementation?
>>>> If extra enabling is required to make multi-thread CPUs work, then panic()ing
>>>> (not so much ASSERT()ing) may make sense, for the time being. Better would be
>>>> if we could use all threads in a system right away.
>>> Actually, this function is ready to be used for multi-thread CPUs. A caller can request hardware id
>>> by passing `thread` argument (`thread` -> the local thread number to get the hardware ID for).
>>> So by calling:
>>>    dt_get_cpu_hwid(cpu0, 0) -> it will return hardware id of thread 0 of cpu0
>>>    dt_get_cpu_hwid(cpu0, 1) -> it will return hardware id of thread 1 of cpu0
>>>    ...
>>>
>>> In our case we assume that SMP isn't supported so that is why it is used only dt_get_cpu_hwid(cpu0, 0).
>>>
>>> If one day, SMP will be enabled then it will be needed to change a callers of dt_get_cpu_hwid().
>> I assume you meant SMT in both places you wrote SMP?
> 
> Yes, it should be SMT.
> 
>>   But my main point here is:
>> If enumeration gives you "thread  of core " (using x86 terminology), you
>> need to be quite careful with what you call "CPU". Things need to be entirely
>> unambiguous, taking into account what internally in (common code) Xen we call a
>> "CPU". You certainly may call "CPU" what is a collection of threads / harts,
>> but you then need to clarify this in a prominent comment somewhere, and you
>> need to be entirely consistent throughout the RISC-V sub-tree.
> 
> ╭────────────────────╮
> │        CPU          │  ← 1 physical processor (chip)
> │ ┌───────┬─────────┐ │
> │ │ Core 0│ Core 1  │ │  ← 2 cores (for example)
> │ │ ┌──┬──┐ ┌──┬──┐ │ │
> │ │Thr0 Thr1 Thr0 Thr1│ ← 2 threads on each core (SMT)
> │ └───────┴─────────┘ │
> ╰────────────────────╯
> I want to double check what Xen call a "CPU". I thought that Xen uses word
> CPU to describe a core, right?

No, see e.g. cpumask.h - it's a hart (as per below) that we internally describe
as CPU (leaving aside potentially ambiguous comments here and there, which is
what I'd like to prevent from the start for RISC-V).

> What you wrote above "thread  of core  (using x86 terminology)" is also correlated
> with RISC-V terminology:
>    A component is termed a core if it contains an independent instruction fetch unit.
>    A RISC-V-compatible core might support multiple RISC-V-compatible hardware threads,
>    or harts, through multithreading
> 
> I checked RISC-V's DTS binding and it seems it is a little bit contradictory to DTS spec,
> where it is mentioned that reg property is used to describe how many threads a cpu  has
> when SMP is used, but in RISC-V's dts binding they are describing a hardware execution
> context:
>    This document uses some terminology common to the RISC-V community
>    that is not widely used, the definitions of which are listed here:
> 
>    hart: A hardware execution context, which contains all the state
>    mandated by the RISC-V ISA: a PC and some registers.  This
>    terminology is designed to disambiguate software's view of execution
>    contexts from any particular microarchitectural implementation
>    strategy.  For example, an Intel laptop containing one socket with
>    two cores, each of which has two hyperthreads, could be described as
>    having four harts.
> 
> So in RISC-V's DTS binding they are describing only hardware threads what makes things more
> confusing in terms what kind terminology from Xen point of view should be used.
> 
> And based on what is written in RISC-V's dts binding:
>   For example, an Intel laptop containing one socket with
>   two cores, each of which has two hyperthreads, could be described as
>   having four harts.
> It would be more logical to drop 'thread' argument of riscv_of_get_cpu_hwid(const struct dt_device_node *cpun).
> And then the question is what to do with the name of variable cpun? As it could be still confusing. Or, at least,
> I can add the comment that CPUn in terms of RISC-V means hart (hardware thread).

If it's the normal thing you call a CPU, I don't think much commentary is
necessary. Then please just make sure you don't call anything else "CPU",
especially in identifiers.

> And then will it be needed to
> add such comment for each usage of word "CPU"?

No, that would go too far in any event. Hence why I said "clarify this in
a prominent comment somewhere".

Jan


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From: Mykyta Poturai 
To: Jan Beulich 
CC: Stewart Hildebrand , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , Volodymyr
 Babchuk , Andrew Cooper
	, Anthony PERARD ,
	=?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= ,
	"xen-devel@lists.xenproject.org" 
Subject: Re: [PATCH v9 7/8] xen/arm: enable dom0 to use PCI devices with
 pci-passthrough=no
Thread-Topic: [PATCH v9 7/8] xen/arm: enable dom0 to use PCI devices with
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Date: Mon, 28 Apr 2025 11:26:36 +0000
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Subject: [PATCH] x86emul: avoid UB shifts in FLDENV/FRSTOR handling
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16-bit quantities, no matter whether expressed as uint16_t or as
bitfield, will be promoted to plain int before doing any arithmetic on
them. Shifting such values by 16 will therefore shift into the sign bit,
which is UB if that bit becomes set. To account for all reads and all
writes accessing opposite members of the same union, introduce yet more
local variables to reduce the shift counts to 12.

Fixes: be55ed744ed8 ("x86emul: support FLDENV and FRSTOR")
Reported-by: Fabian Specht 
Signed-off-by: Jan Beulich 

--- a/xen/arch/x86/x86_emulate/blk.c
+++ b/xen/arch/x86/x86_emulate/blk.c
@@ -81,17 +81,19 @@ int x86_emul_blk(
             if ( !s->rex_prefix )
             {
                 /* Convert 32-bit real/vm86 to 32-bit prot format. */
-                unsigned int fip = fpstate.env.mode.real.fip_lo +
-                                   (fpstate.env.mode.real.fip_hi << 16);
-                unsigned int fdp = fpstate.env.mode.real.fdp_lo +
-                                   (fpstate.env.mode.real.fdp_hi << 16);
+                unsigned int fip = fpstate.env.mode.real.fip_lo & 0xf;
+                unsigned int fcs = (fpstate.env.mode.real.fip_lo >> 4) |
+                                   (fpstate.env.mode.real.fip_hi << 12);
+                unsigned int fdp = fpstate.env.mode.real.fdp_lo & 0xf;
+                unsigned int fds = (fpstate.env.mode.real.fdp_lo >> 4) |
+                                   (fpstate.env.mode.real.fdp_hi << 12);
                 unsigned int fop = fpstate.env.mode.real.fop;
 
-                fpstate.env.mode.prot.fip = fip & 0xf;
-                fpstate.env.mode.prot.fcs = fip >> 4;
+                fpstate.env.mode.prot.fip = fip;
+                fpstate.env.mode.prot.fcs = fcs;
                 fpstate.env.mode.prot.fop = fop;
-                fpstate.env.mode.prot.fdp = fdp & 0xf;
-                fpstate.env.mode.prot.fds = fdp >> 4;
+                fpstate.env.mode.prot.fdp = fdp;
+                fpstate.env.mode.prot.fds = fds;
             }
 
             if ( bytes == sizeof(fpstate.env) )
@@ -121,17 +123,19 @@ int x86_emul_blk(
             else
             {
                 /* Convert 16-bit real/vm86 to 32-bit prot format. */
-                unsigned int fip = env->mode.real.fip_lo +
-                                   (env->mode.real.fip_hi << 16);
-                unsigned int fdp = env->mode.real.fdp_lo +
-                                   (env->mode.real.fdp_hi << 16);
+                unsigned int fip = env->mode.real.fip_lo & 0xf;
+                unsigned int fcs = (env->mode.real.fip_lo >> 4) |
+                                   (env->mode.real.fip_hi << 12);
+                unsigned int fdp = env->mode.real.fdp_lo & 0xf;
+                unsigned int fds = (env->mode.real.fdp_lo >> 4) |
+                                   (env->mode.real.fdp_hi << 12);
                 unsigned int fop = env->mode.real.fop;
 
-                fpstate.env.mode.prot.fip = fip & 0xf;
-                fpstate.env.mode.prot.fcs = fip >> 4;
+                fpstate.env.mode.prot.fip = fip;
+                fpstate.env.mode.prot.fcs = fcs;
                 fpstate.env.mode.prot.fop = fop;
-                fpstate.env.mode.prot.fdp = fdp & 0xf;
-                fpstate.env.mode.prot.fds = fdp >> 4;
+                fpstate.env.mode.prot.fdp = fdp;
+                fpstate.env.mode.prot.fds = fds;
             }
 
             if ( bytes == sizeof(*env) )


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Date: Mon, 28 Apr 2025 13:36:21 +0200
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v9 7/8] xen/arm: enable dom0 to use PCI devices with
 pci-passthrough=no
To: Mykyta Poturai 
Cc: Stewart Hildebrand ,
 Stefano Stabellini , Julien Grall ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Andrew Cooper ,
 Anthony PERARD ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 "xen-devel@lists.xenproject.org" 
References: 
 <132afbca390edd6e9fd7b1ffacf6c5aff0d29aa7.1741958647.git.mykyta_poturai@epam.com>
 <7fa0bde7-3aa9-48f4-a0ed-d03216edcc4e@suse.com>
 
 
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From: Jan Beulich 
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On 28.04.2025 13:26, Mykyta Poturai wrote:
> On 28.04.25 12:01, Jan Beulich wrote:
>> On 28.04.2025 10:21, Mykyta Poturai wrote:
>>> On 17.03.25 17:07, Jan Beulich wrote:
>>>> On 14.03.2025 14:34, Mykyta Poturai wrote:
>>>>> --- a/xen/arch/arm/pci/pci.c
>>>>> +++ b/xen/arch/arm/pci/pci.c
>>>>> @@ -16,9 +16,18 @@
>>>>>    #include 
>>>>>    #include 
>>>>>    #include 
>>>>> +#include 
>>>>>    #include 
>>>>>    #include 
>>>>>    
>>>>> +bool is_pci_passthrough_enabled(bool dom0)
>>>>> +{
>>>>> +    if ( dom0 )
>>>>> +        return pci_passthrough_enabled || iommu_enabled;
>>>>
>>>> As I think I said before - the function's name now no longer expresses
>>>> what it really checks. That (imo heavily) misleading at the use sites
>>>> of this function.
>>>
>>> I've spent some more time thinking about how to better deal with this.
>>> In the end, I think your earlier suggestion about introducing a new arch
>>> specific function is the best approach, but I want to agree on the
>>> naming before sending new patches. Would "arch_requires_pci_physdev" be
>>> an appropriate name in your opinion?
>>>
>>> At the call sites it will look like this:
>>>       case PHYSDEVOP_pci_device_remove: {
>>>           struct physdev_pci_device dev;
>>>
>>>           if ( !is_pci_passthrough_enabled() && !arch_requires_pci_physdev())
>>>               return -EOPNOTSUPP;
>>
>> There are several questions that affect naming: Is it really "requires"? Is
>> it really all PCI-related physdevops? Is the ordering of naming elements in
>> line with what we use elsewhere (arch_ first is, but perhaps either pci or
>> physdevop wants to move earlier)?
> 
> I understand the issue with the ordering, will 
> "arch_pci_requires_physdev_ops" or "arch_physdev_pci_update_required" be 
> better? Regarding the specific ops, only add/remove are needed, but I am 
> not sure how to elegantly encode this in the name. Maybe you can suggest 
> something better if you have something specific in mind?

Simply arch_pci_device_physdevop()? This would also avoid the question if
it's "requires", "wants", or yet something else. (I'm not going to insist
that the verb be omitted, though. If it's included, I'd ask though that
it match in tense the "enabled" in the other predicate.) And it would cover
PHYSDEVOP_pci_device_reset as well, which sooner or later I expect you'll
discover you want/need Dom0 to issue, too.

Jan


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Subject: Re: [PATCH v4 1/3] x86/vmx: Introduce vmread()
To: dmkhn@proton.me, xen-devel@lists.xenproject.org
Cc: jbeulich@suse.com, roger.pau@citrix.com, dmukhin@ford.com
References: <20250426072720.39317-1-dmukhin@ford.com>
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On 26/04/2025 8:27 am, dmkhn@proton.me wrote:
> From: Denis Mukhin 
>
> The current implementation of __vmread() returns the result via pointer
> argument which leads to excess code in some places.
>
> Introduce a new vmread() function as suggested in [1].
>
> [1] https://lore.kernel.org/xen-devel/c452a1d7-4a57-4c5f-8a83-36a74ff228ec@citrix.com/

Usually for this, we use

Suggested-by: whoever

rather than links to emails.  I can fix on commit.

~Andrew


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To: dmkhn@proton.me, xen-devel@lists.xenproject.org
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On 26/04/2025 8:27 am, dmkhn@proton.me wrote:
> From: Denis Mukhin 
>
> Convert the DR7 type to `unsigned int` and fix the accesses where necessary.
>
> [1] https://lore.kernel.org/xen-devel/0d01646b-83e3-4a02-b365-d149d2664e73@citrix.com/
>
> Signed-off-by: Denis Mukhin 
> ---
>  xen/arch/x86/hvm/vmx/vmx.c        | 2 +-
>  xen/arch/x86/include/asm/domain.h | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c
> index 4883bd823d..75c6992172 100644
> --- a/xen/arch/x86/hvm/vmx/vmx.c
> +++ b/xen/arch/x86/hvm/vmx/vmx.c
> @@ -926,7 +926,7 @@ static void vmx_save_dr(struct vcpu *v)
>      v->arch.dr[3] = read_debugreg(3);
>      v->arch.dr6   = read_debugreg(6);
>      /* DR7 must be saved as it is used by vmx_restore_dr(). */
> -    __vmread(GUEST_DR7, &v->arch.dr7);
> +    v->arch.dr7 = vmread(GUEST_DR7);

Two minor points.  The = wants lining up for vertical tabulation, and ...

>  }
>  
>  static void __restore_debug_registers(struct vcpu *v)
> diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm/domain.h
> index 5fc1d1e5d0..a54ef3a8c1 100644
> --- a/xen/arch/x86/include/asm/domain.h
> +++ b/xen/arch/x86/include/asm/domain.h
> @@ -595,7 +595,7 @@ struct arch_vcpu
>  
>      /* Debug registers. */
>      unsigned long dr[4];
> -    unsigned long dr7; /* Ideally int, but __vmread() needs long. */
> +    unsigned int dr7;
>      unsigned int dr6;

... these fields want switching back around now that dr7 is unsigned int.

We always access in numeric order, and they're only out-of-order for
packing reasons.

Can fix on commit.

~Andrew


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Date: Mon, 28 Apr 2025 12:50:55 +0100
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CC: , Paul Durrant , "Jan
 Beulich" , "Alexander M . Merritt" 
Subject: Re: [PATCH v2] x86/hyperv: use dynamically allocated page for
 hypercalls
From: Alejandro Vallejo 
To: Andrew Cooper ,
	=?utf-8?q?Roger_Pau_Monn=C3=A9?= , Ariadne Conill
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On Mon Apr 28, 2025 at 12:07 PM BST, Andrew Cooper wrote:
> On 28/04/2025 11:55 am, Alejandro Vallejo wrote:
>> On Mon Apr 28, 2025 at 10:41 AM BST, Roger Pau Monn=C3=A9 wrote:
>>> On Fri, Apr 25, 2025 at 04:43:31PM -0700, Ariadne Conill wrote:
>>>> Previously Xen placed the hypercall page at the highest possible MFN,
>>>> but this caused problems on systems where there is more than 36 bits
>>>> of physical address space.
>>>>
>>>> In general, it also seems unreliable to assume that the highest possib=
le
>>>> MFN is not already reserved for some other purpose.
>>>>
>>>> Changes from v1:
>>>> - Continue to use fixmap infrastructure
>>>> - Use panic in Hyper-V setup() function instead of returning -ENOMEM
>>>>   on hypercall page allocation failure
>>>>
>>>> Fixes: 620fc734f854 ("x86/hyperv: setup hypercall page")
>>>> Cc: Alejandro Vallejo 
>>>> Cc: Alexander M. Merritt 
>>>> Signed-off-by: Ariadne Conill 
>>>> ---
>>>>  xen/arch/x86/guest/hyperv/hyperv.c      | 17 +++++++----------
>>>>  xen/arch/x86/include/asm/guest/hyperv.h |  3 ---
>>>>  2 files changed, 7 insertions(+), 13 deletions(-)
>>>>
>>>> diff --git a/xen/arch/x86/guest/hyperv/hyperv.c b/xen/arch/x86/guest/h=
yperv/hyperv.c
>>>> index 6989af38f1..0305374a06 100644
>>>> --- a/xen/arch/x86/guest/hyperv/hyperv.c
>>>> +++ b/xen/arch/x86/guest/hyperv/hyperv.c
>>>> @@ -98,7 +98,13 @@ static void __init setup_hypercall_page(void)
>>>>      rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
>>>>      if ( !hypercall_msr.enable )
>>>>      {
>>>> -        mfn =3D HV_HCALL_MFN;
>>>> +        void *hcall_page =3D alloc_xenheap_page();
>>>> +        if ( !hcall_page )
>>>> +            panic("Hyper-V: Failed to allocate hypercall trampoline p=
age");
>>>> +
>>>> +        printk("Hyper-V: Allocated hypercall page @ %p.\n", hcall_pag=
e);
>>> This likely wants to be a dprintk, and possibly also print the
>>> physical address of the used page?  And no period at the end of the
>>> sentence IMO.
>>>
>>> I think Xen might have used the last page in the physical address
>>> range to prevent HyperV from possibly shattering a superpage in the
>>> second stage translation page-tables if normal RAM was used?
>>>
>>> However I don't know whether HyperV will shatter super-pages if a
>>> sub-page of it is used to contain the hypercall page (I don't think it
>>> should?)
>> I think it's quite unlikely.
>
> It will shatter superpages.
>
> The overlay is not part of guest memory, and will hide whatever is
> behind it while it is mapped, which will force a 4k PTE in EPT/NPT.

That's an implementation detail. They can very well copy the trampoline
to guest memory when there is such (and save the previous contents
elsewhere) and restore them when disabling the trampoline. It's a
trivial optimisation that would prevent shattering while being fully
compliant with the TLFS.

The actual physical location of the trampoline is fully undefined. It
is defined to be an overlay; but that's a specification, not an
implementation.

>
> Thinking about it, a better position would be adjacent to the APIC MMIO
> window, so at 0xfee01000.=C2=A0 The APIC MMIO window is forced to be a 4k
> mapping too, and the rest of the 2M window is normally empty.
>

Sounds like an assumption waiting to be broken. Just like the last page
of guest-physical was.

Cheers,
Alejandro


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Date: Mon, 28 Apr 2025 13:58:56 +0200
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Subject: Re: [PATCH v4 3/3] x86/vmx: Replace __vmread() with vmread()
To: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, roger.pau@citrix.com,
 nicola.vetrini@bugseng.com, consulting@bugseng.com, dmukhin@ford.com,
 xen-devel@lists.xenproject.org
References: <20250426072819.39455-1-dmukhin@ford.com>
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From: Jan Beulich 
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On 26.04.2025 09:28, dmkhn@proton.me wrote:
> @@ -1957,8 +1955,7 @@ void cf_check vmx_do_resume(void)
>      hvm_do_resume(v);
>  
>      /* Sync host CR4 in case its value has changed. */
> -    __vmread(HOST_CR4, &host_cr4);
> -    if ( host_cr4 != read_cr4() )
> +    if ( vmread(HOST_CR4) != read_cr4() )

It's unclear to me whether this constitutes a violation of Misra rule 13.2.
There are two function calls in this expression. Both funcs are inline, and
vmread() is even always_inline, but they're still function calls, which can
be carried out in either order. And neither can plausibly be pure, let
alone const.

> @@ -1573,12 +1565,12 @@ static void cf_check vmx_get_nonreg_state(struct vcpu *v,
>  {
>      vmx_vmcs_enter(v);
>  
> -    __vmread(GUEST_ACTIVITY_STATE, &nrs->vmx.activity_state);
> -    __vmread(GUEST_INTERRUPTIBILITY_INFO, &nrs->vmx.interruptibility_info);
> -    __vmread(GUEST_PENDING_DBG_EXCEPTIONS, &nrs->vmx.pending_dbg);
> +    nrs->vmx.activity_state = vmread(GUEST_ACTIVITY_STATE);

This struct field can now also shrink down to unsigned int (or uit32_t if need
be). Likely there are others (and maybe also plain variables). Which in turn
is an indication that, as was suggested before, this patch wants further
splitting up. That'll also help with overall progress, as then what's
uncontroversial and not in need of further adjustment can go in right away.

Jan


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Date: Mon, 28 Apr 2025 14:30:41 +0200
From: "Arnd Bergmann" 
To: "Ingo Molnar" ,
 "Linus Torvalds" 
Cc: "Andrew Cooper" ,
 "Arnd Bergmann" , "Thomas Gleixner" ,
 "Ingo Molnar" , "Borislav Petkov" ,
 "Dave Hansen" , x86@kernel.org,
 "H. Peter Anvin" , "Juergen Gross" ,
 "Boris Ostrovsky" ,
 "Alexander Usyskin" ,
 "Greg Kroah-Hartman" ,
 =?UTF-8?Q?Mateusz_Jo=C5=84czyk?= ,
 "Mike Rapoport" , "Ard Biesheuvel" ,
 "Peter Zijlstra" , linux-kernel@vger.kernel.org,
 xen-devel@lists.xenproject.org
Message-Id: 
In-Reply-To: 
References: <20250425141740.734030-1-arnd@kernel.org>
 
 
 
 
 
 
  
 
Subject: Re: [PATCH] bitops/32: Convert variable_ffs() and fls() zero-case handling to
 C
Content-Type: text/plain
Content-Transfer-Encoding: 7bit

On Mon, Apr 28, 2025, at 09:14, Ingo Molnar wrote:
>
> ... and unless I messed up the patch, it seems to have a surprisingly 
> low impact - maybe because the compiler can amortize its cost by 
> adjusting all dependent code mostly at build time, so the +1 doesn't 
> end up being generated most of the time?

Is there any reason we can't just use the compiler-builtins directly
like we do on other architectures, at least for 32-bit?

Looking at a couple of vmlinux objects confirms the  findings from
fdb6649ab7c1 ("x86/asm/bitops: Use __builtin_ctzl() to evaluate
constant expressions") from looking at the object file that using
the built-in helpers is slightly better than the current asm code
for all 32-bit targets with both gcc and clang. It's also better
for 64-bit targets with clang, but not with gcc, where the inline
asm often saves a cmov but in other cases the compiler finds an
even better instruction sequence.

     Arnd

diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h
index eebbc8889e70..bdeae9a497e5 100644
--- a/arch/x86/include/asm/bitops.h
+++ b/arch/x86/include/asm/bitops.h
@@ -246,184 +246,18 @@ arch_test_bit_acquire(unsigned long nr, const volatile unsigned long *addr)
 					  variable_test_bit(nr, addr);
 }
 
-static __always_inline unsigned long variable__ffs(unsigned long word)
-{
-	asm("tzcnt %1,%0"
-		: "=r" (word)
-		: ASM_INPUT_RM (word));
-	return word;
-}
-
-/**
- * __ffs - find first set bit in word
- * @word: The word to search
- *
- * Undefined if no bit exists, so code should check against 0 first.
- */
-#define __ffs(word)				\
-	(__builtin_constant_p(word) ?		\
-	 (unsigned long)__builtin_ctzl(word) :	\
-	 variable__ffs(word))
-
-static __always_inline unsigned long variable_ffz(unsigned long word)
-{
-	return variable__ffs(~word);
-}
-
-/**
- * ffz - find first zero bit in word
- * @word: The word to search
- *
- * Undefined if no zero exists, so code should check against ~0UL first.
- */
-#define ffz(word)				\
-	(__builtin_constant_p(word) ?		\
-	 (unsigned long)__builtin_ctzl(~word) :	\
-	 variable_ffz(word))
-
-/*
- * __fls: find last set bit in word
- * @word: The word to search
- *
- * Undefined if no set bit exists, so code should check against 0 first.
- */
-static __always_inline unsigned long __fls(unsigned long word)
-{
-	if (__builtin_constant_p(word))
-		return BITS_PER_LONG - 1 - __builtin_clzl(word);
-
-	asm("bsr %1,%0"
-	    : "=r" (word)
-	    : ASM_INPUT_RM (word));
-	return word;
-}
-
 #undef ADDR
 
-#ifdef __KERNEL__
-static __always_inline int variable_ffs(int x)
-{
-	int r;
-
-#ifdef CONFIG_X86_64
-	/*
-	 * AMD64 says BSFL won't clobber the dest reg if x==0; Intel64 says the
-	 * dest reg is undefined if x==0, but their CPU architect says its
-	 * value is written to set it to the same as before, except that the
-	 * top 32 bits will be cleared.
-	 *
-	 * We cannot do this on 32 bits because at the very least some
-	 * 486 CPUs did not behave this way.
-	 */
-	asm("bsfl %1,%0"
-	    : "=r" (r)
-	    : ASM_INPUT_RM (x), "0" (-1));
-#elif defined(CONFIG_X86_CMOV)
-	asm("bsfl %1,%0\n\t"
-	    "cmovzl %2,%0"
-	    : "=&r" (r) : "rm" (x), "r" (-1));
-#else
-	asm("bsfl %1,%0\n\t"
-	    "jnz 1f\n\t"
-	    "movl $-1,%0\n"
-	    "1:" : "=r" (r) : "rm" (x));
-#endif
-	return r + 1;
-}
-
-/**
- * ffs - find first set bit in word
- * @x: the word to search
- *
- * This is defined the same way as the libc and compiler builtin ffs
- * routines, therefore differs in spirit from the other bitops.
- *
- * ffs(value) returns 0 if value is 0 or the position of the first
- * set bit if value is nonzero. The first (least significant) bit
- * is at position 1.
- */
-#define ffs(x) (__builtin_constant_p(x) ? __builtin_ffs(x) : variable_ffs(x))
-
-/**
- * fls - find last set bit in word
- * @x: the word to search
- *
- * This is defined in a similar way as the libc and compiler builtin
- * ffs, but returns the position of the most significant set bit.
- *
- * fls(value) returns 0 if value is 0 or the position of the last
- * set bit if value is nonzero. The last (most significant) bit is
- * at position 32.
- */
-static __always_inline int fls(unsigned int x)
-{
-	int r;
-
-	if (__builtin_constant_p(x))
-		return x ? 32 - __builtin_clz(x) : 0;
-
-#ifdef CONFIG_X86_64
-	/*
-	 * AMD64 says BSRL won't clobber the dest reg if x==0; Intel64 says the
-	 * dest reg is undefined if x==0, but their CPU architect says its
-	 * value is written to set it to the same as before, except that the
-	 * top 32 bits will be cleared.
-	 *
-	 * We cannot do this on 32 bits because at the very least some
-	 * 486 CPUs did not behave this way.
-	 */
-	asm("bsrl %1,%0"
-	    : "=r" (r)
-	    : ASM_INPUT_RM (x), "0" (-1));
-#elif defined(CONFIG_X86_CMOV)
-	asm("bsrl %1,%0\n\t"
-	    "cmovzl %2,%0"
-	    : "=&r" (r) : "rm" (x), "rm" (-1));
-#else
-	asm("bsrl %1,%0\n\t"
-	    "jnz 1f\n\t"
-	    "movl $-1,%0\n"
-	    "1:" : "=r" (r) : "rm" (x));
-#endif
-	return r + 1;
-}
-
-/**
- * fls64 - find last set bit in a 64-bit word
- * @x: the word to search
- *
- * This is defined in a similar way as the libc and compiler builtin
- * ffsll, but returns the position of the most significant set bit.
- *
- * fls64(value) returns 0 if value is 0 or the position of the last
- * set bit if value is nonzero. The last (most significant) bit is
- * at position 64.
- */
-#ifdef CONFIG_X86_64
-static __always_inline int fls64(__u64 x)
-{
-	int bitpos = -1;
-
-	if (__builtin_constant_p(x))
-		return x ? 64 - __builtin_clzll(x) : 0;
-	/*
-	 * AMD64 says BSRQ won't clobber the dest reg if x==0; Intel64 says the
-	 * dest reg is undefined if x==0, but their CPU architect says its
-	 * value is written to set it to the same as before.
-	 */
-	asm("bsrq %1,%q0"
-	    : "+r" (bitpos)
-	    : ASM_INPUT_RM (x));
-	return bitpos + 1;
-}
-#else
+#include 
+#include 
+#include 
+#include 
 #include 
-#endif
 
-#include 
 
+#include 
+#include 
 #include 
-
 #include 
 
 #include 
@@ -434,5 +268,4 @@ static __always_inline int fls64(__u64 x)
 
 #include 
 
-#endif /* __KERNEL__ */
 #endif /* _ASM_X86_BITOPS_H */


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From: Mykyta Poturai 
To: Julien Grall , "xen-devel@lists.xenproject.org"
	
CC: Stewart Hildebrand , Stefano Stabellini
	, Bertrand Marquis , Michal
 Orzel , Volodymyr Babchuk ,
	Andrew Cooper , Anthony PERARD
	, Jan Beulich ,
	=?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= 
Subject: Re: [PATCH v9 7/8] xen/arm: enable dom0 to use PCI devices with
 pci-passthrough=no
Thread-Topic: [PATCH v9 7/8] xen/arm: enable dom0 to use PCI devices with
 pci-passthrough=no
Thread-Index: AQHblOXdxbIbbkNtn0WSg/9tW2OJ47O5DGKAgAA8u4A=
Date: Mon, 28 Apr 2025 12:31:26 +0000
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 Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
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Subject: Re: [PATCH v2 2/6] docs: remove qemu-traditional support from
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From xen-devel-bounces@lists.xenproject.org Mon Apr 28 12:56:00 2025
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Date: Mon, 28 Apr 2025 13:55:52 +0100
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Subject: Re: [PATCH v9 7/8] xen/arm: enable dom0 to use PCI devices with
 pci-passthrough=no
Content-Language: en-GB
To: Mykyta Poturai ,
 "xen-devel@lists.xenproject.org" 
Cc: Stewart Hildebrand ,
 Stefano Stabellini ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Andrew Cooper ,
 Anthony PERARD , Jan Beulich ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
References: 
 <132afbca390edd6e9fd7b1ffacf6c5aff0d29aa7.1741958647.git.mykyta_poturai@epam.com>
 <7d376741-ff23-4618-83bd-415c8d8fa24e@xen.org>
 
From: Julien Grall 
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Hi,

On 28/04/2025 13:31, Mykyta Poturai wrote:
> On 28.04.25 11:54, Julien Grall wrote:
>> Hi Mykyta,
>>
>> On 14/03/2025 13:34, Mykyta Poturai wrote:
>>> From: Stewart Hildebrand 
>>>
>>> Enable the use of IOMMU + PCI in dom0 without having to specify
>>> "pci-passthrough=yes". We rely on dom0 to initialize the PCI controller
>>> and perform a PHYSDEVOP_pci_device_add call to add each device to SMMU.
>>
>> It would be good to explain why Xen cannot initialize the PCI
>> controller. Asking, because the reason is the PCI controller is too
>> complex, then you will likely need the same approach for PCI passthrough...
> 
> I think the main reason for this is complexity and the possibility of
> additional dependencies: there could be external clocks or reset pins
> that the PCI host depends on for working correctly. I will add this to
> the commit message. Regarding PCI passthrough, it is already using the
> same approach (at least on Arm). There are patches for enabling Xen on
> Arm to perform bus enumeration by itself by Luca Fancellu, but I haven't
> yet got to test them in a meaningful way.

Can you provide a link to the series? I would like to make sure we have 
a coherent approach. In particular, it is not clear to me how Dom0 and 
Xen will be able to coordinate the access to the PCI controller. Are we 
going to have a mediator?

> 
>>>
>>> Enable pci_init() for initializing Xen's internal PCI subsystem, and
>>> allow PHYSDEVOP_pci_device_add when pci-passthrough is disabled.
>>
>> Effectively, wouldn't this mean dom0 always *have* to call
>> PHYSDEVOP_pci_device_add? Otherwise, how would dom0 know whether it
>> needs to call PHSYDEVOP_pci_device_add?
>>
>> Cheers,
>>
> 
> Yes, I can't say for every system but with PCI host behind SMMU the
> PHYSDEVOP_pci_device_add call is required to use DMA.

Dom0 will not be able to know whether a device is protected by an IOMMU. 
So I guess it means the OS will need to be able to cope with an error 
(like on x86).

Cheers,

-- 
Julien Grall



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Message-ID: <18555bd2-393f-4b1d-8e0e-e2b6df17b602@suse.com>
Date: Mon, 28 Apr 2025 15:06:54 +0200
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Subject: Re: [PATCH v2 4/6] tools: remove qemu-traditional
To: Anthony PERARD 
Cc: xen-devel@lists.xenproject.org, Andrew Cooper
 , Anthony PERARD ,
 Michal Orzel , Jan Beulich ,
 Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Stefano Stabellini ,
 Oleksii Kurochko ,
 Community Manager ,
 Samuel Thibault 
References: <20250408123526.14613-1-jgross@suse.com>
 <20250408123526.14613-5-jgross@suse.com> 
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From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= 
To: Anthony PERARD 
Cc: xen-devel@lists.xenproject.org, Andrew Cooper
 , Anthony PERARD ,
 Michal Orzel , Jan Beulich ,
 Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Stefano Stabellini ,
 Oleksii Kurochko ,
 Community Manager ,
 Samuel Thibault 
Message-ID: <18555bd2-393f-4b1d-8e0e-e2b6df17b602@suse.com>
Subject: Re: [PATCH v2 4/6] tools: remove qemu-traditional
References: <20250408123526.14613-1-jgross@suse.com>
 <20250408123526.14613-5-jgross@suse.com> 
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From xen-devel-bounces@lists.xenproject.org Mon Apr 28 13:41:59 2025
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Date: Mon, 28 Apr 2025 06:41:09 -0700
From: "H. Peter Anvin" 
To: Ingo Molnar ,
        Linus Torvalds 
CC: Andrew Cooper , Arnd Bergmann ,
        Arnd Bergmann , Thomas Gleixner ,
        Ingo Molnar , Borislav Petkov ,
        Dave Hansen , x86@kernel.org,
        Juergen Gross ,
        Boris Ostrovsky ,
        Alexander Usyskin ,
        Greg Kroah-Hartman ,
        =?UTF-8?Q?Mateusz_Jo=C5=84czyk?= ,
        Mike Rapoport , Ard Biesheuvel ,
        Peter Zijlstra , linux-kernel@vger.kernel.org,
        xen-devel@lists.xenproject.org
Subject: =?US-ASCII?Q?Re=3A_=5BPATCH=5D_bitops/32=3A_Convert_variable?=
 =?US-ASCII?Q?=5Fffs=28=29_and_fls=28=29_zero-case_handling_to_C?=
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References: <20250425141740.734030-1-arnd@kernel.org>         
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On April 28, 2025 12:14:40 AM PDT, Ingo Molnar  wrote:
>
>* Ingo Molnar  wrote:
>
>> And once we remove 486, I think we can do the optimization below to=20
>> just assume the output doesn't get clobbered by BS*L in the=20
>> zero-case, right?
>>=20
>> In the text size space it's a substantial optimization on x86-32=20
>> defconfig:
>>=20
>>         text	   data	       bss	     dec	    hex	filename
>>   16,577,728    7598826    1744896      25921450        18b87aa vmlinux=
=2Evanilla      # CMOV+BS*L
>>   16,577,908	7598838	   1744896	25921642	18b886a	vmlinux=2Elinus_patch =
 # if()+BS*L
>>   16,573,568	7602922	   1744896	25921386	18b876a	vmlinux=2Enoclobber   =
 # BS*L
>
>And BTW, *that* is a price that all of non-486 x86-32 was paying for=20
>486 support=2E=2E=2E
>
>And, just out of intellectual curiosity, I also tried to measure the=20
>code generation price of the +1 standards-quirk in the fls()/ffs()=20
>interface as well:
>
>         text	   data	       bss	     dec	    hex	filename
>   16,577,728   7598826    1744896      25921450        18b87aa vmlinux=
=2Evanilla      # CMOV+BS*L
>   16,577,908	7598838	   1744896	25921642	18b886a	vmlinux=2Elinus_patch  =
# if()+BS*L
>   16,573,568	7602922	   1744896	25921386	18b876a	vmlinux=2Enoclobber    =
# BS*L
>   =2E=2E=2E=2E=2E=2E=2E=2E=2E=2E
>   16,573,552	7602922	   1744896	25921370	18b875a	vmlinux=2Ebroken       =
# BROKEN: 0 baseline instead of 1
>
>=2E=2E=2E and unless I messed up the patch, it seems to have a surprising=
ly=20
>low impact - maybe because the compiler can amortize its cost by=20
>adjusting all dependent code mostly at build time, so the +1 doesn't=20
>end up being generated most of the time?
>
>Thanks,
>
>	Ingo
>
>=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D>
>
>This broken patch is broken: it intentionally breaks the ffs()/fls()=20
>interface in an attempt to measure the code generation effects of=20
>interface details=2E
>
>NOT-Signed-off-by: 
>---
> arch/x86/include/asm/bitops=2Eh | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
>diff --git a/arch/x86/include/asm/bitops=2Eh b/arch/x86/include/asm/bitop=
s=2Eh
>index e3e94a806656=2E=2E21707696bafe 100644
>--- a/arch/x86/include/asm/bitops=2Eh
>+++ b/arch/x86/include/asm/bitops=2Eh
>@@ -318,7 +318,7 @@ static __always_inline int variable_ffs(int x)
> 	    : "=3Dr" (r)
> 	    : ASM_INPUT_RM (x), "0" (-1));
>=20
>-	return r + 1;
>+	return r;
> }
>=20
> /**
>@@ -362,7 +362,7 @@ static __always_inline int fls(unsigned int x)
> 	    : "=3Dr" (r)
> 	    : ASM_INPUT_RM (x), "0" (-1));
>=20
>-	return r + 1;
>+	return r;
> }
>=20
> /**

My recollection was that you can't assume that even for 586; that it is on=
ly safe for 686, but it has been a long time=2E=2E=2E


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On 2025-04-28 02:41, Jan Beulich wrote:
> On 26.04.2025 03:53, Daniel P. Smith wrote:
>> On 4/23/25 15:27, Jason Andryuk wrote:
>>> On 2025-04-19 18:08, Daniel P. Smith wrote:
>>>> The bzimage logic uses the unit global orig_image_len to hold the
>>>> original
>>>> module length for the kernel when the headroom is calculated. It then
>>>> uses
>>>> orig_image_len to locate the start of the bzimage when the expansion
>>>> is done.
>>>> This is an issue when more than one bzimage is processed by the headroom
>>>> calculation logic, as it will leave orig_image_len set to the length
>>>> of the
>>>> last bzimage it processed.
>>>>
>>>> The boot module work introduced storing the headroom size on a per module
>>>> basis. By passing in the headroom from the boot module, orig_image_len
>>>> is no
>>>> longer needed to locate the beginning of the bzimage after the allocated
>>>> headroom. The bzimage functions are reworked as such, allowing the
>>>> removal of
>>>> orig_image_len and enabling them to be reused by multiple kernel boot
>>>> modules.
>>>>
>>>> Signed-off-by: Daniel P. Smith 
>>>> ---
>>>>    xen/arch/x86/bzimage.c             | 38 ++++++++++++++++++------------
>>>>    xen/arch/x86/hvm/dom_build.c       |  3 ++-
>>>>    xen/arch/x86/include/asm/bzimage.h |  5 ++--
>>>>    xen/arch/x86/pv/dom0_build.c       |  3 ++-
>>>>    4 files changed, 30 insertions(+), 19 deletions(-)
>>>>
>>>> diff --git a/xen/arch/x86/bzimage.c b/xen/arch/x86/bzimage.c
>>>> index 66f648f311e4..32f0360d25b4 100644
>>>
>>>> @@ -103,13 +100,20 @@ unsigned long __init bzimage_headroom(void
>>>> *image_start,
>>>>        return headroom;
>>>>    }
>>>> -int __init bzimage_parse(void *image_base, void **image_start,
>>>> -                         unsigned long *image_len)
>>>> +int __init bzimage_parse(
>>>> +    void *image_base, void **image_start, unsigned long headroom,
>>>> +    unsigned long *image_len)
>>>>    {
>>>>        struct setup_header *hdr = (struct setup_header *)(*image_start);
>>>>        int err = bzimage_check(hdr, *image_len);
>>>> -    unsigned long output_len;
>>>> -
>>>> +    unsigned long module_len = *image_len;
>>>> +
>>>> +    /*
>>>> +     * Variable err will have one of three values:
>>>> +     *   -  < 0: a error occurred trying to inspect the contents
>>>> +     *   -  > 0: the image is a bzImage
>>>> +     *   - == 0: not a bzImage, could be raw elf or elf.gz (vmlinuz.gz)
>>>> +     */
>>>
>>> This comment seems a little independent of this change, so maybe it
>>> should be submitted separately.  Also, I think a better placement would
>>> be next to bzimage_check().
>>>
>>>>        if ( err < 0 )
>>>>            return err;
>>>> @@ -118,21 +122,25 @@ int __init bzimage_parse(void *image_base, void
>>>> **image_start,
>>>>            *image_start += (hdr->setup_sects + 1) * 512 + hdr-
>>>>> payload_offset;
>>>>            *image_len = hdr->payload_length;
>>>
>>> @here
>>>
>>>>        }
>>>> -
>>>> -    if ( elf_is_elfbinary(*image_start, *image_len) )
>>>> -        return 0;
>>>> +    else
>>>> +    {
>>>> +        if ( elf_is_elfbinary(*image_start, *image_len) )
>>>> +            return 0;
>>>> +        else
>>>> +            *image_len = *image_len - headroom;
>>>> +    }
>>>
>>> I don't like this extra indention which includes the return.  If you
>>> retain orig_image_len as a local variable, and set it above at "@here",
>>> you can have a smaller diff and leave cleaner logic.
>>
>> Right, but I find it sillier to be checking every kernel for elf when we
>> know it's a bzImage. While the elf check is fairly simplistic, it is
>> still multiple value checks.

bzimage_parse() needs to handle:
ELF
compressed ELF
bzImage

bzimage_check just returns
+     * Variable err will have one of three values:
+     *   -  < 0: a error occurred trying to inspect the contents
+     *   -  > 0: the image is a bzImage
+     *   - == 0: not a bzImage, could be raw elf or elf.gz (vmlinuz.gz)

The elf_is_elfbinary() check is needed to detect plain ELF files and 
skip decompression.

> Even without any extra local vars the above can be
> 
>      else if ( elf_is_elfbinary(*image_start, *image_len) )
>          return 0;
>      else
>          *image_len = *image_len - headroom;
> 
> which would already address the "extra indentation" aspect.

Yes.  Thanks, but this actually helps illustrate how Dan's change is 
incorrect.  Well, Dan's elimination of orig_image_len makes *image_len 
correct later, but I think there are further issues.

     if ( err > 0 ) <--- bzImage case
     {
         *image_start += (hdr->setup_sects + 1) * 512 + hdr->payload_offset;
         *image_len = hdr->payload_length;
     }
     else if ( elf_is_elfbinary(*image_start, *image_len) ) <--- ELF
         return 0;
     else <--- compressed ELF
         *image_len = *image_len - headroom;

My addition is to the bzImage case, since that is what I saw breaking 
and fixed.  Setting orig_image_len in the else of the bzImage case would 
not fix it.

Later changes:

 > -    output_len = output_length(*image_start, orig_image_len);

You drop output_len...

 > -
 > -    if ( (err = perform_gunzip(image_base, *image_start, 
orig_image_len)) > 0 )
 > -        err = decompress(*image_start, orig_image_len, image_base);
 > +    if ( (err = perform_gunzip(image_base, *image_start, 
*image_len)) > 0 )
 > +        err = decompress(*image_start, *image_len, image_base);
 >
 >       if ( !err )
 >       {
 > +        printk(XENLOG_ERR "%s(%d): decompression failed, reseting 
image start and len\n",
 > +               __func__, err);

... but this is actually the success case...

 >           *image_start = image_base;
 > -        *image_len = output_len;
 > +        *image_len = module_len;

... it should be writing output_len.

 >       }

Again, please just use the minimal change from the other email.  It is 
what I've been using, so tested and working.  That is your original 
conversion with the one line fixup and much easier to review.

Regards,
Jason


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From: Mykyta Poturai 
To: Julien Grall , "xen-devel@lists.xenproject.org"
	
CC: Stewart Hildebrand , Stefano Stabellini
	, Bertrand Marquis , Michal
 Orzel , Volodymyr Babchuk ,
	Andrew Cooper , Anthony PERARD
	, Jan Beulich ,
	=?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= 
Subject: Re: [PATCH v9 7/8] xen/arm: enable dom0 to use PCI devices with
 pci-passthrough=no
Thread-Topic: [PATCH v9 7/8] xen/arm: enable dom0 to use PCI devices with
 pci-passthrough=no
Thread-Index: AQHblOXdxbIbbkNtn0WSg/9tW2OJ47O5DGKAgAA8u4CAAAbVAIAAGfaA
Date: Mon, 28 Apr 2025 14:28:48 +0000
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Date: Mon, 28 Apr 2025 16:12:12 +0100
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CC: , Anthony PERARD
	, Andrew Cooper ,
	Michal Orzel , Jan Beulich , "Julien
 Grall" , =?utf-8?q?Roger_Pau_Monn=C3=A9?=
	, Stefano Stabellini ,
	Xen-devel 
Subject: Re: [PATCH v2 2/6] docs: remove qemu-traditional support from
 documentation
From: Alejandro Vallejo 
To: Anthony PERARD , Juergen Gross 
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On Thu Apr 24, 2025 at 10:41 AM BST, Anthony PERARD wrote:
> On Tue, Apr 08, 2025 at 02:35:20PM +0200, Juergen Gross wrote:
>> @@ -1903,10 +1894,7 @@ it may be useful to request a different one, like=
 UEFI.
>> =20
>>  =3Ditem B
>> =20
>> -Loads ROMBIOS, a 16-bit x86 compatible BIOS. This is used by default
>> -when B. This is the only B=
IOS
>> -option supported when B. T=
his is
>> -the BIOS used by all previous Xen versions.
>> +Loads ROMBIOS, a 16-bit x86 compatible BIOS.
>
> This option is not valid anymore, libxl will complain with:
>     "qemu-xen does not support bios=3Drombios."

Sounds like a good time to remove bios=3Drombios altogether and strictly
support bios=3Dseabios only (plus the override).

>
> And I have no idea if it can work on not, I just know that XenServer
> still use RomBIOS with a patched QEMU.

Not XCP-ng? Regardless, none of them do so via xl or libxl.

Cheers,
Alejandro


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Subject: Re: [PATCH v2 2/6] docs: remove qemu-traditional support from
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To: Alejandro Vallejo ,
 Anthony PERARD 
Cc: xen-devel@lists.xenproject.org, Anthony PERARD
 , Andrew Cooper ,
 Michal Orzel , Jan Beulich ,
 Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Stefano Stabellini ,
 Xen-devel 
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Date: Mon, 28 Apr 2025 17:31:58 +0200
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Subject: Re: [PATCH v4 02/15] xen/cpufreq: extract _PSD info from "struct
 xen_processor_performance"
To: Penny Zheng 
Cc: ray.huang@amd.com, Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <20250414074056.3696888-1-Penny.Zheng@amd.com>
 <20250414074056.3696888-3-Penny.Zheng@amd.com>
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On 14.04.2025 09:40, Penny Zheng wrote:
> --- a/xen/drivers/cpufreq/cpufreq.c
> +++ b/xen/drivers/cpufreq/cpufreq.c
> @@ -191,9 +191,31 @@ int cpufreq_limit_change(unsigned int cpu)
>      return __cpufreq_set_policy(data, &policy);
>  }
>  
> -int cpufreq_add_cpu(unsigned int cpu)
> +static int get_psd_info(uint32_t init, unsigned int cpu,

The 1st parameter seems unnecessary: You access processor_pminfo[cpu]
below anyway, so you could as well use ...

> +                        uint32_t *shared_type,
> +                        struct xen_psd_package *domain_info)
>  {
>      int ret = 0;
> +
> +    switch ( init )

... processor_pminfo[cpu]->init here.

> +    {
> +    case XEN_PX_INIT:
> +        if ( shared_type )
> +            *shared_type = processor_pminfo[cpu]->perf.shared_type;
> +        if ( domain_info )
> +            *domain_info = processor_pminfo[cpu]->perf.domain_info;

Does this need to be a structure copy? Can't you hand back just a pointer,
with the function parameter being const struct xen_psd_package **?

> +        break;
> +    default:

Nit: Blank line please between non-fall-through case blocks.

> --- a/xen/include/public/platform.h
> +++ b/xen/include/public/platform.h
> @@ -440,6 +440,11 @@ struct xen_psd_package {
>      uint64_t num_processors;
>  };
>  
> +/* Coordination type value */
> +#define XEN_CPUPERF_SHARED_TYPE_HW   1 /* HW does needed coordination */
> +#define XEN_CPUPERF_SHARED_TYPE_ALL  2 /* All dependent CPUs should set freq */
> +#define XEN_CPUPERF_SHARED_TYPE_ANY  3 /* Freq can be set from any dependent CPU */
> +
>  struct xen_processor_performance {
>      uint32_t flags;     /* flag for Px sub info type */
>      uint32_t platform_limit;  /* Platform limitation on freq usage */
> @@ -449,10 +454,7 @@ struct xen_processor_performance {
>      XEN_GUEST_HANDLE(xen_processor_px_t) states;
>      struct xen_psd_package domain_info;
>      /* Coordination type of this processor */
> -#define XEN_CPUPERF_SHARED_TYPE_HW   1 /* HW does needed coordination */
> -#define XEN_CPUPERF_SHARED_TYPE_ALL  2 /* All dependent CPUs should set freq */
> -#define XEN_CPUPERF_SHARED_TYPE_ANY  3 /* Freq can be set from any dependent CPU */
> -    uint32_t shared_type;
> +    uint32_t shared_type; /* XEN_CPUPERF_SHARED_TYPE_xxx */
>  };
>  typedef struct xen_processor_performance xen_processor_performance_t;
>  DEFINE_XEN_GUEST_HANDLE(xen_processor_performance_t);

What's this movement about? In the public interface nothing changes?

Jan


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CC: , Anthony PERARD
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On Mon Apr 28, 2025 at 4:15 PM BST, J=C3=BCrgen Gro=C3=9F wrote:
> On 28.04.25 17:12, Alejandro Vallejo wrote:
>> On Thu Apr 24, 2025 at 10:41 AM BST, Anthony PERARD wrote:
>>> On Tue, Apr 08, 2025 at 02:35:20PM +0200, Juergen Gross wrote:
>>>> @@ -1903,10 +1894,7 @@ it may be useful to request a different one, li=
ke UEFI.
>>>>  =20
>>>>   =3Ditem B
>>>>  =20
>>>> -Loads ROMBIOS, a 16-bit x86 compatible BIOS. This is used by default
>>>> -when B. This is the only=
 BIOS
>>>> -option supported when B.=
 This is
>>>> -the BIOS used by all previous Xen versions.
>>>> +Loads ROMBIOS, a 16-bit x86 compatible BIOS.
>>>
>>> This option is not valid anymore, libxl will complain with:
>>>      "qemu-xen does not support bios=3Drombios."
>>=20
>> Sounds like a good time to remove bios=3Drombios altogether and strictly
>> support bios=3Dseabios only (plus the override).
>
> Fine with me.
>
> But probably we should NOT drop building RomBIOS, right?

On staging/master? I don't think we ought to waste cycles rebuilding it.
It'd only be a dependency for stable trees, so shouldn't it be built
there instead? Then by the time we don't support it in stable either
(because they all went EOL) it'd naturally just stop being built.

The mechanics of how that would work I'm not sure. We have per
stable-tree pipelines. Do they build everything, Anthony?

Cheers,
Alejandro


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From xen-devel-bounces@lists.xenproject.org Mon Apr 28 15:43:17 2025
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Subject: [ANNOUNCE] [NEW TIME] Call for agenda items for May 7, 2025 Community
 Call @ 15:00 UTC
To: xen-devel@lists.xenproject.org
Cc: Tamas K Lengyel , "intel-xen@intel.com" , 
	"daniel.kiper@oracle.com" , Roger Pau Monne , 
	Christopher Clark , Rich Persaud , 
	Kevin Pearson , Juergen Gross , 
	Paul Durrant , Ji John , 
	"robin.randhawa@arm.com" , Artem Mygaiev , 
	Matt Spencer , Stewart Hildebrand , 
	Volodymyr Babchuk , Jeff Kubascik , 
	Stefano Stabellini , Julien Grall , 
	Rian Quinn , "Daniel P. Smith" , 
	=?UTF-8?B?4oCL4oCL4oCL4oCL4oCL4oCL4oCLRG91ZyBHb2xkc3RlaW4=?= , 
	George Dunlap , David Woodhouse , 
	=?UTF-8?B?4oCL4oCL4oCL4oCL4oCL4oCL4oCLQW1pdCBTaGFo?= , 
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	=?UTF-8?Q?Piotr_Kr=C3=B3l?= , 
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	Anthony PERARD , Michal Orzel , 
	Marc Ungeschikts , Zhiming Shen , 
	Xenia Ragiadakou , 
	=?UTF-8?B?4oCL4oCL4oCL4oCL4oCL4oCL4oCLSGVucnkgV2FuZw==?= , 
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	Yann Dirson , Bernhard Kaindl , 
	=?UTF-8?B?4oCL4oCL4oCL4oCL4oCL4oCL4oCLTHVjYSBGYW5jZWxsdQ==?= , 
	=?UTF-8?Q?Marek_Marczykowski=2DG=C3=B3recki?= , 
	Vikram Garhwal , Ayan Kumar Halder , 
	Kelly Choi , Thierry Escande , 
	Guillaume Thouvenin , 
	Andrei Cherechesu , =?UTF-8?B?UmFmYcOrbCBLb29p?= , 
	Mathieu Labourier , 
	Demi Marie Obenour , Cody Zuschlag , 
	Alejandro Vallejo 
Content-Type: multipart/alternative; boundary="0000000000008613d60633d88a76"

--0000000000008613d60633d88a76
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable

Hi everyone,

*IMPORTANT: Due to public holidays in several countries, May's community
call has been moved to Wednesday, 7 May 2025.*

We=E2=80=99re getting ready for May's Xen Project Community Call on *Wednes=
day, 7
May 2025* at *15:00 UTC* (4 pm UK time). We=E2=80=99d love for you to join.=
 Feel
free to just observe or jump in! This call is a great opportunity to see
what the community is working on, align our various efforts, and share
updates. Everyone is welcome!

*Preparation:*

   - Add any proposed agenda items or missing action items:
   https://cryptpad.fr/pad/#/2/pad/edit/1cT4oJhJZAnJk9CbAogFYchM/
   - If any action items have been resolved or are no longer relevant, feel
   free to remove them from the doc.

*Call Details:*

   - *Date:* Wednesday, 7 May 2025
   - *Time:* 15:00 UTC (agenda begins at 15:05 UTC)
      - Find your local timezone here
      
   - *Link to Join the Call:* https://meet.jit.si/XenProjectCommunityCall

We plan to open the meeting room at 15:00 UTC, but to allow time for
switching between meetings and handling any technical issues, we=E2=80=99ll
officially start discussing the agenda at 15:05 UTC.

*Want to be CC=E2=80=99d on future calls?*

Add or remove yourself from our Sign-up Sheet
.


See you next week!


Cody Zuschlag
Xen Project - Community Manager

--0000000000008613d60633d88a76
Content-Type: text/html; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable


Hi everyone,
IMPORTANT: Due=
 to public holidays in several countries, May's community call has been=
 moved to Wednesday, 7 May 2025.
We=E2=80=99re getting read=
y for May's Xen Project Community Call on=C2=A0Wednesday, 7 May 2025=
=C2=A0at=C2=A015:00 UTC=C2=A0(4 pm UK time). We=E2=80=99d love f=
or you to join. Feel free to just observe or jump in! This call is a great =
opportunity to see what the community is working on, align our various effo=
rts, and share updates. Everyone is welcome!
Preparation:
<=
/div>
Call Details:
We plan =
to open the meeting room at 15:00 UTC, but to allow time for switching betw=
een meetings and handling any technical issues, we=E2=80=99ll officially st=
art discussing the agenda at 15:05 UTC.
Want to be CC=E2=80=99d on=
 future calls?
Add or remove yourself from our=C2=A0Sign-up Sheet.
    See you next week!


    Cody Zuschlag
    Xe=
n Project - Community Manager
    

--0000000000008613d60633d88a76--


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MIME-Version: 1.0
Date: Mon, 28 Apr 2025 17:54:54 +0200
From: Nicola Vetrini 
To: Jan Beulich 
Cc: Stefano Stabellini , victorm.lira@amd.com,
 Federico Serafini , Andrew Cooper
 , Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Bertrand Marquis
 , xen-devel@lists.xenproject.org
Subject: Re: [PATCH v1] misra: add deviation for rules 21.1 and 21.2
In-Reply-To: <35ac0856-7a96-4f91-a76d-989bcebfb911@suse.com>
References: <9e1210f2a9c794d68dcc6b897239b228b141296a.1745427770.git.victorm.lira@amd.com>
 
 
 <8d65ee65-ec6f-49a3-8954-d303b08dc2df@suse.com>
 
 
 <4d21245edbd4949a0aec6ecdadea437c@bugseng.com>
 <35ac0856-7a96-4f91-a76d-989bcebfb911@suse.com>
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On 2025-04-28 11:04, Jan Beulich wrote:
> On 28.04.2025 10:09, Nicola Vetrini wrote:
>> On 2025-04-28 08:15, Jan Beulich wrote:
>>> On 25.04.2025 17:53, Nicola Vetrini wrote:
>>>> On 2025-04-25 10:07, Jan Beulich wrote:
>>>>> On 24.04.2025 23:45, Stefano Stabellini wrote:
>>>>>> On Thu, 24 Apr 2025, Jan Beulich wrote:
>>>>>>> On 23.04.2025 19:54, victorm.lira@amd.com wrote:
>>>>>>>> From: Nicola Vetrini 
>>>>>>>> 
>>>>>>>> MISRA C Rules 21.1 ("#define and #undef shall not be used on a
>>>>>>>> reserved identifier or reserved macro name") and R21.2 ("A
>>>>>>>> reserved
>>>>>>>> identifier or reserved macro name shall not be declared")
>>>>>>>> violations
>>>>>>>> are not problematic for Xen, as it does not use the C or POSIX
>>>>>>>> libraries.
>>>>>>>> 
>>>>>>>> Xen uses -fno-builtin and -nostdinc to ensure this, but there 
>>>>>>>> are
>>>>>>>> still
>>>>>>>> __builtin_* functions from the compiler that are available so
>>>>>>>> a deviation is formulated for all identifiers not starting with
>>>>>>>> "__builtin_".
>>>>>>>> 
>>>>>>>> The missing text of a deviation for Rule 21.2 is added to
>>>>>>>> docs/misra/deviations.rst.
>>>>>>>> 
>>>>>>>> To avoid regressions, tag both rules as clean and add them to 
>>>>>>>> the
>>>>>>>> monitored set.
>>>>>>>> 
>>>>>>>> Signed-off-by: Nicola Vetrini 
>>>>>>>> Signed-off-by: Federico Serafini 
>>>>>>>> Signed-off-by: Victor Lira 
>>>>>>> 
>>>>>>> While the rule is in the library section, ...
>>>>>>> 
>>>>>>>> --- a/docs/misra/deviations.rst
>>>>>>>> +++ b/docs/misra/deviations.rst
>>>>>>>> @@ -587,7 +587,31 @@ Deviations related to MISRA C:2012 Rules:
>>>>>>>>         construct is deviated only in Translation Units that
>>>>>>>> present
>>>>>>>> a violation
>>>>>>>>         of the Rule due to uses of this macro.
>>>>>>>>       - Tagged as `deliberate` for ECLAIR.
>>>>>>>> -
>>>>>>>> +
>>>>>>>> +   * - R21.1
>>>>>>>> +     - Rule 21.1 reports identifiers reserved for the C and 
>>>>>>>> POSIX
>>>>>>>> standard
>>>>>>>> +       libraries. Xen does not use such libraries and all
>>>>>>>> translation units
>>>>>>>> +       are compiled with option '-nostdinc', therefore there is
>>>>>>>> no
>>>>>>>> reason to
>>>>>>>> +       avoid to use `#define` or `#undef` on such identifiers
>>>>>>>> except for those
>>>>>>>> +       beginning with `__builtin_` for which compilers may
>>>>>>>> perform
>>>>>>>> (wrong)
>>>>>>>> +       optimizations.
>>>>>>>> +     - Tagged as `safe` for ECLAIR.
>>>>>>> 
>>>>>>> ... I'd like to ask that it be explicitly clarified here that 
>>>>>>> it's
>>>>>>> solely
>>>>>>> the library (and not e.g. the compiler itself) that are of 
>>>>>>> concern
>>>>>>> here.
>>>>>> 
>>>>>> The language can be clarified:
>>>>>> 
>>>>>> - Rule 21.1 reports identifiers reserved for the C and POSIX
>>>>>> standard
>>>>>>   libraries. Xen does not use such libraries and all translation
>>>>>> units
>>>>>>   are compiled with option '-nostdinc', therefore there is no 
>>>>>> reason
>>>>>> to
>>>>>>   avoid to use `#define` or `#undef` on C and POSIX standard
>>>>>> libraries
>>>>>>   identifiers except for those beginning with `__builtin_` for 
>>>>>> which
>>>>>>   compilers may perform (wrong) optimizations.
>>>>> 
>>>>> Which makes it more apparent that there is a gap: What about e.g.
>>>>> __x86_64__?
>>>>> That falls within what the rules cover, is not a C or POSIX 
>>>>> standard
>>>>> library
>>>>> identifier, yet very clearly must not be fiddled with. Whereas the
>>>>> text
>>>>> above deviates it.
>>>> 
>>>> that is true, even if unlikely: one approach could be to avoid
>>>> deviating
>>>> predefined macros for all CUs as -nostdinc and -fno-builtins should
>>>> take
>>>> care of the rest; this kind of deviation is not currently possible 
>>>> in
>>>> ECLAIR, but it might be in the future.
>>> 
>>> Is this perhaps because by "all pre-defined macros" you really mean
>>> _just_
>>> those, and not the entire reserved (for that purpose) sub-namespace?
>>> Imo
>>> we should not go by what a particular compiler may pre-define (we may
>>> even
>>> overlook something if we did it this way).
>>> 
>>> Jan
>>> 
>> 
>> I think there is a slight misalignment here: maybe I'm interpreting 
>> your
>> answer incorrectly. Let me try to restate the proposal: the following
>> identifiers are not allowed to be #define'd or #undef'd:
>> - __builtin_*
>> - for each CU, all macro identifiers already defined upon 
>> preprocessing
>> that CU by the compiler invocation for that CU. This set of 
>> identifiers
>> is always a subset of all the reserved identifiers, but is also
>> dependent on the compiler invocation that is used for that CU, (e.g.
>> __x86_64__ for an Arm target is usually safe to define, as it's
>> typically not a predefined macro introduced by the compiler for that
>> invocation,
> 
> No, it's not - elsewhere in the tree we may use this to distinguish
> architectures. Plus isn't Misra heavily about avoiding developer
> confusion? Defining __x86_64__ on Arm code is, imo, a pretty confusing
> thing to do.
> 

Indeed it is confusing, but likely safe from the perspective of 
preventing UB, which is the main rationale of this rule. For the 
purposes of distinguishing architectures I'd expect a #ifdef __x86_64__ 
or #if defined(__x86_64__) and those are fine, as this only applies to 
#define or #undef.

>> while (re)defining __STDC_VERSION__ or __SIZEOF_INT__ will
>> be a violation in any command line I can think of). Note that this is
>> not a static set, but is based on what is determined to be predefined 
>> at
>> the moment of the analysis, so it is not tied to what a particular
>> compiler pre-defines.
> 
> Right. Yet what I'm trying to get to is that we disallow _all_ such
> reserved identifiers, not just a subset.
> 

I understand now. There are thousands of locations to be touched to 
remove all uses of reserved identifiers, since they are used quite 
extensively in Xen (A rough estimation is around 1.5k such identifiers, 
with ~900 violations on Arm and ~1000 on x86, without counting their 
occurrences). That is a very disruptive change, even if split very 
finely.

-- 
Nicola Vetrini, B.Sc.
Software Engineer
BUGSENG (https://bugseng.com)
LinkedIn: https://www.linkedin.com/in/nicola-vetrini-a42471253


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Date: Mon, 28 Apr 2025 17:57:27 +0200
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User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v4 03/15] xen/x86: introduce new sub-hypercall to
 propagate CPPC data
To: Penny Zheng 
Cc: ray.huang@amd.com, Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <20250414074056.3696888-1-Penny.Zheng@amd.com>
 <20250414074056.3696888-4-Penny.Zheng@amd.com>
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From: Jan Beulich 
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In-Reply-To: <20250414074056.3696888-4-Penny.Zheng@amd.com>
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On 14.04.2025 09:40, Penny Zheng wrote:
> In order to provide backward compatibility with existing governors
> that represent performance as frequency, like ondemand, the _CPC
> table can optionally provide processor frequency range values, Lowest
> frequency and Norminal frequency, to let OS use Lowest Frequency/

Nit: Nominal

> @@ -497,12 +504,19 @@ static void print_PPC(unsigned int platform_limit)
>      printk("\t_PPC: %d\n", platform_limit);
>  }
>  
> -static int check_psd_pminfo(const struct xen_processor_performance *perf)
> +static int check_psd_pminfo(const struct xen_processor_performance *perf,
> +                            const struct xen_processor_cppc *cppc_data)
>  {
> +    uint32_t shared_type;
> +
> +    if ( !perf && !cppc_data )
> +        return -EINVAL;
> +
> +    shared_type = perf ? perf->shared_type : cppc_data->shared_type;

Why don't you have the caller pass in shared_type? The two pointers aren't
used ...

>      /* check domain coordination */
> -    if ( perf->shared_type != CPUFREQ_SHARED_TYPE_ALL &&
> -         perf->shared_type != CPUFREQ_SHARED_TYPE_ANY &&
> -         perf->shared_type != CPUFREQ_SHARED_TYPE_HW )
> +    if ( shared_type != CPUFREQ_SHARED_TYPE_ALL &&
> +         shared_type != CPUFREQ_SHARED_TYPE_ANY &&
> +         shared_type != CPUFREQ_SHARED_TYPE_HW )
>          return -EINVAL;
>  
>      return 0;

... for anything else.

> @@ -627,6 +641,109 @@ out:
>      return ret;
>  }
>  
> +static void print_CPPC(const struct xen_processor_cppc *cppc_data)
> +{
> +    printk("\t_CPC: highest_perf=%u, lowest_perf=%u, "
> +           "nominal_perf=%u, lowest_nonlinear_perf=%u, "
> +           "nominal_mhz=%uMHz, lowest_mhz=%uMHz\n",
> +           cppc_data->cpc.highest_perf, cppc_data->cpc.lowest_perf,
> +           cppc_data->cpc.nominal_perf, cppc_data->cpc.lowest_nonlinear_perf,
> +           cppc_data->cpc.nominal_mhz, cppc_data->cpc.lowest_mhz);
> +}
> +
> +int set_cppc_pminfo(unsigned int acpi_id,
> +                    const struct xen_processor_cppc *cppc_data)
> +{
> +    int ret = 0, cpuid;
> +    struct processor_pminfo *pm_info;
> +
> +    cpuid = get_cpu_id(acpi_id);
> +    if ( cpuid < 0 || !cppc_data )
> +    {
> +        ret = -EINVAL;
> +        goto out;
> +    }
> +    if ( cpufreq_verbose )
> +        printk("Set CPU acpi_id(%u) cpuid(%d) CPPC State info:\n",
> +               acpi_id, cpuid);
> +
> +    pm_info = processor_pminfo[cpuid];
> +    if ( !pm_info )
> +    {
> +        pm_info = xvzalloc(struct processor_pminfo);
> +        if ( !pm_info )
> +        {
> +            ret = -ENOMEM;
> +            goto out;
> +        }
> +        processor_pminfo[cpuid] = pm_info;
> +    }
> +    pm_info->acpi_id = acpi_id;
> +    pm_info->id = cpuid;
> +
> +    if ( cppc_data->flags & XEN_CPPC_PSD )
> +    {
> +        ret = check_psd_pminfo(NULL, cppc_data);
> +        if ( ret )
> +            goto out;
> +    }
> +
> +    if ( cppc_data->flags & XEN_CPPC_CPC )
> +    {
> +        if ( cppc_data->cpc.highest_perf == 0 ||
> +             cppc_data->cpc.highest_perf > UINT8_MAX ||
> +             cppc_data->cpc.nominal_perf == 0 ||
> +             cppc_data->cpc.nominal_perf > UINT8_MAX ||
> +             cppc_data->cpc.lowest_nonlinear_perf == 0 ||
> +             cppc_data->cpc.lowest_nonlinear_perf > UINT8_MAX ||
> +             cppc_data->cpc.lowest_perf == 0 ||
> +             cppc_data->cpc.lowest_perf > UINT8_MAX ||
> +             cppc_data->cpc.lowest_perf >
> +                cppc_data->cpc.lowest_nonlinear_perf ||

Where's this ordering spelled out in the spec?

> +             cppc_data->cpc.lowest_nonlinear_perf >
> +                cppc_data->cpc.nominal_perf ||
> +             cppc_data->cpc.nominal_perf > cppc_data->cpc.highest_perf )
> +            /*
> +             * Right now, Xen doesn't actually use perf values
> +             * in ACPI _CPC table, warning is enough.
> +             */
> +            printk(XENLOG_WARNING
> +                   "Broken CPPC perf values: lowest(%u), nonlinear_lowest(%u), nominal(%u), highest(%u)\n",
> +                   cppc_data->cpc.lowest_perf,
> +                   cppc_data->cpc.lowest_nonlinear_perf,
> +                   cppc_data->cpc.nominal_perf,
> +                   cppc_data->cpc.highest_perf);

If this warning was to ever surface, it would likely surface for every CPU.
That's unnecessarily verbose, I guess. Please consider using printk_once()
here.

Also, is "right now" (as the comment says) still going to be true by the
end of the series? Didn't I see you use the values in earlier versions?

> +        /* lowest_mhz and nominal_mhz are optional value */
> +        if ( (cppc_data->cpc.lowest_mhz && cppc_data->cpc.nominal_mhz) &&
> +             cppc_data->cpc.lowest_mhz > cppc_data->cpc.nominal_mhz )

The 1st of the three checks is redundant with the 3rd one. There's also no
point parenthesizing one && against another.

> +            printk(XENLOG_WARNING
> +                   "Broken CPPC freq values: lowest(%u), nominal(%u)\n",
> +                   cppc_data->cpc.lowest_mhz,
> +                   cppc_data->cpc.nominal_mhz);
> +    }
> +
> +    if ( cppc_data->flags == (XEN_CPPC_PSD | XEN_CPPC_CPC) )

If either flag may be clear, ...

> +    {
> +        pm_info->cppc_data = *cppc_data;
> +        if ( cpufreq_verbose )
> +        {
> +            print_PSD(&pm_info->cppc_data.domain_info);
> +            print_CPPC(&pm_info->cppc_data);

... why unconditionally loog both?

> +        }
> +
> +        pm_info->init = XEN_CPPC_INIT;

Plus is it correct to set this flag if either of the incoming flags was clear?

> +        ret = cpufreq_cpu_init(cpuid);
> +#ifndef NDEBUG

Instead of this, ...

> +        if ( ret )
> +            printk(XENLOG_WARNING "No fallback scheme could be replaced now");

... did you perhaps mean to use dprintk()? Also, the wording isn't meaningful
at all. Seeing the message, about everyone will need to go and find the text
in source code in order to stand a chance of gaining even basic understanding
of what's going on.

> @@ -459,6 +464,26 @@ struct xen_processor_performance {
>  typedef struct xen_processor_performance xen_processor_performance_t;
>  DEFINE_XEN_GUEST_HANDLE(xen_processor_performance_t);
>  
> +struct xen_processor_cppc {
> +    uint8_t flags; /* flag for CPPC sub info type */
> +    /*
> +     * Subset _CPC fields useful for CPPC-compatible cpufreq
> +     * driver's initialization
> +     */
> +    struct {
> +        uint32_t highest_perf;
> +        uint32_t nominal_perf;
> +        uint32_t lowest_nonlinear_perf;
> +        uint32_t lowest_perf;
> +        uint32_t lowest_mhz;
> +        uint32_t nominal_mhz;
> +    } cpc;
> +    struct xen_psd_package domain_info; /* _PSD */

This being a member of the new type, ...

> --- a/xen/include/xlat.lst
> +++ b/xen/include/xlat.lst
> @@ -168,6 +168,7 @@
>  !	processor_performance		platform.h
>  !	processor_power			platform.h
>  ?	processor_px			platform.h
> +?	processor_cppc			platform.h

... how can it be ? here when it's ...

>  !	psd_package			platform.h

... ! here? And with it being ?, you're lacking a place where you invoke the
resulting checking macro (which I assume would cause a build failure).

Also when laying out struct xen_processor_cppc, please avoid unnecessary
gaps or tail padding - it looks like "shared_type" would better move up. I
think it would also be a good idea to make padding fields explicit, and
check them to be zero. This way they can be assigned meaning later (if need
be) without breaking backwards compatibility.

Jan


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Subject: Re: [PATCH] bitops/32: Convert variable_ffs() and fls() zero-case
 handling to C
To: Ingo Molnar 
Cc: Andrew Cooper , Arnd Bergmann , 
	Arnd Bergmann , Thomas Gleixner , Ingo Molnar , 
	Borislav Petkov , Dave Hansen , x86@kernel.org, 
	"H. Peter Anvin" , Juergen Gross , 
	Boris Ostrovsky , 
	Alexander Usyskin , 
	Greg Kroah-Hartman , =?UTF-8?Q?Mateusz_Jo=C5=84czyk?= , 
	Mike Rapoport , Ard Biesheuvel , Peter Zijlstra , 
	linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org
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On Mon, 28 Apr 2025 at 00:05, Ingo Molnar  wrote:
>
> And once we remove 486, I think we can do the optimization below to
> just assume the output doesn't get clobbered by BS*L in the zero-case,
> right?

We probably can't, because who knows what "Pentium" CPU's are out there.

Or even if Pentium really does get it right. I doubt we have any
developers with an original Pentium around.

So just leave the "we don't know what the CPU result is for zero"
unless we get some kind of official confirmation.

          Linus


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Subject: Re: [PATCH] bitops/32: Convert variable_ffs() and fls() zero-case
 handling to C
To: Ingo Molnar 
Cc: Andrew Cooper , Arnd Bergmann , 
	Arnd Bergmann , Thomas Gleixner , Ingo Molnar , 
	Borislav Petkov , Dave Hansen , x86@kernel.org, 
	"H. Peter Anvin" , Juergen Gross , 
	Boris Ostrovsky , 
	Alexander Usyskin , 
	Greg Kroah-Hartman , =?UTF-8?Q?Mateusz_Jo=C5=84czyk?= , 
	Mike Rapoport , Ard Biesheuvel , Peter Zijlstra , 
	linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org
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On Mon, 28 Apr 2025 at 00:14, Ingo Molnar  wrote:
>
> And, just out of intellectual curiosity, I also tried to measure the
> code generation price of the +1 standards-quirk in the fls()/ffs()
> interface as well:
>
> ... and unless I messed up the patch, it seems to have a surprisingly
> low impact - maybe because the compiler can amortize its cost by
> adjusting all dependent code mostly at build time, so the +1 doesn't
> end up being generated most of the time?

No, I think one issue is that most users actually end up subtracting
one from the return value of 'ffs()', because the "bit #0 returns 1"
semantics of the standard ffs() function really is insane.

It's not just that it doesn't match sane hardware, it's also that it
doesn't match sane *users*. If bit #0 is set, people want '0', so they
typically subtract 1.

So when you stop adding one, you aren't actually removing code -
you're often adding it.

Just see how many hits you get from

    git grep '\
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Message-ID: 
Date: Mon, 28 Apr 2025 19:49:56 +0300
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v7] uboot-script-gen: Dynamically compute addr and size
 when loading binaries
To: Stefano Stabellini ,
 Xen-devel 
References: 
 
Content-Language: en-US
From: Andrei Cherechesu 
Cc: Michal Orzel , jason.andryuk@amd.com,
 dmkhn@proton.me, Andrei Cherechesu ,
 "S32@nxp.com" 
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Hi Stefano,

On 26/04/2025 02:35, Stefano Stabellini wrote:
> From: Andrei Cherechesu 
>
> Normally, the Imagebuilder would precompute the sizes of the loaded binaries and addresses where they are loaded before generating the script, and the sizes and addresses that needed to be provided to Xen via /chosen would be hardcoded in the boot script.
>
> Added an option via "-s" parameter to avoid hardcoding any address in the boot script, and dynamically compute the loading addresses for binaries. The first loading address is based on the MEMORY_START parameter and after loading each binary, the loading address and the size of the binary are stored in variables with corresponding names. Then, the loading address for the next binary is computed and aligned to 0x200000.
>
> If the "-s" parameter is not used, the normal flow is executed, where the loading addresses and sizes for each binaries are precomputed and hardcoded inside the script, but the loading addresses and sizes for each binary are now also stored for eventual later use.
>
> Reserved memory regions are left TBD in the -s case.
>
> Link: https://lists.xenproject.org/archives/html/xen-devel/2022-09/msg01862.html
> Signed-off-by: Andrei Cherechesu 
> Signed-off-by: Stefano Stabellini 
> ---
> Changes in v7:
> - use $()
> - better description and alphabetical order
> - use heredoc
>
> Changes in v6:
> - make initial ${memaddr} setting depending on CALC
>
> This patch adds quite a bit of complexity which is the reason why I didn't originally commit it. Now that we are enabling ImageBuilder in Yocto, it turns out this patch is required because Yocto invokes ImageBuilder before all the binaries are ready and available.
>
> Andrei, sorry for taking so long to realize why it is essential, but we are getting there now.

I'm very glad that you're finding it useful too now!

The original problem for us was not related to building with
Imagebuilder from Yocto, but this was rather done to help users
have more flexibility with the actual binaries they're
deploying on target (more specifically, with their sizes).

In other words, as long as the same file names are used, their
corresponding sizes do not need to be hard-coded too in the
script, since we can dynamically figure them out and write them
to /chosen. As such, the binaries (xen, kernel image, fdt,
ramdisks) can be replaced without regenerating the boot script
and caring about their sizes.

Regarding building from Yocto, in our case, we're invoking
Imagebuilder from some separate recipe after everything has
been built. The only situation that comes to mind where it's a
bit more tricky to wait for the artifacts to be ready is for the
ramdisk/initramfs ones, but it can be done too. So it can work
both with precomputed and dynamic addresses.

>
> The changes I made to the original patch are purely to make it simpler to maintain.

Thank you for taking the time to refactor and resend it!
Please also see my comments below.

> ---
>
> diff --git a/README.md b/README.md
> index f8039ec..28c9e6b 100644
> --- a/README.md
> +++ b/README.md
> @@ -356,6 +356,8 @@ Where:\
>     can only be used  in combination with the -k option.  This adds the
>     public key into the dtb.  Then one can add this dtb back into the
>     u-boot bin or elf.\
> +-s addresses and sizes are calculated dynamically from U-Boot, hence
> +   binaries don't need to be available at the time of invocation.\
>
>  ### Signed FIT images
>
> diff --git a/scripts/uboot-script-gen b/scripts/uboot-script-gen index 638154a..73d9600 100755
> --- a/scripts/uboot-script-gen
> +++ b/scripts/uboot-script-gen
> @@ -1,8 +1,11 @@
>  #!/bin/bash
>
>  offset=$((2*1024*1024))
> +PADDING_MASK=$(printf "0x%X\n" $(($offset - 1)))
> +PADDING_MASK_INV=$(printf "0x%X\n" $((~$PADDING_MASK)))
>  filesize=0
>  prog_req=(mkimage file fdtput mktemp awk od)
> +CALC=""
>
>  function cleanup_and_return_err()
>  {
> @@ -100,17 +103,40 @@ function dt_set()
>      fi
>  }
>
> +function dt_set_calc()
> +{
> +    local path=$1
> +    local var=$2
> +    local name_var=$3
> +
> +    local addr_var="$name_var"_addr
> +    local size_var="$name_var"_size
> +
> +    cat >> $UBOOT_SOURCE <<- EOF
> +       setexpr addr_hi \${$addr_var} / 0x100000000
> +       setexpr addr_lo \${$addr_var} \& 0xFFFFFFFF
> +       setexpr size_hi \${$size_var} / 0x100000000
> +       setexpr size_lo \${$size_var} \& 0xFFFFFFFF
> +       fdt set $path $var <0x\${addr_hi} 0x\${addr_lo} 0x\${size_hi} 0x\${size_lo}>
> +       EOF
> +}
> +
>  function add_device_tree_kernel()
>  {
>      local path=$1
> -    local addr=$2
> -    local size=$3
> -    local bootargs=$4
> +    local name=$2
> +    local addr=$3
> +    local size=$4
> +    local bootargs=$5
>      local node_name="module@${addr#0x}"
>
>      dt_mknode "$path" "$node_name"
>      dt_set "$path/$node_name" "compatible" "str_a" "multiboot,kernel multiboot,module"
> -    dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
> +    if test "$CALC"; then
> +        dt_set_calc "$path/$node_name" "reg" $name
> +    else
> +        dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
> +    fi
>      dt_set "$path/$node_name" "bootargs" "str" "$bootargs"
>  }
>
> @@ -118,26 +144,36 @@ function add_device_tree_kernel()  function add_device_tree_ramdisk()  {
>      local path=$1
> -    local addr=$2
> -    local size=$3
> +    local name=$2
> +    local addr=$3
> +    local size=$4
>      local node_name="module@${addr#0x}"
>
>      dt_mknode "$path"  "$node_name"
>      dt_set "$path/$node_name" "compatible" "str_a" "multiboot,ramdisk multiboot,module"
> -    dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
> +    if test "$CALC"; then
> +        dt_set_calc "$path/$node_name" "reg" $name
> +    else
> +        dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
> +    fi
>  }
>
>
>  function add_device_tree_passthrough()
>  {
>      local path=$1
> -    local addr=$2
> -    local size=$3
> +    local name=$2
> +    local addr=$3
> +    local size=$4
>      local node_name="module@${addr#0x}"
>
>      dt_mknode "$path"  "$node_name"
>      dt_set "$path/$node_name" "compatible" "str_a" "multiboot,device-tree multiboot,module"
> -    dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
> +    if test "$CALC"; then
> +        dt_set_calc "$path/$node_name" "reg" $name
> +    else
> +        dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
> +    fi
>  }
>
>  function add_device_tree_mem()
> @@ -358,7 +394,11 @@ function xen_device_tree_editing()
>
>          dt_mknode "/chosen" "$node_name"
>          dt_set "/chosen/$node_name" "compatible" "str_a" "xen,xsm-policy xen,multiboot-module multiboot,module"
> -        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $xen_policy_addr $xen_policy_size)"
> +        if test "$CALC"; then
> +            dt_set_calc "/chosen/$node_name" "reg" "xen_policy"
> +        else
> +            dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $xen_policy_addr $xen_policy_size)"
> +        fi
>      fi
>
>      if test "$DOM0_KERNEL"
> @@ -367,7 +407,11 @@ function xen_device_tree_editing()
>
>          dt_mknode "/chosen" "$node_name"
>          dt_set "/chosen/$node_name" "compatible" "str_a" "xen,linux-zimage xen,multiboot-module multiboot,module"
> -        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $dom0_kernel_addr $dom0_kernel_size)"
> +        if test "$CALC"; then
> +            dt_set_calc "/chosen/$node_name" "reg" "dom0_linux"
> +        else
> +            dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $dom0_kernel_addr $dom0_kernel_size)"
> +        fi
>          dt_set "/chosen" "xen,dom0-bootargs" "str" "$DOM0_CMD"
>      fi
>
> @@ -377,7 +421,11 @@ function xen_device_tree_editing()
>
>          dt_mknode "/chosen" "$node_name"
>          dt_set "/chosen/$node_name" "compatible" "str_a" "xen,linux-initrd xen,multiboot-module multiboot,module"
> -        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $ramdisk_addr $ramdisk_size)"
> +        if test "$CALC"; then
> +            dt_set_calc "/chosen/$node_name" "reg" "dom0_ramdisk"
> +        else
> +            dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $ramdisk_addr $ramdisk_size)"
> +        fi
>      fi
>
>      i=0
> @@ -464,14 +512,14 @@ function xen_device_tree_editing()
>
>          xen_dt_domu_add_vcpu_nodes "/chosen/domU$i" $i ${DOMU_VCPUS[$i]}
>
> -        add_device_tree_kernel "/chosen/domU$i" ${domU_kernel_addr[$i]} ${domU_kernel_size[$i]} "${DOMU_CMD[$i]}"
> +        add_device_tree_kernel "/chosen/domU$i" "domU${i}_kernel" ${domU_kernel_addr[$i]} ${domU_kernel_size[$i]} "${DOMU_CMD[$i]}"
>          if test "${domU_ramdisk_addr[$i]}"
>          then
> -            add_device_tree_ramdisk "/chosen/domU$i" ${domU_ramdisk_addr[$i]} ${domU_ramdisk_size[$i]}
> +            add_device_tree_ramdisk "/chosen/domU$i" "domU${i}_ramdisk"
> + ${domU_ramdisk_addr[$i]} ${domU_ramdisk_size[$i]}
>          fi
>          if test "${domU_passthrough_dtb_addr[$i]}"
>          then
> -            add_device_tree_passthrough "/chosen/domU$i" ${domU_passthrough_dtb_addr[$i]} ${domU_passthrough_dtb_size[$i]}
> +            add_device_tree_passthrough "/chosen/domU$i" "domU${i}_fdt"
> + ${domU_passthrough_dtb_addr[$i]} ${domU_passthrough_dtb_size[$i]}
>          fi
>          i=$(( $i + 1 ))
>      done
> @@ -504,7 +552,11 @@ function device_tree_editing()
>
>      if test $UBOOT_SOURCE
>      then
> -        echo "fdt addr $device_tree_addr" >> $UBOOT_SOURCE
> +        if test "$CALC"; then
> +            echo "fdt addr \${host_fdt_addr}" >> $UBOOT_SOURCE
> +        else
> +            echo "fdt addr $device_tree_addr" >> $UBOOT_SOURCE
> +        fi
>          echo "fdt resize 1024" >> $UBOOT_SOURCE
>
>          if test $NUM_DT_OVERLAY && test $NUM_DT_OVERLAY -gt 0 @@ -512,7 +564,11 @@ function device_tree_editing()
>              i=0
>              while test $i -lt $NUM_DT_OVERLAY
>              do
> -                echo "fdt apply ${dt_overlay_addr[$i]}" >> $UBOOT_SOURCE
> +                if test "$CALC"; then
> +                    echo "fdt apply \${host_fdto${i}_addr}" >> $UBOOT_SOURCE
> +                else
> +                    echo "fdt apply ${dt_overlay_addr[$i]}" >> $UBOOT_SOURCE
> +                fi
>                  i=$(( $i + 1 ))
>              done
>          fi
> @@ -530,8 +586,12 @@ function fill_reserved_spaces_from_dtb()  {
>      if [ ! -f $DEVICE_TREE ]
>      then
> -        echo "File $DEVICE_TREE doesn't exist, exiting";
> -        cleanup_and_return_err
> +        if test "$CALC"; then
> +            return
> +        else
> +            echo "File $DEVICE_TREE doesn't exist, exiting";
> +            cleanup_and_return_err
> +        fi
>      fi
>
>      # Check if reserved-memory node exists @@ -613,7 +673,7 @@ function get_image_size()
>      printf "%u" $effective_size
>  }
>
> -function add_size()
> +function add_size_from_file()
>  {
>      local filename=$1
>      local size=`stat -L --printf="%s" $filename` @@ -645,6 +705,26 @@ function add_size()
>      filesize=$size
>  }
>
> +function add_size_calculate()
> +{
> +    local fit_scr_name=$1
> +
> +    cat >> $UBOOT_SOURCE <<- EOF
> +       setenv "$fit_scr_name"_addr \${memaddr}
> +       setenv "$fit_scr_name"_size \${filesize}

The quotes here should also be removed, since quotes are literals
in heredoc:
    setenv ${fit_scr_name}_addr \${memaddr}
    setenv ${fit_scr_name}_size \${filesize}

Otherwise, we'll be getting this in the actual boot script
    setenv "dom0_linux"_addr ${memaddr}
    setenv "dom0_linux"_size ${filesize}

instead of
    setenv dom0_linux_addr ${memaddr}
    setenv dom0_linux_size ${filesize}

> +       setexpr memaddr \${memaddr} \+ \${filesize}
> +       setexpr memaddr \${memaddr} \+ $PADDING_MASK
> +       setexpr memaddr \${memaddr} \& $PADDING_MASK_INV
> +       EOF
> +
> +    # TODO: missing ${RESERVED_MEM_SPACES[@]} check
> +
> +    # The following are updated to avoid collisions in node names, but
> +    # they are not actively used.
> +    memaddr=$((memaddr + offset))

I know you want to make this patch less complicated and I agree
with that, since there was originally some more logic here which
was not necessarily needed and was complicating things.

But even though this variable is only needed for 'module@..."
node names, I think we should at least convert it to hex, to
avoid getting confusing node names, like:
    fdt mknod /chosen/domU0 module@2239758336

Keeping this here should be enough:
    memaddr=$(printf "0x%X\n" $memaddr)

> +    filesize=$offset
> +}
> +
>  function load_file()
>  {
>      local filename=$1
> @@ -657,10 +737,16 @@ function load_file()
>      if test "$FIT"
>      then
>          echo "imxtract \$fit_addr $fit_scr_name $memaddr" >> $UBOOT_SOURCE
> +        add_size_from_file $filename
>      else
> -        echo "$LOAD_CMD $memaddr ${prepend_path:+$prepend_path/}$relative_path" >> $UBOOT_SOURCE
> +        if test "$CALC"; then
> +            echo "$LOAD_CMD \${memaddr} ${prepend_path:+$prepend_path/}$relative_path" >> $UBOOT_SOURCE
> +            add_size_calculate $fit_scr_name
> +        else
> +            echo "$LOAD_CMD $memaddr ${prepend_path:+$prepend_path/}$relative_path" >> $UBOOT_SOURCE
> +            add_size_from_file $filename
> +        fi
>      fi
> -    add_size $filename
>  }
>
>  function check_file_type()
> @@ -670,8 +756,13 @@ function check_file_type()
>
>      if [ ! -f $filename ]
>      then
> -        echo "File $filename doesn't exist, exiting";
> -        cleanup_and_return_err
> +        if test "$CALC"
> +        then
> +            return
> +        else
> +            echo "File $filename doesn't exist, exiting";
> +            cleanup_and_return_err
> +        fi
>      fi
>
>      # if file doesn't know what it is, it outputs data, so include that @@ -705,8 +796,13 @@ function check_compressed_file_type()
>
>      if [ ! -f $filename ]
>      then
> -        echo "File $filename doesn't exist, exiting";
> -        cleanup_and_return_err
> +        if test "$CALC"
> +        then
> +            return
> +        else
> +            echo "File $filename doesn't exist, exiting";
> +            cleanup_and_return_err
> +        fi
>      fi
>
>      file_type=$( file -L $filename )
> @@ -872,6 +968,12 @@ function linux_config()
>  generate_uboot_images()
>  {
>      local arch=$(file -L $XEN | grep -E 'ARM64|Aarch64')
> +
> +    if test "$CALC"
> +    then
> +        echo "bootm is not compatible with -s"
> +        cleanup_and_return_err
> +    fi
>
>      if test "$arch"
>      then
> @@ -997,7 +1099,11 @@ bitstream_load_and_config()
>          if test "$UBOOT_SOURCE"
>          then
>              # we assume the FPGA device is 0 here
> -            echo "fpga load 0 $bitstream_addr $bitstream_size" >> "$UBOOT_SOURCE"
> +            if test "$CALC"; then
> +                echo "fpga load 0 \${fpga_bitstream_addr} \${fpga_bitstream_size}" >> "$UBOOT_SOURCE"
> +            else
> +                echo "fpga load 0 $bitstream_addr $bitstream_size" >> "$UBOOT_SOURCE"
> +            fi
>          fi
>      fi
>  }
> @@ -1271,7 +1377,7 @@ function print_help  {
>      script=`basename "$0"`
>      echo "usage:"
> -    echo "     $script -c CONFIG_FILE -d DIRECTORY [-t LOAD_CMD] [-o FILE] [-k KEY_DIR/HINT [-u U-BOOT_DTB]] [-e] [-f] [-p PREPEND_PATH]"
> +    echo "     $script -c CONFIG_FILE -d DIRECTORY [-t LOAD_CMD] [-o FILE] [-k KEY_DIR/HINT [-u U-BOOT_DTB]] [-e] [-f] [-p PREPEND_PATH] [-s]"
>      echo "     $script -h"
>      echo "where:"
>      echo "     CONFIG_FILE - configuration file"
> @@ -1289,13 +1395,14 @@ function print_help
>      echo "     -f - enable generating a FIT image"
>      echo "     PREPEND_PATH - path to be appended before file names to match deploy location within rootfs"
>      echo "     -h - prints out the help message and exits "
> +    echo "     -s - let U-Boot calculate binary images load addresses/sizes dynamically"
>      echo "Defaults:"
>      echo "     CONFIG_FILE=$cfg_file, UBOOT_TYPE=\"LOAD_CMD\" env var, DIRECTORY=$uboot_dir"
>      echo "Example:"
>      echo "     $script -c ../config -d ./build42 -t \"scsi load 1:1\""
>  }
>
> -while getopts ":c:t:d:ho:k:u:fp:" opt; do
> +while getopts ":c:t:d:ho:k:u:fp:s" opt; do
>      case ${opt} in
>      t )
>          case $OPTARG in
> @@ -1340,6 +1447,9 @@ while getopts ":c:t:d:ho:k:u:fp:" opt; do
>      p )
>          prepend_path="$OPTARG"
>          ;;
> +    s )
> +        CALC=y
> +        ;;
>      h )
>          print_help
>          exit 0
> @@ -1533,6 +1643,10 @@ uboot_addr=$memaddr  # 2MB are enough for a uboot script  memaddr=$(( $memaddr + $offset ))  memaddr=`printf "0x%X\n" $memaddr`
> +if test "$CALC"
> +then
> +    echo "setenv memaddr $memaddr" >> $UBOOT_SOURCE fi
>
>  fill_reserved_spaces_from_dtb
>
> @@ -1583,7 +1697,11 @@ fi
>
>  if [ "$BOOT_CMD" != "none" ]
>  then
> -    echo "$BOOT_CMD $kernel_addr $([ "$BOOT_CMD" = "bootefi" ] || echo '-') $device_tree_addr" >> $UBOOT_SOURCE
> +    if test "$CALC"; then
> +        echo "$BOOT_CMD \${host_kernel_addr} $([ "$BOOT_CMD" = "bootefi" ] || echo '-') \${host_fdt_addr}" >> $UBOOT_SOURCE
> +    else
> +        echo "$BOOT_CMD $kernel_addr $([ "$BOOT_CMD" = "bootefi" ] || echo '-') $device_tree_addr" >> $UBOOT_SOURCE
> +    fi
>  else
>      # skip boot command but store load addresses to be used later
>      echo "setenv host_kernel_addr $kernel_addr" >> $UBOOT_SOURCE

With the above changes,

Reviewed-by: Andrei Cherechesu 


Thank you!

Regards,
Andrei Cherechesu



From xen-devel-bounces@lists.xenproject.org Mon Apr 28 18:16:10 2025
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Date: Mon, 28 Apr 2025 19:15:02 +0100
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v9 7/8] xen/arm: enable dom0 to use PCI devices with
 pci-passthrough=no
Content-Language: en-GB
To: Mykyta Poturai ,
 "xen-devel@lists.xenproject.org" 
Cc: Stewart Hildebrand ,
 Stefano Stabellini ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Andrew Cooper ,
 Anthony PERARD , Jan Beulich ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
References: 
 <132afbca390edd6e9fd7b1ffacf6c5aff0d29aa7.1741958647.git.mykyta_poturai@epam.com>
 <7d376741-ff23-4618-83bd-415c8d8fa24e@xen.org>
 
 
 
From: Julien Grall 
In-Reply-To: 
Content-Type: text/plain; charset=UTF-8; format=flowed
Content-Transfer-Encoding: 7bit

Hi Mykyta,

On 28/04/2025 15:28, Mykyta Poturai wrote:
> On 28.04.25 15:55, Julien Grall wrote:
>> Hi,
>>
>> On 28/04/2025 13:31, Mykyta Poturai wrote:
>>> On 28.04.25 11:54, Julien Grall wrote:
>>>> Hi Mykyta,
>>>>
>>>> On 14/03/2025 13:34, Mykyta Poturai wrote:
>>>>> From: Stewart Hildebrand 
>>>>>
>>>>> Enable the use of IOMMU + PCI in dom0 without having to specify
>>>>> "pci-passthrough=yes". We rely on dom0 to initialize the PCI controller
>>>>> and perform a PHYSDEVOP_pci_device_add call to add each device to SMMU.
>>>>
>>>> It would be good to explain why Xen cannot initialize the PCI
>>>> controller. Asking, because the reason is the PCI controller is too
>>>> complex, then you will likely need the same approach for PCI
>>>> passthrough...
>>>
>>> I think the main reason for this is complexity and the possibility of
>>> additional dependencies: there could be external clocks or reset pins
>>> that the PCI host depends on for working correctly. I will add this to
>>> the commit message. Regarding PCI passthrough, it is already using the
>>> same approach (at least on Arm). There are patches for enabling Xen on
>>> Arm to perform bus enumeration by itself by Luca Fancellu, but I haven't
>>> yet got to test them in a meaningful way.
>>
>> Can you provide a link to the series? I would like to make sure we have
>> a coherent approach. In particular, it is not clear to me how Dom0 and
>> Xen will be able to coordinate the access to the PCI controller. Are we
>> going to have a mediator?
>>
> 
> Here is a link to my WIP branch
> https://github.com/Deedone/xen/tree/pci_passthrough_wip
> Although it is slightly outdated due to recent review activity, I will
> updated it soon with all of the recent changes.
> 
> Luca's commits begin from c68a5cbb1a7d17907551159c99ab5c87ce0dedf9
> 
> I wasn't able to find them sent to any mailing lists, but I plan to also
> send them after the base case with Dom0 enumeration stabilizes.

I don't think you can stabilize one without the other. I am worry the 
interface may not work properly for PCI passthrough. So until then, I 
would say this should be marked as unsupported (maybe protected by 
CONFIG_UNSUPPORTED).

> 
> There is no mediator, Dom0 configures the host controller, enumerates
> child devices, and then gives complete access to some of them to Xen.
> Xen only does "logical" operations with child devices and does not
> change any of the host controller base settings.

I am not sure I fully understanding this. Both dom0 will need to access 
the configuration space. So you would need to ensure there is only one 
accessing the configuration space at a give time.

> To ensure that Dom0
> will not mess with the child devices, tools bind them to the stub
> driver. Theoretically, Dom0 can bind to those devices again and break
> something, but it can also do a lot of other breaking stuff so I don't
> think there is a good reason to invent some forms of protection from it.

We should not trust dom0 to do the right thing. But reading ...

> 
> After some time with pci-scan changes merged it should become possible
> to make Xen do the enumeration, and only give Dom0 the virtual PCI bus,
> which would prevent it from accessing non-owned devices.

... this it sounds like this would be temporary. Do you have patches 
already on the mailing list?

Cheers,

-- 
Julien Grall



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From: Luca Fancellu 
To: Ayan Kumar Halder 
CC: Julien Grall , Ayan Kumar Halder
	, "xen-devel@lists.xenproject.org"
	, Stefano Stabellini
	, Bertrand Marquis , Michal
 Orzel , Volodymyr Babchuk 
Subject: Re: [PATCH v1] xen/arm: AArch32-V8R: Add MPU register definitions
Thread-Topic: [PATCH v1] xen/arm: AArch32-V8R: Add MPU register definitions
Thread-Index: AQHbr7FEzJkzCX7IxEuG28e/+R7zurOo3KoAgAt3HYCABS1xgA==
Date: Mon, 28 Apr 2025 19:04:32 +0000
Message-ID: <2697BC06-8A78-42B4-9977-07907BBBDC3D@arm.com>
References: <20250417155511.1854081-1-ayan.kumar.halder@amd.com>
 <306e5414-1552-4605-86d6-b23b89d00bc9@xen.org>
 
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From: Luca Fancellu 
To: Julien Grall 
CC: Ayan Kumar Halder , Ayan Kumar Halder
	, "xen-devel@lists.xenproject.org"
	, Stefano Stabellini
	, Bertrand Marquis , Michal
 Orzel , Volodymyr Babchuk 
Subject: Re: [PATCH v1] xen/arm: AArch32-V8R: Add MPU register definitions
Thread-Topic: [PATCH v1] xen/arm: AArch32-V8R: Add MPU register definitions
Thread-Index: AQHbr7FEzJkzCX7IxEuG28e/+R7zurOo3KoAgAt3HYCAABnBAIAFFYYA
Date: Mon, 28 Apr 2025 19:11:06 +0000
Message-ID: <0301958D-EC51-4084-9FCB-69E47376704A@arm.com>
References: <20250417155511.1854081-1-ayan.kumar.halder@amd.com>
 <306e5414-1552-4605-86d6-b23b89d00bc9@xen.org>
 
 
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Date: Mon, 28 Apr 2025 19:43:11 +0000
To: Andrew Cooper 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, jbeulich@suse.com, roger.pau@citrix.com, dmukhin@ford.com
Subject: Re: [PATCH v4 2/3] x86/vmx: Update DR7 type
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On Mon, Apr 28, 2025 at 12:48:42PM +0100, Andrew Cooper wrote:
> On 26/04/2025 8:27 am, dmkhn@proton.me wrote:
> > From: Denis Mukhin 
> >
> > Convert the DR7 type to `unsigned int` and fix the accesses where neces=
sary.
> >
> > [1] https://lore.kernel.org/xen-devel/0d01646b-83e3-4a02-b365-d149d2664=
e73@citrix.com/
> >
> > Signed-off-by: Denis Mukhin 
> > ---
> >  xen/arch/x86/hvm/vmx/vmx.c        | 2 +-
> >  xen/arch/x86/include/asm/domain.h | 2 +-
> >  2 files changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c
> > index 4883bd823d..75c6992172 100644
> > --- a/xen/arch/x86/hvm/vmx/vmx.c
> > +++ b/xen/arch/x86/hvm/vmx/vmx.c
> > @@ -926,7 +926,7 @@ static void vmx_save_dr(struct vcpu *v)
> >      v->arch.dr[3] =3D read_debugreg(3);
> >      v->arch.dr6   =3D read_debugreg(6);
> >      /* DR7 must be saved as it is used by vmx_restore_dr(). */
> > -    __vmread(GUEST_DR7, &v->arch.dr7);
> > +    v->arch.dr7 =3D vmread(GUEST_DR7);
>=20
> Two minor points.=C2=A0 The =3D wants lining up for vertical tabulation, =
and ...
>=20
> >  }
> >
> >  static void __restore_debug_registers(struct vcpu *v)
> > diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/a=
sm/domain.h
> > index 5fc1d1e5d0..a54ef3a8c1 100644
> > --- a/xen/arch/x86/include/asm/domain.h
> > +++ b/xen/arch/x86/include/asm/domain.h
> > @@ -595,7 +595,7 @@ struct arch_vcpu
> >
> >      /* Debug registers. */
> >      unsigned long dr[4];
> > -    unsigned long dr7; /* Ideally int, but __vmread() needs long. */
> > +    unsigned int dr7;
> >      unsigned int dr6;
>=20
> ... these fields want switching back around now that dr7 is unsigned int.
>=20
> We always access in numeric order, and they're only out-of-order for
> packing reasons.
>=20
> Can fix on commit.

Thanks!

>=20
> ~Andrew



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Date: Mon, 28 Apr 2025 19:45:19 +0000
To: Andrew Cooper 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, jbeulich@suse.com, roger.pau@citrix.com, dmukhin@ford.com
Subject: Re: [PATCH v4 1/3] x86/vmx: Introduce vmread()
Message-ID: 
In-Reply-To: <0b47b52c-e998-430a-90f6-e95bda74524d@citrix.com>
References: <20250426072720.39317-1-dmukhin@ford.com> <0b47b52c-e998-430a-90f6-e95bda74524d@citrix.com>
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On Mon, Apr 28, 2025 at 12:39:36PM +0100, Andrew Cooper wrote:
> On 26/04/2025 8:27 am, dmkhn@proton.me wrote:
> > From: Denis Mukhin 
> >
> > The current implementation of __vmread() returns the result via pointer
> > argument which leads to excess code in some places.
> >
> > Introduce a new vmread() function as suggested in [1].
> >
> > [1] https://lore.kernel.org/xen-devel/c452a1d7-4a57-4c5f-8a83-36a74ff22=
8ec@citrix.com/
>=20
> Usually for this, we use
>=20
> Suggested-by: whoever
>=20
> rather than links to emails.=C2=A0 I can fix on commit.

OK, noted for the future.
Thanks!

>=20
> ~Andrew



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Date: Mon, 28 Apr 2025 19:50:20 +0000
To: Jan Beulich 
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, roger.pau@citrix.com, nicola.vetrini@bugseng.com, consulting@bugseng.com, dmukhin@ford.com, xen-devel@lists.xenproject.org
Subject: Re: [PATCH v4 3/3] x86/vmx: Replace __vmread() with vmread()
Message-ID: 
In-Reply-To: 
References: <20250426072819.39455-1-dmukhin@ford.com> 
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On Mon, Apr 28, 2025 at 01:58:56PM +0200, Jan Beulich wrote:
> On 26.04.2025 09:28, dmkhn@proton.me wrote:
> > @@ -1957,8 +1955,7 @@ void cf_check vmx_do_resume(void)
> >      hvm_do_resume(v);
> >
> >      /* Sync host CR4 in case its value has changed. */
> > -    __vmread(HOST_CR4, &host_cr4);
> > -    if ( host_cr4 !=3D read_cr4() )
> > +    if ( vmread(HOST_CR4) !=3D read_cr4() )
>=20
> It's unclear to me whether this constitutes a violation of Misra rule 13.=
2.
> There are two function calls in this expression. Both funcs are inline, a=
nd
> vmread() is even always_inline, but they're still function calls, which c=
an
> be carried out in either order. And neither can plausibly be pure, let
> alone const.

Thanks, I will revert that hunk.

>=20
> > @@ -1573,12 +1565,12 @@ static void cf_check vmx_get_nonreg_state(struc=
t vcpu *v,
> >  {
> >      vmx_vmcs_enter(v);
> >
> > -    __vmread(GUEST_ACTIVITY_STATE, &nrs->vmx.activity_state);
> > -    __vmread(GUEST_INTERRUPTIBILITY_INFO, &nrs->vmx.interruptibility_i=
nfo);
> > -    __vmread(GUEST_PENDING_DBG_EXCEPTIONS, &nrs->vmx.pending_dbg);
> > +    nrs->vmx.activity_state =3D vmread(GUEST_ACTIVITY_STATE);
>=20
> This struct field can now also shrink down to unsigned int (or uit32_t if=
 need
> be). Likely there are others (and maybe also plain variables). Which in t=
urn
> is an indication that, as was suggested before, this patch wants further
> splitting up. That'll also help with overall progress, as then what's
> uncontroversial and not in need of further adjustment can go in right awa=
y.

I'll will minimize the churn more in next iteration.

>=20
> Jan



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From: Ariadne Conill 
To: xen-devel@lists.xenproject.org
Cc: Ariadne Conill ,
	Paul Durrant ,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Alejandro Vallejo ,
	"Alexander M . Merritt" 
Subject: [PATCH v3] x86/hyperv: use dynamically allocated page for hypercalls
Date: Mon, 28 Apr 2025 12:57:36 -0700
Message-Id: <20250428195736.2516-1-ariadne@ariadne.space>
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Previously Xen placed the hypercall page at the highest possible MFN,
but this caused problems on systems where there is more than 36 bits
of physical address space.

In general, it also seems unreliable to assume that the highest possible
MFN is not already reserved for some other purpose.

Fixes: 620fc734f854 ("x86/hyperv: setup hypercall page")
Cc: Alejandro Vallejo 
Cc: Alexander M. Merritt 
Signed-off-by: Ariadne Conill 
---
Changes from v2:
- Style fixes
- Change hypercall page notice to print the MFN instead, and use
  dprintk

Changes from v1:
- Continue to use fixmap infrastructure
- Use panic in Hyper-V setup() function instead of returning -ENOMEM
  on hypercall page allocation failure

 xen/arch/x86/guest/hyperv/hyperv.c      | 19 +++++++++----------
 xen/arch/x86/include/asm/guest/hyperv.h |  3 ---
 2 files changed, 9 insertions(+), 13 deletions(-)

diff --git a/xen/arch/x86/guest/hyperv/hyperv.c b/xen/arch/x86/guest/hyperv/hyperv.c
index 6989af38f1..f69f596441 100644
--- a/xen/arch/x86/guest/hyperv/hyperv.c
+++ b/xen/arch/x86/guest/hyperv/hyperv.c
@@ -98,10 +98,18 @@ static void __init setup_hypercall_page(void)
     rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
     if ( !hypercall_msr.enable )
     {
-        mfn = HV_HCALL_MFN;
+        void *hcall_page = alloc_xenheap_page();
+
+        if ( !hcall_page )
+            panic("Hyper-V: Failed to allocate hypercall trampoline page\n");
+
+        mfn = virt_to_mfn(hcall_page);
         hypercall_msr.enable = 1;
         hypercall_msr.guest_physical_address = mfn;
         wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
+
+        dprintk(XENLOG_INFO,
+                "Hyper-V: Allocated hypercall page at MFN %lx\n", mfn);
     }
     else
         mfn = hypercall_msr.guest_physical_address;
@@ -187,14 +195,6 @@ static int cf_check ap_setup(void)
     return setup_vp_assist();
 }
 
-static void __init cf_check e820_fixup(void)
-{
-    uint64_t s = HV_HCALL_MFN << PAGE_SHIFT;
-
-    if ( !e820_add_range(s, s + PAGE_SIZE, E820_RESERVED) )
-        panic("Unable to reserve Hyper-V hypercall range\n");
-}
-
 static int cf_check flush_tlb(
     const cpumask_t *mask, const void *va, unsigned int flags)
 {
@@ -211,7 +211,6 @@ static const struct hypervisor_ops __initconst_cf_clobber ops = {
     .name = "Hyper-V",
     .setup = setup,
     .ap_setup = ap_setup,
-    .e820_fixup = e820_fixup,
     .flush_tlb = flush_tlb,
 };
 
diff --git a/xen/arch/x86/include/asm/guest/hyperv.h b/xen/arch/x86/include/asm/guest/hyperv.h
index c05efdce71..5792e77104 100644
--- a/xen/arch/x86/include/asm/guest/hyperv.h
+++ b/xen/arch/x86/include/asm/guest/hyperv.h
@@ -10,9 +10,6 @@
 
 #include 
 
-/* Use top-most MFN for hypercall page */
-#define HV_HCALL_MFN   (((1ull << paddr_bits) - 1) >> HV_HYP_PAGE_SHIFT)
-
 /*
  * The specification says: "The partition reference time is computed
  * by the following formula:
-- 
2.39.5 (Apple Git-154)



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Date: Mon, 28 Apr 2025 13:00:01 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Jan Beulich 
cc: Stefano Stabellini , 
    "Ragiadakou, Xenia" , 
    Andrew Cooper , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
    jason.andryuk@amd.com, agarciav@amd.com, xen-devel@lists.xenproject.org
Subject: Re: [PATCH] xen/x86: allow Dom0 PVH to call XENMEM_exchange
In-Reply-To: <19d9aec4-c21a-47a9-9c58-6bfcadbd22e0@suse.com>
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On Mon, 28 Apr 2025, Jan Beulich wrote:
> On 25.04.2025 22:19, Stefano Stabellini wrote:
> > From: Xenia Ragiadakou 
> > 
> > Dom0 PVH might need XENMEM_exchange when passing contiguous memory
> > addresses to firmware or co-processors not behind an IOMMU.
> 
> I definitely don't understand the firmware part: It's subject to the
> same transparent P2M translations as the rest of the VM; it's just
> another piece of software running there.
> 
> "Co-processors not behind an IOMMU" is also interesting; a more
> concrete scenario might be nice, yet I realize you may be limited in
> what you're allowed to say.

Sure. On AMD x86 platforms there is a co-processor called PSP running
TEE firmware. The PSP is not behind an IOMMU. Dom0 needs occasionally to
pass addresses to it.  See drivers/tee/amdtee/ and
include/linux/psp-tee.h in Linux.

This is not a new problem. On ARM we have been dealing with this kind of
issues for more than a decade and it is the reason why originally the
decision was to run Dom0 1:1 mapped on ARM. I am not suggesting to map
Dom0 PVH 1:1; I am only providing context and highlighting that we
have been lucky on x86 :-)


> > XENMEM_exchange was blocked for HVM/PVH DomUs, and accidentally it
> > impacted Dom0 PVH as well.
> 
> This wasn't accidental at all, I don't think.

You as the original author of the patch (fae7d5be8bb) in question would
surely know better. But the way the commit message was written was
pointing toward a Dom0/DeviceModel problem:

"The operation's success can't be controlled by the guest, as the device
model may have an active mapping of the page."


> > --- a/xen/arch/x86/mm.c
> > +++ b/xen/arch/x86/mm.c
> > @@ -4401,7 +4401,7 @@ int steal_page(
> >      const struct domain *owner;
> >      int rc;
> >  
> > -    if ( paging_mode_external(d) )
> > +    if ( paging_mode_external(d) && !is_hardware_domain(d) )
> >          return -EOPNOTSUPP;
> >  
> >      /* Grab a reference to make sure the page doesn't change under our feet */
> 
> Is this (in particular the code following below here) a safe thing to do
> when we don't properly refcount page references from the P2M, yet? It's
> Dom0, yes, but even there I might see potential security implications (as
> top violating privacy of a guest).

I don't think I am following, could you please elaborate more? The
change I am proposing is to allow Dom0 to share its own pages to the
co-processor. DomUs are not in the picture. I would be happy to add
further restriction to that effect. Is there something else you have in
mind?


> Furthermore cleanup_page_mappings() (called later in the function) has a
> PV-only aspect which would apparently need widening to PVH Dom0 then,
> too.

You are referring to:

        if ( d && unlikely(need_iommu_pt_sync(d)) && is_pv_domain(d) )
            rc = iommu_legacy_unmap(d, _dfn(mfn), 1u << PAGE_ORDER_4K);

is that correct?


> > --- a/xen/common/memory.c
> > +++ b/xen/common/memory.c
> > @@ -794,7 +794,7 @@ static long memory_exchange(XEN_GUEST_HANDLE_PARAM(xen_memory_exchange_t) arg)
> >              rc = guest_physmap_add_page(d, _gfn(gpfn), mfn,
> >                                          exch.out.extent_order) ?: rc;
> >  
> > -            if ( !paging_mode_translate(d) &&
> > +            if ( (!paging_mode_translate(d) || is_hardware_domain(d)) &&
> >                   __copy_mfn_to_guest_offset(exch.out.extent_start,
> >                                              (i << out_chunk_order) + j,
> >                                              mfn) )
> 
> Wait, no: A PVH domain (Dom0 or not) can't very well make use of MFNs, can
> it?

One way or another Dom0 PVH needs to know the MFN to pass it to the
co-processor.


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Date: Mon, 28 Apr 2025 20:00:39 +0000
To: Jan Beulich 
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com, xen-devel@lists.xenproject.org
Subject: Re: [PATCH v4] xen/domain: unify domain ID allocation
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References: <20250422215322.521464-1-dmukhin@ford.com> 
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On Mon, Apr 28, 2025 at 11:14:25AM +0200, Jan Beulich wrote:
> On 22.04.2025 23:54, dmkhn@proton.me wrote:
> > --- a/xen/common/domain.c
> > +++ b/xen/common/domain.c
> > @@ -66,6 +66,57 @@ DEFINE_RCU_READ_LOCK(domlist_read_lock);
> >  static struct domain *domain_hash[DOMAIN_HASH_SIZE];
> >  struct domain *domain_list;
> >
> > +/* Domain ID allocator */
> > +static unsigned int domid_last;
> > +
> > +static inline bool is_free_domid(domid_t dom)
> > +{
> > +    struct domain *d =3D rcu_lock_domain_by_id(dom);
> > +
> > +    if ( d )
> > +        rcu_unlock_domain(d);
> > +
> > +    return !d;
> > +}
> > +
> > +/*
> > + * Allocate new domain ID based on the hint.
> > + *
> > + * If hint is outside of valid [0..DOMID_FIRST_RESERVED - 1] range of =
IDs,
> > + * perform an exhaustive search starting from the end of the used doma=
in ID
> > + * range, excluding hardware_domid.
> > + */
> > +domid_t domid_alloc(domid_t hint)
> > +{
> > +    domid_t domid =3D DOMID_INVALID;
> > +
> > +    if ( hint < DOMID_FIRST_RESERVED )
> > +    {
> > +        /* Exact match. */
> > +        if ( is_free_domid(hint) )
> > +            domid =3D hint;
> > +    }
> > +    else
> > +    {
> > +        for ( domid =3D domid_last + 1; domid !=3D domid_last; domid++=
 )
> > +        {
> > +            if ( domid =3D=3D DOMID_FIRST_RESERVED )
> > +                domid =3D 0;
> > +
> > +            if ( domid =3D=3D hardware_domid )
> > +                continue;
> > +
> > +            if ( is_free_domid(domid) )
> > +                break;
> > +        }
> > +
> > +        if ( domid !=3D domid_last )
> > +            domid_last =3D domid;
> > +    }
> > +
> > +    return domid;
> > +}
>=20
> The function name suggests the ID returned is firmly allocated by the tim=
e
> the caller gets to see / use it. Yet that's not the case. Two back-to-bac=
k
> calls here with the same argument will yield the same result, afaict. Thi=
s
> supports my prior statement that I don't think it is a good idea to
> "centralize" things like this.

I agree, back-to-back call requirement is not implemented, I will fix that.

I think a library service for domain ID allocation will be useful since the=
re
are 2 users of it already and there's one more user of similar functionalit=
y is
on review (hyperlauch DT parsing).

>=20
> Jan



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Date: Mon, 28 Apr 2025 13:02:43 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Teddy Astie 
cc: Stefano Stabellini , 
    xen-devel@lists.xenproject.org, Jan Beulich , 
    Andrew Cooper , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
    "Ragiadakou, Xenia" , jason.andryuk@amd.com, 
    agarciav@amd.com
Subject: Re: [PATCH] xen/x86: allow Dom0 PVH to call XENMEM_exchange
In-Reply-To: 
Message-ID: 
References:  
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On Mon, 28 Apr 2025, Teddy Astie wrote:
> Hello Stefano,
> 
> Le 25/04/2025 à 22:21, Stefano Stabellini a écrit :
> > From: Xenia Ragiadakou 
> >
> > Dom0 PVH might need XENMEM_exchange when passing contiguous memory
> > addresses to firmware or co-processors not behind an IOMMU.
> >
> > XENMEM_exchange was blocked for HVM/PVH DomUs, and accidentally it
> > impacted Dom0 PVH as well.
> >
> > Permit Dom0 PVH to call XENMEM_exchange while leaving it blocked for
> > HVM/PVH DomUs.
> >
> 
> In addition to Jan's remarks, I think it wants some additional
> clarifications on the hypercall interface. public/memory.h indicates
> "only PV guests can use this operation", so the interface is actually
> unspecified about HVM guests (e.g what are MFN/GMFN in this case ?).

That is a new addition from c08a11ab98c. If you see fae7d5be8bb, there
is a statement that "we permitted this operation".


> > Signed-off-by: Xenia Ragiadakou 
> > Signed-off-by: Stefano Stabellini 
> >
> > diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
> > index 1cf2365167..e995944333 100644
> > --- a/xen/arch/x86/mm.c
> > +++ b/xen/arch/x86/mm.c
> > @@ -4401,7 +4401,7 @@ int steal_page(
> >       const struct domain *owner;
> >       int rc;
> >
> > -    if ( paging_mode_external(d) )
> > +    if ( paging_mode_external(d) && !is_hardware_domain(d) )
> >           return -EOPNOTSUPP;
> >
> >       /* Grab a reference to make sure the page doesn't change under our feet */
> > diff --git a/xen/common/memory.c b/xen/common/memory.c
> > index 8ca4e1a842..796eec081b 100644
> > --- a/xen/common/memory.c
> > +++ b/xen/common/memory.c
> > @@ -794,7 +794,7 @@ static long memory_exchange(XEN_GUEST_HANDLE_PARAM(xen_memory_exchange_t) arg)
> >               rc = guest_physmap_add_page(d, _gfn(gpfn), mfn,
> >                                           exch.out.extent_order) ?: rc;
> >
> > -            if ( !paging_mode_translate(d) &&
> > +            if ( (!paging_mode_translate(d) || is_hardware_domain(d)) &&
> >                    __copy_mfn_to_guest_offset(exch.out.extent_start,
> >                                               (i << out_chunk_order) + j,
> >                                               mfn) )
--8323329-1131418842-1745870495=:785180--


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Date: Mon, 28 Apr 2025 20:06:59 +0000
To: Jan Beulich 
From: dmkhn@proton.me
Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, dmukhin@ford.com, xen-devel@lists.xenproject.org
Subject: Re: [PATCH v2 1/3] xen/console: cleanup conring management
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References: <20250426185021.100646-1-dmukhin@ford.com> <20250426185021.100646-2-dmukhin@ford.com> 
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On Mon, Apr 28, 2025 at 08:50:52AM +0200, Jan Beulich wrote:
> On 26.04.2025 20:50, dmkhn@proton.me wrote:
> > From: Denis Mukhin 
> >
> > Move console_locks_busted handling inside conring_puts() to remove
> > tasklet code duplication.
> >
> > Signed-off-by: Denis Mukhin 
> > Reviewed-by: Stefano Stabellini 
> > ---
> > Changes v1->v2:
> > - added Stefano's R-b
> > ---
> >  xen/drivers/char/console.c | 29 ++++++++++++++---------------
> >  1 file changed, 14 insertions(+), 15 deletions(-)
> >
> > diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c
> > index c3150fbdb7..aaa97088aa 100644
> > --- a/xen/drivers/char/console.c
> > +++ b/xen/drivers/char/console.c
> > @@ -325,6 +325,17 @@ static void cf_check do_dec_thresh(unsigned char k=
ey, bool unused)
> >   * ********************************************************
> >   */
> >
> > +static void cf_check notify_dom0_con_ring(void *unused)
> > +{
> > +    send_global_virq(VIRQ_CON_RING);
> > +}
> > +
> > +static DECLARE_SOFTIRQ_TASKLET(notify_dom0_con_ring_tasklet,
> > +                               notify_dom0_con_ring,
> > +                               NULL);
> > +
> > +static bool console_locks_busted;
> > +
> >  static void conring_puts(const char *str, size_t len)
> >  {
> >      ASSERT(rspin_is_locked(&console_lock));
> > @@ -334,6 +345,9 @@ static void conring_puts(const char *str, size_t le=
n)
> >
> >      if ( conringp - conringc > conring_size )
> >          conringc =3D conringp - conring_size;
> > +
> > +    if ( !console_locks_busted )
> > +        tasklet_schedule(¬ify_dom0_con_ring_tasklet);
> >  }
>=20
> As before I'm unconvinced it is a good idea to have tasklet scheduling he=
re.
> You also didn't address that v1 comment of mine verbally, iirc.

Sorry, I did not mean to ignore the v1 comment.
I am preparing another iteration, which, I think looks better.

>=20
> Jan



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Date: Mon, 28 Apr 2025 20:10:02 +0000
To: Jan Beulich 
From: dmkhn@proton.me
Cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, anthony.perard@vates.tech, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, dmukhin@ford.com, Stefano Stabellini 
Subject: Re: [PATCH v1 1/3] xen/console: cleanup conring management
Message-ID: 
In-Reply-To: 
References: <20250403000604.169619-1-dmukhin@ford.com> <20250403000604.169619-2-dmukhin@ford.com>  
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On Mon, Apr 28, 2025 at 08:47:01AM +0200, Jan Beulich wrote:
> On 26.04.2025 00:18, Stefano Stabellini wrote:
> > On Thu, 3 Apr 2025, dmkhn@proton.me wrote:
> >> From: Denis Mukhin 
> >>
> >> Move console_locks_busted handling inside conring_puts() to remove
> >> tasklet code duplication.
> >>
> >> Signed-off-by: Denis Mukhin 
> >
> > This patch is a good cleanup but makes one functional change: previousl=
y
> > guest_console_write would always call tasklet_schedule. Now, it only
> > calls tasklet_schedule if !console_locks_busted.
> >
> > On ARM, we don't call console_force_unlock and never set
> > console_locks_busted. It makes no difference.
> >
> > On x86, there are a few callers of console_force_unlock, so it would
> > make a difference. However, looking at the callers, it seems to me that
> > the change is for the better and better aligns the code with the
> > intention behind console_force_unlock.
>=20
> Denis, I see you submitted v2 without any adjustment to the description.
> With Stefano having pointed out the aspect, it should have been pretty
> clear that such a (kind of hidden) functional change wants justifying.
>=20
> Furthermore, you added Stefano's R-b without any hint towards the extra
> request he had put up above wrt x86.

Sorry for that, I will update the descriptions in the next iteration.
I am preparing the update, which reverts the locking part completely.=20

>=20
> Jan



From xen-devel-bounces@lists.xenproject.org Mon Apr 28 20:11:47 2025
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Date: Mon, 28 Apr 2025 13:11:38 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: dmkhn@proton.me
cc: Stefano Stabellini , 
    xen-devel@lists.xenproject.org, 
    Andrei Cherechesu , michal.orzel@amd.com, 
    jason.andryuk@amd.com
Subject: Re: [PATCH v7] uboot-script-gen: Dynamically compute addr and size
 when loading binaries
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On Sat, 26 Apr 2025, dmkhn@proton.me wrote:
> On Fri, Apr 25, 2025 at 04:35:06PM -0700, Stefano Stabellini wrote:
> > From: Andrei Cherechesu 
> > 
> > Normally, the Imagebuilder would precompute the sizes of the loaded
> > binaries and addresses where they are loaded before generating the
> > script, and the sizes and addresses that needed to be provided to
> > Xen via /chosen would be hardcoded in the boot script.
> > 
> > Added an option via "-s" parameter to avoid hardcoding any
> > address in the boot script, and dynamically compute the
> > loading addresses for binaries. The first loading address is based
> > on the MEMORY_START parameter and after loading each binary,
> > the loading address and the size of the binary are stored in
> > variables with corresponding names. Then, the loading address
> > for the next binary is computed and aligned to 0x200000.
> > 
> > If the "-s" parameter is not used, the normal flow is executed,
> > where the loading addresses and sizes for each binaries are
> > precomputed and hardcoded inside the script, but the loading
> > addresses and sizes for each binary are now also stored for eventual
> > later use.
> > 
> > Reserved memory regions are left TBD in the -s case.
> > 
> > Link: https://lists.xenproject.org/archives/html/xen-devel/2022-09/msg01862.html
> > Signed-off-by: Andrei Cherechesu 
> > Signed-off-by: Stefano Stabellini 
> 
> Reviewed-by: Denis Mukhin 

Thanks Denis! I'll keep your R-b even if I made a couple of changes to
address Andrei's comment


> > ---
> > Changes in v7:
> > - use $()
> > - better description and alphabetical order
> > - use heredoc
> > 
> > Changes in v6:
> > - make initial ${memaddr} setting depending on CALC
> > 
> > This patch adds quite a bit of complexity which is the reason why I
> > didn't originally commit it. Now that we are enabling ImageBuilder in
> > Yocto, it turns out this patch is required because Yocto invokes
> > ImageBuilder before all the binaries are ready and available.
> > 
> > Andrei, sorry for taking so long to realize why it is essential, but we
> > are getting there now.
> > 
> > The changes I made to the original patch are purely to make it simpler
> > to maintain.
> > ---
> > 
> > diff --git a/README.md b/README.md
> > index f8039ec..28c9e6b 100644
> > --- a/README.md
> > +++ b/README.md
> > @@ -356,6 +356,8 @@ Where:\
> >     can only be used  in combination with the -k option.  This adds the
> >     public key into the dtb.  Then one can add this dtb back into the
> >     u-boot bin or elf.\
> > +-s addresses and sizes are calculated dynamically from U-Boot, hence
> > +   binaries don't need to be available at the time of invocation.\
> > 
> >  ### Signed FIT images
> > 
> > diff --git a/scripts/uboot-script-gen b/scripts/uboot-script-gen
> > index 638154a..73d9600 100755
> > --- a/scripts/uboot-script-gen
> > +++ b/scripts/uboot-script-gen
> > @@ -1,8 +1,11 @@
> >  #!/bin/bash
> > 
> >  offset=$((2*1024*1024))
> > +PADDING_MASK=$(printf "0x%X\n" $(($offset - 1)))
> > +PADDING_MASK_INV=$(printf "0x%X\n" $((~$PADDING_MASK)))
> >  filesize=0
> >  prog_req=(mkimage file fdtput mktemp awk od)
> > +CALC=""
> > 
> >  function cleanup_and_return_err()
> >  {
> > @@ -100,17 +103,40 @@ function dt_set()
> >      fi
> >  }
> > 
> > +function dt_set_calc()
> > +{
> > +    local path=$1
> > +    local var=$2
> > +    local name_var=$3
> > +
> > +    local addr_var="$name_var"_addr
> > +    local size_var="$name_var"_size
> > +
> > +    cat >> $UBOOT_SOURCE <<- EOF
> > +	setexpr addr_hi \${$addr_var} / 0x100000000
> > +	setexpr addr_lo \${$addr_var} \& 0xFFFFFFFF
> > +	setexpr size_hi \${$size_var} / 0x100000000
> > +	setexpr size_lo \${$size_var} \& 0xFFFFFFFF
> > +	fdt set $path $var <0x\${addr_hi} 0x\${addr_lo} 0x\${size_hi} 0x\${size_lo}>
> > +	EOF
> > +}
> > +
> >  function add_device_tree_kernel()
> >  {
> >      local path=$1
> > -    local addr=$2
> > -    local size=$3
> > -    local bootargs=$4
> > +    local name=$2
> > +    local addr=$3
> > +    local size=$4
> > +    local bootargs=$5
> >      local node_name="module@${addr#0x}"
> > 
> >      dt_mknode "$path" "$node_name"
> >      dt_set "$path/$node_name" "compatible" "str_a" "multiboot,kernel multiboot,module"
> > -    dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
> > +    if test "$CALC"; then
> > +        dt_set_calc "$path/$node_name" "reg" $name
> > +    else
> > +        dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
> > +    fi
> >      dt_set "$path/$node_name" "bootargs" "str" "$bootargs"
> >  }
> > 
> > @@ -118,26 +144,36 @@ function add_device_tree_kernel()
> >  function add_device_tree_ramdisk()
> >  {
> >      local path=$1
> > -    local addr=$2
> > -    local size=$3
> > +    local name=$2
> > +    local addr=$3
> > +    local size=$4
> >      local node_name="module@${addr#0x}"
> > 
> >      dt_mknode "$path"  "$node_name"
> >      dt_set "$path/$node_name" "compatible" "str_a" "multiboot,ramdisk multiboot,module"
> > -    dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
> > +    if test "$CALC"; then
> > +        dt_set_calc "$path/$node_name" "reg" $name
> > +    else
> > +        dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
> > +    fi
> >  }
> > 
> > 
> >  function add_device_tree_passthrough()
> >  {
> >      local path=$1
> > -    local addr=$2
> > -    local size=$3
> > +    local name=$2
> > +    local addr=$3
> > +    local size=$4
> >      local node_name="module@${addr#0x}"
> > 
> >      dt_mknode "$path"  "$node_name"
> >      dt_set "$path/$node_name" "compatible" "str_a" "multiboot,device-tree multiboot,module"
> > -    dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
> > +    if test "$CALC"; then
> > +        dt_set_calc "$path/$node_name" "reg" $name
> > +    else
> > +        dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
> > +    fi
> >  }
> > 
> >  function add_device_tree_mem()
> > @@ -358,7 +394,11 @@ function xen_device_tree_editing()
> > 
> >          dt_mknode "/chosen" "$node_name"
> >          dt_set "/chosen/$node_name" "compatible" "str_a" "xen,xsm-policy xen,multiboot-module multiboot,module"
> > -        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $xen_policy_addr $xen_policy_size)"
> > +        if test "$CALC"; then
> > +            dt_set_calc "/chosen/$node_name" "reg" "xen_policy"
> > +        else
> > +            dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $xen_policy_addr $xen_policy_size)"
> > +        fi
> >      fi
> > 
> >      if test "$DOM0_KERNEL"
> > @@ -367,7 +407,11 @@ function xen_device_tree_editing()
> > 
> >          dt_mknode "/chosen" "$node_name"
> >          dt_set "/chosen/$node_name" "compatible" "str_a" "xen,linux-zimage xen,multiboot-module multiboot,module"
> > -        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $dom0_kernel_addr $dom0_kernel_size)"
> > +        if test "$CALC"; then
> > +            dt_set_calc "/chosen/$node_name" "reg" "dom0_linux"
> > +        else
> > +            dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $dom0_kernel_addr $dom0_kernel_size)"
> > +        fi
> >          dt_set "/chosen" "xen,dom0-bootargs" "str" "$DOM0_CMD"
> >      fi
> > 
> > @@ -377,7 +421,11 @@ function xen_device_tree_editing()
> > 
> >          dt_mknode "/chosen" "$node_name"
> >          dt_set "/chosen/$node_name" "compatible" "str_a" "xen,linux-initrd xen,multiboot-module multiboot,module"
> > -        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $ramdisk_addr $ramdisk_size)"
> > +        if test "$CALC"; then
> > +            dt_set_calc "/chosen/$node_name" "reg" "dom0_ramdisk"
> > +        else
> > +            dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $ramdisk_addr $ramdisk_size)"
> > +        fi
> >      fi
> > 
> >      i=0
> > @@ -464,14 +512,14 @@ function xen_device_tree_editing()
> > 
> >          xen_dt_domu_add_vcpu_nodes "/chosen/domU$i" $i ${DOMU_VCPUS[$i]}
> > 
> > -        add_device_tree_kernel "/chosen/domU$i" ${domU_kernel_addr[$i]} ${domU_kernel_size[$i]} "${DOMU_CMD[$i]}"
> > +        add_device_tree_kernel "/chosen/domU$i" "domU${i}_kernel" ${domU_kernel_addr[$i]} ${domU_kernel_size[$i]} "${DOMU_CMD[$i]}"
> >          if test "${domU_ramdisk_addr[$i]}"
> >          then
> > -            add_device_tree_ramdisk "/chosen/domU$i" ${domU_ramdisk_addr[$i]} ${domU_ramdisk_size[$i]}
> > +            add_device_tree_ramdisk "/chosen/domU$i" "domU${i}_ramdisk" ${domU_ramdisk_addr[$i]} ${domU_ramdisk_size[$i]}
> >          fi
> >          if test "${domU_passthrough_dtb_addr[$i]}"
> >          then
> > -            add_device_tree_passthrough "/chosen/domU$i" ${domU_passthrough_dtb_addr[$i]} ${domU_passthrough_dtb_size[$i]}
> > +            add_device_tree_passthrough "/chosen/domU$i" "domU${i}_fdt" ${domU_passthrough_dtb_addr[$i]} ${domU_passthrough_dtb_size[$i]}
> >          fi
> >          i=$(( $i + 1 ))
> >      done
> > @@ -504,7 +552,11 @@ function device_tree_editing()
> > 
> >      if test $UBOOT_SOURCE
> >      then
> > -        echo "fdt addr $device_tree_addr" >> $UBOOT_SOURCE
> > +        if test "$CALC"; then
> > +            echo "fdt addr \${host_fdt_addr}" >> $UBOOT_SOURCE
> > +        else
> > +            echo "fdt addr $device_tree_addr" >> $UBOOT_SOURCE
> > +        fi
> >          echo "fdt resize 1024" >> $UBOOT_SOURCE
> > 
> >          if test $NUM_DT_OVERLAY && test $NUM_DT_OVERLAY -gt 0
> > @@ -512,7 +564,11 @@ function device_tree_editing()
> >              i=0
> >              while test $i -lt $NUM_DT_OVERLAY
> >              do
> > -                echo "fdt apply ${dt_overlay_addr[$i]}" >> $UBOOT_SOURCE
> > +                if test "$CALC"; then
> > +                    echo "fdt apply \${host_fdto${i}_addr}" >> $UBOOT_SOURCE
> > +                else
> > +                    echo "fdt apply ${dt_overlay_addr[$i]}" >> $UBOOT_SOURCE
> > +                fi
> >                  i=$(( $i + 1 ))
> >              done
> >          fi
> > @@ -530,8 +586,12 @@ function fill_reserved_spaces_from_dtb()
> >  {
> >      if [ ! -f $DEVICE_TREE ]
> >      then
> > -        echo "File $DEVICE_TREE doesn't exist, exiting";
> > -        cleanup_and_return_err
> > +        if test "$CALC"; then
> > +            return
> > +        else
> > +            echo "File $DEVICE_TREE doesn't exist, exiting";
> > +            cleanup_and_return_err
> > +        fi
> >      fi
> > 
> >      # Check if reserved-memory node exists
> > @@ -613,7 +673,7 @@ function get_image_size()
> >      printf "%u" $effective_size
> >  }
> > 
> > -function add_size()
> > +function add_size_from_file()
> >  {
> >      local filename=$1
> >      local size=`stat -L --printf="%s" $filename`
> > @@ -645,6 +705,26 @@ function add_size()
> >      filesize=$size
> >  }
> > 
> > +function add_size_calculate()
> > +{
> > +    local fit_scr_name=$1
> > +
> > +    cat >> $UBOOT_SOURCE <<- EOF
> > +	setenv "$fit_scr_name"_addr \${memaddr}
> > +	setenv "$fit_scr_name"_size \${filesize}
> > +	setexpr memaddr \${memaddr} \+ \${filesize}
> > +	setexpr memaddr \${memaddr} \+ $PADDING_MASK
> > +	setexpr memaddr \${memaddr} \& $PADDING_MASK_INV
> > +	EOF
> > +
> > +    # TODO: missing ${RESERVED_MEM_SPACES[@]} check
> > +
> > +    # The following are updated to avoid collisions in node names, but
> > +    # they are not actively used.
> > +    memaddr=$((memaddr + offset))
> > +    filesize=$offset
> > +}
> > +
> >  function load_file()
> >  {
> >      local filename=$1
> > @@ -657,10 +737,16 @@ function load_file()
> >      if test "$FIT"
> >      then
> >          echo "imxtract \$fit_addr $fit_scr_name $memaddr" >> $UBOOT_SOURCE
> > +        add_size_from_file $filename
> >      else
> > -        echo "$LOAD_CMD $memaddr ${prepend_path:+$prepend_path/}$relative_path" >> $UBOOT_SOURCE
> > +        if test "$CALC"; then
> > +            echo "$LOAD_CMD \${memaddr} ${prepend_path:+$prepend_path/}$relative_path" >> $UBOOT_SOURCE
> > +            add_size_calculate $fit_scr_name
> > +        else
> > +            echo "$LOAD_CMD $memaddr ${prepend_path:+$prepend_path/}$relative_path" >> $UBOOT_SOURCE
> > +            add_size_from_file $filename
> > +        fi
> >      fi
> > -    add_size $filename
> >  }
> > 
> >  function check_file_type()
> > @@ -670,8 +756,13 @@ function check_file_type()
> > 
> >      if [ ! -f $filename ]
> >      then
> > -        echo "File $filename doesn't exist, exiting";
> > -        cleanup_and_return_err
> > +        if test "$CALC"
> > +        then
> > +            return
> > +        else
> > +            echo "File $filename doesn't exist, exiting";
> > +            cleanup_and_return_err
> > +        fi
> >      fi
> > 
> >      # if file doesn't know what it is, it outputs data, so include that
> > @@ -705,8 +796,13 @@ function check_compressed_file_type()
> > 
> >      if [ ! -f $filename ]
> >      then
> > -        echo "File $filename doesn't exist, exiting";
> > -        cleanup_and_return_err
> > +        if test "$CALC"
> > +        then
> > +            return
> > +        else
> > +            echo "File $filename doesn't exist, exiting";
> > +            cleanup_and_return_err
> > +        fi
> >      fi
> > 
> >      file_type=$( file -L $filename )
> > @@ -872,6 +968,12 @@ function linux_config()
> >  generate_uboot_images()
> >  {
> >      local arch=$(file -L $XEN | grep -E 'ARM64|Aarch64')
> > +
> > +    if test "$CALC"
> > +    then
> > +        echo "bootm is not compatible with -s"
> > +        cleanup_and_return_err
> > +    fi
> > 
> >      if test "$arch"
> >      then
> > @@ -997,7 +1099,11 @@ bitstream_load_and_config()
> >          if test "$UBOOT_SOURCE"
> >          then
> >              # we assume the FPGA device is 0 here
> > -            echo "fpga load 0 $bitstream_addr $bitstream_size" >> "$UBOOT_SOURCE"
> > +            if test "$CALC"; then
> > +                echo "fpga load 0 \${fpga_bitstream_addr} \${fpga_bitstream_size}" >> "$UBOOT_SOURCE"
> > +            else
> > +                echo "fpga load 0 $bitstream_addr $bitstream_size" >> "$UBOOT_SOURCE"
> > +            fi
> >          fi
> >      fi
> >  }
> > @@ -1271,7 +1377,7 @@ function print_help
> >  {
> >      script=`basename "$0"`
> >      echo "usage:"
> > -    echo "	$script -c CONFIG_FILE -d DIRECTORY [-t LOAD_CMD] [-o FILE] [-k KEY_DIR/HINT [-u U-BOOT_DTB]] [-e] [-f] [-p PREPEND_PATH]"
> > +    echo "	$script -c CONFIG_FILE -d DIRECTORY [-t LOAD_CMD] [-o FILE] [-k KEY_DIR/HINT [-u U-BOOT_DTB]] [-e] [-f] [-p PREPEND_PATH] [-s]"
> >      echo "	$script -h"
> >      echo "where:"
> >      echo "	CONFIG_FILE - configuration file"
> > @@ -1289,13 +1395,14 @@ function print_help
> >      echo "	-f - enable generating a FIT image"
> >      echo "	PREPEND_PATH - path to be appended before file names to match deploy location within rootfs"
> >      echo "	-h - prints out the help message and exits "
> > +    echo "	-s - let U-Boot calculate binary images load addresses/sizes dynamically"
> >      echo "Defaults:"
> >      echo "	CONFIG_FILE=$cfg_file, UBOOT_TYPE=\"LOAD_CMD\" env var, DIRECTORY=$uboot_dir"
> >      echo "Example:"
> >      echo "	$script -c ../config -d ./build42 -t \"scsi load 1:1\""
> >  }
> > 
> > -while getopts ":c:t:d:ho:k:u:fp:" opt; do
> > +while getopts ":c:t:d:ho:k:u:fp:s" opt; do
> >      case ${opt} in
> >      t )
> >          case $OPTARG in
> > @@ -1340,6 +1447,9 @@ while getopts ":c:t:d:ho:k:u:fp:" opt; do
> >      p )
> >          prepend_path="$OPTARG"
> >          ;;
> > +    s )
> > +        CALC=y
> > +        ;;
> >      h )
> >          print_help
> >          exit 0
> > @@ -1533,6 +1643,10 @@ uboot_addr=$memaddr
> >  # 2MB are enough for a uboot script
> >  memaddr=$(( $memaddr + $offset ))
> >  memaddr=`printf "0x%X\n" $memaddr`
> > +if test "$CALC"
> > +then
> > +    echo "setenv memaddr $memaddr" >> $UBOOT_SOURCE
> > +fi
> > 
> >  fill_reserved_spaces_from_dtb
> > 
> > @@ -1583,7 +1697,11 @@ fi
> > 
> >  if [ "$BOOT_CMD" != "none" ]
> >  then
> > -    echo "$BOOT_CMD $kernel_addr $([ "$BOOT_CMD" = "bootefi" ] || echo '-') $device_tree_addr" >> $UBOOT_SOURCE
> > +    if test "$CALC"; then
> > +        echo "$BOOT_CMD \${host_kernel_addr} $([ "$BOOT_CMD" = "bootefi" ] || echo '-') \${host_fdt_addr}" >> $UBOOT_SOURCE
> > +    else
> > +        echo "$BOOT_CMD $kernel_addr $([ "$BOOT_CMD" = "bootefi" ] || echo '-') $device_tree_addr" >> $UBOOT_SOURCE
> > +    fi
> >  else
> >      # skip boot command but store load addresses to be used later
> >      echo "setenv host_kernel_addr $kernel_addr" >> $UBOOT_SOURCE
> 


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Date: Mon, 28 Apr 2025 13:12:22 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Andrei Cherechesu 
cc: Stefano Stabellini , 
    Xen-devel , 
    Michal Orzel , jason.andryuk@amd.com, 
    dmkhn@proton.me, Andrei Cherechesu , 
    "S32@nxp.com" 
Subject: Re: [PATCH v7] uboot-script-gen: Dynamically compute addr and size
 when loading binaries
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On Mon, 28 Apr 2025, Andrei Cherechesu wrote:
> Hi Stefano,
> 
> On 26/04/2025 02:35, Stefano Stabellini wrote:
> > From: Andrei Cherechesu 
> >
> > Normally, the Imagebuilder would precompute the sizes of the loaded binaries and addresses where they are loaded before generating the script, and the sizes and addresses that needed to be provided to Xen via /chosen would be hardcoded in the boot script.
> >
> > Added an option via "-s" parameter to avoid hardcoding any address in the boot script, and dynamically compute the loading addresses for binaries. The first loading address is based on the MEMORY_START parameter and after loading each binary, the loading address and the size of the binary are stored in variables with corresponding names. Then, the loading address for the next binary is computed and aligned to 0x200000.
> >
> > If the "-s" parameter is not used, the normal flow is executed, where the loading addresses and sizes for each binaries are precomputed and hardcoded inside the script, but the loading addresses and sizes for each binary are now also stored for eventual later use.
> >
> > Reserved memory regions are left TBD in the -s case.
> >
> > Link: https://lists.xenproject.org/archives/html/xen-devel/2022-09/msg01862.html
> > Signed-off-by: Andrei Cherechesu 
> > Signed-off-by: Stefano Stabellini 
> > ---
> > Changes in v7:
> > - use $()
> > - better description and alphabetical order
> > - use heredoc
> >
> > Changes in v6:
> > - make initial ${memaddr} setting depending on CALC
> >
> > This patch adds quite a bit of complexity which is the reason why I didn't originally commit it. Now that we are enabling ImageBuilder in Yocto, it turns out this patch is required because Yocto invokes ImageBuilder before all the binaries are ready and available.
> >
> > Andrei, sorry for taking so long to realize why it is essential, but we are getting there now.
> 
> I'm very glad that you're finding it useful too now!
> 
> The original problem for us was not related to building with
> Imagebuilder from Yocto, but this was rather done to help users
> have more flexibility with the actual binaries they're
> deploying on target (more specifically, with their sizes).
> 
> In other words, as long as the same file names are used, their
> corresponding sizes do not need to be hard-coded too in the
> script, since we can dynamically figure them out and write them
> to /chosen. As such, the binaries (xen, kernel image, fdt,
> ramdisks) can be replaced without regenerating the boot script
> and caring about their sizes.
> 
> Regarding building from Yocto, in our case, we're invoking
> Imagebuilder from some separate recipe after everything has
> been built. The only situation that comes to mind where it's a
> bit more tricky to wait for the artifacts to be ready is for the
> ramdisk/initramfs ones, but it can be done too. So it can work
> both with precomputed and dynamic addresses.
> 
> >
> > The changes I made to the original patch are purely to make it simpler to maintain.
> 
> Thank you for taking the time to refactor and resend it!
> Please also see my comments below.
> 
> > ---
> >
> > diff --git a/README.md b/README.md
> > index f8039ec..28c9e6b 100644
> > --- a/README.md
> > +++ b/README.md
> > @@ -356,6 +356,8 @@ Where:\
> >     can only be used  in combination with the -k option.  This adds the
> >     public key into the dtb.  Then one can add this dtb back into the
> >     u-boot bin or elf.\
> > +-s addresses and sizes are calculated dynamically from U-Boot, hence
> > +   binaries don't need to be available at the time of invocation.\
> >
> >  ### Signed FIT images
> >
> > diff --git a/scripts/uboot-script-gen b/scripts/uboot-script-gen index 638154a..73d9600 100755
> > --- a/scripts/uboot-script-gen
> > +++ b/scripts/uboot-script-gen
> > @@ -1,8 +1,11 @@
> >  #!/bin/bash
> >
> >  offset=$((2*1024*1024))
> > +PADDING_MASK=$(printf "0x%X\n" $(($offset - 1)))
> > +PADDING_MASK_INV=$(printf "0x%X\n" $((~$PADDING_MASK)))
> >  filesize=0
> >  prog_req=(mkimage file fdtput mktemp awk od)
> > +CALC=""
> >
> >  function cleanup_and_return_err()
> >  {
> > @@ -100,17 +103,40 @@ function dt_set()
> >      fi
> >  }
> >
> > +function dt_set_calc()
> > +{
> > +    local path=$1
> > +    local var=$2
> > +    local name_var=$3
> > +
> > +    local addr_var="$name_var"_addr
> > +    local size_var="$name_var"_size
> > +
> > +    cat >> $UBOOT_SOURCE <<- EOF
> > +       setexpr addr_hi \${$addr_var} / 0x100000000
> > +       setexpr addr_lo \${$addr_var} \& 0xFFFFFFFF
> > +       setexpr size_hi \${$size_var} / 0x100000000
> > +       setexpr size_lo \${$size_var} \& 0xFFFFFFFF
> > +       fdt set $path $var <0x\${addr_hi} 0x\${addr_lo} 0x\${size_hi} 0x\${size_lo}>
> > +       EOF
> > +}
> > +
> >  function add_device_tree_kernel()
> >  {
> >      local path=$1
> > -    local addr=$2
> > -    local size=$3
> > -    local bootargs=$4
> > +    local name=$2
> > +    local addr=$3
> > +    local size=$4
> > +    local bootargs=$5
> >      local node_name="module@${addr#0x}"
> >
> >      dt_mknode "$path" "$node_name"
> >      dt_set "$path/$node_name" "compatible" "str_a" "multiboot,kernel multiboot,module"
> > -    dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
> > +    if test "$CALC"; then
> > +        dt_set_calc "$path/$node_name" "reg" $name
> > +    else
> > +        dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
> > +    fi
> >      dt_set "$path/$node_name" "bootargs" "str" "$bootargs"
> >  }
> >
> > @@ -118,26 +144,36 @@ function add_device_tree_kernel()  function add_device_tree_ramdisk()  {
> >      local path=$1
> > -    local addr=$2
> > -    local size=$3
> > +    local name=$2
> > +    local addr=$3
> > +    local size=$4
> >      local node_name="module@${addr#0x}"
> >
> >      dt_mknode "$path"  "$node_name"
> >      dt_set "$path/$node_name" "compatible" "str_a" "multiboot,ramdisk multiboot,module"
> > -    dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
> > +    if test "$CALC"; then
> > +        dt_set_calc "$path/$node_name" "reg" $name
> > +    else
> > +        dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
> > +    fi
> >  }
> >
> >
> >  function add_device_tree_passthrough()
> >  {
> >      local path=$1
> > -    local addr=$2
> > -    local size=$3
> > +    local name=$2
> > +    local addr=$3
> > +    local size=$4
> >      local node_name="module@${addr#0x}"
> >
> >      dt_mknode "$path"  "$node_name"
> >      dt_set "$path/$node_name" "compatible" "str_a" "multiboot,device-tree multiboot,module"
> > -    dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
> > +    if test "$CALC"; then
> > +        dt_set_calc "$path/$node_name" "reg" $name
> > +    else
> > +        dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
> > +    fi
> >  }
> >
> >  function add_device_tree_mem()
> > @@ -358,7 +394,11 @@ function xen_device_tree_editing()
> >
> >          dt_mknode "/chosen" "$node_name"
> >          dt_set "/chosen/$node_name" "compatible" "str_a" "xen,xsm-policy xen,multiboot-module multiboot,module"
> > -        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $xen_policy_addr $xen_policy_size)"
> > +        if test "$CALC"; then
> > +            dt_set_calc "/chosen/$node_name" "reg" "xen_policy"
> > +        else
> > +            dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $xen_policy_addr $xen_policy_size)"
> > +        fi
> >      fi
> >
> >      if test "$DOM0_KERNEL"
> > @@ -367,7 +407,11 @@ function xen_device_tree_editing()
> >
> >          dt_mknode "/chosen" "$node_name"
> >          dt_set "/chosen/$node_name" "compatible" "str_a" "xen,linux-zimage xen,multiboot-module multiboot,module"
> > -        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $dom0_kernel_addr $dom0_kernel_size)"
> > +        if test "$CALC"; then
> > +            dt_set_calc "/chosen/$node_name" "reg" "dom0_linux"
> > +        else
> > +            dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $dom0_kernel_addr $dom0_kernel_size)"
> > +        fi
> >          dt_set "/chosen" "xen,dom0-bootargs" "str" "$DOM0_CMD"
> >      fi
> >
> > @@ -377,7 +421,11 @@ function xen_device_tree_editing()
> >
> >          dt_mknode "/chosen" "$node_name"
> >          dt_set "/chosen/$node_name" "compatible" "str_a" "xen,linux-initrd xen,multiboot-module multiboot,module"
> > -        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $ramdisk_addr $ramdisk_size)"
> > +        if test "$CALC"; then
> > +            dt_set_calc "/chosen/$node_name" "reg" "dom0_ramdisk"
> > +        else
> > +            dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $ramdisk_addr $ramdisk_size)"
> > +        fi
> >      fi
> >
> >      i=0
> > @@ -464,14 +512,14 @@ function xen_device_tree_editing()
> >
> >          xen_dt_domu_add_vcpu_nodes "/chosen/domU$i" $i ${DOMU_VCPUS[$i]}
> >
> > -        add_device_tree_kernel "/chosen/domU$i" ${domU_kernel_addr[$i]} ${domU_kernel_size[$i]} "${DOMU_CMD[$i]}"
> > +        add_device_tree_kernel "/chosen/domU$i" "domU${i}_kernel" ${domU_kernel_addr[$i]} ${domU_kernel_size[$i]} "${DOMU_CMD[$i]}"
> >          if test "${domU_ramdisk_addr[$i]}"
> >          then
> > -            add_device_tree_ramdisk "/chosen/domU$i" ${domU_ramdisk_addr[$i]} ${domU_ramdisk_size[$i]}
> > +            add_device_tree_ramdisk "/chosen/domU$i" "domU${i}_ramdisk"
> > + ${domU_ramdisk_addr[$i]} ${domU_ramdisk_size[$i]}
> >          fi
> >          if test "${domU_passthrough_dtb_addr[$i]}"
> >          then
> > -            add_device_tree_passthrough "/chosen/domU$i" ${domU_passthrough_dtb_addr[$i]} ${domU_passthrough_dtb_size[$i]}
> > +            add_device_tree_passthrough "/chosen/domU$i" "domU${i}_fdt"
> > + ${domU_passthrough_dtb_addr[$i]} ${domU_passthrough_dtb_size[$i]}
> >          fi
> >          i=$(( $i + 1 ))
> >      done
> > @@ -504,7 +552,11 @@ function device_tree_editing()
> >
> >      if test $UBOOT_SOURCE
> >      then
> > -        echo "fdt addr $device_tree_addr" >> $UBOOT_SOURCE
> > +        if test "$CALC"; then
> > +            echo "fdt addr \${host_fdt_addr}" >> $UBOOT_SOURCE
> > +        else
> > +            echo "fdt addr $device_tree_addr" >> $UBOOT_SOURCE
> > +        fi
> >          echo "fdt resize 1024" >> $UBOOT_SOURCE
> >
> >          if test $NUM_DT_OVERLAY && test $NUM_DT_OVERLAY -gt 0 @@ -512,7 +564,11 @@ function device_tree_editing()
> >              i=0
> >              while test $i -lt $NUM_DT_OVERLAY
> >              do
> > -                echo "fdt apply ${dt_overlay_addr[$i]}" >> $UBOOT_SOURCE
> > +                if test "$CALC"; then
> > +                    echo "fdt apply \${host_fdto${i}_addr}" >> $UBOOT_SOURCE
> > +                else
> > +                    echo "fdt apply ${dt_overlay_addr[$i]}" >> $UBOOT_SOURCE
> > +                fi
> >                  i=$(( $i + 1 ))
> >              done
> >          fi
> > @@ -530,8 +586,12 @@ function fill_reserved_spaces_from_dtb()  {
> >      if [ ! -f $DEVICE_TREE ]
> >      then
> > -        echo "File $DEVICE_TREE doesn't exist, exiting";
> > -        cleanup_and_return_err
> > +        if test "$CALC"; then
> > +            return
> > +        else
> > +            echo "File $DEVICE_TREE doesn't exist, exiting";
> > +            cleanup_and_return_err
> > +        fi
> >      fi
> >
> >      # Check if reserved-memory node exists @@ -613,7 +673,7 @@ function get_image_size()
> >      printf "%u" $effective_size
> >  }
> >
> > -function add_size()
> > +function add_size_from_file()
> >  {
> >      local filename=$1
> >      local size=`stat -L --printf="%s" $filename` @@ -645,6 +705,26 @@ function add_size()
> >      filesize=$size
> >  }
> >
> > +function add_size_calculate()
> > +{
> > +    local fit_scr_name=$1
> > +
> > +    cat >> $UBOOT_SOURCE <<- EOF
> > +       setenv "$fit_scr_name"_addr \${memaddr}
> > +       setenv "$fit_scr_name"_size \${filesize}
> 
> The quotes here should also be removed, since quotes are literals
> in heredoc:
>     setenv ${fit_scr_name}_addr \${memaddr}
>     setenv ${fit_scr_name}_size \${filesize}
> 
> Otherwise, we'll be getting this in the actual boot script
>     setenv "dom0_linux"_addr ${memaddr}
>     setenv "dom0_linux"_size ${filesize}
> 
> instead of
>     setenv dom0_linux_addr ${memaddr}
>     setenv dom0_linux_size ${filesize}
> 
> > +       setexpr memaddr \${memaddr} \+ \${filesize}
> > +       setexpr memaddr \${memaddr} \+ $PADDING_MASK
> > +       setexpr memaddr \${memaddr} \& $PADDING_MASK_INV
> > +       EOF
> > +
> > +    # TODO: missing ${RESERVED_MEM_SPACES[@]} check
> > +
> > +    # The following are updated to avoid collisions in node names, but
> > +    # they are not actively used.
> > +    memaddr=$((memaddr + offset))
> 
> I know you want to make this patch less complicated and I agree
> with that, since there was originally some more logic here which
> was not necessarily needed and was complicating things.
> 
> But even though this variable is only needed for 'module@..."
> node names, I think we should at least convert it to hex, to
> avoid getting confusing node names, like:
>     fdt mknod /chosen/domU0 module@2239758336
> 
> Keeping this here should be enough:
>     memaddr=$(printf "0x%X\n" $memaddr)

Both great suggestions, I'll do that


> > +    filesize=$offset
> > +}
> > +
> >  function load_file()
> >  {
> >      local filename=$1
> > @@ -657,10 +737,16 @@ function load_file()
> >      if test "$FIT"
> >      then
> >          echo "imxtract \$fit_addr $fit_scr_name $memaddr" >> $UBOOT_SOURCE
> > +        add_size_from_file $filename
> >      else
> > -        echo "$LOAD_CMD $memaddr ${prepend_path:+$prepend_path/}$relative_path" >> $UBOOT_SOURCE
> > +        if test "$CALC"; then
> > +            echo "$LOAD_CMD \${memaddr} ${prepend_path:+$prepend_path/}$relative_path" >> $UBOOT_SOURCE
> > +            add_size_calculate $fit_scr_name
> > +        else
> > +            echo "$LOAD_CMD $memaddr ${prepend_path:+$prepend_path/}$relative_path" >> $UBOOT_SOURCE
> > +            add_size_from_file $filename
> > +        fi
> >      fi
> > -    add_size $filename
> >  }
> >
> >  function check_file_type()
> > @@ -670,8 +756,13 @@ function check_file_type()
> >
> >      if [ ! -f $filename ]
> >      then
> > -        echo "File $filename doesn't exist, exiting";
> > -        cleanup_and_return_err
> > +        if test "$CALC"
> > +        then
> > +            return
> > +        else
> > +            echo "File $filename doesn't exist, exiting";
> > +            cleanup_and_return_err
> > +        fi
> >      fi
> >
> >      # if file doesn't know what it is, it outputs data, so include that @@ -705,8 +796,13 @@ function check_compressed_file_type()
> >
> >      if [ ! -f $filename ]
> >      then
> > -        echo "File $filename doesn't exist, exiting";
> > -        cleanup_and_return_err
> > +        if test "$CALC"
> > +        then
> > +            return
> > +        else
> > +            echo "File $filename doesn't exist, exiting";
> > +            cleanup_and_return_err
> > +        fi
> >      fi
> >
> >      file_type=$( file -L $filename )
> > @@ -872,6 +968,12 @@ function linux_config()
> >  generate_uboot_images()
> >  {
> >      local arch=$(file -L $XEN | grep -E 'ARM64|Aarch64')
> > +
> > +    if test "$CALC"
> > +    then
> > +        echo "bootm is not compatible with -s"
> > +        cleanup_and_return_err
> > +    fi
> >
> >      if test "$arch"
> >      then
> > @@ -997,7 +1099,11 @@ bitstream_load_and_config()
> >          if test "$UBOOT_SOURCE"
> >          then
> >              # we assume the FPGA device is 0 here
> > -            echo "fpga load 0 $bitstream_addr $bitstream_size" >> "$UBOOT_SOURCE"
> > +            if test "$CALC"; then
> > +                echo "fpga load 0 \${fpga_bitstream_addr} \${fpga_bitstream_size}" >> "$UBOOT_SOURCE"
> > +            else
> > +                echo "fpga load 0 $bitstream_addr $bitstream_size" >> "$UBOOT_SOURCE"
> > +            fi
> >          fi
> >      fi
> >  }
> > @@ -1271,7 +1377,7 @@ function print_help  {
> >      script=`basename "$0"`
> >      echo "usage:"
> > -    echo "     $script -c CONFIG_FILE -d DIRECTORY [-t LOAD_CMD] [-o FILE] [-k KEY_DIR/HINT [-u U-BOOT_DTB]] [-e] [-f] [-p PREPEND_PATH]"
> > +    echo "     $script -c CONFIG_FILE -d DIRECTORY [-t LOAD_CMD] [-o FILE] [-k KEY_DIR/HINT [-u U-BOOT_DTB]] [-e] [-f] [-p PREPEND_PATH] [-s]"
> >      echo "     $script -h"
> >      echo "where:"
> >      echo "     CONFIG_FILE - configuration file"
> > @@ -1289,13 +1395,14 @@ function print_help
> >      echo "     -f - enable generating a FIT image"
> >      echo "     PREPEND_PATH - path to be appended before file names to match deploy location within rootfs"
> >      echo "     -h - prints out the help message and exits "
> > +    echo "     -s - let U-Boot calculate binary images load addresses/sizes dynamically"
> >      echo "Defaults:"
> >      echo "     CONFIG_FILE=$cfg_file, UBOOT_TYPE=\"LOAD_CMD\" env var, DIRECTORY=$uboot_dir"
> >      echo "Example:"
> >      echo "     $script -c ../config -d ./build42 -t \"scsi load 1:1\""
> >  }
> >
> > -while getopts ":c:t:d:ho:k:u:fp:" opt; do
> > +while getopts ":c:t:d:ho:k:u:fp:s" opt; do
> >      case ${opt} in
> >      t )
> >          case $OPTARG in
> > @@ -1340,6 +1447,9 @@ while getopts ":c:t:d:ho:k:u:fp:" opt; do
> >      p )
> >          prepend_path="$OPTARG"
> >          ;;
> > +    s )
> > +        CALC=y
> > +        ;;
> >      h )
> >          print_help
> >          exit 0
> > @@ -1533,6 +1643,10 @@ uboot_addr=$memaddr  # 2MB are enough for a uboot script  memaddr=$(( $memaddr + $offset ))  memaddr=`printf "0x%X\n" $memaddr`
> > +if test "$CALC"
> > +then
> > +    echo "setenv memaddr $memaddr" >> $UBOOT_SOURCE fi
> >
> >  fill_reserved_spaces_from_dtb
> >
> > @@ -1583,7 +1697,11 @@ fi
> >
> >  if [ "$BOOT_CMD" != "none" ]
> >  then
> > -    echo "$BOOT_CMD $kernel_addr $([ "$BOOT_CMD" = "bootefi" ] || echo '-') $device_tree_addr" >> $UBOOT_SOURCE
> > +    if test "$CALC"; then
> > +        echo "$BOOT_CMD \${host_kernel_addr} $([ "$BOOT_CMD" = "bootefi" ] || echo '-') \${host_fdt_addr}" >> $UBOOT_SOURCE
> > +    else
> > +        echo "$BOOT_CMD $kernel_addr $([ "$BOOT_CMD" = "bootefi" ] || echo '-') $device_tree_addr" >> $UBOOT_SOURCE
> > +    fi
> >  else
> >      # skip boot command but store load addresses to be used later
> >      echo "setenv host_kernel_addr $kernel_addr" >> $UBOOT_SOURCE
> 
> With the above changes,
> 
> Reviewed-by: Andrei Cherechesu 

I'll send v8 with your R-b, please have a quick look that everything
checks out, thanks!
--8323329-1474602063-1745871144=:785180--


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Date: Mon, 28 Apr 2025 13:13:38 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: xen-devel@lists.xenproject.org
cc: sstabellini@kernel.org, andrei.cherechesu@nxp.com, dmukhin@ford.com, 
    michal.orzel@amd.com, jason.andryuk@amd.com, S32@nxp.com
Subject: [PATCH v8] uboot-script-gen: Dynamically compute addr and size when
 loading binaries
Message-ID: 
User-Agent: Alpine 2.22 (DEB 394 2020-01-19)
MIME-Version: 1.0
Content-Type: text/plain; charset=US-ASCII

From: Andrei Cherechesu 

Normally, the Imagebuilder would precompute the sizes of the loaded
binaries and addresses where they are loaded before generating the
script, and the sizes and addresses that needed to be provided to
Xen via /chosen would be hardcoded in the boot script.

Added an option via "-s" parameter to avoid hardcoding any
address in the boot script, and dynamically compute the
loading addresses for binaries. The first loading address is based
on the MEMORY_START parameter and after loading each binary,
the loading address and the size of the binary are stored in
variables with corresponding names. Then, the loading address
for the next binary is computed and aligned to 0x200000.

If the "-s" parameter is not used, the normal flow is executed,
where the loading addresses and sizes for each binaries are
precomputed and hardcoded inside the script, but the loading
addresses and sizes for each binary are now also stored for eventual
later use.

Reserved memory regions are left TBD in the -s case.

Link: https://lists.xenproject.org/archives/html/xen-devel/2022-09/msg01862.html
Signed-off-by: Andrei Cherechesu 
Signed-off-by: Stefano Stabellini 
Reviewed-by: Andrei Cherechesu 
Reviewed-by: Denis Mukhin 
---
Changes in v8:
- remove quotes in heredoc
- change memaddr to hex for readability

Changes in v7:
- use $()
- better description and alphabetical order
- use heredoc

Changes in v6:
- make initial ${memaddr} setting depending on CALC

This patch adds quite a bit of complexity which is the reason why I
didn't originally commit it. Now that we are enabling ImageBuilder in
Yocto, it turns out this patch is required because Yocto invokes
ImageBuilder before all the binaries are ready and available.

Andrei, sorry for taking so long to realize why it is essential, but we
are getting there now.

The changes I made to the original patch are purely to make it simpler
to maintain.
---
 README.md                |   2 +
 scripts/uboot-script-gen | 181 ++++++++++++++++++++++++++++++++-------
 2 files changed, 152 insertions(+), 31 deletions(-)

diff --git a/README.md b/README.md
index f8039ec..28c9e6b 100644
--- a/README.md
+++ b/README.md
@@ -356,6 +356,8 @@ Where:\
    can only be used  in combination with the -k option.  This adds the
    public key into the dtb.  Then one can add this dtb back into the
    u-boot bin or elf.\
+-s addresses and sizes are calculated dynamically from U-Boot, hence
+   binaries don't need to be available at the time of invocation.\
 
 ### Signed FIT images
 
diff --git a/scripts/uboot-script-gen b/scripts/uboot-script-gen
index 638154a..dfa154e 100755
--- a/scripts/uboot-script-gen
+++ b/scripts/uboot-script-gen
@@ -1,8 +1,11 @@
 #!/bin/bash
 
 offset=$((2*1024*1024))
+PADDING_MASK=$(printf "0x%X\n" $(($offset - 1)))
+PADDING_MASK_INV=$(printf "0x%X\n" $((~$PADDING_MASK)))
 filesize=0
 prog_req=(mkimage file fdtput mktemp awk od)
+CALC=""
 
 function cleanup_and_return_err()
 {
@@ -100,17 +103,40 @@ function dt_set()
     fi
 }
 
+function dt_set_calc()
+{
+    local path=$1
+    local var=$2
+    local name_var=$3
+ 
+    local addr_var="$name_var"_addr
+    local size_var="$name_var"_size
+
+    cat >> $UBOOT_SOURCE <<- EOF
+	setexpr addr_hi \${$addr_var} / 0x100000000
+	setexpr addr_lo \${$addr_var} \& 0xFFFFFFFF
+	setexpr size_hi \${$size_var} / 0x100000000
+	setexpr size_lo \${$size_var} \& 0xFFFFFFFF
+	fdt set $path $var <0x\${addr_hi} 0x\${addr_lo} 0x\${size_hi} 0x\${size_lo}>
+	EOF
+}
+
 function add_device_tree_kernel()
 {
     local path=$1
-    local addr=$2
-    local size=$3
-    local bootargs=$4
+    local name=$2
+    local addr=$3
+    local size=$4
+    local bootargs=$5
     local node_name="module@${addr#0x}"
 
     dt_mknode "$path" "$node_name"
     dt_set "$path/$node_name" "compatible" "str_a" "multiboot,kernel multiboot,module"
-    dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
+    if test "$CALC"; then
+        dt_set_calc "$path/$node_name" "reg" $name
+    else
+        dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
+    fi
     dt_set "$path/$node_name" "bootargs" "str" "$bootargs"
 }
 
@@ -118,26 +144,36 @@ function add_device_tree_kernel()
 function add_device_tree_ramdisk()
 {
     local path=$1
-    local addr=$2
-    local size=$3
+    local name=$2
+    local addr=$3
+    local size=$4
     local node_name="module@${addr#0x}"
 
     dt_mknode "$path"  "$node_name"
     dt_set "$path/$node_name" "compatible" "str_a" "multiboot,ramdisk multiboot,module"
-    dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
+    if test "$CALC"; then
+        dt_set_calc "$path/$node_name" "reg" $name
+    else
+        dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
+    fi
 }
 
 
 function add_device_tree_passthrough()
 {
     local path=$1
-    local addr=$2
-    local size=$3
+    local name=$2
+    local addr=$3
+    local size=$4
     local node_name="module@${addr#0x}"
 
     dt_mknode "$path"  "$node_name"
     dt_set "$path/$node_name" "compatible" "str_a" "multiboot,device-tree multiboot,module"
-    dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
+    if test "$CALC"; then
+        dt_set_calc "$path/$node_name" "reg" $name
+    else
+        dt_set "$path/$node_name" "reg" "hex"  "$(split_addr_size $addr $size)"
+    fi
 }
 
 function add_device_tree_mem()
@@ -358,7 +394,11 @@ function xen_device_tree_editing()
 
         dt_mknode "/chosen" "$node_name"
         dt_set "/chosen/$node_name" "compatible" "str_a" "xen,xsm-policy xen,multiboot-module multiboot,module"
-        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $xen_policy_addr $xen_policy_size)"
+        if test "$CALC"; then
+            dt_set_calc "/chosen/$node_name" "reg" "xen_policy"
+        else
+            dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $xen_policy_addr $xen_policy_size)"
+        fi
     fi
 
     if test "$DOM0_KERNEL"
@@ -367,7 +407,11 @@ function xen_device_tree_editing()
 
         dt_mknode "/chosen" "$node_name"
         dt_set "/chosen/$node_name" "compatible" "str_a" "xen,linux-zimage xen,multiboot-module multiboot,module"
-        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $dom0_kernel_addr $dom0_kernel_size)"
+        if test "$CALC"; then
+            dt_set_calc "/chosen/$node_name" "reg" "dom0_linux"
+        else
+            dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $dom0_kernel_addr $dom0_kernel_size)"
+        fi
         dt_set "/chosen" "xen,dom0-bootargs" "str" "$DOM0_CMD"
     fi
 
@@ -377,7 +421,11 @@ function xen_device_tree_editing()
 
         dt_mknode "/chosen" "$node_name"
         dt_set "/chosen/$node_name" "compatible" "str_a" "xen,linux-initrd xen,multiboot-module multiboot,module"
-        dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $ramdisk_addr $ramdisk_size)"
+        if test "$CALC"; then
+            dt_set_calc "/chosen/$node_name" "reg" "dom0_ramdisk"
+        else
+            dt_set "/chosen/$node_name" "reg" "hex" "$(split_addr_size $ramdisk_addr $ramdisk_size)"
+        fi
     fi
 
     i=0
@@ -464,14 +512,14 @@ function xen_device_tree_editing()
 
         xen_dt_domu_add_vcpu_nodes "/chosen/domU$i" $i ${DOMU_VCPUS[$i]}
 
-        add_device_tree_kernel "/chosen/domU$i" ${domU_kernel_addr[$i]} ${domU_kernel_size[$i]} "${DOMU_CMD[$i]}"
+        add_device_tree_kernel "/chosen/domU$i" "domU${i}_kernel" ${domU_kernel_addr[$i]} ${domU_kernel_size[$i]} "${DOMU_CMD[$i]}"
         if test "${domU_ramdisk_addr[$i]}"
         then
-            add_device_tree_ramdisk "/chosen/domU$i" ${domU_ramdisk_addr[$i]} ${domU_ramdisk_size[$i]}
+            add_device_tree_ramdisk "/chosen/domU$i" "domU${i}_ramdisk" ${domU_ramdisk_addr[$i]} ${domU_ramdisk_size[$i]}
         fi
         if test "${domU_passthrough_dtb_addr[$i]}"
         then
-            add_device_tree_passthrough "/chosen/domU$i" ${domU_passthrough_dtb_addr[$i]} ${domU_passthrough_dtb_size[$i]}
+            add_device_tree_passthrough "/chosen/domU$i" "domU${i}_fdt" ${domU_passthrough_dtb_addr[$i]} ${domU_passthrough_dtb_size[$i]}
         fi
         i=$(( $i + 1 ))
     done
@@ -504,7 +552,11 @@ function device_tree_editing()
 
     if test $UBOOT_SOURCE
     then
-        echo "fdt addr $device_tree_addr" >> $UBOOT_SOURCE
+        if test "$CALC"; then
+            echo "fdt addr \${host_fdt_addr}" >> $UBOOT_SOURCE
+        else
+            echo "fdt addr $device_tree_addr" >> $UBOOT_SOURCE
+        fi
         echo "fdt resize 1024" >> $UBOOT_SOURCE
 
         if test $NUM_DT_OVERLAY && test $NUM_DT_OVERLAY -gt 0
@@ -512,7 +564,11 @@ function device_tree_editing()
             i=0
             while test $i -lt $NUM_DT_OVERLAY
             do
-                echo "fdt apply ${dt_overlay_addr[$i]}" >> $UBOOT_SOURCE
+                if test "$CALC"; then
+                    echo "fdt apply \${host_fdto${i}_addr}" >> $UBOOT_SOURCE
+                else
+                    echo "fdt apply ${dt_overlay_addr[$i]}" >> $UBOOT_SOURCE
+                fi
                 i=$(( $i + 1 ))
             done
         fi
@@ -530,8 +586,12 @@ function fill_reserved_spaces_from_dtb()
 {
     if [ ! -f $DEVICE_TREE ]
     then
-        echo "File $DEVICE_TREE doesn't exist, exiting";
-        cleanup_and_return_err
+        if test "$CALC"; then
+            return
+        else
+            echo "File $DEVICE_TREE doesn't exist, exiting";
+            cleanup_and_return_err
+        fi
     fi
 
     # Check if reserved-memory node exists
@@ -613,7 +673,7 @@ function get_image_size()
     printf "%u" $effective_size
 }
 
-function add_size()
+function add_size_from_file()
 {
     local filename=$1
     local size=`stat -L --printf="%s" $filename`
@@ -645,6 +705,27 @@ function add_size()
     filesize=$size
 }
 
+function add_size_calculate()
+{
+    local fit_scr_name=$1
+
+    cat >> $UBOOT_SOURCE <<- EOF
+	setenv ${fit_scr_name}_addr \${memaddr}
+	setenv ${fit_scr_name}_size \${filesize}
+	setexpr memaddr \${memaddr} \+ \${filesize}
+	setexpr memaddr \${memaddr} \+ $PADDING_MASK
+	setexpr memaddr \${memaddr} \& $PADDING_MASK_INV
+	EOF
+
+    # TODO: missing ${RESERVED_MEM_SPACES[@]} check
+
+    # The following are updated to avoid collisions in node names, but
+    # they are not actively used.
+    memaddr=$((memaddr + offset))
+    memaddr=$(printf "0x%X\n" $memaddr)
+    filesize=$offset
+}
+
 function load_file()
 {
     local filename=$1
@@ -657,10 +738,16 @@ function load_file()
     if test "$FIT"
     then
         echo "imxtract \$fit_addr $fit_scr_name $memaddr" >> $UBOOT_SOURCE
+        add_size_from_file $filename
     else
-        echo "$LOAD_CMD $memaddr ${prepend_path:+$prepend_path/}$relative_path" >> $UBOOT_SOURCE
+        if test "$CALC"; then
+            echo "$LOAD_CMD \${memaddr} ${prepend_path:+$prepend_path/}$relative_path" >> $UBOOT_SOURCE
+            add_size_calculate $fit_scr_name
+        else
+            echo "$LOAD_CMD $memaddr ${prepend_path:+$prepend_path/}$relative_path" >> $UBOOT_SOURCE
+            add_size_from_file $filename
+        fi
     fi
-    add_size $filename
 }
 
 function check_file_type()
@@ -670,8 +757,13 @@ function check_file_type()
 
     if [ ! -f $filename ]
     then
-        echo "File $filename doesn't exist, exiting";
-        cleanup_and_return_err
+        if test "$CALC"
+        then
+            return
+        else
+            echo "File $filename doesn't exist, exiting";
+            cleanup_and_return_err
+        fi
     fi
 
     # if file doesn't know what it is, it outputs data, so include that
@@ -705,8 +797,13 @@ function check_compressed_file_type()
 
     if [ ! -f $filename ]
     then
-        echo "File $filename doesn't exist, exiting";
-        cleanup_and_return_err
+        if test "$CALC"
+        then
+            return
+        else
+            echo "File $filename doesn't exist, exiting";
+            cleanup_and_return_err
+        fi
     fi
 
     file_type=$( file -L $filename )
@@ -872,6 +969,12 @@ function linux_config()
 generate_uboot_images()
 {
     local arch=$(file -L $XEN | grep -E 'ARM64|Aarch64')
+    
+    if test "$CALC"
+    then
+        echo "bootm is not compatible with -s"
+        cleanup_and_return_err
+    fi
 
     if test "$arch"
     then
@@ -997,7 +1100,11 @@ bitstream_load_and_config()
         if test "$UBOOT_SOURCE"
         then
             # we assume the FPGA device is 0 here
-            echo "fpga load 0 $bitstream_addr $bitstream_size" >> "$UBOOT_SOURCE"
+            if test "$CALC"; then
+                echo "fpga load 0 \${fpga_bitstream_addr} \${fpga_bitstream_size}" >> "$UBOOT_SOURCE"
+            else
+                echo "fpga load 0 $bitstream_addr $bitstream_size" >> "$UBOOT_SOURCE"
+            fi
         fi
     fi
 }
@@ -1271,7 +1378,7 @@ function print_help
 {
     script=`basename "$0"`
     echo "usage:"
-    echo "	$script -c CONFIG_FILE -d DIRECTORY [-t LOAD_CMD] [-o FILE] [-k KEY_DIR/HINT [-u U-BOOT_DTB]] [-e] [-f] [-p PREPEND_PATH]"
+    echo "	$script -c CONFIG_FILE -d DIRECTORY [-t LOAD_CMD] [-o FILE] [-k KEY_DIR/HINT [-u U-BOOT_DTB]] [-e] [-f] [-p PREPEND_PATH] [-s]"
     echo "	$script -h"
     echo "where:"
     echo "	CONFIG_FILE - configuration file"
@@ -1289,13 +1396,14 @@ function print_help
     echo "	-f - enable generating a FIT image"
     echo "	PREPEND_PATH - path to be appended before file names to match deploy location within rootfs"
     echo "	-h - prints out the help message and exits "
+    echo "	-s - let U-Boot calculate binary images load addresses/sizes dynamically"
     echo "Defaults:"
     echo "	CONFIG_FILE=$cfg_file, UBOOT_TYPE=\"LOAD_CMD\" env var, DIRECTORY=$uboot_dir"
     echo "Example:"
     echo "	$script -c ../config -d ./build42 -t \"scsi load 1:1\""
 }
 
-while getopts ":c:t:d:ho:k:u:fp:" opt; do
+while getopts ":c:t:d:ho:k:u:fp:s" opt; do
     case ${opt} in
     t )
         case $OPTARG in
@@ -1340,6 +1448,9 @@ while getopts ":c:t:d:ho:k:u:fp:" opt; do
     p )
         prepend_path="$OPTARG"
         ;;
+    s )
+        CALC=y
+        ;;
     h )
         print_help
         exit 0
@@ -1533,6 +1644,10 @@ uboot_addr=$memaddr
 # 2MB are enough for a uboot script
 memaddr=$(( $memaddr + $offset ))
 memaddr=`printf "0x%X\n" $memaddr`
+if test "$CALC"
+then
+    echo "setenv memaddr $memaddr" >> $UBOOT_SOURCE
+fi
 
 fill_reserved_spaces_from_dtb
 
@@ -1583,7 +1698,11 @@ fi
 
 if [ "$BOOT_CMD" != "none" ]
 then
-    echo "$BOOT_CMD $kernel_addr $([ "$BOOT_CMD" = "bootefi" ] || echo '-') $device_tree_addr" >> $UBOOT_SOURCE
+    if test "$CALC"; then
+        echo "$BOOT_CMD \${host_kernel_addr} $([ "$BOOT_CMD" = "bootefi" ] || echo '-') \${host_fdt_addr}" >> $UBOOT_SOURCE
+    else
+        echo "$BOOT_CMD $kernel_addr $([ "$BOOT_CMD" = "bootefi" ] || echo '-') $device_tree_addr" >> $UBOOT_SOURCE
+    fi
 else
     # skip boot command but store load addresses to be used later
     echo "setenv host_kernel_addr $kernel_addr" >> $UBOOT_SOURCE
-- 
2.25.1



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Date: Mon, 28 Apr 2025 17:10:13 -0400
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Subject: Re: [PATCH v3] x86/hyperv: use dynamically allocated page for
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To: Ariadne Conill , 
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On 2025-04-28 15:57, Ariadne Conill wrote:
> Previously Xen placed the hypercall page at the highest possible MFN,
> but this caused problems on systems where there is more than 36 bits
> of physical address space.
> 
> In general, it also seems unreliable to assume that the highest possible
> MFN is not already reserved for some other purpose.
> 
> Fixes: 620fc734f854 ("x86/hyperv: setup hypercall page")
> Cc: Alejandro Vallejo 
> Cc: Alexander M. Merritt 
> Signed-off-by: Ariadne Conill 

Reviewed-by: Jason Andryuk 

Thanks,
Jason


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Date: Tue, 29 Apr 2025 00:10:09 +0300
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Subject: Re: [PATCH v8] uboot-script-gen: Dynamically compute addr and size
 when loading binaries
To: Stefano Stabellini ,
 Xen-devel 
References: 
 
Content-Language: en-US
Cc: Andrei Cherechesu , dmukhin@ford.com,
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Hi Stefano,

On 28/04/2025 23:55, Andrei Cherechesu wrote:
> From: Andrei Cherechesu 
>
> Normally, the Imagebuilder would precompute the sizes of the loaded
> binaries and addresses where they are loaded before generating the
> script, and the sizes and addresses that needed to be provided to
> Xen via /chosen would be hardcoded in the boot script.
>
> Added an option via "-s" parameter to avoid hardcoding any
> address in the boot script, and dynamically compute the
> loading addresses for binaries. The first loading address is based
> on the MEMORY_START parameter and after loading each binary,
> the loading address and the size of the binary are stored in
> variables with corresponding names. Then, the loading address
> for the next binary is computed and aligned to 0x200000.
>
> If the "-s" parameter is not used, the normal flow is executed,
> where the loading addresses and sizes for each binaries are
> precomputed and hardcoded inside the script, but the loading
> addresses and sizes for each binary are now also stored for eventual
> later use.
>
> Reserved memory regions are left TBD in the -s case.
>
> Link: https://lists.xenproject.org/archives/html/xen-devel/2022-09/msg01862.html
> Signed-off-by: Andrei Cherechesu 
> Signed-off-by: Stefano Stabellini 
> Reviewed-by: Andrei Cherechesu 
> Reviewed-by: Denis Mukhin 
> ---
> Changes in v8:
> - remove quotes in heredoc
> - change memaddr to hex for readability
>
> Changes in v7:
> - use $()
> - better description and alphabetical order
> - use heredoc
>
> Changes in v6:
> - make initial ${memaddr} setting depending on CALC
>
> This patch adds quite a bit of complexity which is the reason why I
> didn't originally commit it. Now that we are enabling ImageBuilder in
> Yocto, it turns out this patch is required because Yocto invokes
> ImageBuilder before all the binaries are ready and available.
>
> Andrei, sorry for taking so long to realize why it is essential, but we
> are getting there now.
>
> The changes I made to the original patch are purely to make it simpler
> to maintain.
> ---
>  README.md                |   2 +
>  scripts/uboot-script-gen | 181 ++++++++++++++++++++++++++++++++-------
>  2 files changed, 152 insertions(+), 31 deletions(-)

Everything looks good to me, briefly tested it locally as well.

Regards,
Andrei Cherechesu




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Subject: Re: [PATCH] x86emul: avoid UB shifts in FLDENV/FRSTOR handling
To: Jan Beulich , "xen-devel@lists.xenproject.org"
	
CC: Andrew Cooper ,
	=?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Fabian Specht
	
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On 2025-04-28 07:29, Jan Beulich wrote:
> 16-bit quantities, no matter whether expressed as uint16_t or as
> bitfield, will be promoted to plain int before doing any arithmetic on
> them. Shifting such values by 16 will therefore shift into the sign bit,
> which is UB if that bit becomes set. To account for all reads and all
> writes accessing opposite members of the same union, introduce yet more
> local variables to reduce the shift counts to 12.
> 
> Fixes: be55ed744ed8 ("x86emul: support FLDENV and FRSTOR")
> Reported-by: Fabian Specht
> Signed-off-by: Jan Beulich

Reviewed-by: Jason Andryuk 

Thanks,
Jason


From xen-devel-bounces@lists.xenproject.org Mon Apr 28 21:39:45 2025
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Date: Mon, 28 Apr 2025 14:38:46 -0700
From: "H. Peter Anvin" 
To: Linus Torvalds ,
        Ingo Molnar 
CC: Andrew Cooper , Arnd Bergmann ,
        Arnd Bergmann , Thomas Gleixner ,
        Ingo Molnar , Borislav Petkov ,
        Dave Hansen , x86@kernel.org,
        Juergen Gross ,
        Boris Ostrovsky ,
        Alexander Usyskin ,
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        =?UTF-8?Q?Mateusz_Jo=C5=84czyk?= ,
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On April 28, 2025 9:14:45 AM PDT, Linus Torvalds  wrote:
>On Mon, 28 Apr 2025 at 00:05, Ingo Molnar  wrote:
>>
>> And once we remove 486, I think we can do the optimization below to
>> just assume the output doesn't get clobbered by BS*L in the zero-case,
>> right?
>
>We probably can't, because who knows what "Pentium" CPU's are out there=
=2E
>
>Or even if Pentium really does get it right=2E I doubt we have any
>developers with an original Pentium around=2E
>
>So just leave the "we don't know what the CPU result is for zero"
>unless we get some kind of official confirmation=2E
>
>          Linus

If anyone knows for sure, it is probably Christian Ludloff=2E However, the=
re was a *huge* tightening of the formal ISA when the i686 was introduced (=
family=3D6) and I really believe this was part of it=2E

I also really don't trust that family=3D5 really means conforms to undocum=
ented P5 behavior, e=2Eg=2E for Quark=2E


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Date: Mon, 28 Apr 2025 15:19:03 -0700 (PDT)
From: Stefano Stabellini 
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To: Andrei Cherechesu 
cc: Stefano Stabellini , 
    Xen-devel , 
    Andrei Cherechesu , dmukhin@ford.com, 
    Michal Orzel , jason.andryuk@amd.com, 
    "S32@nxp.com" 
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On Tue, 29 Apr 2025, Andrei Cherechesu wrote:
> Everything looks good to me, briefly tested it locally as well.

Thank you! Committed.


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cc: xen-devel@lists.xenproject.org, 
    Federico Serafini , 
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    Anthony PERARD , 
    Michal Orzel , Jan Beulich , 
    Julien Grall , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
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Subject: Re: [PATCH v1 2/2] automation/eclair: add Rule 14.3 to the monitored
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On Fri, 25 Apr 2025, victorm.lira@amd.com wrote:
> From: Federico Serafini 
> 
> MISRA C Rule 14.3 is already tagged as clean: add it to the
> monitored set to avoid regressions.
> 
> Signed-off-by: Federico Serafini 
> Signed-off-by: Victor Lira 

Assuming the previous patch gets accepted:

Acked-by: Stefano Stabellini 

> ---
> Cc: Andrew Cooper 
> Cc: Anthony PERARD 
> Cc: Michal Orzel 
> Cc: Jan Beulich 
> Cc: Julien Grall 
> Cc: Roger Pau Monné 
> Cc: Stefano Stabellini 
> Cc: Nicola Vetrini 
> Cc: Federico Serafini 
> Cc: Bertrand Marquis 
> ---
> 
>  automation/eclair_analysis/ECLAIR/monitored.ecl | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/automation/eclair_analysis/ECLAIR/monitored.ecl b/automation/eclair_analysis/ECLAIR/monitored.ecl
> index 8351996ec8..ca2f5e3c7f 100644
> --- a/automation/eclair_analysis/ECLAIR/monitored.ecl
> +++ b/automation/eclair_analysis/ECLAIR/monitored.ecl
> @@ -53,6 +53,7 @@
>  -enable=MC3A2.R13.2
>  -enable=MC3A2.R13.6
>  -enable=MC3A2.R14.1
> +-enable=MC3A2.R14.3
>  -enable=MC3A2.R14.4
>  -enable=MC3A2.R16.2
>  -enable=MC3A2.R16.3
> --
> 2.47.0
> 
--8323329-92807636-1745880451=:785180--


From xen-devel-bounces@lists.xenproject.org Mon Apr 28 23:04:50 2025
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Date: Mon, 28 Apr 2025 16:04:34 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Victor Lira 
cc: xen-devel@lists.xenproject.org, 
    Federico Serafini , 
    Andrew Cooper , 
    Anthony PERARD , 
    Michal Orzel , Jan Beulich , 
    Julien Grall , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
    Stefano Stabellini , 
    Nicola Vetrini , 
    Bertrand Marquis 
Subject: Re: [PATCH v1 3/3] automation/eclair: tag Rule 19.1 as clean
In-Reply-To: <7316cbef75cdd0726990bcb8b37cd10f3be62185.1745624090.git.victorm.lira@amd.com>
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References:  <7316cbef75cdd0726990bcb8b37cd10f3be62185.1745624090.git.victorm.lira@amd.com>
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On Fri, 25 Apr 2025, victorm.lira@amd.com wrote:
> From: Federico Serafini 
> 
> Tag MISRA C Rule 19.1 as clean to avoid regressions.
> 
> Signed-off-by: Federico Serafini 
> Signed-off-by: Victor Lira 

Assuming the other patches get committed and the rule is clean

Acked-by: Stefano Stabellini 


> ---
> Cc: Andrew Cooper 
> Cc: Anthony PERARD 
> Cc: Michal Orzel 
> Cc: Jan Beulich 
> Cc: Julien Grall 
> Cc: Roger Pau Monné 
> Cc: Stefano Stabellini 
> Cc: Nicola Vetrini 
> Cc: Federico Serafini 
> Cc: Bertrand Marquis 
> ---
>  automation/eclair_analysis/ECLAIR/tagging.ecl | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/automation/eclair_analysis/ECLAIR/tagging.ecl b/automation/eclair_analysis/ECLAIR/tagging.ecl
> index 1d078d8905..dab3c51faa 100644
> --- a/automation/eclair_analysis/ECLAIR/tagging.ecl
> +++ b/automation/eclair_analysis/ECLAIR/tagging.ecl
> @@ -78,6 +78,7 @@ MC3A2.R17.5||
>  MC3A2.R17.6||
>  MC3A2.R18.6||
>  MC3A2.R18.8||
> +MC3A2.R19.1||
>  MC3A2.R20.2||
>  MC3A2.R20.3||
>  MC3A2.R20.4||
> --
> 2.47.0
> 
--8323329-482499094-1745881476=:785180--


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Date: Mon, 28 Apr 2025 16:21:14 -0700 (PDT)
From: Stefano Stabellini 
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To: Jan Beulich 
cc: victorm.lira@amd.com, Nicola Vetrini , 
    Andrew Cooper , 
    Anthony PERARD , 
    Michal Orzel , Julien Grall , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
    Stefano Stabellini , 
    Federico Serafini , 
    Bertrand Marquis , 
    xen-devel@lists.xenproject.org
Subject: Re: [PATCH v1 2/3] compat: address violations of MISRA C Rule 19.1
In-Reply-To: 
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On Mon, 28 Apr 2025, Jan Beulich wrote:
> On 26.04.2025 01:42, victorm.lira@amd.com wrote:
> > From: Nicola Vetrini 
> > 
> > Rule 19.1 states: "An object shall not be assigned or copied
> > to an overlapping object". Since the "call" and "compat_call" are
> > fields of the same union, reading from one member and writing to
> > the other violates the rule, while not causing Undefined Behavior
> > due to their relative sizes. However, a dummy variable is used to
> > address the violation and prevent the future possibility of
> > incurring in UB.
> 
> If there is such a concern, ...
> 
> > --- a/xen/common/compat/multicall.c
> > +++ b/xen/common/compat/multicall.c
> > @@ -15,8 +15,13 @@ typedef int ret_t;
> >  static inline void xlat_multicall_entry(struct mc_state *mcs)
> >  {
> >      int i;
> > +    xen_ulong_t arg;
> > +
> >      for (i=0; i<6; i++)
> > -        mcs->compat_call.args[i] = mcs->call.args[i];
> > +    {
> > +        arg = mcs->call.args[i];
> > +        mcs->compat_call.args[i] = arg;
> > +    }
> >  }
> 
> ... wouldn't it be of concern as well that the alternating parts of
> the union are still accessed in a flip-flop manner? IOW we continue to
> rely on the relative placement properties of the individual array
> elements. To eliminate such a concern, I think the resulting code would
> also want to be correct if iteration was swapped to work downwards.
> 
> Also the scope of the temporary could certainly be the loop body rather
> than the entire function.

Wouldn't be safer to do this then?

static inline void xlat_multicall_entry(struct mc_state *mcs)
{
    int i;
    xen_ulong_t args[6];

    for ( i = 0; i < 6; i++ )
    {
        args[i] = mcs->call.args[i];
    }
    for ( i = 0; i < 6; i++ )
    {
        mcs->compat_call.args[i] = args[i];
    }
}

If you have any specific suggestions I think C code would be easier to
understand than English.


> I also don't think it needs to be xen_ulong_t,
> but maybe using unsigned int instead wouldn't make a difference in
> generated code.

Keeping the same type as mcs->call.args[i] would seem more obviously
correct? Not to mention that unsigned long is what we defined as
register type? If we really want to avoid xen_ulong_t, then it should
be uintptr_t?

We should stick to one type to be used as register type. On ARM, we
defined register_t.


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To: Jan Beulich 
cc: victorm.lira@amd.com, Federico Serafini , 
    Andrew Cooper , 
    Anthony PERARD , 
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    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
    Stefano Stabellini , 
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    Bertrand Marquis , 
    xen-devel@lists.xenproject.org
Subject: Re: [PATCH v1 1/2] xen/page_alloc: address violation of Rule 14.3
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On Mon, 28 Apr 2025, Jan Beulich wrote:
> On 26.04.2025 02:00, victorm.lira@amd.com wrote:
> > From: Federico Serafini 
> > 
> > MISRA C Rule 14.3 states that "Controlling expressions shall not be
> > invariant".
> > 
> > Add a SAF comment to deviate the rule for build configurations without
> > CONFIG_LLC_COLORING enabled.
> 
> I was surprised by this supposedly being the only violation. And indeed it
> wasn't very hard to find more. For example, we have a number of
> "while ( num_online_cpus() > 1 && ... )", which become compile-time
> constant (false) when NR_CPUS=1.

Uhm, I did run a special scan for this and I can confirm no other
violations are detected.


> > --- a/xen/common/page_alloc.c
> > +++ b/xen/common/page_alloc.c
> > @@ -2038,6 +2038,7 @@ static struct page_info *alloc_color_heap_page(unsigned int memflags,
> > 
> >      spin_lock(&heap_lock);
> > 
> > +    /* SAF-14-safe MISRA C R14.3 condition always false without LLC_COLORING */
> >      for ( i = 0; i < domain_num_llc_colors(d); i++ )
> >      {
> >          unsigned long free = free_colored_pages[domain_llc_color(d, i)];
> 
> Hmm, this way the deviation applies even when LLC_COLORING=y.

Yes but in the LLC_COLORING=y case it is harmless. Do you have something
else in mind?


> As to the comment wording - looks like we're pretty inconsistent with that
> right now. I, for one, don't think the Misra rule needs (re)stating there;
> the SAF index points at all the data that's needed if one cares about the
> specifics of the deviation.

Do you prefer:

/* SAF-14-safe */

?


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Date: Mon, 28 Apr 2025 16:32:29 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: dmkhn@proton.me
cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, 
    anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, 
    michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, 
    dmukhin@ford.com
Subject: Re: [PATCH v2 2/3] xen/console: introduce console_puts()
In-Reply-To: <20250426185021.100646-3-dmukhin@ford.com>
Message-ID: 
References: <20250426185021.100646-1-dmukhin@ford.com> <20250426185021.100646-3-dmukhin@ford.com>
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On Sat, 26 Apr 2025, dmkhn@proton.me wrote:
> From: Denis Mukhin 
> 
> guest_console_write() duplicates the code from __putstr(), eliminate code
> duplication.
> 
> Introduce console_puts() for writing a buffer to console devices.
> 
> Also, introduce internal console flags to control which console devices
> should be used.
> 
> Signed-off-by: Denis Mukhin 

Reviewed-by: Stefano Stabellini 


> ---
> Changes v1->v2:
> - fixed locking in dump_console_ring_key()
> ---
>  xen/drivers/char/console.c | 117 ++++++++++++++++++++++---------------
>  1 file changed, 71 insertions(+), 46 deletions(-)
> 
> diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c
> index aaa97088aa..8f882a47d1 100644
> --- a/xen/drivers/char/console.c
> +++ b/xen/drivers/char/console.c
> @@ -41,6 +41,20 @@
>  #include 
>  #endif
>  
> +/* Internal console flags. */
> +enum {
> +    CONSOLE_SERIAL  = BIT(0, U),    /* Use serial device. */
> +    CONSOLE_PV      = BIT(1, U),    /* Use PV console. */
> +    CONSOLE_VIDEO   = BIT(2, U),    /* Use video device. */
> +    CONSOLE_DEBUG   = BIT(3, U),    /* Use debug device. */
> +    CONSOLE_RING    = BIT(4, U),    /* Use console ring. */
> +    CONSOLE_DEFAULT = CONSOLE_SERIAL | CONSOLE_PV | CONSOLE_VIDEO |
> +                      CONSOLE_DEBUG,
> +    CONSOLE_ALL     = CONSOLE_DEFAULT | CONSOLE_RING,
> +};
> +
> +static void console_puts(const char *str, size_t len, unsigned int flags);
> +
>  /* console: comma-separated list of console outputs. */
>  static char __initdata opt_console[30] = OPT_CONSOLE_STR;
>  string_param("console", opt_console);
> @@ -338,8 +352,6 @@ static bool console_locks_busted;
>  
>  static void conring_puts(const char *str, size_t len)
>  {
> -    ASSERT(rspin_is_locked(&console_lock));
> -
>      while ( len-- )
>          conring[CONRING_IDX_MASK(conringp++)] = *str++;
>  
> @@ -432,9 +444,6 @@ void console_serial_puts(const char *s, size_t nr)
>          serial_steal_fn(s, nr);
>      else
>          serial_puts(sercon_handle, s, nr);
> -
> -    /* Copy all serial output into PV console */
> -    pv_console_puts(s, nr);
>  }
>  
>  static void cf_check dump_console_ring_key(unsigned char key)
> @@ -442,6 +451,7 @@ static void cf_check dump_console_ring_key(unsigned char key)
>      uint32_t idx, len, sofar, c;
>      unsigned int order;
>      char *buf;
> +    unsigned long flags;
>  
>      printk("'%c' pressed -> dumping console ring buffer (dmesg)\n", key);
>  
> @@ -455,6 +465,8 @@ static void cf_check dump_console_ring_key(unsigned char key)
>          return;
>      }
>  
> +    flags = console_lock_recursive_irqsave();
> +
>      c = conringc;
>      sofar = 0;
>      while ( (c != conringp) )
> @@ -468,8 +480,9 @@ static void cf_check dump_console_ring_key(unsigned char key)
>          c += len;
>      }
>  
> -    console_serial_puts(buf, sofar);
> -    video_puts(buf, sofar);
> +    console_puts(buf, sofar, CONSOLE_SERIAL | CONSOLE_VIDEO | CONSOLE_PV);
> +
> +    console_unlock_recursive_irqrestore(flags);
>  
>      free_xenheap_pages(buf, order);
>  }
> @@ -618,11 +631,61 @@ static inline void xen_console_write_debug_port(const char *buf, size_t len)
>  }
>  #endif
>  
> +static inline void console_debug_puts(const char *str, size_t len)
> +{
> +#ifdef CONFIG_X86
> +    if ( opt_console_xen )
> +    {
> +        if ( xen_guest )
> +            xen_hypercall_console_write(str, len);
> +        else
> +            xen_console_write_debug_port(str, len);
> +    }
> +#endif
> +}
> +
> +/*
> + * Write buffer to all enabled console devices.
> + *
> + * That will handle all possible scenarios working w/ console
> + * - physical console (serial console, VGA console (x86 only));
> + * - PV console;
> + * - debug console (x86 only): debug I/O port or __HYPERVISOR_console_io
> + *   hypercall;
> + * - console ring.
> + */
> +static void console_puts(const char *str, size_t len, unsigned int flags)
> +{
> +    ASSERT(rspin_is_locked(&console_lock));
> +
> +    if ( flags & CONSOLE_SERIAL )
> +        console_serial_puts(str, len);
> +
> +    if ( flags & CONSOLE_PV )
> +        pv_console_puts(str, len);
> +
> +    if ( flags & CONSOLE_VIDEO )
> +        video_puts(str, len);
> +
> +    if ( flags & CONSOLE_DEBUG )
> +        console_debug_puts(str, len);
> +
> +    if ( flags & CONSOLE_RING )
> +        conring_puts(str, len);
> +}
> +
> +static inline void __putstr(const char *str)
> +{
> +    console_puts(str, strlen(str), CONSOLE_ALL);
> +}
> +
>  static long guest_console_write(XEN_GUEST_HANDLE_PARAM(char) buffer,
>                                  unsigned int count)
>  {
>      char kbuf[128];
>      unsigned int kcount = 0;
> +    unsigned int flags = opt_console_to_ring
> +                         ? CONSOLE_ALL : CONSOLE_DEFAULT;
>      struct domain *cd = current->domain;
>  
>      while ( count > 0 )
> @@ -640,23 +703,7 @@ static long guest_console_write(XEN_GUEST_HANDLE_PARAM(char) buffer,
>          {
>              /* Use direct console output as it could be interactive */
>              nrspin_lock_irq(&console_lock);
> -
> -            console_serial_puts(kbuf, kcount);
> -            video_puts(kbuf, kcount);
> -
> -#ifdef CONFIG_X86
> -            if ( opt_console_xen )
> -            {
> -                if ( xen_guest )
> -                    xen_hypercall_console_write(kbuf, kcount);
> -                else
> -                    xen_console_write_debug_port(kbuf, kcount);
> -            }
> -#endif
> -
> -            if ( opt_console_to_ring )
> -                conring_puts(kbuf, kcount);
> -
> +            console_puts(kbuf, kcount, flags);
>              nrspin_unlock_irq(&console_lock);
>          }
>          else
> @@ -757,28 +804,6 @@ long do_console_io(
>   * *****************************************************
>   */
>  
> -static void __putstr(const char *str)
> -{
> -    size_t len = strlen(str);
> -
> -    ASSERT(rspin_is_locked(&console_lock));
> -
> -    console_serial_puts(str, len);
> -    video_puts(str, len);
> -
> -#ifdef CONFIG_X86
> -    if ( opt_console_xen )
> -    {
> -        if ( xen_guest )
> -            xen_hypercall_console_write(str, len);
> -        else
> -            xen_console_write_debug_port(str, len);
> -    }
> -#endif
> -
> -    conring_puts(str, len);
> -}
> -
>  static int printk_prefix_check(char *p, char **pp)
>  {
>      int loglvl = -1;
> -- 
> 2.34.1
> 
> 


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Date: Mon, 28 Apr 2025 16:34:13 -0700 (PDT)
From: Stefano Stabellini 
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To: dmkhn@proton.me
cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, 
    anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, 
    michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, 
    dmukhin@ford.com
Subject: Re: [PATCH v2 3/3] xen/console: introduce conring_flush()
In-Reply-To: <20250426185021.100646-4-dmukhin@ford.com>
Message-ID: 
References: <20250426185021.100646-1-dmukhin@ford.com> <20250426185021.100646-4-dmukhin@ford.com>
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On Sat, 26 Apr 2025, dmkhn@proton.me wrote:
> From: Denis Mukhin 
> 
> Introduce conring_flush() to ensure all messages kept in the internal
> console ring are sent to all physical consoles (serial, VGA (x86))
> after their initialization is completed.
> 
> Resolves: https://gitlab.com/xen-project/xen/-/issues/184
> Signed-off-by: Denis Mukhin 

Reviewed-by: Stefano Stabellini 



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On 28/04/2025 10:38 pm, H. Peter Anvin wrote:
> On April 28, 2025 9:14:45 AM PDT, Linus Torvalds  wrote:
>> On Mon, 28 Apr 2025 at 00:05, Ingo Molnar  wrote:
>>> And once we remove 486, I think we can do the optimization below to
>>> just assume the output doesn't get clobbered by BS*L in the zero-case,
>>> right?
>> We probably can't, because who knows what "Pentium" CPU's are out there.
>>
>> Or even if Pentium really does get it right. I doubt we have any
>> developers with an original Pentium around.
>>
>> So just leave the "we don't know what the CPU result is for zero"
>> unless we get some kind of official confirmation.
>>
>>          Linus
> If anyone knows for sure, it is probably Christian Ludloff. However, there was a *huge* tightening of the formal ISA when the i686 was introduced (family=6) and I really believe this was part of it.
>
> I also really don't trust that family=5 really means conforms to undocumented P5 behavior, e.g. for Quark.

https://www.sandpile.org/x86/flags.htm

That's a lot of "can't even characterise the result" in the P5.

Looking at P4 column, that is clearly what the latest SDM has
retroactively declared to be architectural.

~Andrew


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Date: Mon, 28 Apr 2025 18:27:29 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Jan Beulich 
cc: victorm.lira@amd.com, Nicola Vetrini , 
    Federico Serafini , 
    Andrew Cooper , 
    Anthony PERARD , 
    Michal Orzel , Julien Grall , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
    Stefano Stabellini , 
    Bertrand Marquis , 
    xen-devel@lists.xenproject.org
Subject: Re: [PATCH v1 1/3] x86: x86_emulate: address violations of MISRA C
 Rule 19.1
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On Mon, 28 Apr 2025, Jan Beulich wrote:
> On 26.04.2025 01:42, victorm.lira@amd.com wrote:
> > From: Nicola Vetrini 
> > 
> > Rule 19.1 states: "An object shall not be assigned or copied
> > to an overlapping object". Since the "call" and "compat_call" are
> 
> Was this taken from patch 2 without editing?
> 
> > --- a/xen/arch/x86/x86_emulate/x86_emulate.c
> > +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
> > @@ -526,9 +526,19 @@ static inline void put_loop_count(
> >           */                                                             \
> >          if ( !amd_like(ctxt) && mode_64bit() && ad_bytes == 4 )         \
> >          {                                                               \
> > +            uint64_t tmp;                                               \
> > +                                                                        \
> >              _regs.r(cx) = 0;                                            \
> > -            if ( extend_si ) _regs.r(si) = _regs.esi;                   \
> > -            if ( extend_di ) _regs.r(di) = _regs.edi;                   \
> > +            if ( extend_si )                                            \
> > +            {                                                           \
> > +                tmp = _regs.esi;                                        \
> > +                _regs.r(si) = tmp;                                      \
> > +            }                                                           \
> > +            if ( extend_di )                                            \
> > +            {                                                           \
> > +                tmp = _regs.edi;                                        \
> > +                _regs.r(di) = tmp;                                      \
> > +            }                                                           \
> 
> See commit 7225f13aef03 for how we chose to address similar issues elsewhere
> in the emulator. I think we want to be consistent there. This will then also
> eliminate ...
> 
> > @@ -2029,7 +2039,12 @@ x86_emulate(
> >          switch ( op_bytes )
> >          {
> >          case 2: _regs.ax = (int8_t)_regs.ax; break; /* cbw */
> > -        case 4: _regs.r(ax) = (uint32_t)(int16_t)_regs.ax; break; /* cwde */
> > +        case 4:
> > +            {
> > +                uint32_t tmp = (uint32_t)(int16_t)_regs.ax;
> > +                _regs.r(ax) = tmp;
> > +                break; /* cwde */
> > +            }
> 
> ... the odd brace placement here, as well as the inconsistency in the types
> you used for the temporary variables (both really could have been unsigned
> int; no need for a fixed-width type).

Is this what you have in mind?


diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c
index 8e14ebb35b..394c96e1f2 100644
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -527,8 +527,8 @@ static inline void put_loop_count(
         if ( !amd_like(ctxt) && mode_64bit() && ad_bytes == 4 )         \
         {                                                               \
             _regs.r(cx) = 0;                                            \
-            if ( extend_si ) _regs.r(si) = _regs.esi;                   \
-            if ( extend_di ) _regs.r(di) = _regs.edi;                   \
+            if ( extend_si ) _regs.r(si) = (uint64_t)_regs.esi;         \
+            if ( extend_di ) _regs.r(di) = (uint64_t)_regs.edi;         \
         }                                                               \
         goto complete_insn;                                             \
     }                                                                   \
@@ -2029,7 +2029,7 @@ x86_emulate(
         switch ( op_bytes )
         {
         case 2: _regs.ax = (int8_t)_regs.ax; break; /* cbw */
-        case 4: _regs.r(ax) = (uint32_t)(int16_t)_regs.ax; break; /* cwde */
+        case 4: _regs.r(ax) = (int16_t)_regs.ax; break; /* cwde */
         case 8: _regs.r(ax) = (int32_t)_regs.r(ax); break; /* cdqe */
         }
         break;

Unfortunately it doesn't work. The first hunk (put_loop_count) seems to
be the problem. Neither uint32_t nor unsigned long work, so I am
probably heading in the wrong direction. Any idea what did I do wrong?



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Date: Mon, 28 Apr 2025 19:00:12 -0700
From: "H. Peter Anvin" 
To: Andrew Cooper ,
        Linus Torvalds ,
        Ingo Molnar 
CC: Arnd Bergmann , Arnd Bergmann ,
        Thomas Gleixner , Ingo Molnar ,
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On April 28, 2025 5:12:13 PM PDT, Andrew Cooper  wrote:
>On 28/04/2025 10:38 pm, H=2E Peter Anvin wrote:
>> On April 28, 2025 9:14:45 AM PDT, Linus Torvalds  wrote:
>>> On Mon, 28 Apr 2025 at 00:05, Ingo Molnar  wrote:
>>>> And once we remove 486, I think we can do the optimization below to
>>>> just assume the output doesn't get clobbered by BS*L in the zero-case=
,
>>>> right?
>>> We probably can't, because who knows what "Pentium" CPU's are out ther=
e=2E
>>>
>>> Or even if Pentium really does get it right=2E I doubt we have any
>>> developers with an original Pentium around=2E
>>>
>>> So just leave the "we don't know what the CPU result is for zero"
>>> unless we get some kind of official confirmation=2E
>>>
>>>          Linus
>> If anyone knows for sure, it is probably Christian Ludloff=2E However, =
there was a *huge* tightening of the formal ISA when the i686 was introduce=
d (family=3D6) and I really believe this was part of it=2E
>>
>> I also really don't trust that family=3D5 really means conforms to undo=
cumented P5 behavior, e=2Eg=2E for Quark=2E
>
>https://www=2Esandpile=2Eorg/x86/flags=2Ehtm
>
>That's a lot of "can't even characterise the result" in the P5=2E
>
>Looking at P4 column, that is clearly what the latest SDM has
>retroactively declared to be architectural=2E
>
>~Andrew

Yes, but it wasn't about flags here=2E=20

Now, question: can we just use __builtin_*() for these? I think gcc should=
 always generate inline code for these on x86=2E


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Subject: Re: [PATCH] bitops/32: Convert variable_ffs() and fls() zero-case
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To: "H. Peter Anvin" ,
 Linus Torvalds ,
 Ingo Molnar 
Cc: Arnd Bergmann , Arnd Bergmann ,
 Thomas Gleixner , Ingo Molnar ,
 Borislav Petkov , Dave Hansen ,
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 <67be5eee-b67b-409a-8309-829f891b9944@citrix.com>
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On 29/04/2025 3:00 am, H. Peter Anvin wrote:
> On April 28, 2025 5:12:13 PM PDT, Andrew Cooper  wrote:
>> On 28/04/2025 10:38 pm, H. Peter Anvin wrote:
>>> On April 28, 2025 9:14:45 AM PDT, Linus Torvalds  wrote:
>>>> On Mon, 28 Apr 2025 at 00:05, Ingo Molnar  wrote:
>>>>> And once we remove 486, I think we can do the optimization below to
>>>>> just assume the output doesn't get clobbered by BS*L in the zero-case,
>>>>> right?
>>>> We probably can't, because who knows what "Pentium" CPU's are out there.
>>>>
>>>> Or even if Pentium really does get it right. I doubt we have any
>>>> developers with an original Pentium around.
>>>>
>>>> So just leave the "we don't know what the CPU result is for zero"
>>>> unless we get some kind of official confirmation.
>>>>
>>>>          Linus
>>> If anyone knows for sure, it is probably Christian Ludloff. However, there was a *huge* tightening of the formal ISA when the i686 was introduced (family=6) and I really believe this was part of it.
>>>
>>> I also really don't trust that family=5 really means conforms to undocumented P5 behavior, e.g. for Quark.
>> https://www.sandpile.org/x86/flags.htm
>>
>> That's a lot of "can't even characterise the result" in the P5.
>>
>> Looking at P4 column, that is clearly what the latest SDM has
>> retroactively declared to be architectural.
>>
>> ~Andrew
> Yes, but it wasn't about flags here. 
>
> Now, question: can we just use __builtin_*() for these? I think gcc should always generate inline code for these on x86.

Yes it does generate inline code.  https://godbolt.org/z/M45oo5rqT

GCC does it branchlessly, but cannot optimise based on context.

Clang can optimise based on context, except the 0 case it seems.

Moving to -march=i686 causes both GCC and Clang to switch to CMOV and
create branchless code, but is still GCC still can't optimise out the
CMOV based on context.

~Andrew


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From: Linus Torvalds 
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To: "H. Peter Anvin" 
Cc: Andrew Cooper , Ingo Molnar , 
	Arnd Bergmann , Arnd Bergmann , Thomas Gleixner , 
	Ingo Molnar , Borislav Petkov , 
	Dave Hansen , x86@kernel.org, 
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On Mon, 28 Apr 2025 at 19:00, H. Peter Anvin  wrote:
>
> Now, question: can we just use __builtin_*() for these? I think gcc should always generate inline code for these on x86.

Yeah, I think we can just use __builtin_ffs() directly and get rid of
all the games.

Not all gcc builtins are great: I did a bugzilla about gcc ctzl some time ago:

    https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106471

but for ffs() that does sound like it's the simplest thing to do.

               Linus


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Date: Mon, 28 Apr 2025 20:13:52 -0700
From: "H. Peter Anvin" 
To: Andrew Cooper ,
        Linus Torvalds ,
        Ingo Molnar 
CC: Arnd Bergmann , Arnd Bergmann ,
        Thomas Gleixner , Ingo Molnar ,
        Borislav Petkov ,
        Dave Hansen , x86@kernel.org,
        Juergen Gross ,
        Boris Ostrovsky ,
        Alexander Usyskin ,
        Greg Kroah-Hartman ,
        =?UTF-8?Q?Mateusz_Jo=C5=84czyk?= ,
        Mike Rapoport , Ard Biesheuvel ,
        Peter Zijlstra , linux-kernel@vger.kernel.org,
        xen-devel@lists.xenproject.org
Subject: =?US-ASCII?Q?Re=3A_=5BPATCH=5D_bitops/32=3A_Convert_variable?=
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On April 28, 2025 7:25:17 PM PDT, Andrew Cooper  wrote:
>On 29/04/2025 3:00 am, H=2E Peter Anvin wrote:
>> On April 28, 2025 5:12:13 PM PDT, Andrew Cooper  wrote:
>>> On 28/04/2025 10:38 pm, H=2E Peter Anvin wrote:
>>>> On April 28, 2025 9:14:45 AM PDT, Linus Torvalds  wrote:
>>>>> On Mon, 28 Apr 2025 at 00:05, Ingo Molnar  wrote=
:
>>>>>> And once we remove 486, I think we can do the optimization below to
>>>>>> just assume the output doesn't get clobbered by BS*L in the zero-ca=
se,
>>>>>> right?
>>>>> We probably can't, because who knows what "Pentium" CPU's are out th=
ere=2E
>>>>>
>>>>> Or even if Pentium really does get it right=2E I doubt we have any
>>>>> developers with an original Pentium around=2E
>>>>>
>>>>> So just leave the "we don't know what the CPU result is for zero"
>>>>> unless we get some kind of official confirmation=2E
>>>>>
>>>>>          Linus
>>>> If anyone knows for sure, it is probably Christian Ludloff=2E However=
, there was a *huge* tightening of the formal ISA when the i686 was introdu=
ced (family=3D6) and I really believe this was part of it=2E
>>>>
>>>> I also really don't trust that family=3D5 really means conforms to un=
documented P5 behavior, e=2Eg=2E for Quark=2E
>>> https://www=2Esandpile=2Eorg/x86/flags=2Ehtm
>>>
>>> That's a lot of "can't even characterise the result" in the P5=2E
>>>
>>> Looking at P4 column, that is clearly what the latest SDM has
>>> retroactively declared to be architectural=2E
>>>
>>> ~Andrew
>> Yes, but it wasn't about flags here=2E=20
>>
>> Now, question: can we just use __builtin_*() for these? I think gcc sho=
uld always generate inline code for these on x86=2E
>
>Yes it does generate inline code=2E=C2=A0 https://godbolt=2Eorg/z/M45oo5r=
qT
>
>GCC does it branchlessly, but cannot optimise based on context=2E
>
>Clang can optimise based on context, except the 0 case it seems=2E
>
>Moving to -march=3Di686 causes both GCC and Clang to switch to CMOV and
>create branchless code, but is still GCC still can't optimise out the
>CMOV based on context=2E
>
>~Andrew

Maybe a gcc bug report would be better than trying to hack around this in =
the kernel?


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Subject: Re: [PATCH v1 1/2] xen/page_alloc: address violation of Rule 14.3
To: Stefano Stabellini 
Cc: victorm.lira@amd.com, Federico Serafini ,
 Andrew Cooper ,
 Anthony PERARD ,
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From: Jan Beulich 
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On 29.04.2025 01:21, Stefano Stabellini wrote:
> On Mon, 28 Apr 2025, Jan Beulich wrote:
>> On 26.04.2025 02:00, victorm.lira@amd.com wrote:
>>> From: Federico Serafini 
>>>
>>> MISRA C Rule 14.3 states that "Controlling expressions shall not be
>>> invariant".
>>>
>>> Add a SAF comment to deviate the rule for build configurations without
>>> CONFIG_LLC_COLORING enabled.
>>
>> I was surprised by this supposedly being the only violation. And indeed it
>> wasn't very hard to find more. For example, we have a number of
>> "while ( num_online_cpus() > 1 && ... )", which become compile-time
>> constant (false) when NR_CPUS=1.
> 
> Uhm, I did run a special scan for this and I can confirm no other
> violations are detected.

Because of it being only one single configuration that's being scanned. I did
point out before that this is a problem for anyone wanting to certify the
hypervisor in a (perhaps just slightly) different configuration.

>>> --- a/xen/common/page_alloc.c
>>> +++ b/xen/common/page_alloc.c
>>> @@ -2038,6 +2038,7 @@ static struct page_info *alloc_color_heap_page(unsigned int memflags,
>>>
>>>      spin_lock(&heap_lock);
>>>
>>> +    /* SAF-14-safe MISRA C R14.3 condition always false without LLC_COLORING */
>>>      for ( i = 0; i < domain_num_llc_colors(d); i++ )
>>>      {
>>>          unsigned long free = free_colored_pages[domain_llc_color(d, i)];
>>
>> Hmm, this way the deviation applies even when LLC_COLORING=y.
> 
> Yes but in the LLC_COLORING=y case it is harmless. Do you have something
> else in mind?

What if, perhaps by mistake, domain_num_llc_colors() becomes constant 0 in
yet another configuration? (I don't expect this would work, but in principle
the comment ought to be inside an #ifdef.)

>> As to the comment wording - looks like we're pretty inconsistent with that
>> right now. I, for one, don't think the Misra rule needs (re)stating there;
>> the SAF index points at all the data that's needed if one cares about the
>> specifics of the deviation.
> 
> Do you prefer:
> 
> /* SAF-14-safe */

That's too short. All I'm asking for is to drop the (imprecise) rule
reference. Noticing only now: It being imprecise may make the comment go
stale if we move to a newer Misra spec, as the rule number may be different
then.

Jan


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Subject: Re: [PATCH] xen/x86: allow Dom0 PVH to call XENMEM_exchange
To: Stefano Stabellini 
Cc: xen-devel@lists.xenproject.org, Andrew Cooper
 , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
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On 28.04.2025 22:02, Stefano Stabellini wrote:
> On Mon, 28 Apr 2025, Teddy Astie wrote:
>> Hello Stefano,
>>
>> Le 25/04/2025 à 22:21, Stefano Stabellini a écrit :
>>> From: Xenia Ragiadakou 
>>>
>>> Dom0 PVH might need XENMEM_exchange when passing contiguous memory
>>> addresses to firmware or co-processors not behind an IOMMU.
>>>
>>> XENMEM_exchange was blocked for HVM/PVH DomUs, and accidentally it
>>> impacted Dom0 PVH as well.
>>>
>>> Permit Dom0 PVH to call XENMEM_exchange while leaving it blocked for
>>> HVM/PVH DomUs.
>>>
>>
>> In addition to Jan's remarks, I think it wants some additional
>> clarifications on the hypercall interface. public/memory.h indicates
>> "only PV guests can use this operation", so the interface is actually
>> unspecified about HVM guests (e.g what are MFN/GMFN in this case ?).
> 
> That is a new addition from c08a11ab98c.

Later addition or not, I agree with Teddy that it wants amending.

Jan

> If you see fae7d5be8bb, there
> is a statement that "we permitted this operation".



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From: Chen Linxuan via B4 Relay 
Date: Tue, 29 Apr 2025 12:06:06 +0800
Subject: [PATCH RFC v3 2/8] mm: add __always_inline for
 page_contains_unaccepted
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To: Keith Busch , Jens Axboe , 
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 Andrew Morton , 
 Yishai Hadas , Jason Gunthorpe , 
 Shameer Kolothum , 
 Kevin Tian , 
 Alex Williamson , 
 Peter Huewe , Jarkko Sakkinen , 
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Cc: linux-nvme@lists.infradead.org, linux-kernel@vger.kernel.org, 
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From: Winston Wen 

On x86_64 with gcc version 13.3.0, I compile mm/page_alloc.c with:

  make defconfig
  make KCFLAGS="-fno-inline-small-functions -fno-inline-functions-called-once" \
    mm/page_alloc.o

Then I get a compile error:

    CALL    scripts/checksyscalls.sh
    DESCEND objtool
    INSTALL libsubcmd_headers
    CC      mm/page_alloc.o
  In file included from :
  mm/page_alloc.c: In function '__free_unaccepted.isra':
  ././include/linux/compiler_types.h:557:45: error: call to '__compiletime_assert_1013' declared with attribute error: BUILD_BUG failed
    557 |         _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
        |                                             ^
  ././include/linux/compiler_types.h:538:25: note: in definition of macro '__compiletime_assert'
    538 |                         prefix ## suffix();                             \
        |                         ^~~~~~
  ././include/linux/compiler_types.h:557:9: note: in expansion of macro '_compiletime_assert'
    557 |         _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
        |         ^~~~~~~~~~~~~~~~~~~
  ./include/linux/build_bug.h:39:37: note: in expansion of macro 'compiletime_assert'
     39 | #define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
        |                                     ^~~~~~~~~~~~~~~~~~
  ./include/linux/build_bug.h:59:21: note: in expansion of macro 'BUILD_BUG_ON_MSG'
     59 | #define BUILD_BUG() BUILD_BUG_ON_MSG(1, "BUILD_BUG failed")
        |                     ^~~~~~~~~~~~~~~~
  mm/page_alloc.c:7301:9: note: in expansion of macro 'BUILD_BUG'
   7301 |         BUILD_BUG();
        |         ^~~~~~~~~

Marking page_contains_unaccepted with __always_inline and let dead code
elimination remove reference to __free_unaccepted() here.

Co-developed-by: Chen Linxuan 
Signed-off-by: Chen Linxuan 
Signed-off-by: Winston Wen 
---
 mm/page_alloc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/mm/page_alloc.c b/mm/page_alloc.c
index 5669baf2a6fea75c17b2be426443a6cf29051f52..433dc1936114469a323c8f3659730747965b2c3d 100644
--- a/mm/page_alloc.c
+++ b/mm/page_alloc.c
@@ -7346,7 +7346,7 @@ static bool __free_unaccepted(struct page *page)
 
 #else
 
-static bool page_contains_unaccepted(struct page *page, unsigned int order)
+static __always_inline bool page_contains_unaccepted(struct page *page, unsigned int order)
 {
 	return false;
 }

-- 
2.43.0




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Subject: [PATCH RFC v3 8/8] lib/Kconfig.debug: introduce
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 Nick Desaulniers , 
 Bill Wendling , Justin Stitt , 
 Vlastimil Babka , Suren Baghdasaryan , 
 Michal Hocko , Brendan Jackman , 
 Johannes Weiner , Zi Yan , 
 Mathieu Desnoyers , 
 Peter Zijlstra , 
 "Paul E. McKenney" , Boqun Feng , 
 Dmitry Vyukov , Andrey Konovalov , 
 Juergen Gross , 
 Boris Ostrovsky , 
 Thomas Gleixner , Ingo Molnar , 
 Borislav Petkov , Dave Hansen , 
 x86@kernel.org, "H. Peter Anvin" 
Cc: linux-nvme@lists.infradead.org, linux-kernel@vger.kernel.org, 
 linux-mm@kvack.org, kvm@vger.kernel.org, virtualization@lists.linux.dev, 
 linux-integrity@vger.kernel.org, linux-kbuild@vger.kernel.org, 
 llvm@lists.linux.dev, Winston Wen , 
 kasan-dev@googlegroups.com, xen-devel@lists.xenproject.org, 
 Chen Linxuan , 
 Changbin Du 
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From: Chen Linxuan 

Add a new kernel hacking option CONFIG_NO_AUTO_INLINE that prevents the
compiler from auto-inlining functions not explicitly marked with the
'inline' keyword.

This enhancement improves function tracer capabilities as it can only
trace functions that haven't been inlined by the compiler.

Previous discussions:

Link: https://lore.kernel.org/all/20181028130945.23581-3-changbin.du@gmail.com/

This patch is modified from commit 917fad29febd ("kernel hacking: add a
config option to disable compiler auto-inlining") which can be founded
in linux-next-history:

Link: https://web.git.kernel.org/pub/scm/linux/kernel/git/next/linux-next-history.git/commit/?id=917fad29febd

Cc: Changbin Du 
Co-developed-by: Winston Wen 
Signed-off-by: Winston Wen 
Signed-off-by: Chen Linxuan 
---
 Makefile          | 16 ++++++++++++++++
 lib/Kconfig.debug | 21 +++++++++++++++++++++
 lib/Makefile      |  3 +++
 3 files changed, 40 insertions(+)

diff --git a/Makefile b/Makefile
index 5aa9ee52a765b7aed27f44028cdcc34a90979acb..60dec6c123543150a3332a9a819fa6933e94db4f 100644
--- a/Makefile
+++ b/Makefile
@@ -1073,6 +1073,22 @@ endif
 # Ensure compilers do not transform certain loops into calls to wcslen()
 KBUILD_CFLAGS += -fno-builtin-wcslen
 
+ifdef CONFIG_NO_AUTO_INLINE
+# -fno-inline-functions behaves differently between gcc and clang.
+# With gcc, it prevents auto-inlining of functions but still considers functions
+# explicitly marked with "inline" for inlining. However, with clang, the flag
+# prevents inlining of all functions, including those explicitly marked with
+# inline. Clang provides the "-finline-hint-functions" option, which
+# specifically allows inlining of functions marked with "inline".
+#
+# In summary, to achieve equivalent behavior across compilers:
+# -fno-inline-functions (gcc) = -fno-inline-functions + -finline-hint-functions (clang)
+KBUILD_CFLAGS   += -fno-inline-functions \
+		   $(call cc-option, -finline-hint-functions) \
+		   $(call cc-option, -fno-inline-small-functions) \
+		   $(call cc-option, -fno-inline-functions-called-once)
+endif
+
 # change __FILE__ to the relative path to the source directory
 ifdef building_out_of_srctree
 KBUILD_CPPFLAGS += $(call cc-option,-ffile-prefix-map=$(srcroot)/=)
diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug
index f9051ab610d54358b21d61c141b737bb345b4cee..56530f0145c885e9846dae1d2f8c6125c610d25b 100644
--- a/lib/Kconfig.debug
+++ b/lib/Kconfig.debug
@@ -436,8 +436,29 @@ config GDB_SCRIPTS
 	  instance. See Documentation/process/debugging/gdb-kernel-debugging.rst
 	  for further details.
 
+
 endif # DEBUG_INFO
 
+config NO_AUTO_INLINE
+	bool "Disable compiler auto-inline optimizations (EXPERIMENTAL)"
+	default n
+	help
+	  This will prevent the compiler from optimizing the kernel by
+	  auto-inlining functions not marked with the inline keyword.
+	  With this option, only functions explicitly marked with
+	  "inline" will be inlined. This will allow the function tracer
+	  to trace more functions because it only traces functions that
+	  the compiler has not inlined.
+
+	  Note that Clang with -O2 optimization does not fully support
+	  disabling all inline-related optimizations,
+	  as Clang does not support options like
+	  -fno-inline-small-functions and -fno-inline-functions-called-once
+	  that gcc does.
+	  Some functions without the inline keyword may still be inlined.
+
+	  If unsure, select N.
+
 config FRAME_WARN
 	int "Warn for stack frames larger than"
 	range 0 8192
diff --git a/lib/Makefile b/lib/Makefile
index f07b24ce1b3f8db28796e461db1324d97133fdd5..2ac97f0856a12f66e6c3825af6aabafa61869262 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -87,6 +87,9 @@ obj-$(CONFIG_TEST_BITMAP) += test_bitmap.o
 ifeq ($(CONFIG_CC_IS_CLANG)$(CONFIG_KASAN),yy)
 # FIXME: Clang breaks test_bitmap_const_eval when KASAN and GCOV are enabled
 GCOV_PROFILE_test_bitmap.o := n
+# FIXME:
+# Clang breaks test_bitmap_const_eval when NO_AUTO_INLINE and KASAN are enabled
+CFLAGS_test_bitmap.o += -finline-functions
 endif
 
 obj-$(CONFIG_TEST_UUID) += test_uuid.o

-- 
2.43.0




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From: Chen Linxuan via B4 Relay 
Date: Tue, 29 Apr 2025 12:06:08 +0800
Subject: [PATCH RFC v3 4/8] tpm: add __always_inline for
 tpm_is_hwrng_enabled
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To: Keith Busch , Jens Axboe , 
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 Andrew Morton , 
 Yishai Hadas , Jason Gunthorpe , 
 Shameer Kolothum , 
 Kevin Tian , 
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 Peter Huewe , Jarkko Sakkinen , 
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 Nick Desaulniers , 
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 Vlastimil Babka , Suren Baghdasaryan , 
 Michal Hocko , Brendan Jackman , 
 Johannes Weiner , Zi Yan , 
 Mathieu Desnoyers , 
 Peter Zijlstra , 
 "Paul E. McKenney" , Boqun Feng , 
 Dmitry Vyukov , Andrey Konovalov , 
 Juergen Gross , 
 Boris Ostrovsky , 
 Thomas Gleixner , Ingo Molnar , 
 Borislav Petkov , Dave Hansen , 
 x86@kernel.org, "H. Peter Anvin" 
Cc: linux-nvme@lists.infradead.org, linux-kernel@vger.kernel.org, 
 linux-mm@kvack.org, kvm@vger.kernel.org, virtualization@lists.linux.dev, 
 linux-integrity@vger.kernel.org, linux-kbuild@vger.kernel.org, 
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 Changbin Du 
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From: Winston Wen 

Presume that kernel is compiled for x86_64 with gcc version 13.3.0:

  make defconfig
  ./scripts/kconfig/merge_config.sh .config <(
    echo CONFIG_TCG_TPM=y
    echo CONFIG_HW_RANDOM=m
  )
  make KCFLAGS="-fno-inline-small-functions -fno-inline-functions-called-once"

This results a link error:

  ld: vmlinux.o: in function `tpm_add_hwrng':
  tpm-chip.c:(.text+0x6c5924): undefined reference to `hwrng_register'
  ld: vmlinux.o: in function `tpm_chip_unregister':
  (.text+0x6c5bc9): undefined reference to `hwrng_unregister'
  ld: vmlinux.o: in function `tpm_chip_register':
  (.text+0x6c5c9b): undefined reference to `hwrng_unregister'

With `CONFIG_TCG_TPM=y` and `CONFIG_HW_RANDOM=m`,
the functions `tpm_add_hwrng`, `tpm_chip_unregister`, and
`tpm_chip_register` are compiled into `vmlinux.o`
and reference the symbols `hwrng_register` and `hwrng_unregister`.
These symbols, however, are compiled into `rng-core.ko`, which results
in the linking error.

I am not sure but I think this weird linking error only arises when
auto inlining is disabled because of some dead code elimination.

`CONFIG_TCG_TPM=y` and `CONFIG_HW_RANDOM=m` set `CONFIG_HW_RANDOM_TPM=n`.
This causes the function `tpm_is_hwrng_enabled` to always return
`false`, as shown below:

  static bool tpm_is_hwrng_enabled(struct tpm_chip *chip)
  {
      if (!IS_ENABLED(CONFIG_HW_RANDOM_TPM))
          return false;
      if (tpm_is_firmware_upgrade(chip))
          return false;
      if (chip->flags & TPM_CHIP_FLAG_HWRNG_DISABLED)
          return false;
      return true;
  }

When `tpm_is_hwrng_enabled` is inlined, dead code elimination
optimizations are applied and the reference to the `hwrng_*` functions
will been removed.
For instance, in the `tpm_chip_unregister` function:

  void tpm_chip_unregister(struct tpm_chip *chip)
  {
  #ifdef CONFIG_TCG_TPM2_HMAC
      int rc;

      rc = tpm_try_get_ops(chip);
      if (!rc) {
          tpm2_end_auth_session(chip);
          tpm_put_ops(chip);
      }
  #endif

      tpm_del_legacy_sysfs(chip);
      if (tpm_is_hwrng_enabled(chip))
          hwrng_unregister(&chip->hwrng);
      tpm_bios_log_teardown(chip);
      if (chip->flags & TPM_CHIP_FLAG_TPM2 && !tpm_is_firmware_upgrade(chip))
          tpm_devs_remove(chip);
      tpm_del_char_device(chip);
  }

When `tpm_is_hwrng_enabled` is inlined and always returns `false`,
the call to `hwrng_unregister` is effectively part of a `if (false)`
block, which I guess that will be then optimized out.

However, when the `-fno-inline-small-functions` and
`-fno-inline-functions-called-once` flags are used,
tpm_is_hwrng_enabled is not inline.

And this optimization some how cannot occur,
leading to the undefined reference errors during linking.

Adding the `__always_inline` attribute ensures that
`tpm_is_hwrng_enabled` is inlined regardless of the compiler flags.
This allows the dead code elimination to proceed as expected,
resolving the linking issue.

Co-developed-by: Chen Linxuan 
Signed-off-by: Chen Linxuan 
Signed-off-by: Winston Wen 
Reviewed-by: Jarkko Sakkinen 
---
 drivers/char/tpm/tpm-chip.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/char/tpm/tpm-chip.c b/drivers/char/tpm/tpm-chip.c
index e25daf2396d37bcaeae8a96267764df0861ad1be..48cc74d84247e258a39f2118e03aa10d0cbb066a 100644
--- a/drivers/char/tpm/tpm-chip.c
+++ b/drivers/char/tpm/tpm-chip.c
@@ -534,7 +534,7 @@ static int tpm_hwrng_read(struct hwrng *rng, void *data, size_t max, bool wait)
 	return tpm_get_random(chip, data, max);
 }
 
-static bool tpm_is_hwrng_enabled(struct tpm_chip *chip)
+static __always_inline bool tpm_is_hwrng_enabled(struct tpm_chip *chip)
 {
 	if (!IS_ENABLED(CONFIG_HW_RANDOM_TPM))
 		return false;

-- 
2.43.0




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Subject: [PATCH RFC v3 5/8] rseq: add __always_inline for
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To: Keith Busch , Jens Axboe , 
 Christoph Hellwig , Sagi Grimberg , 
 Andrew Morton , 
 Yishai Hadas , Jason Gunthorpe , 
 Shameer Kolothum , 
 Kevin Tian , 
 Alex Williamson , 
 Peter Huewe , Jarkko Sakkinen , 
 Masahiro Yamada , 
 Nathan Chancellor , 
 Nicolas Schier , 
 Nick Desaulniers , 
 Bill Wendling , Justin Stitt , 
 Vlastimil Babka , Suren Baghdasaryan , 
 Michal Hocko , Brendan Jackman , 
 Johannes Weiner , Zi Yan , 
 Mathieu Desnoyers , 
 Peter Zijlstra , 
 "Paul E. McKenney" , Boqun Feng , 
 Dmitry Vyukov , Andrey Konovalov , 
 Juergen Gross , 
 Boris Ostrovsky , 
 Thomas Gleixner , Ingo Molnar , 
 Borislav Petkov , Dave Hansen , 
 x86@kernel.org, "H. Peter Anvin" 
Cc: linux-nvme@lists.infradead.org, linux-kernel@vger.kernel.org, 
 linux-mm@kvack.org, kvm@vger.kernel.org, virtualization@lists.linux.dev, 
 linux-integrity@vger.kernel.org, linux-kbuild@vger.kernel.org, 
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From: Chen Linxuan 

Presume that kernel is compiled for x86_64 with gcc version 13.3.0:

  make allmodconfig
  make KCFLAGS="-fno-inline-small-functions -fno-inline-functions-called-once"

This results some objtool warnings:

  vmlinux.o: warning: objtool: rseq_update_cpu_node_id+0x14c: call to rseq_kernel_fields() with UACCESS enabled
  vmlinux.o: warning: objtool: rseq_reset_rseq_cpu_node_id+0xef: call to rseq_kernel_fields() with UACCESS enabled

Signed-off-by: Chen Linxuan 
---
 kernel/rseq.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/kernel/rseq.c b/kernel/rseq.c
index b7a1ec327e8117b47e353cab92d62111dd261520..7a4b6c211359714087a753047581bc8ff0c6c76b 100644
--- a/kernel/rseq.c
+++ b/kernel/rseq.c
@@ -27,7 +27,7 @@
 				  RSEQ_CS_FLAG_NO_RESTART_ON_MIGRATE)
 
 #ifdef CONFIG_DEBUG_RSEQ
-static struct rseq *rseq_kernel_fields(struct task_struct *t)
+static __always_inline struct rseq *rseq_kernel_fields(struct task_struct *t)
 {
 	return (struct rseq *) t->rseq_fields;
 }

-- 
2.43.0




From xen-devel-bounces@lists.xenproject.org Tue Apr 29 06:33:37 2025
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From: Chen Linxuan via B4 Relay 
Date: Tue, 29 Apr 2025 12:06:05 +0800
Subject: [PATCH RFC v3 1/8] nvme: add __always_inline for
 nvme_pci_npages_prp
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To: Keith Busch , Jens Axboe , 
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 Andrew Morton , 
 Yishai Hadas , Jason Gunthorpe , 
 Shameer Kolothum , 
 Kevin Tian , 
 Alex Williamson , 
 Peter Huewe , Jarkko Sakkinen , 
 Masahiro Yamada , 
 Nathan Chancellor , 
 Nicolas Schier , 
 Nick Desaulniers , 
 Bill Wendling , Justin Stitt , 
 Vlastimil Babka , Suren Baghdasaryan , 
 Michal Hocko , Brendan Jackman , 
 Johannes Weiner , Zi Yan , 
 Mathieu Desnoyers , 
 Peter Zijlstra , 
 "Paul E. McKenney" , Boqun Feng , 
 Dmitry Vyukov , Andrey Konovalov , 
 Juergen Gross , 
 Boris Ostrovsky , 
 Thomas Gleixner , Ingo Molnar , 
 Borislav Petkov , Dave Hansen , 
 x86@kernel.org, "H. Peter Anvin" 
Cc: linux-nvme@lists.infradead.org, linux-kernel@vger.kernel.org, 
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From: Winston Wen 

On x86_64 with gcc version 13.3.0, I build drivers/nvme/host/pci.c
with:

  make defconfig
  ./scripts/kconfig/merge_config.sh .config <(
    echo CONFIG_BLK_DEV_NVME=m
  )
  make KCFLAGS="-fno-inline-small-functions -fno-inline-functions-called-once" \
    drivers/nvme/host/pci.o

Then I get a compile error:

    CALL    scripts/checksyscalls.sh
    DESCEND objtool
    INSTALL libsubcmd_headers
    CC      drivers/nvme/host/pci.o
  In file included from :
  drivers/nvme/host/pci.c: In function 'nvme_init':
  ././include/linux/compiler_types.h:557:45: error: call to '__compiletime_assert_878' declared with attribute error: BUILD_BUG_ON failed: nvme_pci_npages_prp() > NVME_MAX_NR_ALLOCATIONS
    557 |         _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
        |                                             ^
  ././include/linux/compiler_types.h:538:25: note: in definition of macro '__compiletime_assert'
    538 |                         prefix ## suffix();                             \
        |                         ^~~~~~
  ././include/linux/compiler_types.h:557:9: note: in expansion of macro '_compiletime_assert'
    557 |         _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
        |         ^~~~~~~~~~~~~~~~~~~
  ./include/linux/build_bug.h:39:37: note: in expansion of macro 'compiletime_assert'
     39 | #define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
        |                                     ^~~~~~~~~~~~~~~~~~
  ./include/linux/build_bug.h:50:9: note: in expansion of macro 'BUILD_BUG_ON_MSG'
     50 |         BUILD_BUG_ON_MSG(condition, "BUILD_BUG_ON failed: " #condition)
        |         ^~~~~~~~~~~~~~~~
  drivers/nvme/host/pci.c:3804:9: note: in expansion of macro 'BUILD_BUG_ON'
   3804 |         BUILD_BUG_ON(nvme_pci_npages_prp() > NVME_MAX_NR_ALLOCATIONS);
        |         ^~~~~~~~~~~~

Mark nvme_pci_npages_prp() with __always_inline make it can be computed
at compile time.

Co-developed-by: Chen Linxuan 
Signed-off-by: Chen Linxuan 
Signed-off-by: Winston Wen 
---
 drivers/nvme/host/pci.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
index b178d52eac1b7f7286e217226b9b3686d07b7b6c..9ab070a9f0372bc6595c29a884ee9f2ffe5ae8e9 100644
--- a/drivers/nvme/host/pci.c
+++ b/drivers/nvme/host/pci.c
@@ -390,7 +390,7 @@ static bool nvme_dbbuf_update_and_check_event(u16 value, __le32 *dbbuf_db,
  * as it only leads to a small amount of wasted memory for the lifetime of
  * the I/O.
  */
-static int nvme_pci_npages_prp(void)
+static __always_inline int nvme_pci_npages_prp(void)
 {
 	unsigned max_bytes = (NVME_MAX_KB_SZ * 1024) + NVME_CTRL_PAGE_SIZE;
 	unsigned nprps = DIV_ROUND_UP(max_bytes, NVME_CTRL_PAGE_SIZE);

-- 
2.43.0




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From: Chen Linxuan via B4 Relay 
Date: Tue, 29 Apr 2025 12:06:11 +0800
Subject: [PATCH RFC v3 7/8] x86/xen: add __init for xen_pgd_walk
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To: Keith Busch , Jens Axboe , 
 Christoph Hellwig , Sagi Grimberg , 
 Andrew Morton , 
 Yishai Hadas , Jason Gunthorpe , 
 Shameer Kolothum , 
 Kevin Tian , 
 Alex Williamson , 
 Peter Huewe , Jarkko Sakkinen , 
 Masahiro Yamada , 
 Nathan Chancellor , 
 Nicolas Schier , 
 Nick Desaulniers , 
 Bill Wendling , Justin Stitt , 
 Vlastimil Babka , Suren Baghdasaryan , 
 Michal Hocko , Brendan Jackman , 
 Johannes Weiner , Zi Yan , 
 Mathieu Desnoyers , 
 Peter Zijlstra , 
 "Paul E. McKenney" , Boqun Feng , 
 Dmitry Vyukov , Andrey Konovalov , 
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 Boris Ostrovsky , 
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From: Chen Linxuan 

Presume that kernel is compiled for x86_64 with gcc version 13.3.0:

  make allmodconfig
  make KCFLAGS="-fno-inline-small-functions -fno-inline-functions-called-once"

This results a modpost warning:

  WARNING: modpost: vmlinux: section mismatch in reference: xen_pgd_walk+0x42 (section: .text) -> xen_mark_pinned (section: .init.text)

As xen_pgd_walk is only referenced in xen_after_bootmem(void) which is
also in .init.text, I add __init for xen_pgd_walk to fix this issue.

Signed-off-by: Chen Linxuan 
---
 arch/x86/xen/mmu_pv.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/xen/mmu_pv.c b/arch/x86/xen/mmu_pv.c
index 38971c6dcd4b78b6b14f51bc69c4bf6b70ebd622..53650888be0a7b1dba170a5b7ba9c654244b5125 100644
--- a/arch/x86/xen/mmu_pv.c
+++ b/arch/x86/xen/mmu_pv.c
@@ -696,7 +696,7 @@ static void __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd,
 	(*func)(mm, virt_to_page(pgd), PT_PGD);
 }
 
-static void xen_pgd_walk(struct mm_struct *mm,
+static void __init xen_pgd_walk(struct mm_struct *mm,
 			 void (*func)(struct mm_struct *mm, struct page *,
 				      enum pt_level),
 			 unsigned long limit)

-- 
2.43.0




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From: Chen Linxuan via B4 Relay 
Date: Tue, 29 Apr 2025 12:06:10 +0800
Subject: [PATCH RFC v3 6/8] kcov: add __always_inline for canonicalize_ip
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From: Chen Linxuan 

Presume that kernel is compiled for x86_64 with gcc version 13.3.0:

  make allmodconfig
  make KCFLAGS="-fno-inline-small-functions -fno-inline-functions-called-once"

This results a objtool warning:

  vmlinux.o: warning: objtool: __sanitizer_cov_trace_pc+0xc: call to canonicalize_ip() with UACCESS enabled

Signed-off-by: Chen Linxuan 
---
 kernel/kcov.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/kernel/kcov.c b/kernel/kcov.c
index 187ba1b80bda169d2f7efead5c6076b8829522ca..a2e2d3c655406b5a1f53e4855c782727b0541935 100644
--- a/kernel/kcov.c
+++ b/kernel/kcov.c
@@ -194,7 +194,7 @@ static notrace bool check_kcov_mode(enum kcov_mode needed_mode, struct task_stru
 	return mode == needed_mode;
 }
 
-static notrace unsigned long canonicalize_ip(unsigned long ip)
+static __always_inline notrace unsigned long canonicalize_ip(unsigned long ip)
 {
 #ifdef CONFIG_RANDOMIZE_BASE
 	ip -= kaslr_offset();

-- 
2.43.0




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From: Chen Linxuan via B4 Relay 
Date: Tue, 29 Apr 2025 12:06:07 +0800
Subject: [PATCH RFC v3 3/8] vfio/virtio: add __always_inline for
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 Yishai Hadas , Jason Gunthorpe , 
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 Kevin Tian , 
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 Peter Huewe , Jarkko Sakkinen , 
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 Vlastimil Babka , Suren Baghdasaryan , 
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 Johannes Weiner , Zi Yan , 
 Mathieu Desnoyers , 
 Peter Zijlstra , 
 "Paul E. McKenney" , Boqun Feng , 
 Dmitry Vyukov , Andrey Konovalov , 
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 Boris Ostrovsky , 
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From: Winston Wen 

Presume that kernel is compiled for x86_64 with gcc version 13.3.0:

  make defconfig
  ./scripts/kconfig/merge_config.sh .config <(
    echo CONFIG_VFIO=m
    echo CONFIG_VIRTIO_PCI=y
    echo CONFIG_VIRTIO_PCI_LIB_LEGACY=y
    echo CONFIG_VIRTIO_VFIO_PCI=m
    echo CONFIG_VIRTIO_VFIO_PCI_ADMIN_LEGACY=y
  )
  make KCFLAGS="-fno-inline-small-functions -fno-inline-functions-called-once" \
    drivers/vfio/pci/virtio/legacy_io.o

This results a compile error:

    CALL    scripts/checksyscalls.sh
    DESCEND objtool
    INSTALL libsubcmd_headers
    CC      drivers/vfio/pci/virtio/legacy_io.o
  In file included from :
  drivers/vfio/pci/virtio/legacy_io.c: In function 'virtiovf_init_legacy_io':
  ././include/linux/compiler_types.h:557:45: error: call to '__compiletime_assert_889' declared with attribute error: BUILD_BUG_ON failed: !is_power_of_2(virtvdev->bar0_virtual_buf_size)
    557 |         _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
        |                                             ^
  ././include/linux/compiler_types.h:538:25: note: in definition of macro '__compiletime_assert'
    538 |                         prefix ## suffix();                             \
        |                         ^~~~~~
  ././include/linux/compiler_types.h:557:9: note: in expansion of macro '_compiletime_assert'
    557 |         _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
        |         ^~~~~~~~~~~~~~~~~~~
  ./include/linux/build_bug.h:39:37: note: in expansion of macro 'compiletime_assert'
     39 | #define BUILD_BUG_ON_MSG(cond, msg) compiletime_assert(!(cond), msg)
        |                                     ^~~~~~~~~~~~~~~~~~
  ./include/linux/build_bug.h:50:9: note: in expansion of macro 'BUILD_BUG_ON_MSG'
     50 |         BUILD_BUG_ON_MSG(condition, "BUILD_BUG_ON failed: " #condition)
        |         ^~~~~~~~~~~~~~~~
  drivers/vfio/pci/virtio/legacy_io.c:401:9: note: in expansion of macro 'BUILD_BUG_ON'
    401 |         BUILD_BUG_ON(!is_power_of_2(virtvdev->bar0_virtual_buf_size));
        |         ^~~~~~~~~~~~

BUILD_BUG_ON needs virtvdev->bar0_virtual_buf_size to be computed at
compile time. So we should mark virtiovf_get_device_config_size() with
__always_inline here.

Co-developed-by: Chen Linxuan 
Signed-off-by: Chen Linxuan 
Signed-off-by: Winston Wen 
---
 drivers/vfio/pci/virtio/legacy_io.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/vfio/pci/virtio/legacy_io.c b/drivers/vfio/pci/virtio/legacy_io.c
index 832af5ba267c49a079009cfe0fa93c15ba7a490f..b6871d50b9f9e278ef3c49a9cb2baf474b8271c6 100644
--- a/drivers/vfio/pci/virtio/legacy_io.c
+++ b/drivers/vfio/pci/virtio/legacy_io.c
@@ -350,7 +350,7 @@ int virtiovf_open_legacy_io(struct virtiovf_pci_core_device *virtvdev)
 	return virtiovf_set_notify_addr(virtvdev);
 }
 
-static int virtiovf_get_device_config_size(unsigned short device)
+static __always_inline int virtiovf_get_device_config_size(unsigned short device)
 {
 	/* Network card */
 	return offsetofend(struct virtio_net_config, status);

-- 
2.43.0




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From: Chen Linxuan via B4 Relay 
Subject: [PATCH RFC v3 0/8] kernel-hacking: introduce CONFIG_NO_AUTO_INLINE
Date: Tue, 29 Apr 2025 12:06:04 +0800
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To: Keith Busch , Jens Axboe , 
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 Andrew Morton , 
 Yishai Hadas , Jason Gunthorpe , 
 Shameer Kolothum , 
 Kevin Tian , 
 Alex Williamson , 
 Peter Huewe , Jarkko Sakkinen , 
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 Nicolas Schier , 
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Cc: linux-nvme@lists.infradead.org, linux-kernel@vger.kernel.org, 
 linux-mm@kvack.org, kvm@vger.kernel.org, virtualization@lists.linux.dev, 
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 Changbin Du 
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This series introduces a new kernel configuration option NO_AUTO_INLINE,
which can be used to disable the automatic inlining of functions.

This will allow the function tracer to trace more functions
because it only traces functions that the compiler has not inlined.

Previous discussions can be found at

Link: https://lore.kernel.org/all/20181028130945.23581-3-changbin.du@gmail.com/

This patch depends on

  [PATCH] drm/i915/pxp: fix undefined reference to
          `intel_pxp_gsccs_is_ready_for_sessions'

which can be found at

  https://lore.kernel.org/all/20250415090616.2649889-1-jani.nikula@intel.com/

as well as

  [RFC PATCH 5/7] RDMA/hns: initialize db in update_srq_db()

which can be found at

  https://lore.kernel.org/all/FF922C77946229B6+20250411105459.90782-5-chenlinxuan@uniontech.com/

Signed-off-by: Chen Linxuan 
---
Changes in v3:
- Fix some modpost and objtool warnings
- Try support clang as Bart Van Assche suggested.
- Remove architecture depends as Bart Van Assche suggested.
- Link to v2: https://lore.kernel.org/r/20250416-noautoinline-v2-0-e69a2717530f@uniontech.com

Changes in v2:
- Resend via b4 to correct Message-ID and recipients.
- Update commit message following suggestions from Jarkko Sakkinen 
- Link to v1: https://lore.kernel.org/r/31F42D8141CDD2D0+20250411105142.89296-1-chenlinxuan@uniontech.com

---
Chen Linxuan (4):
      rseq: add __always_inline for rseq_kernel_fields
      kcov: add __always_inline for canonicalize_ip
      x86/xen: add __init for xen_pgd_walk
      lib/Kconfig.debug: introduce CONFIG_NO_AUTO_INLINE

Winston Wen (4):
      nvme: add __always_inline for nvme_pci_npages_prp
      mm: add __always_inline for page_contains_unaccepted
      vfio/virtio: add __always_inline for virtiovf_get_device_config_size
      tpm: add __always_inline for tpm_is_hwrng_enabled

 Makefile                            | 16 ++++++++++++++++
 arch/x86/xen/mmu_pv.c               |  2 +-
 drivers/char/tpm/tpm-chip.c         |  2 +-
 drivers/nvme/host/pci.c             |  2 +-
 drivers/vfio/pci/virtio/legacy_io.c |  2 +-
 kernel/kcov.c                       |  2 +-
 kernel/rseq.c                       |  2 +-
 lib/Kconfig.debug                   | 21 +++++++++++++++++++++
 lib/Makefile                        |  3 +++
 mm/page_alloc.c                     |  2 +-
 10 files changed, 47 insertions(+), 7 deletions(-)
---
base-commit: ca91b9500108d4cf083a635c2e11c884d5dd20ea
change-id: 20250416-noautoinline-8e9b9e535452

Best regards,
-- 
Chen Linxuan 




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Subject: Re: [PATCH] xen/x86: allow Dom0 PVH to call XENMEM_exchange
To: Stefano Stabellini 
Cc: "Ragiadakou, Xenia" ,
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On 28.04.2025 22:00, Stefano Stabellini wrote:
> On Mon, 28 Apr 2025, Jan Beulich wrote:
>> On 25.04.2025 22:19, Stefano Stabellini wrote:
>>> From: Xenia Ragiadakou 
>>>
>>> Dom0 PVH might need XENMEM_exchange when passing contiguous memory
>>> addresses to firmware or co-processors not behind an IOMMU.
>>
>> I definitely don't understand the firmware part: It's subject to the
>> same transparent P2M translations as the rest of the VM; it's just
>> another piece of software running there.
>>
>> "Co-processors not behind an IOMMU" is also interesting; a more
>> concrete scenario might be nice, yet I realize you may be limited in
>> what you're allowed to say.
> 
> Sure. On AMD x86 platforms there is a co-processor called PSP running
> TEE firmware. The PSP is not behind an IOMMU. Dom0 needs occasionally to
> pass addresses to it.  See drivers/tee/amdtee/ and
> include/linux/psp-tee.h in Linux.
> 
> This is not a new problem. On ARM we have been dealing with this kind of
> issues for more than a decade and it is the reason why originally the
> decision was to run Dom0 1:1 mapped on ARM. I am not suggesting to map
> Dom0 PVH 1:1; I am only providing context and highlighting that we
> have been lucky on x86 :-)
> 
> 
>>> XENMEM_exchange was blocked for HVM/PVH DomUs, and accidentally it
>>> impacted Dom0 PVH as well.
>>
>> This wasn't accidental at all, I don't think.
> 
> You as the original author of the patch (fae7d5be8bb) in question would
> surely know better. But the way the commit message was written was
> pointing toward a Dom0/DeviceModel problem:
> 
> "The operation's success can't be controlled by the guest, as the device
> model may have an active mapping of the page."

It's the problem mentioned at the bottom: MFNs (in principle) are entirely
meaningless to HVM and PVH domains. With, as you point out there, an
apparently important exception.

>>> --- a/xen/arch/x86/mm.c
>>> +++ b/xen/arch/x86/mm.c
>>> @@ -4401,7 +4401,7 @@ int steal_page(
>>>      const struct domain *owner;
>>>      int rc;
>>>  
>>> -    if ( paging_mode_external(d) )
>>> +    if ( paging_mode_external(d) && !is_hardware_domain(d) )
>>>          return -EOPNOTSUPP;
>>>  
>>>      /* Grab a reference to make sure the page doesn't change under our feet */
>>
>> Is this (in particular the code following below here) a safe thing to do
>> when we don't properly refcount page references from the P2M, yet? It's
>> Dom0, yes, but even there I might see potential security implications (as
>> top violating privacy of a guest).
> 
> I don't think I am following, could you please elaborate more? The
> change I am proposing is to allow Dom0 to share its own pages to the
> co-processor. DomUs are not in the picture. I would be happy to add
> further restriction to that effect. Is there something else you have in
> mind?

Once "shared" with the PSP, how would Xen know that this sharing has stopped?
Without knowing, how could it safely give the same page to a DomU later on?
("Safely" in both directions: Without compromising privacy of the DomU and
without compromising host safety / security.)

>> Furthermore cleanup_page_mappings() (called later in the function) has a
>> PV-only aspect which would apparently need widening to PVH Dom0 then,
>> too.
> 
> You are referring to:
> 
>         if ( d && unlikely(need_iommu_pt_sync(d)) && is_pv_domain(d) )
>             rc = iommu_legacy_unmap(d, _dfn(mfn), 1u << PAGE_ORDER_4K);
> 
> is that correct?

Yes, that's what immediately caught my eye. I didn't look carefully whether
there might be more.

>>> --- a/xen/common/memory.c
>>> +++ b/xen/common/memory.c
>>> @@ -794,7 +794,7 @@ static long memory_exchange(XEN_GUEST_HANDLE_PARAM(xen_memory_exchange_t) arg)
>>>              rc = guest_physmap_add_page(d, _gfn(gpfn), mfn,
>>>                                          exch.out.extent_order) ?: rc;
>>>  
>>> -            if ( !paging_mode_translate(d) &&
>>> +            if ( (!paging_mode_translate(d) || is_hardware_domain(d)) &&
>>>                   __copy_mfn_to_guest_offset(exch.out.extent_start,
>>>                                              (i << out_chunk_order) + j,
>>>                                              mfn) )
>>
>> Wait, no: A PVH domain (Dom0 or not) can't very well make use of MFNs, can
>> it?
> 
> One way or another Dom0 PVH needs to know the MFN to pass it to the
> co-processor.

I see. That's pretty odd, though. I'm then further concerned of the order of
the chunks. At present we're rather lax, in permitting PVH and PV Dom0 the
same upper bound. With both CPU and I/O side translation there is, in
principle, no reason to permit any kind of contiguity. Of course there's a
performance aspect, but that hardly matters in the specific case here. Yet at
the same time, once we expose MFNs, contiguity will start mattering as soon
as any piece of memory needs to be larger than PAGE_SIZE. Which means it will
make tightening of the presently lax handling prone to regressions in this
new behavior you're introducing. What chunk size does the PSP driver require?

One further thought here: Is it really the hardware domain which is most
logical to drive the PSP? Interaction is (just guessing) perhaps needed
primarily when creating / managing guests? Then having the control domain
talk to a driver in the hardware domain would make the overall picture more
complicated.

Jan


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Date: Tue, 29 Apr 2025 08:48:28 +0200
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v1 1/3] x86: x86_emulate: address violations of MISRA C
 Rule 19.1
To: Stefano Stabellini 
Cc: victorm.lira@amd.com, Nicola Vetrini ,
 Federico Serafini ,
 Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Bertrand Marquis , xen-devel@lists.xenproject.org
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Content-Language: en-US
From: Jan Beulich 
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On 29.04.2025 03:27, Stefano Stabellini wrote:
> On Mon, 28 Apr 2025, Jan Beulich wrote:
>> On 26.04.2025 01:42, victorm.lira@amd.com wrote:
>>> From: Nicola Vetrini 
>>>
>>> Rule 19.1 states: "An object shall not be assigned or copied
>>> to an overlapping object". Since the "call" and "compat_call" are
>>
>> Was this taken from patch 2 without editing?
>>
>>> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
>>> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
>>> @@ -526,9 +526,19 @@ static inline void put_loop_count(
>>>           */                                                             \
>>>          if ( !amd_like(ctxt) && mode_64bit() && ad_bytes == 4 )         \
>>>          {                                                               \
>>> +            uint64_t tmp;                                               \
>>> +                                                                        \
>>>              _regs.r(cx) = 0;                                            \
>>> -            if ( extend_si ) _regs.r(si) = _regs.esi;                   \
>>> -            if ( extend_di ) _regs.r(di) = _regs.edi;                   \
>>> +            if ( extend_si )                                            \
>>> +            {                                                           \
>>> +                tmp = _regs.esi;                                        \
>>> +                _regs.r(si) = tmp;                                      \
>>> +            }                                                           \
>>> +            if ( extend_di )                                            \
>>> +            {                                                           \
>>> +                tmp = _regs.edi;                                        \
>>> +                _regs.r(di) = tmp;                                      \
>>> +            }                                                           \
>>
>> See commit 7225f13aef03 for how we chose to address similar issues elsewhere
>> in the emulator. I think we want to be consistent there. This will then also
>> eliminate ...
>>
>>> @@ -2029,7 +2039,12 @@ x86_emulate(
>>>          switch ( op_bytes )
>>>          {
>>>          case 2: _regs.ax = (int8_t)_regs.ax; break; /* cbw */
>>> -        case 4: _regs.r(ax) = (uint32_t)(int16_t)_regs.ax; break; /* cwde */
>>> +        case 4:
>>> +            {
>>> +                uint32_t tmp = (uint32_t)(int16_t)_regs.ax;
>>> +                _regs.r(ax) = tmp;
>>> +                break; /* cwde */
>>> +            }
>>
>> ... the odd brace placement here, as well as the inconsistency in the types
>> you used for the temporary variables (both really could have been unsigned
>> int; no need for a fixed-width type).
> 
> Is this what you have in mind?

No, and that's also not what the referenced commit did in a similar situation.

> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
> @@ -527,8 +527,8 @@ static inline void put_loop_count(
>          if ( !amd_like(ctxt) && mode_64bit() && ad_bytes == 4 )         \
>          {                                                               \
>              _regs.r(cx) = 0;                                            \
> -            if ( extend_si ) _regs.r(si) = _regs.esi;                   \
> -            if ( extend_di ) _regs.r(di) = _regs.edi;                   \
> +            if ( extend_si ) _regs.r(si) = (uint64_t)_regs.esi;         \
> +            if ( extend_di ) _regs.r(di) = (uint64_t)_regs.edi;         \

            if ( extend_si ) _regs.r(si) = (uint32_t)_regs.r(si);       \
            if ( extend_di ) _regs.r(di) = (uint32_t)_regs.r(di);       \

After all what the rule requires is that we use _the same_ field on both sides.

Jan


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Date: Tue, 29 Apr 2025 09:06:34 +0200
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Subject: Re: [PATCH v1 2/3] compat: address violations of MISRA C Rule 19.1
To: Stefano Stabellini 
Cc: victorm.lira@amd.com, Nicola Vetrini ,
 Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Federico Serafini ,
 Bertrand Marquis , xen-devel@lists.xenproject.org
References: 
 <74b0420ab20fc0204db14c0a1a4a68ed48b25a38.1745624090.git.victorm.lira@amd.com>
 
 
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From: Jan Beulich 
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On 29.04.2025 01:21, Stefano Stabellini wrote:
> On Mon, 28 Apr 2025, Jan Beulich wrote:
>> On 26.04.2025 01:42, victorm.lira@amd.com wrote:
>>> From: Nicola Vetrini 
>>>
>>> Rule 19.1 states: "An object shall not be assigned or copied
>>> to an overlapping object". Since the "call" and "compat_call" are
>>> fields of the same union, reading from one member and writing to
>>> the other violates the rule, while not causing Undefined Behavior
>>> due to their relative sizes. However, a dummy variable is used to
>>> address the violation and prevent the future possibility of
>>> incurring in UB.
>>
>> If there is such a concern, ...
>>
>>> --- a/xen/common/compat/multicall.c
>>> +++ b/xen/common/compat/multicall.c
>>> @@ -15,8 +15,13 @@ typedef int ret_t;
>>>  static inline void xlat_multicall_entry(struct mc_state *mcs)
>>>  {
>>>      int i;
>>> +    xen_ulong_t arg;
>>> +
>>>      for (i=0; i<6; i++)
>>> -        mcs->compat_call.args[i] = mcs->call.args[i];
>>> +    {
>>> +        arg = mcs->call.args[i];
>>> +        mcs->compat_call.args[i] = arg;
>>> +    }
>>>  }
>>
>> ... wouldn't it be of concern as well that the alternating parts of
>> the union are still accessed in a flip-flop manner? IOW we continue to
>> rely on the relative placement properties of the individual array
>> elements. To eliminate such a concern, I think the resulting code would
>> also want to be correct if iteration was swapped to work downwards.
>>
>> Also the scope of the temporary could certainly be the loop body rather
>> than the entire function.
> 
> Wouldn't be safer to do this then?
> 
> static inline void xlat_multicall_entry(struct mc_state *mcs)
> {
>     int i;
>     xen_ulong_t args[6];
> 
>     for ( i = 0; i < 6; i++ )
>     {
>         args[i] = mcs->call.args[i];
>     }
>     for ( i = 0; i < 6; i++ )
>     {
>         mcs->compat_call.args[i] = args[i];
>     }
> }
> 
> If you have any specific suggestions I think C code would be easier to
> understand than English.

Kind of the above, yes, with the further remark below also taken care of.
So ...

>> I also don't think it needs to be xen_ulong_t,
>> but maybe using unsigned int instead wouldn't make a difference in
>> generated code.
> 
> Keeping the same type as mcs->call.args[i] would seem more obviously
> correct? Not to mention that unsigned long is what we defined as
> register type? If we really want to avoid xen_ulong_t, then it should
> be uintptr_t?
> 
> We should stick to one type to be used as register type. On ARM, we
> defined register_t.

... with both taken into account e.g.:

    typeof(mcs->compat_call.args[0]) args[ARRAY_SIZE(mcs->call.args)];

    for ( i = 0; i < ARRAY_SIZE(args); i++ )
        args[i] = mcs->call.args[i];

    memcpy(mcs->compat_call.args, args, sizeof(args));

Of course there are variations possible. There also may want to be a
BUILD_BUG_ON() to "document" both array sizes match, even if the compat
form is auto-generated from the native one.

Tangential: As of 2f531c122e95 ("x86: limit number of hypercall parameters
to 5") it's kind of bogus that we process 6 array elements here. This even
extends to an assertion in hypercall_xlat_continuation() and to some of
the handling in hypercall_create_continuation(). I guess I will want to
make a patch there, which of course I could make cover the Misra aspect
here as well.

Jan


From xen-devel-bounces@lists.xenproject.org Tue Apr 29 07:10:20 2025
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From: "Chen, Jiqian" 
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CC: "xen-devel@lists.xenproject.org" , "Huang,
 Ray" , "Chen, Jiqian" 
Subject: Re: [PATCH v3 01/11] vpci/header: Move emulating cap list logic into
 new function
Thread-Topic: [PATCH v3 01/11] vpci/header: Move emulating cap list logic into
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Thread-Index: AQHbsoVV57sSVRwNUkGPSUHVh/53fbO6yliA
Date: Tue, 29 Apr 2025 07:10:11 +0000
Message-ID:
 
References: <20250421061903.1542652-1-Jiqian.Chen@amd.com>
 <20250421061903.1542652-2-Jiqian.Chen@amd.com>
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Date: Tue, 29 Apr 2025 09:50:28 +0200
From: Nicola Vetrini 
To: Jan Beulich 
Cc: Stefano Stabellini , victorm.lira@amd.com,
 Federico Serafini , Andrew Cooper
 , Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Bertrand Marquis
 , xen-devel@lists.xenproject.org
Subject: Re: [PATCH v1 1/2] xen/page_alloc: address violation of Rule 14.3
In-Reply-To: 
References: <5f2e316aae4667d1fe851e68552eb881c4d5a015.1745625477.git.victorm.lira@amd.com>
 <3146fbf3-2ff1-48a4-b05b-37477a9a5cc5@suse.com>
 
 
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On 2025-04-29 08:14, Jan Beulich wrote:
> On 29.04.2025 01:21, Stefano Stabellini wrote:
>> On Mon, 28 Apr 2025, Jan Beulich wrote:
>>> On 26.04.2025 02:00, victorm.lira@amd.com wrote:
>>>> From: Federico Serafini 
>>>> 
>>>> MISRA C Rule 14.3 states that "Controlling expressions shall not be
>>>> invariant".
>>>> 
>>>> Add a SAF comment to deviate the rule for build configurations 
>>>> without
>>>> CONFIG_LLC_COLORING enabled.
>>> 
>>> I was surprised by this supposedly being the only violation. And 
>>> indeed it
>>> wasn't very hard to find more. For example, we have a number of
>>> "while ( num_online_cpus() > 1 && ... )", which become compile-time
>>> constant (false) when NR_CPUS=1.
>> 
>> Uhm, I did run a special scan for this and I can confirm no other
>> violations are detected.
> 
> Because of it being only one single configuration that's being scanned. 
> I did
> point out before that this is a problem for anyone wanting to certify 
> the
> hypervisor in a (perhaps just slightly) different configuration.
> 
>>>> --- a/xen/common/page_alloc.c
>>>> +++ b/xen/common/page_alloc.c
>>>> @@ -2038,6 +2038,7 @@ static struct page_info 
>>>> *alloc_color_heap_page(unsigned int memflags,
>>>> 
>>>>      spin_lock(&heap_lock);
>>>> 
>>>> +    /* SAF-14-safe MISRA C R14.3 condition always false without 
>>>> LLC_COLORING */
>>>>      for ( i = 0; i < domain_num_llc_colors(d); i++ )
>>>>      {
>>>>          unsigned long free = free_colored_pages[domain_llc_color(d, 
>>>> i)];
>>> 
>>> Hmm, this way the deviation applies even when LLC_COLORING=y.
>> 
>> Yes but in the LLC_COLORING=y case it is harmless. Do you have 
>> something
>> else in mind?
> 
> What if, perhaps by mistake, domain_num_llc_colors() becomes constant 0 
> in
> yet another configuration? (I don't expect this would work, but in 
> principle
> the comment ought to be inside an #ifdef.)
> 
>>> As to the comment wording - looks like we're pretty inconsistent with 
>>> that
>>> right now. I, for one, don't think the Misra rule needs (re)stating 
>>> there;
>>> the SAF index points at all the data that's needed if one cares about 
>>> the
>>> specifics of the deviation.
>> 
>> Do you prefer:
>> 
>> /* SAF-14-safe */
> 
> That's too short. All I'm asking for is to drop the (imprecise) rule
> reference. Noticing only now: It being imprecise may make the comment 
> go
> stale if we move to a newer Misra spec, as the rule number may be 
> different
> then.
> 

There is a guarantee by the MISRA committee to never reuse rule ids, and 
the SAF mechanism offers a centralized place where the actual rule ID 
for each tool is specified, so I don't foresee problems in that regard. 
In practical terms, I think it is very unlikely that this rule will 
change in any way (e.g. it is identical up until MISRA C:2025, published 
in March).

-- 
Nicola Vetrini, B.Sc.
Software Engineer
BUGSENG (https://bugseng.com)
LinkedIn: https://www.linkedin.com/in/nicola-vetrini-a42471253


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Date: Tue, 29 Apr 2025 10:15:44 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Alejandro Vallejo 
Cc: Andrew Cooper ,
	Ariadne Conill , Wei Liu ,
	xen-devel@lists.xenproject.org, Paul Durrant ,
	Jan Beulich ,
	"Alexander M . Merritt" 
Subject: Re: [PATCH v2] x86/hyperv: use dynamically allocated page for
 hypercalls
Message-ID: 
References: <20250425234331.65875-1-ariadne@ariadne.space>
 
 
 <97d28edb-4274-408f-a825-d09fa771e21d@citrix.com>
 
MIME-Version: 1.0
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In-Reply-To: 

On Mon, Apr 28, 2025 at 12:50:55PM +0100, Alejandro Vallejo wrote:
> On Mon Apr 28, 2025 at 12:07 PM BST, Andrew Cooper wrote:
> > On 28/04/2025 11:55 am, Alejandro Vallejo wrote:
> >> On Mon Apr 28, 2025 at 10:41 AM BST, Roger Pau Monné wrote:
> >>> On Fri, Apr 25, 2025 at 04:43:31PM -0700, Ariadne Conill wrote:
> >>>> Previously Xen placed the hypercall page at the highest possible MFN,
> >>>> but this caused problems on systems where there is more than 36 bits
> >>>> of physical address space.
> >>>>
> >>>> In general, it also seems unreliable to assume that the highest possible
> >>>> MFN is not already reserved for some other purpose.
> >>>>
> >>>> Changes from v1:
> >>>> - Continue to use fixmap infrastructure
> >>>> - Use panic in Hyper-V setup() function instead of returning -ENOMEM
> >>>>   on hypercall page allocation failure
> >>>>
> >>>> Fixes: 620fc734f854 ("x86/hyperv: setup hypercall page")
> >>>> Cc: Alejandro Vallejo 
> >>>> Cc: Alexander M. Merritt 
> >>>> Signed-off-by: Ariadne Conill 
> >>>> ---
> >>>>  xen/arch/x86/guest/hyperv/hyperv.c      | 17 +++++++----------
> >>>>  xen/arch/x86/include/asm/guest/hyperv.h |  3 ---
> >>>>  2 files changed, 7 insertions(+), 13 deletions(-)
> >>>>
> >>>> diff --git a/xen/arch/x86/guest/hyperv/hyperv.c b/xen/arch/x86/guest/hyperv/hyperv.c
> >>>> index 6989af38f1..0305374a06 100644
> >>>> --- a/xen/arch/x86/guest/hyperv/hyperv.c
> >>>> +++ b/xen/arch/x86/guest/hyperv/hyperv.c
> >>>> @@ -98,7 +98,13 @@ static void __init setup_hypercall_page(void)
> >>>>      rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
> >>>>      if ( !hypercall_msr.enable )
> >>>>      {
> >>>> -        mfn = HV_HCALL_MFN;
> >>>> +        void *hcall_page = alloc_xenheap_page();
> >>>> +        if ( !hcall_page )
> >>>> +            panic("Hyper-V: Failed to allocate hypercall trampoline page");
> >>>> +
> >>>> +        printk("Hyper-V: Allocated hypercall page @ %p.\n", hcall_page);
> >>> This likely wants to be a dprintk, and possibly also print the
> >>> physical address of the used page?  And no period at the end of the
> >>> sentence IMO.
> >>>
> >>> I think Xen might have used the last page in the physical address
> >>> range to prevent HyperV from possibly shattering a superpage in the
> >>> second stage translation page-tables if normal RAM was used?
> >>>
> >>> However I don't know whether HyperV will shatter super-pages if a
> >>> sub-page of it is used to contain the hypercall page (I don't think it
> >>> should?)
> >> I think it's quite unlikely.
> >
> > It will shatter superpages.
> >
> > The overlay is not part of guest memory, and will hide whatever is
> > behind it while it is mapped, which will force a 4k PTE in EPT/NPT.
> 
> That's an implementation detail. They can very well copy the trampoline
> to guest memory when there is such (and save the previous contents
> elsewhere) and restore them when disabling the trampoline. It's a
> trivial optimisation that would prevent shattering while being fully
> compliant with the TLFS.

It's an implementation detail relevant from a guest perspective, as it
impacts guest performance.  IOW: we care about the specific (current)
implementation, as it's meaningful to how the guest-side should be
implemented.

> The actual physical location of the trampoline is fully undefined. It
> is defined to be an overlay; but that's a specification, not an
> implementation.
> 
> >
> > Thinking about it, a better position would be adjacent to the APIC MMIO
> > window, so at 0xfee01000.  The APIC MMIO window is forced to be a 4k
> > mapping too, and the rest of the 2M window is normally empty.
> >
> 
> Sounds like an assumption waiting to be broken. Just like the last page
> of guest-physical was.

As a compromise - could we try to allocate from < 4GB first, and
resort to high memory if that doesn't work?  That would at least limit
shattering (if done) to the low 4GB, which is quite likely fragmented
already:

hcall_page = alloc_xenheap_pages(0, MEMF_bits(32));
if ( !hcall_page )
    hcall_page = alloc_xenheap_page();
if ( !hcall_page )
    panic(...);

That will need a comment to describe what's going on.

Thanks, Roger.


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To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Julien Grall , Stefano Stabellini ,
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 Anthony PERARD 
From: Jan Beulich 
Subject: [PATCH] {hyper,multi}call: further limit arguments to just 5
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Multicall compat translation and hypercall continuation handling can
also be shrunk to the processing of just (up to) 5 arguments.

Take the opportunity to
- make exceeding the limit noisy in hypercall_create_continuation(),
- use speculation-safe array access in hypercall_create_continuation(),
- avoid a Misra C:2012 Rule 19.1 violation in xlat_multicall_entry(),
- further tidy xlat_multicall_entry() and __trace_multicall_call()
  style-wise.

Amends: 2f531c122e95 ("x86: limit number of hypercall parameters to 5")
Signed-off-by: Jan Beulich 
---
hypercall_xlat_continuation() uses BUG() when encountering too large an
argument count in release builds, but I think that's too harsh. Hence in
hypercall_create_continuation() I'm re-using the existing error path.
Interestingly the multicall part of hypercall_xlat_continuation() has no
check at all which would cover release builds.

With gcc14 code size grows according to my observation, due to the loops
in xlat_multicall_entry() and __trace_multicall_call() both being
unrolled now.

--- a/xen/arch/arm/domain.c
+++ b/xen/arch/arm/domain.c
@@ -392,7 +392,11 @@ unsigned long hypercall_create_continuat
     if ( mcs->flags & MCSF_in_multicall )
     {
         for ( i = 0; *p != '\0'; i++ )
-            mcs->call.args[i] = NEXT_ARG(p, args);
+        {
+            if ( i >= ARRAY_SIZE(mcs->call.args) )
+                goto bad_fmt;
+            array_access_nospec(mcs->call.args, i) = NEXT_ARG(p, args);
+        }
 
         /* Return value gets written back to mcs->call.result */
         rc = mcs->call.result;
@@ -417,7 +421,7 @@ unsigned long hypercall_create_continuat
                 case 2: regs->x2 = arg; break;
                 case 3: regs->x3 = arg; break;
                 case 4: regs->x4 = arg; break;
-                case 5: regs->x5 = arg; break;
+                default: goto bad_fmt;
                 }
             }
 
@@ -440,7 +444,7 @@ unsigned long hypercall_create_continuat
                 case 2: regs->r2 = arg; break;
                 case 3: regs->r3 = arg; break;
                 case 4: regs->r4 = arg; break;
-                case 5: regs->r5 = arg; break;
+                default: goto bad_fmt;
                 }
             }
 
--- a/xen/arch/x86/hypercall.c
+++ b/xen/arch/x86/hypercall.c
@@ -41,7 +41,11 @@ unsigned long hypercall_create_continuat
     if ( mcs->flags & MCSF_in_multicall )
     {
         for ( i = 0; *p != '\0'; i++ )
-            mcs->call.args[i] = NEXT_ARG(p, args);
+        {
+            if ( i >= ARRAY_SIZE(mcs->call.args) )
+                goto bad_fmt;
+            array_access_nospec(mcs->call.args, i) = NEXT_ARG(p, args);
+        }
     }
     else
     {
@@ -65,7 +69,7 @@ unsigned long hypercall_create_continuat
                 case 2: regs->rdx = arg; break;
                 case 3: regs->r10 = arg; break;
                 case 4: regs->r8  = arg; break;
-                case 5: regs->r9  = arg; break;
+                default: goto bad_fmt;
                 }
             }
         }
@@ -81,7 +85,7 @@ unsigned long hypercall_create_continuat
                 case 2: regs->rdx = arg; break;
                 case 3: regs->rsi = arg; break;
                 case 4: regs->rdi = arg; break;
-                case 5: regs->rbp = arg; break;
+                default: goto bad_fmt;
                 }
             }
         }
@@ -177,7 +181,6 @@ int hypercall_xlat_continuation(unsigned
             case 2: reg = ®s->rdx; break;
             case 3: reg = ®s->rsi; break;
             case 4: reg = ®s->rdi; break;
-            case 5: reg = ®s->rbp; break;
             default: BUG(); reg = NULL; break;
             }
             if ( (mask & 1) )
--- a/xen/common/compat/multicall.c
+++ b/xen/common/compat/multicall.c
@@ -14,9 +14,13 @@ typedef int ret_t;
 
 static inline void xlat_multicall_entry(struct mc_state *mcs)
 {
-    int i;
-    for (i=0; i<6; i++)
-        mcs->compat_call.args[i] = mcs->call.args[i];
+    unsigned int i;
+    typeof(mcs->compat_call.args[0]) args[ARRAY_SIZE(mcs->call.args)];
+
+    for ( i = 0; i < ARRAY_SIZE(args); i++ )
+        args[i] = mcs->call.args[i];
+
+    memcpy(mcs->compat_call.args, args, sizeof(args));
 }
 
 #define multicall_entry      compat_multicall_entry
@@ -29,8 +33,8 @@ static inline void xlat_multicall_entry(
 
 static void __trace_multicall_call(multicall_entry_t *call)
 {
-    xen_ulong_t args[6];
-    int i;
+    xen_ulong_t args[ARRAY_SIZE(call->args)];
+    unsigned int i;
 
     for ( i = 0; i < ARRAY_SIZE(args); i++ )
         args[i] = call->args[i];
--- a/xen/include/public/xen.h
+++ b/xen/include/public/xen.h
@@ -640,7 +640,11 @@ DEFINE_XEN_GUEST_HANDLE(mmu_update_t);
  */
 struct multicall_entry {
     xen_ulong_t op, result;
+#ifndef __XEN__
     xen_ulong_t args[6];
+#else /* Only 5 arguments are supported in reality. */
+    xen_ulong_t args[5], unused;
+#endif
 };
 typedef struct multicall_entry multicall_entry_t;
 DEFINE_XEN_GUEST_HANDLE(multicall_entry_t);


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Date: Tue, 29 Apr 2025 10:24:43 +0200
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Subject: Re: [PATCH v1 08/14] xen/riscv: imsic_init() implementation
To: Jan Beulich 
References: 
 <09e0fcd64f97062441a68102ead520b818150fe9.1744126720.git.oleksii.kurochko@gmail.com>
 <78fa2ed0-57a2-4990-bc9c-8fa52e41420a@suse.com>
 
 <9a13c625-cd33-485d-a91f-9f005522b5a4@suse.com>
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Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Xen-devel ,
 Romain Caritey 
From: Oleksii Kurochko 
In-Reply-To: <9a13c625-cd33-485d-a91f-9f005522b5a4@suse.com>

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On 4/16/25 8:31 AM, Jan Beulich wrote:
>>>> --- /dev/null
>>>> +++ b/xen/arch/riscv/include/asm/imsic.h
>>>> @@ -0,0 +1,66 @@
>>>> +/* SPDX-License-Identifier: MIT */
>>>> +
>>>> +/*
>>>> + * xen/arch/riscv/imsic.h
>>>> + *
>>>> + * RISC-V Incoming MSI Controller support
>>>> + *
>>>> + * (c) 2023 Microchip Technology Inc.
>>>> + */
>>>> +
>>>> +#ifndef ASM__RISCV__IMSIC_H
>>>> +#define ASM__RISCV__IMSIC_H
>>>> +
>>>> +#include 
>>>> +
>>>> +#define IMSIC_MMIO_PAGE_SHIFT   12
>>>> +#define IMSIC_MMIO_PAGE_SZ      (1UL << IMSIC_MMIO_PAGE_SHIFT)
>>>> +
>>>> +#define IMSIC_MIN_ID            63
>>>> +#define IMSIC_MAX_ID            2048
>>>> +
>>>> +struct imsic_msi {
>>>> +    paddr_t base_addr;
>>>> +    unsigned long offset;
>>>> +};
>>>> +
>>>> +struct imsic_mmios {
>>>> +    paddr_t base_addr;
>>>> +    unsigned long size;
>>>> +    bool harts[NR_CPUS];
>>> An array of bool - won't a bitmap do here? Even then I wouldn't be overly
>>> happy to see it dimensioned by NR_CPUS.
>> Bitmap will fit here well. But for DECLARE_BITMAP() is necessary the size
>> of bitmap so NR_CPUS should be used again.
>> Could you please remind me why it isn't good to use it?
>> Because NR_CPUS not always equal to an amount of physical cpus?
> "Not equal" wouldn't be overly problematic. But NR_CPUS=4000 and the actual
> number of CPUs being 4 would be wasteful in general. More when its wider
> than a bit that's needed per CPU, but where would you draw the line if you
> permitted use of NR_CPUS here?
>
>> Should I use non-static version of bitmap declaration? (if we have such...)
> That's simply "unsigned long *" then, or - at the tail of a dynamically
> allocated struct - possibly unsigned long[].
>
>>>> +};
>>>> +
>>>> +struct imsic_config {
>>>> +    /* base address */
>>>> +    paddr_t base_addr;
>>>> +
>>>> +    /* Bits representing Guest index, HART index, and Group index */
>>>> +    unsigned int guest_index_bits;
>>>> +    unsigned int hart_index_bits;
>>>> +    unsigned int group_index_bits;
>>>> +    unsigned int group_index_shift;
>>>> +
>>>> +    /* imsic phandle */
>>>> +    unsigned int phandle;
>>>> +
>>>> +    /* number of parent irq */
>>>> +    unsigned int nr_parent_irqs;
>>>> +
>>>> +    /* number off interrupt identities */
>>>> +    unsigned int nr_ids;
>>>> +
>>>> +    /* mmios */
>>>> +    unsigned int nr_mmios;
>>>> +    struct imsic_mmios *mmios;
>>>> +
>>>> +    /* MSI */
>>>> +    struct imsic_msi msi[NR_CPUS];
>>> You surely can avoid wasting perhaps a lot of memory by allocating this
>>> based on the number of CPUs in use?
>> It make sense. I'll allocate then this dynamically.
> Or, as per above, when put at the tail and the struct itself is
> dynamically allocated, use struct imsic_msi[]. We even have dedicated
> xmalloc() flavors for this kind of allocation.

Do you mean xzalloc_flex_struct()?

I think, I can't use for both of the cases (allocation of mmios and msi).
For msi[] then it is needed to allocate imsic_config also dynamically, isn't it?
So something like:
  imsic_config = xzalloc_flex_struct(struct imsic_config, msi, NR_CPUS).
But now it is allocated statically.

For *mmios and harts[] (a member inside struct imsic_mmios):
   mmios = xzalloc_flex_struct(struct imsic_mmios, harts, NR_CPUS); // NR_CPUs just for example...
It will allocate only one mmios, but it is needed mmios[nr_mmios].
Maybe, something like _xmalloc((offsetof(struct imsic_mmios, harts[NR_CPUS])) * NR_CPUS, sizeof(struct imsic_mmios)) will work.

Am I missing something?

~ Oleksii

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    On 4/16/25 8:31 AM, Jan Beulich wrote:
    
    
    
    
    
      
    --- /dev/null
+++ b/xen/arch/riscv/include/asm/imsic.h
@@ -0,0 +1,66 @@
+/* SPDX-License-Identifier: MIT */
+
+/*
+ * xen/arch/riscv/imsic.h
+ *
+ * RISC-V Incoming MSI Controller support
+ *
+ * (c) 2023 Microchip Technology Inc.
+ */
+
+#ifndef ASM__RISCV__IMSIC_H
+#define ASM__RISCV__IMSIC_H
+
+#include <xen/types.h>
+
+#define IMSIC_MMIO_PAGE_SHIFT   12
+#define IMSIC_MMIO_PAGE_SZ      (1UL << IMSIC_MMIO_PAGE_SHIFT)
+
+#define IMSIC_MIN_ID            63
+#define IMSIC_MAX_ID            2048
+
+struct imsic_msi {
+    paddr_t base_addr;
+    unsigned long offset;
+};
+
+struct imsic_mmios {
+    paddr_t base_addr;
+    unsigned long size;
+    bool harts[NR_CPUS];

    An array of bool - won't a bitmap do here? Even then I wouldn't be overly
happy to see it dimensioned by NR_CPUS.

    Bitmap will fit here well. But for DECLARE_BITMAP() is necessary the size
of bitmap so NR_CPUS should be used again.
Could you please remind me why it isn't good to use it?
Because NR_CPUS not always equal to an amount of physical cpus?

    "Not equal" wouldn't be overly problematic. But NR_CPUS=4000 and the actual
number of CPUs being 4 would be wasteful in general. More when its wider
than a bit that's needed per CPU, but where would you draw the line if you
permitted use of NR_CPUS here?


    Should I use non-static version of bitmap declaration? (if we have such...)

    That's simply "unsigned long *" then, or - at the tail of a dynamically
allocated struct - possibly unsigned long[].


    +};
+
+struct imsic_config {
+    /* base address */
+    paddr_t base_addr;
+
+    /* Bits representing Guest index, HART index, and Group index */
+    unsigned int guest_index_bits;
+    unsigned int hart_index_bits;
+    unsigned int group_index_bits;
+    unsigned int group_index_shift;
+
+    /* imsic phandle */
+    unsigned int phandle;
+
+    /* number of parent irq */
+    unsigned int nr_parent_irqs;
+
+    /* number off interrupt identities */
+    unsigned int nr_ids;
+
+    /* mmios */
+    unsigned int nr_mmios;
+    struct imsic_mmios *mmios;
+
+    /* MSI */
+    struct imsic_msi msi[NR_CPUS];

    You surely can avoid wasting perhaps a lot of memory by allocating this
based on the number of CPUs in use?

    It make sense. I'll allocate then this dynamically.

    Or, as per above, when put at the tail and the struct itself is
dynamically allocated, use struct imsic_msi[]. We even have dedicated
xmalloc() flavors for this kind of allocation.
    
    
    
    
    Do you mean xzalloc_flex_struct()?

    I think, I can't use for both of the cases (allocation of mmios and msi).
For msi[] then it is needed to allocate imsic_config also dynamically, isn't it?
So something like:
 imsic_config = xzalloc_flex_struct(struct imsic_config, msi, NR_CPUS).
But now it is allocated statically.

For *mmios and harts[] (a member inside struct imsic_mmios):
  mmios = xzalloc_flex_struct(struct imsic_mmios, harts, NR_CPUS); // NR_CPUs just for example...
It will allocate only one mmios, but it is needed mmios[nr_mmios].
Maybe, something like _xmalloc((offsetof(struct imsic_mmios, harts[NR_CPUS])) * NR_CPUS, sizeof(struct imsic_mmios)) will work.

Am I missing something?

~ Oleksii
    
  


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Subject: Re: [PATCH v3] x86/hyperv: use dynamically allocated page for
 hypercalls
To: Ariadne Conill 
Cc: Paul Durrant , Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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 "Alexander M . Merritt" , xen-devel@lists.xenproject.org
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On 28.04.2025 21:57, Ariadne Conill wrote:
> Previously Xen placed the hypercall page at the highest possible MFN,
> but this caused problems on systems where there is more than 36 bits
> of physical address space.

Hmm, I should have asked already on the earlier version: What kinds of
problems are these, beyond ...

> In general, it also seems unreliable to assume that the highest possible
> MFN is not already reserved for some other purpose.

... this particular aspect? I find it puzzling that such problems would
depend on the number of physical address bits.

Jan


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To: "xen-devel@lists.xenproject.org" 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
From: Jan Beulich 
Subject: [PATCH] x86: drop underscore-prefixed {maddr,virt} <=> page
 conversion macros
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Unlike the ones converting to/from frame numbers, these don't have type-
safe overrides, and they also can't gain any within our present type
system. Unsurprisingly we also don't have any uses of the underscore-
prefixed variants.

Signed-off-by: Jan Beulich 

--- a/xen/arch/x86/include/asm/mm.h
+++ b/xen/arch/x86/include/asm/mm.h
@@ -342,7 +342,7 @@ void init_frametable(void);
 #define PDX_GROUP_SHIFT L2_PAGETABLE_SHIFT
 
 /* Convert between Xen-heap virtual addresses and page-info structures. */
-static inline struct page_info *__virt_to_page(const void *v)
+static inline struct page_info *virt_to_page(const void *v)
 {
     unsigned long va = (unsigned long)v;
 
@@ -355,7 +355,7 @@ static inline struct page_info *__virt_t
     return frame_table + ((va - DIRECTMAP_VIRT_START) >> PAGE_SHIFT);
 }
 
-static inline void *__page_to_virt(const struct page_info *pg)
+static inline void *page_to_virt(const struct page_info *pg)
 {
     ASSERT((unsigned long)pg - FRAMETABLE_VIRT_START < FRAMETABLE_SIZE);
     /*
--- a/xen/arch/x86/include/asm/page.h
+++ b/xen/arch/x86/include/asm/page.h
@@ -238,8 +238,8 @@ void scrub_page_cold(void *);
 #define page_to_mfn(pg)     pdx_to_mfn((unsigned long)((pg) - frame_table))
 
 /* Convert between machine addresses and page-info structures. */
-#define __maddr_to_page(ma) mfn_to_page(maddr_to_mfn(ma))
-#define __page_to_maddr(pg) mfn_to_maddr(page_to_mfn(pg))
+#define maddr_to_page(ma)   mfn_to_page(maddr_to_mfn(ma))
+#define page_to_maddr(pg)   mfn_to_maddr(page_to_mfn(pg))
 
 /* Convert between frame number and address formats.  */
 #define __pfn_to_paddr(pfn) ((paddr_t)(pfn) << PAGE_SHIFT)
@@ -256,10 +256,6 @@ void scrub_page_cold(void *);
 #define mfn_valid(mfn)      __mfn_valid(mfn_x(mfn))
 #define virt_to_mfn(va)     __virt_to_mfn(va)
 #define mfn_to_virt(mfn)    __mfn_to_virt(mfn)
-#define maddr_to_page(ma)   __maddr_to_page(ma)
-#define page_to_maddr(pg)   __page_to_maddr(pg)
-#define virt_to_page(va)    __virt_to_page(va)
-#define page_to_virt(pg)    __page_to_virt(pg)
 #define pfn_to_paddr(pfn)   __pfn_to_paddr(pfn)
 #define paddr_to_pfn(pa)    __paddr_to_pfn(pa)
 #define paddr_to_pdx(pa)    pfn_to_pdx(paddr_to_pfn(pa))


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From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= 
Date: Tue, 29 Apr 2025 12:45:49 +0300 (EEST)
To: "Xin Li (Intel)" 
cc: LKML , kvm@vger.kernel.org, 
    linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org, 
    virtualization@lists.linux.dev, linux-pm@vger.kernel.org, 
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Subject: Re: [PATCH v4 01/15] x86/msr: Add missing includes of 
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On Sun, 27 Apr 2025, Xin Li (Intel) wrote:

> For some reason, there are some TSC-related functions in the MSR
> header even though there is a tsc.h header.
>=20
> To facilitate the relocation of rdtsc{,_ordered}() from 
> to  and to eventually eliminate the inclusion of
>  in , add  to the source files that
> reference definitions from .
>=20
> Signed-off-by: Xin Li (Intel) 
> Acked-by: Dave Hansen 
> Acked-by: Peter Zijlstra (Intel) 
> ---
>=20
> Change in v4:
> *) Add missing includes in a different patch (Ilpo J=E4rvinen).
> *) Add all necessary direct inclusions for msr.h (Ilpo J=E4rvinen).
>=20
> Change in v3:
> * Add a problem statement to the changelog (Dave Hansen).
> ---
>  arch/x86/events/msr.c                                         | 3 +++
>  arch/x86/events/perf_event.h                                  | 1 +
>  arch/x86/events/probe.c                                       | 2 ++

Under arch/x86/events/ a few files seem to be missing the include?

>  arch/x86/hyperv/ivm.c                                         | 1 +

Also under hyperv/ not all files are covered but I'm a bit hesitant to=20
suggest a change there since I'm not sure if they (hypervisors) do=20
something special w.r.t. msr.

>  arch/x86/include/asm/fred.h                                   | 1 +
>  arch/x86/include/asm/microcode.h                              | 2 ++
>  arch/x86/include/asm/mshyperv.h                               | 1 +
>  arch/x86/include/asm/msr.h                                    | 1 +
>  arch/x86/include/asm/suspend_32.h                             | 1 +
>  arch/x86/include/asm/suspend_64.h                             | 1 +
>  arch/x86/include/asm/switch_to.h                              | 2 ++

arch/x86/kernel/acpi/ ?
acrh/x86/kernel/cet.c ?
=2E..

There seem to be quite many under arch/x86/ that still don't have it, I=20
didn't list them all as there were so many after this point.

But that's up to x86 maintainers how throughout they want you to be.

This command may be helpful to exclude the files which already have the=20
include so you can focus on the ones that may still be missing it:

git grep -l -e rdmsr -e wrmsr | grep -v -f <(git grep -l -e 'asm/msr\.h')

>  arch/x86/kernel/cpu/resctrl/pseudo_lock.c                     | 1 +
>  arch/x86/kernel/fpu/xstate.h                                  | 1 +
>  arch/x86/kernel/hpet.c                                        | 1 +
>  arch/x86/kernel/process_64.c                                  | 1 +
>  arch/x86/kernel/trace_clock.c                                 | 2 +-
>  arch/x86/kernel/tsc_sync.c                                    | 1 +
>  arch/x86/lib/kaslr.c                                          | 2 +-
>  arch/x86/mm/mem_encrypt_identity.c                            | 1 +
>  arch/x86/realmode/init.c                                      | 1 +
>  drivers/acpi/acpi_extlog.c                                    | 1 +
>  drivers/acpi/processor_perflib.c                              | 1 +
>  drivers/acpi/processor_throttling.c                           | 3 ++-
>  drivers/char/agp/nvidia-agp.c                                 | 1 +
>  drivers/cpufreq/amd-pstate-ut.c                               | 2 ++
>  drivers/crypto/ccp/sev-dev.c                                  | 1 +
>  drivers/edac/amd64_edac.c                                     | 1 +
>  drivers/edac/ie31200_edac.c                                   | 1 +
>  drivers/edac/mce_amd.c                                        | 1 +
>  drivers/hwmon/hwmon-vid.c                                     | 4 ++++
>  drivers/idle/intel_idle.c                                     | 1 +
>  drivers/misc/cs5535-mfgpt.c                                   | 1 +
>  drivers/net/vmxnet3/vmxnet3_drv.c                             | 4 ++++
>  drivers/platform/x86/intel/ifs/core.c                         | 1 +
>  drivers/platform/x86/intel/ifs/load.c                         | 1 +
>  drivers/platform/x86/intel/ifs/runtest.c                      | 1 +
>  drivers/platform/x86/intel/pmc/cnp.c                          | 1 +
>  drivers/platform/x86/intel/speed_select_if/isst_if_common.c   | 1 +
>  drivers/platform/x86/intel/speed_select_if/isst_if_mbox_msr.c | 1 +
>  drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c   | 1 +
>  drivers/platform/x86/intel/turbo_max_3.c                      | 1 +
>  .../platform/x86/intel/uncore-frequency/uncore-frequency.c    | 1 +
>  drivers/powercap/intel_rapl_common.c                          | 1 +
>  drivers/powercap/intel_rapl_msr.c                             | 1 +
>  .../thermal/intel/int340x_thermal/processor_thermal_device.c  | 1 +
>  drivers/thermal/intel/intel_tcc_cooling.c                     | 1 +
>  drivers/thermal/intel/x86_pkg_temp_thermal.c                  | 1 +
>  drivers/video/fbdev/geode/display_gx.c                        | 1 +
>  drivers/video/fbdev/geode/gxfb_core.c                         | 1 +
>  drivers/video/fbdev/geode/lxfb_ops.c                          | 1 +

Under drivers/ this looked pretty complete. Nice work.

Acked-by: Ilpo J=E4rvinen  # for pdx86

I also noticed these files might not need to include msr.h:

drivers/cpufreq/elanfreq.c
drivers/cpufreq/sc520_freq.c
drivers/accel/habanalabs/common/habanalabs_ioctl.c

=2E..so if you want, you may consider optionally adding a cleanup patch to=
=20
remove the include from them.

> --- a/drivers/video/fbdev/geode/gxfb_core.c
> +++ b/drivers/video/fbdev/geode/gxfb_core.c
> @@ -30,6 +30,7 @@
>  #include 
> =20
>  #include 
> +#include 

In wrong order.
> =20
>  #include "gxfb.h"

--
 i.
--8323328-666243473-1745919726=:938--


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Date: Tue, 29 Apr 2025 12:08:03 +0200
From: Ingo Molnar 
To: Linus Torvalds 
Cc: Andrew Cooper ,
	Arnd Bergmann , Arnd Bergmann ,
	Thomas Gleixner ,
	Ingo Molnar , Borislav Petkov ,
	Dave Hansen , x86@kernel.org,
	"H. Peter Anvin" , Juergen Gross ,
	Boris Ostrovsky ,
	Alexander Usyskin ,
	Greg Kroah-Hartman ,
	Mateusz =?utf-8?Q?Jo=C5=84czyk?= ,
	Mike Rapoport , Ard Biesheuvel ,
	Peter Zijlstra , linux-kernel@vger.kernel.org,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH] bitops/32: Convert variable_ffs() and fls() zero-case
 handling to C
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* Linus Torvalds  wrote:

> On Mon, 28 Apr 2025 at 00:14, Ingo Molnar  wrote:
> >
> > And, just out of intellectual curiosity, I also tried to measure the
> > code generation price of the +1 standards-quirk in the fls()/ffs()
> > interface as well:
> >
> > ... and unless I messed up the patch, it seems to have a surprisingly
> > low impact - maybe because the compiler can amortize its cost by
> > adjusting all dependent code mostly at build time, so the +1 doesn't
> > end up being generated most of the time?
> 
> No, I think one issue is that most users actually end up subtracting
> one from the return value of 'ffs()', because the "bit #0 returns 1"
> semantics of the standard ffs() function really is insane.
> 
> It's not just that it doesn't match sane hardware, it's also that it
> doesn't match sane *users*. If bit #0 is set, people want '0', so they
> typically subtract 1.
> 
> So when you stop adding one, you aren't actually removing code -
> you're often adding it.
> 
> Just see how many hits you get from
> 
>     git grep '\ 
> which is obviously not a very precise pattern, but just look at the
> output and see just *how* common that "subtract one" thing is.
> 
> I really don't understand how anybody *ever* thought that the whole
> "return one bigger" was a good idea for ffs().

Yeah. No argument from me that it's a badly thought out interface - I 
was just surprised that it doesn't seem to impact performance as badly 
as I expected. I have to add that a lot of work went into absorbing the 
negative effects of the ffs()/fls() interfaces:

  starship:~/tip> git grep -Ee '__ffs\(|__fls\(' | wc -l
  1055

So it impacts code quality negatively, which is arguably the worse side 
effect.

> But maybe people really were poisoned by the Pascal mindset. Or maybe 
> it was invented by some ancient Roman who hadn't heard of the concept 
> of zero. Who knows?

Hey, ancient Romans didn't even have the concept of *whitespaces* and 
punctuation to begin with:

    https://historyofinformation.com/images/Vergilius_Augusteus,_Georgica_121.jpg

Lazy stonemasons the lot of them.

Romans were the worst ever coders too I suspect. What have the Romans 
ever done for us??

	Ingo


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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Julien Grall ,
	Stefano Stabellini 
Subject: [PATCH v4 0/4] xen/x86: fix implementation of subpage r/o MMIO
Date: Tue, 29 Apr 2025 12:12:48 +0200
Message-ID: <20250429101252.50071-1-roger.pau@citrix.com>
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Hello,

Following series include some bugfixes and improvements to the handling
of subpage r/o MMIO accesses.

Patch 1 introduces a helper to reduce code duplication when performing
MMIO accesses.

Patch 2 is a bugfix for using subpage in HVM guest, and patch 3 is an
optimization to only register the HVM subpage handler when needed.

Finally patch 4 moves some PV only code to a PV specific file.

Thanks, Roger.

Roger Pau Monne (4):
  xen/io: provide helpers for multi size MMIO accesses
  x86/hvm: fix handling of accesses to partial r/o MMIO pages
  x86/hvm: only register the r/o subpage ops when needed
  x86/mm: move mmio_ro_emulated_write() to PV only file

 xen/arch/x86/hvm/Makefile              |   1 +
 xen/arch/x86/hvm/emulate.c             |  54 ++---------
 xen/arch/x86/hvm/hvm.c                 |  18 ++--
 xen/arch/x86/hvm/mmio.c                | 125 +++++++++++++++++++++++++
 xen/arch/x86/hvm/vmsi.c                |  47 +---------
 xen/arch/x86/include/asm/hvm/emulate.h |   1 -
 xen/arch/x86/include/asm/hvm/io.h      |   3 +
 xen/arch/x86/include/asm/mm.h          |  21 +++--
 xen/arch/x86/mm.c                      | 106 +++++----------------
 xen/arch/x86/pv/ro-page-fault.c        |  41 ++++++++
 xen/drivers/vpci/msix.c                |  47 +---------
 xen/include/xen/io.h                   |  70 ++++++++++++++
 12 files changed, 296 insertions(+), 238 deletions(-)
 create mode 100644 xen/arch/x86/hvm/mmio.c
 create mode 100644 xen/include/xen/io.h

-- 
2.48.1



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Julien Grall ,
	Stefano Stabellini 
Subject: [PATCH v4 1/4] xen/io: provide helpers for multi size MMIO accesses
Date: Tue, 29 Apr 2025 12:12:49 +0200
Message-ID: <20250429101252.50071-2-roger.pau@citrix.com>
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Several handlers have the same necessity of reading or writing from or to
an MMIO region using 1, 2, 4 or 8 bytes accesses.  So far this has been
open-coded in the function itself.  Instead provide a new set of handlers
that encapsulate the accesses.

Since the added helpers are not architecture specific, introduce a new
generic io.h header.

No functional change intended.

Signed-off-by: Roger Pau Monné 
---
Changes since v3:
 - Rebase on top of Jan's fix to mmio_ro_emulated_write().
---
 xen/arch/x86/hvm/vmsi.c | 47 ++-------------------------
 xen/arch/x86/mm.c       | 32 ++++++-------------
 xen/drivers/vpci/msix.c | 47 ++-------------------------
 xen/include/xen/io.h    | 70 +++++++++++++++++++++++++++++++++++++++++
 4 files changed, 85 insertions(+), 111 deletions(-)
 create mode 100644 xen/include/xen/io.h

diff --git a/xen/arch/x86/hvm/vmsi.c b/xen/arch/x86/hvm/vmsi.c
index fd83abb929ec..61b89834d97d 100644
--- a/xen/arch/x86/hvm/vmsi.c
+++ b/xen/arch/x86/hvm/vmsi.c
@@ -24,6 +24,7 @@
  * Will be merged it with virtual IOAPIC logic, since most is the same
 */
 
+#include 
 #include 
 #include 
 #include 
@@ -304,28 +305,7 @@ static void adjacent_read(
 
     hwaddr = fix_to_virt(fixmap_idx) + PAGE_OFFSET(address);
 
-    switch ( len )
-    {
-    case 1:
-        *pval = readb(hwaddr);
-        break;
-
-    case 2:
-        *pval = readw(hwaddr);
-        break;
-
-    case 4:
-        *pval = readl(hwaddr);
-        break;
-
-    case 8:
-        *pval = readq(hwaddr);
-        break;
-
-    default:
-        ASSERT_UNREACHABLE();
-        break;
-    }
+    *pval = read_mmio(hwaddr, len);
 }
 
 static void adjacent_write(
@@ -344,28 +324,7 @@ static void adjacent_write(
 
     hwaddr = fix_to_virt(fixmap_idx) + PAGE_OFFSET(address);
 
-    switch ( len )
-    {
-    case 1:
-        writeb(val, hwaddr);
-        break;
-
-    case 2:
-        writew(val, hwaddr);
-        break;
-
-    case 4:
-        writel(val, hwaddr);
-        break;
-
-    case 8:
-        writeq(val, hwaddr);
-        break;
-
-    default:
-        ASSERT_UNREACHABLE();
-        break;
-    }
+    write_mmio(hwaddr, val, len);
 }
 
 static int cf_check msixtbl_read(
diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index ac5b51d17aca..732ca1366f33 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -95,6 +95,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -116,7 +117,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -5102,7 +5102,7 @@ static void __iomem *subpage_mmio_map_page(
 static void subpage_mmio_write_emulate(
     mfn_t mfn,
     unsigned int offset,
-    const void *data,
+    unsigned long data,
     unsigned int len)
 {
     struct subpage_ro_range *entry;
@@ -5131,26 +5131,8 @@ static void subpage_mmio_write_emulate(
         return;
     }
 
-    addr += offset;
-    switch ( len )
-    {
-    case 1:
-        writeb(*(const uint8_t*)data, addr);
-        break;
-    case 2:
-        writew(*(const uint16_t*)data, addr);
-        break;
-    case 4:
-        writel(*(const uint32_t*)data, addr);
-        break;
-    case 8:
-        writeq(*(const uint64_t*)data, addr);
-        break;
-    default:
-        /* mmio_ro_emulated_write() already validated the size */
-        ASSERT_UNREACHABLE();
+    if ( !write_mmio(addr + offset, data, len) )
         goto write_ignored;
-    }
 }
 
 #ifdef CONFIG_HVM
@@ -5185,6 +5167,7 @@ int cf_check mmio_ro_emulated_write(
     struct x86_emulate_ctxt *ctxt)
 {
     struct mmio_ro_emulate_ctxt *mmio_ro_ctxt = ctxt->data;
+    unsigned long data = 0;
 
     /* Only allow naturally-aligned stores at the original %cr2 address. */
     if ( ((bytes | offset) & (bytes - 1)) || !bytes ||
@@ -5195,9 +5178,12 @@ int cf_check mmio_ro_emulated_write(
         return X86EMUL_UNHANDLEABLE;
     }
 
-    if ( bytes <= 8 )
+    if ( bytes <= sizeof(data) )
+    {
+        memcpy(&data, p_data, bytes);
         subpage_mmio_write_emulate(mmio_ro_ctxt->mfn, PAGE_OFFSET(offset),
-                                   p_data, bytes);
+                                   data, bytes);
+    }
     else if ( subpage_mmio_find_page(mmio_ro_ctxt->mfn) )
         gprintk(XENLOG_WARNING,
                 "unsupported %u-byte write to R/O MMIO 0x%"PRI_mfn"%03lx\n",
diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c
index 3568f2a65183..74211301ba10 100644
--- a/xen/drivers/vpci/msix.c
+++ b/xen/drivers/vpci/msix.c
@@ -17,6 +17,7 @@
  * License along with this program; If not, see .
  */
 
+#include 
 #include 
 #include 
 
@@ -338,28 +339,7 @@ static int adjacent_read(const struct domain *d, const struct vpci_msix *msix,
         return X86EMUL_OKAY;
     }
 
-    switch ( len )
-    {
-    case 1:
-        *data = readb(mem + PAGE_OFFSET(addr));
-        break;
-
-    case 2:
-        *data = readw(mem + PAGE_OFFSET(addr));
-        break;
-
-    case 4:
-        *data = readl(mem + PAGE_OFFSET(addr));
-        break;
-
-    case 8:
-        *data = readq(mem + PAGE_OFFSET(addr));
-        break;
-
-    default:
-        ASSERT_UNREACHABLE();
-        break;
-    }
+    *data = read_mmio(mem + PAGE_OFFSET(addr), len);
     spin_unlock(&vpci->lock);
 
     return X86EMUL_OKAY;
@@ -487,28 +467,7 @@ static int adjacent_write(const struct domain *d, const struct vpci_msix *msix,
         return X86EMUL_OKAY;
     }
 
-    switch ( len )
-    {
-    case 1:
-        writeb(data, mem + PAGE_OFFSET(addr));
-        break;
-
-    case 2:
-        writew(data, mem + PAGE_OFFSET(addr));
-        break;
-
-    case 4:
-        writel(data, mem + PAGE_OFFSET(addr));
-        break;
-
-    case 8:
-        writeq(data, mem + PAGE_OFFSET(addr));
-        break;
-
-    default:
-        ASSERT_UNREACHABLE();
-        break;
-    }
+    write_mmio(mem + PAGE_OFFSET(addr), data, len);
     spin_unlock(&vpci->lock);
 
     return X86EMUL_OKAY;
diff --git a/xen/include/xen/io.h b/xen/include/xen/io.h
new file mode 100644
index 000000000000..164a20c5d7b5
--- /dev/null
+++ b/xen/include/xen/io.h
@@ -0,0 +1,70 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * IO related routines.
+ *
+ * Copyright (c) 2025 Cloud Software Group
+ */
+#ifndef XEN_IO_H
+#define XEN_IO_H
+
+#include 
+
+#include 
+
+static inline unsigned long read_mmio(const volatile void __iomem *mem,
+                                      unsigned int size)
+{
+    switch ( size )
+    {
+    case 1:
+        return readb(mem);
+
+    case 2:
+        return readw(mem);
+
+    case 4:
+        return readl(mem);
+
+#ifdef CONFIG_64BIT
+    case 8:
+        return readq(mem);
+#endif
+
+    default:
+        ASSERT_UNREACHABLE();
+        return ~0UL;
+    }
+}
+
+static inline bool write_mmio(volatile void __iomem *mem, unsigned long data,
+                              unsigned int size)
+{
+    switch ( size )
+    {
+    case 1:
+        writeb(data, mem);
+        break;
+
+    case 2:
+        writew(data, mem);
+        break;
+
+    case 4:
+        writel(data, mem);
+        break;
+
+#ifdef CONFIG_64BIT
+    case 8:
+        writeq(data, mem);
+        break;
+#endif
+
+    default:
+        ASSERT_UNREACHABLE();
+        return false;
+    }
+
+    return true;
+}
+
+#endif /* XEN_IO_H */
-- 
2.48.1



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper 
Subject: [PATCH v4 2/4] x86/hvm: fix handling of accesses to partial r/o MMIO pages
Date: Tue, 29 Apr 2025 12:12:50 +0200
Message-ID: <20250429101252.50071-3-roger.pau@citrix.com>
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The current logic to handle accesses to MMIO pages partially read-only is
based on the (now removed) logic used to handle accesses to the r/o MMCFG
region(s) for PVH v1 dom0.  However that has issues when running on AMD
hardware, as in that case the guest linear address that triggered the fault
is not provided as part of the VM exit.  This caused
mmio_ro_emulated_write() to always fail before calling
subpage_mmio_write_emulate() when running on AMD and called from an HVM
context.

Take a different approach and convert the handling of partial read-only
MMIO page accesses into an HVM MMIO ops handler, as that's the more natural
way to handle this kind of emulation for HVM domains.

This allows getting rid of hvm_emulate_one_mmio() and it's single call site
in hvm_hap_nested_page_fault().  As part of the fix r/o MMIO accesses are
now handled by handle_mmio_with_translation(), re-using the same logic that
was used for other read-only types part of p2m_is_discard_write().  The
usage of emulation for faulting p2m_mmio_direct types is limited to
addresses in the r/o MMIO range. The page present check is dropped as type
p2m_mmio_direct must have the present bit set in the PTE.

Note a small adjustment is needed to the `pf-fixup` dom0 PVH logic: avoid
attempting to fixup faults resulting from write accesses to read-only MMIO
regions, as handling of those accesses is now done by handle_mmio().

Fixes: 33c19df9a5a0 ('x86/PCI: intercept accesses to RO MMIO from dom0s in HVM containers')
Signed-off-by: Roger Pau Monné 
---
Changes since v3:
 - Fix usage of addr vs gfn.
 - Fix order of checks in hvmemul_do_io().

Changes since v2:
 - Attempt to fixup read access to r/o MMIO regions for dom0 PVH.
 - Use PFN_DOWN() with get_gfn_query().
 - Reject unaligned accesses.
 - Add comment about the need to handle reads.

Changes since v1:
 - Introduce hvm/mmio.c to place the r/o MMIO handlers.
 - Add comment about pf-fixup and r/o MMIO range checking.
 - Expand commit message about dropping the PTE present check and usage of
   the emulator.
 - Return X86EMUL_OKAY in the read handler if the MMIO region is not found.
 - Check the faulting address is in the mmio_ro_ranges before sending for
   emulation.
---
 xen/arch/x86/hvm/Makefile              |   1 +
 xen/arch/x86/hvm/emulate.c             |  54 ++---------
 xen/arch/x86/hvm/hvm.c                 |  17 ++--
 xen/arch/x86/hvm/mmio.c                | 125 +++++++++++++++++++++++++
 xen/arch/x86/include/asm/hvm/emulate.h |   1 -
 xen/arch/x86/include/asm/hvm/io.h      |   3 +
 xen/arch/x86/include/asm/mm.h          |  12 +++
 xen/arch/x86/mm.c                      |  37 +-------
 8 files changed, 160 insertions(+), 90 deletions(-)
 create mode 100644 xen/arch/x86/hvm/mmio.c

diff --git a/xen/arch/x86/hvm/Makefile b/xen/arch/x86/hvm/Makefile
index 4c1fa5c6c2bf..6ec2c8f2db56 100644
--- a/xen/arch/x86/hvm/Makefile
+++ b/xen/arch/x86/hvm/Makefile
@@ -15,6 +15,7 @@ obj-y += intercept.o
 obj-y += io.o
 obj-y += ioreq.o
 obj-y += irq.o
+obj-y += mmio.o
 obj-y += monitor.o
 obj-y += mtrr.o
 obj-y += nestedhvm.o
diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c
index 79c180b408ac..91f004d23394 100644
--- a/xen/arch/x86/hvm/emulate.c
+++ b/xen/arch/x86/hvm/emulate.c
@@ -370,7 +370,15 @@ static int hvmemul_do_io(
         /* If there is no suitable backing DM, just ignore accesses */
         if ( !s )
         {
-            if ( is_mmio && is_hardware_domain(currd) )
+            if ( is_mmio && is_hardware_domain(currd) &&
+                 /*
+                  * Do not attempt to fixup write accesses to r/o MMIO regions,
+                  * they are expected to be terminated by the null handler
+                  * below.
+                  */
+                 (dir == IOREQ_READ ||
+                  !rangeset_contains_singleton(mmio_ro_ranges,
+                                               PFN_DOWN(addr))) )
             {
                 /*
                  * PVH dom0 is likely missing MMIO mappings on the p2m, due to
@@ -2859,50 +2867,6 @@ int hvm_emulate_one(
     return _hvm_emulate_one(hvmemul_ctxt, &hvm_emulate_ops, completion);
 }
 
-int hvm_emulate_one_mmio(unsigned long mfn, unsigned long gla)
-{
-    static const struct x86_emulate_ops hvm_ro_emulate_ops_mmio = {
-        .read       = x86emul_unhandleable_rw,
-        .insn_fetch = hvmemul_insn_fetch,
-        .write      = mmio_ro_emulated_write,
-        .validate   = hvmemul_validate,
-    };
-    struct mmio_ro_emulate_ctxt mmio_ro_ctxt = { .cr2 = gla, .mfn = _mfn(mfn) };
-    struct hvm_emulate_ctxt ctxt;
-    unsigned int seg, bdf;
-    int rc;
-
-    if ( pci_ro_mmcfg_decode(mfn, &seg, &bdf) )
-    {
-        /* Should be always handled by vPCI for PVH dom0. */
-        gdprintk(XENLOG_ERR, "unhandled MMCFG access for %pp\n",
-                 &PCI_SBDF(seg, bdf));
-        ASSERT_UNREACHABLE();
-        return X86EMUL_UNHANDLEABLE;
-    }
-
-    hvm_emulate_init_once(&ctxt, x86_insn_is_mem_write,
-                          guest_cpu_user_regs());
-    ctxt.ctxt.data = &mmio_ro_ctxt;
-
-    switch ( rc = _hvm_emulate_one(&ctxt, &hvm_ro_emulate_ops_mmio,
-                                   VIO_no_completion) )
-    {
-    case X86EMUL_UNHANDLEABLE:
-    case X86EMUL_UNIMPLEMENTED:
-        hvm_dump_emulation_state(XENLOG_G_WARNING, "r/o MMIO", &ctxt, rc);
-        break;
-    case X86EMUL_EXCEPTION:
-        hvm_inject_event(&ctxt.ctxt.event);
-        /* fallthrough */
-    default:
-        hvm_emulate_writeback(&ctxt);
-        break;
-    }
-
-    return rc;
-}
-
 void hvm_emulate_one_vm_event(enum emul_kind kind, unsigned int trapnr,
     unsigned int errcode)
 {
diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index 6f1174c5127e..6b998387e3d8 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -8,6 +8,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -35,7 +36,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -692,6 +692,8 @@ int hvm_domain_initialise(struct domain *d,
 
     register_portio_handler(d, XEN_HVM_DEBUGCONS_IOPORT, 1, hvm_print_line);
 
+    register_subpage_ro_handler(d);
+
     if ( hvm_tsc_scaling_supported )
         d->arch.hvm.tsc_scaling_ratio = hvm_default_tsc_scaling_ratio;
 
@@ -1981,7 +1983,10 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned long gla,
      */
     if ( (p2mt == p2m_mmio_dm) ||
          (npfec.write_access &&
-          (p2m_is_discard_write(p2mt) || (p2mt == p2m_ioreq_server))) )
+          (p2m_is_discard_write(p2mt) || (p2mt == p2m_ioreq_server) ||
+           /* MMIO entries can be r/o if the target mfn is in mmio_ro_ranges. */
+           (p2mt == p2m_mmio_direct &&
+            rangeset_contains_singleton(mmio_ro_ranges, mfn_x(mfn))))) )
     {
         if ( !handle_mmio_with_translation(gla, gfn, npfec) )
             hvm_inject_hw_exception(X86_EXC_GP, 0);
@@ -2033,14 +2038,6 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned long gla,
         goto out_put_gfn;
     }
 
-    if ( (p2mt == p2m_mmio_direct) && npfec.write_access && npfec.present &&
-         (is_hardware_domain(currd) || subpage_mmio_write_accept(mfn, gla)) &&
-         (hvm_emulate_one_mmio(mfn_x(mfn), gla) == X86EMUL_OKAY) )
-    {
-        rc = 1;
-        goto out_put_gfn;
-    }
-
     /* If we fell through, the vcpu will retry now that access restrictions have
      * been removed. It may fault again if the p2m entry type still requires so.
      * Otherwise, this is an error condition. */
diff --git a/xen/arch/x86/hvm/mmio.c b/xen/arch/x86/hvm/mmio.c
new file mode 100644
index 000000000000..32a520caac12
--- /dev/null
+++ b/xen/arch/x86/hvm/mmio.c
@@ -0,0 +1,125 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * MMIO related routines.
+ *
+ * Copyright (c) 2025 Cloud Software Group
+ */
+
+#include 
+#include 
+
+#include 
+
+static int cf_check subpage_mmio_accept(struct vcpu *v, unsigned long addr)
+{
+    p2m_type_t t;
+    mfn_t mfn = get_gfn_query_unlocked(v->domain, PFN_DOWN(addr), &t);
+
+    return !mfn_eq(mfn, INVALID_MFN) && t == p2m_mmio_direct &&
+           subpage_mmio_find_page(mfn);
+}
+
+/*
+ * The guest has read access to those regions, and consequently read accesses
+ * shouldn't fault.  However read-modify-write operations may take this path,
+ * so handling of reads is necessary.
+ */
+static int cf_check subpage_mmio_read(
+    struct vcpu *v, unsigned long addr, unsigned int len, unsigned long *data)
+{
+    struct domain *d = v->domain;
+    unsigned long gfn = PFN_DOWN(addr);
+    p2m_type_t t;
+    mfn_t mfn;
+    struct subpage_ro_range *entry;
+    volatile void __iomem *mem;
+
+    *data = ~0UL;
+
+    if ( !len || len > 8 || len & (len - 1) || !IS_ALIGNED(addr, len) )
+    {
+        gprintk(XENLOG_ERR,
+                "ignoring unaligned read to r/o MMIO subpage %#lx size %u\n",
+                addr, len);
+        return X86EMUL_OKAY;
+    }
+
+    mfn = get_gfn_query(d, gfn, &t);
+    if ( mfn_eq(mfn, INVALID_MFN) || t != p2m_mmio_direct )
+    {
+        put_gfn(d, gfn);
+        return X86EMUL_RETRY;
+    }
+
+    entry = subpage_mmio_find_page(mfn);
+    if ( !entry )
+    {
+        put_gfn(d, gfn);
+        return X86EMUL_OKAY;
+    }
+
+    mem = subpage_mmio_map_page(entry);
+    if ( !mem )
+    {
+        put_gfn(d, gfn);
+        gprintk(XENLOG_ERR,
+                "Failed to map page for MMIO read at %#lx -> %#lx\n",
+                addr, mfn_to_maddr(mfn) + PAGE_OFFSET(addr));
+        return X86EMUL_OKAY;
+    }
+
+    *data = read_mmio(mem + PAGE_OFFSET(addr), len);
+
+    put_gfn(d, gfn);
+    return X86EMUL_OKAY;
+}
+
+static int cf_check subpage_mmio_write(
+    struct vcpu *v, unsigned long addr, unsigned int len, unsigned long data)
+{
+    struct domain *d = v->domain;
+    unsigned long gfn = PFN_DOWN(addr);
+    p2m_type_t t;
+    mfn_t mfn;
+
+    if ( !len || len > 8 || len & (len - 1) || !IS_ALIGNED(addr, len) )
+    {
+        gprintk(XENLOG_ERR,
+                "ignoring unaligned write to r/o MMIO subpage %#lx size %u\n",
+                addr, len);
+        return X86EMUL_OKAY;
+    }
+
+    mfn = get_gfn_query(d, gfn, &t);
+    if ( mfn_eq(mfn, INVALID_MFN) || t != p2m_mmio_direct )
+    {
+        put_gfn(d, gfn);
+        return X86EMUL_RETRY;
+    }
+
+    subpage_mmio_write_emulate(mfn, PAGE_OFFSET(addr), data, len);
+
+    put_gfn(d, gfn);
+    return X86EMUL_OKAY;
+}
+
+void register_subpage_ro_handler(struct domain *d)
+{
+    static const struct hvm_mmio_ops subpage_mmio_ops = {
+        .check = subpage_mmio_accept,
+        .read = subpage_mmio_read,
+        .write = subpage_mmio_write,
+    };
+
+    register_mmio_handler(d, &subpage_mmio_ops);
+}
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * tab-width: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/arch/x86/include/asm/hvm/emulate.h b/xen/arch/x86/include/asm/hvm/emulate.h
index c7a2d2a5be4e..178ac32e151f 100644
--- a/xen/arch/x86/include/asm/hvm/emulate.h
+++ b/xen/arch/x86/include/asm/hvm/emulate.h
@@ -86,7 +86,6 @@ void hvmemul_cancel(struct vcpu *v);
 struct segment_register *hvmemul_get_seg_reg(
     enum x86_segment seg,
     struct hvm_emulate_ctxt *hvmemul_ctxt);
-int hvm_emulate_one_mmio(unsigned long mfn, unsigned long gla);
 
 static inline bool handle_mmio(void)
 {
diff --git a/xen/arch/x86/include/asm/hvm/io.h b/xen/arch/x86/include/asm/hvm/io.h
index 565bad300d20..c12f099a037c 100644
--- a/xen/arch/x86/include/asm/hvm/io.h
+++ b/xen/arch/x86/include/asm/hvm/io.h
@@ -135,6 +135,9 @@ void destroy_vpci_mmcfg(struct domain *d);
 /* Remove MMCFG regions from a domain ->iomem_caps. */
 int vpci_mmcfg_deny_access(struct domain *d);
 
+/* r/o MMIO subpage access handler. */
+void register_subpage_ro_handler(struct domain *d);
+
 #endif /* __ASM_X86_HVM_IO_H__ */
 
 
diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h
index a1bc8cc27451..c2e9ef6e5023 100644
--- a/xen/arch/x86/include/asm/mm.h
+++ b/xen/arch/x86/include/asm/mm.h
@@ -554,6 +554,18 @@ int cf_check mmio_ro_emulated_write(
     enum x86_segment seg, unsigned long offset, void *p_data,
     unsigned int bytes, struct x86_emulate_ctxt *ctxt);
 
+/* r/o MMIO subpage access handlers. */
+struct subpage_ro_range {
+    struct list_head list;
+    mfn_t mfn;
+    void __iomem *mapped;
+    DECLARE_BITMAP(ro_elems, PAGE_SIZE / MMIO_RO_SUBPAGE_GRAN);
+};
+struct subpage_ro_range *subpage_mmio_find_page(mfn_t mfn);
+void __iomem *subpage_mmio_map_page(struct subpage_ro_range *entry);
+void subpage_mmio_write_emulate(
+    mfn_t mfn, unsigned int offset, unsigned long data, unsigned int len);
+
 int audit_adjust_pgtables(struct domain *d, int dir, int noisy);
 
 extern int pagefault_by_memadd(unsigned long addr, struct cpu_user_regs *regs);
diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 732ca1366f33..7ead2db3cb72 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -157,13 +157,6 @@ struct rangeset *__read_mostly mmio_ro_ranges;
 static uint32_t __ro_after_init base_disallow_mask;
 
 /* Handling sub-page read-only MMIO regions */
-struct subpage_ro_range {
-    struct list_head list;
-    mfn_t mfn;
-    void __iomem *mapped;
-    DECLARE_BITMAP(ro_elems, PAGE_SIZE / MMIO_RO_SUBPAGE_GRAN);
-};
-
 static LIST_HEAD_RO_AFTER_INIT(subpage_ro_ranges);
 static DEFINE_SPINLOCK(subpage_ro_lock);
 
@@ -4929,7 +4922,7 @@ long arch_memory_op(unsigned long cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
     return rc;
 }
 
-static struct subpage_ro_range *subpage_mmio_find_page(mfn_t mfn)
+struct subpage_ro_range *subpage_mmio_find_page(mfn_t mfn)
 {
     struct subpage_ro_range *entry;
 
@@ -5074,7 +5067,7 @@ int __init subpage_mmio_ro_add(
     return rc;
 }
 
-static void __iomem *subpage_mmio_map_page(
+void __iomem *subpage_mmio_map_page(
     struct subpage_ro_range *entry)
 {
     void __iomem *mapped_page;
@@ -5099,7 +5092,7 @@ static void __iomem *subpage_mmio_map_page(
     return entry->mapped;
 }
 
-static void subpage_mmio_write_emulate(
+void subpage_mmio_write_emulate(
     mfn_t mfn,
     unsigned int offset,
     unsigned long data,
@@ -5135,30 +5128,6 @@ static void subpage_mmio_write_emulate(
         goto write_ignored;
 }
 
-#ifdef CONFIG_HVM
-bool subpage_mmio_write_accept(mfn_t mfn, unsigned long gla)
-{
-    unsigned int offset = PAGE_OFFSET(gla);
-    const struct subpage_ro_range *entry;
-
-    entry = subpage_mmio_find_page(mfn);
-    if ( !entry )
-        return false;
-
-    if ( !test_bit(offset / MMIO_RO_SUBPAGE_GRAN, entry->ro_elems) )
-    {
-        /*
-         * We don't know the write size at this point yet, so it could be
-         * an unaligned write, but accept it here anyway and deal with it
-         * later.
-         */
-        return true;
-    }
-
-    return false;
-}
-#endif
-
 int cf_check mmio_ro_emulated_write(
     enum x86_segment seg,
     unsigned long offset,
-- 
2.48.1



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper 
Subject: [PATCH v4 3/4] x86/hvm: only register the r/o subpage ops when needed
Date: Tue, 29 Apr 2025 12:12:51 +0200
Message-ID: <20250429101252.50071-4-roger.pau@citrix.com>
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MMIO operation handlers can be expensive to process, hence attempt to
register only those that will be needed by the domain.

Subpage r/o MMIO regions are added exclusively at boot, further limit their
addition to strictly before the initial domain gets created, so by the time
initial domain creation happens Xen knows whether subpage is required or
not.  This allows only registering the MMIO handler when there are
subpage regions to handle.

Signed-off-by: Roger Pau Monné 
Reviewed-by: Jan Beulich 
---
Could possibly be part of the previous patch, but strictly speaking is an
improvement, as even before the previous patch subpage r/o was always
called even when no subpage regions are registered.
---
 xen/arch/x86/hvm/hvm.c        |  3 ++-
 xen/arch/x86/include/asm/mm.h |  1 +
 xen/arch/x86/mm.c             | 16 ++++++++++++++++
 3 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index 6b998387e3d8..4cb2e13046d1 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -692,7 +692,8 @@ int hvm_domain_initialise(struct domain *d,
 
     register_portio_handler(d, XEN_HVM_DEBUGCONS_IOPORT, 1, hvm_print_line);
 
-    register_subpage_ro_handler(d);
+    if ( subpage_ro_active() )
+        register_subpage_ro_handler(d);
 
     if ( hvm_tsc_scaling_supported )
         d->arch.hvm.tsc_scaling_ratio = hvm_default_tsc_scaling_ratio;
diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h
index c2e9ef6e5023..aeb8ebcf2d56 100644
--- a/xen/arch/x86/include/asm/mm.h
+++ b/xen/arch/x86/include/asm/mm.h
@@ -561,6 +561,7 @@ struct subpage_ro_range {
     void __iomem *mapped;
     DECLARE_BITMAP(ro_elems, PAGE_SIZE / MMIO_RO_SUBPAGE_GRAN);
 };
+bool subpage_ro_active(void);
 struct subpage_ro_range *subpage_mmio_find_page(mfn_t mfn);
 void __iomem *subpage_mmio_map_page(struct subpage_ro_range *entry);
 void subpage_mmio_write_emulate(
diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 7ead2db3cb72..6697984507bf 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -4922,6 +4922,11 @@ long arch_memory_op(unsigned long cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
     return rc;
 }
 
+bool subpage_ro_active(void)
+{
+    return !list_empty(&subpage_ro_ranges);
+}
+
 struct subpage_ro_range *subpage_mmio_find_page(mfn_t mfn)
 {
     struct subpage_ro_range *entry;
@@ -5011,6 +5016,17 @@ int __init subpage_mmio_ro_add(
          !IS_ALIGNED(size, MMIO_RO_SUBPAGE_GRAN) )
         return -EINVAL;
 
+    /*
+     * Force all r/o subregions to be registered before initial domain
+     * creation, so that the emulation handlers can be added only when there
+     * are pages registered.
+     */
+    if ( system_state >= SYS_STATE_smp_boot )
+    {
+        ASSERT_UNREACHABLE();
+        return -EILSEQ;
+    }
+
     if ( !size )
         return 0;
 
-- 
2.48.1



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From: Roger Pau Monne 
To: xen-devel@lists.xenproject.org
Cc: Roger Pau Monne ,
	Jan Beulich ,
	Andrew Cooper 
Subject: [PATCH v4 4/4] x86/mm: move mmio_ro_emulated_write() to PV only file
Date: Tue, 29 Apr 2025 12:12:52 +0200
Message-ID: <20250429101252.50071-5-roger.pau@citrix.com>
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mmio_ro_emulated_write() is only used in pv/ro-page-fault.c, move the
function to that file and make it static.

No functional change intended.

Signed-off-by: Roger Pau Monné 
Reviewed-by: Jan Beulich 
---
 xen/arch/x86/include/asm/mm.h   | 12 ----------
 xen/arch/x86/mm.c               | 33 --------------------------
 xen/arch/x86/pv/ro-page-fault.c | 41 +++++++++++++++++++++++++++++++++
 3 files changed, 41 insertions(+), 45 deletions(-)

diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h
index aeb8ebcf2d56..2665daa6f74f 100644
--- a/xen/arch/x86/include/asm/mm.h
+++ b/xen/arch/x86/include/asm/mm.h
@@ -542,18 +542,6 @@ void memguard_unguard_stack(void *p);
 int subpage_mmio_ro_add(paddr_t start, size_t size);
 bool subpage_mmio_write_accept(mfn_t mfn, unsigned long gla);
 
-struct mmio_ro_emulate_ctxt {
-        unsigned long cr2;
-        /* Used only for mmcfg case */
-        unsigned int seg, bdf;
-        /* Used only for non-mmcfg case */
-        mfn_t mfn;
-};
-
-int cf_check mmio_ro_emulated_write(
-    enum x86_segment seg, unsigned long offset, void *p_data,
-    unsigned int bytes, struct x86_emulate_ctxt *ctxt);
-
 /* r/o MMIO subpage access handlers. */
 struct subpage_ro_range {
     struct list_head list;
diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 6697984507bf..9ac855f998dc 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -5144,39 +5144,6 @@ void subpage_mmio_write_emulate(
         goto write_ignored;
 }
 
-int cf_check mmio_ro_emulated_write(
-    enum x86_segment seg,
-    unsigned long offset,
-    void *p_data,
-    unsigned int bytes,
-    struct x86_emulate_ctxt *ctxt)
-{
-    struct mmio_ro_emulate_ctxt *mmio_ro_ctxt = ctxt->data;
-    unsigned long data = 0;
-
-    /* Only allow naturally-aligned stores at the original %cr2 address. */
-    if ( ((bytes | offset) & (bytes - 1)) || !bytes ||
-         offset != mmio_ro_ctxt->cr2 )
-    {
-        gdprintk(XENLOG_WARNING, "bad access (cr2=%lx, addr=%lx, bytes=%u)\n",
-                mmio_ro_ctxt->cr2, offset, bytes);
-        return X86EMUL_UNHANDLEABLE;
-    }
-
-    if ( bytes <= sizeof(data) )
-    {
-        memcpy(&data, p_data, bytes);
-        subpage_mmio_write_emulate(mmio_ro_ctxt->mfn, PAGE_OFFSET(offset),
-                                   data, bytes);
-    }
-    else if ( subpage_mmio_find_page(mmio_ro_ctxt->mfn) )
-        gprintk(XENLOG_WARNING,
-                "unsupported %u-byte write to R/O MMIO 0x%"PRI_mfn"%03lx\n",
-                bytes, mfn_x(mmio_ro_ctxt->mfn), PAGE_OFFSET(offset));
-
-    return X86EMUL_OKAY;
-}
-
 /*
  * For these PTE APIs, the caller must follow the alloc-map-unmap-free
  * lifecycle, which means explicitly mapping the PTE pages before accessing
diff --git a/xen/arch/x86/pv/ro-page-fault.c b/xen/arch/x86/pv/ro-page-fault.c
index 11b01c479e43..5ae77080772d 100644
--- a/xen/arch/x86/pv/ro-page-fault.c
+++ b/xen/arch/x86/pv/ro-page-fault.c
@@ -298,6 +298,14 @@ static int ptwr_do_page_fault(struct x86_emulate_ctxt *ctxt,
  * fault handling for read-only MMIO pages
  */
 
+struct mmio_ro_emulate_ctxt {
+    unsigned long cr2;
+    /* Used only for mmcfg case */
+    unsigned int seg, bdf;
+    /* Used only for non-mmcfg case */
+    mfn_t mfn;
+};
+
 static int cf_check mmcfg_intercept_write(
     enum x86_segment seg,
     unsigned long offset,
@@ -329,6 +337,39 @@ static int cf_check mmcfg_intercept_write(
     return X86EMUL_OKAY;
 }
 
+int cf_check mmio_ro_emulated_write(
+    enum x86_segment seg,
+    unsigned long offset,
+    void *p_data,
+    unsigned int bytes,
+    struct x86_emulate_ctxt *ctxt)
+{
+    struct mmio_ro_emulate_ctxt *mmio_ro_ctxt = ctxt->data;
+    unsigned long data = 0;
+
+    /* Only allow naturally-aligned stores at the original %cr2 address. */
+    if ( ((bytes | offset) & (bytes - 1)) || !bytes ||
+         offset != mmio_ro_ctxt->cr2 )
+    {
+        gdprintk(XENLOG_WARNING, "bad access (cr2=%lx, addr=%lx, bytes=%u)\n",
+                mmio_ro_ctxt->cr2, offset, bytes);
+        return X86EMUL_UNHANDLEABLE;
+    }
+
+    if ( bytes <= sizeof(data) )
+    {
+        memcpy(&data, p_data, bytes);
+        subpage_mmio_write_emulate(mmio_ro_ctxt->mfn, PAGE_OFFSET(offset),
+                                   data, bytes);
+    }
+    else if ( subpage_mmio_find_page(mmio_ro_ctxt->mfn) )
+        gprintk(XENLOG_WARNING,
+                "unsupported %u-byte write to R/O MMIO 0x%"PRI_mfn"%03lx\n",
+                bytes, mfn_x(mmio_ro_ctxt->mfn), PAGE_OFFSET(offset));
+
+    return X86EMUL_OKAY;
+}
+
 static const struct x86_emulate_ops mmio_ro_emulate_ops = {
     .read       = x86emul_unhandleable_rw,
     .insn_fetch = ptwr_emulated_insn_fetch,
-- 
2.48.1



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From: Jan Beulich 
Subject: preparations for 4.18.5
To: "xen-devel@lists.xenproject.org" 
Cc: Stefano Stabellini , Julien Grall
 , Kelly Choi ,
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All,

the release intended to be cut in about two weeks. Please point out backports you
find missing from the respective staging branches, but which you consider relevant.
This one I have queued already:

a88b99300aed	xen/link: Include .debug_str_offsets in DWARF2_DEBUG_SECTIONS

Note that 4.18.5 is going to be the last Xen Project coordinated ordinary bugfixing
release from the 4.18 branch; the branch will move into security-only support mode
afterwards.

Jan


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To: Roger Pau Monne 
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On 29.04.2025 12:12, Roger Pau Monne wrote:
> Several handlers have the same necessity of reading or writing from or to
> an MMIO region using 1, 2, 4 or 8 bytes accesses.  So far this has been
> open-coded in the function itself.  Instead provide a new set of handlers
> that encapsulate the accesses.
> 
> Since the added helpers are not architecture specific, introduce a new
> generic io.h header.
> 
> No functional change intended.
> 
> Signed-off-by: Roger Pau Monné 

Reviewed-by: Jan Beulich 
preferably with ...

> @@ -5185,6 +5167,7 @@ int cf_check mmio_ro_emulated_write(
>      struct x86_emulate_ctxt *ctxt)
>  {
>      struct mmio_ro_emulate_ctxt *mmio_ro_ctxt = ctxt->data;
> +    unsigned long data = 0;


... this moved ...

> @@ -5195,9 +5178,12 @@ int cf_check mmio_ro_emulated_write(
>          return X86EMUL_UNHANDLEABLE;
>      }
>  
> -    if ( bytes <= 8 )
> +    if ( bytes <= sizeof(data) )
> +    {
> +        memcpy(&data, p_data, bytes);
>          subpage_mmio_write_emulate(mmio_ro_ctxt->mfn, PAGE_OFFSET(offset),
> -                                   p_data, bytes);
> +                                   data, bytes);
> +    }

... into this more narrow scope.

Jan


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Subject: Re: [PATCH v4 2/4] x86/hvm: fix handling of accesses to partial r/o
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To: Roger Pau Monne 
Cc: Andrew Cooper , xen-devel@lists.xenproject.org
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 <20250429101252.50071-3-roger.pau@citrix.com>
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On 29.04.2025 12:12, Roger Pau Monne wrote:
> The current logic to handle accesses to MMIO pages partially read-only is
> based on the (now removed) logic used to handle accesses to the r/o MMCFG
> region(s) for PVH v1 dom0.  However that has issues when running on AMD
> hardware, as in that case the guest linear address that triggered the fault
> is not provided as part of the VM exit.  This caused
> mmio_ro_emulated_write() to always fail before calling
> subpage_mmio_write_emulate() when running on AMD and called from an HVM
> context.
> 
> Take a different approach and convert the handling of partial read-only
> MMIO page accesses into an HVM MMIO ops handler, as that's the more natural
> way to handle this kind of emulation for HVM domains.
> 
> This allows getting rid of hvm_emulate_one_mmio() and it's single call site
> in hvm_hap_nested_page_fault().  As part of the fix r/o MMIO accesses are
> now handled by handle_mmio_with_translation(), re-using the same logic that
> was used for other read-only types part of p2m_is_discard_write().  The
> usage of emulation for faulting p2m_mmio_direct types is limited to
> addresses in the r/o MMIO range. The page present check is dropped as type
> p2m_mmio_direct must have the present bit set in the PTE.
> 
> Note a small adjustment is needed to the `pf-fixup` dom0 PVH logic: avoid
> attempting to fixup faults resulting from write accesses to read-only MMIO
> regions, as handling of those accesses is now done by handle_mmio().
> 
> Fixes: 33c19df9a5a0 ('x86/PCI: intercept accesses to RO MMIO from dom0s in HVM containers')
> Signed-off-by: Roger Pau Monné 

Reviewed-by: Jan Beulich 
with two nits:

> --- /dev/null
> +++ b/xen/arch/x86/hvm/mmio.c
> @@ -0,0 +1,125 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * MMIO related routines.
> + *
> + * Copyright (c) 2025 Cloud Software Group
> + */
> +
> +#include 
> +#include 
> +
> +#include 
> +
> +static int cf_check subpage_mmio_accept(struct vcpu *v, unsigned long addr)
> +{
> +    p2m_type_t t;
> +    mfn_t mfn = get_gfn_query_unlocked(v->domain, PFN_DOWN(addr), &t);
> +
> +    return !mfn_eq(mfn, INVALID_MFN) && t == p2m_mmio_direct &&
> +           subpage_mmio_find_page(mfn);
> +}
> +
> +/*
> + * The guest has read access to those regions, and consequently read accesses
> + * shouldn't fault.  However read-modify-write operations may take this path,
> + * so handling of reads is necessary.
> + */
> +static int cf_check subpage_mmio_read(
> +    struct vcpu *v, unsigned long addr, unsigned int len, unsigned long *data)
> +{
> +    struct domain *d = v->domain;
> +    unsigned long gfn = PFN_DOWN(addr);
> +    p2m_type_t t;
> +    mfn_t mfn;
> +    struct subpage_ro_range *entry;
> +    volatile void __iomem *mem;
> +
> +    *data = ~0UL;
> +
> +    if ( !len || len > 8 || len & (len - 1) || !IS_ALIGNED(addr, len) )

The & expression wants parenthesizing against the ||s.

> +    {
> +        gprintk(XENLOG_ERR,
> +                "ignoring unaligned read to r/o MMIO subpage %#lx size %u\n",

It's not just unaligned, but also oversized or zero-size now. Maybe better
drop the word?

Both similarly applicable to the write path.

Jan


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Date: Tue, 29 Apr 2025 12:36:46 +0200
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Subject: Re: [PATCH v4 04/15] xen/cpufreq: refactor cmdline "cpufreq=xxx"
To: Penny Zheng 
Cc: ray.huang@amd.com, xen-devel@lists.xenproject.org
References: <20250414074056.3696888-1-Penny.Zheng@amd.com>
 <20250414074056.3696888-5-Penny.Zheng@amd.com>
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On 14.04.2025 09:40, Penny Zheng wrote:
> --- a/xen/drivers/cpufreq/cpufreq.c
> +++ b/xen/drivers/cpufreq/cpufreq.c
> @@ -71,6 +71,49 @@ unsigned int __initdata cpufreq_xen_cnt = 1;
>  
>  static int __init cpufreq_cmdline_parse(const char *s, const char *e);
>  
> +static bool __init cpufreq_opts_contain(enum cpufreq_xen_opt option)
> +{
> +    unsigned int count = cpufreq_xen_cnt;
> +
> +    while ( count )
> +    {
> +        if ( cpufreq_xen_opts[--count] == option )
> +            return true;
> +    }
> +
> +    return false;
> +}
> +
> +static int __init handle_cpufreq_cmdline(enum cpufreq_xen_opt option)
> +{
> +    int ret = 0;
> +
> +    if ( cpufreq_opts_contain(option) )
> +    {
> +        const char *cpufreq_opts_str[] = { "CPUFREQ_xen", "CPUFREQ_hwp" };

        const char *const __initconstrel cpufreq_opts_str[] = { "CPUFREQ_xen", "CPUFREQ_hwp" };

(line wrapped suitably, of course) Or maybe even better

        const char __initconst cpufreq_opts_str[][12] = { "CPUFREQ_xen", "CPUFREQ_hwp" };

for the string literals to also end up in .init.rodata.

However, the CPUFREQ_ prefixes want dropping, as they're an internal of the
implementation, and ...

> +
> +        printk(XENLOG_WARNING
> +               "Duplicate cpufreq driver option: %s",
> +               cpufreq_opts_str[option - 1]);

... aren't necessarily meaningful when presented this way to the user; the user
specified "xen" or "hwp", after all.

> +        return 0;
> +    }
> +
> +    cpufreq_controller = FREQCTL_xen;
> +    cpufreq_xen_opts[cpufreq_xen_cnt++] = option;
> +    switch ( option )
> +    {
> +    case CPUFREQ_hwp:
> +    case CPUFREQ_xen:
> +        xen_processor_pmbits |= XEN_PROCESSOR_PM_PX;
> +        break;
> +    default:

Blank line please between non-fall-through case blocks.

With all of the adjustments:
Reviewed-by: Jan Beulich 

Jan


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Date: Tue, 29 Apr 2025 12:46:10 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel , Julien Grall ,
	Stefano Stabellini ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH v4 1/4] xen/io: provide helpers for multi size MMIO
 accesses
Message-ID: 
References: <20250429101252.50071-1-roger.pau@citrix.com>
 <20250429101252.50071-2-roger.pau@citrix.com>
 <08d550d4-2283-4177-b812-fd87c0fa511d@suse.com>
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On Tue, Apr 29, 2025 at 12:23:05PM +0200, Jan Beulich wrote:
> On 29.04.2025 12:12, Roger Pau Monne wrote:
> > Several handlers have the same necessity of reading or writing from or to
> > an MMIO region using 1, 2, 4 or 8 bytes accesses.  So far this has been
> > open-coded in the function itself.  Instead provide a new set of handlers
> > that encapsulate the accesses.
> > 
> > Since the added helpers are not architecture specific, introduce a new
> > generic io.h header.
> > 
> > No functional change intended.
> > 
> > Signed-off-by: Roger Pau Monné 
> 
> Reviewed-by: Jan Beulich 
> preferably with ...
> 
> > @@ -5185,6 +5167,7 @@ int cf_check mmio_ro_emulated_write(
> >      struct x86_emulate_ctxt *ctxt)
> >  {
> >      struct mmio_ro_emulate_ctxt *mmio_ro_ctxt = ctxt->data;
> > +    unsigned long data = 0;
> 
> 
> ... this moved ...
> 
> > @@ -5195,9 +5178,12 @@ int cf_check mmio_ro_emulated_write(
> >          return X86EMUL_UNHANDLEABLE;
> >      }
> >  
> > -    if ( bytes <= 8 )
> > +    if ( bytes <= sizeof(data) )
> > +    {
> > +        memcpy(&data, p_data, bytes);
> >          subpage_mmio_write_emulate(mmio_ro_ctxt->mfn, PAGE_OFFSET(offset),
> > -                                   p_data, bytes);
> > +                                   data, bytes);
> > +    }
> 
> ... into this more narrow scope.

Hm, but if I move it I can no longer use sizeof(data) in the condition
check, that's why data is defined in the outside.

Let me know if you are OK with this.

Thanks, Roger.


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Date: Tue, 29 Apr 2025 12:47:58 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: Andrew Cooper ,
	xen-devel@lists.xenproject.org
Subject: Re: [PATCH v4 2/4] x86/hvm: fix handling of accesses to partial r/o
 MMIO pages
Message-ID: 
References: <20250429101252.50071-1-roger.pau@citrix.com>
 <20250429101252.50071-3-roger.pau@citrix.com>
 <42b052b7-535b-4697-86d1-bae857f6ccad@suse.com>
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On Tue, Apr 29, 2025 at 12:29:08PM +0200, Jan Beulich wrote:
> On 29.04.2025 12:12, Roger Pau Monne wrote:
> > The current logic to handle accesses to MMIO pages partially read-only is
> > based on the (now removed) logic used to handle accesses to the r/o MMCFG
> > region(s) for PVH v1 dom0.  However that has issues when running on AMD
> > hardware, as in that case the guest linear address that triggered the fault
> > is not provided as part of the VM exit.  This caused
> > mmio_ro_emulated_write() to always fail before calling
> > subpage_mmio_write_emulate() when running on AMD and called from an HVM
> > context.
> > 
> > Take a different approach and convert the handling of partial read-only
> > MMIO page accesses into an HVM MMIO ops handler, as that's the more natural
> > way to handle this kind of emulation for HVM domains.
> > 
> > This allows getting rid of hvm_emulate_one_mmio() and it's single call site
> > in hvm_hap_nested_page_fault().  As part of the fix r/o MMIO accesses are
> > now handled by handle_mmio_with_translation(), re-using the same logic that
> > was used for other read-only types part of p2m_is_discard_write().  The
> > usage of emulation for faulting p2m_mmio_direct types is limited to
> > addresses in the r/o MMIO range. The page present check is dropped as type
> > p2m_mmio_direct must have the present bit set in the PTE.
> > 
> > Note a small adjustment is needed to the `pf-fixup` dom0 PVH logic: avoid
> > attempting to fixup faults resulting from write accesses to read-only MMIO
> > regions, as handling of those accesses is now done by handle_mmio().
> > 
> > Fixes: 33c19df9a5a0 ('x86/PCI: intercept accesses to RO MMIO from dom0s in HVM containers')
> > Signed-off-by: Roger Pau Monné 
> 
> Reviewed-by: Jan Beulich 
> with two nits:
> 
> > --- /dev/null
> > +++ b/xen/arch/x86/hvm/mmio.c
> > @@ -0,0 +1,125 @@
> > +/* SPDX-License-Identifier: GPL-2.0-only */
> > +/*
> > + * MMIO related routines.
> > + *
> > + * Copyright (c) 2025 Cloud Software Group
> > + */
> > +
> > +#include 
> > +#include 
> > +
> > +#include 
> > +
> > +static int cf_check subpage_mmio_accept(struct vcpu *v, unsigned long addr)
> > +{
> > +    p2m_type_t t;
> > +    mfn_t mfn = get_gfn_query_unlocked(v->domain, PFN_DOWN(addr), &t);
> > +
> > +    return !mfn_eq(mfn, INVALID_MFN) && t == p2m_mmio_direct &&
> > +           subpage_mmio_find_page(mfn);
> > +}
> > +
> > +/*
> > + * The guest has read access to those regions, and consequently read accesses
> > + * shouldn't fault.  However read-modify-write operations may take this path,
> > + * so handling of reads is necessary.
> > + */
> > +static int cf_check subpage_mmio_read(
> > +    struct vcpu *v, unsigned long addr, unsigned int len, unsigned long *data)
> > +{
> > +    struct domain *d = v->domain;
> > +    unsigned long gfn = PFN_DOWN(addr);
> > +    p2m_type_t t;
> > +    mfn_t mfn;
> > +    struct subpage_ro_range *entry;
> > +    volatile void __iomem *mem;
> > +
> > +    *data = ~0UL;
> > +
> > +    if ( !len || len > 8 || len & (len - 1) || !IS_ALIGNED(addr, len) )
> 
> The & expression wants parenthesizing against the ||s.
> 
> > +    {
> > +        gprintk(XENLOG_ERR,
> > +                "ignoring unaligned read to r/o MMIO subpage %#lx size %u\n",
> 
> It's not just unaligned, but also oversized or zero-size now. Maybe better
> drop the word?
> 
> Both similarly applicable to the write path.

Hm, yes, I've failed to update this when expanding the checks, thanks
for noticing.  I agree that dropping "unaligned" seems like the best
option.

Thanks, Roger.


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Date: Tue, 29 Apr 2025 11:48:14 +0100
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On Tue Apr 29, 2025 at 9:28 AM BST, Jan Beulich wrote:
> On 28.04.2025 21:57, Ariadne Conill wrote:
>> Previously Xen placed the hypercall page at the highest possible MFN,
>> but this caused problems on systems where there is more than 36 bits
>> of physical address space.
>
> Hmm, I should have asked already on the earlier version: What kinds of
> problems are these, beyond ...
>
>> In general, it also seems unreliable to assume that the highest possible
>> MFN is not already reserved for some other purpose.
>
> ... this particular aspect? I find it puzzling that such problems would
> depend on the number of physical address bits.
>
> Jan

Pagefault on access (due to reserved bits being set) on access to the
hypercall page. The available guest-physical address space doesn't seem
to be as wide as advertised, though I didn't carry enough tests to
single this as the only explanation. Seeing how we don't really know
what's already on the last mfn this seems like a strict improvement
irrespective of the actual cause of the fault.

Cheers,
Alejandro


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From: Juergen Gross 
To: xen-devel@lists.xenproject.org
Cc: Juergen Gross ,
	Anthony PERARD ,
	Andrew Cooper ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Oleksii Kurochko ,
	Community Manager ,
	Samuel Thibault 
Subject: [PATCH v3 0/4] remove qemu-traditional
Date: Tue, 29 Apr 2025 13:06:30 +0200
Message-ID: <20250429110636.30518-1-jgross@suse.com>
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Remove the qemu-traditional support. This includes the Mini-OS
based ioemu-stubdom.

Don't remove ROMBIOS for now, as it can be used with qemu (XenServer
is doing that).

After adding the series a run of autoconf should be done.

Changes in V2:
- addressed comments

Changes in V3:
- patches 1 and 5 of V2 have been applied already
- addressed comments

Juergen Gross (4):
  docs: remove qemu-traditional support from documentation
  tools: remove support for running a guest with qemu-traditional
  tools: remove qemu-traditional
  build: don't require full tools build for building stubdoms

 .gitignore                                    |   3 -
 CHANGELOG.md                                  |   1 +
 Config.mk                                     |  38 --
 INSTALL                                       |  13 -
 MAINTAINERS                                   |   4 -
 Makefile                                      |   2 +-
 README                                        |   2 +-
 SUPPORT.md                                    |  16 -
 config/Paths.mk.in                            |   3 +-
 config/Tools.mk.in                            |   1 -
 docs/man/xl-pci-configuration.5.pod           |   4 +-
 docs/man/xl.cfg.5.pod.in                      |  49 +--
 docs/misc/stubdom.txt                         |  52 ---
 docs/misc/xenstore-paths.pandoc               |   3 +-
 docs/process/branching-checklist.txt          |   4 -
 docs/process/release-technician-checklist.txt |   3 -
 docs/process/xen-release-management.pandoc    |   2 +-
 stubdom/.gitignore                            |   3 -
 stubdom/Makefile                              |  97 +-----
 stubdom/configure                             |  89 -----
 stubdom/configure.ac                          |  15 -
 stubdom/ioemu-minios.cfg                      |   6 -
 tools/Makefile                                |  58 ----
 tools/Rules.mk                                |   3 -
 tools/config.h.in                             |   3 -
 tools/configure                               |  42 +--
 tools/configure.ac                            |  21 +-
 tools/firmware/hvmloader/Makefile             |   3 +-
 tools/firmware/hvmloader/pci.c                |  17 +-
 tools/firmware/hvmloader/util.c               |   9 +-
 tools/libacpi/mk_dsdt.c                       | 183 +++-------
 tools/libs/light/libxl_create.c               |  78 +----
 tools/libs/light/libxl_device.c               |  19 -
 tools/libs/light/libxl_disk.c                 |   7 -
 tools/libs/light/libxl_dm.c                   | 327 +-----------------
 tools/libs/light/libxl_dom.c                  |  10 -
 tools/libs/light/libxl_dom_save.c             | 140 --------
 tools/libs/light/libxl_dom_suspend.c          |  65 ----
 tools/libs/light/libxl_domain.c               |  15 -
 tools/libs/light/libxl_exec.c                 |  75 ----
 tools/libs/light/libxl_internal.c             |   6 +-
 tools/libs/light/libxl_internal.h             |  68 +---
 tools/libs/light/libxl_pci.c                  | 183 ----------
 tools/libs/light/libxl_sr_stream_format.h     |   2 +-
 tools/libs/light/libxl_stream_write.c         |   4 -
 tools/libs/light/libxl_types.idl              |   2 +-
 tools/python/xen/migration/libxl.py           |   2 -
 tools/xl/xl_parse.c                           |   5 +-
 48 files changed, 103 insertions(+), 1654 deletions(-)
 delete mode 100644 stubdom/ioemu-minios.cfg

-- 
2.43.0



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From: Juergen Gross 
To: xen-devel@lists.xenproject.org
Cc: Juergen Gross ,
	Anthony PERARD ,
	Andrew Cooper ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v3 1/4] docs: remove qemu-traditional support from documentation
Date: Tue, 29 Apr 2025 13:06:31 +0200
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In preparation to no longer support qemu-traditional (including
qemu-stubdom), remove it from documentation.

Signed-off-by: Juergen Gross 
---
V2:
- mention "qemu_xen_traditional" in xenstore-paths.pandoc as a removed
  device model variant (Andrew Cooper)
- don't drop Config.mk related documentation for QEMU_TRADITIONAL_REVISION
  (Jan Beulich)
V3:
- drop another opengl reference (Anthony Perard)
- drop 2 superfluous sentences for gfx_passthru (Anthony Perard)
- reword a bios_path_override note (Anthony Perard)
---
 docs/man/xl-pci-configuration.5.pod           |  4 +-
 docs/man/xl.cfg.5.pod.in                      | 49 +++--------------
 docs/misc/stubdom.txt                         | 52 -------------------
 docs/misc/xenstore-paths.pandoc               |  3 +-
 docs/process/branching-checklist.txt          |  3 --
 docs/process/release-technician-checklist.txt |  2 -
 docs/process/xen-release-management.pandoc    |  2 +-
 7 files changed, 13 insertions(+), 102 deletions(-)

diff --git a/docs/man/xl-pci-configuration.5.pod b/docs/man/xl-pci-configuration.5.pod
index ec76f590b7..0691f06ad3 100644
--- a/docs/man/xl-pci-configuration.5.pod
+++ b/docs/man/xl-pci-configuration.5.pod
@@ -111,8 +111,8 @@ if this parameter is not specified.
 =item Description
 
 By default pciback only allows PV guests to write "known safe" values
-into PCI configuration space, likewise QEMU (both qemu-xen and
-qemu-xen-traditional) imposes the same constraint on HVM guests.
+into PCI configuration space, likewise QEMU imposes the same constraint
+on HVM guests.
 However, many devices require writes to other areas of the configuration space
 in order to operate properly.  This option tells the backend (pciback or QEMU)
 to allow all writes to the PCI configuration space of this device by this
diff --git a/docs/man/xl.cfg.5.pod.in b/docs/man/xl.cfg.5.pod.in
index 7339c44efd..c388899306 100644
--- a/docs/man/xl.cfg.5.pod.in
+++ b/docs/man/xl.cfg.5.pod.in
@@ -841,7 +841,7 @@ This option does not control the emulated graphics card presented to
 an HVM guest. See B below for how to
 configure the emulated device. If B options
 are used in a PV guest configuration, B will pick up B, B,
-B, B, B, B, B and
+B, B, B, B and
 B to construct the paravirtual framebuffer device for the guest.
 
 Each B is a comma-separated list of C
@@ -895,12 +895,6 @@ is used.
 Specifies the path to the X authority file that should be used to
 connect to the X server when the B option is used.
 
-=item B
-
-Enable OpenGL acceleration of the SDL display. Only effects machines
-using B and only if the
-device-model was compiled with OpenGL support. The default is 0 (disabled).
-
 =item B
 
 Configure the keymap to use for the keyboard associated with this
@@ -1215,17 +1209,11 @@ working graphics passthrough. See the XenVGAPassthroughTestedAdapters
 L wiki page
 for graphics cards currently supported by B.
 
-B is currently supported both with the qemu-xen-traditional
-device-model and upstream qemu-xen device-model.
-
 When given as a boolean the B option either disables graphics
 card passthrough or enables autodetection.
 
 When given as a string the B option describes the type
-of device to enable. Note that this behavior is only supported with the
-upstream qemu-xen device-model. With qemu-xen-traditional IGD (Intel Graphics
-Device) is always assumed and options other than autodetect or explicit IGD
-will result in an error.
+of device to enable.
 
 Currently, valid values for the option are:
 
@@ -1903,10 +1891,7 @@ it may be useful to request a different one, like UEFI.
 
 =item B
 
-Loads ROMBIOS, a 16-bit x86 compatible BIOS. This is used by default
-when B. This is the only BIOS
-option supported when B. This is
-the BIOS used by all previous Xen versions.
+Loads ROMBIOS, a 16-bit x86 compatible BIOS.
 
 =item B
 
@@ -1926,8 +1911,7 @@ Override the path to the blob to be used as BIOS. The blob provided here MUST
 be consistent with the B which you have specified. You should not
 normally need to specify this option.
 
-This option does not have any effect if using B or
-B.
+Requires B.
 
 =item B
 
@@ -2516,15 +2500,10 @@ Sets the amount of RAM which the emulated video card will contain,
 which in turn limits the resolutions and bit depths which will be
 available.
 
-When using the qemu-xen-traditional device-model, the default as well as
-minimum amount of video RAM for stdvga is 8 MB, which is sufficient for e.g.
-1600x1200 at 32bpp. For the upstream qemu-xen device-model, the default and
-minimum is 16 MB.
+When using stdvga, the default and minimum is 16 MB.
 
-When using the emulated Cirrus graphics card (B) and the
-qemu-xen-traditional device-model, the amount of video RAM is fixed at 4 MB,
-which is sufficient for 1024x768 at 32 bpp. For the upstream qemu-xen
-device-model, the default and minimum is 8 MB.
+When using the emulated Cirrus graphics card (B), the
+default and minimum is 8 MB.
 
 For QXL vga, both the default and minimal are 128MB.
 If B is set less than 128MB, an error will be triggered.
@@ -2590,12 +2569,6 @@ B manpage. The default is B.
 Specifies that the display should be presented via an X window (using
 Simple DirectMedia Layer). The default is (0) not enabled.
 
-=item B
-
-Enable OpenGL acceleration of the SDL display. Only effects machines
-using B and only if the
-device-model was compiled with OpenGL support. Default is (0) false.
-
 =item B
 
 Enable or disable the virtual graphics device.  The default is to
@@ -2925,11 +2898,6 @@ Valid values are:
 Use the device-model merged into the upstream QEMU project.
 This device-model is the default for Linux dom0.
 
-=item B
-
-Use the device-model based upon the historical Xen fork of QEMU.
-This device-model is still the default for NetBSD dom0.
-
 =back
 
 It is recommended to accept the default value for new guests.  If
@@ -2949,8 +2917,7 @@ to specify this option.
 Override the path to the kernel image used as device-model stubdomain.
 The binary provided here MUST be consistent with the
 B which you have specified.
-In case of B it is expected to be MiniOS-based stubdomain
-image, in case of B it is expected to be Linux-based stubdomain
+In case of B it is expected to be Linux-based stubdomain
 kernel.
 
 =item B
diff --git a/docs/misc/stubdom.txt b/docs/misc/stubdom.txt
index 64c220db20..cfcba4ba96 100644
--- a/docs/misc/stubdom.txt
+++ b/docs/misc/stubdom.txt
@@ -23,58 +23,6 @@ and https://wiki.xen.org/wiki/Device_Model_Stub_Domains for more
 information on device model stub domains
 
 
-Toolstack to MiniOS ioemu stubdomain protocol
----------------------------------------------
-
-This section describe communication protocol between toolstack and
-qemu-traditional running in MiniOS stubdomain. The protocol include
-expectations of both qemu and stubdomain itself.
-
-Setup (done by toolstack, expected by stubdomain):
- - Block devices for target domain are connected as PV disks to stubdomain,
-   according to configuration order, starting with xvda
- - Network devices for target domain are connected as PV nics to stubdomain,
-   according to configuration order, starting with 0
- - if graphics output is expected, VFB and VKB devices are set for stubdomain
-   (its backend is responsible for exposing them using appropriate protocol
-   like VNC or Spice)
- - other target domain's devices are not connected at this point to stubdomain
-   (may be hot-plugged later)
- - QEMU command line (space separated arguments) is stored in
-   /vm//image/dmargs xenstore path
- - target domain id is stored in /local/domain//target xenstore path
-?? - bios type is stored in /local/domain//hvmloader/bios
- - stubdomain's console 0 is connected to qemu log file
- - stubdomain's console 1 is connected to qemu save file (for saving state)
- - stubdomain's console 2 is connected to qemu save file (for restoring state)
- - next consoles are connected according to target guest's serial console configuration
-
-Startup:
-1. PV stubdomain is started with ioemu-stubdom.gz kernel and no initrd
-2. stubdomain initialize relevant devices
-3. stubdomain signal readiness by writing "running" to /local/domain//device-model//state xenstore path
-4. now stubdomain is considered running
-
-Runtime control (hotplug etc):
-Toolstack can issue command through xenstore. The sequence is (from toolstack POV):
-1. Write parameter to /local/domain//device-model//parameter.
-2. Write command to /local/domain//device-model//command.
-3. Wait for command result in /local/domain//device-model//state (command specific value).
-4. Write "running" back to /local/domain//device-model//state.
-
-Defined commands:
- - "pci-ins" - PCI hot plug, results:
-   - "pci-inserted" - success
-   - "pci-insert-failed" - failure
- - "pci-rem" - PCI hot remove, results:
-   - "pci-removed" - success
-   - ??
- - "save" - save domain state to console 1, results:
-   - "paused" - success
- - "continue" - resume domain execution, after loading state from console 2 (require -loadvm command argument), results:
-   - "running" - success
-
-
 Toolstack to Linux ioemu stubdomain protocol
 --------------------------------------------
 
diff --git a/docs/misc/xenstore-paths.pandoc b/docs/misc/xenstore-paths.pandoc
index a604f6b1c6..01a340fafc 100644
--- a/docs/misc/xenstore-paths.pandoc
+++ b/docs/misc/xenstore-paths.pandoc
@@ -636,7 +636,8 @@ Trustworthy copy of /local/domain/$DOMID/backend/$KIND/$DEVID/$NODE.
 
 #### /libxl/$DOMID/dm-version ("qemu_xen"|"qemu_xen_traditional") = [n,INTERNAL]
 
-The device model version for a domain.
+The device model version for a domain. Note that "qemu_xen_traditional" is
+a device model variant which has been removed from Xen.
 
 #### /libxl/$DOMID/remus/netbuf/$DEVID/ifb = STRING [n,INTERNAL]
 
diff --git a/docs/process/branching-checklist.txt b/docs/process/branching-checklist.txt
index 3dfa8ec257..aa7a27eed5 100644
--- a/docs/process/branching-checklist.txt
+++ b/docs/process/branching-checklist.txt
@@ -14,8 +14,6 @@ ov=4.0
     cd ~/git/qemu-xen.git
     git branch staging-$v staging
     git branch stable-$v master
-    cd ~/git/qemu-xen-traditional.git
-    git branch stable-$v master
 
 # make branch in libvirt
     ssh xen@xenbits.xen.org
@@ -63,7 +61,6 @@ ov=4.0
     cp xen--staging.patchbot-reported-heads xen--staging-$v.patchbot-reported-heads
     cp qemu-xen--master.patchbot-reported-heads  qemu-xen--stable-$v.patchbot-reported-heads
     cp qemu-xen--staging.patchbot-reported-heads  qemu-xen--staging-$v.patchbot-reported-heads
-    cp qemu-xen-traditional--master.patchbot-reported-heads qemu-xen-traditional--stable-$v.patchbot-reported-heads
 
     #emacs versions
     perl -i~ -pe 'next unless m/\b\Q'$ov'\E\b/; $x=$_; $x=~ s/\b\Q'$ov'\E\b/'$v'/g; print $x;' versions
diff --git a/docs/process/release-technician-checklist.txt b/docs/process/release-technician-checklist.txt
index 7bbe7c1489..829e8ec47b 100644
--- a/docs/process/release-technician-checklist.txt
+++ b/docs/process/release-technician-checklist.txt
@@ -32,8 +32,6 @@ t=RELEASE-$r
   git show # should show appropriate intended commit
   git-tag -u 'Xen.org Xen tree code signing' -m "Xen $v" xen-$v
 
-  git-push xenbits.xen.org:/home/xen/git/qemu-xen-traditional.git $s:stable-$x xen-$v
-
 # consider making tag in minios, and updating xen.git Config.mk
   git checkout SOMETHING
   git show # should show appropriate intended commit
diff --git a/docs/process/xen-release-management.pandoc b/docs/process/xen-release-management.pandoc
index 7826419dad..5da18f6da1 100644
--- a/docs/process/xen-release-management.pandoc
+++ b/docs/process/xen-release-management.pandoc
@@ -193,7 +193,7 @@ from the last RC:
 
 1. Send out commit moratorium emails to committers@.
 
-2. Check all the trees (mini-os, qemu-trad, qemu-xen, seabios, ovmf etc).
+2. Check all the trees (mini-os, qemu-xen, seabios, ovmf etc).
 They have the correct commits and all security patches applied. There will be
 tools provided.
 
-- 
2.43.0



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From: Juergen Gross 
To: xen-devel@lists.xenproject.org
Cc: Juergen Gross ,
	Jan Beulich ,
	Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Anthony PERARD ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= 
Subject: [PATCH v3 2/4] tools: remove support for running a guest with qemu-traditional
Date: Tue, 29 Apr 2025 13:06:32 +0200
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Remove the code in tools for running a guest with qemu-traditional.
This covers xl, libxl, libacpi, hvmloader and the related python and
go bindings.

Signed-off-by: Juergen Gross 
---
V2:
- Keep most of the removed comment in hvmloader, while removing parts
  of another one (Jan Beulich)
V3:
- keep the default of allow_memory_relocate = 1; (Anthony Perard)
- expand a comment in hvmloader's pci_setup() (Anthony Perard)
- don't build in dsdt_anycpu and dsdt_15cpu if not needed (Anthony Perard)
- make --dm_version a mandatory mk_dsdt parameter (Anthony Perard)
- simplify code in libxl__domain_build_info_setdefault() (Anthony Perard)
- make comments in libxl_dm.c more clear (Anthony Perard)
- remove some more no longer used libxl functions (Anthony Perard)
- keep QEMU_XEN_TRADITIONAL define (Anthony Perard)

Signed-off-by: Juergen Gross 
---
 tools/firmware/hvmloader/Makefile         |   3 +-
 tools/firmware/hvmloader/pci.c            |  17 +-
 tools/firmware/hvmloader/util.c           |   9 +-
 tools/libacpi/mk_dsdt.c                   | 183 +++---------
 tools/libs/light/libxl_create.c           |  78 +-----
 tools/libs/light/libxl_device.c           |  19 --
 tools/libs/light/libxl_disk.c             |   7 -
 tools/libs/light/libxl_dm.c               | 327 +---------------------
 tools/libs/light/libxl_dom.c              |  10 -
 tools/libs/light/libxl_dom_save.c         | 140 ---------
 tools/libs/light/libxl_dom_suspend.c      |  65 -----
 tools/libs/light/libxl_domain.c           |  15 -
 tools/libs/light/libxl_exec.c             |  75 -----
 tools/libs/light/libxl_internal.c         |   6 +-
 tools/libs/light/libxl_internal.h         |  68 +----
 tools/libs/light/libxl_pci.c              | 183 ------------
 tools/libs/light/libxl_sr_stream_format.h |   2 +-
 tools/libs/light/libxl_stream_write.c     |   4 -
 tools/libs/light/libxl_types.idl          |   2 +-
 tools/python/xen/migration/libxl.py       |   2 -
 tools/xl/xl_parse.c                       |   5 +-
 21 files changed, 74 insertions(+), 1146 deletions(-)

diff --git a/tools/firmware/hvmloader/Makefile b/tools/firmware/hvmloader/Makefile
index cc5dc00498..c94c439277 100644
--- a/tools/firmware/hvmloader/Makefile
+++ b/tools/firmware/hvmloader/Makefile
@@ -59,6 +59,7 @@ OBJS += optionroms.o 32bitbios_support.o rombios.o
 CFLAGS += -DENABLE_ROMBIOS
 ROMBIOS_ROM := $(ROMBIOS_DIR)/BIOS-bochs-latest
 ROMS += $(ROMBIOS_ROM) $(STDVGA_ROM) $(CIRRUSVGA_ROM)
+DSDT_FILES = dsdt_anycpu.c dsdt_15cpu.c
 endif
 
 # Suppress the warning about LOAD segments with RWX permissions, as what we
@@ -76,7 +77,7 @@ rombios.o: roms.inc
 smbios.o: CFLAGS += -D__SMBIOS_DATE__="\"$(SMBIOS_REL_DATE)\""
 
 ACPI_PATH = ../../libacpi
-DSDT_FILES = dsdt_anycpu.c dsdt_15cpu.c dsdt_anycpu_qemu_xen.c
+DSDT_FILES += dsdt_anycpu_qemu_xen.c
 ACPI_OBJS = $(patsubst %.c,%.o,$(DSDT_FILES)) build.o static_tables.o
 $(ACPI_OBJS): CFLAGS += -iquote . -DLIBACPI_STDUTILS=\"$(CURDIR)/util.h\"
 CFLAGS += -I$(ACPI_PATH)
diff --git a/tools/firmware/hvmloader/pci.c b/tools/firmware/hvmloader/pci.c
index c3c61ca060..cc67b18c03 100644
--- a/tools/firmware/hvmloader/pci.c
+++ b/tools/firmware/hvmloader/pci.c
@@ -113,17 +113,7 @@ void pci_setup(void)
      * increase the size of the lowmem MMIO hole?  Defaulting to 1
      * here will mean that non-libxl toolstacks (including xend and
      * home-grown ones) means that those using qemu-xen will still
-     * experience the memory relocation bug described below; but it
-     * also means that those using qemu-traditional will *not*
-     * experience any change; and it also means that there is a
-     * work-around for those using qemu-xen, namely switching to
-     * qemu-traditional.
-     *
-     * If we defaulted to 0, and failing to resize the hole caused any
-     * problems with qemu-traditional, then there is no work-around.
-     *
-     * Since xend can only use qemu-traditional, I think this is the
-     * option that will have the least impact.
+     * experience the memory relocation bug described below.
      */
     bool allow_memory_relocate = 1;
 
@@ -347,9 +337,8 @@ void pci_setup(void)
     {
         /*
          * At the moment qemu-xen can't deal with relocated memory regions.
-         * It's too close to the release to make a proper fix; for now,
-         * only allow the MMIO hole to grow large enough to move guest memory
-         * if we're running qemu-traditional.  Items that don't fit will be
+         * Only allow the MMIO hole to grow large enough to move guest memory
+         * if allow_memory_relocate is true.  Items that don't fit will be
          * relocated into the 64-bit address space.
          *
          * This loop now does the following:
diff --git a/tools/firmware/hvmloader/util.c b/tools/firmware/hvmloader/util.c
index 2d07ce1290..79c0e6bd4a 100644
--- a/tools/firmware/hvmloader/util.c
+++ b/tools/firmware/hvmloader/util.c
@@ -843,14 +843,7 @@ void hvmloader_acpi_build_tables(struct acpi_config *config,
 
     /* If the device model is specified switch to the corresponding tables */
     s = xenstore_read("platform/device-model", "");
-    if ( !strncmp(s, "qemu_xen_traditional", 21) )
-    {
-        config->dsdt_anycpu = dsdt_anycpu;
-        config->dsdt_anycpu_len = dsdt_anycpu_len;
-        config->dsdt_15cpu = dsdt_15cpu;
-        config->dsdt_15cpu_len = dsdt_15cpu_len;
-    }
-    else if ( !strncmp(s, "qemu_xen", 9) )
+    if ( !strncmp(s, "qemu_xen", 9) )
     {
         config->dsdt_anycpu = dsdt_anycpu_qemu_xen;
         config->dsdt_anycpu_len = dsdt_anycpu_qemu_xen_len;
diff --git a/tools/libacpi/mk_dsdt.c b/tools/libacpi/mk_dsdt.c
index 34f6753f61..227b5ceafb 100644
--- a/tools/libacpi/mk_dsdt.c
+++ b/tools/libacpi/mk_dsdt.c
@@ -19,8 +19,8 @@ static bool debug = false;
 
 typedef enum dm_version {
     QEMU_NONE,
-    QEMU_XEN_TRADITIONAL,
     QEMU_XEN,
+    QEMU_INVALID
 } dm_version;
 
 static void indent(void)
@@ -68,30 +68,6 @@ static void pop_block(void)
     printf("}\n");
 }
 
-#ifdef CONFIG_X86
-static void pci_hotplug_notify(unsigned int slt)
-{
-    stmt("Notify", "\\_SB.PCI0.S%02X, EVT", slt);
-}
-
-static void decision_tree(
-    unsigned int s, unsigned int e, char *var, void (*leaf)(unsigned int))
-{
-    if ( s == (e-1) )
-    {
-        (*leaf)(s);
-        return;
-    }
-
-    push_block("If", "And(%s, 0x%02x)", var, (e-s)/2);
-    decision_tree((s+e)/2, e, var, leaf);
-    pop_block();
-    push_block("Else", NULL);
-    decision_tree(s, (s+e)/2, var, leaf);
-    pop_block();
-}
-#endif
-
 static struct option options[] = {
     { "maxcpu", 1, 0, 'c' },
 #ifdef CONFIG_X86
@@ -105,7 +81,7 @@ int main(int argc, char **argv)
 {
     unsigned int cpu, max_cpus;
 #if defined(CONFIG_X86)
-    dm_version dm_version = QEMU_XEN_TRADITIONAL;
+    dm_version dm_version = QEMU_INVALID;
     unsigned int slot, dev, intx, link;
 
     max_cpus = HVM_MAX_VCPUS;
@@ -141,8 +117,6 @@ int main(int argc, char **argv)
         case 'q':
             if (strcmp(optarg, "qemu-xen") == 0) {
                 dm_version = QEMU_XEN;
-            } else if (strcmp(optarg, "qemu-xen-traditional") == 0) {
-                dm_version = QEMU_XEN_TRADITIONAL;
             } else if (strcmp(optarg, "none") == 0) {
                 dm_version = QEMU_NONE;
             } else {
@@ -160,6 +134,11 @@ int main(int argc, char **argv)
         }
     }
 
+    if (dm_version == QEMU_INVALID) {
+        fprintf(stderr, "--dm_version is a mandatory parameter.\n");
+        return -1;
+    }
+
     /**** DSDT DefinitionBlock start ****/
     /* (we append to existing DSDT definition block) */
     indent_level++;
@@ -278,9 +257,7 @@ int main(int argc, char **argv)
 
     /* Define GPE control method. */
     push_block("Scope", "\\_GPE");
-    push_block("Method",
-               dm_version == QEMU_XEN_TRADITIONAL ? "_L%02d" : "_E%02d",
-               XEN_ACPI_GPE0_CPUHP_BIT);
+    push_block("Method", "_E%02d", XEN_ACPI_GPE0_CPUHP_BIT);
     stmt("\\_SB.PRSC ()", NULL);
     pop_block();
     pop_block();
@@ -302,17 +279,10 @@ int main(int argc, char **argv)
      */
     push_block("Device", "HP0"); {
         stmt("Name", "_HID, EISAID(\"PNP0C02\")");
-        if (dm_version == QEMU_XEN_TRADITIONAL) {
-            stmt("Name", "_CRS, ResourceTemplate() {"
-                 "  IO (Decode16, 0x10c0, 0x10c0, 0x00, 0x82)"
-                 "  IO (Decode16, 0xb044, 0xb044, 0x00, 0x04)"
-                 "}");
-        } else {
-            stmt("Name", "_CRS, ResourceTemplate() {"
-                 "  IO (Decode16, 0xae00, 0xae00, 0x00, 0x10)"
-                 "  IO (Decode16, 0xb044, 0xb044, 0x00, 0x04)"
-                 "}");
-        }
+        stmt("Name", "_CRS, ResourceTemplate() {"
+             "  IO (Decode16, 0xae00, 0xae00, 0x00, 0x10)"
+             "  IO (Decode16, 0xb044, 0xb044, 0x00, 0x04)"
+             "}");
     } pop_block();
 
     /*** PCI-ISA link definitions ***/
@@ -397,60 +367,27 @@ int main(int argc, char **argv)
      * QEMU provides a simple hotplug controller with some I/O to handle
      * the hotplug action and status, which is beyond the ACPI scope.
      */
-    if (dm_version == QEMU_XEN_TRADITIONAL) {
-        for ( slot = 0; slot < 0x100; slot++ )
-        {
-            push_block("Device", "S%02X", slot);
-            /* _ADR == dev:fn (16:16) */
-            stmt("Name", "_ADR, 0x%08x", ((slot & ~7) << 13) | (slot & 7));
-            /* _SUN == dev */
-            stmt("Name", "_SUN, 0x%08x", slot >> 3);
-            push_block("Method", "_EJ0, 1");
-            if (debug)
-            {
-                stmt("Store", "0x%02x, \\_GPE.DPT1", slot);
-                stmt("Store", "0x88, \\_GPE.DPT2");
-            }
-            stmt("Store", "0x%02x, \\_GPE.PH%02X", /* eject */
-                 (slot & 1) ? 0x10 : 0x01, slot & ~1);
-            pop_block();
-            push_block("Method", "_STA, 0");
-            if (debug)
-            {
-                stmt("Store", "0x%02x, \\_GPE.DPT1", slot);
-                stmt("Store", "0x89, \\_GPE.DPT2");
-            }
-            if ( slot & 1 )
-                stmt("ShiftRight", "\\_GPE.PH%02X, 0x04, Local1", slot & ~1);
-            else
-                stmt("And", "\\_GPE.PH%02X, 0x0f, Local1", slot & ~1);
-            stmt("Return", "Local1"); /* IN status as the _STA */
-            pop_block();
-            pop_block();
-        }
-    } else {
-        stmt("OperationRegion", "SEJ, SystemIO, 0xae08, 0x08");
-        push_block("Field", "SEJ, DWordAcc, NoLock, WriteAsZeros");
-        indent(); printf("B0EJ, 32,\n");
-        indent(); printf("B0RM, 32,\n");
-        pop_block();
+    stmt("OperationRegion", "SEJ, SystemIO, 0xae08, 0x08");
+    push_block("Field", "SEJ, DWordAcc, NoLock, WriteAsZeros");
+    indent(); printf("B0EJ, 32,\n");
+    indent(); printf("B0RM, 32,\n");
+    pop_block();
 
-        /* hotplug_slot */
-        for (slot = 1; slot <= 31; slot++) {
-            push_block("Device", "S%i", slot); {
-                stmt("Name", "_ADR, %#06x0000", slot);
-                push_block("Method", "_EJ0,1"); {
-                    stmt("Store", "%#010x, B0EJ", 1 << slot);
-                } pop_block();
-                stmt("Name", "_SUN, %i", slot);
-                push_block("Method", "_STA, 0"); {
-                    push_block("If", "And(B0RM, ShiftLeft(1, %i))", slot);
-                    stmt("Return", "0xF");
-                    pop_block();
-                    stmt("Return", "0x0");
-                } pop_block();
+    /* hotplug_slot */
+    for (slot = 1; slot <= 31; slot++) {
+        push_block("Device", "S%i", slot); {
+            stmt("Name", "_ADR, %#06x0000", slot);
+            push_block("Method", "_EJ0,1"); {
+                stmt("Store", "%#010x, B0EJ", 1 << slot);
             } pop_block();
-        }
+            stmt("Name", "_SUN, %i", slot);
+            push_block("Method", "_STA, 0"); {
+                push_block("If", "And(B0RM, ShiftLeft(1, %i))", slot);
+                stmt("Return", "0xF");
+                pop_block();
+                stmt("Return", "0x0");
+            } pop_block();
+        } pop_block();
     }
 
     pop_block();
@@ -460,26 +397,11 @@ int main(int argc, char **argv)
     /**** GPE start ****/
     push_block("Scope", "\\_GPE");
 
-    if (dm_version == QEMU_XEN_TRADITIONAL) {
-        stmt("OperationRegion", "PHP, SystemIO, 0x10c0, 0x82");
-
-        push_block("Field", "PHP, ByteAcc, NoLock, Preserve");
-        indent(); printf("PSTA, 8,\n"); /* hotplug controller event reg */
-        indent(); printf("PSTB, 8,\n"); /* hotplug controller slot reg */
-        for ( slot = 0; slot < 0x100; slot += 2 )
-        {
-            indent();
-            /* Each hotplug control register manages a pair of pci functions. */
-            printf("PH%02X, 8,\n", slot);
-        }
-        pop_block();
-    } else {
-        stmt("OperationRegion", "PCST, SystemIO, 0xae00, 0x08");
-        push_block("Field", "PCST, DWordAcc, NoLock, WriteAsZeros");
-        indent(); printf("PCIU, 32,\n");
-        indent(); printf("PCID, 32,\n");
-        pop_block();
-    }
+    stmt("OperationRegion", "PCST, SystemIO, 0xae00, 0x08");
+    push_block("Field", "PCST, DWordAcc, NoLock, WriteAsZeros");
+    indent(); printf("PCIU, 32,\n");
+    indent(); printf("PCID, 32,\n");
+    pop_block();
 
     stmt("OperationRegion", "DG1, SystemIO, 0xb044, 0x04");
 
@@ -487,35 +409,16 @@ int main(int argc, char **argv)
     indent(); printf("DPT1, 8, DPT2, 8\n");
     pop_block();
 
-    if (dm_version == QEMU_XEN_TRADITIONAL) {
-        push_block("Method", "_L03, 0, Serialized");
-        /* Detect slot and event (remove/add). */
-        stmt("Name", "SLT, 0x0");
-        stmt("Name", "EVT, 0x0");
-        stmt("Store", "PSTA, Local1");
-        stmt("And", "Local1, 0xf, EVT");
-        stmt("Store", "PSTB, Local1"); /* XXX: Store (PSTB, SLT) ? */
-        stmt("And", "Local1, 0xff, SLT");
-        if (debug)
-        {
-            stmt("Store", "SLT, DPT1");
-            stmt("Store", "EVT, DPT2");
-        }
-        /* Decision tree */
-        decision_tree(0x00, 0x100, "SLT", pci_hotplug_notify);
+    push_block("Method", "_E01");
+    for (slot = 1; slot <= 31; slot++) {
+        push_block("If", "And(PCIU, ShiftLeft(1, %i))", slot);
+        stmt("Notify", "\\_SB.PCI0.S%i, 1", slot);
         pop_block();
-    } else {
-        push_block("Method", "_E01");
-        for (slot = 1; slot <= 31; slot++) {
-            push_block("If", "And(PCIU, ShiftLeft(1, %i))", slot);
-            stmt("Notify", "\\_SB.PCI0.S%i, 1", slot);
-            pop_block();
-            push_block("If", "And(PCID, ShiftLeft(1, %i))", slot);
-            stmt("Notify", "\\_SB.PCI0.S%i, 3", slot);
-            pop_block();
-        }
+        push_block("If", "And(PCID, ShiftLeft(1, %i))", slot);
+        stmt("Notify", "\\_SB.PCI0.S%i, 3", slot);
         pop_block();
     }
+    pop_block();
 
     pop_block();
     /**** GPE end ****/
diff --git a/tools/libs/light/libxl_create.c b/tools/libs/light/libxl_create.c
index e03599ea99..8bc768b515 100644
--- a/tools/libs/light/libxl_create.c
+++ b/tools/libs/light/libxl_create.c
@@ -99,35 +99,14 @@ int libxl__domain_build_info_setdefault(libxl__gc *gc,
         b_info->device_model_ssidref = SECINITSID_DOMDM;
 
     if (!b_info->device_model_version) {
-        if (b_info->type == LIBXL_DOMAIN_TYPE_HVM) {
-            if (libxl_defbool_val(b_info->device_model_stubdomain)) {
-                b_info->device_model_version =
-                    LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL;
-            } else {
-                b_info->device_model_version = LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN;
-            }
-        } else {
-            b_info->device_model_version =
-                LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN;
-        }
-        if (b_info->device_model_version
-                == LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN) {
-            const char *dm;
-
-            dm = libxl__domain_device_model(gc, b_info);
-            rc = access(dm, X_OK);
-            if (rc < 0) {
-                /* qemu-xen unavailable, use qemu-xen-traditional */
-                if (errno == ENOENT) {
-                    LOGE(INFO, "qemu-xen is unavailable"
-                         ", using qemu-xen-traditional instead");
-                    b_info->device_model_version =
-                        LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL;
-                } else {
-                    LOGE(ERROR, "qemu-xen access error");
-                    return ERROR_FAIL;
-                }
-            }
+        const char *dm;
+
+        b_info->device_model_version = LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN;
+        dm = libxl__domain_device_model(gc, b_info);
+        rc = access(dm, X_OK);
+        if (rc < 0) {
+            LOGE(ERROR, "qemu-xen access error");
+            return ERROR_FAIL;
         }
     }
 
@@ -137,8 +116,6 @@ int libxl__domain_build_info_setdefault(libxl__gc *gc,
     if (b_info->type == LIBXL_DOMAIN_TYPE_HVM) {
         if (!b_info->u.hvm.bios)
             switch (b_info->device_model_version) {
-            case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL:
-                b_info->u.hvm.bios = LIBXL_BIOS_TYPE_ROMBIOS; break;
             case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
                 b_info->u.hvm.bios = LIBXL_BIOS_TYPE_SEABIOS; break;
             default:
@@ -148,12 +125,6 @@ int libxl__domain_build_info_setdefault(libxl__gc *gc,
 
         /* Enforce BIOS<->Device Model version relationship */
         switch (b_info->device_model_version) {
-        case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL:
-            if (b_info->u.hvm.bios != LIBXL_BIOS_TYPE_ROMBIOS) {
-                LOG(ERROR, "qemu-xen-traditional requires bios=rombios.");
-                return ERROR_INVAL;
-            }
-            break;
         case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
             if (b_info->u.hvm.bios == LIBXL_BIOS_TYPE_ROMBIOS) {
                 LOG(ERROR, "qemu-xen does not support bios=rombios.");
@@ -176,10 +147,6 @@ int libxl__domain_build_info_setdefault(libxl__gc *gc,
         libxl_defbool_val(b_info->device_model_stubdomain)) {
         if (!b_info->stubdomain_kernel) {
             switch (b_info->device_model_version) {
-                case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL:
-                    b_info->stubdomain_kernel =
-                        libxl__abs_path(NOGC, "ioemu-stubdom.gz", libxl__xenfirmwaredir_path());
-                    break;
                 case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
                     b_info->stubdomain_kernel =
                         libxl__abs_path(NOGC,
@@ -192,8 +159,6 @@ int libxl__domain_build_info_setdefault(libxl__gc *gc,
         }
         if (!b_info->stubdomain_ramdisk) {
             switch (b_info->device_model_version) {
-                case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL:
-                    break;
                 case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
                     b_info->stubdomain_ramdisk =
                         libxl__abs_path(NOGC,
@@ -299,33 +264,6 @@ int libxl__domain_build_info_setdefault(libxl__gc *gc,
             b_info->u.hvm.hdtype = LIBXL_HDTYPE_IDE;
 
         switch (b_info->device_model_version) {
-        case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL:
-            switch (b_info->u.hvm.vga.kind) {
-            case LIBXL_VGA_INTERFACE_TYPE_NONE:
-                if (b_info->video_memkb == LIBXL_MEMKB_DEFAULT)
-                    b_info->video_memkb = 0;
-                break;
-            case LIBXL_VGA_INTERFACE_TYPE_QXL:
-                LOG(ERROR,"qemu upstream required for qxl vga");
-                return ERROR_INVAL;
-                break;
-            case LIBXL_VGA_INTERFACE_TYPE_STD:
-                if (b_info->video_memkb == LIBXL_MEMKB_DEFAULT)
-                    b_info->video_memkb = 8 * 1024;
-                if (b_info->video_memkb < 8 * 1024) {
-                    LOG(ERROR, "videoram must be at least 8 MB for STDVGA on QEMU_XEN_TRADITIONAL");
-                    return ERROR_INVAL;
-                }
-                break;
-            case LIBXL_VGA_INTERFACE_TYPE_CIRRUS:
-            default:
-                if (b_info->video_memkb == LIBXL_MEMKB_DEFAULT)
-                    b_info->video_memkb = 4 * 1024;
-                if (b_info->video_memkb != 4 * 1024)
-                    LOG(WARN, "ignoring videoram other than 4 MB for CIRRUS on QEMU_XEN_TRADITIONAL");
-                break;
-            }
-            break;
         case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
         default:
             switch (b_info->u.hvm.vga.kind) {
diff --git a/tools/libs/light/libxl_device.c b/tools/libs/light/libxl_device.c
index 4faa5fa3bd..42d71c17bc 100644
--- a/tools/libs/light/libxl_device.c
+++ b/tools/libs/light/libxl_device.c
@@ -1440,25 +1440,6 @@ static void devices_remove_callback(libxl__egc *egc,
     return;
 }
 
-int libxl__wait_for_device_model_deprecated(libxl__gc *gc,
-                                 uint32_t domid, char *state,
-                                 libxl__spawn_starting *spawning,
-                                 int (*check_callback)(libxl__gc *gc,
-                                                       uint32_t domid,
-                                                       const char *state,
-                                                       void *userdata),
-                                 void *check_callback_userdata)
-{
-    char *path;
-    uint32_t dm_domid = libxl_get_stubdom_id(CTX, domid);
-
-    path = DEVICE_MODEL_XS_PATH(gc, dm_domid, domid, "/state");
-    return libxl__xenstore_child_wait_deprecated(gc, domid,
-                                     LIBXL_DEVICE_MODEL_START_TIMEOUT,
-                                     "Device Model", path, state, spawning,
-                                     check_callback, check_callback_userdata);
-}
-
 int libxl__wait_for_backend(libxl__gc *gc, const char *be_path,
                             const char *state)
 {
diff --git a/tools/libs/light/libxl_disk.c b/tools/libs/light/libxl_disk.c
index 6a0b6e06fe..456b5450ca 100644
--- a/tools/libs/light/libxl_disk.c
+++ b/tools/libs/light/libxl_disk.c
@@ -1007,13 +1007,6 @@ int libxl_cdrom_insert(libxl_ctx *ctx, uint32_t domid, libxl_device_disk *disk,
         disk->backend = LIBXL_DISK_BACKEND_PHY;
     }
 
-    if (cis->dm_ver == LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL &&
-        stubdomid) {
-        LOGD(ERROR, domid, "cdrom-insert doesn't work for Mini-OS stubdoms");
-        rc = ERROR_INVAL;
-        goto out;
-    }
-
     disks = libxl__device_list(gc, &libxl__disk_devtype, cis->disk_domid, &num);
     for (i = 0; i < num; i++) {
         if (disks[i].is_cdrom && !strcmp(disk->vdev, disks[i].vdev))
diff --git a/tools/libs/light/libxl_dm.c b/tools/libs/light/libxl_dm.c
index 4627564c0d..645119b65a 100644
--- a/tools/libs/light/libxl_dm.c
+++ b/tools/libs/light/libxl_dm.c
@@ -328,9 +328,6 @@ const char *libxl__domain_device_model(libxl__gc *gc,
         dm = libxl__strdup(gc, info->device_model);
     } else {
         switch (info->device_model_version) {
-        case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL:
-            dm = libxl__abs_path(gc, "qemu-dm", libxl__private_bindir_path());
-            break;
         case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN: {
             const char *configured_dm = qemu_xen_path(gc);
             if (configured_dm[0] == '/')
@@ -704,272 +701,6 @@ static const char *dm_keymap(const libxl_domain_config *guest_config)
         return NULL;
 }
 
-static int libxl__build_device_model_args_old(libxl__gc *gc,
-                                        const char *dm, int domid,
-                                        const libxl_domain_config *guest_config,
-                                        char ***args, char ***envs,
-                                        const libxl__domain_build_state *state)
-{
-    const libxl_domain_create_info *c_info = &guest_config->c_info;
-    const libxl_domain_build_info *b_info = &guest_config->b_info;
-    const libxl_device_nic *nics = guest_config->nics;
-    const libxl_vnc_info *vnc = libxl__dm_vnc(guest_config);
-    const libxl_sdl_info *sdl = dm_sdl(guest_config);
-    const int num_nics = guest_config->num_nics;
-    const char *keymap = dm_keymap(guest_config);
-    int i;
-    flexarray_t *dm_args, *dm_envs;
-    dm_args = flexarray_make(gc, 16, 1);
-    dm_envs = flexarray_make(gc, 16, 1);
-
-    assert(state->dm_monitor_fd == -1);
-
-    flexarray_vappend(dm_args, dm,
-                      "-d", GCSPRINTF("%d", domid), NULL);
-
-    if (c_info->name)
-        flexarray_vappend(dm_args, "-domain-name", c_info->name, NULL);
-
-    if (vnc) {
-        char *vncarg = NULL;
-
-        flexarray_append(dm_args, "-vnc");
-
-        /*
-         * If vnc->listen is present and contains a :, and
-         *  - vnc->display is 0, use vnc->listen
-         *  - vnc->display is non-zero, be confused
-         * If vnc->listen is present but doesn't, use vnc->listen:vnc->display.
-         * If vnc->listen is not present, use 127.0.0.1:vnc->display
-         * (Remembering that vnc->display already defaults to 0.)
-         */
-        if (vnc->listen) {
-            if (strchr(vnc->listen, ':') != NULL) {
-                if (vnc->display) {
-                    LOGD(ERROR, domid, "vncdisplay set, vnclisten contains display");
-                    return ERROR_INVAL;
-                }
-                vncarg = vnc->listen;
-            } else {
-                vncarg = GCSPRINTF("%s:%d", vnc->listen, vnc->display);
-            }
-        } else
-            vncarg = GCSPRINTF("127.0.0.1:%d", vnc->display);
-
-        if (vnc->passwd && vnc->passwd[0]) {
-            vncarg = GCSPRINTF("%s,password", vncarg);
-        }
-
-        flexarray_append(dm_args, vncarg);
-
-        if (libxl_defbool_val(vnc->findunused)) {
-            flexarray_append(dm_args, "-vncunused");
-        }
-    } else if (!sdl) {
-        /*
-         * VNC is not enabled by default by qemu-xen-traditional,
-         * however skipping -vnc causes SDL to be
-         * (unexpectedly) enabled by default. If undesired, disable graphics at
-         * all.
-         */
-        flexarray_append(dm_args, "-nographic");
-    }
-
-    if (sdl) {
-        flexarray_append(dm_args, "-sdl");
-        if (!libxl_defbool_val(sdl->opengl)) {
-            flexarray_append(dm_args, "-disable-opengl");
-        }
-        if (sdl->display)
-            flexarray_append_pair(dm_envs, "DISPLAY", sdl->display);
-        if (sdl->xauthority)
-            flexarray_append_pair(dm_envs, "XAUTHORITY", sdl->xauthority);
-    }
-    if (keymap) {
-        flexarray_vappend(dm_args, "-k", keymap, NULL);
-    }
-    if (b_info->type == LIBXL_DOMAIN_TYPE_HVM) {
-        int ioemu_nics = 0;
-        int nr_set_cpus = 0;
-        char *s;
-
-        flexarray_append_pair(dm_envs, "XEN_DOMAIN_ID", GCSPRINTF("%d", domid));
-
-        if (b_info->kernel) {
-            LOGD(ERROR, domid, "HVM direct kernel boot is not supported by "
-                 "qemu-xen-traditional");
-            return ERROR_INVAL;
-        }
-
-        if (b_info->u.hvm.serial || b_info->u.hvm.serial_list) {
-            if ( b_info->u.hvm.serial && b_info->u.hvm.serial_list )
-            {
-                LOGD(ERROR, domid, "Both serial and serial_list set");
-                return ERROR_INVAL;
-            }
-            if (b_info->u.hvm.serial) {
-                flexarray_vappend(dm_args,
-                                  "-serial", b_info->u.hvm.serial, NULL);
-            } else if (b_info->u.hvm.serial_list) {
-                char **p;
-                for (p = b_info->u.hvm.serial_list;
-                     *p;
-                     p++) {
-                    flexarray_vappend(dm_args,
-                                      "-serial",
-                                      *p, NULL);
-                }
-            }
-        }
-
-        if (libxl_defbool_val(b_info->u.hvm.nographic) && (!sdl && !vnc)) {
-            flexarray_append(dm_args, "-nographic");
-        }
-
-        if (b_info->video_memkb) {
-            flexarray_vappend(dm_args, "-videoram",
-                    GCSPRINTF("%d", libxl__sizekb_to_mb(b_info->video_memkb)),
-                    NULL);
-        }
-
-        switch (b_info->u.hvm.vga.kind) {
-        case LIBXL_VGA_INTERFACE_TYPE_STD:
-            flexarray_append(dm_args, "-std-vga");
-            break;
-        case LIBXL_VGA_INTERFACE_TYPE_CIRRUS:
-            break;
-        case LIBXL_VGA_INTERFACE_TYPE_NONE:
-            flexarray_append_pair(dm_args, "-vga", "none");
-            break;
-        case LIBXL_VGA_INTERFACE_TYPE_QXL:
-            break;
-        default:
-            LOGD(ERROR, domid, "Invalid emulated video card specified");
-            return ERROR_INVAL;
-        }
-
-        if (b_info->u.hvm.boot) {
-            flexarray_vappend(dm_args, "-boot", b_info->u.hvm.boot, NULL);
-        }
-        if (libxl_defbool_val(b_info->u.hvm.usb)
-            || b_info->u.hvm.usbdevice
-            || libxl_string_list_length(&b_info->u.hvm.usbdevice_list)) {
-            if (b_info->u.hvm.usbdevice
-                && libxl_string_list_length(&b_info->u.hvm.usbdevice_list)) {
-                LOGD(ERROR, domid, "Both usbdevice and usbdevice_list set");
-                return ERROR_INVAL;
-            }
-            flexarray_append(dm_args, "-usb");
-            if (b_info->u.hvm.usbdevice) {
-                flexarray_vappend(dm_args,
-                                  "-usbdevice", b_info->u.hvm.usbdevice, NULL);
-            } else if (b_info->u.hvm.usbdevice_list) {
-                char **p;
-                for (p = b_info->u.hvm.usbdevice_list;
-                     *p;
-                     p++) {
-                    flexarray_vappend(dm_args,
-                                      "-usbdevice",
-                                      *p, NULL);
-                }
-            }
-        }
-        if (b_info->u.hvm.soundhw) {
-            flexarray_vappend(dm_args, "-soundhw", b_info->u.hvm.soundhw, NULL);
-        }
-        if (libxl__acpi_defbool_val(b_info)) {
-            flexarray_append(dm_args, "-acpi");
-        }
-        if (b_info->max_vcpus > 1) {
-            flexarray_vappend(dm_args, "-vcpus",
-                              GCSPRINTF("%d", b_info->max_vcpus),
-                              NULL);
-        }
-
-        nr_set_cpus = libxl_bitmap_count_set(&b_info->avail_vcpus);
-        s = libxl_bitmap_to_hex_string(CTX, &b_info->avail_vcpus);
-        flexarray_vappend(dm_args, "-vcpu_avail",
-                              GCSPRINTF("%s", s), NULL);
-        free(s);
-
-        for (i = 0; i < num_nics; i++) {
-            if (nics[i].nictype == LIBXL_NIC_TYPE_VIF_IOEMU) {
-                char *smac = GCSPRINTF(
-                                   LIBXL_MAC_FMT, LIBXL_MAC_BYTES(nics[i].mac));
-                const char *ifname = libxl__device_nic_devname(gc,
-                                                domid, nics[i].devid,
-                                                LIBXL_NIC_TYPE_VIF_IOEMU);
-                flexarray_vappend(dm_args,
-                                  "-net",
-                                  GCSPRINTF(
-                                      "nic,vlan=%d,macaddr=%s,model=%s",
-                                      nics[i].devid, smac, nics[i].model),
-                                  "-net",
-                                  GCSPRINTF(
-                                      "tap,vlan=%d,ifname=%s,bridge=%s,"
-                                      "script=%s,downscript=%s",
-                                      nics[i].devid, ifname, nics[i].bridge,
-                                      libxl_tapif_script(gc),
-                                      libxl_tapif_script(gc)),
-                                  NULL);
-                ioemu_nics++;
-            }
-        }
-        /* If we have no emulated nics, tell qemu not to create any */
-        if ( ioemu_nics == 0 ) {
-            flexarray_vappend(dm_args, "-net", "none", NULL);
-        }
-        if (libxl_defbool_val(b_info->u.hvm.gfx_passthru)) {
-            switch (b_info->u.hvm.gfx_passthru_kind) {
-            case LIBXL_GFX_PASSTHRU_KIND_DEFAULT:
-            case LIBXL_GFX_PASSTHRU_KIND_IGD:
-                flexarray_append(dm_args, "-gfx_passthru");
-                break;
-            default:
-                LOGD(ERROR, domid, "unsupported gfx_passthru_kind.");
-                return ERROR_INVAL;
-            }
-        }
-    } else {
-        if (!sdl && !vnc)
-            flexarray_append(dm_args, "-nographic");
-    }
-
-    if (libxl_defbool_val(b_info->dm_restrict)) {
-        LOGD(ERROR, domid,
-             "dm_restrict not supported by qemu-xen-traditional");
-        return ERROR_INVAL;
-    }
-
-    if (state->saved_state) {
-        flexarray_vappend(dm_args, "-loadvm", state->saved_state, NULL);
-    }
-    for (i = 0; b_info->extra && b_info->extra[i] != NULL; i++)
-        flexarray_append(dm_args, b_info->extra[i]);
-    flexarray_append(dm_args, "-M");
-    switch (b_info->type) {
-    case LIBXL_DOMAIN_TYPE_PVH:
-    case LIBXL_DOMAIN_TYPE_PV:
-        flexarray_append(dm_args, "xenpv");
-        for (i = 0; b_info->extra_pv && b_info->extra_pv[i] != NULL; i++)
-            flexarray_append(dm_args, b_info->extra_pv[i]);
-        break;
-    case LIBXL_DOMAIN_TYPE_HVM:
-        flexarray_append(dm_args, "xenfv");
-        for (i = 0; b_info->extra_hvm && b_info->extra_hvm[i] != NULL; i++)
-            flexarray_append(dm_args, b_info->extra_hvm[i]);
-        break;
-    default:
-        abort();
-    }
-    flexarray_append(dm_args, NULL);
-    *args = (char **) flexarray_contents(dm_args);
-    flexarray_append(dm_envs, NULL);
-    if (envs)
-        *envs = (char **) flexarray_contents(dm_envs);
-    return 0;
-}
-
 static char *dm_spice_options(libxl__gc *gc,
                                     const libxl_spice_info *spice)
 {
@@ -2096,11 +1827,6 @@ static int libxl__build_device_model_args(libxl__gc *gc,
  * and therefore will be passing a filename rather than a fd. */
 {
     switch (guest_config->b_info.device_model_version) {
-    case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL:
-        return libxl__build_device_model_args_old(gc, dm,
-                                                  guest_domid, guest_config,
-                                                  args, envs,
-                                                  state);
     case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
         if (!libxl_defbool_val(guest_config->b_info.device_model_stubdomain)) {
             assert(dm_state_fd != NULL);
@@ -2463,16 +2189,15 @@ void libxl__spawn_stub_dm(libxl__egc *egc, libxl__stub_dm_spawn_state *sdss)
                         "%s",
                         libxl_bios_type_to_string(guest_config->b_info.u.hvm.bios));
     }
-    /* Disable relocating memory to make the MMIO hole larger
-     * unless we're running qemu-traditional and vNUMA is not
-     * configured. */
+
+    /*
+     * Disable relocating memory, having a lager MMIO hole isn't
+     * implemented with qemu-xen.
+     */
     libxl__xs_printf(gc, XBT_NULL,
                      libxl__sprintf(gc, "%s/hvmloader/allow-memory-relocate",
                                     libxl__xs_get_dompath(gc, guest_domid)),
-                     "%d",
-                     guest_config->b_info.device_model_version
-                        == LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL &&
-                     !libxl__vnuma_configured(&guest_config->b_info));
+                     "0");
     ret = xc_domain_set_target(ctx->xch, dm_domid, guest_domid);
     if (ret<0) {
         LOGED(ERROR, guest_domid, "setting target domain %d -> %d",
@@ -3156,13 +2881,9 @@ static void device_model_launch(libxl__egc *egc,
     libxl_domain_config *guest_config = dmss->guest_config;
     const libxl_domain_create_info *c_info = &guest_config->c_info;
     const libxl_domain_build_info *b_info = &guest_config->b_info;
-    const libxl_vnc_info *vnc = libxl__dm_vnc(guest_config);
     char *path;
     int logfile_w, null;
     char **args, **arg, **envs;
-    xs_transaction_t t;
-    char *vm_path;
-    char **pass_stuff;
     int dm_state_fd = -1;
 
     /* convenience aliases */
@@ -3196,26 +2917,19 @@ static void device_model_launch(libxl__egc *egc,
         libxl__xs_printf(gc, XBT_NULL,
                          GCSPRINTF("%s/hvmloader/bios", path),
                          "%s", libxl_bios_type_to_string(b_info->u.hvm.bios));
-        /* Disable relocating memory to make the MMIO hole larger
-         * unless we're running qemu-traditional and vNUMA is not
-         * configured. */
+        /*
+         * Disable relocating memory, having a lager MMIO hole isn't
+         * implemented with qemu-xen.
+         */
         libxl__xs_printf(gc, XBT_NULL,
                          GCSPRINTF("%s/hvmloader/allow-memory-relocate", path),
-                         "%d",
-                         b_info->device_model_version==LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL &&
-                         !libxl__vnuma_configured(b_info));
+                         "0");
         free(path);
     }
 
     path = DEVICE_MODEL_XS_PATH(gc, LIBXL_TOOLSTACK_DOMID, domid, "");
     xs_mkdir(ctx->xsh, XBT_NULL, path);
 
-    if (b_info->type == LIBXL_DOMAIN_TYPE_HVM &&
-        b_info->device_model_version
-        == LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL)
-        libxl__xs_printf(gc, XBT_NULL, GCSPRINTF("%s/disable_pf", path),
-                         "%d", !libxl_defbool_val(b_info->u.hvm.xen_platform_pci));
-
     logfile_w = libxl__create_qemu_logfile(gc, GCSPRINTF("qemu-dm-%s",
                                                          c_info->name));
     if (logfile_w < 0) {
@@ -3240,25 +2954,6 @@ static void device_model_launch(libxl__egc *egc,
                          GCSPRINTF("%s/image/device-model-kill-uid", dom_path),
                          "%s", state->dm_kill_uid);
 
-    if (vnc && vnc->passwd) {
-        /* This xenstore key will only be used by qemu-xen-traditionnal.
-         * The code to supply vncpasswd to qemu-xen is later. */
-retry_transaction:
-        /* Find uuid and the write the vnc password to xenstore for qemu. */
-        t = xs_transaction_start(ctx->xsh);
-        vm_path = libxl__xs_read(gc,t,GCSPRINTF("%s/vm", dom_path));
-        if (vm_path) {
-            /* Now write the vncpassword into it. */
-            pass_stuff = libxl__calloc(gc, 3, sizeof(char *));
-            pass_stuff[0] = "vncpasswd";
-            pass_stuff[1] = vnc->passwd;
-            libxl__xs_writev(gc,t,vm_path,pass_stuff);
-            if (!xs_transaction_end(ctx->xsh, t, 0))
-                if (errno == EAGAIN)
-                    goto retry_transaction;
-        }
-    }
-
     LOGD(DEBUG, domid, "Spawning device-model %s with arguments:", dm);
     for (arg = args; *arg; arg++)
         LOGD(DEBUG, domid, "  %s", *arg);
diff --git a/tools/libs/light/libxl_dom.c b/tools/libs/light/libxl_dom.c
index 94fef37401..4d67b0d282 100644
--- a/tools/libs/light/libxl_dom.c
+++ b/tools/libs/light/libxl_dom.c
@@ -881,7 +881,6 @@ static int libxl__domain_firmware(libxl__gc *gc,
             switch (info->device_model_version)
             {
             case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
-            case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL:
                 firmware = "hvmloader";
                 break;
             default:
@@ -1212,15 +1211,6 @@ out:
     return rc;
 }
 
-int libxl__qemu_traditional_cmd(libxl__gc *gc, uint32_t domid,
-                                const char *cmd)
-{
-    char *path = NULL;
-    uint32_t dm_domid = libxl_get_stubdom_id(CTX, domid);
-    path = DEVICE_MODEL_XS_PATH(gc, dm_domid, domid, "/command");
-    return libxl__xs_printf(gc, XBT_NULL, path, "%s", cmd);
-}
-
 /*==================== Miscellaneous ====================*/
 
 char *libxl__uuid2string(libxl__gc *gc, const libxl_uuid uuid)
diff --git a/tools/libs/light/libxl_dom_save.c b/tools/libs/light/libxl_dom_save.c
index 32e3cb5a13..d64fd64f2e 100644
--- a/tools/libs/light/libxl_dom_save.c
+++ b/tools/libs/light/libxl_dom_save.c
@@ -28,19 +28,6 @@ static void domain_save_done(libxl__egc *egc,
 
 /*----- complicated callback, called by xc_domain_save -----*/
 
-/*
- * We implement the other end of protocol for controlling qemu-dm's
- * logdirty.  There is no documentation for this protocol, but our
- * counterparty's implementation is in
- * qemu-xen-traditional.git:xenstore.c in the function
- * xenstore_process_logdirty_event
- */
-
-static void domain_suspend_switch_qemu_xen_traditional_logdirty
-                               (libxl__egc *egc, int domid, unsigned enable,
-                                libxl__logdirty_switch *lds);
-static void switch_logdirty_xswatch(libxl__egc *egc, libxl__ev_xswatch*,
-                            const char *watch_path, const char *event_path);
 static void domain_suspend_switch_qemu_xen_logdirty
                                (libxl__egc *egc, int domid, unsigned enable,
                                 libxl__logdirty_switch *lds);
@@ -69,10 +56,6 @@ void libxl__domain_common_switch_qemu_logdirty(libxl__egc *egc,
     STATE_AO_GC(lds->ao);
 
     switch (libxl__device_model_version_running(gc, domid)) {
-    case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL:
-        domain_suspend_switch_qemu_xen_traditional_logdirty(egc, domid, enable,
-                                                            lds);
-        break;
     case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
         domain_suspend_switch_qemu_xen_logdirty(egc, domid, enable, lds);
         break;
@@ -83,129 +66,6 @@ void libxl__domain_common_switch_qemu_logdirty(libxl__egc *egc,
     }
 }
 
-static void domain_suspend_switch_qemu_xen_traditional_logdirty
-                               (libxl__egc *egc, int domid, unsigned enable,
-                                libxl__logdirty_switch *lds)
-{
-    STATE_AO_GC(lds->ao);
-    int rc;
-    xs_transaction_t t = 0;
-    const char *got;
-
-    if (!lds->cmd_path) {
-        uint32_t dm_domid = libxl_get_stubdom_id(CTX, domid);
-        lds->cmd_path = DEVICE_MODEL_XS_PATH(gc, dm_domid, domid,
-                                             "/logdirty/cmd");
-        lds->ret_path = DEVICE_MODEL_XS_PATH(gc, dm_domid, domid,
-                                             "/logdirty/ret");
-    }
-    lds->cmd = enable ? "enable" : "disable";
-
-    rc = libxl__ev_xswatch_register(gc, &lds->watch,
-                                switch_logdirty_xswatch, lds->ret_path);
-    if (rc) goto out;
-
-    rc = libxl__ev_time_register_rel(ao, &lds->timeout,
-                                switch_logdirty_timeout, 10*1000);
-    if (rc) goto out;
-
-    for (;;) {
-        rc = libxl__xs_transaction_start(gc, &t);
-        if (rc) goto out;
-
-        rc = libxl__xs_read_checked(gc, t, lds->cmd_path, &got);
-        if (rc) goto out;
-
-        if (got) {
-            const char *got_ret;
-            rc = libxl__xs_read_checked(gc, t, lds->ret_path, &got_ret);
-            if (rc) goto out;
-
-            if (!got_ret || strcmp(got, got_ret)) {
-                LOGD(ERROR, domid, "controlling logdirty: qemu was already sent"
-                     " command `%s' (xenstore path `%s') but result is `%s'",
-                     got, lds->cmd_path, got_ret ? got_ret : "");
-                rc = ERROR_FAIL;
-                goto out;
-            }
-            rc = libxl__xs_rm_checked(gc, t, lds->cmd_path);
-            if (rc) goto out;
-        }
-
-        rc = libxl__xs_rm_checked(gc, t, lds->ret_path);
-        if (rc) goto out;
-
-        rc = libxl__xs_write_checked(gc, t, lds->cmd_path, lds->cmd);
-        if (rc) goto out;
-
-        rc = libxl__xs_transaction_commit(gc, &t);
-        if (!rc) break;
-        if (rc<0) goto out;
-    }
-
-    /* OK, wait for some callback */
-    return;
-
- out:
-    LOGD(ERROR, domid, "logdirty switch failed (rc=%d), abandoning suspend",rc);
-    libxl__xs_transaction_abort(gc, &t);
-    switch_logdirty_done(egc,lds,rc);
-}
-
-static void switch_logdirty_xswatch(libxl__egc *egc, libxl__ev_xswatch *watch,
-                            const char *watch_path, const char *event_path)
-{
-    libxl__logdirty_switch *lds = CONTAINER_OF(watch, *lds, watch);
-    STATE_AO_GC(lds->ao);
-    const char *got;
-    xs_transaction_t t = 0;
-    int rc;
-
-    for (;;) {
-        rc = libxl__xs_transaction_start(gc, &t);
-        if (rc) goto out;
-
-        rc = libxl__xs_read_checked(gc, t, lds->ret_path, &got);
-        if (rc) goto out;
-
-        if (!got) {
-            rc = +1;
-            goto out;
-        }
-
-        if (strcmp(got, lds->cmd)) {
-            LOG(ERROR,"logdirty switch: sent command `%s' but got reply `%s'"
-                " (xenstore paths `%s' / `%s')", lds->cmd, got,
-                lds->cmd_path, lds->ret_path);
-            rc = ERROR_FAIL;
-            goto out;
-        }
-
-        rc = libxl__xs_rm_checked(gc, t, lds->cmd_path);
-        if (rc) goto out;
-
-        rc = libxl__xs_rm_checked(gc, t, lds->ret_path);
-        if (rc) goto out;
-
-        rc = libxl__xs_transaction_commit(gc, &t);
-        if (!rc) break;
-        if (rc<0) goto out;
-    }
-
- out:
-    /* rc < 0: error
-     * rc == 0: ok, we are done
-     * rc == +1: need to keep waiting
-     */
-    libxl__xs_transaction_abort(gc, &t);
-
-    if (rc <= 0) {
-        if (rc < 0)
-            LOG(ERROR,"logdirty switch: failed (rc=%d)",rc);
-        switch_logdirty_done(egc,lds,rc);
-    }
-}
-
 static void domain_suspend_switch_qemu_xen_logdirty
                                (libxl__egc *egc, int domid, unsigned enable,
                                 libxl__logdirty_switch *lds)
diff --git a/tools/libs/light/libxl_dom_suspend.c b/tools/libs/light/libxl_dom_suspend.c
index 6091a5f3f6..f0a74fc82c 100644
--- a/tools/libs/light/libxl_dom_suspend.c
+++ b/tools/libs/light/libxl_dom_suspend.c
@@ -85,15 +85,8 @@ void libxl__domain_suspend_device_model(libxl__egc *egc,
     STATE_AO_GC(dsps->ao);
     int rc = 0;
     uint32_t const domid = dsps->domid;
-    const char *const filename = dsps->dm_savefile;
 
     switch (libxl__device_model_version_running(gc, domid)) {
-    case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL: {
-        LOGD(DEBUG, domid, "Saving device model state to %s", filename);
-        libxl__qemu_traditional_cmd(gc, domid, "save");
-        libxl__wait_for_device_model_deprecated(gc, domid, "paused", NULL, NULL, NULL);
-        break;
-    }
     case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
         /* calls dsps->callback_device_model_done when done */
         libxl__qmp_suspend_save(egc, dsps); /* must be last */
@@ -420,21 +413,7 @@ static void domain_suspend_callback_common_done(libxl__egc *egc,
 
 int libxl__domain_resume_device_model_deprecated(libxl__gc *gc, uint32_t domid)
 {
-    const char *path, *state;
-
     switch (libxl__device_model_version_running(gc, domid)) {
-    case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL: {
-        uint32_t dm_domid = libxl_get_stubdom_id(CTX, domid);
-
-        path = DEVICE_MODEL_XS_PATH(gc, dm_domid, domid, "/state");
-        state = libxl__xs_read(gc, XBT_NULL, path);
-        if (state != NULL && !strcmp(state, "paused")) {
-            libxl__qemu_traditional_cmd(gc, domid, "continue");
-            libxl__wait_for_device_model_deprecated(gc, domid, "running",
-                                                    NULL, NULL, NULL);
-        }
-        break;
-    }
     case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
         if (libxl__qmp_resume(gc, domid))
             return ERROR_FAIL;
@@ -493,8 +472,6 @@ static void dm_resume_dispose(libxl__gc *gc,
     libxl__ev_xswatch_deregister(gc, &dmrs->watch);
 }
 
-static void dm_resume_xswatch_cb(libxl__egc *egc,
-    libxl__ev_xswatch *, const char *watch_path, const char *);
 static void dm_resume_qmp_done(libxl__egc *egc,
     libxl__ev_qmp *qmp, const libxl__json_object *, int rc);
 static void dm_resume_timeout(libxl__egc *egc,
@@ -521,27 +498,6 @@ void libxl__dm_resume(libxl__egc *egc,
     if (rc) goto out;
 
     switch (libxl__device_model_version_running(gc, domid)) {
-    case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL: {
-        uint32_t dm_domid = libxl_get_stubdom_id(CTX, domid);
-        const char *path, *state;
-
-        path = DEVICE_MODEL_XS_PATH(gc, dm_domid, domid, "/state");
-        rc = libxl__xs_read_checked(gc, XBT_NULL, path, &state);
-        if (rc) goto out;
-        if (!state || strcmp(state, "paused")) {
-            /* already running */
-            rc = 0;
-            goto out;
-        }
-
-        rc = libxl__qemu_traditional_cmd(gc, domid, "continue");
-        if (rc) goto out;
-        rc = libxl__ev_xswatch_register(gc, &dmrs->watch,
-                                        dm_resume_xswatch_cb,
-                                        path);
-        if (rc) goto out;
-        break;
-    }
     case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
         qmp->ao = dmrs->ao;
         qmp->domid = domid;
@@ -561,27 +517,6 @@ out:
     dm_resume_done(egc, dmrs, rc);
 }
 
-static void dm_resume_xswatch_cb(libxl__egc *egc,
-                                 libxl__ev_xswatch *xsw,
-                                 const char *watch_path,
-                                 const char *event_path)
-{
-    EGC_GC;
-    libxl__dm_resume_state *dmrs = CONTAINER_OF(xsw, *dmrs, watch);
-    int rc;
-    const char *value;
-
-    rc = libxl__xs_read_checked(gc, XBT_NULL, watch_path, &value);
-    if (rc) goto out;
-
-    if (!value || strcmp(value, "running"))
-        return;
-
-    rc = 0;
-out:
-    dm_resume_done(egc, dmrs, rc);
-}
-
 static void dm_resume_qmp_done(libxl__egc *egc,
                                libxl__ev_qmp *qmp,
                                const libxl__json_object *response,
diff --git a/tools/libs/light/libxl_domain.c b/tools/libs/light/libxl_domain.c
index 6751fc785f..dd2e5e9a19 100644
--- a/tools/libs/light/libxl_domain.c
+++ b/tools/libs/light/libxl_domain.c
@@ -1877,8 +1877,6 @@ int libxl_set_vcpuonline(libxl_ctx *ctx, uint32_t domid,
     switch (libxl__domain_type(gc, domid)) {
     case LIBXL_DOMAIN_TYPE_HVM:
         switch (libxl__device_model_version_running(gc, domid)) {
-        case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL:
-            break;
         case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
             rc = libxl__ev_time_register_rel(ao, &svos->timeout,
                                              set_vcpuonline_timeout,
@@ -2116,7 +2114,6 @@ static void domain_s3_resume(libxl__ao *ao, libxl__egc *egc, int domid)
     AO_GC;
     libxl__ev_qmp *qmp;
     int rc = 0;
-    int r;
 
     GCNEW(qmp);
     libxl__ev_qmp_init(qmp);
@@ -2128,14 +2125,6 @@ static void domain_s3_resume(libxl__ao *ao, libxl__egc *egc, int domid)
     switch (libxl__domain_type(gc, domid)) {
     case LIBXL_DOMAIN_TYPE_HVM:
         switch (libxl__device_model_version_running(gc, domid)) {
-        case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL:
-            r = xc_hvm_param_set(CTX->xch, domid, HVM_PARAM_ACPI_S_STATE, 0);
-            if (r) {
-                LOGED(ERROR, domid, "Send trigger '%s' failed",
-                      libxl_trigger_to_string(LIBXL_TRIGGER_S3RESUME));
-                rc = ERROR_FAIL;
-            }
-            break;
         case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
             rc = libxl__ev_qmp_send(egc, qmp, "system_wakeup", NULL);
             if (rc) goto out;
@@ -2481,10 +2470,6 @@ static void retrieve_domain_configuration_end(libxl__egc *egc,
             case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
                 libxl_bitmap_copy(CTX, map, &rdcs->qemuu_cpus);
                 break;
-            case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL:
-                rc = libxl__update_avail_vcpus_xenstore(gc, domid,
-                                                        max_vcpus, map);
-                break;
             default:
                 abort();
             }
diff --git a/tools/libs/light/libxl_exec.c b/tools/libs/light/libxl_exec.c
index a8b949b193..7a59c050b2 100644
--- a/tools/libs/light/libxl_exec.c
+++ b/tools/libs/light/libxl_exec.c
@@ -157,81 +157,6 @@ out:
     return rc ? SIGTERM : 0;
 }
 
-int libxl__xenstore_child_wait_deprecated(libxl__gc *gc,
-                                 uint32_t domid,
-                                 uint32_t timeout, char *what,
-                                 char *path, char *state,
-                                 libxl__spawn_starting *spawning,
-                                 int (*check_callback)(libxl__gc *gc,
-                                                       uint32_t domid,
-                                                       const char *state,
-                                                       void *userdata),
-                                 void *check_callback_userdata)
-{
-    char *p;
-    unsigned int len;
-    int rc = 0;
-    struct xs_handle *xsh;
-    int nfds;
-    fd_set rfds;
-    struct timeval tv;
-    unsigned int num;
-    char **l = NULL;
-
-    xsh = xs_open(0);
-    if (xsh == NULL) {
-        LOG(ERROR, "Unable to open xenstore connection");
-        goto err;
-    }
-
-    xs_watch(xsh, path, path);
-    tv.tv_sec = timeout;
-    tv.tv_usec = 0;
-    nfds = xs_fileno(xsh) + 1;
-    assert(!spawning);
-
-    while (rc > 0 || (!rc && tv.tv_sec > 0)) {
-        p = xs_read(xsh, XBT_NULL, path, &len);
-        if ( NULL == p )
-            goto again;
-
-        if ( NULL != state && strcmp(p, state) )
-            goto again;
-
-        if ( NULL != check_callback ) {
-            rc = (*check_callback)(gc, domid, p, check_callback_userdata);
-            if ( rc > 0 )
-                goto again;
-        }
-
-        free(p);
-        xs_unwatch(xsh, path, path);
-        xs_close(xsh);
-        return rc;
-again:
-        free(p);
-        FD_ZERO(&rfds);
-        FD_SET(xs_fileno(xsh), &rfds);
-        rc = select(nfds, &rfds, NULL, NULL, &tv);
-        if (rc > 0) {
-            if (FD_ISSET(xs_fileno(xsh), &rfds)) {
-                l = xs_read_watch(xsh, &num);
-                if (l != NULL)
-                    free(l);
-                else
-                    goto again;
-            }
-        }
-    }
-    LOG(ERROR, "%s not ready", what);
-
-    xs_unwatch(xsh, path, path);
-    xs_close(xsh);
-err:
-    return -1;
-}
-
-
 /*----- spawn implementation -----*/
 
 /*
diff --git a/tools/libs/light/libxl_internal.c b/tools/libs/light/libxl_internal.c
index c95624933f..2941ca0bbd 100644
--- a/tools/libs/light/libxl_internal.c
+++ b/tools/libs/light/libxl_internal.c
@@ -387,11 +387,9 @@ int libxl__device_model_version_running(libxl__gc *gc, uint32_t domid)
     path = libxl__xs_libxl_path(gc, domid);
     path = GCSPRINTF("%s/dm-version", path);
     dm_version = libxl__xs_read(gc, XBT_NULL, path);
-    if (!dm_version) {
-        return LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL;
-    }
 
-    if (libxl_device_model_version_from_string(dm_version, &value) < 0) {
+    if (!dm_version ||
+        libxl_device_model_version_from_string(dm_version, &value) < 0) {
         LOGD(ERROR, domid, "fatal: %s contain a wrong value (%s)", path, dm_version);
         return -1;
     }
diff --git a/tools/libs/light/libxl_internal.h b/tools/libs/light/libxl_internal.h
index 408a771310..75bb0b94cf 100644
--- a/tools/libs/light/libxl_internal.h
+++ b/tools/libs/light/libxl_internal.h
@@ -1423,8 +1423,6 @@ _hidden int libxl__build_hvm(libxl__gc *gc, uint32_t domid,
               libxl_domain_config *d_config,
               libxl__domain_build_state *state);
 
-_hidden int libxl__qemu_traditional_cmd(libxl__gc *gc, uint32_t domid,
-                                        const char *cmd);
 _hidden int libxl__domain_rename(libxl__gc *gc, uint32_t domid,
                                  const char *old_name, const char *new_name,
                                  xs_transaction_t trans);
@@ -1914,50 +1912,6 @@ static inline int libxl__spawn_inuse(const libxl__spawn_state *ss)
 _hidden int libxl__spawn_record_pid(libxl__gc*, libxl__spawn_state*,
                                     pid_t innerchild);
 
-/*
- * libxl__xenstore_child_wait_deprecated - Wait for daemonic child IPC
- *
- * This is a NOT function for waiting for ordinary child processes.
- * If you want to run (fork/exec/wait) subprocesses from libxl:
- *  - Make your libxl entrypoint use the ao machinery
- *  - Use libxl__ev_child_fork, and use the callback programming style
- *
- * This function is intended for interprocess communication with a
- * service process.  If the service process does not respond quickly,
- * the whole caller may be blocked.  Therefore this function is
- * deprecated.  This function is currently used only by
- * libxl__wait_for_device_model_deprecated.
- *
- * gc: allocation pool
- * domid: guest to work with
- * timeout: how many seconds to wait for the state to appear
- * what: string describing the spawned process
- * path: path to the state file in xenstore
- * state: expected string to wait for in path (optional)
- * spawning: malloc'd pointer to libxl__spawn_starting (optional)
- * check_callback: (optional)
- * check_callback_userdata: data to pass to the callback function
- *
- * Returns 0 on success, and < 0 on error.
- *
- * This function waits the given timeout for the given path to appear
- * in xenstore, and optionally for state in path.
- * If path appears and state matches, check_callback is called.
- * If check_callback returns > 0, waiting for path or state continues.
- * Otherwise libxl__xenstore_child_wait_deprecated returns.
- */
-_hidden int libxl__xenstore_child_wait_deprecated(libxl__gc *gc,
-                                 uint32_t domid,
-                                 uint32_t timeout, char *what,
-                                 char *path, char *state,
-                                 libxl__spawn_starting *spawning,
-                                 int (*check_callback)(libxl__gc *gc,
-                                                       uint32_t domid,
-                                                       const char *state,
-                                                       void *userdata),
-                                 void *check_callback_userdata);
-
-
  /* low-level stuff, for synchronous subprocesses etc. */
 
 /*
@@ -2022,25 +1976,6 @@ _hidden int libxl__domain_device_construct_rdm(libxl__gc *gc,
                                    uint64_t rdm_mem_guard,
                                    struct xc_dom_image *dom);
 
-/*
- * This function will cause the whole libxl process to hang
- * if the device model does not respond.  It is deprecated.
- *
- * Instead of calling this function:
- *  - Make your libxl entrypoint use the ao machinery
- *  - Use libxl__ev_xswatch_register, and use the callback programming
- *    style
- */
-_hidden int libxl__wait_for_device_model_deprecated(libxl__gc *gc,
-                                uint32_t domid, char *state,
-                                libxl__spawn_starting *spawning
-                                                    /* NULL allowed */,
-                                int (*check_callback)(libxl__gc *gc,
-                                                      uint32_t domid,
-                                                      const char *state,
-                                                      void *userdata),
-                                void *check_callback_userdata);
-
 _hidden const libxl_vnc_info *libxl__dm_vnc(const libxl_domain_config *g_cfg);
 
 _hidden char *libxl__abs_path(libxl__gc *gc, const char *s, const char *path);
@@ -2315,8 +2250,7 @@ _hidden char *libxl__json_object_to_json(libxl__gc *gc,
 #define JSON(o) \
     (libxl__json_object_to_json(gc, (o)) ? : "")
 
-  /* Based on /local/domain/$domid/dm-version xenstore key
-   * default is qemu xen traditional */
+  /* Based on /local/domain/$domid/dm-version xenstore key */
 _hidden int libxl__device_model_version_running(libxl__gc *gc, uint32_t domid);
 
 static inline
diff --git a/tools/libs/light/libxl_pci.c b/tools/libs/light/libxl_pci.c
index a8460fb3ec..2ea2caeb66 100644
--- a/tools/libs/light/libxl_pci.c
+++ b/tools/libs/light/libxl_pci.c
@@ -1023,82 +1023,6 @@ static int pci_multifunction_check(libxl__gc *gc, libxl_device_pci *pci, unsigne
     return 0;
 }
 
-static int pci_ins_check(libxl__gc *gc, uint32_t domid, const char *state, void *priv)
-{
-    char *orig_state = priv;
-
-    if ( !strcmp(state, "pci-insert-failed") )
-        return -1;
-    if ( !strcmp(state, "pci-inserted") )
-        return 0;
-    if ( !strcmp(state, orig_state) )
-        return 1;
-
-    return 1;
-}
-
-static int qemu_pci_add_xenstore(libxl__gc *gc, uint32_t domid,
-                                 libxl_device_pci *pci)
-{
-    libxl_ctx *ctx = libxl__gc_owner(gc);
-    int rc = 0;
-    char *path;
-    char *state, *vdevfn;
-    uint32_t dm_domid;
-
-    dm_domid = libxl_get_stubdom_id(CTX, domid);
-    path = DEVICE_MODEL_XS_PATH(gc, dm_domid, domid, "/state");
-    state = libxl__xs_read(gc, XBT_NULL, path);
-    path = DEVICE_MODEL_XS_PATH(gc, dm_domid, domid, "/parameter");
-    if (pci->vdevfn) {
-        libxl__xs_printf(gc, XBT_NULL, path, PCI_BDF_VDEVFN","PCI_OPTIONS,
-                         pci->domain, pci->bus, pci->dev,
-                         pci->func, pci->vdevfn, pci->msitranslate,
-                         pci->power_mgmt);
-    } else {
-        libxl__xs_printf(gc, XBT_NULL, path, PCI_BDF","PCI_OPTIONS,
-                         pci->domain,  pci->bus, pci->dev,
-                         pci->func, pci->msitranslate, pci->power_mgmt);
-    }
-
-    libxl__qemu_traditional_cmd(gc, domid, "pci-ins");
-    rc = libxl__wait_for_device_model_deprecated(gc, domid, NULL, NULL,
-                                      pci_ins_check, state);
-    path = DEVICE_MODEL_XS_PATH(gc, dm_domid, domid, "/parameter");
-    vdevfn = libxl__xs_read(gc, XBT_NULL, path);
-    path = DEVICE_MODEL_XS_PATH(gc, dm_domid, domid, "/state");
-    if ( rc < 0 )
-        LOGD(ERROR, domid, "qemu refused to add device: %s", vdevfn);
-    else if ( sscanf(vdevfn, "0x%x", &pci->vdevfn) != 1 ) {
-        LOGD(ERROR, domid, "wrong format for the vdevfn: '%s'", vdevfn);
-        rc = -1;
-    }
-    xs_write(ctx->xsh, XBT_NULL, path, state, strlen(state));
-
-    return rc;
-}
-
-static int check_qemu_running(libxl__gc *gc,
-                              libxl_domid domid,
-                              libxl__xswait_state *xswa,
-                              int rc,
-                              const char *state)
-{
-    if (rc) {
-        if (rc == ERROR_TIMEDOUT) {
-            LOGD(ERROR, domid, "%s not ready", xswa->what);
-        }
-        goto out;
-    }
-
-    if (!state || strcmp(state, "running"))
-        return ERROR_NOT_READY;
-
-out:
-    libxl__xswait_stop(gc, xswa);
-    return rc;
-}
-
 typedef struct pci_add_state {
     /* filled by user of do_pci_add */
     libxl__ao_device *aodev;
@@ -1119,8 +1043,6 @@ typedef struct pci_add_state {
     int retries;
 } pci_add_state;
 
-static void pci_add_qemu_trad_watch_state_cb(libxl__egc *egc,
-    libxl__xswait_state *xswa, int rc, const char *state);
 static void pci_add_qmp_device_add(libxl__egc *, pci_add_state *);
 static void pci_add_qmp_device_add_cb(libxl__egc *,
     libxl__ev_qmp *, const libxl__json_object *, int rc);
@@ -1156,16 +1078,6 @@ static void do_pci_add(libxl__egc *egc,
 
     if (type == LIBXL_DOMAIN_TYPE_HVM) {
         switch (libxl__device_model_version_running(gc, domid)) {
-            case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL:
-                pas->xswait.ao = ao;
-                pas->xswait.what = "Device Model";
-                pas->xswait.path = DEVICE_MODEL_XS_PATH(gc,
-                    libxl_get_stubdom_id(CTX, domid), domid, "/state");
-                pas->xswait.timeout_ms = LIBXL_DEVICE_MODEL_START_TIMEOUT * 1000;
-                pas->xswait.callback = pci_add_qemu_trad_watch_state_cb;
-                rc = libxl__xswait_start(gc, &pas->xswait);
-                if (rc) goto out;
-                return;
             case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
                 rc = libxl__ev_time_register_rel(ao, &pas->timeout,
                                                  pci_add_timeout,
@@ -1186,29 +1098,6 @@ out:
     pci_add_dm_done(egc, pas, rc); /* must be last */
 }
 
-static void pci_add_qemu_trad_watch_state_cb(libxl__egc *egc,
-                                             libxl__xswait_state *xswa,
-                                             int rc,
-                                             const char *state)
-{
-    pci_add_state *pas = CONTAINER_OF(xswa, *pas, xswait);
-    STATE_AO_GC(pas->aodev->ao);
-
-    /* Convenience aliases */
-    libxl_domid domid = pas->domid;
-    libxl_device_pci *pci = &pas->pci;
-
-    rc = check_qemu_running(gc, domid, xswa, rc, state);
-    if (rc == ERROR_NOT_READY)
-        return;
-    if (rc)
-        goto out;
-
-    rc = qemu_pci_add_xenstore(gc, domid, pci);
-out:
-    pci_add_dm_done(egc, pas, rc); /* must be last */
-}
-
 static void pci_add_qmp_device_add(libxl__egc *egc, pci_add_state *pas)
 {
     STATE_AO_GC(pas->aodev->ao);
@@ -1882,42 +1771,6 @@ static void add_pcis_done(libxl__egc *egc, libxl__multidev *multidev,
     aodev->callback(egc, aodev);
 }
 
-static int qemu_pci_remove_xenstore(libxl__gc *gc, uint32_t domid,
-                                    libxl_device_pci *pci, int force)
-{
-    libxl_ctx *ctx = libxl__gc_owner(gc);
-    char *state;
-    char *path;
-    uint32_t dm_domid;
-
-    dm_domid = libxl_get_stubdom_id(CTX, domid);
-
-    path = DEVICE_MODEL_XS_PATH(gc, dm_domid, domid, "/state");
-    state = libxl__xs_read(gc, XBT_NULL, path);
-    path = DEVICE_MODEL_XS_PATH(gc, dm_domid, domid, "/parameter");
-    libxl__xs_printf(gc, XBT_NULL, path, PCI_BDF, pci->domain,
-                     pci->bus, pci->dev, pci->func);
-
-    /* Remove all functions at once atomically by only signalling
-     * device-model for function 0 */
-    if ( !force && (pci->vdevfn & 0x7) == 0 ) {
-        libxl__qemu_traditional_cmd(gc, domid, "pci-rem");
-        if (libxl__wait_for_device_model_deprecated(gc, domid, "pci-removed",
-                                         NULL, NULL, NULL) < 0) {
-            LOGD(ERROR, domid, "Device Model didn't respond in time");
-            /* This depends on guest operating system acknowledging the
-             * SCI, if it doesn't respond in time then we may wish to
-             * force the removal.
-             */
-            return ERROR_FAIL;
-        }
-    }
-    path = DEVICE_MODEL_XS_PATH(gc, dm_domid, domid, "/state");
-    xs_write(ctx->xsh, XBT_NULL, path, state, strlen(state));
-
-    return 0;
-}
-
 typedef struct pci_remove_state {
     libxl__ao_device *aodev;
     libxl_domid domid;
@@ -1940,8 +1793,6 @@ static void libxl__device_pci_remove_common(libxl__egc *egc,
 static void device_pci_remove_common_next(libxl__egc *egc,
     pci_remove_state *prs, int rc);
 
-static void pci_remove_qemu_trad_watch_state_cb(libxl__egc *egc,
-    libxl__xswait_state *xswa, int rc, const char *state);
 static void pci_remove_qmp_device_del(libxl__egc *egc,
     pci_remove_state *prs);
 static void pci_remove_qmp_device_del_cb(libxl__egc *egc,
@@ -1987,16 +1838,6 @@ static void do_pci_remove(libxl__egc *egc, pci_remove_state *prs)
     if (type == LIBXL_DOMAIN_TYPE_HVM) {
         prs->hvm = true;
         switch (libxl__device_model_version_running(gc, domid)) {
-        case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL:
-            prs->xswait.ao = ao;
-            prs->xswait.what = "Device Model";
-            prs->xswait.path = DEVICE_MODEL_XS_PATH(gc,
-                libxl_get_stubdom_id(CTX, domid), domid, "/state");
-            prs->xswait.timeout_ms = LIBXL_DEVICE_MODEL_START_TIMEOUT * 1000;
-            prs->xswait.callback = pci_remove_qemu_trad_watch_state_cb;
-            rc = libxl__xswait_start(gc, &prs->xswait);
-            if (rc) goto out_fail;
-            return;
         case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
             pci_remove_qmp_device_del(egc, prs); /* must be last */
             return;
@@ -2010,30 +1851,6 @@ out_fail:
     pci_remove_detached(egc, prs, rc); /* must be last */
 }
 
-static void pci_remove_qemu_trad_watch_state_cb(libxl__egc *egc,
-                                                libxl__xswait_state *xswa,
-                                                int rc,
-                                                const char *state)
-{
-    pci_remove_state *prs = CONTAINER_OF(xswa, *prs, xswait);
-    STATE_AO_GC(prs->aodev->ao);
-
-    /* Convenience aliases */
-    libxl_domid domid = prs->domid;
-    libxl_device_pci *const pci = &prs->pci;
-
-    rc = check_qemu_running(gc, domid, xswa, rc, state);
-    if (rc == ERROR_NOT_READY)
-        return;
-    if (rc)
-        goto out;
-
-    rc = qemu_pci_remove_xenstore(gc, domid, pci, prs->force);
-
-out:
-    pci_remove_detached(egc, prs, rc);
-}
-
 static void pci_remove_qmp_device_del(libxl__egc *egc,
                                       pci_remove_state *prs)
 {
diff --git a/tools/libs/light/libxl_sr_stream_format.h b/tools/libs/light/libxl_sr_stream_format.h
index 75f5190886..f8f4723c2e 100644
--- a/tools/libs/light/libxl_sr_stream_format.h
+++ b/tools/libs/light/libxl_sr_stream_format.h
@@ -45,7 +45,7 @@ typedef struct libxl__sr_emulator_hdr
 } libxl__sr_emulator_hdr;
 
 #define EMULATOR_UNKNOWN             0x00000000U
-#define EMULATOR_QEMU_TRADITIONAL    0x00000001U
+#define EMULATOR_QEMU_TRADITIONAL    0x00000001U /* Dropped in Xen 4.21 */
 #define EMULATOR_QEMU_UPSTREAM       0x00000002U
 
 typedef struct libxl_sr_checkpoint_state
diff --git a/tools/libs/light/libxl_stream_write.c b/tools/libs/light/libxl_stream_write.c
index 634f3240d1..98d44597a7 100644
--- a/tools/libs/light/libxl_stream_write.c
+++ b/tools/libs/light/libxl_stream_write.c
@@ -252,10 +252,6 @@ void libxl__stream_write_start(libxl__egc *egc,
         stream->device_model_version =
             libxl__device_model_version_running(gc, dss->domid);
         switch (stream->device_model_version) {
-        case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL:
-            stream->emu_sub_hdr.id = EMULATOR_QEMU_TRADITIONAL;
-            break;
-
         case LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN:
             stream->emu_sub_hdr.id = EMULATOR_QEMU_UPSTREAM;
             break;
diff --git a/tools/libs/light/libxl_types.idl b/tools/libs/light/libxl_types.idl
index 9bb2969931..1985153830 100644
--- a/tools/libs/light/libxl_types.idl
+++ b/tools/libs/light/libxl_types.idl
@@ -104,7 +104,7 @@ libxl_channel_connection = Enumeration("channel_connection", [
 
 libxl_device_model_version = Enumeration("device_model_version", [
     (0, "UNKNOWN"),
-    (1, "QEMU_XEN_TRADITIONAL"), # Historical qemu-xen device model (qemu-dm)
+    (1, "QEMU_XEN_TRADITIONAL"), # Historical dm (qemu-dm, no longer supported)
     (2, "QEMU_XEN"),             # Upstream based qemu-xen device model
     ])
 
diff --git a/tools/python/xen/migration/libxl.py b/tools/python/xen/migration/libxl.py
index 5dcb50fe02..dc5c7ac355 100644
--- a/tools/python/xen/migration/libxl.py
+++ b/tools/python/xen/migration/libxl.py
@@ -51,12 +51,10 @@ rec_type_to_str = {
 EMULATOR_HEADER_FORMAT = "II"
 
 EMULATOR_ID_unknown       = 0x00000000
-EMULATOR_ID_qemu_trad     = 0x00000001
 EMULATOR_ID_qemu_upstream = 0x00000002
 
 emulator_id_to_str = {
     EMULATOR_ID_unknown       : "Unknown",
-    EMULATOR_ID_qemu_trad     : "Qemu Traditional",
     EMULATOR_ID_qemu_upstream : "Qemu Upstream",
 }
 
diff --git a/tools/xl/xl_parse.c b/tools/xl/xl_parse.c
index 089a88935a..219e924779 100644
--- a/tools/xl/xl_parse.c
+++ b/tools/xl/xl_parse.c
@@ -2733,10 +2733,7 @@ skip_usbdev:
     xlu_cfg_replace_string (config, "device_model_override",
                             &b_info->device_model, 0);
     if (!xlu_cfg_get_string (config, "device_model_version", &buf, 0)) {
-        if (!strcmp(buf, "qemu-xen-traditional")) {
-            b_info->device_model_version
-                = LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN_TRADITIONAL;
-        } else if (!strcmp(buf, "qemu-xen")) {
+        if (!strcmp(buf, "qemu-xen")) {
             b_info->device_model_version
                 = LIBXL_DEVICE_MODEL_VERSION_QEMU_XEN;
         } else {
-- 
2.43.0



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From: Juergen Gross 
To: xen-devel@lists.xenproject.org
Cc: Juergen Gross ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini ,
	Oleksii Kurochko ,
	Community Manager ,
	Samuel Thibault 
Subject: [PATCH v3 3/4] tools: remove qemu-traditional
Date: Tue, 29 Apr 2025 13:06:33 +0200
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Remove qemu traditional from the tree.

Signed-off-by: Juergen Gross 
Acked-by: Oleksii Kurochko  # CHANGELOG.md
---
V3:
- remove another ioemu reference in INSTALL (Anthony Perard)
- remove generating stubdompath.sh and related makefile helpers
  (Anthony Perard)
---
 .gitignore                                    |  3 -
 CHANGELOG.md                                  |  1 +
 Config.mk                                     | 38 --------
 INSTALL                                       | 13 ---
 MAINTAINERS                                   |  4 -
 README                                        |  2 +-
 SUPPORT.md                                    | 16 ---
 config/Paths.mk.in                            |  3 +-
 config/Tools.mk.in                            |  1 -
 docs/process/branching-checklist.txt          |  1 -
 docs/process/release-technician-checklist.txt |  1 -
 stubdom/.gitignore                            |  3 -
 stubdom/Makefile                              | 97 ++-----------------
 stubdom/configure                             | 89 -----------------
 stubdom/configure.ac                          | 15 ---
 stubdom/ioemu-minios.cfg                      |  6 --
 tools/Makefile                                | 58 -----------
 tools/Rules.mk                                |  3 -
 tools/config.h.in                             |  3 -
 tools/configure                               | 42 +-------
 tools/configure.ac                            | 21 +---
 21 files changed, 15 insertions(+), 405 deletions(-)
 delete mode 100644 stubdom/ioemu-minios.cfg

diff --git a/.gitignore b/.gitignore
index 53f5df0003..ccc0bebee6 100644
--- a/.gitignore
+++ b/.gitignore
@@ -255,9 +255,6 @@ LibVNCServer*
 tools/qemu-xen-dir-remote
 tools/qemu-xen-dir
 
-tools/qemu-xen-traditional-dir-remote
-tools/qemu-xen-traditional-dir
-
 tools/firmware/seabios-dir-remote
 tools/firmware/seabios-dir
 
diff --git a/CHANGELOG.md b/CHANGELOG.md
index 1ea06524db..c6e8ff09ba 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -24,6 +24,7 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/)
     - Ability to enable stack protector
 
 ### Removed
+ - Support of qemu-traditional has been removed.
 
 ## [4.20.0](https://xenbits.xenproject.org/gitweb/?p=xen.git;a=shortlog;h=RELEASE-4.20.0) - 2025-03-05
 
diff --git a/Config.mk b/Config.mk
index 8be7733d9e..3ebc9ac125 100644
--- a/Config.mk
+++ b/Config.mk
@@ -165,20 +165,6 @@ define move-if-changed
 	if ! cmp -s $(1) $(2); then mv -f $(1) $(2); else rm -f $(1); fi
 endef
 
-BUILD_MAKE_VARS := sbindir bindir LIBEXEC LIBEXEC_BIN libdir SHAREDIR \
-                   XENFIRMWAREDIR XEN_CONFIG_DIR XEN_SCRIPT_DIR XEN_LOCK_DIR \
-                   XEN_RUN_DIR XEN_PAGING_DIR XEN_DUMP_DIR XEN_LOG_DIR \
-                   XEN_LIB_DIR XEN_RUN_STORED
-
-buildmakevars2file = $(eval $(call buildmakevars2file-closure,$(1)))
-define buildmakevars2file-closure
-    $(1): .phony
-	rm -f $(1).tmp; \
-	$(foreach var, $(BUILD_MAKE_VARS), \
-	          echo "$(var)=\"$($(var))\"" >>$(1).tmp;) \
-	$(call move-if-changed,$(1).tmp,$(1))
-endef
-
 CFLAGS += -fno-strict-aliasing
 
 CFLAGS += -std=gnu99
@@ -208,22 +194,12 @@ XEN_EXTFILES_URL ?= https://xenbits.xen.org/xen-extfiles
 
 # Where to look for inlined subtrees (for example, from a tarball)
 QEMU_UPSTREAM_INTREE ?= $(XEN_ROOT)/tools/qemu-xen
-QEMU_TRADITIONAL_INTREE ?= $(XEN_ROOT)/tools/qemu-xen-traditional
 
 
 # Handle legacy options
 ifneq (,$(SEABIOS_UPSTREAM_TAG))
 SEABIOS_UPSTREAM_REVISION ?= $(SEABIOS_UPSTREAM_TAG)
 endif
-ifneq (,$(QEMU_REMOTE))
-QEMU_TRADITIONAL_URL ?= $(QEMU_REMOTE)
-endif
-ifneq (,$(CONFIG_QEMU))
-QEMU_TRADITIONAL_LOC ?= $(CONFIG_QEMU)
-endif
-ifneq (,$(QEMU_TAG))
-QEMU_TRADITIONAL_REVISION ?= $(QEMU_TAG)
-endif
 
 OVMF_UPSTREAM_URL ?= https://xenbits.xen.org/git-http/ovmf.git
 OVMF_UPSTREAM_REVISION ?= ba91d0292e593df8528b66f99c1b0b14fadc8e16
@@ -239,20 +215,6 @@ SEABIOS_UPSTREAM_REVISION ?= rel-1.16.3
 
 ETHERBOOT_NICS ?= rtl8139 8086100e
 
-
-QEMU_TRADITIONAL_URL ?= https://xenbits.xen.org/git-http/qemu-xen-traditional.git
-QEMU_TRADITIONAL_REVISION ?= 3d273dd05e51e5a1ffba3d98c7437ee84e8f8764
-# Wed Jul 15 10:01:40 2020 +0100
-# qemu-trad: remove Xen path dependencies
-
-# Specify which qemu-dm to use. This may be `ioemu' to use the old
-# Mercurial in-tree version, or a local directory, or a git URL.
-# QEMU_UPSTREAM_LOC ?= `pwd`/$(XEN_ROOT)/../qemu-xen.git
-
-# Defaults for subtree locations
-QEMU_TRADITIONAL_LOC ?= $(call or,$(wildcard $(QEMU_TRADITIONAL_INTREE)),\
-                                  $(QEMU_TRADITIONAL_URL))
-
 QEMU_UPSTREAM_LOC ?= $(call or,$(wildcard $(QEMU_UPSTREAM_INTREE)),\
                                $(QEMU_UPSTREAM_URL))
 
diff --git a/INSTALL b/INSTALL
index 88c1464816..eadf108aa5 100644
--- a/INSTALL
+++ b/INSTALL
@@ -113,15 +113,6 @@ Build a private copy of SeaBIOS.
 Use the given SeaBIOS binary instead of compiling a private copy.
   --with-system-seabios=PATH
 
-Build the old qemu used by xm/xend. This is required if existing domUs
-should be migrated to this host, or if existing domU snapshots should be
-started with this version of the tools. Only if all domUs used the new
-upstream qemu during initial start it is safe to disable this option.
-The old qemu requires rombios, which can be disable along with
-qemu-traditional.
-  --enable-qemu-traditional
-  --enable-rombios
-
 The libxl toolstack uses the upstream qemu per default. A private copy
 will be built. If desired this private copy can be configured with
 additional options passed to its configure script.
@@ -161,7 +152,6 @@ this detection and the sysv runlevel scripts have to be used.
 
 Build various stubom components, some are only example code. Its usually
 enough to specify just --enable-stubdom and leave these options alone.
-  --enable-ioemu-stubdom
   --enable-c-stubdom
   --disable-pv-grub
   --disable-xenstore-stubdom
@@ -245,7 +235,6 @@ locations.
 XEN_EXTFILES_URL=
 OVMF_UPSTREAM_URL=
 QEMU_UPSTREAM_URL=
-QEMU_TRADITIONAL_URL=
 SEABIOS_UPSTREAM_URL=
 MINIOS_UPSTREAM_URL=
 
@@ -253,7 +242,6 @@ Using additional CFLAGS to build tools which will run in dom0 is
 required when building distro packages. These variables can be used to
 pass RPM_OPT_FLAGS.
 EXTRA_CFLAGS_XEN_TOOLS=
-EXTRA_CFLAGS_QEMU_TRADITIONAL=
 EXTRA_CFLAGS_QEMU_XEN=
 
 Additional CFLAGS may be supplied to the build of the hypervisor by
@@ -340,7 +328,6 @@ sudo make install BOOT_DIR=/ood/path/boot EFI_DIR=/odd/path/efi
 export WGET=$(type -P false)
 export GIT=$(type -P false)
 export EXTRA_CFLAGS_XEN_TOOLS="$RPM_OPT_FLAGS"
-export EXTRA_CFLAGS_QEMU_TRADITIONAL="$RPM_OPT_FLAGS"
 export EXTRA_CFLAGS_QEMU_XEN="$RPM_OPT_FLAGS"
 %configure \
         --with-initddir=%{_initddir}
diff --git a/MAINTAINERS b/MAINTAINERS
index c11b82eca9..7d1b3b8641 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -466,10 +466,6 @@ M:	Marek Marczykowski-Górecki 
 S:	Supported
 F:	tools/python
 
-QEMU-DM
-S:	Supported
-T:	git https://xenbits.xenproject.org/git-http/qemu-xen-traditional.git
-
 QEMU UPSTREAM
 M:	Stefano Stabellini 
 M:	Anthony Perard 
diff --git a/README b/README
index be90be3910..6ee58f7b35 100644
--- a/README
+++ b/README
@@ -80,7 +80,7 @@ disabled at compile time:
       libnl-3-dev, etc).  Required if network buffering is desired
       when using Remus with libxl.  See docs/README.remus for detailed
       information.
-    * 16-bit x86 assembler, loader and compiler for qemu-traditional / rombios
+    * 16-bit x86 assembler, loader and compiler for rombios
       (dev86 rpm or bin86 & bcc debs)
     * Development install of liblzma for rombios
     * Development install of libbz2, liblzma, liblzo2, and libzstd for DomU
diff --git a/SUPPORT.md b/SUPPORT.md
index e8fd0c251e..5eecf1dcbc 100644
--- a/SUPPORT.md
+++ b/SUPPORT.md
@@ -998,21 +998,6 @@ See the section **Blkback** for image formats supported by QEMU.
 
     Status: Supported, not security supported
 
-### qemu-xen-traditional ###
-
-The Xen Project provides an old version of qemu with modifications
-which enable use as a device model stub domain.  The old version is
-normally selected by default only in a stub dm configuration, but it
-can be requested explicitly in other configurations, for example in
-`xl` with `device_model_version="QEMU_XEN_TRADITIONAL"`.
-
-    Status, Device Model Stub Domains: Supported, with caveats
-    Status, as host process device model: No security support, not recommended
-
-qemu-xen-traditional is security supported only for those available
-devices which are supported for mainstream QEMU (see above), with
-trusted driver domains (see Device Model Stub Domains).
-
 ## Virtual Firmware
 
 ### x86/HVM iPXE
@@ -1031,7 +1016,6 @@ as the guest itself.
 Booting a guest via guest BIOS firmware
 
     Status, SeaBIOS (qemu-xen): Supported
-    Status, ROMBIOS (qemu-xen-traditional): Supported
 
 ### x86/HVM OVMF
 
diff --git a/config/Paths.mk.in b/config/Paths.mk.in
index 38b1bb6b1f..bc42748b7a 100644
--- a/config/Paths.mk.in
+++ b/config/Paths.mk.in
@@ -5,8 +5,7 @@
 # because of this these variables are defined on one master input source file
 # and is generated after running ./configure. The master source is located
 # on the xen source tree at under config/Paths.mk.in and it is used to
-# generate shell or header files by the build system upon demand through the
-# use of the helper makefile helper buildmakevars2file().
+# generate shell or header files by the build system upon demand.
 #
 # For more documentation you can refer to the wiki:
 #
diff --git a/config/Tools.mk.in b/config/Tools.mk.in
index 37c071961e..463ab75965 100644
--- a/config/Tools.mk.in
+++ b/config/Tools.mk.in
@@ -43,7 +43,6 @@ CONFIG_OVMF         := @ovmf@
 CONFIG_ROMBIOS      := @rombios@
 CONFIG_SEABIOS      := @seabios@
 CONFIG_IPXE         := @ipxe@
-CONFIG_QEMU_TRAD    := @qemu_traditional@
 CONFIG_QEMU_XEN     := @qemu_xen@
 CONFIG_QEMUU_EXTRA_ARGS:= @EXTRA_QEMUU_CONFIGURE_ARGS@
 CONFIG_LIBNL        := @libnl@
diff --git a/docs/process/branching-checklist.txt b/docs/process/branching-checklist.txt
index aa7a27eed5..9632888a56 100644
--- a/docs/process/branching-checklist.txt
+++ b/docs/process/branching-checklist.txt
@@ -71,7 +71,6 @@ ov=4.0
 Ensure references to qemu trees and Mini-OS in xen.git's Config.mk are updated.
 The variables and there content should be:
   * QEMU_UPSTREAM_REVISION: qemu-xen-X.Y.0
-  * QEMU_TRADITIONAL_REVISION: xen-X.Y.0
   * MINIOS_UPSTREAM_REVISION: xen-RELEASE-X.Y.0
 Where X.Y is the release version (e.g. 4.17).
 
diff --git a/docs/process/release-technician-checklist.txt b/docs/process/release-technician-checklist.txt
index 829e8ec47b..64ed9fd5b2 100644
--- a/docs/process/release-technician-checklist.txt
+++ b/docs/process/release-technician-checklist.txt
@@ -56,7 +56,6 @@ t=RELEASE-$r
 
 * change xen-unstable Config.mk
 #   QEMU_UPSTREAM_REVISION,
-#   QEMU_TRADITIONAL_REVISION
 #   MINIOS_UPSTREAM_REVISION
 #     (drop any references to the specific commits, e.g. date or title)
 * change SUPPORT.md heading version number; -unstable or -rc tag
diff --git a/stubdom/.gitignore b/stubdom/.gitignore
index 23350446b9..1b69656d45 100644
--- a/stubdom/.gitignore
+++ b/stubdom/.gitignore
@@ -11,8 +11,6 @@
 /gmp-*
 /grub-*
 /include
-/ioemu
-/ioemu/
 /libs-*
 /libxencall-*
 /libxenevtchn-*
@@ -29,7 +27,6 @@
 /pciutils-*
 /pkg-config/*
 /polarssl-*
-/stubdompath.sh
 /tpm_emulator-*
 /vtpm/vtpm_manager.h
 /xenstore
diff --git a/stubdom/Makefile b/stubdom/Makefile
index 724ce40365..666c3221dc 100644
--- a/stubdom/Makefile
+++ b/stubdom/Makefile
@@ -7,7 +7,6 @@ export PKG_CONFIG_DIR = $(CURDIR)/pkg-config
 
 # Remove flags which are meant for tools, e.g. "-m64"
 export EXTRA_CFLAGS_XEN_TOOLS=
-export EXTRA_CFLAGS_QEMU_TRADITIONAL=
 
 export stubdom=y
 export debug=y
@@ -71,16 +70,12 @@ TARGET_LDFLAGS += -nostdlib -L$(CROSS_PREFIX)/$(GNU_TARGET_ARCH)-xen-elf/lib
 
 TARGETS=$(STUBDOM_TARGETS)
 
-STUBDOMPATH="stubdompath.sh"
-genpath-target = $(call buildmakevars2file,$(STUBDOMPATH))
-$(eval $(genpath-target))
-
 .PHONY: all
 all: build
 ifeq ($(STUBDOM_SUPPORTED),1)
-build: $(STUBDOMPATH) $(STUBDOM_BUILD)
+build: $(STUBDOM_BUILD)
 else
-build: $(STUBDOMPATH)
+build:
 endif
 
 ##############
@@ -267,43 +262,6 @@ cross-tpmemu: $(TPMEMU_STAMPFILE)
 .PHONY: $(CROSS_ROOT)
 $(CROSS_ROOT): cross-newlib cross-zlib cross-libpci
 
-QEMU_ROOT := $(shell if [ -d "$(QEMU_TRADITIONAL_LOC)" ]; then echo "$(QEMU_TRADITIONAL_LOC)"; else echo .; fi)
-
-ifneq ($(filter ioemu,$(STUBDOM_TARGETS)),)
-IOEMU_LINKFARM_TARGET := ioemu/linkfarm.stamp
-endif
-
-ifeq ($(QEMU_ROOT),.)
-$(XEN_ROOT)/tools/qemu-xen-traditional-dir:
-	$(MAKE) DESTDIR= -C $(XEN_ROOT)/tools qemu-xen-traditional-dir-find
-
-ioemu/linkfarm.stamp: $(XEN_ROOT)/tools/qemu-xen-traditional-dir
-	mkdir -p ioemu
-	set -e;									\
-	$(buildmakevars2shellvars);						\
-	cd ioemu;								\
-	src="$$XEN_ROOT/tools/qemu-xen-traditional-dir"; export src;		\
-	(cd $$src && find * -type d						\
-		$(addprefix ! -path , '*-softmmu*' '*-linux-user*') -print)	\
-		| xargs mkdir -p;						\
-	(cd $$src && find *	! -type l  -type f  $(addprefix ! -path ,	\
-			'*.[oda1]' 'config-*' config.mak qemu-dm qemu-img-xen	\
-			'*.html' '*.pod' '*-softmmu*' '*-linux-user*'		\
-			)) >linkfarm.stamp.tmp;				\
-	cmp -s linkfarm.stamp.tmp linkfarm.stamp &&			\
-		rm linkfarm.stamp.tmp || {				\
-		mv linkfarm.stamp.tmp linkfarm.stamp;			\
-		cat linkfarm.stamp | while read f;			\
-			do rm -f "$$f"; ln -s "$$src/$$f" "$$f"; done;	\
-	}
-else
-export QEMU_ROOT
-
-ioemu/linkfarm.stamp:
-	mkdir -p ioemu
-	touch ioemu/linkfarm.stamp
-endif
-
 #######
 # libraries under tools/libs
 #######
@@ -380,29 +338,6 @@ $(TARGETS_MINIOS): mini-os-%:
                 mkdir -p $@/$$i ; \
 	done
 
-#######
-# ioemu
-#######
-
-ioemu-minios.gen.cfg: APP_LIBS = evtchn gnttab ctrl guest
-ioemu-minios.gen.cfg: ioemu-minios.cfg Makefile
-	$(GEN_config) >$@
-
-ioemu-minios-config.mk: ioemu-minios.gen.cfg
-	MINIOS_CONFIG="$(CURDIR)/$<" CONFIG_FILE="$(CURDIR)/$@" $(MAKE) DESTDIR= -C $(MINI_OS) config
-
-.PHONY: ioemu
-ioemu: cross-zlib cross-libpci libxenguest ioemu-minios-config.mk
-	[ -f ioemu/config-host.mak ] || \
-	  ( $(buildmakevars2shellvars); \
-	    cd ioemu ; \
-	    LWIPDIR=$(CURDIR)/lwip-$(XEN_TARGET_ARCH) \
-	    TARGET_CPPFLAGS="$(TARGET_CPPFLAGS) $(shell cat ioemu-minios-config.mk)" \
-	    TARGET_CFLAGS="$(TARGET_CFLAGS)" \
-	    TARGET_LDFLAGS="$(TARGET_LDFLAGS)" \
-	    $(QEMU_ROOT)/xen-setup-stubdom )
-	$(MAKE) DESTDIR= -C ioemu -f $(QEMU_ROOT)/Makefile
-
 ###
 # C
 ###
@@ -496,11 +431,6 @@ xenstorepvh: $(CROSS_ROOT) xenstorepvh-minios-config.mk
 # minios
 ########
 
-.PHONY: ioemu-stubdom
-ioemu-stubdom: APP_OBJS=$(CURDIR)/ioemu/i386-stubdom/qemu.a $(CURDIR)/ioemu/i386-stubdom/libqemu.a $(CURDIR)/ioemu/libqemu_common.a
-ioemu-stubdom: mini-os-$(XEN_TARGET_ARCH)-ioemu lwip-$(XEN_TARGET_ARCH) libxenguest ioemu
-	DEF_CPPFLAGS="$(TARGET_CPPFLAGS)" DEF_CFLAGS="$(TARGET_CFLAGS)" DEF_LDFLAGS="$(TARGET_LDFLAGS)" MINIOS_CONFIG="$(CURDIR)/ioemu-minios.gen.cfg" $(MAKE) DESTDIR= -C $(MINI_OS) OBJ_DIR=$(CURDIR)/$< LWIPDIR=$(CURDIR)/lwip-$(XEN_TARGET_ARCH) APP_OBJS="$(APP_OBJS)"
-
 .PHONY: c-stubdom
 c-stubdom: mini-os-$(XEN_TARGET_ARCH)-c lwip-$(XEN_TARGET_ARCH) libxenguest c
 	DEF_CPPFLAGS="$(TARGET_CPPFLAGS)" DEF_CFLAGS="$(TARGET_CFLAGS)" DEF_LDFLAGS="$(TARGET_LDFLAGS)" MINIOS_CONFIG="$(CURDIR)/c/minios.cfg" $(MAKE) DESTDIR= -C $(MINI_OS) OBJ_DIR=$(CURDIR)/$< LWIPDIR=$(CURDIR)/lwip-$(XEN_TARGET_ARCH) APP_OBJS=$(CURDIR)/c/main.a
@@ -539,18 +469,11 @@ xenstorepvh-stubdom: mini-os-$(XEN_TARGET_ARCH)-xenstorepvh $(XENSTORE_DEPS) xen
 #########
 
 ifeq ($(STUBDOM_SUPPORTED),1)
-install: $(STUBDOMPATH) $(STUBDOM_INSTALL)
+install: $(STUBDOM_INSTALL)
 else
-install: $(STUBDOMPATH)
+install:
 endif
 
-install-ioemu: ioemu-stubdom
-	$(INSTALL_DIR) "$(DESTDIR)$(LIBEXEC_BIN)"
-	$(INSTALL_PROG) stubdom-dm "$(DESTDIR)$(LIBEXEC_BIN)"
-	$(INSTALL_DATA) stubdompath.sh "$(DESTDIR)$(LIBEXEC_BIN)"
-	$(INSTALL_DIR) "$(DESTDIR)$(XENFIRMWAREDIR)"
-	$(INSTALL_DATA) mini-os-$(XEN_TARGET_ARCH)-ioemu/mini-os.gz "$(DESTDIR)$(XENFIRMWAREDIR)/ioemu-stubdom.gz"
-
 install-grub: pv-grub
 	$(INSTALL_DIR) "$(DESTDIR)$(XENFIRMWAREDIR)"
 	$(INSTALL_DATA) mini-os-$(XEN_TARGET_ARCH)-grub/mini-os.gz "$(DESTDIR)$(XENFIRMWAREDIR)/pv-grub-$(XEN_TARGET_ARCH).gz"
@@ -593,11 +516,6 @@ else
 uninstall:
 endif
 
-uninstall-ioemu:
-	rm -f $(DESTDIR)$(LIBEXEC_BIN)/stubdom-dm
-	rm -f $(DESTDIR)$(LIBEXEC_BIN)/stubdompath.sh
-	rm -f $(DESTDIR)$(XENFIRMWAREDIR)/ioemu-stubdom.gz
-
 uninstall-grub:
 	rm -f $(DESTDIR)$(XENFIRMWAREDIR)/pv-grub-$(XEN_TARGET_ARCH).gz
 
@@ -617,11 +535,10 @@ uninstall-vtpmmgr:
 # clean
 #######
 
-# Only clean the libxc/ioemu/mini-os part
+# Only clean the libxc/mini-os part
 .PHONY: clean
 clean: $(foreach lib,$(STUB_LIBS),clean-libxen$(lib))
 clean:
-	rm -fr mini-os-$(XEN_TARGET_ARCH)-ioemu
 	rm -fr mini-os-$(XEN_TARGET_ARCH)-c
 	rm -fr mini-os-$(XEN_TARGET_ARCH)-grub
 	rm -fr mini-os-$(XEN_TARGET_ARCH)-xenstore
@@ -632,11 +549,9 @@ clean:
 	$(MAKE) -C vtpm clean
 	$(MAKE) -C vtpmmgr clean
 	rm -fr grub-$(XEN_TARGET_ARCH)
-	rm -f $(STUBDOMPATH)
 	rm -f *-minios-config.mk
 	rm -f *.gen.cfg
 	rm -fr pkg-config
-	-[ ! -d ioemu ] || $(MAKE) DESTDIR= -C ioemu clean
 	-[ ! -d xenstore ] || $(MAKE) -f $(CURDIR)/xenlibs.mk -C xenstore clean
 	-[ ! -d xenstorepvh ] || $(MAKE) -f $(CURDIR)/xenlibs.mk -C xenstorepvh clean
 
@@ -647,7 +562,7 @@ crossclean: clean
 	rm -fr newlib-$(XEN_TARGET_ARCH)
 	rm -fr zlib-$(XEN_TARGET_ARCH) pciutils-$(XEN_TARGET_ARCH)
 	rm -fr libs-$(XEN_TARGET_ARCH)
-	rm -fr ioemu xenstore xenstorepvh
+	rm -fr xenstore xenstorepvh
 	rm -fr gmp-$(XEN_TARGET_ARCH)
 	rm -fr polarssl-$(XEN_TARGET_ARCH)
 	rm -fr tpm_emulator-$(XEN_TARGET_ARCH)
diff --git a/stubdom/configure b/stubdom/configure
index 08cacf764c..9dd0e7c796 100755
--- a/stubdom/configure
+++ b/stubdom/configure
@@ -622,7 +622,6 @@ STUBDOM_UNINSTALL
 STUBDOM_INSTALL
 STUBDOM_BUILD
 STUBDOM_TARGETS
-ioemu
 vtpmmgr
 vtpm
 TPMEMU_VERSION
@@ -713,14 +712,12 @@ SHELL'
 ac_subst_files=''
 ac_user_opts='
 enable_option_checking
-enable_ioemu_stubdom
 enable_c_stubdom
 enable_pv_grub
 enable_xenstore_stubdom
 enable_xenstorepvh_stubdom
 enable_vtpm_stubdom
 enable_vtpmmgr_stubdom
-enable_qemu_traditional
 enable_debug
 enable_extfiles
 '
@@ -1363,7 +1360,6 @@ Optional Features:
   --disable-option-checking  ignore unrecognized --enable/--with options
   --disable-FEATURE       do not include FEATURE (same as --enable-FEATURE=no)
   --enable-FEATURE[=ARG]  include FEATURE [ARG=yes]
-  --enable-ioemu-stubdom  Build and install ioemu-stubdom
   --enable-c-stubdom      Build and install c-stubdom (default is DISABLED)
   --enable-pv-grub        Build and install pv-grub (default is DISABLED)
   --disable-xenstore-stubdom
@@ -1375,7 +1371,6 @@ Optional Features:
   --enable-vtpm-stubdom   Build and install vtpm-stubdom
   --enable-vtpmmgr-stubdom
                           Build and install vtpmmgr-stubdom
-
   --disable-debug         Disable debug build of stubdom (default is ENABLED)
   --disable-extfiles      Use xen extfiles repository for libraries (default
                           is ENABLED)
@@ -2411,40 +2406,6 @@ case $host_os in *\ *) host_os=`echo "$host_os" | sed 's/ /-/g'`;; esac
 
 # Enable/disable stub domains
 
-# Check whether --enable-ioemu-stubdom was given.
-if test ${enable_ioemu_stubdom+y}
-then :
-  enableval=$enable_ioemu_stubdom;
-
-if test "x$enableval" = "xyes"
-then :
-
-
-ioemu=y
-STUBDOM_TARGETS="$STUBDOM_TARGETS ioemu"
-STUBDOM_BUILD="$STUBDOM_BUILD ioemu-stubdom"
-STUBDOM_INSTALL="$STUBDOM_INSTALL install-ioemu"
-STUBDOM_UNINSTALL="$STUBDOM_UNINSTALL install-ioemu"
-
-
-else $as_nop
-
-if test "x$enableval" = "xno"
-then :
-
-
-ioemu=n
-
-
-fi
-
-fi
-
-
-fi
-
-
-
 # Check whether --enable-c-stubdom was given.
 if test ${enable_c_stubdom+y}
 then :
@@ -2685,35 +2646,6 @@ fi
 
 
 
-# Check whether --enable-qemu-traditional was given.
-if test ${enable_qemu_traditional+y}
-then :
-  enableval=$enable_qemu_traditional;
-fi
-
-if test "x$enable_qemu_traditional" = "xyes"
-then :
-
-    qemu_traditional=y
-else $as_nop
-
-    qemu_traditional=n
-
-fi
-if test "x$ioemu" = "x"
-then :
-
-    ioemu=$qemu_traditional
-
-fi
-echo "x$ioemu$qemu_traditional"
-if test "x$ioemu$qemu_traditional" = "xyn"
-then :
-
-    as_fn_error $? "IOEMU stubdomain requires qemu-traditional" "$LINENO" 5
-
-fi
-
 
 # Check whether --enable-debug was given.
 if test ${enable_debug+y}
@@ -4358,27 +4290,6 @@ fi
 
 
 
-if test "x$ioemu" = "xy" || test "x$ioemu" = "x"
-then :
-
-
-ioemu=y
-STUBDOM_TARGETS="$STUBDOM_TARGETS ioemu"
-STUBDOM_BUILD="$STUBDOM_BUILD ioemu-stubdom"
-STUBDOM_INSTALL="$STUBDOM_INSTALL install-ioemu"
-STUBDOM_UNINSTALL="$STUBDOM_UNINSTALL install-ioemu"
-
-
-else $as_nop
-
-
-ioemu=n
-
-
-fi
-
-
-
 
 
 
diff --git a/stubdom/configure.ac b/stubdom/configure.ac
index fc736c0387..f07b08c5b3 100644
--- a/stubdom/configure.ac
+++ b/stubdom/configure.ac
@@ -18,7 +18,6 @@ m4_include([../m4/depends.m4])
 m4_include([../m4/fetcher.m4])
 
 # Enable/disable stub domains
-AX_STUBDOM_CONDITIONAL([ioemu-stubdom], [ioemu])
 AX_STUBDOM_DEFAULT_DISABLE([c-stubdom], [c])
 AX_STUBDOM_DEFAULT_DISABLE([pv-grub], [grub])
 AX_STUBDOM_DEFAULT_ENABLE([xenstore-stubdom], [xenstore])
@@ -26,19 +25,6 @@ AX_STUBDOM_DEFAULT_ENABLE([xenstorepvh-stubdom], [xenstorepvh])
 AX_STUBDOM_CONDITIONAL([vtpm-stubdom], [vtpm])
 AX_STUBDOM_CONDITIONAL([vtpmmgr-stubdom], [vtpmmgr])
 
-AC_ARG_ENABLE([qemu-traditional])
-AS_IF([test "x$enable_qemu_traditional" = "xyes"], [
-    qemu_traditional=y],[
-    qemu_traditional=n
-])
-AS_IF([test "x$ioemu" = "x"], [
-    ioemu=$qemu_traditional
-])
-echo "x$ioemu$qemu_traditional"
-AS_IF([test "x$ioemu$qemu_traditional" = "xyn"], [
-    AC_MSG_ERROR(IOEMU stubdomain requires qemu-traditional)
-])
-
 AX_ARG_DEFAULT_ENABLE([debug], [Disable debug build of stubdom])
 AX_ARG_DEFAULT_ENABLE([extfiles], [Use xen extfiles repository for libraries])
 
@@ -69,7 +55,6 @@ AX_STUBDOM_AUTO_DEPENDS([vtpmmgr], [vtpm])
 #Conditionally enable these stubdoms based on the presense of dependencies
 AX_STUBDOM_CONDITIONAL_FINISH([vtpm-stubdom], [vtpm])
 AX_STUBDOM_CONDITIONAL_FINISH([vtpmmgr-stubdom], [vtpmmgr])
-AX_STUBDOM_CONDITIONAL_FINISH([ioemu-stubdom], [ioemu])
 
 AX_STUBDOM_FINISH
 AC_OUTPUT()
diff --git a/stubdom/ioemu-minios.cfg b/stubdom/ioemu-minios.cfg
deleted file mode 100644
index 6153ae05f8..0000000000
--- a/stubdom/ioemu-minios.cfg
+++ /dev/null
@@ -1,6 +0,0 @@
-CONFIG_LIBC=y
-CONFIG_LWIP=y
-CONFIG_START_NETWORK=n
-CONFIG_QEMU_XS_ARGS=y
-CONFIG_PCIFRONT=y
-XEN_INTERFACE_VERSION=__XEN_LATEST_INTERFACE_VERSION__
diff --git a/tools/Makefile b/tools/Makefile
index e9e1cda305..6ecf7c0da8 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -24,7 +24,6 @@ SUBDIRS-$(CONFIG_Linux) += vchan
 
 # do not recurse in to a dir we are about to delete
 ifneq "$(MAKECMDGOALS)" "distclean"
-SUBDIRS-$(CONFIG_QEMU_TRAD) += qemu-xen-traditional-dir
 SUBDIRS-$(CONFIG_QEMU_XEN) += qemu-xen-dir
 endif
 
@@ -79,7 +78,6 @@ clean: subdirs-clean
 
 .PHONY: distclean
 distclean: subdirs-distclean clean
-	rm -rf qemu-xen-traditional-dir qemu-xen-traditional-dir-remote
 	rm -rf qemu-xen-dir qemu-xen-dir-remote qemu-xen-build
 	rm -rf ../config/Tools.mk config.h config.log config.status \
 		config.cache autom4te.cache
@@ -97,11 +95,6 @@ QEMU_UPSTREAM_RPATH := -Wl,-rpath,$(LIBEXEC_LIB)
 IOEMU_EXTRA_LDFLAGS :=
 endif
 
-QEMU_ROOT := $(shell if [ -d "$(QEMU_TRADITIONAL_LOC)" ]; then echo "$(QEMU_TRADITIONAL_LOC)"; else echo .; fi)
-ifneq ($(QEMU_ROOT),.)
-export QEMU_ROOT
-endif
-
 # Targets for external trees:
 #  ${target}-dir-find
 #    See if the directory exists and check it out if not.
@@ -136,54 +129,6 @@ endif
 #   ${TARGET}_LOC
 #     The ultimate location of the source (either a local dir or remote URL)
 
-# External target: qemu-xen-traditional
-qemu-xen-traditional-dir-find:
-	set -ex; \
-	if test -d $(QEMU_TRADITIONAL_LOC); then \
-		mkdir -p qemu-xen-traditional-dir; \
-	else \
-		export GIT=$(GIT); \
-		$(XEN_ROOT)/scripts/git-checkout.sh $(QEMU_TRADITIONAL_LOC) $(QEMU_TRADITIONAL_REVISION) qemu-xen-traditional-dir; \
-	fi
-
-.PHONY: qemu-xen-traditional-dir-force-update
-qemu-xen-traditional-dir-force-update: qemu-xen-traditional-dir-find
-	set -ex; \
-	if [ "$(QEMU_TRADITIONAL_REVISION)" ]; then \
-		cd qemu-xen-traditional-dir-remote; \
-		$(GIT) fetch origin; \
-		$(GIT) reset --hard $(QEMU_TRADITIONAL_REVISION); \
-	fi
-
-qemu-traditional-recurse = \
-	set -e; \
-		$(buildmakevars2shellvars); \
-		export CONFIG_BLKTAP1=n; \
-		export BUILDING_QEMU_TRAD=y; \
-		cd qemu-xen-traditional-dir; \
-		$(1)
-
-subdir-all-qemu-xen-traditional-dir: qemu-xen-traditional-dir-find
-	$(call qemu-traditional-recurse,\
-		$(QEMU_ROOT)/xen-setup \
-		--extra-cflags="-D__XEN_TOOLS__ $(EXTRA_CFLAGS_QEMU_TRADITIONAL)" \
-		$(IOEMU_EXTRA_LDFLAGS) \
-		--cpu=$(IOEMU_CPU_ARCH) \
-		$(IOEMU_CONFIGURE_CROSS); \
-		$(MAKE) all \
-	)
-
-subdir-install-qemu-xen-traditional-dir: subdir-all-qemu-xen-traditional-dir
-	$(call qemu-traditional-recurse,$(MAKE) install)
-
-subdir-clean-qemu-xen-traditional-dir:
-	set -e; if test -d qemu-xen-traditional-dir/.; then \
-		$(MAKE) -C qemu-xen-traditional-dir clean; \
-	fi
-subdir-uninstall-qemu-xen-traditional-dir:
-	rm -f $(D)$(bindir)/qemu-nbd*
-	rm -f $(D)$(bindir)/qemu-img*
-
 # External target: qemu-xen
 qemu-xen-dir-find:
 	if test -d $(QEMU_UPSTREAM_LOC) ; then \
@@ -276,9 +221,6 @@ subtree-force-update:
 ifeq ($(CONFIG_QEMU_XEN),y)
 	$(MAKE) qemu-xen-dir-force-update
 endif
-ifeq ($(CONFIG_QEMU_TRAD),y)
-	$(MAKE) qemu-xen-traditional-dir-force-update
-endif
 ifeq ($(CONFIG_X86),y)
 	$(MAKE) -C firmware subtree-force-update
 endif
diff --git a/tools/Rules.mk b/tools/Rules.mk
index 6bd636709f..725c3c32e9 100644
--- a/tools/Rules.mk
+++ b/tools/Rules.mk
@@ -134,12 +134,9 @@ endif
 
 CFLAGS_libxenlight += $(CFLAGS_libxenctrl)
 
-# Don't add -Werror if we are used by qemu-trad build system.
-ifndef BUILDING_QEMU_TRAD
 ifeq ($(CONFIG_WERROR),y)
 CFLAGS += -Werror
 endif
-endif
 
 ifeq ($(debug),y)
 # Use -Og if available, -O0 otherwise
diff --git a/tools/config.h.in b/tools/config.h.in
index 0bab3cb136..fe2a94cfc4 100644
--- a/tools/config.h.in
+++ b/tools/config.h.in
@@ -42,9 +42,6 @@
 /* pygrub enabled */
 #undef HAVE_PYGRUB
 
-/* Qemu traditional enabled */
-#undef HAVE_QEMU_TRADITIONAL
-
 /* ROMBIOS enabled */
 #undef HAVE_ROMBIOS
 
diff --git a/tools/configure b/tools/configure
index e1f6ea6bf5..27ae7c52fb 100755
--- a/tools/configure
+++ b/tools/configure
@@ -726,7 +726,6 @@ BCC
 LD86
 AS86
 ipxe
-qemu_traditional
 LINUX_BACKEND_MODULES
 pygrub
 golang
@@ -835,7 +834,6 @@ enable_seabios
 enable_golang
 enable_pygrub
 with_linux_backend_modules
-enable_qemu_traditional
 enable_ipxe
 with_system_ipxe
 enable_rombios
@@ -1518,13 +1516,10 @@ Optional Features:
   --disable-seabios       Disable SeaBIOS (default is ENABLED)
   --disable-golang        Disable Go tools (default is ENABLED)
   --disable-pygrub        Disable pygrub (default is ENABLED)
-  --enable-qemu-traditional
-                          Enable qemu traditional device model, (DEFAULT is
-                          off)
   --enable-ipxe           Enable in-tree IPXE, (DEFAULT is off, see also
                           --with-system-ipxe)
-  --enable-rombios        Enable ROMBIOS, (DEFAULT is on if qemu-traditional
-                          or ipxe is enabled, otherwise off)
+  --enable-rombios        Enable ROMBIOS, (DEFAULT is on if ipxe is enabled,
+                          otherwise off)
   --enable-libfsimage     Enable libfsimage, (DEFAULT is on if pygrub is
                           enabled, otherwise off)
   --enable-systemd        Enable systemd support (default is DISABLED)
@@ -4838,45 +4833,16 @@ fi
 LINUX_BACKEND_MODULES="`eval echo $LINUX_BACKEND_MODULES`"
 
 
-# Check whether --enable-qemu-traditional was given.
-if test ${enable_qemu_traditional+y}
-then :
-  enableval=$enable_qemu_traditional;
-fi
-
-if test "x$enable_qemu_traditional" = "xyes"
-then :
-
-
-printf "%s\n" "#define HAVE_QEMU_TRADITIONAL 1" >>confdefs.h
-
-    qemu_traditional=y
-else $as_nop
-
-    qemu_traditional=n
-
-fi
-
-
 # Check whether --enable-ipxe was given.
 if test ${enable_ipxe+y}
 then :
   enableval=$enable_ipxe;
-else $as_nop
-
-    if test "x$enable_qemu_traditional" = "xyes"
-then :
-
-        enable_ipxe="yes"
-
 else $as_nop
 
         enable_ipxe="no"
 
 fi
 
-fi
-
 if test "x$enable_ipxe" = "xno"
 then :
   ipxe=n
@@ -4912,7 +4878,7 @@ then :
   enableval=$enable_rombios;
 else $as_nop
 
-    if test "x$enable_qemu_traditional" = "xyes" -o "x$enable_ipxe" = "xyes"
+    if test "x$enable_ipxe" = "xyes"
 then :
 
         enable_rombios="yes"
@@ -4928,7 +4894,7 @@ fi
 if test "x$enable_rombios" = "xyes"
 then :
 
-                # Extract the first word of "as86", so it can be a program name with args.
+    # Extract the first word of "as86", so it can be a program name with args.
 set dummy as86; ac_word=$2
 { printf "%s\n" "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
 printf %s "checking for $ac_word... " >&6; }
diff --git a/tools/configure.ac b/tools/configure.ac
index 0dd6d747ab..dada1c3b15 100644
--- a/tools/configure.ac
+++ b/tools/configure.ac
@@ -121,25 +121,11 @@ esac])
 LINUX_BACKEND_MODULES="`eval echo $LINUX_BACKEND_MODULES`"
 AC_SUBST(LINUX_BACKEND_MODULES)
 
-AC_ARG_ENABLE([qemu-traditional],
-    AS_HELP_STRING([--enable-qemu-traditional],
-                   [Enable qemu traditional device model, (DEFAULT is off)]))
-AS_IF([test "x$enable_qemu_traditional" = "xyes"], [
-AC_DEFINE([HAVE_QEMU_TRADITIONAL], [1], [Qemu traditional enabled])
-    qemu_traditional=y],[
-    qemu_traditional=n
-])
-AC_SUBST(qemu_traditional)
-
 AC_ARG_ENABLE([ipxe],
     AS_HELP_STRING([--enable-ipxe],
                    [Enable in-tree IPXE,
                     (DEFAULT is off, see also --with-system-ipxe)]),,[
-    AS_IF([test "x$enable_qemu_traditional" = "xyes"], [
-        enable_ipxe="yes"
-    ], [
         enable_ipxe="no"
-    ])
 ])
 AS_IF([test "x$enable_ipxe" = "xno"], [ipxe=n], [ipxe=y])
 AC_ARG_WITH([system-ipxe],
@@ -162,18 +148,15 @@ AC_SUBST(ipxe)
 
 AC_ARG_ENABLE([rombios],
     AS_HELP_STRING([--enable-rombios],
-                   [Enable ROMBIOS, (DEFAULT is on if qemu-traditional or ipxe is enabled,
+                   [Enable ROMBIOS, (DEFAULT is on if ipxe is enabled,
                     otherwise off)]),,[
-    AS_IF([test "x$enable_qemu_traditional" = "xyes" -o "x$enable_ipxe" = "xyes"], [
+    AS_IF([test "x$enable_ipxe" = "xyes"], [
         enable_rombios="yes"
     ], [
         enable_rombios="no"
     ])
 ])
 AS_IF([test "x$enable_rombios" = "xyes"], [
-    dnl as86, ld86, and bcc are only required when building rombios. They
-    dnl are only needed when the host system is x86 but that check is done
-    dnl for us above when checking if we should build with qemu-traditional.
     AX_PATH_PROG_OR_FAIL([AS86], [as86])
     AX_PATH_PROG_OR_FAIL([LD86], [ld86])
     AX_PATH_PROG_OR_FAIL([BCC], [bcc])
-- 
2.43.0



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From: Juergen Gross 
To: xen-devel@lists.xenproject.org
Cc: Juergen Gross ,
	Andrew Cooper ,
	Anthony PERARD ,
	Michal Orzel ,
	Jan Beulich ,
	Julien Grall ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= ,
	Stefano Stabellini 
Subject: [PATCH v3 4/4] build: don't require full tools build for building stubdoms
Date: Tue, 29 Apr 2025 13:06:34 +0200
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With the drop of qemu-traditional "make stubdom" no longer requires
"make tools" to have finished.

It is enough to add "install-tools-public-headers" as a prereq of
"install-stubdom".

Signed-off-by: Juergen Gross 
---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index c9d80a6dc6..67b71ac3d4 100644
--- a/Makefile
+++ b/Makefile
@@ -147,7 +147,7 @@ install-tools: install-tools-public-headers
 	$(MAKE) -C tools install
 
 .PHONY: install-stubdom
-install-stubdom: mini-os-dir install-tools
+install-stubdom: mini-os-dir install-tools-public-headers
 	$(MAKE) -C stubdom install
 ifeq (x86_64,$(XEN_TARGET_ARCH))
 	XEN_TARGET_ARCH=x86_32 $(MAKE) -C stubdom install-grub-if-enabled
-- 
2.43.0



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On Tue Apr 29, 2025 at 9:15 AM BST, Roger Pau Monn=C3=A9 wrote:
> On Mon, Apr 28, 2025 at 12:50:55PM +0100, Alejandro Vallejo wrote:
>> On Mon Apr 28, 2025 at 12:07 PM BST, Andrew Cooper wrote:
>> > On 28/04/2025 11:55 am, Alejandro Vallejo wrote:
>> >> On Mon Apr 28, 2025 at 10:41 AM BST, Roger Pau Monn=C3=A9 wrote:
>> >>> On Fri, Apr 25, 2025 at 04:43:31PM -0700, Ariadne Conill wrote:
>> >>>> Previously Xen placed the hypercall page at the highest possible MF=
N,
>> >>>> but this caused problems on systems where there is more than 36 bit=
s
>> >>>> of physical address space.
>> >>>>
>> >>>> In general, it also seems unreliable to assume that the highest pos=
sible
>> >>>> MFN is not already reserved for some other purpose.
>> >>>>
>> >>>> Changes from v1:
>> >>>> - Continue to use fixmap infrastructure
>> >>>> - Use panic in Hyper-V setup() function instead of returning -ENOME=
M
>> >>>>   on hypercall page allocation failure
>> >>>>
>> >>>> Fixes: 620fc734f854 ("x86/hyperv: setup hypercall page")
>> >>>> Cc: Alejandro Vallejo 
>> >>>> Cc: Alexander M. Merritt 
>> >>>> Signed-off-by: Ariadne Conill 
>> >>>> ---
>> >>>>  xen/arch/x86/guest/hyperv/hyperv.c      | 17 +++++++----------
>> >>>>  xen/arch/x86/include/asm/guest/hyperv.h |  3 ---
>> >>>>  2 files changed, 7 insertions(+), 13 deletions(-)
>> >>>>
>> >>>> diff --git a/xen/arch/x86/guest/hyperv/hyperv.c b/xen/arch/x86/gues=
t/hyperv/hyperv.c
>> >>>> index 6989af38f1..0305374a06 100644
>> >>>> --- a/xen/arch/x86/guest/hyperv/hyperv.c
>> >>>> +++ b/xen/arch/x86/guest/hyperv/hyperv.c
>> >>>> @@ -98,7 +98,13 @@ static void __init setup_hypercall_page(void)
>> >>>>      rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
>> >>>>      if ( !hypercall_msr.enable )
>> >>>>      {
>> >>>> -        mfn =3D HV_HCALL_MFN;
>> >>>> +        void *hcall_page =3D alloc_xenheap_page();
>> >>>> +        if ( !hcall_page )
>> >>>> +            panic("Hyper-V: Failed to allocate hypercall trampolin=
e page");
>> >>>> +
>> >>>> +        printk("Hyper-V: Allocated hypercall page @ %p.\n", hcall_=
page);
>> >>> This likely wants to be a dprintk, and possibly also print the
>> >>> physical address of the used page?  And no period at the end of the
>> >>> sentence IMO.
>> >>>
>> >>> I think Xen might have used the last page in the physical address
>> >>> range to prevent HyperV from possibly shattering a superpage in the
>> >>> second stage translation page-tables if normal RAM was used?
>> >>>
>> >>> However I don't know whether HyperV will shatter super-pages if a
>> >>> sub-page of it is used to contain the hypercall page (I don't think =
it
>> >>> should?)
>> >> I think it's quite unlikely.
>> >
>> > It will shatter superpages.
>> >
>> > The overlay is not part of guest memory, and will hide whatever is
>> > behind it while it is mapped, which will force a 4k PTE in EPT/NPT.
>>=20
>> That's an implementation detail. They can very well copy the trampoline
>> to guest memory when there is such (and save the previous contents
>> elsewhere) and restore them when disabling the trampoline. It's a
>> trivial optimisation that would prevent shattering while being fully
>> compliant with the TLFS.
>
> It's an implementation detail relevant from a guest perspective, as it
> impacts guest performance.  IOW: we care about the specific (current)
> implementation, as it's meaningful to how the guest-side should be
> implemented.

Indeed, I didn't mean otherwise.

My reply had more to do with the assertiveness of "it will shatter". The
reality is that we can't know, short of microbenching a read into the
trampoline after a TLB flush. And even then it may very well be
version-dependent (where old did, and newer doesn't, for instance).

>
>> The actual physical location of the trampoline is fully undefined. It
>> is defined to be an overlay; but that's a specification, not an
>> implementation.
>>=20
>> >
>> > Thinking about it, a better position would be adjacent to the APIC MMI=
O
>> > window, so at 0xfee01000.=C2=A0 The APIC MMIO window is forced to be a=
 4k
>> > mapping too, and the rest of the 2M window is normally empty.
>> >
>>=20
>> Sounds like an assumption waiting to be broken. Just like the last page
>> of guest-physical was.
>
> As a compromise - could we try to allocate from < 4GB first, and
> resort to high memory if that doesn't work?  That would at least limit
> shattering (if done) to the low 4GB, which is quite likely fragmented
> already:
>
> hcall_page =3D alloc_xenheap_pages(0, MEMF_bits(32));
> if ( !hcall_page )
>     hcall_page =3D alloc_xenheap_page();
> if ( !hcall_page )
>     panic(...);
>
> That will need a comment to describe what's going on.

Sounds far more resilient to me. I could get behind that, sure.

Ariadne, thoughts?

Cheers,
Alejandro


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Date: Tue, 29 Apr 2025 12:23:13 +0100
Message-ID: 
CC: Paul Durrant , Jan Beulich , Andrew
 Cooper , =?utf-8?q?Roger_Pau_Monn=C3=A9?=
	, "Alexander M . Merritt" 
Subject: Re: [PATCH v3] x86/hyperv: use dynamically allocated page for
 hypercalls
From: Alejandro Vallejo 
To: Ariadne Conill , 
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On Mon Apr 28, 2025 at 8:57 PM BST, Ariadne Conill wrote:
> Previously Xen placed the hypercall page at the highest possible MFN,
> but this caused problems on systems where there is more than 36 bits
> of physical address space.
>
> In general, it also seems unreliable to assume that the highest possible
> MFN is not already reserved for some other purpose.
>
> Fixes: 620fc734f854 ("x86/hyperv: setup hypercall page")
> Cc: Alejandro Vallejo 
> Cc: Alexander M. Merritt 
> Signed-off-by: Ariadne Conill 

  Reviewed-by: Alejandro Vallejo 

I'm happy with the patch as-is, and I'm equally happy...

> diff --git a/xen/arch/x86/guest/hyperv/hyperv.c b/xen/arch/x86/guest/hype=
rv/hyperv.c
> index 6989af38f1..f69f596441 100644
> --- a/xen/arch/x86/guest/hyperv/hyperv.c
> +++ b/xen/arch/x86/guest/hyperv/hyperv.c
> @@ -98,10 +98,18 @@ static void __init setup_hypercall_page(void)
>      rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
>      if ( !hypercall_msr.enable )
>      {
> -        mfn =3D HV_HCALL_MFN;
> +        void *hcall_page =3D alloc_xenheap_page();
> +
> +        if ( !hcall_page )
> +            panic("Hyper-V: Failed to allocate hypercall trampoline page=
\n");

... with Roger's suggestion to probe <4G first with MEMF(32) here.

> +
> +        mfn =3D virt_to_mfn(hcall_page);
>          hypercall_msr.enable =3D 1;
>          hypercall_msr.guest_physical_address =3D mfn;
>          wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
> +
> +        dprintk(XENLOG_INFO,
> +                "Hyper-V: Allocated hypercall page at MFN %lx\n", mfn);

nit: This is a personal preference thing, but I find %lx is very
unhelpful when the variable is something like 0x123, as 123 might be
misinterpreted to be in decimal. An mfn is not nearly as problematic as
an error code, but %#lx avoids the ambiguity altogether.

Cheers,
Alejandro


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Subject: Re: [PATCH v4 04/15] xen/cpufreq: refactor cmdline "cpufreq=xxx"
From: Jan Beulich 
To: Penny Zheng 
Cc: ray.huang@amd.com, xen-devel@lists.xenproject.org
References: <20250414074056.3696888-1-Penny.Zheng@amd.com>
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On 29.04.2025 12:36, Jan Beulich wrote:
> On 14.04.2025 09:40, Penny Zheng wrote:
>> --- a/xen/drivers/cpufreq/cpufreq.c
>> +++ b/xen/drivers/cpufreq/cpufreq.c
>> @@ -71,6 +71,49 @@ unsigned int __initdata cpufreq_xen_cnt = 1;
>>  
>>  static int __init cpufreq_cmdline_parse(const char *s, const char *e);
>>  
>> +static bool __init cpufreq_opts_contain(enum cpufreq_xen_opt option)
>> +{
>> +    unsigned int count = cpufreq_xen_cnt;
>> +
>> +    while ( count )
>> +    {
>> +        if ( cpufreq_xen_opts[--count] == option )
>> +            return true;
>> +    }
>> +
>> +    return false;
>> +}
>> +
>> +static int __init handle_cpufreq_cmdline(enum cpufreq_xen_opt option)
>> +{
>> +    int ret = 0;
>> +
>> +    if ( cpufreq_opts_contain(option) )
>> +    {
>> +        const char *cpufreq_opts_str[] = { "CPUFREQ_xen", "CPUFREQ_hwp" };
> 
>         const char *const __initconstrel cpufreq_opts_str[] = { "CPUFREQ_xen", "CPUFREQ_hwp" };
> 
> (line wrapped suitably, of course) Or maybe even better
> 
>         const char __initconst cpufreq_opts_str[][12] = { "CPUFREQ_xen", "CPUFREQ_hwp" };
> 
> for the string literals to also end up in .init.rodata.

Actually, it didn't even occur to me that there might be a "static" missing
here, too. Plus I'm missing any arrangement for the array slots to remain in
sync with the corresponding enumerators. With that ...

> With all of the adjustments:
> Reviewed-by: Jan Beulich 

I'm sorry, but I need to take this back. There are just too many issues.

Jan


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To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
Cc: Andrew Cooper ,
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 Michal Orzel , Julien Grall ,
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References: <20250429101252.50071-1-roger.pau@citrix.com>
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On 29.04.2025 12:46, Roger Pau Monné wrote:
> On Tue, Apr 29, 2025 at 12:23:05PM +0200, Jan Beulich wrote:
>> On 29.04.2025 12:12, Roger Pau Monne wrote:
>>> Several handlers have the same necessity of reading or writing from or to
>>> an MMIO region using 1, 2, 4 or 8 bytes accesses.  So far this has been
>>> open-coded in the function itself.  Instead provide a new set of handlers
>>> that encapsulate the accesses.
>>>
>>> Since the added helpers are not architecture specific, introduce a new
>>> generic io.h header.
>>>
>>> No functional change intended.
>>>
>>> Signed-off-by: Roger Pau Monné 
>>
>> Reviewed-by: Jan Beulich 
>> preferably with ...
>>
>>> @@ -5185,6 +5167,7 @@ int cf_check mmio_ro_emulated_write(
>>>      struct x86_emulate_ctxt *ctxt)
>>>  {
>>>      struct mmio_ro_emulate_ctxt *mmio_ro_ctxt = ctxt->data;
>>> +    unsigned long data = 0;
>>
>>
>> ... this moved ...
>>
>>> @@ -5195,9 +5178,12 @@ int cf_check mmio_ro_emulated_write(
>>>          return X86EMUL_UNHANDLEABLE;
>>>      }
>>>  
>>> -    if ( bytes <= 8 )
>>> +    if ( bytes <= sizeof(data) )
>>> +    {
>>> +        memcpy(&data, p_data, bytes);
>>>          subpage_mmio_write_emulate(mmio_ro_ctxt->mfn, PAGE_OFFSET(offset),
>>> -                                   p_data, bytes);
>>> +                                   data, bytes);
>>> +    }
>>
>> ... into this more narrow scope.
> 
> Hm, but if I move it I can no longer use sizeof(data) in the condition
> check, that's why data is defined in the outside.

Oh, I didn't pay attention to that. Yes - please keep as you have it.

Jan


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From: Mykyta Poturai 
To: Julien Grall , "xen-devel@lists.xenproject.org"
	
CC: Stewart Hildebrand , Stefano Stabellini
	, Bertrand Marquis , Michal
 Orzel , Volodymyr Babchuk ,
	Andrew Cooper , Anthony PERARD
	, Jan Beulich ,
	=?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= 
Subject: Re: [PATCH v9 7/8] xen/arm: enable dom0 to use PCI devices with
 pci-passthrough=no
Thread-Topic: [PATCH v9 7/8] xen/arm: enable dom0 to use PCI devices with
 pci-passthrough=no
Thread-Index:
 AQHblOXdxbIbbkNtn0WSg/9tW2OJ47O5DGKAgAA8u4CAAAbVAIAAGfaAgAA/NwCAASYyAA==
Date: Tue, 29 Apr 2025 11:48:02 +0000
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From: Mykyta Poturai 
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CC: Stewart Hildebrand , Stefano Stabellini
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Subject: [PATCH v10 2/7] iommu/arm: iommu_add_dt_pci_sideband_ids phantom
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From: Stewart Hildebrand 

Handle phantom functions in iommu_add_dt_pci_sideband_ids(). Each phantom
function will have a unique requestor ID (RID)/BDF. On ARM, we need to
map/translate the RID/BDF to an AXI stream ID for each phantom function
according to the pci-iommu device tree mapping [1]. The RID/BDF -> AXI stre=
am ID
mapping in DT could allow phantom devices (i.e. devices with phantom functi=
ons)
to use different AXI stream IDs based on the (phantom) function.

[1] https://www.kernel.org/doc/Documentation/devicetree/bindings/pci/pci-io=
mmu.txt

Signed-off-by: Stewart Hildebrand 
Reviewed-by: Stefano Stabellini 
---
v9->v10:
* Add Stefano's RB

v8->v9:
* replace DT_NO_IOMMU with 1

v7->v8:
* no change

v6->v7:
* no change

v5->v6:
* no change

v4->v5:
* no change

v3->v4:
* s/iommu_dt_pci_map_id/dt_map_id/

v2->v3:
* new patch title (was: iommu/arm: iommu_add_dt_pci_device phantom handling=
)
* rework loop to reduce duplication
* s/iommu_fwspec_free(pci_to_dev(pdev))/iommu_fwspec_free(dev)/

v1->v2:
* new patch

---
TODO: investigate Jan's comment [2]
[2] https://lore.kernel.org/xen-devel/806a2978-19fb-4d31-ab6a-35ea7317c8de@=
suse.com/
---
 xen/drivers/passthrough/device_tree.c | 33 ++++++++++++++++-----------
 1 file changed, 20 insertions(+), 13 deletions(-)

diff --git a/xen/drivers/passthrough/device_tree.c b/xen/drivers/passthroug=
h/device_tree.c
index 37e1437b65..f5850a2607 100644
--- a/xen/drivers/passthrough/device_tree.c
+++ b/xen/drivers/passthrough/device_tree.c
@@ -169,6 +169,7 @@ int iommu_add_dt_pci_sideband_ids(struct pci_dev *pdev)
     struct device *dev =3D pci_to_dev(pdev);
     const struct dt_device_node *np;
     int rc;
+    unsigned int devfn =3D pdev->devfn;
=20
     if ( !iommu_enabled )
         return 1;
@@ -183,21 +184,27 @@ int iommu_add_dt_pci_sideband_ids(struct pci_dev *pde=
v)
     if ( !np )
         return -ENODEV;
=20
-    /*
-     * According to the Documentation/devicetree/bindings/pci/pci-iommu.tx=
t
-     * from Linux.
-     */
-    rc =3D dt_map_id(np, PCI_BDF(pdev->bus, pdev->devfn), "iommu-map",
-                   "iommu-map-mask", &iommu_spec.np, iommu_spec.args);
-    if ( rc )
-        return (rc =3D=3D -ENODEV) ? 1 : rc;
+    do {
+        /*
+         * According to the Documentation/devicetree/bindings/pci/pci-iomm=
u.txt
+         * from Linux.
+         */
+        rc =3D dt_map_id(np, PCI_BDF(pdev->bus, devfn), "iommu-map",
+                       "iommu-map-mask", &iommu_spec.np, iommu_spec.args);
+        if ( rc )
+            return (rc =3D=3D -ENODEV) ? 1 : rc;
=20
-    rc =3D iommu_dt_xlate(dev, &iommu_spec, ops);
-    if ( rc < 0 )
-    {
-        iommu_fwspec_free(dev);
-        return -EINVAL;
+        rc =3D iommu_dt_xlate(dev, &iommu_spec, ops);
+        if ( rc < 0 )
+        {
+            iommu_fwspec_free(dev);
+            return -EINVAL;
+        }
+
+        devfn +=3D pdev->phantom_stride;
     }
+    while ( (devfn !=3D pdev->devfn) &&
+            (PCI_SLOT(devfn) =3D=3D PCI_SLOT(pdev->devfn)) );
=20
     return rc;
 }
--=20
2.34.1


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From: Mykyta Poturai 
To: "xen-devel@lists.xenproject.org" 
CC: Stewart Hildebrand , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , Volodymyr
 Babchuk , Andrew Cooper
	, Anthony PERARD , Jan
 Beulich , =?iso-8859-1?Q?Roger_Pau_Monn=E9?=
	, Mykyta Poturai 
Subject: [PATCH v10 6/7] xen/arm: enable dom0 to use PCI devices with
 pci-passthrough=no
Thread-Topic: [PATCH v10 6/7] xen/arm: enable dom0 to use PCI devices with
 pci-passthrough=no
Thread-Index: AQHbuP0k0QR8aqz5V029F3Jm2fq6qg==
Date: Tue, 29 Apr 2025 11:52:11 +0000
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From: Stewart Hildebrand 

Enable the use of IOMMU + PCI in dom0 without having to specify
"pci-passthrough=3Dyes". Due to possible platform specific dependencies
of the PCI host, we rely on dom0 to initialize it and perform
a PHYSDEVOP_pci_device_add call to add each device to SMMU.

Because pci_passthrough is not always enabled on all architectures, add
a new function arch_pci_device_physdevop that checks if we need to enable
a subset of the PCI subsystem related to managing IOMMU configuration
for PCI devices.

Enable pci_init() for initializing Xen's internal PCI subsystem, and
allow PHYSDEVOP_pci_device_add when pci-passthrough is disabled.

Signed-off-by: Stewart Hildebrand 
Signed-off-by: Mykyta Poturai 
Reviewed-by: Stefano Stabellini 
---
hmm. Since
  dec9e02f3190 ("xen: avoid generation of stub  header")
Should we also move is_pci_passthrough_enabled() back to xen/arch/arm/inclu=
de/asm/pci.h ?
Not sure if PPC/RISC-V will plan on using this check.

v9->v10:
* move iommu_enabled check in a separate arch function
* add Stefano's RB

v8->v9:
* move iommu_enabled check inside is_pci_passthrough_enabled()

v7->v8:
* bring back x86 definition of is_pci_passthrough_enabled()

v6->v7:
* remove x86 definition of is_pci_passthrough_enabled()
* update comments
* make pci_physdev_op checks stricter

v5->v6:
* new patch - this effectively replaces
  ("Revert "xen/arm: Add cmdline boot option "pci-passthrough =3D =
""")
---
 xen/arch/arm/include/asm/pci.h | 2 ++
 xen/arch/arm/pci/pci.c         | 8 +++++++-
 xen/arch/x86/include/asm/pci.h | 5 +++++
 xen/drivers/pci/physdev.c      | 4 ++--
 xen/include/xen/pci.h          | 5 +++++
 5 files changed, 21 insertions(+), 3 deletions(-)

diff --git a/xen/arch/arm/include/asm/pci.h b/xen/arch/arm/include/asm/pci.=
h
index 7f77226c9b..d6e05f16b0 100644
--- a/xen/arch/arm/include/asm/pci.h
+++ b/xen/arch/arm/include/asm/pci.h
@@ -128,6 +128,8 @@ int pci_host_bridge_mappings(struct domain *d);
=20
 bool pci_check_bar(const struct pci_dev *pdev, mfn_t start, mfn_t end);
=20
+bool arch_pci_device_physdevop(void);
+
 #else   /*!CONFIG_HAS_PCI*/
=20
 struct pci_dev;
diff --git a/xen/arch/arm/pci/pci.c b/xen/arch/arm/pci/pci.c
index 8d9692c92e..78e9ef28d5 100644
--- a/xen/arch/arm/pci/pci.c
+++ b/xen/arch/arm/pci/pci.c
@@ -16,6 +16,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
=20
@@ -75,6 +76,11 @@ static int __init acpi_pci_init(void)
 }
 #endif
=20
+bool arch_pci_device_physdevop(void)
+{
+    return iommu_enabled;
+}
+
 /* By default pci passthrough is disabled. */
 bool __read_mostly pci_passthrough_enabled;
 boolean_param("pci-passthrough", pci_passthrough_enabled);
@@ -85,7 +91,7 @@ static int __init pci_init(void)
      * Enable PCI passthrough when has been enabled explicitly
      * (pci-passthrough=3Don).
      */
-    if ( !pci_passthrough_enabled )
+    if ( !is_pci_passthrough_enabled() && !arch_pci_device_physdevop() )
         return 0;
=20
     if ( pci_add_segment(0) )
diff --git a/xen/arch/x86/include/asm/pci.h b/xen/arch/x86/include/asm/pci.=
h
index fd5480d67d..1d59437147 100644
--- a/xen/arch/x86/include/asm/pci.h
+++ b/xen/arch/x86/include/asm/pci.h
@@ -67,4 +67,9 @@ static inline bool pci_check_bar(const struct pci_dev *pd=
ev,
     return is_memory_hole(start, end);
 }
=20
+static always_inline bool arch_pci_device_physdevop(void)
+{
+    return false;
+}
+
 #endif /* __X86_PCI_H__ */
diff --git a/xen/drivers/pci/physdev.c b/xen/drivers/pci/physdev.c
index 0161a85e1e..21c8a3a90e 100644
--- a/xen/drivers/pci/physdev.c
+++ b/xen/drivers/pci/physdev.c
@@ -19,7 +19,7 @@ ret_t pci_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void=
) arg)
         struct pci_dev_info pdev_info;
         nodeid_t node =3D NUMA_NO_NODE;
=20
-        if ( !is_pci_passthrough_enabled() )
+        if ( !is_pci_passthrough_enabled() && !arch_pci_device_physdevop()=
)
             return -EOPNOTSUPP;
=20
         ret =3D -EFAULT;
@@ -57,7 +57,7 @@ ret_t pci_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void=
) arg)
     case PHYSDEVOP_pci_device_remove: {
         struct physdev_pci_device dev;
=20
-        if ( !is_pci_passthrough_enabled() )
+        if ( !is_pci_passthrough_enabled() && !arch_pci_device_physdevop()=
)
             return -EOPNOTSUPP;
=20
         ret =3D -EFAULT;
diff --git a/xen/include/xen/pci.h b/xen/include/xen/pci.h
index ef60196653..130c2a8c1a 100644
--- a/xen/include/xen/pci.h
+++ b/xen/include/xen/pci.h
@@ -79,6 +79,11 @@ static inline bool is_pci_passthrough_enabled(void)
     return false;
 }
=20
+static inline bool arch_pci_device_physdevop(void)
+{
+    return false;
+}
+
 #endif
=20
 struct pci_dev_info {
--=20
2.34.1


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From: Mykyta Poturai 
To: "xen-devel@lists.xenproject.org" 
CC: Rahul Singh , Bertrand Marquis
	, Stefano Stabellini ,
	Julien Grall , Michal Orzel , Volodymyr
 Babchuk , Stewart Hildebrand
	, Mykyta Poturai 
Subject: [PATCH v10 4/7] xen/arm: smmuv3: Add PCI devices support for SMMUv3
Thread-Topic: [PATCH v10 4/7] xen/arm: smmuv3: Add PCI devices support for
 SMMUv3
Thread-Index: AQHbuP0jUlr4M+QGW0mRuMiNDm9maQ==
Date: Tue, 29 Apr 2025 11:52:10 +0000
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From: Rahul Singh 

Implement support for PCI devices in the SMMU driver. Trigger iommu-map
parsing when new PCI device is added. Add checks to assign/deassign
functions to ensure PCI devices are handled correctly. Implement basic
quarantining.

All pci devices are automatically assigned to hardware domain if it exists
to ensure it can probe them.

TODO:
Implement scratch page quarantining support.

Signed-off-by: Rahul Singh 
Signed-off-by: Stewart Hildebrand 
Signed-off-by: Mykyta Poturai 
---
v9->v10:
* return if iommu_add_pci_sidband_ids fails

v8->v9:
* no change

v7->v8:
* no change

v6->v7:
* address TODO: use d->pci_lock in arm_smmu_assign_dev()
* remove !is_hardware_domain and pdev->domain =3D=3D d checks in assign to
  support future dom0less use case when dom0 is using vPCI
* check if pdev->domain exists before assigning to it
* don't print ""
* change assign logic to remove reassign reimplementation
* explain pdev->devfn check
* make reassign check stricter and update comment

v5->v6:
* check for hardware_domain =3D=3D NULL (dom0less test case)
* locking: assign pdev->domain before list_add()

v4->v5:
* deassign from hwdom
* add TODO regarding locking
* fixup after dropping ("xen/arm: Move is_protected flag to struct device")

v3->v4:
* no change

v2->v3:
* rebase
* invoke iommu_add_pci_sideband_ids() from add_device hook

v1->v2:
* ignore add_device/assign_device/reassign_device calls for phantom functio=
ns
  (i.e. devfn !=3D pdev->devfn)

downstream->v1:
* rebase
* move 2 replacements of s/dt_device_set_protected(dev_to_dt(dev))/device_s=
et_protected(dev)/
  from this commit to ("xen/arm: Move is_protected flag to struct device")
  so as to not break ability to bisect
* adjust patch title (remove stray space)
* arm_smmu_(de)assign_dev: return error instead of crashing system
* remove arm_smmu_remove_device() stub
* update condition in arm_smmu_reassign_dev
* style fixup

(cherry picked from commit 7ed6c3ab250d899fe6e893a514278e406a2893e8 from
 the downstream branch poc/pci-passthrough from
 https://gitlab.com/xen-project/people/bmarquis/xen-arm-poc.git)
---
 xen/drivers/passthrough/arm/smmu-v3.c | 119 +++++++++++++++++++++++---
 1 file changed, 108 insertions(+), 11 deletions(-)

diff --git a/xen/drivers/passthrough/arm/smmu-v3.c b/xen/drivers/passthroug=
h/arm/smmu-v3.c
index df16235057..a3bbfda993 100644
--- a/xen/drivers/passthrough/arm/smmu-v3.c
+++ b/xen/drivers/passthrough/arm/smmu-v3.c
@@ -1469,14 +1469,37 @@ static bool arm_smmu_sid_in_range(struct arm_smmu_d=
evice *smmu, u32 sid)
 }
 /* Forward declaration */
 static struct arm_smmu_device *arm_smmu_get_by_dev(const struct device *de=
v);
+static int arm_smmu_assign_dev(struct domain *d, u8 devfn, struct device *=
dev,
+			       u32 flag);
+static int arm_smmu_deassign_dev(struct domain *d, uint8_t devfn,
+				 struct device *dev);
=20
 static int arm_smmu_add_device(u8 devfn, struct device *dev)
 {
 	int i, ret;
 	struct arm_smmu_device *smmu;
 	struct arm_smmu_master *master;
-	struct iommu_fwspec *fwspec =3D dev_iommu_fwspec_get(dev);
+	struct iommu_fwspec *fwspec;
+
+#ifdef CONFIG_HAS_PCI
+	if ( dev_is_pci(dev) )
+	{
+		struct pci_dev *pdev =3D dev_to_pci(dev);
+		int ret;
+			=09
+		/* Ignore calls for phantom functions */
+		if ( devfn !=3D pdev->devfn )
+			return 0;
+
+		ret =3D iommu_add_pci_sideband_ids(pdev);
+		if ( ret < 0 ) {
+			iommu_fwspec_free(dev);
+			return ret;
+		}
+	}
+#endif
=20
+	fwspec =3D dev_iommu_fwspec_get(dev);
 	if (!fwspec)
 		return -ENODEV;
=20
@@ -1521,17 +1544,38 @@ static int arm_smmu_add_device(u8 devfn, struct dev=
ice *dev)
 	 */
 	arm_smmu_enable_pasid(master);
=20
-	if (dt_device_is_protected(dev_to_dt(dev))) {
-		dev_err(dev, "Already added to SMMUv3\n");
-		return -EEXIST;
-	}
+	if ( !dev_is_pci(dev) )
+	{
+		if (dt_device_is_protected(dev_to_dt(dev))) {
+			dev_err(dev, "Already added to SMMUv3\n");
+			return -EEXIST;
+		}
=20
-	/* Let Xen know that the master device is protected by an IOMMU. */
-	dt_device_set_protected(dev_to_dt(dev));
+		/* Let Xen know that the master device is protected by an IOMMU. */
+		dt_device_set_protected(dev_to_dt(dev));
+	}
=20
 	dev_info(dev, "Added master device (SMMUv3 %s StreamIds %u)\n",
 			dev_name(fwspec->iommu_dev), fwspec->num_ids);
=20
+#ifdef CONFIG_HAS_PCI
+	if ( dev_is_pci(dev) )
+	{
+		struct pci_dev *pdev =3D dev_to_pci(dev);
+
+		/*
+		 * During PHYSDEVOP_pci_device_add, Xen does not assign the
+		 * device, so we must do it here.
+		 */
+		if ( pdev->domain )
+		{
+			ret =3D arm_smmu_assign_dev(pdev->domain, devfn, dev, 0);
+			if (ret)
+				goto err_free_master;
+		}
+	}
+#endif
+
 	return 0;
=20
 err_free_master:
@@ -2624,6 +2668,42 @@ static int arm_smmu_assign_dev(struct domain *d, u8 =
devfn,
 	struct arm_smmu_domain *smmu_domain;
 	struct arm_smmu_xen_domain *xen_domain =3D dom_iommu(d)->arch.priv;
=20
+#ifdef CONFIG_HAS_PCI
+	if ( dev_is_pci(dev) )
+	{
+		struct pci_dev *pdev =3D dev_to_pci(dev);
+
+		/* Ignore calls for phantom functions */
+		if ( devfn !=3D pdev->devfn )
+			return 0;
+
+		ASSERT(pcidevs_locked());
+
+		write_lock(&pdev->domain->pci_lock);
+		list_del(&pdev->domain_list);
+		write_unlock(&pdev->domain->pci_lock);
+
+		pdev->domain =3D d;
+
+		write_lock(&d->pci_lock);
+		list_add(&pdev->domain_list, &d->pdev_list);
+		write_unlock(&d->pci_lock);
+
+		/* dom_io is used as a sentinel for quarantined devices */
+		if ( d =3D=3D dom_io )
+		{
+			struct arm_smmu_master *master =3D dev_iommu_priv_get(dev);
+			if ( !iommu_quarantine )
+				return 0;
+
+			if ( master && master->domain )
+				arm_smmu_deassign_dev(master->domain->d, devfn, dev);
+
+			return 0;
+		}
+	}
+#endif
+
 	spin_lock(&xen_domain->lock);
=20
 	/*
@@ -2657,7 +2737,7 @@ out:
 	return ret;
 }
=20
-static int arm_smmu_deassign_dev(struct domain *d, struct device *dev)
+static int arm_smmu_deassign_dev(struct domain *d, uint8_t devfn, struct d=
evice *dev)
 {
 	struct iommu_domain *io_domain =3D arm_smmu_get_domain(d, dev);
 	struct arm_smmu_xen_domain *xen_domain =3D dom_iommu(d)->arch.priv;
@@ -2669,6 +2749,21 @@ static int arm_smmu_deassign_dev(struct domain *d, s=
truct device *dev)
 		return -ESRCH;
 	}
=20
+#ifdef CONFIG_HAS_PCI
+	if ( dev_is_pci(dev) )
+	{
+		struct pci_dev *pdev =3D dev_to_pci(dev);
+
+		/* Ignore calls for phantom functions */
+		if ( devfn !=3D pdev->devfn )
+			return 0;
+
+		/* dom_io is used as a sentinel for quarantined devices */
+		if ( d =3D=3D dom_io )
+			return 0;
+	}
+#endif
+
 	spin_lock(&xen_domain->lock);
=20
 	arm_smmu_detach_dev(master);
@@ -2687,14 +2782,16 @@ static int arm_smmu_reassign_dev(struct domain *s, =
struct domain *t,
 {
 	int ret =3D 0;
=20
-	/* Don't allow remapping on other domain than hwdom */
-	if ( t && !is_hardware_domain(t) )
+	/* Don't allow remapping on other domain than hwdom
+	 * or dom_io for PCI devices
+	 */
+	if ( t && !is_hardware_domain(t) && (t !=3D dom_io || !dev_is_pci(dev)) )
 		return -EPERM;
=20
 	if (t =3D=3D s)
 		return 0;
=20
-	ret =3D arm_smmu_deassign_dev(s, dev);
+	ret =3D arm_smmu_deassign_dev(s, devfn, dev);
 	if (ret)
 		return ret;
=20
--=20
2.34.1


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From: Mykyta Poturai 
To: "xen-devel@lists.xenproject.org" 
CC: Mykyta Poturai , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , Volodymyr
 Babchuk , Jan Beulich ,
	=?iso-8859-1?Q?Roger_Pau_Monn=E9?= , Rahul Singh
	, Andrew Cooper , Anthony
 PERARD 
Subject: [PATCH v10 0/7] SMMU handling for PCIe Passthrough on ARM
Thread-Topic: [PATCH v10 0/7] SMMU handling for PCIe Passthrough on ARM
Thread-Index: AQHbuP0ibykvWQwu2keuk1l3+BHLgw==
Date: Tue, 29 Apr 2025 11:52:08 +0000
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This series introduces SMMU handling for PCIe passthrough on ARM. These pat=
ches
should be able to be upstreamed independently from the vPCI series [1]. See=
 [2]
for notes about test cases.

[1] https://lists.xenproject.org/archives/html/xen-devel/2023-10/msg00660.h=
tml
[2] https://lists.xenproject.org/archives/html/xen-devel/2023-06/msg01135.h=
tml

v9->v10:
* drop iommu/arm: Add iommu_dt_xlate()
* see individual patches

v8->v9:
* see individual patches

v7->v8:
* no changes

v6->v7:
* drop ("xen/arm: don't pass iommu properties to hwdom for iommu-map")

v5->v6:
* don't revert ("xen/arm: Add cmdline boot option "pci-passthrough =3D "")
* add ("xen/arm: enable dom0 to use PCI devices with pci-passthrough=3Dno")

v4->v5:
* drop ("xen/arm: Improve readability of check for registered devices")
* drop ("xen/arm: Move is_protected flag to struct device")
* add ("xen/arm: don't pass iommu properties to hwdom for iommu-map")
* add ("xen/arm: Fix mapping for PCI bridge mmio region")
* revert ("xen/arm: Add cmdline boot option "pci-passthrough =3D "=
")
* add ("xen/arm: Map ITS doorbell register to IOMMU page tables.")
* fix test case #1 with PCI device in dom0

v3->v4:
* split a change from ("xen/arm: Move is_protected flag to struct device") =
into
  a new separate patch
* see individual patches for further details

v2->v3:
* drop "pci/arm: Use iommu_add_dt_pci_device()"
* drop "RFC: pci/arm: don't do iommu call for phantom functions"
* move invocation of sideband ID mapping function to add_device()
  platform_ops/iommu_ops hook
*** BLURB HERE ***

Oleksandr Andrushchenko (1):
  xen/arm: smmuv2: Add PCI devices support for SMMUv2

Oleksandr Tyshchenko (1):
  iommu/arm: Introduce iommu_add_dt_pci_sideband_ids API

Rahul Singh (3):
  xen/arm: smmuv3: Add PCI devices support for SMMUv3
  xen/arm: Fix mapping for PCI bridge mmio region
  xen/arm: Map ITS doorbell register to IOMMU page tables

Stewart Hildebrand (2):
  iommu/arm: iommu_add_dt_pci_sideband_ids phantom handling
  xen/arm: enable dom0 to use PCI devices with pci-passthrough=3Dno

 xen/arch/arm/device.c                 |   2 +-
 xen/arch/arm/include/asm/iommu.h      |  15 ++
 xen/arch/arm/include/asm/pci.h        |   2 +
 xen/arch/arm/pci/pci.c                |   8 +-
 xen/arch/arm/vgic-v3-its.c            |  24 ++-
 xen/arch/x86/include/asm/pci.h        |   5 +
 xen/common/device-tree/device-tree.c  |  91 +++++++++++
 xen/drivers/passthrough/arm/iommu.c   |  13 ++
 xen/drivers/passthrough/arm/smmu-v3.c | 119 ++++++++++++--
 xen/drivers/passthrough/arm/smmu.c    | 224 ++++++++++++++++----------
 xen/drivers/passthrough/device_tree.c |  49 ++++++
 xen/drivers/pci/physdev.c             |   4 +-
 xen/include/xen/device_tree.h         |  23 +++
 xen/include/xen/iommu.h               |  21 ++-
 xen/include/xen/pci.h                 |   5 +
 15 files changed, 507 insertions(+), 98 deletions(-)

--=20
2.34.1


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From: Mykyta Poturai 
To: "xen-devel@lists.xenproject.org" 
CC: Oleksandr Tyshchenko , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , Volodymyr
 Babchuk , Jan Beulich ,
	=?iso-8859-1?Q?Roger_Pau_Monn=E9?= , Stewart Hildebrand
	, Mykyta Poturai 
Subject: [PATCH v10 1/7] iommu/arm: Introduce iommu_add_dt_pci_sideband_ids
 API
Thread-Topic: [PATCH v10 1/7] iommu/arm: Introduce
 iommu_add_dt_pci_sideband_ids API
Thread-Index: AQHbuP0idLqgFikNiEOYLl4hPTxlpQ==
Date: Tue, 29 Apr 2025 11:52:09 +0000
Message-ID:
 <8110a8fd8648b1e40a47c51d68bf5cab5a46468d.1745918678.git.mykyta_poturai@epam.com>
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From: Oleksandr Tyshchenko 

The main purpose of this patch is to add a way to register PCI device
(which is behind the IOMMU) using the generic PCI-IOMMU DT bindings [1]
before assigning that device to a domain.

This behaves similarly to the existing iommu_add_dt_device API, except it
handles PCI devices, and it is to be invoked from the add_device hook in th=
e
SMMU driver.

The function dt_map_id to translate an ID through a downstream mapping
(which is also suitable for mapping Requester ID) was borrowed from Linux
(v5.10-rc6) and updated according to the Xen code base.

[1] https://www.kernel.org/doc/Documentation/devicetree/bindings/pci/pci-io=
mmu.txt

Signed-off-by: Oleksandr Tyshchenko 
Signed-off-by: Stewart Hildebrand 
Signed-off-by: Mykyta Poturai 
---
Regarding pci_for_each_dma_alias question: getting host bridge node
directly seems like a simpler solution with the same result. AFAIU
with pci_for_each_dma_alias in linux we would arrive to the host brige
node anyway, but also try to call dt_map_id for each device along the
way. I am not sure why exactly it is done this way in linux, as
according to the pci-iommu.txt, iommu-map node can only be present in
the PCI root.

v9->v10:
* move iommu_add_pci_sidebands_ids to arm/iommu.c
* replace be32_to_cpup with be32_to_cpu

v8->v9:
* replace DT_NO_IOMMU with 1
* guard iommu_add_pci_sideband_ids with CONFIG_ARM

v7->v8:
* ENOSYS->EOPNOTSUPP
* move iommu_add_pci_sideband_ids to iommu.c to fix x86 build
* simplify iommu_add_pci_sideband_ids
* add docstrings to iommu_add_{dt_}pci_sideband_ids

v6->v7:
* put iommu_add_pci_sideband_ids under ifdef
* remove ifdef CONFIG_APCI
* style: add newline for symmetry

v5->v6:
* pass ops to iommu_dt_xlate()

v4->v5:
* style: add newlines after variable declarations and before return in iomm=
u.h
* drop device_is_protected() check in iommu_add_dt_pci_sideband_ids()
* rebase on top of ("dynamic node programming using overlay dtbo") series
* fix typo in commit message
* remove #ifdef around dt_map_id() prototype
* move dt_map_id() to xen/common/device_tree.c
* add function name in error prints
* use dprintk for debug prints
* use GENMASK and #include 
* fix typo in comment
* remove unnecessary (int) cast in loop condition
* assign *id_out and return success in case of no translation in dt_map_id(=
)
* don't initialize local variable unnecessarily
* return error in case of ACPI/no DT in iommu_add_{dt_}pci_sideband_ids()

v3->v4:
* wrap #include  and if ( acpi_disabled ) in #ifdef CONFIG_ACPI
* fix Michal's remarks about style, parenthesis, and print formats
* remove !ops->dt_xlate check since it is already in iommu_dt_xlate helper
* rename s/iommu_dt_pci_map_id/dt_map_id/ because it is generic, not specif=
ic
  to iommu
* update commit description

v2->v3:
* new patch title (was: iommu/arm: Introduce iommu_add_dt_pci_device API)
* renamed function
  from: iommu_add_dt_pci_device
  to: iommu_add_dt_pci_sideband_ids
* removed stale ops->add_device check
* iommu.h: add empty stub iommu_add_dt_pci_sideband_ids for !HAS_DEVICE_TRE=
E
* iommu.h: add iommu_add_pci_sideband_ids helper
* iommu.h: don't wrap prototype in #ifdef CONFIG_HAS_PCI
* s/iommu_fwspec_free(pci_to_dev(pdev))/iommu_fwspec_free(dev)/

v1->v2:
* remove extra devfn parameter since pdev fully describes the device
* remove ops->add_device() call from iommu_add_dt_pci_device(). Instead, re=
ly on
  the existing iommu call in iommu_add_device().
* move the ops->add_device and ops->dt_xlate checks earlier

downstream->v1:
* rebase
* add const qualifier to struct dt_device_node *np arg in dt_map_id()
* add const qualifier to struct dt_device_node *np declaration in iommu_add=
_pci_device()
* use stdint.h types instead of u8/u32/etc...
* rename functions:
  s/dt_iommu_xlate/iommu_dt_xlate/
  s/dt_map_id/iommu_dt_pci_map_id/
  s/iommu_add_pci_device/iommu_add_dt_pci_device/
* add device_is_protected check in iommu_add_dt_pci_device
* wrap prototypes in CONFIG_HAS_PCI

(cherry picked from commit 734e3bf6ee77e7947667ab8fa96c25b349c2e1da from
 the downstream branch poc/pci-passthrough from
 https://gitlab.com/xen-project/people/bmarquis/xen-arm-poc.git)
---
 xen/arch/arm/include/asm/iommu.h      | 15 +++++
 xen/common/device-tree/device-tree.c  | 91 +++++++++++++++++++++++++++
 xen/drivers/passthrough/arm/iommu.c   | 13 ++++
 xen/drivers/passthrough/device_tree.c | 42 +++++++++++++
 xen/include/xen/device_tree.h         | 23 +++++++
 xen/include/xen/iommu.h               | 21 ++++++-
 6 files changed, 204 insertions(+), 1 deletion(-)

diff --git a/xen/arch/arm/include/asm/iommu.h b/xen/arch/arm/include/asm/io=
mmu.h
index d57bd8a38c..ad15477e24 100644
--- a/xen/arch/arm/include/asm/iommu.h
+++ b/xen/arch/arm/include/asm/iommu.h
@@ -34,6 +34,21 @@ int __must_check arm_iommu_unmap_page(struct domain *d, =
dfn_t dfn,
                                       unsigned int order,
                                       unsigned int *flush_flags);
=20
+/*
+ * This function is not strictly ARM-specific, but it is only used by ARM
+ * as of now. So put it here to avoid creating dead code on other
+ * architectures. When usage is extended to other architectures, it should
+ * be moved to the generic header.
+ *
+ *
+ * Fills out the device's IOMMU fwspec with IOMMU ids.
+ *
+ * Return values:
+ *  0 : iommu_fwspec is filled out successfully.
+ * <0 : error while filling out the iommu_fwspec.
+ * >0 : IOMMU is not enabled/present or device is not connected to it.
+ */
+int iommu_add_pci_sideband_ids(struct pci_dev *pdev);
 #endif /* __ARCH_ARM_IOMMU_H__ */
=20
 /*
diff --git a/xen/common/device-tree/device-tree.c b/xen/common/device-tree/=
device-tree.c
index 90fee2ba03..08f6ce6761 100644
--- a/xen/common/device-tree/device-tree.c
+++ b/xen/common/device-tree/device-tree.c
@@ -10,6 +10,7 @@
  * published by the Free Software Foundation.
  */
=20
+#include 
 #include 
 #include 
 #include 
@@ -2224,6 +2225,96 @@ int dt_get_pci_domain_nr(struct dt_device_node *node=
)
     return (u16)domain;
 }
=20
+int dt_map_id(const struct dt_device_node *np, uint32_t id,
+              const char *map_name, const char *map_mask_name,
+              struct dt_device_node **target, uint32_t *id_out)
+{
+    uint32_t map_mask, masked_id, map_len;
+    const __be32 *map =3D NULL;
+
+    if ( !np || !map_name || (!target && !id_out) )
+        return -EINVAL;
+
+    map =3D dt_get_property(np, map_name, &map_len);
+    if ( !map )
+    {
+        if ( target )
+            return -ENODEV;
+
+        /* Otherwise, no map implies no translation */
+        *id_out =3D id;
+        return 0;
+    }
+
+    if ( !map_len || (map_len % (4 * sizeof(*map))) )
+    {
+        printk(XENLOG_ERR "%s(): %s: Error: Bad %s length: %u\n", __func__=
,
+               np->full_name, map_name, map_len);
+        return -EINVAL;
+    }
+
+    /* The default is to select all bits. */
+    map_mask =3D GENMASK(31, 0);
+
+    /*
+     * Can be overridden by "{iommu,msi}-map-mask" property.
+     * If dt_property_read_u32() fails, the default is used.
+     */
+    if ( map_mask_name )
+        dt_property_read_u32(np, map_mask_name, &map_mask);
+
+    masked_id =3D map_mask & id;
+    for ( ; map_len > 0; map_len -=3D 4 * sizeof(*map), map +=3D 4 )
+    {
+        struct dt_device_node *phandle_node;
+        uint32_t id_base =3D be32_to_cpu(*(map + 0));
+        uint32_t phandle =3D be32_to_cpu(*(map + 1));
+        uint32_t out_base =3D be32_to_cpu(*(map + 2));
+        uint32_t id_len =3D be32_to_cpu(*(map + 3));
+
+        if ( id_base & ~map_mask )
+        {
+            printk(XENLOG_ERR "%s(): %s: Invalid %s translation - %s-mask =
(0x%"PRIx32") ignores id-base (0x%"PRIx32")\n",
+                   __func__, np->full_name, map_name, map_name, map_mask,
+                   id_base);
+            return -EFAULT;
+        }
+
+        if ( (masked_id < id_base) || (masked_id >=3D (id_base + id_len)) =
)
+            continue;
+
+        phandle_node =3D dt_find_node_by_phandle(phandle);
+        if ( !phandle_node )
+            return -ENODEV;
+
+        if ( target )
+        {
+            if ( !*target )
+                *target =3D phandle_node;
+
+            if ( *target !=3D phandle_node )
+                continue;
+        }
+
+        if ( id_out )
+            *id_out =3D masked_id - id_base + out_base;
+
+        dprintk(XENLOG_DEBUG, "%s: %s, using mask %08"PRIx32", id-base: %0=
8"PRIx32", out-base: %08"PRIx32", length: %08"PRIx32", id: %08"PRIx32" -> %=
08"PRIx32"\n",
+               np->full_name, map_name, map_mask, id_base, out_base, id_le=
n, id,
+               masked_id - id_base + out_base);
+        return 0;
+    }
+
+    dprintk(XENLOG_DEBUG, "%s: no %s translation for id 0x%"PRIx32" on %s\=
n",
+           np->full_name, map_name, id,
+           (target && *target) ? (*target)->full_name : NULL);
+
+    if ( id_out )
+        *id_out =3D id;
+
+    return 0;
+}
+
 /*
  * Local variables:
  * mode: C
diff --git a/xen/drivers/passthrough/arm/iommu.c b/xen/drivers/passthrough/=
arm/iommu.c
index fc453180f0..100545e23f 100644
--- a/xen/drivers/passthrough/arm/iommu.c
+++ b/xen/drivers/passthrough/arm/iommu.c
@@ -15,6 +15,7 @@
  * GNU General Public License for more details.
  */
=20
+#include 
 #include 
 #include 
 #include 
@@ -151,3 +152,15 @@ bool arch_iommu_use_permitted(const struct domain *d)
 {
     return true;
 }
+
+int iommu_add_pci_sideband_ids(struct pci_dev *pdev)
+{
+    int ret =3D -EOPNOTSUPP;
+
+#ifdef CONFIG_HAS_PCI
+    if ( acpi_disabled )
+        ret =3D iommu_add_dt_pci_sideband_ids(pdev);
+#endif
+
+    return ret;
+}
diff --git a/xen/drivers/passthrough/device_tree.c b/xen/drivers/passthroug=
h/device_tree.c
index 4a1971c3fc..37e1437b65 100644
--- a/xen/drivers/passthrough/device_tree.c
+++ b/xen/drivers/passthrough/device_tree.c
@@ -161,6 +161,48 @@ static int iommu_dt_xlate(struct device *dev,
     return ops->dt_xlate(dev, iommu_spec);
 }
=20
+#ifdef CONFIG_HAS_PCI
+int iommu_add_dt_pci_sideband_ids(struct pci_dev *pdev)
+{
+    const struct iommu_ops *ops =3D iommu_get_ops();
+    struct dt_phandle_args iommu_spec =3D { .args_count =3D 1 };
+    struct device *dev =3D pci_to_dev(pdev);
+    const struct dt_device_node *np;
+    int rc;
+
+    if ( !iommu_enabled )
+        return 1;
+
+    if ( !ops )
+        return -EINVAL;
+
+    if ( dev_iommu_fwspec_get(dev) )
+        return -EEXIST;
+
+    np =3D pci_find_host_bridge_node(pdev);
+    if ( !np )
+        return -ENODEV;
+
+    /*
+     * According to the Documentation/devicetree/bindings/pci/pci-iommu.tx=
t
+     * from Linux.
+     */
+    rc =3D dt_map_id(np, PCI_BDF(pdev->bus, pdev->devfn), "iommu-map",
+                   "iommu-map-mask", &iommu_spec.np, iommu_spec.args);
+    if ( rc )
+        return (rc =3D=3D -ENODEV) ? 1 : rc;
+
+    rc =3D iommu_dt_xlate(dev, &iommu_spec, ops);
+    if ( rc < 0 )
+    {
+        iommu_fwspec_free(dev);
+        return -EINVAL;
+    }
+
+    return rc;
+}
+#endif /* CONFIG_HAS_PCI */
+
 int iommu_remove_dt_device(struct dt_device_node *np)
 {
     const struct iommu_ops *ops =3D iommu_get_ops();
diff --git a/xen/include/xen/device_tree.h b/xen/include/xen/device_tree.h
index 6dc1fb5159..3de7ff9085 100644
--- a/xen/include/xen/device_tree.h
+++ b/xen/include/xen/device_tree.h
@@ -947,6 +947,29 @@ int dt_count_phandle_with_args(const struct dt_device_=
node *np,
  */
 int dt_get_pci_domain_nr(struct dt_device_node *node);
=20
+/**
+ * dt_map_id - Translate an ID through a downstream mapping.
+ * @np: root complex device node.
+ * @id: device ID to map.
+ * @map_name: property name of the map to use.
+ * @map_mask_name: optional property name of the mask to use.
+ * @target: optional pointer to a target device node.
+ * @id_out: optional pointer to receive the translated ID.
+ *
+ * Given a device ID, look up the appropriate implementation-defined
+ * platform ID and/or the target device which receives transactions on tha=
t
+ * ID, as per the "iommu-map" and "msi-map" bindings. Either of @target or
+ * @id_out may be NULL if only the other is required. If @target points to
+ * a non-NULL device node pointer, only entries targeting that node will b=
e
+ * matched; if it points to a NULL value, it will receive the device node =
of
+ * the first matching target phandle, with a reference held.
+ *
+ * Return: 0 on success or a standard error code on failure.
+ */
+int dt_map_id(const struct dt_device_node *np, uint32_t id,
+              const char *map_name, const char *map_mask_name,
+              struct dt_device_node **target, uint32_t *id_out);
+
 struct dt_device_node *dt_find_node_by_phandle(dt_phandle handle);
=20
 #ifdef CONFIG_DEVICE_TREE_DEBUG
diff --git a/xen/include/xen/iommu.h b/xen/include/xen/iommu.h
index 832775754b..ebfada1d88 100644
--- a/xen/include/xen/iommu.h
+++ b/xen/include/xen/iommu.h
@@ -241,7 +241,8 @@ int iommu_dt_domain_init(struct domain *d);
 int iommu_release_dt_devices(struct domain *d);
=20
 /*
- * Helper to add master device to the IOMMU using generic IOMMU DT binding=
s.
+ * Helpers to add master device to the IOMMU using generic (PCI-)IOMMU
+ * DT bindings.
  *
  * Return values:
  *  0 : device is protected by an IOMMU
@@ -251,6 +252,19 @@ int iommu_release_dt_devices(struct domain *d);
  */
 int iommu_add_dt_device(struct dt_device_node *np);
=20
+/*
+ * Fills out the device's IOMMU fwspec with IOMMU ids from the DT.
+ * Ids are specified in the iommu-map property in the host bridge node.
+ * More information on the iommu-map property format can be found in
+ * Documentation/devicetree/bindings/pci/pci-iommu.txt from Linux.
+ *
+ * Return values:
+ *  0 : iommu_fwspec is filled out successfully.
+ * <0 : error while filling out the iommu_fwspec.
+ * >0 : IOMMU is not enabled/present or device is not connected to it.
+ */
+int iommu_add_dt_pci_sideband_ids(struct pci_dev *pdev);
+
 int iommu_do_dt_domctl(struct xen_domctl *domctl, struct domain *d,
                        XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl);
=20
@@ -286,6 +300,11 @@ static inline int iommu_release_dt_devices(struct doma=
in *d)
     return 0;
 }
=20
+static inline int iommu_add_dt_pci_sideband_ids(struct pci_dev *pdev)
+{
+    return -EOPNOTSUPP;
+}
+
 #endif /* HAS_PASSTHROUGH */
=20
 #endif /* HAS_DEVICE_TREE */
--=20
2.34.1


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From: Mykyta Poturai 
To: "xen-devel@lists.xenproject.org" 
CC: Rahul Singh , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , Volodymyr
 Babchuk , Stewart Hildebrand
	, Mykyta Poturai 
Subject: [PATCH v10 7/7] xen/arm: Map ITS doorbell register to IOMMU page
 tables
Thread-Topic: [PATCH v10 7/7] xen/arm: Map ITS doorbell register to IOMMU page
 tables
Thread-Index: AQHbuP0kTLZqYRB+4keNMzg1ePGW7w==
Date: Tue, 29 Apr 2025 11:52:11 +0000
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From: Rahul Singh 

When ITS is enabled and PCI devices that are behind an SMMU generate an
MSI interrupt, SMMU fault will be observed as there is currently no
mapping in p2m table for the ITS translation register (GITS_TRANSLATER).

A mapping is required in the iommu page tables so that the device can
generate the MSI interrupt writing to the GITS_TRANSLATER register.

The GITS_TRANSLATER register is a 32-bit register, and there is nothing
else in a page containing it, so map that page.

Add new host_addr parameter to vgic_v3_its_init_virtual to prepare the
foundation for DomU MSI support where guest doorbell address can differ
for the host's. Note that the 1:1 check in arm_iommu_map_page remains
for now, as virtual ITSes are currently only created for hwdom where the
doorbell mapping is always 1:1.

Signed-off-by: Rahul Singh 
Signed-off-by: Stewart Hildebrand 
Signed-off-by: Mykyta Poturai 
---
This patch was originally picked up from [1], and commit description
loosely borrowed from [2].

Example SMMUv3 fault (qemu-system-aarch64 virt model), ITS base 0x8080000:

(XEN) SMMUv3: /smmuv3@9050000: event 0x10 received:
(XEN) SMMUv3: /smmuv3@9050000:  0x0000000800000010
(XEN) SMMUv3: /smmuv3@9050000:  0x0000008000000000
(XEN) SMMUv3: /smmuv3@9050000:  0x0000000008090040
(XEN) SMMUv3: /smmuv3@9050000:  0x0000000000000000

Example SMMUv2 fault (AMD/Xilinx Versal), ITS base 0xf9020000:

(XEN) smmu: /axi/smmu@fd800000: Unhandled context fault: fsr=3D0x402, iova=
=3D0xf9030040, fsynr=3D0x12, cb=3D0

v9->v10:
* map vITS doorbell to host ITS doorbell instead of always 1:1
* use simpler addr to dfn conversion

v8->v9:
* no changes

v7->v8:
* no changes

v6->v7:
* add tlb flush after mapping
* style: update formatting
* revert back to printk with XENLOG_G_ERR

v5->v6:
* switch to iommu_map() interface
* fix page_count argument
* style fixup
* use gprintk instead of printk
* add my Signed-off-by
* move to vgic_v3_its_init_virtual()

v4->v5:
* new patch

[1] https://lists.xenproject.org/archives/html/xen-devel/2023-07/msg00483.h=
tml
[2] https://gitlab.com/xen-project/people/bmarquis/xen-arm-poc/-/commit/623=
2a0d53377009bb7fbc3c3ab81d0153734be6b
---
 xen/arch/arm/vgic-v3-its.c | 24 +++++++++++++++++++++++-
 1 file changed, 23 insertions(+), 1 deletion(-)

diff --git a/xen/arch/arm/vgic-v3-its.c b/xen/arch/arm/vgic-v3-its.c
index c65c1dbf52..bc738614bb 100644
--- a/xen/arch/arm/vgic-v3-its.c
+++ b/xen/arch/arm/vgic-v3-its.c
@@ -1445,11 +1445,13 @@ static const struct mmio_handler_ops vgic_its_mmio_=
handler =3D {
 };
=20
 static int vgic_v3_its_init_virtual(struct domain *d, paddr_t guest_addr,
+                                    paddr_t host_addr,
                                     unsigned int devid_bits,
                                     unsigned int evid_bits)
 {
     struct virt_its *its;
     uint64_t base_attr;
+    paddr_t host_doorbell_addr =3D host_addr + ITS_DOORBELL_OFFSET;
=20
     its =3D xzalloc(struct virt_its);
     if ( !its )
@@ -1478,6 +1480,26 @@ static int vgic_v3_its_init_virtual(struct domain *d=
, paddr_t guest_addr,
=20
     register_mmio_handler(d, &vgic_its_mmio_handler, guest_addr, SZ_64K, i=
ts);
=20
+    if ( is_iommu_enabled(its->d) )
+    {
+        mfn_t mfn =3D maddr_to_mfn(host_doorbell_addr);
+        unsigned int flush_flags =3D 0;
+        int ret =3D iommu_map(its->d, _dfn(PFN_DOWN(its->doorbell_address)=
),
+                            mfn, 1, IOMMUF_writable, &flush_flags);
+
+        if ( ret < 0 )
+        {
+            printk(XENLOG_G_ERR
+                    "GICv3: Map ITS translation register for %pd failed.\n=
",
+                    its->d);
+            return ret;
+        }
+
+        ret =3D iommu_iotlb_flush(its->d, _dfn(PFN_DOWN(its->doorbell_addr=
ess)), 1, flush_flags);
+        if ( ret < 0 )
+            return ret;
+    }
+
     /* Register the virtual ITS to be able to clean it up later. */
     list_add_tail(&its->vits_list, &d->arch.vgic.vits_list);
=20
@@ -1522,7 +1544,7 @@ int vgic_v3_its_init_domain(struct domain *d)
              * base and thus doorbell address.
              * Use the same number of device ID and event ID bits as the h=
ost.
              */
-            ret =3D vgic_v3_its_init_virtual(d, hw_its->addr,
+            ret =3D vgic_v3_its_init_virtual(d, hw_its->addr, hw_its->addr=
,
                                            hw_its->devid_bits,
                                            hw_its->evid_bits);
             if ( ret )
--=20
2.34.1


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From: Mykyta Poturai 
To: "xen-devel@lists.xenproject.org" 
CC: Rahul Singh , Stefano Stabellini
	, Julien Grall , Bertrand Marquis
	, Michal Orzel , Volodymyr
 Babchuk , Stewart Hildebrand
	, Julien Grall 
Subject: [PATCH v10 5/7] xen/arm: Fix mapping for PCI bridge mmio region
Thread-Topic: [PATCH v10 5/7] xen/arm: Fix mapping for PCI bridge mmio region
Thread-Index: AQHbuP0jWajlCsZZMkaNMgMdfvsIkQ==
Date: Tue, 29 Apr 2025 11:52:10 +0000
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From: Rahul Singh 

Current code skip the mapping for PCI bridge MMIO region to dom0 when
pci_passthrough_enabled flag is set. Mapping should be skip when
has_vpci(d) is enabled for the domain, as we need to skip the mapping
only when VPCI handler are registered for ECAM.

Signed-off-by: Rahul Singh 
Signed-off-by: Stewart Hildebrand 
Acked-by: Julien Grall 
---
This patch was originally picked up from [1]
v9->v10:
* no change

v8->v9:
* no change

v7->v8:
* no change

v6->v7:
* add Julien's A-b

v5->v6:
* drop unrelated change in xen/arch/arm/domain_build.c:handle_linux_pci_dom=
ain()

v4->v5:
* new patch

changes since picking up from [1]:
* rebase on top of "dynamic node programming using overlay dtbo" series
* replace !is_pci_passthrough_enabled() check with !IS_ENABLED(CONFIG_HAS_P=
CI)
  instead of removing

[1] https://lists.xenproject.org/archives/html/xen-devel/2023-07/msg00483.h=
tml
---
 xen/arch/arm/device.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/arch/arm/device.c b/xen/arch/arm/device.c
index 5e1c1cc326..11523750ae 100644
--- a/xen/arch/arm/device.c
+++ b/xen/arch/arm/device.c
@@ -268,7 +268,7 @@ int handle_device(struct domain *d, struct dt_device_no=
de *dev, p2m_type_t p2mt,
         .d =3D d,
         .p2mt =3D p2mt,
         .skip_mapping =3D !own_device ||
-                        (is_pci_passthrough_enabled() &&
+                        (has_vpci(d) &&
                         (device_get_class(dev) =3D=3D DEVICE_PCI_HOSTBRIDG=
E)),
         .iomem_ranges =3D iomem_ranges,
         .irq_ranges =3D irq_ranges
--=20
2.34.1


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From: Mykyta Poturai 
To: "xen-devel@lists.xenproject.org" 
CC: Oleksandr Andrushchenko , Julien Grall
	, Rahul Singh , Stefano Stabellini
	, Bertrand Marquis , Michal
 Orzel , Volodymyr Babchuk ,
	Oleksandr Tyshchenko , Stewart Hildebrand
	, Mykyta Poturai 
Subject: [PATCH v10 3/7] xen/arm: smmuv2: Add PCI devices support for SMMUv2
Thread-Topic: [PATCH v10 3/7] xen/arm: smmuv2: Add PCI devices support for
 SMMUv2
Thread-Index: AQHbuP0jnTAzHmn7sUu9THz0sjqD/g==
Date: Tue, 29 Apr 2025 11:52:09 +0000
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 <4874d41630f6bb3e7b688bfa332004558bb543b9.1745918678.git.mykyta_poturai@epam.com>
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From: Oleksandr Andrushchenko 

Implement support for PCI devices in the SMMU driver. Make arm_smmu_master
structure to hold a pointer to the device to allow it to hold PCI devices.
Trigger iommu-map parsing when new PCI device is added. Add checks to
assign/deassign functions to ensure PCI devices are handled correctly.
Implement basic quarantining.

All pci devices are automatically assigned to hardware domain if it exists
to ensure it can probe them.

TODO:
Implement scratch page quarantining support.

Signed-off-by: Oleksandr Tyshchenko 
Signed-off-by: Oleksandr Andrushchenko 
Signed-off-by: Stewart Hildebrand 
Signed-off-by: Mykyta Poturai 
---
v9->v10:
* remove unused code
* return on error in arm_smmu_dt_add_device_generic

v8->v9:
* no change

v7->v8:
* no change

v6->v7:
* use d->pci_lock in arm_smmu_assign_dev()
* remove !is_hardware_domain and pdev->domain =3D=3D d checks in assign to
  support future dom0less use case when dom0 is using vPCI
* remove stale todo in dev_get_dev_node
* don't print ""
* remove redundant dt_device_is_protected check
* remove assign/deassing prints
* change assign logic to remove reassign reimplementation
* check if pdev->domain exists before assigning to it
* explain pdev->devfn check
* make reassign check stricter and update comment

v5->v6:
* check for hardware_domain =3D=3D NULL (dom0less test case)
* locking: assign pdev->domain before list_add()

v4->v5:
* assign device to pdev->domain (usually dom0) by default in add_device() h=
ook
* deassign from hwdom
* rebase on top of ("dynamic node programming using overlay dtbo") series
* remove TODO in comment about device prints
* add TODO regarding locking
* fixup after dropping ("xen/arm: Move is_protected flag to struct device")

v3->v4:
* add new device_is_protected check in add_device hook to match SMMUv3 and
  IPMMU-VMSA drivers

v2->v3:
* invoke iommu_add_pci_sideband_ids() from add_device hook

v1->v2:
* ignore add_device/assign_device/reassign_device calls for phantom functio=
ns
  (i.e. devfn !=3D pdev->devfn)

downstream->v1:
* wrap unused function in #ifdef 0
* remove the remove_device() stub since it was submitted separately to the =
list
  [XEN][PATCH v6 12/19] xen/smmu: Add remove_device callback for smmu_iommu=
 ops
  https://lists.xenproject.org/archives/html/xen-devel/2023-05/msg00204.htm=
l
* arm_smmu_(de)assign_dev: return error instead of crashing system
* update condition in arm_smmu_reassign_dev
* style fixup
* add && !is_hardware_domain(d) into condition in arm_smmu_assign_dev()

(cherry picked from commit 0c11a7f65f044c26d87d1e27ac6283ef1f9cfb7a from
 the downstream branch spider-master from
 https://github.com/xen-troops/xen.git)
---
 xen/drivers/passthrough/arm/smmu.c | 224 ++++++++++++++++++-----------
 1 file changed, 143 insertions(+), 81 deletions(-)

diff --git a/xen/drivers/passthrough/arm/smmu.c b/xen/drivers/passthrough/a=
rm/smmu.c
index 0f8d47dc98..b9f2a33815 100644
--- a/xen/drivers/passthrough/arm/smmu.c
+++ b/xen/drivers/passthrough/arm/smmu.c
@@ -120,11 +120,21 @@ enum irqreturn {
=20
 typedef enum irqreturn irqreturn_t;
=20
-/* Device logger functions
- * TODO: Handle PCI
- */
-#define dev_print(dev, lvl, fmt, ...)						\
-	 printk(lvl "smmu: %s: " fmt, dt_node_full_name(dev_to_dt(dev)), ## __VA_=
ARGS__)
+/* Device logger functions */
+#ifndef CONFIG_HAS_PCI
+#define dev_print(dev, lvl, fmt, ...)    \
+    printk(lvl "smmu: %s: " fmt, dev_name(dev), ## __VA_ARGS__)
+#else
+#define dev_print(dev, lvl, fmt, ...) ({                                \
+    if ( !dev_is_pci((dev)) )                                           \
+        printk(lvl "smmu: %s: " fmt, dev_name((dev)), ## __VA_ARGS__);  \
+    else                                                                \
+    {                                                                   \
+        struct pci_dev *pdev =3D dev_to_pci((dev));                       =
\
+        printk(lvl "smmu: %pp: " fmt, &pdev->sbdf, ## __VA_ARGS__);     \
+    }                                                                   \
+})
+#endif
=20
 #define dev_dbg(dev, fmt, ...) dev_print(dev, XENLOG_DEBUG, fmt, ## __VA_A=
RGS__)
 #define dev_notice(dev, fmt, ...) dev_print(dev, XENLOG_INFO, fmt, ## __VA=
_ARGS__)
@@ -172,20 +182,6 @@ static void __iomem *devm_ioremap_resource(struct devi=
ce *dev,
 #define IOMMU_FAULT_READ	0
 #define IOMMU_FAULT_WRITE	1
=20
-/*
- * Xen: PCI functions
- * TODO: It should be implemented when PCI will be supported
- */
-#define to_pci_dev(dev)	(NULL)
-static inline int pci_for_each_dma_alias(struct pci_dev *pdev,
-					 int (*fn) (struct pci_dev *pdev,
-						    u16 alias, void *data),
-					 void *data)
-{
-	BUG();
-	return 0;
-}
-
 /* Xen: misc */
 #define PHYS_MASK_SHIFT		PADDR_BITS
=20
@@ -619,7 +615,7 @@ struct arm_smmu_master_cfg {
 	for (i =3D 0; idx =3D (cfg)->smendx[i], (i) < (num); ++(i))
=20
 struct arm_smmu_master {
-	struct device_node		*of_node;
+	struct device			*dev;
 	struct rb_node			node;
 	struct arm_smmu_master_cfg	cfg;
 };
@@ -711,7 +707,7 @@ arm_smmu_get_fwspec(struct arm_smmu_master_cfg *cfg)
 {
 	struct arm_smmu_master *master =3D container_of(cfg,
 			                                      struct arm_smmu_master, cfg);
-	return dev_iommu_fwspec_get(&master->of_node->dev);
+	return dev_iommu_fwspec_get(master->dev);
 }
=20
 static void parse_driver_options(struct arm_smmu_device *smmu)
@@ -730,21 +726,11 @@ static void parse_driver_options(struct arm_smmu_devi=
ce *smmu)
=20
 static struct device_node *dev_get_dev_node(struct device *dev)
 {
-#if 0 /* Xen: TODO: Add support for PCI */
-	if (dev_is_pci(dev)) {
-		struct pci_bus *bus =3D to_pci_dev(dev)->bus;
-
-		while (!pci_is_root_bus(bus))
-			bus =3D bus->parent;
-		return bus->bridge->parent->of_node;
-	}
-#endif
-
 	return dev->of_node;
 }
=20
 static struct arm_smmu_master *find_smmu_master(struct arm_smmu_device *sm=
mu,
-						struct device_node *dev_node)
+						struct device *dev)
 {
 	struct rb_node *node =3D smmu->masters.rb_node;
=20
@@ -753,9 +739,9 @@ static struct arm_smmu_master *find_smmu_master(struct =
arm_smmu_device *smmu,
=20
 		master =3D container_of(node, struct arm_smmu_master, node);
=20
-		if (dev_node < master->of_node)
+		if (dev < master->dev)
 			node =3D node->rb_left;
-		else if (dev_node > master->of_node)
+		else if (dev > master->dev)
 			node =3D node->rb_right;
 		else
 			return master;
@@ -790,9 +776,9 @@ static int insert_smmu_master(struct arm_smmu_device *s=
mmu,
 			=3D container_of(*new, struct arm_smmu_master, node);
=20
 		parent =3D *new;
-		if (master->of_node < this->of_node)
+		if (master->dev < this->dev)
 			new =3D &((*new)->rb_left);
-		else if (master->of_node > this->of_node)
+		else if (master->dev > this->dev)
 			new =3D &((*new)->rb_right);
 		else
 			return -EEXIST;
@@ -824,28 +810,30 @@ static int arm_smmu_dt_add_device_legacy(struct arm_s=
mmu_device *smmu,
 	struct arm_smmu_master *master;
 	struct device_node *dev_node =3D dev_get_dev_node(dev);
=20
-	master =3D find_smmu_master(smmu, dev_node);
+	master =3D find_smmu_master(smmu, dev);
 	if (master) {
 		dev_err(dev,
-			"rejecting multiple registrations for master device %s\n",
-			dev_node->name);
+			"rejecting multiple registrations for master device\n");
 		return -EBUSY;
 	}
=20
 	master =3D devm_kzalloc(dev, sizeof(*master), GFP_KERNEL);
 	if (!master)
 		return -ENOMEM;
-	master->of_node =3D dev_node;
+	master->dev =3D dev;
=20
-	/* Xen: Let Xen know that the device is protected by an SMMU */
-	dt_device_set_protected(dev_node);
+	if ( !dev_is_pci(dev) )
+	{
+		/* Xen: Let Xen know that the device is protected by an SMMU */
+		dt_device_set_protected(dev_node);
+	}
=20
 	for (i =3D 0; i < fwspec->num_ids; ++i) {
 		if (!(smmu->features & ARM_SMMU_FEAT_STREAM_MATCH) &&
 		     (fwspec->ids[i] >=3D smmu->num_mapping_groups)) {
 			dev_err(dev,
-				"stream ID for master device %s greater than maximum allowed (%d)\n",
-				dev_node->name, smmu->num_mapping_groups);
+				"SMMU stream ID %d is greater than maximum allowed (%d)\n",
+				fwspec->ids[i], smmu->num_mapping_groups);
 			return -ERANGE;
 		}
 		master->cfg.smendx[i] =3D INVALID_SMENDX;
@@ -860,7 +848,7 @@ static int arm_smmu_dt_remove_device_legacy(struct arm_=
smmu_device *smmu,
 	struct device_node *dev_node =3D dev_get_dev_node(dev);
 	int ret;
=20
-	master =3D find_smmu_master(smmu, dev_node);
+	master =3D find_smmu_master(smmu, dev);
 	if (master =3D=3D NULL) {
 		dev_err(dev,
 			"No registrations found for master device %s\n",
@@ -872,8 +860,9 @@ static int arm_smmu_dt_remove_device_legacy(struct arm_=
smmu_device *smmu,
 	if (ret)
 		return ret;
=20
-	/* Protected by dt_host_lock and dtdevs_lock as caller holds these locks.=
 */
-	dev_node->is_protected =3D false;
+	if ( !dev_is_pci(dev) )
+		/* Protected by dt_host_lock and dtdevs_lock as caller holds these locks=
. */
+		dev_node->is_protected =3D false;
=20
 	kfree(master);
 	return 0;
@@ -902,6 +891,12 @@ static int register_smmu_master(struct arm_smmu_device=
 *smmu,
 					     fwspec);
 }
=20
+/* Forward declaration */
+static int arm_smmu_assign_dev(struct domain *d, u8 devfn,
+			       struct device *dev, u32 flag);
+static int arm_smmu_deassign_dev(struct domain *d, uint8_t devfn,
+				 struct device *dev);
+
 /*
  * The driver which supports generic IOMMU DT bindings must have this
  * callback implemented.
@@ -926,6 +921,25 @@ static int arm_smmu_dt_add_device_generic(u8 devfn, st=
ruct device *dev)
 {
 	struct arm_smmu_device *smmu;
 	struct iommu_fwspec *fwspec;
+	int ret;
+
+#ifdef CONFIG_HAS_PCI
+	if ( dev_is_pci(dev) )
+	{
+		struct pci_dev *pdev =3D dev_to_pci(dev);
+		int ret;
+
+		/* Ignore calls for phantom functions */
+		if ( devfn !=3D pdev->devfn )
+			return 0;
+
+		ret =3D iommu_add_pci_sideband_ids(pdev);
+		if ( ret < 0 ) {
+			iommu_fwspec_free(dev);
+			return ret;
+		}
+	}
+#endif
=20
 	fwspec =3D dev_iommu_fwspec_get(dev);
 	if (fwspec =3D=3D NULL)
@@ -935,7 +949,25 @@ static int arm_smmu_dt_add_device_generic(u8 devfn, st=
ruct device *dev)
 	if (smmu =3D=3D NULL)
 		return -ENXIO;
=20
-	return arm_smmu_dt_add_device_legacy(smmu, dev, fwspec);
+	ret =3D arm_smmu_dt_add_device_legacy(smmu, dev, fwspec);
+	if ( ret )
+		return ret;
+
+#ifdef CONFIG_HAS_PCI
+	if ( dev_is_pci(dev) )
+	{
+		struct pci_dev *pdev =3D dev_to_pci(dev);
+
+		/*
+		 * During PHYSDEVOP_pci_device_add, Xen does not assign the
+		 * device, so we must do it here.
+		 */
+		if ( pdev->domain )
+			ret =3D arm_smmu_assign_dev(pdev->domain, devfn, dev, 0);
+	}
+#endif
+
+	return ret;
 }
=20
 static int arm_smmu_dt_xlate_generic(struct device *dev,
@@ -958,11 +990,10 @@ static struct arm_smmu_device *find_smmu_for_device(s=
truct device *dev)
 {
 	struct arm_smmu_device *smmu;
 	struct arm_smmu_master *master =3D NULL;
-	struct device_node *dev_node =3D dev_get_dev_node(dev);
=20
 	spin_lock(&arm_smmu_devices_lock);
 	list_for_each_entry(smmu, &arm_smmu_devices, list) {
-		master =3D find_smmu_master(smmu, dev_node);
+		master =3D find_smmu_master(smmu, dev);
 		if (master)
 			break;
 	}
@@ -2054,6 +2085,7 @@ static bool arm_smmu_capable(enum iommu_cap cap)
 }
 #endif
=20
+#if 0 /* Not used */
 static int __arm_smmu_get_pci_sid(struct pci_dev *pdev, u16 alias, void *d=
ata)
 {
 	*((u16 *)data) =3D alias;
@@ -2064,6 +2096,7 @@ static void __arm_smmu_release_pci_iommudata(void *da=
ta)
 {
 	kfree(data);
 }
+#endif
=20
 static int arm_smmu_add_device(struct device *dev)
 {
@@ -2071,40 +2104,15 @@ static int arm_smmu_add_device(struct device *dev)
 	struct arm_smmu_master_cfg *cfg;
 	struct iommu_group *group;
 	void (*releasefn)(void *data) =3D NULL;
-	int ret;
=20
 	smmu =3D find_smmu_for_device(dev);
 	if (!smmu)
 		return -ENODEV;
=20
-	if (dev_is_pci(dev)) {
-		struct pci_dev *pdev =3D to_pci_dev(dev);
-		struct iommu_fwspec *fwspec;
-
-		cfg =3D kzalloc(sizeof(*cfg), GFP_KERNEL);
-		if (!cfg) {
-			return -ENOMEM;
-		}
-
-		ret =3D iommu_fwspec_init(dev, smmu->dev);
-		if (ret) {
-			kfree(cfg);
-			return ret;
-		}
-		fwspec =3D dev_iommu_fwspec_get(dev);
-
-		/*
-		 * Assume Stream ID =3D=3D Requester ID for now.
-		 * We need a way to describe the ID mappings in FDT.
-		 */
-		pci_for_each_dma_alias(pdev, __arm_smmu_get_pci_sid,
-				       &fwspec->ids[0]);
-		releasefn =3D __arm_smmu_release_pci_iommudata;
-		cfg->smmu =3D smmu;
-	} else {
+	{
 		struct arm_smmu_master *master;
=20
-		master =3D find_smmu_master(smmu, dev->of_node);
+		master =3D find_smmu_master(smmu, dev);
 		if (!master) {
 			return -ENODEV;
 		}
@@ -2772,6 +2780,42 @@ static int arm_smmu_assign_dev(struct domain *d, u8 =
devfn,
 			return -ENOMEM;
 	}
=20
+#ifdef CONFIG_HAS_PCI
+	if ( dev_is_pci(dev) )
+	{
+		struct pci_dev *pdev =3D dev_to_pci(dev);
+
+		/* Ignore calls for phantom functions */
+		if ( devfn !=3D pdev->devfn )
+			return 0;
+
+		ASSERT(pcidevs_locked());
+
+		write_lock(&pdev->domain->pci_lock);
+		list_del(&pdev->domain_list);
+		write_unlock(&pdev->domain->pci_lock);
+
+		pdev->domain =3D d;
+
+		write_lock(&d->pci_lock);
+		list_add(&pdev->domain_list, &d->pdev_list);
+		write_unlock(&d->pci_lock);
+
+		/* dom_io is used as a sentinel for quarantined devices */
+		if ( d =3D=3D dom_io )
+		{
+			struct iommu_domain *domain =3D dev_iommu_domain(dev);
+			if ( !iommu_quarantine )
+				return 0;
+
+			if ( domain && domain->priv )
+				arm_smmu_deassign_dev(domain->priv->cfg.domain, devfn, dev);
+
+			return 0;
+		}
+	}
+#endif
+
 	if (!dev_iommu_group(dev)) {
 		ret =3D arm_smmu_add_device(dev);
 		if (ret)
@@ -2821,11 +2865,27 @@ out:
 	return ret;
 }
=20
-static int arm_smmu_deassign_dev(struct domain *d, struct device *dev)
+static int arm_smmu_deassign_dev(struct domain *d, uint8_t devfn,
+				 struct device *dev)
 {
 	struct iommu_domain *domain =3D dev_iommu_domain(dev);
 	struct arm_smmu_xen_domain *xen_domain;
=20
+#ifdef CONFIG_HAS_PCI
+	if ( dev_is_pci(dev) )
+	{
+		struct pci_dev *pdev =3D dev_to_pci(dev);
+
+		/* Ignore calls for phantom functions */
+		if ( devfn !=3D pdev->devfn )
+			return 0;
+
+		/* dom_io is used as a sentinel for quarantined devices */
+		if ( d =3D=3D dom_io )
+			return 0;
+	}
+#endif
+
 	xen_domain =3D dom_iommu(d)->arch.priv;
=20
 	if (!domain || domain->priv->cfg.domain !=3D d) {
@@ -2852,14 +2912,16 @@ static int arm_smmu_reassign_dev(struct domain *s, =
struct domain *t,
 {
 	int ret =3D 0;
=20
-	/* Don't allow remapping on other domain than hwdom */
-	if ( t && !is_hardware_domain(t) )
+	/* Don't allow remapping on other domain than hwdom
+	 * or dom_io for PCI devices
+	 */
+	if ( t && !is_hardware_domain(t) && (t !=3D dom_io || !dev_is_pci(dev)) )
 		return -EPERM;
=20
 	if (t =3D=3D s)
 		return 0;
=20
-	ret =3D arm_smmu_deassign_dev(s, dev);
+	ret =3D arm_smmu_deassign_dev(s, devfn, dev);
 	if (ret)
 		return ret;
=20
--=20
2.34.1


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On 29.04.2025 12:48, Alejandro Vallejo wrote:
> On Tue Apr 29, 2025 at 9:28 AM BST, Jan Beulich wrote:
>> On 28.04.2025 21:57, Ariadne Conill wrote:
>>> Previously Xen placed the hypercall page at the highest possible MFN,
>>> but this caused problems on systems where there is more than 36 bits
>>> of physical address space.
>>
>> Hmm, I should have asked already on the earlier version: What kinds of
>> problems are these, beyond ...
>>
>>> In general, it also seems unreliable to assume that the highest possible
>>> MFN is not already reserved for some other purpose.
>>
>> ... this particular aspect? I find it puzzling that such problems would
>> depend on the number of physical address bits.
> 
> Pagefault on access (due to reserved bits being set) on access to the
> hypercall page. The available guest-physical address space doesn't seem
> to be as wide as advertised, though I didn't carry enough tests to
> single this as the only explanation. Seeing how we don't really know
> what's already on the last mfn this seems like a strict improvement
> irrespective of the actual cause of the fault.

No question there, yet the first paragraph is a little too vague for my
taste. It'll also not help people later finding this commit and wondering
what the issue was.

Jan


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On 29.04.2025 13:06, Juergen Gross wrote:
> --- a/tools/firmware/hvmloader/Makefile
> +++ b/tools/firmware/hvmloader/Makefile
> @@ -59,6 +59,7 @@ OBJS += optionroms.o 32bitbios_support.o rombios.o
>  CFLAGS += -DENABLE_ROMBIOS
>  ROMBIOS_ROM := $(ROMBIOS_DIR)/BIOS-bochs-latest
>  ROMS += $(ROMBIOS_ROM) $(STDVGA_ROM) $(CIRRUSVGA_ROM)
> +DSDT_FILES = dsdt_anycpu.c dsdt_15cpu.c
>  endif

To be resilient to a random DSDT_FILES in the environment, I think you want to
use += here as well, just like ...

> @@ -76,7 +77,7 @@ rombios.o: roms.inc
>  smbios.o: CFLAGS += -D__SMBIOS_DATE__="\"$(SMBIOS_REL_DATE)\""
>  
>  ACPI_PATH = ../../libacpi
> -DSDT_FILES = dsdt_anycpu.c dsdt_15cpu.c dsdt_anycpu_qemu_xen.c
> +DSDT_FILES += dsdt_anycpu_qemu_xen.c

... you have it here, and set the variable to nothing yet further up.
Then
Acked-by: Jan Beulich  # hvmloader

Jan


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From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= 
To: Jan Beulich 
Cc: Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Anthony PERARD ,
 =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 , xen-devel@lists.xenproject.org
Message-ID: <50800903-3ade-4cc5-bed3-93c19f605907@suse.com>
Subject: Re: [PATCH v3 2/4] tools: remove support for running a guest with
 qemu-traditional
References: <20250429110636.30518-1-jgross@suse.com>
 <20250429110636.30518-3-jgross@suse.com>
 
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Message-ID: <388f39ad-6aa6-4b95-9941-334b434ff400@amd.com>
Date: Tue, 29 Apr 2025 13:04:41 +0100
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v1] xen/arm: AArch32-V8R: Add MPU register definitions
Content-Language: en-GB
To: Luca Fancellu 
Cc: Julien Grall ,
 Ayan Kumar Halder ,
 "xen-devel@lists.xenproject.org" ,
 Stefano Stabellini ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk 
References: <20250417155511.1854081-1-ayan.kumar.halder@amd.com>
 <306e5414-1552-4605-86d6-b23b89d00bc9@xen.org>
 
 <2697BC06-8A78-42B4-9977-07907BBBDC3D@arm.com>
From: Ayan Kumar Halder 
In-Reply-To: <2697BC06-8A78-42B4-9977-07907BBBDC3D@arm.com>
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On 28/04/2025 20:04, Luca Fancellu wrote:
> Hi Ayan,
Hi Luca,
>
>> On 25 Apr 2025, at 13:00, Ayan Kumar Halder  wrote:
>>
>> Hi Julien,
>>
>> cc-ed Luca for feedback on specific points.
>>
>> On 18/04/2025 05:54, Julien Grall wrote:
>>> Hi Ayan,
>>>
>>> On 18/04/2025 00:55, Ayan Kumar Halder wrote:
>>>> Add the definitions for HPRBAR<0..31>, HPRLAR<0..31> and HPRENR.
>>>> The definitions are taken from ARM DDI 0568A.c ID110520, E2.2.3 HPRBAR,
>>>> E2.2.4 HPRENR and E2.2.6 HPRLAR.
>>>>
>>>> Introduce pr_t typedef which is a structure having the prbar and prlar members,
>>>> each being structured as the registers of the AArch32-V8R architecture.
>>>> This is the arm32 equivalent of
>>>> "arm/mpu: Introduce MPU memory region map structure".
>>>>
>>>> Signed-off-by: Ayan Kumar Halder 
>>>> ---
>>>> This patch should be applied after
>>>> "[PATCH v3 0/7] First chunk for Arm R82 and MPU support" in order to enable
>>>> compilation for AArch32.
>>>>
>>>>    xen/arch/arm/include/asm/arm32/mpu.h  |  59 +++++++++++
>>>>    xen/arch/arm/include/asm/mpu.h        |   4 +
>>>>    xen/arch/arm/include/asm/mpu/cpregs.h | 135 ++++++++++++++++++++++++++
>>>>    3 files changed, 198 insertions(+)
>>>>    create mode 100644 xen/arch/arm/include/asm/arm32/mpu.h
>>>>
>>>> diff --git a/xen/arch/arm/include/asm/arm32/mpu.h b/xen/arch/arm/include/asm/arm32/mpu.h
>>>> new file mode 100644
>>>> index 0000000000..4aabd93479
>>>> --- /dev/null
>>>> +++ b/xen/arch/arm/include/asm/arm32/mpu.h
>>>> @@ -0,0 +1,59 @@
>>>> +/* SPDX-License-Identifier: GPL-2.0-only */
>>>> +/*
>>>> + * mpu.h: Arm Memory Protection Unit definitions for aarch64.
>>>> + */
>>>> +
>>>> +#ifndef __ARM_ARM32_MPU_H
>>>> +#define __ARM_ARM32_MPU_H
>>>> +
>>>> +#define XN_EL2_ENABLED  0x1
>>> I understand the define is introduced in Luca's patch, but this a bit non-descriptive... Can we find a better name? Maybe by adding the name of the register and some documentation?
>> We can rename this as PRBAR_EL2_XN if this sounds better (cc @Luca) in Luca's patch
> what about PRBAR_EL2_XN_ENABLED? I can change it in my serie
I am ok with the name.
>
>> The description can be
>>
>> Refer ARM DDI 0568A.c  ID110520 , E2.2.2
>>
>> HPRBAR [0:1] Execute Never
>>
>>>> +
>>>> +#ifndef __ASSEMBLY__
>>>> +
>>>> +/* Hypervisor Protection Region Base Address Register */
>>>> +typedef union {
>>>> +    struct {
>>>> +        unsigned int xn:1;       /* Execute-Never */
>>>> +        unsigned int ap:2;       /* Acess Permission */
>>>> +        unsigned int sh:2;       /* Sharebility */
>>>> +        unsigned int res0:1;     /* Reserved as 0 */
>>>> +        unsigned int base:26;    /* Base Address */
>>>> +    } reg;
>>>> +    uint32_t bits;
>>>> +} prbar_t;
>>>> +
>>>> +/* Hypervisor Protection Region Limit Address Register */
>>>> +typedef union {
>>>> +    struct {
>>>> +        unsigned int en:1;     /* Region enable */
>>>> +        unsigned int ai:3;     /* Memory Attribute Index */
>>>> +        /*
>>>> +         * There is no actual ns bit in hardware. It is used here for
>>>> +         * compatibility with Armr64 code. Thus, we are reusing a res0 bit for ns.
>>> typo: Arm64.
>> Ack
>>>> +         */
>>> Hmmmm, this would mean someone may mistakenly set the bit to 0 by mistake. If the field is always meant to be 0 on arm64, then I would consider to name is res0 on arm64 with an explanation.
>>>
>>> This would make clear the bit is not supposed to have a value other than 0.
>> On Arm64, ns == 0 as it can only support secure mode.
>>
>> So we can change this on Arm64 as well :-
>>
>> unsigned int res0:2; /* ns == 0 as only secure mode is supported */
>>
>> @Luca to clarify
>  From the specifications: "Non-secure bit. Specifies whether the output address is in the Secure or Non-secure memory”, I’m not sure
> that we should remove it from Arm64, so I don’t think you should have something only for compatibility, maybe the code accessing .ns
> can be compiled out for Arm32 or we can have arch-specific implementation. I think you are referring to pr_of_xenaddr when you say
> “compatibility with Arm64 code"

Yes, that is correct. So are you saying that we should have an "ifdef" 
in the function.

+++ b/xen/arch/arm/mpu/mm.c
@@ -221,7 +221,9 @@ pr_t pr_of_xenaddr(paddr_t base, paddr_t limit, 
unsigned attr)
      /* Build up value for PRLAR_EL2. */
      prlar = (prlar_t) {
          .reg = {
+#ifdef CONFIG_ARM_64
              .ns = 0,        /* Hyp mode is in secure world */
+#endif
              .ai = attr,
              .en = 1,        /* Region enabled */
          }};

I am ok with this. I just want to know if you and Julien are aligned as 
well.

>
>>>> +        unsigned int ns:1;     /* Reserved 0 by hardware */
>>>> +        unsigned int res0:1;   /* Reserved 0 by hardware */
>> Then, we can change this on Arm32 as well.
>>>> +        unsigned int limit:26;  /* Limit Address */
>>> NIT: Can we align the comments?
>> Ack.
>>>> +    } reg;
>>>> +    uint32_t bits;
>>>> +} prlar_t;
>>>> +
>>>> +/* Protection Region */
>>>> +typedef struct {
>>>> +    prbar_t prbar;
>>>> +    prlar_t prlar;
>>>> +    uint64_t p2m_type;          /* Used to store p2m types. */
>>>> +} pr_t;
>>> This looks to be common with arm64. If so, I would prefer if the structure is in a common header.
>> No, in arm64 this is
>>
>> typedef struct {
>>       prbar_t prbar;
>>       prlar_t prlar;
>> } pr_t;
>>
>> The reason being Arm64 uses unused bits (ie 'pad') to store the type.
>>
>>>> +
>>>> +#endif /* __ASSEMBLY__ */
>>>> +
>>>> +#endif /* __ARM_ARM32_MPU_H */
>>>> +
>>>> +/*
>>>> + * Local variables:
>>>> + * mode: C
>>>> + * c-file-style: "BSD"
>>>> + * c-basic-offset: 4
>>>> + * indent-tabs-mode: nil
>>>> + * End:
>>>> + */
>>>> diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h
>>>> index 77d0566f97..67127149c0 100644
>>>> --- a/xen/arch/arm/include/asm/mpu.h
>>>> +++ b/xen/arch/arm/include/asm/mpu.h
>>>> @@ -8,8 +8,12 @@
>>>>      #if defined(CONFIG_ARM_64)
>>>>    # include 
>>>> +#elif defined(CONFIG_ARM_32)
>>>> +# include 
>>>>    #endif
>>>>    +#define PRENR_MASK  GENMASK(31, 0)
>>>> +
>>>>    #define MPU_REGION_SHIFT  6
>>>>    #define MPU_REGION_ALIGN  (_AC(1, UL) << MPU_REGION_SHIFT)
>>>>    #define MPU_REGION_MASK   (~(MPU_REGION_ALIGN - 1))
>>>> diff --git a/xen/arch/arm/include/asm/mpu/cpregs.h b/xen/arch/arm/include/asm/mpu/cpregs.h
>>>> index d5cd0e04d5..7cf52aa09a 100644
>>>> --- a/xen/arch/arm/include/asm/mpu/cpregs.h
>>>> +++ b/xen/arch/arm/include/asm/mpu/cpregs.h
>>>> @@ -6,18 +6,153 @@
>>>>    /* CP15 CR0: MPU Type Register */
>>>>    #define HMPUIR          p15,4,c0,c0,4
>>>>    +/* CP15 CR6: Protection Region Enable Register */
>>>> +#define HPRENR          p15,4,c6,c1,1
>>>> +
>>>>    /* CP15 CR6: MPU Protection Region Base/Limit/Select Address Register */
>>>>    #define HPRSELR         p15,4,c6,c2,1
>>>>    #define HPRBAR          p15,4,c6,c3,0
>>>>    #define HPRLAR          p15,4,c6,c8,1
>>>>    +/* CP15 CR6: MPU Protection Region Base/Limit Address Register */
>>>> +#define HPRBAR0         p15,4,c6,c8,0
>>>> +#define HPRLAR0         p15,4,c6,c8,1
>>>> +#define HPRBAR1         p15,4,c6,c8,4
>>>> +#define HPRLAR1         p15,4,c6,c8,5
>>>> +#define HPRBAR2         p15,4,c6,c9,0
>>>> +#define HPRLAR2         p15,4,c6,c9,1
>>>> +#define HPRBAR3         p15,4,c6,c9,4
>>>> +#define HPRLAR3         p15,4,c6,c9,5
>>>> +#define HPRBAR4         p15,4,c6,c10,0
>>>> +#define HPRLAR4         p15,4,c6,c10,1
>>>> +#define HPRBAR5         p15,4,c6,c10,4
>>>> +#define HPRLAR5         p15,4,c6,c10,5
>>>> +#define HPRBAR6         p15,4,c6,c11,0
>>>> +#define HPRLAR6         p15,4,c6,c11,1
>>>> +#define HPRBAR7         p15,4,c6,c11,4
>>>> +#define HPRLAR7         p15,4,c6,c11,5
>>>> +#define HPRBAR8         p15,4,c6,c12,0
>>>> +#define HPRLAR8         p15,4,c6,c12,1
>>>> +#define HPRBAR9         p15,4,c6,c12,4
>>>> +#define HPRLAR9         p15,4,c6,c12,5
>>>> +#define HPRBAR10        p15,4,c6,c13,0
>>>> +#define HPRLAR10        p15,4,c6,c13,1
>>>> +#define HPRBAR11        p15,4,c6,c13,4
>>>> +#define HPRLAR11        p15,4,c6,c13,5
>>>> +#define HPRBAR12        p15,4,c6,c14,0
>>>> +#define HPRLAR12        p15,4,c6,c14,1
>>>> +#define HPRBAR13        p15,4,c6,c14,4
>>>> +#define HPRLAR13        p15,4,c6,c14,5
>>>> +#define HPRBAR14        p15,4,c6,c15,0
>>>> +#define HPRLAR14        p15,4,c6,c15,1
>>>> +#define HPRBAR15        p15,4,c6,c15,4
>>>> +#define HPRLAR15        p15,4,c6,c15,5
>>>> +#define HPRBAR16        p15,5,c6,c8,0
>>>> +#define HPRLAR16        p15,5,c6,c8,1
>>>> +#define HPRBAR17        p15,5,c6,c8,4
>>>> +#define HPRLAR17        p15,5,c6,c8,5
>>>> +#define HPRBAR18        p15,5,c6,c9,0
>>>> +#define HPRLAR18        p15,5,c6,c9,1
>>>> +#define HPRBAR19        p15,5,c6,c9,4
>>>> +#define HPRLAR19        p15,5,c6,c9,5
>>>> +#define HPRBAR20        p15,5,c6,c10,0
>>>> +#define HPRLAR20        p15,5,c6,c10,1
>>>> +#define HPRBAR21        p15,5,c6,c10,4
>>>> +#define HPRLAR21        p15,5,c6,c10,5
>>>> +#define HPRBAR22        p15,5,c6,c11,0
>>>> +#define HPRLAR22        p15,5,c6,c11,1
>>>> +#define HPRBAR23        p15,5,c6,c11,4
>>>> +#define HPRLAR23        p15,5,c6,c11,5
>>>> +#define HPRBAR24        p15,5,c6,c12,0
>>>> +#define HPRLAR24        p15,5,c6,c12,1
>>>> +#define HPRBAR25        p15,5,c6,c12,4
>>>> +#define HPRLAR25        p15,5,c6,c12,5
>>>> +#define HPRBAR26        p15,5,c6,c13,0
>>>> +#define HPRLAR26        p15,5,c6,c13,1
>>>> +#define HPRBAR27        p15,5,c6,c13,4
>>>> +#define HPRLAR27        p15,5,c6,c13,5
>>>> +#define HPRBAR28        p15,5,c6,c14,0
>>>> +#define HPRLAR28        p15,5,c6,c14,1
>>>> +#define HPRBAR29        p15,5,c6,c14,4
>>>> +#define HPRLAR29        p15,5,c6,c14,5
>>>> +#define HPRBAR30        p15,5,c6,c15,0
>>>> +#define HPRLAR30        p15,5,c6,c15,1
>>>> +#define HPRBAR31        p15,5,c6,c15,4
>>>> +#define HPRLAR31        p15,5,c6,c15,5
>>> NIT: Is there any way we could generate the values using macros?
>> This looks tricky. So I will prefer to keep this as it is.
>>>> +
>>>>    /* Aliases of AArch64 names for use in common code */
>>>>    #ifdef CONFIG_ARM_32
>>>>    /* Alphabetically... */
>>>>    #define MPUIR_EL2       HMPUIR
>>>>    #define PRBAR_EL2       HPRBAR
>>>> +#define PRBAR0_EL2      HPRBAR0
>>> AFAIU, the alias will be mainly used in the macro generate
>>> the switch. Rather than open-coding all the PR*AR_EL2, can we
>>> provide two macros PR{B, L}AR_N that will be implemented as
>>> HPR{B,L}AR##n for arm32 and PR{B,L}AR##n for arm64?
>> Yes , we can have
>>
>> #define PR{B,L}AR_EL2_(n)          HPR{B,L}AR##n for arm32
>>
>> #define PR{B,L}AR_EL2_(n)          PR{B,L}AR##n##_EL2
> we could have them in mm.c, I see in your v2 you’ve put them in cpregs.h,
> but since they are only used by the generator, I would put them there.

You mean the above two macros should be moved to mm.c. I am ok with that.

Just 2 more things to be aligned :-

1. Are we ok to use PRBAR_EL2_(num) and PRLAR_EL2_(num) in the common 
code (ie mpu/mm.c) ?

2. Are you ok to introduce ifdef in prepare_selector() ?

Please have a look at my v2 for reference.

- Ayan

>
>
>


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From: Luca Fancellu 
To: Ayan Kumar Halder 
CC: Julien Grall , Ayan Kumar Halder
	, "xen-devel@lists.xenproject.org"
	, Stefano Stabellini
	, Bertrand Marquis , Michal
 Orzel , Volodymyr Babchuk 
Subject: Re: [PATCH v1] xen/arm: AArch32-V8R: Add MPU register definitions
Thread-Topic: [PATCH v1] xen/arm: AArch32-V8R: Add MPU register definitions
Thread-Index: AQHbr7FEzJkzCX7IxEuG28e/+R7zurOo3KoAgAt3HYCABS1xgIABHSuAgAABxgA=
Date: Tue, 29 Apr 2025 12:11:32 +0000
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References: <20250417155511.1854081-1-ayan.kumar.halder@amd.com>
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Subject: Re: [PATCH v10 6/7] xen/arm: enable dom0 to use PCI devices with
 pci-passthrough=no
To: Mykyta Poturai 
Cc: Stewart Hildebrand ,
 Stefano Stabellini , Julien Grall ,
 Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk ,
 Andrew Cooper ,
 Anthony PERARD ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 "xen-devel@lists.xenproject.org" 
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On 29.04.2025 13:52, Mykyta Poturai wrote:
> @@ -75,6 +76,11 @@ static int __init acpi_pci_init(void)
>  }
>  #endif
>  
> +bool arch_pci_device_physdevop(void)
> +{
> +    return iommu_enabled;
> +}

I'm not an Arm maintainer, but if I was, I'd demand that a clarifying comment
was added here.

> --- a/xen/arch/x86/include/asm/pci.h
> +++ b/xen/arch/x86/include/asm/pci.h
> @@ -67,4 +67,9 @@ static inline bool pci_check_bar(const struct pci_dev *pdev,
>      return is_memory_hole(start, end);
>  }
>  
> +static always_inline bool arch_pci_device_physdevop(void)

I see not particular reason to use always_inline here; you don't do so ...

> --- a/xen/include/xen/pci.h
> +++ b/xen/include/xen/pci.h
> @@ -79,6 +79,11 @@ static inline bool is_pci_passthrough_enabled(void)
>      return false;
>  }
>  
> +static inline bool arch_pci_device_physdevop(void)

... here either.

I further notice that you didn't adjust the "reset" sub-op handling, despite
my earlier hint in that direction. Looking at the commit message, you only
mention PHYSDEVOP_pci_device_add anyway. I think all three need mentioning
there, which would then (hopefully) clarify what the deal is with
PHYSDEVOP_pci_device_reset.

Jan


From xen-devel-bounces@lists.xenproject.org Tue Apr 29 12:35:26 2025
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From: Christoph Hellwig 
To: chenlinxuan@uniontech.com
Cc: Keith Busch , Jens Axboe ,
	Christoph Hellwig , Sagi Grimberg ,
	Andrew Morton ,
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	llvm@lists.linux.dev, Winston Wen ,
	kasan-dev@googlegroups.com, xen-devel@lists.xenproject.org,
	Changbin Du ,
	Linus Torvalds 
Subject: Re: [PATCH RFC v3 0/8] kernel-hacking: introduce
 CONFIG_NO_AUTO_INLINE
Message-ID: <20250429123504.GA13093@lst.de>
References: <20250429-noautoinline-v3-0-4c49f28ea5b5@uniontech.com>
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On Tue, Apr 29, 2025 at 12:06:04PM +0800, Chen Linxuan via B4 Relay wrote:
> This series introduces a new kernel configuration option NO_AUTO_INLINE,
> which can be used to disable the automatic inlining of functions.
> 
> This will allow the function tracer to trace more functions
> because it only traces functions that the compiler has not inlined.

This still feels like a bad idea because it is extremely fragile.



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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	=?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= ,
	Anthony PERARD ,
	Jan Beulich 
Subject: [PATCH TEST-ARTEFACTS] (Re)add libgcc to alpine rootfs
Date: Tue, 29 Apr 2025 13:36:43 +0100
Message-Id: <20250429123643.230423-1-andrew.cooper3@citrix.com>
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It turns out that QEMU built in staging-4.19 (only) depends on it.

But, GCC can emit libgcc calls for arbitrary reasons, so include it
unconditionally.

Signed-off-by: Andrew Cooper 
---
CC: Marek Marczykowski-Górecki 
CC: Anthony PERARD 
CC: Jan Beulich 
---
 scripts/alpine-rootfs.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/scripts/alpine-rootfs.sh b/scripts/alpine-rootfs.sh
index 4d9da9c6fb4c..13d39e8846e7 100755
--- a/scripts/alpine-rootfs.sh
+++ b/scripts/alpine-rootfs.sh
@@ -10,6 +10,7 @@ apk --no-cache upgrade
 
 PKGS=(
     # System
+    libgcc
     openrc
     udev
     util-linux

base-commit: 036ffcafc8388d48f840815dd05e255042185d3d
-- 
2.39.5



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From: Alejandro Vallejo 
To: 
CC: Alejandro Vallejo , Andrew Cooper
	, Anthony PERARD ,
	Michal Orzel , Jan Beulich , "Julien
 Grall" , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Stefano Stabellini ,
	"Bertrand Marquis" 
Subject: [PATCH v6 00/12] Hyperlaunch device tree for dom0
Date: Tue, 29 Apr 2025 13:36:11 +0100
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Hi,

Not very many changes here. Just:

v5->v6:
  * Denis' suggestion to rename a few helpers to fdt_*
  * Change to last patch to only pass CDF_iommu to domains with
    DOMAIN_CAPS_HARDWARE.

I _think_ this addresses all feedback I got so far and I don't expect
anything major remaining before commit. If there's something I was asked
and I haven't delivered yet, please bring it up again.

v5: https://lore.kernel.org/xen-devel/20250424161027.92942-1-agarciav@amd.com/
v4: https://lore.kernel.org/xen-devel/20250417124844.11143-1-agarciav@amd.com/
v3: https://lore.kernel.org/xen-devel/20250408160802.49870-1-agarciav@amd.com/
v2: https://lore.kernel.org/xen-devel/20241226165740.29812-1-dpsmith@apertussolutions.com/
v1: https://lore.kernel.org/xen-devel/20241123182044.30687-1-dpsmith@apertussolutions.com/

========= Original cover letter:

The Hyperlaunch device tree for dom0 series is the second split out for the
introduction of the Hyperlaunch domain builder logic. These changes focus on
introducing the ability to express a domain configuration that is then used to
populate the struct boot_domain structure for dom0. This ability to express a
domain configuration provides the next step towards a general domain builder.

The splitting of Hyperlaunch into a set of series are twofold, to reduce the
effort in reviewing a much larger series, and to reduce the effort in handling
the knock-on effects to the construction logic from requested review changes.

Alejandro Vallejo (1):
  x86/hyperlaunch: Add helpers to locate multiboot modules

Daniel P. Smith (11):
  kconfig: introduce CONFIG_DOMAIN_BUILDER
  common/hyperlaunch: introduce the domain builder
  x86/hyperlaunch: initial support for hyperlaunch device tree
  x86/hyperlaunch: locate dom0 kernel with hyperlaunch
  x86/hyperlaunch: obtain cmdline from device tree
  x86/hyperlaunch: locate dom0 initrd with hyperlaunch
  x86/hyperlaunch: add domain id parsing to domain config
  x86/hyperlaunch: specify dom0 mode with device tree
  x86/hyperlaunch: add memory parsing to domain config
  x86/hyperlaunch: add max vcpu parsing of hyperlaunch device tree
  x86/hyperlaunch: add capabilities to boot domain

 xen/arch/x86/dom0_build.c              |  11 +
 xen/arch/x86/include/asm/boot-domain.h |  14 +
 xen/arch/x86/include/asm/bootinfo.h    |  10 +-
 xen/arch/x86/setup.c                   |  66 +++-
 xen/common/Kconfig                     |   2 +
 xen/common/Makefile                    |   1 +
 xen/common/domain-builder/Kconfig      |  15 +
 xen/common/domain-builder/Makefile     |   2 +
 xen/common/domain-builder/core.c       |  86 +++++
 xen/common/domain-builder/fdt.c        | 512 +++++++++++++++++++++++++
 xen/common/domain-builder/fdt.h        |  40 ++
 xen/include/xen/domain-builder.h       |  37 ++
 xen/include/xen/libfdt/libfdt-xen.h    |  23 ++
 13 files changed, 801 insertions(+), 18 deletions(-)
 create mode 100644 xen/common/domain-builder/Kconfig
 create mode 100644 xen/common/domain-builder/Makefile
 create mode 100644 xen/common/domain-builder/core.c
 create mode 100644 xen/common/domain-builder/fdt.c
 create mode 100644 xen/common/domain-builder/fdt.h
 create mode 100644 xen/include/xen/domain-builder.h

-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Andrew Cooper
	, Anthony PERARD ,
	Michal Orzel , Jan Beulich , "Julien
 Grall" , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Stefano Stabellini ,
	Alejandro Vallejo , Denis Mukhin , "Jason
 Andryuk" 
Subject: [PATCH v6 01/12] kconfig: introduce CONFIG_DOMAIN_BUILDER
Date: Tue, 29 Apr 2025 13:36:12 +0100
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From: "Daniel P. Smith" 

Hyperlaunch domain builder will be the consolidated boot time domain
building logic framework. Introduce the config option to enable this
domain builder to eventually turn on the ability to load the domain
configuration via a flattened device tree.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Alejandro Vallejo 
Reviewed-by: Denis Mukhin 
Reviewed-by: Jason Andryuk 
---
 xen/common/Kconfig                |  2 ++
 xen/common/domain-builder/Kconfig | 15 +++++++++++++++
 2 files changed, 17 insertions(+)
 create mode 100644 xen/common/domain-builder/Kconfig

diff --git a/xen/common/Kconfig b/xen/common/Kconfig
index be28060716..e025fbe257 100644
--- a/xen/common/Kconfig
+++ b/xen/common/Kconfig
@@ -144,6 +144,8 @@ config STATIC_MEMORY
 
 	  If unsure, say N.
 
+source "common/domain-builder/Kconfig"
+
 menu "Speculative hardening"
 
 config INDIRECT_THUNK
diff --git a/xen/common/domain-builder/Kconfig b/xen/common/domain-builder/Kconfig
new file mode 100644
index 0000000000..44b8351af8
--- /dev/null
+++ b/xen/common/domain-builder/Kconfig
@@ -0,0 +1,15 @@
+menu "Domain Builder Features"
+
+config DOMAIN_BUILDER
+	bool "Domain builder (UNSUPPORTED)" if UNSUPPORTED && X86
+	select LIBFDT
+	help
+	  Support for constructing predefined domains described by a flattened
+	  device tree. This allows constructing multiple domains at boot time
+	  instead of being limited to a single dom0.
+
+	  This feature is currently experimental.
+
+	  If unsure, say N.
+
+endmenu
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini , "Jason
 Andryuk" , Alejandro Vallejo ,
	"Denis Mukhin" 
Subject: [PATCH v6 02/12] common/hyperlaunch: introduce the domain builder
Date: Tue, 29 Apr 2025 13:36:13 +0100
Message-ID: <20250429123629.20839-3-agarciav@amd.com>
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From: "Daniel P. Smith" 

Introduce the domain builder which is capable of consuming a device tree as the
first boot module. If it finds a device tree as the first boot module, it will
set its type to BOOTMOD_FDT. This change only detects the boot module and
continues to boot with slight change to the boot convention that the dom0
kernel is no longer first boot module but is the second.

No functional change intended.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
Reviewed-by: Denis Mukhin 
---
 xen/arch/x86/include/asm/bootinfo.h |  3 ++
 xen/arch/x86/setup.c                | 19 ++++++++----
 xen/common/Makefile                 |  1 +
 xen/common/domain-builder/Makefile  |  2 ++
 xen/common/domain-builder/core.c    | 45 +++++++++++++++++++++++++++++
 xen/common/domain-builder/fdt.c     | 39 +++++++++++++++++++++++++
 xen/common/domain-builder/fdt.h     | 14 +++++++++
 xen/include/xen/domain-builder.h    | 29 +++++++++++++++++++
 8 files changed, 146 insertions(+), 6 deletions(-)
 create mode 100644 xen/common/domain-builder/Makefile
 create mode 100644 xen/common/domain-builder/core.c
 create mode 100644 xen/common/domain-builder/fdt.c
 create mode 100644 xen/common/domain-builder/fdt.h
 create mode 100644 xen/include/xen/domain-builder.h

diff --git a/xen/arch/x86/include/asm/bootinfo.h b/xen/arch/x86/include/asm/bootinfo.h
index 3afc214c17..82c2650fcf 100644
--- a/xen/arch/x86/include/asm/bootinfo.h
+++ b/xen/arch/x86/include/asm/bootinfo.h
@@ -27,6 +27,7 @@ enum bootmod_type {
     BOOTMOD_RAMDISK,
     BOOTMOD_MICROCODE,
     BOOTMOD_XSM_POLICY,
+    BOOTMOD_FDT,
 };
 
 struct boot_module {
@@ -80,6 +81,8 @@ struct boot_info {
     paddr_t memmap_addr;
     size_t memmap_length;
 
+    bool hyperlaunch_enabled;
+
     unsigned int nr_modules;
     struct boot_module mods[MAX_NR_BOOTMODS + 1];
     struct boot_domain domains[MAX_NR_BOOTDOMS];
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 2518954124..f3b5c83a3c 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -6,6 +6,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -1284,9 +1285,14 @@ void asmlinkage __init noreturn __start_xen(void)
                bi->nr_modules);
     }
 
-    /* Dom0 kernel is always first */
-    bi->mods[0].type = BOOTMOD_KERNEL;
-    bi->domains[0].kernel = &bi->mods[0];
+    if ( builder_init(bi) == FDT_KIND_NONE )
+    {
+        /* Find first unknown boot module to use as dom0 kernel */
+        i = first_boot_module_index(bi, BOOTMOD_UNKNOWN);
+        bi->mods[i].type = BOOTMOD_KERNEL;
+        bi->domains[0].kernel = &bi->mods[i];
+        bi->hyperlaunch_enabled = false;
+    }
 
     if ( pvh_boot )
     {
@@ -1469,8 +1475,9 @@ void asmlinkage __init noreturn __start_xen(void)
         xen->size  = __2M_rwdata_end - _stext;
     }
 
-    bi->mods[0].headroom =
-        bzimage_headroom(bootstrap_map_bm(&bi->mods[0]), bi->mods[0].size);
+    bi->domains[0].kernel->headroom =
+        bzimage_headroom(bootstrap_map_bm(bi->domains[0].kernel),
+                         bi->domains[0].kernel->size);
     bootstrap_unmap();
 
 #ifndef highmem_start
@@ -1594,7 +1601,7 @@ void asmlinkage __init noreturn __start_xen(void)
 #endif
     }
 
-    if ( bi->mods[0].headroom && !bi->mods[0].relocated )
+    if ( bi->domains[0].kernel->headroom && !bi->domains[0].kernel->relocated )
         panic("Not enough memory to relocate the dom0 kernel image\n");
     for ( i = 0; i < bi->nr_modules; ++i )
     {
diff --git a/xen/common/Makefile b/xen/common/Makefile
index 98f0873056..e42af71e3f 100644
--- a/xen/common/Makefile
+++ b/xen/common/Makefile
@@ -11,6 +11,7 @@ obj-$(filter-out $(CONFIG_X86),$(CONFIG_ACPI)) += device.o
 obj-$(CONFIG_HAS_DEVICE_TREE) += device-tree/
 obj-$(CONFIG_IOREQ_SERVER) += dm.o
 obj-y += domain.o
+obj-$(CONFIG_DOMAIN_BUILDER) += domain-builder/
 obj-y += event_2l.o
 obj-y += event_channel.o
 obj-$(CONFIG_EVTCHN_FIFO) += event_fifo.o
diff --git a/xen/common/domain-builder/Makefile b/xen/common/domain-builder/Makefile
new file mode 100644
index 0000000000..bfd2f6267e
--- /dev/null
+++ b/xen/common/domain-builder/Makefile
@@ -0,0 +1,2 @@
+obj-y += fdt.init.o
+obj-y += core.init.o
diff --git a/xen/common/domain-builder/core.c b/xen/common/domain-builder/core.c
new file mode 100644
index 0000000000..97c92db571
--- /dev/null
+++ b/xen/common/domain-builder/core.c
@@ -0,0 +1,45 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (C) 2024, Apertus Solutions, LLC
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "fdt.h"
+
+enum fdt_kind __init builder_init(struct boot_info *bi)
+{
+    enum fdt_kind kind;
+
+    bi->hyperlaunch_enabled = false;
+    switch ( (kind = fdt_detect_kind(bi)) )
+    {
+    case FDT_KIND_NONE:
+        /* No DT found */
+        return kind;
+
+    case FDT_KIND_UNKNOWN:
+        printk(XENLOG_DEBUG "DT found: non-hyperlaunch\n");
+        bi->mods[0].type = BOOTMOD_FDT;
+        return kind;
+
+    default:
+        BUG();
+    }
+}
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * tab-width: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
new file mode 100644
index 0000000000..4b07bd22c8
--- /dev/null
+++ b/xen/common/domain-builder/fdt.c
@@ -0,0 +1,39 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (C) 2024, Apertus Solutions, LLC
+ */
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "fdt.h"
+
+enum fdt_kind __init fdt_detect_kind(const struct boot_info *bi)
+{
+    enum fdt_kind kind;
+    const void *fdt = bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_IDX]);
+
+    if ( !fdt || fdt_check_header(fdt) < 0 )
+        kind = FDT_KIND_NONE;
+    else
+        kind = FDT_KIND_UNKNOWN;
+
+    bootstrap_unmap();
+
+    return kind;
+}
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * tab-width: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/common/domain-builder/fdt.h b/xen/common/domain-builder/fdt.h
new file mode 100644
index 0000000000..ef897fc412
--- /dev/null
+++ b/xen/common/domain-builder/fdt.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef __XEN_DOMAIN_BUILDER_FDT_H__
+#define __XEN_DOMAIN_BUILDER_FDT_H__
+
+#include 
+
+struct boot_info;
+
+/* hyperlaunch fdt is required to be module 0 */
+#define HYPERLAUNCH_MODULE_IDX 0
+
+enum fdt_kind fdt_detect_kind(const struct boot_info *bi);
+
+#endif /* __XEN_DOMAIN_BUILDER_FDT_H__ */
diff --git a/xen/include/xen/domain-builder.h b/xen/include/xen/domain-builder.h
new file mode 100644
index 0000000000..b9702db735
--- /dev/null
+++ b/xen/include/xen/domain-builder.h
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef __XEN_DOMAIN_BUILDER_H__
+#define __XEN_DOMAIN_BUILDER_H__
+
+struct boot_info;
+
+/* Return status of builder_init(). Shows which boot mechanism was detected */
+enum fdt_kind
+{
+    /* FDT not found. Skipped builder. */
+    FDT_KIND_NONE,
+    /* Found an FDT that wasn't hyperlaunch. */
+    FDT_KIND_UNKNOWN,
+};
+
+/*
+ * Initialises `bi` if it detects a compatible FDT. Otherwise returns
+ * FDT_KIND_NONE and leaves initialisation up to the caller.
+ */
+#if IS_ENABLED(CONFIG_DOMAIN_BUILDER)
+enum fdt_kind builder_init(struct boot_info *bi);
+#else
+static inline enum fdt_kind builder_init(struct boot_info *bi)
+{
+    return FDT_KIND_NONE;
+}
+#endif /* !IS_ENABLED(CONFIG_DOMAIN_BUILDER) */
+
+#endif /* __XEN_DOMAIN_BUILDER_H__ */
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini , "Jason
 Andryuk" , Alejandro Vallejo ,
	"Denis Mukhin" 
Subject: [PATCH v6 03/12] x86/hyperlaunch: initial support for hyperlaunch device tree
Date: Tue, 29 Apr 2025 13:36:14 +0100
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From: "Daniel P. Smith" 

Add the ability to detect both a formal hyperlaunch device tree or a dom0less
device tree. If the hyperlaunch device tree is found, then count the number of
domain entries, reporting an error if more than one is found.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
Reviewed-by: Denis Mukhin 
---
 xen/arch/x86/include/asm/bootinfo.h |  1 +
 xen/common/domain-builder/core.c    | 15 +++++++
 xen/common/domain-builder/fdt.c     | 62 +++++++++++++++++++++++++++++
 xen/common/domain-builder/fdt.h     |  1 +
 xen/include/xen/domain-builder.h    |  2 +
 5 files changed, 81 insertions(+)

diff --git a/xen/arch/x86/include/asm/bootinfo.h b/xen/arch/x86/include/asm/bootinfo.h
index 82c2650fcf..1e3d582e45 100644
--- a/xen/arch/x86/include/asm/bootinfo.h
+++ b/xen/arch/x86/include/asm/bootinfo.h
@@ -84,6 +84,7 @@ struct boot_info {
     bool hyperlaunch_enabled;
 
     unsigned int nr_modules;
+    unsigned int nr_domains;
     struct boot_module mods[MAX_NR_BOOTMODS + 1];
     struct boot_domain domains[MAX_NR_BOOTDOMS];
 };
diff --git a/xen/common/domain-builder/core.c b/xen/common/domain-builder/core.c
index 97c92db571..c6917532be 100644
--- a/xen/common/domain-builder/core.c
+++ b/xen/common/domain-builder/core.c
@@ -16,10 +16,17 @@
 enum fdt_kind __init builder_init(struct boot_info *bi)
 {
     enum fdt_kind kind;
+    int ret;
 
     bi->hyperlaunch_enabled = false;
     switch ( (kind = fdt_detect_kind(bi)) )
     {
+    case FDT_KIND_HYPERLAUNCH:
+        printk(XENLOG_DEBUG "DT found: hyperlaunch\n");
+        bi->hyperlaunch_enabled = true;
+        bi->mods[0].type = BOOTMOD_FDT;
+        break;
+
     case FDT_KIND_NONE:
         /* No DT found */
         return kind;
@@ -32,6 +39,14 @@ enum fdt_kind __init builder_init(struct boot_info *bi)
     default:
         BUG();
     }
+
+    printk(XENLOG_INFO "Hyperlaunch configuration:\n");
+    if ( (ret = fdt_walk_hyperlaunch(bi)) < 0 )
+        panic("Walk of device tree failed (%d)\n", ret);
+
+    printk(XENLOG_INFO "  number of domains: %u\n", bi->nr_domains);
+
+    return FDT_KIND_HYPERLAUNCH;
 }
 
 /*
diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
index 4b07bd22c8..94ccff61e2 100644
--- a/xen/common/domain-builder/fdt.c
+++ b/xen/common/domain-builder/fdt.c
@@ -13,6 +13,36 @@
 
 #include "fdt.h"
 
+static int __init find_hyperlaunch_node(const void *fdt)
+{
+    int hv_node = fdt_path_offset(fdt, "/chosen/hypervisor");
+
+    if ( hv_node >= 0 )
+    {
+        /* Anything other than zero indicates no match */
+        if ( fdt_node_check_compatible(fdt, hv_node, "hypervisor,xen") )
+            return -ENODATA;
+
+        return hv_node;
+    }
+    else
+    {
+        /* Look for dom0less config */
+        int node, chosen_node = fdt_path_offset(fdt, "/chosen");
+
+        if ( chosen_node < 0 )
+            return -ENOENT;
+
+        fdt_for_each_subnode(node, fdt, chosen_node)
+        {
+            if ( !fdt_node_check_compatible(fdt, node, "xen,domain") )
+                return chosen_node;
+        }
+    }
+
+    return -ENODATA;
+}
+
 enum fdt_kind __init fdt_detect_kind(const struct boot_info *bi)
 {
     enum fdt_kind kind;
@@ -20,6 +50,8 @@ enum fdt_kind __init fdt_detect_kind(const struct boot_info *bi)
 
     if ( !fdt || fdt_check_header(fdt) < 0 )
         kind = FDT_KIND_NONE;
+    else if ( find_hyperlaunch_node(fdt) >= 0 )
+        kind = FDT_KIND_HYPERLAUNCH;
     else
         kind = FDT_KIND_UNKNOWN;
 
@@ -28,6 +60,36 @@ enum fdt_kind __init fdt_detect_kind(const struct boot_info *bi)
     return kind;
 }
 
+int __init fdt_walk_hyperlaunch(struct boot_info *bi)
+{
+    int ret = 0, hv_node, node;
+    const void *fdt = bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_IDX]);
+
+    BUG_ON(!fdt);
+
+    hv_node = find_hyperlaunch_node(fdt);
+    if ( hv_node < 0 )
+    {
+        ret = hv_node;
+        goto err_out;
+    }
+
+    fdt_for_each_subnode(node, fdt, hv_node)
+    {
+        if ( !fdt_node_check_compatible(fdt, node, "xen,domain") )
+            bi->nr_domains++;
+    }
+
+    /* Until multi-domain construction is added, throw an error */
+    if ( bi->nr_domains != 1 )
+        printk(XENLOG_ERR "hyperlaunch only supports dom0 construction\n");
+
+ err_out:
+    bootstrap_unmap();
+
+    return ret;
+}
+
 /*
  * Local variables:
  * mode: C
diff --git a/xen/common/domain-builder/fdt.h b/xen/common/domain-builder/fdt.h
index ef897fc412..d1bcc23fa2 100644
--- a/xen/common/domain-builder/fdt.h
+++ b/xen/common/domain-builder/fdt.h
@@ -10,5 +10,6 @@ struct boot_info;
 #define HYPERLAUNCH_MODULE_IDX 0
 
 enum fdt_kind fdt_detect_kind(const struct boot_info *bi);
+int fdt_walk_hyperlaunch(struct boot_info *bi);
 
 #endif /* __XEN_DOMAIN_BUILDER_FDT_H__ */
diff --git a/xen/include/xen/domain-builder.h b/xen/include/xen/domain-builder.h
index b9702db735..cbb3cbea7c 100644
--- a/xen/include/xen/domain-builder.h
+++ b/xen/include/xen/domain-builder.h
@@ -9,6 +9,8 @@ enum fdt_kind
 {
     /* FDT not found. Skipped builder. */
     FDT_KIND_NONE,
+    /* Found Hyperlaunch FDT */
+    FDT_KIND_HYPERLAUNCH,
     /* Found an FDT that wasn't hyperlaunch. */
     FDT_KIND_UNKNOWN,
 };
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: Alejandro Vallejo , Andrew Cooper
	, Anthony PERARD ,
	Michal Orzel , Jan Beulich , "Julien
 Grall" , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?=
	, Stefano Stabellini , "Jason
 Andryuk" , Denis Mukhin 
Subject: [PATCH v6 04/12] x86/hyperlaunch: Add helpers to locate multiboot modules
Date: Tue, 29 Apr 2025 13:36:15 +0100
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Hyperlaunch mandates either a reg or module-index DT prop on nodes that
contain `multiboot,module" under their "compatible" prop. This patch
introduces a helper to generically find such index, appending the module
to the list of modules if it wasn't already (i.e: because it's given via
the "reg" prop).

Signed-off-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
Reviewed-by: Denis Mukhin 
---
 xen/common/domain-builder/fdt.c  | 172 +++++++++++++++++++++++++++++++
 xen/common/domain-builder/fdt.h  |   1 +
 xen/include/xen/domain-builder.h |   4 +
 3 files changed, 177 insertions(+)

diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
index 94ccff61e2..05ac3647cf 100644
--- a/xen/common/domain-builder/fdt.c
+++ b/xen/common/domain-builder/fdt.c
@@ -13,6 +13,178 @@
 
 #include "fdt.h"
 
+static int __init fdt_prop_as_u32(const struct fdt_property *prop,
+                                  uint32_t *val)
+{
+    if ( !prop || fdt32_to_cpu(prop->len) < sizeof(u32) )
+        return -EINVAL;
+
+    *val = fdt32_to_cpu(*(const fdt32_t *)prop->data);
+    return 0;
+}
+
+/*
+ * Unpacks a "reg" property into its address and size constituents.
+ *
+ * @param prop          Pointer to an FDT "reg" property.
+ * @param address_cells Number of 4-octet cells that make up an "address".
+ * @param size_cells    Number of 4-octet cells that make up a "size".
+ * @param p_addr[out]   Address encoded in the property.
+ * @param p_size[out]   Size encoded in the property.
+ * @returns             -EINVAL on malformed property, 0 otherwise.
+ */
+static int __init fdt_prop_as_reg(const struct fdt_property *prop,
+                                  int address_cells, int size_cells,
+                                  uint64_t *p_addr, uint64_t *p_size)
+{
+    const fdt32_t *cell = (const fdt32_t *)prop->data;
+    uint64_t addr, size;
+
+    if ( fdt32_to_cpu(prop->len) !=
+         (address_cells + size_cells) * sizeof(*cell) )
+    {
+        printk(XENLOG_ERR "  cannot read reg %lu+%lu from prop len %u\n",
+            address_cells * sizeof(*cell), size_cells * sizeof(*cell),
+            fdt32_to_cpu(prop->len));
+        return -EINVAL;
+    }
+
+    switch ( address_cells )
+    {
+    case 1:
+        addr = fdt32_to_cpu(*cell);
+        break;
+    case 2:
+        addr = fdt64_to_cpu(*(const fdt64_t *)cell);
+        break;
+    default:
+        printk(XENLOG_ERR "  unsupported address_cells=%d\n", address_cells);
+        return -EINVAL;
+    }
+
+    cell += address_cells;
+    switch ( size_cells )
+    {
+    case 1:
+        size = fdt32_to_cpu(*cell);
+        break;
+    case 2:
+        size = fdt64_to_cpu(*(const fdt64_t *)cell);
+        break;
+    default:
+        printk(XENLOG_ERR "  unsupported size_cells=%d\n", size_cells);
+        return -EINVAL;
+    }
+
+    *p_addr = addr;
+    *p_size = size;
+
+    return 0;
+}
+
+/*
+ * Locate a multiboot module given its node offset in the FDT.
+ *
+ * The module location may be given via either FDT property:
+ *     * reg = 
+ *         * Mutates `bi` to append the module.
+ *     * module-index = 
+ *         * Leaves `bi` unchanged.
+ *
+ * @param fdt           Pointer to the full FDT.
+ * @param node          Offset for the module node.
+ * @param address_cells Number of 4-octet cells that make up an "address".
+ * @param size_cells    Number of 4-octet cells that make up a "size".
+ * @param bi[inout]     Xen's representation of the boot parameters.
+ * @return              -EINVAL on malformed nodes, otherwise
+ *                      index inside `bi->mods`
+ */
+int __init fdt_read_multiboot_module(const void *fdt, int node,
+                                     int address_cells, int size_cells,
+                                     struct boot_info *bi)
+{
+    const struct fdt_property *prop;
+    uint64_t addr, size;
+    int ret;
+    uint32_t idx;
+
+    if ( fdt_node_check_compatible(fdt, node, "multiboot,module") )
+    {
+        printk(XENLOG_ERR "  bad module. multiboot,module not found");
+        return -ENODATA;
+    }
+
+    /* Location given as a `module-index` property. */
+    if ( (prop = fdt_get_property(fdt, node, "module-index", NULL)) )
+    {
+        if ( fdt_get_property(fdt, node, "reg", NULL) )
+        {
+            printk(XENLOG_ERR "  found both reg and module-index for module\n");
+            return -EINVAL;
+        }
+        if ( (ret = fdt_prop_as_u32(prop, &idx)) )
+        {
+            printk(XENLOG_ERR "  bad module-index prop\n");
+            return ret;
+        }
+        if ( idx >= MAX_NR_BOOTMODS )
+        {
+            printk(XENLOG_ERR "  module-index overflow. %s=%u\n",
+                   STR(MAX_NR_BOOTMODS), MAX_NR_BOOTMODS);
+            return -EINVAL;
+        }
+
+        return idx;
+    }
+
+    /* Otherwise location given as a `reg` property. */
+    if ( !(prop = fdt_get_property(fdt, node, "reg", NULL)) )
+    {
+        printk(XENLOG_ERR "  no location for multiboot,module\n");
+        return -EINVAL;
+    }
+    if ( fdt_get_property(fdt, node, "module-index", NULL) )
+    {
+        printk(XENLOG_ERR "  found both reg and module-index for module\n");
+        return -EINVAL;
+    }
+
+    ret = fdt_prop_as_reg(prop, address_cells, size_cells, &addr, &size);
+    if ( ret < 0 )
+    {
+        printk(XENLOG_ERR "  failed reading reg for multiboot,module\n");
+        return -EINVAL;
+    }
+
+    idx = bi->nr_modules;
+    if ( idx > MAX_NR_BOOTMODS )
+    {
+        /*
+         * MAX_NR_BOOTMODS must fit in 31 bits so it's representable in the
+         * positive side of an int; for the return value.
+         */
+        BUILD_BUG_ON(MAX_NR_BOOTMODS > (uint64_t)INT_MAX);
+        printk(XENLOG_ERR "  idx=%u exceeds len=%u\n", idx, MAX_NR_BOOTMODS);
+        return -EINVAL;
+    }
+
+    /*
+     * Append new module to the existing list
+     *
+     * Note that bi->nr_modules points to Xen itself, so we must shift it first
+     */
+    bi->nr_modules++;
+    bi->mods[bi->nr_modules] = bi->mods[idx];
+    bi->mods[idx] = (struct boot_module){
+        .start = addr,
+        .size = size,
+    };
+
+    printk(XENLOG_INFO "  module[%u]: addr %lx size %lx\n", idx, addr, size);
+
+    return idx;
+}
+
 static int __init find_hyperlaunch_node(const void *fdt)
 {
     int hv_node = fdt_path_offset(fdt, "/chosen/hypervisor");
diff --git a/xen/common/domain-builder/fdt.h b/xen/common/domain-builder/fdt.h
index d1bcc23fa2..5570fb7a9c 100644
--- a/xen/common/domain-builder/fdt.h
+++ b/xen/common/domain-builder/fdt.h
@@ -3,6 +3,7 @@
 #define __XEN_DOMAIN_BUILDER_FDT_H__
 
 #include 
+#include 
 
 struct boot_info;
 
diff --git a/xen/include/xen/domain-builder.h b/xen/include/xen/domain-builder.h
index cbb3cbea7c..3ac3a0ab84 100644
--- a/xen/include/xen/domain-builder.h
+++ b/xen/include/xen/domain-builder.h
@@ -28,4 +28,8 @@ static inline enum fdt_kind builder_init(struct boot_info *bi)
 }
 #endif /* !IS_ENABLED(CONFIG_DOMAIN_BUILDER) */
 
+int fdt_read_multiboot_module(const void *fdt, int node,
+                              int address_cells, int size_cells,
+                              struct boot_info *bi)
+
 #endif /* __XEN_DOMAIN_BUILDER_H__ */
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini , "Jason
 Andryuk" , Alejandro Vallejo ,
	"Denis Mukhin" 
Subject: [PATCH v6 10/12] x86/hyperlaunch: add memory parsing to domain config
Date: Tue, 29 Apr 2025 13:36:21 +0100
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From: "Daniel P. Smith" 

Add three properties, memory, mem-min, and mem-max, to the domain node device
tree parsing to define the memory allocation for a domain. All three fields are
expressed in kb and written as a u64 in the device tree entries.

Signed-off-by: Daniel P. Smith 
Reviewed-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
Reviewed-by: Denis Mukhin 
---
 xen/arch/x86/dom0_build.c              |  8 +++++
 xen/arch/x86/include/asm/boot-domain.h |  4 +++
 xen/arch/x86/setup.c                   |  5 ++-
 xen/common/domain-builder/fdt.c        | 46 ++++++++++++++++++++++++++
 4 files changed, 62 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c
index 0b467fd4a4..8db24dbc0a 100644
--- a/xen/arch/x86/dom0_build.c
+++ b/xen/arch/x86/dom0_build.c
@@ -627,6 +627,14 @@ int __init construct_dom0(const struct boot_domain *bd)
 
     process_pending_softirqs();
 
+    /* If param dom0_size was not set and HL config provided memory size */
+    if ( !get_memsize(&dom0_size, ULONG_MAX) && bd->mem_pages )
+        dom0_size.nr_pages = bd->mem_pages;
+    if ( !get_memsize(&dom0_min_size, ULONG_MAX) && bd->min_pages )
+        dom0_min_size.nr_pages = bd->min_pages;
+    if ( !get_memsize(&dom0_max_size, ULONG_MAX) && bd->max_pages )
+        dom0_max_size.nr_pages = bd->max_pages;
+
     if ( is_hvm_domain(d) )
         rc = dom0_construct_pvh(bd);
     else if ( is_pv_domain(d) )
diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/include/asm/boot-domain.h
index e316d4bcde..fa8ea1cc66 100644
--- a/xen/arch/x86/include/asm/boot-domain.h
+++ b/xen/arch/x86/include/asm/boot-domain.h
@@ -18,6 +18,10 @@ struct boot_domain {
 #define BUILD_MODE_ENABLE_DM     (1 << 1) /* HVM    | PVH     */
     uint32_t mode;
 
+    unsigned long mem_pages;
+    unsigned long min_pages;
+    unsigned long max_pages;
+
     struct boot_module *kernel;
     struct boot_module *module;
     const char *cmdline;
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 343f87ee9d..4a3c41ad71 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -297,7 +297,10 @@ static const char *cmdline_cook(const char *p, const char *loader_name);
 struct boot_info __initdata xen_boot_info = {
     .loader = "unknown",
     .cmdline = "",
-    .domains = { [0 ... MAX_NR_BOOTDOMS - 1] = { .domid = DOMID_INVALID } },
+    .domains = { [0 ... MAX_NR_BOOTDOMS - 1] = {
+        .domid = DOMID_INVALID,
+        .max_pages = ULONG_MAX,
+    }},
 };
 
 static struct boot_info *__init multiboot_fill_boot_info(
diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
index aadca11dfa..d9babe9d56 100644
--- a/xen/common/domain-builder/fdt.c
+++ b/xen/common/domain-builder/fdt.c
@@ -7,6 +7,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -24,6 +25,16 @@ static int __init fdt_prop_as_u32(const struct fdt_property *prop,
     return 0;
 }
 
+static int __init fdt_prop_as_u64(const struct fdt_property *prop,
+                                  uint64_t *val)
+{
+    if ( !prop || fdt32_to_cpu(prop->len) < sizeof(uint64_t) )
+        return -EINVAL;
+
+    *val = fdt64_to_cpu(*(const fdt64_t *)prop->data);
+    return 0;
+}
+
 /*
  * Unpacks a "reg" property into its address and size constituents.
  *
@@ -256,6 +267,41 @@ static int __init fdt_process_domain_node(
                    (bd->mode & BUILD_MODE_ENABLE_DM) ? "hvm" :
                                                        "pvh");
         }
+        else if ( !strncmp(prop_name, "memory", name_len) )
+        {
+            uint64_t kb;
+            if ( (rc = fdt_prop_as_u64(prop, &kb)) )
+            {
+                printk(XENLOG_ERR "  bad \"memory\" prop on domain %s\n", name);
+                return rc;
+            }
+            bd->mem_pages = PFN_DOWN(kb * SZ_1K);
+            printk(XENLOG_ERR "  memory: %lu KiB\n", kb);
+        }
+        else if ( !strncmp(prop_name, "mem-min", name_len) )
+        {
+            uint64_t kb;
+            if ( (rc = fdt_prop_as_u64(prop, &kb)) )
+            {
+                printk(XENLOG_ERR
+                       "  bad \"mem-min\" prop on domain %s\n", name);
+                return rc;
+            }
+            bd->min_pages = PFN_DOWN(kb * SZ_1K);
+            printk(XENLOG_INFO "  min memory: %lu kb\n", kb);
+        }
+        else if ( !strncmp(prop_name, "mem-max", name_len) )
+        {
+            uint64_t kb;
+            if ( (rc = fdt_prop_as_u64(prop, &kb)) )
+            {
+                printk(XENLOG_ERR
+                       "  bad \"mem-max\" prop on domain %s\n", name);
+                return rc;
+            }
+            bd->max_pages = PFN_DOWN(kb * SZ_1K);
+            printk(XENLOG_INFO "  max memory: %lu KiB\n", kb);
+        }
     }
 
     fdt_for_each_subnode(node, fdt, dom_node)
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini , "Jason
 Andryuk" , Alejandro Vallejo ,
	"Denis Mukhin" 
Subject: [PATCH v6 07/12] x86/hyperlaunch: locate dom0 initrd with hyperlaunch
Date: Tue, 29 Apr 2025 13:36:18 +0100
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From: "Daniel P. Smith" 

Look for a subnode of type `multiboot,ramdisk` within a domain node and
parse via the fdt_read_multiboot_module() helper. After a successful
helper call, the module index is returned and the module is guaranteed
to be in the module list.

Fix unused typo in adjacent comment.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
Reviewed-by: Denis Mukhin 
---
 xen/arch/x86/setup.c            |  4 ++--
 xen/common/domain-builder/fdt.c | 24 ++++++++++++++++++++++++
 2 files changed, 26 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 765b690c41..c8de028439 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -2172,11 +2172,11 @@ void asmlinkage __init noreturn __start_xen(void)
      * At this point all capabilities that consume boot modules should have
      * claimed their boot modules. Find the first unclaimed boot module and
      * claim it as the initrd ramdisk. Do a second search to see if there are
-     * any remaining unclaimed boot modules, and report them as unusued initrd
+     * any remaining unclaimed boot modules, and report them as unused initrd
      * candidates.
      */
     initrdidx = first_boot_module_index(bi, BOOTMOD_UNKNOWN);
-    if ( initrdidx < MAX_NR_BOOTMODS )
+    if ( !bi->hyperlaunch_enabled && initrdidx < MAX_NR_BOOTMODS )
     {
         bi->mods[initrdidx].type = BOOTMOD_RAMDISK;
         bi->domains[0].module = &bi->mods[initrdidx];
diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
index dabe201b04..507f383f8e 100644
--- a/xen/common/domain-builder/fdt.c
+++ b/xen/common/domain-builder/fdt.c
@@ -226,6 +226,30 @@ static int __init fdt_process_domain_node(
                 bd->kernel->fdt_cmdline = fdt_get_prop_offset(
                     fdt, node, "bootargs", &bd->kernel->cmdline_pa);
         }
+        else if ( !fdt_node_check_compatible(fdt, node, "multiboot,ramdisk") )
+        {
+            int idx;
+
+            if ( bd->module )
+            {
+                printk(XENLOG_WARNING
+                       "Duplicate module for domain %s\n", name);
+                continue;
+            }
+
+            idx = fdt_read_multiboot_module(fdt, node, address_cells,
+                                            size_cells, bi);
+            if ( idx < 0 )
+            {
+                printk(XENLOG_ERR "  failed processing module for domain %s\n",
+                       name);
+                return idx;
+            }
+
+            printk(XENLOG_INFO "  module: multiboot-index=%d\n", idx);
+            bi->mods[idx].type = BOOTMOD_RAMDISK;
+            bd->module = &bi->mods[idx];
+        }
     }
 
     if ( !bd->kernel )
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini , "Jason
 Andryuk" , Alejandro Vallejo ,
	"Denis Mukhin" 
Subject: [PATCH v6 09/12] x86/hyperlaunch: specify dom0 mode with device tree
Date: Tue, 29 Apr 2025 13:36:20 +0100
Message-ID: <20250429123629.20839-10-agarciav@amd.com>
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From: "Daniel P. Smith" 

Enable selecting the mode in which the domain will be built and ran. This
includes:

  - whether it will be either a 32/64 bit domain
  - if it will be run as a PV or HVM domain
  - and if it will require a device model (not applicable for dom0)

In the device tree, this will be represented as a bit map that will be carried
through into struct boot_domain.

Signed-off-by: Daniel P. Smith 
Reviewed-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
Reviewed-by: Denis Mukhin 
---
 xen/arch/x86/include/asm/boot-domain.h |  5 +++++
 xen/arch/x86/setup.c                   |  3 ++-
 xen/common/domain-builder/fdt.c        | 21 +++++++++++++++++++++
 3 files changed, 28 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/include/asm/boot-domain.h
index d7c6042e25..e316d4bcde 100644
--- a/xen/arch/x86/include/asm/boot-domain.h
+++ b/xen/arch/x86/include/asm/boot-domain.h
@@ -13,6 +13,11 @@
 struct boot_domain {
     domid_t domid;
 
+                                          /* On     | Off    */
+#define BUILD_MODE_PARAVIRT      (1 << 0) /* PV     | PVH/HVM */
+#define BUILD_MODE_ENABLE_DM     (1 << 1) /* HVM    | PVH     */
+    uint32_t mode;
+
     struct boot_module *kernel;
     struct boot_module *module;
     const char *cmdline;
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 10ff67ac37..343f87ee9d 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -1030,7 +1030,8 @@ static struct domain *__init create_dom0(struct boot_info *bi)
     struct boot_domain *bd = &bi->domains[0];
     struct domain *d;
 
-    if ( opt_dom0_pvh )
+    if ( opt_dom0_pvh ||
+         (bi->hyperlaunch_enabled && !(bd->mode & BUILD_MODE_PARAVIRT)) )
     {
         dom0_cfg.flags |= (XEN_DOMCTL_CDF_hvm |
                            ((hvm_hap_supported() && !opt_dom0_shadow) ?
diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
index 2c05b0a22d..aadca11dfa 100644
--- a/xen/common/domain-builder/fdt.c
+++ b/xen/common/domain-builder/fdt.c
@@ -235,6 +235,27 @@ static int __init fdt_process_domain_node(
             bd->domid = val;
             printk(XENLOG_INFO "  domid: %d\n", bd->domid);
         }
+        else if ( !strncmp(prop_name, "mode", name_len) )
+        {
+            if ( (rc = fdt_prop_as_u32(prop, &bd->mode)) )
+            {
+                printk(XENLOG_ERR
+                       "  failed processing mode for domain %s\n", name);
+                return rc;
+            }
+
+            if ( (bd->mode & BUILD_MODE_PARAVIRT)  &&
+                 (bd->mode & BUILD_MODE_ENABLE_DM) )
+            {
+                printk(XENLOG_ERR "  mode: invalid (pv+hvm)\n");
+                return -EINVAL;
+            }
+
+            printk(XENLOG_INFO "  mode: %s\n",
+                   (bd->mode & BUILD_MODE_PARAVIRT)  ? "pv"  :
+                   (bd->mode & BUILD_MODE_ENABLE_DM) ? "hvm" :
+                                                       "pvh");
+        }
     }
 
     fdt_for_each_subnode(node, fdt, dom_node)
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini , "Jason
 Andryuk" , Alejandro Vallejo ,
	"Denis Mukhin" 
Subject: [PATCH v6 11/12] x86/hyperlaunch: add max vcpu parsing of hyperlaunch device tree
Date: Tue, 29 Apr 2025 13:36:22 +0100
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From: "Daniel P. Smith" 

Introduce the `cpus` property, named as such for dom0less compatibility, that
represents the maximum number of vcpus to allocate for a domain. In the device
tree, it will be encoded as a u32 value.

Signed-off-by: Daniel P. Smith 
Reviewed-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
Reviewed-by: Denis Mukhin 
---
 xen/arch/x86/dom0_build.c              |  3 +++
 xen/arch/x86/include/asm/boot-domain.h |  2 ++
 xen/common/domain-builder/fdt.c        | 11 +++++++++++
 3 files changed, 16 insertions(+)

diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c
index 8db24dbc0a..f734104c74 100644
--- a/xen/arch/x86/dom0_build.c
+++ b/xen/arch/x86/dom0_build.c
@@ -635,6 +635,9 @@ int __init construct_dom0(const struct boot_domain *bd)
     if ( !get_memsize(&dom0_max_size, ULONG_MAX) && bd->max_pages )
         dom0_max_size.nr_pages = bd->max_pages;
 
+    if ( opt_dom0_max_vcpus_max == UINT_MAX && bd->max_vcpus )
+        opt_dom0_max_vcpus_max = bd->max_vcpus;
+
     if ( is_hvm_domain(d) )
         rc = dom0_construct_pvh(bd);
     else if ( is_pv_domain(d) )
diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/include/asm/boot-domain.h
index fa8ea1cc66..969c02a6ea 100644
--- a/xen/arch/x86/include/asm/boot-domain.h
+++ b/xen/arch/x86/include/asm/boot-domain.h
@@ -22,6 +22,8 @@ struct boot_domain {
     unsigned long min_pages;
     unsigned long max_pages;
 
+    unsigned int max_vcpus;
+
     struct boot_module *kernel;
     struct boot_module *module;
     const char *cmdline;
diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
index d9babe9d56..02cfe8085d 100644
--- a/xen/common/domain-builder/fdt.c
+++ b/xen/common/domain-builder/fdt.c
@@ -302,6 +302,17 @@ static int __init fdt_process_domain_node(
             bd->max_pages = PFN_DOWN(kb * SZ_1K);
             printk(XENLOG_INFO "  max memory: %lu KiB\n", kb);
         }
+        else if ( !strncmp(prop_name, "cpus", name_len) )
+        {
+            uint32_t val = UINT32_MAX;
+            if ( (rc = fdt_prop_as_u32(prop, &val)) )
+            {
+                printk(XENLOG_ERR "  bad \"cpus\" prop on domain %s\n", name);
+                return rc;
+            }
+            bd->max_vcpus = val;
+            printk(XENLOG_INFO "  cpus: %d\n", bd->max_vcpus);
+        }
     }
 
     fdt_for_each_subnode(node, fdt, dom_node)
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini , "Jason
 Andryuk" , Alejandro Vallejo ,
	"Denis Mukhin" 
Subject: [PATCH v6 05/12] x86/hyperlaunch: locate dom0 kernel with hyperlaunch
Date: Tue, 29 Apr 2025 13:36:16 +0100
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From: "Daniel P. Smith" 

Look for a subnode of type `multiboot,kernel` within a domain node. If
found, locate it using the multiboot module helper to generically ensure
it lives in the module list. If the bootargs property is present and
there was not an MB1 string, then use the command line from the device
tree definition.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
Reviewed-by: Denis Mukhin 
---
 xen/arch/x86/setup.c            |  1 +
 xen/common/domain-builder/fdt.c | 64 +++++++++++++++++++++++++++++++--
 2 files changed, 62 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index f3b5c83a3c..f8193f2c1c 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -1291,6 +1291,7 @@ void asmlinkage __init noreturn __start_xen(void)
         i = first_boot_module_index(bi, BOOTMOD_UNKNOWN);
         bi->mods[i].type = BOOTMOD_KERNEL;
         bi->domains[0].kernel = &bi->mods[i];
+        bi->nr_domains = 1;
         bi->hyperlaunch_enabled = false;
     }
 
diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
index 05ac3647cf..cbb0ed30a2 100644
--- a/xen/common/domain-builder/fdt.c
+++ b/xen/common/domain-builder/fdt.c
@@ -99,9 +99,9 @@ static int __init fdt_prop_as_reg(const struct fdt_property *prop,
  * @return              -EINVAL on malformed nodes, otherwise
  *                      index inside `bi->mods`
  */
-int __init fdt_read_multiboot_module(const void *fdt, int node,
-                                     int address_cells, int size_cells,
-                                     struct boot_info *bi)
+static int __init fdt_read_multiboot_module(const void *fdt, int node,
+                                            int address_cells, int size_cells,
+                                            struct boot_info *bi)
 {
     const struct fdt_property *prop;
     uint64_t addr, size;
@@ -185,6 +185,52 @@ int __init fdt_read_multiboot_module(const void *fdt, int node,
     return idx;
 }
 
+static int __init fdt_process_domain_node(
+    struct boot_info *bi, const void *fdt, int dom_node)
+{
+    int node;
+    struct boot_domain *bd = &bi->domains[bi->nr_domains];
+    const char *name = fdt_get_name(fdt, dom_node, NULL) ?: "unknown";
+    int address_cells = fdt_address_cells(fdt, dom_node);
+    int size_cells = fdt_size_cells(fdt, dom_node);
+
+    fdt_for_each_subnode(node, fdt, dom_node)
+    {
+        if ( !fdt_node_check_compatible(fdt, node, "multiboot,kernel") )
+        {
+            int idx;
+
+            if ( bd->kernel )
+            {
+                printk(XENLOG_WARNING
+                       "  duplicate kernel for domain %s\n", name);
+                continue;
+            }
+
+            idx = fdt_read_multiboot_module(fdt, node, address_cells,
+                                            size_cells, bi);
+            if ( idx < 0 )
+            {
+                printk(XENLOG_ERR
+                       "  failed processing kernel for domain %s\n", name);
+                return idx;
+            }
+
+            printk(XENLOG_INFO "  kernel: multiboot-index=%d\n", idx);
+            bi->mods[idx].type = BOOTMOD_KERNEL;
+            bd->kernel = &bi->mods[idx];
+        }
+    }
+
+    if ( !bd->kernel )
+    {
+        printk(XENLOG_ERR "error: no kernel assigned to domain %s\n", name);
+        return -ENODATA;
+    }
+
+    return 0;
+}
+
 static int __init find_hyperlaunch_node(const void *fdt)
 {
     int hv_node = fdt_path_offset(fdt, "/chosen/hypervisor");
@@ -248,8 +294,20 @@ int __init fdt_walk_hyperlaunch(struct boot_info *bi)
 
     fdt_for_each_subnode(node, fdt, hv_node)
     {
+        if ( bi->nr_domains >= MAX_NR_BOOTDOMS )
+        {
+            printk(XENLOG_WARNING "warning: only creating first %u domains\n",
+                   MAX_NR_BOOTDOMS);
+            break;
+        }
+
         if ( !fdt_node_check_compatible(fdt, node, "xen,domain") )
+        {
+            if ( (ret = fdt_process_domain_node(bi, fdt, node)) < 0 )
+                break;
+
             bi->nr_domains++;
+        }
     }
 
     /* Until multi-domain construction is added, throw an error */
-- 
2.43.0



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Subject: [PATCH v6 08/12] x86/hyperlaunch: add domain id parsing to domain config
Date: Tue, 29 Apr 2025 13:36:19 +0100
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From: "Daniel P. Smith" 

Introduce the ability to specify the desired domain id for the domain
definition. The domain id will be populated in the domid property of the
domain node in the device tree configuration.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Alejandro Vallejo 
Reviewed-by: Denis Mukhin 
Reviewed-by: Jason Andryuk 
---
 xen/arch/x86/setup.c            |  5 ++--
 xen/common/domain-builder/fdt.c | 52 ++++++++++++++++++++++++++++++++-
 2 files changed, 54 insertions(+), 3 deletions(-)

diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index c8de028439..10ff67ac37 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -1043,8 +1043,9 @@ static struct domain *__init create_dom0(struct boot_info *bi)
     if ( iommu_enabled )
         dom0_cfg.flags |= XEN_DOMCTL_CDF_iommu;
 
-    /* Create initial domain.  Not d0 for pvshim. */
-    bd->domid = get_initial_domain_id();
+    if ( bd->domid == DOMID_INVALID )
+        /* Create initial domain.  Not d0 for pvshim. */
+        bd->domid = get_initial_domain_id();
     d = domain_create(bd->domid, &dom0_cfg,
                       pv_shim ? 0 : CDF_privileged | CDF_hardware);
     if ( IS_ERR(d) )
diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
index 507f383f8e..2c05b0a22d 100644
--- a/xen/common/domain-builder/fdt.c
+++ b/xen/common/domain-builder/fdt.c
@@ -2,6 +2,7 @@
 /*
  * Copyright (C) 2024, Apertus Solutions, LLC
  */
+#include 
 #include 
 #include 
 #include 
@@ -188,12 +189,54 @@ static int __init fdt_read_multiboot_module(const void *fdt, int node,
 static int __init fdt_process_domain_node(
     struct boot_info *bi, const void *fdt, int dom_node)
 {
-    int node;
+    int node, property;
     struct boot_domain *bd = &bi->domains[bi->nr_domains];
     const char *name = fdt_get_name(fdt, dom_node, NULL) ?: "unknown";
     int address_cells = fdt_address_cells(fdt, dom_node);
     int size_cells = fdt_size_cells(fdt, dom_node);
 
+    fdt_for_each_property_offset(property, fdt, dom_node)
+    {
+        const struct fdt_property *prop;
+        const char *prop_name;
+        int name_len, rc;
+
+        prop = fdt_get_property_by_offset(fdt, property, NULL);
+        if ( !prop )
+            continue; /* silently skip */
+
+        prop_name = fdt_get_string(fdt, fdt32_to_cpu(prop->nameoff), &name_len);
+        if ( !strncmp(prop_name, "domid", name_len) )
+        {
+            uint32_t val = DOMID_INVALID;
+
+            if ( (rc = fdt_prop_as_u32(prop, &val)) )
+            {
+                printk(XENLOG_ERR
+                       "  failed processing domain id for domain %s\n", name);
+                return rc;
+            }
+
+            if ( val >= DOMID_FIRST_RESERVED )
+            {
+                printk(XENLOG_ERR "  invalid domain id for domain %s\n", name);
+                return -EINVAL;
+            }
+
+            for ( unsigned int i = 0; i < bi->nr_domains; i++ )
+            {
+                if ( bi->domains[i].domid == val )
+                {
+                    printk(XENLOG_ERR "  duplicate id for domain %s\n", name);
+                    return -EINVAL;
+                }
+            }
+
+            bd->domid = val;
+            printk(XENLOG_INFO "  domid: %d\n", bd->domid);
+        }
+    }
+
     fdt_for_each_subnode(node, fdt, dom_node)
     {
         if ( !fdt_node_check_compatible(fdt, node, "multiboot,kernel") )
@@ -258,6 +301,13 @@ static int __init fdt_process_domain_node(
         return -ENODATA;
     }
 
+    if ( bd->domid == DOMID_INVALID )
+        bd->domid = get_initial_domain_id();
+    else if ( bd->domid != get_initial_domain_id() )
+        printk(XENLOG_WARNING
+               "warning: d%u is not the expected initial domain (d%u)\n",
+               bd->domid, get_initial_domain_id());
+
     return 0;
 }
 
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini ,
	"Bertrand Marquis" , Jason Andryuk
	, Alejandro Vallejo , Denis Mukhin
	
Subject: [PATCH v6 06/12] x86/hyperlaunch: obtain cmdline from device tree
Date: Tue, 29 Apr 2025 13:36:17 +0100
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From: "Daniel P. Smith" 

Add support to read the command line from the hyperlaunch device tree.
The device tree command line is located in the "bootargs" property of the
"multiboot,kernel" node.

A boot loader command line, e.g. a grub module string field, takes
precendence over the device tree one since it is easier to modify.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
Reviewed-by: Denis Mukhin 
---
 xen/arch/x86/include/asm/bootinfo.h |  6 ++++--
 xen/arch/x86/setup.c                | 22 ++++++++++++++++++++--
 xen/common/domain-builder/core.c    | 26 ++++++++++++++++++++++++++
 xen/common/domain-builder/fdt.c     |  6 ++++++
 xen/common/domain-builder/fdt.h     | 24 ++++++++++++++++++++++++
 xen/include/xen/domain-builder.h    |  8 +++++---
 xen/include/xen/libfdt/libfdt-xen.h | 23 +++++++++++++++++++++++
 7 files changed, 108 insertions(+), 7 deletions(-)

diff --git a/xen/arch/x86/include/asm/bootinfo.h b/xen/arch/x86/include/asm/bootinfo.h
index 1e3d582e45..5b2c93b1ef 100644
--- a/xen/arch/x86/include/asm/bootinfo.h
+++ b/xen/arch/x86/include/asm/bootinfo.h
@@ -35,11 +35,13 @@ struct boot_module {
 
     /*
      * Module State Flags:
-     *   relocated: indicates module has been relocated in memory.
-     *   released:  indicates module's pages have been freed.
+     *   relocated:   indicates module has been relocated in memory.
+     *   released:    indicates module's pages have been freed.
+     *   fdt_cmdline: indicates module's cmdline is in the FDT.
      */
     bool relocated:1;
     bool released:1;
+    bool fdt_cmdline:1;
 
     /*
      * A boot module may need decompressing by Xen.  Headroom is an estimate of
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index f8193f2c1c..765b690c41 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -985,7 +985,19 @@ static size_t __init domain_cmdline_size(const struct boot_info *bi,
 {
     size_t s = bi->kextra ? strlen(bi->kextra) : 0;
 
-    s += bd->kernel->cmdline_pa ? strlen(__va(bd->kernel->cmdline_pa)) : 0;
+
+    /*
+     * Bootloader cmdline takes precedence and replaces the DT provided one.
+     *
+     * In that case, fdt_cmdline is not be populated at all.
+     */
+    if ( bd->kernel->fdt_cmdline )
+    {
+        BUG_ON(!IS_ENABLED(CONFIG_DOMAIN_BUILDER));
+        s += builder_get_cmdline_size(bi, bd->kernel->cmdline_pa);
+    }
+    else if ( bd->kernel->cmdline_pa )
+        s += strlen(__va(bd->kernel->cmdline_pa));
 
     if ( s == 0 )
         return s;
@@ -1049,7 +1061,13 @@ static struct domain *__init create_dom0(struct boot_info *bi)
         if ( !(cmdline = xzalloc_array(char, cmdline_size)) )
             panic("Error allocating cmdline buffer for %pd\n", d);
 
-        if ( bd->kernel->cmdline_pa )
+        if ( bd->kernel->fdt_cmdline )
+        {
+            BUG_ON(!IS_ENABLED(CONFIG_DOMAIN_BUILDER));
+            builder_get_cmdline(
+                bi, bd->kernel->cmdline_pa, cmdline, cmdline_size);
+        }
+        else if ( bd->kernel->cmdline_pa )
             strlcpy(cmdline,
                     cmdline_cook(__va(bd->kernel->cmdline_pa), bi->loader),
                     cmdline_size);
diff --git a/xen/common/domain-builder/core.c b/xen/common/domain-builder/core.c
index c6917532be..b2f49bb17b 100644
--- a/xen/common/domain-builder/core.c
+++ b/xen/common/domain-builder/core.c
@@ -10,9 +10,35 @@
 #include 
 
 #include 
+#include 
 
 #include "fdt.h"
 
+size_t __init builder_get_cmdline_size(const struct boot_info *bi, int offset)
+{
+    const void *fdt;
+    int size;
+
+    fdt = bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_IDX]);
+    size = fdt_cmdline_prop_size(fdt, offset);
+    bootstrap_unmap();
+
+    return max(0, size);
+}
+
+int __init builder_get_cmdline(const struct boot_info *bi,
+                               int offset, char *cmdline, size_t size)
+{
+    const void *fdt;
+    int ret;
+
+    fdt = bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_IDX]);
+    ret = fdt_cmdline_prop_copy(fdt, offset, cmdline, size);
+    bootstrap_unmap();
+
+    return ret;
+}
+
 enum fdt_kind __init builder_init(struct boot_info *bi)
 {
     enum fdt_kind kind;
diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
index cbb0ed30a2..dabe201b04 100644
--- a/xen/common/domain-builder/fdt.c
+++ b/xen/common/domain-builder/fdt.c
@@ -219,6 +219,12 @@ static int __init fdt_process_domain_node(
             printk(XENLOG_INFO "  kernel: multiboot-index=%d\n", idx);
             bi->mods[idx].type = BOOTMOD_KERNEL;
             bd->kernel = &bi->mods[idx];
+
+            /* If bootloader didn't set cmdline, see if FDT provides one. */
+            if ( bd->kernel->cmdline_pa &&
+                 !((char *)__va(bd->kernel->cmdline_pa))[0] )
+                bd->kernel->fdt_cmdline = fdt_get_prop_offset(
+                    fdt, node, "bootargs", &bd->kernel->cmdline_pa);
         }
     }
 
diff --git a/xen/common/domain-builder/fdt.h b/xen/common/domain-builder/fdt.h
index 5570fb7a9c..68cbc42674 100644
--- a/xen/common/domain-builder/fdt.h
+++ b/xen/common/domain-builder/fdt.h
@@ -10,6 +10,30 @@ struct boot_info;
 /* hyperlaunch fdt is required to be module 0 */
 #define HYPERLAUNCH_MODULE_IDX 0
 
+static inline int __init fdt_cmdline_prop_size(const void *fdt, int offset)
+{
+    int ret;
+
+    fdt_get_property_by_offset(fdt, offset, &ret);
+
+    return ret;
+}
+
+static inline int __init fdt_cmdline_prop_copy(
+    const void *fdt, int offset, char *cmdline, size_t size)
+{
+    int ret;
+    const struct fdt_property *prop =
+        fdt_get_property_by_offset(fdt, offset, &ret);
+
+    if ( ret < 0 )
+        return ret;
+
+    ASSERT(size > ret);
+
+    return strlcpy(cmdline, prop->data, ret);
+}
+
 enum fdt_kind fdt_detect_kind(const struct boot_info *bi);
 int fdt_walk_hyperlaunch(struct boot_info *bi);
 
diff --git a/xen/include/xen/domain-builder.h b/xen/include/xen/domain-builder.h
index 3ac3a0ab84..350e2eb2af 100644
--- a/xen/include/xen/domain-builder.h
+++ b/xen/include/xen/domain-builder.h
@@ -2,6 +2,8 @@
 #ifndef __XEN_DOMAIN_BUILDER_H__
 #define __XEN_DOMAIN_BUILDER_H__
 
+#include 
+
 struct boot_info;
 
 /* Return status of builder_init(). Shows which boot mechanism was detected */
@@ -28,8 +30,8 @@ static inline enum fdt_kind builder_init(struct boot_info *bi)
 }
 #endif /* !IS_ENABLED(CONFIG_DOMAIN_BUILDER) */
 
-int fdt_read_multiboot_module(const void *fdt, int node,
-                              int address_cells, int size_cells,
-                              struct boot_info *bi)
+size_t builder_get_cmdline_size(const struct boot_info *bi, int offset);
+int builder_get_cmdline(const struct boot_info *bi, int offset,
+                        char *cmdline, size_t size);
 
 #endif /* __XEN_DOMAIN_BUILDER_H__ */
diff --git a/xen/include/xen/libfdt/libfdt-xen.h b/xen/include/xen/libfdt/libfdt-xen.h
index a5340bc9f4..9c20a26a35 100644
--- a/xen/include/xen/libfdt/libfdt-xen.h
+++ b/xen/include/xen/libfdt/libfdt-xen.h
@@ -13,6 +13,29 @@
 
 #include 
 
+static inline bool __init fdt_get_prop_offset(
+    const void *fdt, int node, const char *pname, unsigned long *poffset)
+{
+    int ret, offset;
+    const char *name;
+
+    fdt_for_each_property_offset(offset, fdt, node)
+    {
+        fdt_getprop_by_offset(fdt, offset, &name, &ret);
+
+        if ( ret < 0 )
+            continue;
+
+        if ( !strcmp(name, pname) )
+        {
+            *poffset = offset;
+            return true;
+        }
+    }
+
+    return false;
+}
+
 static inline int fdt_get_mem_rsv_paddr(const void *fdt, int n,
                                         paddr_t *address,
                                         paddr_t *size)
-- 
2.43.0



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From: Alejandro Vallejo 
To: 
CC: "Daniel P. Smith" , Jan Beulich
	, Andrew Cooper ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD
	, Michal Orzel , "Julien
 Grall" , Stefano Stabellini , "Jason
 Andryuk" , Alejandro Vallejo ,
	"Denis Mukhin" 
Subject: [PATCH v6 12/12] x86/hyperlaunch: add capabilities to boot domain
Date: Tue, 29 Apr 2025 13:36:23 +0100
Message-ID: <20250429123629.20839-13-agarciav@amd.com>
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From: "Daniel P. Smith" 

Introduce the ability to assign capabilities to a domain via its definition in
device tree. The capability property is a bitfield in both the device tree and
`struct boot_domain`.

Signed-off-by: Daniel P. Smith 
Signed-off-by: Jason Andryuk 
Signed-off-by: Alejandro Vallejo 
Reviewed-by: Denis Mukhin 
---
v6:
  * Reworded the commit message to reflect the fact that the
    DOMAIN_CAPS_HARDWARE is also done here.
  * Conditionalise setting CDF_iommu to DOMAIN_CAPS_HARDWARE being set.
---
 xen/arch/x86/include/asm/boot-domain.h |  3 +++
 xen/arch/x86/setup.c                   |  7 +++++--
 xen/common/domain-builder/fdt.c        | 23 +++++++++++++++++++++++
 3 files changed, 31 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/include/asm/boot-domain.h b/xen/arch/x86/include/asm/boot-domain.h
index 969c02a6ea..cb5351241a 100644
--- a/xen/arch/x86/include/asm/boot-domain.h
+++ b/xen/arch/x86/include/asm/boot-domain.h
@@ -13,6 +13,9 @@
 struct boot_domain {
     domid_t domid;
 
+    /* Bitmap. See DOMAIN_CAPS_MASK for a list */
+    uint32_t capabilities;
+
                                           /* On     | Off    */
 #define BUILD_MODE_PARAVIRT      (1 << 0) /* PV     | PVH/HVM */
 #define BUILD_MODE_ENABLE_DM     (1 << 1) /* HVM    | PVH     */
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index 4a3c41ad71..6a1e874b2e 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -62,6 +62,7 @@
 
 #include 
 
+#include 
 #include 
 #ifdef CONFIG_COMPAT
 #include 
@@ -1044,14 +1045,15 @@ static struct domain *__init create_dom0(struct boot_info *bi)
             XEN_X86_EMU_LAPIC | XEN_X86_EMU_IOAPIC | XEN_X86_EMU_VPCI;
     }
 
-    if ( iommu_enabled )
+    if ( iommu_enabled && (bd->capabilities & DOMAIN_CAPS_HARDWARE) )
         dom0_cfg.flags |= XEN_DOMCTL_CDF_iommu;
 
     if ( bd->domid == DOMID_INVALID )
         /* Create initial domain.  Not d0 for pvshim. */
         bd->domid = get_initial_domain_id();
     d = domain_create(bd->domid, &dom0_cfg,
-                      pv_shim ? 0 : CDF_privileged | CDF_hardware);
+            ((bd->capabilities & DOMAIN_CAPS_CONTROL)  ? CDF_privileged : 0) |
+            ((bd->capabilities & DOMAIN_CAPS_HARDWARE) ? CDF_hardware   : 0));
     if ( IS_ERR(d) )
         panic("Error creating d%u: %ld\n", bd->domid, PTR_ERR(d));
 
@@ -1314,6 +1316,7 @@ void asmlinkage __init noreturn __start_xen(void)
         i = first_boot_module_index(bi, BOOTMOD_UNKNOWN);
         bi->mods[i].type = BOOTMOD_KERNEL;
         bi->domains[0].kernel = &bi->mods[i];
+        bi->domains[0].capabilities = pv_shim ? 0 : DOMAIN_CAPS_MASK;
         bi->nr_domains = 1;
         bi->hyperlaunch_enabled = false;
     }
diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
index 02cfe8085d..232621ae46 100644
--- a/xen/common/domain-builder/fdt.c
+++ b/xen/common/domain-builder/fdt.c
@@ -7,6 +7,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -313,6 +314,28 @@ static int __init fdt_process_domain_node(
             bd->max_vcpus = val;
             printk(XENLOG_INFO "  cpus: %d\n", bd->max_vcpus);
         }
+        else if ( !strncmp(prop_name, "capabilities", name_len) )
+        {
+            if ( (rc = fdt_prop_as_u32(prop, &bd->capabilities)) )
+            {
+                printk(XENLOG_ERR
+                       "  bad \"capabilities\" on domain %s\n", name);
+                return rc;
+            }
+
+            if ( bd->capabilities & ~DOMAIN_CAPS_MASK )
+            {
+                printk(XENLOG_WARNING "  unknown capabilities: %#x\n",
+                       bd->capabilities & ~DOMAIN_CAPS_MASK);
+
+                bd->capabilities &= DOMAIN_CAPS_MASK;
+            }
+
+            printk(XENLOG_INFO "  caps: %s%s%s\n",
+                   (bd->capabilities & DOMAIN_CAPS_CONTROL)  ? "c" : "",
+                   (bd->capabilities & DOMAIN_CAPS_HARDWARE) ? "h" : "",
+                   (bd->capabilities & DOMAIN_CAPS_XENSTORE) ? "x" : "");
+        }
     }
 
     fdt_for_each_subnode(node, fdt, dom_node)
-- 
2.43.0



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Date: Tue, 29 Apr 2025 14:48:10 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Andrew Cooper 
Cc: Xen-devel ,
	Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= ,
	Anthony PERARD ,
	Jan Beulich 
Subject: Re: [PATCH TEST-ARTEFACTS] (Re)add libgcc to alpine rootfs
Message-ID: 
References: <20250429123643.230423-1-andrew.cooper3@citrix.com>
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On Tue, Apr 29, 2025 at 01:36:43PM +0100, Andrew Cooper wrote:
> It turns out that QEMU built in staging-4.19 (only) depends on it.
> 
> But, GCC can emit libgcc calls for arbitrary reasons, so include it
> unconditionally.

Is there a fixes tag for this, or it has always been this way?

> Signed-off-by: Andrew Cooper 

Acked-by: Roger Pau Monné 

Thanks, Roger.


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Subject: Re: [PATCH TEST-ARTEFACTS] (Re)add libgcc to alpine rootfs
To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
Cc: Xen-devel ,
 =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
 , Anthony PERARD
 , Jan Beulich 
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On 29/04/2025 1:48 pm, Roger Pau Monné wrote:
> On Tue, Apr 29, 2025 at 01:36:43PM +0100, Andrew Cooper wrote:
>> It turns out that QEMU built in staging-4.19 (only) depends on it.
>>
>> But, GCC can emit libgcc calls for arbitrary reasons, so include it
>> unconditionally.
> Is there a fixes tag for this, or it has always been this way?

Fixes: d18d7eba888e ("Shrink the rootfs substantially")

>
>> Signed-off-by: Andrew Cooper 
> Acked-by: Roger Pau Monné 

Thanks.  I'll get this deployed.

~Andrew


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Subject: Re: [PATCH v4 05/15] xen/x86: introduce "cpufreq=amd-cppc" xen
 cmdline
To: Penny Zheng 
Cc: ray.huang@amd.com, Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
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On 14.04.2025 09:40, Penny Zheng wrote:
> @@ -514,5 +515,16 @@ acpi_cpufreq_driver = {
>  
>  int __init acpi_cpufreq_register(void)
>  {
> -    return cpufreq_register_driver(&acpi_cpufreq_driver);
> +    int ret;
> +
> +    ret = cpufreq_register_driver(&acpi_cpufreq_driver);
> +    if ( ret )
> +        return ret;
> +    /*
> +     * After cpufreq driver registeration, XEN_PROCESSOR_PM_CPPC
> +     * and XEN_PROCESSOR_PM_PX shall become exclusive flags
> +     */
> +    xen_processor_pmbits &= ~XEN_PROCESSOR_PM_CPPC;
> +
> +    return ret;
>  }

Why is no similar adjustment needed in powernow_register_driver()? In principle
I would have expected that it's not each individual driver which needs to care
about this aspect, but that the framework is taking care of this.

> --- /dev/null
> +++ b/xen/arch/x86/acpi/cpufreq/amd-cppc.c
> @@ -0,0 +1,81 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * amd-cppc.c - AMD Processor CPPC Frequency Driver
> + *
> + * Copyright (C) 2025 Advanced Micro Devices, Inc. All Rights Reserved.
> + *
> + * Author: Penny Zheng 
> + *
> + * AMD CPPC cpufreq driver introduces a new CPU performance scaling design
> + * for AMD processors using the ACPI Collaborative Performance and Power
> + * Control (CPPC) feature which provides finer grained frequency control range.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +static bool __init amd_cppc_handle_option(const char *s, const char *end)
> +{
> +    int ret;
> +
> +    ret = parse_boolean("verbose", s, end);
> +    if ( ret >= 0 )
> +    {
> +        cpufreq_verbose = ret;
> +        return true;
> +    }
> +
> +    return false;
> +}
> +
> +int __init amd_cppc_cmdline_parse(const char *s, const char *e)
> +{
> +    do
> +    {

Nit (style): Brace placement is special here, just like it is ...

> +        const char *end = strpbrk(s, ",;");
> +
> +        if ( !amd_cppc_handle_option(s, end) )
> +        {
> +            printk(XENLOG_WARNING
> +                   "cpufreq/amd-cppc: option '%.*s' not recognized\n",
> +                   (int)((end ?: e) - s), s);
> +
> +            return -EINVAL;
> +        }
> +
> +        s = end ? end + 1 : NULL;
> +    } while ( s && s < e );

... here.

> --- a/xen/arch/x86/platform_hypercall.c
> +++ b/xen/arch/x86/platform_hypercall.c
> @@ -542,6 +542,9 @@ ret_t do_platform_op(
>                  ret = -ENOSYS;
>                  break;
>              }
> +            /* Xen doesn't support mixed mode */
> +            ASSERT((xen_processor_pmbits & XEN_PROCESSOR_PM_CPPC) == 0);

Please prefer ! over "== 0" in such purely boolean contexts.

> @@ -573,6 +576,14 @@ ret_t do_platform_op(
>          }
>  
>          case XEN_PM_CPPC:
> +            if ( !(xen_processor_pmbits & XEN_PROCESSOR_PM_CPPC) )
> +            {
> +                ret = -EOPNOTSUPP;
> +                break;
> +            }

While at least you no longer use -ENOSYS here, I question this behavior,
including that for the pre-existing cases: How is the caller supposed to know
whether to invoke this sub-op? Ignoring errors is generally not a good idea,
so it would be better if the caller could blindly issue this request, getting
back success unless there really was an issue with the data provided.

> @@ -102,6 +103,9 @@ static int __init handle_cpufreq_cmdline(enum cpufreq_xen_opt option)
>      cpufreq_xen_opts[cpufreq_xen_cnt++] = option;
>      switch ( option )
>      {
> +    case CPUFREQ_amd_cppc:
> +        xen_processor_pmbits |= XEN_PROCESSOR_PM_CPPC;
> +        break;
>      case CPUFREQ_hwp:
>      case CPUFREQ_xen:
>          xen_processor_pmbits |= XEN_PROCESSOR_PM_PX;

Here and (about) everywhere else: Blank line please between non-fall-through
case blocks. I guess I'm not going to repeat this any further. There are
very tiny switch() statements where it is okay to violate this principle, but
as a rule of thumb - if in doubt, put a blank line there.

> --- a/xen/include/acpi/cpufreq/processor_perf.h
> +++ b/xen/include/acpi/cpufreq/processor_perf.h
> @@ -5,6 +5,9 @@
>  #include 
>  #include 
>  
> +/* ability bits */
> +#define XEN_PROCESSOR_PM_CPPC   8

This needs correlating (at least via commentary, better by build-time checking)
with the other XEN_PROCESSOR_PM_* values. Otherwise someone adding a new #define
in the public header may not (easily) notice a possible conflict. With that in
mind I also question whether 8 is actually a good choice: That's the obvious
next value to use in the public interface. SIF_PM_MASK is 8 bits wide, so a
sensible value to use here would by e.g. 0x100.

Jan


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To: Alejandro Vallejo 
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On 29.04.2025 14:36, Alejandro Vallejo wrote:
> Not very many changes here. Just:
> 
> v5->v6:
>   * Denis' suggestion to rename a few helpers to fdt_*
>   * Change to last patch to only pass CDF_iommu to domains with
>     DOMAIN_CAPS_HARDWARE.
> 
> I _think_ this addresses all feedback I got so far and I don't expect
> anything major remaining before commit.

That's optimistic. I for one didn't even get around looking at v5.

Jan


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In-Reply-To: <20250414074056.3696888-7-Penny.Zheng@amd.com>
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On 14.04.2025 09:40, Penny Zheng wrote:
> We need to bypass construction of px statistic info in
> cpufreq_statistic_init() for amd-cppc mode, as P-states is not necessary there.

Is it really "need"? What goes wrong if we went through this initialization?
For now it feels more like an optimization to me, i.e. "want". Also ...

> --- a/xen/drivers/cpufreq/utility.c
> +++ b/xen/drivers/cpufreq/utility.c
> @@ -98,6 +98,9 @@ int cpufreq_statistic_init(unsigned int cpu)
>      if ( !pmpt )
>          return -EINVAL;
>  
> +    if ( !(pmpt->init & XEN_PX_INIT) )
> +        return 0;
> +
>      spin_lock(cpufreq_statistic_lock);
>  
>      pxpt = per_cpu(cpufreq_statistic_data, cpu);

... you're specifically not bypassing the spin_lock_init(), for a good reason.
With respective clarification in the description:
Acked-by: Jan Beulich 

Jan


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Date: Tue, 29 Apr 2025 14:22:35 +0100
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Subject: Re: [PATCH v6 00/12] Hyperlaunch device tree for dom0
From: Alejandro Vallejo 
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On Tue Apr 29, 2025 at 2:00 PM BST, Jan Beulich wrote:
> On 29.04.2025 14:36, Alejandro Vallejo wrote:
>> Not very many changes here. Just:
>>=20
>> v5->v6:
>>   * Denis' suggestion to rename a few helpers to fdt_*
>>   * Change to last patch to only pass CDF_iommu to domains with
>>     DOMAIN_CAPS_HARDWARE.
>>=20
>> I _think_ this addresses all feedback I got so far and I don't expect
>> anything major remaining before commit.
>
> That's optimistic. I for one didn't even get around looking at v5.

What can I say? I refill my glass often enough for it never to be half
empty :)

Jokes aside, I did cover most of your large-scope concerns by v5 and v6
isn't a dramatica change. I'm hopeful the bigger thorns ought to be gone
by now.

Cheers,
Alejandro


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From: Jan Beulich 
Subject: [PATCH] cpufreq: don't leave stale statistics pointer
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Error paths of cpufreq_statistic_init() correctly free the base
structure pointer, but the per-CPU variable would still hold it, mis-
guiding e.g. cpufreq_statistic_update(). Defer installing of the pointer
there until the structure was fully populated.

Fixes: 755af07edba1 ("x86/cpufreq: don't use static array for large per-CPU data structures")
Signed-off-by: Jan Beulich 

--- a/xen/drivers/cpufreq/utility.c
+++ b/xen/drivers/cpufreq/utility.c
@@ -113,7 +113,6 @@ int cpufreq_statistic_init(unsigned int
         spin_unlock(cpufreq_statistic_lock);
         return -ENOMEM;
     }
-    per_cpu(cpufreq_statistic_data, cpu) = pxpt;
 
     pxpt->u.trans_pt = xzalloc_array(uint64_t, count * count);
     if (!pxpt->u.trans_pt) {
@@ -139,6 +138,8 @@ int cpufreq_statistic_init(unsigned int
     pxpt->prev_state_wall = NOW();
     pxpt->prev_idle_wall = get_cpu_idle_time(cpu);
 
+    per_cpu(cpufreq_statistic_data, cpu) = pxpt;
+
     spin_unlock(cpufreq_statistic_lock);
 
     return 0;


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From: Jan Beulich 
Subject: [PATCH] cpufreq: use existing local var in cpufreq_statistic_init()
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..., which actually also helps readability (imo).

Signed-off-by: Jan Beulich 

--- a/xen/drivers/cpufreq/utility.c
+++ b/xen/drivers/cpufreq/utility.c
@@ -130,10 +130,10 @@ int cpufreq_statistic_init(unsigned int
         return -ENOMEM;
     }
 
-    pxpt->u.total = pmpt->perf.state_count;
-    pxpt->u.usable = pmpt->perf.state_count - pmpt->perf.platform_limit;
+    pxpt->u.total = count;
+    pxpt->u.usable = count - pmpt->perf.platform_limit;
 
-    for (i=0; i < pmpt->perf.state_count; i++)
+    for ( i = 0; i < count; i++ )
         pxpt->u.pt[i].freq = pmpt->perf.states[i].core_frequency;
 
     pxpt->prev_state_wall = NOW();


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Subject: Re: [PATCH] x86: drop underscore-prefixed {maddr,virt} <=> page
 conversion macros
To: Jan Beulich ,
 "xen-devel@lists.xenproject.org" 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
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On 29/04/2025 9:54 am, Jan Beulich wrote:
> Unlike the ones converting to/from frame numbers, these don't have type-
> safe overrides, and they also can't gain any within our present type
> system. Unsurprisingly we also don't have any uses of the underscore-
> prefixed variants.
>
> Signed-off-by: Jan Beulich 

Acked-by: Andrew Cooper 


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Subject: Re: [PATCH] cpufreq: don't leave stale statistics pointer
To: Jan Beulich ,
 "xen-devel@lists.xenproject.org" 
Cc: Julien Grall , Stefano Stabellini
 , Anthony PERARD ,
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On 29/04/2025 2:37 pm, Jan Beulich wrote:
> Error paths of cpufreq_statistic_init() correctly free the base
> structure pointer, but the per-CPU variable would still hold it, mis-
> guiding e.g. cpufreq_statistic_update(). Defer installing of the pointer
> there until the structure was fully populated.
>
> Fixes: 755af07edba1 ("x86/cpufreq: don't use static array for large per-CPU data structures")
> Signed-off-by: Jan Beulich 

Acked-by: Andrew Cooper 


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Subject: Re: [PATCH] cpufreq: use existing local var in
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To: Jan Beulich ,
 "xen-devel@lists.xenproject.org" 
Cc: Julien Grall , Stefano Stabellini
 , Anthony PERARD ,
 Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 
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On 29/04/2025 2:38 pm, Jan Beulich wrote:
> ..., which actually also helps readability (imo).
>
> Signed-off-by: Jan Beulich 

Acked-by: Andrew Cooper 


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Subject: Re: [PATCH v4 08/15] xen/amd: introduce amd_process_freq() to get
 processor frequency
To: Penny Zheng 
Cc: ray.huang@amd.com, Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 xen-devel@lists.xenproject.org
References: <20250414074056.3696888-1-Penny.Zheng@amd.com>
 <20250414074056.3696888-9-Penny.Zheng@amd.com>
Content-Language: en-US
From: Jan Beulich 
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On 14.04.2025 09:40, Penny Zheng wrote:
> --- a/xen/arch/x86/cpu/amd.c
> +++ b/xen/arch/x86/cpu/amd.c
> @@ -57,7 +57,6 @@ bool __initdata amd_virt_spec_ctrl;
>  static bool __read_mostly fam17_c6_disabled;
>  
>  static uint64_t attr_const amd_parse_freq(unsigned char c, uint64_t value);
> -#define INVAL_FREQ_MHZ  ~(uint64_t)0
>  
>  static inline int rdmsr_amd_safe(unsigned int msr, unsigned int *lo,
>  				 unsigned int *hi)
> @@ -596,14 +595,13 @@ static uint64_t amd_parse_freq(unsigned char c, uint64_t value)
>  	return freq;
>  }
>  
> -void amd_log_freq(const struct cpuinfo_x86 *c)
> +void amd_process_freq(const struct cpuinfo_x86 *c,

Misra demands that functions only used in a single CU be static.

> +		      uint64_t *low_mhz, uint64_t *nom_mhz, uint64_t *hi_mhz)

See comments on patch 07 as to types used here.

> @@ -684,20 +682,21 @@ void amd_log_freq(const struct cpuinfo_x86 *c)
>  
>  	if (idx && idx < h &&
>  	    !rdmsr_safe(0xC0010064 + idx, val) && (val >> 63) &&
> -	    !rdmsr_safe(0xC0010064, hi) && (hi >> 63))
> -		printk("CPU%u: %lu (%lu ... %lu) MHz\n",
> -		       smp_processor_id(),
> -		       amd_parse_freq(c->x86, val),
> -		       amd_parse_freq(c->x86, lo),
> -		       amd_parse_freq(c->x86, hi));
> -	else if (h && !rdmsr_safe(0xC0010064, hi) && (hi >> 63))
> -		printk("CPU%u: %lu ... %lu MHz\n",
> -		       smp_processor_id(),
> -		       amd_parse_freq(c->x86, lo),
> -		       amd_parse_freq(c->x86, hi));
> -	else
> -		printk("CPU%u: %lu MHz\n", smp_processor_id(),
> -		       amd_parse_freq(c->x86, lo));
> +	    !rdmsr_safe(0xC0010064, hi) && (hi >> 63)) {
> +		if (nom_mhz)
> +			*nom_mhz = amd_parse_freq(c->x86, val);
> +		if (low_mhz)
> +			*low_mhz = amd_parse_freq(c->x86, lo);
> +		if (hi_mhz)
> +			*hi_mhz = amd_parse_freq(c->x86, hi);
> +	} else if (h && !rdmsr_safe(0xC0010064, hi) && (hi >> 63)) {
> +		if (low_mhz)
> +			*low_mhz = amd_parse_freq(c->x86, lo);
> +		if (hi_mhz)
> +			*hi_mhz = amd_parse_freq(c->x86, hi);
> +	} else
> +		if (low_mhz)

Why does this "else if()" extend across two lines?

> @@ -708,6 +707,29 @@ void cf_check early_init_amd(struct cpuinfo_x86 *c)
>  	ctxt_switch_levelling(NULL);
>  }
>  
> +void amd_log_freq(const struct cpuinfo_x86 *c)
> +{
> +	uint64_t low_mhz, nom_mhz, hi_mhz;
> +
> +	if (c != &boot_cpu_data &&
> +	    (!opt_cpu_info || (c->apicid & (c->x86_num_siblings - 1))))
> +		return;
> +
> +	low_mhz = nom_mhz = hi_mhz = INVAL_FREQ_MHZ;
> +	amd_process_freq(c, &low_mhz, &nom_mhz, &hi_mhz);
> +
> +	if (low_mhz != INVAL_FREQ_MHZ && nom_mhz != INVAL_FREQ_MHZ &&
> +	    hi_mhz != INVAL_FREQ_MHZ)
> +		printk("CPU%u: %lu (%lu ... %lu) MHz\n",
> +		       smp_processor_id(),
> +		       low_mhz, nom_mhz, hi_mhz);

This doesn't match the original order of frequencies logged.

Jan


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Date: Tue, 29 Apr 2025 16:29:16 +0200
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Subject: Re: [PATCH v4 09/15] xen/x86: introduce a new amd cppc driver for
 cpufreq scaling
To: Penny Zheng 
Cc: ray.huang@amd.com, Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 xen-devel@lists.xenproject.org
References: <20250414074056.3696888-1-Penny.Zheng@amd.com>
 <20250414074056.3696888-10-Penny.Zheng@amd.com>
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From: Jan Beulich 
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On 14.04.2025 09:40, Penny Zheng wrote:
> --- a/xen/arch/x86/acpi/cpufreq/amd-cppc.c
> +++ b/xen/arch/x86/acpi/cpufreq/amd-cppc.c
> @@ -14,7 +14,56 @@
>  #include 
>  #include 
>  #include 
> +#include 
> +#include 
>  #include 
> +#include 
> +#include 
> +
> +#define amd_cppc_err(cpu, fmt, args...)                             \
> +    printk(XENLOG_ERR "AMD_CPPC: CPU%u error: " fmt, cpu, ## args)
> +#define amd_cppc_warn(cpu, fmt, args...)                            \
> +    printk(XENLOG_WARNING "AMD_CPPC: CPU%u warning: " fmt, cpu, ## args)
> +#define amd_cppc_verbose(cpu, fmt, args...)                         \
> +({                                                                  \
> +    if ( cpufreq_verbose )                                          \
> +        printk(XENLOG_DEBUG "AMD_CPPC: CPU%u " fmt, cpu, ## args);  \
> +})
> +
> +struct amd_cppc_drv_data
> +{
> +    const struct xen_processor_cppc *cppc_data;
> +    union {
> +        uint64_t raw;
> +        struct {
> +            unsigned int lowest_perf:8;
> +            unsigned int lowest_nonlinear_perf:8;
> +            unsigned int nominal_perf:8;
> +            unsigned int highest_perf:8;
> +            unsigned int :32;
> +        };
> +    } caps;
> +    union {
> +        uint64_t raw;
> +        struct {
> +            unsigned int max_perf:8;
> +            unsigned int min_perf:8;
> +            unsigned int des_perf:8;
> +            unsigned int epp:8;
> +            unsigned int :32;
> +        };
> +    } req;
> +
> +    int err;
> +};
> +
> +static DEFINE_PER_CPU_READ_MOSTLY(struct amd_cppc_drv_data *,
> +                                  amd_cppc_drv_data);
> +/*
> + * Core max frequency read from PstateDef as anchor point
> + * for freq-to-perf transition
> + */
> +static DEFINE_PER_CPU_READ_MOSTLY(uint64_t, amd_max_pxfreq_mhz);

Throughout here (and maybe also further down) - is the amd_ prefix really
needed everywhere? Even the cppc part of the identifiers seems excessive
in at least some of the cases.

For this last one, also once again see the type related comment on patch 07.

> @@ -51,10 +100,354 @@ int __init amd_cppc_cmdline_parse(const char *s, const char *e)
>      return 0;
>  }
>  
> +/*
> + * If CPPC lowest_freq and nominal_freq registers are exposed then we can
> + * use them to convert perf to freq and vice versa. The conversion is
> + * extrapolated as an linear function passing by the 2 points:
> + *  - (Low perf, Low freq)
> + *  - (Nominal perf, Nominal freq)
> + */
> +static int amd_cppc_khz_to_perf(const struct amd_cppc_drv_data *data,
> +                                unsigned int freq, uint8_t *perf)
> +{
> +    const struct xen_processor_cppc *cppc_data = data->cppc_data;
> +    uint64_t mul, div;
> +    int offset = 0, res;
> +
> +    if ( freq == (cppc_data->cpc.nominal_mhz * 1000) )

I'm pretty sure I commented on this before: The expression here _suggests_
that "freq" is in kHz, but that's not being made explicit anywhere.

> +    {
> +        *perf = data->caps.nominal_perf;
> +        return 0;
> +    }
> +
> +    if ( freq == (cppc_data->cpc.lowest_mhz * 1000) )
> +    {
> +        *perf = data->caps.lowest_perf;
> +        return 0;
> +    }

How likely is it that these two early return paths are taken, when the
incoming "freq" is 25 or 5 MHz granular? IOW - is it relevant to shortcut
these two cases?

> +    if ( cppc_data->cpc.lowest_mhz && cppc_data->cpc.nominal_mhz &&
> +         cppc_data->cpc.lowest_mhz < cppc_data->cpc.nominal_mhz )

Along the lines of a comment on an earlier patch, the middle part of the
condition here is redundant with the 3rd one. Also, don't you check this
relation already during init? IOW isn't it the 3rd part which can be
dropped?

> +    {
> +        mul = data->caps.nominal_perf - data->caps.lowest_perf;
> +        div = cppc_data->cpc.nominal_mhz - cppc_data->cpc.lowest_mhz;
> +
> +        /*
> +         * We don't need to convert to kHz for computing offset and can
> +         * directly use nominal_mhz and lowest_mhz as the division
> +         * will remove the frequency unit.
> +         */
> +        offset = data->caps.nominal_perf -
> +                 (mul * cppc_data->cpc.nominal_mhz) / div;
> +    }
> +    else
> +    {
> +        /* Read Processor Max Speed(MHz) as anchor point */
> +        mul = data->caps.highest_perf;
> +        div = this_cpu(amd_max_pxfreq_mhz);
> +        if ( !div || div == INVAL_FREQ_MHZ )

Seeing this - do we need INVAL_FREQ_MHZ at all? Isn't 0 good enough an indicator
of "data not available"?

> +            return -EINVAL;
> +    }
> +
> +    res = offset + (mul * freq) / (div * 1000);
> +    if ( res > UINT8_MAX )
> +    {
> +        printk_once(XENLOG_WARNING
> +                    "Perf value exceeds maximum value 255: %d\n", res);
> +        *perf = 0xff;
> +        return 0;
> +    } else if ( res < 0 )

Nit: Style. And no real need for "else" here anyway (or alternatively for the
"return 0", with an "else" added below).

> +    {
> +        printk_once(XENLOG_WARNING
> +                    "Perf value smaller than minimum value 0: %d\n", res);
> +        *perf = 0;
> +        return 0;
> +    }
> +    *perf = (uint8_t)res;

We don't normally spell out such conversions (i.e. please drop the cast).

> +    return 0;
> +}
> +
> +static int amd_get_lowest_or_nominal_freq(const struct amd_cppc_drv_data *data,

Nothing in the function looks to limit it to "nominal" or "lowest", so them
being in the identifier feels misleading.

> +                                          uint32_t cpc_mhz, uint8_t perf,
> +                                          unsigned int *freq)
> +{
> +    uint64_t mul, div, res;
> +
> +    if ( !freq )
> +        return -EINVAL;

Is this needed? It's an internal function.

> +    if ( cpc_mhz )
> +    {
> +        /* Switch to khz */
> +        *freq = cpc_mhz * 1000;
> +        return 0;
> +    }
> +
> +    /* Read Processor Max Speed(MHz) as anchor point */
> +    mul = this_cpu(amd_max_pxfreq_mhz);
> +    if ( mul == INVAL_FREQ_MHZ || !mul )
> +    {
> +        printk(XENLOG_ERR
> +               "Failed to read valid processor max frequency as anchor point: %lu\n",
> +               mul);
> +        return -EINVAL;
> +    }
> +    div = data->caps.highest_perf;
> +    res = (mul * perf * 1000) / div;

While there is a comment further up, clarifying function-wide that the result is
to be in kHz would perhaps be better.

> +    if ( res > UINT_MAX || !res )
> +    {
> +        printk(XENLOG_ERR
> +               "Frequeny exceeds maximum value UINT_MAX or being zero value: %lu\n",

Just "out of range"?

> +               res);
> +        return -EINVAL;

And then -ERANGE here?

> +    }
> +    *freq = (unsigned int)res;

See above.

> +static int amd_get_max_freq(const struct amd_cppc_drv_data *data,
> +                            unsigned int *max_freq)
> +{
> +    unsigned int nom_freq = 0, boost_ratio;
> +    int res;
> +
> +    res = amd_get_lowest_or_nominal_freq(data,
> +                                         data->cppc_data->cpc.nominal_mhz,
> +                                         data->caps.nominal_perf,
> +                                         &nom_freq);
> +    if ( res )
> +        return res;
> +
> +    boost_ratio = (unsigned int)(data->caps.highest_perf /
> +                                 data->caps.nominal_perf);

I may have seen logic ensuring nominal_perf isn't 0, so that part may be
fine. What guarantees this division to yield a positive value, though?
If it yields zero (say 0xff / 0x80), ...

> +    *max_freq = nom_freq * boost_ratio;

... zero will be reported back here. I think you want to scale the
calculations here to avoid such.

> +static void cf_check amd_cppc_init_msrs(void *info)
> +{
> +    struct cpufreq_policy *policy = info;
> +    struct amd_cppc_drv_data *data = this_cpu(amd_cppc_drv_data);
> +    uint64_t val;
> +    unsigned int min_freq = 0, nominal_freq = 0, max_freq;
> +
> +    /* Package level MSR */
> +    rdmsrl(MSR_AMD_CPPC_ENABLE, val);
> +    /*
> +     * Only when Enable bit is on, the hardware will calculate the processor’s
> +     * performance capabilities and initialize the performance level fields in
> +     * the CPPC capability registers.
> +     */
> +    if ( !(val & AMD_CPPC_ENABLE) )
> +    {
> +        val |= AMD_CPPC_ENABLE;
> +        wrmsrl(MSR_AMD_CPPC_ENABLE, val);
> +    }
> +
> +    rdmsrl(MSR_AMD_CPPC_CAP1, data->caps.raw);
> +
> +    if ( data->caps.highest_perf == 0 || data->caps.lowest_perf == 0 ||
> +         data->caps.nominal_perf == 0 || data->caps.lowest_nonlinear_perf == 0 ||
> +         data->caps.lowest_perf > data->caps.lowest_nonlinear_perf ||

Same question as asked elsewhere - where is this relation specified?

> +         data->caps.lowest_nonlinear_perf > data->caps.nominal_perf ||
> +         data->caps.nominal_perf > data->caps.highest_perf )
> +    {
> +        amd_cppc_err(policy->cpu,
> +                     "Platform malfunction, read CPPC capability highest(%u), lowest(%u), nominal(%u), lowest_nonlinear(%u) zero value\n",

The message wants shortening if at all possible, and it wants to not be
misleading (saying "zero" when the issue may be something else).

> +                     data->caps.highest_perf, data->caps.lowest_perf,
> +                     data->caps.nominal_perf, data->caps.lowest_nonlinear_perf);
> +        goto err;
> +    }
> +
> +    amd_process_freq(cpu_data + policy->cpu,

&cpu_data[policy->cpu] is generally preferred in such cases.

> +static int cf_check amd_cppc_cpufreq_cpu_init(struct cpufreq_policy *policy)
> +{
> +    unsigned int cpu = policy->cpu;
> +    struct amd_cppc_drv_data *data;
> +    const struct cpuinfo_x86 *c = cpu_data + cpu;
> +
> +    data = xvzalloc(struct amd_cppc_drv_data);
> +    if ( !data )
> +        return -ENOMEM;
> +
> +    data->cppc_data = &processor_pminfo[cpu]->cppc_data;
> +
> +    per_cpu(amd_cppc_drv_data, cpu) = data;
> +
> +    /* Feature CPPC is firstly introduced on Zen2 */
> +    if ( c->x86 < 0x17 )
> +    {
> +        printk_once("Unsupported cpu family: %x\n", c->x86);
> +        return -EOPNOTSUPP;
> +    }

With the cpu_has_cppc check in amd_cppc_register_driver(), is this check
really needed?

Jan


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Date: Tue, 29 Apr 2025 07:32:10 -0700
From: "H. Peter Anvin" 
To: Ingo Molnar ,
        Linus Torvalds 
CC: Andrew Cooper , Arnd Bergmann ,
        Arnd Bergmann , Thomas Gleixner ,
        Ingo Molnar , Borislav Petkov ,
        Dave Hansen , x86@kernel.org,
        Juergen Gross ,
        Boris Ostrovsky ,
        Alexander Usyskin ,
        Greg Kroah-Hartman ,
        =?UTF-8?Q?Mateusz_Jo=C5=84czyk?= ,
        Mike Rapoport , Ard Biesheuvel ,
        Peter Zijlstra , linux-kernel@vger.kernel.org,
        xen-devel@lists.xenproject.org
Subject: =?US-ASCII?Q?Re=3A_=5BPATCH=5D_bitops/32=3A_Convert_variable?=
 =?US-ASCII?Q?=5Fffs=28=29_and_fls=28=29_zero-case_handling_to_C?=
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On April 29, 2025 3:08:03 AM PDT, Ingo Molnar  wrote:
>
>* Linus Torvalds  wrote:
>
>> On Mon, 28 Apr 2025 at 00:14, Ingo Molnar  wrote:
>> >
>> > And, just out of intellectual curiosity, I also tried to measure the
>> > code generation price of the +1 standards-quirk in the fls()/ffs()
>> > interface as well:
>> >
>> > =2E=2E=2E and unless I messed up the patch, it seems to have a surpri=
singly
>> > low impact - maybe because the compiler can amortize its cost by
>> > adjusting all dependent code mostly at build time, so the +1 doesn't
>> > end up being generated most of the time?
>>=20
>> No, I think one issue is that most users actually end up subtracting
>> one from the return value of 'ffs()', because the "bit #0 returns 1"
>> semantics of the standard ffs() function really is insane=2E
>>=20
>> It's not just that it doesn't match sane hardware, it's also that it
>> doesn't match sane *users*=2E If bit #0 is set, people want '0', so the=
y
>> typically subtract 1=2E
>>=20
>> So when you stop adding one, you aren't actually removing code -
>> you're often adding it=2E
>>=20
>> Just see how many hits you get from
>>=20
>>     git grep '\>=20
>> which is obviously not a very precise pattern, but just look at the
>> output and see just *how* common that "subtract one" thing is=2E
>>=20
>> I really don't understand how anybody *ever* thought that the whole
>> "return one bigger" was a good idea for ffs()=2E
>
>Yeah=2E No argument from me that it's a badly thought out interface - I=
=20
>was just surprised that it doesn't seem to impact performance as badly=20
>as I expected=2E I have to add that a lot of work went into absorbing the=
=20
>negative effects of the ffs()/fls() interfaces:
>
>  starship:~/tip> git grep -Ee '__ffs\(|__fls\(' | wc -l
>  1055
>
>So it impacts code quality negatively, which is arguably the worse side=
=20
>effect=2E
>
>> But maybe people really were poisoned by the Pascal mindset=2E Or maybe=
=20
>> it was invented by some ancient Roman who hadn't heard of the concept=
=20
>> of zero=2E Who knows?
>
>Hey, ancient Romans didn't even have the concept of *whitespaces* and=20
>punctuation to begin with:
>
>    https://historyofinformation=2Ecom/images/Vergilius_Augusteus,_Georgi=
ca_121=2Ejpg
>
>Lazy stonemasons the lot of them=2E
>
>Romans were the worst ever coders too I suspect=2E What have the Romans=
=20
>ever done for us??
>
>	Ingo

Well, they did build the roads=2E=2E=2E =F0=9F=A4=A3

Roman numerals obviously were not a positional system, but at least in acc=
ounting they used N for zero (nulla=2E)

ROMANI=E2=80=A2ITE=E2=80=A2DOMVM


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Date: Tue, 29 Apr 2025 15:38:51 +0100
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Subject: Re: [PATCH] bitops/32: Convert variable_ffs() and fls() zero-case
 handling to C
To: "H. Peter Anvin" ,
 Linus Torvalds ,
 Ingo Molnar 
Cc: Arnd Bergmann , Arnd Bergmann ,
 Thomas Gleixner , Ingo Molnar ,
 Borislav Petkov , Dave Hansen ,
 x86@kernel.org, Juergen Gross ,
 Boris Ostrovsky ,
 Alexander Usyskin ,
 Greg Kroah-Hartman ,
 =?UTF-8?Q?Mateusz_Jo=C5=84czyk?= ,
 Mike Rapoport , Ard Biesheuvel ,
 Peter Zijlstra , linux-kernel@vger.kernel.org,
 xen-devel@lists.xenproject.org
References: <20250425141740.734030-1-arnd@kernel.org>
 
 
 
 
 
 
  
 
 
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In-Reply-To: <956DB0ED-F3DB-456D-8D06-6F40DBDB815A@zytor.com>
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On 29/04/2025 4:13 am, H. Peter Anvin wrote:
> On April 28, 2025 7:25:17 PM PDT, Andrew Cooper  wrote:
>> On 29/04/2025 3:00 am, H. Peter Anvin wrote:
>>> On April 28, 2025 5:12:13 PM PDT, Andrew Cooper  wrote:
>>>> On 28/04/2025 10:38 pm, H. Peter Anvin wrote:
>>>>> On April 28, 2025 9:14:45 AM PDT, Linus Torvalds  wrote:
>>>>>> On Mon, 28 Apr 2025 at 00:05, Ingo Molnar  wrote:
>>>>>>> And once we remove 486, I think we can do the optimization below to
>>>>>>> just assume the output doesn't get clobbered by BS*L in the zero-case,
>>>>>>> right?
>>>>>> We probably can't, because who knows what "Pentium" CPU's are out there.
>>>>>>
>>>>>> Or even if Pentium really does get it right. I doubt we have any
>>>>>> developers with an original Pentium around.
>>>>>>
>>>>>> So just leave the "we don't know what the CPU result is for zero"
>>>>>> unless we get some kind of official confirmation.
>>>>>>
>>>>>>          Linus
>>>>> If anyone knows for sure, it is probably Christian Ludloff. However, there was a *huge* tightening of the formal ISA when the i686 was introduced (family=6) and I really believe this was part of it.
>>>>>
>>>>> I also really don't trust that family=5 really means conforms to undocumented P5 behavior, e.g. for Quark.
>>>> https://www.sandpile.org/x86/flags.htm
>>>>
>>>> That's a lot of "can't even characterise the result" in the P5.
>>>>
>>>> Looking at P4 column, that is clearly what the latest SDM has
>>>> retroactively declared to be architectural.
>>>>
>>>> ~Andrew
>>> Yes, but it wasn't about flags here. 
>>>
>>> Now, question: can we just use __builtin_*() for these? I think gcc should always generate inline code for these on x86.
>> Yes it does generate inline code.  https://godbolt.org/z/M45oo5rqT
>>
>> GCC does it branchlessly, but cannot optimise based on context.
>>
>> Clang can optimise based on context, except the 0 case it seems.
>>
>> Moving to -march=i686 causes both GCC and Clang to switch to CMOV and
>> create branchless code, but is still GCC still can't optimise out the
>> CMOV based on context.
>>
>> ~Andrew
> Maybe a gcc bug report would be better than trying to hack around this in the kernel?

I tried that.  (The thread started as a question around
__builtin_constant_p() but did grow to cover __builtin_ffs().)

https://gcc.gnu.org/pipermail/gcc/2024-March/243465.html

~Andrew


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To: xen-devel@lists.xenproject.org
Cc: Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk 
Subject: [PATCH v4 4/7] arm/mpu: Provide access to the MPU region from the C code
Date: Tue, 29 Apr 2025 16:20:54 +0100
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Implement some utility function in order to access the MPU regions
from the C world.

Signed-off-by: Luca Fancellu 
---
v4 changes:
 - moved back PRBAR0_EL2/PRLAR0_EL2 to mm.c and protect
   them with CONFIG_ARM_64, changed comments, fixed typos and code
   style
 - Add PRBAR_EL2_(n) definition, to be overriden by Arm32
 - protect prepare_selector, read_protection_region,
   write_protection_region by Arm64 to ensure compilation on both
   arm32 and arm64, Arm32 will modify that later while introducing
   the arm32 bits.
v3 changes:
 - Moved PRBAR0_EL2/PRLAR0_EL2 to arm64 specific
 - Modified prepare_selector() to be easily made a NOP
   for Arm32, which can address up to 32 region without
   changing selector and it is also its maximum amount
   of MPU regions.
---
---
 xen/arch/arm/include/asm/mpu.h    |   1 +
 xen/arch/arm/include/asm/mpu/mm.h |  34 +++++++++
 xen/arch/arm/mpu/mm.c             | 117 ++++++++++++++++++++++++++++++
 3 files changed, 152 insertions(+)

diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h
index 1368b2eb990f..40a86140b6cc 100644
--- a/xen/arch/arm/include/asm/mpu.h
+++ b/xen/arch/arm/include/asm/mpu.h
@@ -17,6 +17,7 @@
 #define MPU_REGION_SHIFT  6
 #define MPU_REGION_ALIGN  (_AC(1, UL) << MPU_REGION_SHIFT)
 #define MPU_REGION_MASK   (~(MPU_REGION_ALIGN - 1))
+#define MPU_REGION_RES0   (0xFFFFULL << 48)
 
 #define NUM_MPU_REGIONS_SHIFT   8
 #define NUM_MPU_REGIONS         (_AC(1, UL) << NUM_MPU_REGIONS_SHIFT)
diff --git a/xen/arch/arm/include/asm/mpu/mm.h b/xen/arch/arm/include/asm/mpu/mm.h
index 28339259c458..e2235e568e81 100644
--- a/xen/arch/arm/include/asm/mpu/mm.h
+++ b/xen/arch/arm/include/asm/mpu/mm.h
@@ -41,6 +41,40 @@ static inline struct page_info *virt_to_page(const void *v)
     return mfn_to_page(mfn);
 }
 
+/* Utility function to be used whenever MPU regions are modified */
+static inline void context_sync_mpu(void)
+{
+    /*
+     * ARM DDI 0600B.a, C1.7.1
+     * Writes to MPU registers are only guaranteed to be visible following a
+     * Context synchronization event and DSB operation.
+     */
+    dsb(sy);
+    isb();
+}
+
+/*
+ * The following API requires context_sync_mpu() after being used to modify MPU
+ * regions:
+ *  - write_protection_region
+ */
+
+/*
+ * Reads the MPU region with index 'sel' from the HW.
+ *
+ * @pr_read: mpu protection region returned by read op.
+ * @sel: mpu protection region selector
+ */
+extern void read_protection_region(pr_t *pr_read, uint8_t sel);
+
+/*
+ * Writes the MPU region with index 'sel' to the HW.
+ *
+ * @pr_write: const mpu protection region passed through write op.
+ * @sel: mpu protection region selector
+ */
+extern void write_protection_region(const pr_t *pr_write, uint8_t sel);
+
 #endif /* __ARM_MPU_MM_H__ */
 
 /*
diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c
index 9eab09ff2044..40ccf99adc94 100644
--- a/xen/arch/arm/mpu/mm.c
+++ b/xen/arch/arm/mpu/mm.c
@@ -8,6 +8,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 struct page_info *frame_table;
 
@@ -26,6 +28,35 @@ DECLARE_BITMAP(xen_mpumap_mask, MAX_MPU_REGION_NR) \
 /* EL2 Xen MPU memory region mapping table. */
 pr_t __section(".data.page_aligned") xen_mpumap[MAX_MPU_REGION_NR];
 
+#ifdef CONFIG_ARM_64
+/*
+ * The following are needed for the case generators GENERATE_WRITE_PR_REG_CASE
+ * and GENERATE_READ_PR_REG_CASE with num==0
+ */
+#define PRBAR0_EL2 PRBAR_EL2
+#define PRLAR0_EL2 PRLAR_EL2
+
+#define PRBAR_EL2_(n)   PRBAR##n##_EL2
+#define PRLAR_EL2_(n)   PRLAR##n##_EL2
+
+#endif
+
+#define GENERATE_WRITE_PR_REG_CASE(num, pr)                                 \
+    case num:                                                               \
+    {                                                                       \
+        WRITE_SYSREG(pr->prbar.bits & ~MPU_REGION_RES0, PRBAR_EL2_(num));   \
+        WRITE_SYSREG(pr->prlar.bits & ~MPU_REGION_RES0, PRLAR_EL2_(num));   \
+        break;                                                              \
+    }
+
+#define GENERATE_READ_PR_REG_CASE(num, pr)                      \
+    case num:                                                   \
+    {                                                           \
+        pr->prbar.bits = READ_SYSREG(PRBAR_EL2_(num));          \
+        pr->prlar.bits = READ_SYSREG(PRLAR_EL2_(num));          \
+        break;                                                  \
+    }
+
 static void __init __maybe_unused build_assertions(void)
 {
     /*
@@ -36,6 +67,92 @@ static void __init __maybe_unused build_assertions(void)
     BUILD_BUG_ON(PAGE_SIZE != SZ_4K);
 }
 
+#ifdef CONFIG_ARM_64
+/*
+ * Armv8-R supports direct access and indirect access to the MPU regions through
+ * registers, indirect access involves changing the MPU region selector, issuing
+ * an isb barrier and accessing the selected region through specific registers;
+ * instead direct access involves accessing specific registers that points to
+ * a specific MPU region, without changing the selector (in some cases) and
+ * issuing barriers because of that.
+ * For Arm64 the PR{B,L}AR_ELx (for n=0) and PR{B,L}AR_ELx, n=1..15, are used
+ * for the direct access to the regions selected by PRSELR_EL2.REGION<7:4>:n, so
+ * 16 regions can be directly access when the selector is multiple of 16, giving
+ * access to all the supported memory regions.
+ */
+static void prepare_selector(uint8_t *sel)
+{
+    uint8_t cur_sel = *sel;
+
+    /*
+     * {read,write}_protection_region works using the direct access to the 0..15
+     * regions, so in order to save the isb() overhead, change the PRSELR_EL2
+     * only when needed, so when the upper 4 bits of the selector will change.
+     */
+    cur_sel &= 0xF0U;
+    if ( READ_SYSREG(PRSELR_EL2) != cur_sel )
+    {
+        WRITE_SYSREG(cur_sel, PRSELR_EL2);
+        isb();
+    }
+    *sel = *sel & 0xFU;
+}
+
+void read_protection_region(pr_t *pr_read, uint8_t sel)
+{
+    prepare_selector(&sel);
+
+    switch ( sel )
+    {
+        GENERATE_READ_PR_REG_CASE(0, pr_read);
+        GENERATE_READ_PR_REG_CASE(1, pr_read);
+        GENERATE_READ_PR_REG_CASE(2, pr_read);
+        GENERATE_READ_PR_REG_CASE(3, pr_read);
+        GENERATE_READ_PR_REG_CASE(4, pr_read);
+        GENERATE_READ_PR_REG_CASE(5, pr_read);
+        GENERATE_READ_PR_REG_CASE(6, pr_read);
+        GENERATE_READ_PR_REG_CASE(7, pr_read);
+        GENERATE_READ_PR_REG_CASE(8, pr_read);
+        GENERATE_READ_PR_REG_CASE(9, pr_read);
+        GENERATE_READ_PR_REG_CASE(10, pr_read);
+        GENERATE_READ_PR_REG_CASE(11, pr_read);
+        GENERATE_READ_PR_REG_CASE(12, pr_read);
+        GENERATE_READ_PR_REG_CASE(13, pr_read);
+        GENERATE_READ_PR_REG_CASE(14, pr_read);
+        GENERATE_READ_PR_REG_CASE(15, pr_read);
+    default:
+        BUG(); /* Can't happen */
+    }
+}
+
+void write_protection_region(const pr_t *pr_write, uint8_t sel)
+{
+    prepare_selector(&sel);
+
+    switch ( sel )
+    {
+        GENERATE_WRITE_PR_REG_CASE(0, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(1, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(2, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(3, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(4, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(5, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(6, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(7, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(8, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(9, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(10, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(11, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(12, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(13, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(14, pr_write);
+        GENERATE_WRITE_PR_REG_CASE(15, pr_write);
+    default:
+        BUG(); /* Can't happen */
+    }
+}
+#endif
+
 void __init setup_mm(void)
 {
     BUG_ON("unimplemented");
-- 
2.34.1



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	Julien Grall ,
	Bertrand Marquis ,
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Subject: [PATCH v4 5/7] arm/mpu: Introduce utility functions for the pr_t type
Date: Tue, 29 Apr 2025 16:20:55 +0100
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Introduce few utility function to manipulate and handle the
pr_t type.

Signed-off-by: Luca Fancellu 
---
v4 changes:
 - Modify comment on top of the helpers. Clarify pr_set_limit
   takes exclusive address.
   Protected common code with #ifdef Arm64 until Arm32 is ready
   with pr_t
---
 xen/arch/arm/include/asm/mpu.h | 64 ++++++++++++++++++++++++++++++++++
 1 file changed, 64 insertions(+)

diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h
index 40a86140b6cc..0e0a7f05ade9 100644
--- a/xen/arch/arm/include/asm/mpu.h
+++ b/xen/arch/arm/include/asm/mpu.h
@@ -24,6 +24,70 @@
 #define NUM_MPU_REGIONS_MASK    (NUM_MPU_REGIONS - 1)
 #define MAX_MPU_REGION_NR       255
 
+#ifndef __ASSEMBLY__
+
+#ifdef CONFIG_ARM_64
+/*
+ * Set base address of MPU protection region.
+ *
+ * @pr: pointer to the protection region structure.
+ * @base: base address as base of the protection region.
+ */
+static inline void pr_set_base(pr_t *pr, paddr_t base)
+{
+    pr->prbar.reg.base = (base >> MPU_REGION_SHIFT);
+}
+
+/*
+ * Set limit address of MPU protection region.
+ *
+ * @pr: pointer to the protection region structure.
+ * @limit: exclusive address as limit of the protection region.
+ */
+static inline void pr_set_limit(pr_t *pr, paddr_t limit)
+{
+    pr->prlar.reg.limit = ((limit - 1) >> MPU_REGION_SHIFT);
+}
+
+/*
+ * Access to get base address of MPU protection region.
+ * The base address shall be zero extended.
+ *
+ * @pr: pointer to the protection region structure.
+ * @return: Base address configured for the passed protection region.
+ */
+static inline paddr_t pr_get_base(pr_t *pr)
+{
+    return (paddr_t)(pr->prbar.reg.base << MPU_REGION_SHIFT);
+}
+
+/*
+ * Access to get limit address of MPU protection region.
+ * The limit address shall be concatenated with 0x3f.
+ *
+ * @pr: pointer to the protection region structure.
+ * @return: Inclusive limit address configured for the passed protection region.
+ */
+static inline paddr_t pr_get_limit(pr_t *pr)
+{
+    return (paddr_t)((pr->prlar.reg.limit << MPU_REGION_SHIFT)
+                     | ~MPU_REGION_MASK);
+}
+
+/*
+ * Checks if the protection region is valid (enabled).
+ *
+ * @pr: pointer to the protection region structure.
+ * @return: True if the region is valid (enabled), false otherwise.
+ */
+static inline bool region_is_valid(pr_t *pr)
+{
+    return pr->prlar.reg.en;
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+
 #endif /* __ARM_MPU_H__ */
 
 /*
-- 
2.34.1



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Cc: Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk 
Subject: [PATCH v4 1/7] docs/arm: Document Xen booting protocol on Armv8-R
Date: Tue, 29 Apr 2025 16:20:51 +0100
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Document the requirement needed to boot Xen on Armv8-R platforms.

Signed-off-by: Luca Fancellu 
---
v4 changes:
 - New patch
---
 docs/misc/arm/booting.txt | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/docs/misc/arm/booting.txt b/docs/misc/arm/booting.txt
index 21ae74837dcc..719af74f1e69 100644
--- a/docs/misc/arm/booting.txt
+++ b/docs/misc/arm/booting.txt
@@ -62,6 +62,14 @@ Xen relies on some settings the firmware has to configure in EL3 before starting
 
 * The bit SCR_EL3.HCE (resp. SCR.HCE for 32-bit ARM) must be set to 1.
 
+When Xen runs on Armv8-R, the highest exception level is EL2 and the only
+available state is secure (S) on Arm64 and non secure (NS) on Arm32, hence the
+above requirements need to be adjusted to this case:
+
+* Xen must be entered in S EL2 mode on Arm64 and in NS EL2 mode on Arm32.
+
+* Xen must be entered with MPU off and data cache disabled (SCTLR_EL2.M bit and
+  SCTLR_EL2.C set to 0).
 
 [1] linux/Documentation/arm/booting.rst
 Latest version: http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Documentation/arch/arm/booting.rst
-- 
2.34.1



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Cc: Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk 
Subject: [PATCH v4 6/7] arm/mpu: Provide a constructor for pr_t type
Date: Tue, 29 Apr 2025 16:20:56 +0100
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Provide a function that creates a pr_t object from a memory
range and some attributes.

Signed-off-by: Luca Fancellu 
---
v4 changes:
 - update helper comments
 - rename XN_EL2_ENABLED to PRBAR_EL2_XN_ENABLED
 - protected pr_of_xenaddr() with #ifdef Arm64 until Arm32
   can build with it
---
 xen/arch/arm/include/asm/arm64/mpu.h | 11 +++++
 xen/arch/arm/include/asm/mpu.h       |  4 ++
 xen/arch/arm/include/asm/mpu/mm.h    | 10 ++++
 xen/arch/arm/mpu/mm.c                | 68 ++++++++++++++++++++++++++++
 4 files changed, 93 insertions(+)

diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/asm/arm64/mpu.h
index b27fccd77550..39233b43a5aa 100644
--- a/xen/arch/arm/include/asm/arm64/mpu.h
+++ b/xen/arch/arm/include/asm/arm64/mpu.h
@@ -3,6 +3,17 @@
 #ifndef __ARM_ARM64_MPU_H__
 #define __ARM_ARM64_MPU_H__
 
+/*
+ * Excute never.
+ * Stage 1 EL2 translation regime.
+ * XN[1] determines whether execution of the instruction fetched from the MPU
+ * memory region is permitted.
+ * Stage 2 EL1/EL0 translation regime.
+ * XN[0] determines whether execution of the instruction fetched from the MPU
+ * memory region is permitted.
+ */
+#define PRBAR_EL2_XN_ENABLED  0x2
+
 #ifndef __ASSEMBLY__
 
 /* Protection Region Base Address Register */
diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h
index 0e0a7f05ade9..7b82f10d336b 100644
--- a/xen/arch/arm/include/asm/mpu.h
+++ b/xen/arch/arm/include/asm/mpu.h
@@ -24,6 +24,10 @@
 #define NUM_MPU_REGIONS_MASK    (NUM_MPU_REGIONS - 1)
 #define MAX_MPU_REGION_NR       255
 
+/* Access permission attributes. */
+/* Read/Write at EL2, No Access at EL1/EL0. */
+#define AP_RW_EL2 0x0
+
 #ifndef __ASSEMBLY__
 
 #ifdef CONFIG_ARM_64
diff --git a/xen/arch/arm/include/asm/mpu/mm.h b/xen/arch/arm/include/asm/mpu/mm.h
index e2235e568e81..296fe74c5d61 100644
--- a/xen/arch/arm/include/asm/mpu/mm.h
+++ b/xen/arch/arm/include/asm/mpu/mm.h
@@ -75,6 +75,16 @@ extern void read_protection_region(pr_t *pr_read, uint8_t sel);
  */
 extern void write_protection_region(const pr_t *pr_write, uint8_t sel);
 
+/*
+ * Creates a pr_t structure describing a protection region.
+ *
+ * @base: base address as base of the protection region.
+ * @limit: exclusive address as limit of the protection region.
+ * @attr: attribute index for the memory type.
+ * @return: pr_t structure describing a protection region.
+ */
+extern pr_t pr_of_xenaddr(paddr_t base, paddr_t limit, unsigned int attr_idx);
+
 #endif /* __ARM_MPU_MM_H__ */
 
 /*
diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c
index 40ccf99adc94..2e0aeb486ff8 100644
--- a/xen/arch/arm/mpu/mm.c
+++ b/xen/arch/arm/mpu/mm.c
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 struct page_info *frame_table;
@@ -151,6 +152,73 @@ void write_protection_region(const pr_t *pr_write, uint8_t sel)
         BUG(); /* Can't happen */
     }
 }
+
+pr_t pr_of_xenaddr(paddr_t base, paddr_t limit, unsigned int attr_idx)
+{
+    prbar_t prbar;
+    prlar_t prlar;
+    pr_t region;
+
+    /* Build up value for PRBAR_EL2. */
+    prbar = (prbar_t) {
+        .reg = {
+            .ap = AP_RW_EL2,      /* Read/Write at EL2, no access at EL1/EL0. */
+            .xn = PRBAR_EL2_XN_ENABLED,   /* No need to execute outside .text */
+        }};
+
+    switch ( attr_idx )
+    {
+    case MT_NORMAL_NC:
+        /*
+         * ARM ARM: Overlaying the shareability attribute (DDI
+         * 0406C.b B3-1376 to 1377)
+         *
+         * A memory region with a resultant memory type attribute of normal,
+         * and a resultant cacheability attribute of Inner non-cacheable,
+         * outer non-cacheable, must have a resultant shareability attribute
+         * of outer shareable, otherwise shareability is UNPREDICTABLE.
+         *
+         * On ARMv8 sharability is ignored and explicitly treated as outer
+         * shareable for normal inner non-cacheable, outer non-cacheable.
+         */
+        prbar.reg.sh = LPAE_SH_OUTER;
+        break;
+    case MT_DEVICE_nGnRnE:
+    case MT_DEVICE_nGnRE:
+        /*
+         * Shareability is ignored for non-normal memory, Outer is as
+         * good as anything.
+         *
+         * On ARMv8 sharability is ignored and explicitly treated as outer
+         * shareable for any device memory type.
+         */
+        prbar.reg.sh = LPAE_SH_OUTER;
+        break;
+    default:
+        /* Xen mappings are SMP coherent */
+        prbar.reg.sh = LPAE_SH_INNER;
+    }
+
+    /* Build up value for PRLAR_EL2. */
+    prlar = (prlar_t) {
+        .reg = {
+            .ns = 0,        /* Hyp mode is in secure world */
+            .ai = attr_idx,
+            .en = 1,        /* Region enabled */
+        }};
+
+    /* Build up MPU memory region. */
+    region = (pr_t) {
+        .prbar = prbar,
+        .prlar = prlar,
+    };
+
+    /* Set base address and limit address. */
+    pr_set_base(®ion, base);
+    pr_set_limit(®ion, limit);
+
+    return region;
+}
 #endif
 
 void __init setup_mm(void)
-- 
2.34.1



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	Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk ,
	Penny Zheng ,
	Wei Chen 
Subject: [PATCH v4 2/7] arm/mpu: Introduce MPU memory region map structure
Date: Tue, 29 Apr 2025 16:20:52 +0100
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From: Penny Zheng 

Introduce pr_t typedef which is a structure having the prbar
and prlar members, each being structured as the registers of
the aarch64 armv8-r architecture.

Signed-off-by: Penny Zheng 
Signed-off-by: Wei Chen 
Signed-off-by: Luca Fancellu 
---
Changes in v4:
 - Fixed typos, changed name for reserved bitfields, add emacs bits
   to arm64/mpu.h.
   Now base and limit are 42 bits as we consider FEAT_LPA disabled,
   since we support max 1TB of memory.
   Moved data structure in commit that uses it
---
 xen/arch/arm/include/asm/arm64/mpu.h | 50 ++++++++++++++++++++++++++++
 xen/arch/arm/include/asm/mpu.h       |  4 +++
 2 files changed, 54 insertions(+)
 create mode 100644 xen/arch/arm/include/asm/arm64/mpu.h

diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/asm/arm64/mpu.h
new file mode 100644
index 000000000000..b27fccd77550
--- /dev/null
+++ b/xen/arch/arm/include/asm/arm64/mpu.h
@@ -0,0 +1,50 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef __ARM_ARM64_MPU_H__
+#define __ARM_ARM64_MPU_H__
+
+#ifndef __ASSEMBLY__
+
+/* Protection Region Base Address Register */
+typedef union {
+    struct __packed {
+        unsigned long xn:2;       /* Execute-Never */
+        unsigned long ap:2;       /* Access Permission */
+        unsigned long sh:2;       /* Shareability */
+        unsigned long base:42;    /* Base Address */
+        unsigned long res0:16;    /* RES0 */
+    } reg;
+    uint64_t bits;
+} prbar_t;
+
+/* Protection Region Limit Address Register */
+typedef union {
+    struct __packed {
+        unsigned long en:1;     /* Region enable */
+        unsigned long ai:3;     /* Memory Attribute Index */
+        unsigned long ns:1;     /* Not-Secure */
+        unsigned long res0:1;   /* RES0 */
+        unsigned long limit:42; /* Limit Address */
+        unsigned long res1:16;  /* RES0 */
+    } reg;
+    uint64_t bits;
+} prlar_t;
+
+/* MPU Protection Region */
+typedef struct {
+    prbar_t prbar;
+    prlar_t prlar;
+} pr_t;
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __ARM_ARM64_MPU_H__ */
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h
index d4ec4248b62b..bb83f5a5f580 100644
--- a/xen/arch/arm/include/asm/mpu.h
+++ b/xen/arch/arm/include/asm/mpu.h
@@ -6,6 +6,10 @@
 #ifndef __ARM_MPU_H__
 #define __ARM_MPU_H__
 
+#if defined(CONFIG_ARM_64)
+# include 
+#endif
+
 #define MPU_REGION_SHIFT  6
 #define MPU_REGION_ALIGN  (_AC(1, UL) << MPU_REGION_SHIFT)
 #define MPU_REGION_MASK   (~(MPU_REGION_ALIGN - 1))
-- 
2.34.1



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From: Luca Fancellu 
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Cc: Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk 
Subject: [PATCH v4 3/7] arm/mpu: Provide and populate MPU C data structures
Date: Tue, 29 Apr 2025 16:20:53 +0100
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Provide some data structure in the C world to track the MPU
status, these structures will be filled at boot by the assembly
early code with the boot MPU regions and afterwards they will be
used at runtime.

Provide methods to update a bitmap created with DECLARE_BITMAP
from the assembly code for both Arm32 and Arm64.

Modify Arm64 assembly boot code to reset any unused MPU region,
initialise 'max_xen_mpumap' with the number of supported MPU
regions and modify the common asm macro 'prepare_xen_region' to
load into xen_mpumap the MPU status and set/clear the bitmap
'xen_mpumap_mask' used to track the enabled regions.

Changed parameters name from 'base', 'limit' to 'tmp1' and 'tmp2'
in order to use them also for intermediate operations on the
MPU and the bitmap C data structures, the help on top of the macro
is enough to understand how the macro will work and this will
save some registers.

Provide a stub implementation for the pr_t type and few asm
macro for the Arm32 to prevent compilation break, they will
be implemented later.

Signed-off-by: Luca Fancellu 
---
v4 changes:
 - new patch
---
 xen/arch/arm/arm64/mpu/head.S            | 13 +++++
 xen/arch/arm/include/asm/arm32/mpu.h     | 25 +++++++++
 xen/arch/arm/include/asm/bitmap-op.inc   | 67 ++++++++++++++++++++++
 xen/arch/arm/include/asm/mpu.h           |  5 ++
 xen/arch/arm/include/asm/mpu/mm.h        |  7 +++
 xen/arch/arm/include/asm/mpu/regions.inc | 71 ++++++++++++++++++++----
 xen/arch/arm/mpu/mm.c                    | 16 ++++++
 7 files changed, 194 insertions(+), 10 deletions(-)
 create mode 100644 xen/arch/arm/include/asm/arm32/mpu.h
 create mode 100644 xen/arch/arm/include/asm/bitmap-op.inc

diff --git a/xen/arch/arm/arm64/mpu/head.S b/xen/arch/arm/arm64/mpu/head.S
index 6d336cafbbaf..c0cac06b015f 100644
--- a/xen/arch/arm/arm64/mpu/head.S
+++ b/xen/arch/arm/arm64/mpu/head.S
@@ -40,6 +40,9 @@ FUNC(enable_boot_cpu_mm)
     mrs   x5, MPUIR_EL2
     and   x5, x5, #NUM_MPU_REGIONS_MASK
 
+    ldr   x0, =max_xen_mpumap
+    strb  w5, [x0]
+
     /* x0: region sel */
     mov   x0, xzr
     /* Xen text section. */
@@ -74,6 +77,16 @@ FUNC(enable_boot_cpu_mm)
     prepare_xen_region x0, x1, x2, x3, x4, x5, attr_prbar=REGION_DEVICE_PRBAR, attr_prlar=REGION_DEVICE_PRLAR
 #endif
 
+zero_mpu:
+    /* Reset remaining MPU regions */
+    cmp   x0, x5
+    beq   out_zero_mpu
+    mov   x1, #0
+    mov   x2, #1
+    prepare_xen_region x0, x1, x2, x3, x4, x5, attr_prlar=REGION_DISABLED_PRLAR
+    b     zero_mpu
+
+out_zero_mpu:
     b    enable_mpu
     ret
 END(enable_boot_cpu_mm)
diff --git a/xen/arch/arm/include/asm/arm32/mpu.h b/xen/arch/arm/include/asm/arm32/mpu.h
new file mode 100644
index 000000000000..1bdae4c309dc
--- /dev/null
+++ b/xen/arch/arm/include/asm/arm32/mpu.h
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef __ARM_ARM32_MPU_H__
+#define __ARM_ARM32_MPU_H__
+
+#ifndef __ASSEMBLY__
+
+/* MPU Protection Region */
+typedef struct {
+    uint32_t prbar;
+    uint32_t prlar;
+} pr_t;
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __ARM_ARM32_MPU_H__ */
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/arch/arm/include/asm/bitmap-op.inc b/xen/arch/arm/include/asm/bitmap-op.inc
new file mode 100644
index 000000000000..e316d9417bb9
--- /dev/null
+++ b/xen/arch/arm/include/asm/bitmap-op.inc
@@ -0,0 +1,67 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/*
+ * Sets a bit in a bitmap declared by DECLARE_BITMAP, symbol name passed through
+ * bitmap_symbol.
+ *
+ * bitmap_set_bit:      symbol of the bitmap declared by DECLARE_BITMAP
+ * bit:                 bit number to be set in the bitmap
+ * tmp1-tmp4:           temporary registers used for the computation
+ *
+ * Preserves bit.
+ * Output:
+ *  tmp1: Address of the word containing the changed bit.
+ * Clobbers: bit, tmp1, tmp2, tmp3, tmp4.
+ */
+.macro bitmap_set_bit bitmap_symbol, bit, tmp1, tmp2, tmp3, tmp4
+    adr_l   \tmp1, \bitmap_symbol
+    mov     \tmp2, #(BYTES_PER_LONG - 1)
+    mvn     \tmp2, \tmp2
+    lsr     \tmp3, \bit, #3
+    and     \tmp2, \tmp3, \tmp2
+    add     \tmp1, \tmp1, \tmp2                 // bitmap_symbol + (bit/BITS_PER_LONG)*BYTES_PER_LONG
+    and     \tmp2, \bit, #(BITS_PER_LONG - 1)   // bit offset inside word
+
+    ldr     \tmp3, [\tmp1]
+    mov     \tmp4, #1
+    lsl     \tmp4, \tmp4, \tmp2                 // (1 << offset)
+    orr     \tmp3, \tmp3, \tmp4                 // set the bit
+    str     \tmp3, [\tmp1]
+.endm
+
+/*
+ * Clears a bit in a bitmap declared by DECLARE_BITMAP, symbol name passed
+ * through bitmap_symbol.
+ *
+ * bitmap_set_bit:      symbol of the bitmap declared by DECLARE_BITMAP
+ * bit:                 bit number to be set in the bitmap
+ * tmp1-tmp4:           temporary registers used for the computation
+ *
+ * Preserves bit.
+ * Output:
+ *  tmp1: Address of the word containing the changed bit.
+ * Clobbers: bit, tmp1, tmp2, tmp3, tmp4.
+ */
+.macro bitmap_clear_bit bitmap_symbol, bit, tmp1, tmp2, tmp3, tmp4
+    adr_l   \tmp1, \bitmap_symbol
+    mov     \tmp2, #(BYTES_PER_LONG - 1)
+    mvn     \tmp2, \tmp2
+    lsr     \tmp3, \bit, #3
+    and     \tmp2, \tmp3, \tmp2
+    add     \tmp1, \tmp1, \tmp2                 // bitmap_symbol + (bit/BITS_PER_LONG)*BYTES_PER_LONG
+    and     \tmp2, \bit, #(BITS_PER_LONG - 1)   // bit offset inside word
+
+    ldr     \tmp3, [\tmp1]
+    mov     \tmp4, #1
+    lsl     \tmp4, \tmp4, \tmp2                 // (1 << offset)
+    mvn     \tmp4, \tmp4                        // ~(1 << offset)
+    and     \tmp3, \tmp3, \tmp4                 // clear the bit
+    str     \tmp3, [\tmp1]
+.endm
+
+/*
+ * Local variables:
+ * mode: ASM
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h
index bb83f5a5f580..1368b2eb990f 100644
--- a/xen/arch/arm/include/asm/mpu.h
+++ b/xen/arch/arm/include/asm/mpu.h
@@ -8,6 +8,10 @@
 
 #if defined(CONFIG_ARM_64)
 # include 
+#elif defined(CONFIG_ARM_32)
+# include 
+#else
+# error "unknown ARM variant"
 #endif
 
 #define MPU_REGION_SHIFT  6
@@ -17,6 +21,7 @@
 #define NUM_MPU_REGIONS_SHIFT   8
 #define NUM_MPU_REGIONS         (_AC(1, UL) << NUM_MPU_REGIONS_SHIFT)
 #define NUM_MPU_REGIONS_MASK    (NUM_MPU_REGIONS - 1)
+#define MAX_MPU_REGION_NR       255
 
 #endif /* __ARM_MPU_H__ */
 
diff --git a/xen/arch/arm/include/asm/mpu/mm.h b/xen/arch/arm/include/asm/mpu/mm.h
index bfd840fa5d31..28339259c458 100644
--- a/xen/arch/arm/include/asm/mpu/mm.h
+++ b/xen/arch/arm/include/asm/mpu/mm.h
@@ -8,9 +8,16 @@
 #include 
 #include 
 #include 
+#include 
 
 extern struct page_info *frame_table;
 
+extern uint8_t max_xen_mpumap;
+
+extern DECLARE_BITMAP(xen_mpumap_mask, MAX_MPU_REGION_NR);
+
+extern pr_t xen_mpumap[MAX_MPU_REGION_NR];
+
 #define virt_to_maddr(va) ((paddr_t)((vaddr_t)(va) & PADDR_MASK))
 
 #ifdef CONFIG_ARM_32
diff --git a/xen/arch/arm/include/asm/mpu/regions.inc b/xen/arch/arm/include/asm/mpu/regions.inc
index 47868a152662..dc0306f8c5fc 100644
--- a/xen/arch/arm/include/asm/mpu/regions.inc
+++ b/xen/arch/arm/include/asm/mpu/regions.inc
@@ -1,22 +1,50 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#include 
 #include 
 #include 
 
 /* Backgroud region enable/disable */
 #define SCTLR_ELx_BR    BIT(17, UL)
 
+#define REGION_DISABLED_PRLAR   0x00    /* NS=0 ATTR=000 EN=0 */
 #define REGION_NORMAL_PRLAR     0x0f    /* NS=0 ATTR=111 EN=1 */
 #define REGION_DEVICE_PRLAR     0x09    /* NS=0 ATTR=100 EN=1 */
 
+#define PRLAR_ELx_EN            0x1
+
+#ifdef CONFIG_ARM_64
+#define XEN_MPUMAP_ENTRY_SHIFT  0x4     /* 16 byte structure */
+
+.macro store_pair reg1, reg2, dst
+        stp \reg1, \reg2, [\dst]
+.endm
+
+.macro invalidate_dcache_one reg
+        dc ivac, \reg
+.endm
+
+#else
+#define XEN_MPUMAP_ENTRY_SHIFT  0x2     /* 8 byte structure */
+
+.macro store_pair reg1, reg2, dst
+        nop
+.endm
+
+.macro invalidate_dcache_one reg
+        nop
+.endm
+
+#endif
+
 /*
  * Macro to prepare and set a EL2 MPU memory region.
  * We will also create an according MPU memory region entry, which
  * is a structure of pr_t,  in table \prmap.
  *
  * sel:         region selector
- * base:        reg storing base address
- * limit:       reg storing limit address
+ * tmp1:        reg storing base address
+ * tmp2:        reg storing limit address
  * prbar:       store computed PRBAR_EL2 value
  * prlar:       store computed PRLAR_EL2 value
  * maxcount:    maximum number of EL2 regions supported
@@ -28,13 +56,13 @@
  * Preserves maxcount
  * Output:
  *  sel: Next available region selector index.
- * Clobbers base, limit, prbar, prlar
+ * Clobbers tmp1, tmp2, prbar, prlar
  *
  * Note that all parameters using registers should be distinct.
  */
-.macro prepare_xen_region, sel, base, limit, prbar, prlar, maxcount, attr_prbar=REGION_DATA_PRBAR, attr_prlar=REGION_NORMAL_PRLAR
+.macro prepare_xen_region, sel, tmp1, tmp2, prbar, prlar, maxcount, attr_prbar=REGION_DATA_PRBAR, attr_prlar=REGION_NORMAL_PRLAR
     /* Check if the region is empty */
-    cmp   \base, \limit
+    cmp   \tmp1, \tmp2
     beq   1f
 
     /* Check if the number of regions exceeded the count specified in MPUIR_EL2 */
@@ -42,20 +70,43 @@
     bge   fail_insufficient_regions
 
     /* Prepare value for PRBAR_EL2 reg and preserve it in \prbar.*/
-    and   \base, \base, #MPU_REGION_MASK
+    and   \tmp1, \tmp1, #MPU_REGION_MASK
     mov   \prbar, #\attr_prbar
-    orr   \prbar, \prbar, \base
+    orr   \prbar, \prbar, \tmp1
 
     /* Limit address should be inclusive */
-    sub   \limit, \limit, #1
-    and   \limit, \limit, #MPU_REGION_MASK
+    sub   \tmp2, \tmp2, #1
+    and   \tmp2, \tmp2, #MPU_REGION_MASK
     mov   \prlar, #\attr_prlar
-    orr   \prlar, \prlar, \limit
+    orr   \prlar, \prlar, \tmp2
 
     WRITE_SYSREG_ASM(\sel, PRSELR_EL2)
     isb
     WRITE_SYSREG_ASM(\prbar, PRBAR_EL2)
     WRITE_SYSREG_ASM(\prlar, PRLAR_EL2)
+
+    /* Load pair into xen_mpumap and invalidate cache */
+    mov   \tmp1, \sel
+    lsl   \tmp1, \tmp1, #XEN_MPUMAP_ENTRY_SHIFT
+    adr_l \tmp2, xen_mpumap
+    add   \tmp2, \tmp2, \tmp1
+    store_pair \prbar, \prlar, \tmp2
+    invalidate_dcache_one \tmp2
+
+    /* Set/clear xen_mpumap_mask bitmap */
+    tst   \prlar, #PRLAR_ELx_EN
+    bne   2f
+    // Region is disabled, clear the bit in the bitmap
+    bitmap_clear_bit xen_mpumap_mask, \sel, \tmp1, \tmp2, \prbar, \prlar
+    b     3f
+
+2:
+    // Region is enabled, set the bit in the bitmap
+    bitmap_set_bit xen_mpumap_mask, \sel, \tmp1, \tmp2, \prbar, \prlar
+
+3:
+    invalidate_dcache_one \tmp1
+
     dsb   sy
     isb
 
diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c
index 07c8959f4ee9..9eab09ff2044 100644
--- a/xen/arch/arm/mpu/mm.c
+++ b/xen/arch/arm/mpu/mm.c
@@ -7,9 +7,25 @@
 #include 
 #include 
 #include 
+#include 
 
 struct page_info *frame_table;
 
+/* Maximum number of supported MPU memory regions by the EL2 MPU. */
+uint8_t __ro_after_init max_xen_mpumap;
+
+/*
+ * Bitmap xen_mpumap_mask is to record the usage of EL2 MPU memory regions.
+ * Bit 0 represents MPU memory region 0, bit 1 represents MPU memory
+ * region 1, ..., and so on.
+ * If a MPU memory region gets enabled, set the according bit to 1.
+ */
+DECLARE_BITMAP(xen_mpumap_mask, MAX_MPU_REGION_NR) \
+    __section(".data.page_aligned");
+
+/* EL2 Xen MPU memory region mapping table. */
+pr_t __section(".data.page_aligned") xen_mpumap[MAX_MPU_REGION_NR];
+
 static void __init __maybe_unused build_assertions(void)
 {
     /*
-- 
2.34.1



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Cc: Stefano Stabellini ,
	Julien Grall ,
	Bertrand Marquis ,
	Michal Orzel ,
	Volodymyr Babchuk 
Subject: [PATCH v4 0/7] First chunk for Arm R82 and MPU support
Date: Tue, 29 Apr 2025 16:20:50 +0100
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Hi all,

This is the first chunk of work to support MPU and R82 on Xen, this serie
reaches the early boot stages just before early_fdt_map(), just to give an idea
about which stage of the boot is reached.

v4:
 - dropped setup_mpu() patch and early_fdt_map() patch (needs rework)
 - add new patches: boot protocol and early asm MPU structure update
 - general fixes listed on each patch
v3 changes:
 - stated on each patch
v2 changes for this serie:
 - rebased serie on the MPU skeleton that allow compilation
 - removed some patches already merged in the MPU skeleton

Luca Fancellu (6):
  docs/arm: Document Xen booting protocol on Armv8-R
  arm/mpu: Provide and populate MPU C data structures
  arm/mpu: Provide access to the MPU region from the C code
  arm/mpu: Introduce utility functions for the pr_t type
  arm/mpu: Provide a constructor for pr_t type
  arm/mpu: Introduce MPU memory mapping flags

Penny Zheng (1):
  arm/mpu: Introduce MPU memory region map structure

 docs/misc/arm/booting.txt                |   8 +
 xen/arch/arm/arm64/mpu/head.S            |  13 ++
 xen/arch/arm/include/asm/arm32/mpu.h     |  25 +++
 xen/arch/arm/include/asm/arm64/mpu.h     |  61 +++++++
 xen/arch/arm/include/asm/bitmap-op.inc   |  67 ++++++++
 xen/arch/arm/include/asm/mpu.h           |  78 +++++++++
 xen/arch/arm/include/asm/mpu/mm.h        |  51 ++++++
 xen/arch/arm/include/asm/mpu/regions.inc |  71 ++++++--
 xen/arch/arm/include/asm/page.h          |  25 +++
 xen/arch/arm/mpu/mm.c                    | 201 +++++++++++++++++++++++
 10 files changed, 590 insertions(+), 10 deletions(-)
 create mode 100644 xen/arch/arm/include/asm/arm32/mpu.h
 create mode 100644 xen/arch/arm/include/asm/arm64/mpu.h
 create mode 100644 xen/arch/arm/include/asm/bitmap-op.inc

-- 
2.34.1



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	Michal Orzel ,
	Volodymyr Babchuk 
Subject: [PATCH v4 7/7] arm/mpu: Introduce MPU memory mapping flags
Date: Tue, 29 Apr 2025 16:20:57 +0100
Message-Id: <20250429152057.2380536-8-luca.fancellu@arm.com>
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Introduce the MPU memory mapping flags in asm/page.h.

Signed-off-by: Luca Fancellu 
---
v4 changes:
 - no changes, I'm not sure how I can merge XN and Permission flags.
---
 xen/arch/arm/include/asm/page.h | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/xen/arch/arm/include/asm/page.h b/xen/arch/arm/include/asm/page.h
index 69f817d1e68a..22f7d2c6cb30 100644
--- a/xen/arch/arm/include/asm/page.h
+++ b/xen/arch/arm/include/asm/page.h
@@ -62,6 +62,7 @@
 
 #define MAIRVAL (MAIR1VAL << 32 | MAIR0VAL)
 
+#ifdef CONFIG_MMU
 /*
  * Layout of the flags used for updating the hypervisor page tables
  *
@@ -90,6 +91,30 @@
 #define _PAGE_CONTIG_BIT    8
 #define _PAGE_CONTIG        (1U << _PAGE_CONTIG_BIT)
 
+#else /* !CONFIG_MMU */
+
+/*
+ * Layout of the flags used for updating MPU memory region attributes
+ * [0:2] Memory attribute Index
+ * [3:4] Execute Never
+ * [5:6] Access Permission
+ * [7]   Region Present
+ */
+#define _PAGE_AI_BIT            0
+#define _PAGE_XN_BIT            3
+#define _PAGE_AP_BIT            5
+#define _PAGE_PRESENT_BIT       7
+#define _PAGE_AI                (7U << _PAGE_AI_BIT)
+#define _PAGE_XN                (2U << _PAGE_XN_BIT)
+#define _PAGE_RO                (2U << _PAGE_AP_BIT)
+#define _PAGE_PRESENT           (1U << _PAGE_PRESENT_BIT)
+#define PAGE_AI_MASK(x)         (((x) >> _PAGE_AI_BIT) & 0x7U)
+#define PAGE_XN_MASK(x)         (((x) >> _PAGE_XN_BIT) & 0x3U)
+#define PAGE_AP_MASK(x)         (((x) >> _PAGE_AP_BIT) & 0x3U)
+#define PAGE_RO_MASK(x)         (((x) >> _PAGE_AP_BIT) & 0x2U)
+
+#endif /* CONFIG_MMU */
+
 /*
  * _PAGE_DEVICE and _PAGE_NORMAL are convenience defines. They are not
  * meant to be used outside of this header.
-- 
2.34.1



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Subject: Re: [PATCH] {hyper,multi}call: further limit arguments to just 5
To: Jan Beulich ,
 "xen-devel@lists.xenproject.org" 
Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Julien Grall , Stefano Stabellini ,
 Volodymyr Babchuk ,
 Bertrand Marquis ,
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On 29/04/2025 9:16 am, Jan Beulich wrote:
> Multicall compat translation and hypercall continuation handling can
> also be shrunk to the processing of just (up to) 5 arguments.
>
> Take the opportunity to
> - make exceeding the limit noisy in hypercall_create_continuation(),
> - use speculation-safe array access in hypercall_create_continuation(),
> - avoid a Misra C:2012 Rule 19.1 violation in xlat_multicall_entry(),
> - further tidy xlat_multicall_entry() and __trace_multicall_call()
>   style-wise.
>
> Amends: 2f531c122e95 ("x86: limit number of hypercall parameters to 5")
> Signed-off-by: Jan Beulich 

Acked-by: Andrew Cooper 

> ---
> hypercall_xlat_continuation() uses BUG() when encountering too large an
> argument count in release builds, but I think that's too harsh. Hence in
> hypercall_create_continuation() I'm re-using the existing error path.
> Interestingly the multicall part of hypercall_xlat_continuation() has no
> check at all which would cover release builds.

This has never been the best of code.  All we can do is improve it
moving forward.

>
> With gcc14 code size grows according to my observation, due to the loops
> in xlat_multicall_entry() and __trace_multicall_call() both being
> unrolled now.

With GCC-12, it gets marginally smaller.  The loops are unrolled and the
instruction scheduling is rather odd.

mov    0x208(%r15),%rax
mov    0x228(%r15),%rdx
mov    %eax,0x1c(%rsp)
mov    0x210(%r15),%rax
mov    %edx,0x2c(%rsp)
mov    %eax,0x20(%rsp)
mov    0x218(%r15),%rax
mov    0x1c(%rsp),%rsi
mov    %edx,0x210(%r15)
mov    %eax,0x24(%rsp)
mov    0x220(%r15),%rax
mov    %rsi,0x200(%r15)
mov    %eax,0x28(%rsp)
mov    0x24(%rsp),%rsi
mov    %rsi,0x208(%r15)

This is the interleaved copy onto the stack, and back off.

Weirdly, we're doing 8 byte loads and 4 byte stores to copy on to the
stack.  It's not wrong per say, but it's also not necessary.

Then, for the copy-off, there is an overlapping store:

mov    %edx,0x210(%r15)

and

mov    %rsi,0x208(%r15)

not to mention this:

mov    %eax,0x28(%rsp)
mov    0x24(%rsp),%rsi

using an overlapping store and wider load for the copy-off.

Anyway - it looks to function correctly, but I don't exactly feel as if
the optimiser has done a great job.

~Andrew


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Subject: Re: [PATCH v4 11/15] xen/x86: implement EPP support for the amd-cppc
 driver in active mode
To: Penny Zheng 
Cc: ray.huang@amd.com, Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <20250414074056.3696888-1-Penny.Zheng@amd.com>
 <20250414074056.3696888-12-Penny.Zheng@amd.com>
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On 14.04.2025 09:40, Penny Zheng wrote:
> --- a/docs/misc/xen-command-line.pandoc
> +++ b/docs/misc/xen-command-line.pandoc
> @@ -515,7 +515,7 @@ If set, force use of the performance counters for oprofile, rather than detectin
>  available support.
>  
>  ### cpufreq
> -> `= none | {{  | xen } { [:[powersave|performance|ondemand|userspace][,[]][,[]]] } [,verbose]} | dom0-kernel | hwp[:[][,verbose]] | amd-cppc[:[verbose]]`
> +> `= none | {{  | xen } { [:[powersave|performance|ondemand|userspace][,[]][,[]]] } [,verbose]} | dom0-kernel | hwp[:[][,verbose]] | amd-cppc[:[active][,verbose]]`
>  
>  > Default: `xen`
>  
> @@ -537,6 +537,12 @@ choice of `dom0-kernel` is deprecated and not supported by all Dom0 kernels.
>  * `amd-cppc` selects ACPI Collaborative Performance and Power Control (CPPC)
>    on supported AMD hardware to provide finer grained frequency control
>    mechanism. The default is disabled.
> +* `active` is to enable amd-cppc driver in active(autonomous) mode. In this
> +  mode, users could write to energy performance preference register(epp) to
> +  tell hardware if they want to bias toward performance or energy efficiency.
> +  Then built-in CPPC power algorithm will calculate the runtime workload and
> +  adjust cores frequency automatically according to the power supply, thermal,
> +  core voltage and some other hardware conditions.

This section of the cmdline doc may not be of the best quality, but may I
nevertheless ask that for this new sub-option you make explicit what the
default is (and that it's of boolean nature)?

> @@ -434,12 +464,82 @@ static int cf_check amd_cppc_cpufreq_cpu_init(struct cpufreq_policy *policy)
>  
>      amd_cppc_boost_init(policy, data);
>  
> +    return 0;
> +}
> +
> +static int cf_check amd_cppc_cpufreq_cpu_init(struct cpufreq_policy *policy)
> +{
> +    int ret;
> +
> +    ret = amd_cppc_cpufreq_init_perf(policy);
> +    if ( ret )
> +        return ret;
> +
>      amd_cppc_verbose(policy->cpu,
>                       "CPU initialized with amd-cppc passive mode\n");
>  
>      return 0;
>  }
>  
> +static int cf_check amd_cppc_epp_cpu_init(struct cpufreq_policy *policy)
> +{
> +    int ret;
> +
> +    ret = amd_cppc_cpufreq_init_perf(policy);
> +    if ( ret )
> +        return ret;
> +
> +    policy->policy = cpufreq_policy_from_governor(policy->governor);

This is the init part, which is fine. What if the governor is being changed,
though? The struct field is new, and there's no other place I can spot where
it would be adjusted.

> --- a/xen/arch/x86/include/asm/msr-index.h
> +++ b/xen/arch/x86/include/asm/msr-index.h
> @@ -242,6 +242,7 @@
>  #define MSR_AMD_CPPC_ENABLE                 0xc00102b1U
>  #define  AMD_CPPC_ENABLE                    (_AC(1, ULL) <<  0)
>  #define MSR_AMD_CPPC_REQ                    0xc00102b3U
> +#define  AMD_CPPC_EPP_MASK                  (_AC(0xff, ULL) <<  24)

Nit: Excess blank after << (there's no such issue with AMD_CPPC_ENABLE,
ftaod).

Jan


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From: Greg Kroah-Hartman 
To: stable@vger.kernel.org
Cc: Greg Kroah-Hartman ,
	patches@lists.linux.dev,
	Juergen Gross ,
	Stefano Stabellini ,
	Oleksandr Tyshchenko ,
	xen-devel@lists.xenproject.org,
	Kees Cook ,
	Sasha Levin 
Subject: [PATCH 5.4 010/179] xen/mcelog: Add __nonstring annotations for unterminated strings
Date: Tue, 29 Apr 2025 18:39:11 +0200
Message-ID: <20250429161049.810888896@linuxfoundation.org>
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5.4-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Kees Cook 

[ Upstream commit 1c3dfc7c6b0f551fdca3f7c1f1e4c73be8adb17d ]

When a character array without a terminating NUL character has a static
initializer, GCC 15's -Wunterminated-string-initialization will only
warn if the array lacks the "nonstring" attribute[1]. Mark the arrays
with __nonstring to and correctly identify the char array as "not a C
string" and thereby eliminate the warning.

Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117178 [1]
Cc: Juergen Gross 
Cc: Stefano Stabellini 
Cc: Oleksandr Tyshchenko 
Cc: xen-devel@lists.xenproject.org
Signed-off-by: Kees Cook 
Acked-by: Juergen Gross 
Message-ID: <20250310222234.work.473-kees@kernel.org>
Signed-off-by: Juergen Gross 
Signed-off-by: Sasha Levin 
---
 include/xen/interface/xen-mca.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/xen/interface/xen-mca.h b/include/xen/interface/xen-mca.h
index 73a4ea714d937..5db6116cd042c 100644
--- a/include/xen/interface/xen-mca.h
+++ b/include/xen/interface/xen-mca.h
@@ -365,7 +365,7 @@ struct xen_mce {
 #define XEN_MCE_LOG_LEN 32
 
 struct xen_mce_log {
-	char signature[12]; /* "MACHINECHECK" */
+	char signature[12] __nonstring; /* "MACHINECHECK" */
 	unsigned len;	    /* = XEN_MCE_LOG_LEN */
 	unsigned next;
 	unsigned flags;
-- 
2.39.5





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From: Greg Kroah-Hartman 
To: stable@vger.kernel.org
Cc: Greg Kroah-Hartman ,
	patches@lists.linux.dev,
	Juergen Gross ,
	Stefano Stabellini ,
	Oleksandr Tyshchenko ,
	xen-devel@lists.xenproject.org,
	Kees Cook ,
	Sasha Levin 
Subject: [PATCH 5.10 015/286] xen/mcelog: Add __nonstring annotations for unterminated strings
Date: Tue, 29 Apr 2025 18:38:39 +0200
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5.10-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Kees Cook 

[ Upstream commit 1c3dfc7c6b0f551fdca3f7c1f1e4c73be8adb17d ]

When a character array without a terminating NUL character has a static
initializer, GCC 15's -Wunterminated-string-initialization will only
warn if the array lacks the "nonstring" attribute[1]. Mark the arrays
with __nonstring to and correctly identify the char array as "not a C
string" and thereby eliminate the warning.

Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117178 [1]
Cc: Juergen Gross 
Cc: Stefano Stabellini 
Cc: Oleksandr Tyshchenko 
Cc: xen-devel@lists.xenproject.org
Signed-off-by: Kees Cook 
Acked-by: Juergen Gross 
Message-ID: <20250310222234.work.473-kees@kernel.org>
Signed-off-by: Juergen Gross 
Signed-off-by: Sasha Levin 
---
 include/xen/interface/xen-mca.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/xen/interface/xen-mca.h b/include/xen/interface/xen-mca.h
index 7483a78d24251..20a3b320d1a58 100644
--- a/include/xen/interface/xen-mca.h
+++ b/include/xen/interface/xen-mca.h
@@ -371,7 +371,7 @@ struct xen_mce {
 #define XEN_MCE_LOG_LEN 32
 
 struct xen_mce_log {
-	char signature[12]; /* "MACHINECHECK" */
+	char signature[12] __nonstring; /* "MACHINECHECK" */
 	unsigned len;	    /* = XEN_MCE_LOG_LEN */
 	unsigned next;
 	unsigned flags;
-- 
2.39.5





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Message-ID: <2186ab44-eb9a-48f2-9798-c5711349d2dc@amd.com>
Date: Tue, 29 Apr 2025 18:11:00 +0100
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v4 1/7] docs/arm: Document Xen booting protocol on Armv8-R
Content-Language: en-GB
To: Luca Fancellu , xen-devel@lists.xenproject.org
Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk 
References: <20250429152057.2380536-1-luca.fancellu@arm.com>
 <20250429152057.2380536-2-luca.fancellu@arm.com>
From: Ayan Kumar Halder 
In-Reply-To: <20250429152057.2380536-2-luca.fancellu@arm.com>
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Hi Luca,

On 29/04/2025 16:20, Luca Fancellu wrote:
> CAUTION: This message has originated from an External Source. Please use proper judgment and caution when opening attachments, clicking links, or responding to this email.
>
>
> Document the requirement needed to boot Xen on Armv8-R platforms.
>
> Signed-off-by: Luca Fancellu 
Reviewed-by: Ayan Kumar Halder 
> ---
> v4 changes:
>   - New patch
> ---
>   docs/misc/arm/booting.txt | 8 ++++++++
>   1 file changed, 8 insertions(+)
>
> diff --git a/docs/misc/arm/booting.txt b/docs/misc/arm/booting.txt
> index 21ae74837dcc..719af74f1e69 100644
> --- a/docs/misc/arm/booting.txt
> +++ b/docs/misc/arm/booting.txt
> @@ -62,6 +62,14 @@ Xen relies on some settings the firmware has to configure in EL3 before starting
>
>   * The bit SCR_EL3.HCE (resp. SCR.HCE for 32-bit ARM) must be set to 1.
>
> +When Xen runs on Armv8-R, the highest exception level is EL2 and the only
> +available state is secure (S) on Arm64 and non secure (NS) on Arm32, hence the
> +above requirements need to be adjusted to this case:
> +
> +* Xen must be entered in S EL2 mode on Arm64 and in NS EL2 mode on Arm32.
> +
> +* Xen must be entered with MPU off and data cache disabled (SCTLR_EL2.M bit and
> +  SCTLR_EL2.C set to 0).
>
>   [1] linux/Documentation/arm/booting.rst
>   Latest version: http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Documentation/arch/arm/booting.rst
> --
> 2.34.1
>
- Ayan


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Message-ID: <2cfb5c97-4885-4a24-b77c-5953d9cb6245@amd.com>
Date: Tue, 29 Apr 2025 18:16:29 +0100
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v4 6/7] arm/mpu: Provide a constructor for pr_t type
Content-Language: en-GB
To: Luca Fancellu , xen-devel@lists.xenproject.org
Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
 Michal Orzel ,
 Volodymyr Babchuk 
References: <20250429152057.2380536-1-luca.fancellu@arm.com>
 <20250429152057.2380536-7-luca.fancellu@arm.com>
From: Ayan Kumar Halder 
In-Reply-To: <20250429152057.2380536-7-luca.fancellu@arm.com>
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Hi Luca,

On 29/04/2025 16:20, Luca Fancellu wrote:
> CAUTION: This message has originated from an External Source. Please use proper judgment and caution when opening attachments, clicking links, or responding to this email.
>
>
> Provide a function that creates a pr_t object from a memory
> range and some attributes.
>
> Signed-off-by: Luca Fancellu 
> ---
> v4 changes:
>   - update helper comments
>   - rename XN_EL2_ENABLED to PRBAR_EL2_XN_ENABLED
>   - protected pr_of_xenaddr() with #ifdef Arm64 until Arm32
>     can build with it
> ---
>   xen/arch/arm/include/asm/arm64/mpu.h | 11 +++++
>   xen/arch/arm/include/asm/mpu.h       |  4 ++
>   xen/arch/arm/include/asm/mpu/mm.h    | 10 ++++
>   xen/arch/arm/mpu/mm.c                | 68 ++++++++++++++++++++++++++++
>   4 files changed, 93 insertions(+)
>
> diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/asm/arm64/mpu.h
> index b27fccd77550..39233b43a5aa 100644
> --- a/xen/arch/arm/include/asm/arm64/mpu.h
> +++ b/xen/arch/arm/include/asm/arm64/mpu.h
> @@ -3,6 +3,17 @@
>   #ifndef __ARM_ARM64_MPU_H__
>   #define __ARM_ARM64_MPU_H__
>
> +/*
> + * Excute never.
> + * Stage 1 EL2 translation regime.
> + * XN[1] determines whether execution of the instruction fetched from the MPU
> + * memory region is permitted.
> + * Stage 2 EL1/EL0 translation regime.
> + * XN[0] determines whether execution of the instruction fetched from the MPU
> + * memory region is permitted.
> + */
> +#define PRBAR_EL2_XN_ENABLED  0x2
> +
>   #ifndef __ASSEMBLY__
>
>   /* Protection Region Base Address Register */
> diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h
> index 0e0a7f05ade9..7b82f10d336b 100644
> --- a/xen/arch/arm/include/asm/mpu.h
> +++ b/xen/arch/arm/include/asm/mpu.h
> @@ -24,6 +24,10 @@
>   #define NUM_MPU_REGIONS_MASK    (NUM_MPU_REGIONS - 1)
>   #define MAX_MPU_REGION_NR       255
>
> +/* Access permission attributes. */
> +/* Read/Write at EL2, No Access at EL1/EL0. */
> +#define AP_RW_EL2 0x0
> +
>   #ifndef __ASSEMBLY__
>
>   #ifdef CONFIG_ARM_64
> diff --git a/xen/arch/arm/include/asm/mpu/mm.h b/xen/arch/arm/include/asm/mpu/mm.h
> index e2235e568e81..296fe74c5d61 100644
> --- a/xen/arch/arm/include/asm/mpu/mm.h
> +++ b/xen/arch/arm/include/asm/mpu/mm.h
> @@ -75,6 +75,16 @@ extern void read_protection_region(pr_t *pr_read, uint8_t sel);
>    */
>   extern void write_protection_region(const pr_t *pr_write, uint8_t sel);
>
> +/*
> + * Creates a pr_t structure describing a protection region.
> + *
> + * @base: base address as base of the protection region.
> + * @limit: exclusive address as limit of the protection region.
> + * @attr: attribute index for the memory type.
> + * @return: pr_t structure describing a protection region.
> + */
> +extern pr_t pr_of_xenaddr(paddr_t base, paddr_t limit, unsigned int attr_idx);
> +
>   #endif /* __ARM_MPU_MM_H__ */
>
>   /*
> diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c
> index 40ccf99adc94..2e0aeb486ff8 100644
> --- a/xen/arch/arm/mpu/mm.c
> +++ b/xen/arch/arm/mpu/mm.c
> @@ -9,6 +9,7 @@
>   #include 
>   #include 
>   #include 
> +#include 
>   #include 
>
>   struct page_info *frame_table;
> @@ -151,6 +152,73 @@ void write_protection_region(const pr_t *pr_write, uint8_t sel)
>           BUG(); /* Can't happen */
>       }
>   }
> +
> +pr_t pr_of_xenaddr(paddr_t base, paddr_t limit, unsigned int attr_idx)
> +{
> +    prbar_t prbar;
> +    prlar_t prlar;
> +    pr_t region;
> +
> +    /* Build up value for PRBAR_EL2. */
> +    prbar = (prbar_t) {
> +        .reg = {
> +            .ap = AP_RW_EL2,      /* Read/Write at EL2, no access at EL1/EL0. */
> +            .xn = PRBAR_EL2_XN_ENABLED,   /* No need to execute outside .text */
> +        }};
> +
> +    switch ( attr_idx )
> +    {
> +    case MT_NORMAL_NC:
> +        /*
> +         * ARM ARM: Overlaying the shareability attribute (DDI
> +         * 0406C.b B3-1376 to 1377)
> +         *
> +         * A memory region with a resultant memory type attribute of normal,
> +         * and a resultant cacheability attribute of Inner non-cacheable,
> +         * outer non-cacheable, must have a resultant shareability attribute
> +         * of outer shareable, otherwise shareability is UNPREDICTABLE.
> +         *
> +         * On ARMv8 sharability is ignored and explicitly treated as outer
> +         * shareable for normal inner non-cacheable, outer non-cacheable.
> +         */
> +        prbar.reg.sh = LPAE_SH_OUTER;
> +        break;
> +    case MT_DEVICE_nGnRnE:
> +    case MT_DEVICE_nGnRE:
> +        /*
> +         * Shareability is ignored for non-normal memory, Outer is as
> +         * good as anything.
> +         *
> +         * On ARMv8 sharability is ignored and explicitly treated as outer
> +         * shareable for any device memory type.
> +         */
> +        prbar.reg.sh = LPAE_SH_OUTER;
> +        break;
> +    default:
> +        /* Xen mappings are SMP coherent */
> +        prbar.reg.sh = LPAE_SH_INNER;
> +    }
> +
> +    /* Build up value for PRLAR_EL2. */
> +    prlar = (prlar_t) {
> +        .reg = {
#ifdef CONFIG_ARM_64
> +            .ns = 0,        /* Hyp mode is in secure world */
#endif
> +            .ai = attr_idx,
> +            .en = 1,        /* Region enabled */
> +        }};
> +
> +    /* Build up MPU memory region. */
> +    region = (pr_t) {
> +        .prbar = prbar,
> +        .prlar = prlar,
> +    };
> +
> +    /* Set base address and limit address. */
> +    pr_set_base(®ion, base);
> +    pr_set_limit(®ion, limit);
> +
> +    return region;
> +}
>   #endif
>
>   void __init setup_mm(void)
> --
> 2.34.1
>
>
- Ayan


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Subject: Re: [PATCH v4 01/15] x86/msr: Add missing includes of 
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Cc: LKML , kvm@vger.kernel.org,
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On 4/29/2025 2:45 AM, Ilpo Järvinen wrote:
> On Sun, 27 Apr 2025, Xin Li (Intel) wrote:
> 
>> For some reason, there are some TSC-related functions in the MSR
>> header even though there is a tsc.h header.
>>
>> To facilitate the relocation of rdtsc{,_ordered}() from 
>> to  and to eventually eliminate the inclusion of
>>  in , add  to the source files that
>> reference definitions from .
>>
>> Signed-off-by: Xin Li (Intel) 
>> Acked-by: Dave Hansen 
>> Acked-by: Peter Zijlstra (Intel) 
>> ---
>>
>> Change in v4:
>> *) Add missing includes in a different patch (Ilpo Järvinen).
>> *) Add all necessary direct inclusions for msr.h (Ilpo Järvinen).
>>
>> Change in v3:
>> * Add a problem statement to the changelog (Dave Hansen).
>> ---
>>   arch/x86/events/msr.c                                         | 3 +++
>>   arch/x86/events/perf_event.h                                  | 1 +
>>   arch/x86/events/probe.c                                       | 2 ++
> 
> Under arch/x86/events/ a few files seem to be missing the include?
> 
>>   arch/x86/hyperv/ivm.c                                         | 1 +
> 
> Also under hyperv/ not all files are covered but I'm a bit hesitant to
> suggest a change there since I'm not sure if they (hypervisors) do
> something special w.r.t. msr.
> 
>>   arch/x86/include/asm/fred.h                                   | 1 +
>>   arch/x86/include/asm/microcode.h                              | 2 ++
>>   arch/x86/include/asm/mshyperv.h                               | 1 +
>>   arch/x86/include/asm/msr.h                                    | 1 +
>>   arch/x86/include/asm/suspend_32.h                             | 1 +
>>   arch/x86/include/asm/suspend_64.h                             | 1 +
>>   arch/x86/include/asm/switch_to.h                              | 2 ++
> 
> arch/x86/kernel/acpi/ ?
> acrh/x86/kernel/cet.c ?
> ...
> 
> There seem to be quite many under arch/x86/ that still don't have it, I
> didn't list them all as there were so many after this point.
> 
> But that's up to x86 maintainers how throughout they want you to be.
> 
> This command may be helpful to exclude the files which already have the
> include so you can focus on the ones that may still be missing it:
> 
> git grep -l -e rdmsr -e wrmsr | grep -v -f <(git grep -l -e 'asm/msr\.h')
> 
>>   arch/x86/kernel/cpu/resctrl/pseudo_lock.c                     | 1 +
>>   arch/x86/kernel/fpu/xstate.h                                  | 1 +
>>   arch/x86/kernel/hpet.c                                        | 1 +
>>   arch/x86/kernel/process_64.c                                  | 1 +
>>   arch/x86/kernel/trace_clock.c                                 | 2 +-
>>   arch/x86/kernel/tsc_sync.c                                    | 1 +
>>   arch/x86/lib/kaslr.c                                          | 2 +-
>>   arch/x86/mm/mem_encrypt_identity.c                            | 1 +
>>   arch/x86/realmode/init.c                                      | 1 +
>>   drivers/acpi/acpi_extlog.c                                    | 1 +
>>   drivers/acpi/processor_perflib.c                              | 1 +
>>   drivers/acpi/processor_throttling.c                           | 3 ++-
>>   drivers/char/agp/nvidia-agp.c                                 | 1 +
>>   drivers/cpufreq/amd-pstate-ut.c                               | 2 ++
>>   drivers/crypto/ccp/sev-dev.c                                  | 1 +
>>   drivers/edac/amd64_edac.c                                     | 1 +
>>   drivers/edac/ie31200_edac.c                                   | 1 +
>>   drivers/edac/mce_amd.c                                        | 1 +
>>   drivers/hwmon/hwmon-vid.c                                     | 4 ++++
>>   drivers/idle/intel_idle.c                                     | 1 +
>>   drivers/misc/cs5535-mfgpt.c                                   | 1 +
>>   drivers/net/vmxnet3/vmxnet3_drv.c                             | 4 ++++
>>   drivers/platform/x86/intel/ifs/core.c                         | 1 +
>>   drivers/platform/x86/intel/ifs/load.c                         | 1 +
>>   drivers/platform/x86/intel/ifs/runtest.c                      | 1 +
>>   drivers/platform/x86/intel/pmc/cnp.c                          | 1 +
>>   drivers/platform/x86/intel/speed_select_if/isst_if_common.c   | 1 +
>>   drivers/platform/x86/intel/speed_select_if/isst_if_mbox_msr.c | 1 +
>>   drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c   | 1 +
>>   drivers/platform/x86/intel/turbo_max_3.c                      | 1 +
>>   .../platform/x86/intel/uncore-frequency/uncore-frequency.c    | 1 +
>>   drivers/powercap/intel_rapl_common.c                          | 1 +
>>   drivers/powercap/intel_rapl_msr.c                             | 1 +
>>   .../thermal/intel/int340x_thermal/processor_thermal_device.c  | 1 +
>>   drivers/thermal/intel/intel_tcc_cooling.c                     | 1 +
>>   drivers/thermal/intel/x86_pkg_temp_thermal.c                  | 1 +
>>   drivers/video/fbdev/geode/display_gx.c                        | 1 +
>>   drivers/video/fbdev/geode/gxfb_core.c                         | 1 +
>>   drivers/video/fbdev/geode/lxfb_ops.c                          | 1 +
> 
> Under drivers/ this looked pretty complete. Nice work.
> 
> Acked-by: Ilpo Järvinen  # for pdx86

Thanks a lot!


> 
> I also noticed these files might not need to include msr.h:
> 
> drivers/cpufreq/elanfreq.c
> drivers/cpufreq/sc520_freq.c
> drivers/accel/habanalabs/common/habanalabs_ioctl.c
> 
> ...so if you want, you may consider optionally adding a cleanup patch to
> remove the include from them.
> 
>> --- a/drivers/video/fbdev/geode/gxfb_core.c
>> +++ b/drivers/video/fbdev/geode/gxfb_core.c
>> @@ -30,6 +30,7 @@
>>   #include 
>>   
>>   #include 
>> +#include 
> 
> In wrong order.
>>   
>>   #include "gxfb.h"
> 

I am more than happy to send v4A to address all your comments.


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From: Greg Kroah-Hartman 
To: stable@vger.kernel.org
Cc: Greg Kroah-Hartman ,
	patches@lists.linux.dev,
	Juergen Gross ,
	Stefano Stabellini ,
	Oleksandr Tyshchenko ,
	xen-devel@lists.xenproject.org,
	Kees Cook ,
	Sasha Levin 
Subject: [PATCH 5.15 016/373] xen/mcelog: Add __nonstring annotations for unterminated strings
Date: Tue, 29 Apr 2025 18:38:13 +0200
Message-ID: <20250429161123.800570162@linuxfoundation.org>
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5.15-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Kees Cook 

[ Upstream commit 1c3dfc7c6b0f551fdca3f7c1f1e4c73be8adb17d ]

When a character array without a terminating NUL character has a static
initializer, GCC 15's -Wunterminated-string-initialization will only
warn if the array lacks the "nonstring" attribute[1]. Mark the arrays
with __nonstring to and correctly identify the char array as "not a C
string" and thereby eliminate the warning.

Link: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117178 [1]
Cc: Juergen Gross 
Cc: Stefano Stabellini 
Cc: Oleksandr Tyshchenko 
Cc: xen-devel@lists.xenproject.org
Signed-off-by: Kees Cook 
Acked-by: Juergen Gross 
Message-ID: <20250310222234.work.473-kees@kernel.org>
Signed-off-by: Juergen Gross 
Signed-off-by: Sasha Levin 
---
 include/xen/interface/xen-mca.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/xen/interface/xen-mca.h b/include/xen/interface/xen-mca.h
index 7483a78d24251..20a3b320d1a58 100644
--- a/include/xen/interface/xen-mca.h
+++ b/include/xen/interface/xen-mca.h
@@ -371,7 +371,7 @@ struct xen_mce {
 #define XEN_MCE_LOG_LEN 32
 
 struct xen_mce_log {
-	char signature[12]; /* "MACHINECHECK" */
+	char signature[12] __nonstring; /* "MACHINECHECK" */
 	unsigned len;	    /* = XEN_MCE_LOG_LEN */
 	unsigned next;
 	unsigned flags;
-- 
2.39.5





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From: Linus Torvalds 
Date: Tue, 29 Apr 2025 11:05:18 -0700
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Subject: Re: [PATCH] bitops/32: Convert variable_ffs() and fls() zero-case
 handling to C
To: Andrew Cooper 
Cc: "H. Peter Anvin" , Ingo Molnar , Arnd Bergmann , 
	Arnd Bergmann , Thomas Gleixner , Ingo Molnar , 
	Borislav Petkov , Dave Hansen , x86@kernel.org, 
	Juergen Gross , Boris Ostrovsky , 
	Alexander Usyskin , 
	Greg Kroah-Hartman , =?UTF-8?Q?Mateusz_Jo=C5=84czyk?= , 
	Mike Rapoport , Ard Biesheuvel , Peter Zijlstra , 
	linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org
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On Tue, 29 Apr 2025 at 07:38, Andrew Cooper  wrote:
>
> I tried that.  (The thread started as a question around
> __builtin_constant_p() but did grow to cover __builtin_ffs().)

Maybe we could do something like

   #define ffs(x) \
        (statically_true((x) != 0) ? __ffs(x)+1 : __builtin_ffs(x))

which uses our "statically_true()" helper that is actually fairly good
at the whole "let the compiler tell us that it knows that value cannot
be zero"

I didn't check what code that generated, but I've seen gcc do well on
that statically_true() thing in the past.

Then we can just remove our current variable_ffs() thing entirely,
because we now depend on our (good) __ffs() and the builtin being
"good enough" for the bad case.

(And do the same thing for fls() too, of course)

               Linus


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Subject: Re: [PATCH] bitops/32: Convert variable_ffs() and fls() zero-case
 handling to C
To: Linus Torvalds 
Cc: "H. Peter Anvin" , Ingo Molnar ,
 Arnd Bergmann , Arnd Bergmann ,
 Thomas Gleixner , Ingo Molnar ,
 Borislav Petkov , Dave Hansen ,
 x86@kernel.org, Juergen Gross ,
 Boris Ostrovsky ,
 Alexander Usyskin ,
 Greg Kroah-Hartman ,
 =?UTF-8?Q?Mateusz_Jo=C5=84czyk?= ,
 Mike Rapoport , Ard Biesheuvel ,
 Peter Zijlstra , linux-kernel@vger.kernel.org,
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On 29/04/2025 7:05 pm, Linus Torvalds wrote:
> On Tue, 29 Apr 2025 at 07:38, Andrew Cooper  wrote:
>> I tried that.  (The thread started as a question around
>> __builtin_constant_p() but did grow to cover __builtin_ffs().)
> Maybe we could do something like
>
>    #define ffs(x) \
>         (statically_true((x) != 0) ? __ffs(x)+1 : __builtin_ffs(x))
>
> which uses our "statically_true()" helper that is actually fairly good
> at the whole "let the compiler tell us that it knows that value cannot
> be zero"
>
> I didn't check what code that generated, but I've seen gcc do well on
> that statically_true() thing in the past.
>
> Then we can just remove our current variable_ffs() thing entirely,
> because we now depend on our (good) __ffs() and the builtin being
> "good enough" for the bad case.

That would improve code generation for 32bit, but generally regress 64bit.

Preloading the destination register with -1 is better than the CMOV form
emitted by the builtin; BSF's habit of conditionally not writing the
destination register *is* a CMOV of sorts.


When I cleaned this up in Xen, there were several factors where I
thought improvements could be made.

Having both ffs() and __ffs(), where the latter is undefined in a common
case, is a trap waiting for an unwary programmer.  I have no particular
love for ffs() being off-by-one from normal, but is well defined for all
inputs.

Also, leaving the constant folding to the arch-optimised form means that
it often gets forgotten.  Therefore, I rearranged everything to have
this be common:

static always_inline attr_const unsigned int ffs(unsigned int x)
{
    if ( __builtin_constant_p(x) )
        return __builtin_ffs(x);

#ifdef arch_ffs
    return arch_ffs(x);
#else
    return generic_ffsl(x);
#endif
}

with most architectures implementing arch_ffs as:

#define arch_ffs(x) ((x) ? 1 + __builtin_ctz(x) : 0)

and x86 as:

static always_inline unsigned int arch_ffs(unsigned int x)
{
    unsigned int r;

    if ( __builtin_constant_p(x > 0) && x > 0 )
    {
        /*
         * A common code pattern is:
         *
         *     while ( bits )
         *     {
         *         bit = ffs(bits);
         *         ...
         *
         * and the optimiser really can work with the knowledge of x being
         * non-zero without knowing it's exact value, in which case we don't
         * need to compensate for BSF's corner cases.  Otherwise...
         */
        asm ( "bsf %[val], %[res]"
              : [res] "=r" (r)
              : [val] "rm" (x) );
    }
    else
    {
        /*
         * ... the AMD manual states that BSF won't modify the destination
         * register if x=0.  The Intel manual states that the result is
         * undefined, but the architects have said that the register is
         * written back with it's old value (zero extended as normal).
         */
        asm ( "bsf %[val], %[res]"
              : [res] "=r" (r)
              : [val] "rm" (x), "[res]" (-1) );
    }

    return r + 1;
}
#define arch_ffs arch_ffs

and finally, providing compatibility for the other forms as:

#define __ffs(x) (ffs(x) - 1)


The end result is fewer APIs to implement in arch-specific code, and the
removal of undefined behaviour.

That said, I don't envy anyone wanting to try and untangle this in
Linux, even if consensus were to agree on it as an approach.

~Andrew


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From: Luca Fancellu 
To: Ayan Kumar Halder 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Michal Orzel ,
	Volodymyr Babchuk 
Subject: Re: [PATCH v4 6/7] arm/mpu: Provide a constructor for pr_t type
Thread-Topic: [PATCH v4 6/7] arm/mpu: Provide a constructor for pr_t type
Thread-Index: AQHbuRpqbs0x64sbw06OBQfYV4WEtLO64q+AgAAnyAA=
Date: Tue, 29 Apr 2025 19:39:23 +0000
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Hi Ayan,

>> diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c
>> index 40ccf99adc94..2e0aeb486ff8 100644
>> --- a/xen/arch/arm/mpu/mm.c
>> +++ b/xen/arch/arm/mpu/mm.c
>> @@ -9,6 +9,7 @@
>>  #include 
>>  #include 
>>  #include 
>> +#include 
>>  #include 
>>=20
>>  struct page_info *frame_table;
>> @@ -151,6 +152,73 @@ void write_protection_region(const pr_t *pr_write, =
uint8_t sel)
>>          BUG(); /* Can't happen */
>>      }
>>  }
>> +
>> +pr_t pr_of_xenaddr(paddr_t base, paddr_t limit, unsigned int attr_idx)
>> +{
>> +    prbar_t prbar;
>> +    prlar_t prlar;
>> +    pr_t region;
>> +
>> +    /* Build up value for PRBAR_EL2. */
>> +    prbar =3D (prbar_t) {
>> +        .reg =3D {
>> +            .ap =3D AP_RW_EL2,      /* Read/Write at EL2, no access at =
EL1/EL0. */
>> +            .xn =3D PRBAR_EL2_XN_ENABLED,   /* No need to execute outsi=
de .text */
>> +        }};
>> +
>> +    switch ( attr_idx )
>> +    {
>> +    case MT_NORMAL_NC:
>> +        /*
>> +         * ARM ARM: Overlaying the shareability attribute (DDI
>> +         * 0406C.b B3-1376 to 1377)
>> +         *
>> +         * A memory region with a resultant memory type attribute of no=
rmal,
>> +         * and a resultant cacheability attribute of Inner non-cacheabl=
e,
>> +         * outer non-cacheable, must have a resultant shareability attr=
ibute
>> +         * of outer shareable, otherwise shareability is UNPREDICTABLE.
>> +         *
>> +         * On ARMv8 sharability is ignored and explicitly treated as ou=
ter
>> +         * shareable for normal inner non-cacheable, outer non-cacheabl=
e.
>> +         */
>> +        prbar.reg.sh =3D LPAE_SH_OUTER;
>> +        break;
>> +    case MT_DEVICE_nGnRnE:
>> +    case MT_DEVICE_nGnRE:
>> +        /*
>> +         * Shareability is ignored for non-normal memory, Outer is as
>> +         * good as anything.
>> +         *
>> +         * On ARMv8 sharability is ignored and explicitly treated as ou=
ter
>> +         * shareable for any device memory type.
>> +         */
>> +        prbar.reg.sh =3D LPAE_SH_OUTER;
>> +        break;
>> +    default:
>> +        /* Xen mappings are SMP coherent */
>> +        prbar.reg.sh =3D LPAE_SH_INNER;
>> +    }
>> +
>> +    /* Build up value for PRLAR_EL2. */
>> +    prlar =3D (prlar_t) {
>> +        .reg =3D {
> #ifdef CONFIG_ARM_64
>> +            .ns =3D 0,        /* Hyp mode is in secure world */
> #endif

yes this part will be introduced by you together with the pr_t definition,
in this patch the overall pr_of_xenaddr is protected by CONFIG_ARM_64

Cheers,
Luca




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Subject: Re: [PATCH] bitops/32: Convert variable_ffs() and fls() zero-case
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To: Andrew Cooper 
Cc: "H. Peter Anvin" , Ingo Molnar , Arnd Bergmann , 
	Arnd Bergmann , Thomas Gleixner , Ingo Molnar , 
	Borislav Petkov , Dave Hansen , x86@kernel.org, 
	Juergen Gross , Boris Ostrovsky , 
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	linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org
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On Tue, 29 Apr 2025 at 12:13, Andrew Cooper  wrote:
>
> That would improve code generation for 32bit, but generally regress 64bit.
>
> Preloading the destination register with -1 is better than the CMOV form
> emitted by the builtin; BSF's habit of conditionally not writing the
> destination register *is* a CMOV of sorts.

Right you are. So we'd need to do this just for the x86-32 case. Oh
well. Ugly, but still prettier than what we have now, I guess.

         Linus


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        Andrew Cooper 
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On April 29, 2025 1:12:48 PM PDT, Linus Torvalds  wrote:
>On Tue, 29 Apr 2025 at 12:13, Andrew Cooper  wrote:
>>
>> That would improve code generation for 32bit, but generally regress 64b=
it=2E
>>
>> Preloading the destination register with -1 is better than the CMOV for=
m
>> emitted by the builtin; BSF's habit of conditionally not writing the
>> destination register *is* a CMOV of sorts=2E
>
>Right you are=2E So we'd need to do this just for the x86-32 case=2E Oh
>well=2E Ugly, but still prettier than what we have now, I guess=2E
>
>         Linus

Could you file a gcc bug? Gcc shouldn't generate worse code than inline as=
m =2E=2E=2E


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Date: Tue, 29 Apr 2025 14:52:14 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Jan Beulich 
cc: Stefano Stabellini , 
    "Ragiadakou, Xenia" , 
    Andrew Cooper , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
    jason.andryuk@amd.com, agarciav@amd.com, xen-devel@lists.xenproject.org
Subject: Re: [PATCH] xen/x86: allow Dom0 PVH to call XENMEM_exchange
In-Reply-To: <06b66971-d8db-456f-8e83-a20ff7df8f5e@suse.com>
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On Tue, 29 Apr 2025, Jan Beulich wrote:
> On 28.04.2025 22:00, Stefano Stabellini wrote:
> > On Mon, 28 Apr 2025, Jan Beulich wrote:
> >> On 25.04.2025 22:19, Stefano Stabellini wrote:
> >>> From: Xenia Ragiadakou 
> >>>
> >>> Dom0 PVH might need XENMEM_exchange when passing contiguous memory
> >>> addresses to firmware or co-processors not behind an IOMMU.
> >>
> >> I definitely don't understand the firmware part: It's subject to the
> >> same transparent P2M translations as the rest of the VM; it's just
> >> another piece of software running there.
> >>
> >> "Co-processors not behind an IOMMU" is also interesting; a more
> >> concrete scenario might be nice, yet I realize you may be limited in
> >> what you're allowed to say.
> > 
> > Sure. On AMD x86 platforms there is a co-processor called PSP running
> > TEE firmware. The PSP is not behind an IOMMU. Dom0 needs occasionally to
> > pass addresses to it.  See drivers/tee/amdtee/ and
> > include/linux/psp-tee.h in Linux.
> > 
> > This is not a new problem. On ARM we have been dealing with this kind of
> > issues for more than a decade and it is the reason why originally the
> > decision was to run Dom0 1:1 mapped on ARM. I am not suggesting to map
> > Dom0 PVH 1:1; I am only providing context and highlighting that we
> > have been lucky on x86 :-)
> > 
> > 
> >>> XENMEM_exchange was blocked for HVM/PVH DomUs, and accidentally it
> >>> impacted Dom0 PVH as well.
> >>
> >> This wasn't accidental at all, I don't think.
> > 
> > You as the original author of the patch (fae7d5be8bb) in question would
> > surely know better. But the way the commit message was written was
> > pointing toward a Dom0/DeviceModel problem:
> > 
> > "The operation's success can't be controlled by the guest, as the device
> > model may have an active mapping of the page."
> 
> It's the problem mentioned at the bottom: MFNs (in principle) are entirely
> meaningless to HVM and PVH domains. With, as you point out there, an
> apparently important exception.
> 
> >>> --- a/xen/arch/x86/mm.c
> >>> +++ b/xen/arch/x86/mm.c
> >>> @@ -4401,7 +4401,7 @@ int steal_page(
> >>>      const struct domain *owner;
> >>>      int rc;
> >>>  
> >>> -    if ( paging_mode_external(d) )
> >>> +    if ( paging_mode_external(d) && !is_hardware_domain(d) )
> >>>          return -EOPNOTSUPP;
> >>>  
> >>>      /* Grab a reference to make sure the page doesn't change under our feet */
> >>
> >> Is this (in particular the code following below here) a safe thing to do
> >> when we don't properly refcount page references from the P2M, yet? It's
> >> Dom0, yes, but even there I might see potential security implications (as
> >> top violating privacy of a guest).
> > 
> > I don't think I am following, could you please elaborate more? The
> > change I am proposing is to allow Dom0 to share its own pages to the
> > co-processor. DomUs are not in the picture. I would be happy to add
> > further restriction to that effect. Is there something else you have in
> > mind?
> 
> Once "shared" with the PSP, how would Xen know that this sharing has stopped?
> Without knowing, how could it safely give the same page to a DomU later on?
> ("Safely" in both directions: Without compromising privacy of the DomU and
> without compromising host safety / security.)

Why would Xen later assign the same page to a DomU? The page comes
from the hardware domain, which, as of today, cannot be destroyed. BTW I
realize it is a bit different, but we have been doing the same thing
with Dom0 1:1 mapped on ARM since the start of the project.

Additionally, the TEE is considered a more trusted component in the
system than the hypervisor.


> >> Furthermore cleanup_page_mappings() (called later in the function) has a
> >> PV-only aspect which would apparently need widening to PVH Dom0 then,
> >> too.
> > 
> > You are referring to:
> > 
> >         if ( d && unlikely(need_iommu_pt_sync(d)) && is_pv_domain(d) )
> >             rc = iommu_legacy_unmap(d, _dfn(mfn), 1u << PAGE_ORDER_4K);
> > 
> > is that correct?
> 
> Yes, that's what immediately caught my eye. I didn't look carefully whether
> there might be more.
> 
> >>> --- a/xen/common/memory.c
> >>> +++ b/xen/common/memory.c
> >>> @@ -794,7 +794,7 @@ static long memory_exchange(XEN_GUEST_HANDLE_PARAM(xen_memory_exchange_t) arg)
> >>>              rc = guest_physmap_add_page(d, _gfn(gpfn), mfn,
> >>>                                          exch.out.extent_order) ?: rc;
> >>>  
> >>> -            if ( !paging_mode_translate(d) &&
> >>> +            if ( (!paging_mode_translate(d) || is_hardware_domain(d)) &&
> >>>                   __copy_mfn_to_guest_offset(exch.out.extent_start,
> >>>                                              (i << out_chunk_order) + j,
> >>>                                              mfn) )
> >>
> >> Wait, no: A PVH domain (Dom0 or not) can't very well make use of MFNs, can
> >> it?
> > 
> > One way or another Dom0 PVH needs to know the MFN to pass it to the
> > co-processor.
> 
> I see. That's pretty odd, though. I'm then further concerned of the order of
> the chunks. At present we're rather lax, in permitting PVH and PV Dom0 the
> same upper bound. With both CPU and I/O side translation there is, in
> principle, no reason to permit any kind of contiguity. Of course there's a
> performance aspect, but that hardly matters in the specific case here. Yet at
> the same time, once we expose MFNs, contiguity will start mattering as soon
> as any piece of memory needs to be larger than PAGE_SIZE. Which means it will
> make tightening of the presently lax handling prone to regressions in this
> new behavior you're introducing. What chunk size does the PSP driver require?

I don't know. The memory returned by XENMEM_exchange is contiguous,
right? Are you worried that Xen cannot allocate the requested amount of
memory contiguously? We have been using this patch for months now and it
has been working correctly to this day.


> One further thought here: Is it really the hardware domain which is most
> logical to drive the PSP? Interaction is (just guessing) perhaps needed
> primarily when creating / managing guests? Then having the control domain
> talk to a driver in the hardware domain would make the overall picture more
> complicated.

On AMD the interactions are more related to access to hardware or
controlling other peripherals so it is a good fit for the hardware
domain.


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From: Linus Torvalds 
Date: Tue, 29 Apr 2025 14:53:31 -0700
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Subject: Re: [PATCH] bitops/32: Convert variable_ffs() and fls() zero-case
 handling to C
To: "H. Peter Anvin" 
Cc: Andrew Cooper , Ingo Molnar , 
	Arnd Bergmann , Arnd Bergmann , Thomas Gleixner , 
	Ingo Molnar , Borislav Petkov , 
	Dave Hansen , x86@kernel.org, 
	Juergen Gross , Boris Ostrovsky , 
	Alexander Usyskin , 
	Greg Kroah-Hartman , =?UTF-8?Q?Mateusz_Jo=C5=84czyk?= , 
	Mike Rapoport , Ard Biesheuvel , Peter Zijlstra , 
	linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org
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--000000000000dcb6610633f1d539
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On Tue, 29 Apr 2025 at 14:24, H. Peter Anvin  wrote:
>
> Could you file a gcc bug? Gcc shouldn't generate worse code than inline asm ...

Honestly, I've given up on that idea.

That's basically what the bug report I reported about clts was - gcc
generating worse code than inline asm.

But why would we use gcc builtins at all if we have inline asm that is
better than what som eversions of gcc generates? The inline asm works
for all versions.

Anyway, attached is a test file that seems to generate basically
"optimal" code. It's not a kernel patch, but a standalone C file for
testing with a couple of stupid test-cases to make sure that it gets
the constant argument case right, and that it optimizes the "I know
it's not zero" case.

That is why it also uses that "#if __SIZEOF_LONG__ == 4" instead of
something like CONFIG_64BIT.

So it's a proof-of-concept thing, and it does seem to be fairly simple.

The "important" parts are just the

  #define variable_ffs(x) \
        (statically_true((x)!=0) ? __ffs(x)+1 : do_variable_ffs(x))
  #define constant_ffs(x) __builtin_ffs(x)
  #define ffs(x) \
        (__builtin_constant_p(x) ? constant_ffs(x) : variable_ffs(x))

lines which end up picking the right choice. The rest is either the
"reimplement the kernel infrastructure for testing" or the trivial
do_variable_ffs() thing.

I just did

    gcc -m32 -O2 -S -fomit-frame-pointer t.c

(with, and without that -m32) and looked at the result to see that it
looks sane. No *actual* testing.


                Linus

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Subject: Re: [PATCH] bitops/32: Convert variable_ffs() and fls() zero-case
 handling to C
To: Linus Torvalds ,
 "H. Peter Anvin" 
Cc: Ingo Molnar , Arnd Bergmann ,
 Arnd Bergmann , Thomas Gleixner ,
 Ingo Molnar , Borislav Petkov ,
 Dave Hansen , x86@kernel.org,
 Juergen Gross , Boris Ostrovsky
 , Alexander Usyskin
 ,
 Greg Kroah-Hartman ,
 =?UTF-8?Q?Mateusz_Jo=C5=84czyk?= ,
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 Peter Zijlstra , linux-kernel@vger.kernel.org,
 xen-devel@lists.xenproject.org
References: <20250425141740.734030-1-arnd@kernel.org>
 
 
 
  
 
 
 <67be5eee-b67b-409a-8309-829f891b9944@citrix.com>
 <916BD58C-E6A7-495E-9A60-722E130AC7A7@zytor.com>
 
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On 29/04/2025 10:53 pm, Linus Torvalds wrote:
> I just did
>
>     gcc -m32 -O2 -S -fomit-frame-pointer t.c
>
> (with, and without that -m32) and looked at the result to see that it
> looks sane. No *actual* testing.

do_variable_ffs() doesn't quite work.

REP BSF is LZCNT, and unconditionally writes it's output operand, and
defeats the attempt to preload with -1.

Drop the REP prefix, and it should work as intended.

~Andrew


From xen-devel-bounces@lists.xenproject.org Tue Apr 29 22:00:55 2025
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Date: Tue, 29 Apr 2025 15:00:47 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Jan Beulich 
cc: Stefano Stabellini , victorm.lira@amd.com, 
    Federico Serafini , 
    Andrew Cooper , 
    Anthony PERARD , 
    Michal Orzel , Julien Grall , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
    Nicola Vetrini , 
    Bertrand Marquis , 
    xen-devel@lists.xenproject.org
Subject: Re: [PATCH v1 1/2] xen/page_alloc: address violation of Rule 14.3
In-Reply-To: 
Message-ID: 
References: <5f2e316aae4667d1fe851e68552eb881c4d5a015.1745625477.git.victorm.lira@amd.com> <3146fbf3-2ff1-48a4-b05b-37477a9a5cc5@suse.com>  
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On Tue, 29 Apr 2025, Jan Beulich wrote:
> On 29.04.2025 01:21, Stefano Stabellini wrote:
> > On Mon, 28 Apr 2025, Jan Beulich wrote:
> >> On 26.04.2025 02:00, victorm.lira@amd.com wrote:
> >>> From: Federico Serafini 
> >>>
> >>> MISRA C Rule 14.3 states that "Controlling expressions shall not be
> >>> invariant".
> >>>
> >>> Add a SAF comment to deviate the rule for build configurations without
> >>> CONFIG_LLC_COLORING enabled.
> >>
> >> I was surprised by this supposedly being the only violation. And indeed it
> >> wasn't very hard to find more. For example, we have a number of
> >> "while ( num_online_cpus() > 1 && ... )", which become compile-time
> >> constant (false) when NR_CPUS=1.
> > 
> > Uhm, I did run a special scan for this and I can confirm no other
> > violations are detected.
> 
> Because of it being only one single configuration that's being scanned. I did
> point out before that this is a problem for anyone wanting to certify the
> hypervisor in a (perhaps just slightly) different configuration.
>
> >>> --- a/xen/common/page_alloc.c
> >>> +++ b/xen/common/page_alloc.c
> >>> @@ -2038,6 +2038,7 @@ static struct page_info *alloc_color_heap_page(unsigned int memflags,
> >>>
> >>>      spin_lock(&heap_lock);
> >>>
> >>> +    /* SAF-14-safe MISRA C R14.3 condition always false without LLC_COLORING */
> >>>      for ( i = 0; i < domain_num_llc_colors(d); i++ )
> >>>      {
> >>>          unsigned long free = free_colored_pages[domain_llc_color(d, i)];
> >>
> >> Hmm, this way the deviation applies even when LLC_COLORING=y.
> > 
> > Yes but in the LLC_COLORING=y case it is harmless. Do you have something
> > else in mind?
> 
> What if, perhaps by mistake, domain_num_llc_colors() becomes constant 0 in
> yet another configuration? (I don't expect this would work, but in principle
> the comment ought to be inside an #ifdef.)
> 
> >> As to the comment wording - looks like we're pretty inconsistent with that
> >> right now. I, for one, don't think the Misra rule needs (re)stating there;
> >> the SAF index points at all the data that's needed if one cares about the
> >> specifics of the deviation.
> > 
> > Do you prefer:
> > 
> > /* SAF-14-safe */
> 
> That's too short. All I'm asking for is to drop the (imprecise) rule
> reference. Noticing only now: It being imprecise may make the comment go
> stale if we move to a newer Misra spec, as the rule number may be different
> then.

I read all your comments to this patch and suggestions, while some of
them are good, I think this patch is better left as it is.

So I'll give my Reviewed-by. If you disagree it should go in as is, I'd
ask a third Maintainer to voice their opinion.

Reviewed-by: Stefano Stabellini 


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Date: Tue, 29 Apr 2025 15:02:13 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Jan Beulich 
cc: Stefano Stabellini , victorm.lira@amd.com, 
    Nicola Vetrini , 
    Andrew Cooper , 
    Anthony PERARD , 
    Michal Orzel , Julien Grall , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
    Federico Serafini , 
    Bertrand Marquis , 
    xen-devel@lists.xenproject.org
Subject: Re: [PATCH v1 2/3] compat: address violations of MISRA C Rule 19.1
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References:  <74b0420ab20fc0204db14c0a1a4a68ed48b25a38.1745624090.git.victorm.lira@amd.com>  
 
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On Tue, 29 Apr 2025, Jan Beulich wrote:
> On 29.04.2025 01:21, Stefano Stabellini wrote:
> > On Mon, 28 Apr 2025, Jan Beulich wrote:
> >> On 26.04.2025 01:42, victorm.lira@amd.com wrote:
> >>> From: Nicola Vetrini 
> >>>
> >>> Rule 19.1 states: "An object shall not be assigned or copied
> >>> to an overlapping object". Since the "call" and "compat_call" are
> >>> fields of the same union, reading from one member and writing to
> >>> the other violates the rule, while not causing Undefined Behavior
> >>> due to their relative sizes. However, a dummy variable is used to
> >>> address the violation and prevent the future possibility of
> >>> incurring in UB.
> >>
> >> If there is such a concern, ...
> >>
> >>> --- a/xen/common/compat/multicall.c
> >>> +++ b/xen/common/compat/multicall.c
> >>> @@ -15,8 +15,13 @@ typedef int ret_t;
> >>>  static inline void xlat_multicall_entry(struct mc_state *mcs)
> >>>  {
> >>>      int i;
> >>> +    xen_ulong_t arg;
> >>> +
> >>>      for (i=0; i<6; i++)
> >>> -        mcs->compat_call.args[i] = mcs->call.args[i];
> >>> +    {
> >>> +        arg = mcs->call.args[i];
> >>> +        mcs->compat_call.args[i] = arg;
> >>> +    }
> >>>  }
> >>
> >> ... wouldn't it be of concern as well that the alternating parts of
> >> the union are still accessed in a flip-flop manner? IOW we continue to
> >> rely on the relative placement properties of the individual array
> >> elements. To eliminate such a concern, I think the resulting code would
> >> also want to be correct if iteration was swapped to work downwards.
> >>
> >> Also the scope of the temporary could certainly be the loop body rather
> >> than the entire function.
> > 
> > Wouldn't be safer to do this then?
> > 
> > static inline void xlat_multicall_entry(struct mc_state *mcs)
> > {
> >     int i;
> >     xen_ulong_t args[6];
> > 
> >     for ( i = 0; i < 6; i++ )
> >     {
> >         args[i] = mcs->call.args[i];
> >     }
> >     for ( i = 0; i < 6; i++ )
> >     {
> >         mcs->compat_call.args[i] = args[i];
> >     }
> > }
> > 
> > If you have any specific suggestions I think C code would be easier to
> > understand than English.
> 
> Kind of the above, yes, with the further remark below also taken care of.
> So ...
> 
> >> I also don't think it needs to be xen_ulong_t,
> >> but maybe using unsigned int instead wouldn't make a difference in
> >> generated code.
> > 
> > Keeping the same type as mcs->call.args[i] would seem more obviously
> > correct? Not to mention that unsigned long is what we defined as
> > register type? If we really want to avoid xen_ulong_t, then it should
> > be uintptr_t?
> > 
> > We should stick to one type to be used as register type. On ARM, we
> > defined register_t.
> 
> ... with both taken into account e.g.:
> 
>     typeof(mcs->compat_call.args[0]) args[ARRAY_SIZE(mcs->call.args)];
> 
>     for ( i = 0; i < ARRAY_SIZE(args); i++ )
>         args[i] = mcs->call.args[i];
> 
>     memcpy(mcs->compat_call.args, args, sizeof(args));
> 
> Of course there are variations possible. There also may want to be a
> BUILD_BUG_ON() to "document" both array sizes match, even if the compat
> form is auto-generated from the native one.
> 
> Tangential: As of 2f531c122e95 ("x86: limit number of hypercall parameters
> to 5") it's kind of bogus that we process 6 array elements here. This even
> extends to an assertion in hypercall_xlat_continuation() and to some of
> the handling in hypercall_create_continuation(). I guess I will want to
> make a patch there, which of course I could make cover the Misra aspect
> here as well.

Please do, that would be much appreciated. Thank you! Also thanks for
2f531c122e95.


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Subject: Re: [PATCH] bitops/32: Convert variable_ffs() and fls() zero-case
 handling to C
To: Andrew Cooper 
Cc: "H. Peter Anvin" , Ingo Molnar , Arnd Bergmann , 
	Arnd Bergmann , Thomas Gleixner , Ingo Molnar , 
	Borislav Petkov , Dave Hansen , x86@kernel.org, 
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	Mike Rapoport , Ard Biesheuvel , Peter Zijlstra , 
	linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org
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On Tue, 29 Apr 2025 at 14:59, Andrew Cooper  wrote:
>
> do_variable_ffs() doesn't quite work.
>
> REP BSF is LZCNT, and unconditionally writes it's output operand, and
> defeats the attempt to preload with -1.
>
> Drop the REP prefix, and it should work as intended.

Bah. That's what I get for just doing it blindly without actually
looking at the kernel source. I just copied the __ffs() thing - and
there the 'rep' is not for the zero case - which we don't care about -
but because lzcnt performs better on newer CPUs.

So you're obviously right.

            Linus


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Date: Tue, 29 Apr 2025 15:10:29 -0700
From: "H. Peter Anvin" 
To: Linus Torvalds ,
        Andrew Cooper 
CC: Ingo Molnar , Arnd Bergmann ,
        Arnd Bergmann , Thomas Gleixner ,
        Ingo Molnar , Borislav Petkov ,
        Dave Hansen , x86@kernel.org,
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On April 29, 2025 3:04:30 PM PDT, Linus Torvalds  wrote:
>On Tue, 29 Apr 2025 at 14:59, Andrew Cooper  wrote:
>>
>> do_variable_ffs() doesn't quite work=2E
>>
>> REP BSF is LZCNT, and unconditionally writes it's output operand, and
>> defeats the attempt to preload with -1=2E
>>
>> Drop the REP prefix, and it should work as intended=2E
>
>Bah=2E That's what I get for just doing it blindly without actually
>looking at the kernel source=2E I just copied the __ffs() thing - and
>there the 'rep' is not for the zero case - which we don't care about -
>but because lzcnt performs better on newer CPUs=2E
>
>So you're obviously right=2E
>
>            Linus

Yeah, the encoding of lzcnt was a real mistake, because the outputs are di=
fferent (so you still need instruction-specific postprocessing=2E)


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Subject: Re: [PATCH] bitops/32: Convert variable_ffs() and fls() zero-case
 handling to C
To: Linus Torvalds 
Cc: "H. Peter Anvin" , Ingo Molnar ,
 Arnd Bergmann , Arnd Bergmann ,
 Thomas Gleixner , Ingo Molnar ,
 Borislav Petkov , Dave Hansen ,
 x86@kernel.org, Juergen Gross ,
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 =?UTF-8?Q?Mateusz_Jo=C5=84czyk?= ,
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On 29/04/2025 11:04 pm, Linus Torvalds wrote:
> On Tue, 29 Apr 2025 at 14:59, Andrew Cooper  wrote:
>> do_variable_ffs() doesn't quite work.
>>
>> REP BSF is LZCNT, and unconditionally writes it's output operand, and
>> defeats the attempt to preload with -1.
>>
>> Drop the REP prefix, and it should work as intended.
> Bah. That's what I get for just doing it blindly without actually
> looking at the kernel source. I just copied the __ffs() thing - and
> there the 'rep' is not for the zero case - which we don't care about -
> but because lzcnt performs better on newer CPUs.

Oh, I didn't realise there was also a perf difference too, but Agner Fog
agrees.

Apparently in Zen4, BSF and friends have become a single uop with a
sensible latency.  Previously they were 6-8 uops with a latency to match.

Intel appear to have have had them as a single uop since SandyBridge, so
quite a long time now.

~Andrew


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To: Andrew Cooper 
Cc: "H. Peter Anvin" , Ingo Molnar , Arnd Bergmann , 
	Arnd Bergmann , Thomas Gleixner , Ingo Molnar , 
	Borislav Petkov , Dave Hansen , x86@kernel.org, 
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On Tue, 29 Apr 2025 at 15:22, Andrew Cooper  wrote:
>
> Oh, I didn't realise there was also a perf difference too, but Agner Fog
> agrees.

The perf difference is exactly because of the issue where the non-rep
one acts as a cmov, and has basically two inputs (the bits to test in
the source, and the old value of the result register)

I guess it's not "fundamental", but lzcnt is basically a bit simpler
for hardware to implement, and the non-rep legacy bsf instruction
basically has a dependency on the previous value of the result
register.

So even when it's a single uop for both cases, that single uop can be
slower for the bsf because of the (typically false) dependency and
extra pressure on the rename registers.

       Linus


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Date: Tue, 29 Apr 2025 15:54:32 -0700 (PDT)
From: Stefano Stabellini 
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To: Jan Beulich 
cc: Stefano Stabellini , victorm.lira@amd.com, 
    Nicola Vetrini , 
    Federico Serafini , 
    Andrew Cooper , 
    Anthony PERARD , 
    Michal Orzel , Julien Grall , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
    Bertrand Marquis , 
    xen-devel@lists.xenproject.org
Subject: Re: [PATCH v1 1/3] x86: x86_emulate: address violations of MISRA C
 Rule 19.1
In-Reply-To: <350d447e-7316-4d54-8468-68f78675cc8d@suse.com>
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References:  <914e3157-736a-4890-9c91-e93fcc260bb0@suse.com>  <350d447e-7316-4d54-8468-68f78675cc8d@suse.com>
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On Tue, 29 Apr 2025, Jan Beulich wrote:
> On 29.04.2025 03:27, Stefano Stabellini wrote:
> > On Mon, 28 Apr 2025, Jan Beulich wrote:
> >> On 26.04.2025 01:42, victorm.lira@amd.com wrote:
> >>> From: Nicola Vetrini 
> >>>
> >>> Rule 19.1 states: "An object shall not be assigned or copied
> >>> to an overlapping object". Since the "call" and "compat_call" are
> >>
> >> Was this taken from patch 2 without editing?
> >>
> >>> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
> >>> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
> >>> @@ -526,9 +526,19 @@ static inline void put_loop_count(
> >>>           */                                                             \
> >>>          if ( !amd_like(ctxt) && mode_64bit() && ad_bytes == 4 )         \
> >>>          {                                                               \
> >>> +            uint64_t tmp;                                               \
> >>> +                                                                        \
> >>>              _regs.r(cx) = 0;                                            \
> >>> -            if ( extend_si ) _regs.r(si) = _regs.esi;                   \
> >>> -            if ( extend_di ) _regs.r(di) = _regs.edi;                   \
> >>> +            if ( extend_si )                                            \
> >>> +            {                                                           \
> >>> +                tmp = _regs.esi;                                        \
> >>> +                _regs.r(si) = tmp;                                      \
> >>> +            }                                                           \
> >>> +            if ( extend_di )                                            \
> >>> +            {                                                           \
> >>> +                tmp = _regs.edi;                                        \
> >>> +                _regs.r(di) = tmp;                                      \
> >>> +            }                                                           \
> >>
> >> See commit 7225f13aef03 for how we chose to address similar issues elsewhere
> >> in the emulator. I think we want to be consistent there. This will then also
> >> eliminate ...
> >>
> >>> @@ -2029,7 +2039,12 @@ x86_emulate(
> >>>          switch ( op_bytes )
> >>>          {
> >>>          case 2: _regs.ax = (int8_t)_regs.ax; break; /* cbw */
> >>> -        case 4: _regs.r(ax) = (uint32_t)(int16_t)_regs.ax; break; /* cwde */
> >>> +        case 4:
> >>> +            {
> >>> +                uint32_t tmp = (uint32_t)(int16_t)_regs.ax;
> >>> +                _regs.r(ax) = tmp;
> >>> +                break; /* cwde */
> >>> +            }
> >>
> >> ... the odd brace placement here, as well as the inconsistency in the types
> >> you used for the temporary variables (both really could have been unsigned
> >> int; no need for a fixed-width type).
> > 
> > Is this what you have in mind?
> 
> No, and that's also not what the referenced commit did in a similar situation.
> 
> > --- a/xen/arch/x86/x86_emulate/x86_emulate.c
> > +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
> > @@ -527,8 +527,8 @@ static inline void put_loop_count(
> >          if ( !amd_like(ctxt) && mode_64bit() && ad_bytes == 4 )         \
> >          {                                                               \
> >              _regs.r(cx) = 0;                                            \
> > -            if ( extend_si ) _regs.r(si) = _regs.esi;                   \
> > -            if ( extend_di ) _regs.r(di) = _regs.edi;                   \
> > +            if ( extend_si ) _regs.r(si) = (uint64_t)_regs.esi;         \
> > +            if ( extend_di ) _regs.r(di) = (uint64_t)_regs.edi;         \
> 
>             if ( extend_si ) _regs.r(si) = (uint32_t)_regs.r(si);       \
>             if ( extend_di ) _regs.r(di) = (uint32_t)_regs.r(di);       \
> 
> After all what the rule requires is that we use _the same_ field on both sides.

I see, thanks Jan. Yes I did try this version and worked as expected.


diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c
index 8e14ebb35b..bee0332bdf 100644
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -527,8 +527,8 @@ static inline void put_loop_count(
         if ( !amd_like(ctxt) && mode_64bit() && ad_bytes == 4 )         \
         {                                                               \
             _regs.r(cx) = 0;                                            \
-            if ( extend_si ) _regs.r(si) = _regs.esi;                   \
-            if ( extend_di ) _regs.r(di) = _regs.edi;                   \
+            if ( extend_si ) _regs.r(si) = (uint32_t)_regs.r(si);        \
+            if ( extend_di ) _regs.r(di) = (uint32_t)_regs.r(di);        \
         }                                                               \
         goto complete_insn;                                             \
     }                                                                   \
@@ -2029,7 +2029,7 @@ x86_emulate(
         switch ( op_bytes )
         {
         case 2: _regs.ax = (int8_t)_regs.ax; break; /* cbw */
-        case 4: _regs.r(ax) = (uint32_t)(int16_t)_regs.ax; break; /* cwde */
+        case 4: _regs.r(ax) = (int16_t)_regs.r(ax); break; /* cwde */
         case 8: _regs.r(ax) = (int32_t)_regs.r(ax); break; /* cdqe */
         }
         break;


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Date: Tue, 29 Apr 2025 16:05:49 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Mykyta Poturai 
cc: "xen-devel@lists.xenproject.org" , 
    Oleksandr Tyshchenko , 
    Stefano Stabellini , Julien Grall , 
    Bertrand Marquis , 
    Michal Orzel , 
    Volodymyr Babchuk , 
    Jan Beulich , 
    =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , 
    Stewart Hildebrand 
Subject: Re: [PATCH v10 1/7] iommu/arm: Introduce iommu_add_dt_pci_sideband_ids
 API
In-Reply-To: <8110a8fd8648b1e40a47c51d68bf5cab5a46468d.1745918678.git.mykyta_poturai@epam.com>
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On Tue, 29 Apr 2025, Mykyta Poturai wrote:
> From: Oleksandr Tyshchenko 
> 
> The main purpose of this patch is to add a way to register PCI device
> (which is behind the IOMMU) using the generic PCI-IOMMU DT bindings [1]
> before assigning that device to a domain.
> 
> This behaves similarly to the existing iommu_add_dt_device API, except it
> handles PCI devices, and it is to be invoked from the add_device hook in the
> SMMU driver.
> 
> The function dt_map_id to translate an ID through a downstream mapping
> (which is also suitable for mapping Requester ID) was borrowed from Linux
> (v5.10-rc6) and updated according to the Xen code base.
> 
> [1] https://www.kernel.org/doc/Documentation/devicetree/bindings/pci/pci-iommu.txt
> 
> Signed-off-by: Oleksandr Tyshchenko 
> Signed-off-by: Stewart Hildebrand 
> Signed-off-by: Mykyta Poturai 

Reviewed-by: Stefano Stabellini 



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Date: Tue, 29 Apr 2025 16:12:43 -0700 (PDT)
From: Stefano Stabellini 
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To: Mykyta Poturai 
cc: "xen-devel@lists.xenproject.org" , 
    Oleksandr Andrushchenko , 
    Julien Grall , Rahul Singh , 
    Stefano Stabellini , 
    Bertrand Marquis , 
    Michal Orzel , 
    Volodymyr Babchuk , 
    Oleksandr Tyshchenko , 
    Stewart Hildebrand 
Subject: Re: [PATCH v10 3/7] xen/arm: smmuv2: Add PCI devices support for
 SMMUv2
In-Reply-To: <4874d41630f6bb3e7b688bfa332004558bb543b9.1745918678.git.mykyta_poturai@epam.com>
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On Tue, 29 Apr 2025, Mykyta Poturai wrote:
> From: Oleksandr Andrushchenko 
> 
> Implement support for PCI devices in the SMMU driver. Make arm_smmu_master
> structure to hold a pointer to the device to allow it to hold PCI devices.
> Trigger iommu-map parsing when new PCI device is added. Add checks to
> assign/deassign functions to ensure PCI devices are handled correctly.
> Implement basic quarantining.
> 
> All pci devices are automatically assigned to hardware domain if it exists
> to ensure it can probe them.
> 
> TODO:
> Implement scratch page quarantining support.
> 
> Signed-off-by: Oleksandr Tyshchenko 
> Signed-off-by: Oleksandr Andrushchenko 
> Signed-off-by: Stewart Hildebrand 
> Signed-off-by: Mykyta Poturai 
> ---
> v9->v10:
> * remove unused code
> * return on error in arm_smmu_dt_add_device_generic
> 
> v8->v9:
> * no change
> 
> v7->v8:
> * no change
> 
> v6->v7:
> * use d->pci_lock in arm_smmu_assign_dev()
> * remove !is_hardware_domain and pdev->domain == d checks in assign to
>   support future dom0less use case when dom0 is using vPCI
> * remove stale todo in dev_get_dev_node
> * don't print ""
> * remove redundant dt_device_is_protected check
> * remove assign/deassing prints
> * change assign logic to remove reassign reimplementation
> * check if pdev->domain exists before assigning to it
> * explain pdev->devfn check
> * make reassign check stricter and update comment
> 
> v5->v6:
> * check for hardware_domain == NULL (dom0less test case)
> * locking: assign pdev->domain before list_add()
> 
> v4->v5:
> * assign device to pdev->domain (usually dom0) by default in add_device() hook
> * deassign from hwdom
> * rebase on top of ("dynamic node programming using overlay dtbo") series
> * remove TODO in comment about device prints
> * add TODO regarding locking
> * fixup after dropping ("xen/arm: Move is_protected flag to struct device")
> 
> v3->v4:
> * add new device_is_protected check in add_device hook to match SMMUv3 and
>   IPMMU-VMSA drivers
> 
> v2->v3:
> * invoke iommu_add_pci_sideband_ids() from add_device hook
> 
> v1->v2:
> * ignore add_device/assign_device/reassign_device calls for phantom functions
>   (i.e. devfn != pdev->devfn)
> 
> downstream->v1:
> * wrap unused function in #ifdef 0
> * remove the remove_device() stub since it was submitted separately to the list
>   [XEN][PATCH v6 12/19] xen/smmu: Add remove_device callback for smmu_iommu ops
>   https://lists.xenproject.org/archives/html/xen-devel/2023-05/msg00204.html
> * arm_smmu_(de)assign_dev: return error instead of crashing system
> * update condition in arm_smmu_reassign_dev
> * style fixup
> * add && !is_hardware_domain(d) into condition in arm_smmu_assign_dev()
> 
> (cherry picked from commit 0c11a7f65f044c26d87d1e27ac6283ef1f9cfb7a from
>  the downstream branch spider-master from
>  https://github.com/xen-troops/xen.git)
> ---
>  xen/drivers/passthrough/arm/smmu.c | 224 ++++++++++++++++++-----------
>  1 file changed, 143 insertions(+), 81 deletions(-)
> 
> diff --git a/xen/drivers/passthrough/arm/smmu.c b/xen/drivers/passthrough/arm/smmu.c
> index 0f8d47dc98..b9f2a33815 100644
> --- a/xen/drivers/passthrough/arm/smmu.c
> +++ b/xen/drivers/passthrough/arm/smmu.c
> @@ -120,11 +120,21 @@ enum irqreturn {
>  
>  typedef enum irqreturn irqreturn_t;
>  
> -/* Device logger functions
> - * TODO: Handle PCI
> - */
> -#define dev_print(dev, lvl, fmt, ...)						\
> -	 printk(lvl "smmu: %s: " fmt, dt_node_full_name(dev_to_dt(dev)), ## __VA_ARGS__)
> +/* Device logger functions */
> +#ifndef CONFIG_HAS_PCI
> +#define dev_print(dev, lvl, fmt, ...)    \
> +    printk(lvl "smmu: %s: " fmt, dev_name(dev), ## __VA_ARGS__)
> +#else
> +#define dev_print(dev, lvl, fmt, ...) ({                                \
> +    if ( !dev_is_pci((dev)) )                                           \
> +        printk(lvl "smmu: %s: " fmt, dev_name((dev)), ## __VA_ARGS__);  \
> +    else                                                                \
> +    {                                                                   \
> +        struct pci_dev *pdev = dev_to_pci((dev));                       \
> +        printk(lvl "smmu: %pp: " fmt, &pdev->sbdf, ## __VA_ARGS__);     \
> +    }                                                                   \
> +})
> +#endif
>  
>  #define dev_dbg(dev, fmt, ...) dev_print(dev, XENLOG_DEBUG, fmt, ## __VA_ARGS__)
>  #define dev_notice(dev, fmt, ...) dev_print(dev, XENLOG_INFO, fmt, ## __VA_ARGS__)
> @@ -172,20 +182,6 @@ static void __iomem *devm_ioremap_resource(struct device *dev,
>  #define IOMMU_FAULT_READ	0
>  #define IOMMU_FAULT_WRITE	1
>  
> -/*
> - * Xen: PCI functions
> - * TODO: It should be implemented when PCI will be supported
> - */
> -#define to_pci_dev(dev)	(NULL)
> -static inline int pci_for_each_dma_alias(struct pci_dev *pdev,
> -					 int (*fn) (struct pci_dev *pdev,
> -						    u16 alias, void *data),
> -					 void *data)
> -{
> -	BUG();
> -	return 0;
> -}
> -
>  /* Xen: misc */
>  #define PHYS_MASK_SHIFT		PADDR_BITS
>  
> @@ -619,7 +615,7 @@ struct arm_smmu_master_cfg {
>  	for (i = 0; idx = (cfg)->smendx[i], (i) < (num); ++(i))
>  
>  struct arm_smmu_master {
> -	struct device_node		*of_node;
> +	struct device			*dev;
>  	struct rb_node			node;
>  	struct arm_smmu_master_cfg	cfg;
>  };
> @@ -711,7 +707,7 @@ arm_smmu_get_fwspec(struct arm_smmu_master_cfg *cfg)
>  {
>  	struct arm_smmu_master *master = container_of(cfg,
>  			                                      struct arm_smmu_master, cfg);
> -	return dev_iommu_fwspec_get(&master->of_node->dev);
> +	return dev_iommu_fwspec_get(master->dev);
>  }
>  
>  static void parse_driver_options(struct arm_smmu_device *smmu)
> @@ -730,21 +726,11 @@ static void parse_driver_options(struct arm_smmu_device *smmu)
>  
>  static struct device_node *dev_get_dev_node(struct device *dev)
>  {
> -#if 0 /* Xen: TODO: Add support for PCI */
> -	if (dev_is_pci(dev)) {
> -		struct pci_bus *bus = to_pci_dev(dev)->bus;
> -
> -		while (!pci_is_root_bus(bus))
> -			bus = bus->parent;
> -		return bus->bridge->parent->of_node;
> -	}
> -#endif
> -
>  	return dev->of_node;
>  }
>  
>  static struct arm_smmu_master *find_smmu_master(struct arm_smmu_device *smmu,
> -						struct device_node *dev_node)
> +						struct device *dev)
>  {
>  	struct rb_node *node = smmu->masters.rb_node;
>  
> @@ -753,9 +739,9 @@ static struct arm_smmu_master *find_smmu_master(struct arm_smmu_device *smmu,
>  
>  		master = container_of(node, struct arm_smmu_master, node);
>  
> -		if (dev_node < master->of_node)
> +		if (dev < master->dev)
>  			node = node->rb_left;
> -		else if (dev_node > master->of_node)
> +		else if (dev > master->dev)
>  			node = node->rb_right;
>  		else
>  			return master;
> @@ -790,9 +776,9 @@ static int insert_smmu_master(struct arm_smmu_device *smmu,
>  			= container_of(*new, struct arm_smmu_master, node);
>  
>  		parent = *new;
> -		if (master->of_node < this->of_node)
> +		if (master->dev < this->dev)
>  			new = &((*new)->rb_left);
> -		else if (master->of_node > this->of_node)
> +		else if (master->dev > this->dev)
>  			new = &((*new)->rb_right);
>  		else
>  			return -EEXIST;
> @@ -824,28 +810,30 @@ static int arm_smmu_dt_add_device_legacy(struct arm_smmu_device *smmu,
>  	struct arm_smmu_master *master;
>  	struct device_node *dev_node = dev_get_dev_node(dev);
>  
> -	master = find_smmu_master(smmu, dev_node);
> +	master = find_smmu_master(smmu, dev);
>  	if (master) {
>  		dev_err(dev,
> -			"rejecting multiple registrations for master device %s\n",
> -			dev_node->name);
> +			"rejecting multiple registrations for master device\n");
>  		return -EBUSY;
>  	}
>  
>  	master = devm_kzalloc(dev, sizeof(*master), GFP_KERNEL);
>  	if (!master)
>  		return -ENOMEM;
> -	master->of_node = dev_node;
> +	master->dev = dev;
>  
> -	/* Xen: Let Xen know that the device is protected by an SMMU */
> -	dt_device_set_protected(dev_node);
> +	if ( !dev_is_pci(dev) )
> +	{
> +		/* Xen: Let Xen know that the device is protected by an SMMU */
> +		dt_device_set_protected(dev_node);
> +	}
>  
>  	for (i = 0; i < fwspec->num_ids; ++i) {
>  		if (!(smmu->features & ARM_SMMU_FEAT_STREAM_MATCH) &&
>  		     (fwspec->ids[i] >= smmu->num_mapping_groups)) {
>  			dev_err(dev,
> -				"stream ID for master device %s greater than maximum allowed (%d)\n",
> -				dev_node->name, smmu->num_mapping_groups);
> +				"SMMU stream ID %d is greater than maximum allowed (%d)\n",
> +				fwspec->ids[i], smmu->num_mapping_groups);
>  			return -ERANGE;
>  		}
>  		master->cfg.smendx[i] = INVALID_SMENDX;
> @@ -860,7 +848,7 @@ static int arm_smmu_dt_remove_device_legacy(struct arm_smmu_device *smmu,
>  	struct device_node *dev_node = dev_get_dev_node(dev);
>  	int ret;
>  
> -	master = find_smmu_master(smmu, dev_node);
> +	master = find_smmu_master(smmu, dev);
>  	if (master == NULL) {
>  		dev_err(dev,
>  			"No registrations found for master device %s\n",
> @@ -872,8 +860,9 @@ static int arm_smmu_dt_remove_device_legacy(struct arm_smmu_device *smmu,
>  	if (ret)
>  		return ret;
>  
> -	/* Protected by dt_host_lock and dtdevs_lock as caller holds these locks. */
> -	dev_node->is_protected = false;
> +	if ( !dev_is_pci(dev) )
> +		/* Protected by dt_host_lock and dtdevs_lock as caller holds these locks. */
> +		dev_node->is_protected = false;
>  
>  	kfree(master);
>  	return 0;
> @@ -902,6 +891,12 @@ static int register_smmu_master(struct arm_smmu_device *smmu,
>  					     fwspec);
>  }
>  
> +/* Forward declaration */
> +static int arm_smmu_assign_dev(struct domain *d, u8 devfn,
> +			       struct device *dev, u32 flag);
> +static int arm_smmu_deassign_dev(struct domain *d, uint8_t devfn,
> +				 struct device *dev);
> +
>  /*
>   * The driver which supports generic IOMMU DT bindings must have this
>   * callback implemented.
> @@ -926,6 +921,25 @@ static int arm_smmu_dt_add_device_generic(u8 devfn, struct device *dev)
>  {
>  	struct arm_smmu_device *smmu;
>  	struct iommu_fwspec *fwspec;
> +	int ret;
> +
> +#ifdef CONFIG_HAS_PCI
> +	if ( dev_is_pci(dev) )
> +	{
> +		struct pci_dev *pdev = dev_to_pci(dev);
> +		int ret;
> +
> +		/* Ignore calls for phantom functions */
> +		if ( devfn != pdev->devfn )
> +			return 0;
> +
> +		ret = iommu_add_pci_sideband_ids(pdev);
> +		if ( ret < 0 ) {
> +			iommu_fwspec_free(dev);
> +			return ret;
> +		}
> +	}
> +#endif
>  
>  	fwspec = dev_iommu_fwspec_get(dev);
>  	if (fwspec == NULL)
> @@ -935,7 +949,25 @@ static int arm_smmu_dt_add_device_generic(u8 devfn, struct device *dev)
>  	if (smmu == NULL)
>  		return -ENXIO;
>  
> -	return arm_smmu_dt_add_device_legacy(smmu, dev, fwspec);
> +	ret = arm_smmu_dt_add_device_legacy(smmu, dev, fwspec);
> +	if ( ret )
> +		return ret;
> +
> +#ifdef CONFIG_HAS_PCI
> +	if ( dev_is_pci(dev) )
> +	{
> +		struct pci_dev *pdev = dev_to_pci(dev);
> +
> +		/*
> +		 * During PHYSDEVOP_pci_device_add, Xen does not assign the
> +		 * device, so we must do it here.
> +		 */
> +		if ( pdev->domain )
> +			ret = arm_smmu_assign_dev(pdev->domain, devfn, dev, 0);
> +	}
> +#endif
> +
> +	return ret;
>  }
>  
>  static int arm_smmu_dt_xlate_generic(struct device *dev,
> @@ -958,11 +990,10 @@ static struct arm_smmu_device *find_smmu_for_device(struct device *dev)
>  {
>  	struct arm_smmu_device *smmu;
>  	struct arm_smmu_master *master = NULL;
> -	struct device_node *dev_node = dev_get_dev_node(dev);
>  
>  	spin_lock(&arm_smmu_devices_lock);
>  	list_for_each_entry(smmu, &arm_smmu_devices, list) {
> -		master = find_smmu_master(smmu, dev_node);
> +		master = find_smmu_master(smmu, dev);
>  		if (master)
>  			break;
>  	}
> @@ -2054,6 +2085,7 @@ static bool arm_smmu_capable(enum iommu_cap cap)
>  }
>  #endif
>  
> +#if 0 /* Not used */
>  static int __arm_smmu_get_pci_sid(struct pci_dev *pdev, u16 alias, void *data)
>  {
>  	*((u16 *)data) = alias;
> @@ -2064,6 +2096,7 @@ static void __arm_smmu_release_pci_iommudata(void *data)
>  {
>  	kfree(data);
>  }
> +#endif

This #if 0 escaped. Please remove it too.


>  static int arm_smmu_add_device(struct device *dev)
>  {
> @@ -2071,40 +2104,15 @@ static int arm_smmu_add_device(struct device *dev)
>  	struct arm_smmu_master_cfg *cfg;
>  	struct iommu_group *group;
>  	void (*releasefn)(void *data) = NULL;
> -	int ret;
>  
>  	smmu = find_smmu_for_device(dev);
>  	if (!smmu)
>  		return -ENODEV;
>  
> -	if (dev_is_pci(dev)) {
> -		struct pci_dev *pdev = to_pci_dev(dev);
> -		struct iommu_fwspec *fwspec;
> -
> -		cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);
> -		if (!cfg) {
> -			return -ENOMEM;
> -		}
> -
> -		ret = iommu_fwspec_init(dev, smmu->dev);
> -		if (ret) {
> -			kfree(cfg);
> -			return ret;
> -		}
> -		fwspec = dev_iommu_fwspec_get(dev);
> -
> -		/*
> -		 * Assume Stream ID == Requester ID for now.
> -		 * We need a way to describe the ID mappings in FDT.
> -		 */
> -		pci_for_each_dma_alias(pdev, __arm_smmu_get_pci_sid,
> -				       &fwspec->ids[0]);
> -		releasefn = __arm_smmu_release_pci_iommudata;
> -		cfg->smmu = smmu;
> -	} else {
> +	{

This block looks strange now, please either remove the block or add an
else, if (!smmu) ... else


>  		struct arm_smmu_master *master;
>  
> -		master = find_smmu_master(smmu, dev->of_node);
> +		master = find_smmu_master(smmu, dev);
>  		if (!master) {
>  			return -ENODEV;
>  		}
> @@ -2772,6 +2780,42 @@ static int arm_smmu_assign_dev(struct domain *d, u8 devfn,
>  			return -ENOMEM;
>  	}
>  
> +#ifdef CONFIG_HAS_PCI
> +	if ( dev_is_pci(dev) )
> +	{
> +		struct pci_dev *pdev = dev_to_pci(dev);
> +
> +		/* Ignore calls for phantom functions */
> +		if ( devfn != pdev->devfn )
> +			return 0;
> +
> +		ASSERT(pcidevs_locked());
> +
> +		write_lock(&pdev->domain->pci_lock);
> +		list_del(&pdev->domain_list);
> +		write_unlock(&pdev->domain->pci_lock);
> +
> +		pdev->domain = d;
> +
> +		write_lock(&d->pci_lock);
> +		list_add(&pdev->domain_list, &d->pdev_list);
> +		write_unlock(&d->pci_lock);
> +
> +		/* dom_io is used as a sentinel for quarantined devices */
> +		if ( d == dom_io )
> +		{
> +			struct iommu_domain *domain = dev_iommu_domain(dev);
> +			if ( !iommu_quarantine )
> +				return 0;
> +
> +			if ( domain && domain->priv )
> +				arm_smmu_deassign_dev(domain->priv->cfg.domain, devfn, dev);
> +
> +			return 0;
> +		}
> +	}
> +#endif
> +
>  	if (!dev_iommu_group(dev)) {
>  		ret = arm_smmu_add_device(dev);
>  		if (ret)
> @@ -2821,11 +2865,27 @@ out:
>  	return ret;
>  }
>  
> -static int arm_smmu_deassign_dev(struct domain *d, struct device *dev)
> +static int arm_smmu_deassign_dev(struct domain *d, uint8_t devfn,
> +				 struct device *dev)
>  {
>  	struct iommu_domain *domain = dev_iommu_domain(dev);
>  	struct arm_smmu_xen_domain *xen_domain;
>  
> +#ifdef CONFIG_HAS_PCI
> +	if ( dev_is_pci(dev) )
> +	{
> +		struct pci_dev *pdev = dev_to_pci(dev);
> +
> +		/* Ignore calls for phantom functions */
> +		if ( devfn != pdev->devfn )
> +			return 0;
> +
> +		/* dom_io is used as a sentinel for quarantined devices */
> +		if ( d == dom_io )
> +			return 0;
> +	}
> +#endif
> +
>  	xen_domain = dom_iommu(d)->arch.priv;
>  
>  	if (!domain || domain->priv->cfg.domain != d) {
> @@ -2852,14 +2912,16 @@ static int arm_smmu_reassign_dev(struct domain *s, struct domain *t,
>  {
>  	int ret = 0;
>  
> -	/* Don't allow remapping on other domain than hwdom */
> -	if ( t && !is_hardware_domain(t) )
> +	/* Don't allow remapping on other domain than hwdom
> +	 * or dom_io for PCI devices
> +	 */
> +	if ( t && !is_hardware_domain(t) && (t != dom_io || !dev_is_pci(dev)) )
>  		return -EPERM;
>  
>  	if (t == s)
>  		return 0;
>  
> -	ret = arm_smmu_deassign_dev(s, dev);
> +	ret = arm_smmu_deassign_dev(s, devfn, dev);
>  	if (ret)
>  		return ret;
>  
> -- 
> 2.34.1
> 


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Date: Tue, 29 Apr 2025 16:18:45 -0700 (PDT)
From: Stefano Stabellini 
X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop
To: Mykyta Poturai 
cc: "xen-devel@lists.xenproject.org" , 
    Rahul Singh , 
    Stefano Stabellini , Julien Grall , 
    Bertrand Marquis , 
    Michal Orzel , 
    Volodymyr Babchuk , 
    Stewart Hildebrand 
Subject: Re: [PATCH v10 7/7] xen/arm: Map ITS doorbell register to IOMMU page
 tables
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On Tue, 29 Apr 2025, Mykyta Poturai wrote:
> From: Rahul Singh 
> 
> When ITS is enabled and PCI devices that are behind an SMMU generate an
> MSI interrupt, SMMU fault will be observed as there is currently no
> mapping in p2m table for the ITS translation register (GITS_TRANSLATER).
> 
> A mapping is required in the iommu page tables so that the device can
> generate the MSI interrupt writing to the GITS_TRANSLATER register.
> 
> The GITS_TRANSLATER register is a 32-bit register, and there is nothing
> else in a page containing it, so map that page.
> 
> Add new host_addr parameter to vgic_v3_its_init_virtual to prepare the
> foundation for DomU MSI support where guest doorbell address can differ
> for the host's. Note that the 1:1 check in arm_iommu_map_page remains
> for now, as virtual ITSes are currently only created for hwdom where the
> doorbell mapping is always 1:1.
> 
> Signed-off-by: Rahul Singh 
> Signed-off-by: Stewart Hildebrand 
> Signed-off-by: Mykyta Poturai 

Reviewed-by: Stefano Stabellini 



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Message-ID: 
Date: Tue, 29 Apr 2025 20:46:37 -0400
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Content-Language: en-US
To: Xen developer discussion 
From: Demi Marie Obenour 
Subject: Non-PCI device passthrough on Arm: status?
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From: Demi Marie Obenour 
To: Xen developer discussion 
Message-ID: 
Subject: Non-PCI device passthrough on Arm: status?

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Content-Type: multipart/mixed; boundary="------------NN8RZqe966aC4VCVLXCCj8Ae"

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I noticed that non-PCI device passthrough on Arm is not
security supported.  Is this just because the code has not
been sufficiently tested yet, or is it because there is
some fundamental problem with the code or with the hardware
features it uses?
--=20
Sincerely,
Demi Marie Obenour (she/her/hers)

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In-Reply-To: 
From: Jason Andryuk 
Date: Tue, 29 Apr 2025 20:59:45 -0400
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Message-ID: 
Subject: Re: NULL pointer dereference in xenbus_thread->...
To: =?UTF-8?Q?Marek_Marczykowski=2DG=C3=B3recki?= 
Cc: Julien Grall , xen-devel , 
	Juergen Gross 
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Hi Marek,

On Wed, Apr 23, 2025 at 8:42=E2=80=AFAM Marek Marczykowski-G=C3=B3recki
 wrote:
>
> On Sat, Jun 01, 2024 at 12:48:33AM +0200, Marek Marczykowski-G=C3=B3recki=
 wrote:
> > On Tue, Mar 26, 2024 at 11:00:50AM +0000, Julien Grall wrote:
> > > Hi Marek,
> > >
> > > +Juergen for visibility
> > >
> > > When sending a bug report, I would suggest to CC relevant people as
> > > otherwise it can get lost (not may people monitors Xen devel if they =
are not
> > > CCed).
> > >
> > > Cheers,
> > >
> > > On 25/03/2024 16:17, Marek Marczykowski-G=C3=B3recki wrote:
> > > > On Sun, Oct 22, 2023 at 04:14:30PM +0200, Marek Marczykowski-G=C3=
=B3recki wrote:
> > > > > On Mon, Aug 28, 2023 at 11:50:36PM +0200, Marek Marczykowski-G=C3=
=B3recki wrote:
> > > > > > Hi,
> > > > > >
> > > > > > I've noticed in Qubes's CI failure like this:
> > > > > >
> > > > > > [  871.271292] BUG: kernel NULL pointer dereference, address: 0=
000000000000000
> > > > > > [  871.275290] #PF: supervisor read access in kernel mode
> > > > > > [  871.277282] #PF: error_code(0x0000) - not-present page
> > > > > > [  871.279182] PGD 106fdb067 P4D 106fdb067 PUD 106fdc067 PMD 0
> > > > > > [  871.281071] Oops: 0000 [#1] PREEMPT SMP NOPTI
> > > > > > [  871.282698] CPU: 1 PID: 28 Comm: xenbus Not tainted 6.1.43-1=
.qubes.fc37.x86_64 #1
> > > > > > [  871.285222] Hardware name: QEMU Standard PC (i440FX + PIIX, =
1996), BIOS rel-1.16.0-0-gd239552-rebuilt.opensuse.org 04/01/2014
> > > > > > [  871.288883] RIP: e030:__wake_up_common+0x4c/0x180
> > > > > > [  871.292838] Code: 24 0c 89 4c 24 08 4d 85 c9 74 0a 41 f6 01 =
04 0f 85 a3 00 00 00 48 8b 43 08 4c 8d 40 e8 48 83 c3 08 49 8d 40 18 48 39 =
c3 74 5b <49> 8b 40 18 31 ed 4c 8d 70 e8 45 8b 28 41 f6 c5 04 75 5f 49 8b 4=
0
> > > > > > [  871.299776] RSP: e02b:ffffc900400f7e10 EFLAGS: 00010082
> > > > > > [  871.301656] RAX: 0000000000000000 RBX: ffff88810541ce98 RCX:=
 0000000000000000
> > > > > > [  871.304255] RDX: 0000000000000001 RSI: 0000000000000003 RDI:=
 ffff88810541ce90
> > > > > > [  871.306714] RBP: ffffc900400f0280 R08: ffffffffffffffe8 R09:=
 ffffc900400f7e68
> > > > > > [  871.309937] R10: 0000000000007ff0 R11: ffff888100ad3000 R12:=
 ffffc900400f7e68
> > > > > > [  871.312326] R13: 0000000000000000 R14: 0000000000000000 R15:=
 0000000000000000
> > > > > > [  871.314647] FS:  0000000000000000(0000) GS:ffff88813ff00000(=
0000) knlGS:0000000000000000
> > > > > > [  871.317677] CS:  10000e030 DS: 0000 ES: 0000 CR0: 0000000080=
050033
> > > > > > [  871.319644] CR2: 0000000000000000 CR3: 00000001067fe000 CR4:=
 0000000000040660
> > > > > > [  871.321973] Call Trace:
> > > > > > [  871.322782]  
> > > > > > [  871.323494]  ? show_trace_log_lvl+0x1d3/0x2ef
> > > > > > [  871.324901]  ? show_trace_log_lvl+0x1d3/0x2ef
> > > > > > [  871.326310]  ? show_trace_log_lvl+0x1d3/0x2ef
> > > > > > [  871.327721]  ? __wake_up_common_lock+0x82/0xd0
> > > > > > [  871.329147]  ? __die_body.cold+0x8/0xd
> > > > > > [  871.330378]  ? page_fault_oops+0x163/0x1a0
> > > > > > [  871.331691]  ? exc_page_fault+0x70/0x170
> > > > > > [  871.332946]  ? asm_exc_page_fault+0x22/0x30
> > > > > > [  871.334454]  ? __wake_up_common+0x4c/0x180
> > > > > > [  871.335777]  __wake_up_common_lock+0x82/0xd0
> > > > > > [  871.337183]  ? process_writes+0x240/0x240
> > > > > > [  871.338461]  process_msg+0x18e/0x2f0
> > > > > > [  871.339627]  xenbus_thread+0x165/0x1c0
> > > > > > [  871.340830]  ? cpuusage_read+0x10/0x10
> > > > > > [  871.342032]  kthread+0xe9/0x110
> > > > > > [  871.343317]  ? kthread_complete_and_exit+0x20/0x20
> > > > > > [  871.345020]  ret_from_fork+0x22/0x30
> > > > > > [  871.346239]  
> > > > > > [  871.347060] Modules linked in: snd_hda_codec_generic ledtrig=
_audio snd_hda_intel snd_intel_dspcfg snd_intel_sdw_acpi snd_hda_codec snd_=
hda_core snd_hwdep snd_seq snd_seq_device joydev snd_pcm intel_rapl_msr ppd=
ev intel_rapl_common snd_timer pcspkr e1000e snd soundcore i2c_piix4 parpor=
t_pc parport loop fuse xenfs dm_crypt crct10dif_pclmul crc32_pclmul crc32c_=
intel polyval_clmulni polyval_generic floppy ghash_clmulni_intel sha512_sss=
e3 serio_raw virtio_scsi virtio_console bochs xhci_pci xhci_pci_renesas xhc=
i_hcd qemu_fw_cfg drm_vram_helper drm_ttm_helper ttm ata_generic pata_acpi =
xen_privcmd xen_pciback xen_blkback xen_gntalloc xen_gntdev xen_evtchn scsi=
_dh_rdac scsi_dh_emc scsi_dh_alua uinput dm_multipath
> > > > > > [  871.368892] CR2: 0000000000000000
> > > > > > [  871.370160] ---[ end trace 0000000000000000 ]---
> > > > > > [  871.371719] RIP: e030:__wake_up_common+0x4c/0x180
> > > > > > [  871.373273] Code: 24 0c 89 4c 24 08 4d 85 c9 74 0a 41 f6 01 =
04 0f 85 a3 00 00 00 48 8b 43 08 4c 8d 40 e8 48 83 c3 08 49 8d 40 18 48 39 =
c3 74 5b <49> 8b 40 18 31 ed 4c 8d 70 e8 45 8b 28 41 f6 c5 04 75 5f 49 8b 4=
0
> > > > > > [  871.379866] RSP: e02b:ffffc900400f7e10 EFLAGS: 00010082
> > > > > > [  871.381689] RAX: 0000000000000000 RBX: ffff88810541ce98 RCX:=
 0000000000000000
> > > > > > [  871.383971] RDX: 0000000000000001 RSI: 0000000000000003 RDI:=
 ffff88810541ce90
> > > > > > [  871.386235] RBP: ffffc900400f0280 R08: ffffffffffffffe8 R09:=
 ffffc900400f7e68
> > > > > > [  871.388521] R10: 0000000000007ff0 R11: ffff888100ad3000 R12:=
 ffffc900400f7e68
> > > > > > [  871.390789] R13: 0000000000000000 R14: 0000000000000000 R15:=
 0000000000000000
> > > > > > [  871.393101] FS:  0000000000000000(0000) GS:ffff88813ff00000(=
0000) knlGS:0000000000000000
> > > > > > [  871.395671] CS:  10000e030 DS: 0000 ES: 0000 CR0: 0000000080=
050033
> > > > > > [  871.397863] CR2: 0000000000000000 CR3: 00000001067fe000 CR4:=
 0000000000040660
> > > > > > [  871.400441] Kernel panic - not syncing: Fatal exception
> > > > > > [  871.402171] Kernel Offset: disabled
> > > > > > (XEN) Hardware Dom0 crashed: rebooting machine in 5 seconds.
> > > > > >
> > > > > > It isn't the first time I see similar crash, but I can't really
> > > > > > reproduce it reliably. Restarted test usually passes.
> > > > > > Note this is Xen nested in KVM, so it could very well be some o=
ddity
> > > > > > about nested virt, although looking at the stack trace, it's un=
likely
> > > > > > and more likely some race condition hit only on slower system.
> > > > >
> > > > > Recently I've got the same crash on a real system in domU too. An=
d also
> > > > > on nested on newer kernel 6.1.57 (here it happened in dom0). So, =
this is
> > > > > still an issue and affects not only nested case :/
> > > > >
> > > > > > Unfortunately I don't have symbols for this kernel handy, but t=
here is a
> > > > > > single wake_up() call in process_writes(), so it shouldn't be a=
n issue.
> > > > > >
> > > > > > Any ideas?
> > > > > >
> > > > > > Full log at https://openqa.qubes-os.org/tests/80779/logfile?fil=
ename=3Dserial0.txt
> > > > >
> > > > > More links at https://github.com/QubesOS/qubes-issues/issues/8638=
,
> > > > > including more recent stack trace.
> > > >
> > > > Happens on 6.1.75 too (new stack trace I've added to the issue abov=
e,
> > > > but it's pretty similar).
> >
> > Recently I've got a report from another user about similar issue, on
> > 6.6.29 this time. I also still encounter this issue once a month or so,
> > but the user claims they get it much more often:
> > https://github.com/QubesOS/qubes-issues/issues/8638#issuecomment-213541=
9896
> > The extra conditions reported by the user are:
> > - old AMD system (KGPE-D16 with Opteron 6282 SE) requiring
> >   `spec-ctrl=3Dibpb-entry=3Dno-pv` to remain usable
> > - Whonix domU, which has a bunch of sysctl parameters changed, listed
> >   at:
> >   - https://github.com/Kicksecure/security-misc
> >   - https://github.com/Kicksecure/security-misc/blob/master/usr/lib/sys=
ctl.d/990-security-misc.conf
> >   (unsure which are relevant, maybe `vm.swappiness=3D1`?)
>
> I've got some more report confirming it's still happening on Linux
> 6.12.18. Is there anything I can do to help fixing this? Maybe ask users
> to enable some extra logging?

Have you been able to capture a crash with debug symbols and run it
through scripts/decode_stacktrace.sh?

I'm curious what process_msg+0x18e/0x2f0 is.  process_writes() has a
direct call to wake_up(), but process_msg() calling req->cb(req) may
be xs_wake_up() which is a thin wrapper over wake_up().

They make me wonder if req has been free()ed and at least partially
zero-ed, but it still has wake_up() called.  The call stack here is
reminiscent of the one here
https://lore.kernel.org/xen-devel/Z_lJTyVipJJEpWg2@mail-itl/ and the
unexpected value there is 0.

I haven't actually figured out a scenario where req would be kfree()ed
early.  But the handling of kfree(req) being split between
process_msg/writes() and xs_wait_for_reply() makes me a little uneasy.

Regards,
Jason


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From: Volodymyr Babchuk 
To: Julien Grall 
CC: "xen-devel@lists.xenproject.org" , Andrew
 Cooper , Anthony PERARD
	, Michal Orzel , Jan Beulich
	, =?iso-8859-1?Q?Roger_Pau_Monn=E9?=
	, Stefano Stabellini , Bertrand
 Marquis , Dario Faggioli ,
	Juergen Gross , George Dunlap 
Subject: Re: [RFC PATCH v2] xen: add libafl-qemu fuzzer support
Thread-Topic: [RFC PATCH v2] xen: add libafl-qemu fuzzer support
Thread-Index: AQHblUI7lWJ91U/YVk+TK2sT0KKY9g==
Date: Wed, 30 Apr 2025 02:17:13 +0000
Message-ID: <87cycue6l3.fsf@epam.com>
References: <20250315003544.1101488-1-volodymyr_babchuk@epam.com>
	<5d519ffd-8747-4367-b92f-01c20a483e72@xen.org>
In-Reply-To: <5d519ffd-8747-4367-b92f-01c20a483e72@xen.org> (Julien Grall's
	message of "Fri, 21 Mar 2025 23:31:24 +0000")
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Hi Julien,

Julien Grall  writes:

[...]

>> diff --git a/xen/arch/arm/include/asm/libafl_qemu.h b/xen/arch/arm/inclu=
de/asm/libafl_qemu.h
>> new file mode 100644
>> index 0000000000..b90cf48b9a
>> --- /dev/null
>> +++ b/xen/arch/arm/include/asm/libafl_qemu.h
>> @@ -0,0 +1,54 @@
>> +#ifndef LIBAFL_QEMU_H
>> +#define LIBAFL_QEMU_H
>> +
>> +#include 
>> +#include "libafl_qemu_defs.h"
>> +#define LIBAFL_QEMU_PRINTF_MAX_SIZE 4096
>
> Is this defined by libafl or an internal decision?

It is defined by libafl

>
> [...]
>
>> diff --git a/xen/arch/arm/include/asm/libafl_qemu_defs.h b/xen/arch/arm/=
include/asm/libafl_qemu_defs.h
>> new file mode 100644
>> index 0000000000..2866cadaac
>> --- /dev/null
>> +++ b/xen/arch/arm/include/asm/libafl_qemu_defs.h
>> @@ -0,0 +1,37 @@
>
> Missing license. Also, is this file taken from somewhere?
>

I add MIT license, as libafl is dual licensed under Apache-2 and
MIT. This file is based on libafl_qemu [1]

>> +#ifndef LIBAFL_QEMU_DEFS
>> +#define LIBAFL_QEMU_DEFS
>> +
>> +#define LIBAFL_STRINGIFY(s) #s
>> +#define XSTRINGIFY(s) LIBAFL_STRINGIFY(s)
>> +
>> +#if __STDC_VERSION__ >=3D 201112L
>> +  #define STATIC_CHECKS                                   \
>> +    _Static_assert(sizeof(void *) <=3D sizeof(libafl_word), \
>> +                   "pointer type should not be larger and libafl_word")=
;
>> +#else
>> +  #define STATIC_CHECKS
>> +#endif
>
> No-one seems to use STATIC_CHECKS? Is this intended?

I used this file as is... But I'll rework this part.

>> +
>> +#define LIBAFL_SYNC_EXIT_OPCODE 0x66f23a0f
>> +#define LIBAFL_BACKDOOR_OPCODE 0x44f23a0f
>
> Are the opcode valid for arm32? If not, they should be protected with
> #ifdef CONFIG_ARM_64.
>

It is valid even for x86_64. They use the same opcode for x86_64, arm,
aarch64 and riscv.

[...]

>> +
>> +#define LIBAFL_DEFINE_FUNCTIONS(name, opcode)				\
>> +	libafl_word _libafl_##name##_call0(	\
>> +		libafl_word action) {					\
>> +		libafl_word ret;					\
>> +		__asm__ volatile (					\
>> +			"mov x0, %1\n"					\
>> +			".word " XSTRINGIFY(opcode) "\n"		\
>> +			"mov %0, x0\n"					\
>> +			: "=3Dr"(ret)					\
>> +			: "r"(action)					\
>> +			: "x0"						\
>
> Can we store the action directly in x0 (same for the other argunments
> below)? This would avoid to clobber two registers (See smccc.h as an
> example).

Yes, this part bothers me also. I'll try to rework it to be more
efficient.


[...]

>> +
>> +libafl_word libafl_qemu_start_virt(void       *buf_vaddr,
>> +                                            libafl_word max_len) {
>
> What coding style is this file meant to use?

Well, LibAFL people is very lax in their coding style. I copied this
file as is, but probably it should be tidied up and minimized.


[...]

>> +void lqprintf(const char *fmt, ...) {
>
> I am not sure I understand the value of lqprinf(). Why can't we use
> the console? When is this meant to be used?

This is alternative way to output something. It skips all the
abstractions around console and outputs straight to stdout. At least,
this is a nice way to check that communication with the fuzzer is
working.

>> +  va_list args;
>> +  int res;
>> +  va_start(args, fmt);
>> +  res =3D vsnprintf(_lqprintf_buffer, LIBAFL_QEMU_PRINTF_MAX_SIZE, fmt,=
 args);
>> +  va_end(args);
>
> What if lqprintf() is called concurrently?
>

I'll add a spinlock.

[...]

>>     void call_psci_cpu_off(void)
>>   {
>> +#ifdef CONFIG_LIBAFL_QEMU_FUZZER_PASS_BLOCKING
>> +    libafl_qemu_end(LIBAFL_QEMU_END_OK);
>> +#endif
>
> I am a bit confused with this call. For a first, this cannot be
> reached from a VM (or even dom0). Then, even if it is reached,
> shouldn't we allow the test continue while other pCPUs are running?

Yes, looks like this particular call is not accessible by a dom0. I'll
remove it.

> That said, the call to QEMU is not PSCI related. So shouldn't this be
> called from the callers (same applies to all the changes in PSCI)?

Purpose of fuzzing to cover as much code paths as possible. So it is
natural to put this as late as possible. I also reworked changes to
sched/core.c in accordance to this. I.e. moved fuzzer_on_block() calls
as late as possible.

>
>> +
>>       if ( psci_ver > PSCI_VERSION(0, 1) )
>>       {
>>           struct arm_smccc_res res;
>> @@ -62,12 +67,20 @@ void call_psci_cpu_off(void)
>>     void call_psci_system_off(void)
>>   {
>> +#ifdef CONFIG_LIBAFL_QEMU_FUZZER_PASS_BLOCKING
>> +    libafl_qemu_end(LIBAFL_QEMU_END_OK);
>> +#endif
>> +
>>       if ( psci_ver > PSCI_VERSION(0, 1) )
>>           arm_smccc_smc(PSCI_0_2_FN32_SYSTEM_OFF, NULL);
>>   }
>>     void call_psci_system_reset(void)
>>   {
>> +#ifdef CONFIG_LIBAFL_QEMU_FUZZER_PASS_BLOCKING
>> +    libafl_qemu_end(LIBAFL_QEMU_END_OK);
>> +#endif
>> +
>>       if ( psci_ver > PSCI_VERSION(0, 1) )
>>           arm_smccc_smc(PSCI_0_2_FN32_SYSTEM_RESET, NULL);
>>   }
>> diff --git a/xen/common/sched/core.c b/xen/common/sched/core.c
>> index 9043414290..55eb132568 100644
>> --- a/xen/common/sched/core.c
>> +++ b/xen/common/sched/core.c
>> @@ -47,6 +47,10 @@
>>   #define pv_shim false
>>   #endif
>>   +#ifdef CONFIG_LIBAFL_QEMU_FUZZER
>
> This Kconfig is only defined on Arm but you are using in common
> code. Even if this can't be supported right now, shouldn't this be
> defined in common code?

Yes, I am going to move it to the common code, but will it be fine to
have "depends on ARM_64" in the global ./Kconfig.debug for a time being?

>
>> +#include 
>> +#endif
>> +
>>   /* opt_sched: scheduler - default to configured value */
>>   static char __initdata opt_sched[10] =3D CONFIG_SCHED_DEFAULT;
>>   string_param("sched", opt_sched);
>> @@ -1452,6 +1456,10 @@ static long do_poll(const struct sched_poll *sche=
d_poll)
>>       if ( !guest_handle_okay(sched_poll->ports, sched_poll->nr_ports) )
>>           return -EFAULT;
>>   +#ifdef CONFIG_LIBAFL_QEMU_FUZZER_PASS_BLOCKING
>> +    libafl_qemu_end(LIBAFL_QEMU_END_OK);
>> +#endif
>
> I think this and all the changes in sched/core need a comment
> explaning why we want to stop the fuzzing.

I introduced fuzzer_on_block() function and put the following comment
for it:

/*
 * Conditional success
 *
 * Sometimes a fuzzer might make Xen to do something that prevents
 * from returning to the caller: reboot or turn off the machine, block
 * calling vCPU, crash a domain, etc. Depending on fuzzing goal this
 * may be a valid behavior, but as control is not returned to the
 * fuzzing harness, it can't tell the fuzzer about success, so we need
 * to do this ourselves.
 */

Will it be enough? Or do you want to have a comment before each call to fuz=
zer_on_block()?


[1] https://github.com/AFLplusplus/LibAFL/blob/main/libafl_qemu/runtime/lib=
afl_qemu_defs.h

--=20
WBR, Volodymyr=


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From: Michael Kelley 
To: =?iso-8859-1?Q?Ilpo_J=E4rvinen?= , "Xin Li
 (Intel)" 
CC: LKML , "kvm@vger.kernel.org"
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Subject: RE: [PATCH v4 01/15] x86/msr: Add missing includes of 
Thread-Topic: [PATCH v4 01/15] x86/msr: Add missing includes of 
Thread-Index: AQHbt1dCxRX1SSJBLkyUN2kSfV4ndLO6aEuAgAE1BbA=
Date: Wed, 30 Apr 2025 04:20:53 +0000
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References: <20250427092027.1598740-1-xin@zytor.com>
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From: Ilpo J=E4rvinen  Sent: Tuesday, April =
29, 2025 2:46 AM
>=20
> On Sun, 27 Apr 2025, Xin Li (Intel) wrote:
>=20
> > For some reason, there are some TSC-related functions in the MSR
> > header even though there is a tsc.h header.
> >
> > To facilitate the relocation of rdtsc{,_ordered}() from 
> > to  and to eventually eliminate the inclusion of
> >  in , add  to the source files that
> > reference definitions from .
> >
> > Signed-off-by: Xin Li (Intel) 
> > Acked-by: Dave Hansen 
> > Acked-by: Peter Zijlstra (Intel) 
> > ---
> >
> > Change in v4:
> > *) Add missing includes in a different patch (Ilpo J=E4rvinen).
> > *) Add all necessary direct inclusions for msr.h (Ilpo J=E4rvinen).
> >
> > Change in v3:
> > * Add a problem statement to the changelog (Dave Hansen).
> > ---
> >  arch/x86/events/msr.c                                         | 3 +++
> >  arch/x86/events/perf_event.h                                  | 1 +
> >  arch/x86/events/probe.c                                       | 2 ++
>=20
> Under arch/x86/events/ a few files seem to be missing the include?
>=20
> >  arch/x86/hyperv/ivm.c                                         | 1 +
>=20
> Also under hyperv/ not all files are covered but I'm a bit hesitant to
> suggest a change there since I'm not sure if they (hypervisors) do
> something special w.r.t. msr.

I've worked on the Hyper-V code in Linux for 8 years or so, first as
a Microsoft employee, and more recently as a retiree. :-) I'm not
aware of anything special w.r.t. MSR access for Hyper-V guests.
All the normal Linux code for accessing MSRs just works. Hyper-V
*does* provide a set of synthetic MSRs that are unique to
Hyper-V, but they are also accessed using normal Linux code. Of
course, at runtime the access to these synthetic MSRs always
traps to the hypervisor.

I'm planning to apply Xin Li's patch set and make sure nothing
breaks for Hyper-V guests, and particularly when running as an
SEV-SNP or TDX guest. Hopefully I can do that by early next week
at the latest.

Michael

>=20
> >  arch/x86/include/asm/fred.h                                   | 1 +
> >  arch/x86/include/asm/microcode.h                              | 2 ++
> >  arch/x86/include/asm/mshyperv.h                               | 1 +
> >  arch/x86/include/asm/msr.h                                    | 1 +
> >  arch/x86/include/asm/suspend_32.h                             | 1 +
> >  arch/x86/include/asm/suspend_64.h                             | 1 +
> >  arch/x86/include/asm/switch_to.h                              | 2 ++
>=20
> arch/x86/kernel/acpi/ ?
> acrh/x86/kernel/cet.c ?
> ...
>=20
> There seem to be quite many under arch/x86/ that still don't have it, I
> didn't list them all as there were so many after this point.
>=20
> But that's up to x86 maintainers how throughout they want you to be.
>=20
> This command may be helpful to exclude the files which already have the
> include so you can focus on the ones that may still be missing it:
>=20
> git grep -l -e rdmsr -e wrmsr | grep -v -f <(git grep -l -e 'asm/msr\.h')
>=20
> >  arch/x86/kernel/cpu/resctrl/pseudo_lock.c                     | 1 +
> >  arch/x86/kernel/fpu/xstate.h                                  | 1 +
> >  arch/x86/kernel/hpet.c                                        | 1 +
> >  arch/x86/kernel/process_64.c                                  | 1 +
> >  arch/x86/kernel/trace_clock.c                                 | 2 +-
> >  arch/x86/kernel/tsc_sync.c                                    | 1 +
> >  arch/x86/lib/kaslr.c                                          | 2 +-
> >  arch/x86/mm/mem_encrypt_identity.c                            | 1 +
> >  arch/x86/realmode/init.c                                      | 1 +
> >  drivers/acpi/acpi_extlog.c                                    | 1 +
> >  drivers/acpi/processor_perflib.c                              | 1 +
> >  drivers/acpi/processor_throttling.c                           | 3 ++-
> >  drivers/char/agp/nvidia-agp.c                                 | 1 +
> >  drivers/cpufreq/amd-pstate-ut.c                               | 2 ++
> >  drivers/crypto/ccp/sev-dev.c                                  | 1 +
> >  drivers/edac/amd64_edac.c                                     | 1 +
> >  drivers/edac/ie31200_edac.c                                   | 1 +
> >  drivers/edac/mce_amd.c                                        | 1 +
> >  drivers/hwmon/hwmon-vid.c                                     | 4 ++++
> >  drivers/idle/intel_idle.c                                     | 1 +
> >  drivers/misc/cs5535-mfgpt.c                                   | 1 +
> >  drivers/net/vmxnet3/vmxnet3_drv.c                             | 4 ++++
> >  drivers/platform/x86/intel/ifs/core.c                         | 1 +
> >  drivers/platform/x86/intel/ifs/load.c                         | 1 +
> >  drivers/platform/x86/intel/ifs/runtest.c                      | 1 +
> >  drivers/platform/x86/intel/pmc/cnp.c                          | 1 +
> >  drivers/platform/x86/intel/speed_select_if/isst_if_common.c   | 1 +
> >  drivers/platform/x86/intel/speed_select_if/isst_if_mbox_msr.c | 1 +
> >  drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c   | 1 +
> >  drivers/platform/x86/intel/turbo_max_3.c                      | 1 +
> >  .../platform/x86/intel/uncore-frequency/uncore-frequency.c    | 1 +
> >  drivers/powercap/intel_rapl_common.c                          | 1 +
> >  drivers/powercap/intel_rapl_msr.c                             | 1 +
> >  .../thermal/intel/int340x_thermal/processor_thermal_device.c  | 1 +
> >  drivers/thermal/intel/intel_tcc_cooling.c                     | 1 +
> >  drivers/thermal/intel/x86_pkg_temp_thermal.c                  | 1 +
> >  drivers/video/fbdev/geode/display_gx.c                        | 1 +
> >  drivers/video/fbdev/geode/gxfb_core.c                         | 1 +
> >  drivers/video/fbdev/geode/lxfb_ops.c                          | 1 +
>=20
> Under drivers/ this looked pretty complete. Nice work.
>=20
> Acked-by: Ilpo J=E4rvinen  # for pdx86
>=20
> I also noticed these files might not need to include msr.h:
>=20
> drivers/cpufreq/elanfreq.c
> drivers/cpufreq/sc520_freq.c
> drivers/accel/habanalabs/common/habanalabs_ioctl.c
>=20
> ...so if you want, you may consider optionally adding a cleanup patch to
> remove the include from them.
>=20
> > --- a/drivers/video/fbdev/geode/gxfb_core.c
> > +++ b/drivers/video/fbdev/geode/gxfb_core.c
> > @@ -30,6 +30,7 @@
> >  #include 
> >
> >  #include 
> > +#include 
>=20
> In wrong order.
> >
> >  #include "gxfb.h"
>=20
> --
>  i.


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Date: Wed, 30 Apr 2025 08:08:05 +0200
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Subject: Re: [PATCH v1 1/3] x86: x86_emulate: address violations of MISRA C
 Rule 19.1
To: Stefano Stabellini 
Cc: victorm.lira@amd.com, Nicola Vetrini ,
 Federico Serafini ,
 Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 30.04.2025 00:54, Stefano Stabellini wrote:
> On Tue, 29 Apr 2025, Jan Beulich wrote:
>> On 29.04.2025 03:27, Stefano Stabellini wrote:
>>> On Mon, 28 Apr 2025, Jan Beulich wrote:
>>>> On 26.04.2025 01:42, victorm.lira@amd.com wrote:
>>>>> From: Nicola Vetrini 
>>>>>
>>>>> Rule 19.1 states: "An object shall not be assigned or copied
>>>>> to an overlapping object". Since the "call" and "compat_call" are
>>>>
>>>> Was this taken from patch 2 without editing?
>>>>
>>>>> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
>>>>> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
>>>>> @@ -526,9 +526,19 @@ static inline void put_loop_count(
>>>>>           */                                                             \
>>>>>          if ( !amd_like(ctxt) && mode_64bit() && ad_bytes == 4 )         \
>>>>>          {                                                               \
>>>>> +            uint64_t tmp;                                               \
>>>>> +                                                                        \
>>>>>              _regs.r(cx) = 0;                                            \
>>>>> -            if ( extend_si ) _regs.r(si) = _regs.esi;                   \
>>>>> -            if ( extend_di ) _regs.r(di) = _regs.edi;                   \
>>>>> +            if ( extend_si )                                            \
>>>>> +            {                                                           \
>>>>> +                tmp = _regs.esi;                                        \
>>>>> +                _regs.r(si) = tmp;                                      \
>>>>> +            }                                                           \
>>>>> +            if ( extend_di )                                            \
>>>>> +            {                                                           \
>>>>> +                tmp = _regs.edi;                                        \
>>>>> +                _regs.r(di) = tmp;                                      \
>>>>> +            }                                                           \
>>>>
>>>> See commit 7225f13aef03 for how we chose to address similar issues elsewhere
>>>> in the emulator. I think we want to be consistent there. This will then also
>>>> eliminate ...
>>>>
>>>>> @@ -2029,7 +2039,12 @@ x86_emulate(
>>>>>          switch ( op_bytes )
>>>>>          {
>>>>>          case 2: _regs.ax = (int8_t)_regs.ax; break; /* cbw */
>>>>> -        case 4: _regs.r(ax) = (uint32_t)(int16_t)_regs.ax; break; /* cwde */
>>>>> +        case 4:
>>>>> +            {
>>>>> +                uint32_t tmp = (uint32_t)(int16_t)_regs.ax;
>>>>> +                _regs.r(ax) = tmp;
>>>>> +                break; /* cwde */
>>>>> +            }
>>>>
>>>> ... the odd brace placement here, as well as the inconsistency in the types
>>>> you used for the temporary variables (both really could have been unsigned
>>>> int; no need for a fixed-width type).
>>>
>>> Is this what you have in mind?
>>
>> No, and that's also not what the referenced commit did in a similar situation.
>>
>>> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
>>> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
>>> @@ -527,8 +527,8 @@ static inline void put_loop_count(
>>>          if ( !amd_like(ctxt) && mode_64bit() && ad_bytes == 4 )         \
>>>          {                                                               \
>>>              _regs.r(cx) = 0;                                            \
>>> -            if ( extend_si ) _regs.r(si) = _regs.esi;                   \
>>> -            if ( extend_di ) _regs.r(di) = _regs.edi;                   \
>>> +            if ( extend_si ) _regs.r(si) = (uint64_t)_regs.esi;         \
>>> +            if ( extend_di ) _regs.r(di) = (uint64_t)_regs.edi;         \
>>
>>             if ( extend_si ) _regs.r(si) = (uint32_t)_regs.r(si);       \
>>             if ( extend_di ) _regs.r(di) = (uint32_t)_regs.r(di);       \
>>
>> After all what the rule requires is that we use _the same_ field on both sides.
> 
> I see, thanks Jan. Yes I did try this version and worked as expected.

Except that ...

> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
> @@ -527,8 +527,8 @@ static inline void put_loop_count(
>          if ( !amd_like(ctxt) && mode_64bit() && ad_bytes == 4 )         \
>          {                                                               \
>              _regs.r(cx) = 0;                                            \
> -            if ( extend_si ) _regs.r(si) = _regs.esi;                   \
> -            if ( extend_di ) _regs.r(di) = _regs.edi;                   \
> +            if ( extend_si ) _regs.r(si) = (uint32_t)_regs.r(si);        \
> +            if ( extend_di ) _regs.r(di) = (uint32_t)_regs.r(di);        \
>          }                                                               \
>          goto complete_insn;                                             \
>      }                                                                   \
> @@ -2029,7 +2029,7 @@ x86_emulate(
>          switch ( op_bytes )
>          {
>          case 2: _regs.ax = (int8_t)_regs.ax; break; /* cbw */
> -        case 4: _regs.r(ax) = (uint32_t)(int16_t)_regs.ax; break; /* cwde */
> +        case 4: _regs.r(ax) = (int16_t)_regs.r(ax); break; /* cwde */

... the change in casts here renders this wrong now, afaict. We'd sign-
extend from 16 to 64 bits, rather than sign-extending to 32 bits and
then zero-extending to 64.

Jan


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Date: Wed, 30 Apr 2025 08:16:45 +0200
MIME-Version: 1.0
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Subject: Re: [PATCH v1 2/3] compat: address violations of MISRA C Rule 19.1
To: Stefano Stabellini 
Cc: victorm.lira@amd.com, Nicola Vetrini ,
 Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Federico Serafini ,
 Bertrand Marquis , xen-devel@lists.xenproject.org
References: 
 <74b0420ab20fc0204db14c0a1a4a68ed48b25a38.1745624090.git.victorm.lira@amd.com>
 
 
 
 
Content-Language: en-US
From: Jan Beulich 
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On 30.04.2025 00:02, Stefano Stabellini wrote:
> On Tue, 29 Apr 2025, Jan Beulich wrote:
>> On 29.04.2025 01:21, Stefano Stabellini wrote:
>>> On Mon, 28 Apr 2025, Jan Beulich wrote:
>>>> On 26.04.2025 01:42, victorm.lira@amd.com wrote:
>>>>> From: Nicola Vetrini 
>>>>>
>>>>> Rule 19.1 states: "An object shall not be assigned or copied
>>>>> to an overlapping object". Since the "call" and "compat_call" are
>>>>> fields of the same union, reading from one member and writing to
>>>>> the other violates the rule, while not causing Undefined Behavior
>>>>> due to their relative sizes. However, a dummy variable is used to
>>>>> address the violation and prevent the future possibility of
>>>>> incurring in UB.
>>>>
>>>> If there is such a concern, ...
>>>>
>>>>> --- a/xen/common/compat/multicall.c
>>>>> +++ b/xen/common/compat/multicall.c
>>>>> @@ -15,8 +15,13 @@ typedef int ret_t;
>>>>>  static inline void xlat_multicall_entry(struct mc_state *mcs)
>>>>>  {
>>>>>      int i;
>>>>> +    xen_ulong_t arg;
>>>>> +
>>>>>      for (i=0; i<6; i++)
>>>>> -        mcs->compat_call.args[i] = mcs->call.args[i];
>>>>> +    {
>>>>> +        arg = mcs->call.args[i];
>>>>> +        mcs->compat_call.args[i] = arg;
>>>>> +    }
>>>>>  }
>>>>
>>>> ... wouldn't it be of concern as well that the alternating parts of
>>>> the union are still accessed in a flip-flop manner? IOW we continue to
>>>> rely on the relative placement properties of the individual array
>>>> elements. To eliminate such a concern, I think the resulting code would
>>>> also want to be correct if iteration was swapped to work downwards.
>>>>
>>>> Also the scope of the temporary could certainly be the loop body rather
>>>> than the entire function.
>>>
>>> Wouldn't be safer to do this then?
>>>
>>> static inline void xlat_multicall_entry(struct mc_state *mcs)
>>> {
>>>     int i;
>>>     xen_ulong_t args[6];
>>>
>>>     for ( i = 0; i < 6; i++ )
>>>     {
>>>         args[i] = mcs->call.args[i];
>>>     }
>>>     for ( i = 0; i < 6; i++ )
>>>     {
>>>         mcs->compat_call.args[i] = args[i];
>>>     }
>>> }
>>>
>>> If you have any specific suggestions I think C code would be easier to
>>> understand than English.
>>
>> Kind of the above, yes, with the further remark below also taken care of.
>> So ...
>>
>>>> I also don't think it needs to be xen_ulong_t,
>>>> but maybe using unsigned int instead wouldn't make a difference in
>>>> generated code.
>>>
>>> Keeping the same type as mcs->call.args[i] would seem more obviously
>>> correct? Not to mention that unsigned long is what we defined as
>>> register type? If we really want to avoid xen_ulong_t, then it should
>>> be uintptr_t?
>>>
>>> We should stick to one type to be used as register type. On ARM, we
>>> defined register_t.
>>
>> ... with both taken into account e.g.:
>>
>>     typeof(mcs->compat_call.args[0]) args[ARRAY_SIZE(mcs->call.args)];
>>
>>     for ( i = 0; i < ARRAY_SIZE(args); i++ )
>>         args[i] = mcs->call.args[i];
>>
>>     memcpy(mcs->compat_call.args, args, sizeof(args));
>>
>> Of course there are variations possible. There also may want to be a
>> BUILD_BUG_ON() to "document" both array sizes match, even if the compat
>> form is auto-generated from the native one.
>>
>> Tangential: As of 2f531c122e95 ("x86: limit number of hypercall parameters
>> to 5") it's kind of bogus that we process 6 array elements here. This even
>> extends to an assertion in hypercall_xlat_continuation() and to some of
>> the handling in hypercall_create_continuation(). I guess I will want to
>> make a patch there, which of course I could make cover the Misra aspect
>> here as well.
> 
> Please do, that would be much appreciated. Thank you!

I already did ["{hyper,multi}call: further limit arguments to just 5"]; all I
need there is an Arm side ack.

> Also thanks for 2f531c122e95.

I fear I don't understand this part. But it probably also doesn't matter much.

Jan


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Subject: Re: [PATCH] xen/x86: allow Dom0 PVH to call XENMEM_exchange
To: Stefano Stabellini 
Cc: "Ragiadakou, Xenia" ,
 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 jason.andryuk@amd.com, agarciav@amd.com, xen-devel@lists.xenproject.org
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On 29.04.2025 23:52, Stefano Stabellini wrote:
> On Tue, 29 Apr 2025, Jan Beulich wrote:
>> On 28.04.2025 22:00, Stefano Stabellini wrote:
>>> On Mon, 28 Apr 2025, Jan Beulich wrote:
>>>> On 25.04.2025 22:19, Stefano Stabellini wrote:
>>>>> --- a/xen/arch/x86/mm.c
>>>>> +++ b/xen/arch/x86/mm.c
>>>>> @@ -4401,7 +4401,7 @@ int steal_page(
>>>>>      const struct domain *owner;
>>>>>      int rc;
>>>>>  
>>>>> -    if ( paging_mode_external(d) )
>>>>> +    if ( paging_mode_external(d) && !is_hardware_domain(d) )
>>>>>          return -EOPNOTSUPP;
>>>>>  
>>>>>      /* Grab a reference to make sure the page doesn't change under our feet */
>>>>
>>>> Is this (in particular the code following below here) a safe thing to do
>>>> when we don't properly refcount page references from the P2M, yet? It's
>>>> Dom0, yes, but even there I might see potential security implications (as
>>>> top violating privacy of a guest).
>>>
>>> I don't think I am following, could you please elaborate more? The
>>> change I am proposing is to allow Dom0 to share its own pages to the
>>> co-processor. DomUs are not in the picture. I would be happy to add
>>> further restriction to that effect. Is there something else you have in
>>> mind?
>>
>> Once "shared" with the PSP, how would Xen know that this sharing has stopped?
>> Without knowing, how could it safely give the same page to a DomU later on?
>> ("Safely" in both directions: Without compromising privacy of the DomU and
>> without compromising host safety / security.)
> 
> Why would Xen later assign the same page to a DomU? The page comes
> from the hardware domain, which, as of today, cannot be destroyed. BTW I
> realize it is a bit different, but we have been doing the same thing
> with Dom0 1:1 mapped on ARM since the start of the project.

The life cycle of the page within Dom0 may be such that a need arises to
move it elsewhere (balloon out, grant-transfer, and what not).

>>>>> --- a/xen/common/memory.c
>>>>> +++ b/xen/common/memory.c
>>>>> @@ -794,7 +794,7 @@ static long memory_exchange(XEN_GUEST_HANDLE_PARAM(xen_memory_exchange_t) arg)
>>>>>              rc = guest_physmap_add_page(d, _gfn(gpfn), mfn,
>>>>>                                          exch.out.extent_order) ?: rc;
>>>>>  
>>>>> -            if ( !paging_mode_translate(d) &&
>>>>> +            if ( (!paging_mode_translate(d) || is_hardware_domain(d)) &&
>>>>>                   __copy_mfn_to_guest_offset(exch.out.extent_start,
>>>>>                                              (i << out_chunk_order) + j,
>>>>>                                              mfn) )
>>>>
>>>> Wait, no: A PVH domain (Dom0 or not) can't very well make use of MFNs, can
>>>> it?
>>>
>>> One way or another Dom0 PVH needs to know the MFN to pass it to the
>>> co-processor.
>>
>> I see. That's pretty odd, though. I'm then further concerned of the order of
>> the chunks. At present we're rather lax, in permitting PVH and PV Dom0 the
>> same upper bound. With both CPU and I/O side translation there is, in
>> principle, no reason to permit any kind of contiguity. Of course there's a
>> performance aspect, but that hardly matters in the specific case here. Yet at
>> the same time, once we expose MFNs, contiguity will start mattering as soon
>> as any piece of memory needs to be larger than PAGE_SIZE. Which means it will
>> make tightening of the presently lax handling prone to regressions in this
>> new behavior you're introducing. What chunk size does the PSP driver require?
> 
> I don't know. The memory returned by XENMEM_exchange is contiguous,
> right? Are you worried that Xen cannot allocate the requested amount of
> memory contiguously?

That would be Dom0's problem then. But really for a translated guest the
exchanged chunks being contiguous shouldn't matter, correctness-wise. That is,
within Xen, rather than failing a request, we could choose to retry using
discontiguous chunks (contiguous only in GFN space). Such an (afaict)
otherwise correct change would break your use case, as it would invalidate the
MFN information passed back. (This fallback approach would similarly apply to
other related mem-ops. It's just that during domain creation the tool stack
has its own fallback, so it may not be of much use right now.)

> We have been using this patch for months now and it
> has been working correctly to this day.

Sure, that's a good data point. Yet not a proof of correctness.

Jan


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Date: Wed, 30 Apr 2025 08:37:19 +0200
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v4 1/7] docs/arm: Document Xen booting protocol on Armv8-R
To: Luca Fancellu , xen-devel@lists.xenproject.org
Cc: Stefano Stabellini , Julien Grall
 , Bertrand Marquis ,
 Volodymyr Babchuk 
References: <20250429152057.2380536-1-luca.fancellu@arm.com>
 <20250429152057.2380536-2-luca.fancellu@arm.com>
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On 29/04/2025 17:20, Luca Fancellu wrote:
> Document the requirement needed to boot Xen on Armv8-R platforms.
> 
> Signed-off-by: Luca Fancellu 
> ---
> v4 changes:
>  - New patch
> ---
>  docs/misc/arm/booting.txt | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/docs/misc/arm/booting.txt b/docs/misc/arm/booting.txt
> index 21ae74837dcc..719af74f1e69 100644
> --- a/docs/misc/arm/booting.txt
> +++ b/docs/misc/arm/booting.txt
> @@ -62,6 +62,14 @@ Xen relies on some settings the firmware has to configure in EL3 before starting
>  
>  * The bit SCR_EL3.HCE (resp. SCR.HCE for 32-bit ARM) must be set to 1.
>  
> +When Xen runs on Armv8-R, the highest exception level is EL2 and the only
> +available state is secure (S) on Arm64 and non secure (NS) on Arm32, hence the
> +above requirements need to be adjusted to this case:
> +
> +* Xen must be entered in S EL2 mode on Arm64 and in NS EL2 mode on Arm32.
> +
> +* Xen must be entered with MPU off and data cache disabled (SCTLR_EL2.M bit and
> +  SCTLR_EL2.C set to 0).
>  
>  [1] linux/Documentation/arm/booting.rst
>  Latest version: http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Documentation/arch/arm/booting.rst

Is the goal of this patch to only write firmware/bootloader requirements or
accommodate booting protocol in general? Asking because in this file there is a
requirement that Xen should be loaded below 10TB which afaict does not fit Armv8-R.

Other than that:
Reviewed-by: Michal Orzel 

~Michal



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Subject: Re: [RFC PATCH v2] xen: add libafl-qemu fuzzer support
To: Volodymyr Babchuk 
Cc: "xen-devel@lists.xenproject.org" ,
 Andrew Cooper ,
 Anthony PERARD ,
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 , Stefano Stabellini ,
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 Dario Faggioli , Juergen Gross ,
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References: <20250315003544.1101488-1-volodymyr_babchuk@epam.com>
 <5d519ffd-8747-4367-b92f-01c20a483e72@xen.org> <87cycue6l3.fsf@epam.com>
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On 30.04.2025 04:17, Volodymyr Babchuk wrote:
> Julien Grall  writes:
>>> --- /dev/null
>>> +++ b/xen/arch/arm/include/asm/libafl_qemu_defs.h
>>> @@ -0,0 +1,37 @@
>>
>> Missing license. Also, is this file taken from somewhere?
>>
> 
> I add MIT license, as libafl is dual licensed under Apache-2 and
> MIT. This file is based on libafl_qemu [1]
> 
>>> +#ifndef LIBAFL_QEMU_DEFS
>>> +#define LIBAFL_QEMU_DEFS
>>> +
>>> +#define LIBAFL_STRINGIFY(s) #s
>>> +#define XSTRINGIFY(s) LIBAFL_STRINGIFY(s)
>>> +
>>> +#if __STDC_VERSION__ >= 201112L
>>> +  #define STATIC_CHECKS                                   \
>>> +    _Static_assert(sizeof(void *) <= sizeof(libafl_word), \
>>> +                   "pointer type should not be larger and libafl_word");
>>> +#else
>>> +  #define STATIC_CHECKS
>>> +#endif
>>
>> No-one seems to use STATIC_CHECKS? Is this intended?
> 
> I used this file as is... But I'll rework this part.
> 
>>> +
>>> +#define LIBAFL_SYNC_EXIT_OPCODE 0x66f23a0f
>>> +#define LIBAFL_BACKDOOR_OPCODE 0x44f23a0f
>>
>> Are the opcode valid for arm32? If not, they should be protected with
>> #ifdef CONFIG_ARM_64.
>>
> 
> It is valid even for x86_64. They use the same opcode for x86_64, arm,
> aarch64 and riscv.

Wow. On x86-64 they rely on the (prefix-less) opcode 0f3af2 to not gain
any meaning. Somewhat similar on RISC-V, somewhere in MISC_MEM opcode
space. Pretty fragile. Not to speak of what the effect of using such an
opcode is on disassembly of surrounding code (at least for x86).

Jan


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Subject: Re: [PATCH v4 2/7] arm/mpu: Introduce MPU memory region map structure
To: Luca Fancellu , xen-devel@lists.xenproject.org
Cc: Penny Zheng ,
 Stefano Stabellini , Julien Grall ,
 Bertrand Marquis ,
 Volodymyr Babchuk , Wei Chen 
References: <20250429152057.2380536-1-luca.fancellu@arm.com>
 <20250429152057.2380536-3-luca.fancellu@arm.com>
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On 29/04/2025 17:20, Luca Fancellu wrote:
> From: Penny Zheng 
> 
> Introduce pr_t typedef which is a structure having the prbar
> and prlar members, each being structured as the registers of
> the aarch64 armv8-r architecture.
> 
> Signed-off-by: Penny Zheng 
> Signed-off-by: Wei Chen 
> Signed-off-by: Luca Fancellu 
Reviewed-by: Michal Orzel 

~Michal



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From: Luca Fancellu 
To: "xen-devel@lists.xenproject.org" 
CC: Stefano Stabellini , Julien Grall
	, Bertrand Marquis , Michal Orzel
	, Volodymyr Babchuk 
Subject: Re: [PATCH v4 3/7] arm/mpu: Provide and populate MPU C data
 structures
Thread-Topic: [PATCH v4 3/7] arm/mpu: Provide and populate MPU C data
 structures
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Date: Wed, 30 Apr 2025 06:56:00 +0000
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Hi all,

> diff --git a/xen/arch/arm/include/asm/mpu/regions.inc b/xen/arch/arm/incl=
ude/asm/mpu/regions.inc
> index 47868a152662..dc0306f8c5fc 100644
> --- a/xen/arch/arm/include/asm/mpu/regions.inc
> +++ b/xen/arch/arm/include/asm/mpu/regions.inc
> @@ -1,22 +1,50 @@
> /* SPDX-License-Identifier: GPL-2.0-only */
>=20
> +#include 
> #include 
> #include 
>=20
> /* Backgroud region enable/disable */
> #define SCTLR_ELx_BR    BIT(17, UL)
>=20
> +#define REGION_DISABLED_PRLAR   0x00    /* NS=3D0 ATTR=3D000 EN=3D0 */
> #define REGION_NORMAL_PRLAR     0x0f    /* NS=3D0 ATTR=3D111 EN=3D1 */
> #define REGION_DEVICE_PRLAR     0x09    /* NS=3D0 ATTR=3D100 EN=3D1 */
>=20
> +#define PRLAR_ELx_EN            0x1
> +
> +#ifdef CONFIG_ARM_64
> +#define XEN_MPUMAP_ENTRY_SHIFT  0x4     /* 16 byte structure */
> +
> +.macro store_pair reg1, reg2, dst
> +        stp \reg1, \reg2, [\dst]
> +.endm
> +
> +.macro invalidate_dcache_one reg
> +        dc ivac, \reg
> +.endm
> +
> +#else
> +#define XEN_MPUMAP_ENTRY_SHIFT  0x2     /* 8 byte structure */

This should be 0x3, my mistake!=20

Cheers,
Luca=


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From: Luca Fancellu 
To: "Orzel, Michal" 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Volodymyr Babchuk
	
Subject: Re: [PATCH v4 1/7] docs/arm: Document Xen booting protocol on Armv8-R
Thread-Topic: [PATCH v4 1/7] docs/arm: Document Xen booting protocol on
 Armv8-R
Thread-Index: AQHbuRpmN9lJogKQoUiVWa6WakCsQrO7wm+AgAAFy4A=
Date: Wed, 30 Apr 2025 06:58:33 +0000
Message-ID: 
References: <20250429152057.2380536-1-luca.fancellu@arm.com>
 <20250429152057.2380536-2-luca.fancellu@arm.com>
 
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Hi Michal,

> On 30 Apr 2025, at 07:37, Orzel, Michal  wrote:
>=20
>=20
>=20
> On 29/04/2025 17:20, Luca Fancellu wrote:
>> Document the requirement needed to boot Xen on Armv8-R platforms.
>>=20
>> Signed-off-by: Luca Fancellu 
>> ---
>> v4 changes:
>> - New patch
>> ---
>> docs/misc/arm/booting.txt | 8 ++++++++
>> 1 file changed, 8 insertions(+)
>>=20
>> diff --git a/docs/misc/arm/booting.txt b/docs/misc/arm/booting.txt
>> index 21ae74837dcc..719af74f1e69 100644
>> --- a/docs/misc/arm/booting.txt
>> +++ b/docs/misc/arm/booting.txt
>> @@ -62,6 +62,14 @@ Xen relies on some settings the firmware has to confi=
gure in EL3 before starting
>>=20
>> * The bit SCR_EL3.HCE (resp. SCR.HCE for 32-bit ARM) must be set to 1.
>>=20
>> +When Xen runs on Armv8-R, the highest exception level is EL2 and the on=
ly
>> +available state is secure (S) on Arm64 and non secure (NS) on Arm32, he=
nce the
>> +above requirements need to be adjusted to this case:
>> +
>> +* Xen must be entered in S EL2 mode on Arm64 and in NS EL2 mode on Arm3=
2.
>> +
>> +* Xen must be entered with MPU off and data cache disabled (SCTLR_EL2.M=
 bit and
>> +  SCTLR_EL2.C set to 0).
>>=20
>> [1] linux/Documentation/arm/booting.rst
>> Latest version: http://git.kernel.org/cgit/linux/kernel/git/torvalds/lin=
ux.git/tree/Documentation/arch/arm/booting.rst
>=20
> Is the goal of this patch to only write firmware/bootloader requirements =
or
> accommodate booting protocol in general? Asking because in this file ther=
e is a
> requirement that Xen should be loaded below 10TB which afaict does not fi=
t Armv8-R.

Yes you are right, but I think this still holds since we support 1TB on Arm=
v8-R at the moment?

Cheers,
Luca=


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Message-ID: 
Date: Wed, 30 Apr 2025 09:04:16 +0200
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v4 1/7] docs/arm: Document Xen booting protocol on Armv8-R
To: Luca Fancellu 
Cc: "xen-devel@lists.xenproject.org" ,
 Stefano Stabellini , Julien Grall ,
 Bertrand Marquis ,
 Volodymyr Babchuk 
References: <20250429152057.2380536-1-luca.fancellu@arm.com>
 <20250429152057.2380536-2-luca.fancellu@arm.com>
 
 
From: "Orzel, Michal" 
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On 30/04/2025 08:58, Luca Fancellu wrote:
> Hi Michal,
> 
>> On 30 Apr 2025, at 07:37, Orzel, Michal  wrote:
>>
>>
>>
>> On 29/04/2025 17:20, Luca Fancellu wrote:
>>> Document the requirement needed to boot Xen on Armv8-R platforms.
>>>
>>> Signed-off-by: Luca Fancellu 
>>> ---
>>> v4 changes:
>>> - New patch
>>> ---
>>> docs/misc/arm/booting.txt | 8 ++++++++
>>> 1 file changed, 8 insertions(+)
>>>
>>> diff --git a/docs/misc/arm/booting.txt b/docs/misc/arm/booting.txt
>>> index 21ae74837dcc..719af74f1e69 100644
>>> --- a/docs/misc/arm/booting.txt
>>> +++ b/docs/misc/arm/booting.txt
>>> @@ -62,6 +62,14 @@ Xen relies on some settings the firmware has to configure in EL3 before starting
>>>
>>> * The bit SCR_EL3.HCE (resp. SCR.HCE for 32-bit ARM) must be set to 1.
>>>
>>> +When Xen runs on Armv8-R, the highest exception level is EL2 and the only
>>> +available state is secure (S) on Arm64 and non secure (NS) on Arm32, hence the
>>> +above requirements need to be adjusted to this case:
>>> +
>>> +* Xen must be entered in S EL2 mode on Arm64 and in NS EL2 mode on Arm32.
>>> +
>>> +* Xen must be entered with MPU off and data cache disabled (SCTLR_EL2.M bit and
>>> +  SCTLR_EL2.C set to 0).
>>>
>>> [1] linux/Documentation/arm/booting.rst
>>> Latest version: http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Documentation/arch/arm/booting.rst
>>
>> Is the goal of this patch to only write firmware/bootloader requirements or
>> accommodate booting protocol in general? Asking because in this file there is a
>> requirement that Xen should be loaded below 10TB which afaict does not fit Armv8-R.
> 
> Yes you are right, but I think this still holds since we support 1TB on Armv8-R at the moment?
No, this value denotes max RAM size you support and not where Xen must be
loaded. On ARMv8-A, we support max 2TB of RAM but require Xen to be loaded
anywhere up to 10TB. Do we have the same limitation on ARMv8-R?

~Michal



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From: Luca Fancellu 
To: "Orzel, Michal" 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Volodymyr Babchuk
	
Subject: Re: [PATCH v4 1/7] docs/arm: Document Xen booting protocol on Armv8-R
Thread-Topic: [PATCH v4 1/7] docs/arm: Document Xen booting protocol on
 Armv8-R
Thread-Index: AQHbuRpmN9lJogKQoUiVWa6WakCsQrO7wm+AgAAFy4CAAAG8AIAABNmA
Date: Wed, 30 Apr 2025 07:22:08 +0000
Message-ID: <12D73845-62C1-46CD-AA15-376B230F2513@arm.com>
References: <20250429152057.2380536-1-luca.fancellu@arm.com>
 <20250429152057.2380536-2-luca.fancellu@arm.com>
 
 
 
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Date: Wed, 30 Apr 2025 09:41:26 +0200
From: Roger Pau =?utf-8?B?TW9ubsOp?= 
To: Jan Beulich 
Cc: Stefano Stabellini ,
	"Ragiadakou, Xenia" ,
	Andrew Cooper , jason.andryuk@amd.com,
	agarciav@amd.com, xen-devel@lists.xenproject.org
Subject: Re: [PATCH] xen/x86: allow Dom0 PVH to call XENMEM_exchange
Message-ID: 
References: 
 <19d9aec4-c21a-47a9-9c58-6bfcadbd22e0@suse.com>
 
 <06b66971-d8db-456f-8e83-a20ff7df8f5e@suse.com>
 
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On Wed, Apr 30, 2025 at 08:27:55AM +0200, Jan Beulich wrote:
> On 29.04.2025 23:52, Stefano Stabellini wrote:
> > On Tue, 29 Apr 2025, Jan Beulich wrote:
> >> On 28.04.2025 22:00, Stefano Stabellini wrote:
> >>> On Mon, 28 Apr 2025, Jan Beulich wrote:
> >>>> On 25.04.2025 22:19, Stefano Stabellini wrote:
> >>>>> --- a/xen/arch/x86/mm.c
> >>>>> +++ b/xen/arch/x86/mm.c
> >>>>> @@ -4401,7 +4401,7 @@ int steal_page(
> >>>>>      const struct domain *owner;
> >>>>>      int rc;
> >>>>>  
> >>>>> -    if ( paging_mode_external(d) )
> >>>>> +    if ( paging_mode_external(d) && !is_hardware_domain(d) )
> >>>>>          return -EOPNOTSUPP;
> >>>>>  
> >>>>>      /* Grab a reference to make sure the page doesn't change under our feet */
> >>>>
> >>>> Is this (in particular the code following below here) a safe thing to do
> >>>> when we don't properly refcount page references from the P2M, yet? It's
> >>>> Dom0, yes, but even there I might see potential security implications (as
> >>>> top violating privacy of a guest).
> >>>
> >>> I don't think I am following, could you please elaborate more? The
> >>> change I am proposing is to allow Dom0 to share its own pages to the
> >>> co-processor. DomUs are not in the picture. I would be happy to add
> >>> further restriction to that effect. Is there something else you have in
> >>> mind?
> >>
> >> Once "shared" with the PSP, how would Xen know that this sharing has stopped?
> >> Without knowing, how could it safely give the same page to a DomU later on?
> >> ("Safely" in both directions: Without compromising privacy of the DomU and
> >> without compromising host safety / security.)
> > 
> > Why would Xen later assign the same page to a DomU? The page comes
> > from the hardware domain, which, as of today, cannot be destroyed. BTW I
> > realize it is a bit different, but we have been doing the same thing
> > with Dom0 1:1 mapped on ARM since the start of the project.
> 
> The life cycle of the page within Dom0 may be such that a need arises to
> move it elsewhere (balloon out, grant-transfer, and what not).

I think it's up to dom0 to make sure the page is handled
appropriately, in order for it to keep it's special contiguity
properties.

If the PSP is not using the IOMMU page-tables for DMA accesses, and
the hardware domain can freely interact with it, there's no protection
from such device accessing any random MFN on the system, and hence no
refcounts or similar will protect from that.

The only protection would be Xen owning the device, and the hardware
domain using an emulated/mediated interface to communicate with it.  I
have no idea how complicated the PSP interface is, and whether it
would be feasible to trap and emulate/mediate accesses in Xen.

> >>>>> --- a/xen/common/memory.c
> >>>>> +++ b/xen/common/memory.c
> >>>>> @@ -794,7 +794,7 @@ static long memory_exchange(XEN_GUEST_HANDLE_PARAM(xen_memory_exchange_t) arg)
> >>>>>              rc = guest_physmap_add_page(d, _gfn(gpfn), mfn,
> >>>>>                                          exch.out.extent_order) ?: rc;
> >>>>>  
> >>>>> -            if ( !paging_mode_translate(d) &&
> >>>>> +            if ( (!paging_mode_translate(d) || is_hardware_domain(d)) &&
> >>>>>                   __copy_mfn_to_guest_offset(exch.out.extent_start,
> >>>>>                                              (i << out_chunk_order) + j,
> >>>>>                                              mfn) )
> >>>>
> >>>> Wait, no: A PVH domain (Dom0 or not) can't very well make use of MFNs, can
> >>>> it?
> >>>
> >>> One way or another Dom0 PVH needs to know the MFN to pass it to the
> >>> co-processor.
> >>
> >> I see. That's pretty odd, though. I'm then further concerned of the order of
> >> the chunks. At present we're rather lax, in permitting PVH and PV Dom0 the
> >> same upper bound. With both CPU and I/O side translation there is, in
> >> principle, no reason to permit any kind of contiguity. Of course there's a
> >> performance aspect, but that hardly matters in the specific case here. Yet at
> >> the same time, once we expose MFNs, contiguity will start mattering as soon
> >> as any piece of memory needs to be larger than PAGE_SIZE. Which means it will
> >> make tightening of the presently lax handling prone to regressions in this
> >> new behavior you're introducing. What chunk size does the PSP driver require?
> > 
> > I don't know. The memory returned by XENMEM_exchange is contiguous,
> > right? Are you worried that Xen cannot allocate the requested amount of
> > memory contiguously?
> 
> That would be Dom0's problem then. But really for a translated guest the
> exchanged chunks being contiguous shouldn't matter, correctness-wise. That is,
> within Xen, rather than failing a request, we could choose to retry using
> discontiguous chunks (contiguous only in GFN space). Such an (afaict)
> otherwise correct change would break your use case, as it would invalidate the
> MFN information passed back. (This fallback approach would similarly apply to
> other related mem-ops. It's just that during domain creation the tool stack
> has its own fallback, so it may not be of much use right now.)

I think the description in the public header needs to be expanded to
specify what the XENMEM_exchange does for translated guests, and
clearly write down that the underlying MFNs for the exchanged region
will be contiguous.  Possibly a new XENMEMF_ flag needs to be added to
request contiguous physical memory for the new range.

Sadly this also has the side effect of quite likely shattering
superpages for dom0 EPT/NPT, which will result in decreased dom0
performance.

We have so far avoided exposing MFNs to HVM/PVH, but I don't see much
way to avoid this if there's no option to use IOMMU or NPT page-tables
with the PSP and we don't want to intercept PSP accesses in Xen and
translate requests on the fly.

Thanks, Roger.


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Subject: Re: [PATCH v4 01/15] x86/msr: Add missing includes of 
To: =?UTF-8?Q?Ilpo_J=C3=A4rvinen?= 
Cc: LKML , kvm@vger.kernel.org,
        linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org,
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On 4/29/2025 2:45 AM, Ilpo Järvinen wrote:
>>   arch/x86/events/msr.c                                         | 3 +++
>>   arch/x86/events/perf_event.h                                  | 1 +
>>   arch/x86/events/probe.c                                       | 2 ++
> Under arch/x86/events/ a few files seem to be missing the include?


Most C files in arch/x86/events/ include arch/x86/events/perf_event.h,
thus they don't need to include  directly once
arch/x86/events/perf_event.h includes , and this patch does
that.


The following files include arch/x86/events/intel/uncore.h which 
includes arch/x86/events/perf_event.h, thus no change needed:
     arch/x86/events/intel/uncore.c
     arch/x86/events/intel/uncore_discovery.c
     arch/x86/events/intel/uncore_nhmex.c
     arch/x86/events/intel/uncore_snb.c
     arch/x86/events/intel/uncore_snbep.c

The following 2 files don't include arch/x86/events/perf_event.h so they
include  directly with this patch:
     arch/x86/events/msr.c
     arch/x86/events/probe.c

arch/x86/events/amd/uncore.c doesn't include
arch/x86/events/perf_event.h but includes  already.


So we are good in this directory, but it should be a separate patch with
the above explanation then.




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	 x5a/U6REmH0ZA==
Message-ID: 
Date: Wed, 30 Apr 2025 02:12:19 -0700
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v4 01/15] x86/msr: Add missing includes of 
To: Michael Kelley ,
        =?UTF-8?Q?Ilpo_J=C3=A4rvinen?= 
Cc: LKML ,
        "kvm@vger.kernel.org" ,
        "linux-perf-users@vger.kernel.org" ,
        "linux-hyperv@vger.kernel.org" ,
        "virtualization@lists.linux.dev" ,
        "linux-pm@vger.kernel.org" ,
        "linux-edac@vger.kernel.org" ,
        "xen-devel@lists.xenproject.org" ,
        "linux-acpi@vger.kernel.org" ,
        "linux-hwmon@vger.kernel.org" ,
        Netdev ,
        "platform-driver-x86@vger.kernel.org" ,
        "tglx@linutronix.de" ,
        "mingo@redhat.com" , "bp@alien8.de" ,
        "dave.hansen@linux.intel.com" ,
        "x86@kernel.org" , "hpa@zytor.com" ,
        "acme@kernel.org" ,
        "jgross@suse.com" ,
        "andrew.cooper3@citrix.com" ,
        "peterz@infradead.org" ,
        "namhyung@kernel.org" ,
        "mark.rutland@arm.com" ,
        "alexander.shishkin@linux.intel.com" ,
        "jolsa@kernel.org" ,
        "irogers@google.com" ,
        "adrian.hunter@intel.com" ,
        "kan.liang@linux.intel.com" ,
        "wei.liu@kernel.org" ,
        "ajay.kaher@broadcom.com" ,
        "bcm-kernel-feedback-list@broadcom.com"
 ,
        "tony.luck@intel.com" ,
        "pbonzini@redhat.com" ,
        "vkuznets@redhat.com" ,
        "seanjc@google.com" ,
        "luto@kernel.org"
 ,
        "boris.ostrovsky@oracle.com"
 ,
        "kys@microsoft.com" ,
        "haiyangz@microsoft.com" ,
        "decui@microsoft.com" ,
        "dapeng1.mi@linux.intel.com" 
References: <20250427092027.1598740-1-xin@zytor.com>
 <20250427092027.1598740-2-xin@zytor.com>
 
 
Content-Language: en-US
From: Xin Li 
Autocrypt: addr=xin@zytor.com; keydata=
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In-Reply-To: 
Content-Type: text/plain; charset=UTF-8; format=flowed
Content-Transfer-Encoding: 8bit

On 4/29/2025 9:20 PM, Michael Kelley wrote:
>> Also under hyperv/ not all files are covered but I'm a bit hesitant to
>> suggest a change there since I'm not sure if they (hypervisors) do
>> something special w.r.t. msr.
> I've worked on the Hyper-V code in Linux for 8 years or so, first as
> a Microsoft employee, and more recently as a retiree. 🙂 I'm not
> aware of anything special w.r.t. MSR access for Hyper-V guests.
> All the normal Linux code for accessing MSRs just works. Hyper-V
> *does* provide a set of synthetic MSRs that are unique to
> Hyper-V, but they are also accessed using normal Linux code. Of
> course, at runtime the access to these synthetic MSRs always
> traps to the hypervisor.
> 
> I'm planning to apply Xin Li's patch set and make sure nothing
> breaks for Hyper-V guests, and particularly when running as an
> SEV-SNP or TDX guest. Hopefully I can do that by early next week
> at the latest.

Hi Michael, I appreciate it!


From xen-devel-bounces@lists.xenproject.org Wed Apr 30 09:17:28 2025
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From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= 
Date: Wed, 30 Apr 2025 12:17:06 +0300 (EEST)
To: Xin Li 
cc: LKML , kvm@vger.kernel.org, 
    linux-perf-users@vger.kernel.org, linux-hyperv@vger.kernel.org, 
    virtualization@lists.linux.dev, linux-pm@vger.kernel.org, 
    linux-edac@vger.kernel.org, xen-devel@lists.xenproject.org, 
    linux-acpi@vger.kernel.org, linux-hwmon@vger.kernel.org, 
    Netdev , platform-driver-x86@vger.kernel.org, 
    tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, 
    dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, 
    acme@kernel.org, jgross@suse.com, andrew.cooper3@citrix.com, 
    peterz@infradead.org, namhyung@kernel.org, mark.rutland@arm.com, 
    alexander.shishkin@linux.intel.com, jolsa@kernel.org, irogers@google.com, 
    adrian.hunter@intel.com, kan.liang@linux.intel.com, wei.liu@kernel.org, 
    ajay.kaher@broadcom.com, bcm-kernel-feedback-list@broadcom.com, 
    tony.luck@intel.com, pbonzini@redhat.com, vkuznets@redhat.com, 
    seanjc@google.com, luto@kernel.org, boris.ostrovsky@oracle.com, 
    kys@microsoft.com, haiyangz@microsoft.com, decui@microsoft.com, 
    dapeng1.mi@linux.intel.com
Subject: Re: [PATCH v4 01/15] x86/msr: Add missing includes of 
In-Reply-To: 
Message-ID: 
References: <20250427092027.1598740-1-xin@zytor.com> <20250427092027.1598740-2-xin@zytor.com>  
MIME-Version: 1.0
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  while the remaining parts are likely unreadable without MIME-aware tools.

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On Wed, 30 Apr 2025, Xin Li wrote:

> On 4/29/2025 2:45 AM, Ilpo J=E4rvinen wrote:
> > >   arch/x86/events/msr.c                                         | 3 +=
++
> > >   arch/x86/events/perf_event.h                                  | 1 +
> > >   arch/x86/events/probe.c                                       | 2 +=
+
> > Under arch/x86/events/ a few files seem to be missing the include?
>=20
>=20
> Most C files in arch/x86/events/ include arch/x86/events/perf_event.h,
> thus they don't need to include  directly once
> arch/x86/events/perf_event.h includes , and this patch does
> that.
>=20
>=20
> The following files include arch/x86/events/intel/uncore.h which includes
> arch/x86/events/perf_event.h, thus no change needed:
>     arch/x86/events/intel/uncore.c
>     arch/x86/events/intel/uncore_discovery.c
>     arch/x86/events/intel/uncore_nhmex.c
>     arch/x86/events/intel/uncore_snb.c
>     arch/x86/events/intel/uncore_snbep.c
>=20
> The following 2 files don't include arch/x86/events/perf_event.h so they
> include  directly with this patch:
>     arch/x86/events/msr.c
>     arch/x86/events/probe.c
>=20
> arch/x86/events/amd/uncore.c doesn't include
> arch/x86/events/perf_event.h but includes  already.
>=20
>=20
> So we are good in this directory, but it should be a separate patch with
> the above explanation then.

Hi,

While this is not my subsystem so don't have the final say here, you had=20
to explain quite much to prove that (and reviewer would have to go through=
=20
the same places to check). Wouldn't it be much simpler for all if all=20
those .c files would just include  directly? No need to explain=
=20
anything then.

Also, similar to what you're doing for some tsc related things in this=20
series, somebody could in the future decide that hey, these static inline=
=20
functions (that use .*msr.*) belong to some other file, allowing msr.h to=
=20
be removed from arch/x86/events/perf_event.h. Again, we'd need to add=20
asm/msr.h into more .c files. This is the problem with relying on indirect=
=20
includes, they create hard to track dependencies for #includes done in .h=
=20
files. If we actively encourage to depend on indirect #include=20
dependencies like that, it makes it very hard to  _remove_ any #include=20
from a header file (as you have yourself discovered).

--=20
 i.
--8323328-830254077-1746003796=:7433--


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Feedback-ID: i1568416f:Fastmail
Date: Wed, 30 Apr 2025 12:56:11 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Jason Andryuk 
Cc: Julien Grall ,
	xen-devel ,
	Juergen Gross 
Subject: Re: NULL pointer dereference in xenbus_thread->...
Message-ID: 
References: 
 
 
 <0f8c0e27-e60d-4e64-bc8a-6cb407c67ab2@xen.org>
 
 
 
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Date: Wed, 30 Apr 2025 12:56:11 +0200
From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= 
To: Jason Andryuk 
Cc: Julien Grall ,
	xen-devel ,
	Juergen Gross 
Subject: Re: NULL pointer dereference in xenbus_thread->...

On Tue, Apr 29, 2025 at 08:59:45PM -0400, Jason Andryuk wrote:
> Hi Marek,
>=20
> On Wed, Apr 23, 2025 at 8:42=E2=80=AFAM Marek Marczykowski-G=C3=B3recki
>  wrote:
> >
> > On Sat, Jun 01, 2024 at 12:48:33AM +0200, Marek Marczykowski-G=C3=B3rec=
ki wrote:
> > > On Tue, Mar 26, 2024 at 11:00:50AM +0000, Julien Grall wrote:
> > > > Hi Marek,
> > > >
> > > > +Juergen for visibility
> > > >
> > > > When sending a bug report, I would suggest to CC relevant people as
> > > > otherwise it can get lost (not may people monitors Xen devel if the=
y are not
> > > > CCed).
> > > >
> > > > Cheers,
> > > >
> > > > On 25/03/2024 16:17, Marek Marczykowski-G=C3=B3recki wrote:
> > > > > On Sun, Oct 22, 2023 at 04:14:30PM +0200, Marek Marczykowski-G=C3=
=B3recki wrote:
> > > > > > On Mon, Aug 28, 2023 at 11:50:36PM +0200, Marek Marczykowski-G=
=C3=B3recki wrote:
> > > > > > > Hi,
> > > > > > >
> > > > > > > I've noticed in Qubes's CI failure like this:
> > > > > > >
> > > > > > > [  871.271292] BUG: kernel NULL pointer dereference, address:=
 0000000000000000
> > > > > > > [  871.275290] #PF: supervisor read access in kernel mode
> > > > > > > [  871.277282] #PF: error_code(0x0000) - not-present page
> > > > > > > [  871.279182] PGD 106fdb067 P4D 106fdb067 PUD 106fdc067 PMD 0
> > > > > > > [  871.281071] Oops: 0000 [#1] PREEMPT SMP NOPTI
> > > > > > > [  871.282698] CPU: 1 PID: 28 Comm: xenbus Not tainted 6.1.43=
-1.qubes.fc37.x86_64 #1
> > > > > > > [  871.285222] Hardware name: QEMU Standard PC (i440FX + PIIX=
, 1996), BIOS rel-1.16.0-0-gd239552-rebuilt.opensuse.org 04/01/2014
> > > > > > > [  871.288883] RIP: e030:__wake_up_common+0x4c/0x180
> > > > > > > [  871.292838] Code: 24 0c 89 4c 24 08 4d 85 c9 74 0a 41 f6 0=
1 04 0f 85 a3 00 00 00 48 8b 43 08 4c 8d 40 e8 48 83 c3 08 49 8d 40 18 48 3=
9 c3 74 5b <49> 8b 40 18 31 ed 4c 8d 70 e8 45 8b 28 41 f6 c5 04 75 5f 49 8b=
 40
> > > > > > > [  871.299776] RSP: e02b:ffffc900400f7e10 EFLAGS: 00010082
> > > > > > > [  871.301656] RAX: 0000000000000000 RBX: ffff88810541ce98 RC=
X: 0000000000000000
> > > > > > > [  871.304255] RDX: 0000000000000001 RSI: 0000000000000003 RD=
I: ffff88810541ce90
> > > > > > > [  871.306714] RBP: ffffc900400f0280 R08: ffffffffffffffe8 R0=
9: ffffc900400f7e68
> > > > > > > [  871.309937] R10: 0000000000007ff0 R11: ffff888100ad3000 R1=
2: ffffc900400f7e68
> > > > > > > [  871.312326] R13: 0000000000000000 R14: 0000000000000000 R1=
5: 0000000000000000
> > > > > > > [  871.314647] FS:  0000000000000000(0000) GS:ffff88813ff0000=
0(0000) knlGS:0000000000000000
> > > > > > > [  871.317677] CS:  10000e030 DS: 0000 ES: 0000 CR0: 00000000=
80050033
> > > > > > > [  871.319644] CR2: 0000000000000000 CR3: 00000001067fe000 CR=
4: 0000000000040660
> > > > > > > [  871.321973] Call Trace:
> > > > > > > [  871.322782]  
> > > > > > > [  871.323494]  ? show_trace_log_lvl+0x1d3/0x2ef
> > > > > > > [  871.324901]  ? show_trace_log_lvl+0x1d3/0x2ef
> > > > > > > [  871.326310]  ? show_trace_log_lvl+0x1d3/0x2ef
> > > > > > > [  871.327721]  ? __wake_up_common_lock+0x82/0xd0
> > > > > > > [  871.329147]  ? __die_body.cold+0x8/0xd
> > > > > > > [  871.330378]  ? page_fault_oops+0x163/0x1a0
> > > > > > > [  871.331691]  ? exc_page_fault+0x70/0x170
> > > > > > > [  871.332946]  ? asm_exc_page_fault+0x22/0x30
> > > > > > > [  871.334454]  ? __wake_up_common+0x4c/0x180
> > > > > > > [  871.335777]  __wake_up_common_lock+0x82/0xd0
> > > > > > > [  871.337183]  ? process_writes+0x240/0x240
> > > > > > > [  871.338461]  process_msg+0x18e/0x2f0
> > > > > > > [  871.339627]  xenbus_thread+0x165/0x1c0
> > > > > > > [  871.340830]  ? cpuusage_read+0x10/0x10
> > > > > > > [  871.342032]  kthread+0xe9/0x110
> > > > > > > [  871.343317]  ? kthread_complete_and_exit+0x20/0x20
> > > > > > > [  871.345020]  ret_from_fork+0x22/0x30
> > > > > > > [  871.346239]  
> > > > > > > [  871.347060] Modules linked in: snd_hda_codec_generic ledtr=
ig_audio snd_hda_intel snd_intel_dspcfg snd_intel_sdw_acpi snd_hda_codec sn=
d_hda_core snd_hwdep snd_seq snd_seq_device joydev snd_pcm intel_rapl_msr p=
pdev intel_rapl_common snd_timer pcspkr e1000e snd soundcore i2c_piix4 parp=
ort_pc parport loop fuse xenfs dm_crypt crct10dif_pclmul crc32_pclmul crc32=
c_intel polyval_clmulni polyval_generic floppy ghash_clmulni_intel sha512_s=
sse3 serio_raw virtio_scsi virtio_console bochs xhci_pci xhci_pci_renesas x=
hci_hcd qemu_fw_cfg drm_vram_helper drm_ttm_helper ttm ata_generic pata_acp=
i xen_privcmd xen_pciback xen_blkback xen_gntalloc xen_gntdev xen_evtchn sc=
si_dh_rdac scsi_dh_emc scsi_dh_alua uinput dm_multipath
> > > > > > > [  871.368892] CR2: 0000000000000000
> > > > > > > [  871.370160] ---[ end trace 0000000000000000 ]---
> > > > > > > [  871.371719] RIP: e030:__wake_up_common+0x4c/0x180
> > > > > > > [  871.373273] Code: 24 0c 89 4c 24 08 4d 85 c9 74 0a 41 f6 0=
1 04 0f 85 a3 00 00 00 48 8b 43 08 4c 8d 40 e8 48 83 c3 08 49 8d 40 18 48 3=
9 c3 74 5b <49> 8b 40 18 31 ed 4c 8d 70 e8 45 8b 28 41 f6 c5 04 75 5f 49 8b=
 40
> > > > > > > [  871.379866] RSP: e02b:ffffc900400f7e10 EFLAGS: 00010082
> > > > > > > [  871.381689] RAX: 0000000000000000 RBX: ffff88810541ce98 RC=
X: 0000000000000000
> > > > > > > [  871.383971] RDX: 0000000000000001 RSI: 0000000000000003 RD=
I: ffff88810541ce90
> > > > > > > [  871.386235] RBP: ffffc900400f0280 R08: ffffffffffffffe8 R0=
9: ffffc900400f7e68
> > > > > > > [  871.388521] R10: 0000000000007ff0 R11: ffff888100ad3000 R1=
2: ffffc900400f7e68
> > > > > > > [  871.390789] R13: 0000000000000000 R14: 0000000000000000 R1=
5: 0000000000000000
> > > > > > > [  871.393101] FS:  0000000000000000(0000) GS:ffff88813ff0000=
0(0000) knlGS:0000000000000000
> > > > > > > [  871.395671] CS:  10000e030 DS: 0000 ES: 0000 CR0: 00000000=
80050033
> > > > > > > [  871.397863] CR2: 0000000000000000 CR3: 00000001067fe000 CR=
4: 0000000000040660
> > > > > > > [  871.400441] Kernel panic - not syncing: Fatal exception
> > > > > > > [  871.402171] Kernel Offset: disabled
> > > > > > > (XEN) Hardware Dom0 crashed: rebooting machine in 5 seconds.
> > > > > > >
> > > > > > > It isn't the first time I see similar crash, but I can't real=
ly
> > > > > > > reproduce it reliably. Restarted test usually passes.
> > > > > > > Note this is Xen nested in KVM, so it could very well be some=
 oddity
> > > > > > > about nested virt, although looking at the stack trace, it's =
unlikely
> > > > > > > and more likely some race condition hit only on slower system.
> > > > > >
> > > > > > Recently I've got the same crash on a real system in domU too. =
And also
> > > > > > on nested on newer kernel 6.1.57 (here it happened in dom0). So=
, this is
> > > > > > still an issue and affects not only nested case :/
> > > > > >
> > > > > > > Unfortunately I don't have symbols for this kernel handy, but=
 there is a
> > > > > > > single wake_up() call in process_writes(), so it shouldn't be=
 an issue.
> > > > > > >
> > > > > > > Any ideas?
> > > > > > >
> > > > > > > Full log at https://openqa.qubes-os.org/tests/80779/logfile?f=
ilename=3Dserial0.txt
> > > > > >
> > > > > > More links at https://github.com/QubesOS/qubes-issues/issues/86=
38,
> > > > > > including more recent stack trace.
> > > > >
> > > > > Happens on 6.1.75 too (new stack trace I've added to the issue ab=
ove,
> > > > > but it's pretty similar).
> > >
> > > Recently I've got a report from another user about similar issue, on
> > > 6.6.29 this time. I also still encounter this issue once a month or s=
o,
> > > but the user claims they get it much more often:
> > > https://github.com/QubesOS/qubes-issues/issues/8638#issuecomment-2135=
419896
> > > The extra conditions reported by the user are:
> > > - old AMD system (KGPE-D16 with Opteron 6282 SE) requiring
> > >   `spec-ctrl=3Dibpb-entry=3Dno-pv` to remain usable
> > > - Whonix domU, which has a bunch of sysctl parameters changed, listed
> > >   at:
> > >   - https://github.com/Kicksecure/security-misc
> > >   - https://github.com/Kicksecure/security-misc/blob/master/usr/lib/s=
ysctl.d/990-security-misc.conf
> > >   (unsure which are relevant, maybe `vm.swappiness=3D1`?)
> >
> > I've got some more report confirming it's still happening on Linux
> > 6.12.18. Is there anything I can do to help fixing this? Maybe ask users
> > to enable some extra logging?
>=20
> Have you been able to capture a crash with debug symbols and run it
> through scripts/decode_stacktrace.sh?

Not really, as I don't have debug symbols for this kernel. And I can't
reliably reproduce it myself (for me it happens about once in a
month...). I can try reproducing debug symbols, theoretically I should
have all ingredients for it.

> I'm curious what process_msg+0x18e/0x2f0 is.  process_writes() has a
> direct call to wake_up(), but process_msg() calling req->cb(req) may
> be xs_wake_up() which is a thin wrapper over wake_up().

There is a code dump in the crash message, does it help?

> They make me wonder if req has been free()ed and at least partially
> zero-ed, but it still has wake_up() called.  The call stack here is
> reminiscent of the one here
> https://lore.kernel.org/xen-devel/Z_lJTyVipJJEpWg2@mail-itl/ and the
> unexpected value there is 0.

That's interesting idea, the one above I've seen only on 6.15-rc1 (and
no latter rc). But maybe?

> I haven't actually figured out a scenario where req would be kfree()ed
> early.  But the handling of kfree(req) being split between
> process_msg/writes() and xs_wait_for_reply() makes me a little uneasy.
>=20
> Regards,
> Jason

--=20
Best Regards,
Marek Marczykowski-G=C3=B3recki
Invisible Things Lab

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On 29/04/2025 17:20, Luca Fancellu wrote:
> Provide some data structure in the C world to track the MPU
> status, these structures will be filled at boot by the assembly
> early code with the boot MPU regions and afterwards they will be
> used at runtime.
> 
> Provide methods to update a bitmap created with DECLARE_BITMAP
> from the assembly code for both Arm32 and Arm64.
> 
> Modify Arm64 assembly boot code to reset any unused MPU region,
> initialise 'max_xen_mpumap' with the number of supported MPU
IMO this is not a good name because there's nothing there suggesting that this
variable stores the number. Maybe max_mpu_regions or max_xen_mpumap_regions.

> regions and modify the common asm macro 'prepare_xen_region' to
> load into xen_mpumap the MPU status and set/clear the bitmap
> 'xen_mpumap_mask' used to track the enabled regions.
> 
> Changed parameters name from 'base', 'limit' to 'tmp1' and 'tmp2'
> in order to use them also for intermediate operations on the
> MPU and the bitmap C data structures, the help on top of the macro
> is enough to understand how the macro will work and this will
> save some registers.
> 
> Provide a stub implementation for the pr_t type and few asm
> macro for the Arm32 to prevent compilation break, they will
> be implemented later.
> 
> Signed-off-by: Luca Fancellu 
> ---
> v4 changes:
>  - new patch
> ---
>  xen/arch/arm/arm64/mpu/head.S            | 13 +++++
>  xen/arch/arm/include/asm/arm32/mpu.h     | 25 +++++++++
>  xen/arch/arm/include/asm/bitmap-op.inc   | 67 ++++++++++++++++++++++
>  xen/arch/arm/include/asm/mpu.h           |  5 ++
>  xen/arch/arm/include/asm/mpu/mm.h        |  7 +++
>  xen/arch/arm/include/asm/mpu/regions.inc | 71 ++++++++++++++++++++----
>  xen/arch/arm/mpu/mm.c                    | 16 ++++++
>  7 files changed, 194 insertions(+), 10 deletions(-)
>  create mode 100644 xen/arch/arm/include/asm/arm32/mpu.h
>  create mode 100644 xen/arch/arm/include/asm/bitmap-op.inc
> 
> diff --git a/xen/arch/arm/arm64/mpu/head.S b/xen/arch/arm/arm64/mpu/head.S
> index 6d336cafbbaf..c0cac06b015f 100644
> --- a/xen/arch/arm/arm64/mpu/head.S
> +++ b/xen/arch/arm/arm64/mpu/head.S
> @@ -40,6 +40,9 @@ FUNC(enable_boot_cpu_mm)
>      mrs   x5, MPUIR_EL2
>      and   x5, x5, #NUM_MPU_REGIONS_MASK
>  
> +    ldr   x0, =max_xen_mpumap
> +    strb  w5, [x0]
> +
>      /* x0: region sel */
>      mov   x0, xzr
>      /* Xen text section. */
> @@ -74,6 +77,16 @@ FUNC(enable_boot_cpu_mm)
>      prepare_xen_region x0, x1, x2, x3, x4, x5, attr_prbar=REGION_DEVICE_PRBAR, attr_prlar=REGION_DEVICE_PRLAR
>  #endif
>  
> +zero_mpu:
> +    /* Reset remaining MPU regions */
> +    cmp   x0, x5
> +    beq   out_zero_mpu
> +    mov   x1, #0
> +    mov   x2, #1
Shouldn't we mark the region as emtpy (base == limit) when doing region clear?

> +    prepare_xen_region x0, x1, x2, x3, x4, x5, attr_prlar=REGION_DISABLED_PRLAR
> +    b     zero_mpu
> +
> +out_zero_mpu:
>      b    enable_mpu
>      ret
>  END(enable_boot_cpu_mm)
> diff --git a/xen/arch/arm/include/asm/arm32/mpu.h b/xen/arch/arm/include/asm/arm32/mpu.h
> new file mode 100644
> index 000000000000..1bdae4c309dc
> --- /dev/null
> +++ b/xen/arch/arm/include/asm/arm32/mpu.h
> @@ -0,0 +1,25 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +
> +#ifndef __ARM_ARM32_MPU_H__
> +#define __ARM_ARM32_MPU_H__
> +
> +#ifndef __ASSEMBLY__
> +
> +/* MPU Protection Region */
> +typedef struct {
> +    uint32_t prbar;
> +    uint32_t prlar;
> +} pr_t;
> +
> +#endif /* __ASSEMBLY__ */
> +
> +#endif /* __ARM_ARM32_MPU_H__ */
> +
> +/*
> + * Local variables:
> + * mode: C
> + * c-file-style: "BSD"
> + * c-basic-offset: 4
> + * indent-tabs-mode: nil
> + * End:
> + */
> diff --git a/xen/arch/arm/include/asm/bitmap-op.inc b/xen/arch/arm/include/asm/bitmap-op.inc
> new file mode 100644
> index 000000000000..e316d9417bb9
> --- /dev/null
> +++ b/xen/arch/arm/include/asm/bitmap-op.inc
I'll just skim through this file for now. I won't check for algorithm being correct.

> @@ -0,0 +1,67 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +
> +/*
> + * Sets a bit in a bitmap declared by DECLARE_BITMAP, symbol name passed through
> + * bitmap_symbol.
> + *
> + * bitmap_set_bit:      symbol of the bitmap declared by DECLARE_BITMAP
> + * bit:                 bit number to be set in the bitmap
> + * tmp1-tmp4:           temporary registers used for the computation
> + *
> + * Preserves bit.
Here you say it is preserved, yet...

> + * Output:
> + *  tmp1: Address of the word containing the changed bit.
> + * Clobbers: bit, tmp1, tmp2, tmp3, tmp4.
... here you list is as clobbered.

> + */
> +.macro bitmap_set_bit bitmap_symbol, bit, tmp1, tmp2, tmp3, tmp4
> +    adr_l   \tmp1, \bitmap_symbol
> +    mov     \tmp2, #(BYTES_PER_LONG - 1)
> +    mvn     \tmp2, \tmp2
> +    lsr     \tmp3, \bit, #3
> +    and     \tmp2, \tmp3, \tmp2
> +    add     \tmp1, \tmp1, \tmp2                 // bitmap_symbol + (bit/BITS_PER_LONG)*BYTES_PER_LONG
We don't use // style comments. Please use /* */

> +    and     \tmp2, \bit, #(BITS_PER_LONG - 1)   // bit offset inside word
> +
> +    ldr     \tmp3, [\tmp1]
> +    mov     \tmp4, #1
> +    lsl     \tmp4, \tmp4, \tmp2                 // (1 << offset)
> +    orr     \tmp3, \tmp3, \tmp4                 // set the bit
> +    str     \tmp3, [\tmp1]
> +.endm
> +
> +/*
> + * Clears a bit in a bitmap declared by DECLARE_BITMAP, symbol name passed
> + * through bitmap_symbol.
> + *
> + * bitmap_set_bit:      symbol of the bitmap declared by DECLARE_BITMAP
> + * bit:                 bit number to be set in the bitmap
> + * tmp1-tmp4:           temporary registers used for the computation
> + *
> + * Preserves bit.
> + * Output:
> + *  tmp1: Address of the word containing the changed bit.
> + * Clobbers: bit, tmp1, tmp2, tmp3, tmp4.
> + */
> +.macro bitmap_clear_bit bitmap_symbol, bit, tmp1, tmp2, tmp3, tmp4
> +    adr_l   \tmp1, \bitmap_symbol
> +    mov     \tmp2, #(BYTES_PER_LONG - 1)
> +    mvn     \tmp2, \tmp2
> +    lsr     \tmp3, \bit, #3
> +    and     \tmp2, \tmp3, \tmp2
> +    add     \tmp1, \tmp1, \tmp2                 // bitmap_symbol + (bit/BITS_PER_LONG)*BYTES_PER_LONG
> +    and     \tmp2, \bit, #(BITS_PER_LONG - 1)   // bit offset inside word
> +
> +    ldr     \tmp3, [\tmp1]
> +    mov     \tmp4, #1
> +    lsl     \tmp4, \tmp4, \tmp2                 // (1 << offset)
> +    mvn     \tmp4, \tmp4                        // ~(1 << offset)
> +    and     \tmp3, \tmp3, \tmp4                 // clear the bit
> +    str     \tmp3, [\tmp1]
> +.endm
> +
> +/*
> + * Local variables:
> + * mode: ASM
> + * indent-tabs-mode: nil
> + * End:
> + */
> diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h
> index bb83f5a5f580..1368b2eb990f 100644
> --- a/xen/arch/arm/include/asm/mpu.h
> +++ b/xen/arch/arm/include/asm/mpu.h
> @@ -8,6 +8,10 @@
>  
>  #if defined(CONFIG_ARM_64)
>  # include 
> +#elif defined(CONFIG_ARM_32)
> +# include 
> +#else
> +# error "unknown ARM variant"
>  #endif
>  
>  #define MPU_REGION_SHIFT  6
> @@ -17,6 +21,7 @@
>  #define NUM_MPU_REGIONS_SHIFT   8
>  #define NUM_MPU_REGIONS         (_AC(1, UL) << NUM_MPU_REGIONS_SHIFT)
>  #define NUM_MPU_REGIONS_MASK    (NUM_MPU_REGIONS - 1)
> +#define MAX_MPU_REGION_NR       255
Shouldn't you define it using NUM_MPU_REGIONS? It should have the same
definition as mask.

>  
>  #endif /* __ARM_MPU_H__ */
>  
> diff --git a/xen/arch/arm/include/asm/mpu/mm.h b/xen/arch/arm/include/asm/mpu/mm.h
> index bfd840fa5d31..28339259c458 100644
> --- a/xen/arch/arm/include/asm/mpu/mm.h
> +++ b/xen/arch/arm/include/asm/mpu/mm.h
> @@ -8,9 +8,16 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  
>  extern struct page_info *frame_table;
>  
> +extern uint8_t max_xen_mpumap;
> +
> +extern DECLARE_BITMAP(xen_mpumap_mask, MAX_MPU_REGION_NR);
> +
> +extern pr_t xen_mpumap[MAX_MPU_REGION_NR];
> +
>  #define virt_to_maddr(va) ((paddr_t)((vaddr_t)(va) & PADDR_MASK))
>  
>  #ifdef CONFIG_ARM_32
> diff --git a/xen/arch/arm/include/asm/mpu/regions.inc b/xen/arch/arm/include/asm/mpu/regions.inc
> index 47868a152662..dc0306f8c5fc 100644
> --- a/xen/arch/arm/include/asm/mpu/regions.inc
> +++ b/xen/arch/arm/include/asm/mpu/regions.inc
> @@ -1,22 +1,50 @@
>  /* SPDX-License-Identifier: GPL-2.0-only */
>  
> +#include 
>  #include 
>  #include 
>  
>  /* Backgroud region enable/disable */
>  #define SCTLR_ELx_BR    BIT(17, UL)
>  
> +#define REGION_DISABLED_PRLAR   0x00    /* NS=0 ATTR=000 EN=0 */
>  #define REGION_NORMAL_PRLAR     0x0f    /* NS=0 ATTR=111 EN=1 */
>  #define REGION_DEVICE_PRLAR     0x09    /* NS=0 ATTR=100 EN=1 */
>  
> +#define PRLAR_ELx_EN            0x1
> +
> +#ifdef CONFIG_ARM_64
> +#define XEN_MPUMAP_ENTRY_SHIFT  0x4     /* 16 byte structure */
> +
> +.macro store_pair reg1, reg2, dst
> +        stp \reg1, \reg2, [\dst]
Why 8 instead of 4 spaces?

> +.endm
> +
> +.macro invalidate_dcache_one reg
> +        dc ivac, \reg
> +.endm
> +
> +#else
> +#define XEN_MPUMAP_ENTRY_SHIFT  0x2     /* 8 byte structure */
> +
> +.macro store_pair reg1, reg2, dst
> +        nop
> +.endm
> +
> +.macro invalidate_dcache_one reg
> +        nop
> +.endm
> +
> +#endif
> +
>  /*
>   * Macro to prepare and set a EL2 MPU memory region.
>   * We will also create an according MPU memory region entry, which
>   * is a structure of pr_t,  in table \prmap.
>   *
>   * sel:         region selector
> - * base:        reg storing base address
> - * limit:       reg storing limit address
> + * tmp1:        reg storing base address
> + * tmp2:        reg storing limit address
I think this change is not needed. The parameters should be named base and limit
because this is what you expect caller to pass. Inside the function, you can do
whatever you want with these registers and caller does not care as long as you
mention if they are clobbered or not. Same in C world. You can reuse the
parameter for a different internal purpose inside a function.

>   * prbar:       store computed PRBAR_EL2 value
>   * prlar:       store computed PRLAR_EL2 value
>   * maxcount:    maximum number of EL2 regions supported
> @@ -28,13 +56,13 @@
>   * Preserves maxcount
>   * Output:
>   *  sel: Next available region selector index.
> - * Clobbers base, limit, prbar, prlar
> + * Clobbers tmp1, tmp2, prbar, prlar
>   *
>   * Note that all parameters using registers should be distinct.
>   */
> -.macro prepare_xen_region, sel, base, limit, prbar, prlar, maxcount, attr_prbar=REGION_DATA_PRBAR, attr_prlar=REGION_NORMAL_PRLAR
> +.macro prepare_xen_region, sel, tmp1, tmp2, prbar, prlar, maxcount, attr_prbar=REGION_DATA_PRBAR, attr_prlar=REGION_NORMAL_PRLAR
>      /* Check if the region is empty */
> -    cmp   \base, \limit
> +    cmp   \tmp1, \tmp2
>      beq   1f
>  
>      /* Check if the number of regions exceeded the count specified in MPUIR_EL2 */
> @@ -42,20 +70,43 @@
>      bge   fail_insufficient_regions
>  
>      /* Prepare value for PRBAR_EL2 reg and preserve it in \prbar.*/
> -    and   \base, \base, #MPU_REGION_MASK
> +    and   \tmp1, \tmp1, #MPU_REGION_MASK
>      mov   \prbar, #\attr_prbar
> -    orr   \prbar, \prbar, \base
> +    orr   \prbar, \prbar, \tmp1
>  
>      /* Limit address should be inclusive */
> -    sub   \limit, \limit, #1
> -    and   \limit, \limit, #MPU_REGION_MASK
> +    sub   \tmp2, \tmp2, #1
> +    and   \tmp2, \tmp2, #MPU_REGION_MASK
>      mov   \prlar, #\attr_prlar
> -    orr   \prlar, \prlar, \limit
> +    orr   \prlar, \prlar, \tmp2
>  
>      WRITE_SYSREG_ASM(\sel, PRSELR_EL2)
>      isb
>      WRITE_SYSREG_ASM(\prbar, PRBAR_EL2)
>      WRITE_SYSREG_ASM(\prlar, PRLAR_EL2)
> +
> +    /* Load pair into xen_mpumap and invalidate cache */
> +    mov   \tmp1, \sel
> +    lsl   \tmp1, \tmp1, #XEN_MPUMAP_ENTRY_SHIFT
You could get rid of these 2 extra instructions and instead do:

> +    adr_l \tmp2, xen_mpumap
> +    add   \tmp2, \tmp2, \tmp1
add \tmp2, \tmp2, \sel, lsl #XEN_MPUMAP_ENTRY_SHIFT
which combines everything in one go.

> +    store_pair \prbar, \prlar, \tmp2
> +    invalidate_dcache_one \tmp2
> +
> +    /* Set/clear xen_mpumap_mask bitmap */
> +    tst   \prlar, #PRLAR_ELx_EN
> +    bne   2f
> +    // Region is disabled, clear the bit in the bitmap
Comment style, here and elsewhere

> +    bitmap_clear_bit xen_mpumap_mask, \sel, \tmp1, \tmp2, \prbar, \prlar
> +    b     3f
> +
> +2:
> +    // Region is enabled, set the bit in the bitmap
> +    bitmap_set_bit xen_mpumap_mask, \sel, \tmp1, \tmp2, \prbar, \prlar
Wouldn't it be better to first clear the entire bitmap before setting up the
regions (i.e. all regions disabled) and then only have the set part here?

> +
> +3:
> +    invalidate_dcache_one \tmp1
> +
>      dsb   sy
>      isb
>  
> diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c
> index 07c8959f4ee9..9eab09ff2044 100644
> --- a/xen/arch/arm/mpu/mm.c
> +++ b/xen/arch/arm/mpu/mm.c
> @@ -7,9 +7,25 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  
>  struct page_info *frame_table;
>  
> +/* Maximum number of supported MPU memory regions by the EL2 MPU. */
> +uint8_t __ro_after_init max_xen_mpumap;
> +
> +/*
> + * Bitmap xen_mpumap_mask is to record the usage of EL2 MPU memory regions.
> + * Bit 0 represents MPU memory region 0, bit 1 represents MPU memory
> + * region 1, ..., and so on.
> + * If a MPU memory region gets enabled, set the according bit to 1.
> + */
> +DECLARE_BITMAP(xen_mpumap_mask, MAX_MPU_REGION_NR) \
> +    __section(".data.page_aligned");
> +
> +/* EL2 Xen MPU memory region mapping table. */
> +pr_t __section(".data.page_aligned") xen_mpumap[MAX_MPU_REGION_NR];
> +
>  static void __init __maybe_unused build_assertions(void)
>  {
>      /*

~Michal



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From: Volodymyr Babchuk 
To: Jan Beulich 
CC: "xen-devel@lists.xenproject.org" , Andrew
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	=?iso-8859-1?Q?Roger_Pau_Monn=E9?= , Stefano Stabellini
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	, Julien Grall 
Subject: Re: [RFC PATCH v2] xen: add libafl-qemu fuzzer support
Thread-Topic: [RFC PATCH v2] xen: add libafl-qemu fuzzer support
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Jan Beulich  writes:

> On 30.04.2025 04:17, Volodymyr Babchuk wrote:
>> Julien Grall  writes:
>>>> --- /dev/null
>>>> +++ b/xen/arch/arm/include/asm/libafl_qemu_defs.h
>>>> @@ -0,0 +1,37 @@
>>>
>>> Missing license. Also, is this file taken from somewhere?
>>>
>>=20
>> I add MIT license, as libafl is dual licensed under Apache-2 and
>> MIT. This file is based on libafl_qemu [1]
>>=20
>>>> +#ifndef LIBAFL_QEMU_DEFS
>>>> +#define LIBAFL_QEMU_DEFS
>>>> +
>>>> +#define LIBAFL_STRINGIFY(s) #s
>>>> +#define XSTRINGIFY(s) LIBAFL_STRINGIFY(s)
>>>> +
>>>> +#if __STDC_VERSION__ >=3D 201112L
>>>> +  #define STATIC_CHECKS                                   \
>>>> +    _Static_assert(sizeof(void *) <=3D sizeof(libafl_word), \
>>>> +                   "pointer type should not be larger and libafl_word=
");
>>>> +#else
>>>> +  #define STATIC_CHECKS
>>>> +#endif
>>>
>>> No-one seems to use STATIC_CHECKS? Is this intended?
>>=20
>> I used this file as is... But I'll rework this part.
>>=20
>>>> +
>>>> +#define LIBAFL_SYNC_EXIT_OPCODE 0x66f23a0f
>>>> +#define LIBAFL_BACKDOOR_OPCODE 0x44f23a0f
>>>
>>> Are the opcode valid for arm32? If not, they should be protected with
>>> #ifdef CONFIG_ARM_64.
>>>
>>=20
>> It is valid even for x86_64. They use the same opcode for x86_64, arm,
>> aarch64 and riscv.
>
> Wow. On x86-64 they rely on the (prefix-less) opcode 0f3af2 to not gain
> any meaning. Somewhat similar on RISC-V, somewhere in MISC_MEM opcode
> space. Pretty fragile. Not to speak of what the effect of using such an
> opcode is on disassembly of surrounding code (at least for x86).

Yeah, they made some questionable choices, and opcode selection is one
of them. Also, the whole libafl-qemu code quality is not to the highest
standard, but there are no better alternatives.

They just hacked into TCG translator code and are looking for the their
special opcodes byte-per-byte:

[1] https://github.com/AFLplusplus/qemu-libafl-bridge/blob/main/accel/tcg/t=
ranslator.c#L184


--=20
WBR, Volodymyr=


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From: Luca Fancellu 
To: "Orzel, Michal" 
CC: "xen-devel@lists.xenproject.org" , Stefano
 Stabellini , Julien Grall , Bertrand
 Marquis , Volodymyr Babchuk
	
Subject: Re: [PATCH v4 3/7] arm/mpu: Provide and populate MPU C data
 structures
Thread-Topic: [PATCH v4 3/7] arm/mpu: Provide and populate MPU C data
 structures
Thread-Index: AQHbuRprYh16Ok81YUq8WQ3ZmeL+z7O8CyoAgAAXmgA=
Date: Wed, 30 Apr 2025 12:22:37 +0000
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 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
From: Jan Beulich 
Subject: [PATCH] x86/alternatives: allow replacement code snippets to be
 re-used
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In a number of cases we use ALTERNATIVE_2 with both replacement insns /
insn sequences being identical. Avoid emitting the same code twice, and
instead alias the necessary helper labels to the existing ones.

Signed-off-by: Jan Beulich 

--- a/xen/arch/x86/include/asm/alternative-asm.h
+++ b/xen/arch/x86/include/asm/alternative-asm.h
@@ -51,6 +51,8 @@
 
 #define decl_repl(insn, nr)     .L\@_repl_s\()nr: insn; .L\@_repl_e\()nr:
 #define repl_len(nr)           (.L\@_repl_e\()nr  -     .L\@_repl_s\()nr)
+#define clone_repl(new, old)    .equiv .L\@_repl_s\()new, .L\@_repl_s\()old; \
+                                .equiv .L\@_repl_e\()new, .L\@_repl_e\()old
 
 #define as_max(a, b)           ((a) ^ (((a) ^ (b)) & -as_true((a) < (b))))
 
@@ -100,7 +102,11 @@
     .section .altinstr_replacement, "ax", @progbits
 
     decl_repl(\newinstr1, 1)
+    .ifnes "\newinstr2", "\newinstr1"
     decl_repl(\newinstr2, 2)
+    .else
+    clone_repl(2, 1)
+    .endif
 
     .popsection
 .endm


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Subject: Re: [PATCH v4 12/15] tools/xenpm: Print CPPC parameters for amd-cppc
 driver
To: Penny Zheng 
Cc: ray.huang@amd.com, Anthony PERARD ,
 xen-devel@lists.xenproject.org
References: <20250414074056.3696888-1-Penny.Zheng@amd.com>
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On 14.04.2025 09:40, Penny Zheng wrote:
> HWP, amd-cppc, amd-cppc-epp are all the implementation
> of ACPI CPPC (Collaborative Processor Performace Control),
> so we introduce cppc_mode flag to print CPPC-related para.
> 
> And HWP and amd-cppc-epp are both governor-less driver,
> so we introduce hw_auto flag to bypass governor-related print.

But in the EPP driver you use the information which governor is active.

> --- a/tools/misc/xenpm.c
> +++ b/tools/misc/xenpm.c
> @@ -790,9 +790,18 @@ static unsigned int calculate_activity_window(const xc_cppc_para_t *cppc,
>  /* print out parameters about cpu frequency */
>  static void print_cpufreq_para(int cpuid, struct xc_get_cpufreq_para *p_cpufreq)
>  {
> -    bool hwp = strcmp(p_cpufreq->scaling_driver, XEN_HWP_DRIVER_NAME) == 0;
> +    bool cppc_mode = false, hw_auto = false;
>      int i;
>  
> +    if ( !strcmp(p_cpufreq->scaling_driver, XEN_HWP_DRIVER_NAME) ||
> +         !strcmp(p_cpufreq->scaling_driver, XEN_AMD_CPPC_DRIVER_NAME) ||
> +         !strcmp(p_cpufreq->scaling_driver, XEN_AMD_CPPC_EPP_DRIVER_NAME) )
> +        cppc_mode = true;
> +
> +    if ( !strcmp(p_cpufreq->scaling_driver, XEN_HWP_DRIVER_NAME) ||
> +         !strcmp(p_cpufreq->scaling_driver, XEN_AMD_CPPC_EPP_DRIVER_NAME) )
> +        hw_auto = true;

Please avoid doing the same strcmp()s twice. There are several ways how to, so
I'm not going to make a particular suggestion.

> @@ -800,7 +809,7 @@ static void print_cpufreq_para(int cpuid, struct xc_get_cpufreq_para *p_cpufreq)
>          printf(" %d", p_cpufreq->affected_cpus[i]);
>      printf("\n");
>  
> -    if ( hwp )
> +    if ( hw_auto )
>          printf("cpuinfo frequency    : base [%"PRIu32"] max [%"PRIu32"]\n",
>                 p_cpufreq->cpuinfo_min_freq,
>                 p_cpufreq->cpuinfo_max_freq);
> --- a/xen/drivers/acpi/pmstat.c
> +++ b/xen/drivers/acpi/pmstat.c
> @@ -201,7 +201,7 @@ static int get_cpufreq_para(struct xen_sysctl_pm_op *op)
>      pmpt = processor_pminfo[op->cpuid];
>      policy = per_cpu(cpufreq_cpu_policy, op->cpuid);
>  
> -    if ( !pmpt || !pmpt->perf.states ||
> +    if ( !pmpt || ((pmpt->init & XEN_PX_INIT) && !pmpt->perf.states) ||
>           !policy || !policy->governor )
>          return -EINVAL;

This looks questionable all on its own. Where is it that ->perf.states allocation
is being avoided? I first thought it might be patch 06 which is related, but that
doesn't look to be it. In any event further down from here there is

    for ( i = 0; i < op->u.get_para.freq_num; i++ )
        data[i] = pmpt->perf.states[i].core_frequency * 1000;

i.e. an access to the array solely based on hypercall input.

Both this and ...

> @@ -461,9 +461,10 @@ int do_pm_op(struct xen_sysctl_pm_op *op)
>      switch ( op->cmd & PM_PARA_CATEGORY_MASK )
>      {
>      case CPUFREQ_PARA:
> -        if ( !(xen_processor_pmbits & XEN_PROCESSOR_PM_PX) )
> +        if ( !(xen_processor_pmbits & (XEN_PROCESSOR_PM_PX |
> +                                       XEN_PROCESSOR_PM_CPPC)) )
>              return -ENODEV;
> -        if ( !pmpt || !(pmpt->init & XEN_PX_INIT) )
> +        if ( !pmpt || !(pmpt->init & (XEN_PX_INIT | XEN_CPPC_INIT)) )
>              return -EINVAL;
>          break;
>      }

... this hunk also look as if they would belong (partly?) in maybe patch 03?
Even more so as per the title this is solely a tool stack (xenpm) change.

Jan


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Date: Wed, 30 Apr 2025 16:15:59 +0200
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Subject: Re: [PATCH v4 13/15] tools/xenpm: fix unnecessary
 scaling_available_frequencies in CPPC mode
To: Penny Zheng 
Cc: ray.huang@amd.com, Anthony PERARD ,
 Juergen Gross , xen-devel@lists.xenproject.org
References: <20250414074056.3696888-1-Penny.Zheng@amd.com>
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On 14.04.2025 09:40, Penny Zheng wrote:
> In `xenpm get-cpufreq-para `, para scaling_available_frequencies
> only has meaningful value when cpufreq driver in legacy P-states mode.
> 
> So we drop the "has_num" condition check, and mirror the ->gov_num check for
> both ->freq_num and ->cpu_num in xc_get_cpufreq_para().
> In get_cpufreq_para(), add "freq_num" check to avoid copying data to
> op->u.get_para.scaling_available_frequencies in CPPC mode.
> 
> Signed-off-by: Penny Zheng 

The description doesn't clarify where the bug is that's being fixed (from
the word "fix" in the subject). If there was one, surely there would also
want to be a Fixes: tag.

> ---
>  tools/libs/ctrl/xc_pm.c   | 45 +++++++++++++++++++++------------------
>  xen/drivers/acpi/pmstat.c | 11 ++++++----
>  2 files changed, 31 insertions(+), 25 deletions(-)

xenpm is entirely untouched, unlike suggested by the subject prefix.

> --- a/tools/libs/ctrl/xc_pm.c
> +++ b/tools/libs/ctrl/xc_pm.c
> @@ -212,34 +212,39 @@ int xc_get_cpufreq_para(xc_interface *xch, int cpuid,
>      DECLARE_NAMED_HYPERCALL_BOUNCE(scaling_available_governors,
>  			 user_para->scaling_available_governors,
>  			 user_para->gov_num * CPUFREQ_NAME_LEN * sizeof(char), XC_HYPERCALL_BUFFER_BOUNCE_BOTH);
> -    bool has_num = user_para->cpu_num && user_para->freq_num;
>  
> -    if ( has_num )
> +    if ( (user_para->cpu_num && !user_para->affected_cpus) ||
> +         (user_para->freq_num && !user_para->scaling_available_frequencies) ||
> +         (user_para->gov_num && !user_para->scaling_available_governors) )
> +    {
> +        errno = EINVAL;
> +        return -1;
> +    }
> +    if ( user_para->cpu_num )
>      {
> -        if ( (!user_para->affected_cpus)                    ||
> -             (!user_para->scaling_available_frequencies)    ||
> -             (user_para->gov_num && !user_para->scaling_available_governors) )
> -        {
> -            errno = EINVAL;
> -            return -1;
> -        }
>          ret = xc_hypercall_bounce_pre(xch, affected_cpus);
>          if ( ret )
>              return ret;
> +    }
> +    if ( user_para->freq_num )
> +    {
>          ret = xc_hypercall_bounce_pre(xch, scaling_available_frequencies);
>          if ( ret )
>              goto unlock_2;
> -        if ( user_para->gov_num )
> -            ret = xc_hypercall_bounce_pre(xch, scaling_available_governors);
> -        if ( ret )
> -            goto unlock_3;
> +    }
> +    if ( user_para->gov_num )
> +        ret = xc_hypercall_bounce_pre(xch, scaling_available_governors);
> +    if ( ret )
> +        goto unlock_3;

Yes, ret is initialized to 0, so functionally this is okay. But can we please
have all three pieces be as similar as possible, to make apparent that they're
_expected_ to be similar?

> --- a/xen/drivers/acpi/pmstat.c
> +++ b/xen/drivers/acpi/pmstat.c
> @@ -228,10 +228,13 @@ static int get_cpufreq_para(struct xen_sysctl_pm_op *op)
>      ret = copy_to_guest(op->u.get_para.affected_cpus,
>                          data, op->u.get_para.cpu_num);
>  
> -    for ( i = 0; i < op->u.get_para.freq_num; i++ )
> -        data[i] = pmpt->perf.states[i].core_frequency * 1000;
> -    ret += copy_to_guest(op->u.get_para.scaling_available_frequencies,
> -                         data, op->u.get_para.freq_num);
> +    if ( op->u.get_para.freq_num )
> +    {
> +        for ( i = 0; i < op->u.get_para.freq_num; i++ )
> +            data[i] = pmpt->perf.states[i].core_frequency * 1000;
> +        ret += copy_to_guest(op->u.get_para.scaling_available_frequencies,
> +                             data, op->u.get_para.freq_num);
> +    }

What's the effect of this change? Without it, the loop will simply have zero
iterations, and zero items will be copied to the guest. (As with the previous
patch, this would better be a tools-only one anyway.)

Else the question would be why the same isn't done for cpu_num, which is
becoming optional now, too (according to the libxc change).

Jan


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On 2025-04-30 06:56, Marek Marczykowski-Górecki wrote:
> On Tue, Apr 29, 2025 at 08:59:45PM -0400, Jason Andryuk wrote:
>> Hi Marek,
>>
>> On Wed, Apr 23, 2025 at 8:42 AM Marek Marczykowski-Górecki
>>  wrote:

>>> I've got some more report confirming it's still happening on Linux
>>> 6.12.18. Is there anything I can do to help fixing this? Maybe ask users
>>> to enable some extra logging?
>>
>> Have you been able to capture a crash with debug symbols and run it
>> through scripts/decode_stacktrace.sh?
> 
> Not really, as I don't have debug symbols for this kernel. And I can't
> reliably reproduce it myself (for me it happens about once in a
> month...). I can try reproducing debug symbols, theoretically I should
> have all ingredients for it.
> 
>> I'm curious what process_msg+0x18e/0x2f0 is.  process_writes() has a
>> direct call to wake_up(), but process_msg() calling req->cb(req) may
>> be xs_wake_up() which is a thin wrapper over wake_up().
> 
> There is a code dump in the crash message, does it help?

That's a little deeper in the call chain.  If you have a vmlinux or 
bzImage with a matching stacktrace, that would work to look up the 
address in the disassembly.  So if you don't have a matching pair, maybe 
try to catch it the next time.

>> They make me wonder if req has been free()ed and at least partially
>> zero-ed, but it still has wake_up() called.  The call stack here is
>> reminiscent of the one here
>> https://lore.kernel.org/xen-devel/Z_lJTyVipJJEpWg2@mail-itl/ and the
>> unexpected value there is 0.
> 
> That's interesting idea, the one above I've seen only on 6.15-rc1 (and
> no latter rc). But maybe?

I am guessing, so I could be wrong.  NULL pointer and unexpected zero 
value are both 0 at least.  Also Whonix looks like it may use 
init_on_free=1 to zero memory at free time.

Regards,
Jason


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Subject: Re: [PATCH v4 14/15] tools/xenpm: remove px_cap dependency check for
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To: Penny Zheng 
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On 14.04.2025 09:40, Penny Zheng wrote:
> In `xenpm start` command, the monitor of average frequency shall
> not depend on the existence of legacy P-states, so removing "px_cap"
> dependancy check.

Well, yes, I agree there. But can you explain to me what the file scope
"avgfreq" is good for? Shouldn't we go farther and tidy things more
thoroughly? Much like show_cpufreq_by_cpuid(), we could call
get_avgfreq_by_cpuid() right before printing. (It escapes me altogether
why start_gather_func() would pre-fill the array. Unlike cxstat_start[]
and pxstat_start[] that's not incrementally or differentially used data.)

Doing that would make yet more obvious that the px_cap part of the
condition was bogus presumably from the very start. (I'm further inclined
to say that this change should also have a Fixes: tag.)

Jan


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Date: Wed, 30 Apr 2025 17:01:37 +0200
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Subject: Re: [PATCH v4 15/15] xen/xenpm: Adapt SET/GET_CPUFREQ_CPPC
 xen_sysctl_pm_op for amd-cppc driver
To: Penny Zheng 
Cc: ray.huang@amd.com, Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 xen-devel@lists.xenproject.org
References: <20250414074056.3696888-1-Penny.Zheng@amd.com>
 <20250414074056.3696888-16-Penny.Zheng@amd.com>
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In-Reply-To: <20250414074056.3696888-16-Penny.Zheng@amd.com>
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On 14.04.2025 09:40, Penny Zheng wrote:
> Introduce helper set_amd_cppc_para and get_amd_cppc_para to
> SET/GET CPPC-related para for amd-cppc/amd-cppc-epp driver.
> 
> Signed-off-by: Penny Zheng 
> ---
> v1 -> v2:
> - Give the variable des_perf an initializer of 0
> - Use the strncmp()s directly in the if()
> ---
> v3 -> v4
> - refactor comments
> - remove double blank lines
> - replace amd_cppc_in_use flag with XEN_PROCESSOR_PM_CPPC
> ---
>  xen/arch/x86/acpi/cpufreq/amd-cppc.c | 121 +++++++++++++++++++++++++++
>  xen/drivers/acpi/pmstat.c            |  22 ++++-
>  xen/include/acpi/cpufreq/cpufreq.h   |   4 +
>  3 files changed, 143 insertions(+), 4 deletions(-)

Along the lines of the remark on an earlier patch: Where's the "xenpm"
change here, that the subject prefix kind of makes one expect? Doesn't
that want to be "cpufreq:" instead?

> --- a/xen/arch/x86/acpi/cpufreq/amd-cppc.c
> +++ b/xen/arch/x86/acpi/cpufreq/amd-cppc.c
> @@ -540,6 +540,127 @@ static int cf_check amd_cppc_epp_set_policy(struct cpufreq_policy *policy)
>      return 0;
>  }
>  
> +int get_amd_cppc_para(unsigned int cpu,
> +                      struct xen_cppc_para *cppc_para)
> +{
> +    const struct amd_cppc_drv_data *data = per_cpu(amd_cppc_drv_data, cpu);
> +
> +    if ( data == NULL )
> +        return -ENODATA;
> +
> +    cppc_para->features         = 0;

What's the purpose of the field when you store literal 0 into it?

> +    cppc_para->lowest           = data->caps.lowest_perf;
> +    cppc_para->lowest_nonlinear = data->caps.lowest_nonlinear_perf;
> +    cppc_para->nominal          = data->caps.nominal_perf;
> +    cppc_para->highest          = data->caps.highest_perf;
> +    cppc_para->minimum          = data->req.min_perf;
> +    cppc_para->maximum          = data->req.max_perf;
> +    cppc_para->desired          = data->req.des_perf;
> +    cppc_para->energy_perf      = data->req.epp;
> +
> +    return 0;
> +}
> +
> +int set_amd_cppc_para(const struct cpufreq_policy *policy,
> +                      const struct xen_set_cppc_para *set_cppc)
> +{
> +    unsigned int cpu = policy->cpu;
> +    struct amd_cppc_drv_data *data = per_cpu(amd_cppc_drv_data, cpu);
> +    uint8_t max_perf, min_perf, des_perf = 0, epp;
> +
> +    if ( data == NULL )
> +        return -ENOENT;
> +
> +    /* Validate all parameters - Disallow reserved bits. */
> +    if ( set_cppc->minimum > UINT8_MAX || set_cppc->maximum > UINT8_MAX ||
> +         set_cppc->desired > UINT8_MAX || set_cppc->energy_perf > UINT8_MAX )
> +        return -EINVAL;

Where is what the latter half of the comment says?

> +    /* Only allow values if params bit is set. */
> +    if ( (!(set_cppc->set_params & XEN_SYSCTL_CPPC_SET_DESIRED) &&
> +          set_cppc->desired) ||
> +         (!(set_cppc->set_params & XEN_SYSCTL_CPPC_SET_MINIMUM) &&
> +          set_cppc->minimum) ||
> +         (!(set_cppc->set_params & XEN_SYSCTL_CPPC_SET_MAXIMUM) &&
> +          set_cppc->maximum) ||
> +         (!(set_cppc->set_params & XEN_SYSCTL_CPPC_SET_ENERGY_PERF) &&
> +          set_cppc->energy_perf) )
> +        return -EINVAL;
> +
> +    /* Activity window not supported in MSR */
> +    if ( set_cppc->set_params & XEN_SYSCTL_CPPC_SET_ACT_WINDOW )
> +        return -EOPNOTSUPP;
> +
> +    /* Return if there is nothing to do. */
> +    if ( set_cppc->set_params == 0 )
> +        return 0;
> +
> +    epp = per_cpu(epp_init, cpu);
> +    /*
> +     * Apply presets:
> +     * XEN_SYSCTL_CPPC_SET_DESIRED reflects whether desired perf is set, which
> +     * is also the flag to distiguish between passive mode and active mode.
> +     * When it is set, CPPC in passive mode, only
> +     * XEN_SYSCTL_CPPC_SET_PRESET_NONE could be chosen, where min_perf =
> +     * lowest_nonlinear_perf to ensures performance in P-state range.
> +     * when it is not set, CPPC in active mode, three different profile
> +     * XEN_SYSCTL_CPPC_SET_PRESET_POWERSAVE/PERFORMANCE/BALANCE are provided,
> +     * where min_perf = lowest_perf having T-state range of performance.
> +     */

I fear I'm struggling to parse some of this, making it difficult to suggest
possible adjustments (as I can't derive what is meant to be said). Plus where's
the term T-state coming from all of the sudden?

> +    switch ( set_cppc->set_params & XEN_SYSCTL_CPPC_SET_PRESET_MASK )
> +    {
> +    case XEN_SYSCTL_CPPC_SET_PRESET_POWERSAVE:
> +        if ( set_cppc->set_params & XEN_SYSCTL_CPPC_SET_DESIRED )
> +            return -EINVAL;
> +        min_perf = data->caps.lowest_perf;
> +        /* Lower max frequency to nominal */
> +        max_perf = data->caps.nominal_perf;

This combination is still not really in line with ...

> +        epp = CPPC_ENERGY_PERF_MAX_POWERSAVE;
> +        break;
> +
> +    case XEN_SYSCTL_CPPC_SET_PRESET_PERFORMANCE:
> +        if ( set_cppc->set_params & XEN_SYSCTL_CPPC_SET_DESIRED )
> +            return -EINVAL;
> +        /* Increase idle frequency to highest */
> +        min_perf = data->caps.highest_perf;
> +        max_perf = data->caps.highest_perf;

... this. If "performance" means "always highest", why would "powersave" not
mean "always lowest"?

> +        epp = CPPC_ENERGY_PERF_MAX_PERFORMANCE;
> +        break;
> +
> +    case XEN_SYSCTL_CPPC_SET_PRESET_BALANCE:
> +        if ( set_cppc->set_params & XEN_SYSCTL_CPPC_SET_DESIRED )
> +            return -EINVAL;
> +        min_perf = data->caps.lowest_perf;
> +        max_perf = data->caps.highest_perf;
> +        epp = CPPC_ENERGY_PERF_BALANCE;
> +        break;
> +
> +    case XEN_SYSCTL_CPPC_SET_PRESET_NONE:
> +        min_perf = data->caps.lowest_nonlinear_perf;

As before: What's the significance of using the non-linear value here? I
asked to add comments for anything that's potentially unexpected to the
reader, but here there's still none.

> +        max_perf = data->caps.highest_perf;
> +        break;
> +
> +    default:
> +        return -EINVAL;
> +    }
> +
> +    /* Further customize presets if needed */
> +    if ( set_cppc->set_params & XEN_SYSCTL_CPPC_SET_MINIMUM )
> +        min_perf = set_cppc->minimum;
> +
> +    if ( set_cppc->set_params & XEN_SYSCTL_CPPC_SET_MAXIMUM )
> +        max_perf = set_cppc->maximum;
> +
> +    if ( set_cppc->set_params & XEN_SYSCTL_CPPC_SET_ENERGY_PERF )
> +        epp = set_cppc->energy_perf;
> +
> +    if ( set_cppc->set_params & XEN_SYSCTL_CPPC_SET_DESIRED )
> +        des_perf = set_cppc->desired;
> +
> +    amd_cppc_write_request(cpu, min_perf, des_perf, max_perf, epp);
> +    return 0;
> +}

Nit (as before): Blank line please ahead of the main "return" of a function.

> --- a/xen/drivers/acpi/pmstat.c
> +++ b/xen/drivers/acpi/pmstat.c
> @@ -257,7 +257,18 @@ static int get_cpufreq_para(struct xen_sysctl_pm_op *op)
>           !strncmp(op->u.get_para.scaling_driver, XEN_HWP_DRIVER_NAME,
>                    CPUFREQ_NAME_LEN) )
>          ret = get_hwp_para(policy->cpu, &op->u.get_para.u.cppc_para);
> -    else
> +    else if ( !strncmp(op->u.get_para.scaling_driver,
> +                       XEN_AMD_CPPC_DRIVER_NAME,
> +                       CPUFREQ_NAME_LEN) ||
> +              !strncmp(op->u.get_para.scaling_driver,
> +                       XEN_AMD_CPPC_EPP_DRIVER_NAME,
> +                       CPUFREQ_NAME_LEN) )

How about using e.g. strstr(..., XEN_AMD_CPPC_DRIVER_NAME) here? (It's odd
anyway that we need to resort to string comparisons here.)

> +        ret = get_amd_cppc_para(policy->cpu, &op->u.get_para.u.cppc_para);
> +
> +    if ( strncmp(op->u.get_para.scaling_driver, XEN_HWP_DRIVER_NAME,
> +                 CPUFREQ_NAME_LEN) &&
> +         strncmp(op->u.get_para.scaling_driver, XEN_AMD_CPPC_EPP_DRIVER_NAME,
> +                 CPUFREQ_NAME_LEN) )
>      {
>          if ( !(scaling_available_governors =
>                 xzalloc_array(char, gov_num * CPUFREQ_NAME_LEN)) )

Isn't it the non-EPP driver which is governor-independent?

Jan


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Subject: Re: [PATCH v3 02/20] xen: introduce CONFIG_SYSCTL
To: Penny Zheng 
Cc: ray.huang@amd.com, Stefano Stabellini ,
 Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Sergiy Kibrik , xen-devel@lists.xenproject.org
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On 21.04.2025 09:37, Penny Zheng wrote:
> From: Stefano Stabellini 
> 
> We introduce a new Kconfig CONFIG_SYSCTL, which shall only be disabled
> on some dom0less systems, to reduce Xen footprint.

What about the PV shim on x86? That's also relevant ...

> --- a/xen/common/Kconfig
> +++ b/xen/common/Kconfig
> @@ -581,4 +581,15 @@ config BUDDY_ALLOCATOR_SIZE
>  	  Amount of memory reserved for the buddy allocator to serve Xen heap,
>  	  working alongside the colored one.
>  
> +menu "Supported hypercall interfaces"
> +	visible if EXPERT
> +
> +config SYSCTL
> +	bool "Enable sysctl hypercall"
> +	default y
> +	help
> +	  This option shall only be disabled on some dom0less systems,
> +	  to reduce Xen footprint.

... for the help text here then.

Jan


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Subject: Re: [PATCH v3 01/20] xen/x86: remove "depends on !PV_SHIM_EXCLUSIVE"
To: Penny Zheng 
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 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
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On 21.04.2025 09:37, Penny Zheng wrote:
> Remove all "depends on !PV_SHIM_EXCLUSIVE" (also the functionally
> equivalent "if !...") in Kconfig file, since negative dependancy will badly
> affect allyesconfig.
> This commit is based on "x86: provide an inverted Kconfig control for
> shim-exclusive mode"[1]

Recall me asking to avoid wording like "This commit" in commit messages?
Also personally I consider "is based on" ambiguous: It could also mean the
one here needs to go on top of that other one. It's not entirely clear to
me what kind of (relevant) information you're trying to convey with this
sentence. Surely you didn't really need to even look at that patch of mine
to find all the !PV_SHIM_EXCLUSIVE; that's a matter of a simply grep.

> ---
>  xen/arch/x86/Kconfig      | 4 ----
>  xen/arch/x86/hvm/Kconfig  | 1 -
>  xen/drivers/video/Kconfig | 4 ++--
>  3 files changed, 2 insertions(+), 7 deletions(-)

With the changes here, what does this mean for the in-tree shim build, or
any others using xen/arch/x86/configs/pvshim_defconfig as the basis? You
aren't altering that file, so I expect the binary produced will change
significantly (when it shouldn't, unless explicitly stated otherwise in
the description, which may be warranted for SHADOW_PAGING).

Jan


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Subject: Re: [PATCH v3 02/20] xen: introduce CONFIG_SYSCTL
To: Penny Zheng 
Cc: ray.huang@amd.com, Stefano Stabellini ,
 Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Sergiy Kibrik , xen-devel@lists.xenproject.org
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On 21.04.2025 09:37, Penny Zheng wrote:
> --- a/xen/common/Kconfig
> +++ b/xen/common/Kconfig
> @@ -581,4 +581,15 @@ config BUDDY_ALLOCATOR_SIZE
>  	  Amount of memory reserved for the buddy allocator to serve Xen heap,
>  	  working alongside the colored one.
>  
> +menu "Supported hypercall interfaces"
> +	visible if EXPERT
> +
> +config SYSCTL
> +	bool "Enable sysctl hypercall"
> +	default y

Oh, and - just to re-iterate what I said earlier in the context of another patch:
Imo you would better introduce the option without prompt (simply "defbool y"),
and make it user selectable only in the final patch. That'll eliminate the need
for transient "#ifdef CONFIG_SYSCTL", i.e. reduce overall code churn.

Jan


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Subject: Re: [PATCH v3 09/20] xen/pmstat: consolidate code into pmstat.c
To: Penny Zheng 
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On 21.04.2025 09:37, Penny Zheng wrote:
> We move the following functions into drivers/acpi/pmstat.c, as they
> are all designed for performance statistic:
> - cpufreq_residency_update
> - cpufreq_statistic_reset
> - cpufreq_statistic_update
> - cpufreq_statistic_init
> - cpufreq_statistic_exit
> Consequently, variable "cpufreq_statistic_data" and "cpufreq_statistic_lock"
> shall become static.
> We also move out acpi_set_pdc_bits(), as it is the handler for sub-hypercall
> XEN_PM_PDC, and shall stay with the other handlers together in
> drivers/cpufreq/cpufreq.c.
> 
> Various style corrections shall be applied at the same time while moving these
> functions, including:
> - brace for if() and for() shall live at a seperate line
> - add extra space before and after bracket of if() and for()
> - use array notation
> - convert uint32_t into unsigned int
> - convert u32 into uint32_t
> 
> Signed-off-by: Penny Zheng 
> Reviewed-by: Stefano Stabellini 

Acked-by: Jan Beulich 

This again looks like it might be independent of earlier patches, and hence
might be able to go in right away. Please may I remind you to clarify such
aspects while submitting?

Jan


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From: Andrew Cooper 
To: Xen-devel 
Cc: Andrew Cooper ,
	Jan Beulich ,
	=?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= 
Subject: [PATCH] x86/intel: Move mcu_opt_ctrl_* into __ro_after_init
Date: Wed, 30 Apr 2025 16:27:20 +0100
Message-Id: <20250430152720.602045-1-andrew.cooper3@citrix.com>
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They're only modified by set_in_mcu_opt_ctrl() which is an __init function.

No functional change.

Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
CC: Roger Pau Monné 

In principle:
  Fixes: 39a40f3835ef ("x86/spec-ctrl: Clean up MSR_MCU_OPT_CTRL handling")

seeing as __ro_after_init existed at the time, but it was tied up in a
security series and __ro_after_init was very new at the time.
---
 xen/arch/x86/cpu/intel.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c
index 63f65ea5b048..12c3ff65e02f 100644
--- a/xen/arch/x86/cpu/intel.c
+++ b/xen/arch/x86/cpu/intel.c
@@ -21,8 +21,8 @@
  * MSR_MCU_OPT_CTRL is a collection of unrelated functionality, with separate
  * enablement requirements, but which want to be consistent across the system.
  */
-static uint32_t __read_mostly mcu_opt_ctrl_mask;
-static uint32_t __read_mostly mcu_opt_ctrl_val;
+static uint32_t __ro_after_init mcu_opt_ctrl_mask;
+static uint32_t __ro_after_init mcu_opt_ctrl_val;
 
 void update_mcu_opt_ctrl(void)
 {

base-commit: a1ce987411f61dbf5fe64bba0cd3d36d7cc0311f
-- 
2.39.5



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Message-ID: <1a6f2023-1022-4c22-9a61-4006d94d3c24@suse.com>
Date: Wed, 30 Apr 2025 17:32:08 +0200
MIME-Version: 1.0
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Subject: Re: [PATCH v3 10/20] xen/pmstat: introduce CONFIG_PM_OP
To: Penny Zheng 
Cc: ray.huang@amd.com, Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
References: <20250421073723.3863060-1-Penny.Zheng@amd.com>
 <20250421073723.3863060-11-Penny.Zheng@amd.com>
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From: Jan Beulich 
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In-Reply-To: <20250421073723.3863060-11-Penny.Zheng@amd.com>
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On 21.04.2025 09:37, Penny Zheng wrote:
> We move the following functions into a new file drivers/acpi/pm_op.c, as
> they are all more fitting in performance controling and only called by
> do_pm_op():
>  - get_cpufreq_para()
>  - set_cpufreq_para()
>  - set_cpufreq_gov()
>  - set_cpufreq_cppc()
>  - cpufreq_driver_getavg()
>  - cpufreq_update_turbo()
>  - cpufreq_get_turbo_status()
> We introduce a new Kconfig CONFIG_PM_OP to wrap the new file.
> 
> Also, although the following helpers are only called by do_pm_op(), they have
> dependency on local variable, we wrap them with CONFIG_PM_OP in place:
>  - write_userspace_scaling_setspeed()
>  - write_ondemand_sampling_rate()
>  - write_ondemand_up_threshold()
>  - get_cpufreq_ondemand_para()
>  - cpufreq_driver.update()
>  - get_hwp_para()
> Various style corrections shall be applied at the same time while moving these
> functions, including:
>  - add extra space before and after bracket of if() and switch()
>  - fix indentation
> 
> Signed-off-by: Penny Zheng 
> ---
> v2 -> v3
> - new commit
> ---
>  xen/arch/x86/acpi/cpufreq/hwp.c              |   6 +
>  xen/arch/x86/acpi/cpufreq/powernow.c         |   4 +
>  xen/common/Kconfig                           |   7 +
>  xen/common/sysctl.c                          |   4 +-
>  xen/drivers/acpi/Makefile                    |   1 +
>  xen/drivers/acpi/pm_op.c                     | 409 +++++++++++++++++++
>  xen/drivers/acpi/pmstat.c                    | 357 ----------------
>  xen/drivers/cpufreq/cpufreq_misc_governors.c |   2 +
>  xen/drivers/cpufreq/cpufreq_ondemand.c       |   2 +
>  xen/drivers/cpufreq/utility.c                |  41 --
>  xen/include/acpi/cpufreq/cpufreq.h           |   3 -
>  11 files changed, 434 insertions(+), 402 deletions(-)
>  create mode 100644 xen/drivers/acpi/pm_op.c

I'm pretty sure I said "pm-op.c" in replies, maybe even moret than once. Now
you still used an underscore instead of the dash that's preferred.

> --- a/xen/common/sysctl.c
> +++ b/xen/common/sysctl.c
> @@ -181,13 +181,15 @@ long do_sysctl(XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)
>      case XEN_SYSCTL_get_pmstat:
>          ret = do_get_pm_info(&op->u.get_pmstat);
>          break;
> +#endif
>  
> +#ifdef CONFIG_PM_OP
>      case XEN_SYSCTL_pm_op:
>          ret = do_pm_op(&op->u.pm_op);
>          if ( ret == -EAGAIN )
>              copyback = 1;
>          break;
> -#endif
> +#endif /* CONFIG_PM_OP */

Please can you be consistent here with the comment (or not) on the #endif?

> +int do_pm_op(struct xen_sysctl_pm_op *op)
> +{
> +    int ret = 0;
> +    const struct processor_pminfo *pmpt;
> +
> +    switch ( op->cmd )
> +    {
> +    case XEN_SYSCTL_pm_op_set_sched_opt_smt:
> +    {
> +        uint32_t saved_value = sched_smt_power_savings;
> +
> +        if ( op->cpuid != 0 )
> +            return -EINVAL;
> +        sched_smt_power_savings = !!op->u.set_sched_opt_smt;
> +        op->u.set_sched_opt_smt = saved_value;
> +        return 0;
> +    }
> +
> +    case XEN_SYSCTL_pm_op_get_max_cstate:
> +        BUILD_BUG_ON(XEN_SYSCTL_CX_UNLIMITED != UINT_MAX);
> +        if ( op->cpuid == 0 )
> +            op->u.get_max_cstate = acpi_get_cstate_limit();
> +        else if ( op->cpuid == 1 )
> +            op->u.get_max_cstate = acpi_get_csubstate_limit();
> +        else
> +            ret = -EINVAL;
> +        return ret;
> +
> +    case XEN_SYSCTL_pm_op_set_max_cstate:
> +        if ( op->cpuid == 0 )
> +            acpi_set_cstate_limit(op->u.set_max_cstate);
> +        else if ( op->cpuid == 1 )
> +            acpi_set_csubstate_limit(op->u.set_max_cstate);
> +        else
> +            ret = -EINVAL;
> +        return ret;
> +    }
> +
> +    if ( op->cpuid >= nr_cpu_ids || !cpu_online(op->cpuid) )
> +        return -EINVAL;
> +    pmpt = processor_pminfo[op->cpuid];
> +
> +    switch ( op->cmd & PM_PARA_CATEGORY_MASK )
> +    {
> +    case CPUFREQ_PARA:
> +        if ( !(xen_processor_pmbits & XEN_PROCESSOR_PM_PX) )
> +            return -ENODEV;
> +        if ( !pmpt || !(pmpt->perf.init & XEN_PX_INIT) )
> +            return -EINVAL;
> +        break;
> +    }
> +
> +    switch ( op->cmd )
> +    {
> +    case GET_CPUFREQ_PARA:
> +    {
> +        ret = get_cpufreq_para(op);
> +        break;
> +    }
> +
> +    case SET_CPUFREQ_GOV:
> +    {
> +        ret = set_cpufreq_gov(op);
> +        break;
> +    }
> +
> +    case SET_CPUFREQ_PARA:
> +    {
> +        ret = set_cpufreq_para(op);
> +        break;
> +    }
> +
> +    case SET_CPUFREQ_CPPC:
> +        ret = set_cpufreq_cppc(op);
> +        break;
> +
> +    case GET_CPUFREQ_AVGFREQ:
> +    {
> +        op->u.get_avgfreq = cpufreq_driver_getavg(op->cpuid, USR_GETAVG);
> +        break;
> +    }
> +
> +    case XEN_SYSCTL_pm_op_enable_turbo:
> +    {
> +        ret = cpufreq_update_turbo(op->cpuid, CPUFREQ_TURBO_ENABLED);
> +        break;
> +    }
> +
> +    case XEN_SYSCTL_pm_op_disable_turbo:
> +    {
> +        ret = cpufreq_update_turbo(op->cpuid, CPUFREQ_TURBO_DISABLED);
> +        break;
> +    }

Please can you drop all the unnecessary inner figure braces here? They hamper
readability without - imo - providing any gain at all.

With all of the adjustments:
Acked-by: Jan Beulich 

Jan


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Subject: Re: [PATCH] x86/intel: Move mcu_opt_ctrl_* into __ro_after_init
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On 30.04.2025 17:27, Andrew Cooper wrote:
> They're only modified by set_in_mcu_opt_ctrl() which is an __init function.
> 
> No functional change.
> 
> Signed-off-by: Andrew Cooper 

Reviewed-by: Jan Beulich 




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Subject: Re: [PATCH v1 13/14] xen/riscv: initialize interrupt controller
From: Oleksii Kurochko 
To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 4/17/25 12:11 PM, Oleksii Kurochko wrote:
>
>
> On 4/15/25 5:59 PM, Jan Beulich wrote:
>> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>>> Call intc_init() to do basic initialization steps for APLIC and IMISC.
>>>
>>> Signed-off-by: Oleksii Kurochko
>> Acked-by: Jan Beulich
>> yet ...
>>
>>> --- a/xen/arch/riscv/setup.c
>>> +++ b/xen/arch/riscv/setup.c
>>> @@ -136,6 +136,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id,
>>>   
>>>       intc_preinit();
>>>   
>>> +    intc_init();
>>> +
>>>       printk("All set up\n");
>>>   
>>>       machine_halt();
>> ... this being everything here I wonder if this can't be folded with the
>> patch where the function is introduced.
> Sure, it can be folded. I will do that to reduce patch series.

I doubled checked and, at the moment, when intc_init() is introduced:
void __init intc_init(void)
{
     ASSERT(intc_hw_ops);

     if ( intc_hw_ops->init() )
         panic("Failed to initialize the interrupt controller drivers\n");
}

intc_hw_ops isn't registered as they are registered in the next two patches after
intriduction of intc_hw_ops.

~ Oleksii

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    On 4/17/25 12:11 PM, Oleksii Kurochko
      wrote:
    
    
    
    
    
      
      

    
      
    
      
    On 4/15/25 5:59 PM, Jan Beulich
        wrote:
    
      
    
      
    
        
    On 08.04.2025 17:57, Oleksii Kurochko wrote:

    
        
    
          
    Call intc_init() to do basic initialization steps for APLIC and IMISC.

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>

    
        
    
        
    Acked-by: Jan Beulich <jbeulich@suse.com>
yet ...


    
        
    
          
    --- a/xen/arch/riscv/setup.c
+++ b/xen/arch/riscv/setup.c
@@ -136,6 +136,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id,
 
     intc_preinit();
 
+    intc_init();
+
     printk("All set up\n");
 
     machine_halt();

    
        
    
        
    ... this being everything here I wonder if this can't be folded with the
patch where the function is introduced.
    
      
    
      
    Sure, it can be folded. I will do that to reduce patch series.
    
    
    
    
    I doubled checked and, at the moment, when intc_init() is introduced:
void __init intc_init(void)
{
    ASSERT(intc_hw_ops);

    if ( intc_hw_ops->init() )
        panic("Failed to initialize the interrupt controller drivers\n");
}

intc_hw_ops isn't registered as they are registered in the next two patches after
intriduction of intc_hw_ops.

~ Oleksii

    
    
     
    
  


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Subject: Re: [PATCH v3 11/20] xen/sysctl: introduce CONFIG_PM_STATS
To: Penny Zheng 
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 Andrew Cooper ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Anthony PERARD ,
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On 21.04.2025 23:12, Stefano Stabellini wrote:
> On Mon, 21 Apr 2025, Penny Zheng wrote:
>> We introduce a new Kconfig CONFIG_PM_STATS for wrapping all operations
>> regarding performance management statistics.
>> The major codes reside in xen/drivers/acpi/pmstat.c, including the
>> pm-statistic-related sysctl op: do_get_pm_info().
>> CONFIG_PM_STATS also shall depend on CONFIG_SYSCTL
>>
>> Signed-off-by: Penny Zheng 
> 
> Reviewed-by: Stefano Stabellini 

Acked-by: Jan Beulich 




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Subject: Re: [PATCH v1 13/14] xen/riscv: initialize interrupt controller
To: Oleksii Kurochko 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
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On 30.04.2025 17:34, Oleksii Kurochko wrote:
> 
> On 4/17/25 12:11 PM, Oleksii Kurochko wrote:
>>
>>
>> On 4/15/25 5:59 PM, Jan Beulich wrote:
>>> On 08.04.2025 17:57, Oleksii Kurochko wrote:
>>>> Call intc_init() to do basic initialization steps for APLIC and IMISC.
>>>>
>>>> Signed-off-by: Oleksii Kurochko
>>> Acked-by: Jan Beulich
>>> yet ...
>>>
>>>> --- a/xen/arch/riscv/setup.c
>>>> +++ b/xen/arch/riscv/setup.c
>>>> @@ -136,6 +136,8 @@ void __init noreturn start_xen(unsigned long bootcpu_id,
>>>>   
>>>>       intc_preinit();
>>>>   
>>>> +    intc_init();
>>>> +
>>>>       printk("All set up\n");
>>>>   
>>>>       machine_halt();
>>> ... this being everything here I wonder if this can't be folded with the
>>> patch where the function is introduced.
>> Sure, it can be folded. I will do that to reduce patch series.
> 
> I doubled checked and, at the moment, when intc_init() is introduced:
> void __init intc_init(void)
> {
>      ASSERT(intc_hw_ops);
> 
>      if ( intc_hw_ops->init() )
>          panic("Failed to initialize the interrupt controller drivers\n");
> }
> 
> intc_hw_ops isn't registered as they are registered in the next two patches after
> intriduction of intc_hw_ops.

Which then feels wrong anyway; you're then merely leveraging that the function
has no caller, which (as said elsewhere) shouldn't be the case at the very least
for Misra's sake. So I expect some re-ordering to be necessary. Or you may want
to introduce the function empty and add the intc_hw_ops uses as intc_hw_ops is
introduced.

Jan


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Subject: Re: NULL pointer dereference in xenbus_thread->...
To: Jason Andryuk ,
 =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?=
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Cc: Julien Grall , xen-devel 
References:  
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  <641aef98-5dde-4618-9fa4-7ccfa2e1989d@amd.com>
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Subject: Re: NULL pointer dereference in xenbus_thread->...
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  <641aef98-5dde-4618-9fa4-7ccfa2e1989d@amd.com>
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Subject: Re: [PATCH v3 19/20] xen/sysctl: wrap around arch-specific
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To: Penny Zheng 
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On 21.04.2025 09:37, Penny Zheng wrote:
> --- a/xen/arch/riscv/stubs.c
> +++ b/xen/arch/riscv/stubs.c
> @@ -315,13 +315,13 @@ unsigned long raw_copy_from_guest(void *to, const void __user *from,
>  
>  /* sysctl.c */
>  
> +#ifdef CONFIG_SYSCTL
>  long arch_do_sysctl(struct xen_sysctl *sysctl,
>                      XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl)
>  {
>      BUG_ON("unimplemented");
>  }
>  
> -#ifdef CONFIG_SYSCTL
>  void arch_do_physinfo(struct xen_sysctl_physinfo *pi)
>  {
>      BUG_ON("unimplemented");

Looks like the #ifdef would better move ahead of the comment, too.
Preferably with that (and notwithstanding any changes resulting from
the comment on patch 02):
Acked-by: Jan Beulich 

Jan


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Subject: Re: [PATCH v3 02/20] xen: introduce CONFIG_SYSCTL
From: Jan Beulich 
To: Penny Zheng 
Cc: ray.huang@amd.com, Stefano Stabellini ,
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 Sergiy Kibrik , xen-devel@lists.xenproject.org
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On 30.04.2025 17:20, Jan Beulich wrote:
> On 21.04.2025 09:37, Penny Zheng wrote:
>> --- a/xen/common/Kconfig
>> +++ b/xen/common/Kconfig
>> @@ -581,4 +581,15 @@ config BUDDY_ALLOCATOR_SIZE
>>  	  Amount of memory reserved for the buddy allocator to serve Xen heap,
>>  	  working alongside the colored one.
>>  
>> +menu "Supported hypercall interfaces"
>> +	visible if EXPERT
>> +
>> +config SYSCTL
>> +	bool "Enable sysctl hypercall"
>> +	default y
> 
> Oh, and - just to re-iterate what I said earlier in the context of another patch:
> Imo you would better introduce the option without prompt (simply "defbool y"),
> and make it user selectable only in the final patch. That'll eliminate the need
> for transient "#ifdef CONFIG_SYSCTL", i.e. reduce overall code churn.

Moving further through the series I noticed that omitting the prompt here will
have an effect on the shim then - it'll be transiently (until the final patch of
the series) be built with all of the sysctl code again. I think that's tolerable
as long as in the final patch that is then being "cured" again. But it of course
needs calling out, to make people explicitly aware.

Jan


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There's nothing arch-specific about it.

While there, on x86 visually separate the vmap_to_*() macros from those
covered by the earlier comment.

Signed-off-by: Jan Beulich 

--- a/xen/arch/arm/include/asm/mm.h
+++ b/xen/arch/arm/include/asm/mm.h
@@ -237,7 +237,6 @@ static inline void __iomem *ioremap_wc(p
 /* Convert between frame number and address formats.  */
 #define pfn_to_paddr(pfn) ((paddr_t)(pfn) << PAGE_SHIFT)
 #define paddr_to_pfn(pa)  ((unsigned long)((pa) >> PAGE_SHIFT))
-#define paddr_to_pdx(pa)    mfn_to_pdx(maddr_to_mfn(pa))
 #define gfn_to_gaddr(gfn)   pfn_to_paddr(gfn_x(gfn))
 #define gaddr_to_gfn(ga)    _gfn(paddr_to_pfn(ga))
 #define mfn_to_maddr(mfn)   pfn_to_paddr(mfn_x(mfn))
--- a/xen/arch/ppc/include/asm/mm.h
+++ b/xen/arch/ppc/include/asm/mm.h
@@ -13,7 +13,6 @@ void setup_initial_pagetables(void);
 
 #define pfn_to_paddr(pfn) ((paddr_t)(pfn) << PAGE_SHIFT)
 #define paddr_to_pfn(pa)  ((unsigned long)((pa) >> PAGE_SHIFT))
-#define paddr_to_pdx(pa)  mfn_to_pdx(maddr_to_mfn(pa))
 #define gfn_to_gaddr(gfn) pfn_to_paddr(gfn_x(gfn))
 #define gaddr_to_gfn(ga)  _gfn(paddr_to_pfn(ga))
 #define mfn_to_maddr(mfn) pfn_to_paddr(mfn_x(mfn))
--- a/xen/arch/riscv/include/asm/mm.h
+++ b/xen/arch/riscv/include/asm/mm.h
@@ -19,7 +19,6 @@ extern vaddr_t directmap_virt_start;
 #define pfn_to_paddr(pfn) ((paddr_t)(pfn) << PAGE_SHIFT)
 #define paddr_to_pfn(pa)  ((unsigned long)((pa) >> PAGE_SHIFT))
 
-#define paddr_to_pdx(pa)    mfn_to_pdx(maddr_to_mfn(pa))
 #define gfn_to_gaddr(gfn)   pfn_to_paddr(gfn_x(gfn))
 #define gaddr_to_gfn(ga)    _gfn(paddr_to_pfn(ga))
 #define mfn_to_maddr(mfn)   pfn_to_paddr(mfn_x(mfn))
--- a/xen/arch/x86/include/asm/page.h
+++ b/xen/arch/x86/include/asm/page.h
@@ -258,7 +258,8 @@ void scrub_page_cold(void *);
 #define mfn_to_virt(mfn)    __mfn_to_virt(mfn)
 #define pfn_to_paddr(pfn)   __pfn_to_paddr(pfn)
 #define paddr_to_pfn(pa)    __paddr_to_pfn(pa)
-#define paddr_to_pdx(pa)    pfn_to_pdx(paddr_to_pfn(pa))
+
+/* Specialized forms acting on vmap() addresses. */
 #define vmap_to_mfn(va)     xen_map_to_mfn((unsigned long)(va))
 #define vmap_to_page(va)    mfn_to_page(vmap_to_mfn(va))
 
--- a/xen/include/xen/pdx.h
+++ b/xen/include/xen/pdx.h
@@ -98,6 +98,8 @@ bool __mfn_valid(unsigned long mfn);
 #define mfn_to_pdx(mfn) pfn_to_pdx(mfn_x(mfn))
 #define pdx_to_mfn(pdx) _mfn(pdx_to_pfn(pdx))
 
+#define paddr_to_pdx(pa) pfn_to_pdx(paddr_to_pfn(pa))
+
 #ifdef CONFIG_PDX_COMPRESSION
 
 extern unsigned long pfn_pdx_bottom_mask, ma_va_bottom_mask;


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Date: Wed, 30 Apr 2025 17:59:51 +0200
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Subject: Re: [RFC PATCH 1/4] xen: Introduce physaddr_abi CDF flag
To: Teddy Astie 
Cc: Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini , xen-devel@lists.xenproject.org
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From: Jan Beulich 
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On 18.04.2025 16:18, Teddy Astie wrote:
> @@ -745,6 +747,12 @@ static int sanitise_domain_config(struct xen_domctl_createdomain *config)
>          return -EINVAL;
>      }
>  
> +    if ( physaddr_abi && !hvm )
> +    {
> +        dprintk(XENLOG_INFO, "Physical address ABI requested for non-HVM guest");
> +        return -EINVAL;
> +    }

Why this restriction?

Jan



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On 30/04/2025 2:13 pm, Jan Beulich wrote:
> In a number of cases we use ALTERNATIVE_2 with both replacement insns /
> insn sequences being identical. Avoid emitting the same code twice, and
> instead alias the necessary helper labels to the existing ones.
>
> Signed-off-by: Jan Beulich 

On a random build, the size of .altinstr_replacement drops from 0xe47 to
0xdf8, so not too bad.

While the patch is fine, if we're adjusting the assembly ALTERNATIVE_2,
we should make the same adjustment to the C version, even if there's
nothing to benefit from it immediately.

~Andrew

P.S. it would be even nicer if we would put these in mergeable sections,
but I haven't figured out way to set the mergable unit size, which needs
to be an absolute expression.


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To: Jan Beulich ,
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Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Julien Grall , Stefano Stabellini ,
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On 30/04/2025 4:56 pm, Jan Beulich wrote:
> There's nothing arch-specific about it.
>
> While there, on x86 visually separate the vmap_to_*() macros from those
> covered by the earlier comment.
>
> Signed-off-by: Jan Beulich 

Acked-by: Andrew Cooper 


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Subject: Re: [PATCH] x86/alternatives: allow replacement code snippets to be
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To: Andrew Cooper ,
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Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= 
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On 30.04.2025 18:00, Andrew Cooper wrote:
> On 30/04/2025 2:13 pm, Jan Beulich wrote:
>> In a number of cases we use ALTERNATIVE_2 with both replacement insns /
>> insn sequences being identical. Avoid emitting the same code twice, and
>> instead alias the necessary helper labels to the existing ones.
>>
>> Signed-off-by: Jan Beulich 
> 
> On a random build, the size of .altinstr_replacement drops from 0xe47 to
> 0xdf8, so not too bad.
> 
> While the patch is fine, if we're adjusting the assembly ALTERNATIVE_2,
> we should make the same adjustment to the C version, even if there's
> nothing to benefit from it immediately.

Can do, but I expect that to end up more clumsy for, as you say, no real
gain.

> P.S. it would be even nicer if we would put these in mergeable sections,
> but I haven't figured out way to set the mergable unit size, which needs
> to be an absolute expression.

Well, have you missed
https://lists.xen.org/archives/html/xen-devel/2021-11/msg01009.html then?
Yet it might still make sense to use the approach here as well, as there
are limitations to what can really be merged (by the toolchain).

Jan


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Subject: Re: [PATCH v1 10/14] xen/riscv: implementation of aplic and imsic
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To: Jan Beulich 
Cc: Alistair Francis ,
 Bob Eshleman , Connor Davis
 , Andrew Cooper ,
 Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= ,
 Stefano Stabellini ,
 Romain Caritey , xen-devel@lists.xenproject.org
References: 
 <74a07ed7c596bbcf581010685e01bfdfa19164f5.1744126720.git.oleksii.kurochko@gmail.com>
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On 4/28/25 10:54 AM, Jan Beulich wrote:
>>>>>> +    ASSERT(spin_is_locked(&desc->lock));
>>>>> If this lock (which is an IRQ-safe one) is necessarily held, ...
>>>>>
>>>>>> +    spin_lock_irqsave(&aplic.lock, flags);
>>>>> ... you can use just spin_lock() here.
>>>>>
>>>>>> +    clear_bit(_IRQ_DISABLED, &desc->status);
>>>>> Why an atomic bitop when desc is locked? (And yes, I ought to raise the same
>>>>> question on Arm code also doing so.)
>>>> I haven't thought about that. Likely non-atomic bitop could be used here.
>>> And then - does it need to be a bitop? Aiui that's what Arm uses, while x86
>>> doesn't. And I see no reason to use other than plain C operators here. If
>>> Arm was switched, presumably all the redundant (and misnamed) _IRQ_*
>>> constants could go away, with just the IRQ_* ones left.
>> The reason for a bitop in Arm is explained in this commithttps://gitlab.com/xen-project/xen/-/commit/50d8fe8fcbab2440cfeeb65c4765868398652473
>> but all the places where plain C operators were changed to bitops are actually executed under|spin_lock_irqsave(&desc->lock, flags). By quick look I found only two
>> places one in __setup_irq() but it is called by the functions which do ||spin_lock_irqsave(&desc->lock, flags) and in vgic_v2_fold_lr_state().
>> Maybe, I'm missing something.|
>> |RISC-V won't have something similar to ||vgic_v2_fold_lr_state|(), but __setup_irq() is used in a similar way. It can be added ASSERT(spin_is_lock(&desc->lock))
>> and then it will also safe to use non-bitop function.
>> Probably, it is a little bit safer to use always bitops for desc->status.
>> ||
> I question that. If any accesses outside of locked regions were needed (as the
> description of that commit suggests), then the situation would be different.

Okay, then at the moment there is no such cases and I'll use plain C operator instead of
clear/set_bit().

>
> Btw, you not wrapping lines and you adding strange | instances doesn't help
> readability of your replies.
>
>>>>> I'm uncertain about this bit setting anyway - on x86 we would only fiddle
>>>>> with it for IRQs not in use, not while enabling/disabling one.
>>> What about this part?
>> As I understand, based on Arm, code then Xen enables interrupts corresponding to devices assigned
>> to dom0/domU before booting dom0/domU, resulting in the possibility of receiving an interrupt
>> and not knowing what to do with it. So it is needed for enablement of IRQs when the guest
>> requests it and not unconditionally at boot time.
> I fear I don't understand this. The way we do things on x86 doesn't leave us
> in such a situation.

On Arm, the physical interrupts would be enabled when the interrupt is initially routed and in case guest
is booting with interrupt disabled, it could introduce a problem when guest enabled interrupts it will
already have a pending interrupt for which it isn't ready.

How is it handled the case when a device isn't quiescing at the boot time in x86?

But I just realized the way how interrupts are enabled in RISC-V for guest won't lead to such case. The interrupt
will be enabled only when guest's device driver will request that. So this setting/clearing of IRQ_DISABLED could
be dropped for RISC-V.

~ Oleksii

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    On 4/28/25 10:54 AM, Jan Beulich wrote:
    
    
    
      
    
      
    
        
    
          
    
            
    
              
    
                
    +    ASSERT(spin_is_locked(&desc->lock));

    
              
    
              
    If this lock (which is an IRQ-safe one) is necessarily held, ...


    
              
    
                
    +    spin_lock_irqsave(&aplic.lock, flags);

    
              
    
              
    ... you can use just spin_lock() here.


    
              
    
                
    +    clear_bit(_IRQ_DISABLED, &desc->status);

    
              
    
              
    Why an atomic bitop when desc is locked? (And yes, I ought to raise the same
question on Arm code also doing so.)

    
            
    
            
    I haven't thought about that. Likely non-atomic bitop could be used here.

    
          
    
          
    And then - does it need to be a bitop? Aiui that's what Arm uses, while x86
doesn't. And I see no reason to use other than plain C operators here. If
Arm was switched, presumably all the redundant (and misnamed) _IRQ_*
constants could go away, with just the IRQ_* ones left.

    
        
    
        
    The reason for a bitop in Arm is explained in this commithttps://gitlab.com/xen-project/xen/-/commit/50d8fe8fcbab2440cfeeb65c4765868398652473
but all the places where plain C operators were changed to bitops are actually executed under|spin_lock_irqsave(&desc->lock, flags). By quick look I found only two 
places one in __setup_irq() but it is called by the functions which do ||spin_lock_irqsave(&desc->lock, flags) and in vgic_v2_fold_lr_state(). 
Maybe, I'm missing something.|
|RISC-V won't have something similar to ||vgic_v2_fold_lr_state|(), but __setup_irq() is used in a similar way. It can be added ASSERT(spin_is_lock(&desc->lock))
and then it will also safe to use non-bitop function.
Probably, it is a little bit safer to use always bitops for desc->status.
||

    
      
    
      
    I question that. If any accesses outside of locked regions were needed (as the
description of that commit suggests), then the situation would be different.
    
    
    
    
    Okay, then at the moment there is no such cases and I'll use plain C operator instead of
clear/set_bit().


    
    
    
      
    
Btw, you not wrapping lines and you adding strange | instances doesn't help
readability of your replies.


    
      
    
        
    
          
    
            
    
              
    I'm uncertain about this bit setting anyway - on x86 we would only fiddle
with it for IRQs not in use, not while enabling/disabling one.

    
            
    
          
    
          
    What about this part?

    
        
    
        
    As I understand, based on Arm, code then Xen enables interrupts corresponding to devices assigned
to dom0/domU before booting dom0/domU, resulting in the possibility of receiving an interrupt
and not knowing what to do with it. So it is needed for enablement of IRQs when the guest
requests it and not unconditionally at boot time.

    
      
    
      
    I fear I don't understand this. The way we do things on x86 doesn't leave us
in such a situation.
    
    
    
    
    On Arm, the physical interrupts would be enabled when the interrupt is initially routed and in case guest
is booting with interrupt disabled, it could introduce a problem when guest enabled interrupts it will
already have a pending interrupt for which it isn't ready.

How is it handled the case when a device isn't quiescing at the boot time in x86?

But I just realized the way how interrupts are enabled in RISC-V for guest won't lead to such case. The interrupt
will be enabled only when guest's device driver will request that. So this setting/clearing of IRQ_DISABLED could
be dropped for RISC-V.

~ Oleksii
    
  


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On 30/04/2025 5:05 pm, Jan Beulich wrote:
> On 30.04.2025 18:00, Andrew Cooper wrote:
>> On 30/04/2025 2:13 pm, Jan Beulich wrote:
>>> In a number of cases we use ALTERNATIVE_2 with both replacement insns /
>>> insn sequences being identical. Avoid emitting the same code twice, and
>>> instead alias the necessary helper labels to the existing ones.
>>>
>>> Signed-off-by: Jan Beulich 
>> On a random build, the size of .altinstr_replacement drops from 0xe47 to
>> 0xdf8, so not too bad.
>>
>> While the patch is fine, if we're adjusting the assembly ALTERNATIVE_2,
>> we should make the same adjustment to the C version, even if there's
>> nothing to benefit from it immediately.
> Can do, but I expect that to end up more clumsy for, as you say, no real
> gain.

Fine.  Acked-by: Andrew Cooper 

>
>> P.S. it would be even nicer if we would put these in mergeable sections,
>> but I haven't figured out way to set the mergable unit size, which needs
>> to be an absolute expression.
> Well, have you missed
> https://lists.xen.org/archives/html/xen-devel/2021-11/msg01009.html then?

Apparently so, yes.

~Andrew

> Yet it might still make sense to use the approach here as well, as there
> are limitations to what can really be merged (by the toolchain).
>
> Jan



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        wei.liu@kernel.org, ajay.kaher@broadcom.com,
        bcm-kernel-feedback-list@broadcom.com, tony.luck@intel.com,
        pbonzini@redhat.com, vkuznets@redhat.com, seanjc@google.com,
        luto@kernel.org, boris.ostrovsky@oracle.com, kys@microsoft.com,
        haiyangz@microsoft.com, decui@microsoft.com,
        dapeng1.mi@linux.intel.com
References: <20250427092027.1598740-1-xin@zytor.com>
 <20250427092027.1598740-2-xin@zytor.com>
 
 
 
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From: Xin Li 
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On 4/30/2025 2:17 AM, Ilpo Järvinen wrote:
> While this is not my subsystem so don't have the final say here, you had
> to explain quite much to prove that (and reviewer would have to go through
> the same places to check). Wouldn't it be much simpler for all if all
> those .c files would just include  directly? No need to explain
> anything then.
> 
> Also, similar to what you're doing for some tsc related things in this
> series, somebody could in the future decide that hey, these static inline
> functions (that use .*msr.*) belong to some other file, allowing msr.h to
> be removed from arch/x86/events/perf_event.h. Again, we'd need to add
> asm/msr.h into more .c files. This is the problem with relying on indirect
> includes, they create hard to track dependencies for #includes done in .h
> files. If we actively encourage to depend on indirect #include
> dependencies like that, it makes it very hard to_remove_ any #include
> from a header file (as you have yourself discovered).

You're right, it makes a lot of sense from maintenance point of view.


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Subject: Re: [PATCH v6 02/12] common/hyperlaunch: introduce the domain builder
Content-Language: en-US
To: Alejandro Vallejo , xen-devel@lists.xenproject.org
Cc: Jan Beulich , Andrew Cooper
 , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?=
 , Anthony PERARD ,
 Michal Orzel , Julien Grall ,
 Stefano Stabellini ,
 Jason Andryuk , Denis Mukhin 
References: <20250429123629.20839-1-agarciav@amd.com>
 <20250429123629.20839-3-agarciav@amd.com>
From: "Daniel P. Smith" 
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On 4/29/25 08:36, Alejandro Vallejo wrote:
> From: "Daniel P. Smith" 
> 
> Introduce the domain builder which is capable of consuming a device tree as the
> first boot module. If it finds a device tree as the first boot module, it will
> set its type to BOOTMOD_FDT. This change only detects the boot module and
> continues to boot with slight change to the boot convention that the dom0
> kernel is no longer first boot module but is the second.
> 
> No functional change intended.
> 
> Signed-off-by: Daniel P. Smith 
> Signed-off-by: Jason Andryuk 
> Signed-off-by: Alejandro Vallejo 
> Reviewed-by: Denis Mukhin 
> ---
>   xen/arch/x86/include/asm/bootinfo.h |  3 ++
>   xen/arch/x86/setup.c                | 19 ++++++++----
>   xen/common/Makefile                 |  1 +
>   xen/common/domain-builder/Makefile  |  2 ++
>   xen/common/domain-builder/core.c    | 45 +++++++++++++++++++++++++++++
>   xen/common/domain-builder/fdt.c     | 39 +++++++++++++++++++++++++
>   xen/common/domain-builder/fdt.h     | 14 +++++++++
>   xen/include/xen/domain-builder.h    | 29 +++++++++++++++++++
>   8 files changed, 146 insertions(+), 6 deletions(-)
>   create mode 100644 xen/common/domain-builder/Makefile
>   create mode 100644 xen/common/domain-builder/core.c
>   create mode 100644 xen/common/domain-builder/fdt.c
>   create mode 100644 xen/common/domain-builder/fdt.h
>   create mode 100644 xen/include/xen/domain-builder.h
> 
> diff --git a/xen/arch/x86/include/asm/bootinfo.h b/xen/arch/x86/include/asm/bootinfo.h
> index 3afc214c17..82c2650fcf 100644
> --- a/xen/arch/x86/include/asm/bootinfo.h
> +++ b/xen/arch/x86/include/asm/bootinfo.h
> @@ -27,6 +27,7 @@ enum bootmod_type {
>       BOOTMOD_RAMDISK,
>       BOOTMOD_MICROCODE,
>       BOOTMOD_XSM_POLICY,
> +    BOOTMOD_FDT,
>   };
>   
>   struct boot_module {
> @@ -80,6 +81,8 @@ struct boot_info {
>       paddr_t memmap_addr;
>       size_t memmap_length;
>   
> +    bool hyperlaunch_enabled;
> +
>       unsigned int nr_modules;
>       struct boot_module mods[MAX_NR_BOOTMODS + 1];
>       struct boot_domain domains[MAX_NR_BOOTDOMS];
> diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
> index 2518954124..f3b5c83a3c 100644
> --- a/xen/arch/x86/setup.c
> +++ b/xen/arch/x86/setup.c
> @@ -6,6 +6,7 @@
>   #include 
>   #include 
>   #include 
> +#include 
>   #include 
>   #include 
>   #include 
> @@ -1284,9 +1285,14 @@ void asmlinkage __init noreturn __start_xen(void)
>                  bi->nr_modules);
>       }
>   
> -    /* Dom0 kernel is always first */
> -    bi->mods[0].type = BOOTMOD_KERNEL;
> -    bi->domains[0].kernel = &bi->mods[0];
> +    if ( builder_init(bi) == FDT_KIND_NONE )
> +    {
> +        /* Find first unknown boot module to use as dom0 kernel */
> +        i = first_boot_module_index(bi, BOOTMOD_UNKNOWN);
> +        bi->mods[i].type = BOOTMOD_KERNEL;
> +        bi->domains[0].kernel = &bi->mods[i];
> +        bi->hyperlaunch_enabled = false;
> +    }
>   
>       if ( pvh_boot )
>       {
> @@ -1469,8 +1475,9 @@ void asmlinkage __init noreturn __start_xen(void)
>           xen->size  = __2M_rwdata_end - _stext;
>       }
>   
> -    bi->mods[0].headroom =
> -        bzimage_headroom(bootstrap_map_bm(&bi->mods[0]), bi->mods[0].size);
> +    bi->domains[0].kernel->headroom =
> +        bzimage_headroom(bootstrap_map_bm(bi->domains[0].kernel),
> +                         bi->domains[0].kernel->size);
>       bootstrap_unmap();
>   
>   #ifndef highmem_start
> @@ -1594,7 +1601,7 @@ void asmlinkage __init noreturn __start_xen(void)
>   #endif
>       }
>   
> -    if ( bi->mods[0].headroom && !bi->mods[0].relocated )
> +    if ( bi->domains[0].kernel->headroom && !bi->domains[0].kernel->relocated )
>           panic("Not enough memory to relocate the dom0 kernel image\n");
>       for ( i = 0; i < bi->nr_modules; ++i )
>       {
> diff --git a/xen/common/Makefile b/xen/common/Makefile
> index 98f0873056..e42af71e3f 100644
> --- a/xen/common/Makefile
> +++ b/xen/common/Makefile
> @@ -11,6 +11,7 @@ obj-$(filter-out $(CONFIG_X86),$(CONFIG_ACPI)) += device.o
>   obj-$(CONFIG_HAS_DEVICE_TREE) += device-tree/
>   obj-$(CONFIG_IOREQ_SERVER) += dm.o
>   obj-y += domain.o
> +obj-$(CONFIG_DOMAIN_BUILDER) += domain-builder/

Please don't do this, use IF_ENABLED in core.c and then hide the 
unnecessary units in domain-builder/Makefile as I originally had it. 
This allows for a much easier time incrementally converting the dom0 
construction path into a generalized domain construction path.

>   obj-y += event_2l.o
>   obj-y += event_channel.o
>   obj-$(CONFIG_EVTCHN_FIFO) += event_fifo.o
> diff --git a/xen/common/domain-builder/Makefile b/xen/common/domain-builder/Makefile
> new file mode 100644
> index 0000000000..bfd2f6267e
> --- /dev/null
> +++ b/xen/common/domain-builder/Makefile
> @@ -0,0 +1,2 @@
> +obj-y += fdt.init.o
> +obj-y += core.init.o
> diff --git a/xen/common/domain-builder/core.c b/xen/common/domain-builder/core.c
> new file mode 100644
> index 0000000000..97c92db571
> --- /dev/null
> +++ b/xen/common/domain-builder/core.c
> @@ -0,0 +1,45 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Copyright (C) 2024, Apertus Solutions, LLC
> + */
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include 
> +
> +#include "fdt.h"
> +
> +enum fdt_kind __init builder_init(struct boot_info *bi)
> +{
> +    enum fdt_kind kind;
> +
> +    bi->hyperlaunch_enabled = false;
> +    switch ( (kind = fdt_detect_kind(bi)) )
> +    {
> +    case FDT_KIND_NONE:
> +        /* No DT found */
> +        return kind;
> +
> +    case FDT_KIND_UNKNOWN:
> +        printk(XENLOG_DEBUG "DT found: non-hyperlaunch\n");
> +        bi->mods[0].type = BOOTMOD_FDT;
> +        return kind;
> +
> +    default:
> +        BUG();
> +    }
> +}
> +
> +/*
> + * Local variables:
> + * mode: C
> + * c-file-style: "BSD"
> + * c-basic-offset: 4
> + * tab-width: 4
> + * indent-tabs-mode: nil
> + * End:
> + */
> diff --git a/xen/common/domain-builder/fdt.c b/xen/common/domain-builder/fdt.c
> new file mode 100644
> index 0000000000..4b07bd22c8
> --- /dev/null
> +++ b/xen/common/domain-builder/fdt.c
> @@ -0,0 +1,39 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Copyright (C) 2024, Apertus Solutions, LLC
> + */
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include 
> +#include 
> +#include 
> +
> +#include "fdt.h"
> +
> +enum fdt_kind __init fdt_detect_kind(const struct boot_info *bi)
> +{
> +    enum fdt_kind kind;
> +    const void *fdt = bootstrap_map_bm(&bi->mods[HYPERLAUNCH_MODULE_IDX]);
> +
> +    if ( !fdt || fdt_check_header(fdt) < 0 )
> +        kind = FDT_KIND_NONE;
> +    else
> +        kind = FDT_KIND_UNKNOWN;
> +
> +    bootstrap_unmap();
> +
> +    return kind;
> +}
> +
> +/*
> + * Local variables:
> + * mode: C
> + * c-file-style: "BSD"
> + * c-basic-offset: 4
> + * tab-width: 4
> + * indent-tabs-mode: nil
> + * End:
> + */
> diff --git a/xen/common/domain-builder/fdt.h b/xen/common/domain-builder/fdt.h
> new file mode 100644
> index 0000000000..ef897fc412
> --- /dev/null
> +++ b/xen/common/domain-builder/fdt.h
> @@ -0,0 +1,14 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +#ifndef __XEN_DOMAIN_BUILDER_FDT_H__
> +#define __XEN_DOMAIN_BUILDER_FDT_H__
> +
> +#include 
> +
> +struct boot_info;
> +
> +/* hyperlaunch fdt is required to be module 0 */
> +#define HYPERLAUNCH_MODULE_IDX 0
> +
> +enum fdt_kind fdt_detect_kind(const struct boot_info *bi);
> +
> +#endif /* __XEN_DOMAIN_BUILDER_FDT_H__ */
> diff --git a/xen/include/xen/domain-builder.h b/xen/include/xen/domain-builder.h
> new file mode 100644
> index 0000000000..b9702db735
> --- /dev/null
> +++ b/xen/include/xen/domain-builder.h
> @@ -0,0 +1,29 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +#ifndef __XEN_DOMAIN_BUILDER_H__
> +#define __XEN_DOMAIN_BUILDER_H__
> +
> +struct boot_info;
> +
> +/* Return status of builder_init(). Shows which boot mechanism was detected */
> +enum fdt_kind
> +{
> +    /* FDT not found. Skipped builder. */
> +    FDT_KIND_NONE,
> +    /* Found an FDT that wasn't hyperlaunch. */
> +    FDT_KIND_UNKNOWN,
> +};
> +
> +/*
> + * Initialises `bi` if it detects a compatible FDT. Otherwise returns
> + * FDT_KIND_NONE and leaves initialisation up to the caller.
> + */
> +#if IS_ENABLED(CONFIG_DOMAIN_BUILDER)
> +enum fdt_kind builder_init(struct boot_info *bi);
> +#else
> +static inline enum fdt_kind builder_init(struct boot_info *bi)
> +{
> +    return FDT_KIND_NONE;
> +}
> +#endif /* !IS_ENABLED(CONFIG_DOMAIN_BUILDER) */
> +
> +#endif /* __XEN_DOMAIN_BUILDER_H__ */